Coverage Report

Created: 2025-07-15 06:22

/src/keystone/llvm/lib/Target/X86/X86GenInstrInfo.inc
Line
Count
Source
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Target Instruction Enum Values                                             *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
10
#ifdef GET_INSTRINFO_ENUM
11
#undef GET_INSTRINFO_ENUM
12
namespace llvm_ks {
13
14
namespace X86 {
15
  enum {
16
    PHI = 0,
17
    INLINEASM = 1,
18
    CFI_INSTRUCTION = 2,
19
    EH_LABEL  = 3,
20
    GC_LABEL  = 4,
21
    KILL  = 5,
22
    EXTRACT_SUBREG  = 6,
23
    INSERT_SUBREG = 7,
24
    IMPLICIT_DEF  = 8,
25
    SUBREG_TO_REG = 9,
26
    COPY_TO_REGCLASS  = 10,
27
    DBG_VALUE = 11,
28
    REG_SEQUENCE  = 12,
29
    COPY  = 13,
30
    BUNDLE  = 14,
31
    LIFETIME_START  = 15,
32
    LIFETIME_END  = 16,
33
    STACKMAP  = 17,
34
    PATCHPOINT  = 18,
35
    LOAD_STACK_GUARD  = 19,
36
    STATEPOINT  = 20,
37
    LOCAL_ESCAPE  = 21,
38
    FAULTING_LOAD_OP  = 22,
39
    G_ADD = 23,
40
    AAA = 24,
41
    AAD8i8  = 25,
42
    AAM8i8  = 26,
43
    AAS = 27,
44
    ABS_F = 28,
45
    ABS_Fp32  = 29,
46
    ABS_Fp64  = 30,
47
    ABS_Fp80  = 31,
48
    ACQUIRE_MOV16rm = 32,
49
    ACQUIRE_MOV32rm = 33,
50
    ACQUIRE_MOV64rm = 34,
51
    ACQUIRE_MOV8rm  = 35,
52
    ADC16i16  = 36,
53
    ADC16mi = 37,
54
    ADC16mi8  = 38,
55
    ADC16mr = 39,
56
    ADC16ri = 40,
57
    ADC16ri8  = 41,
58
    ADC16rm = 42,
59
    ADC16rr = 43,
60
    ADC16rr_REV = 44,
61
    ADC32i32  = 45,
62
    ADC32mi = 46,
63
    ADC32mi8  = 47,
64
    ADC32mr = 48,
65
    ADC32ri = 49,
66
    ADC32ri8  = 50,
67
    ADC32rm = 51,
68
    ADC32rr = 52,
69
    ADC32rr_REV = 53,
70
    ADC64i32  = 54,
71
    ADC64mi32 = 55,
72
    ADC64mi8  = 56,
73
    ADC64mr = 57,
74
    ADC64ri32 = 58,
75
    ADC64ri8  = 59,
76
    ADC64rm = 60,
77
    ADC64rr = 61,
78
    ADC64rr_REV = 62,
79
    ADC8i8  = 63,
80
    ADC8mi  = 64,
81
    ADC8mi8 = 65,
82
    ADC8mr  = 66,
83
    ADC8ri  = 67,
84
    ADC8ri8 = 68,
85
    ADC8rm  = 69,
86
    ADC8rr  = 70,
87
    ADC8rr_REV  = 71,
88
    ADCX32rm  = 72,
89
    ADCX32rr  = 73,
90
    ADCX64rm  = 74,
91
    ADCX64rr  = 75,
92
    ADD16i16  = 76,
93
    ADD16mi = 77,
94
    ADD16mi8  = 78,
95
    ADD16mr = 79,
96
    ADD16ri = 80,
97
    ADD16ri8  = 81,
98
    ADD16ri8_DB = 82,
99
    ADD16ri_DB  = 83,
100
    ADD16rm = 84,
101
    ADD16rr = 85,
102
    ADD16rr_DB  = 86,
103
    ADD16rr_REV = 87,
104
    ADD32i32  = 88,
105
    ADD32mi = 89,
106
    ADD32mi8  = 90,
107
    ADD32mr = 91,
108
    ADD32ri = 92,
109
    ADD32ri8  = 93,
110
    ADD32ri8_DB = 94,
111
    ADD32ri_DB  = 95,
112
    ADD32rm = 96,
113
    ADD32rr = 97,
114
    ADD32rr_DB  = 98,
115
    ADD32rr_REV = 99,
116
    ADD64i32  = 100,
117
    ADD64mi32 = 101,
118
    ADD64mi8  = 102,
119
    ADD64mr = 103,
120
    ADD64ri32 = 104,
121
    ADD64ri32_DB  = 105,
122
    ADD64ri8  = 106,
123
    ADD64ri8_DB = 107,
124
    ADD64rm = 108,
125
    ADD64rr = 109,
126
    ADD64rr_DB  = 110,
127
    ADD64rr_REV = 111,
128
    ADD8i8  = 112,
129
    ADD8mi  = 113,
130
    ADD8mi8 = 114,
131
    ADD8mr  = 115,
132
    ADD8ri  = 116,
133
    ADD8ri8 = 117,
134
    ADD8rm  = 118,
135
    ADD8rr  = 119,
136
    ADD8rr_REV  = 120,
137
    ADDPDrm = 121,
138
    ADDPDrr = 122,
139
    ADDPSrm = 123,
140
    ADDPSrr = 124,
141
    ADDSDrm = 125,
142
    ADDSDrm_Int = 126,
143
    ADDSDrr = 127,
144
    ADDSDrr_Int = 128,
145
    ADDSSrm = 129,
146
    ADDSSrm_Int = 130,
147
    ADDSSrr = 131,
148
    ADDSSrr_Int = 132,
149
    ADDSUBPDrm  = 133,
150
    ADDSUBPDrr  = 134,
151
    ADDSUBPSrm  = 135,
152
    ADDSUBPSrr  = 136,
153
    ADD_F32m  = 137,
154
    ADD_F64m  = 138,
155
    ADD_FI16m = 139,
156
    ADD_FI32m = 140,
157
    ADD_FPrST0  = 141,
158
    ADD_FST0r = 142,
159
    ADD_Fp32  = 143,
160
    ADD_Fp32m = 144,
161
    ADD_Fp64  = 145,
162
    ADD_Fp64m = 146,
163
    ADD_Fp64m32 = 147,
164
    ADD_Fp80  = 148,
165
    ADD_Fp80m32 = 149,
166
    ADD_Fp80m64 = 150,
167
    ADD_FpI16m32  = 151,
168
    ADD_FpI16m64  = 152,
169
    ADD_FpI16m80  = 153,
170
    ADD_FpI32m32  = 154,
171
    ADD_FpI32m64  = 155,
172
    ADD_FpI32m80  = 156,
173
    ADD_FrST0 = 157,
174
    ADJCALLSTACKDOWN32  = 158,
175
    ADJCALLSTACKDOWN64  = 159,
176
    ADJCALLSTACKUP32  = 160,
177
    ADJCALLSTACKUP64  = 161,
178
    ADOX32rm  = 162,
179
    ADOX32rr  = 163,
180
    ADOX64rm  = 164,
181
    ADOX64rr  = 165,
182
    AESDECLASTrm  = 166,
183
    AESDECLASTrr  = 167,
184
    AESDECrm  = 168,
185
    AESDECrr  = 169,
186
    AESENCLASTrm  = 170,
187
    AESENCLASTrr  = 171,
188
    AESENCrm  = 172,
189
    AESENCrr  = 173,
190
    AESIMCrm  = 174,
191
    AESIMCrr  = 175,
192
    AESKEYGENASSIST128rm  = 176,
193
    AESKEYGENASSIST128rr  = 177,
194
    AND16i16  = 178,
195
    AND16mi = 179,
196
    AND16mi8  = 180,
197
    AND16mr = 181,
198
    AND16ri = 182,
199
    AND16ri8  = 183,
200
    AND16rm = 184,
201
    AND16rr = 185,
202
    AND16rr_REV = 186,
203
    AND32i32  = 187,
204
    AND32mi = 188,
205
    AND32mi8  = 189,
206
    AND32mr = 190,
207
    AND32ri = 191,
208
    AND32ri8  = 192,
209
    AND32rm = 193,
210
    AND32rr = 194,
211
    AND32rr_REV = 195,
212
    AND64i32  = 196,
213
    AND64mi32 = 197,
214
    AND64mi8  = 198,
215
    AND64mr = 199,
216
    AND64ri32 = 200,
217
    AND64ri8  = 201,
218
    AND64rm = 202,
219
    AND64rr = 203,
220
    AND64rr_REV = 204,
221
    AND8i8  = 205,
222
    AND8mi  = 206,
223
    AND8mi8 = 207,
224
    AND8mr  = 208,
225
    AND8ri  = 209,
226
    AND8ri8 = 210,
227
    AND8rm  = 211,
228
    AND8rr  = 212,
229
    AND8rr_REV  = 213,
230
    ANDN32rm  = 214,
231
    ANDN32rr  = 215,
232
    ANDN64rm  = 216,
233
    ANDN64rr  = 217,
234
    ANDNPDrm  = 218,
235
    ANDNPDrr  = 219,
236
    ANDNPSrm  = 220,
237
    ANDNPSrr  = 221,
238
    ANDPDrm = 222,
239
    ANDPDrr = 223,
240
    ANDPSrm = 224,
241
    ANDPSrr = 225,
242
    ARPL16mr  = 226,
243
    ARPL16rr  = 227,
244
    AVX2_SETALLONES = 228,
245
    AVX512_512_SET0 = 229,
246
    AVX_SET0  = 230,
247
    BEXTR32rm = 231,
248
    BEXTR32rr = 232,
249
    BEXTR64rm = 233,
250
    BEXTR64rr = 234,
251
    BEXTRI32mi  = 235,
252
    BEXTRI32ri  = 236,
253
    BEXTRI64mi  = 237,
254
    BEXTRI64ri  = 238,
255
    BLCFILL32rm = 239,
256
    BLCFILL32rr = 240,
257
    BLCFILL64rm = 241,
258
    BLCFILL64rr = 242,
259
    BLCI32rm  = 243,
260
    BLCI32rr  = 244,
261
    BLCI64rm  = 245,
262
    BLCI64rr  = 246,
263
    BLCIC32rm = 247,
264
    BLCIC32rr = 248,
265
    BLCIC64rm = 249,
266
    BLCIC64rr = 250,
267
    BLCMSK32rm  = 251,
268
    BLCMSK32rr  = 252,
269
    BLCMSK64rm  = 253,
270
    BLCMSK64rr  = 254,
271
    BLCS32rm  = 255,
272
    BLCS32rr  = 256,
273
    BLCS64rm  = 257,
274
    BLCS64rr  = 258,
275
    BLENDPDrmi  = 259,
276
    BLENDPDrri  = 260,
277
    BLENDPSrmi  = 261,
278
    BLENDPSrri  = 262,
279
    BLENDVPDrm0 = 263,
280
    BLENDVPDrr0 = 264,
281
    BLENDVPSrm0 = 265,
282
    BLENDVPSrr0 = 266,
283
    BLSFILL32rm = 267,
284
    BLSFILL32rr = 268,
285
    BLSFILL64rm = 269,
286
    BLSFILL64rr = 270,
287
    BLSI32rm  = 271,
288
    BLSI32rr  = 272,
289
    BLSI64rm  = 273,
290
    BLSI64rr  = 274,
291
    BLSIC32rm = 275,
292
    BLSIC32rr = 276,
293
    BLSIC64rm = 277,
294
    BLSIC64rr = 278,
295
    BLSMSK32rm  = 279,
296
    BLSMSK32rr  = 280,
297
    BLSMSK64rm  = 281,
298
    BLSMSK64rr  = 282,
299
    BLSR32rm  = 283,
300
    BLSR32rr  = 284,
301
    BLSR64rm  = 285,
302
    BLSR64rr  = 286,
303
    BNDCL32rm = 287,
304
    BNDCL32rr = 288,
305
    BNDCL64rm = 289,
306
    BNDCL64rr = 290,
307
    BNDCN32rm = 291,
308
    BNDCN32rr = 292,
309
    BNDCN64rm = 293,
310
    BNDCN64rr = 294,
311
    BNDCU32rm = 295,
312
    BNDCU32rr = 296,
313
    BNDCU64rm = 297,
314
    BNDCU64rr = 298,
315
    BNDLDXrm  = 299,
316
    BNDMK32rm = 300,
317
    BNDMK64rm = 301,
318
    BNDMOVMR32mr  = 302,
319
    BNDMOVMR64mr  = 303,
320
    BNDMOVMRrr  = 304,
321
    BNDMOVRM32rm  = 305,
322
    BNDMOVRM64rm  = 306,
323
    BNDMOVRMrr  = 307,
324
    BNDSTXmr  = 308,
325
    BOUNDS16rm  = 309,
326
    BOUNDS32rm  = 310,
327
    BSF16rm = 311,
328
    BSF16rr = 312,
329
    BSF32rm = 313,
330
    BSF32rr = 314,
331
    BSF64rm = 315,
332
    BSF64rr = 316,
333
    BSR16rm = 317,
334
    BSR16rr = 318,
335
    BSR32rm = 319,
336
    BSR32rr = 320,
337
    BSR64rm = 321,
338
    BSR64rr = 322,
339
    BSWAP32r  = 323,
340
    BSWAP64r  = 324,
341
    BT16mi8 = 325,
342
    BT16mr  = 326,
343
    BT16ri8 = 327,
344
    BT16rr  = 328,
345
    BT32mi8 = 329,
346
    BT32mr  = 330,
347
    BT32ri8 = 331,
348
    BT32rr  = 332,
349
    BT64mi8 = 333,
350
    BT64mr  = 334,
351
    BT64ri8 = 335,
352
    BT64rr  = 336,
353
    BTC16mi8  = 337,
354
    BTC16mr = 338,
355
    BTC16ri8  = 339,
356
    BTC16rr = 340,
357
    BTC32mi8  = 341,
358
    BTC32mr = 342,
359
    BTC32ri8  = 343,
360
    BTC32rr = 344,
361
    BTC64mi8  = 345,
362
    BTC64mr = 346,
363
    BTC64ri8  = 347,
364
    BTC64rr = 348,
365
    BTR16mi8  = 349,
366
    BTR16mr = 350,
367
    BTR16ri8  = 351,
368
    BTR16rr = 352,
369
    BTR32mi8  = 353,
370
    BTR32mr = 354,
371
    BTR32ri8  = 355,
372
    BTR32rr = 356,
373
    BTR64mi8  = 357,
374
    BTR64mr = 358,
375
    BTR64ri8  = 359,
376
    BTR64rr = 360,
377
    BTS16mi8  = 361,
378
    BTS16mr = 362,
379
    BTS16ri8  = 363,
380
    BTS16rr = 364,
381
    BTS32mi8  = 365,
382
    BTS32mr = 366,
383
    BTS32ri8  = 367,
384
    BTS32rr = 368,
385
    BTS64mi8  = 369,
386
    BTS64mr = 370,
387
    BTS64ri8  = 371,
388
    BTS64rr = 372,
389
    BZHI32rm  = 373,
390
    BZHI32rr  = 374,
391
    BZHI64rm  = 375,
392
    BZHI64rr  = 376,
393
    CALL16m = 377,
394
    CALL16r = 378,
395
    CALL32m = 379,
396
    CALL32r = 380,
397
    CALL64m = 381,
398
    CALL64pcrel32 = 382,
399
    CALL64r = 383,
400
    CALLpcrel16 = 384,
401
    CALLpcrel32 = 385,
402
    CATCHPAD  = 386,
403
    CATCHRET  = 387,
404
    CBW = 388,
405
    CDQ = 389,
406
    CDQE  = 390,
407
    CHS_F = 391,
408
    CHS_Fp32  = 392,
409
    CHS_Fp64  = 393,
410
    CHS_Fp80  = 394,
411
    CLAC  = 395,
412
    CLC = 396,
413
    CLD = 397,
414
    CLEANUPRET  = 398,
415
    CLFLUSH = 399,
416
    CLFLUSHOPT  = 400,
417
    CLGI  = 401,
418
    CLI = 402,
419
    CLTS  = 403,
420
    CLWB  = 404,
421
    CLZEROr = 405,
422
    CMC = 406,
423
    CMOVA16rm = 407,
424
    CMOVA16rr = 408,
425
    CMOVA32rm = 409,
426
    CMOVA32rr = 410,
427
    CMOVA64rm = 411,
428
    CMOVA64rr = 412,
429
    CMOVAE16rm  = 413,
430
    CMOVAE16rr  = 414,
431
    CMOVAE32rm  = 415,
432
    CMOVAE32rr  = 416,
433
    CMOVAE64rm  = 417,
434
    CMOVAE64rr  = 418,
435
    CMOVB16rm = 419,
436
    CMOVB16rr = 420,
437
    CMOVB32rm = 421,
438
    CMOVB32rr = 422,
439
    CMOVB64rm = 423,
440
    CMOVB64rr = 424,
441
    CMOVBE16rm  = 425,
442
    CMOVBE16rr  = 426,
443
    CMOVBE32rm  = 427,
444
    CMOVBE32rr  = 428,
445
    CMOVBE64rm  = 429,
446
    CMOVBE64rr  = 430,
447
    CMOVBE_F  = 431,
448
    CMOVBE_Fp32 = 432,
449
    CMOVBE_Fp64 = 433,
450
    CMOVBE_Fp80 = 434,
451
    CMOVB_F = 435,
452
    CMOVB_Fp32  = 436,
453
    CMOVB_Fp64  = 437,
454
    CMOVB_Fp80  = 438,
455
    CMOVE16rm = 439,
456
    CMOVE16rr = 440,
457
    CMOVE32rm = 441,
458
    CMOVE32rr = 442,
459
    CMOVE64rm = 443,
460
    CMOVE64rr = 444,
461
    CMOVE_F = 445,
462
    CMOVE_Fp32  = 446,
463
    CMOVE_Fp64  = 447,
464
    CMOVE_Fp80  = 448,
465
    CMOVG16rm = 449,
466
    CMOVG16rr = 450,
467
    CMOVG32rm = 451,
468
    CMOVG32rr = 452,
469
    CMOVG64rm = 453,
470
    CMOVG64rr = 454,
471
    CMOVGE16rm  = 455,
472
    CMOVGE16rr  = 456,
473
    CMOVGE32rm  = 457,
474
    CMOVGE32rr  = 458,
475
    CMOVGE64rm  = 459,
476
    CMOVGE64rr  = 460,
477
    CMOVL16rm = 461,
478
    CMOVL16rr = 462,
479
    CMOVL32rm = 463,
480
    CMOVL32rr = 464,
481
    CMOVL64rm = 465,
482
    CMOVL64rr = 466,
483
    CMOVLE16rm  = 467,
484
    CMOVLE16rr  = 468,
485
    CMOVLE32rm  = 469,
486
    CMOVLE32rr  = 470,
487
    CMOVLE64rm  = 471,
488
    CMOVLE64rr  = 472,
489
    CMOVNBE_F = 473,
490
    CMOVNBE_Fp32  = 474,
491
    CMOVNBE_Fp64  = 475,
492
    CMOVNBE_Fp80  = 476,
493
    CMOVNB_F  = 477,
494
    CMOVNB_Fp32 = 478,
495
    CMOVNB_Fp64 = 479,
496
    CMOVNB_Fp80 = 480,
497
    CMOVNE16rm  = 481,
498
    CMOVNE16rr  = 482,
499
    CMOVNE32rm  = 483,
500
    CMOVNE32rr  = 484,
501
    CMOVNE64rm  = 485,
502
    CMOVNE64rr  = 486,
503
    CMOVNE_F  = 487,
504
    CMOVNE_Fp32 = 488,
505
    CMOVNE_Fp64 = 489,
506
    CMOVNE_Fp80 = 490,
507
    CMOVNO16rm  = 491,
508
    CMOVNO16rr  = 492,
509
    CMOVNO32rm  = 493,
510
    CMOVNO32rr  = 494,
511
    CMOVNO64rm  = 495,
512
    CMOVNO64rr  = 496,
513
    CMOVNP16rm  = 497,
514
    CMOVNP16rr  = 498,
515
    CMOVNP32rm  = 499,
516
    CMOVNP32rr  = 500,
517
    CMOVNP64rm  = 501,
518
    CMOVNP64rr  = 502,
519
    CMOVNP_F  = 503,
520
    CMOVNP_Fp32 = 504,
521
    CMOVNP_Fp64 = 505,
522
    CMOVNP_Fp80 = 506,
523
    CMOVNS16rm  = 507,
524
    CMOVNS16rr  = 508,
525
    CMOVNS32rm  = 509,
526
    CMOVNS32rr  = 510,
527
    CMOVNS64rm  = 511,
528
    CMOVNS64rr  = 512,
529
    CMOVO16rm = 513,
530
    CMOVO16rr = 514,
531
    CMOVO32rm = 515,
532
    CMOVO32rr = 516,
533
    CMOVO64rm = 517,
534
    CMOVO64rr = 518,
535
    CMOVP16rm = 519,
536
    CMOVP16rr = 520,
537
    CMOVP32rm = 521,
538
    CMOVP32rr = 522,
539
    CMOVP64rm = 523,
540
    CMOVP64rr = 524,
541
    CMOVP_F = 525,
542
    CMOVP_Fp32  = 526,
543
    CMOVP_Fp64  = 527,
544
    CMOVP_Fp80  = 528,
545
    CMOVS16rm = 529,
546
    CMOVS16rr = 530,
547
    CMOVS32rm = 531,
548
    CMOVS32rr = 532,
549
    CMOVS64rm = 533,
550
    CMOVS64rr = 534,
551
    CMOV_FR128  = 535,
552
    CMOV_FR32 = 536,
553
    CMOV_FR64 = 537,
554
    CMOV_GR16 = 538,
555
    CMOV_GR32 = 539,
556
    CMOV_GR8  = 540,
557
    CMOV_RFP32  = 541,
558
    CMOV_RFP64  = 542,
559
    CMOV_RFP80  = 543,
560
    CMOV_V16F32 = 544,
561
    CMOV_V16I1  = 545,
562
    CMOV_V2F64  = 546,
563
    CMOV_V2I64  = 547,
564
    CMOV_V32I1  = 548,
565
    CMOV_V4F32  = 549,
566
    CMOV_V4F64  = 550,
567
    CMOV_V4I64  = 551,
568
    CMOV_V64I1  = 552,
569
    CMOV_V8F32  = 553,
570
    CMOV_V8F64  = 554,
571
    CMOV_V8I1 = 555,
572
    CMOV_V8I64  = 556,
573
    CMP16i16  = 557,
574
    CMP16mi = 558,
575
    CMP16mi8  = 559,
576
    CMP16mr = 560,
577
    CMP16ri = 561,
578
    CMP16ri8  = 562,
579
    CMP16rm = 563,
580
    CMP16rr = 564,
581
    CMP16rr_REV = 565,
582
    CMP32i32  = 566,
583
    CMP32mi = 567,
584
    CMP32mi8  = 568,
585
    CMP32mr = 569,
586
    CMP32ri = 570,
587
    CMP32ri8  = 571,
588
    CMP32rm = 572,
589
    CMP32rr = 573,
590
    CMP32rr_REV = 574,
591
    CMP64i32  = 575,
592
    CMP64mi32 = 576,
593
    CMP64mi8  = 577,
594
    CMP64mr = 578,
595
    CMP64ri32 = 579,
596
    CMP64ri8  = 580,
597
    CMP64rm = 581,
598
    CMP64rr = 582,
599
    CMP64rr_REV = 583,
600
    CMP8i8  = 584,
601
    CMP8mi  = 585,
602
    CMP8mi8 = 586,
603
    CMP8mr  = 587,
604
    CMP8ri  = 588,
605
    CMP8ri8 = 589,
606
    CMP8rm  = 590,
607
    CMP8rr  = 591,
608
    CMP8rr_REV  = 592,
609
    CMPPDrmi  = 593,
610
    CMPPDrmi_alt  = 594,
611
    CMPPDrri  = 595,
612
    CMPPDrri_alt  = 596,
613
    CMPPSrmi  = 597,
614
    CMPPSrmi_alt  = 598,
615
    CMPPSrri  = 599,
616
    CMPPSrri_alt  = 600,
617
    CMPSB = 601,
618
    CMPSDrm = 602,
619
    CMPSDrm_alt = 603,
620
    CMPSDrr = 604,
621
    CMPSDrr_alt = 605,
622
    CMPSL = 606,
623
    CMPSQ = 607,
624
    CMPSSrm = 608,
625
    CMPSSrm_alt = 609,
626
    CMPSSrr = 610,
627
    CMPSSrr_alt = 611,
628
    CMPSW = 612,
629
    CMPXCHG16B  = 613,
630
    CMPXCHG16rm = 614,
631
    CMPXCHG16rr = 615,
632
    CMPXCHG32rm = 616,
633
    CMPXCHG32rr = 617,
634
    CMPXCHG64rm = 618,
635
    CMPXCHG64rr = 619,
636
    CMPXCHG8B = 620,
637
    CMPXCHG8rm  = 621,
638
    CMPXCHG8rr  = 622,
639
    COMISDrm  = 623,
640
    COMISDrr  = 624,
641
    COMISSrm  = 625,
642
    COMISSrr  = 626,
643
    COMP_FST0r  = 627,
644
    COM_FIPr  = 628,
645
    COM_FIr = 629,
646
    COM_FST0r = 630,
647
    COS_F = 631,
648
    COS_Fp32  = 632,
649
    COS_Fp64  = 633,
650
    COS_Fp80  = 634,
651
    CPUID = 635,
652
    CQO = 636,
653
    CRC32r32m16 = 637,
654
    CRC32r32m32 = 638,
655
    CRC32r32m8  = 639,
656
    CRC32r32r16 = 640,
657
    CRC32r32r32 = 641,
658
    CRC32r32r8  = 642,
659
    CRC32r64m64 = 643,
660
    CRC32r64m8  = 644,
661
    CRC32r64r64 = 645,
662
    CRC32r64r8  = 646,
663
    CS_PREFIX = 647,
664
    CVTDQ2PDrm  = 648,
665
    CVTDQ2PDrr  = 649,
666
    CVTDQ2PSrm  = 650,
667
    CVTDQ2PSrr  = 651,
668
    CVTPD2DQrm  = 652,
669
    CVTPD2DQrr  = 653,
670
    CVTPD2PSrm  = 654,
671
    CVTPD2PSrr  = 655,
672
    CVTPS2DQrm  = 656,
673
    CVTPS2DQrr  = 657,
674
    CVTPS2PDrm  = 658,
675
    CVTPS2PDrr  = 659,
676
    CVTSD2SI64rm  = 660,
677
    CVTSD2SI64rr  = 661,
678
    CVTSD2SIrm  = 662,
679
    CVTSD2SIrr  = 663,
680
    CVTSD2SSrm  = 664,
681
    CVTSD2SSrr  = 665,
682
    CVTSI2SD64rm  = 666,
683
    CVTSI2SD64rr  = 667,
684
    CVTSI2SDrm  = 668,
685
    CVTSI2SDrr  = 669,
686
    CVTSI2SS64rm  = 670,
687
    CVTSI2SS64rr  = 671,
688
    CVTSI2SSrm  = 672,
689
    CVTSI2SSrr  = 673,
690
    CVTSS2SDrm  = 674,
691
    CVTSS2SDrr  = 675,
692
    CVTSS2SI64rm  = 676,
693
    CVTSS2SI64rr  = 677,
694
    CVTSS2SIrm  = 678,
695
    CVTSS2SIrr  = 679,
696
    CVTTPD2DQrm = 680,
697
    CVTTPD2DQrr = 681,
698
    CVTTPS2DQrm = 682,
699
    CVTTPS2DQrr = 683,
700
    CVTTSD2SI64rm = 684,
701
    CVTTSD2SI64rr = 685,
702
    CVTTSD2SIrm = 686,
703
    CVTTSD2SIrr = 687,
704
    CVTTSS2SI64rm = 688,
705
    CVTTSS2SI64rr = 689,
706
    CVTTSS2SIrm = 690,
707
    CVTTSS2SIrr = 691,
708
    CWD = 692,
709
    CWDE  = 693,
710
    DAA = 694,
711
    DAS = 695,
712
    DATA16_PREFIX = 696,
713
    DEC16m  = 697,
714
    DEC16r  = 698,
715
    DEC16r_alt  = 699,
716
    DEC32m  = 700,
717
    DEC32r  = 701,
718
    DEC32r_alt  = 702,
719
    DEC64m  = 703,
720
    DEC64r  = 704,
721
    DEC8m = 705,
722
    DEC8r = 706,
723
    DIV16m  = 707,
724
    DIV16r  = 708,
725
    DIV32m  = 709,
726
    DIV32r  = 710,
727
    DIV64m  = 711,
728
    DIV64r  = 712,
729
    DIV8m = 713,
730
    DIV8r = 714,
731
    DIVPDrm = 715,
732
    DIVPDrr = 716,
733
    DIVPSrm = 717,
734
    DIVPSrr = 718,
735
    DIVR_F32m = 719,
736
    DIVR_F64m = 720,
737
    DIVR_FI16m  = 721,
738
    DIVR_FI32m  = 722,
739
    DIVR_FPrST0 = 723,
740
    DIVR_FST0r  = 724,
741
    DIVR_Fp32m  = 725,
742
    DIVR_Fp64m  = 726,
743
    DIVR_Fp64m32  = 727,
744
    DIVR_Fp80m32  = 728,
745
    DIVR_Fp80m64  = 729,
746
    DIVR_FpI16m32 = 730,
747
    DIVR_FpI16m64 = 731,
748
    DIVR_FpI16m80 = 732,
749
    DIVR_FpI32m32 = 733,
750
    DIVR_FpI32m64 = 734,
751
    DIVR_FpI32m80 = 735,
752
    DIVR_FrST0  = 736,
753
    DIVSDrm = 737,
754
    DIVSDrm_Int = 738,
755
    DIVSDrr = 739,
756
    DIVSDrr_Int = 740,
757
    DIVSSrm = 741,
758
    DIVSSrm_Int = 742,
759
    DIVSSrr = 743,
760
    DIVSSrr_Int = 744,
761
    DIV_F32m  = 745,
762
    DIV_F64m  = 746,
763
    DIV_FI16m = 747,
764
    DIV_FI32m = 748,
765
    DIV_FPrST0  = 749,
766
    DIV_FST0r = 750,
767
    DIV_Fp32  = 751,
768
    DIV_Fp32m = 752,
769
    DIV_Fp64  = 753,
770
    DIV_Fp64m = 754,
771
    DIV_Fp64m32 = 755,
772
    DIV_Fp80  = 756,
773
    DIV_Fp80m32 = 757,
774
    DIV_Fp80m64 = 758,
775
    DIV_FpI16m32  = 759,
776
    DIV_FpI16m64  = 760,
777
    DIV_FpI16m80  = 761,
778
    DIV_FpI32m32  = 762,
779
    DIV_FpI32m64  = 763,
780
    DIV_FpI32m80  = 764,
781
    DIV_FrST0 = 765,
782
    DPPDrmi = 766,
783
    DPPDrri = 767,
784
    DPPSrmi = 768,
785
    DPPSrri = 769,
786
    DS_PREFIX = 770,
787
    EH_RESTORE  = 771,
788
    EH_RETURN = 772,
789
    EH_RETURN64 = 773,
790
    EH_SjLj_LongJmp32 = 774,
791
    EH_SjLj_LongJmp64 = 775,
792
    EH_SjLj_SetJmp32  = 776,
793
    EH_SjLj_SetJmp64  = 777,
794
    EH_SjLj_Setup = 778,
795
    ENCLS = 779,
796
    ENCLU = 780,
797
    ENTER = 781,
798
    ES_PREFIX = 782,
799
    EXTRACTPSmr = 783,
800
    EXTRACTPSrr = 784,
801
    EXTRQ = 785,
802
    EXTRQI  = 786,
803
    F2XM1 = 787,
804
    FARCALL16i  = 788,
805
    FARCALL16m  = 789,
806
    FARCALL32i  = 790,
807
    FARCALL32m  = 791,
808
    FARCALL64 = 792,
809
    FARJMP16i = 793,
810
    FARJMP16m = 794,
811
    FARJMP32i = 795,
812
    FARJMP32m = 796,
813
    FARJMP64  = 797,
814
    FBLDm = 798,
815
    FBSTPm  = 799,
816
    FCOM32m = 800,
817
    FCOM64m = 801,
818
    FCOMP32m  = 802,
819
    FCOMP64m  = 803,
820
    FCOMPP  = 804,
821
    FDECSTP = 805,
822
    FEMMS = 806,
823
    FFREE = 807,
824
    FICOM16m  = 808,
825
    FICOM32m  = 809,
826
    FICOMP16m = 810,
827
    FICOMP32m = 811,
828
    FINCSTP = 812,
829
    FLDCW16m  = 813,
830
    FLDENVm = 814,
831
    FLDL2E  = 815,
832
    FLDL2T  = 816,
833
    FLDLG2  = 817,
834
    FLDLN2  = 818,
835
    FLDPI = 819,
836
    FNCLEX  = 820,
837
    FNINIT  = 821,
838
    FNOP  = 822,
839
    FNSTCW16m = 823,
840
    FNSTSW16r = 824,
841
    FNSTSWm = 825,
842
    FP32_TO_INT16_IN_MEM  = 826,
843
    FP32_TO_INT32_IN_MEM  = 827,
844
    FP32_TO_INT64_IN_MEM  = 828,
845
    FP64_TO_INT16_IN_MEM  = 829,
846
    FP64_TO_INT32_IN_MEM  = 830,
847
    FP64_TO_INT64_IN_MEM  = 831,
848
    FP80_TO_INT16_IN_MEM  = 832,
849
    FP80_TO_INT32_IN_MEM  = 833,
850
    FP80_TO_INT64_IN_MEM  = 834,
851
    FPATAN  = 835,
852
    FPREM = 836,
853
    FPREM1  = 837,
854
    FPTAN = 838,
855
    FP_FFREEP = 839,
856
    FRNDINT = 840,
857
    FRSTORm = 841,
858
    FSAVEm  = 842,
859
    FSCALE  = 843,
860
    FSETPM  = 844,
861
    FSINCOS = 845,
862
    FSTENVm = 846,
863
    FS_PREFIX = 847,
864
    FXAM  = 848,
865
    FXRSTOR = 849,
866
    FXRSTOR64 = 850,
867
    FXSAVE  = 851,
868
    FXSAVE64  = 852,
869
    FXTRACT = 853,
870
    FYL2X = 854,
871
    FYL2XP1 = 855,
872
    FsANDNPDrm  = 856,
873
    FsANDNPDrr  = 857,
874
    FsANDNPSrm  = 858,
875
    FsANDNPSrr  = 859,
876
    FsANDPDrm = 860,
877
    FsANDPDrr = 861,
878
    FsANDPSrm = 862,
879
    FsANDPSrr = 863,
880
    FsFLD0SD  = 864,
881
    FsFLD0SS  = 865,
882
    FsMOVAPDrm  = 866,
883
    FsMOVAPSrm  = 867,
884
    FsORPDrm  = 868,
885
    FsORPDrr  = 869,
886
    FsORPSrm  = 870,
887
    FsORPSrr  = 871,
888
    FsVMOVAPDrm = 872,
889
    FsVMOVAPSrm = 873,
890
    FsXORPDrm = 874,
891
    FsXORPDrr = 875,
892
    FsXORPSrm = 876,
893
    FsXORPSrr = 877,
894
    FvANDNPDrm  = 878,
895
    FvANDNPDrr  = 879,
896
    FvANDNPSrm  = 880,
897
    FvANDNPSrr  = 881,
898
    FvANDPDrm = 882,
899
    FvANDPDrr = 883,
900
    FvANDPSrm = 884,
901
    FvANDPSrr = 885,
902
    FvORPDrm  = 886,
903
    FvORPDrr  = 887,
904
    FvORPSrm  = 888,
905
    FvORPSrr  = 889,
906
    FvXORPDrm = 890,
907
    FvXORPDrr = 891,
908
    FvXORPSrm = 892,
909
    FvXORPSrr = 893,
910
    GETSEC  = 894,
911
    GS_PREFIX = 895,
912
    HADDPDrm  = 896,
913
    HADDPDrr  = 897,
914
    HADDPSrm  = 898,
915
    HADDPSrr  = 899,
916
    HLT = 900,
917
    HSUBPDrm  = 901,
918
    HSUBPDrr  = 902,
919
    HSUBPSrm  = 903,
920
    HSUBPSrr  = 904,
921
    IDIV16m = 905,
922
    IDIV16r = 906,
923
    IDIV32m = 907,
924
    IDIV32r = 908,
925
    IDIV64m = 909,
926
    IDIV64r = 910,
927
    IDIV8m  = 911,
928
    IDIV8r  = 912,
929
    ILD_F16m  = 913,
930
    ILD_F32m  = 914,
931
    ILD_F64m  = 915,
932
    ILD_Fp16m32 = 916,
933
    ILD_Fp16m64 = 917,
934
    ILD_Fp16m80 = 918,
935
    ILD_Fp32m32 = 919,
936
    ILD_Fp32m64 = 920,
937
    ILD_Fp32m80 = 921,
938
    ILD_Fp64m32 = 922,
939
    ILD_Fp64m64 = 923,
940
    ILD_Fp64m80 = 924,
941
    IMUL16m = 925,
942
    IMUL16r = 926,
943
    IMUL16rm  = 927,
944
    IMUL16rmi = 928,
945
    IMUL16rmi8  = 929,
946
    IMUL16rr  = 930,
947
    IMUL16rri = 931,
948
    IMUL16rri8  = 932,
949
    IMUL32m = 933,
950
    IMUL32r = 934,
951
    IMUL32rm  = 935,
952
    IMUL32rmi = 936,
953
    IMUL32rmi8  = 937,
954
    IMUL32rr  = 938,
955
    IMUL32rri = 939,
956
    IMUL32rri8  = 940,
957
    IMUL64m = 941,
958
    IMUL64r = 942,
959
    IMUL64rm  = 943,
960
    IMUL64rmi32 = 944,
961
    IMUL64rmi8  = 945,
962
    IMUL64rr  = 946,
963
    IMUL64rri32 = 947,
964
    IMUL64rri8  = 948,
965
    IMUL8m  = 949,
966
    IMUL8r  = 950,
967
    IN16ri  = 951,
968
    IN16rr  = 952,
969
    IN32ri  = 953,
970
    IN32rr  = 954,
971
    IN8ri = 955,
972
    IN8rr = 956,
973
    INC16m  = 957,
974
    INC16r  = 958,
975
    INC16r_alt  = 959,
976
    INC32m  = 960,
977
    INC32r  = 961,
978
    INC32r_alt  = 962,
979
    INC64m  = 963,
980
    INC64r  = 964,
981
    INC8m = 965,
982
    INC8r = 966,
983
    INSB  = 967,
984
    INSERTPSrm  = 968,
985
    INSERTPSrr  = 969,
986
    INSERTQ = 970,
987
    INSERTQI  = 971,
988
    INSL  = 972,
989
    INSW  = 973,
990
    INT = 974,
991
    INT1  = 975,
992
    INT3  = 976,
993
    INTO  = 977,
994
    INVD  = 978,
995
    INVEPT32  = 979,
996
    INVEPT64  = 980,
997
    INVLPG  = 981,
998
    INVLPGA32 = 982,
999
    INVLPGA64 = 983,
1000
    INVPCID32 = 984,
1001
    INVPCID64 = 985,
1002
    INVVPID32 = 986,
1003
    INVVPID64 = 987,
1004
    IRET  = 988,
1005
    IRET16  = 989,
1006
    IRET32  = 990,
1007
    IRET64  = 991,
1008
    ISTT_FP16m  = 992,
1009
    ISTT_FP32m  = 993,
1010
    ISTT_FP64m  = 994,
1011
    ISTT_Fp16m32  = 995,
1012
    ISTT_Fp16m64  = 996,
1013
    ISTT_Fp16m80  = 997,
1014
    ISTT_Fp32m32  = 998,
1015
    ISTT_Fp32m64  = 999,
1016
    ISTT_Fp32m80  = 1000,
1017
    ISTT_Fp64m32  = 1001,
1018
    ISTT_Fp64m64  = 1002,
1019
    ISTT_Fp64m80  = 1003,
1020
    IST_F16m  = 1004,
1021
    IST_F32m  = 1005,
1022
    IST_FP16m = 1006,
1023
    IST_FP32m = 1007,
1024
    IST_FP64m = 1008,
1025
    IST_Fp16m32 = 1009,
1026
    IST_Fp16m64 = 1010,
1027
    IST_Fp16m80 = 1011,
1028
    IST_Fp32m32 = 1012,
1029
    IST_Fp32m64 = 1013,
1030
    IST_Fp32m80 = 1014,
1031
    IST_Fp64m32 = 1015,
1032
    IST_Fp64m64 = 1016,
1033
    IST_Fp64m80 = 1017,
1034
    Int_CMPSDrm = 1018,
1035
    Int_CMPSDrr = 1019,
1036
    Int_CMPSSrm = 1020,
1037
    Int_CMPSSrr = 1021,
1038
    Int_COMISDrm  = 1022,
1039
    Int_COMISDrr  = 1023,
1040
    Int_COMISSrm  = 1024,
1041
    Int_COMISSrr  = 1025,
1042
    Int_CVTSD2SSrm  = 1026,
1043
    Int_CVTSD2SSrr  = 1027,
1044
    Int_CVTSI2SD64rm  = 1028,
1045
    Int_CVTSI2SD64rr  = 1029,
1046
    Int_CVTSI2SDrm  = 1030,
1047
    Int_CVTSI2SDrr  = 1031,
1048
    Int_CVTSI2SS64rm  = 1032,
1049
    Int_CVTSI2SS64rr  = 1033,
1050
    Int_CVTSI2SSrm  = 1034,
1051
    Int_CVTSI2SSrr  = 1035,
1052
    Int_CVTSS2SDrm  = 1036,
1053
    Int_CVTSS2SDrr  = 1037,
1054
    Int_CVTTSD2SI64rm = 1038,
1055
    Int_CVTTSD2SI64rr = 1039,
1056
    Int_CVTTSD2SIrm = 1040,
1057
    Int_CVTTSD2SIrr = 1041,
1058
    Int_CVTTSS2SI64rm = 1042,
1059
    Int_CVTTSS2SI64rr = 1043,
1060
    Int_CVTTSS2SIrm = 1044,
1061
    Int_CVTTSS2SIrr = 1045,
1062
    Int_MemBarrier  = 1046,
1063
    Int_UCOMISDrm = 1047,
1064
    Int_UCOMISDrr = 1048,
1065
    Int_UCOMISSrm = 1049,
1066
    Int_UCOMISSrr = 1050,
1067
    Int_VCMPSDrm  = 1051,
1068
    Int_VCMPSDrr  = 1052,
1069
    Int_VCMPSSrm  = 1053,
1070
    Int_VCMPSSrr  = 1054,
1071
    Int_VCOMISDZrm  = 1055,
1072
    Int_VCOMISDZrr  = 1056,
1073
    Int_VCOMISDrm = 1057,
1074
    Int_VCOMISDrr = 1058,
1075
    Int_VCOMISSZrm  = 1059,
1076
    Int_VCOMISSZrr  = 1060,
1077
    Int_VCOMISSrm = 1061,
1078
    Int_VCOMISSrr = 1062,
1079
    Int_VCVTSD2SSrm = 1063,
1080
    Int_VCVTSD2SSrr = 1064,
1081
    Int_VCVTSI2SD64Zrm  = 1065,
1082
    Int_VCVTSI2SD64Zrr  = 1066,
1083
    Int_VCVTSI2SD64rm = 1067,
1084
    Int_VCVTSI2SD64rr = 1068,
1085
    Int_VCVTSI2SDZrm  = 1069,
1086
    Int_VCVTSI2SDZrr  = 1070,
1087
    Int_VCVTSI2SDrm = 1071,
1088
    Int_VCVTSI2SDrr = 1072,
1089
    Int_VCVTSI2SS64Zrm  = 1073,
1090
    Int_VCVTSI2SS64Zrr  = 1074,
1091
    Int_VCVTSI2SS64rm = 1075,
1092
    Int_VCVTSI2SS64rr = 1076,
1093
    Int_VCVTSI2SSZrm  = 1077,
1094
    Int_VCVTSI2SSZrr  = 1078,
1095
    Int_VCVTSI2SSrm = 1079,
1096
    Int_VCVTSI2SSrr = 1080,
1097
    Int_VCVTSS2SDrm = 1081,
1098
    Int_VCVTSS2SDrr = 1082,
1099
    Int_VCVTTSD2SI64rm  = 1083,
1100
    Int_VCVTTSD2SI64rr  = 1084,
1101
    Int_VCVTTSD2SIrm  = 1085,
1102
    Int_VCVTTSD2SIrr  = 1086,
1103
    Int_VCVTTSS2SI64rm  = 1087,
1104
    Int_VCVTTSS2SI64rr  = 1088,
1105
    Int_VCVTTSS2SIrm  = 1089,
1106
    Int_VCVTTSS2SIrr  = 1090,
1107
    Int_VCVTUSI2SDZrm = 1091,
1108
    Int_VCVTUSI2SDZrr = 1092,
1109
    Int_VUCOMISDZrm = 1093,
1110
    Int_VUCOMISDZrr = 1094,
1111
    Int_VUCOMISDrm  = 1095,
1112
    Int_VUCOMISDrr  = 1096,
1113
    Int_VUCOMISSZrm = 1097,
1114
    Int_VUCOMISSZrr = 1098,
1115
    Int_VUCOMISSrm  = 1099,
1116
    Int_VUCOMISSrr  = 1100,
1117
    JAE_1 = 1101,
1118
    JAE_2 = 1102,
1119
    JAE_4 = 1103,
1120
    JA_1  = 1104,
1121
    JA_2  = 1105,
1122
    JA_4  = 1106,
1123
    JBE_1 = 1107,
1124
    JBE_2 = 1108,
1125
    JBE_4 = 1109,
1126
    JB_1  = 1110,
1127
    JB_2  = 1111,
1128
    JB_4  = 1112,
1129
    JCXZ  = 1113,
1130
    JECXZ = 1114,
1131
    JE_1  = 1115,
1132
    JE_2  = 1116,
1133
    JE_4  = 1117,
1134
    JGE_1 = 1118,
1135
    JGE_2 = 1119,
1136
    JGE_4 = 1120,
1137
    JG_1  = 1121,
1138
    JG_2  = 1122,
1139
    JG_4  = 1123,
1140
    JLE_1 = 1124,
1141
    JLE_2 = 1125,
1142
    JLE_4 = 1126,
1143
    JL_1  = 1127,
1144
    JL_2  = 1128,
1145
    JL_4  = 1129,
1146
    JMP16m  = 1130,
1147
    JMP16r  = 1131,
1148
    JMP32m  = 1132,
1149
    JMP32r  = 1133,
1150
    JMP64m  = 1134,
1151
    JMP64r  = 1135,
1152
    JMP_1 = 1136,
1153
    JMP_2 = 1137,
1154
    JMP_4 = 1138,
1155
    JNE_1 = 1139,
1156
    JNE_2 = 1140,
1157
    JNE_4 = 1141,
1158
    JNO_1 = 1142,
1159
    JNO_2 = 1143,
1160
    JNO_4 = 1144,
1161
    JNP_1 = 1145,
1162
    JNP_2 = 1146,
1163
    JNP_4 = 1147,
1164
    JNS_1 = 1148,
1165
    JNS_2 = 1149,
1166
    JNS_4 = 1150,
1167
    JO_1  = 1151,
1168
    JO_2  = 1152,
1169
    JO_4  = 1153,
1170
    JP_1  = 1154,
1171
    JP_2  = 1155,
1172
    JP_4  = 1156,
1173
    JRCXZ = 1157,
1174
    JS_1  = 1158,
1175
    JS_2  = 1159,
1176
    JS_4  = 1160,
1177
    KADDBrr = 1161,
1178
    KADDDrr = 1162,
1179
    KADDQrr = 1163,
1180
    KADDWrr = 1164,
1181
    KANDBrr = 1165,
1182
    KANDDrr = 1166,
1183
    KANDNBrr  = 1167,
1184
    KANDNDrr  = 1168,
1185
    KANDNQrr  = 1169,
1186
    KANDNWrr  = 1170,
1187
    KANDQrr = 1171,
1188
    KANDWrr = 1172,
1189
    KMOVBkk = 1173,
1190
    KMOVBkm = 1174,
1191
    KMOVBkr = 1175,
1192
    KMOVBmk = 1176,
1193
    KMOVBrk = 1177,
1194
    KMOVDkk = 1178,
1195
    KMOVDkm = 1179,
1196
    KMOVDkr = 1180,
1197
    KMOVDmk = 1181,
1198
    KMOVDrk = 1182,
1199
    KMOVQkk = 1183,
1200
    KMOVQkm = 1184,
1201
    KMOVQkr = 1185,
1202
    KMOVQmk = 1186,
1203
    KMOVQrk = 1187,
1204
    KMOVWkk = 1188,
1205
    KMOVWkm = 1189,
1206
    KMOVWkr = 1190,
1207
    KMOVWmk = 1191,
1208
    KMOVWrk = 1192,
1209
    KNOTBrr = 1193,
1210
    KNOTDrr = 1194,
1211
    KNOTQrr = 1195,
1212
    KNOTWrr = 1196,
1213
    KORBrr  = 1197,
1214
    KORDrr  = 1198,
1215
    KORQrr  = 1199,
1216
    KORTESTBrr  = 1200,
1217
    KORTESTDrr  = 1201,
1218
    KORTESTQrr  = 1202,
1219
    KORTESTWrr  = 1203,
1220
    KORWrr  = 1204,
1221
    KSET0B  = 1205,
1222
    KSET0D  = 1206,
1223
    KSET0Q  = 1207,
1224
    KSET0W  = 1208,
1225
    KSET1B  = 1209,
1226
    KSET1D  = 1210,
1227
    KSET1Q  = 1211,
1228
    KSET1W  = 1212,
1229
    KSHIFTLBri  = 1213,
1230
    KSHIFTLDri  = 1214,
1231
    KSHIFTLQri  = 1215,
1232
    KSHIFTLWri  = 1216,
1233
    KSHIFTRBri  = 1217,
1234
    KSHIFTRDri  = 1218,
1235
    KSHIFTRQri  = 1219,
1236
    KSHIFTRWri  = 1220,
1237
    KTESTBrr  = 1221,
1238
    KTESTDrr  = 1222,
1239
    KTESTQrr  = 1223,
1240
    KTESTWrr  = 1224,
1241
    KUNPCKBWrr  = 1225,
1242
    KUNPCKDQrr  = 1226,
1243
    KUNPCKWDrr  = 1227,
1244
    KXNORBrr  = 1228,
1245
    KXNORDrr  = 1229,
1246
    KXNORQrr  = 1230,
1247
    KXNORWrr  = 1231,
1248
    KXORBrr = 1232,
1249
    KXORDrr = 1233,
1250
    KXORQrr = 1234,
1251
    KXORWrr = 1235,
1252
    LAHF  = 1236,
1253
    LAR16rm = 1237,
1254
    LAR16rr = 1238,
1255
    LAR32rm = 1239,
1256
    LAR32rr = 1240,
1257
    LAR64rm = 1241,
1258
    LAR64rr = 1242,
1259
    LCMPXCHG16  = 1243,
1260
    LCMPXCHG16B = 1244,
1261
    LCMPXCHG32  = 1245,
1262
    LCMPXCHG64  = 1246,
1263
    LCMPXCHG8 = 1247,
1264
    LCMPXCHG8B  = 1248,
1265
    LDDQUrm = 1249,
1266
    LDMXCSR = 1250,
1267
    LDS16rm = 1251,
1268
    LDS32rm = 1252,
1269
    LD_F0 = 1253,
1270
    LD_F1 = 1254,
1271
    LD_F32m = 1255,
1272
    LD_F64m = 1256,
1273
    LD_F80m = 1257,
1274
    LD_Fp032  = 1258,
1275
    LD_Fp064  = 1259,
1276
    LD_Fp080  = 1260,
1277
    LD_Fp132  = 1261,
1278
    LD_Fp164  = 1262,
1279
    LD_Fp180  = 1263,
1280
    LD_Fp32m  = 1264,
1281
    LD_Fp32m64  = 1265,
1282
    LD_Fp32m80  = 1266,
1283
    LD_Fp64m  = 1267,
1284
    LD_Fp64m80  = 1268,
1285
    LD_Fp80m  = 1269,
1286
    LD_Frr  = 1270,
1287
    LEA16r  = 1271,
1288
    LEA32r  = 1272,
1289
    LEA64_32r = 1273,
1290
    LEA64r  = 1274,
1291
    LEAVE = 1275,
1292
    LEAVE64 = 1276,
1293
    LES16rm = 1277,
1294
    LES32rm = 1278,
1295
    LFENCE  = 1279,
1296
    LFS16rm = 1280,
1297
    LFS32rm = 1281,
1298
    LFS64rm = 1282,
1299
    LGDT16m = 1283,
1300
    LGDT32m = 1284,
1301
    LGDT64m = 1285,
1302
    LGS16rm = 1286,
1303
    LGS32rm = 1287,
1304
    LGS64rm = 1288,
1305
    LIDT16m = 1289,
1306
    LIDT32m = 1290,
1307
    LIDT64m = 1291,
1308
    LLDT16m = 1292,
1309
    LLDT16r = 1293,
1310
    LMSW16m = 1294,
1311
    LMSW16r = 1295,
1312
    LOCK_ADD16mi  = 1296,
1313
    LOCK_ADD16mi8 = 1297,
1314
    LOCK_ADD16mr  = 1298,
1315
    LOCK_ADD32mi  = 1299,
1316
    LOCK_ADD32mi8 = 1300,
1317
    LOCK_ADD32mr  = 1301,
1318
    LOCK_ADD64mi32  = 1302,
1319
    LOCK_ADD64mi8 = 1303,
1320
    LOCK_ADD64mr  = 1304,
1321
    LOCK_ADD8mi = 1305,
1322
    LOCK_ADD8mr = 1306,
1323
    LOCK_AND16mi  = 1307,
1324
    LOCK_AND16mi8 = 1308,
1325
    LOCK_AND16mr  = 1309,
1326
    LOCK_AND32mi  = 1310,
1327
    LOCK_AND32mi8 = 1311,
1328
    LOCK_AND32mr  = 1312,
1329
    LOCK_AND64mi32  = 1313,
1330
    LOCK_AND64mi8 = 1314,
1331
    LOCK_AND64mr  = 1315,
1332
    LOCK_AND8mi = 1316,
1333
    LOCK_AND8mr = 1317,
1334
    LOCK_DEC16m = 1318,
1335
    LOCK_DEC32m = 1319,
1336
    LOCK_DEC64m = 1320,
1337
    LOCK_DEC8m  = 1321,
1338
    LOCK_INC16m = 1322,
1339
    LOCK_INC32m = 1323,
1340
    LOCK_INC64m = 1324,
1341
    LOCK_INC8m  = 1325,
1342
    LOCK_OR16mi = 1326,
1343
    LOCK_OR16mi8  = 1327,
1344
    LOCK_OR16mr = 1328,
1345
    LOCK_OR32mi = 1329,
1346
    LOCK_OR32mi8  = 1330,
1347
    LOCK_OR32mr = 1331,
1348
    LOCK_OR64mi32 = 1332,
1349
    LOCK_OR64mi8  = 1333,
1350
    LOCK_OR64mr = 1334,
1351
    LOCK_OR8mi  = 1335,
1352
    LOCK_OR8mr  = 1336,
1353
    LOCK_PREFIX = 1337,
1354
    LOCK_SUB16mi  = 1338,
1355
    LOCK_SUB16mi8 = 1339,
1356
    LOCK_SUB16mr  = 1340,
1357
    LOCK_SUB32mi  = 1341,
1358
    LOCK_SUB32mi8 = 1342,
1359
    LOCK_SUB32mr  = 1343,
1360
    LOCK_SUB64mi32  = 1344,
1361
    LOCK_SUB64mi8 = 1345,
1362
    LOCK_SUB64mr  = 1346,
1363
    LOCK_SUB8mi = 1347,
1364
    LOCK_SUB8mr = 1348,
1365
    LOCK_XOR16mi  = 1349,
1366
    LOCK_XOR16mi8 = 1350,
1367
    LOCK_XOR16mr  = 1351,
1368
    LOCK_XOR32mi  = 1352,
1369
    LOCK_XOR32mi8 = 1353,
1370
    LOCK_XOR32mr  = 1354,
1371
    LOCK_XOR64mi32  = 1355,
1372
    LOCK_XOR64mi8 = 1356,
1373
    LOCK_XOR64mr  = 1357,
1374
    LOCK_XOR8mi = 1358,
1375
    LOCK_XOR8mr = 1359,
1376
    LODSB = 1360,
1377
    LODSL = 1361,
1378
    LODSQ = 1362,
1379
    LODSW = 1363,
1380
    LOOP  = 1364,
1381
    LOOPE = 1365,
1382
    LOOPNE  = 1366,
1383
    LRETIL  = 1367,
1384
    LRETIQ  = 1368,
1385
    LRETIW  = 1369,
1386
    LRETL = 1370,
1387
    LRETQ = 1371,
1388
    LRETW = 1372,
1389
    LSL16rm = 1373,
1390
    LSL16rr = 1374,
1391
    LSL32rm = 1375,
1392
    LSL32rr = 1376,
1393
    LSL64rm = 1377,
1394
    LSL64rr = 1378,
1395
    LSS16rm = 1379,
1396
    LSS32rm = 1380,
1397
    LSS64rm = 1381,
1398
    LTRm  = 1382,
1399
    LTRr  = 1383,
1400
    LXADD16 = 1384,
1401
    LXADD32 = 1385,
1402
    LXADD64 = 1386,
1403
    LXADD8  = 1387,
1404
    LZCNT16rm = 1388,
1405
    LZCNT16rr = 1389,
1406
    LZCNT32rm = 1390,
1407
    LZCNT32rr = 1391,
1408
    LZCNT64rm = 1392,
1409
    LZCNT64rr = 1393,
1410
    MASKMOVDQU  = 1394,
1411
    MASKMOVDQU64  = 1395,
1412
    MAXCPDrm  = 1396,
1413
    MAXCPDrr  = 1397,
1414
    MAXCPSrm  = 1398,
1415
    MAXCPSrr  = 1399,
1416
    MAXCSDrm  = 1400,
1417
    MAXCSDrr  = 1401,
1418
    MAXCSSrm  = 1402,
1419
    MAXCSSrr  = 1403,
1420
    MAXPDrm = 1404,
1421
    MAXPDrr = 1405,
1422
    MAXPSrm = 1406,
1423
    MAXPSrr = 1407,
1424
    MAXSDrm = 1408,
1425
    MAXSDrm_Int = 1409,
1426
    MAXSDrr = 1410,
1427
    MAXSDrr_Int = 1411,
1428
    MAXSSrm = 1412,
1429
    MAXSSrm_Int = 1413,
1430
    MAXSSrr = 1414,
1431
    MAXSSrr_Int = 1415,
1432
    MFENCE  = 1416,
1433
    MINCPDrm  = 1417,
1434
    MINCPDrr  = 1418,
1435
    MINCPSrm  = 1419,
1436
    MINCPSrr  = 1420,
1437
    MINCSDrm  = 1421,
1438
    MINCSDrr  = 1422,
1439
    MINCSSrm  = 1423,
1440
    MINCSSrr  = 1424,
1441
    MINPDrm = 1425,
1442
    MINPDrr = 1426,
1443
    MINPSrm = 1427,
1444
    MINPSrr = 1428,
1445
    MINSDrm = 1429,
1446
    MINSDrm_Int = 1430,
1447
    MINSDrr = 1431,
1448
    MINSDrr_Int = 1432,
1449
    MINSSrm = 1433,
1450
    MINSSrm_Int = 1434,
1451
    MINSSrr = 1435,
1452
    MINSSrr_Int = 1436,
1453
    MMX_CVTPD2PIirm = 1437,
1454
    MMX_CVTPD2PIirr = 1438,
1455
    MMX_CVTPI2PDirm = 1439,
1456
    MMX_CVTPI2PDirr = 1440,
1457
    MMX_CVTPI2PSirm = 1441,
1458
    MMX_CVTPI2PSirr = 1442,
1459
    MMX_CVTPS2PIirm = 1443,
1460
    MMX_CVTPS2PIirr = 1444,
1461
    MMX_CVTTPD2PIirm  = 1445,
1462
    MMX_CVTTPD2PIirr  = 1446,
1463
    MMX_CVTTPS2PIirm  = 1447,
1464
    MMX_CVTTPS2PIirr  = 1448,
1465
    MMX_EMMS  = 1449,
1466
    MMX_MASKMOVQ  = 1450,
1467
    MMX_MASKMOVQ64  = 1451,
1468
    MMX_MOVD64from64rm  = 1452,
1469
    MMX_MOVD64from64rr  = 1453,
1470
    MMX_MOVD64grr = 1454,
1471
    MMX_MOVD64mr  = 1455,
1472
    MMX_MOVD64rm  = 1456,
1473
    MMX_MOVD64rr  = 1457,
1474
    MMX_MOVD64to64rm  = 1458,
1475
    MMX_MOVD64to64rr  = 1459,
1476
    MMX_MOVDQ2Qrr = 1460,
1477
    MMX_MOVFR642Qrr = 1461,
1478
    MMX_MOVNTQmr  = 1462,
1479
    MMX_MOVQ2DQrr = 1463,
1480
    MMX_MOVQ2FR64rr = 1464,
1481
    MMX_MOVQ64mr  = 1465,
1482
    MMX_MOVQ64rm  = 1466,
1483
    MMX_MOVQ64rr  = 1467,
1484
    MMX_MOVQ64rr_REV  = 1468,
1485
    MMX_PABSBrm64 = 1469,
1486
    MMX_PABSBrr64 = 1470,
1487
    MMX_PABSDrm64 = 1471,
1488
    MMX_PABSDrr64 = 1472,
1489
    MMX_PABSWrm64 = 1473,
1490
    MMX_PABSWrr64 = 1474,
1491
    MMX_PACKSSDWirm = 1475,
1492
    MMX_PACKSSDWirr = 1476,
1493
    MMX_PACKSSWBirm = 1477,
1494
    MMX_PACKSSWBirr = 1478,
1495
    MMX_PACKUSWBirm = 1479,
1496
    MMX_PACKUSWBirr = 1480,
1497
    MMX_PADDBirm  = 1481,
1498
    MMX_PADDBirr  = 1482,
1499
    MMX_PADDDirm  = 1483,
1500
    MMX_PADDDirr  = 1484,
1501
    MMX_PADDQirm  = 1485,
1502
    MMX_PADDQirr  = 1486,
1503
    MMX_PADDSBirm = 1487,
1504
    MMX_PADDSBirr = 1488,
1505
    MMX_PADDSWirm = 1489,
1506
    MMX_PADDSWirr = 1490,
1507
    MMX_PADDUSBirm  = 1491,
1508
    MMX_PADDUSBirr  = 1492,
1509
    MMX_PADDUSWirm  = 1493,
1510
    MMX_PADDUSWirr  = 1494,
1511
    MMX_PADDWirm  = 1495,
1512
    MMX_PADDWirr  = 1496,
1513
    MMX_PALIGNR64irm  = 1497,
1514
    MMX_PALIGNR64irr  = 1498,
1515
    MMX_PANDNirm  = 1499,
1516
    MMX_PANDNirr  = 1500,
1517
    MMX_PANDirm = 1501,
1518
    MMX_PANDirr = 1502,
1519
    MMX_PAVGBirm  = 1503,
1520
    MMX_PAVGBirr  = 1504,
1521
    MMX_PAVGWirm  = 1505,
1522
    MMX_PAVGWirr  = 1506,
1523
    MMX_PCMPEQBirm  = 1507,
1524
    MMX_PCMPEQBirr  = 1508,
1525
    MMX_PCMPEQDirm  = 1509,
1526
    MMX_PCMPEQDirr  = 1510,
1527
    MMX_PCMPEQWirm  = 1511,
1528
    MMX_PCMPEQWirr  = 1512,
1529
    MMX_PCMPGTBirm  = 1513,
1530
    MMX_PCMPGTBirr  = 1514,
1531
    MMX_PCMPGTDirm  = 1515,
1532
    MMX_PCMPGTDirr  = 1516,
1533
    MMX_PCMPGTWirm  = 1517,
1534
    MMX_PCMPGTWirr  = 1518,
1535
    MMX_PEXTRWirri  = 1519,
1536
    MMX_PHADDSWrm64 = 1520,
1537
    MMX_PHADDSWrr64 = 1521,
1538
    MMX_PHADDWrm64  = 1522,
1539
    MMX_PHADDWrr64  = 1523,
1540
    MMX_PHADDrm64 = 1524,
1541
    MMX_PHADDrr64 = 1525,
1542
    MMX_PHSUBDrm64  = 1526,
1543
    MMX_PHSUBDrr64  = 1527,
1544
    MMX_PHSUBSWrm64 = 1528,
1545
    MMX_PHSUBSWrr64 = 1529,
1546
    MMX_PHSUBWrm64  = 1530,
1547
    MMX_PHSUBWrr64  = 1531,
1548
    MMX_PINSRWirmi  = 1532,
1549
    MMX_PINSRWirri  = 1533,
1550
    MMX_PMADDUBSWrm64 = 1534,
1551
    MMX_PMADDUBSWrr64 = 1535,
1552
    MMX_PMADDWDirm  = 1536,
1553
    MMX_PMADDWDirr  = 1537,
1554
    MMX_PMAXSWirm = 1538,
1555
    MMX_PMAXSWirr = 1539,
1556
    MMX_PMAXUBirm = 1540,
1557
    MMX_PMAXUBirr = 1541,
1558
    MMX_PMINSWirm = 1542,
1559
    MMX_PMINSWirr = 1543,
1560
    MMX_PMINUBirm = 1544,
1561
    MMX_PMINUBirr = 1545,
1562
    MMX_PMOVMSKBrr  = 1546,
1563
    MMX_PMULHRSWrm64  = 1547,
1564
    MMX_PMULHRSWrr64  = 1548,
1565
    MMX_PMULHUWirm  = 1549,
1566
    MMX_PMULHUWirr  = 1550,
1567
    MMX_PMULHWirm = 1551,
1568
    MMX_PMULHWirr = 1552,
1569
    MMX_PMULLWirm = 1553,
1570
    MMX_PMULLWirr = 1554,
1571
    MMX_PMULUDQirm  = 1555,
1572
    MMX_PMULUDQirr  = 1556,
1573
    MMX_PORirm  = 1557,
1574
    MMX_PORirr  = 1558,
1575
    MMX_PSADBWirm = 1559,
1576
    MMX_PSADBWirr = 1560,
1577
    MMX_PSHUFBrm64  = 1561,
1578
    MMX_PSHUFBrr64  = 1562,
1579
    MMX_PSHUFWmi  = 1563,
1580
    MMX_PSHUFWri  = 1564,
1581
    MMX_PSIGNBrm64  = 1565,
1582
    MMX_PSIGNBrr64  = 1566,
1583
    MMX_PSIGNDrm64  = 1567,
1584
    MMX_PSIGNDrr64  = 1568,
1585
    MMX_PSIGNWrm64  = 1569,
1586
    MMX_PSIGNWrr64  = 1570,
1587
    MMX_PSLLDri = 1571,
1588
    MMX_PSLLDrm = 1572,
1589
    MMX_PSLLDrr = 1573,
1590
    MMX_PSLLQri = 1574,
1591
    MMX_PSLLQrm = 1575,
1592
    MMX_PSLLQrr = 1576,
1593
    MMX_PSLLWri = 1577,
1594
    MMX_PSLLWrm = 1578,
1595
    MMX_PSLLWrr = 1579,
1596
    MMX_PSRADri = 1580,
1597
    MMX_PSRADrm = 1581,
1598
    MMX_PSRADrr = 1582,
1599
    MMX_PSRAWri = 1583,
1600
    MMX_PSRAWrm = 1584,
1601
    MMX_PSRAWrr = 1585,
1602
    MMX_PSRLDri = 1586,
1603
    MMX_PSRLDrm = 1587,
1604
    MMX_PSRLDrr = 1588,
1605
    MMX_PSRLQri = 1589,
1606
    MMX_PSRLQrm = 1590,
1607
    MMX_PSRLQrr = 1591,
1608
    MMX_PSRLWri = 1592,
1609
    MMX_PSRLWrm = 1593,
1610
    MMX_PSRLWrr = 1594,
1611
    MMX_PSUBBirm  = 1595,
1612
    MMX_PSUBBirr  = 1596,
1613
    MMX_PSUBDirm  = 1597,
1614
    MMX_PSUBDirr  = 1598,
1615
    MMX_PSUBQirm  = 1599,
1616
    MMX_PSUBQirr  = 1600,
1617
    MMX_PSUBSBirm = 1601,
1618
    MMX_PSUBSBirr = 1602,
1619
    MMX_PSUBSWirm = 1603,
1620
    MMX_PSUBSWirr = 1604,
1621
    MMX_PSUBUSBirm  = 1605,
1622
    MMX_PSUBUSBirr  = 1606,
1623
    MMX_PSUBUSWirm  = 1607,
1624
    MMX_PSUBUSWirr  = 1608,
1625
    MMX_PSUBWirm  = 1609,
1626
    MMX_PSUBWirr  = 1610,
1627
    MMX_PUNPCKHBWirm  = 1611,
1628
    MMX_PUNPCKHBWirr  = 1612,
1629
    MMX_PUNPCKHDQirm  = 1613,
1630
    MMX_PUNPCKHDQirr  = 1614,
1631
    MMX_PUNPCKHWDirm  = 1615,
1632
    MMX_PUNPCKHWDirr  = 1616,
1633
    MMX_PUNPCKLBWirm  = 1617,
1634
    MMX_PUNPCKLBWirr  = 1618,
1635
    MMX_PUNPCKLDQirm  = 1619,
1636
    MMX_PUNPCKLDQirr  = 1620,
1637
    MMX_PUNPCKLWDirm  = 1621,
1638
    MMX_PUNPCKLWDirr  = 1622,
1639
    MMX_PXORirm = 1623,
1640
    MMX_PXORirr = 1624,
1641
    MONITOR = 1625,
1642
    MONITORXrrr = 1626,
1643
    MONITORrrr  = 1627,
1644
    MONTMUL = 1628,
1645
    MORESTACK_RET = 1629,
1646
    MORESTACK_RET_RESTORE_R10 = 1630,
1647
    MOV16ao16 = 1631,
1648
    MOV16ao32 = 1632,
1649
    MOV16ao64 = 1633,
1650
    MOV16mi = 1634,
1651
    MOV16mr = 1635,
1652
    MOV16ms = 1636,
1653
    MOV16o16a = 1637,
1654
    MOV16o32a = 1638,
1655
    MOV16o64a = 1639,
1656
    MOV16ri = 1640,
1657
    MOV16ri_alt = 1641,
1658
    MOV16rm = 1642,
1659
    MOV16rr = 1643,
1660
    MOV16rr_REV = 1644,
1661
    MOV16rs = 1645,
1662
    MOV16sm = 1646,
1663
    MOV16sr = 1647,
1664
    MOV32ao16 = 1648,
1665
    MOV32ao32 = 1649,
1666
    MOV32ao64 = 1650,
1667
    MOV32cr = 1651,
1668
    MOV32dr = 1652,
1669
    MOV32mi = 1653,
1670
    MOV32mr = 1654,
1671
    MOV32ms = 1655,
1672
    MOV32o16a = 1656,
1673
    MOV32o32a = 1657,
1674
    MOV32o64a = 1658,
1675
    MOV32r0 = 1659,
1676
    MOV32r1 = 1660,
1677
    MOV32r_1  = 1661,
1678
    MOV32rc = 1662,
1679
    MOV32rd = 1663,
1680
    MOV32ri = 1664,
1681
    MOV32ri64 = 1665,
1682
    MOV32ri_alt = 1666,
1683
    MOV32rm = 1667,
1684
    MOV32rr = 1668,
1685
    MOV32rr_REV = 1669,
1686
    MOV32rs = 1670,
1687
    MOV32sm = 1671,
1688
    MOV32sr = 1672,
1689
    MOV64ao32 = 1673,
1690
    MOV64ao64 = 1674,
1691
    MOV64cr = 1675,
1692
    MOV64dr = 1676,
1693
    MOV64mi32 = 1677,
1694
    MOV64mr = 1678,
1695
    MOV64ms = 1679,
1696
    MOV64o32a = 1680,
1697
    MOV64o64a = 1681,
1698
    MOV64rc = 1682,
1699
    MOV64rd = 1683,
1700
    MOV64ri = 1684,
1701
    MOV64ri32 = 1685,
1702
    MOV64rm = 1686,
1703
    MOV64rr = 1687,
1704
    MOV64rr_REV = 1688,
1705
    MOV64rs = 1689,
1706
    MOV64sm = 1690,
1707
    MOV64sr = 1691,
1708
    MOV64toPQIrm  = 1692,
1709
    MOV64toPQIrr  = 1693,
1710
    MOV64toSDrm = 1694,
1711
    MOV64toSDrr = 1695,
1712
    MOV8ao16  = 1696,
1713
    MOV8ao32  = 1697,
1714
    MOV8ao64  = 1698,
1715
    MOV8mi  = 1699,
1716
    MOV8mr  = 1700,
1717
    MOV8mr_NOREX  = 1701,
1718
    MOV8o16a  = 1702,
1719
    MOV8o32a  = 1703,
1720
    MOV8o64a  = 1704,
1721
    MOV8ri  = 1705,
1722
    MOV8ri_alt  = 1706,
1723
    MOV8rm  = 1707,
1724
    MOV8rm_NOREX  = 1708,
1725
    MOV8rr  = 1709,
1726
    MOV8rr_NOREX  = 1710,
1727
    MOV8rr_REV  = 1711,
1728
    MOVAPDmr  = 1712,
1729
    MOVAPDrm  = 1713,
1730
    MOVAPDrr  = 1714,
1731
    MOVAPDrr_REV  = 1715,
1732
    MOVAPSmr  = 1716,
1733
    MOVAPSrm  = 1717,
1734
    MOVAPSrr  = 1718,
1735
    MOVAPSrr_REV  = 1719,
1736
    MOVBE16mr = 1720,
1737
    MOVBE16rm = 1721,
1738
    MOVBE32mr = 1722,
1739
    MOVBE32rm = 1723,
1740
    MOVBE64mr = 1724,
1741
    MOVBE64rm = 1725,
1742
    MOVDDUPrm = 1726,
1743
    MOVDDUPrr = 1727,
1744
    MOVDI2PDIrm = 1728,
1745
    MOVDI2PDIrr = 1729,
1746
    MOVDI2SSrm  = 1730,
1747
    MOVDI2SSrr  = 1731,
1748
    MOVDQAmr  = 1732,
1749
    MOVDQArm  = 1733,
1750
    MOVDQArr  = 1734,
1751
    MOVDQArr_REV  = 1735,
1752
    MOVDQUmr  = 1736,
1753
    MOVDQUrm  = 1737,
1754
    MOVDQUrr  = 1738,
1755
    MOVDQUrr_REV  = 1739,
1756
    MOVHLPSrr = 1740,
1757
    MOVHPDmr  = 1741,
1758
    MOVHPDrm  = 1742,
1759
    MOVHPSmr  = 1743,
1760
    MOVHPSrm  = 1744,
1761
    MOVLHPSrr = 1745,
1762
    MOVLPDmr  = 1746,
1763
    MOVLPDrm  = 1747,
1764
    MOVLPSmr  = 1748,
1765
    MOVLPSrm  = 1749,
1766
    MOVMSKPDrr  = 1750,
1767
    MOVMSKPSrr  = 1751,
1768
    MOVNTDQArm  = 1752,
1769
    MOVNTDQmr = 1753,
1770
    MOVNTI_64mr = 1754,
1771
    MOVNTImr  = 1755,
1772
    MOVNTPDmr = 1756,
1773
    MOVNTPSmr = 1757,
1774
    MOVNTSD = 1758,
1775
    MOVNTSS = 1759,
1776
    MOVPC32r  = 1760,
1777
    MOVPDI2DImr = 1761,
1778
    MOVPDI2DIrr = 1762,
1779
    MOVPQI2QImr = 1763,
1780
    MOVPQI2QIrr = 1764,
1781
    MOVPQIto64rm  = 1765,
1782
    MOVPQIto64rr  = 1766,
1783
    MOVQI2PQIrm = 1767,
1784
    MOVSB = 1768,
1785
    MOVSDmr = 1769,
1786
    MOVSDrm = 1770,
1787
    MOVSDrr = 1771,
1788
    MOVSDrr_REV = 1772,
1789
    MOVSDto64mr = 1773,
1790
    MOVSDto64rr = 1774,
1791
    MOVSHDUPrm  = 1775,
1792
    MOVSHDUPrr  = 1776,
1793
    MOVSL = 1777,
1794
    MOVSLDUPrm  = 1778,
1795
    MOVSLDUPrr  = 1779,
1796
    MOVSQ = 1780,
1797
    MOVSS2DImr  = 1781,
1798
    MOVSS2DIrr  = 1782,
1799
    MOVSSmr = 1783,
1800
    MOVSSrm = 1784,
1801
    MOVSSrr = 1785,
1802
    MOVSSrr_REV = 1786,
1803
    MOVSW = 1787,
1804
    MOVSX16rm8  = 1788,
1805
    MOVSX16rr8  = 1789,
1806
    MOVSX32_NOREXrm8  = 1790,
1807
    MOVSX32_NOREXrr8  = 1791,
1808
    MOVSX32rm16 = 1792,
1809
    MOVSX32rm8  = 1793,
1810
    MOVSX32rr16 = 1794,
1811
    MOVSX32rr8  = 1795,
1812
    MOVSX64rm16 = 1796,
1813
    MOVSX64rm32 = 1797,
1814
    MOVSX64rm8  = 1798,
1815
    MOVSX64rr16 = 1799,
1816
    MOVSX64rr32 = 1800,
1817
    MOVSX64rr8  = 1801,
1818
    MOVUPDmr  = 1802,
1819
    MOVUPDrm  = 1803,
1820
    MOVUPDrr  = 1804,
1821
    MOVUPDrr_REV  = 1805,
1822
    MOVUPSmr  = 1806,
1823
    MOVUPSrm  = 1807,
1824
    MOVUPSrr  = 1808,
1825
    MOVUPSrr_REV  = 1809,
1826
    MOVZPQILo2PQIrm = 1810,
1827
    MOVZPQILo2PQIrr = 1811,
1828
    MOVZQI2PQIrm  = 1812,
1829
    MOVZX16rm8  = 1813,
1830
    MOVZX16rr8  = 1814,
1831
    MOVZX32_NOREXrm8  = 1815,
1832
    MOVZX32_NOREXrr8  = 1816,
1833
    MOVZX32rm16 = 1817,
1834
    MOVZX32rm8  = 1818,
1835
    MOVZX32rr16 = 1819,
1836
    MOVZX32rr8  = 1820,
1837
    MOVZX64rm16 = 1821,
1838
    MOVZX64rm8  = 1822,
1839
    MOVZX64rr16 = 1823,
1840
    MOVZX64rr8  = 1824,
1841
    MPSADBWrmi  = 1825,
1842
    MPSADBWrri  = 1826,
1843
    MUL16m  = 1827,
1844
    MUL16r  = 1828,
1845
    MUL32m  = 1829,
1846
    MUL32r  = 1830,
1847
    MUL64m  = 1831,
1848
    MUL64r  = 1832,
1849
    MUL8m = 1833,
1850
    MUL8r = 1834,
1851
    MULPDrm = 1835,
1852
    MULPDrr = 1836,
1853
    MULPSrm = 1837,
1854
    MULPSrr = 1838,
1855
    MULSDrm = 1839,
1856
    MULSDrm_Int = 1840,
1857
    MULSDrr = 1841,
1858
    MULSDrr_Int = 1842,
1859
    MULSSrm = 1843,
1860
    MULSSrm_Int = 1844,
1861
    MULSSrr = 1845,
1862
    MULSSrr_Int = 1846,
1863
    MULX32rm  = 1847,
1864
    MULX32rr  = 1848,
1865
    MULX64rm  = 1849,
1866
    MULX64rr  = 1850,
1867
    MUL_F32m  = 1851,
1868
    MUL_F64m  = 1852,
1869
    MUL_FI16m = 1853,
1870
    MUL_FI32m = 1854,
1871
    MUL_FPrST0  = 1855,
1872
    MUL_FST0r = 1856,
1873
    MUL_Fp32  = 1857,
1874
    MUL_Fp32m = 1858,
1875
    MUL_Fp64  = 1859,
1876
    MUL_Fp64m = 1860,
1877
    MUL_Fp64m32 = 1861,
1878
    MUL_Fp80  = 1862,
1879
    MUL_Fp80m32 = 1863,
1880
    MUL_Fp80m64 = 1864,
1881
    MUL_FpI16m32  = 1865,
1882
    MUL_FpI16m64  = 1866,
1883
    MUL_FpI16m80  = 1867,
1884
    MUL_FpI32m32  = 1868,
1885
    MUL_FpI32m64  = 1869,
1886
    MUL_FpI32m80  = 1870,
1887
    MUL_FrST0 = 1871,
1888
    MWAITXrr  = 1872,
1889
    MWAITrr = 1873,
1890
    NEG16m  = 1874,
1891
    NEG16r  = 1875,
1892
    NEG32m  = 1876,
1893
    NEG32r  = 1877,
1894
    NEG64m  = 1878,
1895
    NEG64r  = 1879,
1896
    NEG8m = 1880,
1897
    NEG8r = 1881,
1898
    NOOP  = 1882,
1899
    NOOP18_16m4 = 1883,
1900
    NOOP18_16m5 = 1884,
1901
    NOOP18_16m6 = 1885,
1902
    NOOP18_16m7 = 1886,
1903
    NOOP18_16r4 = 1887,
1904
    NOOP18_16r5 = 1888,
1905
    NOOP18_16r6 = 1889,
1906
    NOOP18_16r7 = 1890,
1907
    NOOP18_m4 = 1891,
1908
    NOOP18_m5 = 1892,
1909
    NOOP18_m6 = 1893,
1910
    NOOP18_m7 = 1894,
1911
    NOOP18_r4 = 1895,
1912
    NOOP18_r5 = 1896,
1913
    NOOP18_r6 = 1897,
1914
    NOOP18_r7 = 1898,
1915
    NOOP19rr  = 1899,
1916
    NOOPL = 1900,
1917
    NOOPL_19  = 1901,
1918
    NOOPL_1c  = 1902,
1919
    NOOPL_1d  = 1903,
1920
    NOOPL_1e  = 1904,
1921
    NOOPW = 1905,
1922
    NOOPW_19  = 1906,
1923
    NOOPW_1c  = 1907,
1924
    NOOPW_1d  = 1908,
1925
    NOOPW_1e  = 1909,
1926
    NOT16m  = 1910,
1927
    NOT16r  = 1911,
1928
    NOT32m  = 1912,
1929
    NOT32r  = 1913,
1930
    NOT64m  = 1914,
1931
    NOT64r  = 1915,
1932
    NOT8m = 1916,
1933
    NOT8r = 1917,
1934
    OR16i16 = 1918,
1935
    OR16mi  = 1919,
1936
    OR16mi8 = 1920,
1937
    OR16mr  = 1921,
1938
    OR16ri  = 1922,
1939
    OR16ri8 = 1923,
1940
    OR16rm  = 1924,
1941
    OR16rr  = 1925,
1942
    OR16rr_REV  = 1926,
1943
    OR32i32 = 1927,
1944
    OR32mi  = 1928,
1945
    OR32mi8 = 1929,
1946
    OR32mr  = 1930,
1947
    OR32mrLocked  = 1931,
1948
    OR32ri  = 1932,
1949
    OR32ri8 = 1933,
1950
    OR32rm  = 1934,
1951
    OR32rr  = 1935,
1952
    OR32rr_REV  = 1936,
1953
    OR64i32 = 1937,
1954
    OR64mi32  = 1938,
1955
    OR64mi8 = 1939,
1956
    OR64mr  = 1940,
1957
    OR64ri32  = 1941,
1958
    OR64ri8 = 1942,
1959
    OR64rm  = 1943,
1960
    OR64rr  = 1944,
1961
    OR64rr_REV  = 1945,
1962
    OR8i8 = 1946,
1963
    OR8mi = 1947,
1964
    OR8mi8  = 1948,
1965
    OR8mr = 1949,
1966
    OR8ri = 1950,
1967
    OR8ri8  = 1951,
1968
    OR8rm = 1952,
1969
    OR8rr = 1953,
1970
    OR8rr_REV = 1954,
1971
    ORPDrm  = 1955,
1972
    ORPDrr  = 1956,
1973
    ORPSrm  = 1957,
1974
    ORPSrr  = 1958,
1975
    OUT16ir = 1959,
1976
    OUT16rr = 1960,
1977
    OUT32ir = 1961,
1978
    OUT32rr = 1962,
1979
    OUT8ir  = 1963,
1980
    OUT8rr  = 1964,
1981
    OUTSB = 1965,
1982
    OUTSL = 1966,
1983
    OUTSW = 1967,
1984
    PABSBrm128  = 1968,
1985
    PABSBrr128  = 1969,
1986
    PABSDrm128  = 1970,
1987
    PABSDrr128  = 1971,
1988
    PABSWrm128  = 1972,
1989
    PABSWrr128  = 1973,
1990
    PACKSSDWrm  = 1974,
1991
    PACKSSDWrr  = 1975,
1992
    PACKSSWBrm  = 1976,
1993
    PACKSSWBrr  = 1977,
1994
    PACKUSDWrm  = 1978,
1995
    PACKUSDWrr  = 1979,
1996
    PACKUSWBrm  = 1980,
1997
    PACKUSWBrr  = 1981,
1998
    PADDBrm = 1982,
1999
    PADDBrr = 1983,
2000
    PADDDrm = 1984,
2001
    PADDDrr = 1985,
2002
    PADDQrm = 1986,
2003
    PADDQrr = 1987,
2004
    PADDSBrm  = 1988,
2005
    PADDSBrr  = 1989,
2006
    PADDSWrm  = 1990,
2007
    PADDSWrr  = 1991,
2008
    PADDUSBrm = 1992,
2009
    PADDUSBrr = 1993,
2010
    PADDUSWrm = 1994,
2011
    PADDUSWrr = 1995,
2012
    PADDWrm = 1996,
2013
    PADDWrr = 1997,
2014
    PALIGNR128rm  = 1998,
2015
    PALIGNR128rr  = 1999,
2016
    PANDNrm = 2000,
2017
    PANDNrr = 2001,
2018
    PANDrm  = 2002,
2019
    PANDrr  = 2003,
2020
    PAUSE = 2004,
2021
    PAVGBrm = 2005,
2022
    PAVGBrr = 2006,
2023
    PAVGUSBrm = 2007,
2024
    PAVGUSBrr = 2008,
2025
    PAVGWrm = 2009,
2026
    PAVGWrr = 2010,
2027
    PBLENDVBrm0 = 2011,
2028
    PBLENDVBrr0 = 2012,
2029
    PBLENDWrmi  = 2013,
2030
    PBLENDWrri  = 2014,
2031
    PCLMULQDQrm = 2015,
2032
    PCLMULQDQrr = 2016,
2033
    PCMPEQBrm = 2017,
2034
    PCMPEQBrr = 2018,
2035
    PCMPEQDrm = 2019,
2036
    PCMPEQDrr = 2020,
2037
    PCMPEQQrm = 2021,
2038
    PCMPEQQrr = 2022,
2039
    PCMPEQWrm = 2023,
2040
    PCMPEQWrr = 2024,
2041
    PCMPESTRIMEM  = 2025,
2042
    PCMPESTRIREG  = 2026,
2043
    PCMPESTRIrm = 2027,
2044
    PCMPESTRIrr = 2028,
2045
    PCMPESTRM128MEM = 2029,
2046
    PCMPESTRM128REG = 2030,
2047
    PCMPESTRM128rm  = 2031,
2048
    PCMPESTRM128rr  = 2032,
2049
    PCMPGTBrm = 2033,
2050
    PCMPGTBrr = 2034,
2051
    PCMPGTDrm = 2035,
2052
    PCMPGTDrr = 2036,
2053
    PCMPGTQrm = 2037,
2054
    PCMPGTQrr = 2038,
2055
    PCMPGTWrm = 2039,
2056
    PCMPGTWrr = 2040,
2057
    PCMPISTRIMEM  = 2041,
2058
    PCMPISTRIREG  = 2042,
2059
    PCMPISTRIrm = 2043,
2060
    PCMPISTRIrr = 2044,
2061
    PCMPISTRM128MEM = 2045,
2062
    PCMPISTRM128REG = 2046,
2063
    PCMPISTRM128rm  = 2047,
2064
    PCMPISTRM128rr  = 2048,
2065
    PCOMMIT = 2049,
2066
    PDEP32rm  = 2050,
2067
    PDEP32rr  = 2051,
2068
    PDEP64rm  = 2052,
2069
    PDEP64rr  = 2053,
2070
    PEXT32rm  = 2054,
2071
    PEXT32rr  = 2055,
2072
    PEXT64rm  = 2056,
2073
    PEXT64rr  = 2057,
2074
    PEXTRBmr  = 2058,
2075
    PEXTRBrr  = 2059,
2076
    PEXTRDmr  = 2060,
2077
    PEXTRDrr  = 2061,
2078
    PEXTRQmr  = 2062,
2079
    PEXTRQrr  = 2063,
2080
    PEXTRWmr  = 2064,
2081
    PEXTRWri  = 2065,
2082
    PEXTRWrr_REV  = 2066,
2083
    PF2IDrm = 2067,
2084
    PF2IDrr = 2068,
2085
    PF2IWrm = 2069,
2086
    PF2IWrr = 2070,
2087
    PFACCrm = 2071,
2088
    PFACCrr = 2072,
2089
    PFADDrm = 2073,
2090
    PFADDrr = 2074,
2091
    PFCMPEQrm = 2075,
2092
    PFCMPEQrr = 2076,
2093
    PFCMPGErm = 2077,
2094
    PFCMPGErr = 2078,
2095
    PFCMPGTrm = 2079,
2096
    PFCMPGTrr = 2080,
2097
    PFMAXrm = 2081,
2098
    PFMAXrr = 2082,
2099
    PFMINrm = 2083,
2100
    PFMINrr = 2084,
2101
    PFMULrm = 2085,
2102
    PFMULrr = 2086,
2103
    PFNACCrm  = 2087,
2104
    PFNACCrr  = 2088,
2105
    PFPNACCrm = 2089,
2106
    PFPNACCrr = 2090,
2107
    PFRCPIT1rm  = 2091,
2108
    PFRCPIT1rr  = 2092,
2109
    PFRCPIT2rm  = 2093,
2110
    PFRCPIT2rr  = 2094,
2111
    PFRCPrm = 2095,
2112
    PFRCPrr = 2096,
2113
    PFRSQIT1rm  = 2097,
2114
    PFRSQIT1rr  = 2098,
2115
    PFRSQRTrm = 2099,
2116
    PFRSQRTrr = 2100,
2117
    PFSUBRrm  = 2101,
2118
    PFSUBRrr  = 2102,
2119
    PFSUBrm = 2103,
2120
    PFSUBrr = 2104,
2121
    PHADDDrm  = 2105,
2122
    PHADDDrr  = 2106,
2123
    PHADDSWrm128  = 2107,
2124
    PHADDSWrr128  = 2108,
2125
    PHADDWrm  = 2109,
2126
    PHADDWrr  = 2110,
2127
    PHMINPOSUWrm128 = 2111,
2128
    PHMINPOSUWrr128 = 2112,
2129
    PHSUBDrm  = 2113,
2130
    PHSUBDrr  = 2114,
2131
    PHSUBSWrm128  = 2115,
2132
    PHSUBSWrr128  = 2116,
2133
    PHSUBWrm  = 2117,
2134
    PHSUBWrr  = 2118,
2135
    PI2FDrm = 2119,
2136
    PI2FDrr = 2120,
2137
    PI2FWrm = 2121,
2138
    PI2FWrr = 2122,
2139
    PINSRBrm  = 2123,
2140
    PINSRBrr  = 2124,
2141
    PINSRDrm  = 2125,
2142
    PINSRDrr  = 2126,
2143
    PINSRQrm  = 2127,
2144
    PINSRQrr  = 2128,
2145
    PINSRWrmi = 2129,
2146
    PINSRWrri = 2130,
2147
    PMADDUBSWrm128  = 2131,
2148
    PMADDUBSWrr128  = 2132,
2149
    PMADDWDrm = 2133,
2150
    PMADDWDrr = 2134,
2151
    PMAXSBrm  = 2135,
2152
    PMAXSBrr  = 2136,
2153
    PMAXSDrm  = 2137,
2154
    PMAXSDrr  = 2138,
2155
    PMAXSWrm  = 2139,
2156
    PMAXSWrr  = 2140,
2157
    PMAXUBrm  = 2141,
2158
    PMAXUBrr  = 2142,
2159
    PMAXUDrm  = 2143,
2160
    PMAXUDrr  = 2144,
2161
    PMAXUWrm  = 2145,
2162
    PMAXUWrr  = 2146,
2163
    PMINSBrm  = 2147,
2164
    PMINSBrr  = 2148,
2165
    PMINSDrm  = 2149,
2166
    PMINSDrr  = 2150,
2167
    PMINSWrm  = 2151,
2168
    PMINSWrr  = 2152,
2169
    PMINUBrm  = 2153,
2170
    PMINUBrr  = 2154,
2171
    PMINUDrm  = 2155,
2172
    PMINUDrr  = 2156,
2173
    PMINUWrm  = 2157,
2174
    PMINUWrr  = 2158,
2175
    PMOVMSKBrr  = 2159,
2176
    PMOVSXBDrm  = 2160,
2177
    PMOVSXBDrr  = 2161,
2178
    PMOVSXBQrm  = 2162,
2179
    PMOVSXBQrr  = 2163,
2180
    PMOVSXBWrm  = 2164,
2181
    PMOVSXBWrr  = 2165,
2182
    PMOVSXDQrm  = 2166,
2183
    PMOVSXDQrr  = 2167,
2184
    PMOVSXWDrm  = 2168,
2185
    PMOVSXWDrr  = 2169,
2186
    PMOVSXWQrm  = 2170,
2187
    PMOVSXWQrr  = 2171,
2188
    PMOVZXBDrm  = 2172,
2189
    PMOVZXBDrr  = 2173,
2190
    PMOVZXBQrm  = 2174,
2191
    PMOVZXBQrr  = 2175,
2192
    PMOVZXBWrm  = 2176,
2193
    PMOVZXBWrr  = 2177,
2194
    PMOVZXDQrm  = 2178,
2195
    PMOVZXDQrr  = 2179,
2196
    PMOVZXWDrm  = 2180,
2197
    PMOVZXWDrr  = 2181,
2198
    PMOVZXWQrm  = 2182,
2199
    PMOVZXWQrr  = 2183,
2200
    PMULDQrm  = 2184,
2201
    PMULDQrr  = 2185,
2202
    PMULHRSWrm128 = 2186,
2203
    PMULHRSWrr128 = 2187,
2204
    PMULHRWrm = 2188,
2205
    PMULHRWrr = 2189,
2206
    PMULHUWrm = 2190,
2207
    PMULHUWrr = 2191,
2208
    PMULHWrm  = 2192,
2209
    PMULHWrr  = 2193,
2210
    PMULLDrm  = 2194,
2211
    PMULLDrr  = 2195,
2212
    PMULLWrm  = 2196,
2213
    PMULLWrr  = 2197,
2214
    PMULUDQrm = 2198,
2215
    PMULUDQrr = 2199,
2216
    POP16r  = 2200,
2217
    POP16rmm  = 2201,
2218
    POP16rmr  = 2202,
2219
    POP32r  = 2203,
2220
    POP32rmm  = 2204,
2221
    POP32rmr  = 2205,
2222
    POP64r  = 2206,
2223
    POP64rmm  = 2207,
2224
    POP64rmr  = 2208,
2225
    POPA16  = 2209,
2226
    POPA32  = 2210,
2227
    POPCNT16rm  = 2211,
2228
    POPCNT16rr  = 2212,
2229
    POPCNT32rm  = 2213,
2230
    POPCNT32rr  = 2214,
2231
    POPCNT64rm  = 2215,
2232
    POPCNT64rr  = 2216,
2233
    POPDS16 = 2217,
2234
    POPDS32 = 2218,
2235
    POPES16 = 2219,
2236
    POPES32 = 2220,
2237
    POPF16  = 2221,
2238
    POPF32  = 2222,
2239
    POPF64  = 2223,
2240
    POPFS16 = 2224,
2241
    POPFS32 = 2225,
2242
    POPFS64 = 2226,
2243
    POPGS16 = 2227,
2244
    POPGS32 = 2228,
2245
    POPGS64 = 2229,
2246
    POPSS16 = 2230,
2247
    POPSS32 = 2231,
2248
    PORrm = 2232,
2249
    PORrr = 2233,
2250
    PREFETCH  = 2234,
2251
    PREFETCHNTA = 2235,
2252
    PREFETCHT0  = 2236,
2253
    PREFETCHT1  = 2237,
2254
    PREFETCHT2  = 2238,
2255
    PREFETCHW = 2239,
2256
    PSADBWrm  = 2240,
2257
    PSADBWrr  = 2241,
2258
    PSHUFBrm  = 2242,
2259
    PSHUFBrr  = 2243,
2260
    PSHUFDmi  = 2244,
2261
    PSHUFDri  = 2245,
2262
    PSHUFHWmi = 2246,
2263
    PSHUFHWri = 2247,
2264
    PSHUFLWmi = 2248,
2265
    PSHUFLWri = 2249,
2266
    PSIGNBrm  = 2250,
2267
    PSIGNBrr  = 2251,
2268
    PSIGNDrm  = 2252,
2269
    PSIGNDrr  = 2253,
2270
    PSIGNWrm  = 2254,
2271
    PSIGNWrr  = 2255,
2272
    PSLLDQri  = 2256,
2273
    PSLLDri = 2257,
2274
    PSLLDrm = 2258,
2275
    PSLLDrr = 2259,
2276
    PSLLQri = 2260,
2277
    PSLLQrm = 2261,
2278
    PSLLQrr = 2262,
2279
    PSLLWri = 2263,
2280
    PSLLWrm = 2264,
2281
    PSLLWrr = 2265,
2282
    PSRADri = 2266,
2283
    PSRADrm = 2267,
2284
    PSRADrr = 2268,
2285
    PSRAWri = 2269,
2286
    PSRAWrm = 2270,
2287
    PSRAWrr = 2271,
2288
    PSRLDQri  = 2272,
2289
    PSRLDri = 2273,
2290
    PSRLDrm = 2274,
2291
    PSRLDrr = 2275,
2292
    PSRLQri = 2276,
2293
    PSRLQrm = 2277,
2294
    PSRLQrr = 2278,
2295
    PSRLWri = 2279,
2296
    PSRLWrm = 2280,
2297
    PSRLWrr = 2281,
2298
    PSUBBrm = 2282,
2299
    PSUBBrr = 2283,
2300
    PSUBDrm = 2284,
2301
    PSUBDrr = 2285,
2302
    PSUBQrm = 2286,
2303
    PSUBQrr = 2287,
2304
    PSUBSBrm  = 2288,
2305
    PSUBSBrr  = 2289,
2306
    PSUBSWrm  = 2290,
2307
    PSUBSWrr  = 2291,
2308
    PSUBUSBrm = 2292,
2309
    PSUBUSBrr = 2293,
2310
    PSUBUSWrm = 2294,
2311
    PSUBUSWrr = 2295,
2312
    PSUBWrm = 2296,
2313
    PSUBWrr = 2297,
2314
    PSWAPDrm  = 2298,
2315
    PSWAPDrr  = 2299,
2316
    PTESTrm = 2300,
2317
    PTESTrr = 2301,
2318
    PUNPCKHBWrm = 2302,
2319
    PUNPCKHBWrr = 2303,
2320
    PUNPCKHDQrm = 2304,
2321
    PUNPCKHDQrr = 2305,
2322
    PUNPCKHQDQrm  = 2306,
2323
    PUNPCKHQDQrr  = 2307,
2324
    PUNPCKHWDrm = 2308,
2325
    PUNPCKHWDrr = 2309,
2326
    PUNPCKLBWrm = 2310,
2327
    PUNPCKLBWrr = 2311,
2328
    PUNPCKLDQrm = 2312,
2329
    PUNPCKLDQrr = 2313,
2330
    PUNPCKLQDQrm  = 2314,
2331
    PUNPCKLQDQrr  = 2315,
2332
    PUNPCKLWDrm = 2316,
2333
    PUNPCKLWDrr = 2317,
2334
    PUSH16i8  = 2318,
2335
    PUSH16r = 2319,
2336
    PUSH16rmm = 2320,
2337
    PUSH16rmr = 2321,
2338
    PUSH32i8  = 2322,
2339
    PUSH32r = 2323,
2340
    PUSH32rmm = 2324,
2341
    PUSH32rmr = 2325,
2342
    PUSH64i32 = 2326,
2343
    PUSH64i8  = 2327,
2344
    PUSH64r = 2328,
2345
    PUSH64rmm = 2329,
2346
    PUSH64rmr = 2330,
2347
    PUSHA16 = 2331,
2348
    PUSHA32 = 2332,
2349
    PUSHCS16  = 2333,
2350
    PUSHCS32  = 2334,
2351
    PUSHDS16  = 2335,
2352
    PUSHDS32  = 2336,
2353
    PUSHES16  = 2337,
2354
    PUSHES32  = 2338,
2355
    PUSHF16 = 2339,
2356
    PUSHF32 = 2340,
2357
    PUSHF64 = 2341,
2358
    PUSHFS16  = 2342,
2359
    PUSHFS32  = 2343,
2360
    PUSHFS64  = 2344,
2361
    PUSHGS16  = 2345,
2362
    PUSHGS32  = 2346,
2363
    PUSHGS64  = 2347,
2364
    PUSHSS16  = 2348,
2365
    PUSHSS32  = 2349,
2366
    PUSHi16 = 2350,
2367
    PUSHi32 = 2351,
2368
    PXORrm  = 2352,
2369
    PXORrr  = 2353,
2370
    RCL16m1 = 2354,
2371
    RCL16mCL  = 2355,
2372
    RCL16mi = 2356,
2373
    RCL16r1 = 2357,
2374
    RCL16rCL  = 2358,
2375
    RCL16ri = 2359,
2376
    RCL32m1 = 2360,
2377
    RCL32mCL  = 2361,
2378
    RCL32mi = 2362,
2379
    RCL32r1 = 2363,
2380
    RCL32rCL  = 2364,
2381
    RCL32ri = 2365,
2382
    RCL64m1 = 2366,
2383
    RCL64mCL  = 2367,
2384
    RCL64mi = 2368,
2385
    RCL64r1 = 2369,
2386
    RCL64rCL  = 2370,
2387
    RCL64ri = 2371,
2388
    RCL8m1  = 2372,
2389
    RCL8mCL = 2373,
2390
    RCL8mi  = 2374,
2391
    RCL8r1  = 2375,
2392
    RCL8rCL = 2376,
2393
    RCL8ri  = 2377,
2394
    RCPPSm  = 2378,
2395
    RCPPSr  = 2379,
2396
    RCPSSm  = 2380,
2397
    RCPSSm_Int  = 2381,
2398
    RCPSSr  = 2382,
2399
    RCPSSr_Int  = 2383,
2400
    RCR16m1 = 2384,
2401
    RCR16mCL  = 2385,
2402
    RCR16mi = 2386,
2403
    RCR16r1 = 2387,
2404
    RCR16rCL  = 2388,
2405
    RCR16ri = 2389,
2406
    RCR32m1 = 2390,
2407
    RCR32mCL  = 2391,
2408
    RCR32mi = 2392,
2409
    RCR32r1 = 2393,
2410
    RCR32rCL  = 2394,
2411
    RCR32ri = 2395,
2412
    RCR64m1 = 2396,
2413
    RCR64mCL  = 2397,
2414
    RCR64mi = 2398,
2415
    RCR64r1 = 2399,
2416
    RCR64rCL  = 2400,
2417
    RCR64ri = 2401,
2418
    RCR8m1  = 2402,
2419
    RCR8mCL = 2403,
2420
    RCR8mi  = 2404,
2421
    RCR8r1  = 2405,
2422
    RCR8rCL = 2406,
2423
    RCR8ri  = 2407,
2424
    RDFLAGS32 = 2408,
2425
    RDFLAGS64 = 2409,
2426
    RDFSBASE  = 2410,
2427
    RDFSBASE64  = 2411,
2428
    RDGSBASE  = 2412,
2429
    RDGSBASE64  = 2413,
2430
    RDMSR = 2414,
2431
    RDPKRU  = 2415,
2432
    RDPKRUr = 2416,
2433
    RDPMC = 2417,
2434
    RDRAND16r = 2418,
2435
    RDRAND32r = 2419,
2436
    RDRAND64r = 2420,
2437
    RDSEED16r = 2421,
2438
    RDSEED32r = 2422,
2439
    RDSEED64r = 2423,
2440
    RDTSC = 2424,
2441
    RDTSCP  = 2425,
2442
    RELEASE_ADD32mi = 2426,
2443
    RELEASE_ADD32mr = 2427,
2444
    RELEASE_ADD64mi32 = 2428,
2445
    RELEASE_ADD64mr = 2429,
2446
    RELEASE_ADD8mi  = 2430,
2447
    RELEASE_ADD8mr  = 2431,
2448
    RELEASE_AND32mi = 2432,
2449
    RELEASE_AND32mr = 2433,
2450
    RELEASE_AND64mi32 = 2434,
2451
    RELEASE_AND64mr = 2435,
2452
    RELEASE_AND8mi  = 2436,
2453
    RELEASE_AND8mr  = 2437,
2454
    RELEASE_DEC16m  = 2438,
2455
    RELEASE_DEC32m  = 2439,
2456
    RELEASE_DEC64m  = 2440,
2457
    RELEASE_DEC8m = 2441,
2458
    RELEASE_FADD32mr  = 2442,
2459
    RELEASE_FADD64mr  = 2443,
2460
    RELEASE_INC16m  = 2444,
2461
    RELEASE_INC32m  = 2445,
2462
    RELEASE_INC64m  = 2446,
2463
    RELEASE_INC8m = 2447,
2464
    RELEASE_MOV16mi = 2448,
2465
    RELEASE_MOV16mr = 2449,
2466
    RELEASE_MOV32mi = 2450,
2467
    RELEASE_MOV32mr = 2451,
2468
    RELEASE_MOV64mi32 = 2452,
2469
    RELEASE_MOV64mr = 2453,
2470
    RELEASE_MOV8mi  = 2454,
2471
    RELEASE_MOV8mr  = 2455,
2472
    RELEASE_OR32mi  = 2456,
2473
    RELEASE_OR32mr  = 2457,
2474
    RELEASE_OR64mi32  = 2458,
2475
    RELEASE_OR64mr  = 2459,
2476
    RELEASE_OR8mi = 2460,
2477
    RELEASE_OR8mr = 2461,
2478
    RELEASE_XOR32mi = 2462,
2479
    RELEASE_XOR32mr = 2463,
2480
    RELEASE_XOR64mi32 = 2464,
2481
    RELEASE_XOR64mr = 2465,
2482
    RELEASE_XOR8mi  = 2466,
2483
    RELEASE_XOR8mr  = 2467,
2484
    REPNE_PREFIX  = 2468,
2485
    REP_MOVSB_32  = 2469,
2486
    REP_MOVSB_64  = 2470,
2487
    REP_MOVSD_32  = 2471,
2488
    REP_MOVSD_64  = 2472,
2489
    REP_MOVSQ_64  = 2473,
2490
    REP_MOVSW_32  = 2474,
2491
    REP_MOVSW_64  = 2475,
2492
    REP_PREFIX  = 2476,
2493
    REP_STOSB_32  = 2477,
2494
    REP_STOSB_64  = 2478,
2495
    REP_STOSD_32  = 2479,
2496
    REP_STOSD_64  = 2480,
2497
    REP_STOSQ_64  = 2481,
2498
    REP_STOSW_32  = 2482,
2499
    REP_STOSW_64  = 2483,
2500
    RETIL = 2484,
2501
    RETIQ = 2485,
2502
    RETIW = 2486,
2503
    RETL  = 2487,
2504
    RETQ  = 2488,
2505
    RETW  = 2489,
2506
    REX64_PREFIX  = 2490,
2507
    ROL16m1 = 2491,
2508
    ROL16mCL  = 2492,
2509
    ROL16mi = 2493,
2510
    ROL16r1 = 2494,
2511
    ROL16rCL  = 2495,
2512
    ROL16ri = 2496,
2513
    ROL32m1 = 2497,
2514
    ROL32mCL  = 2498,
2515
    ROL32mi = 2499,
2516
    ROL32r1 = 2500,
2517
    ROL32rCL  = 2501,
2518
    ROL32ri = 2502,
2519
    ROL64m1 = 2503,
2520
    ROL64mCL  = 2504,
2521
    ROL64mi = 2505,
2522
    ROL64r1 = 2506,
2523
    ROL64rCL  = 2507,
2524
    ROL64ri = 2508,
2525
    ROL8m1  = 2509,
2526
    ROL8mCL = 2510,
2527
    ROL8mi  = 2511,
2528
    ROL8r1  = 2512,
2529
    ROL8rCL = 2513,
2530
    ROL8ri  = 2514,
2531
    ROR16m1 = 2515,
2532
    ROR16mCL  = 2516,
2533
    ROR16mi = 2517,
2534
    ROR16r1 = 2518,
2535
    ROR16rCL  = 2519,
2536
    ROR16ri = 2520,
2537
    ROR32m1 = 2521,
2538
    ROR32mCL  = 2522,
2539
    ROR32mi = 2523,
2540
    ROR32r1 = 2524,
2541
    ROR32rCL  = 2525,
2542
    ROR32ri = 2526,
2543
    ROR64m1 = 2527,
2544
    ROR64mCL  = 2528,
2545
    ROR64mi = 2529,
2546
    ROR64r1 = 2530,
2547
    ROR64rCL  = 2531,
2548
    ROR64ri = 2532,
2549
    ROR8m1  = 2533,
2550
    ROR8mCL = 2534,
2551
    ROR8mi  = 2535,
2552
    ROR8r1  = 2536,
2553
    ROR8rCL = 2537,
2554
    ROR8ri  = 2538,
2555
    RORX32mi  = 2539,
2556
    RORX32ri  = 2540,
2557
    RORX64mi  = 2541,
2558
    RORX64ri  = 2542,
2559
    ROUNDPDm  = 2543,
2560
    ROUNDPDr  = 2544,
2561
    ROUNDPSm  = 2545,
2562
    ROUNDPSr  = 2546,
2563
    ROUNDSDm  = 2547,
2564
    ROUNDSDr  = 2548,
2565
    ROUNDSDr_Int  = 2549,
2566
    ROUNDSSm  = 2550,
2567
    ROUNDSSr  = 2551,
2568
    ROUNDSSr_Int  = 2552,
2569
    RSM = 2553,
2570
    RSQRTPSm  = 2554,
2571
    RSQRTPSr  = 2555,
2572
    RSQRTSSm  = 2556,
2573
    RSQRTSSm_Int  = 2557,
2574
    RSQRTSSr  = 2558,
2575
    RSQRTSSr_Int  = 2559,
2576
    SAHF  = 2560,
2577
    SALC  = 2561,
2578
    SAR16m1 = 2562,
2579
    SAR16mCL  = 2563,
2580
    SAR16mi = 2564,
2581
    SAR16r1 = 2565,
2582
    SAR16rCL  = 2566,
2583
    SAR16ri = 2567,
2584
    SAR32m1 = 2568,
2585
    SAR32mCL  = 2569,
2586
    SAR32mi = 2570,
2587
    SAR32r1 = 2571,
2588
    SAR32rCL  = 2572,
2589
    SAR32ri = 2573,
2590
    SAR64m1 = 2574,
2591
    SAR64mCL  = 2575,
2592
    SAR64mi = 2576,
2593
    SAR64r1 = 2577,
2594
    SAR64rCL  = 2578,
2595
    SAR64ri = 2579,
2596
    SAR8m1  = 2580,
2597
    SAR8mCL = 2581,
2598
    SAR8mi  = 2582,
2599
    SAR8r1  = 2583,
2600
    SAR8rCL = 2584,
2601
    SAR8ri  = 2585,
2602
    SARX32rm  = 2586,
2603
    SARX32rr  = 2587,
2604
    SARX64rm  = 2588,
2605
    SARX64rr  = 2589,
2606
    SBB16i16  = 2590,
2607
    SBB16mi = 2591,
2608
    SBB16mi8  = 2592,
2609
    SBB16mr = 2593,
2610
    SBB16ri = 2594,
2611
    SBB16ri8  = 2595,
2612
    SBB16rm = 2596,
2613
    SBB16rr = 2597,
2614
    SBB16rr_REV = 2598,
2615
    SBB32i32  = 2599,
2616
    SBB32mi = 2600,
2617
    SBB32mi8  = 2601,
2618
    SBB32mr = 2602,
2619
    SBB32ri = 2603,
2620
    SBB32ri8  = 2604,
2621
    SBB32rm = 2605,
2622
    SBB32rr = 2606,
2623
    SBB32rr_REV = 2607,
2624
    SBB64i32  = 2608,
2625
    SBB64mi32 = 2609,
2626
    SBB64mi8  = 2610,
2627
    SBB64mr = 2611,
2628
    SBB64ri32 = 2612,
2629
    SBB64ri8  = 2613,
2630
    SBB64rm = 2614,
2631
    SBB64rr = 2615,
2632
    SBB64rr_REV = 2616,
2633
    SBB8i8  = 2617,
2634
    SBB8mi  = 2618,
2635
    SBB8mi8 = 2619,
2636
    SBB8mr  = 2620,
2637
    SBB8ri  = 2621,
2638
    SBB8ri8 = 2622,
2639
    SBB8rm  = 2623,
2640
    SBB8rr  = 2624,
2641
    SBB8rr_REV  = 2625,
2642
    SCASB = 2626,
2643
    SCASL = 2627,
2644
    SCASQ = 2628,
2645
    SCASW = 2629,
2646
    SEG_ALLOCA_32 = 2630,
2647
    SEG_ALLOCA_64 = 2631,
2648
    SEH_EndPrologue = 2632,
2649
    SEH_Epilogue  = 2633,
2650
    SEH_PushFrame = 2634,
2651
    SEH_PushReg = 2635,
2652
    SEH_SaveReg = 2636,
2653
    SEH_SaveXMM = 2637,
2654
    SEH_SetFrame  = 2638,
2655
    SEH_StackAlloc  = 2639,
2656
    SETAEm  = 2640,
2657
    SETAEr  = 2641,
2658
    SETAm = 2642,
2659
    SETAr = 2643,
2660
    SETBEm  = 2644,
2661
    SETBEr  = 2645,
2662
    SETB_C16r = 2646,
2663
    SETB_C32r = 2647,
2664
    SETB_C64r = 2648,
2665
    SETB_C8r  = 2649,
2666
    SETBm = 2650,
2667
    SETBr = 2651,
2668
    SETEm = 2652,
2669
    SETEr = 2653,
2670
    SETGEm  = 2654,
2671
    SETGEr  = 2655,
2672
    SETGm = 2656,
2673
    SETGr = 2657,
2674
    SETLEm  = 2658,
2675
    SETLEr  = 2659,
2676
    SETLm = 2660,
2677
    SETLr = 2661,
2678
    SETNEm  = 2662,
2679
    SETNEr  = 2663,
2680
    SETNOm  = 2664,
2681
    SETNOr  = 2665,
2682
    SETNPm  = 2666,
2683
    SETNPr  = 2667,
2684
    SETNSm  = 2668,
2685
    SETNSr  = 2669,
2686
    SETOm = 2670,
2687
    SETOr = 2671,
2688
    SETPm = 2672,
2689
    SETPr = 2673,
2690
    SETSm = 2674,
2691
    SETSr = 2675,
2692
    SFENCE  = 2676,
2693
    SGDT16m = 2677,
2694
    SGDT32m = 2678,
2695
    SGDT64m = 2679,
2696
    SHA1MSG1rm  = 2680,
2697
    SHA1MSG1rr  = 2681,
2698
    SHA1MSG2rm  = 2682,
2699
    SHA1MSG2rr  = 2683,
2700
    SHA1NEXTErm = 2684,
2701
    SHA1NEXTErr = 2685,
2702
    SHA1RNDS4rmi  = 2686,
2703
    SHA1RNDS4rri  = 2687,
2704
    SHA256MSG1rm  = 2688,
2705
    SHA256MSG1rr  = 2689,
2706
    SHA256MSG2rm  = 2690,
2707
    SHA256MSG2rr  = 2691,
2708
    SHA256RNDS2rm = 2692,
2709
    SHA256RNDS2rr = 2693,
2710
    SHL16m1 = 2694,
2711
    SHL16mCL  = 2695,
2712
    SHL16mi = 2696,
2713
    SHL16r1 = 2697,
2714
    SHL16rCL  = 2698,
2715
    SHL16ri = 2699,
2716
    SHL32m1 = 2700,
2717
    SHL32mCL  = 2701,
2718
    SHL32mi = 2702,
2719
    SHL32r1 = 2703,
2720
    SHL32rCL  = 2704,
2721
    SHL32ri = 2705,
2722
    SHL64m1 = 2706,
2723
    SHL64mCL  = 2707,
2724
    SHL64mi = 2708,
2725
    SHL64r1 = 2709,
2726
    SHL64rCL  = 2710,
2727
    SHL64ri = 2711,
2728
    SHL8m1  = 2712,
2729
    SHL8mCL = 2713,
2730
    SHL8mi  = 2714,
2731
    SHL8r1  = 2715,
2732
    SHL8rCL = 2716,
2733
    SHL8ri  = 2717,
2734
    SHLD16mrCL  = 2718,
2735
    SHLD16mri8  = 2719,
2736
    SHLD16rrCL  = 2720,
2737
    SHLD16rri8  = 2721,
2738
    SHLD32mrCL  = 2722,
2739
    SHLD32mri8  = 2723,
2740
    SHLD32rrCL  = 2724,
2741
    SHLD32rri8  = 2725,
2742
    SHLD64mrCL  = 2726,
2743
    SHLD64mri8  = 2727,
2744
    SHLD64rrCL  = 2728,
2745
    SHLD64rri8  = 2729,
2746
    SHLX32rm  = 2730,
2747
    SHLX32rr  = 2731,
2748
    SHLX64rm  = 2732,
2749
    SHLX64rr  = 2733,
2750
    SHR16m1 = 2734,
2751
    SHR16mCL  = 2735,
2752
    SHR16mi = 2736,
2753
    SHR16r1 = 2737,
2754
    SHR16rCL  = 2738,
2755
    SHR16ri = 2739,
2756
    SHR32m1 = 2740,
2757
    SHR32mCL  = 2741,
2758
    SHR32mi = 2742,
2759
    SHR32r1 = 2743,
2760
    SHR32rCL  = 2744,
2761
    SHR32ri = 2745,
2762
    SHR64m1 = 2746,
2763
    SHR64mCL  = 2747,
2764
    SHR64mi = 2748,
2765
    SHR64r1 = 2749,
2766
    SHR64rCL  = 2750,
2767
    SHR64ri = 2751,
2768
    SHR8m1  = 2752,
2769
    SHR8mCL = 2753,
2770
    SHR8mi  = 2754,
2771
    SHR8r1  = 2755,
2772
    SHR8rCL = 2756,
2773
    SHR8ri  = 2757,
2774
    SHRD16mrCL  = 2758,
2775
    SHRD16mri8  = 2759,
2776
    SHRD16rrCL  = 2760,
2777
    SHRD16rri8  = 2761,
2778
    SHRD32mrCL  = 2762,
2779
    SHRD32mri8  = 2763,
2780
    SHRD32rrCL  = 2764,
2781
    SHRD32rri8  = 2765,
2782
    SHRD64mrCL  = 2766,
2783
    SHRD64mri8  = 2767,
2784
    SHRD64rrCL  = 2768,
2785
    SHRD64rri8  = 2769,
2786
    SHRX32rm  = 2770,
2787
    SHRX32rr  = 2771,
2788
    SHRX64rm  = 2772,
2789
    SHRX64rr  = 2773,
2790
    SHUFPDrmi = 2774,
2791
    SHUFPDrri = 2775,
2792
    SHUFPSrmi = 2776,
2793
    SHUFPSrri = 2777,
2794
    SIDT16m = 2778,
2795
    SIDT32m = 2779,
2796
    SIDT64m = 2780,
2797
    SIN_F = 2781,
2798
    SIN_Fp32  = 2782,
2799
    SIN_Fp64  = 2783,
2800
    SIN_Fp80  = 2784,
2801
    SKINIT  = 2785,
2802
    SLDT16m = 2786,
2803
    SLDT16r = 2787,
2804
    SLDT32r = 2788,
2805
    SLDT64m = 2789,
2806
    SLDT64r = 2790,
2807
    SMSW16m = 2791,
2808
    SMSW16r = 2792,
2809
    SMSW32r = 2793,
2810
    SMSW64r = 2794,
2811
    SQRTPDm = 2795,
2812
    SQRTPDr = 2796,
2813
    SQRTPSm = 2797,
2814
    SQRTPSr = 2798,
2815
    SQRTSDm = 2799,
2816
    SQRTSDm_Int = 2800,
2817
    SQRTSDr = 2801,
2818
    SQRTSDr_Int = 2802,
2819
    SQRTSSm = 2803,
2820
    SQRTSSm_Int = 2804,
2821
    SQRTSSr = 2805,
2822
    SQRTSSr_Int = 2806,
2823
    SQRT_F  = 2807,
2824
    SQRT_Fp32 = 2808,
2825
    SQRT_Fp64 = 2809,
2826
    SQRT_Fp80 = 2810,
2827
    SS_PREFIX = 2811,
2828
    STAC  = 2812,
2829
    STC = 2813,
2830
    STD = 2814,
2831
    STGI  = 2815,
2832
    STI = 2816,
2833
    STMXCSR = 2817,
2834
    STOSB = 2818,
2835
    STOSL = 2819,
2836
    STOSQ = 2820,
2837
    STOSW = 2821,
2838
    STR16r  = 2822,
2839
    STR32r  = 2823,
2840
    STR64r  = 2824,
2841
    STRm  = 2825,
2842
    ST_F32m = 2826,
2843
    ST_F64m = 2827,
2844
    ST_FCOMPST0r  = 2828,
2845
    ST_FCOMPST0r_alt  = 2829,
2846
    ST_FCOMST0r = 2830,
2847
    ST_FP32m  = 2831,
2848
    ST_FP64m  = 2832,
2849
    ST_FP80m  = 2833,
2850
    ST_FPNCEST0r  = 2834,
2851
    ST_FPST0r = 2835,
2852
    ST_FPST0r_alt = 2836,
2853
    ST_FPrr = 2837,
2854
    ST_FXCHST0r = 2838,
2855
    ST_FXCHST0r_alt = 2839,
2856
    ST_Fp32m  = 2840,
2857
    ST_Fp64m  = 2841,
2858
    ST_Fp64m32  = 2842,
2859
    ST_Fp80m32  = 2843,
2860
    ST_Fp80m64  = 2844,
2861
    ST_FpP32m = 2845,
2862
    ST_FpP64m = 2846,
2863
    ST_FpP64m32 = 2847,
2864
    ST_FpP80m = 2848,
2865
    ST_FpP80m32 = 2849,
2866
    ST_FpP80m64 = 2850,
2867
    ST_Frr  = 2851,
2868
    SUB16i16  = 2852,
2869
    SUB16mi = 2853,
2870
    SUB16mi8  = 2854,
2871
    SUB16mr = 2855,
2872
    SUB16ri = 2856,
2873
    SUB16ri8  = 2857,
2874
    SUB16rm = 2858,
2875
    SUB16rr = 2859,
2876
    SUB16rr_REV = 2860,
2877
    SUB32i32  = 2861,
2878
    SUB32mi = 2862,
2879
    SUB32mi8  = 2863,
2880
    SUB32mr = 2864,
2881
    SUB32ri = 2865,
2882
    SUB32ri8  = 2866,
2883
    SUB32rm = 2867,
2884
    SUB32rr = 2868,
2885
    SUB32rr_REV = 2869,
2886
    SUB64i32  = 2870,
2887
    SUB64mi32 = 2871,
2888
    SUB64mi8  = 2872,
2889
    SUB64mr = 2873,
2890
    SUB64ri32 = 2874,
2891
    SUB64ri8  = 2875,
2892
    SUB64rm = 2876,
2893
    SUB64rr = 2877,
2894
    SUB64rr_REV = 2878,
2895
    SUB8i8  = 2879,
2896
    SUB8mi  = 2880,
2897
    SUB8mi8 = 2881,
2898
    SUB8mr  = 2882,
2899
    SUB8ri  = 2883,
2900
    SUB8ri8 = 2884,
2901
    SUB8rm  = 2885,
2902
    SUB8rr  = 2886,
2903
    SUB8rr_REV  = 2887,
2904
    SUBPDrm = 2888,
2905
    SUBPDrr = 2889,
2906
    SUBPSrm = 2890,
2907
    SUBPSrr = 2891,
2908
    SUBR_F32m = 2892,
2909
    SUBR_F64m = 2893,
2910
    SUBR_FI16m  = 2894,
2911
    SUBR_FI32m  = 2895,
2912
    SUBR_FPrST0 = 2896,
2913
    SUBR_FST0r  = 2897,
2914
    SUBR_Fp32m  = 2898,
2915
    SUBR_Fp64m  = 2899,
2916
    SUBR_Fp64m32  = 2900,
2917
    SUBR_Fp80m32  = 2901,
2918
    SUBR_Fp80m64  = 2902,
2919
    SUBR_FpI16m32 = 2903,
2920
    SUBR_FpI16m64 = 2904,
2921
    SUBR_FpI16m80 = 2905,
2922
    SUBR_FpI32m32 = 2906,
2923
    SUBR_FpI32m64 = 2907,
2924
    SUBR_FpI32m80 = 2908,
2925
    SUBR_FrST0  = 2909,
2926
    SUBSDrm = 2910,
2927
    SUBSDrm_Int = 2911,
2928
    SUBSDrr = 2912,
2929
    SUBSDrr_Int = 2913,
2930
    SUBSSrm = 2914,
2931
    SUBSSrm_Int = 2915,
2932
    SUBSSrr = 2916,
2933
    SUBSSrr_Int = 2917,
2934
    SUB_F32m  = 2918,
2935
    SUB_F64m  = 2919,
2936
    SUB_FI16m = 2920,
2937
    SUB_FI32m = 2921,
2938
    SUB_FPrST0  = 2922,
2939
    SUB_FST0r = 2923,
2940
    SUB_Fp32  = 2924,
2941
    SUB_Fp32m = 2925,
2942
    SUB_Fp64  = 2926,
2943
    SUB_Fp64m = 2927,
2944
    SUB_Fp64m32 = 2928,
2945
    SUB_Fp80  = 2929,
2946
    SUB_Fp80m32 = 2930,
2947
    SUB_Fp80m64 = 2931,
2948
    SUB_FpI16m32  = 2932,
2949
    SUB_FpI16m64  = 2933,
2950
    SUB_FpI16m80  = 2934,
2951
    SUB_FpI32m32  = 2935,
2952
    SUB_FpI32m64  = 2936,
2953
    SUB_FpI32m80  = 2937,
2954
    SUB_FrST0 = 2938,
2955
    SWAPGS  = 2939,
2956
    SYSCALL = 2940,
2957
    SYSENTER  = 2941,
2958
    SYSEXIT = 2942,
2959
    SYSEXIT64 = 2943,
2960
    SYSRET  = 2944,
2961
    SYSRET64  = 2945,
2962
    T1MSKC32rm  = 2946,
2963
    T1MSKC32rr  = 2947,
2964
    T1MSKC64rm  = 2948,
2965
    T1MSKC64rr  = 2949,
2966
    TAILJMPd  = 2950,
2967
    TAILJMPd64  = 2951,
2968
    TAILJMPd64_REX  = 2952,
2969
    TAILJMPm  = 2953,
2970
    TAILJMPm64  = 2954,
2971
    TAILJMPm64_REX  = 2955,
2972
    TAILJMPr  = 2956,
2973
    TAILJMPr64  = 2957,
2974
    TAILJMPr64_REX  = 2958,
2975
    TCRETURNdi  = 2959,
2976
    TCRETURNdi64  = 2960,
2977
    TCRETURNmi  = 2961,
2978
    TCRETURNmi64  = 2962,
2979
    TCRETURNri  = 2963,
2980
    TCRETURNri64  = 2964,
2981
    TEST16i16 = 2965,
2982
    TEST16mi  = 2966,
2983
    TEST16ri  = 2967,
2984
    TEST16rm  = 2968,
2985
    TEST16rr  = 2969,
2986
    TEST32i32 = 2970,
2987
    TEST32mi  = 2971,
2988
    TEST32ri  = 2972,
2989
    TEST32rm  = 2973,
2990
    TEST32rr  = 2974,
2991
    TEST64i32 = 2975,
2992
    TEST64mi32  = 2976,
2993
    TEST64ri32  = 2977,
2994
    TEST64rm  = 2978,
2995
    TEST64rr  = 2979,
2996
    TEST8i8 = 2980,
2997
    TEST8mi = 2981,
2998
    TEST8ri = 2982,
2999
    TEST8ri_NOREX = 2983,
3000
    TEST8rm = 2984,
3001
    TEST8rr = 2985,
3002
    TLSCall_32  = 2986,
3003
    TLSCall_64  = 2987,
3004
    TLS_addr32  = 2988,
3005
    TLS_addr64  = 2989,
3006
    TLS_base_addr32 = 2990,
3007
    TLS_base_addr64 = 2991,
3008
    TRAP  = 2992,
3009
    TST_F = 2993,
3010
    TST_Fp32  = 2994,
3011
    TST_Fp64  = 2995,
3012
    TST_Fp80  = 2996,
3013
    TZCNT16rm = 2997,
3014
    TZCNT16rr = 2998,
3015
    TZCNT32rm = 2999,
3016
    TZCNT32rr = 3000,
3017
    TZCNT64rm = 3001,
3018
    TZCNT64rr = 3002,
3019
    TZMSK32rm = 3003,
3020
    TZMSK32rr = 3004,
3021
    TZMSK64rm = 3005,
3022
    TZMSK64rr = 3006,
3023
    UCOMISDrm = 3007,
3024
    UCOMISDrr = 3008,
3025
    UCOMISSrm = 3009,
3026
    UCOMISSrr = 3010,
3027
    UCOM_FIPr = 3011,
3028
    UCOM_FIr  = 3012,
3029
    UCOM_FPPr = 3013,
3030
    UCOM_FPr  = 3014,
3031
    UCOM_FpIr32 = 3015,
3032
    UCOM_FpIr64 = 3016,
3033
    UCOM_FpIr80 = 3017,
3034
    UCOM_Fpr32  = 3018,
3035
    UCOM_Fpr64  = 3019,
3036
    UCOM_Fpr80  = 3020,
3037
    UCOM_Fr = 3021,
3038
    UD2B  = 3022,
3039
    UNPCKHPDrm  = 3023,
3040
    UNPCKHPDrr  = 3024,
3041
    UNPCKHPSrm  = 3025,
3042
    UNPCKHPSrr  = 3026,
3043
    UNPCKLPDrm  = 3027,
3044
    UNPCKLPDrr  = 3028,
3045
    UNPCKLPSrm  = 3029,
3046
    UNPCKLPSrr  = 3030,
3047
    VAARG_64  = 3031,
3048
    VADDPDYrm = 3032,
3049
    VADDPDYrr = 3033,
3050
    VADDPDZ128rm  = 3034,
3051
    VADDPDZ128rmb = 3035,
3052
    VADDPDZ128rmbk  = 3036,
3053
    VADDPDZ128rmbkz = 3037,
3054
    VADDPDZ128rmk = 3038,
3055
    VADDPDZ128rmkz  = 3039,
3056
    VADDPDZ128rr  = 3040,
3057
    VADDPDZ128rrk = 3041,
3058
    VADDPDZ128rrkz  = 3042,
3059
    VADDPDZ256rm  = 3043,
3060
    VADDPDZ256rmb = 3044,
3061
    VADDPDZ256rmbk  = 3045,
3062
    VADDPDZ256rmbkz = 3046,
3063
    VADDPDZ256rmk = 3047,
3064
    VADDPDZ256rmkz  = 3048,
3065
    VADDPDZ256rr  = 3049,
3066
    VADDPDZ256rrk = 3050,
3067
    VADDPDZ256rrkz  = 3051,
3068
    VADDPDZrb = 3052,
3069
    VADDPDZrbk  = 3053,
3070
    VADDPDZrbkz = 3054,
3071
    VADDPDZrm = 3055,
3072
    VADDPDZrmb  = 3056,
3073
    VADDPDZrmbk = 3057,
3074
    VADDPDZrmbkz  = 3058,
3075
    VADDPDZrmk  = 3059,
3076
    VADDPDZrmkz = 3060,
3077
    VADDPDZrr = 3061,
3078
    VADDPDZrrk  = 3062,
3079
    VADDPDZrrkz = 3063,
3080
    VADDPDrm  = 3064,
3081
    VADDPDrr  = 3065,
3082
    VADDPSYrm = 3066,
3083
    VADDPSYrr = 3067,
3084
    VADDPSZ128rm  = 3068,
3085
    VADDPSZ128rmb = 3069,
3086
    VADDPSZ128rmbk  = 3070,
3087
    VADDPSZ128rmbkz = 3071,
3088
    VADDPSZ128rmk = 3072,
3089
    VADDPSZ128rmkz  = 3073,
3090
    VADDPSZ128rr  = 3074,
3091
    VADDPSZ128rrk = 3075,
3092
    VADDPSZ128rrkz  = 3076,
3093
    VADDPSZ256rm  = 3077,
3094
    VADDPSZ256rmb = 3078,
3095
    VADDPSZ256rmbk  = 3079,
3096
    VADDPSZ256rmbkz = 3080,
3097
    VADDPSZ256rmk = 3081,
3098
    VADDPSZ256rmkz  = 3082,
3099
    VADDPSZ256rr  = 3083,
3100
    VADDPSZ256rrk = 3084,
3101
    VADDPSZ256rrkz  = 3085,
3102
    VADDPSZrb = 3086,
3103
    VADDPSZrbk  = 3087,
3104
    VADDPSZrbkz = 3088,
3105
    VADDPSZrm = 3089,
3106
    VADDPSZrmb  = 3090,
3107
    VADDPSZrmbk = 3091,
3108
    VADDPSZrmbkz  = 3092,
3109
    VADDPSZrmk  = 3093,
3110
    VADDPSZrmkz = 3094,
3111
    VADDPSZrr = 3095,
3112
    VADDPSZrrk  = 3096,
3113
    VADDPSZrrkz = 3097,
3114
    VADDPSrm  = 3098,
3115
    VADDPSrr  = 3099,
3116
    VADDSDZrm = 3100,
3117
    VADDSDZrm_Int = 3101,
3118
    VADDSDZrm_Intk  = 3102,
3119
    VADDSDZrm_Intkz = 3103,
3120
    VADDSDZrr = 3104,
3121
    VADDSDZrr_Int = 3105,
3122
    VADDSDZrr_Intk  = 3106,
3123
    VADDSDZrr_Intkz = 3107,
3124
    VADDSDZrrb  = 3108,
3125
    VADDSDZrrbk = 3109,
3126
    VADDSDZrrbkz  = 3110,
3127
    VADDSDrm  = 3111,
3128
    VADDSDrm_Int  = 3112,
3129
    VADDSDrr  = 3113,
3130
    VADDSDrr_Int  = 3114,
3131
    VADDSSZrm = 3115,
3132
    VADDSSZrm_Int = 3116,
3133
    VADDSSZrm_Intk  = 3117,
3134
    VADDSSZrm_Intkz = 3118,
3135
    VADDSSZrr = 3119,
3136
    VADDSSZrr_Int = 3120,
3137
    VADDSSZrr_Intk  = 3121,
3138
    VADDSSZrr_Intkz = 3122,
3139
    VADDSSZrrb  = 3123,
3140
    VADDSSZrrbk = 3124,
3141
    VADDSSZrrbkz  = 3125,
3142
    VADDSSrm  = 3126,
3143
    VADDSSrm_Int  = 3127,
3144
    VADDSSrr  = 3128,
3145
    VADDSSrr_Int  = 3129,
3146
    VADDSUBPDYrm  = 3130,
3147
    VADDSUBPDYrr  = 3131,
3148
    VADDSUBPDrm = 3132,
3149
    VADDSUBPDrr = 3133,
3150
    VADDSUBPSYrm  = 3134,
3151
    VADDSUBPSYrr  = 3135,
3152
    VADDSUBPSrm = 3136,
3153
    VADDSUBPSrr = 3137,
3154
    VAESDECLASTrm = 3138,
3155
    VAESDECLASTrr = 3139,
3156
    VAESDECrm = 3140,
3157
    VAESDECrr = 3141,
3158
    VAESENCLASTrm = 3142,
3159
    VAESENCLASTrr = 3143,
3160
    VAESENCrm = 3144,
3161
    VAESENCrr = 3145,
3162
    VAESIMCrm = 3146,
3163
    VAESIMCrr = 3147,
3164
    VAESKEYGENASSIST128rm = 3148,
3165
    VAESKEYGENASSIST128rr = 3149,
3166
    VALIGNDZ128rmbi = 3150,
3167
    VALIGNDZ128rmbik  = 3151,
3168
    VALIGNDZ128rmbikz = 3152,
3169
    VALIGNDZ128rmi  = 3153,
3170
    VALIGNDZ128rmik = 3154,
3171
    VALIGNDZ128rmikz  = 3155,
3172
    VALIGNDZ128rri  = 3156,
3173
    VALIGNDZ128rrik = 3157,
3174
    VALIGNDZ128rrikz  = 3158,
3175
    VALIGNDZ256rmbi = 3159,
3176
    VALIGNDZ256rmbik  = 3160,
3177
    VALIGNDZ256rmbikz = 3161,
3178
    VALIGNDZ256rmi  = 3162,
3179
    VALIGNDZ256rmik = 3163,
3180
    VALIGNDZ256rmikz  = 3164,
3181
    VALIGNDZ256rri  = 3165,
3182
    VALIGNDZ256rrik = 3166,
3183
    VALIGNDZ256rrikz  = 3167,
3184
    VALIGNDZrmbi  = 3168,
3185
    VALIGNDZrmbik = 3169,
3186
    VALIGNDZrmbikz  = 3170,
3187
    VALIGNDZrmi = 3171,
3188
    VALIGNDZrmik  = 3172,
3189
    VALIGNDZrmikz = 3173,
3190
    VALIGNDZrri = 3174,
3191
    VALIGNDZrrik  = 3175,
3192
    VALIGNDZrrikz = 3176,
3193
    VALIGNQZ128rmbi = 3177,
3194
    VALIGNQZ128rmbik  = 3178,
3195
    VALIGNQZ128rmbikz = 3179,
3196
    VALIGNQZ128rmi  = 3180,
3197
    VALIGNQZ128rmik = 3181,
3198
    VALIGNQZ128rmikz  = 3182,
3199
    VALIGNQZ128rri  = 3183,
3200
    VALIGNQZ128rrik = 3184,
3201
    VALIGNQZ128rrikz  = 3185,
3202
    VALIGNQZ256rmbi = 3186,
3203
    VALIGNQZ256rmbik  = 3187,
3204
    VALIGNQZ256rmbikz = 3188,
3205
    VALIGNQZ256rmi  = 3189,
3206
    VALIGNQZ256rmik = 3190,
3207
    VALIGNQZ256rmikz  = 3191,
3208
    VALIGNQZ256rri  = 3192,
3209
    VALIGNQZ256rrik = 3193,
3210
    VALIGNQZ256rrikz  = 3194,
3211
    VALIGNQZrmbi  = 3195,
3212
    VALIGNQZrmbik = 3196,
3213
    VALIGNQZrmbikz  = 3197,
3214
    VALIGNQZrmi = 3198,
3215
    VALIGNQZrmik  = 3199,
3216
    VALIGNQZrmikz = 3200,
3217
    VALIGNQZrri = 3201,
3218
    VALIGNQZrrik  = 3202,
3219
    VALIGNQZrrikz = 3203,
3220
    VANDNPDYrm  = 3204,
3221
    VANDNPDYrr  = 3205,
3222
    VANDNPDZ128rm = 3206,
3223
    VANDNPDZ128rmb  = 3207,
3224
    VANDNPDZ128rmbk = 3208,
3225
    VANDNPDZ128rmbkz  = 3209,
3226
    VANDNPDZ128rmk  = 3210,
3227
    VANDNPDZ128rmkz = 3211,
3228
    VANDNPDZ128rr = 3212,
3229
    VANDNPDZ128rrk  = 3213,
3230
    VANDNPDZ128rrkz = 3214,
3231
    VANDNPDZ256rm = 3215,
3232
    VANDNPDZ256rmb  = 3216,
3233
    VANDNPDZ256rmbk = 3217,
3234
    VANDNPDZ256rmbkz  = 3218,
3235
    VANDNPDZ256rmk  = 3219,
3236
    VANDNPDZ256rmkz = 3220,
3237
    VANDNPDZ256rr = 3221,
3238
    VANDNPDZ256rrk  = 3222,
3239
    VANDNPDZ256rrkz = 3223,
3240
    VANDNPDZrm  = 3224,
3241
    VANDNPDZrmb = 3225,
3242
    VANDNPDZrmbk  = 3226,
3243
    VANDNPDZrmbkz = 3227,
3244
    VANDNPDZrmk = 3228,
3245
    VANDNPDZrmkz  = 3229,
3246
    VANDNPDZrr  = 3230,
3247
    VANDNPDZrrk = 3231,
3248
    VANDNPDZrrkz  = 3232,
3249
    VANDNPDrm = 3233,
3250
    VANDNPDrr = 3234,
3251
    VANDNPSYrm  = 3235,
3252
    VANDNPSYrr  = 3236,
3253
    VANDNPSZ128rm = 3237,
3254
    VANDNPSZ128rmb  = 3238,
3255
    VANDNPSZ128rmbk = 3239,
3256
    VANDNPSZ128rmbkz  = 3240,
3257
    VANDNPSZ128rmk  = 3241,
3258
    VANDNPSZ128rmkz = 3242,
3259
    VANDNPSZ128rr = 3243,
3260
    VANDNPSZ128rrk  = 3244,
3261
    VANDNPSZ128rrkz = 3245,
3262
    VANDNPSZ256rm = 3246,
3263
    VANDNPSZ256rmb  = 3247,
3264
    VANDNPSZ256rmbk = 3248,
3265
    VANDNPSZ256rmbkz  = 3249,
3266
    VANDNPSZ256rmk  = 3250,
3267
    VANDNPSZ256rmkz = 3251,
3268
    VANDNPSZ256rr = 3252,
3269
    VANDNPSZ256rrk  = 3253,
3270
    VANDNPSZ256rrkz = 3254,
3271
    VANDNPSZrm  = 3255,
3272
    VANDNPSZrmb = 3256,
3273
    VANDNPSZrmbk  = 3257,
3274
    VANDNPSZrmbkz = 3258,
3275
    VANDNPSZrmk = 3259,
3276
    VANDNPSZrmkz  = 3260,
3277
    VANDNPSZrr  = 3261,
3278
    VANDNPSZrrk = 3262,
3279
    VANDNPSZrrkz  = 3263,
3280
    VANDNPSrm = 3264,
3281
    VANDNPSrr = 3265,
3282
    VANDPDYrm = 3266,
3283
    VANDPDYrr = 3267,
3284
    VANDPDZ128rm  = 3268,
3285
    VANDPDZ128rmb = 3269,
3286
    VANDPDZ128rmbk  = 3270,
3287
    VANDPDZ128rmbkz = 3271,
3288
    VANDPDZ128rmk = 3272,
3289
    VANDPDZ128rmkz  = 3273,
3290
    VANDPDZ128rr  = 3274,
3291
    VANDPDZ128rrk = 3275,
3292
    VANDPDZ128rrkz  = 3276,
3293
    VANDPDZ256rm  = 3277,
3294
    VANDPDZ256rmb = 3278,
3295
    VANDPDZ256rmbk  = 3279,
3296
    VANDPDZ256rmbkz = 3280,
3297
    VANDPDZ256rmk = 3281,
3298
    VANDPDZ256rmkz  = 3282,
3299
    VANDPDZ256rr  = 3283,
3300
    VANDPDZ256rrk = 3284,
3301
    VANDPDZ256rrkz  = 3285,
3302
    VANDPDZrm = 3286,
3303
    VANDPDZrmb  = 3287,
3304
    VANDPDZrmbk = 3288,
3305
    VANDPDZrmbkz  = 3289,
3306
    VANDPDZrmk  = 3290,
3307
    VANDPDZrmkz = 3291,
3308
    VANDPDZrr = 3292,
3309
    VANDPDZrrk  = 3293,
3310
    VANDPDZrrkz = 3294,
3311
    VANDPDrm  = 3295,
3312
    VANDPDrr  = 3296,
3313
    VANDPSYrm = 3297,
3314
    VANDPSYrr = 3298,
3315
    VANDPSZ128rm  = 3299,
3316
    VANDPSZ128rmb = 3300,
3317
    VANDPSZ128rmbk  = 3301,
3318
    VANDPSZ128rmbkz = 3302,
3319
    VANDPSZ128rmk = 3303,
3320
    VANDPSZ128rmkz  = 3304,
3321
    VANDPSZ128rr  = 3305,
3322
    VANDPSZ128rrk = 3306,
3323
    VANDPSZ128rrkz  = 3307,
3324
    VANDPSZ256rm  = 3308,
3325
    VANDPSZ256rmb = 3309,
3326
    VANDPSZ256rmbk  = 3310,
3327
    VANDPSZ256rmbkz = 3311,
3328
    VANDPSZ256rmk = 3312,
3329
    VANDPSZ256rmkz  = 3313,
3330
    VANDPSZ256rr  = 3314,
3331
    VANDPSZ256rrk = 3315,
3332
    VANDPSZ256rrkz  = 3316,
3333
    VANDPSZrm = 3317,
3334
    VANDPSZrmb  = 3318,
3335
    VANDPSZrmbk = 3319,
3336
    VANDPSZrmbkz  = 3320,
3337
    VANDPSZrmk  = 3321,
3338
    VANDPSZrmkz = 3322,
3339
    VANDPSZrr = 3323,
3340
    VANDPSZrrk  = 3324,
3341
    VANDPSZrrkz = 3325,
3342
    VANDPSrm  = 3326,
3343
    VANDPSrr  = 3327,
3344
    VASTART_SAVE_XMM_REGS = 3328,
3345
    VBLENDMPDZ128rm = 3329,
3346
    VBLENDMPDZ128rmb  = 3330,
3347
    VBLENDMPDZ128rmbk = 3331,
3348
    VBLENDMPDZ128rmk  = 3332,
3349
    VBLENDMPDZ128rmkz = 3333,
3350
    VBLENDMPDZ128rr = 3334,
3351
    VBLENDMPDZ128rrk  = 3335,
3352
    VBLENDMPDZ128rrkz = 3336,
3353
    VBLENDMPDZ256rm = 3337,
3354
    VBLENDMPDZ256rmb  = 3338,
3355
    VBLENDMPDZ256rmbk = 3339,
3356
    VBLENDMPDZ256rmk  = 3340,
3357
    VBLENDMPDZ256rmkz = 3341,
3358
    VBLENDMPDZ256rr = 3342,
3359
    VBLENDMPDZ256rrk  = 3343,
3360
    VBLENDMPDZ256rrkz = 3344,
3361
    VBLENDMPDZrm  = 3345,
3362
    VBLENDMPDZrmb = 3346,
3363
    VBLENDMPDZrmbk  = 3347,
3364
    VBLENDMPDZrmk = 3348,
3365
    VBLENDMPDZrmkz  = 3349,
3366
    VBLENDMPDZrr  = 3350,
3367
    VBLENDMPDZrrk = 3351,
3368
    VBLENDMPDZrrkz  = 3352,
3369
    VBLENDMPSZ128rm = 3353,
3370
    VBLENDMPSZ128rmb  = 3354,
3371
    VBLENDMPSZ128rmbk = 3355,
3372
    VBLENDMPSZ128rmk  = 3356,
3373
    VBLENDMPSZ128rmkz = 3357,
3374
    VBLENDMPSZ128rr = 3358,
3375
    VBLENDMPSZ128rrk  = 3359,
3376
    VBLENDMPSZ128rrkz = 3360,
3377
    VBLENDMPSZ256rm = 3361,
3378
    VBLENDMPSZ256rmb  = 3362,
3379
    VBLENDMPSZ256rmbk = 3363,
3380
    VBLENDMPSZ256rmk  = 3364,
3381
    VBLENDMPSZ256rmkz = 3365,
3382
    VBLENDMPSZ256rr = 3366,
3383
    VBLENDMPSZ256rrk  = 3367,
3384
    VBLENDMPSZ256rrkz = 3368,
3385
    VBLENDMPSZrm  = 3369,
3386
    VBLENDMPSZrmb = 3370,
3387
    VBLENDMPSZrmbk  = 3371,
3388
    VBLENDMPSZrmk = 3372,
3389
    VBLENDMPSZrmkz  = 3373,
3390
    VBLENDMPSZrr  = 3374,
3391
    VBLENDMPSZrrk = 3375,
3392
    VBLENDMPSZrrkz  = 3376,
3393
    VBLENDPDYrmi  = 3377,
3394
    VBLENDPDYrri  = 3378,
3395
    VBLENDPDrmi = 3379,
3396
    VBLENDPDrri = 3380,
3397
    VBLENDPSYrmi  = 3381,
3398
    VBLENDPSYrri  = 3382,
3399
    VBLENDPSrmi = 3383,
3400
    VBLENDPSrri = 3384,
3401
    VBLENDVPDYrm  = 3385,
3402
    VBLENDVPDYrr  = 3386,
3403
    VBLENDVPDrm = 3387,
3404
    VBLENDVPDrr = 3388,
3405
    VBLENDVPSYrm  = 3389,
3406
    VBLENDVPSYrr  = 3390,
3407
    VBLENDVPSrm = 3391,
3408
    VBLENDVPSrr = 3392,
3409
    VBROADCASTF128  = 3393,
3410
    VBROADCASTF32X4Z256rm = 3394,
3411
    VBROADCASTF32X4Z256rmk  = 3395,
3412
    VBROADCASTF32X4Z256rmkz = 3396,
3413
    VBROADCASTF32X4rm = 3397,
3414
    VBROADCASTF32X4rmk  = 3398,
3415
    VBROADCASTF32X4rmkz = 3399,
3416
    VBROADCASTF32X8rm = 3400,
3417
    VBROADCASTF32X8rmk  = 3401,
3418
    VBROADCASTF32X8rmkz = 3402,
3419
    VBROADCASTF64X2Z128rm = 3403,
3420
    VBROADCASTF64X2Z128rmk  = 3404,
3421
    VBROADCASTF64X2Z128rmkz = 3405,
3422
    VBROADCASTF64X2rm = 3406,
3423
    VBROADCASTF64X2rmk  = 3407,
3424
    VBROADCASTF64X2rmkz = 3408,
3425
    VBROADCASTF64X4rm = 3409,
3426
    VBROADCASTF64X4rmk  = 3410,
3427
    VBROADCASTF64X4rmkz = 3411,
3428
    VBROADCASTI128  = 3412,
3429
    VBROADCASTI32X4Z256rm = 3413,
3430
    VBROADCASTI32X4Z256rmk  = 3414,
3431
    VBROADCASTI32X4Z256rmkz = 3415,
3432
    VBROADCASTI32X4rm = 3416,
3433
    VBROADCASTI32X4rmk  = 3417,
3434
    VBROADCASTI32X4rmkz = 3418,
3435
    VBROADCASTI32X8rm = 3419,
3436
    VBROADCASTI32X8rmk  = 3420,
3437
    VBROADCASTI32X8rmkz = 3421,
3438
    VBROADCASTI64X2Z128rm = 3422,
3439
    VBROADCASTI64X2Z128rmk  = 3423,
3440
    VBROADCASTI64X2Z128rmkz = 3424,
3441
    VBROADCASTI64X2rm = 3425,
3442
    VBROADCASTI64X2rmk  = 3426,
3443
    VBROADCASTI64X2rmkz = 3427,
3444
    VBROADCASTI64X4rm = 3428,
3445
    VBROADCASTI64X4rmk  = 3429,
3446
    VBROADCASTI64X4rmkz = 3430,
3447
    VBROADCASTSDYrm = 3431,
3448
    VBROADCASTSDYrr = 3432,
3449
    VBROADCASTSDZ256m = 3433,
3450
    VBROADCASTSDZ256mk  = 3434,
3451
    VBROADCASTSDZ256mkz = 3435,
3452
    VBROADCASTSDZ256r = 3436,
3453
    VBROADCASTSDZ256rk  = 3437,
3454
    VBROADCASTSDZ256rkz = 3438,
3455
    VBROADCASTSDZm  = 3439,
3456
    VBROADCASTSDZmk = 3440,
3457
    VBROADCASTSDZmkz  = 3441,
3458
    VBROADCASTSDZr  = 3442,
3459
    VBROADCASTSDZrk = 3443,
3460
    VBROADCASTSDZrkz  = 3444,
3461
    VBROADCASTSSYrm = 3445,
3462
    VBROADCASTSSYrr = 3446,
3463
    VBROADCASTSSZ128m = 3447,
3464
    VBROADCASTSSZ128mk  = 3448,
3465
    VBROADCASTSSZ128mkz = 3449,
3466
    VBROADCASTSSZ128r = 3450,
3467
    VBROADCASTSSZ128rk  = 3451,
3468
    VBROADCASTSSZ128rkz = 3452,
3469
    VBROADCASTSSZ256m = 3453,
3470
    VBROADCASTSSZ256mk  = 3454,
3471
    VBROADCASTSSZ256mkz = 3455,
3472
    VBROADCASTSSZ256r = 3456,
3473
    VBROADCASTSSZ256rk  = 3457,
3474
    VBROADCASTSSZ256rkz = 3458,
3475
    VBROADCASTSSZm  = 3459,
3476
    VBROADCASTSSZmk = 3460,
3477
    VBROADCASTSSZmkz  = 3461,
3478
    VBROADCASTSSZr  = 3462,
3479
    VBROADCASTSSZrk = 3463,
3480
    VBROADCASTSSZrkz  = 3464,
3481
    VBROADCASTSSrm  = 3465,
3482
    VBROADCASTSSrr  = 3466,
3483
    VCMPPDYrmi  = 3467,
3484
    VCMPPDYrmi_alt  = 3468,
3485
    VCMPPDYrri  = 3469,
3486
    VCMPPDYrri_alt  = 3470,
3487
    VCMPPDZ128rmbi  = 3471,
3488
    VCMPPDZ128rmbi_alt  = 3472,
3489
    VCMPPDZ128rmbi_altk = 3473,
3490
    VCMPPDZ128rmbik = 3474,
3491
    VCMPPDZ128rmi = 3475,
3492
    VCMPPDZ128rmi_alt = 3476,
3493
    VCMPPDZ128rmi_altk  = 3477,
3494
    VCMPPDZ128rmik  = 3478,
3495
    VCMPPDZ128rri = 3479,
3496
    VCMPPDZ128rri_alt = 3480,
3497
    VCMPPDZ128rri_altk  = 3481,
3498
    VCMPPDZ128rrik  = 3482,
3499
    VCMPPDZ256rmbi  = 3483,
3500
    VCMPPDZ256rmbi_alt  = 3484,
3501
    VCMPPDZ256rmbi_altk = 3485,
3502
    VCMPPDZ256rmbik = 3486,
3503
    VCMPPDZ256rmi = 3487,
3504
    VCMPPDZ256rmi_alt = 3488,
3505
    VCMPPDZ256rmi_altk  = 3489,
3506
    VCMPPDZ256rmik  = 3490,
3507
    VCMPPDZ256rri = 3491,
3508
    VCMPPDZ256rri_alt = 3492,
3509
    VCMPPDZ256rri_altk  = 3493,
3510
    VCMPPDZ256rrik  = 3494,
3511
    VCMPPDZrmbi = 3495,
3512
    VCMPPDZrmbi_alt = 3496,
3513
    VCMPPDZrmbi_altk  = 3497,
3514
    VCMPPDZrmbik  = 3498,
3515
    VCMPPDZrmi  = 3499,
3516
    VCMPPDZrmi_alt  = 3500,
3517
    VCMPPDZrmi_altk = 3501,
3518
    VCMPPDZrmik = 3502,
3519
    VCMPPDZrri  = 3503,
3520
    VCMPPDZrri_alt  = 3504,
3521
    VCMPPDZrri_altk = 3505,
3522
    VCMPPDZrrib = 3506,
3523
    VCMPPDZrrib_alt = 3507,
3524
    VCMPPDZrrib_altk  = 3508,
3525
    VCMPPDZrribk  = 3509,
3526
    VCMPPDZrrik = 3510,
3527
    VCMPPDrmi = 3511,
3528
    VCMPPDrmi_alt = 3512,
3529
    VCMPPDrri = 3513,
3530
    VCMPPDrri_alt = 3514,
3531
    VCMPPSYrmi  = 3515,
3532
    VCMPPSYrmi_alt  = 3516,
3533
    VCMPPSYrri  = 3517,
3534
    VCMPPSYrri_alt  = 3518,
3535
    VCMPPSZ128rmbi  = 3519,
3536
    VCMPPSZ128rmbi_alt  = 3520,
3537
    VCMPPSZ128rmbi_altk = 3521,
3538
    VCMPPSZ128rmbik = 3522,
3539
    VCMPPSZ128rmi = 3523,
3540
    VCMPPSZ128rmi_alt = 3524,
3541
    VCMPPSZ128rmi_altk  = 3525,
3542
    VCMPPSZ128rmik  = 3526,
3543
    VCMPPSZ128rri = 3527,
3544
    VCMPPSZ128rri_alt = 3528,
3545
    VCMPPSZ128rri_altk  = 3529,
3546
    VCMPPSZ128rrik  = 3530,
3547
    VCMPPSZ256rmbi  = 3531,
3548
    VCMPPSZ256rmbi_alt  = 3532,
3549
    VCMPPSZ256rmbi_altk = 3533,
3550
    VCMPPSZ256rmbik = 3534,
3551
    VCMPPSZ256rmi = 3535,
3552
    VCMPPSZ256rmi_alt = 3536,
3553
    VCMPPSZ256rmi_altk  = 3537,
3554
    VCMPPSZ256rmik  = 3538,
3555
    VCMPPSZ256rri = 3539,
3556
    VCMPPSZ256rri_alt = 3540,
3557
    VCMPPSZ256rri_altk  = 3541,
3558
    VCMPPSZ256rrik  = 3542,
3559
    VCMPPSZrmbi = 3543,
3560
    VCMPPSZrmbi_alt = 3544,
3561
    VCMPPSZrmbi_altk  = 3545,
3562
    VCMPPSZrmbik  = 3546,
3563
    VCMPPSZrmi  = 3547,
3564
    VCMPPSZrmi_alt  = 3548,
3565
    VCMPPSZrmi_altk = 3549,
3566
    VCMPPSZrmik = 3550,
3567
    VCMPPSZrri  = 3551,
3568
    VCMPPSZrri_alt  = 3552,
3569
    VCMPPSZrri_altk = 3553,
3570
    VCMPPSZrrib = 3554,
3571
    VCMPPSZrrib_alt = 3555,
3572
    VCMPPSZrrib_altk  = 3556,
3573
    VCMPPSZrribk  = 3557,
3574
    VCMPPSZrrik = 3558,
3575
    VCMPPSrmi = 3559,
3576
    VCMPPSrmi_alt = 3560,
3577
    VCMPPSrri = 3561,
3578
    VCMPPSrri_alt = 3562,
3579
    VCMPSDZrm = 3563,
3580
    VCMPSDZrm_Int = 3564,
3581
    VCMPSDZrm_Intk  = 3565,
3582
    VCMPSDZrmi_alt  = 3566,
3583
    VCMPSDZrmi_altk = 3567,
3584
    VCMPSDZrr = 3568,
3585
    VCMPSDZrr_Int = 3569,
3586
    VCMPSDZrr_Intk  = 3570,
3587
    VCMPSDZrrb_Int  = 3571,
3588
    VCMPSDZrrb_Intk = 3572,
3589
    VCMPSDZrrb_alt  = 3573,
3590
    VCMPSDZrrb_altk = 3574,
3591
    VCMPSDZrri_alt  = 3575,
3592
    VCMPSDZrri_altk = 3576,
3593
    VCMPSDrm  = 3577,
3594
    VCMPSDrm_alt  = 3578,
3595
    VCMPSDrr  = 3579,
3596
    VCMPSDrr_alt  = 3580,
3597
    VCMPSSZrm = 3581,
3598
    VCMPSSZrm_Int = 3582,
3599
    VCMPSSZrm_Intk  = 3583,
3600
    VCMPSSZrmi_alt  = 3584,
3601
    VCMPSSZrmi_altk = 3585,
3602
    VCMPSSZrr = 3586,
3603
    VCMPSSZrr_Int = 3587,
3604
    VCMPSSZrr_Intk  = 3588,
3605
    VCMPSSZrrb_Int  = 3589,
3606
    VCMPSSZrrb_Intk = 3590,
3607
    VCMPSSZrrb_alt  = 3591,
3608
    VCMPSSZrrb_altk = 3592,
3609
    VCMPSSZrri_alt  = 3593,
3610
    VCMPSSZrri_altk = 3594,
3611
    VCMPSSrm  = 3595,
3612
    VCMPSSrm_alt  = 3596,
3613
    VCMPSSrr  = 3597,
3614
    VCMPSSrr_alt  = 3598,
3615
    VCOMISDZrb  = 3599,
3616
    VCOMISDZrm  = 3600,
3617
    VCOMISDZrr  = 3601,
3618
    VCOMISDrm = 3602,
3619
    VCOMISDrr = 3603,
3620
    VCOMISSZrb  = 3604,
3621
    VCOMISSZrm  = 3605,
3622
    VCOMISSZrr  = 3606,
3623
    VCOMISSrm = 3607,
3624
    VCOMISSrr = 3608,
3625
    VCOMPRESSPDZ128mr = 3609,
3626
    VCOMPRESSPDZ128mrk  = 3610,
3627
    VCOMPRESSPDZ128rr = 3611,
3628
    VCOMPRESSPDZ128rrk  = 3612,
3629
    VCOMPRESSPDZ128rrkz = 3613,
3630
    VCOMPRESSPDZ256mr = 3614,
3631
    VCOMPRESSPDZ256mrk  = 3615,
3632
    VCOMPRESSPDZ256rr = 3616,
3633
    VCOMPRESSPDZ256rrk  = 3617,
3634
    VCOMPRESSPDZ256rrkz = 3618,
3635
    VCOMPRESSPDZmr  = 3619,
3636
    VCOMPRESSPDZmrk = 3620,
3637
    VCOMPRESSPDZrr  = 3621,
3638
    VCOMPRESSPDZrrk = 3622,
3639
    VCOMPRESSPDZrrkz  = 3623,
3640
    VCOMPRESSPSZ128mr = 3624,
3641
    VCOMPRESSPSZ128mrk  = 3625,
3642
    VCOMPRESSPSZ128rr = 3626,
3643
    VCOMPRESSPSZ128rrk  = 3627,
3644
    VCOMPRESSPSZ128rrkz = 3628,
3645
    VCOMPRESSPSZ256mr = 3629,
3646
    VCOMPRESSPSZ256mrk  = 3630,
3647
    VCOMPRESSPSZ256rr = 3631,
3648
    VCOMPRESSPSZ256rrk  = 3632,
3649
    VCOMPRESSPSZ256rrkz = 3633,
3650
    VCOMPRESSPSZmr  = 3634,
3651
    VCOMPRESSPSZmrk = 3635,
3652
    VCOMPRESSPSZrr  = 3636,
3653
    VCOMPRESSPSZrrk = 3637,
3654
    VCOMPRESSPSZrrkz  = 3638,
3655
    VCVTDQ2PDYrm  = 3639,
3656
    VCVTDQ2PDYrr  = 3640,
3657
    VCVTDQ2PDZ128rm = 3641,
3658
    VCVTDQ2PDZ128rmb  = 3642,
3659
    VCVTDQ2PDZ128rmbk = 3643,
3660
    VCVTDQ2PDZ128rmbkz  = 3644,
3661
    VCVTDQ2PDZ128rmk  = 3645,
3662
    VCVTDQ2PDZ128rmkz = 3646,
3663
    VCVTDQ2PDZ128rr = 3647,
3664
    VCVTDQ2PDZ128rrk  = 3648,
3665
    VCVTDQ2PDZ128rrkz = 3649,
3666
    VCVTDQ2PDZ256rm = 3650,
3667
    VCVTDQ2PDZ256rmb  = 3651,
3668
    VCVTDQ2PDZ256rmbk = 3652,
3669
    VCVTDQ2PDZ256rmbkz  = 3653,
3670
    VCVTDQ2PDZ256rmk  = 3654,
3671
    VCVTDQ2PDZ256rmkz = 3655,
3672
    VCVTDQ2PDZ256rr = 3656,
3673
    VCVTDQ2PDZ256rrk  = 3657,
3674
    VCVTDQ2PDZ256rrkz = 3658,
3675
    VCVTDQ2PDZrm  = 3659,
3676
    VCVTDQ2PDZrmb = 3660,
3677
    VCVTDQ2PDZrmbk  = 3661,
3678
    VCVTDQ2PDZrmbkz = 3662,
3679
    VCVTDQ2PDZrmk = 3663,
3680
    VCVTDQ2PDZrmkz  = 3664,
3681
    VCVTDQ2PDZrr  = 3665,
3682
    VCVTDQ2PDZrrk = 3666,
3683
    VCVTDQ2PDZrrkz  = 3667,
3684
    VCVTDQ2PDrm = 3668,
3685
    VCVTDQ2PDrr = 3669,
3686
    VCVTDQ2PSYrm  = 3670,
3687
    VCVTDQ2PSYrr  = 3671,
3688
    VCVTDQ2PSZ128rm = 3672,
3689
    VCVTDQ2PSZ128rmb  = 3673,
3690
    VCVTDQ2PSZ128rmbk = 3674,
3691
    VCVTDQ2PSZ128rmbkz  = 3675,
3692
    VCVTDQ2PSZ128rmk  = 3676,
3693
    VCVTDQ2PSZ128rmkz = 3677,
3694
    VCVTDQ2PSZ128rr = 3678,
3695
    VCVTDQ2PSZ128rrk  = 3679,
3696
    VCVTDQ2PSZ128rrkz = 3680,
3697
    VCVTDQ2PSZ256rm = 3681,
3698
    VCVTDQ2PSZ256rmb  = 3682,
3699
    VCVTDQ2PSZ256rmbk = 3683,
3700
    VCVTDQ2PSZ256rmbkz  = 3684,
3701
    VCVTDQ2PSZ256rmk  = 3685,
3702
    VCVTDQ2PSZ256rmkz = 3686,
3703
    VCVTDQ2PSZ256rr = 3687,
3704
    VCVTDQ2PSZ256rrk  = 3688,
3705
    VCVTDQ2PSZ256rrkz = 3689,
3706
    VCVTDQ2PSZrm  = 3690,
3707
    VCVTDQ2PSZrmb = 3691,
3708
    VCVTDQ2PSZrmbk  = 3692,
3709
    VCVTDQ2PSZrmbkz = 3693,
3710
    VCVTDQ2PSZrmk = 3694,
3711
    VCVTDQ2PSZrmkz  = 3695,
3712
    VCVTDQ2PSZrr  = 3696,
3713
    VCVTDQ2PSZrrb = 3697,
3714
    VCVTDQ2PSZrrbk  = 3698,
3715
    VCVTDQ2PSZrrbkz = 3699,
3716
    VCVTDQ2PSZrrk = 3700,
3717
    VCVTDQ2PSZrrkz  = 3701,
3718
    VCVTDQ2PSrm = 3702,
3719
    VCVTDQ2PSrr = 3703,
3720
    VCVTPD2DQXrm  = 3704,
3721
    VCVTPD2DQYrm  = 3705,
3722
    VCVTPD2DQYrr  = 3706,
3723
    VCVTPD2DQZ128rm = 3707,
3724
    VCVTPD2DQZ128rmb  = 3708,
3725
    VCVTPD2DQZ128rmbk = 3709,
3726
    VCVTPD2DQZ128rmbkz  = 3710,
3727
    VCVTPD2DQZ128rmk  = 3711,
3728
    VCVTPD2DQZ128rmkz = 3712,
3729
    VCVTPD2DQZ128rr = 3713,
3730
    VCVTPD2DQZ128rrk  = 3714,
3731
    VCVTPD2DQZ128rrkz = 3715,
3732
    VCVTPD2DQZ256rm = 3716,
3733
    VCVTPD2DQZ256rmb  = 3717,
3734
    VCVTPD2DQZ256rmbk = 3718,
3735
    VCVTPD2DQZ256rmbkz  = 3719,
3736
    VCVTPD2DQZ256rmk  = 3720,
3737
    VCVTPD2DQZ256rmkz = 3721,
3738
    VCVTPD2DQZ256rr = 3722,
3739
    VCVTPD2DQZ256rrk  = 3723,
3740
    VCVTPD2DQZ256rrkz = 3724,
3741
    VCVTPD2DQZrm  = 3725,
3742
    VCVTPD2DQZrmb = 3726,
3743
    VCVTPD2DQZrmbk  = 3727,
3744
    VCVTPD2DQZrmbkz = 3728,
3745
    VCVTPD2DQZrmk = 3729,
3746
    VCVTPD2DQZrmkz  = 3730,
3747
    VCVTPD2DQZrr  = 3731,
3748
    VCVTPD2DQZrrb = 3732,
3749
    VCVTPD2DQZrrbk  = 3733,
3750
    VCVTPD2DQZrrbkz = 3734,
3751
    VCVTPD2DQZrrk = 3735,
3752
    VCVTPD2DQZrrkz  = 3736,
3753
    VCVTPD2DQrr = 3737,
3754
    VCVTPD2PSXrm  = 3738,
3755
    VCVTPD2PSYrm  = 3739,
3756
    VCVTPD2PSYrr  = 3740,
3757
    VCVTPD2PSZ128rm = 3741,
3758
    VCVTPD2PSZ128rmb  = 3742,
3759
    VCVTPD2PSZ128rmbk = 3743,
3760
    VCVTPD2PSZ128rmbkz  = 3744,
3761
    VCVTPD2PSZ128rmk  = 3745,
3762
    VCVTPD2PSZ128rmkz = 3746,
3763
    VCVTPD2PSZ128rr = 3747,
3764
    VCVTPD2PSZ128rrk  = 3748,
3765
    VCVTPD2PSZ128rrkz = 3749,
3766
    VCVTPD2PSZ256rm = 3750,
3767
    VCVTPD2PSZ256rmb  = 3751,
3768
    VCVTPD2PSZ256rmbk = 3752,
3769
    VCVTPD2PSZ256rmbkz  = 3753,
3770
    VCVTPD2PSZ256rmk  = 3754,
3771
    VCVTPD2PSZ256rmkz = 3755,
3772
    VCVTPD2PSZ256rr = 3756,
3773
    VCVTPD2PSZ256rrk  = 3757,
3774
    VCVTPD2PSZ256rrkz = 3758,
3775
    VCVTPD2PSZrm  = 3759,
3776
    VCVTPD2PSZrmb = 3760,
3777
    VCVTPD2PSZrmbk  = 3761,
3778
    VCVTPD2PSZrmbkz = 3762,
3779
    VCVTPD2PSZrmk = 3763,
3780
    VCVTPD2PSZrmkz  = 3764,
3781
    VCVTPD2PSZrr  = 3765,
3782
    VCVTPD2PSZrrb = 3766,
3783
    VCVTPD2PSZrrbk  = 3767,
3784
    VCVTPD2PSZrrbkz = 3768,
3785
    VCVTPD2PSZrrk = 3769,
3786
    VCVTPD2PSZrrkz  = 3770,
3787
    VCVTPD2PSrr = 3771,
3788
    VCVTPD2QQZ128rm = 3772,
3789
    VCVTPD2QQZ128rmb  = 3773,
3790
    VCVTPD2QQZ128rmbk = 3774,
3791
    VCVTPD2QQZ128rmbkz  = 3775,
3792
    VCVTPD2QQZ128rmk  = 3776,
3793
    VCVTPD2QQZ128rmkz = 3777,
3794
    VCVTPD2QQZ128rr = 3778,
3795
    VCVTPD2QQZ128rrk  = 3779,
3796
    VCVTPD2QQZ128rrkz = 3780,
3797
    VCVTPD2QQZ256rm = 3781,
3798
    VCVTPD2QQZ256rmb  = 3782,
3799
    VCVTPD2QQZ256rmbk = 3783,
3800
    VCVTPD2QQZ256rmbkz  = 3784,
3801
    VCVTPD2QQZ256rmk  = 3785,
3802
    VCVTPD2QQZ256rmkz = 3786,
3803
    VCVTPD2QQZ256rr = 3787,
3804
    VCVTPD2QQZ256rrk  = 3788,
3805
    VCVTPD2QQZ256rrkz = 3789,
3806
    VCVTPD2QQZrm  = 3790,
3807
    VCVTPD2QQZrmb = 3791,
3808
    VCVTPD2QQZrmbk  = 3792,
3809
    VCVTPD2QQZrmbkz = 3793,
3810
    VCVTPD2QQZrmk = 3794,
3811
    VCVTPD2QQZrmkz  = 3795,
3812
    VCVTPD2QQZrr  = 3796,
3813
    VCVTPD2QQZrrb = 3797,
3814
    VCVTPD2QQZrrbk  = 3798,
3815
    VCVTPD2QQZrrbkz = 3799,
3816
    VCVTPD2QQZrrk = 3800,
3817
    VCVTPD2QQZrrkz  = 3801,
3818
    VCVTPD2UDQZ128rm  = 3802,
3819
    VCVTPD2UDQZ128rmb = 3803,
3820
    VCVTPD2UDQZ128rmbk  = 3804,
3821
    VCVTPD2UDQZ128rmbkz = 3805,
3822
    VCVTPD2UDQZ128rmk = 3806,
3823
    VCVTPD2UDQZ128rmkz  = 3807,
3824
    VCVTPD2UDQZ128rr  = 3808,
3825
    VCVTPD2UDQZ128rrk = 3809,
3826
    VCVTPD2UDQZ128rrkz  = 3810,
3827
    VCVTPD2UDQZ256rm  = 3811,
3828
    VCVTPD2UDQZ256rmb = 3812,
3829
    VCVTPD2UDQZ256rmbk  = 3813,
3830
    VCVTPD2UDQZ256rmbkz = 3814,
3831
    VCVTPD2UDQZ256rmk = 3815,
3832
    VCVTPD2UDQZ256rmkz  = 3816,
3833
    VCVTPD2UDQZ256rr  = 3817,
3834
    VCVTPD2UDQZ256rrk = 3818,
3835
    VCVTPD2UDQZ256rrkz  = 3819,
3836
    VCVTPD2UDQZrm = 3820,
3837
    VCVTPD2UDQZrmb  = 3821,
3838
    VCVTPD2UDQZrmbk = 3822,
3839
    VCVTPD2UDQZrmbkz  = 3823,
3840
    VCVTPD2UDQZrmk  = 3824,
3841
    VCVTPD2UDQZrmkz = 3825,
3842
    VCVTPD2UDQZrr = 3826,
3843
    VCVTPD2UDQZrrb  = 3827,
3844
    VCVTPD2UDQZrrbk = 3828,
3845
    VCVTPD2UDQZrrbkz  = 3829,
3846
    VCVTPD2UDQZrrk  = 3830,
3847
    VCVTPD2UDQZrrkz = 3831,
3848
    VCVTPD2UQQZ128rm  = 3832,
3849
    VCVTPD2UQQZ128rmb = 3833,
3850
    VCVTPD2UQQZ128rmbk  = 3834,
3851
    VCVTPD2UQQZ128rmbkz = 3835,
3852
    VCVTPD2UQQZ128rmk = 3836,
3853
    VCVTPD2UQQZ128rmkz  = 3837,
3854
    VCVTPD2UQQZ128rr  = 3838,
3855
    VCVTPD2UQQZ128rrk = 3839,
3856
    VCVTPD2UQQZ128rrkz  = 3840,
3857
    VCVTPD2UQQZ256rm  = 3841,
3858
    VCVTPD2UQQZ256rmb = 3842,
3859
    VCVTPD2UQQZ256rmbk  = 3843,
3860
    VCVTPD2UQQZ256rmbkz = 3844,
3861
    VCVTPD2UQQZ256rmk = 3845,
3862
    VCVTPD2UQQZ256rmkz  = 3846,
3863
    VCVTPD2UQQZ256rr  = 3847,
3864
    VCVTPD2UQQZ256rrk = 3848,
3865
    VCVTPD2UQQZ256rrkz  = 3849,
3866
    VCVTPD2UQQZrm = 3850,
3867
    VCVTPD2UQQZrmb  = 3851,
3868
    VCVTPD2UQQZrmbk = 3852,
3869
    VCVTPD2UQQZrmbkz  = 3853,
3870
    VCVTPD2UQQZrmk  = 3854,
3871
    VCVTPD2UQQZrmkz = 3855,
3872
    VCVTPD2UQQZrr = 3856,
3873
    VCVTPD2UQQZrrb  = 3857,
3874
    VCVTPD2UQQZrrbk = 3858,
3875
    VCVTPD2UQQZrrbkz  = 3859,
3876
    VCVTPD2UQQZrrk  = 3860,
3877
    VCVTPD2UQQZrrkz = 3861,
3878
    VCVTPH2PSYrm  = 3862,
3879
    VCVTPH2PSYrr  = 3863,
3880
    VCVTPH2PSZ128rm = 3864,
3881
    VCVTPH2PSZ128rmk  = 3865,
3882
    VCVTPH2PSZ128rmkz = 3866,
3883
    VCVTPH2PSZ128rr = 3867,
3884
    VCVTPH2PSZ128rrk  = 3868,
3885
    VCVTPH2PSZ128rrkz = 3869,
3886
    VCVTPH2PSZ256rm = 3870,
3887
    VCVTPH2PSZ256rmk  = 3871,
3888
    VCVTPH2PSZ256rmkz = 3872,
3889
    VCVTPH2PSZ256rr = 3873,
3890
    VCVTPH2PSZ256rrk  = 3874,
3891
    VCVTPH2PSZ256rrkz = 3875,
3892
    VCVTPH2PSZrb  = 3876,
3893
    VCVTPH2PSZrbk = 3877,
3894
    VCVTPH2PSZrbkz  = 3878,
3895
    VCVTPH2PSZrm  = 3879,
3896
    VCVTPH2PSZrmk = 3880,
3897
    VCVTPH2PSZrmkz  = 3881,
3898
    VCVTPH2PSZrr  = 3882,
3899
    VCVTPH2PSZrrk = 3883,
3900
    VCVTPH2PSZrrkz  = 3884,
3901
    VCVTPH2PSrm = 3885,
3902
    VCVTPH2PSrr = 3886,
3903
    VCVTPS2DQYrm  = 3887,
3904
    VCVTPS2DQYrr  = 3888,
3905
    VCVTPS2DQZ128rm = 3889,
3906
    VCVTPS2DQZ128rmb  = 3890,
3907
    VCVTPS2DQZ128rmbk = 3891,
3908
    VCVTPS2DQZ128rmbkz  = 3892,
3909
    VCVTPS2DQZ128rmk  = 3893,
3910
    VCVTPS2DQZ128rmkz = 3894,
3911
    VCVTPS2DQZ128rr = 3895,
3912
    VCVTPS2DQZ128rrk  = 3896,
3913
    VCVTPS2DQZ128rrkz = 3897,
3914
    VCVTPS2DQZ256rm = 3898,
3915
    VCVTPS2DQZ256rmb  = 3899,
3916
    VCVTPS2DQZ256rmbk = 3900,
3917
    VCVTPS2DQZ256rmbkz  = 3901,
3918
    VCVTPS2DQZ256rmk  = 3902,
3919
    VCVTPS2DQZ256rmkz = 3903,
3920
    VCVTPS2DQZ256rr = 3904,
3921
    VCVTPS2DQZ256rrk  = 3905,
3922
    VCVTPS2DQZ256rrkz = 3906,
3923
    VCVTPS2DQZrm  = 3907,
3924
    VCVTPS2DQZrmb = 3908,
3925
    VCVTPS2DQZrmbk  = 3909,
3926
    VCVTPS2DQZrmbkz = 3910,
3927
    VCVTPS2DQZrmk = 3911,
3928
    VCVTPS2DQZrmkz  = 3912,
3929
    VCVTPS2DQZrr  = 3913,
3930
    VCVTPS2DQZrrb = 3914,
3931
    VCVTPS2DQZrrbk  = 3915,
3932
    VCVTPS2DQZrrbkz = 3916,
3933
    VCVTPS2DQZrrk = 3917,
3934
    VCVTPS2DQZrrkz  = 3918,
3935
    VCVTPS2DQrm = 3919,
3936
    VCVTPS2DQrr = 3920,
3937
    VCVTPS2PDYrm  = 3921,
3938
    VCVTPS2PDYrr  = 3922,
3939
    VCVTPS2PDZ128rm = 3923,
3940
    VCVTPS2PDZ128rmb  = 3924,
3941
    VCVTPS2PDZ128rmbk = 3925,
3942
    VCVTPS2PDZ128rmbkz  = 3926,
3943
    VCVTPS2PDZ128rmk  = 3927,
3944
    VCVTPS2PDZ128rmkz = 3928,
3945
    VCVTPS2PDZ128rr = 3929,
3946
    VCVTPS2PDZ128rrk  = 3930,
3947
    VCVTPS2PDZ128rrkz = 3931,
3948
    VCVTPS2PDZ256rm = 3932,
3949
    VCVTPS2PDZ256rmb  = 3933,
3950
    VCVTPS2PDZ256rmbk = 3934,
3951
    VCVTPS2PDZ256rmbkz  = 3935,
3952
    VCVTPS2PDZ256rmk  = 3936,
3953
    VCVTPS2PDZ256rmkz = 3937,
3954
    VCVTPS2PDZ256rr = 3938,
3955
    VCVTPS2PDZ256rrk  = 3939,
3956
    VCVTPS2PDZ256rrkz = 3940,
3957
    VCVTPS2PDZrm  = 3941,
3958
    VCVTPS2PDZrmb = 3942,
3959
    VCVTPS2PDZrmbk  = 3943,
3960
    VCVTPS2PDZrmbkz = 3944,
3961
    VCVTPS2PDZrmk = 3945,
3962
    VCVTPS2PDZrmkz  = 3946,
3963
    VCVTPS2PDZrr  = 3947,
3964
    VCVTPS2PDZrrb = 3948,
3965
    VCVTPS2PDZrrbk  = 3949,
3966
    VCVTPS2PDZrrbkz = 3950,
3967
    VCVTPS2PDZrrk = 3951,
3968
    VCVTPS2PDZrrkz  = 3952,
3969
    VCVTPS2PDrm = 3953,
3970
    VCVTPS2PDrr = 3954,
3971
    VCVTPS2PHYmr  = 3955,
3972
    VCVTPS2PHYrr  = 3956,
3973
    VCVTPS2PHZ128mr = 3957,
3974
    VCVTPS2PHZ128mrk  = 3958,
3975
    VCVTPS2PHZ128rr = 3959,
3976
    VCVTPS2PHZ128rrk  = 3960,
3977
    VCVTPS2PHZ128rrkz = 3961,
3978
    VCVTPS2PHZ256mr = 3962,
3979
    VCVTPS2PHZ256mrk  = 3963,
3980
    VCVTPS2PHZ256rr = 3964,
3981
    VCVTPS2PHZ256rrk  = 3965,
3982
    VCVTPS2PHZ256rrkz = 3966,
3983
    VCVTPS2PHZmr  = 3967,
3984
    VCVTPS2PHZmrk = 3968,
3985
    VCVTPS2PHZrb  = 3969,
3986
    VCVTPS2PHZrbk = 3970,
3987
    VCVTPS2PHZrbkz  = 3971,
3988
    VCVTPS2PHZrr  = 3972,
3989
    VCVTPS2PHZrrk = 3973,
3990
    VCVTPS2PHZrrkz  = 3974,
3991
    VCVTPS2PHmr = 3975,
3992
    VCVTPS2PHrr = 3976,
3993
    VCVTPS2QQZ128rm = 3977,
3994
    VCVTPS2QQZ128rmb  = 3978,
3995
    VCVTPS2QQZ128rmbk = 3979,
3996
    VCVTPS2QQZ128rmbkz  = 3980,
3997
    VCVTPS2QQZ128rmk  = 3981,
3998
    VCVTPS2QQZ128rmkz = 3982,
3999
    VCVTPS2QQZ128rr = 3983,
4000
    VCVTPS2QQZ128rrk  = 3984,
4001
    VCVTPS2QQZ128rrkz = 3985,
4002
    VCVTPS2QQZ256rm = 3986,
4003
    VCVTPS2QQZ256rmb  = 3987,
4004
    VCVTPS2QQZ256rmbk = 3988,
4005
    VCVTPS2QQZ256rmbkz  = 3989,
4006
    VCVTPS2QQZ256rmk  = 3990,
4007
    VCVTPS2QQZ256rmkz = 3991,
4008
    VCVTPS2QQZ256rr = 3992,
4009
    VCVTPS2QQZ256rrk  = 3993,
4010
    VCVTPS2QQZ256rrkz = 3994,
4011
    VCVTPS2QQZrm  = 3995,
4012
    VCVTPS2QQZrmb = 3996,
4013
    VCVTPS2QQZrmbk  = 3997,
4014
    VCVTPS2QQZrmbkz = 3998,
4015
    VCVTPS2QQZrmk = 3999,
4016
    VCVTPS2QQZrmkz  = 4000,
4017
    VCVTPS2QQZrr  = 4001,
4018
    VCVTPS2QQZrrb = 4002,
4019
    VCVTPS2QQZrrbk  = 4003,
4020
    VCVTPS2QQZrrbkz = 4004,
4021
    VCVTPS2QQZrrk = 4005,
4022
    VCVTPS2QQZrrkz  = 4006,
4023
    VCVTPS2UDQZ128rm  = 4007,
4024
    VCVTPS2UDQZ128rmb = 4008,
4025
    VCVTPS2UDQZ128rmbk  = 4009,
4026
    VCVTPS2UDQZ128rmbkz = 4010,
4027
    VCVTPS2UDQZ128rmk = 4011,
4028
    VCVTPS2UDQZ128rmkz  = 4012,
4029
    VCVTPS2UDQZ128rr  = 4013,
4030
    VCVTPS2UDQZ128rrk = 4014,
4031
    VCVTPS2UDQZ128rrkz  = 4015,
4032
    VCVTPS2UDQZ256rm  = 4016,
4033
    VCVTPS2UDQZ256rmb = 4017,
4034
    VCVTPS2UDQZ256rmbk  = 4018,
4035
    VCVTPS2UDQZ256rmbkz = 4019,
4036
    VCVTPS2UDQZ256rmk = 4020,
4037
    VCVTPS2UDQZ256rmkz  = 4021,
4038
    VCVTPS2UDQZ256rr  = 4022,
4039
    VCVTPS2UDQZ256rrk = 4023,
4040
    VCVTPS2UDQZ256rrkz  = 4024,
4041
    VCVTPS2UDQZrm = 4025,
4042
    VCVTPS2UDQZrmb  = 4026,
4043
    VCVTPS2UDQZrmbk = 4027,
4044
    VCVTPS2UDQZrmbkz  = 4028,
4045
    VCVTPS2UDQZrmk  = 4029,
4046
    VCVTPS2UDQZrmkz = 4030,
4047
    VCVTPS2UDQZrr = 4031,
4048
    VCVTPS2UDQZrrb  = 4032,
4049
    VCVTPS2UDQZrrbk = 4033,
4050
    VCVTPS2UDQZrrbkz  = 4034,
4051
    VCVTPS2UDQZrrk  = 4035,
4052
    VCVTPS2UDQZrrkz = 4036,
4053
    VCVTPS2UQQZ128rm  = 4037,
4054
    VCVTPS2UQQZ128rmb = 4038,
4055
    VCVTPS2UQQZ128rmbk  = 4039,
4056
    VCVTPS2UQQZ128rmbkz = 4040,
4057
    VCVTPS2UQQZ128rmk = 4041,
4058
    VCVTPS2UQQZ128rmkz  = 4042,
4059
    VCVTPS2UQQZ128rr  = 4043,
4060
    VCVTPS2UQQZ128rrk = 4044,
4061
    VCVTPS2UQQZ128rrkz  = 4045,
4062
    VCVTPS2UQQZ256rm  = 4046,
4063
    VCVTPS2UQQZ256rmb = 4047,
4064
    VCVTPS2UQQZ256rmbk  = 4048,
4065
    VCVTPS2UQQZ256rmbkz = 4049,
4066
    VCVTPS2UQQZ256rmk = 4050,
4067
    VCVTPS2UQQZ256rmkz  = 4051,
4068
    VCVTPS2UQQZ256rr  = 4052,
4069
    VCVTPS2UQQZ256rrk = 4053,
4070
    VCVTPS2UQQZ256rrkz  = 4054,
4071
    VCVTPS2UQQZrm = 4055,
4072
    VCVTPS2UQQZrmb  = 4056,
4073
    VCVTPS2UQQZrmbk = 4057,
4074
    VCVTPS2UQQZrmbkz  = 4058,
4075
    VCVTPS2UQQZrmk  = 4059,
4076
    VCVTPS2UQQZrmkz = 4060,
4077
    VCVTPS2UQQZrr = 4061,
4078
    VCVTPS2UQQZrrb  = 4062,
4079
    VCVTPS2UQQZrrbk = 4063,
4080
    VCVTPS2UQQZrrbkz  = 4064,
4081
    VCVTPS2UQQZrrk  = 4065,
4082
    VCVTPS2UQQZrrkz = 4066,
4083
    VCVTQQ2PDZ128rm = 4067,
4084
    VCVTQQ2PDZ128rmb  = 4068,
4085
    VCVTQQ2PDZ128rmbk = 4069,
4086
    VCVTQQ2PDZ128rmbkz  = 4070,
4087
    VCVTQQ2PDZ128rmk  = 4071,
4088
    VCVTQQ2PDZ128rmkz = 4072,
4089
    VCVTQQ2PDZ128rr = 4073,
4090
    VCVTQQ2PDZ128rrk  = 4074,
4091
    VCVTQQ2PDZ128rrkz = 4075,
4092
    VCVTQQ2PDZ256rm = 4076,
4093
    VCVTQQ2PDZ256rmb  = 4077,
4094
    VCVTQQ2PDZ256rmbk = 4078,
4095
    VCVTQQ2PDZ256rmbkz  = 4079,
4096
    VCVTQQ2PDZ256rmk  = 4080,
4097
    VCVTQQ2PDZ256rmkz = 4081,
4098
    VCVTQQ2PDZ256rr = 4082,
4099
    VCVTQQ2PDZ256rrk  = 4083,
4100
    VCVTQQ2PDZ256rrkz = 4084,
4101
    VCVTQQ2PDZrm  = 4085,
4102
    VCVTQQ2PDZrmb = 4086,
4103
    VCVTQQ2PDZrmbk  = 4087,
4104
    VCVTQQ2PDZrmbkz = 4088,
4105
    VCVTQQ2PDZrmk = 4089,
4106
    VCVTQQ2PDZrmkz  = 4090,
4107
    VCVTQQ2PDZrr  = 4091,
4108
    VCVTQQ2PDZrrb = 4092,
4109
    VCVTQQ2PDZrrbk  = 4093,
4110
    VCVTQQ2PDZrrbkz = 4094,
4111
    VCVTQQ2PDZrrk = 4095,
4112
    VCVTQQ2PDZrrkz  = 4096,
4113
    VCVTQQ2PSZ128rm = 4097,
4114
    VCVTQQ2PSZ128rmb  = 4098,
4115
    VCVTQQ2PSZ128rmbk = 4099,
4116
    VCVTQQ2PSZ128rmbkz  = 4100,
4117
    VCVTQQ2PSZ128rmk  = 4101,
4118
    VCVTQQ2PSZ128rmkz = 4102,
4119
    VCVTQQ2PSZ128rr = 4103,
4120
    VCVTQQ2PSZ128rrk  = 4104,
4121
    VCVTQQ2PSZ128rrkz = 4105,
4122
    VCVTQQ2PSZ256rm = 4106,
4123
    VCVTQQ2PSZ256rmb  = 4107,
4124
    VCVTQQ2PSZ256rmbk = 4108,
4125
    VCVTQQ2PSZ256rmbkz  = 4109,
4126
    VCVTQQ2PSZ256rmk  = 4110,
4127
    VCVTQQ2PSZ256rmkz = 4111,
4128
    VCVTQQ2PSZ256rr = 4112,
4129
    VCVTQQ2PSZ256rrk  = 4113,
4130
    VCVTQQ2PSZ256rrkz = 4114,
4131
    VCVTQQ2PSZrm  = 4115,
4132
    VCVTQQ2PSZrmb = 4116,
4133
    VCVTQQ2PSZrmbk  = 4117,
4134
    VCVTQQ2PSZrmbkz = 4118,
4135
    VCVTQQ2PSZrmk = 4119,
4136
    VCVTQQ2PSZrmkz  = 4120,
4137
    VCVTQQ2PSZrr  = 4121,
4138
    VCVTQQ2PSZrrb = 4122,
4139
    VCVTQQ2PSZrrbk  = 4123,
4140
    VCVTQQ2PSZrrbkz = 4124,
4141
    VCVTQQ2PSZrrk = 4125,
4142
    VCVTQQ2PSZrrkz  = 4126,
4143
    VCVTSD2SI64Zrb  = 4127,
4144
    VCVTSD2SI64Zrm  = 4128,
4145
    VCVTSD2SI64Zrr  = 4129,
4146
    VCVTSD2SI64rm = 4130,
4147
    VCVTSD2SI64rr = 4131,
4148
    VCVTSD2SIZrb  = 4132,
4149
    VCVTSD2SIZrm  = 4133,
4150
    VCVTSD2SIZrr  = 4134,
4151
    VCVTSD2SIrm = 4135,
4152
    VCVTSD2SIrr = 4136,
4153
    VCVTSD2SSZrm  = 4137,
4154
    VCVTSD2SSZrmk = 4138,
4155
    VCVTSD2SSZrmkz  = 4139,
4156
    VCVTSD2SSZrr  = 4140,
4157
    VCVTSD2SSZrrb = 4141,
4158
    VCVTSD2SSZrrbk  = 4142,
4159
    VCVTSD2SSZrrbkz = 4143,
4160
    VCVTSD2SSZrrk = 4144,
4161
    VCVTSD2SSZrrkz  = 4145,
4162
    VCVTSD2SSrm = 4146,
4163
    VCVTSD2SSrr = 4147,
4164
    VCVTSD2USI64Zrb = 4148,
4165
    VCVTSD2USI64Zrm = 4149,
4166
    VCVTSD2USI64Zrr = 4150,
4167
    VCVTSD2USIZrb = 4151,
4168
    VCVTSD2USIZrm = 4152,
4169
    VCVTSD2USIZrr = 4153,
4170
    VCVTSI2SD64rm = 4154,
4171
    VCVTSI2SD64rr = 4155,
4172
    VCVTSI2SDZrm  = 4156,
4173
    VCVTSI2SDZrm_Int  = 4157,
4174
    VCVTSI2SDZrr  = 4158,
4175
    VCVTSI2SDZrr_Int  = 4159,
4176
    VCVTSI2SDZrrb_Int = 4160,
4177
    VCVTSI2SDrm = 4161,
4178
    VCVTSI2SDrr = 4162,
4179
    VCVTSI2SS64rm = 4163,
4180
    VCVTSI2SS64rr = 4164,
4181
    VCVTSI2SSZrm  = 4165,
4182
    VCVTSI2SSZrm_Int  = 4166,
4183
    VCVTSI2SSZrr  = 4167,
4184
    VCVTSI2SSZrr_Int  = 4168,
4185
    VCVTSI2SSZrrb_Int = 4169,
4186
    VCVTSI2SSrm = 4170,
4187
    VCVTSI2SSrr = 4171,
4188
    VCVTSI642SDZrm  = 4172,
4189
    VCVTSI642SDZrm_Int  = 4173,
4190
    VCVTSI642SDZrr  = 4174,
4191
    VCVTSI642SDZrr_Int  = 4175,
4192
    VCVTSI642SDZrrb_Int = 4176,
4193
    VCVTSI642SSZrm  = 4177,
4194
    VCVTSI642SSZrm_Int  = 4178,
4195
    VCVTSI642SSZrr  = 4179,
4196
    VCVTSI642SSZrr_Int  = 4180,
4197
    VCVTSI642SSZrrb_Int = 4181,
4198
    VCVTSS2SDZrm  = 4182,
4199
    VCVTSS2SDZrmk = 4183,
4200
    VCVTSS2SDZrmkz  = 4184,
4201
    VCVTSS2SDZrr  = 4185,
4202
    VCVTSS2SDZrrb = 4186,
4203
    VCVTSS2SDZrrbk  = 4187,
4204
    VCVTSS2SDZrrbkz = 4188,
4205
    VCVTSS2SDZrrk = 4189,
4206
    VCVTSS2SDZrrkz  = 4190,
4207
    VCVTSS2SDrm = 4191,
4208
    VCVTSS2SDrr = 4192,
4209
    VCVTSS2SI64Zrb  = 4193,
4210
    VCVTSS2SI64Zrm  = 4194,
4211
    VCVTSS2SI64Zrr  = 4195,
4212
    VCVTSS2SI64rm = 4196,
4213
    VCVTSS2SI64rr = 4197,
4214
    VCVTSS2SIZrb  = 4198,
4215
    VCVTSS2SIZrm  = 4199,
4216
    VCVTSS2SIZrr  = 4200,
4217
    VCVTSS2SIrm = 4201,
4218
    VCVTSS2SIrr = 4202,
4219
    VCVTSS2USI64Zrb = 4203,
4220
    VCVTSS2USI64Zrm = 4204,
4221
    VCVTSS2USI64Zrr = 4205,
4222
    VCVTSS2USIZrb = 4206,
4223
    VCVTSS2USIZrm = 4207,
4224
    VCVTSS2USIZrr = 4208,
4225
    VCVTTPD2DQXrm = 4209,
4226
    VCVTTPD2DQYrm = 4210,
4227
    VCVTTPD2DQYrr = 4211,
4228
    VCVTTPD2DQZ128rm  = 4212,
4229
    VCVTTPD2DQZ128rmb = 4213,
4230
    VCVTTPD2DQZ128rmbk  = 4214,
4231
    VCVTTPD2DQZ128rmbkz = 4215,
4232
    VCVTTPD2DQZ128rmk = 4216,
4233
    VCVTTPD2DQZ128rmkz  = 4217,
4234
    VCVTTPD2DQZ128rr  = 4218,
4235
    VCVTTPD2DQZ128rrk = 4219,
4236
    VCVTTPD2DQZ128rrkz  = 4220,
4237
    VCVTTPD2DQZ256rm  = 4221,
4238
    VCVTTPD2DQZ256rmb = 4222,
4239
    VCVTTPD2DQZ256rmbk  = 4223,
4240
    VCVTTPD2DQZ256rmbkz = 4224,
4241
    VCVTTPD2DQZ256rmk = 4225,
4242
    VCVTTPD2DQZ256rmkz  = 4226,
4243
    VCVTTPD2DQZ256rr  = 4227,
4244
    VCVTTPD2DQZ256rrk = 4228,
4245
    VCVTTPD2DQZ256rrkz  = 4229,
4246
    VCVTTPD2DQZrm = 4230,
4247
    VCVTTPD2DQZrmb  = 4231,
4248
    VCVTTPD2DQZrmbk = 4232,
4249
    VCVTTPD2DQZrmbkz  = 4233,
4250
    VCVTTPD2DQZrmk  = 4234,
4251
    VCVTTPD2DQZrmkz = 4235,
4252
    VCVTTPD2DQZrr = 4236,
4253
    VCVTTPD2DQZrrb  = 4237,
4254
    VCVTTPD2DQZrrbk = 4238,
4255
    VCVTTPD2DQZrrbkz  = 4239,
4256
    VCVTTPD2DQZrrk  = 4240,
4257
    VCVTTPD2DQZrrkz = 4241,
4258
    VCVTTPD2DQrr  = 4242,
4259
    VCVTTPD2QQZ128rm  = 4243,
4260
    VCVTTPD2QQZ128rmb = 4244,
4261
    VCVTTPD2QQZ128rmbk  = 4245,
4262
    VCVTTPD2QQZ128rmbkz = 4246,
4263
    VCVTTPD2QQZ128rmk = 4247,
4264
    VCVTTPD2QQZ128rmkz  = 4248,
4265
    VCVTTPD2QQZ128rr  = 4249,
4266
    VCVTTPD2QQZ128rrk = 4250,
4267
    VCVTTPD2QQZ128rrkz  = 4251,
4268
    VCVTTPD2QQZ256rm  = 4252,
4269
    VCVTTPD2QQZ256rmb = 4253,
4270
    VCVTTPD2QQZ256rmbk  = 4254,
4271
    VCVTTPD2QQZ256rmbkz = 4255,
4272
    VCVTTPD2QQZ256rmk = 4256,
4273
    VCVTTPD2QQZ256rmkz  = 4257,
4274
    VCVTTPD2QQZ256rr  = 4258,
4275
    VCVTTPD2QQZ256rrk = 4259,
4276
    VCVTTPD2QQZ256rrkz  = 4260,
4277
    VCVTTPD2QQZrm = 4261,
4278
    VCVTTPD2QQZrmb  = 4262,
4279
    VCVTTPD2QQZrmbk = 4263,
4280
    VCVTTPD2QQZrmbkz  = 4264,
4281
    VCVTTPD2QQZrmk  = 4265,
4282
    VCVTTPD2QQZrmkz = 4266,
4283
    VCVTTPD2QQZrr = 4267,
4284
    VCVTTPD2QQZrrb  = 4268,
4285
    VCVTTPD2QQZrrbk = 4269,
4286
    VCVTTPD2QQZrrbkz  = 4270,
4287
    VCVTTPD2QQZrrk  = 4271,
4288
    VCVTTPD2QQZrrkz = 4272,
4289
    VCVTTPD2UDQZ128rm = 4273,
4290
    VCVTTPD2UDQZ128rmb  = 4274,
4291
    VCVTTPD2UDQZ128rmbk = 4275,
4292
    VCVTTPD2UDQZ128rmbkz  = 4276,
4293
    VCVTTPD2UDQZ128rmk  = 4277,
4294
    VCVTTPD2UDQZ128rmkz = 4278,
4295
    VCVTTPD2UDQZ128rr = 4279,
4296
    VCVTTPD2UDQZ128rrk  = 4280,
4297
    VCVTTPD2UDQZ128rrkz = 4281,
4298
    VCVTTPD2UDQZ256rm = 4282,
4299
    VCVTTPD2UDQZ256rmb  = 4283,
4300
    VCVTTPD2UDQZ256rmbk = 4284,
4301
    VCVTTPD2UDQZ256rmbkz  = 4285,
4302
    VCVTTPD2UDQZ256rmk  = 4286,
4303
    VCVTTPD2UDQZ256rmkz = 4287,
4304
    VCVTTPD2UDQZ256rr = 4288,
4305
    VCVTTPD2UDQZ256rrk  = 4289,
4306
    VCVTTPD2UDQZ256rrkz = 4290,
4307
    VCVTTPD2UDQZrm  = 4291,
4308
    VCVTTPD2UDQZrmb = 4292,
4309
    VCVTTPD2UDQZrmbk  = 4293,
4310
    VCVTTPD2UDQZrmbkz = 4294,
4311
    VCVTTPD2UDQZrmk = 4295,
4312
    VCVTTPD2UDQZrmkz  = 4296,
4313
    VCVTTPD2UDQZrr  = 4297,
4314
    VCVTTPD2UDQZrrb = 4298,
4315
    VCVTTPD2UDQZrrbk  = 4299,
4316
    VCVTTPD2UDQZrrbkz = 4300,
4317
    VCVTTPD2UDQZrrk = 4301,
4318
    VCVTTPD2UDQZrrkz  = 4302,
4319
    VCVTTPD2UQQZ128rm = 4303,
4320
    VCVTTPD2UQQZ128rmb  = 4304,
4321
    VCVTTPD2UQQZ128rmbk = 4305,
4322
    VCVTTPD2UQQZ128rmbkz  = 4306,
4323
    VCVTTPD2UQQZ128rmk  = 4307,
4324
    VCVTTPD2UQQZ128rmkz = 4308,
4325
    VCVTTPD2UQQZ128rr = 4309,
4326
    VCVTTPD2UQQZ128rrk  = 4310,
4327
    VCVTTPD2UQQZ128rrkz = 4311,
4328
    VCVTTPD2UQQZ256rm = 4312,
4329
    VCVTTPD2UQQZ256rmb  = 4313,
4330
    VCVTTPD2UQQZ256rmbk = 4314,
4331
    VCVTTPD2UQQZ256rmbkz  = 4315,
4332
    VCVTTPD2UQQZ256rmk  = 4316,
4333
    VCVTTPD2UQQZ256rmkz = 4317,
4334
    VCVTTPD2UQQZ256rr = 4318,
4335
    VCVTTPD2UQQZ256rrk  = 4319,
4336
    VCVTTPD2UQQZ256rrkz = 4320,
4337
    VCVTTPD2UQQZrm  = 4321,
4338
    VCVTTPD2UQQZrmb = 4322,
4339
    VCVTTPD2UQQZrmbk  = 4323,
4340
    VCVTTPD2UQQZrmbkz = 4324,
4341
    VCVTTPD2UQQZrmk = 4325,
4342
    VCVTTPD2UQQZrmkz  = 4326,
4343
    VCVTTPD2UQQZrr  = 4327,
4344
    VCVTTPD2UQQZrrb = 4328,
4345
    VCVTTPD2UQQZrrbk  = 4329,
4346
    VCVTTPD2UQQZrrbkz = 4330,
4347
    VCVTTPD2UQQZrrk = 4331,
4348
    VCVTTPD2UQQZrrkz  = 4332,
4349
    VCVTTPS2DQYrm = 4333,
4350
    VCVTTPS2DQYrr = 4334,
4351
    VCVTTPS2DQZ128rm  = 4335,
4352
    VCVTTPS2DQZ128rmb = 4336,
4353
    VCVTTPS2DQZ128rmbk  = 4337,
4354
    VCVTTPS2DQZ128rmbkz = 4338,
4355
    VCVTTPS2DQZ128rmk = 4339,
4356
    VCVTTPS2DQZ128rmkz  = 4340,
4357
    VCVTTPS2DQZ128rr  = 4341,
4358
    VCVTTPS2DQZ128rrk = 4342,
4359
    VCVTTPS2DQZ128rrkz  = 4343,
4360
    VCVTTPS2DQZ256rm  = 4344,
4361
    VCVTTPS2DQZ256rmb = 4345,
4362
    VCVTTPS2DQZ256rmbk  = 4346,
4363
    VCVTTPS2DQZ256rmbkz = 4347,
4364
    VCVTTPS2DQZ256rmk = 4348,
4365
    VCVTTPS2DQZ256rmkz  = 4349,
4366
    VCVTTPS2DQZ256rr  = 4350,
4367
    VCVTTPS2DQZ256rrk = 4351,
4368
    VCVTTPS2DQZ256rrkz  = 4352,
4369
    VCVTTPS2DQZrm = 4353,
4370
    VCVTTPS2DQZrmb  = 4354,
4371
    VCVTTPS2DQZrmbk = 4355,
4372
    VCVTTPS2DQZrmbkz  = 4356,
4373
    VCVTTPS2DQZrmk  = 4357,
4374
    VCVTTPS2DQZrmkz = 4358,
4375
    VCVTTPS2DQZrr = 4359,
4376
    VCVTTPS2DQZrrb  = 4360,
4377
    VCVTTPS2DQZrrbk = 4361,
4378
    VCVTTPS2DQZrrbkz  = 4362,
4379
    VCVTTPS2DQZrrk  = 4363,
4380
    VCVTTPS2DQZrrkz = 4364,
4381
    VCVTTPS2DQrm  = 4365,
4382
    VCVTTPS2DQrr  = 4366,
4383
    VCVTTPS2QQZ128rm  = 4367,
4384
    VCVTTPS2QQZ128rmb = 4368,
4385
    VCVTTPS2QQZ128rmbk  = 4369,
4386
    VCVTTPS2QQZ128rmbkz = 4370,
4387
    VCVTTPS2QQZ128rmk = 4371,
4388
    VCVTTPS2QQZ128rmkz  = 4372,
4389
    VCVTTPS2QQZ128rr  = 4373,
4390
    VCVTTPS2QQZ128rrk = 4374,
4391
    VCVTTPS2QQZ128rrkz  = 4375,
4392
    VCVTTPS2QQZ256rm  = 4376,
4393
    VCVTTPS2QQZ256rmb = 4377,
4394
    VCVTTPS2QQZ256rmbk  = 4378,
4395
    VCVTTPS2QQZ256rmbkz = 4379,
4396
    VCVTTPS2QQZ256rmk = 4380,
4397
    VCVTTPS2QQZ256rmkz  = 4381,
4398
    VCVTTPS2QQZ256rr  = 4382,
4399
    VCVTTPS2QQZ256rrk = 4383,
4400
    VCVTTPS2QQZ256rrkz  = 4384,
4401
    VCVTTPS2QQZrm = 4385,
4402
    VCVTTPS2QQZrmb  = 4386,
4403
    VCVTTPS2QQZrmbk = 4387,
4404
    VCVTTPS2QQZrmbkz  = 4388,
4405
    VCVTTPS2QQZrmk  = 4389,
4406
    VCVTTPS2QQZrmkz = 4390,
4407
    VCVTTPS2QQZrr = 4391,
4408
    VCVTTPS2QQZrrb  = 4392,
4409
    VCVTTPS2QQZrrbk = 4393,
4410
    VCVTTPS2QQZrrbkz  = 4394,
4411
    VCVTTPS2QQZrrk  = 4395,
4412
    VCVTTPS2QQZrrkz = 4396,
4413
    VCVTTPS2UDQZ128rm = 4397,
4414
    VCVTTPS2UDQZ128rmb  = 4398,
4415
    VCVTTPS2UDQZ128rmbk = 4399,
4416
    VCVTTPS2UDQZ128rmbkz  = 4400,
4417
    VCVTTPS2UDQZ128rmk  = 4401,
4418
    VCVTTPS2UDQZ128rmkz = 4402,
4419
    VCVTTPS2UDQZ128rr = 4403,
4420
    VCVTTPS2UDQZ128rrk  = 4404,
4421
    VCVTTPS2UDQZ128rrkz = 4405,
4422
    VCVTTPS2UDQZ256rm = 4406,
4423
    VCVTTPS2UDQZ256rmb  = 4407,
4424
    VCVTTPS2UDQZ256rmbk = 4408,
4425
    VCVTTPS2UDQZ256rmbkz  = 4409,
4426
    VCVTTPS2UDQZ256rmk  = 4410,
4427
    VCVTTPS2UDQZ256rmkz = 4411,
4428
    VCVTTPS2UDQZ256rr = 4412,
4429
    VCVTTPS2UDQZ256rrk  = 4413,
4430
    VCVTTPS2UDQZ256rrkz = 4414,
4431
    VCVTTPS2UDQZrm  = 4415,
4432
    VCVTTPS2UDQZrmb = 4416,
4433
    VCVTTPS2UDQZrmbk  = 4417,
4434
    VCVTTPS2UDQZrmbkz = 4418,
4435
    VCVTTPS2UDQZrmk = 4419,
4436
    VCVTTPS2UDQZrmkz  = 4420,
4437
    VCVTTPS2UDQZrr  = 4421,
4438
    VCVTTPS2UDQZrrb = 4422,
4439
    VCVTTPS2UDQZrrbk  = 4423,
4440
    VCVTTPS2UDQZrrbkz = 4424,
4441
    VCVTTPS2UDQZrrk = 4425,
4442
    VCVTTPS2UDQZrrkz  = 4426,
4443
    VCVTTPS2UQQZ128rm = 4427,
4444
    VCVTTPS2UQQZ128rmb  = 4428,
4445
    VCVTTPS2UQQZ128rmbk = 4429,
4446
    VCVTTPS2UQQZ128rmbkz  = 4430,
4447
    VCVTTPS2UQQZ128rmk  = 4431,
4448
    VCVTTPS2UQQZ128rmkz = 4432,
4449
    VCVTTPS2UQQZ128rr = 4433,
4450
    VCVTTPS2UQQZ128rrk  = 4434,
4451
    VCVTTPS2UQQZ128rrkz = 4435,
4452
    VCVTTPS2UQQZ256rm = 4436,
4453
    VCVTTPS2UQQZ256rmb  = 4437,
4454
    VCVTTPS2UQQZ256rmbk = 4438,
4455
    VCVTTPS2UQQZ256rmbkz  = 4439,
4456
    VCVTTPS2UQQZ256rmk  = 4440,
4457
    VCVTTPS2UQQZ256rmkz = 4441,
4458
    VCVTTPS2UQQZ256rr = 4442,
4459
    VCVTTPS2UQQZ256rrk  = 4443,
4460
    VCVTTPS2UQQZ256rrkz = 4444,
4461
    VCVTTPS2UQQZrm  = 4445,
4462
    VCVTTPS2UQQZrmb = 4446,
4463
    VCVTTPS2UQQZrmbk  = 4447,
4464
    VCVTTPS2UQQZrmbkz = 4448,
4465
    VCVTTPS2UQQZrmk = 4449,
4466
    VCVTTPS2UQQZrmkz  = 4450,
4467
    VCVTTPS2UQQZrr  = 4451,
4468
    VCVTTPS2UQQZrrb = 4452,
4469
    VCVTTPS2UQQZrrbk  = 4453,
4470
    VCVTTPS2UQQZrrbkz = 4454,
4471
    VCVTTPS2UQQZrrk = 4455,
4472
    VCVTTPS2UQQZrrkz  = 4456,
4473
    VCVTTSD2SI64Zrb = 4457,
4474
    VCVTTSD2SI64Zrb_Int = 4458,
4475
    VCVTTSD2SI64Zrm = 4459,
4476
    VCVTTSD2SI64Zrm_Int = 4460,
4477
    VCVTTSD2SI64Zrr = 4461,
4478
    VCVTTSD2SI64Zrr_Int = 4462,
4479
    VCVTTSD2SI64rm  = 4463,
4480
    VCVTTSD2SI64rr  = 4464,
4481
    VCVTTSD2SIZrb = 4465,
4482
    VCVTTSD2SIZrb_Int = 4466,
4483
    VCVTTSD2SIZrm = 4467,
4484
    VCVTTSD2SIZrm_Int = 4468,
4485
    VCVTTSD2SIZrr = 4469,
4486
    VCVTTSD2SIZrr_Int = 4470,
4487
    VCVTTSD2SIrm  = 4471,
4488
    VCVTTSD2SIrr  = 4472,
4489
    VCVTTSD2USI64Zrb  = 4473,
4490
    VCVTTSD2USI64Zrb_Int  = 4474,
4491
    VCVTTSD2USI64Zrm  = 4475,
4492
    VCVTTSD2USI64Zrm_Int  = 4476,
4493
    VCVTTSD2USI64Zrr  = 4477,
4494
    VCVTTSD2USI64Zrr_Int  = 4478,
4495
    VCVTTSD2USIZrb  = 4479,
4496
    VCVTTSD2USIZrb_Int  = 4480,
4497
    VCVTTSD2USIZrm  = 4481,
4498
    VCVTTSD2USIZrm_Int  = 4482,
4499
    VCVTTSD2USIZrr  = 4483,
4500
    VCVTTSD2USIZrr_Int  = 4484,
4501
    VCVTTSS2SI64Zrb = 4485,
4502
    VCVTTSS2SI64Zrb_Int = 4486,
4503
    VCVTTSS2SI64Zrm = 4487,
4504
    VCVTTSS2SI64Zrm_Int = 4488,
4505
    VCVTTSS2SI64Zrr = 4489,
4506
    VCVTTSS2SI64Zrr_Int = 4490,
4507
    VCVTTSS2SI64rm  = 4491,
4508
    VCVTTSS2SI64rr  = 4492,
4509
    VCVTTSS2SIZrb = 4493,
4510
    VCVTTSS2SIZrb_Int = 4494,
4511
    VCVTTSS2SIZrm = 4495,
4512
    VCVTTSS2SIZrm_Int = 4496,
4513
    VCVTTSS2SIZrr = 4497,
4514
    VCVTTSS2SIZrr_Int = 4498,
4515
    VCVTTSS2SIrm  = 4499,
4516
    VCVTTSS2SIrr  = 4500,
4517
    VCVTTSS2USI64Zrb  = 4501,
4518
    VCVTTSS2USI64Zrb_Int  = 4502,
4519
    VCVTTSS2USI64Zrm  = 4503,
4520
    VCVTTSS2USI64Zrm_Int  = 4504,
4521
    VCVTTSS2USI64Zrr  = 4505,
4522
    VCVTTSS2USI64Zrr_Int  = 4506,
4523
    VCVTTSS2USIZrb  = 4507,
4524
    VCVTTSS2USIZrb_Int  = 4508,
4525
    VCVTTSS2USIZrm  = 4509,
4526
    VCVTTSS2USIZrm_Int  = 4510,
4527
    VCVTTSS2USIZrr  = 4511,
4528
    VCVTTSS2USIZrr_Int  = 4512,
4529
    VCVTUDQ2PDZ128rm  = 4513,
4530
    VCVTUDQ2PDZ128rmb = 4514,
4531
    VCVTUDQ2PDZ128rmbk  = 4515,
4532
    VCVTUDQ2PDZ128rmbkz = 4516,
4533
    VCVTUDQ2PDZ128rmk = 4517,
4534
    VCVTUDQ2PDZ128rmkz  = 4518,
4535
    VCVTUDQ2PDZ128rr  = 4519,
4536
    VCVTUDQ2PDZ128rrk = 4520,
4537
    VCVTUDQ2PDZ128rrkz  = 4521,
4538
    VCVTUDQ2PDZ256rm  = 4522,
4539
    VCVTUDQ2PDZ256rmb = 4523,
4540
    VCVTUDQ2PDZ256rmbk  = 4524,
4541
    VCVTUDQ2PDZ256rmbkz = 4525,
4542
    VCVTUDQ2PDZ256rmk = 4526,
4543
    VCVTUDQ2PDZ256rmkz  = 4527,
4544
    VCVTUDQ2PDZ256rr  = 4528,
4545
    VCVTUDQ2PDZ256rrk = 4529,
4546
    VCVTUDQ2PDZ256rrkz  = 4530,
4547
    VCVTUDQ2PDZrm = 4531,
4548
    VCVTUDQ2PDZrmb  = 4532,
4549
    VCVTUDQ2PDZrmbk = 4533,
4550
    VCVTUDQ2PDZrmbkz  = 4534,
4551
    VCVTUDQ2PDZrmk  = 4535,
4552
    VCVTUDQ2PDZrmkz = 4536,
4553
    VCVTUDQ2PDZrr = 4537,
4554
    VCVTUDQ2PDZrrk  = 4538,
4555
    VCVTUDQ2PDZrrkz = 4539,
4556
    VCVTUDQ2PSZ128rm  = 4540,
4557
    VCVTUDQ2PSZ128rmb = 4541,
4558
    VCVTUDQ2PSZ128rmbk  = 4542,
4559
    VCVTUDQ2PSZ128rmbkz = 4543,
4560
    VCVTUDQ2PSZ128rmk = 4544,
4561
    VCVTUDQ2PSZ128rmkz  = 4545,
4562
    VCVTUDQ2PSZ128rr  = 4546,
4563
    VCVTUDQ2PSZ128rrk = 4547,
4564
    VCVTUDQ2PSZ128rrkz  = 4548,
4565
    VCVTUDQ2PSZ256rm  = 4549,
4566
    VCVTUDQ2PSZ256rmb = 4550,
4567
    VCVTUDQ2PSZ256rmbk  = 4551,
4568
    VCVTUDQ2PSZ256rmbkz = 4552,
4569
    VCVTUDQ2PSZ256rmk = 4553,
4570
    VCVTUDQ2PSZ256rmkz  = 4554,
4571
    VCVTUDQ2PSZ256rr  = 4555,
4572
    VCVTUDQ2PSZ256rrk = 4556,
4573
    VCVTUDQ2PSZ256rrkz  = 4557,
4574
    VCVTUDQ2PSZrm = 4558,
4575
    VCVTUDQ2PSZrmb  = 4559,
4576
    VCVTUDQ2PSZrmbk = 4560,
4577
    VCVTUDQ2PSZrmbkz  = 4561,
4578
    VCVTUDQ2PSZrmk  = 4562,
4579
    VCVTUDQ2PSZrmkz = 4563,
4580
    VCVTUDQ2PSZrr = 4564,
4581
    VCVTUDQ2PSZrrb  = 4565,
4582
    VCVTUDQ2PSZrrbk = 4566,
4583
    VCVTUDQ2PSZrrbkz  = 4567,
4584
    VCVTUDQ2PSZrrk  = 4568,
4585
    VCVTUDQ2PSZrrkz = 4569,
4586
    VCVTUQQ2PDZ128rm  = 4570,
4587
    VCVTUQQ2PDZ128rmb = 4571,
4588
    VCVTUQQ2PDZ128rmbk  = 4572,
4589
    VCVTUQQ2PDZ128rmbkz = 4573,
4590
    VCVTUQQ2PDZ128rmk = 4574,
4591
    VCVTUQQ2PDZ128rmkz  = 4575,
4592
    VCVTUQQ2PDZ128rr  = 4576,
4593
    VCVTUQQ2PDZ128rrk = 4577,
4594
    VCVTUQQ2PDZ128rrkz  = 4578,
4595
    VCVTUQQ2PDZ256rm  = 4579,
4596
    VCVTUQQ2PDZ256rmb = 4580,
4597
    VCVTUQQ2PDZ256rmbk  = 4581,
4598
    VCVTUQQ2PDZ256rmbkz = 4582,
4599
    VCVTUQQ2PDZ256rmk = 4583,
4600
    VCVTUQQ2PDZ256rmkz  = 4584,
4601
    VCVTUQQ2PDZ256rr  = 4585,
4602
    VCVTUQQ2PDZ256rrk = 4586,
4603
    VCVTUQQ2PDZ256rrkz  = 4587,
4604
    VCVTUQQ2PDZrm = 4588,
4605
    VCVTUQQ2PDZrmb  = 4589,
4606
    VCVTUQQ2PDZrmbk = 4590,
4607
    VCVTUQQ2PDZrmbkz  = 4591,
4608
    VCVTUQQ2PDZrmk  = 4592,
4609
    VCVTUQQ2PDZrmkz = 4593,
4610
    VCVTUQQ2PDZrr = 4594,
4611
    VCVTUQQ2PDZrrb  = 4595,
4612
    VCVTUQQ2PDZrrbk = 4596,
4613
    VCVTUQQ2PDZrrbkz  = 4597,
4614
    VCVTUQQ2PDZrrk  = 4598,
4615
    VCVTUQQ2PDZrrkz = 4599,
4616
    VCVTUQQ2PSZ128rm  = 4600,
4617
    VCVTUQQ2PSZ128rmb = 4601,
4618
    VCVTUQQ2PSZ128rmbk  = 4602,
4619
    VCVTUQQ2PSZ128rmbkz = 4603,
4620
    VCVTUQQ2PSZ128rmk = 4604,
4621
    VCVTUQQ2PSZ128rmkz  = 4605,
4622
    VCVTUQQ2PSZ128rr  = 4606,
4623
    VCVTUQQ2PSZ128rrk = 4607,
4624
    VCVTUQQ2PSZ128rrkz  = 4608,
4625
    VCVTUQQ2PSZ256rm  = 4609,
4626
    VCVTUQQ2PSZ256rmb = 4610,
4627
    VCVTUQQ2PSZ256rmbk  = 4611,
4628
    VCVTUQQ2PSZ256rmbkz = 4612,
4629
    VCVTUQQ2PSZ256rmk = 4613,
4630
    VCVTUQQ2PSZ256rmkz  = 4614,
4631
    VCVTUQQ2PSZ256rr  = 4615,
4632
    VCVTUQQ2PSZ256rrk = 4616,
4633
    VCVTUQQ2PSZ256rrkz  = 4617,
4634
    VCVTUQQ2PSZrm = 4618,
4635
    VCVTUQQ2PSZrmb  = 4619,
4636
    VCVTUQQ2PSZrmbk = 4620,
4637
    VCVTUQQ2PSZrmbkz  = 4621,
4638
    VCVTUQQ2PSZrmk  = 4622,
4639
    VCVTUQQ2PSZrmkz = 4623,
4640
    VCVTUQQ2PSZrr = 4624,
4641
    VCVTUQQ2PSZrrb  = 4625,
4642
    VCVTUQQ2PSZrrbk = 4626,
4643
    VCVTUQQ2PSZrrbkz  = 4627,
4644
    VCVTUQQ2PSZrrk  = 4628,
4645
    VCVTUQQ2PSZrrkz = 4629,
4646
    VCVTUSI2SDZrm = 4630,
4647
    VCVTUSI2SDZrm_Int = 4631,
4648
    VCVTUSI2SDZrr = 4632,
4649
    VCVTUSI2SDZrr_Int = 4633,
4650
    VCVTUSI2SSZrm = 4634,
4651
    VCVTUSI2SSZrm_Int = 4635,
4652
    VCVTUSI2SSZrr = 4636,
4653
    VCVTUSI2SSZrr_Int = 4637,
4654
    VCVTUSI2SSZrrb_Int  = 4638,
4655
    VCVTUSI642SDZrm = 4639,
4656
    VCVTUSI642SDZrm_Int = 4640,
4657
    VCVTUSI642SDZrr = 4641,
4658
    VCVTUSI642SDZrr_Int = 4642,
4659
    VCVTUSI642SDZrrb_Int  = 4643,
4660
    VCVTUSI642SSZrm = 4644,
4661
    VCVTUSI642SSZrm_Int = 4645,
4662
    VCVTUSI642SSZrr = 4646,
4663
    VCVTUSI642SSZrr_Int = 4647,
4664
    VCVTUSI642SSZrrb_Int  = 4648,
4665
    VDBPSADBWZ128rmi  = 4649,
4666
    VDBPSADBWZ128rmik = 4650,
4667
    VDBPSADBWZ128rmikz  = 4651,
4668
    VDBPSADBWZ128rri  = 4652,
4669
    VDBPSADBWZ128rrik = 4653,
4670
    VDBPSADBWZ128rrikz  = 4654,
4671
    VDBPSADBWZ256rmi  = 4655,
4672
    VDBPSADBWZ256rmik = 4656,
4673
    VDBPSADBWZ256rmikz  = 4657,
4674
    VDBPSADBWZ256rri  = 4658,
4675
    VDBPSADBWZ256rrik = 4659,
4676
    VDBPSADBWZ256rrikz  = 4660,
4677
    VDBPSADBWZrmi = 4661,
4678
    VDBPSADBWZrmik  = 4662,
4679
    VDBPSADBWZrmikz = 4663,
4680
    VDBPSADBWZrri = 4664,
4681
    VDBPSADBWZrrik  = 4665,
4682
    VDBPSADBWZrrikz = 4666,
4683
    VDIVPDYrm = 4667,
4684
    VDIVPDYrr = 4668,
4685
    VDIVPDZ128rm  = 4669,
4686
    VDIVPDZ128rmb = 4670,
4687
    VDIVPDZ128rmbk  = 4671,
4688
    VDIVPDZ128rmbkz = 4672,
4689
    VDIVPDZ128rmk = 4673,
4690
    VDIVPDZ128rmkz  = 4674,
4691
    VDIVPDZ128rr  = 4675,
4692
    VDIVPDZ128rrk = 4676,
4693
    VDIVPDZ128rrkz  = 4677,
4694
    VDIVPDZ256rm  = 4678,
4695
    VDIVPDZ256rmb = 4679,
4696
    VDIVPDZ256rmbk  = 4680,
4697
    VDIVPDZ256rmbkz = 4681,
4698
    VDIVPDZ256rmk = 4682,
4699
    VDIVPDZ256rmkz  = 4683,
4700
    VDIVPDZ256rr  = 4684,
4701
    VDIVPDZ256rrk = 4685,
4702
    VDIVPDZ256rrkz  = 4686,
4703
    VDIVPDZrb = 4687,
4704
    VDIVPDZrbk  = 4688,
4705
    VDIVPDZrbkz = 4689,
4706
    VDIVPDZrm = 4690,
4707
    VDIVPDZrmb  = 4691,
4708
    VDIVPDZrmbk = 4692,
4709
    VDIVPDZrmbkz  = 4693,
4710
    VDIVPDZrmk  = 4694,
4711
    VDIVPDZrmkz = 4695,
4712
    VDIVPDZrr = 4696,
4713
    VDIVPDZrrk  = 4697,
4714
    VDIVPDZrrkz = 4698,
4715
    VDIVPDrm  = 4699,
4716
    VDIVPDrr  = 4700,
4717
    VDIVPSYrm = 4701,
4718
    VDIVPSYrr = 4702,
4719
    VDIVPSZ128rm  = 4703,
4720
    VDIVPSZ128rmb = 4704,
4721
    VDIVPSZ128rmbk  = 4705,
4722
    VDIVPSZ128rmbkz = 4706,
4723
    VDIVPSZ128rmk = 4707,
4724
    VDIVPSZ128rmkz  = 4708,
4725
    VDIVPSZ128rr  = 4709,
4726
    VDIVPSZ128rrk = 4710,
4727
    VDIVPSZ128rrkz  = 4711,
4728
    VDIVPSZ256rm  = 4712,
4729
    VDIVPSZ256rmb = 4713,
4730
    VDIVPSZ256rmbk  = 4714,
4731
    VDIVPSZ256rmbkz = 4715,
4732
    VDIVPSZ256rmk = 4716,
4733
    VDIVPSZ256rmkz  = 4717,
4734
    VDIVPSZ256rr  = 4718,
4735
    VDIVPSZ256rrk = 4719,
4736
    VDIVPSZ256rrkz  = 4720,
4737
    VDIVPSZrb = 4721,
4738
    VDIVPSZrbk  = 4722,
4739
    VDIVPSZrbkz = 4723,
4740
    VDIVPSZrm = 4724,
4741
    VDIVPSZrmb  = 4725,
4742
    VDIVPSZrmbk = 4726,
4743
    VDIVPSZrmbkz  = 4727,
4744
    VDIVPSZrmk  = 4728,
4745
    VDIVPSZrmkz = 4729,
4746
    VDIVPSZrr = 4730,
4747
    VDIVPSZrrk  = 4731,
4748
    VDIVPSZrrkz = 4732,
4749
    VDIVPSrm  = 4733,
4750
    VDIVPSrr  = 4734,
4751
    VDIVSDZrm = 4735,
4752
    VDIVSDZrm_Int = 4736,
4753
    VDIVSDZrm_Intk  = 4737,
4754
    VDIVSDZrm_Intkz = 4738,
4755
    VDIVSDZrr = 4739,
4756
    VDIVSDZrr_Int = 4740,
4757
    VDIVSDZrr_Intk  = 4741,
4758
    VDIVSDZrr_Intkz = 4742,
4759
    VDIVSDZrrb  = 4743,
4760
    VDIVSDZrrbk = 4744,
4761
    VDIVSDZrrbkz  = 4745,
4762
    VDIVSDrm  = 4746,
4763
    VDIVSDrm_Int  = 4747,
4764
    VDIVSDrr  = 4748,
4765
    VDIVSDrr_Int  = 4749,
4766
    VDIVSSZrm = 4750,
4767
    VDIVSSZrm_Int = 4751,
4768
    VDIVSSZrm_Intk  = 4752,
4769
    VDIVSSZrm_Intkz = 4753,
4770
    VDIVSSZrr = 4754,
4771
    VDIVSSZrr_Int = 4755,
4772
    VDIVSSZrr_Intk  = 4756,
4773
    VDIVSSZrr_Intkz = 4757,
4774
    VDIVSSZrrb  = 4758,
4775
    VDIVSSZrrbk = 4759,
4776
    VDIVSSZrrbkz  = 4760,
4777
    VDIVSSrm  = 4761,
4778
    VDIVSSrm_Int  = 4762,
4779
    VDIVSSrr  = 4763,
4780
    VDIVSSrr_Int  = 4764,
4781
    VDPPDrmi  = 4765,
4782
    VDPPDrri  = 4766,
4783
    VDPPSYrmi = 4767,
4784
    VDPPSYrri = 4768,
4785
    VDPPSrmi  = 4769,
4786
    VDPPSrri  = 4770,
4787
    VERRm = 4771,
4788
    VERRr = 4772,
4789
    VERWm = 4773,
4790
    VERWr = 4774,
4791
    VEXP2PDm  = 4775,
4792
    VEXP2PDmb = 4776,
4793
    VEXP2PDmbk  = 4777,
4794
    VEXP2PDmbkz = 4778,
4795
    VEXP2PDmk = 4779,
4796
    VEXP2PDmkz  = 4780,
4797
    VEXP2PDr  = 4781,
4798
    VEXP2PDrb = 4782,
4799
    VEXP2PDrbk  = 4783,
4800
    VEXP2PDrbkz = 4784,
4801
    VEXP2PDrk = 4785,
4802
    VEXP2PDrkz  = 4786,
4803
    VEXP2PSm  = 4787,
4804
    VEXP2PSmb = 4788,
4805
    VEXP2PSmbk  = 4789,
4806
    VEXP2PSmbkz = 4790,
4807
    VEXP2PSmk = 4791,
4808
    VEXP2PSmkz  = 4792,
4809
    VEXP2PSr  = 4793,
4810
    VEXP2PSrb = 4794,
4811
    VEXP2PSrbk  = 4795,
4812
    VEXP2PSrbkz = 4796,
4813
    VEXP2PSrk = 4797,
4814
    VEXP2PSrkz  = 4798,
4815
    VEXPANDPDZ128rm = 4799,
4816
    VEXPANDPDZ128rmk  = 4800,
4817
    VEXPANDPDZ128rmkz = 4801,
4818
    VEXPANDPDZ128rr = 4802,
4819
    VEXPANDPDZ128rrk  = 4803,
4820
    VEXPANDPDZ128rrkz = 4804,
4821
    VEXPANDPDZ256rm = 4805,
4822
    VEXPANDPDZ256rmk  = 4806,
4823
    VEXPANDPDZ256rmkz = 4807,
4824
    VEXPANDPDZ256rr = 4808,
4825
    VEXPANDPDZ256rrk  = 4809,
4826
    VEXPANDPDZ256rrkz = 4810,
4827
    VEXPANDPDZrm  = 4811,
4828
    VEXPANDPDZrmk = 4812,
4829
    VEXPANDPDZrmkz  = 4813,
4830
    VEXPANDPDZrr  = 4814,
4831
    VEXPANDPDZrrk = 4815,
4832
    VEXPANDPDZrrkz  = 4816,
4833
    VEXPANDPSZ128rm = 4817,
4834
    VEXPANDPSZ128rmk  = 4818,
4835
    VEXPANDPSZ128rmkz = 4819,
4836
    VEXPANDPSZ128rr = 4820,
4837
    VEXPANDPSZ128rrk  = 4821,
4838
    VEXPANDPSZ128rrkz = 4822,
4839
    VEXPANDPSZ256rm = 4823,
4840
    VEXPANDPSZ256rmk  = 4824,
4841
    VEXPANDPSZ256rmkz = 4825,
4842
    VEXPANDPSZ256rr = 4826,
4843
    VEXPANDPSZ256rrk  = 4827,
4844
    VEXPANDPSZ256rrkz = 4828,
4845
    VEXPANDPSZrm  = 4829,
4846
    VEXPANDPSZrmk = 4830,
4847
    VEXPANDPSZrmkz  = 4831,
4848
    VEXPANDPSZrr  = 4832,
4849
    VEXPANDPSZrrk = 4833,
4850
    VEXPANDPSZrrkz  = 4834,
4851
    VEXTRACTF128mr  = 4835,
4852
    VEXTRACTF128rr  = 4836,
4853
    VEXTRACTF32x4Z256rm = 4837,
4854
    VEXTRACTF32x4Z256rmk  = 4838,
4855
    VEXTRACTF32x4Z256rr = 4839,
4856
    VEXTRACTF32x4Z256rrk  = 4840,
4857
    VEXTRACTF32x4Z256rrkz = 4841,
4858
    VEXTRACTF32x4Zrm  = 4842,
4859
    VEXTRACTF32x4Zrmk = 4843,
4860
    VEXTRACTF32x4Zrr  = 4844,
4861
    VEXTRACTF32x4Zrrk = 4845,
4862
    VEXTRACTF32x4Zrrkz  = 4846,
4863
    VEXTRACTF32x8Zrm  = 4847,
4864
    VEXTRACTF32x8Zrmk = 4848,
4865
    VEXTRACTF32x8Zrr  = 4849,
4866
    VEXTRACTF32x8Zrrk = 4850,
4867
    VEXTRACTF32x8Zrrkz  = 4851,
4868
    VEXTRACTF64x2Z256rm = 4852,
4869
    VEXTRACTF64x2Z256rmk  = 4853,
4870
    VEXTRACTF64x2Z256rr = 4854,
4871
    VEXTRACTF64x2Z256rrk  = 4855,
4872
    VEXTRACTF64x2Z256rrkz = 4856,
4873
    VEXTRACTF64x2Zrm  = 4857,
4874
    VEXTRACTF64x2Zrmk = 4858,
4875
    VEXTRACTF64x2Zrr  = 4859,
4876
    VEXTRACTF64x2Zrrk = 4860,
4877
    VEXTRACTF64x2Zrrkz  = 4861,
4878
    VEXTRACTF64x4Zrm  = 4862,
4879
    VEXTRACTF64x4Zrmk = 4863,
4880
    VEXTRACTF64x4Zrr  = 4864,
4881
    VEXTRACTF64x4Zrrk = 4865,
4882
    VEXTRACTF64x4Zrrkz  = 4866,
4883
    VEXTRACTI128mr  = 4867,
4884
    VEXTRACTI128rr  = 4868,
4885
    VEXTRACTI32x4Z256rm = 4869,
4886
    VEXTRACTI32x4Z256rmk  = 4870,
4887
    VEXTRACTI32x4Z256rr = 4871,
4888
    VEXTRACTI32x4Z256rrk  = 4872,
4889
    VEXTRACTI32x4Z256rrkz = 4873,
4890
    VEXTRACTI32x4Zrm  = 4874,
4891
    VEXTRACTI32x4Zrmk = 4875,
4892
    VEXTRACTI32x4Zrr  = 4876,
4893
    VEXTRACTI32x4Zrrk = 4877,
4894
    VEXTRACTI32x4Zrrkz  = 4878,
4895
    VEXTRACTI32x8Zrm  = 4879,
4896
    VEXTRACTI32x8Zrmk = 4880,
4897
    VEXTRACTI32x8Zrr  = 4881,
4898
    VEXTRACTI32x8Zrrk = 4882,
4899
    VEXTRACTI32x8Zrrkz  = 4883,
4900
    VEXTRACTI64x2Z256rm = 4884,
4901
    VEXTRACTI64x2Z256rmk  = 4885,
4902
    VEXTRACTI64x2Z256rr = 4886,
4903
    VEXTRACTI64x2Z256rrk  = 4887,
4904
    VEXTRACTI64x2Z256rrkz = 4888,
4905
    VEXTRACTI64x2Zrm  = 4889,
4906
    VEXTRACTI64x2Zrmk = 4890,
4907
    VEXTRACTI64x2Zrr  = 4891,
4908
    VEXTRACTI64x2Zrrk = 4892,
4909
    VEXTRACTI64x2Zrrkz  = 4893,
4910
    VEXTRACTI64x4Zrm  = 4894,
4911
    VEXTRACTI64x4Zrmk = 4895,
4912
    VEXTRACTI64x4Zrr  = 4896,
4913
    VEXTRACTI64x4Zrrk = 4897,
4914
    VEXTRACTI64x4Zrrkz  = 4898,
4915
    VEXTRACTPSmr  = 4899,
4916
    VEXTRACTPSrr  = 4900,
4917
    VEXTRACTPSzmr = 4901,
4918
    VEXTRACTPSzrr = 4902,
4919
    VFIXUPIMMPDZ128rmbi = 4903,
4920
    VFIXUPIMMPDZ128rmbik  = 4904,
4921
    VFIXUPIMMPDZ128rmbikz = 4905,
4922
    VFIXUPIMMPDZ128rmi  = 4906,
4923
    VFIXUPIMMPDZ128rmik = 4907,
4924
    VFIXUPIMMPDZ128rmikz  = 4908,
4925
    VFIXUPIMMPDZ128rri  = 4909,
4926
    VFIXUPIMMPDZ128rrik = 4910,
4927
    VFIXUPIMMPDZ128rrikz  = 4911,
4928
    VFIXUPIMMPDZ256rmbi = 4912,
4929
    VFIXUPIMMPDZ256rmbik  = 4913,
4930
    VFIXUPIMMPDZ256rmbikz = 4914,
4931
    VFIXUPIMMPDZ256rmi  = 4915,
4932
    VFIXUPIMMPDZ256rmik = 4916,
4933
    VFIXUPIMMPDZ256rmikz  = 4917,
4934
    VFIXUPIMMPDZ256rri  = 4918,
4935
    VFIXUPIMMPDZ256rrik = 4919,
4936
    VFIXUPIMMPDZ256rrikz  = 4920,
4937
    VFIXUPIMMPDZrmbi  = 4921,
4938
    VFIXUPIMMPDZrmbik = 4922,
4939
    VFIXUPIMMPDZrmbikz  = 4923,
4940
    VFIXUPIMMPDZrmi = 4924,
4941
    VFIXUPIMMPDZrmik  = 4925,
4942
    VFIXUPIMMPDZrmikz = 4926,
4943
    VFIXUPIMMPDZrri = 4927,
4944
    VFIXUPIMMPDZrrib  = 4928,
4945
    VFIXUPIMMPDZrribk = 4929,
4946
    VFIXUPIMMPDZrribkz  = 4930,
4947
    VFIXUPIMMPDZrrik  = 4931,
4948
    VFIXUPIMMPDZrrikz = 4932,
4949
    VFIXUPIMMPSZ128rmbi = 4933,
4950
    VFIXUPIMMPSZ128rmbik  = 4934,
4951
    VFIXUPIMMPSZ128rmbikz = 4935,
4952
    VFIXUPIMMPSZ128rmi  = 4936,
4953
    VFIXUPIMMPSZ128rmik = 4937,
4954
    VFIXUPIMMPSZ128rmikz  = 4938,
4955
    VFIXUPIMMPSZ128rri  = 4939,
4956
    VFIXUPIMMPSZ128rrik = 4940,
4957
    VFIXUPIMMPSZ128rrikz  = 4941,
4958
    VFIXUPIMMPSZ256rmbi = 4942,
4959
    VFIXUPIMMPSZ256rmbik  = 4943,
4960
    VFIXUPIMMPSZ256rmbikz = 4944,
4961
    VFIXUPIMMPSZ256rmi  = 4945,
4962
    VFIXUPIMMPSZ256rmik = 4946,
4963
    VFIXUPIMMPSZ256rmikz  = 4947,
4964
    VFIXUPIMMPSZ256rri  = 4948,
4965
    VFIXUPIMMPSZ256rrik = 4949,
4966
    VFIXUPIMMPSZ256rrikz  = 4950,
4967
    VFIXUPIMMPSZrmbi  = 4951,
4968
    VFIXUPIMMPSZrmbik = 4952,
4969
    VFIXUPIMMPSZrmbikz  = 4953,
4970
    VFIXUPIMMPSZrmi = 4954,
4971
    VFIXUPIMMPSZrmik  = 4955,
4972
    VFIXUPIMMPSZrmikz = 4956,
4973
    VFIXUPIMMPSZrri = 4957,
4974
    VFIXUPIMMPSZrrib  = 4958,
4975
    VFIXUPIMMPSZrribk = 4959,
4976
    VFIXUPIMMPSZrribkz  = 4960,
4977
    VFIXUPIMMPSZrrik  = 4961,
4978
    VFIXUPIMMPSZrrikz = 4962,
4979
    VFIXUPIMMSDrmi  = 4963,
4980
    VFIXUPIMMSDrmik = 4964,
4981
    VFIXUPIMMSDrmikz  = 4965,
4982
    VFIXUPIMMSDrri  = 4966,
4983
    VFIXUPIMMSDrrib = 4967,
4984
    VFIXUPIMMSDrribk  = 4968,
4985
    VFIXUPIMMSDrribkz = 4969,
4986
    VFIXUPIMMSDrrik = 4970,
4987
    VFIXUPIMMSDrrikz  = 4971,
4988
    VFIXUPIMMSSrmi  = 4972,
4989
    VFIXUPIMMSSrmik = 4973,
4990
    VFIXUPIMMSSrmikz  = 4974,
4991
    VFIXUPIMMSSrri  = 4975,
4992
    VFIXUPIMMSSrrib = 4976,
4993
    VFIXUPIMMSSrribk  = 4977,
4994
    VFIXUPIMMSSrribkz = 4978,
4995
    VFIXUPIMMSSrrik = 4979,
4996
    VFIXUPIMMSSrrikz  = 4980,
4997
    VFMADD132PDZ128m  = 4981,
4998
    VFMADD132PDZ128mb = 4982,
4999
    VFMADD132PDZ128mbk  = 4983,
5000
    VFMADD132PDZ128mbkz = 4984,
5001
    VFMADD132PDZ128mk = 4985,
5002
    VFMADD132PDZ128mkz  = 4986,
5003
    VFMADD132PDZ128r  = 4987,
5004
    VFMADD132PDZ128rk = 4988,
5005
    VFMADD132PDZ128rkz  = 4989,
5006
    VFMADD132PDZ256m  = 4990,
5007
    VFMADD132PDZ256mb = 4991,
5008
    VFMADD132PDZ256mbk  = 4992,
5009
    VFMADD132PDZ256mbkz = 4993,
5010
    VFMADD132PDZ256mk = 4994,
5011
    VFMADD132PDZ256mkz  = 4995,
5012
    VFMADD132PDZ256r  = 4996,
5013
    VFMADD132PDZ256rk = 4997,
5014
    VFMADD132PDZ256rkz  = 4998,
5015
    VFMADD132PDZm = 4999,
5016
    VFMADD132PDZmb  = 5000,
5017
    VFMADD132PDZmbk = 5001,
5018
    VFMADD132PDZmbkz  = 5002,
5019
    VFMADD132PDZmk  = 5003,
5020
    VFMADD132PDZmkz = 5004,
5021
    VFMADD132PDZr = 5005,
5022
    VFMADD132PDZrb  = 5006,
5023
    VFMADD132PDZrbk = 5007,
5024
    VFMADD132PDZrbkz  = 5008,
5025
    VFMADD132PDZrk  = 5009,
5026
    VFMADD132PDZrkz = 5010,
5027
    VFMADD132PSZ128m  = 5011,
5028
    VFMADD132PSZ128mb = 5012,
5029
    VFMADD132PSZ128mbk  = 5013,
5030
    VFMADD132PSZ128mbkz = 5014,
5031
    VFMADD132PSZ128mk = 5015,
5032
    VFMADD132PSZ128mkz  = 5016,
5033
    VFMADD132PSZ128r  = 5017,
5034
    VFMADD132PSZ128rk = 5018,
5035
    VFMADD132PSZ128rkz  = 5019,
5036
    VFMADD132PSZ256m  = 5020,
5037
    VFMADD132PSZ256mb = 5021,
5038
    VFMADD132PSZ256mbk  = 5022,
5039
    VFMADD132PSZ256mbkz = 5023,
5040
    VFMADD132PSZ256mk = 5024,
5041
    VFMADD132PSZ256mkz  = 5025,
5042
    VFMADD132PSZ256r  = 5026,
5043
    VFMADD132PSZ256rk = 5027,
5044
    VFMADD132PSZ256rkz  = 5028,
5045
    VFMADD132PSZm = 5029,
5046
    VFMADD132PSZmb  = 5030,
5047
    VFMADD132PSZmbk = 5031,
5048
    VFMADD132PSZmbkz  = 5032,
5049
    VFMADD132PSZmk  = 5033,
5050
    VFMADD132PSZmkz = 5034,
5051
    VFMADD132PSZr = 5035,
5052
    VFMADD132PSZrb  = 5036,
5053
    VFMADD132PSZrbk = 5037,
5054
    VFMADD132PSZrbkz  = 5038,
5055
    VFMADD132PSZrk  = 5039,
5056
    VFMADD132PSZrkz = 5040,
5057
    VFMADD132SDm  = 5041,
5058
    VFMADD132SDm_Int  = 5042,
5059
    VFMADD132SDm_Intk = 5043,
5060
    VFMADD132SDm_Intkz  = 5044,
5061
    VFMADD132SDr  = 5045,
5062
    VFMADD132SDr_Int  = 5046,
5063
    VFMADD132SDr_Intk = 5047,
5064
    VFMADD132SDr_Intkz  = 5048,
5065
    VFMADD132SDrb_Int = 5049,
5066
    VFMADD132SDrb_Intk  = 5050,
5067
    VFMADD132SDrb_Intkz = 5051,
5068
    VFMADD132SSm  = 5052,
5069
    VFMADD132SSm_Int  = 5053,
5070
    VFMADD132SSm_Intk = 5054,
5071
    VFMADD132SSm_Intkz  = 5055,
5072
    VFMADD132SSr  = 5056,
5073
    VFMADD132SSr_Int  = 5057,
5074
    VFMADD132SSr_Intk = 5058,
5075
    VFMADD132SSr_Intkz  = 5059,
5076
    VFMADD132SSrb_Int = 5060,
5077
    VFMADD132SSrb_Intk  = 5061,
5078
    VFMADD132SSrb_Intkz = 5062,
5079
    VFMADD213PDZ128m  = 5063,
5080
    VFMADD213PDZ128mb = 5064,
5081
    VFMADD213PDZ128mbk  = 5065,
5082
    VFMADD213PDZ128mbkz = 5066,
5083
    VFMADD213PDZ128mk = 5067,
5084
    VFMADD213PDZ128mkz  = 5068,
5085
    VFMADD213PDZ128r  = 5069,
5086
    VFMADD213PDZ128rk = 5070,
5087
    VFMADD213PDZ128rkz  = 5071,
5088
    VFMADD213PDZ256m  = 5072,
5089
    VFMADD213PDZ256mb = 5073,
5090
    VFMADD213PDZ256mbk  = 5074,
5091
    VFMADD213PDZ256mbkz = 5075,
5092
    VFMADD213PDZ256mk = 5076,
5093
    VFMADD213PDZ256mkz  = 5077,
5094
    VFMADD213PDZ256r  = 5078,
5095
    VFMADD213PDZ256rk = 5079,
5096
    VFMADD213PDZ256rkz  = 5080,
5097
    VFMADD213PDZm = 5081,
5098
    VFMADD213PDZmb  = 5082,
5099
    VFMADD213PDZmbk = 5083,
5100
    VFMADD213PDZmbkz  = 5084,
5101
    VFMADD213PDZmk  = 5085,
5102
    VFMADD213PDZmkz = 5086,
5103
    VFMADD213PDZr = 5087,
5104
    VFMADD213PDZrb  = 5088,
5105
    VFMADD213PDZrbk = 5089,
5106
    VFMADD213PDZrbkz  = 5090,
5107
    VFMADD213PDZrk  = 5091,
5108
    VFMADD213PDZrkz = 5092,
5109
    VFMADD213PSZ128m  = 5093,
5110
    VFMADD213PSZ128mb = 5094,
5111
    VFMADD213PSZ128mbk  = 5095,
5112
    VFMADD213PSZ128mbkz = 5096,
5113
    VFMADD213PSZ128mk = 5097,
5114
    VFMADD213PSZ128mkz  = 5098,
5115
    VFMADD213PSZ128r  = 5099,
5116
    VFMADD213PSZ128rk = 5100,
5117
    VFMADD213PSZ128rkz  = 5101,
5118
    VFMADD213PSZ256m  = 5102,
5119
    VFMADD213PSZ256mb = 5103,
5120
    VFMADD213PSZ256mbk  = 5104,
5121
    VFMADD213PSZ256mbkz = 5105,
5122
    VFMADD213PSZ256mk = 5106,
5123
    VFMADD213PSZ256mkz  = 5107,
5124
    VFMADD213PSZ256r  = 5108,
5125
    VFMADD213PSZ256rk = 5109,
5126
    VFMADD213PSZ256rkz  = 5110,
5127
    VFMADD213PSZm = 5111,
5128
    VFMADD213PSZmb  = 5112,
5129
    VFMADD213PSZmbk = 5113,
5130
    VFMADD213PSZmbkz  = 5114,
5131
    VFMADD213PSZmk  = 5115,
5132
    VFMADD213PSZmkz = 5116,
5133
    VFMADD213PSZr = 5117,
5134
    VFMADD213PSZrb  = 5118,
5135
    VFMADD213PSZrbk = 5119,
5136
    VFMADD213PSZrbkz  = 5120,
5137
    VFMADD213PSZrk  = 5121,
5138
    VFMADD213PSZrkz = 5122,
5139
    VFMADD213SDm  = 5123,
5140
    VFMADD213SDm_Int  = 5124,
5141
    VFMADD213SDm_Intk = 5125,
5142
    VFMADD213SDm_Intkz  = 5126,
5143
    VFMADD213SDr  = 5127,
5144
    VFMADD213SDr_Int  = 5128,
5145
    VFMADD213SDr_Intk = 5129,
5146
    VFMADD213SDr_Intkz  = 5130,
5147
    VFMADD213SDrb_Int = 5131,
5148
    VFMADD213SDrb_Intk  = 5132,
5149
    VFMADD213SDrb_Intkz = 5133,
5150
    VFMADD213SSm  = 5134,
5151
    VFMADD213SSm_Int  = 5135,
5152
    VFMADD213SSm_Intk = 5136,
5153
    VFMADD213SSm_Intkz  = 5137,
5154
    VFMADD213SSr  = 5138,
5155
    VFMADD213SSr_Int  = 5139,
5156
    VFMADD213SSr_Intk = 5140,
5157
    VFMADD213SSr_Intkz  = 5141,
5158
    VFMADD213SSrb_Int = 5142,
5159
    VFMADD213SSrb_Intk  = 5143,
5160
    VFMADD213SSrb_Intkz = 5144,
5161
    VFMADD231PDZ128m  = 5145,
5162
    VFMADD231PDZ128mb = 5146,
5163
    VFMADD231PDZ128mbk  = 5147,
5164
    VFMADD231PDZ128mbkz = 5148,
5165
    VFMADD231PDZ128mk = 5149,
5166
    VFMADD231PDZ128mkz  = 5150,
5167
    VFMADD231PDZ128r  = 5151,
5168
    VFMADD231PDZ128rk = 5152,
5169
    VFMADD231PDZ128rkz  = 5153,
5170
    VFMADD231PDZ256m  = 5154,
5171
    VFMADD231PDZ256mb = 5155,
5172
    VFMADD231PDZ256mbk  = 5156,
5173
    VFMADD231PDZ256mbkz = 5157,
5174
    VFMADD231PDZ256mk = 5158,
5175
    VFMADD231PDZ256mkz  = 5159,
5176
    VFMADD231PDZ256r  = 5160,
5177
    VFMADD231PDZ256rk = 5161,
5178
    VFMADD231PDZ256rkz  = 5162,
5179
    VFMADD231PDZm = 5163,
5180
    VFMADD231PDZmb  = 5164,
5181
    VFMADD231PDZmbk = 5165,
5182
    VFMADD231PDZmbkz  = 5166,
5183
    VFMADD231PDZmk  = 5167,
5184
    VFMADD231PDZmkz = 5168,
5185
    VFMADD231PDZr = 5169,
5186
    VFMADD231PDZrb  = 5170,
5187
    VFMADD231PDZrbk = 5171,
5188
    VFMADD231PDZrbkz  = 5172,
5189
    VFMADD231PDZrk  = 5173,
5190
    VFMADD231PDZrkz = 5174,
5191
    VFMADD231PSZ128m  = 5175,
5192
    VFMADD231PSZ128mb = 5176,
5193
    VFMADD231PSZ128mbk  = 5177,
5194
    VFMADD231PSZ128mbkz = 5178,
5195
    VFMADD231PSZ128mk = 5179,
5196
    VFMADD231PSZ128mkz  = 5180,
5197
    VFMADD231PSZ128r  = 5181,
5198
    VFMADD231PSZ128rk = 5182,
5199
    VFMADD231PSZ128rkz  = 5183,
5200
    VFMADD231PSZ256m  = 5184,
5201
    VFMADD231PSZ256mb = 5185,
5202
    VFMADD231PSZ256mbk  = 5186,
5203
    VFMADD231PSZ256mbkz = 5187,
5204
    VFMADD231PSZ256mk = 5188,
5205
    VFMADD231PSZ256mkz  = 5189,
5206
    VFMADD231PSZ256r  = 5190,
5207
    VFMADD231PSZ256rk = 5191,
5208
    VFMADD231PSZ256rkz  = 5192,
5209
    VFMADD231PSZm = 5193,
5210
    VFMADD231PSZmb  = 5194,
5211
    VFMADD231PSZmbk = 5195,
5212
    VFMADD231PSZmbkz  = 5196,
5213
    VFMADD231PSZmk  = 5197,
5214
    VFMADD231PSZmkz = 5198,
5215
    VFMADD231PSZr = 5199,
5216
    VFMADD231PSZrb  = 5200,
5217
    VFMADD231PSZrbk = 5201,
5218
    VFMADD231PSZrbkz  = 5202,
5219
    VFMADD231PSZrk  = 5203,
5220
    VFMADD231PSZrkz = 5204,
5221
    VFMADD231SDm  = 5205,
5222
    VFMADD231SDm_Int  = 5206,
5223
    VFMADD231SDm_Intk = 5207,
5224
    VFMADD231SDm_Intkz  = 5208,
5225
    VFMADD231SDr  = 5209,
5226
    VFMADD231SDr_Int  = 5210,
5227
    VFMADD231SDr_Intk = 5211,
5228
    VFMADD231SDr_Intkz  = 5212,
5229
    VFMADD231SDrb_Int = 5213,
5230
    VFMADD231SDrb_Intk  = 5214,
5231
    VFMADD231SDrb_Intkz = 5215,
5232
    VFMADD231SSm  = 5216,
5233
    VFMADD231SSm_Int  = 5217,
5234
    VFMADD231SSm_Intk = 5218,
5235
    VFMADD231SSm_Intkz  = 5219,
5236
    VFMADD231SSr  = 5220,
5237
    VFMADD231SSr_Int  = 5221,
5238
    VFMADD231SSr_Intk = 5222,
5239
    VFMADD231SSr_Intkz  = 5223,
5240
    VFMADD231SSrb_Int = 5224,
5241
    VFMADD231SSrb_Intk  = 5225,
5242
    VFMADD231SSrb_Intkz = 5226,
5243
    VFMADDPD4mr = 5227,
5244
    VFMADDPD4mrY  = 5228,
5245
    VFMADDPD4rm = 5229,
5246
    VFMADDPD4rmY  = 5230,
5247
    VFMADDPD4rr = 5231,
5248
    VFMADDPD4rrY  = 5232,
5249
    VFMADDPD4rrY_REV  = 5233,
5250
    VFMADDPD4rr_REV = 5234,
5251
    VFMADDPDr132m = 5235,
5252
    VFMADDPDr132mY  = 5236,
5253
    VFMADDPDr132r = 5237,
5254
    VFMADDPDr132rY  = 5238,
5255
    VFMADDPDr213m = 5239,
5256
    VFMADDPDr213mY  = 5240,
5257
    VFMADDPDr213r = 5241,
5258
    VFMADDPDr213rY  = 5242,
5259
    VFMADDPDr231m = 5243,
5260
    VFMADDPDr231mY  = 5244,
5261
    VFMADDPDr231r = 5245,
5262
    VFMADDPDr231rY  = 5246,
5263
    VFMADDPS4mr = 5247,
5264
    VFMADDPS4mrY  = 5248,
5265
    VFMADDPS4rm = 5249,
5266
    VFMADDPS4rmY  = 5250,
5267
    VFMADDPS4rr = 5251,
5268
    VFMADDPS4rrY  = 5252,
5269
    VFMADDPS4rrY_REV  = 5253,
5270
    VFMADDPS4rr_REV = 5254,
5271
    VFMADDPSr132m = 5255,
5272
    VFMADDPSr132mY  = 5256,
5273
    VFMADDPSr132r = 5257,
5274
    VFMADDPSr132rY  = 5258,
5275
    VFMADDPSr213m = 5259,
5276
    VFMADDPSr213mY  = 5260,
5277
    VFMADDPSr213r = 5261,
5278
    VFMADDPSr213rY  = 5262,
5279
    VFMADDPSr231m = 5263,
5280
    VFMADDPSr231mY  = 5264,
5281
    VFMADDPSr231r = 5265,
5282
    VFMADDPSr231rY  = 5266,
5283
    VFMADDSD4mr = 5267,
5284
    VFMADDSD4mr_Int = 5268,
5285
    VFMADDSD4rm = 5269,
5286
    VFMADDSD4rm_Int = 5270,
5287
    VFMADDSD4rr = 5271,
5288
    VFMADDSD4rr_Int = 5272,
5289
    VFMADDSD4rr_REV = 5273,
5290
    VFMADDSDr132m = 5274,
5291
    VFMADDSDr132m_Int = 5275,
5292
    VFMADDSDr132r = 5276,
5293
    VFMADDSDr132r_Int = 5277,
5294
    VFMADDSDr213m = 5278,
5295
    VFMADDSDr213m_Int = 5279,
5296
    VFMADDSDr213r = 5280,
5297
    VFMADDSDr213r_Int = 5281,
5298
    VFMADDSDr231m = 5282,
5299
    VFMADDSDr231m_Int = 5283,
5300
    VFMADDSDr231r = 5284,
5301
    VFMADDSDr231r_Int = 5285,
5302
    VFMADDSS4mr = 5286,
5303
    VFMADDSS4mr_Int = 5287,
5304
    VFMADDSS4rm = 5288,
5305
    VFMADDSS4rm_Int = 5289,
5306
    VFMADDSS4rr = 5290,
5307
    VFMADDSS4rr_Int = 5291,
5308
    VFMADDSS4rr_REV = 5292,
5309
    VFMADDSSr132m = 5293,
5310
    VFMADDSSr132m_Int = 5294,
5311
    VFMADDSSr132r = 5295,
5312
    VFMADDSSr132r_Int = 5296,
5313
    VFMADDSSr213m = 5297,
5314
    VFMADDSSr213m_Int = 5298,
5315
    VFMADDSSr213r = 5299,
5316
    VFMADDSSr213r_Int = 5300,
5317
    VFMADDSSr231m = 5301,
5318
    VFMADDSSr231m_Int = 5302,
5319
    VFMADDSSr231r = 5303,
5320
    VFMADDSSr231r_Int = 5304,
5321
    VFMADDSUB132PDZ128m = 5305,
5322
    VFMADDSUB132PDZ128mb  = 5306,
5323
    VFMADDSUB132PDZ128mbk = 5307,
5324
    VFMADDSUB132PDZ128mbkz  = 5308,
5325
    VFMADDSUB132PDZ128mk  = 5309,
5326
    VFMADDSUB132PDZ128mkz = 5310,
5327
    VFMADDSUB132PDZ128r = 5311,
5328
    VFMADDSUB132PDZ128rk  = 5312,
5329
    VFMADDSUB132PDZ128rkz = 5313,
5330
    VFMADDSUB132PDZ256m = 5314,
5331
    VFMADDSUB132PDZ256mb  = 5315,
5332
    VFMADDSUB132PDZ256mbk = 5316,
5333
    VFMADDSUB132PDZ256mbkz  = 5317,
5334
    VFMADDSUB132PDZ256mk  = 5318,
5335
    VFMADDSUB132PDZ256mkz = 5319,
5336
    VFMADDSUB132PDZ256r = 5320,
5337
    VFMADDSUB132PDZ256rk  = 5321,
5338
    VFMADDSUB132PDZ256rkz = 5322,
5339
    VFMADDSUB132PDZm  = 5323,
5340
    VFMADDSUB132PDZmb = 5324,
5341
    VFMADDSUB132PDZmbk  = 5325,
5342
    VFMADDSUB132PDZmbkz = 5326,
5343
    VFMADDSUB132PDZmk = 5327,
5344
    VFMADDSUB132PDZmkz  = 5328,
5345
    VFMADDSUB132PDZr  = 5329,
5346
    VFMADDSUB132PDZrb = 5330,
5347
    VFMADDSUB132PDZrbk  = 5331,
5348
    VFMADDSUB132PDZrbkz = 5332,
5349
    VFMADDSUB132PDZrk = 5333,
5350
    VFMADDSUB132PDZrkz  = 5334,
5351
    VFMADDSUB132PSZ128m = 5335,
5352
    VFMADDSUB132PSZ128mb  = 5336,
5353
    VFMADDSUB132PSZ128mbk = 5337,
5354
    VFMADDSUB132PSZ128mbkz  = 5338,
5355
    VFMADDSUB132PSZ128mk  = 5339,
5356
    VFMADDSUB132PSZ128mkz = 5340,
5357
    VFMADDSUB132PSZ128r = 5341,
5358
    VFMADDSUB132PSZ128rk  = 5342,
5359
    VFMADDSUB132PSZ128rkz = 5343,
5360
    VFMADDSUB132PSZ256m = 5344,
5361
    VFMADDSUB132PSZ256mb  = 5345,
5362
    VFMADDSUB132PSZ256mbk = 5346,
5363
    VFMADDSUB132PSZ256mbkz  = 5347,
5364
    VFMADDSUB132PSZ256mk  = 5348,
5365
    VFMADDSUB132PSZ256mkz = 5349,
5366
    VFMADDSUB132PSZ256r = 5350,
5367
    VFMADDSUB132PSZ256rk  = 5351,
5368
    VFMADDSUB132PSZ256rkz = 5352,
5369
    VFMADDSUB132PSZm  = 5353,
5370
    VFMADDSUB132PSZmb = 5354,
5371
    VFMADDSUB132PSZmbk  = 5355,
5372
    VFMADDSUB132PSZmbkz = 5356,
5373
    VFMADDSUB132PSZmk = 5357,
5374
    VFMADDSUB132PSZmkz  = 5358,
5375
    VFMADDSUB132PSZr  = 5359,
5376
    VFMADDSUB132PSZrb = 5360,
5377
    VFMADDSUB132PSZrbk  = 5361,
5378
    VFMADDSUB132PSZrbkz = 5362,
5379
    VFMADDSUB132PSZrk = 5363,
5380
    VFMADDSUB132PSZrkz  = 5364,
5381
    VFMADDSUB213PDZ128m = 5365,
5382
    VFMADDSUB213PDZ128mb  = 5366,
5383
    VFMADDSUB213PDZ128mbk = 5367,
5384
    VFMADDSUB213PDZ128mbkz  = 5368,
5385
    VFMADDSUB213PDZ128mk  = 5369,
5386
    VFMADDSUB213PDZ128mkz = 5370,
5387
    VFMADDSUB213PDZ128r = 5371,
5388
    VFMADDSUB213PDZ128rk  = 5372,
5389
    VFMADDSUB213PDZ128rkz = 5373,
5390
    VFMADDSUB213PDZ256m = 5374,
5391
    VFMADDSUB213PDZ256mb  = 5375,
5392
    VFMADDSUB213PDZ256mbk = 5376,
5393
    VFMADDSUB213PDZ256mbkz  = 5377,
5394
    VFMADDSUB213PDZ256mk  = 5378,
5395
    VFMADDSUB213PDZ256mkz = 5379,
5396
    VFMADDSUB213PDZ256r = 5380,
5397
    VFMADDSUB213PDZ256rk  = 5381,
5398
    VFMADDSUB213PDZ256rkz = 5382,
5399
    VFMADDSUB213PDZm  = 5383,
5400
    VFMADDSUB213PDZmb = 5384,
5401
    VFMADDSUB213PDZmbk  = 5385,
5402
    VFMADDSUB213PDZmbkz = 5386,
5403
    VFMADDSUB213PDZmk = 5387,
5404
    VFMADDSUB213PDZmkz  = 5388,
5405
    VFMADDSUB213PDZr  = 5389,
5406
    VFMADDSUB213PDZrb = 5390,
5407
    VFMADDSUB213PDZrbk  = 5391,
5408
    VFMADDSUB213PDZrbkz = 5392,
5409
    VFMADDSUB213PDZrk = 5393,
5410
    VFMADDSUB213PDZrkz  = 5394,
5411
    VFMADDSUB213PSZ128m = 5395,
5412
    VFMADDSUB213PSZ128mb  = 5396,
5413
    VFMADDSUB213PSZ128mbk = 5397,
5414
    VFMADDSUB213PSZ128mbkz  = 5398,
5415
    VFMADDSUB213PSZ128mk  = 5399,
5416
    VFMADDSUB213PSZ128mkz = 5400,
5417
    VFMADDSUB213PSZ128r = 5401,
5418
    VFMADDSUB213PSZ128rk  = 5402,
5419
    VFMADDSUB213PSZ128rkz = 5403,
5420
    VFMADDSUB213PSZ256m = 5404,
5421
    VFMADDSUB213PSZ256mb  = 5405,
5422
    VFMADDSUB213PSZ256mbk = 5406,
5423
    VFMADDSUB213PSZ256mbkz  = 5407,
5424
    VFMADDSUB213PSZ256mk  = 5408,
5425
    VFMADDSUB213PSZ256mkz = 5409,
5426
    VFMADDSUB213PSZ256r = 5410,
5427
    VFMADDSUB213PSZ256rk  = 5411,
5428
    VFMADDSUB213PSZ256rkz = 5412,
5429
    VFMADDSUB213PSZm  = 5413,
5430
    VFMADDSUB213PSZmb = 5414,
5431
    VFMADDSUB213PSZmbk  = 5415,
5432
    VFMADDSUB213PSZmbkz = 5416,
5433
    VFMADDSUB213PSZmk = 5417,
5434
    VFMADDSUB213PSZmkz  = 5418,
5435
    VFMADDSUB213PSZr  = 5419,
5436
    VFMADDSUB213PSZrb = 5420,
5437
    VFMADDSUB213PSZrbk  = 5421,
5438
    VFMADDSUB213PSZrbkz = 5422,
5439
    VFMADDSUB213PSZrk = 5423,
5440
    VFMADDSUB213PSZrkz  = 5424,
5441
    VFMADDSUB231PDZ128m = 5425,
5442
    VFMADDSUB231PDZ128mb  = 5426,
5443
    VFMADDSUB231PDZ128mbk = 5427,
5444
    VFMADDSUB231PDZ128mbkz  = 5428,
5445
    VFMADDSUB231PDZ128mk  = 5429,
5446
    VFMADDSUB231PDZ128mkz = 5430,
5447
    VFMADDSUB231PDZ128r = 5431,
5448
    VFMADDSUB231PDZ128rk  = 5432,
5449
    VFMADDSUB231PDZ128rkz = 5433,
5450
    VFMADDSUB231PDZ256m = 5434,
5451
    VFMADDSUB231PDZ256mb  = 5435,
5452
    VFMADDSUB231PDZ256mbk = 5436,
5453
    VFMADDSUB231PDZ256mbkz  = 5437,
5454
    VFMADDSUB231PDZ256mk  = 5438,
5455
    VFMADDSUB231PDZ256mkz = 5439,
5456
    VFMADDSUB231PDZ256r = 5440,
5457
    VFMADDSUB231PDZ256rk  = 5441,
5458
    VFMADDSUB231PDZ256rkz = 5442,
5459
    VFMADDSUB231PDZm  = 5443,
5460
    VFMADDSUB231PDZmb = 5444,
5461
    VFMADDSUB231PDZmbk  = 5445,
5462
    VFMADDSUB231PDZmbkz = 5446,
5463
    VFMADDSUB231PDZmk = 5447,
5464
    VFMADDSUB231PDZmkz  = 5448,
5465
    VFMADDSUB231PDZr  = 5449,
5466
    VFMADDSUB231PDZrb = 5450,
5467
    VFMADDSUB231PDZrbk  = 5451,
5468
    VFMADDSUB231PDZrbkz = 5452,
5469
    VFMADDSUB231PDZrk = 5453,
5470
    VFMADDSUB231PDZrkz  = 5454,
5471
    VFMADDSUB231PSZ128m = 5455,
5472
    VFMADDSUB231PSZ128mb  = 5456,
5473
    VFMADDSUB231PSZ128mbk = 5457,
5474
    VFMADDSUB231PSZ128mbkz  = 5458,
5475
    VFMADDSUB231PSZ128mk  = 5459,
5476
    VFMADDSUB231PSZ128mkz = 5460,
5477
    VFMADDSUB231PSZ128r = 5461,
5478
    VFMADDSUB231PSZ128rk  = 5462,
5479
    VFMADDSUB231PSZ128rkz = 5463,
5480
    VFMADDSUB231PSZ256m = 5464,
5481
    VFMADDSUB231PSZ256mb  = 5465,
5482
    VFMADDSUB231PSZ256mbk = 5466,
5483
    VFMADDSUB231PSZ256mbkz  = 5467,
5484
    VFMADDSUB231PSZ256mk  = 5468,
5485
    VFMADDSUB231PSZ256mkz = 5469,
5486
    VFMADDSUB231PSZ256r = 5470,
5487
    VFMADDSUB231PSZ256rk  = 5471,
5488
    VFMADDSUB231PSZ256rkz = 5472,
5489
    VFMADDSUB231PSZm  = 5473,
5490
    VFMADDSUB231PSZmb = 5474,
5491
    VFMADDSUB231PSZmbk  = 5475,
5492
    VFMADDSUB231PSZmbkz = 5476,
5493
    VFMADDSUB231PSZmk = 5477,
5494
    VFMADDSUB231PSZmkz  = 5478,
5495
    VFMADDSUB231PSZr  = 5479,
5496
    VFMADDSUB231PSZrb = 5480,
5497
    VFMADDSUB231PSZrbk  = 5481,
5498
    VFMADDSUB231PSZrbkz = 5482,
5499
    VFMADDSUB231PSZrk = 5483,
5500
    VFMADDSUB231PSZrkz  = 5484,
5501
    VFMADDSUBPD4mr  = 5485,
5502
    VFMADDSUBPD4mrY = 5486,
5503
    VFMADDSUBPD4rm  = 5487,
5504
    VFMADDSUBPD4rmY = 5488,
5505
    VFMADDSUBPD4rr  = 5489,
5506
    VFMADDSUBPD4rrY = 5490,
5507
    VFMADDSUBPD4rrY_REV = 5491,
5508
    VFMADDSUBPD4rr_REV  = 5492,
5509
    VFMADDSUBPDr132m  = 5493,
5510
    VFMADDSUBPDr132mY = 5494,
5511
    VFMADDSUBPDr132r  = 5495,
5512
    VFMADDSUBPDr132rY = 5496,
5513
    VFMADDSUBPDr213m  = 5497,
5514
    VFMADDSUBPDr213mY = 5498,
5515
    VFMADDSUBPDr213r  = 5499,
5516
    VFMADDSUBPDr213rY = 5500,
5517
    VFMADDSUBPDr231m  = 5501,
5518
    VFMADDSUBPDr231mY = 5502,
5519
    VFMADDSUBPDr231r  = 5503,
5520
    VFMADDSUBPDr231rY = 5504,
5521
    VFMADDSUBPS4mr  = 5505,
5522
    VFMADDSUBPS4mrY = 5506,
5523
    VFMADDSUBPS4rm  = 5507,
5524
    VFMADDSUBPS4rmY = 5508,
5525
    VFMADDSUBPS4rr  = 5509,
5526
    VFMADDSUBPS4rrY = 5510,
5527
    VFMADDSUBPS4rrY_REV = 5511,
5528
    VFMADDSUBPS4rr_REV  = 5512,
5529
    VFMADDSUBPSr132m  = 5513,
5530
    VFMADDSUBPSr132mY = 5514,
5531
    VFMADDSUBPSr132r  = 5515,
5532
    VFMADDSUBPSr132rY = 5516,
5533
    VFMADDSUBPSr213m  = 5517,
5534
    VFMADDSUBPSr213mY = 5518,
5535
    VFMADDSUBPSr213r  = 5519,
5536
    VFMADDSUBPSr213rY = 5520,
5537
    VFMADDSUBPSr231m  = 5521,
5538
    VFMADDSUBPSr231mY = 5522,
5539
    VFMADDSUBPSr231r  = 5523,
5540
    VFMADDSUBPSr231rY = 5524,
5541
    VFMSUB132PDZ128m  = 5525,
5542
    VFMSUB132PDZ128mb = 5526,
5543
    VFMSUB132PDZ128mbk  = 5527,
5544
    VFMSUB132PDZ128mbkz = 5528,
5545
    VFMSUB132PDZ128mk = 5529,
5546
    VFMSUB132PDZ128mkz  = 5530,
5547
    VFMSUB132PDZ128r  = 5531,
5548
    VFMSUB132PDZ128rk = 5532,
5549
    VFMSUB132PDZ128rkz  = 5533,
5550
    VFMSUB132PDZ256m  = 5534,
5551
    VFMSUB132PDZ256mb = 5535,
5552
    VFMSUB132PDZ256mbk  = 5536,
5553
    VFMSUB132PDZ256mbkz = 5537,
5554
    VFMSUB132PDZ256mk = 5538,
5555
    VFMSUB132PDZ256mkz  = 5539,
5556
    VFMSUB132PDZ256r  = 5540,
5557
    VFMSUB132PDZ256rk = 5541,
5558
    VFMSUB132PDZ256rkz  = 5542,
5559
    VFMSUB132PDZm = 5543,
5560
    VFMSUB132PDZmb  = 5544,
5561
    VFMSUB132PDZmbk = 5545,
5562
    VFMSUB132PDZmbkz  = 5546,
5563
    VFMSUB132PDZmk  = 5547,
5564
    VFMSUB132PDZmkz = 5548,
5565
    VFMSUB132PDZr = 5549,
5566
    VFMSUB132PDZrb  = 5550,
5567
    VFMSUB132PDZrbk = 5551,
5568
    VFMSUB132PDZrbkz  = 5552,
5569
    VFMSUB132PDZrk  = 5553,
5570
    VFMSUB132PDZrkz = 5554,
5571
    VFMSUB132PSZ128m  = 5555,
5572
    VFMSUB132PSZ128mb = 5556,
5573
    VFMSUB132PSZ128mbk  = 5557,
5574
    VFMSUB132PSZ128mbkz = 5558,
5575
    VFMSUB132PSZ128mk = 5559,
5576
    VFMSUB132PSZ128mkz  = 5560,
5577
    VFMSUB132PSZ128r  = 5561,
5578
    VFMSUB132PSZ128rk = 5562,
5579
    VFMSUB132PSZ128rkz  = 5563,
5580
    VFMSUB132PSZ256m  = 5564,
5581
    VFMSUB132PSZ256mb = 5565,
5582
    VFMSUB132PSZ256mbk  = 5566,
5583
    VFMSUB132PSZ256mbkz = 5567,
5584
    VFMSUB132PSZ256mk = 5568,
5585
    VFMSUB132PSZ256mkz  = 5569,
5586
    VFMSUB132PSZ256r  = 5570,
5587
    VFMSUB132PSZ256rk = 5571,
5588
    VFMSUB132PSZ256rkz  = 5572,
5589
    VFMSUB132PSZm = 5573,
5590
    VFMSUB132PSZmb  = 5574,
5591
    VFMSUB132PSZmbk = 5575,
5592
    VFMSUB132PSZmbkz  = 5576,
5593
    VFMSUB132PSZmk  = 5577,
5594
    VFMSUB132PSZmkz = 5578,
5595
    VFMSUB132PSZr = 5579,
5596
    VFMSUB132PSZrb  = 5580,
5597
    VFMSUB132PSZrbk = 5581,
5598
    VFMSUB132PSZrbkz  = 5582,
5599
    VFMSUB132PSZrk  = 5583,
5600
    VFMSUB132PSZrkz = 5584,
5601
    VFMSUB132SDm  = 5585,
5602
    VFMSUB132SDm_Int  = 5586,
5603
    VFMSUB132SDm_Intk = 5587,
5604
    VFMSUB132SDm_Intkz  = 5588,
5605
    VFMSUB132SDr  = 5589,
5606
    VFMSUB132SDr_Int  = 5590,
5607
    VFMSUB132SDr_Intk = 5591,
5608
    VFMSUB132SDr_Intkz  = 5592,
5609
    VFMSUB132SDrb_Int = 5593,
5610
    VFMSUB132SDrb_Intk  = 5594,
5611
    VFMSUB132SDrb_Intkz = 5595,
5612
    VFMSUB132SSm  = 5596,
5613
    VFMSUB132SSm_Int  = 5597,
5614
    VFMSUB132SSm_Intk = 5598,
5615
    VFMSUB132SSm_Intkz  = 5599,
5616
    VFMSUB132SSr  = 5600,
5617
    VFMSUB132SSr_Int  = 5601,
5618
    VFMSUB132SSr_Intk = 5602,
5619
    VFMSUB132SSr_Intkz  = 5603,
5620
    VFMSUB132SSrb_Int = 5604,
5621
    VFMSUB132SSrb_Intk  = 5605,
5622
    VFMSUB132SSrb_Intkz = 5606,
5623
    VFMSUB213PDZ128m  = 5607,
5624
    VFMSUB213PDZ128mb = 5608,
5625
    VFMSUB213PDZ128mbk  = 5609,
5626
    VFMSUB213PDZ128mbkz = 5610,
5627
    VFMSUB213PDZ128mk = 5611,
5628
    VFMSUB213PDZ128mkz  = 5612,
5629
    VFMSUB213PDZ128r  = 5613,
5630
    VFMSUB213PDZ128rk = 5614,
5631
    VFMSUB213PDZ128rkz  = 5615,
5632
    VFMSUB213PDZ256m  = 5616,
5633
    VFMSUB213PDZ256mb = 5617,
5634
    VFMSUB213PDZ256mbk  = 5618,
5635
    VFMSUB213PDZ256mbkz = 5619,
5636
    VFMSUB213PDZ256mk = 5620,
5637
    VFMSUB213PDZ256mkz  = 5621,
5638
    VFMSUB213PDZ256r  = 5622,
5639
    VFMSUB213PDZ256rk = 5623,
5640
    VFMSUB213PDZ256rkz  = 5624,
5641
    VFMSUB213PDZm = 5625,
5642
    VFMSUB213PDZmb  = 5626,
5643
    VFMSUB213PDZmbk = 5627,
5644
    VFMSUB213PDZmbkz  = 5628,
5645
    VFMSUB213PDZmk  = 5629,
5646
    VFMSUB213PDZmkz = 5630,
5647
    VFMSUB213PDZr = 5631,
5648
    VFMSUB213PDZrb  = 5632,
5649
    VFMSUB213PDZrbk = 5633,
5650
    VFMSUB213PDZrbkz  = 5634,
5651
    VFMSUB213PDZrk  = 5635,
5652
    VFMSUB213PDZrkz = 5636,
5653
    VFMSUB213PSZ128m  = 5637,
5654
    VFMSUB213PSZ128mb = 5638,
5655
    VFMSUB213PSZ128mbk  = 5639,
5656
    VFMSUB213PSZ128mbkz = 5640,
5657
    VFMSUB213PSZ128mk = 5641,
5658
    VFMSUB213PSZ128mkz  = 5642,
5659
    VFMSUB213PSZ128r  = 5643,
5660
    VFMSUB213PSZ128rk = 5644,
5661
    VFMSUB213PSZ128rkz  = 5645,
5662
    VFMSUB213PSZ256m  = 5646,
5663
    VFMSUB213PSZ256mb = 5647,
5664
    VFMSUB213PSZ256mbk  = 5648,
5665
    VFMSUB213PSZ256mbkz = 5649,
5666
    VFMSUB213PSZ256mk = 5650,
5667
    VFMSUB213PSZ256mkz  = 5651,
5668
    VFMSUB213PSZ256r  = 5652,
5669
    VFMSUB213PSZ256rk = 5653,
5670
    VFMSUB213PSZ256rkz  = 5654,
5671
    VFMSUB213PSZm = 5655,
5672
    VFMSUB213PSZmb  = 5656,
5673
    VFMSUB213PSZmbk = 5657,
5674
    VFMSUB213PSZmbkz  = 5658,
5675
    VFMSUB213PSZmk  = 5659,
5676
    VFMSUB213PSZmkz = 5660,
5677
    VFMSUB213PSZr = 5661,
5678
    VFMSUB213PSZrb  = 5662,
5679
    VFMSUB213PSZrbk = 5663,
5680
    VFMSUB213PSZrbkz  = 5664,
5681
    VFMSUB213PSZrk  = 5665,
5682
    VFMSUB213PSZrkz = 5666,
5683
    VFMSUB213SDm  = 5667,
5684
    VFMSUB213SDm_Int  = 5668,
5685
    VFMSUB213SDm_Intk = 5669,
5686
    VFMSUB213SDm_Intkz  = 5670,
5687
    VFMSUB213SDr  = 5671,
5688
    VFMSUB213SDr_Int  = 5672,
5689
    VFMSUB213SDr_Intk = 5673,
5690
    VFMSUB213SDr_Intkz  = 5674,
5691
    VFMSUB213SDrb_Int = 5675,
5692
    VFMSUB213SDrb_Intk  = 5676,
5693
    VFMSUB213SDrb_Intkz = 5677,
5694
    VFMSUB213SSm  = 5678,
5695
    VFMSUB213SSm_Int  = 5679,
5696
    VFMSUB213SSm_Intk = 5680,
5697
    VFMSUB213SSm_Intkz  = 5681,
5698
    VFMSUB213SSr  = 5682,
5699
    VFMSUB213SSr_Int  = 5683,
5700
    VFMSUB213SSr_Intk = 5684,
5701
    VFMSUB213SSr_Intkz  = 5685,
5702
    VFMSUB213SSrb_Int = 5686,
5703
    VFMSUB213SSrb_Intk  = 5687,
5704
    VFMSUB213SSrb_Intkz = 5688,
5705
    VFMSUB231PDZ128m  = 5689,
5706
    VFMSUB231PDZ128mb = 5690,
5707
    VFMSUB231PDZ128mbk  = 5691,
5708
    VFMSUB231PDZ128mbkz = 5692,
5709
    VFMSUB231PDZ128mk = 5693,
5710
    VFMSUB231PDZ128mkz  = 5694,
5711
    VFMSUB231PDZ128r  = 5695,
5712
    VFMSUB231PDZ128rk = 5696,
5713
    VFMSUB231PDZ128rkz  = 5697,
5714
    VFMSUB231PDZ256m  = 5698,
5715
    VFMSUB231PDZ256mb = 5699,
5716
    VFMSUB231PDZ256mbk  = 5700,
5717
    VFMSUB231PDZ256mbkz = 5701,
5718
    VFMSUB231PDZ256mk = 5702,
5719
    VFMSUB231PDZ256mkz  = 5703,
5720
    VFMSUB231PDZ256r  = 5704,
5721
    VFMSUB231PDZ256rk = 5705,
5722
    VFMSUB231PDZ256rkz  = 5706,
5723
    VFMSUB231PDZm = 5707,
5724
    VFMSUB231PDZmb  = 5708,
5725
    VFMSUB231PDZmbk = 5709,
5726
    VFMSUB231PDZmbkz  = 5710,
5727
    VFMSUB231PDZmk  = 5711,
5728
    VFMSUB231PDZmkz = 5712,
5729
    VFMSUB231PDZr = 5713,
5730
    VFMSUB231PDZrb  = 5714,
5731
    VFMSUB231PDZrbk = 5715,
5732
    VFMSUB231PDZrbkz  = 5716,
5733
    VFMSUB231PDZrk  = 5717,
5734
    VFMSUB231PDZrkz = 5718,
5735
    VFMSUB231PSZ128m  = 5719,
5736
    VFMSUB231PSZ128mb = 5720,
5737
    VFMSUB231PSZ128mbk  = 5721,
5738
    VFMSUB231PSZ128mbkz = 5722,
5739
    VFMSUB231PSZ128mk = 5723,
5740
    VFMSUB231PSZ128mkz  = 5724,
5741
    VFMSUB231PSZ128r  = 5725,
5742
    VFMSUB231PSZ128rk = 5726,
5743
    VFMSUB231PSZ128rkz  = 5727,
5744
    VFMSUB231PSZ256m  = 5728,
5745
    VFMSUB231PSZ256mb = 5729,
5746
    VFMSUB231PSZ256mbk  = 5730,
5747
    VFMSUB231PSZ256mbkz = 5731,
5748
    VFMSUB231PSZ256mk = 5732,
5749
    VFMSUB231PSZ256mkz  = 5733,
5750
    VFMSUB231PSZ256r  = 5734,
5751
    VFMSUB231PSZ256rk = 5735,
5752
    VFMSUB231PSZ256rkz  = 5736,
5753
    VFMSUB231PSZm = 5737,
5754
    VFMSUB231PSZmb  = 5738,
5755
    VFMSUB231PSZmbk = 5739,
5756
    VFMSUB231PSZmbkz  = 5740,
5757
    VFMSUB231PSZmk  = 5741,
5758
    VFMSUB231PSZmkz = 5742,
5759
    VFMSUB231PSZr = 5743,
5760
    VFMSUB231PSZrb  = 5744,
5761
    VFMSUB231PSZrbk = 5745,
5762
    VFMSUB231PSZrbkz  = 5746,
5763
    VFMSUB231PSZrk  = 5747,
5764
    VFMSUB231PSZrkz = 5748,
5765
    VFMSUB231SDm  = 5749,
5766
    VFMSUB231SDm_Int  = 5750,
5767
    VFMSUB231SDm_Intk = 5751,
5768
    VFMSUB231SDm_Intkz  = 5752,
5769
    VFMSUB231SDr  = 5753,
5770
    VFMSUB231SDr_Int  = 5754,
5771
    VFMSUB231SDr_Intk = 5755,
5772
    VFMSUB231SDr_Intkz  = 5756,
5773
    VFMSUB231SDrb_Int = 5757,
5774
    VFMSUB231SDrb_Intk  = 5758,
5775
    VFMSUB231SDrb_Intkz = 5759,
5776
    VFMSUB231SSm  = 5760,
5777
    VFMSUB231SSm_Int  = 5761,
5778
    VFMSUB231SSm_Intk = 5762,
5779
    VFMSUB231SSm_Intkz  = 5763,
5780
    VFMSUB231SSr  = 5764,
5781
    VFMSUB231SSr_Int  = 5765,
5782
    VFMSUB231SSr_Intk = 5766,
5783
    VFMSUB231SSr_Intkz  = 5767,
5784
    VFMSUB231SSrb_Int = 5768,
5785
    VFMSUB231SSrb_Intk  = 5769,
5786
    VFMSUB231SSrb_Intkz = 5770,
5787
    VFMSUBADD132PDZ128m = 5771,
5788
    VFMSUBADD132PDZ128mb  = 5772,
5789
    VFMSUBADD132PDZ128mbk = 5773,
5790
    VFMSUBADD132PDZ128mbkz  = 5774,
5791
    VFMSUBADD132PDZ128mk  = 5775,
5792
    VFMSUBADD132PDZ128mkz = 5776,
5793
    VFMSUBADD132PDZ128r = 5777,
5794
    VFMSUBADD132PDZ128rk  = 5778,
5795
    VFMSUBADD132PDZ128rkz = 5779,
5796
    VFMSUBADD132PDZ256m = 5780,
5797
    VFMSUBADD132PDZ256mb  = 5781,
5798
    VFMSUBADD132PDZ256mbk = 5782,
5799
    VFMSUBADD132PDZ256mbkz  = 5783,
5800
    VFMSUBADD132PDZ256mk  = 5784,
5801
    VFMSUBADD132PDZ256mkz = 5785,
5802
    VFMSUBADD132PDZ256r = 5786,
5803
    VFMSUBADD132PDZ256rk  = 5787,
5804
    VFMSUBADD132PDZ256rkz = 5788,
5805
    VFMSUBADD132PDZm  = 5789,
5806
    VFMSUBADD132PDZmb = 5790,
5807
    VFMSUBADD132PDZmbk  = 5791,
5808
    VFMSUBADD132PDZmbkz = 5792,
5809
    VFMSUBADD132PDZmk = 5793,
5810
    VFMSUBADD132PDZmkz  = 5794,
5811
    VFMSUBADD132PDZr  = 5795,
5812
    VFMSUBADD132PDZrb = 5796,
5813
    VFMSUBADD132PDZrbk  = 5797,
5814
    VFMSUBADD132PDZrbkz = 5798,
5815
    VFMSUBADD132PDZrk = 5799,
5816
    VFMSUBADD132PDZrkz  = 5800,
5817
    VFMSUBADD132PSZ128m = 5801,
5818
    VFMSUBADD132PSZ128mb  = 5802,
5819
    VFMSUBADD132PSZ128mbk = 5803,
5820
    VFMSUBADD132PSZ128mbkz  = 5804,
5821
    VFMSUBADD132PSZ128mk  = 5805,
5822
    VFMSUBADD132PSZ128mkz = 5806,
5823
    VFMSUBADD132PSZ128r = 5807,
5824
    VFMSUBADD132PSZ128rk  = 5808,
5825
    VFMSUBADD132PSZ128rkz = 5809,
5826
    VFMSUBADD132PSZ256m = 5810,
5827
    VFMSUBADD132PSZ256mb  = 5811,
5828
    VFMSUBADD132PSZ256mbk = 5812,
5829
    VFMSUBADD132PSZ256mbkz  = 5813,
5830
    VFMSUBADD132PSZ256mk  = 5814,
5831
    VFMSUBADD132PSZ256mkz = 5815,
5832
    VFMSUBADD132PSZ256r = 5816,
5833
    VFMSUBADD132PSZ256rk  = 5817,
5834
    VFMSUBADD132PSZ256rkz = 5818,
5835
    VFMSUBADD132PSZm  = 5819,
5836
    VFMSUBADD132PSZmb = 5820,
5837
    VFMSUBADD132PSZmbk  = 5821,
5838
    VFMSUBADD132PSZmbkz = 5822,
5839
    VFMSUBADD132PSZmk = 5823,
5840
    VFMSUBADD132PSZmkz  = 5824,
5841
    VFMSUBADD132PSZr  = 5825,
5842
    VFMSUBADD132PSZrb = 5826,
5843
    VFMSUBADD132PSZrbk  = 5827,
5844
    VFMSUBADD132PSZrbkz = 5828,
5845
    VFMSUBADD132PSZrk = 5829,
5846
    VFMSUBADD132PSZrkz  = 5830,
5847
    VFMSUBADD213PDZ128m = 5831,
5848
    VFMSUBADD213PDZ128mb  = 5832,
5849
    VFMSUBADD213PDZ128mbk = 5833,
5850
    VFMSUBADD213PDZ128mbkz  = 5834,
5851
    VFMSUBADD213PDZ128mk  = 5835,
5852
    VFMSUBADD213PDZ128mkz = 5836,
5853
    VFMSUBADD213PDZ128r = 5837,
5854
    VFMSUBADD213PDZ128rk  = 5838,
5855
    VFMSUBADD213PDZ128rkz = 5839,
5856
    VFMSUBADD213PDZ256m = 5840,
5857
    VFMSUBADD213PDZ256mb  = 5841,
5858
    VFMSUBADD213PDZ256mbk = 5842,
5859
    VFMSUBADD213PDZ256mbkz  = 5843,
5860
    VFMSUBADD213PDZ256mk  = 5844,
5861
    VFMSUBADD213PDZ256mkz = 5845,
5862
    VFMSUBADD213PDZ256r = 5846,
5863
    VFMSUBADD213PDZ256rk  = 5847,
5864
    VFMSUBADD213PDZ256rkz = 5848,
5865
    VFMSUBADD213PDZm  = 5849,
5866
    VFMSUBADD213PDZmb = 5850,
5867
    VFMSUBADD213PDZmbk  = 5851,
5868
    VFMSUBADD213PDZmbkz = 5852,
5869
    VFMSUBADD213PDZmk = 5853,
5870
    VFMSUBADD213PDZmkz  = 5854,
5871
    VFMSUBADD213PDZr  = 5855,
5872
    VFMSUBADD213PDZrb = 5856,
5873
    VFMSUBADD213PDZrbk  = 5857,
5874
    VFMSUBADD213PDZrbkz = 5858,
5875
    VFMSUBADD213PDZrk = 5859,
5876
    VFMSUBADD213PDZrkz  = 5860,
5877
    VFMSUBADD213PSZ128m = 5861,
5878
    VFMSUBADD213PSZ128mb  = 5862,
5879
    VFMSUBADD213PSZ128mbk = 5863,
5880
    VFMSUBADD213PSZ128mbkz  = 5864,
5881
    VFMSUBADD213PSZ128mk  = 5865,
5882
    VFMSUBADD213PSZ128mkz = 5866,
5883
    VFMSUBADD213PSZ128r = 5867,
5884
    VFMSUBADD213PSZ128rk  = 5868,
5885
    VFMSUBADD213PSZ128rkz = 5869,
5886
    VFMSUBADD213PSZ256m = 5870,
5887
    VFMSUBADD213PSZ256mb  = 5871,
5888
    VFMSUBADD213PSZ256mbk = 5872,
5889
    VFMSUBADD213PSZ256mbkz  = 5873,
5890
    VFMSUBADD213PSZ256mk  = 5874,
5891
    VFMSUBADD213PSZ256mkz = 5875,
5892
    VFMSUBADD213PSZ256r = 5876,
5893
    VFMSUBADD213PSZ256rk  = 5877,
5894
    VFMSUBADD213PSZ256rkz = 5878,
5895
    VFMSUBADD213PSZm  = 5879,
5896
    VFMSUBADD213PSZmb = 5880,
5897
    VFMSUBADD213PSZmbk  = 5881,
5898
    VFMSUBADD213PSZmbkz = 5882,
5899
    VFMSUBADD213PSZmk = 5883,
5900
    VFMSUBADD213PSZmkz  = 5884,
5901
    VFMSUBADD213PSZr  = 5885,
5902
    VFMSUBADD213PSZrb = 5886,
5903
    VFMSUBADD213PSZrbk  = 5887,
5904
    VFMSUBADD213PSZrbkz = 5888,
5905
    VFMSUBADD213PSZrk = 5889,
5906
    VFMSUBADD213PSZrkz  = 5890,
5907
    VFMSUBADD231PDZ128m = 5891,
5908
    VFMSUBADD231PDZ128mb  = 5892,
5909
    VFMSUBADD231PDZ128mbk = 5893,
5910
    VFMSUBADD231PDZ128mbkz  = 5894,
5911
    VFMSUBADD231PDZ128mk  = 5895,
5912
    VFMSUBADD231PDZ128mkz = 5896,
5913
    VFMSUBADD231PDZ128r = 5897,
5914
    VFMSUBADD231PDZ128rk  = 5898,
5915
    VFMSUBADD231PDZ128rkz = 5899,
5916
    VFMSUBADD231PDZ256m = 5900,
5917
    VFMSUBADD231PDZ256mb  = 5901,
5918
    VFMSUBADD231PDZ256mbk = 5902,
5919
    VFMSUBADD231PDZ256mbkz  = 5903,
5920
    VFMSUBADD231PDZ256mk  = 5904,
5921
    VFMSUBADD231PDZ256mkz = 5905,
5922
    VFMSUBADD231PDZ256r = 5906,
5923
    VFMSUBADD231PDZ256rk  = 5907,
5924
    VFMSUBADD231PDZ256rkz = 5908,
5925
    VFMSUBADD231PDZm  = 5909,
5926
    VFMSUBADD231PDZmb = 5910,
5927
    VFMSUBADD231PDZmbk  = 5911,
5928
    VFMSUBADD231PDZmbkz = 5912,
5929
    VFMSUBADD231PDZmk = 5913,
5930
    VFMSUBADD231PDZmkz  = 5914,
5931
    VFMSUBADD231PDZr  = 5915,
5932
    VFMSUBADD231PDZrb = 5916,
5933
    VFMSUBADD231PDZrbk  = 5917,
5934
    VFMSUBADD231PDZrbkz = 5918,
5935
    VFMSUBADD231PDZrk = 5919,
5936
    VFMSUBADD231PDZrkz  = 5920,
5937
    VFMSUBADD231PSZ128m = 5921,
5938
    VFMSUBADD231PSZ128mb  = 5922,
5939
    VFMSUBADD231PSZ128mbk = 5923,
5940
    VFMSUBADD231PSZ128mbkz  = 5924,
5941
    VFMSUBADD231PSZ128mk  = 5925,
5942
    VFMSUBADD231PSZ128mkz = 5926,
5943
    VFMSUBADD231PSZ128r = 5927,
5944
    VFMSUBADD231PSZ128rk  = 5928,
5945
    VFMSUBADD231PSZ128rkz = 5929,
5946
    VFMSUBADD231PSZ256m = 5930,
5947
    VFMSUBADD231PSZ256mb  = 5931,
5948
    VFMSUBADD231PSZ256mbk = 5932,
5949
    VFMSUBADD231PSZ256mbkz  = 5933,
5950
    VFMSUBADD231PSZ256mk  = 5934,
5951
    VFMSUBADD231PSZ256mkz = 5935,
5952
    VFMSUBADD231PSZ256r = 5936,
5953
    VFMSUBADD231PSZ256rk  = 5937,
5954
    VFMSUBADD231PSZ256rkz = 5938,
5955
    VFMSUBADD231PSZm  = 5939,
5956
    VFMSUBADD231PSZmb = 5940,
5957
    VFMSUBADD231PSZmbk  = 5941,
5958
    VFMSUBADD231PSZmbkz = 5942,
5959
    VFMSUBADD231PSZmk = 5943,
5960
    VFMSUBADD231PSZmkz  = 5944,
5961
    VFMSUBADD231PSZr  = 5945,
5962
    VFMSUBADD231PSZrb = 5946,
5963
    VFMSUBADD231PSZrbk  = 5947,
5964
    VFMSUBADD231PSZrbkz = 5948,
5965
    VFMSUBADD231PSZrk = 5949,
5966
    VFMSUBADD231PSZrkz  = 5950,
5967
    VFMSUBADDPD4mr  = 5951,
5968
    VFMSUBADDPD4mrY = 5952,
5969
    VFMSUBADDPD4rm  = 5953,
5970
    VFMSUBADDPD4rmY = 5954,
5971
    VFMSUBADDPD4rr  = 5955,
5972
    VFMSUBADDPD4rrY = 5956,
5973
    VFMSUBADDPD4rrY_REV = 5957,
5974
    VFMSUBADDPD4rr_REV  = 5958,
5975
    VFMSUBADDPDr132m  = 5959,
5976
    VFMSUBADDPDr132mY = 5960,
5977
    VFMSUBADDPDr132r  = 5961,
5978
    VFMSUBADDPDr132rY = 5962,
5979
    VFMSUBADDPDr213m  = 5963,
5980
    VFMSUBADDPDr213mY = 5964,
5981
    VFMSUBADDPDr213r  = 5965,
5982
    VFMSUBADDPDr213rY = 5966,
5983
    VFMSUBADDPDr231m  = 5967,
5984
    VFMSUBADDPDr231mY = 5968,
5985
    VFMSUBADDPDr231r  = 5969,
5986
    VFMSUBADDPDr231rY = 5970,
5987
    VFMSUBADDPS4mr  = 5971,
5988
    VFMSUBADDPS4mrY = 5972,
5989
    VFMSUBADDPS4rm  = 5973,
5990
    VFMSUBADDPS4rmY = 5974,
5991
    VFMSUBADDPS4rr  = 5975,
5992
    VFMSUBADDPS4rrY = 5976,
5993
    VFMSUBADDPS4rrY_REV = 5977,
5994
    VFMSUBADDPS4rr_REV  = 5978,
5995
    VFMSUBADDPSr132m  = 5979,
5996
    VFMSUBADDPSr132mY = 5980,
5997
    VFMSUBADDPSr132r  = 5981,
5998
    VFMSUBADDPSr132rY = 5982,
5999
    VFMSUBADDPSr213m  = 5983,
6000
    VFMSUBADDPSr213mY = 5984,
6001
    VFMSUBADDPSr213r  = 5985,
6002
    VFMSUBADDPSr213rY = 5986,
6003
    VFMSUBADDPSr231m  = 5987,
6004
    VFMSUBADDPSr231mY = 5988,
6005
    VFMSUBADDPSr231r  = 5989,
6006
    VFMSUBADDPSr231rY = 5990,
6007
    VFMSUBPD4mr = 5991,
6008
    VFMSUBPD4mrY  = 5992,
6009
    VFMSUBPD4rm = 5993,
6010
    VFMSUBPD4rmY  = 5994,
6011
    VFMSUBPD4rr = 5995,
6012
    VFMSUBPD4rrY  = 5996,
6013
    VFMSUBPD4rrY_REV  = 5997,
6014
    VFMSUBPD4rr_REV = 5998,
6015
    VFMSUBPDr132m = 5999,
6016
    VFMSUBPDr132mY  = 6000,
6017
    VFMSUBPDr132r = 6001,
6018
    VFMSUBPDr132rY  = 6002,
6019
    VFMSUBPDr213m = 6003,
6020
    VFMSUBPDr213mY  = 6004,
6021
    VFMSUBPDr213r = 6005,
6022
    VFMSUBPDr213rY  = 6006,
6023
    VFMSUBPDr231m = 6007,
6024
    VFMSUBPDr231mY  = 6008,
6025
    VFMSUBPDr231r = 6009,
6026
    VFMSUBPDr231rY  = 6010,
6027
    VFMSUBPS4mr = 6011,
6028
    VFMSUBPS4mrY  = 6012,
6029
    VFMSUBPS4rm = 6013,
6030
    VFMSUBPS4rmY  = 6014,
6031
    VFMSUBPS4rr = 6015,
6032
    VFMSUBPS4rrY  = 6016,
6033
    VFMSUBPS4rrY_REV  = 6017,
6034
    VFMSUBPS4rr_REV = 6018,
6035
    VFMSUBPSr132m = 6019,
6036
    VFMSUBPSr132mY  = 6020,
6037
    VFMSUBPSr132r = 6021,
6038
    VFMSUBPSr132rY  = 6022,
6039
    VFMSUBPSr213m = 6023,
6040
    VFMSUBPSr213mY  = 6024,
6041
    VFMSUBPSr213r = 6025,
6042
    VFMSUBPSr213rY  = 6026,
6043
    VFMSUBPSr231m = 6027,
6044
    VFMSUBPSr231mY  = 6028,
6045
    VFMSUBPSr231r = 6029,
6046
    VFMSUBPSr231rY  = 6030,
6047
    VFMSUBSD4mr = 6031,
6048
    VFMSUBSD4mr_Int = 6032,
6049
    VFMSUBSD4rm = 6033,
6050
    VFMSUBSD4rm_Int = 6034,
6051
    VFMSUBSD4rr = 6035,
6052
    VFMSUBSD4rr_Int = 6036,
6053
    VFMSUBSD4rr_REV = 6037,
6054
    VFMSUBSDr132m = 6038,
6055
    VFMSUBSDr132m_Int = 6039,
6056
    VFMSUBSDr132r = 6040,
6057
    VFMSUBSDr132r_Int = 6041,
6058
    VFMSUBSDr213m = 6042,
6059
    VFMSUBSDr213m_Int = 6043,
6060
    VFMSUBSDr213r = 6044,
6061
    VFMSUBSDr213r_Int = 6045,
6062
    VFMSUBSDr231m = 6046,
6063
    VFMSUBSDr231m_Int = 6047,
6064
    VFMSUBSDr231r = 6048,
6065
    VFMSUBSDr231r_Int = 6049,
6066
    VFMSUBSS4mr = 6050,
6067
    VFMSUBSS4mr_Int = 6051,
6068
    VFMSUBSS4rm = 6052,
6069
    VFMSUBSS4rm_Int = 6053,
6070
    VFMSUBSS4rr = 6054,
6071
    VFMSUBSS4rr_Int = 6055,
6072
    VFMSUBSS4rr_REV = 6056,
6073
    VFMSUBSSr132m = 6057,
6074
    VFMSUBSSr132m_Int = 6058,
6075
    VFMSUBSSr132r = 6059,
6076
    VFMSUBSSr132r_Int = 6060,
6077
    VFMSUBSSr213m = 6061,
6078
    VFMSUBSSr213m_Int = 6062,
6079
    VFMSUBSSr213r = 6063,
6080
    VFMSUBSSr213r_Int = 6064,
6081
    VFMSUBSSr231m = 6065,
6082
    VFMSUBSSr231m_Int = 6066,
6083
    VFMSUBSSr231r = 6067,
6084
    VFMSUBSSr231r_Int = 6068,
6085
    VFNMADD132PDZ128m = 6069,
6086
    VFNMADD132PDZ128mb  = 6070,
6087
    VFNMADD132PDZ128mbk = 6071,
6088
    VFNMADD132PDZ128mbkz  = 6072,
6089
    VFNMADD132PDZ128mk  = 6073,
6090
    VFNMADD132PDZ128mkz = 6074,
6091
    VFNMADD132PDZ128r = 6075,
6092
    VFNMADD132PDZ128rk  = 6076,
6093
    VFNMADD132PDZ128rkz = 6077,
6094
    VFNMADD132PDZ256m = 6078,
6095
    VFNMADD132PDZ256mb  = 6079,
6096
    VFNMADD132PDZ256mbk = 6080,
6097
    VFNMADD132PDZ256mbkz  = 6081,
6098
    VFNMADD132PDZ256mk  = 6082,
6099
    VFNMADD132PDZ256mkz = 6083,
6100
    VFNMADD132PDZ256r = 6084,
6101
    VFNMADD132PDZ256rk  = 6085,
6102
    VFNMADD132PDZ256rkz = 6086,
6103
    VFNMADD132PDZm  = 6087,
6104
    VFNMADD132PDZmb = 6088,
6105
    VFNMADD132PDZmbk  = 6089,
6106
    VFNMADD132PDZmbkz = 6090,
6107
    VFNMADD132PDZmk = 6091,
6108
    VFNMADD132PDZmkz  = 6092,
6109
    VFNMADD132PDZr  = 6093,
6110
    VFNMADD132PDZrb = 6094,
6111
    VFNMADD132PDZrbk  = 6095,
6112
    VFNMADD132PDZrbkz = 6096,
6113
    VFNMADD132PDZrk = 6097,
6114
    VFNMADD132PDZrkz  = 6098,
6115
    VFNMADD132PSZ128m = 6099,
6116
    VFNMADD132PSZ128mb  = 6100,
6117
    VFNMADD132PSZ128mbk = 6101,
6118
    VFNMADD132PSZ128mbkz  = 6102,
6119
    VFNMADD132PSZ128mk  = 6103,
6120
    VFNMADD132PSZ128mkz = 6104,
6121
    VFNMADD132PSZ128r = 6105,
6122
    VFNMADD132PSZ128rk  = 6106,
6123
    VFNMADD132PSZ128rkz = 6107,
6124
    VFNMADD132PSZ256m = 6108,
6125
    VFNMADD132PSZ256mb  = 6109,
6126
    VFNMADD132PSZ256mbk = 6110,
6127
    VFNMADD132PSZ256mbkz  = 6111,
6128
    VFNMADD132PSZ256mk  = 6112,
6129
    VFNMADD132PSZ256mkz = 6113,
6130
    VFNMADD132PSZ256r = 6114,
6131
    VFNMADD132PSZ256rk  = 6115,
6132
    VFNMADD132PSZ256rkz = 6116,
6133
    VFNMADD132PSZm  = 6117,
6134
    VFNMADD132PSZmb = 6118,
6135
    VFNMADD132PSZmbk  = 6119,
6136
    VFNMADD132PSZmbkz = 6120,
6137
    VFNMADD132PSZmk = 6121,
6138
    VFNMADD132PSZmkz  = 6122,
6139
    VFNMADD132PSZr  = 6123,
6140
    VFNMADD132PSZrb = 6124,
6141
    VFNMADD132PSZrbk  = 6125,
6142
    VFNMADD132PSZrbkz = 6126,
6143
    VFNMADD132PSZrk = 6127,
6144
    VFNMADD132PSZrkz  = 6128,
6145
    VFNMADD132SDm = 6129,
6146
    VFNMADD132SDm_Int = 6130,
6147
    VFNMADD132SDm_Intk  = 6131,
6148
    VFNMADD132SDm_Intkz = 6132,
6149
    VFNMADD132SDr = 6133,
6150
    VFNMADD132SDr_Int = 6134,
6151
    VFNMADD132SDr_Intk  = 6135,
6152
    VFNMADD132SDr_Intkz = 6136,
6153
    VFNMADD132SDrb_Int  = 6137,
6154
    VFNMADD132SDrb_Intk = 6138,
6155
    VFNMADD132SDrb_Intkz  = 6139,
6156
    VFNMADD132SSm = 6140,
6157
    VFNMADD132SSm_Int = 6141,
6158
    VFNMADD132SSm_Intk  = 6142,
6159
    VFNMADD132SSm_Intkz = 6143,
6160
    VFNMADD132SSr = 6144,
6161
    VFNMADD132SSr_Int = 6145,
6162
    VFNMADD132SSr_Intk  = 6146,
6163
    VFNMADD132SSr_Intkz = 6147,
6164
    VFNMADD132SSrb_Int  = 6148,
6165
    VFNMADD132SSrb_Intk = 6149,
6166
    VFNMADD132SSrb_Intkz  = 6150,
6167
    VFNMADD213PDZ128m = 6151,
6168
    VFNMADD213PDZ128mb  = 6152,
6169
    VFNMADD213PDZ128mbk = 6153,
6170
    VFNMADD213PDZ128mbkz  = 6154,
6171
    VFNMADD213PDZ128mk  = 6155,
6172
    VFNMADD213PDZ128mkz = 6156,
6173
    VFNMADD213PDZ128r = 6157,
6174
    VFNMADD213PDZ128rk  = 6158,
6175
    VFNMADD213PDZ128rkz = 6159,
6176
    VFNMADD213PDZ256m = 6160,
6177
    VFNMADD213PDZ256mb  = 6161,
6178
    VFNMADD213PDZ256mbk = 6162,
6179
    VFNMADD213PDZ256mbkz  = 6163,
6180
    VFNMADD213PDZ256mk  = 6164,
6181
    VFNMADD213PDZ256mkz = 6165,
6182
    VFNMADD213PDZ256r = 6166,
6183
    VFNMADD213PDZ256rk  = 6167,
6184
    VFNMADD213PDZ256rkz = 6168,
6185
    VFNMADD213PDZm  = 6169,
6186
    VFNMADD213PDZmb = 6170,
6187
    VFNMADD213PDZmbk  = 6171,
6188
    VFNMADD213PDZmbkz = 6172,
6189
    VFNMADD213PDZmk = 6173,
6190
    VFNMADD213PDZmkz  = 6174,
6191
    VFNMADD213PDZr  = 6175,
6192
    VFNMADD213PDZrb = 6176,
6193
    VFNMADD213PDZrbk  = 6177,
6194
    VFNMADD213PDZrbkz = 6178,
6195
    VFNMADD213PDZrk = 6179,
6196
    VFNMADD213PDZrkz  = 6180,
6197
    VFNMADD213PSZ128m = 6181,
6198
    VFNMADD213PSZ128mb  = 6182,
6199
    VFNMADD213PSZ128mbk = 6183,
6200
    VFNMADD213PSZ128mbkz  = 6184,
6201
    VFNMADD213PSZ128mk  = 6185,
6202
    VFNMADD213PSZ128mkz = 6186,
6203
    VFNMADD213PSZ128r = 6187,
6204
    VFNMADD213PSZ128rk  = 6188,
6205
    VFNMADD213PSZ128rkz = 6189,
6206
    VFNMADD213PSZ256m = 6190,
6207
    VFNMADD213PSZ256mb  = 6191,
6208
    VFNMADD213PSZ256mbk = 6192,
6209
    VFNMADD213PSZ256mbkz  = 6193,
6210
    VFNMADD213PSZ256mk  = 6194,
6211
    VFNMADD213PSZ256mkz = 6195,
6212
    VFNMADD213PSZ256r = 6196,
6213
    VFNMADD213PSZ256rk  = 6197,
6214
    VFNMADD213PSZ256rkz = 6198,
6215
    VFNMADD213PSZm  = 6199,
6216
    VFNMADD213PSZmb = 6200,
6217
    VFNMADD213PSZmbk  = 6201,
6218
    VFNMADD213PSZmbkz = 6202,
6219
    VFNMADD213PSZmk = 6203,
6220
    VFNMADD213PSZmkz  = 6204,
6221
    VFNMADD213PSZr  = 6205,
6222
    VFNMADD213PSZrb = 6206,
6223
    VFNMADD213PSZrbk  = 6207,
6224
    VFNMADD213PSZrbkz = 6208,
6225
    VFNMADD213PSZrk = 6209,
6226
    VFNMADD213PSZrkz  = 6210,
6227
    VFNMADD213SDm = 6211,
6228
    VFNMADD213SDm_Int = 6212,
6229
    VFNMADD213SDm_Intk  = 6213,
6230
    VFNMADD213SDm_Intkz = 6214,
6231
    VFNMADD213SDr = 6215,
6232
    VFNMADD213SDr_Int = 6216,
6233
    VFNMADD213SDr_Intk  = 6217,
6234
    VFNMADD213SDr_Intkz = 6218,
6235
    VFNMADD213SDrb_Int  = 6219,
6236
    VFNMADD213SDrb_Intk = 6220,
6237
    VFNMADD213SDrb_Intkz  = 6221,
6238
    VFNMADD213SSm = 6222,
6239
    VFNMADD213SSm_Int = 6223,
6240
    VFNMADD213SSm_Intk  = 6224,
6241
    VFNMADD213SSm_Intkz = 6225,
6242
    VFNMADD213SSr = 6226,
6243
    VFNMADD213SSr_Int = 6227,
6244
    VFNMADD213SSr_Intk  = 6228,
6245
    VFNMADD213SSr_Intkz = 6229,
6246
    VFNMADD213SSrb_Int  = 6230,
6247
    VFNMADD213SSrb_Intk = 6231,
6248
    VFNMADD213SSrb_Intkz  = 6232,
6249
    VFNMADD231PDZ128m = 6233,
6250
    VFNMADD231PDZ128mb  = 6234,
6251
    VFNMADD231PDZ128mbk = 6235,
6252
    VFNMADD231PDZ128mbkz  = 6236,
6253
    VFNMADD231PDZ128mk  = 6237,
6254
    VFNMADD231PDZ128mkz = 6238,
6255
    VFNMADD231PDZ128r = 6239,
6256
    VFNMADD231PDZ128rk  = 6240,
6257
    VFNMADD231PDZ128rkz = 6241,
6258
    VFNMADD231PDZ256m = 6242,
6259
    VFNMADD231PDZ256mb  = 6243,
6260
    VFNMADD231PDZ256mbk = 6244,
6261
    VFNMADD231PDZ256mbkz  = 6245,
6262
    VFNMADD231PDZ256mk  = 6246,
6263
    VFNMADD231PDZ256mkz = 6247,
6264
    VFNMADD231PDZ256r = 6248,
6265
    VFNMADD231PDZ256rk  = 6249,
6266
    VFNMADD231PDZ256rkz = 6250,
6267
    VFNMADD231PDZm  = 6251,
6268
    VFNMADD231PDZmb = 6252,
6269
    VFNMADD231PDZmbk  = 6253,
6270
    VFNMADD231PDZmbkz = 6254,
6271
    VFNMADD231PDZmk = 6255,
6272
    VFNMADD231PDZmkz  = 6256,
6273
    VFNMADD231PDZr  = 6257,
6274
    VFNMADD231PDZrb = 6258,
6275
    VFNMADD231PDZrbk  = 6259,
6276
    VFNMADD231PDZrbkz = 6260,
6277
    VFNMADD231PDZrk = 6261,
6278
    VFNMADD231PDZrkz  = 6262,
6279
    VFNMADD231PSZ128m = 6263,
6280
    VFNMADD231PSZ128mb  = 6264,
6281
    VFNMADD231PSZ128mbk = 6265,
6282
    VFNMADD231PSZ128mbkz  = 6266,
6283
    VFNMADD231PSZ128mk  = 6267,
6284
    VFNMADD231PSZ128mkz = 6268,
6285
    VFNMADD231PSZ128r = 6269,
6286
    VFNMADD231PSZ128rk  = 6270,
6287
    VFNMADD231PSZ128rkz = 6271,
6288
    VFNMADD231PSZ256m = 6272,
6289
    VFNMADD231PSZ256mb  = 6273,
6290
    VFNMADD231PSZ256mbk = 6274,
6291
    VFNMADD231PSZ256mbkz  = 6275,
6292
    VFNMADD231PSZ256mk  = 6276,
6293
    VFNMADD231PSZ256mkz = 6277,
6294
    VFNMADD231PSZ256r = 6278,
6295
    VFNMADD231PSZ256rk  = 6279,
6296
    VFNMADD231PSZ256rkz = 6280,
6297
    VFNMADD231PSZm  = 6281,
6298
    VFNMADD231PSZmb = 6282,
6299
    VFNMADD231PSZmbk  = 6283,
6300
    VFNMADD231PSZmbkz = 6284,
6301
    VFNMADD231PSZmk = 6285,
6302
    VFNMADD231PSZmkz  = 6286,
6303
    VFNMADD231PSZr  = 6287,
6304
    VFNMADD231PSZrb = 6288,
6305
    VFNMADD231PSZrbk  = 6289,
6306
    VFNMADD231PSZrbkz = 6290,
6307
    VFNMADD231PSZrk = 6291,
6308
    VFNMADD231PSZrkz  = 6292,
6309
    VFNMADD231SDm = 6293,
6310
    VFNMADD231SDm_Int = 6294,
6311
    VFNMADD231SDm_Intk  = 6295,
6312
    VFNMADD231SDm_Intkz = 6296,
6313
    VFNMADD231SDr = 6297,
6314
    VFNMADD231SDr_Int = 6298,
6315
    VFNMADD231SDr_Intk  = 6299,
6316
    VFNMADD231SDr_Intkz = 6300,
6317
    VFNMADD231SDrb_Int  = 6301,
6318
    VFNMADD231SDrb_Intk = 6302,
6319
    VFNMADD231SDrb_Intkz  = 6303,
6320
    VFNMADD231SSm = 6304,
6321
    VFNMADD231SSm_Int = 6305,
6322
    VFNMADD231SSm_Intk  = 6306,
6323
    VFNMADD231SSm_Intkz = 6307,
6324
    VFNMADD231SSr = 6308,
6325
    VFNMADD231SSr_Int = 6309,
6326
    VFNMADD231SSr_Intk  = 6310,
6327
    VFNMADD231SSr_Intkz = 6311,
6328
    VFNMADD231SSrb_Int  = 6312,
6329
    VFNMADD231SSrb_Intk = 6313,
6330
    VFNMADD231SSrb_Intkz  = 6314,
6331
    VFNMADDPD4mr  = 6315,
6332
    VFNMADDPD4mrY = 6316,
6333
    VFNMADDPD4rm  = 6317,
6334
    VFNMADDPD4rmY = 6318,
6335
    VFNMADDPD4rr  = 6319,
6336
    VFNMADDPD4rrY = 6320,
6337
    VFNMADDPD4rrY_REV = 6321,
6338
    VFNMADDPD4rr_REV  = 6322,
6339
    VFNMADDPDr132m  = 6323,
6340
    VFNMADDPDr132mY = 6324,
6341
    VFNMADDPDr132r  = 6325,
6342
    VFNMADDPDr132rY = 6326,
6343
    VFNMADDPDr213m  = 6327,
6344
    VFNMADDPDr213mY = 6328,
6345
    VFNMADDPDr213r  = 6329,
6346
    VFNMADDPDr213rY = 6330,
6347
    VFNMADDPDr231m  = 6331,
6348
    VFNMADDPDr231mY = 6332,
6349
    VFNMADDPDr231r  = 6333,
6350
    VFNMADDPDr231rY = 6334,
6351
    VFNMADDPS4mr  = 6335,
6352
    VFNMADDPS4mrY = 6336,
6353
    VFNMADDPS4rm  = 6337,
6354
    VFNMADDPS4rmY = 6338,
6355
    VFNMADDPS4rr  = 6339,
6356
    VFNMADDPS4rrY = 6340,
6357
    VFNMADDPS4rrY_REV = 6341,
6358
    VFNMADDPS4rr_REV  = 6342,
6359
    VFNMADDPSr132m  = 6343,
6360
    VFNMADDPSr132mY = 6344,
6361
    VFNMADDPSr132r  = 6345,
6362
    VFNMADDPSr132rY = 6346,
6363
    VFNMADDPSr213m  = 6347,
6364
    VFNMADDPSr213mY = 6348,
6365
    VFNMADDPSr213r  = 6349,
6366
    VFNMADDPSr213rY = 6350,
6367
    VFNMADDPSr231m  = 6351,
6368
    VFNMADDPSr231mY = 6352,
6369
    VFNMADDPSr231r  = 6353,
6370
    VFNMADDPSr231rY = 6354,
6371
    VFNMADDSD4mr  = 6355,
6372
    VFNMADDSD4mr_Int  = 6356,
6373
    VFNMADDSD4rm  = 6357,
6374
    VFNMADDSD4rm_Int  = 6358,
6375
    VFNMADDSD4rr  = 6359,
6376
    VFNMADDSD4rr_Int  = 6360,
6377
    VFNMADDSD4rr_REV  = 6361,
6378
    VFNMADDSDr132m  = 6362,
6379
    VFNMADDSDr132m_Int  = 6363,
6380
    VFNMADDSDr132r  = 6364,
6381
    VFNMADDSDr132r_Int  = 6365,
6382
    VFNMADDSDr213m  = 6366,
6383
    VFNMADDSDr213m_Int  = 6367,
6384
    VFNMADDSDr213r  = 6368,
6385
    VFNMADDSDr213r_Int  = 6369,
6386
    VFNMADDSDr231m  = 6370,
6387
    VFNMADDSDr231m_Int  = 6371,
6388
    VFNMADDSDr231r  = 6372,
6389
    VFNMADDSDr231r_Int  = 6373,
6390
    VFNMADDSS4mr  = 6374,
6391
    VFNMADDSS4mr_Int  = 6375,
6392
    VFNMADDSS4rm  = 6376,
6393
    VFNMADDSS4rm_Int  = 6377,
6394
    VFNMADDSS4rr  = 6378,
6395
    VFNMADDSS4rr_Int  = 6379,
6396
    VFNMADDSS4rr_REV  = 6380,
6397
    VFNMADDSSr132m  = 6381,
6398
    VFNMADDSSr132m_Int  = 6382,
6399
    VFNMADDSSr132r  = 6383,
6400
    VFNMADDSSr132r_Int  = 6384,
6401
    VFNMADDSSr213m  = 6385,
6402
    VFNMADDSSr213m_Int  = 6386,
6403
    VFNMADDSSr213r  = 6387,
6404
    VFNMADDSSr213r_Int  = 6388,
6405
    VFNMADDSSr231m  = 6389,
6406
    VFNMADDSSr231m_Int  = 6390,
6407
    VFNMADDSSr231r  = 6391,
6408
    VFNMADDSSr231r_Int  = 6392,
6409
    VFNMSUB132PDZ128m = 6393,
6410
    VFNMSUB132PDZ128mb  = 6394,
6411
    VFNMSUB132PDZ128mbk = 6395,
6412
    VFNMSUB132PDZ128mbkz  = 6396,
6413
    VFNMSUB132PDZ128mk  = 6397,
6414
    VFNMSUB132PDZ128mkz = 6398,
6415
    VFNMSUB132PDZ128r = 6399,
6416
    VFNMSUB132PDZ128rk  = 6400,
6417
    VFNMSUB132PDZ128rkz = 6401,
6418
    VFNMSUB132PDZ256m = 6402,
6419
    VFNMSUB132PDZ256mb  = 6403,
6420
    VFNMSUB132PDZ256mbk = 6404,
6421
    VFNMSUB132PDZ256mbkz  = 6405,
6422
    VFNMSUB132PDZ256mk  = 6406,
6423
    VFNMSUB132PDZ256mkz = 6407,
6424
    VFNMSUB132PDZ256r = 6408,
6425
    VFNMSUB132PDZ256rk  = 6409,
6426
    VFNMSUB132PDZ256rkz = 6410,
6427
    VFNMSUB132PDZm  = 6411,
6428
    VFNMSUB132PDZmb = 6412,
6429
    VFNMSUB132PDZmbk  = 6413,
6430
    VFNMSUB132PDZmbkz = 6414,
6431
    VFNMSUB132PDZmk = 6415,
6432
    VFNMSUB132PDZmkz  = 6416,
6433
    VFNMSUB132PDZr  = 6417,
6434
    VFNMSUB132PDZrb = 6418,
6435
    VFNMSUB132PDZrbk  = 6419,
6436
    VFNMSUB132PDZrbkz = 6420,
6437
    VFNMSUB132PDZrk = 6421,
6438
    VFNMSUB132PDZrkz  = 6422,
6439
    VFNMSUB132PSZ128m = 6423,
6440
    VFNMSUB132PSZ128mb  = 6424,
6441
    VFNMSUB132PSZ128mbk = 6425,
6442
    VFNMSUB132PSZ128mbkz  = 6426,
6443
    VFNMSUB132PSZ128mk  = 6427,
6444
    VFNMSUB132PSZ128mkz = 6428,
6445
    VFNMSUB132PSZ128r = 6429,
6446
    VFNMSUB132PSZ128rk  = 6430,
6447
    VFNMSUB132PSZ128rkz = 6431,
6448
    VFNMSUB132PSZ256m = 6432,
6449
    VFNMSUB132PSZ256mb  = 6433,
6450
    VFNMSUB132PSZ256mbk = 6434,
6451
    VFNMSUB132PSZ256mbkz  = 6435,
6452
    VFNMSUB132PSZ256mk  = 6436,
6453
    VFNMSUB132PSZ256mkz = 6437,
6454
    VFNMSUB132PSZ256r = 6438,
6455
    VFNMSUB132PSZ256rk  = 6439,
6456
    VFNMSUB132PSZ256rkz = 6440,
6457
    VFNMSUB132PSZm  = 6441,
6458
    VFNMSUB132PSZmb = 6442,
6459
    VFNMSUB132PSZmbk  = 6443,
6460
    VFNMSUB132PSZmbkz = 6444,
6461
    VFNMSUB132PSZmk = 6445,
6462
    VFNMSUB132PSZmkz  = 6446,
6463
    VFNMSUB132PSZr  = 6447,
6464
    VFNMSUB132PSZrb = 6448,
6465
    VFNMSUB132PSZrbk  = 6449,
6466
    VFNMSUB132PSZrbkz = 6450,
6467
    VFNMSUB132PSZrk = 6451,
6468
    VFNMSUB132PSZrkz  = 6452,
6469
    VFNMSUB132SDm = 6453,
6470
    VFNMSUB132SDm_Int = 6454,
6471
    VFNMSUB132SDm_Intk  = 6455,
6472
    VFNMSUB132SDm_Intkz = 6456,
6473
    VFNMSUB132SDr = 6457,
6474
    VFNMSUB132SDr_Int = 6458,
6475
    VFNMSUB132SDr_Intk  = 6459,
6476
    VFNMSUB132SDr_Intkz = 6460,
6477
    VFNMSUB132SDrb_Int  = 6461,
6478
    VFNMSUB132SDrb_Intk = 6462,
6479
    VFNMSUB132SDrb_Intkz  = 6463,
6480
    VFNMSUB132SSm = 6464,
6481
    VFNMSUB132SSm_Int = 6465,
6482
    VFNMSUB132SSm_Intk  = 6466,
6483
    VFNMSUB132SSm_Intkz = 6467,
6484
    VFNMSUB132SSr = 6468,
6485
    VFNMSUB132SSr_Int = 6469,
6486
    VFNMSUB132SSr_Intk  = 6470,
6487
    VFNMSUB132SSr_Intkz = 6471,
6488
    VFNMSUB132SSrb_Int  = 6472,
6489
    VFNMSUB132SSrb_Intk = 6473,
6490
    VFNMSUB132SSrb_Intkz  = 6474,
6491
    VFNMSUB213PDZ128m = 6475,
6492
    VFNMSUB213PDZ128mb  = 6476,
6493
    VFNMSUB213PDZ128mbk = 6477,
6494
    VFNMSUB213PDZ128mbkz  = 6478,
6495
    VFNMSUB213PDZ128mk  = 6479,
6496
    VFNMSUB213PDZ128mkz = 6480,
6497
    VFNMSUB213PDZ128r = 6481,
6498
    VFNMSUB213PDZ128rk  = 6482,
6499
    VFNMSUB213PDZ128rkz = 6483,
6500
    VFNMSUB213PDZ256m = 6484,
6501
    VFNMSUB213PDZ256mb  = 6485,
6502
    VFNMSUB213PDZ256mbk = 6486,
6503
    VFNMSUB213PDZ256mbkz  = 6487,
6504
    VFNMSUB213PDZ256mk  = 6488,
6505
    VFNMSUB213PDZ256mkz = 6489,
6506
    VFNMSUB213PDZ256r = 6490,
6507
    VFNMSUB213PDZ256rk  = 6491,
6508
    VFNMSUB213PDZ256rkz = 6492,
6509
    VFNMSUB213PDZm  = 6493,
6510
    VFNMSUB213PDZmb = 6494,
6511
    VFNMSUB213PDZmbk  = 6495,
6512
    VFNMSUB213PDZmbkz = 6496,
6513
    VFNMSUB213PDZmk = 6497,
6514
    VFNMSUB213PDZmkz  = 6498,
6515
    VFNMSUB213PDZr  = 6499,
6516
    VFNMSUB213PDZrb = 6500,
6517
    VFNMSUB213PDZrbk  = 6501,
6518
    VFNMSUB213PDZrbkz = 6502,
6519
    VFNMSUB213PDZrk = 6503,
6520
    VFNMSUB213PDZrkz  = 6504,
6521
    VFNMSUB213PSZ128m = 6505,
6522
    VFNMSUB213PSZ128mb  = 6506,
6523
    VFNMSUB213PSZ128mbk = 6507,
6524
    VFNMSUB213PSZ128mbkz  = 6508,
6525
    VFNMSUB213PSZ128mk  = 6509,
6526
    VFNMSUB213PSZ128mkz = 6510,
6527
    VFNMSUB213PSZ128r = 6511,
6528
    VFNMSUB213PSZ128rk  = 6512,
6529
    VFNMSUB213PSZ128rkz = 6513,
6530
    VFNMSUB213PSZ256m = 6514,
6531
    VFNMSUB213PSZ256mb  = 6515,
6532
    VFNMSUB213PSZ256mbk = 6516,
6533
    VFNMSUB213PSZ256mbkz  = 6517,
6534
    VFNMSUB213PSZ256mk  = 6518,
6535
    VFNMSUB213PSZ256mkz = 6519,
6536
    VFNMSUB213PSZ256r = 6520,
6537
    VFNMSUB213PSZ256rk  = 6521,
6538
    VFNMSUB213PSZ256rkz = 6522,
6539
    VFNMSUB213PSZm  = 6523,
6540
    VFNMSUB213PSZmb = 6524,
6541
    VFNMSUB213PSZmbk  = 6525,
6542
    VFNMSUB213PSZmbkz = 6526,
6543
    VFNMSUB213PSZmk = 6527,
6544
    VFNMSUB213PSZmkz  = 6528,
6545
    VFNMSUB213PSZr  = 6529,
6546
    VFNMSUB213PSZrb = 6530,
6547
    VFNMSUB213PSZrbk  = 6531,
6548
    VFNMSUB213PSZrbkz = 6532,
6549
    VFNMSUB213PSZrk = 6533,
6550
    VFNMSUB213PSZrkz  = 6534,
6551
    VFNMSUB213SDm = 6535,
6552
    VFNMSUB213SDm_Int = 6536,
6553
    VFNMSUB213SDm_Intk  = 6537,
6554
    VFNMSUB213SDm_Intkz = 6538,
6555
    VFNMSUB213SDr = 6539,
6556
    VFNMSUB213SDr_Int = 6540,
6557
    VFNMSUB213SDr_Intk  = 6541,
6558
    VFNMSUB213SDr_Intkz = 6542,
6559
    VFNMSUB213SDrb_Int  = 6543,
6560
    VFNMSUB213SDrb_Intk = 6544,
6561
    VFNMSUB213SDrb_Intkz  = 6545,
6562
    VFNMSUB213SSm = 6546,
6563
    VFNMSUB213SSm_Int = 6547,
6564
    VFNMSUB213SSm_Intk  = 6548,
6565
    VFNMSUB213SSm_Intkz = 6549,
6566
    VFNMSUB213SSr = 6550,
6567
    VFNMSUB213SSr_Int = 6551,
6568
    VFNMSUB213SSr_Intk  = 6552,
6569
    VFNMSUB213SSr_Intkz = 6553,
6570
    VFNMSUB213SSrb_Int  = 6554,
6571
    VFNMSUB213SSrb_Intk = 6555,
6572
    VFNMSUB213SSrb_Intkz  = 6556,
6573
    VFNMSUB231PDZ128m = 6557,
6574
    VFNMSUB231PDZ128mb  = 6558,
6575
    VFNMSUB231PDZ128mbk = 6559,
6576
    VFNMSUB231PDZ128mbkz  = 6560,
6577
    VFNMSUB231PDZ128mk  = 6561,
6578
    VFNMSUB231PDZ128mkz = 6562,
6579
    VFNMSUB231PDZ128r = 6563,
6580
    VFNMSUB231PDZ128rk  = 6564,
6581
    VFNMSUB231PDZ128rkz = 6565,
6582
    VFNMSUB231PDZ256m = 6566,
6583
    VFNMSUB231PDZ256mb  = 6567,
6584
    VFNMSUB231PDZ256mbk = 6568,
6585
    VFNMSUB231PDZ256mbkz  = 6569,
6586
    VFNMSUB231PDZ256mk  = 6570,
6587
    VFNMSUB231PDZ256mkz = 6571,
6588
    VFNMSUB231PDZ256r = 6572,
6589
    VFNMSUB231PDZ256rk  = 6573,
6590
    VFNMSUB231PDZ256rkz = 6574,
6591
    VFNMSUB231PDZm  = 6575,
6592
    VFNMSUB231PDZmb = 6576,
6593
    VFNMSUB231PDZmbk  = 6577,
6594
    VFNMSUB231PDZmbkz = 6578,
6595
    VFNMSUB231PDZmk = 6579,
6596
    VFNMSUB231PDZmkz  = 6580,
6597
    VFNMSUB231PDZr  = 6581,
6598
    VFNMSUB231PDZrb = 6582,
6599
    VFNMSUB231PDZrbk  = 6583,
6600
    VFNMSUB231PDZrbkz = 6584,
6601
    VFNMSUB231PDZrk = 6585,
6602
    VFNMSUB231PDZrkz  = 6586,
6603
    VFNMSUB231PSZ128m = 6587,
6604
    VFNMSUB231PSZ128mb  = 6588,
6605
    VFNMSUB231PSZ128mbk = 6589,
6606
    VFNMSUB231PSZ128mbkz  = 6590,
6607
    VFNMSUB231PSZ128mk  = 6591,
6608
    VFNMSUB231PSZ128mkz = 6592,
6609
    VFNMSUB231PSZ128r = 6593,
6610
    VFNMSUB231PSZ128rk  = 6594,
6611
    VFNMSUB231PSZ128rkz = 6595,
6612
    VFNMSUB231PSZ256m = 6596,
6613
    VFNMSUB231PSZ256mb  = 6597,
6614
    VFNMSUB231PSZ256mbk = 6598,
6615
    VFNMSUB231PSZ256mbkz  = 6599,
6616
    VFNMSUB231PSZ256mk  = 6600,
6617
    VFNMSUB231PSZ256mkz = 6601,
6618
    VFNMSUB231PSZ256r = 6602,
6619
    VFNMSUB231PSZ256rk  = 6603,
6620
    VFNMSUB231PSZ256rkz = 6604,
6621
    VFNMSUB231PSZm  = 6605,
6622
    VFNMSUB231PSZmb = 6606,
6623
    VFNMSUB231PSZmbk  = 6607,
6624
    VFNMSUB231PSZmbkz = 6608,
6625
    VFNMSUB231PSZmk = 6609,
6626
    VFNMSUB231PSZmkz  = 6610,
6627
    VFNMSUB231PSZr  = 6611,
6628
    VFNMSUB231PSZrb = 6612,
6629
    VFNMSUB231PSZrbk  = 6613,
6630
    VFNMSUB231PSZrbkz = 6614,
6631
    VFNMSUB231PSZrk = 6615,
6632
    VFNMSUB231PSZrkz  = 6616,
6633
    VFNMSUB231SDm = 6617,
6634
    VFNMSUB231SDm_Int = 6618,
6635
    VFNMSUB231SDm_Intk  = 6619,
6636
    VFNMSUB231SDm_Intkz = 6620,
6637
    VFNMSUB231SDr = 6621,
6638
    VFNMSUB231SDr_Int = 6622,
6639
    VFNMSUB231SDr_Intk  = 6623,
6640
    VFNMSUB231SDr_Intkz = 6624,
6641
    VFNMSUB231SDrb_Int  = 6625,
6642
    VFNMSUB231SDrb_Intk = 6626,
6643
    VFNMSUB231SDrb_Intkz  = 6627,
6644
    VFNMSUB231SSm = 6628,
6645
    VFNMSUB231SSm_Int = 6629,
6646
    VFNMSUB231SSm_Intk  = 6630,
6647
    VFNMSUB231SSm_Intkz = 6631,
6648
    VFNMSUB231SSr = 6632,
6649
    VFNMSUB231SSr_Int = 6633,
6650
    VFNMSUB231SSr_Intk  = 6634,
6651
    VFNMSUB231SSr_Intkz = 6635,
6652
    VFNMSUB231SSrb_Int  = 6636,
6653
    VFNMSUB231SSrb_Intk = 6637,
6654
    VFNMSUB231SSrb_Intkz  = 6638,
6655
    VFNMSUBPD4mr  = 6639,
6656
    VFNMSUBPD4mrY = 6640,
6657
    VFNMSUBPD4rm  = 6641,
6658
    VFNMSUBPD4rmY = 6642,
6659
    VFNMSUBPD4rr  = 6643,
6660
    VFNMSUBPD4rrY = 6644,
6661
    VFNMSUBPD4rrY_REV = 6645,
6662
    VFNMSUBPD4rr_REV  = 6646,
6663
    VFNMSUBPDr132m  = 6647,
6664
    VFNMSUBPDr132mY = 6648,
6665
    VFNMSUBPDr132r  = 6649,
6666
    VFNMSUBPDr132rY = 6650,
6667
    VFNMSUBPDr213m  = 6651,
6668
    VFNMSUBPDr213mY = 6652,
6669
    VFNMSUBPDr213r  = 6653,
6670
    VFNMSUBPDr213rY = 6654,
6671
    VFNMSUBPDr231m  = 6655,
6672
    VFNMSUBPDr231mY = 6656,
6673
    VFNMSUBPDr231r  = 6657,
6674
    VFNMSUBPDr231rY = 6658,
6675
    VFNMSUBPS4mr  = 6659,
6676
    VFNMSUBPS4mrY = 6660,
6677
    VFNMSUBPS4rm  = 6661,
6678
    VFNMSUBPS4rmY = 6662,
6679
    VFNMSUBPS4rr  = 6663,
6680
    VFNMSUBPS4rrY = 6664,
6681
    VFNMSUBPS4rrY_REV = 6665,
6682
    VFNMSUBPS4rr_REV  = 6666,
6683
    VFNMSUBPSr132m  = 6667,
6684
    VFNMSUBPSr132mY = 6668,
6685
    VFNMSUBPSr132r  = 6669,
6686
    VFNMSUBPSr132rY = 6670,
6687
    VFNMSUBPSr213m  = 6671,
6688
    VFNMSUBPSr213mY = 6672,
6689
    VFNMSUBPSr213r  = 6673,
6690
    VFNMSUBPSr213rY = 6674,
6691
    VFNMSUBPSr231m  = 6675,
6692
    VFNMSUBPSr231mY = 6676,
6693
    VFNMSUBPSr231r  = 6677,
6694
    VFNMSUBPSr231rY = 6678,
6695
    VFNMSUBSD4mr  = 6679,
6696
    VFNMSUBSD4mr_Int  = 6680,
6697
    VFNMSUBSD4rm  = 6681,
6698
    VFNMSUBSD4rm_Int  = 6682,
6699
    VFNMSUBSD4rr  = 6683,
6700
    VFNMSUBSD4rr_Int  = 6684,
6701
    VFNMSUBSD4rr_REV  = 6685,
6702
    VFNMSUBSDr132m  = 6686,
6703
    VFNMSUBSDr132m_Int  = 6687,
6704
    VFNMSUBSDr132r  = 6688,
6705
    VFNMSUBSDr132r_Int  = 6689,
6706
    VFNMSUBSDr213m  = 6690,
6707
    VFNMSUBSDr213m_Int  = 6691,
6708
    VFNMSUBSDr213r  = 6692,
6709
    VFNMSUBSDr213r_Int  = 6693,
6710
    VFNMSUBSDr231m  = 6694,
6711
    VFNMSUBSDr231m_Int  = 6695,
6712
    VFNMSUBSDr231r  = 6696,
6713
    VFNMSUBSDr231r_Int  = 6697,
6714
    VFNMSUBSS4mr  = 6698,
6715
    VFNMSUBSS4mr_Int  = 6699,
6716
    VFNMSUBSS4rm  = 6700,
6717
    VFNMSUBSS4rm_Int  = 6701,
6718
    VFNMSUBSS4rr  = 6702,
6719
    VFNMSUBSS4rr_Int  = 6703,
6720
    VFNMSUBSS4rr_REV  = 6704,
6721
    VFNMSUBSSr132m  = 6705,
6722
    VFNMSUBSSr132m_Int  = 6706,
6723
    VFNMSUBSSr132r  = 6707,
6724
    VFNMSUBSSr132r_Int  = 6708,
6725
    VFNMSUBSSr213m  = 6709,
6726
    VFNMSUBSSr213m_Int  = 6710,
6727
    VFNMSUBSSr213r  = 6711,
6728
    VFNMSUBSSr213r_Int  = 6712,
6729
    VFNMSUBSSr231m  = 6713,
6730
    VFNMSUBSSr231m_Int  = 6714,
6731
    VFNMSUBSSr231r  = 6715,
6732
    VFNMSUBSSr231r_Int  = 6716,
6733
    VFPCLASSPDZ128rm  = 6717,
6734
    VFPCLASSPDZ128rmb = 6718,
6735
    VFPCLASSPDZ128rmbk  = 6719,
6736
    VFPCLASSPDZ128rmk = 6720,
6737
    VFPCLASSPDZ128rr  = 6721,
6738
    VFPCLASSPDZ128rrk = 6722,
6739
    VFPCLASSPDZ256rm  = 6723,
6740
    VFPCLASSPDZ256rmb = 6724,
6741
    VFPCLASSPDZ256rmbk  = 6725,
6742
    VFPCLASSPDZ256rmk = 6726,
6743
    VFPCLASSPDZ256rr  = 6727,
6744
    VFPCLASSPDZ256rrk = 6728,
6745
    VFPCLASSPDZrm = 6729,
6746
    VFPCLASSPDZrmb  = 6730,
6747
    VFPCLASSPDZrmbk = 6731,
6748
    VFPCLASSPDZrmk  = 6732,
6749
    VFPCLASSPDZrr = 6733,
6750
    VFPCLASSPDZrrk  = 6734,
6751
    VFPCLASSPSZ128rm  = 6735,
6752
    VFPCLASSPSZ128rmb = 6736,
6753
    VFPCLASSPSZ128rmbk  = 6737,
6754
    VFPCLASSPSZ128rmk = 6738,
6755
    VFPCLASSPSZ128rr  = 6739,
6756
    VFPCLASSPSZ128rrk = 6740,
6757
    VFPCLASSPSZ256rm  = 6741,
6758
    VFPCLASSPSZ256rmb = 6742,
6759
    VFPCLASSPSZ256rmbk  = 6743,
6760
    VFPCLASSPSZ256rmk = 6744,
6761
    VFPCLASSPSZ256rr  = 6745,
6762
    VFPCLASSPSZ256rrk = 6746,
6763
    VFPCLASSPSZrm = 6747,
6764
    VFPCLASSPSZrmb  = 6748,
6765
    VFPCLASSPSZrmbk = 6749,
6766
    VFPCLASSPSZrmk  = 6750,
6767
    VFPCLASSPSZrr = 6751,
6768
    VFPCLASSPSZrrk  = 6752,
6769
    VFPCLASSSDrm  = 6753,
6770
    VFPCLASSSDrmk = 6754,
6771
    VFPCLASSSDrr  = 6755,
6772
    VFPCLASSSDrrk = 6756,
6773
    VFPCLASSSSrm  = 6757,
6774
    VFPCLASSSSrmk = 6758,
6775
    VFPCLASSSSrr  = 6759,
6776
    VFPCLASSSSrrk = 6760,
6777
    VFRCZPDrm = 6761,
6778
    VFRCZPDrmY  = 6762,
6779
    VFRCZPDrr = 6763,
6780
    VFRCZPDrrY  = 6764,
6781
    VFRCZPSrm = 6765,
6782
    VFRCZPSrmY  = 6766,
6783
    VFRCZPSrr = 6767,
6784
    VFRCZPSrrY  = 6768,
6785
    VFRCZSDrm = 6769,
6786
    VFRCZSDrr = 6770,
6787
    VFRCZSSrm = 6771,
6788
    VFRCZSSrr = 6772,
6789
    VFsANDNPDrm = 6773,
6790
    VFsANDNPDrr = 6774,
6791
    VFsANDNPSrm = 6775,
6792
    VFsANDNPSrr = 6776,
6793
    VFsANDPDrm  = 6777,
6794
    VFsANDPDrr  = 6778,
6795
    VFsANDPSrm  = 6779,
6796
    VFsANDPSrr  = 6780,
6797
    VFsORPDrm = 6781,
6798
    VFsORPDrr = 6782,
6799
    VFsORPSrm = 6783,
6800
    VFsORPSrr = 6784,
6801
    VFsXORPDrm  = 6785,
6802
    VFsXORPDrr  = 6786,
6803
    VFsXORPSrm  = 6787,
6804
    VFsXORPSrr  = 6788,
6805
    VFvANDNPDYrm  = 6789,
6806
    VFvANDNPDYrr  = 6790,
6807
    VFvANDNPDrm = 6791,
6808
    VFvANDNPDrr = 6792,
6809
    VFvANDNPSYrm  = 6793,
6810
    VFvANDNPSYrr  = 6794,
6811
    VFvANDNPSrm = 6795,
6812
    VFvANDNPSrr = 6796,
6813
    VFvANDPDYrm = 6797,
6814
    VFvANDPDYrr = 6798,
6815
    VFvANDPDrm  = 6799,
6816
    VFvANDPDrr  = 6800,
6817
    VFvANDPSYrm = 6801,
6818
    VFvANDPSYrr = 6802,
6819
    VFvANDPSrm  = 6803,
6820
    VFvANDPSrr  = 6804,
6821
    VFvORPDYrm  = 6805,
6822
    VFvORPDYrr  = 6806,
6823
    VFvORPDrm = 6807,
6824
    VFvORPDrr = 6808,
6825
    VFvORPSYrm  = 6809,
6826
    VFvORPSYrr  = 6810,
6827
    VFvORPSrm = 6811,
6828
    VFvORPSrr = 6812,
6829
    VFvXORPDYrm = 6813,
6830
    VFvXORPDYrr = 6814,
6831
    VFvXORPDrm  = 6815,
6832
    VFvXORPDrr  = 6816,
6833
    VFvXORPSYrm = 6817,
6834
    VFvXORPSYrr = 6818,
6835
    VFvXORPSrm  = 6819,
6836
    VFvXORPSrr  = 6820,
6837
    VGATHERDPDYrm = 6821,
6838
    VGATHERDPDZ128rm  = 6822,
6839
    VGATHERDPDZ256rm  = 6823,
6840
    VGATHERDPDZrm = 6824,
6841
    VGATHERDPDrm  = 6825,
6842
    VGATHERDPSYrm = 6826,
6843
    VGATHERDPSZ128rm  = 6827,
6844
    VGATHERDPSZ256rm  = 6828,
6845
    VGATHERDPSZrm = 6829,
6846
    VGATHERDPSrm  = 6830,
6847
    VGATHERPF0DPDm  = 6831,
6848
    VGATHERPF0DPSm  = 6832,
6849
    VGATHERPF0QPDm  = 6833,
6850
    VGATHERPF0QPSm  = 6834,
6851
    VGATHERPF1DPDm  = 6835,
6852
    VGATHERPF1DPSm  = 6836,
6853
    VGATHERPF1QPDm  = 6837,
6854
    VGATHERPF1QPSm  = 6838,
6855
    VGATHERQPDYrm = 6839,
6856
    VGATHERQPDZ128rm  = 6840,
6857
    VGATHERQPDZ256rm  = 6841,
6858
    VGATHERQPDZrm = 6842,
6859
    VGATHERQPDrm  = 6843,
6860
    VGATHERQPSYrm = 6844,
6861
    VGATHERQPSZ128rm  = 6845,
6862
    VGATHERQPSZ256rm  = 6846,
6863
    VGATHERQPSZrm = 6847,
6864
    VGATHERQPSrm  = 6848,
6865
    VGETEXPPDZ128m  = 6849,
6866
    VGETEXPPDZ128mb = 6850,
6867
    VGETEXPPDZ128mbk  = 6851,
6868
    VGETEXPPDZ128mbkz = 6852,
6869
    VGETEXPPDZ128mk = 6853,
6870
    VGETEXPPDZ128mkz  = 6854,
6871
    VGETEXPPDZ128r  = 6855,
6872
    VGETEXPPDZ128rk = 6856,
6873
    VGETEXPPDZ128rkz  = 6857,
6874
    VGETEXPPDZ256m  = 6858,
6875
    VGETEXPPDZ256mb = 6859,
6876
    VGETEXPPDZ256mbk  = 6860,
6877
    VGETEXPPDZ256mbkz = 6861,
6878
    VGETEXPPDZ256mk = 6862,
6879
    VGETEXPPDZ256mkz  = 6863,
6880
    VGETEXPPDZ256r  = 6864,
6881
    VGETEXPPDZ256rk = 6865,
6882
    VGETEXPPDZ256rkz  = 6866,
6883
    VGETEXPPDm  = 6867,
6884
    VGETEXPPDmb = 6868,
6885
    VGETEXPPDmbk  = 6869,
6886
    VGETEXPPDmbkz = 6870,
6887
    VGETEXPPDmk = 6871,
6888
    VGETEXPPDmkz  = 6872,
6889
    VGETEXPPDr  = 6873,
6890
    VGETEXPPDrb = 6874,
6891
    VGETEXPPDrbk  = 6875,
6892
    VGETEXPPDrbkz = 6876,
6893
    VGETEXPPDrk = 6877,
6894
    VGETEXPPDrkz  = 6878,
6895
    VGETEXPPSZ128m  = 6879,
6896
    VGETEXPPSZ128mb = 6880,
6897
    VGETEXPPSZ128mbk  = 6881,
6898
    VGETEXPPSZ128mbkz = 6882,
6899
    VGETEXPPSZ128mk = 6883,
6900
    VGETEXPPSZ128mkz  = 6884,
6901
    VGETEXPPSZ128r  = 6885,
6902
    VGETEXPPSZ128rk = 6886,
6903
    VGETEXPPSZ128rkz  = 6887,
6904
    VGETEXPPSZ256m  = 6888,
6905
    VGETEXPPSZ256mb = 6889,
6906
    VGETEXPPSZ256mbk  = 6890,
6907
    VGETEXPPSZ256mbkz = 6891,
6908
    VGETEXPPSZ256mk = 6892,
6909
    VGETEXPPSZ256mkz  = 6893,
6910
    VGETEXPPSZ256r  = 6894,
6911
    VGETEXPPSZ256rk = 6895,
6912
    VGETEXPPSZ256rkz  = 6896,
6913
    VGETEXPPSm  = 6897,
6914
    VGETEXPPSmb = 6898,
6915
    VGETEXPPSmbk  = 6899,
6916
    VGETEXPPSmbkz = 6900,
6917
    VGETEXPPSmk = 6901,
6918
    VGETEXPPSmkz  = 6902,
6919
    VGETEXPPSr  = 6903,
6920
    VGETEXPPSrb = 6904,
6921
    VGETEXPPSrbk  = 6905,
6922
    VGETEXPPSrbkz = 6906,
6923
    VGETEXPPSrk = 6907,
6924
    VGETEXPPSrkz  = 6908,
6925
    VGETEXPSDm  = 6909,
6926
    VGETEXPSDmk = 6910,
6927
    VGETEXPSDmkz  = 6911,
6928
    VGETEXPSDr  = 6912,
6929
    VGETEXPSDrb = 6913,
6930
    VGETEXPSDrbk  = 6914,
6931
    VGETEXPSDrbkz = 6915,
6932
    VGETEXPSDrk = 6916,
6933
    VGETEXPSDrkz  = 6917,
6934
    VGETEXPSSm  = 6918,
6935
    VGETEXPSSmk = 6919,
6936
    VGETEXPSSmkz  = 6920,
6937
    VGETEXPSSr  = 6921,
6938
    VGETEXPSSrb = 6922,
6939
    VGETEXPSSrbk  = 6923,
6940
    VGETEXPSSrbkz = 6924,
6941
    VGETEXPSSrk = 6925,
6942
    VGETEXPSSrkz  = 6926,
6943
    VGETMANTPDZ128rmbi  = 6927,
6944
    VGETMANTPDZ128rmbik = 6928,
6945
    VGETMANTPDZ128rmbikz  = 6929,
6946
    VGETMANTPDZ128rmi = 6930,
6947
    VGETMANTPDZ128rmik  = 6931,
6948
    VGETMANTPDZ128rmikz = 6932,
6949
    VGETMANTPDZ128rri = 6933,
6950
    VGETMANTPDZ128rrik  = 6934,
6951
    VGETMANTPDZ128rrikz = 6935,
6952
    VGETMANTPDZ256rmbi  = 6936,
6953
    VGETMANTPDZ256rmbik = 6937,
6954
    VGETMANTPDZ256rmbikz  = 6938,
6955
    VGETMANTPDZ256rmi = 6939,
6956
    VGETMANTPDZ256rmik  = 6940,
6957
    VGETMANTPDZ256rmikz = 6941,
6958
    VGETMANTPDZ256rri = 6942,
6959
    VGETMANTPDZ256rrik  = 6943,
6960
    VGETMANTPDZ256rrikz = 6944,
6961
    VGETMANTPDZrmbi = 6945,
6962
    VGETMANTPDZrmbik  = 6946,
6963
    VGETMANTPDZrmbikz = 6947,
6964
    VGETMANTPDZrmi  = 6948,
6965
    VGETMANTPDZrmik = 6949,
6966
    VGETMANTPDZrmikz  = 6950,
6967
    VGETMANTPDZrri  = 6951,
6968
    VGETMANTPDZrrib = 6952,
6969
    VGETMANTPDZrribk  = 6953,
6970
    VGETMANTPDZrribkz = 6954,
6971
    VGETMANTPDZrrik = 6955,
6972
    VGETMANTPDZrrikz  = 6956,
6973
    VGETMANTPSZ128rmbi  = 6957,
6974
    VGETMANTPSZ128rmbik = 6958,
6975
    VGETMANTPSZ128rmbikz  = 6959,
6976
    VGETMANTPSZ128rmi = 6960,
6977
    VGETMANTPSZ128rmik  = 6961,
6978
    VGETMANTPSZ128rmikz = 6962,
6979
    VGETMANTPSZ128rri = 6963,
6980
    VGETMANTPSZ128rrik  = 6964,
6981
    VGETMANTPSZ128rrikz = 6965,
6982
    VGETMANTPSZ256rmbi  = 6966,
6983
    VGETMANTPSZ256rmbik = 6967,
6984
    VGETMANTPSZ256rmbikz  = 6968,
6985
    VGETMANTPSZ256rmi = 6969,
6986
    VGETMANTPSZ256rmik  = 6970,
6987
    VGETMANTPSZ256rmikz = 6971,
6988
    VGETMANTPSZ256rri = 6972,
6989
    VGETMANTPSZ256rrik  = 6973,
6990
    VGETMANTPSZ256rrikz = 6974,
6991
    VGETMANTPSZrmbi = 6975,
6992
    VGETMANTPSZrmbik  = 6976,
6993
    VGETMANTPSZrmbikz = 6977,
6994
    VGETMANTPSZrmi  = 6978,
6995
    VGETMANTPSZrmik = 6979,
6996
    VGETMANTPSZrmikz  = 6980,
6997
    VGETMANTPSZrri  = 6981,
6998
    VGETMANTPSZrrib = 6982,
6999
    VGETMANTPSZrribk  = 6983,
7000
    VGETMANTPSZrribkz = 6984,
7001
    VGETMANTPSZrrik = 6985,
7002
    VGETMANTPSZrrikz  = 6986,
7003
    VGETMANTSDZ128rmi = 6987,
7004
    VGETMANTSDZ128rmi_alt = 6988,
7005
    VGETMANTSDZ128rmi_altk  = 6989,
7006
    VGETMANTSDZ128rmi_altkz = 6990,
7007
    VGETMANTSDZ128rmik  = 6991,
7008
    VGETMANTSDZ128rmikz = 6992,
7009
    VGETMANTSDZ128rri = 6993,
7010
    VGETMANTSDZ128rrib  = 6994,
7011
    VGETMANTSDZ128rribk = 6995,
7012
    VGETMANTSDZ128rribkz  = 6996,
7013
    VGETMANTSDZ128rrik  = 6997,
7014
    VGETMANTSDZ128rrikz = 6998,
7015
    VGETMANTSSZ128rmi = 6999,
7016
    VGETMANTSSZ128rmi_alt = 7000,
7017
    VGETMANTSSZ128rmi_altk  = 7001,
7018
    VGETMANTSSZ128rmi_altkz = 7002,
7019
    VGETMANTSSZ128rmik  = 7003,
7020
    VGETMANTSSZ128rmikz = 7004,
7021
    VGETMANTSSZ128rri = 7005,
7022
    VGETMANTSSZ128rrib  = 7006,
7023
    VGETMANTSSZ128rribk = 7007,
7024
    VGETMANTSSZ128rribkz  = 7008,
7025
    VGETMANTSSZ128rrik  = 7009,
7026
    VGETMANTSSZ128rrikz = 7010,
7027
    VHADDPDYrm  = 7011,
7028
    VHADDPDYrr  = 7012,
7029
    VHADDPDrm = 7013,
7030
    VHADDPDrr = 7014,
7031
    VHADDPSYrm  = 7015,
7032
    VHADDPSYrr  = 7016,
7033
    VHADDPSrm = 7017,
7034
    VHADDPSrr = 7018,
7035
    VHSUBPDYrm  = 7019,
7036
    VHSUBPDYrr  = 7020,
7037
    VHSUBPDrm = 7021,
7038
    VHSUBPDrr = 7022,
7039
    VHSUBPSYrm  = 7023,
7040
    VHSUBPSYrr  = 7024,
7041
    VHSUBPSrm = 7025,
7042
    VHSUBPSrr = 7026,
7043
    VINSERTF128rm = 7027,
7044
    VINSERTF128rr = 7028,
7045
    VINSERTF32x4Z256rm  = 7029,
7046
    VINSERTF32x4Z256rmk = 7030,
7047
    VINSERTF32x4Z256rmkz  = 7031,
7048
    VINSERTF32x4Z256rr  = 7032,
7049
    VINSERTF32x4Z256rrk = 7033,
7050
    VINSERTF32x4Z256rrkz  = 7034,
7051
    VINSERTF32x4Zrm = 7035,
7052
    VINSERTF32x4Zrmk  = 7036,
7053
    VINSERTF32x4Zrmkz = 7037,
7054
    VINSERTF32x4Zrr = 7038,
7055
    VINSERTF32x4Zrrk  = 7039,
7056
    VINSERTF32x4Zrrkz = 7040,
7057
    VINSERTF32x8Zrm = 7041,
7058
    VINSERTF32x8Zrmk  = 7042,
7059
    VINSERTF32x8Zrmkz = 7043,
7060
    VINSERTF32x8Zrr = 7044,
7061
    VINSERTF32x8Zrrk  = 7045,
7062
    VINSERTF32x8Zrrkz = 7046,
7063
    VINSERTF64x2Z256rm  = 7047,
7064
    VINSERTF64x2Z256rmk = 7048,
7065
    VINSERTF64x2Z256rmkz  = 7049,
7066
    VINSERTF64x2Z256rr  = 7050,
7067
    VINSERTF64x2Z256rrk = 7051,
7068
    VINSERTF64x2Z256rrkz  = 7052,
7069
    VINSERTF64x2Zrm = 7053,
7070
    VINSERTF64x2Zrmk  = 7054,
7071
    VINSERTF64x2Zrmkz = 7055,
7072
    VINSERTF64x2Zrr = 7056,
7073
    VINSERTF64x2Zrrk  = 7057,
7074
    VINSERTF64x2Zrrkz = 7058,
7075
    VINSERTF64x4Zrm = 7059,
7076
    VINSERTF64x4Zrmk  = 7060,
7077
    VINSERTF64x4Zrmkz = 7061,
7078
    VINSERTF64x4Zrr = 7062,
7079
    VINSERTF64x4Zrrk  = 7063,
7080
    VINSERTF64x4Zrrkz = 7064,
7081
    VINSERTI128rm = 7065,
7082
    VINSERTI128rr = 7066,
7083
    VINSERTI32x4Z256rm  = 7067,
7084
    VINSERTI32x4Z256rmk = 7068,
7085
    VINSERTI32x4Z256rmkz  = 7069,
7086
    VINSERTI32x4Z256rr  = 7070,
7087
    VINSERTI32x4Z256rrk = 7071,
7088
    VINSERTI32x4Z256rrkz  = 7072,
7089
    VINSERTI32x4Zrm = 7073,
7090
    VINSERTI32x4Zrmk  = 7074,
7091
    VINSERTI32x4Zrmkz = 7075,
7092
    VINSERTI32x4Zrr = 7076,
7093
    VINSERTI32x4Zrrk  = 7077,
7094
    VINSERTI32x4Zrrkz = 7078,
7095
    VINSERTI32x8Zrm = 7079,
7096
    VINSERTI32x8Zrmk  = 7080,
7097
    VINSERTI32x8Zrmkz = 7081,
7098
    VINSERTI32x8Zrr = 7082,
7099
    VINSERTI32x8Zrrk  = 7083,
7100
    VINSERTI32x8Zrrkz = 7084,
7101
    VINSERTI64x2Z256rm  = 7085,
7102
    VINSERTI64x2Z256rmk = 7086,
7103
    VINSERTI64x2Z256rmkz  = 7087,
7104
    VINSERTI64x2Z256rr  = 7088,
7105
    VINSERTI64x2Z256rrk = 7089,
7106
    VINSERTI64x2Z256rrkz  = 7090,
7107
    VINSERTI64x2Zrm = 7091,
7108
    VINSERTI64x2Zrmk  = 7092,
7109
    VINSERTI64x2Zrmkz = 7093,
7110
    VINSERTI64x2Zrr = 7094,
7111
    VINSERTI64x2Zrrk  = 7095,
7112
    VINSERTI64x2Zrrkz = 7096,
7113
    VINSERTI64x4Zrm = 7097,
7114
    VINSERTI64x4Zrmk  = 7098,
7115
    VINSERTI64x4Zrmkz = 7099,
7116
    VINSERTI64x4Zrr = 7100,
7117
    VINSERTI64x4Zrrk  = 7101,
7118
    VINSERTI64x4Zrrkz = 7102,
7119
    VINSERTPSrm = 7103,
7120
    VINSERTPSrr = 7104,
7121
    VINSERTPSzrm  = 7105,
7122
    VINSERTPSzrr  = 7106,
7123
    VLDDQUYrm = 7107,
7124
    VLDDQUrm  = 7108,
7125
    VLDMXCSR  = 7109,
7126
    VMASKMOVDQU = 7110,
7127
    VMASKMOVDQU64 = 7111,
7128
    VMASKMOVPDYmr = 7112,
7129
    VMASKMOVPDYrm = 7113,
7130
    VMASKMOVPDmr  = 7114,
7131
    VMASKMOVPDrm  = 7115,
7132
    VMASKMOVPSYmr = 7116,
7133
    VMASKMOVPSYrm = 7117,
7134
    VMASKMOVPSmr  = 7118,
7135
    VMASKMOVPSrm  = 7119,
7136
    VMAXCPDYrm  = 7120,
7137
    VMAXCPDYrr  = 7121,
7138
    VMAXCPDrm = 7122,
7139
    VMAXCPDrr = 7123,
7140
    VMAXCPSYrm  = 7124,
7141
    VMAXCPSYrr  = 7125,
7142
    VMAXCPSrm = 7126,
7143
    VMAXCPSrr = 7127,
7144
    VMAXCSDrm = 7128,
7145
    VMAXCSDrr = 7129,
7146
    VMAXCSSrm = 7130,
7147
    VMAXCSSrr = 7131,
7148
    VMAXPDYrm = 7132,
7149
    VMAXPDYrr = 7133,
7150
    VMAXPDZ128rm  = 7134,
7151
    VMAXPDZ128rmb = 7135,
7152
    VMAXPDZ128rmbk  = 7136,
7153
    VMAXPDZ128rmbkz = 7137,
7154
    VMAXPDZ128rmk = 7138,
7155
    VMAXPDZ128rmkz  = 7139,
7156
    VMAXPDZ128rr  = 7140,
7157
    VMAXPDZ128rrk = 7141,
7158
    VMAXPDZ128rrkz  = 7142,
7159
    VMAXPDZ256rm  = 7143,
7160
    VMAXPDZ256rmb = 7144,
7161
    VMAXPDZ256rmbk  = 7145,
7162
    VMAXPDZ256rmbkz = 7146,
7163
    VMAXPDZ256rmk = 7147,
7164
    VMAXPDZ256rmkz  = 7148,
7165
    VMAXPDZ256rr  = 7149,
7166
    VMAXPDZ256rrk = 7150,
7167
    VMAXPDZ256rrkz  = 7151,
7168
    VMAXPDZrb = 7152,
7169
    VMAXPDZrbk  = 7153,
7170
    VMAXPDZrbkz = 7154,
7171
    VMAXPDZrm = 7155,
7172
    VMAXPDZrmb  = 7156,
7173
    VMAXPDZrmbk = 7157,
7174
    VMAXPDZrmbkz  = 7158,
7175
    VMAXPDZrmk  = 7159,
7176
    VMAXPDZrmkz = 7160,
7177
    VMAXPDZrr = 7161,
7178
    VMAXPDZrrk  = 7162,
7179
    VMAXPDZrrkz = 7163,
7180
    VMAXPDrm  = 7164,
7181
    VMAXPDrr  = 7165,
7182
    VMAXPSYrm = 7166,
7183
    VMAXPSYrr = 7167,
7184
    VMAXPSZ128rm  = 7168,
7185
    VMAXPSZ128rmb = 7169,
7186
    VMAXPSZ128rmbk  = 7170,
7187
    VMAXPSZ128rmbkz = 7171,
7188
    VMAXPSZ128rmk = 7172,
7189
    VMAXPSZ128rmkz  = 7173,
7190
    VMAXPSZ128rr  = 7174,
7191
    VMAXPSZ128rrk = 7175,
7192
    VMAXPSZ128rrkz  = 7176,
7193
    VMAXPSZ256rm  = 7177,
7194
    VMAXPSZ256rmb = 7178,
7195
    VMAXPSZ256rmbk  = 7179,
7196
    VMAXPSZ256rmbkz = 7180,
7197
    VMAXPSZ256rmk = 7181,
7198
    VMAXPSZ256rmkz  = 7182,
7199
    VMAXPSZ256rr  = 7183,
7200
    VMAXPSZ256rrk = 7184,
7201
    VMAXPSZ256rrkz  = 7185,
7202
    VMAXPSZrb = 7186,
7203
    VMAXPSZrbk  = 7187,
7204
    VMAXPSZrbkz = 7188,
7205
    VMAXPSZrm = 7189,
7206
    VMAXPSZrmb  = 7190,
7207
    VMAXPSZrmbk = 7191,
7208
    VMAXPSZrmbkz  = 7192,
7209
    VMAXPSZrmk  = 7193,
7210
    VMAXPSZrmkz = 7194,
7211
    VMAXPSZrr = 7195,
7212
    VMAXPSZrrk  = 7196,
7213
    VMAXPSZrrkz = 7197,
7214
    VMAXPSrm  = 7198,
7215
    VMAXPSrr  = 7199,
7216
    VMAXSDZrm = 7200,
7217
    VMAXSDZrm_Int = 7201,
7218
    VMAXSDZrm_Intk  = 7202,
7219
    VMAXSDZrm_Intkz = 7203,
7220
    VMAXSDZrr = 7204,
7221
    VMAXSDZrr_Int = 7205,
7222
    VMAXSDZrr_Intk  = 7206,
7223
    VMAXSDZrr_Intkz = 7207,
7224
    VMAXSDZrrb  = 7208,
7225
    VMAXSDZrrbk = 7209,
7226
    VMAXSDZrrbkz  = 7210,
7227
    VMAXSDrm  = 7211,
7228
    VMAXSDrm_Int  = 7212,
7229
    VMAXSDrr  = 7213,
7230
    VMAXSDrr_Int  = 7214,
7231
    VMAXSSZrm = 7215,
7232
    VMAXSSZrm_Int = 7216,
7233
    VMAXSSZrm_Intk  = 7217,
7234
    VMAXSSZrm_Intkz = 7218,
7235
    VMAXSSZrr = 7219,
7236
    VMAXSSZrr_Int = 7220,
7237
    VMAXSSZrr_Intk  = 7221,
7238
    VMAXSSZrr_Intkz = 7222,
7239
    VMAXSSZrrb  = 7223,
7240
    VMAXSSZrrbk = 7224,
7241
    VMAXSSZrrbkz  = 7225,
7242
    VMAXSSrm  = 7226,
7243
    VMAXSSrm_Int  = 7227,
7244
    VMAXSSrr  = 7228,
7245
    VMAXSSrr_Int  = 7229,
7246
    VMCALL  = 7230,
7247
    VMCLEARm  = 7231,
7248
    VMFUNC  = 7232,
7249
    VMINCPDYrm  = 7233,
7250
    VMINCPDYrr  = 7234,
7251
    VMINCPDrm = 7235,
7252
    VMINCPDrr = 7236,
7253
    VMINCPSYrm  = 7237,
7254
    VMINCPSYrr  = 7238,
7255
    VMINCPSrm = 7239,
7256
    VMINCPSrr = 7240,
7257
    VMINCSDrm = 7241,
7258
    VMINCSDrr = 7242,
7259
    VMINCSSrm = 7243,
7260
    VMINCSSrr = 7244,
7261
    VMINPDYrm = 7245,
7262
    VMINPDYrr = 7246,
7263
    VMINPDZ128rm  = 7247,
7264
    VMINPDZ128rmb = 7248,
7265
    VMINPDZ128rmbk  = 7249,
7266
    VMINPDZ128rmbkz = 7250,
7267
    VMINPDZ128rmk = 7251,
7268
    VMINPDZ128rmkz  = 7252,
7269
    VMINPDZ128rr  = 7253,
7270
    VMINPDZ128rrk = 7254,
7271
    VMINPDZ128rrkz  = 7255,
7272
    VMINPDZ256rm  = 7256,
7273
    VMINPDZ256rmb = 7257,
7274
    VMINPDZ256rmbk  = 7258,
7275
    VMINPDZ256rmbkz = 7259,
7276
    VMINPDZ256rmk = 7260,
7277
    VMINPDZ256rmkz  = 7261,
7278
    VMINPDZ256rr  = 7262,
7279
    VMINPDZ256rrk = 7263,
7280
    VMINPDZ256rrkz  = 7264,
7281
    VMINPDZrb = 7265,
7282
    VMINPDZrbk  = 7266,
7283
    VMINPDZrbkz = 7267,
7284
    VMINPDZrm = 7268,
7285
    VMINPDZrmb  = 7269,
7286
    VMINPDZrmbk = 7270,
7287
    VMINPDZrmbkz  = 7271,
7288
    VMINPDZrmk  = 7272,
7289
    VMINPDZrmkz = 7273,
7290
    VMINPDZrr = 7274,
7291
    VMINPDZrrk  = 7275,
7292
    VMINPDZrrkz = 7276,
7293
    VMINPDrm  = 7277,
7294
    VMINPDrr  = 7278,
7295
    VMINPSYrm = 7279,
7296
    VMINPSYrr = 7280,
7297
    VMINPSZ128rm  = 7281,
7298
    VMINPSZ128rmb = 7282,
7299
    VMINPSZ128rmbk  = 7283,
7300
    VMINPSZ128rmbkz = 7284,
7301
    VMINPSZ128rmk = 7285,
7302
    VMINPSZ128rmkz  = 7286,
7303
    VMINPSZ128rr  = 7287,
7304
    VMINPSZ128rrk = 7288,
7305
    VMINPSZ128rrkz  = 7289,
7306
    VMINPSZ256rm  = 7290,
7307
    VMINPSZ256rmb = 7291,
7308
    VMINPSZ256rmbk  = 7292,
7309
    VMINPSZ256rmbkz = 7293,
7310
    VMINPSZ256rmk = 7294,
7311
    VMINPSZ256rmkz  = 7295,
7312
    VMINPSZ256rr  = 7296,
7313
    VMINPSZ256rrk = 7297,
7314
    VMINPSZ256rrkz  = 7298,
7315
    VMINPSZrb = 7299,
7316
    VMINPSZrbk  = 7300,
7317
    VMINPSZrbkz = 7301,
7318
    VMINPSZrm = 7302,
7319
    VMINPSZrmb  = 7303,
7320
    VMINPSZrmbk = 7304,
7321
    VMINPSZrmbkz  = 7305,
7322
    VMINPSZrmk  = 7306,
7323
    VMINPSZrmkz = 7307,
7324
    VMINPSZrr = 7308,
7325
    VMINPSZrrk  = 7309,
7326
    VMINPSZrrkz = 7310,
7327
    VMINPSrm  = 7311,
7328
    VMINPSrr  = 7312,
7329
    VMINSDZrm = 7313,
7330
    VMINSDZrm_Int = 7314,
7331
    VMINSDZrm_Intk  = 7315,
7332
    VMINSDZrm_Intkz = 7316,
7333
    VMINSDZrr = 7317,
7334
    VMINSDZrr_Int = 7318,
7335
    VMINSDZrr_Intk  = 7319,
7336
    VMINSDZrr_Intkz = 7320,
7337
    VMINSDZrrb  = 7321,
7338
    VMINSDZrrbk = 7322,
7339
    VMINSDZrrbkz  = 7323,
7340
    VMINSDrm  = 7324,
7341
    VMINSDrm_Int  = 7325,
7342
    VMINSDrr  = 7326,
7343
    VMINSDrr_Int  = 7327,
7344
    VMINSSZrm = 7328,
7345
    VMINSSZrm_Int = 7329,
7346
    VMINSSZrm_Intk  = 7330,
7347
    VMINSSZrm_Intkz = 7331,
7348
    VMINSSZrr = 7332,
7349
    VMINSSZrr_Int = 7333,
7350
    VMINSSZrr_Intk  = 7334,
7351
    VMINSSZrr_Intkz = 7335,
7352
    VMINSSZrrb  = 7336,
7353
    VMINSSZrrbk = 7337,
7354
    VMINSSZrrbkz  = 7338,
7355
    VMINSSrm  = 7339,
7356
    VMINSSrm_Int  = 7340,
7357
    VMINSSrr  = 7341,
7358
    VMINSSrr_Int  = 7342,
7359
    VMLAUNCH  = 7343,
7360
    VMLOAD32  = 7344,
7361
    VMLOAD64  = 7345,
7362
    VMMCALL = 7346,
7363
    VMOV64toPQIZrm  = 7347,
7364
    VMOV64toPQIZrr  = 7348,
7365
    VMOV64toPQIrm = 7349,
7366
    VMOV64toPQIrr = 7350,
7367
    VMOV64toSDZrr = 7351,
7368
    VMOV64toSDrm  = 7352,
7369
    VMOV64toSDrr  = 7353,
7370
    VMOVAPDYmr  = 7354,
7371
    VMOVAPDYrm  = 7355,
7372
    VMOVAPDYrr  = 7356,
7373
    VMOVAPDYrr_REV  = 7357,
7374
    VMOVAPDZ128mr = 7358,
7375
    VMOVAPDZ128mrk  = 7359,
7376
    VMOVAPDZ128rm = 7360,
7377
    VMOVAPDZ128rmk  = 7361,
7378
    VMOVAPDZ128rmkz = 7362,
7379
    VMOVAPDZ128rr = 7363,
7380
    VMOVAPDZ128rr_REV = 7364,
7381
    VMOVAPDZ128rrk  = 7365,
7382
    VMOVAPDZ128rrk_REV  = 7366,
7383
    VMOVAPDZ128rrkz = 7367,
7384
    VMOVAPDZ128rrkz_REV = 7368,
7385
    VMOVAPDZ256mr = 7369,
7386
    VMOVAPDZ256mrk  = 7370,
7387
    VMOVAPDZ256rm = 7371,
7388
    VMOVAPDZ256rmk  = 7372,
7389
    VMOVAPDZ256rmkz = 7373,
7390
    VMOVAPDZ256rr = 7374,
7391
    VMOVAPDZ256rr_REV = 7375,
7392
    VMOVAPDZ256rrk  = 7376,
7393
    VMOVAPDZ256rrk_REV  = 7377,
7394
    VMOVAPDZ256rrkz = 7378,
7395
    VMOVAPDZ256rrkz_REV = 7379,
7396
    VMOVAPDZmr  = 7380,
7397
    VMOVAPDZmrk = 7381,
7398
    VMOVAPDZrm  = 7382,
7399
    VMOVAPDZrmk = 7383,
7400
    VMOVAPDZrmkz  = 7384,
7401
    VMOVAPDZrr  = 7385,
7402
    VMOVAPDZrr_REV  = 7386,
7403
    VMOVAPDZrrk = 7387,
7404
    VMOVAPDZrrk_REV = 7388,
7405
    VMOVAPDZrrkz  = 7389,
7406
    VMOVAPDZrrkz_REV  = 7390,
7407
    VMOVAPDmr = 7391,
7408
    VMOVAPDrm = 7392,
7409
    VMOVAPDrr = 7393,
7410
    VMOVAPDrr_REV = 7394,
7411
    VMOVAPSYmr  = 7395,
7412
    VMOVAPSYrm  = 7396,
7413
    VMOVAPSYrr  = 7397,
7414
    VMOVAPSYrr_REV  = 7398,
7415
    VMOVAPSZ128mr = 7399,
7416
    VMOVAPSZ128mrk  = 7400,
7417
    VMOVAPSZ128rm = 7401,
7418
    VMOVAPSZ128rmk  = 7402,
7419
    VMOVAPSZ128rmkz = 7403,
7420
    VMOVAPSZ128rr = 7404,
7421
    VMOVAPSZ128rr_REV = 7405,
7422
    VMOVAPSZ128rrk  = 7406,
7423
    VMOVAPSZ128rrk_REV  = 7407,
7424
    VMOVAPSZ128rrkz = 7408,
7425
    VMOVAPSZ128rrkz_REV = 7409,
7426
    VMOVAPSZ256mr = 7410,
7427
    VMOVAPSZ256mrk  = 7411,
7428
    VMOVAPSZ256rm = 7412,
7429
    VMOVAPSZ256rmk  = 7413,
7430
    VMOVAPSZ256rmkz = 7414,
7431
    VMOVAPSZ256rr = 7415,
7432
    VMOVAPSZ256rr_REV = 7416,
7433
    VMOVAPSZ256rrk  = 7417,
7434
    VMOVAPSZ256rrk_REV  = 7418,
7435
    VMOVAPSZ256rrkz = 7419,
7436
    VMOVAPSZ256rrkz_REV = 7420,
7437
    VMOVAPSZmr  = 7421,
7438
    VMOVAPSZmrk = 7422,
7439
    VMOVAPSZrm  = 7423,
7440
    VMOVAPSZrmk = 7424,
7441
    VMOVAPSZrmkz  = 7425,
7442
    VMOVAPSZrr  = 7426,
7443
    VMOVAPSZrr_REV  = 7427,
7444
    VMOVAPSZrrk = 7428,
7445
    VMOVAPSZrrk_REV = 7429,
7446
    VMOVAPSZrrkz  = 7430,
7447
    VMOVAPSZrrkz_REV  = 7431,
7448
    VMOVAPSmr = 7432,
7449
    VMOVAPSrm = 7433,
7450
    VMOVAPSrr = 7434,
7451
    VMOVAPSrr_REV = 7435,
7452
    VMOVDDUPYrm = 7436,
7453
    VMOVDDUPYrr = 7437,
7454
    VMOVDDUPZ128rm  = 7438,
7455
    VMOVDDUPZ128rmk = 7439,
7456
    VMOVDDUPZ128rmkz  = 7440,
7457
    VMOVDDUPZ128rr  = 7441,
7458
    VMOVDDUPZ128rrk = 7442,
7459
    VMOVDDUPZ128rrkz  = 7443,
7460
    VMOVDDUPZ256rm  = 7444,
7461
    VMOVDDUPZ256rmk = 7445,
7462
    VMOVDDUPZ256rmkz  = 7446,
7463
    VMOVDDUPZ256rr  = 7447,
7464
    VMOVDDUPZ256rrk = 7448,
7465
    VMOVDDUPZ256rrkz  = 7449,
7466
    VMOVDDUPZrm = 7450,
7467
    VMOVDDUPZrmk  = 7451,
7468
    VMOVDDUPZrmkz = 7452,
7469
    VMOVDDUPZrr = 7453,
7470
    VMOVDDUPZrrk  = 7454,
7471
    VMOVDDUPZrrkz = 7455,
7472
    VMOVDDUPrm  = 7456,
7473
    VMOVDDUPrr  = 7457,
7474
    VMOVDI2PDIZrm = 7458,
7475
    VMOVDI2PDIZrr = 7459,
7476
    VMOVDI2PDIrm  = 7460,
7477
    VMOVDI2PDIrr  = 7461,
7478
    VMOVDI2SSZrm  = 7462,
7479
    VMOVDI2SSZrr  = 7463,
7480
    VMOVDI2SSrm = 7464,
7481
    VMOVDI2SSrr = 7465,
7482
    VMOVDQA32Z128mr = 7466,
7483
    VMOVDQA32Z128mrk  = 7467,
7484
    VMOVDQA32Z128rm = 7468,
7485
    VMOVDQA32Z128rmk  = 7469,
7486
    VMOVDQA32Z128rmkz = 7470,
7487
    VMOVDQA32Z128rr = 7471,
7488
    VMOVDQA32Z128rr_REV = 7472,
7489
    VMOVDQA32Z128rrk  = 7473,
7490
    VMOVDQA32Z128rrk_REV  = 7474,
7491
    VMOVDQA32Z128rrkz = 7475,
7492
    VMOVDQA32Z128rrkz_REV = 7476,
7493
    VMOVDQA32Z256mr = 7477,
7494
    VMOVDQA32Z256mrk  = 7478,
7495
    VMOVDQA32Z256rm = 7479,
7496
    VMOVDQA32Z256rmk  = 7480,
7497
    VMOVDQA32Z256rmkz = 7481,
7498
    VMOVDQA32Z256rr = 7482,
7499
    VMOVDQA32Z256rr_REV = 7483,
7500
    VMOVDQA32Z256rrk  = 7484,
7501
    VMOVDQA32Z256rrk_REV  = 7485,
7502
    VMOVDQA32Z256rrkz = 7486,
7503
    VMOVDQA32Z256rrkz_REV = 7487,
7504
    VMOVDQA32Zmr  = 7488,
7505
    VMOVDQA32Zmrk = 7489,
7506
    VMOVDQA32Zrm  = 7490,
7507
    VMOVDQA32Zrmk = 7491,
7508
    VMOVDQA32Zrmkz  = 7492,
7509
    VMOVDQA32Zrr  = 7493,
7510
    VMOVDQA32Zrr_REV  = 7494,
7511
    VMOVDQA32Zrrk = 7495,
7512
    VMOVDQA32Zrrk_REV = 7496,
7513
    VMOVDQA32Zrrkz  = 7497,
7514
    VMOVDQA32Zrrkz_REV  = 7498,
7515
    VMOVDQA64Z128mr = 7499,
7516
    VMOVDQA64Z128mrk  = 7500,
7517
    VMOVDQA64Z128rm = 7501,
7518
    VMOVDQA64Z128rmk  = 7502,
7519
    VMOVDQA64Z128rmkz = 7503,
7520
    VMOVDQA64Z128rr = 7504,
7521
    VMOVDQA64Z128rr_REV = 7505,
7522
    VMOVDQA64Z128rrk  = 7506,
7523
    VMOVDQA64Z128rrk_REV  = 7507,
7524
    VMOVDQA64Z128rrkz = 7508,
7525
    VMOVDQA64Z128rrkz_REV = 7509,
7526
    VMOVDQA64Z256mr = 7510,
7527
    VMOVDQA64Z256mrk  = 7511,
7528
    VMOVDQA64Z256rm = 7512,
7529
    VMOVDQA64Z256rmk  = 7513,
7530
    VMOVDQA64Z256rmkz = 7514,
7531
    VMOVDQA64Z256rr = 7515,
7532
    VMOVDQA64Z256rr_REV = 7516,
7533
    VMOVDQA64Z256rrk  = 7517,
7534
    VMOVDQA64Z256rrk_REV  = 7518,
7535
    VMOVDQA64Z256rrkz = 7519,
7536
    VMOVDQA64Z256rrkz_REV = 7520,
7537
    VMOVDQA64Zmr  = 7521,
7538
    VMOVDQA64Zmrk = 7522,
7539
    VMOVDQA64Zrm  = 7523,
7540
    VMOVDQA64Zrmk = 7524,
7541
    VMOVDQA64Zrmkz  = 7525,
7542
    VMOVDQA64Zrr  = 7526,
7543
    VMOVDQA64Zrr_REV  = 7527,
7544
    VMOVDQA64Zrrk = 7528,
7545
    VMOVDQA64Zrrk_REV = 7529,
7546
    VMOVDQA64Zrrkz  = 7530,
7547
    VMOVDQA64Zrrkz_REV  = 7531,
7548
    VMOVDQAYmr  = 7532,
7549
    VMOVDQAYrm  = 7533,
7550
    VMOVDQAYrr  = 7534,
7551
    VMOVDQAYrr_REV  = 7535,
7552
    VMOVDQAmr = 7536,
7553
    VMOVDQArm = 7537,
7554
    VMOVDQArr = 7538,
7555
    VMOVDQArr_REV = 7539,
7556
    VMOVDQU16Z128mr = 7540,
7557
    VMOVDQU16Z128mrk  = 7541,
7558
    VMOVDQU16Z128rm = 7542,
7559
    VMOVDQU16Z128rmk  = 7543,
7560
    VMOVDQU16Z128rmkz = 7544,
7561
    VMOVDQU16Z128rr = 7545,
7562
    VMOVDQU16Z128rr_REV = 7546,
7563
    VMOVDQU16Z128rrk  = 7547,
7564
    VMOVDQU16Z128rrk_REV  = 7548,
7565
    VMOVDQU16Z128rrkz = 7549,
7566
    VMOVDQU16Z128rrkz_REV = 7550,
7567
    VMOVDQU16Z256mr = 7551,
7568
    VMOVDQU16Z256mrk  = 7552,
7569
    VMOVDQU16Z256rm = 7553,
7570
    VMOVDQU16Z256rmk  = 7554,
7571
    VMOVDQU16Z256rmkz = 7555,
7572
    VMOVDQU16Z256rr = 7556,
7573
    VMOVDQU16Z256rr_REV = 7557,
7574
    VMOVDQU16Z256rrk  = 7558,
7575
    VMOVDQU16Z256rrk_REV  = 7559,
7576
    VMOVDQU16Z256rrkz = 7560,
7577
    VMOVDQU16Z256rrkz_REV = 7561,
7578
    VMOVDQU16Zmr  = 7562,
7579
    VMOVDQU16Zmrk = 7563,
7580
    VMOVDQU16Zrm  = 7564,
7581
    VMOVDQU16Zrmk = 7565,
7582
    VMOVDQU16Zrmkz  = 7566,
7583
    VMOVDQU16Zrr  = 7567,
7584
    VMOVDQU16Zrr_REV  = 7568,
7585
    VMOVDQU16Zrrk = 7569,
7586
    VMOVDQU16Zrrk_REV = 7570,
7587
    VMOVDQU16Zrrkz  = 7571,
7588
    VMOVDQU16Zrrkz_REV  = 7572,
7589
    VMOVDQU32Z128mr = 7573,
7590
    VMOVDQU32Z128mrk  = 7574,
7591
    VMOVDQU32Z128rm = 7575,
7592
    VMOVDQU32Z128rmk  = 7576,
7593
    VMOVDQU32Z128rmkz = 7577,
7594
    VMOVDQU32Z128rr = 7578,
7595
    VMOVDQU32Z128rr_REV = 7579,
7596
    VMOVDQU32Z128rrk  = 7580,
7597
    VMOVDQU32Z128rrk_REV  = 7581,
7598
    VMOVDQU32Z128rrkz = 7582,
7599
    VMOVDQU32Z128rrkz_REV = 7583,
7600
    VMOVDQU32Z256mr = 7584,
7601
    VMOVDQU32Z256mrk  = 7585,
7602
    VMOVDQU32Z256rm = 7586,
7603
    VMOVDQU32Z256rmk  = 7587,
7604
    VMOVDQU32Z256rmkz = 7588,
7605
    VMOVDQU32Z256rr = 7589,
7606
    VMOVDQU32Z256rr_REV = 7590,
7607
    VMOVDQU32Z256rrk  = 7591,
7608
    VMOVDQU32Z256rrk_REV  = 7592,
7609
    VMOVDQU32Z256rrkz = 7593,
7610
    VMOVDQU32Z256rrkz_REV = 7594,
7611
    VMOVDQU32Zmr  = 7595,
7612
    VMOVDQU32Zmrk = 7596,
7613
    VMOVDQU32Zrm  = 7597,
7614
    VMOVDQU32Zrmk = 7598,
7615
    VMOVDQU32Zrmkz  = 7599,
7616
    VMOVDQU32Zrr  = 7600,
7617
    VMOVDQU32Zrr_REV  = 7601,
7618
    VMOVDQU32Zrrk = 7602,
7619
    VMOVDQU32Zrrk_REV = 7603,
7620
    VMOVDQU32Zrrkz  = 7604,
7621
    VMOVDQU32Zrrkz_REV  = 7605,
7622
    VMOVDQU64Z128mr = 7606,
7623
    VMOVDQU64Z128mrk  = 7607,
7624
    VMOVDQU64Z128rm = 7608,
7625
    VMOVDQU64Z128rmk  = 7609,
7626
    VMOVDQU64Z128rmkz = 7610,
7627
    VMOVDQU64Z128rr = 7611,
7628
    VMOVDQU64Z128rr_REV = 7612,
7629
    VMOVDQU64Z128rrk  = 7613,
7630
    VMOVDQU64Z128rrk_REV  = 7614,
7631
    VMOVDQU64Z128rrkz = 7615,
7632
    VMOVDQU64Z128rrkz_REV = 7616,
7633
    VMOVDQU64Z256mr = 7617,
7634
    VMOVDQU64Z256mrk  = 7618,
7635
    VMOVDQU64Z256rm = 7619,
7636
    VMOVDQU64Z256rmk  = 7620,
7637
    VMOVDQU64Z256rmkz = 7621,
7638
    VMOVDQU64Z256rr = 7622,
7639
    VMOVDQU64Z256rr_REV = 7623,
7640
    VMOVDQU64Z256rrk  = 7624,
7641
    VMOVDQU64Z256rrk_REV  = 7625,
7642
    VMOVDQU64Z256rrkz = 7626,
7643
    VMOVDQU64Z256rrkz_REV = 7627,
7644
    VMOVDQU64Zmr  = 7628,
7645
    VMOVDQU64Zmrk = 7629,
7646
    VMOVDQU64Zrm  = 7630,
7647
    VMOVDQU64Zrmk = 7631,
7648
    VMOVDQU64Zrmkz  = 7632,
7649
    VMOVDQU64Zrr  = 7633,
7650
    VMOVDQU64Zrr_REV  = 7634,
7651
    VMOVDQU64Zrrk = 7635,
7652
    VMOVDQU64Zrrk_REV = 7636,
7653
    VMOVDQU64Zrrkz  = 7637,
7654
    VMOVDQU64Zrrkz_REV  = 7638,
7655
    VMOVDQU8Z128mr  = 7639,
7656
    VMOVDQU8Z128mrk = 7640,
7657
    VMOVDQU8Z128rm  = 7641,
7658
    VMOVDQU8Z128rmk = 7642,
7659
    VMOVDQU8Z128rmkz  = 7643,
7660
    VMOVDQU8Z128rr  = 7644,
7661
    VMOVDQU8Z128rr_REV  = 7645,
7662
    VMOVDQU8Z128rrk = 7646,
7663
    VMOVDQU8Z128rrk_REV = 7647,
7664
    VMOVDQU8Z128rrkz  = 7648,
7665
    VMOVDQU8Z128rrkz_REV  = 7649,
7666
    VMOVDQU8Z256mr  = 7650,
7667
    VMOVDQU8Z256mrk = 7651,
7668
    VMOVDQU8Z256rm  = 7652,
7669
    VMOVDQU8Z256rmk = 7653,
7670
    VMOVDQU8Z256rmkz  = 7654,
7671
    VMOVDQU8Z256rr  = 7655,
7672
    VMOVDQU8Z256rr_REV  = 7656,
7673
    VMOVDQU8Z256rrk = 7657,
7674
    VMOVDQU8Z256rrk_REV = 7658,
7675
    VMOVDQU8Z256rrkz  = 7659,
7676
    VMOVDQU8Z256rrkz_REV  = 7660,
7677
    VMOVDQU8Zmr = 7661,
7678
    VMOVDQU8Zmrk  = 7662,
7679
    VMOVDQU8Zrm = 7663,
7680
    VMOVDQU8Zrmk  = 7664,
7681
    VMOVDQU8Zrmkz = 7665,
7682
    VMOVDQU8Zrr = 7666,
7683
    VMOVDQU8Zrr_REV = 7667,
7684
    VMOVDQU8Zrrk  = 7668,
7685
    VMOVDQU8Zrrk_REV  = 7669,
7686
    VMOVDQU8Zrrkz = 7670,
7687
    VMOVDQU8Zrrkz_REV = 7671,
7688
    VMOVDQUYmr  = 7672,
7689
    VMOVDQUYrm  = 7673,
7690
    VMOVDQUYrr  = 7674,
7691
    VMOVDQUYrr_REV  = 7675,
7692
    VMOVDQUmr = 7676,
7693
    VMOVDQUrm = 7677,
7694
    VMOVDQUrr = 7678,
7695
    VMOVDQUrr_REV = 7679,
7696
    VMOVHLPSZrr = 7680,
7697
    VMOVHLPSrr  = 7681,
7698
    VMOVHPDZ128mr = 7682,
7699
    VMOVHPDZ128rm = 7683,
7700
    VMOVHPDmr = 7684,
7701
    VMOVHPDrm = 7685,
7702
    VMOVHPSZ128mr = 7686,
7703
    VMOVHPSZ128rm = 7687,
7704
    VMOVHPSmr = 7688,
7705
    VMOVHPSrm = 7689,
7706
    VMOVLHPSZrr = 7690,
7707
    VMOVLHPSrr  = 7691,
7708
    VMOVLPDZ128mr = 7692,
7709
    VMOVLPDZ128rm = 7693,
7710
    VMOVLPDmr = 7694,
7711
    VMOVLPDrm = 7695,
7712
    VMOVLPSZ128mr = 7696,
7713
    VMOVLPSZ128rm = 7697,
7714
    VMOVLPSmr = 7698,
7715
    VMOVLPSrm = 7699,
7716
    VMOVMSKPDYrr  = 7700,
7717
    VMOVMSKPDrr = 7701,
7718
    VMOVMSKPSYrr  = 7702,
7719
    VMOVMSKPSrr = 7703,
7720
    VMOVNTDQAYrm  = 7704,
7721
    VMOVNTDQAZ128rm = 7705,
7722
    VMOVNTDQAZ256rm = 7706,
7723
    VMOVNTDQAZrm  = 7707,
7724
    VMOVNTDQArm = 7708,
7725
    VMOVNTDQYmr = 7709,
7726
    VMOVNTDQZ128mr  = 7710,
7727
    VMOVNTDQZ256mr  = 7711,
7728
    VMOVNTDQZmr = 7712,
7729
    VMOVNTDQmr  = 7713,
7730
    VMOVNTPDYmr = 7714,
7731
    VMOVNTPDZ128mr  = 7715,
7732
    VMOVNTPDZ256mr  = 7716,
7733
    VMOVNTPDZmr = 7717,
7734
    VMOVNTPDmr  = 7718,
7735
    VMOVNTPSYmr = 7719,
7736
    VMOVNTPSZ128mr  = 7720,
7737
    VMOVNTPSZ256mr  = 7721,
7738
    VMOVNTPSZmr = 7722,
7739
    VMOVNTPSmr  = 7723,
7740
    VMOVPDI2DIZmr = 7724,
7741
    VMOVPDI2DIZrr = 7725,
7742
    VMOVPDI2DImr  = 7726,
7743
    VMOVPDI2DIrr  = 7727,
7744
    VMOVPQI2QIZmr = 7728,
7745
    VMOVPQI2QIZrr = 7729,
7746
    VMOVPQI2QImr  = 7730,
7747
    VMOVPQI2QIrr  = 7731,
7748
    VMOVPQIto64Zmr  = 7732,
7749
    VMOVPQIto64Zrr  = 7733,
7750
    VMOVPQIto64rm = 7734,
7751
    VMOVPQIto64rr = 7735,
7752
    VMOVQI2PQIZrm = 7736,
7753
    VMOVQI2PQIrm  = 7737,
7754
    VMOVSDZmr = 7738,
7755
    VMOVSDZmrk  = 7739,
7756
    VMOVSDZrm = 7740,
7757
    VMOVSDZrm_Int = 7741,
7758
    VMOVSDZrm_Intk  = 7742,
7759
    VMOVSDZrm_Intkz = 7743,
7760
    VMOVSDZrr = 7744,
7761
    VMOVSDZrr_Int = 7745,
7762
    VMOVSDZrr_Intk  = 7746,
7763
    VMOVSDZrr_Intkz = 7747,
7764
    VMOVSDmr  = 7748,
7765
    VMOVSDrm  = 7749,
7766
    VMOVSDrr  = 7750,
7767
    VMOVSDrr_REV  = 7751,
7768
    VMOVSDto64Zmr = 7752,
7769
    VMOVSDto64Zrr = 7753,
7770
    VMOVSDto64mr  = 7754,
7771
    VMOVSDto64rr  = 7755,
7772
    VMOVSHDUPYrm  = 7756,
7773
    VMOVSHDUPYrr  = 7757,
7774
    VMOVSHDUPZ128rm = 7758,
7775
    VMOVSHDUPZ128rmk  = 7759,
7776
    VMOVSHDUPZ128rmkz = 7760,
7777
    VMOVSHDUPZ128rr = 7761,
7778
    VMOVSHDUPZ128rrk  = 7762,
7779
    VMOVSHDUPZ128rrkz = 7763,
7780
    VMOVSHDUPZ256rm = 7764,
7781
    VMOVSHDUPZ256rmk  = 7765,
7782
    VMOVSHDUPZ256rmkz = 7766,
7783
    VMOVSHDUPZ256rr = 7767,
7784
    VMOVSHDUPZ256rrk  = 7768,
7785
    VMOVSHDUPZ256rrkz = 7769,
7786
    VMOVSHDUPZrm  = 7770,
7787
    VMOVSHDUPZrmk = 7771,
7788
    VMOVSHDUPZrmkz  = 7772,
7789
    VMOVSHDUPZrr  = 7773,
7790
    VMOVSHDUPZrrk = 7774,
7791
    VMOVSHDUPZrrkz  = 7775,
7792
    VMOVSHDUPrm = 7776,
7793
    VMOVSHDUPrr = 7777,
7794
    VMOVSLDUPYrm  = 7778,
7795
    VMOVSLDUPYrr  = 7779,
7796
    VMOVSLDUPZ128rm = 7780,
7797
    VMOVSLDUPZ128rmk  = 7781,
7798
    VMOVSLDUPZ128rmkz = 7782,
7799
    VMOVSLDUPZ128rr = 7783,
7800
    VMOVSLDUPZ128rrk  = 7784,
7801
    VMOVSLDUPZ128rrkz = 7785,
7802
    VMOVSLDUPZ256rm = 7786,
7803
    VMOVSLDUPZ256rmk  = 7787,
7804
    VMOVSLDUPZ256rmkz = 7788,
7805
    VMOVSLDUPZ256rr = 7789,
7806
    VMOVSLDUPZ256rrk  = 7790,
7807
    VMOVSLDUPZ256rrkz = 7791,
7808
    VMOVSLDUPZrm  = 7792,
7809
    VMOVSLDUPZrmk = 7793,
7810
    VMOVSLDUPZrmkz  = 7794,
7811
    VMOVSLDUPZrr  = 7795,
7812
    VMOVSLDUPZrrk = 7796,
7813
    VMOVSLDUPZrrkz  = 7797,
7814
    VMOVSLDUPrm = 7798,
7815
    VMOVSLDUPrr = 7799,
7816
    VMOVSS2DIZmr  = 7800,
7817
    VMOVSS2DIZrr  = 7801,
7818
    VMOVSS2DImr = 7802,
7819
    VMOVSS2DIrr = 7803,
7820
    VMOVSSDrr_REV = 7804,
7821
    VMOVSSDrr_REVk  = 7805,
7822
    VMOVSSDrr_REVkz = 7806,
7823
    VMOVSSZmr = 7807,
7824
    VMOVSSZmrk  = 7808,
7825
    VMOVSSZrm = 7809,
7826
    VMOVSSZrm_Int = 7810,
7827
    VMOVSSZrm_Intk  = 7811,
7828
    VMOVSSZrm_Intkz = 7812,
7829
    VMOVSSZrr = 7813,
7830
    VMOVSSZrr_Int = 7814,
7831
    VMOVSSZrr_Intk  = 7815,
7832
    VMOVSSZrr_Intkz = 7816,
7833
    VMOVSSZrr_REV = 7817,
7834
    VMOVSSZrr_REVk  = 7818,
7835
    VMOVSSZrr_REVkz = 7819,
7836
    VMOVSSmr  = 7820,
7837
    VMOVSSrm  = 7821,
7838
    VMOVSSrr  = 7822,
7839
    VMOVSSrr_REV  = 7823,
7840
    VMOVUPDYmr  = 7824,
7841
    VMOVUPDYrm  = 7825,
7842
    VMOVUPDYrr  = 7826,
7843
    VMOVUPDYrr_REV  = 7827,
7844
    VMOVUPDZ128mr = 7828,
7845
    VMOVUPDZ128mrk  = 7829,
7846
    VMOVUPDZ128rm = 7830,
7847
    VMOVUPDZ128rmk  = 7831,
7848
    VMOVUPDZ128rmkz = 7832,
7849
    VMOVUPDZ128rr = 7833,
7850
    VMOVUPDZ128rr_REV = 7834,
7851
    VMOVUPDZ128rrk  = 7835,
7852
    VMOVUPDZ128rrk_REV  = 7836,
7853
    VMOVUPDZ128rrkz = 7837,
7854
    VMOVUPDZ128rrkz_REV = 7838,
7855
    VMOVUPDZ256mr = 7839,
7856
    VMOVUPDZ256mrk  = 7840,
7857
    VMOVUPDZ256rm = 7841,
7858
    VMOVUPDZ256rmk  = 7842,
7859
    VMOVUPDZ256rmkz = 7843,
7860
    VMOVUPDZ256rr = 7844,
7861
    VMOVUPDZ256rr_REV = 7845,
7862
    VMOVUPDZ256rrk  = 7846,
7863
    VMOVUPDZ256rrk_REV  = 7847,
7864
    VMOVUPDZ256rrkz = 7848,
7865
    VMOVUPDZ256rrkz_REV = 7849,
7866
    VMOVUPDZmr  = 7850,
7867
    VMOVUPDZmrk = 7851,
7868
    VMOVUPDZrm  = 7852,
7869
    VMOVUPDZrmk = 7853,
7870
    VMOVUPDZrmkz  = 7854,
7871
    VMOVUPDZrr  = 7855,
7872
    VMOVUPDZrr_REV  = 7856,
7873
    VMOVUPDZrrk = 7857,
7874
    VMOVUPDZrrk_REV = 7858,
7875
    VMOVUPDZrrkz  = 7859,
7876
    VMOVUPDZrrkz_REV  = 7860,
7877
    VMOVUPDmr = 7861,
7878
    VMOVUPDrm = 7862,
7879
    VMOVUPDrr = 7863,
7880
    VMOVUPDrr_REV = 7864,
7881
    VMOVUPSYmr  = 7865,
7882
    VMOVUPSYrm  = 7866,
7883
    VMOVUPSYrr  = 7867,
7884
    VMOVUPSYrr_REV  = 7868,
7885
    VMOVUPSZ128mr = 7869,
7886
    VMOVUPSZ128mrk  = 7870,
7887
    VMOVUPSZ128rm = 7871,
7888
    VMOVUPSZ128rmk  = 7872,
7889
    VMOVUPSZ128rmkz = 7873,
7890
    VMOVUPSZ128rr = 7874,
7891
    VMOVUPSZ128rr_REV = 7875,
7892
    VMOVUPSZ128rrk  = 7876,
7893
    VMOVUPSZ128rrk_REV  = 7877,
7894
    VMOVUPSZ128rrkz = 7878,
7895
    VMOVUPSZ128rrkz_REV = 7879,
7896
    VMOVUPSZ256mr = 7880,
7897
    VMOVUPSZ256mrk  = 7881,
7898
    VMOVUPSZ256rm = 7882,
7899
    VMOVUPSZ256rmk  = 7883,
7900
    VMOVUPSZ256rmkz = 7884,
7901
    VMOVUPSZ256rr = 7885,
7902
    VMOVUPSZ256rr_REV = 7886,
7903
    VMOVUPSZ256rrk  = 7887,
7904
    VMOVUPSZ256rrk_REV  = 7888,
7905
    VMOVUPSZ256rrkz = 7889,
7906
    VMOVUPSZ256rrkz_REV = 7890,
7907
    VMOVUPSZmr  = 7891,
7908
    VMOVUPSZmrk = 7892,
7909
    VMOVUPSZrm  = 7893,
7910
    VMOVUPSZrmk = 7894,
7911
    VMOVUPSZrmkz  = 7895,
7912
    VMOVUPSZrr  = 7896,
7913
    VMOVUPSZrr_REV  = 7897,
7914
    VMOVUPSZrrk = 7898,
7915
    VMOVUPSZrrk_REV = 7899,
7916
    VMOVUPSZrrkz  = 7900,
7917
    VMOVUPSZrrkz_REV  = 7901,
7918
    VMOVUPSmr = 7902,
7919
    VMOVUPSrm = 7903,
7920
    VMOVUPSrr = 7904,
7921
    VMOVUPSrr_REV = 7905,
7922
    VMOVZPQILo2PQIZrm = 7906,
7923
    VMOVZPQILo2PQIZrr = 7907,
7924
    VMOVZPQILo2PQIrm  = 7908,
7925
    VMOVZPQILo2PQIrr  = 7909,
7926
    VMOVZQI2PQIrm = 7910,
7927
    VMPSADBWYrmi  = 7911,
7928
    VMPSADBWYrri  = 7912,
7929
    VMPSADBWrmi = 7913,
7930
    VMPSADBWrri = 7914,
7931
    VMPTRLDm  = 7915,
7932
    VMPTRSTm  = 7916,
7933
    VMREAD32rm  = 7917,
7934
    VMREAD32rr  = 7918,
7935
    VMREAD64rm  = 7919,
7936
    VMREAD64rr  = 7920,
7937
    VMRESUME  = 7921,
7938
    VMRUN32 = 7922,
7939
    VMRUN64 = 7923,
7940
    VMSAVE32  = 7924,
7941
    VMSAVE64  = 7925,
7942
    VMULPDYrm = 7926,
7943
    VMULPDYrr = 7927,
7944
    VMULPDZ128rm  = 7928,
7945
    VMULPDZ128rmb = 7929,
7946
    VMULPDZ128rmbk  = 7930,
7947
    VMULPDZ128rmbkz = 7931,
7948
    VMULPDZ128rmk = 7932,
7949
    VMULPDZ128rmkz  = 7933,
7950
    VMULPDZ128rr  = 7934,
7951
    VMULPDZ128rrk = 7935,
7952
    VMULPDZ128rrkz  = 7936,
7953
    VMULPDZ256rm  = 7937,
7954
    VMULPDZ256rmb = 7938,
7955
    VMULPDZ256rmbk  = 7939,
7956
    VMULPDZ256rmbkz = 7940,
7957
    VMULPDZ256rmk = 7941,
7958
    VMULPDZ256rmkz  = 7942,
7959
    VMULPDZ256rr  = 7943,
7960
    VMULPDZ256rrk = 7944,
7961
    VMULPDZ256rrkz  = 7945,
7962
    VMULPDZrb = 7946,
7963
    VMULPDZrbk  = 7947,
7964
    VMULPDZrbkz = 7948,
7965
    VMULPDZrm = 7949,
7966
    VMULPDZrmb  = 7950,
7967
    VMULPDZrmbk = 7951,
7968
    VMULPDZrmbkz  = 7952,
7969
    VMULPDZrmk  = 7953,
7970
    VMULPDZrmkz = 7954,
7971
    VMULPDZrr = 7955,
7972
    VMULPDZrrk  = 7956,
7973
    VMULPDZrrkz = 7957,
7974
    VMULPDrm  = 7958,
7975
    VMULPDrr  = 7959,
7976
    VMULPSYrm = 7960,
7977
    VMULPSYrr = 7961,
7978
    VMULPSZ128rm  = 7962,
7979
    VMULPSZ128rmb = 7963,
7980
    VMULPSZ128rmbk  = 7964,
7981
    VMULPSZ128rmbkz = 7965,
7982
    VMULPSZ128rmk = 7966,
7983
    VMULPSZ128rmkz  = 7967,
7984
    VMULPSZ128rr  = 7968,
7985
    VMULPSZ128rrk = 7969,
7986
    VMULPSZ128rrkz  = 7970,
7987
    VMULPSZ256rm  = 7971,
7988
    VMULPSZ256rmb = 7972,
7989
    VMULPSZ256rmbk  = 7973,
7990
    VMULPSZ256rmbkz = 7974,
7991
    VMULPSZ256rmk = 7975,
7992
    VMULPSZ256rmkz  = 7976,
7993
    VMULPSZ256rr  = 7977,
7994
    VMULPSZ256rrk = 7978,
7995
    VMULPSZ256rrkz  = 7979,
7996
    VMULPSZrb = 7980,
7997
    VMULPSZrbk  = 7981,
7998
    VMULPSZrbkz = 7982,
7999
    VMULPSZrm = 7983,
8000
    VMULPSZrmb  = 7984,
8001
    VMULPSZrmbk = 7985,
8002
    VMULPSZrmbkz  = 7986,
8003
    VMULPSZrmk  = 7987,
8004
    VMULPSZrmkz = 7988,
8005
    VMULPSZrr = 7989,
8006
    VMULPSZrrk  = 7990,
8007
    VMULPSZrrkz = 7991,
8008
    VMULPSrm  = 7992,
8009
    VMULPSrr  = 7993,
8010
    VMULSDZrm = 7994,
8011
    VMULSDZrm_Int = 7995,
8012
    VMULSDZrm_Intk  = 7996,
8013
    VMULSDZrm_Intkz = 7997,
8014
    VMULSDZrr = 7998,
8015
    VMULSDZrr_Int = 7999,
8016
    VMULSDZrr_Intk  = 8000,
8017
    VMULSDZrr_Intkz = 8001,
8018
    VMULSDZrrb  = 8002,
8019
    VMULSDZrrbk = 8003,
8020
    VMULSDZrrbkz  = 8004,
8021
    VMULSDrm  = 8005,
8022
    VMULSDrm_Int  = 8006,
8023
    VMULSDrr  = 8007,
8024
    VMULSDrr_Int  = 8008,
8025
    VMULSSZrm = 8009,
8026
    VMULSSZrm_Int = 8010,
8027
    VMULSSZrm_Intk  = 8011,
8028
    VMULSSZrm_Intkz = 8012,
8029
    VMULSSZrr = 8013,
8030
    VMULSSZrr_Int = 8014,
8031
    VMULSSZrr_Intk  = 8015,
8032
    VMULSSZrr_Intkz = 8016,
8033
    VMULSSZrrb  = 8017,
8034
    VMULSSZrrbk = 8018,
8035
    VMULSSZrrbkz  = 8019,
8036
    VMULSSrm  = 8020,
8037
    VMULSSrm_Int  = 8021,
8038
    VMULSSrr  = 8022,
8039
    VMULSSrr_Int  = 8023,
8040
    VMWRITE32rm = 8024,
8041
    VMWRITE32rr = 8025,
8042
    VMWRITE64rm = 8026,
8043
    VMWRITE64rr = 8027,
8044
    VMXOFF  = 8028,
8045
    VMXON = 8029,
8046
    VORPDYrm  = 8030,
8047
    VORPDYrr  = 8031,
8048
    VORPDZ128rm = 8032,
8049
    VORPDZ128rmb  = 8033,
8050
    VORPDZ128rmbk = 8034,
8051
    VORPDZ128rmbkz  = 8035,
8052
    VORPDZ128rmk  = 8036,
8053
    VORPDZ128rmkz = 8037,
8054
    VORPDZ128rr = 8038,
8055
    VORPDZ128rrk  = 8039,
8056
    VORPDZ128rrkz = 8040,
8057
    VORPDZ256rm = 8041,
8058
    VORPDZ256rmb  = 8042,
8059
    VORPDZ256rmbk = 8043,
8060
    VORPDZ256rmbkz  = 8044,
8061
    VORPDZ256rmk  = 8045,
8062
    VORPDZ256rmkz = 8046,
8063
    VORPDZ256rr = 8047,
8064
    VORPDZ256rrk  = 8048,
8065
    VORPDZ256rrkz = 8049,
8066
    VORPDZrm  = 8050,
8067
    VORPDZrmb = 8051,
8068
    VORPDZrmbk  = 8052,
8069
    VORPDZrmbkz = 8053,
8070
    VORPDZrmk = 8054,
8071
    VORPDZrmkz  = 8055,
8072
    VORPDZrr  = 8056,
8073
    VORPDZrrk = 8057,
8074
    VORPDZrrkz  = 8058,
8075
    VORPDrm = 8059,
8076
    VORPDrr = 8060,
8077
    VORPSYrm  = 8061,
8078
    VORPSYrr  = 8062,
8079
    VORPSZ128rm = 8063,
8080
    VORPSZ128rmb  = 8064,
8081
    VORPSZ128rmbk = 8065,
8082
    VORPSZ128rmbkz  = 8066,
8083
    VORPSZ128rmk  = 8067,
8084
    VORPSZ128rmkz = 8068,
8085
    VORPSZ128rr = 8069,
8086
    VORPSZ128rrk  = 8070,
8087
    VORPSZ128rrkz = 8071,
8088
    VORPSZ256rm = 8072,
8089
    VORPSZ256rmb  = 8073,
8090
    VORPSZ256rmbk = 8074,
8091
    VORPSZ256rmbkz  = 8075,
8092
    VORPSZ256rmk  = 8076,
8093
    VORPSZ256rmkz = 8077,
8094
    VORPSZ256rr = 8078,
8095
    VORPSZ256rrk  = 8079,
8096
    VORPSZ256rrkz = 8080,
8097
    VORPSZrm  = 8081,
8098
    VORPSZrmb = 8082,
8099
    VORPSZrmbk  = 8083,
8100
    VORPSZrmbkz = 8084,
8101
    VORPSZrmk = 8085,
8102
    VORPSZrmkz  = 8086,
8103
    VORPSZrr  = 8087,
8104
    VORPSZrrk = 8088,
8105
    VORPSZrrkz  = 8089,
8106
    VORPSrm = 8090,
8107
    VORPSrr = 8091,
8108
    VPABSBZ128rm  = 8092,
8109
    VPABSBZ128rmk = 8093,
8110
    VPABSBZ128rmkz  = 8094,
8111
    VPABSBZ128rr  = 8095,
8112
    VPABSBZ128rrk = 8096,
8113
    VPABSBZ128rrkz  = 8097,
8114
    VPABSBZ256rm  = 8098,
8115
    VPABSBZ256rmk = 8099,
8116
    VPABSBZ256rmkz  = 8100,
8117
    VPABSBZ256rr  = 8101,
8118
    VPABSBZ256rrk = 8102,
8119
    VPABSBZ256rrkz  = 8103,
8120
    VPABSBZrm = 8104,
8121
    VPABSBZrmk  = 8105,
8122
    VPABSBZrmkz = 8106,
8123
    VPABSBZrr = 8107,
8124
    VPABSBZrrk  = 8108,
8125
    VPABSBZrrkz = 8109,
8126
    VPABSBrm128 = 8110,
8127
    VPABSBrm256 = 8111,
8128
    VPABSBrr128 = 8112,
8129
    VPABSBrr256 = 8113,
8130
    VPABSDZ128rm  = 8114,
8131
    VPABSDZ128rmb = 8115,
8132
    VPABSDZ128rmbk  = 8116,
8133
    VPABSDZ128rmbkz = 8117,
8134
    VPABSDZ128rmk = 8118,
8135
    VPABSDZ128rmkz  = 8119,
8136
    VPABSDZ128rr  = 8120,
8137
    VPABSDZ128rrk = 8121,
8138
    VPABSDZ128rrkz  = 8122,
8139
    VPABSDZ256rm  = 8123,
8140
    VPABSDZ256rmb = 8124,
8141
    VPABSDZ256rmbk  = 8125,
8142
    VPABSDZ256rmbkz = 8126,
8143
    VPABSDZ256rmk = 8127,
8144
    VPABSDZ256rmkz  = 8128,
8145
    VPABSDZ256rr  = 8129,
8146
    VPABSDZ256rrk = 8130,
8147
    VPABSDZ256rrkz  = 8131,
8148
    VPABSDZrm = 8132,
8149
    VPABSDZrmb  = 8133,
8150
    VPABSDZrmbk = 8134,
8151
    VPABSDZrmbkz  = 8135,
8152
    VPABSDZrmk  = 8136,
8153
    VPABSDZrmkz = 8137,
8154
    VPABSDZrr = 8138,
8155
    VPABSDZrrk  = 8139,
8156
    VPABSDZrrkz = 8140,
8157
    VPABSDrm128 = 8141,
8158
    VPABSDrm256 = 8142,
8159
    VPABSDrr128 = 8143,
8160
    VPABSDrr256 = 8144,
8161
    VPABSQZ128rm  = 8145,
8162
    VPABSQZ128rmb = 8146,
8163
    VPABSQZ128rmbk  = 8147,
8164
    VPABSQZ128rmbkz = 8148,
8165
    VPABSQZ128rmk = 8149,
8166
    VPABSQZ128rmkz  = 8150,
8167
    VPABSQZ128rr  = 8151,
8168
    VPABSQZ128rrk = 8152,
8169
    VPABSQZ128rrkz  = 8153,
8170
    VPABSQZ256rm  = 8154,
8171
    VPABSQZ256rmb = 8155,
8172
    VPABSQZ256rmbk  = 8156,
8173
    VPABSQZ256rmbkz = 8157,
8174
    VPABSQZ256rmk = 8158,
8175
    VPABSQZ256rmkz  = 8159,
8176
    VPABSQZ256rr  = 8160,
8177
    VPABSQZ256rrk = 8161,
8178
    VPABSQZ256rrkz  = 8162,
8179
    VPABSQZrm = 8163,
8180
    VPABSQZrmb  = 8164,
8181
    VPABSQZrmbk = 8165,
8182
    VPABSQZrmbkz  = 8166,
8183
    VPABSQZrmk  = 8167,
8184
    VPABSQZrmkz = 8168,
8185
    VPABSQZrr = 8169,
8186
    VPABSQZrrk  = 8170,
8187
    VPABSQZrrkz = 8171,
8188
    VPABSWZ128rm  = 8172,
8189
    VPABSWZ128rmk = 8173,
8190
    VPABSWZ128rmkz  = 8174,
8191
    VPABSWZ128rr  = 8175,
8192
    VPABSWZ128rrk = 8176,
8193
    VPABSWZ128rrkz  = 8177,
8194
    VPABSWZ256rm  = 8178,
8195
    VPABSWZ256rmk = 8179,
8196
    VPABSWZ256rmkz  = 8180,
8197
    VPABSWZ256rr  = 8181,
8198
    VPABSWZ256rrk = 8182,
8199
    VPABSWZ256rrkz  = 8183,
8200
    VPABSWZrm = 8184,
8201
    VPABSWZrmk  = 8185,
8202
    VPABSWZrmkz = 8186,
8203
    VPABSWZrr = 8187,
8204
    VPABSWZrrk  = 8188,
8205
    VPABSWZrrkz = 8189,
8206
    VPABSWrm128 = 8190,
8207
    VPABSWrm256 = 8191,
8208
    VPABSWrr128 = 8192,
8209
    VPABSWrr256 = 8193,
8210
    VPACKSSDWYrm  = 8194,
8211
    VPACKSSDWYrr  = 8195,
8212
    VPACKSSDWZ128rm = 8196,
8213
    VPACKSSDWZ128rmb  = 8197,
8214
    VPACKSSDWZ128rmbk = 8198,
8215
    VPACKSSDWZ128rmbkz  = 8199,
8216
    VPACKSSDWZ128rmk  = 8200,
8217
    VPACKSSDWZ128rmkz = 8201,
8218
    VPACKSSDWZ128rr = 8202,
8219
    VPACKSSDWZ128rrk  = 8203,
8220
    VPACKSSDWZ128rrkz = 8204,
8221
    VPACKSSDWZ256rm = 8205,
8222
    VPACKSSDWZ256rmb  = 8206,
8223
    VPACKSSDWZ256rmbk = 8207,
8224
    VPACKSSDWZ256rmbkz  = 8208,
8225
    VPACKSSDWZ256rmk  = 8209,
8226
    VPACKSSDWZ256rmkz = 8210,
8227
    VPACKSSDWZ256rr = 8211,
8228
    VPACKSSDWZ256rrk  = 8212,
8229
    VPACKSSDWZ256rrkz = 8213,
8230
    VPACKSSDWZrm  = 8214,
8231
    VPACKSSDWZrmb = 8215,
8232
    VPACKSSDWZrmbk  = 8216,
8233
    VPACKSSDWZrmbkz = 8217,
8234
    VPACKSSDWZrmk = 8218,
8235
    VPACKSSDWZrmkz  = 8219,
8236
    VPACKSSDWZrr  = 8220,
8237
    VPACKSSDWZrrk = 8221,
8238
    VPACKSSDWZrrkz  = 8222,
8239
    VPACKSSDWrm = 8223,
8240
    VPACKSSDWrr = 8224,
8241
    VPACKSSWBYrm  = 8225,
8242
    VPACKSSWBYrr  = 8226,
8243
    VPACKSSWBZ128rm = 8227,
8244
    VPACKSSWBZ128rmk  = 8228,
8245
    VPACKSSWBZ128rmkz = 8229,
8246
    VPACKSSWBZ128rr = 8230,
8247
    VPACKSSWBZ128rrk  = 8231,
8248
    VPACKSSWBZ128rrkz = 8232,
8249
    VPACKSSWBZ256rm = 8233,
8250
    VPACKSSWBZ256rmk  = 8234,
8251
    VPACKSSWBZ256rmkz = 8235,
8252
    VPACKSSWBZ256rr = 8236,
8253
    VPACKSSWBZ256rrk  = 8237,
8254
    VPACKSSWBZ256rrkz = 8238,
8255
    VPACKSSWBZrm  = 8239,
8256
    VPACKSSWBZrmk = 8240,
8257
    VPACKSSWBZrmkz  = 8241,
8258
    VPACKSSWBZrr  = 8242,
8259
    VPACKSSWBZrrk = 8243,
8260
    VPACKSSWBZrrkz  = 8244,
8261
    VPACKSSWBrm = 8245,
8262
    VPACKSSWBrr = 8246,
8263
    VPACKUSDWYrm  = 8247,
8264
    VPACKUSDWYrr  = 8248,
8265
    VPACKUSDWZ128rm = 8249,
8266
    VPACKUSDWZ128rmb  = 8250,
8267
    VPACKUSDWZ128rmbk = 8251,
8268
    VPACKUSDWZ128rmbkz  = 8252,
8269
    VPACKUSDWZ128rmk  = 8253,
8270
    VPACKUSDWZ128rmkz = 8254,
8271
    VPACKUSDWZ128rr = 8255,
8272
    VPACKUSDWZ128rrk  = 8256,
8273
    VPACKUSDWZ128rrkz = 8257,
8274
    VPACKUSDWZ256rm = 8258,
8275
    VPACKUSDWZ256rmb  = 8259,
8276
    VPACKUSDWZ256rmbk = 8260,
8277
    VPACKUSDWZ256rmbkz  = 8261,
8278
    VPACKUSDWZ256rmk  = 8262,
8279
    VPACKUSDWZ256rmkz = 8263,
8280
    VPACKUSDWZ256rr = 8264,
8281
    VPACKUSDWZ256rrk  = 8265,
8282
    VPACKUSDWZ256rrkz = 8266,
8283
    VPACKUSDWZrm  = 8267,
8284
    VPACKUSDWZrmb = 8268,
8285
    VPACKUSDWZrmbk  = 8269,
8286
    VPACKUSDWZrmbkz = 8270,
8287
    VPACKUSDWZrmk = 8271,
8288
    VPACKUSDWZrmkz  = 8272,
8289
    VPACKUSDWZrr  = 8273,
8290
    VPACKUSDWZrrk = 8274,
8291
    VPACKUSDWZrrkz  = 8275,
8292
    VPACKUSDWrm = 8276,
8293
    VPACKUSDWrr = 8277,
8294
    VPACKUSWBYrm  = 8278,
8295
    VPACKUSWBYrr  = 8279,
8296
    VPACKUSWBZ128rm = 8280,
8297
    VPACKUSWBZ128rmk  = 8281,
8298
    VPACKUSWBZ128rmkz = 8282,
8299
    VPACKUSWBZ128rr = 8283,
8300
    VPACKUSWBZ128rrk  = 8284,
8301
    VPACKUSWBZ128rrkz = 8285,
8302
    VPACKUSWBZ256rm = 8286,
8303
    VPACKUSWBZ256rmk  = 8287,
8304
    VPACKUSWBZ256rmkz = 8288,
8305
    VPACKUSWBZ256rr = 8289,
8306
    VPACKUSWBZ256rrk  = 8290,
8307
    VPACKUSWBZ256rrkz = 8291,
8308
    VPACKUSWBZrm  = 8292,
8309
    VPACKUSWBZrmk = 8293,
8310
    VPACKUSWBZrmkz  = 8294,
8311
    VPACKUSWBZrr  = 8295,
8312
    VPACKUSWBZrrk = 8296,
8313
    VPACKUSWBZrrkz  = 8297,
8314
    VPACKUSWBrm = 8298,
8315
    VPACKUSWBrr = 8299,
8316
    VPADDBYrm = 8300,
8317
    VPADDBYrr = 8301,
8318
    VPADDBZ128rm  = 8302,
8319
    VPADDBZ128rmk = 8303,
8320
    VPADDBZ128rmkz  = 8304,
8321
    VPADDBZ128rr  = 8305,
8322
    VPADDBZ128rrk = 8306,
8323
    VPADDBZ128rrkz  = 8307,
8324
    VPADDBZ256rm  = 8308,
8325
    VPADDBZ256rmk = 8309,
8326
    VPADDBZ256rmkz  = 8310,
8327
    VPADDBZ256rr  = 8311,
8328
    VPADDBZ256rrk = 8312,
8329
    VPADDBZ256rrkz  = 8313,
8330
    VPADDBZrm = 8314,
8331
    VPADDBZrmk  = 8315,
8332
    VPADDBZrmkz = 8316,
8333
    VPADDBZrr = 8317,
8334
    VPADDBZrrk  = 8318,
8335
    VPADDBZrrkz = 8319,
8336
    VPADDBrm  = 8320,
8337
    VPADDBrr  = 8321,
8338
    VPADDDYrm = 8322,
8339
    VPADDDYrr = 8323,
8340
    VPADDDZ128rm  = 8324,
8341
    VPADDDZ128rmb = 8325,
8342
    VPADDDZ128rmbk  = 8326,
8343
    VPADDDZ128rmbkz = 8327,
8344
    VPADDDZ128rmk = 8328,
8345
    VPADDDZ128rmkz  = 8329,
8346
    VPADDDZ128rr  = 8330,
8347
    VPADDDZ128rrk = 8331,
8348
    VPADDDZ128rrkz  = 8332,
8349
    VPADDDZ256rm  = 8333,
8350
    VPADDDZ256rmb = 8334,
8351
    VPADDDZ256rmbk  = 8335,
8352
    VPADDDZ256rmbkz = 8336,
8353
    VPADDDZ256rmk = 8337,
8354
    VPADDDZ256rmkz  = 8338,
8355
    VPADDDZ256rr  = 8339,
8356
    VPADDDZ256rrk = 8340,
8357
    VPADDDZ256rrkz  = 8341,
8358
    VPADDDZrm = 8342,
8359
    VPADDDZrmb  = 8343,
8360
    VPADDDZrmbk = 8344,
8361
    VPADDDZrmbkz  = 8345,
8362
    VPADDDZrmk  = 8346,
8363
    VPADDDZrmkz = 8347,
8364
    VPADDDZrr = 8348,
8365
    VPADDDZrrk  = 8349,
8366
    VPADDDZrrkz = 8350,
8367
    VPADDDrm  = 8351,
8368
    VPADDDrr  = 8352,
8369
    VPADDQYrm = 8353,
8370
    VPADDQYrr = 8354,
8371
    VPADDQZ128rm  = 8355,
8372
    VPADDQZ128rmb = 8356,
8373
    VPADDQZ128rmbk  = 8357,
8374
    VPADDQZ128rmbkz = 8358,
8375
    VPADDQZ128rmk = 8359,
8376
    VPADDQZ128rmkz  = 8360,
8377
    VPADDQZ128rr  = 8361,
8378
    VPADDQZ128rrk = 8362,
8379
    VPADDQZ128rrkz  = 8363,
8380
    VPADDQZ256rm  = 8364,
8381
    VPADDQZ256rmb = 8365,
8382
    VPADDQZ256rmbk  = 8366,
8383
    VPADDQZ256rmbkz = 8367,
8384
    VPADDQZ256rmk = 8368,
8385
    VPADDQZ256rmkz  = 8369,
8386
    VPADDQZ256rr  = 8370,
8387
    VPADDQZ256rrk = 8371,
8388
    VPADDQZ256rrkz  = 8372,
8389
    VPADDQZrm = 8373,
8390
    VPADDQZrmb  = 8374,
8391
    VPADDQZrmbk = 8375,
8392
    VPADDQZrmbkz  = 8376,
8393
    VPADDQZrmk  = 8377,
8394
    VPADDQZrmkz = 8378,
8395
    VPADDQZrr = 8379,
8396
    VPADDQZrrk  = 8380,
8397
    VPADDQZrrkz = 8381,
8398
    VPADDQrm  = 8382,
8399
    VPADDQrr  = 8383,
8400
    VPADDSBYrm  = 8384,
8401
    VPADDSBYrr  = 8385,
8402
    VPADDSBZ128rm = 8386,
8403
    VPADDSBZ128rmk  = 8387,
8404
    VPADDSBZ128rmkz = 8388,
8405
    VPADDSBZ128rr = 8389,
8406
    VPADDSBZ128rrk  = 8390,
8407
    VPADDSBZ128rrkz = 8391,
8408
    VPADDSBZ256rm = 8392,
8409
    VPADDSBZ256rmk  = 8393,
8410
    VPADDSBZ256rmkz = 8394,
8411
    VPADDSBZ256rr = 8395,
8412
    VPADDSBZ256rrk  = 8396,
8413
    VPADDSBZ256rrkz = 8397,
8414
    VPADDSBZrm  = 8398,
8415
    VPADDSBZrmk = 8399,
8416
    VPADDSBZrmkz  = 8400,
8417
    VPADDSBZrr  = 8401,
8418
    VPADDSBZrrk = 8402,
8419
    VPADDSBZrrkz  = 8403,
8420
    VPADDSBrm = 8404,
8421
    VPADDSBrr = 8405,
8422
    VPADDSWYrm  = 8406,
8423
    VPADDSWYrr  = 8407,
8424
    VPADDSWZ128rm = 8408,
8425
    VPADDSWZ128rmk  = 8409,
8426
    VPADDSWZ128rmkz = 8410,
8427
    VPADDSWZ128rr = 8411,
8428
    VPADDSWZ128rrk  = 8412,
8429
    VPADDSWZ128rrkz = 8413,
8430
    VPADDSWZ256rm = 8414,
8431
    VPADDSWZ256rmk  = 8415,
8432
    VPADDSWZ256rmkz = 8416,
8433
    VPADDSWZ256rr = 8417,
8434
    VPADDSWZ256rrk  = 8418,
8435
    VPADDSWZ256rrkz = 8419,
8436
    VPADDSWZrm  = 8420,
8437
    VPADDSWZrmk = 8421,
8438
    VPADDSWZrmkz  = 8422,
8439
    VPADDSWZrr  = 8423,
8440
    VPADDSWZrrk = 8424,
8441
    VPADDSWZrrkz  = 8425,
8442
    VPADDSWrm = 8426,
8443
    VPADDSWrr = 8427,
8444
    VPADDUSBYrm = 8428,
8445
    VPADDUSBYrr = 8429,
8446
    VPADDUSBZ128rm  = 8430,
8447
    VPADDUSBZ128rmk = 8431,
8448
    VPADDUSBZ128rmkz  = 8432,
8449
    VPADDUSBZ128rr  = 8433,
8450
    VPADDUSBZ128rrk = 8434,
8451
    VPADDUSBZ128rrkz  = 8435,
8452
    VPADDUSBZ256rm  = 8436,
8453
    VPADDUSBZ256rmk = 8437,
8454
    VPADDUSBZ256rmkz  = 8438,
8455
    VPADDUSBZ256rr  = 8439,
8456
    VPADDUSBZ256rrk = 8440,
8457
    VPADDUSBZ256rrkz  = 8441,
8458
    VPADDUSBZrm = 8442,
8459
    VPADDUSBZrmk  = 8443,
8460
    VPADDUSBZrmkz = 8444,
8461
    VPADDUSBZrr = 8445,
8462
    VPADDUSBZrrk  = 8446,
8463
    VPADDUSBZrrkz = 8447,
8464
    VPADDUSBrm  = 8448,
8465
    VPADDUSBrr  = 8449,
8466
    VPADDUSWYrm = 8450,
8467
    VPADDUSWYrr = 8451,
8468
    VPADDUSWZ128rm  = 8452,
8469
    VPADDUSWZ128rmk = 8453,
8470
    VPADDUSWZ128rmkz  = 8454,
8471
    VPADDUSWZ128rr  = 8455,
8472
    VPADDUSWZ128rrk = 8456,
8473
    VPADDUSWZ128rrkz  = 8457,
8474
    VPADDUSWZ256rm  = 8458,
8475
    VPADDUSWZ256rmk = 8459,
8476
    VPADDUSWZ256rmkz  = 8460,
8477
    VPADDUSWZ256rr  = 8461,
8478
    VPADDUSWZ256rrk = 8462,
8479
    VPADDUSWZ256rrkz  = 8463,
8480
    VPADDUSWZrm = 8464,
8481
    VPADDUSWZrmk  = 8465,
8482
    VPADDUSWZrmkz = 8466,
8483
    VPADDUSWZrr = 8467,
8484
    VPADDUSWZrrk  = 8468,
8485
    VPADDUSWZrrkz = 8469,
8486
    VPADDUSWrm  = 8470,
8487
    VPADDUSWrr  = 8471,
8488
    VPADDWYrm = 8472,
8489
    VPADDWYrr = 8473,
8490
    VPADDWZ128rm  = 8474,
8491
    VPADDWZ128rmk = 8475,
8492
    VPADDWZ128rmkz  = 8476,
8493
    VPADDWZ128rr  = 8477,
8494
    VPADDWZ128rrk = 8478,
8495
    VPADDWZ128rrkz  = 8479,
8496
    VPADDWZ256rm  = 8480,
8497
    VPADDWZ256rmk = 8481,
8498
    VPADDWZ256rmkz  = 8482,
8499
    VPADDWZ256rr  = 8483,
8500
    VPADDWZ256rrk = 8484,
8501
    VPADDWZ256rrkz  = 8485,
8502
    VPADDWZrm = 8486,
8503
    VPADDWZrmk  = 8487,
8504
    VPADDWZrmkz = 8488,
8505
    VPADDWZrr = 8489,
8506
    VPADDWZrrk  = 8490,
8507
    VPADDWZrrkz = 8491,
8508
    VPADDWrm  = 8492,
8509
    VPADDWrr  = 8493,
8510
    VPALIGNR128rm = 8494,
8511
    VPALIGNR128rr = 8495,
8512
    VPALIGNR256rm = 8496,
8513
    VPALIGNR256rr = 8497,
8514
    VPALIGNZ128rmi  = 8498,
8515
    VPALIGNZ128rmik = 8499,
8516
    VPALIGNZ128rmikz  = 8500,
8517
    VPALIGNZ128rri  = 8501,
8518
    VPALIGNZ128rrik = 8502,
8519
    VPALIGNZ128rrikz  = 8503,
8520
    VPALIGNZ256rmi  = 8504,
8521
    VPALIGNZ256rmik = 8505,
8522
    VPALIGNZ256rmikz  = 8506,
8523
    VPALIGNZ256rri  = 8507,
8524
    VPALIGNZ256rrik = 8508,
8525
    VPALIGNZ256rrikz  = 8509,
8526
    VPALIGNZrmi = 8510,
8527
    VPALIGNZrmik  = 8511,
8528
    VPALIGNZrmikz = 8512,
8529
    VPALIGNZrri = 8513,
8530
    VPALIGNZrrik  = 8514,
8531
    VPALIGNZrrikz = 8515,
8532
    VPANDDZ128rm  = 8516,
8533
    VPANDDZ128rmb = 8517,
8534
    VPANDDZ128rmbk  = 8518,
8535
    VPANDDZ128rmbkz = 8519,
8536
    VPANDDZ128rmk = 8520,
8537
    VPANDDZ128rmkz  = 8521,
8538
    VPANDDZ128rr  = 8522,
8539
    VPANDDZ128rrk = 8523,
8540
    VPANDDZ128rrkz  = 8524,
8541
    VPANDDZ256rm  = 8525,
8542
    VPANDDZ256rmb = 8526,
8543
    VPANDDZ256rmbk  = 8527,
8544
    VPANDDZ256rmbkz = 8528,
8545
    VPANDDZ256rmk = 8529,
8546
    VPANDDZ256rmkz  = 8530,
8547
    VPANDDZ256rr  = 8531,
8548
    VPANDDZ256rrk = 8532,
8549
    VPANDDZ256rrkz  = 8533,
8550
    VPANDDZrm = 8534,
8551
    VPANDDZrmb  = 8535,
8552
    VPANDDZrmbk = 8536,
8553
    VPANDDZrmbkz  = 8537,
8554
    VPANDDZrmk  = 8538,
8555
    VPANDDZrmkz = 8539,
8556
    VPANDDZrr = 8540,
8557
    VPANDDZrrk  = 8541,
8558
    VPANDDZrrkz = 8542,
8559
    VPANDNDZ128rm = 8543,
8560
    VPANDNDZ128rmb  = 8544,
8561
    VPANDNDZ128rmbk = 8545,
8562
    VPANDNDZ128rmbkz  = 8546,
8563
    VPANDNDZ128rmk  = 8547,
8564
    VPANDNDZ128rmkz = 8548,
8565
    VPANDNDZ128rr = 8549,
8566
    VPANDNDZ128rrk  = 8550,
8567
    VPANDNDZ128rrkz = 8551,
8568
    VPANDNDZ256rm = 8552,
8569
    VPANDNDZ256rmb  = 8553,
8570
    VPANDNDZ256rmbk = 8554,
8571
    VPANDNDZ256rmbkz  = 8555,
8572
    VPANDNDZ256rmk  = 8556,
8573
    VPANDNDZ256rmkz = 8557,
8574
    VPANDNDZ256rr = 8558,
8575
    VPANDNDZ256rrk  = 8559,
8576
    VPANDNDZ256rrkz = 8560,
8577
    VPANDNDZrm  = 8561,
8578
    VPANDNDZrmb = 8562,
8579
    VPANDNDZrmbk  = 8563,
8580
    VPANDNDZrmbkz = 8564,
8581
    VPANDNDZrmk = 8565,
8582
    VPANDNDZrmkz  = 8566,
8583
    VPANDNDZrr  = 8567,
8584
    VPANDNDZrrk = 8568,
8585
    VPANDNDZrrkz  = 8569,
8586
    VPANDNQZ128rm = 8570,
8587
    VPANDNQZ128rmb  = 8571,
8588
    VPANDNQZ128rmbk = 8572,
8589
    VPANDNQZ128rmbkz  = 8573,
8590
    VPANDNQZ128rmk  = 8574,
8591
    VPANDNQZ128rmkz = 8575,
8592
    VPANDNQZ128rr = 8576,
8593
    VPANDNQZ128rrk  = 8577,
8594
    VPANDNQZ128rrkz = 8578,
8595
    VPANDNQZ256rm = 8579,
8596
    VPANDNQZ256rmb  = 8580,
8597
    VPANDNQZ256rmbk = 8581,
8598
    VPANDNQZ256rmbkz  = 8582,
8599
    VPANDNQZ256rmk  = 8583,
8600
    VPANDNQZ256rmkz = 8584,
8601
    VPANDNQZ256rr = 8585,
8602
    VPANDNQZ256rrk  = 8586,
8603
    VPANDNQZ256rrkz = 8587,
8604
    VPANDNQZrm  = 8588,
8605
    VPANDNQZrmb = 8589,
8606
    VPANDNQZrmbk  = 8590,
8607
    VPANDNQZrmbkz = 8591,
8608
    VPANDNQZrmk = 8592,
8609
    VPANDNQZrmkz  = 8593,
8610
    VPANDNQZrr  = 8594,
8611
    VPANDNQZrrk = 8595,
8612
    VPANDNQZrrkz  = 8596,
8613
    VPANDNYrm = 8597,
8614
    VPANDNYrr = 8598,
8615
    VPANDNrm  = 8599,
8616
    VPANDNrr  = 8600,
8617
    VPANDQZ128rm  = 8601,
8618
    VPANDQZ128rmb = 8602,
8619
    VPANDQZ128rmbk  = 8603,
8620
    VPANDQZ128rmbkz = 8604,
8621
    VPANDQZ128rmk = 8605,
8622
    VPANDQZ128rmkz  = 8606,
8623
    VPANDQZ128rr  = 8607,
8624
    VPANDQZ128rrk = 8608,
8625
    VPANDQZ128rrkz  = 8609,
8626
    VPANDQZ256rm  = 8610,
8627
    VPANDQZ256rmb = 8611,
8628
    VPANDQZ256rmbk  = 8612,
8629
    VPANDQZ256rmbkz = 8613,
8630
    VPANDQZ256rmk = 8614,
8631
    VPANDQZ256rmkz  = 8615,
8632
    VPANDQZ256rr  = 8616,
8633
    VPANDQZ256rrk = 8617,
8634
    VPANDQZ256rrkz  = 8618,
8635
    VPANDQZrm = 8619,
8636
    VPANDQZrmb  = 8620,
8637
    VPANDQZrmbk = 8621,
8638
    VPANDQZrmbkz  = 8622,
8639
    VPANDQZrmk  = 8623,
8640
    VPANDQZrmkz = 8624,
8641
    VPANDQZrr = 8625,
8642
    VPANDQZrrk  = 8626,
8643
    VPANDQZrrkz = 8627,
8644
    VPANDYrm  = 8628,
8645
    VPANDYrr  = 8629,
8646
    VPANDrm = 8630,
8647
    VPANDrr = 8631,
8648
    VPAVGBYrm = 8632,
8649
    VPAVGBYrr = 8633,
8650
    VPAVGBZ128rm  = 8634,
8651
    VPAVGBZ128rmk = 8635,
8652
    VPAVGBZ128rmkz  = 8636,
8653
    VPAVGBZ128rr  = 8637,
8654
    VPAVGBZ128rrk = 8638,
8655
    VPAVGBZ128rrkz  = 8639,
8656
    VPAVGBZ256rm  = 8640,
8657
    VPAVGBZ256rmk = 8641,
8658
    VPAVGBZ256rmkz  = 8642,
8659
    VPAVGBZ256rr  = 8643,
8660
    VPAVGBZ256rrk = 8644,
8661
    VPAVGBZ256rrkz  = 8645,
8662
    VPAVGBZrm = 8646,
8663
    VPAVGBZrmk  = 8647,
8664
    VPAVGBZrmkz = 8648,
8665
    VPAVGBZrr = 8649,
8666
    VPAVGBZrrk  = 8650,
8667
    VPAVGBZrrkz = 8651,
8668
    VPAVGBrm  = 8652,
8669
    VPAVGBrr  = 8653,
8670
    VPAVGWYrm = 8654,
8671
    VPAVGWYrr = 8655,
8672
    VPAVGWZ128rm  = 8656,
8673
    VPAVGWZ128rmk = 8657,
8674
    VPAVGWZ128rmkz  = 8658,
8675
    VPAVGWZ128rr  = 8659,
8676
    VPAVGWZ128rrk = 8660,
8677
    VPAVGWZ128rrkz  = 8661,
8678
    VPAVGWZ256rm  = 8662,
8679
    VPAVGWZ256rmk = 8663,
8680
    VPAVGWZ256rmkz  = 8664,
8681
    VPAVGWZ256rr  = 8665,
8682
    VPAVGWZ256rrk = 8666,
8683
    VPAVGWZ256rrkz  = 8667,
8684
    VPAVGWZrm = 8668,
8685
    VPAVGWZrmk  = 8669,
8686
    VPAVGWZrmkz = 8670,
8687
    VPAVGWZrr = 8671,
8688
    VPAVGWZrrk  = 8672,
8689
    VPAVGWZrrkz = 8673,
8690
    VPAVGWrm  = 8674,
8691
    VPAVGWrr  = 8675,
8692
    VPBLENDDYrmi  = 8676,
8693
    VPBLENDDYrri  = 8677,
8694
    VPBLENDDrmi = 8678,
8695
    VPBLENDDrri = 8679,
8696
    VPBLENDMBZ128rm = 8680,
8697
    VPBLENDMBZ128rmk  = 8681,
8698
    VPBLENDMBZ128rmkz = 8682,
8699
    VPBLENDMBZ128rr = 8683,
8700
    VPBLENDMBZ128rrk  = 8684,
8701
    VPBLENDMBZ128rrkz = 8685,
8702
    VPBLENDMBZ256rm = 8686,
8703
    VPBLENDMBZ256rmk  = 8687,
8704
    VPBLENDMBZ256rmkz = 8688,
8705
    VPBLENDMBZ256rr = 8689,
8706
    VPBLENDMBZ256rrk  = 8690,
8707
    VPBLENDMBZ256rrkz = 8691,
8708
    VPBLENDMBZrm  = 8692,
8709
    VPBLENDMBZrmk = 8693,
8710
    VPBLENDMBZrmkz  = 8694,
8711
    VPBLENDMBZrr  = 8695,
8712
    VPBLENDMBZrrk = 8696,
8713
    VPBLENDMBZrrkz  = 8697,
8714
    VPBLENDMDZ128rm = 8698,
8715
    VPBLENDMDZ128rmb  = 8699,
8716
    VPBLENDMDZ128rmbk = 8700,
8717
    VPBLENDMDZ128rmk  = 8701,
8718
    VPBLENDMDZ128rmkz = 8702,
8719
    VPBLENDMDZ128rr = 8703,
8720
    VPBLENDMDZ128rrk  = 8704,
8721
    VPBLENDMDZ128rrkz = 8705,
8722
    VPBLENDMDZ256rm = 8706,
8723
    VPBLENDMDZ256rmb  = 8707,
8724
    VPBLENDMDZ256rmbk = 8708,
8725
    VPBLENDMDZ256rmk  = 8709,
8726
    VPBLENDMDZ256rmkz = 8710,
8727
    VPBLENDMDZ256rr = 8711,
8728
    VPBLENDMDZ256rrk  = 8712,
8729
    VPBLENDMDZ256rrkz = 8713,
8730
    VPBLENDMDZrm  = 8714,
8731
    VPBLENDMDZrmb = 8715,
8732
    VPBLENDMDZrmbk  = 8716,
8733
    VPBLENDMDZrmk = 8717,
8734
    VPBLENDMDZrmkz  = 8718,
8735
    VPBLENDMDZrr  = 8719,
8736
    VPBLENDMDZrrk = 8720,
8737
    VPBLENDMDZrrkz  = 8721,
8738
    VPBLENDMQZ128rm = 8722,
8739
    VPBLENDMQZ128rmb  = 8723,
8740
    VPBLENDMQZ128rmbk = 8724,
8741
    VPBLENDMQZ128rmk  = 8725,
8742
    VPBLENDMQZ128rmkz = 8726,
8743
    VPBLENDMQZ128rr = 8727,
8744
    VPBLENDMQZ128rrk  = 8728,
8745
    VPBLENDMQZ128rrkz = 8729,
8746
    VPBLENDMQZ256rm = 8730,
8747
    VPBLENDMQZ256rmb  = 8731,
8748
    VPBLENDMQZ256rmbk = 8732,
8749
    VPBLENDMQZ256rmk  = 8733,
8750
    VPBLENDMQZ256rmkz = 8734,
8751
    VPBLENDMQZ256rr = 8735,
8752
    VPBLENDMQZ256rrk  = 8736,
8753
    VPBLENDMQZ256rrkz = 8737,
8754
    VPBLENDMQZrm  = 8738,
8755
    VPBLENDMQZrmb = 8739,
8756
    VPBLENDMQZrmbk  = 8740,
8757
    VPBLENDMQZrmk = 8741,
8758
    VPBLENDMQZrmkz  = 8742,
8759
    VPBLENDMQZrr  = 8743,
8760
    VPBLENDMQZrrk = 8744,
8761
    VPBLENDMQZrrkz  = 8745,
8762
    VPBLENDMWZ128rm = 8746,
8763
    VPBLENDMWZ128rmk  = 8747,
8764
    VPBLENDMWZ128rmkz = 8748,
8765
    VPBLENDMWZ128rr = 8749,
8766
    VPBLENDMWZ128rrk  = 8750,
8767
    VPBLENDMWZ128rrkz = 8751,
8768
    VPBLENDMWZ256rm = 8752,
8769
    VPBLENDMWZ256rmk  = 8753,
8770
    VPBLENDMWZ256rmkz = 8754,
8771
    VPBLENDMWZ256rr = 8755,
8772
    VPBLENDMWZ256rrk  = 8756,
8773
    VPBLENDMWZ256rrkz = 8757,
8774
    VPBLENDMWZrm  = 8758,
8775
    VPBLENDMWZrmk = 8759,
8776
    VPBLENDMWZrmkz  = 8760,
8777
    VPBLENDMWZrr  = 8761,
8778
    VPBLENDMWZrrk = 8762,
8779
    VPBLENDMWZrrkz  = 8763,
8780
    VPBLENDVBYrm  = 8764,
8781
    VPBLENDVBYrr  = 8765,
8782
    VPBLENDVBrm = 8766,
8783
    VPBLENDVBrr = 8767,
8784
    VPBLENDWYrmi  = 8768,
8785
    VPBLENDWYrri  = 8769,
8786
    VPBLENDWrmi = 8770,
8787
    VPBLENDWrri = 8771,
8788
    VPBROADCASTBYrm = 8772,
8789
    VPBROADCASTBYrr = 8773,
8790
    VPBROADCASTBZ128m = 8774,
8791
    VPBROADCASTBZ128mk  = 8775,
8792
    VPBROADCASTBZ128mkz = 8776,
8793
    VPBROADCASTBZ128r = 8777,
8794
    VPBROADCASTBZ128rk  = 8778,
8795
    VPBROADCASTBZ128rkz = 8779,
8796
    VPBROADCASTBZ256m = 8780,
8797
    VPBROADCASTBZ256mk  = 8781,
8798
    VPBROADCASTBZ256mkz = 8782,
8799
    VPBROADCASTBZ256r = 8783,
8800
    VPBROADCASTBZ256rk  = 8784,
8801
    VPBROADCASTBZ256rkz = 8785,
8802
    VPBROADCASTBZm  = 8786,
8803
    VPBROADCASTBZmk = 8787,
8804
    VPBROADCASTBZmkz  = 8788,
8805
    VPBROADCASTBZr  = 8789,
8806
    VPBROADCASTBZrk = 8790,
8807
    VPBROADCASTBZrkz  = 8791,
8808
    VPBROADCASTBrZ128r  = 8792,
8809
    VPBROADCASTBrZ128rk = 8793,
8810
    VPBROADCASTBrZ128rkz  = 8794,
8811
    VPBROADCASTBrZ256r  = 8795,
8812
    VPBROADCASTBrZ256rk = 8796,
8813
    VPBROADCASTBrZ256rkz  = 8797,
8814
    VPBROADCASTBrZr = 8798,
8815
    VPBROADCASTBrZrk  = 8799,
8816
    VPBROADCASTBrZrkz = 8800,
8817
    VPBROADCASTBrm  = 8801,
8818
    VPBROADCASTBrr  = 8802,
8819
    VPBROADCASTDYrm = 8803,
8820
    VPBROADCASTDYrr = 8804,
8821
    VPBROADCASTDZ128m = 8805,
8822
    VPBROADCASTDZ128mk  = 8806,
8823
    VPBROADCASTDZ128mkz = 8807,
8824
    VPBROADCASTDZ128r = 8808,
8825
    VPBROADCASTDZ128rk  = 8809,
8826
    VPBROADCASTDZ128rkz = 8810,
8827
    VPBROADCASTDZ256m = 8811,
8828
    VPBROADCASTDZ256mk  = 8812,
8829
    VPBROADCASTDZ256mkz = 8813,
8830
    VPBROADCASTDZ256r = 8814,
8831
    VPBROADCASTDZ256rk  = 8815,
8832
    VPBROADCASTDZ256rkz = 8816,
8833
    VPBROADCASTDZm  = 8817,
8834
    VPBROADCASTDZmk = 8818,
8835
    VPBROADCASTDZmkz  = 8819,
8836
    VPBROADCASTDZr  = 8820,
8837
    VPBROADCASTDZrk = 8821,
8838
    VPBROADCASTDZrkz  = 8822,
8839
    VPBROADCASTDrZ128r  = 8823,
8840
    VPBROADCASTDrZ128rk = 8824,
8841
    VPBROADCASTDrZ128rkz  = 8825,
8842
    VPBROADCASTDrZ256r  = 8826,
8843
    VPBROADCASTDrZ256rk = 8827,
8844
    VPBROADCASTDrZ256rkz  = 8828,
8845
    VPBROADCASTDrZr = 8829,
8846
    VPBROADCASTDrZrk  = 8830,
8847
    VPBROADCASTDrZrkz = 8831,
8848
    VPBROADCASTDrm  = 8832,
8849
    VPBROADCASTDrr  = 8833,
8850
    VPBROADCASTF32X2Z256m = 8834,
8851
    VPBROADCASTF32X2Z256mk  = 8835,
8852
    VPBROADCASTF32X2Z256mkz = 8836,
8853
    VPBROADCASTF32X2Z256r = 8837,
8854
    VPBROADCASTF32X2Z256rk  = 8838,
8855
    VPBROADCASTF32X2Z256rkz = 8839,
8856
    VPBROADCASTF32X2Zm  = 8840,
8857
    VPBROADCASTF32X2Zmk = 8841,
8858
    VPBROADCASTF32X2Zmkz  = 8842,
8859
    VPBROADCASTF32X2Zr  = 8843,
8860
    VPBROADCASTF32X2Zrk = 8844,
8861
    VPBROADCASTF32X2Zrkz  = 8845,
8862
    VPBROADCASTI32X2Z128m = 8846,
8863
    VPBROADCASTI32X2Z128mk  = 8847,
8864
    VPBROADCASTI32X2Z128mkz = 8848,
8865
    VPBROADCASTI32X2Z128r = 8849,
8866
    VPBROADCASTI32X2Z128rk  = 8850,
8867
    VPBROADCASTI32X2Z128rkz = 8851,
8868
    VPBROADCASTI32X2Z256m = 8852,
8869
    VPBROADCASTI32X2Z256mk  = 8853,
8870
    VPBROADCASTI32X2Z256mkz = 8854,
8871
    VPBROADCASTI32X2Z256r = 8855,
8872
    VPBROADCASTI32X2Z256rk  = 8856,
8873
    VPBROADCASTI32X2Z256rkz = 8857,
8874
    VPBROADCASTI32X2Zm  = 8858,
8875
    VPBROADCASTI32X2Zmk = 8859,
8876
    VPBROADCASTI32X2Zmkz  = 8860,
8877
    VPBROADCASTI32X2Zr  = 8861,
8878
    VPBROADCASTI32X2Zrk = 8862,
8879
    VPBROADCASTI32X2Zrkz  = 8863,
8880
    VPBROADCASTMB2QZ128rr = 8864,
8881
    VPBROADCASTMB2QZ256rr = 8865,
8882
    VPBROADCASTMB2QZrr  = 8866,
8883
    VPBROADCASTMW2DZ128rr = 8867,
8884
    VPBROADCASTMW2DZ256rr = 8868,
8885
    VPBROADCASTMW2DZrr  = 8869,
8886
    VPBROADCASTQYrm = 8870,
8887
    VPBROADCASTQYrr = 8871,
8888
    VPBROADCASTQZ128m = 8872,
8889
    VPBROADCASTQZ128mk  = 8873,
8890
    VPBROADCASTQZ128mkz = 8874,
8891
    VPBROADCASTQZ128r = 8875,
8892
    VPBROADCASTQZ128rk  = 8876,
8893
    VPBROADCASTQZ128rkz = 8877,
8894
    VPBROADCASTQZ256m = 8878,
8895
    VPBROADCASTQZ256mk  = 8879,
8896
    VPBROADCASTQZ256mkz = 8880,
8897
    VPBROADCASTQZ256r = 8881,
8898
    VPBROADCASTQZ256rk  = 8882,
8899
    VPBROADCASTQZ256rkz = 8883,
8900
    VPBROADCASTQZm  = 8884,
8901
    VPBROADCASTQZmk = 8885,
8902
    VPBROADCASTQZmkz  = 8886,
8903
    VPBROADCASTQZr  = 8887,
8904
    VPBROADCASTQZrk = 8888,
8905
    VPBROADCASTQZrkz  = 8889,
8906
    VPBROADCASTQrZ128r  = 8890,
8907
    VPBROADCASTQrZ128rk = 8891,
8908
    VPBROADCASTQrZ128rkz  = 8892,
8909
    VPBROADCASTQrZ256r  = 8893,
8910
    VPBROADCASTQrZ256rk = 8894,
8911
    VPBROADCASTQrZ256rkz  = 8895,
8912
    VPBROADCASTQrZr = 8896,
8913
    VPBROADCASTQrZrk  = 8897,
8914
    VPBROADCASTQrZrkz = 8898,
8915
    VPBROADCASTQrm  = 8899,
8916
    VPBROADCASTQrr  = 8900,
8917
    VPBROADCASTWYrm = 8901,
8918
    VPBROADCASTWYrr = 8902,
8919
    VPBROADCASTWZ128m = 8903,
8920
    VPBROADCASTWZ128mk  = 8904,
8921
    VPBROADCASTWZ128mkz = 8905,
8922
    VPBROADCASTWZ128r = 8906,
8923
    VPBROADCASTWZ128rk  = 8907,
8924
    VPBROADCASTWZ128rkz = 8908,
8925
    VPBROADCASTWZ256m = 8909,
8926
    VPBROADCASTWZ256mk  = 8910,
8927
    VPBROADCASTWZ256mkz = 8911,
8928
    VPBROADCASTWZ256r = 8912,
8929
    VPBROADCASTWZ256rk  = 8913,
8930
    VPBROADCASTWZ256rkz = 8914,
8931
    VPBROADCASTWZm  = 8915,
8932
    VPBROADCASTWZmk = 8916,
8933
    VPBROADCASTWZmkz  = 8917,
8934
    VPBROADCASTWZr  = 8918,
8935
    VPBROADCASTWZrk = 8919,
8936
    VPBROADCASTWZrkz  = 8920,
8937
    VPBROADCASTWrZ128r  = 8921,
8938
    VPBROADCASTWrZ128rk = 8922,
8939
    VPBROADCASTWrZ128rkz  = 8923,
8940
    VPBROADCASTWrZ256r  = 8924,
8941
    VPBROADCASTWrZ256rk = 8925,
8942
    VPBROADCASTWrZ256rkz  = 8926,
8943
    VPBROADCASTWrZr = 8927,
8944
    VPBROADCASTWrZrk  = 8928,
8945
    VPBROADCASTWrZrkz = 8929,
8946
    VPBROADCASTWrm  = 8930,
8947
    VPBROADCASTWrr  = 8931,
8948
    VPCLMULQDQrm  = 8932,
8949
    VPCLMULQDQrr  = 8933,
8950
    VPCMOVmr  = 8934,
8951
    VPCMOVmrY = 8935,
8952
    VPCMOVrm  = 8936,
8953
    VPCMOVrmY = 8937,
8954
    VPCMOVrr  = 8938,
8955
    VPCMOVrrY = 8939,
8956
    VPCMPBZ128rmi = 8940,
8957
    VPCMPBZ128rmi_alt = 8941,
8958
    VPCMPBZ128rmik  = 8942,
8959
    VPCMPBZ128rmik_alt  = 8943,
8960
    VPCMPBZ128rri = 8944,
8961
    VPCMPBZ128rri_alt = 8945,
8962
    VPCMPBZ128rrik  = 8946,
8963
    VPCMPBZ128rrik_alt  = 8947,
8964
    VPCMPBZ256rmi = 8948,
8965
    VPCMPBZ256rmi_alt = 8949,
8966
    VPCMPBZ256rmik  = 8950,
8967
    VPCMPBZ256rmik_alt  = 8951,
8968
    VPCMPBZ256rri = 8952,
8969
    VPCMPBZ256rri_alt = 8953,
8970
    VPCMPBZ256rrik  = 8954,
8971
    VPCMPBZ256rrik_alt  = 8955,
8972
    VPCMPBZrmi  = 8956,
8973
    VPCMPBZrmi_alt  = 8957,
8974
    VPCMPBZrmik = 8958,
8975
    VPCMPBZrmik_alt = 8959,
8976
    VPCMPBZrri  = 8960,
8977
    VPCMPBZrri_alt  = 8961,
8978
    VPCMPBZrrik = 8962,
8979
    VPCMPBZrrik_alt = 8963,
8980
    VPCMPDZ128rmi = 8964,
8981
    VPCMPDZ128rmi_alt = 8965,
8982
    VPCMPDZ128rmib  = 8966,
8983
    VPCMPDZ128rmib_alt  = 8967,
8984
    VPCMPDZ128rmibk = 8968,
8985
    VPCMPDZ128rmibk_alt = 8969,
8986
    VPCMPDZ128rmik  = 8970,
8987
    VPCMPDZ128rmik_alt  = 8971,
8988
    VPCMPDZ128rri = 8972,
8989
    VPCMPDZ128rri_alt = 8973,
8990
    VPCMPDZ128rrik  = 8974,
8991
    VPCMPDZ128rrik_alt  = 8975,
8992
    VPCMPDZ256rmi = 8976,
8993
    VPCMPDZ256rmi_alt = 8977,
8994
    VPCMPDZ256rmib  = 8978,
8995
    VPCMPDZ256rmib_alt  = 8979,
8996
    VPCMPDZ256rmibk = 8980,
8997
    VPCMPDZ256rmibk_alt = 8981,
8998
    VPCMPDZ256rmik  = 8982,
8999
    VPCMPDZ256rmik_alt  = 8983,
9000
    VPCMPDZ256rri = 8984,
9001
    VPCMPDZ256rri_alt = 8985,
9002
    VPCMPDZ256rrik  = 8986,
9003
    VPCMPDZ256rrik_alt  = 8987,
9004
    VPCMPDZrmi  = 8988,
9005
    VPCMPDZrmi_alt  = 8989,
9006
    VPCMPDZrmib = 8990,
9007
    VPCMPDZrmib_alt = 8991,
9008
    VPCMPDZrmibk  = 8992,
9009
    VPCMPDZrmibk_alt  = 8993,
9010
    VPCMPDZrmik = 8994,
9011
    VPCMPDZrmik_alt = 8995,
9012
    VPCMPDZrri  = 8996,
9013
    VPCMPDZrri_alt  = 8997,
9014
    VPCMPDZrrik = 8998,
9015
    VPCMPDZrrik_alt = 8999,
9016
    VPCMPEQBYrm = 9000,
9017
    VPCMPEQBYrr = 9001,
9018
    VPCMPEQBZ128rm  = 9002,
9019
    VPCMPEQBZ128rmk = 9003,
9020
    VPCMPEQBZ128rr  = 9004,
9021
    VPCMPEQBZ128rrk = 9005,
9022
    VPCMPEQBZ256rm  = 9006,
9023
    VPCMPEQBZ256rmk = 9007,
9024
    VPCMPEQBZ256rr  = 9008,
9025
    VPCMPEQBZ256rrk = 9009,
9026
    VPCMPEQBZrm = 9010,
9027
    VPCMPEQBZrmk  = 9011,
9028
    VPCMPEQBZrr = 9012,
9029
    VPCMPEQBZrrk  = 9013,
9030
    VPCMPEQBrm  = 9014,
9031
    VPCMPEQBrr  = 9015,
9032
    VPCMPEQDYrm = 9016,
9033
    VPCMPEQDYrr = 9017,
9034
    VPCMPEQDZ128rm  = 9018,
9035
    VPCMPEQDZ128rmb = 9019,
9036
    VPCMPEQDZ128rmbk  = 9020,
9037
    VPCMPEQDZ128rmk = 9021,
9038
    VPCMPEQDZ128rr  = 9022,
9039
    VPCMPEQDZ128rrk = 9023,
9040
    VPCMPEQDZ256rm  = 9024,
9041
    VPCMPEQDZ256rmb = 9025,
9042
    VPCMPEQDZ256rmbk  = 9026,
9043
    VPCMPEQDZ256rmk = 9027,
9044
    VPCMPEQDZ256rr  = 9028,
9045
    VPCMPEQDZ256rrk = 9029,
9046
    VPCMPEQDZrm = 9030,
9047
    VPCMPEQDZrmb  = 9031,
9048
    VPCMPEQDZrmbk = 9032,
9049
    VPCMPEQDZrmk  = 9033,
9050
    VPCMPEQDZrr = 9034,
9051
    VPCMPEQDZrrk  = 9035,
9052
    VPCMPEQDrm  = 9036,
9053
    VPCMPEQDrr  = 9037,
9054
    VPCMPEQQYrm = 9038,
9055
    VPCMPEQQYrr = 9039,
9056
    VPCMPEQQZ128rm  = 9040,
9057
    VPCMPEQQZ128rmb = 9041,
9058
    VPCMPEQQZ128rmbk  = 9042,
9059
    VPCMPEQQZ128rmk = 9043,
9060
    VPCMPEQQZ128rr  = 9044,
9061
    VPCMPEQQZ128rrk = 9045,
9062
    VPCMPEQQZ256rm  = 9046,
9063
    VPCMPEQQZ256rmb = 9047,
9064
    VPCMPEQQZ256rmbk  = 9048,
9065
    VPCMPEQQZ256rmk = 9049,
9066
    VPCMPEQQZ256rr  = 9050,
9067
    VPCMPEQQZ256rrk = 9051,
9068
    VPCMPEQQZrm = 9052,
9069
    VPCMPEQQZrmb  = 9053,
9070
    VPCMPEQQZrmbk = 9054,
9071
    VPCMPEQQZrmk  = 9055,
9072
    VPCMPEQQZrr = 9056,
9073
    VPCMPEQQZrrk  = 9057,
9074
    VPCMPEQQrm  = 9058,
9075
    VPCMPEQQrr  = 9059,
9076
    VPCMPEQWYrm = 9060,
9077
    VPCMPEQWYrr = 9061,
9078
    VPCMPEQWZ128rm  = 9062,
9079
    VPCMPEQWZ128rmk = 9063,
9080
    VPCMPEQWZ128rr  = 9064,
9081
    VPCMPEQWZ128rrk = 9065,
9082
    VPCMPEQWZ256rm  = 9066,
9083
    VPCMPEQWZ256rmk = 9067,
9084
    VPCMPEQWZ256rr  = 9068,
9085
    VPCMPEQWZ256rrk = 9069,
9086
    VPCMPEQWZrm = 9070,
9087
    VPCMPEQWZrmk  = 9071,
9088
    VPCMPEQWZrr = 9072,
9089
    VPCMPEQWZrrk  = 9073,
9090
    VPCMPEQWrm  = 9074,
9091
    VPCMPEQWrr  = 9075,
9092
    VPCMPESTRIMEM = 9076,
9093
    VPCMPESTRIREG = 9077,
9094
    VPCMPESTRIrm  = 9078,
9095
    VPCMPESTRIrr  = 9079,
9096
    VPCMPESTRM128MEM  = 9080,
9097
    VPCMPESTRM128REG  = 9081,
9098
    VPCMPESTRM128rm = 9082,
9099
    VPCMPESTRM128rr = 9083,
9100
    VPCMPGTBYrm = 9084,
9101
    VPCMPGTBYrr = 9085,
9102
    VPCMPGTBZ128rm  = 9086,
9103
    VPCMPGTBZ128rmk = 9087,
9104
    VPCMPGTBZ128rr  = 9088,
9105
    VPCMPGTBZ128rrk = 9089,
9106
    VPCMPGTBZ256rm  = 9090,
9107
    VPCMPGTBZ256rmk = 9091,
9108
    VPCMPGTBZ256rr  = 9092,
9109
    VPCMPGTBZ256rrk = 9093,
9110
    VPCMPGTBZrm = 9094,
9111
    VPCMPGTBZrmk  = 9095,
9112
    VPCMPGTBZrr = 9096,
9113
    VPCMPGTBZrrk  = 9097,
9114
    VPCMPGTBrm  = 9098,
9115
    VPCMPGTBrr  = 9099,
9116
    VPCMPGTDYrm = 9100,
9117
    VPCMPGTDYrr = 9101,
9118
    VPCMPGTDZ128rm  = 9102,
9119
    VPCMPGTDZ128rmb = 9103,
9120
    VPCMPGTDZ128rmbk  = 9104,
9121
    VPCMPGTDZ128rmk = 9105,
9122
    VPCMPGTDZ128rr  = 9106,
9123
    VPCMPGTDZ128rrk = 9107,
9124
    VPCMPGTDZ256rm  = 9108,
9125
    VPCMPGTDZ256rmb = 9109,
9126
    VPCMPGTDZ256rmbk  = 9110,
9127
    VPCMPGTDZ256rmk = 9111,
9128
    VPCMPGTDZ256rr  = 9112,
9129
    VPCMPGTDZ256rrk = 9113,
9130
    VPCMPGTDZrm = 9114,
9131
    VPCMPGTDZrmb  = 9115,
9132
    VPCMPGTDZrmbk = 9116,
9133
    VPCMPGTDZrmk  = 9117,
9134
    VPCMPGTDZrr = 9118,
9135
    VPCMPGTDZrrk  = 9119,
9136
    VPCMPGTDrm  = 9120,
9137
    VPCMPGTDrr  = 9121,
9138
    VPCMPGTQYrm = 9122,
9139
    VPCMPGTQYrr = 9123,
9140
    VPCMPGTQZ128rm  = 9124,
9141
    VPCMPGTQZ128rmb = 9125,
9142
    VPCMPGTQZ128rmbk  = 9126,
9143
    VPCMPGTQZ128rmk = 9127,
9144
    VPCMPGTQZ128rr  = 9128,
9145
    VPCMPGTQZ128rrk = 9129,
9146
    VPCMPGTQZ256rm  = 9130,
9147
    VPCMPGTQZ256rmb = 9131,
9148
    VPCMPGTQZ256rmbk  = 9132,
9149
    VPCMPGTQZ256rmk = 9133,
9150
    VPCMPGTQZ256rr  = 9134,
9151
    VPCMPGTQZ256rrk = 9135,
9152
    VPCMPGTQZrm = 9136,
9153
    VPCMPGTQZrmb  = 9137,
9154
    VPCMPGTQZrmbk = 9138,
9155
    VPCMPGTQZrmk  = 9139,
9156
    VPCMPGTQZrr = 9140,
9157
    VPCMPGTQZrrk  = 9141,
9158
    VPCMPGTQrm  = 9142,
9159
    VPCMPGTQrr  = 9143,
9160
    VPCMPGTWYrm = 9144,
9161
    VPCMPGTWYrr = 9145,
9162
    VPCMPGTWZ128rm  = 9146,
9163
    VPCMPGTWZ128rmk = 9147,
9164
    VPCMPGTWZ128rr  = 9148,
9165
    VPCMPGTWZ128rrk = 9149,
9166
    VPCMPGTWZ256rm  = 9150,
9167
    VPCMPGTWZ256rmk = 9151,
9168
    VPCMPGTWZ256rr  = 9152,
9169
    VPCMPGTWZ256rrk = 9153,
9170
    VPCMPGTWZrm = 9154,
9171
    VPCMPGTWZrmk  = 9155,
9172
    VPCMPGTWZrr = 9156,
9173
    VPCMPGTWZrrk  = 9157,
9174
    VPCMPGTWrm  = 9158,
9175
    VPCMPGTWrr  = 9159,
9176
    VPCMPISTRIMEM = 9160,
9177
    VPCMPISTRIREG = 9161,
9178
    VPCMPISTRIrm  = 9162,
9179
    VPCMPISTRIrr  = 9163,
9180
    VPCMPISTRM128MEM  = 9164,
9181
    VPCMPISTRM128REG  = 9165,
9182
    VPCMPISTRM128rm = 9166,
9183
    VPCMPISTRM128rr = 9167,
9184
    VPCMPQZ128rmi = 9168,
9185
    VPCMPQZ128rmi_alt = 9169,
9186
    VPCMPQZ128rmib  = 9170,
9187
    VPCMPQZ128rmib_alt  = 9171,
9188
    VPCMPQZ128rmibk = 9172,
9189
    VPCMPQZ128rmibk_alt = 9173,
9190
    VPCMPQZ128rmik  = 9174,
9191
    VPCMPQZ128rmik_alt  = 9175,
9192
    VPCMPQZ128rri = 9176,
9193
    VPCMPQZ128rri_alt = 9177,
9194
    VPCMPQZ128rrik  = 9178,
9195
    VPCMPQZ128rrik_alt  = 9179,
9196
    VPCMPQZ256rmi = 9180,
9197
    VPCMPQZ256rmi_alt = 9181,
9198
    VPCMPQZ256rmib  = 9182,
9199
    VPCMPQZ256rmib_alt  = 9183,
9200
    VPCMPQZ256rmibk = 9184,
9201
    VPCMPQZ256rmibk_alt = 9185,
9202
    VPCMPQZ256rmik  = 9186,
9203
    VPCMPQZ256rmik_alt  = 9187,
9204
    VPCMPQZ256rri = 9188,
9205
    VPCMPQZ256rri_alt = 9189,
9206
    VPCMPQZ256rrik  = 9190,
9207
    VPCMPQZ256rrik_alt  = 9191,
9208
    VPCMPQZrmi  = 9192,
9209
    VPCMPQZrmi_alt  = 9193,
9210
    VPCMPQZrmib = 9194,
9211
    VPCMPQZrmib_alt = 9195,
9212
    VPCMPQZrmibk  = 9196,
9213
    VPCMPQZrmibk_alt  = 9197,
9214
    VPCMPQZrmik = 9198,
9215
    VPCMPQZrmik_alt = 9199,
9216
    VPCMPQZrri  = 9200,
9217
    VPCMPQZrri_alt  = 9201,
9218
    VPCMPQZrrik = 9202,
9219
    VPCMPQZrrik_alt = 9203,
9220
    VPCMPUBZ128rmi  = 9204,
9221
    VPCMPUBZ128rmi_alt  = 9205,
9222
    VPCMPUBZ128rmik = 9206,
9223
    VPCMPUBZ128rmik_alt = 9207,
9224
    VPCMPUBZ128rri  = 9208,
9225
    VPCMPUBZ128rri_alt  = 9209,
9226
    VPCMPUBZ128rrik = 9210,
9227
    VPCMPUBZ128rrik_alt = 9211,
9228
    VPCMPUBZ256rmi  = 9212,
9229
    VPCMPUBZ256rmi_alt  = 9213,
9230
    VPCMPUBZ256rmik = 9214,
9231
    VPCMPUBZ256rmik_alt = 9215,
9232
    VPCMPUBZ256rri  = 9216,
9233
    VPCMPUBZ256rri_alt  = 9217,
9234
    VPCMPUBZ256rrik = 9218,
9235
    VPCMPUBZ256rrik_alt = 9219,
9236
    VPCMPUBZrmi = 9220,
9237
    VPCMPUBZrmi_alt = 9221,
9238
    VPCMPUBZrmik  = 9222,
9239
    VPCMPUBZrmik_alt  = 9223,
9240
    VPCMPUBZrri = 9224,
9241
    VPCMPUBZrri_alt = 9225,
9242
    VPCMPUBZrrik  = 9226,
9243
    VPCMPUBZrrik_alt  = 9227,
9244
    VPCMPUDZ128rmi  = 9228,
9245
    VPCMPUDZ128rmi_alt  = 9229,
9246
    VPCMPUDZ128rmib = 9230,
9247
    VPCMPUDZ128rmib_alt = 9231,
9248
    VPCMPUDZ128rmibk  = 9232,
9249
    VPCMPUDZ128rmibk_alt  = 9233,
9250
    VPCMPUDZ128rmik = 9234,
9251
    VPCMPUDZ128rmik_alt = 9235,
9252
    VPCMPUDZ128rri  = 9236,
9253
    VPCMPUDZ128rri_alt  = 9237,
9254
    VPCMPUDZ128rrik = 9238,
9255
    VPCMPUDZ128rrik_alt = 9239,
9256
    VPCMPUDZ256rmi  = 9240,
9257
    VPCMPUDZ256rmi_alt  = 9241,
9258
    VPCMPUDZ256rmib = 9242,
9259
    VPCMPUDZ256rmib_alt = 9243,
9260
    VPCMPUDZ256rmibk  = 9244,
9261
    VPCMPUDZ256rmibk_alt  = 9245,
9262
    VPCMPUDZ256rmik = 9246,
9263
    VPCMPUDZ256rmik_alt = 9247,
9264
    VPCMPUDZ256rri  = 9248,
9265
    VPCMPUDZ256rri_alt  = 9249,
9266
    VPCMPUDZ256rrik = 9250,
9267
    VPCMPUDZ256rrik_alt = 9251,
9268
    VPCMPUDZrmi = 9252,
9269
    VPCMPUDZrmi_alt = 9253,
9270
    VPCMPUDZrmib  = 9254,
9271
    VPCMPUDZrmib_alt  = 9255,
9272
    VPCMPUDZrmibk = 9256,
9273
    VPCMPUDZrmibk_alt = 9257,
9274
    VPCMPUDZrmik  = 9258,
9275
    VPCMPUDZrmik_alt  = 9259,
9276
    VPCMPUDZrri = 9260,
9277
    VPCMPUDZrri_alt = 9261,
9278
    VPCMPUDZrrik  = 9262,
9279
    VPCMPUDZrrik_alt  = 9263,
9280
    VPCMPUQZ128rmi  = 9264,
9281
    VPCMPUQZ128rmi_alt  = 9265,
9282
    VPCMPUQZ128rmib = 9266,
9283
    VPCMPUQZ128rmib_alt = 9267,
9284
    VPCMPUQZ128rmibk  = 9268,
9285
    VPCMPUQZ128rmibk_alt  = 9269,
9286
    VPCMPUQZ128rmik = 9270,
9287
    VPCMPUQZ128rmik_alt = 9271,
9288
    VPCMPUQZ128rri  = 9272,
9289
    VPCMPUQZ128rri_alt  = 9273,
9290
    VPCMPUQZ128rrik = 9274,
9291
    VPCMPUQZ128rrik_alt = 9275,
9292
    VPCMPUQZ256rmi  = 9276,
9293
    VPCMPUQZ256rmi_alt  = 9277,
9294
    VPCMPUQZ256rmib = 9278,
9295
    VPCMPUQZ256rmib_alt = 9279,
9296
    VPCMPUQZ256rmibk  = 9280,
9297
    VPCMPUQZ256rmibk_alt  = 9281,
9298
    VPCMPUQZ256rmik = 9282,
9299
    VPCMPUQZ256rmik_alt = 9283,
9300
    VPCMPUQZ256rri  = 9284,
9301
    VPCMPUQZ256rri_alt  = 9285,
9302
    VPCMPUQZ256rrik = 9286,
9303
    VPCMPUQZ256rrik_alt = 9287,
9304
    VPCMPUQZrmi = 9288,
9305
    VPCMPUQZrmi_alt = 9289,
9306
    VPCMPUQZrmib  = 9290,
9307
    VPCMPUQZrmib_alt  = 9291,
9308
    VPCMPUQZrmibk = 9292,
9309
    VPCMPUQZrmibk_alt = 9293,
9310
    VPCMPUQZrmik  = 9294,
9311
    VPCMPUQZrmik_alt  = 9295,
9312
    VPCMPUQZrri = 9296,
9313
    VPCMPUQZrri_alt = 9297,
9314
    VPCMPUQZrrik  = 9298,
9315
    VPCMPUQZrrik_alt  = 9299,
9316
    VPCMPUWZ128rmi  = 9300,
9317
    VPCMPUWZ128rmi_alt  = 9301,
9318
    VPCMPUWZ128rmik = 9302,
9319
    VPCMPUWZ128rmik_alt = 9303,
9320
    VPCMPUWZ128rri  = 9304,
9321
    VPCMPUWZ128rri_alt  = 9305,
9322
    VPCMPUWZ128rrik = 9306,
9323
    VPCMPUWZ128rrik_alt = 9307,
9324
    VPCMPUWZ256rmi  = 9308,
9325
    VPCMPUWZ256rmi_alt  = 9309,
9326
    VPCMPUWZ256rmik = 9310,
9327
    VPCMPUWZ256rmik_alt = 9311,
9328
    VPCMPUWZ256rri  = 9312,
9329
    VPCMPUWZ256rri_alt  = 9313,
9330
    VPCMPUWZ256rrik = 9314,
9331
    VPCMPUWZ256rrik_alt = 9315,
9332
    VPCMPUWZrmi = 9316,
9333
    VPCMPUWZrmi_alt = 9317,
9334
    VPCMPUWZrmik  = 9318,
9335
    VPCMPUWZrmik_alt  = 9319,
9336
    VPCMPUWZrri = 9320,
9337
    VPCMPUWZrri_alt = 9321,
9338
    VPCMPUWZrrik  = 9322,
9339
    VPCMPUWZrrik_alt  = 9323,
9340
    VPCMPWZ128rmi = 9324,
9341
    VPCMPWZ128rmi_alt = 9325,
9342
    VPCMPWZ128rmik  = 9326,
9343
    VPCMPWZ128rmik_alt  = 9327,
9344
    VPCMPWZ128rri = 9328,
9345
    VPCMPWZ128rri_alt = 9329,
9346
    VPCMPWZ128rrik  = 9330,
9347
    VPCMPWZ128rrik_alt  = 9331,
9348
    VPCMPWZ256rmi = 9332,
9349
    VPCMPWZ256rmi_alt = 9333,
9350
    VPCMPWZ256rmik  = 9334,
9351
    VPCMPWZ256rmik_alt  = 9335,
9352
    VPCMPWZ256rri = 9336,
9353
    VPCMPWZ256rri_alt = 9337,
9354
    VPCMPWZ256rrik  = 9338,
9355
    VPCMPWZ256rrik_alt  = 9339,
9356
    VPCMPWZrmi  = 9340,
9357
    VPCMPWZrmi_alt  = 9341,
9358
    VPCMPWZrmik = 9342,
9359
    VPCMPWZrmik_alt = 9343,
9360
    VPCMPWZrri  = 9344,
9361
    VPCMPWZrri_alt  = 9345,
9362
    VPCMPWZrrik = 9346,
9363
    VPCMPWZrrik_alt = 9347,
9364
    VPCOMBmi  = 9348,
9365
    VPCOMBmi_alt  = 9349,
9366
    VPCOMBri  = 9350,
9367
    VPCOMBri_alt  = 9351,
9368
    VPCOMDmi  = 9352,
9369
    VPCOMDmi_alt  = 9353,
9370
    VPCOMDri  = 9354,
9371
    VPCOMDri_alt  = 9355,
9372
    VPCOMPRESSDZ128mr = 9356,
9373
    VPCOMPRESSDZ128mrk  = 9357,
9374
    VPCOMPRESSDZ128rr = 9358,
9375
    VPCOMPRESSDZ128rrk  = 9359,
9376
    VPCOMPRESSDZ128rrkz = 9360,
9377
    VPCOMPRESSDZ256mr = 9361,
9378
    VPCOMPRESSDZ256mrk  = 9362,
9379
    VPCOMPRESSDZ256rr = 9363,
9380
    VPCOMPRESSDZ256rrk  = 9364,
9381
    VPCOMPRESSDZ256rrkz = 9365,
9382
    VPCOMPRESSDZmr  = 9366,
9383
    VPCOMPRESSDZmrk = 9367,
9384
    VPCOMPRESSDZrr  = 9368,
9385
    VPCOMPRESSDZrrk = 9369,
9386
    VPCOMPRESSDZrrkz  = 9370,
9387
    VPCOMPRESSQZ128mr = 9371,
9388
    VPCOMPRESSQZ128mrk  = 9372,
9389
    VPCOMPRESSQZ128rr = 9373,
9390
    VPCOMPRESSQZ128rrk  = 9374,
9391
    VPCOMPRESSQZ128rrkz = 9375,
9392
    VPCOMPRESSQZ256mr = 9376,
9393
    VPCOMPRESSQZ256mrk  = 9377,
9394
    VPCOMPRESSQZ256rr = 9378,
9395
    VPCOMPRESSQZ256rrk  = 9379,
9396
    VPCOMPRESSQZ256rrkz = 9380,
9397
    VPCOMPRESSQZmr  = 9381,
9398
    VPCOMPRESSQZmrk = 9382,
9399
    VPCOMPRESSQZrr  = 9383,
9400
    VPCOMPRESSQZrrk = 9384,
9401
    VPCOMPRESSQZrrkz  = 9385,
9402
    VPCOMQmi  = 9386,
9403
    VPCOMQmi_alt  = 9387,
9404
    VPCOMQri  = 9388,
9405
    VPCOMQri_alt  = 9389,
9406
    VPCOMUBmi = 9390,
9407
    VPCOMUBmi_alt = 9391,
9408
    VPCOMUBri = 9392,
9409
    VPCOMUBri_alt = 9393,
9410
    VPCOMUDmi = 9394,
9411
    VPCOMUDmi_alt = 9395,
9412
    VPCOMUDri = 9396,
9413
    VPCOMUDri_alt = 9397,
9414
    VPCOMUQmi = 9398,
9415
    VPCOMUQmi_alt = 9399,
9416
    VPCOMUQri = 9400,
9417
    VPCOMUQri_alt = 9401,
9418
    VPCOMUWmi = 9402,
9419
    VPCOMUWmi_alt = 9403,
9420
    VPCOMUWri = 9404,
9421
    VPCOMUWri_alt = 9405,
9422
    VPCOMWmi  = 9406,
9423
    VPCOMWmi_alt  = 9407,
9424
    VPCOMWri  = 9408,
9425
    VPCOMWri_alt  = 9409,
9426
    VPCONFLICTDZ128rm = 9410,
9427
    VPCONFLICTDZ128rmb  = 9411,
9428
    VPCONFLICTDZ128rmbk = 9412,
9429
    VPCONFLICTDZ128rmbkz  = 9413,
9430
    VPCONFLICTDZ128rmk  = 9414,
9431
    VPCONFLICTDZ128rmkz = 9415,
9432
    VPCONFLICTDZ128rr = 9416,
9433
    VPCONFLICTDZ128rrk  = 9417,
9434
    VPCONFLICTDZ128rrkz = 9418,
9435
    VPCONFLICTDZ256rm = 9419,
9436
    VPCONFLICTDZ256rmb  = 9420,
9437
    VPCONFLICTDZ256rmbk = 9421,
9438
    VPCONFLICTDZ256rmbkz  = 9422,
9439
    VPCONFLICTDZ256rmk  = 9423,
9440
    VPCONFLICTDZ256rmkz = 9424,
9441
    VPCONFLICTDZ256rr = 9425,
9442
    VPCONFLICTDZ256rrk  = 9426,
9443
    VPCONFLICTDZ256rrkz = 9427,
9444
    VPCONFLICTDZrm  = 9428,
9445
    VPCONFLICTDZrmb = 9429,
9446
    VPCONFLICTDZrmbk  = 9430,
9447
    VPCONFLICTDZrmbkz = 9431,
9448
    VPCONFLICTDZrmk = 9432,
9449
    VPCONFLICTDZrmkz  = 9433,
9450
    VPCONFLICTDZrr  = 9434,
9451
    VPCONFLICTDZrrk = 9435,
9452
    VPCONFLICTDZrrkz  = 9436,
9453
    VPCONFLICTQZ128rm = 9437,
9454
    VPCONFLICTQZ128rmb  = 9438,
9455
    VPCONFLICTQZ128rmbk = 9439,
9456
    VPCONFLICTQZ128rmbkz  = 9440,
9457
    VPCONFLICTQZ128rmk  = 9441,
9458
    VPCONFLICTQZ128rmkz = 9442,
9459
    VPCONFLICTQZ128rr = 9443,
9460
    VPCONFLICTQZ128rrk  = 9444,
9461
    VPCONFLICTQZ128rrkz = 9445,
9462
    VPCONFLICTQZ256rm = 9446,
9463
    VPCONFLICTQZ256rmb  = 9447,
9464
    VPCONFLICTQZ256rmbk = 9448,
9465
    VPCONFLICTQZ256rmbkz  = 9449,
9466
    VPCONFLICTQZ256rmk  = 9450,
9467
    VPCONFLICTQZ256rmkz = 9451,
9468
    VPCONFLICTQZ256rr = 9452,
9469
    VPCONFLICTQZ256rrk  = 9453,
9470
    VPCONFLICTQZ256rrkz = 9454,
9471
    VPCONFLICTQZrm  = 9455,
9472
    VPCONFLICTQZrmb = 9456,
9473
    VPCONFLICTQZrmbk  = 9457,
9474
    VPCONFLICTQZrmbkz = 9458,
9475
    VPCONFLICTQZrmk = 9459,
9476
    VPCONFLICTQZrmkz  = 9460,
9477
    VPCONFLICTQZrr  = 9461,
9478
    VPCONFLICTQZrrk = 9462,
9479
    VPCONFLICTQZrrkz  = 9463,
9480
    VPERM2F128rm  = 9464,
9481
    VPERM2F128rr  = 9465,
9482
    VPERM2I128rm  = 9466,
9483
    VPERM2I128rr  = 9467,
9484
    VPERMBZ128rm  = 9468,
9485
    VPERMBZ128rmk = 9469,
9486
    VPERMBZ128rmkz  = 9470,
9487
    VPERMBZ128rr  = 9471,
9488
    VPERMBZ128rrk = 9472,
9489
    VPERMBZ128rrkz  = 9473,
9490
    VPERMBZ256rm  = 9474,
9491
    VPERMBZ256rmk = 9475,
9492
    VPERMBZ256rmkz  = 9476,
9493
    VPERMBZ256rr  = 9477,
9494
    VPERMBZ256rrk = 9478,
9495
    VPERMBZ256rrkz  = 9479,
9496
    VPERMBZrm = 9480,
9497
    VPERMBZrmk  = 9481,
9498
    VPERMBZrmkz = 9482,
9499
    VPERMBZrr = 9483,
9500
    VPERMBZrrk  = 9484,
9501
    VPERMBZrrkz = 9485,
9502
    VPERMDYrm = 9486,
9503
    VPERMDYrr = 9487,
9504
    VPERMDZ256rm  = 9488,
9505
    VPERMDZ256rmb = 9489,
9506
    VPERMDZ256rmbk  = 9490,
9507
    VPERMDZ256rmbkz = 9491,
9508
    VPERMDZ256rmk = 9492,
9509
    VPERMDZ256rmkz  = 9493,
9510
    VPERMDZ256rr  = 9494,
9511
    VPERMDZ256rrk = 9495,
9512
    VPERMDZ256rrkz  = 9496,
9513
    VPERMDZrm = 9497,
9514
    VPERMDZrmb  = 9498,
9515
    VPERMDZrmbk = 9499,
9516
    VPERMDZrmbkz  = 9500,
9517
    VPERMDZrmk  = 9501,
9518
    VPERMDZrmkz = 9502,
9519
    VPERMDZrr = 9503,
9520
    VPERMDZrrk  = 9504,
9521
    VPERMDZrrkz = 9505,
9522
    VPERMI2B128rm = 9506,
9523
    VPERMI2B128rmk  = 9507,
9524
    VPERMI2B128rmkz = 9508,
9525
    VPERMI2B128rr = 9509,
9526
    VPERMI2B128rrk  = 9510,
9527
    VPERMI2B128rrkz = 9511,
9528
    VPERMI2B256rm = 9512,
9529
    VPERMI2B256rmk  = 9513,
9530
    VPERMI2B256rmkz = 9514,
9531
    VPERMI2B256rr = 9515,
9532
    VPERMI2B256rrk  = 9516,
9533
    VPERMI2B256rrkz = 9517,
9534
    VPERMI2Brm  = 9518,
9535
    VPERMI2Brmk = 9519,
9536
    VPERMI2Brmkz  = 9520,
9537
    VPERMI2Brr  = 9521,
9538
    VPERMI2Brrk = 9522,
9539
    VPERMI2Brrkz  = 9523,
9540
    VPERMI2D128rm = 9524,
9541
    VPERMI2D128rmb  = 9525,
9542
    VPERMI2D128rmbk = 9526,
9543
    VPERMI2D128rmbkz  = 9527,
9544
    VPERMI2D128rmk  = 9528,
9545
    VPERMI2D128rmkz = 9529,
9546
    VPERMI2D128rr = 9530,
9547
    VPERMI2D128rrk  = 9531,
9548
    VPERMI2D128rrkz = 9532,
9549
    VPERMI2D256rm = 9533,
9550
    VPERMI2D256rmb  = 9534,
9551
    VPERMI2D256rmbk = 9535,
9552
    VPERMI2D256rmbkz  = 9536,
9553
    VPERMI2D256rmk  = 9537,
9554
    VPERMI2D256rmkz = 9538,
9555
    VPERMI2D256rr = 9539,
9556
    VPERMI2D256rrk  = 9540,
9557
    VPERMI2D256rrkz = 9541,
9558
    VPERMI2Drm  = 9542,
9559
    VPERMI2Drmb = 9543,
9560
    VPERMI2Drmbk  = 9544,
9561
    VPERMI2Drmbkz = 9545,
9562
    VPERMI2Drmk = 9546,
9563
    VPERMI2Drmkz  = 9547,
9564
    VPERMI2Drr  = 9548,
9565
    VPERMI2Drrk = 9549,
9566
    VPERMI2Drrkz  = 9550,
9567
    VPERMI2PD128rm  = 9551,
9568
    VPERMI2PD128rmb = 9552,
9569
    VPERMI2PD128rmbk  = 9553,
9570
    VPERMI2PD128rmbkz = 9554,
9571
    VPERMI2PD128rmk = 9555,
9572
    VPERMI2PD128rmkz  = 9556,
9573
    VPERMI2PD128rr  = 9557,
9574
    VPERMI2PD128rrk = 9558,
9575
    VPERMI2PD128rrkz  = 9559,
9576
    VPERMI2PD256rm  = 9560,
9577
    VPERMI2PD256rmb = 9561,
9578
    VPERMI2PD256rmbk  = 9562,
9579
    VPERMI2PD256rmbkz = 9563,
9580
    VPERMI2PD256rmk = 9564,
9581
    VPERMI2PD256rmkz  = 9565,
9582
    VPERMI2PD256rr  = 9566,
9583
    VPERMI2PD256rrk = 9567,
9584
    VPERMI2PD256rrkz  = 9568,
9585
    VPERMI2PDrm = 9569,
9586
    VPERMI2PDrmb  = 9570,
9587
    VPERMI2PDrmbk = 9571,
9588
    VPERMI2PDrmbkz  = 9572,
9589
    VPERMI2PDrmk  = 9573,
9590
    VPERMI2PDrmkz = 9574,
9591
    VPERMI2PDrr = 9575,
9592
    VPERMI2PDrrk  = 9576,
9593
    VPERMI2PDrrkz = 9577,
9594
    VPERMI2PS128rm  = 9578,
9595
    VPERMI2PS128rmb = 9579,
9596
    VPERMI2PS128rmbk  = 9580,
9597
    VPERMI2PS128rmbkz = 9581,
9598
    VPERMI2PS128rmk = 9582,
9599
    VPERMI2PS128rmkz  = 9583,
9600
    VPERMI2PS128rr  = 9584,
9601
    VPERMI2PS128rrk = 9585,
9602
    VPERMI2PS128rrkz  = 9586,
9603
    VPERMI2PS256rm  = 9587,
9604
    VPERMI2PS256rmb = 9588,
9605
    VPERMI2PS256rmbk  = 9589,
9606
    VPERMI2PS256rmbkz = 9590,
9607
    VPERMI2PS256rmk = 9591,
9608
    VPERMI2PS256rmkz  = 9592,
9609
    VPERMI2PS256rr  = 9593,
9610
    VPERMI2PS256rrk = 9594,
9611
    VPERMI2PS256rrkz  = 9595,
9612
    VPERMI2PSrm = 9596,
9613
    VPERMI2PSrmb  = 9597,
9614
    VPERMI2PSrmbk = 9598,
9615
    VPERMI2PSrmbkz  = 9599,
9616
    VPERMI2PSrmk  = 9600,
9617
    VPERMI2PSrmkz = 9601,
9618
    VPERMI2PSrr = 9602,
9619
    VPERMI2PSrrk  = 9603,
9620
    VPERMI2PSrrkz = 9604,
9621
    VPERMI2Q128rm = 9605,
9622
    VPERMI2Q128rmb  = 9606,
9623
    VPERMI2Q128rmbk = 9607,
9624
    VPERMI2Q128rmbkz  = 9608,
9625
    VPERMI2Q128rmk  = 9609,
9626
    VPERMI2Q128rmkz = 9610,
9627
    VPERMI2Q128rr = 9611,
9628
    VPERMI2Q128rrk  = 9612,
9629
    VPERMI2Q128rrkz = 9613,
9630
    VPERMI2Q256rm = 9614,
9631
    VPERMI2Q256rmb  = 9615,
9632
    VPERMI2Q256rmbk = 9616,
9633
    VPERMI2Q256rmbkz  = 9617,
9634
    VPERMI2Q256rmk  = 9618,
9635
    VPERMI2Q256rmkz = 9619,
9636
    VPERMI2Q256rr = 9620,
9637
    VPERMI2Q256rrk  = 9621,
9638
    VPERMI2Q256rrkz = 9622,
9639
    VPERMI2Qrm  = 9623,
9640
    VPERMI2Qrmb = 9624,
9641
    VPERMI2Qrmbk  = 9625,
9642
    VPERMI2Qrmbkz = 9626,
9643
    VPERMI2Qrmk = 9627,
9644
    VPERMI2Qrmkz  = 9628,
9645
    VPERMI2Qrr  = 9629,
9646
    VPERMI2Qrrk = 9630,
9647
    VPERMI2Qrrkz  = 9631,
9648
    VPERMI2W128rm = 9632,
9649
    VPERMI2W128rmk  = 9633,
9650
    VPERMI2W128rmkz = 9634,
9651
    VPERMI2W128rr = 9635,
9652
    VPERMI2W128rrk  = 9636,
9653
    VPERMI2W128rrkz = 9637,
9654
    VPERMI2W256rm = 9638,
9655
    VPERMI2W256rmk  = 9639,
9656
    VPERMI2W256rmkz = 9640,
9657
    VPERMI2W256rr = 9641,
9658
    VPERMI2W256rrk  = 9642,
9659
    VPERMI2W256rrkz = 9643,
9660
    VPERMI2Wrm  = 9644,
9661
    VPERMI2Wrmk = 9645,
9662
    VPERMI2Wrmkz  = 9646,
9663
    VPERMI2Wrr  = 9647,
9664
    VPERMI2Wrrk = 9648,
9665
    VPERMI2Wrrkz  = 9649,
9666
    VPERMIL2PDmr  = 9650,
9667
    VPERMIL2PDmrY = 9651,
9668
    VPERMIL2PDrm  = 9652,
9669
    VPERMIL2PDrmY = 9653,
9670
    VPERMIL2PDrr  = 9654,
9671
    VPERMIL2PDrrY = 9655,
9672
    VPERMIL2PSmr  = 9656,
9673
    VPERMIL2PSmrY = 9657,
9674
    VPERMIL2PSrm  = 9658,
9675
    VPERMIL2PSrmY = 9659,
9676
    VPERMIL2PSrr  = 9660,
9677
    VPERMIL2PSrrY = 9661,
9678
    VPERMILPDYmi  = 9662,
9679
    VPERMILPDYri  = 9663,
9680
    VPERMILPDYrm  = 9664,
9681
    VPERMILPDYrr  = 9665,
9682
    VPERMILPDZ128mbi  = 9666,
9683
    VPERMILPDZ128mbik = 9667,
9684
    VPERMILPDZ128mbikz  = 9668,
9685
    VPERMILPDZ128mi = 9669,
9686
    VPERMILPDZ128mik  = 9670,
9687
    VPERMILPDZ128mikz = 9671,
9688
    VPERMILPDZ128ri = 9672,
9689
    VPERMILPDZ128rik  = 9673,
9690
    VPERMILPDZ128rikz = 9674,
9691
    VPERMILPDZ128rm = 9675,
9692
    VPERMILPDZ128rmb  = 9676,
9693
    VPERMILPDZ128rmbk = 9677,
9694
    VPERMILPDZ128rmbkz  = 9678,
9695
    VPERMILPDZ128rmk  = 9679,
9696
    VPERMILPDZ128rmkz = 9680,
9697
    VPERMILPDZ128rr = 9681,
9698
    VPERMILPDZ128rrk  = 9682,
9699
    VPERMILPDZ128rrkz = 9683,
9700
    VPERMILPDZ256mbi  = 9684,
9701
    VPERMILPDZ256mbik = 9685,
9702
    VPERMILPDZ256mbikz  = 9686,
9703
    VPERMILPDZ256mi = 9687,
9704
    VPERMILPDZ256mik  = 9688,
9705
    VPERMILPDZ256mikz = 9689,
9706
    VPERMILPDZ256ri = 9690,
9707
    VPERMILPDZ256rik  = 9691,
9708
    VPERMILPDZ256rikz = 9692,
9709
    VPERMILPDZ256rm = 9693,
9710
    VPERMILPDZ256rmb  = 9694,
9711
    VPERMILPDZ256rmbk = 9695,
9712
    VPERMILPDZ256rmbkz  = 9696,
9713
    VPERMILPDZ256rmk  = 9697,
9714
    VPERMILPDZ256rmkz = 9698,
9715
    VPERMILPDZ256rr = 9699,
9716
    VPERMILPDZ256rrk  = 9700,
9717
    VPERMILPDZ256rrkz = 9701,
9718
    VPERMILPDZmbi = 9702,
9719
    VPERMILPDZmbik  = 9703,
9720
    VPERMILPDZmbikz = 9704,
9721
    VPERMILPDZmi  = 9705,
9722
    VPERMILPDZmik = 9706,
9723
    VPERMILPDZmikz  = 9707,
9724
    VPERMILPDZri  = 9708,
9725
    VPERMILPDZrik = 9709,
9726
    VPERMILPDZrikz  = 9710,
9727
    VPERMILPDZrm  = 9711,
9728
    VPERMILPDZrmb = 9712,
9729
    VPERMILPDZrmbk  = 9713,
9730
    VPERMILPDZrmbkz = 9714,
9731
    VPERMILPDZrmk = 9715,
9732
    VPERMILPDZrmkz  = 9716,
9733
    VPERMILPDZrr  = 9717,
9734
    VPERMILPDZrrk = 9718,
9735
    VPERMILPDZrrkz  = 9719,
9736
    VPERMILPDmi = 9720,
9737
    VPERMILPDri = 9721,
9738
    VPERMILPDrm = 9722,
9739
    VPERMILPDrr = 9723,
9740
    VPERMILPSYmi  = 9724,
9741
    VPERMILPSYri  = 9725,
9742
    VPERMILPSYrm  = 9726,
9743
    VPERMILPSYrr  = 9727,
9744
    VPERMILPSZ128mbi  = 9728,
9745
    VPERMILPSZ128mbik = 9729,
9746
    VPERMILPSZ128mbikz  = 9730,
9747
    VPERMILPSZ128mi = 9731,
9748
    VPERMILPSZ128mik  = 9732,
9749
    VPERMILPSZ128mikz = 9733,
9750
    VPERMILPSZ128ri = 9734,
9751
    VPERMILPSZ128rik  = 9735,
9752
    VPERMILPSZ128rikz = 9736,
9753
    VPERMILPSZ128rm = 9737,
9754
    VPERMILPSZ128rmb  = 9738,
9755
    VPERMILPSZ128rmbk = 9739,
9756
    VPERMILPSZ128rmbkz  = 9740,
9757
    VPERMILPSZ128rmk  = 9741,
9758
    VPERMILPSZ128rmkz = 9742,
9759
    VPERMILPSZ128rr = 9743,
9760
    VPERMILPSZ128rrk  = 9744,
9761
    VPERMILPSZ128rrkz = 9745,
9762
    VPERMILPSZ256mbi  = 9746,
9763
    VPERMILPSZ256mbik = 9747,
9764
    VPERMILPSZ256mbikz  = 9748,
9765
    VPERMILPSZ256mi = 9749,
9766
    VPERMILPSZ256mik  = 9750,
9767
    VPERMILPSZ256mikz = 9751,
9768
    VPERMILPSZ256ri = 9752,
9769
    VPERMILPSZ256rik  = 9753,
9770
    VPERMILPSZ256rikz = 9754,
9771
    VPERMILPSZ256rm = 9755,
9772
    VPERMILPSZ256rmb  = 9756,
9773
    VPERMILPSZ256rmbk = 9757,
9774
    VPERMILPSZ256rmbkz  = 9758,
9775
    VPERMILPSZ256rmk  = 9759,
9776
    VPERMILPSZ256rmkz = 9760,
9777
    VPERMILPSZ256rr = 9761,
9778
    VPERMILPSZ256rrk  = 9762,
9779
    VPERMILPSZ256rrkz = 9763,
9780
    VPERMILPSZmbi = 9764,
9781
    VPERMILPSZmbik  = 9765,
9782
    VPERMILPSZmbikz = 9766,
9783
    VPERMILPSZmi  = 9767,
9784
    VPERMILPSZmik = 9768,
9785
    VPERMILPSZmikz  = 9769,
9786
    VPERMILPSZri  = 9770,
9787
    VPERMILPSZrik = 9771,
9788
    VPERMILPSZrikz  = 9772,
9789
    VPERMILPSZrm  = 9773,
9790
    VPERMILPSZrmb = 9774,
9791
    VPERMILPSZrmbk  = 9775,
9792
    VPERMILPSZrmbkz = 9776,
9793
    VPERMILPSZrmk = 9777,
9794
    VPERMILPSZrmkz  = 9778,
9795
    VPERMILPSZrr  = 9779,
9796
    VPERMILPSZrrk = 9780,
9797
    VPERMILPSZrrkz  = 9781,
9798
    VPERMILPSmi = 9782,
9799
    VPERMILPSri = 9783,
9800
    VPERMILPSrm = 9784,
9801
    VPERMILPSrr = 9785,
9802
    VPERMPDYmi  = 9786,
9803
    VPERMPDYri  = 9787,
9804
    VPERMPDZ256mbi  = 9788,
9805
    VPERMPDZ256mbik = 9789,
9806
    VPERMPDZ256mbikz  = 9790,
9807
    VPERMPDZ256mi = 9791,
9808
    VPERMPDZ256mik  = 9792,
9809
    VPERMPDZ256mikz = 9793,
9810
    VPERMPDZ256ri = 9794,
9811
    VPERMPDZ256rik  = 9795,
9812
    VPERMPDZ256rikz = 9796,
9813
    VPERMPDZ256rm = 9797,
9814
    VPERMPDZ256rmb  = 9798,
9815
    VPERMPDZ256rmbk = 9799,
9816
    VPERMPDZ256rmbkz  = 9800,
9817
    VPERMPDZ256rmk  = 9801,
9818
    VPERMPDZ256rmkz = 9802,
9819
    VPERMPDZ256rr = 9803,
9820
    VPERMPDZ256rrk  = 9804,
9821
    VPERMPDZ256rrkz = 9805,
9822
    VPERMPDZmbi = 9806,
9823
    VPERMPDZmbik  = 9807,
9824
    VPERMPDZmbikz = 9808,
9825
    VPERMPDZmi  = 9809,
9826
    VPERMPDZmik = 9810,
9827
    VPERMPDZmikz  = 9811,
9828
    VPERMPDZri  = 9812,
9829
    VPERMPDZrik = 9813,
9830
    VPERMPDZrikz  = 9814,
9831
    VPERMPDZrm  = 9815,
9832
    VPERMPDZrmb = 9816,
9833
    VPERMPDZrmbk  = 9817,
9834
    VPERMPDZrmbkz = 9818,
9835
    VPERMPDZrmk = 9819,
9836
    VPERMPDZrmkz  = 9820,
9837
    VPERMPDZrr  = 9821,
9838
    VPERMPDZrrk = 9822,
9839
    VPERMPDZrrkz  = 9823,
9840
    VPERMPSYrm  = 9824,
9841
    VPERMPSYrr  = 9825,
9842
    VPERMPSZ256rm = 9826,
9843
    VPERMPSZ256rmb  = 9827,
9844
    VPERMPSZ256rmbk = 9828,
9845
    VPERMPSZ256rmbkz  = 9829,
9846
    VPERMPSZ256rmk  = 9830,
9847
    VPERMPSZ256rmkz = 9831,
9848
    VPERMPSZ256rr = 9832,
9849
    VPERMPSZ256rrk  = 9833,
9850
    VPERMPSZ256rrkz = 9834,
9851
    VPERMPSZrm  = 9835,
9852
    VPERMPSZrmb = 9836,
9853
    VPERMPSZrmbk  = 9837,
9854
    VPERMPSZrmbkz = 9838,
9855
    VPERMPSZrmk = 9839,
9856
    VPERMPSZrmkz  = 9840,
9857
    VPERMPSZrr  = 9841,
9858
    VPERMPSZrrk = 9842,
9859
    VPERMPSZrrkz  = 9843,
9860
    VPERMQYmi = 9844,
9861
    VPERMQYri = 9845,
9862
    VPERMQZ256mbi = 9846,
9863
    VPERMQZ256mbik  = 9847,
9864
    VPERMQZ256mbikz = 9848,
9865
    VPERMQZ256mi  = 9849,
9866
    VPERMQZ256mik = 9850,
9867
    VPERMQZ256mikz  = 9851,
9868
    VPERMQZ256ri  = 9852,
9869
    VPERMQZ256rik = 9853,
9870
    VPERMQZ256rikz  = 9854,
9871
    VPERMQZ256rm  = 9855,
9872
    VPERMQZ256rmb = 9856,
9873
    VPERMQZ256rmbk  = 9857,
9874
    VPERMQZ256rmbkz = 9858,
9875
    VPERMQZ256rmk = 9859,
9876
    VPERMQZ256rmkz  = 9860,
9877
    VPERMQZ256rr  = 9861,
9878
    VPERMQZ256rrk = 9862,
9879
    VPERMQZ256rrkz  = 9863,
9880
    VPERMQZmbi  = 9864,
9881
    VPERMQZmbik = 9865,
9882
    VPERMQZmbikz  = 9866,
9883
    VPERMQZmi = 9867,
9884
    VPERMQZmik  = 9868,
9885
    VPERMQZmikz = 9869,
9886
    VPERMQZri = 9870,
9887
    VPERMQZrik  = 9871,
9888
    VPERMQZrikz = 9872,
9889
    VPERMQZrm = 9873,
9890
    VPERMQZrmb  = 9874,
9891
    VPERMQZrmbk = 9875,
9892
    VPERMQZrmbkz  = 9876,
9893
    VPERMQZrmk  = 9877,
9894
    VPERMQZrmkz = 9878,
9895
    VPERMQZrr = 9879,
9896
    VPERMQZrrk  = 9880,
9897
    VPERMQZrrkz = 9881,
9898
    VPERMT2B128rm = 9882,
9899
    VPERMT2B128rmk  = 9883,
9900
    VPERMT2B128rmkz = 9884,
9901
    VPERMT2B128rr = 9885,
9902
    VPERMT2B128rrk  = 9886,
9903
    VPERMT2B128rrkz = 9887,
9904
    VPERMT2B256rm = 9888,
9905
    VPERMT2B256rmk  = 9889,
9906
    VPERMT2B256rmkz = 9890,
9907
    VPERMT2B256rr = 9891,
9908
    VPERMT2B256rrk  = 9892,
9909
    VPERMT2B256rrkz = 9893,
9910
    VPERMT2Brm  = 9894,
9911
    VPERMT2Brmk = 9895,
9912
    VPERMT2Brmkz  = 9896,
9913
    VPERMT2Brr  = 9897,
9914
    VPERMT2Brrk = 9898,
9915
    VPERMT2Brrkz  = 9899,
9916
    VPERMT2D128rm = 9900,
9917
    VPERMT2D128rmb  = 9901,
9918
    VPERMT2D128rmbk = 9902,
9919
    VPERMT2D128rmbkz  = 9903,
9920
    VPERMT2D128rmk  = 9904,
9921
    VPERMT2D128rmkz = 9905,
9922
    VPERMT2D128rr = 9906,
9923
    VPERMT2D128rrk  = 9907,
9924
    VPERMT2D128rrkz = 9908,
9925
    VPERMT2D256rm = 9909,
9926
    VPERMT2D256rmb  = 9910,
9927
    VPERMT2D256rmbk = 9911,
9928
    VPERMT2D256rmbkz  = 9912,
9929
    VPERMT2D256rmk  = 9913,
9930
    VPERMT2D256rmkz = 9914,
9931
    VPERMT2D256rr = 9915,
9932
    VPERMT2D256rrk  = 9916,
9933
    VPERMT2D256rrkz = 9917,
9934
    VPERMT2Drm  = 9918,
9935
    VPERMT2Drmb = 9919,
9936
    VPERMT2Drmbk  = 9920,
9937
    VPERMT2Drmbkz = 9921,
9938
    VPERMT2Drmk = 9922,
9939
    VPERMT2Drmkz  = 9923,
9940
    VPERMT2Drr  = 9924,
9941
    VPERMT2Drrk = 9925,
9942
    VPERMT2Drrkz  = 9926,
9943
    VPERMT2PD128rm  = 9927,
9944
    VPERMT2PD128rmb = 9928,
9945
    VPERMT2PD128rmbk  = 9929,
9946
    VPERMT2PD128rmbkz = 9930,
9947
    VPERMT2PD128rmk = 9931,
9948
    VPERMT2PD128rmkz  = 9932,
9949
    VPERMT2PD128rr  = 9933,
9950
    VPERMT2PD128rrk = 9934,
9951
    VPERMT2PD128rrkz  = 9935,
9952
    VPERMT2PD256rm  = 9936,
9953
    VPERMT2PD256rmb = 9937,
9954
    VPERMT2PD256rmbk  = 9938,
9955
    VPERMT2PD256rmbkz = 9939,
9956
    VPERMT2PD256rmk = 9940,
9957
    VPERMT2PD256rmkz  = 9941,
9958
    VPERMT2PD256rr  = 9942,
9959
    VPERMT2PD256rrk = 9943,
9960
    VPERMT2PD256rrkz  = 9944,
9961
    VPERMT2PDrm = 9945,
9962
    VPERMT2PDrmb  = 9946,
9963
    VPERMT2PDrmbk = 9947,
9964
    VPERMT2PDrmbkz  = 9948,
9965
    VPERMT2PDrmk  = 9949,
9966
    VPERMT2PDrmkz = 9950,
9967
    VPERMT2PDrr = 9951,
9968
    VPERMT2PDrrk  = 9952,
9969
    VPERMT2PDrrkz = 9953,
9970
    VPERMT2PS128rm  = 9954,
9971
    VPERMT2PS128rmb = 9955,
9972
    VPERMT2PS128rmbk  = 9956,
9973
    VPERMT2PS128rmbkz = 9957,
9974
    VPERMT2PS128rmk = 9958,
9975
    VPERMT2PS128rmkz  = 9959,
9976
    VPERMT2PS128rr  = 9960,
9977
    VPERMT2PS128rrk = 9961,
9978
    VPERMT2PS128rrkz  = 9962,
9979
    VPERMT2PS256rm  = 9963,
9980
    VPERMT2PS256rmb = 9964,
9981
    VPERMT2PS256rmbk  = 9965,
9982
    VPERMT2PS256rmbkz = 9966,
9983
    VPERMT2PS256rmk = 9967,
9984
    VPERMT2PS256rmkz  = 9968,
9985
    VPERMT2PS256rr  = 9969,
9986
    VPERMT2PS256rrk = 9970,
9987
    VPERMT2PS256rrkz  = 9971,
9988
    VPERMT2PSrm = 9972,
9989
    VPERMT2PSrmb  = 9973,
9990
    VPERMT2PSrmbk = 9974,
9991
    VPERMT2PSrmbkz  = 9975,
9992
    VPERMT2PSrmk  = 9976,
9993
    VPERMT2PSrmkz = 9977,
9994
    VPERMT2PSrr = 9978,
9995
    VPERMT2PSrrk  = 9979,
9996
    VPERMT2PSrrkz = 9980,
9997
    VPERMT2Q128rm = 9981,
9998
    VPERMT2Q128rmb  = 9982,
9999
    VPERMT2Q128rmbk = 9983,
10000
    VPERMT2Q128rmbkz  = 9984,
10001
    VPERMT2Q128rmk  = 9985,
10002
    VPERMT2Q128rmkz = 9986,
10003
    VPERMT2Q128rr = 9987,
10004
    VPERMT2Q128rrk  = 9988,
10005
    VPERMT2Q128rrkz = 9989,
10006
    VPERMT2Q256rm = 9990,
10007
    VPERMT2Q256rmb  = 9991,
10008
    VPERMT2Q256rmbk = 9992,
10009
    VPERMT2Q256rmbkz  = 9993,
10010
    VPERMT2Q256rmk  = 9994,
10011
    VPERMT2Q256rmkz = 9995,
10012
    VPERMT2Q256rr = 9996,
10013
    VPERMT2Q256rrk  = 9997,
10014
    VPERMT2Q256rrkz = 9998,
10015
    VPERMT2Qrm  = 9999,
10016
    VPERMT2Qrmb = 10000,
10017
    VPERMT2Qrmbk  = 10001,
10018
    VPERMT2Qrmbkz = 10002,
10019
    VPERMT2Qrmk = 10003,
10020
    VPERMT2Qrmkz  = 10004,
10021
    VPERMT2Qrr  = 10005,
10022
    VPERMT2Qrrk = 10006,
10023
    VPERMT2Qrrkz  = 10007,
10024
    VPERMT2W128rm = 10008,
10025
    VPERMT2W128rmk  = 10009,
10026
    VPERMT2W128rmkz = 10010,
10027
    VPERMT2W128rr = 10011,
10028
    VPERMT2W128rrk  = 10012,
10029
    VPERMT2W128rrkz = 10013,
10030
    VPERMT2W256rm = 10014,
10031
    VPERMT2W256rmk  = 10015,
10032
    VPERMT2W256rmkz = 10016,
10033
    VPERMT2W256rr = 10017,
10034
    VPERMT2W256rrk  = 10018,
10035
    VPERMT2W256rrkz = 10019,
10036
    VPERMT2Wrm  = 10020,
10037
    VPERMT2Wrmk = 10021,
10038
    VPERMT2Wrmkz  = 10022,
10039
    VPERMT2Wrr  = 10023,
10040
    VPERMT2Wrrk = 10024,
10041
    VPERMT2Wrrkz  = 10025,
10042
    VPERMWZ128rm  = 10026,
10043
    VPERMWZ128rmk = 10027,
10044
    VPERMWZ128rmkz  = 10028,
10045
    VPERMWZ128rr  = 10029,
10046
    VPERMWZ128rrk = 10030,
10047
    VPERMWZ128rrkz  = 10031,
10048
    VPERMWZ256rm  = 10032,
10049
    VPERMWZ256rmk = 10033,
10050
    VPERMWZ256rmkz  = 10034,
10051
    VPERMWZ256rr  = 10035,
10052
    VPERMWZ256rrk = 10036,
10053
    VPERMWZ256rrkz  = 10037,
10054
    VPERMWZrm = 10038,
10055
    VPERMWZrmk  = 10039,
10056
    VPERMWZrmkz = 10040,
10057
    VPERMWZrr = 10041,
10058
    VPERMWZrrk  = 10042,
10059
    VPERMWZrrkz = 10043,
10060
    VPEXPANDDZ128rm = 10044,
10061
    VPEXPANDDZ128rmk  = 10045,
10062
    VPEXPANDDZ128rmkz = 10046,
10063
    VPEXPANDDZ128rr = 10047,
10064
    VPEXPANDDZ128rrk  = 10048,
10065
    VPEXPANDDZ128rrkz = 10049,
10066
    VPEXPANDDZ256rm = 10050,
10067
    VPEXPANDDZ256rmk  = 10051,
10068
    VPEXPANDDZ256rmkz = 10052,
10069
    VPEXPANDDZ256rr = 10053,
10070
    VPEXPANDDZ256rrk  = 10054,
10071
    VPEXPANDDZ256rrkz = 10055,
10072
    VPEXPANDDZrm  = 10056,
10073
    VPEXPANDDZrmk = 10057,
10074
    VPEXPANDDZrmkz  = 10058,
10075
    VPEXPANDDZrr  = 10059,
10076
    VPEXPANDDZrrk = 10060,
10077
    VPEXPANDDZrrkz  = 10061,
10078
    VPEXPANDQZ128rm = 10062,
10079
    VPEXPANDQZ128rmk  = 10063,
10080
    VPEXPANDQZ128rmkz = 10064,
10081
    VPEXPANDQZ128rr = 10065,
10082
    VPEXPANDQZ128rrk  = 10066,
10083
    VPEXPANDQZ128rrkz = 10067,
10084
    VPEXPANDQZ256rm = 10068,
10085
    VPEXPANDQZ256rmk  = 10069,
10086
    VPEXPANDQZ256rmkz = 10070,
10087
    VPEXPANDQZ256rr = 10071,
10088
    VPEXPANDQZ256rrk  = 10072,
10089
    VPEXPANDQZ256rrkz = 10073,
10090
    VPEXPANDQZrm  = 10074,
10091
    VPEXPANDQZrmk = 10075,
10092
    VPEXPANDQZrmkz  = 10076,
10093
    VPEXPANDQZrr  = 10077,
10094
    VPEXPANDQZrrk = 10078,
10095
    VPEXPANDQZrrkz  = 10079,
10096
    VPEXTRBZmr  = 10080,
10097
    VPEXTRBZrr  = 10081,
10098
    VPEXTRBmr = 10082,
10099
    VPEXTRBrr = 10083,
10100
    VPEXTRDZmr  = 10084,
10101
    VPEXTRDZrr  = 10085,
10102
    VPEXTRDmr = 10086,
10103
    VPEXTRDrr = 10087,
10104
    VPEXTRQZmr  = 10088,
10105
    VPEXTRQZrr  = 10089,
10106
    VPEXTRQmr = 10090,
10107
    VPEXTRQrr = 10091,
10108
    VPEXTRWZmr  = 10092,
10109
    VPEXTRWZrr  = 10093,
10110
    VPEXTRWZrr_REV  = 10094,
10111
    VPEXTRWmr = 10095,
10112
    VPEXTRWri = 10096,
10113
    VPEXTRWrr_REV = 10097,
10114
    VPGATHERDDYrm = 10098,
10115
    VPGATHERDDZ128rm  = 10099,
10116
    VPGATHERDDZ256rm  = 10100,
10117
    VPGATHERDDZrm = 10101,
10118
    VPGATHERDDrm  = 10102,
10119
    VPGATHERDQYrm = 10103,
10120
    VPGATHERDQZ128rm  = 10104,
10121
    VPGATHERDQZ256rm  = 10105,
10122
    VPGATHERDQZrm = 10106,
10123
    VPGATHERDQrm  = 10107,
10124
    VPGATHERQDYrm = 10108,
10125
    VPGATHERQDZ128rm  = 10109,
10126
    VPGATHERQDZ256rm  = 10110,
10127
    VPGATHERQDZrm = 10111,
10128
    VPGATHERQDrm  = 10112,
10129
    VPGATHERQQYrm = 10113,
10130
    VPGATHERQQZ128rm  = 10114,
10131
    VPGATHERQQZ256rm  = 10115,
10132
    VPGATHERQQZrm = 10116,
10133
    VPGATHERQQrm  = 10117,
10134
    VPHADDBDrm  = 10118,
10135
    VPHADDBDrr  = 10119,
10136
    VPHADDBQrm  = 10120,
10137
    VPHADDBQrr  = 10121,
10138
    VPHADDBWrm  = 10122,
10139
    VPHADDBWrr  = 10123,
10140
    VPHADDDQrm  = 10124,
10141
    VPHADDDQrr  = 10125,
10142
    VPHADDDYrm  = 10126,
10143
    VPHADDDYrr  = 10127,
10144
    VPHADDDrm = 10128,
10145
    VPHADDDrr = 10129,
10146
    VPHADDSWrm128 = 10130,
10147
    VPHADDSWrm256 = 10131,
10148
    VPHADDSWrr128 = 10132,
10149
    VPHADDSWrr256 = 10133,
10150
    VPHADDUBDrm = 10134,
10151
    VPHADDUBDrr = 10135,
10152
    VPHADDUBQrm = 10136,
10153
    VPHADDUBQrr = 10137,
10154
    VPHADDUBWrm = 10138,
10155
    VPHADDUBWrr = 10139,
10156
    VPHADDUDQrm = 10140,
10157
    VPHADDUDQrr = 10141,
10158
    VPHADDUWDrm = 10142,
10159
    VPHADDUWDrr = 10143,
10160
    VPHADDUWQrm = 10144,
10161
    VPHADDUWQrr = 10145,
10162
    VPHADDWDrm  = 10146,
10163
    VPHADDWDrr  = 10147,
10164
    VPHADDWQrm  = 10148,
10165
    VPHADDWQrr  = 10149,
10166
    VPHADDWYrm  = 10150,
10167
    VPHADDWYrr  = 10151,
10168
    VPHADDWrm = 10152,
10169
    VPHADDWrr = 10153,
10170
    VPHMINPOSUWrm128  = 10154,
10171
    VPHMINPOSUWrr128  = 10155,
10172
    VPHSUBBWrm  = 10156,
10173
    VPHSUBBWrr  = 10157,
10174
    VPHSUBDQrm  = 10158,
10175
    VPHSUBDQrr  = 10159,
10176
    VPHSUBDYrm  = 10160,
10177
    VPHSUBDYrr  = 10161,
10178
    VPHSUBDrm = 10162,
10179
    VPHSUBDrr = 10163,
10180
    VPHSUBSWrm128 = 10164,
10181
    VPHSUBSWrm256 = 10165,
10182
    VPHSUBSWrr128 = 10166,
10183
    VPHSUBSWrr256 = 10167,
10184
    VPHSUBWDrm  = 10168,
10185
    VPHSUBWDrr  = 10169,
10186
    VPHSUBWYrm  = 10170,
10187
    VPHSUBWYrr  = 10171,
10188
    VPHSUBWrm = 10172,
10189
    VPHSUBWrr = 10173,
10190
    VPINSRBZrm  = 10174,
10191
    VPINSRBZrr  = 10175,
10192
    VPINSRBrm = 10176,
10193
    VPINSRBrr = 10177,
10194
    VPINSRDZrm  = 10178,
10195
    VPINSRDZrr  = 10179,
10196
    VPINSRDrm = 10180,
10197
    VPINSRDrr = 10181,
10198
    VPINSRQZrm  = 10182,
10199
    VPINSRQZrr  = 10183,
10200
    VPINSRQrm = 10184,
10201
    VPINSRQrr = 10185,
10202
    VPINSRWZrm  = 10186,
10203
    VPINSRWZrr  = 10187,
10204
    VPINSRWrmi  = 10188,
10205
    VPINSRWrri  = 10189,
10206
    VPLZCNTDZ128rm  = 10190,
10207
    VPLZCNTDZ128rmb = 10191,
10208
    VPLZCNTDZ128rmbk  = 10192,
10209
    VPLZCNTDZ128rmbkz = 10193,
10210
    VPLZCNTDZ128rmk = 10194,
10211
    VPLZCNTDZ128rmkz  = 10195,
10212
    VPLZCNTDZ128rr  = 10196,
10213
    VPLZCNTDZ128rrk = 10197,
10214
    VPLZCNTDZ128rrkz  = 10198,
10215
    VPLZCNTDZ256rm  = 10199,
10216
    VPLZCNTDZ256rmb = 10200,
10217
    VPLZCNTDZ256rmbk  = 10201,
10218
    VPLZCNTDZ256rmbkz = 10202,
10219
    VPLZCNTDZ256rmk = 10203,
10220
    VPLZCNTDZ256rmkz  = 10204,
10221
    VPLZCNTDZ256rr  = 10205,
10222
    VPLZCNTDZ256rrk = 10206,
10223
    VPLZCNTDZ256rrkz  = 10207,
10224
    VPLZCNTDZrm = 10208,
10225
    VPLZCNTDZrmb  = 10209,
10226
    VPLZCNTDZrmbk = 10210,
10227
    VPLZCNTDZrmbkz  = 10211,
10228
    VPLZCNTDZrmk  = 10212,
10229
    VPLZCNTDZrmkz = 10213,
10230
    VPLZCNTDZrr = 10214,
10231
    VPLZCNTDZrrk  = 10215,
10232
    VPLZCNTDZrrkz = 10216,
10233
    VPLZCNTQZ128rm  = 10217,
10234
    VPLZCNTQZ128rmb = 10218,
10235
    VPLZCNTQZ128rmbk  = 10219,
10236
    VPLZCNTQZ128rmbkz = 10220,
10237
    VPLZCNTQZ128rmk = 10221,
10238
    VPLZCNTQZ128rmkz  = 10222,
10239
    VPLZCNTQZ128rr  = 10223,
10240
    VPLZCNTQZ128rrk = 10224,
10241
    VPLZCNTQZ128rrkz  = 10225,
10242
    VPLZCNTQZ256rm  = 10226,
10243
    VPLZCNTQZ256rmb = 10227,
10244
    VPLZCNTQZ256rmbk  = 10228,
10245
    VPLZCNTQZ256rmbkz = 10229,
10246
    VPLZCNTQZ256rmk = 10230,
10247
    VPLZCNTQZ256rmkz  = 10231,
10248
    VPLZCNTQZ256rr  = 10232,
10249
    VPLZCNTQZ256rrk = 10233,
10250
    VPLZCNTQZ256rrkz  = 10234,
10251
    VPLZCNTQZrm = 10235,
10252
    VPLZCNTQZrmb  = 10236,
10253
    VPLZCNTQZrmbk = 10237,
10254
    VPLZCNTQZrmbkz  = 10238,
10255
    VPLZCNTQZrmk  = 10239,
10256
    VPLZCNTQZrmkz = 10240,
10257
    VPLZCNTQZrr = 10241,
10258
    VPLZCNTQZrrk  = 10242,
10259
    VPLZCNTQZrrkz = 10243,
10260
    VPMACSDDrm  = 10244,
10261
    VPMACSDDrr  = 10245,
10262
    VPMACSDQHrm = 10246,
10263
    VPMACSDQHrr = 10247,
10264
    VPMACSDQLrm = 10248,
10265
    VPMACSDQLrr = 10249,
10266
    VPMACSSDDrm = 10250,
10267
    VPMACSSDDrr = 10251,
10268
    VPMACSSDQHrm  = 10252,
10269
    VPMACSSDQHrr  = 10253,
10270
    VPMACSSDQLrm  = 10254,
10271
    VPMACSSDQLrr  = 10255,
10272
    VPMACSSWDrm = 10256,
10273
    VPMACSSWDrr = 10257,
10274
    VPMACSSWWrm = 10258,
10275
    VPMACSSWWrr = 10259,
10276
    VPMACSWDrm  = 10260,
10277
    VPMACSWDrr  = 10261,
10278
    VPMACSWWrm  = 10262,
10279
    VPMACSWWrr  = 10263,
10280
    VPMADCSSWDrm  = 10264,
10281
    VPMADCSSWDrr  = 10265,
10282
    VPMADCSWDrm = 10266,
10283
    VPMADCSWDrr = 10267,
10284
    VPMADD52HUQZ128m  = 10268,
10285
    VPMADD52HUQZ128mb = 10269,
10286
    VPMADD52HUQZ128mbk  = 10270,
10287
    VPMADD52HUQZ128mbkz = 10271,
10288
    VPMADD52HUQZ128mk = 10272,
10289
    VPMADD52HUQZ128mkz  = 10273,
10290
    VPMADD52HUQZ128r  = 10274,
10291
    VPMADD52HUQZ128rk = 10275,
10292
    VPMADD52HUQZ128rkz  = 10276,
10293
    VPMADD52HUQZ256m  = 10277,
10294
    VPMADD52HUQZ256mb = 10278,
10295
    VPMADD52HUQZ256mbk  = 10279,
10296
    VPMADD52HUQZ256mbkz = 10280,
10297
    VPMADD52HUQZ256mk = 10281,
10298
    VPMADD52HUQZ256mkz  = 10282,
10299
    VPMADD52HUQZ256r  = 10283,
10300
    VPMADD52HUQZ256rk = 10284,
10301
    VPMADD52HUQZ256rkz  = 10285,
10302
    VPMADD52HUQZm = 10286,
10303
    VPMADD52HUQZmb  = 10287,
10304
    VPMADD52HUQZmbk = 10288,
10305
    VPMADD52HUQZmbkz  = 10289,
10306
    VPMADD52HUQZmk  = 10290,
10307
    VPMADD52HUQZmkz = 10291,
10308
    VPMADD52HUQZr = 10292,
10309
    VPMADD52HUQZrk  = 10293,
10310
    VPMADD52HUQZrkz = 10294,
10311
    VPMADD52LUQZ128m  = 10295,
10312
    VPMADD52LUQZ128mb = 10296,
10313
    VPMADD52LUQZ128mbk  = 10297,
10314
    VPMADD52LUQZ128mbkz = 10298,
10315
    VPMADD52LUQZ128mk = 10299,
10316
    VPMADD52LUQZ128mkz  = 10300,
10317
    VPMADD52LUQZ128r  = 10301,
10318
    VPMADD52LUQZ128rk = 10302,
10319
    VPMADD52LUQZ128rkz  = 10303,
10320
    VPMADD52LUQZ256m  = 10304,
10321
    VPMADD52LUQZ256mb = 10305,
10322
    VPMADD52LUQZ256mbk  = 10306,
10323
    VPMADD52LUQZ256mbkz = 10307,
10324
    VPMADD52LUQZ256mk = 10308,
10325
    VPMADD52LUQZ256mkz  = 10309,
10326
    VPMADD52LUQZ256r  = 10310,
10327
    VPMADD52LUQZ256rk = 10311,
10328
    VPMADD52LUQZ256rkz  = 10312,
10329
    VPMADD52LUQZm = 10313,
10330
    VPMADD52LUQZmb  = 10314,
10331
    VPMADD52LUQZmbk = 10315,
10332
    VPMADD52LUQZmbkz  = 10316,
10333
    VPMADD52LUQZmk  = 10317,
10334
    VPMADD52LUQZmkz = 10318,
10335
    VPMADD52LUQZr = 10319,
10336
    VPMADD52LUQZrk  = 10320,
10337
    VPMADD52LUQZrkz = 10321,
10338
    VPMADDUBSWZ128rm  = 10322,
10339
    VPMADDUBSWZ128rmk = 10323,
10340
    VPMADDUBSWZ128rmkz  = 10324,
10341
    VPMADDUBSWZ128rr  = 10325,
10342
    VPMADDUBSWZ128rrk = 10326,
10343
    VPMADDUBSWZ128rrkz  = 10327,
10344
    VPMADDUBSWZ256rm  = 10328,
10345
    VPMADDUBSWZ256rmk = 10329,
10346
    VPMADDUBSWZ256rmkz  = 10330,
10347
    VPMADDUBSWZ256rr  = 10331,
10348
    VPMADDUBSWZ256rrk = 10332,
10349
    VPMADDUBSWZ256rrkz  = 10333,
10350
    VPMADDUBSWZrm = 10334,
10351
    VPMADDUBSWZrmk  = 10335,
10352
    VPMADDUBSWZrmkz = 10336,
10353
    VPMADDUBSWZrr = 10337,
10354
    VPMADDUBSWZrrk  = 10338,
10355
    VPMADDUBSWZrrkz = 10339,
10356
    VPMADDUBSWrm128 = 10340,
10357
    VPMADDUBSWrm256 = 10341,
10358
    VPMADDUBSWrr128 = 10342,
10359
    VPMADDUBSWrr256 = 10343,
10360
    VPMADDWDYrm = 10344,
10361
    VPMADDWDYrr = 10345,
10362
    VPMADDWDZ128rm  = 10346,
10363
    VPMADDWDZ128rmk = 10347,
10364
    VPMADDWDZ128rmkz  = 10348,
10365
    VPMADDWDZ128rr  = 10349,
10366
    VPMADDWDZ128rrk = 10350,
10367
    VPMADDWDZ128rrkz  = 10351,
10368
    VPMADDWDZ256rm  = 10352,
10369
    VPMADDWDZ256rmk = 10353,
10370
    VPMADDWDZ256rmkz  = 10354,
10371
    VPMADDWDZ256rr  = 10355,
10372
    VPMADDWDZ256rrk = 10356,
10373
    VPMADDWDZ256rrkz  = 10357,
10374
    VPMADDWDZrm = 10358,
10375
    VPMADDWDZrmk  = 10359,
10376
    VPMADDWDZrmkz = 10360,
10377
    VPMADDWDZrr = 10361,
10378
    VPMADDWDZrrk  = 10362,
10379
    VPMADDWDZrrkz = 10363,
10380
    VPMADDWDrm  = 10364,
10381
    VPMADDWDrr  = 10365,
10382
    VPMASKMOVDYmr = 10366,
10383
    VPMASKMOVDYrm = 10367,
10384
    VPMASKMOVDmr  = 10368,
10385
    VPMASKMOVDrm  = 10369,
10386
    VPMASKMOVQYmr = 10370,
10387
    VPMASKMOVQYrm = 10371,
10388
    VPMASKMOVQmr  = 10372,
10389
    VPMASKMOVQrm  = 10373,
10390
    VPMAXSBYrm  = 10374,
10391
    VPMAXSBYrr  = 10375,
10392
    VPMAXSBZ128rm = 10376,
10393
    VPMAXSBZ128rmk  = 10377,
10394
    VPMAXSBZ128rmkz = 10378,
10395
    VPMAXSBZ128rr = 10379,
10396
    VPMAXSBZ128rrk  = 10380,
10397
    VPMAXSBZ128rrkz = 10381,
10398
    VPMAXSBZ256rm = 10382,
10399
    VPMAXSBZ256rmk  = 10383,
10400
    VPMAXSBZ256rmkz = 10384,
10401
    VPMAXSBZ256rr = 10385,
10402
    VPMAXSBZ256rrk  = 10386,
10403
    VPMAXSBZ256rrkz = 10387,
10404
    VPMAXSBZrm  = 10388,
10405
    VPMAXSBZrmk = 10389,
10406
    VPMAXSBZrmkz  = 10390,
10407
    VPMAXSBZrr  = 10391,
10408
    VPMAXSBZrrk = 10392,
10409
    VPMAXSBZrrkz  = 10393,
10410
    VPMAXSBrm = 10394,
10411
    VPMAXSBrr = 10395,
10412
    VPMAXSDYrm  = 10396,
10413
    VPMAXSDYrr  = 10397,
10414
    VPMAXSDZ128rm = 10398,
10415
    VPMAXSDZ128rmb  = 10399,
10416
    VPMAXSDZ128rmbk = 10400,
10417
    VPMAXSDZ128rmbkz  = 10401,
10418
    VPMAXSDZ128rmk  = 10402,
10419
    VPMAXSDZ128rmkz = 10403,
10420
    VPMAXSDZ128rr = 10404,
10421
    VPMAXSDZ128rrk  = 10405,
10422
    VPMAXSDZ128rrkz = 10406,
10423
    VPMAXSDZ256rm = 10407,
10424
    VPMAXSDZ256rmb  = 10408,
10425
    VPMAXSDZ256rmbk = 10409,
10426
    VPMAXSDZ256rmbkz  = 10410,
10427
    VPMAXSDZ256rmk  = 10411,
10428
    VPMAXSDZ256rmkz = 10412,
10429
    VPMAXSDZ256rr = 10413,
10430
    VPMAXSDZ256rrk  = 10414,
10431
    VPMAXSDZ256rrkz = 10415,
10432
    VPMAXSDZrm  = 10416,
10433
    VPMAXSDZrmb = 10417,
10434
    VPMAXSDZrmbk  = 10418,
10435
    VPMAXSDZrmbkz = 10419,
10436
    VPMAXSDZrmk = 10420,
10437
    VPMAXSDZrmkz  = 10421,
10438
    VPMAXSDZrr  = 10422,
10439
    VPMAXSDZrrk = 10423,
10440
    VPMAXSDZrrkz  = 10424,
10441
    VPMAXSDrm = 10425,
10442
    VPMAXSDrr = 10426,
10443
    VPMAXSQZ128rm = 10427,
10444
    VPMAXSQZ128rmb  = 10428,
10445
    VPMAXSQZ128rmbk = 10429,
10446
    VPMAXSQZ128rmbkz  = 10430,
10447
    VPMAXSQZ128rmk  = 10431,
10448
    VPMAXSQZ128rmkz = 10432,
10449
    VPMAXSQZ128rr = 10433,
10450
    VPMAXSQZ128rrk  = 10434,
10451
    VPMAXSQZ128rrkz = 10435,
10452
    VPMAXSQZ256rm = 10436,
10453
    VPMAXSQZ256rmb  = 10437,
10454
    VPMAXSQZ256rmbk = 10438,
10455
    VPMAXSQZ256rmbkz  = 10439,
10456
    VPMAXSQZ256rmk  = 10440,
10457
    VPMAXSQZ256rmkz = 10441,
10458
    VPMAXSQZ256rr = 10442,
10459
    VPMAXSQZ256rrk  = 10443,
10460
    VPMAXSQZ256rrkz = 10444,
10461
    VPMAXSQZrm  = 10445,
10462
    VPMAXSQZrmb = 10446,
10463
    VPMAXSQZrmbk  = 10447,
10464
    VPMAXSQZrmbkz = 10448,
10465
    VPMAXSQZrmk = 10449,
10466
    VPMAXSQZrmkz  = 10450,
10467
    VPMAXSQZrr  = 10451,
10468
    VPMAXSQZrrk = 10452,
10469
    VPMAXSQZrrkz  = 10453,
10470
    VPMAXSWYrm  = 10454,
10471
    VPMAXSWYrr  = 10455,
10472
    VPMAXSWZ128rm = 10456,
10473
    VPMAXSWZ128rmk  = 10457,
10474
    VPMAXSWZ128rmkz = 10458,
10475
    VPMAXSWZ128rr = 10459,
10476
    VPMAXSWZ128rrk  = 10460,
10477
    VPMAXSWZ128rrkz = 10461,
10478
    VPMAXSWZ256rm = 10462,
10479
    VPMAXSWZ256rmk  = 10463,
10480
    VPMAXSWZ256rmkz = 10464,
10481
    VPMAXSWZ256rr = 10465,
10482
    VPMAXSWZ256rrk  = 10466,
10483
    VPMAXSWZ256rrkz = 10467,
10484
    VPMAXSWZrm  = 10468,
10485
    VPMAXSWZrmk = 10469,
10486
    VPMAXSWZrmkz  = 10470,
10487
    VPMAXSWZrr  = 10471,
10488
    VPMAXSWZrrk = 10472,
10489
    VPMAXSWZrrkz  = 10473,
10490
    VPMAXSWrm = 10474,
10491
    VPMAXSWrr = 10475,
10492
    VPMAXUBYrm  = 10476,
10493
    VPMAXUBYrr  = 10477,
10494
    VPMAXUBZ128rm = 10478,
10495
    VPMAXUBZ128rmk  = 10479,
10496
    VPMAXUBZ128rmkz = 10480,
10497
    VPMAXUBZ128rr = 10481,
10498
    VPMAXUBZ128rrk  = 10482,
10499
    VPMAXUBZ128rrkz = 10483,
10500
    VPMAXUBZ256rm = 10484,
10501
    VPMAXUBZ256rmk  = 10485,
10502
    VPMAXUBZ256rmkz = 10486,
10503
    VPMAXUBZ256rr = 10487,
10504
    VPMAXUBZ256rrk  = 10488,
10505
    VPMAXUBZ256rrkz = 10489,
10506
    VPMAXUBZrm  = 10490,
10507
    VPMAXUBZrmk = 10491,
10508
    VPMAXUBZrmkz  = 10492,
10509
    VPMAXUBZrr  = 10493,
10510
    VPMAXUBZrrk = 10494,
10511
    VPMAXUBZrrkz  = 10495,
10512
    VPMAXUBrm = 10496,
10513
    VPMAXUBrr = 10497,
10514
    VPMAXUDYrm  = 10498,
10515
    VPMAXUDYrr  = 10499,
10516
    VPMAXUDZ128rm = 10500,
10517
    VPMAXUDZ128rmb  = 10501,
10518
    VPMAXUDZ128rmbk = 10502,
10519
    VPMAXUDZ128rmbkz  = 10503,
10520
    VPMAXUDZ128rmk  = 10504,
10521
    VPMAXUDZ128rmkz = 10505,
10522
    VPMAXUDZ128rr = 10506,
10523
    VPMAXUDZ128rrk  = 10507,
10524
    VPMAXUDZ128rrkz = 10508,
10525
    VPMAXUDZ256rm = 10509,
10526
    VPMAXUDZ256rmb  = 10510,
10527
    VPMAXUDZ256rmbk = 10511,
10528
    VPMAXUDZ256rmbkz  = 10512,
10529
    VPMAXUDZ256rmk  = 10513,
10530
    VPMAXUDZ256rmkz = 10514,
10531
    VPMAXUDZ256rr = 10515,
10532
    VPMAXUDZ256rrk  = 10516,
10533
    VPMAXUDZ256rrkz = 10517,
10534
    VPMAXUDZrm  = 10518,
10535
    VPMAXUDZrmb = 10519,
10536
    VPMAXUDZrmbk  = 10520,
10537
    VPMAXUDZrmbkz = 10521,
10538
    VPMAXUDZrmk = 10522,
10539
    VPMAXUDZrmkz  = 10523,
10540
    VPMAXUDZrr  = 10524,
10541
    VPMAXUDZrrk = 10525,
10542
    VPMAXUDZrrkz  = 10526,
10543
    VPMAXUDrm = 10527,
10544
    VPMAXUDrr = 10528,
10545
    VPMAXUQZ128rm = 10529,
10546
    VPMAXUQZ128rmb  = 10530,
10547
    VPMAXUQZ128rmbk = 10531,
10548
    VPMAXUQZ128rmbkz  = 10532,
10549
    VPMAXUQZ128rmk  = 10533,
10550
    VPMAXUQZ128rmkz = 10534,
10551
    VPMAXUQZ128rr = 10535,
10552
    VPMAXUQZ128rrk  = 10536,
10553
    VPMAXUQZ128rrkz = 10537,
10554
    VPMAXUQZ256rm = 10538,
10555
    VPMAXUQZ256rmb  = 10539,
10556
    VPMAXUQZ256rmbk = 10540,
10557
    VPMAXUQZ256rmbkz  = 10541,
10558
    VPMAXUQZ256rmk  = 10542,
10559
    VPMAXUQZ256rmkz = 10543,
10560
    VPMAXUQZ256rr = 10544,
10561
    VPMAXUQZ256rrk  = 10545,
10562
    VPMAXUQZ256rrkz = 10546,
10563
    VPMAXUQZrm  = 10547,
10564
    VPMAXUQZrmb = 10548,
10565
    VPMAXUQZrmbk  = 10549,
10566
    VPMAXUQZrmbkz = 10550,
10567
    VPMAXUQZrmk = 10551,
10568
    VPMAXUQZrmkz  = 10552,
10569
    VPMAXUQZrr  = 10553,
10570
    VPMAXUQZrrk = 10554,
10571
    VPMAXUQZrrkz  = 10555,
10572
    VPMAXUWYrm  = 10556,
10573
    VPMAXUWYrr  = 10557,
10574
    VPMAXUWZ128rm = 10558,
10575
    VPMAXUWZ128rmk  = 10559,
10576
    VPMAXUWZ128rmkz = 10560,
10577
    VPMAXUWZ128rr = 10561,
10578
    VPMAXUWZ128rrk  = 10562,
10579
    VPMAXUWZ128rrkz = 10563,
10580
    VPMAXUWZ256rm = 10564,
10581
    VPMAXUWZ256rmk  = 10565,
10582
    VPMAXUWZ256rmkz = 10566,
10583
    VPMAXUWZ256rr = 10567,
10584
    VPMAXUWZ256rrk  = 10568,
10585
    VPMAXUWZ256rrkz = 10569,
10586
    VPMAXUWZrm  = 10570,
10587
    VPMAXUWZrmk = 10571,
10588
    VPMAXUWZrmkz  = 10572,
10589
    VPMAXUWZrr  = 10573,
10590
    VPMAXUWZrrk = 10574,
10591
    VPMAXUWZrrkz  = 10575,
10592
    VPMAXUWrm = 10576,
10593
    VPMAXUWrr = 10577,
10594
    VPMINSBYrm  = 10578,
10595
    VPMINSBYrr  = 10579,
10596
    VPMINSBZ128rm = 10580,
10597
    VPMINSBZ128rmk  = 10581,
10598
    VPMINSBZ128rmkz = 10582,
10599
    VPMINSBZ128rr = 10583,
10600
    VPMINSBZ128rrk  = 10584,
10601
    VPMINSBZ128rrkz = 10585,
10602
    VPMINSBZ256rm = 10586,
10603
    VPMINSBZ256rmk  = 10587,
10604
    VPMINSBZ256rmkz = 10588,
10605
    VPMINSBZ256rr = 10589,
10606
    VPMINSBZ256rrk  = 10590,
10607
    VPMINSBZ256rrkz = 10591,
10608
    VPMINSBZrm  = 10592,
10609
    VPMINSBZrmk = 10593,
10610
    VPMINSBZrmkz  = 10594,
10611
    VPMINSBZrr  = 10595,
10612
    VPMINSBZrrk = 10596,
10613
    VPMINSBZrrkz  = 10597,
10614
    VPMINSBrm = 10598,
10615
    VPMINSBrr = 10599,
10616
    VPMINSDYrm  = 10600,
10617
    VPMINSDYrr  = 10601,
10618
    VPMINSDZ128rm = 10602,
10619
    VPMINSDZ128rmb  = 10603,
10620
    VPMINSDZ128rmbk = 10604,
10621
    VPMINSDZ128rmbkz  = 10605,
10622
    VPMINSDZ128rmk  = 10606,
10623
    VPMINSDZ128rmkz = 10607,
10624
    VPMINSDZ128rr = 10608,
10625
    VPMINSDZ128rrk  = 10609,
10626
    VPMINSDZ128rrkz = 10610,
10627
    VPMINSDZ256rm = 10611,
10628
    VPMINSDZ256rmb  = 10612,
10629
    VPMINSDZ256rmbk = 10613,
10630
    VPMINSDZ256rmbkz  = 10614,
10631
    VPMINSDZ256rmk  = 10615,
10632
    VPMINSDZ256rmkz = 10616,
10633
    VPMINSDZ256rr = 10617,
10634
    VPMINSDZ256rrk  = 10618,
10635
    VPMINSDZ256rrkz = 10619,
10636
    VPMINSDZrm  = 10620,
10637
    VPMINSDZrmb = 10621,
10638
    VPMINSDZrmbk  = 10622,
10639
    VPMINSDZrmbkz = 10623,
10640
    VPMINSDZrmk = 10624,
10641
    VPMINSDZrmkz  = 10625,
10642
    VPMINSDZrr  = 10626,
10643
    VPMINSDZrrk = 10627,
10644
    VPMINSDZrrkz  = 10628,
10645
    VPMINSDrm = 10629,
10646
    VPMINSDrr = 10630,
10647
    VPMINSQZ128rm = 10631,
10648
    VPMINSQZ128rmb  = 10632,
10649
    VPMINSQZ128rmbk = 10633,
10650
    VPMINSQZ128rmbkz  = 10634,
10651
    VPMINSQZ128rmk  = 10635,
10652
    VPMINSQZ128rmkz = 10636,
10653
    VPMINSQZ128rr = 10637,
10654
    VPMINSQZ128rrk  = 10638,
10655
    VPMINSQZ128rrkz = 10639,
10656
    VPMINSQZ256rm = 10640,
10657
    VPMINSQZ256rmb  = 10641,
10658
    VPMINSQZ256rmbk = 10642,
10659
    VPMINSQZ256rmbkz  = 10643,
10660
    VPMINSQZ256rmk  = 10644,
10661
    VPMINSQZ256rmkz = 10645,
10662
    VPMINSQZ256rr = 10646,
10663
    VPMINSQZ256rrk  = 10647,
10664
    VPMINSQZ256rrkz = 10648,
10665
    VPMINSQZrm  = 10649,
10666
    VPMINSQZrmb = 10650,
10667
    VPMINSQZrmbk  = 10651,
10668
    VPMINSQZrmbkz = 10652,
10669
    VPMINSQZrmk = 10653,
10670
    VPMINSQZrmkz  = 10654,
10671
    VPMINSQZrr  = 10655,
10672
    VPMINSQZrrk = 10656,
10673
    VPMINSQZrrkz  = 10657,
10674
    VPMINSWYrm  = 10658,
10675
    VPMINSWYrr  = 10659,
10676
    VPMINSWZ128rm = 10660,
10677
    VPMINSWZ128rmk  = 10661,
10678
    VPMINSWZ128rmkz = 10662,
10679
    VPMINSWZ128rr = 10663,
10680
    VPMINSWZ128rrk  = 10664,
10681
    VPMINSWZ128rrkz = 10665,
10682
    VPMINSWZ256rm = 10666,
10683
    VPMINSWZ256rmk  = 10667,
10684
    VPMINSWZ256rmkz = 10668,
10685
    VPMINSWZ256rr = 10669,
10686
    VPMINSWZ256rrk  = 10670,
10687
    VPMINSWZ256rrkz = 10671,
10688
    VPMINSWZrm  = 10672,
10689
    VPMINSWZrmk = 10673,
10690
    VPMINSWZrmkz  = 10674,
10691
    VPMINSWZrr  = 10675,
10692
    VPMINSWZrrk = 10676,
10693
    VPMINSWZrrkz  = 10677,
10694
    VPMINSWrm = 10678,
10695
    VPMINSWrr = 10679,
10696
    VPMINUBYrm  = 10680,
10697
    VPMINUBYrr  = 10681,
10698
    VPMINUBZ128rm = 10682,
10699
    VPMINUBZ128rmk  = 10683,
10700
    VPMINUBZ128rmkz = 10684,
10701
    VPMINUBZ128rr = 10685,
10702
    VPMINUBZ128rrk  = 10686,
10703
    VPMINUBZ128rrkz = 10687,
10704
    VPMINUBZ256rm = 10688,
10705
    VPMINUBZ256rmk  = 10689,
10706
    VPMINUBZ256rmkz = 10690,
10707
    VPMINUBZ256rr = 10691,
10708
    VPMINUBZ256rrk  = 10692,
10709
    VPMINUBZ256rrkz = 10693,
10710
    VPMINUBZrm  = 10694,
10711
    VPMINUBZrmk = 10695,
10712
    VPMINUBZrmkz  = 10696,
10713
    VPMINUBZrr  = 10697,
10714
    VPMINUBZrrk = 10698,
10715
    VPMINUBZrrkz  = 10699,
10716
    VPMINUBrm = 10700,
10717
    VPMINUBrr = 10701,
10718
    VPMINUDYrm  = 10702,
10719
    VPMINUDYrr  = 10703,
10720
    VPMINUDZ128rm = 10704,
10721
    VPMINUDZ128rmb  = 10705,
10722
    VPMINUDZ128rmbk = 10706,
10723
    VPMINUDZ128rmbkz  = 10707,
10724
    VPMINUDZ128rmk  = 10708,
10725
    VPMINUDZ128rmkz = 10709,
10726
    VPMINUDZ128rr = 10710,
10727
    VPMINUDZ128rrk  = 10711,
10728
    VPMINUDZ128rrkz = 10712,
10729
    VPMINUDZ256rm = 10713,
10730
    VPMINUDZ256rmb  = 10714,
10731
    VPMINUDZ256rmbk = 10715,
10732
    VPMINUDZ256rmbkz  = 10716,
10733
    VPMINUDZ256rmk  = 10717,
10734
    VPMINUDZ256rmkz = 10718,
10735
    VPMINUDZ256rr = 10719,
10736
    VPMINUDZ256rrk  = 10720,
10737
    VPMINUDZ256rrkz = 10721,
10738
    VPMINUDZrm  = 10722,
10739
    VPMINUDZrmb = 10723,
10740
    VPMINUDZrmbk  = 10724,
10741
    VPMINUDZrmbkz = 10725,
10742
    VPMINUDZrmk = 10726,
10743
    VPMINUDZrmkz  = 10727,
10744
    VPMINUDZrr  = 10728,
10745
    VPMINUDZrrk = 10729,
10746
    VPMINUDZrrkz  = 10730,
10747
    VPMINUDrm = 10731,
10748
    VPMINUDrr = 10732,
10749
    VPMINUQZ128rm = 10733,
10750
    VPMINUQZ128rmb  = 10734,
10751
    VPMINUQZ128rmbk = 10735,
10752
    VPMINUQZ128rmbkz  = 10736,
10753
    VPMINUQZ128rmk  = 10737,
10754
    VPMINUQZ128rmkz = 10738,
10755
    VPMINUQZ128rr = 10739,
10756
    VPMINUQZ128rrk  = 10740,
10757
    VPMINUQZ128rrkz = 10741,
10758
    VPMINUQZ256rm = 10742,
10759
    VPMINUQZ256rmb  = 10743,
10760
    VPMINUQZ256rmbk = 10744,
10761
    VPMINUQZ256rmbkz  = 10745,
10762
    VPMINUQZ256rmk  = 10746,
10763
    VPMINUQZ256rmkz = 10747,
10764
    VPMINUQZ256rr = 10748,
10765
    VPMINUQZ256rrk  = 10749,
10766
    VPMINUQZ256rrkz = 10750,
10767
    VPMINUQZrm  = 10751,
10768
    VPMINUQZrmb = 10752,
10769
    VPMINUQZrmbk  = 10753,
10770
    VPMINUQZrmbkz = 10754,
10771
    VPMINUQZrmk = 10755,
10772
    VPMINUQZrmkz  = 10756,
10773
    VPMINUQZrr  = 10757,
10774
    VPMINUQZrrk = 10758,
10775
    VPMINUQZrrkz  = 10759,
10776
    VPMINUWYrm  = 10760,
10777
    VPMINUWYrr  = 10761,
10778
    VPMINUWZ128rm = 10762,
10779
    VPMINUWZ128rmk  = 10763,
10780
    VPMINUWZ128rmkz = 10764,
10781
    VPMINUWZ128rr = 10765,
10782
    VPMINUWZ128rrk  = 10766,
10783
    VPMINUWZ128rrkz = 10767,
10784
    VPMINUWZ256rm = 10768,
10785
    VPMINUWZ256rmk  = 10769,
10786
    VPMINUWZ256rmkz = 10770,
10787
    VPMINUWZ256rr = 10771,
10788
    VPMINUWZ256rrk  = 10772,
10789
    VPMINUWZ256rrkz = 10773,
10790
    VPMINUWZrm  = 10774,
10791
    VPMINUWZrmk = 10775,
10792
    VPMINUWZrmkz  = 10776,
10793
    VPMINUWZrr  = 10777,
10794
    VPMINUWZrrk = 10778,
10795
    VPMINUWZrrkz  = 10779,
10796
    VPMINUWrm = 10780,
10797
    VPMINUWrr = 10781,
10798
    VPMOVB2MZ128rr  = 10782,
10799
    VPMOVB2MZ256rr  = 10783,
10800
    VPMOVB2MZrr = 10784,
10801
    VPMOVD2MZ128rr  = 10785,
10802
    VPMOVD2MZ256rr  = 10786,
10803
    VPMOVD2MZrr = 10787,
10804
    VPMOVDBZ128mr = 10788,
10805
    VPMOVDBZ128mrk  = 10789,
10806
    VPMOVDBZ128rr = 10790,
10807
    VPMOVDBZ128rrk  = 10791,
10808
    VPMOVDBZ128rrkz = 10792,
10809
    VPMOVDBZ256mr = 10793,
10810
    VPMOVDBZ256mrk  = 10794,
10811
    VPMOVDBZ256rr = 10795,
10812
    VPMOVDBZ256rrk  = 10796,
10813
    VPMOVDBZ256rrkz = 10797,
10814
    VPMOVDBZmr  = 10798,
10815
    VPMOVDBZmrk = 10799,
10816
    VPMOVDBZrr  = 10800,
10817
    VPMOVDBZrrk = 10801,
10818
    VPMOVDBZrrkz  = 10802,
10819
    VPMOVDWZ128mr = 10803,
10820
    VPMOVDWZ128mrk  = 10804,
10821
    VPMOVDWZ128rr = 10805,
10822
    VPMOVDWZ128rrk  = 10806,
10823
    VPMOVDWZ128rrkz = 10807,
10824
    VPMOVDWZ256mr = 10808,
10825
    VPMOVDWZ256mrk  = 10809,
10826
    VPMOVDWZ256rr = 10810,
10827
    VPMOVDWZ256rrk  = 10811,
10828
    VPMOVDWZ256rrkz = 10812,
10829
    VPMOVDWZmr  = 10813,
10830
    VPMOVDWZmrk = 10814,
10831
    VPMOVDWZrr  = 10815,
10832
    VPMOVDWZrrk = 10816,
10833
    VPMOVDWZrrkz  = 10817,
10834
    VPMOVM2BZ128rr  = 10818,
10835
    VPMOVM2BZ256rr  = 10819,
10836
    VPMOVM2BZrr = 10820,
10837
    VPMOVM2DZ128rr  = 10821,
10838
    VPMOVM2DZ256rr  = 10822,
10839
    VPMOVM2DZrr = 10823,
10840
    VPMOVM2QZ128rr  = 10824,
10841
    VPMOVM2QZ256rr  = 10825,
10842
    VPMOVM2QZrr = 10826,
10843
    VPMOVM2WZ128rr  = 10827,
10844
    VPMOVM2WZ256rr  = 10828,
10845
    VPMOVM2WZrr = 10829,
10846
    VPMOVMSKBYrr  = 10830,
10847
    VPMOVMSKBrr = 10831,
10848
    VPMOVQ2MZ128rr  = 10832,
10849
    VPMOVQ2MZ256rr  = 10833,
10850
    VPMOVQ2MZrr = 10834,
10851
    VPMOVQBZ128mr = 10835,
10852
    VPMOVQBZ128mrk  = 10836,
10853
    VPMOVQBZ128rr = 10837,
10854
    VPMOVQBZ128rrk  = 10838,
10855
    VPMOVQBZ128rrkz = 10839,
10856
    VPMOVQBZ256mr = 10840,
10857
    VPMOVQBZ256mrk  = 10841,
10858
    VPMOVQBZ256rr = 10842,
10859
    VPMOVQBZ256rrk  = 10843,
10860
    VPMOVQBZ256rrkz = 10844,
10861
    VPMOVQBZmr  = 10845,
10862
    VPMOVQBZmrk = 10846,
10863
    VPMOVQBZrr  = 10847,
10864
    VPMOVQBZrrk = 10848,
10865
    VPMOVQBZrrkz  = 10849,
10866
    VPMOVQDZ128mr = 10850,
10867
    VPMOVQDZ128mrk  = 10851,
10868
    VPMOVQDZ128rr = 10852,
10869
    VPMOVQDZ128rrk  = 10853,
10870
    VPMOVQDZ128rrkz = 10854,
10871
    VPMOVQDZ256mr = 10855,
10872
    VPMOVQDZ256mrk  = 10856,
10873
    VPMOVQDZ256rr = 10857,
10874
    VPMOVQDZ256rrk  = 10858,
10875
    VPMOVQDZ256rrkz = 10859,
10876
    VPMOVQDZmr  = 10860,
10877
    VPMOVQDZmrk = 10861,
10878
    VPMOVQDZrr  = 10862,
10879
    VPMOVQDZrrk = 10863,
10880
    VPMOVQDZrrkz  = 10864,
10881
    VPMOVQWZ128mr = 10865,
10882
    VPMOVQWZ128mrk  = 10866,
10883
    VPMOVQWZ128rr = 10867,
10884
    VPMOVQWZ128rrk  = 10868,
10885
    VPMOVQWZ128rrkz = 10869,
10886
    VPMOVQWZ256mr = 10870,
10887
    VPMOVQWZ256mrk  = 10871,
10888
    VPMOVQWZ256rr = 10872,
10889
    VPMOVQWZ256rrk  = 10873,
10890
    VPMOVQWZ256rrkz = 10874,
10891
    VPMOVQWZmr  = 10875,
10892
    VPMOVQWZmrk = 10876,
10893
    VPMOVQWZrr  = 10877,
10894
    VPMOVQWZrrk = 10878,
10895
    VPMOVQWZrrkz  = 10879,
10896
    VPMOVSDBZ128mr  = 10880,
10897
    VPMOVSDBZ128mrk = 10881,
10898
    VPMOVSDBZ128rr  = 10882,
10899
    VPMOVSDBZ128rrk = 10883,
10900
    VPMOVSDBZ128rrkz  = 10884,
10901
    VPMOVSDBZ256mr  = 10885,
10902
    VPMOVSDBZ256mrk = 10886,
10903
    VPMOVSDBZ256rr  = 10887,
10904
    VPMOVSDBZ256rrk = 10888,
10905
    VPMOVSDBZ256rrkz  = 10889,
10906
    VPMOVSDBZmr = 10890,
10907
    VPMOVSDBZmrk  = 10891,
10908
    VPMOVSDBZrr = 10892,
10909
    VPMOVSDBZrrk  = 10893,
10910
    VPMOVSDBZrrkz = 10894,
10911
    VPMOVSDWZ128mr  = 10895,
10912
    VPMOVSDWZ128mrk = 10896,
10913
    VPMOVSDWZ128rr  = 10897,
10914
    VPMOVSDWZ128rrk = 10898,
10915
    VPMOVSDWZ128rrkz  = 10899,
10916
    VPMOVSDWZ256mr  = 10900,
10917
    VPMOVSDWZ256mrk = 10901,
10918
    VPMOVSDWZ256rr  = 10902,
10919
    VPMOVSDWZ256rrk = 10903,
10920
    VPMOVSDWZ256rrkz  = 10904,
10921
    VPMOVSDWZmr = 10905,
10922
    VPMOVSDWZmrk  = 10906,
10923
    VPMOVSDWZrr = 10907,
10924
    VPMOVSDWZrrk  = 10908,
10925
    VPMOVSDWZrrkz = 10909,
10926
    VPMOVSQBZ128mr  = 10910,
10927
    VPMOVSQBZ128mrk = 10911,
10928
    VPMOVSQBZ128rr  = 10912,
10929
    VPMOVSQBZ128rrk = 10913,
10930
    VPMOVSQBZ128rrkz  = 10914,
10931
    VPMOVSQBZ256mr  = 10915,
10932
    VPMOVSQBZ256mrk = 10916,
10933
    VPMOVSQBZ256rr  = 10917,
10934
    VPMOVSQBZ256rrk = 10918,
10935
    VPMOVSQBZ256rrkz  = 10919,
10936
    VPMOVSQBZmr = 10920,
10937
    VPMOVSQBZmrk  = 10921,
10938
    VPMOVSQBZrr = 10922,
10939
    VPMOVSQBZrrk  = 10923,
10940
    VPMOVSQBZrrkz = 10924,
10941
    VPMOVSQDZ128mr  = 10925,
10942
    VPMOVSQDZ128mrk = 10926,
10943
    VPMOVSQDZ128rr  = 10927,
10944
    VPMOVSQDZ128rrk = 10928,
10945
    VPMOVSQDZ128rrkz  = 10929,
10946
    VPMOVSQDZ256mr  = 10930,
10947
    VPMOVSQDZ256mrk = 10931,
10948
    VPMOVSQDZ256rr  = 10932,
10949
    VPMOVSQDZ256rrk = 10933,
10950
    VPMOVSQDZ256rrkz  = 10934,
10951
    VPMOVSQDZmr = 10935,
10952
    VPMOVSQDZmrk  = 10936,
10953
    VPMOVSQDZrr = 10937,
10954
    VPMOVSQDZrrk  = 10938,
10955
    VPMOVSQDZrrkz = 10939,
10956
    VPMOVSQWZ128mr  = 10940,
10957
    VPMOVSQWZ128mrk = 10941,
10958
    VPMOVSQWZ128rr  = 10942,
10959
    VPMOVSQWZ128rrk = 10943,
10960
    VPMOVSQWZ128rrkz  = 10944,
10961
    VPMOVSQWZ256mr  = 10945,
10962
    VPMOVSQWZ256mrk = 10946,
10963
    VPMOVSQWZ256rr  = 10947,
10964
    VPMOVSQWZ256rrk = 10948,
10965
    VPMOVSQWZ256rrkz  = 10949,
10966
    VPMOVSQWZmr = 10950,
10967
    VPMOVSQWZmrk  = 10951,
10968
    VPMOVSQWZrr = 10952,
10969
    VPMOVSQWZrrk  = 10953,
10970
    VPMOVSQWZrrkz = 10954,
10971
    VPMOVSWBZ128mr  = 10955,
10972
    VPMOVSWBZ128mrk = 10956,
10973
    VPMOVSWBZ128rr  = 10957,
10974
    VPMOVSWBZ128rrk = 10958,
10975
    VPMOVSWBZ128rrkz  = 10959,
10976
    VPMOVSWBZ256mr  = 10960,
10977
    VPMOVSWBZ256mrk = 10961,
10978
    VPMOVSWBZ256rr  = 10962,
10979
    VPMOVSWBZ256rrk = 10963,
10980
    VPMOVSWBZ256rrkz  = 10964,
10981
    VPMOVSWBZmr = 10965,
10982
    VPMOVSWBZmrk  = 10966,
10983
    VPMOVSWBZrr = 10967,
10984
    VPMOVSWBZrrk  = 10968,
10985
    VPMOVSWBZrrkz = 10969,
10986
    VPMOVSXBDYrm  = 10970,
10987
    VPMOVSXBDYrr  = 10971,
10988
    VPMOVSXBDZ128rm = 10972,
10989
    VPMOVSXBDZ128rmk  = 10973,
10990
    VPMOVSXBDZ128rmkz = 10974,
10991
    VPMOVSXBDZ128rr = 10975,
10992
    VPMOVSXBDZ128rrk  = 10976,
10993
    VPMOVSXBDZ128rrkz = 10977,
10994
    VPMOVSXBDZ256rm = 10978,
10995
    VPMOVSXBDZ256rmk  = 10979,
10996
    VPMOVSXBDZ256rmkz = 10980,
10997
    VPMOVSXBDZ256rr = 10981,
10998
    VPMOVSXBDZ256rrk  = 10982,
10999
    VPMOVSXBDZ256rrkz = 10983,
11000
    VPMOVSXBDZrm  = 10984,
11001
    VPMOVSXBDZrmk = 10985,
11002
    VPMOVSXBDZrmkz  = 10986,
11003
    VPMOVSXBDZrr  = 10987,
11004
    VPMOVSXBDZrrk = 10988,
11005
    VPMOVSXBDZrrkz  = 10989,
11006
    VPMOVSXBDrm = 10990,
11007
    VPMOVSXBDrr = 10991,
11008
    VPMOVSXBQYrm  = 10992,
11009
    VPMOVSXBQYrr  = 10993,
11010
    VPMOVSXBQZ128rm = 10994,
11011
    VPMOVSXBQZ128rmk  = 10995,
11012
    VPMOVSXBQZ128rmkz = 10996,
11013
    VPMOVSXBQZ128rr = 10997,
11014
    VPMOVSXBQZ128rrk  = 10998,
11015
    VPMOVSXBQZ128rrkz = 10999,
11016
    VPMOVSXBQZ256rm = 11000,
11017
    VPMOVSXBQZ256rmk  = 11001,
11018
    VPMOVSXBQZ256rmkz = 11002,
11019
    VPMOVSXBQZ256rr = 11003,
11020
    VPMOVSXBQZ256rrk  = 11004,
11021
    VPMOVSXBQZ256rrkz = 11005,
11022
    VPMOVSXBQZrm  = 11006,
11023
    VPMOVSXBQZrmk = 11007,
11024
    VPMOVSXBQZrmkz  = 11008,
11025
    VPMOVSXBQZrr  = 11009,
11026
    VPMOVSXBQZrrk = 11010,
11027
    VPMOVSXBQZrrkz  = 11011,
11028
    VPMOVSXBQrm = 11012,
11029
    VPMOVSXBQrr = 11013,
11030
    VPMOVSXBWYrm  = 11014,
11031
    VPMOVSXBWYrr  = 11015,
11032
    VPMOVSXBWZ128rm = 11016,
11033
    VPMOVSXBWZ128rmk  = 11017,
11034
    VPMOVSXBWZ128rmkz = 11018,
11035
    VPMOVSXBWZ128rr = 11019,
11036
    VPMOVSXBWZ128rrk  = 11020,
11037
    VPMOVSXBWZ128rrkz = 11021,
11038
    VPMOVSXBWZ256rm = 11022,
11039
    VPMOVSXBWZ256rmk  = 11023,
11040
    VPMOVSXBWZ256rmkz = 11024,
11041
    VPMOVSXBWZ256rr = 11025,
11042
    VPMOVSXBWZ256rrk  = 11026,
11043
    VPMOVSXBWZ256rrkz = 11027,
11044
    VPMOVSXBWZrm  = 11028,
11045
    VPMOVSXBWZrmk = 11029,
11046
    VPMOVSXBWZrmkz  = 11030,
11047
    VPMOVSXBWZrr  = 11031,
11048
    VPMOVSXBWZrrk = 11032,
11049
    VPMOVSXBWZrrkz  = 11033,
11050
    VPMOVSXBWrm = 11034,
11051
    VPMOVSXBWrr = 11035,
11052
    VPMOVSXDQYrm  = 11036,
11053
    VPMOVSXDQYrr  = 11037,
11054
    VPMOVSXDQZ128rm = 11038,
11055
    VPMOVSXDQZ128rmk  = 11039,
11056
    VPMOVSXDQZ128rmkz = 11040,
11057
    VPMOVSXDQZ128rr = 11041,
11058
    VPMOVSXDQZ128rrk  = 11042,
11059
    VPMOVSXDQZ128rrkz = 11043,
11060
    VPMOVSXDQZ256rm = 11044,
11061
    VPMOVSXDQZ256rmk  = 11045,
11062
    VPMOVSXDQZ256rmkz = 11046,
11063
    VPMOVSXDQZ256rr = 11047,
11064
    VPMOVSXDQZ256rrk  = 11048,
11065
    VPMOVSXDQZ256rrkz = 11049,
11066
    VPMOVSXDQZrm  = 11050,
11067
    VPMOVSXDQZrmk = 11051,
11068
    VPMOVSXDQZrmkz  = 11052,
11069
    VPMOVSXDQZrr  = 11053,
11070
    VPMOVSXDQZrrk = 11054,
11071
    VPMOVSXDQZrrkz  = 11055,
11072
    VPMOVSXDQrm = 11056,
11073
    VPMOVSXDQrr = 11057,
11074
    VPMOVSXWDYrm  = 11058,
11075
    VPMOVSXWDYrr  = 11059,
11076
    VPMOVSXWDZ128rm = 11060,
11077
    VPMOVSXWDZ128rmk  = 11061,
11078
    VPMOVSXWDZ128rmkz = 11062,
11079
    VPMOVSXWDZ128rr = 11063,
11080
    VPMOVSXWDZ128rrk  = 11064,
11081
    VPMOVSXWDZ128rrkz = 11065,
11082
    VPMOVSXWDZ256rm = 11066,
11083
    VPMOVSXWDZ256rmk  = 11067,
11084
    VPMOVSXWDZ256rmkz = 11068,
11085
    VPMOVSXWDZ256rr = 11069,
11086
    VPMOVSXWDZ256rrk  = 11070,
11087
    VPMOVSXWDZ256rrkz = 11071,
11088
    VPMOVSXWDZrm  = 11072,
11089
    VPMOVSXWDZrmk = 11073,
11090
    VPMOVSXWDZrmkz  = 11074,
11091
    VPMOVSXWDZrr  = 11075,
11092
    VPMOVSXWDZrrk = 11076,
11093
    VPMOVSXWDZrrkz  = 11077,
11094
    VPMOVSXWDrm = 11078,
11095
    VPMOVSXWDrr = 11079,
11096
    VPMOVSXWQYrm  = 11080,
11097
    VPMOVSXWQYrr  = 11081,
11098
    VPMOVSXWQZ128rm = 11082,
11099
    VPMOVSXWQZ128rmk  = 11083,
11100
    VPMOVSXWQZ128rmkz = 11084,
11101
    VPMOVSXWQZ128rr = 11085,
11102
    VPMOVSXWQZ128rrk  = 11086,
11103
    VPMOVSXWQZ128rrkz = 11087,
11104
    VPMOVSXWQZ256rm = 11088,
11105
    VPMOVSXWQZ256rmk  = 11089,
11106
    VPMOVSXWQZ256rmkz = 11090,
11107
    VPMOVSXWQZ256rr = 11091,
11108
    VPMOVSXWQZ256rrk  = 11092,
11109
    VPMOVSXWQZ256rrkz = 11093,
11110
    VPMOVSXWQZrm  = 11094,
11111
    VPMOVSXWQZrmk = 11095,
11112
    VPMOVSXWQZrmkz  = 11096,
11113
    VPMOVSXWQZrr  = 11097,
11114
    VPMOVSXWQZrrk = 11098,
11115
    VPMOVSXWQZrrkz  = 11099,
11116
    VPMOVSXWQrm = 11100,
11117
    VPMOVSXWQrr = 11101,
11118
    VPMOVUSDBZ128mr = 11102,
11119
    VPMOVUSDBZ128mrk  = 11103,
11120
    VPMOVUSDBZ128rr = 11104,
11121
    VPMOVUSDBZ128rrk  = 11105,
11122
    VPMOVUSDBZ128rrkz = 11106,
11123
    VPMOVUSDBZ256mr = 11107,
11124
    VPMOVUSDBZ256mrk  = 11108,
11125
    VPMOVUSDBZ256rr = 11109,
11126
    VPMOVUSDBZ256rrk  = 11110,
11127
    VPMOVUSDBZ256rrkz = 11111,
11128
    VPMOVUSDBZmr  = 11112,
11129
    VPMOVUSDBZmrk = 11113,
11130
    VPMOVUSDBZrr  = 11114,
11131
    VPMOVUSDBZrrk = 11115,
11132
    VPMOVUSDBZrrkz  = 11116,
11133
    VPMOVUSDWZ128mr = 11117,
11134
    VPMOVUSDWZ128mrk  = 11118,
11135
    VPMOVUSDWZ128rr = 11119,
11136
    VPMOVUSDWZ128rrk  = 11120,
11137
    VPMOVUSDWZ128rrkz = 11121,
11138
    VPMOVUSDWZ256mr = 11122,
11139
    VPMOVUSDWZ256mrk  = 11123,
11140
    VPMOVUSDWZ256rr = 11124,
11141
    VPMOVUSDWZ256rrk  = 11125,
11142
    VPMOVUSDWZ256rrkz = 11126,
11143
    VPMOVUSDWZmr  = 11127,
11144
    VPMOVUSDWZmrk = 11128,
11145
    VPMOVUSDWZrr  = 11129,
11146
    VPMOVUSDWZrrk = 11130,
11147
    VPMOVUSDWZrrkz  = 11131,
11148
    VPMOVUSQBZ128mr = 11132,
11149
    VPMOVUSQBZ128mrk  = 11133,
11150
    VPMOVUSQBZ128rr = 11134,
11151
    VPMOVUSQBZ128rrk  = 11135,
11152
    VPMOVUSQBZ128rrkz = 11136,
11153
    VPMOVUSQBZ256mr = 11137,
11154
    VPMOVUSQBZ256mrk  = 11138,
11155
    VPMOVUSQBZ256rr = 11139,
11156
    VPMOVUSQBZ256rrk  = 11140,
11157
    VPMOVUSQBZ256rrkz = 11141,
11158
    VPMOVUSQBZmr  = 11142,
11159
    VPMOVUSQBZmrk = 11143,
11160
    VPMOVUSQBZrr  = 11144,
11161
    VPMOVUSQBZrrk = 11145,
11162
    VPMOVUSQBZrrkz  = 11146,
11163
    VPMOVUSQDZ128mr = 11147,
11164
    VPMOVUSQDZ128mrk  = 11148,
11165
    VPMOVUSQDZ128rr = 11149,
11166
    VPMOVUSQDZ128rrk  = 11150,
11167
    VPMOVUSQDZ128rrkz = 11151,
11168
    VPMOVUSQDZ256mr = 11152,
11169
    VPMOVUSQDZ256mrk  = 11153,
11170
    VPMOVUSQDZ256rr = 11154,
11171
    VPMOVUSQDZ256rrk  = 11155,
11172
    VPMOVUSQDZ256rrkz = 11156,
11173
    VPMOVUSQDZmr  = 11157,
11174
    VPMOVUSQDZmrk = 11158,
11175
    VPMOVUSQDZrr  = 11159,
11176
    VPMOVUSQDZrrk = 11160,
11177
    VPMOVUSQDZrrkz  = 11161,
11178
    VPMOVUSQWZ128mr = 11162,
11179
    VPMOVUSQWZ128mrk  = 11163,
11180
    VPMOVUSQWZ128rr = 11164,
11181
    VPMOVUSQWZ128rrk  = 11165,
11182
    VPMOVUSQWZ128rrkz = 11166,
11183
    VPMOVUSQWZ256mr = 11167,
11184
    VPMOVUSQWZ256mrk  = 11168,
11185
    VPMOVUSQWZ256rr = 11169,
11186
    VPMOVUSQWZ256rrk  = 11170,
11187
    VPMOVUSQWZ256rrkz = 11171,
11188
    VPMOVUSQWZmr  = 11172,
11189
    VPMOVUSQWZmrk = 11173,
11190
    VPMOVUSQWZrr  = 11174,
11191
    VPMOVUSQWZrrk = 11175,
11192
    VPMOVUSQWZrrkz  = 11176,
11193
    VPMOVUSWBZ128mr = 11177,
11194
    VPMOVUSWBZ128mrk  = 11178,
11195
    VPMOVUSWBZ128rr = 11179,
11196
    VPMOVUSWBZ128rrk  = 11180,
11197
    VPMOVUSWBZ128rrkz = 11181,
11198
    VPMOVUSWBZ256mr = 11182,
11199
    VPMOVUSWBZ256mrk  = 11183,
11200
    VPMOVUSWBZ256rr = 11184,
11201
    VPMOVUSWBZ256rrk  = 11185,
11202
    VPMOVUSWBZ256rrkz = 11186,
11203
    VPMOVUSWBZmr  = 11187,
11204
    VPMOVUSWBZmrk = 11188,
11205
    VPMOVUSWBZrr  = 11189,
11206
    VPMOVUSWBZrrk = 11190,
11207
    VPMOVUSWBZrrkz  = 11191,
11208
    VPMOVW2MZ128rr  = 11192,
11209
    VPMOVW2MZ256rr  = 11193,
11210
    VPMOVW2MZrr = 11194,
11211
    VPMOVWBZ128mr = 11195,
11212
    VPMOVWBZ128mrk  = 11196,
11213
    VPMOVWBZ128rr = 11197,
11214
    VPMOVWBZ128rrk  = 11198,
11215
    VPMOVWBZ128rrkz = 11199,
11216
    VPMOVWBZ256mr = 11200,
11217
    VPMOVWBZ256mrk  = 11201,
11218
    VPMOVWBZ256rr = 11202,
11219
    VPMOVWBZ256rrk  = 11203,
11220
    VPMOVWBZ256rrkz = 11204,
11221
    VPMOVWBZmr  = 11205,
11222
    VPMOVWBZmrk = 11206,
11223
    VPMOVWBZrr  = 11207,
11224
    VPMOVWBZrrk = 11208,
11225
    VPMOVWBZrrkz  = 11209,
11226
    VPMOVZXBDYrm  = 11210,
11227
    VPMOVZXBDYrr  = 11211,
11228
    VPMOVZXBDZ128rm = 11212,
11229
    VPMOVZXBDZ128rmk  = 11213,
11230
    VPMOVZXBDZ128rmkz = 11214,
11231
    VPMOVZXBDZ128rr = 11215,
11232
    VPMOVZXBDZ128rrk  = 11216,
11233
    VPMOVZXBDZ128rrkz = 11217,
11234
    VPMOVZXBDZ256rm = 11218,
11235
    VPMOVZXBDZ256rmk  = 11219,
11236
    VPMOVZXBDZ256rmkz = 11220,
11237
    VPMOVZXBDZ256rr = 11221,
11238
    VPMOVZXBDZ256rrk  = 11222,
11239
    VPMOVZXBDZ256rrkz = 11223,
11240
    VPMOVZXBDZrm  = 11224,
11241
    VPMOVZXBDZrmk = 11225,
11242
    VPMOVZXBDZrmkz  = 11226,
11243
    VPMOVZXBDZrr  = 11227,
11244
    VPMOVZXBDZrrk = 11228,
11245
    VPMOVZXBDZrrkz  = 11229,
11246
    VPMOVZXBDrm = 11230,
11247
    VPMOVZXBDrr = 11231,
11248
    VPMOVZXBQYrm  = 11232,
11249
    VPMOVZXBQYrr  = 11233,
11250
    VPMOVZXBQZ128rm = 11234,
11251
    VPMOVZXBQZ128rmk  = 11235,
11252
    VPMOVZXBQZ128rmkz = 11236,
11253
    VPMOVZXBQZ128rr = 11237,
11254
    VPMOVZXBQZ128rrk  = 11238,
11255
    VPMOVZXBQZ128rrkz = 11239,
11256
    VPMOVZXBQZ256rm = 11240,
11257
    VPMOVZXBQZ256rmk  = 11241,
11258
    VPMOVZXBQZ256rmkz = 11242,
11259
    VPMOVZXBQZ256rr = 11243,
11260
    VPMOVZXBQZ256rrk  = 11244,
11261
    VPMOVZXBQZ256rrkz = 11245,
11262
    VPMOVZXBQZrm  = 11246,
11263
    VPMOVZXBQZrmk = 11247,
11264
    VPMOVZXBQZrmkz  = 11248,
11265
    VPMOVZXBQZrr  = 11249,
11266
    VPMOVZXBQZrrk = 11250,
11267
    VPMOVZXBQZrrkz  = 11251,
11268
    VPMOVZXBQrm = 11252,
11269
    VPMOVZXBQrr = 11253,
11270
    VPMOVZXBWYrm  = 11254,
11271
    VPMOVZXBWYrr  = 11255,
11272
    VPMOVZXBWZ128rm = 11256,
11273
    VPMOVZXBWZ128rmk  = 11257,
11274
    VPMOVZXBWZ128rmkz = 11258,
11275
    VPMOVZXBWZ128rr = 11259,
11276
    VPMOVZXBWZ128rrk  = 11260,
11277
    VPMOVZXBWZ128rrkz = 11261,
11278
    VPMOVZXBWZ256rm = 11262,
11279
    VPMOVZXBWZ256rmk  = 11263,
11280
    VPMOVZXBWZ256rmkz = 11264,
11281
    VPMOVZXBWZ256rr = 11265,
11282
    VPMOVZXBWZ256rrk  = 11266,
11283
    VPMOVZXBWZ256rrkz = 11267,
11284
    VPMOVZXBWZrm  = 11268,
11285
    VPMOVZXBWZrmk = 11269,
11286
    VPMOVZXBWZrmkz  = 11270,
11287
    VPMOVZXBWZrr  = 11271,
11288
    VPMOVZXBWZrrk = 11272,
11289
    VPMOVZXBWZrrkz  = 11273,
11290
    VPMOVZXBWrm = 11274,
11291
    VPMOVZXBWrr = 11275,
11292
    VPMOVZXDQYrm  = 11276,
11293
    VPMOVZXDQYrr  = 11277,
11294
    VPMOVZXDQZ128rm = 11278,
11295
    VPMOVZXDQZ128rmk  = 11279,
11296
    VPMOVZXDQZ128rmkz = 11280,
11297
    VPMOVZXDQZ128rr = 11281,
11298
    VPMOVZXDQZ128rrk  = 11282,
11299
    VPMOVZXDQZ128rrkz = 11283,
11300
    VPMOVZXDQZ256rm = 11284,
11301
    VPMOVZXDQZ256rmk  = 11285,
11302
    VPMOVZXDQZ256rmkz = 11286,
11303
    VPMOVZXDQZ256rr = 11287,
11304
    VPMOVZXDQZ256rrk  = 11288,
11305
    VPMOVZXDQZ256rrkz = 11289,
11306
    VPMOVZXDQZrm  = 11290,
11307
    VPMOVZXDQZrmk = 11291,
11308
    VPMOVZXDQZrmkz  = 11292,
11309
    VPMOVZXDQZrr  = 11293,
11310
    VPMOVZXDQZrrk = 11294,
11311
    VPMOVZXDQZrrkz  = 11295,
11312
    VPMOVZXDQrm = 11296,
11313
    VPMOVZXDQrr = 11297,
11314
    VPMOVZXWDYrm  = 11298,
11315
    VPMOVZXWDYrr  = 11299,
11316
    VPMOVZXWDZ128rm = 11300,
11317
    VPMOVZXWDZ128rmk  = 11301,
11318
    VPMOVZXWDZ128rmkz = 11302,
11319
    VPMOVZXWDZ128rr = 11303,
11320
    VPMOVZXWDZ128rrk  = 11304,
11321
    VPMOVZXWDZ128rrkz = 11305,
11322
    VPMOVZXWDZ256rm = 11306,
11323
    VPMOVZXWDZ256rmk  = 11307,
11324
    VPMOVZXWDZ256rmkz = 11308,
11325
    VPMOVZXWDZ256rr = 11309,
11326
    VPMOVZXWDZ256rrk  = 11310,
11327
    VPMOVZXWDZ256rrkz = 11311,
11328
    VPMOVZXWDZrm  = 11312,
11329
    VPMOVZXWDZrmk = 11313,
11330
    VPMOVZXWDZrmkz  = 11314,
11331
    VPMOVZXWDZrr  = 11315,
11332
    VPMOVZXWDZrrk = 11316,
11333
    VPMOVZXWDZrrkz  = 11317,
11334
    VPMOVZXWDrm = 11318,
11335
    VPMOVZXWDrr = 11319,
11336
    VPMOVZXWQYrm  = 11320,
11337
    VPMOVZXWQYrr  = 11321,
11338
    VPMOVZXWQZ128rm = 11322,
11339
    VPMOVZXWQZ128rmk  = 11323,
11340
    VPMOVZXWQZ128rmkz = 11324,
11341
    VPMOVZXWQZ128rr = 11325,
11342
    VPMOVZXWQZ128rrk  = 11326,
11343
    VPMOVZXWQZ128rrkz = 11327,
11344
    VPMOVZXWQZ256rm = 11328,
11345
    VPMOVZXWQZ256rmk  = 11329,
11346
    VPMOVZXWQZ256rmkz = 11330,
11347
    VPMOVZXWQZ256rr = 11331,
11348
    VPMOVZXWQZ256rrk  = 11332,
11349
    VPMOVZXWQZ256rrkz = 11333,
11350
    VPMOVZXWQZrm  = 11334,
11351
    VPMOVZXWQZrmk = 11335,
11352
    VPMOVZXWQZrmkz  = 11336,
11353
    VPMOVZXWQZrr  = 11337,
11354
    VPMOVZXWQZrrk = 11338,
11355
    VPMOVZXWQZrrkz  = 11339,
11356
    VPMOVZXWQrm = 11340,
11357
    VPMOVZXWQrr = 11341,
11358
    VPMULDQYrm  = 11342,
11359
    VPMULDQYrr  = 11343,
11360
    VPMULDQZ128rm = 11344,
11361
    VPMULDQZ128rmb  = 11345,
11362
    VPMULDQZ128rmbk = 11346,
11363
    VPMULDQZ128rmbkz  = 11347,
11364
    VPMULDQZ128rmk  = 11348,
11365
    VPMULDQZ128rmkz = 11349,
11366
    VPMULDQZ128rr = 11350,
11367
    VPMULDQZ128rrk  = 11351,
11368
    VPMULDQZ128rrkz = 11352,
11369
    VPMULDQZ256rm = 11353,
11370
    VPMULDQZ256rmb  = 11354,
11371
    VPMULDQZ256rmbk = 11355,
11372
    VPMULDQZ256rmbkz  = 11356,
11373
    VPMULDQZ256rmk  = 11357,
11374
    VPMULDQZ256rmkz = 11358,
11375
    VPMULDQZ256rr = 11359,
11376
    VPMULDQZ256rrk  = 11360,
11377
    VPMULDQZ256rrkz = 11361,
11378
    VPMULDQZrm  = 11362,
11379
    VPMULDQZrmb = 11363,
11380
    VPMULDQZrmbk  = 11364,
11381
    VPMULDQZrmbkz = 11365,
11382
    VPMULDQZrmk = 11366,
11383
    VPMULDQZrmkz  = 11367,
11384
    VPMULDQZrr  = 11368,
11385
    VPMULDQZrrk = 11369,
11386
    VPMULDQZrrkz  = 11370,
11387
    VPMULDQrm = 11371,
11388
    VPMULDQrr = 11372,
11389
    VPMULHRSWZ128rm = 11373,
11390
    VPMULHRSWZ128rmk  = 11374,
11391
    VPMULHRSWZ128rmkz = 11375,
11392
    VPMULHRSWZ128rr = 11376,
11393
    VPMULHRSWZ128rrk  = 11377,
11394
    VPMULHRSWZ128rrkz = 11378,
11395
    VPMULHRSWZ256rm = 11379,
11396
    VPMULHRSWZ256rmk  = 11380,
11397
    VPMULHRSWZ256rmkz = 11381,
11398
    VPMULHRSWZ256rr = 11382,
11399
    VPMULHRSWZ256rrk  = 11383,
11400
    VPMULHRSWZ256rrkz = 11384,
11401
    VPMULHRSWZrm  = 11385,
11402
    VPMULHRSWZrmk = 11386,
11403
    VPMULHRSWZrmkz  = 11387,
11404
    VPMULHRSWZrr  = 11388,
11405
    VPMULHRSWZrrk = 11389,
11406
    VPMULHRSWZrrkz  = 11390,
11407
    VPMULHRSWrm128  = 11391,
11408
    VPMULHRSWrm256  = 11392,
11409
    VPMULHRSWrr128  = 11393,
11410
    VPMULHRSWrr256  = 11394,
11411
    VPMULHUWYrm = 11395,
11412
    VPMULHUWYrr = 11396,
11413
    VPMULHUWZ128rm  = 11397,
11414
    VPMULHUWZ128rmk = 11398,
11415
    VPMULHUWZ128rmkz  = 11399,
11416
    VPMULHUWZ128rr  = 11400,
11417
    VPMULHUWZ128rrk = 11401,
11418
    VPMULHUWZ128rrkz  = 11402,
11419
    VPMULHUWZ256rm  = 11403,
11420
    VPMULHUWZ256rmk = 11404,
11421
    VPMULHUWZ256rmkz  = 11405,
11422
    VPMULHUWZ256rr  = 11406,
11423
    VPMULHUWZ256rrk = 11407,
11424
    VPMULHUWZ256rrkz  = 11408,
11425
    VPMULHUWZrm = 11409,
11426
    VPMULHUWZrmk  = 11410,
11427
    VPMULHUWZrmkz = 11411,
11428
    VPMULHUWZrr = 11412,
11429
    VPMULHUWZrrk  = 11413,
11430
    VPMULHUWZrrkz = 11414,
11431
    VPMULHUWrm  = 11415,
11432
    VPMULHUWrr  = 11416,
11433
    VPMULHWYrm  = 11417,
11434
    VPMULHWYrr  = 11418,
11435
    VPMULHWZ128rm = 11419,
11436
    VPMULHWZ128rmk  = 11420,
11437
    VPMULHWZ128rmkz = 11421,
11438
    VPMULHWZ128rr = 11422,
11439
    VPMULHWZ128rrk  = 11423,
11440
    VPMULHWZ128rrkz = 11424,
11441
    VPMULHWZ256rm = 11425,
11442
    VPMULHWZ256rmk  = 11426,
11443
    VPMULHWZ256rmkz = 11427,
11444
    VPMULHWZ256rr = 11428,
11445
    VPMULHWZ256rrk  = 11429,
11446
    VPMULHWZ256rrkz = 11430,
11447
    VPMULHWZrm  = 11431,
11448
    VPMULHWZrmk = 11432,
11449
    VPMULHWZrmkz  = 11433,
11450
    VPMULHWZrr  = 11434,
11451
    VPMULHWZrrk = 11435,
11452
    VPMULHWZrrkz  = 11436,
11453
    VPMULHWrm = 11437,
11454
    VPMULHWrr = 11438,
11455
    VPMULLDYrm  = 11439,
11456
    VPMULLDYrr  = 11440,
11457
    VPMULLDZ128rm = 11441,
11458
    VPMULLDZ128rmb  = 11442,
11459
    VPMULLDZ128rmbk = 11443,
11460
    VPMULLDZ128rmbkz  = 11444,
11461
    VPMULLDZ128rmk  = 11445,
11462
    VPMULLDZ128rmkz = 11446,
11463
    VPMULLDZ128rr = 11447,
11464
    VPMULLDZ128rrk  = 11448,
11465
    VPMULLDZ128rrkz = 11449,
11466
    VPMULLDZ256rm = 11450,
11467
    VPMULLDZ256rmb  = 11451,
11468
    VPMULLDZ256rmbk = 11452,
11469
    VPMULLDZ256rmbkz  = 11453,
11470
    VPMULLDZ256rmk  = 11454,
11471
    VPMULLDZ256rmkz = 11455,
11472
    VPMULLDZ256rr = 11456,
11473
    VPMULLDZ256rrk  = 11457,
11474
    VPMULLDZ256rrkz = 11458,
11475
    VPMULLDZrm  = 11459,
11476
    VPMULLDZrmb = 11460,
11477
    VPMULLDZrmbk  = 11461,
11478
    VPMULLDZrmbkz = 11462,
11479
    VPMULLDZrmk = 11463,
11480
    VPMULLDZrmkz  = 11464,
11481
    VPMULLDZrr  = 11465,
11482
    VPMULLDZrrk = 11466,
11483
    VPMULLDZrrkz  = 11467,
11484
    VPMULLDrm = 11468,
11485
    VPMULLDrr = 11469,
11486
    VPMULLQZ128rm = 11470,
11487
    VPMULLQZ128rmb  = 11471,
11488
    VPMULLQZ128rmbk = 11472,
11489
    VPMULLQZ128rmbkz  = 11473,
11490
    VPMULLQZ128rmk  = 11474,
11491
    VPMULLQZ128rmkz = 11475,
11492
    VPMULLQZ128rr = 11476,
11493
    VPMULLQZ128rrk  = 11477,
11494
    VPMULLQZ128rrkz = 11478,
11495
    VPMULLQZ256rm = 11479,
11496
    VPMULLQZ256rmb  = 11480,
11497
    VPMULLQZ256rmbk = 11481,
11498
    VPMULLQZ256rmbkz  = 11482,
11499
    VPMULLQZ256rmk  = 11483,
11500
    VPMULLQZ256rmkz = 11484,
11501
    VPMULLQZ256rr = 11485,
11502
    VPMULLQZ256rrk  = 11486,
11503
    VPMULLQZ256rrkz = 11487,
11504
    VPMULLQZrm  = 11488,
11505
    VPMULLQZrmb = 11489,
11506
    VPMULLQZrmbk  = 11490,
11507
    VPMULLQZrmbkz = 11491,
11508
    VPMULLQZrmk = 11492,
11509
    VPMULLQZrmkz  = 11493,
11510
    VPMULLQZrr  = 11494,
11511
    VPMULLQZrrk = 11495,
11512
    VPMULLQZrrkz  = 11496,
11513
    VPMULLWYrm  = 11497,
11514
    VPMULLWYrr  = 11498,
11515
    VPMULLWZ128rm = 11499,
11516
    VPMULLWZ128rmk  = 11500,
11517
    VPMULLWZ128rmkz = 11501,
11518
    VPMULLWZ128rr = 11502,
11519
    VPMULLWZ128rrk  = 11503,
11520
    VPMULLWZ128rrkz = 11504,
11521
    VPMULLWZ256rm = 11505,
11522
    VPMULLWZ256rmk  = 11506,
11523
    VPMULLWZ256rmkz = 11507,
11524
    VPMULLWZ256rr = 11508,
11525
    VPMULLWZ256rrk  = 11509,
11526
    VPMULLWZ256rrkz = 11510,
11527
    VPMULLWZrm  = 11511,
11528
    VPMULLWZrmk = 11512,
11529
    VPMULLWZrmkz  = 11513,
11530
    VPMULLWZrr  = 11514,
11531
    VPMULLWZrrk = 11515,
11532
    VPMULLWZrrkz  = 11516,
11533
    VPMULLWrm = 11517,
11534
    VPMULLWrr = 11518,
11535
    VPMULTISHIFTQBZ128rm  = 11519,
11536
    VPMULTISHIFTQBZ128rmb = 11520,
11537
    VPMULTISHIFTQBZ128rmbk  = 11521,
11538
    VPMULTISHIFTQBZ128rmbkz = 11522,
11539
    VPMULTISHIFTQBZ128rmk = 11523,
11540
    VPMULTISHIFTQBZ128rmkz  = 11524,
11541
    VPMULTISHIFTQBZ128rr  = 11525,
11542
    VPMULTISHIFTQBZ128rrk = 11526,
11543
    VPMULTISHIFTQBZ128rrkz  = 11527,
11544
    VPMULTISHIFTQBZ256rm  = 11528,
11545
    VPMULTISHIFTQBZ256rmb = 11529,
11546
    VPMULTISHIFTQBZ256rmbk  = 11530,
11547
    VPMULTISHIFTQBZ256rmbkz = 11531,
11548
    VPMULTISHIFTQBZ256rmk = 11532,
11549
    VPMULTISHIFTQBZ256rmkz  = 11533,
11550
    VPMULTISHIFTQBZ256rr  = 11534,
11551
    VPMULTISHIFTQBZ256rrk = 11535,
11552
    VPMULTISHIFTQBZ256rrkz  = 11536,
11553
    VPMULTISHIFTQBZrm = 11537,
11554
    VPMULTISHIFTQBZrmb  = 11538,
11555
    VPMULTISHIFTQBZrmbk = 11539,
11556
    VPMULTISHIFTQBZrmbkz  = 11540,
11557
    VPMULTISHIFTQBZrmk  = 11541,
11558
    VPMULTISHIFTQBZrmkz = 11542,
11559
    VPMULTISHIFTQBZrr = 11543,
11560
    VPMULTISHIFTQBZrrk  = 11544,
11561
    VPMULTISHIFTQBZrrkz = 11545,
11562
    VPMULUDQYrm = 11546,
11563
    VPMULUDQYrr = 11547,
11564
    VPMULUDQZ128rm  = 11548,
11565
    VPMULUDQZ128rmb = 11549,
11566
    VPMULUDQZ128rmbk  = 11550,
11567
    VPMULUDQZ128rmbkz = 11551,
11568
    VPMULUDQZ128rmk = 11552,
11569
    VPMULUDQZ128rmkz  = 11553,
11570
    VPMULUDQZ128rr  = 11554,
11571
    VPMULUDQZ128rrk = 11555,
11572
    VPMULUDQZ128rrkz  = 11556,
11573
    VPMULUDQZ256rm  = 11557,
11574
    VPMULUDQZ256rmb = 11558,
11575
    VPMULUDQZ256rmbk  = 11559,
11576
    VPMULUDQZ256rmbkz = 11560,
11577
    VPMULUDQZ256rmk = 11561,
11578
    VPMULUDQZ256rmkz  = 11562,
11579
    VPMULUDQZ256rr  = 11563,
11580
    VPMULUDQZ256rrk = 11564,
11581
    VPMULUDQZ256rrkz  = 11565,
11582
    VPMULUDQZrm = 11566,
11583
    VPMULUDQZrmb  = 11567,
11584
    VPMULUDQZrmbk = 11568,
11585
    VPMULUDQZrmbkz  = 11569,
11586
    VPMULUDQZrmk  = 11570,
11587
    VPMULUDQZrmkz = 11571,
11588
    VPMULUDQZrr = 11572,
11589
    VPMULUDQZrrk  = 11573,
11590
    VPMULUDQZrrkz = 11574,
11591
    VPMULUDQrm  = 11575,
11592
    VPMULUDQrr  = 11576,
11593
    VPORDZ128rm = 11577,
11594
    VPORDZ128rmb  = 11578,
11595
    VPORDZ128rmbk = 11579,
11596
    VPORDZ128rmbkz  = 11580,
11597
    VPORDZ128rmk  = 11581,
11598
    VPORDZ128rmkz = 11582,
11599
    VPORDZ128rr = 11583,
11600
    VPORDZ128rrk  = 11584,
11601
    VPORDZ128rrkz = 11585,
11602
    VPORDZ256rm = 11586,
11603
    VPORDZ256rmb  = 11587,
11604
    VPORDZ256rmbk = 11588,
11605
    VPORDZ256rmbkz  = 11589,
11606
    VPORDZ256rmk  = 11590,
11607
    VPORDZ256rmkz = 11591,
11608
    VPORDZ256rr = 11592,
11609
    VPORDZ256rrk  = 11593,
11610
    VPORDZ256rrkz = 11594,
11611
    VPORDZrm  = 11595,
11612
    VPORDZrmb = 11596,
11613
    VPORDZrmbk  = 11597,
11614
    VPORDZrmbkz = 11598,
11615
    VPORDZrmk = 11599,
11616
    VPORDZrmkz  = 11600,
11617
    VPORDZrr  = 11601,
11618
    VPORDZrrk = 11602,
11619
    VPORDZrrkz  = 11603,
11620
    VPORQZ128rm = 11604,
11621
    VPORQZ128rmb  = 11605,
11622
    VPORQZ128rmbk = 11606,
11623
    VPORQZ128rmbkz  = 11607,
11624
    VPORQZ128rmk  = 11608,
11625
    VPORQZ128rmkz = 11609,
11626
    VPORQZ128rr = 11610,
11627
    VPORQZ128rrk  = 11611,
11628
    VPORQZ128rrkz = 11612,
11629
    VPORQZ256rm = 11613,
11630
    VPORQZ256rmb  = 11614,
11631
    VPORQZ256rmbk = 11615,
11632
    VPORQZ256rmbkz  = 11616,
11633
    VPORQZ256rmk  = 11617,
11634
    VPORQZ256rmkz = 11618,
11635
    VPORQZ256rr = 11619,
11636
    VPORQZ256rrk  = 11620,
11637
    VPORQZ256rrkz = 11621,
11638
    VPORQZrm  = 11622,
11639
    VPORQZrmb = 11623,
11640
    VPORQZrmbk  = 11624,
11641
    VPORQZrmbkz = 11625,
11642
    VPORQZrmk = 11626,
11643
    VPORQZrmkz  = 11627,
11644
    VPORQZrr  = 11628,
11645
    VPORQZrrk = 11629,
11646
    VPORQZrrkz  = 11630,
11647
    VPORYrm = 11631,
11648
    VPORYrr = 11632,
11649
    VPORrm  = 11633,
11650
    VPORrr  = 11634,
11651
    VPPERMmr  = 11635,
11652
    VPPERMrm  = 11636,
11653
    VPPERMrr  = 11637,
11654
    VPROLDZ128mbi = 11638,
11655
    VPROLDZ128mbik  = 11639,
11656
    VPROLDZ128mbikz = 11640,
11657
    VPROLDZ128mi  = 11641,
11658
    VPROLDZ128mik = 11642,
11659
    VPROLDZ128mikz  = 11643,
11660
    VPROLDZ128ri  = 11644,
11661
    VPROLDZ128rik = 11645,
11662
    VPROLDZ128rikz  = 11646,
11663
    VPROLDZ256mbi = 11647,
11664
    VPROLDZ256mbik  = 11648,
11665
    VPROLDZ256mbikz = 11649,
11666
    VPROLDZ256mi  = 11650,
11667
    VPROLDZ256mik = 11651,
11668
    VPROLDZ256mikz  = 11652,
11669
    VPROLDZ256ri  = 11653,
11670
    VPROLDZ256rik = 11654,
11671
    VPROLDZ256rikz  = 11655,
11672
    VPROLDZmbi  = 11656,
11673
    VPROLDZmbik = 11657,
11674
    VPROLDZmbikz  = 11658,
11675
    VPROLDZmi = 11659,
11676
    VPROLDZmik  = 11660,
11677
    VPROLDZmikz = 11661,
11678
    VPROLDZri = 11662,
11679
    VPROLDZrik  = 11663,
11680
    VPROLDZrikz = 11664,
11681
    VPROLQZ128mbi = 11665,
11682
    VPROLQZ128mbik  = 11666,
11683
    VPROLQZ128mbikz = 11667,
11684
    VPROLQZ128mi  = 11668,
11685
    VPROLQZ128mik = 11669,
11686
    VPROLQZ128mikz  = 11670,
11687
    VPROLQZ128ri  = 11671,
11688
    VPROLQZ128rik = 11672,
11689
    VPROLQZ128rikz  = 11673,
11690
    VPROLQZ256mbi = 11674,
11691
    VPROLQZ256mbik  = 11675,
11692
    VPROLQZ256mbikz = 11676,
11693
    VPROLQZ256mi  = 11677,
11694
    VPROLQZ256mik = 11678,
11695
    VPROLQZ256mikz  = 11679,
11696
    VPROLQZ256ri  = 11680,
11697
    VPROLQZ256rik = 11681,
11698
    VPROLQZ256rikz  = 11682,
11699
    VPROLQZmbi  = 11683,
11700
    VPROLQZmbik = 11684,
11701
    VPROLQZmbikz  = 11685,
11702
    VPROLQZmi = 11686,
11703
    VPROLQZmik  = 11687,
11704
    VPROLQZmikz = 11688,
11705
    VPROLQZri = 11689,
11706
    VPROLQZrik  = 11690,
11707
    VPROLQZrikz = 11691,
11708
    VPROLVDZ128rm = 11692,
11709
    VPROLVDZ128rmb  = 11693,
11710
    VPROLVDZ128rmbk = 11694,
11711
    VPROLVDZ128rmbkz  = 11695,
11712
    VPROLVDZ128rmk  = 11696,
11713
    VPROLVDZ128rmkz = 11697,
11714
    VPROLVDZ128rr = 11698,
11715
    VPROLVDZ128rrk  = 11699,
11716
    VPROLVDZ128rrkz = 11700,
11717
    VPROLVDZ256rm = 11701,
11718
    VPROLVDZ256rmb  = 11702,
11719
    VPROLVDZ256rmbk = 11703,
11720
    VPROLVDZ256rmbkz  = 11704,
11721
    VPROLVDZ256rmk  = 11705,
11722
    VPROLVDZ256rmkz = 11706,
11723
    VPROLVDZ256rr = 11707,
11724
    VPROLVDZ256rrk  = 11708,
11725
    VPROLVDZ256rrkz = 11709,
11726
    VPROLVDZrm  = 11710,
11727
    VPROLVDZrmb = 11711,
11728
    VPROLVDZrmbk  = 11712,
11729
    VPROLVDZrmbkz = 11713,
11730
    VPROLVDZrmk = 11714,
11731
    VPROLVDZrmkz  = 11715,
11732
    VPROLVDZrr  = 11716,
11733
    VPROLVDZrrk = 11717,
11734
    VPROLVDZrrkz  = 11718,
11735
    VPROLVQZ128rm = 11719,
11736
    VPROLVQZ128rmb  = 11720,
11737
    VPROLVQZ128rmbk = 11721,
11738
    VPROLVQZ128rmbkz  = 11722,
11739
    VPROLVQZ128rmk  = 11723,
11740
    VPROLVQZ128rmkz = 11724,
11741
    VPROLVQZ128rr = 11725,
11742
    VPROLVQZ128rrk  = 11726,
11743
    VPROLVQZ128rrkz = 11727,
11744
    VPROLVQZ256rm = 11728,
11745
    VPROLVQZ256rmb  = 11729,
11746
    VPROLVQZ256rmbk = 11730,
11747
    VPROLVQZ256rmbkz  = 11731,
11748
    VPROLVQZ256rmk  = 11732,
11749
    VPROLVQZ256rmkz = 11733,
11750
    VPROLVQZ256rr = 11734,
11751
    VPROLVQZ256rrk  = 11735,
11752
    VPROLVQZ256rrkz = 11736,
11753
    VPROLVQZrm  = 11737,
11754
    VPROLVQZrmb = 11738,
11755
    VPROLVQZrmbk  = 11739,
11756
    VPROLVQZrmbkz = 11740,
11757
    VPROLVQZrmk = 11741,
11758
    VPROLVQZrmkz  = 11742,
11759
    VPROLVQZrr  = 11743,
11760
    VPROLVQZrrk = 11744,
11761
    VPROLVQZrrkz  = 11745,
11762
    VPRORDZ128mbi = 11746,
11763
    VPRORDZ128mbik  = 11747,
11764
    VPRORDZ128mbikz = 11748,
11765
    VPRORDZ128mi  = 11749,
11766
    VPRORDZ128mik = 11750,
11767
    VPRORDZ128mikz  = 11751,
11768
    VPRORDZ128ri  = 11752,
11769
    VPRORDZ128rik = 11753,
11770
    VPRORDZ128rikz  = 11754,
11771
    VPRORDZ256mbi = 11755,
11772
    VPRORDZ256mbik  = 11756,
11773
    VPRORDZ256mbikz = 11757,
11774
    VPRORDZ256mi  = 11758,
11775
    VPRORDZ256mik = 11759,
11776
    VPRORDZ256mikz  = 11760,
11777
    VPRORDZ256ri  = 11761,
11778
    VPRORDZ256rik = 11762,
11779
    VPRORDZ256rikz  = 11763,
11780
    VPRORDZmbi  = 11764,
11781
    VPRORDZmbik = 11765,
11782
    VPRORDZmbikz  = 11766,
11783
    VPRORDZmi = 11767,
11784
    VPRORDZmik  = 11768,
11785
    VPRORDZmikz = 11769,
11786
    VPRORDZri = 11770,
11787
    VPRORDZrik  = 11771,
11788
    VPRORDZrikz = 11772,
11789
    VPRORQZ128mbi = 11773,
11790
    VPRORQZ128mbik  = 11774,
11791
    VPRORQZ128mbikz = 11775,
11792
    VPRORQZ128mi  = 11776,
11793
    VPRORQZ128mik = 11777,
11794
    VPRORQZ128mikz  = 11778,
11795
    VPRORQZ128ri  = 11779,
11796
    VPRORQZ128rik = 11780,
11797
    VPRORQZ128rikz  = 11781,
11798
    VPRORQZ256mbi = 11782,
11799
    VPRORQZ256mbik  = 11783,
11800
    VPRORQZ256mbikz = 11784,
11801
    VPRORQZ256mi  = 11785,
11802
    VPRORQZ256mik = 11786,
11803
    VPRORQZ256mikz  = 11787,
11804
    VPRORQZ256ri  = 11788,
11805
    VPRORQZ256rik = 11789,
11806
    VPRORQZ256rikz  = 11790,
11807
    VPRORQZmbi  = 11791,
11808
    VPRORQZmbik = 11792,
11809
    VPRORQZmbikz  = 11793,
11810
    VPRORQZmi = 11794,
11811
    VPRORQZmik  = 11795,
11812
    VPRORQZmikz = 11796,
11813
    VPRORQZri = 11797,
11814
    VPRORQZrik  = 11798,
11815
    VPRORQZrikz = 11799,
11816
    VPRORVDZ128rm = 11800,
11817
    VPRORVDZ128rmb  = 11801,
11818
    VPRORVDZ128rmbk = 11802,
11819
    VPRORVDZ128rmbkz  = 11803,
11820
    VPRORVDZ128rmk  = 11804,
11821
    VPRORVDZ128rmkz = 11805,
11822
    VPRORVDZ128rr = 11806,
11823
    VPRORVDZ128rrk  = 11807,
11824
    VPRORVDZ128rrkz = 11808,
11825
    VPRORVDZ256rm = 11809,
11826
    VPRORVDZ256rmb  = 11810,
11827
    VPRORVDZ256rmbk = 11811,
11828
    VPRORVDZ256rmbkz  = 11812,
11829
    VPRORVDZ256rmk  = 11813,
11830
    VPRORVDZ256rmkz = 11814,
11831
    VPRORVDZ256rr = 11815,
11832
    VPRORVDZ256rrk  = 11816,
11833
    VPRORVDZ256rrkz = 11817,
11834
    VPRORVDZrm  = 11818,
11835
    VPRORVDZrmb = 11819,
11836
    VPRORVDZrmbk  = 11820,
11837
    VPRORVDZrmbkz = 11821,
11838
    VPRORVDZrmk = 11822,
11839
    VPRORVDZrmkz  = 11823,
11840
    VPRORVDZrr  = 11824,
11841
    VPRORVDZrrk = 11825,
11842
    VPRORVDZrrkz  = 11826,
11843
    VPRORVQZ128rm = 11827,
11844
    VPRORVQZ128rmb  = 11828,
11845
    VPRORVQZ128rmbk = 11829,
11846
    VPRORVQZ128rmbkz  = 11830,
11847
    VPRORVQZ128rmk  = 11831,
11848
    VPRORVQZ128rmkz = 11832,
11849
    VPRORVQZ128rr = 11833,
11850
    VPRORVQZ128rrk  = 11834,
11851
    VPRORVQZ128rrkz = 11835,
11852
    VPRORVQZ256rm = 11836,
11853
    VPRORVQZ256rmb  = 11837,
11854
    VPRORVQZ256rmbk = 11838,
11855
    VPRORVQZ256rmbkz  = 11839,
11856
    VPRORVQZ256rmk  = 11840,
11857
    VPRORVQZ256rmkz = 11841,
11858
    VPRORVQZ256rr = 11842,
11859
    VPRORVQZ256rrk  = 11843,
11860
    VPRORVQZ256rrkz = 11844,
11861
    VPRORVQZrm  = 11845,
11862
    VPRORVQZrmb = 11846,
11863
    VPRORVQZrmbk  = 11847,
11864
    VPRORVQZrmbkz = 11848,
11865
    VPRORVQZrmk = 11849,
11866
    VPRORVQZrmkz  = 11850,
11867
    VPRORVQZrr  = 11851,
11868
    VPRORVQZrrk = 11852,
11869
    VPRORVQZrrkz  = 11853,
11870
    VPROTBmi  = 11854,
11871
    VPROTBmr  = 11855,
11872
    VPROTBri  = 11856,
11873
    VPROTBrm  = 11857,
11874
    VPROTBrr  = 11858,
11875
    VPROTDmi  = 11859,
11876
    VPROTDmr  = 11860,
11877
    VPROTDri  = 11861,
11878
    VPROTDrm  = 11862,
11879
    VPROTDrr  = 11863,
11880
    VPROTQmi  = 11864,
11881
    VPROTQmr  = 11865,
11882
    VPROTQri  = 11866,
11883
    VPROTQrm  = 11867,
11884
    VPROTQrr  = 11868,
11885
    VPROTWmi  = 11869,
11886
    VPROTWmr  = 11870,
11887
    VPROTWri  = 11871,
11888
    VPROTWrm  = 11872,
11889
    VPROTWrr  = 11873,
11890
    VPSADBWYrm  = 11874,
11891
    VPSADBWYrr  = 11875,
11892
    VPSADBWZ128rm = 11876,
11893
    VPSADBWZ128rr = 11877,
11894
    VPSADBWZ256rm = 11878,
11895
    VPSADBWZ256rr = 11879,
11896
    VPSADBWZ512rm = 11880,
11897
    VPSADBWZ512rr = 11881,
11898
    VPSADBWrm = 11882,
11899
    VPSADBWrr = 11883,
11900
    VPSCATTERDDZ128mr = 11884,
11901
    VPSCATTERDDZ256mr = 11885,
11902
    VPSCATTERDDZmr  = 11886,
11903
    VPSCATTERDQZ128mr = 11887,
11904
    VPSCATTERDQZ256mr = 11888,
11905
    VPSCATTERDQZmr  = 11889,
11906
    VPSCATTERQDZ128mr = 11890,
11907
    VPSCATTERQDZ256mr = 11891,
11908
    VPSCATTERQDZmr  = 11892,
11909
    VPSCATTERQQZ128mr = 11893,
11910
    VPSCATTERQQZ256mr = 11894,
11911
    VPSCATTERQQZmr  = 11895,
11912
    VPSHABmr  = 11896,
11913
    VPSHABrm  = 11897,
11914
    VPSHABrr  = 11898,
11915
    VPSHADmr  = 11899,
11916
    VPSHADrm  = 11900,
11917
    VPSHADrr  = 11901,
11918
    VPSHAQmr  = 11902,
11919
    VPSHAQrm  = 11903,
11920
    VPSHAQrr  = 11904,
11921
    VPSHAWmr  = 11905,
11922
    VPSHAWrm  = 11906,
11923
    VPSHAWrr  = 11907,
11924
    VPSHLBmr  = 11908,
11925
    VPSHLBrm  = 11909,
11926
    VPSHLBrr  = 11910,
11927
    VPSHLDmr  = 11911,
11928
    VPSHLDrm  = 11912,
11929
    VPSHLDrr  = 11913,
11930
    VPSHLQmr  = 11914,
11931
    VPSHLQrm  = 11915,
11932
    VPSHLQrr  = 11916,
11933
    VPSHLWmr  = 11917,
11934
    VPSHLWrm  = 11918,
11935
    VPSHLWrr  = 11919,
11936
    VPSHUFBYrm  = 11920,
11937
    VPSHUFBYrr  = 11921,
11938
    VPSHUFBZ128rm = 11922,
11939
    VPSHUFBZ128rmk  = 11923,
11940
    VPSHUFBZ128rmkz = 11924,
11941
    VPSHUFBZ128rr = 11925,
11942
    VPSHUFBZ128rrk  = 11926,
11943
    VPSHUFBZ128rrkz = 11927,
11944
    VPSHUFBZ256rm = 11928,
11945
    VPSHUFBZ256rmk  = 11929,
11946
    VPSHUFBZ256rmkz = 11930,
11947
    VPSHUFBZ256rr = 11931,
11948
    VPSHUFBZ256rrk  = 11932,
11949
    VPSHUFBZ256rrkz = 11933,
11950
    VPSHUFBZrm  = 11934,
11951
    VPSHUFBZrmk = 11935,
11952
    VPSHUFBZrmkz  = 11936,
11953
    VPSHUFBZrr  = 11937,
11954
    VPSHUFBZrrk = 11938,
11955
    VPSHUFBZrrkz  = 11939,
11956
    VPSHUFBrm = 11940,
11957
    VPSHUFBrr = 11941,
11958
    VPSHUFDYmi  = 11942,
11959
    VPSHUFDYri  = 11943,
11960
    VPSHUFDZ128mbi  = 11944,
11961
    VPSHUFDZ128mbik = 11945,
11962
    VPSHUFDZ128mbikz  = 11946,
11963
    VPSHUFDZ128mi = 11947,
11964
    VPSHUFDZ128mik  = 11948,
11965
    VPSHUFDZ128mikz = 11949,
11966
    VPSHUFDZ128ri = 11950,
11967
    VPSHUFDZ128rik  = 11951,
11968
    VPSHUFDZ128rikz = 11952,
11969
    VPSHUFDZ256mbi  = 11953,
11970
    VPSHUFDZ256mbik = 11954,
11971
    VPSHUFDZ256mbikz  = 11955,
11972
    VPSHUFDZ256mi = 11956,
11973
    VPSHUFDZ256mik  = 11957,
11974
    VPSHUFDZ256mikz = 11958,
11975
    VPSHUFDZ256ri = 11959,
11976
    VPSHUFDZ256rik  = 11960,
11977
    VPSHUFDZ256rikz = 11961,
11978
    VPSHUFDZmbi = 11962,
11979
    VPSHUFDZmbik  = 11963,
11980
    VPSHUFDZmbikz = 11964,
11981
    VPSHUFDZmi  = 11965,
11982
    VPSHUFDZmik = 11966,
11983
    VPSHUFDZmikz  = 11967,
11984
    VPSHUFDZri  = 11968,
11985
    VPSHUFDZrik = 11969,
11986
    VPSHUFDZrikz  = 11970,
11987
    VPSHUFDmi = 11971,
11988
    VPSHUFDri = 11972,
11989
    VPSHUFHWYmi = 11973,
11990
    VPSHUFHWYri = 11974,
11991
    VPSHUFHWZ128mi  = 11975,
11992
    VPSHUFHWZ128mik = 11976,
11993
    VPSHUFHWZ128mikz  = 11977,
11994
    VPSHUFHWZ128ri  = 11978,
11995
    VPSHUFHWZ128rik = 11979,
11996
    VPSHUFHWZ128rikz  = 11980,
11997
    VPSHUFHWZ256mi  = 11981,
11998
    VPSHUFHWZ256mik = 11982,
11999
    VPSHUFHWZ256mikz  = 11983,
12000
    VPSHUFHWZ256ri  = 11984,
12001
    VPSHUFHWZ256rik = 11985,
12002
    VPSHUFHWZ256rikz  = 11986,
12003
    VPSHUFHWZmi = 11987,
12004
    VPSHUFHWZmik  = 11988,
12005
    VPSHUFHWZmikz = 11989,
12006
    VPSHUFHWZri = 11990,
12007
    VPSHUFHWZrik  = 11991,
12008
    VPSHUFHWZrikz = 11992,
12009
    VPSHUFHWmi  = 11993,
12010
    VPSHUFHWri  = 11994,
12011
    VPSHUFLWYmi = 11995,
12012
    VPSHUFLWYri = 11996,
12013
    VPSHUFLWZ128mi  = 11997,
12014
    VPSHUFLWZ128mik = 11998,
12015
    VPSHUFLWZ128mikz  = 11999,
12016
    VPSHUFLWZ128ri  = 12000,
12017
    VPSHUFLWZ128rik = 12001,
12018
    VPSHUFLWZ128rikz  = 12002,
12019
    VPSHUFLWZ256mi  = 12003,
12020
    VPSHUFLWZ256mik = 12004,
12021
    VPSHUFLWZ256mikz  = 12005,
12022
    VPSHUFLWZ256ri  = 12006,
12023
    VPSHUFLWZ256rik = 12007,
12024
    VPSHUFLWZ256rikz  = 12008,
12025
    VPSHUFLWZmi = 12009,
12026
    VPSHUFLWZmik  = 12010,
12027
    VPSHUFLWZmikz = 12011,
12028
    VPSHUFLWZri = 12012,
12029
    VPSHUFLWZrik  = 12013,
12030
    VPSHUFLWZrikz = 12014,
12031
    VPSHUFLWmi  = 12015,
12032
    VPSHUFLWri  = 12016,
12033
    VPSIGNBYrm  = 12017,
12034
    VPSIGNBYrr  = 12018,
12035
    VPSIGNBrm = 12019,
12036
    VPSIGNBrr = 12020,
12037
    VPSIGNDYrm  = 12021,
12038
    VPSIGNDYrr  = 12022,
12039
    VPSIGNDrm = 12023,
12040
    VPSIGNDrr = 12024,
12041
    VPSIGNWYrm  = 12025,
12042
    VPSIGNWYrr  = 12026,
12043
    VPSIGNWrm = 12027,
12044
    VPSIGNWrr = 12028,
12045
    VPSLLDQYri  = 12029,
12046
    VPSLLDQZ128rm = 12030,
12047
    VPSLLDQZ128rr = 12031,
12048
    VPSLLDQZ256rm = 12032,
12049
    VPSLLDQZ256rr = 12033,
12050
    VPSLLDQZ512rm = 12034,
12051
    VPSLLDQZ512rr = 12035,
12052
    VPSLLDQri = 12036,
12053
    VPSLLDYri = 12037,
12054
    VPSLLDYrm = 12038,
12055
    VPSLLDYrr = 12039,
12056
    VPSLLDZ128mbi = 12040,
12057
    VPSLLDZ128mbik  = 12041,
12058
    VPSLLDZ128mbikz = 12042,
12059
    VPSLLDZ128mi  = 12043,
12060
    VPSLLDZ128mik = 12044,
12061
    VPSLLDZ128mikz  = 12045,
12062
    VPSLLDZ128ri  = 12046,
12063
    VPSLLDZ128rik = 12047,
12064
    VPSLLDZ128rikz  = 12048,
12065
    VPSLLDZ128rm  = 12049,
12066
    VPSLLDZ128rmk = 12050,
12067
    VPSLLDZ128rmkz  = 12051,
12068
    VPSLLDZ128rr  = 12052,
12069
    VPSLLDZ128rrk = 12053,
12070
    VPSLLDZ128rrkz  = 12054,
12071
    VPSLLDZ256mbi = 12055,
12072
    VPSLLDZ256mbik  = 12056,
12073
    VPSLLDZ256mbikz = 12057,
12074
    VPSLLDZ256mi  = 12058,
12075
    VPSLLDZ256mik = 12059,
12076
    VPSLLDZ256mikz  = 12060,
12077
    VPSLLDZ256ri  = 12061,
12078
    VPSLLDZ256rik = 12062,
12079
    VPSLLDZ256rikz  = 12063,
12080
    VPSLLDZ256rm  = 12064,
12081
    VPSLLDZ256rmk = 12065,
12082
    VPSLLDZ256rmkz  = 12066,
12083
    VPSLLDZ256rr  = 12067,
12084
    VPSLLDZ256rrk = 12068,
12085
    VPSLLDZ256rrkz  = 12069,
12086
    VPSLLDZmbi  = 12070,
12087
    VPSLLDZmbik = 12071,
12088
    VPSLLDZmbikz  = 12072,
12089
    VPSLLDZmi = 12073,
12090
    VPSLLDZmik  = 12074,
12091
    VPSLLDZmikz = 12075,
12092
    VPSLLDZri = 12076,
12093
    VPSLLDZrik  = 12077,
12094
    VPSLLDZrikz = 12078,
12095
    VPSLLDZrm = 12079,
12096
    VPSLLDZrmk  = 12080,
12097
    VPSLLDZrmkz = 12081,
12098
    VPSLLDZrr = 12082,
12099
    VPSLLDZrrk  = 12083,
12100
    VPSLLDZrrkz = 12084,
12101
    VPSLLDri  = 12085,
12102
    VPSLLDrm  = 12086,
12103
    VPSLLDrr  = 12087,
12104
    VPSLLQYri = 12088,
12105
    VPSLLQYrm = 12089,
12106
    VPSLLQYrr = 12090,
12107
    VPSLLQZ128mbi = 12091,
12108
    VPSLLQZ128mbik  = 12092,
12109
    VPSLLQZ128mbikz = 12093,
12110
    VPSLLQZ128mi  = 12094,
12111
    VPSLLQZ128mik = 12095,
12112
    VPSLLQZ128mikz  = 12096,
12113
    VPSLLQZ128ri  = 12097,
12114
    VPSLLQZ128rik = 12098,
12115
    VPSLLQZ128rikz  = 12099,
12116
    VPSLLQZ128rm  = 12100,
12117
    VPSLLQZ128rmk = 12101,
12118
    VPSLLQZ128rmkz  = 12102,
12119
    VPSLLQZ128rr  = 12103,
12120
    VPSLLQZ128rrk = 12104,
12121
    VPSLLQZ128rrkz  = 12105,
12122
    VPSLLQZ256mbi = 12106,
12123
    VPSLLQZ256mbik  = 12107,
12124
    VPSLLQZ256mbikz = 12108,
12125
    VPSLLQZ256mi  = 12109,
12126
    VPSLLQZ256mik = 12110,
12127
    VPSLLQZ256mikz  = 12111,
12128
    VPSLLQZ256ri  = 12112,
12129
    VPSLLQZ256rik = 12113,
12130
    VPSLLQZ256rikz  = 12114,
12131
    VPSLLQZ256rm  = 12115,
12132
    VPSLLQZ256rmk = 12116,
12133
    VPSLLQZ256rmkz  = 12117,
12134
    VPSLLQZ256rr  = 12118,
12135
    VPSLLQZ256rrk = 12119,
12136
    VPSLLQZ256rrkz  = 12120,
12137
    VPSLLQZmbi  = 12121,
12138
    VPSLLQZmbik = 12122,
12139
    VPSLLQZmbikz  = 12123,
12140
    VPSLLQZmi = 12124,
12141
    VPSLLQZmik  = 12125,
12142
    VPSLLQZmikz = 12126,
12143
    VPSLLQZri = 12127,
12144
    VPSLLQZrik  = 12128,
12145
    VPSLLQZrikz = 12129,
12146
    VPSLLQZrm = 12130,
12147
    VPSLLQZrmk  = 12131,
12148
    VPSLLQZrmkz = 12132,
12149
    VPSLLQZrr = 12133,
12150
    VPSLLQZrrk  = 12134,
12151
    VPSLLQZrrkz = 12135,
12152
    VPSLLQri  = 12136,
12153
    VPSLLQrm  = 12137,
12154
    VPSLLQrr  = 12138,
12155
    VPSLLVDYrm  = 12139,
12156
    VPSLLVDYrr  = 12140,
12157
    VPSLLVDZ128rm = 12141,
12158
    VPSLLVDZ128rmb  = 12142,
12159
    VPSLLVDZ128rmbk = 12143,
12160
    VPSLLVDZ128rmbkz  = 12144,
12161
    VPSLLVDZ128rmk  = 12145,
12162
    VPSLLVDZ128rmkz = 12146,
12163
    VPSLLVDZ128rr = 12147,
12164
    VPSLLVDZ128rrk  = 12148,
12165
    VPSLLVDZ128rrkz = 12149,
12166
    VPSLLVDZ256rm = 12150,
12167
    VPSLLVDZ256rmb  = 12151,
12168
    VPSLLVDZ256rmbk = 12152,
12169
    VPSLLVDZ256rmbkz  = 12153,
12170
    VPSLLVDZ256rmk  = 12154,
12171
    VPSLLVDZ256rmkz = 12155,
12172
    VPSLLVDZ256rr = 12156,
12173
    VPSLLVDZ256rrk  = 12157,
12174
    VPSLLVDZ256rrkz = 12158,
12175
    VPSLLVDZrm  = 12159,
12176
    VPSLLVDZrmb = 12160,
12177
    VPSLLVDZrmbk  = 12161,
12178
    VPSLLVDZrmbkz = 12162,
12179
    VPSLLVDZrmk = 12163,
12180
    VPSLLVDZrmkz  = 12164,
12181
    VPSLLVDZrr  = 12165,
12182
    VPSLLVDZrrk = 12166,
12183
    VPSLLVDZrrkz  = 12167,
12184
    VPSLLVDrm = 12168,
12185
    VPSLLVDrr = 12169,
12186
    VPSLLVQYrm  = 12170,
12187
    VPSLLVQYrr  = 12171,
12188
    VPSLLVQZ128rm = 12172,
12189
    VPSLLVQZ128rmb  = 12173,
12190
    VPSLLVQZ128rmbk = 12174,
12191
    VPSLLVQZ128rmbkz  = 12175,
12192
    VPSLLVQZ128rmk  = 12176,
12193
    VPSLLVQZ128rmkz = 12177,
12194
    VPSLLVQZ128rr = 12178,
12195
    VPSLLVQZ128rrk  = 12179,
12196
    VPSLLVQZ128rrkz = 12180,
12197
    VPSLLVQZ256rm = 12181,
12198
    VPSLLVQZ256rmb  = 12182,
12199
    VPSLLVQZ256rmbk = 12183,
12200
    VPSLLVQZ256rmbkz  = 12184,
12201
    VPSLLVQZ256rmk  = 12185,
12202
    VPSLLVQZ256rmkz = 12186,
12203
    VPSLLVQZ256rr = 12187,
12204
    VPSLLVQZ256rrk  = 12188,
12205
    VPSLLVQZ256rrkz = 12189,
12206
    VPSLLVQZrm  = 12190,
12207
    VPSLLVQZrmb = 12191,
12208
    VPSLLVQZrmbk  = 12192,
12209
    VPSLLVQZrmbkz = 12193,
12210
    VPSLLVQZrmk = 12194,
12211
    VPSLLVQZrmkz  = 12195,
12212
    VPSLLVQZrr  = 12196,
12213
    VPSLLVQZrrk = 12197,
12214
    VPSLLVQZrrkz  = 12198,
12215
    VPSLLVQrm = 12199,
12216
    VPSLLVQrr = 12200,
12217
    VPSLLVWZ128rm = 12201,
12218
    VPSLLVWZ128rmk  = 12202,
12219
    VPSLLVWZ128rmkz = 12203,
12220
    VPSLLVWZ128rr = 12204,
12221
    VPSLLVWZ128rrk  = 12205,
12222
    VPSLLVWZ128rrkz = 12206,
12223
    VPSLLVWZ256rm = 12207,
12224
    VPSLLVWZ256rmk  = 12208,
12225
    VPSLLVWZ256rmkz = 12209,
12226
    VPSLLVWZ256rr = 12210,
12227
    VPSLLVWZ256rrk  = 12211,
12228
    VPSLLVWZ256rrkz = 12212,
12229
    VPSLLVWZrm  = 12213,
12230
    VPSLLVWZrmk = 12214,
12231
    VPSLLVWZrmkz  = 12215,
12232
    VPSLLVWZrr  = 12216,
12233
    VPSLLVWZrrk = 12217,
12234
    VPSLLVWZrrkz  = 12218,
12235
    VPSLLWYri = 12219,
12236
    VPSLLWYrm = 12220,
12237
    VPSLLWYrr = 12221,
12238
    VPSLLWZ128mi  = 12222,
12239
    VPSLLWZ128mik = 12223,
12240
    VPSLLWZ128mikz  = 12224,
12241
    VPSLLWZ128ri  = 12225,
12242
    VPSLLWZ128rik = 12226,
12243
    VPSLLWZ128rikz  = 12227,
12244
    VPSLLWZ128rm  = 12228,
12245
    VPSLLWZ128rmk = 12229,
12246
    VPSLLWZ128rmkz  = 12230,
12247
    VPSLLWZ128rr  = 12231,
12248
    VPSLLWZ128rrk = 12232,
12249
    VPSLLWZ128rrkz  = 12233,
12250
    VPSLLWZ256mi  = 12234,
12251
    VPSLLWZ256mik = 12235,
12252
    VPSLLWZ256mikz  = 12236,
12253
    VPSLLWZ256ri  = 12237,
12254
    VPSLLWZ256rik = 12238,
12255
    VPSLLWZ256rikz  = 12239,
12256
    VPSLLWZ256rm  = 12240,
12257
    VPSLLWZ256rmk = 12241,
12258
    VPSLLWZ256rmkz  = 12242,
12259
    VPSLLWZ256rr  = 12243,
12260
    VPSLLWZ256rrk = 12244,
12261
    VPSLLWZ256rrkz  = 12245,
12262
    VPSLLWZmi = 12246,
12263
    VPSLLWZmik  = 12247,
12264
    VPSLLWZmikz = 12248,
12265
    VPSLLWZri = 12249,
12266
    VPSLLWZrik  = 12250,
12267
    VPSLLWZrikz = 12251,
12268
    VPSLLWZrm = 12252,
12269
    VPSLLWZrmk  = 12253,
12270
    VPSLLWZrmkz = 12254,
12271
    VPSLLWZrr = 12255,
12272
    VPSLLWZrrk  = 12256,
12273
    VPSLLWZrrkz = 12257,
12274
    VPSLLWri  = 12258,
12275
    VPSLLWrm  = 12259,
12276
    VPSLLWrr  = 12260,
12277
    VPSRADYri = 12261,
12278
    VPSRADYrm = 12262,
12279
    VPSRADYrr = 12263,
12280
    VPSRADZ128mbi = 12264,
12281
    VPSRADZ128mbik  = 12265,
12282
    VPSRADZ128mbikz = 12266,
12283
    VPSRADZ128mi  = 12267,
12284
    VPSRADZ128mik = 12268,
12285
    VPSRADZ128mikz  = 12269,
12286
    VPSRADZ128ri  = 12270,
12287
    VPSRADZ128rik = 12271,
12288
    VPSRADZ128rikz  = 12272,
12289
    VPSRADZ128rm  = 12273,
12290
    VPSRADZ128rmk = 12274,
12291
    VPSRADZ128rmkz  = 12275,
12292
    VPSRADZ128rr  = 12276,
12293
    VPSRADZ128rrk = 12277,
12294
    VPSRADZ128rrkz  = 12278,
12295
    VPSRADZ256mbi = 12279,
12296
    VPSRADZ256mbik  = 12280,
12297
    VPSRADZ256mbikz = 12281,
12298
    VPSRADZ256mi  = 12282,
12299
    VPSRADZ256mik = 12283,
12300
    VPSRADZ256mikz  = 12284,
12301
    VPSRADZ256ri  = 12285,
12302
    VPSRADZ256rik = 12286,
12303
    VPSRADZ256rikz  = 12287,
12304
    VPSRADZ256rm  = 12288,
12305
    VPSRADZ256rmk = 12289,
12306
    VPSRADZ256rmkz  = 12290,
12307
    VPSRADZ256rr  = 12291,
12308
    VPSRADZ256rrk = 12292,
12309
    VPSRADZ256rrkz  = 12293,
12310
    VPSRADZmbi  = 12294,
12311
    VPSRADZmbik = 12295,
12312
    VPSRADZmbikz  = 12296,
12313
    VPSRADZmi = 12297,
12314
    VPSRADZmik  = 12298,
12315
    VPSRADZmikz = 12299,
12316
    VPSRADZri = 12300,
12317
    VPSRADZrik  = 12301,
12318
    VPSRADZrikz = 12302,
12319
    VPSRADZrm = 12303,
12320
    VPSRADZrmk  = 12304,
12321
    VPSRADZrmkz = 12305,
12322
    VPSRADZrr = 12306,
12323
    VPSRADZrrk  = 12307,
12324
    VPSRADZrrkz = 12308,
12325
    VPSRADri  = 12309,
12326
    VPSRADrm  = 12310,
12327
    VPSRADrr  = 12311,
12328
    VPSRAQZ128mbi = 12312,
12329
    VPSRAQZ128mbik  = 12313,
12330
    VPSRAQZ128mbikz = 12314,
12331
    VPSRAQZ128mi  = 12315,
12332
    VPSRAQZ128mik = 12316,
12333
    VPSRAQZ128mikz  = 12317,
12334
    VPSRAQZ128ri  = 12318,
12335
    VPSRAQZ128rik = 12319,
12336
    VPSRAQZ128rikz  = 12320,
12337
    VPSRAQZ128rm  = 12321,
12338
    VPSRAQZ128rmk = 12322,
12339
    VPSRAQZ128rmkz  = 12323,
12340
    VPSRAQZ128rr  = 12324,
12341
    VPSRAQZ128rrk = 12325,
12342
    VPSRAQZ128rrkz  = 12326,
12343
    VPSRAQZ256mbi = 12327,
12344
    VPSRAQZ256mbik  = 12328,
12345
    VPSRAQZ256mbikz = 12329,
12346
    VPSRAQZ256mi  = 12330,
12347
    VPSRAQZ256mik = 12331,
12348
    VPSRAQZ256mikz  = 12332,
12349
    VPSRAQZ256ri  = 12333,
12350
    VPSRAQZ256rik = 12334,
12351
    VPSRAQZ256rikz  = 12335,
12352
    VPSRAQZ256rm  = 12336,
12353
    VPSRAQZ256rmk = 12337,
12354
    VPSRAQZ256rmkz  = 12338,
12355
    VPSRAQZ256rr  = 12339,
12356
    VPSRAQZ256rrk = 12340,
12357
    VPSRAQZ256rrkz  = 12341,
12358
    VPSRAQZmbi  = 12342,
12359
    VPSRAQZmbik = 12343,
12360
    VPSRAQZmbikz  = 12344,
12361
    VPSRAQZmi = 12345,
12362
    VPSRAQZmik  = 12346,
12363
    VPSRAQZmikz = 12347,
12364
    VPSRAQZri = 12348,
12365
    VPSRAQZrik  = 12349,
12366
    VPSRAQZrikz = 12350,
12367
    VPSRAQZrm = 12351,
12368
    VPSRAQZrmk  = 12352,
12369
    VPSRAQZrmkz = 12353,
12370
    VPSRAQZrr = 12354,
12371
    VPSRAQZrrk  = 12355,
12372
    VPSRAQZrrkz = 12356,
12373
    VPSRAVDYrm  = 12357,
12374
    VPSRAVDYrr  = 12358,
12375
    VPSRAVDZ128rm = 12359,
12376
    VPSRAVDZ128rmb  = 12360,
12377
    VPSRAVDZ128rmbk = 12361,
12378
    VPSRAVDZ128rmbkz  = 12362,
12379
    VPSRAVDZ128rmk  = 12363,
12380
    VPSRAVDZ128rmkz = 12364,
12381
    VPSRAVDZ128rr = 12365,
12382
    VPSRAVDZ128rrk  = 12366,
12383
    VPSRAVDZ128rrkz = 12367,
12384
    VPSRAVDZ256rm = 12368,
12385
    VPSRAVDZ256rmb  = 12369,
12386
    VPSRAVDZ256rmbk = 12370,
12387
    VPSRAVDZ256rmbkz  = 12371,
12388
    VPSRAVDZ256rmk  = 12372,
12389
    VPSRAVDZ256rmkz = 12373,
12390
    VPSRAVDZ256rr = 12374,
12391
    VPSRAVDZ256rrk  = 12375,
12392
    VPSRAVDZ256rrkz = 12376,
12393
    VPSRAVDZrm  = 12377,
12394
    VPSRAVDZrmb = 12378,
12395
    VPSRAVDZrmbk  = 12379,
12396
    VPSRAVDZrmbkz = 12380,
12397
    VPSRAVDZrmk = 12381,
12398
    VPSRAVDZrmkz  = 12382,
12399
    VPSRAVDZrr  = 12383,
12400
    VPSRAVDZrrk = 12384,
12401
    VPSRAVDZrrkz  = 12385,
12402
    VPSRAVDrm = 12386,
12403
    VPSRAVDrr = 12387,
12404
    VPSRAVQZ128rm = 12388,
12405
    VPSRAVQZ128rmb  = 12389,
12406
    VPSRAVQZ128rmbk = 12390,
12407
    VPSRAVQZ128rmbkz  = 12391,
12408
    VPSRAVQZ128rmk  = 12392,
12409
    VPSRAVQZ128rmkz = 12393,
12410
    VPSRAVQZ128rr = 12394,
12411
    VPSRAVQZ128rrk  = 12395,
12412
    VPSRAVQZ128rrkz = 12396,
12413
    VPSRAVQZ256rm = 12397,
12414
    VPSRAVQZ256rmb  = 12398,
12415
    VPSRAVQZ256rmbk = 12399,
12416
    VPSRAVQZ256rmbkz  = 12400,
12417
    VPSRAVQZ256rmk  = 12401,
12418
    VPSRAVQZ256rmkz = 12402,
12419
    VPSRAVQZ256rr = 12403,
12420
    VPSRAVQZ256rrk  = 12404,
12421
    VPSRAVQZ256rrkz = 12405,
12422
    VPSRAVQZrm  = 12406,
12423
    VPSRAVQZrmb = 12407,
12424
    VPSRAVQZrmbk  = 12408,
12425
    VPSRAVQZrmbkz = 12409,
12426
    VPSRAVQZrmk = 12410,
12427
    VPSRAVQZrmkz  = 12411,
12428
    VPSRAVQZrr  = 12412,
12429
    VPSRAVQZrrk = 12413,
12430
    VPSRAVQZrrkz  = 12414,
12431
    VPSRAVWZ128rm = 12415,
12432
    VPSRAVWZ128rmk  = 12416,
12433
    VPSRAVWZ128rmkz = 12417,
12434
    VPSRAVWZ128rr = 12418,
12435
    VPSRAVWZ128rrk  = 12419,
12436
    VPSRAVWZ128rrkz = 12420,
12437
    VPSRAVWZ256rm = 12421,
12438
    VPSRAVWZ256rmk  = 12422,
12439
    VPSRAVWZ256rmkz = 12423,
12440
    VPSRAVWZ256rr = 12424,
12441
    VPSRAVWZ256rrk  = 12425,
12442
    VPSRAVWZ256rrkz = 12426,
12443
    VPSRAVWZrm  = 12427,
12444
    VPSRAVWZrmk = 12428,
12445
    VPSRAVWZrmkz  = 12429,
12446
    VPSRAVWZrr  = 12430,
12447
    VPSRAVWZrrk = 12431,
12448
    VPSRAVWZrrkz  = 12432,
12449
    VPSRAWYri = 12433,
12450
    VPSRAWYrm = 12434,
12451
    VPSRAWYrr = 12435,
12452
    VPSRAWZ128mi  = 12436,
12453
    VPSRAWZ128mik = 12437,
12454
    VPSRAWZ128mikz  = 12438,
12455
    VPSRAWZ128ri  = 12439,
12456
    VPSRAWZ128rik = 12440,
12457
    VPSRAWZ128rikz  = 12441,
12458
    VPSRAWZ128rm  = 12442,
12459
    VPSRAWZ128rmk = 12443,
12460
    VPSRAWZ128rmkz  = 12444,
12461
    VPSRAWZ128rr  = 12445,
12462
    VPSRAWZ128rrk = 12446,
12463
    VPSRAWZ128rrkz  = 12447,
12464
    VPSRAWZ256mi  = 12448,
12465
    VPSRAWZ256mik = 12449,
12466
    VPSRAWZ256mikz  = 12450,
12467
    VPSRAWZ256ri  = 12451,
12468
    VPSRAWZ256rik = 12452,
12469
    VPSRAWZ256rikz  = 12453,
12470
    VPSRAWZ256rm  = 12454,
12471
    VPSRAWZ256rmk = 12455,
12472
    VPSRAWZ256rmkz  = 12456,
12473
    VPSRAWZ256rr  = 12457,
12474
    VPSRAWZ256rrk = 12458,
12475
    VPSRAWZ256rrkz  = 12459,
12476
    VPSRAWZmi = 12460,
12477
    VPSRAWZmik  = 12461,
12478
    VPSRAWZmikz = 12462,
12479
    VPSRAWZri = 12463,
12480
    VPSRAWZrik  = 12464,
12481
    VPSRAWZrikz = 12465,
12482
    VPSRAWZrm = 12466,
12483
    VPSRAWZrmk  = 12467,
12484
    VPSRAWZrmkz = 12468,
12485
    VPSRAWZrr = 12469,
12486
    VPSRAWZrrk  = 12470,
12487
    VPSRAWZrrkz = 12471,
12488
    VPSRAWri  = 12472,
12489
    VPSRAWrm  = 12473,
12490
    VPSRAWrr  = 12474,
12491
    VPSRLDQYri  = 12475,
12492
    VPSRLDQZ128rm = 12476,
12493
    VPSRLDQZ128rr = 12477,
12494
    VPSRLDQZ256rm = 12478,
12495
    VPSRLDQZ256rr = 12479,
12496
    VPSRLDQZ512rm = 12480,
12497
    VPSRLDQZ512rr = 12481,
12498
    VPSRLDQri = 12482,
12499
    VPSRLDYri = 12483,
12500
    VPSRLDYrm = 12484,
12501
    VPSRLDYrr = 12485,
12502
    VPSRLDZ128mbi = 12486,
12503
    VPSRLDZ128mbik  = 12487,
12504
    VPSRLDZ128mbikz = 12488,
12505
    VPSRLDZ128mi  = 12489,
12506
    VPSRLDZ128mik = 12490,
12507
    VPSRLDZ128mikz  = 12491,
12508
    VPSRLDZ128ri  = 12492,
12509
    VPSRLDZ128rik = 12493,
12510
    VPSRLDZ128rikz  = 12494,
12511
    VPSRLDZ128rm  = 12495,
12512
    VPSRLDZ128rmk = 12496,
12513
    VPSRLDZ128rmkz  = 12497,
12514
    VPSRLDZ128rr  = 12498,
12515
    VPSRLDZ128rrk = 12499,
12516
    VPSRLDZ128rrkz  = 12500,
12517
    VPSRLDZ256mbi = 12501,
12518
    VPSRLDZ256mbik  = 12502,
12519
    VPSRLDZ256mbikz = 12503,
12520
    VPSRLDZ256mi  = 12504,
12521
    VPSRLDZ256mik = 12505,
12522
    VPSRLDZ256mikz  = 12506,
12523
    VPSRLDZ256ri  = 12507,
12524
    VPSRLDZ256rik = 12508,
12525
    VPSRLDZ256rikz  = 12509,
12526
    VPSRLDZ256rm  = 12510,
12527
    VPSRLDZ256rmk = 12511,
12528
    VPSRLDZ256rmkz  = 12512,
12529
    VPSRLDZ256rr  = 12513,
12530
    VPSRLDZ256rrk = 12514,
12531
    VPSRLDZ256rrkz  = 12515,
12532
    VPSRLDZmbi  = 12516,
12533
    VPSRLDZmbik = 12517,
12534
    VPSRLDZmbikz  = 12518,
12535
    VPSRLDZmi = 12519,
12536
    VPSRLDZmik  = 12520,
12537
    VPSRLDZmikz = 12521,
12538
    VPSRLDZri = 12522,
12539
    VPSRLDZrik  = 12523,
12540
    VPSRLDZrikz = 12524,
12541
    VPSRLDZrm = 12525,
12542
    VPSRLDZrmk  = 12526,
12543
    VPSRLDZrmkz = 12527,
12544
    VPSRLDZrr = 12528,
12545
    VPSRLDZrrk  = 12529,
12546
    VPSRLDZrrkz = 12530,
12547
    VPSRLDri  = 12531,
12548
    VPSRLDrm  = 12532,
12549
    VPSRLDrr  = 12533,
12550
    VPSRLQYri = 12534,
12551
    VPSRLQYrm = 12535,
12552
    VPSRLQYrr = 12536,
12553
    VPSRLQZ128mbi = 12537,
12554
    VPSRLQZ128mbik  = 12538,
12555
    VPSRLQZ128mbikz = 12539,
12556
    VPSRLQZ128mi  = 12540,
12557
    VPSRLQZ128mik = 12541,
12558
    VPSRLQZ128mikz  = 12542,
12559
    VPSRLQZ128ri  = 12543,
12560
    VPSRLQZ128rik = 12544,
12561
    VPSRLQZ128rikz  = 12545,
12562
    VPSRLQZ128rm  = 12546,
12563
    VPSRLQZ128rmk = 12547,
12564
    VPSRLQZ128rmkz  = 12548,
12565
    VPSRLQZ128rr  = 12549,
12566
    VPSRLQZ128rrk = 12550,
12567
    VPSRLQZ128rrkz  = 12551,
12568
    VPSRLQZ256mbi = 12552,
12569
    VPSRLQZ256mbik  = 12553,
12570
    VPSRLQZ256mbikz = 12554,
12571
    VPSRLQZ256mi  = 12555,
12572
    VPSRLQZ256mik = 12556,
12573
    VPSRLQZ256mikz  = 12557,
12574
    VPSRLQZ256ri  = 12558,
12575
    VPSRLQZ256rik = 12559,
12576
    VPSRLQZ256rikz  = 12560,
12577
    VPSRLQZ256rm  = 12561,
12578
    VPSRLQZ256rmk = 12562,
12579
    VPSRLQZ256rmkz  = 12563,
12580
    VPSRLQZ256rr  = 12564,
12581
    VPSRLQZ256rrk = 12565,
12582
    VPSRLQZ256rrkz  = 12566,
12583
    VPSRLQZmbi  = 12567,
12584
    VPSRLQZmbik = 12568,
12585
    VPSRLQZmbikz  = 12569,
12586
    VPSRLQZmi = 12570,
12587
    VPSRLQZmik  = 12571,
12588
    VPSRLQZmikz = 12572,
12589
    VPSRLQZri = 12573,
12590
    VPSRLQZrik  = 12574,
12591
    VPSRLQZrikz = 12575,
12592
    VPSRLQZrm = 12576,
12593
    VPSRLQZrmk  = 12577,
12594
    VPSRLQZrmkz = 12578,
12595
    VPSRLQZrr = 12579,
12596
    VPSRLQZrrk  = 12580,
12597
    VPSRLQZrrkz = 12581,
12598
    VPSRLQri  = 12582,
12599
    VPSRLQrm  = 12583,
12600
    VPSRLQrr  = 12584,
12601
    VPSRLVDYrm  = 12585,
12602
    VPSRLVDYrr  = 12586,
12603
    VPSRLVDZ128rm = 12587,
12604
    VPSRLVDZ128rmb  = 12588,
12605
    VPSRLVDZ128rmbk = 12589,
12606
    VPSRLVDZ128rmbkz  = 12590,
12607
    VPSRLVDZ128rmk  = 12591,
12608
    VPSRLVDZ128rmkz = 12592,
12609
    VPSRLVDZ128rr = 12593,
12610
    VPSRLVDZ128rrk  = 12594,
12611
    VPSRLVDZ128rrkz = 12595,
12612
    VPSRLVDZ256rm = 12596,
12613
    VPSRLVDZ256rmb  = 12597,
12614
    VPSRLVDZ256rmbk = 12598,
12615
    VPSRLVDZ256rmbkz  = 12599,
12616
    VPSRLVDZ256rmk  = 12600,
12617
    VPSRLVDZ256rmkz = 12601,
12618
    VPSRLVDZ256rr = 12602,
12619
    VPSRLVDZ256rrk  = 12603,
12620
    VPSRLVDZ256rrkz = 12604,
12621
    VPSRLVDZrm  = 12605,
12622
    VPSRLVDZrmb = 12606,
12623
    VPSRLVDZrmbk  = 12607,
12624
    VPSRLVDZrmbkz = 12608,
12625
    VPSRLVDZrmk = 12609,
12626
    VPSRLVDZrmkz  = 12610,
12627
    VPSRLVDZrr  = 12611,
12628
    VPSRLVDZrrk = 12612,
12629
    VPSRLVDZrrkz  = 12613,
12630
    VPSRLVDrm = 12614,
12631
    VPSRLVDrr = 12615,
12632
    VPSRLVQYrm  = 12616,
12633
    VPSRLVQYrr  = 12617,
12634
    VPSRLVQZ128rm = 12618,
12635
    VPSRLVQZ128rmb  = 12619,
12636
    VPSRLVQZ128rmbk = 12620,
12637
    VPSRLVQZ128rmbkz  = 12621,
12638
    VPSRLVQZ128rmk  = 12622,
12639
    VPSRLVQZ128rmkz = 12623,
12640
    VPSRLVQZ128rr = 12624,
12641
    VPSRLVQZ128rrk  = 12625,
12642
    VPSRLVQZ128rrkz = 12626,
12643
    VPSRLVQZ256rm = 12627,
12644
    VPSRLVQZ256rmb  = 12628,
12645
    VPSRLVQZ256rmbk = 12629,
12646
    VPSRLVQZ256rmbkz  = 12630,
12647
    VPSRLVQZ256rmk  = 12631,
12648
    VPSRLVQZ256rmkz = 12632,
12649
    VPSRLVQZ256rr = 12633,
12650
    VPSRLVQZ256rrk  = 12634,
12651
    VPSRLVQZ256rrkz = 12635,
12652
    VPSRLVQZrm  = 12636,
12653
    VPSRLVQZrmb = 12637,
12654
    VPSRLVQZrmbk  = 12638,
12655
    VPSRLVQZrmbkz = 12639,
12656
    VPSRLVQZrmk = 12640,
12657
    VPSRLVQZrmkz  = 12641,
12658
    VPSRLVQZrr  = 12642,
12659
    VPSRLVQZrrk = 12643,
12660
    VPSRLVQZrrkz  = 12644,
12661
    VPSRLVQrm = 12645,
12662
    VPSRLVQrr = 12646,
12663
    VPSRLVWZ128rm = 12647,
12664
    VPSRLVWZ128rmk  = 12648,
12665
    VPSRLVWZ128rmkz = 12649,
12666
    VPSRLVWZ128rr = 12650,
12667
    VPSRLVWZ128rrk  = 12651,
12668
    VPSRLVWZ128rrkz = 12652,
12669
    VPSRLVWZ256rm = 12653,
12670
    VPSRLVWZ256rmk  = 12654,
12671
    VPSRLVWZ256rmkz = 12655,
12672
    VPSRLVWZ256rr = 12656,
12673
    VPSRLVWZ256rrk  = 12657,
12674
    VPSRLVWZ256rrkz = 12658,
12675
    VPSRLVWZrm  = 12659,
12676
    VPSRLVWZrmk = 12660,
12677
    VPSRLVWZrmkz  = 12661,
12678
    VPSRLVWZrr  = 12662,
12679
    VPSRLVWZrrk = 12663,
12680
    VPSRLVWZrrkz  = 12664,
12681
    VPSRLWYri = 12665,
12682
    VPSRLWYrm = 12666,
12683
    VPSRLWYrr = 12667,
12684
    VPSRLWZ128mi  = 12668,
12685
    VPSRLWZ128mik = 12669,
12686
    VPSRLWZ128mikz  = 12670,
12687
    VPSRLWZ128ri  = 12671,
12688
    VPSRLWZ128rik = 12672,
12689
    VPSRLWZ128rikz  = 12673,
12690
    VPSRLWZ128rm  = 12674,
12691
    VPSRLWZ128rmk = 12675,
12692
    VPSRLWZ128rmkz  = 12676,
12693
    VPSRLWZ128rr  = 12677,
12694
    VPSRLWZ128rrk = 12678,
12695
    VPSRLWZ128rrkz  = 12679,
12696
    VPSRLWZ256mi  = 12680,
12697
    VPSRLWZ256mik = 12681,
12698
    VPSRLWZ256mikz  = 12682,
12699
    VPSRLWZ256ri  = 12683,
12700
    VPSRLWZ256rik = 12684,
12701
    VPSRLWZ256rikz  = 12685,
12702
    VPSRLWZ256rm  = 12686,
12703
    VPSRLWZ256rmk = 12687,
12704
    VPSRLWZ256rmkz  = 12688,
12705
    VPSRLWZ256rr  = 12689,
12706
    VPSRLWZ256rrk = 12690,
12707
    VPSRLWZ256rrkz  = 12691,
12708
    VPSRLWZmi = 12692,
12709
    VPSRLWZmik  = 12693,
12710
    VPSRLWZmikz = 12694,
12711
    VPSRLWZri = 12695,
12712
    VPSRLWZrik  = 12696,
12713
    VPSRLWZrikz = 12697,
12714
    VPSRLWZrm = 12698,
12715
    VPSRLWZrmk  = 12699,
12716
    VPSRLWZrmkz = 12700,
12717
    VPSRLWZrr = 12701,
12718
    VPSRLWZrrk  = 12702,
12719
    VPSRLWZrrkz = 12703,
12720
    VPSRLWri  = 12704,
12721
    VPSRLWrm  = 12705,
12722
    VPSRLWrr  = 12706,
12723
    VPSUBBYrm = 12707,
12724
    VPSUBBYrr = 12708,
12725
    VPSUBBZ128rm  = 12709,
12726
    VPSUBBZ128rmk = 12710,
12727
    VPSUBBZ128rmkz  = 12711,
12728
    VPSUBBZ128rr  = 12712,
12729
    VPSUBBZ128rrk = 12713,
12730
    VPSUBBZ128rrkz  = 12714,
12731
    VPSUBBZ256rm  = 12715,
12732
    VPSUBBZ256rmk = 12716,
12733
    VPSUBBZ256rmkz  = 12717,
12734
    VPSUBBZ256rr  = 12718,
12735
    VPSUBBZ256rrk = 12719,
12736
    VPSUBBZ256rrkz  = 12720,
12737
    VPSUBBZrm = 12721,
12738
    VPSUBBZrmk  = 12722,
12739
    VPSUBBZrmkz = 12723,
12740
    VPSUBBZrr = 12724,
12741
    VPSUBBZrrk  = 12725,
12742
    VPSUBBZrrkz = 12726,
12743
    VPSUBBrm  = 12727,
12744
    VPSUBBrr  = 12728,
12745
    VPSUBDYrm = 12729,
12746
    VPSUBDYrr = 12730,
12747
    VPSUBDZ128rm  = 12731,
12748
    VPSUBDZ128rmb = 12732,
12749
    VPSUBDZ128rmbk  = 12733,
12750
    VPSUBDZ128rmbkz = 12734,
12751
    VPSUBDZ128rmk = 12735,
12752
    VPSUBDZ128rmkz  = 12736,
12753
    VPSUBDZ128rr  = 12737,
12754
    VPSUBDZ128rrk = 12738,
12755
    VPSUBDZ128rrkz  = 12739,
12756
    VPSUBDZ256rm  = 12740,
12757
    VPSUBDZ256rmb = 12741,
12758
    VPSUBDZ256rmbk  = 12742,
12759
    VPSUBDZ256rmbkz = 12743,
12760
    VPSUBDZ256rmk = 12744,
12761
    VPSUBDZ256rmkz  = 12745,
12762
    VPSUBDZ256rr  = 12746,
12763
    VPSUBDZ256rrk = 12747,
12764
    VPSUBDZ256rrkz  = 12748,
12765
    VPSUBDZrm = 12749,
12766
    VPSUBDZrmb  = 12750,
12767
    VPSUBDZrmbk = 12751,
12768
    VPSUBDZrmbkz  = 12752,
12769
    VPSUBDZrmk  = 12753,
12770
    VPSUBDZrmkz = 12754,
12771
    VPSUBDZrr = 12755,
12772
    VPSUBDZrrk  = 12756,
12773
    VPSUBDZrrkz = 12757,
12774
    VPSUBDrm  = 12758,
12775
    VPSUBDrr  = 12759,
12776
    VPSUBQYrm = 12760,
12777
    VPSUBQYrr = 12761,
12778
    VPSUBQZ128rm  = 12762,
12779
    VPSUBQZ128rmb = 12763,
12780
    VPSUBQZ128rmbk  = 12764,
12781
    VPSUBQZ128rmbkz = 12765,
12782
    VPSUBQZ128rmk = 12766,
12783
    VPSUBQZ128rmkz  = 12767,
12784
    VPSUBQZ128rr  = 12768,
12785
    VPSUBQZ128rrk = 12769,
12786
    VPSUBQZ128rrkz  = 12770,
12787
    VPSUBQZ256rm  = 12771,
12788
    VPSUBQZ256rmb = 12772,
12789
    VPSUBQZ256rmbk  = 12773,
12790
    VPSUBQZ256rmbkz = 12774,
12791
    VPSUBQZ256rmk = 12775,
12792
    VPSUBQZ256rmkz  = 12776,
12793
    VPSUBQZ256rr  = 12777,
12794
    VPSUBQZ256rrk = 12778,
12795
    VPSUBQZ256rrkz  = 12779,
12796
    VPSUBQZrm = 12780,
12797
    VPSUBQZrmb  = 12781,
12798
    VPSUBQZrmbk = 12782,
12799
    VPSUBQZrmbkz  = 12783,
12800
    VPSUBQZrmk  = 12784,
12801
    VPSUBQZrmkz = 12785,
12802
    VPSUBQZrr = 12786,
12803
    VPSUBQZrrk  = 12787,
12804
    VPSUBQZrrkz = 12788,
12805
    VPSUBQrm  = 12789,
12806
    VPSUBQrr  = 12790,
12807
    VPSUBSBYrm  = 12791,
12808
    VPSUBSBYrr  = 12792,
12809
    VPSUBSBZ128rm = 12793,
12810
    VPSUBSBZ128rmk  = 12794,
12811
    VPSUBSBZ128rmkz = 12795,
12812
    VPSUBSBZ128rr = 12796,
12813
    VPSUBSBZ128rrk  = 12797,
12814
    VPSUBSBZ128rrkz = 12798,
12815
    VPSUBSBZ256rm = 12799,
12816
    VPSUBSBZ256rmk  = 12800,
12817
    VPSUBSBZ256rmkz = 12801,
12818
    VPSUBSBZ256rr = 12802,
12819
    VPSUBSBZ256rrk  = 12803,
12820
    VPSUBSBZ256rrkz = 12804,
12821
    VPSUBSBZrm  = 12805,
12822
    VPSUBSBZrmk = 12806,
12823
    VPSUBSBZrmkz  = 12807,
12824
    VPSUBSBZrr  = 12808,
12825
    VPSUBSBZrrk = 12809,
12826
    VPSUBSBZrrkz  = 12810,
12827
    VPSUBSBrm = 12811,
12828
    VPSUBSBrr = 12812,
12829
    VPSUBSWYrm  = 12813,
12830
    VPSUBSWYrr  = 12814,
12831
    VPSUBSWZ128rm = 12815,
12832
    VPSUBSWZ128rmk  = 12816,
12833
    VPSUBSWZ128rmkz = 12817,
12834
    VPSUBSWZ128rr = 12818,
12835
    VPSUBSWZ128rrk  = 12819,
12836
    VPSUBSWZ128rrkz = 12820,
12837
    VPSUBSWZ256rm = 12821,
12838
    VPSUBSWZ256rmk  = 12822,
12839
    VPSUBSWZ256rmkz = 12823,
12840
    VPSUBSWZ256rr = 12824,
12841
    VPSUBSWZ256rrk  = 12825,
12842
    VPSUBSWZ256rrkz = 12826,
12843
    VPSUBSWZrm  = 12827,
12844
    VPSUBSWZrmk = 12828,
12845
    VPSUBSWZrmkz  = 12829,
12846
    VPSUBSWZrr  = 12830,
12847
    VPSUBSWZrrk = 12831,
12848
    VPSUBSWZrrkz  = 12832,
12849
    VPSUBSWrm = 12833,
12850
    VPSUBSWrr = 12834,
12851
    VPSUBUSBYrm = 12835,
12852
    VPSUBUSBYrr = 12836,
12853
    VPSUBUSBZ128rm  = 12837,
12854
    VPSUBUSBZ128rmk = 12838,
12855
    VPSUBUSBZ128rmkz  = 12839,
12856
    VPSUBUSBZ128rr  = 12840,
12857
    VPSUBUSBZ128rrk = 12841,
12858
    VPSUBUSBZ128rrkz  = 12842,
12859
    VPSUBUSBZ256rm  = 12843,
12860
    VPSUBUSBZ256rmk = 12844,
12861
    VPSUBUSBZ256rmkz  = 12845,
12862
    VPSUBUSBZ256rr  = 12846,
12863
    VPSUBUSBZ256rrk = 12847,
12864
    VPSUBUSBZ256rrkz  = 12848,
12865
    VPSUBUSBZrm = 12849,
12866
    VPSUBUSBZrmk  = 12850,
12867
    VPSUBUSBZrmkz = 12851,
12868
    VPSUBUSBZrr = 12852,
12869
    VPSUBUSBZrrk  = 12853,
12870
    VPSUBUSBZrrkz = 12854,
12871
    VPSUBUSBrm  = 12855,
12872
    VPSUBUSBrr  = 12856,
12873
    VPSUBUSWYrm = 12857,
12874
    VPSUBUSWYrr = 12858,
12875
    VPSUBUSWZ128rm  = 12859,
12876
    VPSUBUSWZ128rmk = 12860,
12877
    VPSUBUSWZ128rmkz  = 12861,
12878
    VPSUBUSWZ128rr  = 12862,
12879
    VPSUBUSWZ128rrk = 12863,
12880
    VPSUBUSWZ128rrkz  = 12864,
12881
    VPSUBUSWZ256rm  = 12865,
12882
    VPSUBUSWZ256rmk = 12866,
12883
    VPSUBUSWZ256rmkz  = 12867,
12884
    VPSUBUSWZ256rr  = 12868,
12885
    VPSUBUSWZ256rrk = 12869,
12886
    VPSUBUSWZ256rrkz  = 12870,
12887
    VPSUBUSWZrm = 12871,
12888
    VPSUBUSWZrmk  = 12872,
12889
    VPSUBUSWZrmkz = 12873,
12890
    VPSUBUSWZrr = 12874,
12891
    VPSUBUSWZrrk  = 12875,
12892
    VPSUBUSWZrrkz = 12876,
12893
    VPSUBUSWrm  = 12877,
12894
    VPSUBUSWrr  = 12878,
12895
    VPSUBWYrm = 12879,
12896
    VPSUBWYrr = 12880,
12897
    VPSUBWZ128rm  = 12881,
12898
    VPSUBWZ128rmk = 12882,
12899
    VPSUBWZ128rmkz  = 12883,
12900
    VPSUBWZ128rr  = 12884,
12901
    VPSUBWZ128rrk = 12885,
12902
    VPSUBWZ128rrkz  = 12886,
12903
    VPSUBWZ256rm  = 12887,
12904
    VPSUBWZ256rmk = 12888,
12905
    VPSUBWZ256rmkz  = 12889,
12906
    VPSUBWZ256rr  = 12890,
12907
    VPSUBWZ256rrk = 12891,
12908
    VPSUBWZ256rrkz  = 12892,
12909
    VPSUBWZrm = 12893,
12910
    VPSUBWZrmk  = 12894,
12911
    VPSUBWZrmkz = 12895,
12912
    VPSUBWZrr = 12896,
12913
    VPSUBWZrrk  = 12897,
12914
    VPSUBWZrrkz = 12898,
12915
    VPSUBWrm  = 12899,
12916
    VPSUBWrr  = 12900,
12917
    VPTERNLOGDZ128rmbi  = 12901,
12918
    VPTERNLOGDZ128rmbik = 12902,
12919
    VPTERNLOGDZ128rmbikz  = 12903,
12920
    VPTERNLOGDZ128rmi = 12904,
12921
    VPTERNLOGDZ128rmik  = 12905,
12922
    VPTERNLOGDZ128rmikz = 12906,
12923
    VPTERNLOGDZ128rri = 12907,
12924
    VPTERNLOGDZ128rrik  = 12908,
12925
    VPTERNLOGDZ128rrikz = 12909,
12926
    VPTERNLOGDZ256rmbi  = 12910,
12927
    VPTERNLOGDZ256rmbik = 12911,
12928
    VPTERNLOGDZ256rmbikz  = 12912,
12929
    VPTERNLOGDZ256rmi = 12913,
12930
    VPTERNLOGDZ256rmik  = 12914,
12931
    VPTERNLOGDZ256rmikz = 12915,
12932
    VPTERNLOGDZ256rri = 12916,
12933
    VPTERNLOGDZ256rrik  = 12917,
12934
    VPTERNLOGDZ256rrikz = 12918,
12935
    VPTERNLOGDZrmbi = 12919,
12936
    VPTERNLOGDZrmbik  = 12920,
12937
    VPTERNLOGDZrmbikz = 12921,
12938
    VPTERNLOGDZrmi  = 12922,
12939
    VPTERNLOGDZrmik = 12923,
12940
    VPTERNLOGDZrmikz  = 12924,
12941
    VPTERNLOGDZrri  = 12925,
12942
    VPTERNLOGDZrrik = 12926,
12943
    VPTERNLOGDZrrikz  = 12927,
12944
    VPTERNLOGQZ128rmbi  = 12928,
12945
    VPTERNLOGQZ128rmbik = 12929,
12946
    VPTERNLOGQZ128rmbikz  = 12930,
12947
    VPTERNLOGQZ128rmi = 12931,
12948
    VPTERNLOGQZ128rmik  = 12932,
12949
    VPTERNLOGQZ128rmikz = 12933,
12950
    VPTERNLOGQZ128rri = 12934,
12951
    VPTERNLOGQZ128rrik  = 12935,
12952
    VPTERNLOGQZ128rrikz = 12936,
12953
    VPTERNLOGQZ256rmbi  = 12937,
12954
    VPTERNLOGQZ256rmbik = 12938,
12955
    VPTERNLOGQZ256rmbikz  = 12939,
12956
    VPTERNLOGQZ256rmi = 12940,
12957
    VPTERNLOGQZ256rmik  = 12941,
12958
    VPTERNLOGQZ256rmikz = 12942,
12959
    VPTERNLOGQZ256rri = 12943,
12960
    VPTERNLOGQZ256rrik  = 12944,
12961
    VPTERNLOGQZ256rrikz = 12945,
12962
    VPTERNLOGQZrmbi = 12946,
12963
    VPTERNLOGQZrmbik  = 12947,
12964
    VPTERNLOGQZrmbikz = 12948,
12965
    VPTERNLOGQZrmi  = 12949,
12966
    VPTERNLOGQZrmik = 12950,
12967
    VPTERNLOGQZrmikz  = 12951,
12968
    VPTERNLOGQZrri  = 12952,
12969
    VPTERNLOGQZrrik = 12953,
12970
    VPTERNLOGQZrrikz  = 12954,
12971
    VPTESTMBZ128rm  = 12955,
12972
    VPTESTMBZ128rmk = 12956,
12973
    VPTESTMBZ128rr  = 12957,
12974
    VPTESTMBZ128rrk = 12958,
12975
    VPTESTMBZ256rm  = 12959,
12976
    VPTESTMBZ256rmk = 12960,
12977
    VPTESTMBZ256rr  = 12961,
12978
    VPTESTMBZ256rrk = 12962,
12979
    VPTESTMBZrm = 12963,
12980
    VPTESTMBZrmk  = 12964,
12981
    VPTESTMBZrr = 12965,
12982
    VPTESTMBZrrk  = 12966,
12983
    VPTESTMDZ128rm  = 12967,
12984
    VPTESTMDZ128rmb = 12968,
12985
    VPTESTMDZ128rmbk  = 12969,
12986
    VPTESTMDZ128rmk = 12970,
12987
    VPTESTMDZ128rr  = 12971,
12988
    VPTESTMDZ128rrk = 12972,
12989
    VPTESTMDZ256rm  = 12973,
12990
    VPTESTMDZ256rmb = 12974,
12991
    VPTESTMDZ256rmbk  = 12975,
12992
    VPTESTMDZ256rmk = 12976,
12993
    VPTESTMDZ256rr  = 12977,
12994
    VPTESTMDZ256rrk = 12978,
12995
    VPTESTMDZrm = 12979,
12996
    VPTESTMDZrmb  = 12980,
12997
    VPTESTMDZrmbk = 12981,
12998
    VPTESTMDZrmk  = 12982,
12999
    VPTESTMDZrr = 12983,
13000
    VPTESTMDZrrk  = 12984,
13001
    VPTESTMQZ128rm  = 12985,
13002
    VPTESTMQZ128rmb = 12986,
13003
    VPTESTMQZ128rmbk  = 12987,
13004
    VPTESTMQZ128rmk = 12988,
13005
    VPTESTMQZ128rr  = 12989,
13006
    VPTESTMQZ128rrk = 12990,
13007
    VPTESTMQZ256rm  = 12991,
13008
    VPTESTMQZ256rmb = 12992,
13009
    VPTESTMQZ256rmbk  = 12993,
13010
    VPTESTMQZ256rmk = 12994,
13011
    VPTESTMQZ256rr  = 12995,
13012
    VPTESTMQZ256rrk = 12996,
13013
    VPTESTMQZrm = 12997,
13014
    VPTESTMQZrmb  = 12998,
13015
    VPTESTMQZrmbk = 12999,
13016
    VPTESTMQZrmk  = 13000,
13017
    VPTESTMQZrr = 13001,
13018
    VPTESTMQZrrk  = 13002,
13019
    VPTESTMWZ128rm  = 13003,
13020
    VPTESTMWZ128rmk = 13004,
13021
    VPTESTMWZ128rr  = 13005,
13022
    VPTESTMWZ128rrk = 13006,
13023
    VPTESTMWZ256rm  = 13007,
13024
    VPTESTMWZ256rmk = 13008,
13025
    VPTESTMWZ256rr  = 13009,
13026
    VPTESTMWZ256rrk = 13010,
13027
    VPTESTMWZrm = 13011,
13028
    VPTESTMWZrmk  = 13012,
13029
    VPTESTMWZrr = 13013,
13030
    VPTESTMWZrrk  = 13014,
13031
    VPTESTNMBZ128rm = 13015,
13032
    VPTESTNMBZ128rmk  = 13016,
13033
    VPTESTNMBZ128rr = 13017,
13034
    VPTESTNMBZ128rrk  = 13018,
13035
    VPTESTNMBZ256rm = 13019,
13036
    VPTESTNMBZ256rmk  = 13020,
13037
    VPTESTNMBZ256rr = 13021,
13038
    VPTESTNMBZ256rrk  = 13022,
13039
    VPTESTNMBZrm  = 13023,
13040
    VPTESTNMBZrmk = 13024,
13041
    VPTESTNMBZrr  = 13025,
13042
    VPTESTNMBZrrk = 13026,
13043
    VPTESTNMDZ128rm = 13027,
13044
    VPTESTNMDZ128rmb  = 13028,
13045
    VPTESTNMDZ128rmbk = 13029,
13046
    VPTESTNMDZ128rmk  = 13030,
13047
    VPTESTNMDZ128rr = 13031,
13048
    VPTESTNMDZ128rrk  = 13032,
13049
    VPTESTNMDZ256rm = 13033,
13050
    VPTESTNMDZ256rmb  = 13034,
13051
    VPTESTNMDZ256rmbk = 13035,
13052
    VPTESTNMDZ256rmk  = 13036,
13053
    VPTESTNMDZ256rr = 13037,
13054
    VPTESTNMDZ256rrk  = 13038,
13055
    VPTESTNMDZrm  = 13039,
13056
    VPTESTNMDZrmb = 13040,
13057
    VPTESTNMDZrmbk  = 13041,
13058
    VPTESTNMDZrmk = 13042,
13059
    VPTESTNMDZrr  = 13043,
13060
    VPTESTNMDZrrk = 13044,
13061
    VPTESTNMQZ128rm = 13045,
13062
    VPTESTNMQZ128rmb  = 13046,
13063
    VPTESTNMQZ128rmbk = 13047,
13064
    VPTESTNMQZ128rmk  = 13048,
13065
    VPTESTNMQZ128rr = 13049,
13066
    VPTESTNMQZ128rrk  = 13050,
13067
    VPTESTNMQZ256rm = 13051,
13068
    VPTESTNMQZ256rmb  = 13052,
13069
    VPTESTNMQZ256rmbk = 13053,
13070
    VPTESTNMQZ256rmk  = 13054,
13071
    VPTESTNMQZ256rr = 13055,
13072
    VPTESTNMQZ256rrk  = 13056,
13073
    VPTESTNMQZrm  = 13057,
13074
    VPTESTNMQZrmb = 13058,
13075
    VPTESTNMQZrmbk  = 13059,
13076
    VPTESTNMQZrmk = 13060,
13077
    VPTESTNMQZrr  = 13061,
13078
    VPTESTNMQZrrk = 13062,
13079
    VPTESTNMWZ128rm = 13063,
13080
    VPTESTNMWZ128rmk  = 13064,
13081
    VPTESTNMWZ128rr = 13065,
13082
    VPTESTNMWZ128rrk  = 13066,
13083
    VPTESTNMWZ256rm = 13067,
13084
    VPTESTNMWZ256rmk  = 13068,
13085
    VPTESTNMWZ256rr = 13069,
13086
    VPTESTNMWZ256rrk  = 13070,
13087
    VPTESTNMWZrm  = 13071,
13088
    VPTESTNMWZrmk = 13072,
13089
    VPTESTNMWZrr  = 13073,
13090
    VPTESTNMWZrrk = 13074,
13091
    VPTESTYrm = 13075,
13092
    VPTESTYrr = 13076,
13093
    VPTESTrm  = 13077,
13094
    VPTESTrr  = 13078,
13095
    VPUNPCKHBWYrm = 13079,
13096
    VPUNPCKHBWYrr = 13080,
13097
    VPUNPCKHBWZ128rm  = 13081,
13098
    VPUNPCKHBWZ128rmk = 13082,
13099
    VPUNPCKHBWZ128rmkz  = 13083,
13100
    VPUNPCKHBWZ128rr  = 13084,
13101
    VPUNPCKHBWZ128rrk = 13085,
13102
    VPUNPCKHBWZ128rrkz  = 13086,
13103
    VPUNPCKHBWZ256rm  = 13087,
13104
    VPUNPCKHBWZ256rmk = 13088,
13105
    VPUNPCKHBWZ256rmkz  = 13089,
13106
    VPUNPCKHBWZ256rr  = 13090,
13107
    VPUNPCKHBWZ256rrk = 13091,
13108
    VPUNPCKHBWZ256rrkz  = 13092,
13109
    VPUNPCKHBWZrm = 13093,
13110
    VPUNPCKHBWZrmk  = 13094,
13111
    VPUNPCKHBWZrmkz = 13095,
13112
    VPUNPCKHBWZrr = 13096,
13113
    VPUNPCKHBWZrrk  = 13097,
13114
    VPUNPCKHBWZrrkz = 13098,
13115
    VPUNPCKHBWrm  = 13099,
13116
    VPUNPCKHBWrr  = 13100,
13117
    VPUNPCKHDQYrm = 13101,
13118
    VPUNPCKHDQYrr = 13102,
13119
    VPUNPCKHDQZ128rm  = 13103,
13120
    VPUNPCKHDQZ128rmb = 13104,
13121
    VPUNPCKHDQZ128rmbk  = 13105,
13122
    VPUNPCKHDQZ128rmbkz = 13106,
13123
    VPUNPCKHDQZ128rmk = 13107,
13124
    VPUNPCKHDQZ128rmkz  = 13108,
13125
    VPUNPCKHDQZ128rr  = 13109,
13126
    VPUNPCKHDQZ128rrk = 13110,
13127
    VPUNPCKHDQZ128rrkz  = 13111,
13128
    VPUNPCKHDQZ256rm  = 13112,
13129
    VPUNPCKHDQZ256rmb = 13113,
13130
    VPUNPCKHDQZ256rmbk  = 13114,
13131
    VPUNPCKHDQZ256rmbkz = 13115,
13132
    VPUNPCKHDQZ256rmk = 13116,
13133
    VPUNPCKHDQZ256rmkz  = 13117,
13134
    VPUNPCKHDQZ256rr  = 13118,
13135
    VPUNPCKHDQZ256rrk = 13119,
13136
    VPUNPCKHDQZ256rrkz  = 13120,
13137
    VPUNPCKHDQZrm = 13121,
13138
    VPUNPCKHDQZrmb  = 13122,
13139
    VPUNPCKHDQZrmbk = 13123,
13140
    VPUNPCKHDQZrmbkz  = 13124,
13141
    VPUNPCKHDQZrmk  = 13125,
13142
    VPUNPCKHDQZrmkz = 13126,
13143
    VPUNPCKHDQZrr = 13127,
13144
    VPUNPCKHDQZrrk  = 13128,
13145
    VPUNPCKHDQZrrkz = 13129,
13146
    VPUNPCKHDQrm  = 13130,
13147
    VPUNPCKHDQrr  = 13131,
13148
    VPUNPCKHQDQYrm  = 13132,
13149
    VPUNPCKHQDQYrr  = 13133,
13150
    VPUNPCKHQDQZ128rm = 13134,
13151
    VPUNPCKHQDQZ128rmb  = 13135,
13152
    VPUNPCKHQDQZ128rmbk = 13136,
13153
    VPUNPCKHQDQZ128rmbkz  = 13137,
13154
    VPUNPCKHQDQZ128rmk  = 13138,
13155
    VPUNPCKHQDQZ128rmkz = 13139,
13156
    VPUNPCKHQDQZ128rr = 13140,
13157
    VPUNPCKHQDQZ128rrk  = 13141,
13158
    VPUNPCKHQDQZ128rrkz = 13142,
13159
    VPUNPCKHQDQZ256rm = 13143,
13160
    VPUNPCKHQDQZ256rmb  = 13144,
13161
    VPUNPCKHQDQZ256rmbk = 13145,
13162
    VPUNPCKHQDQZ256rmbkz  = 13146,
13163
    VPUNPCKHQDQZ256rmk  = 13147,
13164
    VPUNPCKHQDQZ256rmkz = 13148,
13165
    VPUNPCKHQDQZ256rr = 13149,
13166
    VPUNPCKHQDQZ256rrk  = 13150,
13167
    VPUNPCKHQDQZ256rrkz = 13151,
13168
    VPUNPCKHQDQZrm  = 13152,
13169
    VPUNPCKHQDQZrmb = 13153,
13170
    VPUNPCKHQDQZrmbk  = 13154,
13171
    VPUNPCKHQDQZrmbkz = 13155,
13172
    VPUNPCKHQDQZrmk = 13156,
13173
    VPUNPCKHQDQZrmkz  = 13157,
13174
    VPUNPCKHQDQZrr  = 13158,
13175
    VPUNPCKHQDQZrrk = 13159,
13176
    VPUNPCKHQDQZrrkz  = 13160,
13177
    VPUNPCKHQDQrm = 13161,
13178
    VPUNPCKHQDQrr = 13162,
13179
    VPUNPCKHWDYrm = 13163,
13180
    VPUNPCKHWDYrr = 13164,
13181
    VPUNPCKHWDZ128rm  = 13165,
13182
    VPUNPCKHWDZ128rmk = 13166,
13183
    VPUNPCKHWDZ128rmkz  = 13167,
13184
    VPUNPCKHWDZ128rr  = 13168,
13185
    VPUNPCKHWDZ128rrk = 13169,
13186
    VPUNPCKHWDZ128rrkz  = 13170,
13187
    VPUNPCKHWDZ256rm  = 13171,
13188
    VPUNPCKHWDZ256rmk = 13172,
13189
    VPUNPCKHWDZ256rmkz  = 13173,
13190
    VPUNPCKHWDZ256rr  = 13174,
13191
    VPUNPCKHWDZ256rrk = 13175,
13192
    VPUNPCKHWDZ256rrkz  = 13176,
13193
    VPUNPCKHWDZrm = 13177,
13194
    VPUNPCKHWDZrmk  = 13178,
13195
    VPUNPCKHWDZrmkz = 13179,
13196
    VPUNPCKHWDZrr = 13180,
13197
    VPUNPCKHWDZrrk  = 13181,
13198
    VPUNPCKHWDZrrkz = 13182,
13199
    VPUNPCKHWDrm  = 13183,
13200
    VPUNPCKHWDrr  = 13184,
13201
    VPUNPCKLBWYrm = 13185,
13202
    VPUNPCKLBWYrr = 13186,
13203
    VPUNPCKLBWZ128rm  = 13187,
13204
    VPUNPCKLBWZ128rmk = 13188,
13205
    VPUNPCKLBWZ128rmkz  = 13189,
13206
    VPUNPCKLBWZ128rr  = 13190,
13207
    VPUNPCKLBWZ128rrk = 13191,
13208
    VPUNPCKLBWZ128rrkz  = 13192,
13209
    VPUNPCKLBWZ256rm  = 13193,
13210
    VPUNPCKLBWZ256rmk = 13194,
13211
    VPUNPCKLBWZ256rmkz  = 13195,
13212
    VPUNPCKLBWZ256rr  = 13196,
13213
    VPUNPCKLBWZ256rrk = 13197,
13214
    VPUNPCKLBWZ256rrkz  = 13198,
13215
    VPUNPCKLBWZrm = 13199,
13216
    VPUNPCKLBWZrmk  = 13200,
13217
    VPUNPCKLBWZrmkz = 13201,
13218
    VPUNPCKLBWZrr = 13202,
13219
    VPUNPCKLBWZrrk  = 13203,
13220
    VPUNPCKLBWZrrkz = 13204,
13221
    VPUNPCKLBWrm  = 13205,
13222
    VPUNPCKLBWrr  = 13206,
13223
    VPUNPCKLDQYrm = 13207,
13224
    VPUNPCKLDQYrr = 13208,
13225
    VPUNPCKLDQZ128rm  = 13209,
13226
    VPUNPCKLDQZ128rmb = 13210,
13227
    VPUNPCKLDQZ128rmbk  = 13211,
13228
    VPUNPCKLDQZ128rmbkz = 13212,
13229
    VPUNPCKLDQZ128rmk = 13213,
13230
    VPUNPCKLDQZ128rmkz  = 13214,
13231
    VPUNPCKLDQZ128rr  = 13215,
13232
    VPUNPCKLDQZ128rrk = 13216,
13233
    VPUNPCKLDQZ128rrkz  = 13217,
13234
    VPUNPCKLDQZ256rm  = 13218,
13235
    VPUNPCKLDQZ256rmb = 13219,
13236
    VPUNPCKLDQZ256rmbk  = 13220,
13237
    VPUNPCKLDQZ256rmbkz = 13221,
13238
    VPUNPCKLDQZ256rmk = 13222,
13239
    VPUNPCKLDQZ256rmkz  = 13223,
13240
    VPUNPCKLDQZ256rr  = 13224,
13241
    VPUNPCKLDQZ256rrk = 13225,
13242
    VPUNPCKLDQZ256rrkz  = 13226,
13243
    VPUNPCKLDQZrm = 13227,
13244
    VPUNPCKLDQZrmb  = 13228,
13245
    VPUNPCKLDQZrmbk = 13229,
13246
    VPUNPCKLDQZrmbkz  = 13230,
13247
    VPUNPCKLDQZrmk  = 13231,
13248
    VPUNPCKLDQZrmkz = 13232,
13249
    VPUNPCKLDQZrr = 13233,
13250
    VPUNPCKLDQZrrk  = 13234,
13251
    VPUNPCKLDQZrrkz = 13235,
13252
    VPUNPCKLDQrm  = 13236,
13253
    VPUNPCKLDQrr  = 13237,
13254
    VPUNPCKLQDQYrm  = 13238,
13255
    VPUNPCKLQDQYrr  = 13239,
13256
    VPUNPCKLQDQZ128rm = 13240,
13257
    VPUNPCKLQDQZ128rmb  = 13241,
13258
    VPUNPCKLQDQZ128rmbk = 13242,
13259
    VPUNPCKLQDQZ128rmbkz  = 13243,
13260
    VPUNPCKLQDQZ128rmk  = 13244,
13261
    VPUNPCKLQDQZ128rmkz = 13245,
13262
    VPUNPCKLQDQZ128rr = 13246,
13263
    VPUNPCKLQDQZ128rrk  = 13247,
13264
    VPUNPCKLQDQZ128rrkz = 13248,
13265
    VPUNPCKLQDQZ256rm = 13249,
13266
    VPUNPCKLQDQZ256rmb  = 13250,
13267
    VPUNPCKLQDQZ256rmbk = 13251,
13268
    VPUNPCKLQDQZ256rmbkz  = 13252,
13269
    VPUNPCKLQDQZ256rmk  = 13253,
13270
    VPUNPCKLQDQZ256rmkz = 13254,
13271
    VPUNPCKLQDQZ256rr = 13255,
13272
    VPUNPCKLQDQZ256rrk  = 13256,
13273
    VPUNPCKLQDQZ256rrkz = 13257,
13274
    VPUNPCKLQDQZrm  = 13258,
13275
    VPUNPCKLQDQZrmb = 13259,
13276
    VPUNPCKLQDQZrmbk  = 13260,
13277
    VPUNPCKLQDQZrmbkz = 13261,
13278
    VPUNPCKLQDQZrmk = 13262,
13279
    VPUNPCKLQDQZrmkz  = 13263,
13280
    VPUNPCKLQDQZrr  = 13264,
13281
    VPUNPCKLQDQZrrk = 13265,
13282
    VPUNPCKLQDQZrrkz  = 13266,
13283
    VPUNPCKLQDQrm = 13267,
13284
    VPUNPCKLQDQrr = 13268,
13285
    VPUNPCKLWDYrm = 13269,
13286
    VPUNPCKLWDYrr = 13270,
13287
    VPUNPCKLWDZ128rm  = 13271,
13288
    VPUNPCKLWDZ128rmk = 13272,
13289
    VPUNPCKLWDZ128rmkz  = 13273,
13290
    VPUNPCKLWDZ128rr  = 13274,
13291
    VPUNPCKLWDZ128rrk = 13275,
13292
    VPUNPCKLWDZ128rrkz  = 13276,
13293
    VPUNPCKLWDZ256rm  = 13277,
13294
    VPUNPCKLWDZ256rmk = 13278,
13295
    VPUNPCKLWDZ256rmkz  = 13279,
13296
    VPUNPCKLWDZ256rr  = 13280,
13297
    VPUNPCKLWDZ256rrk = 13281,
13298
    VPUNPCKLWDZ256rrkz  = 13282,
13299
    VPUNPCKLWDZrm = 13283,
13300
    VPUNPCKLWDZrmk  = 13284,
13301
    VPUNPCKLWDZrmkz = 13285,
13302
    VPUNPCKLWDZrr = 13286,
13303
    VPUNPCKLWDZrrk  = 13287,
13304
    VPUNPCKLWDZrrkz = 13288,
13305
    VPUNPCKLWDrm  = 13289,
13306
    VPUNPCKLWDrr  = 13290,
13307
    VPXORDZ128rm  = 13291,
13308
    VPXORDZ128rmb = 13292,
13309
    VPXORDZ128rmbk  = 13293,
13310
    VPXORDZ128rmbkz = 13294,
13311
    VPXORDZ128rmk = 13295,
13312
    VPXORDZ128rmkz  = 13296,
13313
    VPXORDZ128rr  = 13297,
13314
    VPXORDZ128rrk = 13298,
13315
    VPXORDZ128rrkz  = 13299,
13316
    VPXORDZ256rm  = 13300,
13317
    VPXORDZ256rmb = 13301,
13318
    VPXORDZ256rmbk  = 13302,
13319
    VPXORDZ256rmbkz = 13303,
13320
    VPXORDZ256rmk = 13304,
13321
    VPXORDZ256rmkz  = 13305,
13322
    VPXORDZ256rr  = 13306,
13323
    VPXORDZ256rrk = 13307,
13324
    VPXORDZ256rrkz  = 13308,
13325
    VPXORDZrm = 13309,
13326
    VPXORDZrmb  = 13310,
13327
    VPXORDZrmbk = 13311,
13328
    VPXORDZrmbkz  = 13312,
13329
    VPXORDZrmk  = 13313,
13330
    VPXORDZrmkz = 13314,
13331
    VPXORDZrr = 13315,
13332
    VPXORDZrrk  = 13316,
13333
    VPXORDZrrkz = 13317,
13334
    VPXORQZ128rm  = 13318,
13335
    VPXORQZ128rmb = 13319,
13336
    VPXORQZ128rmbk  = 13320,
13337
    VPXORQZ128rmbkz = 13321,
13338
    VPXORQZ128rmk = 13322,
13339
    VPXORQZ128rmkz  = 13323,
13340
    VPXORQZ128rr  = 13324,
13341
    VPXORQZ128rrk = 13325,
13342
    VPXORQZ128rrkz  = 13326,
13343
    VPXORQZ256rm  = 13327,
13344
    VPXORQZ256rmb = 13328,
13345
    VPXORQZ256rmbk  = 13329,
13346
    VPXORQZ256rmbkz = 13330,
13347
    VPXORQZ256rmk = 13331,
13348
    VPXORQZ256rmkz  = 13332,
13349
    VPXORQZ256rr  = 13333,
13350
    VPXORQZ256rrk = 13334,
13351
    VPXORQZ256rrkz  = 13335,
13352
    VPXORQZrm = 13336,
13353
    VPXORQZrmb  = 13337,
13354
    VPXORQZrmbk = 13338,
13355
    VPXORQZrmbkz  = 13339,
13356
    VPXORQZrmk  = 13340,
13357
    VPXORQZrmkz = 13341,
13358
    VPXORQZrr = 13342,
13359
    VPXORQZrrk  = 13343,
13360
    VPXORQZrrkz = 13344,
13361
    VPXORYrm  = 13345,
13362
    VPXORYrr  = 13346,
13363
    VPXORrm = 13347,
13364
    VPXORrr = 13348,
13365
    VRANGEPDZ128rmbi  = 13349,
13366
    VRANGEPDZ128rmbik = 13350,
13367
    VRANGEPDZ128rmbikz  = 13351,
13368
    VRANGEPDZ128rmi = 13352,
13369
    VRANGEPDZ128rmik  = 13353,
13370
    VRANGEPDZ128rmikz = 13354,
13371
    VRANGEPDZ128rri = 13355,
13372
    VRANGEPDZ128rrik  = 13356,
13373
    VRANGEPDZ128rrikz = 13357,
13374
    VRANGEPDZ256rmbi  = 13358,
13375
    VRANGEPDZ256rmbik = 13359,
13376
    VRANGEPDZ256rmbikz  = 13360,
13377
    VRANGEPDZ256rmi = 13361,
13378
    VRANGEPDZ256rmik  = 13362,
13379
    VRANGEPDZ256rmikz = 13363,
13380
    VRANGEPDZ256rri = 13364,
13381
    VRANGEPDZ256rrik  = 13365,
13382
    VRANGEPDZ256rrikz = 13366,
13383
    VRANGEPDZrmbi = 13367,
13384
    VRANGEPDZrmbik  = 13368,
13385
    VRANGEPDZrmbikz = 13369,
13386
    VRANGEPDZrmi  = 13370,
13387
    VRANGEPDZrmik = 13371,
13388
    VRANGEPDZrmikz  = 13372,
13389
    VRANGEPDZrri  = 13373,
13390
    VRANGEPDZrrib = 13374,
13391
    VRANGEPDZrribk  = 13375,
13392
    VRANGEPDZrribkz = 13376,
13393
    VRANGEPDZrrik = 13377,
13394
    VRANGEPDZrrikz  = 13378,
13395
    VRANGEPSZ128rmbi  = 13379,
13396
    VRANGEPSZ128rmbik = 13380,
13397
    VRANGEPSZ128rmbikz  = 13381,
13398
    VRANGEPSZ128rmi = 13382,
13399
    VRANGEPSZ128rmik  = 13383,
13400
    VRANGEPSZ128rmikz = 13384,
13401
    VRANGEPSZ128rri = 13385,
13402
    VRANGEPSZ128rrik  = 13386,
13403
    VRANGEPSZ128rrikz = 13387,
13404
    VRANGEPSZ256rmbi  = 13388,
13405
    VRANGEPSZ256rmbik = 13389,
13406
    VRANGEPSZ256rmbikz  = 13390,
13407
    VRANGEPSZ256rmi = 13391,
13408
    VRANGEPSZ256rmik  = 13392,
13409
    VRANGEPSZ256rmikz = 13393,
13410
    VRANGEPSZ256rri = 13394,
13411
    VRANGEPSZ256rrik  = 13395,
13412
    VRANGEPSZ256rrikz = 13396,
13413
    VRANGEPSZrmbi = 13397,
13414
    VRANGEPSZrmbik  = 13398,
13415
    VRANGEPSZrmbikz = 13399,
13416
    VRANGEPSZrmi  = 13400,
13417
    VRANGEPSZrmik = 13401,
13418
    VRANGEPSZrmikz  = 13402,
13419
    VRANGEPSZrri  = 13403,
13420
    VRANGEPSZrrib = 13404,
13421
    VRANGEPSZrribk  = 13405,
13422
    VRANGEPSZrribkz = 13406,
13423
    VRANGEPSZrrik = 13407,
13424
    VRANGEPSZrrikz  = 13408,
13425
    VRANGESDZ128rmi = 13409,
13426
    VRANGESDZ128rmi_alt = 13410,
13427
    VRANGESDZ128rmi_altk  = 13411,
13428
    VRANGESDZ128rmi_altkz = 13412,
13429
    VRANGESDZ128rmik  = 13413,
13430
    VRANGESDZ128rmikz = 13414,
13431
    VRANGESDZ128rri = 13415,
13432
    VRANGESDZ128rrib  = 13416,
13433
    VRANGESDZ128rribk = 13417,
13434
    VRANGESDZ128rribkz  = 13418,
13435
    VRANGESDZ128rrik  = 13419,
13436
    VRANGESDZ128rrikz = 13420,
13437
    VRANGESSZ128rmi = 13421,
13438
    VRANGESSZ128rmi_alt = 13422,
13439
    VRANGESSZ128rmi_altk  = 13423,
13440
    VRANGESSZ128rmi_altkz = 13424,
13441
    VRANGESSZ128rmik  = 13425,
13442
    VRANGESSZ128rmikz = 13426,
13443
    VRANGESSZ128rri = 13427,
13444
    VRANGESSZ128rrib  = 13428,
13445
    VRANGESSZ128rribk = 13429,
13446
    VRANGESSZ128rribkz  = 13430,
13447
    VRANGESSZ128rrik  = 13431,
13448
    VRANGESSZ128rrikz = 13432,
13449
    VRCP14PDZ128m = 13433,
13450
    VRCP14PDZ128mb  = 13434,
13451
    VRCP14PDZ128mbk = 13435,
13452
    VRCP14PDZ128mbkz  = 13436,
13453
    VRCP14PDZ128mk  = 13437,
13454
    VRCP14PDZ128mkz = 13438,
13455
    VRCP14PDZ128r = 13439,
13456
    VRCP14PDZ128rk  = 13440,
13457
    VRCP14PDZ128rkz = 13441,
13458
    VRCP14PDZ256m = 13442,
13459
    VRCP14PDZ256mb  = 13443,
13460
    VRCP14PDZ256mbk = 13444,
13461
    VRCP14PDZ256mbkz  = 13445,
13462
    VRCP14PDZ256mk  = 13446,
13463
    VRCP14PDZ256mkz = 13447,
13464
    VRCP14PDZ256r = 13448,
13465
    VRCP14PDZ256rk  = 13449,
13466
    VRCP14PDZ256rkz = 13450,
13467
    VRCP14PDZm  = 13451,
13468
    VRCP14PDZmb = 13452,
13469
    VRCP14PDZmbk  = 13453,
13470
    VRCP14PDZmbkz = 13454,
13471
    VRCP14PDZmk = 13455,
13472
    VRCP14PDZmkz  = 13456,
13473
    VRCP14PDZr  = 13457,
13474
    VRCP14PDZrk = 13458,
13475
    VRCP14PDZrkz  = 13459,
13476
    VRCP14PSZ128m = 13460,
13477
    VRCP14PSZ128mb  = 13461,
13478
    VRCP14PSZ128mbk = 13462,
13479
    VRCP14PSZ128mbkz  = 13463,
13480
    VRCP14PSZ128mk  = 13464,
13481
    VRCP14PSZ128mkz = 13465,
13482
    VRCP14PSZ128r = 13466,
13483
    VRCP14PSZ128rk  = 13467,
13484
    VRCP14PSZ128rkz = 13468,
13485
    VRCP14PSZ256m = 13469,
13486
    VRCP14PSZ256mb  = 13470,
13487
    VRCP14PSZ256mbk = 13471,
13488
    VRCP14PSZ256mbkz  = 13472,
13489
    VRCP14PSZ256mk  = 13473,
13490
    VRCP14PSZ256mkz = 13474,
13491
    VRCP14PSZ256r = 13475,
13492
    VRCP14PSZ256rk  = 13476,
13493
    VRCP14PSZ256rkz = 13477,
13494
    VRCP14PSZm  = 13478,
13495
    VRCP14PSZmb = 13479,
13496
    VRCP14PSZmbk  = 13480,
13497
    VRCP14PSZmbkz = 13481,
13498
    VRCP14PSZmk = 13482,
13499
    VRCP14PSZmkz  = 13483,
13500
    VRCP14PSZr  = 13484,
13501
    VRCP14PSZrk = 13485,
13502
    VRCP14PSZrkz  = 13486,
13503
    VRCP14SDrm  = 13487,
13504
    VRCP14SDrmk = 13488,
13505
    VRCP14SDrmkz  = 13489,
13506
    VRCP14SDrr  = 13490,
13507
    VRCP14SDrrk = 13491,
13508
    VRCP14SDrrkz  = 13492,
13509
    VRCP14SSrm  = 13493,
13510
    VRCP14SSrmk = 13494,
13511
    VRCP14SSrmkz  = 13495,
13512
    VRCP14SSrr  = 13496,
13513
    VRCP14SSrrk = 13497,
13514
    VRCP14SSrrkz  = 13498,
13515
    VRCP28PDm = 13499,
13516
    VRCP28PDmb  = 13500,
13517
    VRCP28PDmbk = 13501,
13518
    VRCP28PDmbkz  = 13502,
13519
    VRCP28PDmk  = 13503,
13520
    VRCP28PDmkz = 13504,
13521
    VRCP28PDr = 13505,
13522
    VRCP28PDrb  = 13506,
13523
    VRCP28PDrbk = 13507,
13524
    VRCP28PDrbkz  = 13508,
13525
    VRCP28PDrk  = 13509,
13526
    VRCP28PDrkz = 13510,
13527
    VRCP28PSm = 13511,
13528
    VRCP28PSmb  = 13512,
13529
    VRCP28PSmbk = 13513,
13530
    VRCP28PSmbkz  = 13514,
13531
    VRCP28PSmk  = 13515,
13532
    VRCP28PSmkz = 13516,
13533
    VRCP28PSr = 13517,
13534
    VRCP28PSrb  = 13518,
13535
    VRCP28PSrbk = 13519,
13536
    VRCP28PSrbkz  = 13520,
13537
    VRCP28PSrk  = 13521,
13538
    VRCP28PSrkz = 13522,
13539
    VRCP28SDm = 13523,
13540
    VRCP28SDmk  = 13524,
13541
    VRCP28SDmkz = 13525,
13542
    VRCP28SDr = 13526,
13543
    VRCP28SDrb  = 13527,
13544
    VRCP28SDrbk = 13528,
13545
    VRCP28SDrbkz  = 13529,
13546
    VRCP28SDrk  = 13530,
13547
    VRCP28SDrkz = 13531,
13548
    VRCP28SSm = 13532,
13549
    VRCP28SSmk  = 13533,
13550
    VRCP28SSmkz = 13534,
13551
    VRCP28SSr = 13535,
13552
    VRCP28SSrb  = 13536,
13553
    VRCP28SSrbk = 13537,
13554
    VRCP28SSrbkz  = 13538,
13555
    VRCP28SSrk  = 13539,
13556
    VRCP28SSrkz = 13540,
13557
    VRCPPSYm  = 13541,
13558
    VRCPPSYr  = 13542,
13559
    VRCPPSm = 13543,
13560
    VRCPPSr = 13544,
13561
    VRCPSSm = 13545,
13562
    VRCPSSm_Int = 13546,
13563
    VRCPSSr = 13547,
13564
    VRCPSSr_Int = 13548,
13565
    VREDUCEPDZ128rmbi = 13549,
13566
    VREDUCEPDZ128rmbik  = 13550,
13567
    VREDUCEPDZ128rmbikz = 13551,
13568
    VREDUCEPDZ128rmi  = 13552,
13569
    VREDUCEPDZ128rmik = 13553,
13570
    VREDUCEPDZ128rmikz  = 13554,
13571
    VREDUCEPDZ128rri  = 13555,
13572
    VREDUCEPDZ128rrik = 13556,
13573
    VREDUCEPDZ128rrikz  = 13557,
13574
    VREDUCEPDZ256rmbi = 13558,
13575
    VREDUCEPDZ256rmbik  = 13559,
13576
    VREDUCEPDZ256rmbikz = 13560,
13577
    VREDUCEPDZ256rmi  = 13561,
13578
    VREDUCEPDZ256rmik = 13562,
13579
    VREDUCEPDZ256rmikz  = 13563,
13580
    VREDUCEPDZ256rri  = 13564,
13581
    VREDUCEPDZ256rrik = 13565,
13582
    VREDUCEPDZ256rrikz  = 13566,
13583
    VREDUCEPDZrmbi  = 13567,
13584
    VREDUCEPDZrmbik = 13568,
13585
    VREDUCEPDZrmbikz  = 13569,
13586
    VREDUCEPDZrmi = 13570,
13587
    VREDUCEPDZrmik  = 13571,
13588
    VREDUCEPDZrmikz = 13572,
13589
    VREDUCEPDZrri = 13573,
13590
    VREDUCEPDZrrib  = 13574,
13591
    VREDUCEPDZrribk = 13575,
13592
    VREDUCEPDZrribkz  = 13576,
13593
    VREDUCEPDZrrik  = 13577,
13594
    VREDUCEPDZrrikz = 13578,
13595
    VREDUCEPSZ128rmbi = 13579,
13596
    VREDUCEPSZ128rmbik  = 13580,
13597
    VREDUCEPSZ128rmbikz = 13581,
13598
    VREDUCEPSZ128rmi  = 13582,
13599
    VREDUCEPSZ128rmik = 13583,
13600
    VREDUCEPSZ128rmikz  = 13584,
13601
    VREDUCEPSZ128rri  = 13585,
13602
    VREDUCEPSZ128rrik = 13586,
13603
    VREDUCEPSZ128rrikz  = 13587,
13604
    VREDUCEPSZ256rmbi = 13588,
13605
    VREDUCEPSZ256rmbik  = 13589,
13606
    VREDUCEPSZ256rmbikz = 13590,
13607
    VREDUCEPSZ256rmi  = 13591,
13608
    VREDUCEPSZ256rmik = 13592,
13609
    VREDUCEPSZ256rmikz  = 13593,
13610
    VREDUCEPSZ256rri  = 13594,
13611
    VREDUCEPSZ256rrik = 13595,
13612
    VREDUCEPSZ256rrikz  = 13596,
13613
    VREDUCEPSZrmbi  = 13597,
13614
    VREDUCEPSZrmbik = 13598,
13615
    VREDUCEPSZrmbikz  = 13599,
13616
    VREDUCEPSZrmi = 13600,
13617
    VREDUCEPSZrmik  = 13601,
13618
    VREDUCEPSZrmikz = 13602,
13619
    VREDUCEPSZrri = 13603,
13620
    VREDUCEPSZrrib  = 13604,
13621
    VREDUCEPSZrribk = 13605,
13622
    VREDUCEPSZrribkz  = 13606,
13623
    VREDUCEPSZrrik  = 13607,
13624
    VREDUCEPSZrrikz = 13608,
13625
    VREDUCESDZ128rmi  = 13609,
13626
    VREDUCESDZ128rmi_alt  = 13610,
13627
    VREDUCESDZ128rmi_altk = 13611,
13628
    VREDUCESDZ128rmi_altkz  = 13612,
13629
    VREDUCESDZ128rmik = 13613,
13630
    VREDUCESDZ128rmikz  = 13614,
13631
    VREDUCESDZ128rri  = 13615,
13632
    VREDUCESDZ128rrib = 13616,
13633
    VREDUCESDZ128rribk  = 13617,
13634
    VREDUCESDZ128rribkz = 13618,
13635
    VREDUCESDZ128rrik = 13619,
13636
    VREDUCESDZ128rrikz  = 13620,
13637
    VREDUCESSZ128rmi  = 13621,
13638
    VREDUCESSZ128rmi_alt  = 13622,
13639
    VREDUCESSZ128rmi_altk = 13623,
13640
    VREDUCESSZ128rmi_altkz  = 13624,
13641
    VREDUCESSZ128rmik = 13625,
13642
    VREDUCESSZ128rmikz  = 13626,
13643
    VREDUCESSZ128rri  = 13627,
13644
    VREDUCESSZ128rrib = 13628,
13645
    VREDUCESSZ128rribk  = 13629,
13646
    VREDUCESSZ128rribkz = 13630,
13647
    VREDUCESSZ128rrik = 13631,
13648
    VREDUCESSZ128rrikz  = 13632,
13649
    VRNDSCALEPDZ128rmbi = 13633,
13650
    VRNDSCALEPDZ128rmbik  = 13634,
13651
    VRNDSCALEPDZ128rmbikz = 13635,
13652
    VRNDSCALEPDZ128rmi  = 13636,
13653
    VRNDSCALEPDZ128rmik = 13637,
13654
    VRNDSCALEPDZ128rmikz  = 13638,
13655
    VRNDSCALEPDZ128rri  = 13639,
13656
    VRNDSCALEPDZ128rrik = 13640,
13657
    VRNDSCALEPDZ128rrikz  = 13641,
13658
    VRNDSCALEPDZ256rmbi = 13642,
13659
    VRNDSCALEPDZ256rmbik  = 13643,
13660
    VRNDSCALEPDZ256rmbikz = 13644,
13661
    VRNDSCALEPDZ256rmi  = 13645,
13662
    VRNDSCALEPDZ256rmik = 13646,
13663
    VRNDSCALEPDZ256rmikz  = 13647,
13664
    VRNDSCALEPDZ256rri  = 13648,
13665
    VRNDSCALEPDZ256rrik = 13649,
13666
    VRNDSCALEPDZ256rrikz  = 13650,
13667
    VRNDSCALEPDZrmbi  = 13651,
13668
    VRNDSCALEPDZrmbik = 13652,
13669
    VRNDSCALEPDZrmbikz  = 13653,
13670
    VRNDSCALEPDZrmi = 13654,
13671
    VRNDSCALEPDZrmik  = 13655,
13672
    VRNDSCALEPDZrmikz = 13656,
13673
    VRNDSCALEPDZrri = 13657,
13674
    VRNDSCALEPDZrrib  = 13658,
13675
    VRNDSCALEPDZrribk = 13659,
13676
    VRNDSCALEPDZrribkz  = 13660,
13677
    VRNDSCALEPDZrrik  = 13661,
13678
    VRNDSCALEPDZrrikz = 13662,
13679
    VRNDSCALEPSZ128rmbi = 13663,
13680
    VRNDSCALEPSZ128rmbik  = 13664,
13681
    VRNDSCALEPSZ128rmbikz = 13665,
13682
    VRNDSCALEPSZ128rmi  = 13666,
13683
    VRNDSCALEPSZ128rmik = 13667,
13684
    VRNDSCALEPSZ128rmikz  = 13668,
13685
    VRNDSCALEPSZ128rri  = 13669,
13686
    VRNDSCALEPSZ128rrik = 13670,
13687
    VRNDSCALEPSZ128rrikz  = 13671,
13688
    VRNDSCALEPSZ256rmbi = 13672,
13689
    VRNDSCALEPSZ256rmbik  = 13673,
13690
    VRNDSCALEPSZ256rmbikz = 13674,
13691
    VRNDSCALEPSZ256rmi  = 13675,
13692
    VRNDSCALEPSZ256rmik = 13676,
13693
    VRNDSCALEPSZ256rmikz  = 13677,
13694
    VRNDSCALEPSZ256rri  = 13678,
13695
    VRNDSCALEPSZ256rrik = 13679,
13696
    VRNDSCALEPSZ256rrikz  = 13680,
13697
    VRNDSCALEPSZrmbi  = 13681,
13698
    VRNDSCALEPSZrmbik = 13682,
13699
    VRNDSCALEPSZrmbikz  = 13683,
13700
    VRNDSCALEPSZrmi = 13684,
13701
    VRNDSCALEPSZrmik  = 13685,
13702
    VRNDSCALEPSZrmikz = 13686,
13703
    VRNDSCALEPSZrri = 13687,
13704
    VRNDSCALEPSZrrib  = 13688,
13705
    VRNDSCALEPSZrribk = 13689,
13706
    VRNDSCALEPSZrribkz  = 13690,
13707
    VRNDSCALEPSZrrik  = 13691,
13708
    VRNDSCALEPSZrrikz = 13692,
13709
    VRNDSCALESDm  = 13693,
13710
    VRNDSCALESDmk = 13694,
13711
    VRNDSCALESDmkz  = 13695,
13712
    VRNDSCALESDr  = 13696,
13713
    VRNDSCALESDrb = 13697,
13714
    VRNDSCALESDrbk  = 13698,
13715
    VRNDSCALESDrbkz = 13699,
13716
    VRNDSCALESDrk = 13700,
13717
    VRNDSCALESDrkz  = 13701,
13718
    VRNDSCALESSm  = 13702,
13719
    VRNDSCALESSmk = 13703,
13720
    VRNDSCALESSmkz  = 13704,
13721
    VRNDSCALESSr  = 13705,
13722
    VRNDSCALESSrb = 13706,
13723
    VRNDSCALESSrbk  = 13707,
13724
    VRNDSCALESSrbkz = 13708,
13725
    VRNDSCALESSrk = 13709,
13726
    VRNDSCALESSrkz  = 13710,
13727
    VROUNDPDm = 13711,
13728
    VROUNDPDr = 13712,
13729
    VROUNDPSm = 13713,
13730
    VROUNDPSr = 13714,
13731
    VROUNDSDm = 13715,
13732
    VROUNDSDr = 13716,
13733
    VROUNDSDr_Int = 13717,
13734
    VROUNDSSm = 13718,
13735
    VROUNDSSr = 13719,
13736
    VROUNDSSr_Int = 13720,
13737
    VROUNDYPDm  = 13721,
13738
    VROUNDYPDr  = 13722,
13739
    VROUNDYPSm  = 13723,
13740
    VROUNDYPSr  = 13724,
13741
    VRSQRT14PDZ128m = 13725,
13742
    VRSQRT14PDZ128mb  = 13726,
13743
    VRSQRT14PDZ128mbk = 13727,
13744
    VRSQRT14PDZ128mbkz  = 13728,
13745
    VRSQRT14PDZ128mk  = 13729,
13746
    VRSQRT14PDZ128mkz = 13730,
13747
    VRSQRT14PDZ128r = 13731,
13748
    VRSQRT14PDZ128rk  = 13732,
13749
    VRSQRT14PDZ128rkz = 13733,
13750
    VRSQRT14PDZ256m = 13734,
13751
    VRSQRT14PDZ256mb  = 13735,
13752
    VRSQRT14PDZ256mbk = 13736,
13753
    VRSQRT14PDZ256mbkz  = 13737,
13754
    VRSQRT14PDZ256mk  = 13738,
13755
    VRSQRT14PDZ256mkz = 13739,
13756
    VRSQRT14PDZ256r = 13740,
13757
    VRSQRT14PDZ256rk  = 13741,
13758
    VRSQRT14PDZ256rkz = 13742,
13759
    VRSQRT14PDZm  = 13743,
13760
    VRSQRT14PDZmb = 13744,
13761
    VRSQRT14PDZmbk  = 13745,
13762
    VRSQRT14PDZmbkz = 13746,
13763
    VRSQRT14PDZmk = 13747,
13764
    VRSQRT14PDZmkz  = 13748,
13765
    VRSQRT14PDZr  = 13749,
13766
    VRSQRT14PDZrk = 13750,
13767
    VRSQRT14PDZrkz  = 13751,
13768
    VRSQRT14PSZ128m = 13752,
13769
    VRSQRT14PSZ128mb  = 13753,
13770
    VRSQRT14PSZ128mbk = 13754,
13771
    VRSQRT14PSZ128mbkz  = 13755,
13772
    VRSQRT14PSZ128mk  = 13756,
13773
    VRSQRT14PSZ128mkz = 13757,
13774
    VRSQRT14PSZ128r = 13758,
13775
    VRSQRT14PSZ128rk  = 13759,
13776
    VRSQRT14PSZ128rkz = 13760,
13777
    VRSQRT14PSZ256m = 13761,
13778
    VRSQRT14PSZ256mb  = 13762,
13779
    VRSQRT14PSZ256mbk = 13763,
13780
    VRSQRT14PSZ256mbkz  = 13764,
13781
    VRSQRT14PSZ256mk  = 13765,
13782
    VRSQRT14PSZ256mkz = 13766,
13783
    VRSQRT14PSZ256r = 13767,
13784
    VRSQRT14PSZ256rk  = 13768,
13785
    VRSQRT14PSZ256rkz = 13769,
13786
    VRSQRT14PSZm  = 13770,
13787
    VRSQRT14PSZmb = 13771,
13788
    VRSQRT14PSZmbk  = 13772,
13789
    VRSQRT14PSZmbkz = 13773,
13790
    VRSQRT14PSZmk = 13774,
13791
    VRSQRT14PSZmkz  = 13775,
13792
    VRSQRT14PSZr  = 13776,
13793
    VRSQRT14PSZrk = 13777,
13794
    VRSQRT14PSZrkz  = 13778,
13795
    VRSQRT14SDrm  = 13779,
13796
    VRSQRT14SDrmk = 13780,
13797
    VRSQRT14SDrmkz  = 13781,
13798
    VRSQRT14SDrr  = 13782,
13799
    VRSQRT14SDrrk = 13783,
13800
    VRSQRT14SDrrkz  = 13784,
13801
    VRSQRT14SSrm  = 13785,
13802
    VRSQRT14SSrmk = 13786,
13803
    VRSQRT14SSrmkz  = 13787,
13804
    VRSQRT14SSrr  = 13788,
13805
    VRSQRT14SSrrk = 13789,
13806
    VRSQRT14SSrrkz  = 13790,
13807
    VRSQRT28PDm = 13791,
13808
    VRSQRT28PDmb  = 13792,
13809
    VRSQRT28PDmbk = 13793,
13810
    VRSQRT28PDmbkz  = 13794,
13811
    VRSQRT28PDmk  = 13795,
13812
    VRSQRT28PDmkz = 13796,
13813
    VRSQRT28PDr = 13797,
13814
    VRSQRT28PDrb  = 13798,
13815
    VRSQRT28PDrbk = 13799,
13816
    VRSQRT28PDrbkz  = 13800,
13817
    VRSQRT28PDrk  = 13801,
13818
    VRSQRT28PDrkz = 13802,
13819
    VRSQRT28PSm = 13803,
13820
    VRSQRT28PSmb  = 13804,
13821
    VRSQRT28PSmbk = 13805,
13822
    VRSQRT28PSmbkz  = 13806,
13823
    VRSQRT28PSmk  = 13807,
13824
    VRSQRT28PSmkz = 13808,
13825
    VRSQRT28PSr = 13809,
13826
    VRSQRT28PSrb  = 13810,
13827
    VRSQRT28PSrbk = 13811,
13828
    VRSQRT28PSrbkz  = 13812,
13829
    VRSQRT28PSrk  = 13813,
13830
    VRSQRT28PSrkz = 13814,
13831
    VRSQRT28SDm = 13815,
13832
    VRSQRT28SDmk  = 13816,
13833
    VRSQRT28SDmkz = 13817,
13834
    VRSQRT28SDr = 13818,
13835
    VRSQRT28SDrb  = 13819,
13836
    VRSQRT28SDrbk = 13820,
13837
    VRSQRT28SDrbkz  = 13821,
13838
    VRSQRT28SDrk  = 13822,
13839
    VRSQRT28SDrkz = 13823,
13840
    VRSQRT28SSm = 13824,
13841
    VRSQRT28SSmk  = 13825,
13842
    VRSQRT28SSmkz = 13826,
13843
    VRSQRT28SSr = 13827,
13844
    VRSQRT28SSrb  = 13828,
13845
    VRSQRT28SSrbk = 13829,
13846
    VRSQRT28SSrbkz  = 13830,
13847
    VRSQRT28SSrk  = 13831,
13848
    VRSQRT28SSrkz = 13832,
13849
    VRSQRTPSYm  = 13833,
13850
    VRSQRTPSYr  = 13834,
13851
    VRSQRTPSm = 13835,
13852
    VRSQRTPSr = 13836,
13853
    VRSQRTSSm = 13837,
13854
    VRSQRTSSm_Int = 13838,
13855
    VRSQRTSSr = 13839,
13856
    VRSQRTSSr_Int = 13840,
13857
    VSCALEFPDZ128rm = 13841,
13858
    VSCALEFPDZ128rmb  = 13842,
13859
    VSCALEFPDZ128rmbk = 13843,
13860
    VSCALEFPDZ128rmbkz  = 13844,
13861
    VSCALEFPDZ128rmk  = 13845,
13862
    VSCALEFPDZ128rmkz = 13846,
13863
    VSCALEFPDZ128rr = 13847,
13864
    VSCALEFPDZ128rrk  = 13848,
13865
    VSCALEFPDZ128rrkz = 13849,
13866
    VSCALEFPDZ256rm = 13850,
13867
    VSCALEFPDZ256rmb  = 13851,
13868
    VSCALEFPDZ256rmbk = 13852,
13869
    VSCALEFPDZ256rmbkz  = 13853,
13870
    VSCALEFPDZ256rmk  = 13854,
13871
    VSCALEFPDZ256rmkz = 13855,
13872
    VSCALEFPDZ256rr = 13856,
13873
    VSCALEFPDZ256rrk  = 13857,
13874
    VSCALEFPDZ256rrkz = 13858,
13875
    VSCALEFPDZrb  = 13859,
13876
    VSCALEFPDZrbk = 13860,
13877
    VSCALEFPDZrbkz  = 13861,
13878
    VSCALEFPDZrm  = 13862,
13879
    VSCALEFPDZrmb = 13863,
13880
    VSCALEFPDZrmbk  = 13864,
13881
    VSCALEFPDZrmbkz = 13865,
13882
    VSCALEFPDZrmk = 13866,
13883
    VSCALEFPDZrmkz  = 13867,
13884
    VSCALEFPDZrr  = 13868,
13885
    VSCALEFPDZrrk = 13869,
13886
    VSCALEFPDZrrkz  = 13870,
13887
    VSCALEFPSZ128rm = 13871,
13888
    VSCALEFPSZ128rmb  = 13872,
13889
    VSCALEFPSZ128rmbk = 13873,
13890
    VSCALEFPSZ128rmbkz  = 13874,
13891
    VSCALEFPSZ128rmk  = 13875,
13892
    VSCALEFPSZ128rmkz = 13876,
13893
    VSCALEFPSZ128rr = 13877,
13894
    VSCALEFPSZ128rrk  = 13878,
13895
    VSCALEFPSZ128rrkz = 13879,
13896
    VSCALEFPSZ256rm = 13880,
13897
    VSCALEFPSZ256rmb  = 13881,
13898
    VSCALEFPSZ256rmbk = 13882,
13899
    VSCALEFPSZ256rmbkz  = 13883,
13900
    VSCALEFPSZ256rmk  = 13884,
13901
    VSCALEFPSZ256rmkz = 13885,
13902
    VSCALEFPSZ256rr = 13886,
13903
    VSCALEFPSZ256rrk  = 13887,
13904
    VSCALEFPSZ256rrkz = 13888,
13905
    VSCALEFPSZrb  = 13889,
13906
    VSCALEFPSZrbk = 13890,
13907
    VSCALEFPSZrbkz  = 13891,
13908
    VSCALEFPSZrm  = 13892,
13909
    VSCALEFPSZrmb = 13893,
13910
    VSCALEFPSZrmbk  = 13894,
13911
    VSCALEFPSZrmbkz = 13895,
13912
    VSCALEFPSZrmk = 13896,
13913
    VSCALEFPSZrmkz  = 13897,
13914
    VSCALEFPSZrr  = 13898,
13915
    VSCALEFPSZrrk = 13899,
13916
    VSCALEFPSZrrkz  = 13900,
13917
    VSCALEFSDZ128rm = 13901,
13918
    VSCALEFSDZ128rmk  = 13902,
13919
    VSCALEFSDZ128rmkz = 13903,
13920
    VSCALEFSDZ128rr = 13904,
13921
    VSCALEFSDZ128rrb  = 13905,
13922
    VSCALEFSDZ128rrbk = 13906,
13923
    VSCALEFSDZ128rrbkz  = 13907,
13924
    VSCALEFSDZ128rrk  = 13908,
13925
    VSCALEFSDZ128rrkz = 13909,
13926
    VSCALEFSSZ128rm = 13910,
13927
    VSCALEFSSZ128rmk  = 13911,
13928
    VSCALEFSSZ128rmkz = 13912,
13929
    VSCALEFSSZ128rr = 13913,
13930
    VSCALEFSSZ128rrb  = 13914,
13931
    VSCALEFSSZ128rrbk = 13915,
13932
    VSCALEFSSZ128rrbkz  = 13916,
13933
    VSCALEFSSZ128rrk  = 13917,
13934
    VSCALEFSSZ128rrkz = 13918,
13935
    VSCATTERDPDZ128mr = 13919,
13936
    VSCATTERDPDZ256mr = 13920,
13937
    VSCATTERDPDZmr  = 13921,
13938
    VSCATTERDPSZ128mr = 13922,
13939
    VSCATTERDPSZ256mr = 13923,
13940
    VSCATTERDPSZmr  = 13924,
13941
    VSCATTERPF0DPDm = 13925,
13942
    VSCATTERPF0DPSm = 13926,
13943
    VSCATTERPF0QPDm = 13927,
13944
    VSCATTERPF0QPSm = 13928,
13945
    VSCATTERPF1DPDm = 13929,
13946
    VSCATTERPF1DPSm = 13930,
13947
    VSCATTERPF1QPDm = 13931,
13948
    VSCATTERPF1QPSm = 13932,
13949
    VSCATTERQPDZ128mr = 13933,
13950
    VSCATTERQPDZ256mr = 13934,
13951
    VSCATTERQPDZmr  = 13935,
13952
    VSCATTERQPSZ128mr = 13936,
13953
    VSCATTERQPSZ256mr = 13937,
13954
    VSCATTERQPSZmr  = 13938,
13955
    VSHUFF32X4Z256rmbi  = 13939,
13956
    VSHUFF32X4Z256rmbik = 13940,
13957
    VSHUFF32X4Z256rmbikz  = 13941,
13958
    VSHUFF32X4Z256rmi = 13942,
13959
    VSHUFF32X4Z256rmik  = 13943,
13960
    VSHUFF32X4Z256rmikz = 13944,
13961
    VSHUFF32X4Z256rri = 13945,
13962
    VSHUFF32X4Z256rrik  = 13946,
13963
    VSHUFF32X4Z256rrikz = 13947,
13964
    VSHUFF32X4Zrmbi = 13948,
13965
    VSHUFF32X4Zrmbik  = 13949,
13966
    VSHUFF32X4Zrmbikz = 13950,
13967
    VSHUFF32X4Zrmi  = 13951,
13968
    VSHUFF32X4Zrmik = 13952,
13969
    VSHUFF32X4Zrmikz  = 13953,
13970
    VSHUFF32X4Zrri  = 13954,
13971
    VSHUFF32X4Zrrik = 13955,
13972
    VSHUFF32X4Zrrikz  = 13956,
13973
    VSHUFF64X2Z256rmbi  = 13957,
13974
    VSHUFF64X2Z256rmbik = 13958,
13975
    VSHUFF64X2Z256rmbikz  = 13959,
13976
    VSHUFF64X2Z256rmi = 13960,
13977
    VSHUFF64X2Z256rmik  = 13961,
13978
    VSHUFF64X2Z256rmikz = 13962,
13979
    VSHUFF64X2Z256rri = 13963,
13980
    VSHUFF64X2Z256rrik  = 13964,
13981
    VSHUFF64X2Z256rrikz = 13965,
13982
    VSHUFF64X2Zrmbi = 13966,
13983
    VSHUFF64X2Zrmbik  = 13967,
13984
    VSHUFF64X2Zrmbikz = 13968,
13985
    VSHUFF64X2Zrmi  = 13969,
13986
    VSHUFF64X2Zrmik = 13970,
13987
    VSHUFF64X2Zrmikz  = 13971,
13988
    VSHUFF64X2Zrri  = 13972,
13989
    VSHUFF64X2Zrrik = 13973,
13990
    VSHUFF64X2Zrrikz  = 13974,
13991
    VSHUFI32X4Z256rmbi  = 13975,
13992
    VSHUFI32X4Z256rmbik = 13976,
13993
    VSHUFI32X4Z256rmbikz  = 13977,
13994
    VSHUFI32X4Z256rmi = 13978,
13995
    VSHUFI32X4Z256rmik  = 13979,
13996
    VSHUFI32X4Z256rmikz = 13980,
13997
    VSHUFI32X4Z256rri = 13981,
13998
    VSHUFI32X4Z256rrik  = 13982,
13999
    VSHUFI32X4Z256rrikz = 13983,
14000
    VSHUFI32X4Zrmbi = 13984,
14001
    VSHUFI32X4Zrmbik  = 13985,
14002
    VSHUFI32X4Zrmbikz = 13986,
14003
    VSHUFI32X4Zrmi  = 13987,
14004
    VSHUFI32X4Zrmik = 13988,
14005
    VSHUFI32X4Zrmikz  = 13989,
14006
    VSHUFI32X4Zrri  = 13990,
14007
    VSHUFI32X4Zrrik = 13991,
14008
    VSHUFI32X4Zrrikz  = 13992,
14009
    VSHUFI64X2Z256rmbi  = 13993,
14010
    VSHUFI64X2Z256rmbik = 13994,
14011
    VSHUFI64X2Z256rmbikz  = 13995,
14012
    VSHUFI64X2Z256rmi = 13996,
14013
    VSHUFI64X2Z256rmik  = 13997,
14014
    VSHUFI64X2Z256rmikz = 13998,
14015
    VSHUFI64X2Z256rri = 13999,
14016
    VSHUFI64X2Z256rrik  = 14000,
14017
    VSHUFI64X2Z256rrikz = 14001,
14018
    VSHUFI64X2Zrmbi = 14002,
14019
    VSHUFI64X2Zrmbik  = 14003,
14020
    VSHUFI64X2Zrmbikz = 14004,
14021
    VSHUFI64X2Zrmi  = 14005,
14022
    VSHUFI64X2Zrmik = 14006,
14023
    VSHUFI64X2Zrmikz  = 14007,
14024
    VSHUFI64X2Zrri  = 14008,
14025
    VSHUFI64X2Zrrik = 14009,
14026
    VSHUFI64X2Zrrikz  = 14010,
14027
    VSHUFPDYrmi = 14011,
14028
    VSHUFPDYrri = 14012,
14029
    VSHUFPDZ128rmbi = 14013,
14030
    VSHUFPDZ128rmbik  = 14014,
14031
    VSHUFPDZ128rmbikz = 14015,
14032
    VSHUFPDZ128rmi  = 14016,
14033
    VSHUFPDZ128rmik = 14017,
14034
    VSHUFPDZ128rmikz  = 14018,
14035
    VSHUFPDZ128rri  = 14019,
14036
    VSHUFPDZ128rrik = 14020,
14037
    VSHUFPDZ128rrikz  = 14021,
14038
    VSHUFPDZ256rmbi = 14022,
14039
    VSHUFPDZ256rmbik  = 14023,
14040
    VSHUFPDZ256rmbikz = 14024,
14041
    VSHUFPDZ256rmi  = 14025,
14042
    VSHUFPDZ256rmik = 14026,
14043
    VSHUFPDZ256rmikz  = 14027,
14044
    VSHUFPDZ256rri  = 14028,
14045
    VSHUFPDZ256rrik = 14029,
14046
    VSHUFPDZ256rrikz  = 14030,
14047
    VSHUFPDZrmbi  = 14031,
14048
    VSHUFPDZrmbik = 14032,
14049
    VSHUFPDZrmbikz  = 14033,
14050
    VSHUFPDZrmi = 14034,
14051
    VSHUFPDZrmik  = 14035,
14052
    VSHUFPDZrmikz = 14036,
14053
    VSHUFPDZrri = 14037,
14054
    VSHUFPDZrrik  = 14038,
14055
    VSHUFPDZrrikz = 14039,
14056
    VSHUFPDrmi  = 14040,
14057
    VSHUFPDrri  = 14041,
14058
    VSHUFPSYrmi = 14042,
14059
    VSHUFPSYrri = 14043,
14060
    VSHUFPSZ128rmbi = 14044,
14061
    VSHUFPSZ128rmbik  = 14045,
14062
    VSHUFPSZ128rmbikz = 14046,
14063
    VSHUFPSZ128rmi  = 14047,
14064
    VSHUFPSZ128rmik = 14048,
14065
    VSHUFPSZ128rmikz  = 14049,
14066
    VSHUFPSZ128rri  = 14050,
14067
    VSHUFPSZ128rrik = 14051,
14068
    VSHUFPSZ128rrikz  = 14052,
14069
    VSHUFPSZ256rmbi = 14053,
14070
    VSHUFPSZ256rmbik  = 14054,
14071
    VSHUFPSZ256rmbikz = 14055,
14072
    VSHUFPSZ256rmi  = 14056,
14073
    VSHUFPSZ256rmik = 14057,
14074
    VSHUFPSZ256rmikz  = 14058,
14075
    VSHUFPSZ256rri  = 14059,
14076
    VSHUFPSZ256rrik = 14060,
14077
    VSHUFPSZ256rrikz  = 14061,
14078
    VSHUFPSZrmbi  = 14062,
14079
    VSHUFPSZrmbik = 14063,
14080
    VSHUFPSZrmbikz  = 14064,
14081
    VSHUFPSZrmi = 14065,
14082
    VSHUFPSZrmik  = 14066,
14083
    VSHUFPSZrmikz = 14067,
14084
    VSHUFPSZrri = 14068,
14085
    VSHUFPSZrrik  = 14069,
14086
    VSHUFPSZrrikz = 14070,
14087
    VSHUFPSrmi  = 14071,
14088
    VSHUFPSrri  = 14072,
14089
    VSQRTPDYm = 14073,
14090
    VSQRTPDYr = 14074,
14091
    VSQRTPDZ128m  = 14075,
14092
    VSQRTPDZ128mb = 14076,
14093
    VSQRTPDZ128mbk  = 14077,
14094
    VSQRTPDZ128mbkz = 14078,
14095
    VSQRTPDZ128mk = 14079,
14096
    VSQRTPDZ128mkz  = 14080,
14097
    VSQRTPDZ128r  = 14081,
14098
    VSQRTPDZ128rk = 14082,
14099
    VSQRTPDZ128rkz  = 14083,
14100
    VSQRTPDZ256m  = 14084,
14101
    VSQRTPDZ256mb = 14085,
14102
    VSQRTPDZ256mbk  = 14086,
14103
    VSQRTPDZ256mbkz = 14087,
14104
    VSQRTPDZ256mk = 14088,
14105
    VSQRTPDZ256mkz  = 14089,
14106
    VSQRTPDZ256r  = 14090,
14107
    VSQRTPDZ256rk = 14091,
14108
    VSQRTPDZ256rkz  = 14092,
14109
    VSQRTPDZm = 14093,
14110
    VSQRTPDZmb  = 14094,
14111
    VSQRTPDZmbk = 14095,
14112
    VSQRTPDZmbkz  = 14096,
14113
    VSQRTPDZmk  = 14097,
14114
    VSQRTPDZmkz = 14098,
14115
    VSQRTPDZr = 14099,
14116
    VSQRTPDZrb  = 14100,
14117
    VSQRTPDZrbk = 14101,
14118
    VSQRTPDZrbkz  = 14102,
14119
    VSQRTPDZrk  = 14103,
14120
    VSQRTPDZrkz = 14104,
14121
    VSQRTPDm  = 14105,
14122
    VSQRTPDr  = 14106,
14123
    VSQRTPSYm = 14107,
14124
    VSQRTPSYr = 14108,
14125
    VSQRTPSZ128m  = 14109,
14126
    VSQRTPSZ128mb = 14110,
14127
    VSQRTPSZ128mbk  = 14111,
14128
    VSQRTPSZ128mbkz = 14112,
14129
    VSQRTPSZ128mk = 14113,
14130
    VSQRTPSZ128mkz  = 14114,
14131
    VSQRTPSZ128r  = 14115,
14132
    VSQRTPSZ128rk = 14116,
14133
    VSQRTPSZ128rkz  = 14117,
14134
    VSQRTPSZ256m  = 14118,
14135
    VSQRTPSZ256mb = 14119,
14136
    VSQRTPSZ256mbk  = 14120,
14137
    VSQRTPSZ256mbkz = 14121,
14138
    VSQRTPSZ256mk = 14122,
14139
    VSQRTPSZ256mkz  = 14123,
14140
    VSQRTPSZ256r  = 14124,
14141
    VSQRTPSZ256rk = 14125,
14142
    VSQRTPSZ256rkz  = 14126,
14143
    VSQRTPSZm = 14127,
14144
    VSQRTPSZmb  = 14128,
14145
    VSQRTPSZmbk = 14129,
14146
    VSQRTPSZmbkz  = 14130,
14147
    VSQRTPSZmk  = 14131,
14148
    VSQRTPSZmkz = 14132,
14149
    VSQRTPSZr = 14133,
14150
    VSQRTPSZrb  = 14134,
14151
    VSQRTPSZrbk = 14135,
14152
    VSQRTPSZrbkz  = 14136,
14153
    VSQRTPSZrk  = 14137,
14154
    VSQRTPSZrkz = 14138,
14155
    VSQRTPSm  = 14139,
14156
    VSQRTPSr  = 14140,
14157
    VSQRTSDZm = 14141,
14158
    VSQRTSDZm_Int = 14142,
14159
    VSQRTSDZm_Intk  = 14143,
14160
    VSQRTSDZm_Intkz = 14144,
14161
    VSQRTSDZr = 14145,
14162
    VSQRTSDZr_Int = 14146,
14163
    VSQRTSDZr_Intk  = 14147,
14164
    VSQRTSDZr_Intkz = 14148,
14165
    VSQRTSDZrb_Int  = 14149,
14166
    VSQRTSDZrb_Intk = 14150,
14167
    VSQRTSDZrb_Intkz  = 14151,
14168
    VSQRTSDm  = 14152,
14169
    VSQRTSDm_Int  = 14153,
14170
    VSQRTSDr  = 14154,
14171
    VSQRTSDr_Int  = 14155,
14172
    VSQRTSSZm = 14156,
14173
    VSQRTSSZm_Int = 14157,
14174
    VSQRTSSZm_Intk  = 14158,
14175
    VSQRTSSZm_Intkz = 14159,
14176
    VSQRTSSZr = 14160,
14177
    VSQRTSSZr_Int = 14161,
14178
    VSQRTSSZr_Intk  = 14162,
14179
    VSQRTSSZr_Intkz = 14163,
14180
    VSQRTSSZrb_Int  = 14164,
14181
    VSQRTSSZrb_Intk = 14165,
14182
    VSQRTSSZrb_Intkz  = 14166,
14183
    VSQRTSSm  = 14167,
14184
    VSQRTSSm_Int  = 14168,
14185
    VSQRTSSr  = 14169,
14186
    VSQRTSSr_Int  = 14170,
14187
    VSTMXCSR  = 14171,
14188
    VSUBPDYrm = 14172,
14189
    VSUBPDYrr = 14173,
14190
    VSUBPDZ128rm  = 14174,
14191
    VSUBPDZ128rmb = 14175,
14192
    VSUBPDZ128rmbk  = 14176,
14193
    VSUBPDZ128rmbkz = 14177,
14194
    VSUBPDZ128rmk = 14178,
14195
    VSUBPDZ128rmkz  = 14179,
14196
    VSUBPDZ128rr  = 14180,
14197
    VSUBPDZ128rrk = 14181,
14198
    VSUBPDZ128rrkz  = 14182,
14199
    VSUBPDZ256rm  = 14183,
14200
    VSUBPDZ256rmb = 14184,
14201
    VSUBPDZ256rmbk  = 14185,
14202
    VSUBPDZ256rmbkz = 14186,
14203
    VSUBPDZ256rmk = 14187,
14204
    VSUBPDZ256rmkz  = 14188,
14205
    VSUBPDZ256rr  = 14189,
14206
    VSUBPDZ256rrk = 14190,
14207
    VSUBPDZ256rrkz  = 14191,
14208
    VSUBPDZrb = 14192,
14209
    VSUBPDZrbk  = 14193,
14210
    VSUBPDZrbkz = 14194,
14211
    VSUBPDZrm = 14195,
14212
    VSUBPDZrmb  = 14196,
14213
    VSUBPDZrmbk = 14197,
14214
    VSUBPDZrmbkz  = 14198,
14215
    VSUBPDZrmk  = 14199,
14216
    VSUBPDZrmkz = 14200,
14217
    VSUBPDZrr = 14201,
14218
    VSUBPDZrrk  = 14202,
14219
    VSUBPDZrrkz = 14203,
14220
    VSUBPDrm  = 14204,
14221
    VSUBPDrr  = 14205,
14222
    VSUBPSYrm = 14206,
14223
    VSUBPSYrr = 14207,
14224
    VSUBPSZ128rm  = 14208,
14225
    VSUBPSZ128rmb = 14209,
14226
    VSUBPSZ128rmbk  = 14210,
14227
    VSUBPSZ128rmbkz = 14211,
14228
    VSUBPSZ128rmk = 14212,
14229
    VSUBPSZ128rmkz  = 14213,
14230
    VSUBPSZ128rr  = 14214,
14231
    VSUBPSZ128rrk = 14215,
14232
    VSUBPSZ128rrkz  = 14216,
14233
    VSUBPSZ256rm  = 14217,
14234
    VSUBPSZ256rmb = 14218,
14235
    VSUBPSZ256rmbk  = 14219,
14236
    VSUBPSZ256rmbkz = 14220,
14237
    VSUBPSZ256rmk = 14221,
14238
    VSUBPSZ256rmkz  = 14222,
14239
    VSUBPSZ256rr  = 14223,
14240
    VSUBPSZ256rrk = 14224,
14241
    VSUBPSZ256rrkz  = 14225,
14242
    VSUBPSZrb = 14226,
14243
    VSUBPSZrbk  = 14227,
14244
    VSUBPSZrbkz = 14228,
14245
    VSUBPSZrm = 14229,
14246
    VSUBPSZrmb  = 14230,
14247
    VSUBPSZrmbk = 14231,
14248
    VSUBPSZrmbkz  = 14232,
14249
    VSUBPSZrmk  = 14233,
14250
    VSUBPSZrmkz = 14234,
14251
    VSUBPSZrr = 14235,
14252
    VSUBPSZrrk  = 14236,
14253
    VSUBPSZrrkz = 14237,
14254
    VSUBPSrm  = 14238,
14255
    VSUBPSrr  = 14239,
14256
    VSUBSDZrm = 14240,
14257
    VSUBSDZrm_Int = 14241,
14258
    VSUBSDZrm_Intk  = 14242,
14259
    VSUBSDZrm_Intkz = 14243,
14260
    VSUBSDZrr = 14244,
14261
    VSUBSDZrr_Int = 14245,
14262
    VSUBSDZrr_Intk  = 14246,
14263
    VSUBSDZrr_Intkz = 14247,
14264
    VSUBSDZrrb  = 14248,
14265
    VSUBSDZrrbk = 14249,
14266
    VSUBSDZrrbkz  = 14250,
14267
    VSUBSDrm  = 14251,
14268
    VSUBSDrm_Int  = 14252,
14269
    VSUBSDrr  = 14253,
14270
    VSUBSDrr_Int  = 14254,
14271
    VSUBSSZrm = 14255,
14272
    VSUBSSZrm_Int = 14256,
14273
    VSUBSSZrm_Intk  = 14257,
14274
    VSUBSSZrm_Intkz = 14258,
14275
    VSUBSSZrr = 14259,
14276
    VSUBSSZrr_Int = 14260,
14277
    VSUBSSZrr_Intk  = 14261,
14278
    VSUBSSZrr_Intkz = 14262,
14279
    VSUBSSZrrb  = 14263,
14280
    VSUBSSZrrbk = 14264,
14281
    VSUBSSZrrbkz  = 14265,
14282
    VSUBSSrm  = 14266,
14283
    VSUBSSrm_Int  = 14267,
14284
    VSUBSSrr  = 14268,
14285
    VSUBSSrr_Int  = 14269,
14286
    VTESTPDYrm  = 14270,
14287
    VTESTPDYrr  = 14271,
14288
    VTESTPDrm = 14272,
14289
    VTESTPDrr = 14273,
14290
    VTESTPSYrm  = 14274,
14291
    VTESTPSYrr  = 14275,
14292
    VTESTPSrm = 14276,
14293
    VTESTPSrr = 14277,
14294
    VUCOMISDZrb = 14278,
14295
    VUCOMISDZrm = 14279,
14296
    VUCOMISDZrr = 14280,
14297
    VUCOMISDrm  = 14281,
14298
    VUCOMISDrr  = 14282,
14299
    VUCOMISSZrb = 14283,
14300
    VUCOMISSZrm = 14284,
14301
    VUCOMISSZrr = 14285,
14302
    VUCOMISSrm  = 14286,
14303
    VUCOMISSrr  = 14287,
14304
    VUNPCKHPDYrm  = 14288,
14305
    VUNPCKHPDYrr  = 14289,
14306
    VUNPCKHPDZ128rm = 14290,
14307
    VUNPCKHPDZ128rmb  = 14291,
14308
    VUNPCKHPDZ128rmbk = 14292,
14309
    VUNPCKHPDZ128rmbkz  = 14293,
14310
    VUNPCKHPDZ128rmk  = 14294,
14311
    VUNPCKHPDZ128rmkz = 14295,
14312
    VUNPCKHPDZ128rr = 14296,
14313
    VUNPCKHPDZ128rrk  = 14297,
14314
    VUNPCKHPDZ128rrkz = 14298,
14315
    VUNPCKHPDZ256rm = 14299,
14316
    VUNPCKHPDZ256rmb  = 14300,
14317
    VUNPCKHPDZ256rmbk = 14301,
14318
    VUNPCKHPDZ256rmbkz  = 14302,
14319
    VUNPCKHPDZ256rmk  = 14303,
14320
    VUNPCKHPDZ256rmkz = 14304,
14321
    VUNPCKHPDZ256rr = 14305,
14322
    VUNPCKHPDZ256rrk  = 14306,
14323
    VUNPCKHPDZ256rrkz = 14307,
14324
    VUNPCKHPDZrm  = 14308,
14325
    VUNPCKHPDZrmb = 14309,
14326
    VUNPCKHPDZrmbk  = 14310,
14327
    VUNPCKHPDZrmbkz = 14311,
14328
    VUNPCKHPDZrmk = 14312,
14329
    VUNPCKHPDZrmkz  = 14313,
14330
    VUNPCKHPDZrr  = 14314,
14331
    VUNPCKHPDZrrk = 14315,
14332
    VUNPCKHPDZrrkz  = 14316,
14333
    VUNPCKHPDrm = 14317,
14334
    VUNPCKHPDrr = 14318,
14335
    VUNPCKHPSYrm  = 14319,
14336
    VUNPCKHPSYrr  = 14320,
14337
    VUNPCKHPSZ128rm = 14321,
14338
    VUNPCKHPSZ128rmb  = 14322,
14339
    VUNPCKHPSZ128rmbk = 14323,
14340
    VUNPCKHPSZ128rmbkz  = 14324,
14341
    VUNPCKHPSZ128rmk  = 14325,
14342
    VUNPCKHPSZ128rmkz = 14326,
14343
    VUNPCKHPSZ128rr = 14327,
14344
    VUNPCKHPSZ128rrk  = 14328,
14345
    VUNPCKHPSZ128rrkz = 14329,
14346
    VUNPCKHPSZ256rm = 14330,
14347
    VUNPCKHPSZ256rmb  = 14331,
14348
    VUNPCKHPSZ256rmbk = 14332,
14349
    VUNPCKHPSZ256rmbkz  = 14333,
14350
    VUNPCKHPSZ256rmk  = 14334,
14351
    VUNPCKHPSZ256rmkz = 14335,
14352
    VUNPCKHPSZ256rr = 14336,
14353
    VUNPCKHPSZ256rrk  = 14337,
14354
    VUNPCKHPSZ256rrkz = 14338,
14355
    VUNPCKHPSZrm  = 14339,
14356
    VUNPCKHPSZrmb = 14340,
14357
    VUNPCKHPSZrmbk  = 14341,
14358
    VUNPCKHPSZrmbkz = 14342,
14359
    VUNPCKHPSZrmk = 14343,
14360
    VUNPCKHPSZrmkz  = 14344,
14361
    VUNPCKHPSZrr  = 14345,
14362
    VUNPCKHPSZrrk = 14346,
14363
    VUNPCKHPSZrrkz  = 14347,
14364
    VUNPCKHPSrm = 14348,
14365
    VUNPCKHPSrr = 14349,
14366
    VUNPCKLPDYrm  = 14350,
14367
    VUNPCKLPDYrr  = 14351,
14368
    VUNPCKLPDZ128rm = 14352,
14369
    VUNPCKLPDZ128rmb  = 14353,
14370
    VUNPCKLPDZ128rmbk = 14354,
14371
    VUNPCKLPDZ128rmbkz  = 14355,
14372
    VUNPCKLPDZ128rmk  = 14356,
14373
    VUNPCKLPDZ128rmkz = 14357,
14374
    VUNPCKLPDZ128rr = 14358,
14375
    VUNPCKLPDZ128rrk  = 14359,
14376
    VUNPCKLPDZ128rrkz = 14360,
14377
    VUNPCKLPDZ256rm = 14361,
14378
    VUNPCKLPDZ256rmb  = 14362,
14379
    VUNPCKLPDZ256rmbk = 14363,
14380
    VUNPCKLPDZ256rmbkz  = 14364,
14381
    VUNPCKLPDZ256rmk  = 14365,
14382
    VUNPCKLPDZ256rmkz = 14366,
14383
    VUNPCKLPDZ256rr = 14367,
14384
    VUNPCKLPDZ256rrk  = 14368,
14385
    VUNPCKLPDZ256rrkz = 14369,
14386
    VUNPCKLPDZrm  = 14370,
14387
    VUNPCKLPDZrmb = 14371,
14388
    VUNPCKLPDZrmbk  = 14372,
14389
    VUNPCKLPDZrmbkz = 14373,
14390
    VUNPCKLPDZrmk = 14374,
14391
    VUNPCKLPDZrmkz  = 14375,
14392
    VUNPCKLPDZrr  = 14376,
14393
    VUNPCKLPDZrrk = 14377,
14394
    VUNPCKLPDZrrkz  = 14378,
14395
    VUNPCKLPDrm = 14379,
14396
    VUNPCKLPDrr = 14380,
14397
    VUNPCKLPSYrm  = 14381,
14398
    VUNPCKLPSYrr  = 14382,
14399
    VUNPCKLPSZ128rm = 14383,
14400
    VUNPCKLPSZ128rmb  = 14384,
14401
    VUNPCKLPSZ128rmbk = 14385,
14402
    VUNPCKLPSZ128rmbkz  = 14386,
14403
    VUNPCKLPSZ128rmk  = 14387,
14404
    VUNPCKLPSZ128rmkz = 14388,
14405
    VUNPCKLPSZ128rr = 14389,
14406
    VUNPCKLPSZ128rrk  = 14390,
14407
    VUNPCKLPSZ128rrkz = 14391,
14408
    VUNPCKLPSZ256rm = 14392,
14409
    VUNPCKLPSZ256rmb  = 14393,
14410
    VUNPCKLPSZ256rmbk = 14394,
14411
    VUNPCKLPSZ256rmbkz  = 14395,
14412
    VUNPCKLPSZ256rmk  = 14396,
14413
    VUNPCKLPSZ256rmkz = 14397,
14414
    VUNPCKLPSZ256rr = 14398,
14415
    VUNPCKLPSZ256rrk  = 14399,
14416
    VUNPCKLPSZ256rrkz = 14400,
14417
    VUNPCKLPSZrm  = 14401,
14418
    VUNPCKLPSZrmb = 14402,
14419
    VUNPCKLPSZrmbk  = 14403,
14420
    VUNPCKLPSZrmbkz = 14404,
14421
    VUNPCKLPSZrmk = 14405,
14422
    VUNPCKLPSZrmkz  = 14406,
14423
    VUNPCKLPSZrr  = 14407,
14424
    VUNPCKLPSZrrk = 14408,
14425
    VUNPCKLPSZrrkz  = 14409,
14426
    VUNPCKLPSrm = 14410,
14427
    VUNPCKLPSrr = 14411,
14428
    VXORPDYrm = 14412,
14429
    VXORPDYrr = 14413,
14430
    VXORPDZ128rm  = 14414,
14431
    VXORPDZ128rmb = 14415,
14432
    VXORPDZ128rmbk  = 14416,
14433
    VXORPDZ128rmbkz = 14417,
14434
    VXORPDZ128rmk = 14418,
14435
    VXORPDZ128rmkz  = 14419,
14436
    VXORPDZ128rr  = 14420,
14437
    VXORPDZ128rrk = 14421,
14438
    VXORPDZ128rrkz  = 14422,
14439
    VXORPDZ256rm  = 14423,
14440
    VXORPDZ256rmb = 14424,
14441
    VXORPDZ256rmbk  = 14425,
14442
    VXORPDZ256rmbkz = 14426,
14443
    VXORPDZ256rmk = 14427,
14444
    VXORPDZ256rmkz  = 14428,
14445
    VXORPDZ256rr  = 14429,
14446
    VXORPDZ256rrk = 14430,
14447
    VXORPDZ256rrkz  = 14431,
14448
    VXORPDZrm = 14432,
14449
    VXORPDZrmb  = 14433,
14450
    VXORPDZrmbk = 14434,
14451
    VXORPDZrmbkz  = 14435,
14452
    VXORPDZrmk  = 14436,
14453
    VXORPDZrmkz = 14437,
14454
    VXORPDZrr = 14438,
14455
    VXORPDZrrk  = 14439,
14456
    VXORPDZrrkz = 14440,
14457
    VXORPDrm  = 14441,
14458
    VXORPDrr  = 14442,
14459
    VXORPSYrm = 14443,
14460
    VXORPSYrr = 14444,
14461
    VXORPSZ128rm  = 14445,
14462
    VXORPSZ128rmb = 14446,
14463
    VXORPSZ128rmbk  = 14447,
14464
    VXORPSZ128rmbkz = 14448,
14465
    VXORPSZ128rmk = 14449,
14466
    VXORPSZ128rmkz  = 14450,
14467
    VXORPSZ128rr  = 14451,
14468
    VXORPSZ128rrk = 14452,
14469
    VXORPSZ128rrkz  = 14453,
14470
    VXORPSZ256rm  = 14454,
14471
    VXORPSZ256rmb = 14455,
14472
    VXORPSZ256rmbk  = 14456,
14473
    VXORPSZ256rmbkz = 14457,
14474
    VXORPSZ256rmk = 14458,
14475
    VXORPSZ256rmkz  = 14459,
14476
    VXORPSZ256rr  = 14460,
14477
    VXORPSZ256rrk = 14461,
14478
    VXORPSZ256rrkz  = 14462,
14479
    VXORPSZrm = 14463,
14480
    VXORPSZrmb  = 14464,
14481
    VXORPSZrmbk = 14465,
14482
    VXORPSZrmbkz  = 14466,
14483
    VXORPSZrmk  = 14467,
14484
    VXORPSZrmkz = 14468,
14485
    VXORPSZrr = 14469,
14486
    VXORPSZrrk  = 14470,
14487
    VXORPSZrrkz = 14471,
14488
    VXORPSrm  = 14472,
14489
    VXORPSrr  = 14473,
14490
    VZEROALL  = 14474,
14491
    VZEROUPPER  = 14475,
14492
    V_SET0  = 14476,
14493
    V_SETALLONES  = 14477,
14494
    WAIT  = 14478,
14495
    WBINVD  = 14479,
14496
    WIN_ALLOCA  = 14480,
14497
    WRFLAGS32 = 14481,
14498
    WRFLAGS64 = 14482,
14499
    WRFSBASE  = 14483,
14500
    WRFSBASE64  = 14484,
14501
    WRGSBASE  = 14485,
14502
    WRGSBASE64  = 14486,
14503
    WRMSR = 14487,
14504
    WRPKRU  = 14488,
14505
    WRPKRUr = 14489,
14506
    XABORT  = 14490,
14507
    XACQUIRE_PREFIX = 14491,
14508
    XADD16rm  = 14492,
14509
    XADD16rr  = 14493,
14510
    XADD32rm  = 14494,
14511
    XADD32rr  = 14495,
14512
    XADD64rm  = 14496,
14513
    XADD64rr  = 14497,
14514
    XADD8rm = 14498,
14515
    XADD8rr = 14499,
14516
    XBEGIN  = 14500,
14517
    XBEGIN_2  = 14501,
14518
    XBEGIN_4  = 14502,
14519
    XCHG16ar  = 14503,
14520
    XCHG16rm  = 14504,
14521
    XCHG16rr  = 14505,
14522
    XCHG32ar  = 14506,
14523
    XCHG32ar64  = 14507,
14524
    XCHG32rm  = 14508,
14525
    XCHG32rr  = 14509,
14526
    XCHG64ar  = 14510,
14527
    XCHG64rm  = 14511,
14528
    XCHG64rr  = 14512,
14529
    XCHG8rm = 14513,
14530
    XCHG8rr = 14514,
14531
    XCH_F = 14515,
14532
    XCRYPTCBC = 14516,
14533
    XCRYPTCFB = 14517,
14534
    XCRYPTCTR = 14518,
14535
    XCRYPTECB = 14519,
14536
    XCRYPTOFB = 14520,
14537
    XEND  = 14521,
14538
    XGETBV  = 14522,
14539
    XLAT  = 14523,
14540
    XOR16i16  = 14524,
14541
    XOR16mi = 14525,
14542
    XOR16mi8  = 14526,
14543
    XOR16mr = 14527,
14544
    XOR16ri = 14528,
14545
    XOR16ri8  = 14529,
14546
    XOR16rm = 14530,
14547
    XOR16rr = 14531,
14548
    XOR16rr_REV = 14532,
14549
    XOR32i32  = 14533,
14550
    XOR32mi = 14534,
14551
    XOR32mi8  = 14535,
14552
    XOR32mr = 14536,
14553
    XOR32ri = 14537,
14554
    XOR32ri8  = 14538,
14555
    XOR32rm = 14539,
14556
    XOR32rr = 14540,
14557
    XOR32rr_REV = 14541,
14558
    XOR64i32  = 14542,
14559
    XOR64mi32 = 14543,
14560
    XOR64mi8  = 14544,
14561
    XOR64mr = 14545,
14562
    XOR64ri32 = 14546,
14563
    XOR64ri8  = 14547,
14564
    XOR64rm = 14548,
14565
    XOR64rr = 14549,
14566
    XOR64rr_REV = 14550,
14567
    XOR8i8  = 14551,
14568
    XOR8mi  = 14552,
14569
    XOR8mi8 = 14553,
14570
    XOR8mr  = 14554,
14571
    XOR8ri  = 14555,
14572
    XOR8ri8 = 14556,
14573
    XOR8rm  = 14557,
14574
    XOR8rr  = 14558,
14575
    XOR8rr_REV  = 14559,
14576
    XORPDrm = 14560,
14577
    XORPDrr = 14561,
14578
    XORPSrm = 14562,
14579
    XORPSrr = 14563,
14580
    XRELEASE_PREFIX = 14564,
14581
    XRSTOR  = 14565,
14582
    XRSTOR64  = 14566,
14583
    XRSTORS = 14567,
14584
    XRSTORS64 = 14568,
14585
    XSAVE = 14569,
14586
    XSAVE64 = 14570,
14587
    XSAVEC  = 14571,
14588
    XSAVEC64  = 14572,
14589
    XSAVEOPT  = 14573,
14590
    XSAVEOPT64  = 14574,
14591
    XSAVES  = 14575,
14592
    XSAVES64  = 14576,
14593
    XSETBV  = 14577,
14594
    XSHA1 = 14578,
14595
    XSHA256 = 14579,
14596
    XSTORE  = 14580,
14597
    XTEST = 14581,
14598
    fdisi8087_nop = 14582,
14599
    feni8087_nop  = 14583,
14600
    INSTRUCTION_LIST_END = 14584
14601
  };
14602
14603
namespace Sched {
14604
  enum {
14605
    NoInstrModel  = 0,
14606
    IIC_AAA_WriteMicrocoded = 1,
14607
    IIC_AAD_WriteMicrocoded = 2,
14608
    IIC_AAM_WriteMicrocoded = 3,
14609
    IIC_AAS_WriteMicrocoded = 4,
14610
    IIC_BIN_CARRY_NONMEM_WriteALU = 5,
14611
    IIC_BIN_CARRY_MEM_WriteALULd_WriteRMW = 6,
14612
    IIC_BIN_CARRY_MEM_WriteALULd_ReadAfterLd  = 7,
14613
    IIC_BIN_CARRY_MEM_WriteALULd  = 8,
14614
    IIC_BIN_NONMEM_WriteALU = 9,
14615
    IIC_BIN_MEM_WriteALULd_WriteRMW = 10,
14616
    WriteALU  = 11,
14617
    IIC_BIN_MEM_WriteALULd_ReadAfterLd  = 12,
14618
    IIC_SSE_ALU_F64P_RM_WriteFAddLd_ReadAfterLd = 13,
14619
    IIC_SSE_ALU_F64P_RR_WriteFAdd = 14,
14620
    IIC_SSE_ALU_F32P_RM_WriteFAddLd_ReadAfterLd = 15,
14621
    IIC_SSE_ALU_F32P_RR_WriteFAdd = 16,
14622
    IIC_SSE_ALU_F64S_RM_WriteFAddLd_ReadAfterLd = 17,
14623
    IIC_SSE_ALU_F64S_RR_WriteFAdd = 18,
14624
    IIC_SSE_ALU_F32S_RM_WriteFAddLd_ReadAfterLd = 19,
14625
    IIC_SSE_ALU_F32S_RR_WriteFAdd = 20,
14626
    IIC_SSE_ALU_F64P_RR_WriteFAddLd_ReadAfterLd = 21,
14627
    IIC_SSE_ALU_F32P_RR_WriteFAddLd_ReadAfterLd = 22,
14628
    WriteFAddLd = 23,
14629
    WriteFAdd = 24,
14630
    IIC_BIN_MEM_WriteALULd  = 25,
14631
    IIC_AES_WriteAESDecEncLd_ReadAfterLd  = 26,
14632
    IIC_AES_WriteAESDecEnc  = 27,
14633
    IIC_AES_WriteAESIMCLd = 28,
14634
    IIC_AES_WriteAESIMC = 29,
14635
    WriteAESKeyGenLd  = 30,
14636
    WriteAESKeyGen  = 31,
14637
    WriteVecLogicLd_ReadAfterLd = 32,
14638
    WriteVecLogic = 33,
14639
    IIC_ARPL_MEM_WriteSystem  = 34,
14640
    IIC_ARPL_REG_WriteSystem  = 35,
14641
    WriteZero = 36,
14642
    IIC_SSE_INTALU_P_RM_WriteFBlendLd_ReadAfterLd = 37,
14643
    IIC_SSE_INTALU_P_RR_WriteFBlend = 38,
14644
    IIC_ALU_MEM_WriteFBlendLd_ReadAfterLd = 39,
14645
    IIC_ALU_NONMEM_WriteFBlend  = 40,
14646
    IIC_BOUND_WriteSystem = 41,
14647
    IIC_BIT_SCAN_MEM_WriteShiftLd = 42,
14648
    IIC_BIT_SCAN_REG_WriteShift = 43,
14649
    IIC_BSWAP_WriteALU  = 44,
14650
    IIC_BT_MI_WriteALU  = 45,
14651
    IIC_BT_MR_WriteALULd  = 46,
14652
    IIC_BT_RI_WriteALU  = 47,
14653
    IIC_BT_RR_WriteALU  = 48,
14654
    IIC_BTX_MI_WriteALULd_WriteRMW  = 49,
14655
    IIC_BTX_MR_WriteALULd_WriteRMW  = 50,
14656
    IIC_BTX_RI_WriteALU = 51,
14657
    IIC_BTX_RR_WriteALU = 52,
14658
    IIC_CALL_MEM_WriteJumpLd  = 53,
14659
    IIC_CALL_RI_WriteJump = 54,
14660
    IIC_CALL_MEM_WriteJump  = 55,
14661
    WriteSystem = 56,
14662
    IIC_CBW = 57,
14663
    IIC_CLC_WriteALU  = 58,
14664
    IIC_CLD_WriteALU  = 59,
14665
    IIC_SSE_PREFETCH_WriteLoad  = 60,
14666
    IIC_CLI_WriteALU  = 61,
14667
    IIC_CLTS_WriteALU = 62,
14668
    IIC_CMC_WriteALU  = 63,
14669
    IIC_CMOV16_RM_WriteALULd_ReadAfterLd  = 64,
14670
    IIC_CMOV16_RR_WriteALU  = 65,
14671
    IIC_CMOV32_RM_WriteALULd_ReadAfterLd  = 66,
14672
    IIC_CMOV32_RR_WriteALU  = 67,
14673
    IIC_CMPS_WriteMicrocoded  = 68,
14674
    IIC_CMPXCHG_16B_WriteALULd_WriteRMW = 69,
14675
    IIC_CMPXCHG_MEM_WriteALULd_WriteRMW = 70,
14676
    IIC_CMPXCHG_REG_WriteALU  = 71,
14677
    IIC_CMPXCHG_8B_WriteALULd_WriteRMW  = 72,
14678
    IIC_CMPXCHG_MEM8_WriteALULd_WriteRMW  = 73,
14679
    IIC_CMPXCHG_REG8_WriteALU = 74,
14680
    IIC_SSE_COMIS_RM_WriteFAddLd_ReadAfterLd  = 75,
14681
    IIC_SSE_COMIS_RR_WriteFAdd  = 76,
14682
    IIC_FCOMI_WriteFAdd = 77,
14683
    IIC_CPUID_WriteSystem = 78,
14684
    IIC_CRC32_MEM_WriteFAddLd_ReadAfterLd = 79,
14685
    IIC_CRC32_REG_WriteFAdd = 80,
14686
    IIC_SSE_CVT_PD_RR_WriteCvtI2FLd = 81,
14687
    IIC_SSE_CVT_PD_RM_WriteCvtI2F = 82,
14688
    IIC_SSE_CVT_PS_RM_WriteCvtI2FLd = 83,
14689
    IIC_SSE_CVT_PS_RR_WriteCvtI2F = 84,
14690
    IIC_SSE_CVT_PD_RM_WriteCvtF2ILd = 85,
14691
    IIC_SSE_CVT_PD_RR_WriteCvtF2I = 86,
14692
    IIC_SSE_CVT_PD_RM_WriteCvtF2FLd = 87,
14693
    IIC_SSE_CVT_PD_RR_WriteCvtF2F = 88,
14694
    IIC_SSE_CVT_PS_RM_WriteCvtF2ILd = 89,
14695
    IIC_SSE_CVT_PS_RR_WriteCvtF2I = 90,
14696
    IIC_SSE_CVT_SD2SI_RM_WriteCvtF2ILd  = 91,
14697
    IIC_SSE_CVT_SD2SI_RR_WriteCvtF2I  = 92,
14698
    IIC_SSE_CVT_Scalar_RM_WriteCvtF2FLd = 93,
14699
    IIC_SSE_CVT_Scalar_RR_WriteCvtF2F = 94,
14700
    IIC_SSE_CVT_Scalar_RM_WriteCvtI2FLd = 95,
14701
    IIC_SSE_CVT_Scalar_RR_WriteCvtI2F = 96,
14702
    IIC_SSE_CVT_SS2SI64_RM_WriteCvtF2ILd  = 97,
14703
    IIC_SSE_CVT_SS2SI64_RR_WriteCvtF2I  = 98,
14704
    IIC_SSE_CVT_SS2SI32_RM_WriteCvtF2ILd  = 99,
14705
    IIC_SSE_CVT_SS2SI32_RR_WriteCvtF2I  = 100,
14706
    IIC_DAA_WriteMicrocoded = 101,
14707
    IIC_DAS_WriteMicrocoded = 102,
14708
    IIC_UNARY_MEM_WriteALULd_WriteRMW = 103,
14709
    IIC_UNARY_REG_WriteALU  = 104,
14710
    IIC_DIV16_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 105,
14711
    IIC_DIV16_WriteIDiv = 106,
14712
    IIC_DIV32_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 107,
14713
    IIC_DIV32_WriteIDiv = 108,
14714
    IIC_DIV64_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 109,
14715
    IIC_DIV64_WriteIDiv = 110,
14716
    IIC_DIV8_MEM_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd  = 111,
14717
    IIC_DIV8_REG_WriteIDiv  = 112,
14718
    IIC_SSE_DIV_F64P_RM_WriteFDivLd_ReadAfterLd = 113,
14719
    IIC_SSE_DIV_F64P_RR_WriteFDiv = 114,
14720
    IIC_SSE_DIV_F32P_RR_WriteFDiv = 115,
14721
    WriteFDivLd = 116,
14722
    WriteFDiv = 117,
14723
    IIC_SSE_DIV_F64S_RM_WriteFDivLd_ReadAfterLd = 118,
14724
    IIC_SSE_DIV_F64S_RR_WriteFDiv = 119,
14725
    IIC_SSE_DIV_F32S_RR_WriteFDiv = 120,
14726
    IIC_SSE_DPPD_RM_WriteFAddLd_ReadAfterLd = 121,
14727
    IIC_SSE_DPPD_RR_WriteFAdd = 122,
14728
    IIC_SSE_DPPS_RR_WriteFAdd = 123,
14729
    IIC_RET_WriteSystem = 124,
14730
    IIC_ENTER_WriteMicrocoded = 125,
14731
    IIC_SSE_EXTRACTPS_RM_WriteFBlendLd_WriteRMW = 126,
14732
    IIC_SSE_EXTRACTPS_RR_WriteFBlend  = 127,
14733
    IIC_F2XM1_WriteMicrocoded = 128,
14734
    IIC_CALL_FAR_PTR_WriteJump  = 129,
14735
    IIC_CALL_FAR_MEM_WriteJumpLd  = 130,
14736
    IIC_CALL_FAR_MEM_WriteJump  = 131,
14737
    IIC_JMP_FAR_PTR_WriteJump = 132,
14738
    IIC_JMP_FAR_MEM_WriteJumpLd = 133,
14739
    IIC_JMP_FAR_MEM_WriteJump = 134,
14740
    IIC_FCOMPP_WriteMicrocoded  = 135,
14741
    IIC_FPSTP_WriteMicrocoded = 136,
14742
    IIC_FFREE_WriteMicrocoded = 137,
14743
    IIC_FLDCW_WriteLoad = 138,
14744
    IIC_FLDL_WriteMicrocoded  = 139,
14745
    IIC_FNCLEX_WriteMicrocoded  = 140,
14746
    IIC_FNINIT_WriteMicrocoded  = 141,
14747
    IIC_FNOP_WriteMicrocoded  = 142,
14748
    IIC_FNSTCW_WriteALU = 143,
14749
    IIC_FNSTSW_WriteALU = 144,
14750
    IIC_FPATAN_WriteMicrocoded  = 145,
14751
    IIC_FPREM_WriteMicrocoded = 146,
14752
    IIC_FPREM1_WriteMicrocoded  = 147,
14753
    IIC_FPTAN_WriteMicrocoded = 148,
14754
    IIC_FRNDINT_WriteMicrocoded = 149,
14755
    IIC_FSCALE_WriteMicrocoded  = 150,
14756
    IIC_FNCLEX  = 151,
14757
    IIC_FSINCOS_WriteMicrocoded = 152,
14758
    IIC_FXAM_WriteMicrocoded  = 153,
14759
    IIC_FXRSTOR_WriteMicrocoded = 154,
14760
    IIC_FXSAVE_WriteMicrocoded  = 155,
14761
    IIC_FXTRACT_WriteMicrocoded = 156,
14762
    IIC_FYL2X_WriteMicrocoded = 157,
14763
    IIC_FYL2XP1_WriteMicrocoded = 158,
14764
    IIC_SSE_BIT_P_RM_WriteFAddLd_ReadAfterLd  = 159,
14765
    IIC_SSE_BIT_P_RR_WriteFAdd  = 160,
14766
    IIC_SSE_MOVA_P_RM_WriteLoad = 161,
14767
    IIC_SSE_HADDSUB_RM_WriteFAddLd_ReadAfterLd  = 162,
14768
    IIC_SSE_HADDSUB_RR_WriteFAdd  = 163,
14769
    IIC_HLT_WriteSystem = 164,
14770
    IIC_IDIV16_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd  = 165,
14771
    IIC_IDIV16_WriteIDiv  = 166,
14772
    IIC_IDIV32_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd  = 167,
14773
    IIC_IDIV32_WriteIDiv  = 168,
14774
    IIC_IDIV64_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd  = 169,
14775
    IIC_IDIV64_WriteIDiv  = 170,
14776
    IIC_IDIV8_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 171,
14777
    IIC_IDIV8_WriteIDiv = 172,
14778
    IIC_FILD_WriteLoad  = 173,
14779
    IIC_IMUL16_MEM_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd  = 174,
14780
    IIC_IMUL16_RR_WriteIMul = 175,
14781
    IIC_IMUL16_RM_WriteIMulLd_ReadAfterLd = 176,
14782
    IIC_IMUL16_RMI_WriteIMulLd  = 177,
14783
    IIC_IMUL16_RRI_WriteIMul  = 178,
14784
    IIC_IMUL32_MEM_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd  = 179,
14785
    IIC_IMUL32_RR_WriteIMul = 180,
14786
    IIC_IMUL32_RM_WriteIMulLd_ReadAfterLd = 181,
14787
    IIC_IMUL32_RMI_WriteIMulLd  = 182,
14788
    IIC_IMUL32_RRI_WriteIMul  = 183,
14789
    IIC_IMUL64_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd  = 184,
14790
    IIC_IMUL64_RR_WriteIMul = 185,
14791
    IIC_IMUL64_RM_WriteIMulLd_ReadAfterLd = 186,
14792
    IIC_IMUL64_RMI_WriteIMulLd  = 187,
14793
    IIC_IMUL64_RRI_WriteIMul  = 188,
14794
    IIC_IMUL8_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 189,
14795
    IIC_IMUL8_WriteIMul = 190,
14796
    IIC_IN_RI_WriteSystem = 191,
14797
    IIC_IN_RR_WriteSystem = 192,
14798
    IIC_INS_WriteSystem = 193,
14799
    IIC_SSE_INSERTPS_RM_WriteFShuffleLd_ReadAfterLd = 194,
14800
    IIC_SSE_INSERTPS_RR_WriteFShuffle = 195,
14801
    IIC_INT_WriteSystem = 196,
14802
    IIC_INT3_WriteSystem  = 197,
14803
    IIC_INVD_WriteSystem  = 198,
14804
    IIC_INVLPG_WriteSystem  = 199,
14805
    WriteJumpLd = 200,
14806
    IIC_IRET_WriteJumpLd  = 201,
14807
    IIC_FST_WriteStore  = 202,
14808
    IIC_FIST_WriteStore = 203,
14809
    IIC_SSE_CVT_Scalar_RM_WriteCvtF2FLd_ReadAfterLd = 204,
14810
    IIC_SSE_CVT_Scalar_RM_WriteCvtI2FLd_ReadAfterLd = 205,
14811
    WriteLoad = 206,
14812
    IIC_Jcc_WriteJump = 207,
14813
    IIC_JCXZ_WriteJump  = 208,
14814
    IIC_JMP_MEM_WriteJumpLd = 209,
14815
    IIC_JMP_REG_WriteJump = 210,
14816
    IIC_JMP_REL_WriteJump = 211,
14817
    IIC_AHF_WriteALU  = 212,
14818
    IIC_LAR_RM_WriteSystem  = 213,
14819
    IIC_LAR_RR_WriteSystem  = 214,
14820
    IIC_CMPX_LOCK_WriteALULd_WriteRMW = 215,
14821
    IIC_CMPX_LOCK_16B_WriteALULd_WriteRMW = 216,
14822
    IIC_CMPX_LOCK_8_WriteALULd_WriteRMW = 217,
14823
    IIC_CMPX_LOCK_8B_WriteALULd_WriteRMW  = 218,
14824
    IIC_SSE_LDDQU_WriteLoad = 219,
14825
    IIC_SSE_LDMXCSR_WriteLoad = 220,
14826
    IIC_LXS_WriteSystem = 221,
14827
    IIC_FLDZ_WriteZero  = 222,
14828
    IIC_FIST_WriteZero  = 223,
14829
    IIC_FLD_WriteLoad = 224,
14830
    IIC_FLD80_WriteLoad = 225,
14831
    IIC_FLD_WriteMove = 226,
14832
    IIC_LEA_16_WriteLEA = 227,
14833
    IIC_LEA_WriteLEA  = 228,
14834
    IIC_LEAVE_WriteALU  = 229,
14835
    IIC_SSE_LFENCE_WriteFence = 230,
14836
    IIC_LGDT_WriteSystem  = 231,
14837
    IIC_LIDT_WriteSystem  = 232,
14838
    IIC_LLDT_MEM_WriteSystem  = 233,
14839
    IIC_LLDT_REG_WriteSystem  = 234,
14840
    IIC_LMSW_REG_WriteSystem  = 235,
14841
    IIC_LMSW_MEM_WriteSystem  = 236,
14842
    IIC_ALU_MEM_WriteALULd_WriteRMW = 237,
14843
    IIC_ALU_NONMEM_WriteALULd_WriteRMW  = 238,
14844
    IIC_LODS_WriteMicrocoded  = 239,
14845
    IIC_LOOP_WriteJump  = 240,
14846
    IIC_LOOPE_WriteJump = 241,
14847
    IIC_LOOPNE_WriteJump  = 242,
14848
    IIC_RET_WriteJumpLd = 243,
14849
    IIC_LSL_RM_WriteSystem  = 244,
14850
    IIC_LSL_RR_WriteSystem  = 245,
14851
    IIC_LTR_WriteSystem = 246,
14852
    IIC_XADD_LOCK_MEM_WriteALULd_WriteRMW = 247,
14853
    IIC_XADD_LOCK_MEM8_WriteALULd_WriteRMW  = 248,
14854
    IIC_SSE_MASKMOV_WriteStore  = 249,
14855
    IIC_SSE_MFENCE_WriteFence = 250,
14856
    IIC_MMX_CVT_PD_RM_WriteCvtF2ILd = 251,
14857
    IIC_MMX_CVT_PD_RR_WriteCvtF2I = 252,
14858
    WriteCvtI2FLd = 253,
14859
    WriteCvtI2F = 254,
14860
    IIC_MMX_CVT_PS_RM_WriteCvtF2ILd = 255,
14861
    IIC_MMX_CVT_PS_RR_WriteCvtF2I = 256,
14862
    IIC_MMX_EMMS  = 257,
14863
    IIC_MMX_MASKMOV_WriteShuffle  = 258,
14864
    IIC_MMX_MOV_REG_MM_WriteStore = 259,
14865
    IIC_MMX_MOV_REG_MM_WriteMove  = 260,
14866
    IIC_MMX_MOV_MM_RM_WriteStore  = 261,
14867
    IIC_MMX_MOV_MM_RM_WriteLoad = 262,
14868
    IIC_MMX_MOV_MM_RM_WriteMove = 263,
14869
    IIC_MMX_MOVQ_RM_WriteLoad = 264,
14870
    IIC_MMX_MOVQ_RR_WriteMove = 265,
14871
    IIC_MMX_MOVQ_RM_WriteStore  = 266,
14872
    WriteMove = 267,
14873
    IIC_MMX_ALU_RM_WriteVecALULd  = 268,
14874
    IIC_MMX_ALU_RR_WriteVecALU  = 269,
14875
    IIC_MMX_PCK_RM_WriteShuffleLd_ReadAfterLd = 270,
14876
    IIC_MMX_PCK_RR_WriteShuffle = 271,
14877
    IIC_MMX_ALU_RM_WriteVecALULd_ReadAfterLd  = 272,
14878
    IIC_MMX_ALUQ_RM_WriteVecALULd_ReadAfterLd = 273,
14879
    IIC_MMX_ALUQ_RR_WriteVecALU = 274,
14880
    WriteShuffleLd_ReadAfterLd  = 275,
14881
    WriteShuffle  = 276,
14882
    IIC_MMX_ALU_RM_WriteVecLogicLd_ReadAfterLd  = 277,
14883
    IIC_MMX_ALU_RR_WriteVecLogic  = 278,
14884
    IIC_MMX_MISC_FUNC_REG_WriteVecIMulLd_ReadAfterLd  = 279,
14885
    IIC_MMX_MISC_FUNC_MEM_WriteVecIMul  = 280,
14886
    IIC_MMX_PEXTR_WriteShuffle  = 281,
14887
    IIC_MMX_PHADDSUBW_RM_WriteVecALULd_ReadAfterLd  = 282,
14888
    IIC_MMX_PHADDSUBW_RR_WriteVecALU  = 283,
14889
    IIC_MMX_PHADDSUBD_RM_WriteVecALULd_ReadAfterLd  = 284,
14890
    IIC_MMX_PHADDSUBD_RR_WriteVecALU  = 285,
14891
    IIC_MMX_PINSRW_WriteShuffleLd_ReadAfterLd = 286,
14892
    IIC_MMX_PINSRW_WriteShuffle = 287,
14893
    IIC_MMX_PMUL_WriteVecIMulLd_ReadAfterLd = 288,
14894
    IIC_MMX_PMUL_WriteVecIMul = 289,
14895
    IIC_MMX_PSADBW_WriteVecIMulLd_ReadAfterLd = 290,
14896
    IIC_MMX_PSADBW_WriteVecIMul = 291,
14897
    IIC_MMX_PSHUF_WriteShuffleLd_ReadAfterLd  = 292,
14898
    IIC_MMX_PSHUF_WriteShuffle  = 293,
14899
    IIC_MMX_PSHUF_WriteShuffleLd  = 294,
14900
    IIC_MMX_SHIFT_RI_WriteVecShift  = 295,
14901
    IIC_MMX_SHIFT_RM_WriteVecShiftLd_ReadAfterLd  = 296,
14902
    IIC_MMX_SHIFT_RR_WriteVecShift  = 297,
14903
    IIC_MMX_UNPCK_H_RM_WriteShuffleLd_ReadAfterLd = 298,
14904
    IIC_MMX_UNPCK_H_RR_WriteShuffle = 299,
14905
    IIC_MMX_UNPCK_L_WriteShuffleLd_ReadAfterLd  = 300,
14906
    IIC_MMX_UNPCK_L_WriteShuffle  = 301,
14907
    IIC_SSE_MONITOR_WriteSystem = 302,
14908
    IIC_MOV_MEM_WriteALU  = 303,
14909
    IIC_MOV_MEM_WriteStore  = 304,
14910
    IIC_MOV_MEM_SR_WriteMove  = 305,
14911
    IIC_MOV_WriteMove = 306,
14912
    IIC_MOV_MEM_WriteLoad = 307,
14913
    IIC_MOV_REG_SR_WriteMove  = 308,
14914
    IIC_MOV_SR_MEM_WriteMove  = 309,
14915
    IIC_MOV_SR_REG_WriteMove  = 310,
14916
    IIC_MOV_CR_REG_WriteSystem  = 311,
14917
    IIC_MOV_DR_REG_WriteSystem  = 312,
14918
    IIC_ALU_NONMEM_WriteZero  = 313,
14919
    IIC_MOV_REG_CR_WriteSystem  = 314,
14920
    IIC_MOV_REG_DR_WriteSystem  = 315,
14921
    IIC_SSE_MOVDQ_WriteLoad = 316,
14922
    IIC_SSE_MOVDQ_WriteMove = 317,
14923
    IIC_SSE_MOVA_P_MR_WriteStore  = 318,
14924
    IIC_SSE_MOVA_P_RR_WriteFShuffle = 319,
14925
    IIC_MOVBE_WriteStore  = 320,
14926
    IIC_MOVBE_WriteALULd  = 321,
14927
    IIC_SSE_MOV_LH_WriteLoad  = 322,
14928
    IIC_SSE_MOV_LH_WriteFShuffle  = 323,
14929
    IIC_SSE_MOVA_P_RR_WriteMove = 324,
14930
    IIC_SSE_MOVU_P_MR_WriteStore  = 325,
14931
    IIC_SSE_MOVU_P_RM_WriteLoad = 326,
14932
    IIC_SSE_MOVU_P_RR_WriteMove = 327,
14933
    IIC_SSE_MOV_LH_WriteStore = 328,
14934
    IIC_SSE_MOV_LH_WriteFShuffleLd_ReadAfterLd  = 329,
14935
    IIC_SSE_MOVMSK_WriteVecLogic  = 330,
14936
    IIC_SSE_MOVNT_WriteStore  = 331,
14937
    IIC_SSE_MOVDQ_WriteStore  = 332,
14938
    IIC_SSE_MOVD_ToGP_WriteMove = 333,
14939
    IIC_SSE_MOVQ_RR_WriteVecLogic = 334,
14940
    IIC_MOVS_WriteMicrocoded  = 335,
14941
    IIC_SSE_MOV_S_MR_WriteStore = 336,
14942
    IIC_SSE_MOV_S_RM_WriteLoad  = 337,
14943
    IIC_SSE_MOV_S_RR_WriteFShuffle  = 338,
14944
    IIC_MOVSX_R16_M8_WriteALULd = 339,
14945
    IIC_MOVSX_R16_R8_WriteALU = 340,
14946
    IIC_MOVSX_WriteALULd  = 341,
14947
    IIC_MOVSX_WriteALU  = 342,
14948
    IIC_SSE_MOVU_P_RR_WriteFShuffle = 343,
14949
    IIC_SSE_MOVDQ_WriteVecLogicLd = 344,
14950
    IIC_MOVZX_R16_M8_WriteALULd = 345,
14951
    IIC_MOVZX_R16_R8_WriteALU = 346,
14952
    IIC_MOVZX_WriteALULd  = 347,
14953
    IIC_MOVZX_WriteALU  = 348,
14954
    IIC_SSE_MPSADBW_RM_WriteMPSADLd_ReadAfterLd = 349,
14955
    IIC_SSE_MPSADBW_RR_WriteMPSAD = 350,
14956
    IIC_MUL16_MEM_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 351,
14957
    IIC_MUL16_REG_WriteIMul = 352,
14958
    IIC_MUL32_MEM_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 353,
14959
    IIC_MUL32_REG_WriteIMul = 354,
14960
    IIC_MUL64_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 355,
14961
    IIC_MUL64_WriteIMul = 356,
14962
    IIC_MUL8_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd  = 357,
14963
    IIC_MUL8_WriteIMul  = 358,
14964
    IIC_SSE_MUL_F64P_RM_WriteFMulLd_ReadAfterLd = 359,
14965
    IIC_SSE_MUL_F64P_RR_WriteFMul = 360,
14966
    IIC_SSE_MUL_F32P_RR_WriteFMul = 361,
14967
    IIC_SSE_MUL_F64S_RM_WriteFMulLd_ReadAfterLd = 362,
14968
    IIC_SSE_MUL_F64S_RR_WriteFMul = 363,
14969
    IIC_SSE_MUL_F32S_RR_WriteFMul = 364,
14970
    IIC_MUL8_WriteIMulLd_WriteIMulH = 365,
14971
    IIC_MUL8_WriteIMul_WriteIMulH = 366,
14972
    WriteFMulLd = 367,
14973
    WriteFMul = 368,
14974
    IIC_SSE_MWAIT_WriteSystem = 369,
14975
    IIC_NOP_WriteZero = 370,
14976
    IIC_OUT_IR_WriteSystem  = 371,
14977
    IIC_OUT_RR_WriteSystem  = 372,
14978
    IIC_OUTS_WriteSystem  = 373,
14979
    IIC_SSE_PABS_RM_WriteVecALULd = 374,
14980
    IIC_SSE_PABS_RR_WriteVecALU = 375,
14981
    IIC_SSE_INTALU_P_RM_WriteVecALULd_ReadAfterLd = 376,
14982
    IIC_SSE_INTALU_P_RR_WriteVecALU = 377,
14983
    IIC_SSE_INTALUQ_P_RM_WriteVecALULd_ReadAfterLd  = 378,
14984
    IIC_SSE_INTALUQ_P_RR_WriteVecALU  = 379,
14985
    IIC_SSE_PALIGNRM_WriteShuffleLd_ReadAfterLd = 380,
14986
    IIC_SSE_PALIGNRR_WriteShuffle = 381,
14987
    IIC_SSE_BIT_P_RM_WriteVecLogicLd_ReadAfterLd  = 382,
14988
    IIC_SSE_BIT_P_RR_WriteVecLogic  = 383,
14989
    IIC_SSE_PAUSE_WriteNop  = 384,
14990
    IIC_ALU_MEM_WriteVarBlendLd_ReadAfterLd = 385,
14991
    IIC_ALU_NONMEM_WriteVarBlend  = 386,
14992
    IIC_SSE_INTALU_P_RM_WriteBlendLd_ReadAfterLd  = 387,
14993
    IIC_SSE_INTALU_P_RR_WriteBlend  = 388,
14994
    IIC_SSE_PCLMULQDQ_RM_WriteCLMulLd_ReadAfterLd = 389,
14995
    IIC_SSE_PCLMULQDQ_RR_WriteCLMul = 390,
14996
    WriteVecALULd_ReadAfterLd = 391,
14997
    WriteVecALU = 392,
14998
    WritePCmpEStrILd_ReadAfterLd  = 393,
14999
    WritePCmpEStrI  = 394,
15000
    WritePCmpEStrMLd_ReadAfterLd  = 395,
15001
    WritePCmpEStrM  = 396,
15002
    WritePCmpIStrILd_ReadAfterLd  = 397,
15003
    WritePCmpIStrI  = 398,
15004
    WritePCmpIStrMLd_ReadAfterLd  = 399,
15005
    WritePCmpIStrM  = 400,
15006
    WriteShuffleLd_WriteRMW = 401,
15007
    IIC_SSE_PEXTRW_WriteShuffleLd_ReadAfterLd = 402,
15008
    IIC_SSE_PHADDSUBD_RM_WriteVecALULd_ReadAfterLd  = 403,
15009
    IIC_SSE_PHADDSUBD_RR_WriteVecALU  = 404,
15010
    IIC_SSE_PHADDSUBW_RM_WriteVecALULd_ReadAfterLd  = 405,
15011
    IIC_SSE_PHADDSUBW_RR_WriteVecALU  = 406,
15012
    WriteVecIMulLd  = 407,
15013
    WriteVecIMul  = 408,
15014
    IIC_SSE_PINSRW_WriteShuffleLd_ReadAfterLd = 409,
15015
    IIC_SSE_PINSRW_WriteShuffle = 410,
15016
    WriteVecIMulLd_ReadAfterLd  = 411,
15017
    IIC_SSE_PMADD_WriteVecIMulLd_ReadAfterLd  = 412,
15018
    IIC_SSE_PMADD_WriteVecIMul  = 413,
15019
    IIC_SSE_INTALU_P_RM_WriteShuffleLd  = 414,
15020
    IIC_SSE_INTALU_P_RR_WriteShuffle  = 415,
15021
    IIC_SSE_INTMUL_P_RM_WriteVecIMulLd_ReadAfterLd  = 416,
15022
    IIC_SSE_INTMUL_P_RR_WriteVecIMul  = 417,
15023
    IIC_POP_REG16_WriteLoad = 418,
15024
    IIC_POP_MEM_WriteLoad = 419,
15025
    IIC_POP_REG_WriteLoad = 420,
15026
    IIC_POP_A_WriteLoad = 421,
15027
    IIC_SSE_POPCNT_RM_WriteFAddLd = 422,
15028
    IIC_SSE_POPCNT_RR_WriteFAdd = 423,
15029
    IIC_POP_SR_WriteSystem  = 424,
15030
    IIC_POP_F_WriteLoad = 425,
15031
    IIC_POP_FD_WriteLoad  = 426,
15032
    IIC_POP_SR_SS_WriteSystem = 427,
15033
    IIC_SSE_PSHUFB_RM_WriteShuffleLd_ReadAfterLd  = 428,
15034
    IIC_SSE_PSHUFB_RR_WriteShuffle  = 429,
15035
    IIC_SSE_PSHUF_MI_WriteShuffleLd_ReadAfterLd = 430,
15036
    IIC_SSE_PSHUF_RI_WriteShuffle = 431,
15037
    IIC_SSE_PSIGN_RM_WriteVecALULd_ReadAfterLd  = 432,
15038
    IIC_SSE_PSIGN_RR_WriteVecALU  = 433,
15039
    IIC_SSE_INTSHDQ_P_RI_WriteVecShift  = 434,
15040
    IIC_SSE_INTSH_P_RI_WriteVecShift  = 435,
15041
    IIC_SSE_INTSH_P_RM_WriteVecShiftLd_ReadAfterLd  = 436,
15042
    IIC_SSE_INTSH_P_RR_WriteVecShift  = 437,
15043
    IIC_SSE_UNPCK_WriteShuffleLd_ReadAfterLd  = 438,
15044
    IIC_SSE_UNPCK_WriteShuffle  = 439,
15045
    IIC_PUSH_IMM_WriteStore = 440,
15046
    IIC_PUSH_REG_WriteStore = 441,
15047
    IIC_PUSH_MEM_WriteRMW = 442,
15048
    IIC_PUSH_A_WriteStore = 443,
15049
    IIC_PUSH_SR_WriteSystem = 444,
15050
    IIC_PUSH_CS_WriteSystem = 445,
15051
    IIC_PUSH_F_WriteStore = 446,
15052
    IIC_SR_WriteShiftLd_WriteRMW  = 447,
15053
    IIC_SR_WriteShift = 448,
15054
    IIC_SSE_RCPP_RM_WriteFRcpLd = 449,
15055
    IIC_SSE_RCPP_RR_WriteFRcp = 450,
15056
    IIC_SSE_RCPS_RM_WriteFRcpLd_ReadAfterLd = 451,
15057
    WriteFRcpLd_ReadAfterLd = 452,
15058
    IIC_SSE_RCPS_RR_WriteFRcp = 453,
15059
    WriteRMW  = 454,
15060
    IIC_RDMSR_WriteSystem = 455,
15061
    IIC_RDPMC_WriteSystem = 456,
15062
    IIC_RDTSC_WriteSystem = 457,
15063
    IIC_REP_MOVS_WriteMicrocoded  = 458,
15064
    IIC_REP_STOS_WriteMicrocoded  = 459,
15065
    IIC_RET_IMM_WriteJumpLd = 460,
15066
    WriteShiftLd  = 461,
15067
    WriteShift  = 462,
15068
    IIC_SSE_ROUNDPS_REG_WriteFAddLd = 463,
15069
    IIC_SSE_ROUNDPS_REG_WriteFAdd = 464,
15070
    IIC_SSE_ROUNDPS_MEM_WriteFAddLd = 465,
15071
    WriteFAddLd_ReadAfterLd = 466,
15072
    IIC_RSM_WriteSystem = 467,
15073
    IIC_SSE_RSQRTPS_RM_WriteFRsqrtLd  = 468,
15074
    IIC_SSE_RSQRTPS_RR_WriteFRsqrt  = 469,
15075
    IIC_SSE_RSQRTSS_RM_WriteFRsqrtLd_ReadAfterLd  = 470,
15076
    WriteFRsqrtLd_ReadAfterLd = 471,
15077
    IIC_SSE_RSQRTSS_RR_WriteFRsqrt  = 472,
15078
    WriteShiftLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd  = 473,
15079
    IIC_SCAS_WriteMicrocoded  = 474,
15080
    IIC_SET_M_WriteALU_WriteStore = 475,
15081
    IIC_SET_R_WriteALU  = 476,
15082
    IIC_SSE_SFENCE_WriteFence = 477,
15083
    IIC_SGDT_WriteSystem  = 478,
15084
    IIC_SHD16_MEM_CL_WriteShiftLd_WriteRMW  = 479,
15085
    IIC_SHD16_MEM_IM_WriteShiftLd_WriteRMW  = 480,
15086
    IIC_SHD16_REG_CL_WriteShift = 481,
15087
    IIC_SHD16_REG_IM_WriteShift = 482,
15088
    IIC_SHD32_MEM_CL_WriteShiftLd_WriteRMW  = 483,
15089
    IIC_SHD32_MEM_IM_WriteShiftLd_WriteRMW  = 484,
15090
    IIC_SHD32_REG_CL_WriteShift = 485,
15091
    IIC_SHD32_REG_IM_WriteShift = 486,
15092
    IIC_SHD64_MEM_CL_WriteShiftLd_WriteRMW  = 487,
15093
    IIC_SHD64_MEM_IM_WriteShiftLd_WriteRMW  = 488,
15094
    IIC_SHD64_REG_CL_WriteShift = 489,
15095
    IIC_SHD64_REG_IM_WriteShift = 490,
15096
    IIC_SSE_SHUFP_WriteFShuffleLd_ReadAfterLd = 491,
15097
    IIC_SSE_SHUFP_WriteFShuffle = 492,
15098
    IIC_SIDT_WriteSystem  = 493,
15099
    IIC_SLDT_WriteSystem  = 494,
15100
    IIC_SMSW_WriteSystem  = 495,
15101
    IIC_SSE_SQRTPD_RM_WriteFSqrtLd  = 496,
15102
    IIC_SSE_SQRTPD_RR_WriteFSqrt  = 497,
15103
    IIC_SSE_SQRTPS_RM_WriteFSqrtLd  = 498,
15104
    IIC_SSE_SQRTPS_RR_WriteFSqrt  = 499,
15105
    IIC_SSE_SQRTSD_RM_WriteFSqrtLd_ReadAfterLd  = 500,
15106
    WriteFSqrtLd_ReadAfterLd  = 501,
15107
    IIC_SSE_SQRTSD_RR_WriteFSqrt  = 502,
15108
    IIC_SSE_SQRTSS_RM_WriteFSqrtLd_ReadAfterLd  = 503,
15109
    IIC_SSE_SQRTSS_RR_WriteFSqrt  = 504,
15110
    WriteFSqrt  = 505,
15111
    IIC_STC_WriteALU  = 506,
15112
    IIC_STD_WriteALU  = 507,
15113
    IIC_STI_WriteALU  = 508,
15114
    IIC_SSE_STMXCSR_WriteStore  = 509,
15115
    IIC_STOS_WriteMicrocoded  = 510,
15116
    IIC_STR_WriteSystem = 511,
15117
    IIC_FST80_WriteStore  = 512,
15118
    IIC_FST_WriteMove = 513,
15119
    IIC_SWAPGS_WriteSystem  = 514,
15120
    IIC_SYSCALL_WriteSystem = 515,
15121
    IIC_SYS_ENTER_EXIT_WriteSystem  = 516,
15122
    IIC_JMP_REL_WriteJumpLd = 517,
15123
    IIC_JMP_MEM_WriteJump = 518,
15124
    IIC_JMP_REG_WriteJumpLd = 519,
15125
    WriteJump = 520,
15126
    IIC_FUCOMI_WriteFAdd  = 521,
15127
    IIC_FUCOM_WriteFAdd = 522,
15128
    IIC_SSE_UNPCK_WriteFShuffleLd_ReadAfterLd = 523,
15129
    IIC_SSE_UNPCK_WriteFShuffle = 524,
15130
    IIC_SSE_ALU_F64S_RR = 525,
15131
    IIC_SSE_ALU_F32S_RR = 526,
15132
    WriteFVarBlendLd_ReadAfterLd  = 527,
15133
    WriteFVarBlend  = 528,
15134
    WriteFShuffleLd = 529,
15135
    WriteFShuffle256  = 530,
15136
    WriteFShuffle = 531,
15137
    IIC_SSE_ALU_F32P_RM = 532,
15138
    WriteCvtF2ILd = 533,
15139
    WriteCvtF2I = 534,
15140
    WriteCvtF2FLd = 535,
15141
    WriteCvtF2F = 536,
15142
    WriteCvtF2FLd_WriteRMW  = 537,
15143
    WriteCvtF2FLd_ReadAfterLd = 538,
15144
    WriteCvtI2FLd_ReadAfterLd = 539,
15145
    IIC_VERR_WriteSystem  = 540,
15146
    IIC_VERW_REG_WriteSystem  = 541,
15147
    IIC_VERW_MEM_WriteSystem  = 542,
15148
    WriteStore  = 543,
15149
    WriteShuffle256 = 544,
15150
    IIC_ALU_MEM_WriteFBlendLd_WriteRMW  = 545,
15151
    WriteFShuffleLd_ReadAfterLd = 546,
15152
    WriteShuffle256Ld_ReadAfterLd = 547,
15153
    IIC_ALU_MEM_WriteFShuffleLd_ReadAfterLd = 548,
15154
    IIC_ALU_NONMEM_WriteFShuffle  = 549,
15155
    IIC_SSE_MOVDQ = 550,
15156
    IIC_SSE_MOV_LH  = 551,
15157
    IIC_SSE_MOVD_ToGP = 552,
15158
    IIC_SSE_MOV_S_MR  = 553,
15159
    IIC_SSE_MOV_S_RM  = 554,
15160
    IIC_SSE_MOV_S_RR  = 555,
15161
    IIC_SSE_MOVQ_RR = 556,
15162
    IIC_ALU_MEM_WriteMPSADLd_ReadAfterLd  = 557,
15163
    IIC_ALU_NONMEM_WriteMPSAD = 558,
15164
    WriteVecALULd = 559,
15165
    WriteBlendLd_ReadAfterLd  = 560,
15166
    WriteBlend  = 561,
15167
    WriteVarBlendLd_ReadAfterLd = 562,
15168
    WriteVarBlend = 563,
15169
    IIC_ALU_MEM_WriteBlendLd_ReadAfterLd  = 564,
15170
    IIC_ALU_NONMEM_WriteBlend = 565,
15171
    WriteCLMulLd_ReadAfterLd  = 566,
15172
    WriteCLMul  = 567,
15173
    IIC_SSE_ALU_F32P_RR = 568,
15174
    WriteFShuffle256Ld_ReadAfterLd  = 569,
15175
    IIC_ALU_MEM_WriteShuffleLd  = 570,
15176
    IIC_ALU_NONMEM_WriteShuffle = 571,
15177
    WriteVarVecShift_ReadAfterLd  = 572,
15178
    WriteVarVecShift  = 573,
15179
    IIC_SSE_PSHUF_MI_WriteShuffleLd = 574,
15180
    WriteVecShift = 575,
15181
    WriteVarVecShiftLd_ReadAfterLd  = 576,
15182
    WriteFRcpLd = 577,
15183
    WriteFRsqrtLd = 578,
15184
    WriteFSqrtLd  = 579,
15185
    IIC_WAIT_WriteMicrocoded  = 580,
15186
    IIC_WRMSR_WriteSystem = 581,
15187
    IIC_XADD_MEM_WriteALULd_WriteRMW  = 582,
15188
    IIC_XADD_REG_WriteALU = 583,
15189
    IIC_XCHG_REG_WriteALU = 584,
15190
    IIC_XCHG_MEM_WriteALULd_WriteRMW  = 585,
15191
    IIC_FXCH_WriteMove  = 586,
15192
    IIC_XLAT_WriteLoad  = 587,
15193
    MOV16rm = 588,
15194
    MOVSX32rm16_MOVSX32rm8  = 589,
15195
    MOVZX32rm16_MOVZX32rm8  = 590,
15196
    CMOVA16rr_CMOVAE16rr_CMOVB16rr_CMOVBE16rr_CMOVE16rr_CMOVG16rr_CMOVGE16rr_CMOVL16rr_CMOVLE16rr_CMOVNE16rr_CMOVNO16rr_CMOVNP16rr_CMOVNS16rr_CMOVO16rr_CMOVP16rr_CMOVS16rr = 591,
15197
    CMOVA32rr_CMOVA64rr_CMOVAE32rr_CMOVAE64rr_CMOVB32rr_CMOVB64rr_CMOVBE32rr_CMOVBE64rr_CMOVE32rr_CMOVE64rr_CMOVG32rr_CMOVG64rr_CMOVGE32rr_CMOVGE64rr_CMOVL32rr_CMOVL64rr_CMOVLE32rr_CMOVLE64rr_CMOVNE32rr_CMOVNE64rr_CMOVNO32rr_CMOVNO64rr_CMOVNP32rr_CMOVNP64rr_CMOVNS32rr_CMOVNS64rr_CMOVO32rr_CMOVO64rr_CMOVP32rr_CMOVP64rr_CMOVS32rr_CMOVS64rr = 592,
15198
    CMOVA16rm_CMOVAE16rm_CMOVB16rm_CMOVBE16rm_CMOVE16rm_CMOVG16rm_CMOVGE16rm_CMOVL16rm_CMOVLE16rm_CMOVNE16rm_CMOVNO16rm_CMOVNP16rm_CMOVNS16rm_CMOVO16rm_CMOVP16rm_CMOVS16rm = 593,
15199
    CMOVA32rm_CMOVA64rm_CMOVAE32rm_CMOVAE64rm_CMOVB32rm_CMOVB64rm_CMOVBE32rm_CMOVBE64rm_CMOVE32rm_CMOVE64rm_CMOVG32rm_CMOVG64rm_CMOVGE32rm_CMOVGE64rm_CMOVL32rm_CMOVL64rm_CMOVLE32rm_CMOVLE64rm_CMOVNE32rm_CMOVNE64rm_CMOVNO32rm_CMOVNO64rm_CMOVNP32rm_CMOVNP64rm_CMOVNS32rm_CMOVNS64rm_CMOVO32rm_CMOVO64rm_CMOVP32rm_CMOVP64rm_CMOVS32rm_CMOVS64rm = 594,
15200
    XCHG16ar_XCHG16rr_XCHG32ar_XCHG32ar64_XCHG32rr_XCHG64ar_XCHG64rr_XCHG8rr  = 595,
15201
    XCHG16rm_XCHG32rm_XCHG64rm_XCHG8rm  = 596,
15202
    XLAT  = 597,
15203
    PUSH16rmm_PUSH32rmm = 598,
15204
    PUSHF16_PUSHF32 = 599,
15205
    PUSHA16_PUSHA32 = 600,
15206
    POP16rmm_POP32rmm = 601,
15207
    POPF16  = 602,
15208
    POPF32  = 603,
15209
    POPA16_POPA32 = 604,
15210
    LAHF_SAHF = 605,
15211
    BSWAP32r  = 606,
15212
    BSWAP64r  = 607,
15213
    MOVBE16rm_MOVBE64rm = 608,
15214
    MOVBE32rm = 609,
15215
    MOVBE16mr = 610,
15216
    MOVBE32mr = 611,
15217
    MOVBE64mr = 612,
15218
    ADD16mi_ADD16mi8_ADD16mr_ADD32mi_ADD32mi8_ADD32mr_ADD64mi32_ADD64mi8_ADD64mr_ADD8mi_ADD8mi8_ADD8mr_SUB16mi_SUB16mi8_SUB16mr_SUB32mi_SUB32mi8_SUB32mr_SUB64mi32_SUB64mi8_SUB64mr_SUB8mi_SUB8mi8_SUB8mr = 613,
15219
    ADC16ri_ADC16ri8_ADC16rr_ADC16rr_REV_ADC32ri_ADC32ri8_ADC32rr_ADC32rr_REV_ADC64ri32_ADC64ri8_ADC64rr_ADC64rr_REV_ADC8ri_ADC8ri8_ADC8rr_ADC8rr_REV_SBB16ri_SBB16ri8_SBB16rr_SBB16rr_REV_SBB32ri_SBB32ri8_SBB32rr_SBB32rr_REV_SBB64ri32_SBB64ri8_SBB64rr_SBB64rr_REV_SBB8ri_SBB8ri8_SBB8rr_SBB8rr_REV = 614,
15220
    ADC16rm_ADC32rm_ADC64rm_ADC8rm_SBB16rm_SBB32rm_SBB64rm_SBB8rm = 615,
15221
    ADC16mi_ADC16mi8_ADC16mr_ADC32mi_ADC32mi8_ADC32mr_ADC64mi32_ADC64mi8_ADC64mr_ADC8mi_ADC8mi8_ADC8mr_SBB16mi_SBB16mi8_SBB16mr_SBB32mi_SBB32mi8_SBB32mr_SBB64mi32_SBB64mi8_SBB64mr_SBB8mi_SBB8mi8_SBB8mr = 616,
15222
    DEC16m_DEC32m_DEC64m_DEC8m_INC16m_INC32m_INC64m_INC8m_NEG16m_NEG32m_NEG64m_NEG8m_NOT16m_NOT32m_NOT64m_NOT8m = 617,
15223
    IMUL16r_IMUL16rr  = 618,
15224
    IMUL16rm  = 619,
15225
    IMUL16rmi_IMUL16rmi8  = 620,
15226
    IMUL16rri_IMUL16rri8  = 621,
15227
    MUL16r  = 622,
15228
    IMUL16m = 623,
15229
    MUL16m  = 624,
15230
    IMUL32r_IMUL32rr  = 625,
15231
    IMUL32rm  = 626,
15232
    IMUL32rmi_IMUL32rmi8  = 627,
15233
    IMUL32rri_IMUL32rri8  = 628,
15234
    MUL32r  = 629,
15235
    IMUL32m = 630,
15236
    MUL32m  = 631,
15237
    IMUL64r_IMUL64rr  = 632,
15238
    IMUL64rm  = 633,
15239
    IMUL64rmi32_IMUL64rmi8  = 634,
15240
    IMUL64rri32_IMUL64rri8  = 635,
15241
    MUL64r  = 636,
15242
    IMUL64m = 637,
15243
    MUL64m  = 638,
15244
    MULX32rr  = 639,
15245
    MULX32rm  = 640,
15246
    MULX64rr  = 641,
15247
    MULX64rm  = 642,
15248
    DIV8r = 643,
15249
    DIV16r  = 644,
15250
    DIV32r  = 645,
15251
    DIV64r  = 646,
15252
    IDIV8r  = 647,
15253
    IDIV16r = 648,
15254
    IDIV32r = 649,
15255
    IDIV64r = 650,
15256
    AND16mi_AND16mi8_AND16mr_AND32mi_AND32mi8_AND32mr_AND64mi32_AND64mi8_AND64mr_AND8mi_AND8mi8_AND8mr_OR16mi_OR16mi8_OR16mr_OR32mi_OR32mi8_OR32mr_OR64mi32_OR64mi8_OR64mr_OR8mi_OR8mi8_OR8mr_XOR16mi_XOR16mi8_XOR16mr_XOR32mi_XOR32mi8_XOR32mr_XOR64mi32_XOR64mi8_XOR64mr_XOR8mi_XOR8mi8_XOR8mr  = 651,
15257
    OR32mrLocked  = 652,
15258
    SAR16m1_SAR16mi_SAR32m1_SAR32mi_SAR64m1_SAR64mi_SAR8m1_SAR8mi_SHL16m1_SHL16mi_SHL32m1_SHL32mi_SHL64m1_SHL64mi_SHL8m1_SHL8mi_SHR16m1_SHR16mi_SHR32m1_SHR32mi_SHR64m1_SHR64mi_SHR8m1_SHR8mi = 653,
15259
    SAR16rCL_SAR32rCL_SAR64rCL_SAR8rCL_SHL16rCL_SHL32rCL_SHL64rCL_SHL8rCL_SHR16rCL_SHR32rCL_SHR64rCL_SHR8rCL  = 654,
15260
    SAR16mCL_SAR32mCL_SAR64mCL_SAR8mCL_SHL16mCL_SHL32mCL_SHL64mCL_SHL8mCL_SHR16mCL_SHR32mCL_SHR64mCL_SHR8mCL  = 655,
15261
    ROL16r1_ROL32r1_ROL64r1_ROL8r1_ROR16r1_ROR32r1_ROR64r1_ROR8r1 = 656,
15262
    ROL16mi_ROL32mi_ROL64mi_ROL8mi_ROR16mi_ROR32mi_ROR64mi_ROR8mi = 657,
15263
    ROL16rCL_ROL32rCL_ROL64rCL_ROL8rCL_ROR16rCL_ROR32rCL_ROR64rCL_ROR8rCL = 658,
15264
    ROL16mCL_ROL32mCL_ROL64mCL_ROL8mCL_ROR16mCL_ROR32mCL_ROR64mCL_ROR8mCL = 659,
15265
    RCL16r1_RCL32r1_RCL64r1_RCL8r1_RCR16r1_RCR32r1_RCR64r1_RCR8r1 = 660,
15266
    RCL16m1_RCL32m1_RCL64m1_RCL8m1_RCR16m1_RCR32m1_RCR64m1_RCR8m1 = 661,
15267
    RCL16rCL_RCL16ri_RCL32rCL_RCL32ri_RCL64rCL_RCL64ri_RCL8rCL_RCL8ri_RCR16rCL_RCR16ri_RCR32rCL_RCR32ri_RCR64rCL_RCR64ri_RCR8rCL_RCR8ri = 662,
15268
    RCL16mCL_RCL16mi_RCL32mCL_RCL32mi_RCL64mCL_RCL64mi_RCL8mCL_RCL8mi_RCR16mCL_RCR16mi_RCR32mCL_RCR32mi_RCR64mCL_RCR64mi_RCR8mCL_RCR8mi = 663,
15269
    SHLD16rri8_SHRD16rri8 = 664,
15270
    SHLD32rri8_SHRD32rri8 = 665,
15271
    SHLD64rri8_SHRD64rri8 = 666,
15272
    SHLD16mri8_SHRD16mri8 = 667,
15273
    SHLD32mri8_SHRD32mri8 = 668,
15274
    SHLD64mri8_SHRD64mri8 = 669,
15275
    SHLD16rrCL  = 670,
15276
    SHLD32rrCL  = 671,
15277
    SHLD64rrCL  = 672,
15278
    SHRD16rrCL  = 673,
15279
    SHRD32rrCL  = 674,
15280
    SHRD64rrCL  = 675,
15281
    SHLD16mrCL_SHRD16mrCL = 676,
15282
    SHLD32mrCL_SHRD32mrCL = 677,
15283
    SHLD64mrCL_SHRD64mrCL = 678,
15284
    BT16ri8_BT32ri8_BT64ri8 = 679,
15285
    BT16rr_BT32rr_BT64rr  = 680,
15286
    BT16mr_BT32mr_BT64mr  = 681,
15287
    BT16mi8_BT32mi8_BT64mi8 = 682,
15288
    BTC16ri8_BTC32ri8_BTC64ri8_BTR16ri8_BTR32ri8_BTR64ri8_BTS16ri8_BTS32ri8_BTS64ri8  = 683,
15289
    BTC16rr_BTC32rr_BTC64rr_BTR16rr_BTR32rr_BTS16rr_BTS32rr_BTS64rr = 684,
15290
    BTR64rr = 685,
15291
    BTC16mr_BTC32mr_BTC64mr_BTR16mr_BTR32mr_BTR64mr_BTS16mr_BTS32mr_BTS64mr = 686,
15292
    BTC16mi8_BTC32mi8_BTC64mi8_BTR16mi8_BTR32mi8_BTR64mi8_BTS16mi8_BTS32mi8_BTS64mi8  = 687,
15293
    BSF16rr_BSF32rr_BSF64rr_BSR16rr_BSR32rr_BSR64rr = 688,
15294
    BSF16rm_BSF32rm_BSF64rm_BSR16rm_BSR32rm_BSR64rm = 689,
15295
    SETAEr_SETAr_SETBEr_SETBr_SETEr_SETGEr_SETGr_SETLEr_SETLr_SETNEr_SETNOr_SETNPr_SETNSr_SETOr_SETPr_SETSr = 690,
15296
    SETAEm_SETAm_SETBEm_SETBm_SETEm_SETGEm_SETGm_SETLEm_SETLm_SETNEm_SETNOm_SETNPm_SETNSm_SETOm_SETPm_SETSm = 691,
15297
    CLD = 692,
15298
    STD = 693,
15299
    TZCNT16rr_TZCNT32rr_TZCNT64rr = 694,
15300
    TZCNT16rm_TZCNT32rm_TZCNT64rm = 695,
15301
    ANDN32rr_ANDN64rr = 696,
15302
    ANDN32rm_ANDN64rm = 697,
15303
    BLSI32rr_BLSI64rr_BLSMSK32rr_BLSMSK64rr_BLSR32rr_BLSR64rr = 698,
15304
    BLSI32rm_BLSI64rm_BLSMSK32rm_BLSMSK64rm_BLSR32rm_BLSR64rm = 699,
15305
    BEXTR32rr_BEXTR64rr = 700,
15306
    BEXTR32rm_BEXTR64rm = 701,
15307
    BZHI32rr_BZHI64rr = 702,
15308
    BZHI32rm_BZHI64rm = 703,
15309
    PDEP32rr_PDEP64rr_PEXT32rr_PEXT64rr = 704,
15310
    PDEP32rm_PDEP64rm_PEXT32rm_PEXT64rm = 705,
15311
    JCXZ_JRCXZ  = 706,
15312
    LOOP  = 707,
15313
    LOOPE = 708,
15314
    LOOPNE  = 709,
15315
    CALL16r_CALL32r = 710,
15316
    CALL16m_CALL32m = 711,
15317
    LRETL_LRETQ_LRETW_RETL_RETQ_RETW  = 712,
15318
    LRETIL_LRETIQ_LRETIW  = 713,
15319
    RETIL_RETIQ_RETIW = 714,
15320
    BOUNDS16rm_BOUNDS32rm = 715,
15321
    INTO  = 716,
15322
    LODSB_LODSW = 717,
15323
    LODSL_LODSQ = 718,
15324
    STOSB_STOSL_STOSQ_STOSW = 719,
15325
    MOVSB_MOVSL_MOVSQ_MOVSW = 720,
15326
    MOVSLDUPrm  = 721,
15327
    MOVSLDUPrr  = 722,
15328
    SCASB_SCASL_SCASQ_SCASW = 723,
15329
    CMPSB_CMPSL_CMPSQ_CMPSW = 724,
15330
    XADD16rm_XADD32rm_XADD64rm_XADD8rm  = 725,
15331
    CMPXCHG16rm_CMPXCHG32rm_CMPXCHG64rm = 726,
15332
    CMPXCHG8rm  = 727,
15333
    CMPXCHG8B = 728,
15334
    CMPXCHG16B  = 729,
15335
    PAUSE = 730,
15336
    LEAVE_LEAVE64 = 731,
15337
    XGETBV  = 732,
15338
    RDTSC = 733,
15339
    RDTSCP  = 734,
15340
    RDPMC = 735,
15341
    RDRAND16r_RDRAND32r_RDRAND64r = 736,
15342
    LD_Frr  = 737,
15343
    LD_F80m = 738,
15344
    FBLDm = 739,
15345
    ST_FPrr_ST_Frr  = 740,
15346
    ST_FP80m  = 741,
15347
    FBSTPm  = 742,
15348
    XCH_F = 743,
15349
    ILD_F16m_ILD_F32m_ILD_F64m  = 744,
15350
    IST_F16m_IST_F32m_IST_FP16m_IST_FP32m = 745,
15351
    LD_F0 = 746,
15352
    LD_F1 = 747,
15353
    FLDPI = 748,
15354
    CMOVBE_F_CMOVBE_Fp32_CMOVBE_Fp64_CMOVBE_Fp80_CMOVB_F_CMOVB_Fp32_CMOVB_Fp64_CMOVB_Fp80_CMOVNBE_F_CMOVNBE_Fp32_CMOVNBE_Fp64_CMOVNBE_Fp80_CMOVNB_F_CMOVNB_Fp32_CMOVNB_Fp64_CMOVNB_Fp80_CMOVNE_F_CMOVNE_Fp32_CMOVNE_Fp64_CMOVNE_Fp80_CMOVNP_F_CMOVNP_Fp32_CMOVNP_Fp64_CMOVNP_Fp80_CMOVP_F_CMOVP_Fp32_CMOVP_Fp64_CMOVP_Fp80  = 749,
15355
    FNSTSW16r = 750,
15356
    FNSTSWm = 751,
15357
    FLDCW16m  = 752,
15358
    FNSTCW16m = 753,
15359
    FDECSTP_FINCSTP = 754,
15360
    FFREE = 755,
15361
    FSAVEm  = 756,
15362
    FRSTORm = 757,
15363
    ABS_F_ABS_Fp32_ABS_Fp64_ABS_Fp80  = 758,
15364
    CHS_F_CHS_Fp32_CHS_Fp64_CHS_Fp80  = 759,
15365
    COMP_FST0r_COM_FST0r  = 760,
15366
    UCOM_FPr_UCOM_Fr  = 761,
15367
    FCOM32m_FCOM64m_FCOMP32m_FCOMP64m = 762,
15368
    FCOMPP  = 763,
15369
    UCOM_FPPr = 764,
15370
    COM_FIPr_COM_FIr  = 765,
15371
    UCOM_FIPr_UCOM_FIr  = 766,
15372
    FICOM16m_FICOM32m_FICOMP16m_FICOMP32m = 767,
15373
    TST_F_TST_Fp32_TST_Fp64_TST_Fp80  = 768,
15374
    FXAM  = 769,
15375
    FPREM = 770,
15376
    FPREM1  = 771,
15377
    FRNDINT = 772,
15378
    FSCALE  = 773,
15379
    FXTRACT = 774,
15380
    FNOP  = 775,
15381
    WAIT  = 776,
15382
    FNCLEX  = 777,
15383
    FNINIT  = 778,
15384
    MMX_MOVD64from64rr_MMX_MOVD64grr  = 779,
15385
    MOVPDI2DIrr_VMOVPDI2DIrr  = 780,
15386
    MMX_MOVD64rr_MMX_MOVD64to64rr = 781,
15387
    MOVDI2PDIrr_VMOVDI2PDIrr  = 782,
15388
    VMOVPQIto64rr = 783,
15389
    VMOV64toPQIrr = 784,
15390
    MMX_MOVQ64rr_MMX_MOVQ64rr_REV = 785,
15391
    MOVDQArr_MOVDQArr_REV_VMOVDQAYrr_VMOVDQAYrr_REV_VMOVDQArr_VMOVDQArr_REV = 786,
15392
    MOVDQUrr_MOVDQUrr_REV_VMOVDQUYrr_VMOVDQUYrr_REV_VMOVDQUrr_VMOVDQUrr_REV = 787,
15393
    MMX_MOVDQ2Qrr = 788,
15394
    MMX_MOVQ2DQrr = 789,
15395
    MMX_PACKSSDWirr_MMX_PACKSSWBirr_MMX_PACKUSWBirr = 790,
15396
    MMX_PACKSSDWirm_MMX_PACKSSWBirm_MMX_PACKUSWBirm = 791,
15397
    VPMOVSXBQYrr_VPMOVSXBWYrr_VPMOVSXDQYrr_VPMOVZXBQYrr_VPMOVZXBWYrr_VPMOVZXDQYrr = 792,
15398
    PBLENDWrri  = 793,
15399
    VPBLENDWYrri_VPBLENDWrri  = 794,
15400
    PBLENDWrmi  = 795,
15401
    VPBLENDWYrmi_VPBLENDWrmi  = 796,
15402
    VPBLENDDYrri_VPBLENDDrri  = 797,
15403
    VPBLENDDYrmi_VPBLENDDrmi  = 798,
15404
    MMX_MASKMOVQ_MMX_MASKMOVQ64 = 799,
15405
    MASKMOVDQU_MASKMOVDQU64_VMASKMOVDQU_VMASKMOVDQU64 = 800,
15406
    VPMASKMOVDYrm_VPMASKMOVDrm_VPMASKMOVQYrm_VPMASKMOVQrm = 801,
15407
    VPMASKMOVDYmr_VPMASKMOVDmr_VPMASKMOVQYmr_VPMASKMOVQmr = 802,
15408
    MMX_PMOVMSKBrr  = 803,
15409
    PMOVMSKBrr_VPMOVMSKBrr  = 804,
15410
    VPMOVMSKBYrr  = 805,
15411
    MMX_PEXTRWirri  = 806,
15412
    PEXTRBrr_PEXTRDrr_PEXTRQrr_PEXTRWrr_REV = 807,
15413
    PEXTRBmr_PEXTRDmr_PEXTRQmr_PEXTRWmr = 808,
15414
    VPBROADCASTBrm_VPBROADCASTWrm = 809,
15415
    VPBROADCASTBYrm_VPBROADCASTWYrm = 810,
15416
    VPGATHERDDrm  = 811,
15417
    VPGATHERDDYrm = 812,
15418
    VPGATHERQDrm  = 813,
15419
    VPGATHERQDYrm = 814,
15420
    VPGATHERDQrm  = 815,
15421
    VPGATHERDQYrm = 816,
15422
    VPGATHERQQrm  = 817,
15423
    VPGATHERQQYrm = 818,
15424
    MMX_PHADDSWrr64_MMX_PHADDWrr64_MMX_PHSUBSWrr64_MMX_PHSUBWrr64 = 819,
15425
    MMX_PHADDrr64_MMX_PHSUBDrr64  = 820,
15426
    PHADDDrr_PHSUBDrr_VPHADDDrr_VPHSUBDrr = 821,
15427
    PHADDSWrr128_PHSUBSWrr128_VPHADDSWrr128_VPHADDSWrr256_VPHSUBSWrr128_VPHSUBSWrr256 = 822,
15428
    PHADDWrr_PHSUBWrr_VPHADDDYrr_VPHADDWYrr_VPHADDWrr_VPHSUBDYrr_VPHSUBWYrr_VPHSUBWrr = 823,
15429
    MMX_PHADDSWrm64_MMX_PHADDWrm64_MMX_PHSUBSWrm64_MMX_PHSUBWrm64 = 824,
15430
    MMX_PHADDrm64_MMX_PHSUBDrm64  = 825,
15431
    PHADDDrm_PHSUBDrm_VPHADDDrm_VPHSUBDrm = 826,
15432
    PHADDSWrm128_PHSUBSWrm128_VPHADDSWrm128_VPHADDSWrm256_VPHSUBSWrm128_VPHSUBSWrm256 = 827,
15433
    PHADDWrm_PHSUBWrm_VPHADDDYrm_VPHADDWYrm_VPHADDWrm_VPHSUBDYrm_VPHSUBWYrm_VPHSUBWrm = 828,
15434
    PCMPGTQrr_VPCMPGTQYrr_VPCMPGTQrr  = 829,
15435
    PCMPGTQrm_VPCMPGTQYrm_VPCMPGTQrm  = 830,
15436
    PMULLDrr_VPMULLDYrr_VPMULLDrr = 831,
15437
    PMULLDrm_VPMULLDYrm_VPMULLDrm = 832,
15438
    PTESTrr_VPTESTYrr_VPTESTrr  = 833,
15439
    PTESTrm_VPTESTYrm_VPTESTrm  = 834,
15440
    PSLLDrr_PSLLQrr_PSLLWrr_PSRADrr_PSRAWrr_PSRLDrr_PSRLQrr_PSRLWrr_VPSLLDYrr_VPSLLDrr_VPSLLQYrr_VPSLLQrr_VPSLLWYrr_VPSLLWrr_VPSRADYrr_VPSRADrr_VPSRAWYrr_VPSRAWrr_VPSRLDYrr_VPSRLDrr_VPSRLQYrr_VPSRLQrr_VPSRLWYrr_VPSRLWrr = 835,
15441
    PSLLDQri_PSRLDQri = 836,
15442
    VPSLLDQYri_VPSLLDQri_VPSRLDQYri_VPSRLDQri = 837,
15443
    MMX_EMMS  = 838,
15444
    MOVMSKPDrr_MOVMSKPSrr_VMOVMSKPDrr_VMOVMSKPSrr = 839,
15445
    VMOVMSKPDYrr_VMOVMSKPSYrr = 840,
15446
    VPERM2F128rr  = 841,
15447
    VPERM2F128rm  = 842,
15448
    BLENDVPDrr0_BLENDVPSrr0 = 843,
15449
    BLENDVPDrm0_BLENDVPSrm0 = 844,
15450
    VBROADCASTF128  = 845,
15451
    EXTRACTPSrr = 846,
15452
    VEXTRACTPSrr  = 847,
15453
    EXTRACTPSmr = 848,
15454
    VEXTRACTPSmr  = 849,
15455
    VEXTRACTF128rr  = 850,
15456
    VEXTRACTF128mr  = 851,
15457
    VINSERTF128rr = 852,
15458
    VINSERTF128rm = 853,
15459
    VMASKMOVPDYrm_VMASKMOVPDrm_VMASKMOVPSYrm_VMASKMOVPSrm = 854,
15460
    VMASKMOVPDmr_VMASKMOVPSmr = 855,
15461
    VMASKMOVPDYmr_VMASKMOVPSYmr = 856,
15462
    VGATHERDPSrm  = 857,
15463
    VGATHERDPSYrm = 858,
15464
    VGATHERQPSrm  = 859,
15465
    VGATHERQPSYrm = 860,
15466
    VGATHERDPDrm  = 861,
15467
    VGATHERDPDYrm = 862,
15468
    VGATHERQPDrm  = 863,
15469
    VGATHERQPDYrm = 864,
15470
    CVTPD2PSrr_VCVTPD2PSrr  = 865,
15471
    CVTPD2PSrm_VCVTPD2PSXrm = 866,
15472
    VCVTPD2PSYrr  = 867,
15473
    VCVTPD2PSYrm  = 868,
15474
    CVTSD2SSrr_Int_CVTSD2SSrr_Int_VCVTSD2SSrr_VCVTSD2SSrr = 869,
15475
    CVTSD2SSrm  = 870,
15476
    Int_CVTSD2SSrm_Int_VCVTSD2SSrm_VCVTSD2SSrm  = 871,
15477
    CVTPS2PDrr_VCVTPS2PDrr  = 872,
15478
    CVTPS2PDrm_VCVTPS2PDYrm_VCVTPS2PDrm = 873,
15479
    VCVTPS2PDYrr  = 874,
15480
    CVTSS2SDrr_Int_CVTSS2SDrr_Int_VCVTSS2SDrr_VCVTSS2SDrr = 875,
15481
    CVTSS2SDrm  = 876,
15482
    Int_CVTSS2SDrm_Int_VCVTSS2SDrm_VCVTSS2SDrm  = 877,
15483
    CVTDQ2PDrr  = 878,
15484
    VCVTDQ2PDrr = 879,
15485
    VCVTDQ2PDYrr  = 880,
15486
    CVTPD2DQrr_CVTTPD2DQrr_VCVTTPD2DQrr = 881,
15487
    VCVTPD2DQrr = 882,
15488
    CVTPD2DQrm_CVTTPD2DQrm  = 883,
15489
    VCVTPD2DQYrr  = 884,
15490
    VCVTTPD2DQYrr = 885,
15491
    VCVTPD2DQYrm  = 886,
15492
    VCVTTPD2DQYrm = 887,
15493
    MMX_CVTPS2PIirr_MMX_CVTTPS2PIirr  = 888,
15494
    MMX_CVTPI2PDirr = 889,
15495
    MMX_CVTPD2PIirr_MMX_CVTTPD2PIirr  = 890,
15496
    CVTSI2SS64rr_CVTSI2SSrr_Int_CVTSI2SS64rr_Int_CVTSI2SSrr_Int_VCVTSI2SS64rr_Int_VCVTSI2SSrr = 891,
15497
    VCVTSI2SS64rr_VCVTSI2SSrr = 892,
15498
    CVTSS2SI64rr_CVTTSS2SI64rr_Int_CVTTSS2SI64rr_Int_VCVTTSS2SI64rr_VCVTSS2SI64rr_VCVTTSS2SI64rr  = 893,
15499
    CVTSS2SIrr_CVTTSS2SIrr_Int_CVTTSS2SIrr_Int_VCVTTSS2SIrr_VCVTSS2SIrr_VCVTTSS2SIrr  = 894,
15500
    CVTSS2SI64rm_CVTTSS2SI64rm_Int_CVTTSS2SI64rm_Int_VCVTTSS2SI64rm_VCVTSS2SI64rm_VCVTTSS2SI64rm  = 895,
15501
    CVTSS2SIrm_CVTTSS2SIrm_Int_CVTTSS2SIrm_Int_VCVTTSS2SIrm_VCVTSS2SIrm_VCVTTSS2SIrm  = 896,
15502
    CVTSD2SI64rr_CVTSD2SIrr_CVTTSD2SI64rr_CVTTSD2SIrr_Int_CVTTSD2SI64rr_Int_CVTTSD2SIrr_Int_VCVTTSD2SI64rr_Int_VCVTTSD2SIrr_VCVTSD2SI64rr_VCVTSD2SIrr_VCVTTSD2SI64rr_VCVTTSD2SIrr = 897,
15503
    CVTSD2SI64rm_CVTSD2SIrm_CVTTSD2SI64rm_CVTTSD2SIrm_Int_CVTTSD2SI64rm_Int_CVTTSD2SIrm_Int_VCVTTSD2SI64rm_Int_VCVTTSD2SIrm_VCVTSD2SI64rm_VCVTSD2SIrm_VCVTTSD2SI64rm_VCVTTSD2SIrm = 898,
15504
    VCVTPS2PHYrr_VCVTPS2PHrr  = 899,
15505
    VCVTPS2PHYmr_VCVTPS2PHmr  = 900,
15506
    VCVTPH2PSYrr_VCVTPH2PSrr  = 901,
15507
    HADDPDrr_HADDPSrr_HSUBPDrr_HSUBPSrr_VHADDPDYrr_VHADDPDrr_VHADDPSYrr_VHADDPSrr_VHSUBPDYrr_VHSUBPDrr_VHSUBPSYrr_VHSUBPSrr = 902,
15508
    HADDPDrm_HADDPSrm_HSUBPDrm_HSUBPSrm_VHADDPDYrm_VHADDPDrm_VHADDPSYrm_VHADDPSrm_VHSUBPDYrm_VHSUBPDrm_VHSUBPSYrm_VHSUBPSrm = 903,
15509
    MULPDrr_VMULPDrr  = 904,
15510
    MULPSrr_VMULPSrr  = 905,
15511
    MULSDrr_MULSDrr_Int_VMULSDrr_VMULSDrr_Int = 906,
15512
    MULSSrr_MULSSrr_Int_VMULSSrr_VMULSSrr_Int = 907,
15513
    MULPDrm_MULPSrm_VMULPDrm_VMULPSrm = 908,
15514
    MULSDrm_MULSDrm_Int_MULSSrm_MULSSrm_Int_VMULSDrm_VMULSDrm_Int_VMULSSrm_VMULSSrm_Int = 909,
15515
    VDIVPSYrr = 910,
15516
    VDIVPSYrm = 911,
15517
    VDIVPDYrr = 912,
15518
    VDIVPDYrm = 913,
15519
    VRCPPSYr  = 914,
15520
    VRCPPSYm  = 915,
15521
    ROUNDPDr_ROUNDPSr_VROUNDPDr_VROUNDPSr_VROUNDYPDr_VROUNDYPSr = 916,
15522
    ROUNDSDr_ROUNDSDr_Int_ROUNDSSr_ROUNDSSr_Int_VROUNDSDr_VROUNDSDr_Int_VROUNDSSr_VROUNDSSr_Int = 917,
15523
    ROUNDPDm_VROUNDPDm_VROUNDYPDm = 918,
15524
    ROUNDPSm_VROUNDPSm_VROUNDYPSm = 919,
15525
    ROUNDSDm_ROUNDSSm_VROUNDSDm_VROUNDSSm = 920,
15526
    DPPSrri_VDPPSYrri_VDPPSrri  = 921,
15527
    DPPSrmi_VDPPSYrmi_VDPPSrmi  = 922,
15528
    DPPDrri = 923,
15529
    VDPPDrri  = 924,
15530
    DPPDrmi_VDPPDrmi  = 925,
15531
    VFMADDPD4rr_VFMADDPD4rrY_VFMADDPD4rrY_REV_VFMADDPD4rr_REV_VFMADDPDr132r_VFMADDPDr132rY_VFMADDPDr213r_VFMADDPDr213rY_VFMADDPDr231r_VFMADDPDr231rY_VFMADDPS4rr_VFMADDPS4rrY_VFMADDPS4rrY_REV_VFMADDPS4rr_REV_VFMADDPSr132r_VFMADDPSr132rY_VFMADDPSr213r_VFMADDPSr213rY_VFMADDPSr231r_VFMADDPSr231rY_VFMADDSD4rr_VFMADDSD4rr_Int_VFMADDSD4rr_REV_VFMADDSDr132r_VFMADDSDr132r_Int_VFMADDSDr213r_VFMADDSDr213r_Int_VFMADDSDr231r_VFMADDSDr231r_Int_VFMADDSS4rr_VFMADDSS4rr_Int_VFMADDSS4rr_REV_VFMADDSSr132r_VFMADDSSr132r_Int_VFMADDSSr213r_VFMADDSSr213r_Int_VFMADDSSr231r_VFMADDSSr231r_Int_VFMADDSUBPDr132r_VFMADDSUBPDr132rY_VFMADDSUBPDr213r_VFMADDSUBPDr213rY_VFMADDSUBPDr231r_VFMADDSUBPDr231rY_VFMADDSUBPSr132r_VFMADDSUBPSr132rY_VFMADDSUBPSr213r_VFMADDSUBPSr213rY_VFMADDSUBPSr231r_VFMADDSUBPSr231rY_VFMSUBADDPDr132r_VFMSUBADDPDr132rY_VFMSUBADDPDr213r_VFMSUBADDPDr213rY_VFMSUBADDPDr231r_VFMSUBADDPDr231rY_VFMSUBADDPSr132r_VFMSUBADDPSr132rY_VFMSUBADDPSr213r_VFMSUBADDPSr213rY_VFMSUBADDPSr231r_VFMSUBADDPSr231rY_VFMSUBPD4rr_VFMSUBPD4rrY_VFMSUBPD4rrY_REV_VFMSUBPD4rr_REV_VFMSUBPDr132r_VFMSUBPDr132rY_VFMSUBPDr213r_VFMSUBPDr213rY_VFMSUBPDr231r_VFMSUBPDr231rY_VFMSUBPS4rr_VFMSUBPS4rrY_VFMSUBPS4rrY_REV_VFMSUBPS4rr_REV_VFMSUBPSr132r_VFMSUBPSr132rY_VFMSUBPSr213r_VFMSUBPSr213rY_VFMSUBPSr231r_VFMSUBPSr231rY_VFMSUBSD4rr_VFMSUBSD4rr_Int_VFMSUBSD4rr_REV_VFMSUBSDr132r_VFMSUBSDr132r_Int_VFMSUBSDr213r_VFMSUBSDr213r_Int_VFMSUBSDr231r_VFMSUBSDr231r_Int_VFMSUBSS4rr_VFMSUBSS4rr_Int_VFMSUBSS4rr_REV_VFMSUBSSr132r_VFMSUBSSr132r_Int_VFMSUBSSr213r_VFMSUBSSr213r_Int_VFMSUBSSr231r_VFMSUBSSr231r_Int_VFNMADDPD4rr_VFNMADDPD4rrY_VFNMADDPD4rrY_REV_VFNMADDPD4rr_REV_VFNMADDPDr132r_VFNMADDPDr132rY_VFNMADDPDr213r_VFNMADDPDr213rY_VFNMADDPDr231r_VFNMADDPDr231rY_VFNMADDPS4rr_VFNMADDPS4rrY_VFNMADDPS4rrY_REV_VFNMADDPS4rr_REV_VFNMADDPSr132r_VFNMADDPSr132rY_VFNMADDPSr213r_VFNMADDPSr213rY_VFNMADDPSr231r_VFNMADDPSr231rY_VFNMADDSD4rr_VFNMADDSD4rr_Int_VFNMADDSD4rr_REV_VFNMADDSDr132r_VFNMADDSDr132r_Int_VFNMADDSDr213r_VFNMADDSDr213r_Int_VFNMADDSDr231r_VFNMADDSDr231r_Int_VFNMADDSS4rr_VFNMADDSS4rr_Int_VFNMADDSS4rr_REV_VFNMADDSSr132r_VFNMADDSSr132r_Int_VFNMADDSSr213r_VFNMADDSSr213r_Int_VFNMADDSSr231r_VFNMADDSSr231r_Int_VFNMSUBPD4rr_VFNMSUBPD4rrY_VFNMSUBPD4rrY_REV_VFNMSUBPD4rr_REV_VFNMSUBPDr132r_VFNMSUBPDr132rY_VFNMSUBPDr213r_VFNMSUBPDr213rY_VFNMSUBPDr231r_VFNMSUBPDr231rY_VFNMSUBPS4rr_VFNMSUBPS4rrY_VFNMSUBPS4rrY_REV_VFNMSUBPS4rr_REV_VFNMSUBPSr132r_VFNMSUBPSr132rY_VFNMSUBPSr213r_VFNMSUBPSr213rY_VFNMSUBPSr231r_VFNMSUBPSr231rY_VFNMSUBSD4rr_VFNMSUBSD4rr_Int_VFNMSUBSD4rr_REV_VFNMSUBSDr132r_VFNMSUBSDr132r_Int_VFNMSUBSDr213r_VFNMSUBSDr213r_Int_VFNMSUBSDr231r_VFNMSUBSDr231r_Int_VFNMSUBSS4rr_VFNMSUBSS4rr_Int_VFNMSUBSS4rr_REV_VFNMSUBSSr132r_VFNMSUBSSr132r_Int_VFNMSUBSSr213r_VFNMSUBSSr213r_Int_VFNMSUBSSr231r_VFNMSUBSSr231r_Int = 926,
15532
    VFMADDPD4mr_VFMADDPD4mrY_VFMADDPD4rm_VFMADDPD4rmY_VFMADDPDr132m_VFMADDPDr132mY_VFMADDPDr213m_VFMADDPDr213mY_VFMADDPDr231m_VFMADDPDr231mY_VFMADDPS4mr_VFMADDPS4mrY_VFMADDPS4rm_VFMADDPS4rmY_VFMADDPSr132m_VFMADDPSr132mY_VFMADDPSr213m_VFMADDPSr213mY_VFMADDPSr231m_VFMADDPSr231mY_VFMADDSD4mr_VFMADDSD4mr_Int_VFMADDSD4rm_VFMADDSD4rm_Int_VFMADDSDr132m_VFMADDSDr132m_Int_VFMADDSDr213m_VFMADDSDr213m_Int_VFMADDSDr231m_VFMADDSDr231m_Int_VFMADDSS4mr_VFMADDSS4mr_Int_VFMADDSS4rm_VFMADDSS4rm_Int_VFMADDSSr132m_VFMADDSSr132m_Int_VFMADDSSr213m_VFMADDSSr213m_Int_VFMADDSSr231m_VFMADDSSr231m_Int_VFMADDSUBPDr132m_VFMADDSUBPDr132mY_VFMADDSUBPDr213m_VFMADDSUBPDr213mY_VFMADDSUBPDr231m_VFMADDSUBPDr231mY_VFMADDSUBPSr132m_VFMADDSUBPSr132mY_VFMADDSUBPSr213m_VFMADDSUBPSr213mY_VFMADDSUBPSr231m_VFMADDSUBPSr231mY_VFMSUBADDPDr132m_VFMSUBADDPDr132mY_VFMSUBADDPDr213m_VFMSUBADDPDr213mY_VFMSUBADDPDr231m_VFMSUBADDPDr231mY_VFMSUBADDPSr132m_VFMSUBADDPSr132mY_VFMSUBADDPSr213m_VFMSUBADDPSr213mY_VFMSUBADDPSr231m_VFMSUBADDPSr231mY_VFMSUBPD4mr_VFMSUBPD4mrY_VFMSUBPD4rm_VFMSUBPD4rmY_VFMSUBPDr132m_VFMSUBPDr132mY_VFMSUBPDr213m_VFMSUBPDr213mY_VFMSUBPDr231m_VFMSUBPDr231mY_VFMSUBPS4mr_VFMSUBPS4mrY_VFMSUBPS4rm_VFMSUBPS4rmY_VFMSUBPSr132m_VFMSUBPSr132mY_VFMSUBPSr213m_VFMSUBPSr213mY_VFMSUBPSr231m_VFMSUBPSr231mY_VFMSUBSD4mr_VFMSUBSD4mr_Int_VFMSUBSD4rm_VFMSUBSD4rm_Int_VFMSUBSDr132m_VFMSUBSDr132m_Int_VFMSUBSDr213m_VFMSUBSDr213m_Int_VFMSUBSDr231m_VFMSUBSDr231m_Int_VFMSUBSS4mr_VFMSUBSS4mr_Int_VFMSUBSS4rm_VFMSUBSS4rm_Int_VFMSUBSSr132m_VFMSUBSSr132m_Int_VFMSUBSSr213m_VFMSUBSSr213m_Int_VFMSUBSSr231m_VFMSUBSSr231m_Int_VFNMADDPD4mr_VFNMADDPD4mrY_VFNMADDPD4rm_VFNMADDPD4rmY_VFNMADDPDr132m_VFNMADDPDr132mY_VFNMADDPDr213m_VFNMADDPDr213mY_VFNMADDPDr231m_VFNMADDPDr231mY_VFNMADDPS4mr_VFNMADDPS4mrY_VFNMADDPS4rm_VFNMADDPS4rmY_VFNMADDPSr132m_VFNMADDPSr132mY_VFNMADDPSr213m_VFNMADDPSr213mY_VFNMADDPSr231m_VFNMADDPSr231mY_VFNMADDSD4mr_VFNMADDSD4mr_Int_VFNMADDSD4rm_VFNMADDSD4rm_Int_VFNMADDSDr132m_VFNMADDSDr132m_Int_VFNMADDSDr213m_VFNMADDSDr213m_Int_VFNMADDSDr231m_VFNMADDSDr231m_Int_VFNMADDSS4mr_VFNMADDSS4mr_Int_VFNMADDSS4rm_VFNMADDSS4rm_Int_VFNMADDSSr132m_VFNMADDSSr132m_Int_VFNMADDSSr213m_VFNMADDSSr213m_Int_VFNMADDSSr231m_VFNMADDSSr231m_Int_VFNMSUBPD4mr_VFNMSUBPD4mrY_VFNMSUBPD4rm_VFNMSUBPD4rmY_VFNMSUBPDr132m_VFNMSUBPDr132mY_VFNMSUBPDr213m_VFNMSUBPDr213mY_VFNMSUBPDr231m_VFNMSUBPDr231mY_VFNMSUBPS4mr_VFNMSUBPS4mrY_VFNMSUBPS4rm_VFNMSUBPS4rmY_VFNMSUBPSr132m_VFNMSUBPSr132mY_VFNMSUBPSr213m_VFNMSUBPSr213mY_VFNMSUBPSr231m_VFNMSUBPSr231mY_VFNMSUBSD4mr_VFNMSUBSD4mr_Int_VFNMSUBSD4rm_VFNMSUBSD4rm_Int_VFNMSUBSDr132m_VFNMSUBSDr132m_Int_VFNMSUBSDr213m_VFNMSUBSDr213m_Int_VFNMSUBSDr231m_VFNMSUBSDr231m_Int_VFNMSUBSS4mr_VFNMSUBSS4mr_Int_VFNMSUBSS4rm_VFNMSUBSS4rm_Int_VFNMSUBSSr132m_VFNMSUBSSr132m_Int_VFNMSUBSSr213m_VFNMSUBSSr213m_Int_VFNMSUBSSr231m_VFNMSUBSSr231m_Int = 927,
15533
    VSQRTPSYr = 928,
15534
    VSQRTPSYm = 929,
15535
    VSQRTPDYr = 930,
15536
    VSQRTPDYm = 931,
15537
    RSQRTPSr_VRSQRTPSr  = 932,
15538
    RSQRTSSr_VRSQRTSSr  = 933,
15539
    RSQRTSSr_Int  = 934,
15540
    VRSQRTSSr_Int = 935,
15541
    RSQRTPSm_VRSQRTPSm  = 936,
15542
    RSQRTSSm_VRSQRTSSm  = 937,
15543
    RSQRTSSm_Int_VRSQRTSSm_Int  = 938,
15544
    VRSQRTPSYr  = 939,
15545
    VRSQRTPSYm  = 940,
15546
    ANDNPDrr_ANDNPSrr_ANDPDrr_ANDPSrr_ORPDrr_ORPSrr_VANDNPDYrr_VANDNPDrr_VANDNPSYrr_VANDNPSrr_VANDPDYrr_VANDPDrr_VANDPSYrr_VANDPSrr_VORPDYrr_VORPDrr_VORPSYrr_VORPSrr_VXORPDYrr_VXORPDrr_VXORPSYrr_VXORPSrr_XORPDrr_XORPSrr = 941,
15547
    ANDNPDrm_ANDNPSrm_ANDPDrm_ANDPSrm_ORPDrm_ORPSrm_VANDNPDYrm_VANDNPDrm_VANDNPSYrm_VANDNPSrm_VANDPDYrm_VANDPDrm_VANDPSYrm_VANDPSrm_VORPDYrm_VORPDrm_VORPSYrm_VORPSrm_VXORPDYrm_VXORPDrm_VXORPSYrm_VXORPSrm_XORPDrm_XORPSrm = 942,
15548
    VZEROUPPER  = 943,
15549
    VZEROALL  = 944,
15550
    LDMXCSR_VLDMXCSR  = 945,
15551
    STMXCSR_VSTMXCSR  = 946,
15552
    SCHED_LIST_END = 947
15553
  };
15554
} // end Sched namespace
15555
} // end X86 namespace
15556
} // end llvm namespace 
15557
#endif // GET_INSTRINFO_ENUM
15558
15559
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
15560
|*                                                                            *|
15561
|* Target Instruction Descriptors                                             *|
15562
|*                                                                            *|
15563
|* Automatically generated file, do not edit!                                 *|
15564
|*                                                                            *|
15565
\*===----------------------------------------------------------------------===*/
15566
15567
15568
#ifdef GET_INSTRINFO_MC_DESC
15569
#undef GET_INSTRINFO_MC_DESC
15570
namespace llvm_ks {
15571
15572
static const MCPhysReg ImplicitList1[] = { X86::AL, X86::EFLAGS, 0 };
15573
static const MCPhysReg ImplicitList2[] = { X86::AX, X86::EFLAGS, 0 };
15574
static const MCPhysReg ImplicitList3[] = { X86::AX, 0 };
15575
static const MCPhysReg ImplicitList4[] = { X86::AL, 0 };
15576
static const MCPhysReg ImplicitList5[] = { X86::FPSW, 0 };
15577
static const MCPhysReg ImplicitList6[] = { X86::EFLAGS, 0 };
15578
static const MCPhysReg ImplicitList7[] = { X86::EAX, X86::EFLAGS, 0 };
15579
static const MCPhysReg ImplicitList8[] = { X86::RAX, X86::EFLAGS, 0 };
15580
static const MCPhysReg ImplicitList9[] = { X86::EAX, 0 };
15581
static const MCPhysReg ImplicitList10[] = { X86::RAX, 0 };
15582
static const MCPhysReg ImplicitList11[] = { X86::ESP, 0 };
15583
static const MCPhysReg ImplicitList12[] = { X86::ESP, X86::EFLAGS, 0 };
15584
static const MCPhysReg ImplicitList13[] = { X86::RSP, 0 };
15585
static const MCPhysReg ImplicitList14[] = { X86::RSP, X86::EFLAGS, 0 };
15586
static const MCPhysReg ImplicitList15[] = { X86::XMM0, 0 };
15587
static const MCPhysReg ImplicitList16[] = { X86::EAX, X86::EDX, 0 };
15588
static const MCPhysReg ImplicitList17[] = { X86::EDI, X86::ESI, X86::EFLAGS, 0 };
15589
static const MCPhysReg ImplicitList18[] = { X86::RAX, X86::RBX, X86::RCX, X86::RDX, 0 };
15590
static const MCPhysReg ImplicitList19[] = { X86::RAX, X86::RDX, X86::EFLAGS, 0 };
15591
static const MCPhysReg ImplicitList20[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, 0 };
15592
static const MCPhysReg ImplicitList21[] = { X86::EAX, X86::EDX, X86::EFLAGS, 0 };
15593
static const MCPhysReg ImplicitList22[] = { X86::EFLAGS, X86::FPSW, 0 };
15594
static const MCPhysReg ImplicitList23[] = { X86::EAX, X86::ECX, 0 };
15595
static const MCPhysReg ImplicitList24[] = { X86::RAX, X86::RDX, 0 };
15596
static const MCPhysReg ImplicitList25[] = { X86::AX, X86::DX, 0 };
15597
static const MCPhysReg ImplicitList26[] = { X86::AX, X86::DX, X86::EFLAGS, 0 };
15598
static const MCPhysReg ImplicitList27[] = { X86::AL, X86::AH, X86::EFLAGS, 0 };
15599
static const MCPhysReg ImplicitList28[] = { X86::RAX, X86::RBX, X86::RCX, 0 };
15600
static const MCPhysReg ImplicitList29[] = { X86::AL, X86::EFLAGS, X86::AX, 0 };
15601
static const MCPhysReg ImplicitList30[] = { X86::DX, 0 };
15602
static const MCPhysReg ImplicitList31[] = { X86::DX, X86::EDI, X86::EFLAGS, 0 };
15603
static const MCPhysReg ImplicitList32[] = { X86::EDI, 0 };
15604
static const MCPhysReg ImplicitList33[] = { X86::RAX, X86::ECX, 0 };
15605
static const MCPhysReg ImplicitList34[] = { X86::CX, 0 };
15606
static const MCPhysReg ImplicitList35[] = { X86::ECX, 0 };
15607
static const MCPhysReg ImplicitList36[] = { X86::RCX, 0 };
15608
static const MCPhysReg ImplicitList37[] = { X86::AH, 0 };
15609
static const MCPhysReg ImplicitList38[] = { X86::EBP, X86::ESP, 0 };
15610
static const MCPhysReg ImplicitList39[] = { X86::RBP, X86::RSP, 0 };
15611
static const MCPhysReg ImplicitList40[] = { X86::ESI, X86::EFLAGS, 0 };
15612
static const MCPhysReg ImplicitList41[] = { X86::AL, X86::ESI, 0 };
15613
static const MCPhysReg ImplicitList42[] = { X86::EAX, X86::ESI, 0 };
15614
static const MCPhysReg ImplicitList43[] = { X86::RAX, X86::ESI, 0 };
15615
static const MCPhysReg ImplicitList44[] = { X86::AX, X86::ESI, 0 };
15616
static const MCPhysReg ImplicitList45[] = { X86::RDI, 0 };
15617
static const MCPhysReg ImplicitList46[] = { X86::EAX, X86::ECX, X86::EDX, 0 };
15618
static const MCPhysReg ImplicitList47[] = { X86::RAX, X86::RSI, 0 };
15619
static const MCPhysReg ImplicitList48[] = { X86::RAX, X86::RDX, X86::RSI, 0 };
15620
static const MCPhysReg ImplicitList49[] = { X86::EDI, X86::ESI, 0 };
15621
static const MCPhysReg ImplicitList50[] = { X86::EDX, 0 };
15622
static const MCPhysReg ImplicitList51[] = { X86::RDX, 0 };
15623
static const MCPhysReg ImplicitList52[] = { X86::ECX, X86::EAX, X86::EBX, 0 };
15624
static const MCPhysReg ImplicitList53[] = { X86::ECX, X86::EAX, 0 };
15625
static const MCPhysReg ImplicitList54[] = { X86::DX, X86::AX, 0 };
15626
static const MCPhysReg ImplicitList55[] = { X86::DX, X86::EAX, 0 };
15627
static const MCPhysReg ImplicitList56[] = { X86::DX, X86::AL, 0 };
15628
static const MCPhysReg ImplicitList57[] = { X86::DX, X86::ESI, X86::EFLAGS, 0 };
15629
static const MCPhysReg ImplicitList58[] = { X86::ESI, 0 };
15630
static const MCPhysReg ImplicitList59[] = { X86::ECX, X86::EFLAGS, 0 };
15631
static const MCPhysReg ImplicitList60[] = { X86::XMM0, X86::EFLAGS, 0 };
15632
static const MCPhysReg ImplicitList61[] = { X86::EDI, X86::ESI, X86::EBP, X86::EBX, X86::EDX, X86::ECX, X86::EAX, X86::ESP, 0 };
15633
static const MCPhysReg ImplicitList62[] = { X86::CL, 0 };
15634
static const MCPhysReg ImplicitList63[] = { X86::RAX, X86::RCX, X86::RDX, 0 };
15635
static const MCPhysReg ImplicitList64[] = { X86::ECX, X86::EDI, X86::ESI, 0 };
15636
static const MCPhysReg ImplicitList65[] = { X86::RCX, X86::RDI, X86::RSI, 0 };
15637
static const MCPhysReg ImplicitList66[] = { X86::AL, X86::ECX, X86::EDI, 0 };
15638
static const MCPhysReg ImplicitList67[] = { X86::ECX, X86::EDI, 0 };
15639
static const MCPhysReg ImplicitList68[] = { X86::AL, X86::RCX, X86::RDI, 0 };
15640
static const MCPhysReg ImplicitList69[] = { X86::RCX, X86::RDI, 0 };
15641
static const MCPhysReg ImplicitList70[] = { X86::EAX, X86::ECX, X86::EDI, 0 };
15642
static const MCPhysReg ImplicitList71[] = { X86::RAX, X86::RCX, X86::RDI, 0 };
15643
static const MCPhysReg ImplicitList72[] = { X86::AX, X86::ECX, X86::EDI, 0 };
15644
static const MCPhysReg ImplicitList73[] = { X86::AX, X86::RCX, X86::RDI, 0 };
15645
static const MCPhysReg ImplicitList74[] = { X86::AL, X86::EDI, X86::EFLAGS, 0 };
15646
static const MCPhysReg ImplicitList75[] = { X86::EDI, X86::EFLAGS, 0 };
15647
static const MCPhysReg ImplicitList76[] = { X86::EAX, X86::EDI, X86::EFLAGS, 0 };
15648
static const MCPhysReg ImplicitList77[] = { X86::RAX, X86::EDI, X86::EFLAGS, 0 };
15649
static const MCPhysReg ImplicitList78[] = { X86::AX, X86::EDI, X86::EFLAGS, 0 };
15650
static const MCPhysReg ImplicitList79[] = { X86::EAX, X86::ESP, X86::EFLAGS, 0 };
15651
static const MCPhysReg ImplicitList80[] = { X86::RAX, X86::RSP, X86::EFLAGS, 0 };
15652
static const MCPhysReg ImplicitList81[] = { X86::RAX, X86::RDI, X86::EFLAGS, 0 };
15653
static const MCPhysReg ImplicitList82[] = { X86::EAX, X86::ECX, X86::EFLAGS, 0 };
15654
static const MCPhysReg ImplicitList83[] = { X86::RSP, X86::RDI, 0 };
15655
static const MCPhysReg ImplicitList84[] = { X86::EAX, X86::ECX, X86::EDX, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, 0 };
15656
static const MCPhysReg ImplicitList85[] = { X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, 0 };
15657
static const MCPhysReg ImplicitList86[] = { X86::ST0, 0 };
15658
static const MCPhysReg ImplicitList87[] = { X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15, 0 };
15659
static const MCPhysReg ImplicitList88[] = { X86::RBX, X86::RDX, X86::RSI, X86::RDI, 0 };
15660
static const MCPhysReg ImplicitList89[] = { X86::RSI, X86::RDI, 0 };
15661
static const MCPhysReg ImplicitList90[] = { X86::EDX, X86::EAX, 0 };
15662
static const MCPhysReg ImplicitList91[] = { X86::AL, X86::EBX, 0 };
15663
static const MCPhysReg ImplicitList92[] = { X86::EDX, X86::EAX, X86::ECX, 0 };
15664
static const MCPhysReg ImplicitList93[] = { X86::RAX, X86::RSI, X86::RDI, 0 };
15665
static const MCPhysReg ImplicitList94[] = { X86::RDX, X86::RDI, 0 };
15666
static const MCPhysReg ImplicitList95[] = { X86::RAX, X86::RDI, 0 };
15667
15668
static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15669
static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15670
static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15671
static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
15672
static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15673
static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
15674
static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15675
static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15676
static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
15677
static const MCOperandInfo OperandInfo11[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15678
static const MCOperandInfo OperandInfo12[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
15679
static const MCOperandInfo OperandInfo13[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15680
static const MCOperandInfo OperandInfo14[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15681
static const MCOperandInfo OperandInfo15[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15682
static const MCOperandInfo OperandInfo16[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15683
static const MCOperandInfo OperandInfo17[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15684
static const MCOperandInfo OperandInfo18[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15685
static const MCOperandInfo OperandInfo19[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15686
static const MCOperandInfo OperandInfo20[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15687
static const MCOperandInfo OperandInfo21[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15688
static const MCOperandInfo OperandInfo22[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15689
static const MCOperandInfo OperandInfo23[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15690
static const MCOperandInfo OperandInfo24[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15691
static const MCOperandInfo OperandInfo25[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15692
static const MCOperandInfo OperandInfo26[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15693
static const MCOperandInfo OperandInfo27[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15694
static const MCOperandInfo OperandInfo28[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15695
static const MCOperandInfo OperandInfo29[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15696
static const MCOperandInfo OperandInfo30[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15697
static const MCOperandInfo OperandInfo31[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15698
static const MCOperandInfo OperandInfo32[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15699
static const MCOperandInfo OperandInfo33[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15700
static const MCOperandInfo OperandInfo34[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15701
static const MCOperandInfo OperandInfo35[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15702
static const MCOperandInfo OperandInfo36[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15703
static const MCOperandInfo OperandInfo37[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15704
static const MCOperandInfo OperandInfo38[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15705
static const MCOperandInfo OperandInfo39[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15706
static const MCOperandInfo OperandInfo40[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15707
static const MCOperandInfo OperandInfo41[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15708
static const MCOperandInfo OperandInfo42[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15709
static const MCOperandInfo OperandInfo43[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15710
static const MCOperandInfo OperandInfo44[] = { { X86::RSTRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15711
static const MCOperandInfo OperandInfo45[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15712
static const MCOperandInfo OperandInfo46[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15713
static const MCOperandInfo OperandInfo47[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15714
static const MCOperandInfo OperandInfo48[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15715
static const MCOperandInfo OperandInfo49[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15716
static const MCOperandInfo OperandInfo50[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15717
static const MCOperandInfo OperandInfo51[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15718
static const MCOperandInfo OperandInfo52[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15719
static const MCOperandInfo OperandInfo53[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15720
static const MCOperandInfo OperandInfo54[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15721
static const MCOperandInfo OperandInfo55[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15722
static const MCOperandInfo OperandInfo56[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15723
static const MCOperandInfo OperandInfo57[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15724
static const MCOperandInfo OperandInfo58[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15725
static const MCOperandInfo OperandInfo59[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15726
static const MCOperandInfo OperandInfo60[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15727
static const MCOperandInfo OperandInfo61[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15728
static const MCOperandInfo OperandInfo62[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15729
static const MCOperandInfo OperandInfo63[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15730
static const MCOperandInfo OperandInfo64[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15731
static const MCOperandInfo OperandInfo65[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15732
static const MCOperandInfo OperandInfo66[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15733
static const MCOperandInfo OperandInfo67[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15734
static const MCOperandInfo OperandInfo68[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15735
static const MCOperandInfo OperandInfo69[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15736
static const MCOperandInfo OperandInfo70[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15737
static const MCOperandInfo OperandInfo71[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15738
static const MCOperandInfo OperandInfo72[] = { { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15739
static const MCOperandInfo OperandInfo73[] = { { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15740
static const MCOperandInfo OperandInfo74[] = { { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15741
static const MCOperandInfo OperandInfo75[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15742
static const MCOperandInfo OperandInfo76[] = { { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15743
static const MCOperandInfo OperandInfo77[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15744
static const MCOperandInfo OperandInfo78[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15745
static const MCOperandInfo OperandInfo79[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15746
static const MCOperandInfo OperandInfo80[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15747
static const MCOperandInfo OperandInfo81[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15748
static const MCOperandInfo OperandInfo82[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15749
static const MCOperandInfo OperandInfo83[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15750
static const MCOperandInfo OperandInfo84[] = { { -1, 0, MCOI::OPERAND_PCREL, 0 }, };
15751
static const MCOperandInfo OperandInfo85[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15752
static const MCOperandInfo OperandInfo86[] = { { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, };
15753
static const MCOperandInfo OperandInfo87[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15754
static const MCOperandInfo OperandInfo88[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15755
static const MCOperandInfo OperandInfo89[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15756
static const MCOperandInfo OperandInfo90[] = { { X86::FR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15757
static const MCOperandInfo OperandInfo91[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15758
static const MCOperandInfo OperandInfo92[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15759
static const MCOperandInfo OperandInfo93[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15760
static const MCOperandInfo OperandInfo94[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15761
static const MCOperandInfo OperandInfo95[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15762
static const MCOperandInfo OperandInfo96[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15763
static const MCOperandInfo OperandInfo97[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15764
static const MCOperandInfo OperandInfo98[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15765
static const MCOperandInfo OperandInfo99[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15766
static const MCOperandInfo OperandInfo100[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15767
static const MCOperandInfo OperandInfo101[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15768
static const MCOperandInfo OperandInfo102[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15769
static const MCOperandInfo OperandInfo103[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15770
static const MCOperandInfo OperandInfo104[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15771
static const MCOperandInfo OperandInfo105[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15772
static const MCOperandInfo OperandInfo106[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15773
static const MCOperandInfo OperandInfo107[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15774
static const MCOperandInfo OperandInfo108[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15775
static const MCOperandInfo OperandInfo109[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15776
static const MCOperandInfo OperandInfo110[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15777
static const MCOperandInfo OperandInfo111[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15778
static const MCOperandInfo OperandInfo112[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15779
static const MCOperandInfo OperandInfo113[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15780
static const MCOperandInfo OperandInfo114[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15781
static const MCOperandInfo OperandInfo115[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15782
static const MCOperandInfo OperandInfo116[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15783
static const MCOperandInfo OperandInfo117[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15784
static const MCOperandInfo OperandInfo118[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15785
static const MCOperandInfo OperandInfo119[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15786
static const MCOperandInfo OperandInfo120[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15787
static const MCOperandInfo OperandInfo121[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15788
static const MCOperandInfo OperandInfo122[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15789
static const MCOperandInfo OperandInfo123[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15790
static const MCOperandInfo OperandInfo124[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15791
static const MCOperandInfo OperandInfo125[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15792
static const MCOperandInfo OperandInfo126[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15793
static const MCOperandInfo OperandInfo127[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15794
static const MCOperandInfo OperandInfo128[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15795
static const MCOperandInfo OperandInfo129[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15796
static const MCOperandInfo OperandInfo130[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15797
static const MCOperandInfo OperandInfo131[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15798
static const MCOperandInfo OperandInfo132[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15799
static const MCOperandInfo OperandInfo133[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
15800
static const MCOperandInfo OperandInfo134[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15801
static const MCOperandInfo OperandInfo135[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15802
static const MCOperandInfo OperandInfo136[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15803
static const MCOperandInfo OperandInfo137[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15804
static const MCOperandInfo OperandInfo138[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15805
static const MCOperandInfo OperandInfo139[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15806
static const MCOperandInfo OperandInfo140[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15807
static const MCOperandInfo OperandInfo141[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15808
static const MCOperandInfo OperandInfo142[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15809
static const MCOperandInfo OperandInfo143[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15810
static const MCOperandInfo OperandInfo144[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15811
static const MCOperandInfo OperandInfo145[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15812
static const MCOperandInfo OperandInfo146[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15813
static const MCOperandInfo OperandInfo147[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15814
static const MCOperandInfo OperandInfo148[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
15815
static const MCOperandInfo OperandInfo149[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15816
static const MCOperandInfo OperandInfo150[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15817
static const MCOperandInfo OperandInfo151[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15818
static const MCOperandInfo OperandInfo152[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15819
static const MCOperandInfo OperandInfo153[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15820
static const MCOperandInfo OperandInfo154[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15821
static const MCOperandInfo OperandInfo155[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15822
static const MCOperandInfo OperandInfo156[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15823
static const MCOperandInfo OperandInfo157[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15824
static const MCOperandInfo OperandInfo158[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15825
static const MCOperandInfo OperandInfo159[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15826
static const MCOperandInfo OperandInfo160[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15827
static const MCOperandInfo OperandInfo161[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15828
static const MCOperandInfo OperandInfo162[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15829
static const MCOperandInfo OperandInfo163[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15830
static const MCOperandInfo OperandInfo164[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15831
static const MCOperandInfo OperandInfo165[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15832
static const MCOperandInfo OperandInfo166[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15833
static const MCOperandInfo OperandInfo167[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15834
static const MCOperandInfo OperandInfo168[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15835
static const MCOperandInfo OperandInfo169[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15836
static const MCOperandInfo OperandInfo170[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15837
static const MCOperandInfo OperandInfo171[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15838
static const MCOperandInfo OperandInfo172[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15839
static const MCOperandInfo OperandInfo173[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15840
static const MCOperandInfo OperandInfo174[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15841
static const MCOperandInfo OperandInfo175[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15842
static const MCOperandInfo OperandInfo176[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15843
static const MCOperandInfo OperandInfo177[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15844
static const MCOperandInfo OperandInfo178[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15845
static const MCOperandInfo OperandInfo179[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15846
static const MCOperandInfo OperandInfo180[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15847
static const MCOperandInfo OperandInfo181[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15848
static const MCOperandInfo OperandInfo182[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15849
static const MCOperandInfo OperandInfo183[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15850
static const MCOperandInfo OperandInfo184[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15851
static const MCOperandInfo OperandInfo185[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15852
static const MCOperandInfo OperandInfo186[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15853
static const MCOperandInfo OperandInfo187[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15854
static const MCOperandInfo OperandInfo188[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15855
static const MCOperandInfo OperandInfo189[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15856
static const MCOperandInfo OperandInfo190[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15857
static const MCOperandInfo OperandInfo191[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15858
static const MCOperandInfo OperandInfo192[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15859
static const MCOperandInfo OperandInfo193[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15860
static const MCOperandInfo OperandInfo194[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15861
static const MCOperandInfo OperandInfo195[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15862
static const MCOperandInfo OperandInfo196[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15863
static const MCOperandInfo OperandInfo197[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15864
static const MCOperandInfo OperandInfo198[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::GR64_NOSPRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
15865
static const MCOperandInfo OperandInfo199[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::GR64_NOSPRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
15866
static const MCOperandInfo OperandInfo200[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15867
static const MCOperandInfo OperandInfo201[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15868
static const MCOperandInfo OperandInfo202[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15869
static const MCOperandInfo OperandInfo203[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15870
static const MCOperandInfo OperandInfo204[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15871
static const MCOperandInfo OperandInfo205[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15872
static const MCOperandInfo OperandInfo206[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15873
static const MCOperandInfo OperandInfo207[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15874
static const MCOperandInfo OperandInfo208[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15875
static const MCOperandInfo OperandInfo209[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15876
static const MCOperandInfo OperandInfo210[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15877
static const MCOperandInfo OperandInfo211[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15878
static const MCOperandInfo OperandInfo212[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15879
static const MCOperandInfo OperandInfo213[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15880
static const MCOperandInfo OperandInfo214[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15881
static const MCOperandInfo OperandInfo215[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15882
static const MCOperandInfo OperandInfo216[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15883
static const MCOperandInfo OperandInfo217[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15884
static const MCOperandInfo OperandInfo218[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15885
static const MCOperandInfo OperandInfo219[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15886
static const MCOperandInfo OperandInfo220[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15887
static const MCOperandInfo OperandInfo221[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15888
static const MCOperandInfo OperandInfo222[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15889
static const MCOperandInfo OperandInfo223[] = { { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15890
static const MCOperandInfo OperandInfo224[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15891
static const MCOperandInfo OperandInfo225[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15892
static const MCOperandInfo OperandInfo226[] = { { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15893
static const MCOperandInfo OperandInfo227[] = { { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15894
static const MCOperandInfo OperandInfo228[] = { { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15895
static const MCOperandInfo OperandInfo229[] = { { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15896
static const MCOperandInfo OperandInfo230[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15897
static const MCOperandInfo OperandInfo231[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15898
static const MCOperandInfo OperandInfo232[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15899
static const MCOperandInfo OperandInfo233[] = { { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15900
static const MCOperandInfo OperandInfo234[] = { { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15901
static const MCOperandInfo OperandInfo235[] = { { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15902
static const MCOperandInfo OperandInfo236[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15903
static const MCOperandInfo OperandInfo237[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15904
static const MCOperandInfo OperandInfo238[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15905
static const MCOperandInfo OperandInfo239[] = { { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15906
static const MCOperandInfo OperandInfo240[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15907
static const MCOperandInfo OperandInfo241[] = { { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15908
static const MCOperandInfo OperandInfo242[] = { { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15909
static const MCOperandInfo OperandInfo243[] = { { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15910
static const MCOperandInfo OperandInfo244[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15911
static const MCOperandInfo OperandInfo245[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15912
static const MCOperandInfo OperandInfo246[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15913
static const MCOperandInfo OperandInfo247[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15914
static const MCOperandInfo OperandInfo248[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15915
static const MCOperandInfo OperandInfo249[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15916
static const MCOperandInfo OperandInfo250[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15917
static const MCOperandInfo OperandInfo251[] = { { X86::GR32_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15918
static const MCOperandInfo OperandInfo252[] = { { X86::GR32_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15919
static const MCOperandInfo OperandInfo253[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15920
static const MCOperandInfo OperandInfo254[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15921
static const MCOperandInfo OperandInfo255[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15922
static const MCOperandInfo OperandInfo256[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15923
static const MCOperandInfo OperandInfo257[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15924
static const MCOperandInfo OperandInfo258[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15925
static const MCOperandInfo OperandInfo259[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15926
static const MCOperandInfo OperandInfo260[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15927
static const MCOperandInfo OperandInfo261[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15928
static const MCOperandInfo OperandInfo262[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15929
static const MCOperandInfo OperandInfo263[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15930
static const MCOperandInfo OperandInfo264[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15931
static const MCOperandInfo OperandInfo265[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15932
static const MCOperandInfo OperandInfo266[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15933
static const MCOperandInfo OperandInfo267[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15934
static const MCOperandInfo OperandInfo268[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15935
static const MCOperandInfo OperandInfo269[] = { { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15936
static const MCOperandInfo OperandInfo270[] = { { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
15937
static const MCOperandInfo OperandInfo271[] = { { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15938
static const MCOperandInfo OperandInfo272[] = { { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15939
static const MCOperandInfo OperandInfo273[] = { { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15940
static const MCOperandInfo OperandInfo274[] = { { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15941
static const MCOperandInfo OperandInfo275[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15942
static const MCOperandInfo OperandInfo276[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15943
static const MCOperandInfo OperandInfo277[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15944
static const MCOperandInfo OperandInfo278[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15945
static const MCOperandInfo OperandInfo279[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15946
static const MCOperandInfo OperandInfo280[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15947
static const MCOperandInfo OperandInfo281[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15948
static const MCOperandInfo OperandInfo282[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15949
static const MCOperandInfo OperandInfo283[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15950
static const MCOperandInfo OperandInfo284[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15951
static const MCOperandInfo OperandInfo285[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15952
static const MCOperandInfo OperandInfo286[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15953
static const MCOperandInfo OperandInfo287[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15954
static const MCOperandInfo OperandInfo288[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15955
static const MCOperandInfo OperandInfo289[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15956
static const MCOperandInfo OperandInfo290[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15957
static const MCOperandInfo OperandInfo291[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15958
static const MCOperandInfo OperandInfo292[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15959
static const MCOperandInfo OperandInfo293[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15960
static const MCOperandInfo OperandInfo294[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15961
static const MCOperandInfo OperandInfo295[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15962
static const MCOperandInfo OperandInfo296[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15963
static const MCOperandInfo OperandInfo297[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15964
static const MCOperandInfo OperandInfo298[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15965
static const MCOperandInfo OperandInfo299[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15966
static const MCOperandInfo OperandInfo300[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15967
static const MCOperandInfo OperandInfo301[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15968
static const MCOperandInfo OperandInfo302[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15969
static const MCOperandInfo OperandInfo303[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15970
static const MCOperandInfo OperandInfo304[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15971
static const MCOperandInfo OperandInfo305[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15972
static const MCOperandInfo OperandInfo306[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15973
static const MCOperandInfo OperandInfo307[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15974
static const MCOperandInfo OperandInfo308[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15975
static const MCOperandInfo OperandInfo309[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15976
static const MCOperandInfo OperandInfo310[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15977
static const MCOperandInfo OperandInfo311[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15978
static const MCOperandInfo OperandInfo312[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15979
static const MCOperandInfo OperandInfo313[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15980
static const MCOperandInfo OperandInfo314[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15981
static const MCOperandInfo OperandInfo315[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15982
static const MCOperandInfo OperandInfo316[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15983
static const MCOperandInfo OperandInfo317[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15984
static const MCOperandInfo OperandInfo318[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15985
static const MCOperandInfo OperandInfo319[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15986
static const MCOperandInfo OperandInfo320[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15987
static const MCOperandInfo OperandInfo321[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15988
static const MCOperandInfo OperandInfo322[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15989
static const MCOperandInfo OperandInfo323[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15990
static const MCOperandInfo OperandInfo324[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
15991
static const MCOperandInfo OperandInfo325[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
15992
static const MCOperandInfo OperandInfo326[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15993
static const MCOperandInfo OperandInfo327[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15994
static const MCOperandInfo OperandInfo328[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15995
static const MCOperandInfo OperandInfo329[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15996
static const MCOperandInfo OperandInfo330[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15997
static const MCOperandInfo OperandInfo331[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15998
static const MCOperandInfo OperandInfo332[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
15999
static const MCOperandInfo OperandInfo333[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16000
static const MCOperandInfo OperandInfo334[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16001
static const MCOperandInfo OperandInfo335[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16002
static const MCOperandInfo OperandInfo336[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16003
static const MCOperandInfo OperandInfo337[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16004
static const MCOperandInfo OperandInfo338[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16005
static const MCOperandInfo OperandInfo339[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16006
static const MCOperandInfo OperandInfo340[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16007
static const MCOperandInfo OperandInfo341[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16008
static const MCOperandInfo OperandInfo342[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16009
static const MCOperandInfo OperandInfo343[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16010
static const MCOperandInfo OperandInfo344[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16011
static const MCOperandInfo OperandInfo345[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16012
static const MCOperandInfo OperandInfo346[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16013
static const MCOperandInfo OperandInfo347[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16014
static const MCOperandInfo OperandInfo348[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16015
static const MCOperandInfo OperandInfo349[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16016
static const MCOperandInfo OperandInfo350[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16017
static const MCOperandInfo OperandInfo351[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16018
static const MCOperandInfo OperandInfo352[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16019
static const MCOperandInfo OperandInfo353[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16020
static const MCOperandInfo OperandInfo354[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16021
static const MCOperandInfo OperandInfo355[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16022
static const MCOperandInfo OperandInfo356[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16023
static const MCOperandInfo OperandInfo357[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16024
static const MCOperandInfo OperandInfo358[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16025
static const MCOperandInfo OperandInfo359[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16026
static const MCOperandInfo OperandInfo360[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16027
static const MCOperandInfo OperandInfo361[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16028
static const MCOperandInfo OperandInfo362[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16029
static const MCOperandInfo OperandInfo363[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16030
static const MCOperandInfo OperandInfo364[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16031
static const MCOperandInfo OperandInfo365[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16032
static const MCOperandInfo OperandInfo366[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16033
static const MCOperandInfo OperandInfo367[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16034
static const MCOperandInfo OperandInfo368[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16035
static const MCOperandInfo OperandInfo369[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16036
static const MCOperandInfo OperandInfo370[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16037
static const MCOperandInfo OperandInfo371[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16038
static const MCOperandInfo OperandInfo372[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16039
static const MCOperandInfo OperandInfo373[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16040
static const MCOperandInfo OperandInfo374[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16041
static const MCOperandInfo OperandInfo375[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16042
static const MCOperandInfo OperandInfo376[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16043
static const MCOperandInfo OperandInfo377[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16044
static const MCOperandInfo OperandInfo378[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16045
static const MCOperandInfo OperandInfo379[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16046
static const MCOperandInfo OperandInfo380[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16047
static const MCOperandInfo OperandInfo381[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16048
static const MCOperandInfo OperandInfo382[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16049
static const MCOperandInfo OperandInfo383[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16050
static const MCOperandInfo OperandInfo384[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16051
static const MCOperandInfo OperandInfo385[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16052
static const MCOperandInfo OperandInfo386[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16053
static const MCOperandInfo OperandInfo387[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16054
static const MCOperandInfo OperandInfo388[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16055
static const MCOperandInfo OperandInfo389[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16056
static const MCOperandInfo OperandInfo390[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16057
static const MCOperandInfo OperandInfo391[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16058
static const MCOperandInfo OperandInfo392[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16059
static const MCOperandInfo OperandInfo393[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16060
static const MCOperandInfo OperandInfo394[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16061
static const MCOperandInfo OperandInfo395[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16062
static const MCOperandInfo OperandInfo396[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16063
static const MCOperandInfo OperandInfo397[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16064
static const MCOperandInfo OperandInfo398[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16065
static const MCOperandInfo OperandInfo399[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16066
static const MCOperandInfo OperandInfo400[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16067
static const MCOperandInfo OperandInfo401[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16068
static const MCOperandInfo OperandInfo402[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16069
static const MCOperandInfo OperandInfo403[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16070
static const MCOperandInfo OperandInfo404[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16071
static const MCOperandInfo OperandInfo405[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16072
static const MCOperandInfo OperandInfo406[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16073
static const MCOperandInfo OperandInfo407[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16074
static const MCOperandInfo OperandInfo408[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16075
static const MCOperandInfo OperandInfo409[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16076
static const MCOperandInfo OperandInfo410[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16077
static const MCOperandInfo OperandInfo411[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16078
static const MCOperandInfo OperandInfo412[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16079
static const MCOperandInfo OperandInfo413[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16080
static const MCOperandInfo OperandInfo414[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16081
static const MCOperandInfo OperandInfo415[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16082
static const MCOperandInfo OperandInfo416[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16083
static const MCOperandInfo OperandInfo417[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16084
static const MCOperandInfo OperandInfo418[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16085
static const MCOperandInfo OperandInfo419[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16086
static const MCOperandInfo OperandInfo420[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16087
static const MCOperandInfo OperandInfo421[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16088
static const MCOperandInfo OperandInfo422[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16089
static const MCOperandInfo OperandInfo423[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16090
static const MCOperandInfo OperandInfo424[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16091
static const MCOperandInfo OperandInfo425[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16092
static const MCOperandInfo OperandInfo426[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16093
static const MCOperandInfo OperandInfo427[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16094
static const MCOperandInfo OperandInfo428[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16095
static const MCOperandInfo OperandInfo429[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16096
static const MCOperandInfo OperandInfo430[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16097
static const MCOperandInfo OperandInfo431[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16098
static const MCOperandInfo OperandInfo432[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16099
static const MCOperandInfo OperandInfo433[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16100
static const MCOperandInfo OperandInfo434[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16101
static const MCOperandInfo OperandInfo435[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16102
static const MCOperandInfo OperandInfo436[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16103
static const MCOperandInfo OperandInfo437[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16104
static const MCOperandInfo OperandInfo438[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16105
static const MCOperandInfo OperandInfo439[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16106
static const MCOperandInfo OperandInfo440[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16107
static const MCOperandInfo OperandInfo441[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16108
static const MCOperandInfo OperandInfo442[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16109
static const MCOperandInfo OperandInfo443[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16110
static const MCOperandInfo OperandInfo444[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16111
static const MCOperandInfo OperandInfo445[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16112
static const MCOperandInfo OperandInfo446[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16113
static const MCOperandInfo OperandInfo447[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16114
static const MCOperandInfo OperandInfo448[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16115
static const MCOperandInfo OperandInfo449[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16116
static const MCOperandInfo OperandInfo450[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16117
static const MCOperandInfo OperandInfo451[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16118
static const MCOperandInfo OperandInfo452[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16119
static const MCOperandInfo OperandInfo453[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16120
static const MCOperandInfo OperandInfo454[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16121
static const MCOperandInfo OperandInfo455[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16122
static const MCOperandInfo OperandInfo456[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16123
static const MCOperandInfo OperandInfo457[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16124
static const MCOperandInfo OperandInfo458[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16125
static const MCOperandInfo OperandInfo459[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16126
static const MCOperandInfo OperandInfo460[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16127
static const MCOperandInfo OperandInfo461[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16128
static const MCOperandInfo OperandInfo462[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16129
static const MCOperandInfo OperandInfo463[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16130
static const MCOperandInfo OperandInfo464[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16131
static const MCOperandInfo OperandInfo465[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16132
static const MCOperandInfo OperandInfo466[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16133
static const MCOperandInfo OperandInfo467[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16134
static const MCOperandInfo OperandInfo468[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16135
static const MCOperandInfo OperandInfo469[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16136
static const MCOperandInfo OperandInfo470[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16137
static const MCOperandInfo OperandInfo471[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16138
static const MCOperandInfo OperandInfo472[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16139
static const MCOperandInfo OperandInfo473[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16140
static const MCOperandInfo OperandInfo474[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16141
static const MCOperandInfo OperandInfo475[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16142
static const MCOperandInfo OperandInfo476[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16143
static const MCOperandInfo OperandInfo477[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16144
static const MCOperandInfo OperandInfo478[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16145
static const MCOperandInfo OperandInfo479[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16146
static const MCOperandInfo OperandInfo480[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16147
static const MCOperandInfo OperandInfo481[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16148
static const MCOperandInfo OperandInfo482[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16149
static const MCOperandInfo OperandInfo483[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16150
static const MCOperandInfo OperandInfo484[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16151
static const MCOperandInfo OperandInfo485[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16152
static const MCOperandInfo OperandInfo486[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16153
static const MCOperandInfo OperandInfo487[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16154
static const MCOperandInfo OperandInfo488[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16155
static const MCOperandInfo OperandInfo489[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16156
static const MCOperandInfo OperandInfo490[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16157
static const MCOperandInfo OperandInfo491[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16158
static const MCOperandInfo OperandInfo492[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16159
static const MCOperandInfo OperandInfo493[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16160
static const MCOperandInfo OperandInfo494[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16161
static const MCOperandInfo OperandInfo495[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16162
static const MCOperandInfo OperandInfo496[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16163
static const MCOperandInfo OperandInfo497[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16164
static const MCOperandInfo OperandInfo498[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16165
static const MCOperandInfo OperandInfo499[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16166
static const MCOperandInfo OperandInfo500[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16167
static const MCOperandInfo OperandInfo501[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16168
static const MCOperandInfo OperandInfo502[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16169
static const MCOperandInfo OperandInfo503[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16170
static const MCOperandInfo OperandInfo504[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16171
static const MCOperandInfo OperandInfo505[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16172
static const MCOperandInfo OperandInfo506[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16173
static const MCOperandInfo OperandInfo507[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16174
static const MCOperandInfo OperandInfo508[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16175
static const MCOperandInfo OperandInfo509[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16176
static const MCOperandInfo OperandInfo510[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16177
static const MCOperandInfo OperandInfo511[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16178
static const MCOperandInfo OperandInfo512[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16179
static const MCOperandInfo OperandInfo513[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16180
static const MCOperandInfo OperandInfo514[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16181
static const MCOperandInfo OperandInfo515[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16182
static const MCOperandInfo OperandInfo516[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16183
static const MCOperandInfo OperandInfo517[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16184
static const MCOperandInfo OperandInfo518[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16185
static const MCOperandInfo OperandInfo519[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16186
static const MCOperandInfo OperandInfo520[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16187
static const MCOperandInfo OperandInfo521[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16188
static const MCOperandInfo OperandInfo522[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16189
static const MCOperandInfo OperandInfo523[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16190
static const MCOperandInfo OperandInfo524[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16191
static const MCOperandInfo OperandInfo525[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16192
static const MCOperandInfo OperandInfo526[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16193
static const MCOperandInfo OperandInfo527[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16194
static const MCOperandInfo OperandInfo528[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16195
static const MCOperandInfo OperandInfo529[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16196
static const MCOperandInfo OperandInfo530[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16197
static const MCOperandInfo OperandInfo531[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16198
static const MCOperandInfo OperandInfo532[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16199
static const MCOperandInfo OperandInfo533[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16200
static const MCOperandInfo OperandInfo534[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16201
static const MCOperandInfo OperandInfo535[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16202
static const MCOperandInfo OperandInfo536[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16203
static const MCOperandInfo OperandInfo537[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16204
static const MCOperandInfo OperandInfo538[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16205
static const MCOperandInfo OperandInfo539[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16206
static const MCOperandInfo OperandInfo540[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16207
static const MCOperandInfo OperandInfo541[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16208
static const MCOperandInfo OperandInfo542[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16209
static const MCOperandInfo OperandInfo543[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16210
static const MCOperandInfo OperandInfo544[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16211
static const MCOperandInfo OperandInfo545[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16212
static const MCOperandInfo OperandInfo546[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16213
static const MCOperandInfo OperandInfo547[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16214
static const MCOperandInfo OperandInfo548[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16215
static const MCOperandInfo OperandInfo549[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16216
static const MCOperandInfo OperandInfo550[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16217
static const MCOperandInfo OperandInfo551[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16218
static const MCOperandInfo OperandInfo552[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16219
static const MCOperandInfo OperandInfo553[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16220
static const MCOperandInfo OperandInfo554[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16221
static const MCOperandInfo OperandInfo555[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16222
static const MCOperandInfo OperandInfo556[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16223
static const MCOperandInfo OperandInfo557[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16224
static const MCOperandInfo OperandInfo558[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16225
static const MCOperandInfo OperandInfo559[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16226
static const MCOperandInfo OperandInfo560[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16227
static const MCOperandInfo OperandInfo561[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16228
static const MCOperandInfo OperandInfo562[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16229
static const MCOperandInfo OperandInfo563[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16230
static const MCOperandInfo OperandInfo564[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16231
static const MCOperandInfo OperandInfo565[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16232
static const MCOperandInfo OperandInfo566[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16233
static const MCOperandInfo OperandInfo567[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16234
static const MCOperandInfo OperandInfo568[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16235
static const MCOperandInfo OperandInfo569[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16236
static const MCOperandInfo OperandInfo570[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16237
static const MCOperandInfo OperandInfo571[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16238
static const MCOperandInfo OperandInfo572[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16239
static const MCOperandInfo OperandInfo573[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16240
static const MCOperandInfo OperandInfo574[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16241
static const MCOperandInfo OperandInfo575[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16242
static const MCOperandInfo OperandInfo576[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16243
static const MCOperandInfo OperandInfo577[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16244
static const MCOperandInfo OperandInfo578[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16245
static const MCOperandInfo OperandInfo579[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16246
static const MCOperandInfo OperandInfo580[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16247
static const MCOperandInfo OperandInfo581[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16248
static const MCOperandInfo OperandInfo582[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16249
static const MCOperandInfo OperandInfo583[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16250
static const MCOperandInfo OperandInfo584[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16251
static const MCOperandInfo OperandInfo585[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16252
static const MCOperandInfo OperandInfo586[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16253
static const MCOperandInfo OperandInfo587[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16254
static const MCOperandInfo OperandInfo588[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16255
static const MCOperandInfo OperandInfo589[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16256
static const MCOperandInfo OperandInfo590[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
16257
static const MCOperandInfo OperandInfo591[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16258
static const MCOperandInfo OperandInfo592[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16259
static const MCOperandInfo OperandInfo593[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16260
static const MCOperandInfo OperandInfo594[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
16261
static const MCOperandInfo OperandInfo595[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
16262
static const MCOperandInfo OperandInfo596[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16263
static const MCOperandInfo OperandInfo597[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16264
static const MCOperandInfo OperandInfo598[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16265
static const MCOperandInfo OperandInfo599[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16266
static const MCOperandInfo OperandInfo600[] = { { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16267
static const MCOperandInfo OperandInfo601[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16268
static const MCOperandInfo OperandInfo602[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16269
static const MCOperandInfo OperandInfo603[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16270
static const MCOperandInfo OperandInfo604[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
16271
static const MCOperandInfo OperandInfo605[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16272
static const MCOperandInfo OperandInfo606[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16273
static const MCOperandInfo OperandInfo607[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16274
static const MCOperandInfo OperandInfo608[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16275
static const MCOperandInfo OperandInfo609[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16276
static const MCOperandInfo OperandInfo610[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16277
static const MCOperandInfo OperandInfo611[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16278
static const MCOperandInfo OperandInfo612[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16279
static const MCOperandInfo OperandInfo613[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16280
static const MCOperandInfo OperandInfo614[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16281
static const MCOperandInfo OperandInfo615[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16282
static const MCOperandInfo OperandInfo616[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16283
static const MCOperandInfo OperandInfo617[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16284
static const MCOperandInfo OperandInfo618[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16285
static const MCOperandInfo OperandInfo619[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16286
static const MCOperandInfo OperandInfo620[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16287
static const MCOperandInfo OperandInfo621[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16288
static const MCOperandInfo OperandInfo622[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16289
static const MCOperandInfo OperandInfo623[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16290
static const MCOperandInfo OperandInfo624[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16291
static const MCOperandInfo OperandInfo625[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16292
static const MCOperandInfo OperandInfo626[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16293
static const MCOperandInfo OperandInfo627[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16294
static const MCOperandInfo OperandInfo628[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16295
static const MCOperandInfo OperandInfo629[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16296
static const MCOperandInfo OperandInfo630[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16297
static const MCOperandInfo OperandInfo631[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16298
static const MCOperandInfo OperandInfo632[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16299
static const MCOperandInfo OperandInfo633[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16300
static const MCOperandInfo OperandInfo634[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16301
static const MCOperandInfo OperandInfo635[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16302
static const MCOperandInfo OperandInfo636[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16303
static const MCOperandInfo OperandInfo637[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16304
static const MCOperandInfo OperandInfo638[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16305
static const MCOperandInfo OperandInfo639[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16306
static const MCOperandInfo OperandInfo640[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16307
static const MCOperandInfo OperandInfo641[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16308
static const MCOperandInfo OperandInfo642[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16309
static const MCOperandInfo OperandInfo643[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16310
static const MCOperandInfo OperandInfo644[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16311
static const MCOperandInfo OperandInfo645[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16312
static const MCOperandInfo OperandInfo646[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16313
static const MCOperandInfo OperandInfo647[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16314
static const MCOperandInfo OperandInfo648[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16315
static const MCOperandInfo OperandInfo649[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16316
static const MCOperandInfo OperandInfo650[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16317
static const MCOperandInfo OperandInfo651[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16318
static const MCOperandInfo OperandInfo652[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16319
static const MCOperandInfo OperandInfo653[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16320
static const MCOperandInfo OperandInfo654[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16321
static const MCOperandInfo OperandInfo655[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16322
static const MCOperandInfo OperandInfo656[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16323
static const MCOperandInfo OperandInfo657[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16324
static const MCOperandInfo OperandInfo658[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16325
static const MCOperandInfo OperandInfo659[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16326
static const MCOperandInfo OperandInfo660[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16327
static const MCOperandInfo OperandInfo661[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16328
static const MCOperandInfo OperandInfo662[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16329
static const MCOperandInfo OperandInfo663[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16330
static const MCOperandInfo OperandInfo664[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16331
static const MCOperandInfo OperandInfo665[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16332
static const MCOperandInfo OperandInfo666[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16333
static const MCOperandInfo OperandInfo667[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16334
static const MCOperandInfo OperandInfo668[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16335
static const MCOperandInfo OperandInfo669[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16336
static const MCOperandInfo OperandInfo670[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16337
static const MCOperandInfo OperandInfo671[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16338
static const MCOperandInfo OperandInfo672[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16339
static const MCOperandInfo OperandInfo673[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16340
static const MCOperandInfo OperandInfo674[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16341
static const MCOperandInfo OperandInfo675[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16342
static const MCOperandInfo OperandInfo676[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16343
static const MCOperandInfo OperandInfo677[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16344
static const MCOperandInfo OperandInfo678[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16345
static const MCOperandInfo OperandInfo679[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16346
static const MCOperandInfo OperandInfo680[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16347
static const MCOperandInfo OperandInfo681[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16348
static const MCOperandInfo OperandInfo682[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16349
static const MCOperandInfo OperandInfo683[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16350
static const MCOperandInfo OperandInfo684[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16351
static const MCOperandInfo OperandInfo685[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16352
static const MCOperandInfo OperandInfo686[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16353
static const MCOperandInfo OperandInfo687[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16354
static const MCOperandInfo OperandInfo688[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16355
static const MCOperandInfo OperandInfo689[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16356
static const MCOperandInfo OperandInfo690[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16357
static const MCOperandInfo OperandInfo691[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16358
static const MCOperandInfo OperandInfo692[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16359
static const MCOperandInfo OperandInfo693[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16360
static const MCOperandInfo OperandInfo694[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16361
static const MCOperandInfo OperandInfo695[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16362
static const MCOperandInfo OperandInfo696[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16363
static const MCOperandInfo OperandInfo697[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16364
static const MCOperandInfo OperandInfo698[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16365
static const MCOperandInfo OperandInfo699[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16366
static const MCOperandInfo OperandInfo700[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16367
static const MCOperandInfo OperandInfo701[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16368
static const MCOperandInfo OperandInfo702[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16369
static const MCOperandInfo OperandInfo703[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16370
static const MCOperandInfo OperandInfo704[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16371
static const MCOperandInfo OperandInfo705[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16372
static const MCOperandInfo OperandInfo706[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16373
static const MCOperandInfo OperandInfo707[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16374
static const MCOperandInfo OperandInfo708[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16375
static const MCOperandInfo OperandInfo709[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16376
static const MCOperandInfo OperandInfo710[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16377
static const MCOperandInfo OperandInfo711[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16378
static const MCOperandInfo OperandInfo712[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16379
static const MCOperandInfo OperandInfo713[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16380
static const MCOperandInfo OperandInfo714[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16381
static const MCOperandInfo OperandInfo715[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16382
static const MCOperandInfo OperandInfo716[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16383
static const MCOperandInfo OperandInfo717[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16384
static const MCOperandInfo OperandInfo718[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16385
static const MCOperandInfo OperandInfo719[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16386
static const MCOperandInfo OperandInfo720[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16387
static const MCOperandInfo OperandInfo721[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16388
static const MCOperandInfo OperandInfo722[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16389
static const MCOperandInfo OperandInfo723[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16390
static const MCOperandInfo OperandInfo724[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16391
static const MCOperandInfo OperandInfo725[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16392
static const MCOperandInfo OperandInfo726[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16393
static const MCOperandInfo OperandInfo727[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16394
static const MCOperandInfo OperandInfo728[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16395
static const MCOperandInfo OperandInfo729[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16396
static const MCOperandInfo OperandInfo730[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16397
static const MCOperandInfo OperandInfo731[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16398
static const MCOperandInfo OperandInfo732[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16399
static const MCOperandInfo OperandInfo733[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16400
static const MCOperandInfo OperandInfo734[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16401
static const MCOperandInfo OperandInfo735[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16402
static const MCOperandInfo OperandInfo736[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16403
static const MCOperandInfo OperandInfo737[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16404
static const MCOperandInfo OperandInfo738[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16405
static const MCOperandInfo OperandInfo739[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16406
static const MCOperandInfo OperandInfo740[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16407
static const MCOperandInfo OperandInfo741[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16408
static const MCOperandInfo OperandInfo742[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16409
static const MCOperandInfo OperandInfo743[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16410
static const MCOperandInfo OperandInfo744[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16411
static const MCOperandInfo OperandInfo745[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16412
static const MCOperandInfo OperandInfo746[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16413
static const MCOperandInfo OperandInfo747[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16414
static const MCOperandInfo OperandInfo748[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16415
static const MCOperandInfo OperandInfo749[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16416
static const MCOperandInfo OperandInfo750[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16417
static const MCOperandInfo OperandInfo751[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16418
static const MCOperandInfo OperandInfo752[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16419
static const MCOperandInfo OperandInfo753[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16420
static const MCOperandInfo OperandInfo754[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16421
static const MCOperandInfo OperandInfo755[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16422
static const MCOperandInfo OperandInfo756[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16423
static const MCOperandInfo OperandInfo757[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16424
static const MCOperandInfo OperandInfo758[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16425
static const MCOperandInfo OperandInfo759[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16426
static const MCOperandInfo OperandInfo760[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16427
static const MCOperandInfo OperandInfo761[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16428
static const MCOperandInfo OperandInfo762[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16429
static const MCOperandInfo OperandInfo763[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16430
static const MCOperandInfo OperandInfo764[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16431
static const MCOperandInfo OperandInfo765[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16432
static const MCOperandInfo OperandInfo766[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16433
static const MCOperandInfo OperandInfo767[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16434
static const MCOperandInfo OperandInfo768[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16435
static const MCOperandInfo OperandInfo769[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16436
static const MCOperandInfo OperandInfo770[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16437
static const MCOperandInfo OperandInfo771[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16438
static const MCOperandInfo OperandInfo772[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16439
static const MCOperandInfo OperandInfo773[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16440
static const MCOperandInfo OperandInfo774[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16441
static const MCOperandInfo OperandInfo775[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16442
static const MCOperandInfo OperandInfo776[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16443
static const MCOperandInfo OperandInfo777[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16444
static const MCOperandInfo OperandInfo778[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16445
static const MCOperandInfo OperandInfo779[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16446
static const MCOperandInfo OperandInfo780[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16447
static const MCOperandInfo OperandInfo781[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16448
static const MCOperandInfo OperandInfo782[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16449
static const MCOperandInfo OperandInfo783[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16450
static const MCOperandInfo OperandInfo784[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16451
static const MCOperandInfo OperandInfo785[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16452
static const MCOperandInfo OperandInfo786[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16453
static const MCOperandInfo OperandInfo787[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16454
static const MCOperandInfo OperandInfo788[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16455
static const MCOperandInfo OperandInfo789[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16456
static const MCOperandInfo OperandInfo790[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16457
static const MCOperandInfo OperandInfo791[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16458
static const MCOperandInfo OperandInfo792[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16459
static const MCOperandInfo OperandInfo793[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16460
static const MCOperandInfo OperandInfo794[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16461
static const MCOperandInfo OperandInfo795[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16462
static const MCOperandInfo OperandInfo796[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16463
static const MCOperandInfo OperandInfo797[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16464
static const MCOperandInfo OperandInfo798[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16465
static const MCOperandInfo OperandInfo799[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16466
static const MCOperandInfo OperandInfo800[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16467
static const MCOperandInfo OperandInfo801[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16468
static const MCOperandInfo OperandInfo802[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16469
static const MCOperandInfo OperandInfo803[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16470
static const MCOperandInfo OperandInfo804[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16471
static const MCOperandInfo OperandInfo805[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16472
static const MCOperandInfo OperandInfo806[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16473
static const MCOperandInfo OperandInfo807[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16474
static const MCOperandInfo OperandInfo808[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16475
static const MCOperandInfo OperandInfo809[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16476
static const MCOperandInfo OperandInfo810[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16477
static const MCOperandInfo OperandInfo811[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16478
static const MCOperandInfo OperandInfo812[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16479
static const MCOperandInfo OperandInfo813[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16480
static const MCOperandInfo OperandInfo814[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16481
static const MCOperandInfo OperandInfo815[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16482
static const MCOperandInfo OperandInfo816[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16483
static const MCOperandInfo OperandInfo817[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16484
static const MCOperandInfo OperandInfo818[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16485
static const MCOperandInfo OperandInfo819[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16486
static const MCOperandInfo OperandInfo820[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16487
static const MCOperandInfo OperandInfo821[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16488
static const MCOperandInfo OperandInfo822[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16489
static const MCOperandInfo OperandInfo823[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16490
static const MCOperandInfo OperandInfo824[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16491
static const MCOperandInfo OperandInfo825[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16492
static const MCOperandInfo OperandInfo826[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16493
static const MCOperandInfo OperandInfo827[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16494
static const MCOperandInfo OperandInfo828[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16495
static const MCOperandInfo OperandInfo829[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16496
static const MCOperandInfo OperandInfo830[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16497
static const MCOperandInfo OperandInfo831[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16498
static const MCOperandInfo OperandInfo832[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16499
static const MCOperandInfo OperandInfo833[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16500
static const MCOperandInfo OperandInfo834[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16501
static const MCOperandInfo OperandInfo835[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16502
static const MCOperandInfo OperandInfo836[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16503
static const MCOperandInfo OperandInfo837[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
16504
static const MCOperandInfo OperandInfo838[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16505
static const MCOperandInfo OperandInfo839[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16506
static const MCOperandInfo OperandInfo840[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16507
static const MCOperandInfo OperandInfo841[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16508
static const MCOperandInfo OperandInfo842[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16509
static const MCOperandInfo OperandInfo843[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16510
static const MCOperandInfo OperandInfo844[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16511
static const MCOperandInfo OperandInfo845[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16512
static const MCOperandInfo OperandInfo846[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16513
static const MCOperandInfo OperandInfo847[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16514
static const MCOperandInfo OperandInfo848[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16515
static const MCOperandInfo OperandInfo849[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16516
static const MCOperandInfo OperandInfo850[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16517
static const MCOperandInfo OperandInfo851[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16518
static const MCOperandInfo OperandInfo852[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16519
static const MCOperandInfo OperandInfo853[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16520
static const MCOperandInfo OperandInfo854[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16521
static const MCOperandInfo OperandInfo855[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16522
static const MCOperandInfo OperandInfo856[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16523
static const MCOperandInfo OperandInfo857[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16524
static const MCOperandInfo OperandInfo858[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16525
static const MCOperandInfo OperandInfo859[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16526
static const MCOperandInfo OperandInfo860[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16527
static const MCOperandInfo OperandInfo861[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16528
static const MCOperandInfo OperandInfo862[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16529
static const MCOperandInfo OperandInfo863[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16530
static const MCOperandInfo OperandInfo864[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16531
static const MCOperandInfo OperandInfo865[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16532
static const MCOperandInfo OperandInfo866[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16533
static const MCOperandInfo OperandInfo867[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16534
static const MCOperandInfo OperandInfo868[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16535
static const MCOperandInfo OperandInfo869[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16536
static const MCOperandInfo OperandInfo870[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16537
static const MCOperandInfo OperandInfo871[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16538
static const MCOperandInfo OperandInfo872[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16539
static const MCOperandInfo OperandInfo873[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16540
static const MCOperandInfo OperandInfo874[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16541
static const MCOperandInfo OperandInfo875[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16542
static const MCOperandInfo OperandInfo876[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16543
static const MCOperandInfo OperandInfo877[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16544
static const MCOperandInfo OperandInfo878[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16545
static const MCOperandInfo OperandInfo879[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16546
static const MCOperandInfo OperandInfo880[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16547
static const MCOperandInfo OperandInfo881[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16548
static const MCOperandInfo OperandInfo882[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16549
static const MCOperandInfo OperandInfo883[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16550
static const MCOperandInfo OperandInfo884[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16551
static const MCOperandInfo OperandInfo885[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16552
static const MCOperandInfo OperandInfo886[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16553
static const MCOperandInfo OperandInfo887[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16554
static const MCOperandInfo OperandInfo888[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16555
static const MCOperandInfo OperandInfo889[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16556
static const MCOperandInfo OperandInfo890[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16557
static const MCOperandInfo OperandInfo891[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16558
static const MCOperandInfo OperandInfo892[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16559
static const MCOperandInfo OperandInfo893[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16560
static const MCOperandInfo OperandInfo894[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16561
static const MCOperandInfo OperandInfo895[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16562
static const MCOperandInfo OperandInfo896[] = { { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16563
static const MCOperandInfo OperandInfo897[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16564
static const MCOperandInfo OperandInfo898[] = { { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16565
static const MCOperandInfo OperandInfo899[] = { { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16566
static const MCOperandInfo OperandInfo900[] = { { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16567
static const MCOperandInfo OperandInfo901[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16568
static const MCOperandInfo OperandInfo902[] = { { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16569
static const MCOperandInfo OperandInfo903[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16570
static const MCOperandInfo OperandInfo904[] = { { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16571
static const MCOperandInfo OperandInfo905[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16572
static const MCOperandInfo OperandInfo906[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16573
static const MCOperandInfo OperandInfo907[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16574
static const MCOperandInfo OperandInfo908[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16575
static const MCOperandInfo OperandInfo909[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16576
static const MCOperandInfo OperandInfo910[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16577
static const MCOperandInfo OperandInfo911[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16578
static const MCOperandInfo OperandInfo912[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16579
static const MCOperandInfo OperandInfo913[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16580
static const MCOperandInfo OperandInfo914[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16581
static const MCOperandInfo OperandInfo915[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16582
static const MCOperandInfo OperandInfo916[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16583
static const MCOperandInfo OperandInfo917[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16584
static const MCOperandInfo OperandInfo918[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16585
static const MCOperandInfo OperandInfo919[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16586
static const MCOperandInfo OperandInfo920[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16587
static const MCOperandInfo OperandInfo921[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16588
static const MCOperandInfo OperandInfo922[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16589
static const MCOperandInfo OperandInfo923[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16590
static const MCOperandInfo OperandInfo924[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16591
static const MCOperandInfo OperandInfo925[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16592
static const MCOperandInfo OperandInfo926[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16593
static const MCOperandInfo OperandInfo927[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16594
static const MCOperandInfo OperandInfo928[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16595
static const MCOperandInfo OperandInfo929[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16596
static const MCOperandInfo OperandInfo930[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16597
static const MCOperandInfo OperandInfo931[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16598
static const MCOperandInfo OperandInfo932[] = { { X86::GR32_NOAXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16599
16600
extern const MCInstrDesc X86Insts[] = {
16601
  { 0,  0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #0 = PHI
16602
  { 1,  0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1 = INLINEASM
16603
  { 2,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #2 = CFI_INSTRUCTION
16604
  { 3,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #3 = EH_LABEL
16605
  { 4,  1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #4 = GC_LABEL
16606
  { 5,  0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #5 = KILL
16607
  { 6,  3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #6 = EXTRACT_SUBREG
16608
  { 7,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr },  // Inst #7 = INSERT_SUBREG
16609
  { 8,  1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr },  // Inst #8 = IMPLICIT_DEF
16610
  { 9,  4,  1,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo6, -1 ,nullptr },  // Inst #9 = SUBREG_TO_REG
16611
  { 10, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr },  // Inst #10 = COPY_TO_REGCLASS
16612
  { 11, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #11 = DBG_VALUE
16613
  { 12, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #12 = REG_SEQUENCE
16614
  { 13, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr },  // Inst #13 = COPY
16615
  { 14, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #14 = BUNDLE
16616
  { 15, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #15 = LIFETIME_START
16617
  { 16, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #16 = LIFETIME_END
16618
  { 17, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #17 = STACKMAP
16619
  { 18, 6,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo9, -1 ,nullptr },  // Inst #18 = PATCHPOINT
16620
  { 19, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo10, -1 ,nullptr },  // Inst #19 = LOAD_STACK_GUARD
16621
  { 20, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #20 = STATEPOINT
16622
  { 21, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr },  // Inst #21 = LOCAL_ESCAPE
16623
  { 22, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr },  // Inst #22 = FAULTING_LOAD_OP
16624
  { 23, 3,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr },  // Inst #23 = G_ADD
16625
  { 24, 0,  0,  0,  1,  0, 0x1b80000001ULL, ImplicitList1, ImplicitList2, nullptr, -1 ,nullptr },  // Inst #24 = AAA
16626
  { 25, 1,  0,  0,  2,  0, 0x6a80040001ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #25 = AAD8i8
16627
  { 26, 1,  0,  0,  3,  0, 0x6a00040001ULL, ImplicitList4, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #26 = AAM8i8
16628
  { 27, 0,  0,  0,  4,  0, 0x1f80000001ULL, ImplicitList1, ImplicitList2, nullptr, -1 ,nullptr },  // Inst #27 = AAS
16629
  { 28, 0,  0,  0,  758,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000041ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr },  // Inst #28 = ABS_F
16630
  { 29, 2,  1,  0,  758,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr },  // Inst #29 = ABS_Fp32
16631
  { 30, 2,  1,  0,  758,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr },  // Inst #30 = ABS_Fp64
16632
  { 31, 2,  1,  0,  758,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr },  // Inst #31 = ABS_Fp80
16633
  { 32, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #32 = ACQUIRE_MOV16rm
16634
  { 33, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #33 = ACQUIRE_MOV32rm
16635
  { 34, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #34 = ACQUIRE_MOV64rm
16636
  { 35, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #35 = ACQUIRE_MOV8rm
16637
  { 36, 1,  0,  0,  5,  0, 0xa800c0081ULL, ImplicitList2, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #36 = ADC16i16
16638
  { 37, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c009aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #37 = ADC16mi
16639
  { 38, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004009aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #38 = ADC16mi8
16640
  { 39, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880000084ULL, ImplicitList6, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #39 = ADC16mr
16641
  { 40, 3,  1,  0,  614,  0, 0x40800c0092ULL, ImplicitList6, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #40 = ADC16ri
16642
  { 41, 3,  1,  0,  614,  0, 0x4180040092ULL, ImplicitList6, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #41 = ADC16ri8
16643
  { 42, 7,  1,  0,  615,  0|(1ULL<<MCID::MayLoad), 0x980000086ULL, ImplicitList6, ImplicitList6, OperandInfo23, -1 ,nullptr },  // Inst #42 = ADC16rm
16644
  { 43, 3,  1,  0,  614,  0|(1ULL<<MCID::Commutable), 0x880000083ULL, ImplicitList6, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #43 = ADC16rr
16645
  { 44, 3,  1,  0,  614,  0, 0x980000085ULL, ImplicitList6, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #44 = ADC16rr_REV
16646
  { 45, 1,  0,  0,  5,  0, 0xa80140101ULL, ImplicitList7, ImplicitList7, OperandInfo2, -1 ,nullptr },  // Inst #45 = ADC32i32
16647
  { 46, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408014011aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #46 = ADC32mi
16648
  { 47, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004011aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #47 = ADC32mi8
16649
  { 48, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880000104ULL, ImplicitList6, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #48 = ADC32mr
16650
  { 49, 3,  1,  0,  614,  0, 0x4080140112ULL, ImplicitList6, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #49 = ADC32ri
16651
  { 50, 3,  1,  0,  614,  0, 0x4180040112ULL, ImplicitList6, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #50 = ADC32ri8
16652
  { 51, 7,  1,  0,  615,  0|(1ULL<<MCID::MayLoad), 0x980000106ULL, ImplicitList6, ImplicitList6, OperandInfo27, -1 ,nullptr },  // Inst #51 = ADC32rm
16653
  { 52, 3,  1,  0,  614,  0|(1ULL<<MCID::Commutable), 0x880000103ULL, ImplicitList6, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #52 = ADC32rr
16654
  { 53, 3,  1,  0,  614,  0, 0x980000105ULL, ImplicitList6, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #53 = ADC32rr_REV
16655
  { 54, 1,  0,  0,  5,  0, 0xa801e0001ULL, ImplicitList8, ImplicitList8, OperandInfo2, -1 ,nullptr },  // Inst #54 = ADC64i32
16656
  { 55, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e001aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #55 = ADC64mi32
16657
  { 56, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418006001aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #56 = ADC64mi8
16658
  { 57, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880020004ULL, ImplicitList6, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #57 = ADC64mr
16659
  { 58, 3,  1,  0,  614,  0, 0x40801e0012ULL, ImplicitList6, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #58 = ADC64ri32
16660
  { 59, 3,  1,  0,  614,  0, 0x4180060012ULL, ImplicitList6, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #59 = ADC64ri8
16661
  { 60, 7,  1,  0,  615,  0|(1ULL<<MCID::MayLoad), 0x980020006ULL, ImplicitList6, ImplicitList6, OperandInfo31, -1 ,nullptr },  // Inst #60 = ADC64rm
16662
  { 61, 3,  1,  0,  614,  0|(1ULL<<MCID::Commutable), 0x880020003ULL, ImplicitList6, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #61 = ADC64rr
16663
  { 62, 3,  1,  0,  614,  0, 0x980020005ULL, ImplicitList6, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #62 = ADC64rr_REV
16664
  { 63, 1,  0,  0,  5,  0, 0xa00040001ULL, ImplicitList1, ImplicitList1, OperandInfo2, -1 ,nullptr },  // Inst #63 = ADC8i8
16665
  { 64, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400004001aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #64 = ADC8mi
16666
  { 65, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x410004001aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #65 = ADC8mi8
16667
  { 66, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x800000004ULL, ImplicitList6, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #66 = ADC8mr
16668
  { 67, 3,  1,  0,  614,  0, 0x4000040012ULL, ImplicitList6, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #67 = ADC8ri
16669
  { 68, 3,  1,  0,  614,  0, 0x4100040012ULL, ImplicitList6, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #68 = ADC8ri8
16670
  { 69, 7,  1,  0,  615,  0|(1ULL<<MCID::MayLoad), 0x900000006ULL, ImplicitList6, ImplicitList6, OperandInfo35, -1 ,nullptr },  // Inst #69 = ADC8rm
16671
  { 70, 3,  1,  0,  614,  0|(1ULL<<MCID::Commutable), 0x800000003ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #70 = ADC8rr
16672
  { 71, 3,  1,  0,  614,  0, 0x900000005ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #71 = ADC8rr_REV
16673
  { 72, 7,  1,  0,  8,  0|(1ULL<<MCID::MayLoad), 0x7b00009006ULL, ImplicitList6, ImplicitList6, OperandInfo27, -1 ,nullptr },  // Inst #72 = ADCX32rm
16674
  { 73, 3,  1,  0,  5,  0, 0x7b00009005ULL, ImplicitList6, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #73 = ADCX32rr
16675
  { 74, 7,  1,  0,  8,  0|(1ULL<<MCID::MayLoad), 0x7b00029006ULL, ImplicitList6, ImplicitList6, OperandInfo31, -1 ,nullptr },  // Inst #74 = ADCX64rm
16676
  { 75, 3,  1,  0,  5,  0, 0x7b00029005ULL, ImplicitList6, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #75 = ADCX64rr
16677
  { 76, 1,  0,  0,  9,  0, 0x2800c0081ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #76 = ADD16i16
16678
  { 77, 6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c0098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #77 = ADD16mi
16679
  { 78, 6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #78 = ADD16mi8
16680
  { 79, 6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #79 = ADD16mr
16681
  { 80, 3,  1,  0,  9,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x40800c0090ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #80 = ADD16ri
16682
  { 81, 3,  1,  0,  9,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180040090ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #81 = ADD16ri8
16683
  { 82, 3,  1,  0,  11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #82 = ADD16ri8_DB
16684
  { 83, 3,  1,  0,  11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #83 = ADD16ri_DB
16685
  { 84, 7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x180000086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr },  // Inst #84 = ADD16rm
16686
  { 85, 3,  1,  0,  9,  0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x80000083ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #85 = ADD16rr
16687
  { 86, 3,  1,  0,  11, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #86 = ADD16rr_DB
16688
  { 87, 3,  1,  0,  9,  0, 0x180000085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #87 = ADD16rr_REV
16689
  { 88, 1,  0,  0,  9,  0, 0x280140101ULL, ImplicitList9, ImplicitList7, OperandInfo2, -1 ,nullptr },  // Inst #88 = ADD32i32
16690
  { 89, 6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080140118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #89 = ADD32mi
16691
  { 90, 6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #90 = ADD32mi8
16692
  { 91, 6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #91 = ADD32mr
16693
  { 92, 3,  1,  0,  9,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4080140110ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #92 = ADD32ri
16694
  { 93, 3,  1,  0,  9,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180040110ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #93 = ADD32ri8
16695
  { 94, 3,  1,  0,  11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #94 = ADD32ri8_DB
16696
  { 95, 3,  1,  0,  11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #95 = ADD32ri_DB
16697
  { 96, 7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x180000106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr },  // Inst #96 = ADD32rm
16698
  { 97, 3,  1,  0,  9,  0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x80000103ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #97 = ADD32rr
16699
  { 98, 3,  1,  0,  11, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #98 = ADD32rr_DB
16700
  { 99, 3,  1,  0,  9,  0, 0x180000105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #99 = ADD32rr_REV
16701
  { 100,  1,  0,  0,  9,  0, 0x2801e0001ULL, ImplicitList10, ImplicitList8, OperandInfo2, -1 ,nullptr },  // Inst #100 = ADD64i32
16702
  { 101,  6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e0018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #101 = ADD64mi32
16703
  { 102,  6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #102 = ADD64mi8
16704
  { 103,  6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #103 = ADD64mr
16705
  { 104,  3,  1,  0,  9,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x40801e0010ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #104 = ADD64ri32
16706
  { 105,  3,  1,  0,  11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #105 = ADD64ri32_DB
16707
  { 106,  3,  1,  0,  9,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180060010ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #106 = ADD64ri8
16708
  { 107,  3,  1,  0,  11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #107 = ADD64ri8_DB
16709
  { 108,  7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x180020006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr },  // Inst #108 = ADD64rm
16710
  { 109,  3,  1,  0,  9,  0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x80020003ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #109 = ADD64rr
16711
  { 110,  3,  1,  0,  11, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #110 = ADD64rr_DB
16712
  { 111,  3,  1,  0,  9,  0, 0x180020005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #111 = ADD64rr_REV
16713
  { 112,  1,  0,  0,  9,  0, 0x200040001ULL, ImplicitList4, ImplicitList1, OperandInfo2, -1 ,nullptr },  // Inst #112 = ADD8i8
16714
  { 113,  6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #113 = ADD8mi
16715
  { 114,  6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #114 = ADD8mi8
16716
  { 115,  6,  0,  0,  613,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #115 = ADD8mr
16717
  { 116,  3,  1,  0,  9,  0, 0x4000040010ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #116 = ADD8ri
16718
  { 117,  3,  1,  0,  9,  0, 0x4100040010ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #117 = ADD8ri8
16719
  { 118,  7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x100000006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr },  // Inst #118 = ADD8rm
16720
  { 119,  3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x3ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #119 = ADD8rr
16721
  { 120,  3,  1,  0,  9,  0, 0x100000005ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #120 = ADD8rr_REV
16722
  { 121,  7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x2c10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #121 = ADDPDrm
16723
  { 122,  3,  1,  0,  14, 0|(1ULL<<MCID::Commutable), 0x2c10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #122 = ADDPDrr
16724
  { 123,  7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x2c08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #123 = ADDPSrm
16725
  { 124,  3,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x2c08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #124 = ADDPSrr
16726
  { 125,  7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x2c10006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #125 = ADDSDrm
16727
  { 126,  7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x2c10006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #126 = ADDSDrm_Int
16728
  { 127,  3,  1,  0,  18, 0|(1ULL<<MCID::Commutable), 0x2c10006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #127 = ADDSDrr
16729
  { 128,  3,  1,  0,  18, 0, 0x2c10006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #128 = ADDSDrr_Int
16730
  { 129,  7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x2c08005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #129 = ADDSSrm
16731
  { 130,  7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x2c08005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #130 = ADDSSrm_Int
16732
  { 131,  3,  1,  0,  20, 0|(1ULL<<MCID::Commutable), 0x2c08005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #131 = ADDSSrr
16733
  { 132,  3,  1,  0,  20, 0, 0x2c08005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #132 = ADDSSrr_Int
16734
  { 133,  7,  1,  0,  21, 0|(1ULL<<MCID::MayLoad), 0x6810005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #133 = ADDSUBPDrm
16735
  { 134,  3,  1,  0,  14, 0, 0x6810005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #134 = ADDSUBPDrr
16736
  { 135,  7,  1,  0,  22, 0|(1ULL<<MCID::MayLoad), 0x6808006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #135 = ADDSUBPSrm
16737
  { 136,  3,  1,  0,  16, 0, 0x6808006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #136 = ADDSUBPSrr
16738
  { 137,  5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #137 = ADD_F32m
16739
  { 138,  5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #138 = ADD_F64m
16740
  { 139,  5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #139 = ADD_FI16m
16741
  { 140,  5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #140 = ADD_FI32m
16742
  { 141,  1,  0,  0,  24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000010ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #141 = ADD_FPrST0
16743
  { 142,  1,  0,  0,  24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000010ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #142 = ADD_FST0r
16744
  { 143,  3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo45, -1 ,nullptr },  // Inst #143 = ADD_Fp32
16745
  { 144,  7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #144 = ADD_Fp32m
16746
  { 145,  3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo47, -1 ,nullptr },  // Inst #145 = ADD_Fp64
16747
  { 146,  7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #146 = ADD_Fp64m
16748
  { 147,  7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #147 = ADD_Fp64m32
16749
  { 148,  3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo49, -1 ,nullptr },  // Inst #148 = ADD_Fp80
16750
  { 149,  7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #149 = ADD_Fp80m32
16751
  { 150,  7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #150 = ADD_Fp80m64
16752
  { 151,  7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #151 = ADD_FpI16m32
16753
  { 152,  7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #152 = ADD_FpI16m64
16754
  { 153,  7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #153 = ADD_FpI16m80
16755
  { 154,  7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #154 = ADD_FpI32m32
16756
  { 155,  7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #155 = ADD_FpI32m64
16757
  { 156,  7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #156 = ADD_FpI32m80
16758
  { 157,  1,  0,  0,  24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000010ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #157 = ADD_FrST0
16759
  { 158,  2,  0,  0,  0,  0, 0x0ULL, ImplicitList11, ImplicitList12, OperandInfo8, -1 ,nullptr },  // Inst #158 = ADJCALLSTACKDOWN32
16760
  { 159,  2,  0,  0,  0,  0, 0x0ULL, ImplicitList13, ImplicitList14, OperandInfo8, -1 ,nullptr },  // Inst #159 = ADJCALLSTACKDOWN64
16761
  { 160,  2,  0,  0,  0,  0, 0x0ULL, ImplicitList11, ImplicitList12, OperandInfo8, -1 ,nullptr },  // Inst #160 = ADJCALLSTACKUP32
16762
  { 161,  2,  0,  0,  0,  0, 0x0ULL, ImplicitList13, ImplicitList14, OperandInfo8, -1 ,nullptr },  // Inst #161 = ADJCALLSTACKUP64
16763
  { 162,  6,  1,  0,  25, 0|(1ULL<<MCID::MayLoad), 0x7b00009806ULL, ImplicitList6, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #162 = ADOX32rm
16764
  { 163,  2,  1,  0,  9,  0, 0x7b00009805ULL, ImplicitList6, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #163 = ADOX32rr
16765
  { 164,  6,  1,  0,  25, 0|(1ULL<<MCID::MayLoad), 0x7b00029806ULL, ImplicitList6, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #164 = ADOX64rm
16766
  { 165,  2,  1,  0,  9,  0, 0x7b00029805ULL, ImplicitList6, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #165 = ADOX64rr
16767
  { 166,  7,  1,  0,  26, 0|(1ULL<<MCID::MayLoad), 0x6f98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #166 = AESDECLASTrm
16768
  { 167,  3,  1,  0,  27, 0, 0x6f98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #167 = AESDECLASTrr
16769
  { 168,  7,  1,  0,  26, 0|(1ULL<<MCID::MayLoad), 0x6f18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #168 = AESDECrm
16770
  { 169,  3,  1,  0,  27, 0, 0x6f18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #169 = AESDECrr
16771
  { 170,  7,  1,  0,  26, 0|(1ULL<<MCID::MayLoad), 0x6e98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #170 = AESENCLASTrm
16772
  { 171,  3,  1,  0,  27, 0, 0x6e98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #171 = AESENCLASTrr
16773
  { 172,  7,  1,  0,  26, 0|(1ULL<<MCID::MayLoad), 0x6e18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #172 = AESENCrm
16774
  { 173,  3,  1,  0,  27, 0, 0x6e18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #173 = AESENCrr
16775
  { 174,  6,  1,  0,  28, 0|(1ULL<<MCID::MayLoad), 0x6d98009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #174 = AESIMCrm
16776
  { 175,  2,  1,  0,  29, 0, 0x6d98009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #175 = AESIMCrr
16777
  { 176,  7,  1,  0,  30, 0|(1ULL<<MCID::MayLoad), 0x6f9804d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #176 = AESKEYGENASSIST128rm
16778
  { 177,  3,  1,  0,  31, 0, 0x6f9804d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #177 = AESKEYGENASSIST128rr
16779
  { 178,  1,  0,  0,  9,  0, 0x12800c0081ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #178 = AND16i16
16780
  { 179,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c009cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #179 = AND16mi
16781
  { 180,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004009cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #180 = AND16mi8
16782
  { 181,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #181 = AND16mr
16783
  { 182,  3,  1,  0,  9,  0, 0x40800c0094ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #182 = AND16ri
16784
  { 183,  3,  1,  0,  9,  0, 0x4180040094ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #183 = AND16ri8
16785
  { 184,  7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x1180000086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr },  // Inst #184 = AND16rm
16786
  { 185,  3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x1080000083ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #185 = AND16rr
16787
  { 186,  3,  1,  0,  9,  0, 0x1180000085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #186 = AND16rr_REV
16788
  { 187,  1,  0,  0,  9,  0, 0x1280140101ULL, ImplicitList9, ImplicitList7, OperandInfo2, -1 ,nullptr },  // Inst #187 = AND32i32
16789
  { 188,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408014011cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #188 = AND32mi
16790
  { 189,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004011cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #189 = AND32mi8
16791
  { 190,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #190 = AND32mr
16792
  { 191,  3,  1,  0,  9,  0, 0x4080140114ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #191 = AND32ri
16793
  { 192,  3,  1,  0,  9,  0, 0x4180040114ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #192 = AND32ri8
16794
  { 193,  7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x1180000106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr },  // Inst #193 = AND32rm
16795
  { 194,  3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x1080000103ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #194 = AND32rr
16796
  { 195,  3,  1,  0,  9,  0, 0x1180000105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #195 = AND32rr_REV
16797
  { 196,  1,  0,  0,  9,  0, 0x12801e0001ULL, ImplicitList10, ImplicitList8, OperandInfo2, -1 ,nullptr },  // Inst #196 = AND64i32
16798
  { 197,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #197 = AND64mi32
16799
  { 198,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418006001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #198 = AND64mi8
16800
  { 199,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #199 = AND64mr
16801
  { 200,  3,  1,  0,  9,  0, 0x40801e0014ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #200 = AND64ri32
16802
  { 201,  3,  1,  0,  9,  0, 0x4180060014ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #201 = AND64ri8
16803
  { 202,  7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x1180020006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr },  // Inst #202 = AND64rm
16804
  { 203,  3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x1080020003ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #203 = AND64rr
16805
  { 204,  3,  1,  0,  9,  0, 0x1180020005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #204 = AND64rr_REV
16806
  { 205,  1,  0,  0,  9,  0, 0x1200040001ULL, ImplicitList4, ImplicitList1, OperandInfo2, -1 ,nullptr },  // Inst #205 = AND8i8
16807
  { 206,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400004001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #206 = AND8mi
16808
  { 207,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x410004001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #207 = AND8mi8
16809
  { 208,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1000000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #208 = AND8mr
16810
  { 209,  3,  1,  0,  9,  0, 0x4000040014ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #209 = AND8ri
16811
  { 210,  3,  1,  0,  9,  0, 0x4100040014ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #210 = AND8ri8
16812
  { 211,  7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x1100000006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr },  // Inst #211 = AND8rm
16813
  { 212,  3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x1000000003ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #212 = AND8rr
16814
  { 213,  3,  1,  0,  9,  0, 0x1100000005ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #213 = AND8rr_REV
16815
  { 214,  7,  1,  0,  697,  0|(1ULL<<MCID::MayLoad), 0x17920008806ULL, nullptr, ImplicitList6, OperandInfo57, -1 ,nullptr },  // Inst #214 = ANDN32rm
16816
  { 215,  3,  1,  0,  696,  0, 0x17920008805ULL, nullptr, ImplicitList6, OperandInfo58, -1 ,nullptr },  // Inst #215 = ANDN32rr
16817
  { 216,  7,  1,  0,  697,  0|(1ULL<<MCID::MayLoad), 0x1f920008806ULL, nullptr, ImplicitList6, OperandInfo59, -1 ,nullptr },  // Inst #216 = ANDN64rm
16818
  { 217,  3,  1,  0,  696,  0, 0x1f920008805ULL, nullptr, ImplicitList6, OperandInfo60, -1 ,nullptr },  // Inst #217 = ANDN64rr
16819
  { 218,  7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x2a90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #218 = ANDNPDrm
16820
  { 219,  3,  1,  0,  941,  0, 0x2a90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #219 = ANDNPDrr
16821
  { 220,  7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x2a88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #220 = ANDNPSrm
16822
  { 221,  3,  1,  0,  941,  0, 0x2a88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #221 = ANDNPSrr
16823
  { 222,  7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x2a10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #222 = ANDPDrm
16824
  { 223,  3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x2a10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #223 = ANDPDrr
16825
  { 224,  7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x2a08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #224 = ANDPSrm
16826
  { 225,  3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x2a08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #225 = ANDPSrr
16827
  { 226,  6,  0,  0,  34, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3180000004ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #226 = ARPL16mr
16828
  { 227,  2,  1,  0,  35, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3180000003ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #227 = ARPL16rr
16829
  { 228,  1,  1,  0,  36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #228 = AVX2_SETALLONES
16830
  { 229,  1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr },  // Inst #229 = AVX512_512_SET0
16831
  { 230,  1,  1,  0,  36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr },  // Inst #230 = AVX_SET0
16832
  { 231,  7,  1,  0,  701,  0|(1ULL<<MCID::MayLoad), 0x27ba0008806ULL, nullptr, ImplicitList6, OperandInfo64, -1 ,nullptr },  // Inst #231 = BEXTR32rm
16833
  { 232,  3,  1,  0,  700,  0, 0x27ba0008805ULL, nullptr, ImplicitList6, OperandInfo58, -1 ,nullptr },  // Inst #232 = BEXTR32rr
16834
  { 233,  7,  1,  0,  701,  0|(1ULL<<MCID::MayLoad), 0x2fba0008806ULL, nullptr, ImplicitList6, OperandInfo65, -1 ,nullptr },  // Inst #233 = BEXTR64rm
16835
  { 234,  3,  1,  0,  700,  0, 0x2fba0008805ULL, nullptr, ImplicitList6, OperandInfo60, -1 ,nullptr },  // Inst #234 = BEXTR64rr
16836
  { 235,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x840158806ULL, nullptr, ImplicitList6, OperandInfo66, -1 ,nullptr },  // Inst #235 = BEXTRI32mi
16837
  { 236,  3,  1,  0,  0,  0, 0x840158805ULL, nullptr, ImplicitList6, OperandInfo67, -1 ,nullptr },  // Inst #236 = BEXTRI32ri
16838
  { 237,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x88401d8806ULL, nullptr, ImplicitList6, OperandInfo68, -1 ,nullptr },  // Inst #237 = BEXTRI64mi
16839
  { 238,  3,  1,  0,  0,  0, 0x88401d8805ULL, nullptr, ImplicitList6, OperandInfo69, -1 ,nullptr },  // Inst #238 = BEXTRI64ri
16840
  { 239,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100c0014819ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #239 = BLCFILL32rm
16841
  { 240,  2,  1,  0,  0,  0, 0x100c0014811ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #240 = BLCFILL32rr
16842
  { 241,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x180c0014819ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #241 = BLCFILL64rm
16843
  { 242,  2,  1,  0,  0,  0, 0x180c0014811ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #242 = BLCFILL64rr
16844
  { 243,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1014001481eULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #243 = BLCI32rm
16845
  { 244,  2,  1,  0,  0,  0, 0x10140014816ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #244 = BLCI32rr
16846
  { 245,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1814001481eULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #245 = BLCI64rm
16847
  { 246,  2,  1,  0,  0,  0, 0x18140014816ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #246 = BLCI64rr
16848
  { 247,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100c001481dULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #247 = BLCIC32rm
16849
  { 248,  2,  1,  0,  0,  0, 0x100c0014815ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #248 = BLCIC32rr
16850
  { 249,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x180c001481dULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #249 = BLCIC64rm
16851
  { 250,  2,  1,  0,  0,  0, 0x180c0014815ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #250 = BLCIC64rr
16852
  { 251,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10140014819ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #251 = BLCMSK32rm
16853
  { 252,  2,  1,  0,  0,  0, 0x10140014811ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #252 = BLCMSK32rr
16854
  { 253,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x18140014819ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #253 = BLCMSK64rm
16855
  { 254,  2,  1,  0,  0,  0, 0x18140014811ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #254 = BLCMSK64rr
16856
  { 255,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100c001481bULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #255 = BLCS32rm
16857
  { 256,  2,  1,  0,  0,  0, 0x100c0014813ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #256 = BLCS32rr
16858
  { 257,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x180c001481bULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #257 = BLCS64rm
16859
  { 258,  2,  1,  0,  0,  0, 0x180c0014813ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #258 = BLCS64rr
16860
  { 259,  8,  1,  0,  37, 0|(1ULL<<MCID::MayLoad), 0x69004d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #259 = BLENDPDrmi
16861
  { 260,  4,  1,  0,  38, 0|(1ULL<<MCID::Commutable), 0x69004d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #260 = BLENDPDrri
16862
  { 261,  8,  1,  0,  37, 0|(1ULL<<MCID::MayLoad), 0x60804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #261 = BLENDPSrmi
16863
  { 262,  4,  1,  0,  38, 0|(1ULL<<MCID::Commutable), 0x60804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #262 = BLENDPSrri
16864
  { 263,  7,  1,  0,  844,  0|(1ULL<<MCID::MayLoad), 0xa90009006ULL, ImplicitList15, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #263 = BLENDVPDrm0
16865
  { 264,  3,  1,  0,  843,  0, 0xa90009005ULL, ImplicitList15, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #264 = BLENDVPDrr0
16866
  { 265,  7,  1,  0,  844,  0|(1ULL<<MCID::MayLoad), 0xa08009006ULL, ImplicitList15, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #265 = BLENDVPSrm0
16867
  { 266,  3,  1,  0,  843,  0, 0xa08009005ULL, ImplicitList15, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #266 = BLENDVPSrr0
16868
  { 267,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100c001481aULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #267 = BLSFILL32rm
16869
  { 268,  2,  1,  0,  0,  0, 0x100c0014812ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #268 = BLSFILL32rr
16870
  { 269,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x180c001481aULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #269 = BLSFILL64rm
16871
  { 270,  2,  1,  0,  0,  0, 0x180c0014812ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #270 = BLSFILL64rr
16872
  { 271,  6,  1,  0,  699,  0|(1ULL<<MCID::MayLoad), 0x179a000881bULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #271 = BLSI32rm
16873
  { 272,  2,  1,  0,  698,  0, 0x179a0008813ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #272 = BLSI32rr
16874
  { 273,  6,  1,  0,  699,  0|(1ULL<<MCID::MayLoad), 0x1f9a000881bULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #273 = BLSI64rm
16875
  { 274,  2,  1,  0,  698,  0, 0x1f9a0008813ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #274 = BLSI64rr
16876
  { 275,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100c001481eULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #275 = BLSIC32rm
16877
  { 276,  2,  1,  0,  0,  0, 0x100c0014816ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #276 = BLSIC32rr
16878
  { 277,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x180c001481eULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #277 = BLSIC64rm
16879
  { 278,  2,  1,  0,  0,  0, 0x180c0014816ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #278 = BLSIC64rr
16880
  { 279,  6,  1,  0,  699,  0|(1ULL<<MCID::MayLoad), 0x179a000881aULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #279 = BLSMSK32rm
16881
  { 280,  2,  1,  0,  698,  0, 0x179a0008812ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #280 = BLSMSK32rr
16882
  { 281,  6,  1,  0,  699,  0|(1ULL<<MCID::MayLoad), 0x1f9a000881aULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #281 = BLSMSK64rm
16883
  { 282,  2,  1,  0,  698,  0, 0x1f9a0008812ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #282 = BLSMSK64rr
16884
  { 283,  6,  1,  0,  699,  0|(1ULL<<MCID::MayLoad), 0x179a0008819ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #283 = BLSR32rm
16885
  { 284,  2,  1,  0,  698,  0, 0x179a0008811ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #284 = BLSR32rr
16886
  { 285,  6,  1,  0,  699,  0|(1ULL<<MCID::MayLoad), 0x1f9a0008819ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #285 = BLSR64rm
16887
  { 286,  2,  1,  0,  698,  0, 0x1f9a0008811ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #286 = BLSR64rr
16888
  { 287,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00005806ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #287 = BNDCL32rm
16889
  { 288,  2,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00005805ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #288 = BNDCL32rr
16890
  { 289,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00025806ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #289 = BNDCL64rm
16891
  { 290,  2,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00025805ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #290 = BNDCL64rr
16892
  { 291,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80006006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #291 = BNDCN32rm
16893
  { 292,  2,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80006005ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #292 = BNDCN32rr
16894
  { 293,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80026006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #293 = BNDCN64rm
16895
  { 294,  2,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80026005ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #294 = BNDCN64rr
16896
  { 295,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00006006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #295 = BNDCU32rm
16897
  { 296,  2,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00006005ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr },  // Inst #296 = BNDCU32rr
16898
  { 297,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00026006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #297 = BNDCU64rm
16899
  { 298,  2,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00026005ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr },  // Inst #298 = BNDCU64rr
16900
  { 299,  6,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00004806ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #299 = BNDLDXrm
16901
  { 300,  6,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80005806ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #300 = BNDMK32rm
16902
  { 301,  6,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80025806ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #301 = BNDMK64rm
16903
  { 302,  6,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80005004ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr },  // Inst #302 = BNDMOVMR32mr
16904
  { 303,  6,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80025004ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr },  // Inst #303 = BNDMOVMR64mr
16905
  { 304,  2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80005003ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr },  // Inst #304 = BNDMOVMRrr
16906
  { 305,  6,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00005006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #305 = BNDMOVRM32rm
16907
  { 306,  6,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00025006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr },  // Inst #306 = BNDMOVRM64rm
16908
  { 307,  2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00005005ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr },  // Inst #307 = BNDMOVRMrr
16909
  { 308,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80004804ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr },  // Inst #308 = BNDSTXmr
16910
  { 309,  6,  1,  0,  715,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3100000086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #309 = BOUNDS16rm
16911
  { 310,  6,  1,  0,  715,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3100000106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #310 = BOUNDS32rm
16912
  { 311,  6,  1,  0,  689,  0|(1ULL<<MCID::MayLoad), 0x5e00004886ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr },  // Inst #311 = BSF16rm
16913
  { 312,  2,  1,  0,  688,  0, 0x5e00004885ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #312 = BSF16rr
16914
  { 313,  6,  1,  0,  689,  0|(1ULL<<MCID::MayLoad), 0x5e00004906ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #313 = BSF32rm
16915
  { 314,  2,  1,  0,  688,  0, 0x5e00004905ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #314 = BSF32rr
16916
  { 315,  6,  1,  0,  689,  0|(1ULL<<MCID::MayLoad), 0x5e00024806ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #315 = BSF64rm
16917
  { 316,  2,  1,  0,  688,  0, 0x5e00024805ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #316 = BSF64rr
16918
  { 317,  6,  1,  0,  689,  0|(1ULL<<MCID::MayLoad), 0x5e80004886ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr },  // Inst #317 = BSR16rm
16919
  { 318,  2,  1,  0,  688,  0, 0x5e80004885ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #318 = BSR16rr
16920
  { 319,  6,  1,  0,  689,  0|(1ULL<<MCID::MayLoad), 0x5e80004906ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #319 = BSR32rm
16921
  { 320,  2,  1,  0,  688,  0, 0x5e80004905ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #320 = BSR32rr
16922
  { 321,  6,  1,  0,  689,  0|(1ULL<<MCID::MayLoad), 0x5e80024806ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #321 = BSR64rm
16923
  { 322,  2,  1,  0,  688,  0, 0x5e80024805ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #322 = BSR64rr
16924
  { 323,  2,  1,  0,  606,  0, 0x6400004102ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #323 = BSWAP32r
16925
  { 324,  2,  1,  0,  607,  0, 0x6400024002ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #324 = BSWAP64r
16926
  { 325,  6,  0,  0,  682,  0|(1ULL<<MCID::MayLoad), 0x5d0004409cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #325 = BT16mi8
16927
  { 326,  6,  0,  0,  681,  0|(1ULL<<MCID::MayLoad), 0x5180004084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #326 = BT16mr
16928
  { 327,  2,  0,  0,  679,  0, 0x5d00044094ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr },  // Inst #327 = BT16ri8
16929
  { 328,  2,  0,  0,  680,  0, 0x5180004083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #328 = BT16rr
16930
  { 329,  6,  0,  0,  682,  0|(1ULL<<MCID::MayLoad), 0x5d0004411cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #329 = BT32mi8
16931
  { 330,  6,  0,  0,  681,  0|(1ULL<<MCID::MayLoad), 0x5180004104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #330 = BT32mr
16932
  { 331,  2,  0,  0,  679,  0, 0x5d00044114ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr },  // Inst #331 = BT32ri8
16933
  { 332,  2,  0,  0,  680,  0, 0x5180004103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #332 = BT32rr
16934
  { 333,  6,  0,  0,  682,  0|(1ULL<<MCID::MayLoad), 0x5d0006401cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #333 = BT64mi8
16935
  { 334,  6,  0,  0,  681,  0|(1ULL<<MCID::MayLoad), 0x5180024004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #334 = BT64mr
16936
  { 335,  2,  0,  0,  679,  0, 0x5d00064014ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr },  // Inst #335 = BT64ri8
16937
  { 336,  2,  0,  0,  680,  0, 0x5180024003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #336 = BT64rr
16938
  { 337,  6,  0,  0,  687,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004409fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #337 = BTC16mi8
16939
  { 338,  6,  0,  0,  686,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80004084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #338 = BTC16mr
16940
  { 339,  2,  0,  0,  683,  0, 0x5d00044097ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr },  // Inst #339 = BTC16ri8
16941
  { 340,  2,  0,  0,  684,  0, 0x5d80004083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #340 = BTC16rr
16942
  { 341,  6,  0,  0,  687,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004411fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #341 = BTC32mi8
16943
  { 342,  6,  0,  0,  686,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80004104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #342 = BTC32mr
16944
  { 343,  2,  0,  0,  683,  0, 0x5d00044117ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr },  // Inst #343 = BTC32ri8
16945
  { 344,  2,  0,  0,  684,  0, 0x5d80004103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #344 = BTC32rr
16946
  { 345,  6,  0,  0,  687,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0006401fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #345 = BTC64mi8
16947
  { 346,  6,  0,  0,  686,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80024004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #346 = BTC64mr
16948
  { 347,  2,  0,  0,  683,  0, 0x5d00064017ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr },  // Inst #347 = BTC64ri8
16949
  { 348,  2,  0,  0,  684,  0, 0x5d80024003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #348 = BTC64rr
16950
  { 349,  6,  0,  0,  687,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004409eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #349 = BTR16mi8
16951
  { 350,  6,  0,  0,  686,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980004084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #350 = BTR16mr
16952
  { 351,  2,  0,  0,  683,  0, 0x5d00044096ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr },  // Inst #351 = BTR16ri8
16953
  { 352,  2,  0,  0,  684,  0, 0x5980004083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #352 = BTR16rr
16954
  { 353,  6,  0,  0,  687,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004411eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #353 = BTR32mi8
16955
  { 354,  6,  0,  0,  686,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980004104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #354 = BTR32mr
16956
  { 355,  2,  0,  0,  683,  0, 0x5d00044116ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr },  // Inst #355 = BTR32ri8
16957
  { 356,  2,  0,  0,  684,  0, 0x5980004103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #356 = BTR32rr
16958
  { 357,  6,  0,  0,  687,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0006401eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #357 = BTR64mi8
16959
  { 358,  6,  0,  0,  686,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980024004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #358 = BTR64mr
16960
  { 359,  2,  0,  0,  683,  0, 0x5d00064016ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr },  // Inst #359 = BTR64ri8
16961
  { 360,  2,  0,  0,  685,  0, 0x5980024003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #360 = BTR64rr
16962
  { 361,  6,  0,  0,  687,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004409dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #361 = BTS16mi8
16963
  { 362,  6,  0,  0,  686,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580004084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #362 = BTS16mr
16964
  { 363,  2,  0,  0,  683,  0, 0x5d00044095ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr },  // Inst #363 = BTS16ri8
16965
  { 364,  2,  0,  0,  684,  0, 0x5580004083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #364 = BTS16rr
16966
  { 365,  6,  0,  0,  687,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004411dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #365 = BTS32mi8
16967
  { 366,  6,  0,  0,  686,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580004104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #366 = BTS32mr
16968
  { 367,  2,  0,  0,  683,  0, 0x5d00044115ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr },  // Inst #367 = BTS32ri8
16969
  { 368,  2,  0,  0,  684,  0, 0x5580004103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #368 = BTS32rr
16970
  { 369,  6,  0,  0,  687,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0006401dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #369 = BTS64mi8
16971
  { 370,  6,  0,  0,  686,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580024004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #370 = BTS64mr
16972
  { 371,  2,  0,  0,  683,  0, 0x5d00064015ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr },  // Inst #371 = BTS64ri8
16973
  { 372,  2,  0,  0,  684,  0, 0x5580024003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #372 = BTS64rr
16974
  { 373,  7,  1,  0,  703,  0|(1ULL<<MCID::MayLoad), 0x27aa0008806ULL, nullptr, ImplicitList6, OperandInfo64, -1 ,nullptr },  // Inst #373 = BZHI32rm
16975
  { 374,  3,  1,  0,  702,  0, 0x27aa0008805ULL, nullptr, ImplicitList6, OperandInfo58, -1 ,nullptr },  // Inst #374 = BZHI32rr
16976
  { 375,  7,  1,  0,  703,  0|(1ULL<<MCID::MayLoad), 0x2faa0008806ULL, nullptr, ImplicitList6, OperandInfo65, -1 ,nullptr },  // Inst #375 = BZHI64rm
16977
  { 376,  3,  1,  0,  702,  0, 0x2faa0008805ULL, nullptr, ImplicitList6, OperandInfo60, -1 ,nullptr },  // Inst #376 = BZHI64rr
16978
  { 377,  5,  0,  0,  711,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f8000009aULL, ImplicitList11, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #377 = CALL16m
16979
  { 378,  1,  0,  0,  710,  0|(1ULL<<MCID::Call), 0x7f80000092ULL, ImplicitList11, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #378 = CALL16r
16980
  { 379,  5,  0,  0,  711,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f8000011aULL, ImplicitList11, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #379 = CALL32m
16981
  { 380,  1,  0,  0,  710,  0|(1ULL<<MCID::Call), 0x7f80000112ULL, ImplicitList11, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #380 = CALL32r
16982
  { 381,  5,  0,  0,  55, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f8000001aULL, ImplicitList13, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #381 = CALL64m
16983
  { 382,  1,  0,  0,  54, 0|(1ULL<<MCID::Call), 0x7400180101ULL, ImplicitList13, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #382 = CALL64pcrel32
16984
  { 383,  1,  0,  0,  54, 0|(1ULL<<MCID::Call), 0x7f80000012ULL, ImplicitList13, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #383 = CALL64r
16985
  { 384,  1,  0,  0,  54, 0|(1ULL<<MCID::Call), 0x7400100081ULL, ImplicitList11, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #384 = CALLpcrel16
16986
  { 385,  1,  0,  0,  54, 0|(1ULL<<MCID::Call), 0x7400180101ULL, ImplicitList11, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #385 = CALLpcrel32
16987
  { 386,  0,  0,  0,  56, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #386 = CATCHPAD
16988
  { 387,  2,  0,  0,  56, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr },  // Inst #387 = CATCHRET
16989
  { 388,  0,  0,  0,  57, 0, 0x4c00000081ULL, ImplicitList4, ImplicitList3, nullptr, -1 ,nullptr },  // Inst #388 = CBW
16990
  { 389,  0,  0,  0,  57, 0, 0x4c80000101ULL, ImplicitList9, ImplicitList16, nullptr, -1 ,nullptr },  // Inst #389 = CDQ
16991
  { 390,  0,  0,  0,  57, 0, 0x4c00020001ULL, ImplicitList9, ImplicitList10, nullptr, -1 ,nullptr },  // Inst #390 = CDQE
16992
  { 391,  0,  0,  0,  759,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000040ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr },  // Inst #391 = CHS_F
16993
  { 392,  2,  1,  0,  759,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr },  // Inst #392 = CHS_Fp32
16994
  { 393,  2,  1,  0,  759,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr },  // Inst #393 = CHS_Fp64
16995
  { 394,  2,  1,  0,  759,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr },  // Inst #394 = CHS_Fp80
16996
  { 395,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000402aULL, nullptr, ImplicitList6, nullptr, -1 ,nullptr },  // Inst #395 = CLAC
16997
  { 396,  0,  0,  0,  58, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #396 = CLC
16998
  { 397,  0,  0,  0,  692,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7e00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #397 = CLD
16999
  { 398,  0,  0,  0,  56, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #398 = CLEANUPRET
17000
  { 399,  5,  0,  0,  60, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000481fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #399 = CLFLUSH
17001
  { 400,  5,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x570000501fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #400 = CLFLUSHOPT
17002
  { 401,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403dULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #401 = CLGI
17003
  { 402,  0,  0,  0,  61, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #402 = CLI
17004
  { 403,  0,  0,  0,  62, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #403 = CLTS
17005
  { 404,  5,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x570000501eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #404 = CLWB
17006
  { 405,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000405cULL, ImplicitList9, nullptr, nullptr, -1 ,nullptr },  // Inst #405 = CLZEROr
17007
  { 406,  0,  0,  0,  63, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7a80000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #406 = CMC
17008
  { 407,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2380004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #407 = CMOVA16rm
17009
  { 408,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2380004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #408 = CMOVA16rr
17010
  { 409,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2380004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #409 = CMOVA32rm
17011
  { 410,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2380004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #410 = CMOVA32rr
17012
  { 411,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2380024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #411 = CMOVA64rm
17013
  { 412,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2380024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #412 = CMOVA64rr
17014
  { 413,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2180004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #413 = CMOVAE16rm
17015
  { 414,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2180004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #414 = CMOVAE16rr
17016
  { 415,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2180004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #415 = CMOVAE32rm
17017
  { 416,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2180004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #416 = CMOVAE32rr
17018
  { 417,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2180024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #417 = CMOVAE64rm
17019
  { 418,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2180024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #418 = CMOVAE64rr
17020
  { 419,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2100004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #419 = CMOVB16rm
17021
  { 420,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2100004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #420 = CMOVB16rr
17022
  { 421,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2100004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #421 = CMOVB32rm
17023
  { 422,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2100004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #422 = CMOVB32rr
17024
  { 423,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2100024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #423 = CMOVB64rm
17025
  { 424,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2100024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #424 = CMOVB64rr
17026
  { 425,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2300004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #425 = CMOVBE16rm
17027
  { 426,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2300004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #426 = CMOVBE16rr
17028
  { 427,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2300004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #427 = CMOVBE32rm
17029
  { 428,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2300004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #428 = CMOVBE32rr
17030
  { 429,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2300024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #429 = CMOVBE64rm
17031
  { 430,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2300024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #430 = CMOVBE64rr
17032
  { 431,  1,  0,  0,  749,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000012ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #431 = CMOVBE_F
17033
  { 432,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr },  // Inst #432 = CMOVBE_Fp32
17034
  { 433,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr },  // Inst #433 = CMOVBE_Fp64
17035
  { 434,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr },  // Inst #434 = CMOVBE_Fp80
17036
  { 435,  1,  0,  0,  749,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000010ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #435 = CMOVB_F
17037
  { 436,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr },  // Inst #436 = CMOVB_Fp32
17038
  { 437,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr },  // Inst #437 = CMOVB_Fp64
17039
  { 438,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr },  // Inst #438 = CMOVB_Fp80
17040
  { 439,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2200004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #439 = CMOVE16rm
17041
  { 440,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2200004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #440 = CMOVE16rr
17042
  { 441,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2200004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #441 = CMOVE32rm
17043
  { 442,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2200004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #442 = CMOVE32rr
17044
  { 443,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2200024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #443 = CMOVE64rm
17045
  { 444,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2200024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #444 = CMOVE64rr
17046
  { 445,  1,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000011ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #445 = CMOVE_F
17047
  { 446,  3,  1,  0,  0,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr },  // Inst #446 = CMOVE_Fp32
17048
  { 447,  3,  1,  0,  0,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr },  // Inst #447 = CMOVE_Fp64
17049
  { 448,  3,  1,  0,  0,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr },  // Inst #448 = CMOVE_Fp80
17050
  { 449,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2780004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #449 = CMOVG16rm
17051
  { 450,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2780004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #450 = CMOVG16rr
17052
  { 451,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2780004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #451 = CMOVG32rm
17053
  { 452,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2780004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #452 = CMOVG32rr
17054
  { 453,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2780024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #453 = CMOVG64rm
17055
  { 454,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2780024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #454 = CMOVG64rr
17056
  { 455,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2680004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #455 = CMOVGE16rm
17057
  { 456,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2680004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #456 = CMOVGE16rr
17058
  { 457,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2680004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #457 = CMOVGE32rm
17059
  { 458,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2680004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #458 = CMOVGE32rr
17060
  { 459,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2680024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #459 = CMOVGE64rm
17061
  { 460,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2680024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #460 = CMOVGE64rr
17062
  { 461,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2600004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #461 = CMOVL16rm
17063
  { 462,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2600004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #462 = CMOVL16rr
17064
  { 463,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2600004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #463 = CMOVL32rm
17065
  { 464,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2600004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #464 = CMOVL32rr
17066
  { 465,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2600024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #465 = CMOVL64rm
17067
  { 466,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2600024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #466 = CMOVL64rr
17068
  { 467,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2700004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #467 = CMOVLE16rm
17069
  { 468,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2700004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #468 = CMOVLE16rr
17070
  { 469,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2700004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #469 = CMOVLE32rm
17071
  { 470,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2700004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #470 = CMOVLE32rr
17072
  { 471,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2700024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #471 = CMOVLE64rm
17073
  { 472,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2700024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #472 = CMOVLE64rr
17074
  { 473,  1,  0,  0,  749,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000012ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #473 = CMOVNBE_F
17075
  { 474,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr },  // Inst #474 = CMOVNBE_Fp32
17076
  { 475,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr },  // Inst #475 = CMOVNBE_Fp64
17077
  { 476,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr },  // Inst #476 = CMOVNBE_Fp80
17078
  { 477,  1,  0,  0,  749,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000010ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #477 = CMOVNB_F
17079
  { 478,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr },  // Inst #478 = CMOVNB_Fp32
17080
  { 479,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr },  // Inst #479 = CMOVNB_Fp64
17081
  { 480,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr },  // Inst #480 = CMOVNB_Fp80
17082
  { 481,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2280004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #481 = CMOVNE16rm
17083
  { 482,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2280004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #482 = CMOVNE16rr
17084
  { 483,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2280004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #483 = CMOVNE32rm
17085
  { 484,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2280004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #484 = CMOVNE32rr
17086
  { 485,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2280024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #485 = CMOVNE64rm
17087
  { 486,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2280024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #486 = CMOVNE64rr
17088
  { 487,  1,  0,  0,  749,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000011ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #487 = CMOVNE_F
17089
  { 488,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr },  // Inst #488 = CMOVNE_Fp32
17090
  { 489,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr },  // Inst #489 = CMOVNE_Fp64
17091
  { 490,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr },  // Inst #490 = CMOVNE_Fp80
17092
  { 491,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2080004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #491 = CMOVNO16rm
17093
  { 492,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2080004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #492 = CMOVNO16rr
17094
  { 493,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2080004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #493 = CMOVNO32rm
17095
  { 494,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2080004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #494 = CMOVNO32rr
17096
  { 495,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2080024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #495 = CMOVNO64rm
17097
  { 496,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2080024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #496 = CMOVNO64rr
17098
  { 497,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2580004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #497 = CMOVNP16rm
17099
  { 498,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2580004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #498 = CMOVNP16rr
17100
  { 499,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2580004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #499 = CMOVNP32rm
17101
  { 500,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2580004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #500 = CMOVNP32rr
17102
  { 501,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2580024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #501 = CMOVNP64rm
17103
  { 502,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2580024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #502 = CMOVNP64rr
17104
  { 503,  1,  0,  0,  749,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000013ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #503 = CMOVNP_F
17105
  { 504,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr },  // Inst #504 = CMOVNP_Fp32
17106
  { 505,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr },  // Inst #505 = CMOVNP_Fp64
17107
  { 506,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr },  // Inst #506 = CMOVNP_Fp80
17108
  { 507,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2480004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #507 = CMOVNS16rm
17109
  { 508,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2480004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #508 = CMOVNS16rr
17110
  { 509,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2480004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #509 = CMOVNS32rm
17111
  { 510,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2480004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #510 = CMOVNS32rr
17112
  { 511,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2480024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #511 = CMOVNS64rm
17113
  { 512,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2480024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #512 = CMOVNS64rr
17114
  { 513,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2000004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #513 = CMOVO16rm
17115
  { 514,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2000004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #514 = CMOVO16rr
17116
  { 515,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2000004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #515 = CMOVO32rm
17117
  { 516,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2000004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #516 = CMOVO32rr
17118
  { 517,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2000024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #517 = CMOVO64rm
17119
  { 518,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2000024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #518 = CMOVO64rr
17120
  { 519,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2500004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #519 = CMOVP16rm
17121
  { 520,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2500004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #520 = CMOVP16rr
17122
  { 521,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2500004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #521 = CMOVP32rm
17123
  { 522,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2500004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #522 = CMOVP32rr
17124
  { 523,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2500024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #523 = CMOVP64rm
17125
  { 524,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2500024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #524 = CMOVP64rr
17126
  { 525,  1,  0,  0,  749,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000013ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #525 = CMOVP_F
17127
  { 526,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr },  // Inst #526 = CMOVP_Fp32
17128
  { 527,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr },  // Inst #527 = CMOVP_Fp64
17129
  { 528,  3,  1,  0,  749,  0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr },  // Inst #528 = CMOVP_Fp80
17130
  { 529,  7,  1,  0,  593,  0|(1ULL<<MCID::MayLoad), 0x2400004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #529 = CMOVS16rm
17131
  { 530,  3,  1,  0,  591,  0|(1ULL<<MCID::Commutable), 0x2400004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #530 = CMOVS16rr
17132
  { 531,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2400004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #531 = CMOVS32rm
17133
  { 532,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2400004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #532 = CMOVS32rr
17134
  { 533,  7,  1,  0,  594,  0|(1ULL<<MCID::MayLoad), 0x2400024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #533 = CMOVS64rm
17135
  { 534,  3,  1,  0,  592,  0|(1ULL<<MCID::Commutable), 0x2400024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #534 = CMOVS64rr
17136
  { 535,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo90, -1 ,nullptr },  // Inst #535 = CMOV_FR128
17137
  { 536,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #536 = CMOV_FR32
17138
  { 537,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo92, -1 ,nullptr },  // Inst #537 = CMOV_FR64
17139
  { 538,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo93, -1 ,nullptr },  // Inst #538 = CMOV_GR16
17140
  { 539,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo94, -1 ,nullptr },  // Inst #539 = CMOV_GR32
17141
  { 540,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo95, -1 ,nullptr },  // Inst #540 = CMOV_GR8
17142
  { 541,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo96, -1 ,nullptr },  // Inst #541 = CMOV_RFP32
17143
  { 542,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo97, -1 ,nullptr },  // Inst #542 = CMOV_RFP64
17144
  { 543,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo98, -1 ,nullptr },  // Inst #543 = CMOV_RFP80
17145
  { 544,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #544 = CMOV_V16F32
17146
  { 545,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo100, -1 ,nullptr },  // Inst #545 = CMOV_V16I1
17147
  { 546,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #546 = CMOV_V2F64
17148
  { 547,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #547 = CMOV_V2I64
17149
  { 548,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo102, -1 ,nullptr },  // Inst #548 = CMOV_V32I1
17150
  { 549,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #549 = CMOV_V4F32
17151
  { 550,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #550 = CMOV_V4F64
17152
  { 551,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #551 = CMOV_V4I64
17153
  { 552,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo104, -1 ,nullptr },  // Inst #552 = CMOV_V64I1
17154
  { 553,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #553 = CMOV_V8F32
17155
  { 554,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #554 = CMOV_V8F64
17156
  { 555,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo105, -1 ,nullptr },  // Inst #555 = CMOV_V8I1
17157
  { 556,  4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #556 = CMOV_V8I64
17158
  { 557,  1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1e800c0081ULL, ImplicitList3, ImplicitList6, OperandInfo2, -1 ,nullptr },  // Inst #557 = CMP16i16
17159
  { 558,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x40800c009fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #558 = CMP16mi
17160
  { 559,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x418004009fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #559 = CMP16mi8
17161
  { 560,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #560 = CMP16mr
17162
  { 561,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x40800c0097ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr },  // Inst #561 = CMP16ri
17163
  { 562,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x4180040097ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr },  // Inst #562 = CMP16ri8
17164
  { 563,  6,  0,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80000086ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr },  // Inst #563 = CMP16rm
17165
  { 564,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1c80000083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #564 = CMP16rr
17166
  { 565,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1d80000085ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #565 = CMP16rr_REV
17167
  { 566,  1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1e80140101ULL, ImplicitList9, ImplicitList6, OperandInfo2, -1 ,nullptr },  // Inst #566 = CMP32i32
17168
  { 567,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x408014011fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #567 = CMP32mi
17169
  { 568,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x418004011fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #568 = CMP32mi8
17170
  { 569,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #569 = CMP32mr
17171
  { 570,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x4080140117ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr },  // Inst #570 = CMP32ri
17172
  { 571,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x4180040117ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr },  // Inst #571 = CMP32ri8
17173
  { 572,  6,  0,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80000106ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #572 = CMP32rm
17174
  { 573,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1c80000103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #573 = CMP32rr
17175
  { 574,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1d80000105ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #574 = CMP32rr_REV
17176
  { 575,  1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1e801e0001ULL, ImplicitList10, ImplicitList6, OperandInfo2, -1 ,nullptr },  // Inst #575 = CMP64i32
17177
  { 576,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x40801e001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #576 = CMP64mi32
17178
  { 577,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x418006001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #577 = CMP64mi8
17179
  { 578,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #578 = CMP64mr
17180
  { 579,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x40801e0017ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr },  // Inst #579 = CMP64ri32
17181
  { 580,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x4180060017ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr },  // Inst #580 = CMP64ri8
17182
  { 581,  6,  0,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80020006ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #581 = CMP64rm
17183
  { 582,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1c80020003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #582 = CMP64rr
17184
  { 583,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1d80020005ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #583 = CMP64rr_REV
17185
  { 584,  1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1e00040001ULL, ImplicitList4, ImplicitList6, OperandInfo2, -1 ,nullptr },  // Inst #584 = CMP8i8
17186
  { 585,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x400004001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #585 = CMP8mi
17187
  { 586,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x410004001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #586 = CMP8mi8
17188
  { 587,  6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c00000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #587 = CMP8mr
17189
  { 588,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x4000040017ULL, nullptr, ImplicitList6, OperandInfo106, -1 ,nullptr },  // Inst #588 = CMP8ri
17190
  { 589,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x4100040017ULL, nullptr, ImplicitList6, OperandInfo106, -1 ,nullptr },  // Inst #589 = CMP8ri8
17191
  { 590,  6,  0,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d00000006ULL, nullptr, ImplicitList6, OperandInfo19, -1 ,nullptr },  // Inst #590 = CMP8rm
17192
  { 591,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1c00000003ULL, nullptr, ImplicitList6, OperandInfo107, -1 ,nullptr },  // Inst #591 = CMP8rr
17193
  { 592,  2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1d00000005ULL, nullptr, ImplicitList6, OperandInfo107, -1 ,nullptr },  // Inst #592 = CMP8rr_REV
17194
  { 593,  8,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x6110045006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #593 = CMPPDrmi
17195
  { 594,  8,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x6110045006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #594 = CMPPDrmi_alt
17196
  { 595,  4,  1,  0,  14, 0|(1ULL<<MCID::Commutable), 0x6110045005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #595 = CMPPDrri
17197
  { 596,  4,  1,  0,  14, 0, 0x6110045005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #596 = CMPPDrri_alt
17198
  { 597,  8,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x6108044806ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #597 = CMPPSrmi
17199
  { 598,  8,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x6108044806ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #598 = CMPPSrmi_alt
17200
  { 599,  4,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x6108044805ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #599 = CMPPSrri
17201
  { 600,  4,  1,  0,  16, 0, 0x6108044805ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #600 = CMPPSrri_alt
17202
  { 601,  3,  0,  0,  724,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x530000000aULL, ImplicitList17, ImplicitList17, OperandInfo108, -1 ,nullptr },  // Inst #601 = CMPSB
17203
  { 602,  8,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x6100046006ULL, nullptr, nullptr, OperandInfo109, -1 ,nullptr },  // Inst #602 = CMPSDrm
17204
  { 603,  8,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x6100046006ULL, nullptr, nullptr, OperandInfo109, -1 ,nullptr },  // Inst #603 = CMPSDrm_alt
17205
  { 604,  4,  1,  0,  18, 0, 0x6100046005ULL, nullptr, nullptr, OperandInfo110, -1 ,nullptr },  // Inst #604 = CMPSDrr
17206
  { 605,  4,  1,  0,  20, 0, 0x6100046005ULL, nullptr, nullptr, OperandInfo110, -1 ,nullptr },  // Inst #605 = CMPSDrr_alt
17207
  { 606,  3,  0,  0,  724,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x538000010aULL, ImplicitList17, ImplicitList17, OperandInfo108, -1 ,nullptr },  // Inst #606 = CMPSL
17208
  { 607,  3,  0,  0,  724,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x538002000aULL, ImplicitList17, ImplicitList17, OperandInfo108, -1 ,nullptr },  // Inst #607 = CMPSQ
17209
  { 608,  8,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x6100045806ULL, nullptr, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #608 = CMPSSrm
17210
  { 609,  8,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x6100045806ULL, nullptr, nullptr, OperandInfo111, -1 ,nullptr },  // Inst #609 = CMPSSrm_alt
17211
  { 610,  4,  1,  0,  20, 0, 0x6100045805ULL, nullptr, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #610 = CMPSSrr
17212
  { 611,  4,  1,  0,  20, 0, 0x6100045805ULL, nullptr, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #611 = CMPSSrr_alt
17213
  { 612,  3,  0,  0,  724,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x538000008aULL, ImplicitList17, ImplicitList17, OperandInfo108, -1 ,nullptr },  // Inst #612 = CMPSW
17214
  { 613,  5,  0,  0,  729,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380024019ULL, ImplicitList18, ImplicitList19, OperandInfo43, -1 ,nullptr },  // Inst #613 = CMPXCHG16B
17215
  { 614,  6,  0,  0,  726,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5880004084ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #614 = CMPXCHG16rm
17216
  { 615,  2,  1,  0,  71, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5880004083ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #615 = CMPXCHG16rr
17217
  { 616,  6,  0,  0,  726,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5880004104ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #616 = CMPXCHG32rm
17218
  { 617,  2,  1,  0,  71, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5880004103ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #617 = CMPXCHG32rr
17219
  { 618,  6,  0,  0,  726,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5880024004ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #618 = CMPXCHG64rm
17220
  { 619,  2,  1,  0,  71, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5880024003ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #619 = CMPXCHG64rr
17221
  { 620,  5,  0,  0,  728,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380004019ULL, ImplicitList20, ImplicitList21, OperandInfo43, -1 ,nullptr },  // Inst #620 = CMPXCHG8B
17222
  { 621,  6,  0,  0,  727,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5800004004ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #621 = CMPXCHG8rm
17223
  { 622,  2,  1,  0,  74, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5800004003ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #622 = CMPXCHG8rr
17224
  { 623,  6,  0,  0,  75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1780005006ULL, nullptr, ImplicitList6, OperandInfo113, -1 ,nullptr },  // Inst #623 = COMISDrm
17225
  { 624,  2,  0,  0,  76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1780005005ULL, nullptr, ImplicitList6, OperandInfo114, -1 ,nullptr },  // Inst #624 = COMISDrr
17226
  { 625,  6,  0,  0,  75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1780004806ULL, nullptr, ImplicitList6, OperandInfo115, -1 ,nullptr },  // Inst #625 = COMISSrm
17227
  { 626,  2,  0,  0,  76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1780004805ULL, nullptr, ImplicitList6, OperandInfo116, -1 ,nullptr },  // Inst #626 = COMISSrr
17228
  { 627,  1,  0,  0,  760,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000013ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #627 = COMP_FST0r
17229
  { 628,  1,  0,  0,  765,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000016ULL, nullptr, ImplicitList22, OperandInfo44, -1 ,nullptr },  // Inst #628 = COM_FIPr
17230
  { 629,  1,  0,  0,  765,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000016ULL, nullptr, ImplicitList22, OperandInfo44, -1 ,nullptr },  // Inst #629 = COM_FIr
17231
  { 630,  1,  0,  0,  760,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000012ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #630 = COM_FST0r
17232
  { 631,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005fULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr },  // Inst #631 = COS_F
17233
  { 632,  2,  1,  0,  0,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr },  // Inst #632 = COS_Fp32
17234
  { 633,  2,  1,  0,  0,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr },  // Inst #633 = COS_Fp64
17235
  { 634,  2,  1,  0,  0,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr },  // Inst #634 = COS_Fp80
17236
  { 635,  0,  0,  0,  78, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5100004001ULL, ImplicitList23, ImplicitList20, nullptr, -1 ,nullptr },  // Inst #635 = CPUID
17237
  { 636,  0,  0,  0,  57, 0, 0x4c80020001ULL, ImplicitList10, ImplicitList24, nullptr, -1 ,nullptr },  // Inst #636 = CQO
17238
  { 637,  7,  1,  0,  79, 0|(1ULL<<MCID::MayLoad), 0x788000a086ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #637 = CRC32r32m16
17239
  { 638,  7,  1,  0,  79, 0|(1ULL<<MCID::MayLoad), 0x788000a106ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #638 = CRC32r32m32
17240
  { 639,  7,  1,  0,  79, 0|(1ULL<<MCID::MayLoad), 0x780000a006ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #639 = CRC32r32m8
17241
  { 640,  3,  1,  0,  80, 0, 0x788000a085ULL, nullptr, nullptr, OperandInfo117, -1 ,nullptr },  // Inst #640 = CRC32r32r16
17242
  { 641,  3,  1,  0,  80, 0, 0x788000a105ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #641 = CRC32r32r32
17243
  { 642,  3,  1,  0,  80, 0, 0x780000a005ULL, nullptr, nullptr, OperandInfo118, -1 ,nullptr },  // Inst #642 = CRC32r32r8
17244
  { 643,  7,  1,  0,  79, 0|(1ULL<<MCID::MayLoad), 0x788002a006ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #643 = CRC32r64m64
17245
  { 644,  7,  1,  0,  79, 0|(1ULL<<MCID::MayLoad), 0x780002a006ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #644 = CRC32r64m8
17246
  { 645,  3,  1,  0,  80, 0, 0x788002a005ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #645 = CRC32r64r64
17247
  { 646,  3,  1,  0,  80, 0, 0x780002a005ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr },  // Inst #646 = CRC32r64r8
17248
  { 647,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1700000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #647 = CS_PREFIX
17249
  { 648,  6,  1,  0,  81, 0|(1ULL<<MCID::MayLoad), 0x7300005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #648 = CVTDQ2PDrm
17250
  { 649,  2,  1,  0,  878,  0, 0x7300005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #649 = CVTDQ2PDrr
17251
  { 650,  6,  1,  0,  83, 0|(1ULL<<MCID::MayLoad), 0x2d88004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #650 = CVTDQ2PSrm
17252
  { 651,  2,  1,  0,  84, 0, 0x2d88004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #651 = CVTDQ2PSrr
17253
  { 652,  6,  1,  0,  883,  0|(1ULL<<MCID::MayLoad), 0x7300006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #652 = CVTPD2DQrm
17254
  { 653,  2,  1,  0,  881,  0, 0x7300006005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #653 = CVTPD2DQrr
17255
  { 654,  6,  1,  0,  866,  0|(1ULL<<MCID::MayLoad), 0x2d10005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #654 = CVTPD2PSrm
17256
  { 655,  2,  1,  0,  865,  0, 0x2d10005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #655 = CVTPD2PSrr
17257
  { 656,  6,  1,  0,  89, 0|(1ULL<<MCID::MayLoad), 0x2d90005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #656 = CVTPS2DQrm
17258
  { 657,  2,  1,  0,  90, 0, 0x2d90005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #657 = CVTPS2DQrr
17259
  { 658,  6,  1,  0,  873,  0|(1ULL<<MCID::MayLoad), 0x2d00004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #658 = CVTPS2PDrm
17260
  { 659,  2,  1,  0,  872,  0, 0x2d00004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #659 = CVTPS2PDrr
17261
  { 660,  6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x1680026006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #660 = CVTSD2SI64rm
17262
  { 661,  2,  1,  0,  897,  0, 0x1680026005ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #661 = CVTSD2SI64rr
17263
  { 662,  6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x1680006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #662 = CVTSD2SIrm
17264
  { 663,  2,  1,  0,  897,  0, 0x1680006005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #663 = CVTSD2SIrr
17265
  { 664,  6,  1,  0,  870,  0|(1ULL<<MCID::MayLoad), 0x2d00006006ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #664 = CVTSD2SSrm
17266
  { 665,  2,  1,  0,  869,  0, 0x2d00006005ULL, nullptr, nullptr, OperandInfo122, -1 ,nullptr },  // Inst #665 = CVTSD2SSrr
17267
  { 666,  6,  1,  0,  95, 0|(1ULL<<MCID::MayLoad), 0x1500026006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #666 = CVTSI2SD64rm
17268
  { 667,  2,  1,  0,  96, 0, 0x1500026005ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr },  // Inst #667 = CVTSI2SD64rr
17269
  { 668,  6,  1,  0,  95, 0|(1ULL<<MCID::MayLoad), 0x1500006006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #668 = CVTSI2SDrm
17270
  { 669,  2,  1,  0,  96, 0, 0x1500006005ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr },  // Inst #669 = CVTSI2SDrr
17271
  { 670,  6,  1,  0,  95, 0|(1ULL<<MCID::MayLoad), 0x1500025806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #670 = CVTSI2SS64rm
17272
  { 671,  2,  1,  0,  891,  0, 0x1500025805ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr },  // Inst #671 = CVTSI2SS64rr
17273
  { 672,  6,  1,  0,  95, 0|(1ULL<<MCID::MayLoad), 0x1500005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #672 = CVTSI2SSrm
17274
  { 673,  2,  1,  0,  891,  0, 0x1500005805ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #673 = CVTSI2SSrr
17275
  { 674,  6,  1,  0,  876,  0|(1ULL<<MCID::MayLoad), 0x2d00005806ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #674 = CVTSS2SDrm
17276
  { 675,  2,  1,  0,  875,  0, 0x2d00005805ULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr },  // Inst #675 = CVTSS2SDrr
17277
  { 676,  6,  1,  0,  895,  0|(1ULL<<MCID::MayLoad), 0x1680025806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #676 = CVTSS2SI64rm
17278
  { 677,  2,  1,  0,  893,  0, 0x1680025805ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #677 = CVTSS2SI64rr
17279
  { 678,  6,  1,  0,  896,  0|(1ULL<<MCID::MayLoad), 0x1680005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #678 = CVTSS2SIrm
17280
  { 679,  2,  1,  0,  894,  0, 0x1680005805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #679 = CVTSS2SIrr
17281
  { 680,  6,  1,  0,  883,  0|(1ULL<<MCID::MayLoad), 0x7310005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #680 = CVTTPD2DQrm
17282
  { 681,  2,  1,  0,  881,  0, 0x7310005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #681 = CVTTPD2DQrr
17283
  { 682,  6,  1,  0,  89, 0|(1ULL<<MCID::MayLoad), 0x2d80005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #682 = CVTTPS2DQrm
17284
  { 683,  2,  1,  0,  90, 0, 0x2d80005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #683 = CVTTPS2DQrr
17285
  { 684,  6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x1600026006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #684 = CVTTSD2SI64rm
17286
  { 685,  2,  1,  0,  897,  0, 0x1600026005ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #685 = CVTTSD2SI64rr
17287
  { 686,  6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x1600006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #686 = CVTTSD2SIrm
17288
  { 687,  2,  1,  0,  897,  0, 0x1600006005ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #687 = CVTTSD2SIrr
17289
  { 688,  6,  1,  0,  895,  0|(1ULL<<MCID::MayLoad), 0x1600025806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #688 = CVTTSS2SI64rm
17290
  { 689,  2,  1,  0,  893,  0, 0x1600025805ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #689 = CVTTSS2SI64rr
17291
  { 690,  6,  1,  0,  896,  0|(1ULL<<MCID::MayLoad), 0x1600005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #690 = CVTTSS2SIrm
17292
  { 691,  2,  1,  0,  894,  0, 0x1600005805ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #691 = CVTTSS2SIrr
17293
  { 692,  0,  0,  0,  57, 0, 0x4c80000081ULL, ImplicitList3, ImplicitList25, nullptr, -1 ,nullptr },  // Inst #692 = CWD
17294
  { 693,  0,  0,  0,  57, 0, 0x4c00000101ULL, ImplicitList3, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #693 = CWDE
17295
  { 694,  0,  0,  0,  101,  0, 0x1380000001ULL, ImplicitList1, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #694 = DAA
17296
  { 695,  0,  0,  0,  102,  0, 0x1780000001ULL, ImplicitList1, ImplicitList1, nullptr, -1 ,nullptr },  // Inst #695 = DAS
17297
  { 696,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3300000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #696 = DATA16_PREFIX
17298
  { 697,  5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000099ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #697 = DEC16m
17299
  { 698,  2,  1,  0,  104,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000091ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #698 = DEC16r
17300
  { 699,  2,  1,  0,  104,  0, 0x2400000082ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #699 = DEC16r_alt
17301
  { 700,  5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000119ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #700 = DEC32m
17302
  { 701,  2,  1,  0,  104,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000111ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #701 = DEC32r
17303
  { 702,  2,  1,  0,  104,  0, 0x2400000102ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #702 = DEC32r_alt
17304
  { 703,  5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80020019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #703 = DEC64m
17305
  { 704,  2,  1,  0,  104,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80020011ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #704 = DEC64r
17306
  { 705,  5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f00000019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #705 = DEC8m
17307
  { 706,  2,  1,  0,  104,  0, 0x7f00000011ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #706 = DEC8r
17308
  { 707,  5,  0,  0,  105,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8000009eULL, ImplicitList25, ImplicitList26, OperandInfo43, -1 ,nullptr },  // Inst #707 = DIV16m
17309
  { 708,  1,  0,  0,  644,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000096ULL, ImplicitList25, ImplicitList26, OperandInfo82, -1 ,nullptr },  // Inst #708 = DIV16r
17310
  { 709,  5,  0,  0,  107,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8000011eULL, ImplicitList16, ImplicitList21, OperandInfo43, -1 ,nullptr },  // Inst #709 = DIV32m
17311
  { 710,  1,  0,  0,  645,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000116ULL, ImplicitList16, ImplicitList21, OperandInfo83, -1 ,nullptr },  // Inst #710 = DIV32r
17312
  { 711,  5,  0,  0,  109,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8002001eULL, ImplicitList24, ImplicitList19, OperandInfo43, -1 ,nullptr },  // Inst #711 = DIV64m
17313
  { 712,  1,  0,  0,  646,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020016ULL, ImplicitList24, ImplicitList19, OperandInfo85, -1 ,nullptr },  // Inst #712 = DIV64r
17314
  { 713,  5,  0,  0,  111,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b0000001eULL, ImplicitList3, ImplicitList27, OperandInfo43, -1 ,nullptr },  // Inst #713 = DIV8m
17315
  { 714,  1,  0,  0,  643,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000016ULL, ImplicitList3, ImplicitList27, OperandInfo134, -1 ,nullptr },  // Inst #714 = DIV8r
17316
  { 715,  7,  1,  0,  113,  0|(1ULL<<MCID::MayLoad), 0x2f10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #715 = DIVPDrm
17317
  { 716,  3,  1,  0,  114,  0, 0x2f10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #716 = DIVPDrr
17318
  { 717,  7,  1,  0,  113,  0|(1ULL<<MCID::MayLoad), 0x2f08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #717 = DIVPSrm
17319
  { 718,  3,  1,  0,  115,  0, 0x2f08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #718 = DIVPSrr
17320
  { 719,  5,  0,  0,  116,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #719 = DIVR_F32m
17321
  { 720,  5,  0,  0,  116,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #720 = DIVR_F64m
17322
  { 721,  5,  0,  0,  116,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #721 = DIVR_FI16m
17323
  { 722,  5,  0,  0,  116,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #722 = DIVR_FI32m
17324
  { 723,  1,  0,  0,  117,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000016ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #723 = DIVR_FPrST0
17325
  { 724,  1,  0,  0,  117,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000017ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #724 = DIVR_FST0r
17326
  { 725,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #725 = DIVR_Fp32m
17327
  { 726,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #726 = DIVR_Fp64m
17328
  { 727,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #727 = DIVR_Fp64m32
17329
  { 728,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #728 = DIVR_Fp80m32
17330
  { 729,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #729 = DIVR_Fp80m64
17331
  { 730,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #730 = DIVR_FpI16m32
17332
  { 731,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #731 = DIVR_FpI16m64
17333
  { 732,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #732 = DIVR_FpI16m80
17334
  { 733,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #733 = DIVR_FpI32m32
17335
  { 734,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #734 = DIVR_FpI32m64
17336
  { 735,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #735 = DIVR_FpI32m80
17337
  { 736,  1,  0,  0,  117,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000016ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #736 = DIVR_FrST0
17338
  { 737,  7,  1,  0,  118,  0|(1ULL<<MCID::MayLoad), 0x2f10006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #737 = DIVSDrm
17339
  { 738,  7,  1,  0,  118,  0|(1ULL<<MCID::MayLoad), 0x2f10006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #738 = DIVSDrm_Int
17340
  { 739,  3,  1,  0,  119,  0, 0x2f10006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #739 = DIVSDrr
17341
  { 740,  3,  1,  0,  119,  0, 0x2f10006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #740 = DIVSDrr_Int
17342
  { 741,  7,  1,  0,  118,  0|(1ULL<<MCID::MayLoad), 0x2f08005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #741 = DIVSSrm
17343
  { 742,  7,  1,  0,  118,  0|(1ULL<<MCID::MayLoad), 0x2f08005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #742 = DIVSSrm_Int
17344
  { 743,  3,  1,  0,  120,  0, 0x2f08005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #743 = DIVSSrr
17345
  { 744,  3,  1,  0,  120,  0, 0x2f08005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #744 = DIVSSrr_Int
17346
  { 745,  5,  0,  0,  116,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001eULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #745 = DIV_F32m
17347
  { 746,  5,  0,  0,  116,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001eULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #746 = DIV_F64m
17348
  { 747,  5,  0,  0,  116,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001eULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #747 = DIV_FI16m
17349
  { 748,  5,  0,  0,  116,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001eULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #748 = DIV_FI32m
17350
  { 749,  1,  0,  0,  117,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000017ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #749 = DIV_FPrST0
17351
  { 750,  1,  0,  0,  117,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000016ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #750 = DIV_FST0r
17352
  { 751,  3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo45, -1 ,nullptr },  // Inst #751 = DIV_Fp32
17353
  { 752,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #752 = DIV_Fp32m
17354
  { 753,  3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo47, -1 ,nullptr },  // Inst #753 = DIV_Fp64
17355
  { 754,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #754 = DIV_Fp64m
17356
  { 755,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #755 = DIV_Fp64m32
17357
  { 756,  3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo49, -1 ,nullptr },  // Inst #756 = DIV_Fp80
17358
  { 757,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #757 = DIV_Fp80m32
17359
  { 758,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #758 = DIV_Fp80m64
17360
  { 759,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #759 = DIV_FpI16m32
17361
  { 760,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #760 = DIV_FpI16m64
17362
  { 761,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #761 = DIV_FpI16m80
17363
  { 762,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #762 = DIV_FpI32m32
17364
  { 763,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #763 = DIV_FpI32m64
17365
  { 764,  7,  1,  0,  116,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #764 = DIV_FpI32m80
17366
  { 765,  1,  0,  0,  117,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000017ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #765 = DIV_FrST0
17367
  { 766,  8,  1,  0,  925,  0|(1ULL<<MCID::MayLoad), 0x209004d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #766 = DPPDrmi
17368
  { 767,  4,  1,  0,  923,  0|(1ULL<<MCID::Commutable), 0x209004d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #767 = DPPDrri
17369
  { 768,  8,  1,  0,  922,  0|(1ULL<<MCID::MayLoad), 0x200804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #768 = DPPSrmi
17370
  { 769,  4,  1,  0,  921,  0|(1ULL<<MCID::Commutable), 0x200804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #769 = DPPSrri
17371
  { 770,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1f00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #770 = DS_PREFIX
17372
  { 771,  0,  0,  0,  56, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #771 = EH_RESTORE
17373
  { 772,  1,  0,  0,  124,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x6180000001ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #772 = EH_RETURN
17374
  { 773,  1,  0,  0,  124,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x6180000001ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #773 = EH_RETURN64
17375
  { 774,  5,  0,  0,  56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #774 = EH_SjLj_LongJmp32
17376
  { 775,  5,  0,  0,  56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #775 = EH_SjLj_LongJmp64
17377
  { 776,  6,  1,  0,  56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #776 = EH_SjLj_SetJmp32
17378
  { 777,  6,  1,  0,  56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #777 = EH_SjLj_SetJmp64
17379
  { 778,  1,  0,  0,  0,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #778 = EH_SjLj_Setup
17380
  { 779,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000402fULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #779 = ENCLS
17381
  { 780,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004037ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #780 = ENCLU
17382
  { 781,  2,  0,  0,  125,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x64000c000bULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #781 = ENTER
17383
  { 782,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1300000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #782 = ES_PREFIX
17384
  { 783,  7,  0,  0,  848,  0|(1ULL<<MCID::MayStore), 0xb8804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #783 = EXTRACTPSmr
17385
  { 784,  3,  1,  0,  846,  0, 0xb8804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #784 = EXTRACTPSrr
17386
  { 785,  3,  1,  0,  0,  0, 0x3c80005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #785 = EXTRQ
17387
  { 786,  4,  1,  0,  0,  0, 0x3c0004500eULL, nullptr, nullptr, OperandInfo137, -1 ,nullptr },  // Inst #786 = EXTRQI
17388
  { 787,  0,  0,  0,  128,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000050ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #787 = F2XM1
17389
  { 788,  2,  0,  0,  129,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x4d000c008cULL, ImplicitList11, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #788 = FARCALL16i
17390
  { 789,  5,  0,  0,  130,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000009bULL, ImplicitList11, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #789 = FARCALL16m
17391
  { 790,  2,  0,  0,  129,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x4d0014010cULL, ImplicitList11, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #790 = FARCALL32i
17392
  { 791,  5,  0,  0,  130,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000011bULL, ImplicitList11, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #791 = FARCALL32m
17393
  { 792,  5,  0,  0,  131,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8002001bULL, ImplicitList13, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #792 = FARCALL64
17394
  { 793,  2,  0,  0,  132,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x75000c008cULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #793 = FARJMP16i
17395
  { 794,  5,  0,  0,  133,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000009dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #794 = FARJMP16m
17396
  { 795,  2,  0,  0,  132,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x750014010cULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #795 = FARJMP32i
17397
  { 796,  5,  0,  0,  133,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000011dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #796 = FARJMP32m
17398
  { 797,  5,  0,  0,  134,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8002001dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #797 = FARJMP64
17399
  { 798,  5,  0,  0,  739,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #798 = FBLDm
17400
  { 799,  5,  1,  0,  742,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #799 = FBSTPm
17401
  { 800,  5,  0,  0,  762,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #800 = FCOM32m
17402
  { 801,  5,  0,  0,  762,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #801 = FCOM64m
17403
  { 802,  5,  0,  0,  762,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #802 = FCOMP32m
17404
  { 803,  5,  0,  0,  762,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #803 = FCOMP64m
17405
  { 804,  0,  0,  0,  763,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000039ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #804 = FCOMPP
17406
  { 805,  0,  0,  0,  754,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000056ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #805 = FDECSTP
17407
  { 806,  0,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x700004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #806 = FEMMS
17408
  { 807,  1,  0,  0,  755,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000010ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #807 = FFREE
17409
  { 808,  5,  0,  0,  767,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #808 = FICOM16m
17410
  { 809,  5,  0,  0,  767,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #809 = FICOM32m
17411
  { 810,  5,  0,  0,  767,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #810 = FICOMP16m
17412
  { 811,  5,  0,  0,  767,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #811 = FICOMP32m
17413
  { 812,  0,  0,  0,  754,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000057ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #812 = FINCSTP
17414
  { 813,  5,  0,  0,  752,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #813 = FLDCW16m
17415
  { 814,  5,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #814 = FLDENVm
17416
  { 815,  0,  0,  0,  139,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000004aULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #815 = FLDL2E
17417
  { 816,  0,  0,  0,  139,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000049ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #816 = FLDL2T
17418
  { 817,  0,  0,  0,  139,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000004cULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #817 = FLDLG2
17419
  { 818,  0,  0,  0,  139,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000004dULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #818 = FLDLN2
17420
  { 819,  0,  0,  0,  748,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000004bULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #819 = FLDPI
17421
  { 820,  0,  0,  0,  777,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000042ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr },  // Inst #820 = FNCLEX
17422
  { 821,  0,  0,  0,  778,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000043ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr },  // Inst #821 = FNINIT
17423
  { 822,  0,  0,  0,  775,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000030ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #822 = FNOP
17424
  { 823,  5,  0,  0,  753,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #823 = FNSTCW16m
17425
  { 824,  0,  0,  0,  750,  0, 0x6f80000040ULL, ImplicitList5, ImplicitList3, nullptr, -1 ,nullptr },  // Inst #824 = FNSTSW16r
17426
  { 825,  5,  1,  0,  751,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e8000001fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #825 = FNSTSWm
17427
  { 826,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr },  // Inst #826 = FP32_TO_INT16_IN_MEM
17428
  { 827,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr },  // Inst #827 = FP32_TO_INT32_IN_MEM
17429
  { 828,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr },  // Inst #828 = FP32_TO_INT64_IN_MEM
17430
  { 829,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr },  // Inst #829 = FP64_TO_INT16_IN_MEM
17431
  { 830,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr },  // Inst #830 = FP64_TO_INT32_IN_MEM
17432
  { 831,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr },  // Inst #831 = FP64_TO_INT64_IN_MEM
17433
  { 832,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #832 = FP80_TO_INT16_IN_MEM
17434
  { 833,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #833 = FP80_TO_INT32_IN_MEM
17435
  { 834,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr },  // Inst #834 = FP80_TO_INT64_IN_MEM
17436
  { 835,  0,  0,  0,  145,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000053ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #835 = FPATAN
17437
  { 836,  0,  0,  0,  770,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000058ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #836 = FPREM
17438
  { 837,  0,  0,  0,  771,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000055ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #837 = FPREM1
17439
  { 838,  0,  0,  0,  148,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000052ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #838 = FPTAN
17440
  { 839,  1,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000010ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #839 = FP_FFREEP
17441
  { 840,  0,  0,  0,  772,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005cULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #840 = FRNDINT
17442
  { 841,  5,  1,  0,  757,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e8000001cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #841 = FRSTORm
17443
  { 842,  5,  1,  0,  756,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e8000001eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #842 = FSAVEm
17444
  { 843,  0,  0,  0,  773,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005dULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #843 = FSCALE
17445
  { 844,  0,  0,  0,  151,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000044ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #844 = FSETPM
17446
  { 845,  0,  0,  0,  152,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005bULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #845 = FSINCOS
17447
  { 846,  5,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #846 = FSTENVm
17448
  { 847,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3200000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #847 = FS_PREFIX
17449
  { 848,  0,  0,  0,  769,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000045ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #848 = FXAM
17450
  { 849,  5,  0,  0,  154,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700004019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #849 = FXRSTOR
17451
  { 850,  5,  0,  0,  154,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700024019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #850 = FXRSTOR64
17452
  { 851,  5,  0,  0,  155,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700004018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #851 = FXSAVE
17453
  { 852,  5,  0,  0,  155,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700024018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #852 = FXSAVE64
17454
  { 853,  0,  0,  0,  774,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000054ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #853 = FXTRACT
17455
  { 854,  0,  0,  0,  157,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000051ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #854 = FYL2X
17456
  { 855,  0,  0,  0,  158,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000059ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #855 = FYL2XP1
17457
  { 856,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2a90005006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #856 = FsANDNPDrm
17458
  { 857,  3,  1,  0,  160,  0, 0x2a90005005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #857 = FsANDNPDrr
17459
  { 858,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2a88004806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #858 = FsANDNPSrm
17460
  { 859,  3,  1,  0,  160,  0, 0x2a88004805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #859 = FsANDNPSrr
17461
  { 860,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2a10005006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #860 = FsANDPDrm
17462
  { 861,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2a10005005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #861 = FsANDPDrr
17463
  { 862,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2a08004806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #862 = FsANDPSrm
17464
  { 863,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2a08004805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #863 = FsANDPSrr
17465
  { 864,  1,  1,  0,  36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo141, -1 ,nullptr },  // Inst #864 = FsFLD0SD
17466
  { 865,  1,  1,  0,  36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr },  // Inst #865 = FsFLD0SS
17467
  { 866,  6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1410005006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #866 = FsMOVAPDrm
17468
  { 867,  6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1408004806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #867 = FsMOVAPSrm
17469
  { 868,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2b10005006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #868 = FsORPDrm
17470
  { 869,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2b10005005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #869 = FsORPDrr
17471
  { 870,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2b08004806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #870 = FsORPSrm
17472
  { 871,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2b08004805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #871 = FsORPSrr
17473
  { 872,  6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1430005006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #872 = FsVMOVAPDrm
17474
  { 873,  6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1428004806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #873 = FsVMOVAPSrm
17475
  { 874,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2b90005006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #874 = FsXORPDrm
17476
  { 875,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2b90005005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #875 = FsXORPDrr
17477
  { 876,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2b88004806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #876 = FsXORPSrm
17478
  { 877,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2b88004805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #877 = FsXORPSrr
17479
  { 878,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2a90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #878 = FvANDNPDrm
17480
  { 879,  3,  1,  0,  160,  0, 0x2a90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #879 = FvANDNPDrr
17481
  { 880,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2a88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #880 = FvANDNPSrm
17482
  { 881,  3,  1,  0,  160,  0, 0x2a88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #881 = FvANDNPSrr
17483
  { 882,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2a10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #882 = FvANDPDrm
17484
  { 883,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2a10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #883 = FvANDPDrr
17485
  { 884,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2a08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #884 = FvANDPSrm
17486
  { 885,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2a08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #885 = FvANDPSrr
17487
  { 886,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2b10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #886 = FvORPDrm
17488
  { 887,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2b10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #887 = FvORPDrr
17489
  { 888,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2b08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #888 = FvORPSrm
17490
  { 889,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2b08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #889 = FvORPSrr
17491
  { 890,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2b90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #890 = FvXORPDrm
17492
  { 891,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2b90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #891 = FvXORPDrr
17493
  { 892,  7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x2b88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #892 = FvXORPSrm
17494
  { 893,  3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x2b88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #893 = FvXORPSrr
17495
  { 894,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1b80004001ULL, ImplicitList18, ImplicitList28, nullptr, -1 ,nullptr },  // Inst #894 = GETSEC
17496
  { 895,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3280000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #895 = GS_PREFIX
17497
  { 896,  7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x3e10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #896 = HADDPDrm
17498
  { 897,  3,  1,  0,  902,  0, 0x3e10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #897 = HADDPDrr
17499
  { 898,  7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x3e08006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #898 = HADDPSrm
17500
  { 899,  3,  1,  0,  902,  0, 0x3e08006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #899 = HADDPSrr
17501
  { 900,  0,  0,  0,  164,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7a00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #900 = HLT
17502
  { 901,  7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x3e90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #901 = HSUBPDrm
17503
  { 902,  3,  1,  0,  902,  0, 0x3e90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #902 = HSUBPDrr
17504
  { 903,  7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x3e88006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #903 = HSUBPSrm
17505
  { 904,  3,  1,  0,  902,  0, 0x3e88006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #904 = HSUBPSrr
17506
  { 905,  5,  0,  0,  165,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8000009fULL, ImplicitList25, ImplicitList26, OperandInfo43, -1 ,nullptr },  // Inst #905 = IDIV16m
17507
  { 906,  1,  0,  0,  648,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000097ULL, ImplicitList25, ImplicitList26, OperandInfo82, -1 ,nullptr },  // Inst #906 = IDIV16r
17508
  { 907,  5,  0,  0,  167,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8000011fULL, ImplicitList16, ImplicitList21, OperandInfo43, -1 ,nullptr },  // Inst #907 = IDIV32m
17509
  { 908,  1,  0,  0,  649,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000117ULL, ImplicitList16, ImplicitList21, OperandInfo83, -1 ,nullptr },  // Inst #908 = IDIV32r
17510
  { 909,  5,  0,  0,  169,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8002001fULL, ImplicitList24, ImplicitList19, OperandInfo43, -1 ,nullptr },  // Inst #909 = IDIV64m
17511
  { 910,  1,  0,  0,  650,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020017ULL, ImplicitList24, ImplicitList19, OperandInfo85, -1 ,nullptr },  // Inst #910 = IDIV64r
17512
  { 911,  5,  0,  0,  171,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b0000001fULL, ImplicitList3, ImplicitList27, OperandInfo43, -1 ,nullptr },  // Inst #911 = IDIV8m
17513
  { 912,  1,  0,  0,  647,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000017ULL, ImplicitList3, ImplicitList27, OperandInfo134, -1 ,nullptr },  // Inst #912 = IDIV8r
17514
  { 913,  5,  0,  0,  744,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #913 = ILD_F16m
17515
  { 914,  5,  0,  0,  744,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #914 = ILD_F32m
17516
  { 915,  5,  0,  0,  744,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #915 = ILD_F64m
17517
  { 916,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo143, -1 ,nullptr },  // Inst #916 = ILD_Fp16m32
17518
  { 917,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo144, -1 ,nullptr },  // Inst #917 = ILD_Fp16m64
17519
  { 918,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr },  // Inst #918 = ILD_Fp16m80
17520
  { 919,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo143, -1 ,nullptr },  // Inst #919 = ILD_Fp32m32
17521
  { 920,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo144, -1 ,nullptr },  // Inst #920 = ILD_Fp32m64
17522
  { 921,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr },  // Inst #921 = ILD_Fp32m80
17523
  { 922,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo143, -1 ,nullptr },  // Inst #922 = ILD_Fp64m32
17524
  { 923,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo144, -1 ,nullptr },  // Inst #923 = ILD_Fp64m64
17525
  { 924,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr },  // Inst #924 = ILD_Fp64m80
17526
  { 925,  5,  0,  0,  623,  0|(1ULL<<MCID::MayLoad), 0x7b8000009dULL, ImplicitList3, ImplicitList26, OperandInfo43, -1 ,nullptr },  // Inst #925 = IMUL16m
17527
  { 926,  1,  0,  0,  618,  0, 0x7b80000095ULL, ImplicitList3, ImplicitList26, OperandInfo82, -1 ,nullptr },  // Inst #926 = IMUL16r
17528
  { 927,  7,  1,  0,  619,  0|(1ULL<<MCID::MayLoad), 0x5780004086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr },  // Inst #927 = IMUL16rm
17529
  { 928,  7,  1,  0,  620,  0|(1ULL<<MCID::MayLoad), 0x34800c0086ULL, nullptr, ImplicitList6, OperandInfo146, -1 ,nullptr },  // Inst #928 = IMUL16rmi
17530
  { 929,  7,  1,  0,  620,  0|(1ULL<<MCID::MayLoad), 0x3580040086ULL, nullptr, ImplicitList6, OperandInfo146, -1 ,nullptr },  // Inst #929 = IMUL16rmi8
17531
  { 930,  3,  1,  0,  618,  0|(1ULL<<MCID::Commutable), 0x5780004085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #930 = IMUL16rr
17532
  { 931,  3,  1,  0,  621,  0, 0x34800c0085ULL, nullptr, ImplicitList6, OperandInfo147, -1 ,nullptr },  // Inst #931 = IMUL16rri
17533
  { 932,  3,  1,  0,  621,  0, 0x3580040085ULL, nullptr, ImplicitList6, OperandInfo147, -1 ,nullptr },  // Inst #932 = IMUL16rri8
17534
  { 933,  5,  0,  0,  630,  0|(1ULL<<MCID::MayLoad), 0x7b8000011dULL, ImplicitList9, ImplicitList21, OperandInfo43, -1 ,nullptr },  // Inst #933 = IMUL32m
17535
  { 934,  1,  0,  0,  625,  0, 0x7b80000115ULL, ImplicitList9, ImplicitList21, OperandInfo83, -1 ,nullptr },  // Inst #934 = IMUL32r
17536
  { 935,  7,  1,  0,  626,  0|(1ULL<<MCID::MayLoad), 0x5780004106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr },  // Inst #935 = IMUL32rm
17537
  { 936,  7,  1,  0,  627,  0|(1ULL<<MCID::MayLoad), 0x3480140106ULL, nullptr, ImplicitList6, OperandInfo66, -1 ,nullptr },  // Inst #936 = IMUL32rmi
17538
  { 937,  7,  1,  0,  627,  0|(1ULL<<MCID::MayLoad), 0x3580040106ULL, nullptr, ImplicitList6, OperandInfo66, -1 ,nullptr },  // Inst #937 = IMUL32rmi8
17539
  { 938,  3,  1,  0,  625,  0|(1ULL<<MCID::Commutable), 0x5780004105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #938 = IMUL32rr
17540
  { 939,  3,  1,  0,  628,  0, 0x3480140105ULL, nullptr, ImplicitList6, OperandInfo67, -1 ,nullptr },  // Inst #939 = IMUL32rri
17541
  { 940,  3,  1,  0,  628,  0, 0x3580040105ULL, nullptr, ImplicitList6, OperandInfo67, -1 ,nullptr },  // Inst #940 = IMUL32rri8
17542
  { 941,  5,  0,  0,  637,  0|(1ULL<<MCID::MayLoad), 0x7b8002001dULL, ImplicitList10, ImplicitList19, OperandInfo43, -1 ,nullptr },  // Inst #941 = IMUL64m
17543
  { 942,  1,  0,  0,  632,  0, 0x7b80020015ULL, ImplicitList10, ImplicitList19, OperandInfo85, -1 ,nullptr },  // Inst #942 = IMUL64r
17544
  { 943,  7,  1,  0,  633,  0|(1ULL<<MCID::MayLoad), 0x5780024006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr },  // Inst #943 = IMUL64rm
17545
  { 944,  7,  1,  0,  634,  0|(1ULL<<MCID::MayLoad), 0x34801e0006ULL, nullptr, ImplicitList6, OperandInfo68, -1 ,nullptr },  // Inst #944 = IMUL64rmi32
17546
  { 945,  7,  1,  0,  634,  0|(1ULL<<MCID::MayLoad), 0x3580060006ULL, nullptr, ImplicitList6, OperandInfo68, -1 ,nullptr },  // Inst #945 = IMUL64rmi8
17547
  { 946,  3,  1,  0,  632,  0|(1ULL<<MCID::Commutable), 0x5780024005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #946 = IMUL64rr
17548
  { 947,  3,  1,  0,  635,  0, 0x34801e0005ULL, nullptr, ImplicitList6, OperandInfo69, -1 ,nullptr },  // Inst #947 = IMUL64rri32
17549
  { 948,  3,  1,  0,  635,  0, 0x3580060005ULL, nullptr, ImplicitList6, OperandInfo69, -1 ,nullptr },  // Inst #948 = IMUL64rri8
17550
  { 949,  5,  0,  0,  189,  0|(1ULL<<MCID::MayLoad), 0x7b0000001dULL, ImplicitList4, ImplicitList29, OperandInfo43, -1 ,nullptr },  // Inst #949 = IMUL8m
17551
  { 950,  1,  0,  0,  190,  0, 0x7b00000015ULL, ImplicitList4, ImplicitList29, OperandInfo134, -1 ,nullptr },  // Inst #950 = IMUL8r
17552
  { 951,  1,  0,  0,  191,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7280040081ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr },  // Inst #951 = IN16ri
17553
  { 952,  0,  0,  0,  192,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7680000081ULL, ImplicitList30, ImplicitList3, nullptr, -1 ,nullptr },  // Inst #952 = IN16rr
17554
  { 953,  1,  0,  0,  191,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7280040101ULL, nullptr, ImplicitList9, OperandInfo2, -1 ,nullptr },  // Inst #953 = IN32ri
17555
  { 954,  0,  0,  0,  192,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7680000101ULL, ImplicitList30, ImplicitList9, nullptr, -1 ,nullptr },  // Inst #954 = IN32rr
17556
  { 955,  1,  0,  0,  191,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7200040001ULL, nullptr, ImplicitList4, OperandInfo2, -1 ,nullptr },  // Inst #955 = IN8ri
17557
  { 956,  0,  0,  0,  192,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7600000001ULL, ImplicitList30, ImplicitList4, nullptr, -1 ,nullptr },  // Inst #956 = IN8rr
17558
  { 957,  5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000098ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #957 = INC16m
17559
  { 958,  2,  1,  0,  104,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000090ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #958 = INC16r
17560
  { 959,  2,  1,  0,  104,  0, 0x2000000082ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #959 = INC16r_alt
17561
  { 960,  5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000118ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #960 = INC32m
17562
  { 961,  2,  1,  0,  104,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000110ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #961 = INC32r
17563
  { 962,  2,  1,  0,  104,  0, 0x2000000102ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #962 = INC32r_alt
17564
  { 963,  5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80020018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #963 = INC64m
17565
  { 964,  2,  1,  0,  104,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80020010ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #964 = INC64r
17566
  { 965,  5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f00000018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #965 = INC8m
17567
  { 966,  2,  1,  0,  104,  0, 0x7f00000010ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #966 = INC8r
17568
  { 967,  1,  1,  0,  193,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3600000009ULL, ImplicitList31, ImplicitList32, OperandInfo148, -1 ,nullptr },  // Inst #967 = INSB
17569
  { 968,  8,  1,  0,  194,  0|(1ULL<<MCID::MayLoad), 0x108804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #968 = INSERTPSrm
17570
  { 969,  4,  1,  0,  195,  0, 0x108804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #969 = INSERTPSrr
17571
  { 970,  3,  1,  0,  0,  0, 0x3c80006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #970 = INSERTQ
17572
  { 971,  5,  1,  0,  0,  0, 0x3c00046005ULL, nullptr, nullptr, OperandInfo149, -1 ,nullptr },  // Inst #971 = INSERTQI
17573
  { 972,  1,  1,  0,  193,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3680000109ULL, ImplicitList31, ImplicitList32, OperandInfo148, -1 ,nullptr },  // Inst #972 = INSL
17574
  { 973,  1,  1,  0,  193,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3680000089ULL, ImplicitList31, ImplicitList32, OperandInfo148, -1 ,nullptr },  // Inst #973 = INSW
17575
  { 974,  1,  0,  0,  196,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6680040001ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #974 = INT
17576
  { 975,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7880000001ULL, nullptr, ImplicitList6, nullptr, -1 ,nullptr },  // Inst #975 = INT1
17577
  { 976,  0,  0,  0,  197,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6600000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #976 = INT3
17578
  { 977,  0,  0,  0,  716,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6700000001ULL, ImplicitList6, nullptr, nullptr, -1 ,nullptr },  // Inst #977 = INTO
17579
  { 978,  0,  0,  0,  198,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x400004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #978 = INVD
17580
  { 979,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000009006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #979 = INVEPT32
17581
  { 980,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000009006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #980 = INVEPT64
17582
  { 981,  5,  0,  0,  199,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000401fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #981 = INVLPG
17583
  { 982,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403fULL, ImplicitList23, nullptr, nullptr, -1 ,nullptr },  // Inst #982 = INVLPGA32
17584
  { 983,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403fULL, ImplicitList33, nullptr, nullptr, -1 ,nullptr },  // Inst #983 = INVLPGA64
17585
  { 984,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4100009006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #984 = INVPCID32
17586
  { 985,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4100009006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #985 = INVPCID64
17587
  { 986,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080009006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #986 = INVVPID32
17588
  { 987,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080009006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #987 = INVVPID64
17589
  { 988,  1,  0,  0,  200,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x1c00000ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #988 = IRET
17590
  { 989,  0,  0,  0,  201,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c00081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #989 = IRET16
17591
  { 990,  0,  0,  0,  201,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c00101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #990 = IRET32
17592
  { 991,  0,  0,  0,  201,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c20001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #991 = IRET64
17593
  { 992,  5,  0,  0,  202,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #992 = ISTT_FP16m
17594
  { 993,  5,  0,  0,  202,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #993 = ISTT_FP32m
17595
  { 994,  5,  0,  0,  202,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #994 = ISTT_FP64m
17596
  { 995,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr },  // Inst #995 = ISTT_Fp16m32
17597
  { 996,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #996 = ISTT_Fp16m64
17598
  { 997,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr },  // Inst #997 = ISTT_Fp16m80
17599
  { 998,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr },  // Inst #998 = ISTT_Fp32m32
17600
  { 999,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #999 = ISTT_Fp32m64
17601
  { 1000, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr },  // Inst #1000 = ISTT_Fp32m80
17602
  { 1001, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr },  // Inst #1001 = ISTT_Fp64m32
17603
  { 1002, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #1002 = ISTT_Fp64m64
17604
  { 1003, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr },  // Inst #1003 = ISTT_Fp64m80
17605
  { 1004, 5,  0,  0,  745,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001aULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1004 = IST_F16m
17606
  { 1005, 5,  0,  0,  745,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d8000001aULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1005 = IST_F32m
17607
  { 1006, 5,  0,  0,  745,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001bULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1006 = IST_FP16m
17608
  { 1007, 5,  0,  0,  745,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d8000001bULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1007 = IST_FP32m
17609
  { 1008, 5,  0,  0,  203,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1008 = IST_FP64m
17610
  { 1009, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr },  // Inst #1009 = IST_Fp16m32
17611
  { 1010, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #1010 = IST_Fp16m64
17612
  { 1011, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr },  // Inst #1011 = IST_Fp16m80
17613
  { 1012, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr },  // Inst #1012 = IST_Fp32m32
17614
  { 1013, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #1013 = IST_Fp32m64
17615
  { 1014, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr },  // Inst #1014 = IST_Fp32m80
17616
  { 1015, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr },  // Inst #1015 = IST_Fp64m32
17617
  { 1016, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #1016 = IST_Fp64m64
17618
  { 1017, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr },  // Inst #1017 = IST_Fp64m80
17619
  { 1018, 8,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x6100046006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #1018 = Int_CMPSDrm
17620
  { 1019, 4,  1,  0,  18, 0, 0x6100046005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #1019 = Int_CMPSDrr
17621
  { 1020, 8,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x6100045806ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #1020 = Int_CMPSSrm
17622
  { 1021, 4,  1,  0,  20, 0, 0x6100045805ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #1021 = Int_CMPSSrr
17623
  { 1022, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x1780005006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #1022 = Int_COMISDrm
17624
  { 1023, 2,  0,  0,  76, 0, 0x1780005005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #1023 = Int_COMISDrr
17625
  { 1024, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x1780004806ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #1024 = Int_COMISSrm
17626
  { 1025, 2,  0,  0,  76, 0, 0x1780004805ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #1025 = Int_COMISSrr
17627
  { 1026, 7,  1,  0,  871,  0|(1ULL<<MCID::MayLoad), 0x2d00006005ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1026 = Int_CVTSD2SSrm
17628
  { 1027, 3,  1,  0,  869,  0, 0x2d00006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1027 = Int_CVTSD2SSrr
17629
  { 1028, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x1500026006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1028 = Int_CVTSI2SD64rm
17630
  { 1029, 3,  1,  0,  96, 0, 0x1500026005ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1029 = Int_CVTSI2SD64rr
17631
  { 1030, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x1500006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1030 = Int_CVTSI2SDrm
17632
  { 1031, 3,  1,  0,  96, 0, 0x1500006005ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr },  // Inst #1031 = Int_CVTSI2SDrr
17633
  { 1032, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x1500025806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1032 = Int_CVTSI2SS64rm
17634
  { 1033, 3,  1,  0,  891,  0, 0x1500025805ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr },  // Inst #1033 = Int_CVTSI2SS64rr
17635
  { 1034, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x1500005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1034 = Int_CVTSI2SSrm
17636
  { 1035, 3,  1,  0,  891,  0, 0x1500005805ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr },  // Inst #1035 = Int_CVTSI2SSrr
17637
  { 1036, 7,  1,  0,  877,  0|(1ULL<<MCID::MayLoad), 0x2d00005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1036 = Int_CVTSS2SDrm
17638
  { 1037, 3,  1,  0,  875,  0, 0x2d00005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1037 = Int_CVTSS2SDrr
17639
  { 1038, 6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x1600026006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1038 = Int_CVTTSD2SI64rm
17640
  { 1039, 2,  1,  0,  897,  0, 0x1600026005ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #1039 = Int_CVTTSD2SI64rr
17641
  { 1040, 6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x1600006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1040 = Int_CVTTSD2SIrm
17642
  { 1041, 2,  1,  0,  897,  0, 0x1600006005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #1041 = Int_CVTTSD2SIrr
17643
  { 1042, 6,  1,  0,  895,  0|(1ULL<<MCID::MayLoad), 0x1600025806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1042 = Int_CVTTSS2SI64rm
17644
  { 1043, 2,  1,  0,  893,  0, 0x1600025805ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #1043 = Int_CVTTSS2SI64rr
17645
  { 1044, 6,  1,  0,  896,  0|(1ULL<<MCID::MayLoad), 0x1600005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1044 = Int_CVTTSS2SIrm
17646
  { 1045, 2,  1,  0,  894,  0, 0x1600005805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #1045 = Int_CVTTSS2SIrr
17647
  { 1046, 0,  0,  0,  206,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1046 = Int_MemBarrier
17648
  { 1047, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x1700005006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #1047 = Int_UCOMISDrm
17649
  { 1048, 2,  0,  0,  76, 0, 0x1700005005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #1048 = Int_UCOMISDrr
17650
  { 1049, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x1700004806ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #1049 = Int_UCOMISSrm
17651
  { 1050, 2,  0,  0,  76, 0, 0x1700004805ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #1050 = Int_UCOMISSrr
17652
  { 1051, 8,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x16120046006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #1051 = Int_VCMPSDrm
17653
  { 1052, 4,  1,  0,  20, 0, 0x16120046005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #1052 = Int_VCMPSDrr
17654
  { 1053, 8,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x16120045806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #1053 = Int_VCMPSSrm
17655
  { 1054, 4,  1,  0,  20, 0, 0x16120045805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #1054 = Int_VCMPSSrr
17656
  { 1055, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x101097e0005006ULL, nullptr, ImplicitList6, OperandInfo153, -1 ,nullptr },  // Inst #1055 = Int_VCOMISDZrm
17657
  { 1056, 2,  0,  0,  76, 0, 0x101097e0005005ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr },  // Inst #1056 = Int_VCOMISDZrr
17658
  { 1057, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x17a0005006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #1057 = Int_VCOMISDrm
17659
  { 1058, 2,  0,  0,  76, 0, 0x17a0005005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #1058 = Int_VCOMISDrr
17660
  { 1059, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x81017e0004806ULL, nullptr, ImplicitList6, OperandInfo153, -1 ,nullptr },  // Inst #1059 = Int_VCOMISSZrm
17661
  { 1060, 2,  0,  0,  76, 0, 0x81017e0004805ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr },  // Inst #1060 = Int_VCOMISSZrr
17662
  { 1061, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x17a0004806ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #1061 = Int_VCOMISSrm
17663
  { 1062, 2,  0,  0,  76, 0, 0x17a0004805ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #1062 = Int_VCOMISSrr
17664
  { 1063, 7,  1,  0,  871,  0|(1ULL<<MCID::MayLoad), 0x12d20006005ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #1063 = Int_VCVTSD2SSrm
17665
  { 1064, 3,  1,  0,  869,  0, 0x12d20006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #1064 = Int_VCVTSD2SSrr
17666
  { 1065, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x20019560006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #1065 = Int_VCVTSI2SD64Zrm
17667
  { 1066, 3,  1,  0,  96, 0, 0x20019560006005ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr },  // Inst #1066 = Int_VCVTSI2SD64Zrr
17668
  { 1067, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x19520006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #1067 = Int_VCVTSI2SD64rm
17669
  { 1068, 3,  1,  0,  96, 0, 0x19520006005ULL, nullptr, nullptr, OperandInfo159, -1 ,nullptr },  // Inst #1068 = Int_VCVTSI2SD64rr
17670
  { 1069, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x20011560006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #1069 = Int_VCVTSI2SDZrm
17671
  { 1070, 3,  1,  0,  96, 0, 0x20011560006005ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr },  // Inst #1070 = Int_VCVTSI2SDZrr
17672
  { 1071, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x11520006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #1071 = Int_VCVTSI2SDrm
17673
  { 1072, 3,  1,  0,  96, 0, 0x11520006005ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr },  // Inst #1072 = Int_VCVTSI2SDrr
17674
  { 1073, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x20019560005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #1073 = Int_VCVTSI2SS64Zrm
17675
  { 1074, 3,  1,  0,  96, 0, 0x20019560005805ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr },  // Inst #1074 = Int_VCVTSI2SS64Zrr
17676
  { 1075, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x19520005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #1075 = Int_VCVTSI2SS64rm
17677
  { 1076, 3,  1,  0,  891,  0, 0x19520005805ULL, nullptr, nullptr, OperandInfo159, -1 ,nullptr },  // Inst #1076 = Int_VCVTSI2SS64rr
17678
  { 1077, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x20011560005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #1077 = Int_VCVTSI2SSZrm
17679
  { 1078, 3,  1,  0,  96, 0, 0x20011560005805ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr },  // Inst #1078 = Int_VCVTSI2SSZrr
17680
  { 1079, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x11520005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #1079 = Int_VCVTSI2SSrm
17681
  { 1080, 3,  1,  0,  891,  0, 0x11520005805ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr },  // Inst #1080 = Int_VCVTSI2SSrr
17682
  { 1081, 7,  1,  0,  877,  0|(1ULL<<MCID::MayLoad), 0x12d20005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #1081 = Int_VCVTSS2SDrm
17683
  { 1082, 3,  1,  0,  875,  0, 0x12d20005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #1082 = Int_VCVTSS2SDrr
17684
  { 1083, 6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x9620006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1083 = Int_VCVTTSD2SI64rm
17685
  { 1084, 2,  1,  0,  897,  0, 0x9620006005ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #1084 = Int_VCVTTSD2SI64rr
17686
  { 1085, 6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x1620006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1085 = Int_VCVTTSD2SIrm
17687
  { 1086, 2,  1,  0,  897,  0, 0x1620006005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #1086 = Int_VCVTTSD2SIrr
17688
  { 1087, 6,  1,  0,  895,  0|(1ULL<<MCID::MayLoad), 0x9620005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1087 = Int_VCVTTSS2SI64rm
17689
  { 1088, 2,  1,  0,  893,  0, 0x9620005805ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #1088 = Int_VCVTTSS2SI64rr
17690
  { 1089, 6,  1,  0,  896,  0|(1ULL<<MCID::MayLoad), 0x1620005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1089 = Int_VCVTTSS2SIrm
17691
  { 1090, 2,  1,  0,  894,  0, 0x1620005805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #1090 = Int_VCVTTSS2SIrr
17692
  { 1091, 7,  1,  0,  205,  0|(1ULL<<MCID::MayLoad), 0x20011560006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #1091 = Int_VCVTUSI2SDZrm
17693
  { 1092, 3,  1,  0,  96, 0, 0x20011560006005ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr },  // Inst #1092 = Int_VCVTUSI2SDZrr
17694
  { 1093, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x10109760005006ULL, nullptr, ImplicitList6, OperandInfo153, -1 ,nullptr },  // Inst #1093 = Int_VUCOMISDZrm
17695
  { 1094, 2,  0,  0,  76, 0, 0x10109760005005ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr },  // Inst #1094 = Int_VUCOMISDZrr
17696
  { 1095, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x1720005006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #1095 = Int_VUCOMISDrm
17697
  { 1096, 2,  0,  0,  76, 0, 0x1720005005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #1096 = Int_VUCOMISDrr
17698
  { 1097, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x8101760004806ULL, nullptr, ImplicitList6, OperandInfo153, -1 ,nullptr },  // Inst #1097 = Int_VUCOMISSZrm
17699
  { 1098, 2,  0,  0,  76, 0, 0x8101760004805ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr },  // Inst #1098 = Int_VUCOMISSZrr
17700
  { 1099, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x1720004806ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #1099 = Int_VUCOMISSrm
17701
  { 1100, 2,  0,  0,  76, 0, 0x1720004805ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #1100 = Int_VUCOMISSrr
17702
  { 1101, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3980080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1101 = JAE_1
17703
  { 1102, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4180104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1102 = JAE_2
17704
  { 1103, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4180184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1103 = JAE_4
17705
  { 1104, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3b80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1104 = JA_1
17706
  { 1105, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4380104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1105 = JA_2
17707
  { 1106, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4380184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1106 = JA_4
17708
  { 1107, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3b00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1107 = JBE_1
17709
  { 1108, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4300104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1108 = JBE_2
17710
  { 1109, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4300184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1109 = JBE_4
17711
  { 1110, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3900080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1110 = JB_1
17712
  { 1111, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4100104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1111 = JB_2
17713
  { 1112, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4100184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1112 = JB_4
17714
  { 1113, 1,  0,  0,  706,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080201ULL, ImplicitList34, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1113 = JCXZ
17715
  { 1114, 1,  0,  0,  208,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080401ULL, ImplicitList35, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1114 = JECXZ
17716
  { 1115, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3a00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1115 = JE_1
17717
  { 1116, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4200104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1116 = JE_2
17718
  { 1117, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4200184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1117 = JE_4
17719
  { 1118, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3e80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1118 = JGE_1
17720
  { 1119, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4680104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1119 = JGE_2
17721
  { 1120, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4680184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1120 = JGE_4
17722
  { 1121, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3f80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1121 = JG_1
17723
  { 1122, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4780104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1122 = JG_2
17724
  { 1123, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4780184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1123 = JG_4
17725
  { 1124, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3f00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1124 = JLE_1
17726
  { 1125, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4700104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1125 = JLE_2
17727
  { 1126, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4700184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1126 = JLE_4
17728
  { 1127, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3e00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1127 = JL_1
17729
  { 1128, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4600104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1128 = JL_2
17730
  { 1129, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4600184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1129 = JL_4
17731
  { 1130, 5,  0,  0,  209,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f8000009cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1130 = JMP16m
17732
  { 1131, 1,  0,  0,  210,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f80000094ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #1131 = JMP16r
17733
  { 1132, 5,  0,  0,  209,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f8000011cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1132 = JMP32m
17734
  { 1133, 1,  0,  0,  210,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f80000114ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #1133 = JMP32r
17735
  { 1134, 5,  0,  0,  209,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f8000001cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1134 = JMP64m
17736
  { 1135, 1,  0,  0,  210,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f80000014ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #1135 = JMP64r
17737
  { 1136, 1,  0,  0,  211,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7580080001ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1136 = JMP_1
17738
  { 1137, 1,  0,  0,  211,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7480100081ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1137 = JMP_2
17739
  { 1138, 1,  0,  0,  211,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7480180101ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1138 = JMP_4
17740
  { 1139, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3a80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1139 = JNE_1
17741
  { 1140, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4280104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1140 = JNE_2
17742
  { 1141, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4280184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1141 = JNE_4
17743
  { 1142, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3880080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1142 = JNO_1
17744
  { 1143, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4080104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1143 = JNO_2
17745
  { 1144, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4080184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1144 = JNO_4
17746
  { 1145, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3d80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1145 = JNP_1
17747
  { 1146, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4580104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1146 = JNP_2
17748
  { 1147, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4580184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1147 = JNP_4
17749
  { 1148, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3c80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1148 = JNS_1
17750
  { 1149, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4480104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1149 = JNS_2
17751
  { 1150, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4480184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1150 = JNS_4
17752
  { 1151, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3800080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1151 = JO_1
17753
  { 1152, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4000104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1152 = JO_2
17754
  { 1153, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4000184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1153 = JO_4
17755
  { 1154, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3d00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1154 = JP_1
17756
  { 1155, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4500104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1155 = JP_2
17757
  { 1156, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4500184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1156 = JP_4
17758
  { 1157, 1,  0,  0,  706,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080601ULL, ImplicitList36, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1157 = JRCXZ
17759
  { 1158, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3c00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1158 = JS_1
17760
  { 1159, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4400104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1159 = JS_2
17761
  { 1160, 1,  0,  0,  207,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4400184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1160 = JS_4
17762
  { 1161, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x92520005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr },  // Inst #1161 = KADDBrr
17763
  { 1162, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x9a520005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #1162 = KADDDrr
17764
  { 1163, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x9a520004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #1163 = KADDQrr
17765
  { 1164, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x92520004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr },  // Inst #1164 = KADDWrr
17766
  { 1165, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x920a0005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr },  // Inst #1165 = KANDBrr
17767
  { 1166, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x9a0a0005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #1166 = KANDDrr
17768
  { 1167, 3,  1,  0,  0,  0, 0x92120005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr },  // Inst #1167 = KANDNBrr
17769
  { 1168, 3,  1,  0,  0,  0, 0x9a120005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #1168 = KANDNDrr
17770
  { 1169, 3,  1,  0,  0,  0, 0x9a120004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #1169 = KANDNQrr
17771
  { 1170, 3,  1,  0,  0,  0, 0x92120004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr },  // Inst #1170 = KANDNWrr
17772
  { 1171, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x9a0a0004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #1171 = KANDQrr
17773
  { 1172, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x920a0004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr },  // Inst #1172 = KANDWrr
17774
  { 1173, 2,  1,  0,  0,  0, 0x4820005005ULL, nullptr, nullptr, OperandInfo166, -1 ,nullptr },  // Inst #1173 = KMOVBkk
17775
  { 1174, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4820005006ULL, nullptr, nullptr, OperandInfo167, -1 ,nullptr },  // Inst #1174 = KMOVBkm
17776
  { 1175, 2,  1,  0,  0,  0, 0x4920005005ULL, nullptr, nullptr, OperandInfo168, -1 ,nullptr },  // Inst #1175 = KMOVBkr
17777
  { 1176, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x48a0005004ULL, nullptr, nullptr, OperandInfo169, -1 ,nullptr },  // Inst #1176 = KMOVBmk
17778
  { 1177, 2,  1,  0,  0,  0, 0x49a0005005ULL, nullptr, nullptr, OperandInfo170, -1 ,nullptr },  // Inst #1177 = KMOVBrk
17779
  { 1178, 2,  1,  0,  0,  0, 0xc820005005ULL, nullptr, nullptr, OperandInfo171, -1 ,nullptr },  // Inst #1178 = KMOVDkk
17780
  { 1179, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0xc820005006ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr },  // Inst #1179 = KMOVDkm
17781
  { 1180, 2,  1,  0,  0,  0, 0x4920006005ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr },  // Inst #1180 = KMOVDkr
17782
  { 1181, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0xc8a0005004ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr },  // Inst #1181 = KMOVDmk
17783
  { 1182, 2,  1,  0,  0,  0, 0x49a0006005ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr },  // Inst #1182 = KMOVDrk
17784
  { 1183, 2,  1,  0,  0,  0, 0xc820004805ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr },  // Inst #1183 = KMOVQkk
17785
  { 1184, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0xc820004806ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr },  // Inst #1184 = KMOVQkm
17786
  { 1185, 2,  1,  0,  0,  0, 0xc920006005ULL, nullptr, nullptr, OperandInfo178, -1 ,nullptr },  // Inst #1185 = KMOVQkr
17787
  { 1186, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0xc8a0004804ULL, nullptr, nullptr, OperandInfo179, -1 ,nullptr },  // Inst #1186 = KMOVQmk
17788
  { 1187, 2,  1,  0,  0,  0, 0xc9a0006005ULL, nullptr, nullptr, OperandInfo180, -1 ,nullptr },  // Inst #1187 = KMOVQrk
17789
  { 1188, 2,  1,  0,  0,  0, 0x4820004805ULL, nullptr, nullptr, OperandInfo181, -1 ,nullptr },  // Inst #1188 = KMOVWkk
17790
  { 1189, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4820004806ULL, nullptr, nullptr, OperandInfo182, -1 ,nullptr },  // Inst #1189 = KMOVWkm
17791
  { 1190, 2,  1,  0,  0,  0, 0x4920004805ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr },  // Inst #1190 = KMOVWkr
17792
  { 1191, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x48a0004804ULL, nullptr, nullptr, OperandInfo184, -1 ,nullptr },  // Inst #1191 = KMOVWmk
17793
  { 1192, 2,  1,  0,  0,  0, 0x49a0004805ULL, nullptr, nullptr, OperandInfo185, -1 ,nullptr },  // Inst #1192 = KMOVWrk
17794
  { 1193, 2,  1,  0,  0,  0, 0x2220005005ULL, nullptr, nullptr, OperandInfo166, -1 ,nullptr },  // Inst #1193 = KNOTBrr
17795
  { 1194, 2,  1,  0,  0,  0, 0xa220005005ULL, nullptr, nullptr, OperandInfo171, -1 ,nullptr },  // Inst #1194 = KNOTDrr
17796
  { 1195, 2,  1,  0,  0,  0, 0xa220004805ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr },  // Inst #1195 = KNOTQrr
17797
  { 1196, 2,  1,  0,  0,  0, 0x2220004805ULL, nullptr, nullptr, OperandInfo181, -1 ,nullptr },  // Inst #1196 = KNOTWrr
17798
  { 1197, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x922a0005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr },  // Inst #1197 = KORBrr
17799
  { 1198, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x9a2a0005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #1198 = KORDrr
17800
  { 1199, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x9a2a0004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #1199 = KORQrr
17801
  { 1200, 2,  0,  0,  0,  0, 0x4c20005005ULL, nullptr, ImplicitList6, OperandInfo166, -1 ,nullptr },  // Inst #1200 = KORTESTBrr
17802
  { 1201, 2,  0,  0,  0,  0, 0xcc20005005ULL, nullptr, ImplicitList6, OperandInfo171, -1 ,nullptr },  // Inst #1201 = KORTESTDrr
17803
  { 1202, 2,  0,  0,  0,  0, 0xcc20004805ULL, nullptr, ImplicitList6, OperandInfo176, -1 ,nullptr },  // Inst #1202 = KORTESTQrr
17804
  { 1203, 2,  0,  0,  0,  0, 0x4c20004805ULL, nullptr, ImplicitList6, OperandInfo181, -1 ,nullptr },  // Inst #1203 = KORTESTWrr
17805
  { 1204, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x922a0004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr },  // Inst #1204 = KORWrr
17806
  { 1205, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #1205 = KSET0B
17807
  { 1206, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr },  // Inst #1206 = KSET0D
17808
  { 1207, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo188, -1 ,nullptr },  // Inst #1207 = KSET0Q
17809
  { 1208, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo189, -1 ,nullptr },  // Inst #1208 = KSET0W
17810
  { 1209, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo186, -1 ,nullptr },  // Inst #1209 = KSET1B
17811
  { 1210, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr },  // Inst #1210 = KSET1D
17812
  { 1211, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo188, -1 ,nullptr },  // Inst #1211 = KSET1Q
17813
  { 1212, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo189, -1 ,nullptr },  // Inst #1212 = KSET1W
17814
  { 1213, 3,  1,  0,  0,  0, 0x192004d005ULL, nullptr, nullptr, OperandInfo190, -1 ,nullptr },  // Inst #1213 = KSHIFTLBri
17815
  { 1214, 3,  1,  0,  0,  0, 0x19a004d005ULL, nullptr, nullptr, OperandInfo191, -1 ,nullptr },  // Inst #1214 = KSHIFTLDri
17816
  { 1215, 3,  1,  0,  0,  0, 0x99a004d005ULL, nullptr, nullptr, OperandInfo192, -1 ,nullptr },  // Inst #1215 = KSHIFTLQri
17817
  { 1216, 3,  1,  0,  0,  0, 0x992004d005ULL, nullptr, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1216 = KSHIFTLWri
17818
  { 1217, 3,  1,  0,  0,  0, 0x182004d005ULL, nullptr, nullptr, OperandInfo190, -1 ,nullptr },  // Inst #1217 = KSHIFTRBri
17819
  { 1218, 3,  1,  0,  0,  0, 0x18a004d005ULL, nullptr, nullptr, OperandInfo191, -1 ,nullptr },  // Inst #1218 = KSHIFTRDri
17820
  { 1219, 3,  1,  0,  0,  0, 0x98a004d005ULL, nullptr, nullptr, OperandInfo192, -1 ,nullptr },  // Inst #1219 = KSHIFTRQri
17821
  { 1220, 3,  1,  0,  0,  0, 0x982004d005ULL, nullptr, nullptr, OperandInfo193, -1 ,nullptr },  // Inst #1220 = KSHIFTRWri
17822
  { 1221, 2,  0,  0,  0,  0, 0x4ca0005005ULL, nullptr, ImplicitList6, OperandInfo166, -1 ,nullptr },  // Inst #1221 = KTESTBrr
17823
  { 1222, 2,  0,  0,  0,  0, 0xcca0005005ULL, nullptr, ImplicitList6, OperandInfo171, -1 ,nullptr },  // Inst #1222 = KTESTDrr
17824
  { 1223, 2,  0,  0,  0,  0, 0xcca0004805ULL, nullptr, ImplicitList6, OperandInfo176, -1 ,nullptr },  // Inst #1223 = KTESTQrr
17825
  { 1224, 2,  0,  0,  0,  0, 0x4ca0004805ULL, nullptr, ImplicitList6, OperandInfo181, -1 ,nullptr },  // Inst #1224 = KTESTWrr
17826
  { 1225, 3,  1,  0,  0,  0, 0x925a0005005ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr },  // Inst #1225 = KUNPCKBWrr
17827
  { 1226, 3,  1,  0,  0,  0, 0x9a5a0004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #1226 = KUNPCKDQrr
17828
  { 1227, 3,  1,  0,  0,  0, 0x925a0004805ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #1227 = KUNPCKWDrr
17829
  { 1228, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x92320005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr },  // Inst #1228 = KXNORBrr
17830
  { 1229, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x9a320005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #1229 = KXNORDrr
17831
  { 1230, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x9a320004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #1230 = KXNORQrr
17832
  { 1231, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x92320004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr },  // Inst #1231 = KXNORWrr
17833
  { 1232, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x923a0005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr },  // Inst #1232 = KXORBrr
17834
  { 1233, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x9a3a0005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr },  // Inst #1233 = KXORDrr
17835
  { 1234, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x9a3a0004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr },  // Inst #1234 = KXORQrr
17836
  { 1235, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x923a0004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr },  // Inst #1235 = KXORWrr
17837
  { 1236, 0,  0,  0,  605,  0, 0x4f80000001ULL, ImplicitList6, ImplicitList37, nullptr, -1 ,nullptr },  // Inst #1236 = LAHF
17838
  { 1237, 6,  1,  0,  213,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x100004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1237 = LAR16rm
17839
  { 1238, 2,  1,  0,  214,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x100004085ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #1238 = LAR16rr
17840
  { 1239, 6,  1,  0,  213,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x100004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1239 = LAR32rm
17841
  { 1240, 2,  1,  0,  214,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x100004105ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #1240 = LAR32rr
17842
  { 1241, 6,  1,  0,  213,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x100024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1241 = LAR64rm
17843
  { 1242, 2,  1,  0,  214,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x100024005ULL, nullptr, nullptr, OperandInfo194, -1 ,nullptr },  // Inst #1242 = LAR64rr
17844
  { 1243, 6,  0,  0,  215,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882004084ULL, ImplicitList3, ImplicitList2, OperandInfo21, -1 ,nullptr },  // Inst #1243 = LCMPXCHG16
17845
  { 1244, 5,  0,  0,  216,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6382024019ULL, ImplicitList18, ImplicitList19, OperandInfo43, -1 ,nullptr },  // Inst #1244 = LCMPXCHG16B
17846
  { 1245, 6,  0,  0,  215,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882004104ULL, ImplicitList9, ImplicitList7, OperandInfo25, -1 ,nullptr },  // Inst #1245 = LCMPXCHG32
17847
  { 1246, 6,  0,  0,  215,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882024004ULL, ImplicitList10, ImplicitList8, OperandInfo29, -1 ,nullptr },  // Inst #1246 = LCMPXCHG64
17848
  { 1247, 6,  0,  0,  217,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5802004004ULL, ImplicitList4, ImplicitList1, OperandInfo33, -1 ,nullptr },  // Inst #1247 = LCMPXCHG8
17849
  { 1248, 5,  0,  0,  218,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6382004019ULL, ImplicitList20, ImplicitList21, OperandInfo43, -1 ,nullptr },  // Inst #1248 = LCMPXCHG8B
17850
  { 1249, 6,  1,  0,  219,  0|(1ULL<<MCID::MayLoad), 0x7810006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1249 = LDDQUrm
17851
  { 1250, 5,  0,  0,  945,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000401aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1250 = LDMXCSR
17852
  { 1251, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6280000086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1251 = LDS16rm
17853
  { 1252, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6280000106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1252 = LDS32rm
17854
  { 1253, 0,  0,  0,  746,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000004eULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr },  // Inst #1253 = LD_F0
17855
  { 1254, 0,  0,  0,  747,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000048ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr },  // Inst #1254 = LD_F1
17856
  { 1255, 5,  0,  0,  224,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1255 = LD_F32m
17857
  { 1256, 5,  0,  0,  224,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1256 = LD_F64m
17858
  { 1257, 5,  0,  0,  738,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d8000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1257 = LD_F80m
17859
  { 1258, 1,  1,  0,  0,  0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo195, -1 ,nullptr },  // Inst #1258 = LD_Fp032
17860
  { 1259, 1,  1,  0,  0,  0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo196, -1 ,nullptr },  // Inst #1259 = LD_Fp064
17861
  { 1260, 1,  1,  0,  0,  0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo197, -1 ,nullptr },  // Inst #1260 = LD_Fp080
17862
  { 1261, 1,  1,  0,  0,  0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo195, -1 ,nullptr },  // Inst #1261 = LD_Fp132
17863
  { 1262, 1,  1,  0,  0,  0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo196, -1 ,nullptr },  // Inst #1262 = LD_Fp164
17864
  { 1263, 1,  1,  0,  0,  0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo197, -1 ,nullptr },  // Inst #1263 = LD_Fp180
17865
  { 1264, 6,  1,  0,  0,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo143, -1 ,nullptr },  // Inst #1264 = LD_Fp32m
17866
  { 1265, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo144, -1 ,nullptr },  // Inst #1265 = LD_Fp32m64
17867
  { 1266, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr },  // Inst #1266 = LD_Fp32m80
17868
  { 1267, 6,  1,  0,  0,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo144, -1 ,nullptr },  // Inst #1267 = LD_Fp64m
17869
  { 1268, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr },  // Inst #1268 = LD_Fp64m80
17870
  { 1269, 6,  1,  0,  0,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr },  // Inst #1269 = LD_Fp80m
17871
  { 1270, 1,  0,  0,  737,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000010ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #1270 = LD_Frr
17872
  { 1271, 6,  1,  0,  227,  0, 0x4680000086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1271 = LEA16r
17873
  { 1272, 6,  1,  0,  228,  0|(1ULL<<MCID::Rematerializable), 0x4680000106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1272 = LEA32r
17874
  { 1273, 6,  1,  0,  228,  0, 0x4680000106ULL, nullptr, nullptr, OperandInfo198, -1 ,nullptr },  // Inst #1273 = LEA64_32r
17875
  { 1274, 6,  1,  0,  228,  0|(1ULL<<MCID::Rematerializable), 0x4680020006ULL, nullptr, nullptr, OperandInfo199, -1 ,nullptr },  // Inst #1274 = LEA64r
17876
  { 1275, 0,  0,  0,  731,  0|(1ULL<<MCID::MayLoad), 0x6480000001ULL, ImplicitList38, ImplicitList38, nullptr, -1 ,nullptr },  // Inst #1275 = LEAVE
17877
  { 1276, 0,  0,  0,  731,  0|(1ULL<<MCID::MayLoad), 0x6480000001ULL, ImplicitList39, ImplicitList39, nullptr, -1 ,nullptr },  // Inst #1276 = LEAVE64
17878
  { 1277, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6200000086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1277 = LES16rm
17879
  { 1278, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6200000106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1278 = LES32rm
17880
  { 1279, 0,  0,  0,  230,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700004048ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1279 = LFENCE
17881
  { 1280, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1280 = LFS16rm
17882
  { 1281, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1281 = LFS32rm
17883
  { 1282, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1282 = LFS64rm
17884
  { 1283, 5,  0,  0,  231,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000409aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1283 = LGDT16m
17885
  { 1284, 5,  0,  0,  231,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000411aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1284 = LGDT32m
17886
  { 1285, 5,  0,  0,  231,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000401aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1285 = LGDT64m
17887
  { 1286, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1286 = LGS16rm
17888
  { 1287, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1287 = LGS32rm
17889
  { 1288, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1288 = LGS64rm
17890
  { 1289, 5,  0,  0,  232,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000409bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1289 = LIDT16m
17891
  { 1290, 5,  0,  0,  232,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000411bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1290 = LIDT32m
17892
  { 1291, 5,  0,  0,  232,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000401bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1291 = LIDT64m
17893
  { 1292, 5,  0,  0,  233,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x401aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1292 = LLDT16m
17894
  { 1293, 1,  0,  0,  234,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4012ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #1293 = LLDT16r
17895
  { 1294, 5,  0,  0,  235,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000401eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1294 = LMSW16m
17896
  { 1295, 1,  0,  0,  236,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004016ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #1295 = LMSW16r
17897
  { 1296, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40820c0098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1296 = LOCK_ADD16mi
17898
  { 1297, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182040098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1297 = LOCK_ADD16mi8
17899
  { 1298, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x82000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #1298 = LOCK_ADD16mr
17900
  { 1299, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4082140118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1299 = LOCK_ADD32mi
17901
  { 1300, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182040118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1300 = LOCK_ADD32mi8
17902
  { 1301, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x82000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #1301 = LOCK_ADD32mr
17903
  { 1302, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40821e0018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1302 = LOCK_ADD64mi32
17904
  { 1303, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182060018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1303 = LOCK_ADD64mi8
17905
  { 1304, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x82020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #1304 = LOCK_ADD64mr
17906
  { 1305, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4002040018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1305 = LOCK_ADD8mi
17907
  { 1306, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #1306 = LOCK_ADD8mr
17908
  { 1307, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40820c009cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1307 = LOCK_AND16mi
17909
  { 1308, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204009cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1308 = LOCK_AND16mi8
17910
  { 1309, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1082000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #1309 = LOCK_AND16mr
17911
  { 1310, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x408214011cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1310 = LOCK_AND32mi
17912
  { 1311, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204011cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1311 = LOCK_AND32mi8
17913
  { 1312, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1082000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #1312 = LOCK_AND32mr
17914
  { 1313, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40821e001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1313 = LOCK_AND64mi32
17915
  { 1314, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418206001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1314 = LOCK_AND64mi8
17916
  { 1315, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1082020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #1315 = LOCK_AND64mr
17917
  { 1316, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x400204001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1316 = LOCK_AND8mi
17918
  { 1317, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1002000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #1317 = LOCK_AND8mr
17919
  { 1318, 5,  0,  0,  103,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82000099ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1318 = LOCK_DEC16m
17920
  { 1319, 5,  0,  0,  103,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82000119ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1319 = LOCK_DEC32m
17921
  { 1320, 5,  0,  0,  103,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82020019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1320 = LOCK_DEC64m
17922
  { 1321, 5,  0,  0,  103,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f02000019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1321 = LOCK_DEC8m
17923
  { 1322, 5,  0,  0,  103,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82000098ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1322 = LOCK_INC16m
17924
  { 1323, 5,  0,  0,  103,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82000118ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1323 = LOCK_INC32m
17925
  { 1324, 5,  0,  0,  103,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82020018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1324 = LOCK_INC64m
17926
  { 1325, 5,  0,  0,  103,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f02000018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1325 = LOCK_INC8m
17927
  { 1326, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40820c0099ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1326 = LOCK_OR16mi
17928
  { 1327, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182040099ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1327 = LOCK_OR16mi8
17929
  { 1328, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x482000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #1328 = LOCK_OR16mr
17930
  { 1329, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4082140119ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1329 = LOCK_OR32mi
17931
  { 1330, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182040119ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1330 = LOCK_OR32mi8
17932
  { 1331, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x482000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #1331 = LOCK_OR32mr
17933
  { 1332, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40821e0019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1332 = LOCK_OR64mi32
17934
  { 1333, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182060019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1333 = LOCK_OR64mi8
17935
  { 1334, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x482020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #1334 = LOCK_OR64mr
17936
  { 1335, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4002040019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1335 = LOCK_OR8mi
17937
  { 1336, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x402000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #1336 = LOCK_OR8mr
17938
  { 1337, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7800000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1337 = LOCK_PREFIX
17939
  { 1338, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40820c009dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1338 = LOCK_SUB16mi
17940
  { 1339, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204009dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1339 = LOCK_SUB16mi8
17941
  { 1340, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1482000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #1340 = LOCK_SUB16mr
17942
  { 1341, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x408214011dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1341 = LOCK_SUB32mi
17943
  { 1342, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204011dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1342 = LOCK_SUB32mi8
17944
  { 1343, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1482000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #1343 = LOCK_SUB32mr
17945
  { 1344, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40821e001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1344 = LOCK_SUB64mi32
17946
  { 1345, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418206001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1345 = LOCK_SUB64mi8
17947
  { 1346, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1482020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #1346 = LOCK_SUB64mr
17948
  { 1347, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x400204001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1347 = LOCK_SUB8mi
17949
  { 1348, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1402000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #1348 = LOCK_SUB8mr
17950
  { 1349, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40820c009eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1349 = LOCK_XOR16mi
17951
  { 1350, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204009eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1350 = LOCK_XOR16mi8
17952
  { 1351, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1882000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #1351 = LOCK_XOR16mr
17953
  { 1352, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x408214011eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1352 = LOCK_XOR32mi
17954
  { 1353, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204011eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1353 = LOCK_XOR32mi8
17955
  { 1354, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1882000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #1354 = LOCK_XOR32mr
17956
  { 1355, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40821e001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1355 = LOCK_XOR64mi32
17957
  { 1356, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418206001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1356 = LOCK_XOR64mi8
17958
  { 1357, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1882020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #1357 = LOCK_XOR64mr
17959
  { 1358, 6,  0,  0,  237,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x400204001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1358 = LOCK_XOR8mi
17960
  { 1359, 6,  0,  0,  238,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1802000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #1359 = LOCK_XOR8mr
17961
  { 1360, 2,  0,  0,  717,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5600000008ULL, ImplicitList40, ImplicitList41, OperandInfo200, -1 ,nullptr },  // Inst #1360 = LODSB
17962
  { 1361, 2,  0,  0,  718,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680000108ULL, ImplicitList40, ImplicitList42, OperandInfo200, -1 ,nullptr },  // Inst #1361 = LODSL
17963
  { 1362, 2,  0,  0,  718,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680020008ULL, ImplicitList40, ImplicitList43, OperandInfo200, -1 ,nullptr },  // Inst #1362 = LODSQ
17964
  { 1363, 2,  0,  0,  717,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680000088ULL, ImplicitList40, ImplicitList44, OperandInfo200, -1 ,nullptr },  // Inst #1363 = LODSW
17965
  { 1364, 1,  0,  0,  707,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7100080001ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1364 = LOOP
17966
  { 1365, 1,  0,  0,  708,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7080080001ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1365 = LOOPE
17967
  { 1366, 1,  0,  0,  709,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7000080001ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #1366 = LOOPNE
17968
  { 1367, 1,  0,  0,  713,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501cc0101ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1367 = LRETIL
17969
  { 1368, 1,  0,  0,  713,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501ce0001ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1368 = LRETIQ
17970
  { 1369, 1,  0,  0,  713,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501cc0081ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1369 = LRETIW
17971
  { 1370, 0,  0,  0,  712,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c00101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1370 = LRETL
17972
  { 1371, 0,  0,  0,  712,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c20001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1371 = LRETQ
17973
  { 1372, 0,  0,  0,  712,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c00081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1372 = LRETW
17974
  { 1373, 6,  1,  0,  244,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x180004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1373 = LSL16rm
17975
  { 1374, 2,  1,  0,  245,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x180004085ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #1374 = LSL16rr
17976
  { 1375, 6,  1,  0,  244,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x180004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1375 = LSL32rm
17977
  { 1376, 2,  1,  0,  245,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x180004105ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #1376 = LSL32rr
17978
  { 1377, 6,  1,  0,  244,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x180024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1377 = LSL64rm
17979
  { 1378, 2,  1,  0,  245,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x180024005ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #1378 = LSL64rr
17980
  { 1379, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1379 = LSS16rm
17981
  { 1380, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1380 = LSS32rm
17982
  { 1381, 6,  1,  0,  221,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1381 = LSS64rm
17983
  { 1382, 5,  0,  0,  246,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x401bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1382 = LTRm
17984
  { 1383, 1,  0,  0,  246,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4013ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #1383 = LTRr
17985
  { 1384, 7,  1,  0,  247,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082004086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr },  // Inst #1384 = LXADD16
17986
  { 1385, 7,  1,  0,  247,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082004106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr },  // Inst #1385 = LXADD32
17987
  { 1386, 7,  1,  0,  247,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082024006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr },  // Inst #1386 = LXADD64
17988
  { 1387, 7,  1,  0,  248,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6002004006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr },  // Inst #1387 = LXADD8
17989
  { 1388, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x5e80005886ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr },  // Inst #1388 = LZCNT16rm
17990
  { 1389, 2,  1,  0,  0,  0, 0x5e80005885ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #1389 = LZCNT16rr
17991
  { 1390, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x5e80005906ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #1390 = LZCNT32rm
17992
  { 1391, 2,  1,  0,  0,  0, 0x5e80005905ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #1391 = LZCNT32rr
17993
  { 1392, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x5e80025806ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #1392 = LZCNT64rm
17994
  { 1393, 2,  1,  0,  0,  0, 0x5e80025805ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #1393 = LZCNT64rr
17995
  { 1394, 2,  0,  0,  800,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b98005005ULL, ImplicitList32, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1394 = MASKMOVDQU
17996
  { 1395, 2,  0,  0,  800,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b98005005ULL, ImplicitList45, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1395 = MASKMOVDQU64
17997
  { 1396, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x2f90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1396 = MAXCPDrm
17998
  { 1397, 3,  1,  0,  14, 0|(1ULL<<MCID::Commutable), 0x2f90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1397 = MAXCPDrr
17999
  { 1398, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x2f88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1398 = MAXCPSrm
18000
  { 1399, 3,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x2f88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1399 = MAXCPSrr
18001
  { 1400, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x2f90006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #1400 = MAXCSDrm
18002
  { 1401, 3,  1,  0,  18, 0|(1ULL<<MCID::Commutable), 0x2f90006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #1401 = MAXCSDrr
18003
  { 1402, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x2f88005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1402 = MAXCSSrm
18004
  { 1403, 3,  1,  0,  20, 0|(1ULL<<MCID::Commutable), 0x2f88005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1403 = MAXCSSrr
18005
  { 1404, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x2f90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1404 = MAXPDrm
18006
  { 1405, 3,  1,  0,  14, 0, 0x2f90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1405 = MAXPDrr
18007
  { 1406, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x2f88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1406 = MAXPSrm
18008
  { 1407, 3,  1,  0,  16, 0, 0x2f88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1407 = MAXPSrr
18009
  { 1408, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x2f90006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #1408 = MAXSDrm
18010
  { 1409, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x2f90006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1409 = MAXSDrm_Int
18011
  { 1410, 3,  1,  0,  18, 0, 0x2f90006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #1410 = MAXSDrr
18012
  { 1411, 3,  1,  0,  18, 0, 0x2f90006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1411 = MAXSDrr_Int
18013
  { 1412, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x2f88005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1412 = MAXSSrm
18014
  { 1413, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x2f88005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1413 = MAXSSrm_Int
18015
  { 1414, 3,  1,  0,  20, 0, 0x2f88005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1414 = MAXSSrr
18016
  { 1415, 3,  1,  0,  20, 0, 0x2f88005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1415 = MAXSSrr_Int
18017
  { 1416, 0,  0,  0,  250,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700004050ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1416 = MFENCE
18018
  { 1417, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x2e90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1417 = MINCPDrm
18019
  { 1418, 3,  1,  0,  14, 0|(1ULL<<MCID::Commutable), 0x2e90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1418 = MINCPDrr
18020
  { 1419, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x2e88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1419 = MINCPSrm
18021
  { 1420, 3,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x2e88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1420 = MINCPSrr
18022
  { 1421, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x2e90006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #1421 = MINCSDrm
18023
  { 1422, 3,  1,  0,  18, 0|(1ULL<<MCID::Commutable), 0x2e90006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #1422 = MINCSDrr
18024
  { 1423, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x2e88005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1423 = MINCSSrm
18025
  { 1424, 3,  1,  0,  20, 0|(1ULL<<MCID::Commutable), 0x2e88005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1424 = MINCSSrr
18026
  { 1425, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x2e90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1425 = MINPDrm
18027
  { 1426, 3,  1,  0,  14, 0, 0x2e90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1426 = MINPDrr
18028
  { 1427, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x2e88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1427 = MINPSrm
18029
  { 1428, 3,  1,  0,  16, 0, 0x2e88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1428 = MINPSrr
18030
  { 1429, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x2e90006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #1429 = MINSDrm
18031
  { 1430, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x2e90006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1430 = MINSDrm_Int
18032
  { 1431, 3,  1,  0,  18, 0, 0x2e90006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #1431 = MINSDrr
18033
  { 1432, 3,  1,  0,  18, 0, 0x2e90006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1432 = MINSDrr_Int
18034
  { 1433, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x2e88005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1433 = MINSSrm
18035
  { 1434, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x2e88005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1434 = MINSSrm_Int
18036
  { 1435, 3,  1,  0,  20, 0, 0x2e88005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1435 = MINSSrr
18037
  { 1436, 3,  1,  0,  20, 0, 0x2e88005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1436 = MINSSrr_Int
18038
  { 1437, 6,  1,  0,  251,  0|(1ULL<<MCID::MayLoad), 0x1690005006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1437 = MMX_CVTPD2PIirm
18039
  { 1438, 2,  1,  0,  890,  0, 0x1690005005ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr },  // Inst #1438 = MMX_CVTPD2PIirr
18040
  { 1439, 6,  1,  0,  251,  0|(1ULL<<MCID::MayLoad), 0x1510005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1439 = MMX_CVTPI2PDirm
18041
  { 1440, 2,  1,  0,  889,  0, 0x1510005005ULL, nullptr, nullptr, OperandInfo203, -1 ,nullptr },  // Inst #1440 = MMX_CVTPI2PDirr
18042
  { 1441, 7,  1,  0,  253,  0|(1ULL<<MCID::MayLoad), 0x1508004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1441 = MMX_CVTPI2PSirm
18043
  { 1442, 3,  1,  0,  254,  0, 0x1508004805ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr },  // Inst #1442 = MMX_CVTPI2PSirr
18044
  { 1443, 6,  1,  0,  255,  0|(1ULL<<MCID::MayLoad), 0x1688004806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1443 = MMX_CVTPS2PIirm
18045
  { 1444, 2,  1,  0,  888,  0, 0x1688004805ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr },  // Inst #1444 = MMX_CVTPS2PIirr
18046
  { 1445, 6,  1,  0,  251,  0|(1ULL<<MCID::MayLoad), 0x1610005006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1445 = MMX_CVTTPD2PIirm
18047
  { 1446, 2,  1,  0,  890,  0, 0x1610005005ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr },  // Inst #1446 = MMX_CVTTPD2PIirr
18048
  { 1447, 6,  1,  0,  255,  0|(1ULL<<MCID::MayLoad), 0x1608004806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1447 = MMX_CVTTPS2PIirm
18049
  { 1448, 2,  1,  0,  888,  0, 0x1608004805ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr },  // Inst #1448 = MMX_CVTTPS2PIirr
18050
  { 1449, 0,  0,  0,  838,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3b80004801ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1449 = MMX_EMMS
18051
  { 1450, 2,  0,  0,  799,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80004805ULL, ImplicitList32, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #1450 = MMX_MASKMOVQ
18052
  { 1451, 2,  0,  0,  799,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80004805ULL, ImplicitList45, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #1451 = MMX_MASKMOVQ64
18053
  { 1452, 6,  1,  0,  259,  0|(1ULL<<MCID::MayStore), 0x3f00024804ULL, nullptr, nullptr, OperandInfo206, -1 ,nullptr },  // Inst #1452 = MMX_MOVD64from64rm
18054
  { 1453, 2,  1,  0,  779,  0|(1ULL<<MCID::Bitcast), 0x3f00024803ULL, nullptr, nullptr, OperandInfo207, -1 ,nullptr },  // Inst #1453 = MMX_MOVD64from64rr
18055
  { 1454, 2,  1,  0,  779,  0, 0x3f00004803ULL, nullptr, nullptr, OperandInfo208, -1 ,nullptr },  // Inst #1454 = MMX_MOVD64grr
18056
  { 1455, 6,  0,  0,  261,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3f00004804ULL, nullptr, nullptr, OperandInfo206, -1 ,nullptr },  // Inst #1455 = MMX_MOVD64mr
18057
  { 1456, 6,  1,  0,  262,  0|(1ULL<<MCID::MayLoad), 0x3700004806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1456 = MMX_MOVD64rm
18058
  { 1457, 2,  1,  0,  781,  0, 0x3700004805ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr },  // Inst #1457 = MMX_MOVD64rr
18059
  { 1458, 6,  1,  0,  264,  0|(1ULL<<MCID::MayLoad), 0x3700024806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1458 = MMX_MOVD64to64rm
18060
  { 1459, 2,  1,  0,  781,  0|(1ULL<<MCID::Bitcast), 0x3700024805ULL, nullptr, nullptr, OperandInfo210, -1 ,nullptr },  // Inst #1459 = MMX_MOVD64to64rr
18061
  { 1460, 2,  1,  0,  788,  0, 0x6b00046005ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr },  // Inst #1460 = MMX_MOVDQ2Qrr
18062
  { 1461, 2,  1,  0,  265,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00046005ULL, nullptr, nullptr, OperandInfo211, -1 ,nullptr },  // Inst #1461 = MMX_MOVFR642Qrr
18063
  { 1462, 6,  0,  0,  266,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7380004804ULL, nullptr, nullptr, OperandInfo206, -1 ,nullptr },  // Inst #1462 = MMX_MOVNTQmr
18064
  { 1463, 2,  1,  0,  789,  0, 0x6b00045805ULL, nullptr, nullptr, OperandInfo203, -1 ,nullptr },  // Inst #1463 = MMX_MOVQ2DQrr
18065
  { 1464, 2,  1,  0,  267,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00045805ULL, nullptr, nullptr, OperandInfo212, -1 ,nullptr },  // Inst #1464 = MMX_MOVQ2FR64rr
18066
  { 1465, 6,  0,  0,  266,  0|(1ULL<<MCID::MayStore), 0x3f80004804ULL, nullptr, nullptr, OperandInfo206, -1 ,nullptr },  // Inst #1465 = MMX_MOVQ64mr
18067
  { 1466, 6,  1,  0,  264,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x3780004806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1466 = MMX_MOVQ64rm
18068
  { 1467, 2,  1,  0,  785,  0|(1ULL<<MCID::Bitcast), 0x3780004805ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #1467 = MMX_MOVQ64rr
18069
  { 1468, 2,  1,  0,  785,  0|(1ULL<<MCID::Bitcast), 0x3f80004803ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #1468 = MMX_MOVQ64rr_REV
18070
  { 1469, 6,  1,  0,  268,  0|(1ULL<<MCID::MayLoad), 0xe18008806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1469 = MMX_PABSBrm64
18071
  { 1470, 2,  1,  0,  269,  0, 0xe18008805ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #1470 = MMX_PABSBrr64
18072
  { 1471, 6,  1,  0,  268,  0|(1ULL<<MCID::MayLoad), 0xf18008806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1471 = MMX_PABSDrm64
18073
  { 1472, 2,  1,  0,  269,  0, 0xf18008805ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #1472 = MMX_PABSDrr64
18074
  { 1473, 6,  1,  0,  268,  0|(1ULL<<MCID::MayLoad), 0xe98008806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #1473 = MMX_PABSWrm64
18075
  { 1474, 2,  1,  0,  269,  0, 0xe98008805ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #1474 = MMX_PABSWrr64
18076
  { 1475, 7,  1,  0,  791,  0|(1ULL<<MCID::MayLoad), 0x3580004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1475 = MMX_PACKSSDWirm
18077
  { 1476, 3,  1,  0,  790,  0, 0x3580004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1476 = MMX_PACKSSDWirr
18078
  { 1477, 7,  1,  0,  791,  0|(1ULL<<MCID::MayLoad), 0x3180004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1477 = MMX_PACKSSWBirm
18079
  { 1478, 3,  1,  0,  790,  0, 0x3180004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1478 = MMX_PACKSSWBirr
18080
  { 1479, 7,  1,  0,  791,  0|(1ULL<<MCID::MayLoad), 0x3380004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1479 = MMX_PACKUSWBirm
18081
  { 1480, 3,  1,  0,  790,  0, 0x3380004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1480 = MMX_PACKUSWBirr
18082
  { 1481, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x7e00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1481 = MMX_PADDBirm
18083
  { 1482, 3,  1,  0,  269,  0|(1ULL<<MCID::Commutable), 0x7e00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1482 = MMX_PADDBirr
18084
  { 1483, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x7f00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1483 = MMX_PADDDirm
18085
  { 1484, 3,  1,  0,  269,  0|(1ULL<<MCID::Commutable), 0x7f00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1484 = MMX_PADDDirr
18086
  { 1485, 7,  1,  0,  273,  0|(1ULL<<MCID::MayLoad), 0x6a00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1485 = MMX_PADDQirm
18087
  { 1486, 3,  1,  0,  274,  0|(1ULL<<MCID::Commutable), 0x6a00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1486 = MMX_PADDQirr
18088
  { 1487, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x7600004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1487 = MMX_PADDSBirm
18089
  { 1488, 3,  1,  0,  269,  0|(1ULL<<MCID::Commutable), 0x7600004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1488 = MMX_PADDSBirr
18090
  { 1489, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x7680004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1489 = MMX_PADDSWirm
18091
  { 1490, 3,  1,  0,  269,  0|(1ULL<<MCID::Commutable), 0x7680004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1490 = MMX_PADDSWirr
18092
  { 1491, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x6e00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1491 = MMX_PADDUSBirm
18093
  { 1492, 3,  1,  0,  269,  0|(1ULL<<MCID::Commutable), 0x6e00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1492 = MMX_PADDUSBirr
18094
  { 1493, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x6e80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1493 = MMX_PADDUSWirm
18095
  { 1494, 3,  1,  0,  269,  0|(1ULL<<MCID::Commutable), 0x6e80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1494 = MMX_PADDUSWirr
18096
  { 1495, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x7e80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1495 = MMX_PADDWirm
18097
  { 1496, 3,  1,  0,  269,  0|(1ULL<<MCID::Commutable), 0x7e80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1496 = MMX_PADDWirr
18098
  { 1497, 8,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x79804c806ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr },  // Inst #1497 = MMX_PALIGNR64irm
18099
  { 1498, 4,  1,  0,  276,  0, 0x79804c805ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr },  // Inst #1498 = MMX_PALIGNR64irr
18100
  { 1499, 7,  1,  0,  277,  0|(1ULL<<MCID::MayLoad), 0x6f80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1499 = MMX_PANDNirm
18101
  { 1500, 3,  1,  0,  278,  0, 0x6f80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1500 = MMX_PANDNirr
18102
  { 1501, 7,  1,  0,  277,  0|(1ULL<<MCID::MayLoad), 0x6d80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1501 = MMX_PANDirm
18103
  { 1502, 3,  1,  0,  278,  0|(1ULL<<MCID::Commutable), 0x6d80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1502 = MMX_PANDirr
18104
  { 1503, 7,  1,  0,  279,  0|(1ULL<<MCID::MayLoad), 0x7000004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1503 = MMX_PAVGBirm
18105
  { 1504, 3,  1,  0,  280,  0|(1ULL<<MCID::Commutable), 0x7000004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1504 = MMX_PAVGBirr
18106
  { 1505, 7,  1,  0,  279,  0|(1ULL<<MCID::MayLoad), 0x7180004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1505 = MMX_PAVGWirm
18107
  { 1506, 3,  1,  0,  280,  0|(1ULL<<MCID::Commutable), 0x7180004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1506 = MMX_PAVGWirr
18108
  { 1507, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x3a00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1507 = MMX_PCMPEQBirm
18109
  { 1508, 3,  1,  0,  269,  0, 0x3a00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1508 = MMX_PCMPEQBirr
18110
  { 1509, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x3b00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1509 = MMX_PCMPEQDirm
18111
  { 1510, 3,  1,  0,  269,  0, 0x3b00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1510 = MMX_PCMPEQDirr
18112
  { 1511, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x3a80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1511 = MMX_PCMPEQWirm
18113
  { 1512, 3,  1,  0,  269,  0, 0x3a80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1512 = MMX_PCMPEQWirr
18114
  { 1513, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x3200004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1513 = MMX_PCMPGTBirm
18115
  { 1514, 3,  1,  0,  269,  0, 0x3200004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1514 = MMX_PCMPGTBirr
18116
  { 1515, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x3300004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1515 = MMX_PCMPGTDirm
18117
  { 1516, 3,  1,  0,  269,  0, 0x3300004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1516 = MMX_PCMPGTDirr
18118
  { 1517, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x3280004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1517 = MMX_PCMPGTWirm
18119
  { 1518, 3,  1,  0,  269,  0, 0x3280004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1518 = MMX_PCMPGTWirr
18120
  { 1519, 3,  1,  0,  806,  0, 0x6280044805ULL, nullptr, nullptr, OperandInfo217, -1 ,nullptr },  // Inst #1519 = MMX_PEXTRWirri
18121
  { 1520, 7,  1,  0,  824,  0|(1ULL<<MCID::MayLoad), 0x198008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1520 = MMX_PHADDSWrm64
18122
  { 1521, 3,  1,  0,  819,  0, 0x198008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1521 = MMX_PHADDSWrr64
18123
  { 1522, 7,  1,  0,  824,  0|(1ULL<<MCID::MayLoad), 0x98008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1522 = MMX_PHADDWrm64
18124
  { 1523, 3,  1,  0,  819,  0, 0x98008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1523 = MMX_PHADDWrr64
18125
  { 1524, 7,  1,  0,  825,  0|(1ULL<<MCID::MayLoad), 0x118008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1524 = MMX_PHADDrm64
18126
  { 1525, 3,  1,  0,  820,  0, 0x118008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1525 = MMX_PHADDrr64
18127
  { 1526, 7,  1,  0,  825,  0|(1ULL<<MCID::MayLoad), 0x318008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1526 = MMX_PHSUBDrm64
18128
  { 1527, 3,  1,  0,  820,  0, 0x318008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1527 = MMX_PHSUBDrr64
18129
  { 1528, 7,  1,  0,  824,  0|(1ULL<<MCID::MayLoad), 0x398008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1528 = MMX_PHSUBSWrm64
18130
  { 1529, 3,  1,  0,  819,  0, 0x398008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1529 = MMX_PHSUBSWrr64
18131
  { 1530, 7,  1,  0,  824,  0|(1ULL<<MCID::MayLoad), 0x298008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1530 = MMX_PHSUBWrm64
18132
  { 1531, 3,  1,  0,  819,  0, 0x298008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1531 = MMX_PHSUBWrr64
18133
  { 1532, 8,  1,  0,  286,  0|(1ULL<<MCID::MayLoad), 0x6200044806ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr },  // Inst #1532 = MMX_PINSRWirmi
18134
  { 1533, 4,  1,  0,  287,  0, 0x6200044805ULL, nullptr, nullptr, OperandInfo218, -1 ,nullptr },  // Inst #1533 = MMX_PINSRWirri
18135
  { 1534, 7,  1,  0,  288,  0|(1ULL<<MCID::MayLoad), 0x218008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1534 = MMX_PMADDUBSWrm64
18136
  { 1535, 3,  1,  0,  289,  0, 0x218008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1535 = MMX_PMADDUBSWrr64
18137
  { 1536, 7,  1,  0,  288,  0|(1ULL<<MCID::MayLoad), 0x7a80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1536 = MMX_PMADDWDirm
18138
  { 1537, 3,  1,  0,  289,  0|(1ULL<<MCID::Commutable), 0x7a80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1537 = MMX_PMADDWDirr
18139
  { 1538, 7,  1,  0,  279,  0|(1ULL<<MCID::MayLoad), 0x7700004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1538 = MMX_PMAXSWirm
18140
  { 1539, 3,  1,  0,  280,  0|(1ULL<<MCID::Commutable), 0x7700004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1539 = MMX_PMAXSWirr
18141
  { 1540, 7,  1,  0,  279,  0|(1ULL<<MCID::MayLoad), 0x6f00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1540 = MMX_PMAXUBirm
18142
  { 1541, 3,  1,  0,  280,  0|(1ULL<<MCID::Commutable), 0x6f00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1541 = MMX_PMAXUBirr
18143
  { 1542, 7,  1,  0,  279,  0|(1ULL<<MCID::MayLoad), 0x7500004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1542 = MMX_PMINSWirm
18144
  { 1543, 3,  1,  0,  280,  0|(1ULL<<MCID::Commutable), 0x7500004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1543 = MMX_PMINSWirr
18145
  { 1544, 7,  1,  0,  279,  0|(1ULL<<MCID::MayLoad), 0x6d00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1544 = MMX_PMINUBirm
18146
  { 1545, 3,  1,  0,  280,  0|(1ULL<<MCID::Commutable), 0x6d00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1545 = MMX_PMINUBirr
18147
  { 1546, 2,  1,  0,  803,  0, 0x6b80004805ULL, nullptr, nullptr, OperandInfo208, -1 ,nullptr },  // Inst #1546 = MMX_PMOVMSKBrr
18148
  { 1547, 7,  1,  0,  288,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x598008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1547 = MMX_PMULHRSWrm64
18149
  { 1548, 3,  1,  0,  289,  0|(1ULL<<MCID::Commutable), 0x598008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1548 = MMX_PMULHRSWrr64
18150
  { 1549, 7,  1,  0,  288,  0|(1ULL<<MCID::MayLoad), 0x7200004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1549 = MMX_PMULHUWirm
18151
  { 1550, 3,  1,  0,  289,  0|(1ULL<<MCID::Commutable), 0x7200004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1550 = MMX_PMULHUWirr
18152
  { 1551, 7,  1,  0,  288,  0|(1ULL<<MCID::MayLoad), 0x7280004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1551 = MMX_PMULHWirm
18153
  { 1552, 3,  1,  0,  289,  0|(1ULL<<MCID::Commutable), 0x7280004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1552 = MMX_PMULHWirr
18154
  { 1553, 7,  1,  0,  288,  0|(1ULL<<MCID::MayLoad), 0x6a80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1553 = MMX_PMULLWirm
18155
  { 1554, 3,  1,  0,  289,  0|(1ULL<<MCID::Commutable), 0x6a80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1554 = MMX_PMULLWirr
18156
  { 1555, 7,  1,  0,  288,  0|(1ULL<<MCID::MayLoad), 0x7a00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1555 = MMX_PMULUDQirm
18157
  { 1556, 3,  1,  0,  289,  0|(1ULL<<MCID::Commutable), 0x7a00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1556 = MMX_PMULUDQirr
18158
  { 1557, 7,  1,  0,  277,  0|(1ULL<<MCID::MayLoad), 0x7580004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1557 = MMX_PORirm
18159
  { 1558, 3,  1,  0,  278,  0|(1ULL<<MCID::Commutable), 0x7580004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1558 = MMX_PORirr
18160
  { 1559, 7,  1,  0,  290,  0|(1ULL<<MCID::MayLoad), 0x7b00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1559 = MMX_PSADBWirm
18161
  { 1560, 3,  1,  0,  291,  0|(1ULL<<MCID::Commutable), 0x7b00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1560 = MMX_PSADBWirr
18162
  { 1561, 7,  1,  0,  292,  0|(1ULL<<MCID::MayLoad), 0x18008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1561 = MMX_PSHUFBrm64
18163
  { 1562, 3,  1,  0,  293,  0, 0x18008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1562 = MMX_PSHUFBrr64
18164
  { 1563, 7,  1,  0,  294,  0|(1ULL<<MCID::MayLoad), 0x3800044806ULL, nullptr, nullptr, OperandInfo219, -1 ,nullptr },  // Inst #1563 = MMX_PSHUFWmi
18165
  { 1564, 3,  1,  0,  293,  0, 0x3800044805ULL, nullptr, nullptr, OperandInfo220, -1 ,nullptr },  // Inst #1564 = MMX_PSHUFWri
18166
  { 1565, 7,  1,  0,  279,  0|(1ULL<<MCID::MayLoad), 0x418008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1565 = MMX_PSIGNBrm64
18167
  { 1566, 3,  1,  0,  280,  0, 0x418008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1566 = MMX_PSIGNBrr64
18168
  { 1567, 7,  1,  0,  279,  0|(1ULL<<MCID::MayLoad), 0x518008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1567 = MMX_PSIGNDrm64
18169
  { 1568, 3,  1,  0,  280,  0, 0x518008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1568 = MMX_PSIGNDrr64
18170
  { 1569, 7,  1,  0,  279,  0|(1ULL<<MCID::MayLoad), 0x498008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1569 = MMX_PSIGNWrm64
18171
  { 1570, 3,  1,  0,  280,  0, 0x498008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1570 = MMX_PSIGNWrr64
18172
  { 1571, 3,  1,  0,  295,  0, 0x3900044816ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr },  // Inst #1571 = MMX_PSLLDri
18173
  { 1572, 7,  1,  0,  296,  0|(1ULL<<MCID::MayLoad), 0x7900004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1572 = MMX_PSLLDrm
18174
  { 1573, 3,  1,  0,  297,  0, 0x7900004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1573 = MMX_PSLLDrr
18175
  { 1574, 3,  1,  0,  295,  0, 0x3980044816ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr },  // Inst #1574 = MMX_PSLLQri
18176
  { 1575, 7,  1,  0,  296,  0|(1ULL<<MCID::MayLoad), 0x7980004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1575 = MMX_PSLLQrm
18177
  { 1576, 3,  1,  0,  297,  0, 0x7980004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1576 = MMX_PSLLQrr
18178
  { 1577, 3,  1,  0,  295,  0, 0x3880044816ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr },  // Inst #1577 = MMX_PSLLWri
18179
  { 1578, 7,  1,  0,  296,  0|(1ULL<<MCID::MayLoad), 0x7880004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1578 = MMX_PSLLWrm
18180
  { 1579, 3,  1,  0,  297,  0, 0x7880004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1579 = MMX_PSLLWrr
18181
  { 1580, 3,  1,  0,  295,  0, 0x3900044814ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr },  // Inst #1580 = MMX_PSRADri
18182
  { 1581, 7,  1,  0,  296,  0|(1ULL<<MCID::MayLoad), 0x7100004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1581 = MMX_PSRADrm
18183
  { 1582, 3,  1,  0,  297,  0, 0x7100004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1582 = MMX_PSRADrr
18184
  { 1583, 3,  1,  0,  295,  0, 0x3880044814ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr },  // Inst #1583 = MMX_PSRAWri
18185
  { 1584, 7,  1,  0,  296,  0|(1ULL<<MCID::MayLoad), 0x7080004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1584 = MMX_PSRAWrm
18186
  { 1585, 3,  1,  0,  297,  0, 0x7080004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1585 = MMX_PSRAWrr
18187
  { 1586, 3,  1,  0,  295,  0, 0x3900044812ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr },  // Inst #1586 = MMX_PSRLDri
18188
  { 1587, 7,  1,  0,  296,  0|(1ULL<<MCID::MayLoad), 0x6900004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1587 = MMX_PSRLDrm
18189
  { 1588, 3,  1,  0,  297,  0, 0x6900004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1588 = MMX_PSRLDrr
18190
  { 1589, 3,  1,  0,  295,  0, 0x3980044812ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr },  // Inst #1589 = MMX_PSRLQri
18191
  { 1590, 7,  1,  0,  296,  0|(1ULL<<MCID::MayLoad), 0x6980004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1590 = MMX_PSRLQrm
18192
  { 1591, 3,  1,  0,  297,  0, 0x6980004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1591 = MMX_PSRLQrr
18193
  { 1592, 3,  1,  0,  295,  0, 0x3880044812ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr },  // Inst #1592 = MMX_PSRLWri
18194
  { 1593, 7,  1,  0,  296,  0|(1ULL<<MCID::MayLoad), 0x6880004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1593 = MMX_PSRLWrm
18195
  { 1594, 3,  1,  0,  297,  0, 0x6880004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1594 = MMX_PSRLWrr
18196
  { 1595, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x7c00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1595 = MMX_PSUBBirm
18197
  { 1596, 3,  1,  0,  269,  0, 0x7c00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1596 = MMX_PSUBBirr
18198
  { 1597, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x7d00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1597 = MMX_PSUBDirm
18199
  { 1598, 3,  1,  0,  269,  0, 0x7d00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1598 = MMX_PSUBDirr
18200
  { 1599, 7,  1,  0,  273,  0|(1ULL<<MCID::MayLoad), 0x7d80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1599 = MMX_PSUBQirm
18201
  { 1600, 3,  1,  0,  274,  0, 0x7d80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1600 = MMX_PSUBQirr
18202
  { 1601, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x7400004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1601 = MMX_PSUBSBirm
18203
  { 1602, 3,  1,  0,  269,  0, 0x7400004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1602 = MMX_PSUBSBirr
18204
  { 1603, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x7480004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1603 = MMX_PSUBSWirm
18205
  { 1604, 3,  1,  0,  269,  0, 0x7480004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1604 = MMX_PSUBSWirr
18206
  { 1605, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x6c00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1605 = MMX_PSUBUSBirm
18207
  { 1606, 3,  1,  0,  269,  0, 0x6c00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1606 = MMX_PSUBUSBirr
18208
  { 1607, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x6c80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1607 = MMX_PSUBUSWirm
18209
  { 1608, 3,  1,  0,  269,  0, 0x6c80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1608 = MMX_PSUBUSWirr
18210
  { 1609, 7,  1,  0,  272,  0|(1ULL<<MCID::MayLoad), 0x7c80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1609 = MMX_PSUBWirm
18211
  { 1610, 3,  1,  0,  269,  0, 0x7c80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1610 = MMX_PSUBWirr
18212
  { 1611, 7,  1,  0,  298,  0|(1ULL<<MCID::MayLoad), 0x3400004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1611 = MMX_PUNPCKHBWirm
18213
  { 1612, 3,  1,  0,  299,  0, 0x3400004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1612 = MMX_PUNPCKHBWirr
18214
  { 1613, 7,  1,  0,  298,  0|(1ULL<<MCID::MayLoad), 0x3500004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1613 = MMX_PUNPCKHDQirm
18215
  { 1614, 3,  1,  0,  299,  0, 0x3500004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1614 = MMX_PUNPCKHDQirr
18216
  { 1615, 7,  1,  0,  298,  0|(1ULL<<MCID::MayLoad), 0x3480004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1615 = MMX_PUNPCKHWDirm
18217
  { 1616, 3,  1,  0,  299,  0, 0x3480004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1616 = MMX_PUNPCKHWDirr
18218
  { 1617, 7,  1,  0,  300,  0|(1ULL<<MCID::MayLoad), 0x3000004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1617 = MMX_PUNPCKLBWirm
18219
  { 1618, 3,  1,  0,  301,  0, 0x3000004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1618 = MMX_PUNPCKLBWirr
18220
  { 1619, 7,  1,  0,  300,  0|(1ULL<<MCID::MayLoad), 0x3100004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1619 = MMX_PUNPCKLDQirm
18221
  { 1620, 3,  1,  0,  301,  0, 0x3100004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1620 = MMX_PUNPCKLDQirr
18222
  { 1621, 7,  1,  0,  300,  0|(1ULL<<MCID::MayLoad), 0x3080004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1621 = MMX_PUNPCKLWDirm
18223
  { 1622, 3,  1,  0,  301,  0, 0x3080004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1622 = MMX_PUNPCKLWDirr
18224
  { 1623, 7,  1,  0,  277,  0|(1ULL<<MCID::MayLoad), 0x7780004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #1623 = MMX_PXORirm
18225
  { 1624, 3,  1,  0,  278,  0|(1ULL<<MCID::Commutable), 0x7780004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #1624 = MMX_PXORirr
18226
  { 1625, 7,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo222, -1 ,nullptr },  // Inst #1625 = MONITOR
18227
  { 1626, 0,  0,  0,  302,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000405aULL, ImplicitList46, nullptr, nullptr, -1 ,nullptr },  // Inst #1626 = MONITORXrrr
18228
  { 1627, 0,  0,  0,  302,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004028ULL, ImplicitList46, nullptr, nullptr, -1 ,nullptr },  // Inst #1627 = MONITORrrr
18229
  { 1628, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5300004020ULL, ImplicitList47, ImplicitList48, nullptr, -1 ,nullptr },  // Inst #1628 = MONTMUL
18230
  { 1629, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1629 = MORESTACK_RET
18231
  { 1630, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1630 = MORESTACK_RET_RESTORE_R10
18232
  { 1631, 2,  0,  0,  303,  0|(1ULL<<MCID::MayLoad), 0x50800c0287ULL, nullptr, ImplicitList3, OperandInfo223, -1 ,nullptr },  // Inst #1631 = MOV16ao16
18233
  { 1632, 2,  0,  0,  303,  0|(1ULL<<MCID::MayLoad), 0x5080140487ULL, nullptr, ImplicitList3, OperandInfo223, -1 ,nullptr },  // Inst #1632 = MOV16ao32
18234
  { 1633, 2,  0,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x5080200687ULL, nullptr, ImplicitList3, OperandInfo223, -1 ,nullptr },  // Inst #1633 = MOV16ao64
18235
  { 1634, 6,  0,  0,  304,  0|(1ULL<<MCID::MayStore), 0x63800c0098ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #1634 = MOV16mi
18236
  { 1635, 6,  0,  0,  304,  0|(1ULL<<MCID::MayStore), 0x4480000084ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #1635 = MOV16mr
18237
  { 1636, 6,  1,  0,  305,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000084ULL, nullptr, nullptr, OperandInfo224, -1 ,nullptr },  // Inst #1636 = MOV16ms
18238
  { 1637, 2,  1,  0,  303,  0|(1ULL<<MCID::MayStore), 0x51800c0287ULL, ImplicitList3, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1637 = MOV16o16a
18239
  { 1638, 2,  1,  0,  303,  0|(1ULL<<MCID::MayStore), 0x5180140487ULL, ImplicitList3, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1638 = MOV16o32a
18240
  { 1639, 2,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x5180200687ULL, ImplicitList3, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1639 = MOV16o64a
18241
  { 1640, 2,  1,  0,  306,  0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5c000c0082ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #1640 = MOV16ri
18242
  { 1641, 2,  1,  0,  306,  0, 0x63800c0090ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr },  // Inst #1641 = MOV16ri_alt
18243
  { 1642, 6,  1,  0,  588,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580000086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1642 = MOV16rm
18244
  { 1643, 2,  1,  0,  306,  0, 0x4480000083ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #1643 = MOV16rr
18245
  { 1644, 2,  1,  0,  306,  0, 0x4580000085ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #1644 = MOV16rr_REV
18246
  { 1645, 2,  1,  0,  308,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000083ULL, nullptr, nullptr, OperandInfo225, -1 ,nullptr },  // Inst #1645 = MOV16rs
18247
  { 1646, 6,  1,  0,  309,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000086ULL, nullptr, nullptr, OperandInfo226, -1 ,nullptr },  // Inst #1646 = MOV16sm
18248
  { 1647, 2,  1,  0,  310,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000085ULL, nullptr, nullptr, OperandInfo227, -1 ,nullptr },  // Inst #1647 = MOV16sr
18249
  { 1648, 2,  0,  0,  303,  0|(1ULL<<MCID::MayLoad), 0x50800c0307ULL, nullptr, ImplicitList9, OperandInfo223, -1 ,nullptr },  // Inst #1648 = MOV32ao16
18250
  { 1649, 2,  0,  0,  303,  0|(1ULL<<MCID::MayLoad), 0x5080140507ULL, nullptr, ImplicitList9, OperandInfo223, -1 ,nullptr },  // Inst #1649 = MOV32ao32
18251
  { 1650, 2,  0,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x5080200707ULL, nullptr, ImplicitList9, OperandInfo223, -1 ,nullptr },  // Inst #1650 = MOV32ao64
18252
  { 1651, 2,  1,  0,  311,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1100004005ULL, nullptr, nullptr, OperandInfo228, -1 ,nullptr },  // Inst #1651 = MOV32cr
18253
  { 1652, 2,  1,  0,  312,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1180004005ULL, nullptr, nullptr, OperandInfo229, -1 ,nullptr },  // Inst #1652 = MOV32dr
18254
  { 1653, 6,  0,  0,  304,  0|(1ULL<<MCID::MayStore), 0x6380140118ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #1653 = MOV32mi
18255
  { 1654, 6,  0,  0,  304,  0|(1ULL<<MCID::MayStore), 0x4480000104ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #1654 = MOV32mr
18256
  { 1655, 6,  1,  0,  305,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000104ULL, nullptr, nullptr, OperandInfo224, -1 ,nullptr },  // Inst #1655 = MOV32ms
18257
  { 1656, 2,  1,  0,  303,  0|(1ULL<<MCID::MayStore), 0x51800c0307ULL, ImplicitList9, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1656 = MOV32o16a
18258
  { 1657, 2,  1,  0,  303,  0|(1ULL<<MCID::MayStore), 0x5180140507ULL, ImplicitList9, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1657 = MOV32o32a
18259
  { 1658, 2,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x5180200707ULL, ImplicitList9, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1658 = MOV32o64a
18260
  { 1659, 1,  1,  0,  313,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, ImplicitList6, OperandInfo83, -1 ,nullptr },  // Inst #1659 = MOV32r0
18261
  { 1660, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList6, OperandInfo83, -1 ,nullptr },  // Inst #1660 = MOV32r1
18262
  { 1661, 1,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList6, OperandInfo83, -1 ,nullptr },  // Inst #1661 = MOV32r_1
18263
  { 1662, 2,  1,  0,  314,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1000004003ULL, nullptr, nullptr, OperandInfo230, -1 ,nullptr },  // Inst #1662 = MOV32rc
18264
  { 1663, 2,  1,  0,  315,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1080004003ULL, nullptr, nullptr, OperandInfo231, -1 ,nullptr },  // Inst #1663 = MOV32rd
18265
  { 1664, 2,  1,  0,  306,  0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5c00140102ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr },  // Inst #1664 = MOV32ri
18266
  { 1665, 2,  1,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr },  // Inst #1665 = MOV32ri64
18267
  { 1666, 2,  1,  0,  306,  0, 0x6380140110ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr },  // Inst #1666 = MOV32ri_alt
18268
  { 1667, 6,  1,  0,  307,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580000106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1667 = MOV32rm
18269
  { 1668, 2,  1,  0,  306,  0, 0x4480000103ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #1668 = MOV32rr
18270
  { 1669, 2,  1,  0,  306,  0, 0x4580000105ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #1669 = MOV32rr_REV
18271
  { 1670, 2,  1,  0,  308,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000103ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr },  // Inst #1670 = MOV32rs
18272
  { 1671, 6,  1,  0,  309,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000106ULL, nullptr, nullptr, OperandInfo226, -1 ,nullptr },  // Inst #1671 = MOV32sm
18273
  { 1672, 2,  1,  0,  310,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000105ULL, nullptr, nullptr, OperandInfo233, -1 ,nullptr },  // Inst #1672 = MOV32sr
18274
  { 1673, 2,  0,  0,  303,  0|(1ULL<<MCID::MayLoad), 0x5080160407ULL, nullptr, ImplicitList10, OperandInfo223, -1 ,nullptr },  // Inst #1673 = MOV64ao32
18275
  { 1674, 2,  0,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x5080220607ULL, nullptr, ImplicitList10, OperandInfo223, -1 ,nullptr },  // Inst #1674 = MOV64ao64
18276
  { 1675, 2,  1,  0,  311,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1100004005ULL, nullptr, nullptr, OperandInfo234, -1 ,nullptr },  // Inst #1675 = MOV64cr
18277
  { 1676, 2,  1,  0,  312,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1180004005ULL, nullptr, nullptr, OperandInfo235, -1 ,nullptr },  // Inst #1676 = MOV64dr
18278
  { 1677, 6,  0,  0,  304,  0|(1ULL<<MCID::MayStore), 0x63801e0018ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #1677 = MOV64mi32
18279
  { 1678, 6,  0,  0,  304,  0|(1ULL<<MCID::MayStore), 0x4480020004ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #1678 = MOV64mr
18280
  { 1679, 6,  1,  0,  305,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600020004ULL, nullptr, nullptr, OperandInfo224, -1 ,nullptr },  // Inst #1679 = MOV64ms
18281
  { 1680, 2,  1,  0,  303,  0|(1ULL<<MCID::MayStore), 0x5180160407ULL, ImplicitList10, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1680 = MOV64o32a
18282
  { 1681, 2,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x5180220607ULL, ImplicitList10, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1681 = MOV64o64a
18283
  { 1682, 2,  1,  0,  314,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1000004003ULL, nullptr, nullptr, OperandInfo236, -1 ,nullptr },  // Inst #1682 = MOV64rc
18284
  { 1683, 2,  1,  0,  315,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1080004003ULL, nullptr, nullptr, OperandInfo237, -1 ,nullptr },  // Inst #1683 = MOV64rd
18285
  { 1684, 2,  1,  0,  306,  0|(1ULL<<MCID::Rematerializable), 0x5c00220002ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr },  // Inst #1684 = MOV64ri
18286
  { 1685, 2,  1,  0,  306,  0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x63801e0010ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr },  // Inst #1685 = MOV64ri32
18287
  { 1686, 6,  1,  0,  307,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580020006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1686 = MOV64rm
18288
  { 1687, 2,  1,  0,  306,  0, 0x4480020003ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #1687 = MOV64rr
18289
  { 1688, 2,  1,  0,  306,  0, 0x4580020005ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #1688 = MOV64rr_REV
18290
  { 1689, 2,  1,  0,  308,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600020003ULL, nullptr, nullptr, OperandInfo238, -1 ,nullptr },  // Inst #1689 = MOV64rs
18291
  { 1690, 6,  1,  0,  309,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700020006ULL, nullptr, nullptr, OperandInfo226, -1 ,nullptr },  // Inst #1690 = MOV64sm
18292
  { 1691, 2,  1,  0,  310,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700020005ULL, nullptr, nullptr, OperandInfo239, -1 ,nullptr },  // Inst #1691 = MOV64sr
18293
  { 1692, 6,  1,  0,  316,  0|(1ULL<<MCID::MayLoad), 0x3700025006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1692 = MOV64toPQIrm
18294
  { 1693, 2,  1,  0,  317,  0, 0x3700025005ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr },  // Inst #1693 = MOV64toPQIrr
18295
  { 1694, 6,  1,  0,  316,  0|(1ULL<<MCID::MayLoad), 0x3f00005806ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1694 = MOV64toSDrm
18296
  { 1695, 2,  1,  0,  317,  0|(1ULL<<MCID::Bitcast), 0x3700025005ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr },  // Inst #1695 = MOV64toSDrr
18297
  { 1696, 2,  0,  0,  303,  0|(1ULL<<MCID::MayLoad), 0x50000c0207ULL, nullptr, ImplicitList4, OperandInfo223, -1 ,nullptr },  // Inst #1696 = MOV8ao16
18298
  { 1697, 2,  0,  0,  303,  0|(1ULL<<MCID::MayLoad), 0x5000140407ULL, nullptr, ImplicitList4, OperandInfo223, -1 ,nullptr },  // Inst #1697 = MOV8ao32
18299
  { 1698, 2,  0,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x5000200607ULL, nullptr, ImplicitList4, OperandInfo223, -1 ,nullptr },  // Inst #1698 = MOV8ao64
18300
  { 1699, 6,  0,  0,  304,  0|(1ULL<<MCID::MayStore), 0x6300040018ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #1699 = MOV8mi
18301
  { 1700, 6,  0,  0,  304,  0|(1ULL<<MCID::MayStore), 0x4400000004ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #1700 = MOV8mr
18302
  { 1701, 6,  0,  0,  304,  0|(1ULL<<MCID::MayStore), 0x4400000004ULL, nullptr, nullptr, OperandInfo241, -1 ,nullptr },  // Inst #1701 = MOV8mr_NOREX
18303
  { 1702, 2,  1,  0,  303,  0|(1ULL<<MCID::MayStore), 0x51000c0207ULL, ImplicitList4, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1702 = MOV8o16a
18304
  { 1703, 2,  1,  0,  303,  0|(1ULL<<MCID::MayStore), 0x5100140407ULL, ImplicitList4, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1703 = MOV8o32a
18305
  { 1704, 2,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x5100200607ULL, ImplicitList4, nullptr, OperandInfo223, -1 ,nullptr },  // Inst #1704 = MOV8o64a
18306
  { 1705, 2,  1,  0,  306,  0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5800040002ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #1705 = MOV8ri
18307
  { 1706, 2,  1,  0,  306,  0, 0x6300040010ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr },  // Inst #1706 = MOV8ri_alt
18308
  { 1707, 6,  1,  0,  307,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4500000006ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr },  // Inst #1707 = MOV8rm
18309
  { 1708, 6,  1,  0,  307,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4500000006ULL, nullptr, nullptr, OperandInfo242, -1 ,nullptr },  // Inst #1708 = MOV8rm_NOREX
18310
  { 1709, 2,  1,  0,  306,  0, 0x4400000003ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #1709 = MOV8rr
18311
  { 1710, 2,  1,  0,  306,  0, 0x4400000003ULL, nullptr, nullptr, OperandInfo243, -1 ,nullptr },  // Inst #1710 = MOV8rr_NOREX
18312
  { 1711, 2,  1,  0,  306,  0, 0x4500000005ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #1711 = MOV8rr_REV
18313
  { 1712, 6,  0,  0,  318,  0|(1ULL<<MCID::MayStore), 0x1490005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1712 = MOVAPDmr
18314
  { 1713, 6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1410005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1713 = MOVAPDrm
18315
  { 1714, 2,  1,  0,  319,  0, 0x1410005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1714 = MOVAPDrr
18316
  { 1715, 2,  1,  0,  319,  0, 0x1490005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1715 = MOVAPDrr_REV
18317
  { 1716, 6,  0,  0,  318,  0|(1ULL<<MCID::MayStore), 0x1488004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1716 = MOVAPSmr
18318
  { 1717, 6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1408004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1717 = MOVAPSrm
18319
  { 1718, 2,  1,  0,  319,  0, 0x1408004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1718 = MOVAPSrr
18320
  { 1719, 2,  1,  0,  319,  0, 0x1488004803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1719 = MOVAPSrr_REV
18321
  { 1720, 6,  0,  0,  610,  0|(1ULL<<MCID::MayStore), 0x7880008884ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #1720 = MOVBE16mr
18322
  { 1721, 6,  1,  0,  608,  0|(1ULL<<MCID::MayLoad), 0x7800008886ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1721 = MOVBE16rm
18323
  { 1722, 6,  0,  0,  611,  0|(1ULL<<MCID::MayStore), 0x7880008904ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #1722 = MOVBE32mr
18324
  { 1723, 6,  1,  0,  609,  0|(1ULL<<MCID::MayLoad), 0x7800008906ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1723 = MOVBE32rm
18325
  { 1724, 6,  0,  0,  612,  0|(1ULL<<MCID::MayStore), 0x7880028804ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #1724 = MOVBE64mr
18326
  { 1725, 6,  1,  0,  608,  0|(1ULL<<MCID::MayLoad), 0x7800028806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1725 = MOVBE64rm
18327
  { 1726, 6,  1,  0,  322,  0|(1ULL<<MCID::MayLoad), 0x910006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1726 = MOVDDUPrm
18328
  { 1727, 2,  1,  0,  323,  0, 0x910006005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1727 = MOVDDUPrr
18329
  { 1728, 6,  1,  0,  316,  0|(1ULL<<MCID::MayLoad), 0x3700005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1728 = MOVDI2PDIrm
18330
  { 1729, 2,  1,  0,  782,  0, 0x3700005005ULL, nullptr, nullptr, OperandInfo245, -1 ,nullptr },  // Inst #1729 = MOVDI2PDIrr
18331
  { 1730, 6,  1,  0,  316,  0|(1ULL<<MCID::MayLoad), 0x3700005006ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1730 = MOVDI2SSrm
18332
  { 1731, 2,  1,  0,  317,  0|(1ULL<<MCID::Bitcast), 0x3700005005ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1731 = MOVDI2SSrr
18333
  { 1732, 6,  0,  0,  318,  0|(1ULL<<MCID::MayStore), 0x3f98005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1732 = MOVDQAmr
18334
  { 1733, 6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x3798005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1733 = MOVDQArm
18335
  { 1734, 2,  1,  0,  786,  0, 0x3798005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1734 = MOVDQArr
18336
  { 1735, 2,  1,  0,  786,  0, 0x3f98005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1735 = MOVDQArr_REV
18337
  { 1736, 6,  0,  0,  325,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3f98005804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1736 = MOVDQUmr
18338
  { 1737, 6,  1,  0,  326,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x3798005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1737 = MOVDQUrm
18339
  { 1738, 2,  1,  0,  787,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3798005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1738 = MOVDQUrr
18340
  { 1739, 2,  1,  0,  787,  0, 0x3f98005803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1739 = MOVDQUrr_REV
18341
  { 1740, 3,  1,  0,  323,  0, 0x908004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1740 = MOVHLPSrr
18342
  { 1741, 6,  0,  0,  328,  0|(1ULL<<MCID::MayStore), 0xb90005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1741 = MOVHPDmr
18343
  { 1742, 7,  1,  0,  329,  0|(1ULL<<MCID::MayLoad), 0xb10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1742 = MOVHPDrm
18344
  { 1743, 6,  0,  0,  328,  0|(1ULL<<MCID::MayStore), 0xb88004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1743 = MOVHPSmr
18345
  { 1744, 7,  1,  0,  329,  0|(1ULL<<MCID::MayLoad), 0xb08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1744 = MOVHPSrm
18346
  { 1745, 3,  1,  0,  323,  0, 0xb08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1745 = MOVLHPSrr
18347
  { 1746, 6,  0,  0,  328,  0|(1ULL<<MCID::MayStore), 0x990005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1746 = MOVLPDmr
18348
  { 1747, 7,  1,  0,  329,  0|(1ULL<<MCID::MayLoad), 0x910005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1747 = MOVLPDrm
18349
  { 1748, 6,  0,  0,  328,  0|(1ULL<<MCID::MayStore), 0x988004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1748 = MOVLPSmr
18350
  { 1749, 7,  1,  0,  329,  0|(1ULL<<MCID::MayLoad), 0x908004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1749 = MOVLPSrm
18351
  { 1750, 2,  1,  0,  839,  0, 0x2810005005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #1750 = MOVMSKPDrr
18352
  { 1751, 2,  1,  0,  839,  0, 0x2808004805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #1751 = MOVMSKPSrr
18353
  { 1752, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x1518009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1752 = MOVNTDQArm
18354
  { 1753, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x7398005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1753 = MOVNTDQmr
18355
  { 1754, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x6180024804ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #1754 = MOVNTI_64mr
18356
  { 1755, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x6180004804ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #1755 = MOVNTImr
18357
  { 1756, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x1590005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1756 = MOVNTPDmr
18358
  { 1757, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x1588004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1757 = MOVNTPSmr
18359
  { 1758, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1580006004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1758 = MOVNTSD
18360
  { 1759, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1580005804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1759 = MOVNTSS
18361
  { 1760, 2,  1,  0,  0,  0|(1ULL<<MCID::NotDuplicable), 0x7400140000ULL, ImplicitList11, nullptr, OperandInfo80, -1 ,nullptr },  // Inst #1760 = MOVPC32r
18362
  { 1761, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0x3f00005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1761 = MOVPDI2DImr
18363
  { 1762, 2,  1,  0,  780,  0, 0x3f00005003ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #1762 = MOVPDI2DIrr
18364
  { 1763, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0x6b18005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1763 = MOVPQI2QImr
18365
  { 1764, 2,  1,  0,  334,  0, 0x6b00005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1764 = MOVPQI2QIrr
18366
  { 1765, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0x3f00025004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1765 = MOVPQIto64rm
18367
  { 1766, 2,  1,  0,  333,  0, 0x3f00025003ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #1766 = MOVPQIto64rr
18368
  { 1767, 6,  1,  0,  316,  0|(1ULL<<MCID::MayLoad), 0x3f18005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1767 = MOVQI2PQIrm
18369
  { 1768, 3,  1,  0,  720,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x520000000aULL, ImplicitList17, ImplicitList49, OperandInfo108, -1 ,nullptr },  // Inst #1768 = MOVSB
18370
  { 1769, 6,  0,  0,  336,  0|(1ULL<<MCID::MayStore), 0x890006004ULL, nullptr, nullptr, OperandInfo246, -1 ,nullptr },  // Inst #1769 = MOVSDmr
18371
  { 1770, 6,  1,  0,  337,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810006006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #1770 = MOVSDrm
18372
  { 1771, 3,  1,  0,  338,  0, 0x810006005ULL, nullptr, nullptr, OperandInfo247, -1 ,nullptr },  // Inst #1771 = MOVSDrr
18373
  { 1772, 3,  1,  0,  338,  0, 0x880006003ULL, nullptr, nullptr, OperandInfo247, -1 ,nullptr },  // Inst #1772 = MOVSDrr_REV
18374
  { 1773, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0x3f00025004ULL, nullptr, nullptr, OperandInfo246, -1 ,nullptr },  // Inst #1773 = MOVSDto64mr
18375
  { 1774, 2,  1,  0,  333,  0|(1ULL<<MCID::Bitcast), 0x3f00025003ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #1774 = MOVSDto64rr
18376
  { 1775, 6,  1,  0,  322,  0|(1ULL<<MCID::MayLoad), 0xb08005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1775 = MOVSHDUPrm
18377
  { 1776, 2,  1,  0,  323,  0, 0xb08005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1776 = MOVSHDUPrr
18378
  { 1777, 3,  1,  0,  720,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x528000010aULL, ImplicitList17, ImplicitList49, OperandInfo108, -1 ,nullptr },  // Inst #1777 = MOVSL
18379
  { 1778, 6,  1,  0,  721,  0|(1ULL<<MCID::MayLoad), 0x908005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1778 = MOVSLDUPrm
18380
  { 1779, 2,  1,  0,  722,  0, 0x908005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1779 = MOVSLDUPrr
18381
  { 1780, 3,  1,  0,  720,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x528002000aULL, ImplicitList17, ImplicitList49, OperandInfo108, -1 ,nullptr },  // Inst #1780 = MOVSQ
18382
  { 1781, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0x3f00005004ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr },  // Inst #1781 = MOVSS2DImr
18383
  { 1782, 2,  1,  0,  333,  0|(1ULL<<MCID::Bitcast), 0x3f00005003ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #1782 = MOVSS2DIrr
18384
  { 1783, 6,  0,  0,  336,  0|(1ULL<<MCID::MayStore), 0x888005804ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr },  // Inst #1783 = MOVSSmr
18385
  { 1784, 6,  1,  0,  337,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #1784 = MOVSSrm
18386
  { 1785, 3,  1,  0,  338,  0, 0x808005805ULL, nullptr, nullptr, OperandInfo249, -1 ,nullptr },  // Inst #1785 = MOVSSrr
18387
  { 1786, 3,  1,  0,  338,  0, 0x880005803ULL, nullptr, nullptr, OperandInfo249, -1 ,nullptr },  // Inst #1786 = MOVSSrr_REV
18388
  { 1787, 3,  1,  0,  720,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x528000008aULL, ImplicitList17, ImplicitList49, OperandInfo108, -1 ,nullptr },  // Inst #1787 = MOVSW
18389
  { 1788, 6,  1,  0,  339,  0|(1ULL<<MCID::MayLoad), 0x5f00004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1788 = MOVSX16rm8
18390
  { 1789, 2,  1,  0,  340,  0, 0x5f00004085ULL, nullptr, nullptr, OperandInfo250, -1 ,nullptr },  // Inst #1789 = MOVSX16rr8
18391
  { 1790, 6,  1,  0,  341,  0|(1ULL<<MCID::MayLoad), 0x5f00004106ULL, nullptr, nullptr, OperandInfo251, -1 ,nullptr },  // Inst #1790 = MOVSX32_NOREXrm8
18392
  { 1791, 2,  1,  0,  342,  0, 0x5f00004105ULL, nullptr, nullptr, OperandInfo252, -1 ,nullptr },  // Inst #1791 = MOVSX32_NOREXrr8
18393
  { 1792, 6,  1,  0,  589,  0|(1ULL<<MCID::MayLoad), 0x5f80004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1792 = MOVSX32rm16
18394
  { 1793, 6,  1,  0,  589,  0|(1ULL<<MCID::MayLoad), 0x5f00004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1793 = MOVSX32rm8
18395
  { 1794, 2,  1,  0,  342,  0, 0x5f80004105ULL, nullptr, nullptr, OperandInfo253, -1 ,nullptr },  // Inst #1794 = MOVSX32rr16
18396
  { 1795, 2,  1,  0,  342,  0, 0x5f00004105ULL, nullptr, nullptr, OperandInfo254, -1 ,nullptr },  // Inst #1795 = MOVSX32rr8
18397
  { 1796, 6,  1,  0,  341,  0|(1ULL<<MCID::MayLoad), 0x5f80024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1796 = MOVSX64rm16
18398
  { 1797, 6,  1,  0,  341,  0|(1ULL<<MCID::MayLoad), 0x3180020006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1797 = MOVSX64rm32
18399
  { 1798, 6,  1,  0,  341,  0|(1ULL<<MCID::MayLoad), 0x5f00024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1798 = MOVSX64rm8
18400
  { 1799, 2,  1,  0,  342,  0, 0x5f80024005ULL, nullptr, nullptr, OperandInfo255, -1 ,nullptr },  // Inst #1799 = MOVSX64rr16
18401
  { 1800, 2,  1,  0,  342,  0, 0x3180020005ULL, nullptr, nullptr, OperandInfo194, -1 ,nullptr },  // Inst #1800 = MOVSX64rr32
18402
  { 1801, 2,  1,  0,  342,  0, 0x5f00024005ULL, nullptr, nullptr, OperandInfo256, -1 ,nullptr },  // Inst #1801 = MOVSX64rr8
18403
  { 1802, 6,  0,  0,  325,  0|(1ULL<<MCID::MayStore), 0x890005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1802 = MOVUPDmr
18404
  { 1803, 6,  1,  0,  326,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x810005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1803 = MOVUPDrm
18405
  { 1804, 2,  1,  0,  343,  0, 0x810005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1804 = MOVUPDrr
18406
  { 1805, 2,  1,  0,  343,  0, 0x890005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1805 = MOVUPDrr_REV
18407
  { 1806, 6,  0,  0,  325,  0|(1ULL<<MCID::MayStore), 0x888004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #1806 = MOVUPSmr
18408
  { 1807, 6,  1,  0,  326,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1807 = MOVUPSrm
18409
  { 1808, 2,  1,  0,  343,  0, 0x808004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1808 = MOVUPSrr
18410
  { 1809, 2,  1,  0,  343,  0, 0x888004803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1809 = MOVUPSrr_REV
18411
  { 1810, 6,  1,  0,  344,  0|(1ULL<<MCID::MayLoad), 0x3f18005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1810 = MOVZPQILo2PQIrm
18412
  { 1811, 2,  1,  0,  334,  0, 0x3f18005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1811 = MOVZPQILo2PQIrr
18413
  { 1812, 6,  1,  0,  316,  0|(1ULL<<MCID::MayLoad), 0x3f18005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1812 = MOVZQI2PQIrm
18414
  { 1813, 6,  1,  0,  345,  0|(1ULL<<MCID::MayLoad), 0x5b00004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr },  // Inst #1813 = MOVZX16rm8
18415
  { 1814, 2,  1,  0,  346,  0, 0x5b00004085ULL, nullptr, nullptr, OperandInfo250, -1 ,nullptr },  // Inst #1814 = MOVZX16rr8
18416
  { 1815, 6,  1,  0,  347,  0|(1ULL<<MCID::MayLoad), 0x5b00004106ULL, nullptr, nullptr, OperandInfo251, -1 ,nullptr },  // Inst #1815 = MOVZX32_NOREXrm8
18417
  { 1816, 2,  1,  0,  348,  0, 0x5b00004105ULL, nullptr, nullptr, OperandInfo252, -1 ,nullptr },  // Inst #1816 = MOVZX32_NOREXrr8
18418
  { 1817, 6,  1,  0,  590,  0|(1ULL<<MCID::MayLoad), 0x5b80004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1817 = MOVZX32rm16
18419
  { 1818, 6,  1,  0,  590,  0|(1ULL<<MCID::MayLoad), 0x5b00004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #1818 = MOVZX32rm8
18420
  { 1819, 2,  1,  0,  348,  0, 0x5b80004105ULL, nullptr, nullptr, OperandInfo253, -1 ,nullptr },  // Inst #1819 = MOVZX32rr16
18421
  { 1820, 2,  1,  0,  348,  0, 0x5b00004105ULL, nullptr, nullptr, OperandInfo254, -1 ,nullptr },  // Inst #1820 = MOVZX32rr8
18422
  { 1821, 6,  1,  0,  347,  0|(1ULL<<MCID::MayLoad), 0x5b80024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1821 = MOVZX64rm16
18423
  { 1822, 6,  1,  0,  347,  0|(1ULL<<MCID::MayLoad), 0x5b00024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #1822 = MOVZX64rm8
18424
  { 1823, 2,  1,  0,  348,  0, 0x5b80024005ULL, nullptr, nullptr, OperandInfo255, -1 ,nullptr },  // Inst #1823 = MOVZX64rr16
18425
  { 1824, 2,  1,  0,  348,  0, 0x5b00024005ULL, nullptr, nullptr, OperandInfo256, -1 ,nullptr },  // Inst #1824 = MOVZX64rr8
18426
  { 1825, 8,  1,  0,  349,  0|(1ULL<<MCID::MayLoad), 0x211804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #1825 = MPSADBWrmi
18427
  { 1826, 4,  1,  0,  350,  0, 0x211804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #1826 = MPSADBWrri
18428
  { 1827, 5,  0,  0,  624,  0|(1ULL<<MCID::MayLoad), 0x7b8000009cULL, ImplicitList3, ImplicitList26, OperandInfo43, -1 ,nullptr },  // Inst #1827 = MUL16m
18429
  { 1828, 1,  0,  0,  622,  0, 0x7b80000094ULL, ImplicitList3, ImplicitList26, OperandInfo82, -1 ,nullptr },  // Inst #1828 = MUL16r
18430
  { 1829, 5,  0,  0,  631,  0|(1ULL<<MCID::MayLoad), 0x7b8000011cULL, ImplicitList9, ImplicitList21, OperandInfo43, -1 ,nullptr },  // Inst #1829 = MUL32m
18431
  { 1830, 1,  0,  0,  629,  0, 0x7b80000114ULL, ImplicitList9, ImplicitList21, OperandInfo83, -1 ,nullptr },  // Inst #1830 = MUL32r
18432
  { 1831, 5,  0,  0,  638,  0|(1ULL<<MCID::MayLoad), 0x7b8002001cULL, ImplicitList10, ImplicitList19, OperandInfo43, -1 ,nullptr },  // Inst #1831 = MUL64m
18433
  { 1832, 1,  0,  0,  636,  0, 0x7b80020014ULL, ImplicitList10, ImplicitList19, OperandInfo85, -1 ,nullptr },  // Inst #1832 = MUL64r
18434
  { 1833, 5,  0,  0,  357,  0|(1ULL<<MCID::MayLoad), 0x7b0000001cULL, ImplicitList4, ImplicitList29, OperandInfo43, -1 ,nullptr },  // Inst #1833 = MUL8m
18435
  { 1834, 1,  0,  0,  358,  0, 0x7b00000014ULL, ImplicitList4, ImplicitList29, OperandInfo134, -1 ,nullptr },  // Inst #1834 = MUL8r
18436
  { 1835, 7,  1,  0,  908,  0|(1ULL<<MCID::MayLoad), 0x2c90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1835 = MULPDrm
18437
  { 1836, 3,  1,  0,  904,  0|(1ULL<<MCID::Commutable), 0x2c90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1836 = MULPDrr
18438
  { 1837, 7,  1,  0,  908,  0|(1ULL<<MCID::MayLoad), 0x2c88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1837 = MULPSrm
18439
  { 1838, 3,  1,  0,  905,  0|(1ULL<<MCID::Commutable), 0x2c88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1838 = MULPSrr
18440
  { 1839, 7,  1,  0,  909,  0|(1ULL<<MCID::MayLoad), 0x2c90006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #1839 = MULSDrm
18441
  { 1840, 7,  1,  0,  909,  0|(1ULL<<MCID::MayLoad), 0x2c90006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1840 = MULSDrm_Int
18442
  { 1841, 3,  1,  0,  906,  0|(1ULL<<MCID::Commutable), 0x2c90006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #1841 = MULSDrr
18443
  { 1842, 3,  1,  0,  906,  0, 0x2c90006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1842 = MULSDrr_Int
18444
  { 1843, 7,  1,  0,  909,  0|(1ULL<<MCID::MayLoad), 0x2c88005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #1843 = MULSSrm
18445
  { 1844, 7,  1,  0,  909,  0|(1ULL<<MCID::MayLoad), 0x2c88005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1844 = MULSSrm_Int
18446
  { 1845, 3,  1,  0,  907,  0|(1ULL<<MCID::Commutable), 0x2c88005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #1845 = MULSSrr
18447
  { 1846, 3,  1,  0,  907,  0, 0x2c88005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1846 = MULSSrr_Int
18448
  { 1847, 7,  2,  0,  640,  0|(1ULL<<MCID::MayLoad), 0x17b2000a006ULL, ImplicitList50, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #1847 = MULX32rm
18449
  { 1848, 3,  2,  0,  639,  0|(1ULL<<MCID::Commutable), 0x17b2000a005ULL, ImplicitList50, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #1848 = MULX32rr
18450
  { 1849, 7,  2,  0,  642,  0|(1ULL<<MCID::MayLoad), 0x1fb2000a006ULL, ImplicitList51, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #1849 = MULX64rm
18451
  { 1850, 3,  2,  0,  641,  0|(1ULL<<MCID::Commutable), 0x1fb2000a005ULL, ImplicitList51, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #1850 = MULX64rr
18452
  { 1851, 5,  0,  0,  367,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1851 = MUL_F32m
18453
  { 1852, 5,  0,  0,  367,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1852 = MUL_F64m
18454
  { 1853, 5,  0,  0,  367,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1853 = MUL_FI16m
18455
  { 1854, 5,  0,  0,  367,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #1854 = MUL_FI32m
18456
  { 1855, 1,  0,  0,  368,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000011ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #1855 = MUL_FPrST0
18457
  { 1856, 1,  0,  0,  368,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000011ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #1856 = MUL_FST0r
18458
  { 1857, 3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo45, -1 ,nullptr },  // Inst #1857 = MUL_Fp32
18459
  { 1858, 7,  1,  0,  367,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #1858 = MUL_Fp32m
18460
  { 1859, 3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo47, -1 ,nullptr },  // Inst #1859 = MUL_Fp64
18461
  { 1860, 7,  1,  0,  367,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #1860 = MUL_Fp64m
18462
  { 1861, 7,  1,  0,  367,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #1861 = MUL_Fp64m32
18463
  { 1862, 3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo49, -1 ,nullptr },  // Inst #1862 = MUL_Fp80
18464
  { 1863, 7,  1,  0,  367,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #1863 = MUL_Fp80m32
18465
  { 1864, 7,  1,  0,  367,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #1864 = MUL_Fp80m64
18466
  { 1865, 7,  1,  0,  367,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #1865 = MUL_FpI16m32
18467
  { 1866, 7,  1,  0,  367,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #1866 = MUL_FpI16m64
18468
  { 1867, 7,  1,  0,  367,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #1867 = MUL_FpI16m80
18469
  { 1868, 7,  1,  0,  367,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #1868 = MUL_FpI32m32
18470
  { 1869, 7,  1,  0,  367,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #1869 = MUL_FpI32m64
18471
  { 1870, 7,  1,  0,  367,  0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #1870 = MUL_FpI32m80
18472
  { 1871, 1,  0,  0,  368,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000011ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #1871 = MUL_FrST0
18473
  { 1872, 0,  0,  0,  369,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000405bULL, ImplicitList52, nullptr, nullptr, -1 ,nullptr },  // Inst #1872 = MWAITXrr
18474
  { 1873, 0,  0,  0,  369,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80004029ULL, ImplicitList53, nullptr, nullptr, -1 ,nullptr },  // Inst #1873 = MWAITrr
18475
  { 1874, 5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8000009bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1874 = NEG16m
18476
  { 1875, 2,  1,  0,  104,  0, 0x7b80000093ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #1875 = NEG16r
18477
  { 1876, 5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8000011bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1876 = NEG32m
18478
  { 1877, 2,  1,  0,  104,  0, 0x7b80000113ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #1877 = NEG32r
18479
  { 1878, 5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8002001bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1878 = NEG64m
18480
  { 1879, 2,  1,  0,  104,  0, 0x7b80020013ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #1879 = NEG64r
18481
  { 1880, 5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b0000001bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #1880 = NEG8m
18482
  { 1881, 2,  1,  0,  104,  0, 0x7b00000013ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #1881 = NEG8r
18483
  { 1882, 0,  0,  0,  370,  0, 0x4800000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #1882 = NOOP
18484
  { 1883, 5,  0,  0,  370,  0, 0xc0000409cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1883 = NOOP18_16m4
18485
  { 1884, 5,  0,  0,  370,  0, 0xc0000409dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1884 = NOOP18_16m5
18486
  { 1885, 5,  0,  0,  370,  0, 0xc0000409eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1885 = NOOP18_16m6
18487
  { 1886, 5,  0,  0,  370,  0, 0xc0000409fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1886 = NOOP18_16m7
18488
  { 1887, 1,  0,  0,  370,  0, 0xc00004094ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #1887 = NOOP18_16r4
18489
  { 1888, 1,  0,  0,  370,  0, 0xc00004095ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #1888 = NOOP18_16r5
18490
  { 1889, 1,  0,  0,  370,  0, 0xc00004096ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #1889 = NOOP18_16r6
18491
  { 1890, 1,  0,  0,  370,  0, 0xc00004097ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #1890 = NOOP18_16r7
18492
  { 1891, 5,  0,  0,  370,  0, 0xc0000411cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1891 = NOOP18_m4
18493
  { 1892, 5,  0,  0,  370,  0, 0xc0000411dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1892 = NOOP18_m5
18494
  { 1893, 5,  0,  0,  370,  0, 0xc0000411eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1893 = NOOP18_m6
18495
  { 1894, 5,  0,  0,  370,  0, 0xc0000411fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1894 = NOOP18_m7
18496
  { 1895, 1,  0,  0,  370,  0, 0xc00004114ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #1895 = NOOP18_r4
18497
  { 1896, 1,  0,  0,  370,  0, 0xc00004115ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #1896 = NOOP18_r5
18498
  { 1897, 1,  0,  0,  370,  0, 0xc00004116ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #1897 = NOOP18_r6
18499
  { 1898, 1,  0,  0,  370,  0, 0xc00004117ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #1898 = NOOP18_r7
18500
  { 1899, 2,  0,  0,  370,  0, 0xc80004105ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #1899 = NOOP19rr
18501
  { 1900, 5,  0,  0,  370,  0, 0xf8000410fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1900 = NOOPL
18502
  { 1901, 5,  0,  0,  370,  0, 0xc8000410fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1901 = NOOPL_19
18503
  { 1902, 5,  0,  0,  370,  0, 0xe0000410fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1902 = NOOPL_1c
18504
  { 1903, 5,  0,  0,  370,  0, 0xe8000410fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1903 = NOOPL_1d
18505
  { 1904, 5,  0,  0,  370,  0, 0xf0000410fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1904 = NOOPL_1e
18506
  { 1905, 5,  0,  0,  370,  0, 0xf8000408fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1905 = NOOPW
18507
  { 1906, 5,  0,  0,  370,  0, 0xc8000408fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1906 = NOOPW_19
18508
  { 1907, 5,  0,  0,  370,  0, 0xe0000408fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1907 = NOOPW_1c
18509
  { 1908, 5,  0,  0,  370,  0, 0xe8000408fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1908 = NOOPW_1d
18510
  { 1909, 5,  0,  0,  370,  0, 0xf0000408fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1909 = NOOPW_1e
18511
  { 1910, 5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8000009aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1910 = NOT16m
18512
  { 1911, 2,  1,  0,  104,  0, 0x7b80000092ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr },  // Inst #1911 = NOT16r
18513
  { 1912, 5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8000011aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1912 = NOT32m
18514
  { 1913, 2,  1,  0,  104,  0, 0x7b80000112ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr },  // Inst #1913 = NOT32r
18515
  { 1914, 5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8002001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1914 = NOT64m
18516
  { 1915, 2,  1,  0,  104,  0, 0x7b80020012ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr },  // Inst #1915 = NOT64r
18517
  { 1916, 5,  0,  0,  617,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b0000001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #1916 = NOT8m
18518
  { 1917, 2,  1,  0,  104,  0, 0x7b00000012ULL, nullptr, nullptr, OperandInfo133, -1 ,nullptr },  // Inst #1917 = NOT8r
18519
  { 1918, 1,  0,  0,  9,  0, 0x6800c0081ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #1918 = OR16i16
18520
  { 1919, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c0099ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1919 = OR16mi
18521
  { 1920, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040099ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1920 = OR16mi8
18522
  { 1921, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #1921 = OR16mr
18523
  { 1922, 3,  1,  0,  9,  0, 0x40800c0091ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #1922 = OR16ri
18524
  { 1923, 3,  1,  0,  9,  0, 0x4180040091ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #1923 = OR16ri8
18525
  { 1924, 7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x580000086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr },  // Inst #1924 = OR16rm
18526
  { 1925, 3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x480000083ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #1925 = OR16rr
18527
  { 1926, 3,  1,  0,  9,  0, 0x580000085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #1926 = OR16rr_REV
18528
  { 1927, 1,  0,  0,  9,  0, 0x680140101ULL, ImplicitList9, ImplicitList7, OperandInfo2, -1 ,nullptr },  // Inst #1927 = OR32i32
18529
  { 1928, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080140119ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1928 = OR32mi
18530
  { 1929, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040119ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1929 = OR32mi8
18531
  { 1930, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #1930 = OR32mr
18532
  { 1931, 6,  0,  0,  652,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x482000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #1931 = OR32mrLocked
18533
  { 1932, 3,  1,  0,  9,  0, 0x4080140111ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #1932 = OR32ri
18534
  { 1933, 3,  1,  0,  9,  0, 0x4180040111ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #1933 = OR32ri8
18535
  { 1934, 7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x580000106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr },  // Inst #1934 = OR32rm
18536
  { 1935, 3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x480000103ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #1935 = OR32rr
18537
  { 1936, 3,  1,  0,  9,  0, 0x580000105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #1936 = OR32rr_REV
18538
  { 1937, 1,  0,  0,  9,  0, 0x6801e0001ULL, ImplicitList10, ImplicitList8, OperandInfo2, -1 ,nullptr },  // Inst #1937 = OR64i32
18539
  { 1938, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e0019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1938 = OR64mi32
18540
  { 1939, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1939 = OR64mi8
18541
  { 1940, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #1940 = OR64mr
18542
  { 1941, 3,  1,  0,  9,  0, 0x40801e0011ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #1941 = OR64ri32
18543
  { 1942, 3,  1,  0,  9,  0, 0x4180060011ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #1942 = OR64ri8
18544
  { 1943, 7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x580020006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr },  // Inst #1943 = OR64rm
18545
  { 1944, 3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x480020003ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #1944 = OR64rr
18546
  { 1945, 3,  1,  0,  9,  0, 0x580020005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #1945 = OR64rr_REV
18547
  { 1946, 1,  0,  0,  9,  0, 0x600040001ULL, ImplicitList4, ImplicitList1, OperandInfo2, -1 ,nullptr },  // Inst #1946 = OR8i8
18548
  { 1947, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1947 = OR8mi
18549
  { 1948, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #1948 = OR8mi8
18550
  { 1949, 6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #1949 = OR8mr
18551
  { 1950, 3,  1,  0,  9,  0, 0x4000040011ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #1950 = OR8ri
18552
  { 1951, 3,  1,  0,  9,  0, 0x4100040011ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #1951 = OR8ri8
18553
  { 1952, 7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x500000006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr },  // Inst #1952 = OR8rm
18554
  { 1953, 3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x400000003ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #1953 = OR8rr
18555
  { 1954, 3,  1,  0,  9,  0, 0x500000005ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #1954 = OR8rr_REV
18556
  { 1955, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x2b10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1955 = ORPDrm
18557
  { 1956, 3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x2b10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1956 = ORPDrr
18558
  { 1957, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x2b08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1957 = ORPSrm
18559
  { 1958, 3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x2b08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1958 = ORPSrr
18560
  { 1959, 1,  0,  0,  371,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7380040081ULL, ImplicitList3, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1959 = OUT16ir
18561
  { 1960, 0,  0,  0,  372,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7780000081ULL, ImplicitList54, nullptr, nullptr, -1 ,nullptr },  // Inst #1960 = OUT16rr
18562
  { 1961, 1,  0,  0,  371,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7380040101ULL, ImplicitList9, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1961 = OUT32ir
18563
  { 1962, 0,  0,  0,  372,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7780000101ULL, ImplicitList55, nullptr, nullptr, -1 ,nullptr },  // Inst #1962 = OUT32rr
18564
  { 1963, 1,  0,  0,  371,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7300040001ULL, ImplicitList4, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #1963 = OUT8ir
18565
  { 1964, 0,  0,  0,  372,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7700000001ULL, ImplicitList56, nullptr, nullptr, -1 ,nullptr },  // Inst #1964 = OUT8rr
18566
  { 1965, 2,  0,  0,  373,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3700000008ULL, ImplicitList57, ImplicitList58, OperandInfo200, -1 ,nullptr },  // Inst #1965 = OUTSB
18567
  { 1966, 2,  0,  0,  373,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000108ULL, ImplicitList57, ImplicitList58, OperandInfo200, -1 ,nullptr },  // Inst #1966 = OUTSL
18568
  { 1967, 2,  0,  0,  373,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000088ULL, ImplicitList57, ImplicitList58, OperandInfo200, -1 ,nullptr },  // Inst #1967 = OUTSW
18569
  { 1968, 6,  1,  0,  374,  0|(1ULL<<MCID::MayLoad), 0xe18009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1968 = PABSBrm128
18570
  { 1969, 2,  1,  0,  375,  0, 0xe18009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1969 = PABSBrr128
18571
  { 1970, 6,  1,  0,  374,  0|(1ULL<<MCID::MayLoad), 0xf18009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1970 = PABSDrm128
18572
  { 1971, 2,  1,  0,  375,  0, 0xf18009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1971 = PABSDrr128
18573
  { 1972, 6,  1,  0,  374,  0|(1ULL<<MCID::MayLoad), 0xe98009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #1972 = PABSWrm128
18574
  { 1973, 2,  1,  0,  375,  0, 0xe98009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #1973 = PABSWrr128
18575
  { 1974, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x3598005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1974 = PACKSSDWrm
18576
  { 1975, 3,  1,  0,  276,  0, 0x3598005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1975 = PACKSSDWrr
18577
  { 1976, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x3198005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1976 = PACKSSWBrm
18578
  { 1977, 3,  1,  0,  276,  0, 0x3198005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1977 = PACKSSWBrr
18579
  { 1978, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x1598009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1978 = PACKUSDWrm
18580
  { 1979, 3,  1,  0,  276,  0, 0x1598009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1979 = PACKUSDWrr
18581
  { 1980, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x3398005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1980 = PACKUSWBrm
18582
  { 1981, 3,  1,  0,  276,  0, 0x3398005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1981 = PACKUSWBrr
18583
  { 1982, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7e18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1982 = PADDBrm
18584
  { 1983, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x7e18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1983 = PADDBrr
18585
  { 1984, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7f18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1984 = PADDDrm
18586
  { 1985, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x7f18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1985 = PADDDrr
18587
  { 1986, 7,  1,  0,  378,  0|(1ULL<<MCID::MayLoad), 0x6a18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1986 = PADDQrm
18588
  { 1987, 3,  1,  0,  379,  0|(1ULL<<MCID::Commutable), 0x6a18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1987 = PADDQrr
18589
  { 1988, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7618005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1988 = PADDSBrm
18590
  { 1989, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x7618005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1989 = PADDSBrr
18591
  { 1990, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7698005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1990 = PADDSWrm
18592
  { 1991, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x7698005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1991 = PADDSWrr
18593
  { 1992, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x6e18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1992 = PADDUSBrm
18594
  { 1993, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x6e18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1993 = PADDUSBrr
18595
  { 1994, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x6e98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1994 = PADDUSWrm
18596
  { 1995, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x6e98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1995 = PADDUSWrr
18597
  { 1996, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7e98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #1996 = PADDWrm
18598
  { 1997, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x7e98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #1997 = PADDWrr
18599
  { 1998, 8,  1,  0,  380,  0|(1ULL<<MCID::MayLoad), 0x79804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #1998 = PALIGNR128rm
18600
  { 1999, 4,  1,  0,  381,  0, 0x79804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #1999 = PALIGNR128rr
18601
  { 2000, 7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x6f98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2000 = PANDNrm
18602
  { 2001, 3,  1,  0,  383,  0, 0x6f98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2001 = PANDNrr
18603
  { 2002, 7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x6d98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2002 = PANDrm
18604
  { 2003, 3,  1,  0,  383,  0|(1ULL<<MCID::Commutable), 0x6d98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2003 = PANDrr
18605
  { 2004, 0,  0,  0,  730,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4800001801ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2004 = PAUSE
18606
  { 2005, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7018005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2005 = PAVGBrm
18607
  { 2006, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x7018005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2006 = PAVGBrr
18608
  { 2007, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005f80004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2007 = PAVGUSBrm
18609
  { 2008, 3,  1,  0,  0,  0, 0x100005f80004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2008 = PAVGUSBrr
18610
  { 2009, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7198005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2009 = PAVGWrm
18611
  { 2010, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x7198005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2010 = PAVGWrr
18612
  { 2011, 7,  1,  0,  385,  0|(1ULL<<MCID::MayLoad), 0x818009006ULL, ImplicitList15, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2011 = PBLENDVBrm0
18613
  { 2012, 3,  1,  0,  386,  0, 0x818009005ULL, ImplicitList15, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2012 = PBLENDVBrr0
18614
  { 2013, 8,  1,  0,  795,  0|(1ULL<<MCID::MayLoad), 0x71804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #2013 = PBLENDWrmi
18615
  { 2014, 4,  1,  0,  793,  0|(1ULL<<MCID::Commutable), 0x71804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #2014 = PBLENDWrri
18616
  { 2015, 8,  1,  0,  389,  0|(1ULL<<MCID::MayLoad), 0x221804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #2015 = PCLMULQDQrm
18617
  { 2016, 4,  1,  0,  390,  0|(1ULL<<MCID::Commutable), 0x221804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #2016 = PCLMULQDQrr
18618
  { 2017, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x3a18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2017 = PCMPEQBrm
18619
  { 2018, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x3a18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2018 = PCMPEQBrr
18620
  { 2019, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x3b18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2019 = PCMPEQDrm
18621
  { 2020, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x3b18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2020 = PCMPEQDrr
18622
  { 2021, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x1498009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2021 = PCMPEQQrm
18623
  { 2022, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x1498009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2022 = PCMPEQQrr
18624
  { 2023, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x3a98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2023 = PCMPEQWrm
18625
  { 2024, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x3a98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2024 = PCMPEQWrr
18626
  { 2025, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo257, -1 ,nullptr },  // Inst #2025 = PCMPESTRIMEM
18627
  { 2026, 4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo258, -1 ,nullptr },  // Inst #2026 = PCMPESTRIREG
18628
  { 2027, 7,  0,  0,  393,  0|(1ULL<<MCID::MayLoad), 0x309804d006ULL, ImplicitList16, ImplicitList59, OperandInfo55, -1 ,nullptr },  // Inst #2027 = PCMPESTRIrm
18629
  { 2028, 3,  0,  0,  394,  0, 0x309804d005ULL, ImplicitList16, ImplicitList59, OperandInfo56, -1 ,nullptr },  // Inst #2028 = PCMPESTRIrr
18630
  { 2029, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo152, -1 ,nullptr },  // Inst #2029 = PCMPESTRM128MEM
18631
  { 2030, 4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo101, -1 ,nullptr },  // Inst #2030 = PCMPESTRM128REG
18632
  { 2031, 7,  0,  0,  395,  0|(1ULL<<MCID::MayLoad), 0x301804d006ULL, ImplicitList16, ImplicitList60, OperandInfo55, -1 ,nullptr },  // Inst #2031 = PCMPESTRM128rm
18633
  { 2032, 3,  0,  0,  396,  0, 0x301804d005ULL, ImplicitList16, ImplicitList60, OperandInfo56, -1 ,nullptr },  // Inst #2032 = PCMPESTRM128rr
18634
  { 2033, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x3218005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2033 = PCMPGTBrm
18635
  { 2034, 3,  1,  0,  377,  0, 0x3218005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2034 = PCMPGTBrr
18636
  { 2035, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x3318005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2035 = PCMPGTDrm
18637
  { 2036, 3,  1,  0,  377,  0, 0x3318005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2036 = PCMPGTDrr
18638
  { 2037, 7,  1,  0,  830,  0|(1ULL<<MCID::MayLoad), 0x1b98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2037 = PCMPGTQrm
18639
  { 2038, 3,  1,  0,  829,  0, 0x1b98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2038 = PCMPGTQrr
18640
  { 2039, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x3298005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2039 = PCMPGTWrm
18641
  { 2040, 3,  1,  0,  377,  0, 0x3298005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2040 = PCMPGTWrr
18642
  { 2041, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo257, -1 ,nullptr },  // Inst #2041 = PCMPISTRIMEM
18643
  { 2042, 4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo258, -1 ,nullptr },  // Inst #2042 = PCMPISTRIREG
18644
  { 2043, 7,  0,  0,  397,  0|(1ULL<<MCID::MayLoad), 0x319804d006ULL, nullptr, ImplicitList59, OperandInfo55, -1 ,nullptr },  // Inst #2043 = PCMPISTRIrm
18645
  { 2044, 3,  0,  0,  398,  0, 0x319804d005ULL, nullptr, ImplicitList59, OperandInfo56, -1 ,nullptr },  // Inst #2044 = PCMPISTRIrr
18646
  { 2045, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo152, -1 ,nullptr },  // Inst #2045 = PCMPISTRM128MEM
18647
  { 2046, 4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo101, -1 ,nullptr },  // Inst #2046 = PCMPISTRM128REG
18648
  { 2047, 7,  0,  0,  399,  0|(1ULL<<MCID::MayLoad), 0x311804d006ULL, nullptr, ImplicitList60, OperandInfo55, -1 ,nullptr },  // Inst #2047 = PCMPISTRM128rm
18649
  { 2048, 3,  0,  0,  400,  0, 0x311804d005ULL, nullptr, ImplicitList60, OperandInfo56, -1 ,nullptr },  // Inst #2048 = PCMPISTRM128rr
18650
  { 2049, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5700005058ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2049 = PCOMMIT
18651
  { 2050, 7,  1,  0,  705,  0|(1ULL<<MCID::MayLoad), 0x17aa000a006ULL, nullptr, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #2050 = PDEP32rm
18652
  { 2051, 3,  1,  0,  704,  0, 0x17aa000a005ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #2051 = PDEP32rr
18653
  { 2052, 7,  1,  0,  705,  0|(1ULL<<MCID::MayLoad), 0x1faa000a006ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #2052 = PDEP64rm
18654
  { 2053, 3,  1,  0,  704,  0, 0x1faa000a005ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #2053 = PDEP64rr
18655
  { 2054, 7,  1,  0,  705,  0|(1ULL<<MCID::MayLoad), 0x17aa0009806ULL, nullptr, nullptr, OperandInfo57, -1 ,nullptr },  // Inst #2054 = PEXT32rm
18656
  { 2055, 3,  1,  0,  704,  0, 0x17aa0009805ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #2055 = PEXT32rr
18657
  { 2056, 7,  1,  0,  705,  0|(1ULL<<MCID::MayLoad), 0x1faa0009806ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr },  // Inst #2056 = PEXT64rm
18658
  { 2057, 3,  1,  0,  704,  0, 0x1faa0009805ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #2057 = PEXT64rr
18659
  { 2058, 7,  0,  0,  808,  0|(1ULL<<MCID::MayStore), 0xa1804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #2058 = PEXTRBmr
18660
  { 2059, 3,  1,  0,  807,  0, 0xa1804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #2059 = PEXTRBrr
18661
  { 2060, 7,  0,  0,  808,  0|(1ULL<<MCID::MayStore), 0xb1804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #2060 = PEXTRDmr
18662
  { 2061, 3,  1,  0,  807,  0, 0xb1804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #2061 = PEXTRDrr
18663
  { 2062, 7,  0,  0,  808,  0|(1ULL<<MCID::MayStore), 0xb1806d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #2062 = PEXTRQmr
18664
  { 2063, 3,  1,  0,  807,  0, 0xb1806d003ULL, nullptr, nullptr, OperandInfo259, -1 ,nullptr },  // Inst #2063 = PEXTRQrr
18665
  { 2064, 7,  0,  0,  808,  0|(1ULL<<MCID::MayStore), 0xa9804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #2064 = PEXTRWmr
18666
  { 2065, 3,  1,  0,  402,  0, 0x6298045005ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #2065 = PEXTRWri
18667
  { 2066, 3,  1,  0,  807,  0, 0xa9804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #2066 = PEXTRWrr_REV
18668
  { 2067, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100000e80004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #2067 = PF2IDrm
18669
  { 2068, 2,  1,  0,  0,  0, 0x100000e80004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #2068 = PF2IDrr
18670
  { 2069, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100000e00004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #2069 = PF2IWrm
18671
  { 2070, 2,  1,  0,  0,  0, 0x100000e00004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #2070 = PF2IWrr
18672
  { 2071, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005700004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2071 = PFACCrm
18673
  { 2072, 3,  1,  0,  0,  0, 0x100005700004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2072 = PFACCrr
18674
  { 2073, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100004f00004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2073 = PFADDrm
18675
  { 2074, 3,  1,  0,  0,  0, 0x100004f00004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2074 = PFADDrr
18676
  { 2075, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005800004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2075 = PFCMPEQrm
18677
  { 2076, 3,  1,  0,  0,  0, 0x100005800004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2076 = PFCMPEQrr
18678
  { 2077, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100004800004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2077 = PFCMPGErm
18679
  { 2078, 3,  1,  0,  0,  0, 0x100004800004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2078 = PFCMPGErr
18680
  { 2079, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005000004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2079 = PFCMPGTrm
18681
  { 2080, 3,  1,  0,  0,  0, 0x100005000004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2080 = PFCMPGTrr
18682
  { 2081, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005200004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2081 = PFMAXrm
18683
  { 2082, 3,  1,  0,  0,  0, 0x100005200004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2082 = PFMAXrr
18684
  { 2083, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100004a00004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2083 = PFMINrm
18685
  { 2084, 3,  1,  0,  0,  0, 0x100004a00004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2084 = PFMINrr
18686
  { 2085, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005a00004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2085 = PFMULrm
18687
  { 2086, 3,  1,  0,  0,  0, 0x100005a00004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2086 = PFMULrr
18688
  { 2087, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100004500004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2087 = PFNACCrm
18689
  { 2088, 3,  1,  0,  0,  0, 0x100004500004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2088 = PFNACCrr
18690
  { 2089, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100004700004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2089 = PFPNACCrm
18691
  { 2090, 3,  1,  0,  0,  0, 0x100004700004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2090 = PFPNACCrr
18692
  { 2091, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005300004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2091 = PFRCPIT1rm
18693
  { 2092, 3,  1,  0,  0,  0, 0x100005300004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2092 = PFRCPIT1rr
18694
  { 2093, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005b00004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2093 = PFRCPIT2rm
18695
  { 2094, 3,  1,  0,  0,  0, 0x100005b00004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2094 = PFRCPIT2rr
18696
  { 2095, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100004b00004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #2095 = PFRCPrm
18697
  { 2096, 2,  1,  0,  0,  0, 0x100004b00004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #2096 = PFRCPrr
18698
  { 2097, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005380004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2097 = PFRSQIT1rm
18699
  { 2098, 3,  1,  0,  0,  0, 0x100005380004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2098 = PFRSQIT1rr
18700
  { 2099, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100004b80004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #2099 = PFRSQRTrm
18701
  { 2100, 2,  1,  0,  0,  0, 0x100004b80004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #2100 = PFRSQRTrr
18702
  { 2101, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005500004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2101 = PFSUBRrm
18703
  { 2102, 3,  1,  0,  0,  0, 0x100005500004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2102 = PFSUBRrr
18704
  { 2103, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100004d00004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2103 = PFSUBrm
18705
  { 2104, 3,  1,  0,  0,  0, 0x100004d00004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2104 = PFSUBrr
18706
  { 2105, 7,  1,  0,  826,  0|(1ULL<<MCID::MayLoad), 0x118009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2105 = PHADDDrm
18707
  { 2106, 3,  1,  0,  821,  0, 0x118009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2106 = PHADDDrr
18708
  { 2107, 7,  1,  0,  827,  0|(1ULL<<MCID::MayLoad), 0x198009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2107 = PHADDSWrm128
18709
  { 2108, 3,  1,  0,  822,  0, 0x198009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2108 = PHADDSWrr128
18710
  { 2109, 7,  1,  0,  828,  0|(1ULL<<MCID::MayLoad), 0x98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2109 = PHADDWrm
18711
  { 2110, 3,  1,  0,  823,  0, 0x98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2110 = PHADDWrr
18712
  { 2111, 6,  1,  0,  407,  0|(1ULL<<MCID::MayLoad), 0x2098009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2111 = PHMINPOSUWrm128
18713
  { 2112, 2,  1,  0,  408,  0, 0x2098009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2112 = PHMINPOSUWrr128
18714
  { 2113, 7,  1,  0,  826,  0|(1ULL<<MCID::MayLoad), 0x318009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2113 = PHSUBDrm
18715
  { 2114, 3,  1,  0,  821,  0, 0x318009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2114 = PHSUBDrr
18716
  { 2115, 7,  1,  0,  827,  0|(1ULL<<MCID::MayLoad), 0x398009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2115 = PHSUBSWrm128
18717
  { 2116, 3,  1,  0,  822,  0, 0x398009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2116 = PHSUBSWrr128
18718
  { 2117, 7,  1,  0,  828,  0|(1ULL<<MCID::MayLoad), 0x298009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2117 = PHSUBWrm
18719
  { 2118, 3,  1,  0,  823,  0, 0x298009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2118 = PHSUBWrr
18720
  { 2119, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100000680004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #2119 = PI2FDrm
18721
  { 2120, 2,  1,  0,  0,  0, 0x100000680004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #2120 = PI2FDrr
18722
  { 2121, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100000600004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #2121 = PI2FWrm
18723
  { 2122, 2,  1,  0,  0,  0, 0x100000600004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #2122 = PI2FWrr
18724
  { 2123, 8,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x101804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #2123 = PINSRBrm
18725
  { 2124, 4,  1,  0,  276,  0, 0x101804d005ULL, nullptr, nullptr, OperandInfo260, -1 ,nullptr },  // Inst #2124 = PINSRBrr
18726
  { 2125, 8,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x111804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #2125 = PINSRDrm
18727
  { 2126, 4,  1,  0,  276,  0, 0x111804d005ULL, nullptr, nullptr, OperandInfo260, -1 ,nullptr },  // Inst #2126 = PINSRDrr
18728
  { 2127, 8,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x111806d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #2127 = PINSRQrm
18729
  { 2128, 4,  1,  0,  276,  0, 0x111806d005ULL, nullptr, nullptr, OperandInfo261, -1 ,nullptr },  // Inst #2128 = PINSRQrr
18730
  { 2129, 8,  1,  0,  409,  0|(1ULL<<MCID::MayLoad), 0x6218045006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #2129 = PINSRWrmi
18731
  { 2130, 4,  1,  0,  410,  0, 0x6218045005ULL, nullptr, nullptr, OperandInfo260, -1 ,nullptr },  // Inst #2130 = PINSRWrri
18732
  { 2131, 7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x218009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2131 = PMADDUBSWrm128
18733
  { 2132, 3,  1,  0,  408,  0, 0x218009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2132 = PMADDUBSWrr128
18734
  { 2133, 7,  1,  0,  412,  0|(1ULL<<MCID::MayLoad), 0x7a98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2133 = PMADDWDrm
18735
  { 2134, 3,  1,  0,  413,  0|(1ULL<<MCID::Commutable), 0x7a98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2134 = PMADDWDrr
18736
  { 2135, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x1e18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2135 = PMAXSBrm
18737
  { 2136, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x1e18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2136 = PMAXSBrr
18738
  { 2137, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x1e98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2137 = PMAXSDrm
18739
  { 2138, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x1e98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2138 = PMAXSDrr
18740
  { 2139, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7718005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2139 = PMAXSWrm
18741
  { 2140, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x7718005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2140 = PMAXSWrr
18742
  { 2141, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x6f18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2141 = PMAXUBrm
18743
  { 2142, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x6f18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2142 = PMAXUBrr
18744
  { 2143, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x1f98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2143 = PMAXUDrm
18745
  { 2144, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x1f98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2144 = PMAXUDrr
18746
  { 2145, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x1f18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2145 = PMAXUWrm
18747
  { 2146, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x1f18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2146 = PMAXUWrr
18748
  { 2147, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x1c18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2147 = PMINSBrm
18749
  { 2148, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x1c18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2148 = PMINSBrr
18750
  { 2149, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x1c98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2149 = PMINSDrm
18751
  { 2150, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x1c98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2150 = PMINSDrr
18752
  { 2151, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7518005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2151 = PMINSWrm
18753
  { 2152, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x7518005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2152 = PMINSWrr
18754
  { 2153, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x6d18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2153 = PMINUBrm
18755
  { 2154, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x6d18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2154 = PMINUBrr
18756
  { 2155, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x1d98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2155 = PMINUDrm
18757
  { 2156, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x1d98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2156 = PMINUDrr
18758
  { 2157, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x1d18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2157 = PMINUWrm
18759
  { 2158, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x1d18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2158 = PMINUWrr
18760
  { 2159, 2,  1,  0,  804,  0, 0x6b98005005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #2159 = PMOVMSKBrr
18761
  { 2160, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1098009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2160 = PMOVSXBDrm
18762
  { 2161, 2,  1,  0,  415,  0, 0x1098009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2161 = PMOVSXBDrr
18763
  { 2162, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1118009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2162 = PMOVSXBQrm
18764
  { 2163, 2,  1,  0,  415,  0, 0x1118009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2163 = PMOVSXBQrr
18765
  { 2164, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1018009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2164 = PMOVSXBWrm
18766
  { 2165, 2,  1,  0,  415,  0, 0x1018009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2165 = PMOVSXBWrr
18767
  { 2166, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1298009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2166 = PMOVSXDQrm
18768
  { 2167, 2,  1,  0,  415,  0, 0x1298009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2167 = PMOVSXDQrr
18769
  { 2168, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1198009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2168 = PMOVSXWDrm
18770
  { 2169, 2,  1,  0,  415,  0, 0x1198009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2169 = PMOVSXWDrr
18771
  { 2170, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1218009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2170 = PMOVSXWQrm
18772
  { 2171, 2,  1,  0,  415,  0, 0x1218009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2171 = PMOVSXWQrr
18773
  { 2172, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1898009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2172 = PMOVZXBDrm
18774
  { 2173, 2,  1,  0,  415,  0, 0x1898009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2173 = PMOVZXBDrr
18775
  { 2174, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1918009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2174 = PMOVZXBQrm
18776
  { 2175, 2,  1,  0,  415,  0, 0x1918009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2175 = PMOVZXBQrr
18777
  { 2176, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1818009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2176 = PMOVZXBWrm
18778
  { 2177, 2,  1,  0,  415,  0, 0x1818009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2177 = PMOVZXBWrr
18779
  { 2178, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1a98009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2178 = PMOVZXDQrm
18780
  { 2179, 2,  1,  0,  415,  0, 0x1a98009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2179 = PMOVZXDQrr
18781
  { 2180, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1998009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2180 = PMOVZXWDrm
18782
  { 2181, 2,  1,  0,  415,  0, 0x1998009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2181 = PMOVZXWDrr
18783
  { 2182, 6,  1,  0,  414,  0|(1ULL<<MCID::MayLoad), 0x1a18009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2182 = PMOVZXWQrm
18784
  { 2183, 2,  1,  0,  415,  0, 0x1a18009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2183 = PMOVZXWQrr
18785
  { 2184, 7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x1418009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2184 = PMULDQrm
18786
  { 2185, 3,  1,  0,  408,  0|(1ULL<<MCID::Commutable), 0x1418009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2185 = PMULDQrr
18787
  { 2186, 7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x598009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2186 = PMULHRSWrm128
18788
  { 2187, 3,  1,  0,  408,  0|(1ULL<<MCID::Commutable), 0x598009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2187 = PMULHRSWrr128
18789
  { 2188, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005b80004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr },  // Inst #2188 = PMULHRWrm
18790
  { 2189, 3,  1,  0,  0,  0, 0x100005b80004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr },  // Inst #2189 = PMULHRWrr
18791
  { 2190, 7,  1,  0,  416,  0|(1ULL<<MCID::MayLoad), 0x7218005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2190 = PMULHUWrm
18792
  { 2191, 3,  1,  0,  417,  0|(1ULL<<MCID::Commutable), 0x7218005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2191 = PMULHUWrr
18793
  { 2192, 7,  1,  0,  416,  0|(1ULL<<MCID::MayLoad), 0x7298005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2192 = PMULHWrm
18794
  { 2193, 3,  1,  0,  417,  0|(1ULL<<MCID::Commutable), 0x7298005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2193 = PMULHWrr
18795
  { 2194, 7,  1,  0,  832,  0|(1ULL<<MCID::MayLoad), 0x2018009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2194 = PMULLDrm
18796
  { 2195, 3,  1,  0,  831,  0|(1ULL<<MCID::Commutable), 0x2018009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2195 = PMULLDrr
18797
  { 2196, 7,  1,  0,  416,  0|(1ULL<<MCID::MayLoad), 0x6a98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2196 = PMULLWrm
18798
  { 2197, 3,  1,  0,  417,  0|(1ULL<<MCID::Commutable), 0x6a98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2197 = PMULLWrr
18799
  { 2198, 7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x7a18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2198 = PMULUDQrm
18800
  { 2199, 3,  1,  0,  408,  0|(1ULL<<MCID::Commutable), 0x7a18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2199 = PMULUDQrr
18801
  { 2200, 1,  1,  0,  418,  0|(1ULL<<MCID::MayLoad), 0x2c00000082ULL, ImplicitList11, ImplicitList11, OperandInfo82, -1 ,nullptr },  // Inst #2200 = POP16r
18802
  { 2201, 5,  0,  0,  601,  0|(1ULL<<MCID::MayLoad), 0x4780000098ULL, ImplicitList11, ImplicitList11, OperandInfo43, -1 ,nullptr },  // Inst #2201 = POP16rmm
18803
  { 2202, 1,  1,  0,  420,  0|(1ULL<<MCID::MayLoad), 0x4780000090ULL, ImplicitList11, ImplicitList11, OperandInfo82, -1 ,nullptr },  // Inst #2202 = POP16rmr
18804
  { 2203, 1,  1,  0,  420,  0|(1ULL<<MCID::MayLoad), 0x2c00000102ULL, ImplicitList11, ImplicitList11, OperandInfo83, -1 ,nullptr },  // Inst #2203 = POP32r
18805
  { 2204, 5,  0,  0,  601,  0|(1ULL<<MCID::MayLoad), 0x4780000118ULL, ImplicitList11, ImplicitList11, OperandInfo43, -1 ,nullptr },  // Inst #2204 = POP32rmm
18806
  { 2205, 1,  1,  0,  420,  0|(1ULL<<MCID::MayLoad), 0x4780000110ULL, ImplicitList11, ImplicitList11, OperandInfo83, -1 ,nullptr },  // Inst #2205 = POP32rmr
18807
  { 2206, 1,  1,  0,  420,  0|(1ULL<<MCID::MayLoad), 0x2c00000102ULL, ImplicitList13, ImplicitList13, OperandInfo85, -1 ,nullptr },  // Inst #2206 = POP64r
18808
  { 2207, 5,  0,  0,  419,  0|(1ULL<<MCID::MayLoad), 0x4780000118ULL, ImplicitList13, ImplicitList13, OperandInfo43, -1 ,nullptr },  // Inst #2207 = POP64rmm
18809
  { 2208, 1,  1,  0,  420,  0|(1ULL<<MCID::MayLoad), 0x4780000110ULL, ImplicitList13, ImplicitList13, OperandInfo85, -1 ,nullptr },  // Inst #2208 = POP64rmr
18810
  { 2209, 0,  0,  0,  604,  0|(1ULL<<MCID::MayLoad), 0x3080000081ULL, ImplicitList11, ImplicitList61, nullptr, -1 ,nullptr },  // Inst #2209 = POPA16
18811
  { 2210, 0,  0,  0,  604,  0|(1ULL<<MCID::MayLoad), 0x3080000101ULL, ImplicitList11, ImplicitList61, nullptr, -1 ,nullptr },  // Inst #2210 = POPA32
18812
  { 2211, 6,  1,  0,  422,  0|(1ULL<<MCID::MayLoad), 0x5c00005886ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr },  // Inst #2211 = POPCNT16rm
18813
  { 2212, 2,  1,  0,  423,  0, 0x5c00005885ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #2212 = POPCNT16rr
18814
  { 2213, 6,  1,  0,  422,  0|(1ULL<<MCID::MayLoad), 0x5c00005906ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #2213 = POPCNT32rm
18815
  { 2214, 2,  1,  0,  423,  0, 0x5c00005905ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #2214 = POPCNT32rr
18816
  { 2215, 6,  1,  0,  422,  0|(1ULL<<MCID::MayLoad), 0x5c00025806ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #2215 = POPCNT64rm
18817
  { 2216, 2,  1,  0,  423,  0, 0x5c00025805ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #2216 = POPCNT64rr
18818
  { 2217, 0,  0,  0,  424,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xf80000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2217 = POPDS16
18819
  { 2218, 0,  0,  0,  424,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xf80000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2218 = POPDS32
18820
  { 2219, 0,  0,  0,  424,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x380000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2219 = POPES16
18821
  { 2220, 0,  0,  0,  424,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x380000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2220 = POPES32
18822
  { 2221, 0,  0,  0,  602,  0|(1ULL<<MCID::MayLoad), 0x4e80000081ULL, ImplicitList11, ImplicitList12, nullptr, -1 ,nullptr },  // Inst #2221 = POPF16
18823
  { 2222, 0,  0,  0,  603,  0|(1ULL<<MCID::MayLoad), 0x4e80000101ULL, ImplicitList11, ImplicitList12, nullptr, -1 ,nullptr },  // Inst #2222 = POPF32
18824
  { 2223, 0,  0,  0,  426,  0|(1ULL<<MCID::MayLoad), 0x4e80000101ULL, ImplicitList13, ImplicitList14, nullptr, -1 ,nullptr },  // Inst #2223 = POPF64
18825
  { 2224, 0,  0,  0,  424,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080004081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2224 = POPFS16
18826
  { 2225, 0,  0,  0,  424,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2225 = POPFS32
18827
  { 2226, 0,  0,  0,  424,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2226 = POPFS64
18828
  { 2227, 0,  0,  0,  424,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480004081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2227 = POPGS16
18829
  { 2228, 0,  0,  0,  424,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2228 = POPGS32
18830
  { 2229, 0,  0,  0,  424,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2229 = POPGS64
18831
  { 2230, 0,  0,  0,  427,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xb80000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2230 = POPSS16
18832
  { 2231, 0,  0,  0,  427,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xb80000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2231 = POPSS32
18833
  { 2232, 7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x7598005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2232 = PORrm
18834
  { 2233, 3,  1,  0,  383,  0|(1ULL<<MCID::Commutable), 0x7598005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2233 = PORrr
18835
  { 2234, 5,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680004018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2234 = PREFETCH
18836
  { 2235, 5,  0,  0,  60, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00004018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2235 = PREFETCHNTA
18837
  { 2236, 5,  0,  0,  60, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00004019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2236 = PREFETCHT0
18838
  { 2237, 5,  0,  0,  60, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0000401aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2237 = PREFETCHT1
18839
  { 2238, 5,  0,  0,  60, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0000401bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2238 = PREFETCHT2
18840
  { 2239, 5,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680004019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2239 = PREFETCHW
18841
  { 2240, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x7b18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2240 = PSADBWrm
18842
  { 2241, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x7b18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2241 = PSADBWrr
18843
  { 2242, 7,  1,  0,  428,  0|(1ULL<<MCID::MayLoad), 0x18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2242 = PSHUFBrm
18844
  { 2243, 3,  1,  0,  429,  0, 0x18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2243 = PSHUFBrr
18845
  { 2244, 7,  1,  0,  430,  0|(1ULL<<MCID::MayLoad), 0x3818045006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #2244 = PSHUFDmi
18846
  { 2245, 3,  1,  0,  431,  0, 0x3818045005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #2245 = PSHUFDri
18847
  { 2246, 7,  1,  0,  430,  0|(1ULL<<MCID::MayLoad), 0x3818045806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #2246 = PSHUFHWmi
18848
  { 2247, 3,  1,  0,  431,  0, 0x3818045805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #2247 = PSHUFHWri
18849
  { 2248, 7,  1,  0,  430,  0|(1ULL<<MCID::MayLoad), 0x3818046006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #2248 = PSHUFLWmi
18850
  { 2249, 3,  1,  0,  431,  0, 0x3818046005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #2249 = PSHUFLWri
18851
  { 2250, 7,  1,  0,  432,  0|(1ULL<<MCID::MayLoad), 0x418009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2250 = PSIGNBrm
18852
  { 2251, 3,  1,  0,  433,  0, 0x418009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2251 = PSIGNBrr
18853
  { 2252, 7,  1,  0,  432,  0|(1ULL<<MCID::MayLoad), 0x518009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2252 = PSIGNDrm
18854
  { 2253, 3,  1,  0,  433,  0, 0x518009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2253 = PSIGNDrr
18855
  { 2254, 7,  1,  0,  432,  0|(1ULL<<MCID::MayLoad), 0x498009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2254 = PSIGNWrm
18856
  { 2255, 3,  1,  0,  433,  0, 0x498009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2255 = PSIGNWrr
18857
  { 2256, 3,  1,  0,  836,  0, 0x3998045017ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr },  // Inst #2256 = PSLLDQri
18858
  { 2257, 3,  1,  0,  435,  0, 0x3918045016ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr },  // Inst #2257 = PSLLDri
18859
  { 2258, 7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x7918005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2258 = PSLLDrm
18860
  { 2259, 3,  1,  0,  835,  0, 0x7918005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2259 = PSLLDrr
18861
  { 2260, 3,  1,  0,  435,  0, 0x3998045016ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr },  // Inst #2260 = PSLLQri
18862
  { 2261, 7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x7998005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2261 = PSLLQrm
18863
  { 2262, 3,  1,  0,  835,  0, 0x7998005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2262 = PSLLQrr
18864
  { 2263, 3,  1,  0,  435,  0, 0x3898045016ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr },  // Inst #2263 = PSLLWri
18865
  { 2264, 7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x7898005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2264 = PSLLWrm
18866
  { 2265, 3,  1,  0,  835,  0, 0x7898005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2265 = PSLLWrr
18867
  { 2266, 3,  1,  0,  435,  0, 0x3918045014ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr },  // Inst #2266 = PSRADri
18868
  { 2267, 7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x7118005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2267 = PSRADrm
18869
  { 2268, 3,  1,  0,  835,  0, 0x7118005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2268 = PSRADrr
18870
  { 2269, 3,  1,  0,  435,  0, 0x3898045014ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr },  // Inst #2269 = PSRAWri
18871
  { 2270, 7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x7098005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2270 = PSRAWrm
18872
  { 2271, 3,  1,  0,  835,  0, 0x7098005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2271 = PSRAWrr
18873
  { 2272, 3,  1,  0,  836,  0, 0x3998045013ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr },  // Inst #2272 = PSRLDQri
18874
  { 2273, 3,  1,  0,  435,  0, 0x3918045012ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr },  // Inst #2273 = PSRLDri
18875
  { 2274, 7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x6918005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2274 = PSRLDrm
18876
  { 2275, 3,  1,  0,  835,  0, 0x6918005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2275 = PSRLDrr
18877
  { 2276, 3,  1,  0,  435,  0, 0x3998045012ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr },  // Inst #2276 = PSRLQri
18878
  { 2277, 7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x6998005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2277 = PSRLQrm
18879
  { 2278, 3,  1,  0,  835,  0, 0x6998005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2278 = PSRLQrr
18880
  { 2279, 3,  1,  0,  435,  0, 0x3898045012ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr },  // Inst #2279 = PSRLWri
18881
  { 2280, 7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x6898005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2280 = PSRLWrm
18882
  { 2281, 3,  1,  0,  835,  0, 0x6898005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2281 = PSRLWrr
18883
  { 2282, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7c18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2282 = PSUBBrm
18884
  { 2283, 3,  1,  0,  377,  0, 0x7c18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2283 = PSUBBrr
18885
  { 2284, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7d18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2284 = PSUBDrm
18886
  { 2285, 3,  1,  0,  377,  0, 0x7d18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2285 = PSUBDrr
18887
  { 2286, 7,  1,  0,  378,  0|(1ULL<<MCID::MayLoad), 0x7d98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2286 = PSUBQrm
18888
  { 2287, 3,  1,  0,  379,  0, 0x7d98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2287 = PSUBQrr
18889
  { 2288, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7418005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2288 = PSUBSBrm
18890
  { 2289, 3,  1,  0,  377,  0, 0x7418005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2289 = PSUBSBrr
18891
  { 2290, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7498005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2290 = PSUBSWrm
18892
  { 2291, 3,  1,  0,  377,  0, 0x7498005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2291 = PSUBSWrr
18893
  { 2292, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x6c18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2292 = PSUBUSBrm
18894
  { 2293, 3,  1,  0,  377,  0, 0x6c18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2293 = PSUBUSBrr
18895
  { 2294, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x6c98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2294 = PSUBUSWrm
18896
  { 2295, 3,  1,  0,  377,  0, 0x6c98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2295 = PSUBUSWrr
18897
  { 2296, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x7c98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2296 = PSUBWrm
18898
  { 2297, 3,  1,  0,  377,  0, 0x7c98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2297 = PSUBWrr
18899
  { 2298, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100005d80004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr },  // Inst #2298 = PSWAPDrm
18900
  { 2299, 2,  1,  0,  0,  0, 0x100005d80004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr },  // Inst #2299 = PSWAPDrr
18901
  { 2300, 6,  0,  0,  834,  0|(1ULL<<MCID::MayLoad), 0xb98009006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #2300 = PTESTrm
18902
  { 2301, 2,  0,  0,  833,  0, 0xb98009005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #2301 = PTESTrr
18903
  { 2302, 7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x3418005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2302 = PUNPCKHBWrm
18904
  { 2303, 3,  1,  0,  439,  0, 0x3418005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2303 = PUNPCKHBWrr
18905
  { 2304, 7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x3518005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2304 = PUNPCKHDQrm
18906
  { 2305, 3,  1,  0,  439,  0, 0x3518005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2305 = PUNPCKHDQrr
18907
  { 2306, 7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x3698005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2306 = PUNPCKHQDQrm
18908
  { 2307, 3,  1,  0,  439,  0, 0x3698005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2307 = PUNPCKHQDQrr
18909
  { 2308, 7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x3498005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2308 = PUNPCKHWDrm
18910
  { 2309, 3,  1,  0,  439,  0, 0x3498005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2309 = PUNPCKHWDrr
18911
  { 2310, 7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x3018005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2310 = PUNPCKLBWrm
18912
  { 2311, 3,  1,  0,  439,  0, 0x3018005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2311 = PUNPCKLBWrr
18913
  { 2312, 7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x3118005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2312 = PUNPCKLDQrm
18914
  { 2313, 3,  1,  0,  439,  0, 0x3118005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2313 = PUNPCKLDQrr
18915
  { 2314, 7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x3618005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2314 = PUNPCKLQDQrm
18916
  { 2315, 3,  1,  0,  439,  0, 0x3618005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2315 = PUNPCKLQDQrr
18917
  { 2316, 7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x3098005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2316 = PUNPCKLWDrm
18918
  { 2317, 3,  1,  0,  439,  0, 0x3098005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2317 = PUNPCKLWDrr
18919
  { 2318, 1,  0,  0,  440,  0|(1ULL<<MCID::MayStore), 0x3500040081ULL, ImplicitList11, ImplicitList11, OperandInfo2, -1 ,nullptr },  // Inst #2318 = PUSH16i8
18920
  { 2319, 1,  0,  0,  441,  0|(1ULL<<MCID::MayStore), 0x2800000082ULL, ImplicitList11, ImplicitList11, OperandInfo82, -1 ,nullptr },  // Inst #2319 = PUSH16r
18921
  { 2320, 5,  0,  0,  598,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f8000009eULL, ImplicitList11, ImplicitList11, OperandInfo43, -1 ,nullptr },  // Inst #2320 = PUSH16rmm
18922
  { 2321, 1,  0,  0,  441,  0|(1ULL<<MCID::MayStore), 0x7f80000096ULL, ImplicitList11, ImplicitList11, OperandInfo82, -1 ,nullptr },  // Inst #2321 = PUSH16rmr
18923
  { 2322, 1,  0,  0,  440,  0|(1ULL<<MCID::MayStore), 0x3500040101ULL, ImplicitList11, ImplicitList11, OperandInfo2, -1 ,nullptr },  // Inst #2322 = PUSH32i8
18924
  { 2323, 1,  0,  0,  441,  0|(1ULL<<MCID::MayStore), 0x2800000102ULL, ImplicitList11, ImplicitList11, OperandInfo83, -1 ,nullptr },  // Inst #2323 = PUSH32r
18925
  { 2324, 5,  0,  0,  598,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f8000011eULL, ImplicitList11, ImplicitList11, OperandInfo43, -1 ,nullptr },  // Inst #2324 = PUSH32rmm
18926
  { 2325, 1,  0,  0,  441,  0|(1ULL<<MCID::MayStore), 0x7f80000116ULL, ImplicitList11, ImplicitList11, OperandInfo83, -1 ,nullptr },  // Inst #2325 = PUSH32rmr
18927
  { 2326, 1,  0,  0,  440,  0|(1ULL<<MCID::MayStore), 0x34001c0101ULL, ImplicitList13, ImplicitList13, OperandInfo2, -1 ,nullptr },  // Inst #2326 = PUSH64i32
18928
  { 2327, 1,  0,  0,  440,  0|(1ULL<<MCID::MayStore), 0x3500040101ULL, ImplicitList13, ImplicitList13, OperandInfo2, -1 ,nullptr },  // Inst #2327 = PUSH64i8
18929
  { 2328, 1,  0,  0,  441,  0|(1ULL<<MCID::MayStore), 0x2800000102ULL, ImplicitList13, ImplicitList13, OperandInfo85, -1 ,nullptr },  // Inst #2328 = PUSH64r
18930
  { 2329, 5,  0,  0,  442,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f8000011eULL, ImplicitList13, ImplicitList13, OperandInfo43, -1 ,nullptr },  // Inst #2329 = PUSH64rmm
18931
  { 2330, 1,  0,  0,  441,  0|(1ULL<<MCID::MayStore), 0x7f80000116ULL, ImplicitList13, ImplicitList13, OperandInfo85, -1 ,nullptr },  // Inst #2330 = PUSH64rmr
18932
  { 2331, 0,  0,  0,  600,  0|(1ULL<<MCID::MayStore), 0x3000000081ULL, ImplicitList61, ImplicitList11, nullptr, -1 ,nullptr },  // Inst #2331 = PUSHA16
18933
  { 2332, 0,  0,  0,  600,  0|(1ULL<<MCID::MayStore), 0x3000000101ULL, ImplicitList61, ImplicitList11, nullptr, -1 ,nullptr },  // Inst #2332 = PUSHA32
18934
  { 2333, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x700000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2333 = PUSHCS16
18935
  { 2334, 0,  0,  0,  445,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x700000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2334 = PUSHCS32
18936
  { 2335, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xf00000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2335 = PUSHDS16
18937
  { 2336, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xf00000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2336 = PUSHDS32
18938
  { 2337, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x300000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2337 = PUSHES16
18939
  { 2338, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x300000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2338 = PUSHES32
18940
  { 2339, 0,  0,  0,  599,  0|(1ULL<<MCID::MayStore), 0x4e00000081ULL, ImplicitList12, ImplicitList11, nullptr, -1 ,nullptr },  // Inst #2339 = PUSHF16
18941
  { 2340, 0,  0,  0,  599,  0|(1ULL<<MCID::MayStore), 0x4e00000101ULL, ImplicitList12, ImplicitList11, nullptr, -1 ,nullptr },  // Inst #2340 = PUSHF32
18942
  { 2341, 0,  0,  0,  446,  0|(1ULL<<MCID::MayStore), 0x4e00000101ULL, ImplicitList14, ImplicitList13, nullptr, -1 ,nullptr },  // Inst #2341 = PUSHF64
18943
  { 2342, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000004081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2342 = PUSHFS16
18944
  { 2343, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2343 = PUSHFS32
18945
  { 2344, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2344 = PUSHFS64
18946
  { 2345, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400004081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2345 = PUSHGS16
18947
  { 2346, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2346 = PUSHGS32
18948
  { 2347, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2347 = PUSHGS64
18949
  { 2348, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xb00000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2348 = PUSHSS16
18950
  { 2349, 0,  0,  0,  444,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xb00000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2349 = PUSHSS32
18951
  { 2350, 1,  0,  0,  440,  0|(1ULL<<MCID::MayStore), 0x34000c0081ULL, ImplicitList11, ImplicitList11, OperandInfo2, -1 ,nullptr },  // Inst #2350 = PUSHi16
18952
  { 2351, 1,  0,  0,  440,  0|(1ULL<<MCID::MayStore), 0x3400140101ULL, ImplicitList11, ImplicitList11, OperandInfo2, -1 ,nullptr },  // Inst #2351 = PUSHi32
18953
  { 2352, 7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x7798005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2352 = PXORrm
18954
  { 2353, 3,  1,  0,  383,  0|(1ULL<<MCID::Commutable), 0x7798005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2353 = PXORrr
18955
  { 2354, 5,  0,  0,  661,  0, 0x688000009aULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2354 = RCL16m1
18956
  { 2355, 5,  0,  0,  663,  0, 0x698000009aULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2355 = RCL16mCL
18957
  { 2356, 6,  0,  0,  663,  0, 0x608004009aULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2356 = RCL16mi
18958
  { 2357, 2,  1,  0,  660,  0, 0x6880000092ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2357 = RCL16r1
18959
  { 2358, 2,  1,  0,  662,  0, 0x6980000092ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2358 = RCL16rCL
18960
  { 2359, 3,  1,  0,  662,  0, 0x6080040092ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #2359 = RCL16ri
18961
  { 2360, 5,  0,  0,  661,  0, 0x688000011aULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2360 = RCL32m1
18962
  { 2361, 5,  0,  0,  663,  0, 0x698000011aULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2361 = RCL32mCL
18963
  { 2362, 6,  0,  0,  663,  0, 0x608004011aULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2362 = RCL32mi
18964
  { 2363, 2,  1,  0,  660,  0, 0x6880000112ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2363 = RCL32r1
18965
  { 2364, 2,  1,  0,  662,  0, 0x6980000112ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2364 = RCL32rCL
18966
  { 2365, 3,  1,  0,  662,  0, 0x6080040112ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #2365 = RCL32ri
18967
  { 2366, 5,  0,  0,  661,  0, 0x688002001aULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2366 = RCL64m1
18968
  { 2367, 5,  0,  0,  663,  0, 0x698002001aULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2367 = RCL64mCL
18969
  { 2368, 6,  0,  0,  663,  0, 0x608006001aULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2368 = RCL64mi
18970
  { 2369, 2,  1,  0,  660,  0, 0x6880020012ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2369 = RCL64r1
18971
  { 2370, 2,  1,  0,  662,  0, 0x6980020012ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2370 = RCL64rCL
18972
  { 2371, 3,  1,  0,  662,  0, 0x6080060012ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #2371 = RCL64ri
18973
  { 2372, 5,  0,  0,  661,  0, 0x680000001aULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2372 = RCL8m1
18974
  { 2373, 5,  0,  0,  663,  0, 0x690000001aULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2373 = RCL8mCL
18975
  { 2374, 6,  0,  0,  663,  0, 0x600004001aULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2374 = RCL8mi
18976
  { 2375, 2,  1,  0,  660,  0, 0x6800000012ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2375 = RCL8r1
18977
  { 2376, 2,  1,  0,  662,  0, 0x6900000012ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2376 = RCL8rCL
18978
  { 2377, 3,  1,  0,  662,  0, 0x6000040012ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #2377 = RCL8ri
18979
  { 2378, 6,  1,  0,  449,  0|(1ULL<<MCID::MayLoad), 0x2988004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2378 = RCPPSm
18980
  { 2379, 2,  1,  0,  450,  0, 0x2988004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2379 = RCPPSr
18981
  { 2380, 6,  1,  0,  451,  0|(1ULL<<MCID::MayLoad), 0x2988005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #2380 = RCPSSm
18982
  { 2381, 7,  1,  0,  452,  0|(1ULL<<MCID::MayLoad), 0x2980005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2381 = RCPSSm_Int
18983
  { 2382, 2,  1,  0,  453,  0, 0x2988005805ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #2382 = RCPSSr
18984
  { 2383, 3,  1,  0,  452,  0, 0x2980005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2383 = RCPSSr_Int
18985
  { 2384, 5,  0,  0,  661,  0, 0x688000009bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2384 = RCR16m1
18986
  { 2385, 5,  0,  0,  663,  0, 0x698000009bULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2385 = RCR16mCL
18987
  { 2386, 6,  0,  0,  663,  0, 0x608004009bULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2386 = RCR16mi
18988
  { 2387, 2,  1,  0,  660,  0, 0x6880000093ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2387 = RCR16r1
18989
  { 2388, 2,  1,  0,  662,  0, 0x6980000093ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2388 = RCR16rCL
18990
  { 2389, 3,  1,  0,  662,  0, 0x6080040093ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #2389 = RCR16ri
18991
  { 2390, 5,  0,  0,  661,  0, 0x688000011bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2390 = RCR32m1
18992
  { 2391, 5,  0,  0,  663,  0, 0x698000011bULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2391 = RCR32mCL
18993
  { 2392, 6,  0,  0,  663,  0, 0x608004011bULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2392 = RCR32mi
18994
  { 2393, 2,  1,  0,  660,  0, 0x6880000113ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2393 = RCR32r1
18995
  { 2394, 2,  1,  0,  662,  0, 0x6980000113ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2394 = RCR32rCL
18996
  { 2395, 3,  1,  0,  662,  0, 0x6080040113ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #2395 = RCR32ri
18997
  { 2396, 5,  0,  0,  661,  0, 0x688002001bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2396 = RCR64m1
18998
  { 2397, 5,  0,  0,  663,  0, 0x698002001bULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2397 = RCR64mCL
18999
  { 2398, 6,  0,  0,  663,  0, 0x608006001bULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2398 = RCR64mi
19000
  { 2399, 2,  1,  0,  660,  0, 0x6880020013ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2399 = RCR64r1
19001
  { 2400, 2,  1,  0,  662,  0, 0x6980020013ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2400 = RCR64rCL
19002
  { 2401, 3,  1,  0,  662,  0, 0x6080060013ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #2401 = RCR64ri
19003
  { 2402, 5,  0,  0,  661,  0, 0x680000001bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2402 = RCR8m1
19004
  { 2403, 5,  0,  0,  663,  0, 0x690000001bULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2403 = RCR8mCL
19005
  { 2404, 6,  0,  0,  663,  0, 0x600004001bULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2404 = RCR8mi
19006
  { 2405, 2,  1,  0,  660,  0, 0x6800000013ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2405 = RCR8r1
19007
  { 2406, 2,  1,  0,  662,  0, 0x6900000013ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2406 = RCR8rCL
19008
  { 2407, 3,  1,  0,  662,  0, 0x6000040013ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #2407 = RCR8ri
19009
  { 2408, 1,  1,  0,  454,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList12, ImplicitList11, OperandInfo83, -1 ,nullptr },  // Inst #2408 = RDFLAGS32
19010
  { 2409, 1,  1,  0,  454,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList14, ImplicitList11, OperandInfo85, -1 ,nullptr },  // Inst #2409 = RDFLAGS64
19011
  { 2410, 1,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700005810ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #2410 = RDFSBASE
19012
  { 2411, 1,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700025810ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #2411 = RDFSBASE64
19013
  { 2412, 1,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700005811ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #2412 = RDGSBASE
19014
  { 2413, 1,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700025811ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #2413 = RDGSBASE64
19015
  { 2414, 0,  0,  0,  455,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1900004001ULL, ImplicitList35, ImplicitList16, nullptr, -1 ,nullptr },  // Inst #2414 = RDMSR
19016
  { 2415, 1,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #2415 = RDPKRU
19017
  { 2416, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000404eULL, ImplicitList35, ImplicitList16, nullptr, -1 ,nullptr },  // Inst #2416 = RDPKRUr
19018
  { 2417, 0,  0,  0,  735,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1980004001ULL, ImplicitList35, ImplicitList24, nullptr, -1 ,nullptr },  // Inst #2417 = RDPMC
19019
  { 2418, 1,  1,  0,  736,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380004096ULL, nullptr, ImplicitList6, OperandInfo82, -1 ,nullptr },  // Inst #2418 = RDRAND16r
19020
  { 2419, 1,  1,  0,  736,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380004116ULL, nullptr, ImplicitList6, OperandInfo83, -1 ,nullptr },  // Inst #2419 = RDRAND32r
19021
  { 2420, 1,  1,  0,  736,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380024016ULL, nullptr, ImplicitList6, OperandInfo85, -1 ,nullptr },  // Inst #2420 = RDRAND64r
19022
  { 2421, 1,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380004097ULL, nullptr, ImplicitList6, OperandInfo82, -1 ,nullptr },  // Inst #2421 = RDSEED16r
19023
  { 2422, 1,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380004117ULL, nullptr, ImplicitList6, OperandInfo83, -1 ,nullptr },  // Inst #2422 = RDSEED32r
19024
  { 2423, 1,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380024017ULL, nullptr, ImplicitList6, OperandInfo85, -1 ,nullptr },  // Inst #2423 = RDSEED64r
19025
  { 2424, 0,  0,  0,  733,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1880004001ULL, nullptr, ImplicitList24, nullptr, -1 ,nullptr },  // Inst #2424 = RDTSC
19026
  { 2425, 0,  0,  0,  734,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004059ULL, nullptr, ImplicitList63, nullptr, -1 ,nullptr },  // Inst #2425 = RDTSCP
19027
  { 2426, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2426 = RELEASE_ADD32mi
19028
  { 2427, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #2427 = RELEASE_ADD32mr
19029
  { 2428, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2428 = RELEASE_ADD64mi32
19030
  { 2429, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #2429 = RELEASE_ADD64mr
19031
  { 2430, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2430 = RELEASE_ADD8mi
19032
  { 2431, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #2431 = RELEASE_ADD8mr
19033
  { 2432, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2432 = RELEASE_AND32mi
19034
  { 2433, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #2433 = RELEASE_AND32mr
19035
  { 2434, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2434 = RELEASE_AND64mi32
19036
  { 2435, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #2435 = RELEASE_AND64mr
19037
  { 2436, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2436 = RELEASE_AND8mi
19038
  { 2437, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #2437 = RELEASE_AND8mr
19039
  { 2438, 5,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2438 = RELEASE_DEC16m
19040
  { 2439, 5,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2439 = RELEASE_DEC32m
19041
  { 2440, 5,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2440 = RELEASE_DEC64m
19042
  { 2441, 5,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2441 = RELEASE_DEC8m
19043
  { 2442, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr },  // Inst #2442 = RELEASE_FADD32mr
19044
  { 2443, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo246, -1 ,nullptr },  // Inst #2443 = RELEASE_FADD64mr
19045
  { 2444, 5,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2444 = RELEASE_INC16m
19046
  { 2445, 5,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2445 = RELEASE_INC32m
19047
  { 2446, 5,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2446 = RELEASE_INC64m
19048
  { 2447, 5,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2447 = RELEASE_INC8m
19049
  { 2448, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #2448 = RELEASE_MOV16mi
19050
  { 2449, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #2449 = RELEASE_MOV16mr
19051
  { 2450, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #2450 = RELEASE_MOV32mi
19052
  { 2451, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #2451 = RELEASE_MOV32mr
19053
  { 2452, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #2452 = RELEASE_MOV64mi32
19054
  { 2453, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #2453 = RELEASE_MOV64mr
19055
  { 2454, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr },  // Inst #2454 = RELEASE_MOV8mi
19056
  { 2455, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #2455 = RELEASE_MOV8mr
19057
  { 2456, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2456 = RELEASE_OR32mi
19058
  { 2457, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #2457 = RELEASE_OR32mr
19059
  { 2458, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2458 = RELEASE_OR64mi32
19060
  { 2459, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #2459 = RELEASE_OR64mr
19061
  { 2460, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2460 = RELEASE_OR8mi
19062
  { 2461, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #2461 = RELEASE_OR8mr
19063
  { 2462, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2462 = RELEASE_XOR32mi
19064
  { 2463, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #2463 = RELEASE_XOR32mr
19065
  { 2464, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2464 = RELEASE_XOR64mi32
19066
  { 2465, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #2465 = RELEASE_XOR64mr
19067
  { 2466, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2466 = RELEASE_XOR8mi
19068
  { 2467, 6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #2467 = RELEASE_XOR8mr
19069
  { 2468, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7900000001ULL, ImplicitList59, ImplicitList35, nullptr, -1 ,nullptr },  // Inst #2468 = REPNE_PREFIX
19070
  { 2469, 0,  0,  0,  458,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5204000001ULL, ImplicitList64, ImplicitList64, nullptr, -1 ,nullptr },  // Inst #2469 = REP_MOVSB_32
19071
  { 2470, 0,  0,  0,  458,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5204000001ULL, ImplicitList65, ImplicitList65, nullptr, -1 ,nullptr },  // Inst #2470 = REP_MOVSB_64
19072
  { 2471, 0,  0,  0,  458,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000101ULL, ImplicitList64, ImplicitList64, nullptr, -1 ,nullptr },  // Inst #2471 = REP_MOVSD_32
19073
  { 2472, 0,  0,  0,  458,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000101ULL, ImplicitList65, ImplicitList65, nullptr, -1 ,nullptr },  // Inst #2472 = REP_MOVSD_64
19074
  { 2473, 0,  0,  0,  458,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284020001ULL, ImplicitList65, ImplicitList65, nullptr, -1 ,nullptr },  // Inst #2473 = REP_MOVSQ_64
19075
  { 2474, 0,  0,  0,  458,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000081ULL, ImplicitList64, ImplicitList64, nullptr, -1 ,nullptr },  // Inst #2474 = REP_MOVSW_32
19076
  { 2475, 0,  0,  0,  458,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000081ULL, ImplicitList65, ImplicitList65, nullptr, -1 ,nullptr },  // Inst #2475 = REP_MOVSW_64
19077
  { 2476, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7980000001ULL, ImplicitList59, ImplicitList35, nullptr, -1 ,nullptr },  // Inst #2476 = REP_PREFIX
19078
  { 2477, 0,  0,  0,  459,  0|(1ULL<<MCID::MayStore), 0x5504000001ULL, ImplicitList66, ImplicitList67, nullptr, -1 ,nullptr },  // Inst #2477 = REP_STOSB_32
19079
  { 2478, 0,  0,  0,  459,  0|(1ULL<<MCID::MayStore), 0x5504000001ULL, ImplicitList68, ImplicitList69, nullptr, -1 ,nullptr },  // Inst #2478 = REP_STOSB_64
19080
  { 2479, 0,  0,  0,  459,  0|(1ULL<<MCID::MayStore), 0x5584000101ULL, ImplicitList70, ImplicitList67, nullptr, -1 ,nullptr },  // Inst #2479 = REP_STOSD_32
19081
  { 2480, 0,  0,  0,  459,  0|(1ULL<<MCID::MayStore), 0x5584000101ULL, ImplicitList71, ImplicitList69, nullptr, -1 ,nullptr },  // Inst #2480 = REP_STOSD_64
19082
  { 2481, 0,  0,  0,  459,  0|(1ULL<<MCID::MayStore), 0x5584020001ULL, ImplicitList71, ImplicitList69, nullptr, -1 ,nullptr },  // Inst #2481 = REP_STOSQ_64
19083
  { 2482, 0,  0,  0,  459,  0|(1ULL<<MCID::MayStore), 0x5584000081ULL, ImplicitList72, ImplicitList67, nullptr, -1 ,nullptr },  // Inst #2482 = REP_STOSW_32
19084
  { 2483, 0,  0,  0,  459,  0|(1ULL<<MCID::MayStore), 0x5584000081ULL, ImplicitList73, ImplicitList69, nullptr, -1 ,nullptr },  // Inst #2483 = REP_STOSW_64
19085
  { 2484, 1,  0,  0,  714,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x6101cc0101ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #2484 = RETIL
19086
  { 2485, 1,  0,  0,  714,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x6101cc0101ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #2485 = RETIQ
19087
  { 2486, 1,  0,  0,  714,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6101cc0081ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #2486 = RETIW
19088
  { 2487, 0,  0,  0,  712,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x6181c00101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2487 = RETL
19089
  { 2488, 0,  0,  0,  712,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x6181c00101ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2488 = RETQ
19090
  { 2489, 0,  0,  0,  712,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6181c00081ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2489 = RETW
19091
  { 2490, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2400000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2490 = REX64_PREFIX
19092
  { 2491, 5,  0,  0,  447,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000098ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2491 = ROL16m1
19093
  { 2492, 5,  0,  0,  659,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000098ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2492 = ROL16mCL
19094
  { 2493, 6,  0,  0,  657,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2493 = ROL16mi
19095
  { 2494, 2,  1,  0,  656,  0, 0x6880000090ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2494 = ROL16r1
19096
  { 2495, 2,  1,  0,  658,  0, 0x6980000090ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2495 = ROL16rCL
19097
  { 2496, 3,  1,  0,  448,  0, 0x6080040090ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #2496 = ROL16ri
19098
  { 2497, 5,  0,  0,  447,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000118ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2497 = ROL32m1
19099
  { 2498, 5,  0,  0,  659,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000118ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2498 = ROL32mCL
19100
  { 2499, 6,  0,  0,  657,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2499 = ROL32mi
19101
  { 2500, 2,  1,  0,  656,  0, 0x6880000110ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2500 = ROL32r1
19102
  { 2501, 2,  1,  0,  658,  0, 0x6980000110ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2501 = ROL32rCL
19103
  { 2502, 3,  1,  0,  448,  0, 0x6080040110ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #2502 = ROL32ri
19104
  { 2503, 5,  0,  0,  447,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2503 = ROL64m1
19105
  { 2504, 5,  0,  0,  659,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020018ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2504 = ROL64mCL
19106
  { 2505, 6,  0,  0,  657,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2505 = ROL64mi
19107
  { 2506, 2,  1,  0,  656,  0, 0x6880020010ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2506 = ROL64r1
19108
  { 2507, 2,  1,  0,  658,  0, 0x6980020010ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2507 = ROL64rCL
19109
  { 2508, 3,  1,  0,  448,  0, 0x6080060010ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #2508 = ROL64ri
19110
  { 2509, 5,  0,  0,  447,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2509 = ROL8m1
19111
  { 2510, 5,  0,  0,  659,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000018ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2510 = ROL8mCL
19112
  { 2511, 6,  0,  0,  657,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2511 = ROL8mi
19113
  { 2512, 2,  1,  0,  656,  0, 0x6800000010ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2512 = ROL8r1
19114
  { 2513, 2,  1,  0,  658,  0, 0x6900000010ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2513 = ROL8rCL
19115
  { 2514, 3,  1,  0,  448,  0, 0x6000040010ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #2514 = ROL8ri
19116
  { 2515, 5,  0,  0,  447,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000099ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2515 = ROR16m1
19117
  { 2516, 5,  0,  0,  659,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000099ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2516 = ROR16mCL
19118
  { 2517, 6,  0,  0,  657,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040099ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2517 = ROR16mi
19119
  { 2518, 2,  1,  0,  656,  0, 0x6880000091ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2518 = ROR16r1
19120
  { 2519, 2,  1,  0,  658,  0, 0x6980000091ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2519 = ROR16rCL
19121
  { 2520, 3,  1,  0,  448,  0, 0x6080040091ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #2520 = ROR16ri
19122
  { 2521, 5,  0,  0,  447,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000119ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2521 = ROR32m1
19123
  { 2522, 5,  0,  0,  659,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000119ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2522 = ROR32mCL
19124
  { 2523, 6,  0,  0,  657,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040119ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2523 = ROR32mi
19125
  { 2524, 2,  1,  0,  656,  0, 0x6880000111ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2524 = ROR32r1
19126
  { 2525, 2,  1,  0,  658,  0, 0x6980000111ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2525 = ROR32rCL
19127
  { 2526, 3,  1,  0,  448,  0, 0x6080040111ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #2526 = ROR32ri
19128
  { 2527, 5,  0,  0,  447,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2527 = ROR64m1
19129
  { 2528, 5,  0,  0,  659,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020019ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2528 = ROR64mCL
19130
  { 2529, 6,  0,  0,  657,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2529 = ROR64mi
19131
  { 2530, 2,  1,  0,  656,  0, 0x6880020011ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2530 = ROR64r1
19132
  { 2531, 2,  1,  0,  658,  0, 0x6980020011ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2531 = ROR64rCL
19133
  { 2532, 3,  1,  0,  448,  0, 0x6080060011ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #2532 = ROR64ri
19134
  { 2533, 5,  0,  0,  447,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2533 = ROR8m1
19135
  { 2534, 5,  0,  0,  659,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000019ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2534 = ROR8mCL
19136
  { 2535, 6,  0,  0,  657,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2535 = ROR8mi
19137
  { 2536, 2,  1,  0,  656,  0, 0x6800000011ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2536 = ROR8r1
19138
  { 2537, 2,  1,  0,  658,  0, 0x6900000011ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2537 = ROR8rCL
19139
  { 2538, 3,  1,  0,  448,  0, 0x6000040011ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #2538 = ROR8ri
19140
  { 2539, 7,  1,  0,  461,  0|(1ULL<<MCID::MayLoad), 0x782004e006ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr },  // Inst #2539 = RORX32mi
19141
  { 2540, 3,  1,  0,  462,  0, 0x782004e005ULL, nullptr, nullptr, OperandInfo67, -1 ,nullptr },  // Inst #2540 = RORX32ri
19142
  { 2541, 7,  1,  0,  461,  0|(1ULL<<MCID::MayLoad), 0xf82004e006ULL, nullptr, nullptr, OperandInfo68, -1 ,nullptr },  // Inst #2541 = RORX64mi
19143
  { 2542, 3,  1,  0,  462,  0, 0xf82004e005ULL, nullptr, nullptr, OperandInfo69, -1 ,nullptr },  // Inst #2542 = RORX64ri
19144
  { 2543, 7,  1,  0,  918,  0|(1ULL<<MCID::MayLoad), 0x49004d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #2543 = ROUNDPDm
19145
  { 2544, 3,  1,  0,  916,  0, 0x49004d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #2544 = ROUNDPDr
19146
  { 2545, 7,  1,  0,  919,  0|(1ULL<<MCID::MayLoad), 0x40804d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #2545 = ROUNDPSm
19147
  { 2546, 3,  1,  0,  916,  0, 0x40804d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #2546 = ROUNDPSr
19148
  { 2547, 8,  1,  0,  920,  0|(1ULL<<MCID::MayLoad), 0x58004d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #2547 = ROUNDSDm
19149
  { 2548, 4,  1,  0,  917,  0, 0x58004d005ULL, nullptr, nullptr, OperandInfo110, -1 ,nullptr },  // Inst #2548 = ROUNDSDr
19150
  { 2549, 4,  1,  0,  917,  0, 0x58004d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #2549 = ROUNDSDr_Int
19151
  { 2550, 8,  1,  0,  920,  0|(1ULL<<MCID::MayLoad), 0x50004d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #2550 = ROUNDSSm
19152
  { 2551, 4,  1,  0,  917,  0, 0x50004d005ULL, nullptr, nullptr, OperandInfo112, -1 ,nullptr },  // Inst #2551 = ROUNDSSr
19153
  { 2552, 4,  1,  0,  917,  0, 0x50004d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #2552 = ROUNDSSr_Int
19154
  { 2553, 0,  0,  0,  467,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5500004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2553 = RSM
19155
  { 2554, 6,  1,  0,  936,  0|(1ULL<<MCID::MayLoad), 0x2908004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2554 = RSQRTPSm
19156
  { 2555, 2,  1,  0,  932,  0, 0x2908004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2555 = RSQRTPSr
19157
  { 2556, 6,  1,  0,  937,  0|(1ULL<<MCID::MayLoad), 0x2908005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #2556 = RSQRTSSm
19158
  { 2557, 7,  1,  0,  938,  0|(1ULL<<MCID::MayLoad), 0x2900005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2557 = RSQRTSSm_Int
19159
  { 2558, 2,  1,  0,  933,  0, 0x2908005805ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #2558 = RSQRTSSr
19160
  { 2559, 3,  1,  0,  934,  0, 0x2900005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2559 = RSQRTSSr_Int
19161
  { 2560, 0,  0,  0,  605,  0, 0x4f00000001ULL, ImplicitList37, ImplicitList6, nullptr, -1 ,nullptr },  // Inst #2560 = SAHF
19162
  { 2561, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00000001ULL, ImplicitList6, ImplicitList4, nullptr, -1 ,nullptr },  // Inst #2561 = SALC
19163
  { 2562, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000009fULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2562 = SAR16m1
19164
  { 2563, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000009fULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2563 = SAR16mCL
19165
  { 2564, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004009fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2564 = SAR16mi
19166
  { 2565, 2,  1,  0,  448,  0, 0x6880000097ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2565 = SAR16r1
19167
  { 2566, 2,  1,  0,  654,  0, 0x6980000097ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2566 = SAR16rCL
19168
  { 2567, 3,  1,  0,  448,  0, 0x6080040097ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #2567 = SAR16ri
19169
  { 2568, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000011fULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2568 = SAR32m1
19170
  { 2569, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000011fULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2569 = SAR32mCL
19171
  { 2570, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004011fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2570 = SAR32mi
19172
  { 2571, 2,  1,  0,  448,  0, 0x6880000117ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2571 = SAR32r1
19173
  { 2572, 2,  1,  0,  654,  0, 0x6980000117ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2572 = SAR32rCL
19174
  { 2573, 3,  1,  0,  448,  0, 0x6080040117ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #2573 = SAR32ri
19175
  { 2574, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688002001fULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2574 = SAR64m1
19176
  { 2575, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698002001fULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2575 = SAR64mCL
19177
  { 2576, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608006001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2576 = SAR64mi
19178
  { 2577, 2,  1,  0,  448,  0, 0x6880020017ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2577 = SAR64r1
19179
  { 2578, 2,  1,  0,  654,  0, 0x6980020017ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2578 = SAR64rCL
19180
  { 2579, 3,  1,  0,  448,  0, 0x6080060017ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #2579 = SAR64ri
19181
  { 2580, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680000001fULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2580 = SAR8m1
19182
  { 2581, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x690000001fULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2581 = SAR8mCL
19183
  { 2582, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x600004001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2582 = SAR8mi
19184
  { 2583, 2,  1,  0,  448,  0, 0x6800000017ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2583 = SAR8r1
19185
  { 2584, 2,  1,  0,  654,  0, 0x6900000017ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2584 = SAR8rCL
19186
  { 2585, 3,  1,  0,  448,  0, 0x6000040017ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #2585 = SAR8ri
19187
  { 2586, 7,  1,  0,  473,  0|(1ULL<<MCID::MayLoad), 0x27ba0009806ULL, nullptr, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #2586 = SARX32rm
19188
  { 2587, 3,  1,  0,  462,  0, 0x27ba0009805ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #2587 = SARX32rr
19189
  { 2588, 7,  1,  0,  473,  0|(1ULL<<MCID::MayLoad), 0x2fba0009806ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #2588 = SARX64rm
19190
  { 2589, 3,  1,  0,  462,  0, 0x2fba0009805ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #2589 = SARX64rr
19191
  { 2590, 1,  0,  0,  5,  0, 0xe800c0081ULL, ImplicitList2, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #2590 = SBB16i16
19192
  { 2591, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c009bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2591 = SBB16mi
19193
  { 2592, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004009bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2592 = SBB16mi8
19194
  { 2593, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80000084ULL, ImplicitList6, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #2593 = SBB16mr
19195
  { 2594, 3,  1,  0,  614,  0, 0x40800c0093ULL, ImplicitList6, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #2594 = SBB16ri
19196
  { 2595, 3,  1,  0,  614,  0, 0x4180040093ULL, ImplicitList6, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #2595 = SBB16ri8
19197
  { 2596, 7,  1,  0,  615,  0|(1ULL<<MCID::MayLoad), 0xd80000086ULL, ImplicitList6, ImplicitList6, OperandInfo23, -1 ,nullptr },  // Inst #2596 = SBB16rm
19198
  { 2597, 3,  1,  0,  614,  0, 0xc80000083ULL, ImplicitList6, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #2597 = SBB16rr
19199
  { 2598, 3,  1,  0,  614,  0, 0xd80000085ULL, ImplicitList6, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #2598 = SBB16rr_REV
19200
  { 2599, 1,  0,  0,  5,  0, 0xe80140101ULL, ImplicitList7, ImplicitList7, OperandInfo2, -1 ,nullptr },  // Inst #2599 = SBB32i32
19201
  { 2600, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408014011bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2600 = SBB32mi
19202
  { 2601, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004011bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2601 = SBB32mi8
19203
  { 2602, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80000104ULL, ImplicitList6, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #2602 = SBB32mr
19204
  { 2603, 3,  1,  0,  614,  0, 0x4080140113ULL, ImplicitList6, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #2603 = SBB32ri
19205
  { 2604, 3,  1,  0,  614,  0, 0x4180040113ULL, ImplicitList6, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #2604 = SBB32ri8
19206
  { 2605, 7,  1,  0,  615,  0|(1ULL<<MCID::MayLoad), 0xd80000106ULL, ImplicitList6, ImplicitList6, OperandInfo27, -1 ,nullptr },  // Inst #2605 = SBB32rm
19207
  { 2606, 3,  1,  0,  614,  0, 0xc80000103ULL, ImplicitList6, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #2606 = SBB32rr
19208
  { 2607, 3,  1,  0,  614,  0, 0xd80000105ULL, ImplicitList6, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #2607 = SBB32rr_REV
19209
  { 2608, 1,  0,  0,  5,  0, 0xe801e0001ULL, ImplicitList8, ImplicitList8, OperandInfo2, -1 ,nullptr },  // Inst #2608 = SBB64i32
19210
  { 2609, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e001bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2609 = SBB64mi32
19211
  { 2610, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418006001bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2610 = SBB64mi8
19212
  { 2611, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80020004ULL, ImplicitList6, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #2611 = SBB64mr
19213
  { 2612, 3,  1,  0,  614,  0, 0x40801e0013ULL, ImplicitList6, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #2612 = SBB64ri32
19214
  { 2613, 3,  1,  0,  614,  0, 0x4180060013ULL, ImplicitList6, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #2613 = SBB64ri8
19215
  { 2614, 7,  1,  0,  615,  0|(1ULL<<MCID::MayLoad), 0xd80020006ULL, ImplicitList6, ImplicitList6, OperandInfo31, -1 ,nullptr },  // Inst #2614 = SBB64rm
19216
  { 2615, 3,  1,  0,  614,  0, 0xc80020003ULL, ImplicitList6, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #2615 = SBB64rr
19217
  { 2616, 3,  1,  0,  614,  0, 0xd80020005ULL, ImplicitList6, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #2616 = SBB64rr_REV
19218
  { 2617, 1,  0,  0,  5,  0, 0xe00040001ULL, ImplicitList1, ImplicitList1, OperandInfo2, -1 ,nullptr },  // Inst #2617 = SBB8i8
19219
  { 2618, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400004001bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2618 = SBB8mi
19220
  { 2619, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x410004001bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2619 = SBB8mi8
19221
  { 2620, 6,  0,  0,  616,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00000004ULL, ImplicitList6, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #2620 = SBB8mr
19222
  { 2621, 3,  1,  0,  614,  0, 0x4000040013ULL, ImplicitList6, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #2621 = SBB8ri
19223
  { 2622, 3,  1,  0,  614,  0, 0x4100040013ULL, ImplicitList6, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #2622 = SBB8ri8
19224
  { 2623, 7,  1,  0,  615,  0|(1ULL<<MCID::MayLoad), 0xd00000006ULL, ImplicitList6, ImplicitList6, OperandInfo35, -1 ,nullptr },  // Inst #2623 = SBB8rm
19225
  { 2624, 3,  1,  0,  614,  0, 0xc00000003ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2624 = SBB8rr
19226
  { 2625, 3,  1,  0,  614,  0, 0xd00000005ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2625 = SBB8rr_REV
19227
  { 2626, 1,  0,  0,  723,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5700000009ULL, ImplicitList74, ImplicitList75, OperandInfo148, -1 ,nullptr },  // Inst #2626 = SCASB
19228
  { 2627, 1,  0,  0,  723,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780000109ULL, ImplicitList76, ImplicitList75, OperandInfo148, -1 ,nullptr },  // Inst #2627 = SCASL
19229
  { 2628, 1,  0,  0,  723,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780020009ULL, ImplicitList77, ImplicitList75, OperandInfo148, -1 ,nullptr },  // Inst #2628 = SCASQ
19230
  { 2629, 1,  0,  0,  723,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780000089ULL, ImplicitList78, ImplicitList75, OperandInfo148, -1 ,nullptr },  // Inst #2629 = SCASW
19231
  { 2630, 2,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList11, ImplicitList79, OperandInfo51, -1 ,nullptr },  // Inst #2630 = SEG_ALLOCA_32
19232
  { 2631, 2,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList13, ImplicitList80, OperandInfo52, -1 ,nullptr },  // Inst #2631 = SEG_ALLOCA_64
19233
  { 2632, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2632 = SEH_EndPrologue
19234
  { 2633, 0,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2633 = SEH_Epilogue
19235
  { 2634, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #2634 = SEH_PushFrame
19236
  { 2635, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #2635 = SEH_PushReg
19237
  { 2636, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #2636 = SEH_SaveReg
19238
  { 2637, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #2637 = SEH_SaveXMM
19239
  { 2638, 2,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr },  // Inst #2638 = SEH_SetFrame
19240
  { 2639, 1,  0,  0,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #2639 = SEH_StackAlloc
19241
  { 2640, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x498000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2640 = SETAEm
19242
  { 2641, 1,  1,  0,  690,  0, 0x498000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2641 = SETAEr
19243
  { 2642, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4b8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2642 = SETAm
19244
  { 2643, 1,  1,  0,  690,  0, 0x4b8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2643 = SETAr
19245
  { 2644, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4b0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2644 = SETBEm
19246
  { 2645, 1,  1,  0,  690,  0, 0x4b0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2645 = SETBEr
19247
  { 2646, 1,  1,  0,  11, 0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList6, ImplicitList6, OperandInfo82, -1 ,nullptr },  // Inst #2646 = SETB_C16r
19248
  { 2647, 1,  1,  0,  11, 0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList6, ImplicitList6, OperandInfo83, -1 ,nullptr },  // Inst #2647 = SETB_C32r
19249
  { 2648, 1,  1,  0,  11, 0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList6, ImplicitList6, OperandInfo85, -1 ,nullptr },  // Inst #2648 = SETB_C64r
19250
  { 2649, 1,  1,  0,  11, 0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList6, ImplicitList6, OperandInfo134, -1 ,nullptr },  // Inst #2649 = SETB_C8r
19251
  { 2650, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x490000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2650 = SETBm
19252
  { 2651, 1,  1,  0,  690,  0, 0x490000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2651 = SETBr
19253
  { 2652, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4a0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2652 = SETEm
19254
  { 2653, 1,  1,  0,  690,  0, 0x4a0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2653 = SETEr
19255
  { 2654, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4e8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2654 = SETGEm
19256
  { 2655, 1,  1,  0,  690,  0, 0x4e8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2655 = SETGEr
19257
  { 2656, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4f8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2656 = SETGm
19258
  { 2657, 1,  1,  0,  690,  0, 0x4f8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2657 = SETGr
19259
  { 2658, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4f0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2658 = SETLEm
19260
  { 2659, 1,  1,  0,  690,  0, 0x4f0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2659 = SETLEr
19261
  { 2660, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4e0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2660 = SETLm
19262
  { 2661, 1,  1,  0,  690,  0, 0x4e0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2661 = SETLr
19263
  { 2662, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4a8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2662 = SETNEm
19264
  { 2663, 1,  1,  0,  690,  0, 0x4a8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2663 = SETNEr
19265
  { 2664, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x488000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2664 = SETNOm
19266
  { 2665, 1,  1,  0,  690,  0, 0x488000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2665 = SETNOr
19267
  { 2666, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4d8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2666 = SETNPm
19268
  { 2667, 1,  1,  0,  690,  0, 0x4d8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2667 = SETNPr
19269
  { 2668, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4c8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2668 = SETNSm
19270
  { 2669, 1,  1,  0,  690,  0, 0x4c8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2669 = SETNSr
19271
  { 2670, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x480000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2670 = SETOm
19272
  { 2671, 1,  1,  0,  690,  0, 0x480000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2671 = SETOr
19273
  { 2672, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4d0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2672 = SETPm
19274
  { 2673, 1,  1,  0,  690,  0, 0x4d0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2673 = SETPr
19275
  { 2674, 5,  0,  0,  691,  0|(1ULL<<MCID::MayStore), 0x4c0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2674 = SETSm
19276
  { 2675, 1,  1,  0,  690,  0, 0x4c0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr },  // Inst #2675 = SETSr
19277
  { 2676, 0,  0,  0,  477,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700004858ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2676 = SFENCE
19278
  { 2677, 5,  1,  0,  478,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004098ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2677 = SGDT16m
19279
  { 2678, 5,  1,  0,  478,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004118ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2678 = SGDT32m
19280
  { 2679, 5,  1,  0,  478,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2679 = SGDT64m
19281
  { 2680, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6480008006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2680 = SHA1MSG1rm
19282
  { 2681, 3,  1,  0,  0,  0, 0x6480008005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2681 = SHA1MSG1rr
19283
  { 2682, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6500008006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2682 = SHA1MSG2rm
19284
  { 2683, 3,  1,  0,  0,  0, 0x6500008005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2683 = SHA1MSG2rr
19285
  { 2684, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6400008006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2684 = SHA1NEXTErm
19286
  { 2685, 3,  1,  0,  0,  0, 0x6400008005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2685 = SHA1NEXTErr
19287
  { 2686, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x660004c006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #2686 = SHA1RNDS4rmi
19288
  { 2687, 4,  1,  0,  0,  0, 0x660004c005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #2687 = SHA1RNDS4rri
19289
  { 2688, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6600008006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2688 = SHA256MSG1rm
19290
  { 2689, 3,  1,  0,  0,  0, 0x6600008005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2689 = SHA256MSG1rr
19291
  { 2690, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6680008006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2690 = SHA256MSG2rm
19292
  { 2691, 3,  1,  0,  0,  0, 0x6680008005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2691 = SHA256MSG2rr
19293
  { 2692, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6580008006ULL, ImplicitList15, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2692 = SHA256RNDS2rm
19294
  { 2693, 3,  1,  0,  0,  0, 0x6580008005ULL, ImplicitList15, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2693 = SHA256RNDS2rr
19295
  { 2694, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000009cULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2694 = SHL16m1
19296
  { 2695, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000009cULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2695 = SHL16mCL
19297
  { 2696, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004009cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2696 = SHL16mi
19298
  { 2697, 2,  1,  0,  448,  0, 0x6880000094ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2697 = SHL16r1
19299
  { 2698, 2,  1,  0,  654,  0, 0x6980000094ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2698 = SHL16rCL
19300
  { 2699, 3,  1,  0,  448,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6080040094ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #2699 = SHL16ri
19301
  { 2700, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000011cULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2700 = SHL32m1
19302
  { 2701, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000011cULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2701 = SHL32mCL
19303
  { 2702, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004011cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2702 = SHL32mi
19304
  { 2703, 2,  1,  0,  448,  0, 0x6880000114ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2703 = SHL32r1
19305
  { 2704, 2,  1,  0,  654,  0, 0x6980000114ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2704 = SHL32rCL
19306
  { 2705, 3,  1,  0,  448,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6080040114ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #2705 = SHL32ri
19307
  { 2706, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688002001cULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2706 = SHL64m1
19308
  { 2707, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698002001cULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2707 = SHL64mCL
19309
  { 2708, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608006001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2708 = SHL64mi
19310
  { 2709, 2,  1,  0,  448,  0, 0x6880020014ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2709 = SHL64r1
19311
  { 2710, 2,  1,  0,  654,  0, 0x6980020014ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2710 = SHL64rCL
19312
  { 2711, 3,  1,  0,  448,  0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6080060014ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #2711 = SHL64ri
19313
  { 2712, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680000001cULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2712 = SHL8m1
19314
  { 2713, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x690000001cULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2713 = SHL8mCL
19315
  { 2714, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x600004001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2714 = SHL8mi
19316
  { 2715, 2,  1,  0,  448,  0, 0x6800000014ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2715 = SHL8r1
19317
  { 2716, 2,  1,  0,  654,  0, 0x6900000014ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2716 = SHL8rCL
19318
  { 2717, 3,  1,  0,  448,  0, 0x6000040014ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #2717 = SHL8ri
19319
  { 2718, 6,  0,  0,  676,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280004084ULL, ImplicitList62, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #2718 = SHLD16mrCL
19320
  { 2719, 7,  0,  0,  667,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200044084ULL, nullptr, ImplicitList6, OperandInfo263, -1 ,nullptr },  // Inst #2719 = SHLD16mri8
19321
  { 2720, 3,  1,  0,  670,  0, 0x5280004083ULL, ImplicitList62, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #2720 = SHLD16rrCL
19322
  { 2721, 4,  1,  0,  664,  0|(1ULL<<MCID::Commutable), 0x5200044083ULL, nullptr, ImplicitList6, OperandInfo264, -1 ,nullptr },  // Inst #2721 = SHLD16rri8
19323
  { 2722, 6,  0,  0,  677,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280004104ULL, ImplicitList62, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #2722 = SHLD32mrCL
19324
  { 2723, 7,  0,  0,  668,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200044104ULL, nullptr, ImplicitList6, OperandInfo265, -1 ,nullptr },  // Inst #2723 = SHLD32mri8
19325
  { 2724, 3,  1,  0,  671,  0, 0x5280004103ULL, ImplicitList62, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #2724 = SHLD32rrCL
19326
  { 2725, 4,  1,  0,  665,  0|(1ULL<<MCID::Commutable), 0x5200044103ULL, nullptr, ImplicitList6, OperandInfo266, -1 ,nullptr },  // Inst #2725 = SHLD32rri8
19327
  { 2726, 6,  0,  0,  678,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280024004ULL, ImplicitList62, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #2726 = SHLD64mrCL
19328
  { 2727, 7,  0,  0,  669,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200064004ULL, nullptr, ImplicitList6, OperandInfo267, -1 ,nullptr },  // Inst #2727 = SHLD64mri8
19329
  { 2728, 3,  1,  0,  672,  0, 0x5280024003ULL, ImplicitList62, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #2728 = SHLD64rrCL
19330
  { 2729, 4,  1,  0,  666,  0|(1ULL<<MCID::Commutable), 0x5200064003ULL, nullptr, ImplicitList6, OperandInfo268, -1 ,nullptr },  // Inst #2729 = SHLD64rri8
19331
  { 2730, 7,  1,  0,  473,  0|(1ULL<<MCID::MayLoad), 0x27ba0009006ULL, nullptr, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #2730 = SHLX32rm
19332
  { 2731, 3,  1,  0,  462,  0, 0x27ba0009005ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #2731 = SHLX32rr
19333
  { 2732, 7,  1,  0,  473,  0|(1ULL<<MCID::MayLoad), 0x2fba0009006ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #2732 = SHLX64rm
19334
  { 2733, 3,  1,  0,  462,  0, 0x2fba0009005ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #2733 = SHLX64rr
19335
  { 2734, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000009dULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2734 = SHR16m1
19336
  { 2735, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000009dULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2735 = SHR16mCL
19337
  { 2736, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004009dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2736 = SHR16mi
19338
  { 2737, 2,  1,  0,  448,  0, 0x6880000095ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2737 = SHR16r1
19339
  { 2738, 2,  1,  0,  654,  0, 0x6980000095ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr },  // Inst #2738 = SHR16rCL
19340
  { 2739, 3,  1,  0,  448,  0, 0x6080040095ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #2739 = SHR16ri
19341
  { 2740, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000011dULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2740 = SHR32m1
19342
  { 2741, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000011dULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2741 = SHR32mCL
19343
  { 2742, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004011dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2742 = SHR32mi
19344
  { 2743, 2,  1,  0,  448,  0, 0x6880000115ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2743 = SHR32r1
19345
  { 2744, 2,  1,  0,  654,  0, 0x6980000115ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr },  // Inst #2744 = SHR32rCL
19346
  { 2745, 3,  1,  0,  448,  0, 0x6080040115ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #2745 = SHR32ri
19347
  { 2746, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688002001dULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2746 = SHR64m1
19348
  { 2747, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698002001dULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2747 = SHR64mCL
19349
  { 2748, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608006001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2748 = SHR64mi
19350
  { 2749, 2,  1,  0,  448,  0, 0x6880020015ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2749 = SHR64r1
19351
  { 2750, 2,  1,  0,  654,  0, 0x6980020015ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr },  // Inst #2750 = SHR64rCL
19352
  { 2751, 3,  1,  0,  448,  0, 0x6080060015ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #2751 = SHR64ri
19353
  { 2752, 5,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680000001dULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2752 = SHR8m1
19354
  { 2753, 5,  0,  0,  655,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x690000001dULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr },  // Inst #2753 = SHR8mCL
19355
  { 2754, 6,  0,  0,  653,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x600004001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2754 = SHR8mi
19356
  { 2755, 2,  1,  0,  448,  0, 0x6800000015ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2755 = SHR8r1
19357
  { 2756, 2,  1,  0,  654,  0, 0x6900000015ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr },  // Inst #2756 = SHR8rCL
19358
  { 2757, 3,  1,  0,  448,  0, 0x6000040015ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #2757 = SHR8ri
19359
  { 2758, 6,  0,  0,  676,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680004084ULL, ImplicitList62, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #2758 = SHRD16mrCL
19360
  { 2759, 7,  0,  0,  667,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600044084ULL, nullptr, ImplicitList6, OperandInfo263, -1 ,nullptr },  // Inst #2759 = SHRD16mri8
19361
  { 2760, 3,  1,  0,  673,  0, 0x5680004083ULL, ImplicitList62, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #2760 = SHRD16rrCL
19362
  { 2761, 4,  1,  0,  664,  0|(1ULL<<MCID::Commutable), 0x5600044083ULL, nullptr, ImplicitList6, OperandInfo264, -1 ,nullptr },  // Inst #2761 = SHRD16rri8
19363
  { 2762, 6,  0,  0,  677,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680004104ULL, ImplicitList62, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #2762 = SHRD32mrCL
19364
  { 2763, 7,  0,  0,  668,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600044104ULL, nullptr, ImplicitList6, OperandInfo265, -1 ,nullptr },  // Inst #2763 = SHRD32mri8
19365
  { 2764, 3,  1,  0,  674,  0, 0x5680004103ULL, ImplicitList62, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #2764 = SHRD32rrCL
19366
  { 2765, 4,  1,  0,  665,  0|(1ULL<<MCID::Commutable), 0x5600044103ULL, nullptr, ImplicitList6, OperandInfo266, -1 ,nullptr },  // Inst #2765 = SHRD32rri8
19367
  { 2766, 6,  0,  0,  678,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680024004ULL, ImplicitList62, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #2766 = SHRD64mrCL
19368
  { 2767, 7,  0,  0,  669,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600064004ULL, nullptr, ImplicitList6, OperandInfo267, -1 ,nullptr },  // Inst #2767 = SHRD64mri8
19369
  { 2768, 3,  1,  0,  675,  0, 0x5680024003ULL, ImplicitList62, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #2768 = SHRD64rrCL
19370
  { 2769, 4,  1,  0,  666,  0|(1ULL<<MCID::Commutable), 0x5600064003ULL, nullptr, ImplicitList6, OperandInfo268, -1 ,nullptr },  // Inst #2769 = SHRD64rri8
19371
  { 2770, 7,  1,  0,  473,  0|(1ULL<<MCID::MayLoad), 0x27ba000a006ULL, nullptr, nullptr, OperandInfo64, -1 ,nullptr },  // Inst #2770 = SHRX32rm
19372
  { 2771, 3,  1,  0,  462,  0, 0x27ba000a005ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr },  // Inst #2771 = SHRX32rr
19373
  { 2772, 7,  1,  0,  473,  0|(1ULL<<MCID::MayLoad), 0x2fba000a006ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr },  // Inst #2772 = SHRX64rm
19374
  { 2773, 3,  1,  0,  462,  0, 0x2fba000a005ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr },  // Inst #2773 = SHRX64rr
19375
  { 2774, 8,  1,  0,  491,  0|(1ULL<<MCID::MayLoad), 0x6310045006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #2774 = SHUFPDrmi
19376
  { 2775, 4,  1,  0,  492,  0, 0x6310045005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #2775 = SHUFPDrri
19377
  { 2776, 8,  1,  0,  491,  0|(1ULL<<MCID::MayLoad), 0x6308044806ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr },  // Inst #2776 = SHUFPSrmi
19378
  { 2777, 4,  1,  0,  492,  0, 0x6308044805ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr },  // Inst #2777 = SHUFPSrri
19379
  { 2778, 5,  1,  0,  493,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004099ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2778 = SIDT16m
19380
  { 2779, 5,  1,  0,  56, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004119ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2779 = SIDT32m
19381
  { 2780, 5,  1,  0,  56, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2780 = SIDT64m
19382
  { 2781, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005eULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr },  // Inst #2781 = SIN_F
19383
  { 2782, 2,  1,  0,  0,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr },  // Inst #2782 = SIN_Fp32
19384
  { 2783, 2,  1,  0,  0,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr },  // Inst #2783 = SIN_Fp64
19385
  { 2784, 2,  1,  0,  0,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr },  // Inst #2784 = SIN_Fp80
19386
  { 2785, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403eULL, ImplicitList9, nullptr, nullptr, -1 ,nullptr },  // Inst #2785 = SKINIT
19387
  { 2786, 5,  1,  0,  494,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2786 = SLDT16m
19388
  { 2787, 1,  1,  0,  494,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4090ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #2787 = SLDT16r
19389
  { 2788, 1,  1,  0,  494,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4110ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #2788 = SLDT32r
19390
  { 2789, 5,  1,  0,  494,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x24018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2789 = SLDT64m
19391
  { 2790, 1,  1,  0,  494,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x24010ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #2790 = SLDT64r
19392
  { 2791, 5,  1,  0,  495,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000401cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2791 = SMSW16m
19393
  { 2792, 1,  1,  0,  495,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004094ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #2792 = SMSW16r
19394
  { 2793, 1,  1,  0,  495,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004114ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #2793 = SMSW32r
19395
  { 2794, 1,  1,  0,  495,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80024014ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #2794 = SMSW64r
19396
  { 2795, 6,  1,  0,  496,  0|(1ULL<<MCID::MayLoad), 0x2890005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2795 = SQRTPDm
19397
  { 2796, 2,  1,  0,  497,  0, 0x2890005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2796 = SQRTPDr
19398
  { 2797, 6,  1,  0,  498,  0|(1ULL<<MCID::MayLoad), 0x2888004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #2797 = SQRTPSm
19399
  { 2798, 2,  1,  0,  499,  0, 0x2888004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #2798 = SQRTPSr
19400
  { 2799, 6,  1,  0,  500,  0|(1ULL<<MCID::MayLoad), 0x2890006006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #2799 = SQRTSDm
19401
  { 2800, 7,  1,  0,  501,  0|(1ULL<<MCID::MayLoad), 0x2880006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2800 = SQRTSDm_Int
19402
  { 2801, 2,  1,  0,  502,  0, 0x2890006005ULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr },  // Inst #2801 = SQRTSDr
19403
  { 2802, 3,  1,  0,  501,  0, 0x2880006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2802 = SQRTSDr_Int
19404
  { 2803, 6,  1,  0,  503,  0|(1ULL<<MCID::MayLoad), 0x2888005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #2803 = SQRTSSm
19405
  { 2804, 7,  1,  0,  501,  0|(1ULL<<MCID::MayLoad), 0x2880005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2804 = SQRTSSm_Int
19406
  { 2805, 2,  1,  0,  504,  0, 0x2888005805ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr },  // Inst #2805 = SQRTSSr
19407
  { 2806, 3,  1,  0,  501,  0, 0x2880005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2806 = SQRTSSr_Int
19408
  { 2807, 0,  0,  0,  505,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005aULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr },  // Inst #2807 = SQRT_F
19409
  { 2808, 2,  1,  0,  505,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr },  // Inst #2808 = SQRT_Fp32
19410
  { 2809, 2,  1,  0,  505,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr },  // Inst #2809 = SQRT_Fp64
19411
  { 2810, 2,  1,  0,  505,  0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr },  // Inst #2810 = SQRT_Fp80
19412
  { 2811, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1b00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2811 = SS_PREFIX
19413
  { 2812, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000402bULL, nullptr, ImplicitList6, nullptr, -1 ,nullptr },  // Inst #2812 = STAC
19414
  { 2813, 0,  0,  0,  506,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c80000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2813 = STC
19415
  { 2814, 0,  0,  0,  693,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7e80000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2814 = STD
19416
  { 2815, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403cULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2815 = STGI
19417
  { 2816, 0,  0,  0,  508,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d80000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2816 = STI
19418
  { 2817, 5,  0,  0,  946,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000401bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2817 = STMXCSR
19419
  { 2818, 1,  1,  0,  719,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5500000009ULL, ImplicitList74, ImplicitList32, OperandInfo148, -1 ,nullptr },  // Inst #2818 = STOSB
19420
  { 2819, 1,  1,  0,  719,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580000109ULL, ImplicitList76, ImplicitList32, OperandInfo148, -1 ,nullptr },  // Inst #2819 = STOSL
19421
  { 2820, 1,  1,  0,  719,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580020009ULL, ImplicitList81, ImplicitList45, OperandInfo148, -1 ,nullptr },  // Inst #2820 = STOSQ
19422
  { 2821, 1,  1,  0,  719,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580000089ULL, ImplicitList78, ImplicitList32, OperandInfo148, -1 ,nullptr },  // Inst #2821 = STOSW
19423
  { 2822, 1,  1,  0,  511,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4091ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #2822 = STR16r
19424
  { 2823, 1,  1,  0,  511,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4111ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #2823 = STR32r
19425
  { 2824, 1,  1,  0,  511,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x24011ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #2824 = STR64r
19426
  { 2825, 5,  1,  0,  511,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #2825 = STRm
19427
  { 2826, 5,  0,  0,  202,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001aULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2826 = ST_F32m
19428
  { 2827, 5,  0,  0,  202,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e8000001aULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2827 = ST_F64m
19429
  { 2828, 1,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000013ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2828 = ST_FCOMPST0r
19430
  { 2829, 1,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000012ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2829 = ST_FCOMPST0r_alt
19431
  { 2830, 1,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000012ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2830 = ST_FCOMST0r
19432
  { 2831, 5,  0,  0,  202,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001bULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2831 = ST_FP32m
19433
  { 2832, 5,  0,  0,  202,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e8000001bULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2832 = ST_FP64m
19434
  { 2833, 5,  0,  0,  741,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d8000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2833 = ST_FP80m
19435
  { 2834, 1,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000013ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2834 = ST_FPNCEST0r
19436
  { 2835, 1,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000012ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2835 = ST_FPST0r
19437
  { 2836, 1,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000013ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2836 = ST_FPST0r_alt
19438
  { 2837, 1,  0,  0,  740,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000013ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #2837 = ST_FPrr
19439
  { 2838, 1,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000011ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2838 = ST_FXCHST0r
19440
  { 2839, 1,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000011ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2839 = ST_FXCHST0r_alt
19441
  { 2840, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr },  // Inst #2840 = ST_Fp32m
19442
  { 2841, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #2841 = ST_Fp64m
19443
  { 2842, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #2842 = ST_Fp64m32
19444
  { 2843, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr },  // Inst #2843 = ST_Fp80m32
19445
  { 2844, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr },  // Inst #2844 = ST_Fp80m64
19446
  { 2845, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr },  // Inst #2845 = ST_FpP32m
19447
  { 2846, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #2846 = ST_FpP64m
19448
  { 2847, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr },  // Inst #2847 = ST_FpP64m32
19449
  { 2848, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr },  // Inst #2848 = ST_FpP80m
19450
  { 2849, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr },  // Inst #2849 = ST_FpP80m32
19451
  { 2850, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr },  // Inst #2850 = ST_FpP80m64
19452
  { 2851, 1,  0,  0,  740,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000012ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #2851 = ST_Frr
19453
  { 2852, 1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x16800c0081ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #2852 = SUB16i16
19454
  { 2853, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c009dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2853 = SUB16mi
19455
  { 2854, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004009dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2854 = SUB16mi8
19456
  { 2855, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #2855 = SUB16mr
19457
  { 2856, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x40800c0095ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #2856 = SUB16ri
19458
  { 2857, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x4180040095ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #2857 = SUB16ri8
19459
  { 2858, 7,  1,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580000086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr },  // Inst #2858 = SUB16rm
19460
  { 2859, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x1480000083ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #2859 = SUB16rr
19461
  { 2860, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x1580000085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #2860 = SUB16rr_REV
19462
  { 2861, 1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1680140101ULL, ImplicitList9, ImplicitList7, OperandInfo2, -1 ,nullptr },  // Inst #2861 = SUB32i32
19463
  { 2862, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408014011dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2862 = SUB32mi
19464
  { 2863, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004011dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2863 = SUB32mi8
19465
  { 2864, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #2864 = SUB32mr
19466
  { 2865, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x4080140115ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #2865 = SUB32ri
19467
  { 2866, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x4180040115ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #2866 = SUB32ri8
19468
  { 2867, 7,  1,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580000106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr },  // Inst #2867 = SUB32rm
19469
  { 2868, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x1480000103ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #2868 = SUB32rr
19470
  { 2869, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x1580000105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #2869 = SUB32rr_REV
19471
  { 2870, 1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x16801e0001ULL, ImplicitList10, ImplicitList8, OperandInfo2, -1 ,nullptr },  // Inst #2870 = SUB64i32
19472
  { 2871, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2871 = SUB64mi32
19473
  { 2872, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418006001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2872 = SUB64mi8
19474
  { 2873, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #2873 = SUB64mr
19475
  { 2874, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x40801e0015ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #2874 = SUB64ri32
19476
  { 2875, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x4180060015ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #2875 = SUB64ri8
19477
  { 2876, 7,  1,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580020006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr },  // Inst #2876 = SUB64rm
19478
  { 2877, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x1480020003ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #2877 = SUB64rr
19479
  { 2878, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x1580020005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #2878 = SUB64rr_REV
19480
  { 2879, 1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x1600040001ULL, ImplicitList4, ImplicitList1, OperandInfo2, -1 ,nullptr },  // Inst #2879 = SUB8i8
19481
  { 2880, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400004001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2880 = SUB8mi
19482
  { 2881, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x410004001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2881 = SUB8mi8
19483
  { 2882, 6,  0,  0,  613,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1400000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #2882 = SUB8mr
19484
  { 2883, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x4000040015ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #2883 = SUB8ri
19485
  { 2884, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x4100040015ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #2884 = SUB8ri8
19486
  { 2885, 7,  1,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1500000006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr },  // Inst #2885 = SUB8rm
19487
  { 2886, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x1400000003ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2886 = SUB8rr
19488
  { 2887, 3,  1,  0,  9,  0|(1ULL<<MCID::Compare), 0x1500000005ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #2887 = SUB8rr_REV
19489
  { 2888, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x2e10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2888 = SUBPDrm
19490
  { 2889, 3,  1,  0,  14, 0, 0x2e10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2889 = SUBPDrr
19491
  { 2890, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x2e08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2890 = SUBPSrm
19492
  { 2891, 3,  1,  0,  16, 0, 0x2e08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2891 = SUBPSrr
19493
  { 2892, 5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2892 = SUBR_F32m
19494
  { 2893, 5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2893 = SUBR_F64m
19495
  { 2894, 5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2894 = SUBR_FI16m
19496
  { 2895, 5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2895 = SUBR_FI32m
19497
  { 2896, 1,  0,  0,  24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000014ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2896 = SUBR_FPrST0
19498
  { 2897, 1,  0,  0,  24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000015ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2897 = SUBR_FST0r
19499
  { 2898, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #2898 = SUBR_Fp32m
19500
  { 2899, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #2899 = SUBR_Fp64m
19501
  { 2900, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #2900 = SUBR_Fp64m32
19502
  { 2901, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #2901 = SUBR_Fp80m32
19503
  { 2902, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #2902 = SUBR_Fp80m64
19504
  { 2903, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #2903 = SUBR_FpI16m32
19505
  { 2904, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #2904 = SUBR_FpI16m64
19506
  { 2905, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #2905 = SUBR_FpI16m80
19507
  { 2906, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #2906 = SUBR_FpI32m32
19508
  { 2907, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #2907 = SUBR_FpI32m64
19509
  { 2908, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #2908 = SUBR_FpI32m80
19510
  { 2909, 1,  0,  0,  24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000014ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2909 = SUBR_FrST0
19511
  { 2910, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x2e10006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr },  // Inst #2910 = SUBSDrm
19512
  { 2911, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x2e10006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2911 = SUBSDrm_Int
19513
  { 2912, 3,  1,  0,  18, 0, 0x2e10006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr },  // Inst #2912 = SUBSDrr
19514
  { 2913, 3,  1,  0,  18, 0, 0x2e10006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2913 = SUBSDrr_Int
19515
  { 2914, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x2e08005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr },  // Inst #2914 = SUBSSrm
19516
  { 2915, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x2e08005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #2915 = SUBSSrm_Int
19517
  { 2916, 3,  1,  0,  20, 0, 0x2e08005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr },  // Inst #2916 = SUBSSrr
19518
  { 2917, 3,  1,  0,  20, 0, 0x2e08005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #2917 = SUBSSrr_Int
19519
  { 2918, 5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001cULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2918 = SUB_F32m
19520
  { 2919, 5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001cULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2919 = SUB_F64m
19521
  { 2920, 5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001cULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2920 = SUB_FI16m
19522
  { 2921, 5,  0,  0,  23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001cULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr },  // Inst #2921 = SUB_FI32m
19523
  { 2922, 1,  0,  0,  24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000015ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2922 = SUB_FPrST0
19524
  { 2923, 1,  0,  0,  24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000014ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2923 = SUB_FST0r
19525
  { 2924, 3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo45, -1 ,nullptr },  // Inst #2924 = SUB_Fp32
19526
  { 2925, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #2925 = SUB_Fp32m
19527
  { 2926, 3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo47, -1 ,nullptr },  // Inst #2926 = SUB_Fp64
19528
  { 2927, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #2927 = SUB_Fp64m
19529
  { 2928, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #2928 = SUB_Fp64m32
19530
  { 2929, 3,  1,  0,  0,  0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo49, -1 ,nullptr },  // Inst #2929 = SUB_Fp80
19531
  { 2930, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #2930 = SUB_Fp80m32
19532
  { 2931, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #2931 = SUB_Fp80m64
19533
  { 2932, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #2932 = SUB_FpI16m32
19534
  { 2933, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #2933 = SUB_FpI16m64
19535
  { 2934, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #2934 = SUB_FpI16m80
19536
  { 2935, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr },  // Inst #2935 = SUB_FpI32m32
19537
  { 2936, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr },  // Inst #2936 = SUB_FpI32m64
19538
  { 2937, 7,  1,  0,  23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr },  // Inst #2937 = SUB_FpI32m80
19539
  { 2938, 1,  0,  0,  24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000015ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr },  // Inst #2938 = SUB_FrST0
19540
  { 2939, 0,  0,  0,  514,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004058ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2939 = SWAPGS
19541
  { 2940, 0,  0,  0,  515,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x280004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2940 = SYSCALL
19542
  { 2941, 0,  0,  0,  516,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a00004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2941 = SYSENTER
19543
  { 2942, 0,  0,  0,  516,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a80004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2942 = SYSEXIT
19544
  { 2943, 0,  0,  0,  516,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a80024001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2943 = SYSEXIT64
19545
  { 2944, 0,  0,  0,  515,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x380004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2944 = SYSRET
19546
  { 2945, 0,  0,  0,  515,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x380024001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2945 = SYSRET64
19547
  { 2946, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100c001481fULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #2946 = T1MSKC32rm
19548
  { 2947, 2,  1,  0,  0,  0, 0x100c0014817ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #2947 = T1MSKC32rr
19549
  { 2948, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x180c001481fULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #2948 = T1MSKC64rm
19550
  { 2949, 2,  1,  0,  0,  0, 0x180c0014817ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #2949 = T1MSKC64rr
19551
  { 2950, 1,  0,  0,  517,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7480180001ULL, ImplicitList11, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #2950 = TAILJMPd
19552
  { 2951, 1,  0,  0,  211,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x7480180001ULL, ImplicitList13, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #2951 = TAILJMPd64
19553
  { 2952, 1,  0,  0,  211,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x74801a0001ULL, ImplicitList13, nullptr, OperandInfo84, -1 ,nullptr },  // Inst #2952 = TAILJMPd64_REX
19554
  { 2953, 5,  0,  0,  209,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000001cULL, ImplicitList11, nullptr, OperandInfo269, -1 ,nullptr },  // Inst #2953 = TAILJMPm
19555
  { 2954, 5,  0,  0,  518,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000001cULL, ImplicitList13, nullptr, OperandInfo269, -1 ,nullptr },  // Inst #2954 = TAILJMPm64
19556
  { 2955, 5,  0,  0,  518,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8002001cULL, ImplicitList13, nullptr, OperandInfo269, -1 ,nullptr },  // Inst #2955 = TAILJMPm64_REX
19557
  { 2956, 1,  0,  0,  519,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80000014ULL, ImplicitList11, nullptr, OperandInfo270, -1 ,nullptr },  // Inst #2956 = TAILJMPr
19558
  { 2957, 1,  0,  0,  518,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80000014ULL, ImplicitList13, nullptr, OperandInfo270, -1 ,nullptr },  // Inst #2957 = TAILJMPr64
19559
  { 2958, 1,  0,  0,  518,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80020014ULL, ImplicitList13, nullptr, OperandInfo270, -1 ,nullptr },  // Inst #2958 = TAILJMPr64_REX
19560
  { 2959, 2,  0,  0,  200,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList11, nullptr, OperandInfo271, -1 ,nullptr },  // Inst #2959 = TCRETURNdi
19561
  { 2960, 2,  0,  0,  520,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList13, nullptr, OperandInfo271, -1 ,nullptr },  // Inst #2960 = TCRETURNdi64
19562
  { 2961, 6,  0,  0,  200,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList11, nullptr, OperandInfo272, -1 ,nullptr },  // Inst #2961 = TCRETURNmi
19563
  { 2962, 6,  0,  0,  520,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList13, nullptr, OperandInfo272, -1 ,nullptr },  // Inst #2962 = TCRETURNmi64
19564
  { 2963, 2,  0,  0,  200,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList11, nullptr, OperandInfo273, -1 ,nullptr },  // Inst #2963 = TCRETURNri
19565
  { 2964, 2,  0,  0,  520,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList13, nullptr, OperandInfo273, -1 ,nullptr },  // Inst #2964 = TCRETURNri64
19566
  { 2965, 1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x54800c0081ULL, ImplicitList3, ImplicitList6, OperandInfo2, -1 ,nullptr },  // Inst #2965 = TEST16i16
19567
  { 2966, 6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b800c0098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2966 = TEST16mi
19568
  { 2967, 2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x7b800c0090ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr },  // Inst #2967 = TEST16ri
19569
  { 2968, 6,  0,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280000086ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr },  // Inst #2968 = TEST16rm
19570
  { 2969, 2,  0,  0,  9,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4280000083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #2969 = TEST16rr
19571
  { 2970, 1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x5480140101ULL, ImplicitList9, ImplicitList6, OperandInfo2, -1 ,nullptr },  // Inst #2970 = TEST32i32
19572
  { 2971, 6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b80140118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2971 = TEST32mi
19573
  { 2972, 2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x7b80140110ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr },  // Inst #2972 = TEST32ri
19574
  { 2973, 6,  0,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280000106ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #2973 = TEST32rm
19575
  { 2974, 2,  0,  0,  9,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4280000103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #2974 = TEST32rr
19576
  { 2975, 1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x54801e0001ULL, ImplicitList10, ImplicitList6, OperandInfo2, -1 ,nullptr },  // Inst #2975 = TEST64i32
19577
  { 2976, 6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b801e0018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2976 = TEST64mi32
19578
  { 2977, 2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x7b801e0010ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr },  // Inst #2977 = TEST64ri32
19579
  { 2978, 6,  0,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280020006ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #2978 = TEST64rm
19580
  { 2979, 2,  0,  0,  9,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4280020003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #2979 = TEST64rr
19581
  { 2980, 1,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x5400040001ULL, ImplicitList4, ImplicitList6, OperandInfo2, -1 ,nullptr },  // Inst #2980 = TEST8i8
19582
  { 2981, 6,  0,  0,  10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b00040018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #2981 = TEST8mi
19583
  { 2982, 2,  0,  0,  9,  0|(1ULL<<MCID::Compare), 0x7b00040010ULL, nullptr, ImplicitList6, OperandInfo106, -1 ,nullptr },  // Inst #2982 = TEST8ri
19584
  { 2983, 2,  0,  0,  9,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList6, OperandInfo274, -1 ,nullptr },  // Inst #2983 = TEST8ri_NOREX
19585
  { 2984, 6,  0,  0,  12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4200000006ULL, nullptr, ImplicitList6, OperandInfo19, -1 ,nullptr },  // Inst #2984 = TEST8rm
19586
  { 2985, 2,  0,  0,  9,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4200000003ULL, nullptr, ImplicitList6, OperandInfo107, -1 ,nullptr },  // Inst #2985 = TEST8rr
19587
  { 2986, 5,  0,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList11, ImplicitList82, OperandInfo43, -1 ,nullptr },  // Inst #2986 = TLSCall_32
19588
  { 2987, 5,  0,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList83, ImplicitList8, OperandInfo43, -1 ,nullptr },  // Inst #2987 = TLSCall_64
19589
  { 2988, 5,  0,  0,  0,  0, 0x0ULL, ImplicitList11, ImplicitList84, OperandInfo43, -1 ,nullptr },  // Inst #2988 = TLS_addr32
19590
  { 2989, 5,  0,  0,  0,  0, 0x0ULL, ImplicitList13, ImplicitList85, OperandInfo43, -1 ,nullptr },  // Inst #2989 = TLS_addr64
19591
  { 2990, 5,  0,  0,  0,  0, 0x0ULL, ImplicitList11, ImplicitList84, OperandInfo43, -1 ,nullptr },  // Inst #2990 = TLS_base_addr32
19592
  { 2991, 5,  0,  0,  0,  0, 0x0ULL, ImplicitList13, ImplicitList85, OperandInfo43, -1 ,nullptr },  // Inst #2991 = TLS_base_addr64
19593
  { 2992, 0,  0,  0,  56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x580004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #2992 = TRAP
19594
  { 2993, 0,  0,  0,  768,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000044ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr },  // Inst #2993 = TST_F
19595
  { 2994, 1,  0,  0,  768,  0, 0x800000ULL, nullptr, ImplicitList5, OperandInfo195, -1 ,nullptr },  // Inst #2994 = TST_Fp32
19596
  { 2995, 1,  0,  0,  768,  0, 0x800000ULL, nullptr, ImplicitList5, OperandInfo196, -1 ,nullptr },  // Inst #2995 = TST_Fp64
19597
  { 2996, 1,  0,  0,  768,  0, 0x800000ULL, nullptr, ImplicitList5, OperandInfo197, -1 ,nullptr },  // Inst #2996 = TST_Fp80
19598
  { 2997, 6,  1,  0,  695,  0|(1ULL<<MCID::MayLoad), 0x5e00005886ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr },  // Inst #2997 = TZCNT16rm
19599
  { 2998, 2,  1,  0,  694,  0, 0x5e00005885ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr },  // Inst #2998 = TZCNT16rr
19600
  { 2999, 6,  1,  0,  695,  0|(1ULL<<MCID::MayLoad), 0x5e00005906ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #2999 = TZCNT32rm
19601
  { 3000, 2,  1,  0,  694,  0, 0x5e00005905ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #3000 = TZCNT32rr
19602
  { 3001, 6,  1,  0,  695,  0|(1ULL<<MCID::MayLoad), 0x5e00025806ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #3001 = TZCNT64rm
19603
  { 3002, 2,  1,  0,  694,  0, 0x5e00025805ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #3002 = TZCNT64rr
19604
  { 3003, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100c001481cULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr },  // Inst #3003 = TZMSK32rm
19605
  { 3004, 2,  1,  0,  0,  0, 0x100c0014814ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr },  // Inst #3004 = TZMSK32rr
19606
  { 3005, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x180c001481cULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr },  // Inst #3005 = TZMSK64rm
19607
  { 3006, 2,  1,  0,  0,  0, 0x180c0014814ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr },  // Inst #3006 = TZMSK64rr
19608
  { 3007, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x1700005006ULL, nullptr, ImplicitList6, OperandInfo113, -1 ,nullptr },  // Inst #3007 = UCOMISDrm
19609
  { 3008, 2,  0,  0,  76, 0, 0x1700005005ULL, nullptr, ImplicitList6, OperandInfo114, -1 ,nullptr },  // Inst #3008 = UCOMISDrr
19610
  { 3009, 6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x1700004806ULL, nullptr, ImplicitList6, OperandInfo115, -1 ,nullptr },  // Inst #3009 = UCOMISSrm
19611
  { 3010, 2,  0,  0,  76, 0, 0x1700004805ULL, nullptr, ImplicitList6, OperandInfo116, -1 ,nullptr },  // Inst #3010 = UCOMISSrr
19612
  { 3011, 1,  0,  0,  766,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000015ULL, ImplicitList86, ImplicitList22, OperandInfo44, -1 ,nullptr },  // Inst #3011 = UCOM_FIPr
19613
  { 3012, 1,  0,  0,  766,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000015ULL, ImplicitList86, ImplicitList22, OperandInfo44, -1 ,nullptr },  // Inst #3012 = UCOM_FIr
19614
  { 3013, 0,  0,  0,  764,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000049ULL, ImplicitList86, ImplicitList5, nullptr, -1 ,nullptr },  // Inst #3013 = UCOM_FPPr
19615
  { 3014, 1,  0,  0,  761,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000015ULL, ImplicitList86, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #3014 = UCOM_FPr
19616
  { 3015, 2,  0,  0,  24, 0, 0x1400000ULL, nullptr, ImplicitList22, OperandInfo13, -1 ,nullptr },  // Inst #3015 = UCOM_FpIr32
19617
  { 3016, 2,  0,  0,  24, 0, 0x1400000ULL, nullptr, ImplicitList22, OperandInfo14, -1 ,nullptr },  // Inst #3016 = UCOM_FpIr64
19618
  { 3017, 2,  0,  0,  24, 0, 0x1400000ULL, nullptr, ImplicitList22, OperandInfo15, -1 ,nullptr },  // Inst #3017 = UCOM_FpIr80
19619
  { 3018, 2,  0,  0,  24, 0, 0x1400000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr },  // Inst #3018 = UCOM_Fpr32
19620
  { 3019, 2,  0,  0,  24, 0, 0x1400000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr },  // Inst #3019 = UCOM_Fpr64
19621
  { 3020, 2,  0,  0,  24, 0, 0x1400000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr },  // Inst #3020 = UCOM_Fpr80
19622
  { 3021, 1,  0,  0,  761,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000014ULL, ImplicitList86, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #3021 = UCOM_Fr
19623
  { 3022, 0,  0,  0,  56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #3022 = UD2B
19624
  { 3023, 7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0xa90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #3023 = UNPCKHPDrm
19625
  { 3024, 3,  1,  0,  524,  0, 0xa90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #3024 = UNPCKHPDrr
19626
  { 3025, 7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0xa88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #3025 = UNPCKHPSrm
19627
  { 3026, 3,  1,  0,  524,  0, 0xa88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #3026 = UNPCKHPSrr
19628
  { 3027, 7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0xa10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #3027 = UNPCKLPDrm
19629
  { 3028, 3,  1,  0,  524,  0, 0xa10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #3028 = UNPCKLPDrr
19630
  { 3029, 7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0xa08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #3029 = UNPCKLPSrm
19631
  { 3030, 3,  1,  0,  524,  0, 0xa08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #3030 = UNPCKLPSrr
19632
  { 3031, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo275, -1 ,nullptr },  // Inst #3031 = VAARG_64
19633
  { 3032, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x92c30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #3032 = VADDPDYrm
19634
  { 3033, 3,  1,  0,  14, 0|(1ULL<<MCID::Commutable), 0x92c30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #3033 = VADDPDYrr
19635
  { 3034, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001ac60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3034 = VADDPDZ128rm
19636
  { 3035, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101ac60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3035 = VADDPDZ128rmb
19637
  { 3036, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121ac60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #3036 = VADDPDZ128rmbk
19638
  { 3037, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161ac60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #3037 = VADDPDZ128rmbkz
19639
  { 3038, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021ac60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #3038 = VADDPDZ128rmk
19640
  { 3039, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061ac60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #3039 = VADDPDZ128rmkz
19641
  { 3040, 3,  1,  0,  0,  0, 0x2001ac60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3040 = VADDPDZ128rr
19642
  { 3041, 5,  1,  0,  0,  0, 0x2021ac60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #3041 = VADDPDZ128rrk
19643
  { 3042, 4,  1,  0,  0,  0, 0x2061ac60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #3042 = VADDPDZ128rrkz
19644
  { 3043, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009ac60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3043 = VADDPDZ256rm
19645
  { 3044, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109ac60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3044 = VADDPDZ256rmb
19646
  { 3045, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129ac60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #3045 = VADDPDZ256rmbk
19647
  { 3046, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169ac60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #3046 = VADDPDZ256rmbkz
19648
  { 3047, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029ac60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #3047 = VADDPDZ256rmk
19649
  { 3048, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069ac60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #3048 = VADDPDZ256rmkz
19650
  { 3049, 3,  1,  0,  0,  0, 0x4009ac60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #3049 = VADDPDZ256rr
19651
  { 3050, 5,  1,  0,  0,  0, 0x4029ac60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #3050 = VADDPDZ256rrk
19652
  { 3051, 4,  1,  0,  0,  0, 0x4069ac60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #3051 = VADDPDZ256rrkz
19653
  { 3052, 4,  1,  0,  0,  0, 0x41181ac60005005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #3052 = VADDPDZrb
19654
  { 3053, 6,  1,  0,  0,  0, 0x411a1ac60005005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #3053 = VADDPDZrbk
19655
  { 3054, 5,  1,  0,  0,  0, 0x411e1ac60005005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr },  // Inst #3054 = VADDPDZrbkz
19656
  { 3055, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081ac60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3055 = VADDPDZrm
19657
  { 3056, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181ac60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3056 = VADDPDZrmb
19658
  { 3057, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1ac60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #3057 = VADDPDZrmbk
19659
  { 3058, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1ac60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #3058 = VADDPDZrmbkz
19660
  { 3059, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1ac60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #3059 = VADDPDZrmk
19661
  { 3060, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1ac60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #3060 = VADDPDZrmkz
19662
  { 3061, 3,  1,  0,  0,  0, 0x8081ac60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #3061 = VADDPDZrr
19663
  { 3062, 5,  1,  0,  0,  0, 0x80a1ac60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #3062 = VADDPDZrrk
19664
  { 3063, 4,  1,  0,  0,  0, 0x80e1ac60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #3063 = VADDPDZrrkz
19665
  { 3064, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x12c30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3064 = VADDPDrm
19666
  { 3065, 3,  1,  0,  14, 0|(1ULL<<MCID::Commutable), 0x12c30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3065 = VADDPDrr
19667
  { 3066, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x92c28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #3066 = VADDPSYrm
19668
  { 3067, 3,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x92c28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #3067 = VADDPSYrr
19669
  { 3068, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012c60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3068 = VADDPSZ128rm
19670
  { 3069, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012c60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3069 = VADDPSZ128rmb
19671
  { 3070, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212c60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #3070 = VADDPSZ128rmbk
19672
  { 3071, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612c60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #3071 = VADDPSZ128rmbkz
19673
  { 3072, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212c60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #3072 = VADDPSZ128rmk
19674
  { 3073, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612c60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #3073 = VADDPSZ128rmkz
19675
  { 3074, 3,  1,  0,  0,  0, 0x20012c60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3074 = VADDPSZ128rr
19676
  { 3075, 5,  1,  0,  0,  0, 0x20212c60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #3075 = VADDPSZ128rrk
19677
  { 3076, 4,  1,  0,  0,  0, 0x20612c60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #3076 = VADDPSZ128rrkz
19678
  { 3077, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092c60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3077 = VADDPSZ256rm
19679
  { 3078, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092c60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3078 = VADDPSZ256rmb
19680
  { 3079, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292c60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #3079 = VADDPSZ256rmbk
19681
  { 3080, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692c60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #3080 = VADDPSZ256rmbkz
19682
  { 3081, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292c60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #3081 = VADDPSZ256rmk
19683
  { 3082, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692c60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #3082 = VADDPSZ256rmkz
19684
  { 3083, 3,  1,  0,  0,  0, 0x40092c60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #3083 = VADDPSZ256rr
19685
  { 3084, 5,  1,  0,  0,  0, 0x40292c60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #3084 = VADDPSZ256rrk
19686
  { 3085, 4,  1,  0,  0,  0, 0x40692c60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #3085 = VADDPSZ256rrkz
19687
  { 3086, 4,  1,  0,  0,  0, 0x409812c60004805ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #3086 = VADDPSZrb
19688
  { 3087, 6,  1,  0,  0,  0, 0x409a12c60004805ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #3087 = VADDPSZrbk
19689
  { 3088, 5,  1,  0,  0,  0, 0x409e12c60004805ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr },  // Inst #3088 = VADDPSZrbkz
19690
  { 3089, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812c60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3089 = VADDPSZrm
19691
  { 3090, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812c60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3090 = VADDPSZrmb
19692
  { 3091, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12c60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #3091 = VADDPSZrmbk
19693
  { 3092, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12c60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #3092 = VADDPSZrmbkz
19694
  { 3093, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12c60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #3093 = VADDPSZrmk
19695
  { 3094, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12c60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #3094 = VADDPSZrmkz
19696
  { 3095, 3,  1,  0,  0,  0, 0x80812c60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #3095 = VADDPSZrr
19697
  { 3096, 5,  1,  0,  0,  0, 0x80a12c60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #3096 = VADDPSZrrk
19698
  { 3097, 4,  1,  0,  0,  0, 0x80e12c60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #3097 = VADDPSZrrkz
19699
  { 3098, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x12c28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3098 = VADDPSrm
19700
  { 3099, 3,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x12c28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3099 = VADDPSrr
19701
  { 3100, 7,  1,  0,  525,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011ac60006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr },  // Inst #3100 = VADDSDZrm
19702
  { 3101, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011ac60006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3101 = VADDSDZrm_Int
19703
  { 3102, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031ac60006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #3102 = VADDSDZrm_Intk
19704
  { 3103, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071ac60006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #3103 = VADDSDZrm_Intkz
19705
  { 3104, 3,  1,  0,  525,  0|(1ULL<<MCID::Commutable), 0x1011ac60006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr },  // Inst #3104 = VADDSDZrr
19706
  { 3105, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x1011ac60006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3105 = VADDSDZrr_Int
19707
  { 3106, 5,  1,  0,  0,  0, 0x1031ac60006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #3106 = VADDSDZrr_Intk
19708
  { 3107, 4,  1,  0,  0,  0, 0x1071ac60006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #3107 = VADDSDZrr_Intkz
19709
  { 3108, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x41111ac60006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #3108 = VADDSDZrrb
19710
  { 3109, 6,  1,  0,  0,  0, 0x41131ac60006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #3109 = VADDSDZrrbk
19711
  { 3110, 5,  1,  0,  0,  0, 0x41171ac60006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #3110 = VADDSDZrrbkz
19712
  { 3111, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x112c30006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #3111 = VADDSDrm
19713
  { 3112, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x112c30006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3112 = VADDSDrm_Int
19714
  { 3113, 3,  1,  0,  18, 0|(1ULL<<MCID::Commutable), 0x112c30006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #3113 = VADDSDrr
19715
  { 3114, 3,  1,  0,  18, 0, 0x112c30006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3114 = VADDSDrr_Int
19716
  { 3115, 7,  1,  0,  526,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112c60005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr },  // Inst #3115 = VADDSSZrm
19717
  { 3116, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112c60005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3116 = VADDSSZrm_Int
19718
  { 3117, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8312c60005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #3117 = VADDSSZrm_Intk
19719
  { 3118, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8712c60005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #3118 = VADDSSZrm_Intkz
19720
  { 3119, 3,  1,  0,  526,  0|(1ULL<<MCID::Commutable), 0x8112c60005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr },  // Inst #3119 = VADDSSZrr
19721
  { 3120, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x8112c60005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3120 = VADDSSZrr_Int
19722
  { 3121, 5,  1,  0,  0,  0, 0x8312c60005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #3121 = VADDSSZrr_Intk
19723
  { 3122, 4,  1,  0,  0,  0, 0x8712c60005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #3122 = VADDSSZrr_Intkz
19724
  { 3123, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x409112c60005805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #3123 = VADDSSZrrb
19725
  { 3124, 6,  1,  0,  0,  0, 0x409312c60005805ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #3124 = VADDSSZrrbk
19726
  { 3125, 5,  1,  0,  0,  0, 0x409712c60005805ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #3125 = VADDSSZrrbkz
19727
  { 3126, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x112c28005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #3126 = VADDSSrm
19728
  { 3127, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x112c28005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3127 = VADDSSrm_Int
19729
  { 3128, 3,  1,  0,  20, 0|(1ULL<<MCID::Commutable), 0x112c28005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #3128 = VADDSSrr
19730
  { 3129, 3,  1,  0,  20, 0, 0x112c28005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3129 = VADDSSrr_Int
19731
  { 3130, 7,  1,  0,  21, 0|(1ULL<<MCID::MayLoad), 0x96830005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #3130 = VADDSUBPDYrm
19732
  { 3131, 3,  1,  0,  14, 0, 0x96830005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #3131 = VADDSUBPDYrr
19733
  { 3132, 7,  1,  0,  21, 0|(1ULL<<MCID::MayLoad), 0x16830005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3132 = VADDSUBPDrm
19734
  { 3133, 3,  1,  0,  14, 0, 0x16830005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3133 = VADDSUBPDrr
19735
  { 3134, 7,  1,  0,  22, 0|(1ULL<<MCID::MayLoad), 0x96828006006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #3134 = VADDSUBPSYrm
19736
  { 3135, 3,  1,  0,  16, 0, 0x96828006005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #3135 = VADDSUBPSYrr
19737
  { 3136, 7,  1,  0,  22, 0|(1ULL<<MCID::MayLoad), 0x16828006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3136 = VADDSUBPSrm
19738
  { 3137, 3,  1,  0,  16, 0, 0x16828006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3137 = VADDSUBPSrr
19739
  { 3138, 7,  1,  0,  26, 0|(1ULL<<MCID::MayLoad), 0x16fb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3138 = VAESDECLASTrm
19740
  { 3139, 3,  1,  0,  27, 0, 0x16fb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3139 = VAESDECLASTrr
19741
  { 3140, 7,  1,  0,  26, 0|(1ULL<<MCID::MayLoad), 0x16f38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3140 = VAESDECrm
19742
  { 3141, 3,  1,  0,  27, 0, 0x16f38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3141 = VAESDECrr
19743
  { 3142, 7,  1,  0,  26, 0|(1ULL<<MCID::MayLoad), 0x16eb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3142 = VAESENCLASTrm
19744
  { 3143, 3,  1,  0,  27, 0, 0x16eb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3143 = VAESENCLASTrr
19745
  { 3144, 7,  1,  0,  26, 0|(1ULL<<MCID::MayLoad), 0x16e38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3144 = VAESENCrm
19746
  { 3145, 3,  1,  0,  27, 0, 0x16e38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3145 = VAESENCrr
19747
  { 3146, 6,  1,  0,  28, 0|(1ULL<<MCID::MayLoad), 0x6db8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #3146 = VAESIMCrm
19748
  { 3147, 2,  1,  0,  29, 0, 0x6db8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #3147 = VAESIMCrr
19749
  { 3148, 7,  1,  0,  30, 0|(1ULL<<MCID::MayLoad), 0x6fb804d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #3148 = VAESKEYGENASSIST128rm
19750
  { 3149, 3,  1,  0,  31, 0, 0x6fb804d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #3149 = VAESKEYGENASSIST128rr
19751
  { 3150, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90101f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #3150 = VALIGNDZ128rmbi
19752
  { 3151, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92101f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #3151 = VALIGNDZ128rmbik
19753
  { 3152, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96101f804d006ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr },  // Inst #3152 = VALIGNDZ128rmbikz
19754
  { 3153, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200101f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #3153 = VALIGNDZ128rmi
19755
  { 3154, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202101f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #3154 = VALIGNDZ128rmik
19756
  { 3155, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206101f804d006ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr },  // Inst #3155 = VALIGNDZ128rmikz
19757
  { 3156, 4,  1,  0,  0,  0, 0x200101f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #3156 = VALIGNDZ128rri
19758
  { 3157, 6,  1,  0,  0,  0, 0x202101f804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr },  // Inst #3157 = VALIGNDZ128rrik
19759
  { 3158, 5,  1,  0,  0,  0, 0x206101f804d005ULL, nullptr, nullptr, OperandInfo330, -1 ,nullptr },  // Inst #3158 = VALIGNDZ128rrikz
19760
  { 3159, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90901f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #3159 = VALIGNDZ256rmbi
19761
  { 3160, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92901f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #3160 = VALIGNDZ256rmbik
19762
  { 3161, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96901f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #3161 = VALIGNDZ256rmbikz
19763
  { 3162, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400901f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #3162 = VALIGNDZ256rmi
19764
  { 3163, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402901f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #3163 = VALIGNDZ256rmik
19765
  { 3164, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406901f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #3164 = VALIGNDZ256rmikz
19766
  { 3165, 4,  1,  0,  0,  0, 0x400901f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #3165 = VALIGNDZ256rri
19767
  { 3166, 6,  1,  0,  0,  0, 0x402901f804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr },  // Inst #3166 = VALIGNDZ256rrik
19768
  { 3167, 5,  1,  0,  0,  0, 0x406901f804d005ULL, nullptr, nullptr, OperandInfo336, -1 ,nullptr },  // Inst #3167 = VALIGNDZ256rrikz
19769
  { 3168, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98101f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #3168 = VALIGNDZrmbi
19770
  { 3169, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a101f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #3169 = VALIGNDZrmbik
19771
  { 3170, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e101f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #3170 = VALIGNDZrmbikz
19772
  { 3171, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808101f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #3171 = VALIGNDZrmi
19773
  { 3172, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a101f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #3172 = VALIGNDZrmik
19774
  { 3173, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e101f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #3173 = VALIGNDZrmikz
19775
  { 3174, 4,  1,  0,  0,  0, 0x808101f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #3174 = VALIGNDZrri
19776
  { 3175, 6,  1,  0,  0,  0, 0x80a101f804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #3175 = VALIGNDZrrik
19777
  { 3176, 5,  1,  0,  0,  0, 0x80e101f804d005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr },  // Inst #3176 = VALIGNDZrrikz
19778
  { 3177, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110181f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #3177 = VALIGNQZ128rmbi
19779
  { 3178, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112181f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #3178 = VALIGNQZ128rmbik
19780
  { 3179, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116181f804d006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr },  // Inst #3179 = VALIGNQZ128rmbikz
19781
  { 3180, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200181f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #3180 = VALIGNQZ128rmi
19782
  { 3181, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202181f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #3181 = VALIGNQZ128rmik
19783
  { 3182, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206181f804d006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr },  // Inst #3182 = VALIGNQZ128rmikz
19784
  { 3183, 4,  1,  0,  0,  0, 0x200181f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #3183 = VALIGNQZ128rri
19785
  { 3184, 6,  1,  0,  0,  0, 0x202181f804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr },  // Inst #3184 = VALIGNQZ128rrik
19786
  { 3185, 5,  1,  0,  0,  0, 0x206181f804d005ULL, nullptr, nullptr, OperandInfo343, -1 ,nullptr },  // Inst #3185 = VALIGNQZ128rrikz
19787
  { 3186, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110981f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #3186 = VALIGNQZ256rmbi
19788
  { 3187, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112981f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #3187 = VALIGNQZ256rmbik
19789
  { 3188, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116981f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #3188 = VALIGNQZ256rmbikz
19790
  { 3189, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400981f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #3189 = VALIGNQZ256rmi
19791
  { 3190, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402981f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #3190 = VALIGNQZ256rmik
19792
  { 3191, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406981f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #3191 = VALIGNQZ256rmikz
19793
  { 3192, 4,  1,  0,  0,  0, 0x400981f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #3192 = VALIGNQZ256rri
19794
  { 3193, 6,  1,  0,  0,  0, 0x402981f804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr },  // Inst #3193 = VALIGNQZ256rrik
19795
  { 3194, 5,  1,  0,  0,  0, 0x406981f804d005ULL, nullptr, nullptr, OperandInfo347, -1 ,nullptr },  // Inst #3194 = VALIGNQZ256rrikz
19796
  { 3195, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x118181f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #3195 = VALIGNQZrmbi
19797
  { 3196, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a181f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #3196 = VALIGNQZrmbik
19798
  { 3197, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e181f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #3197 = VALIGNQZrmbikz
19799
  { 3198, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808181f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #3198 = VALIGNQZrmi
19800
  { 3199, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a181f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #3199 = VALIGNQZrmik
19801
  { 3200, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e181f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #3200 = VALIGNQZrmikz
19802
  { 3201, 4,  1,  0,  0,  0, 0x808181f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #3201 = VALIGNQZrri
19803
  { 3202, 6,  1,  0,  0,  0, 0x80a181f804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #3202 = VALIGNQZrrik
19804
  { 3203, 5,  1,  0,  0,  0, 0x80e181f804d005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr },  // Inst #3203 = VALIGNQZrrikz
19805
  { 3204, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x92ab0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #3204 = VANDNPDYrm
19806
  { 3205, 3,  1,  0,  941,  0, 0x92ab0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #3205 = VANDNPDYrr
19807
  { 3206, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001aae0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3206 = VANDNPDZ128rm
19808
  { 3207, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101aae0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3207 = VANDNPDZ128rmb
19809
  { 3208, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121aae0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #3208 = VANDNPDZ128rmbk
19810
  { 3209, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161aae0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #3209 = VANDNPDZ128rmbkz
19811
  { 3210, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021aae0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #3210 = VANDNPDZ128rmk
19812
  { 3211, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061aae0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #3211 = VANDNPDZ128rmkz
19813
  { 3212, 3,  1,  0,  0,  0, 0x2001aae0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3212 = VANDNPDZ128rr
19814
  { 3213, 5,  1,  0,  0,  0, 0x2021aae0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #3213 = VANDNPDZ128rrk
19815
  { 3214, 4,  1,  0,  0,  0, 0x2061aae0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #3214 = VANDNPDZ128rrkz
19816
  { 3215, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009aae0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3215 = VANDNPDZ256rm
19817
  { 3216, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109aae0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3216 = VANDNPDZ256rmb
19818
  { 3217, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129aae0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #3217 = VANDNPDZ256rmbk
19819
  { 3218, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169aae0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #3218 = VANDNPDZ256rmbkz
19820
  { 3219, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029aae0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #3219 = VANDNPDZ256rmk
19821
  { 3220, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069aae0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #3220 = VANDNPDZ256rmkz
19822
  { 3221, 3,  1,  0,  0,  0, 0x4009aae0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #3221 = VANDNPDZ256rr
19823
  { 3222, 5,  1,  0,  0,  0, 0x4029aae0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #3222 = VANDNPDZ256rrk
19824
  { 3223, 4,  1,  0,  0,  0, 0x4069aae0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #3223 = VANDNPDZ256rrkz
19825
  { 3224, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081aae0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3224 = VANDNPDZrm
19826
  { 3225, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181aae0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3225 = VANDNPDZrmb
19827
  { 3226, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1aae0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #3226 = VANDNPDZrmbk
19828
  { 3227, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1aae0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #3227 = VANDNPDZrmbkz
19829
  { 3228, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1aae0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #3228 = VANDNPDZrmk
19830
  { 3229, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1aae0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #3229 = VANDNPDZrmkz
19831
  { 3230, 3,  1,  0,  0,  0, 0x8081aae0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #3230 = VANDNPDZrr
19832
  { 3231, 5,  1,  0,  0,  0, 0x80a1aae0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #3231 = VANDNPDZrrk
19833
  { 3232, 4,  1,  0,  0,  0, 0x80e1aae0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #3232 = VANDNPDZrrkz
19834
  { 3233, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x12ab0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3233 = VANDNPDrm
19835
  { 3234, 3,  1,  0,  941,  0, 0x12ab0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3234 = VANDNPDrr
19836
  { 3235, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x92aa8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #3235 = VANDNPSYrm
19837
  { 3236, 3,  1,  0,  941,  0, 0x92aa8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #3236 = VANDNPSYrr
19838
  { 3237, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012ae0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3237 = VANDNPSZ128rm
19839
  { 3238, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012ae0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3238 = VANDNPSZ128rmb
19840
  { 3239, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212ae0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #3239 = VANDNPSZ128rmbk
19841
  { 3240, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612ae0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #3240 = VANDNPSZ128rmbkz
19842
  { 3241, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212ae0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #3241 = VANDNPSZ128rmk
19843
  { 3242, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612ae0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #3242 = VANDNPSZ128rmkz
19844
  { 3243, 3,  1,  0,  0,  0, 0x20012ae0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3243 = VANDNPSZ128rr
19845
  { 3244, 5,  1,  0,  0,  0, 0x20212ae0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #3244 = VANDNPSZ128rrk
19846
  { 3245, 4,  1,  0,  0,  0, 0x20612ae0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #3245 = VANDNPSZ128rrkz
19847
  { 3246, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092ae0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3246 = VANDNPSZ256rm
19848
  { 3247, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092ae0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3247 = VANDNPSZ256rmb
19849
  { 3248, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292ae0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #3248 = VANDNPSZ256rmbk
19850
  { 3249, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692ae0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #3249 = VANDNPSZ256rmbkz
19851
  { 3250, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292ae0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #3250 = VANDNPSZ256rmk
19852
  { 3251, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692ae0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #3251 = VANDNPSZ256rmkz
19853
  { 3252, 3,  1,  0,  0,  0, 0x40092ae0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #3252 = VANDNPSZ256rr
19854
  { 3253, 5,  1,  0,  0,  0, 0x40292ae0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #3253 = VANDNPSZ256rrk
19855
  { 3254, 4,  1,  0,  0,  0, 0x40692ae0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #3254 = VANDNPSZ256rrkz
19856
  { 3255, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812ae0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3255 = VANDNPSZrm
19857
  { 3256, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812ae0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3256 = VANDNPSZrmb
19858
  { 3257, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12ae0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #3257 = VANDNPSZrmbk
19859
  { 3258, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12ae0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #3258 = VANDNPSZrmbkz
19860
  { 3259, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12ae0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #3259 = VANDNPSZrmk
19861
  { 3260, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12ae0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #3260 = VANDNPSZrmkz
19862
  { 3261, 3,  1,  0,  0,  0, 0x80812ae0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #3261 = VANDNPSZrr
19863
  { 3262, 5,  1,  0,  0,  0, 0x80a12ae0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #3262 = VANDNPSZrrk
19864
  { 3263, 4,  1,  0,  0,  0, 0x80e12ae0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #3263 = VANDNPSZrrkz
19865
  { 3264, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x12aa8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3264 = VANDNPSrm
19866
  { 3265, 3,  1,  0,  941,  0, 0x12aa8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3265 = VANDNPSrr
19867
  { 3266, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x92a30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #3266 = VANDPDYrm
19868
  { 3267, 3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x92a30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #3267 = VANDPDYrr
19869
  { 3268, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001aa60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3268 = VANDPDZ128rm
19870
  { 3269, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101aa60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3269 = VANDPDZ128rmb
19871
  { 3270, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121aa60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #3270 = VANDPDZ128rmbk
19872
  { 3271, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161aa60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #3271 = VANDPDZ128rmbkz
19873
  { 3272, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021aa60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #3272 = VANDPDZ128rmk
19874
  { 3273, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061aa60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #3273 = VANDPDZ128rmkz
19875
  { 3274, 3,  1,  0,  0,  0, 0x2001aa60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3274 = VANDPDZ128rr
19876
  { 3275, 5,  1,  0,  0,  0, 0x2021aa60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #3275 = VANDPDZ128rrk
19877
  { 3276, 4,  1,  0,  0,  0, 0x2061aa60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #3276 = VANDPDZ128rrkz
19878
  { 3277, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009aa60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3277 = VANDPDZ256rm
19879
  { 3278, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109aa60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3278 = VANDPDZ256rmb
19880
  { 3279, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129aa60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #3279 = VANDPDZ256rmbk
19881
  { 3280, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169aa60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #3280 = VANDPDZ256rmbkz
19882
  { 3281, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029aa60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #3281 = VANDPDZ256rmk
19883
  { 3282, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069aa60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #3282 = VANDPDZ256rmkz
19884
  { 3283, 3,  1,  0,  0,  0, 0x4009aa60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #3283 = VANDPDZ256rr
19885
  { 3284, 5,  1,  0,  0,  0, 0x4029aa60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #3284 = VANDPDZ256rrk
19886
  { 3285, 4,  1,  0,  0,  0, 0x4069aa60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #3285 = VANDPDZ256rrkz
19887
  { 3286, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081aa60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3286 = VANDPDZrm
19888
  { 3287, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181aa60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3287 = VANDPDZrmb
19889
  { 3288, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1aa60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #3288 = VANDPDZrmbk
19890
  { 3289, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1aa60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #3289 = VANDPDZrmbkz
19891
  { 3290, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1aa60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #3290 = VANDPDZrmk
19892
  { 3291, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1aa60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #3291 = VANDPDZrmkz
19893
  { 3292, 3,  1,  0,  0,  0, 0x8081aa60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #3292 = VANDPDZrr
19894
  { 3293, 5,  1,  0,  0,  0, 0x80a1aa60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #3293 = VANDPDZrrk
19895
  { 3294, 4,  1,  0,  0,  0, 0x80e1aa60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #3294 = VANDPDZrrkz
19896
  { 3295, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x12a30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3295 = VANDPDrm
19897
  { 3296, 3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x12a30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3296 = VANDPDrr
19898
  { 3297, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x92a28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #3297 = VANDPSYrm
19899
  { 3298, 3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x92a28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #3298 = VANDPSYrr
19900
  { 3299, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012a60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3299 = VANDPSZ128rm
19901
  { 3300, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012a60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3300 = VANDPSZ128rmb
19902
  { 3301, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212a60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #3301 = VANDPSZ128rmbk
19903
  { 3302, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612a60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #3302 = VANDPSZ128rmbkz
19904
  { 3303, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212a60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #3303 = VANDPSZ128rmk
19905
  { 3304, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612a60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #3304 = VANDPSZ128rmkz
19906
  { 3305, 3,  1,  0,  0,  0, 0x20012a60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3305 = VANDPSZ128rr
19907
  { 3306, 5,  1,  0,  0,  0, 0x20212a60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #3306 = VANDPSZ128rrk
19908
  { 3307, 4,  1,  0,  0,  0, 0x20612a60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #3307 = VANDPSZ128rrkz
19909
  { 3308, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092a60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3308 = VANDPSZ256rm
19910
  { 3309, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092a60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3309 = VANDPSZ256rmb
19911
  { 3310, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292a60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #3310 = VANDPSZ256rmbk
19912
  { 3311, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692a60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #3311 = VANDPSZ256rmbkz
19913
  { 3312, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292a60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #3312 = VANDPSZ256rmk
19914
  { 3313, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692a60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #3313 = VANDPSZ256rmkz
19915
  { 3314, 3,  1,  0,  0,  0, 0x40092a60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #3314 = VANDPSZ256rr
19916
  { 3315, 5,  1,  0,  0,  0, 0x40292a60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #3315 = VANDPSZ256rrk
19917
  { 3316, 4,  1,  0,  0,  0, 0x40692a60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #3316 = VANDPSZ256rrkz
19918
  { 3317, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812a60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3317 = VANDPSZrm
19919
  { 3318, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812a60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3318 = VANDPSZrmb
19920
  { 3319, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12a60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #3319 = VANDPSZrmbk
19921
  { 3320, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12a60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #3320 = VANDPSZrmbkz
19922
  { 3321, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12a60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #3321 = VANDPSZrmk
19923
  { 3322, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12a60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #3322 = VANDPSZrmkz
19924
  { 3323, 3,  1,  0,  0,  0, 0x80812a60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #3323 = VANDPSZrr
19925
  { 3324, 5,  1,  0,  0,  0, 0x80a12a60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #3324 = VANDPSZrrk
19926
  { 3325, 4,  1,  0,  0,  0, 0x80e12a60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #3325 = VANDPSZrrkz
19927
  { 3326, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x12a28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #3326 = VANDPSrm
19928
  { 3327, 3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x12a28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #3327 = VANDPSrr
19929
  { 3328, 3,  0,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList6, OperandInfo350, -1 ,nullptr },  // Inst #3328 = VASTART_SAVE_XMM_REGS
19930
  { 3329, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b2f0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3329 = VBLENDMPDZ128rm
19931
  { 3330, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1101b2f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3330 = VBLENDMPDZ128rmb
19932
  { 3331, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121b2f8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #3331 = VBLENDMPDZ128rmbk
19933
  { 3332, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b2f0009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #3332 = VBLENDMPDZ128rmk
19934
  { 3333, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b2f0009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #3333 = VBLENDMPDZ128rmkz
19935
  { 3334, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b2f0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3334 = VBLENDMPDZ128rr
19936
  { 3335, 4,  1,  0,  0,  0, 0x2021b2f0009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #3335 = VBLENDMPDZ128rrk
19937
  { 3336, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b2f0009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #3336 = VBLENDMPDZ128rrkz
19938
  { 3337, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b2f0009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3337 = VBLENDMPDZ256rm
19939
  { 3338, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1109b2f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3338 = VBLENDMPDZ256rmb
19940
  { 3339, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129b2f8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #3339 = VBLENDMPDZ256rmbk
19941
  { 3340, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b2f0009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #3340 = VBLENDMPDZ256rmk
19942
  { 3341, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b2f0009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #3341 = VBLENDMPDZ256rmkz
19943
  { 3342, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b2f0009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #3342 = VBLENDMPDZ256rr
19944
  { 3343, 4,  1,  0,  0,  0, 0x4029b2f0009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #3343 = VBLENDMPDZ256rrk
19945
  { 3344, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b2f0009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #3344 = VBLENDMPDZ256rrkz
19946
  { 3345, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b2f0009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3345 = VBLENDMPDZrm
19947
  { 3346, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1181b2f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3346 = VBLENDMPDZrmb
19948
  { 3347, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1b2f8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #3347 = VBLENDMPDZrmbk
19949
  { 3348, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b2f0009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #3348 = VBLENDMPDZrmk
19950
  { 3349, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b2f0009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #3349 = VBLENDMPDZrmkz
19951
  { 3350, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b2f0009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #3350 = VBLENDMPDZrr
19952
  { 3351, 4,  1,  0,  0,  0, 0x80a1b2f0009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #3351 = VBLENDMPDZrrk
19953
  { 3352, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b2f0009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #3352 = VBLENDMPDZrrkz
19954
  { 3353, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x200132e8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3353 = VBLENDMPSZ128rm
19955
  { 3354, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x90132f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #3354 = VBLENDMPSZ128rmb
19956
  { 3355, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92132f8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #3355 = VBLENDMPSZ128rmbk
19957
  { 3356, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202132e8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #3356 = VBLENDMPSZ128rmk
19958
  { 3357, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x206132e8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #3357 = VBLENDMPSZ128rmkz
19959
  { 3358, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x200132e8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #3358 = VBLENDMPSZ128rr
19960
  { 3359, 4,  1,  0,  0,  0, 0x202132e8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #3359 = VBLENDMPSZ128rrk
19961
  { 3360, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x206132e8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #3360 = VBLENDMPSZ128rrkz
19962
  { 3361, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x400932e8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3361 = VBLENDMPSZ256rm
19963
  { 3362, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x90932f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #3362 = VBLENDMPSZ256rmb
19964
  { 3363, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92932f8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #3363 = VBLENDMPSZ256rmbk
19965
  { 3364, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402932e8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #3364 = VBLENDMPSZ256rmk
19966
  { 3365, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x406932e8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #3365 = VBLENDMPSZ256rmkz
19967
  { 3366, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x400932e8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #3366 = VBLENDMPSZ256rr
19968
  { 3367, 4,  1,  0,  0,  0, 0x402932e8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #3367 = VBLENDMPSZ256rrk
19969
  { 3368, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x406932e8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #3368 = VBLENDMPSZ256rrkz
19970
  { 3369, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x808132e8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3369 = VBLENDMPSZrm
19971
  { 3370, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x98132f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #3370 = VBLENDMPSZrmb
19972
  { 3371, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a132f8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #3371 = VBLENDMPSZrmbk
19973
  { 3372, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a132e8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #3372 = VBLENDMPSZrmk
19974
  { 3373, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e132e8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #3373 = VBLENDMPSZrmkz
19975
  { 3374, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x808132e8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #3374 = VBLENDMPSZrr
19976
  { 3375, 4,  1,  0,  0,  0, 0x80a132e8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #3375 = VBLENDMPSZrrk
19977
  { 3376, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e132e8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #3376 = VBLENDMPSZrrkz
19978
  { 3377, 8,  1,  0,  39, 0|(1ULL<<MCID::MayLoad), 0x906b004d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #3377 = VBLENDPDYrmi
19979
  { 3378, 4,  1,  0,  40, 0|(1ULL<<MCID::Commutable), 0x906b004d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #3378 = VBLENDPDYrri
19980
  { 3379, 8,  1,  0,  39, 0|(1ULL<<MCID::MayLoad), 0x106b004d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #3379 = VBLENDPDrmi
19981
  { 3380, 4,  1,  0,  40, 0|(1ULL<<MCID::Commutable), 0x106b004d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #3380 = VBLENDPDrri
19982
  { 3381, 8,  1,  0,  39, 0|(1ULL<<MCID::MayLoad), 0x9062804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #3381 = VBLENDPSYrmi
19983
  { 3382, 4,  1,  0,  40, 0|(1ULL<<MCID::Commutable), 0x9062804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #3382 = VBLENDPSYrri
19984
  { 3383, 8,  1,  0,  39, 0|(1ULL<<MCID::MayLoad), 0x1062804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #3383 = VBLENDPSrmi
19985
  { 3384, 4,  1,  0,  40, 0|(1ULL<<MCID::Commutable), 0x1062804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #3384 = VBLENDPSrri
19986
  { 3385, 8,  1,  0,  527,  0|(1ULL<<MCID::MayLoad), 0xd25b004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #3385 = VBLENDVPDYrm
19987
  { 3386, 4,  1,  0,  528,  0, 0xd25b004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #3386 = VBLENDVPDYrr
19988
  { 3387, 8,  1,  0,  527,  0|(1ULL<<MCID::MayLoad), 0x525b004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #3387 = VBLENDVPDrm
19989
  { 3388, 4,  1,  0,  528,  0, 0x525b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #3388 = VBLENDVPDrr
19990
  { 3389, 8,  1,  0,  527,  0|(1ULL<<MCID::MayLoad), 0xd252804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #3389 = VBLENDVPSYrm
19991
  { 3390, 4,  1,  0,  528,  0, 0xd252804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #3390 = VBLENDVPSYrr
19992
  { 3391, 8,  1,  0,  527,  0|(1ULL<<MCID::MayLoad), 0x5252804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #3391 = VBLENDVPSrm
19993
  { 3392, 4,  1,  0,  528,  0, 0x5252804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #3392 = VBLENDVPSrr
19994
  { 3393, 6,  1,  0,  845,  0|(1ULL<<MCID::MayLoad), 0x80d38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #3393 = VBROADCASTF128
19995
  { 3394, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20080d78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3394 = VBROADCASTF32X4Z256rm
19996
  { 3395, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20280d78009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3395 = VBROADCASTF32X4Z256rmk
19997
  { 3396, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20680d78009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3396 = VBROADCASTF32X4Z256rmkz
19998
  { 3397, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20800d78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3397 = VBROADCASTF32X4rm
19999
  { 3398, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a00d78009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #3398 = VBROADCASTF32X4rmk
20000
  { 3399, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e00d78009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #3399 = VBROADCASTF32X4rmkz
20001
  { 3400, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40800df8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3400 = VBROADCASTF32X8rm
20002
  { 3401, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a00df8009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #3401 = VBROADCASTF32X8rmk
20003
  { 3402, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e00df8009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #3402 = VBROADCASTF32X8rmkz
20004
  { 3403, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20088d78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3403 = VBROADCASTF64X2Z128rm
20005
  { 3404, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20288d78009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3404 = VBROADCASTF64X2Z128rmk
20006
  { 3405, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20688d78009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3405 = VBROADCASTF64X2Z128rmkz
20007
  { 3406, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20808d78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3406 = VBROADCASTF64X2rm
20008
  { 3407, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a08d78009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3407 = VBROADCASTF64X2rmk
20009
  { 3408, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e08d78009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3408 = VBROADCASTF64X2rmkz
20010
  { 3409, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40808df8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3409 = VBROADCASTF64X4rm
20011
  { 3410, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a08df8009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3410 = VBROADCASTF64X4rmk
20012
  { 3411, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e08df8009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3411 = VBROADCASTF64X4rmkz
20013
  { 3412, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x82d38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #3412 = VBROADCASTI128
20014
  { 3413, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20082d78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3413 = VBROADCASTI32X4Z256rm
20015
  { 3414, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20282d78009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3414 = VBROADCASTI32X4Z256rmk
20016
  { 3415, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20682d78009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3415 = VBROADCASTI32X4Z256rmkz
20017
  { 3416, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20802d78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3416 = VBROADCASTI32X4rm
20018
  { 3417, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a02d78009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #3417 = VBROADCASTI32X4rmk
20019
  { 3418, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e02d78009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #3418 = VBROADCASTI32X4rmkz
20020
  { 3419, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40802df8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3419 = VBROADCASTI32X8rm
20021
  { 3420, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a02df8009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #3420 = VBROADCASTI32X8rmk
20022
  { 3421, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e02df8009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #3421 = VBROADCASTI32X8rmkz
20023
  { 3422, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2008ad78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3422 = VBROADCASTI64X2Z128rm
20024
  { 3423, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2028ad78009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3423 = VBROADCASTI64X2Z128rmk
20025
  { 3424, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2068ad78009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3424 = VBROADCASTI64X2Z128rmkz
20026
  { 3425, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2080ad78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3425 = VBROADCASTI64X2rm
20027
  { 3426, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a0ad78009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3426 = VBROADCASTI64X2rmk
20028
  { 3427, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e0ad78009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3427 = VBROADCASTI64X2rmkz
20029
  { 3428, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4080adf8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3428 = VBROADCASTI64X4rm
20030
  { 3429, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a0adf8009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3429 = VBROADCASTI64X4rmk
20031
  { 3430, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e0adf8009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3430 = VBROADCASTI64X4rmkz
20032
  { 3431, 6,  1,  0,  529,  0|(1ULL<<MCID::MayLoad), 0x80cb0009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #3431 = VBROADCASTSDYrm
20033
  { 3432, 2,  1,  0,  530,  0, 0x80cb0009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #3432 = VBROADCASTSDYrr
20034
  { 3433, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10088cf0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3433 = VBROADCASTSDZ256m
20035
  { 3434, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10288cf0009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3434 = VBROADCASTSDZ256mk
20036
  { 3435, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10688cf0009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3435 = VBROADCASTSDZ256mkz
20037
  { 3436, 2,  1,  0,  0,  0, 0x40088cf0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #3436 = VBROADCASTSDZ256r
20038
  { 3437, 4,  1,  0,  0,  0, 0x40288cf0009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #3437 = VBROADCASTSDZ256rk
20039
  { 3438, 3,  1,  0,  0,  0, 0x40688cf0009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #3438 = VBROADCASTSDZ256rkz
20040
  { 3439, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10808cf0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3439 = VBROADCASTSDZm
20041
  { 3440, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a08cf0009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3440 = VBROADCASTSDZmk
20042
  { 3441, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10e08cf0009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3441 = VBROADCASTSDZmkz
20043
  { 3442, 2,  1,  0,  0,  0, 0x80808cf0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #3442 = VBROADCASTSDZr
20044
  { 3443, 4,  1,  0,  0,  0, 0x80a08cf0009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr },  // Inst #3443 = VBROADCASTSDZrk
20045
  { 3444, 3,  1,  0,  0,  0, 0x80e08cf0009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr },  // Inst #3444 = VBROADCASTSDZrkz
20046
  { 3445, 6,  1,  0,  529,  0|(1ULL<<MCID::MayLoad), 0x80c28009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #3445 = VBROADCASTSSYrm
20047
  { 3446, 2,  1,  0,  530,  0, 0x80c28009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #3446 = VBROADCASTSSYrr
20048
  { 3447, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8000c68009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3447 = VBROADCASTSSZ128m
20049
  { 3448, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8200c68009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3448 = VBROADCASTSSZ128mk
20050
  { 3449, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8600c68009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3449 = VBROADCASTSSZ128mkz
20051
  { 3450, 2,  1,  0,  0,  0, 0x20000c68009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3450 = VBROADCASTSSZ128r
20052
  { 3451, 4,  1,  0,  0,  0, 0x20200c68009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #3451 = VBROADCASTSSZ128rk
20053
  { 3452, 3,  1,  0,  0,  0, 0x20600c68009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #3452 = VBROADCASTSSZ128rkz
20054
  { 3453, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080c68009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3453 = VBROADCASTSSZ256m
20055
  { 3454, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8280c68009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3454 = VBROADCASTSSZ256mk
20056
  { 3455, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8680c68009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3455 = VBROADCASTSSZ256mkz
20057
  { 3456, 2,  1,  0,  0,  0, 0x40080c68009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #3456 = VBROADCASTSSZ256r
20058
  { 3457, 4,  1,  0,  0,  0, 0x40280c68009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr },  // Inst #3457 = VBROADCASTSSZ256rk
20059
  { 3458, 3,  1,  0,  0,  0, 0x40680c68009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr },  // Inst #3458 = VBROADCASTSSZ256rkz
20060
  { 3459, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8800c68009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3459 = VBROADCASTSSZm
20061
  { 3460, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8a00c68009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #3460 = VBROADCASTSSZmk
20062
  { 3461, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8e00c68009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #3461 = VBROADCASTSSZmkz
20063
  { 3462, 2,  1,  0,  0,  0, 0x80800c68009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #3462 = VBROADCASTSSZr
20064
  { 3463, 4,  1,  0,  0,  0, 0x80a00c68009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr },  // Inst #3463 = VBROADCASTSSZrk
20065
  { 3464, 3,  1,  0,  0,  0, 0x80e00c68009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr },  // Inst #3464 = VBROADCASTSSZrkz
20066
  { 3465, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0xc28009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #3465 = VBROADCASTSSrm
20067
  { 3466, 2,  1,  0,  531,  0, 0xc28009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #3466 = VBROADCASTSSrr
20068
  { 3467, 8,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x96130045006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #3467 = VCMPPDYrmi
20069
  { 3468, 8,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x96130045006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #3468 = VCMPPDYrmi_alt
20070
  { 3469, 4,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x96130045005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #3469 = VCMPPDYrri
20071
  { 3470, 4,  1,  0,  16, 0, 0x96130045005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #3470 = VCMPPDYrri_alt
20072
  { 3471, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101e170045006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #3471 = VCMPPDZ128rmbi
20073
  { 3472, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101e170045006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #3472 = VCMPPDZ128rmbi_alt
20074
  { 3473, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121e170045006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #3473 = VCMPPDZ128rmbi_altk
20075
  { 3474, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121e170045006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #3474 = VCMPPDZ128rmbik
20076
  { 3475, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001e170045006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #3475 = VCMPPDZ128rmi
20077
  { 3476, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001e170045006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #3476 = VCMPPDZ128rmi_alt
20078
  { 3477, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021e170045006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #3477 = VCMPPDZ128rmi_altk
20079
  { 3478, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021e170045006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #3478 = VCMPPDZ128rmik
20080
  { 3479, 4,  1,  0,  0,  0, 0x2001e170045005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr },  // Inst #3479 = VCMPPDZ128rri
20081
  { 3480, 4,  1,  0,  0,  0, 0x2001e170045005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr },  // Inst #3480 = VCMPPDZ128rri_alt
20082
  { 3481, 5,  1,  0,  0,  0, 0x2021e170045005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr },  // Inst #3481 = VCMPPDZ128rri_altk
20083
  { 3482, 5,  1,  0,  0,  0, 0x2021e170045005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr },  // Inst #3482 = VCMPPDZ128rrik
20084
  { 3483, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109e170045006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #3483 = VCMPPDZ256rmbi
20085
  { 3484, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109e170045006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #3484 = VCMPPDZ256rmbi_alt
20086
  { 3485, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129e170045006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #3485 = VCMPPDZ256rmbi_altk
20087
  { 3486, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129e170045006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #3486 = VCMPPDZ256rmbik
20088
  { 3487, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009e170045006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #3487 = VCMPPDZ256rmi
20089
  { 3488, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009e170045006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #3488 = VCMPPDZ256rmi_alt
20090
  { 3489, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029e170045006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #3489 = VCMPPDZ256rmi_altk
20091
  { 3490, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029e170045006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #3490 = VCMPPDZ256rmik
20092
  { 3491, 4,  1,  0,  0,  0, 0x4009e170045005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr },  // Inst #3491 = VCMPPDZ256rri
20093
  { 3492, 4,  1,  0,  0,  0, 0x4009e170045005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr },  // Inst #3492 = VCMPPDZ256rri_alt
20094
  { 3493, 5,  1,  0,  0,  0, 0x4029e170045005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr },  // Inst #3493 = VCMPPDZ256rri_altk
20095
  { 3494, 5,  1,  0,  0,  0, 0x4029e170045005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr },  // Inst #3494 = VCMPPDZ256rrik
20096
  { 3495, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181e170045006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #3495 = VCMPPDZrmbi
20097
  { 3496, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181e170045006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #3496 = VCMPPDZrmbi_alt
20098
  { 3497, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1e170045006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #3497 = VCMPPDZrmbi_altk
20099
  { 3498, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1e170045006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #3498 = VCMPPDZrmbik
20100
  { 3499, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081e170045006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #3499 = VCMPPDZrmi
20101
  { 3500, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081e170045006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #3500 = VCMPPDZrmi_alt
20102
  { 3501, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1e170045006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #3501 = VCMPPDZrmi_altk
20103
  { 3502, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1e170045006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #3502 = VCMPPDZrmik
20104
  { 3503, 4,  1,  0,  0,  0, 0x8081e170045005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr },  // Inst #3503 = VCMPPDZrri
20105
  { 3504, 4,  1,  0,  0,  0, 0x8081e170045005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr },  // Inst #3504 = VCMPPDZrri_alt
20106
  { 3505, 5,  1,  0,  0,  0, 0x80a1e170045005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr },  // Inst #3505 = VCMPPDZrri_altk
20107
  { 3506, 4,  1,  0,  0,  0, 0x1181e170045005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr },  // Inst #3506 = VCMPPDZrrib
20108
  { 3507, 4,  1,  0,  0,  0, 0x1181e170045005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr },  // Inst #3507 = VCMPPDZrrib_alt
20109
  { 3508, 5,  1,  0,  0,  0, 0x11a1e170045005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr },  // Inst #3508 = VCMPPDZrrib_altk
20110
  { 3509, 5,  1,  0,  0,  0, 0x11a1e170045005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr },  // Inst #3509 = VCMPPDZrribk
20111
  { 3510, 5,  1,  0,  0,  0, 0x80a1e170045005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr },  // Inst #3510 = VCMPPDZrrik
20112
  { 3511, 8,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x16130045006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #3511 = VCMPPDrmi
20113
  { 3512, 8,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x16130045006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #3512 = VCMPPDrmi_alt
20114
  { 3513, 4,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x16130045005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #3513 = VCMPPDrri
20115
  { 3514, 4,  1,  0,  16, 0, 0x16130045005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #3514 = VCMPPDrri_alt
20116
  { 3515, 8,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x96128044806ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #3515 = VCMPPSYrmi
20117
  { 3516, 8,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x96128044806ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #3516 = VCMPPSYrmi_alt
20118
  { 3517, 4,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x96128044805ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #3517 = VCMPPSYrri
20119
  { 3518, 4,  1,  0,  16, 0, 0x96128044805ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #3518 = VCMPPSYrri_alt
20120
  { 3519, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9016168044806ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #3519 = VCMPPSZ128rmbi
20121
  { 3520, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9016168044806ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #3520 = VCMPPSZ128rmbi_alt
20122
  { 3521, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9216168044806ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #3521 = VCMPPSZ128rmbi_altk
20123
  { 3522, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9216168044806ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #3522 = VCMPPSZ128rmbik
20124
  { 3523, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016168044806ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #3523 = VCMPPSZ128rmi
20125
  { 3524, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016168044806ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #3524 = VCMPPSZ128rmi_alt
20126
  { 3525, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216168044806ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #3525 = VCMPPSZ128rmi_altk
20127
  { 3526, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216168044806ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #3526 = VCMPPSZ128rmik
20128
  { 3527, 4,  1,  0,  0,  0, 0x20016168044805ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr },  // Inst #3527 = VCMPPSZ128rri
20129
  { 3528, 4,  1,  0,  0,  0, 0x20016168044805ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr },  // Inst #3528 = VCMPPSZ128rri_alt
20130
  { 3529, 5,  1,  0,  0,  0, 0x20216168044805ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr },  // Inst #3529 = VCMPPSZ128rri_altk
20131
  { 3530, 5,  1,  0,  0,  0, 0x20216168044805ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr },  // Inst #3530 = VCMPPSZ128rrik
20132
  { 3531, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9096168044806ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #3531 = VCMPPSZ256rmbi
20133
  { 3532, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9096168044806ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #3532 = VCMPPSZ256rmbi_alt
20134
  { 3533, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9296168044806ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #3533 = VCMPPSZ256rmbi_altk
20135
  { 3534, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9296168044806ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #3534 = VCMPPSZ256rmbik
20136
  { 3535, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096168044806ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #3535 = VCMPPSZ256rmi
20137
  { 3536, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096168044806ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #3536 = VCMPPSZ256rmi_alt
20138
  { 3537, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296168044806ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #3537 = VCMPPSZ256rmi_altk
20139
  { 3538, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296168044806ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #3538 = VCMPPSZ256rmik
20140
  { 3539, 4,  1,  0,  0,  0, 0x40096168044805ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr },  // Inst #3539 = VCMPPSZ256rri
20141
  { 3540, 4,  1,  0,  0,  0, 0x40096168044805ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr },  // Inst #3540 = VCMPPSZ256rri_alt
20142
  { 3541, 5,  1,  0,  0,  0, 0x40296168044805ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr },  // Inst #3541 = VCMPPSZ256rri_altk
20143
  { 3542, 5,  1,  0,  0,  0, 0x40296168044805ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr },  // Inst #3542 = VCMPPSZ256rrik
20144
  { 3543, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9816168044806ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #3543 = VCMPPSZrmbi
20145
  { 3544, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9816168044806ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #3544 = VCMPPSZrmbi_alt
20146
  { 3545, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a16168044806ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #3545 = VCMPPSZrmbi_altk
20147
  { 3546, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a16168044806ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #3546 = VCMPPSZrmbik
20148
  { 3547, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816168044806ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #3547 = VCMPPSZrmi
20149
  { 3548, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816168044806ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #3548 = VCMPPSZrmi_alt
20150
  { 3549, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16168044806ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #3549 = VCMPPSZrmi_altk
20151
  { 3550, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16168044806ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #3550 = VCMPPSZrmik
20152
  { 3551, 4,  1,  0,  0,  0, 0x80816168044805ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr },  // Inst #3551 = VCMPPSZrri
20153
  { 3552, 4,  1,  0,  0,  0, 0x80816168044805ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr },  // Inst #3552 = VCMPPSZrri_alt
20154
  { 3553, 5,  1,  0,  0,  0, 0x80a16168044805ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr },  // Inst #3553 = VCMPPSZrri_altk
20155
  { 3554, 4,  1,  0,  0,  0, 0x9816168044805ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr },  // Inst #3554 = VCMPPSZrrib
20156
  { 3555, 4,  1,  0,  0,  0, 0x9816168044805ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr },  // Inst #3555 = VCMPPSZrrib_alt
20157
  { 3556, 5,  1,  0,  0,  0, 0x9a16168044805ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr },  // Inst #3556 = VCMPPSZrrib_altk
20158
  { 3557, 5,  1,  0,  0,  0, 0x9a16168044805ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr },  // Inst #3557 = VCMPPSZrribk
20159
  { 3558, 5,  1,  0,  0,  0, 0x80a16168044805ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr },  // Inst #3558 = VCMPPSZrrik
20160
  { 3559, 8,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x16128044806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #3559 = VCMPPSrmi
20161
  { 3560, 8,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x16128044806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #3560 = VCMPPSrmi_alt
20162
  { 3561, 4,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x16128044805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #3561 = VCMPPSrri
20163
  { 3562, 4,  1,  0,  16, 0, 0x16128044805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #3562 = VCMPPSrri_alt
20164
  { 3563, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x1001e178046006ULL, nullptr, nullptr, OperandInfo406, -1 ,nullptr },  // Inst #3563 = VCMPSDZrm
20165
  { 3564, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1001e178046006ULL, nullptr, nullptr, OperandInfo407, -1 ,nullptr },  // Inst #3564 = VCMPSDZrm_Int
20166
  { 3565, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1021e178046006ULL, nullptr, nullptr, OperandInfo408, -1 ,nullptr },  // Inst #3565 = VCMPSDZrm_Intk
20167
  { 3566, 8,  1,  0,  0,  0, 0x1001e178046006ULL, nullptr, nullptr, OperandInfo407, -1 ,nullptr },  // Inst #3566 = VCMPSDZrmi_alt
20168
  { 3567, 9,  1,  0,  0,  0, 0x1021e178046006ULL, nullptr, nullptr, OperandInfo408, -1 ,nullptr },  // Inst #3567 = VCMPSDZrmi_altk
20169
  { 3568, 4,  1,  0,  526,  0, 0x2001e178046005ULL, nullptr, nullptr, OperandInfo409, -1 ,nullptr },  // Inst #3568 = VCMPSDZrr
20170
  { 3569, 4,  1,  0,  0,  0, 0x2001e178046005ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr },  // Inst #3569 = VCMPSDZrr_Int
20171
  { 3570, 5,  1,  0,  0,  0, 0x2021e178046005ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr },  // Inst #3570 = VCMPSDZrr_Intk
20172
  { 3571, 4,  1,  0,  0,  0, 0x101e178046005ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr },  // Inst #3571 = VCMPSDZrrb_Int
20173
  { 3572, 5,  1,  0,  0,  0, 0x121e178046005ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr },  // Inst #3572 = VCMPSDZrrb_Intk
20174
  { 3573, 4,  1,  0,  0,  0, 0x101e178046005ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr },  // Inst #3573 = VCMPSDZrrb_alt
20175
  { 3574, 5,  1,  0,  0,  0, 0x121e178046005ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr },  // Inst #3574 = VCMPSDZrrb_altk
20176
  { 3575, 4,  1,  0,  0,  0, 0x2001e178046005ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr },  // Inst #3575 = VCMPSDZrri_alt
20177
  { 3576, 5,  1,  0,  0,  0, 0x2021e178046005ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr },  // Inst #3576 = VCMPSDZrri_altk
20178
  { 3577, 8,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x116120046006ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #3577 = VCMPSDrm
20179
  { 3578, 8,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x116120046006ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #3578 = VCMPSDrm_alt
20180
  { 3579, 4,  1,  0,  20, 0, 0x116120046005ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr },  // Inst #3579 = VCMPSDrr
20181
  { 3580, 4,  1,  0,  20, 0, 0x116120046005ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr },  // Inst #3580 = VCMPSDrr_alt
20182
  { 3581, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x8016178045806ULL, nullptr, nullptr, OperandInfo413, -1 ,nullptr },  // Inst #3581 = VCMPSSZrm
20183
  { 3582, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8016178045806ULL, nullptr, nullptr, OperandInfo407, -1 ,nullptr },  // Inst #3582 = VCMPSSZrm_Int
20184
  { 3583, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8216178045806ULL, nullptr, nullptr, OperandInfo408, -1 ,nullptr },  // Inst #3583 = VCMPSSZrm_Intk
20185
  { 3584, 8,  1,  0,  0,  0, 0x8016178045806ULL, nullptr, nullptr, OperandInfo407, -1 ,nullptr },  // Inst #3584 = VCMPSSZrmi_alt
20186
  { 3585, 9,  1,  0,  0,  0, 0x8216178045806ULL, nullptr, nullptr, OperandInfo408, -1 ,nullptr },  // Inst #3585 = VCMPSSZrmi_altk
20187
  { 3586, 4,  1,  0,  526,  0, 0x20016178045805ULL, nullptr, nullptr, OperandInfo414, -1 ,nullptr },  // Inst #3586 = VCMPSSZrr
20188
  { 3587, 4,  1,  0,  0,  0, 0x20016178045805ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr },  // Inst #3587 = VCMPSSZrr_Int
20189
  { 3588, 5,  1,  0,  0,  0, 0x20216178045805ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr },  // Inst #3588 = VCMPSSZrr_Intk
20190
  { 3589, 4,  1,  0,  0,  0, 0x1016178045805ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr },  // Inst #3589 = VCMPSSZrrb_Int
20191
  { 3590, 5,  1,  0,  0,  0, 0x1216178045805ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr },  // Inst #3590 = VCMPSSZrrb_Intk
20192
  { 3591, 4,  1,  0,  0,  0, 0x1016178045805ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr },  // Inst #3591 = VCMPSSZrrb_alt
20193
  { 3592, 5,  1,  0,  0,  0, 0x1216178045805ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr },  // Inst #3592 = VCMPSSZrrb_altk
20194
  { 3593, 4,  1,  0,  0,  0, 0x20016178045805ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr },  // Inst #3593 = VCMPSSZrri_alt
20195
  { 3594, 5,  1,  0,  0,  0, 0x20216178045805ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr },  // Inst #3594 = VCMPSSZrri_altk
20196
  { 3595, 8,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x116120045806ULL, nullptr, nullptr, OperandInfo415, -1 ,nullptr },  // Inst #3595 = VCMPSSrm
20197
  { 3596, 8,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x116120045806ULL, nullptr, nullptr, OperandInfo415, -1 ,nullptr },  // Inst #3596 = VCMPSSrm_alt
20198
  { 3597, 4,  1,  0,  20, 0, 0x116120045805ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #3597 = VCMPSSrr
20199
  { 3598, 4,  1,  0,  20, 0, 0x116120045805ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #3598 = VCMPSSrr_alt
20200
  { 3599, 2,  0,  0,  76, 0, 0x111097f0045005ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr },  // Inst #3599 = VCOMISDZrb
20201
  { 3600, 6,  0,  0,  75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x101097e0005006ULL, nullptr, ImplicitList6, OperandInfo416, -1 ,nullptr },  // Inst #3600 = VCOMISDZrm
20202
  { 3601, 2,  0,  0,  76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x101097e0005005ULL, nullptr, ImplicitList6, OperandInfo417, -1 ,nullptr },  // Inst #3601 = VCOMISDZrr
20203
  { 3602, 6,  0,  0,  75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1017a0005006ULL, nullptr, ImplicitList6, OperandInfo113, -1 ,nullptr },  // Inst #3602 = VCOMISDrm
20204
  { 3603, 2,  0,  0,  76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1017a0005005ULL, nullptr, ImplicitList6, OperandInfo114, -1 ,nullptr },  // Inst #3603 = VCOMISDrr
20205
  { 3604, 2,  0,  0,  76, 0, 0x91017e8044805ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr },  // Inst #3604 = VCOMISSZrb
20206
  { 3605, 6,  0,  0,  75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81017e0004806ULL, nullptr, ImplicitList6, OperandInfo418, -1 ,nullptr },  // Inst #3605 = VCOMISSZrm
20207
  { 3606, 2,  0,  0,  76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81017e0004805ULL, nullptr, ImplicitList6, OperandInfo419, -1 ,nullptr },  // Inst #3606 = VCOMISSZrr
20208
  { 3607, 6,  0,  0,  75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1017a0004806ULL, nullptr, ImplicitList6, OperandInfo115, -1 ,nullptr },  // Inst #3607 = VCOMISSrm
20209
  { 3608, 2,  0,  0,  76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1017a0004805ULL, nullptr, ImplicitList6, OperandInfo116, -1 ,nullptr },  // Inst #3608 = VCOMISSrr
20210
  { 3609, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1000c578009004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #3609 = VCOMPRESSPDZ128mr
20211
  { 3610, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1020c578009004ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #3610 = VCOMPRESSPDZ128mrk
20212
  { 3611, 2,  1,  0,  0,  0, 0x2000c578009003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3611 = VCOMPRESSPDZ128rr
20213
  { 3612, 4,  1,  0,  0,  0, 0x2020c578009003ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #3612 = VCOMPRESSPDZ128rrk
20214
  { 3613, 3,  1,  0,  0,  0, 0x2060c578009003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #3613 = VCOMPRESSPDZ128rrkz
20215
  { 3614, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1008c578009004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #3614 = VCOMPRESSPDZ256mr
20216
  { 3615, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1028c578009004ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #3615 = VCOMPRESSPDZ256mrk
20217
  { 3616, 2,  1,  0,  0,  0, 0x4008c578009003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #3616 = VCOMPRESSPDZ256rr
20218
  { 3617, 4,  1,  0,  0,  0, 0x4028c578009003ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #3617 = VCOMPRESSPDZ256rrk
20219
  { 3618, 3,  1,  0,  0,  0, 0x4068c578009003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #3618 = VCOMPRESSPDZ256rrkz
20220
  { 3619, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1080c578009004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #3619 = VCOMPRESSPDZmr
20221
  { 3620, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10a0c578009004ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #3620 = VCOMPRESSPDZmrk
20222
  { 3621, 2,  1,  0,  0,  0, 0x8080c578009003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #3621 = VCOMPRESSPDZrr
20223
  { 3622, 4,  1,  0,  0,  0, 0x80a0c578009003ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #3622 = VCOMPRESSPDZrrk
20224
  { 3623, 3,  1,  0,  0,  0, 0x80e0c578009003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #3623 = VCOMPRESSPDZrrkz
20225
  { 3624, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8004578009004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #3624 = VCOMPRESSPSZ128mr
20226
  { 3625, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8204578009004ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #3625 = VCOMPRESSPSZ128mrk
20227
  { 3626, 2,  1,  0,  0,  0, 0x20004578009003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3626 = VCOMPRESSPSZ128rr
20228
  { 3627, 4,  1,  0,  0,  0, 0x20204578009003ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #3627 = VCOMPRESSPSZ128rrk
20229
  { 3628, 3,  1,  0,  0,  0, 0x20604578009003ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #3628 = VCOMPRESSPSZ128rrkz
20230
  { 3629, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8084578009004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #3629 = VCOMPRESSPSZ256mr
20231
  { 3630, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8284578009004ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #3630 = VCOMPRESSPSZ256mrk
20232
  { 3631, 2,  1,  0,  0,  0, 0x40084578009003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #3631 = VCOMPRESSPSZ256rr
20233
  { 3632, 4,  1,  0,  0,  0, 0x40284578009003ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #3632 = VCOMPRESSPSZ256rrk
20234
  { 3633, 3,  1,  0,  0,  0, 0x40684578009003ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #3633 = VCOMPRESSPSZ256rrkz
20235
  { 3634, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8804578009004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #3634 = VCOMPRESSPSZmr
20236
  { 3635, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8a04578009004ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #3635 = VCOMPRESSPSZmrk
20237
  { 3636, 2,  1,  0,  0,  0, 0x80804578009003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #3636 = VCOMPRESSPSZrr
20238
  { 3637, 4,  1,  0,  0,  0, 0x80a04578009003ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #3637 = VCOMPRESSPSZrrk
20239
  { 3638, 3,  1,  0,  0,  0, 0x80e04578009003ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #3638 = VCOMPRESSPSZrrkz
20240
  { 3639, 6,  1,  0,  253,  0|(1ULL<<MCID::MayLoad), 0x87320005806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #3639 = VCVTDQ2PDYrm
20241
  { 3640, 2,  1,  0,  880,  0, 0x87320005805ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #3640 = VCVTDQ2PDYrr
20242
  { 3641, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10007360005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3641 = VCVTDQ2PDZ128rm
20243
  { 3642, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9007360005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3642 = VCVTDQ2PDZ128rmb
20244
  { 3643, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9207360005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #3643 = VCVTDQ2PDZ128rmbk
20245
  { 3644, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9607360005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #3644 = VCVTDQ2PDZ128rmbkz
20246
  { 3645, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10207360005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #3645 = VCVTDQ2PDZ128rmk
20247
  { 3646, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10607360005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #3646 = VCVTDQ2PDZ128rmkz
20248
  { 3647, 2,  1,  0,  0,  0, 0x10007360005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3647 = VCVTDQ2PDZ128rr
20249
  { 3648, 4,  1,  0,  0,  0, 0x10207360005805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #3648 = VCVTDQ2PDZ128rrk
20250
  { 3649, 3,  1,  0,  0,  0, 0x10607360005805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #3649 = VCVTDQ2PDZ128rrkz
20251
  { 3650, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20087360005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3650 = VCVTDQ2PDZ256rm
20252
  { 3651, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9087360005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3651 = VCVTDQ2PDZ256rmb
20253
  { 3652, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9287360005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3652 = VCVTDQ2PDZ256rmbk
20254
  { 3653, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9687360005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3653 = VCVTDQ2PDZ256rmbkz
20255
  { 3654, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20287360005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3654 = VCVTDQ2PDZ256rmk
20256
  { 3655, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20687360005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3655 = VCVTDQ2PDZ256rmkz
20257
  { 3656, 2,  1,  0,  0,  0, 0x20087360005805ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #3656 = VCVTDQ2PDZ256rr
20258
  { 3657, 4,  1,  0,  0,  0, 0x20287360005805ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #3657 = VCVTDQ2PDZ256rrk
20259
  { 3658, 3,  1,  0,  0,  0, 0x20687360005805ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #3658 = VCVTDQ2PDZ256rrkz
20260
  { 3659, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40807360005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3659 = VCVTDQ2PDZrm
20261
  { 3660, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9807360005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3660 = VCVTDQ2PDZrmb
20262
  { 3661, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a07360005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3661 = VCVTDQ2PDZrmbk
20263
  { 3662, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e07360005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3662 = VCVTDQ2PDZrmbkz
20264
  { 3663, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a07360005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3663 = VCVTDQ2PDZrmk
20265
  { 3664, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e07360005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3664 = VCVTDQ2PDZrmkz
20266
  { 3665, 2,  1,  0,  0,  0, 0x40807360005805ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #3665 = VCVTDQ2PDZrr
20267
  { 3666, 4,  1,  0,  0,  0, 0x40a07360005805ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #3666 = VCVTDQ2PDZrrk
20268
  { 3667, 3,  1,  0,  0,  0, 0x40e07360005805ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #3667 = VCVTDQ2PDZrrkz
20269
  { 3668, 6,  1,  0,  253,  0|(1ULL<<MCID::MayLoad), 0x7320005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #3668 = VCVTDQ2PDrm
20270
  { 3669, 2,  1,  0,  879,  0, 0x7320005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #3669 = VCVTDQ2PDrr
20271
  { 3670, 6,  1,  0,  83, 0|(1ULL<<MCID::MayLoad), 0x82da8004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #3670 = VCVTDQ2PSYrm
20272
  { 3671, 2,  1,  0,  84, 0, 0x82da8004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #3671 = VCVTDQ2PSYrr
20273
  { 3672, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20002de0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3672 = VCVTDQ2PSZ128rm
20274
  { 3673, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9002de0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3673 = VCVTDQ2PSZ128rmb
20275
  { 3674, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9202de0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3674 = VCVTDQ2PSZ128rmbk
20276
  { 3675, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9602de0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3675 = VCVTDQ2PSZ128rmbkz
20277
  { 3676, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20202de0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3676 = VCVTDQ2PSZ128rmk
20278
  { 3677, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20602de0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3677 = VCVTDQ2PSZ128rmkz
20279
  { 3678, 2,  1,  0,  0,  0, 0x20002de0004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3678 = VCVTDQ2PSZ128rr
20280
  { 3679, 4,  1,  0,  0,  0, 0x20202de0004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #3679 = VCVTDQ2PSZ128rrk
20281
  { 3680, 3,  1,  0,  0,  0, 0x20602de0004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #3680 = VCVTDQ2PSZ128rrkz
20282
  { 3681, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40082de0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3681 = VCVTDQ2PSZ256rm
20283
  { 3682, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9082de0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3682 = VCVTDQ2PSZ256rmb
20284
  { 3683, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9282de0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3683 = VCVTDQ2PSZ256rmbk
20285
  { 3684, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9682de0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3684 = VCVTDQ2PSZ256rmbkz
20286
  { 3685, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40282de0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3685 = VCVTDQ2PSZ256rmk
20287
  { 3686, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40682de0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3686 = VCVTDQ2PSZ256rmkz
20288
  { 3687, 2,  1,  0,  0,  0, 0x40082de0004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #3687 = VCVTDQ2PSZ256rr
20289
  { 3688, 4,  1,  0,  0,  0, 0x40282de0004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #3688 = VCVTDQ2PSZ256rrk
20290
  { 3689, 3,  1,  0,  0,  0, 0x40682de0004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #3689 = VCVTDQ2PSZ256rrkz
20291
  { 3690, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80802de0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3690 = VCVTDQ2PSZrm
20292
  { 3691, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9802de0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3691 = VCVTDQ2PSZrmb
20293
  { 3692, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a02de0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #3692 = VCVTDQ2PSZrmbk
20294
  { 3693, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e02de0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #3693 = VCVTDQ2PSZrmbkz
20295
  { 3694, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a02de0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #3694 = VCVTDQ2PSZrmk
20296
  { 3695, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e02de0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #3695 = VCVTDQ2PSZrmkz
20297
  { 3696, 2,  1,  0,  0,  0, 0x80802de0004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #3696 = VCVTDQ2PSZrr
20298
  { 3697, 3,  1,  0,  0,  0, 0x409802de0004805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #3697 = VCVTDQ2PSZrrb
20299
  { 3698, 5,  1,  0,  0,  0, 0x409a02de0004805ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #3698 = VCVTDQ2PSZrrbk
20300
  { 3699, 4,  1,  0,  0,  0, 0x409e02de0004805ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #3699 = VCVTDQ2PSZrrbkz
20301
  { 3700, 4,  1,  0,  0,  0, 0x80a02de0004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #3700 = VCVTDQ2PSZrrk
20302
  { 3701, 3,  1,  0,  0,  0, 0x80e02de0004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #3701 = VCVTDQ2PSZrrkz
20303
  { 3702, 6,  1,  0,  83, 0|(1ULL<<MCID::MayLoad), 0x2da8004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #3702 = VCVTDQ2PSrm
20304
  { 3703, 2,  1,  0,  84, 0, 0x2da8004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #3703 = VCVTDQ2PSrr
20305
  { 3704, 6,  1,  0,  533,  0|(1ULL<<MCID::MayLoad), 0x7320006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #3704 = VCVTPD2DQXrm
20306
  { 3705, 6,  1,  0,  886,  0|(1ULL<<MCID::MayLoad), 0x87320006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #3705 = VCVTPD2DQYrm
20307
  { 3706, 2,  1,  0,  884,  0, 0x87320006005ULL, nullptr, nullptr, OperandInfo450, -1 ,nullptr },  // Inst #3706 = VCVTPD2DQYrr
20308
  { 3707, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000f360006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3707 = VCVTPD2DQZ128rm
20309
  { 3708, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100f360006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3708 = VCVTPD2DQZ128rmb
20310
  { 3709, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120f360006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3709 = VCVTPD2DQZ128rmbk
20311
  { 3710, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160f360006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3710 = VCVTPD2DQZ128rmbkz
20312
  { 3711, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020f360006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3711 = VCVTPD2DQZ128rmk
20313
  { 3712, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060f360006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3712 = VCVTPD2DQZ128rmkz
20314
  { 3713, 2,  1,  0,  0,  0, 0x2000f360006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3713 = VCVTPD2DQZ128rr
20315
  { 3714, 4,  1,  0,  0,  0, 0x2020f360006005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #3714 = VCVTPD2DQZ128rrk
20316
  { 3715, 3,  1,  0,  0,  0, 0x2060f360006005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #3715 = VCVTPD2DQZ128rrkz
20317
  { 3716, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008f360006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3716 = VCVTPD2DQZ256rm
20318
  { 3717, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108f360006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3717 = VCVTPD2DQZ256rmb
20319
  { 3718, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128f360006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3718 = VCVTPD2DQZ256rmbk
20320
  { 3719, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168f360006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3719 = VCVTPD2DQZ256rmbkz
20321
  { 3720, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028f360006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3720 = VCVTPD2DQZ256rmk
20322
  { 3721, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068f360006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3721 = VCVTPD2DQZ256rmkz
20323
  { 3722, 2,  1,  0,  0,  0, 0x4008f360006005ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #3722 = VCVTPD2DQZ256rr
20324
  { 3723, 4,  1,  0,  0,  0, 0x4028f360006005ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr },  // Inst #3723 = VCVTPD2DQZ256rrk
20325
  { 3724, 3,  1,  0,  0,  0, 0x4068f360006005ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr },  // Inst #3724 = VCVTPD2DQZ256rrkz
20326
  { 3725, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080f360006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3725 = VCVTPD2DQZrm
20327
  { 3726, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180f360006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3726 = VCVTPD2DQZrmb
20328
  { 3727, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0f360006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3727 = VCVTPD2DQZrmbk
20329
  { 3728, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0f360006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3728 = VCVTPD2DQZrmbkz
20330
  { 3729, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0f360006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3729 = VCVTPD2DQZrmk
20331
  { 3730, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0f360006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3730 = VCVTPD2DQZrmkz
20332
  { 3731, 2,  1,  0,  0,  0, 0x8080f360006005ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #3731 = VCVTPD2DQZrr
20333
  { 3732, 3,  1,  0,  0,  0, 0x41180f360006005ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr },  // Inst #3732 = VCVTPD2DQZrrb
20334
  { 3733, 5,  1,  0,  0,  0, 0x411a0f360006005ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr },  // Inst #3733 = VCVTPD2DQZrrbk
20335
  { 3734, 4,  1,  0,  0,  0, 0x411e0f360006005ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr },  // Inst #3734 = VCVTPD2DQZrrbkz
20336
  { 3735, 4,  1,  0,  0,  0, 0x80a0f360006005ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #3735 = VCVTPD2DQZrrk
20337
  { 3736, 3,  1,  0,  0,  0, 0x80e0f360006005ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #3736 = VCVTPD2DQZrrkz
20338
  { 3737, 2,  1,  0,  882,  0, 0x7320006005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #3737 = VCVTPD2DQrr
20339
  { 3738, 6,  1,  0,  866,  0|(1ULL<<MCID::MayLoad), 0x2d30005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #3738 = VCVTPD2PSXrm
20340
  { 3739, 6,  1,  0,  868,  0|(1ULL<<MCID::MayLoad), 0x82d30005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #3739 = VCVTPD2PSYrm
20341
  { 3740, 2,  1,  0,  867,  0, 0x82d30005005ULL, nullptr, nullptr, OperandInfo450, -1 ,nullptr },  // Inst #3740 = VCVTPD2PSYrr
20342
  { 3741, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000ad60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3741 = VCVTPD2PSZ128rm
20343
  { 3742, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100ad60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3742 = VCVTPD2PSZ128rmb
20344
  { 3743, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120ad60005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3743 = VCVTPD2PSZ128rmbk
20345
  { 3744, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160ad60005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3744 = VCVTPD2PSZ128rmbkz
20346
  { 3745, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020ad60005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3745 = VCVTPD2PSZ128rmk
20347
  { 3746, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060ad60005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3746 = VCVTPD2PSZ128rmkz
20348
  { 3747, 2,  1,  0,  0,  0, 0x2000ad60005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3747 = VCVTPD2PSZ128rr
20349
  { 3748, 4,  1,  0,  0,  0, 0x2020ad60005005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #3748 = VCVTPD2PSZ128rrk
20350
  { 3749, 3,  1,  0,  0,  0, 0x2060ad60005005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #3749 = VCVTPD2PSZ128rrkz
20351
  { 3750, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008ad60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3750 = VCVTPD2PSZ256rm
20352
  { 3751, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108ad60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3751 = VCVTPD2PSZ256rmb
20353
  { 3752, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128ad60005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3752 = VCVTPD2PSZ256rmbk
20354
  { 3753, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168ad60005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3753 = VCVTPD2PSZ256rmbkz
20355
  { 3754, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028ad60005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3754 = VCVTPD2PSZ256rmk
20356
  { 3755, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068ad60005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3755 = VCVTPD2PSZ256rmkz
20357
  { 3756, 2,  1,  0,  0,  0, 0x4008ad60005005ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #3756 = VCVTPD2PSZ256rr
20358
  { 3757, 4,  1,  0,  0,  0, 0x4028ad60005005ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr },  // Inst #3757 = VCVTPD2PSZ256rrk
20359
  { 3758, 3,  1,  0,  0,  0, 0x4068ad60005005ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr },  // Inst #3758 = VCVTPD2PSZ256rrkz
20360
  { 3759, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080ad60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3759 = VCVTPD2PSZrm
20361
  { 3760, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180ad60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3760 = VCVTPD2PSZrmb
20362
  { 3761, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0ad60005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3761 = VCVTPD2PSZrmbk
20363
  { 3762, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0ad60005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3762 = VCVTPD2PSZrmbkz
20364
  { 3763, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0ad60005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3763 = VCVTPD2PSZrmk
20365
  { 3764, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0ad60005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3764 = VCVTPD2PSZrmkz
20366
  { 3765, 2,  1,  0,  0,  0, 0x8080ad60005005ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #3765 = VCVTPD2PSZrr
20367
  { 3766, 3,  1,  0,  0,  0, 0x41180ad60005005ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr },  // Inst #3766 = VCVTPD2PSZrrb
20368
  { 3767, 5,  1,  0,  0,  0, 0x411a0ad60005005ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr },  // Inst #3767 = VCVTPD2PSZrrbk
20369
  { 3768, 4,  1,  0,  0,  0, 0x411e0ad60005005ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr },  // Inst #3768 = VCVTPD2PSZrrbkz
20370
  { 3769, 4,  1,  0,  0,  0, 0x80a0ad60005005ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #3769 = VCVTPD2PSZrrk
20371
  { 3770, 3,  1,  0,  0,  0, 0x80e0ad60005005ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #3770 = VCVTPD2PSZrrkz
20372
  { 3771, 2,  1,  0,  865,  0, 0x2d30005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #3771 = VCVTPD2PSrr
20373
  { 3772, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000bde0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3772 = VCVTPD2QQZ128rm
20374
  { 3773, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100bde0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3773 = VCVTPD2QQZ128rmb
20375
  { 3774, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120bde0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #3774 = VCVTPD2QQZ128rmbk
20376
  { 3775, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160bde0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #3775 = VCVTPD2QQZ128rmbkz
20377
  { 3776, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020bde0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #3776 = VCVTPD2QQZ128rmk
20378
  { 3777, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060bde0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #3777 = VCVTPD2QQZ128rmkz
20379
  { 3778, 2,  1,  0,  0,  0, 0x2000bde0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3778 = VCVTPD2QQZ128rr
20380
  { 3779, 4,  1,  0,  0,  0, 0x2020bde0005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #3779 = VCVTPD2QQZ128rrk
20381
  { 3780, 3,  1,  0,  0,  0, 0x2060bde0005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #3780 = VCVTPD2QQZ128rrkz
20382
  { 3781, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008bde0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3781 = VCVTPD2QQZ256rm
20383
  { 3782, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108bde0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3782 = VCVTPD2QQZ256rmb
20384
  { 3783, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128bde0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3783 = VCVTPD2QQZ256rmbk
20385
  { 3784, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168bde0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3784 = VCVTPD2QQZ256rmbkz
20386
  { 3785, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028bde0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3785 = VCVTPD2QQZ256rmk
20387
  { 3786, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068bde0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3786 = VCVTPD2QQZ256rmkz
20388
  { 3787, 2,  1,  0,  0,  0, 0x4008bde0005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #3787 = VCVTPD2QQZ256rr
20389
  { 3788, 4,  1,  0,  0,  0, 0x4028bde0005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #3788 = VCVTPD2QQZ256rrk
20390
  { 3789, 3,  1,  0,  0,  0, 0x4068bde0005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #3789 = VCVTPD2QQZ256rrkz
20391
  { 3790, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080bde0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3790 = VCVTPD2QQZrm
20392
  { 3791, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180bde0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3791 = VCVTPD2QQZrmb
20393
  { 3792, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0bde0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3792 = VCVTPD2QQZrmbk
20394
  { 3793, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0bde0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3793 = VCVTPD2QQZrmbkz
20395
  { 3794, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0bde0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3794 = VCVTPD2QQZrmk
20396
  { 3795, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0bde0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3795 = VCVTPD2QQZrmkz
20397
  { 3796, 2,  1,  0,  0,  0, 0x8080bde0005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #3796 = VCVTPD2QQZrr
20398
  { 3797, 3,  1,  0,  0,  0, 0x41180bde0005005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #3797 = VCVTPD2QQZrrb
20399
  { 3798, 5,  1,  0,  0,  0, 0x411a0bde0005005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #3798 = VCVTPD2QQZrrbk
20400
  { 3799, 4,  1,  0,  0,  0, 0x411e0bde0005005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #3799 = VCVTPD2QQZrrbkz
20401
  { 3800, 4,  1,  0,  0,  0, 0x80a0bde0005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #3800 = VCVTPD2QQZrrk
20402
  { 3801, 3,  1,  0,  0,  0, 0x80e0bde0005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #3801 = VCVTPD2QQZrrkz
20403
  { 3802, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000bce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3802 = VCVTPD2UDQZ128rm
20404
  { 3803, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100bce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3803 = VCVTPD2UDQZ128rmb
20405
  { 3804, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120bce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3804 = VCVTPD2UDQZ128rmbk
20406
  { 3805, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160bce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3805 = VCVTPD2UDQZ128rmbkz
20407
  { 3806, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020bce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3806 = VCVTPD2UDQZ128rmk
20408
  { 3807, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060bce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3807 = VCVTPD2UDQZ128rmkz
20409
  { 3808, 2,  1,  0,  0,  0, 0x2000bce0004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3808 = VCVTPD2UDQZ128rr
20410
  { 3809, 4,  1,  0,  0,  0, 0x2020bce0004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #3809 = VCVTPD2UDQZ128rrk
20411
  { 3810, 3,  1,  0,  0,  0, 0x2060bce0004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #3810 = VCVTPD2UDQZ128rrkz
20412
  { 3811, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008bce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3811 = VCVTPD2UDQZ256rm
20413
  { 3812, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108bce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3812 = VCVTPD2UDQZ256rmb
20414
  { 3813, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128bce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3813 = VCVTPD2UDQZ256rmbk
20415
  { 3814, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168bce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3814 = VCVTPD2UDQZ256rmbkz
20416
  { 3815, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028bce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3815 = VCVTPD2UDQZ256rmk
20417
  { 3816, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068bce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3816 = VCVTPD2UDQZ256rmkz
20418
  { 3817, 2,  1,  0,  0,  0, 0x4008bce0004805ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #3817 = VCVTPD2UDQZ256rr
20419
  { 3818, 4,  1,  0,  0,  0, 0x4028bce0004805ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr },  // Inst #3818 = VCVTPD2UDQZ256rrk
20420
  { 3819, 3,  1,  0,  0,  0, 0x4068bce0004805ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr },  // Inst #3819 = VCVTPD2UDQZ256rrkz
20421
  { 3820, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080bce0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3820 = VCVTPD2UDQZrm
20422
  { 3821, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180bce0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3821 = VCVTPD2UDQZrmb
20423
  { 3822, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0bce0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3822 = VCVTPD2UDQZrmbk
20424
  { 3823, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0bce0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3823 = VCVTPD2UDQZrmbkz
20425
  { 3824, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0bce0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3824 = VCVTPD2UDQZrmk
20426
  { 3825, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0bce0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3825 = VCVTPD2UDQZrmkz
20427
  { 3826, 2,  1,  0,  0,  0, 0x8080bce0004805ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #3826 = VCVTPD2UDQZrr
20428
  { 3827, 3,  1,  0,  0,  0, 0x41180bce0004805ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr },  // Inst #3827 = VCVTPD2UDQZrrb
20429
  { 3828, 5,  1,  0,  0,  0, 0x411a0bce0004805ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr },  // Inst #3828 = VCVTPD2UDQZrrbk
20430
  { 3829, 4,  1,  0,  0,  0, 0x411e0bce0004805ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr },  // Inst #3829 = VCVTPD2UDQZrrbkz
20431
  { 3830, 4,  1,  0,  0,  0, 0x80a0bce0004805ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #3830 = VCVTPD2UDQZrrk
20432
  { 3831, 3,  1,  0,  0,  0, 0x80e0bce0004805ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #3831 = VCVTPD2UDQZrrkz
20433
  { 3832, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000bce0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3832 = VCVTPD2UQQZ128rm
20434
  { 3833, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100bce0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3833 = VCVTPD2UQQZ128rmb
20435
  { 3834, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120bce0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #3834 = VCVTPD2UQQZ128rmbk
20436
  { 3835, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160bce0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #3835 = VCVTPD2UQQZ128rmbkz
20437
  { 3836, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020bce0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #3836 = VCVTPD2UQQZ128rmk
20438
  { 3837, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060bce0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #3837 = VCVTPD2UQQZ128rmkz
20439
  { 3838, 2,  1,  0,  0,  0, 0x2000bce0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3838 = VCVTPD2UQQZ128rr
20440
  { 3839, 4,  1,  0,  0,  0, 0x2020bce0005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #3839 = VCVTPD2UQQZ128rrk
20441
  { 3840, 3,  1,  0,  0,  0, 0x2060bce0005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #3840 = VCVTPD2UQQZ128rrkz
20442
  { 3841, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008bce0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3841 = VCVTPD2UQQZ256rm
20443
  { 3842, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108bce0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3842 = VCVTPD2UQQZ256rmb
20444
  { 3843, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128bce0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3843 = VCVTPD2UQQZ256rmbk
20445
  { 3844, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168bce0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3844 = VCVTPD2UQQZ256rmbkz
20446
  { 3845, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028bce0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3845 = VCVTPD2UQQZ256rmk
20447
  { 3846, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068bce0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3846 = VCVTPD2UQQZ256rmkz
20448
  { 3847, 2,  1,  0,  0,  0, 0x4008bce0005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #3847 = VCVTPD2UQQZ256rr
20449
  { 3848, 4,  1,  0,  0,  0, 0x4028bce0005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #3848 = VCVTPD2UQQZ256rrk
20450
  { 3849, 3,  1,  0,  0,  0, 0x4068bce0005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #3849 = VCVTPD2UQQZ256rrkz
20451
  { 3850, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080bce0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3850 = VCVTPD2UQQZrm
20452
  { 3851, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180bce0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3851 = VCVTPD2UQQZrmb
20453
  { 3852, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0bce0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3852 = VCVTPD2UQQZrmbk
20454
  { 3853, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0bce0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3853 = VCVTPD2UQQZrmbkz
20455
  { 3854, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0bce0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3854 = VCVTPD2UQQZrmk
20456
  { 3855, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0bce0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3855 = VCVTPD2UQQZrmkz
20457
  { 3856, 2,  1,  0,  0,  0, 0x8080bce0005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #3856 = VCVTPD2UQQZrr
20458
  { 3857, 3,  1,  0,  0,  0, 0x41180bce0005005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #3857 = VCVTPD2UQQZrrb
20459
  { 3858, 5,  1,  0,  0,  0, 0x411a0bce0005005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #3858 = VCVTPD2UQQZrrbk
20460
  { 3859, 4,  1,  0,  0,  0, 0x411e0bce0005005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #3859 = VCVTPD2UQQZrrbkz
20461
  { 3860, 4,  1,  0,  0,  0, 0x80a0bce0005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #3860 = VCVTPD2UQQZrrk
20462
  { 3861, 3,  1,  0,  0,  0, 0x80e0bce0005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #3861 = VCVTPD2UQQZrrkz
20463
  { 3862, 6,  1,  0,  535,  0|(1ULL<<MCID::MayLoad), 0x809a0009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #3862 = VCVTPH2PSYrm
20464
  { 3863, 2,  1,  0,  901,  0, 0x809a0009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #3863 = VCVTPH2PSYrr
20465
  { 3864, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100009e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3864 = VCVTPH2PSZ128rm
20466
  { 3865, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x102009e0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3865 = VCVTPH2PSZ128rmk
20467
  { 3866, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x106009e0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3866 = VCVTPH2PSZ128rmkz
20468
  { 3867, 2,  1,  0,  0,  0, 0x100009e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3867 = VCVTPH2PSZ128rr
20469
  { 3868, 4,  1,  0,  0,  0, 0x102009e0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #3868 = VCVTPH2PSZ128rrk
20470
  { 3869, 3,  1,  0,  0,  0, 0x106009e0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #3869 = VCVTPH2PSZ128rrkz
20471
  { 3870, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200809e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3870 = VCVTPH2PSZ256rm
20472
  { 3871, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202809e0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3871 = VCVTPH2PSZ256rmk
20473
  { 3872, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206809e0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3872 = VCVTPH2PSZ256rmkz
20474
  { 3873, 2,  1,  0,  0,  0, 0x200809e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #3873 = VCVTPH2PSZ256rr
20475
  { 3874, 4,  1,  0,  0,  0, 0x202809e0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr },  // Inst #3874 = VCVTPH2PSZ256rrk
20476
  { 3875, 3,  1,  0,  0,  0, 0x206809e0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr },  // Inst #3875 = VCVTPH2PSZ256rrkz
20477
  { 3876, 2,  1,  0,  0,  0, 0x98009e0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #3876 = VCVTPH2PSZrb
20478
  { 3877, 4,  1,  0,  0,  0, 0x9a009e0009005ULL, nullptr, nullptr, OperandInfo462, -1 ,nullptr },  // Inst #3877 = VCVTPH2PSZrbk
20479
  { 3878, 3,  1,  0,  0,  0, 0x9e009e0009005ULL, nullptr, nullptr, OperandInfo463, -1 ,nullptr },  // Inst #3878 = VCVTPH2PSZrbkz
20480
  { 3879, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x408009e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3879 = VCVTPH2PSZrm
20481
  { 3880, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a009e0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #3880 = VCVTPH2PSZrmk
20482
  { 3881, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e009e0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #3881 = VCVTPH2PSZrmkz
20483
  { 3882, 2,  1,  0,  0,  0, 0x408009e0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #3882 = VCVTPH2PSZrr
20484
  { 3883, 4,  1,  0,  0,  0, 0x40a009e0009005ULL, nullptr, nullptr, OperandInfo462, -1 ,nullptr },  // Inst #3883 = VCVTPH2PSZrrk
20485
  { 3884, 3,  1,  0,  0,  0, 0x40e009e0009005ULL, nullptr, nullptr, OperandInfo463, -1 ,nullptr },  // Inst #3884 = VCVTPH2PSZrrkz
20486
  { 3885, 6,  1,  0,  535,  0|(1ULL<<MCID::MayLoad), 0x9a0009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #3885 = VCVTPH2PSrm
20487
  { 3886, 2,  1,  0,  901,  0, 0x9a0009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #3886 = VCVTPH2PSrr
20488
  { 3887, 6,  1,  0,  89, 0|(1ULL<<MCID::MayLoad), 0x82db0005006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #3887 = VCVTPS2DQYrm
20489
  { 3888, 2,  1,  0,  90, 0, 0x82db0005005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #3888 = VCVTPS2DQYrr
20490
  { 3889, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20002de0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3889 = VCVTPS2DQZ128rm
20491
  { 3890, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9002de0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3890 = VCVTPS2DQZ128rmb
20492
  { 3891, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9202de0005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3891 = VCVTPS2DQZ128rmbk
20493
  { 3892, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9602de0005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3892 = VCVTPS2DQZ128rmbkz
20494
  { 3893, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20202de0005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #3893 = VCVTPS2DQZ128rmk
20495
  { 3894, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20602de0005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #3894 = VCVTPS2DQZ128rmkz
20496
  { 3895, 2,  1,  0,  0,  0, 0x20002de0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3895 = VCVTPS2DQZ128rr
20497
  { 3896, 4,  1,  0,  0,  0, 0x20202de0005005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #3896 = VCVTPS2DQZ128rrk
20498
  { 3897, 3,  1,  0,  0,  0, 0x20602de0005005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #3897 = VCVTPS2DQZ128rrkz
20499
  { 3898, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40082de0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3898 = VCVTPS2DQZ256rm
20500
  { 3899, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9082de0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3899 = VCVTPS2DQZ256rmb
20501
  { 3900, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9282de0005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3900 = VCVTPS2DQZ256rmbk
20502
  { 3901, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9682de0005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3901 = VCVTPS2DQZ256rmbkz
20503
  { 3902, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40282de0005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #3902 = VCVTPS2DQZ256rmk
20504
  { 3903, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40682de0005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #3903 = VCVTPS2DQZ256rmkz
20505
  { 3904, 2,  1,  0,  0,  0, 0x40082de0005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #3904 = VCVTPS2DQZ256rr
20506
  { 3905, 4,  1,  0,  0,  0, 0x40282de0005005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #3905 = VCVTPS2DQZ256rrk
20507
  { 3906, 3,  1,  0,  0,  0, 0x40682de0005005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #3906 = VCVTPS2DQZ256rrkz
20508
  { 3907, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80802de0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3907 = VCVTPS2DQZrm
20509
  { 3908, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9802de0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3908 = VCVTPS2DQZrmb
20510
  { 3909, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a02de0005006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #3909 = VCVTPS2DQZrmbk
20511
  { 3910, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e02de0005006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #3910 = VCVTPS2DQZrmbkz
20512
  { 3911, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a02de0005006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #3911 = VCVTPS2DQZrmk
20513
  { 3912, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e02de0005006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #3912 = VCVTPS2DQZrmkz
20514
  { 3913, 2,  1,  0,  0,  0, 0x80802de0005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #3913 = VCVTPS2DQZrr
20515
  { 3914, 3,  1,  0,  0,  0, 0x409802de0005005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #3914 = VCVTPS2DQZrrb
20516
  { 3915, 5,  1,  0,  0,  0, 0x409a02de0005005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #3915 = VCVTPS2DQZrrbk
20517
  { 3916, 4,  1,  0,  0,  0, 0x409e02de0005005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #3916 = VCVTPS2DQZrrbkz
20518
  { 3917, 4,  1,  0,  0,  0, 0x80a02de0005005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #3917 = VCVTPS2DQZrrk
20519
  { 3918, 3,  1,  0,  0,  0, 0x80e02de0005005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #3918 = VCVTPS2DQZrrkz
20520
  { 3919, 6,  1,  0,  89, 0|(1ULL<<MCID::MayLoad), 0x2db0005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #3919 = VCVTPS2DQrm
20521
  { 3920, 2,  1,  0,  90, 0, 0x2db0005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #3920 = VCVTPS2DQrr
20522
  { 3921, 6,  1,  0,  873,  0|(1ULL<<MCID::MayLoad), 0x82d20004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #3921 = VCVTPS2PDYrm
20523
  { 3922, 2,  1,  0,  874,  0, 0x82d20004805ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #3922 = VCVTPS2PDYrr
20524
  { 3923, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10002d60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3923 = VCVTPS2PDZ128rm
20525
  { 3924, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9002d60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3924 = VCVTPS2PDZ128rmb
20526
  { 3925, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9202d60004806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #3925 = VCVTPS2PDZ128rmbk
20527
  { 3926, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9602d60004806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #3926 = VCVTPS2PDZ128rmbkz
20528
  { 3927, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10202d60004806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #3927 = VCVTPS2PDZ128rmk
20529
  { 3928, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10602d60004806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #3928 = VCVTPS2PDZ128rmkz
20530
  { 3929, 2,  1,  0,  0,  0, 0x10002d60004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3929 = VCVTPS2PDZ128rr
20531
  { 3930, 4,  1,  0,  0,  0, 0x10202d60004805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #3930 = VCVTPS2PDZ128rrk
20532
  { 3931, 3,  1,  0,  0,  0, 0x10602d60004805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #3931 = VCVTPS2PDZ128rrkz
20533
  { 3932, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20082d60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3932 = VCVTPS2PDZ256rm
20534
  { 3933, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9082d60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3933 = VCVTPS2PDZ256rmb
20535
  { 3934, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9282d60004806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3934 = VCVTPS2PDZ256rmbk
20536
  { 3935, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9682d60004806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3935 = VCVTPS2PDZ256rmbkz
20537
  { 3936, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20282d60004806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3936 = VCVTPS2PDZ256rmk
20538
  { 3937, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20682d60004806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3937 = VCVTPS2PDZ256rmkz
20539
  { 3938, 2,  1,  0,  0,  0, 0x20082d60004805ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #3938 = VCVTPS2PDZ256rr
20540
  { 3939, 4,  1,  0,  0,  0, 0x20282d60004805ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #3939 = VCVTPS2PDZ256rrk
20541
  { 3940, 3,  1,  0,  0,  0, 0x20682d60004805ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #3940 = VCVTPS2PDZ256rrkz
20542
  { 3941, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40802d60004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3941 = VCVTPS2PDZrm
20543
  { 3942, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9802d60004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3942 = VCVTPS2PDZrmb
20544
  { 3943, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a02d60004806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3943 = VCVTPS2PDZrmbk
20545
  { 3944, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e02d60004806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3944 = VCVTPS2PDZrmbkz
20546
  { 3945, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a02d60004806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3945 = VCVTPS2PDZrmk
20547
  { 3946, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e02d60004806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3946 = VCVTPS2PDZrmkz
20548
  { 3947, 2,  1,  0,  0,  0, 0x40802d60004805ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #3947 = VCVTPS2PDZrr
20549
  { 3948, 2,  1,  0,  0,  0, 0x9802d60004805ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #3948 = VCVTPS2PDZrrb
20550
  { 3949, 4,  1,  0,  0,  0, 0x9a02d60004805ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #3949 = VCVTPS2PDZrrbk
20551
  { 3950, 3,  1,  0,  0,  0, 0x9e02d60004805ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #3950 = VCVTPS2PDZrrbkz
20552
  { 3951, 4,  1,  0,  0,  0, 0x40a02d60004805ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #3951 = VCVTPS2PDZrrk
20553
  { 3952, 3,  1,  0,  0,  0, 0x40e02d60004805ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #3952 = VCVTPS2PDZrrkz
20554
  { 3953, 6,  1,  0,  873,  0|(1ULL<<MCID::MayLoad), 0x2d20004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #3953 = VCVTPS2PDrm
20555
  { 3954, 2,  1,  0,  872,  0, 0x2d20004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #3954 = VCVTPS2PDrr
20556
  { 3955, 7,  0,  0,  900,  0|(1ULL<<MCID::MayStore), 0x80ea004d004ULL, nullptr, nullptr, OperandInfo464, -1 ,nullptr },  // Inst #3955 = VCVTPS2PHYmr
20557
  { 3956, 3,  1,  0,  899,  0, 0x80ea004d003ULL, nullptr, nullptr, OperandInfo465, -1 ,nullptr },  // Inst #3956 = VCVTPS2PHYrr
20558
  { 3957, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10000ef804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr },  // Inst #3957 = VCVTPS2PHZ128mr
20559
  { 3958, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10200ef804d004ULL, nullptr, nullptr, OperandInfo467, -1 ,nullptr },  // Inst #3958 = VCVTPS2PHZ128mrk
20560
  { 3959, 3,  1,  0,  0,  0, 0x10000ef804d003ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #3959 = VCVTPS2PHZ128rr
20561
  { 3960, 5,  1,  0,  0,  0, 0x10200ef804d003ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr },  // Inst #3960 = VCVTPS2PHZ128rrk
20562
  { 3961, 4,  1,  0,  0,  0, 0x10600ef804d003ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr },  // Inst #3961 = VCVTPS2PHZ128rrkz
20563
  { 3962, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20080ef804d004ULL, nullptr, nullptr, OperandInfo471, -1 ,nullptr },  // Inst #3962 = VCVTPS2PHZ256mr
20564
  { 3963, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20280ef804d004ULL, nullptr, nullptr, OperandInfo472, -1 ,nullptr },  // Inst #3963 = VCVTPS2PHZ256mrk
20565
  { 3964, 3,  1,  0,  0,  0, 0x20080ef804d003ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr },  // Inst #3964 = VCVTPS2PHZ256rr
20566
  { 3965, 5,  1,  0,  0,  0, 0x20280ef804d003ULL, nullptr, nullptr, OperandInfo474, -1 ,nullptr },  // Inst #3965 = VCVTPS2PHZ256rrk
20567
  { 3966, 4,  1,  0,  0,  0, 0x20680ef804d003ULL, nullptr, nullptr, OperandInfo475, -1 ,nullptr },  // Inst #3966 = VCVTPS2PHZ256rrkz
20568
  { 3967, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40800ef804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr },  // Inst #3967 = VCVTPS2PHZmr
20569
  { 3968, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40a00ef804d004ULL, nullptr, nullptr, OperandInfo477, -1 ,nullptr },  // Inst #3968 = VCVTPS2PHZmrk
20570
  { 3969, 3,  1,  0,  0,  0, 0x9800ef804d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr },  // Inst #3969 = VCVTPS2PHZrb
20571
  { 3970, 5,  1,  0,  0,  0, 0x9a00ef804d003ULL, nullptr, nullptr, OperandInfo478, -1 ,nullptr },  // Inst #3970 = VCVTPS2PHZrbk
20572
  { 3971, 4,  1,  0,  0,  0, 0x9e00ef804d003ULL, nullptr, nullptr, OperandInfo479, -1 ,nullptr },  // Inst #3971 = VCVTPS2PHZrbkz
20573
  { 3972, 3,  1,  0,  0,  0, 0x40800ef804d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr },  // Inst #3972 = VCVTPS2PHZrr
20574
  { 3973, 5,  1,  0,  0,  0, 0x40a00ef804d003ULL, nullptr, nullptr, OperandInfo478, -1 ,nullptr },  // Inst #3973 = VCVTPS2PHZrrk
20575
  { 3974, 4,  1,  0,  0,  0, 0x40e00ef804d003ULL, nullptr, nullptr, OperandInfo479, -1 ,nullptr },  // Inst #3974 = VCVTPS2PHZrrkz
20576
  { 3975, 7,  0,  0,  900,  0|(1ULL<<MCID::MayStore), 0xea004d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #3975 = VCVTPS2PHmr
20577
  { 3976, 3,  1,  0,  899,  0, 0xea004d003ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #3976 = VCVTPS2PHrr
20578
  { 3977, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10003de0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3977 = VCVTPS2QQZ128rm
20579
  { 3978, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9003de0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #3978 = VCVTPS2QQZ128rmb
20580
  { 3979, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9203de0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #3979 = VCVTPS2QQZ128rmbk
20581
  { 3980, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9603de0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #3980 = VCVTPS2QQZ128rmbkz
20582
  { 3981, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10203de0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #3981 = VCVTPS2QQZ128rmk
20583
  { 3982, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10603de0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #3982 = VCVTPS2QQZ128rmkz
20584
  { 3983, 2,  1,  0,  0,  0, 0x10003de0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #3983 = VCVTPS2QQZ128rr
20585
  { 3984, 4,  1,  0,  0,  0, 0x10203de0005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #3984 = VCVTPS2QQZ128rrk
20586
  { 3985, 3,  1,  0,  0,  0, 0x10603de0005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #3985 = VCVTPS2QQZ128rrkz
20587
  { 3986, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20083de0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3986 = VCVTPS2QQZ256rm
20588
  { 3987, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9083de0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #3987 = VCVTPS2QQZ256rmb
20589
  { 3988, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9283de0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3988 = VCVTPS2QQZ256rmbk
20590
  { 3989, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9683de0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3989 = VCVTPS2QQZ256rmbkz
20591
  { 3990, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20283de0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #3990 = VCVTPS2QQZ256rmk
20592
  { 3991, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20683de0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #3991 = VCVTPS2QQZ256rmkz
20593
  { 3992, 2,  1,  0,  0,  0, 0x20083de0005005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #3992 = VCVTPS2QQZ256rr
20594
  { 3993, 4,  1,  0,  0,  0, 0x20283de0005005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #3993 = VCVTPS2QQZ256rrk
20595
  { 3994, 3,  1,  0,  0,  0, 0x20683de0005005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #3994 = VCVTPS2QQZ256rrkz
20596
  { 3995, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40803de0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3995 = VCVTPS2QQZrm
20597
  { 3996, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9803de0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #3996 = VCVTPS2QQZrmb
20598
  { 3997, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a03de0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3997 = VCVTPS2QQZrmbk
20599
  { 3998, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e03de0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #3998 = VCVTPS2QQZrmbkz
20600
  { 3999, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a03de0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #3999 = VCVTPS2QQZrmk
20601
  { 4000, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e03de0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4000 = VCVTPS2QQZrmkz
20602
  { 4001, 2,  1,  0,  0,  0, 0x40803de0005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #4001 = VCVTPS2QQZrr
20603
  { 4002, 3,  1,  0,  0,  0, 0x409803de0005005ULL, nullptr, nullptr, OperandInfo480, -1 ,nullptr },  // Inst #4002 = VCVTPS2QQZrrb
20604
  { 4003, 5,  1,  0,  0,  0, 0x409a03de0005005ULL, nullptr, nullptr, OperandInfo481, -1 ,nullptr },  // Inst #4003 = VCVTPS2QQZrrbk
20605
  { 4004, 4,  1,  0,  0,  0, 0x409e03de0005005ULL, nullptr, nullptr, OperandInfo482, -1 ,nullptr },  // Inst #4004 = VCVTPS2QQZrrbkz
20606
  { 4005, 4,  1,  0,  0,  0, 0x40a03de0005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #4005 = VCVTPS2QQZrrk
20607
  { 4006, 3,  1,  0,  0,  0, 0x40e03de0005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #4006 = VCVTPS2QQZrrkz
20608
  { 4007, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20003ce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4007 = VCVTPS2UDQZ128rm
20609
  { 4008, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9003ce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4008 = VCVTPS2UDQZ128rmb
20610
  { 4009, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9203ce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4009 = VCVTPS2UDQZ128rmbk
20611
  { 4010, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9603ce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4010 = VCVTPS2UDQZ128rmbkz
20612
  { 4011, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20203ce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4011 = VCVTPS2UDQZ128rmk
20613
  { 4012, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20603ce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4012 = VCVTPS2UDQZ128rmkz
20614
  { 4013, 2,  1,  0,  0,  0, 0x20003ce0004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4013 = VCVTPS2UDQZ128rr
20615
  { 4014, 4,  1,  0,  0,  0, 0x20203ce0004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #4014 = VCVTPS2UDQZ128rrk
20616
  { 4015, 3,  1,  0,  0,  0, 0x20603ce0004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #4015 = VCVTPS2UDQZ128rrkz
20617
  { 4016, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40083ce0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4016 = VCVTPS2UDQZ256rm
20618
  { 4017, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9083ce0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4017 = VCVTPS2UDQZ256rmb
20619
  { 4018, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9283ce0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4018 = VCVTPS2UDQZ256rmbk
20620
  { 4019, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9683ce0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4019 = VCVTPS2UDQZ256rmbkz
20621
  { 4020, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40283ce0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4020 = VCVTPS2UDQZ256rmk
20622
  { 4021, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40683ce0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4021 = VCVTPS2UDQZ256rmkz
20623
  { 4022, 2,  1,  0,  0,  0, 0x40083ce0004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #4022 = VCVTPS2UDQZ256rr
20624
  { 4023, 4,  1,  0,  0,  0, 0x40283ce0004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #4023 = VCVTPS2UDQZ256rrk
20625
  { 4024, 3,  1,  0,  0,  0, 0x40683ce0004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #4024 = VCVTPS2UDQZ256rrkz
20626
  { 4025, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80803ce0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4025 = VCVTPS2UDQZrm
20627
  { 4026, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9803ce0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4026 = VCVTPS2UDQZrmb
20628
  { 4027, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a03ce0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #4027 = VCVTPS2UDQZrmbk
20629
  { 4028, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e03ce0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #4028 = VCVTPS2UDQZrmbkz
20630
  { 4029, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a03ce0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #4029 = VCVTPS2UDQZrmk
20631
  { 4030, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e03ce0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #4030 = VCVTPS2UDQZrmkz
20632
  { 4031, 2,  1,  0,  0,  0, 0x80803ce0004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4031 = VCVTPS2UDQZrr
20633
  { 4032, 3,  1,  0,  0,  0, 0x409803ce0004805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #4032 = VCVTPS2UDQZrrb
20634
  { 4033, 5,  1,  0,  0,  0, 0x409a03ce0004805ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #4033 = VCVTPS2UDQZrrbk
20635
  { 4034, 4,  1,  0,  0,  0, 0x409e03ce0004805ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #4034 = VCVTPS2UDQZrrbkz
20636
  { 4035, 4,  1,  0,  0,  0, 0x80a03ce0004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #4035 = VCVTPS2UDQZrrk
20637
  { 4036, 3,  1,  0,  0,  0, 0x80e03ce0004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #4036 = VCVTPS2UDQZrrkz
20638
  { 4037, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10003ce0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4037 = VCVTPS2UQQZ128rm
20639
  { 4038, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9003ce0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4038 = VCVTPS2UQQZ128rmb
20640
  { 4039, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9203ce0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4039 = VCVTPS2UQQZ128rmbk
20641
  { 4040, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9603ce0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4040 = VCVTPS2UQQZ128rmbkz
20642
  { 4041, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10203ce0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4041 = VCVTPS2UQQZ128rmk
20643
  { 4042, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10603ce0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4042 = VCVTPS2UQQZ128rmkz
20644
  { 4043, 2,  1,  0,  0,  0, 0x10003ce0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4043 = VCVTPS2UQQZ128rr
20645
  { 4044, 4,  1,  0,  0,  0, 0x10203ce0005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #4044 = VCVTPS2UQQZ128rrk
20646
  { 4045, 3,  1,  0,  0,  0, 0x10603ce0005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #4045 = VCVTPS2UQQZ128rrkz
20647
  { 4046, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20083ce0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4046 = VCVTPS2UQQZ256rm
20648
  { 4047, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9083ce0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4047 = VCVTPS2UQQZ256rmb
20649
  { 4048, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9283ce0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4048 = VCVTPS2UQQZ256rmbk
20650
  { 4049, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9683ce0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4049 = VCVTPS2UQQZ256rmbkz
20651
  { 4050, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20283ce0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4050 = VCVTPS2UQQZ256rmk
20652
  { 4051, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20683ce0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4051 = VCVTPS2UQQZ256rmkz
20653
  { 4052, 2,  1,  0,  0,  0, 0x20083ce0005005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #4052 = VCVTPS2UQQZ256rr
20654
  { 4053, 4,  1,  0,  0,  0, 0x20283ce0005005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #4053 = VCVTPS2UQQZ256rrk
20655
  { 4054, 3,  1,  0,  0,  0, 0x20683ce0005005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #4054 = VCVTPS2UQQZ256rrkz
20656
  { 4055, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40803ce0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4055 = VCVTPS2UQQZrm
20657
  { 4056, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9803ce0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4056 = VCVTPS2UQQZrmb
20658
  { 4057, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a03ce0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4057 = VCVTPS2UQQZrmbk
20659
  { 4058, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e03ce0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4058 = VCVTPS2UQQZrmbkz
20660
  { 4059, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a03ce0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4059 = VCVTPS2UQQZrmk
20661
  { 4060, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e03ce0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4060 = VCVTPS2UQQZrmkz
20662
  { 4061, 2,  1,  0,  0,  0, 0x40803ce0005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #4061 = VCVTPS2UQQZrr
20663
  { 4062, 3,  1,  0,  0,  0, 0x409803ce0005005ULL, nullptr, nullptr, OperandInfo480, -1 ,nullptr },  // Inst #4062 = VCVTPS2UQQZrrb
20664
  { 4063, 5,  1,  0,  0,  0, 0x409a03ce0005005ULL, nullptr, nullptr, OperandInfo481, -1 ,nullptr },  // Inst #4063 = VCVTPS2UQQZrrbk
20665
  { 4064, 4,  1,  0,  0,  0, 0x409e03ce0005005ULL, nullptr, nullptr, OperandInfo482, -1 ,nullptr },  // Inst #4064 = VCVTPS2UQQZrrbkz
20666
  { 4065, 4,  1,  0,  0,  0, 0x40a03ce0005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #4065 = VCVTPS2UQQZrrk
20667
  { 4066, 3,  1,  0,  0,  0, 0x40e03ce0005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #4066 = VCVTPS2UQQZrrkz
20668
  { 4067, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000f360005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4067 = VCVTQQ2PDZ128rm
20669
  { 4068, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100f360005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4068 = VCVTQQ2PDZ128rmb
20670
  { 4069, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120f360005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4069 = VCVTQQ2PDZ128rmbk
20671
  { 4070, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160f360005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4070 = VCVTQQ2PDZ128rmbkz
20672
  { 4071, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020f360005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4071 = VCVTQQ2PDZ128rmk
20673
  { 4072, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060f360005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4072 = VCVTQQ2PDZ128rmkz
20674
  { 4073, 2,  1,  0,  0,  0, 0x2000f360005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4073 = VCVTQQ2PDZ128rr
20675
  { 4074, 4,  1,  0,  0,  0, 0x2020f360005805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #4074 = VCVTQQ2PDZ128rrk
20676
  { 4075, 3,  1,  0,  0,  0, 0x2060f360005805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #4075 = VCVTQQ2PDZ128rrkz
20677
  { 4076, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008f360005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4076 = VCVTQQ2PDZ256rm
20678
  { 4077, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108f360005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4077 = VCVTQQ2PDZ256rmb
20679
  { 4078, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128f360005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4078 = VCVTQQ2PDZ256rmbk
20680
  { 4079, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168f360005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4079 = VCVTQQ2PDZ256rmbkz
20681
  { 4080, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028f360005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4080 = VCVTQQ2PDZ256rmk
20682
  { 4081, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068f360005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4081 = VCVTQQ2PDZ256rmkz
20683
  { 4082, 2,  1,  0,  0,  0, 0x4008f360005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #4082 = VCVTQQ2PDZ256rr
20684
  { 4083, 4,  1,  0,  0,  0, 0x4028f360005805ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #4083 = VCVTQQ2PDZ256rrk
20685
  { 4084, 3,  1,  0,  0,  0, 0x4068f360005805ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #4084 = VCVTQQ2PDZ256rrkz
20686
  { 4085, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080f360005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4085 = VCVTQQ2PDZrm
20687
  { 4086, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180f360005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4086 = VCVTQQ2PDZrmb
20688
  { 4087, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0f360005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4087 = VCVTQQ2PDZrmbk
20689
  { 4088, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0f360005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4088 = VCVTQQ2PDZrmbkz
20690
  { 4089, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0f360005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4089 = VCVTQQ2PDZrmk
20691
  { 4090, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0f360005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4090 = VCVTQQ2PDZrmkz
20692
  { 4091, 2,  1,  0,  0,  0, 0x8080f360005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4091 = VCVTQQ2PDZrr
20693
  { 4092, 3,  1,  0,  0,  0, 0x41180f360005805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #4092 = VCVTQQ2PDZrrb
20694
  { 4093, 5,  1,  0,  0,  0, 0x411a0f360005805ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #4093 = VCVTQQ2PDZrrbk
20695
  { 4094, 4,  1,  0,  0,  0, 0x411e0f360005805ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #4094 = VCVTQQ2PDZrrbkz
20696
  { 4095, 4,  1,  0,  0,  0, 0x80a0f360005805ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #4095 = VCVTQQ2PDZrrk
20697
  { 4096, 3,  1,  0,  0,  0, 0x80e0f360005805ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #4096 = VCVTQQ2PDZrrkz
20698
  { 4097, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000ade0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4097 = VCVTQQ2PSZ128rm
20699
  { 4098, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100ade0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4098 = VCVTQQ2PSZ128rmb
20700
  { 4099, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120ade0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4099 = VCVTQQ2PSZ128rmbk
20701
  { 4100, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160ade0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4100 = VCVTQQ2PSZ128rmbkz
20702
  { 4101, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020ade0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4101 = VCVTQQ2PSZ128rmk
20703
  { 4102, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060ade0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4102 = VCVTQQ2PSZ128rmkz
20704
  { 4103, 2,  1,  0,  0,  0, 0x2000ade0004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4103 = VCVTQQ2PSZ128rr
20705
  { 4104, 4,  1,  0,  0,  0, 0x2020ade0004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #4104 = VCVTQQ2PSZ128rrk
20706
  { 4105, 3,  1,  0,  0,  0, 0x2060ade0004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #4105 = VCVTQQ2PSZ128rrkz
20707
  { 4106, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008ade0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4106 = VCVTQQ2PSZ256rm
20708
  { 4107, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108ade0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4107 = VCVTQQ2PSZ256rmb
20709
  { 4108, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128ade0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4108 = VCVTQQ2PSZ256rmbk
20710
  { 4109, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168ade0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4109 = VCVTQQ2PSZ256rmbkz
20711
  { 4110, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028ade0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4110 = VCVTQQ2PSZ256rmk
20712
  { 4111, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068ade0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4111 = VCVTQQ2PSZ256rmkz
20713
  { 4112, 2,  1,  0,  0,  0, 0x4008ade0004805ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #4112 = VCVTQQ2PSZ256rr
20714
  { 4113, 4,  1,  0,  0,  0, 0x4028ade0004805ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr },  // Inst #4113 = VCVTQQ2PSZ256rrk
20715
  { 4114, 3,  1,  0,  0,  0, 0x4068ade0004805ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr },  // Inst #4114 = VCVTQQ2PSZ256rrkz
20716
  { 4115, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080ade0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4115 = VCVTQQ2PSZrm
20717
  { 4116, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180ade0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4116 = VCVTQQ2PSZrmb
20718
  { 4117, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0ade0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4117 = VCVTQQ2PSZrmbk
20719
  { 4118, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0ade0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4118 = VCVTQQ2PSZrmbkz
20720
  { 4119, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0ade0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4119 = VCVTQQ2PSZrmk
20721
  { 4120, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0ade0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4120 = VCVTQQ2PSZrmkz
20722
  { 4121, 2,  1,  0,  0,  0, 0x8080ade0004805ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #4121 = VCVTQQ2PSZrr
20723
  { 4122, 3,  1,  0,  0,  0, 0x41180ade0004805ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr },  // Inst #4122 = VCVTQQ2PSZrrb
20724
  { 4123, 5,  1,  0,  0,  0, 0x411a0ade0004805ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr },  // Inst #4123 = VCVTQQ2PSZrrbk
20725
  { 4124, 4,  1,  0,  0,  0, 0x411e0ade0004805ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr },  // Inst #4124 = VCVTQQ2PSZrrbkz
20726
  { 4125, 4,  1,  0,  0,  0, 0x80a0ade0004805ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #4125 = VCVTQQ2PSZrrk
20727
  { 4126, 3,  1,  0,  0,  0, 0x80e0ade0004805ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #4126 = VCVTQQ2PSZrrkz
20728
  { 4127, 3,  1,  0,  0,  0, 0x4111096e0006005ULL, nullptr, nullptr, OperandInfo483, -1 ,nullptr },  // Inst #4127 = VCVTSD2SI64Zrb
20729
  { 4128, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x101096e0006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4128 = VCVTSD2SI64Zrm
20730
  { 4129, 2,  1,  0,  0,  0, 0x101096e0006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4129 = VCVTSD2SI64Zrr
20731
  { 4130, 6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x1096a0006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4130 = VCVTSD2SI64rm
20732
  { 4131, 2,  1,  0,  897,  0, 0x1096a0006005ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #4131 = VCVTSD2SI64rr
20733
  { 4132, 3,  1,  0,  0,  0, 0x4111016e0006005ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr },  // Inst #4132 = VCVTSD2SIZrb
20734
  { 4133, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x101016e0006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4133 = VCVTSD2SIZrm
20735
  { 4134, 2,  1,  0,  0,  0, 0x101016e0006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4134 = VCVTSD2SIZrr
20736
  { 4135, 6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x1016a0006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4135 = VCVTSD2SIrm
20737
  { 4136, 2,  1,  0,  897,  0, 0x1016a0006005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #4136 = VCVTSD2SIrr
20738
  { 4137, 7,  1,  0,  538,  0|(1ULL<<MCID::MayLoad), 0x1091ad60006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4137 = VCVTSD2SSZrm
20739
  { 4138, 9,  1,  0,  538,  0|(1ULL<<MCID::MayLoad), 0x10b1ad60006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #4138 = VCVTSD2SSZrmk
20740
  { 4139, 8,  1,  0,  538,  0|(1ULL<<MCID::MayLoad), 0x10f1ad60006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #4139 = VCVTSD2SSZrmkz
20741
  { 4140, 3,  1,  0,  536,  0, 0x1091ad60006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #4140 = VCVTSD2SSZrr
20742
  { 4141, 4,  1,  0,  538,  0, 0x41191ad60006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #4141 = VCVTSD2SSZrrb
20743
  { 4142, 6,  1,  0,  538,  0, 0x411b1ad60006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #4142 = VCVTSD2SSZrrbk
20744
  { 4143, 5,  1,  0,  538,  0, 0x411f1ad60006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #4143 = VCVTSD2SSZrrbkz
20745
  { 4144, 5,  1,  0,  536,  0, 0x10b1ad60006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #4144 = VCVTSD2SSZrrk
20746
  { 4145, 4,  1,  0,  536,  0, 0x10f1ad60006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #4145 = VCVTSD2SSZrrkz
20747
  { 4146, 7,  1,  0,  871,  0|(1ULL<<MCID::MayLoad), 0x112d20006006ULL, nullptr, nullptr, OperandInfo487, -1 ,nullptr },  // Inst #4146 = VCVTSD2SSrm
20748
  { 4147, 3,  1,  0,  869,  0, 0x112d20006005ULL, nullptr, nullptr, OperandInfo488, -1 ,nullptr },  // Inst #4147 = VCVTSD2SSrr
20749
  { 4148, 3,  1,  0,  0,  0, 0x41110bce0006005ULL, nullptr, nullptr, OperandInfo483, -1 ,nullptr },  // Inst #4148 = VCVTSD2USI64Zrb
20750
  { 4149, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1010bce0006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4149 = VCVTSD2USI64Zrm
20751
  { 4150, 2,  1,  0,  0,  0, 0x1010bce0006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4150 = VCVTSD2USI64Zrr
20752
  { 4151, 3,  1,  0,  0,  0, 0x411103ce0006005ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr },  // Inst #4151 = VCVTSD2USIZrb
20753
  { 4152, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10103ce0006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4152 = VCVTSD2USIZrm
20754
  { 4153, 2,  1,  0,  0,  0, 0x10103ce0006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4153 = VCVTSD2USIZrr
20755
  { 4154, 7,  1,  0,  539,  0|(1ULL<<MCID::MayLoad), 0x119520006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #4154 = VCVTSI2SD64rm
20756
  { 4155, 3,  1,  0,  254,  0, 0x119520006005ULL, nullptr, nullptr, OperandInfo489, -1 ,nullptr },  // Inst #4155 = VCVTSI2SD64rr
20757
  { 4156, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8111560006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr },  // Inst #4156 = VCVTSI2SDZrm
20758
  { 4157, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8111560006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4157 = VCVTSI2SDZrm_Int
20759
  { 4158, 3,  1,  0,  0,  0, 0x8111560006005ULL, nullptr, nullptr, OperandInfo490, -1 ,nullptr },  // Inst #4158 = VCVTSI2SDZrr
20760
  { 4159, 3,  1,  0,  0,  0, 0x8111560006005ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr },  // Inst #4159 = VCVTSI2SDZrr_Int
20761
  { 4160, 4,  1,  0,  0,  0, 0x409111560006005ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr },  // Inst #4160 = VCVTSI2SDZrrb_Int
20762
  { 4161, 7,  1,  0,  539,  0|(1ULL<<MCID::MayLoad), 0x111520006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #4161 = VCVTSI2SDrm
20763
  { 4162, 3,  1,  0,  254,  0, 0x111520006005ULL, nullptr, nullptr, OperandInfo492, -1 ,nullptr },  // Inst #4162 = VCVTSI2SDrr
20764
  { 4163, 7,  1,  0,  539,  0|(1ULL<<MCID::MayLoad), 0x119520005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #4163 = VCVTSI2SS64rm
20765
  { 4164, 3,  1,  0,  892,  0, 0x119520005805ULL, nullptr, nullptr, OperandInfo493, -1 ,nullptr },  // Inst #4164 = VCVTSI2SS64rr
20766
  { 4165, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8111560005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr },  // Inst #4165 = VCVTSI2SSZrm
20767
  { 4166, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8111560005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4166 = VCVTSI2SSZrm_Int
20768
  { 4167, 3,  1,  0,  0,  0, 0x8111560005805ULL, nullptr, nullptr, OperandInfo494, -1 ,nullptr },  // Inst #4167 = VCVTSI2SSZrr
20769
  { 4168, 3,  1,  0,  0,  0, 0x8111560005805ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr },  // Inst #4168 = VCVTSI2SSZrr_Int
20770
  { 4169, 4,  1,  0,  0,  0, 0x409111560005805ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr },  // Inst #4169 = VCVTSI2SSZrrb_Int
20771
  { 4170, 7,  1,  0,  539,  0|(1ULL<<MCID::MayLoad), 0x111520005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #4170 = VCVTSI2SSrm
20772
  { 4171, 3,  1,  0,  892,  0, 0x111520005805ULL, nullptr, nullptr, OperandInfo495, -1 ,nullptr },  // Inst #4171 = VCVTSI2SSrr
20773
  { 4172, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10119560006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr },  // Inst #4172 = VCVTSI642SDZrm
20774
  { 4173, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10119560006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4173 = VCVTSI642SDZrm_Int
20775
  { 4174, 3,  1,  0,  0,  0, 0x10119560006005ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr },  // Inst #4174 = VCVTSI642SDZrr
20776
  { 4175, 3,  1,  0,  0,  0, 0x10119560006005ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr },  // Inst #4175 = VCVTSI642SDZrr_Int
20777
  { 4176, 4,  1,  0,  0,  0, 0x411119560006005ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr },  // Inst #4176 = VCVTSI642SDZrrb_Int
20778
  { 4177, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10119560005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr },  // Inst #4177 = VCVTSI642SSZrm
20779
  { 4178, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10119560005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4178 = VCVTSI642SSZrm_Int
20780
  { 4179, 3,  1,  0,  0,  0, 0x10119560005805ULL, nullptr, nullptr, OperandInfo498, -1 ,nullptr },  // Inst #4179 = VCVTSI642SSZrr
20781
  { 4180, 3,  1,  0,  0,  0, 0x10119560005805ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr },  // Inst #4180 = VCVTSI642SSZrr_Int
20782
  { 4181, 4,  1,  0,  0,  0, 0x411119560005805ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr },  // Inst #4181 = VCVTSI642SSZrrb_Int
20783
  { 4182, 7,  1,  0,  538,  0|(1ULL<<MCID::MayLoad), 0x8912d60005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4182 = VCVTSS2SDZrm
20784
  { 4183, 9,  1,  0,  538,  0|(1ULL<<MCID::MayLoad), 0x8b12d60005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #4183 = VCVTSS2SDZrmk
20785
  { 4184, 8,  1,  0,  538,  0|(1ULL<<MCID::MayLoad), 0x8f12d60005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #4184 = VCVTSS2SDZrmkz
20786
  { 4185, 3,  1,  0,  536,  0, 0x8912d60005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #4185 = VCVTSS2SDZrr
20787
  { 4186, 3,  1,  0,  0,  0, 0x9912d60005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #4186 = VCVTSS2SDZrrb
20788
  { 4187, 5,  1,  0,  0,  0, 0x9b12d60005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #4187 = VCVTSS2SDZrrbk
20789
  { 4188, 4,  1,  0,  0,  0, 0x9f12d60005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #4188 = VCVTSS2SDZrrbkz
20790
  { 4189, 5,  1,  0,  536,  0, 0x8b12d60005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #4189 = VCVTSS2SDZrrk
20791
  { 4190, 4,  1,  0,  536,  0, 0x8f12d60005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #4190 = VCVTSS2SDZrrkz
20792
  { 4191, 7,  1,  0,  877,  0|(1ULL<<MCID::MayLoad), 0x112d20005806ULL, nullptr, nullptr, OperandInfo499, -1 ,nullptr },  // Inst #4191 = VCVTSS2SDrm
20793
  { 4192, 3,  1,  0,  875,  0, 0x112d20005805ULL, nullptr, nullptr, OperandInfo500, -1 ,nullptr },  // Inst #4192 = VCVTSS2SDrr
20794
  { 4193, 3,  1,  0,  0,  0, 0x4091096e0005805ULL, nullptr, nullptr, OperandInfo483, -1 ,nullptr },  // Inst #4193 = VCVTSS2SI64Zrb
20795
  { 4194, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81096e0005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4194 = VCVTSS2SI64Zrm
20796
  { 4195, 2,  1,  0,  0,  0, 0x81096e0005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4195 = VCVTSS2SI64Zrr
20797
  { 4196, 6,  1,  0,  895,  0|(1ULL<<MCID::MayLoad), 0x1096a0005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4196 = VCVTSS2SI64rm
20798
  { 4197, 2,  1,  0,  893,  0, 0x1096a0005805ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #4197 = VCVTSS2SI64rr
20799
  { 4198, 3,  1,  0,  0,  0, 0x4091016e0005805ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr },  // Inst #4198 = VCVTSS2SIZrb
20800
  { 4199, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81016e0005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4199 = VCVTSS2SIZrm
20801
  { 4200, 2,  1,  0,  0,  0, 0x81016e0005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4200 = VCVTSS2SIZrr
20802
  { 4201, 6,  1,  0,  896,  0|(1ULL<<MCID::MayLoad), 0x1016a0005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4201 = VCVTSS2SIrm
20803
  { 4202, 2,  1,  0,  894,  0, 0x1016a0005805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #4202 = VCVTSS2SIrr
20804
  { 4203, 3,  1,  0,  0,  0, 0x40910bce0005805ULL, nullptr, nullptr, OperandInfo483, -1 ,nullptr },  // Inst #4203 = VCVTSS2USI64Zrb
20805
  { 4204, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x810bce0005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4204 = VCVTSS2USI64Zrm
20806
  { 4205, 2,  1,  0,  0,  0, 0x810bce0005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4205 = VCVTSS2USI64Zrr
20807
  { 4206, 3,  1,  0,  0,  0, 0x409103ce0005805ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr },  // Inst #4206 = VCVTSS2USIZrb
20808
  { 4207, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8103ce0005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4207 = VCVTSS2USIZrm
20809
  { 4208, 2,  1,  0,  0,  0, 0x8103ce0005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4208 = VCVTSS2USIZrr
20810
  { 4209, 6,  1,  0,  85, 0|(1ULL<<MCID::MayLoad), 0x7330005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #4209 = VCVTTPD2DQXrm
20811
  { 4210, 6,  1,  0,  887,  0|(1ULL<<MCID::MayLoad), 0x87330005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #4210 = VCVTTPD2DQYrm
20812
  { 4211, 2,  1,  0,  885,  0, 0x87330005005ULL, nullptr, nullptr, OperandInfo450, -1 ,nullptr },  // Inst #4211 = VCVTTPD2DQYrr
20813
  { 4212, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000f360005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4212 = VCVTTPD2DQZ128rm
20814
  { 4213, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100f360005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4213 = VCVTTPD2DQZ128rmb
20815
  { 4214, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120f360005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4214 = VCVTTPD2DQZ128rmbk
20816
  { 4215, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160f360005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4215 = VCVTTPD2DQZ128rmbkz
20817
  { 4216, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020f360005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4216 = VCVTTPD2DQZ128rmk
20818
  { 4217, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060f360005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4217 = VCVTTPD2DQZ128rmkz
20819
  { 4218, 2,  1,  0,  0,  0, 0x2000f360005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4218 = VCVTTPD2DQZ128rr
20820
  { 4219, 4,  1,  0,  0,  0, 0x2020f360005005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #4219 = VCVTTPD2DQZ128rrk
20821
  { 4220, 3,  1,  0,  0,  0, 0x2060f360005005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #4220 = VCVTTPD2DQZ128rrkz
20822
  { 4221, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008f360005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4221 = VCVTTPD2DQZ256rm
20823
  { 4222, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108f360005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4222 = VCVTTPD2DQZ256rmb
20824
  { 4223, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128f360005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4223 = VCVTTPD2DQZ256rmbk
20825
  { 4224, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168f360005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4224 = VCVTTPD2DQZ256rmbkz
20826
  { 4225, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028f360005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4225 = VCVTTPD2DQZ256rmk
20827
  { 4226, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068f360005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4226 = VCVTTPD2DQZ256rmkz
20828
  { 4227, 2,  1,  0,  0,  0, 0x4008f360005005ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #4227 = VCVTTPD2DQZ256rr
20829
  { 4228, 4,  1,  0,  0,  0, 0x4028f360005005ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr },  // Inst #4228 = VCVTTPD2DQZ256rrk
20830
  { 4229, 3,  1,  0,  0,  0, 0x4068f360005005ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr },  // Inst #4229 = VCVTTPD2DQZ256rrkz
20831
  { 4230, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080f360005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4230 = VCVTTPD2DQZrm
20832
  { 4231, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180f360005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4231 = VCVTTPD2DQZrmb
20833
  { 4232, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0f360005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4232 = VCVTTPD2DQZrmbk
20834
  { 4233, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0f360005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4233 = VCVTTPD2DQZrmbkz
20835
  { 4234, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0f360005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4234 = VCVTTPD2DQZrmk
20836
  { 4235, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0f360005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4235 = VCVTTPD2DQZrmkz
20837
  { 4236, 2,  1,  0,  0,  0, 0x8080f360005005ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #4236 = VCVTTPD2DQZrr
20838
  { 4237, 2,  1,  0,  0,  0, 0x1180f360005005ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #4237 = VCVTTPD2DQZrrb
20839
  { 4238, 4,  1,  0,  0,  0, 0x11a0f360005005ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #4238 = VCVTTPD2DQZrrbk
20840
  { 4239, 3,  1,  0,  0,  0, 0x11e0f360005005ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #4239 = VCVTTPD2DQZrrbkz
20841
  { 4240, 4,  1,  0,  0,  0, 0x80a0f360005005ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #4240 = VCVTTPD2DQZrrk
20842
  { 4241, 3,  1,  0,  0,  0, 0x80e0f360005005ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #4241 = VCVTTPD2DQZrrkz
20843
  { 4242, 2,  1,  0,  881,  0, 0x7330005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #4242 = VCVTTPD2DQrr
20844
  { 4243, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000bd60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4243 = VCVTTPD2QQZ128rm
20845
  { 4244, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100bd60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4244 = VCVTTPD2QQZ128rmb
20846
  { 4245, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120bd60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4245 = VCVTTPD2QQZ128rmbk
20847
  { 4246, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160bd60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4246 = VCVTTPD2QQZ128rmbkz
20848
  { 4247, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020bd60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4247 = VCVTTPD2QQZ128rmk
20849
  { 4248, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060bd60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4248 = VCVTTPD2QQZ128rmkz
20850
  { 4249, 2,  1,  0,  0,  0, 0x2000bd60005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4249 = VCVTTPD2QQZ128rr
20851
  { 4250, 4,  1,  0,  0,  0, 0x2020bd60005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #4250 = VCVTTPD2QQZ128rrk
20852
  { 4251, 3,  1,  0,  0,  0, 0x2060bd60005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #4251 = VCVTTPD2QQZ128rrkz
20853
  { 4252, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008bd60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4252 = VCVTTPD2QQZ256rm
20854
  { 4253, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108bd60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4253 = VCVTTPD2QQZ256rmb
20855
  { 4254, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128bd60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4254 = VCVTTPD2QQZ256rmbk
20856
  { 4255, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168bd60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4255 = VCVTTPD2QQZ256rmbkz
20857
  { 4256, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028bd60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4256 = VCVTTPD2QQZ256rmk
20858
  { 4257, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068bd60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4257 = VCVTTPD2QQZ256rmkz
20859
  { 4258, 2,  1,  0,  0,  0, 0x4008bd60005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #4258 = VCVTTPD2QQZ256rr
20860
  { 4259, 4,  1,  0,  0,  0, 0x4028bd60005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #4259 = VCVTTPD2QQZ256rrk
20861
  { 4260, 3,  1,  0,  0,  0, 0x4068bd60005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #4260 = VCVTTPD2QQZ256rrkz
20862
  { 4261, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080bd60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4261 = VCVTTPD2QQZrm
20863
  { 4262, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180bd60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4262 = VCVTTPD2QQZrmb
20864
  { 4263, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0bd60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4263 = VCVTTPD2QQZrmbk
20865
  { 4264, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0bd60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4264 = VCVTTPD2QQZrmbkz
20866
  { 4265, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0bd60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4265 = VCVTTPD2QQZrmk
20867
  { 4266, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0bd60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4266 = VCVTTPD2QQZrmkz
20868
  { 4267, 2,  1,  0,  0,  0, 0x8080bd60005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4267 = VCVTTPD2QQZrr
20869
  { 4268, 2,  1,  0,  0,  0, 0x1180bd60005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4268 = VCVTTPD2QQZrrb
20870
  { 4269, 4,  1,  0,  0,  0, 0x11a0bd60005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #4269 = VCVTTPD2QQZrrbk
20871
  { 4270, 3,  1,  0,  0,  0, 0x11e0bd60005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #4270 = VCVTTPD2QQZrrbkz
20872
  { 4271, 4,  1,  0,  0,  0, 0x80a0bd60005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #4271 = VCVTTPD2QQZrrk
20873
  { 4272, 3,  1,  0,  0,  0, 0x80e0bd60005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #4272 = VCVTTPD2QQZrrkz
20874
  { 4273, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000bc60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4273 = VCVTTPD2UDQZ128rm
20875
  { 4274, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100bc60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4274 = VCVTTPD2UDQZ128rmb
20876
  { 4275, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120bc60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4275 = VCVTTPD2UDQZ128rmbk
20877
  { 4276, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160bc60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4276 = VCVTTPD2UDQZ128rmbkz
20878
  { 4277, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020bc60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4277 = VCVTTPD2UDQZ128rmk
20879
  { 4278, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060bc60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4278 = VCVTTPD2UDQZ128rmkz
20880
  { 4279, 2,  1,  0,  0,  0, 0x2000bc60004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4279 = VCVTTPD2UDQZ128rr
20881
  { 4280, 4,  1,  0,  0,  0, 0x2020bc60004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #4280 = VCVTTPD2UDQZ128rrk
20882
  { 4281, 3,  1,  0,  0,  0, 0x2060bc60004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #4281 = VCVTTPD2UDQZ128rrkz
20883
  { 4282, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008bc60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4282 = VCVTTPD2UDQZ256rm
20884
  { 4283, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108bc60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4283 = VCVTTPD2UDQZ256rmb
20885
  { 4284, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128bc60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4284 = VCVTTPD2UDQZ256rmbk
20886
  { 4285, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168bc60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4285 = VCVTTPD2UDQZ256rmbkz
20887
  { 4286, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028bc60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4286 = VCVTTPD2UDQZ256rmk
20888
  { 4287, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068bc60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4287 = VCVTTPD2UDQZ256rmkz
20889
  { 4288, 2,  1,  0,  0,  0, 0x4008bc60004805ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #4288 = VCVTTPD2UDQZ256rr
20890
  { 4289, 4,  1,  0,  0,  0, 0x4028bc60004805ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr },  // Inst #4289 = VCVTTPD2UDQZ256rrk
20891
  { 4290, 3,  1,  0,  0,  0, 0x4068bc60004805ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr },  // Inst #4290 = VCVTTPD2UDQZ256rrkz
20892
  { 4291, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080bc60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4291 = VCVTTPD2UDQZrm
20893
  { 4292, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180bc60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4292 = VCVTTPD2UDQZrmb
20894
  { 4293, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0bc60004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4293 = VCVTTPD2UDQZrmbk
20895
  { 4294, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0bc60004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4294 = VCVTTPD2UDQZrmbkz
20896
  { 4295, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0bc60004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4295 = VCVTTPD2UDQZrmk
20897
  { 4296, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0bc60004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4296 = VCVTTPD2UDQZrmkz
20898
  { 4297, 2,  1,  0,  0,  0, 0x8080bc60004805ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #4297 = VCVTTPD2UDQZrr
20899
  { 4298, 2,  1,  0,  0,  0, 0x1180bc60004805ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #4298 = VCVTTPD2UDQZrrb
20900
  { 4299, 4,  1,  0,  0,  0, 0x11a0bc60004805ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #4299 = VCVTTPD2UDQZrrbk
20901
  { 4300, 3,  1,  0,  0,  0, 0x11e0bc60004805ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #4300 = VCVTTPD2UDQZrrbkz
20902
  { 4301, 4,  1,  0,  0,  0, 0x80a0bc60004805ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #4301 = VCVTTPD2UDQZrrk
20903
  { 4302, 3,  1,  0,  0,  0, 0x80e0bc60004805ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #4302 = VCVTTPD2UDQZrrkz
20904
  { 4303, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000bc60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4303 = VCVTTPD2UQQZ128rm
20905
  { 4304, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100bc60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4304 = VCVTTPD2UQQZ128rmb
20906
  { 4305, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120bc60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4305 = VCVTTPD2UQQZ128rmbk
20907
  { 4306, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160bc60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4306 = VCVTTPD2UQQZ128rmbkz
20908
  { 4307, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020bc60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4307 = VCVTTPD2UQQZ128rmk
20909
  { 4308, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060bc60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4308 = VCVTTPD2UQQZ128rmkz
20910
  { 4309, 2,  1,  0,  0,  0, 0x2000bc60005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4309 = VCVTTPD2UQQZ128rr
20911
  { 4310, 4,  1,  0,  0,  0, 0x2020bc60005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #4310 = VCVTTPD2UQQZ128rrk
20912
  { 4311, 3,  1,  0,  0,  0, 0x2060bc60005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #4311 = VCVTTPD2UQQZ128rrkz
20913
  { 4312, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008bc60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4312 = VCVTTPD2UQQZ256rm
20914
  { 4313, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108bc60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4313 = VCVTTPD2UQQZ256rmb
20915
  { 4314, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128bc60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4314 = VCVTTPD2UQQZ256rmbk
20916
  { 4315, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168bc60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4315 = VCVTTPD2UQQZ256rmbkz
20917
  { 4316, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028bc60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4316 = VCVTTPD2UQQZ256rmk
20918
  { 4317, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068bc60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4317 = VCVTTPD2UQQZ256rmkz
20919
  { 4318, 2,  1,  0,  0,  0, 0x4008bc60005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #4318 = VCVTTPD2UQQZ256rr
20920
  { 4319, 4,  1,  0,  0,  0, 0x4028bc60005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #4319 = VCVTTPD2UQQZ256rrk
20921
  { 4320, 3,  1,  0,  0,  0, 0x4068bc60005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #4320 = VCVTTPD2UQQZ256rrkz
20922
  { 4321, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080bc60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4321 = VCVTTPD2UQQZrm
20923
  { 4322, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180bc60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4322 = VCVTTPD2UQQZrmb
20924
  { 4323, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0bc60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4323 = VCVTTPD2UQQZrmbk
20925
  { 4324, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0bc60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4324 = VCVTTPD2UQQZrmbkz
20926
  { 4325, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0bc60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4325 = VCVTTPD2UQQZrmk
20927
  { 4326, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0bc60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4326 = VCVTTPD2UQQZrmkz
20928
  { 4327, 2,  1,  0,  0,  0, 0x8080bc60005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4327 = VCVTTPD2UQQZrr
20929
  { 4328, 2,  1,  0,  0,  0, 0x1180bc60005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4328 = VCVTTPD2UQQZrrb
20930
  { 4329, 4,  1,  0,  0,  0, 0x11a0bc60005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #4329 = VCVTTPD2UQQZrrbk
20931
  { 4330, 3,  1,  0,  0,  0, 0x11e0bc60005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #4330 = VCVTTPD2UQQZrrbkz
20932
  { 4331, 4,  1,  0,  0,  0, 0x80a0bc60005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #4331 = VCVTTPD2UQQZrrk
20933
  { 4332, 3,  1,  0,  0,  0, 0x80e0bc60005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #4332 = VCVTTPD2UQQZrrkz
20934
  { 4333, 6,  1,  0,  89, 0|(1ULL<<MCID::MayLoad), 0x82da0005806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #4333 = VCVTTPS2DQYrm
20935
  { 4334, 2,  1,  0,  90, 0, 0x82da0005805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #4334 = VCVTTPS2DQYrr
20936
  { 4335, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20002de0005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4335 = VCVTTPS2DQZ128rm
20937
  { 4336, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9002de0005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4336 = VCVTTPS2DQZ128rmb
20938
  { 4337, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9202de0005806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4337 = VCVTTPS2DQZ128rmbk
20939
  { 4338, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9602de0005806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4338 = VCVTTPS2DQZ128rmbkz
20940
  { 4339, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20202de0005806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4339 = VCVTTPS2DQZ128rmk
20941
  { 4340, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20602de0005806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4340 = VCVTTPS2DQZ128rmkz
20942
  { 4341, 2,  1,  0,  0,  0, 0x20002de0005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4341 = VCVTTPS2DQZ128rr
20943
  { 4342, 4,  1,  0,  0,  0, 0x20202de0005805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #4342 = VCVTTPS2DQZ128rrk
20944
  { 4343, 3,  1,  0,  0,  0, 0x20602de0005805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #4343 = VCVTTPS2DQZ128rrkz
20945
  { 4344, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40082de0005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4344 = VCVTTPS2DQZ256rm
20946
  { 4345, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9082de0005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4345 = VCVTTPS2DQZ256rmb
20947
  { 4346, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9282de0005806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4346 = VCVTTPS2DQZ256rmbk
20948
  { 4347, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9682de0005806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4347 = VCVTTPS2DQZ256rmbkz
20949
  { 4348, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40282de0005806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4348 = VCVTTPS2DQZ256rmk
20950
  { 4349, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40682de0005806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4349 = VCVTTPS2DQZ256rmkz
20951
  { 4350, 2,  1,  0,  0,  0, 0x40082de0005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #4350 = VCVTTPS2DQZ256rr
20952
  { 4351, 4,  1,  0,  0,  0, 0x40282de0005805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #4351 = VCVTTPS2DQZ256rrk
20953
  { 4352, 3,  1,  0,  0,  0, 0x40682de0005805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #4352 = VCVTTPS2DQZ256rrkz
20954
  { 4353, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80802de0005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4353 = VCVTTPS2DQZrm
20955
  { 4354, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9802de0005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4354 = VCVTTPS2DQZrmb
20956
  { 4355, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a02de0005806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #4355 = VCVTTPS2DQZrmbk
20957
  { 4356, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e02de0005806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #4356 = VCVTTPS2DQZrmbkz
20958
  { 4357, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a02de0005806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #4357 = VCVTTPS2DQZrmk
20959
  { 4358, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e02de0005806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #4358 = VCVTTPS2DQZrmkz
20960
  { 4359, 2,  1,  0,  0,  0, 0x80802de0005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4359 = VCVTTPS2DQZrr
20961
  { 4360, 2,  1,  0,  0,  0, 0x9802de0005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4360 = VCVTTPS2DQZrrb
20962
  { 4361, 4,  1,  0,  0,  0, 0x9a02de0005805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #4361 = VCVTTPS2DQZrrbk
20963
  { 4362, 3,  1,  0,  0,  0, 0x9e02de0005805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #4362 = VCVTTPS2DQZrrbkz
20964
  { 4363, 4,  1,  0,  0,  0, 0x80a02de0005805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #4363 = VCVTTPS2DQZrrk
20965
  { 4364, 3,  1,  0,  0,  0, 0x80e02de0005805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #4364 = VCVTTPS2DQZrrkz
20966
  { 4365, 6,  1,  0,  89, 0|(1ULL<<MCID::MayLoad), 0x2da0005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #4365 = VCVTTPS2DQrm
20967
  { 4366, 2,  1,  0,  90, 0, 0x2da0005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #4366 = VCVTTPS2DQrr
20968
  { 4367, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10003d60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4367 = VCVTTPS2QQZ128rm
20969
  { 4368, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9003d60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4368 = VCVTTPS2QQZ128rmb
20970
  { 4369, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9203d60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4369 = VCVTTPS2QQZ128rmbk
20971
  { 4370, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9603d60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4370 = VCVTTPS2QQZ128rmbkz
20972
  { 4371, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10203d60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4371 = VCVTTPS2QQZ128rmk
20973
  { 4372, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10603d60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4372 = VCVTTPS2QQZ128rmkz
20974
  { 4373, 2,  1,  0,  0,  0, 0x10003d60005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4373 = VCVTTPS2QQZ128rr
20975
  { 4374, 4,  1,  0,  0,  0, 0x10203d60005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #4374 = VCVTTPS2QQZ128rrk
20976
  { 4375, 3,  1,  0,  0,  0, 0x10603d60005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #4375 = VCVTTPS2QQZ128rrkz
20977
  { 4376, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20083d60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4376 = VCVTTPS2QQZ256rm
20978
  { 4377, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9083d60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4377 = VCVTTPS2QQZ256rmb
20979
  { 4378, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9283d60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4378 = VCVTTPS2QQZ256rmbk
20980
  { 4379, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9683d60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4379 = VCVTTPS2QQZ256rmbkz
20981
  { 4380, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20283d60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4380 = VCVTTPS2QQZ256rmk
20982
  { 4381, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20683d60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4381 = VCVTTPS2QQZ256rmkz
20983
  { 4382, 2,  1,  0,  0,  0, 0x20083d60005005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #4382 = VCVTTPS2QQZ256rr
20984
  { 4383, 4,  1,  0,  0,  0, 0x20283d60005005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #4383 = VCVTTPS2QQZ256rrk
20985
  { 4384, 3,  1,  0,  0,  0, 0x20683d60005005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #4384 = VCVTTPS2QQZ256rrkz
20986
  { 4385, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40803d60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4385 = VCVTTPS2QQZrm
20987
  { 4386, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9803d60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4386 = VCVTTPS2QQZrmb
20988
  { 4387, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a03d60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4387 = VCVTTPS2QQZrmbk
20989
  { 4388, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e03d60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4388 = VCVTTPS2QQZrmbkz
20990
  { 4389, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a03d60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4389 = VCVTTPS2QQZrmk
20991
  { 4390, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e03d60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4390 = VCVTTPS2QQZrmkz
20992
  { 4391, 2,  1,  0,  0,  0, 0x40803d60005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #4391 = VCVTTPS2QQZrr
20993
  { 4392, 2,  1,  0,  0,  0, 0x9803d60005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #4392 = VCVTTPS2QQZrrb
20994
  { 4393, 4,  1,  0,  0,  0, 0x9a03d60005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #4393 = VCVTTPS2QQZrrbk
20995
  { 4394, 3,  1,  0,  0,  0, 0x9e03d60005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #4394 = VCVTTPS2QQZrrbkz
20996
  { 4395, 4,  1,  0,  0,  0, 0x40a03d60005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #4395 = VCVTTPS2QQZrrk
20997
  { 4396, 3,  1,  0,  0,  0, 0x40e03d60005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #4396 = VCVTTPS2QQZrrkz
20998
  { 4397, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20003c60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4397 = VCVTTPS2UDQZ128rm
20999
  { 4398, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9003c60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4398 = VCVTTPS2UDQZ128rmb
21000
  { 4399, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9203c60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4399 = VCVTTPS2UDQZ128rmbk
21001
  { 4400, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9603c60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4400 = VCVTTPS2UDQZ128rmbkz
21002
  { 4401, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20203c60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4401 = VCVTTPS2UDQZ128rmk
21003
  { 4402, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20603c60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4402 = VCVTTPS2UDQZ128rmkz
21004
  { 4403, 2,  1,  0,  0,  0, 0x20003c60004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4403 = VCVTTPS2UDQZ128rr
21005
  { 4404, 4,  1,  0,  0,  0, 0x20203c60004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #4404 = VCVTTPS2UDQZ128rrk
21006
  { 4405, 3,  1,  0,  0,  0, 0x20603c60004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #4405 = VCVTTPS2UDQZ128rrkz
21007
  { 4406, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40083c60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4406 = VCVTTPS2UDQZ256rm
21008
  { 4407, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9083c60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4407 = VCVTTPS2UDQZ256rmb
21009
  { 4408, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9283c60004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4408 = VCVTTPS2UDQZ256rmbk
21010
  { 4409, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9683c60004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4409 = VCVTTPS2UDQZ256rmbkz
21011
  { 4410, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40283c60004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4410 = VCVTTPS2UDQZ256rmk
21012
  { 4411, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40683c60004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4411 = VCVTTPS2UDQZ256rmkz
21013
  { 4412, 2,  1,  0,  0,  0, 0x40083c60004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #4412 = VCVTTPS2UDQZ256rr
21014
  { 4413, 4,  1,  0,  0,  0, 0x40283c60004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #4413 = VCVTTPS2UDQZ256rrk
21015
  { 4414, 3,  1,  0,  0,  0, 0x40683c60004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #4414 = VCVTTPS2UDQZ256rrkz
21016
  { 4415, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80803c60004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4415 = VCVTTPS2UDQZrm
21017
  { 4416, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9803c60004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4416 = VCVTTPS2UDQZrmb
21018
  { 4417, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a03c60004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #4417 = VCVTTPS2UDQZrmbk
21019
  { 4418, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e03c60004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #4418 = VCVTTPS2UDQZrmbkz
21020
  { 4419, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a03c60004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #4419 = VCVTTPS2UDQZrmk
21021
  { 4420, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e03c60004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #4420 = VCVTTPS2UDQZrmkz
21022
  { 4421, 2,  1,  0,  0,  0, 0x80803c60004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4421 = VCVTTPS2UDQZrr
21023
  { 4422, 2,  1,  0,  0,  0, 0x9803c60004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4422 = VCVTTPS2UDQZrrb
21024
  { 4423, 4,  1,  0,  0,  0, 0x9a03c60004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #4423 = VCVTTPS2UDQZrrbk
21025
  { 4424, 3,  1,  0,  0,  0, 0x9e03c60004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #4424 = VCVTTPS2UDQZrrbkz
21026
  { 4425, 4,  1,  0,  0,  0, 0x80a03c60004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #4425 = VCVTTPS2UDQZrrk
21027
  { 4426, 3,  1,  0,  0,  0, 0x80e03c60004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #4426 = VCVTTPS2UDQZrrkz
21028
  { 4427, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10003c60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4427 = VCVTTPS2UQQZ128rm
21029
  { 4428, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9003c60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4428 = VCVTTPS2UQQZ128rmb
21030
  { 4429, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9203c60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4429 = VCVTTPS2UQQZ128rmbk
21031
  { 4430, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9603c60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4430 = VCVTTPS2UQQZ128rmbkz
21032
  { 4431, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10203c60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4431 = VCVTTPS2UQQZ128rmk
21033
  { 4432, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10603c60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4432 = VCVTTPS2UQQZ128rmkz
21034
  { 4433, 2,  1,  0,  0,  0, 0x10003c60005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4433 = VCVTTPS2UQQZ128rr
21035
  { 4434, 4,  1,  0,  0,  0, 0x10203c60005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #4434 = VCVTTPS2UQQZ128rrk
21036
  { 4435, 3,  1,  0,  0,  0, 0x10603c60005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #4435 = VCVTTPS2UQQZ128rrkz
21037
  { 4436, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20083c60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4436 = VCVTTPS2UQQZ256rm
21038
  { 4437, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9083c60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4437 = VCVTTPS2UQQZ256rmb
21039
  { 4438, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9283c60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4438 = VCVTTPS2UQQZ256rmbk
21040
  { 4439, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9683c60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4439 = VCVTTPS2UQQZ256rmbkz
21041
  { 4440, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20283c60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4440 = VCVTTPS2UQQZ256rmk
21042
  { 4441, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20683c60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4441 = VCVTTPS2UQQZ256rmkz
21043
  { 4442, 2,  1,  0,  0,  0, 0x20083c60005005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #4442 = VCVTTPS2UQQZ256rr
21044
  { 4443, 4,  1,  0,  0,  0, 0x20283c60005005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #4443 = VCVTTPS2UQQZ256rrk
21045
  { 4444, 3,  1,  0,  0,  0, 0x20683c60005005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #4444 = VCVTTPS2UQQZ256rrkz
21046
  { 4445, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40803c60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4445 = VCVTTPS2UQQZrm
21047
  { 4446, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9803c60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4446 = VCVTTPS2UQQZrmb
21048
  { 4447, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a03c60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4447 = VCVTTPS2UQQZrmbk
21049
  { 4448, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e03c60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4448 = VCVTTPS2UQQZrmbkz
21050
  { 4449, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a03c60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4449 = VCVTTPS2UQQZrmk
21051
  { 4450, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e03c60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4450 = VCVTTPS2UQQZrmkz
21052
  { 4451, 2,  1,  0,  0,  0, 0x40803c60005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #4451 = VCVTTPS2UQQZrr
21053
  { 4452, 2,  1,  0,  0,  0, 0x9803c60005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #4452 = VCVTTPS2UQQZrrb
21054
  { 4453, 4,  1,  0,  0,  0, 0x9a03c60005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #4453 = VCVTTPS2UQQZrrbk
21055
  { 4454, 3,  1,  0,  0,  0, 0x9e03c60005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #4454 = VCVTTPS2UQQZrrbkz
21056
  { 4455, 4,  1,  0,  0,  0, 0x40a03c60005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #4455 = VCVTTPS2UQQZrrk
21057
  { 4456, 3,  1,  0,  0,  0, 0x40e03c60005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #4456 = VCVTTPS2UQQZrrkz
21058
  { 4457, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x11009660006005ULL, nullptr, nullptr, OperandInfo501, -1 ,nullptr },  // Inst #4457 = VCVTTSD2SI64Zrb
21059
  { 4458, 2,  1,  0,  0,  0, 0x11109660006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4458 = VCVTTSD2SI64Zrb_Int
21060
  { 4459, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10009660006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4459 = VCVTTSD2SI64Zrm
21061
  { 4460, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10109660006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4460 = VCVTTSD2SI64Zrm_Int
21062
  { 4461, 2,  1,  0,  0,  0, 0x10009660006005ULL, nullptr, nullptr, OperandInfo501, -1 ,nullptr },  // Inst #4461 = VCVTTSD2SI64Zrr
21063
  { 4462, 2,  1,  0,  0,  0, 0x10109660006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4462 = VCVTTSD2SI64Zrr_Int
21064
  { 4463, 6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x109620006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4463 = VCVTTSD2SI64rm
21065
  { 4464, 2,  1,  0,  897,  0, 0x109620006005ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #4464 = VCVTTSD2SI64rr
21066
  { 4465, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x11001660006005ULL, nullptr, nullptr, OperandInfo502, -1 ,nullptr },  // Inst #4465 = VCVTTSD2SIZrb
21067
  { 4466, 2,  1,  0,  0,  0, 0x11101660006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4466 = VCVTTSD2SIZrb_Int
21068
  { 4467, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10001660006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4467 = VCVTTSD2SIZrm
21069
  { 4468, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10101660006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4468 = VCVTTSD2SIZrm_Int
21070
  { 4469, 2,  1,  0,  0,  0, 0x10001660006005ULL, nullptr, nullptr, OperandInfo502, -1 ,nullptr },  // Inst #4469 = VCVTTSD2SIZrr
21071
  { 4470, 2,  1,  0,  0,  0, 0x10101660006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4470 = VCVTTSD2SIZrr_Int
21072
  { 4471, 6,  1,  0,  898,  0|(1ULL<<MCID::MayLoad), 0x101620006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4471 = VCVTTSD2SIrm
21073
  { 4472, 2,  1,  0,  897,  0, 0x101620006005ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr },  // Inst #4472 = VCVTTSD2SIrr
21074
  { 4473, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1100bc60006005ULL, nullptr, nullptr, OperandInfo501, -1 ,nullptr },  // Inst #4473 = VCVTTSD2USI64Zrb
21075
  { 4474, 2,  1,  0,  0,  0, 0x1110bc60006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4474 = VCVTTSD2USI64Zrb_Int
21076
  { 4475, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1000bc60006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4475 = VCVTTSD2USI64Zrm
21077
  { 4476, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1010bc60006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4476 = VCVTTSD2USI64Zrm_Int
21078
  { 4477, 2,  1,  0,  0,  0, 0x1000bc60006005ULL, nullptr, nullptr, OperandInfo501, -1 ,nullptr },  // Inst #4477 = VCVTTSD2USI64Zrr
21079
  { 4478, 2,  1,  0,  0,  0, 0x1010bc60006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4478 = VCVTTSD2USI64Zrr_Int
21080
  { 4479, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x11003c60006005ULL, nullptr, nullptr, OperandInfo502, -1 ,nullptr },  // Inst #4479 = VCVTTSD2USIZrb
21081
  { 4480, 2,  1,  0,  0,  0, 0x11103c60006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4480 = VCVTTSD2USIZrb_Int
21082
  { 4481, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10003c60006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4481 = VCVTTSD2USIZrm
21083
  { 4482, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10103c60006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4482 = VCVTTSD2USIZrm_Int
21084
  { 4483, 2,  1,  0,  0,  0, 0x10003c60006005ULL, nullptr, nullptr, OperandInfo502, -1 ,nullptr },  // Inst #4483 = VCVTTSD2USIZrr
21085
  { 4484, 2,  1,  0,  0,  0, 0x10103c60006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4484 = VCVTTSD2USIZrr_Int
21086
  { 4485, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9009660005805ULL, nullptr, nullptr, OperandInfo503, -1 ,nullptr },  // Inst #4485 = VCVTTSS2SI64Zrb
21087
  { 4486, 2,  1,  0,  0,  0, 0x9109660005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4486 = VCVTTSS2SI64Zrb_Int
21088
  { 4487, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8009660005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4487 = VCVTTSS2SI64Zrm
21089
  { 4488, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8109660005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4488 = VCVTTSS2SI64Zrm_Int
21090
  { 4489, 2,  1,  0,  0,  0, 0x8009660005805ULL, nullptr, nullptr, OperandInfo503, -1 ,nullptr },  // Inst #4489 = VCVTTSS2SI64Zrr
21091
  { 4490, 2,  1,  0,  0,  0, 0x8109660005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4490 = VCVTTSS2SI64Zrr_Int
21092
  { 4491, 6,  1,  0,  895,  0|(1ULL<<MCID::MayLoad), 0x109620005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4491 = VCVTTSS2SI64rm
21093
  { 4492, 2,  1,  0,  893,  0, 0x109620005805ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr },  // Inst #4492 = VCVTTSS2SI64rr
21094
  { 4493, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9001660005805ULL, nullptr, nullptr, OperandInfo504, -1 ,nullptr },  // Inst #4493 = VCVTTSS2SIZrb
21095
  { 4494, 2,  1,  0,  0,  0, 0x9101660005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4494 = VCVTTSS2SIZrb_Int
21096
  { 4495, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8001660005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4495 = VCVTTSS2SIZrm
21097
  { 4496, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8101660005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4496 = VCVTTSS2SIZrm_Int
21098
  { 4497, 2,  1,  0,  0,  0, 0x8001660005805ULL, nullptr, nullptr, OperandInfo504, -1 ,nullptr },  // Inst #4497 = VCVTTSS2SIZrr
21099
  { 4498, 2,  1,  0,  0,  0, 0x8101660005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4498 = VCVTTSS2SIZrr_Int
21100
  { 4499, 6,  1,  0,  896,  0|(1ULL<<MCID::MayLoad), 0x101620005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4499 = VCVTTSS2SIrm
21101
  { 4500, 2,  1,  0,  894,  0, 0x101620005805ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #4500 = VCVTTSS2SIrr
21102
  { 4501, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x900bc60005805ULL, nullptr, nullptr, OperandInfo503, -1 ,nullptr },  // Inst #4501 = VCVTTSS2USI64Zrb
21103
  { 4502, 2,  1,  0,  0,  0, 0x910bc60005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4502 = VCVTTSS2USI64Zrb_Int
21104
  { 4503, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x800bc60005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4503 = VCVTTSS2USI64Zrm
21105
  { 4504, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x810bc60005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #4504 = VCVTTSS2USI64Zrm_Int
21106
  { 4505, 2,  1,  0,  0,  0, 0x800bc60005805ULL, nullptr, nullptr, OperandInfo503, -1 ,nullptr },  // Inst #4505 = VCVTTSS2USI64Zrr
21107
  { 4506, 2,  1,  0,  0,  0, 0x810bc60005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #4506 = VCVTTSS2USI64Zrr_Int
21108
  { 4507, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9003c60005805ULL, nullptr, nullptr, OperandInfo504, -1 ,nullptr },  // Inst #4507 = VCVTTSS2USIZrb
21109
  { 4508, 2,  1,  0,  0,  0, 0x9103c60005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4508 = VCVTTSS2USIZrb_Int
21110
  { 4509, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8003c60005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4509 = VCVTTSS2USIZrm
21111
  { 4510, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8103c60005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #4510 = VCVTTSS2USIZrm_Int
21112
  { 4511, 2,  1,  0,  0,  0, 0x8003c60005805ULL, nullptr, nullptr, OperandInfo504, -1 ,nullptr },  // Inst #4511 = VCVTTSS2USIZrr
21113
  { 4512, 2,  1,  0,  0,  0, 0x8103c60005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #4512 = VCVTTSS2USIZrr_Int
21114
  { 4513, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10003d60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4513 = VCVTUDQ2PDZ128rm
21115
  { 4514, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9003d60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4514 = VCVTUDQ2PDZ128rmb
21116
  { 4515, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9203d60005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4515 = VCVTUDQ2PDZ128rmbk
21117
  { 4516, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9603d60005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4516 = VCVTUDQ2PDZ128rmbkz
21118
  { 4517, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10203d60005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4517 = VCVTUDQ2PDZ128rmk
21119
  { 4518, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10603d60005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4518 = VCVTUDQ2PDZ128rmkz
21120
  { 4519, 2,  1,  0,  0,  0, 0x10003d60005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4519 = VCVTUDQ2PDZ128rr
21121
  { 4520, 4,  1,  0,  0,  0, 0x10203d60005805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #4520 = VCVTUDQ2PDZ128rrk
21122
  { 4521, 3,  1,  0,  0,  0, 0x10603d60005805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #4521 = VCVTUDQ2PDZ128rrkz
21123
  { 4522, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20083d60005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4522 = VCVTUDQ2PDZ256rm
21124
  { 4523, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9083d60005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4523 = VCVTUDQ2PDZ256rmb
21125
  { 4524, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9283d60005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4524 = VCVTUDQ2PDZ256rmbk
21126
  { 4525, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9683d60005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4525 = VCVTUDQ2PDZ256rmbkz
21127
  { 4526, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20283d60005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4526 = VCVTUDQ2PDZ256rmk
21128
  { 4527, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20683d60005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4527 = VCVTUDQ2PDZ256rmkz
21129
  { 4528, 2,  1,  0,  0,  0, 0x20083d60005805ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #4528 = VCVTUDQ2PDZ256rr
21130
  { 4529, 4,  1,  0,  0,  0, 0x20283d60005805ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #4529 = VCVTUDQ2PDZ256rrk
21131
  { 4530, 3,  1,  0,  0,  0, 0x20683d60005805ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #4530 = VCVTUDQ2PDZ256rrkz
21132
  { 4531, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40803d60005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4531 = VCVTUDQ2PDZrm
21133
  { 4532, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9803d60005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4532 = VCVTUDQ2PDZrmb
21134
  { 4533, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a03d60005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4533 = VCVTUDQ2PDZrmbk
21135
  { 4534, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e03d60005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4534 = VCVTUDQ2PDZrmbkz
21136
  { 4535, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a03d60005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4535 = VCVTUDQ2PDZrmk
21137
  { 4536, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e03d60005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4536 = VCVTUDQ2PDZrmkz
21138
  { 4537, 2,  1,  0,  0,  0, 0x40803d60005805ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #4537 = VCVTUDQ2PDZrr
21139
  { 4538, 4,  1,  0,  0,  0, 0x40a03d60005805ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #4538 = VCVTUDQ2PDZrrk
21140
  { 4539, 3,  1,  0,  0,  0, 0x40e03d60005805ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #4539 = VCVTUDQ2PDZrrkz
21141
  { 4540, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20003d60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4540 = VCVTUDQ2PSZ128rm
21142
  { 4541, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9003d60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4541 = VCVTUDQ2PSZ128rmb
21143
  { 4542, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9203d60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4542 = VCVTUDQ2PSZ128rmbk
21144
  { 4543, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9603d60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4543 = VCVTUDQ2PSZ128rmbkz
21145
  { 4544, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20203d60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4544 = VCVTUDQ2PSZ128rmk
21146
  { 4545, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20603d60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4545 = VCVTUDQ2PSZ128rmkz
21147
  { 4546, 2,  1,  0,  0,  0, 0x20003d60006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4546 = VCVTUDQ2PSZ128rr
21148
  { 4547, 4,  1,  0,  0,  0, 0x20203d60006005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #4547 = VCVTUDQ2PSZ128rrk
21149
  { 4548, 3,  1,  0,  0,  0, 0x20603d60006005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #4548 = VCVTUDQ2PSZ128rrkz
21150
  { 4549, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40083d60006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4549 = VCVTUDQ2PSZ256rm
21151
  { 4550, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9083d60006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4550 = VCVTUDQ2PSZ256rmb
21152
  { 4551, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9283d60006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4551 = VCVTUDQ2PSZ256rmbk
21153
  { 4552, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9683d60006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4552 = VCVTUDQ2PSZ256rmbkz
21154
  { 4553, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40283d60006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4553 = VCVTUDQ2PSZ256rmk
21155
  { 4554, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40683d60006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4554 = VCVTUDQ2PSZ256rmkz
21156
  { 4555, 2,  1,  0,  0,  0, 0x40083d60006005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #4555 = VCVTUDQ2PSZ256rr
21157
  { 4556, 4,  1,  0,  0,  0, 0x40283d60006005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #4556 = VCVTUDQ2PSZ256rrk
21158
  { 4557, 3,  1,  0,  0,  0, 0x40683d60006005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #4557 = VCVTUDQ2PSZ256rrkz
21159
  { 4558, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80803d60006006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4558 = VCVTUDQ2PSZrm
21160
  { 4559, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9803d60006006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4559 = VCVTUDQ2PSZrmb
21161
  { 4560, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a03d60006006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #4560 = VCVTUDQ2PSZrmbk
21162
  { 4561, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e03d60006006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #4561 = VCVTUDQ2PSZrmbkz
21163
  { 4562, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a03d60006006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #4562 = VCVTUDQ2PSZrmk
21164
  { 4563, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e03d60006006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #4563 = VCVTUDQ2PSZrmkz
21165
  { 4564, 2,  1,  0,  0,  0, 0x80803d60006005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4564 = VCVTUDQ2PSZrr
21166
  { 4565, 3,  1,  0,  0,  0, 0x409803d60006005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #4565 = VCVTUDQ2PSZrrb
21167
  { 4566, 5,  1,  0,  0,  0, 0x409a03d60006005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #4566 = VCVTUDQ2PSZrrbk
21168
  { 4567, 4,  1,  0,  0,  0, 0x409e03d60006005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #4567 = VCVTUDQ2PSZrrbkz
21169
  { 4568, 4,  1,  0,  0,  0, 0x80a03d60006005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #4568 = VCVTUDQ2PSZrrk
21170
  { 4569, 3,  1,  0,  0,  0, 0x80e03d60006005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #4569 = VCVTUDQ2PSZrrkz
21171
  { 4570, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000bd60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4570 = VCVTUQQ2PDZ128rm
21172
  { 4571, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100bd60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4571 = VCVTUQQ2PDZ128rmb
21173
  { 4572, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120bd60005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4572 = VCVTUQQ2PDZ128rmbk
21174
  { 4573, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160bd60005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4573 = VCVTUQQ2PDZ128rmbkz
21175
  { 4574, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020bd60005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4574 = VCVTUQQ2PDZ128rmk
21176
  { 4575, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060bd60005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4575 = VCVTUQQ2PDZ128rmkz
21177
  { 4576, 2,  1,  0,  0,  0, 0x2000bd60005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4576 = VCVTUQQ2PDZ128rr
21178
  { 4577, 4,  1,  0,  0,  0, 0x2020bd60005805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #4577 = VCVTUQQ2PDZ128rrk
21179
  { 4578, 3,  1,  0,  0,  0, 0x2060bd60005805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #4578 = VCVTUQQ2PDZ128rrkz
21180
  { 4579, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008bd60005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4579 = VCVTUQQ2PDZ256rm
21181
  { 4580, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108bd60005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4580 = VCVTUQQ2PDZ256rmb
21182
  { 4581, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128bd60005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4581 = VCVTUQQ2PDZ256rmbk
21183
  { 4582, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168bd60005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4582 = VCVTUQQ2PDZ256rmbkz
21184
  { 4583, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028bd60005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4583 = VCVTUQQ2PDZ256rmk
21185
  { 4584, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068bd60005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4584 = VCVTUQQ2PDZ256rmkz
21186
  { 4585, 2,  1,  0,  0,  0, 0x4008bd60005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #4585 = VCVTUQQ2PDZ256rr
21187
  { 4586, 4,  1,  0,  0,  0, 0x4028bd60005805ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #4586 = VCVTUQQ2PDZ256rrk
21188
  { 4587, 3,  1,  0,  0,  0, 0x4068bd60005805ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #4587 = VCVTUQQ2PDZ256rrkz
21189
  { 4588, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080bd60005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4588 = VCVTUQQ2PDZrm
21190
  { 4589, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180bd60005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4589 = VCVTUQQ2PDZrmb
21191
  { 4590, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0bd60005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4590 = VCVTUQQ2PDZrmbk
21192
  { 4591, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0bd60005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4591 = VCVTUQQ2PDZrmbkz
21193
  { 4592, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0bd60005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4592 = VCVTUQQ2PDZrmk
21194
  { 4593, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0bd60005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4593 = VCVTUQQ2PDZrmkz
21195
  { 4594, 2,  1,  0,  0,  0, 0x8080bd60005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4594 = VCVTUQQ2PDZrr
21196
  { 4595, 3,  1,  0,  0,  0, 0x41180bd60005805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #4595 = VCVTUQQ2PDZrrb
21197
  { 4596, 5,  1,  0,  0,  0, 0x411a0bd60005805ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #4596 = VCVTUQQ2PDZrrbk
21198
  { 4597, 4,  1,  0,  0,  0, 0x411e0bd60005805ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #4597 = VCVTUQQ2PDZrrbkz
21199
  { 4598, 4,  1,  0,  0,  0, 0x80a0bd60005805ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #4598 = VCVTUQQ2PDZrrk
21200
  { 4599, 3,  1,  0,  0,  0, 0x80e0bd60005805ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #4599 = VCVTUQQ2PDZrrkz
21201
  { 4600, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000bd60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4600 = VCVTUQQ2PSZ128rm
21202
  { 4601, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100bd60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4601 = VCVTUQQ2PSZ128rmb
21203
  { 4602, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120bd60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4602 = VCVTUQQ2PSZ128rmbk
21204
  { 4603, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160bd60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4603 = VCVTUQQ2PSZ128rmbkz
21205
  { 4604, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020bd60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4604 = VCVTUQQ2PSZ128rmk
21206
  { 4605, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060bd60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4605 = VCVTUQQ2PSZ128rmkz
21207
  { 4606, 2,  1,  0,  0,  0, 0x2000bd60006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4606 = VCVTUQQ2PSZ128rr
21208
  { 4607, 4,  1,  0,  0,  0, 0x2020bd60006005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #4607 = VCVTUQQ2PSZ128rrk
21209
  { 4608, 3,  1,  0,  0,  0, 0x2060bd60006005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #4608 = VCVTUQQ2PSZ128rrkz
21210
  { 4609, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008bd60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4609 = VCVTUQQ2PSZ256rm
21211
  { 4610, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108bd60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4610 = VCVTUQQ2PSZ256rmb
21212
  { 4611, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128bd60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4611 = VCVTUQQ2PSZ256rmbk
21213
  { 4612, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168bd60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4612 = VCVTUQQ2PSZ256rmbkz
21214
  { 4613, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028bd60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4613 = VCVTUQQ2PSZ256rmk
21215
  { 4614, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068bd60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4614 = VCVTUQQ2PSZ256rmkz
21216
  { 4615, 2,  1,  0,  0,  0, 0x4008bd60006005ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #4615 = VCVTUQQ2PSZ256rr
21217
  { 4616, 4,  1,  0,  0,  0, 0x4028bd60006005ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr },  // Inst #4616 = VCVTUQQ2PSZ256rrk
21218
  { 4617, 3,  1,  0,  0,  0, 0x4068bd60006005ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr },  // Inst #4617 = VCVTUQQ2PSZ256rrkz
21219
  { 4618, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080bd60006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4618 = VCVTUQQ2PSZrm
21220
  { 4619, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180bd60006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4619 = VCVTUQQ2PSZrmb
21221
  { 4620, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0bd60006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4620 = VCVTUQQ2PSZrmbk
21222
  { 4621, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0bd60006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4621 = VCVTUQQ2PSZrmbkz
21223
  { 4622, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0bd60006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4622 = VCVTUQQ2PSZrmk
21224
  { 4623, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0bd60006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4623 = VCVTUQQ2PSZrmkz
21225
  { 4624, 2,  1,  0,  0,  0, 0x8080bd60006005ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #4624 = VCVTUQQ2PSZrr
21226
  { 4625, 3,  1,  0,  0,  0, 0x41180bd60006005ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr },  // Inst #4625 = VCVTUQQ2PSZrrb
21227
  { 4626, 5,  1,  0,  0,  0, 0x411a0bd60006005ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr },  // Inst #4626 = VCVTUQQ2PSZrrbk
21228
  { 4627, 4,  1,  0,  0,  0, 0x411e0bd60006005ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr },  // Inst #4627 = VCVTUQQ2PSZrrbkz
21229
  { 4628, 4,  1,  0,  0,  0, 0x80a0bd60006005ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #4628 = VCVTUQQ2PSZrrk
21230
  { 4629, 3,  1,  0,  0,  0, 0x80e0bd60006005ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #4629 = VCVTUQQ2PSZrrkz
21231
  { 4630, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8113de0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr },  // Inst #4630 = VCVTUSI2SDZrm
21232
  { 4631, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8113de0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4631 = VCVTUSI2SDZrm_Int
21233
  { 4632, 3,  1,  0,  0,  0, 0x8113de0006005ULL, nullptr, nullptr, OperandInfo490, -1 ,nullptr },  // Inst #4632 = VCVTUSI2SDZrr
21234
  { 4633, 3,  1,  0,  0,  0, 0x8113de0006005ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr },  // Inst #4633 = VCVTUSI2SDZrr_Int
21235
  { 4634, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8113de0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr },  // Inst #4634 = VCVTUSI2SSZrm
21236
  { 4635, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8113de0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4635 = VCVTUSI2SSZrm_Int
21237
  { 4636, 3,  1,  0,  0,  0, 0x8113de0005805ULL, nullptr, nullptr, OperandInfo494, -1 ,nullptr },  // Inst #4636 = VCVTUSI2SSZrr
21238
  { 4637, 3,  1,  0,  0,  0, 0x8113de0005805ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr },  // Inst #4637 = VCVTUSI2SSZrr_Int
21239
  { 4638, 4,  1,  0,  0,  0, 0x409113de0005805ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr },  // Inst #4638 = VCVTUSI2SSZrrb_Int
21240
  { 4639, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011bde0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr },  // Inst #4639 = VCVTUSI642SDZrm
21241
  { 4640, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011bde0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4640 = VCVTUSI642SDZrm_Int
21242
  { 4641, 3,  1,  0,  0,  0, 0x1011bde0006005ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr },  // Inst #4641 = VCVTUSI642SDZrr
21243
  { 4642, 3,  1,  0,  0,  0, 0x1011bde0006005ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr },  // Inst #4642 = VCVTUSI642SDZrr_Int
21244
  { 4643, 4,  1,  0,  0,  0, 0x41111bde0006005ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr },  // Inst #4643 = VCVTUSI642SDZrrb_Int
21245
  { 4644, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011bde0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr },  // Inst #4644 = VCVTUSI642SSZrm
21246
  { 4645, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011bde0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4645 = VCVTUSI642SSZrm_Int
21247
  { 4646, 3,  1,  0,  0,  0, 0x1011bde0005805ULL, nullptr, nullptr, OperandInfo498, -1 ,nullptr },  // Inst #4646 = VCVTUSI642SSZrr
21248
  { 4647, 3,  1,  0,  0,  0, 0x1011bde0005805ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr },  // Inst #4647 = VCVTUSI642SSZrr_Int
21249
  { 4648, 4,  1,  0,  0,  0, 0x41111bde0005805ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr },  // Inst #4648 = VCVTUSI642SSZrrb_Int
21250
  { 4649, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001217804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #4649 = VDBPSADBWZ128rmi
21251
  { 4650, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021217804d006ULL, nullptr, nullptr, OperandInfo505, -1 ,nullptr },  // Inst #4650 = VDBPSADBWZ128rmik
21252
  { 4651, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061217804d006ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr },  // Inst #4651 = VDBPSADBWZ128rmikz
21253
  { 4652, 4,  1,  0,  0,  0, 0x2001217804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #4652 = VDBPSADBWZ128rri
21254
  { 4653, 6,  1,  0,  0,  0, 0x2021217804d005ULL, nullptr, nullptr, OperandInfo507, -1 ,nullptr },  // Inst #4653 = VDBPSADBWZ128rrik
21255
  { 4654, 5,  1,  0,  0,  0, 0x2061217804d005ULL, nullptr, nullptr, OperandInfo508, -1 ,nullptr },  // Inst #4654 = VDBPSADBWZ128rrikz
21256
  { 4655, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009217804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #4655 = VDBPSADBWZ256rmi
21257
  { 4656, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029217804d006ULL, nullptr, nullptr, OperandInfo509, -1 ,nullptr },  // Inst #4656 = VDBPSADBWZ256rmik
21258
  { 4657, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069217804d006ULL, nullptr, nullptr, OperandInfo510, -1 ,nullptr },  // Inst #4657 = VDBPSADBWZ256rmikz
21259
  { 4658, 4,  1,  0,  0,  0, 0x4009217804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #4658 = VDBPSADBWZ256rri
21260
  { 4659, 6,  1,  0,  0,  0, 0x4029217804d005ULL, nullptr, nullptr, OperandInfo511, -1 ,nullptr },  // Inst #4659 = VDBPSADBWZ256rrik
21261
  { 4660, 5,  1,  0,  0,  0, 0x4069217804d005ULL, nullptr, nullptr, OperandInfo512, -1 ,nullptr },  // Inst #4660 = VDBPSADBWZ256rrikz
21262
  { 4661, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081217804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #4661 = VDBPSADBWZrmi
21263
  { 4662, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1217804d006ULL, nullptr, nullptr, OperandInfo513, -1 ,nullptr },  // Inst #4662 = VDBPSADBWZrmik
21264
  { 4663, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1217804d006ULL, nullptr, nullptr, OperandInfo514, -1 ,nullptr },  // Inst #4663 = VDBPSADBWZrmikz
21265
  { 4664, 4,  1,  0,  0,  0, 0x8081217804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #4664 = VDBPSADBWZrri
21266
  { 4665, 6,  1,  0,  0,  0, 0x80a1217804d005ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr },  // Inst #4665 = VDBPSADBWZrrik
21267
  { 4666, 5,  1,  0,  0,  0, 0x80e1217804d005ULL, nullptr, nullptr, OperandInfo516, -1 ,nullptr },  // Inst #4666 = VDBPSADBWZrrikz
21268
  { 4667, 7,  1,  0,  913,  0|(1ULL<<MCID::MayLoad), 0x92f30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #4667 = VDIVPDYrm
21269
  { 4668, 3,  1,  0,  912,  0, 0x92f30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #4668 = VDIVPDYrr
21270
  { 4669, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001af60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4669 = VDIVPDZ128rm
21271
  { 4670, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101af60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4670 = VDIVPDZ128rmb
21272
  { 4671, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121af60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #4671 = VDIVPDZ128rmbk
21273
  { 4672, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161af60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #4672 = VDIVPDZ128rmbkz
21274
  { 4673, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021af60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #4673 = VDIVPDZ128rmk
21275
  { 4674, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061af60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #4674 = VDIVPDZ128rmkz
21276
  { 4675, 3,  1,  0,  0,  0, 0x2001af60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #4675 = VDIVPDZ128rr
21277
  { 4676, 5,  1,  0,  0,  0, 0x2021af60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #4676 = VDIVPDZ128rrk
21278
  { 4677, 4,  1,  0,  0,  0, 0x2061af60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #4677 = VDIVPDZ128rrkz
21279
  { 4678, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009af60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #4678 = VDIVPDZ256rm
21280
  { 4679, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109af60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #4679 = VDIVPDZ256rmb
21281
  { 4680, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129af60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #4680 = VDIVPDZ256rmbk
21282
  { 4681, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169af60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #4681 = VDIVPDZ256rmbkz
21283
  { 4682, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029af60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #4682 = VDIVPDZ256rmk
21284
  { 4683, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069af60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #4683 = VDIVPDZ256rmkz
21285
  { 4684, 3,  1,  0,  0,  0, 0x4009af60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #4684 = VDIVPDZ256rr
21286
  { 4685, 5,  1,  0,  0,  0, 0x4029af60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #4685 = VDIVPDZ256rrk
21287
  { 4686, 4,  1,  0,  0,  0, 0x4069af60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #4686 = VDIVPDZ256rrkz
21288
  { 4687, 4,  1,  0,  0,  0, 0x41181af60005005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #4687 = VDIVPDZrb
21289
  { 4688, 6,  1,  0,  0,  0, 0x411a1af60005005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #4688 = VDIVPDZrbk
21290
  { 4689, 5,  1,  0,  0,  0, 0x411e1af60005005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr },  // Inst #4689 = VDIVPDZrbkz
21291
  { 4690, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081af60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #4690 = VDIVPDZrm
21292
  { 4691, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181af60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #4691 = VDIVPDZrmb
21293
  { 4692, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1af60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #4692 = VDIVPDZrmbk
21294
  { 4693, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1af60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #4693 = VDIVPDZrmbkz
21295
  { 4694, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1af60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #4694 = VDIVPDZrmk
21296
  { 4695, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1af60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #4695 = VDIVPDZrmkz
21297
  { 4696, 3,  1,  0,  0,  0, 0x8081af60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #4696 = VDIVPDZrr
21298
  { 4697, 5,  1,  0,  0,  0, 0x80a1af60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #4697 = VDIVPDZrrk
21299
  { 4698, 4,  1,  0,  0,  0, 0x80e1af60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #4698 = VDIVPDZrrkz
21300
  { 4699, 7,  1,  0,  113,  0|(1ULL<<MCID::MayLoad), 0x12f30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #4699 = VDIVPDrm
21301
  { 4700, 3,  1,  0,  114,  0, 0x12f30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #4700 = VDIVPDrr
21302
  { 4701, 7,  1,  0,  911,  0|(1ULL<<MCID::MayLoad), 0x92f28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #4701 = VDIVPSYrm
21303
  { 4702, 3,  1,  0,  910,  0, 0x92f28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #4702 = VDIVPSYrr
21304
  { 4703, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012f60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4703 = VDIVPSZ128rm
21305
  { 4704, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012f60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4704 = VDIVPSZ128rmb
21306
  { 4705, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212f60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #4705 = VDIVPSZ128rmbk
21307
  { 4706, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612f60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #4706 = VDIVPSZ128rmbkz
21308
  { 4707, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212f60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #4707 = VDIVPSZ128rmk
21309
  { 4708, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612f60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #4708 = VDIVPSZ128rmkz
21310
  { 4709, 3,  1,  0,  0,  0, 0x20012f60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #4709 = VDIVPSZ128rr
21311
  { 4710, 5,  1,  0,  0,  0, 0x20212f60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #4710 = VDIVPSZ128rrk
21312
  { 4711, 4,  1,  0,  0,  0, 0x20612f60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #4711 = VDIVPSZ128rrkz
21313
  { 4712, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092f60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #4712 = VDIVPSZ256rm
21314
  { 4713, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092f60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #4713 = VDIVPSZ256rmb
21315
  { 4714, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292f60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #4714 = VDIVPSZ256rmbk
21316
  { 4715, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692f60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #4715 = VDIVPSZ256rmbkz
21317
  { 4716, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292f60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #4716 = VDIVPSZ256rmk
21318
  { 4717, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692f60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #4717 = VDIVPSZ256rmkz
21319
  { 4718, 3,  1,  0,  0,  0, 0x40092f60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #4718 = VDIVPSZ256rr
21320
  { 4719, 5,  1,  0,  0,  0, 0x40292f60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #4719 = VDIVPSZ256rrk
21321
  { 4720, 4,  1,  0,  0,  0, 0x40692f60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #4720 = VDIVPSZ256rrkz
21322
  { 4721, 4,  1,  0,  0,  0, 0x409812f60004805ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #4721 = VDIVPSZrb
21323
  { 4722, 6,  1,  0,  0,  0, 0x409a12f60004805ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #4722 = VDIVPSZrbk
21324
  { 4723, 5,  1,  0,  0,  0, 0x409e12f60004805ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr },  // Inst #4723 = VDIVPSZrbkz
21325
  { 4724, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812f60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #4724 = VDIVPSZrm
21326
  { 4725, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812f60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #4725 = VDIVPSZrmb
21327
  { 4726, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12f60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #4726 = VDIVPSZrmbk
21328
  { 4727, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12f60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #4727 = VDIVPSZrmbkz
21329
  { 4728, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12f60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #4728 = VDIVPSZrmk
21330
  { 4729, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12f60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #4729 = VDIVPSZrmkz
21331
  { 4730, 3,  1,  0,  0,  0, 0x80812f60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #4730 = VDIVPSZrr
21332
  { 4731, 5,  1,  0,  0,  0, 0x80a12f60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #4731 = VDIVPSZrrk
21333
  { 4732, 4,  1,  0,  0,  0, 0x80e12f60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #4732 = VDIVPSZrrkz
21334
  { 4733, 7,  1,  0,  113,  0|(1ULL<<MCID::MayLoad), 0x12f28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #4733 = VDIVPSrm
21335
  { 4734, 3,  1,  0,  115,  0, 0x12f28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #4734 = VDIVPSrr
21336
  { 4735, 7,  1,  0,  525,  0|(1ULL<<MCID::MayLoad), 0x1011af60006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr },  // Inst #4735 = VDIVSDZrm
21337
  { 4736, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011af60006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4736 = VDIVSDZrm_Int
21338
  { 4737, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031af60006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #4737 = VDIVSDZrm_Intk
21339
  { 4738, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071af60006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #4738 = VDIVSDZrm_Intkz
21340
  { 4739, 3,  1,  0,  525,  0, 0x1011af60006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr },  // Inst #4739 = VDIVSDZrr
21341
  { 4740, 3,  1,  0,  0,  0, 0x1011af60006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #4740 = VDIVSDZrr_Int
21342
  { 4741, 5,  1,  0,  0,  0, 0x1031af60006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #4741 = VDIVSDZrr_Intk
21343
  { 4742, 4,  1,  0,  0,  0, 0x1071af60006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #4742 = VDIVSDZrr_Intkz
21344
  { 4743, 4,  1,  0,  0,  0, 0x41111af60006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #4743 = VDIVSDZrrb
21345
  { 4744, 6,  1,  0,  0,  0, 0x41131af60006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #4744 = VDIVSDZrrbk
21346
  { 4745, 5,  1,  0,  0,  0, 0x41171af60006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #4745 = VDIVSDZrrbkz
21347
  { 4746, 7,  1,  0,  118,  0|(1ULL<<MCID::MayLoad), 0x112f30006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #4746 = VDIVSDrm
21348
  { 4747, 7,  1,  0,  118,  0|(1ULL<<MCID::MayLoad), 0x112f30006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #4747 = VDIVSDrm_Int
21349
  { 4748, 3,  1,  0,  119,  0, 0x112f30006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #4748 = VDIVSDrr
21350
  { 4749, 3,  1,  0,  119,  0, 0x112f30006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #4749 = VDIVSDrr_Int
21351
  { 4750, 7,  1,  0,  526,  0|(1ULL<<MCID::MayLoad), 0x8112f60005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr },  // Inst #4750 = VDIVSSZrm
21352
  { 4751, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8112f60005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #4751 = VDIVSSZrm_Int
21353
  { 4752, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8312f60005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #4752 = VDIVSSZrm_Intk
21354
  { 4753, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8712f60005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #4753 = VDIVSSZrm_Intkz
21355
  { 4754, 3,  1,  0,  526,  0, 0x8112f60005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr },  // Inst #4754 = VDIVSSZrr
21356
  { 4755, 3,  1,  0,  0,  0, 0x8112f60005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #4755 = VDIVSSZrr_Int
21357
  { 4756, 5,  1,  0,  0,  0, 0x8312f60005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #4756 = VDIVSSZrr_Intk
21358
  { 4757, 4,  1,  0,  0,  0, 0x8712f60005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #4757 = VDIVSSZrr_Intkz
21359
  { 4758, 4,  1,  0,  0,  0, 0x409112f60005805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #4758 = VDIVSSZrrb
21360
  { 4759, 6,  1,  0,  0,  0, 0x409312f60005805ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #4759 = VDIVSSZrrbk
21361
  { 4760, 5,  1,  0,  0,  0, 0x409712f60005805ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #4760 = VDIVSSZrrbkz
21362
  { 4761, 7,  1,  0,  118,  0|(1ULL<<MCID::MayLoad), 0x112f28005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #4761 = VDIVSSrm
21363
  { 4762, 7,  1,  0,  118,  0|(1ULL<<MCID::MayLoad), 0x112f28005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #4762 = VDIVSSrm_Int
21364
  { 4763, 3,  1,  0,  120,  0, 0x112f28005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #4763 = VDIVSSrr
21365
  { 4764, 3,  1,  0,  120,  0, 0x112f28005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #4764 = VDIVSSrr_Int
21366
  { 4765, 8,  1,  0,  925,  0|(1ULL<<MCID::MayLoad), 0x120b004d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #4765 = VDPPDrmi
21367
  { 4766, 4,  1,  0,  924,  0|(1ULL<<MCID::Commutable), 0x120b004d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #4766 = VDPPDrri
21368
  { 4767, 8,  1,  0,  922,  0|(1ULL<<MCID::MayLoad), 0x9202804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #4767 = VDPPSYrmi
21369
  { 4768, 4,  1,  0,  921,  0|(1ULL<<MCID::Commutable), 0x9202804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #4768 = VDPPSYrri
21370
  { 4769, 8,  1,  0,  922,  0|(1ULL<<MCID::MayLoad), 0x1202804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #4769 = VDPPSrmi
21371
  { 4770, 4,  1,  0,  921,  0|(1ULL<<MCID::Commutable), 0x1202804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #4770 = VDPPSrri
21372
  { 4771, 5,  0,  0,  540,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x401cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #4771 = VERRm
21373
  { 4772, 1,  0,  0,  540,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4014ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #4772 = VERRr
21374
  { 4773, 5,  0,  0,  541,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x401dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #4773 = VERWm
21375
  { 4774, 1,  0,  0,  542,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4015ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr },  // Inst #4774 = VERWr
21376
  { 4775, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080e460009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4775 = VEXP2PDm
21377
  { 4776, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180e460009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4776 = VEXP2PDmb
21378
  { 4777, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0e460009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4777 = VEXP2PDmbk
21379
  { 4778, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0e460009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4778 = VEXP2PDmbkz
21380
  { 4779, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0e460009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4779 = VEXP2PDmk
21381
  { 4780, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0e460009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4780 = VEXP2PDmkz
21382
  { 4781, 2,  1,  0,  0,  0, 0x8080e460009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4781 = VEXP2PDr
21383
  { 4782, 2,  1,  0,  0,  0, 0x1180e460009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4782 = VEXP2PDrb
21384
  { 4783, 4,  1,  0,  0,  0, 0x11a0e460009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #4783 = VEXP2PDrbk
21385
  { 4784, 3,  1,  0,  0,  0, 0x11e0e460009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #4784 = VEXP2PDrbkz
21386
  { 4785, 4,  1,  0,  0,  0, 0x80a0e460009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #4785 = VEXP2PDrk
21387
  { 4786, 3,  1,  0,  0,  0, 0x80e0e460009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #4786 = VEXP2PDrkz
21388
  { 4787, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80806460009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4787 = VEXP2PSm
21389
  { 4788, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9806460009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4788 = VEXP2PSmb
21390
  { 4789, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a06460009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #4789 = VEXP2PSmbk
21391
  { 4790, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e06460009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #4790 = VEXP2PSmbkz
21392
  { 4791, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a06460009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #4791 = VEXP2PSmk
21393
  { 4792, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e06460009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #4792 = VEXP2PSmkz
21394
  { 4793, 2,  1,  0,  0,  0, 0x80806460009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4793 = VEXP2PSr
21395
  { 4794, 2,  1,  0,  0,  0, 0x9806460009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4794 = VEXP2PSrb
21396
  { 4795, 4,  1,  0,  0,  0, 0x9a06460009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #4795 = VEXP2PSrbk
21397
  { 4796, 3,  1,  0,  0,  0, 0x9e06460009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #4796 = VEXP2PSrbkz
21398
  { 4797, 4,  1,  0,  0,  0, 0x80a06460009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #4797 = VEXP2PSrk
21399
  { 4798, 3,  1,  0,  0,  0, 0x80e06460009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #4798 = VEXP2PSrkz
21400
  { 4799, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1000c478009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4799 = VEXPANDPDZ128rm
21401
  { 4800, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1020c478009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #4800 = VEXPANDPDZ128rmk
21402
  { 4801, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1060c478009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #4801 = VEXPANDPDZ128rmkz
21403
  { 4802, 2,  1,  0,  0,  0, 0x2000c478009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4802 = VEXPANDPDZ128rr
21404
  { 4803, 4,  1,  0,  0,  0, 0x2020c478009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #4803 = VEXPANDPDZ128rrk
21405
  { 4804, 3,  1,  0,  0,  0, 0x2060c478009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #4804 = VEXPANDPDZ128rrkz
21406
  { 4805, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1008c478009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4805 = VEXPANDPDZ256rm
21407
  { 4806, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1028c478009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #4806 = VEXPANDPDZ256rmk
21408
  { 4807, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1068c478009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #4807 = VEXPANDPDZ256rmkz
21409
  { 4808, 2,  1,  0,  0,  0, 0x4008c478009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #4808 = VEXPANDPDZ256rr
21410
  { 4809, 4,  1,  0,  0,  0, 0x4028c478009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #4809 = VEXPANDPDZ256rrk
21411
  { 4810, 3,  1,  0,  0,  0, 0x4068c478009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #4810 = VEXPANDPDZ256rrkz
21412
  { 4811, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1080c478009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4811 = VEXPANDPDZrm
21413
  { 4812, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a0c478009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #4812 = VEXPANDPDZrmk
21414
  { 4813, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10e0c478009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #4813 = VEXPANDPDZrmkz
21415
  { 4814, 2,  1,  0,  0,  0, 0x8080c478009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4814 = VEXPANDPDZrr
21416
  { 4815, 4,  1,  0,  0,  0, 0x80a0c478009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #4815 = VEXPANDPDZrrk
21417
  { 4816, 3,  1,  0,  0,  0, 0x80e0c478009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #4816 = VEXPANDPDZrrkz
21418
  { 4817, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8004478009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #4817 = VEXPANDPSZ128rm
21419
  { 4818, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8204478009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #4818 = VEXPANDPSZ128rmk
21420
  { 4819, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8604478009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #4819 = VEXPANDPSZ128rmkz
21421
  { 4820, 2,  1,  0,  0,  0, 0x20004478009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #4820 = VEXPANDPSZ128rr
21422
  { 4821, 4,  1,  0,  0,  0, 0x20204478009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #4821 = VEXPANDPSZ128rrk
21423
  { 4822, 3,  1,  0,  0,  0, 0x20604478009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #4822 = VEXPANDPSZ128rrkz
21424
  { 4823, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8084478009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #4823 = VEXPANDPSZ256rm
21425
  { 4824, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8284478009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #4824 = VEXPANDPSZ256rmk
21426
  { 4825, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8684478009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #4825 = VEXPANDPSZ256rmkz
21427
  { 4826, 2,  1,  0,  0,  0, 0x40084478009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #4826 = VEXPANDPSZ256rr
21428
  { 4827, 4,  1,  0,  0,  0, 0x40284478009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #4827 = VEXPANDPSZ256rrk
21429
  { 4828, 3,  1,  0,  0,  0, 0x40684478009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #4828 = VEXPANDPSZ256rrkz
21430
  { 4829, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8804478009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #4829 = VEXPANDPSZrm
21431
  { 4830, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8a04478009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #4830 = VEXPANDPSZrmk
21432
  { 4831, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8e04478009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #4831 = VEXPANDPSZrmkz
21433
  { 4832, 2,  1,  0,  0,  0, 0x80804478009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #4832 = VEXPANDPSZrr
21434
  { 4833, 4,  1,  0,  0,  0, 0x80a04478009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #4833 = VEXPANDPSZrrk
21435
  { 4834, 3,  1,  0,  0,  0, 0x80e04478009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #4834 = VEXPANDPSZrrkz
21436
  { 4835, 7,  0,  0,  851,  0|(1ULL<<MCID::MayStore), 0x80ca804d004ULL, nullptr, nullptr, OperandInfo464, -1 ,nullptr },  // Inst #4835 = VEXTRACTF128mr
21437
  { 4836, 3,  1,  0,  850,  0, 0x80ca804d003ULL, nullptr, nullptr, OperandInfo465, -1 ,nullptr },  // Inst #4836 = VEXTRACTF128rr
21438
  { 4837, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20080ce804d004ULL, nullptr, nullptr, OperandInfo471, -1 ,nullptr },  // Inst #4837 = VEXTRACTF32x4Z256rm
21439
  { 4838, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20280ce804d004ULL, nullptr, nullptr, OperandInfo517, -1 ,nullptr },  // Inst #4838 = VEXTRACTF32x4Z256rmk
21440
  { 4839, 3,  1,  0,  0,  0, 0x20080ce804d003ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr },  // Inst #4839 = VEXTRACTF32x4Z256rr
21441
  { 4840, 5,  1,  0,  0,  0, 0x20280ce804d003ULL, nullptr, nullptr, OperandInfo518, -1 ,nullptr },  // Inst #4840 = VEXTRACTF32x4Z256rrk
21442
  { 4841, 4,  1,  0,  0,  0, 0x20680ce804d003ULL, nullptr, nullptr, OperandInfo519, -1 ,nullptr },  // Inst #4841 = VEXTRACTF32x4Z256rrkz
21443
  { 4842, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20800ce804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr },  // Inst #4842 = VEXTRACTF32x4Zrm
21444
  { 4843, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20a00ce804d004ULL, nullptr, nullptr, OperandInfo520, -1 ,nullptr },  // Inst #4843 = VEXTRACTF32x4Zrmk
21445
  { 4844, 3,  1,  0,  0,  0, 0x20800ce804d003ULL, nullptr, nullptr, OperandInfo521, -1 ,nullptr },  // Inst #4844 = VEXTRACTF32x4Zrr
21446
  { 4845, 5,  1,  0,  0,  0, 0x20a00ce804d003ULL, nullptr, nullptr, OperandInfo522, -1 ,nullptr },  // Inst #4845 = VEXTRACTF32x4Zrrk
21447
  { 4846, 4,  1,  0,  0,  0, 0x20e00ce804d003ULL, nullptr, nullptr, OperandInfo523, -1 ,nullptr },  // Inst #4846 = VEXTRACTF32x4Zrrkz
21448
  { 4847, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40800de804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr },  // Inst #4847 = VEXTRACTF32x8Zrm
21449
  { 4848, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40a00de804d004ULL, nullptr, nullptr, OperandInfo524, -1 ,nullptr },  // Inst #4848 = VEXTRACTF32x8Zrmk
21450
  { 4849, 3,  1,  0,  0,  0, 0x40800de804d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr },  // Inst #4849 = VEXTRACTF32x8Zrr
21451
  { 4850, 5,  1,  0,  0,  0, 0x40a00de804d003ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr },  // Inst #4850 = VEXTRACTF32x8Zrrk
21452
  { 4851, 4,  1,  0,  0,  0, 0x40e00de804d003ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr },  // Inst #4851 = VEXTRACTF32x8Zrrkz
21453
  { 4852, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20088cf004d004ULL, nullptr, nullptr, OperandInfo471, -1 ,nullptr },  // Inst #4852 = VEXTRACTF64x2Z256rm
21454
  { 4853, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20288cf004d004ULL, nullptr, nullptr, OperandInfo525, -1 ,nullptr },  // Inst #4853 = VEXTRACTF64x2Z256rmk
21455
  { 4854, 3,  1,  0,  0,  0, 0x20088cf004d003ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr },  // Inst #4854 = VEXTRACTF64x2Z256rr
21456
  { 4855, 5,  1,  0,  0,  0, 0x20288cf004d003ULL, nullptr, nullptr, OperandInfo526, -1 ,nullptr },  // Inst #4855 = VEXTRACTF64x2Z256rrk
21457
  { 4856, 4,  1,  0,  0,  0, 0x20688cf004d003ULL, nullptr, nullptr, OperandInfo527, -1 ,nullptr },  // Inst #4856 = VEXTRACTF64x2Z256rrkz
21458
  { 4857, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20808cf004d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr },  // Inst #4857 = VEXTRACTF64x2Zrm
21459
  { 4858, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20a08cf004d004ULL, nullptr, nullptr, OperandInfo528, -1 ,nullptr },  // Inst #4858 = VEXTRACTF64x2Zrmk
21460
  { 4859, 3,  1,  0,  0,  0, 0x20808cf004d003ULL, nullptr, nullptr, OperandInfo521, -1 ,nullptr },  // Inst #4859 = VEXTRACTF64x2Zrr
21461
  { 4860, 5,  1,  0,  0,  0, 0x20a08cf004d003ULL, nullptr, nullptr, OperandInfo529, -1 ,nullptr },  // Inst #4860 = VEXTRACTF64x2Zrrk
21462
  { 4861, 4,  1,  0,  0,  0, 0x20e08cf004d003ULL, nullptr, nullptr, OperandInfo530, -1 ,nullptr },  // Inst #4861 = VEXTRACTF64x2Zrrkz
21463
  { 4862, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40808df004d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr },  // Inst #4862 = VEXTRACTF64x4Zrm
21464
  { 4863, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40a08df004d004ULL, nullptr, nullptr, OperandInfo520, -1 ,nullptr },  // Inst #4863 = VEXTRACTF64x4Zrmk
21465
  { 4864, 3,  1,  0,  0,  0, 0x40808df004d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr },  // Inst #4864 = VEXTRACTF64x4Zrr
21466
  { 4865, 5,  1,  0,  0,  0, 0x40a08df004d003ULL, nullptr, nullptr, OperandInfo531, -1 ,nullptr },  // Inst #4865 = VEXTRACTF64x4Zrrk
21467
  { 4866, 4,  1,  0,  0,  0, 0x40e08df004d003ULL, nullptr, nullptr, OperandInfo532, -1 ,nullptr },  // Inst #4866 = VEXTRACTF64x4Zrrkz
21468
  { 4867, 7,  0,  0,  543,  0|(1ULL<<MCID::MayStore), 0x81cb804d004ULL, nullptr, nullptr, OperandInfo464, -1 ,nullptr },  // Inst #4867 = VEXTRACTI128mr
21469
  { 4868, 3,  1,  0,  544,  0, 0x81cb804d003ULL, nullptr, nullptr, OperandInfo465, -1 ,nullptr },  // Inst #4868 = VEXTRACTI128rr
21470
  { 4869, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20081cf804d004ULL, nullptr, nullptr, OperandInfo471, -1 ,nullptr },  // Inst #4869 = VEXTRACTI32x4Z256rm
21471
  { 4870, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20281cf804d004ULL, nullptr, nullptr, OperandInfo517, -1 ,nullptr },  // Inst #4870 = VEXTRACTI32x4Z256rmk
21472
  { 4871, 3,  1,  0,  0,  0, 0x20081cf804d003ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr },  // Inst #4871 = VEXTRACTI32x4Z256rr
21473
  { 4872, 5,  1,  0,  0,  0, 0x20281cf804d003ULL, nullptr, nullptr, OperandInfo518, -1 ,nullptr },  // Inst #4872 = VEXTRACTI32x4Z256rrk
21474
  { 4873, 4,  1,  0,  0,  0, 0x20681cf804d003ULL, nullptr, nullptr, OperandInfo519, -1 ,nullptr },  // Inst #4873 = VEXTRACTI32x4Z256rrkz
21475
  { 4874, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20801cf804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr },  // Inst #4874 = VEXTRACTI32x4Zrm
21476
  { 4875, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20a01cf804d004ULL, nullptr, nullptr, OperandInfo520, -1 ,nullptr },  // Inst #4875 = VEXTRACTI32x4Zrmk
21477
  { 4876, 3,  1,  0,  0,  0, 0x20801cf804d003ULL, nullptr, nullptr, OperandInfo521, -1 ,nullptr },  // Inst #4876 = VEXTRACTI32x4Zrr
21478
  { 4877, 5,  1,  0,  0,  0, 0x20a01cf804d003ULL, nullptr, nullptr, OperandInfo522, -1 ,nullptr },  // Inst #4877 = VEXTRACTI32x4Zrrk
21479
  { 4878, 4,  1,  0,  0,  0, 0x20e01cf804d003ULL, nullptr, nullptr, OperandInfo523, -1 ,nullptr },  // Inst #4878 = VEXTRACTI32x4Zrrkz
21480
  { 4879, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40801df804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr },  // Inst #4879 = VEXTRACTI32x8Zrm
21481
  { 4880, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40a01df804d004ULL, nullptr, nullptr, OperandInfo524, -1 ,nullptr },  // Inst #4880 = VEXTRACTI32x8Zrmk
21482
  { 4881, 3,  1,  0,  0,  0, 0x40801df804d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr },  // Inst #4881 = VEXTRACTI32x8Zrr
21483
  { 4882, 5,  1,  0,  0,  0, 0x40a01df804d003ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr },  // Inst #4882 = VEXTRACTI32x8Zrrk
21484
  { 4883, 4,  1,  0,  0,  0, 0x40e01df804d003ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr },  // Inst #4883 = VEXTRACTI32x8Zrrkz
21485
  { 4884, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20089cf804d004ULL, nullptr, nullptr, OperandInfo471, -1 ,nullptr },  // Inst #4884 = VEXTRACTI64x2Z256rm
21486
  { 4885, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20289cf804d004ULL, nullptr, nullptr, OperandInfo525, -1 ,nullptr },  // Inst #4885 = VEXTRACTI64x2Z256rmk
21487
  { 4886, 3,  1,  0,  0,  0, 0x20089cf804d003ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr },  // Inst #4886 = VEXTRACTI64x2Z256rr
21488
  { 4887, 5,  1,  0,  0,  0, 0x20289cf804d003ULL, nullptr, nullptr, OperandInfo526, -1 ,nullptr },  // Inst #4887 = VEXTRACTI64x2Z256rrk
21489
  { 4888, 4,  1,  0,  0,  0, 0x20689cf804d003ULL, nullptr, nullptr, OperandInfo527, -1 ,nullptr },  // Inst #4888 = VEXTRACTI64x2Z256rrkz
21490
  { 4889, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20809cf804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr },  // Inst #4889 = VEXTRACTI64x2Zrm
21491
  { 4890, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20a09cf804d004ULL, nullptr, nullptr, OperandInfo528, -1 ,nullptr },  // Inst #4890 = VEXTRACTI64x2Zrmk
21492
  { 4891, 3,  1,  0,  0,  0, 0x20809cf804d003ULL, nullptr, nullptr, OperandInfo521, -1 ,nullptr },  // Inst #4891 = VEXTRACTI64x2Zrr
21493
  { 4892, 5,  1,  0,  0,  0, 0x20a09cf804d003ULL, nullptr, nullptr, OperandInfo529, -1 ,nullptr },  // Inst #4892 = VEXTRACTI64x2Zrrk
21494
  { 4893, 4,  1,  0,  0,  0, 0x20e09cf804d003ULL, nullptr, nullptr, OperandInfo530, -1 ,nullptr },  // Inst #4893 = VEXTRACTI64x2Zrrkz
21495
  { 4894, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40809df804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr },  // Inst #4894 = VEXTRACTI64x4Zrm
21496
  { 4895, 8,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40a09df804d004ULL, nullptr, nullptr, OperandInfo520, -1 ,nullptr },  // Inst #4895 = VEXTRACTI64x4Zrmk
21497
  { 4896, 3,  1,  0,  0,  0, 0x40809df804d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr },  // Inst #4896 = VEXTRACTI64x4Zrr
21498
  { 4897, 5,  1,  0,  0,  0, 0x40a09df804d003ULL, nullptr, nullptr, OperandInfo531, -1 ,nullptr },  // Inst #4897 = VEXTRACTI64x4Zrrk
21499
  { 4898, 4,  1,  0,  0,  0, 0x40e09df804d003ULL, nullptr, nullptr, OperandInfo532, -1 ,nullptr },  // Inst #4898 = VEXTRACTI64x4Zrrkz
21500
  { 4899, 7,  0,  0,  849,  0|(1ULL<<MCID::MayStore), 0xba804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #4899 = VEXTRACTPSmr
21501
  { 4900, 3,  1,  0,  847,  0, 0xba804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #4900 = VEXTRACTPSrr
21502
  { 4901, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8000bf804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr },  // Inst #4901 = VEXTRACTPSzmr
21503
  { 4902, 3,  1,  0,  0,  0, 0x20000bf804d003ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr },  // Inst #4902 = VEXTRACTPSzrr
21504
  { 4903, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101aa7804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr },  // Inst #4903 = VFIXUPIMMPDZ128rmbi
21505
  { 4904, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121aa7804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #4904 = VFIXUPIMMPDZ128rmbik
21506
  { 4905, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161aa7804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #4905 = VFIXUPIMMPDZ128rmbikz
21507
  { 4906, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001aa7804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr },  // Inst #4906 = VFIXUPIMMPDZ128rmi
21508
  { 4907, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021aa7804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #4907 = VFIXUPIMMPDZ128rmik
21509
  { 4908, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061aa7804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #4908 = VFIXUPIMMPDZ128rmikz
21510
  { 4909, 5,  1,  0,  0,  0, 0x2001aa7804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #4909 = VFIXUPIMMPDZ128rri
21511
  { 4910, 6,  1,  0,  0,  0, 0x2021aa7804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr },  // Inst #4910 = VFIXUPIMMPDZ128rrik
21512
  { 4911, 6,  1,  0,  0,  0, 0x2061aa7804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr },  // Inst #4911 = VFIXUPIMMPDZ128rrikz
21513
  { 4912, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109aa7804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr },  // Inst #4912 = VFIXUPIMMPDZ256rmbi
21514
  { 4913, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129aa7804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #4913 = VFIXUPIMMPDZ256rmbik
21515
  { 4914, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169aa7804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #4914 = VFIXUPIMMPDZ256rmbikz
21516
  { 4915, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009aa7804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr },  // Inst #4915 = VFIXUPIMMPDZ256rmi
21517
  { 4916, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029aa7804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #4916 = VFIXUPIMMPDZ256rmik
21518
  { 4917, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069aa7804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #4917 = VFIXUPIMMPDZ256rmikz
21519
  { 4918, 5,  1,  0,  0,  0, 0x4009aa7804d005ULL, nullptr, nullptr, OperandInfo536, -1 ,nullptr },  // Inst #4918 = VFIXUPIMMPDZ256rri
21520
  { 4919, 6,  1,  0,  0,  0, 0x4029aa7804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr },  // Inst #4919 = VFIXUPIMMPDZ256rrik
21521
  { 4920, 6,  1,  0,  0,  0, 0x4069aa7804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr },  // Inst #4920 = VFIXUPIMMPDZ256rrikz
21522
  { 4921, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181aa7804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr },  // Inst #4921 = VFIXUPIMMPDZrmbi
21523
  { 4922, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1aa7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #4922 = VFIXUPIMMPDZrmbik
21524
  { 4923, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1aa7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #4923 = VFIXUPIMMPDZrmbikz
21525
  { 4924, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081aa7804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr },  // Inst #4924 = VFIXUPIMMPDZrmi
21526
  { 4925, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1aa7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #4925 = VFIXUPIMMPDZrmik
21527
  { 4926, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1aa7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #4926 = VFIXUPIMMPDZrmikz
21528
  { 4927, 5,  1,  0,  0,  0, 0x8081aa7804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #4927 = VFIXUPIMMPDZrri
21529
  { 4928, 5,  1,  0,  0,  0, 0x1181aa7804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #4928 = VFIXUPIMMPDZrrib
21530
  { 4929, 6,  1,  0,  0,  0, 0x11a1aa7804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #4929 = VFIXUPIMMPDZrribk
21531
  { 4930, 6,  1,  0,  0,  0, 0x11e1aa7804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #4930 = VFIXUPIMMPDZrribkz
21532
  { 4931, 6,  1,  0,  0,  0, 0x80a1aa7804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #4931 = VFIXUPIMMPDZrrik
21533
  { 4932, 6,  1,  0,  0,  0, 0x80e1aa7804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #4932 = VFIXUPIMMPDZrrikz
21534
  { 4933, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012a7804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr },  // Inst #4933 = VFIXUPIMMPSZ128rmbi
21535
  { 4934, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212a7804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #4934 = VFIXUPIMMPSZ128rmbik
21536
  { 4935, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612a7804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #4935 = VFIXUPIMMPSZ128rmbikz
21537
  { 4936, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012a7804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr },  // Inst #4936 = VFIXUPIMMPSZ128rmi
21538
  { 4937, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212a7804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #4937 = VFIXUPIMMPSZ128rmik
21539
  { 4938, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612a7804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #4938 = VFIXUPIMMPSZ128rmikz
21540
  { 4939, 5,  1,  0,  0,  0, 0x20012a7804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #4939 = VFIXUPIMMPSZ128rri
21541
  { 4940, 6,  1,  0,  0,  0, 0x20212a7804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr },  // Inst #4940 = VFIXUPIMMPSZ128rrik
21542
  { 4941, 6,  1,  0,  0,  0, 0x20612a7804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr },  // Inst #4941 = VFIXUPIMMPSZ128rrikz
21543
  { 4942, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092a7804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr },  // Inst #4942 = VFIXUPIMMPSZ256rmbi
21544
  { 4943, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292a7804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #4943 = VFIXUPIMMPSZ256rmbik
21545
  { 4944, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692a7804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #4944 = VFIXUPIMMPSZ256rmbikz
21546
  { 4945, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092a7804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr },  // Inst #4945 = VFIXUPIMMPSZ256rmi
21547
  { 4946, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292a7804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #4946 = VFIXUPIMMPSZ256rmik
21548
  { 4947, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692a7804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #4947 = VFIXUPIMMPSZ256rmikz
21549
  { 4948, 5,  1,  0,  0,  0, 0x40092a7804d005ULL, nullptr, nullptr, OperandInfo536, -1 ,nullptr },  // Inst #4948 = VFIXUPIMMPSZ256rri
21550
  { 4949, 6,  1,  0,  0,  0, 0x40292a7804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr },  // Inst #4949 = VFIXUPIMMPSZ256rrik
21551
  { 4950, 6,  1,  0,  0,  0, 0x40692a7804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr },  // Inst #4950 = VFIXUPIMMPSZ256rrikz
21552
  { 4951, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812a7804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr },  // Inst #4951 = VFIXUPIMMPSZrmbi
21553
  { 4952, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12a7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #4952 = VFIXUPIMMPSZrmbik
21554
  { 4953, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12a7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #4953 = VFIXUPIMMPSZrmbikz
21555
  { 4954, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812a7804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr },  // Inst #4954 = VFIXUPIMMPSZrmi
21556
  { 4955, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12a7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #4955 = VFIXUPIMMPSZrmik
21557
  { 4956, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12a7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #4956 = VFIXUPIMMPSZrmikz
21558
  { 4957, 5,  1,  0,  0,  0, 0x80812a7804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #4957 = VFIXUPIMMPSZrri
21559
  { 4958, 5,  1,  0,  0,  0, 0x9812a7804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #4958 = VFIXUPIMMPSZrrib
21560
  { 4959, 6,  1,  0,  0,  0, 0x9a12a7804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #4959 = VFIXUPIMMPSZrribk
21561
  { 4960, 6,  1,  0,  0,  0, 0x9e12a7804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #4960 = VFIXUPIMMPSZrribkz
21562
  { 4961, 6,  1,  0,  0,  0, 0x80a12a7804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #4961 = VFIXUPIMMPSZrrik
21563
  { 4962, 6,  1,  0,  0,  0, 0x80e12a7804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #4962 = VFIXUPIMMPSZrrikz
21564
  { 4963, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011aaf804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr },  // Inst #4963 = VFIXUPIMMSDrmi
21565
  { 4964, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031aaf804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #4964 = VFIXUPIMMSDrmik
21566
  { 4965, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071aaf804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #4965 = VFIXUPIMMSDrmikz
21567
  { 4966, 5,  1,  0,  0,  0, 0x1011aaf804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #4966 = VFIXUPIMMSDrri
21568
  { 4967, 5,  1,  0,  0,  0, 0x1111aaf804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #4967 = VFIXUPIMMSDrrib
21569
  { 4968, 6,  1,  0,  0,  0, 0x1131aaf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #4968 = VFIXUPIMMSDrribk
21570
  { 4969, 6,  1,  0,  0,  0, 0x1171aaf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #4969 = VFIXUPIMMSDrribkz
21571
  { 4970, 6,  1,  0,  0,  0, 0x1031aaf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #4970 = VFIXUPIMMSDrrik
21572
  { 4971, 6,  1,  0,  0,  0, 0x1071aaf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #4971 = VFIXUPIMMSDrrikz
21573
  { 4972, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8112af804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr },  // Inst #4972 = VFIXUPIMMSSrmi
21574
  { 4973, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8312af804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #4973 = VFIXUPIMMSSrmik
21575
  { 4974, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8712af804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #4974 = VFIXUPIMMSSrmikz
21576
  { 4975, 5,  1,  0,  0,  0, 0x8112af804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #4975 = VFIXUPIMMSSrri
21577
  { 4976, 5,  1,  0,  0,  0, 0x9112af804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #4976 = VFIXUPIMMSSrrib
21578
  { 4977, 6,  1,  0,  0,  0, 0x9312af804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #4977 = VFIXUPIMMSSrribk
21579
  { 4978, 6,  1,  0,  0,  0, 0x9712af804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #4978 = VFIXUPIMMSSrribkz
21580
  { 4979, 6,  1,  0,  0,  0, 0x8312af804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #4979 = VFIXUPIMMSSrrik
21581
  { 4980, 6,  1,  0,  0,  0, 0x8712af804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #4980 = VFIXUPIMMSSrrikz
21582
  { 4981, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001cc60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #4981 = VFMADD132PDZ128m
21583
  { 4982, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101cc60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #4982 = VFMADD132PDZ128mb
21584
  { 4983, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121cc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #4983 = VFMADD132PDZ128mbk
21585
  { 4984, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161cc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #4984 = VFMADD132PDZ128mbkz
21586
  { 4985, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021cc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #4985 = VFMADD132PDZ128mk
21587
  { 4986, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061cc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #4986 = VFMADD132PDZ128mkz
21588
  { 4987, 4,  1,  0,  0,  0, 0x2001cc60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #4987 = VFMADD132PDZ128r
21589
  { 4988, 5,  1,  0,  0,  0, 0x2021cc60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #4988 = VFMADD132PDZ128rk
21590
  { 4989, 5,  1,  0,  0,  0, 0x2061cc60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #4989 = VFMADD132PDZ128rkz
21591
  { 4990, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009cc60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #4990 = VFMADD132PDZ256m
21592
  { 4991, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109cc60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #4991 = VFMADD132PDZ256mb
21593
  { 4992, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129cc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #4992 = VFMADD132PDZ256mbk
21594
  { 4993, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169cc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #4993 = VFMADD132PDZ256mbkz
21595
  { 4994, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029cc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #4994 = VFMADD132PDZ256mk
21596
  { 4995, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069cc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #4995 = VFMADD132PDZ256mkz
21597
  { 4996, 4,  1,  0,  0,  0, 0x4009cc60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #4996 = VFMADD132PDZ256r
21598
  { 4997, 5,  1,  0,  0,  0, 0x4029cc60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #4997 = VFMADD132PDZ256rk
21599
  { 4998, 5,  1,  0,  0,  0, 0x4069cc60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #4998 = VFMADD132PDZ256rkz
21600
  { 4999, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081cc60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #4999 = VFMADD132PDZm
21601
  { 5000, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181cc60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5000 = VFMADD132PDZmb
21602
  { 5001, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1cc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5001 = VFMADD132PDZmbk
21603
  { 5002, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1cc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5002 = VFMADD132PDZmbkz
21604
  { 5003, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1cc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5003 = VFMADD132PDZmk
21605
  { 5004, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1cc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5004 = VFMADD132PDZmkz
21606
  { 5005, 4,  1,  0,  0,  0, 0x8081cc60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5005 = VFMADD132PDZr
21607
  { 5006, 5,  1,  0,  0,  0, 0x41181cc60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5006 = VFMADD132PDZrb
21608
  { 5007, 6,  1,  0,  0,  0, 0x411a1cc60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5007 = VFMADD132PDZrbk
21609
  { 5008, 6,  1,  0,  0,  0, 0x411e1cc60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5008 = VFMADD132PDZrbkz
21610
  { 5009, 5,  1,  0,  0,  0, 0x80a1cc60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5009 = VFMADD132PDZrk
21611
  { 5010, 5,  1,  0,  0,  0, 0x80e1cc60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5010 = VFMADD132PDZrkz
21612
  { 5011, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20014c60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5011 = VFMADD132PSZ128m
21613
  { 5012, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9014c60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5012 = VFMADD132PSZ128mb
21614
  { 5013, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9214c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5013 = VFMADD132PSZ128mbk
21615
  { 5014, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9614c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5014 = VFMADD132PSZ128mbkz
21616
  { 5015, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20214c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5015 = VFMADD132PSZ128mk
21617
  { 5016, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20614c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5016 = VFMADD132PSZ128mkz
21618
  { 5017, 4,  1,  0,  0,  0, 0x20014c60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5017 = VFMADD132PSZ128r
21619
  { 5018, 5,  1,  0,  0,  0, 0x20214c60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5018 = VFMADD132PSZ128rk
21620
  { 5019, 5,  1,  0,  0,  0, 0x20614c60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5019 = VFMADD132PSZ128rkz
21621
  { 5020, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40094c60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5020 = VFMADD132PSZ256m
21622
  { 5021, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9094c60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5021 = VFMADD132PSZ256mb
21623
  { 5022, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9294c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5022 = VFMADD132PSZ256mbk
21624
  { 5023, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9694c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5023 = VFMADD132PSZ256mbkz
21625
  { 5024, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40294c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5024 = VFMADD132PSZ256mk
21626
  { 5025, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40694c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5025 = VFMADD132PSZ256mkz
21627
  { 5026, 4,  1,  0,  0,  0, 0x40094c60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5026 = VFMADD132PSZ256r
21628
  { 5027, 5,  1,  0,  0,  0, 0x40294c60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5027 = VFMADD132PSZ256rk
21629
  { 5028, 5,  1,  0,  0,  0, 0x40694c60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5028 = VFMADD132PSZ256rkz
21630
  { 5029, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80814c60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5029 = VFMADD132PSZm
21631
  { 5030, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9814c60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5030 = VFMADD132PSZmb
21632
  { 5031, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a14c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5031 = VFMADD132PSZmbk
21633
  { 5032, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e14c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5032 = VFMADD132PSZmbkz
21634
  { 5033, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a14c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5033 = VFMADD132PSZmk
21635
  { 5034, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e14c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5034 = VFMADD132PSZmkz
21636
  { 5035, 4,  1,  0,  0,  0, 0x80814c60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5035 = VFMADD132PSZr
21637
  { 5036, 5,  1,  0,  0,  0, 0x409814c60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5036 = VFMADD132PSZrb
21638
  { 5037, 6,  1,  0,  0,  0, 0x409a14c60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5037 = VFMADD132PSZrbk
21639
  { 5038, 6,  1,  0,  0,  0, 0x409e14c60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5038 = VFMADD132PSZrbkz
21640
  { 5039, 5,  1,  0,  0,  0, 0x80a14c60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5039 = VFMADD132PSZrk
21641
  { 5040, 5,  1,  0,  0,  0, 0x80e14c60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5040 = VFMADD132PSZrkz
21642
  { 5041, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011cce0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #5041 = VFMADD132SDm
21643
  { 5042, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011cce0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5042 = VFMADD132SDm_Int
21644
  { 5043, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031cce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5043 = VFMADD132SDm_Intk
21645
  { 5044, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071cce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5044 = VFMADD132SDm_Intkz
21646
  { 5045, 4,  1,  0,  0,  0, 0x1011cce0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #5045 = VFMADD132SDr
21647
  { 5046, 4,  1,  0,  0,  0, 0x1011cce0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5046 = VFMADD132SDr_Int
21648
  { 5047, 5,  1,  0,  0,  0, 0x1031cce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5047 = VFMADD132SDr_Intk
21649
  { 5048, 5,  1,  0,  0,  0, 0x1071cce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5048 = VFMADD132SDr_Intkz
21650
  { 5049, 5,  1,  0,  0,  0, 0x41111cce0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5049 = VFMADD132SDrb_Int
21651
  { 5050, 6,  1,  0,  0,  0, 0x41131cce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5050 = VFMADD132SDrb_Intk
21652
  { 5051, 6,  1,  0,  0,  0, 0x41171cce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5051 = VFMADD132SDrb_Intkz
21653
  { 5052, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8114ce0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #5052 = VFMADD132SSm
21654
  { 5053, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8114ce0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5053 = VFMADD132SSm_Int
21655
  { 5054, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8314ce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5054 = VFMADD132SSm_Intk
21656
  { 5055, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8714ce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5055 = VFMADD132SSm_Intkz
21657
  { 5056, 4,  1,  0,  0,  0, 0x8114ce0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #5056 = VFMADD132SSr
21658
  { 5057, 4,  1,  0,  0,  0, 0x8114ce0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5057 = VFMADD132SSr_Int
21659
  { 5058, 5,  1,  0,  0,  0, 0x8314ce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5058 = VFMADD132SSr_Intk
21660
  { 5059, 5,  1,  0,  0,  0, 0x8714ce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5059 = VFMADD132SSr_Intkz
21661
  { 5060, 5,  1,  0,  0,  0, 0x409114ce0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5060 = VFMADD132SSrb_Int
21662
  { 5061, 6,  1,  0,  0,  0, 0x409314ce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5061 = VFMADD132SSrb_Intk
21663
  { 5062, 6,  1,  0,  0,  0, 0x409714ce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5062 = VFMADD132SSrb_Intkz
21664
  { 5063, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001d460009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5063 = VFMADD213PDZ128m
21665
  { 5064, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101d460009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5064 = VFMADD213PDZ128mb
21666
  { 5065, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121d460009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5065 = VFMADD213PDZ128mbk
21667
  { 5066, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161d460009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5066 = VFMADD213PDZ128mbkz
21668
  { 5067, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021d460009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5067 = VFMADD213PDZ128mk
21669
  { 5068, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061d460009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5068 = VFMADD213PDZ128mkz
21670
  { 5069, 4,  1,  0,  0,  0, 0x2001d460009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5069 = VFMADD213PDZ128r
21671
  { 5070, 5,  1,  0,  0,  0, 0x2021d460009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5070 = VFMADD213PDZ128rk
21672
  { 5071, 5,  1,  0,  0,  0, 0x2061d460009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5071 = VFMADD213PDZ128rkz
21673
  { 5072, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009d460009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5072 = VFMADD213PDZ256m
21674
  { 5073, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109d460009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5073 = VFMADD213PDZ256mb
21675
  { 5074, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129d460009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5074 = VFMADD213PDZ256mbk
21676
  { 5075, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169d460009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5075 = VFMADD213PDZ256mbkz
21677
  { 5076, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029d460009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5076 = VFMADD213PDZ256mk
21678
  { 5077, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069d460009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5077 = VFMADD213PDZ256mkz
21679
  { 5078, 4,  1,  0,  0,  0, 0x4009d460009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5078 = VFMADD213PDZ256r
21680
  { 5079, 5,  1,  0,  0,  0, 0x4029d460009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5079 = VFMADD213PDZ256rk
21681
  { 5080, 5,  1,  0,  0,  0, 0x4069d460009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5080 = VFMADD213PDZ256rkz
21682
  { 5081, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081d460009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5081 = VFMADD213PDZm
21683
  { 5082, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181d460009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5082 = VFMADD213PDZmb
21684
  { 5083, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1d460009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5083 = VFMADD213PDZmbk
21685
  { 5084, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1d460009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5084 = VFMADD213PDZmbkz
21686
  { 5085, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1d460009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5085 = VFMADD213PDZmk
21687
  { 5086, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1d460009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5086 = VFMADD213PDZmkz
21688
  { 5087, 4,  1,  0,  0,  0, 0x8081d460009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5087 = VFMADD213PDZr
21689
  { 5088, 5,  1,  0,  0,  0, 0x41181d460009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5088 = VFMADD213PDZrb
21690
  { 5089, 6,  1,  0,  0,  0, 0x411a1d460009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5089 = VFMADD213PDZrbk
21691
  { 5090, 6,  1,  0,  0,  0, 0x411e1d460009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5090 = VFMADD213PDZrbkz
21692
  { 5091, 5,  1,  0,  0,  0, 0x80a1d460009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5091 = VFMADD213PDZrk
21693
  { 5092, 5,  1,  0,  0,  0, 0x80e1d460009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5092 = VFMADD213PDZrkz
21694
  { 5093, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20015460009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5093 = VFMADD213PSZ128m
21695
  { 5094, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9015460009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5094 = VFMADD213PSZ128mb
21696
  { 5095, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9215460009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5095 = VFMADD213PSZ128mbk
21697
  { 5096, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9615460009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5096 = VFMADD213PSZ128mbkz
21698
  { 5097, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20215460009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5097 = VFMADD213PSZ128mk
21699
  { 5098, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20615460009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5098 = VFMADD213PSZ128mkz
21700
  { 5099, 4,  1,  0,  0,  0, 0x20015460009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5099 = VFMADD213PSZ128r
21701
  { 5100, 5,  1,  0,  0,  0, 0x20215460009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5100 = VFMADD213PSZ128rk
21702
  { 5101, 5,  1,  0,  0,  0, 0x20615460009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5101 = VFMADD213PSZ128rkz
21703
  { 5102, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40095460009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5102 = VFMADD213PSZ256m
21704
  { 5103, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9095460009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5103 = VFMADD213PSZ256mb
21705
  { 5104, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9295460009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5104 = VFMADD213PSZ256mbk
21706
  { 5105, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9695460009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5105 = VFMADD213PSZ256mbkz
21707
  { 5106, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40295460009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5106 = VFMADD213PSZ256mk
21708
  { 5107, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40695460009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5107 = VFMADD213PSZ256mkz
21709
  { 5108, 4,  1,  0,  0,  0, 0x40095460009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5108 = VFMADD213PSZ256r
21710
  { 5109, 5,  1,  0,  0,  0, 0x40295460009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5109 = VFMADD213PSZ256rk
21711
  { 5110, 5,  1,  0,  0,  0, 0x40695460009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5110 = VFMADD213PSZ256rkz
21712
  { 5111, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80815460009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5111 = VFMADD213PSZm
21713
  { 5112, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9815460009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5112 = VFMADD213PSZmb
21714
  { 5113, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a15460009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5113 = VFMADD213PSZmbk
21715
  { 5114, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e15460009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5114 = VFMADD213PSZmbkz
21716
  { 5115, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a15460009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5115 = VFMADD213PSZmk
21717
  { 5116, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e15460009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5116 = VFMADD213PSZmkz
21718
  { 5117, 4,  1,  0,  0,  0, 0x80815460009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5117 = VFMADD213PSZr
21719
  { 5118, 5,  1,  0,  0,  0, 0x409815460009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5118 = VFMADD213PSZrb
21720
  { 5119, 6,  1,  0,  0,  0, 0x409a15460009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5119 = VFMADD213PSZrbk
21721
  { 5120, 6,  1,  0,  0,  0, 0x409e15460009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5120 = VFMADD213PSZrbkz
21722
  { 5121, 5,  1,  0,  0,  0, 0x80a15460009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5121 = VFMADD213PSZrk
21723
  { 5122, 5,  1,  0,  0,  0, 0x80e15460009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5122 = VFMADD213PSZrkz
21724
  { 5123, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011d4e0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #5123 = VFMADD213SDm
21725
  { 5124, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011d4e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5124 = VFMADD213SDm_Int
21726
  { 5125, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031d4e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5125 = VFMADD213SDm_Intk
21727
  { 5126, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071d4e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5126 = VFMADD213SDm_Intkz
21728
  { 5127, 4,  1,  0,  0,  0, 0x1011d4e0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #5127 = VFMADD213SDr
21729
  { 5128, 4,  1,  0,  0,  0, 0x1011d4e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5128 = VFMADD213SDr_Int
21730
  { 5129, 5,  1,  0,  0,  0, 0x1031d4e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5129 = VFMADD213SDr_Intk
21731
  { 5130, 5,  1,  0,  0,  0, 0x1071d4e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5130 = VFMADD213SDr_Intkz
21732
  { 5131, 5,  1,  0,  0,  0, 0x41111d4e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5131 = VFMADD213SDrb_Int
21733
  { 5132, 6,  1,  0,  0,  0, 0x41131d4e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5132 = VFMADD213SDrb_Intk
21734
  { 5133, 6,  1,  0,  0,  0, 0x41171d4e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5133 = VFMADD213SDrb_Intkz
21735
  { 5134, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81154e0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #5134 = VFMADD213SSm
21736
  { 5135, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81154e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5135 = VFMADD213SSm_Int
21737
  { 5136, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x83154e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5136 = VFMADD213SSm_Intk
21738
  { 5137, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x87154e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5137 = VFMADD213SSm_Intkz
21739
  { 5138, 4,  1,  0,  0,  0, 0x81154e0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #5138 = VFMADD213SSr
21740
  { 5139, 4,  1,  0,  0,  0, 0x81154e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5139 = VFMADD213SSr_Int
21741
  { 5140, 5,  1,  0,  0,  0, 0x83154e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5140 = VFMADD213SSr_Intk
21742
  { 5141, 5,  1,  0,  0,  0, 0x87154e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5141 = VFMADD213SSr_Intkz
21743
  { 5142, 5,  1,  0,  0,  0, 0x4091154e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5142 = VFMADD213SSrb_Int
21744
  { 5143, 6,  1,  0,  0,  0, 0x4093154e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5143 = VFMADD213SSrb_Intk
21745
  { 5144, 6,  1,  0,  0,  0, 0x4097154e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5144 = VFMADD213SSrb_Intkz
21746
  { 5145, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001dc60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5145 = VFMADD231PDZ128m
21747
  { 5146, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101dc60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5146 = VFMADD231PDZ128mb
21748
  { 5147, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121dc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5147 = VFMADD231PDZ128mbk
21749
  { 5148, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161dc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5148 = VFMADD231PDZ128mbkz
21750
  { 5149, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021dc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5149 = VFMADD231PDZ128mk
21751
  { 5150, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061dc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5150 = VFMADD231PDZ128mkz
21752
  { 5151, 4,  1,  0,  0,  0, 0x2001dc60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5151 = VFMADD231PDZ128r
21753
  { 5152, 5,  1,  0,  0,  0, 0x2021dc60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5152 = VFMADD231PDZ128rk
21754
  { 5153, 5,  1,  0,  0,  0, 0x2061dc60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5153 = VFMADD231PDZ128rkz
21755
  { 5154, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009dc60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5154 = VFMADD231PDZ256m
21756
  { 5155, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109dc60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5155 = VFMADD231PDZ256mb
21757
  { 5156, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129dc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5156 = VFMADD231PDZ256mbk
21758
  { 5157, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169dc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5157 = VFMADD231PDZ256mbkz
21759
  { 5158, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029dc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5158 = VFMADD231PDZ256mk
21760
  { 5159, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069dc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5159 = VFMADD231PDZ256mkz
21761
  { 5160, 4,  1,  0,  0,  0, 0x4009dc60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5160 = VFMADD231PDZ256r
21762
  { 5161, 5,  1,  0,  0,  0, 0x4029dc60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5161 = VFMADD231PDZ256rk
21763
  { 5162, 5,  1,  0,  0,  0, 0x4069dc60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5162 = VFMADD231PDZ256rkz
21764
  { 5163, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081dc60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5163 = VFMADD231PDZm
21765
  { 5164, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181dc60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5164 = VFMADD231PDZmb
21766
  { 5165, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1dc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5165 = VFMADD231PDZmbk
21767
  { 5166, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1dc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5166 = VFMADD231PDZmbkz
21768
  { 5167, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1dc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5167 = VFMADD231PDZmk
21769
  { 5168, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1dc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5168 = VFMADD231PDZmkz
21770
  { 5169, 4,  1,  0,  0,  0, 0x8081dc60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5169 = VFMADD231PDZr
21771
  { 5170, 5,  1,  0,  0,  0, 0x41181dc60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5170 = VFMADD231PDZrb
21772
  { 5171, 6,  1,  0,  0,  0, 0x411a1dc60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5171 = VFMADD231PDZrbk
21773
  { 5172, 6,  1,  0,  0,  0, 0x411e1dc60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5172 = VFMADD231PDZrbkz
21774
  { 5173, 5,  1,  0,  0,  0, 0x80a1dc60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5173 = VFMADD231PDZrk
21775
  { 5174, 5,  1,  0,  0,  0, 0x80e1dc60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5174 = VFMADD231PDZrkz
21776
  { 5175, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20015c60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5175 = VFMADD231PSZ128m
21777
  { 5176, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9015c60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5176 = VFMADD231PSZ128mb
21778
  { 5177, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9215c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5177 = VFMADD231PSZ128mbk
21779
  { 5178, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9615c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5178 = VFMADD231PSZ128mbkz
21780
  { 5179, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20215c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5179 = VFMADD231PSZ128mk
21781
  { 5180, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20615c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5180 = VFMADD231PSZ128mkz
21782
  { 5181, 4,  1,  0,  0,  0, 0x20015c60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5181 = VFMADD231PSZ128r
21783
  { 5182, 5,  1,  0,  0,  0, 0x20215c60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5182 = VFMADD231PSZ128rk
21784
  { 5183, 5,  1,  0,  0,  0, 0x20615c60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5183 = VFMADD231PSZ128rkz
21785
  { 5184, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40095c60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5184 = VFMADD231PSZ256m
21786
  { 5185, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9095c60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5185 = VFMADD231PSZ256mb
21787
  { 5186, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9295c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5186 = VFMADD231PSZ256mbk
21788
  { 5187, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9695c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5187 = VFMADD231PSZ256mbkz
21789
  { 5188, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40295c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5188 = VFMADD231PSZ256mk
21790
  { 5189, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40695c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5189 = VFMADD231PSZ256mkz
21791
  { 5190, 4,  1,  0,  0,  0, 0x40095c60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5190 = VFMADD231PSZ256r
21792
  { 5191, 5,  1,  0,  0,  0, 0x40295c60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5191 = VFMADD231PSZ256rk
21793
  { 5192, 5,  1,  0,  0,  0, 0x40695c60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5192 = VFMADD231PSZ256rkz
21794
  { 5193, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80815c60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5193 = VFMADD231PSZm
21795
  { 5194, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9815c60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5194 = VFMADD231PSZmb
21796
  { 5195, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a15c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5195 = VFMADD231PSZmbk
21797
  { 5196, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e15c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5196 = VFMADD231PSZmbkz
21798
  { 5197, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a15c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5197 = VFMADD231PSZmk
21799
  { 5198, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e15c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5198 = VFMADD231PSZmkz
21800
  { 5199, 4,  1,  0,  0,  0, 0x80815c60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5199 = VFMADD231PSZr
21801
  { 5200, 5,  1,  0,  0,  0, 0x409815c60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5200 = VFMADD231PSZrb
21802
  { 5201, 6,  1,  0,  0,  0, 0x409a15c60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5201 = VFMADD231PSZrbk
21803
  { 5202, 6,  1,  0,  0,  0, 0x409e15c60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5202 = VFMADD231PSZrbkz
21804
  { 5203, 5,  1,  0,  0,  0, 0x80a15c60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5203 = VFMADD231PSZrk
21805
  { 5204, 5,  1,  0,  0,  0, 0x80e15c60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5204 = VFMADD231PSZrkz
21806
  { 5205, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011dce0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #5205 = VFMADD231SDm
21807
  { 5206, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011dce0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5206 = VFMADD231SDm_Int
21808
  { 5207, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031dce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5207 = VFMADD231SDm_Intk
21809
  { 5208, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071dce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5208 = VFMADD231SDm_Intkz
21810
  { 5209, 4,  1,  0,  0,  0, 0x1011dce0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #5209 = VFMADD231SDr
21811
  { 5210, 4,  1,  0,  0,  0, 0x1011dce0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5210 = VFMADD231SDr_Int
21812
  { 5211, 5,  1,  0,  0,  0, 0x1031dce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5211 = VFMADD231SDr_Intk
21813
  { 5212, 5,  1,  0,  0,  0, 0x1071dce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5212 = VFMADD231SDr_Intkz
21814
  { 5213, 5,  1,  0,  0,  0, 0x41111dce0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5213 = VFMADD231SDrb_Int
21815
  { 5214, 6,  1,  0,  0,  0, 0x41131dce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5214 = VFMADD231SDrb_Intk
21816
  { 5215, 6,  1,  0,  0,  0, 0x41171dce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5215 = VFMADD231SDrb_Intkz
21817
  { 5216, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8115ce0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #5216 = VFMADD231SSm
21818
  { 5217, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8115ce0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5217 = VFMADD231SSm_Int
21819
  { 5218, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8315ce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5218 = VFMADD231SSm_Intk
21820
  { 5219, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8715ce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5219 = VFMADD231SSm_Intkz
21821
  { 5220, 4,  1,  0,  0,  0, 0x8115ce0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #5220 = VFMADD231SSr
21822
  { 5221, 4,  1,  0,  0,  0, 0x8115ce0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5221 = VFMADD231SSr_Int
21823
  { 5222, 5,  1,  0,  0,  0, 0x8315ce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5222 = VFMADD231SSr_Intk
21824
  { 5223, 5,  1,  0,  0,  0, 0x8715ce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5223 = VFMADD231SSr_Intkz
21825
  { 5224, 5,  1,  0,  0,  0, 0x409115ce0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5224 = VFMADD231SSrb_Int
21826
  { 5225, 6,  1,  0,  0,  0, 0x409315ce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5225 = VFMADD231SSrb_Intk
21827
  { 5226, 6,  1,  0,  0,  0, 0x409715ce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5226 = VFMADD231SSrb_Intkz
21828
  { 5227, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x534b004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #5227 = VFMADDPD4mr
21829
  { 5228, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0xd34b004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #5228 = VFMADDPD4mrY
21830
  { 5229, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20005b4b004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #5229 = VFMADDPD4rm
21831
  { 5230, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x2000db4b004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #5230 = VFMADDPD4rmY
21832
  { 5231, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20005b4b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5231 = VFMADDPD4rr
21833
  { 5232, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x2000db4b004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5232 = VFMADDPD4rrY
21834
  { 5233, 4,  1,  0,  926,  0, 0xd34b004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5233 = VFMADDPD4rrY_REV
21835
  { 5234, 4,  1,  0,  926,  0, 0x534b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5234 = VFMADDPD4rr_REV
21836
  { 5235, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1cc30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5235 = VFMADDPDr132m
21837
  { 5236, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9cc30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5236 = VFMADDPDr132mY
21838
  { 5237, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1cc30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5237 = VFMADDPDr132r
21839
  { 5238, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9cc30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5238 = VFMADDPDr132rY
21840
  { 5239, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d430009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5239 = VFMADDPDr213m
21841
  { 5240, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d430009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5240 = VFMADDPDr213mY
21842
  { 5241, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d430009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5241 = VFMADDPDr213r
21843
  { 5242, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d430009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5242 = VFMADDPDr213rY
21844
  { 5243, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1dc30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5243 = VFMADDPDr231m
21845
  { 5244, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9dc30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5244 = VFMADDPDr231mY
21846
  { 5245, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1dc30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5245 = VFMADDPDr231r
21847
  { 5246, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9dc30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5246 = VFMADDPDr231rY
21848
  { 5247, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x5342804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #5247 = VFMADDPS4mr
21849
  { 5248, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0xd342804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #5248 = VFMADDPS4mrY
21850
  { 5249, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20005b42804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #5249 = VFMADDPS4rm
21851
  { 5250, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x2000db42804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #5250 = VFMADDPS4rmY
21852
  { 5251, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20005b42804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5251 = VFMADDPS4rr
21853
  { 5252, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x2000db42804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5252 = VFMADDPS4rrY
21854
  { 5253, 4,  1,  0,  926,  0, 0xd342804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5253 = VFMADDPS4rrY_REV
21855
  { 5254, 4,  1,  0,  926,  0, 0x5342804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5254 = VFMADDPS4rr_REV
21856
  { 5255, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14c28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5255 = VFMADDPSr132m
21857
  { 5256, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94c28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5256 = VFMADDPSr132mY
21858
  { 5257, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14c28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5257 = VFMADDPSr132r
21859
  { 5258, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94c28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5258 = VFMADDPSr132rY
21860
  { 5259, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15428009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5259 = VFMADDPSr213m
21861
  { 5260, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95428009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5260 = VFMADDPSr213mY
21862
  { 5261, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15428009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5261 = VFMADDPSr213r
21863
  { 5262, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95428009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5262 = VFMADDPSr213rY
21864
  { 5263, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15c28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5263 = VFMADDPSr231m
21865
  { 5264, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95c28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5264 = VFMADDPSr231mY
21866
  { 5265, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15c28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5265 = VFMADDPSr231r
21867
  { 5266, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95c28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5266 = VFMADDPSr231rY
21868
  { 5267, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x1535b004d006ULL, nullptr, nullptr, OperandInfo556, -1 ,nullptr },  // Inst #5267 = VFMADDSD4mr
21869
  { 5268, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x1535b004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #5268 = VFMADDSD4mr_Int
21870
  { 5269, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015b5b004d006ULL, nullptr, nullptr, OperandInfo557, -1 ,nullptr },  // Inst #5269 = VFMADDSD4rm
21871
  { 5270, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015b5b004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #5270 = VFMADDSD4rm_Int
21872
  { 5271, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015b5b004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr },  // Inst #5271 = VFMADDSD4rr
21873
  { 5272, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015b5b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5272 = VFMADDSD4rr_Int
21874
  { 5273, 4,  1,  0,  926,  0, 0x1535b004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr },  // Inst #5273 = VFMADDSD4rr_REV
21875
  { 5274, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ccb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #5274 = VFMADDSDr132m
21876
  { 5275, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ccb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5275 = VFMADDSDr132m_Int
21877
  { 5276, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11ccb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #5276 = VFMADDSDr132r
21878
  { 5277, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11ccb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5277 = VFMADDSDr132r_Int
21879
  { 5278, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d4b0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #5278 = VFMADDSDr213m
21880
  { 5279, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d4b0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5279 = VFMADDSDr213m_Int
21881
  { 5280, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11d4b0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #5280 = VFMADDSDr213r
21882
  { 5281, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11d4b0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5281 = VFMADDSDr213r_Int
21883
  { 5282, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11dcb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #5282 = VFMADDSDr231m
21884
  { 5283, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11dcb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5283 = VFMADDSDr231m_Int
21885
  { 5284, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11dcb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #5284 = VFMADDSDr231r
21886
  { 5285, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11dcb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5285 = VFMADDSDr231r_Int
21887
  { 5286, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x15352804d006ULL, nullptr, nullptr, OperandInfo561, -1 ,nullptr },  // Inst #5286 = VFMADDSS4mr
21888
  { 5287, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x15352804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #5287 = VFMADDSS4mr_Int
21889
  { 5288, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015b52804d006ULL, nullptr, nullptr, OperandInfo562, -1 ,nullptr },  // Inst #5288 = VFMADDSS4rm
21890
  { 5289, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015b52804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #5289 = VFMADDSS4rm_Int
21891
  { 5290, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015b52804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr },  // Inst #5290 = VFMADDSS4rr
21892
  { 5291, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015b52804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5291 = VFMADDSS4rr_Int
21893
  { 5292, 4,  1,  0,  926,  0, 0x15352804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr },  // Inst #5292 = VFMADDSS4rr_REV
21894
  { 5293, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114ca8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #5293 = VFMADDSSr132m
21895
  { 5294, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114ca8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5294 = VFMADDSSr132m_Int
21896
  { 5295, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x114ca8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #5295 = VFMADDSSr132r
21897
  { 5296, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x114ca8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5296 = VFMADDSSr132r_Int
21898
  { 5297, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1154a8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #5297 = VFMADDSSr213m
21899
  { 5298, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1154a8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5298 = VFMADDSSr213m_Int
21900
  { 5299, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1154a8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #5299 = VFMADDSSr213r
21901
  { 5300, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x1154a8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5300 = VFMADDSSr213r_Int
21902
  { 5301, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115ca8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #5301 = VFMADDSSr231m
21903
  { 5302, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115ca8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5302 = VFMADDSSr231m_Int
21904
  { 5303, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x115ca8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #5303 = VFMADDSSr231r
21905
  { 5304, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x115ca8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5304 = VFMADDSSr231r_Int
21906
  { 5305, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001cb60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5305 = VFMADDSUB132PDZ128m
21907
  { 5306, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101cb60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5306 = VFMADDSUB132PDZ128mb
21908
  { 5307, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121cb60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5307 = VFMADDSUB132PDZ128mbk
21909
  { 5308, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161cb60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5308 = VFMADDSUB132PDZ128mbkz
21910
  { 5309, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021cb60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5309 = VFMADDSUB132PDZ128mk
21911
  { 5310, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061cb60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5310 = VFMADDSUB132PDZ128mkz
21912
  { 5311, 4,  1,  0,  0,  0, 0x2001cb60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5311 = VFMADDSUB132PDZ128r
21913
  { 5312, 5,  1,  0,  0,  0, 0x2021cb60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5312 = VFMADDSUB132PDZ128rk
21914
  { 5313, 5,  1,  0,  0,  0, 0x2061cb60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5313 = VFMADDSUB132PDZ128rkz
21915
  { 5314, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009cb60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5314 = VFMADDSUB132PDZ256m
21916
  { 5315, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109cb60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5315 = VFMADDSUB132PDZ256mb
21917
  { 5316, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129cb60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5316 = VFMADDSUB132PDZ256mbk
21918
  { 5317, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169cb60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5317 = VFMADDSUB132PDZ256mbkz
21919
  { 5318, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029cb60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5318 = VFMADDSUB132PDZ256mk
21920
  { 5319, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069cb60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5319 = VFMADDSUB132PDZ256mkz
21921
  { 5320, 4,  1,  0,  0,  0, 0x4009cb60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5320 = VFMADDSUB132PDZ256r
21922
  { 5321, 5,  1,  0,  0,  0, 0x4029cb60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5321 = VFMADDSUB132PDZ256rk
21923
  { 5322, 5,  1,  0,  0,  0, 0x4069cb60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5322 = VFMADDSUB132PDZ256rkz
21924
  { 5323, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081cb60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5323 = VFMADDSUB132PDZm
21925
  { 5324, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181cb60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5324 = VFMADDSUB132PDZmb
21926
  { 5325, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1cb60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5325 = VFMADDSUB132PDZmbk
21927
  { 5326, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1cb60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5326 = VFMADDSUB132PDZmbkz
21928
  { 5327, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1cb60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5327 = VFMADDSUB132PDZmk
21929
  { 5328, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1cb60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5328 = VFMADDSUB132PDZmkz
21930
  { 5329, 4,  1,  0,  0,  0, 0x8081cb60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5329 = VFMADDSUB132PDZr
21931
  { 5330, 5,  1,  0,  0,  0, 0x41181cb60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5330 = VFMADDSUB132PDZrb
21932
  { 5331, 6,  1,  0,  0,  0, 0x411a1cb60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5331 = VFMADDSUB132PDZrbk
21933
  { 5332, 6,  1,  0,  0,  0, 0x411e1cb60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5332 = VFMADDSUB132PDZrbkz
21934
  { 5333, 5,  1,  0,  0,  0, 0x80a1cb60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5333 = VFMADDSUB132PDZrk
21935
  { 5334, 5,  1,  0,  0,  0, 0x80e1cb60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5334 = VFMADDSUB132PDZrkz
21936
  { 5335, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20014b60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5335 = VFMADDSUB132PSZ128m
21937
  { 5336, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9014b60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5336 = VFMADDSUB132PSZ128mb
21938
  { 5337, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9214b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5337 = VFMADDSUB132PSZ128mbk
21939
  { 5338, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9614b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5338 = VFMADDSUB132PSZ128mbkz
21940
  { 5339, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20214b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5339 = VFMADDSUB132PSZ128mk
21941
  { 5340, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20614b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5340 = VFMADDSUB132PSZ128mkz
21942
  { 5341, 4,  1,  0,  0,  0, 0x20014b60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5341 = VFMADDSUB132PSZ128r
21943
  { 5342, 5,  1,  0,  0,  0, 0x20214b60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5342 = VFMADDSUB132PSZ128rk
21944
  { 5343, 5,  1,  0,  0,  0, 0x20614b60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5343 = VFMADDSUB132PSZ128rkz
21945
  { 5344, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40094b60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5344 = VFMADDSUB132PSZ256m
21946
  { 5345, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9094b60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5345 = VFMADDSUB132PSZ256mb
21947
  { 5346, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9294b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5346 = VFMADDSUB132PSZ256mbk
21948
  { 5347, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9694b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5347 = VFMADDSUB132PSZ256mbkz
21949
  { 5348, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40294b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5348 = VFMADDSUB132PSZ256mk
21950
  { 5349, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40694b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5349 = VFMADDSUB132PSZ256mkz
21951
  { 5350, 4,  1,  0,  0,  0, 0x40094b60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5350 = VFMADDSUB132PSZ256r
21952
  { 5351, 5,  1,  0,  0,  0, 0x40294b60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5351 = VFMADDSUB132PSZ256rk
21953
  { 5352, 5,  1,  0,  0,  0, 0x40694b60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5352 = VFMADDSUB132PSZ256rkz
21954
  { 5353, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80814b60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5353 = VFMADDSUB132PSZm
21955
  { 5354, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9814b60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5354 = VFMADDSUB132PSZmb
21956
  { 5355, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a14b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5355 = VFMADDSUB132PSZmbk
21957
  { 5356, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e14b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5356 = VFMADDSUB132PSZmbkz
21958
  { 5357, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a14b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5357 = VFMADDSUB132PSZmk
21959
  { 5358, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e14b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5358 = VFMADDSUB132PSZmkz
21960
  { 5359, 4,  1,  0,  0,  0, 0x80814b60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5359 = VFMADDSUB132PSZr
21961
  { 5360, 5,  1,  0,  0,  0, 0x409814b60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5360 = VFMADDSUB132PSZrb
21962
  { 5361, 6,  1,  0,  0,  0, 0x409a14b60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5361 = VFMADDSUB132PSZrbk
21963
  { 5362, 6,  1,  0,  0,  0, 0x409e14b60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5362 = VFMADDSUB132PSZrbkz
21964
  { 5363, 5,  1,  0,  0,  0, 0x80a14b60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5363 = VFMADDSUB132PSZrk
21965
  { 5364, 5,  1,  0,  0,  0, 0x80e14b60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5364 = VFMADDSUB132PSZrkz
21966
  { 5365, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001d360009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5365 = VFMADDSUB213PDZ128m
21967
  { 5366, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101d360009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5366 = VFMADDSUB213PDZ128mb
21968
  { 5367, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121d360009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5367 = VFMADDSUB213PDZ128mbk
21969
  { 5368, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161d360009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5368 = VFMADDSUB213PDZ128mbkz
21970
  { 5369, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021d360009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5369 = VFMADDSUB213PDZ128mk
21971
  { 5370, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061d360009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5370 = VFMADDSUB213PDZ128mkz
21972
  { 5371, 4,  1,  0,  0,  0, 0x2001d360009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5371 = VFMADDSUB213PDZ128r
21973
  { 5372, 5,  1,  0,  0,  0, 0x2021d360009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5372 = VFMADDSUB213PDZ128rk
21974
  { 5373, 5,  1,  0,  0,  0, 0x2061d360009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5373 = VFMADDSUB213PDZ128rkz
21975
  { 5374, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009d360009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5374 = VFMADDSUB213PDZ256m
21976
  { 5375, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109d360009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5375 = VFMADDSUB213PDZ256mb
21977
  { 5376, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129d360009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5376 = VFMADDSUB213PDZ256mbk
21978
  { 5377, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169d360009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5377 = VFMADDSUB213PDZ256mbkz
21979
  { 5378, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029d360009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5378 = VFMADDSUB213PDZ256mk
21980
  { 5379, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069d360009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5379 = VFMADDSUB213PDZ256mkz
21981
  { 5380, 4,  1,  0,  0,  0, 0x4009d360009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5380 = VFMADDSUB213PDZ256r
21982
  { 5381, 5,  1,  0,  0,  0, 0x4029d360009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5381 = VFMADDSUB213PDZ256rk
21983
  { 5382, 5,  1,  0,  0,  0, 0x4069d360009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5382 = VFMADDSUB213PDZ256rkz
21984
  { 5383, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081d360009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5383 = VFMADDSUB213PDZm
21985
  { 5384, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181d360009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5384 = VFMADDSUB213PDZmb
21986
  { 5385, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1d360009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5385 = VFMADDSUB213PDZmbk
21987
  { 5386, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1d360009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5386 = VFMADDSUB213PDZmbkz
21988
  { 5387, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1d360009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5387 = VFMADDSUB213PDZmk
21989
  { 5388, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1d360009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5388 = VFMADDSUB213PDZmkz
21990
  { 5389, 4,  1,  0,  0,  0, 0x8081d360009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5389 = VFMADDSUB213PDZr
21991
  { 5390, 5,  1,  0,  0,  0, 0x41181d360009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5390 = VFMADDSUB213PDZrb
21992
  { 5391, 6,  1,  0,  0,  0, 0x411a1d360009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5391 = VFMADDSUB213PDZrbk
21993
  { 5392, 6,  1,  0,  0,  0, 0x411e1d360009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5392 = VFMADDSUB213PDZrbkz
21994
  { 5393, 5,  1,  0,  0,  0, 0x80a1d360009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5393 = VFMADDSUB213PDZrk
21995
  { 5394, 5,  1,  0,  0,  0, 0x80e1d360009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5394 = VFMADDSUB213PDZrkz
21996
  { 5395, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20015360009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5395 = VFMADDSUB213PSZ128m
21997
  { 5396, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9015360009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5396 = VFMADDSUB213PSZ128mb
21998
  { 5397, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9215360009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5397 = VFMADDSUB213PSZ128mbk
21999
  { 5398, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9615360009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5398 = VFMADDSUB213PSZ128mbkz
22000
  { 5399, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20215360009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5399 = VFMADDSUB213PSZ128mk
22001
  { 5400, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20615360009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5400 = VFMADDSUB213PSZ128mkz
22002
  { 5401, 4,  1,  0,  0,  0, 0x20015360009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5401 = VFMADDSUB213PSZ128r
22003
  { 5402, 5,  1,  0,  0,  0, 0x20215360009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5402 = VFMADDSUB213PSZ128rk
22004
  { 5403, 5,  1,  0,  0,  0, 0x20615360009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5403 = VFMADDSUB213PSZ128rkz
22005
  { 5404, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40095360009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5404 = VFMADDSUB213PSZ256m
22006
  { 5405, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9095360009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5405 = VFMADDSUB213PSZ256mb
22007
  { 5406, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9295360009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5406 = VFMADDSUB213PSZ256mbk
22008
  { 5407, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9695360009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5407 = VFMADDSUB213PSZ256mbkz
22009
  { 5408, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40295360009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5408 = VFMADDSUB213PSZ256mk
22010
  { 5409, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40695360009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5409 = VFMADDSUB213PSZ256mkz
22011
  { 5410, 4,  1,  0,  0,  0, 0x40095360009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5410 = VFMADDSUB213PSZ256r
22012
  { 5411, 5,  1,  0,  0,  0, 0x40295360009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5411 = VFMADDSUB213PSZ256rk
22013
  { 5412, 5,  1,  0,  0,  0, 0x40695360009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5412 = VFMADDSUB213PSZ256rkz
22014
  { 5413, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80815360009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5413 = VFMADDSUB213PSZm
22015
  { 5414, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9815360009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5414 = VFMADDSUB213PSZmb
22016
  { 5415, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a15360009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5415 = VFMADDSUB213PSZmbk
22017
  { 5416, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e15360009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5416 = VFMADDSUB213PSZmbkz
22018
  { 5417, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a15360009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5417 = VFMADDSUB213PSZmk
22019
  { 5418, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e15360009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5418 = VFMADDSUB213PSZmkz
22020
  { 5419, 4,  1,  0,  0,  0, 0x80815360009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5419 = VFMADDSUB213PSZr
22021
  { 5420, 5,  1,  0,  0,  0, 0x409815360009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5420 = VFMADDSUB213PSZrb
22022
  { 5421, 6,  1,  0,  0,  0, 0x409a15360009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5421 = VFMADDSUB213PSZrbk
22023
  { 5422, 6,  1,  0,  0,  0, 0x409e15360009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5422 = VFMADDSUB213PSZrbkz
22024
  { 5423, 5,  1,  0,  0,  0, 0x80a15360009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5423 = VFMADDSUB213PSZrk
22025
  { 5424, 5,  1,  0,  0,  0, 0x80e15360009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5424 = VFMADDSUB213PSZrkz
22026
  { 5425, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001db60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5425 = VFMADDSUB231PDZ128m
22027
  { 5426, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101db60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5426 = VFMADDSUB231PDZ128mb
22028
  { 5427, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121db60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5427 = VFMADDSUB231PDZ128mbk
22029
  { 5428, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161db60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5428 = VFMADDSUB231PDZ128mbkz
22030
  { 5429, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021db60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5429 = VFMADDSUB231PDZ128mk
22031
  { 5430, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061db60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5430 = VFMADDSUB231PDZ128mkz
22032
  { 5431, 4,  1,  0,  0,  0, 0x2001db60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5431 = VFMADDSUB231PDZ128r
22033
  { 5432, 5,  1,  0,  0,  0, 0x2021db60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5432 = VFMADDSUB231PDZ128rk
22034
  { 5433, 5,  1,  0,  0,  0, 0x2061db60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5433 = VFMADDSUB231PDZ128rkz
22035
  { 5434, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009db60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5434 = VFMADDSUB231PDZ256m
22036
  { 5435, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109db60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5435 = VFMADDSUB231PDZ256mb
22037
  { 5436, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129db60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5436 = VFMADDSUB231PDZ256mbk
22038
  { 5437, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169db60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5437 = VFMADDSUB231PDZ256mbkz
22039
  { 5438, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029db60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5438 = VFMADDSUB231PDZ256mk
22040
  { 5439, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069db60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5439 = VFMADDSUB231PDZ256mkz
22041
  { 5440, 4,  1,  0,  0,  0, 0x4009db60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5440 = VFMADDSUB231PDZ256r
22042
  { 5441, 5,  1,  0,  0,  0, 0x4029db60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5441 = VFMADDSUB231PDZ256rk
22043
  { 5442, 5,  1,  0,  0,  0, 0x4069db60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5442 = VFMADDSUB231PDZ256rkz
22044
  { 5443, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081db60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5443 = VFMADDSUB231PDZm
22045
  { 5444, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181db60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5444 = VFMADDSUB231PDZmb
22046
  { 5445, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1db60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5445 = VFMADDSUB231PDZmbk
22047
  { 5446, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1db60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5446 = VFMADDSUB231PDZmbkz
22048
  { 5447, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1db60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5447 = VFMADDSUB231PDZmk
22049
  { 5448, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1db60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5448 = VFMADDSUB231PDZmkz
22050
  { 5449, 4,  1,  0,  0,  0, 0x8081db60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5449 = VFMADDSUB231PDZr
22051
  { 5450, 5,  1,  0,  0,  0, 0x41181db60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5450 = VFMADDSUB231PDZrb
22052
  { 5451, 6,  1,  0,  0,  0, 0x411a1db60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5451 = VFMADDSUB231PDZrbk
22053
  { 5452, 6,  1,  0,  0,  0, 0x411e1db60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5452 = VFMADDSUB231PDZrbkz
22054
  { 5453, 5,  1,  0,  0,  0, 0x80a1db60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5453 = VFMADDSUB231PDZrk
22055
  { 5454, 5,  1,  0,  0,  0, 0x80e1db60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5454 = VFMADDSUB231PDZrkz
22056
  { 5455, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20015b60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5455 = VFMADDSUB231PSZ128m
22057
  { 5456, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9015b60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5456 = VFMADDSUB231PSZ128mb
22058
  { 5457, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9215b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5457 = VFMADDSUB231PSZ128mbk
22059
  { 5458, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9615b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5458 = VFMADDSUB231PSZ128mbkz
22060
  { 5459, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20215b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5459 = VFMADDSUB231PSZ128mk
22061
  { 5460, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20615b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5460 = VFMADDSUB231PSZ128mkz
22062
  { 5461, 4,  1,  0,  0,  0, 0x20015b60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5461 = VFMADDSUB231PSZ128r
22063
  { 5462, 5,  1,  0,  0,  0, 0x20215b60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5462 = VFMADDSUB231PSZ128rk
22064
  { 5463, 5,  1,  0,  0,  0, 0x20615b60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5463 = VFMADDSUB231PSZ128rkz
22065
  { 5464, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40095b60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5464 = VFMADDSUB231PSZ256m
22066
  { 5465, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9095b60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5465 = VFMADDSUB231PSZ256mb
22067
  { 5466, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9295b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5466 = VFMADDSUB231PSZ256mbk
22068
  { 5467, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9695b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5467 = VFMADDSUB231PSZ256mbkz
22069
  { 5468, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40295b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5468 = VFMADDSUB231PSZ256mk
22070
  { 5469, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40695b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5469 = VFMADDSUB231PSZ256mkz
22071
  { 5470, 4,  1,  0,  0,  0, 0x40095b60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5470 = VFMADDSUB231PSZ256r
22072
  { 5471, 5,  1,  0,  0,  0, 0x40295b60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5471 = VFMADDSUB231PSZ256rk
22073
  { 5472, 5,  1,  0,  0,  0, 0x40695b60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5472 = VFMADDSUB231PSZ256rkz
22074
  { 5473, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80815b60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5473 = VFMADDSUB231PSZm
22075
  { 5474, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9815b60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5474 = VFMADDSUB231PSZmb
22076
  { 5475, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a15b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5475 = VFMADDSUB231PSZmbk
22077
  { 5476, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e15b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5476 = VFMADDSUB231PSZmbkz
22078
  { 5477, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a15b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5477 = VFMADDSUB231PSZmk
22079
  { 5478, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e15b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5478 = VFMADDSUB231PSZmkz
22080
  { 5479, 4,  1,  0,  0,  0, 0x80815b60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5479 = VFMADDSUB231PSZr
22081
  { 5480, 5,  1,  0,  0,  0, 0x409815b60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5480 = VFMADDSUB231PSZrb
22082
  { 5481, 6,  1,  0,  0,  0, 0x409a15b60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5481 = VFMADDSUB231PSZrbk
22083
  { 5482, 6,  1,  0,  0,  0, 0x409e15b60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5482 = VFMADDSUB231PSZrbkz
22084
  { 5483, 5,  1,  0,  0,  0, 0x80a15b60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5483 = VFMADDSUB231PSZrk
22085
  { 5484, 5,  1,  0,  0,  0, 0x80e15b60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5484 = VFMADDSUB231PSZrkz
22086
  { 5485, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x52eb004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #5485 = VFMADDSUBPD4mr
22087
  { 5486, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0xd2eb004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #5486 = VFMADDSUBPD4mrY
22088
  { 5487, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20005aeb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #5487 = VFMADDSUBPD4rm
22089
  { 5488, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000daeb004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #5488 = VFMADDSUBPD4rmY
22090
  { 5489, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20005aeb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5489 = VFMADDSUBPD4rr
22091
  { 5490, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x2000daeb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5490 = VFMADDSUBPD4rrY
22092
  { 5491, 4,  1,  0,  0,  0, 0xd2eb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5491 = VFMADDSUBPD4rrY_REV
22093
  { 5492, 4,  1,  0,  0,  0, 0x52eb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5492 = VFMADDSUBPD4rr_REV
22094
  { 5493, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1cb30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5493 = VFMADDSUBPDr132m
22095
  { 5494, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9cb30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5494 = VFMADDSUBPDr132mY
22096
  { 5495, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1cb30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5495 = VFMADDSUBPDr132r
22097
  { 5496, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9cb30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5496 = VFMADDSUBPDr132rY
22098
  { 5497, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d330009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5497 = VFMADDSUBPDr213m
22099
  { 5498, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d330009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5498 = VFMADDSUBPDr213mY
22100
  { 5499, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d330009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5499 = VFMADDSUBPDr213r
22101
  { 5500, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d330009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5500 = VFMADDSUBPDr213rY
22102
  { 5501, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1db30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5501 = VFMADDSUBPDr231m
22103
  { 5502, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9db30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5502 = VFMADDSUBPDr231mY
22104
  { 5503, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1db30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5503 = VFMADDSUBPDr231r
22105
  { 5504, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9db30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5504 = VFMADDSUBPDr231rY
22106
  { 5505, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x52e2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #5505 = VFMADDSUBPS4mr
22107
  { 5506, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0xd2e2804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #5506 = VFMADDSUBPS4mrY
22108
  { 5507, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20005ae2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #5507 = VFMADDSUBPS4rm
22109
  { 5508, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000dae2804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #5508 = VFMADDSUBPS4rmY
22110
  { 5509, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20005ae2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5509 = VFMADDSUBPS4rr
22111
  { 5510, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x2000dae2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5510 = VFMADDSUBPS4rrY
22112
  { 5511, 4,  1,  0,  0,  0, 0xd2e2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5511 = VFMADDSUBPS4rrY_REV
22113
  { 5512, 4,  1,  0,  0,  0, 0x52e2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5512 = VFMADDSUBPS4rr_REV
22114
  { 5513, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14b28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5513 = VFMADDSUBPSr132m
22115
  { 5514, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94b28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5514 = VFMADDSUBPSr132mY
22116
  { 5515, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14b28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5515 = VFMADDSUBPSr132r
22117
  { 5516, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94b28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5516 = VFMADDSUBPSr132rY
22118
  { 5517, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15328009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5517 = VFMADDSUBPSr213m
22119
  { 5518, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95328009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5518 = VFMADDSUBPSr213mY
22120
  { 5519, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15328009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5519 = VFMADDSUBPSr213r
22121
  { 5520, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95328009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5520 = VFMADDSUBPSr213rY
22122
  { 5521, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15b28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5521 = VFMADDSUBPSr231m
22123
  { 5522, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95b28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5522 = VFMADDSUBPSr231mY
22124
  { 5523, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15b28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5523 = VFMADDSUBPSr231r
22125
  { 5524, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95b28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5524 = VFMADDSUBPSr231rY
22126
  { 5525, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001cd60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5525 = VFMSUB132PDZ128m
22127
  { 5526, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101cd60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5526 = VFMSUB132PDZ128mb
22128
  { 5527, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121cd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5527 = VFMSUB132PDZ128mbk
22129
  { 5528, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161cd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5528 = VFMSUB132PDZ128mbkz
22130
  { 5529, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021cd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5529 = VFMSUB132PDZ128mk
22131
  { 5530, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061cd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5530 = VFMSUB132PDZ128mkz
22132
  { 5531, 4,  1,  0,  0,  0, 0x2001cd60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5531 = VFMSUB132PDZ128r
22133
  { 5532, 5,  1,  0,  0,  0, 0x2021cd60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5532 = VFMSUB132PDZ128rk
22134
  { 5533, 5,  1,  0,  0,  0, 0x2061cd60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5533 = VFMSUB132PDZ128rkz
22135
  { 5534, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009cd60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5534 = VFMSUB132PDZ256m
22136
  { 5535, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109cd60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5535 = VFMSUB132PDZ256mb
22137
  { 5536, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129cd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5536 = VFMSUB132PDZ256mbk
22138
  { 5537, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169cd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5537 = VFMSUB132PDZ256mbkz
22139
  { 5538, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029cd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5538 = VFMSUB132PDZ256mk
22140
  { 5539, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069cd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5539 = VFMSUB132PDZ256mkz
22141
  { 5540, 4,  1,  0,  0,  0, 0x4009cd60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5540 = VFMSUB132PDZ256r
22142
  { 5541, 5,  1,  0,  0,  0, 0x4029cd60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5541 = VFMSUB132PDZ256rk
22143
  { 5542, 5,  1,  0,  0,  0, 0x4069cd60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5542 = VFMSUB132PDZ256rkz
22144
  { 5543, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081cd60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5543 = VFMSUB132PDZm
22145
  { 5544, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181cd60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5544 = VFMSUB132PDZmb
22146
  { 5545, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1cd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5545 = VFMSUB132PDZmbk
22147
  { 5546, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1cd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5546 = VFMSUB132PDZmbkz
22148
  { 5547, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1cd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5547 = VFMSUB132PDZmk
22149
  { 5548, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1cd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5548 = VFMSUB132PDZmkz
22150
  { 5549, 4,  1,  0,  0,  0, 0x8081cd60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5549 = VFMSUB132PDZr
22151
  { 5550, 5,  1,  0,  0,  0, 0x41181cd60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5550 = VFMSUB132PDZrb
22152
  { 5551, 6,  1,  0,  0,  0, 0x411a1cd60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5551 = VFMSUB132PDZrbk
22153
  { 5552, 6,  1,  0,  0,  0, 0x411e1cd60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5552 = VFMSUB132PDZrbkz
22154
  { 5553, 5,  1,  0,  0,  0, 0x80a1cd60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5553 = VFMSUB132PDZrk
22155
  { 5554, 5,  1,  0,  0,  0, 0x80e1cd60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5554 = VFMSUB132PDZrkz
22156
  { 5555, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20014d60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5555 = VFMSUB132PSZ128m
22157
  { 5556, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9014d60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5556 = VFMSUB132PSZ128mb
22158
  { 5557, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9214d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5557 = VFMSUB132PSZ128mbk
22159
  { 5558, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9614d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5558 = VFMSUB132PSZ128mbkz
22160
  { 5559, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20214d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5559 = VFMSUB132PSZ128mk
22161
  { 5560, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20614d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5560 = VFMSUB132PSZ128mkz
22162
  { 5561, 4,  1,  0,  0,  0, 0x20014d60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5561 = VFMSUB132PSZ128r
22163
  { 5562, 5,  1,  0,  0,  0, 0x20214d60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5562 = VFMSUB132PSZ128rk
22164
  { 5563, 5,  1,  0,  0,  0, 0x20614d60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5563 = VFMSUB132PSZ128rkz
22165
  { 5564, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40094d60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5564 = VFMSUB132PSZ256m
22166
  { 5565, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9094d60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5565 = VFMSUB132PSZ256mb
22167
  { 5566, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9294d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5566 = VFMSUB132PSZ256mbk
22168
  { 5567, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9694d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5567 = VFMSUB132PSZ256mbkz
22169
  { 5568, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40294d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5568 = VFMSUB132PSZ256mk
22170
  { 5569, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40694d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5569 = VFMSUB132PSZ256mkz
22171
  { 5570, 4,  1,  0,  0,  0, 0x40094d60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5570 = VFMSUB132PSZ256r
22172
  { 5571, 5,  1,  0,  0,  0, 0x40294d60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5571 = VFMSUB132PSZ256rk
22173
  { 5572, 5,  1,  0,  0,  0, 0x40694d60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5572 = VFMSUB132PSZ256rkz
22174
  { 5573, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80814d60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5573 = VFMSUB132PSZm
22175
  { 5574, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9814d60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5574 = VFMSUB132PSZmb
22176
  { 5575, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a14d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5575 = VFMSUB132PSZmbk
22177
  { 5576, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e14d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5576 = VFMSUB132PSZmbkz
22178
  { 5577, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a14d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5577 = VFMSUB132PSZmk
22179
  { 5578, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e14d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5578 = VFMSUB132PSZmkz
22180
  { 5579, 4,  1,  0,  0,  0, 0x80814d60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5579 = VFMSUB132PSZr
22181
  { 5580, 5,  1,  0,  0,  0, 0x409814d60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5580 = VFMSUB132PSZrb
22182
  { 5581, 6,  1,  0,  0,  0, 0x409a14d60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5581 = VFMSUB132PSZrbk
22183
  { 5582, 6,  1,  0,  0,  0, 0x409e14d60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5582 = VFMSUB132PSZrbkz
22184
  { 5583, 5,  1,  0,  0,  0, 0x80a14d60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5583 = VFMSUB132PSZrk
22185
  { 5584, 5,  1,  0,  0,  0, 0x80e14d60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5584 = VFMSUB132PSZrkz
22186
  { 5585, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011cde0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #5585 = VFMSUB132SDm
22187
  { 5586, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011cde0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5586 = VFMSUB132SDm_Int
22188
  { 5587, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031cde0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5587 = VFMSUB132SDm_Intk
22189
  { 5588, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071cde0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5588 = VFMSUB132SDm_Intkz
22190
  { 5589, 4,  1,  0,  0,  0, 0x1011cde0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #5589 = VFMSUB132SDr
22191
  { 5590, 4,  1,  0,  0,  0, 0x1011cde0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5590 = VFMSUB132SDr_Int
22192
  { 5591, 5,  1,  0,  0,  0, 0x1031cde0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5591 = VFMSUB132SDr_Intk
22193
  { 5592, 5,  1,  0,  0,  0, 0x1071cde0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5592 = VFMSUB132SDr_Intkz
22194
  { 5593, 5,  1,  0,  0,  0, 0x41111cde0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5593 = VFMSUB132SDrb_Int
22195
  { 5594, 6,  1,  0,  0,  0, 0x41131cde0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5594 = VFMSUB132SDrb_Intk
22196
  { 5595, 6,  1,  0,  0,  0, 0x41171cde0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5595 = VFMSUB132SDrb_Intkz
22197
  { 5596, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8114de0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #5596 = VFMSUB132SSm
22198
  { 5597, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8114de0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5597 = VFMSUB132SSm_Int
22199
  { 5598, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8314de0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5598 = VFMSUB132SSm_Intk
22200
  { 5599, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8714de0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5599 = VFMSUB132SSm_Intkz
22201
  { 5600, 4,  1,  0,  0,  0, 0x8114de0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #5600 = VFMSUB132SSr
22202
  { 5601, 4,  1,  0,  0,  0, 0x8114de0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5601 = VFMSUB132SSr_Int
22203
  { 5602, 5,  1,  0,  0,  0, 0x8314de0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5602 = VFMSUB132SSr_Intk
22204
  { 5603, 5,  1,  0,  0,  0, 0x8714de0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5603 = VFMSUB132SSr_Intkz
22205
  { 5604, 5,  1,  0,  0,  0, 0x409114de0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5604 = VFMSUB132SSrb_Int
22206
  { 5605, 6,  1,  0,  0,  0, 0x409314de0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5605 = VFMSUB132SSrb_Intk
22207
  { 5606, 6,  1,  0,  0,  0, 0x409714de0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5606 = VFMSUB132SSrb_Intkz
22208
  { 5607, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001d560009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5607 = VFMSUB213PDZ128m
22209
  { 5608, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101d560009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5608 = VFMSUB213PDZ128mb
22210
  { 5609, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121d560009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5609 = VFMSUB213PDZ128mbk
22211
  { 5610, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161d560009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5610 = VFMSUB213PDZ128mbkz
22212
  { 5611, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021d560009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5611 = VFMSUB213PDZ128mk
22213
  { 5612, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061d560009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5612 = VFMSUB213PDZ128mkz
22214
  { 5613, 4,  1,  0,  0,  0, 0x2001d560009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5613 = VFMSUB213PDZ128r
22215
  { 5614, 5,  1,  0,  0,  0, 0x2021d560009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5614 = VFMSUB213PDZ128rk
22216
  { 5615, 5,  1,  0,  0,  0, 0x2061d560009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5615 = VFMSUB213PDZ128rkz
22217
  { 5616, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009d560009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5616 = VFMSUB213PDZ256m
22218
  { 5617, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109d560009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5617 = VFMSUB213PDZ256mb
22219
  { 5618, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129d560009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5618 = VFMSUB213PDZ256mbk
22220
  { 5619, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169d560009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5619 = VFMSUB213PDZ256mbkz
22221
  { 5620, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029d560009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5620 = VFMSUB213PDZ256mk
22222
  { 5621, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069d560009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5621 = VFMSUB213PDZ256mkz
22223
  { 5622, 4,  1,  0,  0,  0, 0x4009d560009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5622 = VFMSUB213PDZ256r
22224
  { 5623, 5,  1,  0,  0,  0, 0x4029d560009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5623 = VFMSUB213PDZ256rk
22225
  { 5624, 5,  1,  0,  0,  0, 0x4069d560009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5624 = VFMSUB213PDZ256rkz
22226
  { 5625, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081d560009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5625 = VFMSUB213PDZm
22227
  { 5626, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181d560009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5626 = VFMSUB213PDZmb
22228
  { 5627, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1d560009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5627 = VFMSUB213PDZmbk
22229
  { 5628, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1d560009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5628 = VFMSUB213PDZmbkz
22230
  { 5629, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1d560009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5629 = VFMSUB213PDZmk
22231
  { 5630, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1d560009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5630 = VFMSUB213PDZmkz
22232
  { 5631, 4,  1,  0,  0,  0, 0x8081d560009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5631 = VFMSUB213PDZr
22233
  { 5632, 5,  1,  0,  0,  0, 0x41181d560009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5632 = VFMSUB213PDZrb
22234
  { 5633, 6,  1,  0,  0,  0, 0x411a1d560009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5633 = VFMSUB213PDZrbk
22235
  { 5634, 6,  1,  0,  0,  0, 0x411e1d560009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5634 = VFMSUB213PDZrbkz
22236
  { 5635, 5,  1,  0,  0,  0, 0x80a1d560009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5635 = VFMSUB213PDZrk
22237
  { 5636, 5,  1,  0,  0,  0, 0x80e1d560009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5636 = VFMSUB213PDZrkz
22238
  { 5637, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20015560009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5637 = VFMSUB213PSZ128m
22239
  { 5638, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9015560009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5638 = VFMSUB213PSZ128mb
22240
  { 5639, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9215560009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5639 = VFMSUB213PSZ128mbk
22241
  { 5640, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9615560009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5640 = VFMSUB213PSZ128mbkz
22242
  { 5641, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20215560009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5641 = VFMSUB213PSZ128mk
22243
  { 5642, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20615560009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5642 = VFMSUB213PSZ128mkz
22244
  { 5643, 4,  1,  0,  0,  0, 0x20015560009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5643 = VFMSUB213PSZ128r
22245
  { 5644, 5,  1,  0,  0,  0, 0x20215560009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5644 = VFMSUB213PSZ128rk
22246
  { 5645, 5,  1,  0,  0,  0, 0x20615560009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5645 = VFMSUB213PSZ128rkz
22247
  { 5646, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40095560009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5646 = VFMSUB213PSZ256m
22248
  { 5647, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9095560009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5647 = VFMSUB213PSZ256mb
22249
  { 5648, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9295560009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5648 = VFMSUB213PSZ256mbk
22250
  { 5649, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9695560009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5649 = VFMSUB213PSZ256mbkz
22251
  { 5650, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40295560009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5650 = VFMSUB213PSZ256mk
22252
  { 5651, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40695560009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5651 = VFMSUB213PSZ256mkz
22253
  { 5652, 4,  1,  0,  0,  0, 0x40095560009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5652 = VFMSUB213PSZ256r
22254
  { 5653, 5,  1,  0,  0,  0, 0x40295560009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5653 = VFMSUB213PSZ256rk
22255
  { 5654, 5,  1,  0,  0,  0, 0x40695560009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5654 = VFMSUB213PSZ256rkz
22256
  { 5655, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80815560009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5655 = VFMSUB213PSZm
22257
  { 5656, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9815560009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5656 = VFMSUB213PSZmb
22258
  { 5657, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a15560009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5657 = VFMSUB213PSZmbk
22259
  { 5658, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e15560009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5658 = VFMSUB213PSZmbkz
22260
  { 5659, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a15560009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5659 = VFMSUB213PSZmk
22261
  { 5660, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e15560009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5660 = VFMSUB213PSZmkz
22262
  { 5661, 4,  1,  0,  0,  0, 0x80815560009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5661 = VFMSUB213PSZr
22263
  { 5662, 5,  1,  0,  0,  0, 0x409815560009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5662 = VFMSUB213PSZrb
22264
  { 5663, 6,  1,  0,  0,  0, 0x409a15560009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5663 = VFMSUB213PSZrbk
22265
  { 5664, 6,  1,  0,  0,  0, 0x409e15560009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5664 = VFMSUB213PSZrbkz
22266
  { 5665, 5,  1,  0,  0,  0, 0x80a15560009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5665 = VFMSUB213PSZrk
22267
  { 5666, 5,  1,  0,  0,  0, 0x80e15560009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5666 = VFMSUB213PSZrkz
22268
  { 5667, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011d5e0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #5667 = VFMSUB213SDm
22269
  { 5668, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011d5e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5668 = VFMSUB213SDm_Int
22270
  { 5669, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031d5e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5669 = VFMSUB213SDm_Intk
22271
  { 5670, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071d5e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5670 = VFMSUB213SDm_Intkz
22272
  { 5671, 4,  1,  0,  0,  0, 0x1011d5e0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #5671 = VFMSUB213SDr
22273
  { 5672, 4,  1,  0,  0,  0, 0x1011d5e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5672 = VFMSUB213SDr_Int
22274
  { 5673, 5,  1,  0,  0,  0, 0x1031d5e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5673 = VFMSUB213SDr_Intk
22275
  { 5674, 5,  1,  0,  0,  0, 0x1071d5e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5674 = VFMSUB213SDr_Intkz
22276
  { 5675, 5,  1,  0,  0,  0, 0x41111d5e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5675 = VFMSUB213SDrb_Int
22277
  { 5676, 6,  1,  0,  0,  0, 0x41131d5e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5676 = VFMSUB213SDrb_Intk
22278
  { 5677, 6,  1,  0,  0,  0, 0x41171d5e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5677 = VFMSUB213SDrb_Intkz
22279
  { 5678, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81155e0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #5678 = VFMSUB213SSm
22280
  { 5679, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81155e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5679 = VFMSUB213SSm_Int
22281
  { 5680, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x83155e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5680 = VFMSUB213SSm_Intk
22282
  { 5681, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x87155e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5681 = VFMSUB213SSm_Intkz
22283
  { 5682, 4,  1,  0,  0,  0, 0x81155e0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #5682 = VFMSUB213SSr
22284
  { 5683, 4,  1,  0,  0,  0, 0x81155e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5683 = VFMSUB213SSr_Int
22285
  { 5684, 5,  1,  0,  0,  0, 0x83155e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5684 = VFMSUB213SSr_Intk
22286
  { 5685, 5,  1,  0,  0,  0, 0x87155e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5685 = VFMSUB213SSr_Intkz
22287
  { 5686, 5,  1,  0,  0,  0, 0x4091155e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5686 = VFMSUB213SSrb_Int
22288
  { 5687, 6,  1,  0,  0,  0, 0x4093155e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5687 = VFMSUB213SSrb_Intk
22289
  { 5688, 6,  1,  0,  0,  0, 0x4097155e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5688 = VFMSUB213SSrb_Intkz
22290
  { 5689, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001dd60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5689 = VFMSUB231PDZ128m
22291
  { 5690, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101dd60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5690 = VFMSUB231PDZ128mb
22292
  { 5691, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121dd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5691 = VFMSUB231PDZ128mbk
22293
  { 5692, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161dd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5692 = VFMSUB231PDZ128mbkz
22294
  { 5693, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021dd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5693 = VFMSUB231PDZ128mk
22295
  { 5694, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061dd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5694 = VFMSUB231PDZ128mkz
22296
  { 5695, 4,  1,  0,  0,  0, 0x2001dd60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5695 = VFMSUB231PDZ128r
22297
  { 5696, 5,  1,  0,  0,  0, 0x2021dd60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5696 = VFMSUB231PDZ128rk
22298
  { 5697, 5,  1,  0,  0,  0, 0x2061dd60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5697 = VFMSUB231PDZ128rkz
22299
  { 5698, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009dd60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5698 = VFMSUB231PDZ256m
22300
  { 5699, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109dd60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5699 = VFMSUB231PDZ256mb
22301
  { 5700, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129dd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5700 = VFMSUB231PDZ256mbk
22302
  { 5701, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169dd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5701 = VFMSUB231PDZ256mbkz
22303
  { 5702, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029dd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5702 = VFMSUB231PDZ256mk
22304
  { 5703, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069dd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5703 = VFMSUB231PDZ256mkz
22305
  { 5704, 4,  1,  0,  0,  0, 0x4009dd60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5704 = VFMSUB231PDZ256r
22306
  { 5705, 5,  1,  0,  0,  0, 0x4029dd60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5705 = VFMSUB231PDZ256rk
22307
  { 5706, 5,  1,  0,  0,  0, 0x4069dd60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5706 = VFMSUB231PDZ256rkz
22308
  { 5707, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081dd60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5707 = VFMSUB231PDZm
22309
  { 5708, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181dd60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5708 = VFMSUB231PDZmb
22310
  { 5709, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1dd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5709 = VFMSUB231PDZmbk
22311
  { 5710, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1dd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5710 = VFMSUB231PDZmbkz
22312
  { 5711, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1dd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5711 = VFMSUB231PDZmk
22313
  { 5712, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1dd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5712 = VFMSUB231PDZmkz
22314
  { 5713, 4,  1,  0,  0,  0, 0x8081dd60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5713 = VFMSUB231PDZr
22315
  { 5714, 5,  1,  0,  0,  0, 0x41181dd60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5714 = VFMSUB231PDZrb
22316
  { 5715, 6,  1,  0,  0,  0, 0x411a1dd60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5715 = VFMSUB231PDZrbk
22317
  { 5716, 6,  1,  0,  0,  0, 0x411e1dd60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5716 = VFMSUB231PDZrbkz
22318
  { 5717, 5,  1,  0,  0,  0, 0x80a1dd60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5717 = VFMSUB231PDZrk
22319
  { 5718, 5,  1,  0,  0,  0, 0x80e1dd60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5718 = VFMSUB231PDZrkz
22320
  { 5719, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20015d60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5719 = VFMSUB231PSZ128m
22321
  { 5720, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9015d60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5720 = VFMSUB231PSZ128mb
22322
  { 5721, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9215d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5721 = VFMSUB231PSZ128mbk
22323
  { 5722, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9615d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5722 = VFMSUB231PSZ128mbkz
22324
  { 5723, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20215d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5723 = VFMSUB231PSZ128mk
22325
  { 5724, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20615d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5724 = VFMSUB231PSZ128mkz
22326
  { 5725, 4,  1,  0,  0,  0, 0x20015d60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5725 = VFMSUB231PSZ128r
22327
  { 5726, 5,  1,  0,  0,  0, 0x20215d60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5726 = VFMSUB231PSZ128rk
22328
  { 5727, 5,  1,  0,  0,  0, 0x20615d60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5727 = VFMSUB231PSZ128rkz
22329
  { 5728, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40095d60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5728 = VFMSUB231PSZ256m
22330
  { 5729, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9095d60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5729 = VFMSUB231PSZ256mb
22331
  { 5730, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9295d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5730 = VFMSUB231PSZ256mbk
22332
  { 5731, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9695d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5731 = VFMSUB231PSZ256mbkz
22333
  { 5732, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40295d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5732 = VFMSUB231PSZ256mk
22334
  { 5733, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40695d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5733 = VFMSUB231PSZ256mkz
22335
  { 5734, 4,  1,  0,  0,  0, 0x40095d60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5734 = VFMSUB231PSZ256r
22336
  { 5735, 5,  1,  0,  0,  0, 0x40295d60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5735 = VFMSUB231PSZ256rk
22337
  { 5736, 5,  1,  0,  0,  0, 0x40695d60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5736 = VFMSUB231PSZ256rkz
22338
  { 5737, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80815d60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5737 = VFMSUB231PSZm
22339
  { 5738, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9815d60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5738 = VFMSUB231PSZmb
22340
  { 5739, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a15d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5739 = VFMSUB231PSZmbk
22341
  { 5740, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e15d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5740 = VFMSUB231PSZmbkz
22342
  { 5741, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a15d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5741 = VFMSUB231PSZmk
22343
  { 5742, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e15d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5742 = VFMSUB231PSZmkz
22344
  { 5743, 4,  1,  0,  0,  0, 0x80815d60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5743 = VFMSUB231PSZr
22345
  { 5744, 5,  1,  0,  0,  0, 0x409815d60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5744 = VFMSUB231PSZrb
22346
  { 5745, 6,  1,  0,  0,  0, 0x409a15d60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5745 = VFMSUB231PSZrbk
22347
  { 5746, 6,  1,  0,  0,  0, 0x409e15d60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5746 = VFMSUB231PSZrbkz
22348
  { 5747, 5,  1,  0,  0,  0, 0x80a15d60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5747 = VFMSUB231PSZrk
22349
  { 5748, 5,  1,  0,  0,  0, 0x80e15d60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5748 = VFMSUB231PSZrkz
22350
  { 5749, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011dde0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #5749 = VFMSUB231SDm
22351
  { 5750, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011dde0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5750 = VFMSUB231SDm_Int
22352
  { 5751, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031dde0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5751 = VFMSUB231SDm_Intk
22353
  { 5752, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071dde0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5752 = VFMSUB231SDm_Intkz
22354
  { 5753, 4,  1,  0,  0,  0, 0x1011dde0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #5753 = VFMSUB231SDr
22355
  { 5754, 4,  1,  0,  0,  0, 0x1011dde0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5754 = VFMSUB231SDr_Int
22356
  { 5755, 5,  1,  0,  0,  0, 0x1031dde0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5755 = VFMSUB231SDr_Intk
22357
  { 5756, 5,  1,  0,  0,  0, 0x1071dde0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5756 = VFMSUB231SDr_Intkz
22358
  { 5757, 5,  1,  0,  0,  0, 0x41111dde0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5757 = VFMSUB231SDrb_Int
22359
  { 5758, 6,  1,  0,  0,  0, 0x41131dde0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5758 = VFMSUB231SDrb_Intk
22360
  { 5759, 6,  1,  0,  0,  0, 0x41171dde0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5759 = VFMSUB231SDrb_Intkz
22361
  { 5760, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8115de0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #5760 = VFMSUB231SSm
22362
  { 5761, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8115de0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5761 = VFMSUB231SSm_Int
22363
  { 5762, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8315de0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5762 = VFMSUB231SSm_Intk
22364
  { 5763, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8715de0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #5763 = VFMSUB231SSm_Intkz
22365
  { 5764, 4,  1,  0,  0,  0, 0x8115de0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #5764 = VFMSUB231SSr
22366
  { 5765, 4,  1,  0,  0,  0, 0x8115de0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5765 = VFMSUB231SSr_Int
22367
  { 5766, 5,  1,  0,  0,  0, 0x8315de0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5766 = VFMSUB231SSr_Intk
22368
  { 5767, 5,  1,  0,  0,  0, 0x8715de0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #5767 = VFMSUB231SSr_Intkz
22369
  { 5768, 5,  1,  0,  0,  0, 0x409115de0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #5768 = VFMSUB231SSrb_Int
22370
  { 5769, 6,  1,  0,  0,  0, 0x409315de0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5769 = VFMSUB231SSrb_Intk
22371
  { 5770, 6,  1,  0,  0,  0, 0x409715de0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #5770 = VFMSUB231SSrb_Intkz
22372
  { 5771, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001cbe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5771 = VFMSUBADD132PDZ128m
22373
  { 5772, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101cbe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5772 = VFMSUBADD132PDZ128mb
22374
  { 5773, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121cbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5773 = VFMSUBADD132PDZ128mbk
22375
  { 5774, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161cbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5774 = VFMSUBADD132PDZ128mbkz
22376
  { 5775, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021cbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5775 = VFMSUBADD132PDZ128mk
22377
  { 5776, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061cbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5776 = VFMSUBADD132PDZ128mkz
22378
  { 5777, 4,  1,  0,  0,  0, 0x2001cbe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5777 = VFMSUBADD132PDZ128r
22379
  { 5778, 5,  1,  0,  0,  0, 0x2021cbe0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5778 = VFMSUBADD132PDZ128rk
22380
  { 5779, 5,  1,  0,  0,  0, 0x2061cbe0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5779 = VFMSUBADD132PDZ128rkz
22381
  { 5780, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009cbe0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5780 = VFMSUBADD132PDZ256m
22382
  { 5781, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109cbe0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5781 = VFMSUBADD132PDZ256mb
22383
  { 5782, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129cbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5782 = VFMSUBADD132PDZ256mbk
22384
  { 5783, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169cbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5783 = VFMSUBADD132PDZ256mbkz
22385
  { 5784, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029cbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5784 = VFMSUBADD132PDZ256mk
22386
  { 5785, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069cbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5785 = VFMSUBADD132PDZ256mkz
22387
  { 5786, 4,  1,  0,  0,  0, 0x4009cbe0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5786 = VFMSUBADD132PDZ256r
22388
  { 5787, 5,  1,  0,  0,  0, 0x4029cbe0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5787 = VFMSUBADD132PDZ256rk
22389
  { 5788, 5,  1,  0,  0,  0, 0x4069cbe0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5788 = VFMSUBADD132PDZ256rkz
22390
  { 5789, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081cbe0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5789 = VFMSUBADD132PDZm
22391
  { 5790, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181cbe0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5790 = VFMSUBADD132PDZmb
22392
  { 5791, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1cbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5791 = VFMSUBADD132PDZmbk
22393
  { 5792, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1cbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5792 = VFMSUBADD132PDZmbkz
22394
  { 5793, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1cbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5793 = VFMSUBADD132PDZmk
22395
  { 5794, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1cbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5794 = VFMSUBADD132PDZmkz
22396
  { 5795, 4,  1,  0,  0,  0, 0x8081cbe0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5795 = VFMSUBADD132PDZr
22397
  { 5796, 5,  1,  0,  0,  0, 0x41181cbe0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5796 = VFMSUBADD132PDZrb
22398
  { 5797, 6,  1,  0,  0,  0, 0x411a1cbe0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5797 = VFMSUBADD132PDZrbk
22399
  { 5798, 6,  1,  0,  0,  0, 0x411e1cbe0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5798 = VFMSUBADD132PDZrbkz
22400
  { 5799, 5,  1,  0,  0,  0, 0x80a1cbe0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5799 = VFMSUBADD132PDZrk
22401
  { 5800, 5,  1,  0,  0,  0, 0x80e1cbe0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5800 = VFMSUBADD132PDZrkz
22402
  { 5801, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20014be0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5801 = VFMSUBADD132PSZ128m
22403
  { 5802, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9014be0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5802 = VFMSUBADD132PSZ128mb
22404
  { 5803, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9214be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5803 = VFMSUBADD132PSZ128mbk
22405
  { 5804, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9614be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5804 = VFMSUBADD132PSZ128mbkz
22406
  { 5805, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20214be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5805 = VFMSUBADD132PSZ128mk
22407
  { 5806, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20614be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5806 = VFMSUBADD132PSZ128mkz
22408
  { 5807, 4,  1,  0,  0,  0, 0x20014be0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5807 = VFMSUBADD132PSZ128r
22409
  { 5808, 5,  1,  0,  0,  0, 0x20214be0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5808 = VFMSUBADD132PSZ128rk
22410
  { 5809, 5,  1,  0,  0,  0, 0x20614be0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5809 = VFMSUBADD132PSZ128rkz
22411
  { 5810, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40094be0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5810 = VFMSUBADD132PSZ256m
22412
  { 5811, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9094be0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5811 = VFMSUBADD132PSZ256mb
22413
  { 5812, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9294be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5812 = VFMSUBADD132PSZ256mbk
22414
  { 5813, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9694be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5813 = VFMSUBADD132PSZ256mbkz
22415
  { 5814, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40294be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5814 = VFMSUBADD132PSZ256mk
22416
  { 5815, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40694be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5815 = VFMSUBADD132PSZ256mkz
22417
  { 5816, 4,  1,  0,  0,  0, 0x40094be0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5816 = VFMSUBADD132PSZ256r
22418
  { 5817, 5,  1,  0,  0,  0, 0x40294be0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5817 = VFMSUBADD132PSZ256rk
22419
  { 5818, 5,  1,  0,  0,  0, 0x40694be0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5818 = VFMSUBADD132PSZ256rkz
22420
  { 5819, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80814be0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5819 = VFMSUBADD132PSZm
22421
  { 5820, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9814be0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5820 = VFMSUBADD132PSZmb
22422
  { 5821, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a14be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5821 = VFMSUBADD132PSZmbk
22423
  { 5822, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e14be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5822 = VFMSUBADD132PSZmbkz
22424
  { 5823, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a14be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5823 = VFMSUBADD132PSZmk
22425
  { 5824, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e14be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5824 = VFMSUBADD132PSZmkz
22426
  { 5825, 4,  1,  0,  0,  0, 0x80814be0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5825 = VFMSUBADD132PSZr
22427
  { 5826, 5,  1,  0,  0,  0, 0x409814be0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5826 = VFMSUBADD132PSZrb
22428
  { 5827, 6,  1,  0,  0,  0, 0x409a14be0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5827 = VFMSUBADD132PSZrbk
22429
  { 5828, 6,  1,  0,  0,  0, 0x409e14be0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5828 = VFMSUBADD132PSZrbkz
22430
  { 5829, 5,  1,  0,  0,  0, 0x80a14be0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5829 = VFMSUBADD132PSZrk
22431
  { 5830, 5,  1,  0,  0,  0, 0x80e14be0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5830 = VFMSUBADD132PSZrkz
22432
  { 5831, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001d3e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5831 = VFMSUBADD213PDZ128m
22433
  { 5832, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101d3e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5832 = VFMSUBADD213PDZ128mb
22434
  { 5833, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121d3e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5833 = VFMSUBADD213PDZ128mbk
22435
  { 5834, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161d3e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5834 = VFMSUBADD213PDZ128mbkz
22436
  { 5835, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021d3e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5835 = VFMSUBADD213PDZ128mk
22437
  { 5836, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061d3e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5836 = VFMSUBADD213PDZ128mkz
22438
  { 5837, 4,  1,  0,  0,  0, 0x2001d3e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5837 = VFMSUBADD213PDZ128r
22439
  { 5838, 5,  1,  0,  0,  0, 0x2021d3e0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5838 = VFMSUBADD213PDZ128rk
22440
  { 5839, 5,  1,  0,  0,  0, 0x2061d3e0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5839 = VFMSUBADD213PDZ128rkz
22441
  { 5840, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009d3e0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5840 = VFMSUBADD213PDZ256m
22442
  { 5841, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109d3e0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5841 = VFMSUBADD213PDZ256mb
22443
  { 5842, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129d3e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5842 = VFMSUBADD213PDZ256mbk
22444
  { 5843, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169d3e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5843 = VFMSUBADD213PDZ256mbkz
22445
  { 5844, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029d3e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5844 = VFMSUBADD213PDZ256mk
22446
  { 5845, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069d3e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5845 = VFMSUBADD213PDZ256mkz
22447
  { 5846, 4,  1,  0,  0,  0, 0x4009d3e0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5846 = VFMSUBADD213PDZ256r
22448
  { 5847, 5,  1,  0,  0,  0, 0x4029d3e0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5847 = VFMSUBADD213PDZ256rk
22449
  { 5848, 5,  1,  0,  0,  0, 0x4069d3e0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5848 = VFMSUBADD213PDZ256rkz
22450
  { 5849, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081d3e0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5849 = VFMSUBADD213PDZm
22451
  { 5850, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181d3e0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5850 = VFMSUBADD213PDZmb
22452
  { 5851, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1d3e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5851 = VFMSUBADD213PDZmbk
22453
  { 5852, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1d3e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5852 = VFMSUBADD213PDZmbkz
22454
  { 5853, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1d3e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5853 = VFMSUBADD213PDZmk
22455
  { 5854, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1d3e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5854 = VFMSUBADD213PDZmkz
22456
  { 5855, 4,  1,  0,  0,  0, 0x8081d3e0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5855 = VFMSUBADD213PDZr
22457
  { 5856, 5,  1,  0,  0,  0, 0x41181d3e0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5856 = VFMSUBADD213PDZrb
22458
  { 5857, 6,  1,  0,  0,  0, 0x411a1d3e0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5857 = VFMSUBADD213PDZrbk
22459
  { 5858, 6,  1,  0,  0,  0, 0x411e1d3e0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5858 = VFMSUBADD213PDZrbkz
22460
  { 5859, 5,  1,  0,  0,  0, 0x80a1d3e0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5859 = VFMSUBADD213PDZrk
22461
  { 5860, 5,  1,  0,  0,  0, 0x80e1d3e0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5860 = VFMSUBADD213PDZrkz
22462
  { 5861, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200153e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5861 = VFMSUBADD213PSZ128m
22463
  { 5862, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90153e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5862 = VFMSUBADD213PSZ128mb
22464
  { 5863, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92153e0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5863 = VFMSUBADD213PSZ128mbk
22465
  { 5864, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96153e0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5864 = VFMSUBADD213PSZ128mbkz
22466
  { 5865, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202153e0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5865 = VFMSUBADD213PSZ128mk
22467
  { 5866, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206153e0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5866 = VFMSUBADD213PSZ128mkz
22468
  { 5867, 4,  1,  0,  0,  0, 0x200153e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5867 = VFMSUBADD213PSZ128r
22469
  { 5868, 5,  1,  0,  0,  0, 0x202153e0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5868 = VFMSUBADD213PSZ128rk
22470
  { 5869, 5,  1,  0,  0,  0, 0x206153e0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5869 = VFMSUBADD213PSZ128rkz
22471
  { 5870, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400953e0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5870 = VFMSUBADD213PSZ256m
22472
  { 5871, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90953e0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5871 = VFMSUBADD213PSZ256mb
22473
  { 5872, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92953e0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5872 = VFMSUBADD213PSZ256mbk
22474
  { 5873, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96953e0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5873 = VFMSUBADD213PSZ256mbkz
22475
  { 5874, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402953e0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5874 = VFMSUBADD213PSZ256mk
22476
  { 5875, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406953e0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5875 = VFMSUBADD213PSZ256mkz
22477
  { 5876, 4,  1,  0,  0,  0, 0x400953e0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5876 = VFMSUBADD213PSZ256r
22478
  { 5877, 5,  1,  0,  0,  0, 0x402953e0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5877 = VFMSUBADD213PSZ256rk
22479
  { 5878, 5,  1,  0,  0,  0, 0x406953e0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5878 = VFMSUBADD213PSZ256rkz
22480
  { 5879, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808153e0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5879 = VFMSUBADD213PSZm
22481
  { 5880, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98153e0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5880 = VFMSUBADD213PSZmb
22482
  { 5881, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a153e0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5881 = VFMSUBADD213PSZmbk
22483
  { 5882, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e153e0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5882 = VFMSUBADD213PSZmbkz
22484
  { 5883, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a153e0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5883 = VFMSUBADD213PSZmk
22485
  { 5884, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e153e0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5884 = VFMSUBADD213PSZmkz
22486
  { 5885, 4,  1,  0,  0,  0, 0x808153e0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5885 = VFMSUBADD213PSZr
22487
  { 5886, 5,  1,  0,  0,  0, 0x4098153e0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5886 = VFMSUBADD213PSZrb
22488
  { 5887, 6,  1,  0,  0,  0, 0x409a153e0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5887 = VFMSUBADD213PSZrbk
22489
  { 5888, 6,  1,  0,  0,  0, 0x409e153e0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5888 = VFMSUBADD213PSZrbkz
22490
  { 5889, 5,  1,  0,  0,  0, 0x80a153e0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5889 = VFMSUBADD213PSZrk
22491
  { 5890, 5,  1,  0,  0,  0, 0x80e153e0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5890 = VFMSUBADD213PSZrkz
22492
  { 5891, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001dbe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5891 = VFMSUBADD231PDZ128m
22493
  { 5892, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101dbe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5892 = VFMSUBADD231PDZ128mb
22494
  { 5893, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121dbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5893 = VFMSUBADD231PDZ128mbk
22495
  { 5894, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161dbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5894 = VFMSUBADD231PDZ128mbkz
22496
  { 5895, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021dbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5895 = VFMSUBADD231PDZ128mk
22497
  { 5896, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061dbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #5896 = VFMSUBADD231PDZ128mkz
22498
  { 5897, 4,  1,  0,  0,  0, 0x2001dbe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5897 = VFMSUBADD231PDZ128r
22499
  { 5898, 5,  1,  0,  0,  0, 0x2021dbe0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5898 = VFMSUBADD231PDZ128rk
22500
  { 5899, 5,  1,  0,  0,  0, 0x2061dbe0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #5899 = VFMSUBADD231PDZ128rkz
22501
  { 5900, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009dbe0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5900 = VFMSUBADD231PDZ256m
22502
  { 5901, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109dbe0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5901 = VFMSUBADD231PDZ256mb
22503
  { 5902, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129dbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5902 = VFMSUBADD231PDZ256mbk
22504
  { 5903, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169dbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5903 = VFMSUBADD231PDZ256mbkz
22505
  { 5904, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029dbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5904 = VFMSUBADD231PDZ256mk
22506
  { 5905, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069dbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #5905 = VFMSUBADD231PDZ256mkz
22507
  { 5906, 4,  1,  0,  0,  0, 0x4009dbe0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5906 = VFMSUBADD231PDZ256r
22508
  { 5907, 5,  1,  0,  0,  0, 0x4029dbe0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5907 = VFMSUBADD231PDZ256rk
22509
  { 5908, 5,  1,  0,  0,  0, 0x4069dbe0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #5908 = VFMSUBADD231PDZ256rkz
22510
  { 5909, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081dbe0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5909 = VFMSUBADD231PDZm
22511
  { 5910, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181dbe0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5910 = VFMSUBADD231PDZmb
22512
  { 5911, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1dbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5911 = VFMSUBADD231PDZmbk
22513
  { 5912, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1dbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5912 = VFMSUBADD231PDZmbkz
22514
  { 5913, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1dbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5913 = VFMSUBADD231PDZmk
22515
  { 5914, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1dbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #5914 = VFMSUBADD231PDZmkz
22516
  { 5915, 4,  1,  0,  0,  0, 0x8081dbe0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5915 = VFMSUBADD231PDZr
22517
  { 5916, 5,  1,  0,  0,  0, 0x41181dbe0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5916 = VFMSUBADD231PDZrb
22518
  { 5917, 6,  1,  0,  0,  0, 0x411a1dbe0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5917 = VFMSUBADD231PDZrbk
22519
  { 5918, 6,  1,  0,  0,  0, 0x411e1dbe0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #5918 = VFMSUBADD231PDZrbkz
22520
  { 5919, 5,  1,  0,  0,  0, 0x80a1dbe0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5919 = VFMSUBADD231PDZrk
22521
  { 5920, 5,  1,  0,  0,  0, 0x80e1dbe0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #5920 = VFMSUBADD231PDZrkz
22522
  { 5921, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20015be0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5921 = VFMSUBADD231PSZ128m
22523
  { 5922, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9015be0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #5922 = VFMSUBADD231PSZ128mb
22524
  { 5923, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9215be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5923 = VFMSUBADD231PSZ128mbk
22525
  { 5924, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9615be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5924 = VFMSUBADD231PSZ128mbkz
22526
  { 5925, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20215be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5925 = VFMSUBADD231PSZ128mk
22527
  { 5926, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20615be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #5926 = VFMSUBADD231PSZ128mkz
22528
  { 5927, 4,  1,  0,  0,  0, 0x20015be0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #5927 = VFMSUBADD231PSZ128r
22529
  { 5928, 5,  1,  0,  0,  0, 0x20215be0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5928 = VFMSUBADD231PSZ128rk
22530
  { 5929, 5,  1,  0,  0,  0, 0x20615be0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #5929 = VFMSUBADD231PSZ128rkz
22531
  { 5930, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40095be0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5930 = VFMSUBADD231PSZ256m
22532
  { 5931, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9095be0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #5931 = VFMSUBADD231PSZ256mb
22533
  { 5932, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9295be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5932 = VFMSUBADD231PSZ256mbk
22534
  { 5933, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9695be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5933 = VFMSUBADD231PSZ256mbkz
22535
  { 5934, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40295be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5934 = VFMSUBADD231PSZ256mk
22536
  { 5935, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40695be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #5935 = VFMSUBADD231PSZ256mkz
22537
  { 5936, 4,  1,  0,  0,  0, 0x40095be0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #5936 = VFMSUBADD231PSZ256r
22538
  { 5937, 5,  1,  0,  0,  0, 0x40295be0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5937 = VFMSUBADD231PSZ256rk
22539
  { 5938, 5,  1,  0,  0,  0, 0x40695be0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #5938 = VFMSUBADD231PSZ256rkz
22540
  { 5939, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80815be0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5939 = VFMSUBADD231PSZm
22541
  { 5940, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9815be0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #5940 = VFMSUBADD231PSZmb
22542
  { 5941, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a15be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5941 = VFMSUBADD231PSZmbk
22543
  { 5942, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e15be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5942 = VFMSUBADD231PSZmbkz
22544
  { 5943, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a15be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5943 = VFMSUBADD231PSZmk
22545
  { 5944, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e15be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #5944 = VFMSUBADD231PSZmkz
22546
  { 5945, 4,  1,  0,  0,  0, 0x80815be0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #5945 = VFMSUBADD231PSZr
22547
  { 5946, 5,  1,  0,  0,  0, 0x409815be0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #5946 = VFMSUBADD231PSZrb
22548
  { 5947, 6,  1,  0,  0,  0, 0x409a15be0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5947 = VFMSUBADD231PSZrbk
22549
  { 5948, 6,  1,  0,  0,  0, 0x409e15be0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #5948 = VFMSUBADD231PSZrbkz
22550
  { 5949, 5,  1,  0,  0,  0, 0x80a15be0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5949 = VFMSUBADD231PSZrk
22551
  { 5950, 5,  1,  0,  0,  0, 0x80e15be0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #5950 = VFMSUBADD231PSZrkz
22552
  { 5951, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x52fb004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #5951 = VFMSUBADDPD4mr
22553
  { 5952, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0xd2fb004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #5952 = VFMSUBADDPD4mrY
22554
  { 5953, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20005afb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #5953 = VFMSUBADDPD4rm
22555
  { 5954, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000dafb004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #5954 = VFMSUBADDPD4rmY
22556
  { 5955, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20005afb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5955 = VFMSUBADDPD4rr
22557
  { 5956, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x2000dafb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5956 = VFMSUBADDPD4rrY
22558
  { 5957, 4,  1,  0,  0,  0, 0xd2fb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5957 = VFMSUBADDPD4rrY_REV
22559
  { 5958, 4,  1,  0,  0,  0, 0x52fb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5958 = VFMSUBADDPD4rr_REV
22560
  { 5959, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1cbb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5959 = VFMSUBADDPDr132m
22561
  { 5960, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9cbb0009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5960 = VFMSUBADDPDr132mY
22562
  { 5961, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1cbb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5961 = VFMSUBADDPDr132r
22563
  { 5962, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9cbb0009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5962 = VFMSUBADDPDr132rY
22564
  { 5963, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d3b0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5963 = VFMSUBADDPDr213m
22565
  { 5964, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d3b0009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5964 = VFMSUBADDPDr213mY
22566
  { 5965, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d3b0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5965 = VFMSUBADDPDr213r
22567
  { 5966, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d3b0009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5966 = VFMSUBADDPDr213rY
22568
  { 5967, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1dbb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5967 = VFMSUBADDPDr231m
22569
  { 5968, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9dbb0009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5968 = VFMSUBADDPDr231mY
22570
  { 5969, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1dbb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5969 = VFMSUBADDPDr231r
22571
  { 5970, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9dbb0009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5970 = VFMSUBADDPDr231rY
22572
  { 5971, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x52f2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #5971 = VFMSUBADDPS4mr
22573
  { 5972, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0xd2f2804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #5972 = VFMSUBADDPS4mrY
22574
  { 5973, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20005af2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #5973 = VFMSUBADDPS4rm
22575
  { 5974, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000daf2804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #5974 = VFMSUBADDPS4rmY
22576
  { 5975, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20005af2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5975 = VFMSUBADDPS4rr
22577
  { 5976, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x2000daf2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5976 = VFMSUBADDPS4rrY
22578
  { 5977, 4,  1,  0,  0,  0, 0xd2f2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5977 = VFMSUBADDPS4rrY_REV
22579
  { 5978, 4,  1,  0,  0,  0, 0x52f2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5978 = VFMSUBADDPS4rr_REV
22580
  { 5979, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14ba8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5979 = VFMSUBADDPSr132m
22581
  { 5980, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94ba8009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5980 = VFMSUBADDPSr132mY
22582
  { 5981, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14ba8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5981 = VFMSUBADDPSr132r
22583
  { 5982, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94ba8009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5982 = VFMSUBADDPSr132rY
22584
  { 5983, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x153a8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5983 = VFMSUBADDPSr213m
22585
  { 5984, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x953a8009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5984 = VFMSUBADDPSr213mY
22586
  { 5985, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x153a8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5985 = VFMSUBADDPSr213r
22587
  { 5986, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x953a8009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5986 = VFMSUBADDPSr213rY
22588
  { 5987, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15ba8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5987 = VFMSUBADDPSr231m
22589
  { 5988, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95ba8009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #5988 = VFMSUBADDPSr231mY
22590
  { 5989, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15ba8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #5989 = VFMSUBADDPSr231r
22591
  { 5990, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95ba8009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #5990 = VFMSUBADDPSr231rY
22592
  { 5991, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x536b004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #5991 = VFMSUBPD4mr
22593
  { 5992, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0xd36b004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #5992 = VFMSUBPD4mrY
22594
  { 5993, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20005b6b004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #5993 = VFMSUBPD4rm
22595
  { 5994, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x2000db6b004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #5994 = VFMSUBPD4rmY
22596
  { 5995, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20005b6b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5995 = VFMSUBPD4rr
22597
  { 5996, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x2000db6b004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5996 = VFMSUBPD4rrY
22598
  { 5997, 4,  1,  0,  926,  0, 0xd36b004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #5997 = VFMSUBPD4rrY_REV
22599
  { 5998, 4,  1,  0,  926,  0, 0x536b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #5998 = VFMSUBPD4rr_REV
22600
  { 5999, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1cd30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #5999 = VFMSUBPDr132m
22601
  { 6000, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9cd30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6000 = VFMSUBPDr132mY
22602
  { 6001, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1cd30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6001 = VFMSUBPDr132r
22603
  { 6002, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9cd30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6002 = VFMSUBPDr132rY
22604
  { 6003, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d530009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6003 = VFMSUBPDr213m
22605
  { 6004, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d530009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6004 = VFMSUBPDr213mY
22606
  { 6005, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d530009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6005 = VFMSUBPDr213r
22607
  { 6006, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d530009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6006 = VFMSUBPDr213rY
22608
  { 6007, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1dd30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6007 = VFMSUBPDr231m
22609
  { 6008, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9dd30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6008 = VFMSUBPDr231mY
22610
  { 6009, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1dd30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6009 = VFMSUBPDr231r
22611
  { 6010, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9dd30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6010 = VFMSUBPDr231rY
22612
  { 6011, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x5362804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #6011 = VFMSUBPS4mr
22613
  { 6012, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0xd362804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #6012 = VFMSUBPS4mrY
22614
  { 6013, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20005b62804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #6013 = VFMSUBPS4rm
22615
  { 6014, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x2000db62804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #6014 = VFMSUBPS4rmY
22616
  { 6015, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20005b62804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6015 = VFMSUBPS4rr
22617
  { 6016, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x2000db62804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #6016 = VFMSUBPS4rrY
22618
  { 6017, 4,  1,  0,  926,  0, 0xd362804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #6017 = VFMSUBPS4rrY_REV
22619
  { 6018, 4,  1,  0,  926,  0, 0x5362804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6018 = VFMSUBPS4rr_REV
22620
  { 6019, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14d28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6019 = VFMSUBPSr132m
22621
  { 6020, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94d28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6020 = VFMSUBPSr132mY
22622
  { 6021, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14d28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6021 = VFMSUBPSr132r
22623
  { 6022, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94d28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6022 = VFMSUBPSr132rY
22624
  { 6023, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15528009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6023 = VFMSUBPSr213m
22625
  { 6024, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95528009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6024 = VFMSUBPSr213mY
22626
  { 6025, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15528009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6025 = VFMSUBPSr213r
22627
  { 6026, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95528009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6026 = VFMSUBPSr213rY
22628
  { 6027, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15d28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6027 = VFMSUBPSr231m
22629
  { 6028, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95d28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6028 = VFMSUBPSr231mY
22630
  { 6029, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15d28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6029 = VFMSUBPSr231r
22631
  { 6030, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95d28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6030 = VFMSUBPSr231rY
22632
  { 6031, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x1537b004d006ULL, nullptr, nullptr, OperandInfo556, -1 ,nullptr },  // Inst #6031 = VFMSUBSD4mr
22633
  { 6032, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x1537b004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #6032 = VFMSUBSD4mr_Int
22634
  { 6033, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015b7b004d006ULL, nullptr, nullptr, OperandInfo557, -1 ,nullptr },  // Inst #6033 = VFMSUBSD4rm
22635
  { 6034, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015b7b004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #6034 = VFMSUBSD4rm_Int
22636
  { 6035, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015b7b004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr },  // Inst #6035 = VFMSUBSD4rr
22637
  { 6036, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015b7b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6036 = VFMSUBSD4rr_Int
22638
  { 6037, 4,  1,  0,  926,  0, 0x1537b004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr },  // Inst #6037 = VFMSUBSD4rr_REV
22639
  { 6038, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11cdb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #6038 = VFMSUBSDr132m
22640
  { 6039, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11cdb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6039 = VFMSUBSDr132m_Int
22641
  { 6040, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11cdb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #6040 = VFMSUBSDr132r
22642
  { 6041, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11cdb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6041 = VFMSUBSDr132r_Int
22643
  { 6042, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d5b0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #6042 = VFMSUBSDr213m
22644
  { 6043, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d5b0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6043 = VFMSUBSDr213m_Int
22645
  { 6044, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11d5b0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #6044 = VFMSUBSDr213r
22646
  { 6045, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11d5b0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6045 = VFMSUBSDr213r_Int
22647
  { 6046, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ddb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #6046 = VFMSUBSDr231m
22648
  { 6047, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ddb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6047 = VFMSUBSDr231m_Int
22649
  { 6048, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11ddb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #6048 = VFMSUBSDr231r
22650
  { 6049, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11ddb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6049 = VFMSUBSDr231r_Int
22651
  { 6050, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x15372804d006ULL, nullptr, nullptr, OperandInfo561, -1 ,nullptr },  // Inst #6050 = VFMSUBSS4mr
22652
  { 6051, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x15372804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #6051 = VFMSUBSS4mr_Int
22653
  { 6052, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015b72804d006ULL, nullptr, nullptr, OperandInfo562, -1 ,nullptr },  // Inst #6052 = VFMSUBSS4rm
22654
  { 6053, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015b72804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #6053 = VFMSUBSS4rm_Int
22655
  { 6054, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015b72804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr },  // Inst #6054 = VFMSUBSS4rr
22656
  { 6055, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015b72804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6055 = VFMSUBSS4rr_Int
22657
  { 6056, 4,  1,  0,  926,  0, 0x15372804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr },  // Inst #6056 = VFMSUBSS4rr_REV
22658
  { 6057, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114da8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #6057 = VFMSUBSSr132m
22659
  { 6058, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114da8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6058 = VFMSUBSSr132m_Int
22660
  { 6059, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x114da8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #6059 = VFMSUBSSr132r
22661
  { 6060, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x114da8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6060 = VFMSUBSSr132r_Int
22662
  { 6061, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1155a8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #6061 = VFMSUBSSr213m
22663
  { 6062, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1155a8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6062 = VFMSUBSSr213m_Int
22664
  { 6063, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1155a8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #6063 = VFMSUBSSr213r
22665
  { 6064, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x1155a8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6064 = VFMSUBSSr213r_Int
22666
  { 6065, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115da8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #6065 = VFMSUBSSr231m
22667
  { 6066, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115da8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6066 = VFMSUBSSr231m_Int
22668
  { 6067, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x115da8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #6067 = VFMSUBSSr231r
22669
  { 6068, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x115da8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6068 = VFMSUBSSr231r_Int
22670
  { 6069, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001ce60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6069 = VFNMADD132PDZ128m
22671
  { 6070, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101ce60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6070 = VFNMADD132PDZ128mb
22672
  { 6071, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121ce60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6071 = VFNMADD132PDZ128mbk
22673
  { 6072, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161ce60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6072 = VFNMADD132PDZ128mbkz
22674
  { 6073, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021ce60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6073 = VFNMADD132PDZ128mk
22675
  { 6074, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061ce60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6074 = VFNMADD132PDZ128mkz
22676
  { 6075, 4,  1,  0,  0,  0, 0x2001ce60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6075 = VFNMADD132PDZ128r
22677
  { 6076, 5,  1,  0,  0,  0, 0x2021ce60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6076 = VFNMADD132PDZ128rk
22678
  { 6077, 5,  1,  0,  0,  0, 0x2061ce60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6077 = VFNMADD132PDZ128rkz
22679
  { 6078, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009ce60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6078 = VFNMADD132PDZ256m
22680
  { 6079, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109ce60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6079 = VFNMADD132PDZ256mb
22681
  { 6080, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129ce60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6080 = VFNMADD132PDZ256mbk
22682
  { 6081, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169ce60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6081 = VFNMADD132PDZ256mbkz
22683
  { 6082, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029ce60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6082 = VFNMADD132PDZ256mk
22684
  { 6083, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069ce60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6083 = VFNMADD132PDZ256mkz
22685
  { 6084, 4,  1,  0,  0,  0, 0x4009ce60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6084 = VFNMADD132PDZ256r
22686
  { 6085, 5,  1,  0,  0,  0, 0x4029ce60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6085 = VFNMADD132PDZ256rk
22687
  { 6086, 5,  1,  0,  0,  0, 0x4069ce60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6086 = VFNMADD132PDZ256rkz
22688
  { 6087, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081ce60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6087 = VFNMADD132PDZm
22689
  { 6088, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181ce60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6088 = VFNMADD132PDZmb
22690
  { 6089, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1ce60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6089 = VFNMADD132PDZmbk
22691
  { 6090, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1ce60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6090 = VFNMADD132PDZmbkz
22692
  { 6091, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1ce60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6091 = VFNMADD132PDZmk
22693
  { 6092, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1ce60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6092 = VFNMADD132PDZmkz
22694
  { 6093, 4,  1,  0,  0,  0, 0x8081ce60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6093 = VFNMADD132PDZr
22695
  { 6094, 5,  1,  0,  0,  0, 0x41181ce60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6094 = VFNMADD132PDZrb
22696
  { 6095, 6,  1,  0,  0,  0, 0x411a1ce60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6095 = VFNMADD132PDZrbk
22697
  { 6096, 6,  1,  0,  0,  0, 0x411e1ce60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6096 = VFNMADD132PDZrbkz
22698
  { 6097, 5,  1,  0,  0,  0, 0x80a1ce60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6097 = VFNMADD132PDZrk
22699
  { 6098, 5,  1,  0,  0,  0, 0x80e1ce60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6098 = VFNMADD132PDZrkz
22700
  { 6099, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20014e60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6099 = VFNMADD132PSZ128m
22701
  { 6100, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9014e60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6100 = VFNMADD132PSZ128mb
22702
  { 6101, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9214e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6101 = VFNMADD132PSZ128mbk
22703
  { 6102, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9614e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6102 = VFNMADD132PSZ128mbkz
22704
  { 6103, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20214e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6103 = VFNMADD132PSZ128mk
22705
  { 6104, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20614e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6104 = VFNMADD132PSZ128mkz
22706
  { 6105, 4,  1,  0,  0,  0, 0x20014e60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6105 = VFNMADD132PSZ128r
22707
  { 6106, 5,  1,  0,  0,  0, 0x20214e60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6106 = VFNMADD132PSZ128rk
22708
  { 6107, 5,  1,  0,  0,  0, 0x20614e60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6107 = VFNMADD132PSZ128rkz
22709
  { 6108, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40094e60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6108 = VFNMADD132PSZ256m
22710
  { 6109, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9094e60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6109 = VFNMADD132PSZ256mb
22711
  { 6110, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9294e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6110 = VFNMADD132PSZ256mbk
22712
  { 6111, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9694e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6111 = VFNMADD132PSZ256mbkz
22713
  { 6112, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40294e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6112 = VFNMADD132PSZ256mk
22714
  { 6113, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40694e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6113 = VFNMADD132PSZ256mkz
22715
  { 6114, 4,  1,  0,  0,  0, 0x40094e60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6114 = VFNMADD132PSZ256r
22716
  { 6115, 5,  1,  0,  0,  0, 0x40294e60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6115 = VFNMADD132PSZ256rk
22717
  { 6116, 5,  1,  0,  0,  0, 0x40694e60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6116 = VFNMADD132PSZ256rkz
22718
  { 6117, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80814e60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6117 = VFNMADD132PSZm
22719
  { 6118, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9814e60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6118 = VFNMADD132PSZmb
22720
  { 6119, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a14e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6119 = VFNMADD132PSZmbk
22721
  { 6120, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e14e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6120 = VFNMADD132PSZmbkz
22722
  { 6121, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a14e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6121 = VFNMADD132PSZmk
22723
  { 6122, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e14e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6122 = VFNMADD132PSZmkz
22724
  { 6123, 4,  1,  0,  0,  0, 0x80814e60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6123 = VFNMADD132PSZr
22725
  { 6124, 5,  1,  0,  0,  0, 0x409814e60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6124 = VFNMADD132PSZrb
22726
  { 6125, 6,  1,  0,  0,  0, 0x409a14e60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6125 = VFNMADD132PSZrbk
22727
  { 6126, 6,  1,  0,  0,  0, 0x409e14e60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6126 = VFNMADD132PSZrbkz
22728
  { 6127, 5,  1,  0,  0,  0, 0x80a14e60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6127 = VFNMADD132PSZrk
22729
  { 6128, 5,  1,  0,  0,  0, 0x80e14e60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6128 = VFNMADD132PSZrkz
22730
  { 6129, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011cee0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #6129 = VFNMADD132SDm
22731
  { 6130, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011cee0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6130 = VFNMADD132SDm_Int
22732
  { 6131, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031cee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6131 = VFNMADD132SDm_Intk
22733
  { 6132, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071cee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6132 = VFNMADD132SDm_Intkz
22734
  { 6133, 4,  1,  0,  0,  0, 0x1011cee0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #6133 = VFNMADD132SDr
22735
  { 6134, 4,  1,  0,  0,  0, 0x1011cee0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6134 = VFNMADD132SDr_Int
22736
  { 6135, 5,  1,  0,  0,  0, 0x1031cee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6135 = VFNMADD132SDr_Intk
22737
  { 6136, 5,  1,  0,  0,  0, 0x1071cee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6136 = VFNMADD132SDr_Intkz
22738
  { 6137, 5,  1,  0,  0,  0, 0x41111cee0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6137 = VFNMADD132SDrb_Int
22739
  { 6138, 6,  1,  0,  0,  0, 0x41131cee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6138 = VFNMADD132SDrb_Intk
22740
  { 6139, 6,  1,  0,  0,  0, 0x41171cee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6139 = VFNMADD132SDrb_Intkz
22741
  { 6140, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8114ee0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #6140 = VFNMADD132SSm
22742
  { 6141, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8114ee0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6141 = VFNMADD132SSm_Int
22743
  { 6142, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8314ee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6142 = VFNMADD132SSm_Intk
22744
  { 6143, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8714ee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6143 = VFNMADD132SSm_Intkz
22745
  { 6144, 4,  1,  0,  0,  0, 0x8114ee0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #6144 = VFNMADD132SSr
22746
  { 6145, 4,  1,  0,  0,  0, 0x8114ee0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6145 = VFNMADD132SSr_Int
22747
  { 6146, 5,  1,  0,  0,  0, 0x8314ee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6146 = VFNMADD132SSr_Intk
22748
  { 6147, 5,  1,  0,  0,  0, 0x8714ee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6147 = VFNMADD132SSr_Intkz
22749
  { 6148, 5,  1,  0,  0,  0, 0x409114ee0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6148 = VFNMADD132SSrb_Int
22750
  { 6149, 6,  1,  0,  0,  0, 0x409314ee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6149 = VFNMADD132SSrb_Intk
22751
  { 6150, 6,  1,  0,  0,  0, 0x409714ee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6150 = VFNMADD132SSrb_Intkz
22752
  { 6151, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001d660009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6151 = VFNMADD213PDZ128m
22753
  { 6152, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101d660009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6152 = VFNMADD213PDZ128mb
22754
  { 6153, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121d660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6153 = VFNMADD213PDZ128mbk
22755
  { 6154, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161d660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6154 = VFNMADD213PDZ128mbkz
22756
  { 6155, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021d660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6155 = VFNMADD213PDZ128mk
22757
  { 6156, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061d660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6156 = VFNMADD213PDZ128mkz
22758
  { 6157, 4,  1,  0,  0,  0, 0x2001d660009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6157 = VFNMADD213PDZ128r
22759
  { 6158, 5,  1,  0,  0,  0, 0x2021d660009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6158 = VFNMADD213PDZ128rk
22760
  { 6159, 5,  1,  0,  0,  0, 0x2061d660009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6159 = VFNMADD213PDZ128rkz
22761
  { 6160, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009d660009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6160 = VFNMADD213PDZ256m
22762
  { 6161, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109d660009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6161 = VFNMADD213PDZ256mb
22763
  { 6162, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129d660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6162 = VFNMADD213PDZ256mbk
22764
  { 6163, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169d660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6163 = VFNMADD213PDZ256mbkz
22765
  { 6164, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029d660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6164 = VFNMADD213PDZ256mk
22766
  { 6165, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069d660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6165 = VFNMADD213PDZ256mkz
22767
  { 6166, 4,  1,  0,  0,  0, 0x4009d660009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6166 = VFNMADD213PDZ256r
22768
  { 6167, 5,  1,  0,  0,  0, 0x4029d660009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6167 = VFNMADD213PDZ256rk
22769
  { 6168, 5,  1,  0,  0,  0, 0x4069d660009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6168 = VFNMADD213PDZ256rkz
22770
  { 6169, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081d660009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6169 = VFNMADD213PDZm
22771
  { 6170, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181d660009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6170 = VFNMADD213PDZmb
22772
  { 6171, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1d660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6171 = VFNMADD213PDZmbk
22773
  { 6172, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1d660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6172 = VFNMADD213PDZmbkz
22774
  { 6173, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1d660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6173 = VFNMADD213PDZmk
22775
  { 6174, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1d660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6174 = VFNMADD213PDZmkz
22776
  { 6175, 4,  1,  0,  0,  0, 0x8081d660009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6175 = VFNMADD213PDZr
22777
  { 6176, 5,  1,  0,  0,  0, 0x41181d660009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6176 = VFNMADD213PDZrb
22778
  { 6177, 6,  1,  0,  0,  0, 0x411a1d660009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6177 = VFNMADD213PDZrbk
22779
  { 6178, 6,  1,  0,  0,  0, 0x411e1d660009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6178 = VFNMADD213PDZrbkz
22780
  { 6179, 5,  1,  0,  0,  0, 0x80a1d660009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6179 = VFNMADD213PDZrk
22781
  { 6180, 5,  1,  0,  0,  0, 0x80e1d660009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6180 = VFNMADD213PDZrkz
22782
  { 6181, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20015660009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6181 = VFNMADD213PSZ128m
22783
  { 6182, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9015660009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6182 = VFNMADD213PSZ128mb
22784
  { 6183, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9215660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6183 = VFNMADD213PSZ128mbk
22785
  { 6184, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9615660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6184 = VFNMADD213PSZ128mbkz
22786
  { 6185, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20215660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6185 = VFNMADD213PSZ128mk
22787
  { 6186, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20615660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6186 = VFNMADD213PSZ128mkz
22788
  { 6187, 4,  1,  0,  0,  0, 0x20015660009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6187 = VFNMADD213PSZ128r
22789
  { 6188, 5,  1,  0,  0,  0, 0x20215660009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6188 = VFNMADD213PSZ128rk
22790
  { 6189, 5,  1,  0,  0,  0, 0x20615660009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6189 = VFNMADD213PSZ128rkz
22791
  { 6190, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40095660009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6190 = VFNMADD213PSZ256m
22792
  { 6191, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9095660009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6191 = VFNMADD213PSZ256mb
22793
  { 6192, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9295660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6192 = VFNMADD213PSZ256mbk
22794
  { 6193, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9695660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6193 = VFNMADD213PSZ256mbkz
22795
  { 6194, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40295660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6194 = VFNMADD213PSZ256mk
22796
  { 6195, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40695660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6195 = VFNMADD213PSZ256mkz
22797
  { 6196, 4,  1,  0,  0,  0, 0x40095660009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6196 = VFNMADD213PSZ256r
22798
  { 6197, 5,  1,  0,  0,  0, 0x40295660009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6197 = VFNMADD213PSZ256rk
22799
  { 6198, 5,  1,  0,  0,  0, 0x40695660009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6198 = VFNMADD213PSZ256rkz
22800
  { 6199, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80815660009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6199 = VFNMADD213PSZm
22801
  { 6200, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9815660009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6200 = VFNMADD213PSZmb
22802
  { 6201, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a15660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6201 = VFNMADD213PSZmbk
22803
  { 6202, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e15660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6202 = VFNMADD213PSZmbkz
22804
  { 6203, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a15660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6203 = VFNMADD213PSZmk
22805
  { 6204, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e15660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6204 = VFNMADD213PSZmkz
22806
  { 6205, 4,  1,  0,  0,  0, 0x80815660009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6205 = VFNMADD213PSZr
22807
  { 6206, 5,  1,  0,  0,  0, 0x409815660009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6206 = VFNMADD213PSZrb
22808
  { 6207, 6,  1,  0,  0,  0, 0x409a15660009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6207 = VFNMADD213PSZrbk
22809
  { 6208, 6,  1,  0,  0,  0, 0x409e15660009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6208 = VFNMADD213PSZrbkz
22810
  { 6209, 5,  1,  0,  0,  0, 0x80a15660009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6209 = VFNMADD213PSZrk
22811
  { 6210, 5,  1,  0,  0,  0, 0x80e15660009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6210 = VFNMADD213PSZrkz
22812
  { 6211, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011d6e0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #6211 = VFNMADD213SDm
22813
  { 6212, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011d6e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6212 = VFNMADD213SDm_Int
22814
  { 6213, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031d6e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6213 = VFNMADD213SDm_Intk
22815
  { 6214, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071d6e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6214 = VFNMADD213SDm_Intkz
22816
  { 6215, 4,  1,  0,  0,  0, 0x1011d6e0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #6215 = VFNMADD213SDr
22817
  { 6216, 4,  1,  0,  0,  0, 0x1011d6e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6216 = VFNMADD213SDr_Int
22818
  { 6217, 5,  1,  0,  0,  0, 0x1031d6e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6217 = VFNMADD213SDr_Intk
22819
  { 6218, 5,  1,  0,  0,  0, 0x1071d6e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6218 = VFNMADD213SDr_Intkz
22820
  { 6219, 5,  1,  0,  0,  0, 0x41111d6e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6219 = VFNMADD213SDrb_Int
22821
  { 6220, 6,  1,  0,  0,  0, 0x41131d6e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6220 = VFNMADD213SDrb_Intk
22822
  { 6221, 6,  1,  0,  0,  0, 0x41171d6e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6221 = VFNMADD213SDrb_Intkz
22823
  { 6222, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81156e0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #6222 = VFNMADD213SSm
22824
  { 6223, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81156e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6223 = VFNMADD213SSm_Int
22825
  { 6224, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x83156e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6224 = VFNMADD213SSm_Intk
22826
  { 6225, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x87156e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6225 = VFNMADD213SSm_Intkz
22827
  { 6226, 4,  1,  0,  0,  0, 0x81156e0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #6226 = VFNMADD213SSr
22828
  { 6227, 4,  1,  0,  0,  0, 0x81156e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6227 = VFNMADD213SSr_Int
22829
  { 6228, 5,  1,  0,  0,  0, 0x83156e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6228 = VFNMADD213SSr_Intk
22830
  { 6229, 5,  1,  0,  0,  0, 0x87156e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6229 = VFNMADD213SSr_Intkz
22831
  { 6230, 5,  1,  0,  0,  0, 0x4091156e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6230 = VFNMADD213SSrb_Int
22832
  { 6231, 6,  1,  0,  0,  0, 0x4093156e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6231 = VFNMADD213SSrb_Intk
22833
  { 6232, 6,  1,  0,  0,  0, 0x4097156e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6232 = VFNMADD213SSrb_Intkz
22834
  { 6233, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001de60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6233 = VFNMADD231PDZ128m
22835
  { 6234, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101de60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6234 = VFNMADD231PDZ128mb
22836
  { 6235, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121de60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6235 = VFNMADD231PDZ128mbk
22837
  { 6236, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161de60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6236 = VFNMADD231PDZ128mbkz
22838
  { 6237, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021de60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6237 = VFNMADD231PDZ128mk
22839
  { 6238, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061de60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6238 = VFNMADD231PDZ128mkz
22840
  { 6239, 4,  1,  0,  0,  0, 0x2001de60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6239 = VFNMADD231PDZ128r
22841
  { 6240, 5,  1,  0,  0,  0, 0x2021de60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6240 = VFNMADD231PDZ128rk
22842
  { 6241, 5,  1,  0,  0,  0, 0x2061de60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6241 = VFNMADD231PDZ128rkz
22843
  { 6242, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009de60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6242 = VFNMADD231PDZ256m
22844
  { 6243, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109de60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6243 = VFNMADD231PDZ256mb
22845
  { 6244, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129de60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6244 = VFNMADD231PDZ256mbk
22846
  { 6245, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169de60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6245 = VFNMADD231PDZ256mbkz
22847
  { 6246, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029de60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6246 = VFNMADD231PDZ256mk
22848
  { 6247, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069de60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6247 = VFNMADD231PDZ256mkz
22849
  { 6248, 4,  1,  0,  0,  0, 0x4009de60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6248 = VFNMADD231PDZ256r
22850
  { 6249, 5,  1,  0,  0,  0, 0x4029de60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6249 = VFNMADD231PDZ256rk
22851
  { 6250, 5,  1,  0,  0,  0, 0x4069de60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6250 = VFNMADD231PDZ256rkz
22852
  { 6251, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081de60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6251 = VFNMADD231PDZm
22853
  { 6252, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181de60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6252 = VFNMADD231PDZmb
22854
  { 6253, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1de60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6253 = VFNMADD231PDZmbk
22855
  { 6254, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1de60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6254 = VFNMADD231PDZmbkz
22856
  { 6255, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1de60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6255 = VFNMADD231PDZmk
22857
  { 6256, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1de60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6256 = VFNMADD231PDZmkz
22858
  { 6257, 4,  1,  0,  0,  0, 0x8081de60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6257 = VFNMADD231PDZr
22859
  { 6258, 5,  1,  0,  0,  0, 0x41181de60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6258 = VFNMADD231PDZrb
22860
  { 6259, 6,  1,  0,  0,  0, 0x411a1de60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6259 = VFNMADD231PDZrbk
22861
  { 6260, 6,  1,  0,  0,  0, 0x411e1de60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6260 = VFNMADD231PDZrbkz
22862
  { 6261, 5,  1,  0,  0,  0, 0x80a1de60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6261 = VFNMADD231PDZrk
22863
  { 6262, 5,  1,  0,  0,  0, 0x80e1de60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6262 = VFNMADD231PDZrkz
22864
  { 6263, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20015e60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6263 = VFNMADD231PSZ128m
22865
  { 6264, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9015e60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6264 = VFNMADD231PSZ128mb
22866
  { 6265, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9215e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6265 = VFNMADD231PSZ128mbk
22867
  { 6266, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9615e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6266 = VFNMADD231PSZ128mbkz
22868
  { 6267, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20215e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6267 = VFNMADD231PSZ128mk
22869
  { 6268, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20615e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6268 = VFNMADD231PSZ128mkz
22870
  { 6269, 4,  1,  0,  0,  0, 0x20015e60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6269 = VFNMADD231PSZ128r
22871
  { 6270, 5,  1,  0,  0,  0, 0x20215e60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6270 = VFNMADD231PSZ128rk
22872
  { 6271, 5,  1,  0,  0,  0, 0x20615e60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6271 = VFNMADD231PSZ128rkz
22873
  { 6272, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40095e60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6272 = VFNMADD231PSZ256m
22874
  { 6273, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9095e60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6273 = VFNMADD231PSZ256mb
22875
  { 6274, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9295e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6274 = VFNMADD231PSZ256mbk
22876
  { 6275, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9695e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6275 = VFNMADD231PSZ256mbkz
22877
  { 6276, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40295e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6276 = VFNMADD231PSZ256mk
22878
  { 6277, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40695e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6277 = VFNMADD231PSZ256mkz
22879
  { 6278, 4,  1,  0,  0,  0, 0x40095e60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6278 = VFNMADD231PSZ256r
22880
  { 6279, 5,  1,  0,  0,  0, 0x40295e60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6279 = VFNMADD231PSZ256rk
22881
  { 6280, 5,  1,  0,  0,  0, 0x40695e60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6280 = VFNMADD231PSZ256rkz
22882
  { 6281, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80815e60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6281 = VFNMADD231PSZm
22883
  { 6282, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9815e60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6282 = VFNMADD231PSZmb
22884
  { 6283, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a15e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6283 = VFNMADD231PSZmbk
22885
  { 6284, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e15e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6284 = VFNMADD231PSZmbkz
22886
  { 6285, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a15e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6285 = VFNMADD231PSZmk
22887
  { 6286, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e15e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6286 = VFNMADD231PSZmkz
22888
  { 6287, 4,  1,  0,  0,  0, 0x80815e60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6287 = VFNMADD231PSZr
22889
  { 6288, 5,  1,  0,  0,  0, 0x409815e60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6288 = VFNMADD231PSZrb
22890
  { 6289, 6,  1,  0,  0,  0, 0x409a15e60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6289 = VFNMADD231PSZrbk
22891
  { 6290, 6,  1,  0,  0,  0, 0x409e15e60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6290 = VFNMADD231PSZrbkz
22892
  { 6291, 5,  1,  0,  0,  0, 0x80a15e60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6291 = VFNMADD231PSZrk
22893
  { 6292, 5,  1,  0,  0,  0, 0x80e15e60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6292 = VFNMADD231PSZrkz
22894
  { 6293, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011dee0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #6293 = VFNMADD231SDm
22895
  { 6294, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011dee0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6294 = VFNMADD231SDm_Int
22896
  { 6295, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031dee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6295 = VFNMADD231SDm_Intk
22897
  { 6296, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071dee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6296 = VFNMADD231SDm_Intkz
22898
  { 6297, 4,  1,  0,  0,  0, 0x1011dee0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #6297 = VFNMADD231SDr
22899
  { 6298, 4,  1,  0,  0,  0, 0x1011dee0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6298 = VFNMADD231SDr_Int
22900
  { 6299, 5,  1,  0,  0,  0, 0x1031dee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6299 = VFNMADD231SDr_Intk
22901
  { 6300, 5,  1,  0,  0,  0, 0x1071dee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6300 = VFNMADD231SDr_Intkz
22902
  { 6301, 5,  1,  0,  0,  0, 0x41111dee0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6301 = VFNMADD231SDrb_Int
22903
  { 6302, 6,  1,  0,  0,  0, 0x41131dee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6302 = VFNMADD231SDrb_Intk
22904
  { 6303, 6,  1,  0,  0,  0, 0x41171dee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6303 = VFNMADD231SDrb_Intkz
22905
  { 6304, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8115ee0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #6304 = VFNMADD231SSm
22906
  { 6305, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8115ee0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6305 = VFNMADD231SSm_Int
22907
  { 6306, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8315ee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6306 = VFNMADD231SSm_Intk
22908
  { 6307, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8715ee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6307 = VFNMADD231SSm_Intkz
22909
  { 6308, 4,  1,  0,  0,  0, 0x8115ee0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #6308 = VFNMADD231SSr
22910
  { 6309, 4,  1,  0,  0,  0, 0x8115ee0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6309 = VFNMADD231SSr_Int
22911
  { 6310, 5,  1,  0,  0,  0, 0x8315ee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6310 = VFNMADD231SSr_Intk
22912
  { 6311, 5,  1,  0,  0,  0, 0x8715ee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6311 = VFNMADD231SSr_Intkz
22913
  { 6312, 5,  1,  0,  0,  0, 0x409115ee0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6312 = VFNMADD231SSrb_Int
22914
  { 6313, 6,  1,  0,  0,  0, 0x409315ee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6313 = VFNMADD231SSrb_Intk
22915
  { 6314, 6,  1,  0,  0,  0, 0x409715ee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6314 = VFNMADD231SSrb_Intkz
22916
  { 6315, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x53cb004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #6315 = VFNMADDPD4mr
22917
  { 6316, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0xd3cb004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #6316 = VFNMADDPD4mrY
22918
  { 6317, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20005bcb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #6317 = VFNMADDPD4rm
22919
  { 6318, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x2000dbcb004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #6318 = VFNMADDPD4rmY
22920
  { 6319, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20005bcb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6319 = VFNMADDPD4rr
22921
  { 6320, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x2000dbcb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #6320 = VFNMADDPD4rrY
22922
  { 6321, 4,  1,  0,  926,  0, 0xd3cb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #6321 = VFNMADDPD4rrY_REV
22923
  { 6322, 4,  1,  0,  926,  0, 0x53cb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6322 = VFNMADDPD4rr_REV
22924
  { 6323, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1ce30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6323 = VFNMADDPDr132m
22925
  { 6324, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9ce30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6324 = VFNMADDPDr132mY
22926
  { 6325, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1ce30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6325 = VFNMADDPDr132r
22927
  { 6326, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9ce30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6326 = VFNMADDPDr132rY
22928
  { 6327, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d630009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6327 = VFNMADDPDr213m
22929
  { 6328, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d630009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6328 = VFNMADDPDr213mY
22930
  { 6329, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d630009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6329 = VFNMADDPDr213r
22931
  { 6330, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d630009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6330 = VFNMADDPDr213rY
22932
  { 6331, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1de30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6331 = VFNMADDPDr231m
22933
  { 6332, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9de30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6332 = VFNMADDPDr231mY
22934
  { 6333, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1de30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6333 = VFNMADDPDr231r
22935
  { 6334, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9de30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6334 = VFNMADDPDr231rY
22936
  { 6335, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x53c2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #6335 = VFNMADDPS4mr
22937
  { 6336, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0xd3c2804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #6336 = VFNMADDPS4mrY
22938
  { 6337, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20005bc2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #6337 = VFNMADDPS4rm
22939
  { 6338, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x2000dbc2804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #6338 = VFNMADDPS4rmY
22940
  { 6339, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20005bc2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6339 = VFNMADDPS4rr
22941
  { 6340, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x2000dbc2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #6340 = VFNMADDPS4rrY
22942
  { 6341, 4,  1,  0,  926,  0, 0xd3c2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #6341 = VFNMADDPS4rrY_REV
22943
  { 6342, 4,  1,  0,  926,  0, 0x53c2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6342 = VFNMADDPS4rr_REV
22944
  { 6343, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14e28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6343 = VFNMADDPSr132m
22945
  { 6344, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94e28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6344 = VFNMADDPSr132mY
22946
  { 6345, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14e28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6345 = VFNMADDPSr132r
22947
  { 6346, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94e28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6346 = VFNMADDPSr132rY
22948
  { 6347, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15628009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6347 = VFNMADDPSr213m
22949
  { 6348, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95628009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6348 = VFNMADDPSr213mY
22950
  { 6349, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15628009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6349 = VFNMADDPSr213r
22951
  { 6350, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95628009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6350 = VFNMADDPSr213rY
22952
  { 6351, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15e28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6351 = VFNMADDPSr231m
22953
  { 6352, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95e28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6352 = VFNMADDPSr231mY
22954
  { 6353, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15e28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6353 = VFNMADDPSr231r
22955
  { 6354, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95e28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6354 = VFNMADDPSr231rY
22956
  { 6355, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x153db004d006ULL, nullptr, nullptr, OperandInfo556, -1 ,nullptr },  // Inst #6355 = VFNMADDSD4mr
22957
  { 6356, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x153db004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #6356 = VFNMADDSD4mr_Int
22958
  { 6357, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015bdb004d006ULL, nullptr, nullptr, OperandInfo557, -1 ,nullptr },  // Inst #6357 = VFNMADDSD4rm
22959
  { 6358, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015bdb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #6358 = VFNMADDSD4rm_Int
22960
  { 6359, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015bdb004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr },  // Inst #6359 = VFNMADDSD4rr
22961
  { 6360, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015bdb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6360 = VFNMADDSD4rr_Int
22962
  { 6361, 4,  1,  0,  926,  0, 0x153db004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr },  // Inst #6361 = VFNMADDSD4rr_REV
22963
  { 6362, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ceb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #6362 = VFNMADDSDr132m
22964
  { 6363, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ceb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6363 = VFNMADDSDr132m_Int
22965
  { 6364, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11ceb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #6364 = VFNMADDSDr132r
22966
  { 6365, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11ceb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6365 = VFNMADDSDr132r_Int
22967
  { 6366, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d6b0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #6366 = VFNMADDSDr213m
22968
  { 6367, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d6b0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6367 = VFNMADDSDr213m_Int
22969
  { 6368, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11d6b0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #6368 = VFNMADDSDr213r
22970
  { 6369, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11d6b0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6369 = VFNMADDSDr213r_Int
22971
  { 6370, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11deb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #6370 = VFNMADDSDr231m
22972
  { 6371, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11deb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6371 = VFNMADDSDr231m_Int
22973
  { 6372, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11deb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #6372 = VFNMADDSDr231r
22974
  { 6373, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11deb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6373 = VFNMADDSDr231r_Int
22975
  { 6374, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x153d2804d006ULL, nullptr, nullptr, OperandInfo561, -1 ,nullptr },  // Inst #6374 = VFNMADDSS4mr
22976
  { 6375, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x153d2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #6375 = VFNMADDSS4mr_Int
22977
  { 6376, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015bd2804d006ULL, nullptr, nullptr, OperandInfo562, -1 ,nullptr },  // Inst #6376 = VFNMADDSS4rm
22978
  { 6377, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015bd2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #6377 = VFNMADDSS4rm_Int
22979
  { 6378, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015bd2804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr },  // Inst #6378 = VFNMADDSS4rr
22980
  { 6379, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015bd2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6379 = VFNMADDSS4rr_Int
22981
  { 6380, 4,  1,  0,  926,  0, 0x153d2804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr },  // Inst #6380 = VFNMADDSS4rr_REV
22982
  { 6381, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114ea8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #6381 = VFNMADDSSr132m
22983
  { 6382, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114ea8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6382 = VFNMADDSSr132m_Int
22984
  { 6383, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x114ea8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #6383 = VFNMADDSSr132r
22985
  { 6384, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x114ea8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6384 = VFNMADDSSr132r_Int
22986
  { 6385, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1156a8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #6385 = VFNMADDSSr213m
22987
  { 6386, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1156a8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6386 = VFNMADDSSr213m_Int
22988
  { 6387, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1156a8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #6387 = VFNMADDSSr213r
22989
  { 6388, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x1156a8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6388 = VFNMADDSSr213r_Int
22990
  { 6389, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115ea8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #6389 = VFNMADDSSr231m
22991
  { 6390, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115ea8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6390 = VFNMADDSSr231m_Int
22992
  { 6391, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x115ea8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #6391 = VFNMADDSSr231r
22993
  { 6392, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x115ea8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6392 = VFNMADDSSr231r_Int
22994
  { 6393, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001cf60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6393 = VFNMSUB132PDZ128m
22995
  { 6394, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101cf60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6394 = VFNMSUB132PDZ128mb
22996
  { 6395, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121cf60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6395 = VFNMSUB132PDZ128mbk
22997
  { 6396, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161cf60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6396 = VFNMSUB132PDZ128mbkz
22998
  { 6397, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021cf60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6397 = VFNMSUB132PDZ128mk
22999
  { 6398, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061cf60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6398 = VFNMSUB132PDZ128mkz
23000
  { 6399, 4,  1,  0,  0,  0, 0x2001cf60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6399 = VFNMSUB132PDZ128r
23001
  { 6400, 5,  1,  0,  0,  0, 0x2021cf60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6400 = VFNMSUB132PDZ128rk
23002
  { 6401, 5,  1,  0,  0,  0, 0x2061cf60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6401 = VFNMSUB132PDZ128rkz
23003
  { 6402, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009cf60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6402 = VFNMSUB132PDZ256m
23004
  { 6403, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109cf60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6403 = VFNMSUB132PDZ256mb
23005
  { 6404, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129cf60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6404 = VFNMSUB132PDZ256mbk
23006
  { 6405, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169cf60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6405 = VFNMSUB132PDZ256mbkz
23007
  { 6406, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029cf60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6406 = VFNMSUB132PDZ256mk
23008
  { 6407, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069cf60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6407 = VFNMSUB132PDZ256mkz
23009
  { 6408, 4,  1,  0,  0,  0, 0x4009cf60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6408 = VFNMSUB132PDZ256r
23010
  { 6409, 5,  1,  0,  0,  0, 0x4029cf60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6409 = VFNMSUB132PDZ256rk
23011
  { 6410, 5,  1,  0,  0,  0, 0x4069cf60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6410 = VFNMSUB132PDZ256rkz
23012
  { 6411, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081cf60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6411 = VFNMSUB132PDZm
23013
  { 6412, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181cf60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6412 = VFNMSUB132PDZmb
23014
  { 6413, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1cf60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6413 = VFNMSUB132PDZmbk
23015
  { 6414, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1cf60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6414 = VFNMSUB132PDZmbkz
23016
  { 6415, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1cf60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6415 = VFNMSUB132PDZmk
23017
  { 6416, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1cf60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6416 = VFNMSUB132PDZmkz
23018
  { 6417, 4,  1,  0,  0,  0, 0x8081cf60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6417 = VFNMSUB132PDZr
23019
  { 6418, 5,  1,  0,  0,  0, 0x41181cf60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6418 = VFNMSUB132PDZrb
23020
  { 6419, 6,  1,  0,  0,  0, 0x411a1cf60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6419 = VFNMSUB132PDZrbk
23021
  { 6420, 6,  1,  0,  0,  0, 0x411e1cf60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6420 = VFNMSUB132PDZrbkz
23022
  { 6421, 5,  1,  0,  0,  0, 0x80a1cf60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6421 = VFNMSUB132PDZrk
23023
  { 6422, 5,  1,  0,  0,  0, 0x80e1cf60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6422 = VFNMSUB132PDZrkz
23024
  { 6423, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20014f60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6423 = VFNMSUB132PSZ128m
23025
  { 6424, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9014f60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6424 = VFNMSUB132PSZ128mb
23026
  { 6425, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9214f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6425 = VFNMSUB132PSZ128mbk
23027
  { 6426, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9614f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6426 = VFNMSUB132PSZ128mbkz
23028
  { 6427, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20214f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6427 = VFNMSUB132PSZ128mk
23029
  { 6428, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20614f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6428 = VFNMSUB132PSZ128mkz
23030
  { 6429, 4,  1,  0,  0,  0, 0x20014f60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6429 = VFNMSUB132PSZ128r
23031
  { 6430, 5,  1,  0,  0,  0, 0x20214f60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6430 = VFNMSUB132PSZ128rk
23032
  { 6431, 5,  1,  0,  0,  0, 0x20614f60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6431 = VFNMSUB132PSZ128rkz
23033
  { 6432, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40094f60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6432 = VFNMSUB132PSZ256m
23034
  { 6433, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9094f60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6433 = VFNMSUB132PSZ256mb
23035
  { 6434, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9294f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6434 = VFNMSUB132PSZ256mbk
23036
  { 6435, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9694f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6435 = VFNMSUB132PSZ256mbkz
23037
  { 6436, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40294f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6436 = VFNMSUB132PSZ256mk
23038
  { 6437, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40694f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6437 = VFNMSUB132PSZ256mkz
23039
  { 6438, 4,  1,  0,  0,  0, 0x40094f60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6438 = VFNMSUB132PSZ256r
23040
  { 6439, 5,  1,  0,  0,  0, 0x40294f60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6439 = VFNMSUB132PSZ256rk
23041
  { 6440, 5,  1,  0,  0,  0, 0x40694f60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6440 = VFNMSUB132PSZ256rkz
23042
  { 6441, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80814f60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6441 = VFNMSUB132PSZm
23043
  { 6442, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9814f60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6442 = VFNMSUB132PSZmb
23044
  { 6443, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a14f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6443 = VFNMSUB132PSZmbk
23045
  { 6444, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e14f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6444 = VFNMSUB132PSZmbkz
23046
  { 6445, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a14f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6445 = VFNMSUB132PSZmk
23047
  { 6446, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e14f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6446 = VFNMSUB132PSZmkz
23048
  { 6447, 4,  1,  0,  0,  0, 0x80814f60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6447 = VFNMSUB132PSZr
23049
  { 6448, 5,  1,  0,  0,  0, 0x409814f60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6448 = VFNMSUB132PSZrb
23050
  { 6449, 6,  1,  0,  0,  0, 0x409a14f60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6449 = VFNMSUB132PSZrbk
23051
  { 6450, 6,  1,  0,  0,  0, 0x409e14f60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6450 = VFNMSUB132PSZrbkz
23052
  { 6451, 5,  1,  0,  0,  0, 0x80a14f60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6451 = VFNMSUB132PSZrk
23053
  { 6452, 5,  1,  0,  0,  0, 0x80e14f60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6452 = VFNMSUB132PSZrkz
23054
  { 6453, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011cfe0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #6453 = VFNMSUB132SDm
23055
  { 6454, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011cfe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6454 = VFNMSUB132SDm_Int
23056
  { 6455, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031cfe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6455 = VFNMSUB132SDm_Intk
23057
  { 6456, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071cfe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6456 = VFNMSUB132SDm_Intkz
23058
  { 6457, 4,  1,  0,  0,  0, 0x1011cfe0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #6457 = VFNMSUB132SDr
23059
  { 6458, 4,  1,  0,  0,  0, 0x1011cfe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6458 = VFNMSUB132SDr_Int
23060
  { 6459, 5,  1,  0,  0,  0, 0x1031cfe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6459 = VFNMSUB132SDr_Intk
23061
  { 6460, 5,  1,  0,  0,  0, 0x1071cfe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6460 = VFNMSUB132SDr_Intkz
23062
  { 6461, 5,  1,  0,  0,  0, 0x41111cfe0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6461 = VFNMSUB132SDrb_Int
23063
  { 6462, 6,  1,  0,  0,  0, 0x41131cfe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6462 = VFNMSUB132SDrb_Intk
23064
  { 6463, 6,  1,  0,  0,  0, 0x41171cfe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6463 = VFNMSUB132SDrb_Intkz
23065
  { 6464, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8114fe0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #6464 = VFNMSUB132SSm
23066
  { 6465, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8114fe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6465 = VFNMSUB132SSm_Int
23067
  { 6466, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8314fe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6466 = VFNMSUB132SSm_Intk
23068
  { 6467, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8714fe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6467 = VFNMSUB132SSm_Intkz
23069
  { 6468, 4,  1,  0,  0,  0, 0x8114fe0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #6468 = VFNMSUB132SSr
23070
  { 6469, 4,  1,  0,  0,  0, 0x8114fe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6469 = VFNMSUB132SSr_Int
23071
  { 6470, 5,  1,  0,  0,  0, 0x8314fe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6470 = VFNMSUB132SSr_Intk
23072
  { 6471, 5,  1,  0,  0,  0, 0x8714fe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6471 = VFNMSUB132SSr_Intkz
23073
  { 6472, 5,  1,  0,  0,  0, 0x409114fe0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6472 = VFNMSUB132SSrb_Int
23074
  { 6473, 6,  1,  0,  0,  0, 0x409314fe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6473 = VFNMSUB132SSrb_Intk
23075
  { 6474, 6,  1,  0,  0,  0, 0x409714fe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6474 = VFNMSUB132SSrb_Intkz
23076
  { 6475, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001d760009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6475 = VFNMSUB213PDZ128m
23077
  { 6476, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101d760009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6476 = VFNMSUB213PDZ128mb
23078
  { 6477, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121d760009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6477 = VFNMSUB213PDZ128mbk
23079
  { 6478, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161d760009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6478 = VFNMSUB213PDZ128mbkz
23080
  { 6479, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021d760009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6479 = VFNMSUB213PDZ128mk
23081
  { 6480, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061d760009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6480 = VFNMSUB213PDZ128mkz
23082
  { 6481, 4,  1,  0,  0,  0, 0x2001d760009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6481 = VFNMSUB213PDZ128r
23083
  { 6482, 5,  1,  0,  0,  0, 0x2021d760009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6482 = VFNMSUB213PDZ128rk
23084
  { 6483, 5,  1,  0,  0,  0, 0x2061d760009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6483 = VFNMSUB213PDZ128rkz
23085
  { 6484, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009d760009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6484 = VFNMSUB213PDZ256m
23086
  { 6485, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109d760009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6485 = VFNMSUB213PDZ256mb
23087
  { 6486, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129d760009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6486 = VFNMSUB213PDZ256mbk
23088
  { 6487, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169d760009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6487 = VFNMSUB213PDZ256mbkz
23089
  { 6488, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029d760009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6488 = VFNMSUB213PDZ256mk
23090
  { 6489, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069d760009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6489 = VFNMSUB213PDZ256mkz
23091
  { 6490, 4,  1,  0,  0,  0, 0x4009d760009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6490 = VFNMSUB213PDZ256r
23092
  { 6491, 5,  1,  0,  0,  0, 0x4029d760009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6491 = VFNMSUB213PDZ256rk
23093
  { 6492, 5,  1,  0,  0,  0, 0x4069d760009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6492 = VFNMSUB213PDZ256rkz
23094
  { 6493, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081d760009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6493 = VFNMSUB213PDZm
23095
  { 6494, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181d760009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6494 = VFNMSUB213PDZmb
23096
  { 6495, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1d760009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6495 = VFNMSUB213PDZmbk
23097
  { 6496, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1d760009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6496 = VFNMSUB213PDZmbkz
23098
  { 6497, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1d760009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6497 = VFNMSUB213PDZmk
23099
  { 6498, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1d760009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6498 = VFNMSUB213PDZmkz
23100
  { 6499, 4,  1,  0,  0,  0, 0x8081d760009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6499 = VFNMSUB213PDZr
23101
  { 6500, 5,  1,  0,  0,  0, 0x41181d760009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6500 = VFNMSUB213PDZrb
23102
  { 6501, 6,  1,  0,  0,  0, 0x411a1d760009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6501 = VFNMSUB213PDZrbk
23103
  { 6502, 6,  1,  0,  0,  0, 0x411e1d760009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6502 = VFNMSUB213PDZrbkz
23104
  { 6503, 5,  1,  0,  0,  0, 0x80a1d760009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6503 = VFNMSUB213PDZrk
23105
  { 6504, 5,  1,  0,  0,  0, 0x80e1d760009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6504 = VFNMSUB213PDZrkz
23106
  { 6505, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20015760009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6505 = VFNMSUB213PSZ128m
23107
  { 6506, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9015760009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6506 = VFNMSUB213PSZ128mb
23108
  { 6507, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9215760009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6507 = VFNMSUB213PSZ128mbk
23109
  { 6508, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9615760009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6508 = VFNMSUB213PSZ128mbkz
23110
  { 6509, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20215760009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6509 = VFNMSUB213PSZ128mk
23111
  { 6510, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20615760009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6510 = VFNMSUB213PSZ128mkz
23112
  { 6511, 4,  1,  0,  0,  0, 0x20015760009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6511 = VFNMSUB213PSZ128r
23113
  { 6512, 5,  1,  0,  0,  0, 0x20215760009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6512 = VFNMSUB213PSZ128rk
23114
  { 6513, 5,  1,  0,  0,  0, 0x20615760009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6513 = VFNMSUB213PSZ128rkz
23115
  { 6514, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40095760009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6514 = VFNMSUB213PSZ256m
23116
  { 6515, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9095760009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6515 = VFNMSUB213PSZ256mb
23117
  { 6516, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9295760009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6516 = VFNMSUB213PSZ256mbk
23118
  { 6517, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9695760009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6517 = VFNMSUB213PSZ256mbkz
23119
  { 6518, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40295760009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6518 = VFNMSUB213PSZ256mk
23120
  { 6519, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40695760009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6519 = VFNMSUB213PSZ256mkz
23121
  { 6520, 4,  1,  0,  0,  0, 0x40095760009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6520 = VFNMSUB213PSZ256r
23122
  { 6521, 5,  1,  0,  0,  0, 0x40295760009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6521 = VFNMSUB213PSZ256rk
23123
  { 6522, 5,  1,  0,  0,  0, 0x40695760009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6522 = VFNMSUB213PSZ256rkz
23124
  { 6523, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80815760009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6523 = VFNMSUB213PSZm
23125
  { 6524, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9815760009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6524 = VFNMSUB213PSZmb
23126
  { 6525, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a15760009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6525 = VFNMSUB213PSZmbk
23127
  { 6526, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e15760009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6526 = VFNMSUB213PSZmbkz
23128
  { 6527, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a15760009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6527 = VFNMSUB213PSZmk
23129
  { 6528, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e15760009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6528 = VFNMSUB213PSZmkz
23130
  { 6529, 4,  1,  0,  0,  0, 0x80815760009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6529 = VFNMSUB213PSZr
23131
  { 6530, 5,  1,  0,  0,  0, 0x409815760009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6530 = VFNMSUB213PSZrb
23132
  { 6531, 6,  1,  0,  0,  0, 0x409a15760009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6531 = VFNMSUB213PSZrbk
23133
  { 6532, 6,  1,  0,  0,  0, 0x409e15760009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6532 = VFNMSUB213PSZrbkz
23134
  { 6533, 5,  1,  0,  0,  0, 0x80a15760009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6533 = VFNMSUB213PSZrk
23135
  { 6534, 5,  1,  0,  0,  0, 0x80e15760009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6534 = VFNMSUB213PSZrkz
23136
  { 6535, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011d7e0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #6535 = VFNMSUB213SDm
23137
  { 6536, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011d7e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6536 = VFNMSUB213SDm_Int
23138
  { 6537, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031d7e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6537 = VFNMSUB213SDm_Intk
23139
  { 6538, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071d7e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6538 = VFNMSUB213SDm_Intkz
23140
  { 6539, 4,  1,  0,  0,  0, 0x1011d7e0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #6539 = VFNMSUB213SDr
23141
  { 6540, 4,  1,  0,  0,  0, 0x1011d7e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6540 = VFNMSUB213SDr_Int
23142
  { 6541, 5,  1,  0,  0,  0, 0x1031d7e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6541 = VFNMSUB213SDr_Intk
23143
  { 6542, 5,  1,  0,  0,  0, 0x1071d7e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6542 = VFNMSUB213SDr_Intkz
23144
  { 6543, 5,  1,  0,  0,  0, 0x41111d7e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6543 = VFNMSUB213SDrb_Int
23145
  { 6544, 6,  1,  0,  0,  0, 0x41131d7e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6544 = VFNMSUB213SDrb_Intk
23146
  { 6545, 6,  1,  0,  0,  0, 0x41171d7e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6545 = VFNMSUB213SDrb_Intkz
23147
  { 6546, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81157e0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #6546 = VFNMSUB213SSm
23148
  { 6547, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81157e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6547 = VFNMSUB213SSm_Int
23149
  { 6548, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x83157e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6548 = VFNMSUB213SSm_Intk
23150
  { 6549, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x87157e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6549 = VFNMSUB213SSm_Intkz
23151
  { 6550, 4,  1,  0,  0,  0, 0x81157e0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #6550 = VFNMSUB213SSr
23152
  { 6551, 4,  1,  0,  0,  0, 0x81157e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6551 = VFNMSUB213SSr_Int
23153
  { 6552, 5,  1,  0,  0,  0, 0x83157e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6552 = VFNMSUB213SSr_Intk
23154
  { 6553, 5,  1,  0,  0,  0, 0x87157e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6553 = VFNMSUB213SSr_Intkz
23155
  { 6554, 5,  1,  0,  0,  0, 0x4091157e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6554 = VFNMSUB213SSrb_Int
23156
  { 6555, 6,  1,  0,  0,  0, 0x4093157e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6555 = VFNMSUB213SSrb_Intk
23157
  { 6556, 6,  1,  0,  0,  0, 0x4097157e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6556 = VFNMSUB213SSrb_Intkz
23158
  { 6557, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001df60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6557 = VFNMSUB231PDZ128m
23159
  { 6558, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101df60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6558 = VFNMSUB231PDZ128mb
23160
  { 6559, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121df60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6559 = VFNMSUB231PDZ128mbk
23161
  { 6560, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161df60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6560 = VFNMSUB231PDZ128mbkz
23162
  { 6561, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021df60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6561 = VFNMSUB231PDZ128mk
23163
  { 6562, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061df60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #6562 = VFNMSUB231PDZ128mkz
23164
  { 6563, 4,  1,  0,  0,  0, 0x2001df60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6563 = VFNMSUB231PDZ128r
23165
  { 6564, 5,  1,  0,  0,  0, 0x2021df60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6564 = VFNMSUB231PDZ128rk
23166
  { 6565, 5,  1,  0,  0,  0, 0x2061df60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #6565 = VFNMSUB231PDZ128rkz
23167
  { 6566, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009df60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6566 = VFNMSUB231PDZ256m
23168
  { 6567, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109df60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6567 = VFNMSUB231PDZ256mb
23169
  { 6568, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129df60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6568 = VFNMSUB231PDZ256mbk
23170
  { 6569, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169df60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6569 = VFNMSUB231PDZ256mbkz
23171
  { 6570, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029df60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6570 = VFNMSUB231PDZ256mk
23172
  { 6571, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069df60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #6571 = VFNMSUB231PDZ256mkz
23173
  { 6572, 4,  1,  0,  0,  0, 0x4009df60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6572 = VFNMSUB231PDZ256r
23174
  { 6573, 5,  1,  0,  0,  0, 0x4029df60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6573 = VFNMSUB231PDZ256rk
23175
  { 6574, 5,  1,  0,  0,  0, 0x4069df60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #6574 = VFNMSUB231PDZ256rkz
23176
  { 6575, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081df60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6575 = VFNMSUB231PDZm
23177
  { 6576, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181df60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6576 = VFNMSUB231PDZmb
23178
  { 6577, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1df60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6577 = VFNMSUB231PDZmbk
23179
  { 6578, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1df60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6578 = VFNMSUB231PDZmbkz
23180
  { 6579, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1df60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6579 = VFNMSUB231PDZmk
23181
  { 6580, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1df60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #6580 = VFNMSUB231PDZmkz
23182
  { 6581, 4,  1,  0,  0,  0, 0x8081df60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6581 = VFNMSUB231PDZr
23183
  { 6582, 5,  1,  0,  0,  0, 0x41181df60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6582 = VFNMSUB231PDZrb
23184
  { 6583, 6,  1,  0,  0,  0, 0x411a1df60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6583 = VFNMSUB231PDZrbk
23185
  { 6584, 6,  1,  0,  0,  0, 0x411e1df60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #6584 = VFNMSUB231PDZrbkz
23186
  { 6585, 5,  1,  0,  0,  0, 0x80a1df60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6585 = VFNMSUB231PDZrk
23187
  { 6586, 5,  1,  0,  0,  0, 0x80e1df60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #6586 = VFNMSUB231PDZrkz
23188
  { 6587, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20015f60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6587 = VFNMSUB231PSZ128m
23189
  { 6588, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9015f60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6588 = VFNMSUB231PSZ128mb
23190
  { 6589, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9215f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6589 = VFNMSUB231PSZ128mbk
23191
  { 6590, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9615f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6590 = VFNMSUB231PSZ128mbkz
23192
  { 6591, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20215f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6591 = VFNMSUB231PSZ128mk
23193
  { 6592, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20615f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #6592 = VFNMSUB231PSZ128mkz
23194
  { 6593, 4,  1,  0,  0,  0, 0x20015f60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6593 = VFNMSUB231PSZ128r
23195
  { 6594, 5,  1,  0,  0,  0, 0x20215f60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6594 = VFNMSUB231PSZ128rk
23196
  { 6595, 5,  1,  0,  0,  0, 0x20615f60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #6595 = VFNMSUB231PSZ128rkz
23197
  { 6596, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40095f60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6596 = VFNMSUB231PSZ256m
23198
  { 6597, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9095f60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #6597 = VFNMSUB231PSZ256mb
23199
  { 6598, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9295f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6598 = VFNMSUB231PSZ256mbk
23200
  { 6599, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9695f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6599 = VFNMSUB231PSZ256mbkz
23201
  { 6600, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40295f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6600 = VFNMSUB231PSZ256mk
23202
  { 6601, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40695f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #6601 = VFNMSUB231PSZ256mkz
23203
  { 6602, 4,  1,  0,  0,  0, 0x40095f60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #6602 = VFNMSUB231PSZ256r
23204
  { 6603, 5,  1,  0,  0,  0, 0x40295f60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6603 = VFNMSUB231PSZ256rk
23205
  { 6604, 5,  1,  0,  0,  0, 0x40695f60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #6604 = VFNMSUB231PSZ256rkz
23206
  { 6605, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80815f60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6605 = VFNMSUB231PSZm
23207
  { 6606, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9815f60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #6606 = VFNMSUB231PSZmb
23208
  { 6607, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a15f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6607 = VFNMSUB231PSZmbk
23209
  { 6608, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e15f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6608 = VFNMSUB231PSZmbkz
23210
  { 6609, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a15f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6609 = VFNMSUB231PSZmk
23211
  { 6610, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e15f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #6610 = VFNMSUB231PSZmkz
23212
  { 6611, 4,  1,  0,  0,  0, 0x80815f60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #6611 = VFNMSUB231PSZr
23213
  { 6612, 5,  1,  0,  0,  0, 0x409815f60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #6612 = VFNMSUB231PSZrb
23214
  { 6613, 6,  1,  0,  0,  0, 0x409a15f60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6613 = VFNMSUB231PSZrbk
23215
  { 6614, 6,  1,  0,  0,  0, 0x409e15f60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #6614 = VFNMSUB231PSZrbkz
23216
  { 6615, 5,  1,  0,  0,  0, 0x80a15f60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6615 = VFNMSUB231PSZrk
23217
  { 6616, 5,  1,  0,  0,  0, 0x80e15f60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #6616 = VFNMSUB231PSZrkz
23218
  { 6617, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011dfe0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr },  // Inst #6617 = VFNMSUB231SDm
23219
  { 6618, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011dfe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6618 = VFNMSUB231SDm_Int
23220
  { 6619, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031dfe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6619 = VFNMSUB231SDm_Intk
23221
  { 6620, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071dfe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6620 = VFNMSUB231SDm_Intkz
23222
  { 6621, 4,  1,  0,  0,  0, 0x1011dfe0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr },  // Inst #6621 = VFNMSUB231SDr
23223
  { 6622, 4,  1,  0,  0,  0, 0x1011dfe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6622 = VFNMSUB231SDr_Int
23224
  { 6623, 5,  1,  0,  0,  0, 0x1031dfe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6623 = VFNMSUB231SDr_Intk
23225
  { 6624, 5,  1,  0,  0,  0, 0x1071dfe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6624 = VFNMSUB231SDr_Intkz
23226
  { 6625, 5,  1,  0,  0,  0, 0x41111dfe0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6625 = VFNMSUB231SDrb_Int
23227
  { 6626, 6,  1,  0,  0,  0, 0x41131dfe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6626 = VFNMSUB231SDrb_Intk
23228
  { 6627, 6,  1,  0,  0,  0, 0x41171dfe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6627 = VFNMSUB231SDrb_Intkz
23229
  { 6628, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8115fe0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr },  // Inst #6628 = VFNMSUB231SSm
23230
  { 6629, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8115fe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #6629 = VFNMSUB231SSm_Int
23231
  { 6630, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8315fe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6630 = VFNMSUB231SSm_Intk
23232
  { 6631, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8715fe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6631 = VFNMSUB231SSm_Intkz
23233
  { 6632, 4,  1,  0,  0,  0, 0x8115fe0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr },  // Inst #6632 = VFNMSUB231SSr
23234
  { 6633, 4,  1,  0,  0,  0, 0x8115fe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #6633 = VFNMSUB231SSr_Int
23235
  { 6634, 5,  1,  0,  0,  0, 0x8315fe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6634 = VFNMSUB231SSr_Intk
23236
  { 6635, 5,  1,  0,  0,  0, 0x8715fe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6635 = VFNMSUB231SSr_Intkz
23237
  { 6636, 5,  1,  0,  0,  0, 0x409115fe0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #6636 = VFNMSUB231SSrb_Int
23238
  { 6637, 6,  1,  0,  0,  0, 0x409315fe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6637 = VFNMSUB231SSrb_Intk
23239
  { 6638, 6,  1,  0,  0,  0, 0x409715fe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6638 = VFNMSUB231SSrb_Intkz
23240
  { 6639, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x53eb004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #6639 = VFNMSUBPD4mr
23241
  { 6640, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0xd3eb004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #6640 = VFNMSUBPD4mrY
23242
  { 6641, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20005beb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #6641 = VFNMSUBPD4rm
23243
  { 6642, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x2000dbeb004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #6642 = VFNMSUBPD4rmY
23244
  { 6643, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20005beb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6643 = VFNMSUBPD4rr
23245
  { 6644, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x2000dbeb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #6644 = VFNMSUBPD4rrY
23246
  { 6645, 4,  1,  0,  926,  0, 0xd3eb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #6645 = VFNMSUBPD4rrY_REV
23247
  { 6646, 4,  1,  0,  926,  0, 0x53eb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6646 = VFNMSUBPD4rr_REV
23248
  { 6647, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1cf30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6647 = VFNMSUBPDr132m
23249
  { 6648, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9cf30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6648 = VFNMSUBPDr132mY
23250
  { 6649, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1cf30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6649 = VFNMSUBPDr132r
23251
  { 6650, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9cf30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6650 = VFNMSUBPDr132rY
23252
  { 6651, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d730009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6651 = VFNMSUBPDr213m
23253
  { 6652, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d730009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6652 = VFNMSUBPDr213mY
23254
  { 6653, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d730009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6653 = VFNMSUBPDr213r
23255
  { 6654, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d730009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6654 = VFNMSUBPDr213rY
23256
  { 6655, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1df30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6655 = VFNMSUBPDr231m
23257
  { 6656, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9df30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6656 = VFNMSUBPDr231mY
23258
  { 6657, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1df30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6657 = VFNMSUBPDr231r
23259
  { 6658, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9df30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6658 = VFNMSUBPDr231rY
23260
  { 6659, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x53e2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #6659 = VFNMSUBPS4mr
23261
  { 6660, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0xd3e2804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #6660 = VFNMSUBPS4mrY
23262
  { 6661, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20005be2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #6661 = VFNMSUBPS4rm
23263
  { 6662, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x2000dbe2804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #6662 = VFNMSUBPS4rmY
23264
  { 6663, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20005be2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6663 = VFNMSUBPS4rr
23265
  { 6664, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x2000dbe2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #6664 = VFNMSUBPS4rrY
23266
  { 6665, 4,  1,  0,  926,  0, 0xd3e2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #6665 = VFNMSUBPS4rrY_REV
23267
  { 6666, 4,  1,  0,  926,  0, 0x53e2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6666 = VFNMSUBPS4rr_REV
23268
  { 6667, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14f28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6667 = VFNMSUBPSr132m
23269
  { 6668, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94f28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6668 = VFNMSUBPSr132mY
23270
  { 6669, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14f28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6669 = VFNMSUBPSr132r
23271
  { 6670, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94f28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6670 = VFNMSUBPSr132rY
23272
  { 6671, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15728009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6671 = VFNMSUBPSr213m
23273
  { 6672, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95728009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6672 = VFNMSUBPSr213mY
23274
  { 6673, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15728009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6673 = VFNMSUBPSr213r
23275
  { 6674, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95728009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6674 = VFNMSUBPSr213rY
23276
  { 6675, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15f28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6675 = VFNMSUBPSr231m
23277
  { 6676, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95f28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr },  // Inst #6676 = VFNMSUBPSr231mY
23278
  { 6677, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15f28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6677 = VFNMSUBPSr231r
23279
  { 6678, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95f28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr },  // Inst #6678 = VFNMSUBPSr231rY
23280
  { 6679, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x153fb004d006ULL, nullptr, nullptr, OperandInfo556, -1 ,nullptr },  // Inst #6679 = VFNMSUBSD4mr
23281
  { 6680, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x153fb004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #6680 = VFNMSUBSD4mr_Int
23282
  { 6681, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015bfb004d006ULL, nullptr, nullptr, OperandInfo557, -1 ,nullptr },  // Inst #6681 = VFNMSUBSD4rm
23283
  { 6682, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015bfb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #6682 = VFNMSUBSD4rm_Int
23284
  { 6683, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015bfb004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr },  // Inst #6683 = VFNMSUBSD4rr
23285
  { 6684, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015bfb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6684 = VFNMSUBSD4rr_Int
23286
  { 6685, 4,  1,  0,  926,  0, 0x153fb004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr },  // Inst #6685 = VFNMSUBSD4rr_REV
23287
  { 6686, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11cfb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #6686 = VFNMSUBSDr132m
23288
  { 6687, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11cfb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6687 = VFNMSUBSDr132m_Int
23289
  { 6688, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11cfb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #6688 = VFNMSUBSDr132r
23290
  { 6689, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11cfb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6689 = VFNMSUBSDr132r_Int
23291
  { 6690, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d7b0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #6690 = VFNMSUBSDr213m
23292
  { 6691, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d7b0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6691 = VFNMSUBSDr213m_Int
23293
  { 6692, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11d7b0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #6692 = VFNMSUBSDr213r
23294
  { 6693, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11d7b0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6693 = VFNMSUBSDr213r_Int
23295
  { 6694, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11dfb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr },  // Inst #6694 = VFNMSUBSDr231m
23296
  { 6695, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11dfb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6695 = VFNMSUBSDr231m_Int
23297
  { 6696, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11dfb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr },  // Inst #6696 = VFNMSUBSDr231r
23298
  { 6697, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x11dfb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6697 = VFNMSUBSDr231r_Int
23299
  { 6698, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x153f2804d006ULL, nullptr, nullptr, OperandInfo561, -1 ,nullptr },  // Inst #6698 = VFNMSUBSS4mr
23300
  { 6699, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x153f2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #6699 = VFNMSUBSS4mr_Int
23301
  { 6700, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015bf2804d006ULL, nullptr, nullptr, OperandInfo562, -1 ,nullptr },  // Inst #6700 = VFNMSUBSS4rm
23302
  { 6701, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad), 0x20015bf2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #6701 = VFNMSUBSS4rm_Int
23303
  { 6702, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015bf2804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr },  // Inst #6702 = VFNMSUBSS4rr
23304
  { 6703, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x20015bf2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #6703 = VFNMSUBSS4rr_Int
23305
  { 6704, 4,  1,  0,  926,  0, 0x153f2804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr },  // Inst #6704 = VFNMSUBSS4rr_REV
23306
  { 6705, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114fa8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #6705 = VFNMSUBSSr132m
23307
  { 6706, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114fa8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6706 = VFNMSUBSSr132m_Int
23308
  { 6707, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x114fa8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #6707 = VFNMSUBSSr132r
23309
  { 6708, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x114fa8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6708 = VFNMSUBSSr132r_Int
23310
  { 6709, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1157a8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #6709 = VFNMSUBSSr213m
23311
  { 6710, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1157a8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6710 = VFNMSUBSSr213m_Int
23312
  { 6711, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1157a8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #6711 = VFNMSUBSSr213r
23313
  { 6712, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x1157a8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6712 = VFNMSUBSSr213r_Int
23314
  { 6713, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115fa8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr },  // Inst #6713 = VFNMSUBSSr231m
23315
  { 6714, 8,  1,  0,  927,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115fa8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr },  // Inst #6714 = VFNMSUBSSr231m_Int
23316
  { 6715, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x115fa8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr },  // Inst #6715 = VFNMSUBSSr231r
23317
  { 6716, 4,  1,  0,  926,  0|(1ULL<<MCID::Commutable), 0x115fa8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr },  // Inst #6716 = VFNMSUBSSr231r_Int
23318
  { 6717, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000b37804d006ULL, nullptr, nullptr, OperandInfo566, -1 ,nullptr },  // Inst #6717 = VFPCLASSPDZ128rm
23319
  { 6718, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100b37804d006ULL, nullptr, nullptr, OperandInfo566, -1 ,nullptr },  // Inst #6718 = VFPCLASSPDZ128rmb
23320
  { 6719, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120b37804d006ULL, nullptr, nullptr, OperandInfo567, -1 ,nullptr },  // Inst #6719 = VFPCLASSPDZ128rmbk
23321
  { 6720, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020b37804d006ULL, nullptr, nullptr, OperandInfo567, -1 ,nullptr },  // Inst #6720 = VFPCLASSPDZ128rmk
23322
  { 6721, 3,  1,  0,  0,  0, 0x2000b37804d005ULL, nullptr, nullptr, OperandInfo568, -1 ,nullptr },  // Inst #6721 = VFPCLASSPDZ128rr
23323
  { 6722, 4,  1,  0,  0,  0, 0x2020b37804d005ULL, nullptr, nullptr, OperandInfo569, -1 ,nullptr },  // Inst #6722 = VFPCLASSPDZ128rrk
23324
  { 6723, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008b37804d006ULL, nullptr, nullptr, OperandInfo570, -1 ,nullptr },  // Inst #6723 = VFPCLASSPDZ256rm
23325
  { 6724, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108b37804d006ULL, nullptr, nullptr, OperandInfo570, -1 ,nullptr },  // Inst #6724 = VFPCLASSPDZ256rmb
23326
  { 6725, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128b37804d006ULL, nullptr, nullptr, OperandInfo571, -1 ,nullptr },  // Inst #6725 = VFPCLASSPDZ256rmbk
23327
  { 6726, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028b37804d006ULL, nullptr, nullptr, OperandInfo571, -1 ,nullptr },  // Inst #6726 = VFPCLASSPDZ256rmk
23328
  { 6727, 3,  1,  0,  0,  0, 0x4008b37804d005ULL, nullptr, nullptr, OperandInfo572, -1 ,nullptr },  // Inst #6727 = VFPCLASSPDZ256rr
23329
  { 6728, 4,  1,  0,  0,  0, 0x4028b37804d005ULL, nullptr, nullptr, OperandInfo573, -1 ,nullptr },  // Inst #6728 = VFPCLASSPDZ256rrk
23330
  { 6729, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080b37804d006ULL, nullptr, nullptr, OperandInfo574, -1 ,nullptr },  // Inst #6729 = VFPCLASSPDZrm
23331
  { 6730, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180b37804d006ULL, nullptr, nullptr, OperandInfo574, -1 ,nullptr },  // Inst #6730 = VFPCLASSPDZrmb
23332
  { 6731, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0b37804d006ULL, nullptr, nullptr, OperandInfo575, -1 ,nullptr },  // Inst #6731 = VFPCLASSPDZrmbk
23333
  { 6732, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0b37804d006ULL, nullptr, nullptr, OperandInfo575, -1 ,nullptr },  // Inst #6732 = VFPCLASSPDZrmk
23334
  { 6733, 3,  1,  0,  0,  0, 0x8080b37804d005ULL, nullptr, nullptr, OperandInfo576, -1 ,nullptr },  // Inst #6733 = VFPCLASSPDZrr
23335
  { 6734, 4,  1,  0,  0,  0, 0x80a0b37804d005ULL, nullptr, nullptr, OperandInfo577, -1 ,nullptr },  // Inst #6734 = VFPCLASSPDZrrk
23336
  { 6735, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000337804d006ULL, nullptr, nullptr, OperandInfo570, -1 ,nullptr },  // Inst #6735 = VFPCLASSPSZ128rm
23337
  { 6736, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x900337804d006ULL, nullptr, nullptr, OperandInfo570, -1 ,nullptr },  // Inst #6736 = VFPCLASSPSZ128rmb
23338
  { 6737, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x920337804d006ULL, nullptr, nullptr, OperandInfo571, -1 ,nullptr },  // Inst #6737 = VFPCLASSPSZ128rmbk
23339
  { 6738, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020337804d006ULL, nullptr, nullptr, OperandInfo571, -1 ,nullptr },  // Inst #6738 = VFPCLASSPSZ128rmk
23340
  { 6739, 3,  1,  0,  0,  0, 0x2000337804d005ULL, nullptr, nullptr, OperandInfo578, -1 ,nullptr },  // Inst #6739 = VFPCLASSPSZ128rr
23341
  { 6740, 4,  1,  0,  0,  0, 0x2020337804d005ULL, nullptr, nullptr, OperandInfo579, -1 ,nullptr },  // Inst #6740 = VFPCLASSPSZ128rrk
23342
  { 6741, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008337804d006ULL, nullptr, nullptr, OperandInfo574, -1 ,nullptr },  // Inst #6741 = VFPCLASSPSZ256rm
23343
  { 6742, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x908337804d006ULL, nullptr, nullptr, OperandInfo574, -1 ,nullptr },  // Inst #6742 = VFPCLASSPSZ256rmb
23344
  { 6743, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x928337804d006ULL, nullptr, nullptr, OperandInfo575, -1 ,nullptr },  // Inst #6743 = VFPCLASSPSZ256rmbk
23345
  { 6744, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028337804d006ULL, nullptr, nullptr, OperandInfo575, -1 ,nullptr },  // Inst #6744 = VFPCLASSPSZ256rmk
23346
  { 6745, 3,  1,  0,  0,  0, 0x4008337804d005ULL, nullptr, nullptr, OperandInfo580, -1 ,nullptr },  // Inst #6745 = VFPCLASSPSZ256rr
23347
  { 6746, 4,  1,  0,  0,  0, 0x4028337804d005ULL, nullptr, nullptr, OperandInfo581, -1 ,nullptr },  // Inst #6746 = VFPCLASSPSZ256rrk
23348
  { 6747, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080337804d006ULL, nullptr, nullptr, OperandInfo582, -1 ,nullptr },  // Inst #6747 = VFPCLASSPSZrm
23349
  { 6748, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x980337804d006ULL, nullptr, nullptr, OperandInfo582, -1 ,nullptr },  // Inst #6748 = VFPCLASSPSZrmb
23350
  { 6749, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a0337804d006ULL, nullptr, nullptr, OperandInfo583, -1 ,nullptr },  // Inst #6749 = VFPCLASSPSZrmbk
23351
  { 6750, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0337804d006ULL, nullptr, nullptr, OperandInfo583, -1 ,nullptr },  // Inst #6750 = VFPCLASSPSZrmk
23352
  { 6751, 3,  1,  0,  0,  0, 0x8080337804d005ULL, nullptr, nullptr, OperandInfo584, -1 ,nullptr },  // Inst #6751 = VFPCLASSPSZrr
23353
  { 6752, 4,  1,  0,  0,  0, 0x80a0337804d005ULL, nullptr, nullptr, OperandInfo585, -1 ,nullptr },  // Inst #6752 = VFPCLASSPSZrrk
23354
  { 6753, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1000b3f804d006ULL, nullptr, nullptr, OperandInfo586, -1 ,nullptr },  // Inst #6753 = VFPCLASSSDrm
23355
  { 6754, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1020b3f804d006ULL, nullptr, nullptr, OperandInfo587, -1 ,nullptr },  // Inst #6754 = VFPCLASSSDrmk
23356
  { 6755, 3,  1,  0,  0,  0, 0x1000b3f804d005ULL, nullptr, nullptr, OperandInfo588, -1 ,nullptr },  // Inst #6755 = VFPCLASSSDrr
23357
  { 6756, 4,  1,  0,  0,  0, 0x1020b3f804d005ULL, nullptr, nullptr, OperandInfo589, -1 ,nullptr },  // Inst #6756 = VFPCLASSSDrrk
23358
  { 6757, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80033f804d006ULL, nullptr, nullptr, OperandInfo586, -1 ,nullptr },  // Inst #6757 = VFPCLASSSSrm
23359
  { 6758, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82033f804d006ULL, nullptr, nullptr, OperandInfo587, -1 ,nullptr },  // Inst #6758 = VFPCLASSSSrmk
23360
  { 6759, 3,  1,  0,  0,  0, 0x80033f804d005ULL, nullptr, nullptr, OperandInfo588, -1 ,nullptr },  // Inst #6759 = VFPCLASSSSrr
23361
  { 6760, 4,  1,  0,  0,  0, 0x82033f804d005ULL, nullptr, nullptr, OperandInfo589, -1 ,nullptr },  // Inst #6760 = VFPCLASSSSrrk
23362
  { 6761, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40d0014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #6761 = VFRCZPDrm
23363
  { 6762, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x840d0014806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #6762 = VFRCZPDrmY
23364
  { 6763, 2,  1,  0,  0,  0, 0x40d0014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #6763 = VFRCZPDrr
23365
  { 6764, 2,  1,  0,  0,  0, 0x840d0014805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #6764 = VFRCZPDrrY
23366
  { 6765, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4048014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #6765 = VFRCZPSrm
23367
  { 6766, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x84048014806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #6766 = VFRCZPSrmY
23368
  { 6767, 2,  1,  0,  0,  0, 0x4048014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #6767 = VFRCZPSrr
23369
  { 6768, 2,  1,  0,  0,  0, 0x84048014805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #6768 = VFRCZPSrrY
23370
  { 6769, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x41d0014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #6769 = VFRCZSDrm
23371
  { 6770, 2,  1,  0,  0,  0, 0x41d0014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #6770 = VFRCZSDrr
23372
  { 6771, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4148014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #6771 = VFRCZSSrm
23373
  { 6772, 2,  1,  0,  0,  0, 0x4148014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #6772 = VFRCZSSrr
23374
  { 6773, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12ab0005006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #6773 = VFsANDNPDrm
23375
  { 6774, 3,  1,  0,  160,  0, 0x12ab0005005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #6774 = VFsANDNPDrr
23376
  { 6775, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12aa8004806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #6775 = VFsANDNPSrm
23377
  { 6776, 3,  1,  0,  160,  0, 0x12aa8004805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #6776 = VFsANDNPSrr
23378
  { 6777, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12a30005006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #6777 = VFsANDPDrm
23379
  { 6778, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12a30005005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #6778 = VFsANDPDrr
23380
  { 6779, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12a28004806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #6779 = VFsANDPSrm
23381
  { 6780, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12a28004805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #6780 = VFsANDPSrr
23382
  { 6781, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12b30005006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #6781 = VFsORPDrm
23383
  { 6782, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12b30005005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #6782 = VFsORPDrr
23384
  { 6783, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12b28004806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #6783 = VFsORPSrm
23385
  { 6784, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12b28004805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #6784 = VFsORPSrr
23386
  { 6785, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12bb0005006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #6785 = VFsXORPDrm
23387
  { 6786, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12bb0005005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #6786 = VFsXORPDrr
23388
  { 6787, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12ba8004806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #6787 = VFsXORPSrm
23389
  { 6788, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12ba8004805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #6788 = VFsXORPSrr
23390
  { 6789, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x92ab0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #6789 = VFvANDNPDYrm
23391
  { 6790, 3,  1,  0,  160,  0, 0x92ab0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #6790 = VFvANDNPDYrr
23392
  { 6791, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12ab0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #6791 = VFvANDNPDrm
23393
  { 6792, 3,  1,  0,  160,  0, 0x12ab0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #6792 = VFvANDNPDrr
23394
  { 6793, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x92aa8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #6793 = VFvANDNPSYrm
23395
  { 6794, 3,  1,  0,  160,  0, 0x92aa8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #6794 = VFvANDNPSYrr
23396
  { 6795, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12aa8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #6795 = VFvANDNPSrm
23397
  { 6796, 3,  1,  0,  160,  0, 0x12aa8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #6796 = VFvANDNPSrr
23398
  { 6797, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x92a30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #6797 = VFvANDPDYrm
23399
  { 6798, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x92a30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #6798 = VFvANDPDYrr
23400
  { 6799, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12a30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #6799 = VFvANDPDrm
23401
  { 6800, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12a30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #6800 = VFvANDPDrr
23402
  { 6801, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x92a28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #6801 = VFvANDPSYrm
23403
  { 6802, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x92a28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #6802 = VFvANDPSYrr
23404
  { 6803, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12a28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #6803 = VFvANDPSrm
23405
  { 6804, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12a28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #6804 = VFvANDPSrr
23406
  { 6805, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x92b30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #6805 = VFvORPDYrm
23407
  { 6806, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x92b30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #6806 = VFvORPDYrr
23408
  { 6807, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12b30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #6807 = VFvORPDrm
23409
  { 6808, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12b30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #6808 = VFvORPDrr
23410
  { 6809, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x92b28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #6809 = VFvORPSYrm
23411
  { 6810, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x92b28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #6810 = VFvORPSYrr
23412
  { 6811, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12b28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #6811 = VFvORPSrm
23413
  { 6812, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12b28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #6812 = VFvORPSrr
23414
  { 6813, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x92bb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #6813 = VFvXORPDYrm
23415
  { 6814, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x92bb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #6814 = VFvXORPDYrr
23416
  { 6815, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12bb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #6815 = VFvXORPDrm
23417
  { 6816, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12bb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #6816 = VFvXORPDrr
23418
  { 6817, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x92ba8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #6817 = VFvXORPSYrm
23419
  { 6818, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x92ba8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #6818 = VFvXORPSYrr
23420
  { 6819, 7,  1,  0,  159,  0|(1ULL<<MCID::MayLoad), 0x12ba8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #6819 = VFvXORPSrm
23421
  { 6820, 3,  1,  0,  160,  0|(1ULL<<MCID::Commutable), 0x12ba8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #6820 = VFvXORPSrr
23422
  { 6821, 9,  2,  0,  862,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xac930009006ULL, nullptr, nullptr, OperandInfo590, -1 ,nullptr },  // Inst #6821 = VGATHERDPDYrm
23423
  { 6822, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1020c970009006ULL, nullptr, nullptr, OperandInfo591, -1 ,nullptr },  // Inst #6822 = VGATHERDPDZ128rm
23424
  { 6823, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1028c970009006ULL, nullptr, nullptr, OperandInfo592, -1 ,nullptr },  // Inst #6823 = VGATHERDPDZ256rm
23425
  { 6824, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a0c970009006ULL, nullptr, nullptr, OperandInfo593, -1 ,nullptr },  // Inst #6824 = VGATHERDPDZrm
23426
  { 6825, 9,  2,  0,  861,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2c930009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr },  // Inst #6825 = VGATHERDPDrm
23427
  { 6826, 9,  2,  0,  858,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xa4928009006ULL, nullptr, nullptr, OperandInfo595, -1 ,nullptr },  // Inst #6826 = VGATHERDPSYrm
23428
  { 6827, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8204968009006ULL, nullptr, nullptr, OperandInfo596, -1 ,nullptr },  // Inst #6827 = VGATHERDPSZ128rm
23429
  { 6828, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8284968009006ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr },  // Inst #6828 = VGATHERDPSZ256rm
23430
  { 6829, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8a04968009006ULL, nullptr, nullptr, OperandInfo598, -1 ,nullptr },  // Inst #6829 = VGATHERDPSZrm
23431
  { 6830, 9,  2,  0,  857,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x24928009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr },  // Inst #6830 = VGATHERDPSrm
23432
  { 6831, 6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0e378009019ULL, nullptr, nullptr, OperandInfo599, -1 ,nullptr },  // Inst #6831 = VGATHERPF0DPDm
23433
  { 6832, 6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a06378009019ULL, nullptr, nullptr, OperandInfo600, -1 ,nullptr },  // Inst #6832 = VGATHERPF0DPSm
23434
  { 6833, 6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a0e3f8009019ULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr },  // Inst #6833 = VGATHERPF0QPDm
23435
  { 6834, 6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a063f8009019ULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr },  // Inst #6834 = VGATHERPF0QPSm
23436
  { 6835, 6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0e37800901aULL, nullptr, nullptr, OperandInfo599, -1 ,nullptr },  // Inst #6835 = VGATHERPF1DPDm
23437
  { 6836, 6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0637800901aULL, nullptr, nullptr, OperandInfo600, -1 ,nullptr },  // Inst #6836 = VGATHERPF1DPSm
23438
  { 6837, 6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a0e3f800901aULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr },  // Inst #6837 = VGATHERPF1QPDm
23439
  { 6838, 6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a063f800901aULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr },  // Inst #6838 = VGATHERPF1QPSm
23440
  { 6839, 9,  2,  0,  864,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xac9b0009006ULL, nullptr, nullptr, OperandInfo595, -1 ,nullptr },  // Inst #6839 = VGATHERQPDYrm
23441
  { 6840, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1020c9f0009006ULL, nullptr, nullptr, OperandInfo591, -1 ,nullptr },  // Inst #6840 = VGATHERQPDZ128rm
23442
  { 6841, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1028c9f0009006ULL, nullptr, nullptr, OperandInfo602, -1 ,nullptr },  // Inst #6841 = VGATHERQPDZ256rm
23443
  { 6842, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a0c9f0009006ULL, nullptr, nullptr, OperandInfo603, -1 ,nullptr },  // Inst #6842 = VGATHERQPDZrm
23444
  { 6843, 9,  2,  0,  863,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2c9b0009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr },  // Inst #6843 = VGATHERQPDrm
23445
  { 6844, 9,  2,  0,  860,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xa49a8009006ULL, nullptr, nullptr, OperandInfo604, -1 ,nullptr },  // Inst #6844 = VGATHERQPSYrm
23446
  { 6845, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82049e8009006ULL, nullptr, nullptr, OperandInfo596, -1 ,nullptr },  // Inst #6845 = VGATHERQPSZ128rm
23447
  { 6846, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82849e8009006ULL, nullptr, nullptr, OperandInfo605, -1 ,nullptr },  // Inst #6846 = VGATHERQPSZ256rm
23448
  { 6847, 9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8a049e8009006ULL, nullptr, nullptr, OperandInfo606, -1 ,nullptr },  // Inst #6847 = VGATHERQPSZrm
23449
  { 6848, 9,  2,  0,  859,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x249a8009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr },  // Inst #6848 = VGATHERQPSrm
23450
  { 6849, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000a160009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #6849 = VGETEXPPDZ128m
23451
  { 6850, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100a160009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #6850 = VGETEXPPDZ128mb
23452
  { 6851, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120a160009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #6851 = VGETEXPPDZ128mbk
23453
  { 6852, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160a160009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #6852 = VGETEXPPDZ128mbkz
23454
  { 6853, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020a160009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #6853 = VGETEXPPDZ128mk
23455
  { 6854, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060a160009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #6854 = VGETEXPPDZ128mkz
23456
  { 6855, 2,  1,  0,  0,  0, 0x2000a160009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #6855 = VGETEXPPDZ128r
23457
  { 6856, 4,  1,  0,  0,  0, 0x2020a160009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #6856 = VGETEXPPDZ128rk
23458
  { 6857, 3,  1,  0,  0,  0, 0x2060a160009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #6857 = VGETEXPPDZ128rkz
23459
  { 6858, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008a160009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #6858 = VGETEXPPDZ256m
23460
  { 6859, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108a160009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #6859 = VGETEXPPDZ256mb
23461
  { 6860, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128a160009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #6860 = VGETEXPPDZ256mbk
23462
  { 6861, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168a160009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #6861 = VGETEXPPDZ256mbkz
23463
  { 6862, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028a160009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #6862 = VGETEXPPDZ256mk
23464
  { 6863, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068a160009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #6863 = VGETEXPPDZ256mkz
23465
  { 6864, 2,  1,  0,  0,  0, 0x4008a160009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #6864 = VGETEXPPDZ256r
23466
  { 6865, 4,  1,  0,  0,  0, 0x4028a160009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #6865 = VGETEXPPDZ256rk
23467
  { 6866, 3,  1,  0,  0,  0, 0x4068a160009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #6866 = VGETEXPPDZ256rkz
23468
  { 6867, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080a160009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #6867 = VGETEXPPDm
23469
  { 6868, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180a160009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #6868 = VGETEXPPDmb
23470
  { 6869, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0a160009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #6869 = VGETEXPPDmbk
23471
  { 6870, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0a160009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #6870 = VGETEXPPDmbkz
23472
  { 6871, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0a160009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #6871 = VGETEXPPDmk
23473
  { 6872, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0a160009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #6872 = VGETEXPPDmkz
23474
  { 6873, 2,  1,  0,  0,  0, 0x8080a160009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #6873 = VGETEXPPDr
23475
  { 6874, 2,  1,  0,  0,  0, 0x1180a160009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #6874 = VGETEXPPDrb
23476
  { 6875, 4,  1,  0,  0,  0, 0x11a0a160009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #6875 = VGETEXPPDrbk
23477
  { 6876, 3,  1,  0,  0,  0, 0x11e0a160009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #6876 = VGETEXPPDrbkz
23478
  { 6877, 4,  1,  0,  0,  0, 0x80a0a160009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #6877 = VGETEXPPDrk
23479
  { 6878, 3,  1,  0,  0,  0, 0x80e0a160009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #6878 = VGETEXPPDrkz
23480
  { 6879, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20002160009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #6879 = VGETEXPPSZ128m
23481
  { 6880, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9002160009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #6880 = VGETEXPPSZ128mb
23482
  { 6881, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9202160009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #6881 = VGETEXPPSZ128mbk
23483
  { 6882, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9602160009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #6882 = VGETEXPPSZ128mbkz
23484
  { 6883, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20202160009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #6883 = VGETEXPPSZ128mk
23485
  { 6884, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20602160009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #6884 = VGETEXPPSZ128mkz
23486
  { 6885, 2,  1,  0,  0,  0, 0x20002160009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #6885 = VGETEXPPSZ128r
23487
  { 6886, 4,  1,  0,  0,  0, 0x20202160009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #6886 = VGETEXPPSZ128rk
23488
  { 6887, 3,  1,  0,  0,  0, 0x20602160009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #6887 = VGETEXPPSZ128rkz
23489
  { 6888, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40082160009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #6888 = VGETEXPPSZ256m
23490
  { 6889, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9082160009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #6889 = VGETEXPPSZ256mb
23491
  { 6890, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9282160009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #6890 = VGETEXPPSZ256mbk
23492
  { 6891, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9682160009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #6891 = VGETEXPPSZ256mbkz
23493
  { 6892, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40282160009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #6892 = VGETEXPPSZ256mk
23494
  { 6893, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40682160009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #6893 = VGETEXPPSZ256mkz
23495
  { 6894, 2,  1,  0,  0,  0, 0x40082160009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #6894 = VGETEXPPSZ256r
23496
  { 6895, 4,  1,  0,  0,  0, 0x40282160009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #6895 = VGETEXPPSZ256rk
23497
  { 6896, 3,  1,  0,  0,  0, 0x40682160009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #6896 = VGETEXPPSZ256rkz
23498
  { 6897, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80802160009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #6897 = VGETEXPPSm
23499
  { 6898, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9802160009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #6898 = VGETEXPPSmb
23500
  { 6899, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a02160009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #6899 = VGETEXPPSmbk
23501
  { 6900, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e02160009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #6900 = VGETEXPPSmbkz
23502
  { 6901, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a02160009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #6901 = VGETEXPPSmk
23503
  { 6902, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e02160009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #6902 = VGETEXPPSmkz
23504
  { 6903, 2,  1,  0,  0,  0, 0x80802160009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #6903 = VGETEXPPSr
23505
  { 6904, 2,  1,  0,  0,  0, 0x9802160009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #6904 = VGETEXPPSrb
23506
  { 6905, 4,  1,  0,  0,  0, 0x9a02160009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #6905 = VGETEXPPSrbk
23507
  { 6906, 3,  1,  0,  0,  0, 0x9e02160009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #6906 = VGETEXPPSrbkz
23508
  { 6907, 4,  1,  0,  0,  0, 0x80a02160009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #6907 = VGETEXPPSrk
23509
  { 6908, 3,  1,  0,  0,  0, 0x80e02160009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #6908 = VGETEXPPSrkz
23510
  { 6909, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1001a1e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #6909 = VGETEXPSDm
23511
  { 6910, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1021a1e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6910 = VGETEXPSDmk
23512
  { 6911, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1061a1e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #6911 = VGETEXPSDmkz
23513
  { 6912, 3,  1,  0,  0,  0, 0x1001a1e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #6912 = VGETEXPSDr
23514
  { 6913, 3,  1,  0,  0,  0, 0x1101a1e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #6913 = VGETEXPSDrb
23515
  { 6914, 5,  1,  0,  0,  0, 0x1121a1e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6914 = VGETEXPSDrbk
23516
  { 6915, 4,  1,  0,  0,  0, 0x1161a1e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #6915 = VGETEXPSDrbkz
23517
  { 6916, 5,  1,  0,  0,  0, 0x1021a1e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6916 = VGETEXPSDrk
23518
  { 6917, 4,  1,  0,  0,  0, 0x1061a1e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #6917 = VGETEXPSDrkz
23519
  { 6918, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80121e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #6918 = VGETEXPSSm
23520
  { 6919, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82121e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #6919 = VGETEXPSSmk
23521
  { 6920, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x86121e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #6920 = VGETEXPSSmkz
23522
  { 6921, 3,  1,  0,  0,  0, 0x80121e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #6921 = VGETEXPSSr
23523
  { 6922, 3,  1,  0,  0,  0, 0x90121e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #6922 = VGETEXPSSrb
23524
  { 6923, 5,  1,  0,  0,  0, 0x92121e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6923 = VGETEXPSSrbk
23525
  { 6924, 4,  1,  0,  0,  0, 0x96121e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #6924 = VGETEXPSSrbkz
23526
  { 6925, 5,  1,  0,  0,  0, 0x82121e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #6925 = VGETEXPSSrk
23527
  { 6926, 4,  1,  0,  0,  0, 0x86121e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #6926 = VGETEXPSSrkz
23528
  { 6927, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100937804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #6927 = VGETMANTPDZ128rmbi
23529
  { 6928, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120937804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #6928 = VGETMANTPDZ128rmbik
23530
  { 6929, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160937804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #6929 = VGETMANTPDZ128rmbikz
23531
  { 6930, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000937804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #6930 = VGETMANTPDZ128rmi
23532
  { 6931, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020937804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #6931 = VGETMANTPDZ128rmik
23533
  { 6932, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060937804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #6932 = VGETMANTPDZ128rmikz
23534
  { 6933, 3,  1,  0,  0,  0, 0x2000937804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #6933 = VGETMANTPDZ128rri
23535
  { 6934, 5,  1,  0,  0,  0, 0x2020937804d005ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr },  // Inst #6934 = VGETMANTPDZ128rrik
23536
  { 6935, 4,  1,  0,  0,  0, 0x2060937804d005ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr },  // Inst #6935 = VGETMANTPDZ128rrikz
23537
  { 6936, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108937804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #6936 = VGETMANTPDZ256rmbi
23538
  { 6937, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128937804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #6937 = VGETMANTPDZ256rmbik
23539
  { 6938, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168937804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #6938 = VGETMANTPDZ256rmbikz
23540
  { 6939, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008937804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #6939 = VGETMANTPDZ256rmi
23541
  { 6940, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028937804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #6940 = VGETMANTPDZ256rmik
23542
  { 6941, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068937804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #6941 = VGETMANTPDZ256rmikz
23543
  { 6942, 3,  1,  0,  0,  0, 0x4008937804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #6942 = VGETMANTPDZ256rri
23544
  { 6943, 5,  1,  0,  0,  0, 0x4028937804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr },  // Inst #6943 = VGETMANTPDZ256rrik
23545
  { 6944, 4,  1,  0,  0,  0, 0x4068937804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr },  // Inst #6944 = VGETMANTPDZ256rrikz
23546
  { 6945, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180937804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #6945 = VGETMANTPDZrmbi
23547
  { 6946, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0937804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #6946 = VGETMANTPDZrmbik
23548
  { 6947, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0937804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #6947 = VGETMANTPDZrmbikz
23549
  { 6948, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080937804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #6948 = VGETMANTPDZrmi
23550
  { 6949, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0937804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #6949 = VGETMANTPDZrmik
23551
  { 6950, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0937804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #6950 = VGETMANTPDZrmikz
23552
  { 6951, 3,  1,  0,  0,  0, 0x8080937804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #6951 = VGETMANTPDZrri
23553
  { 6952, 3,  1,  0,  0,  0, 0x1180937804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #6952 = VGETMANTPDZrrib
23554
  { 6953, 5,  1,  0,  0,  0, 0x11a0937804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #6953 = VGETMANTPDZrribk
23555
  { 6954, 4,  1,  0,  0,  0, 0x11e0937804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #6954 = VGETMANTPDZrribkz
23556
  { 6955, 5,  1,  0,  0,  0, 0x80a0937804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #6955 = VGETMANTPDZrrik
23557
  { 6956, 4,  1,  0,  0,  0, 0x80e0937804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #6956 = VGETMANTPDZrrikz
23558
  { 6957, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x900137804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #6957 = VGETMANTPSZ128rmbi
23559
  { 6958, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x920137804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #6958 = VGETMANTPSZ128rmbik
23560
  { 6959, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x960137804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #6959 = VGETMANTPSZ128rmbikz
23561
  { 6960, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000137804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #6960 = VGETMANTPSZ128rmi
23562
  { 6961, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020137804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #6961 = VGETMANTPSZ128rmik
23563
  { 6962, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060137804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #6962 = VGETMANTPSZ128rmikz
23564
  { 6963, 3,  1,  0,  0,  0, 0x2000137804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #6963 = VGETMANTPSZ128rri
23565
  { 6964, 5,  1,  0,  0,  0, 0x2020137804d005ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr },  // Inst #6964 = VGETMANTPSZ128rrik
23566
  { 6965, 4,  1,  0,  0,  0, 0x2060137804d005ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr },  // Inst #6965 = VGETMANTPSZ128rrikz
23567
  { 6966, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x908137804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #6966 = VGETMANTPSZ256rmbi
23568
  { 6967, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x928137804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #6967 = VGETMANTPSZ256rmbik
23569
  { 6968, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x968137804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #6968 = VGETMANTPSZ256rmbikz
23570
  { 6969, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008137804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #6969 = VGETMANTPSZ256rmi
23571
  { 6970, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028137804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #6970 = VGETMANTPSZ256rmik
23572
  { 6971, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068137804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #6971 = VGETMANTPSZ256rmikz
23573
  { 6972, 3,  1,  0,  0,  0, 0x4008137804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #6972 = VGETMANTPSZ256rri
23574
  { 6973, 5,  1,  0,  0,  0, 0x4028137804d005ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr },  // Inst #6973 = VGETMANTPSZ256rrik
23575
  { 6974, 4,  1,  0,  0,  0, 0x4068137804d005ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr },  // Inst #6974 = VGETMANTPSZ256rrikz
23576
  { 6975, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x980137804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #6975 = VGETMANTPSZrmbi
23577
  { 6976, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a0137804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #6976 = VGETMANTPSZrmbik
23578
  { 6977, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e0137804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #6977 = VGETMANTPSZrmbikz
23579
  { 6978, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080137804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #6978 = VGETMANTPSZrmi
23580
  { 6979, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0137804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #6979 = VGETMANTPSZrmik
23581
  { 6980, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0137804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #6980 = VGETMANTPSZrmikz
23582
  { 6981, 3,  1,  0,  0,  0, 0x8080137804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #6981 = VGETMANTPSZrri
23583
  { 6982, 3,  1,  0,  0,  0, 0x980137804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #6982 = VGETMANTPSZrrib
23584
  { 6983, 5,  1,  0,  0,  0, 0x9a0137804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #6983 = VGETMANTPSZrribk
23585
  { 6984, 4,  1,  0,  0,  0, 0x9e0137804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #6984 = VGETMANTPSZrribkz
23586
  { 6985, 5,  1,  0,  0,  0, 0x80a0137804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #6985 = VGETMANTPSZrrik
23587
  { 6986, 4,  1,  0,  0,  0, 0x80e0137804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #6986 = VGETMANTPSZrrikz
23588
  { 6987, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x101193f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #6987 = VGETMANTSDZ128rmi
23589
  { 6988, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x101193f804d006ULL, nullptr, nullptr, OperandInfo631, -1 ,nullptr },  // Inst #6988 = VGETMANTSDZ128rmi_alt
23590
  { 6989, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x103193f804d006ULL, nullptr, nullptr, OperandInfo632, -1 ,nullptr },  // Inst #6989 = VGETMANTSDZ128rmi_altk
23591
  { 6990, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x107193f804d006ULL, nullptr, nullptr, OperandInfo633, -1 ,nullptr },  // Inst #6990 = VGETMANTSDZ128rmi_altkz
23592
  { 6991, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x103193f804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #6991 = VGETMANTSDZ128rmik
23593
  { 6992, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x107193f804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr },  // Inst #6992 = VGETMANTSDZ128rmikz
23594
  { 6993, 4,  1,  0,  0,  0, 0x101193f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #6993 = VGETMANTSDZ128rri
23595
  { 6994, 4,  1,  0,  0,  0, 0x111193f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #6994 = VGETMANTSDZ128rrib
23596
  { 6995, 6,  1,  0,  0,  0, 0x113193f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6995 = VGETMANTSDZ128rribk
23597
  { 6996, 5,  1,  0,  0,  0, 0x117193f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #6996 = VGETMANTSDZ128rribkz
23598
  { 6997, 6,  1,  0,  0,  0, 0x103193f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #6997 = VGETMANTSDZ128rrik
23599
  { 6998, 5,  1,  0,  0,  0, 0x107193f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #6998 = VGETMANTSDZ128rrikz
23600
  { 6999, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81113f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #6999 = VGETMANTSSZ128rmi
23601
  { 7000, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x81113f804d006ULL, nullptr, nullptr, OperandInfo635, -1 ,nullptr },  // Inst #7000 = VGETMANTSSZ128rmi_alt
23602
  { 7001, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x83113f804d006ULL, nullptr, nullptr, OperandInfo636, -1 ,nullptr },  // Inst #7001 = VGETMANTSSZ128rmi_altk
23603
  { 7002, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x87113f804d006ULL, nullptr, nullptr, OperandInfo637, -1 ,nullptr },  // Inst #7002 = VGETMANTSSZ128rmi_altkz
23604
  { 7003, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x83113f804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #7003 = VGETMANTSSZ128rmik
23605
  { 7004, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x87113f804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr },  // Inst #7004 = VGETMANTSSZ128rmikz
23606
  { 7005, 4,  1,  0,  0,  0, 0x81113f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #7005 = VGETMANTSSZ128rri
23607
  { 7006, 4,  1,  0,  0,  0, 0x91113f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #7006 = VGETMANTSSZ128rrib
23608
  { 7007, 6,  1,  0,  0,  0, 0x93113f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #7007 = VGETMANTSSZ128rribk
23609
  { 7008, 5,  1,  0,  0,  0, 0x97113f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #7008 = VGETMANTSSZ128rribkz
23610
  { 7009, 6,  1,  0,  0,  0, 0x83113f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #7009 = VGETMANTSSZ128rrik
23611
  { 7010, 5,  1,  0,  0,  0, 0x87113f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #7010 = VGETMANTSSZ128rrikz
23612
  { 7011, 7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x93e30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7011 = VHADDPDYrm
23613
  { 7012, 3,  1,  0,  902,  0, 0x93e30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7012 = VHADDPDYrr
23614
  { 7013, 7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x13e30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7013 = VHADDPDrm
23615
  { 7014, 3,  1,  0,  902,  0, 0x13e30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7014 = VHADDPDrr
23616
  { 7015, 7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x93e28006006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7015 = VHADDPSYrm
23617
  { 7016, 3,  1,  0,  902,  0, 0x93e28006005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7016 = VHADDPSYrr
23618
  { 7017, 7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x13e28006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7017 = VHADDPSrm
23619
  { 7018, 3,  1,  0,  902,  0, 0x13e28006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7018 = VHADDPSrr
23620
  { 7019, 7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x93eb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7019 = VHSUBPDYrm
23621
  { 7020, 3,  1,  0,  902,  0, 0x93eb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7020 = VHSUBPDYrr
23622
  { 7021, 7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x13eb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7021 = VHSUBPDrm
23623
  { 7022, 3,  1,  0,  902,  0, 0x13eb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7022 = VHSUBPDrr
23624
  { 7023, 7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x93ea8006006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7023 = VHSUBPSYrm
23625
  { 7024, 3,  1,  0,  902,  0, 0x93ea8006005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7024 = VHSUBPSYrr
23626
  { 7025, 7,  1,  0,  903,  0|(1ULL<<MCID::MayLoad), 0x13ea8006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7025 = VHSUBPSrm
23627
  { 7026, 3,  1,  0,  902,  0, 0x13ea8006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7026 = VHSUBPSrr
23628
  { 7027, 8,  1,  0,  853,  0|(1ULL<<MCID::MayLoad), 0x90c2804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #7027 = VINSERTF128rm
23629
  { 7028, 4,  1,  0,  852,  0, 0x90c2804d005ULL, nullptr, nullptr, OperandInfo638, -1 ,nullptr },  // Inst #7028 = VINSERTF128rr
23630
  { 7029, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20090c6804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #7029 = VINSERTF32x4Z256rm
23631
  { 7030, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20290c6804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #7030 = VINSERTF32x4Z256rmk
23632
  { 7031, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20690c6804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #7031 = VINSERTF32x4Z256rmkz
23633
  { 7032, 4,  1,  0,  0,  0, 0x40090c6804d005ULL, nullptr, nullptr, OperandInfo639, -1 ,nullptr },  // Inst #7032 = VINSERTF32x4Z256rr
23634
  { 7033, 6,  1,  0,  0,  0, 0x40290c6804d005ULL, nullptr, nullptr, OperandInfo640, -1 ,nullptr },  // Inst #7033 = VINSERTF32x4Z256rrk
23635
  { 7034, 5,  1,  0,  0,  0, 0x40690c6804d005ULL, nullptr, nullptr, OperandInfo641, -1 ,nullptr },  // Inst #7034 = VINSERTF32x4Z256rrkz
23636
  { 7035, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20810c6804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #7035 = VINSERTF32x4Zrm
23637
  { 7036, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a10c6804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #7036 = VINSERTF32x4Zrmk
23638
  { 7037, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e10c6804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #7037 = VINSERTF32x4Zrmkz
23639
  { 7038, 4,  1,  0,  0,  0, 0x80810c6804d005ULL, nullptr, nullptr, OperandInfo642, -1 ,nullptr },  // Inst #7038 = VINSERTF32x4Zrr
23640
  { 7039, 6,  1,  0,  0,  0, 0x80a10c6804d005ULL, nullptr, nullptr, OperandInfo643, -1 ,nullptr },  // Inst #7039 = VINSERTF32x4Zrrk
23641
  { 7040, 5,  1,  0,  0,  0, 0x80e10c6804d005ULL, nullptr, nullptr, OperandInfo644, -1 ,nullptr },  // Inst #7040 = VINSERTF32x4Zrrkz
23642
  { 7041, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40810d6804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #7041 = VINSERTF32x8Zrm
23643
  { 7042, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a10d6804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #7042 = VINSERTF32x8Zrmk
23644
  { 7043, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e10d6804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #7043 = VINSERTF32x8Zrmkz
23645
  { 7044, 4,  1,  0,  0,  0, 0x80810d6804d005ULL, nullptr, nullptr, OperandInfo645, -1 ,nullptr },  // Inst #7044 = VINSERTF32x8Zrr
23646
  { 7045, 6,  1,  0,  0,  0, 0x80a10d6804d005ULL, nullptr, nullptr, OperandInfo646, -1 ,nullptr },  // Inst #7045 = VINSERTF32x8Zrrk
23647
  { 7046, 5,  1,  0,  0,  0, 0x80e10d6804d005ULL, nullptr, nullptr, OperandInfo647, -1 ,nullptr },  // Inst #7046 = VINSERTF32x8Zrrkz
23648
  { 7047, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20098c7004d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #7047 = VINSERTF64x2Z256rm
23649
  { 7048, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20298c7004d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #7048 = VINSERTF64x2Z256rmk
23650
  { 7049, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20698c7004d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #7049 = VINSERTF64x2Z256rmkz
23651
  { 7050, 4,  1,  0,  0,  0, 0x40098c7004d005ULL, nullptr, nullptr, OperandInfo639, -1 ,nullptr },  // Inst #7050 = VINSERTF64x2Z256rr
23652
  { 7051, 6,  1,  0,  0,  0, 0x40298c7004d005ULL, nullptr, nullptr, OperandInfo648, -1 ,nullptr },  // Inst #7051 = VINSERTF64x2Z256rrk
23653
  { 7052, 5,  1,  0,  0,  0, 0x40698c7004d005ULL, nullptr, nullptr, OperandInfo649, -1 ,nullptr },  // Inst #7052 = VINSERTF64x2Z256rrkz
23654
  { 7053, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20818c7004d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #7053 = VINSERTF64x2Zrm
23655
  { 7054, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a18c7004d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #7054 = VINSERTF64x2Zrmk
23656
  { 7055, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e18c7004d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #7055 = VINSERTF64x2Zrmkz
23657
  { 7056, 4,  1,  0,  0,  0, 0x80818c7004d005ULL, nullptr, nullptr, OperandInfo642, -1 ,nullptr },  // Inst #7056 = VINSERTF64x2Zrr
23658
  { 7057, 6,  1,  0,  0,  0, 0x80a18c7004d005ULL, nullptr, nullptr, OperandInfo650, -1 ,nullptr },  // Inst #7057 = VINSERTF64x2Zrrk
23659
  { 7058, 5,  1,  0,  0,  0, 0x80e18c7004d005ULL, nullptr, nullptr, OperandInfo651, -1 ,nullptr },  // Inst #7058 = VINSERTF64x2Zrrkz
23660
  { 7059, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40818d7004d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #7059 = VINSERTF64x4Zrm
23661
  { 7060, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a18d7004d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #7060 = VINSERTF64x4Zrmk
23662
  { 7061, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e18d7004d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #7061 = VINSERTF64x4Zrmkz
23663
  { 7062, 4,  1,  0,  0,  0, 0x80818d7004d005ULL, nullptr, nullptr, OperandInfo645, -1 ,nullptr },  // Inst #7062 = VINSERTF64x4Zrr
23664
  { 7063, 6,  1,  0,  0,  0, 0x80a18d7004d005ULL, nullptr, nullptr, OperandInfo652, -1 ,nullptr },  // Inst #7063 = VINSERTF64x4Zrrk
23665
  { 7064, 5,  1,  0,  0,  0, 0x80e18d7004d005ULL, nullptr, nullptr, OperandInfo653, -1 ,nullptr },  // Inst #7064 = VINSERTF64x4Zrrkz
23666
  { 7065, 8,  1,  0,  547,  0|(1ULL<<MCID::MayLoad), 0x91c3804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #7065 = VINSERTI128rm
23667
  { 7066, 4,  1,  0,  544,  0, 0x91c3804d005ULL, nullptr, nullptr, OperandInfo638, -1 ,nullptr },  // Inst #7066 = VINSERTI128rr
23668
  { 7067, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20091c7804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #7067 = VINSERTI32x4Z256rm
23669
  { 7068, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20291c7804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #7068 = VINSERTI32x4Z256rmk
23670
  { 7069, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20691c7804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #7069 = VINSERTI32x4Z256rmkz
23671
  { 7070, 4,  1,  0,  0,  0, 0x40091c7804d005ULL, nullptr, nullptr, OperandInfo639, -1 ,nullptr },  // Inst #7070 = VINSERTI32x4Z256rr
23672
  { 7071, 6,  1,  0,  0,  0, 0x40291c7804d005ULL, nullptr, nullptr, OperandInfo640, -1 ,nullptr },  // Inst #7071 = VINSERTI32x4Z256rrk
23673
  { 7072, 5,  1,  0,  0,  0, 0x40691c7804d005ULL, nullptr, nullptr, OperandInfo641, -1 ,nullptr },  // Inst #7072 = VINSERTI32x4Z256rrkz
23674
  { 7073, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20811c7804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #7073 = VINSERTI32x4Zrm
23675
  { 7074, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a11c7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #7074 = VINSERTI32x4Zrmk
23676
  { 7075, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e11c7804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #7075 = VINSERTI32x4Zrmkz
23677
  { 7076, 4,  1,  0,  0,  0, 0x80811c7804d005ULL, nullptr, nullptr, OperandInfo642, -1 ,nullptr },  // Inst #7076 = VINSERTI32x4Zrr
23678
  { 7077, 6,  1,  0,  0,  0, 0x80a11c7804d005ULL, nullptr, nullptr, OperandInfo643, -1 ,nullptr },  // Inst #7077 = VINSERTI32x4Zrrk
23679
  { 7078, 5,  1,  0,  0,  0, 0x80e11c7804d005ULL, nullptr, nullptr, OperandInfo644, -1 ,nullptr },  // Inst #7078 = VINSERTI32x4Zrrkz
23680
  { 7079, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40811d7804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #7079 = VINSERTI32x8Zrm
23681
  { 7080, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a11d7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #7080 = VINSERTI32x8Zrmk
23682
  { 7081, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e11d7804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #7081 = VINSERTI32x8Zrmkz
23683
  { 7082, 4,  1,  0,  0,  0, 0x80811d7804d005ULL, nullptr, nullptr, OperandInfo645, -1 ,nullptr },  // Inst #7082 = VINSERTI32x8Zrr
23684
  { 7083, 6,  1,  0,  0,  0, 0x80a11d7804d005ULL, nullptr, nullptr, OperandInfo646, -1 ,nullptr },  // Inst #7083 = VINSERTI32x8Zrrk
23685
  { 7084, 5,  1,  0,  0,  0, 0x80e11d7804d005ULL, nullptr, nullptr, OperandInfo647, -1 ,nullptr },  // Inst #7084 = VINSERTI32x8Zrrkz
23686
  { 7085, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20099c7804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #7085 = VINSERTI64x2Z256rm
23687
  { 7086, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20299c7804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #7086 = VINSERTI64x2Z256rmk
23688
  { 7087, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20699c7804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #7087 = VINSERTI64x2Z256rmkz
23689
  { 7088, 4,  1,  0,  0,  0, 0x40099c7804d005ULL, nullptr, nullptr, OperandInfo639, -1 ,nullptr },  // Inst #7088 = VINSERTI64x2Z256rr
23690
  { 7089, 6,  1,  0,  0,  0, 0x40299c7804d005ULL, nullptr, nullptr, OperandInfo648, -1 ,nullptr },  // Inst #7089 = VINSERTI64x2Z256rrk
23691
  { 7090, 5,  1,  0,  0,  0, 0x40699c7804d005ULL, nullptr, nullptr, OperandInfo649, -1 ,nullptr },  // Inst #7090 = VINSERTI64x2Z256rrkz
23692
  { 7091, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20819c7804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #7091 = VINSERTI64x2Zrm
23693
  { 7092, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a19c7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #7092 = VINSERTI64x2Zrmk
23694
  { 7093, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e19c7804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #7093 = VINSERTI64x2Zrmkz
23695
  { 7094, 4,  1,  0,  0,  0, 0x80819c7804d005ULL, nullptr, nullptr, OperandInfo642, -1 ,nullptr },  // Inst #7094 = VINSERTI64x2Zrr
23696
  { 7095, 6,  1,  0,  0,  0, 0x80a19c7804d005ULL, nullptr, nullptr, OperandInfo650, -1 ,nullptr },  // Inst #7095 = VINSERTI64x2Zrrk
23697
  { 7096, 5,  1,  0,  0,  0, 0x80e19c7804d005ULL, nullptr, nullptr, OperandInfo651, -1 ,nullptr },  // Inst #7096 = VINSERTI64x2Zrrkz
23698
  { 7097, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40819d7804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #7097 = VINSERTI64x4Zrm
23699
  { 7098, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a19d7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #7098 = VINSERTI64x4Zrmk
23700
  { 7099, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e19d7804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #7099 = VINSERTI64x4Zrmkz
23701
  { 7100, 4,  1,  0,  0,  0, 0x80819d7804d005ULL, nullptr, nullptr, OperandInfo645, -1 ,nullptr },  // Inst #7100 = VINSERTI64x4Zrr
23702
  { 7101, 6,  1,  0,  0,  0, 0x80a19d7804d005ULL, nullptr, nullptr, OperandInfo652, -1 ,nullptr },  // Inst #7101 = VINSERTI64x4Zrrk
23703
  { 7102, 5,  1,  0,  0,  0, 0x80e19d7804d005ULL, nullptr, nullptr, OperandInfo653, -1 ,nullptr },  // Inst #7102 = VINSERTI64x4Zrrkz
23704
  { 7103, 8,  1,  0,  548,  0|(1ULL<<MCID::MayLoad), 0x110a804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #7103 = VINSERTPSrm
23705
  { 7104, 4,  1,  0,  549,  0, 0x110a804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #7104 = VINSERTPSrr
23706
  { 7105, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80110f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #7105 = VINSERTPSzrm
23707
  { 7106, 4,  1,  0,  0,  0, 0x200110f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #7106 = VINSERTPSzrr
23708
  { 7107, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x87830006006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #7107 = VLDDQUYrm
23709
  { 7108, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x7830006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7108 = VLDDQUrm
23710
  { 7109, 5,  0,  0,  945,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x572800481aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #7109 = VLDMXCSR
23711
  { 7110, 2,  0,  0,  800,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7bb8005005ULL, ImplicitList32, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7110 = VMASKMOVDQU
23712
  { 7111, 2,  0,  0,  800,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7bb8005005ULL, ImplicitList45, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7111 = VMASKMOVDQU64
23713
  { 7112, 7,  0,  0,  856,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x917b0009004ULL, nullptr, nullptr, OperandInfo654, -1 ,nullptr },  // Inst #7112 = VMASKMOVPDYmr
23714
  { 7113, 7,  1,  0,  854,  0|(1ULL<<MCID::MayLoad), 0x916b0009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7113 = VMASKMOVPDYrm
23715
  { 7114, 7,  0,  0,  855,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x117b0009004ULL, nullptr, nullptr, OperandInfo655, -1 ,nullptr },  // Inst #7114 = VMASKMOVPDmr
23716
  { 7115, 7,  1,  0,  854,  0|(1ULL<<MCID::MayLoad), 0x116b0009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7115 = VMASKMOVPDrm
23717
  { 7116, 7,  0,  0,  856,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x91728009004ULL, nullptr, nullptr, OperandInfo654, -1 ,nullptr },  // Inst #7116 = VMASKMOVPSYmr
23718
  { 7117, 7,  1,  0,  854,  0|(1ULL<<MCID::MayLoad), 0x91628009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7117 = VMASKMOVPSYrm
23719
  { 7118, 7,  0,  0,  855,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x11728009004ULL, nullptr, nullptr, OperandInfo655, -1 ,nullptr },  // Inst #7118 = VMASKMOVPSmr
23720
  { 7119, 7,  1,  0,  854,  0|(1ULL<<MCID::MayLoad), 0x11628009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7119 = VMASKMOVPSrm
23721
  { 7120, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x92fb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7120 = VMAXCPDYrm
23722
  { 7121, 3,  1,  0,  14, 0|(1ULL<<MCID::Commutable), 0x92fb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7121 = VMAXCPDYrr
23723
  { 7122, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x12fb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7122 = VMAXCPDrm
23724
  { 7123, 3,  1,  0,  14, 0|(1ULL<<MCID::Commutable), 0x12fb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7123 = VMAXCPDrr
23725
  { 7124, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x92fa8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7124 = VMAXCPSYrm
23726
  { 7125, 3,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x92fa8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7125 = VMAXCPSYrr
23727
  { 7126, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x12fa8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7126 = VMAXCPSrm
23728
  { 7127, 3,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x12fa8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7127 = VMAXCPSrr
23729
  { 7128, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x112fb0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #7128 = VMAXCSDrm
23730
  { 7129, 3,  1,  0,  18, 0|(1ULL<<MCID::Commutable), 0x112fb0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #7129 = VMAXCSDrr
23731
  { 7130, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x112fa8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #7130 = VMAXCSSrm
23732
  { 7131, 3,  1,  0,  20, 0|(1ULL<<MCID::Commutable), 0x112fa8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #7131 = VMAXCSSrr
23733
  { 7132, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x92fb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7132 = VMAXPDYrm
23734
  { 7133, 3,  1,  0,  14, 0, 0x92fb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7133 = VMAXPDYrr
23735
  { 7134, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001afe0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7134 = VMAXPDZ128rm
23736
  { 7135, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101afe0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7135 = VMAXPDZ128rmb
23737
  { 7136, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121afe0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #7136 = VMAXPDZ128rmbk
23738
  { 7137, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161afe0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #7137 = VMAXPDZ128rmbkz
23739
  { 7138, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021afe0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #7138 = VMAXPDZ128rmk
23740
  { 7139, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061afe0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #7139 = VMAXPDZ128rmkz
23741
  { 7140, 3,  1,  0,  0,  0, 0x2001afe0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7140 = VMAXPDZ128rr
23742
  { 7141, 5,  1,  0,  0,  0, 0x2021afe0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #7141 = VMAXPDZ128rrk
23743
  { 7142, 4,  1,  0,  0,  0, 0x2061afe0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #7142 = VMAXPDZ128rrkz
23744
  { 7143, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009afe0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7143 = VMAXPDZ256rm
23745
  { 7144, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109afe0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7144 = VMAXPDZ256rmb
23746
  { 7145, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129afe0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #7145 = VMAXPDZ256rmbk
23747
  { 7146, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169afe0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #7146 = VMAXPDZ256rmbkz
23748
  { 7147, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029afe0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #7147 = VMAXPDZ256rmk
23749
  { 7148, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069afe0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #7148 = VMAXPDZ256rmkz
23750
  { 7149, 3,  1,  0,  0,  0, 0x4009afe0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #7149 = VMAXPDZ256rr
23751
  { 7150, 5,  1,  0,  0,  0, 0x4029afe0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #7150 = VMAXPDZ256rrk
23752
  { 7151, 4,  1,  0,  0,  0, 0x4069afe0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #7151 = VMAXPDZ256rrkz
23753
  { 7152, 3,  1,  0,  0,  0, 0x1181afe0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #7152 = VMAXPDZrb
23754
  { 7153, 5,  1,  0,  0,  0, 0x11a1afe0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #7153 = VMAXPDZrbk
23755
  { 7154, 4,  1,  0,  0,  0, 0x11e1afe0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #7154 = VMAXPDZrbkz
23756
  { 7155, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081afe0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7155 = VMAXPDZrm
23757
  { 7156, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181afe0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7156 = VMAXPDZrmb
23758
  { 7157, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1afe0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #7157 = VMAXPDZrmbk
23759
  { 7158, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1afe0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #7158 = VMAXPDZrmbkz
23760
  { 7159, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1afe0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #7159 = VMAXPDZrmk
23761
  { 7160, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1afe0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #7160 = VMAXPDZrmkz
23762
  { 7161, 3,  1,  0,  0,  0, 0x8081afe0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #7161 = VMAXPDZrr
23763
  { 7162, 5,  1,  0,  0,  0, 0x80a1afe0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #7162 = VMAXPDZrrk
23764
  { 7163, 4,  1,  0,  0,  0, 0x80e1afe0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #7163 = VMAXPDZrrkz
23765
  { 7164, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x12fb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7164 = VMAXPDrm
23766
  { 7165, 3,  1,  0,  14, 0, 0x12fb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7165 = VMAXPDrr
23767
  { 7166, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x92fa8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7166 = VMAXPSYrm
23768
  { 7167, 3,  1,  0,  16, 0, 0x92fa8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7167 = VMAXPSYrr
23769
  { 7168, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012fe0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7168 = VMAXPSZ128rm
23770
  { 7169, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012fe0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7169 = VMAXPSZ128rmb
23771
  { 7170, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212fe0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #7170 = VMAXPSZ128rmbk
23772
  { 7171, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612fe0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #7171 = VMAXPSZ128rmbkz
23773
  { 7172, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212fe0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #7172 = VMAXPSZ128rmk
23774
  { 7173, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612fe0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #7173 = VMAXPSZ128rmkz
23775
  { 7174, 3,  1,  0,  0,  0, 0x20012fe0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7174 = VMAXPSZ128rr
23776
  { 7175, 5,  1,  0,  0,  0, 0x20212fe0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #7175 = VMAXPSZ128rrk
23777
  { 7176, 4,  1,  0,  0,  0, 0x20612fe0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #7176 = VMAXPSZ128rrkz
23778
  { 7177, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092fe0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7177 = VMAXPSZ256rm
23779
  { 7178, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092fe0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7178 = VMAXPSZ256rmb
23780
  { 7179, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292fe0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #7179 = VMAXPSZ256rmbk
23781
  { 7180, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692fe0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #7180 = VMAXPSZ256rmbkz
23782
  { 7181, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292fe0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #7181 = VMAXPSZ256rmk
23783
  { 7182, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692fe0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #7182 = VMAXPSZ256rmkz
23784
  { 7183, 3,  1,  0,  0,  0, 0x40092fe0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #7183 = VMAXPSZ256rr
23785
  { 7184, 5,  1,  0,  0,  0, 0x40292fe0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #7184 = VMAXPSZ256rrk
23786
  { 7185, 4,  1,  0,  0,  0, 0x40692fe0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #7185 = VMAXPSZ256rrkz
23787
  { 7186, 3,  1,  0,  0,  0, 0x9812fe0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #7186 = VMAXPSZrb
23788
  { 7187, 5,  1,  0,  0,  0, 0x9a12fe0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #7187 = VMAXPSZrbk
23789
  { 7188, 4,  1,  0,  0,  0, 0x9e12fe0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #7188 = VMAXPSZrbkz
23790
  { 7189, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812fe0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7189 = VMAXPSZrm
23791
  { 7190, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812fe0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7190 = VMAXPSZrmb
23792
  { 7191, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12fe0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #7191 = VMAXPSZrmbk
23793
  { 7192, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12fe0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #7192 = VMAXPSZrmbkz
23794
  { 7193, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12fe0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #7193 = VMAXPSZrmk
23795
  { 7194, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12fe0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #7194 = VMAXPSZrmkz
23796
  { 7195, 3,  1,  0,  0,  0, 0x80812fe0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #7195 = VMAXPSZrr
23797
  { 7196, 5,  1,  0,  0,  0, 0x80a12fe0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #7196 = VMAXPSZrrk
23798
  { 7197, 4,  1,  0,  0,  0, 0x80e12fe0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #7197 = VMAXPSZrrkz
23799
  { 7198, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x12fa8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7198 = VMAXPSrm
23800
  { 7199, 3,  1,  0,  16, 0, 0x12fa8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7199 = VMAXPSrr
23801
  { 7200, 7,  1,  0,  525,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011afe0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr },  // Inst #7200 = VMAXSDZrm
23802
  { 7201, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011afe0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7201 = VMAXSDZrm_Int
23803
  { 7202, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031afe0006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #7202 = VMAXSDZrm_Intk
23804
  { 7203, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071afe0006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #7203 = VMAXSDZrm_Intkz
23805
  { 7204, 3,  1,  0,  525,  0|(1ULL<<MCID::Commutable), 0x1011afe0006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr },  // Inst #7204 = VMAXSDZrr
23806
  { 7205, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x1011afe0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7205 = VMAXSDZrr_Int
23807
  { 7206, 5,  1,  0,  0,  0, 0x1031afe0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7206 = VMAXSDZrr_Intk
23808
  { 7207, 4,  1,  0,  0,  0, 0x1071afe0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7207 = VMAXSDZrr_Intkz
23809
  { 7208, 3,  1,  0,  0,  0, 0x1111afe0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7208 = VMAXSDZrrb
23810
  { 7209, 5,  1,  0,  0,  0, 0x1131afe0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7209 = VMAXSDZrrbk
23811
  { 7210, 4,  1,  0,  0,  0, 0x1171afe0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7210 = VMAXSDZrrbkz
23812
  { 7211, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x112fb0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #7211 = VMAXSDrm
23813
  { 7212, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x112fb0006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7212 = VMAXSDrm_Int
23814
  { 7213, 3,  1,  0,  18, 0, 0x112fb0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #7213 = VMAXSDrr
23815
  { 7214, 3,  1,  0,  18, 0, 0x112fb0006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7214 = VMAXSDrr_Int
23816
  { 7215, 7,  1,  0,  526,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112fe0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr },  // Inst #7215 = VMAXSSZrm
23817
  { 7216, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112fe0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7216 = VMAXSSZrm_Int
23818
  { 7217, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8312fe0005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #7217 = VMAXSSZrm_Intk
23819
  { 7218, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8712fe0005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #7218 = VMAXSSZrm_Intkz
23820
  { 7219, 3,  1,  0,  526,  0|(1ULL<<MCID::Commutable), 0x8112fe0005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr },  // Inst #7219 = VMAXSSZrr
23821
  { 7220, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x8112fe0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7220 = VMAXSSZrr_Int
23822
  { 7221, 5,  1,  0,  0,  0, 0x8312fe0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7221 = VMAXSSZrr_Intk
23823
  { 7222, 4,  1,  0,  0,  0, 0x8712fe0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7222 = VMAXSSZrr_Intkz
23824
  { 7223, 3,  1,  0,  0,  0, 0x9112fe0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7223 = VMAXSSZrrb
23825
  { 7224, 5,  1,  0,  0,  0, 0x9312fe0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7224 = VMAXSSZrrbk
23826
  { 7225, 4,  1,  0,  0,  0, 0x9712fe0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7225 = VMAXSSZrrbkz
23827
  { 7226, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x112fa8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #7226 = VMAXSSrm
23828
  { 7227, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x112fa8005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7227 = VMAXSSrm_Int
23829
  { 7228, 3,  1,  0,  20, 0, 0x112fa8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #7228 = VMAXSSrr
23830
  { 7229, 3,  1,  0,  20, 0, 0x112fa8005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7229 = VMAXSSrr_Int
23831
  { 7230, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004021ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #7230 = VMCALL
23832
  { 7231, 5,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x638000501eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #7231 = VMCLEARm
23833
  { 7232, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004034ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #7232 = VMFUNC
23834
  { 7233, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x92eb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7233 = VMINCPDYrm
23835
  { 7234, 3,  1,  0,  14, 0|(1ULL<<MCID::Commutable), 0x92eb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7234 = VMINCPDYrr
23836
  { 7235, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x12eb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7235 = VMINCPDrm
23837
  { 7236, 3,  1,  0,  14, 0|(1ULL<<MCID::Commutable), 0x12eb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7236 = VMINCPDrr
23838
  { 7237, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x92ea8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7237 = VMINCPSYrm
23839
  { 7238, 3,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x92ea8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7238 = VMINCPSYrr
23840
  { 7239, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x12ea8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7239 = VMINCPSrm
23841
  { 7240, 3,  1,  0,  16, 0|(1ULL<<MCID::Commutable), 0x12ea8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7240 = VMINCPSrr
23842
  { 7241, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x112eb0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #7241 = VMINCSDrm
23843
  { 7242, 3,  1,  0,  18, 0|(1ULL<<MCID::Commutable), 0x112eb0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #7242 = VMINCSDrr
23844
  { 7243, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x112ea8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #7243 = VMINCSSrm
23845
  { 7244, 3,  1,  0,  20, 0|(1ULL<<MCID::Commutable), 0x112ea8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #7244 = VMINCSSrr
23846
  { 7245, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x92eb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7245 = VMINPDYrm
23847
  { 7246, 3,  1,  0,  14, 0, 0x92eb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7246 = VMINPDYrr
23848
  { 7247, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001aee0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7247 = VMINPDZ128rm
23849
  { 7248, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101aee0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7248 = VMINPDZ128rmb
23850
  { 7249, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121aee0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #7249 = VMINPDZ128rmbk
23851
  { 7250, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161aee0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #7250 = VMINPDZ128rmbkz
23852
  { 7251, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021aee0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #7251 = VMINPDZ128rmk
23853
  { 7252, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061aee0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #7252 = VMINPDZ128rmkz
23854
  { 7253, 3,  1,  0,  0,  0, 0x2001aee0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7253 = VMINPDZ128rr
23855
  { 7254, 5,  1,  0,  0,  0, 0x2021aee0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #7254 = VMINPDZ128rrk
23856
  { 7255, 4,  1,  0,  0,  0, 0x2061aee0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #7255 = VMINPDZ128rrkz
23857
  { 7256, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009aee0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7256 = VMINPDZ256rm
23858
  { 7257, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109aee0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7257 = VMINPDZ256rmb
23859
  { 7258, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129aee0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #7258 = VMINPDZ256rmbk
23860
  { 7259, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169aee0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #7259 = VMINPDZ256rmbkz
23861
  { 7260, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029aee0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #7260 = VMINPDZ256rmk
23862
  { 7261, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069aee0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #7261 = VMINPDZ256rmkz
23863
  { 7262, 3,  1,  0,  0,  0, 0x4009aee0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #7262 = VMINPDZ256rr
23864
  { 7263, 5,  1,  0,  0,  0, 0x4029aee0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #7263 = VMINPDZ256rrk
23865
  { 7264, 4,  1,  0,  0,  0, 0x4069aee0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #7264 = VMINPDZ256rrkz
23866
  { 7265, 3,  1,  0,  0,  0, 0x1181aee0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #7265 = VMINPDZrb
23867
  { 7266, 5,  1,  0,  0,  0, 0x11a1aee0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #7266 = VMINPDZrbk
23868
  { 7267, 4,  1,  0,  0,  0, 0x11e1aee0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #7267 = VMINPDZrbkz
23869
  { 7268, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081aee0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7268 = VMINPDZrm
23870
  { 7269, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181aee0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7269 = VMINPDZrmb
23871
  { 7270, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1aee0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #7270 = VMINPDZrmbk
23872
  { 7271, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1aee0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #7271 = VMINPDZrmbkz
23873
  { 7272, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1aee0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #7272 = VMINPDZrmk
23874
  { 7273, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1aee0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #7273 = VMINPDZrmkz
23875
  { 7274, 3,  1,  0,  0,  0, 0x8081aee0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #7274 = VMINPDZrr
23876
  { 7275, 5,  1,  0,  0,  0, 0x80a1aee0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #7275 = VMINPDZrrk
23877
  { 7276, 4,  1,  0,  0,  0, 0x80e1aee0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #7276 = VMINPDZrrkz
23878
  { 7277, 7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x12eb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7277 = VMINPDrm
23879
  { 7278, 3,  1,  0,  14, 0, 0x12eb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7278 = VMINPDrr
23880
  { 7279, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x92ea8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7279 = VMINPSYrm
23881
  { 7280, 3,  1,  0,  16, 0, 0x92ea8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7280 = VMINPSYrr
23882
  { 7281, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012ee0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7281 = VMINPSZ128rm
23883
  { 7282, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012ee0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7282 = VMINPSZ128rmb
23884
  { 7283, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212ee0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #7283 = VMINPSZ128rmbk
23885
  { 7284, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612ee0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #7284 = VMINPSZ128rmbkz
23886
  { 7285, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212ee0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #7285 = VMINPSZ128rmk
23887
  { 7286, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612ee0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #7286 = VMINPSZ128rmkz
23888
  { 7287, 3,  1,  0,  0,  0, 0x20012ee0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7287 = VMINPSZ128rr
23889
  { 7288, 5,  1,  0,  0,  0, 0x20212ee0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #7288 = VMINPSZ128rrk
23890
  { 7289, 4,  1,  0,  0,  0, 0x20612ee0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #7289 = VMINPSZ128rrkz
23891
  { 7290, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092ee0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7290 = VMINPSZ256rm
23892
  { 7291, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092ee0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7291 = VMINPSZ256rmb
23893
  { 7292, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292ee0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #7292 = VMINPSZ256rmbk
23894
  { 7293, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692ee0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #7293 = VMINPSZ256rmbkz
23895
  { 7294, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292ee0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #7294 = VMINPSZ256rmk
23896
  { 7295, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692ee0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #7295 = VMINPSZ256rmkz
23897
  { 7296, 3,  1,  0,  0,  0, 0x40092ee0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #7296 = VMINPSZ256rr
23898
  { 7297, 5,  1,  0,  0,  0, 0x40292ee0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #7297 = VMINPSZ256rrk
23899
  { 7298, 4,  1,  0,  0,  0, 0x40692ee0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #7298 = VMINPSZ256rrkz
23900
  { 7299, 3,  1,  0,  0,  0, 0x9812ee0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #7299 = VMINPSZrb
23901
  { 7300, 5,  1,  0,  0,  0, 0x9a12ee0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #7300 = VMINPSZrbk
23902
  { 7301, 4,  1,  0,  0,  0, 0x9e12ee0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #7301 = VMINPSZrbkz
23903
  { 7302, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812ee0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7302 = VMINPSZrm
23904
  { 7303, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812ee0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7303 = VMINPSZrmb
23905
  { 7304, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12ee0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #7304 = VMINPSZrmbk
23906
  { 7305, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12ee0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #7305 = VMINPSZrmbkz
23907
  { 7306, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12ee0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #7306 = VMINPSZrmk
23908
  { 7307, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12ee0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #7307 = VMINPSZrmkz
23909
  { 7308, 3,  1,  0,  0,  0, 0x80812ee0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #7308 = VMINPSZrr
23910
  { 7309, 5,  1,  0,  0,  0, 0x80a12ee0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #7309 = VMINPSZrrk
23911
  { 7310, 4,  1,  0,  0,  0, 0x80e12ee0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #7310 = VMINPSZrrkz
23912
  { 7311, 7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x12ea8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7311 = VMINPSrm
23913
  { 7312, 3,  1,  0,  16, 0, 0x12ea8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7312 = VMINPSrr
23914
  { 7313, 7,  1,  0,  525,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011aee0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr },  // Inst #7313 = VMINSDZrm
23915
  { 7314, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011aee0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7314 = VMINSDZrm_Int
23916
  { 7315, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031aee0006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #7315 = VMINSDZrm_Intk
23917
  { 7316, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071aee0006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #7316 = VMINSDZrm_Intkz
23918
  { 7317, 3,  1,  0,  525,  0|(1ULL<<MCID::Commutable), 0x1011aee0006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr },  // Inst #7317 = VMINSDZrr
23919
  { 7318, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x1011aee0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7318 = VMINSDZrr_Int
23920
  { 7319, 5,  1,  0,  0,  0, 0x1031aee0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7319 = VMINSDZrr_Intk
23921
  { 7320, 4,  1,  0,  0,  0, 0x1071aee0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7320 = VMINSDZrr_Intkz
23922
  { 7321, 3,  1,  0,  0,  0, 0x1111aee0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7321 = VMINSDZrrb
23923
  { 7322, 5,  1,  0,  0,  0, 0x1131aee0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7322 = VMINSDZrrbk
23924
  { 7323, 4,  1,  0,  0,  0, 0x1171aee0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7323 = VMINSDZrrbkz
23925
  { 7324, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x112eb0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #7324 = VMINSDrm
23926
  { 7325, 7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x112eb0006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7325 = VMINSDrm_Int
23927
  { 7326, 3,  1,  0,  18, 0, 0x112eb0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #7326 = VMINSDrr
23928
  { 7327, 3,  1,  0,  18, 0, 0x112eb0006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7327 = VMINSDrr_Int
23929
  { 7328, 7,  1,  0,  526,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112ee0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr },  // Inst #7328 = VMINSSZrm
23930
  { 7329, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112ee0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7329 = VMINSSZrm_Int
23931
  { 7330, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8312ee0005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #7330 = VMINSSZrm_Intk
23932
  { 7331, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8712ee0005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #7331 = VMINSSZrm_Intkz
23933
  { 7332, 3,  1,  0,  526,  0|(1ULL<<MCID::Commutable), 0x8112ee0005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr },  // Inst #7332 = VMINSSZrr
23934
  { 7333, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x8112ee0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7333 = VMINSSZrr_Int
23935
  { 7334, 5,  1,  0,  0,  0, 0x8312ee0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7334 = VMINSSZrr_Intk
23936
  { 7335, 4,  1,  0,  0,  0, 0x8712ee0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7335 = VMINSSZrr_Intkz
23937
  { 7336, 3,  1,  0,  0,  0, 0x9112ee0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7336 = VMINSSZrrb
23938
  { 7337, 5,  1,  0,  0,  0, 0x9312ee0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7337 = VMINSSZrrbk
23939
  { 7338, 4,  1,  0,  0,  0, 0x9712ee0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7338 = VMINSSZrrbkz
23940
  { 7339, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x112ea8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #7339 = VMINSSrm
23941
  { 7340, 7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x112ea8005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7340 = VMINSSrm_Int
23942
  { 7341, 3,  1,  0,  20, 0, 0x112ea8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #7341 = VMINSSrr
23943
  { 7342, 3,  1,  0,  20, 0, 0x112ea8005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7342 = VMINSSrr_Int
23944
  { 7343, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004022ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #7343 = VMLAUNCH
23945
  { 7344, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403aULL, ImplicitList9, nullptr, nullptr, -1 ,nullptr },  // Inst #7344 = VMLOAD32
23946
  { 7345, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403aULL, ImplicitList10, nullptr, nullptr, -1 ,nullptr },  // Inst #7345 = VMLOAD64
23947
  { 7346, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004039ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #7346 = VMMCALL
23948
  { 7347, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1000b778005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7347 = VMOV64toPQIZrm
23949
  { 7348, 2,  1,  0,  550,  0, 0x2000b778005005ULL, nullptr, nullptr, OperandInfo656, -1 ,nullptr },  // Inst #7348 = VMOV64toPQIZrr
23950
  { 7349, 6,  1,  0,  316,  0|(1ULL<<MCID::MayLoad), 0xb720005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7349 = VMOV64toPQIrm
23951
  { 7350, 2,  1,  0,  784,  0, 0xb720005005ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr },  // Inst #7350 = VMOV64toPQIrr
23952
  { 7351, 2,  1,  0,  317,  0|(1ULL<<MCID::Bitcast), 0x2000b778005005ULL, nullptr, nullptr, OperandInfo657, -1 ,nullptr },  // Inst #7351 = VMOV64toSDZrr
23953
  { 7352, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x3f20005806ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #7352 = VMOV64toSDrm
23954
  { 7353, 2,  1,  0,  317,  0|(1ULL<<MCID::Bitcast), 0xb720005005ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr },  // Inst #7353 = VMOV64toSDrr
23955
  { 7354, 6,  0,  0,  318,  0|(1ULL<<MCID::MayStore), 0x814b0005004ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr },  // Inst #7354 = VMOVAPDYmr
23956
  { 7355, 6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x81430005006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #7355 = VMOVAPDYrm
23957
  { 7356, 2,  1,  0,  319,  0, 0x81430005005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7356 = VMOVAPDYrr
23958
  { 7357, 2,  1,  0,  319,  0, 0x814b0005003ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7357 = VMOVAPDYrr_REV
23959
  { 7358, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x200094f0005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7358 = VMOVAPDZ128mr
23960
  { 7359, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x202094f0005004ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #7359 = VMOVAPDZ128mrk
23961
  { 7360, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x20009470005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7360 = VMOVAPDZ128rm
23962
  { 7361, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x20209470005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #7361 = VMOVAPDZ128rmk
23963
  { 7362, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x20609470005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #7362 = VMOVAPDZ128rmkz
23964
  { 7363, 2,  1,  0,  0,  0, 0x20009470005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7363 = VMOVAPDZ128rr
23965
  { 7364, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x200094f0005003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7364 = VMOVAPDZ128rr_REV
23966
  { 7365, 4,  1,  0,  0,  0, 0x20209470005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #7365 = VMOVAPDZ128rrk
23967
  { 7366, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x202094f0005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7366 = VMOVAPDZ128rrk_REV
23968
  { 7367, 3,  1,  0,  0,  0, 0x20609470005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7367 = VMOVAPDZ128rrkz
23969
  { 7368, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x206094f0005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7368 = VMOVAPDZ128rrkz_REV
23970
  { 7369, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x400894f0005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7369 = VMOVAPDZ256mr
23971
  { 7370, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x402894f0005004ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #7370 = VMOVAPDZ256mrk
23972
  { 7371, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x40089470005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7371 = VMOVAPDZ256rm
23973
  { 7372, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x40289470005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #7372 = VMOVAPDZ256rmk
23974
  { 7373, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x40689470005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #7373 = VMOVAPDZ256rmkz
23975
  { 7374, 2,  1,  0,  0,  0, 0x40089470005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7374 = VMOVAPDZ256rr
23976
  { 7375, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x400894f0005003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7375 = VMOVAPDZ256rr_REV
23977
  { 7376, 4,  1,  0,  0,  0, 0x40289470005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #7376 = VMOVAPDZ256rrk
23978
  { 7377, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x402894f0005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7377 = VMOVAPDZ256rrk_REV
23979
  { 7378, 3,  1,  0,  0,  0, 0x40689470005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7378 = VMOVAPDZ256rrkz
23980
  { 7379, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x406894f0005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7379 = VMOVAPDZ256rrkz_REV
23981
  { 7380, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x808094f0005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7380 = VMOVAPDZmr
23982
  { 7381, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80a094f0005004ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #7381 = VMOVAPDZmrk
23983
  { 7382, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x80809470005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7382 = VMOVAPDZrm
23984
  { 7383, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80a09470005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #7383 = VMOVAPDZrmk
23985
  { 7384, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80e09470005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #7384 = VMOVAPDZrmkz
23986
  { 7385, 2,  1,  0,  0,  0, 0x80809470005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7385 = VMOVAPDZrr
23987
  { 7386, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x808094f0005003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7386 = VMOVAPDZrr_REV
23988
  { 7387, 4,  1,  0,  0,  0, 0x80a09470005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #7387 = VMOVAPDZrrk
23989
  { 7388, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a094f0005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7388 = VMOVAPDZrrk_REV
23990
  { 7389, 3,  1,  0,  0,  0, 0x80e09470005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7389 = VMOVAPDZrrkz
23991
  { 7390, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e094f0005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7390 = VMOVAPDZrrkz_REV
23992
  { 7391, 6,  0,  0,  318,  0|(1ULL<<MCID::MayStore), 0x14b0005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7391 = VMOVAPDmr
23993
  { 7392, 6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1430005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7392 = VMOVAPDrm
23994
  { 7393, 2,  1,  0,  319,  0, 0x1430005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7393 = VMOVAPDrr
23995
  { 7394, 2,  1,  0,  319,  0, 0x14b0005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7394 = VMOVAPDrr_REV
23996
  { 7395, 6,  0,  0,  318,  0|(1ULL<<MCID::MayStore), 0x814a8004804ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr },  // Inst #7395 = VMOVAPSYmr
23997
  { 7396, 6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x81428004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #7396 = VMOVAPSYrm
23998
  { 7397, 2,  1,  0,  319,  0, 0x81428004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7397 = VMOVAPSYrr
23999
  { 7398, 2,  1,  0,  319,  0, 0x814a8004803ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7398 = VMOVAPSYrr_REV
24000
  { 7399, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x200014e8004804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7399 = VMOVAPSZ128mr
24001
  { 7400, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x202014e8004804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #7400 = VMOVAPSZ128mrk
24002
  { 7401, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x20001468004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7401 = VMOVAPSZ128rm
24003
  { 7402, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x20201468004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #7402 = VMOVAPSZ128rmk
24004
  { 7403, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x20601468004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #7403 = VMOVAPSZ128rmkz
24005
  { 7404, 2,  1,  0,  0,  0, 0x20001468004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7404 = VMOVAPSZ128rr
24006
  { 7405, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x200014e8004803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7405 = VMOVAPSZ128rr_REV
24007
  { 7406, 4,  1,  0,  0,  0, 0x20201468004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #7406 = VMOVAPSZ128rrk
24008
  { 7407, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x202014e8004803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7407 = VMOVAPSZ128rrk_REV
24009
  { 7408, 3,  1,  0,  0,  0, 0x20601468004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7408 = VMOVAPSZ128rrkz
24010
  { 7409, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x206014e8004803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7409 = VMOVAPSZ128rrkz_REV
24011
  { 7410, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x400814e8004804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7410 = VMOVAPSZ256mr
24012
  { 7411, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x402814e8004804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #7411 = VMOVAPSZ256mrk
24013
  { 7412, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x40081468004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7412 = VMOVAPSZ256rm
24014
  { 7413, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x40281468004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #7413 = VMOVAPSZ256rmk
24015
  { 7414, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x40681468004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #7414 = VMOVAPSZ256rmkz
24016
  { 7415, 2,  1,  0,  0,  0, 0x40081468004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7415 = VMOVAPSZ256rr
24017
  { 7416, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x400814e8004803ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7416 = VMOVAPSZ256rr_REV
24018
  { 7417, 4,  1,  0,  0,  0, 0x40281468004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #7417 = VMOVAPSZ256rrk
24019
  { 7418, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x402814e8004803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7418 = VMOVAPSZ256rrk_REV
24020
  { 7419, 3,  1,  0,  0,  0, 0x40681468004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7419 = VMOVAPSZ256rrkz
24021
  { 7420, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x406814e8004803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7420 = VMOVAPSZ256rrkz_REV
24022
  { 7421, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x808014e8004804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7421 = VMOVAPSZmr
24023
  { 7422, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80a014e8004804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #7422 = VMOVAPSZmrk
24024
  { 7423, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x80801468004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7423 = VMOVAPSZrm
24025
  { 7424, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80a01468004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #7424 = VMOVAPSZrmk
24026
  { 7425, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80e01468004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #7425 = VMOVAPSZrmkz
24027
  { 7426, 2,  1,  0,  0,  0, 0x80801468004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7426 = VMOVAPSZrr
24028
  { 7427, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x808014e8004803ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7427 = VMOVAPSZrr_REV
24029
  { 7428, 4,  1,  0,  0,  0, 0x80a01468004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #7428 = VMOVAPSZrrk
24030
  { 7429, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a014e8004803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7429 = VMOVAPSZrrk_REV
24031
  { 7430, 3,  1,  0,  0,  0, 0x80e01468004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7430 = VMOVAPSZrrkz
24032
  { 7431, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e014e8004803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7431 = VMOVAPSZrrkz_REV
24033
  { 7432, 6,  0,  0,  318,  0|(1ULL<<MCID::MayStore), 0x14a8004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7432 = VMOVAPSmr
24034
  { 7433, 6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1428004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7433 = VMOVAPSrm
24035
  { 7434, 2,  1,  0,  319,  0, 0x1428004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7434 = VMOVAPSrr
24036
  { 7435, 2,  1,  0,  319,  0, 0x14a8004803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7435 = VMOVAPSrr_REV
24037
  { 7436, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80930006006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #7436 = VMOVDDUPYrm
24038
  { 7437, 2,  1,  0,  531,  0, 0x80930006005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7437 = VMOVDDUPYrr
24039
  { 7438, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10008960006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7438 = VMOVDDUPZ128rm
24040
  { 7439, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10208960006006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #7439 = VMOVDDUPZ128rmk
24041
  { 7440, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10608960006006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #7440 = VMOVDDUPZ128rmkz
24042
  { 7441, 2,  1,  0,  0,  0, 0x20008960006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7441 = VMOVDDUPZ128rr
24043
  { 7442, 4,  1,  0,  0,  0, 0x20208960006005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #7442 = VMOVDDUPZ128rrk
24044
  { 7443, 3,  1,  0,  0,  0, 0x20608960006005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7443 = VMOVDDUPZ128rrkz
24045
  { 7444, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40088978006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7444 = VMOVDDUPZ256rm
24046
  { 7445, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40288978006006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #7445 = VMOVDDUPZ256rmk
24047
  { 7446, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40688978006006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #7446 = VMOVDDUPZ256rmkz
24048
  { 7447, 2,  1,  0,  0,  0, 0x40088978006005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7447 = VMOVDDUPZ256rr
24049
  { 7448, 4,  1,  0,  0,  0, 0x40288978006005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #7448 = VMOVDDUPZ256rrk
24050
  { 7449, 3,  1,  0,  0,  0, 0x40688978006005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7449 = VMOVDDUPZ256rrkz
24051
  { 7450, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80808978006006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7450 = VMOVDDUPZrm
24052
  { 7451, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a08978006006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #7451 = VMOVDDUPZrmk
24053
  { 7452, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e08978006006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #7452 = VMOVDDUPZrmkz
24054
  { 7453, 2,  1,  0,  0,  0, 0x80808978006005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7453 = VMOVDDUPZrr
24055
  { 7454, 4,  1,  0,  0,  0, 0x80a08978006005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #7454 = VMOVDDUPZrrk
24056
  { 7455, 3,  1,  0,  0,  0, 0x80e08978006005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7455 = VMOVDDUPZrrkz
24057
  { 7456, 6,  1,  0,  322,  0|(1ULL<<MCID::MayLoad), 0x930006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7456 = VMOVDDUPrm
24058
  { 7457, 2,  1,  0,  323,  0, 0x930006005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7457 = VMOVDDUPrr
24059
  { 7458, 6,  1,  0,  550,  0|(1ULL<<MCID::MayLoad), 0x8003778005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7458 = VMOVDI2PDIZrm
24060
  { 7459, 2,  1,  0,  550,  0, 0x20003778005005ULL, nullptr, nullptr, OperandInfo659, -1 ,nullptr },  // Inst #7459 = VMOVDI2PDIZrr
24061
  { 7460, 6,  1,  0,  316,  0|(1ULL<<MCID::MayLoad), 0x3720005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7460 = VMOVDI2PDIrm
24062
  { 7461, 2,  1,  0,  782,  0, 0x3720005005ULL, nullptr, nullptr, OperandInfo245, -1 ,nullptr },  // Inst #7461 = VMOVDI2PDIrr
24063
  { 7462, 6,  1,  0,  550,  0|(1ULL<<MCID::MayLoad), 0x8003778005006ULL, nullptr, nullptr, OperandInfo418, -1 ,nullptr },  // Inst #7462 = VMOVDI2SSZrm
24064
  { 7463, 2,  1,  0,  550,  0|(1ULL<<MCID::Bitcast), 0x20003778005005ULL, nullptr, nullptr, OperandInfo660, -1 ,nullptr },  // Inst #7463 = VMOVDI2SSZrr
24065
  { 7464, 6,  1,  0,  316,  0|(1ULL<<MCID::MayLoad), 0x3720005006ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #7464 = VMOVDI2SSrm
24066
  { 7465, 2,  1,  0,  317,  0|(1ULL<<MCID::Bitcast), 0x3720005005ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #7465 = VMOVDI2SSrr
24067
  { 7466, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20003ff8005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7466 = VMOVDQA32Z128mr
24068
  { 7467, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20203ff8005004ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #7467 = VMOVDQA32Z128mrk
24069
  { 7468, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x200037f8005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7468 = VMOVDQA32Z128rm
24070
  { 7469, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x202037f8005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #7469 = VMOVDQA32Z128rmk
24071
  { 7470, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x206037f8005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #7470 = VMOVDQA32Z128rmkz
24072
  { 7471, 2,  1,  0,  0,  0, 0x200037f8005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7471 = VMOVDQA32Z128rr
24073
  { 7472, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003ff8005003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7472 = VMOVDQA32Z128rr_REV
24074
  { 7473, 4,  1,  0,  0,  0, 0x202037f8005005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #7473 = VMOVDQA32Z128rrk
24075
  { 7474, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203ff8005003ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7474 = VMOVDQA32Z128rrk_REV
24076
  { 7475, 3,  1,  0,  0,  0, 0x206037f8005005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7475 = VMOVDQA32Z128rrkz
24077
  { 7476, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603ff8005003ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7476 = VMOVDQA32Z128rrkz_REV
24078
  { 7477, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40083ff8005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7477 = VMOVDQA32Z256mr
24079
  { 7478, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40283ff8005004ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #7478 = VMOVDQA32Z256mrk
24080
  { 7479, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400837f8005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7479 = VMOVDQA32Z256rm
24081
  { 7480, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x402837f8005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #7480 = VMOVDQA32Z256rmk
24082
  { 7481, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x406837f8005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #7481 = VMOVDQA32Z256rmkz
24083
  { 7482, 2,  1,  0,  0,  0, 0x400837f8005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7482 = VMOVDQA32Z256rr
24084
  { 7483, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083ff8005003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7483 = VMOVDQA32Z256rr_REV
24085
  { 7484, 4,  1,  0,  0,  0, 0x402837f8005005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #7484 = VMOVDQA32Z256rrk
24086
  { 7485, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283ff8005003ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7485 = VMOVDQA32Z256rrk_REV
24087
  { 7486, 3,  1,  0,  0,  0, 0x406837f8005005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7486 = VMOVDQA32Z256rrkz
24088
  { 7487, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683ff8005003ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7487 = VMOVDQA32Z256rrkz_REV
24089
  { 7488, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80803ff8005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7488 = VMOVDQA32Zmr
24090
  { 7489, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80a03ff8005004ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #7489 = VMOVDQA32Zmrk
24091
  { 7490, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808037f8005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7490 = VMOVDQA32Zrm
24092
  { 7491, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80a037f8005006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #7491 = VMOVDQA32Zrmk
24093
  { 7492, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80e037f8005006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #7492 = VMOVDQA32Zrmkz
24094
  { 7493, 2,  1,  0,  0,  0, 0x808037f8005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7493 = VMOVDQA32Zrr
24095
  { 7494, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80803ff8005003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7494 = VMOVDQA32Zrr_REV
24096
  { 7495, 4,  1,  0,  0,  0, 0x80a037f8005005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #7495 = VMOVDQA32Zrrk
24097
  { 7496, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03ff8005003ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7496 = VMOVDQA32Zrrk_REV
24098
  { 7497, 3,  1,  0,  0,  0, 0x80e037f8005005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7497 = VMOVDQA32Zrrkz
24099
  { 7498, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03ff8005003ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7498 = VMOVDQA32Zrrkz_REV
24100
  { 7499, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x2000bff8005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7499 = VMOVDQA64Z128mr
24101
  { 7500, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x2020bff8005004ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #7500 = VMOVDQA64Z128mrk
24102
  { 7501, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x2000b7f8005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7501 = VMOVDQA64Z128rm
24103
  { 7502, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x2020b7f8005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #7502 = VMOVDQA64Z128rmk
24104
  { 7503, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x2060b7f8005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #7503 = VMOVDQA64Z128rmkz
24105
  { 7504, 2,  1,  0,  0,  0, 0x2000b7f8005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7504 = VMOVDQA64Z128rr
24106
  { 7505, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2000bff8005003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7505 = VMOVDQA64Z128rr_REV
24107
  { 7506, 4,  1,  0,  0,  0, 0x2020b7f8005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #7506 = VMOVDQA64Z128rrk
24108
  { 7507, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2020bff8005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7507 = VMOVDQA64Z128rrk_REV
24109
  { 7508, 3,  1,  0,  0,  0, 0x2060b7f8005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7508 = VMOVDQA64Z128rrkz
24110
  { 7509, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2060bff8005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7509 = VMOVDQA64Z128rrkz_REV
24111
  { 7510, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x4008bff8005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7510 = VMOVDQA64Z256mr
24112
  { 7511, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x4028bff8005004ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #7511 = VMOVDQA64Z256mrk
24113
  { 7512, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4008b7f8005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7512 = VMOVDQA64Z256rm
24114
  { 7513, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x4028b7f8005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #7513 = VMOVDQA64Z256rmk
24115
  { 7514, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x4068b7f8005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #7514 = VMOVDQA64Z256rmkz
24116
  { 7515, 2,  1,  0,  0,  0, 0x4008b7f8005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7515 = VMOVDQA64Z256rr
24117
  { 7516, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4008bff8005003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7516 = VMOVDQA64Z256rr_REV
24118
  { 7517, 4,  1,  0,  0,  0, 0x4028b7f8005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #7517 = VMOVDQA64Z256rrk
24119
  { 7518, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4028bff8005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7518 = VMOVDQA64Z256rrk_REV
24120
  { 7519, 3,  1,  0,  0,  0, 0x4068b7f8005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7519 = VMOVDQA64Z256rrkz
24121
  { 7520, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4068bff8005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7520 = VMOVDQA64Z256rrkz_REV
24122
  { 7521, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8080bff8005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7521 = VMOVDQA64Zmr
24123
  { 7522, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80a0bff8005004ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #7522 = VMOVDQA64Zmrk
24124
  { 7523, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x8080b7f8005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7523 = VMOVDQA64Zrm
24125
  { 7524, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80a0b7f8005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #7524 = VMOVDQA64Zrmk
24126
  { 7525, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80e0b7f8005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #7525 = VMOVDQA64Zrmkz
24127
  { 7526, 2,  1,  0,  0,  0, 0x8080b7f8005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7526 = VMOVDQA64Zrr
24128
  { 7527, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080bff8005003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7527 = VMOVDQA64Zrr_REV
24129
  { 7528, 4,  1,  0,  0,  0, 0x80a0b7f8005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #7528 = VMOVDQA64Zrrk
24130
  { 7529, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a0bff8005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7529 = VMOVDQA64Zrrk_REV
24131
  { 7530, 3,  1,  0,  0,  0, 0x80e0b7f8005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7530 = VMOVDQA64Zrrkz
24132
  { 7531, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e0bff8005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7531 = VMOVDQA64Zrrkz_REV
24133
  { 7532, 6,  0,  0,  318,  0|(1ULL<<MCID::MayStore), 0x83fb8005004ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr },  // Inst #7532 = VMOVDQAYmr
24134
  { 7533, 6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x837b8005006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #7533 = VMOVDQAYrm
24135
  { 7534, 2,  1,  0,  786,  0, 0x837b8005005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7534 = VMOVDQAYrr
24136
  { 7535, 2,  1,  0,  786,  0, 0x83fb8005003ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7535 = VMOVDQAYrr_REV
24137
  { 7536, 6,  0,  0,  318,  0|(1ULL<<MCID::MayStore), 0x3fb8005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7536 = VMOVDQAmr
24138
  { 7537, 6,  1,  0,  161,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x37b8005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7537 = VMOVDQArm
24139
  { 7538, 2,  1,  0,  786,  0, 0x37b8005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7538 = VMOVDQArr
24140
  { 7539, 2,  1,  0,  786,  0, 0x3fb8005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7539 = VMOVDQArr_REV
24141
  { 7540, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x2000bff8006004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7540 = VMOVDQU16Z128mr
24142
  { 7541, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x2020bff8006004ULL, nullptr, nullptr, OperandInfo661, -1 ,nullptr },  // Inst #7541 = VMOVDQU16Z128mrk
24143
  { 7542, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x2000b7f8006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7542 = VMOVDQU16Z128rm
24144
  { 7543, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x2020b7f8006006ULL, nullptr, nullptr, OperandInfo662, -1 ,nullptr },  // Inst #7543 = VMOVDQU16Z128rmk
24145
  { 7544, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x2060b7f8006006ULL, nullptr, nullptr, OperandInfo663, -1 ,nullptr },  // Inst #7544 = VMOVDQU16Z128rmkz
24146
  { 7545, 2,  1,  0,  0,  0, 0x2000b7f8006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7545 = VMOVDQU16Z128rr
24147
  { 7546, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2000bff8006003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7546 = VMOVDQU16Z128rr_REV
24148
  { 7547, 4,  1,  0,  0,  0, 0x2020b7f8006005ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr },  // Inst #7547 = VMOVDQU16Z128rrk
24149
  { 7548, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2020bff8006003ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #7548 = VMOVDQU16Z128rrk_REV
24150
  { 7549, 3,  1,  0,  0,  0, 0x2060b7f8006005ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #7549 = VMOVDQU16Z128rrkz
24151
  { 7550, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2060bff8006003ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #7550 = VMOVDQU16Z128rrkz_REV
24152
  { 7551, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x4008bff8006004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7551 = VMOVDQU16Z256mr
24153
  { 7552, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x4028bff8006004ULL, nullptr, nullptr, OperandInfo666, -1 ,nullptr },  // Inst #7552 = VMOVDQU16Z256mrk
24154
  { 7553, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4008b7f8006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7553 = VMOVDQU16Z256rm
24155
  { 7554, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x4028b7f8006006ULL, nullptr, nullptr, OperandInfo667, -1 ,nullptr },  // Inst #7554 = VMOVDQU16Z256rmk
24156
  { 7555, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x4068b7f8006006ULL, nullptr, nullptr, OperandInfo668, -1 ,nullptr },  // Inst #7555 = VMOVDQU16Z256rmkz
24157
  { 7556, 2,  1,  0,  0,  0, 0x4008b7f8006005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7556 = VMOVDQU16Z256rr
24158
  { 7557, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4008bff8006003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7557 = VMOVDQU16Z256rr_REV
24159
  { 7558, 4,  1,  0,  0,  0, 0x4028b7f8006005ULL, nullptr, nullptr, OperandInfo669, -1 ,nullptr },  // Inst #7558 = VMOVDQU16Z256rrk
24160
  { 7559, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4028bff8006003ULL, nullptr, nullptr, OperandInfo670, -1 ,nullptr },  // Inst #7559 = VMOVDQU16Z256rrk_REV
24161
  { 7560, 3,  1,  0,  0,  0, 0x4068b7f8006005ULL, nullptr, nullptr, OperandInfo670, -1 ,nullptr },  // Inst #7560 = VMOVDQU16Z256rrkz
24162
  { 7561, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4068bff8006003ULL, nullptr, nullptr, OperandInfo670, -1 ,nullptr },  // Inst #7561 = VMOVDQU16Z256rrkz_REV
24163
  { 7562, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8080bff8006004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7562 = VMOVDQU16Zmr
24164
  { 7563, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80a0bff8006004ULL, nullptr, nullptr, OperandInfo671, -1 ,nullptr },  // Inst #7563 = VMOVDQU16Zmrk
24165
  { 7564, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x8080b7f8006006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7564 = VMOVDQU16Zrm
24166
  { 7565, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80a0b7f8006006ULL, nullptr, nullptr, OperandInfo672, -1 ,nullptr },  // Inst #7565 = VMOVDQU16Zrmk
24167
  { 7566, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80e0b7f8006006ULL, nullptr, nullptr, OperandInfo673, -1 ,nullptr },  // Inst #7566 = VMOVDQU16Zrmkz
24168
  { 7567, 2,  1,  0,  0,  0, 0x8080b7f8006005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7567 = VMOVDQU16Zrr
24169
  { 7568, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080bff8006003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7568 = VMOVDQU16Zrr_REV
24170
  { 7569, 4,  1,  0,  0,  0, 0x80a0b7f8006005ULL, nullptr, nullptr, OperandInfo674, -1 ,nullptr },  // Inst #7569 = VMOVDQU16Zrrk
24171
  { 7570, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a0bff8006003ULL, nullptr, nullptr, OperandInfo675, -1 ,nullptr },  // Inst #7570 = VMOVDQU16Zrrk_REV
24172
  { 7571, 3,  1,  0,  0,  0, 0x80e0b7f8006005ULL, nullptr, nullptr, OperandInfo675, -1 ,nullptr },  // Inst #7571 = VMOVDQU16Zrrkz
24173
  { 7572, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e0bff8006003ULL, nullptr, nullptr, OperandInfo675, -1 ,nullptr },  // Inst #7572 = VMOVDQU16Zrrkz_REV
24174
  { 7573, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20003ff8005804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7573 = VMOVDQU32Z128mr
24175
  { 7574, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20203ff8005804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #7574 = VMOVDQU32Z128mrk
24176
  { 7575, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x200037f8005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7575 = VMOVDQU32Z128rm
24177
  { 7576, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x202037f8005806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #7576 = VMOVDQU32Z128rmk
24178
  { 7577, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x206037f8005806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #7577 = VMOVDQU32Z128rmkz
24179
  { 7578, 2,  1,  0,  0,  0, 0x200037f8005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7578 = VMOVDQU32Z128rr
24180
  { 7579, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003ff8005803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7579 = VMOVDQU32Z128rr_REV
24181
  { 7580, 4,  1,  0,  0,  0, 0x202037f8005805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #7580 = VMOVDQU32Z128rrk
24182
  { 7581, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203ff8005803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7581 = VMOVDQU32Z128rrk_REV
24183
  { 7582, 3,  1,  0,  0,  0, 0x206037f8005805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7582 = VMOVDQU32Z128rrkz
24184
  { 7583, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603ff8005803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7583 = VMOVDQU32Z128rrkz_REV
24185
  { 7584, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40083ff8005804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7584 = VMOVDQU32Z256mr
24186
  { 7585, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40283ff8005804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #7585 = VMOVDQU32Z256mrk
24187
  { 7586, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400837f8005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7586 = VMOVDQU32Z256rm
24188
  { 7587, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x402837f8005806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #7587 = VMOVDQU32Z256rmk
24189
  { 7588, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x406837f8005806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #7588 = VMOVDQU32Z256rmkz
24190
  { 7589, 2,  1,  0,  0,  0, 0x400837f8005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7589 = VMOVDQU32Z256rr
24191
  { 7590, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083ff8005803ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7590 = VMOVDQU32Z256rr_REV
24192
  { 7591, 4,  1,  0,  0,  0, 0x402837f8005805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #7591 = VMOVDQU32Z256rrk
24193
  { 7592, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283ff8005803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7592 = VMOVDQU32Z256rrk_REV
24194
  { 7593, 3,  1,  0,  0,  0, 0x406837f8005805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7593 = VMOVDQU32Z256rrkz
24195
  { 7594, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683ff8005803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7594 = VMOVDQU32Z256rrkz_REV
24196
  { 7595, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80803ff8005804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7595 = VMOVDQU32Zmr
24197
  { 7596, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80a03ff8005804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #7596 = VMOVDQU32Zmrk
24198
  { 7597, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808037f8005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7597 = VMOVDQU32Zrm
24199
  { 7598, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80a037f8005806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #7598 = VMOVDQU32Zrmk
24200
  { 7599, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80e037f8005806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #7599 = VMOVDQU32Zrmkz
24201
  { 7600, 2,  1,  0,  0,  0, 0x808037f8005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7600 = VMOVDQU32Zrr
24202
  { 7601, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80803ff8005803ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7601 = VMOVDQU32Zrr_REV
24203
  { 7602, 4,  1,  0,  0,  0, 0x80a037f8005805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #7602 = VMOVDQU32Zrrk
24204
  { 7603, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03ff8005803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7603 = VMOVDQU32Zrrk_REV
24205
  { 7604, 3,  1,  0,  0,  0, 0x80e037f8005805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7604 = VMOVDQU32Zrrkz
24206
  { 7605, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03ff8005803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7605 = VMOVDQU32Zrrkz_REV
24207
  { 7606, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x2000bff8005804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7606 = VMOVDQU64Z128mr
24208
  { 7607, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x2020bff8005804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #7607 = VMOVDQU64Z128mrk
24209
  { 7608, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x2000b7f8005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7608 = VMOVDQU64Z128rm
24210
  { 7609, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x2020b7f8005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #7609 = VMOVDQU64Z128rmk
24211
  { 7610, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x2060b7f8005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #7610 = VMOVDQU64Z128rmkz
24212
  { 7611, 2,  1,  0,  0,  0, 0x2000b7f8005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7611 = VMOVDQU64Z128rr
24213
  { 7612, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2000bff8005803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7612 = VMOVDQU64Z128rr_REV
24214
  { 7613, 4,  1,  0,  0,  0, 0x2020b7f8005805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #7613 = VMOVDQU64Z128rrk
24215
  { 7614, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2020bff8005803ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7614 = VMOVDQU64Z128rrk_REV
24216
  { 7615, 3,  1,  0,  0,  0, 0x2060b7f8005805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7615 = VMOVDQU64Z128rrkz
24217
  { 7616, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2060bff8005803ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7616 = VMOVDQU64Z128rrkz_REV
24218
  { 7617, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x4008bff8005804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7617 = VMOVDQU64Z256mr
24219
  { 7618, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x4028bff8005804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #7618 = VMOVDQU64Z256mrk
24220
  { 7619, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4008b7f8005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7619 = VMOVDQU64Z256rm
24221
  { 7620, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x4028b7f8005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #7620 = VMOVDQU64Z256rmk
24222
  { 7621, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x4068b7f8005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #7621 = VMOVDQU64Z256rmkz
24223
  { 7622, 2,  1,  0,  0,  0, 0x4008b7f8005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7622 = VMOVDQU64Z256rr
24224
  { 7623, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4008bff8005803ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7623 = VMOVDQU64Z256rr_REV
24225
  { 7624, 4,  1,  0,  0,  0, 0x4028b7f8005805ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #7624 = VMOVDQU64Z256rrk
24226
  { 7625, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4028bff8005803ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7625 = VMOVDQU64Z256rrk_REV
24227
  { 7626, 3,  1,  0,  0,  0, 0x4068b7f8005805ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7626 = VMOVDQU64Z256rrkz
24228
  { 7627, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4068bff8005803ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7627 = VMOVDQU64Z256rrkz_REV
24229
  { 7628, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8080bff8005804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7628 = VMOVDQU64Zmr
24230
  { 7629, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80a0bff8005804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #7629 = VMOVDQU64Zmrk
24231
  { 7630, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x8080b7f8005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7630 = VMOVDQU64Zrm
24232
  { 7631, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80a0b7f8005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #7631 = VMOVDQU64Zrmk
24233
  { 7632, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80e0b7f8005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #7632 = VMOVDQU64Zrmkz
24234
  { 7633, 2,  1,  0,  0,  0, 0x8080b7f8005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7633 = VMOVDQU64Zrr
24235
  { 7634, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080bff8005803ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7634 = VMOVDQU64Zrr_REV
24236
  { 7635, 4,  1,  0,  0,  0, 0x80a0b7f8005805ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #7635 = VMOVDQU64Zrrk
24237
  { 7636, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a0bff8005803ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7636 = VMOVDQU64Zrrk_REV
24238
  { 7637, 3,  1,  0,  0,  0, 0x80e0b7f8005805ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7637 = VMOVDQU64Zrrkz
24239
  { 7638, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e0bff8005803ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7638 = VMOVDQU64Zrrkz_REV
24240
  { 7639, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20003ff8006004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7639 = VMOVDQU8Z128mr
24241
  { 7640, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20203ff8006004ULL, nullptr, nullptr, OperandInfo676, -1 ,nullptr },  // Inst #7640 = VMOVDQU8Z128mrk
24242
  { 7641, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x200037f8006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7641 = VMOVDQU8Z128rm
24243
  { 7642, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x202037f8006006ULL, nullptr, nullptr, OperandInfo677, -1 ,nullptr },  // Inst #7642 = VMOVDQU8Z128rmk
24244
  { 7643, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x206037f8006006ULL, nullptr, nullptr, OperandInfo678, -1 ,nullptr },  // Inst #7643 = VMOVDQU8Z128rmkz
24245
  { 7644, 2,  1,  0,  0,  0, 0x200037f8006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7644 = VMOVDQU8Z128rr
24246
  { 7645, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003ff8006003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7645 = VMOVDQU8Z128rr_REV
24247
  { 7646, 4,  1,  0,  0,  0, 0x202037f8006005ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #7646 = VMOVDQU8Z128rrk
24248
  { 7647, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203ff8006003ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #7647 = VMOVDQU8Z128rrk_REV
24249
  { 7648, 3,  1,  0,  0,  0, 0x206037f8006005ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #7648 = VMOVDQU8Z128rrkz
24250
  { 7649, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603ff8006003ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #7649 = VMOVDQU8Z128rrkz_REV
24251
  { 7650, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40083ff8006004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7650 = VMOVDQU8Z256mr
24252
  { 7651, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40283ff8006004ULL, nullptr, nullptr, OperandInfo681, -1 ,nullptr },  // Inst #7651 = VMOVDQU8Z256mrk
24253
  { 7652, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400837f8006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7652 = VMOVDQU8Z256rm
24254
  { 7653, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x402837f8006006ULL, nullptr, nullptr, OperandInfo682, -1 ,nullptr },  // Inst #7653 = VMOVDQU8Z256rmk
24255
  { 7654, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x406837f8006006ULL, nullptr, nullptr, OperandInfo683, -1 ,nullptr },  // Inst #7654 = VMOVDQU8Z256rmkz
24256
  { 7655, 2,  1,  0,  0,  0, 0x400837f8006005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7655 = VMOVDQU8Z256rr
24257
  { 7656, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083ff8006003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7656 = VMOVDQU8Z256rr_REV
24258
  { 7657, 4,  1,  0,  0,  0, 0x402837f8006005ULL, nullptr, nullptr, OperandInfo684, -1 ,nullptr },  // Inst #7657 = VMOVDQU8Z256rrk
24259
  { 7658, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283ff8006003ULL, nullptr, nullptr, OperandInfo685, -1 ,nullptr },  // Inst #7658 = VMOVDQU8Z256rrk_REV
24260
  { 7659, 3,  1,  0,  0,  0, 0x406837f8006005ULL, nullptr, nullptr, OperandInfo685, -1 ,nullptr },  // Inst #7659 = VMOVDQU8Z256rrkz
24261
  { 7660, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683ff8006003ULL, nullptr, nullptr, OperandInfo685, -1 ,nullptr },  // Inst #7660 = VMOVDQU8Z256rrkz_REV
24262
  { 7661, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80803ff8006004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7661 = VMOVDQU8Zmr
24263
  { 7662, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80a03ff8006004ULL, nullptr, nullptr, OperandInfo686, -1 ,nullptr },  // Inst #7662 = VMOVDQU8Zmrk
24264
  { 7663, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808037f8006006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7663 = VMOVDQU8Zrm
24265
  { 7664, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80a037f8006006ULL, nullptr, nullptr, OperandInfo687, -1 ,nullptr },  // Inst #7664 = VMOVDQU8Zrmk
24266
  { 7665, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80e037f8006006ULL, nullptr, nullptr, OperandInfo688, -1 ,nullptr },  // Inst #7665 = VMOVDQU8Zrmkz
24267
  { 7666, 2,  1,  0,  0,  0, 0x808037f8006005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7666 = VMOVDQU8Zrr
24268
  { 7667, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80803ff8006003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7667 = VMOVDQU8Zrr_REV
24269
  { 7668, 4,  1,  0,  0,  0, 0x80a037f8006005ULL, nullptr, nullptr, OperandInfo689, -1 ,nullptr },  // Inst #7668 = VMOVDQU8Zrrk
24270
  { 7669, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03ff8006003ULL, nullptr, nullptr, OperandInfo690, -1 ,nullptr },  // Inst #7669 = VMOVDQU8Zrrk_REV
24271
  { 7670, 3,  1,  0,  0,  0, 0x80e037f8006005ULL, nullptr, nullptr, OperandInfo690, -1 ,nullptr },  // Inst #7670 = VMOVDQU8Zrrkz
24272
  { 7671, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03ff8006003ULL, nullptr, nullptr, OperandInfo690, -1 ,nullptr },  // Inst #7671 = VMOVDQU8Zrrkz_REV
24273
  { 7672, 6,  0,  0,  325,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x83fb8005804ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr },  // Inst #7672 = VMOVDQUYmr
24274
  { 7673, 6,  1,  0,  326,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x837b8005806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #7673 = VMOVDQUYrm
24275
  { 7674, 2,  1,  0,  787,  0, 0x837b8005805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7674 = VMOVDQUYrr
24276
  { 7675, 2,  1,  0,  787,  0, 0x83fb8005803ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7675 = VMOVDQUYrr_REV
24277
  { 7676, 6,  0,  0,  325,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3fb8005804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7676 = VMOVDQUmr
24278
  { 7677, 6,  1,  0,  326,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x37b8005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7677 = VMOVDQUrm
24279
  { 7678, 2,  1,  0,  787,  0, 0x37b8005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7678 = VMOVDQUrr
24280
  { 7679, 2,  1,  0,  787,  0, 0x3fb8005803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7679 = VMOVDQUrr_REV
24281
  { 7680, 3,  1,  0,  551,  0, 0x20010968004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7680 = VMOVHLPSZrr
24282
  { 7681, 3,  1,  0,  323,  0, 0x10928004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7681 = VMOVHLPSrr
24283
  { 7682, 6,  0,  0,  551,  0|(1ULL<<MCID::MayStore), 0x10008bf0005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7682 = VMOVHPDZ128mr
24284
  { 7683, 7,  1,  0,  551,  0|(1ULL<<MCID::MayLoad), 0x10018b60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7683 = VMOVHPDZ128rm
24285
  { 7684, 6,  0,  0,  328,  0|(1ULL<<MCID::MayStore), 0xbb0005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7684 = VMOVHPDmr
24286
  { 7685, 7,  1,  0,  329,  0|(1ULL<<MCID::MayLoad), 0x10b30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7685 = VMOVHPDrm
24287
  { 7686, 6,  0,  0,  551,  0|(1ULL<<MCID::MayStore), 0x10000be8004804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7686 = VMOVHPSZ128mr
24288
  { 7687, 7,  1,  0,  551,  0|(1ULL<<MCID::MayLoad), 0x10010b60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7687 = VMOVHPSZ128rm
24289
  { 7688, 6,  0,  0,  328,  0|(1ULL<<MCID::MayStore), 0xba8004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7688 = VMOVHPSmr
24290
  { 7689, 7,  1,  0,  329,  0|(1ULL<<MCID::MayLoad), 0x10b28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7689 = VMOVHPSrm
24291
  { 7690, 3,  1,  0,  551,  0, 0x20010b68004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7690 = VMOVLHPSZrr
24292
  { 7691, 3,  1,  0,  323,  0, 0x10b28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7691 = VMOVLHPSrr
24293
  { 7692, 6,  0,  0,  551,  0|(1ULL<<MCID::MayStore), 0x100089f0005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7692 = VMOVLPDZ128mr
24294
  { 7693, 7,  1,  0,  551,  0|(1ULL<<MCID::MayLoad), 0x10018960005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7693 = VMOVLPDZ128rm
24295
  { 7694, 6,  0,  0,  328,  0|(1ULL<<MCID::MayStore), 0x9b0005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7694 = VMOVLPDmr
24296
  { 7695, 7,  1,  0,  329,  0|(1ULL<<MCID::MayLoad), 0x10930005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7695 = VMOVLPDrm
24297
  { 7696, 6,  0,  0,  551,  0|(1ULL<<MCID::MayStore), 0x100009e8004804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7696 = VMOVLPSZ128mr
24298
  { 7697, 7,  1,  0,  551,  0|(1ULL<<MCID::MayLoad), 0x10010960004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7697 = VMOVLPSZ128rm
24299
  { 7698, 6,  0,  0,  328,  0|(1ULL<<MCID::MayStore), 0x9a8004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7698 = VMOVLPSmr
24300
  { 7699, 7,  1,  0,  329,  0|(1ULL<<MCID::MayLoad), 0x10928004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7699 = VMOVLPSrm
24301
  { 7700, 2,  1,  0,  840,  0, 0x82830005005ULL, nullptr, nullptr, OperandInfo691, -1 ,nullptr },  // Inst #7700 = VMOVMSKPDYrr
24302
  { 7701, 2,  1,  0,  839,  0, 0x2830005005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #7701 = VMOVMSKPDrr
24303
  { 7702, 2,  1,  0,  840,  0, 0x82828004805ULL, nullptr, nullptr, OperandInfo691, -1 ,nullptr },  // Inst #7702 = VMOVMSKPSYrr
24304
  { 7703, 2,  1,  0,  839,  0, 0x2828004805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #7703 = VMOVMSKPSrr
24305
  { 7704, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x81538009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #7704 = VMOVNTDQAYrm
24306
  { 7705, 6,  1,  0,  206,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20001578009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7705 = VMOVNTDQAZ128rm
24307
  { 7706, 6,  1,  0,  206,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40081578009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7706 = VMOVNTDQAZ256rm
24308
  { 7707, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80801578009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7707 = VMOVNTDQAZrm
24309
  { 7708, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x1538009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7708 = VMOVNTDQArm
24310
  { 7709, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x873b8005004ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr },  // Inst #7709 = VMOVNTDQYmr
24311
  { 7710, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x200073f8005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7710 = VMOVNTDQZ128mr
24312
  { 7711, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x400873f8005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7711 = VMOVNTDQZ256mr
24313
  { 7712, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x808073f8005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7712 = VMOVNTDQZmr
24314
  { 7713, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x73b8005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7713 = VMOVNTDQmr
24315
  { 7714, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x815b0005004ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr },  // Inst #7714 = VMOVNTPDYmr
24316
  { 7715, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x200095f0005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7715 = VMOVNTPDZ128mr
24317
  { 7716, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x400895f0005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7716 = VMOVNTPDZ256mr
24318
  { 7717, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x808095f0005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7717 = VMOVNTPDZmr
24319
  { 7718, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x15b0005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7718 = VMOVNTPDmr
24320
  { 7719, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x815a8004804ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr },  // Inst #7719 = VMOVNTPSYmr
24321
  { 7720, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x200015e8004804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7720 = VMOVNTPSZ128mr
24322
  { 7721, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x400815e8004804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7721 = VMOVNTPSZ256mr
24323
  { 7722, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x808015e8004804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7722 = VMOVNTPSZmr
24324
  { 7723, 6,  0,  0,  331,  0|(1ULL<<MCID::MayStore), 0x15a8004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7723 = VMOVNTPSmr
24325
  { 7724, 6,  0,  0,  550,  0|(1ULL<<MCID::MayStore), 0x8003f78005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7724 = VMOVPDI2DIZmr
24326
  { 7725, 2,  1,  0,  552,  0, 0x20003f78005003ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr },  // Inst #7725 = VMOVPDI2DIZrr
24327
  { 7726, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0x3f20005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7726 = VMOVPDI2DImr
24328
  { 7727, 2,  1,  0,  780,  0, 0x3f20005003ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #7727 = VMOVPDI2DIrr
24329
  { 7728, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0x1000eb60005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7728 = VMOVPQI2QIZmr
24330
  { 7729, 2,  1,  0,  0,  0, 0x2000eb78005003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7729 = VMOVPQI2QIZrr
24331
  { 7730, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0x6b38005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7730 = VMOVPQI2QImr
24332
  { 7731, 2,  1,  0,  334,  0, 0x6b20005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7731 = VMOVPQI2QIrr
24333
  { 7732, 6,  0,  0,  552,  0|(1ULL<<MCID::MayStore), 0x2000bf60005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7732 = VMOVPQIto64Zmr
24334
  { 7733, 2,  1,  0,  552,  0, 0x2000bf60005003ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr },  // Inst #7733 = VMOVPQIto64Zrr
24335
  { 7734, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0xbf20005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7734 = VMOVPQIto64rm
24336
  { 7735, 2,  1,  0,  783,  0, 0xbf20005003ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr },  // Inst #7735 = VMOVPQIto64rr
24337
  { 7736, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1000bf60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7736 = VMOVQI2PQIZrm
24338
  { 7737, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x3f38005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7737 = VMOVQI2PQIrm
24339
  { 7738, 6,  0,  0,  553,  0|(1ULL<<MCID::MayStore), 0x101088f0006004ULL, nullptr, nullptr, OperandInfo692, -1 ,nullptr },  // Inst #7738 = VMOVSDZmr
24340
  { 7739, 7,  0,  0,  553,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x103088f0006004ULL, nullptr, nullptr, OperandInfo693, -1 ,nullptr },  // Inst #7739 = VMOVSDZmrk
24341
  { 7740, 6,  1,  0,  554,  0|(1ULL<<MCID::MayLoad), 0x10108870006006ULL, nullptr, nullptr, OperandInfo416, -1 ,nullptr },  // Inst #7740 = VMOVSDZrm
24342
  { 7741, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10108860006006ULL, nullptr, nullptr, OperandInfo694, -1 ,nullptr },  // Inst #7741 = VMOVSDZrm_Int
24343
  { 7742, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10308860006006ULL, nullptr, nullptr, OperandInfo695, -1 ,nullptr },  // Inst #7742 = VMOVSDZrm_Intk
24344
  { 7743, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10708860006006ULL, nullptr, nullptr, OperandInfo695, -1 ,nullptr },  // Inst #7743 = VMOVSDZrm_Intkz
24345
  { 7744, 3,  1,  0,  555,  0, 0x10118870006005ULL, nullptr, nullptr, OperandInfo696, -1 ,nullptr },  // Inst #7744 = VMOVSDZrr
24346
  { 7745, 3,  1,  0,  0,  0, 0x10118860006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7745 = VMOVSDZrr_Int
24347
  { 7746, 5,  1,  0,  0,  0, 0x10318860006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7746 = VMOVSDZrr_Intk
24348
  { 7747, 4,  1,  0,  0,  0, 0x10718860006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7747 = VMOVSDZrr_Intkz
24349
  { 7748, 6,  0,  0,  336,  0|(1ULL<<MCID::MayStore), 0x1008b0006004ULL, nullptr, nullptr, OperandInfo246, -1 ,nullptr },  // Inst #7748 = VMOVSDmr
24350
  { 7749, 6,  1,  0,  337,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x100830006006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr },  // Inst #7749 = VMOVSDrm
24351
  { 7750, 3,  1,  0,  338,  0, 0x110830006005ULL, nullptr, nullptr, OperandInfo697, -1 ,nullptr },  // Inst #7750 = VMOVSDrr
24352
  { 7751, 3,  1,  0,  338,  0, 0x1108a0006003ULL, nullptr, nullptr, OperandInfo697, -1 ,nullptr },  // Inst #7751 = VMOVSDrr_REV
24353
  { 7752, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0x1000bf78005004ULL, nullptr, nullptr, OperandInfo692, -1 ,nullptr },  // Inst #7752 = VMOVSDto64Zmr
24354
  { 7753, 2,  1,  0,  317,  0|(1ULL<<MCID::Bitcast), 0x2000bf78005003ULL, nullptr, nullptr, OperandInfo501, -1 ,nullptr },  // Inst #7753 = VMOVSDto64Zrr
24355
  { 7754, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0xbf20005004ULL, nullptr, nullptr, OperandInfo246, -1 ,nullptr },  // Inst #7754 = VMOVSDto64mr
24356
  { 7755, 2,  1,  0,  317,  0|(1ULL<<MCID::Bitcast), 0xbf20005003ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr },  // Inst #7755 = VMOVSDto64rr
24357
  { 7756, 6,  1,  0,  322,  0|(1ULL<<MCID::MayLoad), 0x80b28005806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #7756 = VMOVSHDUPYrm
24358
  { 7757, 2,  1,  0,  323,  0, 0x80b28005805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7757 = VMOVSHDUPYrr
24359
  { 7758, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20000b78005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7758 = VMOVSHDUPZ128rm
24360
  { 7759, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20200b78005806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #7759 = VMOVSHDUPZ128rmk
24361
  { 7760, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20600b78005806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #7760 = VMOVSHDUPZ128rmkz
24362
  { 7761, 2,  1,  0,  0,  0, 0x20000b78005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7761 = VMOVSHDUPZ128rr
24363
  { 7762, 4,  1,  0,  0,  0, 0x20200b78005805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #7762 = VMOVSHDUPZ128rrk
24364
  { 7763, 3,  1,  0,  0,  0, 0x20600b78005805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7763 = VMOVSHDUPZ128rrkz
24365
  { 7764, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40080b78005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7764 = VMOVSHDUPZ256rm
24366
  { 7765, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40280b78005806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #7765 = VMOVSHDUPZ256rmk
24367
  { 7766, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40680b78005806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #7766 = VMOVSHDUPZ256rmkz
24368
  { 7767, 2,  1,  0,  0,  0, 0x40080b78005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7767 = VMOVSHDUPZ256rr
24369
  { 7768, 4,  1,  0,  0,  0, 0x40280b78005805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #7768 = VMOVSHDUPZ256rrk
24370
  { 7769, 3,  1,  0,  0,  0, 0x40680b78005805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7769 = VMOVSHDUPZ256rrkz
24371
  { 7770, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80800b78005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7770 = VMOVSHDUPZrm
24372
  { 7771, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a00b78005806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #7771 = VMOVSHDUPZrmk
24373
  { 7772, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e00b78005806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #7772 = VMOVSHDUPZrmkz
24374
  { 7773, 2,  1,  0,  0,  0, 0x80800b78005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7773 = VMOVSHDUPZrr
24375
  { 7774, 4,  1,  0,  0,  0, 0x80a00b78005805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #7774 = VMOVSHDUPZrrk
24376
  { 7775, 3,  1,  0,  0,  0, 0x80e00b78005805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7775 = VMOVSHDUPZrrkz
24377
  { 7776, 6,  1,  0,  322,  0|(1ULL<<MCID::MayLoad), 0xb28005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7776 = VMOVSHDUPrm
24378
  { 7777, 2,  1,  0,  323,  0, 0xb28005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7777 = VMOVSHDUPrr
24379
  { 7778, 6,  1,  0,  322,  0|(1ULL<<MCID::MayLoad), 0x80928005806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #7778 = VMOVSLDUPYrm
24380
  { 7779, 2,  1,  0,  323,  0, 0x80928005805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7779 = VMOVSLDUPYrr
24381
  { 7780, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20000978005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7780 = VMOVSLDUPZ128rm
24382
  { 7781, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20200978005806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #7781 = VMOVSLDUPZ128rmk
24383
  { 7782, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20600978005806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #7782 = VMOVSLDUPZ128rmkz
24384
  { 7783, 2,  1,  0,  0,  0, 0x20000978005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7783 = VMOVSLDUPZ128rr
24385
  { 7784, 4,  1,  0,  0,  0, 0x20200978005805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #7784 = VMOVSLDUPZ128rrk
24386
  { 7785, 3,  1,  0,  0,  0, 0x20600978005805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7785 = VMOVSLDUPZ128rrkz
24387
  { 7786, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40080978005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7786 = VMOVSLDUPZ256rm
24388
  { 7787, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40280978005806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #7787 = VMOVSLDUPZ256rmk
24389
  { 7788, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40680978005806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #7788 = VMOVSLDUPZ256rmkz
24390
  { 7789, 2,  1,  0,  0,  0, 0x40080978005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7789 = VMOVSLDUPZ256rr
24391
  { 7790, 4,  1,  0,  0,  0, 0x40280978005805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #7790 = VMOVSLDUPZ256rrk
24392
  { 7791, 3,  1,  0,  0,  0, 0x40680978005805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7791 = VMOVSLDUPZ256rrkz
24393
  { 7792, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80800978005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7792 = VMOVSLDUPZrm
24394
  { 7793, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a00978005806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #7793 = VMOVSLDUPZrmk
24395
  { 7794, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e00978005806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #7794 = VMOVSLDUPZrmkz
24396
  { 7795, 2,  1,  0,  0,  0, 0x80800978005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7795 = VMOVSLDUPZrr
24397
  { 7796, 4,  1,  0,  0,  0, 0x80a00978005805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #7796 = VMOVSLDUPZrrk
24398
  { 7797, 3,  1,  0,  0,  0, 0x80e00978005805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7797 = VMOVSLDUPZrrkz
24399
  { 7798, 6,  1,  0,  322,  0|(1ULL<<MCID::MayLoad), 0x928005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7798 = VMOVSLDUPrm
24400
  { 7799, 2,  1,  0,  323,  0, 0x928005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7799 = VMOVSLDUPrr
24401
  { 7800, 6,  0,  0,  550,  0|(1ULL<<MCID::MayStore), 0x8003f78005004ULL, nullptr, nullptr, OperandInfo698, -1 ,nullptr },  // Inst #7800 = VMOVSS2DIZmr
24402
  { 7801, 2,  1,  0,  552,  0|(1ULL<<MCID::Bitcast), 0x20003f78005003ULL, nullptr, nullptr, OperandInfo504, -1 ,nullptr },  // Inst #7801 = VMOVSS2DIZrr
24403
  { 7802, 6,  0,  0,  332,  0|(1ULL<<MCID::MayStore), 0x3f20005004ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr },  // Inst #7802 = VMOVSS2DImr
24404
  { 7803, 2,  1,  0,  333,  0|(1ULL<<MCID::Bitcast), 0x3f20005003ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr },  // Inst #7803 = VMOVSS2DIrr
24405
  { 7804, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x201188e0006003ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7804 = VMOVSSDrr_REV
24406
  { 7805, 5,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x203188e0006003ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7805 = VMOVSSDrr_REVk
24407
  { 7806, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x207188e0006003ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7806 = VMOVSSDrr_REVkz
24408
  { 7807, 6,  0,  0,  553,  0|(1ULL<<MCID::MayStore), 0x81008e8005804ULL, nullptr, nullptr, OperandInfo698, -1 ,nullptr },  // Inst #7807 = VMOVSSZmr
24409
  { 7808, 7,  0,  0,  553,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x83008e8005804ULL, nullptr, nullptr, OperandInfo699, -1 ,nullptr },  // Inst #7808 = VMOVSSZmrk
24410
  { 7809, 6,  1,  0,  554,  0|(1ULL<<MCID::MayLoad), 0x8100868005806ULL, nullptr, nullptr, OperandInfo418, -1 ,nullptr },  // Inst #7809 = VMOVSSZrm
24411
  { 7810, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8100860005806ULL, nullptr, nullptr, OperandInfo694, -1 ,nullptr },  // Inst #7810 = VMOVSSZrm_Int
24412
  { 7811, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8300860005806ULL, nullptr, nullptr, OperandInfo695, -1 ,nullptr },  // Inst #7811 = VMOVSSZrm_Intk
24413
  { 7812, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8700860005806ULL, nullptr, nullptr, OperandInfo695, -1 ,nullptr },  // Inst #7812 = VMOVSSZrm_Intkz
24414
  { 7813, 3,  1,  0,  555,  0, 0x8110868005805ULL, nullptr, nullptr, OperandInfo700, -1 ,nullptr },  // Inst #7813 = VMOVSSZrr
24415
  { 7814, 3,  1,  0,  0,  0, 0x8110860005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7814 = VMOVSSZrr_Int
24416
  { 7815, 5,  1,  0,  0,  0, 0x8310860005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7815 = VMOVSSZrr_Intk
24417
  { 7816, 4,  1,  0,  0,  0, 0x8710860005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7816 = VMOVSSZrr_Intkz
24418
  { 7817, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x201108e0005803ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7817 = VMOVSSZrr_REV
24419
  { 7818, 5,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x203108e0005803ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #7818 = VMOVSSZrr_REVk
24420
  { 7819, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x207108e0005803ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #7819 = VMOVSSZrr_REVkz
24421
  { 7820, 6,  0,  0,  336,  0|(1ULL<<MCID::MayStore), 0x1008a8005804ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr },  // Inst #7820 = VMOVSSmr
24422
  { 7821, 6,  1,  0,  337,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x100828005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr },  // Inst #7821 = VMOVSSrm
24423
  { 7822, 3,  1,  0,  338,  0, 0x110828005805ULL, nullptr, nullptr, OperandInfo701, -1 ,nullptr },  // Inst #7822 = VMOVSSrr
24424
  { 7823, 3,  1,  0,  338,  0, 0x1108a0005803ULL, nullptr, nullptr, OperandInfo701, -1 ,nullptr },  // Inst #7823 = VMOVSSrr_REV
24425
  { 7824, 6,  0,  0,  325,  0|(1ULL<<MCID::MayStore), 0x808b0005004ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr },  // Inst #7824 = VMOVUPDYmr
24426
  { 7825, 6,  1,  0,  326,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x80830005006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #7825 = VMOVUPDYrm
24427
  { 7826, 2,  1,  0,  343,  0, 0x80830005005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7826 = VMOVUPDYrr
24428
  { 7827, 2,  1,  0,  343,  0, 0x808b0005003ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7827 = VMOVUPDYrr_REV
24429
  { 7828, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x200088f0005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7828 = VMOVUPDZ128mr
24430
  { 7829, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x202088f0005004ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #7829 = VMOVUPDZ128mrk
24431
  { 7830, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x20008870005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7830 = VMOVUPDZ128rm
24432
  { 7831, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x20208870005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #7831 = VMOVUPDZ128rmk
24433
  { 7832, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x20608870005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #7832 = VMOVUPDZ128rmkz
24434
  { 7833, 2,  1,  0,  0,  0, 0x20008870005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7833 = VMOVUPDZ128rr
24435
  { 7834, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x200088f0005003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7834 = VMOVUPDZ128rr_REV
24436
  { 7835, 4,  1,  0,  0,  0, 0x20208870005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #7835 = VMOVUPDZ128rrk
24437
  { 7836, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x202088f0005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7836 = VMOVUPDZ128rrk_REV
24438
  { 7837, 3,  1,  0,  0,  0, 0x20608870005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7837 = VMOVUPDZ128rrkz
24439
  { 7838, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x206088f0005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #7838 = VMOVUPDZ128rrkz_REV
24440
  { 7839, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x400888f0005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7839 = VMOVUPDZ256mr
24441
  { 7840, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x402888f0005004ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #7840 = VMOVUPDZ256mrk
24442
  { 7841, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x40088870005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7841 = VMOVUPDZ256rm
24443
  { 7842, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x40288870005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #7842 = VMOVUPDZ256rmk
24444
  { 7843, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x40688870005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #7843 = VMOVUPDZ256rmkz
24445
  { 7844, 2,  1,  0,  0,  0, 0x40088870005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7844 = VMOVUPDZ256rr
24446
  { 7845, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x400888f0005003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7845 = VMOVUPDZ256rr_REV
24447
  { 7846, 4,  1,  0,  0,  0, 0x40288870005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #7846 = VMOVUPDZ256rrk
24448
  { 7847, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x402888f0005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7847 = VMOVUPDZ256rrk_REV
24449
  { 7848, 3,  1,  0,  0,  0, 0x40688870005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7848 = VMOVUPDZ256rrkz
24450
  { 7849, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x406888f0005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #7849 = VMOVUPDZ256rrkz_REV
24451
  { 7850, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x808088f0005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7850 = VMOVUPDZmr
24452
  { 7851, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80a088f0005004ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #7851 = VMOVUPDZmrk
24453
  { 7852, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x80808870005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7852 = VMOVUPDZrm
24454
  { 7853, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80a08870005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #7853 = VMOVUPDZrmk
24455
  { 7854, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80e08870005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #7854 = VMOVUPDZrmkz
24456
  { 7855, 2,  1,  0,  0,  0, 0x80808870005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7855 = VMOVUPDZrr
24457
  { 7856, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x808088f0005003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7856 = VMOVUPDZrr_REV
24458
  { 7857, 4,  1,  0,  0,  0, 0x80a08870005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #7857 = VMOVUPDZrrk
24459
  { 7858, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a088f0005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7858 = VMOVUPDZrrk_REV
24460
  { 7859, 3,  1,  0,  0,  0, 0x80e08870005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7859 = VMOVUPDZrrkz
24461
  { 7860, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e088f0005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #7860 = VMOVUPDZrrkz_REV
24462
  { 7861, 6,  0,  0,  325,  0|(1ULL<<MCID::MayStore), 0x8b0005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7861 = VMOVUPDmr
24463
  { 7862, 6,  1,  0,  326,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x830005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7862 = VMOVUPDrm
24464
  { 7863, 2,  1,  0,  343,  0, 0x830005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7863 = VMOVUPDrr
24465
  { 7864, 2,  1,  0,  343,  0, 0x8b0005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7864 = VMOVUPDrr_REV
24466
  { 7865, 6,  0,  0,  325,  0|(1ULL<<MCID::MayStore), 0x808a8004804ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr },  // Inst #7865 = VMOVUPSYmr
24467
  { 7866, 6,  1,  0,  326,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x80828004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #7866 = VMOVUPSYrm
24468
  { 7867, 2,  1,  0,  343,  0, 0x80828004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7867 = VMOVUPSYrr
24469
  { 7868, 2,  1,  0,  343,  0, 0x808a8004803ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #7868 = VMOVUPSYrr_REV
24470
  { 7869, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x200008e8004804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #7869 = VMOVUPSZ128mr
24471
  { 7870, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x202008e8004804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #7870 = VMOVUPSZ128mrk
24472
  { 7871, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x20000868004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7871 = VMOVUPSZ128rm
24473
  { 7872, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x20200868004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #7872 = VMOVUPSZ128rmk
24474
  { 7873, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x20600868004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #7873 = VMOVUPSZ128rmkz
24475
  { 7874, 2,  1,  0,  0,  0, 0x20000868004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7874 = VMOVUPSZ128rr
24476
  { 7875, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x200008e8004803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7875 = VMOVUPSZ128rr_REV
24477
  { 7876, 4,  1,  0,  0,  0, 0x20200868004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #7876 = VMOVUPSZ128rrk
24478
  { 7877, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x202008e8004803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7877 = VMOVUPSZ128rrk_REV
24479
  { 7878, 3,  1,  0,  0,  0, 0x20600868004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7878 = VMOVUPSZ128rrkz
24480
  { 7879, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x206008e8004803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #7879 = VMOVUPSZ128rrkz_REV
24481
  { 7880, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x400808e8004804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #7880 = VMOVUPSZ256mr
24482
  { 7881, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x402808e8004804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #7881 = VMOVUPSZ256mrk
24483
  { 7882, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x40080868004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #7882 = VMOVUPSZ256rm
24484
  { 7883, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x40280868004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #7883 = VMOVUPSZ256rmk
24485
  { 7884, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x40680868004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #7884 = VMOVUPSZ256rmkz
24486
  { 7885, 2,  1,  0,  0,  0, 0x40080868004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7885 = VMOVUPSZ256rr
24487
  { 7886, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x400808e8004803ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #7886 = VMOVUPSZ256rr_REV
24488
  { 7887, 4,  1,  0,  0,  0, 0x40280868004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #7887 = VMOVUPSZ256rrk
24489
  { 7888, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x402808e8004803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7888 = VMOVUPSZ256rrk_REV
24490
  { 7889, 3,  1,  0,  0,  0, 0x40680868004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7889 = VMOVUPSZ256rrkz
24491
  { 7890, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x406808e8004803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #7890 = VMOVUPSZ256rrkz_REV
24492
  { 7891, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x808008e8004804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #7891 = VMOVUPSZmr
24493
  { 7892, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80a008e8004804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #7892 = VMOVUPSZmrk
24494
  { 7893, 6,  1,  0,  206,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x80800868004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #7893 = VMOVUPSZrm
24495
  { 7894, 8,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80a00868004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #7894 = VMOVUPSZrmk
24496
  { 7895, 7,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x80e00868004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #7895 = VMOVUPSZrmkz
24497
  { 7896, 2,  1,  0,  0,  0, 0x80800868004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7896 = VMOVUPSZrr
24498
  { 7897, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x808008e8004803ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #7897 = VMOVUPSZrr_REV
24499
  { 7898, 4,  1,  0,  0,  0, 0x80a00868004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #7898 = VMOVUPSZrrk
24500
  { 7899, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a008e8004803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7899 = VMOVUPSZrrk_REV
24501
  { 7900, 3,  1,  0,  0,  0, 0x80e00868004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7900 = VMOVUPSZrrkz
24502
  { 7901, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e008e8004803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #7901 = VMOVUPSZrrkz_REV
24503
  { 7902, 6,  0,  0,  325,  0|(1ULL<<MCID::MayStore), 0x8a8004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr },  // Inst #7902 = VMOVUPSmr
24504
  { 7903, 6,  1,  0,  326,  0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x828004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7903 = VMOVUPSrm
24505
  { 7904, 2,  1,  0,  343,  0, 0x828004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7904 = VMOVUPSrr
24506
  { 7905, 2,  1,  0,  343,  0, 0x8a8004803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7905 = VMOVUPSrr_REV
24507
  { 7906, 6,  1,  0,  550,  0|(1ULL<<MCID::MayLoad), 0x1000bf60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #7906 = VMOVZPQILo2PQIZrm
24508
  { 7907, 2,  1,  0,  556,  0, 0x2000bf60005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #7907 = VMOVZPQILo2PQIZrr
24509
  { 7908, 6,  1,  0,  344,  0|(1ULL<<MCID::MayLoad), 0x3f38005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7908 = VMOVZPQILo2PQIrm
24510
  { 7909, 2,  1,  0,  334,  0, 0x3f38005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #7909 = VMOVZPQILo2PQIrr
24511
  { 7910, 6,  1,  0,  316,  0|(1ULL<<MCID::MayLoad), 0x3f38005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #7910 = VMOVZQI2PQIrm
24512
  { 7911, 8,  1,  0,  557,  0|(1ULL<<MCID::MayLoad), 0x9213804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #7911 = VMPSADBWYrmi
24513
  { 7912, 4,  1,  0,  558,  0, 0x9213804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #7912 = VMPSADBWYrri
24514
  { 7913, 8,  1,  0,  557,  0|(1ULL<<MCID::MayLoad), 0x1213804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #7913 = VMPSADBWrmi
24515
  { 7914, 4,  1,  0,  558,  0, 0x1213804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #7914 = VMPSADBWrri
24516
  { 7915, 5,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x638000481eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #7915 = VMPTRLDm
24517
  { 7916, 5,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x638000401fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #7916 = VMPTRSTm
24518
  { 7917, 6,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00004804ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #7917 = VMREAD32rm
24519
  { 7918, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00004803ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #7918 = VMREAD32rr
24520
  { 7919, 6,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00004804ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #7919 = VMREAD64rm
24521
  { 7920, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00004803ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #7920 = VMREAD64rr
24522
  { 7921, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004023ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #7921 = VMRESUME
24523
  { 7922, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004038ULL, ImplicitList9, nullptr, nullptr, -1 ,nullptr },  // Inst #7922 = VMRUN32
24524
  { 7923, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004038ULL, ImplicitList10, nullptr, nullptr, -1 ,nullptr },  // Inst #7923 = VMRUN64
24525
  { 7924, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403bULL, ImplicitList9, nullptr, nullptr, -1 ,nullptr },  // Inst #7924 = VMSAVE32
24526
  { 7925, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403bULL, ImplicitList10, nullptr, nullptr, -1 ,nullptr },  // Inst #7925 = VMSAVE64
24527
  { 7926, 7,  1,  0,  359,  0|(1ULL<<MCID::MayLoad), 0x92cb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7926 = VMULPDYrm
24528
  { 7927, 3,  1,  0,  360,  0|(1ULL<<MCID::Commutable), 0x92cb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7927 = VMULPDYrr
24529
  { 7928, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001ace0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7928 = VMULPDZ128rm
24530
  { 7929, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101ace0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7929 = VMULPDZ128rmb
24531
  { 7930, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121ace0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #7930 = VMULPDZ128rmbk
24532
  { 7931, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161ace0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #7931 = VMULPDZ128rmbkz
24533
  { 7932, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021ace0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #7932 = VMULPDZ128rmk
24534
  { 7933, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061ace0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #7933 = VMULPDZ128rmkz
24535
  { 7934, 3,  1,  0,  0,  0, 0x2001ace0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7934 = VMULPDZ128rr
24536
  { 7935, 5,  1,  0,  0,  0, 0x2021ace0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #7935 = VMULPDZ128rrk
24537
  { 7936, 4,  1,  0,  0,  0, 0x2061ace0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #7936 = VMULPDZ128rrkz
24538
  { 7937, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009ace0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7937 = VMULPDZ256rm
24539
  { 7938, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109ace0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7938 = VMULPDZ256rmb
24540
  { 7939, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129ace0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #7939 = VMULPDZ256rmbk
24541
  { 7940, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169ace0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #7940 = VMULPDZ256rmbkz
24542
  { 7941, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029ace0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #7941 = VMULPDZ256rmk
24543
  { 7942, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069ace0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #7942 = VMULPDZ256rmkz
24544
  { 7943, 3,  1,  0,  0,  0, 0x4009ace0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #7943 = VMULPDZ256rr
24545
  { 7944, 5,  1,  0,  0,  0, 0x4029ace0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #7944 = VMULPDZ256rrk
24546
  { 7945, 4,  1,  0,  0,  0, 0x4069ace0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #7945 = VMULPDZ256rrkz
24547
  { 7946, 4,  1,  0,  0,  0, 0x41181ace0005005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #7946 = VMULPDZrb
24548
  { 7947, 6,  1,  0,  0,  0, 0x411a1ace0005005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #7947 = VMULPDZrbk
24549
  { 7948, 5,  1,  0,  0,  0, 0x411e1ace0005005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr },  // Inst #7948 = VMULPDZrbkz
24550
  { 7949, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081ace0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7949 = VMULPDZrm
24551
  { 7950, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181ace0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7950 = VMULPDZrmb
24552
  { 7951, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1ace0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #7951 = VMULPDZrmbk
24553
  { 7952, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1ace0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #7952 = VMULPDZrmbkz
24554
  { 7953, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1ace0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #7953 = VMULPDZrmk
24555
  { 7954, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1ace0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #7954 = VMULPDZrmkz
24556
  { 7955, 3,  1,  0,  0,  0, 0x8081ace0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #7955 = VMULPDZrr
24557
  { 7956, 5,  1,  0,  0,  0, 0x80a1ace0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #7956 = VMULPDZrrk
24558
  { 7957, 4,  1,  0,  0,  0, 0x80e1ace0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #7957 = VMULPDZrrkz
24559
  { 7958, 7,  1,  0,  908,  0|(1ULL<<MCID::MayLoad), 0x12cb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7958 = VMULPDrm
24560
  { 7959, 3,  1,  0,  904,  0|(1ULL<<MCID::Commutable), 0x12cb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7959 = VMULPDrr
24561
  { 7960, 7,  1,  0,  359,  0|(1ULL<<MCID::MayLoad), 0x92ca8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #7960 = VMULPSYrm
24562
  { 7961, 3,  1,  0,  361,  0|(1ULL<<MCID::Commutable), 0x92ca8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #7961 = VMULPSYrr
24563
  { 7962, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012ce0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7962 = VMULPSZ128rm
24564
  { 7963, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012ce0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7963 = VMULPSZ128rmb
24565
  { 7964, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212ce0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #7964 = VMULPSZ128rmbk
24566
  { 7965, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612ce0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #7965 = VMULPSZ128rmbkz
24567
  { 7966, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212ce0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #7966 = VMULPSZ128rmk
24568
  { 7967, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612ce0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #7967 = VMULPSZ128rmkz
24569
  { 7968, 3,  1,  0,  0,  0, 0x20012ce0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7968 = VMULPSZ128rr
24570
  { 7969, 5,  1,  0,  0,  0, 0x20212ce0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #7969 = VMULPSZ128rrk
24571
  { 7970, 4,  1,  0,  0,  0, 0x20612ce0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #7970 = VMULPSZ128rrkz
24572
  { 7971, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092ce0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7971 = VMULPSZ256rm
24573
  { 7972, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092ce0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #7972 = VMULPSZ256rmb
24574
  { 7973, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292ce0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #7973 = VMULPSZ256rmbk
24575
  { 7974, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692ce0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #7974 = VMULPSZ256rmbkz
24576
  { 7975, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292ce0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #7975 = VMULPSZ256rmk
24577
  { 7976, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692ce0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #7976 = VMULPSZ256rmkz
24578
  { 7977, 3,  1,  0,  0,  0, 0x40092ce0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #7977 = VMULPSZ256rr
24579
  { 7978, 5,  1,  0,  0,  0, 0x40292ce0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #7978 = VMULPSZ256rrk
24580
  { 7979, 4,  1,  0,  0,  0, 0x40692ce0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #7979 = VMULPSZ256rrkz
24581
  { 7980, 4,  1,  0,  0,  0, 0x409812ce0004805ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #7980 = VMULPSZrb
24582
  { 7981, 6,  1,  0,  0,  0, 0x409a12ce0004805ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #7981 = VMULPSZrbk
24583
  { 7982, 5,  1,  0,  0,  0, 0x409e12ce0004805ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr },  // Inst #7982 = VMULPSZrbkz
24584
  { 7983, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812ce0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7983 = VMULPSZrm
24585
  { 7984, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812ce0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #7984 = VMULPSZrmb
24586
  { 7985, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12ce0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #7985 = VMULPSZrmbk
24587
  { 7986, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12ce0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #7986 = VMULPSZrmbkz
24588
  { 7987, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12ce0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #7987 = VMULPSZrmk
24589
  { 7988, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12ce0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #7988 = VMULPSZrmkz
24590
  { 7989, 3,  1,  0,  0,  0, 0x80812ce0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #7989 = VMULPSZrr
24591
  { 7990, 5,  1,  0,  0,  0, 0x80a12ce0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #7990 = VMULPSZrrk
24592
  { 7991, 4,  1,  0,  0,  0, 0x80e12ce0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #7991 = VMULPSZrrkz
24593
  { 7992, 7,  1,  0,  908,  0|(1ULL<<MCID::MayLoad), 0x12ca8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #7992 = VMULPSrm
24594
  { 7993, 3,  1,  0,  905,  0|(1ULL<<MCID::Commutable), 0x12ca8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #7993 = VMULPSrr
24595
  { 7994, 7,  1,  0,  525,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011ace0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr },  // Inst #7994 = VMULSDZrm
24596
  { 7995, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011ace0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #7995 = VMULSDZrm_Int
24597
  { 7996, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031ace0006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #7996 = VMULSDZrm_Intk
24598
  { 7997, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071ace0006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #7997 = VMULSDZrm_Intkz
24599
  { 7998, 3,  1,  0,  525,  0|(1ULL<<MCID::Commutable), 0x1011ace0006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr },  // Inst #7998 = VMULSDZrr
24600
  { 7999, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x1011ace0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #7999 = VMULSDZrr_Int
24601
  { 8000, 5,  1,  0,  0,  0, 0x1031ace0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #8000 = VMULSDZrr_Intk
24602
  { 8001, 4,  1,  0,  0,  0, 0x1071ace0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #8001 = VMULSDZrr_Intkz
24603
  { 8002, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x41111ace0006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #8002 = VMULSDZrrb
24604
  { 8003, 6,  1,  0,  0,  0, 0x41131ace0006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #8003 = VMULSDZrrbk
24605
  { 8004, 5,  1,  0,  0,  0, 0x41171ace0006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #8004 = VMULSDZrrbkz
24606
  { 8005, 7,  1,  0,  909,  0|(1ULL<<MCID::MayLoad), 0x112cb0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #8005 = VMULSDrm
24607
  { 8006, 7,  1,  0,  909,  0|(1ULL<<MCID::MayLoad), 0x112cb0006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8006 = VMULSDrm_Int
24608
  { 8007, 3,  1,  0,  906,  0|(1ULL<<MCID::Commutable), 0x112cb0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #8007 = VMULSDrr
24609
  { 8008, 3,  1,  0,  906,  0, 0x112cb0006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8008 = VMULSDrr_Int
24610
  { 8009, 7,  1,  0,  526,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112ce0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr },  // Inst #8009 = VMULSSZrm
24611
  { 8010, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112ce0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8010 = VMULSSZrm_Int
24612
  { 8011, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8312ce0005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #8011 = VMULSSZrm_Intk
24613
  { 8012, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8712ce0005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #8012 = VMULSSZrm_Intkz
24614
  { 8013, 3,  1,  0,  526,  0|(1ULL<<MCID::Commutable), 0x8112ce0005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr },  // Inst #8013 = VMULSSZrr
24615
  { 8014, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x8112ce0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8014 = VMULSSZrr_Int
24616
  { 8015, 5,  1,  0,  0,  0, 0x8312ce0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #8015 = VMULSSZrr_Intk
24617
  { 8016, 4,  1,  0,  0,  0, 0x8712ce0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #8016 = VMULSSZrr_Intkz
24618
  { 8017, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x409112ce0005805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #8017 = VMULSSZrrb
24619
  { 8018, 6,  1,  0,  0,  0, 0x409312ce0005805ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #8018 = VMULSSZrrbk
24620
  { 8019, 5,  1,  0,  0,  0, 0x409712ce0005805ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #8019 = VMULSSZrrbkz
24621
  { 8020, 7,  1,  0,  909,  0|(1ULL<<MCID::MayLoad), 0x112ca8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #8020 = VMULSSrm
24622
  { 8021, 7,  1,  0,  909,  0|(1ULL<<MCID::MayLoad), 0x112ca8005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8021 = VMULSSrm_Int
24623
  { 8022, 3,  1,  0,  907,  0|(1ULL<<MCID::Commutable), 0x112ca8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #8022 = VMULSSrr
24624
  { 8023, 3,  1,  0,  907,  0, 0x112ca8005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8023 = VMULSSrr_Int
24625
  { 8024, 6,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80004806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr },  // Inst #8024 = VMWRITE32rm
24626
  { 8025, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80004805ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #8025 = VMWRITE32rr
24627
  { 8026, 6,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80004806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr },  // Inst #8026 = VMWRITE64rm
24628
  { 8027, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80004805ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #8027 = VMWRITE64rr
24629
  { 8028, 0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004024ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #8028 = VMXOFF
24630
  { 8029, 5,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x638000581eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #8029 = VMXON
24631
  { 8030, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x92b30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8030 = VORPDYrm
24632
  { 8031, 3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x92b30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8031 = VORPDYrr
24633
  { 8032, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001ab60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8032 = VORPDZ128rm
24634
  { 8033, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101ab60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8033 = VORPDZ128rmb
24635
  { 8034, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121ab60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #8034 = VORPDZ128rmbk
24636
  { 8035, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161ab60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #8035 = VORPDZ128rmbkz
24637
  { 8036, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021ab60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #8036 = VORPDZ128rmk
24638
  { 8037, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061ab60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #8037 = VORPDZ128rmkz
24639
  { 8038, 3,  1,  0,  0,  0, 0x2001ab60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8038 = VORPDZ128rr
24640
  { 8039, 5,  1,  0,  0,  0, 0x2021ab60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #8039 = VORPDZ128rrk
24641
  { 8040, 4,  1,  0,  0,  0, 0x2061ab60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #8040 = VORPDZ128rrkz
24642
  { 8041, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009ab60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8041 = VORPDZ256rm
24643
  { 8042, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109ab60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8042 = VORPDZ256rmb
24644
  { 8043, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129ab60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #8043 = VORPDZ256rmbk
24645
  { 8044, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169ab60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #8044 = VORPDZ256rmbkz
24646
  { 8045, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029ab60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #8045 = VORPDZ256rmk
24647
  { 8046, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069ab60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #8046 = VORPDZ256rmkz
24648
  { 8047, 3,  1,  0,  0,  0, 0x4009ab60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8047 = VORPDZ256rr
24649
  { 8048, 5,  1,  0,  0,  0, 0x4029ab60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #8048 = VORPDZ256rrk
24650
  { 8049, 4,  1,  0,  0,  0, 0x4069ab60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #8049 = VORPDZ256rrkz
24651
  { 8050, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081ab60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8050 = VORPDZrm
24652
  { 8051, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181ab60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8051 = VORPDZrmb
24653
  { 8052, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1ab60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #8052 = VORPDZrmbk
24654
  { 8053, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1ab60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #8053 = VORPDZrmbkz
24655
  { 8054, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1ab60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #8054 = VORPDZrmk
24656
  { 8055, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1ab60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #8055 = VORPDZrmkz
24657
  { 8056, 3,  1,  0,  0,  0, 0x8081ab60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8056 = VORPDZrr
24658
  { 8057, 5,  1,  0,  0,  0, 0x80a1ab60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #8057 = VORPDZrrk
24659
  { 8058, 4,  1,  0,  0,  0, 0x80e1ab60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #8058 = VORPDZrrkz
24660
  { 8059, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x12b30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8059 = VORPDrm
24661
  { 8060, 3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x12b30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8060 = VORPDrr
24662
  { 8061, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x92b28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8061 = VORPSYrm
24663
  { 8062, 3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x92b28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8062 = VORPSYrr
24664
  { 8063, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012b60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8063 = VORPSZ128rm
24665
  { 8064, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012b60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8064 = VORPSZ128rmb
24666
  { 8065, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212b60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #8065 = VORPSZ128rmbk
24667
  { 8066, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612b60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #8066 = VORPSZ128rmbkz
24668
  { 8067, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212b60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #8067 = VORPSZ128rmk
24669
  { 8068, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612b60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #8068 = VORPSZ128rmkz
24670
  { 8069, 3,  1,  0,  0,  0, 0x20012b60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8069 = VORPSZ128rr
24671
  { 8070, 5,  1,  0,  0,  0, 0x20212b60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #8070 = VORPSZ128rrk
24672
  { 8071, 4,  1,  0,  0,  0, 0x20612b60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #8071 = VORPSZ128rrkz
24673
  { 8072, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092b60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8072 = VORPSZ256rm
24674
  { 8073, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092b60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8073 = VORPSZ256rmb
24675
  { 8074, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292b60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #8074 = VORPSZ256rmbk
24676
  { 8075, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692b60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #8075 = VORPSZ256rmbkz
24677
  { 8076, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292b60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #8076 = VORPSZ256rmk
24678
  { 8077, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692b60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #8077 = VORPSZ256rmkz
24679
  { 8078, 3,  1,  0,  0,  0, 0x40092b60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8078 = VORPSZ256rr
24680
  { 8079, 5,  1,  0,  0,  0, 0x40292b60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #8079 = VORPSZ256rrk
24681
  { 8080, 4,  1,  0,  0,  0, 0x40692b60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #8080 = VORPSZ256rrkz
24682
  { 8081, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812b60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8081 = VORPSZrm
24683
  { 8082, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812b60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8082 = VORPSZrmb
24684
  { 8083, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12b60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #8083 = VORPSZrmbk
24685
  { 8084, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12b60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #8084 = VORPSZrmbkz
24686
  { 8085, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12b60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #8085 = VORPSZrmk
24687
  { 8086, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12b60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #8086 = VORPSZrmkz
24688
  { 8087, 3,  1,  0,  0,  0, 0x80812b60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8087 = VORPSZrr
24689
  { 8088, 5,  1,  0,  0,  0, 0x80a12b60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #8088 = VORPSZrrk
24690
  { 8089, 4,  1,  0,  0,  0, 0x80e12b60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #8089 = VORPSZrrkz
24691
  { 8090, 7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x12b28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8090 = VORPSrm
24692
  { 8091, 3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x12b28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8091 = VORPSrr
24693
  { 8092, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20000e78009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #8092 = VPABSBZ128rm
24694
  { 8093, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20200e78009006ULL, nullptr, nullptr, OperandInfo677, -1 ,nullptr },  // Inst #8093 = VPABSBZ128rmk
24695
  { 8094, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20600e78009006ULL, nullptr, nullptr, OperandInfo678, -1 ,nullptr },  // Inst #8094 = VPABSBZ128rmkz
24696
  { 8095, 2,  1,  0,  0,  0, 0x20000e78009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #8095 = VPABSBZ128rr
24697
  { 8096, 4,  1,  0,  0,  0, 0x20200e78009005ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #8096 = VPABSBZ128rrk
24698
  { 8097, 3,  1,  0,  0,  0, 0x20600e78009005ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #8097 = VPABSBZ128rrkz
24699
  { 8098, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40080e78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8098 = VPABSBZ256rm
24700
  { 8099, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40280e78009006ULL, nullptr, nullptr, OperandInfo682, -1 ,nullptr },  // Inst #8099 = VPABSBZ256rmk
24701
  { 8100, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40680e78009006ULL, nullptr, nullptr, OperandInfo683, -1 ,nullptr },  // Inst #8100 = VPABSBZ256rmkz
24702
  { 8101, 2,  1,  0,  0,  0, 0x40080e78009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #8101 = VPABSBZ256rr
24703
  { 8102, 4,  1,  0,  0,  0, 0x40280e78009005ULL, nullptr, nullptr, OperandInfo684, -1 ,nullptr },  // Inst #8102 = VPABSBZ256rrk
24704
  { 8103, 3,  1,  0,  0,  0, 0x40680e78009005ULL, nullptr, nullptr, OperandInfo685, -1 ,nullptr },  // Inst #8103 = VPABSBZ256rrkz
24705
  { 8104, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80800e78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8104 = VPABSBZrm
24706
  { 8105, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a00e78009006ULL, nullptr, nullptr, OperandInfo687, -1 ,nullptr },  // Inst #8105 = VPABSBZrmk
24707
  { 8106, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e00e78009006ULL, nullptr, nullptr, OperandInfo688, -1 ,nullptr },  // Inst #8106 = VPABSBZrmkz
24708
  { 8107, 2,  1,  0,  0,  0, 0x80800e78009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #8107 = VPABSBZrr
24709
  { 8108, 4,  1,  0,  0,  0, 0x80a00e78009005ULL, nullptr, nullptr, OperandInfo689, -1 ,nullptr },  // Inst #8108 = VPABSBZrrk
24710
  { 8109, 3,  1,  0,  0,  0, 0x80e00e78009005ULL, nullptr, nullptr, OperandInfo690, -1 ,nullptr },  // Inst #8109 = VPABSBZrrkz
24711
  { 8110, 6,  1,  0,  374,  0|(1ULL<<MCID::MayLoad), 0xe38009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #8110 = VPABSBrm128
24712
  { 8111, 6,  1,  0,  559,  0|(1ULL<<MCID::MayLoad), 0x80e38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #8111 = VPABSBrm256
24713
  { 8112, 2,  1,  0,  375,  0, 0xe38009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #8112 = VPABSBrr128
24714
  { 8113, 2,  1,  0,  392,  0, 0x80e38009005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #8113 = VPABSBrr256
24715
  { 8114, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20000f78009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #8114 = VPABSDZ128rm
24716
  { 8115, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9000f78009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #8115 = VPABSDZ128rmb
24717
  { 8116, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9200f78009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #8116 = VPABSDZ128rmbk
24718
  { 8117, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9600f78009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #8117 = VPABSDZ128rmbkz
24719
  { 8118, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20200f78009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #8118 = VPABSDZ128rmk
24720
  { 8119, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20600f78009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #8119 = VPABSDZ128rmkz
24721
  { 8120, 2,  1,  0,  0,  0, 0x20000f78009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #8120 = VPABSDZ128rr
24722
  { 8121, 4,  1,  0,  0,  0, 0x20200f78009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #8121 = VPABSDZ128rrk
24723
  { 8122, 3,  1,  0,  0,  0, 0x20600f78009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #8122 = VPABSDZ128rrkz
24724
  { 8123, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40080f78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8123 = VPABSDZ256rm
24725
  { 8124, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9080f78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8124 = VPABSDZ256rmb
24726
  { 8125, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9280f78009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #8125 = VPABSDZ256rmbk
24727
  { 8126, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9680f78009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #8126 = VPABSDZ256rmbkz
24728
  { 8127, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40280f78009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #8127 = VPABSDZ256rmk
24729
  { 8128, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40680f78009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #8128 = VPABSDZ256rmkz
24730
  { 8129, 2,  1,  0,  0,  0, 0x40080f78009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #8129 = VPABSDZ256rr
24731
  { 8130, 4,  1,  0,  0,  0, 0x40280f78009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #8130 = VPABSDZ256rrk
24732
  { 8131, 3,  1,  0,  0,  0, 0x40680f78009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #8131 = VPABSDZ256rrkz
24733
  { 8132, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80800f78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8132 = VPABSDZrm
24734
  { 8133, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9800f78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8133 = VPABSDZrmb
24735
  { 8134, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a00f78009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #8134 = VPABSDZrmbk
24736
  { 8135, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e00f78009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #8135 = VPABSDZrmbkz
24737
  { 8136, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a00f78009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #8136 = VPABSDZrmk
24738
  { 8137, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e00f78009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #8137 = VPABSDZrmkz
24739
  { 8138, 2,  1,  0,  0,  0, 0x80800f78009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #8138 = VPABSDZrr
24740
  { 8139, 4,  1,  0,  0,  0, 0x80a00f78009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #8139 = VPABSDZrrk
24741
  { 8140, 3,  1,  0,  0,  0, 0x80e00f78009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #8140 = VPABSDZrrkz
24742
  { 8141, 6,  1,  0,  374,  0|(1ULL<<MCID::MayLoad), 0xf38009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #8141 = VPABSDrm128
24743
  { 8142, 6,  1,  0,  559,  0|(1ULL<<MCID::MayLoad), 0x80f38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #8142 = VPABSDrm256
24744
  { 8143, 2,  1,  0,  375,  0, 0xf38009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #8143 = VPABSDrr128
24745
  { 8144, 2,  1,  0,  392,  0, 0x80f38009005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #8144 = VPABSDrr256
24746
  { 8145, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20008ff8009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #8145 = VPABSQZ128rm
24747
  { 8146, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11008ff8009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #8146 = VPABSQZ128rmb
24748
  { 8147, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11208ff8009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #8147 = VPABSQZ128rmbk
24749
  { 8148, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11608ff8009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #8148 = VPABSQZ128rmbkz
24750
  { 8149, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20208ff8009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #8149 = VPABSQZ128rmk
24751
  { 8150, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20608ff8009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #8150 = VPABSQZ128rmkz
24752
  { 8151, 2,  1,  0,  0,  0, 0x20008ff8009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #8151 = VPABSQZ128rr
24753
  { 8152, 4,  1,  0,  0,  0, 0x20208ff8009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #8152 = VPABSQZ128rrk
24754
  { 8153, 3,  1,  0,  0,  0, 0x20608ff8009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #8153 = VPABSQZ128rrkz
24755
  { 8154, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40088ff8009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8154 = VPABSQZ256rm
24756
  { 8155, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11088ff8009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8155 = VPABSQZ256rmb
24757
  { 8156, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11288ff8009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #8156 = VPABSQZ256rmbk
24758
  { 8157, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11688ff8009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #8157 = VPABSQZ256rmbkz
24759
  { 8158, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40288ff8009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #8158 = VPABSQZ256rmk
24760
  { 8159, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40688ff8009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #8159 = VPABSQZ256rmkz
24761
  { 8160, 2,  1,  0,  0,  0, 0x40088ff8009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #8160 = VPABSQZ256rr
24762
  { 8161, 4,  1,  0,  0,  0, 0x40288ff8009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #8161 = VPABSQZ256rrk
24763
  { 8162, 3,  1,  0,  0,  0, 0x40688ff8009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #8162 = VPABSQZ256rrkz
24764
  { 8163, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80808ff8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8163 = VPABSQZrm
24765
  { 8164, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11808ff8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8164 = VPABSQZrmb
24766
  { 8165, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a08ff8009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #8165 = VPABSQZrmbk
24767
  { 8166, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e08ff8009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #8166 = VPABSQZrmbkz
24768
  { 8167, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a08ff8009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #8167 = VPABSQZrmk
24769
  { 8168, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e08ff8009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #8168 = VPABSQZrmkz
24770
  { 8169, 2,  1,  0,  0,  0, 0x80808ff8009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #8169 = VPABSQZrr
24771
  { 8170, 4,  1,  0,  0,  0, 0x80a08ff8009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #8170 = VPABSQZrrk
24772
  { 8171, 3,  1,  0,  0,  0, 0x80e08ff8009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #8171 = VPABSQZrrkz
24773
  { 8172, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20000ef8009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #8172 = VPABSWZ128rm
24774
  { 8173, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20200ef8009006ULL, nullptr, nullptr, OperandInfo662, -1 ,nullptr },  // Inst #8173 = VPABSWZ128rmk
24775
  { 8174, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20600ef8009006ULL, nullptr, nullptr, OperandInfo663, -1 ,nullptr },  // Inst #8174 = VPABSWZ128rmkz
24776
  { 8175, 2,  1,  0,  0,  0, 0x20000ef8009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #8175 = VPABSWZ128rr
24777
  { 8176, 4,  1,  0,  0,  0, 0x20200ef8009005ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr },  // Inst #8176 = VPABSWZ128rrk
24778
  { 8177, 3,  1,  0,  0,  0, 0x20600ef8009005ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #8177 = VPABSWZ128rrkz
24779
  { 8178, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40080ef8009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8178 = VPABSWZ256rm
24780
  { 8179, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40280ef8009006ULL, nullptr, nullptr, OperandInfo667, -1 ,nullptr },  // Inst #8179 = VPABSWZ256rmk
24781
  { 8180, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40680ef8009006ULL, nullptr, nullptr, OperandInfo668, -1 ,nullptr },  // Inst #8180 = VPABSWZ256rmkz
24782
  { 8181, 2,  1,  0,  0,  0, 0x40080ef8009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #8181 = VPABSWZ256rr
24783
  { 8182, 4,  1,  0,  0,  0, 0x40280ef8009005ULL, nullptr, nullptr, OperandInfo669, -1 ,nullptr },  // Inst #8182 = VPABSWZ256rrk
24784
  { 8183, 3,  1,  0,  0,  0, 0x40680ef8009005ULL, nullptr, nullptr, OperandInfo670, -1 ,nullptr },  // Inst #8183 = VPABSWZ256rrkz
24785
  { 8184, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80800ef8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8184 = VPABSWZrm
24786
  { 8185, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a00ef8009006ULL, nullptr, nullptr, OperandInfo672, -1 ,nullptr },  // Inst #8185 = VPABSWZrmk
24787
  { 8186, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e00ef8009006ULL, nullptr, nullptr, OperandInfo673, -1 ,nullptr },  // Inst #8186 = VPABSWZrmkz
24788
  { 8187, 2,  1,  0,  0,  0, 0x80800ef8009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #8187 = VPABSWZrr
24789
  { 8188, 4,  1,  0,  0,  0, 0x80a00ef8009005ULL, nullptr, nullptr, OperandInfo674, -1 ,nullptr },  // Inst #8188 = VPABSWZrrk
24790
  { 8189, 3,  1,  0,  0,  0, 0x80e00ef8009005ULL, nullptr, nullptr, OperandInfo675, -1 ,nullptr },  // Inst #8189 = VPABSWZrrkz
24791
  { 8190, 6,  1,  0,  374,  0|(1ULL<<MCID::MayLoad), 0xeb8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #8190 = VPABSWrm128
24792
  { 8191, 6,  1,  0,  559,  0|(1ULL<<MCID::MayLoad), 0x80eb8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #8191 = VPABSWrm256
24793
  { 8192, 2,  1,  0,  375,  0, 0xeb8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #8192 = VPABSWrr128
24794
  { 8193, 2,  1,  0,  392,  0, 0x80eb8009005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #8193 = VPABSWrr256
24795
  { 8194, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x935b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8194 = VPACKSSDWYrm
24796
  { 8195, 3,  1,  0,  276,  0, 0x935b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8195 = VPACKSSDWYrr
24797
  { 8196, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200135e0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8196 = VPACKSSDWZ128rm
24798
  { 8197, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90135e0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8197 = VPACKSSDWZ128rmb
24799
  { 8198, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92135e0005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #8198 = VPACKSSDWZ128rmbk
24800
  { 8199, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96135e0005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #8199 = VPACKSSDWZ128rmbkz
24801
  { 8200, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202135e0005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #8200 = VPACKSSDWZ128rmk
24802
  { 8201, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206135e0005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #8201 = VPACKSSDWZ128rmkz
24803
  { 8202, 3,  1,  0,  0,  0, 0x200135e0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8202 = VPACKSSDWZ128rr
24804
  { 8203, 5,  1,  0,  0,  0, 0x202135e0005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #8203 = VPACKSSDWZ128rrk
24805
  { 8204, 4,  1,  0,  0,  0, 0x206135e0005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #8204 = VPACKSSDWZ128rrkz
24806
  { 8205, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400935e0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8205 = VPACKSSDWZ256rm
24807
  { 8206, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90935e0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8206 = VPACKSSDWZ256rmb
24808
  { 8207, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92935e0005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #8207 = VPACKSSDWZ256rmbk
24809
  { 8208, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96935e0005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #8208 = VPACKSSDWZ256rmbkz
24810
  { 8209, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402935e0005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #8209 = VPACKSSDWZ256rmk
24811
  { 8210, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406935e0005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #8210 = VPACKSSDWZ256rmkz
24812
  { 8211, 3,  1,  0,  0,  0, 0x400935e0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8211 = VPACKSSDWZ256rr
24813
  { 8212, 5,  1,  0,  0,  0, 0x402935e0005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #8212 = VPACKSSDWZ256rrk
24814
  { 8213, 4,  1,  0,  0,  0, 0x406935e0005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #8213 = VPACKSSDWZ256rrkz
24815
  { 8214, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808135e0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8214 = VPACKSSDWZrm
24816
  { 8215, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98135e0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8215 = VPACKSSDWZrmb
24817
  { 8216, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a135e0005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #8216 = VPACKSSDWZrmbk
24818
  { 8217, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e135e0005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #8217 = VPACKSSDWZrmbkz
24819
  { 8218, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a135e0005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #8218 = VPACKSSDWZrmk
24820
  { 8219, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e135e0005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #8219 = VPACKSSDWZrmkz
24821
  { 8220, 3,  1,  0,  0,  0, 0x808135e0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8220 = VPACKSSDWZrr
24822
  { 8221, 5,  1,  0,  0,  0, 0x80a135e0005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #8221 = VPACKSSDWZrrk
24823
  { 8222, 4,  1,  0,  0,  0, 0x80e135e0005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #8222 = VPACKSSDWZrrkz
24824
  { 8223, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x135b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8223 = VPACKSSDWrm
24825
  { 8224, 3,  1,  0,  276,  0, 0x135b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8224 = VPACKSSDWrr
24826
  { 8225, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x931b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8225 = VPACKSSWBYrm
24827
  { 8226, 3,  1,  0,  276,  0, 0x931b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8226 = VPACKSSWBYrr
24828
  { 8227, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001b1f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8227 = VPACKSSWBZ128rm
24829
  { 8228, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b1f8005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #8228 = VPACKSSWBZ128rmk
24830
  { 8229, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061b1f8005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #8229 = VPACKSSWBZ128rmkz
24831
  { 8230, 3,  1,  0,  0,  0, 0x2001b1f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8230 = VPACKSSWBZ128rr
24832
  { 8231, 5,  1,  0,  0,  0, 0x2021b1f8005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #8231 = VPACKSSWBZ128rrk
24833
  { 8232, 4,  1,  0,  0,  0, 0x2061b1f8005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #8232 = VPACKSSWBZ128rrkz
24834
  { 8233, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009b1f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8233 = VPACKSSWBZ256rm
24835
  { 8234, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b1f8005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #8234 = VPACKSSWBZ256rmk
24836
  { 8235, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069b1f8005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #8235 = VPACKSSWBZ256rmkz
24837
  { 8236, 3,  1,  0,  0,  0, 0x4009b1f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8236 = VPACKSSWBZ256rr
24838
  { 8237, 5,  1,  0,  0,  0, 0x4029b1f8005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #8237 = VPACKSSWBZ256rrk
24839
  { 8238, 4,  1,  0,  0,  0, 0x4069b1f8005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #8238 = VPACKSSWBZ256rrkz
24840
  { 8239, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081b1f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8239 = VPACKSSWBZrm
24841
  { 8240, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b1f8005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #8240 = VPACKSSWBZrmk
24842
  { 8241, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1b1f8005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #8241 = VPACKSSWBZrmkz
24843
  { 8242, 3,  1,  0,  0,  0, 0x8081b1f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8242 = VPACKSSWBZrr
24844
  { 8243, 5,  1,  0,  0,  0, 0x80a1b1f8005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #8243 = VPACKSSWBZrrk
24845
  { 8244, 4,  1,  0,  0,  0, 0x80e1b1f8005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #8244 = VPACKSSWBZrrkz
24846
  { 8245, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x131b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8245 = VPACKSSWBrm
24847
  { 8246, 3,  1,  0,  276,  0, 0x131b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8246 = VPACKSSWBrr
24848
  { 8247, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x915b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8247 = VPACKUSDWYrm
24849
  { 8248, 3,  1,  0,  276,  0, 0x915b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8248 = VPACKUSDWYrr
24850
  { 8249, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200115e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8249 = VPACKUSDWZ128rm
24851
  { 8250, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90115e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8250 = VPACKUSDWZ128rmb
24852
  { 8251, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92115e0009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #8251 = VPACKUSDWZ128rmbk
24853
  { 8252, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96115e0009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #8252 = VPACKUSDWZ128rmbkz
24854
  { 8253, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202115e0009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #8253 = VPACKUSDWZ128rmk
24855
  { 8254, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206115e0009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #8254 = VPACKUSDWZ128rmkz
24856
  { 8255, 3,  1,  0,  0,  0, 0x200115e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8255 = VPACKUSDWZ128rr
24857
  { 8256, 5,  1,  0,  0,  0, 0x202115e0009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #8256 = VPACKUSDWZ128rrk
24858
  { 8257, 4,  1,  0,  0,  0, 0x206115e0009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #8257 = VPACKUSDWZ128rrkz
24859
  { 8258, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400915e0009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8258 = VPACKUSDWZ256rm
24860
  { 8259, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90915e0009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8259 = VPACKUSDWZ256rmb
24861
  { 8260, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92915e0009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #8260 = VPACKUSDWZ256rmbk
24862
  { 8261, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96915e0009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #8261 = VPACKUSDWZ256rmbkz
24863
  { 8262, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402915e0009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #8262 = VPACKUSDWZ256rmk
24864
  { 8263, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406915e0009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #8263 = VPACKUSDWZ256rmkz
24865
  { 8264, 3,  1,  0,  0,  0, 0x400915e0009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8264 = VPACKUSDWZ256rr
24866
  { 8265, 5,  1,  0,  0,  0, 0x402915e0009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #8265 = VPACKUSDWZ256rrk
24867
  { 8266, 4,  1,  0,  0,  0, 0x406915e0009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #8266 = VPACKUSDWZ256rrkz
24868
  { 8267, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808115e0009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8267 = VPACKUSDWZrm
24869
  { 8268, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98115e0009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8268 = VPACKUSDWZrmb
24870
  { 8269, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a115e0009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #8269 = VPACKUSDWZrmbk
24871
  { 8270, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e115e0009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #8270 = VPACKUSDWZrmbkz
24872
  { 8271, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a115e0009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #8271 = VPACKUSDWZrmk
24873
  { 8272, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e115e0009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #8272 = VPACKUSDWZrmkz
24874
  { 8273, 3,  1,  0,  0,  0, 0x808115e0009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8273 = VPACKUSDWZrr
24875
  { 8274, 5,  1,  0,  0,  0, 0x80a115e0009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #8274 = VPACKUSDWZrrk
24876
  { 8275, 4,  1,  0,  0,  0, 0x80e115e0009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #8275 = VPACKUSDWZrrkz
24877
  { 8276, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x115b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8276 = VPACKUSDWrm
24878
  { 8277, 3,  1,  0,  276,  0, 0x115b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8277 = VPACKUSDWrr
24879
  { 8278, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x933b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8278 = VPACKUSWBYrm
24880
  { 8279, 3,  1,  0,  276,  0, 0x933b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8279 = VPACKUSWBYrr
24881
  { 8280, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001b3f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8280 = VPACKUSWBZ128rm
24882
  { 8281, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b3f8005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #8281 = VPACKUSWBZ128rmk
24883
  { 8282, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061b3f8005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #8282 = VPACKUSWBZ128rmkz
24884
  { 8283, 3,  1,  0,  0,  0, 0x2001b3f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8283 = VPACKUSWBZ128rr
24885
  { 8284, 5,  1,  0,  0,  0, 0x2021b3f8005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #8284 = VPACKUSWBZ128rrk
24886
  { 8285, 4,  1,  0,  0,  0, 0x2061b3f8005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #8285 = VPACKUSWBZ128rrkz
24887
  { 8286, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009b3f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8286 = VPACKUSWBZ256rm
24888
  { 8287, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b3f8005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #8287 = VPACKUSWBZ256rmk
24889
  { 8288, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069b3f8005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #8288 = VPACKUSWBZ256rmkz
24890
  { 8289, 3,  1,  0,  0,  0, 0x4009b3f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8289 = VPACKUSWBZ256rr
24891
  { 8290, 5,  1,  0,  0,  0, 0x4029b3f8005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #8290 = VPACKUSWBZ256rrk
24892
  { 8291, 4,  1,  0,  0,  0, 0x4069b3f8005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #8291 = VPACKUSWBZ256rrkz
24893
  { 8292, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081b3f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8292 = VPACKUSWBZrm
24894
  { 8293, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b3f8005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #8293 = VPACKUSWBZrmk
24895
  { 8294, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1b3f8005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #8294 = VPACKUSWBZrmkz
24896
  { 8295, 3,  1,  0,  0,  0, 0x8081b3f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8295 = VPACKUSWBZrr
24897
  { 8296, 5,  1,  0,  0,  0, 0x80a1b3f8005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #8296 = VPACKUSWBZrrk
24898
  { 8297, 4,  1,  0,  0,  0, 0x80e1b3f8005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #8297 = VPACKUSWBZrrkz
24899
  { 8298, 7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x133b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8298 = VPACKUSWBrm
24900
  { 8299, 3,  1,  0,  276,  0, 0x133b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8299 = VPACKUSWBrr
24901
  { 8300, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x97e38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8300 = VPADDBYrm
24902
  { 8301, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x97e38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8301 = VPADDBYrr
24903
  { 8302, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017e78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8302 = VPADDBZ128rm
24904
  { 8303, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217e78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #8303 = VPADDBZ128rmk
24905
  { 8304, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617e78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #8304 = VPADDBZ128rmkz
24906
  { 8305, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20017e78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8305 = VPADDBZ128rr
24907
  { 8306, 5,  1,  0,  0,  0, 0x20217e78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #8306 = VPADDBZ128rrk
24908
  { 8307, 4,  1,  0,  0,  0, 0x20617e78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #8307 = VPADDBZ128rrkz
24909
  { 8308, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097e78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8308 = VPADDBZ256rm
24910
  { 8309, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297e78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #8309 = VPADDBZ256rmk
24911
  { 8310, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697e78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #8310 = VPADDBZ256rmkz
24912
  { 8311, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40097e78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8311 = VPADDBZ256rr
24913
  { 8312, 5,  1,  0,  0,  0, 0x40297e78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #8312 = VPADDBZ256rrk
24914
  { 8313, 4,  1,  0,  0,  0, 0x40697e78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #8313 = VPADDBZ256rrkz
24915
  { 8314, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817e78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8314 = VPADDBZrm
24916
  { 8315, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17e78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #8315 = VPADDBZrmk
24917
  { 8316, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17e78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #8316 = VPADDBZrmkz
24918
  { 8317, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80817e78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8317 = VPADDBZrr
24919
  { 8318, 5,  1,  0,  0,  0, 0x80a17e78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #8318 = VPADDBZrrk
24920
  { 8319, 4,  1,  0,  0,  0, 0x80e17e78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #8319 = VPADDBZrrkz
24921
  { 8320, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x17e38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8320 = VPADDBrm
24922
  { 8321, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x17e38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8321 = VPADDBrr
24923
  { 8322, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x97f38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8322 = VPADDDYrm
24924
  { 8323, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x97f38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8323 = VPADDDYrr
24925
  { 8324, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017f78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8324 = VPADDDZ128rm
24926
  { 8325, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9017f78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8325 = VPADDDZ128rmb
24927
  { 8326, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9217f78005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #8326 = VPADDDZ128rmbk
24928
  { 8327, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9617f78005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #8327 = VPADDDZ128rmbkz
24929
  { 8328, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217f78005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #8328 = VPADDDZ128rmk
24930
  { 8329, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617f78005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #8329 = VPADDDZ128rmkz
24931
  { 8330, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20017f78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8330 = VPADDDZ128rr
24932
  { 8331, 5,  1,  0,  0,  0, 0x20217f78005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #8331 = VPADDDZ128rrk
24933
  { 8332, 4,  1,  0,  0,  0, 0x20617f78005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #8332 = VPADDDZ128rrkz
24934
  { 8333, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097f78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8333 = VPADDDZ256rm
24935
  { 8334, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9097f78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8334 = VPADDDZ256rmb
24936
  { 8335, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9297f78005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #8335 = VPADDDZ256rmbk
24937
  { 8336, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9697f78005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #8336 = VPADDDZ256rmbkz
24938
  { 8337, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297f78005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #8337 = VPADDDZ256rmk
24939
  { 8338, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697f78005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #8338 = VPADDDZ256rmkz
24940
  { 8339, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40097f78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8339 = VPADDDZ256rr
24941
  { 8340, 5,  1,  0,  0,  0, 0x40297f78005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #8340 = VPADDDZ256rrk
24942
  { 8341, 4,  1,  0,  0,  0, 0x40697f78005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #8341 = VPADDDZ256rrkz
24943
  { 8342, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817f78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8342 = VPADDDZrm
24944
  { 8343, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9817f78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8343 = VPADDDZrmb
24945
  { 8344, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a17f78005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #8344 = VPADDDZrmbk
24946
  { 8345, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e17f78005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #8345 = VPADDDZrmbkz
24947
  { 8346, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17f78005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #8346 = VPADDDZrmk
24948
  { 8347, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17f78005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #8347 = VPADDDZrmkz
24949
  { 8348, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80817f78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8348 = VPADDDZrr
24950
  { 8349, 5,  1,  0,  0,  0, 0x80a17f78005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #8349 = VPADDDZrrk
24951
  { 8350, 4,  1,  0,  0,  0, 0x80e17f78005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #8350 = VPADDDZrrkz
24952
  { 8351, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x17f38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8351 = VPADDDrm
24953
  { 8352, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x17f38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8352 = VPADDDrr
24954
  { 8353, 7,  1,  0,  378,  0|(1ULL<<MCID::MayLoad), 0x96a38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8353 = VPADDQYrm
24955
  { 8354, 3,  1,  0,  379,  0|(1ULL<<MCID::Commutable), 0x96a38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8354 = VPADDQYrr
24956
  { 8355, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001ea78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8355 = VPADDQZ128rm
24957
  { 8356, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101ea78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8356 = VPADDQZ128rmb
24958
  { 8357, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121ea78005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #8357 = VPADDQZ128rmbk
24959
  { 8358, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161ea78005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #8358 = VPADDQZ128rmbkz
24960
  { 8359, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021ea78005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #8359 = VPADDQZ128rmk
24961
  { 8360, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061ea78005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #8360 = VPADDQZ128rmkz
24962
  { 8361, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x2001ea78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8361 = VPADDQZ128rr
24963
  { 8362, 5,  1,  0,  0,  0, 0x2021ea78005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #8362 = VPADDQZ128rrk
24964
  { 8363, 4,  1,  0,  0,  0, 0x2061ea78005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #8363 = VPADDQZ128rrkz
24965
  { 8364, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009ea78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8364 = VPADDQZ256rm
24966
  { 8365, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109ea78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8365 = VPADDQZ256rmb
24967
  { 8366, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129ea78005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #8366 = VPADDQZ256rmbk
24968
  { 8367, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169ea78005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #8367 = VPADDQZ256rmbkz
24969
  { 8368, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029ea78005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #8368 = VPADDQZ256rmk
24970
  { 8369, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069ea78005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #8369 = VPADDQZ256rmkz
24971
  { 8370, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x4009ea78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8370 = VPADDQZ256rr
24972
  { 8371, 5,  1,  0,  0,  0, 0x4029ea78005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #8371 = VPADDQZ256rrk
24973
  { 8372, 4,  1,  0,  0,  0, 0x4069ea78005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #8372 = VPADDQZ256rrkz
24974
  { 8373, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081ea78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8373 = VPADDQZrm
24975
  { 8374, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181ea78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8374 = VPADDQZrmb
24976
  { 8375, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1ea78005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #8375 = VPADDQZrmbk
24977
  { 8376, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1ea78005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #8376 = VPADDQZrmbkz
24978
  { 8377, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1ea78005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #8377 = VPADDQZrmk
24979
  { 8378, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1ea78005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #8378 = VPADDQZrmkz
24980
  { 8379, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x8081ea78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8379 = VPADDQZrr
24981
  { 8380, 5,  1,  0,  0,  0, 0x80a1ea78005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #8380 = VPADDQZrrk
24982
  { 8381, 4,  1,  0,  0,  0, 0x80e1ea78005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #8381 = VPADDQZrrkz
24983
  { 8382, 7,  1,  0,  378,  0|(1ULL<<MCID::MayLoad), 0x16a38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8382 = VPADDQrm
24984
  { 8383, 3,  1,  0,  379,  0|(1ULL<<MCID::Commutable), 0x16a38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8383 = VPADDQrr
24985
  { 8384, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x97638005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8384 = VPADDSBYrm
24986
  { 8385, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x97638005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8385 = VPADDSBYrr
24987
  { 8386, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017678005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8386 = VPADDSBZ128rm
24988
  { 8387, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217678005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #8387 = VPADDSBZ128rmk
24989
  { 8388, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617678005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #8388 = VPADDSBZ128rmkz
24990
  { 8389, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20017678005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8389 = VPADDSBZ128rr
24991
  { 8390, 5,  1,  0,  0,  0, 0x20217678005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #8390 = VPADDSBZ128rrk
24992
  { 8391, 4,  1,  0,  0,  0, 0x20617678005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #8391 = VPADDSBZ128rrkz
24993
  { 8392, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097678005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8392 = VPADDSBZ256rm
24994
  { 8393, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297678005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #8393 = VPADDSBZ256rmk
24995
  { 8394, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697678005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #8394 = VPADDSBZ256rmkz
24996
  { 8395, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40097678005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8395 = VPADDSBZ256rr
24997
  { 8396, 5,  1,  0,  0,  0, 0x40297678005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #8396 = VPADDSBZ256rrk
24998
  { 8397, 4,  1,  0,  0,  0, 0x40697678005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #8397 = VPADDSBZ256rrkz
24999
  { 8398, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817678005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8398 = VPADDSBZrm
25000
  { 8399, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17678005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #8399 = VPADDSBZrmk
25001
  { 8400, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17678005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #8400 = VPADDSBZrmkz
25002
  { 8401, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80817678005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8401 = VPADDSBZrr
25003
  { 8402, 5,  1,  0,  0,  0, 0x80a17678005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #8402 = VPADDSBZrrk
25004
  { 8403, 4,  1,  0,  0,  0, 0x80e17678005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #8403 = VPADDSBZrrkz
25005
  { 8404, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x17638005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8404 = VPADDSBrm
25006
  { 8405, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x17638005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8405 = VPADDSBrr
25007
  { 8406, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x976b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8406 = VPADDSWYrm
25008
  { 8407, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x976b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8407 = VPADDSWYrr
25009
  { 8408, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200176f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8408 = VPADDSWZ128rm
25010
  { 8409, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202176f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #8409 = VPADDSWZ128rmk
25011
  { 8410, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206176f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #8410 = VPADDSWZ128rmkz
25012
  { 8411, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x200176f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8411 = VPADDSWZ128rr
25013
  { 8412, 5,  1,  0,  0,  0, 0x202176f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #8412 = VPADDSWZ128rrk
25014
  { 8413, 4,  1,  0,  0,  0, 0x206176f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #8413 = VPADDSWZ128rrkz
25015
  { 8414, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400976f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8414 = VPADDSWZ256rm
25016
  { 8415, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402976f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #8415 = VPADDSWZ256rmk
25017
  { 8416, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406976f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #8416 = VPADDSWZ256rmkz
25018
  { 8417, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x400976f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8417 = VPADDSWZ256rr
25019
  { 8418, 5,  1,  0,  0,  0, 0x402976f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #8418 = VPADDSWZ256rrk
25020
  { 8419, 4,  1,  0,  0,  0, 0x406976f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #8419 = VPADDSWZ256rrkz
25021
  { 8420, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808176f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8420 = VPADDSWZrm
25022
  { 8421, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a176f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #8421 = VPADDSWZrmk
25023
  { 8422, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e176f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #8422 = VPADDSWZrmkz
25024
  { 8423, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x808176f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8423 = VPADDSWZrr
25025
  { 8424, 5,  1,  0,  0,  0, 0x80a176f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #8424 = VPADDSWZrrk
25026
  { 8425, 4,  1,  0,  0,  0, 0x80e176f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #8425 = VPADDSWZrrkz
25027
  { 8426, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x176b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8426 = VPADDSWrm
25028
  { 8427, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x176b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8427 = VPADDSWrr
25029
  { 8428, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x96e38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8428 = VPADDUSBYrm
25030
  { 8429, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x96e38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8429 = VPADDUSBYrr
25031
  { 8430, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016e78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8430 = VPADDUSBZ128rm
25032
  { 8431, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216e78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #8431 = VPADDUSBZ128rmk
25033
  { 8432, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20616e78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #8432 = VPADDUSBZ128rmkz
25034
  { 8433, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20016e78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8433 = VPADDUSBZ128rr
25035
  { 8434, 5,  1,  0,  0,  0, 0x20216e78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #8434 = VPADDUSBZ128rrk
25036
  { 8435, 4,  1,  0,  0,  0, 0x20616e78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #8435 = VPADDUSBZ128rrkz
25037
  { 8436, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096e78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8436 = VPADDUSBZ256rm
25038
  { 8437, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296e78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #8437 = VPADDUSBZ256rmk
25039
  { 8438, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40696e78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #8438 = VPADDUSBZ256rmkz
25040
  { 8439, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40096e78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8439 = VPADDUSBZ256rr
25041
  { 8440, 5,  1,  0,  0,  0, 0x40296e78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #8440 = VPADDUSBZ256rrk
25042
  { 8441, 4,  1,  0,  0,  0, 0x40696e78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #8441 = VPADDUSBZ256rrkz
25043
  { 8442, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816e78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8442 = VPADDUSBZrm
25044
  { 8443, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16e78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #8443 = VPADDUSBZrmk
25045
  { 8444, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e16e78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #8444 = VPADDUSBZrmkz
25046
  { 8445, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80816e78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8445 = VPADDUSBZrr
25047
  { 8446, 5,  1,  0,  0,  0, 0x80a16e78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #8446 = VPADDUSBZrrk
25048
  { 8447, 4,  1,  0,  0,  0, 0x80e16e78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #8447 = VPADDUSBZrrkz
25049
  { 8448, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x16e38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8448 = VPADDUSBrm
25050
  { 8449, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x16e38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8449 = VPADDUSBrr
25051
  { 8450, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x96eb8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8450 = VPADDUSWYrm
25052
  { 8451, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x96eb8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8451 = VPADDUSWYrr
25053
  { 8452, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016ef8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8452 = VPADDUSWZ128rm
25054
  { 8453, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216ef8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #8453 = VPADDUSWZ128rmk
25055
  { 8454, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20616ef8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #8454 = VPADDUSWZ128rmkz
25056
  { 8455, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20016ef8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8455 = VPADDUSWZ128rr
25057
  { 8456, 5,  1,  0,  0,  0, 0x20216ef8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #8456 = VPADDUSWZ128rrk
25058
  { 8457, 4,  1,  0,  0,  0, 0x20616ef8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #8457 = VPADDUSWZ128rrkz
25059
  { 8458, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096ef8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8458 = VPADDUSWZ256rm
25060
  { 8459, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296ef8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #8459 = VPADDUSWZ256rmk
25061
  { 8460, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40696ef8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #8460 = VPADDUSWZ256rmkz
25062
  { 8461, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40096ef8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8461 = VPADDUSWZ256rr
25063
  { 8462, 5,  1,  0,  0,  0, 0x40296ef8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #8462 = VPADDUSWZ256rrk
25064
  { 8463, 4,  1,  0,  0,  0, 0x40696ef8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #8463 = VPADDUSWZ256rrkz
25065
  { 8464, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816ef8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8464 = VPADDUSWZrm
25066
  { 8465, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16ef8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #8465 = VPADDUSWZrmk
25067
  { 8466, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e16ef8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #8466 = VPADDUSWZrmkz
25068
  { 8467, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80816ef8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8467 = VPADDUSWZrr
25069
  { 8468, 5,  1,  0,  0,  0, 0x80a16ef8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #8468 = VPADDUSWZrrk
25070
  { 8469, 4,  1,  0,  0,  0, 0x80e16ef8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #8469 = VPADDUSWZrrkz
25071
  { 8470, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x16eb8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8470 = VPADDUSWrm
25072
  { 8471, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x16eb8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8471 = VPADDUSWrr
25073
  { 8472, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x97eb8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8472 = VPADDWYrm
25074
  { 8473, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x97eb8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8473 = VPADDWYrr
25075
  { 8474, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017ef8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8474 = VPADDWZ128rm
25076
  { 8475, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217ef8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #8475 = VPADDWZ128rmk
25077
  { 8476, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617ef8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #8476 = VPADDWZ128rmkz
25078
  { 8477, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20017ef8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8477 = VPADDWZ128rr
25079
  { 8478, 5,  1,  0,  0,  0, 0x20217ef8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #8478 = VPADDWZ128rrk
25080
  { 8479, 4,  1,  0,  0,  0, 0x20617ef8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #8479 = VPADDWZ128rrkz
25081
  { 8480, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097ef8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8480 = VPADDWZ256rm
25082
  { 8481, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297ef8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #8481 = VPADDWZ256rmk
25083
  { 8482, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697ef8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #8482 = VPADDWZ256rmkz
25084
  { 8483, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40097ef8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8483 = VPADDWZ256rr
25085
  { 8484, 5,  1,  0,  0,  0, 0x40297ef8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #8484 = VPADDWZ256rrk
25086
  { 8485, 4,  1,  0,  0,  0, 0x40697ef8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #8485 = VPADDWZ256rrkz
25087
  { 8486, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817ef8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8486 = VPADDWZrm
25088
  { 8487, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17ef8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #8487 = VPADDWZrmk
25089
  { 8488, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17ef8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #8488 = VPADDWZrmkz
25090
  { 8489, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80817ef8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8489 = VPADDWZrr
25091
  { 8490, 5,  1,  0,  0,  0, 0x80a17ef8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #8490 = VPADDWZrrk
25092
  { 8491, 4,  1,  0,  0,  0, 0x80e17ef8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #8491 = VPADDWZrrkz
25093
  { 8492, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x17eb8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8492 = VPADDWrm
25094
  { 8493, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x17eb8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8493 = VPADDWrr
25095
  { 8494, 8,  1,  0,  380,  0|(1ULL<<MCID::MayLoad), 0x107b804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #8494 = VPALIGNR128rm
25096
  { 8495, 4,  1,  0,  381,  0, 0x107b804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #8495 = VPALIGNR128rr
25097
  { 8496, 8,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x907b804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #8496 = VPALIGNR256rm
25098
  { 8497, 4,  1,  0,  276,  0, 0x907b804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #8497 = VPALIGNR256rr
25099
  { 8498, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200107f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #8498 = VPALIGNZ128rmi
25100
  { 8499, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202107f804d006ULL, nullptr, nullptr, OperandInfo726, -1 ,nullptr },  // Inst #8499 = VPALIGNZ128rmik
25101
  { 8500, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206107f804d006ULL, nullptr, nullptr, OperandInfo727, -1 ,nullptr },  // Inst #8500 = VPALIGNZ128rmikz
25102
  { 8501, 4,  1,  0,  0,  0, 0x200107f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #8501 = VPALIGNZ128rri
25103
  { 8502, 6,  1,  0,  0,  0, 0x202107f804d005ULL, nullptr, nullptr, OperandInfo728, -1 ,nullptr },  // Inst #8502 = VPALIGNZ128rrik
25104
  { 8503, 5,  1,  0,  0,  0, 0x206107f804d005ULL, nullptr, nullptr, OperandInfo729, -1 ,nullptr },  // Inst #8503 = VPALIGNZ128rrikz
25105
  { 8504, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400907f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #8504 = VPALIGNZ256rmi
25106
  { 8505, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402907f804d006ULL, nullptr, nullptr, OperandInfo730, -1 ,nullptr },  // Inst #8505 = VPALIGNZ256rmik
25107
  { 8506, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406907f804d006ULL, nullptr, nullptr, OperandInfo731, -1 ,nullptr },  // Inst #8506 = VPALIGNZ256rmikz
25108
  { 8507, 4,  1,  0,  0,  0, 0x400907f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #8507 = VPALIGNZ256rri
25109
  { 8508, 6,  1,  0,  0,  0, 0x402907f804d005ULL, nullptr, nullptr, OperandInfo732, -1 ,nullptr },  // Inst #8508 = VPALIGNZ256rrik
25110
  { 8509, 5,  1,  0,  0,  0, 0x406907f804d005ULL, nullptr, nullptr, OperandInfo733, -1 ,nullptr },  // Inst #8509 = VPALIGNZ256rrikz
25111
  { 8510, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808107f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #8510 = VPALIGNZrmi
25112
  { 8511, 10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a107f804d006ULL, nullptr, nullptr, OperandInfo734, -1 ,nullptr },  // Inst #8511 = VPALIGNZrmik
25113
  { 8512, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e107f804d006ULL, nullptr, nullptr, OperandInfo735, -1 ,nullptr },  // Inst #8512 = VPALIGNZrmikz
25114
  { 8513, 4,  1,  0,  0,  0, 0x808107f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #8513 = VPALIGNZrri
25115
  { 8514, 6,  1,  0,  0,  0, 0x80a107f804d005ULL, nullptr, nullptr, OperandInfo736, -1 ,nullptr },  // Inst #8514 = VPALIGNZrrik
25116
  { 8515, 5,  1,  0,  0,  0, 0x80e107f804d005ULL, nullptr, nullptr, OperandInfo737, -1 ,nullptr },  // Inst #8515 = VPALIGNZrrikz
25117
  { 8516, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016df8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8516 = VPANDDZ128rm
25118
  { 8517, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9016df8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8517 = VPANDDZ128rmb
25119
  { 8518, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9216df8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #8518 = VPANDDZ128rmbk
25120
  { 8519, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9616df8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #8519 = VPANDDZ128rmbkz
25121
  { 8520, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216df8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #8520 = VPANDDZ128rmk
25122
  { 8521, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20616df8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #8521 = VPANDDZ128rmkz
25123
  { 8522, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20016df8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8522 = VPANDDZ128rr
25124
  { 8523, 5,  1,  0,  0,  0, 0x20216df8005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #8523 = VPANDDZ128rrk
25125
  { 8524, 4,  1,  0,  0,  0, 0x20616df8005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #8524 = VPANDDZ128rrkz
25126
  { 8525, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096df8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8525 = VPANDDZ256rm
25127
  { 8526, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9096df8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8526 = VPANDDZ256rmb
25128
  { 8527, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9296df8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #8527 = VPANDDZ256rmbk
25129
  { 8528, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9696df8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #8528 = VPANDDZ256rmbkz
25130
  { 8529, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296df8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #8529 = VPANDDZ256rmk
25131
  { 8530, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40696df8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #8530 = VPANDDZ256rmkz
25132
  { 8531, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40096df8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8531 = VPANDDZ256rr
25133
  { 8532, 5,  1,  0,  0,  0, 0x40296df8005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #8532 = VPANDDZ256rrk
25134
  { 8533, 4,  1,  0,  0,  0, 0x40696df8005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #8533 = VPANDDZ256rrkz
25135
  { 8534, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816df8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8534 = VPANDDZrm
25136
  { 8535, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9816df8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8535 = VPANDDZrmb
25137
  { 8536, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a16df8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #8536 = VPANDDZrmbk
25138
  { 8537, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e16df8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #8537 = VPANDDZrmbkz
25139
  { 8538, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16df8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #8538 = VPANDDZrmk
25140
  { 8539, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e16df8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #8539 = VPANDDZrmkz
25141
  { 8540, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80816df8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8540 = VPANDDZrr
25142
  { 8541, 5,  1,  0,  0,  0, 0x80a16df8005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #8541 = VPANDDZrrk
25143
  { 8542, 4,  1,  0,  0,  0, 0x80e16df8005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #8542 = VPANDDZrrkz
25144
  { 8543, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016ff8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8543 = VPANDNDZ128rm
25145
  { 8544, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9016ff8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8544 = VPANDNDZ128rmb
25146
  { 8545, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9216ff8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #8545 = VPANDNDZ128rmbk
25147
  { 8546, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9616ff8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #8546 = VPANDNDZ128rmbkz
25148
  { 8547, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216ff8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #8547 = VPANDNDZ128rmk
25149
  { 8548, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20616ff8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #8548 = VPANDNDZ128rmkz
25150
  { 8549, 3,  1,  0,  0,  0, 0x20016ff8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8549 = VPANDNDZ128rr
25151
  { 8550, 5,  1,  0,  0,  0, 0x20216ff8005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #8550 = VPANDNDZ128rrk
25152
  { 8551, 4,  1,  0,  0,  0, 0x20616ff8005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #8551 = VPANDNDZ128rrkz
25153
  { 8552, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096ff8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8552 = VPANDNDZ256rm
25154
  { 8553, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9096ff8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8553 = VPANDNDZ256rmb
25155
  { 8554, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9296ff8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #8554 = VPANDNDZ256rmbk
25156
  { 8555, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9696ff8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #8555 = VPANDNDZ256rmbkz
25157
  { 8556, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296ff8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #8556 = VPANDNDZ256rmk
25158
  { 8557, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40696ff8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #8557 = VPANDNDZ256rmkz
25159
  { 8558, 3,  1,  0,  0,  0, 0x40096ff8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8558 = VPANDNDZ256rr
25160
  { 8559, 5,  1,  0,  0,  0, 0x40296ff8005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #8559 = VPANDNDZ256rrk
25161
  { 8560, 4,  1,  0,  0,  0, 0x40696ff8005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #8560 = VPANDNDZ256rrkz
25162
  { 8561, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816ff8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8561 = VPANDNDZrm
25163
  { 8562, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9816ff8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8562 = VPANDNDZrmb
25164
  { 8563, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a16ff8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #8563 = VPANDNDZrmbk
25165
  { 8564, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e16ff8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #8564 = VPANDNDZrmbkz
25166
  { 8565, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16ff8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #8565 = VPANDNDZrmk
25167
  { 8566, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e16ff8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #8566 = VPANDNDZrmkz
25168
  { 8567, 3,  1,  0,  0,  0, 0x80816ff8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8567 = VPANDNDZrr
25169
  { 8568, 5,  1,  0,  0,  0, 0x80a16ff8005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #8568 = VPANDNDZrrk
25170
  { 8569, 4,  1,  0,  0,  0, 0x80e16ff8005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #8569 = VPANDNDZrrkz
25171
  { 8570, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001eff8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8570 = VPANDNQZ128rm
25172
  { 8571, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101eff8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8571 = VPANDNQZ128rmb
25173
  { 8572, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121eff8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #8572 = VPANDNQZ128rmbk
25174
  { 8573, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161eff8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #8573 = VPANDNQZ128rmbkz
25175
  { 8574, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021eff8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #8574 = VPANDNQZ128rmk
25176
  { 8575, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061eff8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #8575 = VPANDNQZ128rmkz
25177
  { 8576, 3,  1,  0,  0,  0, 0x2001eff8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8576 = VPANDNQZ128rr
25178
  { 8577, 5,  1,  0,  0,  0, 0x2021eff8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #8577 = VPANDNQZ128rrk
25179
  { 8578, 4,  1,  0,  0,  0, 0x2061eff8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #8578 = VPANDNQZ128rrkz
25180
  { 8579, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009eff8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8579 = VPANDNQZ256rm
25181
  { 8580, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109eff8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8580 = VPANDNQZ256rmb
25182
  { 8581, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129eff8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #8581 = VPANDNQZ256rmbk
25183
  { 8582, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169eff8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #8582 = VPANDNQZ256rmbkz
25184
  { 8583, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029eff8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #8583 = VPANDNQZ256rmk
25185
  { 8584, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069eff8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #8584 = VPANDNQZ256rmkz
25186
  { 8585, 3,  1,  0,  0,  0, 0x4009eff8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8585 = VPANDNQZ256rr
25187
  { 8586, 5,  1,  0,  0,  0, 0x4029eff8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #8586 = VPANDNQZ256rrk
25188
  { 8587, 4,  1,  0,  0,  0, 0x4069eff8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #8587 = VPANDNQZ256rrkz
25189
  { 8588, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081eff8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8588 = VPANDNQZrm
25190
  { 8589, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181eff8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8589 = VPANDNQZrmb
25191
  { 8590, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1eff8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #8590 = VPANDNQZrmbk
25192
  { 8591, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1eff8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #8591 = VPANDNQZrmbkz
25193
  { 8592, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1eff8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #8592 = VPANDNQZrmk
25194
  { 8593, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1eff8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #8593 = VPANDNQZrmkz
25195
  { 8594, 3,  1,  0,  0,  0, 0x8081eff8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8594 = VPANDNQZrr
25196
  { 8595, 5,  1,  0,  0,  0, 0x80a1eff8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #8595 = VPANDNQZrrk
25197
  { 8596, 4,  1,  0,  0,  0, 0x80e1eff8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #8596 = VPANDNQZrrkz
25198
  { 8597, 7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x96fb8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8597 = VPANDNYrm
25199
  { 8598, 3,  1,  0,  383,  0, 0x96fb8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8598 = VPANDNYrr
25200
  { 8599, 7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x16fb8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8599 = VPANDNrm
25201
  { 8600, 3,  1,  0,  383,  0, 0x16fb8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8600 = VPANDNrr
25202
  { 8601, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001edf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8601 = VPANDQZ128rm
25203
  { 8602, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101edf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8602 = VPANDQZ128rmb
25204
  { 8603, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121edf8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #8603 = VPANDQZ128rmbk
25205
  { 8604, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161edf8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #8604 = VPANDQZ128rmbkz
25206
  { 8605, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021edf8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #8605 = VPANDQZ128rmk
25207
  { 8606, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061edf8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #8606 = VPANDQZ128rmkz
25208
  { 8607, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x2001edf8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8607 = VPANDQZ128rr
25209
  { 8608, 5,  1,  0,  0,  0, 0x2021edf8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #8608 = VPANDQZ128rrk
25210
  { 8609, 4,  1,  0,  0,  0, 0x2061edf8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #8609 = VPANDQZ128rrkz
25211
  { 8610, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009edf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8610 = VPANDQZ256rm
25212
  { 8611, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109edf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8611 = VPANDQZ256rmb
25213
  { 8612, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129edf8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #8612 = VPANDQZ256rmbk
25214
  { 8613, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169edf8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #8613 = VPANDQZ256rmbkz
25215
  { 8614, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029edf8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #8614 = VPANDQZ256rmk
25216
  { 8615, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069edf8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #8615 = VPANDQZ256rmkz
25217
  { 8616, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x4009edf8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8616 = VPANDQZ256rr
25218
  { 8617, 5,  1,  0,  0,  0, 0x4029edf8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #8617 = VPANDQZ256rrk
25219
  { 8618, 4,  1,  0,  0,  0, 0x4069edf8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #8618 = VPANDQZ256rrkz
25220
  { 8619, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081edf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8619 = VPANDQZrm
25221
  { 8620, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181edf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8620 = VPANDQZrmb
25222
  { 8621, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1edf8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #8621 = VPANDQZrmbk
25223
  { 8622, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1edf8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #8622 = VPANDQZrmbkz
25224
  { 8623, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1edf8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #8623 = VPANDQZrmk
25225
  { 8624, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1edf8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #8624 = VPANDQZrmkz
25226
  { 8625, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x8081edf8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8625 = VPANDQZrr
25227
  { 8626, 5,  1,  0,  0,  0, 0x80a1edf8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #8626 = VPANDQZrrk
25228
  { 8627, 4,  1,  0,  0,  0, 0x80e1edf8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #8627 = VPANDQZrrkz
25229
  { 8628, 7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x96db8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8628 = VPANDYrm
25230
  { 8629, 3,  1,  0,  383,  0|(1ULL<<MCID::Commutable), 0x96db8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8629 = VPANDYrr
25231
  { 8630, 7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x16db8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8630 = VPANDrm
25232
  { 8631, 3,  1,  0,  383,  0|(1ULL<<MCID::Commutable), 0x16db8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8631 = VPANDrr
25233
  { 8632, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x97038005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8632 = VPAVGBYrm
25234
  { 8633, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x97038005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8633 = VPAVGBYrr
25235
  { 8634, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017078005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8634 = VPAVGBZ128rm
25236
  { 8635, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217078005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #8635 = VPAVGBZ128rmk
25237
  { 8636, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617078005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #8636 = VPAVGBZ128rmkz
25238
  { 8637, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20017078005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8637 = VPAVGBZ128rr
25239
  { 8638, 5,  1,  0,  0,  0, 0x20217078005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #8638 = VPAVGBZ128rrk
25240
  { 8639, 4,  1,  0,  0,  0, 0x20617078005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #8639 = VPAVGBZ128rrkz
25241
  { 8640, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097078005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8640 = VPAVGBZ256rm
25242
  { 8641, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297078005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #8641 = VPAVGBZ256rmk
25243
  { 8642, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697078005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #8642 = VPAVGBZ256rmkz
25244
  { 8643, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40097078005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8643 = VPAVGBZ256rr
25245
  { 8644, 5,  1,  0,  0,  0, 0x40297078005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #8644 = VPAVGBZ256rrk
25246
  { 8645, 4,  1,  0,  0,  0, 0x40697078005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #8645 = VPAVGBZ256rrkz
25247
  { 8646, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817078005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8646 = VPAVGBZrm
25248
  { 8647, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17078005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #8647 = VPAVGBZrmk
25249
  { 8648, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17078005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #8648 = VPAVGBZrmkz
25250
  { 8649, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80817078005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8649 = VPAVGBZrr
25251
  { 8650, 5,  1,  0,  0,  0, 0x80a17078005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #8650 = VPAVGBZrrk
25252
  { 8651, 4,  1,  0,  0,  0, 0x80e17078005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #8651 = VPAVGBZrrkz
25253
  { 8652, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x17038005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8652 = VPAVGBrm
25254
  { 8653, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x17038005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8653 = VPAVGBrr
25255
  { 8654, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x971b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #8654 = VPAVGWYrm
25256
  { 8655, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x971b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #8655 = VPAVGWYrr
25257
  { 8656, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200171f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8656 = VPAVGWZ128rm
25258
  { 8657, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202171f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #8657 = VPAVGWZ128rmk
25259
  { 8658, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206171f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #8658 = VPAVGWZ128rmkz
25260
  { 8659, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x200171f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8659 = VPAVGWZ128rr
25261
  { 8660, 5,  1,  0,  0,  0, 0x202171f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #8660 = VPAVGWZ128rrk
25262
  { 8661, 4,  1,  0,  0,  0, 0x206171f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #8661 = VPAVGWZ128rrkz
25263
  { 8662, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400971f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8662 = VPAVGWZ256rm
25264
  { 8663, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402971f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #8663 = VPAVGWZ256rmk
25265
  { 8664, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406971f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #8664 = VPAVGWZ256rmkz
25266
  { 8665, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x400971f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8665 = VPAVGWZ256rr
25267
  { 8666, 5,  1,  0,  0,  0, 0x402971f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #8666 = VPAVGWZ256rrk
25268
  { 8667, 4,  1,  0,  0,  0, 0x406971f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #8667 = VPAVGWZ256rrkz
25269
  { 8668, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808171f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8668 = VPAVGWZrm
25270
  { 8669, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a171f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #8669 = VPAVGWZrmk
25271
  { 8670, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e171f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #8670 = VPAVGWZrmkz
25272
  { 8671, 3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x808171f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8671 = VPAVGWZrr
25273
  { 8672, 5,  1,  0,  0,  0, 0x80a171f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #8672 = VPAVGWZrrk
25274
  { 8673, 4,  1,  0,  0,  0, 0x80e171f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #8673 = VPAVGWZrrkz
25275
  { 8674, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x171b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #8674 = VPAVGWrm
25276
  { 8675, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x171b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #8675 = VPAVGWrr
25277
  { 8676, 8,  1,  0,  798,  0|(1ULL<<MCID::MayLoad), 0x9013804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #8676 = VPBLENDDYrmi
25278
  { 8677, 4,  1,  0,  797,  0|(1ULL<<MCID::Commutable), 0x9013804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #8677 = VPBLENDDYrri
25279
  { 8678, 8,  1,  0,  798,  0|(1ULL<<MCID::MayLoad), 0x1013804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #8678 = VPBLENDDrmi
25280
  { 8679, 4,  1,  0,  797,  0|(1ULL<<MCID::Commutable), 0x1013804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #8679 = VPBLENDDrri
25281
  { 8680, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20013378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8680 = VPBLENDMBZ128rm
25282
  { 8681, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213378009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #8681 = VPBLENDMBZ128rmk
25283
  { 8682, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20613378009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #8682 = VPBLENDMBZ128rmkz
25284
  { 8683, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20013378009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8683 = VPBLENDMBZ128rr
25285
  { 8684, 4,  1,  0,  0,  0, 0x20213378009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #8684 = VPBLENDMBZ128rrk
25286
  { 8685, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20613378009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #8685 = VPBLENDMBZ128rrkz
25287
  { 8686, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40093378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8686 = VPBLENDMBZ256rm
25288
  { 8687, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293378009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #8687 = VPBLENDMBZ256rmk
25289
  { 8688, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40693378009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #8688 = VPBLENDMBZ256rmkz
25290
  { 8689, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40093378009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8689 = VPBLENDMBZ256rr
25291
  { 8690, 4,  1,  0,  0,  0, 0x40293378009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #8690 = VPBLENDMBZ256rrk
25292
  { 8691, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40693378009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #8691 = VPBLENDMBZ256rrkz
25293
  { 8692, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80813378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8692 = VPBLENDMBZrm
25294
  { 8693, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13378009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #8693 = VPBLENDMBZrmk
25295
  { 8694, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e13378009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #8694 = VPBLENDMBZrmkz
25296
  { 8695, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80813378009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8695 = VPBLENDMBZrr
25297
  { 8696, 4,  1,  0,  0,  0, 0x80a13378009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #8696 = VPBLENDMBZrrk
25298
  { 8697, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e13378009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #8697 = VPBLENDMBZrrkz
25299
  { 8698, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20013278009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8698 = VPBLENDMDZ128rm
25300
  { 8699, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9013278009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8699 = VPBLENDMDZ128rmb
25301
  { 8700, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9213278009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #8700 = VPBLENDMDZ128rmbk
25302
  { 8701, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213278009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #8701 = VPBLENDMDZ128rmk
25303
  { 8702, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20613278009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #8702 = VPBLENDMDZ128rmkz
25304
  { 8703, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20013278009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8703 = VPBLENDMDZ128rr
25305
  { 8704, 4,  1,  0,  0,  0, 0x20213278009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #8704 = VPBLENDMDZ128rrk
25306
  { 8705, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20613278009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #8705 = VPBLENDMDZ128rrkz
25307
  { 8706, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40093278009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8706 = VPBLENDMDZ256rm
25308
  { 8707, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9093278009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8707 = VPBLENDMDZ256rmb
25309
  { 8708, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9293278009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #8708 = VPBLENDMDZ256rmbk
25310
  { 8709, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293278009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #8709 = VPBLENDMDZ256rmk
25311
  { 8710, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40693278009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #8710 = VPBLENDMDZ256rmkz
25312
  { 8711, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40093278009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8711 = VPBLENDMDZ256rr
25313
  { 8712, 4,  1,  0,  0,  0, 0x40293278009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #8712 = VPBLENDMDZ256rrk
25314
  { 8713, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40693278009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #8713 = VPBLENDMDZ256rrkz
25315
  { 8714, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80813278009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8714 = VPBLENDMDZrm
25316
  { 8715, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x9813278009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8715 = VPBLENDMDZrmb
25317
  { 8716, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a13278009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #8716 = VPBLENDMDZrmbk
25318
  { 8717, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13278009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #8717 = VPBLENDMDZrmk
25319
  { 8718, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e13278009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #8718 = VPBLENDMDZrmkz
25320
  { 8719, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80813278009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8719 = VPBLENDMDZrr
25321
  { 8720, 4,  1,  0,  0,  0, 0x80a13278009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #8720 = VPBLENDMDZrrk
25322
  { 8721, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e13278009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #8721 = VPBLENDMDZrrkz
25323
  { 8722, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b278009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8722 = VPBLENDMQZ128rm
25324
  { 8723, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1101b278009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8723 = VPBLENDMQZ128rmb
25325
  { 8724, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121b278009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #8724 = VPBLENDMQZ128rmbk
25326
  { 8725, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b278009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #8725 = VPBLENDMQZ128rmk
25327
  { 8726, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b278009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #8726 = VPBLENDMQZ128rmkz
25328
  { 8727, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b278009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8727 = VPBLENDMQZ128rr
25329
  { 8728, 4,  1,  0,  0,  0, 0x2021b278009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #8728 = VPBLENDMQZ128rrk
25330
  { 8729, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b278009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #8729 = VPBLENDMQZ128rrkz
25331
  { 8730, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b278009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8730 = VPBLENDMQZ256rm
25332
  { 8731, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1109b278009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8731 = VPBLENDMQZ256rmb
25333
  { 8732, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129b278009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #8732 = VPBLENDMQZ256rmbk
25334
  { 8733, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b278009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #8733 = VPBLENDMQZ256rmk
25335
  { 8734, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b278009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #8734 = VPBLENDMQZ256rmkz
25336
  { 8735, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b278009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8735 = VPBLENDMQZ256rr
25337
  { 8736, 4,  1,  0,  0,  0, 0x4029b278009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #8736 = VPBLENDMQZ256rrk
25338
  { 8737, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b278009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #8737 = VPBLENDMQZ256rrkz
25339
  { 8738, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b278009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8738 = VPBLENDMQZrm
25340
  { 8739, 7,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1181b278009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8739 = VPBLENDMQZrmb
25341
  { 8740, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1b278009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #8740 = VPBLENDMQZrmbk
25342
  { 8741, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b278009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #8741 = VPBLENDMQZrmk
25343
  { 8742, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b278009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #8742 = VPBLENDMQZrmkz
25344
  { 8743, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b278009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8743 = VPBLENDMQZrr
25345
  { 8744, 4,  1,  0,  0,  0, 0x80a1b278009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #8744 = VPBLENDMQZrrk
25346
  { 8745, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b278009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #8745 = VPBLENDMQZrrkz
25347
  { 8746, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #8746 = VPBLENDMWZ128rm
25348
  { 8747, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b378009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #8747 = VPBLENDMWZ128rmk
25349
  { 8748, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b378009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #8748 = VPBLENDMWZ128rmkz
25350
  { 8749, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b378009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #8749 = VPBLENDMWZ128rr
25351
  { 8750, 4,  1,  0,  0,  0, 0x2021b378009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #8750 = VPBLENDMWZ128rrk
25352
  { 8751, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b378009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #8751 = VPBLENDMWZ128rrkz
25353
  { 8752, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #8752 = VPBLENDMWZ256rm
25354
  { 8753, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b378009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #8753 = VPBLENDMWZ256rmk
25355
  { 8754, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b378009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #8754 = VPBLENDMWZ256rmkz
25356
  { 8755, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b378009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #8755 = VPBLENDMWZ256rr
25357
  { 8756, 4,  1,  0,  0,  0, 0x4029b378009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #8756 = VPBLENDMWZ256rrk
25358
  { 8757, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b378009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #8757 = VPBLENDMWZ256rrkz
25359
  { 8758, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #8758 = VPBLENDMWZrm
25360
  { 8759, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b378009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #8759 = VPBLENDMWZrmk
25361
  { 8760, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b378009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #8760 = VPBLENDMWZrmkz
25362
  { 8761, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b378009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #8761 = VPBLENDMWZrr
25363
  { 8762, 4,  1,  0,  0,  0, 0x80a1b378009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #8762 = VPBLENDMWZrrk
25364
  { 8763, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b378009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #8763 = VPBLENDMWZrrkz
25365
  { 8764, 8,  1,  0,  562,  0|(1ULL<<MCID::MayLoad), 0xd263804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #8764 = VPBLENDVBYrm
25366
  { 8765, 4,  1,  0,  563,  0, 0xd263804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #8765 = VPBLENDVBYrr
25367
  { 8766, 8,  1,  0,  562,  0|(1ULL<<MCID::MayLoad), 0x5263804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #8766 = VPBLENDVBrm
25368
  { 8767, 4,  1,  0,  563,  0, 0x5263804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #8767 = VPBLENDVBrr
25369
  { 8768, 8,  1,  0,  796,  0|(1ULL<<MCID::MayLoad), 0x9073804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #8768 = VPBLENDWYrmi
25370
  { 8769, 4,  1,  0,  794,  0|(1ULL<<MCID::Commutable), 0x9073804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #8769 = VPBLENDWYrri
25371
  { 8770, 8,  1,  0,  796,  0|(1ULL<<MCID::MayLoad), 0x1073804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #8770 = VPBLENDWrmi
25372
  { 8771, 4,  1,  0,  794,  0|(1ULL<<MCID::Commutable), 0x1073804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #8771 = VPBLENDWrri
25373
  { 8772, 6,  1,  0,  810,  0|(1ULL<<MCID::MayLoad), 0x83c38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #8772 = VPBROADCASTBYrm
25374
  { 8773, 2,  1,  0,  544,  0, 0x83c38009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #8773 = VPBROADCASTBYrr
25375
  { 8774, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2003c60009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #8774 = VPBROADCASTBZ128m
25376
  { 8775, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2203c60009006ULL, nullptr, nullptr, OperandInfo677, -1 ,nullptr },  // Inst #8775 = VPBROADCASTBZ128mk
25377
  { 8776, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2603c60009006ULL, nullptr, nullptr, OperandInfo678, -1 ,nullptr },  // Inst #8776 = VPBROADCASTBZ128mkz
25378
  { 8777, 2,  1,  0,  0,  0, 0x20003c60009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #8777 = VPBROADCASTBZ128r
25379
  { 8778, 4,  1,  0,  0,  0, 0x20203c60009005ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #8778 = VPBROADCASTBZ128rk
25380
  { 8779, 3,  1,  0,  0,  0, 0x20603c60009005ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #8779 = VPBROADCASTBZ128rkz
25381
  { 8780, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2083c60009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8780 = VPBROADCASTBZ256m
25382
  { 8781, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2283c60009006ULL, nullptr, nullptr, OperandInfo682, -1 ,nullptr },  // Inst #8781 = VPBROADCASTBZ256mk
25383
  { 8782, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2683c60009006ULL, nullptr, nullptr, OperandInfo683, -1 ,nullptr },  // Inst #8782 = VPBROADCASTBZ256mkz
25384
  { 8783, 2,  1,  0,  0,  0, 0x40083c60009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #8783 = VPBROADCASTBZ256r
25385
  { 8784, 4,  1,  0,  0,  0, 0x40283c60009005ULL, nullptr, nullptr, OperandInfo738, -1 ,nullptr },  // Inst #8784 = VPBROADCASTBZ256rk
25386
  { 8785, 3,  1,  0,  0,  0, 0x40683c60009005ULL, nullptr, nullptr, OperandInfo739, -1 ,nullptr },  // Inst #8785 = VPBROADCASTBZ256rkz
25387
  { 8786, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2803c60009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8786 = VPBROADCASTBZm
25388
  { 8787, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2a03c60009006ULL, nullptr, nullptr, OperandInfo687, -1 ,nullptr },  // Inst #8787 = VPBROADCASTBZmk
25389
  { 8788, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2e03c60009006ULL, nullptr, nullptr, OperandInfo688, -1 ,nullptr },  // Inst #8788 = VPBROADCASTBZmkz
25390
  { 8789, 2,  1,  0,  0,  0, 0x80803c60009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #8789 = VPBROADCASTBZr
25391
  { 8790, 4,  1,  0,  0,  0, 0x80a03c60009005ULL, nullptr, nullptr, OperandInfo740, -1 ,nullptr },  // Inst #8790 = VPBROADCASTBZrk
25392
  { 8791, 3,  1,  0,  0,  0, 0x80e03c60009005ULL, nullptr, nullptr, OperandInfo741, -1 ,nullptr },  // Inst #8791 = VPBROADCASTBZrkz
25393
  { 8792, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003d60009005ULL, nullptr, nullptr, OperandInfo659, -1 ,nullptr },  // Inst #8792 = VPBROADCASTBrZ128r
25394
  { 8793, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203d60009005ULL, nullptr, nullptr, OperandInfo742, -1 ,nullptr },  // Inst #8793 = VPBROADCASTBrZ128rk
25395
  { 8794, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603d60009005ULL, nullptr, nullptr, OperandInfo743, -1 ,nullptr },  // Inst #8794 = VPBROADCASTBrZ128rkz
25396
  { 8795, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083d60009005ULL, nullptr, nullptr, OperandInfo744, -1 ,nullptr },  // Inst #8795 = VPBROADCASTBrZ256r
25397
  { 8796, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283d60009005ULL, nullptr, nullptr, OperandInfo745, -1 ,nullptr },  // Inst #8796 = VPBROADCASTBrZ256rk
25398
  { 8797, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683d60009005ULL, nullptr, nullptr, OperandInfo746, -1 ,nullptr },  // Inst #8797 = VPBROADCASTBrZ256rkz
25399
  { 8798, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80803d60009005ULL, nullptr, nullptr, OperandInfo747, -1 ,nullptr },  // Inst #8798 = VPBROADCASTBrZr
25400
  { 8799, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03d60009005ULL, nullptr, nullptr, OperandInfo748, -1 ,nullptr },  // Inst #8799 = VPBROADCASTBrZrk
25401
  { 8800, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03d60009005ULL, nullptr, nullptr, OperandInfo749, -1 ,nullptr },  // Inst #8800 = VPBROADCASTBrZrkz
25402
  { 8801, 6,  1,  0,  809,  0|(1ULL<<MCID::MayLoad), 0x3c38009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #8801 = VPBROADCASTBrm
25403
  { 8802, 2,  1,  0,  276,  0, 0x3c38009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #8802 = VPBROADCASTBrr
25404
  { 8803, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x82c38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #8803 = VPBROADCASTDYrm
25405
  { 8804, 2,  1,  0,  544,  0, 0x82c38009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #8804 = VPBROADCASTDYrr
25406
  { 8805, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8002c60009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #8805 = VPBROADCASTDZ128m
25407
  { 8806, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8202c60009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #8806 = VPBROADCASTDZ128mk
25408
  { 8807, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8602c60009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #8807 = VPBROADCASTDZ128mkz
25409
  { 8808, 2,  1,  0,  0,  0, 0x20002c60009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #8808 = VPBROADCASTDZ128r
25410
  { 8809, 4,  1,  0,  0,  0, 0x20202c60009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #8809 = VPBROADCASTDZ128rk
25411
  { 8810, 3,  1,  0,  0,  0, 0x20602c60009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #8810 = VPBROADCASTDZ128rkz
25412
  { 8811, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8082c60009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8811 = VPBROADCASTDZ256m
25413
  { 8812, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8282c60009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #8812 = VPBROADCASTDZ256mk
25414
  { 8813, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8682c60009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #8813 = VPBROADCASTDZ256mkz
25415
  { 8814, 2,  1,  0,  0,  0, 0x40082c60009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #8814 = VPBROADCASTDZ256r
25416
  { 8815, 4,  1,  0,  0,  0, 0x40282c60009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr },  // Inst #8815 = VPBROADCASTDZ256rk
25417
  { 8816, 3,  1,  0,  0,  0, 0x40682c60009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr },  // Inst #8816 = VPBROADCASTDZ256rkz
25418
  { 8817, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8802c60009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8817 = VPBROADCASTDZm
25419
  { 8818, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8a02c60009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #8818 = VPBROADCASTDZmk
25420
  { 8819, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8e02c60009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #8819 = VPBROADCASTDZmkz
25421
  { 8820, 2,  1,  0,  0,  0, 0x80802c60009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #8820 = VPBROADCASTDZr
25422
  { 8821, 4,  1,  0,  0,  0, 0x80a02c60009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr },  // Inst #8821 = VPBROADCASTDZrk
25423
  { 8822, 3,  1,  0,  0,  0, 0x80e02c60009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr },  // Inst #8822 = VPBROADCASTDZrkz
25424
  { 8823, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003e60009005ULL, nullptr, nullptr, OperandInfo659, -1 ,nullptr },  // Inst #8823 = VPBROADCASTDrZ128r
25425
  { 8824, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203e60009005ULL, nullptr, nullptr, OperandInfo750, -1 ,nullptr },  // Inst #8824 = VPBROADCASTDrZ128rk
25426
  { 8825, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603e60009005ULL, nullptr, nullptr, OperandInfo751, -1 ,nullptr },  // Inst #8825 = VPBROADCASTDrZ128rkz
25427
  { 8826, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083e60009005ULL, nullptr, nullptr, OperandInfo744, -1 ,nullptr },  // Inst #8826 = VPBROADCASTDrZ256r
25428
  { 8827, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283e60009005ULL, nullptr, nullptr, OperandInfo752, -1 ,nullptr },  // Inst #8827 = VPBROADCASTDrZ256rk
25429
  { 8828, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683e60009005ULL, nullptr, nullptr, OperandInfo753, -1 ,nullptr },  // Inst #8828 = VPBROADCASTDrZ256rkz
25430
  { 8829, 2,  1,  0,  0,  0, 0x80803e60009005ULL, nullptr, nullptr, OperandInfo747, -1 ,nullptr },  // Inst #8829 = VPBROADCASTDrZr
25431
  { 8830, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03e60009005ULL, nullptr, nullptr, OperandInfo754, -1 ,nullptr },  // Inst #8830 = VPBROADCASTDrZrk
25432
  { 8831, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03e60009005ULL, nullptr, nullptr, OperandInfo755, -1 ,nullptr },  // Inst #8831 = VPBROADCASTDrZrkz
25433
  { 8832, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x2c38009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #8832 = VPBROADCASTDrm
25434
  { 8833, 2,  1,  0,  276,  0, 0x2c38009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #8833 = VPBROADCASTDrr
25435
  { 8834, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10080ce0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8834 = VPBROADCASTF32X2Z256m
25436
  { 8835, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10280ce0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #8835 = VPBROADCASTF32X2Z256mk
25437
  { 8836, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10680ce0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #8836 = VPBROADCASTF32X2Z256mkz
25438
  { 8837, 2,  1,  0,  0,  0, 0x40080ce0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #8837 = VPBROADCASTF32X2Z256r
25439
  { 8838, 4,  1,  0,  0,  0, 0x40280ce0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr },  // Inst #8838 = VPBROADCASTF32X2Z256rk
25440
  { 8839, 3,  1,  0,  0,  0, 0x40680ce0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr },  // Inst #8839 = VPBROADCASTF32X2Z256rkz
25441
  { 8840, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10800ce0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8840 = VPBROADCASTF32X2Zm
25442
  { 8841, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a00ce0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #8841 = VPBROADCASTF32X2Zmk
25443
  { 8842, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10e00ce0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #8842 = VPBROADCASTF32X2Zmkz
25444
  { 8843, 2,  1,  0,  0,  0, 0x80800ce0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #8843 = VPBROADCASTF32X2Zr
25445
  { 8844, 4,  1,  0,  0,  0, 0x80a00ce0009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr },  // Inst #8844 = VPBROADCASTF32X2Zrk
25446
  { 8845, 3,  1,  0,  0,  0, 0x80e00ce0009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr },  // Inst #8845 = VPBROADCASTF32X2Zrkz
25447
  { 8846, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10002ce0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #8846 = VPBROADCASTI32X2Z128m
25448
  { 8847, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10202ce0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #8847 = VPBROADCASTI32X2Z128mk
25449
  { 8848, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10602ce0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #8848 = VPBROADCASTI32X2Z128mkz
25450
  { 8849, 2,  1,  0,  0,  0, 0x20002ce0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #8849 = VPBROADCASTI32X2Z128r
25451
  { 8850, 4,  1,  0,  0,  0, 0x20202ce0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #8850 = VPBROADCASTI32X2Z128rk
25452
  { 8851, 3,  1,  0,  0,  0, 0x20602ce0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #8851 = VPBROADCASTI32X2Z128rkz
25453
  { 8852, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10082ce0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8852 = VPBROADCASTI32X2Z256m
25454
  { 8853, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10282ce0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #8853 = VPBROADCASTI32X2Z256mk
25455
  { 8854, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10682ce0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #8854 = VPBROADCASTI32X2Z256mkz
25456
  { 8855, 2,  1,  0,  0,  0, 0x40082ce0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #8855 = VPBROADCASTI32X2Z256r
25457
  { 8856, 4,  1,  0,  0,  0, 0x40282ce0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr },  // Inst #8856 = VPBROADCASTI32X2Z256rk
25458
  { 8857, 3,  1,  0,  0,  0, 0x40682ce0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr },  // Inst #8857 = VPBROADCASTI32X2Z256rkz
25459
  { 8858, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10802ce0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8858 = VPBROADCASTI32X2Zm
25460
  { 8859, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a02ce0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #8859 = VPBROADCASTI32X2Zmk
25461
  { 8860, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10e02ce0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #8860 = VPBROADCASTI32X2Zmkz
25462
  { 8861, 2,  1,  0,  0,  0, 0x80802ce0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #8861 = VPBROADCASTI32X2Zr
25463
  { 8862, 4,  1,  0,  0,  0, 0x80a02ce0009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr },  // Inst #8862 = VPBROADCASTI32X2Zrk
25464
  { 8863, 3,  1,  0,  0,  0, 0x80e02ce0009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr },  // Inst #8863 = VPBROADCASTI32X2Zrkz
25465
  { 8864, 2,  1,  0,  0,  0, 0x20009578009805ULL, nullptr, nullptr, OperandInfo756, -1 ,nullptr },  // Inst #8864 = VPBROADCASTMB2QZ128rr
25466
  { 8865, 2,  1,  0,  0,  0, 0x40089578009805ULL, nullptr, nullptr, OperandInfo757, -1 ,nullptr },  // Inst #8865 = VPBROADCASTMB2QZ256rr
25467
  { 8866, 2,  1,  0,  0,  0, 0x80809578009805ULL, nullptr, nullptr, OperandInfo758, -1 ,nullptr },  // Inst #8866 = VPBROADCASTMB2QZrr
25468
  { 8867, 2,  1,  0,  0,  0, 0x20001d78009805ULL, nullptr, nullptr, OperandInfo759, -1 ,nullptr },  // Inst #8867 = VPBROADCASTMW2DZ128rr
25469
  { 8868, 2,  1,  0,  0,  0, 0x40081d78009805ULL, nullptr, nullptr, OperandInfo760, -1 ,nullptr },  // Inst #8868 = VPBROADCASTMW2DZ256rr
25470
  { 8869, 2,  1,  0,  0,  0, 0x80801d78009805ULL, nullptr, nullptr, OperandInfo761, -1 ,nullptr },  // Inst #8869 = VPBROADCASTMW2DZrr
25471
  { 8870, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x82cb8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #8870 = VPBROADCASTQYrm
25472
  { 8871, 2,  1,  0,  544,  0, 0x82cb8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #8871 = VPBROADCASTQYrr
25473
  { 8872, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1000ace0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #8872 = VPBROADCASTQZ128m
25474
  { 8873, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1020ace0009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #8873 = VPBROADCASTQZ128mk
25475
  { 8874, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1060ace0009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #8874 = VPBROADCASTQZ128mkz
25476
  { 8875, 2,  1,  0,  0,  0, 0x2000ace0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #8875 = VPBROADCASTQZ128r
25477
  { 8876, 4,  1,  0,  0,  0, 0x2020ace0009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #8876 = VPBROADCASTQZ128rk
25478
  { 8877, 3,  1,  0,  0,  0, 0x2060ace0009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #8877 = VPBROADCASTQZ128rkz
25479
  { 8878, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1008ace0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8878 = VPBROADCASTQZ256m
25480
  { 8879, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1028ace0009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #8879 = VPBROADCASTQZ256mk
25481
  { 8880, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1068ace0009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #8880 = VPBROADCASTQZ256mkz
25482
  { 8881, 2,  1,  0,  0,  0, 0x4008ace0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #8881 = VPBROADCASTQZ256r
25483
  { 8882, 4,  1,  0,  0,  0, 0x4028ace0009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #8882 = VPBROADCASTQZ256rk
25484
  { 8883, 3,  1,  0,  0,  0, 0x4068ace0009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #8883 = VPBROADCASTQZ256rkz
25485
  { 8884, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1080ace0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8884 = VPBROADCASTQZm
25486
  { 8885, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a0ace0009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #8885 = VPBROADCASTQZmk
25487
  { 8886, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10e0ace0009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #8886 = VPBROADCASTQZmkz
25488
  { 8887, 2,  1,  0,  0,  0, 0x8080ace0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #8887 = VPBROADCASTQZr
25489
  { 8888, 4,  1,  0,  0,  0, 0x80a0ace0009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr },  // Inst #8888 = VPBROADCASTQZrk
25490
  { 8889, 3,  1,  0,  0,  0, 0x80e0ace0009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr },  // Inst #8889 = VPBROADCASTQZrkz
25491
  { 8890, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2000be60009005ULL, nullptr, nullptr, OperandInfo656, -1 ,nullptr },  // Inst #8890 = VPBROADCASTQrZ128r
25492
  { 8891, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2020be60009005ULL, nullptr, nullptr, OperandInfo762, -1 ,nullptr },  // Inst #8891 = VPBROADCASTQrZ128rk
25493
  { 8892, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x2060be60009005ULL, nullptr, nullptr, OperandInfo763, -1 ,nullptr },  // Inst #8892 = VPBROADCASTQrZ128rkz
25494
  { 8893, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4008be60009005ULL, nullptr, nullptr, OperandInfo764, -1 ,nullptr },  // Inst #8893 = VPBROADCASTQrZ256r
25495
  { 8894, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4028be60009005ULL, nullptr, nullptr, OperandInfo765, -1 ,nullptr },  // Inst #8894 = VPBROADCASTQrZ256rk
25496
  { 8895, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4068be60009005ULL, nullptr, nullptr, OperandInfo766, -1 ,nullptr },  // Inst #8895 = VPBROADCASTQrZ256rkz
25497
  { 8896, 2,  1,  0,  0,  0, 0x8080be60009005ULL, nullptr, nullptr, OperandInfo767, -1 ,nullptr },  // Inst #8896 = VPBROADCASTQrZr
25498
  { 8897, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a0be60009005ULL, nullptr, nullptr, OperandInfo768, -1 ,nullptr },  // Inst #8897 = VPBROADCASTQrZrk
25499
  { 8898, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e0be60009005ULL, nullptr, nullptr, OperandInfo769, -1 ,nullptr },  // Inst #8898 = VPBROADCASTQrZrkz
25500
  { 8899, 6,  1,  0,  206,  0|(1ULL<<MCID::MayLoad), 0x2cb8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #8899 = VPBROADCASTQrm
25501
  { 8900, 2,  1,  0,  276,  0, 0x2cb8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #8900 = VPBROADCASTQrr
25502
  { 8901, 6,  1,  0,  810,  0|(1ULL<<MCID::MayLoad), 0x83cb8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #8901 = VPBROADCASTWYrm
25503
  { 8902, 2,  1,  0,  544,  0, 0x83cb8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #8902 = VPBROADCASTWYrr
25504
  { 8903, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4003ce0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #8903 = VPBROADCASTWZ128m
25505
  { 8904, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4203ce0009006ULL, nullptr, nullptr, OperandInfo662, -1 ,nullptr },  // Inst #8904 = VPBROADCASTWZ128mk
25506
  { 8905, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4603ce0009006ULL, nullptr, nullptr, OperandInfo663, -1 ,nullptr },  // Inst #8905 = VPBROADCASTWZ128mkz
25507
  { 8906, 2,  1,  0,  0,  0, 0x20003ce0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #8906 = VPBROADCASTWZ128r
25508
  { 8907, 4,  1,  0,  0,  0, 0x20203ce0009005ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr },  // Inst #8907 = VPBROADCASTWZ128rk
25509
  { 8908, 3,  1,  0,  0,  0, 0x20603ce0009005ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #8908 = VPBROADCASTWZ128rkz
25510
  { 8909, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4083ce0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #8909 = VPBROADCASTWZ256m
25511
  { 8910, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4283ce0009006ULL, nullptr, nullptr, OperandInfo667, -1 ,nullptr },  // Inst #8910 = VPBROADCASTWZ256mk
25512
  { 8911, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4683ce0009006ULL, nullptr, nullptr, OperandInfo668, -1 ,nullptr },  // Inst #8911 = VPBROADCASTWZ256mkz
25513
  { 8912, 2,  1,  0,  0,  0, 0x40083ce0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #8912 = VPBROADCASTWZ256r
25514
  { 8913, 4,  1,  0,  0,  0, 0x40283ce0009005ULL, nullptr, nullptr, OperandInfo770, -1 ,nullptr },  // Inst #8913 = VPBROADCASTWZ256rk
25515
  { 8914, 3,  1,  0,  0,  0, 0x40683ce0009005ULL, nullptr, nullptr, OperandInfo771, -1 ,nullptr },  // Inst #8914 = VPBROADCASTWZ256rkz
25516
  { 8915, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4803ce0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #8915 = VPBROADCASTWZm
25517
  { 8916, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4a03ce0009006ULL, nullptr, nullptr, OperandInfo672, -1 ,nullptr },  // Inst #8916 = VPBROADCASTWZmk
25518
  { 8917, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4e03ce0009006ULL, nullptr, nullptr, OperandInfo673, -1 ,nullptr },  // Inst #8917 = VPBROADCASTWZmkz
25519
  { 8918, 2,  1,  0,  0,  0, 0x80803ce0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #8918 = VPBROADCASTWZr
25520
  { 8919, 4,  1,  0,  0,  0, 0x80a03ce0009005ULL, nullptr, nullptr, OperandInfo772, -1 ,nullptr },  // Inst #8919 = VPBROADCASTWZrk
25521
  { 8920, 3,  1,  0,  0,  0, 0x80e03ce0009005ULL, nullptr, nullptr, OperandInfo773, -1 ,nullptr },  // Inst #8920 = VPBROADCASTWZrkz
25522
  { 8921, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003de0009005ULL, nullptr, nullptr, OperandInfo659, -1 ,nullptr },  // Inst #8921 = VPBROADCASTWrZ128r
25523
  { 8922, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203de0009005ULL, nullptr, nullptr, OperandInfo774, -1 ,nullptr },  // Inst #8922 = VPBROADCASTWrZ128rk
25524
  { 8923, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603de0009005ULL, nullptr, nullptr, OperandInfo775, -1 ,nullptr },  // Inst #8923 = VPBROADCASTWrZ128rkz
25525
  { 8924, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083de0009005ULL, nullptr, nullptr, OperandInfo744, -1 ,nullptr },  // Inst #8924 = VPBROADCASTWrZ256r
25526
  { 8925, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283de0009005ULL, nullptr, nullptr, OperandInfo776, -1 ,nullptr },  // Inst #8925 = VPBROADCASTWrZ256rk
25527
  { 8926, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683de0009005ULL, nullptr, nullptr, OperandInfo777, -1 ,nullptr },  // Inst #8926 = VPBROADCASTWrZ256rkz
25528
  { 8927, 2,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80803de0009005ULL, nullptr, nullptr, OperandInfo747, -1 ,nullptr },  // Inst #8927 = VPBROADCASTWrZr
25529
  { 8928, 4,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03de0009005ULL, nullptr, nullptr, OperandInfo778, -1 ,nullptr },  // Inst #8928 = VPBROADCASTWrZrk
25530
  { 8929, 3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03de0009005ULL, nullptr, nullptr, OperandInfo779, -1 ,nullptr },  // Inst #8929 = VPBROADCASTWrZrkz
25531
  { 8930, 6,  1,  0,  809,  0|(1ULL<<MCID::MayLoad), 0x3cb8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #8930 = VPBROADCASTWrm
25532
  { 8931, 2,  1,  0,  276,  0, 0x3cb8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #8931 = VPBROADCASTWrr
25533
  { 8932, 8,  1,  0,  566,  0|(1ULL<<MCID::MayLoad), 0x1223804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #8932 = VPCLMULQDQrm
25534
  { 8933, 4,  1,  0,  567,  0|(1ULL<<MCID::Commutable), 0x1223804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #8933 = VPCLMULQDQrr
25535
  { 8934, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x55158050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #8934 = VPCMOVmr
25536
  { 8935, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0xd5158050806ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr },  // Inst #8935 = VPCMOVmrY
25537
  { 8936, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20005d158050806ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #8936 = VPCMOVrm
25538
  { 8937, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000dd158050806ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr },  // Inst #8937 = VPCMOVrmY
25539
  { 8938, 4,  1,  0,  0,  0, 0x55158050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #8938 = VPCMOVrr
25540
  { 8939, 4,  1,  0,  0,  0, 0xd5158050805ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr },  // Inst #8939 = VPCMOVrrY
25541
  { 8940, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20011ff804d006ULL, nullptr, nullptr, OperandInfo780, -1 ,nullptr },  // Inst #8940 = VPCMPBZ128rmi
25542
  { 8941, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20011ff804d006ULL, nullptr, nullptr, OperandInfo780, -1 ,nullptr },  // Inst #8941 = VPCMPBZ128rmi_alt
25543
  { 8942, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20211ff804d006ULL, nullptr, nullptr, OperandInfo781, -1 ,nullptr },  // Inst #8942 = VPCMPBZ128rmik
25544
  { 8943, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20211ff804d006ULL, nullptr, nullptr, OperandInfo781, -1 ,nullptr },  // Inst #8943 = VPCMPBZ128rmik_alt
25545
  { 8944, 4,  1,  0,  568,  0, 0x20011ff804d005ULL, nullptr, nullptr, OperandInfo782, -1 ,nullptr },  // Inst #8944 = VPCMPBZ128rri
25546
  { 8945, 4,  1,  0,  568,  0, 0x20011ff804d005ULL, nullptr, nullptr, OperandInfo782, -1 ,nullptr },  // Inst #8945 = VPCMPBZ128rri_alt
25547
  { 8946, 5,  1,  0,  568,  0, 0x20211ff804d005ULL, nullptr, nullptr, OperandInfo783, -1 ,nullptr },  // Inst #8946 = VPCMPBZ128rrik
25548
  { 8947, 5,  1,  0,  568,  0, 0x20211ff804d005ULL, nullptr, nullptr, OperandInfo783, -1 ,nullptr },  // Inst #8947 = VPCMPBZ128rrik_alt
25549
  { 8948, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40091ff804d006ULL, nullptr, nullptr, OperandInfo784, -1 ,nullptr },  // Inst #8948 = VPCMPBZ256rmi
25550
  { 8949, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40091ff804d006ULL, nullptr, nullptr, OperandInfo784, -1 ,nullptr },  // Inst #8949 = VPCMPBZ256rmi_alt
25551
  { 8950, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40291ff804d006ULL, nullptr, nullptr, OperandInfo785, -1 ,nullptr },  // Inst #8950 = VPCMPBZ256rmik
25552
  { 8951, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40291ff804d006ULL, nullptr, nullptr, OperandInfo785, -1 ,nullptr },  // Inst #8951 = VPCMPBZ256rmik_alt
25553
  { 8952, 4,  1,  0,  568,  0, 0x40091ff804d005ULL, nullptr, nullptr, OperandInfo786, -1 ,nullptr },  // Inst #8952 = VPCMPBZ256rri
25554
  { 8953, 4,  1,  0,  568,  0, 0x40091ff804d005ULL, nullptr, nullptr, OperandInfo786, -1 ,nullptr },  // Inst #8953 = VPCMPBZ256rri_alt
25555
  { 8954, 5,  1,  0,  568,  0, 0x40291ff804d005ULL, nullptr, nullptr, OperandInfo787, -1 ,nullptr },  // Inst #8954 = VPCMPBZ256rrik
25556
  { 8955, 5,  1,  0,  568,  0, 0x40291ff804d005ULL, nullptr, nullptr, OperandInfo787, -1 ,nullptr },  // Inst #8955 = VPCMPBZ256rrik_alt
25557
  { 8956, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80811ff804d006ULL, nullptr, nullptr, OperandInfo788, -1 ,nullptr },  // Inst #8956 = VPCMPBZrmi
25558
  { 8957, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80811ff804d006ULL, nullptr, nullptr, OperandInfo788, -1 ,nullptr },  // Inst #8957 = VPCMPBZrmi_alt
25559
  { 8958, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a11ff804d006ULL, nullptr, nullptr, OperandInfo789, -1 ,nullptr },  // Inst #8958 = VPCMPBZrmik
25560
  { 8959, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a11ff804d006ULL, nullptr, nullptr, OperandInfo789, -1 ,nullptr },  // Inst #8959 = VPCMPBZrmik_alt
25561
  { 8960, 4,  1,  0,  568,  0, 0x80811ff804d005ULL, nullptr, nullptr, OperandInfo790, -1 ,nullptr },  // Inst #8960 = VPCMPBZrri
25562
  { 8961, 4,  1,  0,  568,  0, 0x80811ff804d005ULL, nullptr, nullptr, OperandInfo790, -1 ,nullptr },  // Inst #8961 = VPCMPBZrri_alt
25563
  { 8962, 5,  1,  0,  568,  0, 0x80a11ff804d005ULL, nullptr, nullptr, OperandInfo791, -1 ,nullptr },  // Inst #8962 = VPCMPBZrrik
25564
  { 8963, 5,  1,  0,  568,  0, 0x80a11ff804d005ULL, nullptr, nullptr, OperandInfo791, -1 ,nullptr },  // Inst #8963 = VPCMPBZrrik_alt
25565
  { 8964, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20010ff804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #8964 = VPCMPDZ128rmi
25566
  { 8965, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20010ff804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #8965 = VPCMPDZ128rmi_alt
25567
  { 8966, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9010ff804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #8966 = VPCMPDZ128rmib
25568
  { 8967, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9010ff804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #8967 = VPCMPDZ128rmib_alt
25569
  { 8968, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9210ff804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #8968 = VPCMPDZ128rmibk
25570
  { 8969, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9210ff804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #8969 = VPCMPDZ128rmibk_alt
25571
  { 8970, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20210ff804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #8970 = VPCMPDZ128rmik
25572
  { 8971, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20210ff804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #8971 = VPCMPDZ128rmik_alt
25573
  { 8972, 4,  1,  0,  568,  0, 0x20010ff804d005ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr },  // Inst #8972 = VPCMPDZ128rri
25574
  { 8973, 4,  1,  0,  568,  0, 0x20010ff804d005ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr },  // Inst #8973 = VPCMPDZ128rri_alt
25575
  { 8974, 5,  1,  0,  568,  0, 0x20210ff804d005ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr },  // Inst #8974 = VPCMPDZ128rrik
25576
  { 8975, 5,  1,  0,  568,  0, 0x20210ff804d005ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr },  // Inst #8975 = VPCMPDZ128rrik_alt
25577
  { 8976, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40090ff804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #8976 = VPCMPDZ256rmi
25578
  { 8977, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40090ff804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #8977 = VPCMPDZ256rmi_alt
25579
  { 8978, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9090ff804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #8978 = VPCMPDZ256rmib
25580
  { 8979, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9090ff804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #8979 = VPCMPDZ256rmib_alt
25581
  { 8980, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9290ff804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #8980 = VPCMPDZ256rmibk
25582
  { 8981, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9290ff804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #8981 = VPCMPDZ256rmibk_alt
25583
  { 8982, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40290ff804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #8982 = VPCMPDZ256rmik
25584
  { 8983, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40290ff804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #8983 = VPCMPDZ256rmik_alt
25585
  { 8984, 4,  1,  0,  568,  0, 0x40090ff804d005ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr },  // Inst #8984 = VPCMPDZ256rri
25586
  { 8985, 4,  1,  0,  568,  0, 0x40090ff804d005ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr },  // Inst #8985 = VPCMPDZ256rri_alt
25587
  { 8986, 5,  1,  0,  568,  0, 0x40290ff804d005ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr },  // Inst #8986 = VPCMPDZ256rrik
25588
  { 8987, 5,  1,  0,  568,  0, 0x40290ff804d005ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr },  // Inst #8987 = VPCMPDZ256rrik_alt
25589
  { 8988, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80810ff804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #8988 = VPCMPDZrmi
25590
  { 8989, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80810ff804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #8989 = VPCMPDZrmi_alt
25591
  { 8990, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9810ff804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #8990 = VPCMPDZrmib
25592
  { 8991, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9810ff804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #8991 = VPCMPDZrmib_alt
25593
  { 8992, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9a10ff804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #8992 = VPCMPDZrmibk
25594
  { 8993, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9a10ff804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #8993 = VPCMPDZrmibk_alt
25595
  { 8994, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a10ff804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #8994 = VPCMPDZrmik
25596
  { 8995, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a10ff804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #8995 = VPCMPDZrmik_alt
25597
  { 8996, 4,  1,  0,  568,  0, 0x80810ff804d005ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr },  // Inst #8996 = VPCMPDZrri
25598
  { 8997, 4,  1,  0,  568,  0, 0x80810ff804d005ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr },  // Inst #8997 = VPCMPDZrri_alt
25599
  { 8998, 5,  1,  0,  568,  0, 0x80a10ff804d005ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr },  // Inst #8998 = VPCMPDZrrik
25600
  { 8999, 5,  1,  0,  568,  0, 0x80a10ff804d005ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr },  // Inst #8999 = VPCMPDZrrik_alt
25601
  { 9000, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x93a38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9000 = VPCMPEQBYrm
25602
  { 9001, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x93a38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9001 = VPCMPEQBYrr
25603
  { 9002, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20013a78005006ULL, nullptr, nullptr, OperandInfo792, -1 ,nullptr },  // Inst #9002 = VPCMPEQBZ128rm
25604
  { 9003, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20213a78005006ULL, nullptr, nullptr, OperandInfo793, -1 ,nullptr },  // Inst #9003 = VPCMPEQBZ128rmk
25605
  { 9004, 3,  1,  0,  568,  0, 0x20013a78005005ULL, nullptr, nullptr, OperandInfo794, -1 ,nullptr },  // Inst #9004 = VPCMPEQBZ128rr
25606
  { 9005, 4,  1,  0,  568,  0, 0x20213a78005005ULL, nullptr, nullptr, OperandInfo795, -1 ,nullptr },  // Inst #9005 = VPCMPEQBZ128rrk
25607
  { 9006, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40093a78005006ULL, nullptr, nullptr, OperandInfo796, -1 ,nullptr },  // Inst #9006 = VPCMPEQBZ256rm
25608
  { 9007, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40293a78005006ULL, nullptr, nullptr, OperandInfo797, -1 ,nullptr },  // Inst #9007 = VPCMPEQBZ256rmk
25609
  { 9008, 3,  1,  0,  568,  0, 0x40093a78005005ULL, nullptr, nullptr, OperandInfo798, -1 ,nullptr },  // Inst #9008 = VPCMPEQBZ256rr
25610
  { 9009, 4,  1,  0,  568,  0, 0x40293a78005005ULL, nullptr, nullptr, OperandInfo799, -1 ,nullptr },  // Inst #9009 = VPCMPEQBZ256rrk
25611
  { 9010, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80813a78005006ULL, nullptr, nullptr, OperandInfo800, -1 ,nullptr },  // Inst #9010 = VPCMPEQBZrm
25612
  { 9011, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a13a78005006ULL, nullptr, nullptr, OperandInfo801, -1 ,nullptr },  // Inst #9011 = VPCMPEQBZrmk
25613
  { 9012, 3,  1,  0,  568,  0, 0x80813a78005005ULL, nullptr, nullptr, OperandInfo802, -1 ,nullptr },  // Inst #9012 = VPCMPEQBZrr
25614
  { 9013, 4,  1,  0,  568,  0, 0x80a13a78005005ULL, nullptr, nullptr, OperandInfo803, -1 ,nullptr },  // Inst #9013 = VPCMPEQBZrrk
25615
  { 9014, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x13a38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #9014 = VPCMPEQBrm
25616
  { 9015, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x13a38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #9015 = VPCMPEQBrr
25617
  { 9016, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x93b38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9016 = VPCMPEQDYrm
25618
  { 9017, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x93b38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9017 = VPCMPEQDYrr
25619
  { 9018, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20013b78005006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr },  // Inst #9018 = VPCMPEQDZ128rm
25620
  { 9019, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9013b78005006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr },  // Inst #9019 = VPCMPEQDZ128rmb
25621
  { 9020, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9213b78005006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr },  // Inst #9020 = VPCMPEQDZ128rmbk
25622
  { 9021, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20213b78005006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr },  // Inst #9021 = VPCMPEQDZ128rmk
25623
  { 9022, 3,  1,  0,  568,  0, 0x20013b78005005ULL, nullptr, nullptr, OperandInfo806, -1 ,nullptr },  // Inst #9022 = VPCMPEQDZ128rr
25624
  { 9023, 4,  1,  0,  568,  0, 0x20213b78005005ULL, nullptr, nullptr, OperandInfo807, -1 ,nullptr },  // Inst #9023 = VPCMPEQDZ128rrk
25625
  { 9024, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40093b78005006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr },  // Inst #9024 = VPCMPEQDZ256rm
25626
  { 9025, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9093b78005006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr },  // Inst #9025 = VPCMPEQDZ256rmb
25627
  { 9026, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9293b78005006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr },  // Inst #9026 = VPCMPEQDZ256rmbk
25628
  { 9027, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40293b78005006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr },  // Inst #9027 = VPCMPEQDZ256rmk
25629
  { 9028, 3,  1,  0,  568,  0, 0x40093b78005005ULL, nullptr, nullptr, OperandInfo810, -1 ,nullptr },  // Inst #9028 = VPCMPEQDZ256rr
25630
  { 9029, 4,  1,  0,  568,  0, 0x40293b78005005ULL, nullptr, nullptr, OperandInfo811, -1 ,nullptr },  // Inst #9029 = VPCMPEQDZ256rrk
25631
  { 9030, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80813b78005006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr },  // Inst #9030 = VPCMPEQDZrm
25632
  { 9031, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9813b78005006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr },  // Inst #9031 = VPCMPEQDZrmb
25633
  { 9032, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9a13b78005006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr },  // Inst #9032 = VPCMPEQDZrmbk
25634
  { 9033, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a13b78005006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr },  // Inst #9033 = VPCMPEQDZrmk
25635
  { 9034, 3,  1,  0,  568,  0, 0x80813b78005005ULL, nullptr, nullptr, OperandInfo814, -1 ,nullptr },  // Inst #9034 = VPCMPEQDZrr
25636
  { 9035, 4,  1,  0,  568,  0, 0x80a13b78005005ULL, nullptr, nullptr, OperandInfo815, -1 ,nullptr },  // Inst #9035 = VPCMPEQDZrrk
25637
  { 9036, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x13b38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #9036 = VPCMPEQDrm
25638
  { 9037, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x13b38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #9037 = VPCMPEQDrr
25639
  { 9038, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x914b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9038 = VPCMPEQQYrm
25640
  { 9039, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x914b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9039 = VPCMPEQQYrr
25641
  { 9040, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x200194f8009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr },  // Inst #9040 = VPCMPEQQZ128rm
25642
  { 9041, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x110194f8009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr },  // Inst #9041 = VPCMPEQQZ128rmb
25643
  { 9042, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x112194f8009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr },  // Inst #9042 = VPCMPEQQZ128rmbk
25644
  { 9043, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x202194f8009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr },  // Inst #9043 = VPCMPEQQZ128rmk
25645
  { 9044, 3,  1,  0,  568,  0, 0x200194f8009005ULL, nullptr, nullptr, OperandInfo818, -1 ,nullptr },  // Inst #9044 = VPCMPEQQZ128rr
25646
  { 9045, 4,  1,  0,  568,  0, 0x202194f8009005ULL, nullptr, nullptr, OperandInfo819, -1 ,nullptr },  // Inst #9045 = VPCMPEQQZ128rrk
25647
  { 9046, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x400994f8009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr },  // Inst #9046 = VPCMPEQQZ256rm
25648
  { 9047, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x110994f8009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr },  // Inst #9047 = VPCMPEQQZ256rmb
25649
  { 9048, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x112994f8009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr },  // Inst #9048 = VPCMPEQQZ256rmbk
25650
  { 9049, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x402994f8009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr },  // Inst #9049 = VPCMPEQQZ256rmk
25651
  { 9050, 3,  1,  0,  568,  0, 0x400994f8009005ULL, nullptr, nullptr, OperandInfo822, -1 ,nullptr },  // Inst #9050 = VPCMPEQQZ256rr
25652
  { 9051, 4,  1,  0,  568,  0, 0x402994f8009005ULL, nullptr, nullptr, OperandInfo823, -1 ,nullptr },  // Inst #9051 = VPCMPEQQZ256rrk
25653
  { 9052, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x808194f8009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr },  // Inst #9052 = VPCMPEQQZrm
25654
  { 9053, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x118194f8009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr },  // Inst #9053 = VPCMPEQQZrmb
25655
  { 9054, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11a194f8009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr },  // Inst #9054 = VPCMPEQQZrmbk
25656
  { 9055, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a194f8009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr },  // Inst #9055 = VPCMPEQQZrmk
25657
  { 9056, 3,  1,  0,  568,  0, 0x808194f8009005ULL, nullptr, nullptr, OperandInfo826, -1 ,nullptr },  // Inst #9056 = VPCMPEQQZrr
25658
  { 9057, 4,  1,  0,  568,  0, 0x80a194f8009005ULL, nullptr, nullptr, OperandInfo827, -1 ,nullptr },  // Inst #9057 = VPCMPEQQZrrk
25659
  { 9058, 7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x114b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #9058 = VPCMPEQQrm
25660
  { 9059, 3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x114b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #9059 = VPCMPEQQrr
25661
  { 9060, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x93ab8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9060 = VPCMPEQWYrm
25662
  { 9061, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x93ab8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9061 = VPCMPEQWYrr
25663
  { 9062, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20013af8005006ULL, nullptr, nullptr, OperandInfo828, -1 ,nullptr },  // Inst #9062 = VPCMPEQWZ128rm
25664
  { 9063, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20213af8005006ULL, nullptr, nullptr, OperandInfo829, -1 ,nullptr },  // Inst #9063 = VPCMPEQWZ128rmk
25665
  { 9064, 3,  1,  0,  568,  0, 0x20013af8005005ULL, nullptr, nullptr, OperandInfo830, -1 ,nullptr },  // Inst #9064 = VPCMPEQWZ128rr
25666
  { 9065, 4,  1,  0,  568,  0, 0x20213af8005005ULL, nullptr, nullptr, OperandInfo831, -1 ,nullptr },  // Inst #9065 = VPCMPEQWZ128rrk
25667
  { 9066, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40093af8005006ULL, nullptr, nullptr, OperandInfo832, -1 ,nullptr },  // Inst #9066 = VPCMPEQWZ256rm
25668
  { 9067, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40293af8005006ULL, nullptr, nullptr, OperandInfo833, -1 ,nullptr },  // Inst #9067 = VPCMPEQWZ256rmk
25669
  { 9068, 3,  1,  0,  568,  0, 0x40093af8005005ULL, nullptr, nullptr, OperandInfo834, -1 ,nullptr },  // Inst #9068 = VPCMPEQWZ256rr
25670
  { 9069, 4,  1,  0,  568,  0, 0x40293af8005005ULL, nullptr, nullptr, OperandInfo835, -1 ,nullptr },  // Inst #9069 = VPCMPEQWZ256rrk
25671
  { 9070, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80813af8005006ULL, nullptr, nullptr, OperandInfo836, -1 ,nullptr },  // Inst #9070 = VPCMPEQWZrm
25672
  { 9071, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a13af8005006ULL, nullptr, nullptr, OperandInfo837, -1 ,nullptr },  // Inst #9071 = VPCMPEQWZrmk
25673
  { 9072, 3,  1,  0,  568,  0, 0x80813af8005005ULL, nullptr, nullptr, OperandInfo838, -1 ,nullptr },  // Inst #9072 = VPCMPEQWZrr
25674
  { 9073, 4,  1,  0,  568,  0, 0x80a13af8005005ULL, nullptr, nullptr, OperandInfo839, -1 ,nullptr },  // Inst #9073 = VPCMPEQWZrrk
25675
  { 9074, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x13ab8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #9074 = VPCMPEQWrm
25676
  { 9075, 3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x13ab8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #9075 = VPCMPEQWrr
25677
  { 9076, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo257, -1 ,nullptr },  // Inst #9076 = VPCMPESTRIMEM
25678
  { 9077, 4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo258, -1 ,nullptr },  // Inst #9077 = VPCMPESTRIREG
25679
  { 9078, 7,  0,  0,  393,  0|(1ULL<<MCID::MayLoad), 0x30b804d006ULL, ImplicitList16, ImplicitList59, OperandInfo55, -1 ,nullptr },  // Inst #9078 = VPCMPESTRIrm
25680
  { 9079, 3,  0,  0,  394,  0, 0x30b804d005ULL, ImplicitList16, ImplicitList59, OperandInfo56, -1 ,nullptr },  // Inst #9079 = VPCMPESTRIrr
25681
  { 9080, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo152, -1 ,nullptr },  // Inst #9080 = VPCMPESTRM128MEM
25682
  { 9081, 4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo101, -1 ,nullptr },  // Inst #9081 = VPCMPESTRM128REG
25683
  { 9082, 7,  0,  0,  395,  0|(1ULL<<MCID::MayLoad), 0x303804d006ULL, ImplicitList16, ImplicitList60, OperandInfo55, -1 ,nullptr },  // Inst #9082 = VPCMPESTRM128rm
25684
  { 9083, 3,  0,  0,  396,  0, 0x303804d005ULL, ImplicitList16, ImplicitList60, OperandInfo56, -1 ,nullptr },  // Inst #9083 = VPCMPESTRM128rr
25685
  { 9084, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x93238005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9084 = VPCMPGTBYrm
25686
  { 9085, 3,  1,  0,  377,  0, 0x93238005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9085 = VPCMPGTBYrr
25687
  { 9086, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20013278005006ULL, nullptr, nullptr, OperandInfo792, -1 ,nullptr },  // Inst #9086 = VPCMPGTBZ128rm
25688
  { 9087, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20213278005006ULL, nullptr, nullptr, OperandInfo793, -1 ,nullptr },  // Inst #9087 = VPCMPGTBZ128rmk
25689
  { 9088, 3,  1,  0,  568,  0, 0x20013278005005ULL, nullptr, nullptr, OperandInfo794, -1 ,nullptr },  // Inst #9088 = VPCMPGTBZ128rr
25690
  { 9089, 4,  1,  0,  568,  0, 0x20213278005005ULL, nullptr, nullptr, OperandInfo795, -1 ,nullptr },  // Inst #9089 = VPCMPGTBZ128rrk
25691
  { 9090, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40093278005006ULL, nullptr, nullptr, OperandInfo796, -1 ,nullptr },  // Inst #9090 = VPCMPGTBZ256rm
25692
  { 9091, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40293278005006ULL, nullptr, nullptr, OperandInfo797, -1 ,nullptr },  // Inst #9091 = VPCMPGTBZ256rmk
25693
  { 9092, 3,  1,  0,  568,  0, 0x40093278005005ULL, nullptr, nullptr, OperandInfo798, -1 ,nullptr },  // Inst #9092 = VPCMPGTBZ256rr
25694
  { 9093, 4,  1,  0,  568,  0, 0x40293278005005ULL, nullptr, nullptr, OperandInfo799, -1 ,nullptr },  // Inst #9093 = VPCMPGTBZ256rrk
25695
  { 9094, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80813278005006ULL, nullptr, nullptr, OperandInfo800, -1 ,nullptr },  // Inst #9094 = VPCMPGTBZrm
25696
  { 9095, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a13278005006ULL, nullptr, nullptr, OperandInfo801, -1 ,nullptr },  // Inst #9095 = VPCMPGTBZrmk
25697
  { 9096, 3,  1,  0,  568,  0, 0x80813278005005ULL, nullptr, nullptr, OperandInfo802, -1 ,nullptr },  // Inst #9096 = VPCMPGTBZrr
25698
  { 9097, 4,  1,  0,  568,  0, 0x80a13278005005ULL, nullptr, nullptr, OperandInfo803, -1 ,nullptr },  // Inst #9097 = VPCMPGTBZrrk
25699
  { 9098, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x13238005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #9098 = VPCMPGTBrm
25700
  { 9099, 3,  1,  0,  377,  0, 0x13238005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #9099 = VPCMPGTBrr
25701
  { 9100, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x93338005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9100 = VPCMPGTDYrm
25702
  { 9101, 3,  1,  0,  377,  0, 0x93338005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9101 = VPCMPGTDYrr
25703
  { 9102, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20013378005006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr },  // Inst #9102 = VPCMPGTDZ128rm
25704
  { 9103, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9013378005006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr },  // Inst #9103 = VPCMPGTDZ128rmb
25705
  { 9104, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9213378005006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr },  // Inst #9104 = VPCMPGTDZ128rmbk
25706
  { 9105, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20213378005006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr },  // Inst #9105 = VPCMPGTDZ128rmk
25707
  { 9106, 3,  1,  0,  568,  0, 0x20013378005005ULL, nullptr, nullptr, OperandInfo806, -1 ,nullptr },  // Inst #9106 = VPCMPGTDZ128rr
25708
  { 9107, 4,  1,  0,  568,  0, 0x20213378005005ULL, nullptr, nullptr, OperandInfo807, -1 ,nullptr },  // Inst #9107 = VPCMPGTDZ128rrk
25709
  { 9108, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40093378005006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr },  // Inst #9108 = VPCMPGTDZ256rm
25710
  { 9109, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9093378005006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr },  // Inst #9109 = VPCMPGTDZ256rmb
25711
  { 9110, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9293378005006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr },  // Inst #9110 = VPCMPGTDZ256rmbk
25712
  { 9111, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40293378005006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr },  // Inst #9111 = VPCMPGTDZ256rmk
25713
  { 9112, 3,  1,  0,  568,  0, 0x40093378005005ULL, nullptr, nullptr, OperandInfo810, -1 ,nullptr },  // Inst #9112 = VPCMPGTDZ256rr
25714
  { 9113, 4,  1,  0,  568,  0, 0x40293378005005ULL, nullptr, nullptr, OperandInfo811, -1 ,nullptr },  // Inst #9113 = VPCMPGTDZ256rrk
25715
  { 9114, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80813378005006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr },  // Inst #9114 = VPCMPGTDZrm
25716
  { 9115, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9813378005006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr },  // Inst #9115 = VPCMPGTDZrmb
25717
  { 9116, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9a13378005006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr },  // Inst #9116 = VPCMPGTDZrmbk
25718
  { 9117, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a13378005006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr },  // Inst #9117 = VPCMPGTDZrmk
25719
  { 9118, 3,  1,  0,  568,  0, 0x80813378005005ULL, nullptr, nullptr, OperandInfo814, -1 ,nullptr },  // Inst #9118 = VPCMPGTDZrr
25720
  { 9119, 4,  1,  0,  568,  0, 0x80a13378005005ULL, nullptr, nullptr, OperandInfo815, -1 ,nullptr },  // Inst #9119 = VPCMPGTDZrrk
25721
  { 9120, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x13338005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #9120 = VPCMPGTDrm
25722
  { 9121, 3,  1,  0,  377,  0, 0x13338005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #9121 = VPCMPGTDrr
25723
  { 9122, 7,  1,  0,  830,  0|(1ULL<<MCID::MayLoad), 0x91bb8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9122 = VPCMPGTQYrm
25724
  { 9123, 3,  1,  0,  829,  0, 0x91bb8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9123 = VPCMPGTQYrr
25725
  { 9124, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20019bf8009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr },  // Inst #9124 = VPCMPGTQZ128rm
25726
  { 9125, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11019bf8009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr },  // Inst #9125 = VPCMPGTQZ128rmb
25727
  { 9126, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11219bf8009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr },  // Inst #9126 = VPCMPGTQZ128rmbk
25728
  { 9127, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20219bf8009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr },  // Inst #9127 = VPCMPGTQZ128rmk
25729
  { 9128, 3,  1,  0,  568,  0, 0x20019bf8009005ULL, nullptr, nullptr, OperandInfo818, -1 ,nullptr },  // Inst #9128 = VPCMPGTQZ128rr
25730
  { 9129, 4,  1,  0,  568,  0, 0x20219bf8009005ULL, nullptr, nullptr, OperandInfo819, -1 ,nullptr },  // Inst #9129 = VPCMPGTQZ128rrk
25731
  { 9130, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40099bf8009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr },  // Inst #9130 = VPCMPGTQZ256rm
25732
  { 9131, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11099bf8009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr },  // Inst #9131 = VPCMPGTQZ256rmb
25733
  { 9132, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11299bf8009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr },  // Inst #9132 = VPCMPGTQZ256rmbk
25734
  { 9133, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40299bf8009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr },  // Inst #9133 = VPCMPGTQZ256rmk
25735
  { 9134, 3,  1,  0,  568,  0, 0x40099bf8009005ULL, nullptr, nullptr, OperandInfo822, -1 ,nullptr },  // Inst #9134 = VPCMPGTQZ256rr
25736
  { 9135, 4,  1,  0,  568,  0, 0x40299bf8009005ULL, nullptr, nullptr, OperandInfo823, -1 ,nullptr },  // Inst #9135 = VPCMPGTQZ256rrk
25737
  { 9136, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80819bf8009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr },  // Inst #9136 = VPCMPGTQZrm
25738
  { 9137, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11819bf8009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr },  // Inst #9137 = VPCMPGTQZrmb
25739
  { 9138, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11a19bf8009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr },  // Inst #9138 = VPCMPGTQZrmbk
25740
  { 9139, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a19bf8009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr },  // Inst #9139 = VPCMPGTQZrmk
25741
  { 9140, 3,  1,  0,  568,  0, 0x80819bf8009005ULL, nullptr, nullptr, OperandInfo826, -1 ,nullptr },  // Inst #9140 = VPCMPGTQZrr
25742
  { 9141, 4,  1,  0,  568,  0, 0x80a19bf8009005ULL, nullptr, nullptr, OperandInfo827, -1 ,nullptr },  // Inst #9141 = VPCMPGTQZrrk
25743
  { 9142, 7,  1,  0,  830,  0|(1ULL<<MCID::MayLoad), 0x11bb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #9142 = VPCMPGTQrm
25744
  { 9143, 3,  1,  0,  829,  0, 0x11bb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #9143 = VPCMPGTQrr
25745
  { 9144, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x932b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9144 = VPCMPGTWYrm
25746
  { 9145, 3,  1,  0,  377,  0, 0x932b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9145 = VPCMPGTWYrr
25747
  { 9146, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x200132f8005006ULL, nullptr, nullptr, OperandInfo828, -1 ,nullptr },  // Inst #9146 = VPCMPGTWZ128rm
25748
  { 9147, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x202132f8005006ULL, nullptr, nullptr, OperandInfo829, -1 ,nullptr },  // Inst #9147 = VPCMPGTWZ128rmk
25749
  { 9148, 3,  1,  0,  568,  0, 0x200132f8005005ULL, nullptr, nullptr, OperandInfo830, -1 ,nullptr },  // Inst #9148 = VPCMPGTWZ128rr
25750
  { 9149, 4,  1,  0,  568,  0, 0x202132f8005005ULL, nullptr, nullptr, OperandInfo831, -1 ,nullptr },  // Inst #9149 = VPCMPGTWZ128rrk
25751
  { 9150, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x400932f8005006ULL, nullptr, nullptr, OperandInfo832, -1 ,nullptr },  // Inst #9150 = VPCMPGTWZ256rm
25752
  { 9151, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x402932f8005006ULL, nullptr, nullptr, OperandInfo833, -1 ,nullptr },  // Inst #9151 = VPCMPGTWZ256rmk
25753
  { 9152, 3,  1,  0,  568,  0, 0x400932f8005005ULL, nullptr, nullptr, OperandInfo834, -1 ,nullptr },  // Inst #9152 = VPCMPGTWZ256rr
25754
  { 9153, 4,  1,  0,  568,  0, 0x402932f8005005ULL, nullptr, nullptr, OperandInfo835, -1 ,nullptr },  // Inst #9153 = VPCMPGTWZ256rrk
25755
  { 9154, 7,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x808132f8005006ULL, nullptr, nullptr, OperandInfo836, -1 ,nullptr },  // Inst #9154 = VPCMPGTWZrm
25756
  { 9155, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a132f8005006ULL, nullptr, nullptr, OperandInfo837, -1 ,nullptr },  // Inst #9155 = VPCMPGTWZrmk
25757
  { 9156, 3,  1,  0,  568,  0, 0x808132f8005005ULL, nullptr, nullptr, OperandInfo838, -1 ,nullptr },  // Inst #9156 = VPCMPGTWZrr
25758
  { 9157, 4,  1,  0,  568,  0, 0x80a132f8005005ULL, nullptr, nullptr, OperandInfo839, -1 ,nullptr },  // Inst #9157 = VPCMPGTWZrrk
25759
  { 9158, 7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x132b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #9158 = VPCMPGTWrm
25760
  { 9159, 3,  1,  0,  377,  0, 0x132b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #9159 = VPCMPGTWrr
25761
  { 9160, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo257, -1 ,nullptr },  // Inst #9160 = VPCMPISTRIMEM
25762
  { 9161, 4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo258, -1 ,nullptr },  // Inst #9161 = VPCMPISTRIREG
25763
  { 9162, 7,  0,  0,  397,  0|(1ULL<<MCID::MayLoad), 0x31b804d006ULL, nullptr, ImplicitList59, OperandInfo55, -1 ,nullptr },  // Inst #9162 = VPCMPISTRIrm
25764
  { 9163, 3,  0,  0,  398,  0, 0x31b804d005ULL, nullptr, ImplicitList59, OperandInfo56, -1 ,nullptr },  // Inst #9163 = VPCMPISTRIrr
25765
  { 9164, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo152, -1 ,nullptr },  // Inst #9164 = VPCMPISTRM128MEM
25766
  { 9165, 4,  1,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo101, -1 ,nullptr },  // Inst #9165 = VPCMPISTRM128REG
25767
  { 9166, 7,  0,  0,  399,  0|(1ULL<<MCID::MayLoad), 0x313804d006ULL, nullptr, ImplicitList60, OperandInfo55, -1 ,nullptr },  // Inst #9166 = VPCMPISTRM128rm
25768
  { 9167, 3,  0,  0,  400,  0, 0x313804d005ULL, nullptr, ImplicitList60, OperandInfo56, -1 ,nullptr },  // Inst #9167 = VPCMPISTRM128rr
25769
  { 9168, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20018ff804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #9168 = VPCMPQZ128rmi
25770
  { 9169, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20018ff804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #9169 = VPCMPQZ128rmi_alt
25771
  { 9170, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11018ff804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #9170 = VPCMPQZ128rmib
25772
  { 9171, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11018ff804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #9171 = VPCMPQZ128rmib_alt
25773
  { 9172, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11218ff804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #9172 = VPCMPQZ128rmibk
25774
  { 9173, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11218ff804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #9173 = VPCMPQZ128rmibk_alt
25775
  { 9174, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20218ff804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #9174 = VPCMPQZ128rmik
25776
  { 9175, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20218ff804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #9175 = VPCMPQZ128rmik_alt
25777
  { 9176, 4,  1,  0,  568,  0, 0x20018ff804d005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr },  // Inst #9176 = VPCMPQZ128rri
25778
  { 9177, 4,  1,  0,  568,  0, 0x20018ff804d005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr },  // Inst #9177 = VPCMPQZ128rri_alt
25779
  { 9178, 5,  1,  0,  568,  0, 0x20218ff804d005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr },  // Inst #9178 = VPCMPQZ128rrik
25780
  { 9179, 5,  1,  0,  568,  0, 0x20218ff804d005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr },  // Inst #9179 = VPCMPQZ128rrik_alt
25781
  { 9180, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40098ff804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #9180 = VPCMPQZ256rmi
25782
  { 9181, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40098ff804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #9181 = VPCMPQZ256rmi_alt
25783
  { 9182, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11098ff804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #9182 = VPCMPQZ256rmib
25784
  { 9183, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11098ff804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #9183 = VPCMPQZ256rmib_alt
25785
  { 9184, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11298ff804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #9184 = VPCMPQZ256rmibk
25786
  { 9185, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11298ff804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #9185 = VPCMPQZ256rmibk_alt
25787
  { 9186, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40298ff804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #9186 = VPCMPQZ256rmik
25788
  { 9187, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40298ff804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #9187 = VPCMPQZ256rmik_alt
25789
  { 9188, 4,  1,  0,  568,  0, 0x40098ff804d005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr },  // Inst #9188 = VPCMPQZ256rri
25790
  { 9189, 4,  1,  0,  568,  0, 0x40098ff804d005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr },  // Inst #9189 = VPCMPQZ256rri_alt
25791
  { 9190, 5,  1,  0,  568,  0, 0x40298ff804d005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr },  // Inst #9190 = VPCMPQZ256rrik
25792
  { 9191, 5,  1,  0,  568,  0, 0x40298ff804d005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr },  // Inst #9191 = VPCMPQZ256rrik_alt
25793
  { 9192, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80818ff804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #9192 = VPCMPQZrmi
25794
  { 9193, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80818ff804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #9193 = VPCMPQZrmi_alt
25795
  { 9194, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11818ff804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #9194 = VPCMPQZrmib
25796
  { 9195, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11818ff804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #9195 = VPCMPQZrmib_alt
25797
  { 9196, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11a18ff804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #9196 = VPCMPQZrmibk
25798
  { 9197, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11a18ff804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #9197 = VPCMPQZrmibk_alt
25799
  { 9198, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a18ff804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #9198 = VPCMPQZrmik
25800
  { 9199, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a18ff804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #9199 = VPCMPQZrmik_alt
25801
  { 9200, 4,  1,  0,  568,  0, 0x80818ff804d005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr },  // Inst #9200 = VPCMPQZrri
25802
  { 9201, 4,  1,  0,  568,  0, 0x80818ff804d005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr },  // Inst #9201 = VPCMPQZrri_alt
25803
  { 9202, 5,  1,  0,  568,  0, 0x80a18ff804d005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr },  // Inst #9202 = VPCMPQZrrik
25804
  { 9203, 5,  1,  0,  568,  0, 0x80a18ff804d005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr },  // Inst #9203 = VPCMPQZrrik_alt
25805
  { 9204, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20011f7804d006ULL, nullptr, nullptr, OperandInfo780, -1 ,nullptr },  // Inst #9204 = VPCMPUBZ128rmi
25806
  { 9205, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20011f7804d006ULL, nullptr, nullptr, OperandInfo780, -1 ,nullptr },  // Inst #9205 = VPCMPUBZ128rmi_alt
25807
  { 9206, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20211f7804d006ULL, nullptr, nullptr, OperandInfo781, -1 ,nullptr },  // Inst #9206 = VPCMPUBZ128rmik
25808
  { 9207, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20211f7804d006ULL, nullptr, nullptr, OperandInfo781, -1 ,nullptr },  // Inst #9207 = VPCMPUBZ128rmik_alt
25809
  { 9208, 4,  1,  0,  568,  0, 0x20011f7804d005ULL, nullptr, nullptr, OperandInfo782, -1 ,nullptr },  // Inst #9208 = VPCMPUBZ128rri
25810
  { 9209, 4,  1,  0,  568,  0, 0x20011f7804d005ULL, nullptr, nullptr, OperandInfo782, -1 ,nullptr },  // Inst #9209 = VPCMPUBZ128rri_alt
25811
  { 9210, 5,  1,  0,  568,  0, 0x20211f7804d005ULL, nullptr, nullptr, OperandInfo783, -1 ,nullptr },  // Inst #9210 = VPCMPUBZ128rrik
25812
  { 9211, 5,  1,  0,  568,  0, 0x20211f7804d005ULL, nullptr, nullptr, OperandInfo783, -1 ,nullptr },  // Inst #9211 = VPCMPUBZ128rrik_alt
25813
  { 9212, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40091f7804d006ULL, nullptr, nullptr, OperandInfo784, -1 ,nullptr },  // Inst #9212 = VPCMPUBZ256rmi
25814
  { 9213, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40091f7804d006ULL, nullptr, nullptr, OperandInfo784, -1 ,nullptr },  // Inst #9213 = VPCMPUBZ256rmi_alt
25815
  { 9214, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40291f7804d006ULL, nullptr, nullptr, OperandInfo785, -1 ,nullptr },  // Inst #9214 = VPCMPUBZ256rmik
25816
  { 9215, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40291f7804d006ULL, nullptr, nullptr, OperandInfo785, -1 ,nullptr },  // Inst #9215 = VPCMPUBZ256rmik_alt
25817
  { 9216, 4,  1,  0,  568,  0, 0x40091f7804d005ULL, nullptr, nullptr, OperandInfo786, -1 ,nullptr },  // Inst #9216 = VPCMPUBZ256rri
25818
  { 9217, 4,  1,  0,  568,  0, 0x40091f7804d005ULL, nullptr, nullptr, OperandInfo786, -1 ,nullptr },  // Inst #9217 = VPCMPUBZ256rri_alt
25819
  { 9218, 5,  1,  0,  568,  0, 0x40291f7804d005ULL, nullptr, nullptr, OperandInfo787, -1 ,nullptr },  // Inst #9218 = VPCMPUBZ256rrik
25820
  { 9219, 5,  1,  0,  568,  0, 0x40291f7804d005ULL, nullptr, nullptr, OperandInfo787, -1 ,nullptr },  // Inst #9219 = VPCMPUBZ256rrik_alt
25821
  { 9220, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80811f7804d006ULL, nullptr, nullptr, OperandInfo788, -1 ,nullptr },  // Inst #9220 = VPCMPUBZrmi
25822
  { 9221, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80811f7804d006ULL, nullptr, nullptr, OperandInfo788, -1 ,nullptr },  // Inst #9221 = VPCMPUBZrmi_alt
25823
  { 9222, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a11f7804d006ULL, nullptr, nullptr, OperandInfo789, -1 ,nullptr },  // Inst #9222 = VPCMPUBZrmik
25824
  { 9223, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a11f7804d006ULL, nullptr, nullptr, OperandInfo789, -1 ,nullptr },  // Inst #9223 = VPCMPUBZrmik_alt
25825
  { 9224, 4,  1,  0,  568,  0, 0x80811f7804d005ULL, nullptr, nullptr, OperandInfo790, -1 ,nullptr },  // Inst #9224 = VPCMPUBZrri
25826
  { 9225, 4,  1,  0,  568,  0, 0x80811f7804d005ULL, nullptr, nullptr, OperandInfo790, -1 ,nullptr },  // Inst #9225 = VPCMPUBZrri_alt
25827
  { 9226, 5,  1,  0,  568,  0, 0x80a11f7804d005ULL, nullptr, nullptr, OperandInfo791, -1 ,nullptr },  // Inst #9226 = VPCMPUBZrrik
25828
  { 9227, 5,  1,  0,  568,  0, 0x80a11f7804d005ULL, nullptr, nullptr, OperandInfo791, -1 ,nullptr },  // Inst #9227 = VPCMPUBZrrik_alt
25829
  { 9228, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20010f7804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #9228 = VPCMPUDZ128rmi
25830
  { 9229, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20010f7804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #9229 = VPCMPUDZ128rmi_alt
25831
  { 9230, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9010f7804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #9230 = VPCMPUDZ128rmib
25832
  { 9231, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9010f7804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr },  // Inst #9231 = VPCMPUDZ128rmib_alt
25833
  { 9232, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9210f7804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #9232 = VPCMPUDZ128rmibk
25834
  { 9233, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9210f7804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #9233 = VPCMPUDZ128rmibk_alt
25835
  { 9234, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20210f7804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #9234 = VPCMPUDZ128rmik
25836
  { 9235, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20210f7804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr },  // Inst #9235 = VPCMPUDZ128rmik_alt
25837
  { 9236, 4,  1,  0,  568,  0, 0x20010f7804d005ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr },  // Inst #9236 = VPCMPUDZ128rri
25838
  { 9237, 4,  1,  0,  568,  0, 0x20010f7804d005ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr },  // Inst #9237 = VPCMPUDZ128rri_alt
25839
  { 9238, 5,  1,  0,  568,  0, 0x20210f7804d005ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr },  // Inst #9238 = VPCMPUDZ128rrik
25840
  { 9239, 5,  1,  0,  568,  0, 0x20210f7804d005ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr },  // Inst #9239 = VPCMPUDZ128rrik_alt
25841
  { 9240, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40090f7804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #9240 = VPCMPUDZ256rmi
25842
  { 9241, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40090f7804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #9241 = VPCMPUDZ256rmi_alt
25843
  { 9242, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9090f7804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #9242 = VPCMPUDZ256rmib
25844
  { 9243, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9090f7804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr },  // Inst #9243 = VPCMPUDZ256rmib_alt
25845
  { 9244, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9290f7804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #9244 = VPCMPUDZ256rmibk
25846
  { 9245, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9290f7804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #9245 = VPCMPUDZ256rmibk_alt
25847
  { 9246, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40290f7804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #9246 = VPCMPUDZ256rmik
25848
  { 9247, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40290f7804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr },  // Inst #9247 = VPCMPUDZ256rmik_alt
25849
  { 9248, 4,  1,  0,  568,  0, 0x40090f7804d005ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr },  // Inst #9248 = VPCMPUDZ256rri
25850
  { 9249, 4,  1,  0,  568,  0, 0x40090f7804d005ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr },  // Inst #9249 = VPCMPUDZ256rri_alt
25851
  { 9250, 5,  1,  0,  568,  0, 0x40290f7804d005ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr },  // Inst #9250 = VPCMPUDZ256rrik
25852
  { 9251, 5,  1,  0,  568,  0, 0x40290f7804d005ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr },  // Inst #9251 = VPCMPUDZ256rrik_alt
25853
  { 9252, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80810f7804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #9252 = VPCMPUDZrmi
25854
  { 9253, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80810f7804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #9253 = VPCMPUDZrmi_alt
25855
  { 9254, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9810f7804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #9254 = VPCMPUDZrmib
25856
  { 9255, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9810f7804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr },  // Inst #9255 = VPCMPUDZrmib_alt
25857
  { 9256, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9a10f7804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #9256 = VPCMPUDZrmibk
25858
  { 9257, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x9a10f7804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #9257 = VPCMPUDZrmibk_alt
25859
  { 9258, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a10f7804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #9258 = VPCMPUDZrmik
25860
  { 9259, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a10f7804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr },  // Inst #9259 = VPCMPUDZrmik_alt
25861
  { 9260, 4,  1,  0,  568,  0, 0x80810f7804d005ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr },  // Inst #9260 = VPCMPUDZrri
25862
  { 9261, 4,  1,  0,  568,  0, 0x80810f7804d005ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr },  // Inst #9261 = VPCMPUDZrri_alt
25863
  { 9262, 5,  1,  0,  568,  0, 0x80a10f7804d005ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr },  // Inst #9262 = VPCMPUDZrrik
25864
  { 9263, 5,  1,  0,  568,  0, 0x80a10f7804d005ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr },  // Inst #9263 = VPCMPUDZrrik_alt
25865
  { 9264, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20018f7804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #9264 = VPCMPUQZ128rmi
25866
  { 9265, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20018f7804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #9265 = VPCMPUQZ128rmi_alt
25867
  { 9266, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11018f7804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #9266 = VPCMPUQZ128rmib
25868
  { 9267, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11018f7804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr },  // Inst #9267 = VPCMPUQZ128rmib_alt
25869
  { 9268, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11218f7804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #9268 = VPCMPUQZ128rmibk
25870
  { 9269, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11218f7804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #9269 = VPCMPUQZ128rmibk_alt
25871
  { 9270, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20218f7804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #9270 = VPCMPUQZ128rmik
25872
  { 9271, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20218f7804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr },  // Inst #9271 = VPCMPUQZ128rmik_alt
25873
  { 9272, 4,  1,  0,  568,  0, 0x20018f7804d005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr },  // Inst #9272 = VPCMPUQZ128rri
25874
  { 9273, 4,  1,  0,  568,  0, 0x20018f7804d005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr },  // Inst #9273 = VPCMPUQZ128rri_alt
25875
  { 9274, 5,  1,  0,  568,  0, 0x20218f7804d005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr },  // Inst #9274 = VPCMPUQZ128rrik
25876
  { 9275, 5,  1,  0,  568,  0, 0x20218f7804d005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr },  // Inst #9275 = VPCMPUQZ128rrik_alt
25877
  { 9276, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40098f7804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #9276 = VPCMPUQZ256rmi
25878
  { 9277, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40098f7804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #9277 = VPCMPUQZ256rmi_alt
25879
  { 9278, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11098f7804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #9278 = VPCMPUQZ256rmib
25880
  { 9279, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11098f7804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr },  // Inst #9279 = VPCMPUQZ256rmib_alt
25881
  { 9280, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11298f7804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #9280 = VPCMPUQZ256rmibk
25882
  { 9281, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11298f7804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #9281 = VPCMPUQZ256rmibk_alt
25883
  { 9282, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40298f7804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #9282 = VPCMPUQZ256rmik
25884
  { 9283, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40298f7804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr },  // Inst #9283 = VPCMPUQZ256rmik_alt
25885
  { 9284, 4,  1,  0,  568,  0, 0x40098f7804d005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr },  // Inst #9284 = VPCMPUQZ256rri
25886
  { 9285, 4,  1,  0,  568,  0, 0x40098f7804d005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr },  // Inst #9285 = VPCMPUQZ256rri_alt
25887
  { 9286, 5,  1,  0,  568,  0, 0x40298f7804d005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr },  // Inst #9286 = VPCMPUQZ256rrik
25888
  { 9287, 5,  1,  0,  568,  0, 0x40298f7804d005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr },  // Inst #9287 = VPCMPUQZ256rrik_alt
25889
  { 9288, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80818f7804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #9288 = VPCMPUQZrmi
25890
  { 9289, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80818f7804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #9289 = VPCMPUQZrmi_alt
25891
  { 9290, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11818f7804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #9290 = VPCMPUQZrmib
25892
  { 9291, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11818f7804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr },  // Inst #9291 = VPCMPUQZrmib_alt
25893
  { 9292, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11a18f7804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #9292 = VPCMPUQZrmibk
25894
  { 9293, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x11a18f7804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #9293 = VPCMPUQZrmibk_alt
25895
  { 9294, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a18f7804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #9294 = VPCMPUQZrmik
25896
  { 9295, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a18f7804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr },  // Inst #9295 = VPCMPUQZrmik_alt
25897
  { 9296, 4,  1,  0,  568,  0, 0x80818f7804d005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr },  // Inst #9296 = VPCMPUQZrri
25898
  { 9297, 4,  1,  0,  568,  0, 0x80818f7804d005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr },  // Inst #9297 = VPCMPUQZrri_alt
25899
  { 9298, 5,  1,  0,  568,  0, 0x80a18f7804d005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr },  // Inst #9298 = VPCMPUQZrrik
25900
  { 9299, 5,  1,  0,  568,  0, 0x80a18f7804d005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr },  // Inst #9299 = VPCMPUQZrrik_alt
25901
  { 9300, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20019f7804d006ULL, nullptr, nullptr, OperandInfo840, -1 ,nullptr },  // Inst #9300 = VPCMPUWZ128rmi
25902
  { 9301, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20019f7804d006ULL, nullptr, nullptr, OperandInfo840, -1 ,nullptr },  // Inst #9301 = VPCMPUWZ128rmi_alt
25903
  { 9302, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20219f7804d006ULL, nullptr, nullptr, OperandInfo841, -1 ,nullptr },  // Inst #9302 = VPCMPUWZ128rmik
25904
  { 9303, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20219f7804d006ULL, nullptr, nullptr, OperandInfo841, -1 ,nullptr },  // Inst #9303 = VPCMPUWZ128rmik_alt
25905
  { 9304, 4,  1,  0,  568,  0, 0x20019f7804d005ULL, nullptr, nullptr, OperandInfo842, -1 ,nullptr },  // Inst #9304 = VPCMPUWZ128rri
25906
  { 9305, 4,  1,  0,  568,  0, 0x20019f7804d005ULL, nullptr, nullptr, OperandInfo842, -1 ,nullptr },  // Inst #9305 = VPCMPUWZ128rri_alt
25907
  { 9306, 5,  1,  0,  568,  0, 0x20219f7804d005ULL, nullptr, nullptr, OperandInfo843, -1 ,nullptr },  // Inst #9306 = VPCMPUWZ128rrik
25908
  { 9307, 5,  1,  0,  568,  0, 0x20219f7804d005ULL, nullptr, nullptr, OperandInfo843, -1 ,nullptr },  // Inst #9307 = VPCMPUWZ128rrik_alt
25909
  { 9308, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40099f7804d006ULL, nullptr, nullptr, OperandInfo844, -1 ,nullptr },  // Inst #9308 = VPCMPUWZ256rmi
25910
  { 9309, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40099f7804d006ULL, nullptr, nullptr, OperandInfo844, -1 ,nullptr },  // Inst #9309 = VPCMPUWZ256rmi_alt
25911
  { 9310, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40299f7804d006ULL, nullptr, nullptr, OperandInfo845, -1 ,nullptr },  // Inst #9310 = VPCMPUWZ256rmik
25912
  { 9311, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40299f7804d006ULL, nullptr, nullptr, OperandInfo845, -1 ,nullptr },  // Inst #9311 = VPCMPUWZ256rmik_alt
25913
  { 9312, 4,  1,  0,  568,  0, 0x40099f7804d005ULL, nullptr, nullptr, OperandInfo846, -1 ,nullptr },  // Inst #9312 = VPCMPUWZ256rri
25914
  { 9313, 4,  1,  0,  568,  0, 0x40099f7804d005ULL, nullptr, nullptr, OperandInfo846, -1 ,nullptr },  // Inst #9313 = VPCMPUWZ256rri_alt
25915
  { 9314, 5,  1,  0,  568,  0, 0x40299f7804d005ULL, nullptr, nullptr, OperandInfo847, -1 ,nullptr },  // Inst #9314 = VPCMPUWZ256rrik
25916
  { 9315, 5,  1,  0,  568,  0, 0x40299f7804d005ULL, nullptr, nullptr, OperandInfo847, -1 ,nullptr },  // Inst #9315 = VPCMPUWZ256rrik_alt
25917
  { 9316, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80819f7804d006ULL, nullptr, nullptr, OperandInfo848, -1 ,nullptr },  // Inst #9316 = VPCMPUWZrmi
25918
  { 9317, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80819f7804d006ULL, nullptr, nullptr, OperandInfo848, -1 ,nullptr },  // Inst #9317 = VPCMPUWZrmi_alt
25919
  { 9318, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a19f7804d006ULL, nullptr, nullptr, OperandInfo849, -1 ,nullptr },  // Inst #9318 = VPCMPUWZrmik
25920
  { 9319, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a19f7804d006ULL, nullptr, nullptr, OperandInfo849, -1 ,nullptr },  // Inst #9319 = VPCMPUWZrmik_alt
25921
  { 9320, 4,  1,  0,  568,  0, 0x80819f7804d005ULL, nullptr, nullptr, OperandInfo850, -1 ,nullptr },  // Inst #9320 = VPCMPUWZrri
25922
  { 9321, 4,  1,  0,  568,  0, 0x80819f7804d005ULL, nullptr, nullptr, OperandInfo850, -1 ,nullptr },  // Inst #9321 = VPCMPUWZrri_alt
25923
  { 9322, 5,  1,  0,  568,  0, 0x80a19f7804d005ULL, nullptr, nullptr, OperandInfo851, -1 ,nullptr },  // Inst #9322 = VPCMPUWZrrik
25924
  { 9323, 5,  1,  0,  568,  0, 0x80a19f7804d005ULL, nullptr, nullptr, OperandInfo851, -1 ,nullptr },  // Inst #9323 = VPCMPUWZrrik_alt
25925
  { 9324, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20019ff804d006ULL, nullptr, nullptr, OperandInfo840, -1 ,nullptr },  // Inst #9324 = VPCMPWZ128rmi
25926
  { 9325, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20019ff804d006ULL, nullptr, nullptr, OperandInfo840, -1 ,nullptr },  // Inst #9325 = VPCMPWZ128rmi_alt
25927
  { 9326, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20219ff804d006ULL, nullptr, nullptr, OperandInfo841, -1 ,nullptr },  // Inst #9326 = VPCMPWZ128rmik
25928
  { 9327, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x20219ff804d006ULL, nullptr, nullptr, OperandInfo841, -1 ,nullptr },  // Inst #9327 = VPCMPWZ128rmik_alt
25929
  { 9328, 4,  1,  0,  568,  0, 0x20019ff804d005ULL, nullptr, nullptr, OperandInfo842, -1 ,nullptr },  // Inst #9328 = VPCMPWZ128rri
25930
  { 9329, 4,  1,  0,  568,  0, 0x20019ff804d005ULL, nullptr, nullptr, OperandInfo842, -1 ,nullptr },  // Inst #9329 = VPCMPWZ128rri_alt
25931
  { 9330, 5,  1,  0,  568,  0, 0x20219ff804d005ULL, nullptr, nullptr, OperandInfo843, -1 ,nullptr },  // Inst #9330 = VPCMPWZ128rrik
25932
  { 9331, 5,  1,  0,  568,  0, 0x20219ff804d005ULL, nullptr, nullptr, OperandInfo843, -1 ,nullptr },  // Inst #9331 = VPCMPWZ128rrik_alt
25933
  { 9332, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40099ff804d006ULL, nullptr, nullptr, OperandInfo844, -1 ,nullptr },  // Inst #9332 = VPCMPWZ256rmi
25934
  { 9333, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40099ff804d006ULL, nullptr, nullptr, OperandInfo844, -1 ,nullptr },  // Inst #9333 = VPCMPWZ256rmi_alt
25935
  { 9334, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40299ff804d006ULL, nullptr, nullptr, OperandInfo845, -1 ,nullptr },  // Inst #9334 = VPCMPWZ256rmik
25936
  { 9335, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x40299ff804d006ULL, nullptr, nullptr, OperandInfo845, -1 ,nullptr },  // Inst #9335 = VPCMPWZ256rmik_alt
25937
  { 9336, 4,  1,  0,  568,  0, 0x40099ff804d005ULL, nullptr, nullptr, OperandInfo846, -1 ,nullptr },  // Inst #9336 = VPCMPWZ256rri
25938
  { 9337, 4,  1,  0,  568,  0, 0x40099ff804d005ULL, nullptr, nullptr, OperandInfo846, -1 ,nullptr },  // Inst #9337 = VPCMPWZ256rri_alt
25939
  { 9338, 5,  1,  0,  568,  0, 0x40299ff804d005ULL, nullptr, nullptr, OperandInfo847, -1 ,nullptr },  // Inst #9338 = VPCMPWZ256rrik
25940
  { 9339, 5,  1,  0,  568,  0, 0x40299ff804d005ULL, nullptr, nullptr, OperandInfo847, -1 ,nullptr },  // Inst #9339 = VPCMPWZ256rrik_alt
25941
  { 9340, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80819ff804d006ULL, nullptr, nullptr, OperandInfo848, -1 ,nullptr },  // Inst #9340 = VPCMPWZrmi
25942
  { 9341, 8,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80819ff804d006ULL, nullptr, nullptr, OperandInfo848, -1 ,nullptr },  // Inst #9341 = VPCMPWZrmi_alt
25943
  { 9342, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a19ff804d006ULL, nullptr, nullptr, OperandInfo849, -1 ,nullptr },  // Inst #9342 = VPCMPWZrmik
25944
  { 9343, 9,  1,  0,  532,  0|(1ULL<<MCID::MayLoad), 0x80a19ff804d006ULL, nullptr, nullptr, OperandInfo849, -1 ,nullptr },  // Inst #9343 = VPCMPWZrmik_alt
25945
  { 9344, 4,  1,  0,  568,  0, 0x80819ff804d005ULL, nullptr, nullptr, OperandInfo850, -1 ,nullptr },  // Inst #9344 = VPCMPWZrri
25946
  { 9345, 4,  1,  0,  568,  0, 0x80819ff804d005ULL, nullptr, nullptr, OperandInfo850, -1 ,nullptr },  // Inst #9345 = VPCMPWZrri_alt
25947
  { 9346, 5,  1,  0,  568,  0, 0x80a19ff804d005ULL, nullptr, nullptr, OperandInfo851, -1 ,nullptr },  // Inst #9346 = VPCMPWZrrik
25948
  { 9347, 5,  1,  0,  568,  0, 0x80a19ff804d005ULL, nullptr, nullptr, OperandInfo851, -1 ,nullptr },  // Inst #9347 = VPCMPWZrrik_alt
25949
  { 9348, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x16658050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9348 = VPCOMBmi
25950
  { 9349, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x16658050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9349 = VPCOMBmi_alt
25951
  { 9350, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x16658050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9350 = VPCOMBri
25952
  { 9351, 4,  1,  0,  0,  0, 0x16658050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9351 = VPCOMBri_alt
25953
  { 9352, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x16758050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9352 = VPCOMDmi
25954
  { 9353, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x16758050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9353 = VPCOMDmi_alt
25955
  { 9354, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x16758050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9354 = VPCOMDri
25956
  { 9355, 4,  1,  0,  0,  0, 0x16758050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9355 = VPCOMDri_alt
25957
  { 9356, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80045f8009004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #9356 = VPCOMPRESSDZ128mr
25958
  { 9357, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x82045f8009004ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #9357 = VPCOMPRESSDZ128mrk
25959
  { 9358, 2,  1,  0,  0,  0, 0x200045f8009003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #9358 = VPCOMPRESSDZ128rr
25960
  { 9359, 4,  1,  0,  0,  0, 0x202045f8009003ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #9359 = VPCOMPRESSDZ128rrk
25961
  { 9360, 3,  1,  0,  0,  0, 0x206045f8009003ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #9360 = VPCOMPRESSDZ128rrkz
25962
  { 9361, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80845f8009004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #9361 = VPCOMPRESSDZ256mr
25963
  { 9362, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x82845f8009004ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #9362 = VPCOMPRESSDZ256mrk
25964
  { 9363, 2,  1,  0,  0,  0, 0x400845f8009003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #9363 = VPCOMPRESSDZ256rr
25965
  { 9364, 4,  1,  0,  0,  0, 0x402845f8009003ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #9364 = VPCOMPRESSDZ256rrk
25966
  { 9365, 3,  1,  0,  0,  0, 0x406845f8009003ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #9365 = VPCOMPRESSDZ256rrkz
25967
  { 9366, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x88045f8009004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #9366 = VPCOMPRESSDZmr
25968
  { 9367, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8a045f8009004ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #9367 = VPCOMPRESSDZmrk
25969
  { 9368, 2,  1,  0,  0,  0, 0x808045f8009003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #9368 = VPCOMPRESSDZrr
25970
  { 9369, 4,  1,  0,  0,  0, 0x80a045f8009003ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #9369 = VPCOMPRESSDZrrk
25971
  { 9370, 3,  1,  0,  0,  0, 0x80e045f8009003ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #9370 = VPCOMPRESSDZrrkz
25972
  { 9371, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1000c5f8009004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #9371 = VPCOMPRESSQZ128mr
25973
  { 9372, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1020c5f8009004ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #9372 = VPCOMPRESSQZ128mrk
25974
  { 9373, 2,  1,  0,  0,  0, 0x2000c5f8009003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #9373 = VPCOMPRESSQZ128rr
25975
  { 9374, 4,  1,  0,  0,  0, 0x2020c5f8009003ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #9374 = VPCOMPRESSQZ128rrk
25976
  { 9375, 3,  1,  0,  0,  0, 0x2060c5f8009003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #9375 = VPCOMPRESSQZ128rrkz
25977
  { 9376, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1008c5f8009004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #9376 = VPCOMPRESSQZ256mr
25978
  { 9377, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1028c5f8009004ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #9377 = VPCOMPRESSQZ256mrk
25979
  { 9378, 2,  1,  0,  0,  0, 0x4008c5f8009003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #9378 = VPCOMPRESSQZ256rr
25980
  { 9379, 4,  1,  0,  0,  0, 0x4028c5f8009003ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #9379 = VPCOMPRESSQZ256rrk
25981
  { 9380, 3,  1,  0,  0,  0, 0x4068c5f8009003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #9380 = VPCOMPRESSQZ256rrkz
25982
  { 9381, 6,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1080c5f8009004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #9381 = VPCOMPRESSQZmr
25983
  { 9382, 7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10a0c5f8009004ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #9382 = VPCOMPRESSQZmrk
25984
  { 9383, 2,  1,  0,  0,  0, 0x8080c5f8009003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #9383 = VPCOMPRESSQZrr
25985
  { 9384, 4,  1,  0,  0,  0, 0x80a0c5f8009003ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #9384 = VPCOMPRESSQZrrk
25986
  { 9385, 3,  1,  0,  0,  0, 0x80e0c5f8009003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #9385 = VPCOMPRESSQZrrkz
25987
  { 9386, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x167d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9386 = VPCOMQmi
25988
  { 9387, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x167d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9387 = VPCOMQmi_alt
25989
  { 9388, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x167d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9388 = VPCOMQri
25990
  { 9389, 4,  1,  0,  0,  0, 0x167d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9389 = VPCOMQri_alt
25991
  { 9390, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x17658050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9390 = VPCOMUBmi
25992
  { 9391, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x17658050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9391 = VPCOMUBmi_alt
25993
  { 9392, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x17658050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9392 = VPCOMUBri
25994
  { 9393, 4,  1,  0,  0,  0, 0x17658050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9393 = VPCOMUBri_alt
25995
  { 9394, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x17758050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9394 = VPCOMUDmi
25996
  { 9395, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x17758050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9395 = VPCOMUDmi_alt
25997
  { 9396, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x17758050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9396 = VPCOMUDri
25998
  { 9397, 4,  1,  0,  0,  0, 0x17758050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9397 = VPCOMUDri_alt
25999
  { 9398, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x177d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9398 = VPCOMUQmi
26000
  { 9399, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x177d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9399 = VPCOMUQmi_alt
26001
  { 9400, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x177d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9400 = VPCOMUQri
26002
  { 9401, 4,  1,  0,  0,  0, 0x177d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9401 = VPCOMUQri_alt
26003
  { 9402, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x176d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9402 = VPCOMUWmi
26004
  { 9403, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x176d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9403 = VPCOMUWmi_alt
26005
  { 9404, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x176d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9404 = VPCOMUWri
26006
  { 9405, 4,  1,  0,  0,  0, 0x176d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9405 = VPCOMUWri_alt
26007
  { 9406, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x166d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9406 = VPCOMWmi
26008
  { 9407, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x166d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #9407 = VPCOMWmi_alt
26009
  { 9408, 4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x166d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9408 = VPCOMWri
26010
  { 9409, 4,  1,  0,  0,  0, 0x166d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #9409 = VPCOMWri_alt
26011
  { 9410, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20006278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #9410 = VPCONFLICTDZ128rm
26012
  { 9411, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9006278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #9411 = VPCONFLICTDZ128rmb
26013
  { 9412, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9206278009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #9412 = VPCONFLICTDZ128rmbk
26014
  { 9413, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9606278009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #9413 = VPCONFLICTDZ128rmbkz
26015
  { 9414, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20206278009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #9414 = VPCONFLICTDZ128rmk
26016
  { 9415, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20606278009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #9415 = VPCONFLICTDZ128rmkz
26017
  { 9416, 2,  1,  0,  0,  0, 0x20006278009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #9416 = VPCONFLICTDZ128rr
26018
  { 9417, 4,  1,  0,  0,  0, 0x20206278009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #9417 = VPCONFLICTDZ128rrk
26019
  { 9418, 3,  1,  0,  0,  0, 0x20606278009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #9418 = VPCONFLICTDZ128rrkz
26020
  { 9419, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40086278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #9419 = VPCONFLICTDZ256rm
26021
  { 9420, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9086278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #9420 = VPCONFLICTDZ256rmb
26022
  { 9421, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9286278009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #9421 = VPCONFLICTDZ256rmbk
26023
  { 9422, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9686278009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #9422 = VPCONFLICTDZ256rmbkz
26024
  { 9423, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40286278009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #9423 = VPCONFLICTDZ256rmk
26025
  { 9424, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40686278009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #9424 = VPCONFLICTDZ256rmkz
26026
  { 9425, 2,  1,  0,  0,  0, 0x40086278009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #9425 = VPCONFLICTDZ256rr
26027
  { 9426, 4,  1,  0,  0,  0, 0x40286278009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #9426 = VPCONFLICTDZ256rrk
26028
  { 9427, 3,  1,  0,  0,  0, 0x40686278009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #9427 = VPCONFLICTDZ256rrkz
26029
  { 9428, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80806278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #9428 = VPCONFLICTDZrm
26030
  { 9429, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9806278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #9429 = VPCONFLICTDZrmb
26031
  { 9430, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a06278009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #9430 = VPCONFLICTDZrmbk
26032
  { 9431, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e06278009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #9431 = VPCONFLICTDZrmbkz
26033
  { 9432, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a06278009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #9432 = VPCONFLICTDZrmk
26034
  { 9433, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e06278009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #9433 = VPCONFLICTDZrmkz
26035
  { 9434, 2,  1,  0,  0,  0, 0x80806278009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #9434 = VPCONFLICTDZrr
26036
  { 9435, 4,  1,  0,  0,  0, 0x80a06278009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #9435 = VPCONFLICTDZrrk
26037
  { 9436, 3,  1,  0,  0,  0, 0x80e06278009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #9436 = VPCONFLICTDZrrkz
26038
  { 9437, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000e278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #9437 = VPCONFLICTQZ128rm
26039
  { 9438, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100e278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #9438 = VPCONFLICTQZ128rmb
26040
  { 9439, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120e278009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #9439 = VPCONFLICTQZ128rmbk
26041
  { 9440, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160e278009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #9440 = VPCONFLICTQZ128rmbkz
26042
  { 9441, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020e278009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #9441 = VPCONFLICTQZ128rmk
26043
  { 9442, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060e278009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #9442 = VPCONFLICTQZ128rmkz
26044
  { 9443, 2,  1,  0,  0,  0, 0x2000e278009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #9443 = VPCONFLICTQZ128rr
26045
  { 9444, 4,  1,  0,  0,  0, 0x2020e278009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #9444 = VPCONFLICTQZ128rrk
26046
  { 9445, 3,  1,  0,  0,  0, 0x2060e278009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #9445 = VPCONFLICTQZ128rrkz
26047
  { 9446, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008e278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #9446 = VPCONFLICTQZ256rm
26048
  { 9447, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108e278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #9447 = VPCONFLICTQZ256rmb
26049
  { 9448, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128e278009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #9448 = VPCONFLICTQZ256rmbk
26050
  { 9449, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168e278009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #9449 = VPCONFLICTQZ256rmbkz
26051
  { 9450, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028e278009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #9450 = VPCONFLICTQZ256rmk
26052
  { 9451, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068e278009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #9451 = VPCONFLICTQZ256rmkz
26053
  { 9452, 2,  1,  0,  0,  0, 0x4008e278009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #9452 = VPCONFLICTQZ256rr
26054
  { 9453, 4,  1,  0,  0,  0, 0x4028e278009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #9453 = VPCONFLICTQZ256rrk
26055
  { 9454, 3,  1,  0,  0,  0, 0x4068e278009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #9454 = VPCONFLICTQZ256rrkz
26056
  { 9455, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080e278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #9455 = VPCONFLICTQZrm
26057
  { 9456, 6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180e278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #9456 = VPCONFLICTQZrmb
26058
  { 9457, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0e278009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #9457 = VPCONFLICTQZrmbk
26059
  { 9458, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0e278009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #9458 = VPCONFLICTQZrmbkz
26060
  { 9459, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0e278009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #9459 = VPCONFLICTQZrmk
26061
  { 9460, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0e278009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #9460 = VPCONFLICTQZrmkz
26062
  { 9461, 2,  1,  0,  0,  0, 0x8080e278009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #9461 = VPCONFLICTQZrr
26063
  { 9462, 4,  1,  0,  0,  0, 0x80a0e278009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #9462 = VPCONFLICTQZrrk
26064
  { 9463, 3,  1,  0,  0,  0, 0x80e0e278009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #9463 = VPCONFLICTQZrrkz
26065
  { 9464, 8,  1,  0,  842,  0|(1ULL<<MCID::MayLoad), 0x9032804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #9464 = VPERM2F128rm
26066
  { 9465, 4,  1,  0,  841,  0|(1ULL<<MCID::Commutable), 0x9032804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #9465 = VPERM2F128rr
26067
  { 9466, 8,  1,  0,  547,  0|(1ULL<<MCID::MayLoad), 0x9233804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #9466 = VPERM2I128rm
26068
  { 9467, 4,  1,  0,  544,  0|(1ULL<<MCID::Commutable), 0x9233804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #9467 = VPERM2I128rr
26069
  { 9468, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200146f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #9468 = VPERMBZ128rm
26070
  { 9469, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202146f8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #9469 = VPERMBZ128rmk
26071
  { 9470, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206146f8009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #9470 = VPERMBZ128rmkz
26072
  { 9471, 3,  1,  0,  0,  0, 0x200146f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #9471 = VPERMBZ128rr
26073
  { 9472, 5,  1,  0,  0,  0, 0x202146f8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #9472 = VPERMBZ128rrk
26074
  { 9473, 4,  1,  0,  0,  0, 0x206146f8009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #9473 = VPERMBZ128rrkz
26075
  { 9474, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400946f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9474 = VPERMBZ256rm
26076
  { 9475, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402946f8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #9475 = VPERMBZ256rmk
26077
  { 9476, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406946f8009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #9476 = VPERMBZ256rmkz
26078
  { 9477, 3,  1,  0,  0,  0, 0x400946f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #9477 = VPERMBZ256rr
26079
  { 9478, 5,  1,  0,  0,  0, 0x402946f8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #9478 = VPERMBZ256rrk
26080
  { 9479, 4,  1,  0,  0,  0, 0x406946f8009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #9479 = VPERMBZ256rrkz
26081
  { 9480, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808146f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9480 = VPERMBZrm
26082
  { 9481, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a146f8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #9481 = VPERMBZrmk
26083
  { 9482, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e146f8009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #9482 = VPERMBZrmkz
26084
  { 9483, 3,  1,  0,  0,  0, 0x808146f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #9483 = VPERMBZrr
26085
  { 9484, 5,  1,  0,  0,  0, 0x80a146f8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #9484 = VPERMBZrrk
26086
  { 9485, 4,  1,  0,  0,  0, 0x80e146f8009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #9485 = VPERMBZrrkz
26087
  { 9486, 7,  1,  0,  547,  0|(1ULL<<MCID::MayLoad), 0x91b38009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9486 = VPERMDYrm
26088
  { 9487, 3,  1,  0,  544,  0, 0x91b38009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9487 = VPERMDYrr
26089
  { 9488, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9488 = VPERMDZ256rm
26090
  { 9489, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9091b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9489 = VPERMDZ256rmb
26091
  { 9490, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9291b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9490 = VPERMDZ256rmbk
26092
  { 9491, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9691b78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #9491 = VPERMDZ256rmbkz
26093
  { 9492, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9492 = VPERMDZ256rmk
26094
  { 9493, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40691b78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #9493 = VPERMDZ256rmkz
26095
  { 9494, 3,  1,  0,  0,  0, 0x40091b78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #9494 = VPERMDZ256rr
26096
  { 9495, 5,  1,  0,  0,  0, 0x40291b78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #9495 = VPERMDZ256rrk
26097
  { 9496, 4,  1,  0,  0,  0, 0x40691b78009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #9496 = VPERMDZ256rrkz
26098
  { 9497, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9497 = VPERMDZrm
26099
  { 9498, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9811b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9498 = VPERMDZrmb
26100
  { 9499, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a11b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9499 = VPERMDZrmbk
26101
  { 9500, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e11b78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #9500 = VPERMDZrmbkz
26102
  { 9501, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9501 = VPERMDZrmk
26103
  { 9502, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e11b78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #9502 = VPERMDZrmkz
26104
  { 9503, 3,  1,  0,  0,  0, 0x80811b78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #9503 = VPERMDZrr
26105
  { 9504, 5,  1,  0,  0,  0, 0x80a11b78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #9504 = VPERMDZrrk
26106
  { 9505, 4,  1,  0,  0,  0, 0x80e11b78009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #9505 = VPERMDZrrkz
26107
  { 9506, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013af8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9506 = VPERMI2B128rm
26108
  { 9507, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213af8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #9507 = VPERMI2B128rmk
26109
  { 9508, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613af8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #9508 = VPERMI2B128rmkz
26110
  { 9509, 4,  1,  0,  0,  0, 0x20013af8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #9509 = VPERMI2B128rr
26111
  { 9510, 5,  1,  0,  0,  0, 0x20213af8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #9510 = VPERMI2B128rrk
26112
  { 9511, 5,  1,  0,  0,  0, 0x20613af8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #9511 = VPERMI2B128rrkz
26113
  { 9512, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093af8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9512 = VPERMI2B256rm
26114
  { 9513, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293af8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #9513 = VPERMI2B256rmk
26115
  { 9514, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693af8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #9514 = VPERMI2B256rmkz
26116
  { 9515, 4,  1,  0,  0,  0, 0x40093af8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #9515 = VPERMI2B256rr
26117
  { 9516, 5,  1,  0,  0,  0, 0x40293af8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #9516 = VPERMI2B256rrk
26118
  { 9517, 5,  1,  0,  0,  0, 0x40693af8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #9517 = VPERMI2B256rrkz
26119
  { 9518, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813af8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9518 = VPERMI2Brm
26120
  { 9519, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13af8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #9519 = VPERMI2Brmk
26121
  { 9520, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13af8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #9520 = VPERMI2Brmkz
26122
  { 9521, 4,  1,  0,  0,  0, 0x80813af8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #9521 = VPERMI2Brr
26123
  { 9522, 5,  1,  0,  0,  0, 0x80a13af8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #9522 = VPERMI2Brrk
26124
  { 9523, 5,  1,  0,  0,  0, 0x80e13af8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #9523 = VPERMI2Brrkz
26125
  { 9524, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013b78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9524 = VPERMI2D128rm
26126
  { 9525, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9013b78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9525 = VPERMI2D128rmb
26127
  { 9526, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9213b78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9526 = VPERMI2D128rmbk
26128
  { 9527, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9613b78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9527 = VPERMI2D128rmbkz
26129
  { 9528, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213b78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9528 = VPERMI2D128rmk
26130
  { 9529, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613b78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9529 = VPERMI2D128rmkz
26131
  { 9530, 4,  1,  0,  0,  0, 0x20013b78009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #9530 = VPERMI2D128rr
26132
  { 9531, 5,  1,  0,  0,  0, 0x20213b78009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #9531 = VPERMI2D128rrk
26133
  { 9532, 5,  1,  0,  0,  0, 0x20613b78009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #9532 = VPERMI2D128rrkz
26134
  { 9533, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093b78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9533 = VPERMI2D256rm
26135
  { 9534, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9093b78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9534 = VPERMI2D256rmb
26136
  { 9535, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9293b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9535 = VPERMI2D256rmbk
26137
  { 9536, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9693b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9536 = VPERMI2D256rmbkz
26138
  { 9537, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9537 = VPERMI2D256rmk
26139
  { 9538, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9538 = VPERMI2D256rmkz
26140
  { 9539, 4,  1,  0,  0,  0, 0x40093b78009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #9539 = VPERMI2D256rr
26141
  { 9540, 5,  1,  0,  0,  0, 0x40293b78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #9540 = VPERMI2D256rrk
26142
  { 9541, 5,  1,  0,  0,  0, 0x40693b78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #9541 = VPERMI2D256rrkz
26143
  { 9542, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813b78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9542 = VPERMI2Drm
26144
  { 9543, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9813b78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9543 = VPERMI2Drmb
26145
  { 9544, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a13b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9544 = VPERMI2Drmbk
26146
  { 9545, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e13b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9545 = VPERMI2Drmbkz
26147
  { 9546, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9546 = VPERMI2Drmk
26148
  { 9547, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9547 = VPERMI2Drmkz
26149
  { 9548, 4,  1,  0,  0,  0, 0x80813b78009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #9548 = VPERMI2Drr
26150
  { 9549, 5,  1,  0,  0,  0, 0x80a13b78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #9549 = VPERMI2Drrk
26151
  { 9550, 5,  1,  0,  0,  0, 0x80e13b78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #9550 = VPERMI2Drrkz
26152
  { 9551, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001bbf8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9551 = VPERMI2PD128rm
26153
  { 9552, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101bbf8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9552 = VPERMI2PD128rmb
26154
  { 9553, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121bbf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9553 = VPERMI2PD128rmbk
26155
  { 9554, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161bbf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9554 = VPERMI2PD128rmbkz
26156
  { 9555, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021bbf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9555 = VPERMI2PD128rmk
26157
  { 9556, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061bbf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9556 = VPERMI2PD128rmkz
26158
  { 9557, 4,  1,  0,  0,  0, 0x2001bbf8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #9557 = VPERMI2PD128rr
26159
  { 9558, 5,  1,  0,  0,  0, 0x2021bbf8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #9558 = VPERMI2PD128rrk
26160
  { 9559, 5,  1,  0,  0,  0, 0x2061bbf8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #9559 = VPERMI2PD128rrkz
26161
  { 9560, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009bbf8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9560 = VPERMI2PD256rm
26162
  { 9561, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109bbf8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9561 = VPERMI2PD256rmb
26163
  { 9562, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129bbf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9562 = VPERMI2PD256rmbk
26164
  { 9563, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169bbf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9563 = VPERMI2PD256rmbkz
26165
  { 9564, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029bbf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9564 = VPERMI2PD256rmk
26166
  { 9565, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069bbf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9565 = VPERMI2PD256rmkz
26167
  { 9566, 4,  1,  0,  0,  0, 0x4009bbf8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #9566 = VPERMI2PD256rr
26168
  { 9567, 5,  1,  0,  0,  0, 0x4029bbf8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #9567 = VPERMI2PD256rrk
26169
  { 9568, 5,  1,  0,  0,  0, 0x4069bbf8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #9568 = VPERMI2PD256rrkz
26170
  { 9569, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081bbf8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9569 = VPERMI2PDrm
26171
  { 9570, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181bbf8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9570 = VPERMI2PDrmb
26172
  { 9571, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1bbf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9571 = VPERMI2PDrmbk
26173
  { 9572, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1bbf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9572 = VPERMI2PDrmbkz
26174
  { 9573, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1bbf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9573 = VPERMI2PDrmk
26175
  { 9574, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1bbf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9574 = VPERMI2PDrmkz
26176
  { 9575, 4,  1,  0,  0,  0, 0x8081bbf8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #9575 = VPERMI2PDrr
26177
  { 9576, 5,  1,  0,  0,  0, 0x80a1bbf8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #9576 = VPERMI2PDrrk
26178
  { 9577, 5,  1,  0,  0,  0, 0x80e1bbf8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #9577 = VPERMI2PDrrkz
26179
  { 9578, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013bf8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9578 = VPERMI2PS128rm
26180
  { 9579, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9013bf8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9579 = VPERMI2PS128rmb
26181
  { 9580, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9213bf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9580 = VPERMI2PS128rmbk
26182
  { 9581, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9613bf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9581 = VPERMI2PS128rmbkz
26183
  { 9582, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213bf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9582 = VPERMI2PS128rmk
26184
  { 9583, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613bf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9583 = VPERMI2PS128rmkz
26185
  { 9584, 4,  1,  0,  0,  0, 0x20013bf8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #9584 = VPERMI2PS128rr
26186
  { 9585, 5,  1,  0,  0,  0, 0x20213bf8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #9585 = VPERMI2PS128rrk
26187
  { 9586, 5,  1,  0,  0,  0, 0x20613bf8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #9586 = VPERMI2PS128rrkz
26188
  { 9587, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093bf8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9587 = VPERMI2PS256rm
26189
  { 9588, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9093bf8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9588 = VPERMI2PS256rmb
26190
  { 9589, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9293bf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9589 = VPERMI2PS256rmbk
26191
  { 9590, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9693bf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9590 = VPERMI2PS256rmbkz
26192
  { 9591, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293bf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9591 = VPERMI2PS256rmk
26193
  { 9592, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693bf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9592 = VPERMI2PS256rmkz
26194
  { 9593, 4,  1,  0,  0,  0, 0x40093bf8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #9593 = VPERMI2PS256rr
26195
  { 9594, 5,  1,  0,  0,  0, 0x40293bf8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #9594 = VPERMI2PS256rrk
26196
  { 9595, 5,  1,  0,  0,  0, 0x40693bf8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #9595 = VPERMI2PS256rrkz
26197
  { 9596, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813bf8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9596 = VPERMI2PSrm
26198
  { 9597, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9813bf8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9597 = VPERMI2PSrmb
26199
  { 9598, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a13bf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9598 = VPERMI2PSrmbk
26200
  { 9599, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e13bf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9599 = VPERMI2PSrmbkz
26201
  { 9600, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13bf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9600 = VPERMI2PSrmk
26202
  { 9601, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13bf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9601 = VPERMI2PSrmkz
26203
  { 9602, 4,  1,  0,  0,  0, 0x80813bf8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #9602 = VPERMI2PSrr
26204
  { 9603, 5,  1,  0,  0,  0, 0x80a13bf8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #9603 = VPERMI2PSrrk
26205
  { 9604, 5,  1,  0,  0,  0, 0x80e13bf8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #9604 = VPERMI2PSrrkz
26206
  { 9605, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001bb78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9605 = VPERMI2Q128rm
26207
  { 9606, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101bb78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9606 = VPERMI2Q128rmb
26208
  { 9607, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121bb78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9607 = VPERMI2Q128rmbk
26209
  { 9608, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161bb78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9608 = VPERMI2Q128rmbkz
26210
  { 9609, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021bb78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9609 = VPERMI2Q128rmk
26211
  { 9610, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061bb78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9610 = VPERMI2Q128rmkz
26212
  { 9611, 4,  1,  0,  0,  0, 0x2001bb78009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #9611 = VPERMI2Q128rr
26213
  { 9612, 5,  1,  0,  0,  0, 0x2021bb78009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #9612 = VPERMI2Q128rrk
26214
  { 9613, 5,  1,  0,  0,  0, 0x2061bb78009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #9613 = VPERMI2Q128rrkz
26215
  { 9614, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009bb78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9614 = VPERMI2Q256rm
26216
  { 9615, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109bb78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9615 = VPERMI2Q256rmb
26217
  { 9616, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129bb78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9616 = VPERMI2Q256rmbk
26218
  { 9617, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169bb78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9617 = VPERMI2Q256rmbkz
26219
  { 9618, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029bb78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9618 = VPERMI2Q256rmk
26220
  { 9619, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069bb78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9619 = VPERMI2Q256rmkz
26221
  { 9620, 4,  1,  0,  0,  0, 0x4009bb78009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #9620 = VPERMI2Q256rr
26222
  { 9621, 5,  1,  0,  0,  0, 0x4029bb78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #9621 = VPERMI2Q256rrk
26223
  { 9622, 5,  1,  0,  0,  0, 0x4069bb78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #9622 = VPERMI2Q256rrkz
26224
  { 9623, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081bb78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9623 = VPERMI2Qrm
26225
  { 9624, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181bb78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9624 = VPERMI2Qrmb
26226
  { 9625, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1bb78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9625 = VPERMI2Qrmbk
26227
  { 9626, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1bb78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9626 = VPERMI2Qrmbkz
26228
  { 9627, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1bb78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9627 = VPERMI2Qrmk
26229
  { 9628, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1bb78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9628 = VPERMI2Qrmkz
26230
  { 9629, 4,  1,  0,  0,  0, 0x8081bb78009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #9629 = VPERMI2Qrr
26231
  { 9630, 5,  1,  0,  0,  0, 0x80a1bb78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #9630 = VPERMI2Qrrk
26232
  { 9631, 5,  1,  0,  0,  0, 0x80e1bb78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #9631 = VPERMI2Qrrkz
26233
  { 9632, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001baf8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9632 = VPERMI2W128rm
26234
  { 9633, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021baf8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #9633 = VPERMI2W128rmk
26235
  { 9634, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061baf8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #9634 = VPERMI2W128rmkz
26236
  { 9635, 4,  1,  0,  0,  0, 0x2001baf8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #9635 = VPERMI2W128rr
26237
  { 9636, 5,  1,  0,  0,  0, 0x2021baf8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #9636 = VPERMI2W128rrk
26238
  { 9637, 5,  1,  0,  0,  0, 0x2061baf8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #9637 = VPERMI2W128rrkz
26239
  { 9638, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009baf8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9638 = VPERMI2W256rm
26240
  { 9639, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029baf8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #9639 = VPERMI2W256rmk
26241
  { 9640, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069baf8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #9640 = VPERMI2W256rmkz
26242
  { 9641, 4,  1,  0,  0,  0, 0x4009baf8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #9641 = VPERMI2W256rr
26243
  { 9642, 5,  1,  0,  0,  0, 0x4029baf8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #9642 = VPERMI2W256rrk
26244
  { 9643, 5,  1,  0,  0,  0, 0x4069baf8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #9643 = VPERMI2W256rrkz
26245
  { 9644, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081baf8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9644 = VPERMI2Wrm
26246
  { 9645, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1baf8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #9645 = VPERMI2Wrmk
26247
  { 9646, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1baf8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #9646 = VPERMI2Wrmkz
26248
  { 9647, 4,  1,  0,  0,  0, 0x8081baf8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #9647 = VPERMI2Wrr
26249
  { 9648, 5,  1,  0,  0,  0, 0x80a1baf8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #9648 = VPERMI2Wrrk
26250
  { 9649, 5,  1,  0,  0,  0, 0x80e1baf8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #9649 = VPERMI2Wrrkz
26251
  { 9650, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x524b004d006ULL, nullptr, nullptr, OperandInfo852, -1 ,nullptr },  // Inst #9650 = VPERMIL2PDmr
26252
  { 9651, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0xd24b004d006ULL, nullptr, nullptr, OperandInfo853, -1 ,nullptr },  // Inst #9651 = VPERMIL2PDmrY
26253
  { 9652, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20005a4b004d006ULL, nullptr, nullptr, OperandInfo854, -1 ,nullptr },  // Inst #9652 = VPERMIL2PDrm
26254
  { 9653, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000da4b004d006ULL, nullptr, nullptr, OperandInfo855, -1 ,nullptr },  // Inst #9653 = VPERMIL2PDrmY
26255
  { 9654, 5,  1,  0,  0,  0, 0x524b004d005ULL, nullptr, nullptr, OperandInfo856, -1 ,nullptr },  // Inst #9654 = VPERMIL2PDrr
26256
  { 9655, 5,  1,  0,  0,  0, 0xd24b004d005ULL, nullptr, nullptr, OperandInfo857, -1 ,nullptr },  // Inst #9655 = VPERMIL2PDrrY
26257
  { 9656, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x5242804d006ULL, nullptr, nullptr, OperandInfo852, -1 ,nullptr },  // Inst #9656 = VPERMIL2PSmr
26258
  { 9657, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0xd242804d006ULL, nullptr, nullptr, OperandInfo853, -1 ,nullptr },  // Inst #9657 = VPERMIL2PSmrY
26259
  { 9658, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20005a42804d006ULL, nullptr, nullptr, OperandInfo854, -1 ,nullptr },  // Inst #9658 = VPERMIL2PSrm
26260
  { 9659, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000da42804d006ULL, nullptr, nullptr, OperandInfo855, -1 ,nullptr },  // Inst #9659 = VPERMIL2PSrmY
26261
  { 9660, 5,  1,  0,  0,  0, 0x5242804d005ULL, nullptr, nullptr, OperandInfo856, -1 ,nullptr },  // Inst #9660 = VPERMIL2PSrr
26262
  { 9661, 5,  1,  0,  0,  0, 0xd242804d005ULL, nullptr, nullptr, OperandInfo857, -1 ,nullptr },  // Inst #9661 = VPERMIL2PSrrY
26263
  { 9662, 7,  1,  0,  529,  0|(1ULL<<MCID::MayLoad), 0x802b004d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr },  // Inst #9662 = VPERMILPDYmi
26264
  { 9663, 3,  1,  0,  531,  0, 0x802b004d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #9663 = VPERMILPDYri
26265
  { 9664, 7,  1,  0,  546,  0|(1ULL<<MCID::MayLoad), 0x906b0009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9664 = VPERMILPDYrm
26266
  { 9665, 3,  1,  0,  531,  0, 0x906b0009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9665 = VPERMILPDYrr
26267
  { 9666, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110082f804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #9666 = VPERMILPDZ128mbi
26268
  { 9667, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112082f804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #9667 = VPERMILPDZ128mbik
26269
  { 9668, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116082f804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #9668 = VPERMILPDZ128mbikz
26270
  { 9669, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200082f804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #9669 = VPERMILPDZ128mi
26271
  { 9670, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202082f804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #9670 = VPERMILPDZ128mik
26272
  { 9671, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206082f804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #9671 = VPERMILPDZ128mikz
26273
  { 9672, 3,  1,  0,  0,  0, 0x200082f804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #9672 = VPERMILPDZ128ri
26274
  { 9673, 5,  1,  0,  0,  0, 0x202082f804d005ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr },  // Inst #9673 = VPERMILPDZ128rik
26275
  { 9674, 4,  1,  0,  0,  0, 0x206082f804d005ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr },  // Inst #9674 = VPERMILPDZ128rikz
26276
  { 9675, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200186e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #9675 = VPERMILPDZ128rm
26277
  { 9676, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110186e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #9676 = VPERMILPDZ128rmb
26278
  { 9677, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112186e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9677 = VPERMILPDZ128rmbk
26279
  { 9678, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116186e0009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #9678 = VPERMILPDZ128rmbkz
26280
  { 9679, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202186e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9679 = VPERMILPDZ128rmk
26281
  { 9680, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206186e0009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #9680 = VPERMILPDZ128rmkz
26282
  { 9681, 3,  1,  0,  0,  0, 0x200186e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #9681 = VPERMILPDZ128rr
26283
  { 9682, 5,  1,  0,  0,  0, 0x202186e0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #9682 = VPERMILPDZ128rrk
26284
  { 9683, 4,  1,  0,  0,  0, 0x206186e0009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #9683 = VPERMILPDZ128rrkz
26285
  { 9684, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110882f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #9684 = VPERMILPDZ256mbi
26286
  { 9685, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112882f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #9685 = VPERMILPDZ256mbik
26287
  { 9686, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116882f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #9686 = VPERMILPDZ256mbikz
26288
  { 9687, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400882f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #9687 = VPERMILPDZ256mi
26289
  { 9688, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402882f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #9688 = VPERMILPDZ256mik
26290
  { 9689, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406882f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #9689 = VPERMILPDZ256mikz
26291
  { 9690, 3,  1,  0,  0,  0, 0x400882f804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #9690 = VPERMILPDZ256ri
26292
  { 9691, 5,  1,  0,  0,  0, 0x402882f804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr },  // Inst #9691 = VPERMILPDZ256rik
26293
  { 9692, 4,  1,  0,  0,  0, 0x406882f804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr },  // Inst #9692 = VPERMILPDZ256rikz
26294
  { 9693, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400986e0009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9693 = VPERMILPDZ256rm
26295
  { 9694, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110986e0009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9694 = VPERMILPDZ256rmb
26296
  { 9695, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112986e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9695 = VPERMILPDZ256rmbk
26297
  { 9696, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116986e0009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #9696 = VPERMILPDZ256rmbkz
26298
  { 9697, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402986e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9697 = VPERMILPDZ256rmk
26299
  { 9698, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406986e0009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #9698 = VPERMILPDZ256rmkz
26300
  { 9699, 3,  1,  0,  0,  0, 0x400986e0009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #9699 = VPERMILPDZ256rr
26301
  { 9700, 5,  1,  0,  0,  0, 0x402986e0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #9700 = VPERMILPDZ256rrk
26302
  { 9701, 4,  1,  0,  0,  0, 0x406986e0009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #9701 = VPERMILPDZ256rrkz
26303
  { 9702, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x118082f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #9702 = VPERMILPDZmbi
26304
  { 9703, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a082f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #9703 = VPERMILPDZmbik
26305
  { 9704, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e082f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #9704 = VPERMILPDZmbikz
26306
  { 9705, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808082f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #9705 = VPERMILPDZmi
26307
  { 9706, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a082f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #9706 = VPERMILPDZmik
26308
  { 9707, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e082f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #9707 = VPERMILPDZmikz
26309
  { 9708, 3,  1,  0,  0,  0, 0x808082f804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #9708 = VPERMILPDZri
26310
  { 9709, 5,  1,  0,  0,  0, 0x80a082f804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #9709 = VPERMILPDZrik
26311
  { 9710, 4,  1,  0,  0,  0, 0x80e082f804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #9710 = VPERMILPDZrikz
26312
  { 9711, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808186e0009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9711 = VPERMILPDZrm
26313
  { 9712, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x118186e0009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9712 = VPERMILPDZrmb
26314
  { 9713, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a186e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9713 = VPERMILPDZrmbk
26315
  { 9714, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e186e0009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #9714 = VPERMILPDZrmbkz
26316
  { 9715, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a186e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9715 = VPERMILPDZrmk
26317
  { 9716, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e186e0009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #9716 = VPERMILPDZrmkz
26318
  { 9717, 3,  1,  0,  0,  0, 0x808186e0009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #9717 = VPERMILPDZrr
26319
  { 9718, 5,  1,  0,  0,  0, 0x80a186e0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #9718 = VPERMILPDZrrk
26320
  { 9719, 4,  1,  0,  0,  0, 0x80e186e0009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #9719 = VPERMILPDZrrkz
26321
  { 9720, 7,  1,  0,  529,  0|(1ULL<<MCID::MayLoad), 0x2b004d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #9720 = VPERMILPDmi
26322
  { 9721, 3,  1,  0,  531,  0, 0x2b004d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #9721 = VPERMILPDri
26323
  { 9722, 7,  1,  0,  546,  0|(1ULL<<MCID::MayLoad), 0x106b0009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #9722 = VPERMILPDrm
26324
  { 9723, 3,  1,  0,  531,  0, 0x106b0009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #9723 = VPERMILPDrr
26325
  { 9724, 7,  1,  0,  529,  0|(1ULL<<MCID::MayLoad), 0x8022804d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr },  // Inst #9724 = VPERMILPSYmi
26326
  { 9725, 3,  1,  0,  531,  0, 0x8022804d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #9725 = VPERMILPSYri
26327
  { 9726, 7,  1,  0,  546,  0|(1ULL<<MCID::MayLoad), 0x90628009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9726 = VPERMILPSYrm
26328
  { 9727, 3,  1,  0,  531,  0, 0x90628009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9727 = VPERMILPSYrr
26329
  { 9728, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x900027804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #9728 = VPERMILPSZ128mbi
26330
  { 9729, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x920027804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #9729 = VPERMILPSZ128mbik
26331
  { 9730, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x960027804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #9730 = VPERMILPSZ128mbikz
26332
  { 9731, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000027804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #9731 = VPERMILPSZ128mi
26333
  { 9732, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020027804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #9732 = VPERMILPSZ128mik
26334
  { 9733, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060027804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #9733 = VPERMILPSZ128mikz
26335
  { 9734, 3,  1,  0,  0,  0, 0x2000027804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #9734 = VPERMILPSZ128ri
26336
  { 9735, 5,  1,  0,  0,  0, 0x2020027804d005ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr },  // Inst #9735 = VPERMILPSZ128rik
26337
  { 9736, 4,  1,  0,  0,  0, 0x2060027804d005ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr },  // Inst #9736 = VPERMILPSZ128rikz
26338
  { 9737, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20010660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #9737 = VPERMILPSZ128rm
26339
  { 9738, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9010660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #9738 = VPERMILPSZ128rmb
26340
  { 9739, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9210660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9739 = VPERMILPSZ128rmbk
26341
  { 9740, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9610660009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #9740 = VPERMILPSZ128rmbkz
26342
  { 9741, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20210660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9741 = VPERMILPSZ128rmk
26343
  { 9742, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20610660009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #9742 = VPERMILPSZ128rmkz
26344
  { 9743, 3,  1,  0,  0,  0, 0x20010660009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #9743 = VPERMILPSZ128rr
26345
  { 9744, 5,  1,  0,  0,  0, 0x20210660009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #9744 = VPERMILPSZ128rrk
26346
  { 9745, 4,  1,  0,  0,  0, 0x20610660009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #9745 = VPERMILPSZ128rrkz
26347
  { 9746, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x908027804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #9746 = VPERMILPSZ256mbi
26348
  { 9747, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x928027804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #9747 = VPERMILPSZ256mbik
26349
  { 9748, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x968027804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #9748 = VPERMILPSZ256mbikz
26350
  { 9749, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008027804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #9749 = VPERMILPSZ256mi
26351
  { 9750, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028027804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #9750 = VPERMILPSZ256mik
26352
  { 9751, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068027804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #9751 = VPERMILPSZ256mikz
26353
  { 9752, 3,  1,  0,  0,  0, 0x4008027804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #9752 = VPERMILPSZ256ri
26354
  { 9753, 5,  1,  0,  0,  0, 0x4028027804d005ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr },  // Inst #9753 = VPERMILPSZ256rik
26355
  { 9754, 4,  1,  0,  0,  0, 0x4068027804d005ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr },  // Inst #9754 = VPERMILPSZ256rikz
26356
  { 9755, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40090660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9755 = VPERMILPSZ256rm
26357
  { 9756, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9090660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9756 = VPERMILPSZ256rmb
26358
  { 9757, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9290660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9757 = VPERMILPSZ256rmbk
26359
  { 9758, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9690660009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #9758 = VPERMILPSZ256rmbkz
26360
  { 9759, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40290660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9759 = VPERMILPSZ256rmk
26361
  { 9760, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40690660009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #9760 = VPERMILPSZ256rmkz
26362
  { 9761, 3,  1,  0,  0,  0, 0x40090660009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #9761 = VPERMILPSZ256rr
26363
  { 9762, 5,  1,  0,  0,  0, 0x40290660009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #9762 = VPERMILPSZ256rrk
26364
  { 9763, 4,  1,  0,  0,  0, 0x40690660009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #9763 = VPERMILPSZ256rrkz
26365
  { 9764, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x980027804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #9764 = VPERMILPSZmbi
26366
  { 9765, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a0027804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #9765 = VPERMILPSZmbik
26367
  { 9766, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e0027804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #9766 = VPERMILPSZmbikz
26368
  { 9767, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080027804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #9767 = VPERMILPSZmi
26369
  { 9768, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0027804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #9768 = VPERMILPSZmik
26370
  { 9769, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0027804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #9769 = VPERMILPSZmikz
26371
  { 9770, 3,  1,  0,  0,  0, 0x8080027804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #9770 = VPERMILPSZri
26372
  { 9771, 5,  1,  0,  0,  0, 0x80a0027804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #9771 = VPERMILPSZrik
26373
  { 9772, 4,  1,  0,  0,  0, 0x80e0027804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #9772 = VPERMILPSZrikz
26374
  { 9773, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80810660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9773 = VPERMILPSZrm
26375
  { 9774, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9810660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9774 = VPERMILPSZrmb
26376
  { 9775, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a10660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9775 = VPERMILPSZrmbk
26377
  { 9776, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e10660009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #9776 = VPERMILPSZrmbkz
26378
  { 9777, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a10660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9777 = VPERMILPSZrmk
26379
  { 9778, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e10660009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #9778 = VPERMILPSZrmkz
26380
  { 9779, 3,  1,  0,  0,  0, 0x80810660009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #9779 = VPERMILPSZrr
26381
  { 9780, 5,  1,  0,  0,  0, 0x80a10660009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #9780 = VPERMILPSZrrk
26382
  { 9781, 4,  1,  0,  0,  0, 0x80e10660009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #9781 = VPERMILPSZrrkz
26383
  { 9782, 7,  1,  0,  529,  0|(1ULL<<MCID::MayLoad), 0x22804d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #9782 = VPERMILPSmi
26384
  { 9783, 3,  1,  0,  531,  0, 0x22804d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #9783 = VPERMILPSri
26385
  { 9784, 7,  1,  0,  546,  0|(1ULL<<MCID::MayLoad), 0x10628009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #9784 = VPERMILPSrm
26386
  { 9785, 3,  1,  0,  531,  0, 0x10628009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #9785 = VPERMILPSrr
26387
  { 9786, 7,  1,  0,  569,  0|(1ULL<<MCID::MayLoad), 0x880b004d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr },  // Inst #9786 = VPERMPDYmi
26388
  { 9787, 3,  1,  0,  530,  0, 0x880b004d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #9787 = VPERMPDYri
26389
  { 9788, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110880f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #9788 = VPERMPDZ256mbi
26390
  { 9789, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112880f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #9789 = VPERMPDZ256mbik
26391
  { 9790, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116880f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #9790 = VPERMPDZ256mbikz
26392
  { 9791, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400880f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #9791 = VPERMPDZ256mi
26393
  { 9792, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402880f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #9792 = VPERMPDZ256mik
26394
  { 9793, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406880f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #9793 = VPERMPDZ256mikz
26395
  { 9794, 3,  1,  0,  0,  0, 0x400880f804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #9794 = VPERMPDZ256ri
26396
  { 9795, 5,  1,  0,  0,  0, 0x402880f804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr },  // Inst #9795 = VPERMPDZ256rik
26397
  { 9796, 4,  1,  0,  0,  0, 0x406880f804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr },  // Inst #9796 = VPERMPDZ256rikz
26398
  { 9797, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40098b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9797 = VPERMPDZ256rm
26399
  { 9798, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11098b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9798 = VPERMPDZ256rmb
26400
  { 9799, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11298b78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9799 = VPERMPDZ256rmbk
26401
  { 9800, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11698b78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #9800 = VPERMPDZ256rmbkz
26402
  { 9801, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40298b78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9801 = VPERMPDZ256rmk
26403
  { 9802, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40698b78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #9802 = VPERMPDZ256rmkz
26404
  { 9803, 3,  1,  0,  0,  0, 0x40098b78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #9803 = VPERMPDZ256rr
26405
  { 9804, 5,  1,  0,  0,  0, 0x40298b78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #9804 = VPERMPDZ256rrk
26406
  { 9805, 4,  1,  0,  0,  0, 0x40698b78009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #9805 = VPERMPDZ256rrkz
26407
  { 9806, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x118080f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #9806 = VPERMPDZmbi
26408
  { 9807, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a080f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #9807 = VPERMPDZmbik
26409
  { 9808, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e080f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #9808 = VPERMPDZmbikz
26410
  { 9809, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808080f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #9809 = VPERMPDZmi
26411
  { 9810, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a080f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #9810 = VPERMPDZmik
26412
  { 9811, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e080f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #9811 = VPERMPDZmikz
26413
  { 9812, 3,  1,  0,  0,  0, 0x808080f804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #9812 = VPERMPDZri
26414
  { 9813, 5,  1,  0,  0,  0, 0x80a080f804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #9813 = VPERMPDZrik
26415
  { 9814, 4,  1,  0,  0,  0, 0x80e080f804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #9814 = VPERMPDZrikz
26416
  { 9815, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80818b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9815 = VPERMPDZrm
26417
  { 9816, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11818b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9816 = VPERMPDZrmb
26418
  { 9817, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a18b78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9817 = VPERMPDZrmbk
26419
  { 9818, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e18b78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #9818 = VPERMPDZrmbkz
26420
  { 9819, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a18b78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9819 = VPERMPDZrmk
26421
  { 9820, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e18b78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #9820 = VPERMPDZrmkz
26422
  { 9821, 3,  1,  0,  0,  0, 0x80818b78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #9821 = VPERMPDZrr
26423
  { 9822, 5,  1,  0,  0,  0, 0x80a18b78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #9822 = VPERMPDZrrk
26424
  { 9823, 4,  1,  0,  0,  0, 0x80e18b78009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #9823 = VPERMPDZrrkz
26425
  { 9824, 7,  1,  0,  569,  0|(1ULL<<MCID::MayLoad), 0x90b28009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #9824 = VPERMPSYrm
26426
  { 9825, 3,  1,  0,  530,  0, 0x90b28009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #9825 = VPERMPSYrr
26427
  { 9826, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40090b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9826 = VPERMPSZ256rm
26428
  { 9827, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9090b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9827 = VPERMPSZ256rmb
26429
  { 9828, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9290b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9828 = VPERMPSZ256rmbk
26430
  { 9829, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9690b78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #9829 = VPERMPSZ256rmbkz
26431
  { 9830, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40290b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9830 = VPERMPSZ256rmk
26432
  { 9831, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40690b78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #9831 = VPERMPSZ256rmkz
26433
  { 9832, 3,  1,  0,  0,  0, 0x40090b78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #9832 = VPERMPSZ256rr
26434
  { 9833, 5,  1,  0,  0,  0, 0x40290b78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #9833 = VPERMPSZ256rrk
26435
  { 9834, 4,  1,  0,  0,  0, 0x40690b78009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #9834 = VPERMPSZ256rrkz
26436
  { 9835, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80810b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9835 = VPERMPSZrm
26437
  { 9836, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9810b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9836 = VPERMPSZrmb
26438
  { 9837, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a10b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9837 = VPERMPSZrmbk
26439
  { 9838, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e10b78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #9838 = VPERMPSZrmbkz
26440
  { 9839, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a10b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9839 = VPERMPSZrmk
26441
  { 9840, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e10b78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #9840 = VPERMPSZrmkz
26442
  { 9841, 3,  1,  0,  0,  0, 0x80810b78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #9841 = VPERMPSZrr
26443
  { 9842, 5,  1,  0,  0,  0, 0x80a10b78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #9842 = VPERMPSZrrk
26444
  { 9843, 4,  1,  0,  0,  0, 0x80e10b78009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #9843 = VPERMPSZrrkz
26445
  { 9844, 7,  1,  0,  547,  0|(1ULL<<MCID::MayLoad), 0x8803804d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr },  // Inst #9844 = VPERMQYmi
26446
  { 9845, 3,  1,  0,  544,  0, 0x8803804d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #9845 = VPERMQYri
26447
  { 9846, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108807804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #9846 = VPERMQZ256mbi
26448
  { 9847, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128807804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #9847 = VPERMQZ256mbik
26449
  { 9848, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168807804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #9848 = VPERMQZ256mbikz
26450
  { 9849, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008807804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #9849 = VPERMQZ256mi
26451
  { 9850, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028807804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #9850 = VPERMQZ256mik
26452
  { 9851, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068807804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #9851 = VPERMQZ256mikz
26453
  { 9852, 3,  1,  0,  0,  0, 0x4008807804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #9852 = VPERMQZ256ri
26454
  { 9853, 5,  1,  0,  0,  0, 0x4028807804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr },  // Inst #9853 = VPERMQZ256rik
26455
  { 9854, 4,  1,  0,  0,  0, 0x4068807804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr },  // Inst #9854 = VPERMQZ256rikz
26456
  { 9855, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40099b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9855 = VPERMQZ256rm
26457
  { 9856, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11099b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #9856 = VPERMQZ256rmb
26458
  { 9857, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11299b78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9857 = VPERMQZ256rmbk
26459
  { 9858, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11699b78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #9858 = VPERMQZ256rmbkz
26460
  { 9859, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40299b78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9859 = VPERMQZ256rmk
26461
  { 9860, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40699b78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #9860 = VPERMQZ256rmkz
26462
  { 9861, 3,  1,  0,  0,  0, 0x40099b78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #9861 = VPERMQZ256rr
26463
  { 9862, 5,  1,  0,  0,  0, 0x40299b78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #9862 = VPERMQZ256rrk
26464
  { 9863, 4,  1,  0,  0,  0, 0x40699b78009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #9863 = VPERMQZ256rrkz
26465
  { 9864, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180807804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #9864 = VPERMQZmbi
26466
  { 9865, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0807804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #9865 = VPERMQZmbik
26467
  { 9866, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0807804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #9866 = VPERMQZmbikz
26468
  { 9867, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080807804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #9867 = VPERMQZmi
26469
  { 9868, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0807804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #9868 = VPERMQZmik
26470
  { 9869, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0807804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #9869 = VPERMQZmikz
26471
  { 9870, 3,  1,  0,  0,  0, 0x8080807804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #9870 = VPERMQZri
26472
  { 9871, 5,  1,  0,  0,  0, 0x80a0807804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #9871 = VPERMQZrik
26473
  { 9872, 4,  1,  0,  0,  0, 0x80e0807804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #9872 = VPERMQZrikz
26474
  { 9873, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80819b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9873 = VPERMQZrm
26475
  { 9874, 7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11819b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #9874 = VPERMQZrmb
26476
  { 9875, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a19b78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9875 = VPERMQZrmbk
26477
  { 9876, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e19b78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #9876 = VPERMQZrmbkz
26478
  { 9877, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a19b78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9877 = VPERMQZrmk
26479
  { 9878, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e19b78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #9878 = VPERMQZrmkz
26480
  { 9879, 3,  1,  0,  0,  0, 0x80819b78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #9879 = VPERMQZrr
26481
  { 9880, 5,  1,  0,  0,  0, 0x80a19b78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #9880 = VPERMQZrrk
26482
  { 9881, 4,  1,  0,  0,  0, 0x80e19b78009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #9881 = VPERMQZrrkz
26483
  { 9882, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013ef8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9882 = VPERMT2B128rm
26484
  { 9883, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213ef8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #9883 = VPERMT2B128rmk
26485
  { 9884, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613ef8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #9884 = VPERMT2B128rmkz
26486
  { 9885, 4,  1,  0,  0,  0, 0x20013ef8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #9885 = VPERMT2B128rr
26487
  { 9886, 5,  1,  0,  0,  0, 0x20213ef8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #9886 = VPERMT2B128rrk
26488
  { 9887, 5,  1,  0,  0,  0, 0x20613ef8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #9887 = VPERMT2B128rrkz
26489
  { 9888, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093ef8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9888 = VPERMT2B256rm
26490
  { 9889, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293ef8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #9889 = VPERMT2B256rmk
26491
  { 9890, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693ef8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #9890 = VPERMT2B256rmkz
26492
  { 9891, 4,  1,  0,  0,  0, 0x40093ef8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #9891 = VPERMT2B256rr
26493
  { 9892, 5,  1,  0,  0,  0, 0x40293ef8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #9892 = VPERMT2B256rrk
26494
  { 9893, 5,  1,  0,  0,  0, 0x40693ef8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #9893 = VPERMT2B256rrkz
26495
  { 9894, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813ef8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9894 = VPERMT2Brm
26496
  { 9895, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13ef8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #9895 = VPERMT2Brmk
26497
  { 9896, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13ef8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #9896 = VPERMT2Brmkz
26498
  { 9897, 4,  1,  0,  0,  0, 0x80813ef8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #9897 = VPERMT2Brr
26499
  { 9898, 5,  1,  0,  0,  0, 0x80a13ef8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #9898 = VPERMT2Brrk
26500
  { 9899, 5,  1,  0,  0,  0, 0x80e13ef8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #9899 = VPERMT2Brrkz
26501
  { 9900, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013f78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9900 = VPERMT2D128rm
26502
  { 9901, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9013f78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9901 = VPERMT2D128rmb
26503
  { 9902, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9213f78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9902 = VPERMT2D128rmbk
26504
  { 9903, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9613f78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9903 = VPERMT2D128rmbkz
26505
  { 9904, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213f78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9904 = VPERMT2D128rmk
26506
  { 9905, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613f78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9905 = VPERMT2D128rmkz
26507
  { 9906, 4,  1,  0,  0,  0, 0x20013f78009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #9906 = VPERMT2D128rr
26508
  { 9907, 5,  1,  0,  0,  0, 0x20213f78009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #9907 = VPERMT2D128rrk
26509
  { 9908, 5,  1,  0,  0,  0, 0x20613f78009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #9908 = VPERMT2D128rrkz
26510
  { 9909, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093f78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9909 = VPERMT2D256rm
26511
  { 9910, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9093f78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9910 = VPERMT2D256rmb
26512
  { 9911, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9293f78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9911 = VPERMT2D256rmbk
26513
  { 9912, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9693f78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9912 = VPERMT2D256rmbkz
26514
  { 9913, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293f78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9913 = VPERMT2D256rmk
26515
  { 9914, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693f78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9914 = VPERMT2D256rmkz
26516
  { 9915, 4,  1,  0,  0,  0, 0x40093f78009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #9915 = VPERMT2D256rr
26517
  { 9916, 5,  1,  0,  0,  0, 0x40293f78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #9916 = VPERMT2D256rrk
26518
  { 9917, 5,  1,  0,  0,  0, 0x40693f78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #9917 = VPERMT2D256rrkz
26519
  { 9918, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813f78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9918 = VPERMT2Drm
26520
  { 9919, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9813f78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9919 = VPERMT2Drmb
26521
  { 9920, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a13f78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9920 = VPERMT2Drmbk
26522
  { 9921, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e13f78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9921 = VPERMT2Drmbkz
26523
  { 9922, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13f78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9922 = VPERMT2Drmk
26524
  { 9923, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13f78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9923 = VPERMT2Drmkz
26525
  { 9924, 4,  1,  0,  0,  0, 0x80813f78009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #9924 = VPERMT2Drr
26526
  { 9925, 5,  1,  0,  0,  0, 0x80a13f78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #9925 = VPERMT2Drrk
26527
  { 9926, 5,  1,  0,  0,  0, 0x80e13f78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #9926 = VPERMT2Drrkz
26528
  { 9927, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001bff8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9927 = VPERMT2PD128rm
26529
  { 9928, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101bff8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9928 = VPERMT2PD128rmb
26530
  { 9929, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121bff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9929 = VPERMT2PD128rmbk
26531
  { 9930, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161bff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9930 = VPERMT2PD128rmbkz
26532
  { 9931, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021bff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9931 = VPERMT2PD128rmk
26533
  { 9932, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061bff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9932 = VPERMT2PD128rmkz
26534
  { 9933, 4,  1,  0,  0,  0, 0x2001bff8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #9933 = VPERMT2PD128rr
26535
  { 9934, 5,  1,  0,  0,  0, 0x2021bff8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #9934 = VPERMT2PD128rrk
26536
  { 9935, 5,  1,  0,  0,  0, 0x2061bff8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #9935 = VPERMT2PD128rrkz
26537
  { 9936, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009bff8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9936 = VPERMT2PD256rm
26538
  { 9937, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109bff8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9937 = VPERMT2PD256rmb
26539
  { 9938, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129bff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9938 = VPERMT2PD256rmbk
26540
  { 9939, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169bff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9939 = VPERMT2PD256rmbkz
26541
  { 9940, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029bff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9940 = VPERMT2PD256rmk
26542
  { 9941, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069bff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9941 = VPERMT2PD256rmkz
26543
  { 9942, 4,  1,  0,  0,  0, 0x4009bff8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #9942 = VPERMT2PD256rr
26544
  { 9943, 5,  1,  0,  0,  0, 0x4029bff8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #9943 = VPERMT2PD256rrk
26545
  { 9944, 5,  1,  0,  0,  0, 0x4069bff8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #9944 = VPERMT2PD256rrkz
26546
  { 9945, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081bff8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9945 = VPERMT2PDrm
26547
  { 9946, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181bff8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9946 = VPERMT2PDrmb
26548
  { 9947, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1bff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9947 = VPERMT2PDrmbk
26549
  { 9948, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1bff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9948 = VPERMT2PDrmbkz
26550
  { 9949, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1bff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9949 = VPERMT2PDrmk
26551
  { 9950, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1bff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #9950 = VPERMT2PDrmkz
26552
  { 9951, 4,  1,  0,  0,  0, 0x8081bff8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #9951 = VPERMT2PDrr
26553
  { 9952, 5,  1,  0,  0,  0, 0x80a1bff8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #9952 = VPERMT2PDrrk
26554
  { 9953, 5,  1,  0,  0,  0, 0x80e1bff8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #9953 = VPERMT2PDrrkz
26555
  { 9954, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013ff8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9954 = VPERMT2PS128rm
26556
  { 9955, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9013ff8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9955 = VPERMT2PS128rmb
26557
  { 9956, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9213ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9956 = VPERMT2PS128rmbk
26558
  { 9957, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9613ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9957 = VPERMT2PS128rmbkz
26559
  { 9958, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9958 = VPERMT2PS128rmk
26560
  { 9959, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #9959 = VPERMT2PS128rmkz
26561
  { 9960, 4,  1,  0,  0,  0, 0x20013ff8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #9960 = VPERMT2PS128rr
26562
  { 9961, 5,  1,  0,  0,  0, 0x20213ff8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #9961 = VPERMT2PS128rrk
26563
  { 9962, 5,  1,  0,  0,  0, 0x20613ff8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #9962 = VPERMT2PS128rrkz
26564
  { 9963, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093ff8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9963 = VPERMT2PS256rm
26565
  { 9964, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9093ff8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9964 = VPERMT2PS256rmb
26566
  { 9965, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9293ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9965 = VPERMT2PS256rmbk
26567
  { 9966, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9693ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9966 = VPERMT2PS256rmbkz
26568
  { 9967, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9967 = VPERMT2PS256rmk
26569
  { 9968, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #9968 = VPERMT2PS256rmkz
26570
  { 9969, 4,  1,  0,  0,  0, 0x40093ff8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #9969 = VPERMT2PS256rr
26571
  { 9970, 5,  1,  0,  0,  0, 0x40293ff8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #9970 = VPERMT2PS256rrk
26572
  { 9971, 5,  1,  0,  0,  0, 0x40693ff8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #9971 = VPERMT2PS256rrkz
26573
  { 9972, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813ff8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9972 = VPERMT2PSrm
26574
  { 9973, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9813ff8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9973 = VPERMT2PSrmb
26575
  { 9974, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a13ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9974 = VPERMT2PSrmbk
26576
  { 9975, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e13ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9975 = VPERMT2PSrmbkz
26577
  { 9976, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9976 = VPERMT2PSrmk
26578
  { 9977, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #9977 = VPERMT2PSrmkz
26579
  { 9978, 4,  1,  0,  0,  0, 0x80813ff8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #9978 = VPERMT2PSrr
26580
  { 9979, 5,  1,  0,  0,  0, 0x80a13ff8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #9979 = VPERMT2PSrrk
26581
  { 9980, 5,  1,  0,  0,  0, 0x80e13ff8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #9980 = VPERMT2PSrrkz
26582
  { 9981, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001bf78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9981 = VPERMT2Q128rm
26583
  { 9982, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101bf78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #9982 = VPERMT2Q128rmb
26584
  { 9983, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121bf78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9983 = VPERMT2Q128rmbk
26585
  { 9984, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161bf78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9984 = VPERMT2Q128rmbkz
26586
  { 9985, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021bf78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9985 = VPERMT2Q128rmk
26587
  { 9986, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061bf78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #9986 = VPERMT2Q128rmkz
26588
  { 9987, 4,  1,  0,  0,  0, 0x2001bf78009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #9987 = VPERMT2Q128rr
26589
  { 9988, 5,  1,  0,  0,  0, 0x2021bf78009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #9988 = VPERMT2Q128rrk
26590
  { 9989, 5,  1,  0,  0,  0, 0x2061bf78009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #9989 = VPERMT2Q128rrkz
26591
  { 9990, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009bf78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9990 = VPERMT2Q256rm
26592
  { 9991, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109bf78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #9991 = VPERMT2Q256rmb
26593
  { 9992, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129bf78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9992 = VPERMT2Q256rmbk
26594
  { 9993, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169bf78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9993 = VPERMT2Q256rmbkz
26595
  { 9994, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029bf78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9994 = VPERMT2Q256rmk
26596
  { 9995, 9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069bf78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #9995 = VPERMT2Q256rmkz
26597
  { 9996, 4,  1,  0,  0,  0, 0x4009bf78009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #9996 = VPERMT2Q256rr
26598
  { 9997, 5,  1,  0,  0,  0, 0x4029bf78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #9997 = VPERMT2Q256rrk
26599
  { 9998, 5,  1,  0,  0,  0, 0x4069bf78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #9998 = VPERMT2Q256rrkz
26600
  { 9999, 8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081bf78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #9999 = VPERMT2Qrm
26601
  { 10000,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181bf78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #10000 = VPERMT2Qrmb
26602
  { 10001,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1bf78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10001 = VPERMT2Qrmbk
26603
  { 10002,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1bf78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10002 = VPERMT2Qrmbkz
26604
  { 10003,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1bf78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10003 = VPERMT2Qrmk
26605
  { 10004,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1bf78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10004 = VPERMT2Qrmkz
26606
  { 10005,  4,  1,  0,  0,  0, 0x8081bf78009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #10005 = VPERMT2Qrr
26607
  { 10006,  5,  1,  0,  0,  0, 0x80a1bf78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #10006 = VPERMT2Qrrk
26608
  { 10007,  5,  1,  0,  0,  0, 0x80e1bf78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #10007 = VPERMT2Qrrkz
26609
  { 10008,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001bef8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #10008 = VPERMT2W128rm
26610
  { 10009,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021bef8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #10009 = VPERMT2W128rmk
26611
  { 10010,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061bef8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #10010 = VPERMT2W128rmkz
26612
  { 10011,  4,  1,  0,  0,  0, 0x2001bef8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #10011 = VPERMT2W128rr
26613
  { 10012,  5,  1,  0,  0,  0, 0x2021bef8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #10012 = VPERMT2W128rrk
26614
  { 10013,  5,  1,  0,  0,  0, 0x2061bef8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #10013 = VPERMT2W128rrkz
26615
  { 10014,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009bef8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #10014 = VPERMT2W256rm
26616
  { 10015,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029bef8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #10015 = VPERMT2W256rmk
26617
  { 10016,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069bef8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #10016 = VPERMT2W256rmkz
26618
  { 10017,  4,  1,  0,  0,  0, 0x4009bef8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #10017 = VPERMT2W256rr
26619
  { 10018,  5,  1,  0,  0,  0, 0x4029bef8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #10018 = VPERMT2W256rrk
26620
  { 10019,  5,  1,  0,  0,  0, 0x4069bef8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #10019 = VPERMT2W256rrkz
26621
  { 10020,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081bef8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #10020 = VPERMT2Wrm
26622
  { 10021,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1bef8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #10021 = VPERMT2Wrmk
26623
  { 10022,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1bef8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #10022 = VPERMT2Wrmkz
26624
  { 10023,  4,  1,  0,  0,  0, 0x8081bef8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #10023 = VPERMT2Wrr
26625
  { 10024,  5,  1,  0,  0,  0, 0x80a1bef8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #10024 = VPERMT2Wrrk
26626
  { 10025,  5,  1,  0,  0,  0, 0x80e1bef8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #10025 = VPERMT2Wrrkz
26627
  { 10026,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001c6f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10026 = VPERMWZ128rm
26628
  { 10027,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021c6f8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #10027 = VPERMWZ128rmk
26629
  { 10028,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061c6f8009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #10028 = VPERMWZ128rmkz
26630
  { 10029,  3,  1,  0,  0,  0, 0x2001c6f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10029 = VPERMWZ128rr
26631
  { 10030,  5,  1,  0,  0,  0, 0x2021c6f8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #10030 = VPERMWZ128rrk
26632
  { 10031,  4,  1,  0,  0,  0, 0x2061c6f8009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #10031 = VPERMWZ128rrkz
26633
  { 10032,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009c6f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10032 = VPERMWZ256rm
26634
  { 10033,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029c6f8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #10033 = VPERMWZ256rmk
26635
  { 10034,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069c6f8009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #10034 = VPERMWZ256rmkz
26636
  { 10035,  3,  1,  0,  0,  0, 0x4009c6f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10035 = VPERMWZ256rr
26637
  { 10036,  5,  1,  0,  0,  0, 0x4029c6f8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #10036 = VPERMWZ256rrk
26638
  { 10037,  4,  1,  0,  0,  0, 0x4069c6f8009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #10037 = VPERMWZ256rrkz
26639
  { 10038,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081c6f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10038 = VPERMWZrm
26640
  { 10039,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1c6f8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #10039 = VPERMWZrmk
26641
  { 10040,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1c6f8009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #10040 = VPERMWZrmkz
26642
  { 10041,  3,  1,  0,  0,  0, 0x8081c6f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10041 = VPERMWZrr
26643
  { 10042,  5,  1,  0,  0,  0, 0x80a1c6f8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #10042 = VPERMWZrrk
26644
  { 10043,  4,  1,  0,  0,  0, 0x80e1c6f8009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #10043 = VPERMWZrrkz
26645
  { 10044,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80044f8009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #10044 = VPEXPANDDZ128rm
26646
  { 10045,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82044f8009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #10045 = VPEXPANDDZ128rmk
26647
  { 10046,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x86044f8009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #10046 = VPEXPANDDZ128rmkz
26648
  { 10047,  2,  1,  0,  0,  0, 0x200044f8009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10047 = VPEXPANDDZ128rr
26649
  { 10048,  4,  1,  0,  0,  0, 0x202044f8009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #10048 = VPEXPANDDZ128rrk
26650
  { 10049,  3,  1,  0,  0,  0, 0x206044f8009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #10049 = VPEXPANDDZ128rrkz
26651
  { 10050,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80844f8009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #10050 = VPEXPANDDZ256rm
26652
  { 10051,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82844f8009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #10051 = VPEXPANDDZ256rmk
26653
  { 10052,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x86844f8009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #10052 = VPEXPANDDZ256rmkz
26654
  { 10053,  2,  1,  0,  0,  0, 0x400844f8009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #10053 = VPEXPANDDZ256rr
26655
  { 10054,  4,  1,  0,  0,  0, 0x402844f8009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #10054 = VPEXPANDDZ256rrk
26656
  { 10055,  3,  1,  0,  0,  0, 0x406844f8009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #10055 = VPEXPANDDZ256rrkz
26657
  { 10056,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x88044f8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #10056 = VPEXPANDDZrm
26658
  { 10057,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8a044f8009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #10057 = VPEXPANDDZrmk
26659
  { 10058,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8e044f8009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #10058 = VPEXPANDDZrmkz
26660
  { 10059,  2,  1,  0,  0,  0, 0x808044f8009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #10059 = VPEXPANDDZrr
26661
  { 10060,  4,  1,  0,  0,  0, 0x80a044f8009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #10060 = VPEXPANDDZrrk
26662
  { 10061,  3,  1,  0,  0,  0, 0x80e044f8009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #10061 = VPEXPANDDZrrkz
26663
  { 10062,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1000c4f8009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #10062 = VPEXPANDQZ128rm
26664
  { 10063,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1020c4f8009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #10063 = VPEXPANDQZ128rmk
26665
  { 10064,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1060c4f8009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #10064 = VPEXPANDQZ128rmkz
26666
  { 10065,  2,  1,  0,  0,  0, 0x2000c4f8009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10065 = VPEXPANDQZ128rr
26667
  { 10066,  4,  1,  0,  0,  0, 0x2020c4f8009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #10066 = VPEXPANDQZ128rrk
26668
  { 10067,  3,  1,  0,  0,  0, 0x2060c4f8009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #10067 = VPEXPANDQZ128rrkz
26669
  { 10068,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1008c4f8009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #10068 = VPEXPANDQZ256rm
26670
  { 10069,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1028c4f8009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #10069 = VPEXPANDQZ256rmk
26671
  { 10070,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1068c4f8009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #10070 = VPEXPANDQZ256rmkz
26672
  { 10071,  2,  1,  0,  0,  0, 0x4008c4f8009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #10071 = VPEXPANDQZ256rr
26673
  { 10072,  4,  1,  0,  0,  0, 0x4028c4f8009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #10072 = VPEXPANDQZ256rrk
26674
  { 10073,  3,  1,  0,  0,  0, 0x4068c4f8009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #10073 = VPEXPANDQZ256rrkz
26675
  { 10074,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1080c4f8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #10074 = VPEXPANDQZrm
26676
  { 10075,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a0c4f8009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #10075 = VPEXPANDQZrmk
26677
  { 10076,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10e0c4f8009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #10076 = VPEXPANDQZrmkz
26678
  { 10077,  2,  1,  0,  0,  0, 0x8080c4f8009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #10077 = VPEXPANDQZrr
26679
  { 10078,  4,  1,  0,  0,  0, 0x80a0c4f8009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #10078 = VPEXPANDQZrrk
26680
  { 10079,  3,  1,  0,  0,  0, 0x80e0c4f8009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #10079 = VPEXPANDQZrrkz
26681
  { 10080,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x2000a7804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr },  // Inst #10080 = VPEXTRBZmr
26682
  { 10081,  3,  1,  0,  0,  0, 0x20000a7804d003ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr },  // Inst #10081 = VPEXTRBZrr
26683
  { 10082,  7,  0,  0,  401,  0|(1ULL<<MCID::MayStore), 0xa3804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #10082 = VPEXTRBmr
26684
  { 10083,  3,  1,  0,  276,  0, 0xa3804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #10083 = VPEXTRBrr
26685
  { 10084,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8000b7804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr },  // Inst #10084 = VPEXTRDZmr
26686
  { 10085,  3,  1,  0,  0,  0, 0x20000b7804d003ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr },  // Inst #10085 = VPEXTRDZrr
26687
  { 10086,  7,  0,  0,  401,  0|(1ULL<<MCID::MayStore), 0xb3804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #10086 = VPEXTRDmr
26688
  { 10087,  3,  1,  0,  276,  0, 0xb3804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #10087 = VPEXTRDrr
26689
  { 10088,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10008b7804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr },  // Inst #10088 = VPEXTRQZmr
26690
  { 10089,  3,  1,  0,  0,  0, 0x20008b7804d003ULL, nullptr, nullptr, OperandInfo483, -1 ,nullptr },  // Inst #10089 = VPEXTRQZrr
26691
  { 10090,  7,  0,  0,  401,  0|(1ULL<<MCID::MayStore), 0x8b3806d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #10090 = VPEXTRQmr
26692
  { 10091,  3,  1,  0,  276,  0, 0x8b3806d003ULL, nullptr, nullptr, OperandInfo259, -1 ,nullptr },  // Inst #10091 = VPEXTRQrr
26693
  { 10092,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x4000af804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr },  // Inst #10092 = VPEXTRWZmr
26694
  { 10093,  3,  1,  0,  0,  0, 0x200062f8045005ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr },  // Inst #10093 = VPEXTRWZrr
26695
  { 10094,  3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x20000af804d003ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr },  // Inst #10094 = VPEXTRWZrr_REV
26696
  { 10095,  7,  0,  0,  401,  0|(1ULL<<MCID::MayStore), 0xab804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr },  // Inst #10095 = VPEXTRWmr
26697
  { 10096,  3,  1,  0,  276,  0, 0x62b8045005ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #10096 = VPEXTRWri
26698
  { 10097,  3,  1,  0,  276,  0, 0xab804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr },  // Inst #10097 = VPEXTRWrr_REV
26699
  { 10098,  9,  2,  0,  812,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xa4838009006ULL, nullptr, nullptr, OperandInfo595, -1 ,nullptr },  // Inst #10098 = VPGATHERDDYrm
26700
  { 10099,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8204878009006ULL, nullptr, nullptr, OperandInfo596, -1 ,nullptr },  // Inst #10099 = VPGATHERDDZ128rm
26701
  { 10100,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8284878009006ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr },  // Inst #10100 = VPGATHERDDZ256rm
26702
  { 10101,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8a04878009006ULL, nullptr, nullptr, OperandInfo598, -1 ,nullptr },  // Inst #10101 = VPGATHERDDZrm
26703
  { 10102,  9,  2,  0,  811,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x24838009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr },  // Inst #10102 = VPGATHERDDrm
26704
  { 10103,  9,  2,  0,  816,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xac838009006ULL, nullptr, nullptr, OperandInfo590, -1 ,nullptr },  // Inst #10103 = VPGATHERDQYrm
26705
  { 10104,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1020c878009006ULL, nullptr, nullptr, OperandInfo591, -1 ,nullptr },  // Inst #10104 = VPGATHERDQZ128rm
26706
  { 10105,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1028c878009006ULL, nullptr, nullptr, OperandInfo592, -1 ,nullptr },  // Inst #10105 = VPGATHERDQZ256rm
26707
  { 10106,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a0c878009006ULL, nullptr, nullptr, OperandInfo593, -1 ,nullptr },  // Inst #10106 = VPGATHERDQZrm
26708
  { 10107,  9,  2,  0,  815,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2c838009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr },  // Inst #10107 = VPGATHERDQrm
26709
  { 10108,  9,  2,  0,  814,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xa48b8009006ULL, nullptr, nullptr, OperandInfo604, -1 ,nullptr },  // Inst #10108 = VPGATHERQDYrm
26710
  { 10109,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82048f8009006ULL, nullptr, nullptr, OperandInfo596, -1 ,nullptr },  // Inst #10109 = VPGATHERQDZ128rm
26711
  { 10110,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82848f8009006ULL, nullptr, nullptr, OperandInfo605, -1 ,nullptr },  // Inst #10110 = VPGATHERQDZ256rm
26712
  { 10111,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8a048f8009006ULL, nullptr, nullptr, OperandInfo606, -1 ,nullptr },  // Inst #10111 = VPGATHERQDZrm
26713
  { 10112,  9,  2,  0,  813,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x248b8009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr },  // Inst #10112 = VPGATHERQDrm
26714
  { 10113,  9,  2,  0,  818,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xac8b8009006ULL, nullptr, nullptr, OperandInfo595, -1 ,nullptr },  // Inst #10113 = VPGATHERQQYrm
26715
  { 10114,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1020c8f8009006ULL, nullptr, nullptr, OperandInfo591, -1 ,nullptr },  // Inst #10114 = VPGATHERQQZ128rm
26716
  { 10115,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1028c8f8009006ULL, nullptr, nullptr, OperandInfo602, -1 ,nullptr },  // Inst #10115 = VPGATHERQQZ256rm
26717
  { 10116,  9,  2,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a0c8f8009006ULL, nullptr, nullptr, OperandInfo603, -1 ,nullptr },  // Inst #10116 = VPGATHERQQZrm
26718
  { 10117,  9,  2,  0,  817,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2c8b8009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr },  // Inst #10117 = VPGATHERQQrm
26719
  { 10118,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6158014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10118 = VPHADDBDrm
26720
  { 10119,  2,  1,  0,  0,  0, 0x6158014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10119 = VPHADDBDrr
26721
  { 10120,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x61d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10120 = VPHADDBQrm
26722
  { 10121,  2,  1,  0,  0,  0, 0x61d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10121 = VPHADDBQrr
26723
  { 10122,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x60d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10122 = VPHADDBWrm
26724
  { 10123,  2,  1,  0,  0,  0, 0x60d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10123 = VPHADDBWrr
26725
  { 10124,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x65d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10124 = VPHADDDQrm
26726
  { 10125,  2,  1,  0,  0,  0, 0x65d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10125 = VPHADDDQrr
26727
  { 10126,  7,  1,  0,  828,  0|(1ULL<<MCID::MayLoad), 0x90138009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10126 = VPHADDDYrm
26728
  { 10127,  3,  1,  0,  823,  0, 0x90138009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10127 = VPHADDDYrr
26729
  { 10128,  7,  1,  0,  826,  0|(1ULL<<MCID::MayLoad), 0x10138009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10128 = VPHADDDrm
26730
  { 10129,  3,  1,  0,  821,  0, 0x10138009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10129 = VPHADDDrr
26731
  { 10130,  7,  1,  0,  827,  0|(1ULL<<MCID::MayLoad), 0x101b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10130 = VPHADDSWrm128
26732
  { 10131,  7,  1,  0,  827,  0|(1ULL<<MCID::MayLoad), 0x901b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10131 = VPHADDSWrm256
26733
  { 10132,  3,  1,  0,  822,  0, 0x101b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10132 = VPHADDSWrr128
26734
  { 10133,  3,  1,  0,  822,  0, 0x901b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10133 = VPHADDSWrr256
26735
  { 10134,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6958014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10134 = VPHADDUBDrm
26736
  { 10135,  2,  1,  0,  0,  0, 0x6958014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10135 = VPHADDUBDrr
26737
  { 10136,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x69d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10136 = VPHADDUBQrm
26738
  { 10137,  2,  1,  0,  0,  0, 0x69d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10137 = VPHADDUBQrr
26739
  { 10138,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x68d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10138 = VPHADDUBWrm
26740
  { 10139,  2,  1,  0,  0,  0, 0x68d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10139 = VPHADDUBWrr
26741
  { 10140,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6dd8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10140 = VPHADDUDQrm
26742
  { 10141,  2,  1,  0,  0,  0, 0x6dd8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10141 = VPHADDUDQrr
26743
  { 10142,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6b58014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10142 = VPHADDUWDrm
26744
  { 10143,  2,  1,  0,  0,  0, 0x6b58014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10143 = VPHADDUWDrr
26745
  { 10144,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6bd8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10144 = VPHADDUWQrm
26746
  { 10145,  2,  1,  0,  0,  0, 0x6bd8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10145 = VPHADDUWQrr
26747
  { 10146,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6358014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10146 = VPHADDWDrm
26748
  { 10147,  2,  1,  0,  0,  0, 0x6358014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10147 = VPHADDWDrr
26749
  { 10148,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x63d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10148 = VPHADDWQrm
26750
  { 10149,  2,  1,  0,  0,  0, 0x63d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10149 = VPHADDWQrr
26751
  { 10150,  7,  1,  0,  828,  0|(1ULL<<MCID::MayLoad), 0x900b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10150 = VPHADDWYrm
26752
  { 10151,  3,  1,  0,  823,  0, 0x900b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10151 = VPHADDWYrr
26753
  { 10152,  7,  1,  0,  828,  0|(1ULL<<MCID::MayLoad), 0x100b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10152 = VPHADDWrm
26754
  { 10153,  3,  1,  0,  823,  0, 0x100b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10153 = VPHADDWrr
26755
  { 10154,  6,  1,  0,  407,  0|(1ULL<<MCID::MayLoad), 0x20b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10154 = VPHMINPOSUWrm128
26756
  { 10155,  2,  1,  0,  408,  0, 0x20b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10155 = VPHMINPOSUWrr128
26757
  { 10156,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x70d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10156 = VPHSUBBWrm
26758
  { 10157,  2,  1,  0,  0,  0, 0x70d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10157 = VPHSUBBWrr
26759
  { 10158,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x71d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10158 = VPHSUBDQrm
26760
  { 10159,  2,  1,  0,  0,  0, 0x71d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10159 = VPHSUBDQrr
26761
  { 10160,  7,  1,  0,  828,  0|(1ULL<<MCID::MayLoad), 0x90338009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10160 = VPHSUBDYrm
26762
  { 10161,  3,  1,  0,  823,  0, 0x90338009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10161 = VPHSUBDYrr
26763
  { 10162,  7,  1,  0,  826,  0|(1ULL<<MCID::MayLoad), 0x10338009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10162 = VPHSUBDrm
26764
  { 10163,  3,  1,  0,  821,  0, 0x10338009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10163 = VPHSUBDrr
26765
  { 10164,  7,  1,  0,  827,  0|(1ULL<<MCID::MayLoad), 0x103b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10164 = VPHSUBSWrm128
26766
  { 10165,  7,  1,  0,  827,  0|(1ULL<<MCID::MayLoad), 0x903b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10165 = VPHSUBSWrm256
26767
  { 10166,  3,  1,  0,  822,  0, 0x103b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10166 = VPHSUBSWrr128
26768
  { 10167,  3,  1,  0,  822,  0, 0x903b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10167 = VPHSUBSWrr256
26769
  { 10168,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x7158014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10168 = VPHSUBWDrm
26770
  { 10169,  2,  1,  0,  0,  0, 0x7158014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10169 = VPHSUBWDrr
26771
  { 10170,  7,  1,  0,  828,  0|(1ULL<<MCID::MayLoad), 0x902b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10170 = VPHSUBWYrm
26772
  { 10171,  3,  1,  0,  823,  0, 0x902b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10171 = VPHSUBWYrr
26773
  { 10172,  7,  1,  0,  828,  0|(1ULL<<MCID::MayLoad), 0x102b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10172 = VPHSUBWrm
26774
  { 10173,  3,  1,  0,  823,  0, 0x102b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10173 = VPHSUBWrr
26775
  { 10174,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x201107804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #10174 = VPINSRBZrm
26776
  { 10175,  4,  1,  0,  0,  0, 0x2001107804d005ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr },  // Inst #10175 = VPINSRBZrr
26777
  { 10176,  8,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x1103804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #10176 = VPINSRBrm
26778
  { 10177,  4,  1,  0,  276,  0, 0x1103804d005ULL, nullptr, nullptr, OperandInfo860, -1 ,nullptr },  // Inst #10177 = VPINSRBrr
26779
  { 10178,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x801117804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #10178 = VPINSRDZrm
26780
  { 10179,  4,  1,  0,  0,  0, 0x2001117804d005ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr },  // Inst #10179 = VPINSRDZrr
26781
  { 10180,  8,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x1113804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #10180 = VPINSRDrm
26782
  { 10181,  4,  1,  0,  276,  0, 0x1113804d005ULL, nullptr, nullptr, OperandInfo860, -1 ,nullptr },  // Inst #10181 = VPINSRDrr
26783
  { 10182,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1001917804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #10182 = VPINSRQZrm
26784
  { 10183,  4,  1,  0,  0,  0, 0x2001917804d005ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr },  // Inst #10183 = VPINSRQZrr
26785
  { 10184,  8,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x1913804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #10184 = VPINSRQrm
26786
  { 10185,  4,  1,  0,  276,  0, 0x1913804d005ULL, nullptr, nullptr, OperandInfo861, -1 ,nullptr },  // Inst #10185 = VPINSRQrr
26787
  { 10186,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4016278045006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #10186 = VPINSRWZrm
26788
  { 10187,  4,  1,  0,  0,  0, 0x20016278045005ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr },  // Inst #10187 = VPINSRWZrr
26789
  { 10188,  8,  1,  0,  409,  0|(1ULL<<MCID::MayLoad), 0x16238045006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #10188 = VPINSRWrmi
26790
  { 10189,  4,  1,  0,  410,  0, 0x16238045005ULL, nullptr, nullptr, OperandInfo860, -1 ,nullptr },  // Inst #10189 = VPINSRWrri
26791
  { 10190,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20002278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #10190 = VPLZCNTDZ128rm
26792
  { 10191,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9002278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #10191 = VPLZCNTDZ128rmb
26793
  { 10192,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9202278009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #10192 = VPLZCNTDZ128rmbk
26794
  { 10193,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9602278009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #10193 = VPLZCNTDZ128rmbkz
26795
  { 10194,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20202278009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #10194 = VPLZCNTDZ128rmk
26796
  { 10195,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20602278009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #10195 = VPLZCNTDZ128rmkz
26797
  { 10196,  2,  1,  0,  0,  0, 0x20002278009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10196 = VPLZCNTDZ128rr
26798
  { 10197,  4,  1,  0,  0,  0, 0x20202278009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #10197 = VPLZCNTDZ128rrk
26799
  { 10198,  3,  1,  0,  0,  0, 0x20602278009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #10198 = VPLZCNTDZ128rrkz
26800
  { 10199,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40082278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #10199 = VPLZCNTDZ256rm
26801
  { 10200,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9082278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #10200 = VPLZCNTDZ256rmb
26802
  { 10201,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9282278009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #10201 = VPLZCNTDZ256rmbk
26803
  { 10202,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9682278009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #10202 = VPLZCNTDZ256rmbkz
26804
  { 10203,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40282278009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #10203 = VPLZCNTDZ256rmk
26805
  { 10204,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40682278009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #10204 = VPLZCNTDZ256rmkz
26806
  { 10205,  2,  1,  0,  0,  0, 0x40082278009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #10205 = VPLZCNTDZ256rr
26807
  { 10206,  4,  1,  0,  0,  0, 0x40282278009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #10206 = VPLZCNTDZ256rrk
26808
  { 10207,  3,  1,  0,  0,  0, 0x40682278009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #10207 = VPLZCNTDZ256rrkz
26809
  { 10208,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80802278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #10208 = VPLZCNTDZrm
26810
  { 10209,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9802278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #10209 = VPLZCNTDZrmb
26811
  { 10210,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a02278009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #10210 = VPLZCNTDZrmbk
26812
  { 10211,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e02278009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #10211 = VPLZCNTDZrmbkz
26813
  { 10212,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a02278009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #10212 = VPLZCNTDZrmk
26814
  { 10213,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e02278009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #10213 = VPLZCNTDZrmkz
26815
  { 10214,  2,  1,  0,  0,  0, 0x80802278009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #10214 = VPLZCNTDZrr
26816
  { 10215,  4,  1,  0,  0,  0, 0x80a02278009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #10215 = VPLZCNTDZrrk
26817
  { 10216,  3,  1,  0,  0,  0, 0x80e02278009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #10216 = VPLZCNTDZrrkz
26818
  { 10217,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000a278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #10217 = VPLZCNTQZ128rm
26819
  { 10218,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100a278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #10218 = VPLZCNTQZ128rmb
26820
  { 10219,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120a278009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #10219 = VPLZCNTQZ128rmbk
26821
  { 10220,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160a278009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #10220 = VPLZCNTQZ128rmbkz
26822
  { 10221,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020a278009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #10221 = VPLZCNTQZ128rmk
26823
  { 10222,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060a278009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #10222 = VPLZCNTQZ128rmkz
26824
  { 10223,  2,  1,  0,  0,  0, 0x2000a278009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10223 = VPLZCNTQZ128rr
26825
  { 10224,  4,  1,  0,  0,  0, 0x2020a278009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #10224 = VPLZCNTQZ128rrk
26826
  { 10225,  3,  1,  0,  0,  0, 0x2060a278009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #10225 = VPLZCNTQZ128rrkz
26827
  { 10226,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008a278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #10226 = VPLZCNTQZ256rm
26828
  { 10227,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108a278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #10227 = VPLZCNTQZ256rmb
26829
  { 10228,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128a278009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #10228 = VPLZCNTQZ256rmbk
26830
  { 10229,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168a278009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #10229 = VPLZCNTQZ256rmbkz
26831
  { 10230,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028a278009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #10230 = VPLZCNTQZ256rmk
26832
  { 10231,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068a278009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #10231 = VPLZCNTQZ256rmkz
26833
  { 10232,  2,  1,  0,  0,  0, 0x4008a278009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #10232 = VPLZCNTQZ256rr
26834
  { 10233,  4,  1,  0,  0,  0, 0x4028a278009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #10233 = VPLZCNTQZ256rrk
26835
  { 10234,  3,  1,  0,  0,  0, 0x4068a278009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #10234 = VPLZCNTQZ256rrkz
26836
  { 10235,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080a278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #10235 = VPLZCNTQZrm
26837
  { 10236,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180a278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #10236 = VPLZCNTQZrmb
26838
  { 10237,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0a278009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #10237 = VPLZCNTQZrmbk
26839
  { 10238,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0a278009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #10238 = VPLZCNTQZrmbkz
26840
  { 10239,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0a278009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #10239 = VPLZCNTQZrmk
26841
  { 10240,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0a278009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #10240 = VPLZCNTQZrmkz
26842
  { 10241,  2,  1,  0,  0,  0, 0x8080a278009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #10241 = VPLZCNTQZrr
26843
  { 10242,  4,  1,  0,  0,  0, 0x80a0a278009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #10242 = VPLZCNTQZrrk
26844
  { 10243,  3,  1,  0,  0,  0, 0x80e0a278009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #10243 = VPLZCNTQZrrkz
26845
  { 10244,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x54f58050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10244 = VPMACSDDrm
26846
  { 10245,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x54f58050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10245 = VPMACSDDrr
26847
  { 10246,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x54fd8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10246 = VPMACSDQHrm
26848
  { 10247,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x54fd8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10247 = VPMACSDQHrr
26849
  { 10248,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x54bd8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10248 = VPMACSDQLrm
26850
  { 10249,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x54bd8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10249 = VPMACSDQLrr
26851
  { 10250,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x54758050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10250 = VPMACSSDDrm
26852
  { 10251,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x54758050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10251 = VPMACSSDDrr
26853
  { 10252,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x547d8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10252 = VPMACSSDQHrm
26854
  { 10253,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x547d8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10253 = VPMACSSDQHrr
26855
  { 10254,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x543d8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10254 = VPMACSSDQLrm
26856
  { 10255,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x543d8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10255 = VPMACSSDQLrr
26857
  { 10256,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x54358050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10256 = VPMACSSWDrm
26858
  { 10257,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x54358050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10257 = VPMACSSWDrr
26859
  { 10258,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x542d8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10258 = VPMACSSWWrm
26860
  { 10259,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x542d8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10259 = VPMACSSWWrr
26861
  { 10260,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x54b58050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10260 = VPMACSWDrm
26862
  { 10261,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x54b58050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10261 = VPMACSWDrr
26863
  { 10262,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x54ad8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10262 = VPMACSWWrm
26864
  { 10263,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x54ad8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10263 = VPMACSWWrr
26865
  { 10264,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x55358050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10264 = VPMADCSSWDrm
26866
  { 10265,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x55358050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10265 = VPMADCSSWDrr
26867
  { 10266,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x55b58050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #10266 = VPMADCSWDrm
26868
  { 10267,  4,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x55b58050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #10267 = VPMADCSWDrr
26869
  { 10268,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001dae0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #10268 = VPMADD52HUQZ128m
26870
  { 10269,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101dae0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #10269 = VPMADD52HUQZ128mb
26871
  { 10270,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121dae0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10270 = VPMADD52HUQZ128mbk
26872
  { 10271,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161dae0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10271 = VPMADD52HUQZ128mbkz
26873
  { 10272,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021dae0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10272 = VPMADD52HUQZ128mk
26874
  { 10273,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061dae0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10273 = VPMADD52HUQZ128mkz
26875
  { 10274,  4,  1,  0,  0,  0, 0x2001dae0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #10274 = VPMADD52HUQZ128r
26876
  { 10275,  5,  1,  0,  0,  0, 0x2021dae0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #10275 = VPMADD52HUQZ128rk
26877
  { 10276,  5,  1,  0,  0,  0, 0x2061dae0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #10276 = VPMADD52HUQZ128rkz
26878
  { 10277,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009dae0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #10277 = VPMADD52HUQZ256m
26879
  { 10278,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109dae0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #10278 = VPMADD52HUQZ256mb
26880
  { 10279,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129dae0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10279 = VPMADD52HUQZ256mbk
26881
  { 10280,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169dae0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10280 = VPMADD52HUQZ256mbkz
26882
  { 10281,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029dae0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10281 = VPMADD52HUQZ256mk
26883
  { 10282,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069dae0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10282 = VPMADD52HUQZ256mkz
26884
  { 10283,  4,  1,  0,  0,  0, 0x4009dae0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #10283 = VPMADD52HUQZ256r
26885
  { 10284,  5,  1,  0,  0,  0, 0x4029dae0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #10284 = VPMADD52HUQZ256rk
26886
  { 10285,  5,  1,  0,  0,  0, 0x4069dae0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #10285 = VPMADD52HUQZ256rkz
26887
  { 10286,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081dae0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #10286 = VPMADD52HUQZm
26888
  { 10287,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181dae0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #10287 = VPMADD52HUQZmb
26889
  { 10288,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1dae0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10288 = VPMADD52HUQZmbk
26890
  { 10289,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1dae0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10289 = VPMADD52HUQZmbkz
26891
  { 10290,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1dae0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10290 = VPMADD52HUQZmk
26892
  { 10291,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1dae0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10291 = VPMADD52HUQZmkz
26893
  { 10292,  4,  1,  0,  0,  0, 0x8081dae0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #10292 = VPMADD52HUQZr
26894
  { 10293,  5,  1,  0,  0,  0, 0x80a1dae0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #10293 = VPMADD52HUQZrk
26895
  { 10294,  5,  1,  0,  0,  0, 0x80e1dae0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #10294 = VPMADD52HUQZrkz
26896
  { 10295,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001da60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #10295 = VPMADD52LUQZ128m
26897
  { 10296,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101da60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr },  // Inst #10296 = VPMADD52LUQZ128mb
26898
  { 10297,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121da60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10297 = VPMADD52LUQZ128mbk
26899
  { 10298,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161da60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10298 = VPMADD52LUQZ128mbkz
26900
  { 10299,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021da60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10299 = VPMADD52LUQZ128mk
26901
  { 10300,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061da60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10300 = VPMADD52LUQZ128mkz
26902
  { 10301,  4,  1,  0,  0,  0, 0x2001da60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr },  // Inst #10301 = VPMADD52LUQZ128r
26903
  { 10302,  5,  1,  0,  0,  0, 0x2021da60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #10302 = VPMADD52LUQZ128rk
26904
  { 10303,  5,  1,  0,  0,  0, 0x2061da60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #10303 = VPMADD52LUQZ128rkz
26905
  { 10304,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009da60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #10304 = VPMADD52LUQZ256m
26906
  { 10305,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109da60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr },  // Inst #10305 = VPMADD52LUQZ256mb
26907
  { 10306,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129da60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10306 = VPMADD52LUQZ256mbk
26908
  { 10307,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169da60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10307 = VPMADD52LUQZ256mbkz
26909
  { 10308,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029da60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10308 = VPMADD52LUQZ256mk
26910
  { 10309,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069da60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10309 = VPMADD52LUQZ256mkz
26911
  { 10310,  4,  1,  0,  0,  0, 0x4009da60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr },  // Inst #10310 = VPMADD52LUQZ256r
26912
  { 10311,  5,  1,  0,  0,  0, 0x4029da60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #10311 = VPMADD52LUQZ256rk
26913
  { 10312,  5,  1,  0,  0,  0, 0x4069da60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #10312 = VPMADD52LUQZ256rkz
26914
  { 10313,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081da60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #10313 = VPMADD52LUQZm
26915
  { 10314,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181da60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr },  // Inst #10314 = VPMADD52LUQZmb
26916
  { 10315,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1da60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10315 = VPMADD52LUQZmbk
26917
  { 10316,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1da60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10316 = VPMADD52LUQZmbkz
26918
  { 10317,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1da60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10317 = VPMADD52LUQZmk
26919
  { 10318,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1da60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10318 = VPMADD52LUQZmkz
26920
  { 10319,  4,  1,  0,  0,  0, 0x8081da60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr },  // Inst #10319 = VPMADD52LUQZr
26921
  { 10320,  5,  1,  0,  0,  0, 0x80a1da60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #10320 = VPMADD52LUQZrk
26922
  { 10321,  5,  1,  0,  0,  0, 0x80e1da60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #10321 = VPMADD52LUQZrkz
26923
  { 10322,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20010278009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10322 = VPMADDUBSWZ128rm
26924
  { 10323,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20210278009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #10323 = VPMADDUBSWZ128rmk
26925
  { 10324,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20610278009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #10324 = VPMADDUBSWZ128rmkz
26926
  { 10325,  3,  1,  0,  0,  0, 0x20010278009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10325 = VPMADDUBSWZ128rr
26927
  { 10326,  5,  1,  0,  0,  0, 0x20210278009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #10326 = VPMADDUBSWZ128rrk
26928
  { 10327,  4,  1,  0,  0,  0, 0x20610278009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #10327 = VPMADDUBSWZ128rrkz
26929
  { 10328,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40090278009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10328 = VPMADDUBSWZ256rm
26930
  { 10329,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40290278009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #10329 = VPMADDUBSWZ256rmk
26931
  { 10330,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40690278009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #10330 = VPMADDUBSWZ256rmkz
26932
  { 10331,  3,  1,  0,  0,  0, 0x40090278009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10331 = VPMADDUBSWZ256rr
26933
  { 10332,  5,  1,  0,  0,  0, 0x40290278009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #10332 = VPMADDUBSWZ256rrk
26934
  { 10333,  4,  1,  0,  0,  0, 0x40690278009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #10333 = VPMADDUBSWZ256rrkz
26935
  { 10334,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80810278009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10334 = VPMADDUBSWZrm
26936
  { 10335,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a10278009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #10335 = VPMADDUBSWZrmk
26937
  { 10336,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e10278009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #10336 = VPMADDUBSWZrmkz
26938
  { 10337,  3,  1,  0,  0,  0, 0x80810278009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10337 = VPMADDUBSWZrr
26939
  { 10338,  5,  1,  0,  0,  0, 0x80a10278009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #10338 = VPMADDUBSWZrrk
26940
  { 10339,  4,  1,  0,  0,  0, 0x80e10278009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #10339 = VPMADDUBSWZrrkz
26941
  { 10340,  7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x10238009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10340 = VPMADDUBSWrm128
26942
  { 10341,  7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x90238009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10341 = VPMADDUBSWrm256
26943
  { 10342,  3,  1,  0,  408,  0, 0x10238009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10342 = VPMADDUBSWrr128
26944
  { 10343,  3,  1,  0,  408,  0, 0x90238009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10343 = VPMADDUBSWrr256
26945
  { 10344,  7,  1,  0,  412,  0|(1ULL<<MCID::MayLoad), 0x97ab8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10344 = VPMADDWDYrm
26946
  { 10345,  3,  1,  0,  413,  0|(1ULL<<MCID::Commutable), 0x97ab8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10345 = VPMADDWDYrr
26947
  { 10346,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017af8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10346 = VPMADDWDZ128rm
26948
  { 10347,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217af8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #10347 = VPMADDWDZ128rmk
26949
  { 10348,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617af8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #10348 = VPMADDWDZ128rmkz
26950
  { 10349,  3,  1,  0,  0,  0, 0x20017af8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10349 = VPMADDWDZ128rr
26951
  { 10350,  5,  1,  0,  0,  0, 0x20217af8005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #10350 = VPMADDWDZ128rrk
26952
  { 10351,  4,  1,  0,  0,  0, 0x20617af8005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #10351 = VPMADDWDZ128rrkz
26953
  { 10352,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097af8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10352 = VPMADDWDZ256rm
26954
  { 10353,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297af8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #10353 = VPMADDWDZ256rmk
26955
  { 10354,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697af8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #10354 = VPMADDWDZ256rmkz
26956
  { 10355,  3,  1,  0,  0,  0, 0x40097af8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10355 = VPMADDWDZ256rr
26957
  { 10356,  5,  1,  0,  0,  0, 0x40297af8005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #10356 = VPMADDWDZ256rrk
26958
  { 10357,  4,  1,  0,  0,  0, 0x40697af8005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #10357 = VPMADDWDZ256rrkz
26959
  { 10358,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817af8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10358 = VPMADDWDZrm
26960
  { 10359,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17af8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #10359 = VPMADDWDZrmk
26961
  { 10360,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17af8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #10360 = VPMADDWDZrmkz
26962
  { 10361,  3,  1,  0,  0,  0, 0x80817af8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10361 = VPMADDWDZrr
26963
  { 10362,  5,  1,  0,  0,  0, 0x80a17af8005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #10362 = VPMADDWDZrrk
26964
  { 10363,  4,  1,  0,  0,  0, 0x80e17af8005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #10363 = VPMADDWDZrrkz
26965
  { 10364,  7,  1,  0,  412,  0|(1ULL<<MCID::MayLoad), 0x17ab8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10364 = VPMADDWDrm
26966
  { 10365,  3,  1,  0,  413,  0|(1ULL<<MCID::Commutable), 0x17ab8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10365 = VPMADDWDrr
26967
  { 10366,  7,  0,  0,  802,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x94738009004ULL, nullptr, nullptr, OperandInfo654, -1 ,nullptr },  // Inst #10366 = VPMASKMOVDYmr
26968
  { 10367,  7,  1,  0,  801,  0|(1ULL<<MCID::MayLoad), 0x94638009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10367 = VPMASKMOVDYrm
26969
  { 10368,  7,  0,  0,  802,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x14738009004ULL, nullptr, nullptr, OperandInfo655, -1 ,nullptr },  // Inst #10368 = VPMASKMOVDmr
26970
  { 10369,  7,  1,  0,  801,  0|(1ULL<<MCID::MayLoad), 0x14638009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10369 = VPMASKMOVDrm
26971
  { 10370,  7,  0,  0,  802,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x9c738009004ULL, nullptr, nullptr, OperandInfo654, -1 ,nullptr },  // Inst #10370 = VPMASKMOVQYmr
26972
  { 10371,  7,  1,  0,  801,  0|(1ULL<<MCID::MayLoad), 0x9c638009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10371 = VPMASKMOVQYrm
26973
  { 10372,  7,  0,  0,  802,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1c738009004ULL, nullptr, nullptr, OperandInfo655, -1 ,nullptr },  // Inst #10372 = VPMASKMOVQmr
26974
  { 10373,  7,  1,  0,  801,  0|(1ULL<<MCID::MayLoad), 0x1c638009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10373 = VPMASKMOVQrm
26975
  { 10374,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x91e38009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10374 = VPMAXSBYrm
26976
  { 10375,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x91e38009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10375 = VPMAXSBYrr
26977
  { 10376,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20011e78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10376 = VPMAXSBZ128rm
26978
  { 10377,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20211e78009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #10377 = VPMAXSBZ128rmk
26979
  { 10378,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20611e78009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #10378 = VPMAXSBZ128rmkz
26980
  { 10379,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20011e78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10379 = VPMAXSBZ128rr
26981
  { 10380,  5,  1,  0,  0,  0, 0x20211e78009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #10380 = VPMAXSBZ128rrk
26982
  { 10381,  4,  1,  0,  0,  0, 0x20611e78009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #10381 = VPMAXSBZ128rrkz
26983
  { 10382,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091e78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10382 = VPMAXSBZ256rm
26984
  { 10383,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291e78009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #10383 = VPMAXSBZ256rmk
26985
  { 10384,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40691e78009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #10384 = VPMAXSBZ256rmkz
26986
  { 10385,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40091e78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10385 = VPMAXSBZ256rr
26987
  { 10386,  5,  1,  0,  0,  0, 0x40291e78009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #10386 = VPMAXSBZ256rrk
26988
  { 10387,  4,  1,  0,  0,  0, 0x40691e78009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #10387 = VPMAXSBZ256rrkz
26989
  { 10388,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811e78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10388 = VPMAXSBZrm
26990
  { 10389,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11e78009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #10389 = VPMAXSBZrmk
26991
  { 10390,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e11e78009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #10390 = VPMAXSBZrmkz
26992
  { 10391,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80811e78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10391 = VPMAXSBZrr
26993
  { 10392,  5,  1,  0,  0,  0, 0x80a11e78009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #10392 = VPMAXSBZrrk
26994
  { 10393,  4,  1,  0,  0,  0, 0x80e11e78009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #10393 = VPMAXSBZrrkz
26995
  { 10394,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x11e38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10394 = VPMAXSBrm
26996
  { 10395,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x11e38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10395 = VPMAXSBrr
26997
  { 10396,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x91eb8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10396 = VPMAXSDYrm
26998
  { 10397,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x91eb8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10397 = VPMAXSDYrr
26999
  { 10398,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20011ef8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10398 = VPMAXSDZ128rm
27000
  { 10399,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9011ef8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10399 = VPMAXSDZ128rmb
27001
  { 10400,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9211ef8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #10400 = VPMAXSDZ128rmbk
27002
  { 10401,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9611ef8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #10401 = VPMAXSDZ128rmbkz
27003
  { 10402,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20211ef8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #10402 = VPMAXSDZ128rmk
27004
  { 10403,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20611ef8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #10403 = VPMAXSDZ128rmkz
27005
  { 10404,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20011ef8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10404 = VPMAXSDZ128rr
27006
  { 10405,  5,  1,  0,  0,  0, 0x20211ef8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #10405 = VPMAXSDZ128rrk
27007
  { 10406,  4,  1,  0,  0,  0, 0x20611ef8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #10406 = VPMAXSDZ128rrkz
27008
  { 10407,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091ef8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10407 = VPMAXSDZ256rm
27009
  { 10408,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9091ef8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10408 = VPMAXSDZ256rmb
27010
  { 10409,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9291ef8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #10409 = VPMAXSDZ256rmbk
27011
  { 10410,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9691ef8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #10410 = VPMAXSDZ256rmbkz
27012
  { 10411,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291ef8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #10411 = VPMAXSDZ256rmk
27013
  { 10412,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40691ef8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #10412 = VPMAXSDZ256rmkz
27014
  { 10413,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40091ef8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10413 = VPMAXSDZ256rr
27015
  { 10414,  5,  1,  0,  0,  0, 0x40291ef8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #10414 = VPMAXSDZ256rrk
27016
  { 10415,  4,  1,  0,  0,  0, 0x40691ef8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #10415 = VPMAXSDZ256rrkz
27017
  { 10416,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811ef8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10416 = VPMAXSDZrm
27018
  { 10417,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9811ef8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10417 = VPMAXSDZrmb
27019
  { 10418,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a11ef8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #10418 = VPMAXSDZrmbk
27020
  { 10419,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e11ef8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #10419 = VPMAXSDZrmbkz
27021
  { 10420,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11ef8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #10420 = VPMAXSDZrmk
27022
  { 10421,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e11ef8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #10421 = VPMAXSDZrmkz
27023
  { 10422,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80811ef8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10422 = VPMAXSDZrr
27024
  { 10423,  5,  1,  0,  0,  0, 0x80a11ef8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #10423 = VPMAXSDZrrk
27025
  { 10424,  4,  1,  0,  0,  0, 0x80e11ef8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #10424 = VPMAXSDZrrkz
27026
  { 10425,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x11eb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10425 = VPMAXSDrm
27027
  { 10426,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x11eb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10426 = VPMAXSDrr
27028
  { 10427,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20019ef8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10427 = VPMAXSQZ128rm
27029
  { 10428,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11019ef8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10428 = VPMAXSQZ128rmb
27030
  { 10429,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11219ef8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10429 = VPMAXSQZ128rmbk
27031
  { 10430,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11619ef8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #10430 = VPMAXSQZ128rmbkz
27032
  { 10431,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20219ef8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10431 = VPMAXSQZ128rmk
27033
  { 10432,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20619ef8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #10432 = VPMAXSQZ128rmkz
27034
  { 10433,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20019ef8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10433 = VPMAXSQZ128rr
27035
  { 10434,  5,  1,  0,  0,  0, 0x20219ef8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #10434 = VPMAXSQZ128rrk
27036
  { 10435,  4,  1,  0,  0,  0, 0x20619ef8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #10435 = VPMAXSQZ128rrkz
27037
  { 10436,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40099ef8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10436 = VPMAXSQZ256rm
27038
  { 10437,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11099ef8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10437 = VPMAXSQZ256rmb
27039
  { 10438,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11299ef8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10438 = VPMAXSQZ256rmbk
27040
  { 10439,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11699ef8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #10439 = VPMAXSQZ256rmbkz
27041
  { 10440,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40299ef8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10440 = VPMAXSQZ256rmk
27042
  { 10441,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40699ef8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #10441 = VPMAXSQZ256rmkz
27043
  { 10442,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40099ef8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10442 = VPMAXSQZ256rr
27044
  { 10443,  5,  1,  0,  0,  0, 0x40299ef8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #10443 = VPMAXSQZ256rrk
27045
  { 10444,  4,  1,  0,  0,  0, 0x40699ef8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #10444 = VPMAXSQZ256rrkz
27046
  { 10445,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80819ef8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10445 = VPMAXSQZrm
27047
  { 10446,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11819ef8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10446 = VPMAXSQZrmb
27048
  { 10447,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a19ef8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10447 = VPMAXSQZrmbk
27049
  { 10448,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e19ef8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #10448 = VPMAXSQZrmbkz
27050
  { 10449,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a19ef8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10449 = VPMAXSQZrmk
27051
  { 10450,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e19ef8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #10450 = VPMAXSQZrmkz
27052
  { 10451,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80819ef8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10451 = VPMAXSQZrr
27053
  { 10452,  5,  1,  0,  0,  0, 0x80a19ef8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #10452 = VPMAXSQZrrk
27054
  { 10453,  4,  1,  0,  0,  0, 0x80e19ef8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #10453 = VPMAXSQZrrkz
27055
  { 10454,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x97738005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10454 = VPMAXSWYrm
27056
  { 10455,  3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x97738005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10455 = VPMAXSWYrr
27057
  { 10456,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017778005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10456 = VPMAXSWZ128rm
27058
  { 10457,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217778005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #10457 = VPMAXSWZ128rmk
27059
  { 10458,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617778005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #10458 = VPMAXSWZ128rmkz
27060
  { 10459,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20017778005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10459 = VPMAXSWZ128rr
27061
  { 10460,  5,  1,  0,  0,  0, 0x20217778005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #10460 = VPMAXSWZ128rrk
27062
  { 10461,  4,  1,  0,  0,  0, 0x20617778005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #10461 = VPMAXSWZ128rrkz
27063
  { 10462,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097778005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10462 = VPMAXSWZ256rm
27064
  { 10463,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297778005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #10463 = VPMAXSWZ256rmk
27065
  { 10464,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697778005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #10464 = VPMAXSWZ256rmkz
27066
  { 10465,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40097778005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10465 = VPMAXSWZ256rr
27067
  { 10466,  5,  1,  0,  0,  0, 0x40297778005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #10466 = VPMAXSWZ256rrk
27068
  { 10467,  4,  1,  0,  0,  0, 0x40697778005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #10467 = VPMAXSWZ256rrkz
27069
  { 10468,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817778005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10468 = VPMAXSWZrm
27070
  { 10469,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17778005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #10469 = VPMAXSWZrmk
27071
  { 10470,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17778005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #10470 = VPMAXSWZrmkz
27072
  { 10471,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80817778005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10471 = VPMAXSWZrr
27073
  { 10472,  5,  1,  0,  0,  0, 0x80a17778005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #10472 = VPMAXSWZrrk
27074
  { 10473,  4,  1,  0,  0,  0, 0x80e17778005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #10473 = VPMAXSWZrrkz
27075
  { 10474,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x17738005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10474 = VPMAXSWrm
27076
  { 10475,  3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x17738005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10475 = VPMAXSWrr
27077
  { 10476,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x96f38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10476 = VPMAXUBYrm
27078
  { 10477,  3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x96f38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10477 = VPMAXUBYrr
27079
  { 10478,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016f78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10478 = VPMAXUBZ128rm
27080
  { 10479,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216f78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #10479 = VPMAXUBZ128rmk
27081
  { 10480,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20616f78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #10480 = VPMAXUBZ128rmkz
27082
  { 10481,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20016f78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10481 = VPMAXUBZ128rr
27083
  { 10482,  5,  1,  0,  0,  0, 0x20216f78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #10482 = VPMAXUBZ128rrk
27084
  { 10483,  4,  1,  0,  0,  0, 0x20616f78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #10483 = VPMAXUBZ128rrkz
27085
  { 10484,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096f78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10484 = VPMAXUBZ256rm
27086
  { 10485,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296f78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #10485 = VPMAXUBZ256rmk
27087
  { 10486,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40696f78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #10486 = VPMAXUBZ256rmkz
27088
  { 10487,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40096f78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10487 = VPMAXUBZ256rr
27089
  { 10488,  5,  1,  0,  0,  0, 0x40296f78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #10488 = VPMAXUBZ256rrk
27090
  { 10489,  4,  1,  0,  0,  0, 0x40696f78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #10489 = VPMAXUBZ256rrkz
27091
  { 10490,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816f78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10490 = VPMAXUBZrm
27092
  { 10491,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16f78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #10491 = VPMAXUBZrmk
27093
  { 10492,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e16f78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #10492 = VPMAXUBZrmkz
27094
  { 10493,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80816f78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10493 = VPMAXUBZrr
27095
  { 10494,  5,  1,  0,  0,  0, 0x80a16f78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #10494 = VPMAXUBZrrk
27096
  { 10495,  4,  1,  0,  0,  0, 0x80e16f78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #10495 = VPMAXUBZrrkz
27097
  { 10496,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x16f38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10496 = VPMAXUBrm
27098
  { 10497,  3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x16f38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10497 = VPMAXUBrr
27099
  { 10498,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x91fb8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10498 = VPMAXUDYrm
27100
  { 10499,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x91fb8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10499 = VPMAXUDYrr
27101
  { 10500,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20011ff8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10500 = VPMAXUDZ128rm
27102
  { 10501,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9011ff8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10501 = VPMAXUDZ128rmb
27103
  { 10502,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9211ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #10502 = VPMAXUDZ128rmbk
27104
  { 10503,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9611ff8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #10503 = VPMAXUDZ128rmbkz
27105
  { 10504,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20211ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #10504 = VPMAXUDZ128rmk
27106
  { 10505,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20611ff8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #10505 = VPMAXUDZ128rmkz
27107
  { 10506,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20011ff8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10506 = VPMAXUDZ128rr
27108
  { 10507,  5,  1,  0,  0,  0, 0x20211ff8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #10507 = VPMAXUDZ128rrk
27109
  { 10508,  4,  1,  0,  0,  0, 0x20611ff8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #10508 = VPMAXUDZ128rrkz
27110
  { 10509,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091ff8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10509 = VPMAXUDZ256rm
27111
  { 10510,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9091ff8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10510 = VPMAXUDZ256rmb
27112
  { 10511,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9291ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #10511 = VPMAXUDZ256rmbk
27113
  { 10512,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9691ff8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #10512 = VPMAXUDZ256rmbkz
27114
  { 10513,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #10513 = VPMAXUDZ256rmk
27115
  { 10514,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40691ff8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #10514 = VPMAXUDZ256rmkz
27116
  { 10515,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40091ff8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10515 = VPMAXUDZ256rr
27117
  { 10516,  5,  1,  0,  0,  0, 0x40291ff8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #10516 = VPMAXUDZ256rrk
27118
  { 10517,  4,  1,  0,  0,  0, 0x40691ff8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #10517 = VPMAXUDZ256rrkz
27119
  { 10518,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811ff8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10518 = VPMAXUDZrm
27120
  { 10519,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9811ff8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10519 = VPMAXUDZrmb
27121
  { 10520,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a11ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #10520 = VPMAXUDZrmbk
27122
  { 10521,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e11ff8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #10521 = VPMAXUDZrmbkz
27123
  { 10522,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #10522 = VPMAXUDZrmk
27124
  { 10523,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e11ff8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #10523 = VPMAXUDZrmkz
27125
  { 10524,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80811ff8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10524 = VPMAXUDZrr
27126
  { 10525,  5,  1,  0,  0,  0, 0x80a11ff8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #10525 = VPMAXUDZrrk
27127
  { 10526,  4,  1,  0,  0,  0, 0x80e11ff8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #10526 = VPMAXUDZrrkz
27128
  { 10527,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x11fb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10527 = VPMAXUDrm
27129
  { 10528,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x11fb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10528 = VPMAXUDrr
27130
  { 10529,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20019ff8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10529 = VPMAXUQZ128rm
27131
  { 10530,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11019ff8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10530 = VPMAXUQZ128rmb
27132
  { 10531,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11219ff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10531 = VPMAXUQZ128rmbk
27133
  { 10532,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11619ff8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #10532 = VPMAXUQZ128rmbkz
27134
  { 10533,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20219ff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10533 = VPMAXUQZ128rmk
27135
  { 10534,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20619ff8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #10534 = VPMAXUQZ128rmkz
27136
  { 10535,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20019ff8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10535 = VPMAXUQZ128rr
27137
  { 10536,  5,  1,  0,  0,  0, 0x20219ff8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #10536 = VPMAXUQZ128rrk
27138
  { 10537,  4,  1,  0,  0,  0, 0x20619ff8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #10537 = VPMAXUQZ128rrkz
27139
  { 10538,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40099ff8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10538 = VPMAXUQZ256rm
27140
  { 10539,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11099ff8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10539 = VPMAXUQZ256rmb
27141
  { 10540,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11299ff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10540 = VPMAXUQZ256rmbk
27142
  { 10541,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11699ff8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #10541 = VPMAXUQZ256rmbkz
27143
  { 10542,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40299ff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10542 = VPMAXUQZ256rmk
27144
  { 10543,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40699ff8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #10543 = VPMAXUQZ256rmkz
27145
  { 10544,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40099ff8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10544 = VPMAXUQZ256rr
27146
  { 10545,  5,  1,  0,  0,  0, 0x40299ff8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #10545 = VPMAXUQZ256rrk
27147
  { 10546,  4,  1,  0,  0,  0, 0x40699ff8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #10546 = VPMAXUQZ256rrkz
27148
  { 10547,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80819ff8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10547 = VPMAXUQZrm
27149
  { 10548,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11819ff8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10548 = VPMAXUQZrmb
27150
  { 10549,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a19ff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10549 = VPMAXUQZrmbk
27151
  { 10550,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e19ff8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #10550 = VPMAXUQZrmbkz
27152
  { 10551,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a19ff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10551 = VPMAXUQZrmk
27153
  { 10552,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e19ff8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #10552 = VPMAXUQZrmkz
27154
  { 10553,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80819ff8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10553 = VPMAXUQZrr
27155
  { 10554,  5,  1,  0,  0,  0, 0x80a19ff8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #10554 = VPMAXUQZrrk
27156
  { 10555,  4,  1,  0,  0,  0, 0x80e19ff8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #10555 = VPMAXUQZrrkz
27157
  { 10556,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x91f38009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10556 = VPMAXUWYrm
27158
  { 10557,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x91f38009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10557 = VPMAXUWYrr
27159
  { 10558,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20011f78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10558 = VPMAXUWZ128rm
27160
  { 10559,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20211f78009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #10559 = VPMAXUWZ128rmk
27161
  { 10560,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20611f78009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #10560 = VPMAXUWZ128rmkz
27162
  { 10561,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20011f78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10561 = VPMAXUWZ128rr
27163
  { 10562,  5,  1,  0,  0,  0, 0x20211f78009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #10562 = VPMAXUWZ128rrk
27164
  { 10563,  4,  1,  0,  0,  0, 0x20611f78009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #10563 = VPMAXUWZ128rrkz
27165
  { 10564,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091f78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10564 = VPMAXUWZ256rm
27166
  { 10565,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291f78009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #10565 = VPMAXUWZ256rmk
27167
  { 10566,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40691f78009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #10566 = VPMAXUWZ256rmkz
27168
  { 10567,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40091f78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10567 = VPMAXUWZ256rr
27169
  { 10568,  5,  1,  0,  0,  0, 0x40291f78009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #10568 = VPMAXUWZ256rrk
27170
  { 10569,  4,  1,  0,  0,  0, 0x40691f78009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #10569 = VPMAXUWZ256rrkz
27171
  { 10570,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811f78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10570 = VPMAXUWZrm
27172
  { 10571,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11f78009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #10571 = VPMAXUWZrmk
27173
  { 10572,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e11f78009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #10572 = VPMAXUWZrmkz
27174
  { 10573,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80811f78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10573 = VPMAXUWZrr
27175
  { 10574,  5,  1,  0,  0,  0, 0x80a11f78009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #10574 = VPMAXUWZrrk
27176
  { 10575,  4,  1,  0,  0,  0, 0x80e11f78009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #10575 = VPMAXUWZrrkz
27177
  { 10576,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x11f38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10576 = VPMAXUWrm
27178
  { 10577,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x11f38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10577 = VPMAXUWrr
27179
  { 10578,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x91c38009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10578 = VPMINSBYrm
27180
  { 10579,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x91c38009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10579 = VPMINSBYrr
27181
  { 10580,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20011c78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10580 = VPMINSBZ128rm
27182
  { 10581,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20211c78009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #10581 = VPMINSBZ128rmk
27183
  { 10582,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20611c78009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #10582 = VPMINSBZ128rmkz
27184
  { 10583,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20011c78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10583 = VPMINSBZ128rr
27185
  { 10584,  5,  1,  0,  0,  0, 0x20211c78009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #10584 = VPMINSBZ128rrk
27186
  { 10585,  4,  1,  0,  0,  0, 0x20611c78009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #10585 = VPMINSBZ128rrkz
27187
  { 10586,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091c78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10586 = VPMINSBZ256rm
27188
  { 10587,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291c78009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #10587 = VPMINSBZ256rmk
27189
  { 10588,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40691c78009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #10588 = VPMINSBZ256rmkz
27190
  { 10589,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40091c78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10589 = VPMINSBZ256rr
27191
  { 10590,  5,  1,  0,  0,  0, 0x40291c78009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #10590 = VPMINSBZ256rrk
27192
  { 10591,  4,  1,  0,  0,  0, 0x40691c78009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #10591 = VPMINSBZ256rrkz
27193
  { 10592,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811c78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10592 = VPMINSBZrm
27194
  { 10593,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11c78009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #10593 = VPMINSBZrmk
27195
  { 10594,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e11c78009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #10594 = VPMINSBZrmkz
27196
  { 10595,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80811c78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10595 = VPMINSBZrr
27197
  { 10596,  5,  1,  0,  0,  0, 0x80a11c78009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #10596 = VPMINSBZrrk
27198
  { 10597,  4,  1,  0,  0,  0, 0x80e11c78009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #10597 = VPMINSBZrrkz
27199
  { 10598,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x11c38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10598 = VPMINSBrm
27200
  { 10599,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x11c38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10599 = VPMINSBrr
27201
  { 10600,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x91cb8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10600 = VPMINSDYrm
27202
  { 10601,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x91cb8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10601 = VPMINSDYrr
27203
  { 10602,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20011cf8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10602 = VPMINSDZ128rm
27204
  { 10603,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9011cf8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10603 = VPMINSDZ128rmb
27205
  { 10604,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9211cf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #10604 = VPMINSDZ128rmbk
27206
  { 10605,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9611cf8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #10605 = VPMINSDZ128rmbkz
27207
  { 10606,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20211cf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #10606 = VPMINSDZ128rmk
27208
  { 10607,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20611cf8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #10607 = VPMINSDZ128rmkz
27209
  { 10608,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20011cf8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10608 = VPMINSDZ128rr
27210
  { 10609,  5,  1,  0,  0,  0, 0x20211cf8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #10609 = VPMINSDZ128rrk
27211
  { 10610,  4,  1,  0,  0,  0, 0x20611cf8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #10610 = VPMINSDZ128rrkz
27212
  { 10611,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091cf8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10611 = VPMINSDZ256rm
27213
  { 10612,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9091cf8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10612 = VPMINSDZ256rmb
27214
  { 10613,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9291cf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #10613 = VPMINSDZ256rmbk
27215
  { 10614,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9691cf8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #10614 = VPMINSDZ256rmbkz
27216
  { 10615,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291cf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #10615 = VPMINSDZ256rmk
27217
  { 10616,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40691cf8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #10616 = VPMINSDZ256rmkz
27218
  { 10617,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40091cf8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10617 = VPMINSDZ256rr
27219
  { 10618,  5,  1,  0,  0,  0, 0x40291cf8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #10618 = VPMINSDZ256rrk
27220
  { 10619,  4,  1,  0,  0,  0, 0x40691cf8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #10619 = VPMINSDZ256rrkz
27221
  { 10620,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811cf8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10620 = VPMINSDZrm
27222
  { 10621,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9811cf8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10621 = VPMINSDZrmb
27223
  { 10622,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a11cf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #10622 = VPMINSDZrmbk
27224
  { 10623,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e11cf8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #10623 = VPMINSDZrmbkz
27225
  { 10624,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11cf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #10624 = VPMINSDZrmk
27226
  { 10625,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e11cf8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #10625 = VPMINSDZrmkz
27227
  { 10626,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80811cf8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10626 = VPMINSDZrr
27228
  { 10627,  5,  1,  0,  0,  0, 0x80a11cf8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #10627 = VPMINSDZrrk
27229
  { 10628,  4,  1,  0,  0,  0, 0x80e11cf8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #10628 = VPMINSDZrrkz
27230
  { 10629,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x11cb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10629 = VPMINSDrm
27231
  { 10630,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x11cb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10630 = VPMINSDrr
27232
  { 10631,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20019cf8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10631 = VPMINSQZ128rm
27233
  { 10632,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11019cf8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10632 = VPMINSQZ128rmb
27234
  { 10633,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11219cf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10633 = VPMINSQZ128rmbk
27235
  { 10634,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11619cf8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #10634 = VPMINSQZ128rmbkz
27236
  { 10635,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20219cf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10635 = VPMINSQZ128rmk
27237
  { 10636,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20619cf8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #10636 = VPMINSQZ128rmkz
27238
  { 10637,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20019cf8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10637 = VPMINSQZ128rr
27239
  { 10638,  5,  1,  0,  0,  0, 0x20219cf8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #10638 = VPMINSQZ128rrk
27240
  { 10639,  4,  1,  0,  0,  0, 0x20619cf8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #10639 = VPMINSQZ128rrkz
27241
  { 10640,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40099cf8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10640 = VPMINSQZ256rm
27242
  { 10641,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11099cf8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10641 = VPMINSQZ256rmb
27243
  { 10642,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11299cf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10642 = VPMINSQZ256rmbk
27244
  { 10643,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11699cf8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #10643 = VPMINSQZ256rmbkz
27245
  { 10644,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40299cf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10644 = VPMINSQZ256rmk
27246
  { 10645,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40699cf8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #10645 = VPMINSQZ256rmkz
27247
  { 10646,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40099cf8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10646 = VPMINSQZ256rr
27248
  { 10647,  5,  1,  0,  0,  0, 0x40299cf8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #10647 = VPMINSQZ256rrk
27249
  { 10648,  4,  1,  0,  0,  0, 0x40699cf8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #10648 = VPMINSQZ256rrkz
27250
  { 10649,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80819cf8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10649 = VPMINSQZrm
27251
  { 10650,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11819cf8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10650 = VPMINSQZrmb
27252
  { 10651,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a19cf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10651 = VPMINSQZrmbk
27253
  { 10652,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e19cf8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #10652 = VPMINSQZrmbkz
27254
  { 10653,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a19cf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10653 = VPMINSQZrmk
27255
  { 10654,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e19cf8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #10654 = VPMINSQZrmkz
27256
  { 10655,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80819cf8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10655 = VPMINSQZrr
27257
  { 10656,  5,  1,  0,  0,  0, 0x80a19cf8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #10656 = VPMINSQZrrk
27258
  { 10657,  4,  1,  0,  0,  0, 0x80e19cf8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #10657 = VPMINSQZrrkz
27259
  { 10658,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x97538005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10658 = VPMINSWYrm
27260
  { 10659,  3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x97538005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10659 = VPMINSWYrr
27261
  { 10660,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017578005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10660 = VPMINSWZ128rm
27262
  { 10661,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217578005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #10661 = VPMINSWZ128rmk
27263
  { 10662,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617578005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #10662 = VPMINSWZ128rmkz
27264
  { 10663,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20017578005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10663 = VPMINSWZ128rr
27265
  { 10664,  5,  1,  0,  0,  0, 0x20217578005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #10664 = VPMINSWZ128rrk
27266
  { 10665,  4,  1,  0,  0,  0, 0x20617578005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #10665 = VPMINSWZ128rrkz
27267
  { 10666,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097578005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10666 = VPMINSWZ256rm
27268
  { 10667,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297578005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #10667 = VPMINSWZ256rmk
27269
  { 10668,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697578005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #10668 = VPMINSWZ256rmkz
27270
  { 10669,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40097578005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10669 = VPMINSWZ256rr
27271
  { 10670,  5,  1,  0,  0,  0, 0x40297578005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #10670 = VPMINSWZ256rrk
27272
  { 10671,  4,  1,  0,  0,  0, 0x40697578005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #10671 = VPMINSWZ256rrkz
27273
  { 10672,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817578005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10672 = VPMINSWZrm
27274
  { 10673,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17578005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #10673 = VPMINSWZrmk
27275
  { 10674,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17578005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #10674 = VPMINSWZrmkz
27276
  { 10675,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80817578005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10675 = VPMINSWZrr
27277
  { 10676,  5,  1,  0,  0,  0, 0x80a17578005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #10676 = VPMINSWZrrk
27278
  { 10677,  4,  1,  0,  0,  0, 0x80e17578005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #10677 = VPMINSWZrrkz
27279
  { 10678,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x17538005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10678 = VPMINSWrm
27280
  { 10679,  3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x17538005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10679 = VPMINSWrr
27281
  { 10680,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x96d38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10680 = VPMINUBYrm
27282
  { 10681,  3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x96d38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10681 = VPMINUBYrr
27283
  { 10682,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016d78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10682 = VPMINUBZ128rm
27284
  { 10683,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216d78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #10683 = VPMINUBZ128rmk
27285
  { 10684,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20616d78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #10684 = VPMINUBZ128rmkz
27286
  { 10685,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20016d78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10685 = VPMINUBZ128rr
27287
  { 10686,  5,  1,  0,  0,  0, 0x20216d78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #10686 = VPMINUBZ128rrk
27288
  { 10687,  4,  1,  0,  0,  0, 0x20616d78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #10687 = VPMINUBZ128rrkz
27289
  { 10688,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096d78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10688 = VPMINUBZ256rm
27290
  { 10689,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296d78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #10689 = VPMINUBZ256rmk
27291
  { 10690,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40696d78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #10690 = VPMINUBZ256rmkz
27292
  { 10691,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40096d78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10691 = VPMINUBZ256rr
27293
  { 10692,  5,  1,  0,  0,  0, 0x40296d78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #10692 = VPMINUBZ256rrk
27294
  { 10693,  4,  1,  0,  0,  0, 0x40696d78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #10693 = VPMINUBZ256rrkz
27295
  { 10694,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816d78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10694 = VPMINUBZrm
27296
  { 10695,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16d78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #10695 = VPMINUBZrmk
27297
  { 10696,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e16d78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #10696 = VPMINUBZrmkz
27298
  { 10697,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80816d78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10697 = VPMINUBZrr
27299
  { 10698,  5,  1,  0,  0,  0, 0x80a16d78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #10698 = VPMINUBZrrk
27300
  { 10699,  4,  1,  0,  0,  0, 0x80e16d78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #10699 = VPMINUBZrrkz
27301
  { 10700,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x16d38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10700 = VPMINUBrm
27302
  { 10701,  3,  1,  0,  377,  0|(1ULL<<MCID::Commutable), 0x16d38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10701 = VPMINUBrr
27303
  { 10702,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x91db8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10702 = VPMINUDYrm
27304
  { 10703,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x91db8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10703 = VPMINUDYrr
27305
  { 10704,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20011df8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10704 = VPMINUDZ128rm
27306
  { 10705,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9011df8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10705 = VPMINUDZ128rmb
27307
  { 10706,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9211df8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #10706 = VPMINUDZ128rmbk
27308
  { 10707,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9611df8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #10707 = VPMINUDZ128rmbkz
27309
  { 10708,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20211df8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #10708 = VPMINUDZ128rmk
27310
  { 10709,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20611df8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #10709 = VPMINUDZ128rmkz
27311
  { 10710,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20011df8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10710 = VPMINUDZ128rr
27312
  { 10711,  5,  1,  0,  0,  0, 0x20211df8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #10711 = VPMINUDZ128rrk
27313
  { 10712,  4,  1,  0,  0,  0, 0x20611df8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #10712 = VPMINUDZ128rrkz
27314
  { 10713,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091df8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10713 = VPMINUDZ256rm
27315
  { 10714,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9091df8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10714 = VPMINUDZ256rmb
27316
  { 10715,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9291df8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #10715 = VPMINUDZ256rmbk
27317
  { 10716,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9691df8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #10716 = VPMINUDZ256rmbkz
27318
  { 10717,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291df8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #10717 = VPMINUDZ256rmk
27319
  { 10718,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40691df8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #10718 = VPMINUDZ256rmkz
27320
  { 10719,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40091df8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10719 = VPMINUDZ256rr
27321
  { 10720,  5,  1,  0,  0,  0, 0x40291df8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #10720 = VPMINUDZ256rrk
27322
  { 10721,  4,  1,  0,  0,  0, 0x40691df8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #10721 = VPMINUDZ256rrkz
27323
  { 10722,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811df8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10722 = VPMINUDZrm
27324
  { 10723,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9811df8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10723 = VPMINUDZrmb
27325
  { 10724,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a11df8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #10724 = VPMINUDZrmbk
27326
  { 10725,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e11df8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #10725 = VPMINUDZrmbkz
27327
  { 10726,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11df8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #10726 = VPMINUDZrmk
27328
  { 10727,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e11df8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #10727 = VPMINUDZrmkz
27329
  { 10728,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80811df8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10728 = VPMINUDZrr
27330
  { 10729,  5,  1,  0,  0,  0, 0x80a11df8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #10729 = VPMINUDZrrk
27331
  { 10730,  4,  1,  0,  0,  0, 0x80e11df8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #10730 = VPMINUDZrrkz
27332
  { 10731,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x11db8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10731 = VPMINUDrm
27333
  { 10732,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x11db8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10732 = VPMINUDrr
27334
  { 10733,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20019df8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10733 = VPMINUQZ128rm
27335
  { 10734,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11019df8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10734 = VPMINUQZ128rmb
27336
  { 10735,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11219df8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10735 = VPMINUQZ128rmbk
27337
  { 10736,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11619df8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #10736 = VPMINUQZ128rmbkz
27338
  { 10737,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20219df8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #10737 = VPMINUQZ128rmk
27339
  { 10738,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20619df8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #10738 = VPMINUQZ128rmkz
27340
  { 10739,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20019df8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10739 = VPMINUQZ128rr
27341
  { 10740,  5,  1,  0,  0,  0, 0x20219df8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #10740 = VPMINUQZ128rrk
27342
  { 10741,  4,  1,  0,  0,  0, 0x20619df8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #10741 = VPMINUQZ128rrkz
27343
  { 10742,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40099df8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10742 = VPMINUQZ256rm
27344
  { 10743,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11099df8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10743 = VPMINUQZ256rmb
27345
  { 10744,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11299df8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10744 = VPMINUQZ256rmbk
27346
  { 10745,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11699df8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #10745 = VPMINUQZ256rmbkz
27347
  { 10746,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40299df8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #10746 = VPMINUQZ256rmk
27348
  { 10747,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40699df8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #10747 = VPMINUQZ256rmkz
27349
  { 10748,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40099df8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10748 = VPMINUQZ256rr
27350
  { 10749,  5,  1,  0,  0,  0, 0x40299df8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #10749 = VPMINUQZ256rrk
27351
  { 10750,  4,  1,  0,  0,  0, 0x40699df8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #10750 = VPMINUQZ256rrkz
27352
  { 10751,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80819df8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10751 = VPMINUQZrm
27353
  { 10752,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11819df8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10752 = VPMINUQZrmb
27354
  { 10753,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a19df8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10753 = VPMINUQZrmbk
27355
  { 10754,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e19df8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #10754 = VPMINUQZrmbkz
27356
  { 10755,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a19df8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #10755 = VPMINUQZrmk
27357
  { 10756,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e19df8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #10756 = VPMINUQZrmkz
27358
  { 10757,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80819df8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10757 = VPMINUQZrr
27359
  { 10758,  5,  1,  0,  0,  0, 0x80a19df8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #10758 = VPMINUQZrrk
27360
  { 10759,  4,  1,  0,  0,  0, 0x80e19df8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #10759 = VPMINUQZrrkz
27361
  { 10760,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x91d38009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #10760 = VPMINUWYrm
27362
  { 10761,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x91d38009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #10761 = VPMINUWYrr
27363
  { 10762,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20011d78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #10762 = VPMINUWZ128rm
27364
  { 10763,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20211d78009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #10763 = VPMINUWZ128rmk
27365
  { 10764,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20611d78009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #10764 = VPMINUWZ128rmkz
27366
  { 10765,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20011d78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #10765 = VPMINUWZ128rr
27367
  { 10766,  5,  1,  0,  0,  0, 0x20211d78009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #10766 = VPMINUWZ128rrk
27368
  { 10767,  4,  1,  0,  0,  0, 0x20611d78009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #10767 = VPMINUWZ128rrkz
27369
  { 10768,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091d78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #10768 = VPMINUWZ256rm
27370
  { 10769,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291d78009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #10769 = VPMINUWZ256rmk
27371
  { 10770,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40691d78009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #10770 = VPMINUWZ256rmkz
27372
  { 10771,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40091d78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #10771 = VPMINUWZ256rr
27373
  { 10772,  5,  1,  0,  0,  0, 0x40291d78009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #10772 = VPMINUWZ256rrk
27374
  { 10773,  4,  1,  0,  0,  0, 0x40691d78009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #10773 = VPMINUWZ256rrkz
27375
  { 10774,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811d78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #10774 = VPMINUWZrm
27376
  { 10775,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11d78009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #10775 = VPMINUWZrmk
27377
  { 10776,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e11d78009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #10776 = VPMINUWZrmkz
27378
  { 10777,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80811d78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #10777 = VPMINUWZrr
27379
  { 10778,  5,  1,  0,  0,  0, 0x80a11d78009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #10778 = VPMINUWZrrk
27380
  { 10779,  4,  1,  0,  0,  0, 0x80e11d78009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #10779 = VPMINUWZrrkz
27381
  { 10780,  7,  1,  0,  391,  0|(1ULL<<MCID::MayLoad), 0x11d38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #10780 = VPMINUWrm
27382
  { 10781,  3,  1,  0,  392,  0|(1ULL<<MCID::Commutable), 0x11d38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #10781 = VPMINUWrr
27383
  { 10782,  2,  1,  0,  0,  0, 0x200014f8009805ULL, nullptr, nullptr, OperandInfo862, -1 ,nullptr },  // Inst #10782 = VPMOVB2MZ128rr
27384
  { 10783,  2,  1,  0,  0,  0, 0x400814f8009805ULL, nullptr, nullptr, OperandInfo863, -1 ,nullptr },  // Inst #10783 = VPMOVB2MZ256rr
27385
  { 10784,  2,  1,  0,  0,  0, 0x808014f8009805ULL, nullptr, nullptr, OperandInfo864, -1 ,nullptr },  // Inst #10784 = VPMOVB2MZrr
27386
  { 10785,  2,  1,  0,  0,  0, 0x20001cf8009805ULL, nullptr, nullptr, OperandInfo865, -1 ,nullptr },  // Inst #10785 = VPMOVD2MZ128rr
27387
  { 10786,  2,  1,  0,  0,  0, 0x40081cf8009805ULL, nullptr, nullptr, OperandInfo866, -1 ,nullptr },  // Inst #10786 = VPMOVD2MZ256rr
27388
  { 10787,  2,  1,  0,  0,  0, 0x80801cf8009805ULL, nullptr, nullptr, OperandInfo867, -1 ,nullptr },  // Inst #10787 = VPMOVD2MZrr
27389
  { 10788,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x80018f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #10788 = VPMOVDBZ128mr
27390
  { 10789,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x82018f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #10789 = VPMOVDBZ128mrk
27391
  { 10790,  2,  1,  0,  0,  0, 0x80018e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10790 = VPMOVDBZ128rr
27392
  { 10791,  4,  1,  0,  0,  0, 0x82018e0009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #10791 = VPMOVDBZ128rrk
27393
  { 10792,  3,  1,  0,  0,  0, 0x86018e0009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #10792 = VPMOVDBZ128rrkz
27394
  { 10793,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x100818f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #10793 = VPMOVDBZ256mr
27395
  { 10794,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x102818f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #10794 = VPMOVDBZ256mrk
27396
  { 10795,  2,  1,  0,  0,  0, 0x100818e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #10795 = VPMOVDBZ256rr
27397
  { 10796,  4,  1,  0,  0,  0, 0x102818e0009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr },  // Inst #10796 = VPMOVDBZ256rrk
27398
  { 10797,  3,  1,  0,  0,  0, 0x106818e0009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr },  // Inst #10797 = VPMOVDBZ256rrkz
27399
  { 10798,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x208018f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #10798 = VPMOVDBZmr
27400
  { 10799,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20a018f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #10799 = VPMOVDBZmrk
27401
  { 10800,  2,  1,  0,  0,  0, 0x208018e0009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr },  // Inst #10800 = VPMOVDBZrr
27402
  { 10801,  4,  1,  0,  0,  0, 0x20a018e0009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr },  // Inst #10801 = VPMOVDBZrrk
27403
  { 10802,  3,  1,  0,  0,  0, 0x20e018e0009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr },  // Inst #10802 = VPMOVDBZrrkz
27404
  { 10803,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x100019f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #10803 = VPMOVDWZ128mr
27405
  { 10804,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x102019f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #10804 = VPMOVDWZ128mrk
27406
  { 10805,  2,  1,  0,  0,  0, 0x100019e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10805 = VPMOVDWZ128rr
27407
  { 10806,  4,  1,  0,  0,  0, 0x102019e0009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr },  // Inst #10806 = VPMOVDWZ128rrk
27408
  { 10807,  3,  1,  0,  0,  0, 0x106019e0009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #10807 = VPMOVDWZ128rrkz
27409
  { 10808,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x200819f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #10808 = VPMOVDWZ256mr
27410
  { 10809,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x202819f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #10809 = VPMOVDWZ256mrk
27411
  { 10810,  2,  1,  0,  0,  0, 0x200819e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #10810 = VPMOVDWZ256rr
27412
  { 10811,  4,  1,  0,  0,  0, 0x202819e0009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr },  // Inst #10811 = VPMOVDWZ256rrk
27413
  { 10812,  3,  1,  0,  0,  0, 0x206819e0009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr },  // Inst #10812 = VPMOVDWZ256rrkz
27414
  { 10813,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x408019f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #10813 = VPMOVDWZmr
27415
  { 10814,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40a019f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #10814 = VPMOVDWZmrk
27416
  { 10815,  2,  1,  0,  0,  0, 0x408019e0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #10815 = VPMOVDWZrr
27417
  { 10816,  4,  1,  0,  0,  0, 0x40a019e0009803ULL, nullptr, nullptr, OperandInfo875, -1 ,nullptr },  // Inst #10816 = VPMOVDWZrrk
27418
  { 10817,  3,  1,  0,  0,  0, 0x40e019e0009803ULL, nullptr, nullptr, OperandInfo876, -1 ,nullptr },  // Inst #10817 = VPMOVDWZrrkz
27419
  { 10818,  2,  1,  0,  0,  0, 0x20001478009805ULL, nullptr, nullptr, OperandInfo759, -1 ,nullptr },  // Inst #10818 = VPMOVM2BZ128rr
27420
  { 10819,  2,  1,  0,  0,  0, 0x40081478009805ULL, nullptr, nullptr, OperandInfo877, -1 ,nullptr },  // Inst #10819 = VPMOVM2BZ256rr
27421
  { 10820,  2,  1,  0,  0,  0, 0x80801478009805ULL, nullptr, nullptr, OperandInfo878, -1 ,nullptr },  // Inst #10820 = VPMOVM2BZrr
27422
  { 10821,  2,  1,  0,  0,  0, 0x20001c78009805ULL, nullptr, nullptr, OperandInfo879, -1 ,nullptr },  // Inst #10821 = VPMOVM2DZ128rr
27423
  { 10822,  2,  1,  0,  0,  0, 0x40081c78009805ULL, nullptr, nullptr, OperandInfo757, -1 ,nullptr },  // Inst #10822 = VPMOVM2DZ256rr
27424
  { 10823,  2,  1,  0,  0,  0, 0x80801c78009805ULL, nullptr, nullptr, OperandInfo761, -1 ,nullptr },  // Inst #10823 = VPMOVM2DZrr
27425
  { 10824,  2,  1,  0,  0,  0, 0x20009c78009805ULL, nullptr, nullptr, OperandInfo880, -1 ,nullptr },  // Inst #10824 = VPMOVM2QZ128rr
27426
  { 10825,  2,  1,  0,  0,  0, 0x40089c78009805ULL, nullptr, nullptr, OperandInfo881, -1 ,nullptr },  // Inst #10825 = VPMOVM2QZ256rr
27427
  { 10826,  2,  1,  0,  0,  0, 0x80809c78009805ULL, nullptr, nullptr, OperandInfo758, -1 ,nullptr },  // Inst #10826 = VPMOVM2QZrr
27428
  { 10827,  2,  1,  0,  0,  0, 0x20009478009805ULL, nullptr, nullptr, OperandInfo756, -1 ,nullptr },  // Inst #10827 = VPMOVM2WZ128rr
27429
  { 10828,  2,  1,  0,  0,  0, 0x40089478009805ULL, nullptr, nullptr, OperandInfo760, -1 ,nullptr },  // Inst #10828 = VPMOVM2WZ256rr
27430
  { 10829,  2,  1,  0,  0,  0, 0x80809478009805ULL, nullptr, nullptr, OperandInfo882, -1 ,nullptr },  // Inst #10829 = VPMOVM2WZrr
27431
  { 10830,  2,  1,  0,  805,  0, 0x86bb8005005ULL, nullptr, nullptr, OperandInfo691, -1 ,nullptr },  // Inst #10830 = VPMOVMSKBYrr
27432
  { 10831,  2,  1,  0,  804,  0, 0x6bb8005005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr },  // Inst #10831 = VPMOVMSKBrr
27433
  { 10832,  2,  1,  0,  0,  0, 0x20009cf8009805ULL, nullptr, nullptr, OperandInfo883, -1 ,nullptr },  // Inst #10832 = VPMOVQ2MZ128rr
27434
  { 10833,  2,  1,  0,  0,  0, 0x40089cf8009805ULL, nullptr, nullptr, OperandInfo884, -1 ,nullptr },  // Inst #10833 = VPMOVQ2MZ256rr
27435
  { 10834,  2,  1,  0,  0,  0, 0x80809cf8009805ULL, nullptr, nullptr, OperandInfo885, -1 ,nullptr },  // Inst #10834 = VPMOVQ2MZrr
27436
  { 10835,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x4001978009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #10835 = VPMOVQBZ128mr
27437
  { 10836,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x4201978009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #10836 = VPMOVQBZ128mrk
27438
  { 10837,  2,  1,  0,  0,  0, 0x4001960009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10837 = VPMOVQBZ128rr
27439
  { 10838,  4,  1,  0,  0,  0, 0x4201960009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #10838 = VPMOVQBZ128rrk
27440
  { 10839,  3,  1,  0,  0,  0, 0x4601960009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #10839 = VPMOVQBZ128rrkz
27441
  { 10840,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8081978009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #10840 = VPMOVQBZ256mr
27442
  { 10841,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8281978009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #10841 = VPMOVQBZ256mrk
27443
  { 10842,  2,  1,  0,  0,  0, 0x8081960009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #10842 = VPMOVQBZ256rr
27444
  { 10843,  4,  1,  0,  0,  0, 0x8281960009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr },  // Inst #10843 = VPMOVQBZ256rrk
27445
  { 10844,  3,  1,  0,  0,  0, 0x8681960009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr },  // Inst #10844 = VPMOVQBZ256rrkz
27446
  { 10845,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10801978009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #10845 = VPMOVQBZmr
27447
  { 10846,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10a01978009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #10846 = VPMOVQBZmrk
27448
  { 10847,  2,  1,  0,  0,  0, 0x10801960009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr },  // Inst #10847 = VPMOVQBZrr
27449
  { 10848,  4,  1,  0,  0,  0, 0x10a01960009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr },  // Inst #10848 = VPMOVQBZrrk
27450
  { 10849,  3,  1,  0,  0,  0, 0x10e01960009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr },  // Inst #10849 = VPMOVQBZrrkz
27451
  { 10850,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10001af8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #10850 = VPMOVQDZ128mr
27452
  { 10851,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10201af8009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #10851 = VPMOVQDZ128mrk
27453
  { 10852,  2,  1,  0,  0,  0, 0x10001ae0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10852 = VPMOVQDZ128rr
27454
  { 10853,  4,  1,  0,  0,  0, 0x10201ae0009803ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #10853 = VPMOVQDZ128rrk
27455
  { 10854,  3,  1,  0,  0,  0, 0x10601ae0009803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #10854 = VPMOVQDZ128rrkz
27456
  { 10855,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20081af8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #10855 = VPMOVQDZ256mr
27457
  { 10856,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20281af8009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #10856 = VPMOVQDZ256mrk
27458
  { 10857,  2,  1,  0,  0,  0, 0x20081ae0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #10857 = VPMOVQDZ256rr
27459
  { 10858,  4,  1,  0,  0,  0, 0x20281ae0009803ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr },  // Inst #10858 = VPMOVQDZ256rrk
27460
  { 10859,  3,  1,  0,  0,  0, 0x20681ae0009803ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr },  // Inst #10859 = VPMOVQDZ256rrkz
27461
  { 10860,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40801af8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #10860 = VPMOVQDZmr
27462
  { 10861,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40a01af8009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #10861 = VPMOVQDZmrk
27463
  { 10862,  2,  1,  0,  0,  0, 0x40801ae0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #10862 = VPMOVQDZrr
27464
  { 10863,  4,  1,  0,  0,  0, 0x40a01ae0009803ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #10863 = VPMOVQDZrrk
27465
  { 10864,  3,  1,  0,  0,  0, 0x40e01ae0009803ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #10864 = VPMOVQDZrrkz
27466
  { 10865,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8001a78009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #10865 = VPMOVQWZ128mr
27467
  { 10866,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8201a78009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #10866 = VPMOVQWZ128mrk
27468
  { 10867,  2,  1,  0,  0,  0, 0x8001a60009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10867 = VPMOVQWZ128rr
27469
  { 10868,  4,  1,  0,  0,  0, 0x8201a60009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr },  // Inst #10868 = VPMOVQWZ128rrk
27470
  { 10869,  3,  1,  0,  0,  0, 0x8601a60009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #10869 = VPMOVQWZ128rrkz
27471
  { 10870,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10081a78009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #10870 = VPMOVQWZ256mr
27472
  { 10871,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10281a78009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #10871 = VPMOVQWZ256mrk
27473
  { 10872,  2,  1,  0,  0,  0, 0x10081a60009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #10872 = VPMOVQWZ256rr
27474
  { 10873,  4,  1,  0,  0,  0, 0x10281a60009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr },  // Inst #10873 = VPMOVQWZ256rrk
27475
  { 10874,  3,  1,  0,  0,  0, 0x10681a60009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr },  // Inst #10874 = VPMOVQWZ256rrkz
27476
  { 10875,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20801a78009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #10875 = VPMOVQWZmr
27477
  { 10876,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20a01a78009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #10876 = VPMOVQWZmrk
27478
  { 10877,  2,  1,  0,  0,  0, 0x20801a60009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr },  // Inst #10877 = VPMOVQWZrr
27479
  { 10878,  4,  1,  0,  0,  0, 0x20a01a60009803ULL, nullptr, nullptr, OperandInfo886, -1 ,nullptr },  // Inst #10878 = VPMOVQWZrrk
27480
  { 10879,  3,  1,  0,  0,  0, 0x20e01a60009803ULL, nullptr, nullptr, OperandInfo887, -1 ,nullptr },  // Inst #10879 = VPMOVQWZrrkz
27481
  { 10880,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80010f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #10880 = VPMOVSDBZ128mr
27482
  { 10881,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x82010f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #10881 = VPMOVSDBZ128mrk
27483
  { 10882,  2,  1,  0,  0,  0, 0x80010e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10882 = VPMOVSDBZ128rr
27484
  { 10883,  4,  1,  0,  0,  0, 0x82010e0009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #10883 = VPMOVSDBZ128rrk
27485
  { 10884,  3,  1,  0,  0,  0, 0x86010e0009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #10884 = VPMOVSDBZ128rrkz
27486
  { 10885,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100810f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #10885 = VPMOVSDBZ256mr
27487
  { 10886,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x102810f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #10886 = VPMOVSDBZ256mrk
27488
  { 10887,  2,  1,  0,  0,  0, 0x100810e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #10887 = VPMOVSDBZ256rr
27489
  { 10888,  4,  1,  0,  0,  0, 0x102810e0009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr },  // Inst #10888 = VPMOVSDBZ256rrk
27490
  { 10889,  3,  1,  0,  0,  0, 0x106810e0009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr },  // Inst #10889 = VPMOVSDBZ256rrkz
27491
  { 10890,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x208010f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #10890 = VPMOVSDBZmr
27492
  { 10891,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20a010f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #10891 = VPMOVSDBZmrk
27493
  { 10892,  2,  1,  0,  0,  0, 0x208010e0009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr },  // Inst #10892 = VPMOVSDBZrr
27494
  { 10893,  4,  1,  0,  0,  0, 0x20a010e0009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr },  // Inst #10893 = VPMOVSDBZrrk
27495
  { 10894,  3,  1,  0,  0,  0, 0x20e010e0009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr },  // Inst #10894 = VPMOVSDBZrrkz
27496
  { 10895,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100011f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #10895 = VPMOVSDWZ128mr
27497
  { 10896,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x102011f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #10896 = VPMOVSDWZ128mrk
27498
  { 10897,  2,  1,  0,  0,  0, 0x100011e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10897 = VPMOVSDWZ128rr
27499
  { 10898,  4,  1,  0,  0,  0, 0x102011e0009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr },  // Inst #10898 = VPMOVSDWZ128rrk
27500
  { 10899,  3,  1,  0,  0,  0, 0x106011e0009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #10899 = VPMOVSDWZ128rrkz
27501
  { 10900,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200811f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #10900 = VPMOVSDWZ256mr
27502
  { 10901,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x202811f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #10901 = VPMOVSDWZ256mrk
27503
  { 10902,  2,  1,  0,  0,  0, 0x200811e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #10902 = VPMOVSDWZ256rr
27504
  { 10903,  4,  1,  0,  0,  0, 0x202811e0009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr },  // Inst #10903 = VPMOVSDWZ256rrk
27505
  { 10904,  3,  1,  0,  0,  0, 0x206811e0009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr },  // Inst #10904 = VPMOVSDWZ256rrkz
27506
  { 10905,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408011f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #10905 = VPMOVSDWZmr
27507
  { 10906,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a011f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #10906 = VPMOVSDWZmrk
27508
  { 10907,  2,  1,  0,  0,  0, 0x408011e0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #10907 = VPMOVSDWZrr
27509
  { 10908,  4,  1,  0,  0,  0, 0x40a011e0009803ULL, nullptr, nullptr, OperandInfo875, -1 ,nullptr },  // Inst #10908 = VPMOVSDWZrrk
27510
  { 10909,  3,  1,  0,  0,  0, 0x40e011e0009803ULL, nullptr, nullptr, OperandInfo876, -1 ,nullptr },  // Inst #10909 = VPMOVSDWZrrkz
27511
  { 10910,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4001178009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #10910 = VPMOVSQBZ128mr
27512
  { 10911,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4201178009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #10911 = VPMOVSQBZ128mrk
27513
  { 10912,  2,  1,  0,  0,  0, 0x4001160009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10912 = VPMOVSQBZ128rr
27514
  { 10913,  4,  1,  0,  0,  0, 0x4201160009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #10913 = VPMOVSQBZ128rrk
27515
  { 10914,  3,  1,  0,  0,  0, 0x4601160009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #10914 = VPMOVSQBZ128rrkz
27516
  { 10915,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x8081178009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #10915 = VPMOVSQBZ256mr
27517
  { 10916,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8281178009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #10916 = VPMOVSQBZ256mrk
27518
  { 10917,  2,  1,  0,  0,  0, 0x8081160009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #10917 = VPMOVSQBZ256rr
27519
  { 10918,  4,  1,  0,  0,  0, 0x8281160009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr },  // Inst #10918 = VPMOVSQBZ256rrk
27520
  { 10919,  3,  1,  0,  0,  0, 0x8681160009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr },  // Inst #10919 = VPMOVSQBZ256rrkz
27521
  { 10920,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10801178009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #10920 = VPMOVSQBZmr
27522
  { 10921,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10a01178009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #10921 = VPMOVSQBZmrk
27523
  { 10922,  2,  1,  0,  0,  0, 0x10801160009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr },  // Inst #10922 = VPMOVSQBZrr
27524
  { 10923,  4,  1,  0,  0,  0, 0x10a01160009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr },  // Inst #10923 = VPMOVSQBZrrk
27525
  { 10924,  3,  1,  0,  0,  0, 0x10e01160009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr },  // Inst #10924 = VPMOVSQBZrrkz
27526
  { 10925,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100012f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #10925 = VPMOVSQDZ128mr
27527
  { 10926,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x102012f8009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #10926 = VPMOVSQDZ128mrk
27528
  { 10927,  2,  1,  0,  0,  0, 0x100012e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10927 = VPMOVSQDZ128rr
27529
  { 10928,  4,  1,  0,  0,  0, 0x102012e0009803ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #10928 = VPMOVSQDZ128rrk
27530
  { 10929,  3,  1,  0,  0,  0, 0x106012e0009803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #10929 = VPMOVSQDZ128rrkz
27531
  { 10930,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200812f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #10930 = VPMOVSQDZ256mr
27532
  { 10931,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x202812f8009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #10931 = VPMOVSQDZ256mrk
27533
  { 10932,  2,  1,  0,  0,  0, 0x200812e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #10932 = VPMOVSQDZ256rr
27534
  { 10933,  4,  1,  0,  0,  0, 0x202812e0009803ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr },  // Inst #10933 = VPMOVSQDZ256rrk
27535
  { 10934,  3,  1,  0,  0,  0, 0x206812e0009803ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr },  // Inst #10934 = VPMOVSQDZ256rrkz
27536
  { 10935,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408012f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #10935 = VPMOVSQDZmr
27537
  { 10936,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a012f8009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #10936 = VPMOVSQDZmrk
27538
  { 10937,  2,  1,  0,  0,  0, 0x408012e0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #10937 = VPMOVSQDZrr
27539
  { 10938,  4,  1,  0,  0,  0, 0x40a012e0009803ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #10938 = VPMOVSQDZrrk
27540
  { 10939,  3,  1,  0,  0,  0, 0x40e012e0009803ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #10939 = VPMOVSQDZrrkz
27541
  { 10940,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x8001278009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #10940 = VPMOVSQWZ128mr
27542
  { 10941,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8201278009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #10941 = VPMOVSQWZ128mrk
27543
  { 10942,  2,  1,  0,  0,  0, 0x8001260009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10942 = VPMOVSQWZ128rr
27544
  { 10943,  4,  1,  0,  0,  0, 0x8201260009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr },  // Inst #10943 = VPMOVSQWZ128rrk
27545
  { 10944,  3,  1,  0,  0,  0, 0x8601260009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #10944 = VPMOVSQWZ128rrkz
27546
  { 10945,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10081278009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #10945 = VPMOVSQWZ256mr
27547
  { 10946,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10281278009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #10946 = VPMOVSQWZ256mrk
27548
  { 10947,  2,  1,  0,  0,  0, 0x10081260009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #10947 = VPMOVSQWZ256rr
27549
  { 10948,  4,  1,  0,  0,  0, 0x10281260009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr },  // Inst #10948 = VPMOVSQWZ256rrk
27550
  { 10949,  3,  1,  0,  0,  0, 0x10681260009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr },  // Inst #10949 = VPMOVSQWZ256rrkz
27551
  { 10950,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20801278009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #10950 = VPMOVSQWZmr
27552
  { 10951,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20a01278009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #10951 = VPMOVSQWZmrk
27553
  { 10952,  2,  1,  0,  0,  0, 0x20801260009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr },  // Inst #10952 = VPMOVSQWZrr
27554
  { 10953,  4,  1,  0,  0,  0, 0x20a01260009803ULL, nullptr, nullptr, OperandInfo886, -1 ,nullptr },  // Inst #10953 = VPMOVSQWZrrk
27555
  { 10954,  3,  1,  0,  0,  0, 0x20e01260009803ULL, nullptr, nullptr, OperandInfo887, -1 ,nullptr },  // Inst #10954 = VPMOVSQWZrrkz
27556
  { 10955,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001078009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #10955 = VPMOVSWBZ128mr
27557
  { 10956,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10201078009804ULL, nullptr, nullptr, OperandInfo661, -1 ,nullptr },  // Inst #10956 = VPMOVSWBZ128mrk
27558
  { 10957,  2,  1,  0,  0,  0, 0x10001060009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10957 = VPMOVSWBZ128rr
27559
  { 10958,  4,  1,  0,  0,  0, 0x10201060009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #10958 = VPMOVSWBZ128rrk
27560
  { 10959,  3,  1,  0,  0,  0, 0x10601060009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #10959 = VPMOVSWBZ128rrkz
27561
  { 10960,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20081078009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #10960 = VPMOVSWBZ256mr
27562
  { 10961,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20281078009804ULL, nullptr, nullptr, OperandInfo666, -1 ,nullptr },  // Inst #10961 = VPMOVSWBZ256mrk
27563
  { 10962,  2,  1,  0,  0,  0, 0x20081060009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #10962 = VPMOVSWBZ256rr
27564
  { 10963,  4,  1,  0,  0,  0, 0x20281060009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr },  // Inst #10963 = VPMOVSWBZ256rrk
27565
  { 10964,  3,  1,  0,  0,  0, 0x20681060009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr },  // Inst #10964 = VPMOVSWBZ256rrkz
27566
  { 10965,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801078009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #10965 = VPMOVSWBZmr
27567
  { 10966,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a01078009804ULL, nullptr, nullptr, OperandInfo671, -1 ,nullptr },  // Inst #10966 = VPMOVSWBZmrk
27568
  { 10967,  2,  1,  0,  0,  0, 0x40801060009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #10967 = VPMOVSWBZrr
27569
  { 10968,  4,  1,  0,  0,  0, 0x40a01060009803ULL, nullptr, nullptr, OperandInfo888, -1 ,nullptr },  // Inst #10968 = VPMOVSWBZrrk
27570
  { 10969,  3,  1,  0,  0,  0, 0x40e01060009803ULL, nullptr, nullptr, OperandInfo889, -1 ,nullptr },  // Inst #10969 = VPMOVSWBZrrkz
27571
  { 10970,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x810b8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #10970 = VPMOVSXBDYrm
27572
  { 10971,  2,  1,  0,  571,  0, 0x810b8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #10971 = VPMOVSXBDYrr
27573
  { 10972,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80010e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #10972 = VPMOVSXBDZ128rm
27574
  { 10973,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82010e0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #10973 = VPMOVSXBDZ128rmk
27575
  { 10974,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x86010e0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #10974 = VPMOVSXBDZ128rmkz
27576
  { 10975,  2,  1,  0,  0,  0, 0x80010e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10975 = VPMOVSXBDZ128rr
27577
  { 10976,  4,  1,  0,  0,  0, 0x82010e0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #10976 = VPMOVSXBDZ128rrk
27578
  { 10977,  3,  1,  0,  0,  0, 0x86010e0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #10977 = VPMOVSXBDZ128rrkz
27579
  { 10978,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100810e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #10978 = VPMOVSXBDZ256rm
27580
  { 10979,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x102810e0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #10979 = VPMOVSXBDZ256rmk
27581
  { 10980,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x106810e0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #10980 = VPMOVSXBDZ256rmkz
27582
  { 10981,  2,  1,  0,  0,  0, 0x100810e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #10981 = VPMOVSXBDZ256rr
27583
  { 10982,  4,  1,  0,  0,  0, 0x102810e0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr },  // Inst #10982 = VPMOVSXBDZ256rrk
27584
  { 10983,  3,  1,  0,  0,  0, 0x106810e0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr },  // Inst #10983 = VPMOVSXBDZ256rrkz
27585
  { 10984,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x208010e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #10984 = VPMOVSXBDZrm
27586
  { 10985,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a010e0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #10985 = VPMOVSXBDZrmk
27587
  { 10986,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e010e0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #10986 = VPMOVSXBDZrmkz
27588
  { 10987,  2,  1,  0,  0,  0, 0x208010e0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #10987 = VPMOVSXBDZrr
27589
  { 10988,  4,  1,  0,  0,  0, 0x20a010e0009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr },  // Inst #10988 = VPMOVSXBDZrrk
27590
  { 10989,  3,  1,  0,  0,  0, 0x20e010e0009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr },  // Inst #10989 = VPMOVSXBDZrrkz
27591
  { 10990,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x10b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #10990 = VPMOVSXBDrm
27592
  { 10991,  2,  1,  0,  571,  0, 0x10b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #10991 = VPMOVSXBDrr
27593
  { 10992,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x81138009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #10992 = VPMOVSXBQYrm
27594
  { 10993,  2,  1,  0,  792,  0, 0x81138009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #10993 = VPMOVSXBQYrr
27595
  { 10994,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4001160009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #10994 = VPMOVSXBQZ128rm
27596
  { 10995,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4201160009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #10995 = VPMOVSXBQZ128rmk
27597
  { 10996,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4601160009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #10996 = VPMOVSXBQZ128rmkz
27598
  { 10997,  2,  1,  0,  0,  0, 0x4001160009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #10997 = VPMOVSXBQZ128rr
27599
  { 10998,  4,  1,  0,  0,  0, 0x4201160009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #10998 = VPMOVSXBQZ128rrk
27600
  { 10999,  3,  1,  0,  0,  0, 0x4601160009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #10999 = VPMOVSXBQZ128rrkz
27601
  { 11000,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081160009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #11000 = VPMOVSXBQZ256rm
27602
  { 11001,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8281160009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #11001 = VPMOVSXBQZ256rmk
27603
  { 11002,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8681160009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #11002 = VPMOVSXBQZ256rmkz
27604
  { 11003,  2,  1,  0,  0,  0, 0x8081160009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #11003 = VPMOVSXBQZ256rr
27605
  { 11004,  4,  1,  0,  0,  0, 0x8281160009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #11004 = VPMOVSXBQZ256rrk
27606
  { 11005,  3,  1,  0,  0,  0, 0x8681160009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #11005 = VPMOVSXBQZ256rrkz
27607
  { 11006,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10801160009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #11006 = VPMOVSXBQZrm
27608
  { 11007,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a01160009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #11007 = VPMOVSXBQZrmk
27609
  { 11008,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10e01160009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #11008 = VPMOVSXBQZrmkz
27610
  { 11009,  2,  1,  0,  0,  0, 0x10801160009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #11009 = VPMOVSXBQZrr
27611
  { 11010,  4,  1,  0,  0,  0, 0x10a01160009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr },  // Inst #11010 = VPMOVSXBQZrrk
27612
  { 11011,  3,  1,  0,  0,  0, 0x10e01160009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr },  // Inst #11011 = VPMOVSXBQZrrkz
27613
  { 11012,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x1138009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #11012 = VPMOVSXBQrm
27614
  { 11013,  2,  1,  0,  571,  0, 0x1138009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #11013 = VPMOVSXBQrr
27615
  { 11014,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x81038009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #11014 = VPMOVSXBWYrm
27616
  { 11015,  2,  1,  0,  792,  0, 0x81038009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #11015 = VPMOVSXBWYrr
27617
  { 11016,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10001060009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #11016 = VPMOVSXBWZ128rm
27618
  { 11017,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10201060009006ULL, nullptr, nullptr, OperandInfo662, -1 ,nullptr },  // Inst #11017 = VPMOVSXBWZ128rmk
27619
  { 11018,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10601060009006ULL, nullptr, nullptr, OperandInfo663, -1 ,nullptr },  // Inst #11018 = VPMOVSXBWZ128rmkz
27620
  { 11019,  2,  1,  0,  0,  0, 0x10001060009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11019 = VPMOVSXBWZ128rr
27621
  { 11020,  4,  1,  0,  0,  0, 0x10201060009005ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr },  // Inst #11020 = VPMOVSXBWZ128rrk
27622
  { 11021,  3,  1,  0,  0,  0, 0x10601060009005ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #11021 = VPMOVSXBWZ128rrkz
27623
  { 11022,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20081060009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #11022 = VPMOVSXBWZ256rm
27624
  { 11023,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20281060009006ULL, nullptr, nullptr, OperandInfo667, -1 ,nullptr },  // Inst #11023 = VPMOVSXBWZ256rmk
27625
  { 11024,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20681060009006ULL, nullptr, nullptr, OperandInfo668, -1 ,nullptr },  // Inst #11024 = VPMOVSXBWZ256rmkz
27626
  { 11025,  2,  1,  0,  0,  0, 0x20081060009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #11025 = VPMOVSXBWZ256rr
27627
  { 11026,  4,  1,  0,  0,  0, 0x20281060009005ULL, nullptr, nullptr, OperandInfo770, -1 ,nullptr },  // Inst #11026 = VPMOVSXBWZ256rrk
27628
  { 11027,  3,  1,  0,  0,  0, 0x20681060009005ULL, nullptr, nullptr, OperandInfo771, -1 ,nullptr },  // Inst #11027 = VPMOVSXBWZ256rrkz
27629
  { 11028,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40801060009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #11028 = VPMOVSXBWZrm
27630
  { 11029,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a01060009006ULL, nullptr, nullptr, OperandInfo672, -1 ,nullptr },  // Inst #11029 = VPMOVSXBWZrmk
27631
  { 11030,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e01060009006ULL, nullptr, nullptr, OperandInfo673, -1 ,nullptr },  // Inst #11030 = VPMOVSXBWZrmkz
27632
  { 11031,  2,  1,  0,  0,  0, 0x40801060009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #11031 = VPMOVSXBWZrr
27633
  { 11032,  4,  1,  0,  0,  0, 0x40a01060009005ULL, nullptr, nullptr, OperandInfo890, -1 ,nullptr },  // Inst #11032 = VPMOVSXBWZrrk
27634
  { 11033,  3,  1,  0,  0,  0, 0x40e01060009005ULL, nullptr, nullptr, OperandInfo891, -1 ,nullptr },  // Inst #11033 = VPMOVSXBWZrrkz
27635
  { 11034,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x1038009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #11034 = VPMOVSXBWrm
27636
  { 11035,  2,  1,  0,  571,  0, 0x1038009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #11035 = VPMOVSXBWrr
27637
  { 11036,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x812b8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #11036 = VPMOVSXDQYrm
27638
  { 11037,  2,  1,  0,  792,  0, 0x812b8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #11037 = VPMOVSXDQYrr
27639
  { 11038,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100012e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #11038 = VPMOVSXDQZ128rm
27640
  { 11039,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x102012e0009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #11039 = VPMOVSXDQZ128rmk
27641
  { 11040,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x106012e0009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #11040 = VPMOVSXDQZ128rmkz
27642
  { 11041,  2,  1,  0,  0,  0, 0x100012e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11041 = VPMOVSXDQZ128rr
27643
  { 11042,  4,  1,  0,  0,  0, 0x102012e0009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #11042 = VPMOVSXDQZ128rrk
27644
  { 11043,  3,  1,  0,  0,  0, 0x106012e0009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #11043 = VPMOVSXDQZ128rrkz
27645
  { 11044,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200812e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #11044 = VPMOVSXDQZ256rm
27646
  { 11045,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202812e0009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #11045 = VPMOVSXDQZ256rmk
27647
  { 11046,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206812e0009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #11046 = VPMOVSXDQZ256rmkz
27648
  { 11047,  2,  1,  0,  0,  0, 0x200812e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #11047 = VPMOVSXDQZ256rr
27649
  { 11048,  4,  1,  0,  0,  0, 0x202812e0009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #11048 = VPMOVSXDQZ256rrk
27650
  { 11049,  3,  1,  0,  0,  0, 0x206812e0009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #11049 = VPMOVSXDQZ256rrkz
27651
  { 11050,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x408012e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #11050 = VPMOVSXDQZrm
27652
  { 11051,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a012e0009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #11051 = VPMOVSXDQZrmk
27653
  { 11052,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e012e0009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #11052 = VPMOVSXDQZrmkz
27654
  { 11053,  2,  1,  0,  0,  0, 0x408012e0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #11053 = VPMOVSXDQZrr
27655
  { 11054,  4,  1,  0,  0,  0, 0x40a012e0009005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #11054 = VPMOVSXDQZrrk
27656
  { 11055,  3,  1,  0,  0,  0, 0x40e012e0009005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #11055 = VPMOVSXDQZrrkz
27657
  { 11056,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x12b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #11056 = VPMOVSXDQrm
27658
  { 11057,  2,  1,  0,  571,  0, 0x12b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #11057 = VPMOVSXDQrr
27659
  { 11058,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x811b8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #11058 = VPMOVSXWDYrm
27660
  { 11059,  2,  1,  0,  571,  0, 0x811b8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #11059 = VPMOVSXWDYrr
27661
  { 11060,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100011e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #11060 = VPMOVSXWDZ128rm
27662
  { 11061,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x102011e0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #11061 = VPMOVSXWDZ128rmk
27663
  { 11062,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x106011e0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #11062 = VPMOVSXWDZ128rmkz
27664
  { 11063,  2,  1,  0,  0,  0, 0x100011e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11063 = VPMOVSXWDZ128rr
27665
  { 11064,  4,  1,  0,  0,  0, 0x102011e0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #11064 = VPMOVSXWDZ128rrk
27666
  { 11065,  3,  1,  0,  0,  0, 0x106011e0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #11065 = VPMOVSXWDZ128rrkz
27667
  { 11066,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200811e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #11066 = VPMOVSXWDZ256rm
27668
  { 11067,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202811e0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #11067 = VPMOVSXWDZ256rmk
27669
  { 11068,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206811e0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #11068 = VPMOVSXWDZ256rmkz
27670
  { 11069,  2,  1,  0,  0,  0, 0x200811e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #11069 = VPMOVSXWDZ256rr
27671
  { 11070,  4,  1,  0,  0,  0, 0x202811e0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr },  // Inst #11070 = VPMOVSXWDZ256rrk
27672
  { 11071,  3,  1,  0,  0,  0, 0x206811e0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr },  // Inst #11071 = VPMOVSXWDZ256rrkz
27673
  { 11072,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x408011e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #11072 = VPMOVSXWDZrm
27674
  { 11073,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a011e0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #11073 = VPMOVSXWDZrmk
27675
  { 11074,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e011e0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #11074 = VPMOVSXWDZrmkz
27676
  { 11075,  2,  1,  0,  0,  0, 0x408011e0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #11075 = VPMOVSXWDZrr
27677
  { 11076,  4,  1,  0,  0,  0, 0x40a011e0009005ULL, nullptr, nullptr, OperandInfo462, -1 ,nullptr },  // Inst #11076 = VPMOVSXWDZrrk
27678
  { 11077,  3,  1,  0,  0,  0, 0x40e011e0009005ULL, nullptr, nullptr, OperandInfo463, -1 ,nullptr },  // Inst #11077 = VPMOVSXWDZrrkz
27679
  { 11078,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x11b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #11078 = VPMOVSXWDrm
27680
  { 11079,  2,  1,  0,  571,  0, 0x11b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #11079 = VPMOVSXWDrr
27681
  { 11080,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x81238009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #11080 = VPMOVSXWQYrm
27682
  { 11081,  2,  1,  0,  571,  0, 0x81238009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #11081 = VPMOVSXWQYrr
27683
  { 11082,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8001260009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #11082 = VPMOVSXWQZ128rm
27684
  { 11083,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8201260009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #11083 = VPMOVSXWQZ128rmk
27685
  { 11084,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8601260009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #11084 = VPMOVSXWQZ128rmkz
27686
  { 11085,  2,  1,  0,  0,  0, 0x8001260009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11085 = VPMOVSXWQZ128rr
27687
  { 11086,  4,  1,  0,  0,  0, 0x8201260009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #11086 = VPMOVSXWQZ128rrk
27688
  { 11087,  3,  1,  0,  0,  0, 0x8601260009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #11087 = VPMOVSXWQZ128rrkz
27689
  { 11088,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10081260009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #11088 = VPMOVSXWQZ256rm
27690
  { 11089,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10281260009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #11089 = VPMOVSXWQZ256rmk
27691
  { 11090,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10681260009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #11090 = VPMOVSXWQZ256rmkz
27692
  { 11091,  2,  1,  0,  0,  0, 0x10081260009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #11091 = VPMOVSXWQZ256rr
27693
  { 11092,  4,  1,  0,  0,  0, 0x10281260009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #11092 = VPMOVSXWQZ256rrk
27694
  { 11093,  3,  1,  0,  0,  0, 0x10681260009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #11093 = VPMOVSXWQZ256rrkz
27695
  { 11094,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20801260009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #11094 = VPMOVSXWQZrm
27696
  { 11095,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a01260009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #11095 = VPMOVSXWQZrmk
27697
  { 11096,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e01260009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #11096 = VPMOVSXWQZrmkz
27698
  { 11097,  2,  1,  0,  0,  0, 0x20801260009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #11097 = VPMOVSXWQZrr
27699
  { 11098,  4,  1,  0,  0,  0, 0x20a01260009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr },  // Inst #11098 = VPMOVSXWQZrrk
27700
  { 11099,  3,  1,  0,  0,  0, 0x20e01260009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr },  // Inst #11099 = VPMOVSXWQZrrkz
27701
  { 11100,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x1238009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #11100 = VPMOVSXWQrm
27702
  { 11101,  2,  1,  0,  571,  0, 0x1238009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #11101 = VPMOVSXWQrr
27703
  { 11102,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80008f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #11102 = VPMOVUSDBZ128mr
27704
  { 11103,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x82008f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #11103 = VPMOVUSDBZ128mrk
27705
  { 11104,  2,  1,  0,  0,  0, 0x80008e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11104 = VPMOVUSDBZ128rr
27706
  { 11105,  4,  1,  0,  0,  0, 0x82008e0009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #11105 = VPMOVUSDBZ128rrk
27707
  { 11106,  3,  1,  0,  0,  0, 0x86008e0009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #11106 = VPMOVUSDBZ128rrkz
27708
  { 11107,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100808f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #11107 = VPMOVUSDBZ256mr
27709
  { 11108,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x102808f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #11108 = VPMOVUSDBZ256mrk
27710
  { 11109,  2,  1,  0,  0,  0, 0x100808e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #11109 = VPMOVUSDBZ256rr
27711
  { 11110,  4,  1,  0,  0,  0, 0x102808e0009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr },  // Inst #11110 = VPMOVUSDBZ256rrk
27712
  { 11111,  3,  1,  0,  0,  0, 0x106808e0009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr },  // Inst #11111 = VPMOVUSDBZ256rrkz
27713
  { 11112,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x208008f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #11112 = VPMOVUSDBZmr
27714
  { 11113,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20a008f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #11113 = VPMOVUSDBZmrk
27715
  { 11114,  2,  1,  0,  0,  0, 0x208008e0009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr },  // Inst #11114 = VPMOVUSDBZrr
27716
  { 11115,  4,  1,  0,  0,  0, 0x20a008e0009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr },  // Inst #11115 = VPMOVUSDBZrrk
27717
  { 11116,  3,  1,  0,  0,  0, 0x20e008e0009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr },  // Inst #11116 = VPMOVUSDBZrrkz
27718
  { 11117,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100009f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #11117 = VPMOVUSDWZ128mr
27719
  { 11118,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x102009f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr },  // Inst #11118 = VPMOVUSDWZ128mrk
27720
  { 11119,  2,  1,  0,  0,  0, 0x100009e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11119 = VPMOVUSDWZ128rr
27721
  { 11120,  4,  1,  0,  0,  0, 0x102009e0009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr },  // Inst #11120 = VPMOVUSDWZ128rrk
27722
  { 11121,  3,  1,  0,  0,  0, 0x106009e0009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #11121 = VPMOVUSDWZ128rrkz
27723
  { 11122,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200809f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #11122 = VPMOVUSDWZ256mr
27724
  { 11123,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x202809f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr },  // Inst #11123 = VPMOVUSDWZ256mrk
27725
  { 11124,  2,  1,  0,  0,  0, 0x200809e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #11124 = VPMOVUSDWZ256rr
27726
  { 11125,  4,  1,  0,  0,  0, 0x202809e0009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr },  // Inst #11125 = VPMOVUSDWZ256rrk
27727
  { 11126,  3,  1,  0,  0,  0, 0x206809e0009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr },  // Inst #11126 = VPMOVUSDWZ256rrkz
27728
  { 11127,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408009f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #11127 = VPMOVUSDWZmr
27729
  { 11128,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a009f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr },  // Inst #11128 = VPMOVUSDWZmrk
27730
  { 11129,  2,  1,  0,  0,  0, 0x408009e0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #11129 = VPMOVUSDWZrr
27731
  { 11130,  4,  1,  0,  0,  0, 0x40a009e0009803ULL, nullptr, nullptr, OperandInfo875, -1 ,nullptr },  // Inst #11130 = VPMOVUSDWZrrk
27732
  { 11131,  3,  1,  0,  0,  0, 0x40e009e0009803ULL, nullptr, nullptr, OperandInfo876, -1 ,nullptr },  // Inst #11131 = VPMOVUSDWZrrkz
27733
  { 11132,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000978009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #11132 = VPMOVUSQBZ128mr
27734
  { 11133,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4200978009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #11133 = VPMOVUSQBZ128mrk
27735
  { 11134,  2,  1,  0,  0,  0, 0x4000960009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11134 = VPMOVUSQBZ128rr
27736
  { 11135,  4,  1,  0,  0,  0, 0x4200960009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #11135 = VPMOVUSQBZ128rrk
27737
  { 11136,  3,  1,  0,  0,  0, 0x4600960009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #11136 = VPMOVUSQBZ128rrkz
27738
  { 11137,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x8080978009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #11137 = VPMOVUSQBZ256mr
27739
  { 11138,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8280978009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #11138 = VPMOVUSQBZ256mrk
27740
  { 11139,  2,  1,  0,  0,  0, 0x8080960009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #11139 = VPMOVUSQBZ256rr
27741
  { 11140,  4,  1,  0,  0,  0, 0x8280960009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr },  // Inst #11140 = VPMOVUSQBZ256rrk
27742
  { 11141,  3,  1,  0,  0,  0, 0x8680960009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr },  // Inst #11141 = VPMOVUSQBZ256rrkz
27743
  { 11142,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10800978009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #11142 = VPMOVUSQBZmr
27744
  { 11143,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10a00978009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #11143 = VPMOVUSQBZmrk
27745
  { 11144,  2,  1,  0,  0,  0, 0x10800960009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr },  // Inst #11144 = VPMOVUSQBZrr
27746
  { 11145,  4,  1,  0,  0,  0, 0x10a00960009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr },  // Inst #11145 = VPMOVUSQBZrrk
27747
  { 11146,  3,  1,  0,  0,  0, 0x10e00960009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr },  // Inst #11146 = VPMOVUSQBZrrkz
27748
  { 11147,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10000af8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #11147 = VPMOVUSQDZ128mr
27749
  { 11148,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10200af8009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #11148 = VPMOVUSQDZ128mrk
27750
  { 11149,  2,  1,  0,  0,  0, 0x10000ae0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11149 = VPMOVUSQDZ128rr
27751
  { 11150,  4,  1,  0,  0,  0, 0x10200ae0009803ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #11150 = VPMOVUSQDZ128rrk
27752
  { 11151,  3,  1,  0,  0,  0, 0x10600ae0009803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #11151 = VPMOVUSQDZ128rrkz
27753
  { 11152,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20080af8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #11152 = VPMOVUSQDZ256mr
27754
  { 11153,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20280af8009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #11153 = VPMOVUSQDZ256mrk
27755
  { 11154,  2,  1,  0,  0,  0, 0x20080ae0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #11154 = VPMOVUSQDZ256rr
27756
  { 11155,  4,  1,  0,  0,  0, 0x20280ae0009803ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr },  // Inst #11155 = VPMOVUSQDZ256rrk
27757
  { 11156,  3,  1,  0,  0,  0, 0x20680ae0009803ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr },  // Inst #11156 = VPMOVUSQDZ256rrkz
27758
  { 11157,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800af8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #11157 = VPMOVUSQDZmr
27759
  { 11158,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a00af8009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #11158 = VPMOVUSQDZmrk
27760
  { 11159,  2,  1,  0,  0,  0, 0x40800ae0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #11159 = VPMOVUSQDZrr
27761
  { 11160,  4,  1,  0,  0,  0, 0x40a00ae0009803ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr },  // Inst #11160 = VPMOVUSQDZrrk
27762
  { 11161,  3,  1,  0,  0,  0, 0x40e00ae0009803ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr },  // Inst #11161 = VPMOVUSQDZrrkz
27763
  { 11162,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x8000a78009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #11162 = VPMOVUSQWZ128mr
27764
  { 11163,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8200a78009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr },  // Inst #11163 = VPMOVUSQWZ128mrk
27765
  { 11164,  2,  1,  0,  0,  0, 0x8000a60009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11164 = VPMOVUSQWZ128rr
27766
  { 11165,  4,  1,  0,  0,  0, 0x8200a60009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr },  // Inst #11165 = VPMOVUSQWZ128rrk
27767
  { 11166,  3,  1,  0,  0,  0, 0x8600a60009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #11166 = VPMOVUSQWZ128rrkz
27768
  { 11167,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10080a78009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #11167 = VPMOVUSQWZ256mr
27769
  { 11168,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10280a78009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr },  // Inst #11168 = VPMOVUSQWZ256mrk
27770
  { 11169,  2,  1,  0,  0,  0, 0x10080a60009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #11169 = VPMOVUSQWZ256rr
27771
  { 11170,  4,  1,  0,  0,  0, 0x10280a60009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr },  // Inst #11170 = VPMOVUSQWZ256rrk
27772
  { 11171,  3,  1,  0,  0,  0, 0x10680a60009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr },  // Inst #11171 = VPMOVUSQWZ256rrkz
27773
  { 11172,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20800a78009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #11172 = VPMOVUSQWZmr
27774
  { 11173,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20a00a78009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr },  // Inst #11173 = VPMOVUSQWZmrk
27775
  { 11174,  2,  1,  0,  0,  0, 0x20800a60009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr },  // Inst #11174 = VPMOVUSQWZrr
27776
  { 11175,  4,  1,  0,  0,  0, 0x20a00a60009803ULL, nullptr, nullptr, OperandInfo886, -1 ,nullptr },  // Inst #11175 = VPMOVUSQWZrrk
27777
  { 11176,  3,  1,  0,  0,  0, 0x20e00a60009803ULL, nullptr, nullptr, OperandInfo887, -1 ,nullptr },  // Inst #11176 = VPMOVUSQWZrrkz
27778
  { 11177,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10000878009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #11177 = VPMOVUSWBZ128mr
27779
  { 11178,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10200878009804ULL, nullptr, nullptr, OperandInfo661, -1 ,nullptr },  // Inst #11178 = VPMOVUSWBZ128mrk
27780
  { 11179,  2,  1,  0,  0,  0, 0x10000860009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11179 = VPMOVUSWBZ128rr
27781
  { 11180,  4,  1,  0,  0,  0, 0x10200860009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #11180 = VPMOVUSWBZ128rrk
27782
  { 11181,  3,  1,  0,  0,  0, 0x10600860009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #11181 = VPMOVUSWBZ128rrkz
27783
  { 11182,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20080878009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #11182 = VPMOVUSWBZ256mr
27784
  { 11183,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20280878009804ULL, nullptr, nullptr, OperandInfo666, -1 ,nullptr },  // Inst #11183 = VPMOVUSWBZ256mrk
27785
  { 11184,  2,  1,  0,  0,  0, 0x20080860009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #11184 = VPMOVUSWBZ256rr
27786
  { 11185,  4,  1,  0,  0,  0, 0x20280860009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr },  // Inst #11185 = VPMOVUSWBZ256rrk
27787
  { 11186,  3,  1,  0,  0,  0, 0x20680860009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr },  // Inst #11186 = VPMOVUSWBZ256rrkz
27788
  { 11187,  6,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800878009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #11187 = VPMOVUSWBZmr
27789
  { 11188,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a00878009804ULL, nullptr, nullptr, OperandInfo671, -1 ,nullptr },  // Inst #11188 = VPMOVUSWBZmrk
27790
  { 11189,  2,  1,  0,  0,  0, 0x40800860009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #11189 = VPMOVUSWBZrr
27791
  { 11190,  4,  1,  0,  0,  0, 0x40a00860009803ULL, nullptr, nullptr, OperandInfo888, -1 ,nullptr },  // Inst #11190 = VPMOVUSWBZrrk
27792
  { 11191,  3,  1,  0,  0,  0, 0x40e00860009803ULL, nullptr, nullptr, OperandInfo889, -1 ,nullptr },  // Inst #11191 = VPMOVUSWBZrrkz
27793
  { 11192,  2,  1,  0,  0,  0, 0x200094f8009805ULL, nullptr, nullptr, OperandInfo892, -1 ,nullptr },  // Inst #11192 = VPMOVW2MZ128rr
27794
  { 11193,  2,  1,  0,  0,  0, 0x400894f8009805ULL, nullptr, nullptr, OperandInfo893, -1 ,nullptr },  // Inst #11193 = VPMOVW2MZ256rr
27795
  { 11194,  2,  1,  0,  0,  0, 0x808094f8009805ULL, nullptr, nullptr, OperandInfo894, -1 ,nullptr },  // Inst #11194 = VPMOVW2MZrr
27796
  { 11195,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10001878009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr },  // Inst #11195 = VPMOVWBZ128mr
27797
  { 11196,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10201878009804ULL, nullptr, nullptr, OperandInfo661, -1 ,nullptr },  // Inst #11196 = VPMOVWBZ128mrk
27798
  { 11197,  2,  1,  0,  0,  0, 0x10001860009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11197 = VPMOVWBZ128rr
27799
  { 11198,  4,  1,  0,  0,  0, 0x10201860009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr },  // Inst #11198 = VPMOVWBZ128rrk
27800
  { 11199,  3,  1,  0,  0,  0, 0x10601860009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr },  // Inst #11199 = VPMOVWBZ128rrkz
27801
  { 11200,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20081878009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr },  // Inst #11200 = VPMOVWBZ256mr
27802
  { 11201,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x20281878009804ULL, nullptr, nullptr, OperandInfo666, -1 ,nullptr },  // Inst #11201 = VPMOVWBZ256mrk
27803
  { 11202,  2,  1,  0,  0,  0, 0x20081860009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr },  // Inst #11202 = VPMOVWBZ256rr
27804
  { 11203,  4,  1,  0,  0,  0, 0x20281860009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr },  // Inst #11203 = VPMOVWBZ256rrk
27805
  { 11204,  3,  1,  0,  0,  0, 0x20681860009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr },  // Inst #11204 = VPMOVWBZ256rrkz
27806
  { 11205,  6,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40801878009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr },  // Inst #11205 = VPMOVWBZmr
27807
  { 11206,  7,  0,  0,  0,  0|(1ULL<<MCID::MayStore), 0x40a01878009804ULL, nullptr, nullptr, OperandInfo671, -1 ,nullptr },  // Inst #11206 = VPMOVWBZmrk
27808
  { 11207,  2,  1,  0,  0,  0, 0x40801860009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr },  // Inst #11207 = VPMOVWBZrr
27809
  { 11208,  4,  1,  0,  0,  0, 0x40a01860009803ULL, nullptr, nullptr, OperandInfo888, -1 ,nullptr },  // Inst #11208 = VPMOVWBZrrk
27810
  { 11209,  3,  1,  0,  0,  0, 0x40e01860009803ULL, nullptr, nullptr, OperandInfo889, -1 ,nullptr },  // Inst #11209 = VPMOVWBZrrkz
27811
  { 11210,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x818b8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #11210 = VPMOVZXBDYrm
27812
  { 11211,  2,  1,  0,  571,  0, 0x818b8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #11211 = VPMOVZXBDYrr
27813
  { 11212,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80018e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #11212 = VPMOVZXBDZ128rm
27814
  { 11213,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82018e0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #11213 = VPMOVZXBDZ128rmk
27815
  { 11214,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x86018e0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #11214 = VPMOVZXBDZ128rmkz
27816
  { 11215,  2,  1,  0,  0,  0, 0x80018e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11215 = VPMOVZXBDZ128rr
27817
  { 11216,  4,  1,  0,  0,  0, 0x82018e0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #11216 = VPMOVZXBDZ128rrk
27818
  { 11217,  3,  1,  0,  0,  0, 0x86018e0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #11217 = VPMOVZXBDZ128rrkz
27819
  { 11218,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100818e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #11218 = VPMOVZXBDZ256rm
27820
  { 11219,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x102818e0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #11219 = VPMOVZXBDZ256rmk
27821
  { 11220,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x106818e0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #11220 = VPMOVZXBDZ256rmkz
27822
  { 11221,  2,  1,  0,  0,  0, 0x100818e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #11221 = VPMOVZXBDZ256rr
27823
  { 11222,  4,  1,  0,  0,  0, 0x102818e0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr },  // Inst #11222 = VPMOVZXBDZ256rrk
27824
  { 11223,  3,  1,  0,  0,  0, 0x106818e0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr },  // Inst #11223 = VPMOVZXBDZ256rrkz
27825
  { 11224,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x208018e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #11224 = VPMOVZXBDZrm
27826
  { 11225,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a018e0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #11225 = VPMOVZXBDZrmk
27827
  { 11226,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e018e0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #11226 = VPMOVZXBDZrmkz
27828
  { 11227,  2,  1,  0,  0,  0, 0x208018e0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #11227 = VPMOVZXBDZrr
27829
  { 11228,  4,  1,  0,  0,  0, 0x20a018e0009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr },  // Inst #11228 = VPMOVZXBDZrrk
27830
  { 11229,  3,  1,  0,  0,  0, 0x20e018e0009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr },  // Inst #11229 = VPMOVZXBDZrrkz
27831
  { 11230,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x18b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #11230 = VPMOVZXBDrm
27832
  { 11231,  2,  1,  0,  571,  0, 0x18b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #11231 = VPMOVZXBDrr
27833
  { 11232,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x81938009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #11232 = VPMOVZXBQYrm
27834
  { 11233,  2,  1,  0,  792,  0, 0x81938009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #11233 = VPMOVZXBQYrr
27835
  { 11234,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4001960009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #11234 = VPMOVZXBQZ128rm
27836
  { 11235,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4201960009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #11235 = VPMOVZXBQZ128rmk
27837
  { 11236,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4601960009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #11236 = VPMOVZXBQZ128rmkz
27838
  { 11237,  2,  1,  0,  0,  0, 0x4001960009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11237 = VPMOVZXBQZ128rr
27839
  { 11238,  4,  1,  0,  0,  0, 0x4201960009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #11238 = VPMOVZXBQZ128rrk
27840
  { 11239,  3,  1,  0,  0,  0, 0x4601960009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #11239 = VPMOVZXBQZ128rrkz
27841
  { 11240,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081960009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #11240 = VPMOVZXBQZ256rm
27842
  { 11241,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8281960009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #11241 = VPMOVZXBQZ256rmk
27843
  { 11242,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8681960009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #11242 = VPMOVZXBQZ256rmkz
27844
  { 11243,  2,  1,  0,  0,  0, 0x8081960009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #11243 = VPMOVZXBQZ256rr
27845
  { 11244,  4,  1,  0,  0,  0, 0x8281960009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #11244 = VPMOVZXBQZ256rrk
27846
  { 11245,  3,  1,  0,  0,  0, 0x8681960009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #11245 = VPMOVZXBQZ256rrkz
27847
  { 11246,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10801960009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #11246 = VPMOVZXBQZrm
27848
  { 11247,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10a01960009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #11247 = VPMOVZXBQZrmk
27849
  { 11248,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10e01960009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #11248 = VPMOVZXBQZrmkz
27850
  { 11249,  2,  1,  0,  0,  0, 0x10801960009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #11249 = VPMOVZXBQZrr
27851
  { 11250,  4,  1,  0,  0,  0, 0x10a01960009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr },  // Inst #11250 = VPMOVZXBQZrrk
27852
  { 11251,  3,  1,  0,  0,  0, 0x10e01960009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr },  // Inst #11251 = VPMOVZXBQZrrkz
27853
  { 11252,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x1938009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #11252 = VPMOVZXBQrm
27854
  { 11253,  2,  1,  0,  571,  0, 0x1938009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #11253 = VPMOVZXBQrr
27855
  { 11254,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x81838009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #11254 = VPMOVZXBWYrm
27856
  { 11255,  2,  1,  0,  792,  0, 0x81838009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #11255 = VPMOVZXBWYrr
27857
  { 11256,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10001860009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #11256 = VPMOVZXBWZ128rm
27858
  { 11257,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10201860009006ULL, nullptr, nullptr, OperandInfo662, -1 ,nullptr },  // Inst #11257 = VPMOVZXBWZ128rmk
27859
  { 11258,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10601860009006ULL, nullptr, nullptr, OperandInfo663, -1 ,nullptr },  // Inst #11258 = VPMOVZXBWZ128rmkz
27860
  { 11259,  2,  1,  0,  0,  0, 0x10001860009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11259 = VPMOVZXBWZ128rr
27861
  { 11260,  4,  1,  0,  0,  0, 0x10201860009005ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr },  // Inst #11260 = VPMOVZXBWZ128rrk
27862
  { 11261,  3,  1,  0,  0,  0, 0x10601860009005ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr },  // Inst #11261 = VPMOVZXBWZ128rrkz
27863
  { 11262,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20081860009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #11262 = VPMOVZXBWZ256rm
27864
  { 11263,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20281860009006ULL, nullptr, nullptr, OperandInfo667, -1 ,nullptr },  // Inst #11263 = VPMOVZXBWZ256rmk
27865
  { 11264,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20681860009006ULL, nullptr, nullptr, OperandInfo668, -1 ,nullptr },  // Inst #11264 = VPMOVZXBWZ256rmkz
27866
  { 11265,  2,  1,  0,  0,  0, 0x20081860009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #11265 = VPMOVZXBWZ256rr
27867
  { 11266,  4,  1,  0,  0,  0, 0x20281860009005ULL, nullptr, nullptr, OperandInfo770, -1 ,nullptr },  // Inst #11266 = VPMOVZXBWZ256rrk
27868
  { 11267,  3,  1,  0,  0,  0, 0x20681860009005ULL, nullptr, nullptr, OperandInfo771, -1 ,nullptr },  // Inst #11267 = VPMOVZXBWZ256rrkz
27869
  { 11268,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40801860009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #11268 = VPMOVZXBWZrm
27870
  { 11269,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a01860009006ULL, nullptr, nullptr, OperandInfo672, -1 ,nullptr },  // Inst #11269 = VPMOVZXBWZrmk
27871
  { 11270,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e01860009006ULL, nullptr, nullptr, OperandInfo673, -1 ,nullptr },  // Inst #11270 = VPMOVZXBWZrmkz
27872
  { 11271,  2,  1,  0,  0,  0, 0x40801860009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #11271 = VPMOVZXBWZrr
27873
  { 11272,  4,  1,  0,  0,  0, 0x40a01860009005ULL, nullptr, nullptr, OperandInfo890, -1 ,nullptr },  // Inst #11272 = VPMOVZXBWZrrk
27874
  { 11273,  3,  1,  0,  0,  0, 0x40e01860009005ULL, nullptr, nullptr, OperandInfo891, -1 ,nullptr },  // Inst #11273 = VPMOVZXBWZrrkz
27875
  { 11274,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x1838009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #11274 = VPMOVZXBWrm
27876
  { 11275,  2,  1,  0,  571,  0, 0x1838009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #11275 = VPMOVZXBWrr
27877
  { 11276,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x81ab8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #11276 = VPMOVZXDQYrm
27878
  { 11277,  2,  1,  0,  792,  0, 0x81ab8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #11277 = VPMOVZXDQYrr
27879
  { 11278,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10001ae0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #11278 = VPMOVZXDQZ128rm
27880
  { 11279,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10201ae0009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #11279 = VPMOVZXDQZ128rmk
27881
  { 11280,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10601ae0009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #11280 = VPMOVZXDQZ128rmkz
27882
  { 11281,  2,  1,  0,  0,  0, 0x10001ae0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11281 = VPMOVZXDQZ128rr
27883
  { 11282,  4,  1,  0,  0,  0, 0x10201ae0009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #11282 = VPMOVZXDQZ128rrk
27884
  { 11283,  3,  1,  0,  0,  0, 0x10601ae0009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #11283 = VPMOVZXDQZ128rrkz
27885
  { 11284,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20081ae0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #11284 = VPMOVZXDQZ256rm
27886
  { 11285,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20281ae0009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #11285 = VPMOVZXDQZ256rmk
27887
  { 11286,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20681ae0009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #11286 = VPMOVZXDQZ256rmkz
27888
  { 11287,  2,  1,  0,  0,  0, 0x20081ae0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #11287 = VPMOVZXDQZ256rr
27889
  { 11288,  4,  1,  0,  0,  0, 0x20281ae0009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #11288 = VPMOVZXDQZ256rrk
27890
  { 11289,  3,  1,  0,  0,  0, 0x20681ae0009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #11289 = VPMOVZXDQZ256rrkz
27891
  { 11290,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40801ae0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #11290 = VPMOVZXDQZrm
27892
  { 11291,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a01ae0009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #11291 = VPMOVZXDQZrmk
27893
  { 11292,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e01ae0009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #11292 = VPMOVZXDQZrmkz
27894
  { 11293,  2,  1,  0,  0,  0, 0x40801ae0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #11293 = VPMOVZXDQZrr
27895
  { 11294,  4,  1,  0,  0,  0, 0x40a01ae0009005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr },  // Inst #11294 = VPMOVZXDQZrrk
27896
  { 11295,  3,  1,  0,  0,  0, 0x40e01ae0009005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr },  // Inst #11295 = VPMOVZXDQZrrkz
27897
  { 11296,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x1ab8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #11296 = VPMOVZXDQrm
27898
  { 11297,  2,  1,  0,  571,  0, 0x1ab8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #11297 = VPMOVZXDQrr
27899
  { 11298,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x819b8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #11298 = VPMOVZXWDYrm
27900
  { 11299,  2,  1,  0,  571,  0, 0x819b8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #11299 = VPMOVZXWDYrr
27901
  { 11300,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100019e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #11300 = VPMOVZXWDZ128rm
27902
  { 11301,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x102019e0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #11301 = VPMOVZXWDZ128rmk
27903
  { 11302,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x106019e0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #11302 = VPMOVZXWDZ128rmkz
27904
  { 11303,  2,  1,  0,  0,  0, 0x100019e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11303 = VPMOVZXWDZ128rr
27905
  { 11304,  4,  1,  0,  0,  0, 0x102019e0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #11304 = VPMOVZXWDZ128rrk
27906
  { 11305,  3,  1,  0,  0,  0, 0x106019e0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #11305 = VPMOVZXWDZ128rrkz
27907
  { 11306,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200819e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #11306 = VPMOVZXWDZ256rm
27908
  { 11307,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202819e0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #11307 = VPMOVZXWDZ256rmk
27909
  { 11308,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206819e0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #11308 = VPMOVZXWDZ256rmkz
27910
  { 11309,  2,  1,  0,  0,  0, 0x200819e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #11309 = VPMOVZXWDZ256rr
27911
  { 11310,  4,  1,  0,  0,  0, 0x202819e0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr },  // Inst #11310 = VPMOVZXWDZ256rrk
27912
  { 11311,  3,  1,  0,  0,  0, 0x206819e0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr },  // Inst #11311 = VPMOVZXWDZ256rrkz
27913
  { 11312,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x408019e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #11312 = VPMOVZXWDZrm
27914
  { 11313,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40a019e0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #11313 = VPMOVZXWDZrmk
27915
  { 11314,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40e019e0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #11314 = VPMOVZXWDZrmkz
27916
  { 11315,  2,  1,  0,  0,  0, 0x408019e0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr },  // Inst #11315 = VPMOVZXWDZrr
27917
  { 11316,  4,  1,  0,  0,  0, 0x40a019e0009005ULL, nullptr, nullptr, OperandInfo462, -1 ,nullptr },  // Inst #11316 = VPMOVZXWDZrrk
27918
  { 11317,  3,  1,  0,  0,  0, 0x40e019e0009005ULL, nullptr, nullptr, OperandInfo463, -1 ,nullptr },  // Inst #11317 = VPMOVZXWDZrrkz
27919
  { 11318,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x19b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #11318 = VPMOVZXWDrm
27920
  { 11319,  2,  1,  0,  571,  0, 0x19b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #11319 = VPMOVZXWDrr
27921
  { 11320,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x81a38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #11320 = VPMOVZXWQYrm
27922
  { 11321,  2,  1,  0,  571,  0, 0x81a38009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr },  // Inst #11321 = VPMOVZXWQYrr
27923
  { 11322,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8001a60009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #11322 = VPMOVZXWQZ128rm
27924
  { 11323,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8201a60009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #11323 = VPMOVZXWQZ128rmk
27925
  { 11324,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8601a60009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #11324 = VPMOVZXWQZ128rmkz
27926
  { 11325,  2,  1,  0,  0,  0, 0x8001a60009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #11325 = VPMOVZXWQZ128rr
27927
  { 11326,  4,  1,  0,  0,  0, 0x8201a60009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #11326 = VPMOVZXWQZ128rrk
27928
  { 11327,  3,  1,  0,  0,  0, 0x8601a60009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #11327 = VPMOVZXWQZ128rrkz
27929
  { 11328,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10081a60009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #11328 = VPMOVZXWQZ256rm
27930
  { 11329,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10281a60009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #11329 = VPMOVZXWQZ256rmk
27931
  { 11330,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x10681a60009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #11330 = VPMOVZXWQZ256rmkz
27932
  { 11331,  2,  1,  0,  0,  0, 0x10081a60009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr },  // Inst #11331 = VPMOVZXWQZ256rr
27933
  { 11332,  4,  1,  0,  0,  0, 0x10281a60009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr },  // Inst #11332 = VPMOVZXWQZ256rrk
27934
  { 11333,  3,  1,  0,  0,  0, 0x10681a60009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr },  // Inst #11333 = VPMOVZXWQZ256rrkz
27935
  { 11334,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20801a60009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #11334 = VPMOVZXWQZrm
27936
  { 11335,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a01a60009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #11335 = VPMOVZXWQZrmk
27937
  { 11336,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e01a60009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #11336 = VPMOVZXWQZrmkz
27938
  { 11337,  2,  1,  0,  0,  0, 0x20801a60009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr },  // Inst #11337 = VPMOVZXWQZrr
27939
  { 11338,  4,  1,  0,  0,  0, 0x20a01a60009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr },  // Inst #11338 = VPMOVZXWQZrrk
27940
  { 11339,  3,  1,  0,  0,  0, 0x20e01a60009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr },  // Inst #11339 = VPMOVZXWQZrrkz
27941
  { 11340,  6,  1,  0,  570,  0|(1ULL<<MCID::MayLoad), 0x1a38009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #11340 = VPMOVZXWQrm
27942
  { 11341,  2,  1,  0,  571,  0, 0x1a38009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #11341 = VPMOVZXWQrr
27943
  { 11342,  7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x91438009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #11342 = VPMULDQYrm
27944
  { 11343,  3,  1,  0,  408,  0|(1ULL<<MCID::Commutable), 0x91438009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #11343 = VPMULDQYrr
27945
  { 11344,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20019478009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11344 = VPMULDQZ128rm
27946
  { 11345,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11019478009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11345 = VPMULDQZ128rmb
27947
  { 11346,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11219478009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11346 = VPMULDQZ128rmbk
27948
  { 11347,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11619478009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11347 = VPMULDQZ128rmbkz
27949
  { 11348,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20219478009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11348 = VPMULDQZ128rmk
27950
  { 11349,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20619478009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11349 = VPMULDQZ128rmkz
27951
  { 11350,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20019478009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11350 = VPMULDQZ128rr
27952
  { 11351,  5,  1,  0,  0,  0, 0x20219478009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #11351 = VPMULDQZ128rrk
27953
  { 11352,  4,  1,  0,  0,  0, 0x20619478009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #11352 = VPMULDQZ128rrkz
27954
  { 11353,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40099478009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11353 = VPMULDQZ256rm
27955
  { 11354,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11099478009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11354 = VPMULDQZ256rmb
27956
  { 11355,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11299478009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11355 = VPMULDQZ256rmbk
27957
  { 11356,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11699478009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11356 = VPMULDQZ256rmbkz
27958
  { 11357,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40299478009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11357 = VPMULDQZ256rmk
27959
  { 11358,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40699478009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11358 = VPMULDQZ256rmkz
27960
  { 11359,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40099478009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11359 = VPMULDQZ256rr
27961
  { 11360,  5,  1,  0,  0,  0, 0x40299478009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #11360 = VPMULDQZ256rrk
27962
  { 11361,  4,  1,  0,  0,  0, 0x40699478009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #11361 = VPMULDQZ256rrkz
27963
  { 11362,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80819478009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11362 = VPMULDQZrm
27964
  { 11363,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11819478009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11363 = VPMULDQZrmb
27965
  { 11364,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a19478009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11364 = VPMULDQZrmbk
27966
  { 11365,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e19478009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11365 = VPMULDQZrmbkz
27967
  { 11366,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a19478009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11366 = VPMULDQZrmk
27968
  { 11367,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e19478009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11367 = VPMULDQZrmkz
27969
  { 11368,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80819478009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11368 = VPMULDQZrr
27970
  { 11369,  5,  1,  0,  0,  0, 0x80a19478009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #11369 = VPMULDQZrrk
27971
  { 11370,  4,  1,  0,  0,  0, 0x80e19478009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #11370 = VPMULDQZrrkz
27972
  { 11371,  7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x11438009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11371 = VPMULDQrm
27973
  { 11372,  3,  1,  0,  408,  0|(1ULL<<MCID::Commutable), 0x11438009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11372 = VPMULDQrr
27974
  { 11373,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200105f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11373 = VPMULHRSWZ128rm
27975
  { 11374,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202105f8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #11374 = VPMULHRSWZ128rmk
27976
  { 11375,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206105f8009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #11375 = VPMULHRSWZ128rmkz
27977
  { 11376,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x200105f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11376 = VPMULHRSWZ128rr
27978
  { 11377,  5,  1,  0,  0,  0, 0x202105f8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #11377 = VPMULHRSWZ128rrk
27979
  { 11378,  4,  1,  0,  0,  0, 0x206105f8009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #11378 = VPMULHRSWZ128rrkz
27980
  { 11379,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400905f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11379 = VPMULHRSWZ256rm
27981
  { 11380,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402905f8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #11380 = VPMULHRSWZ256rmk
27982
  { 11381,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406905f8009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #11381 = VPMULHRSWZ256rmkz
27983
  { 11382,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x400905f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11382 = VPMULHRSWZ256rr
27984
  { 11383,  5,  1,  0,  0,  0, 0x402905f8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #11383 = VPMULHRSWZ256rrk
27985
  { 11384,  4,  1,  0,  0,  0, 0x406905f8009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #11384 = VPMULHRSWZ256rrkz
27986
  { 11385,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808105f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11385 = VPMULHRSWZrm
27987
  { 11386,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a105f8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #11386 = VPMULHRSWZrmk
27988
  { 11387,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e105f8009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #11387 = VPMULHRSWZrmkz
27989
  { 11388,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x808105f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11388 = VPMULHRSWZrr
27990
  { 11389,  5,  1,  0,  0,  0, 0x80a105f8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #11389 = VPMULHRSWZrrk
27991
  { 11390,  4,  1,  0,  0,  0, 0x80e105f8009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #11390 = VPMULHRSWZrrkz
27992
  { 11391,  7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x105b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11391 = VPMULHRSWrm128
27993
  { 11392,  7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x905b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #11392 = VPMULHRSWrm256
27994
  { 11393,  3,  1,  0,  408,  0|(1ULL<<MCID::Commutable), 0x105b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11393 = VPMULHRSWrr128
27995
  { 11394,  3,  1,  0,  408,  0|(1ULL<<MCID::Commutable), 0x905b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #11394 = VPMULHRSWrr256
27996
  { 11395,  7,  1,  0,  416,  0|(1ULL<<MCID::MayLoad), 0x97238005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #11395 = VPMULHUWYrm
27997
  { 11396,  3,  1,  0,  417,  0|(1ULL<<MCID::Commutable), 0x97238005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #11396 = VPMULHUWYrr
27998
  { 11397,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017278005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11397 = VPMULHUWZ128rm
27999
  { 11398,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217278005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #11398 = VPMULHUWZ128rmk
28000
  { 11399,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617278005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #11399 = VPMULHUWZ128rmkz
28001
  { 11400,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20017278005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11400 = VPMULHUWZ128rr
28002
  { 11401,  5,  1,  0,  0,  0, 0x20217278005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #11401 = VPMULHUWZ128rrk
28003
  { 11402,  4,  1,  0,  0,  0, 0x20617278005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #11402 = VPMULHUWZ128rrkz
28004
  { 11403,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097278005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11403 = VPMULHUWZ256rm
28005
  { 11404,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297278005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #11404 = VPMULHUWZ256rmk
28006
  { 11405,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697278005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #11405 = VPMULHUWZ256rmkz
28007
  { 11406,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40097278005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11406 = VPMULHUWZ256rr
28008
  { 11407,  5,  1,  0,  0,  0, 0x40297278005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #11407 = VPMULHUWZ256rrk
28009
  { 11408,  4,  1,  0,  0,  0, 0x40697278005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #11408 = VPMULHUWZ256rrkz
28010
  { 11409,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817278005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11409 = VPMULHUWZrm
28011
  { 11410,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17278005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #11410 = VPMULHUWZrmk
28012
  { 11411,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17278005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #11411 = VPMULHUWZrmkz
28013
  { 11412,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80817278005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11412 = VPMULHUWZrr
28014
  { 11413,  5,  1,  0,  0,  0, 0x80a17278005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #11413 = VPMULHUWZrrk
28015
  { 11414,  4,  1,  0,  0,  0, 0x80e17278005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #11414 = VPMULHUWZrrkz
28016
  { 11415,  7,  1,  0,  416,  0|(1ULL<<MCID::MayLoad), 0x17238005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11415 = VPMULHUWrm
28017
  { 11416,  3,  1,  0,  417,  0|(1ULL<<MCID::Commutable), 0x17238005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11416 = VPMULHUWrr
28018
  { 11417,  7,  1,  0,  416,  0|(1ULL<<MCID::MayLoad), 0x972b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #11417 = VPMULHWYrm
28019
  { 11418,  3,  1,  0,  417,  0|(1ULL<<MCID::Commutable), 0x972b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #11418 = VPMULHWYrr
28020
  { 11419,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200172f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11419 = VPMULHWZ128rm
28021
  { 11420,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202172f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #11420 = VPMULHWZ128rmk
28022
  { 11421,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206172f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #11421 = VPMULHWZ128rmkz
28023
  { 11422,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x200172f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11422 = VPMULHWZ128rr
28024
  { 11423,  5,  1,  0,  0,  0, 0x202172f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #11423 = VPMULHWZ128rrk
28025
  { 11424,  4,  1,  0,  0,  0, 0x206172f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #11424 = VPMULHWZ128rrkz
28026
  { 11425,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400972f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11425 = VPMULHWZ256rm
28027
  { 11426,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402972f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #11426 = VPMULHWZ256rmk
28028
  { 11427,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406972f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #11427 = VPMULHWZ256rmkz
28029
  { 11428,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x400972f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11428 = VPMULHWZ256rr
28030
  { 11429,  5,  1,  0,  0,  0, 0x402972f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #11429 = VPMULHWZ256rrk
28031
  { 11430,  4,  1,  0,  0,  0, 0x406972f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #11430 = VPMULHWZ256rrkz
28032
  { 11431,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808172f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11431 = VPMULHWZrm
28033
  { 11432,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a172f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #11432 = VPMULHWZrmk
28034
  { 11433,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e172f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #11433 = VPMULHWZrmkz
28035
  { 11434,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x808172f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11434 = VPMULHWZrr
28036
  { 11435,  5,  1,  0,  0,  0, 0x80a172f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #11435 = VPMULHWZrrk
28037
  { 11436,  4,  1,  0,  0,  0, 0x80e172f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #11436 = VPMULHWZrrkz
28038
  { 11437,  7,  1,  0,  416,  0|(1ULL<<MCID::MayLoad), 0x172b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11437 = VPMULHWrm
28039
  { 11438,  3,  1,  0,  417,  0|(1ULL<<MCID::Commutable), 0x172b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11438 = VPMULHWrr
28040
  { 11439,  7,  1,  0,  832,  0|(1ULL<<MCID::MayLoad), 0x92038009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #11439 = VPMULLDYrm
28041
  { 11440,  3,  1,  0,  831,  0|(1ULL<<MCID::Commutable), 0x92038009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #11440 = VPMULLDYrr
28042
  { 11441,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012078009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11441 = VPMULLDZ128rm
28043
  { 11442,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012078009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11442 = VPMULLDZ128rmb
28044
  { 11443,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212078009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #11443 = VPMULLDZ128rmbk
28045
  { 11444,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612078009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #11444 = VPMULLDZ128rmbkz
28046
  { 11445,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212078009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #11445 = VPMULLDZ128rmk
28047
  { 11446,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612078009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #11446 = VPMULLDZ128rmkz
28048
  { 11447,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20012078009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11447 = VPMULLDZ128rr
28049
  { 11448,  5,  1,  0,  0,  0, 0x20212078009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #11448 = VPMULLDZ128rrk
28050
  { 11449,  4,  1,  0,  0,  0, 0x20612078009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #11449 = VPMULLDZ128rrkz
28051
  { 11450,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092078009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11450 = VPMULLDZ256rm
28052
  { 11451,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092078009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11451 = VPMULLDZ256rmb
28053
  { 11452,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292078009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #11452 = VPMULLDZ256rmbk
28054
  { 11453,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692078009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #11453 = VPMULLDZ256rmbkz
28055
  { 11454,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292078009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #11454 = VPMULLDZ256rmk
28056
  { 11455,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692078009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #11455 = VPMULLDZ256rmkz
28057
  { 11456,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40092078009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11456 = VPMULLDZ256rr
28058
  { 11457,  5,  1,  0,  0,  0, 0x40292078009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #11457 = VPMULLDZ256rrk
28059
  { 11458,  4,  1,  0,  0,  0, 0x40692078009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #11458 = VPMULLDZ256rrkz
28060
  { 11459,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812078009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11459 = VPMULLDZrm
28061
  { 11460,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812078009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11460 = VPMULLDZrmb
28062
  { 11461,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12078009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #11461 = VPMULLDZrmbk
28063
  { 11462,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12078009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #11462 = VPMULLDZrmbkz
28064
  { 11463,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12078009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #11463 = VPMULLDZrmk
28065
  { 11464,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12078009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #11464 = VPMULLDZrmkz
28066
  { 11465,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80812078009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11465 = VPMULLDZrr
28067
  { 11466,  5,  1,  0,  0,  0, 0x80a12078009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #11466 = VPMULLDZrrk
28068
  { 11467,  4,  1,  0,  0,  0, 0x80e12078009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #11467 = VPMULLDZrrkz
28069
  { 11468,  7,  1,  0,  832,  0|(1ULL<<MCID::MayLoad), 0x12038009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11468 = VPMULLDrm
28070
  { 11469,  3,  1,  0,  831,  0|(1ULL<<MCID::Commutable), 0x12038009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11469 = VPMULLDrr
28071
  { 11470,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001a078009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11470 = VPMULLQZ128rm
28072
  { 11471,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101a078009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11471 = VPMULLQZ128rmb
28073
  { 11472,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121a078009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11472 = VPMULLQZ128rmbk
28074
  { 11473,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161a078009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11473 = VPMULLQZ128rmbkz
28075
  { 11474,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021a078009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11474 = VPMULLQZ128rmk
28076
  { 11475,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061a078009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11475 = VPMULLQZ128rmkz
28077
  { 11476,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x2001a078009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11476 = VPMULLQZ128rr
28078
  { 11477,  5,  1,  0,  0,  0, 0x2021a078009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #11477 = VPMULLQZ128rrk
28079
  { 11478,  4,  1,  0,  0,  0, 0x2061a078009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #11478 = VPMULLQZ128rrkz
28080
  { 11479,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009a078009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11479 = VPMULLQZ256rm
28081
  { 11480,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109a078009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11480 = VPMULLQZ256rmb
28082
  { 11481,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129a078009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11481 = VPMULLQZ256rmbk
28083
  { 11482,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169a078009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11482 = VPMULLQZ256rmbkz
28084
  { 11483,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029a078009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11483 = VPMULLQZ256rmk
28085
  { 11484,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069a078009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11484 = VPMULLQZ256rmkz
28086
  { 11485,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x4009a078009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11485 = VPMULLQZ256rr
28087
  { 11486,  5,  1,  0,  0,  0, 0x4029a078009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #11486 = VPMULLQZ256rrk
28088
  { 11487,  4,  1,  0,  0,  0, 0x4069a078009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #11487 = VPMULLQZ256rrkz
28089
  { 11488,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081a078009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11488 = VPMULLQZrm
28090
  { 11489,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181a078009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11489 = VPMULLQZrmb
28091
  { 11490,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1a078009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11490 = VPMULLQZrmbk
28092
  { 11491,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1a078009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11491 = VPMULLQZrmbkz
28093
  { 11492,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1a078009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11492 = VPMULLQZrmk
28094
  { 11493,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1a078009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11493 = VPMULLQZrmkz
28095
  { 11494,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x8081a078009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11494 = VPMULLQZrr
28096
  { 11495,  5,  1,  0,  0,  0, 0x80a1a078009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #11495 = VPMULLQZrrk
28097
  { 11496,  4,  1,  0,  0,  0, 0x80e1a078009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #11496 = VPMULLQZrrkz
28098
  { 11497,  7,  1,  0,  416,  0|(1ULL<<MCID::MayLoad), 0x96ab8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #11497 = VPMULLWYrm
28099
  { 11498,  3,  1,  0,  417,  0|(1ULL<<MCID::Commutable), 0x96ab8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #11498 = VPMULLWYrr
28100
  { 11499,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016af8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11499 = VPMULLWZ128rm
28101
  { 11500,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216af8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #11500 = VPMULLWZ128rmk
28102
  { 11501,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20616af8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #11501 = VPMULLWZ128rmkz
28103
  { 11502,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x20016af8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11502 = VPMULLWZ128rr
28104
  { 11503,  5,  1,  0,  0,  0, 0x20216af8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #11503 = VPMULLWZ128rrk
28105
  { 11504,  4,  1,  0,  0,  0, 0x20616af8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #11504 = VPMULLWZ128rrkz
28106
  { 11505,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096af8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11505 = VPMULLWZ256rm
28107
  { 11506,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296af8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #11506 = VPMULLWZ256rmk
28108
  { 11507,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40696af8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #11507 = VPMULLWZ256rmkz
28109
  { 11508,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x40096af8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11508 = VPMULLWZ256rr
28110
  { 11509,  5,  1,  0,  0,  0, 0x40296af8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #11509 = VPMULLWZ256rrk
28111
  { 11510,  4,  1,  0,  0,  0, 0x40696af8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #11510 = VPMULLWZ256rrkz
28112
  { 11511,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816af8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11511 = VPMULLWZrm
28113
  { 11512,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16af8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #11512 = VPMULLWZrmk
28114
  { 11513,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e16af8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #11513 = VPMULLWZrmkz
28115
  { 11514,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x80816af8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11514 = VPMULLWZrr
28116
  { 11515,  5,  1,  0,  0,  0, 0x80a16af8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #11515 = VPMULLWZrrk
28117
  { 11516,  4,  1,  0,  0,  0, 0x80e16af8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #11516 = VPMULLWZrrkz
28118
  { 11517,  7,  1,  0,  416,  0|(1ULL<<MCID::MayLoad), 0x16ab8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11517 = VPMULLWrm
28119
  { 11518,  3,  1,  0,  417,  0|(1ULL<<MCID::Commutable), 0x16ab8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11518 = VPMULLWrr
28120
  { 11519,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001c1f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11519 = VPMULTISHIFTQBZ128rm
28121
  { 11520,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101c1f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11520 = VPMULTISHIFTQBZ128rmb
28122
  { 11521,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121c1f8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #11521 = VPMULTISHIFTQBZ128rmbk
28123
  { 11522,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161c1f8009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #11522 = VPMULTISHIFTQBZ128rmbkz
28124
  { 11523,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021c1f8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #11523 = VPMULTISHIFTQBZ128rmk
28125
  { 11524,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061c1f8009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #11524 = VPMULTISHIFTQBZ128rmkz
28126
  { 11525,  3,  1,  0,  0,  0, 0x2001c1f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11525 = VPMULTISHIFTQBZ128rr
28127
  { 11526,  5,  1,  0,  0,  0, 0x2021c1f8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #11526 = VPMULTISHIFTQBZ128rrk
28128
  { 11527,  4,  1,  0,  0,  0, 0x2061c1f8009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #11527 = VPMULTISHIFTQBZ128rrkz
28129
  { 11528,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009c1f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11528 = VPMULTISHIFTQBZ256rm
28130
  { 11529,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109c1f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11529 = VPMULTISHIFTQBZ256rmb
28131
  { 11530,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129c1f8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #11530 = VPMULTISHIFTQBZ256rmbk
28132
  { 11531,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169c1f8009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #11531 = VPMULTISHIFTQBZ256rmbkz
28133
  { 11532,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029c1f8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #11532 = VPMULTISHIFTQBZ256rmk
28134
  { 11533,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069c1f8009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #11533 = VPMULTISHIFTQBZ256rmkz
28135
  { 11534,  3,  1,  0,  0,  0, 0x4009c1f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11534 = VPMULTISHIFTQBZ256rr
28136
  { 11535,  5,  1,  0,  0,  0, 0x4029c1f8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #11535 = VPMULTISHIFTQBZ256rrk
28137
  { 11536,  4,  1,  0,  0,  0, 0x4069c1f8009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #11536 = VPMULTISHIFTQBZ256rrkz
28138
  { 11537,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081c1f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11537 = VPMULTISHIFTQBZrm
28139
  { 11538,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181c1f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11538 = VPMULTISHIFTQBZrmb
28140
  { 11539,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1c1f8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #11539 = VPMULTISHIFTQBZrmbk
28141
  { 11540,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1c1f8009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #11540 = VPMULTISHIFTQBZrmbkz
28142
  { 11541,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1c1f8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #11541 = VPMULTISHIFTQBZrmk
28143
  { 11542,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1c1f8009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #11542 = VPMULTISHIFTQBZrmkz
28144
  { 11543,  3,  1,  0,  0,  0, 0x8081c1f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11543 = VPMULTISHIFTQBZrr
28145
  { 11544,  5,  1,  0,  0,  0, 0x80a1c1f8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #11544 = VPMULTISHIFTQBZrrk
28146
  { 11545,  4,  1,  0,  0,  0, 0x80e1c1f8009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #11545 = VPMULTISHIFTQBZrrkz
28147
  { 11546,  7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x97a38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #11546 = VPMULUDQYrm
28148
  { 11547,  3,  1,  0,  408,  0|(1ULL<<MCID::Commutable), 0x97a38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #11547 = VPMULUDQYrr
28149
  { 11548,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001fa78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11548 = VPMULUDQZ128rm
28150
  { 11549,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101fa78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11549 = VPMULUDQZ128rmb
28151
  { 11550,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121fa78005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11550 = VPMULUDQZ128rmbk
28152
  { 11551,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161fa78005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11551 = VPMULUDQZ128rmbkz
28153
  { 11552,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021fa78005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11552 = VPMULUDQZ128rmk
28154
  { 11553,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061fa78005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11553 = VPMULUDQZ128rmkz
28155
  { 11554,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x2001fa78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11554 = VPMULUDQZ128rr
28156
  { 11555,  5,  1,  0,  0,  0, 0x2021fa78005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #11555 = VPMULUDQZ128rrk
28157
  { 11556,  4,  1,  0,  0,  0, 0x2061fa78005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #11556 = VPMULUDQZ128rrkz
28158
  { 11557,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009fa78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11557 = VPMULUDQZ256rm
28159
  { 11558,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109fa78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11558 = VPMULUDQZ256rmb
28160
  { 11559,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129fa78005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11559 = VPMULUDQZ256rmbk
28161
  { 11560,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169fa78005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11560 = VPMULUDQZ256rmbkz
28162
  { 11561,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029fa78005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11561 = VPMULUDQZ256rmk
28163
  { 11562,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069fa78005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11562 = VPMULUDQZ256rmkz
28164
  { 11563,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x4009fa78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11563 = VPMULUDQZ256rr
28165
  { 11564,  5,  1,  0,  0,  0, 0x4029fa78005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #11564 = VPMULUDQZ256rrk
28166
  { 11565,  4,  1,  0,  0,  0, 0x4069fa78005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #11565 = VPMULUDQZ256rrkz
28167
  { 11566,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081fa78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11566 = VPMULUDQZrm
28168
  { 11567,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181fa78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11567 = VPMULUDQZrmb
28169
  { 11568,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1fa78005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11568 = VPMULUDQZrmbk
28170
  { 11569,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1fa78005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11569 = VPMULUDQZrmbkz
28171
  { 11570,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1fa78005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11570 = VPMULUDQZrmk
28172
  { 11571,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1fa78005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11571 = VPMULUDQZrmkz
28173
  { 11572,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x8081fa78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11572 = VPMULUDQZrr
28174
  { 11573,  5,  1,  0,  0,  0, 0x80a1fa78005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #11573 = VPMULUDQZrrk
28175
  { 11574,  4,  1,  0,  0,  0, 0x80e1fa78005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #11574 = VPMULUDQZrrkz
28176
  { 11575,  7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x17a38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11575 = VPMULUDQrm
28177
  { 11576,  3,  1,  0,  408,  0|(1ULL<<MCID::Commutable), 0x17a38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11576 = VPMULUDQrr
28178
  { 11577,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200175f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11577 = VPORDZ128rm
28179
  { 11578,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90175f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11578 = VPORDZ128rmb
28180
  { 11579,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92175f8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #11579 = VPORDZ128rmbk
28181
  { 11580,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96175f8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #11580 = VPORDZ128rmbkz
28182
  { 11581,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202175f8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #11581 = VPORDZ128rmk
28183
  { 11582,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206175f8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #11582 = VPORDZ128rmkz
28184
  { 11583,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x200175f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11583 = VPORDZ128rr
28185
  { 11584,  5,  1,  0,  0,  0, 0x202175f8005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #11584 = VPORDZ128rrk
28186
  { 11585,  4,  1,  0,  0,  0, 0x206175f8005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #11585 = VPORDZ128rrkz
28187
  { 11586,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400975f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11586 = VPORDZ256rm
28188
  { 11587,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90975f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11587 = VPORDZ256rmb
28189
  { 11588,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92975f8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #11588 = VPORDZ256rmbk
28190
  { 11589,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96975f8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #11589 = VPORDZ256rmbkz
28191
  { 11590,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402975f8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #11590 = VPORDZ256rmk
28192
  { 11591,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406975f8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #11591 = VPORDZ256rmkz
28193
  { 11592,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x400975f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11592 = VPORDZ256rr
28194
  { 11593,  5,  1,  0,  0,  0, 0x402975f8005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #11593 = VPORDZ256rrk
28195
  { 11594,  4,  1,  0,  0,  0, 0x406975f8005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #11594 = VPORDZ256rrkz
28196
  { 11595,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808175f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11595 = VPORDZrm
28197
  { 11596,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98175f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11596 = VPORDZrmb
28198
  { 11597,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a175f8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #11597 = VPORDZrmbk
28199
  { 11598,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e175f8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #11598 = VPORDZrmbkz
28200
  { 11599,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a175f8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #11599 = VPORDZrmk
28201
  { 11600,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e175f8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #11600 = VPORDZrmkz
28202
  { 11601,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x808175f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11601 = VPORDZrr
28203
  { 11602,  5,  1,  0,  0,  0, 0x80a175f8005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #11602 = VPORDZrrk
28204
  { 11603,  4,  1,  0,  0,  0, 0x80e175f8005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #11603 = VPORDZrrkz
28205
  { 11604,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001f5f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11604 = VPORQZ128rm
28206
  { 11605,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101f5f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11605 = VPORQZ128rmb
28207
  { 11606,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121f5f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11606 = VPORQZ128rmbk
28208
  { 11607,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161f5f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11607 = VPORQZ128rmbkz
28209
  { 11608,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021f5f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11608 = VPORQZ128rmk
28210
  { 11609,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061f5f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11609 = VPORQZ128rmkz
28211
  { 11610,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x2001f5f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11610 = VPORQZ128rr
28212
  { 11611,  5,  1,  0,  0,  0, 0x2021f5f8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #11611 = VPORQZ128rrk
28213
  { 11612,  4,  1,  0,  0,  0, 0x2061f5f8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #11612 = VPORQZ128rrkz
28214
  { 11613,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009f5f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11613 = VPORQZ256rm
28215
  { 11614,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109f5f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11614 = VPORQZ256rmb
28216
  { 11615,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129f5f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11615 = VPORQZ256rmbk
28217
  { 11616,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169f5f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11616 = VPORQZ256rmbkz
28218
  { 11617,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029f5f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11617 = VPORQZ256rmk
28219
  { 11618,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069f5f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11618 = VPORQZ256rmkz
28220
  { 11619,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x4009f5f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11619 = VPORQZ256rr
28221
  { 11620,  5,  1,  0,  0,  0, 0x4029f5f8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #11620 = VPORQZ256rrk
28222
  { 11621,  4,  1,  0,  0,  0, 0x4069f5f8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #11621 = VPORQZ256rrkz
28223
  { 11622,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081f5f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11622 = VPORQZrm
28224
  { 11623,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181f5f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11623 = VPORQZrmb
28225
  { 11624,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1f5f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11624 = VPORQZrmbk
28226
  { 11625,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1f5f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11625 = VPORQZrmbkz
28227
  { 11626,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1f5f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11626 = VPORQZrmk
28228
  { 11627,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1f5f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11627 = VPORQZrmkz
28229
  { 11628,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x8081f5f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11628 = VPORQZrr
28230
  { 11629,  5,  1,  0,  0,  0, 0x80a1f5f8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #11629 = VPORQZrrk
28231
  { 11630,  4,  1,  0,  0,  0, 0x80e1f5f8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #11630 = VPORQZrrkz
28232
  { 11631,  7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x975b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #11631 = VPORYrm
28233
  { 11632,  3,  1,  0,  383,  0|(1ULL<<MCID::Commutable), 0x975b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #11632 = VPORYrr
28234
  { 11633,  7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x175b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11633 = VPORrm
28235
  { 11634,  3,  1,  0,  383,  0|(1ULL<<MCID::Commutable), 0x175b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11634 = VPORrr
28236
  { 11635,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x551d8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr },  // Inst #11635 = VPPERMmr
28237
  { 11636,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20005d1d8050806ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr },  // Inst #11636 = VPPERMrm
28238
  { 11637,  4,  1,  0,  0,  0, 0x551d8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr },  // Inst #11637 = VPPERMrr
28239
  { 11638,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9013978045019ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11638 = VPROLDZ128mbi
28240
  { 11639,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9213978045019ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #11639 = VPROLDZ128mbik
28241
  { 11640,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9613978045019ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #11640 = VPROLDZ128mbikz
28242
  { 11641,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013978045019ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11641 = VPROLDZ128mi
28243
  { 11642,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213978045019ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #11642 = VPROLDZ128mik
28244
  { 11643,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613978045019ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #11643 = VPROLDZ128mikz
28245
  { 11644,  3,  1,  0,  0,  0, 0x20013978045011ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #11644 = VPROLDZ128ri
28246
  { 11645,  5,  1,  0,  0,  0, 0x20213978045011ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr },  // Inst #11645 = VPROLDZ128rik
28247
  { 11646,  4,  1,  0,  0,  0, 0x20613978045011ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr },  // Inst #11646 = VPROLDZ128rikz
28248
  { 11647,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9093978045019ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #11647 = VPROLDZ256mbi
28249
  { 11648,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9293978045019ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #11648 = VPROLDZ256mbik
28250
  { 11649,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9693978045019ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #11649 = VPROLDZ256mbikz
28251
  { 11650,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093978045019ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #11650 = VPROLDZ256mi
28252
  { 11651,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293978045019ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #11651 = VPROLDZ256mik
28253
  { 11652,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693978045019ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #11652 = VPROLDZ256mikz
28254
  { 11653,  3,  1,  0,  0,  0, 0x40093978045011ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #11653 = VPROLDZ256ri
28255
  { 11654,  5,  1,  0,  0,  0, 0x40293978045011ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr },  // Inst #11654 = VPROLDZ256rik
28256
  { 11655,  4,  1,  0,  0,  0, 0x40693978045011ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr },  // Inst #11655 = VPROLDZ256rikz
28257
  { 11656,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9813978045019ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #11656 = VPROLDZmbi
28258
  { 11657,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a13978045019ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #11657 = VPROLDZmbik
28259
  { 11658,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e13978045019ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #11658 = VPROLDZmbikz
28260
  { 11659,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813978045019ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #11659 = VPROLDZmi
28261
  { 11660,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13978045019ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #11660 = VPROLDZmik
28262
  { 11661,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13978045019ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #11661 = VPROLDZmikz
28263
  { 11662,  3,  1,  0,  0,  0, 0x80813978045011ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #11662 = VPROLDZri
28264
  { 11663,  5,  1,  0,  0,  0, 0x80a13978045011ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #11663 = VPROLDZrik
28265
  { 11664,  4,  1,  0,  0,  0, 0x80e13978045011ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #11664 = VPROLDZrikz
28266
  { 11665,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101b978045019ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11665 = VPROLQZ128mbi
28267
  { 11666,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121b978045019ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #11666 = VPROLQZ128mbik
28268
  { 11667,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161b978045019ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #11667 = VPROLQZ128mbikz
28269
  { 11668,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001b978045019ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11668 = VPROLQZ128mi
28270
  { 11669,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b978045019ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #11669 = VPROLQZ128mik
28271
  { 11670,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061b978045019ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #11670 = VPROLQZ128mikz
28272
  { 11671,  3,  1,  0,  0,  0, 0x2001b978045011ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #11671 = VPROLQZ128ri
28273
  { 11672,  5,  1,  0,  0,  0, 0x2021b978045011ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr },  // Inst #11672 = VPROLQZ128rik
28274
  { 11673,  4,  1,  0,  0,  0, 0x2061b978045011ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr },  // Inst #11673 = VPROLQZ128rikz
28275
  { 11674,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109b978045019ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #11674 = VPROLQZ256mbi
28276
  { 11675,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129b978045019ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #11675 = VPROLQZ256mbik
28277
  { 11676,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169b978045019ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #11676 = VPROLQZ256mbikz
28278
  { 11677,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009b978045019ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #11677 = VPROLQZ256mi
28279
  { 11678,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b978045019ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #11678 = VPROLQZ256mik
28280
  { 11679,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069b978045019ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #11679 = VPROLQZ256mikz
28281
  { 11680,  3,  1,  0,  0,  0, 0x4009b978045011ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #11680 = VPROLQZ256ri
28282
  { 11681,  5,  1,  0,  0,  0, 0x4029b978045011ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr },  // Inst #11681 = VPROLQZ256rik
28283
  { 11682,  4,  1,  0,  0,  0, 0x4069b978045011ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr },  // Inst #11682 = VPROLQZ256rikz
28284
  { 11683,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181b978045019ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #11683 = VPROLQZmbi
28285
  { 11684,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1b978045019ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #11684 = VPROLQZmbik
28286
  { 11685,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1b978045019ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #11685 = VPROLQZmbikz
28287
  { 11686,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081b978045019ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #11686 = VPROLQZmi
28288
  { 11687,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b978045019ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #11687 = VPROLQZmik
28289
  { 11688,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1b978045019ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #11688 = VPROLQZmikz
28290
  { 11689,  3,  1,  0,  0,  0, 0x8081b978045011ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #11689 = VPROLQZri
28291
  { 11690,  5,  1,  0,  0,  0, 0x80a1b978045011ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #11690 = VPROLQZrik
28292
  { 11691,  4,  1,  0,  0,  0, 0x80e1b978045011ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #11691 = VPROLQZrikz
28293
  { 11692,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20010af8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11692 = VPROLVDZ128rm
28294
  { 11693,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9010af8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11693 = VPROLVDZ128rmb
28295
  { 11694,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9210af8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #11694 = VPROLVDZ128rmbk
28296
  { 11695,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9610af8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #11695 = VPROLVDZ128rmbkz
28297
  { 11696,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20210af8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #11696 = VPROLVDZ128rmk
28298
  { 11697,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20610af8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #11697 = VPROLVDZ128rmkz
28299
  { 11698,  3,  1,  0,  0,  0, 0x20010af8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11698 = VPROLVDZ128rr
28300
  { 11699,  5,  1,  0,  0,  0, 0x20210af8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #11699 = VPROLVDZ128rrk
28301
  { 11700,  4,  1,  0,  0,  0, 0x20610af8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #11700 = VPROLVDZ128rrkz
28302
  { 11701,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40090af8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11701 = VPROLVDZ256rm
28303
  { 11702,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9090af8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11702 = VPROLVDZ256rmb
28304
  { 11703,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9290af8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #11703 = VPROLVDZ256rmbk
28305
  { 11704,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9690af8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #11704 = VPROLVDZ256rmbkz
28306
  { 11705,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40290af8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #11705 = VPROLVDZ256rmk
28307
  { 11706,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40690af8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #11706 = VPROLVDZ256rmkz
28308
  { 11707,  3,  1,  0,  0,  0, 0x40090af8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11707 = VPROLVDZ256rr
28309
  { 11708,  5,  1,  0,  0,  0, 0x40290af8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #11708 = VPROLVDZ256rrk
28310
  { 11709,  4,  1,  0,  0,  0, 0x40690af8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #11709 = VPROLVDZ256rrkz
28311
  { 11710,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80810af8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11710 = VPROLVDZrm
28312
  { 11711,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9810af8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11711 = VPROLVDZrmb
28313
  { 11712,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a10af8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #11712 = VPROLVDZrmbk
28314
  { 11713,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e10af8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #11713 = VPROLVDZrmbkz
28315
  { 11714,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a10af8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #11714 = VPROLVDZrmk
28316
  { 11715,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e10af8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #11715 = VPROLVDZrmkz
28317
  { 11716,  3,  1,  0,  0,  0, 0x80810af8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11716 = VPROLVDZrr
28318
  { 11717,  5,  1,  0,  0,  0, 0x80a10af8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #11717 = VPROLVDZrrk
28319
  { 11718,  4,  1,  0,  0,  0, 0x80e10af8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #11718 = VPROLVDZrrkz
28320
  { 11719,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20018af8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11719 = VPROLVQZ128rm
28321
  { 11720,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11018af8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11720 = VPROLVQZ128rmb
28322
  { 11721,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11218af8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11721 = VPROLVQZ128rmbk
28323
  { 11722,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11618af8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11722 = VPROLVQZ128rmbkz
28324
  { 11723,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20218af8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11723 = VPROLVQZ128rmk
28325
  { 11724,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20618af8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11724 = VPROLVQZ128rmkz
28326
  { 11725,  3,  1,  0,  0,  0, 0x20018af8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11725 = VPROLVQZ128rr
28327
  { 11726,  5,  1,  0,  0,  0, 0x20218af8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #11726 = VPROLVQZ128rrk
28328
  { 11727,  4,  1,  0,  0,  0, 0x20618af8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #11727 = VPROLVQZ128rrkz
28329
  { 11728,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40098af8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11728 = VPROLVQZ256rm
28330
  { 11729,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11098af8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11729 = VPROLVQZ256rmb
28331
  { 11730,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11298af8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11730 = VPROLVQZ256rmbk
28332
  { 11731,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11698af8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11731 = VPROLVQZ256rmbkz
28333
  { 11732,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40298af8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11732 = VPROLVQZ256rmk
28334
  { 11733,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40698af8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11733 = VPROLVQZ256rmkz
28335
  { 11734,  3,  1,  0,  0,  0, 0x40098af8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11734 = VPROLVQZ256rr
28336
  { 11735,  5,  1,  0,  0,  0, 0x40298af8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #11735 = VPROLVQZ256rrk
28337
  { 11736,  4,  1,  0,  0,  0, 0x40698af8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #11736 = VPROLVQZ256rrkz
28338
  { 11737,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80818af8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11737 = VPROLVQZrm
28339
  { 11738,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11818af8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11738 = VPROLVQZrmb
28340
  { 11739,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a18af8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11739 = VPROLVQZrmbk
28341
  { 11740,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e18af8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11740 = VPROLVQZrmbkz
28342
  { 11741,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a18af8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11741 = VPROLVQZrmk
28343
  { 11742,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e18af8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11742 = VPROLVQZrmkz
28344
  { 11743,  3,  1,  0,  0,  0, 0x80818af8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11743 = VPROLVQZrr
28345
  { 11744,  5,  1,  0,  0,  0, 0x80a18af8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #11744 = VPROLVQZrrk
28346
  { 11745,  4,  1,  0,  0,  0, 0x80e18af8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #11745 = VPROLVQZrrkz
28347
  { 11746,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9013978045018ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11746 = VPRORDZ128mbi
28348
  { 11747,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9213978045018ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #11747 = VPRORDZ128mbik
28349
  { 11748,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9613978045018ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #11748 = VPRORDZ128mbikz
28350
  { 11749,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013978045018ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11749 = VPRORDZ128mi
28351
  { 11750,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213978045018ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #11750 = VPRORDZ128mik
28352
  { 11751,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613978045018ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #11751 = VPRORDZ128mikz
28353
  { 11752,  3,  1,  0,  0,  0, 0x20013978045010ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #11752 = VPRORDZ128ri
28354
  { 11753,  5,  1,  0,  0,  0, 0x20213978045010ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr },  // Inst #11753 = VPRORDZ128rik
28355
  { 11754,  4,  1,  0,  0,  0, 0x20613978045010ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr },  // Inst #11754 = VPRORDZ128rikz
28356
  { 11755,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9093978045018ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #11755 = VPRORDZ256mbi
28357
  { 11756,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9293978045018ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #11756 = VPRORDZ256mbik
28358
  { 11757,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9693978045018ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #11757 = VPRORDZ256mbikz
28359
  { 11758,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093978045018ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #11758 = VPRORDZ256mi
28360
  { 11759,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293978045018ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #11759 = VPRORDZ256mik
28361
  { 11760,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693978045018ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #11760 = VPRORDZ256mikz
28362
  { 11761,  3,  1,  0,  0,  0, 0x40093978045010ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #11761 = VPRORDZ256ri
28363
  { 11762,  5,  1,  0,  0,  0, 0x40293978045010ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr },  // Inst #11762 = VPRORDZ256rik
28364
  { 11763,  4,  1,  0,  0,  0, 0x40693978045010ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr },  // Inst #11763 = VPRORDZ256rikz
28365
  { 11764,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9813978045018ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #11764 = VPRORDZmbi
28366
  { 11765,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a13978045018ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #11765 = VPRORDZmbik
28367
  { 11766,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e13978045018ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #11766 = VPRORDZmbikz
28368
  { 11767,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813978045018ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #11767 = VPRORDZmi
28369
  { 11768,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13978045018ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #11768 = VPRORDZmik
28370
  { 11769,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13978045018ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #11769 = VPRORDZmikz
28371
  { 11770,  3,  1,  0,  0,  0, 0x80813978045010ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #11770 = VPRORDZri
28372
  { 11771,  5,  1,  0,  0,  0, 0x80a13978045010ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #11771 = VPRORDZrik
28373
  { 11772,  4,  1,  0,  0,  0, 0x80e13978045010ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #11772 = VPRORDZrikz
28374
  { 11773,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101b978045018ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11773 = VPRORQZ128mbi
28375
  { 11774,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121b978045018ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #11774 = VPRORQZ128mbik
28376
  { 11775,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161b978045018ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #11775 = VPRORQZ128mbikz
28377
  { 11776,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001b978045018ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11776 = VPRORQZ128mi
28378
  { 11777,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b978045018ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #11777 = VPRORQZ128mik
28379
  { 11778,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061b978045018ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #11778 = VPRORQZ128mikz
28380
  { 11779,  3,  1,  0,  0,  0, 0x2001b978045010ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #11779 = VPRORQZ128ri
28381
  { 11780,  5,  1,  0,  0,  0, 0x2021b978045010ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr },  // Inst #11780 = VPRORQZ128rik
28382
  { 11781,  4,  1,  0,  0,  0, 0x2061b978045010ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr },  // Inst #11781 = VPRORQZ128rikz
28383
  { 11782,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109b978045018ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #11782 = VPRORQZ256mbi
28384
  { 11783,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129b978045018ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #11783 = VPRORQZ256mbik
28385
  { 11784,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169b978045018ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #11784 = VPRORQZ256mbikz
28386
  { 11785,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009b978045018ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #11785 = VPRORQZ256mi
28387
  { 11786,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b978045018ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #11786 = VPRORQZ256mik
28388
  { 11787,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069b978045018ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #11787 = VPRORQZ256mikz
28389
  { 11788,  3,  1,  0,  0,  0, 0x4009b978045010ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #11788 = VPRORQZ256ri
28390
  { 11789,  5,  1,  0,  0,  0, 0x4029b978045010ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr },  // Inst #11789 = VPRORQZ256rik
28391
  { 11790,  4,  1,  0,  0,  0, 0x4069b978045010ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr },  // Inst #11790 = VPRORQZ256rikz
28392
  { 11791,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181b978045018ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #11791 = VPRORQZmbi
28393
  { 11792,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1b978045018ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #11792 = VPRORQZmbik
28394
  { 11793,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1b978045018ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #11793 = VPRORQZmbikz
28395
  { 11794,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081b978045018ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #11794 = VPRORQZmi
28396
  { 11795,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b978045018ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #11795 = VPRORQZmik
28397
  { 11796,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1b978045018ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #11796 = VPRORQZmikz
28398
  { 11797,  3,  1,  0,  0,  0, 0x8081b978045010ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #11797 = VPRORQZri
28399
  { 11798,  5,  1,  0,  0,  0, 0x80a1b978045010ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #11798 = VPRORQZrik
28400
  { 11799,  4,  1,  0,  0,  0, 0x80e1b978045010ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #11799 = VPRORQZrikz
28401
  { 11800,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20010a78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11800 = VPRORVDZ128rm
28402
  { 11801,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9010a78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11801 = VPRORVDZ128rmb
28403
  { 11802,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9210a78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #11802 = VPRORVDZ128rmbk
28404
  { 11803,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9610a78009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #11803 = VPRORVDZ128rmbkz
28405
  { 11804,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20210a78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #11804 = VPRORVDZ128rmk
28406
  { 11805,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20610a78009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #11805 = VPRORVDZ128rmkz
28407
  { 11806,  3,  1,  0,  0,  0, 0x20010a78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11806 = VPRORVDZ128rr
28408
  { 11807,  5,  1,  0,  0,  0, 0x20210a78009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #11807 = VPRORVDZ128rrk
28409
  { 11808,  4,  1,  0,  0,  0, 0x20610a78009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #11808 = VPRORVDZ128rrkz
28410
  { 11809,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40090a78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11809 = VPRORVDZ256rm
28411
  { 11810,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9090a78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11810 = VPRORVDZ256rmb
28412
  { 11811,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9290a78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #11811 = VPRORVDZ256rmbk
28413
  { 11812,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9690a78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #11812 = VPRORVDZ256rmbkz
28414
  { 11813,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40290a78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #11813 = VPRORVDZ256rmk
28415
  { 11814,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40690a78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #11814 = VPRORVDZ256rmkz
28416
  { 11815,  3,  1,  0,  0,  0, 0x40090a78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11815 = VPRORVDZ256rr
28417
  { 11816,  5,  1,  0,  0,  0, 0x40290a78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #11816 = VPRORVDZ256rrk
28418
  { 11817,  4,  1,  0,  0,  0, 0x40690a78009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #11817 = VPRORVDZ256rrkz
28419
  { 11818,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80810a78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11818 = VPRORVDZrm
28420
  { 11819,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9810a78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11819 = VPRORVDZrmb
28421
  { 11820,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a10a78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #11820 = VPRORVDZrmbk
28422
  { 11821,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e10a78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #11821 = VPRORVDZrmbkz
28423
  { 11822,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a10a78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #11822 = VPRORVDZrmk
28424
  { 11823,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e10a78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #11823 = VPRORVDZrmkz
28425
  { 11824,  3,  1,  0,  0,  0, 0x80810a78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11824 = VPRORVDZrr
28426
  { 11825,  5,  1,  0,  0,  0, 0x80a10a78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #11825 = VPRORVDZrrk
28427
  { 11826,  4,  1,  0,  0,  0, 0x80e10a78009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #11826 = VPRORVDZrrkz
28428
  { 11827,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20018a78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11827 = VPRORVQZ128rm
28429
  { 11828,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11018a78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11828 = VPRORVQZ128rmb
28430
  { 11829,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11218a78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11829 = VPRORVQZ128rmbk
28431
  { 11830,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11618a78009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11830 = VPRORVQZ128rmbkz
28432
  { 11831,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20218a78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #11831 = VPRORVQZ128rmk
28433
  { 11832,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20618a78009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #11832 = VPRORVQZ128rmkz
28434
  { 11833,  3,  1,  0,  0,  0, 0x20018a78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11833 = VPRORVQZ128rr
28435
  { 11834,  5,  1,  0,  0,  0, 0x20218a78009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #11834 = VPRORVQZ128rrk
28436
  { 11835,  4,  1,  0,  0,  0, 0x20618a78009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #11835 = VPRORVQZ128rrkz
28437
  { 11836,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40098a78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11836 = VPRORVQZ256rm
28438
  { 11837,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11098a78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11837 = VPRORVQZ256rmb
28439
  { 11838,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11298a78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11838 = VPRORVQZ256rmbk
28440
  { 11839,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11698a78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11839 = VPRORVQZ256rmbkz
28441
  { 11840,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40298a78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #11840 = VPRORVQZ256rmk
28442
  { 11841,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40698a78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #11841 = VPRORVQZ256rmkz
28443
  { 11842,  3,  1,  0,  0,  0, 0x40098a78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11842 = VPRORVQZ256rr
28444
  { 11843,  5,  1,  0,  0,  0, 0x40298a78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #11843 = VPRORVQZ256rrk
28445
  { 11844,  4,  1,  0,  0,  0, 0x40698a78009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #11844 = VPRORVQZ256rrkz
28446
  { 11845,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80818a78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11845 = VPRORVQZrm
28447
  { 11846,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11818a78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11846 = VPRORVQZrmb
28448
  { 11847,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a18a78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11847 = VPRORVQZrmbk
28449
  { 11848,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e18a78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11848 = VPRORVQZrmbkz
28450
  { 11849,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a18a78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #11849 = VPRORVQZrmk
28451
  { 11850,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e18a78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #11850 = VPRORVQZrmkz
28452
  { 11851,  3,  1,  0,  0,  0, 0x80818a78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11851 = VPRORVQZrr
28453
  { 11852,  5,  1,  0,  0,  0, 0x80a18a78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #11852 = VPRORVQZrrk
28454
  { 11853,  4,  1,  0,  0,  0, 0x80e18a78009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #11853 = VPRORVQZrrkz
28455
  { 11854,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6058050806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #11854 = VPROTBmi
28456
  { 11855,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x24858014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11855 = VPROTBmr
28457
  { 11856,  3,  1,  0,  0,  0, 0x6058050805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #11856 = VPROTBri
28458
  { 11857,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1c858014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11857 = VPROTBrm
28459
  { 11858,  3,  1,  0,  573,  0, 0x24858014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11858 = VPROTBrr
28460
  { 11859,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x6158050806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #11859 = VPROTDmi
28461
  { 11860,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x24958014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11860 = VPROTDmr
28462
  { 11861,  3,  1,  0,  0,  0, 0x6158050805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #11861 = VPROTDri
28463
  { 11862,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1c958014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11862 = VPROTDrm
28464
  { 11863,  3,  1,  0,  573,  0, 0x24958014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11863 = VPROTDrr
28465
  { 11864,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x61d8050806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #11864 = VPROTQmi
28466
  { 11865,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x249d8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11865 = VPROTQmr
28467
  { 11866,  3,  1,  0,  0,  0, 0x61d8050805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #11866 = VPROTQri
28468
  { 11867,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1c9d8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11867 = VPROTQrm
28469
  { 11868,  3,  1,  0,  573,  0, 0x249d8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11868 = VPROTQrr
28470
  { 11869,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x60d8050806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #11869 = VPROTWmi
28471
  { 11870,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x248d8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11870 = VPROTWmr
28472
  { 11871,  3,  1,  0,  0,  0, 0x60d8050805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #11871 = VPROTWri
28473
  { 11872,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1c8d8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11872 = VPROTWrm
28474
  { 11873,  3,  1,  0,  573,  0, 0x248d8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11873 = VPROTWrr
28475
  { 11874,  7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x97b38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #11874 = VPSADBWYrm
28476
  { 11875,  3,  1,  0,  408,  0|(1ULL<<MCID::Commutable), 0x97b38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #11875 = VPSADBWYrr
28477
  { 11876,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017b78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11876 = VPSADBWZ128rm
28478
  { 11877,  3,  1,  0,  0,  0, 0x20017b78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11877 = VPSADBWZ128rr
28479
  { 11878,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097b78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11878 = VPSADBWZ256rm
28480
  { 11879,  3,  1,  0,  0,  0, 0x40097b78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11879 = VPSADBWZ256rr
28481
  { 11880,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817b78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11880 = VPSADBWZ512rm
28482
  { 11881,  3,  1,  0,  0,  0, 0x80817b78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11881 = VPSADBWZ512rr
28483
  { 11882,  7,  1,  0,  411,  0|(1ULL<<MCID::MayLoad), 0x17b38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11882 = VPSADBWrm
28484
  { 11883,  3,  1,  0,  408,  0|(1ULL<<MCID::Commutable), 0x17b38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11883 = VPSADBWrr
28485
  { 11884,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8205078009004ULL, nullptr, nullptr, OperandInfo896, -1 ,nullptr },  // Inst #11884 = VPSCATTERDDZ128mr
28486
  { 11885,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8285078009004ULL, nullptr, nullptr, OperandInfo897, -1 ,nullptr },  // Inst #11885 = VPSCATTERDDZ256mr
28487
  { 11886,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8a05078009004ULL, nullptr, nullptr, OperandInfo898, -1 ,nullptr },  // Inst #11886 = VPSCATTERDDZmr
28488
  { 11887,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1020d078009004ULL, nullptr, nullptr, OperandInfo899, -1 ,nullptr },  // Inst #11887 = VPSCATTERDQZ128mr
28489
  { 11888,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1028d078009004ULL, nullptr, nullptr, OperandInfo900, -1 ,nullptr },  // Inst #11888 = VPSCATTERDQZ256mr
28490
  { 11889,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10a0d078009004ULL, nullptr, nullptr, OperandInfo901, -1 ,nullptr },  // Inst #11889 = VPSCATTERDQZmr
28491
  { 11890,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x82050f8009004ULL, nullptr, nullptr, OperandInfo896, -1 ,nullptr },  // Inst #11890 = VPSCATTERQDZ128mr
28492
  { 11891,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x82850f8009004ULL, nullptr, nullptr, OperandInfo902, -1 ,nullptr },  // Inst #11891 = VPSCATTERQDZ256mr
28493
  { 11892,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8a050f8009004ULL, nullptr, nullptr, OperandInfo903, -1 ,nullptr },  // Inst #11892 = VPSCATTERQDZmr
28494
  { 11893,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1020d0f8009004ULL, nullptr, nullptr, OperandInfo899, -1 ,nullptr },  // Inst #11893 = VPSCATTERQQZ128mr
28495
  { 11894,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1028d0f8009004ULL, nullptr, nullptr, OperandInfo904, -1 ,nullptr },  // Inst #11894 = VPSCATTERQQZ256mr
28496
  { 11895,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10a0d0f8009004ULL, nullptr, nullptr, OperandInfo905, -1 ,nullptr },  // Inst #11895 = VPSCATTERQQZmr
28497
  { 11896,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x24c58014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11896 = VPSHABmr
28498
  { 11897,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1cc58014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11897 = VPSHABrm
28499
  { 11898,  3,  1,  0,  573,  0, 0x24c58014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11898 = VPSHABrr
28500
  { 11899,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x24d58014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11899 = VPSHADmr
28501
  { 11900,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1cd58014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11900 = VPSHADrm
28502
  { 11901,  3,  1,  0,  573,  0, 0x24d58014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11901 = VPSHADrr
28503
  { 11902,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x24dd8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11902 = VPSHAQmr
28504
  { 11903,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1cdd8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11903 = VPSHAQrm
28505
  { 11904,  3,  1,  0,  573,  0, 0x24dd8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11904 = VPSHAQrr
28506
  { 11905,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x24cd8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11905 = VPSHAWmr
28507
  { 11906,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1ccd8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11906 = VPSHAWrm
28508
  { 11907,  3,  1,  0,  573,  0, 0x24cd8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11907 = VPSHAWrr
28509
  { 11908,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x24a58014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11908 = VPSHLBmr
28510
  { 11909,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1ca58014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11909 = VPSHLBrm
28511
  { 11910,  3,  1,  0,  573,  0, 0x24a58014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11910 = VPSHLBrr
28512
  { 11911,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x24b58014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11911 = VPSHLDmr
28513
  { 11912,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1cb58014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11912 = VPSHLDrm
28514
  { 11913,  3,  1,  0,  573,  0, 0x24b58014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11913 = VPSHLDrr
28515
  { 11914,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x24bd8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11914 = VPSHLQmr
28516
  { 11915,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1cbd8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11915 = VPSHLQrm
28517
  { 11916,  3,  1,  0,  573,  0, 0x24bd8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11916 = VPSHLQrr
28518
  { 11917,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x24ad8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr },  // Inst #11917 = VPSHLWmr
28519
  { 11918,  7,  1,  0,  572,  0|(1ULL<<MCID::MayLoad), 0x1cad8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11918 = VPSHLWrm
28520
  { 11919,  3,  1,  0,  573,  0, 0x24ad8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11919 = VPSHLWrr
28521
  { 11920,  7,  1,  0,  428,  0|(1ULL<<MCID::MayLoad), 0x90038009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #11920 = VPSHUFBYrm
28522
  { 11921,  3,  1,  0,  429,  0, 0x90038009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #11921 = VPSHUFBYrr
28523
  { 11922,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20010078009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #11922 = VPSHUFBZ128rm
28524
  { 11923,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20210078009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #11923 = VPSHUFBZ128rmk
28525
  { 11924,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20610078009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #11924 = VPSHUFBZ128rmkz
28526
  { 11925,  3,  1,  0,  0,  0, 0x20010078009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #11925 = VPSHUFBZ128rr
28527
  { 11926,  5,  1,  0,  0,  0, 0x20210078009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #11926 = VPSHUFBZ128rrk
28528
  { 11927,  4,  1,  0,  0,  0, 0x20610078009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #11927 = VPSHUFBZ128rrkz
28529
  { 11928,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40090078009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #11928 = VPSHUFBZ256rm
28530
  { 11929,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40290078009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #11929 = VPSHUFBZ256rmk
28531
  { 11930,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40690078009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #11930 = VPSHUFBZ256rmkz
28532
  { 11931,  3,  1,  0,  0,  0, 0x40090078009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #11931 = VPSHUFBZ256rr
28533
  { 11932,  5,  1,  0,  0,  0, 0x40290078009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #11932 = VPSHUFBZ256rrk
28534
  { 11933,  4,  1,  0,  0,  0, 0x40690078009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #11933 = VPSHUFBZ256rrkz
28535
  { 11934,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80810078009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #11934 = VPSHUFBZrm
28536
  { 11935,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a10078009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #11935 = VPSHUFBZrmk
28537
  { 11936,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e10078009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #11936 = VPSHUFBZrmkz
28538
  { 11937,  3,  1,  0,  0,  0, 0x80810078009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #11937 = VPSHUFBZrr
28539
  { 11938,  5,  1,  0,  0,  0, 0x80a10078009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #11938 = VPSHUFBZrrk
28540
  { 11939,  4,  1,  0,  0,  0, 0x80e10078009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #11939 = VPSHUFBZrrkz
28541
  { 11940,  7,  1,  0,  428,  0|(1ULL<<MCID::MayLoad), 0x10038009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #11940 = VPSHUFBrm
28542
  { 11941,  3,  1,  0,  429,  0, 0x10038009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #11941 = VPSHUFBrr
28543
  { 11942,  7,  1,  0,  574,  0|(1ULL<<MCID::MayLoad), 0x83838045006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr },  // Inst #11942 = VPSHUFDYmi
28544
  { 11943,  3,  1,  0,  431,  0, 0x83838045005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #11943 = VPSHUFDYri
28545
  { 11944,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9003878045006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11944 = VPSHUFDZ128mbi
28546
  { 11945,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9203878045006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #11945 = VPSHUFDZ128mbik
28547
  { 11946,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9603878045006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #11946 = VPSHUFDZ128mbikz
28548
  { 11947,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20003878045006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11947 = VPSHUFDZ128mi
28549
  { 11948,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20203878045006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #11948 = VPSHUFDZ128mik
28550
  { 11949,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20603878045006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #11949 = VPSHUFDZ128mikz
28551
  { 11950,  3,  1,  0,  0,  0, 0x20003878045005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #11950 = VPSHUFDZ128ri
28552
  { 11951,  5,  1,  0,  0,  0, 0x20203878045005ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr },  // Inst #11951 = VPSHUFDZ128rik
28553
  { 11952,  4,  1,  0,  0,  0, 0x20603878045005ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr },  // Inst #11952 = VPSHUFDZ128rikz
28554
  { 11953,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9083878045006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #11953 = VPSHUFDZ256mbi
28555
  { 11954,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9283878045006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #11954 = VPSHUFDZ256mbik
28556
  { 11955,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9683878045006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #11955 = VPSHUFDZ256mbikz
28557
  { 11956,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40083878045006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #11956 = VPSHUFDZ256mi
28558
  { 11957,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40283878045006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #11957 = VPSHUFDZ256mik
28559
  { 11958,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40683878045006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #11958 = VPSHUFDZ256mikz
28560
  { 11959,  3,  1,  0,  0,  0, 0x40083878045005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #11959 = VPSHUFDZ256ri
28561
  { 11960,  5,  1,  0,  0,  0, 0x40283878045005ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr },  // Inst #11960 = VPSHUFDZ256rik
28562
  { 11961,  4,  1,  0,  0,  0, 0x40683878045005ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr },  // Inst #11961 = VPSHUFDZ256rikz
28563
  { 11962,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9803878045006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #11962 = VPSHUFDZmbi
28564
  { 11963,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a03878045006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #11963 = VPSHUFDZmbik
28565
  { 11964,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e03878045006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #11964 = VPSHUFDZmbikz
28566
  { 11965,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80803878045006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #11965 = VPSHUFDZmi
28567
  { 11966,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a03878045006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #11966 = VPSHUFDZmik
28568
  { 11967,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e03878045006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #11967 = VPSHUFDZmikz
28569
  { 11968,  3,  1,  0,  0,  0, 0x80803878045005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #11968 = VPSHUFDZri
28570
  { 11969,  5,  1,  0,  0,  0, 0x80a03878045005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #11969 = VPSHUFDZrik
28571
  { 11970,  4,  1,  0,  0,  0, 0x80e03878045005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #11970 = VPSHUFDZrikz
28572
  { 11971,  7,  1,  0,  574,  0|(1ULL<<MCID::MayLoad), 0x3838045006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #11971 = VPSHUFDmi
28573
  { 11972,  3,  1,  0,  431,  0, 0x3838045005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #11972 = VPSHUFDri
28574
  { 11973,  7,  1,  0,  574,  0|(1ULL<<MCID::MayLoad), 0x83838045806ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr },  // Inst #11973 = VPSHUFHWYmi
28575
  { 11974,  3,  1,  0,  431,  0, 0x83838045805ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #11974 = VPSHUFHWYri
28576
  { 11975,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20003878045806ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11975 = VPSHUFHWZ128mi
28577
  { 11976,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20203878045806ULL, nullptr, nullptr, OperandInfo906, -1 ,nullptr },  // Inst #11976 = VPSHUFHWZ128mik
28578
  { 11977,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20603878045806ULL, nullptr, nullptr, OperandInfo907, -1 ,nullptr },  // Inst #11977 = VPSHUFHWZ128mikz
28579
  { 11978,  3,  1,  0,  0,  0, 0x20003878045805ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #11978 = VPSHUFHWZ128ri
28580
  { 11979,  5,  1,  0,  0,  0, 0x20203878045805ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr },  // Inst #11979 = VPSHUFHWZ128rik
28581
  { 11980,  4,  1,  0,  0,  0, 0x20603878045805ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr },  // Inst #11980 = VPSHUFHWZ128rikz
28582
  { 11981,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40083878045806ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #11981 = VPSHUFHWZ256mi
28583
  { 11982,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40283878045806ULL, nullptr, nullptr, OperandInfo908, -1 ,nullptr },  // Inst #11982 = VPSHUFHWZ256mik
28584
  { 11983,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40683878045806ULL, nullptr, nullptr, OperandInfo909, -1 ,nullptr },  // Inst #11983 = VPSHUFHWZ256mikz
28585
  { 11984,  3,  1,  0,  0,  0, 0x40083878045805ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #11984 = VPSHUFHWZ256ri
28586
  { 11985,  5,  1,  0,  0,  0, 0x40283878045805ULL, nullptr, nullptr, OperandInfo910, -1 ,nullptr },  // Inst #11985 = VPSHUFHWZ256rik
28587
  { 11986,  4,  1,  0,  0,  0, 0x40683878045805ULL, nullptr, nullptr, OperandInfo911, -1 ,nullptr },  // Inst #11986 = VPSHUFHWZ256rikz
28588
  { 11987,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80803878045806ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #11987 = VPSHUFHWZmi
28589
  { 11988,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a03878045806ULL, nullptr, nullptr, OperandInfo912, -1 ,nullptr },  // Inst #11988 = VPSHUFHWZmik
28590
  { 11989,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e03878045806ULL, nullptr, nullptr, OperandInfo913, -1 ,nullptr },  // Inst #11989 = VPSHUFHWZmikz
28591
  { 11990,  3,  1,  0,  0,  0, 0x80803878045805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #11990 = VPSHUFHWZri
28592
  { 11991,  5,  1,  0,  0,  0, 0x80a03878045805ULL, nullptr, nullptr, OperandInfo914, -1 ,nullptr },  // Inst #11991 = VPSHUFHWZrik
28593
  { 11992,  4,  1,  0,  0,  0, 0x80e03878045805ULL, nullptr, nullptr, OperandInfo915, -1 ,nullptr },  // Inst #11992 = VPSHUFHWZrikz
28594
  { 11993,  7,  1,  0,  574,  0|(1ULL<<MCID::MayLoad), 0x3838045806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #11993 = VPSHUFHWmi
28595
  { 11994,  3,  1,  0,  431,  0, 0x3838045805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #11994 = VPSHUFHWri
28596
  { 11995,  7,  1,  0,  574,  0|(1ULL<<MCID::MayLoad), 0x83838046006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr },  // Inst #11995 = VPSHUFLWYmi
28597
  { 11996,  3,  1,  0,  431,  0, 0x83838046005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #11996 = VPSHUFLWYri
28598
  { 11997,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20003878046006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #11997 = VPSHUFLWZ128mi
28599
  { 11998,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20203878046006ULL, nullptr, nullptr, OperandInfo906, -1 ,nullptr },  // Inst #11998 = VPSHUFLWZ128mik
28600
  { 11999,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20603878046006ULL, nullptr, nullptr, OperandInfo907, -1 ,nullptr },  // Inst #11999 = VPSHUFLWZ128mikz
28601
  { 12000,  3,  1,  0,  0,  0, 0x20003878046005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12000 = VPSHUFLWZ128ri
28602
  { 12001,  5,  1,  0,  0,  0, 0x20203878046005ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr },  // Inst #12001 = VPSHUFLWZ128rik
28603
  { 12002,  4,  1,  0,  0,  0, 0x20603878046005ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr },  // Inst #12002 = VPSHUFLWZ128rikz
28604
  { 12003,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40083878046006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12003 = VPSHUFLWZ256mi
28605
  { 12004,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40283878046006ULL, nullptr, nullptr, OperandInfo908, -1 ,nullptr },  // Inst #12004 = VPSHUFLWZ256mik
28606
  { 12005,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40683878046006ULL, nullptr, nullptr, OperandInfo909, -1 ,nullptr },  // Inst #12005 = VPSHUFLWZ256mikz
28607
  { 12006,  3,  1,  0,  0,  0, 0x40083878046005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12006 = VPSHUFLWZ256ri
28608
  { 12007,  5,  1,  0,  0,  0, 0x40283878046005ULL, nullptr, nullptr, OperandInfo910, -1 ,nullptr },  // Inst #12007 = VPSHUFLWZ256rik
28609
  { 12008,  4,  1,  0,  0,  0, 0x40683878046005ULL, nullptr, nullptr, OperandInfo911, -1 ,nullptr },  // Inst #12008 = VPSHUFLWZ256rikz
28610
  { 12009,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80803878046006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12009 = VPSHUFLWZmi
28611
  { 12010,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a03878046006ULL, nullptr, nullptr, OperandInfo912, -1 ,nullptr },  // Inst #12010 = VPSHUFLWZmik
28612
  { 12011,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e03878046006ULL, nullptr, nullptr, OperandInfo913, -1 ,nullptr },  // Inst #12011 = VPSHUFLWZmikz
28613
  { 12012,  3,  1,  0,  0,  0, 0x80803878046005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12012 = VPSHUFLWZri
28614
  { 12013,  5,  1,  0,  0,  0, 0x80a03878046005ULL, nullptr, nullptr, OperandInfo914, -1 ,nullptr },  // Inst #12013 = VPSHUFLWZrik
28615
  { 12014,  4,  1,  0,  0,  0, 0x80e03878046005ULL, nullptr, nullptr, OperandInfo915, -1 ,nullptr },  // Inst #12014 = VPSHUFLWZrikz
28616
  { 12015,  7,  1,  0,  574,  0|(1ULL<<MCID::MayLoad), 0x3838046006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #12015 = VPSHUFLWmi
28617
  { 12016,  3,  1,  0,  431,  0, 0x3838046005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #12016 = VPSHUFLWri
28618
  { 12017,  7,  1,  0,  405,  0|(1ULL<<MCID::MayLoad), 0x90438009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12017 = VPSIGNBYrm
28619
  { 12018,  3,  1,  0,  406,  0, 0x90438009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12018 = VPSIGNBYrr
28620
  { 12019,  7,  1,  0,  432,  0|(1ULL<<MCID::MayLoad), 0x10438009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12019 = VPSIGNBrm
28621
  { 12020,  3,  1,  0,  433,  0, 0x10438009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12020 = VPSIGNBrr
28622
  { 12021,  7,  1,  0,  405,  0|(1ULL<<MCID::MayLoad), 0x90538009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12021 = VPSIGNDYrm
28623
  { 12022,  3,  1,  0,  406,  0, 0x90538009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12022 = VPSIGNDYrr
28624
  { 12023,  7,  1,  0,  432,  0|(1ULL<<MCID::MayLoad), 0x10538009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12023 = VPSIGNDrm
28625
  { 12024,  3,  1,  0,  433,  0, 0x10538009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12024 = VPSIGNDrr
28626
  { 12025,  7,  1,  0,  405,  0|(1ULL<<MCID::MayLoad), 0x904b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12025 = VPSIGNWYrm
28627
  { 12026,  3,  1,  0,  406,  0, 0x904b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12026 = VPSIGNWYrr
28628
  { 12027,  7,  1,  0,  432,  0|(1ULL<<MCID::MayLoad), 0x104b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12027 = VPSIGNWrm
28629
  { 12028,  3,  1,  0,  433,  0, 0x104b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12028 = VPSIGNWrr
28630
  { 12029,  3,  1,  0,  837,  0, 0x939b8045017ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #12029 = VPSLLDQYri
28631
  { 12030,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200139f004501fULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12030 = VPSLLDQZ128rm
28632
  { 12031,  3,  1,  0,  0,  0, 0x200139f0045017ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12031 = VPSLLDQZ128rr
28633
  { 12032,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400939f004501fULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12032 = VPSLLDQZ256rm
28634
  { 12033,  3,  1,  0,  0,  0, 0x400939f0045017ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12033 = VPSLLDQZ256rr
28635
  { 12034,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808139f004501fULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12034 = VPSLLDQZ512rm
28636
  { 12035,  3,  1,  0,  0,  0, 0x808139f0045017ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12035 = VPSLLDQZ512rr
28637
  { 12036,  3,  1,  0,  837,  0, 0x139b8045017ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #12036 = VPSLLDQri
28638
  { 12037,  3,  1,  0,  435,  0, 0x93938045016ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #12037 = VPSLLDYri
28639
  { 12038,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x97938005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12038 = VPSLLDYrm
28640
  { 12039,  3,  1,  0,  835,  0, 0x97938005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr },  // Inst #12039 = VPSLLDYrr
28641
  { 12040,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x901397804501eULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12040 = VPSLLDZ128mbi
28642
  { 12041,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x921397804501eULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #12041 = VPSLLDZ128mbik
28643
  { 12042,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x961397804501eULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #12042 = VPSLLDZ128mbikz
28644
  { 12043,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001397804501eULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12043 = VPSLLDZ128mi
28645
  { 12044,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021397804501eULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #12044 = VPSLLDZ128mik
28646
  { 12045,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061397804501eULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #12045 = VPSLLDZ128mikz
28647
  { 12046,  3,  1,  0,  0,  0, 0x20013978045016ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12046 = VPSLLDZ128ri
28648
  { 12047,  5,  1,  0,  0,  0, 0x20213978045016ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr },  // Inst #12047 = VPSLLDZ128rik
28649
  { 12048,  4,  1,  0,  0,  0, 0x20613978045016ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr },  // Inst #12048 = VPSLLDZ128rikz
28650
  { 12049,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017978005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12049 = VPSLLDZ128rm
28651
  { 12050,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217978005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #12050 = VPSLLDZ128rmk
28652
  { 12051,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617978005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #12051 = VPSLLDZ128rmkz
28653
  { 12052,  3,  1,  0,  0,  0, 0x20017978005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12052 = VPSLLDZ128rr
28654
  { 12053,  5,  1,  0,  0,  0, 0x20217978005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #12053 = VPSLLDZ128rrk
28655
  { 12054,  4,  1,  0,  0,  0, 0x20617978005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #12054 = VPSLLDZ128rrkz
28656
  { 12055,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x909397804501eULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12055 = VPSLLDZ256mbi
28657
  { 12056,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x929397804501eULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #12056 = VPSLLDZ256mbik
28658
  { 12057,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x969397804501eULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #12057 = VPSLLDZ256mbikz
28659
  { 12058,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009397804501eULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12058 = VPSLLDZ256mi
28660
  { 12059,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029397804501eULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #12059 = VPSLLDZ256mik
28661
  { 12060,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069397804501eULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #12060 = VPSLLDZ256mikz
28662
  { 12061,  3,  1,  0,  0,  0, 0x40093978045016ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12061 = VPSLLDZ256ri
28663
  { 12062,  5,  1,  0,  0,  0, 0x40293978045016ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr },  // Inst #12062 = VPSLLDZ256rik
28664
  { 12063,  4,  1,  0,  0,  0, 0x40693978045016ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr },  // Inst #12063 = VPSLLDZ256rikz
28665
  { 12064,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20097978005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12064 = VPSLLDZ256rm
28666
  { 12065,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20297978005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #12065 = VPSLLDZ256rmk
28667
  { 12066,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20697978005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #12066 = VPSLLDZ256rmkz
28668
  { 12067,  3,  1,  0,  0,  0, 0x20097978005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr },  // Inst #12067 = VPSLLDZ256rr
28669
  { 12068,  5,  1,  0,  0,  0, 0x20297978005005ULL, nullptr, nullptr, OperandInfo918, -1 ,nullptr },  // Inst #12068 = VPSLLDZ256rrk
28670
  { 12069,  4,  1,  0,  0,  0, 0x20697978005005ULL, nullptr, nullptr, OperandInfo919, -1 ,nullptr },  // Inst #12069 = VPSLLDZ256rrkz
28671
  { 12070,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x981397804501eULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12070 = VPSLLDZmbi
28672
  { 12071,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a1397804501eULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #12071 = VPSLLDZmbik
28673
  { 12072,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e1397804501eULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #12072 = VPSLLDZmbikz
28674
  { 12073,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081397804501eULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12073 = VPSLLDZmi
28675
  { 12074,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1397804501eULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #12074 = VPSLLDZmik
28676
  { 12075,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1397804501eULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #12075 = VPSLLDZmikz
28677
  { 12076,  3,  1,  0,  0,  0, 0x80813978045016ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12076 = VPSLLDZri
28678
  { 12077,  5,  1,  0,  0,  0, 0x80a13978045016ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #12077 = VPSLLDZrik
28679
  { 12078,  4,  1,  0,  0,  0, 0x80e13978045016ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #12078 = VPSLLDZrikz
28680
  { 12079,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20817978005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12079 = VPSLLDZrm
28681
  { 12080,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a17978005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #12080 = VPSLLDZrmk
28682
  { 12081,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e17978005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #12081 = VPSLLDZrmkz
28683
  { 12082,  3,  1,  0,  0,  0, 0x20817978005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr },  // Inst #12082 = VPSLLDZrr
28684
  { 12083,  5,  1,  0,  0,  0, 0x20a17978005005ULL, nullptr, nullptr, OperandInfo921, -1 ,nullptr },  // Inst #12083 = VPSLLDZrrk
28685
  { 12084,  4,  1,  0,  0,  0, 0x20e17978005005ULL, nullptr, nullptr, OperandInfo922, -1 ,nullptr },  // Inst #12084 = VPSLLDZrrkz
28686
  { 12085,  3,  1,  0,  435,  0, 0x13938045016ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #12085 = VPSLLDri
28687
  { 12086,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x17938005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12086 = VPSLLDrm
28688
  { 12087,  3,  1,  0,  835,  0, 0x17938005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12087 = VPSLLDrr
28689
  { 12088,  3,  1,  0,  435,  0, 0x939b8045016ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #12088 = VPSLLQYri
28690
  { 12089,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x979b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12089 = VPSLLQYrm
28691
  { 12090,  3,  1,  0,  835,  0, 0x979b8005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr },  // Inst #12090 = VPSLLQYrr
28692
  { 12091,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101b9f804501eULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12091 = VPSLLQZ128mbi
28693
  { 12092,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121b9f804501eULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #12092 = VPSLLQZ128mbik
28694
  { 12093,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161b9f804501eULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #12093 = VPSLLQZ128mbikz
28695
  { 12094,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001b9f804501eULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12094 = VPSLLQZ128mi
28696
  { 12095,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b9f804501eULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #12095 = VPSLLQZ128mik
28697
  { 12096,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061b9f804501eULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #12096 = VPSLLQZ128mikz
28698
  { 12097,  3,  1,  0,  0,  0, 0x2001b9f8045016ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12097 = VPSLLQZ128ri
28699
  { 12098,  5,  1,  0,  0,  0, 0x2021b9f8045016ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr },  // Inst #12098 = VPSLLQZ128rik
28700
  { 12099,  4,  1,  0,  0,  0, 0x2061b9f8045016ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr },  // Inst #12099 = VPSLLQZ128rikz
28701
  { 12100,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001f9f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12100 = VPSLLQZ128rm
28702
  { 12101,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021f9f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #12101 = VPSLLQZ128rmk
28703
  { 12102,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061f9f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #12102 = VPSLLQZ128rmkz
28704
  { 12103,  3,  1,  0,  0,  0, 0x2001f9f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12103 = VPSLLQZ128rr
28705
  { 12104,  5,  1,  0,  0,  0, 0x2021f9f8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #12104 = VPSLLQZ128rrk
28706
  { 12105,  4,  1,  0,  0,  0, 0x2061f9f8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #12105 = VPSLLQZ128rrkz
28707
  { 12106,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109b9f804501eULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12106 = VPSLLQZ256mbi
28708
  { 12107,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129b9f804501eULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #12107 = VPSLLQZ256mbik
28709
  { 12108,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169b9f804501eULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #12108 = VPSLLQZ256mbikz
28710
  { 12109,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009b9f804501eULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12109 = VPSLLQZ256mi
28711
  { 12110,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b9f804501eULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #12110 = VPSLLQZ256mik
28712
  { 12111,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069b9f804501eULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #12111 = VPSLLQZ256mikz
28713
  { 12112,  3,  1,  0,  0,  0, 0x4009b9f8045016ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12112 = VPSLLQZ256ri
28714
  { 12113,  5,  1,  0,  0,  0, 0x4029b9f8045016ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr },  // Inst #12113 = VPSLLQZ256rik
28715
  { 12114,  4,  1,  0,  0,  0, 0x4069b9f8045016ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr },  // Inst #12114 = VPSLLQZ256rikz
28716
  { 12115,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2009f9f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12115 = VPSLLQZ256rm
28717
  { 12116,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2029f9f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #12116 = VPSLLQZ256rmk
28718
  { 12117,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2069f9f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #12117 = VPSLLQZ256rmkz
28719
  { 12118,  3,  1,  0,  0,  0, 0x2009f9f8005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr },  // Inst #12118 = VPSLLQZ256rr
28720
  { 12119,  5,  1,  0,  0,  0, 0x2029f9f8005005ULL, nullptr, nullptr, OperandInfo923, -1 ,nullptr },  // Inst #12119 = VPSLLQZ256rrk
28721
  { 12120,  4,  1,  0,  0,  0, 0x2069f9f8005005ULL, nullptr, nullptr, OperandInfo924, -1 ,nullptr },  // Inst #12120 = VPSLLQZ256rrkz
28722
  { 12121,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181b9f804501eULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12121 = VPSLLQZmbi
28723
  { 12122,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1b9f804501eULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #12122 = VPSLLQZmbik
28724
  { 12123,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1b9f804501eULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #12123 = VPSLLQZmbikz
28725
  { 12124,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081b9f804501eULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12124 = VPSLLQZmi
28726
  { 12125,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b9f804501eULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #12125 = VPSLLQZmik
28727
  { 12126,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1b9f804501eULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #12126 = VPSLLQZmikz
28728
  { 12127,  3,  1,  0,  0,  0, 0x8081b9f8045016ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12127 = VPSLLQZri
28729
  { 12128,  5,  1,  0,  0,  0, 0x80a1b9f8045016ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #12128 = VPSLLQZrik
28730
  { 12129,  4,  1,  0,  0,  0, 0x80e1b9f8045016ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #12129 = VPSLLQZrikz
28731
  { 12130,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2081f9f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12130 = VPSLLQZrm
28732
  { 12131,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a1f9f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #12131 = VPSLLQZrmk
28733
  { 12132,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e1f9f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #12132 = VPSLLQZrmkz
28734
  { 12133,  3,  1,  0,  0,  0, 0x2081f9f8005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr },  // Inst #12133 = VPSLLQZrr
28735
  { 12134,  5,  1,  0,  0,  0, 0x20a1f9f8005005ULL, nullptr, nullptr, OperandInfo925, -1 ,nullptr },  // Inst #12134 = VPSLLQZrrk
28736
  { 12135,  4,  1,  0,  0,  0, 0x20e1f9f8005005ULL, nullptr, nullptr, OperandInfo926, -1 ,nullptr },  // Inst #12135 = VPSLLQZrrkz
28737
  { 12136,  3,  1,  0,  435,  0, 0x139b8045016ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #12136 = VPSLLQri
28738
  { 12137,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x179b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12137 = VPSLLQrm
28739
  { 12138,  3,  1,  0,  835,  0, 0x179b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12138 = VPSLLQrr
28740
  { 12139,  7,  1,  0,  576,  0|(1ULL<<MCID::MayLoad), 0x923b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12139 = VPSLLVDYrm
28741
  { 12140,  3,  1,  0,  573,  0, 0x923b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12140 = VPSLLVDYrr
28742
  { 12141,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200123f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12141 = VPSLLVDZ128rm
28743
  { 12142,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90123f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12142 = VPSLLVDZ128rmb
28744
  { 12143,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92123f8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #12143 = VPSLLVDZ128rmbk
28745
  { 12144,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96123f8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #12144 = VPSLLVDZ128rmbkz
28746
  { 12145,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202123f8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #12145 = VPSLLVDZ128rmk
28747
  { 12146,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206123f8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #12146 = VPSLLVDZ128rmkz
28748
  { 12147,  3,  1,  0,  0,  0, 0x200123f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12147 = VPSLLVDZ128rr
28749
  { 12148,  5,  1,  0,  0,  0, 0x202123f8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #12148 = VPSLLVDZ128rrk
28750
  { 12149,  4,  1,  0,  0,  0, 0x206123f8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #12149 = VPSLLVDZ128rrkz
28751
  { 12150,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400923f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12150 = VPSLLVDZ256rm
28752
  { 12151,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90923f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12151 = VPSLLVDZ256rmb
28753
  { 12152,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92923f8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #12152 = VPSLLVDZ256rmbk
28754
  { 12153,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96923f8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #12153 = VPSLLVDZ256rmbkz
28755
  { 12154,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402923f8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #12154 = VPSLLVDZ256rmk
28756
  { 12155,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406923f8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #12155 = VPSLLVDZ256rmkz
28757
  { 12156,  3,  1,  0,  0,  0, 0x400923f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12156 = VPSLLVDZ256rr
28758
  { 12157,  5,  1,  0,  0,  0, 0x402923f8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #12157 = VPSLLVDZ256rrk
28759
  { 12158,  4,  1,  0,  0,  0, 0x406923f8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #12158 = VPSLLVDZ256rrkz
28760
  { 12159,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808123f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12159 = VPSLLVDZrm
28761
  { 12160,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98123f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12160 = VPSLLVDZrmb
28762
  { 12161,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a123f8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #12161 = VPSLLVDZrmbk
28763
  { 12162,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e123f8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #12162 = VPSLLVDZrmbkz
28764
  { 12163,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a123f8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #12163 = VPSLLVDZrmk
28765
  { 12164,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e123f8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #12164 = VPSLLVDZrmkz
28766
  { 12165,  3,  1,  0,  0,  0, 0x808123f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12165 = VPSLLVDZrr
28767
  { 12166,  5,  1,  0,  0,  0, 0x80a123f8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #12166 = VPSLLVDZrrk
28768
  { 12167,  4,  1,  0,  0,  0, 0x80e123f8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #12167 = VPSLLVDZrrkz
28769
  { 12168,  7,  1,  0,  576,  0|(1ULL<<MCID::MayLoad), 0x123b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12168 = VPSLLVDrm
28770
  { 12169,  3,  1,  0,  573,  0, 0x123b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12169 = VPSLLVDrr
28771
  { 12170,  7,  1,  0,  576,  0|(1ULL<<MCID::MayLoad), 0x9a3b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12170 = VPSLLVQYrm
28772
  { 12171,  3,  1,  0,  573,  0, 0x9a3b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12171 = VPSLLVQYrr
28773
  { 12172,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001a3f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12172 = VPSLLVQZ128rm
28774
  { 12173,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101a3f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12173 = VPSLLVQZ128rmb
28775
  { 12174,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121a3f8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #12174 = VPSLLVQZ128rmbk
28776
  { 12175,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161a3f8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #12175 = VPSLLVQZ128rmbkz
28777
  { 12176,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021a3f8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #12176 = VPSLLVQZ128rmk
28778
  { 12177,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061a3f8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #12177 = VPSLLVQZ128rmkz
28779
  { 12178,  3,  1,  0,  0,  0, 0x2001a3f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12178 = VPSLLVQZ128rr
28780
  { 12179,  5,  1,  0,  0,  0, 0x2021a3f8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #12179 = VPSLLVQZ128rrk
28781
  { 12180,  4,  1,  0,  0,  0, 0x2061a3f8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #12180 = VPSLLVQZ128rrkz
28782
  { 12181,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009a3f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12181 = VPSLLVQZ256rm
28783
  { 12182,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109a3f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12182 = VPSLLVQZ256rmb
28784
  { 12183,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129a3f8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #12183 = VPSLLVQZ256rmbk
28785
  { 12184,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169a3f8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #12184 = VPSLLVQZ256rmbkz
28786
  { 12185,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029a3f8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #12185 = VPSLLVQZ256rmk
28787
  { 12186,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069a3f8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #12186 = VPSLLVQZ256rmkz
28788
  { 12187,  3,  1,  0,  0,  0, 0x4009a3f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12187 = VPSLLVQZ256rr
28789
  { 12188,  5,  1,  0,  0,  0, 0x4029a3f8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #12188 = VPSLLVQZ256rrk
28790
  { 12189,  4,  1,  0,  0,  0, 0x4069a3f8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #12189 = VPSLLVQZ256rrkz
28791
  { 12190,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081a3f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12190 = VPSLLVQZrm
28792
  { 12191,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181a3f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12191 = VPSLLVQZrmb
28793
  { 12192,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1a3f8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #12192 = VPSLLVQZrmbk
28794
  { 12193,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1a3f8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #12193 = VPSLLVQZrmbkz
28795
  { 12194,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1a3f8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #12194 = VPSLLVQZrmk
28796
  { 12195,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1a3f8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #12195 = VPSLLVQZrmkz
28797
  { 12196,  3,  1,  0,  0,  0, 0x8081a3f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12196 = VPSLLVQZrr
28798
  { 12197,  5,  1,  0,  0,  0, 0x80a1a3f8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #12197 = VPSLLVQZrrk
28799
  { 12198,  4,  1,  0,  0,  0, 0x80e1a3f8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #12198 = VPSLLVQZrrkz
28800
  { 12199,  7,  1,  0,  576,  0|(1ULL<<MCID::MayLoad), 0x1a3b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12199 = VPSLLVQrm
28801
  { 12200,  3,  1,  0,  573,  0, 0x1a3b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12200 = VPSLLVQrr
28802
  { 12201,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20018978009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12201 = VPSLLVWZ128rm
28803
  { 12202,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20218978009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #12202 = VPSLLVWZ128rmk
28804
  { 12203,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20618978009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #12203 = VPSLLVWZ128rmkz
28805
  { 12204,  3,  1,  0,  0,  0, 0x20018978009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12204 = VPSLLVWZ128rr
28806
  { 12205,  5,  1,  0,  0,  0, 0x20218978009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #12205 = VPSLLVWZ128rrk
28807
  { 12206,  4,  1,  0,  0,  0, 0x20618978009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #12206 = VPSLLVWZ128rrkz
28808
  { 12207,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40098978009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12207 = VPSLLVWZ256rm
28809
  { 12208,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40298978009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #12208 = VPSLLVWZ256rmk
28810
  { 12209,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40698978009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #12209 = VPSLLVWZ256rmkz
28811
  { 12210,  3,  1,  0,  0,  0, 0x40098978009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12210 = VPSLLVWZ256rr
28812
  { 12211,  5,  1,  0,  0,  0, 0x40298978009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #12211 = VPSLLVWZ256rrk
28813
  { 12212,  4,  1,  0,  0,  0, 0x40698978009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #12212 = VPSLLVWZ256rrkz
28814
  { 12213,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80818978009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12213 = VPSLLVWZrm
28815
  { 12214,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a18978009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #12214 = VPSLLVWZrmk
28816
  { 12215,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e18978009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #12215 = VPSLLVWZrmkz
28817
  { 12216,  3,  1,  0,  0,  0, 0x80818978009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12216 = VPSLLVWZrr
28818
  { 12217,  5,  1,  0,  0,  0, 0x80a18978009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #12217 = VPSLLVWZrrk
28819
  { 12218,  4,  1,  0,  0,  0, 0x80e18978009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #12218 = VPSLLVWZrrkz
28820
  { 12219,  3,  1,  0,  435,  0, 0x938b8045016ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #12219 = VPSLLWYri
28821
  { 12220,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x978b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12220 = VPSLLWYrm
28822
  { 12221,  3,  1,  0,  835,  0, 0x978b8005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr },  // Inst #12221 = VPSLLWYrr
28823
  { 12222,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200138f804501eULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12222 = VPSLLWZ128mi
28824
  { 12223,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202138f804501eULL, nullptr, nullptr, OperandInfo906, -1 ,nullptr },  // Inst #12223 = VPSLLWZ128mik
28825
  { 12224,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206138f804501eULL, nullptr, nullptr, OperandInfo907, -1 ,nullptr },  // Inst #12224 = VPSLLWZ128mikz
28826
  { 12225,  3,  1,  0,  0,  0, 0x200138f8045016ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12225 = VPSLLWZ128ri
28827
  { 12226,  5,  1,  0,  0,  0, 0x202138f8045016ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr },  // Inst #12226 = VPSLLWZ128rik
28828
  { 12227,  4,  1,  0,  0,  0, 0x206138f8045016ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr },  // Inst #12227 = VPSLLWZ128rikz
28829
  { 12228,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200178f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12228 = VPSLLWZ128rm
28830
  { 12229,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202178f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #12229 = VPSLLWZ128rmk
28831
  { 12230,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206178f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #12230 = VPSLLWZ128rmkz
28832
  { 12231,  3,  1,  0,  0,  0, 0x200178f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12231 = VPSLLWZ128rr
28833
  { 12232,  5,  1,  0,  0,  0, 0x202178f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #12232 = VPSLLWZ128rrk
28834
  { 12233,  4,  1,  0,  0,  0, 0x206178f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #12233 = VPSLLWZ128rrkz
28835
  { 12234,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400938f804501eULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12234 = VPSLLWZ256mi
28836
  { 12235,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402938f804501eULL, nullptr, nullptr, OperandInfo908, -1 ,nullptr },  // Inst #12235 = VPSLLWZ256mik
28837
  { 12236,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406938f804501eULL, nullptr, nullptr, OperandInfo909, -1 ,nullptr },  // Inst #12236 = VPSLLWZ256mikz
28838
  { 12237,  3,  1,  0,  0,  0, 0x400938f8045016ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12237 = VPSLLWZ256ri
28839
  { 12238,  5,  1,  0,  0,  0, 0x402938f8045016ULL, nullptr, nullptr, OperandInfo910, -1 ,nullptr },  // Inst #12238 = VPSLLWZ256rik
28840
  { 12239,  4,  1,  0,  0,  0, 0x406938f8045016ULL, nullptr, nullptr, OperandInfo911, -1 ,nullptr },  // Inst #12239 = VPSLLWZ256rikz
28841
  { 12240,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200978f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12240 = VPSLLWZ256rm
28842
  { 12241,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202978f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #12241 = VPSLLWZ256rmk
28843
  { 12242,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206978f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #12242 = VPSLLWZ256rmkz
28844
  { 12243,  3,  1,  0,  0,  0, 0x200978f8005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr },  // Inst #12243 = VPSLLWZ256rr
28845
  { 12244,  5,  1,  0,  0,  0, 0x202978f8005005ULL, nullptr, nullptr, OperandInfo927, -1 ,nullptr },  // Inst #12244 = VPSLLWZ256rrk
28846
  { 12245,  4,  1,  0,  0,  0, 0x206978f8005005ULL, nullptr, nullptr, OperandInfo928, -1 ,nullptr },  // Inst #12245 = VPSLLWZ256rrkz
28847
  { 12246,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808138f804501eULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12246 = VPSLLWZmi
28848
  { 12247,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a138f804501eULL, nullptr, nullptr, OperandInfo912, -1 ,nullptr },  // Inst #12247 = VPSLLWZmik
28849
  { 12248,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e138f804501eULL, nullptr, nullptr, OperandInfo913, -1 ,nullptr },  // Inst #12248 = VPSLLWZmikz
28850
  { 12249,  3,  1,  0,  0,  0, 0x808138f8045016ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12249 = VPSLLWZri
28851
  { 12250,  5,  1,  0,  0,  0, 0x80a138f8045016ULL, nullptr, nullptr, OperandInfo914, -1 ,nullptr },  // Inst #12250 = VPSLLWZrik
28852
  { 12251,  4,  1,  0,  0,  0, 0x80e138f8045016ULL, nullptr, nullptr, OperandInfo915, -1 ,nullptr },  // Inst #12251 = VPSLLWZrikz
28853
  { 12252,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x208178f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12252 = VPSLLWZrm
28854
  { 12253,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a178f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #12253 = VPSLLWZrmk
28855
  { 12254,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e178f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #12254 = VPSLLWZrmkz
28856
  { 12255,  3,  1,  0,  0,  0, 0x208178f8005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr },  // Inst #12255 = VPSLLWZrr
28857
  { 12256,  5,  1,  0,  0,  0, 0x20a178f8005005ULL, nullptr, nullptr, OperandInfo929, -1 ,nullptr },  // Inst #12256 = VPSLLWZrrk
28858
  { 12257,  4,  1,  0,  0,  0, 0x20e178f8005005ULL, nullptr, nullptr, OperandInfo930, -1 ,nullptr },  // Inst #12257 = VPSLLWZrrkz
28859
  { 12258,  3,  1,  0,  435,  0, 0x138b8045016ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #12258 = VPSLLWri
28860
  { 12259,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x178b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12259 = VPSLLWrm
28861
  { 12260,  3,  1,  0,  835,  0, 0x178b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12260 = VPSLLWrr
28862
  { 12261,  3,  1,  0,  435,  0, 0x93938045014ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #12261 = VPSRADYri
28863
  { 12262,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x97138005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12262 = VPSRADYrm
28864
  { 12263,  3,  1,  0,  835,  0, 0x97138005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr },  // Inst #12263 = VPSRADYrr
28865
  { 12264,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x901397804501cULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12264 = VPSRADZ128mbi
28866
  { 12265,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x921397804501cULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #12265 = VPSRADZ128mbik
28867
  { 12266,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x961397804501cULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #12266 = VPSRADZ128mbikz
28868
  { 12267,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001397804501cULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12267 = VPSRADZ128mi
28869
  { 12268,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021397804501cULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #12268 = VPSRADZ128mik
28870
  { 12269,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061397804501cULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #12269 = VPSRADZ128mikz
28871
  { 12270,  3,  1,  0,  0,  0, 0x20013978045014ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12270 = VPSRADZ128ri
28872
  { 12271,  5,  1,  0,  0,  0, 0x20213978045014ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr },  // Inst #12271 = VPSRADZ128rik
28873
  { 12272,  4,  1,  0,  0,  0, 0x20613978045014ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr },  // Inst #12272 = VPSRADZ128rikz
28874
  { 12273,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017178005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12273 = VPSRADZ128rm
28875
  { 12274,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217178005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #12274 = VPSRADZ128rmk
28876
  { 12275,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617178005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #12275 = VPSRADZ128rmkz
28877
  { 12276,  3,  1,  0,  0,  0, 0x20017178005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12276 = VPSRADZ128rr
28878
  { 12277,  5,  1,  0,  0,  0, 0x20217178005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #12277 = VPSRADZ128rrk
28879
  { 12278,  4,  1,  0,  0,  0, 0x20617178005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #12278 = VPSRADZ128rrkz
28880
  { 12279,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x909397804501cULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12279 = VPSRADZ256mbi
28881
  { 12280,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x929397804501cULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #12280 = VPSRADZ256mbik
28882
  { 12281,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x969397804501cULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #12281 = VPSRADZ256mbikz
28883
  { 12282,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009397804501cULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12282 = VPSRADZ256mi
28884
  { 12283,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029397804501cULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #12283 = VPSRADZ256mik
28885
  { 12284,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069397804501cULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #12284 = VPSRADZ256mikz
28886
  { 12285,  3,  1,  0,  0,  0, 0x40093978045014ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12285 = VPSRADZ256ri
28887
  { 12286,  5,  1,  0,  0,  0, 0x40293978045014ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr },  // Inst #12286 = VPSRADZ256rik
28888
  { 12287,  4,  1,  0,  0,  0, 0x40693978045014ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr },  // Inst #12287 = VPSRADZ256rikz
28889
  { 12288,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20097178005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12288 = VPSRADZ256rm
28890
  { 12289,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20297178005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #12289 = VPSRADZ256rmk
28891
  { 12290,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20697178005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #12290 = VPSRADZ256rmkz
28892
  { 12291,  3,  1,  0,  0,  0, 0x20097178005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr },  // Inst #12291 = VPSRADZ256rr
28893
  { 12292,  5,  1,  0,  0,  0, 0x20297178005005ULL, nullptr, nullptr, OperandInfo918, -1 ,nullptr },  // Inst #12292 = VPSRADZ256rrk
28894
  { 12293,  4,  1,  0,  0,  0, 0x20697178005005ULL, nullptr, nullptr, OperandInfo919, -1 ,nullptr },  // Inst #12293 = VPSRADZ256rrkz
28895
  { 12294,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x981397804501cULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12294 = VPSRADZmbi
28896
  { 12295,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a1397804501cULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #12295 = VPSRADZmbik
28897
  { 12296,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e1397804501cULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #12296 = VPSRADZmbikz
28898
  { 12297,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081397804501cULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12297 = VPSRADZmi
28899
  { 12298,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1397804501cULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #12298 = VPSRADZmik
28900
  { 12299,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1397804501cULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #12299 = VPSRADZmikz
28901
  { 12300,  3,  1,  0,  0,  0, 0x80813978045014ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12300 = VPSRADZri
28902
  { 12301,  5,  1,  0,  0,  0, 0x80a13978045014ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #12301 = VPSRADZrik
28903
  { 12302,  4,  1,  0,  0,  0, 0x80e13978045014ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #12302 = VPSRADZrikz
28904
  { 12303,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20817178005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12303 = VPSRADZrm
28905
  { 12304,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a17178005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #12304 = VPSRADZrmk
28906
  { 12305,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e17178005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #12305 = VPSRADZrmkz
28907
  { 12306,  3,  1,  0,  0,  0, 0x20817178005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr },  // Inst #12306 = VPSRADZrr
28908
  { 12307,  5,  1,  0,  0,  0, 0x20a17178005005ULL, nullptr, nullptr, OperandInfo921, -1 ,nullptr },  // Inst #12307 = VPSRADZrrk
28909
  { 12308,  4,  1,  0,  0,  0, 0x20e17178005005ULL, nullptr, nullptr, OperandInfo922, -1 ,nullptr },  // Inst #12308 = VPSRADZrrkz
28910
  { 12309,  3,  1,  0,  435,  0, 0x13938045014ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #12309 = VPSRADri
28911
  { 12310,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x17138005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12310 = VPSRADrm
28912
  { 12311,  3,  1,  0,  835,  0, 0x17138005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12311 = VPSRADrr
28913
  { 12312,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101b97804501cULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12312 = VPSRAQZ128mbi
28914
  { 12313,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121b97804501cULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #12313 = VPSRAQZ128mbik
28915
  { 12314,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161b97804501cULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #12314 = VPSRAQZ128mbikz
28916
  { 12315,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001b97804501cULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12315 = VPSRAQZ128mi
28917
  { 12316,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b97804501cULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #12316 = VPSRAQZ128mik
28918
  { 12317,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061b97804501cULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #12317 = VPSRAQZ128mikz
28919
  { 12318,  3,  1,  0,  0,  0, 0x2001b978045014ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12318 = VPSRAQZ128ri
28920
  { 12319,  5,  1,  0,  0,  0, 0x2021b978045014ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr },  // Inst #12319 = VPSRAQZ128rik
28921
  { 12320,  4,  1,  0,  0,  0, 0x2061b978045014ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr },  // Inst #12320 = VPSRAQZ128rikz
28922
  { 12321,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001f178005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12321 = VPSRAQZ128rm
28923
  { 12322,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021f178005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #12322 = VPSRAQZ128rmk
28924
  { 12323,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061f178005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #12323 = VPSRAQZ128rmkz
28925
  { 12324,  3,  1,  0,  0,  0, 0x2001f178005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12324 = VPSRAQZ128rr
28926
  { 12325,  5,  1,  0,  0,  0, 0x2021f178005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #12325 = VPSRAQZ128rrk
28927
  { 12326,  4,  1,  0,  0,  0, 0x2061f178005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #12326 = VPSRAQZ128rrkz
28928
  { 12327,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109b97804501cULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12327 = VPSRAQZ256mbi
28929
  { 12328,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129b97804501cULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #12328 = VPSRAQZ256mbik
28930
  { 12329,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169b97804501cULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #12329 = VPSRAQZ256mbikz
28931
  { 12330,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009b97804501cULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12330 = VPSRAQZ256mi
28932
  { 12331,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b97804501cULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #12331 = VPSRAQZ256mik
28933
  { 12332,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069b97804501cULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #12332 = VPSRAQZ256mikz
28934
  { 12333,  3,  1,  0,  0,  0, 0x4009b978045014ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12333 = VPSRAQZ256ri
28935
  { 12334,  5,  1,  0,  0,  0, 0x4029b978045014ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr },  // Inst #12334 = VPSRAQZ256rik
28936
  { 12335,  4,  1,  0,  0,  0, 0x4069b978045014ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr },  // Inst #12335 = VPSRAQZ256rikz
28937
  { 12336,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2009f178005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12336 = VPSRAQZ256rm
28938
  { 12337,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2029f178005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #12337 = VPSRAQZ256rmk
28939
  { 12338,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2069f178005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #12338 = VPSRAQZ256rmkz
28940
  { 12339,  3,  1,  0,  0,  0, 0x2009f178005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr },  // Inst #12339 = VPSRAQZ256rr
28941
  { 12340,  5,  1,  0,  0,  0, 0x2029f178005005ULL, nullptr, nullptr, OperandInfo923, -1 ,nullptr },  // Inst #12340 = VPSRAQZ256rrk
28942
  { 12341,  4,  1,  0,  0,  0, 0x2069f178005005ULL, nullptr, nullptr, OperandInfo924, -1 ,nullptr },  // Inst #12341 = VPSRAQZ256rrkz
28943
  { 12342,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181b97804501cULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12342 = VPSRAQZmbi
28944
  { 12343,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1b97804501cULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #12343 = VPSRAQZmbik
28945
  { 12344,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1b97804501cULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #12344 = VPSRAQZmbikz
28946
  { 12345,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081b97804501cULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12345 = VPSRAQZmi
28947
  { 12346,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b97804501cULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #12346 = VPSRAQZmik
28948
  { 12347,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1b97804501cULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #12347 = VPSRAQZmikz
28949
  { 12348,  3,  1,  0,  0,  0, 0x8081b978045014ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12348 = VPSRAQZri
28950
  { 12349,  5,  1,  0,  0,  0, 0x80a1b978045014ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #12349 = VPSRAQZrik
28951
  { 12350,  4,  1,  0,  0,  0, 0x80e1b978045014ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #12350 = VPSRAQZrikz
28952
  { 12351,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2081f178005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12351 = VPSRAQZrm
28953
  { 12352,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a1f178005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #12352 = VPSRAQZrmk
28954
  { 12353,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e1f178005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #12353 = VPSRAQZrmkz
28955
  { 12354,  3,  1,  0,  0,  0, 0x2081f178005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr },  // Inst #12354 = VPSRAQZrr
28956
  { 12355,  5,  1,  0,  0,  0, 0x20a1f178005005ULL, nullptr, nullptr, OperandInfo925, -1 ,nullptr },  // Inst #12355 = VPSRAQZrrk
28957
  { 12356,  4,  1,  0,  0,  0, 0x20e1f178005005ULL, nullptr, nullptr, OperandInfo926, -1 ,nullptr },  // Inst #12356 = VPSRAQZrrkz
28958
  { 12357,  7,  1,  0,  576,  0|(1ULL<<MCID::MayLoad), 0x92338009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12357 = VPSRAVDYrm
28959
  { 12358,  3,  1,  0,  573,  0, 0x92338009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12358 = VPSRAVDYrr
28960
  { 12359,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12359 = VPSRAVDZ128rm
28961
  { 12360,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12360 = VPSRAVDZ128rmb
28962
  { 12361,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212378009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #12361 = VPSRAVDZ128rmbk
28963
  { 12362,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612378009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #12362 = VPSRAVDZ128rmbkz
28964
  { 12363,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212378009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #12363 = VPSRAVDZ128rmk
28965
  { 12364,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612378009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #12364 = VPSRAVDZ128rmkz
28966
  { 12365,  3,  1,  0,  0,  0, 0x20012378009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12365 = VPSRAVDZ128rr
28967
  { 12366,  5,  1,  0,  0,  0, 0x20212378009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #12366 = VPSRAVDZ128rrk
28968
  { 12367,  4,  1,  0,  0,  0, 0x20612378009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #12367 = VPSRAVDZ128rrkz
28969
  { 12368,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12368 = VPSRAVDZ256rm
28970
  { 12369,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12369 = VPSRAVDZ256rmb
28971
  { 12370,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292378009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #12370 = VPSRAVDZ256rmbk
28972
  { 12371,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692378009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #12371 = VPSRAVDZ256rmbkz
28973
  { 12372,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292378009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #12372 = VPSRAVDZ256rmk
28974
  { 12373,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692378009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #12373 = VPSRAVDZ256rmkz
28975
  { 12374,  3,  1,  0,  0,  0, 0x40092378009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12374 = VPSRAVDZ256rr
28976
  { 12375,  5,  1,  0,  0,  0, 0x40292378009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #12375 = VPSRAVDZ256rrk
28977
  { 12376,  4,  1,  0,  0,  0, 0x40692378009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #12376 = VPSRAVDZ256rrkz
28978
  { 12377,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12377 = VPSRAVDZrm
28979
  { 12378,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12378 = VPSRAVDZrmb
28980
  { 12379,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12378009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #12379 = VPSRAVDZrmbk
28981
  { 12380,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12378009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #12380 = VPSRAVDZrmbkz
28982
  { 12381,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12378009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #12381 = VPSRAVDZrmk
28983
  { 12382,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12378009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #12382 = VPSRAVDZrmkz
28984
  { 12383,  3,  1,  0,  0,  0, 0x80812378009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12383 = VPSRAVDZrr
28985
  { 12384,  5,  1,  0,  0,  0, 0x80a12378009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #12384 = VPSRAVDZrrk
28986
  { 12385,  4,  1,  0,  0,  0, 0x80e12378009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #12385 = VPSRAVDZrrkz
28987
  { 12386,  7,  1,  0,  576,  0|(1ULL<<MCID::MayLoad), 0x12338009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12386 = VPSRAVDrm
28988
  { 12387,  3,  1,  0,  573,  0, 0x12338009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12387 = VPSRAVDrr
28989
  { 12388,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001a378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12388 = VPSRAVQZ128rm
28990
  { 12389,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101a378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12389 = VPSRAVQZ128rmb
28991
  { 12390,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121a378009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #12390 = VPSRAVQZ128rmbk
28992
  { 12391,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161a378009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #12391 = VPSRAVQZ128rmbkz
28993
  { 12392,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021a378009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #12392 = VPSRAVQZ128rmk
28994
  { 12393,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061a378009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #12393 = VPSRAVQZ128rmkz
28995
  { 12394,  3,  1,  0,  0,  0, 0x2001a378009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12394 = VPSRAVQZ128rr
28996
  { 12395,  5,  1,  0,  0,  0, 0x2021a378009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #12395 = VPSRAVQZ128rrk
28997
  { 12396,  4,  1,  0,  0,  0, 0x2061a378009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #12396 = VPSRAVQZ128rrkz
28998
  { 12397,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009a378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12397 = VPSRAVQZ256rm
28999
  { 12398,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109a378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12398 = VPSRAVQZ256rmb
29000
  { 12399,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129a378009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #12399 = VPSRAVQZ256rmbk
29001
  { 12400,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169a378009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #12400 = VPSRAVQZ256rmbkz
29002
  { 12401,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029a378009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #12401 = VPSRAVQZ256rmk
29003
  { 12402,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069a378009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #12402 = VPSRAVQZ256rmkz
29004
  { 12403,  3,  1,  0,  0,  0, 0x4009a378009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12403 = VPSRAVQZ256rr
29005
  { 12404,  5,  1,  0,  0,  0, 0x4029a378009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #12404 = VPSRAVQZ256rrk
29006
  { 12405,  4,  1,  0,  0,  0, 0x4069a378009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #12405 = VPSRAVQZ256rrkz
29007
  { 12406,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081a378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12406 = VPSRAVQZrm
29008
  { 12407,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181a378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12407 = VPSRAVQZrmb
29009
  { 12408,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1a378009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #12408 = VPSRAVQZrmbk
29010
  { 12409,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1a378009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #12409 = VPSRAVQZrmbkz
29011
  { 12410,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1a378009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #12410 = VPSRAVQZrmk
29012
  { 12411,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1a378009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #12411 = VPSRAVQZrmkz
29013
  { 12412,  3,  1,  0,  0,  0, 0x8081a378009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12412 = VPSRAVQZrr
29014
  { 12413,  5,  1,  0,  0,  0, 0x80a1a378009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #12413 = VPSRAVQZrrk
29015
  { 12414,  4,  1,  0,  0,  0, 0x80e1a378009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #12414 = VPSRAVQZrrkz
29016
  { 12415,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200188f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12415 = VPSRAVWZ128rm
29017
  { 12416,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202188f8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #12416 = VPSRAVWZ128rmk
29018
  { 12417,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206188f8009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #12417 = VPSRAVWZ128rmkz
29019
  { 12418,  3,  1,  0,  0,  0, 0x200188f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12418 = VPSRAVWZ128rr
29020
  { 12419,  5,  1,  0,  0,  0, 0x202188f8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #12419 = VPSRAVWZ128rrk
29021
  { 12420,  4,  1,  0,  0,  0, 0x206188f8009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #12420 = VPSRAVWZ128rrkz
29022
  { 12421,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400988f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12421 = VPSRAVWZ256rm
29023
  { 12422,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402988f8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #12422 = VPSRAVWZ256rmk
29024
  { 12423,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406988f8009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #12423 = VPSRAVWZ256rmkz
29025
  { 12424,  3,  1,  0,  0,  0, 0x400988f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12424 = VPSRAVWZ256rr
29026
  { 12425,  5,  1,  0,  0,  0, 0x402988f8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #12425 = VPSRAVWZ256rrk
29027
  { 12426,  4,  1,  0,  0,  0, 0x406988f8009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #12426 = VPSRAVWZ256rrkz
29028
  { 12427,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808188f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12427 = VPSRAVWZrm
29029
  { 12428,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a188f8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #12428 = VPSRAVWZrmk
29030
  { 12429,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e188f8009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #12429 = VPSRAVWZrmkz
29031
  { 12430,  3,  1,  0,  0,  0, 0x808188f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12430 = VPSRAVWZrr
29032
  { 12431,  5,  1,  0,  0,  0, 0x80a188f8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #12431 = VPSRAVWZrrk
29033
  { 12432,  4,  1,  0,  0,  0, 0x80e188f8009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #12432 = VPSRAVWZrrkz
29034
  { 12433,  3,  1,  0,  435,  0, 0x938b8045014ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #12433 = VPSRAWYri
29035
  { 12434,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x970b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12434 = VPSRAWYrm
29036
  { 12435,  3,  1,  0,  835,  0, 0x970b8005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr },  // Inst #12435 = VPSRAWYrr
29037
  { 12436,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200138f804501cULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12436 = VPSRAWZ128mi
29038
  { 12437,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202138f804501cULL, nullptr, nullptr, OperandInfo906, -1 ,nullptr },  // Inst #12437 = VPSRAWZ128mik
29039
  { 12438,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206138f804501cULL, nullptr, nullptr, OperandInfo907, -1 ,nullptr },  // Inst #12438 = VPSRAWZ128mikz
29040
  { 12439,  3,  1,  0,  0,  0, 0x200138f8045014ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12439 = VPSRAWZ128ri
29041
  { 12440,  5,  1,  0,  0,  0, 0x202138f8045014ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr },  // Inst #12440 = VPSRAWZ128rik
29042
  { 12441,  4,  1,  0,  0,  0, 0x206138f8045014ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr },  // Inst #12441 = VPSRAWZ128rikz
29043
  { 12442,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200170f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12442 = VPSRAWZ128rm
29044
  { 12443,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202170f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #12443 = VPSRAWZ128rmk
29045
  { 12444,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206170f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #12444 = VPSRAWZ128rmkz
29046
  { 12445,  3,  1,  0,  0,  0, 0x200170f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12445 = VPSRAWZ128rr
29047
  { 12446,  5,  1,  0,  0,  0, 0x202170f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #12446 = VPSRAWZ128rrk
29048
  { 12447,  4,  1,  0,  0,  0, 0x206170f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #12447 = VPSRAWZ128rrkz
29049
  { 12448,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400938f804501cULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12448 = VPSRAWZ256mi
29050
  { 12449,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402938f804501cULL, nullptr, nullptr, OperandInfo908, -1 ,nullptr },  // Inst #12449 = VPSRAWZ256mik
29051
  { 12450,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406938f804501cULL, nullptr, nullptr, OperandInfo909, -1 ,nullptr },  // Inst #12450 = VPSRAWZ256mikz
29052
  { 12451,  3,  1,  0,  0,  0, 0x400938f8045014ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12451 = VPSRAWZ256ri
29053
  { 12452,  5,  1,  0,  0,  0, 0x402938f8045014ULL, nullptr, nullptr, OperandInfo910, -1 ,nullptr },  // Inst #12452 = VPSRAWZ256rik
29054
  { 12453,  4,  1,  0,  0,  0, 0x406938f8045014ULL, nullptr, nullptr, OperandInfo911, -1 ,nullptr },  // Inst #12453 = VPSRAWZ256rikz
29055
  { 12454,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200970f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12454 = VPSRAWZ256rm
29056
  { 12455,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202970f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #12455 = VPSRAWZ256rmk
29057
  { 12456,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206970f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #12456 = VPSRAWZ256rmkz
29058
  { 12457,  3,  1,  0,  0,  0, 0x200970f8005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr },  // Inst #12457 = VPSRAWZ256rr
29059
  { 12458,  5,  1,  0,  0,  0, 0x202970f8005005ULL, nullptr, nullptr, OperandInfo927, -1 ,nullptr },  // Inst #12458 = VPSRAWZ256rrk
29060
  { 12459,  4,  1,  0,  0,  0, 0x206970f8005005ULL, nullptr, nullptr, OperandInfo928, -1 ,nullptr },  // Inst #12459 = VPSRAWZ256rrkz
29061
  { 12460,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808138f804501cULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12460 = VPSRAWZmi
29062
  { 12461,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a138f804501cULL, nullptr, nullptr, OperandInfo912, -1 ,nullptr },  // Inst #12461 = VPSRAWZmik
29063
  { 12462,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e138f804501cULL, nullptr, nullptr, OperandInfo913, -1 ,nullptr },  // Inst #12462 = VPSRAWZmikz
29064
  { 12463,  3,  1,  0,  0,  0, 0x808138f8045014ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12463 = VPSRAWZri
29065
  { 12464,  5,  1,  0,  0,  0, 0x80a138f8045014ULL, nullptr, nullptr, OperandInfo914, -1 ,nullptr },  // Inst #12464 = VPSRAWZrik
29066
  { 12465,  4,  1,  0,  0,  0, 0x80e138f8045014ULL, nullptr, nullptr, OperandInfo915, -1 ,nullptr },  // Inst #12465 = VPSRAWZrikz
29067
  { 12466,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x208170f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12466 = VPSRAWZrm
29068
  { 12467,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a170f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #12467 = VPSRAWZrmk
29069
  { 12468,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e170f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #12468 = VPSRAWZrmkz
29070
  { 12469,  3,  1,  0,  0,  0, 0x208170f8005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr },  // Inst #12469 = VPSRAWZrr
29071
  { 12470,  5,  1,  0,  0,  0, 0x20a170f8005005ULL, nullptr, nullptr, OperandInfo929, -1 ,nullptr },  // Inst #12470 = VPSRAWZrrk
29072
  { 12471,  4,  1,  0,  0,  0, 0x20e170f8005005ULL, nullptr, nullptr, OperandInfo930, -1 ,nullptr },  // Inst #12471 = VPSRAWZrrkz
29073
  { 12472,  3,  1,  0,  435,  0, 0x138b8045014ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #12472 = VPSRAWri
29074
  { 12473,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x170b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12473 = VPSRAWrm
29075
  { 12474,  3,  1,  0,  835,  0, 0x170b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12474 = VPSRAWrr
29076
  { 12475,  3,  1,  0,  837,  0, 0x939b8045013ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #12475 = VPSRLDQYri
29077
  { 12476,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200139f004501bULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12476 = VPSRLDQZ128rm
29078
  { 12477,  3,  1,  0,  0,  0, 0x200139f0045013ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12477 = VPSRLDQZ128rr
29079
  { 12478,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400939f004501bULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12478 = VPSRLDQZ256rm
29080
  { 12479,  3,  1,  0,  0,  0, 0x400939f0045013ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12479 = VPSRLDQZ256rr
29081
  { 12480,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808139f004501bULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12480 = VPSRLDQZ512rm
29082
  { 12481,  3,  1,  0,  0,  0, 0x808139f0045013ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12481 = VPSRLDQZ512rr
29083
  { 12482,  3,  1,  0,  837,  0, 0x139b8045013ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #12482 = VPSRLDQri
29084
  { 12483,  3,  1,  0,  435,  0, 0x93938045012ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #12483 = VPSRLDYri
29085
  { 12484,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x96938005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12484 = VPSRLDYrm
29086
  { 12485,  3,  1,  0,  835,  0, 0x96938005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr },  // Inst #12485 = VPSRLDYrr
29087
  { 12486,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x901397804501aULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12486 = VPSRLDZ128mbi
29088
  { 12487,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x921397804501aULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #12487 = VPSRLDZ128mbik
29089
  { 12488,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x961397804501aULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #12488 = VPSRLDZ128mbikz
29090
  { 12489,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001397804501aULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12489 = VPSRLDZ128mi
29091
  { 12490,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021397804501aULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #12490 = VPSRLDZ128mik
29092
  { 12491,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061397804501aULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #12491 = VPSRLDZ128mikz
29093
  { 12492,  3,  1,  0,  0,  0, 0x20013978045012ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12492 = VPSRLDZ128ri
29094
  { 12493,  5,  1,  0,  0,  0, 0x20213978045012ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr },  // Inst #12493 = VPSRLDZ128rik
29095
  { 12494,  4,  1,  0,  0,  0, 0x20613978045012ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr },  // Inst #12494 = VPSRLDZ128rikz
29096
  { 12495,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016978005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12495 = VPSRLDZ128rm
29097
  { 12496,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216978005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #12496 = VPSRLDZ128rmk
29098
  { 12497,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20616978005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #12497 = VPSRLDZ128rmkz
29099
  { 12498,  3,  1,  0,  0,  0, 0x20016978005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12498 = VPSRLDZ128rr
29100
  { 12499,  5,  1,  0,  0,  0, 0x20216978005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #12499 = VPSRLDZ128rrk
29101
  { 12500,  4,  1,  0,  0,  0, 0x20616978005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #12500 = VPSRLDZ128rrkz
29102
  { 12501,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x909397804501aULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12501 = VPSRLDZ256mbi
29103
  { 12502,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x929397804501aULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #12502 = VPSRLDZ256mbik
29104
  { 12503,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x969397804501aULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #12503 = VPSRLDZ256mbikz
29105
  { 12504,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009397804501aULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12504 = VPSRLDZ256mi
29106
  { 12505,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029397804501aULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #12505 = VPSRLDZ256mik
29107
  { 12506,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069397804501aULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #12506 = VPSRLDZ256mikz
29108
  { 12507,  3,  1,  0,  0,  0, 0x40093978045012ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12507 = VPSRLDZ256ri
29109
  { 12508,  5,  1,  0,  0,  0, 0x40293978045012ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr },  // Inst #12508 = VPSRLDZ256rik
29110
  { 12509,  4,  1,  0,  0,  0, 0x40693978045012ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr },  // Inst #12509 = VPSRLDZ256rikz
29111
  { 12510,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20096978005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12510 = VPSRLDZ256rm
29112
  { 12511,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20296978005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #12511 = VPSRLDZ256rmk
29113
  { 12512,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20696978005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #12512 = VPSRLDZ256rmkz
29114
  { 12513,  3,  1,  0,  0,  0, 0x20096978005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr },  // Inst #12513 = VPSRLDZ256rr
29115
  { 12514,  5,  1,  0,  0,  0, 0x20296978005005ULL, nullptr, nullptr, OperandInfo918, -1 ,nullptr },  // Inst #12514 = VPSRLDZ256rrk
29116
  { 12515,  4,  1,  0,  0,  0, 0x20696978005005ULL, nullptr, nullptr, OperandInfo919, -1 ,nullptr },  // Inst #12515 = VPSRLDZ256rrkz
29117
  { 12516,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x981397804501aULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12516 = VPSRLDZmbi
29118
  { 12517,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a1397804501aULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #12517 = VPSRLDZmbik
29119
  { 12518,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e1397804501aULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #12518 = VPSRLDZmbikz
29120
  { 12519,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081397804501aULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12519 = VPSRLDZmi
29121
  { 12520,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1397804501aULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #12520 = VPSRLDZmik
29122
  { 12521,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1397804501aULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #12521 = VPSRLDZmikz
29123
  { 12522,  3,  1,  0,  0,  0, 0x80813978045012ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12522 = VPSRLDZri
29124
  { 12523,  5,  1,  0,  0,  0, 0x80a13978045012ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #12523 = VPSRLDZrik
29125
  { 12524,  4,  1,  0,  0,  0, 0x80e13978045012ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #12524 = VPSRLDZrikz
29126
  { 12525,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20816978005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12525 = VPSRLDZrm
29127
  { 12526,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a16978005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #12526 = VPSRLDZrmk
29128
  { 12527,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e16978005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #12527 = VPSRLDZrmkz
29129
  { 12528,  3,  1,  0,  0,  0, 0x20816978005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr },  // Inst #12528 = VPSRLDZrr
29130
  { 12529,  5,  1,  0,  0,  0, 0x20a16978005005ULL, nullptr, nullptr, OperandInfo921, -1 ,nullptr },  // Inst #12529 = VPSRLDZrrk
29131
  { 12530,  4,  1,  0,  0,  0, 0x20e16978005005ULL, nullptr, nullptr, OperandInfo922, -1 ,nullptr },  // Inst #12530 = VPSRLDZrrkz
29132
  { 12531,  3,  1,  0,  435,  0, 0x13938045012ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #12531 = VPSRLDri
29133
  { 12532,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x16938005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12532 = VPSRLDrm
29134
  { 12533,  3,  1,  0,  835,  0, 0x16938005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12533 = VPSRLDrr
29135
  { 12534,  3,  1,  0,  435,  0, 0x939b8045012ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #12534 = VPSRLQYri
29136
  { 12535,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x969b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12535 = VPSRLQYrm
29137
  { 12536,  3,  1,  0,  835,  0, 0x969b8005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr },  // Inst #12536 = VPSRLQYrr
29138
  { 12537,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101b9f804501aULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12537 = VPSRLQZ128mbi
29139
  { 12538,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121b9f804501aULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #12538 = VPSRLQZ128mbik
29140
  { 12539,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161b9f804501aULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #12539 = VPSRLQZ128mbikz
29141
  { 12540,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001b9f804501aULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12540 = VPSRLQZ128mi
29142
  { 12541,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b9f804501aULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #12541 = VPSRLQZ128mik
29143
  { 12542,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061b9f804501aULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #12542 = VPSRLQZ128mikz
29144
  { 12543,  3,  1,  0,  0,  0, 0x2001b9f8045012ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12543 = VPSRLQZ128ri
29145
  { 12544,  5,  1,  0,  0,  0, 0x2021b9f8045012ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr },  // Inst #12544 = VPSRLQZ128rik
29146
  { 12545,  4,  1,  0,  0,  0, 0x2061b9f8045012ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr },  // Inst #12545 = VPSRLQZ128rikz
29147
  { 12546,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001e9f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12546 = VPSRLQZ128rm
29148
  { 12547,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021e9f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #12547 = VPSRLQZ128rmk
29149
  { 12548,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061e9f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #12548 = VPSRLQZ128rmkz
29150
  { 12549,  3,  1,  0,  0,  0, 0x2001e9f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12549 = VPSRLQZ128rr
29151
  { 12550,  5,  1,  0,  0,  0, 0x2021e9f8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #12550 = VPSRLQZ128rrk
29152
  { 12551,  4,  1,  0,  0,  0, 0x2061e9f8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #12551 = VPSRLQZ128rrkz
29153
  { 12552,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109b9f804501aULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12552 = VPSRLQZ256mbi
29154
  { 12553,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129b9f804501aULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #12553 = VPSRLQZ256mbik
29155
  { 12554,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169b9f804501aULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #12554 = VPSRLQZ256mbikz
29156
  { 12555,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009b9f804501aULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12555 = VPSRLQZ256mi
29157
  { 12556,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b9f804501aULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #12556 = VPSRLQZ256mik
29158
  { 12557,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069b9f804501aULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #12557 = VPSRLQZ256mikz
29159
  { 12558,  3,  1,  0,  0,  0, 0x4009b9f8045012ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12558 = VPSRLQZ256ri
29160
  { 12559,  5,  1,  0,  0,  0, 0x4029b9f8045012ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr },  // Inst #12559 = VPSRLQZ256rik
29161
  { 12560,  4,  1,  0,  0,  0, 0x4069b9f8045012ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr },  // Inst #12560 = VPSRLQZ256rikz
29162
  { 12561,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2009e9f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12561 = VPSRLQZ256rm
29163
  { 12562,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2029e9f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #12562 = VPSRLQZ256rmk
29164
  { 12563,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2069e9f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #12563 = VPSRLQZ256rmkz
29165
  { 12564,  3,  1,  0,  0,  0, 0x2009e9f8005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr },  // Inst #12564 = VPSRLQZ256rr
29166
  { 12565,  5,  1,  0,  0,  0, 0x2029e9f8005005ULL, nullptr, nullptr, OperandInfo923, -1 ,nullptr },  // Inst #12565 = VPSRLQZ256rrk
29167
  { 12566,  4,  1,  0,  0,  0, 0x2069e9f8005005ULL, nullptr, nullptr, OperandInfo924, -1 ,nullptr },  // Inst #12566 = VPSRLQZ256rrkz
29168
  { 12567,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181b9f804501aULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12567 = VPSRLQZmbi
29169
  { 12568,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1b9f804501aULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #12568 = VPSRLQZmbik
29170
  { 12569,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1b9f804501aULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #12569 = VPSRLQZmbikz
29171
  { 12570,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081b9f804501aULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12570 = VPSRLQZmi
29172
  { 12571,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b9f804501aULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #12571 = VPSRLQZmik
29173
  { 12572,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1b9f804501aULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #12572 = VPSRLQZmikz
29174
  { 12573,  3,  1,  0,  0,  0, 0x8081b9f8045012ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12573 = VPSRLQZri
29175
  { 12574,  5,  1,  0,  0,  0, 0x80a1b9f8045012ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #12574 = VPSRLQZrik
29176
  { 12575,  4,  1,  0,  0,  0, 0x80e1b9f8045012ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #12575 = VPSRLQZrikz
29177
  { 12576,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2081e9f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12576 = VPSRLQZrm
29178
  { 12577,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a1e9f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #12577 = VPSRLQZrmk
29179
  { 12578,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e1e9f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #12578 = VPSRLQZrmkz
29180
  { 12579,  3,  1,  0,  0,  0, 0x2081e9f8005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr },  // Inst #12579 = VPSRLQZrr
29181
  { 12580,  5,  1,  0,  0,  0, 0x20a1e9f8005005ULL, nullptr, nullptr, OperandInfo925, -1 ,nullptr },  // Inst #12580 = VPSRLQZrrk
29182
  { 12581,  4,  1,  0,  0,  0, 0x20e1e9f8005005ULL, nullptr, nullptr, OperandInfo926, -1 ,nullptr },  // Inst #12581 = VPSRLQZrrkz
29183
  { 12582,  3,  1,  0,  435,  0, 0x139b8045012ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #12582 = VPSRLQri
29184
  { 12583,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x169b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12583 = VPSRLQrm
29185
  { 12584,  3,  1,  0,  835,  0, 0x169b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12584 = VPSRLQrr
29186
  { 12585,  7,  1,  0,  576,  0|(1ULL<<MCID::MayLoad), 0x922b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12585 = VPSRLVDYrm
29187
  { 12586,  3,  1,  0,  573,  0, 0x922b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12586 = VPSRLVDYrr
29188
  { 12587,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200122f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12587 = VPSRLVDZ128rm
29189
  { 12588,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90122f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12588 = VPSRLVDZ128rmb
29190
  { 12589,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92122f8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #12589 = VPSRLVDZ128rmbk
29191
  { 12590,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96122f8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #12590 = VPSRLVDZ128rmbkz
29192
  { 12591,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202122f8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #12591 = VPSRLVDZ128rmk
29193
  { 12592,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206122f8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #12592 = VPSRLVDZ128rmkz
29194
  { 12593,  3,  1,  0,  0,  0, 0x200122f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12593 = VPSRLVDZ128rr
29195
  { 12594,  5,  1,  0,  0,  0, 0x202122f8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #12594 = VPSRLVDZ128rrk
29196
  { 12595,  4,  1,  0,  0,  0, 0x206122f8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #12595 = VPSRLVDZ128rrkz
29197
  { 12596,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400922f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12596 = VPSRLVDZ256rm
29198
  { 12597,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90922f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12597 = VPSRLVDZ256rmb
29199
  { 12598,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92922f8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #12598 = VPSRLVDZ256rmbk
29200
  { 12599,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96922f8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #12599 = VPSRLVDZ256rmbkz
29201
  { 12600,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402922f8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #12600 = VPSRLVDZ256rmk
29202
  { 12601,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406922f8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #12601 = VPSRLVDZ256rmkz
29203
  { 12602,  3,  1,  0,  0,  0, 0x400922f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12602 = VPSRLVDZ256rr
29204
  { 12603,  5,  1,  0,  0,  0, 0x402922f8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #12603 = VPSRLVDZ256rrk
29205
  { 12604,  4,  1,  0,  0,  0, 0x406922f8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #12604 = VPSRLVDZ256rrkz
29206
  { 12605,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808122f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12605 = VPSRLVDZrm
29207
  { 12606,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98122f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12606 = VPSRLVDZrmb
29208
  { 12607,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a122f8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #12607 = VPSRLVDZrmbk
29209
  { 12608,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e122f8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #12608 = VPSRLVDZrmbkz
29210
  { 12609,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a122f8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #12609 = VPSRLVDZrmk
29211
  { 12610,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e122f8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #12610 = VPSRLVDZrmkz
29212
  { 12611,  3,  1,  0,  0,  0, 0x808122f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12611 = VPSRLVDZrr
29213
  { 12612,  5,  1,  0,  0,  0, 0x80a122f8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #12612 = VPSRLVDZrrk
29214
  { 12613,  4,  1,  0,  0,  0, 0x80e122f8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #12613 = VPSRLVDZrrkz
29215
  { 12614,  7,  1,  0,  576,  0|(1ULL<<MCID::MayLoad), 0x122b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12614 = VPSRLVDrm
29216
  { 12615,  3,  1,  0,  573,  0, 0x122b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12615 = VPSRLVDrr
29217
  { 12616,  7,  1,  0,  576,  0|(1ULL<<MCID::MayLoad), 0x9a2b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12616 = VPSRLVQYrm
29218
  { 12617,  3,  1,  0,  573,  0, 0x9a2b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12617 = VPSRLVQYrr
29219
  { 12618,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001a2f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12618 = VPSRLVQZ128rm
29220
  { 12619,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101a2f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12619 = VPSRLVQZ128rmb
29221
  { 12620,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121a2f8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #12620 = VPSRLVQZ128rmbk
29222
  { 12621,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161a2f8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #12621 = VPSRLVQZ128rmbkz
29223
  { 12622,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021a2f8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #12622 = VPSRLVQZ128rmk
29224
  { 12623,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061a2f8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #12623 = VPSRLVQZ128rmkz
29225
  { 12624,  3,  1,  0,  0,  0, 0x2001a2f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12624 = VPSRLVQZ128rr
29226
  { 12625,  5,  1,  0,  0,  0, 0x2021a2f8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #12625 = VPSRLVQZ128rrk
29227
  { 12626,  4,  1,  0,  0,  0, 0x2061a2f8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #12626 = VPSRLVQZ128rrkz
29228
  { 12627,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009a2f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12627 = VPSRLVQZ256rm
29229
  { 12628,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109a2f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12628 = VPSRLVQZ256rmb
29230
  { 12629,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129a2f8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #12629 = VPSRLVQZ256rmbk
29231
  { 12630,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169a2f8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #12630 = VPSRLVQZ256rmbkz
29232
  { 12631,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029a2f8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #12631 = VPSRLVQZ256rmk
29233
  { 12632,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069a2f8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #12632 = VPSRLVQZ256rmkz
29234
  { 12633,  3,  1,  0,  0,  0, 0x4009a2f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12633 = VPSRLVQZ256rr
29235
  { 12634,  5,  1,  0,  0,  0, 0x4029a2f8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #12634 = VPSRLVQZ256rrk
29236
  { 12635,  4,  1,  0,  0,  0, 0x4069a2f8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #12635 = VPSRLVQZ256rrkz
29237
  { 12636,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081a2f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12636 = VPSRLVQZrm
29238
  { 12637,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181a2f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12637 = VPSRLVQZrmb
29239
  { 12638,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1a2f8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #12638 = VPSRLVQZrmbk
29240
  { 12639,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1a2f8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #12639 = VPSRLVQZrmbkz
29241
  { 12640,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1a2f8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #12640 = VPSRLVQZrmk
29242
  { 12641,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1a2f8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #12641 = VPSRLVQZrmkz
29243
  { 12642,  3,  1,  0,  0,  0, 0x8081a2f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12642 = VPSRLVQZrr
29244
  { 12643,  5,  1,  0,  0,  0, 0x80a1a2f8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #12643 = VPSRLVQZrrk
29245
  { 12644,  4,  1,  0,  0,  0, 0x80e1a2f8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #12644 = VPSRLVQZrrkz
29246
  { 12645,  7,  1,  0,  576,  0|(1ULL<<MCID::MayLoad), 0x1a2b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12645 = VPSRLVQrm
29247
  { 12646,  3,  1,  0,  573,  0, 0x1a2b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12646 = VPSRLVQrr
29248
  { 12647,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20018878009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12647 = VPSRLVWZ128rm
29249
  { 12648,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20218878009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #12648 = VPSRLVWZ128rmk
29250
  { 12649,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20618878009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #12649 = VPSRLVWZ128rmkz
29251
  { 12650,  3,  1,  0,  0,  0, 0x20018878009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12650 = VPSRLVWZ128rr
29252
  { 12651,  5,  1,  0,  0,  0, 0x20218878009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #12651 = VPSRLVWZ128rrk
29253
  { 12652,  4,  1,  0,  0,  0, 0x20618878009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #12652 = VPSRLVWZ128rrkz
29254
  { 12653,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40098878009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12653 = VPSRLVWZ256rm
29255
  { 12654,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40298878009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #12654 = VPSRLVWZ256rmk
29256
  { 12655,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40698878009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #12655 = VPSRLVWZ256rmkz
29257
  { 12656,  3,  1,  0,  0,  0, 0x40098878009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12656 = VPSRLVWZ256rr
29258
  { 12657,  5,  1,  0,  0,  0, 0x40298878009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #12657 = VPSRLVWZ256rrk
29259
  { 12658,  4,  1,  0,  0,  0, 0x40698878009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #12658 = VPSRLVWZ256rrkz
29260
  { 12659,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80818878009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12659 = VPSRLVWZrm
29261
  { 12660,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a18878009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #12660 = VPSRLVWZrmk
29262
  { 12661,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e18878009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #12661 = VPSRLVWZrmkz
29263
  { 12662,  3,  1,  0,  0,  0, 0x80818878009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12662 = VPSRLVWZrr
29264
  { 12663,  5,  1,  0,  0,  0, 0x80a18878009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #12663 = VPSRLVWZrrk
29265
  { 12664,  4,  1,  0,  0,  0, 0x80e18878009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #12664 = VPSRLVWZrrkz
29266
  { 12665,  3,  1,  0,  435,  0, 0x938b8045012ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #12665 = VPSRLWYri
29267
  { 12666,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x968b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12666 = VPSRLWYrm
29268
  { 12667,  3,  1,  0,  835,  0, 0x968b8005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr },  // Inst #12667 = VPSRLWYrr
29269
  { 12668,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200138f804501aULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #12668 = VPSRLWZ128mi
29270
  { 12669,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202138f804501aULL, nullptr, nullptr, OperandInfo906, -1 ,nullptr },  // Inst #12669 = VPSRLWZ128mik
29271
  { 12670,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206138f804501aULL, nullptr, nullptr, OperandInfo907, -1 ,nullptr },  // Inst #12670 = VPSRLWZ128mikz
29272
  { 12671,  3,  1,  0,  0,  0, 0x200138f8045012ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #12671 = VPSRLWZ128ri
29273
  { 12672,  5,  1,  0,  0,  0, 0x202138f8045012ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr },  // Inst #12672 = VPSRLWZ128rik
29274
  { 12673,  4,  1,  0,  0,  0, 0x206138f8045012ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr },  // Inst #12673 = VPSRLWZ128rikz
29275
  { 12674,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200168f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12674 = VPSRLWZ128rm
29276
  { 12675,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202168f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #12675 = VPSRLWZ128rmk
29277
  { 12676,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206168f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #12676 = VPSRLWZ128rmkz
29278
  { 12677,  3,  1,  0,  0,  0, 0x200168f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12677 = VPSRLWZ128rr
29279
  { 12678,  5,  1,  0,  0,  0, 0x202168f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #12678 = VPSRLWZ128rrk
29280
  { 12679,  4,  1,  0,  0,  0, 0x206168f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #12679 = VPSRLWZ128rrkz
29281
  { 12680,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400938f804501aULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #12680 = VPSRLWZ256mi
29282
  { 12681,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402938f804501aULL, nullptr, nullptr, OperandInfo908, -1 ,nullptr },  // Inst #12681 = VPSRLWZ256mik
29283
  { 12682,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406938f804501aULL, nullptr, nullptr, OperandInfo909, -1 ,nullptr },  // Inst #12682 = VPSRLWZ256mikz
29284
  { 12683,  3,  1,  0,  0,  0, 0x400938f8045012ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #12683 = VPSRLWZ256ri
29285
  { 12684,  5,  1,  0,  0,  0, 0x402938f8045012ULL, nullptr, nullptr, OperandInfo910, -1 ,nullptr },  // Inst #12684 = VPSRLWZ256rik
29286
  { 12685,  4,  1,  0,  0,  0, 0x406938f8045012ULL, nullptr, nullptr, OperandInfo911, -1 ,nullptr },  // Inst #12685 = VPSRLWZ256rikz
29287
  { 12686,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200968f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12686 = VPSRLWZ256rm
29288
  { 12687,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202968f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #12687 = VPSRLWZ256rmk
29289
  { 12688,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206968f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #12688 = VPSRLWZ256rmkz
29290
  { 12689,  3,  1,  0,  0,  0, 0x200968f8005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr },  // Inst #12689 = VPSRLWZ256rr
29291
  { 12690,  5,  1,  0,  0,  0, 0x202968f8005005ULL, nullptr, nullptr, OperandInfo927, -1 ,nullptr },  // Inst #12690 = VPSRLWZ256rrk
29292
  { 12691,  4,  1,  0,  0,  0, 0x206968f8005005ULL, nullptr, nullptr, OperandInfo928, -1 ,nullptr },  // Inst #12691 = VPSRLWZ256rrkz
29293
  { 12692,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808138f804501aULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #12692 = VPSRLWZmi
29294
  { 12693,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a138f804501aULL, nullptr, nullptr, OperandInfo912, -1 ,nullptr },  // Inst #12693 = VPSRLWZmik
29295
  { 12694,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e138f804501aULL, nullptr, nullptr, OperandInfo913, -1 ,nullptr },  // Inst #12694 = VPSRLWZmikz
29296
  { 12695,  3,  1,  0,  0,  0, 0x808138f8045012ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #12695 = VPSRLWZri
29297
  { 12696,  5,  1,  0,  0,  0, 0x80a138f8045012ULL, nullptr, nullptr, OperandInfo914, -1 ,nullptr },  // Inst #12696 = VPSRLWZrik
29298
  { 12697,  4,  1,  0,  0,  0, 0x80e138f8045012ULL, nullptr, nullptr, OperandInfo915, -1 ,nullptr },  // Inst #12697 = VPSRLWZrikz
29299
  { 12698,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x208168f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12698 = VPSRLWZrm
29300
  { 12699,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20a168f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #12699 = VPSRLWZrmk
29301
  { 12700,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20e168f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #12700 = VPSRLWZrmkz
29302
  { 12701,  3,  1,  0,  0,  0, 0x208168f8005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr },  // Inst #12701 = VPSRLWZrr
29303
  { 12702,  5,  1,  0,  0,  0, 0x20a168f8005005ULL, nullptr, nullptr, OperandInfo929, -1 ,nullptr },  // Inst #12702 = VPSRLWZrrk
29304
  { 12703,  4,  1,  0,  0,  0, 0x20e168f8005005ULL, nullptr, nullptr, OperandInfo930, -1 ,nullptr },  // Inst #12703 = VPSRLWZrrkz
29305
  { 12704,  3,  1,  0,  435,  0, 0x138b8045012ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #12704 = VPSRLWri
29306
  { 12705,  7,  1,  0,  436,  0|(1ULL<<MCID::MayLoad), 0x168b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12705 = VPSRLWrm
29307
  { 12706,  3,  1,  0,  835,  0, 0x168b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12706 = VPSRLWrr
29308
  { 12707,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x97c38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12707 = VPSUBBYrm
29309
  { 12708,  3,  1,  0,  377,  0, 0x97c38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12708 = VPSUBBYrr
29310
  { 12709,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017c78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12709 = VPSUBBZ128rm
29311
  { 12710,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217c78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #12710 = VPSUBBZ128rmk
29312
  { 12711,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617c78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #12711 = VPSUBBZ128rmkz
29313
  { 12712,  3,  1,  0,  0,  0, 0x20017c78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12712 = VPSUBBZ128rr
29314
  { 12713,  5,  1,  0,  0,  0, 0x20217c78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #12713 = VPSUBBZ128rrk
29315
  { 12714,  4,  1,  0,  0,  0, 0x20617c78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #12714 = VPSUBBZ128rrkz
29316
  { 12715,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097c78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12715 = VPSUBBZ256rm
29317
  { 12716,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297c78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #12716 = VPSUBBZ256rmk
29318
  { 12717,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697c78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #12717 = VPSUBBZ256rmkz
29319
  { 12718,  3,  1,  0,  0,  0, 0x40097c78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12718 = VPSUBBZ256rr
29320
  { 12719,  5,  1,  0,  0,  0, 0x40297c78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #12719 = VPSUBBZ256rrk
29321
  { 12720,  4,  1,  0,  0,  0, 0x40697c78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #12720 = VPSUBBZ256rrkz
29322
  { 12721,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817c78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12721 = VPSUBBZrm
29323
  { 12722,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17c78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #12722 = VPSUBBZrmk
29324
  { 12723,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17c78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #12723 = VPSUBBZrmkz
29325
  { 12724,  3,  1,  0,  0,  0, 0x80817c78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12724 = VPSUBBZrr
29326
  { 12725,  5,  1,  0,  0,  0, 0x80a17c78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #12725 = VPSUBBZrrk
29327
  { 12726,  4,  1,  0,  0,  0, 0x80e17c78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #12726 = VPSUBBZrrkz
29328
  { 12727,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x17c38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12727 = VPSUBBrm
29329
  { 12728,  3,  1,  0,  377,  0, 0x17c38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12728 = VPSUBBrr
29330
  { 12729,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x97d38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12729 = VPSUBDYrm
29331
  { 12730,  3,  1,  0,  377,  0, 0x97d38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12730 = VPSUBDYrr
29332
  { 12731,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017d78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12731 = VPSUBDZ128rm
29333
  { 12732,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9017d78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12732 = VPSUBDZ128rmb
29334
  { 12733,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9217d78005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #12733 = VPSUBDZ128rmbk
29335
  { 12734,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9617d78005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #12734 = VPSUBDZ128rmbkz
29336
  { 12735,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217d78005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #12735 = VPSUBDZ128rmk
29337
  { 12736,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617d78005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #12736 = VPSUBDZ128rmkz
29338
  { 12737,  3,  1,  0,  0,  0, 0x20017d78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12737 = VPSUBDZ128rr
29339
  { 12738,  5,  1,  0,  0,  0, 0x20217d78005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #12738 = VPSUBDZ128rrk
29340
  { 12739,  4,  1,  0,  0,  0, 0x20617d78005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #12739 = VPSUBDZ128rrkz
29341
  { 12740,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097d78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12740 = VPSUBDZ256rm
29342
  { 12741,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9097d78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12741 = VPSUBDZ256rmb
29343
  { 12742,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9297d78005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #12742 = VPSUBDZ256rmbk
29344
  { 12743,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9697d78005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #12743 = VPSUBDZ256rmbkz
29345
  { 12744,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297d78005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #12744 = VPSUBDZ256rmk
29346
  { 12745,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697d78005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #12745 = VPSUBDZ256rmkz
29347
  { 12746,  3,  1,  0,  0,  0, 0x40097d78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12746 = VPSUBDZ256rr
29348
  { 12747,  5,  1,  0,  0,  0, 0x40297d78005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #12747 = VPSUBDZ256rrk
29349
  { 12748,  4,  1,  0,  0,  0, 0x40697d78005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #12748 = VPSUBDZ256rrkz
29350
  { 12749,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817d78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12749 = VPSUBDZrm
29351
  { 12750,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9817d78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12750 = VPSUBDZrmb
29352
  { 12751,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a17d78005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #12751 = VPSUBDZrmbk
29353
  { 12752,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e17d78005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #12752 = VPSUBDZrmbkz
29354
  { 12753,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17d78005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #12753 = VPSUBDZrmk
29355
  { 12754,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17d78005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #12754 = VPSUBDZrmkz
29356
  { 12755,  3,  1,  0,  0,  0, 0x80817d78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12755 = VPSUBDZrr
29357
  { 12756,  5,  1,  0,  0,  0, 0x80a17d78005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #12756 = VPSUBDZrrk
29358
  { 12757,  4,  1,  0,  0,  0, 0x80e17d78005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #12757 = VPSUBDZrrkz
29359
  { 12758,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x17d38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12758 = VPSUBDrm
29360
  { 12759,  3,  1,  0,  377,  0, 0x17d38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12759 = VPSUBDrr
29361
  { 12760,  7,  1,  0,  378,  0|(1ULL<<MCID::MayLoad), 0x97db8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12760 = VPSUBQYrm
29362
  { 12761,  3,  1,  0,  379,  0, 0x97db8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12761 = VPSUBQYrr
29363
  { 12762,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001fdf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12762 = VPSUBQZ128rm
29364
  { 12763,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101fdf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12763 = VPSUBQZ128rmb
29365
  { 12764,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121fdf8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #12764 = VPSUBQZ128rmbk
29366
  { 12765,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161fdf8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #12765 = VPSUBQZ128rmbkz
29367
  { 12766,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021fdf8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #12766 = VPSUBQZ128rmk
29368
  { 12767,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061fdf8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #12767 = VPSUBQZ128rmkz
29369
  { 12768,  3,  1,  0,  0,  0, 0x2001fdf8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12768 = VPSUBQZ128rr
29370
  { 12769,  5,  1,  0,  0,  0, 0x2021fdf8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #12769 = VPSUBQZ128rrk
29371
  { 12770,  4,  1,  0,  0,  0, 0x2061fdf8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #12770 = VPSUBQZ128rrkz
29372
  { 12771,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009fdf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12771 = VPSUBQZ256rm
29373
  { 12772,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109fdf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12772 = VPSUBQZ256rmb
29374
  { 12773,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129fdf8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #12773 = VPSUBQZ256rmbk
29375
  { 12774,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169fdf8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #12774 = VPSUBQZ256rmbkz
29376
  { 12775,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029fdf8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #12775 = VPSUBQZ256rmk
29377
  { 12776,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069fdf8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #12776 = VPSUBQZ256rmkz
29378
  { 12777,  3,  1,  0,  0,  0, 0x4009fdf8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12777 = VPSUBQZ256rr
29379
  { 12778,  5,  1,  0,  0,  0, 0x4029fdf8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #12778 = VPSUBQZ256rrk
29380
  { 12779,  4,  1,  0,  0,  0, 0x4069fdf8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #12779 = VPSUBQZ256rrkz
29381
  { 12780,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081fdf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12780 = VPSUBQZrm
29382
  { 12781,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181fdf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12781 = VPSUBQZrmb
29383
  { 12782,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1fdf8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #12782 = VPSUBQZrmbk
29384
  { 12783,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1fdf8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #12783 = VPSUBQZrmbkz
29385
  { 12784,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1fdf8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #12784 = VPSUBQZrmk
29386
  { 12785,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1fdf8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #12785 = VPSUBQZrmkz
29387
  { 12786,  3,  1,  0,  0,  0, 0x8081fdf8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12786 = VPSUBQZrr
29388
  { 12787,  5,  1,  0,  0,  0, 0x80a1fdf8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #12787 = VPSUBQZrrk
29389
  { 12788,  4,  1,  0,  0,  0, 0x80e1fdf8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #12788 = VPSUBQZrrkz
29390
  { 12789,  7,  1,  0,  378,  0|(1ULL<<MCID::MayLoad), 0x17db8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12789 = VPSUBQrm
29391
  { 12790,  3,  1,  0,  379,  0, 0x17db8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12790 = VPSUBQrr
29392
  { 12791,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x97438005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12791 = VPSUBSBYrm
29393
  { 12792,  3,  1,  0,  377,  0, 0x97438005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12792 = VPSUBSBYrr
29394
  { 12793,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017478005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12793 = VPSUBSBZ128rm
29395
  { 12794,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217478005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #12794 = VPSUBSBZ128rmk
29396
  { 12795,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617478005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #12795 = VPSUBSBZ128rmkz
29397
  { 12796,  3,  1,  0,  0,  0, 0x20017478005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12796 = VPSUBSBZ128rr
29398
  { 12797,  5,  1,  0,  0,  0, 0x20217478005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #12797 = VPSUBSBZ128rrk
29399
  { 12798,  4,  1,  0,  0,  0, 0x20617478005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #12798 = VPSUBSBZ128rrkz
29400
  { 12799,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097478005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12799 = VPSUBSBZ256rm
29401
  { 12800,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297478005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #12800 = VPSUBSBZ256rmk
29402
  { 12801,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697478005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #12801 = VPSUBSBZ256rmkz
29403
  { 12802,  3,  1,  0,  0,  0, 0x40097478005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12802 = VPSUBSBZ256rr
29404
  { 12803,  5,  1,  0,  0,  0, 0x40297478005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #12803 = VPSUBSBZ256rrk
29405
  { 12804,  4,  1,  0,  0,  0, 0x40697478005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #12804 = VPSUBSBZ256rrkz
29406
  { 12805,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817478005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12805 = VPSUBSBZrm
29407
  { 12806,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17478005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #12806 = VPSUBSBZrmk
29408
  { 12807,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17478005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #12807 = VPSUBSBZrmkz
29409
  { 12808,  3,  1,  0,  0,  0, 0x80817478005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12808 = VPSUBSBZrr
29410
  { 12809,  5,  1,  0,  0,  0, 0x80a17478005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #12809 = VPSUBSBZrrk
29411
  { 12810,  4,  1,  0,  0,  0, 0x80e17478005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #12810 = VPSUBSBZrrkz
29412
  { 12811,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x17438005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12811 = VPSUBSBrm
29413
  { 12812,  3,  1,  0,  377,  0, 0x17438005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12812 = VPSUBSBrr
29414
  { 12813,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x974b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12813 = VPSUBSWYrm
29415
  { 12814,  3,  1,  0,  377,  0, 0x974b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12814 = VPSUBSWYrr
29416
  { 12815,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200174f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12815 = VPSUBSWZ128rm
29417
  { 12816,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202174f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #12816 = VPSUBSWZ128rmk
29418
  { 12817,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206174f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #12817 = VPSUBSWZ128rmkz
29419
  { 12818,  3,  1,  0,  0,  0, 0x200174f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12818 = VPSUBSWZ128rr
29420
  { 12819,  5,  1,  0,  0,  0, 0x202174f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #12819 = VPSUBSWZ128rrk
29421
  { 12820,  4,  1,  0,  0,  0, 0x206174f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #12820 = VPSUBSWZ128rrkz
29422
  { 12821,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400974f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12821 = VPSUBSWZ256rm
29423
  { 12822,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402974f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #12822 = VPSUBSWZ256rmk
29424
  { 12823,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406974f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #12823 = VPSUBSWZ256rmkz
29425
  { 12824,  3,  1,  0,  0,  0, 0x400974f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12824 = VPSUBSWZ256rr
29426
  { 12825,  5,  1,  0,  0,  0, 0x402974f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #12825 = VPSUBSWZ256rrk
29427
  { 12826,  4,  1,  0,  0,  0, 0x406974f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #12826 = VPSUBSWZ256rrkz
29428
  { 12827,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808174f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12827 = VPSUBSWZrm
29429
  { 12828,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a174f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #12828 = VPSUBSWZrmk
29430
  { 12829,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e174f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #12829 = VPSUBSWZrmkz
29431
  { 12830,  3,  1,  0,  0,  0, 0x808174f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12830 = VPSUBSWZrr
29432
  { 12831,  5,  1,  0,  0,  0, 0x80a174f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #12831 = VPSUBSWZrrk
29433
  { 12832,  4,  1,  0,  0,  0, 0x80e174f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #12832 = VPSUBSWZrrkz
29434
  { 12833,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x174b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12833 = VPSUBSWrm
29435
  { 12834,  3,  1,  0,  377,  0, 0x174b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12834 = VPSUBSWrr
29436
  { 12835,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x96c38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12835 = VPSUBUSBYrm
29437
  { 12836,  3,  1,  0,  377,  0, 0x96c38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12836 = VPSUBUSBYrr
29438
  { 12837,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016c78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12837 = VPSUBUSBZ128rm
29439
  { 12838,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216c78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #12838 = VPSUBUSBZ128rmk
29440
  { 12839,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20616c78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #12839 = VPSUBUSBZ128rmkz
29441
  { 12840,  3,  1,  0,  0,  0, 0x20016c78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12840 = VPSUBUSBZ128rr
29442
  { 12841,  5,  1,  0,  0,  0, 0x20216c78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #12841 = VPSUBUSBZ128rrk
29443
  { 12842,  4,  1,  0,  0,  0, 0x20616c78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #12842 = VPSUBUSBZ128rrkz
29444
  { 12843,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096c78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12843 = VPSUBUSBZ256rm
29445
  { 12844,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296c78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #12844 = VPSUBUSBZ256rmk
29446
  { 12845,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40696c78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #12845 = VPSUBUSBZ256rmkz
29447
  { 12846,  3,  1,  0,  0,  0, 0x40096c78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12846 = VPSUBUSBZ256rr
29448
  { 12847,  5,  1,  0,  0,  0, 0x40296c78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #12847 = VPSUBUSBZ256rrk
29449
  { 12848,  4,  1,  0,  0,  0, 0x40696c78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #12848 = VPSUBUSBZ256rrkz
29450
  { 12849,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816c78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12849 = VPSUBUSBZrm
29451
  { 12850,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16c78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #12850 = VPSUBUSBZrmk
29452
  { 12851,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e16c78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #12851 = VPSUBUSBZrmkz
29453
  { 12852,  3,  1,  0,  0,  0, 0x80816c78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12852 = VPSUBUSBZrr
29454
  { 12853,  5,  1,  0,  0,  0, 0x80a16c78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #12853 = VPSUBUSBZrrk
29455
  { 12854,  4,  1,  0,  0,  0, 0x80e16c78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #12854 = VPSUBUSBZrrkz
29456
  { 12855,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x16c38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12855 = VPSUBUSBrm
29457
  { 12856,  3,  1,  0,  377,  0, 0x16c38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12856 = VPSUBUSBrr
29458
  { 12857,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x96cb8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12857 = VPSUBUSWYrm
29459
  { 12858,  3,  1,  0,  377,  0, 0x96cb8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12858 = VPSUBUSWYrr
29460
  { 12859,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016cf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12859 = VPSUBUSWZ128rm
29461
  { 12860,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216cf8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #12860 = VPSUBUSWZ128rmk
29462
  { 12861,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20616cf8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #12861 = VPSUBUSWZ128rmkz
29463
  { 12862,  3,  1,  0,  0,  0, 0x20016cf8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12862 = VPSUBUSWZ128rr
29464
  { 12863,  5,  1,  0,  0,  0, 0x20216cf8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #12863 = VPSUBUSWZ128rrk
29465
  { 12864,  4,  1,  0,  0,  0, 0x20616cf8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #12864 = VPSUBUSWZ128rrkz
29466
  { 12865,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096cf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12865 = VPSUBUSWZ256rm
29467
  { 12866,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296cf8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #12866 = VPSUBUSWZ256rmk
29468
  { 12867,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40696cf8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #12867 = VPSUBUSWZ256rmkz
29469
  { 12868,  3,  1,  0,  0,  0, 0x40096cf8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12868 = VPSUBUSWZ256rr
29470
  { 12869,  5,  1,  0,  0,  0, 0x40296cf8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #12869 = VPSUBUSWZ256rrk
29471
  { 12870,  4,  1,  0,  0,  0, 0x40696cf8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #12870 = VPSUBUSWZ256rrkz
29472
  { 12871,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816cf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12871 = VPSUBUSWZrm
29473
  { 12872,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16cf8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #12872 = VPSUBUSWZrmk
29474
  { 12873,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e16cf8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #12873 = VPSUBUSWZrmkz
29475
  { 12874,  3,  1,  0,  0,  0, 0x80816cf8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12874 = VPSUBUSWZrr
29476
  { 12875,  5,  1,  0,  0,  0, 0x80a16cf8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #12875 = VPSUBUSWZrrk
29477
  { 12876,  4,  1,  0,  0,  0, 0x80e16cf8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #12876 = VPSUBUSWZrrkz
29478
  { 12877,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x16cb8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12877 = VPSUBUSWrm
29479
  { 12878,  3,  1,  0,  377,  0, 0x16cb8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12878 = VPSUBUSWrr
29480
  { 12879,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x97cb8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #12879 = VPSUBWYrm
29481
  { 12880,  3,  1,  0,  377,  0, 0x97cb8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #12880 = VPSUBWYrr
29482
  { 12881,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20017cf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #12881 = VPSUBWZ128rm
29483
  { 12882,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20217cf8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #12882 = VPSUBWZ128rmk
29484
  { 12883,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20617cf8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #12883 = VPSUBWZ128rmkz
29485
  { 12884,  3,  1,  0,  0,  0, 0x20017cf8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #12884 = VPSUBWZ128rr
29486
  { 12885,  5,  1,  0,  0,  0, 0x20217cf8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #12885 = VPSUBWZ128rrk
29487
  { 12886,  4,  1,  0,  0,  0, 0x20617cf8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #12886 = VPSUBWZ128rrkz
29488
  { 12887,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40097cf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #12887 = VPSUBWZ256rm
29489
  { 12888,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40297cf8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #12888 = VPSUBWZ256rmk
29490
  { 12889,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40697cf8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #12889 = VPSUBWZ256rmkz
29491
  { 12890,  3,  1,  0,  0,  0, 0x40097cf8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #12890 = VPSUBWZ256rr
29492
  { 12891,  5,  1,  0,  0,  0, 0x40297cf8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #12891 = VPSUBWZ256rrk
29493
  { 12892,  4,  1,  0,  0,  0, 0x40697cf8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #12892 = VPSUBWZ256rrkz
29494
  { 12893,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80817cf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #12893 = VPSUBWZrm
29495
  { 12894,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a17cf8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #12894 = VPSUBWZrmk
29496
  { 12895,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e17cf8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #12895 = VPSUBWZrmkz
29497
  { 12896,  3,  1,  0,  0,  0, 0x80817cf8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #12896 = VPSUBWZrr
29498
  { 12897,  5,  1,  0,  0,  0, 0x80a17cf8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #12897 = VPSUBWZrrk
29499
  { 12898,  4,  1,  0,  0,  0, 0x80e17cf8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #12898 = VPSUBWZrrkz
29500
  { 12899,  7,  1,  0,  376,  0|(1ULL<<MCID::MayLoad), 0x17cb8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #12899 = VPSUBWrm
29501
  { 12900,  3,  1,  0,  377,  0, 0x17cb8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #12900 = VPSUBWrr
29502
  { 12901,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90112f804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr },  // Inst #12901 = VPTERNLOGDZ128rmbi
29503
  { 12902,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92112f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #12902 = VPTERNLOGDZ128rmbik
29504
  { 12903,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96112f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #12903 = VPTERNLOGDZ128rmbikz
29505
  { 12904,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200112f804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr },  // Inst #12904 = VPTERNLOGDZ128rmi
29506
  { 12905,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202112f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #12905 = VPTERNLOGDZ128rmik
29507
  { 12906,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206112f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #12906 = VPTERNLOGDZ128rmikz
29508
  { 12907,  5,  1,  0,  0,  0, 0x200112f804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #12907 = VPTERNLOGDZ128rri
29509
  { 12908,  6,  1,  0,  0,  0, 0x202112f804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr },  // Inst #12908 = VPTERNLOGDZ128rrik
29510
  { 12909,  6,  1,  0,  0,  0, 0x206112f804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr },  // Inst #12909 = VPTERNLOGDZ128rrikz
29511
  { 12910,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90912f804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr },  // Inst #12910 = VPTERNLOGDZ256rmbi
29512
  { 12911,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92912f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #12911 = VPTERNLOGDZ256rmbik
29513
  { 12912,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96912f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #12912 = VPTERNLOGDZ256rmbikz
29514
  { 12913,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400912f804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr },  // Inst #12913 = VPTERNLOGDZ256rmi
29515
  { 12914,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402912f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #12914 = VPTERNLOGDZ256rmik
29516
  { 12915,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406912f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #12915 = VPTERNLOGDZ256rmikz
29517
  { 12916,  5,  1,  0,  0,  0, 0x400912f804d005ULL, nullptr, nullptr, OperandInfo536, -1 ,nullptr },  // Inst #12916 = VPTERNLOGDZ256rri
29518
  { 12917,  6,  1,  0,  0,  0, 0x402912f804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr },  // Inst #12917 = VPTERNLOGDZ256rrik
29519
  { 12918,  6,  1,  0,  0,  0, 0x406912f804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr },  // Inst #12918 = VPTERNLOGDZ256rrikz
29520
  { 12919,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98112f804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr },  // Inst #12919 = VPTERNLOGDZrmbi
29521
  { 12920,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a112f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #12920 = VPTERNLOGDZrmbik
29522
  { 12921,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e112f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #12921 = VPTERNLOGDZrmbikz
29523
  { 12922,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808112f804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr },  // Inst #12922 = VPTERNLOGDZrmi
29524
  { 12923,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a112f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #12923 = VPTERNLOGDZrmik
29525
  { 12924,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e112f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #12924 = VPTERNLOGDZrmikz
29526
  { 12925,  5,  1,  0,  0,  0, 0x808112f804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #12925 = VPTERNLOGDZrri
29527
  { 12926,  6,  1,  0,  0,  0, 0x80a112f804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #12926 = VPTERNLOGDZrrik
29528
  { 12927,  6,  1,  0,  0,  0, 0x80e112f804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #12927 = VPTERNLOGDZrrikz
29529
  { 12928,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110192f804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr },  // Inst #12928 = VPTERNLOGQZ128rmbi
29530
  { 12929,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112192f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #12929 = VPTERNLOGQZ128rmbik
29531
  { 12930,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116192f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #12930 = VPTERNLOGQZ128rmbikz
29532
  { 12931,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200192f804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr },  // Inst #12931 = VPTERNLOGQZ128rmi
29533
  { 12932,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202192f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #12932 = VPTERNLOGQZ128rmik
29534
  { 12933,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206192f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #12933 = VPTERNLOGQZ128rmikz
29535
  { 12934,  5,  1,  0,  0,  0, 0x200192f804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr },  // Inst #12934 = VPTERNLOGQZ128rri
29536
  { 12935,  6,  1,  0,  0,  0, 0x202192f804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr },  // Inst #12935 = VPTERNLOGQZ128rrik
29537
  { 12936,  6,  1,  0,  0,  0, 0x206192f804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr },  // Inst #12936 = VPTERNLOGQZ128rrikz
29538
  { 12937,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110992f804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr },  // Inst #12937 = VPTERNLOGQZ256rmbi
29539
  { 12938,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112992f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #12938 = VPTERNLOGQZ256rmbik
29540
  { 12939,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116992f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #12939 = VPTERNLOGQZ256rmbikz
29541
  { 12940,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400992f804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr },  // Inst #12940 = VPTERNLOGQZ256rmi
29542
  { 12941,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402992f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #12941 = VPTERNLOGQZ256rmik
29543
  { 12942,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406992f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #12942 = VPTERNLOGQZ256rmikz
29544
  { 12943,  5,  1,  0,  0,  0, 0x400992f804d005ULL, nullptr, nullptr, OperandInfo536, -1 ,nullptr },  // Inst #12943 = VPTERNLOGQZ256rri
29545
  { 12944,  6,  1,  0,  0,  0, 0x402992f804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr },  // Inst #12944 = VPTERNLOGQZ256rrik
29546
  { 12945,  6,  1,  0,  0,  0, 0x406992f804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr },  // Inst #12945 = VPTERNLOGQZ256rrikz
29547
  { 12946,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x118192f804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr },  // Inst #12946 = VPTERNLOGQZrmbi
29548
  { 12947,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a192f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #12947 = VPTERNLOGQZrmbik
29549
  { 12948,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e192f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #12948 = VPTERNLOGQZrmbikz
29550
  { 12949,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808192f804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr },  // Inst #12949 = VPTERNLOGQZrmi
29551
  { 12950,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a192f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #12950 = VPTERNLOGQZrmik
29552
  { 12951,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e192f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #12951 = VPTERNLOGQZrmikz
29553
  { 12952,  5,  1,  0,  0,  0, 0x808192f804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr },  // Inst #12952 = VPTERNLOGQZrri
29554
  { 12953,  6,  1,  0,  0,  0, 0x80a192f804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #12953 = VPTERNLOGQZrrik
29555
  { 12954,  6,  1,  0,  0,  0, 0x80e192f804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #12954 = VPTERNLOGQZrrikz
29556
  { 12955,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20011360009006ULL, nullptr, nullptr, OperandInfo792, -1 ,nullptr },  // Inst #12955 = VPTESTMBZ128rm
29557
  { 12956,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20211360009006ULL, nullptr, nullptr, OperandInfo793, -1 ,nullptr },  // Inst #12956 = VPTESTMBZ128rmk
29558
  { 12957,  3,  1,  0,  0,  0, 0x20011360009005ULL, nullptr, nullptr, OperandInfo794, -1 ,nullptr },  // Inst #12957 = VPTESTMBZ128rr
29559
  { 12958,  4,  1,  0,  0,  0, 0x20211360009005ULL, nullptr, nullptr, OperandInfo795, -1 ,nullptr },  // Inst #12958 = VPTESTMBZ128rrk
29560
  { 12959,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091360009006ULL, nullptr, nullptr, OperandInfo796, -1 ,nullptr },  // Inst #12959 = VPTESTMBZ256rm
29561
  { 12960,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291360009006ULL, nullptr, nullptr, OperandInfo797, -1 ,nullptr },  // Inst #12960 = VPTESTMBZ256rmk
29562
  { 12961,  3,  1,  0,  0,  0, 0x40091360009005ULL, nullptr, nullptr, OperandInfo798, -1 ,nullptr },  // Inst #12961 = VPTESTMBZ256rr
29563
  { 12962,  4,  1,  0,  0,  0, 0x40291360009005ULL, nullptr, nullptr, OperandInfo799, -1 ,nullptr },  // Inst #12962 = VPTESTMBZ256rrk
29564
  { 12963,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811360009006ULL, nullptr, nullptr, OperandInfo800, -1 ,nullptr },  // Inst #12963 = VPTESTMBZrm
29565
  { 12964,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11360009006ULL, nullptr, nullptr, OperandInfo801, -1 ,nullptr },  // Inst #12964 = VPTESTMBZrmk
29566
  { 12965,  3,  1,  0,  0,  0, 0x80811360009005ULL, nullptr, nullptr, OperandInfo802, -1 ,nullptr },  // Inst #12965 = VPTESTMBZrr
29567
  { 12966,  4,  1,  0,  0,  0, 0x80a11360009005ULL, nullptr, nullptr, OperandInfo803, -1 ,nullptr },  // Inst #12966 = VPTESTMBZrrk
29568
  { 12967,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200113e0009006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr },  // Inst #12967 = VPTESTMDZ128rm
29569
  { 12968,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90113e0009006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr },  // Inst #12968 = VPTESTMDZ128rmb
29570
  { 12969,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92113e0009006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr },  // Inst #12969 = VPTESTMDZ128rmbk
29571
  { 12970,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202113e0009006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr },  // Inst #12970 = VPTESTMDZ128rmk
29572
  { 12971,  3,  1,  0,  0,  0, 0x200113e0009005ULL, nullptr, nullptr, OperandInfo806, -1 ,nullptr },  // Inst #12971 = VPTESTMDZ128rr
29573
  { 12972,  4,  1,  0,  0,  0, 0x202113e0009005ULL, nullptr, nullptr, OperandInfo807, -1 ,nullptr },  // Inst #12972 = VPTESTMDZ128rrk
29574
  { 12973,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400913e0009006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr },  // Inst #12973 = VPTESTMDZ256rm
29575
  { 12974,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90913e0009006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr },  // Inst #12974 = VPTESTMDZ256rmb
29576
  { 12975,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92913e0009006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr },  // Inst #12975 = VPTESTMDZ256rmbk
29577
  { 12976,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402913e0009006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr },  // Inst #12976 = VPTESTMDZ256rmk
29578
  { 12977,  3,  1,  0,  0,  0, 0x400913e0009005ULL, nullptr, nullptr, OperandInfo810, -1 ,nullptr },  // Inst #12977 = VPTESTMDZ256rr
29579
  { 12978,  4,  1,  0,  0,  0, 0x402913e0009005ULL, nullptr, nullptr, OperandInfo811, -1 ,nullptr },  // Inst #12978 = VPTESTMDZ256rrk
29580
  { 12979,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808113e0009006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr },  // Inst #12979 = VPTESTMDZrm
29581
  { 12980,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98113e0009006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr },  // Inst #12980 = VPTESTMDZrmb
29582
  { 12981,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a113e0009006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr },  // Inst #12981 = VPTESTMDZrmbk
29583
  { 12982,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a113e0009006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr },  // Inst #12982 = VPTESTMDZrmk
29584
  { 12983,  3,  1,  0,  0,  0, 0x808113e0009005ULL, nullptr, nullptr, OperandInfo814, -1 ,nullptr },  // Inst #12983 = VPTESTMDZrr
29585
  { 12984,  4,  1,  0,  0,  0, 0x80a113e0009005ULL, nullptr, nullptr, OperandInfo815, -1 ,nullptr },  // Inst #12984 = VPTESTMDZrrk
29586
  { 12985,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200193e0009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr },  // Inst #12985 = VPTESTMQZ128rm
29587
  { 12986,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110193e0009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr },  // Inst #12986 = VPTESTMQZ128rmb
29588
  { 12987,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112193e0009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr },  // Inst #12987 = VPTESTMQZ128rmbk
29589
  { 12988,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202193e0009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr },  // Inst #12988 = VPTESTMQZ128rmk
29590
  { 12989,  3,  1,  0,  0,  0, 0x200193e0009005ULL, nullptr, nullptr, OperandInfo818, -1 ,nullptr },  // Inst #12989 = VPTESTMQZ128rr
29591
  { 12990,  4,  1,  0,  0,  0, 0x202193e0009005ULL, nullptr, nullptr, OperandInfo819, -1 ,nullptr },  // Inst #12990 = VPTESTMQZ128rrk
29592
  { 12991,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400993e0009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr },  // Inst #12991 = VPTESTMQZ256rm
29593
  { 12992,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110993e0009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr },  // Inst #12992 = VPTESTMQZ256rmb
29594
  { 12993,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112993e0009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr },  // Inst #12993 = VPTESTMQZ256rmbk
29595
  { 12994,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402993e0009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr },  // Inst #12994 = VPTESTMQZ256rmk
29596
  { 12995,  3,  1,  0,  0,  0, 0x400993e0009005ULL, nullptr, nullptr, OperandInfo822, -1 ,nullptr },  // Inst #12995 = VPTESTMQZ256rr
29597
  { 12996,  4,  1,  0,  0,  0, 0x402993e0009005ULL, nullptr, nullptr, OperandInfo823, -1 ,nullptr },  // Inst #12996 = VPTESTMQZ256rrk
29598
  { 12997,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808193e0009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr },  // Inst #12997 = VPTESTMQZrm
29599
  { 12998,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x118193e0009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr },  // Inst #12998 = VPTESTMQZrmb
29600
  { 12999,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a193e0009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr },  // Inst #12999 = VPTESTMQZrmbk
29601
  { 13000,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a193e0009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr },  // Inst #13000 = VPTESTMQZrmk
29602
  { 13001,  3,  1,  0,  0,  0, 0x808193e0009005ULL, nullptr, nullptr, OperandInfo826, -1 ,nullptr },  // Inst #13001 = VPTESTMQZrr
29603
  { 13002,  4,  1,  0,  0,  0, 0x80a193e0009005ULL, nullptr, nullptr, OperandInfo827, -1 ,nullptr },  // Inst #13002 = VPTESTMQZrrk
29604
  { 13003,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20019360009006ULL, nullptr, nullptr, OperandInfo828, -1 ,nullptr },  // Inst #13003 = VPTESTMWZ128rm
29605
  { 13004,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20219360009006ULL, nullptr, nullptr, OperandInfo829, -1 ,nullptr },  // Inst #13004 = VPTESTMWZ128rmk
29606
  { 13005,  3,  1,  0,  0,  0, 0x20019360009005ULL, nullptr, nullptr, OperandInfo830, -1 ,nullptr },  // Inst #13005 = VPTESTMWZ128rr
29607
  { 13006,  4,  1,  0,  0,  0, 0x20219360009005ULL, nullptr, nullptr, OperandInfo831, -1 ,nullptr },  // Inst #13006 = VPTESTMWZ128rrk
29608
  { 13007,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40099360009006ULL, nullptr, nullptr, OperandInfo832, -1 ,nullptr },  // Inst #13007 = VPTESTMWZ256rm
29609
  { 13008,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40299360009006ULL, nullptr, nullptr, OperandInfo833, -1 ,nullptr },  // Inst #13008 = VPTESTMWZ256rmk
29610
  { 13009,  3,  1,  0,  0,  0, 0x40099360009005ULL, nullptr, nullptr, OperandInfo834, -1 ,nullptr },  // Inst #13009 = VPTESTMWZ256rr
29611
  { 13010,  4,  1,  0,  0,  0, 0x40299360009005ULL, nullptr, nullptr, OperandInfo835, -1 ,nullptr },  // Inst #13010 = VPTESTMWZ256rrk
29612
  { 13011,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80819360009006ULL, nullptr, nullptr, OperandInfo836, -1 ,nullptr },  // Inst #13011 = VPTESTMWZrm
29613
  { 13012,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a19360009006ULL, nullptr, nullptr, OperandInfo837, -1 ,nullptr },  // Inst #13012 = VPTESTMWZrmk
29614
  { 13013,  3,  1,  0,  0,  0, 0x80819360009005ULL, nullptr, nullptr, OperandInfo838, -1 ,nullptr },  // Inst #13013 = VPTESTMWZrr
29615
  { 13014,  4,  1,  0,  0,  0, 0x80a19360009005ULL, nullptr, nullptr, OperandInfo839, -1 ,nullptr },  // Inst #13014 = VPTESTMWZrrk
29616
  { 13015,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20011360009806ULL, nullptr, nullptr, OperandInfo792, -1 ,nullptr },  // Inst #13015 = VPTESTNMBZ128rm
29617
  { 13016,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20211360009806ULL, nullptr, nullptr, OperandInfo793, -1 ,nullptr },  // Inst #13016 = VPTESTNMBZ128rmk
29618
  { 13017,  3,  1,  0,  0,  0, 0x20011360009805ULL, nullptr, nullptr, OperandInfo794, -1 ,nullptr },  // Inst #13017 = VPTESTNMBZ128rr
29619
  { 13018,  4,  1,  0,  0,  0, 0x20211360009805ULL, nullptr, nullptr, OperandInfo795, -1 ,nullptr },  // Inst #13018 = VPTESTNMBZ128rrk
29620
  { 13019,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091360009806ULL, nullptr, nullptr, OperandInfo796, -1 ,nullptr },  // Inst #13019 = VPTESTNMBZ256rm
29621
  { 13020,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291360009806ULL, nullptr, nullptr, OperandInfo797, -1 ,nullptr },  // Inst #13020 = VPTESTNMBZ256rmk
29622
  { 13021,  3,  1,  0,  0,  0, 0x40091360009805ULL, nullptr, nullptr, OperandInfo798, -1 ,nullptr },  // Inst #13021 = VPTESTNMBZ256rr
29623
  { 13022,  4,  1,  0,  0,  0, 0x40291360009805ULL, nullptr, nullptr, OperandInfo799, -1 ,nullptr },  // Inst #13022 = VPTESTNMBZ256rrk
29624
  { 13023,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811360009806ULL, nullptr, nullptr, OperandInfo800, -1 ,nullptr },  // Inst #13023 = VPTESTNMBZrm
29625
  { 13024,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11360009806ULL, nullptr, nullptr, OperandInfo801, -1 ,nullptr },  // Inst #13024 = VPTESTNMBZrmk
29626
  { 13025,  3,  1,  0,  0,  0, 0x80811360009805ULL, nullptr, nullptr, OperandInfo802, -1 ,nullptr },  // Inst #13025 = VPTESTNMBZrr
29627
  { 13026,  4,  1,  0,  0,  0, 0x80a11360009805ULL, nullptr, nullptr, OperandInfo803, -1 ,nullptr },  // Inst #13026 = VPTESTNMBZrrk
29628
  { 13027,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200113e0009806ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr },  // Inst #13027 = VPTESTNMDZ128rm
29629
  { 13028,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90113e0009806ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr },  // Inst #13028 = VPTESTNMDZ128rmb
29630
  { 13029,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92113e0009806ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr },  // Inst #13029 = VPTESTNMDZ128rmbk
29631
  { 13030,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202113e0009806ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr },  // Inst #13030 = VPTESTNMDZ128rmk
29632
  { 13031,  3,  1,  0,  0,  0, 0x200113e0009805ULL, nullptr, nullptr, OperandInfo806, -1 ,nullptr },  // Inst #13031 = VPTESTNMDZ128rr
29633
  { 13032,  4,  1,  0,  0,  0, 0x202113e0009805ULL, nullptr, nullptr, OperandInfo807, -1 ,nullptr },  // Inst #13032 = VPTESTNMDZ128rrk
29634
  { 13033,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400913e0009806ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr },  // Inst #13033 = VPTESTNMDZ256rm
29635
  { 13034,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90913e0009806ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr },  // Inst #13034 = VPTESTNMDZ256rmb
29636
  { 13035,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92913e0009806ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr },  // Inst #13035 = VPTESTNMDZ256rmbk
29637
  { 13036,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402913e0009806ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr },  // Inst #13036 = VPTESTNMDZ256rmk
29638
  { 13037,  3,  1,  0,  0,  0, 0x400913e0009805ULL, nullptr, nullptr, OperandInfo810, -1 ,nullptr },  // Inst #13037 = VPTESTNMDZ256rr
29639
  { 13038,  4,  1,  0,  0,  0, 0x402913e0009805ULL, nullptr, nullptr, OperandInfo811, -1 ,nullptr },  // Inst #13038 = VPTESTNMDZ256rrk
29640
  { 13039,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808113e0009806ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr },  // Inst #13039 = VPTESTNMDZrm
29641
  { 13040,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98113e0009806ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr },  // Inst #13040 = VPTESTNMDZrmb
29642
  { 13041,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a113e0009806ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr },  // Inst #13041 = VPTESTNMDZrmbk
29643
  { 13042,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a113e0009806ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr },  // Inst #13042 = VPTESTNMDZrmk
29644
  { 13043,  3,  1,  0,  0,  0, 0x808113e0009805ULL, nullptr, nullptr, OperandInfo814, -1 ,nullptr },  // Inst #13043 = VPTESTNMDZrr
29645
  { 13044,  4,  1,  0,  0,  0, 0x80a113e0009805ULL, nullptr, nullptr, OperandInfo815, -1 ,nullptr },  // Inst #13044 = VPTESTNMDZrrk
29646
  { 13045,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200193e0009806ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr },  // Inst #13045 = VPTESTNMQZ128rm
29647
  { 13046,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110193e0009806ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr },  // Inst #13046 = VPTESTNMQZ128rmb
29648
  { 13047,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112193e0009806ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr },  // Inst #13047 = VPTESTNMQZ128rmbk
29649
  { 13048,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202193e0009806ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr },  // Inst #13048 = VPTESTNMQZ128rmk
29650
  { 13049,  3,  1,  0,  0,  0, 0x200193e0009805ULL, nullptr, nullptr, OperandInfo818, -1 ,nullptr },  // Inst #13049 = VPTESTNMQZ128rr
29651
  { 13050,  4,  1,  0,  0,  0, 0x202193e0009805ULL, nullptr, nullptr, OperandInfo819, -1 ,nullptr },  // Inst #13050 = VPTESTNMQZ128rrk
29652
  { 13051,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400993e0009806ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr },  // Inst #13051 = VPTESTNMQZ256rm
29653
  { 13052,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110993e0009806ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr },  // Inst #13052 = VPTESTNMQZ256rmb
29654
  { 13053,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112993e0009806ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr },  // Inst #13053 = VPTESTNMQZ256rmbk
29655
  { 13054,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402993e0009806ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr },  // Inst #13054 = VPTESTNMQZ256rmk
29656
  { 13055,  3,  1,  0,  0,  0, 0x400993e0009805ULL, nullptr, nullptr, OperandInfo822, -1 ,nullptr },  // Inst #13055 = VPTESTNMQZ256rr
29657
  { 13056,  4,  1,  0,  0,  0, 0x402993e0009805ULL, nullptr, nullptr, OperandInfo823, -1 ,nullptr },  // Inst #13056 = VPTESTNMQZ256rrk
29658
  { 13057,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808193e0009806ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr },  // Inst #13057 = VPTESTNMQZrm
29659
  { 13058,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x118193e0009806ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr },  // Inst #13058 = VPTESTNMQZrmb
29660
  { 13059,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a193e0009806ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr },  // Inst #13059 = VPTESTNMQZrmbk
29661
  { 13060,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a193e0009806ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr },  // Inst #13060 = VPTESTNMQZrmk
29662
  { 13061,  3,  1,  0,  0,  0, 0x808193e0009805ULL, nullptr, nullptr, OperandInfo826, -1 ,nullptr },  // Inst #13061 = VPTESTNMQZrr
29663
  { 13062,  4,  1,  0,  0,  0, 0x80a193e0009805ULL, nullptr, nullptr, OperandInfo827, -1 ,nullptr },  // Inst #13062 = VPTESTNMQZrrk
29664
  { 13063,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20019360009806ULL, nullptr, nullptr, OperandInfo828, -1 ,nullptr },  // Inst #13063 = VPTESTNMWZ128rm
29665
  { 13064,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20219360009806ULL, nullptr, nullptr, OperandInfo829, -1 ,nullptr },  // Inst #13064 = VPTESTNMWZ128rmk
29666
  { 13065,  3,  1,  0,  0,  0, 0x20019360009805ULL, nullptr, nullptr, OperandInfo830, -1 ,nullptr },  // Inst #13065 = VPTESTNMWZ128rr
29667
  { 13066,  4,  1,  0,  0,  0, 0x20219360009805ULL, nullptr, nullptr, OperandInfo831, -1 ,nullptr },  // Inst #13066 = VPTESTNMWZ128rrk
29668
  { 13067,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40099360009806ULL, nullptr, nullptr, OperandInfo832, -1 ,nullptr },  // Inst #13067 = VPTESTNMWZ256rm
29669
  { 13068,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40299360009806ULL, nullptr, nullptr, OperandInfo833, -1 ,nullptr },  // Inst #13068 = VPTESTNMWZ256rmk
29670
  { 13069,  3,  1,  0,  0,  0, 0x40099360009805ULL, nullptr, nullptr, OperandInfo834, -1 ,nullptr },  // Inst #13069 = VPTESTNMWZ256rr
29671
  { 13070,  4,  1,  0,  0,  0, 0x40299360009805ULL, nullptr, nullptr, OperandInfo835, -1 ,nullptr },  // Inst #13070 = VPTESTNMWZ256rrk
29672
  { 13071,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80819360009806ULL, nullptr, nullptr, OperandInfo836, -1 ,nullptr },  // Inst #13071 = VPTESTNMWZrm
29673
  { 13072,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a19360009806ULL, nullptr, nullptr, OperandInfo837, -1 ,nullptr },  // Inst #13072 = VPTESTNMWZrmk
29674
  { 13073,  3,  1,  0,  0,  0, 0x80819360009805ULL, nullptr, nullptr, OperandInfo838, -1 ,nullptr },  // Inst #13073 = VPTESTNMWZrr
29675
  { 13074,  4,  1,  0,  0,  0, 0x80a19360009805ULL, nullptr, nullptr, OperandInfo839, -1 ,nullptr },  // Inst #13074 = VPTESTNMWZrrk
29676
  { 13075,  6,  0,  0,  834,  0|(1ULL<<MCID::MayLoad), 0x80bb8009006ULL, nullptr, ImplicitList6, OperandInfo356, -1 ,nullptr },  // Inst #13075 = VPTESTYrm
29677
  { 13076,  2,  0,  0,  833,  0, 0x80bb8009005ULL, nullptr, ImplicitList6, OperandInfo446, -1 ,nullptr },  // Inst #13076 = VPTESTYrr
29678
  { 13077,  6,  0,  0,  834,  0|(1ULL<<MCID::MayLoad), 0xbb8009006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #13077 = VPTESTrm
29679
  { 13078,  2,  0,  0,  833,  0, 0xbb8009005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #13078 = VPTESTrr
29680
  { 13079,  7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x93438005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #13079 = VPUNPCKHBWYrm
29681
  { 13080,  3,  1,  0,  276,  0, 0x93438005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #13080 = VPUNPCKHBWYrr
29682
  { 13081,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013478005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13081 = VPUNPCKHBWZ128rm
29683
  { 13082,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213478005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #13082 = VPUNPCKHBWZ128rmk
29684
  { 13083,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613478005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #13083 = VPUNPCKHBWZ128rmkz
29685
  { 13084,  3,  1,  0,  0,  0, 0x20013478005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13084 = VPUNPCKHBWZ128rr
29686
  { 13085,  5,  1,  0,  0,  0, 0x20213478005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #13085 = VPUNPCKHBWZ128rrk
29687
  { 13086,  4,  1,  0,  0,  0, 0x20613478005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #13086 = VPUNPCKHBWZ128rrkz
29688
  { 13087,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093478005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13087 = VPUNPCKHBWZ256rm
29689
  { 13088,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293478005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #13088 = VPUNPCKHBWZ256rmk
29690
  { 13089,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693478005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #13089 = VPUNPCKHBWZ256rmkz
29691
  { 13090,  3,  1,  0,  0,  0, 0x40093478005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13090 = VPUNPCKHBWZ256rr
29692
  { 13091,  5,  1,  0,  0,  0, 0x40293478005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #13091 = VPUNPCKHBWZ256rrk
29693
  { 13092,  4,  1,  0,  0,  0, 0x40693478005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #13092 = VPUNPCKHBWZ256rrkz
29694
  { 13093,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813478005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13093 = VPUNPCKHBWZrm
29695
  { 13094,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13478005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #13094 = VPUNPCKHBWZrmk
29696
  { 13095,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13478005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #13095 = VPUNPCKHBWZrmkz
29697
  { 13096,  3,  1,  0,  0,  0, 0x80813478005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13096 = VPUNPCKHBWZrr
29698
  { 13097,  5,  1,  0,  0,  0, 0x80a13478005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #13097 = VPUNPCKHBWZrrk
29699
  { 13098,  4,  1,  0,  0,  0, 0x80e13478005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #13098 = VPUNPCKHBWZrrkz
29700
  { 13099,  7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x13438005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #13099 = VPUNPCKHBWrm
29701
  { 13100,  3,  1,  0,  439,  0, 0x13438005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #13100 = VPUNPCKHBWrr
29702
  { 13101,  7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x93538005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #13101 = VPUNPCKHDQYrm
29703
  { 13102,  3,  1,  0,  276,  0, 0x93538005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #13102 = VPUNPCKHDQYrr
29704
  { 13103,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013578005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13103 = VPUNPCKHDQZ128rm
29705
  { 13104,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9013578005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13104 = VPUNPCKHDQZ128rmb
29706
  { 13105,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9213578005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #13105 = VPUNPCKHDQZ128rmbk
29707
  { 13106,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9613578005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #13106 = VPUNPCKHDQZ128rmbkz
29708
  { 13107,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213578005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #13107 = VPUNPCKHDQZ128rmk
29709
  { 13108,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613578005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #13108 = VPUNPCKHDQZ128rmkz
29710
  { 13109,  3,  1,  0,  0,  0, 0x20013578005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13109 = VPUNPCKHDQZ128rr
29711
  { 13110,  5,  1,  0,  0,  0, 0x20213578005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #13110 = VPUNPCKHDQZ128rrk
29712
  { 13111,  4,  1,  0,  0,  0, 0x20613578005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #13111 = VPUNPCKHDQZ128rrkz
29713
  { 13112,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093578005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13112 = VPUNPCKHDQZ256rm
29714
  { 13113,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9093578005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13113 = VPUNPCKHDQZ256rmb
29715
  { 13114,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9293578005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #13114 = VPUNPCKHDQZ256rmbk
29716
  { 13115,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9693578005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #13115 = VPUNPCKHDQZ256rmbkz
29717
  { 13116,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293578005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #13116 = VPUNPCKHDQZ256rmk
29718
  { 13117,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693578005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #13117 = VPUNPCKHDQZ256rmkz
29719
  { 13118,  3,  1,  0,  0,  0, 0x40093578005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13118 = VPUNPCKHDQZ256rr
29720
  { 13119,  5,  1,  0,  0,  0, 0x40293578005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #13119 = VPUNPCKHDQZ256rrk
29721
  { 13120,  4,  1,  0,  0,  0, 0x40693578005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #13120 = VPUNPCKHDQZ256rrkz
29722
  { 13121,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813578005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13121 = VPUNPCKHDQZrm
29723
  { 13122,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9813578005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13122 = VPUNPCKHDQZrmb
29724
  { 13123,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a13578005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #13123 = VPUNPCKHDQZrmbk
29725
  { 13124,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e13578005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #13124 = VPUNPCKHDQZrmbkz
29726
  { 13125,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13578005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #13125 = VPUNPCKHDQZrmk
29727
  { 13126,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13578005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #13126 = VPUNPCKHDQZrmkz
29728
  { 13127,  3,  1,  0,  0,  0, 0x80813578005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13127 = VPUNPCKHDQZrr
29729
  { 13128,  5,  1,  0,  0,  0, 0x80a13578005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #13128 = VPUNPCKHDQZrrk
29730
  { 13129,  4,  1,  0,  0,  0, 0x80e13578005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #13129 = VPUNPCKHDQZrrkz
29731
  { 13130,  7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x13538005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #13130 = VPUNPCKHDQrm
29732
  { 13131,  3,  1,  0,  439,  0, 0x13538005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #13131 = VPUNPCKHDQrr
29733
  { 13132,  7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x936b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #13132 = VPUNPCKHQDQYrm
29734
  { 13133,  3,  1,  0,  276,  0, 0x936b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #13133 = VPUNPCKHQDQYrr
29735
  { 13134,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001b6f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13134 = VPUNPCKHQDQZ128rm
29736
  { 13135,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101b6f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13135 = VPUNPCKHQDQZ128rmb
29737
  { 13136,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121b6f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #13136 = VPUNPCKHQDQZ128rmbk
29738
  { 13137,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161b6f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #13137 = VPUNPCKHQDQZ128rmbkz
29739
  { 13138,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b6f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #13138 = VPUNPCKHQDQZ128rmk
29740
  { 13139,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061b6f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #13139 = VPUNPCKHQDQZ128rmkz
29741
  { 13140,  3,  1,  0,  0,  0, 0x2001b6f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13140 = VPUNPCKHQDQZ128rr
29742
  { 13141,  5,  1,  0,  0,  0, 0x2021b6f8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #13141 = VPUNPCKHQDQZ128rrk
29743
  { 13142,  4,  1,  0,  0,  0, 0x2061b6f8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #13142 = VPUNPCKHQDQZ128rrkz
29744
  { 13143,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009b6f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13143 = VPUNPCKHQDQZ256rm
29745
  { 13144,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109b6f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13144 = VPUNPCKHQDQZ256rmb
29746
  { 13145,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129b6f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #13145 = VPUNPCKHQDQZ256rmbk
29747
  { 13146,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169b6f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #13146 = VPUNPCKHQDQZ256rmbkz
29748
  { 13147,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b6f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #13147 = VPUNPCKHQDQZ256rmk
29749
  { 13148,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069b6f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #13148 = VPUNPCKHQDQZ256rmkz
29750
  { 13149,  3,  1,  0,  0,  0, 0x4009b6f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13149 = VPUNPCKHQDQZ256rr
29751
  { 13150,  5,  1,  0,  0,  0, 0x4029b6f8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #13150 = VPUNPCKHQDQZ256rrk
29752
  { 13151,  4,  1,  0,  0,  0, 0x4069b6f8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #13151 = VPUNPCKHQDQZ256rrkz
29753
  { 13152,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081b6f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13152 = VPUNPCKHQDQZrm
29754
  { 13153,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181b6f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13153 = VPUNPCKHQDQZrmb
29755
  { 13154,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1b6f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #13154 = VPUNPCKHQDQZrmbk
29756
  { 13155,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1b6f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #13155 = VPUNPCKHQDQZrmbkz
29757
  { 13156,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b6f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #13156 = VPUNPCKHQDQZrmk
29758
  { 13157,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1b6f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #13157 = VPUNPCKHQDQZrmkz
29759
  { 13158,  3,  1,  0,  0,  0, 0x8081b6f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13158 = VPUNPCKHQDQZrr
29760
  { 13159,  5,  1,  0,  0,  0, 0x80a1b6f8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #13159 = VPUNPCKHQDQZrrk
29761
  { 13160,  4,  1,  0,  0,  0, 0x80e1b6f8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #13160 = VPUNPCKHQDQZrrkz
29762
  { 13161,  7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x136b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #13161 = VPUNPCKHQDQrm
29763
  { 13162,  3,  1,  0,  439,  0, 0x136b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #13162 = VPUNPCKHQDQrr
29764
  { 13163,  7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x934b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #13163 = VPUNPCKHWDYrm
29765
  { 13164,  3,  1,  0,  276,  0, 0x934b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #13164 = VPUNPCKHWDYrr
29766
  { 13165,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200134f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13165 = VPUNPCKHWDZ128rm
29767
  { 13166,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202134f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #13166 = VPUNPCKHWDZ128rmk
29768
  { 13167,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206134f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #13167 = VPUNPCKHWDZ128rmkz
29769
  { 13168,  3,  1,  0,  0,  0, 0x200134f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13168 = VPUNPCKHWDZ128rr
29770
  { 13169,  5,  1,  0,  0,  0, 0x202134f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #13169 = VPUNPCKHWDZ128rrk
29771
  { 13170,  4,  1,  0,  0,  0, 0x206134f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #13170 = VPUNPCKHWDZ128rrkz
29772
  { 13171,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400934f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13171 = VPUNPCKHWDZ256rm
29773
  { 13172,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402934f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #13172 = VPUNPCKHWDZ256rmk
29774
  { 13173,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406934f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #13173 = VPUNPCKHWDZ256rmkz
29775
  { 13174,  3,  1,  0,  0,  0, 0x400934f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13174 = VPUNPCKHWDZ256rr
29776
  { 13175,  5,  1,  0,  0,  0, 0x402934f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #13175 = VPUNPCKHWDZ256rrk
29777
  { 13176,  4,  1,  0,  0,  0, 0x406934f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #13176 = VPUNPCKHWDZ256rrkz
29778
  { 13177,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808134f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13177 = VPUNPCKHWDZrm
29779
  { 13178,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a134f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #13178 = VPUNPCKHWDZrmk
29780
  { 13179,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e134f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #13179 = VPUNPCKHWDZrmkz
29781
  { 13180,  3,  1,  0,  0,  0, 0x808134f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13180 = VPUNPCKHWDZrr
29782
  { 13181,  5,  1,  0,  0,  0, 0x80a134f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #13181 = VPUNPCKHWDZrrk
29783
  { 13182,  4,  1,  0,  0,  0, 0x80e134f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #13182 = VPUNPCKHWDZrrkz
29784
  { 13183,  7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x134b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #13183 = VPUNPCKHWDrm
29785
  { 13184,  3,  1,  0,  439,  0, 0x134b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #13184 = VPUNPCKHWDrr
29786
  { 13185,  7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x93038005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #13185 = VPUNPCKLBWYrm
29787
  { 13186,  3,  1,  0,  276,  0, 0x93038005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #13186 = VPUNPCKLBWYrr
29788
  { 13187,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013078005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13187 = VPUNPCKLBWZ128rm
29789
  { 13188,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213078005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr },  // Inst #13188 = VPUNPCKLBWZ128rmk
29790
  { 13189,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613078005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr },  // Inst #13189 = VPUNPCKLBWZ128rmkz
29791
  { 13190,  3,  1,  0,  0,  0, 0x20013078005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13190 = VPUNPCKLBWZ128rr
29792
  { 13191,  5,  1,  0,  0,  0, 0x20213078005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr },  // Inst #13191 = VPUNPCKLBWZ128rrk
29793
  { 13192,  4,  1,  0,  0,  0, 0x20613078005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr },  // Inst #13192 = VPUNPCKLBWZ128rrkz
29794
  { 13193,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093078005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13193 = VPUNPCKLBWZ256rm
29795
  { 13194,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293078005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr },  // Inst #13194 = VPUNPCKLBWZ256rmk
29796
  { 13195,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693078005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr },  // Inst #13195 = VPUNPCKLBWZ256rmkz
29797
  { 13196,  3,  1,  0,  0,  0, 0x40093078005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13196 = VPUNPCKLBWZ256rr
29798
  { 13197,  5,  1,  0,  0,  0, 0x40293078005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr },  // Inst #13197 = VPUNPCKLBWZ256rrk
29799
  { 13198,  4,  1,  0,  0,  0, 0x40693078005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr },  // Inst #13198 = VPUNPCKLBWZ256rrkz
29800
  { 13199,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813078005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13199 = VPUNPCKLBWZrm
29801
  { 13200,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13078005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr },  // Inst #13200 = VPUNPCKLBWZrmk
29802
  { 13201,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13078005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr },  // Inst #13201 = VPUNPCKLBWZrmkz
29803
  { 13202,  3,  1,  0,  0,  0, 0x80813078005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13202 = VPUNPCKLBWZrr
29804
  { 13203,  5,  1,  0,  0,  0, 0x80a13078005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr },  // Inst #13203 = VPUNPCKLBWZrrk
29805
  { 13204,  4,  1,  0,  0,  0, 0x80e13078005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr },  // Inst #13204 = VPUNPCKLBWZrrkz
29806
  { 13205,  7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x13038005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #13205 = VPUNPCKLBWrm
29807
  { 13206,  3,  1,  0,  439,  0, 0x13038005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #13206 = VPUNPCKLBWrr
29808
  { 13207,  7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x93138005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #13207 = VPUNPCKLDQYrm
29809
  { 13208,  3,  1,  0,  276,  0, 0x93138005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #13208 = VPUNPCKLDQYrr
29810
  { 13209,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20013178005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13209 = VPUNPCKLDQZ128rm
29811
  { 13210,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9013178005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13210 = VPUNPCKLDQZ128rmb
29812
  { 13211,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9213178005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #13211 = VPUNPCKLDQZ128rmbk
29813
  { 13212,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9613178005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #13212 = VPUNPCKLDQZ128rmbkz
29814
  { 13213,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20213178005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #13213 = VPUNPCKLDQZ128rmk
29815
  { 13214,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20613178005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #13214 = VPUNPCKLDQZ128rmkz
29816
  { 13215,  3,  1,  0,  0,  0, 0x20013178005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13215 = VPUNPCKLDQZ128rr
29817
  { 13216,  5,  1,  0,  0,  0, 0x20213178005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #13216 = VPUNPCKLDQZ128rrk
29818
  { 13217,  4,  1,  0,  0,  0, 0x20613178005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #13217 = VPUNPCKLDQZ128rrkz
29819
  { 13218,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40093178005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13218 = VPUNPCKLDQZ256rm
29820
  { 13219,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9093178005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13219 = VPUNPCKLDQZ256rmb
29821
  { 13220,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9293178005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #13220 = VPUNPCKLDQZ256rmbk
29822
  { 13221,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9693178005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #13221 = VPUNPCKLDQZ256rmbkz
29823
  { 13222,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40293178005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #13222 = VPUNPCKLDQZ256rmk
29824
  { 13223,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40693178005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #13223 = VPUNPCKLDQZ256rmkz
29825
  { 13224,  3,  1,  0,  0,  0, 0x40093178005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13224 = VPUNPCKLDQZ256rr
29826
  { 13225,  5,  1,  0,  0,  0, 0x40293178005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #13225 = VPUNPCKLDQZ256rrk
29827
  { 13226,  4,  1,  0,  0,  0, 0x40693178005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #13226 = VPUNPCKLDQZ256rrkz
29828
  { 13227,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80813178005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13227 = VPUNPCKLDQZrm
29829
  { 13228,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9813178005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13228 = VPUNPCKLDQZrmb
29830
  { 13229,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a13178005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #13229 = VPUNPCKLDQZrmbk
29831
  { 13230,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e13178005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #13230 = VPUNPCKLDQZrmbkz
29832
  { 13231,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a13178005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #13231 = VPUNPCKLDQZrmk
29833
  { 13232,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e13178005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #13232 = VPUNPCKLDQZrmkz
29834
  { 13233,  3,  1,  0,  0,  0, 0x80813178005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13233 = VPUNPCKLDQZrr
29835
  { 13234,  5,  1,  0,  0,  0, 0x80a13178005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #13234 = VPUNPCKLDQZrrk
29836
  { 13235,  4,  1,  0,  0,  0, 0x80e13178005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #13235 = VPUNPCKLDQZrrkz
29837
  { 13236,  7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x13138005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #13236 = VPUNPCKLDQrm
29838
  { 13237,  3,  1,  0,  439,  0, 0x13138005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #13237 = VPUNPCKLDQrr
29839
  { 13238,  7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x93638005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #13238 = VPUNPCKLQDQYrm
29840
  { 13239,  3,  1,  0,  276,  0, 0x93638005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #13239 = VPUNPCKLQDQYrr
29841
  { 13240,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001b678005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13240 = VPUNPCKLQDQZ128rm
29842
  { 13241,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101b678005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13241 = VPUNPCKLQDQZ128rmb
29843
  { 13242,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121b678005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #13242 = VPUNPCKLQDQZ128rmbk
29844
  { 13243,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161b678005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #13243 = VPUNPCKLQDQZ128rmbkz
29845
  { 13244,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021b678005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #13244 = VPUNPCKLQDQZ128rmk
29846
  { 13245,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061b678005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #13245 = VPUNPCKLQDQZ128rmkz
29847
  { 13246,  3,  1,  0,  0,  0, 0x2001b678005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13246 = VPUNPCKLQDQZ128rr
29848
  { 13247,  5,  1,  0,  0,  0, 0x2021b678005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #13247 = VPUNPCKLQDQZ128rrk
29849
  { 13248,  4,  1,  0,  0,  0, 0x2061b678005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #13248 = VPUNPCKLQDQZ128rrkz
29850
  { 13249,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009b678005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13249 = VPUNPCKLQDQZ256rm
29851
  { 13250,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109b678005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13250 = VPUNPCKLQDQZ256rmb
29852
  { 13251,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129b678005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #13251 = VPUNPCKLQDQZ256rmbk
29853
  { 13252,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169b678005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #13252 = VPUNPCKLQDQZ256rmbkz
29854
  { 13253,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029b678005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #13253 = VPUNPCKLQDQZ256rmk
29855
  { 13254,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069b678005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #13254 = VPUNPCKLQDQZ256rmkz
29856
  { 13255,  3,  1,  0,  0,  0, 0x4009b678005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13255 = VPUNPCKLQDQZ256rr
29857
  { 13256,  5,  1,  0,  0,  0, 0x4029b678005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #13256 = VPUNPCKLQDQZ256rrk
29858
  { 13257,  4,  1,  0,  0,  0, 0x4069b678005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #13257 = VPUNPCKLQDQZ256rrkz
29859
  { 13258,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081b678005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13258 = VPUNPCKLQDQZrm
29860
  { 13259,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181b678005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13259 = VPUNPCKLQDQZrmb
29861
  { 13260,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1b678005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #13260 = VPUNPCKLQDQZrmbk
29862
  { 13261,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1b678005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #13261 = VPUNPCKLQDQZrmbkz
29863
  { 13262,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1b678005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #13262 = VPUNPCKLQDQZrmk
29864
  { 13263,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1b678005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #13263 = VPUNPCKLQDQZrmkz
29865
  { 13264,  3,  1,  0,  0,  0, 0x8081b678005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13264 = VPUNPCKLQDQZrr
29866
  { 13265,  5,  1,  0,  0,  0, 0x80a1b678005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #13265 = VPUNPCKLQDQZrrk
29867
  { 13266,  4,  1,  0,  0,  0, 0x80e1b678005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #13266 = VPUNPCKLQDQZrrkz
29868
  { 13267,  7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x13638005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #13267 = VPUNPCKLQDQrm
29869
  { 13268,  3,  1,  0,  439,  0, 0x13638005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #13268 = VPUNPCKLQDQrr
29870
  { 13269,  7,  1,  0,  275,  0|(1ULL<<MCID::MayLoad), 0x930b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #13269 = VPUNPCKLWDYrm
29871
  { 13270,  3,  1,  0,  276,  0, 0x930b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #13270 = VPUNPCKLWDYrr
29872
  { 13271,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200130f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13271 = VPUNPCKLWDZ128rm
29873
  { 13272,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202130f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr },  // Inst #13272 = VPUNPCKLWDZ128rmk
29874
  { 13273,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206130f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr },  // Inst #13273 = VPUNPCKLWDZ128rmkz
29875
  { 13274,  3,  1,  0,  0,  0, 0x200130f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13274 = VPUNPCKLWDZ128rr
29876
  { 13275,  5,  1,  0,  0,  0, 0x202130f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr },  // Inst #13275 = VPUNPCKLWDZ128rrk
29877
  { 13276,  4,  1,  0,  0,  0, 0x206130f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr },  // Inst #13276 = VPUNPCKLWDZ128rrkz
29878
  { 13277,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400930f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13277 = VPUNPCKLWDZ256rm
29879
  { 13278,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402930f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr },  // Inst #13278 = VPUNPCKLWDZ256rmk
29880
  { 13279,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406930f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr },  // Inst #13279 = VPUNPCKLWDZ256rmkz
29881
  { 13280,  3,  1,  0,  0,  0, 0x400930f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13280 = VPUNPCKLWDZ256rr
29882
  { 13281,  5,  1,  0,  0,  0, 0x402930f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr },  // Inst #13281 = VPUNPCKLWDZ256rrk
29883
  { 13282,  4,  1,  0,  0,  0, 0x406930f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr },  // Inst #13282 = VPUNPCKLWDZ256rrkz
29884
  { 13283,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808130f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13283 = VPUNPCKLWDZrm
29885
  { 13284,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a130f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr },  // Inst #13284 = VPUNPCKLWDZrmk
29886
  { 13285,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e130f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr },  // Inst #13285 = VPUNPCKLWDZrmkz
29887
  { 13286,  3,  1,  0,  0,  0, 0x808130f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13286 = VPUNPCKLWDZrr
29888
  { 13287,  5,  1,  0,  0,  0, 0x80a130f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr },  // Inst #13287 = VPUNPCKLWDZrrk
29889
  { 13288,  4,  1,  0,  0,  0, 0x80e130f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr },  // Inst #13288 = VPUNPCKLWDZrrkz
29890
  { 13289,  7,  1,  0,  438,  0|(1ULL<<MCID::MayLoad), 0x130b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #13289 = VPUNPCKLWDrm
29891
  { 13290,  3,  1,  0,  439,  0, 0x130b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #13290 = VPUNPCKLWDrr
29892
  { 13291,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200177f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13291 = VPXORDZ128rm
29893
  { 13292,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90177f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13292 = VPXORDZ128rmb
29894
  { 13293,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92177f8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #13293 = VPXORDZ128rmbk
29895
  { 13294,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96177f8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #13294 = VPXORDZ128rmbkz
29896
  { 13295,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202177f8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #13295 = VPXORDZ128rmk
29897
  { 13296,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206177f8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #13296 = VPXORDZ128rmkz
29898
  { 13297,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x200177f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13297 = VPXORDZ128rr
29899
  { 13298,  5,  1,  0,  0,  0, 0x202177f8005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #13298 = VPXORDZ128rrk
29900
  { 13299,  4,  1,  0,  0,  0, 0x206177f8005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #13299 = VPXORDZ128rrkz
29901
  { 13300,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400977f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13300 = VPXORDZ256rm
29902
  { 13301,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90977f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13301 = VPXORDZ256rmb
29903
  { 13302,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92977f8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #13302 = VPXORDZ256rmbk
29904
  { 13303,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96977f8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #13303 = VPXORDZ256rmbkz
29905
  { 13304,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402977f8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #13304 = VPXORDZ256rmk
29906
  { 13305,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406977f8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #13305 = VPXORDZ256rmkz
29907
  { 13306,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x400977f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13306 = VPXORDZ256rr
29908
  { 13307,  5,  1,  0,  0,  0, 0x402977f8005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #13307 = VPXORDZ256rrk
29909
  { 13308,  4,  1,  0,  0,  0, 0x406977f8005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #13308 = VPXORDZ256rrkz
29910
  { 13309,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808177f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13309 = VPXORDZrm
29911
  { 13310,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98177f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13310 = VPXORDZrmb
29912
  { 13311,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a177f8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #13311 = VPXORDZrmbk
29913
  { 13312,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e177f8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #13312 = VPXORDZrmbkz
29914
  { 13313,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a177f8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #13313 = VPXORDZrmk
29915
  { 13314,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e177f8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #13314 = VPXORDZrmkz
29916
  { 13315,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x808177f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13315 = VPXORDZrr
29917
  { 13316,  5,  1,  0,  0,  0, 0x80a177f8005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #13316 = VPXORDZrrk
29918
  { 13317,  4,  1,  0,  0,  0, 0x80e177f8005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #13317 = VPXORDZrrkz
29919
  { 13318,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001f7f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13318 = VPXORQZ128rm
29920
  { 13319,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101f7f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13319 = VPXORQZ128rmb
29921
  { 13320,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121f7f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #13320 = VPXORQZ128rmbk
29922
  { 13321,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161f7f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #13321 = VPXORQZ128rmbkz
29923
  { 13322,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021f7f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #13322 = VPXORQZ128rmk
29924
  { 13323,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061f7f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #13323 = VPXORQZ128rmkz
29925
  { 13324,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x2001f7f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13324 = VPXORQZ128rr
29926
  { 13325,  5,  1,  0,  0,  0, 0x2021f7f8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #13325 = VPXORQZ128rrk
29927
  { 13326,  4,  1,  0,  0,  0, 0x2061f7f8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #13326 = VPXORQZ128rrkz
29928
  { 13327,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009f7f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13327 = VPXORQZ256rm
29929
  { 13328,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109f7f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13328 = VPXORQZ256rmb
29930
  { 13329,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129f7f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #13329 = VPXORQZ256rmbk
29931
  { 13330,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169f7f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #13330 = VPXORQZ256rmbkz
29932
  { 13331,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029f7f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #13331 = VPXORQZ256rmk
29933
  { 13332,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069f7f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #13332 = VPXORQZ256rmkz
29934
  { 13333,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x4009f7f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13333 = VPXORQZ256rr
29935
  { 13334,  5,  1,  0,  0,  0, 0x4029f7f8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #13334 = VPXORQZ256rrk
29936
  { 13335,  4,  1,  0,  0,  0, 0x4069f7f8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #13335 = VPXORQZ256rrkz
29937
  { 13336,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081f7f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13336 = VPXORQZrm
29938
  { 13337,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181f7f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13337 = VPXORQZrmb
29939
  { 13338,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1f7f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #13338 = VPXORQZrmbk
29940
  { 13339,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1f7f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #13339 = VPXORQZrmbkz
29941
  { 13340,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1f7f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #13340 = VPXORQZrmk
29942
  { 13341,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1f7f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #13341 = VPXORQZrmkz
29943
  { 13342,  3,  1,  0,  0,  0|(1ULL<<MCID::Commutable), 0x8081f7f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13342 = VPXORQZrr
29944
  { 13343,  5,  1,  0,  0,  0, 0x80a1f7f8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #13343 = VPXORQZrrk
29945
  { 13344,  4,  1,  0,  0,  0, 0x80e1f7f8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #13344 = VPXORQZrrkz
29946
  { 13345,  7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x977b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #13345 = VPXORYrm
29947
  { 13346,  3,  1,  0,  383,  0|(1ULL<<MCID::Commutable), 0x977b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #13346 = VPXORYrr
29948
  { 13347,  7,  1,  0,  382,  0|(1ULL<<MCID::MayLoad), 0x177b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #13347 = VPXORrm
29949
  { 13348,  3,  1,  0,  383,  0|(1ULL<<MCID::Commutable), 0x177b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #13348 = VPXORrr
29950
  { 13349,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101a87804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #13349 = VRANGEPDZ128rmbi
29951
  { 13350,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121a87804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #13350 = VRANGEPDZ128rmbik
29952
  { 13351,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161a87804d006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr },  // Inst #13351 = VRANGEPDZ128rmbikz
29953
  { 13352,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001a87804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #13352 = VRANGEPDZ128rmi
29954
  { 13353,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021a87804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #13353 = VRANGEPDZ128rmik
29955
  { 13354,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061a87804d006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr },  // Inst #13354 = VRANGEPDZ128rmikz
29956
  { 13355,  4,  1,  0,  0,  0, 0x2001a87804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13355 = VRANGEPDZ128rri
29957
  { 13356,  6,  1,  0,  0,  0, 0x2021a87804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr },  // Inst #13356 = VRANGEPDZ128rrik
29958
  { 13357,  5,  1,  0,  0,  0, 0x2061a87804d005ULL, nullptr, nullptr, OperandInfo343, -1 ,nullptr },  // Inst #13357 = VRANGEPDZ128rrikz
29959
  { 13358,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109a87804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13358 = VRANGEPDZ256rmbi
29960
  { 13359,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129a87804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #13359 = VRANGEPDZ256rmbik
29961
  { 13360,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169a87804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #13360 = VRANGEPDZ256rmbikz
29962
  { 13361,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009a87804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13361 = VRANGEPDZ256rmi
29963
  { 13362,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029a87804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #13362 = VRANGEPDZ256rmik
29964
  { 13363,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069a87804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #13363 = VRANGEPDZ256rmikz
29965
  { 13364,  4,  1,  0,  0,  0, 0x4009a87804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #13364 = VRANGEPDZ256rri
29966
  { 13365,  6,  1,  0,  0,  0, 0x4029a87804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr },  // Inst #13365 = VRANGEPDZ256rrik
29967
  { 13366,  5,  1,  0,  0,  0, 0x4069a87804d005ULL, nullptr, nullptr, OperandInfo347, -1 ,nullptr },  // Inst #13366 = VRANGEPDZ256rrikz
29968
  { 13367,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181a87804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #13367 = VRANGEPDZrmbi
29969
  { 13368,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1a87804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #13368 = VRANGEPDZrmbik
29970
  { 13369,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1a87804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #13369 = VRANGEPDZrmbikz
29971
  { 13370,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081a87804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #13370 = VRANGEPDZrmi
29972
  { 13371,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1a87804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #13371 = VRANGEPDZrmik
29973
  { 13372,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1a87804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #13372 = VRANGEPDZrmikz
29974
  { 13373,  4,  1,  0,  0,  0, 0x8081a87804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #13373 = VRANGEPDZrri
29975
  { 13374,  4,  1,  0,  0,  0, 0x1181a87804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #13374 = VRANGEPDZrrib
29976
  { 13375,  6,  1,  0,  0,  0, 0x11a1a87804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #13375 = VRANGEPDZrribk
29977
  { 13376,  5,  1,  0,  0,  0, 0x11e1a87804d005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr },  // Inst #13376 = VRANGEPDZrribkz
29978
  { 13377,  6,  1,  0,  0,  0, 0x80a1a87804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #13377 = VRANGEPDZrrik
29979
  { 13378,  5,  1,  0,  0,  0, 0x80e1a87804d005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr },  // Inst #13378 = VRANGEPDZrrikz
29980
  { 13379,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x901287804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #13379 = VRANGEPSZ128rmbi
29981
  { 13380,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x921287804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #13380 = VRANGEPSZ128rmbik
29982
  { 13381,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x961287804d006ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr },  // Inst #13381 = VRANGEPSZ128rmbikz
29983
  { 13382,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001287804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #13382 = VRANGEPSZ128rmi
29984
  { 13383,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021287804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #13383 = VRANGEPSZ128rmik
29985
  { 13384,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061287804d006ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr },  // Inst #13384 = VRANGEPSZ128rmikz
29986
  { 13385,  4,  1,  0,  0,  0, 0x2001287804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13385 = VRANGEPSZ128rri
29987
  { 13386,  6,  1,  0,  0,  0, 0x2021287804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr },  // Inst #13386 = VRANGEPSZ128rrik
29988
  { 13387,  5,  1,  0,  0,  0, 0x2061287804d005ULL, nullptr, nullptr, OperandInfo330, -1 ,nullptr },  // Inst #13387 = VRANGEPSZ128rrikz
29989
  { 13388,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x909287804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13388 = VRANGEPSZ256rmbi
29990
  { 13389,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x929287804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #13389 = VRANGEPSZ256rmbik
29991
  { 13390,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x969287804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #13390 = VRANGEPSZ256rmbikz
29992
  { 13391,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009287804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13391 = VRANGEPSZ256rmi
29993
  { 13392,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029287804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #13392 = VRANGEPSZ256rmik
29994
  { 13393,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069287804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #13393 = VRANGEPSZ256rmikz
29995
  { 13394,  4,  1,  0,  0,  0, 0x4009287804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #13394 = VRANGEPSZ256rri
29996
  { 13395,  6,  1,  0,  0,  0, 0x4029287804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr },  // Inst #13395 = VRANGEPSZ256rrik
29997
  { 13396,  5,  1,  0,  0,  0, 0x4069287804d005ULL, nullptr, nullptr, OperandInfo336, -1 ,nullptr },  // Inst #13396 = VRANGEPSZ256rrikz
29998
  { 13397,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x981287804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #13397 = VRANGEPSZrmbi
29999
  { 13398,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a1287804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #13398 = VRANGEPSZrmbik
30000
  { 13399,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e1287804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #13399 = VRANGEPSZrmbikz
30001
  { 13400,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081287804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #13400 = VRANGEPSZrmi
30002
  { 13401,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1287804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #13401 = VRANGEPSZrmik
30003
  { 13402,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1287804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #13402 = VRANGEPSZrmikz
30004
  { 13403,  4,  1,  0,  0,  0, 0x8081287804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #13403 = VRANGEPSZrri
30005
  { 13404,  4,  1,  0,  0,  0, 0x981287804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #13404 = VRANGEPSZrrib
30006
  { 13405,  6,  1,  0,  0,  0, 0x9a1287804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #13405 = VRANGEPSZrribk
30007
  { 13406,  5,  1,  0,  0,  0, 0x9e1287804d005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr },  // Inst #13406 = VRANGEPSZrribkz
30008
  { 13407,  6,  1,  0,  0,  0, 0x80a1287804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #13407 = VRANGEPSZrrik
30009
  { 13408,  5,  1,  0,  0,  0, 0x80e1287804d005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr },  // Inst #13408 = VRANGEPSZrrikz
30010
  { 13409,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011a8f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #13409 = VRANGESDZ128rmi
30011
  { 13410,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1011a8f804d006ULL, nullptr, nullptr, OperandInfo631, -1 ,nullptr },  // Inst #13410 = VRANGESDZ128rmi_alt
30012
  { 13411,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1031a8f804d006ULL, nullptr, nullptr, OperandInfo632, -1 ,nullptr },  // Inst #13411 = VRANGESDZ128rmi_altk
30013
  { 13412,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1071a8f804d006ULL, nullptr, nullptr, OperandInfo633, -1 ,nullptr },  // Inst #13412 = VRANGESDZ128rmi_altkz
30014
  { 13413,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031a8f804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #13413 = VRANGESDZ128rmik
30015
  { 13414,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071a8f804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr },  // Inst #13414 = VRANGESDZ128rmikz
30016
  { 13415,  4,  1,  0,  0,  0, 0x1011a8f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13415 = VRANGESDZ128rri
30017
  { 13416,  4,  1,  0,  0,  0, 0x1111a8f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13416 = VRANGESDZ128rrib
30018
  { 13417,  6,  1,  0,  0,  0, 0x1131a8f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13417 = VRANGESDZ128rribk
30019
  { 13418,  5,  1,  0,  0,  0, 0x1171a8f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13418 = VRANGESDZ128rribkz
30020
  { 13419,  6,  1,  0,  0,  0, 0x1031a8f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13419 = VRANGESDZ128rrik
30021
  { 13420,  5,  1,  0,  0,  0, 0x1071a8f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13420 = VRANGESDZ128rrikz
30022
  { 13421,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81128f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #13421 = VRANGESSZ128rmi
30023
  { 13422,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x81128f804d006ULL, nullptr, nullptr, OperandInfo635, -1 ,nullptr },  // Inst #13422 = VRANGESSZ128rmi_alt
30024
  { 13423,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x83128f804d006ULL, nullptr, nullptr, OperandInfo636, -1 ,nullptr },  // Inst #13423 = VRANGESSZ128rmi_altk
30025
  { 13424,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x87128f804d006ULL, nullptr, nullptr, OperandInfo637, -1 ,nullptr },  // Inst #13424 = VRANGESSZ128rmi_altkz
30026
  { 13425,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x83128f804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #13425 = VRANGESSZ128rmik
30027
  { 13426,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x87128f804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr },  // Inst #13426 = VRANGESSZ128rmikz
30028
  { 13427,  4,  1,  0,  0,  0, 0x81128f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13427 = VRANGESSZ128rri
30029
  { 13428,  4,  1,  0,  0,  0, 0x91128f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13428 = VRANGESSZ128rrib
30030
  { 13429,  6,  1,  0,  0,  0, 0x93128f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13429 = VRANGESSZ128rribk
30031
  { 13430,  5,  1,  0,  0,  0, 0x97128f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13430 = VRANGESSZ128rribkz
30032
  { 13431,  6,  1,  0,  0,  0, 0x83128f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13431 = VRANGESSZ128rrik
30033
  { 13432,  5,  1,  0,  0,  0, 0x87128f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13432 = VRANGESSZ128rrikz
30034
  { 13433,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000a660009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #13433 = VRCP14PDZ128m
30035
  { 13434,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100a660009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #13434 = VRCP14PDZ128mb
30036
  { 13435,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120a660009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #13435 = VRCP14PDZ128mbk
30037
  { 13436,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160a660009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #13436 = VRCP14PDZ128mbkz
30038
  { 13437,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020a660009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #13437 = VRCP14PDZ128mk
30039
  { 13438,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060a660009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #13438 = VRCP14PDZ128mkz
30040
  { 13439,  2,  1,  0,  0,  0, 0x2000a660009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #13439 = VRCP14PDZ128r
30041
  { 13440,  4,  1,  0,  0,  0, 0x2020a660009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #13440 = VRCP14PDZ128rk
30042
  { 13441,  3,  1,  0,  0,  0, 0x2060a660009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #13441 = VRCP14PDZ128rkz
30043
  { 13442,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008a660009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #13442 = VRCP14PDZ256m
30044
  { 13443,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108a660009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #13443 = VRCP14PDZ256mb
30045
  { 13444,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128a660009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #13444 = VRCP14PDZ256mbk
30046
  { 13445,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168a660009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #13445 = VRCP14PDZ256mbkz
30047
  { 13446,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028a660009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #13446 = VRCP14PDZ256mk
30048
  { 13447,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068a660009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #13447 = VRCP14PDZ256mkz
30049
  { 13448,  2,  1,  0,  0,  0, 0x4008a660009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #13448 = VRCP14PDZ256r
30050
  { 13449,  4,  1,  0,  0,  0, 0x4028a660009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #13449 = VRCP14PDZ256rk
30051
  { 13450,  3,  1,  0,  0,  0, 0x4068a660009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #13450 = VRCP14PDZ256rkz
30052
  { 13451,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080a660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13451 = VRCP14PDZm
30053
  { 13452,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180a660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13452 = VRCP14PDZmb
30054
  { 13453,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0a660009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #13453 = VRCP14PDZmbk
30055
  { 13454,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0a660009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #13454 = VRCP14PDZmbkz
30056
  { 13455,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0a660009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #13455 = VRCP14PDZmk
30057
  { 13456,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0a660009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #13456 = VRCP14PDZmkz
30058
  { 13457,  2,  1,  0,  0,  0, 0x8080a660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13457 = VRCP14PDZr
30059
  { 13458,  4,  1,  0,  0,  0, 0x80a0a660009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #13458 = VRCP14PDZrk
30060
  { 13459,  3,  1,  0,  0,  0, 0x80e0a660009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #13459 = VRCP14PDZrkz
30061
  { 13460,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20002660009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #13460 = VRCP14PSZ128m
30062
  { 13461,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9002660009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #13461 = VRCP14PSZ128mb
30063
  { 13462,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9202660009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #13462 = VRCP14PSZ128mbk
30064
  { 13463,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9602660009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #13463 = VRCP14PSZ128mbkz
30065
  { 13464,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20202660009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #13464 = VRCP14PSZ128mk
30066
  { 13465,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20602660009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #13465 = VRCP14PSZ128mkz
30067
  { 13466,  2,  1,  0,  0,  0, 0x20002660009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #13466 = VRCP14PSZ128r
30068
  { 13467,  4,  1,  0,  0,  0, 0x20202660009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #13467 = VRCP14PSZ128rk
30069
  { 13468,  3,  1,  0,  0,  0, 0x20602660009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #13468 = VRCP14PSZ128rkz
30070
  { 13469,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40082660009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #13469 = VRCP14PSZ256m
30071
  { 13470,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9082660009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #13470 = VRCP14PSZ256mb
30072
  { 13471,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9282660009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #13471 = VRCP14PSZ256mbk
30073
  { 13472,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9682660009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #13472 = VRCP14PSZ256mbkz
30074
  { 13473,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40282660009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #13473 = VRCP14PSZ256mk
30075
  { 13474,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40682660009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #13474 = VRCP14PSZ256mkz
30076
  { 13475,  2,  1,  0,  0,  0, 0x40082660009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #13475 = VRCP14PSZ256r
30077
  { 13476,  4,  1,  0,  0,  0, 0x40282660009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #13476 = VRCP14PSZ256rk
30078
  { 13477,  3,  1,  0,  0,  0, 0x40682660009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #13477 = VRCP14PSZ256rkz
30079
  { 13478,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80802660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13478 = VRCP14PSZm
30080
  { 13479,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9802660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13479 = VRCP14PSZmb
30081
  { 13480,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a02660009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #13480 = VRCP14PSZmbk
30082
  { 13481,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e02660009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #13481 = VRCP14PSZmbkz
30083
  { 13482,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a02660009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #13482 = VRCP14PSZmk
30084
  { 13483,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e02660009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #13483 = VRCP14PSZmkz
30085
  { 13484,  2,  1,  0,  0,  0, 0x80802660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13484 = VRCP14PSZr
30086
  { 13485,  4,  1,  0,  0,  0, 0x80a02660009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #13485 = VRCP14PSZrk
30087
  { 13486,  3,  1,  0,  0,  0, 0x80e02660009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #13486 = VRCP14PSZrkz
30088
  { 13487,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1001a6e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13487 = VRCP14SDrm
30089
  { 13488,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1021a6e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #13488 = VRCP14SDrmk
30090
  { 13489,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1061a6e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #13489 = VRCP14SDrmkz
30091
  { 13490,  3,  1,  0,  0,  0, 0x1001a6e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13490 = VRCP14SDrr
30092
  { 13491,  5,  1,  0,  0,  0, 0x1021a6e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13491 = VRCP14SDrrk
30093
  { 13492,  4,  1,  0,  0,  0, 0x1061a6e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13492 = VRCP14SDrrkz
30094
  { 13493,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80126e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13493 = VRCP14SSrm
30095
  { 13494,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82126e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #13494 = VRCP14SSrmk
30096
  { 13495,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x86126e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #13495 = VRCP14SSrmkz
30097
  { 13496,  3,  1,  0,  0,  0, 0x80126e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13496 = VRCP14SSrr
30098
  { 13497,  5,  1,  0,  0,  0, 0x82126e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13497 = VRCP14SSrrk
30099
  { 13498,  4,  1,  0,  0,  0, 0x86126e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13498 = VRCP14SSrrkz
30100
  { 13499,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080e560009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13499 = VRCP28PDm
30101
  { 13500,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180e560009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13500 = VRCP28PDmb
30102
  { 13501,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0e560009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #13501 = VRCP28PDmbk
30103
  { 13502,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0e560009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #13502 = VRCP28PDmbkz
30104
  { 13503,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0e560009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #13503 = VRCP28PDmk
30105
  { 13504,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0e560009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #13504 = VRCP28PDmkz
30106
  { 13505,  2,  1,  0,  0,  0, 0x8080e560009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13505 = VRCP28PDr
30107
  { 13506,  2,  1,  0,  0,  0, 0x1180e560009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13506 = VRCP28PDrb
30108
  { 13507,  4,  1,  0,  0,  0, 0x11a0e560009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #13507 = VRCP28PDrbk
30109
  { 13508,  3,  1,  0,  0,  0, 0x11e0e560009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #13508 = VRCP28PDrbkz
30110
  { 13509,  4,  1,  0,  0,  0, 0x80a0e560009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #13509 = VRCP28PDrk
30111
  { 13510,  3,  1,  0,  0,  0, 0x80e0e560009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #13510 = VRCP28PDrkz
30112
  { 13511,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80806560009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13511 = VRCP28PSm
30113
  { 13512,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9806560009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13512 = VRCP28PSmb
30114
  { 13513,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a06560009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #13513 = VRCP28PSmbk
30115
  { 13514,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e06560009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #13514 = VRCP28PSmbkz
30116
  { 13515,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a06560009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #13515 = VRCP28PSmk
30117
  { 13516,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e06560009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #13516 = VRCP28PSmkz
30118
  { 13517,  2,  1,  0,  0,  0, 0x80806560009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13517 = VRCP28PSr
30119
  { 13518,  2,  1,  0,  0,  0, 0x9806560009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13518 = VRCP28PSrb
30120
  { 13519,  4,  1,  0,  0,  0, 0x9a06560009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #13519 = VRCP28PSrbk
30121
  { 13520,  3,  1,  0,  0,  0, 0x9e06560009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #13520 = VRCP28PSrbkz
30122
  { 13521,  4,  1,  0,  0,  0, 0x80a06560009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #13521 = VRCP28PSrk
30123
  { 13522,  3,  1,  0,  0,  0, 0x80e06560009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #13522 = VRCP28PSrkz
30124
  { 13523,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1001e5e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13523 = VRCP28SDm
30125
  { 13524,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1021e5e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #13524 = VRCP28SDmk
30126
  { 13525,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1061e5e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #13525 = VRCP28SDmkz
30127
  { 13526,  3,  1,  0,  0,  0, 0x1001e5e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13526 = VRCP28SDr
30128
  { 13527,  3,  1,  0,  0,  0, 0x1101e5e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13527 = VRCP28SDrb
30129
  { 13528,  5,  1,  0,  0,  0, 0x1121e5e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13528 = VRCP28SDrbk
30130
  { 13529,  4,  1,  0,  0,  0, 0x1161e5e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13529 = VRCP28SDrbkz
30131
  { 13530,  5,  1,  0,  0,  0, 0x1021e5e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13530 = VRCP28SDrk
30132
  { 13531,  4,  1,  0,  0,  0, 0x1061e5e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13531 = VRCP28SDrkz
30133
  { 13532,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80165e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13532 = VRCP28SSm
30134
  { 13533,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82165e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #13533 = VRCP28SSmk
30135
  { 13534,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x86165e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #13534 = VRCP28SSmkz
30136
  { 13535,  3,  1,  0,  0,  0, 0x80165e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13535 = VRCP28SSr
30137
  { 13536,  3,  1,  0,  0,  0, 0x90165e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13536 = VRCP28SSrb
30138
  { 13537,  5,  1,  0,  0,  0, 0x92165e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13537 = VRCP28SSrbk
30139
  { 13538,  4,  1,  0,  0,  0, 0x96165e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13538 = VRCP28SSrbkz
30140
  { 13539,  5,  1,  0,  0,  0, 0x82165e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13539 = VRCP28SSrk
30141
  { 13540,  4,  1,  0,  0,  0, 0x86165e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13540 = VRCP28SSrkz
30142
  { 13541,  6,  1,  0,  915,  0|(1ULL<<MCID::MayLoad), 0x829a8004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #13541 = VRCPPSYm
30143
  { 13542,  2,  1,  0,  914,  0, 0x829a8004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #13542 = VRCPPSYr
30144
  { 13543,  6,  1,  0,  449,  0|(1ULL<<MCID::MayLoad), 0x29a8004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #13543 = VRCPPSm
30145
  { 13544,  2,  1,  0,  450,  0, 0x29a8004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #13544 = VRCPPSr
30146
  { 13545,  7,  1,  0,  451,  0|(1ULL<<MCID::MayLoad), 0x1129a8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #13545 = VRCPSSm
30147
  { 13546,  7,  1,  0,  452,  0|(1ULL<<MCID::MayLoad), 0x1129a0005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #13546 = VRCPSSm_Int
30148
  { 13547,  3,  1,  0,  453,  0, 0x1129a8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #13547 = VRCPSSr
30149
  { 13548,  3,  1,  0,  577,  0, 0x1129a0005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #13548 = VRCPSSr_Int
30150
  { 13549,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100ab7804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #13549 = VREDUCEPDZ128rmbi
30151
  { 13550,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120ab7804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #13550 = VREDUCEPDZ128rmbik
30152
  { 13551,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160ab7804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #13551 = VREDUCEPDZ128rmbikz
30153
  { 13552,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000ab7804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #13552 = VREDUCEPDZ128rmi
30154
  { 13553,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020ab7804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #13553 = VREDUCEPDZ128rmik
30155
  { 13554,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060ab7804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #13554 = VREDUCEPDZ128rmikz
30156
  { 13555,  3,  1,  0,  0,  0, 0x2000ab7804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #13555 = VREDUCEPDZ128rri
30157
  { 13556,  5,  1,  0,  0,  0, 0x2020ab7804d005ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr },  // Inst #13556 = VREDUCEPDZ128rrik
30158
  { 13557,  4,  1,  0,  0,  0, 0x2060ab7804d005ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr },  // Inst #13557 = VREDUCEPDZ128rrikz
30159
  { 13558,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108ab7804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #13558 = VREDUCEPDZ256rmbi
30160
  { 13559,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128ab7804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #13559 = VREDUCEPDZ256rmbik
30161
  { 13560,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168ab7804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #13560 = VREDUCEPDZ256rmbikz
30162
  { 13561,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008ab7804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #13561 = VREDUCEPDZ256rmi
30163
  { 13562,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028ab7804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #13562 = VREDUCEPDZ256rmik
30164
  { 13563,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068ab7804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #13563 = VREDUCEPDZ256rmikz
30165
  { 13564,  3,  1,  0,  0,  0, 0x4008ab7804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #13564 = VREDUCEPDZ256rri
30166
  { 13565,  5,  1,  0,  0,  0, 0x4028ab7804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr },  // Inst #13565 = VREDUCEPDZ256rrik
30167
  { 13566,  4,  1,  0,  0,  0, 0x4068ab7804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr },  // Inst #13566 = VREDUCEPDZ256rrikz
30168
  { 13567,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180ab7804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #13567 = VREDUCEPDZrmbi
30169
  { 13568,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0ab7804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #13568 = VREDUCEPDZrmbik
30170
  { 13569,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0ab7804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #13569 = VREDUCEPDZrmbikz
30171
  { 13570,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080ab7804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #13570 = VREDUCEPDZrmi
30172
  { 13571,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0ab7804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #13571 = VREDUCEPDZrmik
30173
  { 13572,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0ab7804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #13572 = VREDUCEPDZrmikz
30174
  { 13573,  3,  1,  0,  0,  0, 0x8080ab7804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #13573 = VREDUCEPDZrri
30175
  { 13574,  3,  1,  0,  0,  0, 0x1180ab7804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #13574 = VREDUCEPDZrrib
30176
  { 13575,  5,  1,  0,  0,  0, 0x11a0ab7804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #13575 = VREDUCEPDZrribk
30177
  { 13576,  4,  1,  0,  0,  0, 0x11e0ab7804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #13576 = VREDUCEPDZrribkz
30178
  { 13577,  5,  1,  0,  0,  0, 0x80a0ab7804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #13577 = VREDUCEPDZrrik
30179
  { 13578,  4,  1,  0,  0,  0, 0x80e0ab7804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #13578 = VREDUCEPDZrrikz
30180
  { 13579,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9002b7804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #13579 = VREDUCEPSZ128rmbi
30181
  { 13580,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9202b7804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #13580 = VREDUCEPSZ128rmbik
30182
  { 13581,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9602b7804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #13581 = VREDUCEPSZ128rmbikz
30183
  { 13582,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20002b7804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #13582 = VREDUCEPSZ128rmi
30184
  { 13583,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20202b7804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #13583 = VREDUCEPSZ128rmik
30185
  { 13584,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20602b7804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #13584 = VREDUCEPSZ128rmikz
30186
  { 13585,  3,  1,  0,  0,  0, 0x20002b7804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #13585 = VREDUCEPSZ128rri
30187
  { 13586,  5,  1,  0,  0,  0, 0x20202b7804d005ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr },  // Inst #13586 = VREDUCEPSZ128rrik
30188
  { 13587,  4,  1,  0,  0,  0, 0x20602b7804d005ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr },  // Inst #13587 = VREDUCEPSZ128rrikz
30189
  { 13588,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9082b7804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #13588 = VREDUCEPSZ256rmbi
30190
  { 13589,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9282b7804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #13589 = VREDUCEPSZ256rmbik
30191
  { 13590,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9682b7804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #13590 = VREDUCEPSZ256rmbikz
30192
  { 13591,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40082b7804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #13591 = VREDUCEPSZ256rmi
30193
  { 13592,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40282b7804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #13592 = VREDUCEPSZ256rmik
30194
  { 13593,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40682b7804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #13593 = VREDUCEPSZ256rmikz
30195
  { 13594,  3,  1,  0,  0,  0, 0x40082b7804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #13594 = VREDUCEPSZ256rri
30196
  { 13595,  5,  1,  0,  0,  0, 0x40282b7804d005ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr },  // Inst #13595 = VREDUCEPSZ256rrik
30197
  { 13596,  4,  1,  0,  0,  0, 0x40682b7804d005ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr },  // Inst #13596 = VREDUCEPSZ256rrikz
30198
  { 13597,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9802b7804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #13597 = VREDUCEPSZrmbi
30199
  { 13598,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a02b7804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #13598 = VREDUCEPSZrmbik
30200
  { 13599,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e02b7804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #13599 = VREDUCEPSZrmbikz
30201
  { 13600,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80802b7804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #13600 = VREDUCEPSZrmi
30202
  { 13601,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a02b7804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #13601 = VREDUCEPSZrmik
30203
  { 13602,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e02b7804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #13602 = VREDUCEPSZrmikz
30204
  { 13603,  3,  1,  0,  0,  0, 0x80802b7804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #13603 = VREDUCEPSZrri
30205
  { 13604,  3,  1,  0,  0,  0, 0x9802b7804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #13604 = VREDUCEPSZrrib
30206
  { 13605,  5,  1,  0,  0,  0, 0x9a02b7804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #13605 = VREDUCEPSZrribk
30207
  { 13606,  4,  1,  0,  0,  0, 0x9e02b7804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #13606 = VREDUCEPSZrribkz
30208
  { 13607,  5,  1,  0,  0,  0, 0x80a02b7804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #13607 = VREDUCEPSZrrik
30209
  { 13608,  4,  1,  0,  0,  0, 0x80e02b7804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #13608 = VREDUCEPSZrrikz
30210
  { 13609,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011abf804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #13609 = VREDUCESDZ128rmi
30211
  { 13610,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1011abf804d006ULL, nullptr, nullptr, OperandInfo631, -1 ,nullptr },  // Inst #13610 = VREDUCESDZ128rmi_alt
30212
  { 13611,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1031abf804d006ULL, nullptr, nullptr, OperandInfo632, -1 ,nullptr },  // Inst #13611 = VREDUCESDZ128rmi_altk
30213
  { 13612,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1071abf804d006ULL, nullptr, nullptr, OperandInfo633, -1 ,nullptr },  // Inst #13612 = VREDUCESDZ128rmi_altkz
30214
  { 13613,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031abf804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #13613 = VREDUCESDZ128rmik
30215
  { 13614,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071abf804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr },  // Inst #13614 = VREDUCESDZ128rmikz
30216
  { 13615,  4,  1,  0,  0,  0, 0x1011abf804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13615 = VREDUCESDZ128rri
30217
  { 13616,  4,  1,  0,  0,  0, 0x1111abf804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13616 = VREDUCESDZ128rrib
30218
  { 13617,  6,  1,  0,  0,  0, 0x1131abf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13617 = VREDUCESDZ128rribk
30219
  { 13618,  5,  1,  0,  0,  0, 0x1171abf804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13618 = VREDUCESDZ128rribkz
30220
  { 13619,  6,  1,  0,  0,  0, 0x1031abf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13619 = VREDUCESDZ128rrik
30221
  { 13620,  5,  1,  0,  0,  0, 0x1071abf804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13620 = VREDUCESDZ128rrikz
30222
  { 13621,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8112bf804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #13621 = VREDUCESSZ128rmi
30223
  { 13622,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8112bf804d006ULL, nullptr, nullptr, OperandInfo635, -1 ,nullptr },  // Inst #13622 = VREDUCESSZ128rmi_alt
30224
  { 13623,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8312bf804d006ULL, nullptr, nullptr, OperandInfo636, -1 ,nullptr },  // Inst #13623 = VREDUCESSZ128rmi_altk
30225
  { 13624,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8712bf804d006ULL, nullptr, nullptr, OperandInfo637, -1 ,nullptr },  // Inst #13624 = VREDUCESSZ128rmi_altkz
30226
  { 13625,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8312bf804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #13625 = VREDUCESSZ128rmik
30227
  { 13626,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8712bf804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr },  // Inst #13626 = VREDUCESSZ128rmikz
30228
  { 13627,  4,  1,  0,  0,  0, 0x8112bf804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13627 = VREDUCESSZ128rri
30229
  { 13628,  4,  1,  0,  0,  0, 0x9112bf804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13628 = VREDUCESSZ128rrib
30230
  { 13629,  6,  1,  0,  0,  0, 0x9312bf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13629 = VREDUCESSZ128rribk
30231
  { 13630,  5,  1,  0,  0,  0, 0x9712bf804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13630 = VREDUCESSZ128rribkz
30232
  { 13631,  6,  1,  0,  0,  0, 0x8312bf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13631 = VREDUCESSZ128rrik
30233
  { 13632,  5,  1,  0,  0,  0, 0x8712bf804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13632 = VREDUCESSZ128rrikz
30234
  { 13633,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110084f804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #13633 = VRNDSCALEPDZ128rmbi
30235
  { 13634,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112084f804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #13634 = VRNDSCALEPDZ128rmbik
30236
  { 13635,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116084f804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #13635 = VRNDSCALEPDZ128rmbikz
30237
  { 13636,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200084f804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #13636 = VRNDSCALEPDZ128rmi
30238
  { 13637,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202084f804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr },  // Inst #13637 = VRNDSCALEPDZ128rmik
30239
  { 13638,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206084f804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr },  // Inst #13638 = VRNDSCALEPDZ128rmikz
30240
  { 13639,  3,  1,  0,  0,  0, 0x200084f804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #13639 = VRNDSCALEPDZ128rri
30241
  { 13640,  5,  1,  0,  0,  0, 0x202084f804d005ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr },  // Inst #13640 = VRNDSCALEPDZ128rrik
30242
  { 13641,  4,  1,  0,  0,  0, 0x206084f804d005ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr },  // Inst #13641 = VRNDSCALEPDZ128rrikz
30243
  { 13642,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110884f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #13642 = VRNDSCALEPDZ256rmbi
30244
  { 13643,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112884f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #13643 = VRNDSCALEPDZ256rmbik
30245
  { 13644,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116884f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #13644 = VRNDSCALEPDZ256rmbikz
30246
  { 13645,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400884f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #13645 = VRNDSCALEPDZ256rmi
30247
  { 13646,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402884f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr },  // Inst #13646 = VRNDSCALEPDZ256rmik
30248
  { 13647,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406884f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr },  // Inst #13647 = VRNDSCALEPDZ256rmikz
30249
  { 13648,  3,  1,  0,  0,  0, 0x400884f804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #13648 = VRNDSCALEPDZ256rri
30250
  { 13649,  5,  1,  0,  0,  0, 0x402884f804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr },  // Inst #13649 = VRNDSCALEPDZ256rrik
30251
  { 13650,  4,  1,  0,  0,  0, 0x406884f804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr },  // Inst #13650 = VRNDSCALEPDZ256rrikz
30252
  { 13651,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x118084f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #13651 = VRNDSCALEPDZrmbi
30253
  { 13652,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a084f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #13652 = VRNDSCALEPDZrmbik
30254
  { 13653,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e084f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #13653 = VRNDSCALEPDZrmbikz
30255
  { 13654,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808084f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #13654 = VRNDSCALEPDZrmi
30256
  { 13655,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a084f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr },  // Inst #13655 = VRNDSCALEPDZrmik
30257
  { 13656,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e084f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr },  // Inst #13656 = VRNDSCALEPDZrmikz
30258
  { 13657,  3,  1,  0,  0,  0, 0x808084f804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #13657 = VRNDSCALEPDZrri
30259
  { 13658,  3,  1,  0,  0,  0, 0x118084f804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #13658 = VRNDSCALEPDZrrib
30260
  { 13659,  5,  1,  0,  0,  0, 0x11a084f804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #13659 = VRNDSCALEPDZrribk
30261
  { 13660,  4,  1,  0,  0,  0, 0x11e084f804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #13660 = VRNDSCALEPDZrribkz
30262
  { 13661,  5,  1,  0,  0,  0, 0x80a084f804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #13661 = VRNDSCALEPDZrrik
30263
  { 13662,  4,  1,  0,  0,  0, 0x80e084f804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #13662 = VRNDSCALEPDZrrikz
30264
  { 13663,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x900047804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #13663 = VRNDSCALEPSZ128rmbi
30265
  { 13664,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x920047804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #13664 = VRNDSCALEPSZ128rmbik
30266
  { 13665,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x960047804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #13665 = VRNDSCALEPSZ128rmbikz
30267
  { 13666,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000047804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr },  // Inst #13666 = VRNDSCALEPSZ128rmi
30268
  { 13667,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020047804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr },  // Inst #13667 = VRNDSCALEPSZ128rmik
30269
  { 13668,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060047804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr },  // Inst #13668 = VRNDSCALEPSZ128rmikz
30270
  { 13669,  3,  1,  0,  0,  0, 0x2000047804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr },  // Inst #13669 = VRNDSCALEPSZ128rri
30271
  { 13670,  5,  1,  0,  0,  0, 0x2020047804d005ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr },  // Inst #13670 = VRNDSCALEPSZ128rrik
30272
  { 13671,  4,  1,  0,  0,  0, 0x2060047804d005ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr },  // Inst #13671 = VRNDSCALEPSZ128rrikz
30273
  { 13672,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x908047804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #13672 = VRNDSCALEPSZ256rmbi
30274
  { 13673,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x928047804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #13673 = VRNDSCALEPSZ256rmbik
30275
  { 13674,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x968047804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #13674 = VRNDSCALEPSZ256rmbikz
30276
  { 13675,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008047804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr },  // Inst #13675 = VRNDSCALEPSZ256rmi
30277
  { 13676,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028047804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr },  // Inst #13676 = VRNDSCALEPSZ256rmik
30278
  { 13677,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068047804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr },  // Inst #13677 = VRNDSCALEPSZ256rmikz
30279
  { 13678,  3,  1,  0,  0,  0, 0x4008047804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr },  // Inst #13678 = VRNDSCALEPSZ256rri
30280
  { 13679,  5,  1,  0,  0,  0, 0x4028047804d005ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr },  // Inst #13679 = VRNDSCALEPSZ256rrik
30281
  { 13680,  4,  1,  0,  0,  0, 0x4068047804d005ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr },  // Inst #13680 = VRNDSCALEPSZ256rrikz
30282
  { 13681,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x980047804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #13681 = VRNDSCALEPSZrmbi
30283
  { 13682,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a0047804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #13682 = VRNDSCALEPSZrmbik
30284
  { 13683,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e0047804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #13683 = VRNDSCALEPSZrmbikz
30285
  { 13684,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080047804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr },  // Inst #13684 = VRNDSCALEPSZrmi
30286
  { 13685,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0047804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr },  // Inst #13685 = VRNDSCALEPSZrmik
30287
  { 13686,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0047804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr },  // Inst #13686 = VRNDSCALEPSZrmikz
30288
  { 13687,  3,  1,  0,  0,  0, 0x8080047804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #13687 = VRNDSCALEPSZrri
30289
  { 13688,  3,  1,  0,  0,  0, 0x980047804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #13688 = VRNDSCALEPSZrrib
30290
  { 13689,  5,  1,  0,  0,  0, 0x9a0047804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #13689 = VRNDSCALEPSZrribk
30291
  { 13690,  4,  1,  0,  0,  0, 0x9e0047804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #13690 = VRNDSCALEPSZrribkz
30292
  { 13691,  5,  1,  0,  0,  0, 0x80a0047804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #13691 = VRNDSCALEPSZrrik
30293
  { 13692,  4,  1,  0,  0,  0, 0x80e0047804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #13692 = VRNDSCALEPSZrrikz
30294
  { 13693,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100185f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #13693 = VRNDSCALESDm
30295
  { 13694,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x102185f804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #13694 = VRNDSCALESDmk
30296
  { 13695,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x106185f804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr },  // Inst #13695 = VRNDSCALESDmkz
30297
  { 13696,  4,  1,  0,  0,  0, 0x100185f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13696 = VRNDSCALESDr
30298
  { 13697,  4,  1,  0,  0,  0, 0x110185f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13697 = VRNDSCALESDrb
30299
  { 13698,  6,  1,  0,  0,  0, 0x112185f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13698 = VRNDSCALESDrbk
30300
  { 13699,  5,  1,  0,  0,  0, 0x116185f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13699 = VRNDSCALESDrbkz
30301
  { 13700,  6,  1,  0,  0,  0, 0x102185f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13700 = VRNDSCALESDrk
30302
  { 13701,  5,  1,  0,  0,  0, 0x106185f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13701 = VRNDSCALESDrkz
30303
  { 13702,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x801057804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #13702 = VRNDSCALESSm
30304
  { 13703,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x821057804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr },  // Inst #13703 = VRNDSCALESSmk
30305
  { 13704,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x861057804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr },  // Inst #13704 = VRNDSCALESSmkz
30306
  { 13705,  4,  1,  0,  0,  0, 0x801057804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13705 = VRNDSCALESSr
30307
  { 13706,  4,  1,  0,  0,  0, 0x901057804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13706 = VRNDSCALESSrb
30308
  { 13707,  6,  1,  0,  0,  0, 0x921057804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13707 = VRNDSCALESSrbk
30309
  { 13708,  5,  1,  0,  0,  0, 0x961057804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13708 = VRNDSCALESSrbkz
30310
  { 13709,  6,  1,  0,  0,  0, 0x821057804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13709 = VRNDSCALESSrk
30311
  { 13710,  5,  1,  0,  0,  0, 0x861057804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13710 = VRNDSCALESSrkz
30312
  { 13711,  7,  1,  0,  918,  0|(1ULL<<MCID::MayLoad), 0x4b004d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #13711 = VROUNDPDm
30313
  { 13712,  3,  1,  0,  916,  0, 0x4b004d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #13712 = VROUNDPDr
30314
  { 13713,  7,  1,  0,  919,  0|(1ULL<<MCID::MayLoad), 0x42804d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr },  // Inst #13713 = VROUNDPSm
30315
  { 13714,  3,  1,  0,  916,  0, 0x42804d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr },  // Inst #13714 = VROUNDPSr
30316
  { 13715,  8,  1,  0,  920,  0|(1ULL<<MCID::MayLoad), 0x1105a004d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #13715 = VROUNDSDm
30317
  { 13716,  4,  1,  0,  917,  0, 0x1105a004d005ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr },  // Inst #13716 = VROUNDSDr
30318
  { 13717,  4,  1,  0,  917,  0, 0x1105a004d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #13717 = VROUNDSDr_Int
30319
  { 13718,  8,  1,  0,  920,  0|(1ULL<<MCID::MayLoad), 0x11052004d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #13718 = VROUNDSSm
30320
  { 13719,  4,  1,  0,  917,  0, 0x11052004d005ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr },  // Inst #13719 = VROUNDSSr
30321
  { 13720,  4,  1,  0,  917,  0, 0x11052004d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #13720 = VROUNDSSr_Int
30322
  { 13721,  7,  1,  0,  918,  0|(1ULL<<MCID::MayLoad), 0x804b004d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr },  // Inst #13721 = VROUNDYPDm
30323
  { 13722,  3,  1,  0,  916,  0, 0x804b004d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #13722 = VROUNDYPDr
30324
  { 13723,  7,  1,  0,  919,  0|(1ULL<<MCID::MayLoad), 0x8042804d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr },  // Inst #13723 = VROUNDYPSm
30325
  { 13724,  3,  1,  0,  916,  0, 0x8042804d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr },  // Inst #13724 = VROUNDYPSr
30326
  { 13725,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000a760009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #13725 = VRSQRT14PDZ128m
30327
  { 13726,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100a760009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #13726 = VRSQRT14PDZ128mb
30328
  { 13727,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120a760009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #13727 = VRSQRT14PDZ128mbk
30329
  { 13728,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160a760009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #13728 = VRSQRT14PDZ128mbkz
30330
  { 13729,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020a760009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #13729 = VRSQRT14PDZ128mk
30331
  { 13730,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060a760009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #13730 = VRSQRT14PDZ128mkz
30332
  { 13731,  2,  1,  0,  0,  0, 0x2000a760009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #13731 = VRSQRT14PDZ128r
30333
  { 13732,  4,  1,  0,  0,  0, 0x2020a760009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #13732 = VRSQRT14PDZ128rk
30334
  { 13733,  3,  1,  0,  0,  0, 0x2060a760009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #13733 = VRSQRT14PDZ128rkz
30335
  { 13734,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008a760009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #13734 = VRSQRT14PDZ256m
30336
  { 13735,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108a760009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #13735 = VRSQRT14PDZ256mb
30337
  { 13736,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128a760009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #13736 = VRSQRT14PDZ256mbk
30338
  { 13737,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168a760009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #13737 = VRSQRT14PDZ256mbkz
30339
  { 13738,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028a760009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #13738 = VRSQRT14PDZ256mk
30340
  { 13739,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068a760009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #13739 = VRSQRT14PDZ256mkz
30341
  { 13740,  2,  1,  0,  0,  0, 0x4008a760009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #13740 = VRSQRT14PDZ256r
30342
  { 13741,  4,  1,  0,  0,  0, 0x4028a760009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #13741 = VRSQRT14PDZ256rk
30343
  { 13742,  3,  1,  0,  0,  0, 0x4068a760009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #13742 = VRSQRT14PDZ256rkz
30344
  { 13743,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080a760009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13743 = VRSQRT14PDZm
30345
  { 13744,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180a760009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13744 = VRSQRT14PDZmb
30346
  { 13745,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0a760009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #13745 = VRSQRT14PDZmbk
30347
  { 13746,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0a760009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #13746 = VRSQRT14PDZmbkz
30348
  { 13747,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0a760009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #13747 = VRSQRT14PDZmk
30349
  { 13748,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0a760009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #13748 = VRSQRT14PDZmkz
30350
  { 13749,  2,  1,  0,  0,  0, 0x8080a760009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13749 = VRSQRT14PDZr
30351
  { 13750,  4,  1,  0,  0,  0, 0x80a0a760009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #13750 = VRSQRT14PDZrk
30352
  { 13751,  3,  1,  0,  0,  0, 0x80e0a760009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #13751 = VRSQRT14PDZrkz
30353
  { 13752,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20002760009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #13752 = VRSQRT14PSZ128m
30354
  { 13753,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9002760009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #13753 = VRSQRT14PSZ128mb
30355
  { 13754,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9202760009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #13754 = VRSQRT14PSZ128mbk
30356
  { 13755,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9602760009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #13755 = VRSQRT14PSZ128mbkz
30357
  { 13756,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20202760009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #13756 = VRSQRT14PSZ128mk
30358
  { 13757,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20602760009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #13757 = VRSQRT14PSZ128mkz
30359
  { 13758,  2,  1,  0,  0,  0, 0x20002760009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #13758 = VRSQRT14PSZ128r
30360
  { 13759,  4,  1,  0,  0,  0, 0x20202760009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #13759 = VRSQRT14PSZ128rk
30361
  { 13760,  3,  1,  0,  0,  0, 0x20602760009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #13760 = VRSQRT14PSZ128rkz
30362
  { 13761,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40082760009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #13761 = VRSQRT14PSZ256m
30363
  { 13762,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9082760009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #13762 = VRSQRT14PSZ256mb
30364
  { 13763,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9282760009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #13763 = VRSQRT14PSZ256mbk
30365
  { 13764,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9682760009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #13764 = VRSQRT14PSZ256mbkz
30366
  { 13765,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40282760009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #13765 = VRSQRT14PSZ256mk
30367
  { 13766,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40682760009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #13766 = VRSQRT14PSZ256mkz
30368
  { 13767,  2,  1,  0,  0,  0, 0x40082760009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #13767 = VRSQRT14PSZ256r
30369
  { 13768,  4,  1,  0,  0,  0, 0x40282760009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #13768 = VRSQRT14PSZ256rk
30370
  { 13769,  3,  1,  0,  0,  0, 0x40682760009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #13769 = VRSQRT14PSZ256rkz
30371
  { 13770,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80802760009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13770 = VRSQRT14PSZm
30372
  { 13771,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9802760009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13771 = VRSQRT14PSZmb
30373
  { 13772,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a02760009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #13772 = VRSQRT14PSZmbk
30374
  { 13773,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e02760009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #13773 = VRSQRT14PSZmbkz
30375
  { 13774,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a02760009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #13774 = VRSQRT14PSZmk
30376
  { 13775,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e02760009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #13775 = VRSQRT14PSZmkz
30377
  { 13776,  2,  1,  0,  0,  0, 0x80802760009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13776 = VRSQRT14PSZr
30378
  { 13777,  4,  1,  0,  0,  0, 0x80a02760009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #13777 = VRSQRT14PSZrk
30379
  { 13778,  3,  1,  0,  0,  0, 0x80e02760009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #13778 = VRSQRT14PSZrkz
30380
  { 13779,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1001a7e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13779 = VRSQRT14SDrm
30381
  { 13780,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1021a7e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #13780 = VRSQRT14SDrmk
30382
  { 13781,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1061a7e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #13781 = VRSQRT14SDrmkz
30383
  { 13782,  3,  1,  0,  0,  0, 0x1001a7e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13782 = VRSQRT14SDrr
30384
  { 13783,  5,  1,  0,  0,  0, 0x1021a7e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13783 = VRSQRT14SDrrk
30385
  { 13784,  4,  1,  0,  0,  0, 0x1061a7e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13784 = VRSQRT14SDrrkz
30386
  { 13785,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80127e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13785 = VRSQRT14SSrm
30387
  { 13786,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82127e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #13786 = VRSQRT14SSrmk
30388
  { 13787,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x86127e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #13787 = VRSQRT14SSrmkz
30389
  { 13788,  3,  1,  0,  0,  0, 0x80127e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13788 = VRSQRT14SSrr
30390
  { 13789,  5,  1,  0,  0,  0, 0x82127e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13789 = VRSQRT14SSrrk
30391
  { 13790,  4,  1,  0,  0,  0, 0x86127e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13790 = VRSQRT14SSrrkz
30392
  { 13791,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080e660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13791 = VRSQRT28PDm
30393
  { 13792,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180e660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13792 = VRSQRT28PDmb
30394
  { 13793,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0e660009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #13793 = VRSQRT28PDmbk
30395
  { 13794,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0e660009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #13794 = VRSQRT28PDmbkz
30396
  { 13795,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0e660009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #13795 = VRSQRT28PDmk
30397
  { 13796,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0e660009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #13796 = VRSQRT28PDmkz
30398
  { 13797,  2,  1,  0,  0,  0, 0x8080e660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13797 = VRSQRT28PDr
30399
  { 13798,  2,  1,  0,  0,  0, 0x1180e660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13798 = VRSQRT28PDrb
30400
  { 13799,  4,  1,  0,  0,  0, 0x11a0e660009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #13799 = VRSQRT28PDrbk
30401
  { 13800,  3,  1,  0,  0,  0, 0x11e0e660009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #13800 = VRSQRT28PDrbkz
30402
  { 13801,  4,  1,  0,  0,  0, 0x80a0e660009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #13801 = VRSQRT28PDrk
30403
  { 13802,  3,  1,  0,  0,  0, 0x80e0e660009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #13802 = VRSQRT28PDrkz
30404
  { 13803,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80806660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13803 = VRSQRT28PSm
30405
  { 13804,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9806660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #13804 = VRSQRT28PSmb
30406
  { 13805,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a06660009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #13805 = VRSQRT28PSmbk
30407
  { 13806,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e06660009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #13806 = VRSQRT28PSmbkz
30408
  { 13807,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a06660009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #13807 = VRSQRT28PSmk
30409
  { 13808,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e06660009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #13808 = VRSQRT28PSmkz
30410
  { 13809,  2,  1,  0,  0,  0, 0x80806660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13809 = VRSQRT28PSr
30411
  { 13810,  2,  1,  0,  0,  0, 0x9806660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #13810 = VRSQRT28PSrb
30412
  { 13811,  4,  1,  0,  0,  0, 0x9a06660009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #13811 = VRSQRT28PSrbk
30413
  { 13812,  3,  1,  0,  0,  0, 0x9e06660009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #13812 = VRSQRT28PSrbkz
30414
  { 13813,  4,  1,  0,  0,  0, 0x80a06660009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #13813 = VRSQRT28PSrk
30415
  { 13814,  3,  1,  0,  0,  0, 0x80e06660009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #13814 = VRSQRT28PSrkz
30416
  { 13815,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1001e6e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13815 = VRSQRT28SDm
30417
  { 13816,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1021e6e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #13816 = VRSQRT28SDmk
30418
  { 13817,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1061e6e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #13817 = VRSQRT28SDmkz
30419
  { 13818,  3,  1,  0,  0,  0, 0x1001e6e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13818 = VRSQRT28SDr
30420
  { 13819,  3,  1,  0,  0,  0, 0x1101e6e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13819 = VRSQRT28SDrb
30421
  { 13820,  5,  1,  0,  0,  0, 0x1121e6e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13820 = VRSQRT28SDrbk
30422
  { 13821,  4,  1,  0,  0,  0, 0x1161e6e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13821 = VRSQRT28SDrbkz
30423
  { 13822,  5,  1,  0,  0,  0, 0x1021e6e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13822 = VRSQRT28SDrk
30424
  { 13823,  4,  1,  0,  0,  0, 0x1061e6e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13823 = VRSQRT28SDrkz
30425
  { 13824,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80166e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13824 = VRSQRT28SSm
30426
  { 13825,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82166e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #13825 = VRSQRT28SSmk
30427
  { 13826,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x86166e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #13826 = VRSQRT28SSmkz
30428
  { 13827,  3,  1,  0,  0,  0, 0x80166e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13827 = VRSQRT28SSr
30429
  { 13828,  3,  1,  0,  0,  0, 0x90166e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13828 = VRSQRT28SSrb
30430
  { 13829,  5,  1,  0,  0,  0, 0x92166e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13829 = VRSQRT28SSrbk
30431
  { 13830,  4,  1,  0,  0,  0, 0x96166e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13830 = VRSQRT28SSrbkz
30432
  { 13831,  5,  1,  0,  0,  0, 0x82166e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13831 = VRSQRT28SSrk
30433
  { 13832,  4,  1,  0,  0,  0, 0x86166e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13832 = VRSQRT28SSrkz
30434
  { 13833,  6,  1,  0,  940,  0|(1ULL<<MCID::MayLoad), 0x82928004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #13833 = VRSQRTPSYm
30435
  { 13834,  2,  1,  0,  939,  0, 0x82928004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #13834 = VRSQRTPSYr
30436
  { 13835,  6,  1,  0,  936,  0|(1ULL<<MCID::MayLoad), 0x2928004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #13835 = VRSQRTPSm
30437
  { 13836,  2,  1,  0,  932,  0, 0x2928004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #13836 = VRSQRTPSr
30438
  { 13837,  7,  1,  0,  937,  0|(1ULL<<MCID::MayLoad), 0x112928005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #13837 = VRSQRTSSm
30439
  { 13838,  7,  1,  0,  938,  0|(1ULL<<MCID::MayLoad), 0x112920005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #13838 = VRSQRTSSm_Int
30440
  { 13839,  3,  1,  0,  933,  0, 0x112928005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #13839 = VRSQRTSSr
30441
  { 13840,  3,  1,  0,  935,  0, 0x112920005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #13840 = VRSQRTSSr_Int
30442
  { 13841,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20019660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13841 = VSCALEFPDZ128rm
30443
  { 13842,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11019660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13842 = VSCALEFPDZ128rmb
30444
  { 13843,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11219660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #13843 = VSCALEFPDZ128rmbk
30445
  { 13844,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11619660009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #13844 = VSCALEFPDZ128rmbkz
30446
  { 13845,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20219660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #13845 = VSCALEFPDZ128rmk
30447
  { 13846,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20619660009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #13846 = VSCALEFPDZ128rmkz
30448
  { 13847,  3,  1,  0,  0,  0, 0x20019660009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13847 = VSCALEFPDZ128rr
30449
  { 13848,  5,  1,  0,  0,  0, 0x20219660009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #13848 = VSCALEFPDZ128rrk
30450
  { 13849,  4,  1,  0,  0,  0, 0x20619660009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #13849 = VSCALEFPDZ128rrkz
30451
  { 13850,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40099660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13850 = VSCALEFPDZ256rm
30452
  { 13851,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11099660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13851 = VSCALEFPDZ256rmb
30453
  { 13852,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11299660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #13852 = VSCALEFPDZ256rmbk
30454
  { 13853,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11699660009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #13853 = VSCALEFPDZ256rmbkz
30455
  { 13854,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40299660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #13854 = VSCALEFPDZ256rmk
30456
  { 13855,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40699660009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #13855 = VSCALEFPDZ256rmkz
30457
  { 13856,  3,  1,  0,  0,  0, 0x40099660009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13856 = VSCALEFPDZ256rr
30458
  { 13857,  5,  1,  0,  0,  0, 0x40299660009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #13857 = VSCALEFPDZ256rrk
30459
  { 13858,  4,  1,  0,  0,  0, 0x40699660009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #13858 = VSCALEFPDZ256rrkz
30460
  { 13859,  4,  1,  0,  0,  0, 0x411819660009005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #13859 = VSCALEFPDZrb
30461
  { 13860,  6,  1,  0,  0,  0, 0x411a19660009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #13860 = VSCALEFPDZrbk
30462
  { 13861,  5,  1,  0,  0,  0, 0x411e19660009005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr },  // Inst #13861 = VSCALEFPDZrbkz
30463
  { 13862,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80819660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13862 = VSCALEFPDZrm
30464
  { 13863,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11819660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13863 = VSCALEFPDZrmb
30465
  { 13864,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a19660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #13864 = VSCALEFPDZrmbk
30466
  { 13865,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e19660009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #13865 = VSCALEFPDZrmbkz
30467
  { 13866,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a19660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #13866 = VSCALEFPDZrmk
30468
  { 13867,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e19660009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #13867 = VSCALEFPDZrmkz
30469
  { 13868,  3,  1,  0,  0,  0, 0x80819660009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13868 = VSCALEFPDZrr
30470
  { 13869,  5,  1,  0,  0,  0, 0x80a19660009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #13869 = VSCALEFPDZrrk
30471
  { 13870,  4,  1,  0,  0,  0, 0x80e19660009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #13870 = VSCALEFPDZrrkz
30472
  { 13871,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20011660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13871 = VSCALEFPSZ128rm
30473
  { 13872,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9011660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13872 = VSCALEFPSZ128rmb
30474
  { 13873,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9211660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #13873 = VSCALEFPSZ128rmbk
30475
  { 13874,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9611660009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #13874 = VSCALEFPSZ128rmbkz
30476
  { 13875,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20211660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #13875 = VSCALEFPSZ128rmk
30477
  { 13876,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20611660009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #13876 = VSCALEFPSZ128rmkz
30478
  { 13877,  3,  1,  0,  0,  0, 0x20011660009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13877 = VSCALEFPSZ128rr
30479
  { 13878,  5,  1,  0,  0,  0, 0x20211660009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #13878 = VSCALEFPSZ128rrk
30480
  { 13879,  4,  1,  0,  0,  0, 0x20611660009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #13879 = VSCALEFPSZ128rrkz
30481
  { 13880,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40091660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13880 = VSCALEFPSZ256rm
30482
  { 13881,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9091660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #13881 = VSCALEFPSZ256rmb
30483
  { 13882,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9291660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #13882 = VSCALEFPSZ256rmbk
30484
  { 13883,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9691660009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #13883 = VSCALEFPSZ256rmbkz
30485
  { 13884,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40291660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #13884 = VSCALEFPSZ256rmk
30486
  { 13885,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40691660009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #13885 = VSCALEFPSZ256rmkz
30487
  { 13886,  3,  1,  0,  0,  0, 0x40091660009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #13886 = VSCALEFPSZ256rr
30488
  { 13887,  5,  1,  0,  0,  0, 0x40291660009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #13887 = VSCALEFPSZ256rrk
30489
  { 13888,  4,  1,  0,  0,  0, 0x40691660009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #13888 = VSCALEFPSZ256rrkz
30490
  { 13889,  4,  1,  0,  0,  0, 0x409811660009005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #13889 = VSCALEFPSZrb
30491
  { 13890,  6,  1,  0,  0,  0, 0x409a11660009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #13890 = VSCALEFPSZrbk
30492
  { 13891,  5,  1,  0,  0,  0, 0x409e11660009005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr },  // Inst #13891 = VSCALEFPSZrbkz
30493
  { 13892,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80811660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13892 = VSCALEFPSZrm
30494
  { 13893,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9811660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #13893 = VSCALEFPSZrmb
30495
  { 13894,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a11660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #13894 = VSCALEFPSZrmbk
30496
  { 13895,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e11660009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #13895 = VSCALEFPSZrmbkz
30497
  { 13896,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a11660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #13896 = VSCALEFPSZrmk
30498
  { 13897,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e11660009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #13897 = VSCALEFPSZrmkz
30499
  { 13898,  3,  1,  0,  0,  0, 0x80811660009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #13898 = VSCALEFPSZrr
30500
  { 13899,  5,  1,  0,  0,  0, 0x80a11660009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #13899 = VSCALEFPSZrrk
30501
  { 13900,  4,  1,  0,  0,  0, 0x80e11660009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #13900 = VSCALEFPSZrrkz
30502
  { 13901,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x100196e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13901 = VSCALEFSDZ128rm
30503
  { 13902,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x102196e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #13902 = VSCALEFSDZ128rmk
30504
  { 13903,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x106196e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #13903 = VSCALEFSDZ128rmkz
30505
  { 13904,  3,  1,  0,  0,  0, 0x100196e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13904 = VSCALEFSDZ128rr
30506
  { 13905,  4,  1,  0,  0,  0, 0x4110196e0009005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13905 = VSCALEFSDZ128rrb
30507
  { 13906,  6,  1,  0,  0,  0, 0x4112196e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13906 = VSCALEFSDZ128rrbk
30508
  { 13907,  5,  1,  0,  0,  0, 0x4116196e0009005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13907 = VSCALEFSDZ128rrbkz
30509
  { 13908,  5,  1,  0,  0,  0, 0x102196e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13908 = VSCALEFSDZ128rrk
30510
  { 13909,  4,  1,  0,  0,  0, 0x106196e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13909 = VSCALEFSDZ128rrkz
30511
  { 13910,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80116e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #13910 = VSCALEFSSZ128rm
30512
  { 13911,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x82116e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #13911 = VSCALEFSSZ128rmk
30513
  { 13912,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x86116e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #13912 = VSCALEFSSZ128rmkz
30514
  { 13913,  3,  1,  0,  0,  0, 0x80116e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #13913 = VSCALEFSSZ128rr
30515
  { 13914,  4,  1,  0,  0,  0, 0x4090116e0009005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #13914 = VSCALEFSSZ128rrb
30516
  { 13915,  6,  1,  0,  0,  0, 0x4092116e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #13915 = VSCALEFSSZ128rrbk
30517
  { 13916,  5,  1,  0,  0,  0, 0x4096116e0009005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #13916 = VSCALEFSSZ128rrbkz
30518
  { 13917,  5,  1,  0,  0,  0, 0x82116e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #13917 = VSCALEFSSZ128rrk
30519
  { 13918,  4,  1,  0,  0,  0, 0x86116e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #13918 = VSCALEFSSZ128rrkz
30520
  { 13919,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1020d170009004ULL, nullptr, nullptr, OperandInfo899, -1 ,nullptr },  // Inst #13919 = VSCATTERDPDZ128mr
30521
  { 13920,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1028d170009004ULL, nullptr, nullptr, OperandInfo900, -1 ,nullptr },  // Inst #13920 = VSCATTERDPDZ256mr
30522
  { 13921,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10a0d170009004ULL, nullptr, nullptr, OperandInfo901, -1 ,nullptr },  // Inst #13921 = VSCATTERDPDZmr
30523
  { 13922,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8205168009004ULL, nullptr, nullptr, OperandInfo896, -1 ,nullptr },  // Inst #13922 = VSCATTERDPSZ128mr
30524
  { 13923,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8285168009004ULL, nullptr, nullptr, OperandInfo897, -1 ,nullptr },  // Inst #13923 = VSCATTERDPSZ256mr
30525
  { 13924,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8a05168009004ULL, nullptr, nullptr, OperandInfo898, -1 ,nullptr },  // Inst #13924 = VSCATTERDPSZmr
30526
  { 13925,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0e37800901dULL, nullptr, nullptr, OperandInfo599, -1 ,nullptr },  // Inst #13925 = VSCATTERPF0DPDm
30527
  { 13926,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0637800901dULL, nullptr, nullptr, OperandInfo600, -1 ,nullptr },  // Inst #13926 = VSCATTERPF0DPSm
30528
  { 13927,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a0e3f800901dULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr },  // Inst #13927 = VSCATTERPF0QPDm
30529
  { 13928,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a063f800901dULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr },  // Inst #13928 = VSCATTERPF0QPSm
30530
  { 13929,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0e37800901eULL, nullptr, nullptr, OperandInfo599, -1 ,nullptr },  // Inst #13929 = VSCATTERPF1DPDm
30531
  { 13930,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0637800901eULL, nullptr, nullptr, OperandInfo600, -1 ,nullptr },  // Inst #13930 = VSCATTERPF1DPSm
30532
  { 13931,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a0e3f800901eULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr },  // Inst #13931 = VSCATTERPF1QPDm
30533
  { 13932,  6,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a063f800901eULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr },  // Inst #13932 = VSCATTERPF1QPSm
30534
  { 13933,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1020d1f0009004ULL, nullptr, nullptr, OperandInfo899, -1 ,nullptr },  // Inst #13933 = VSCATTERQPDZ128mr
30535
  { 13934,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x1028d1f0009004ULL, nullptr, nullptr, OperandInfo904, -1 ,nullptr },  // Inst #13934 = VSCATTERQPDZ256mr
30536
  { 13935,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x10a0d1f0009004ULL, nullptr, nullptr, OperandInfo905, -1 ,nullptr },  // Inst #13935 = VSCATTERQPDZmr
30537
  { 13936,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x82051e8009004ULL, nullptr, nullptr, OperandInfo896, -1 ,nullptr },  // Inst #13936 = VSCATTERQPSZ128mr
30538
  { 13937,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x82851e8009004ULL, nullptr, nullptr, OperandInfo902, -1 ,nullptr },  // Inst #13937 = VSCATTERQPSZ256mr
30539
  { 13938,  8,  1,  0,  0,  0|(1ULL<<MCID::MayStore), 0x8a051e8009004ULL, nullptr, nullptr, OperandInfo903, -1 ,nullptr },  // Inst #13938 = VSCATTERQPSZmr
30540
  { 13939,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90911f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13939 = VSHUFF32X4Z256rmbi
30541
  { 13940,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92911f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #13940 = VSHUFF32X4Z256rmbik
30542
  { 13941,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96911f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #13941 = VSHUFF32X4Z256rmbikz
30543
  { 13942,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400911f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13942 = VSHUFF32X4Z256rmi
30544
  { 13943,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402911f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #13943 = VSHUFF32X4Z256rmik
30545
  { 13944,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406911f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #13944 = VSHUFF32X4Z256rmikz
30546
  { 13945,  4,  1,  0,  0,  0, 0x400911f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #13945 = VSHUFF32X4Z256rri
30547
  { 13946,  6,  1,  0,  0,  0, 0x402911f804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr },  // Inst #13946 = VSHUFF32X4Z256rrik
30548
  { 13947,  5,  1,  0,  0,  0, 0x406911f804d005ULL, nullptr, nullptr, OperandInfo336, -1 ,nullptr },  // Inst #13947 = VSHUFF32X4Z256rrikz
30549
  { 13948,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98111f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #13948 = VSHUFF32X4Zrmbi
30550
  { 13949,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a111f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #13949 = VSHUFF32X4Zrmbik
30551
  { 13950,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e111f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #13950 = VSHUFF32X4Zrmbikz
30552
  { 13951,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808111f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #13951 = VSHUFF32X4Zrmi
30553
  { 13952,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a111f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #13952 = VSHUFF32X4Zrmik
30554
  { 13953,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e111f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #13953 = VSHUFF32X4Zrmikz
30555
  { 13954,  4,  1,  0,  0,  0, 0x808111f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #13954 = VSHUFF32X4Zrri
30556
  { 13955,  6,  1,  0,  0,  0, 0x80a111f804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #13955 = VSHUFF32X4Zrrik
30557
  { 13956,  5,  1,  0,  0,  0, 0x80e111f804d005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr },  // Inst #13956 = VSHUFF32X4Zrrikz
30558
  { 13957,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x110991f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13957 = VSHUFF64X2Z256rmbi
30559
  { 13958,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x112991f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #13958 = VSHUFF64X2Z256rmbik
30560
  { 13959,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x116991f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #13959 = VSHUFF64X2Z256rmbikz
30561
  { 13960,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400991f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13960 = VSHUFF64X2Z256rmi
30562
  { 13961,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402991f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #13961 = VSHUFF64X2Z256rmik
30563
  { 13962,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406991f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #13962 = VSHUFF64X2Z256rmikz
30564
  { 13963,  4,  1,  0,  0,  0, 0x400991f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #13963 = VSHUFF64X2Z256rri
30565
  { 13964,  6,  1,  0,  0,  0, 0x402991f804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr },  // Inst #13964 = VSHUFF64X2Z256rrik
30566
  { 13965,  5,  1,  0,  0,  0, 0x406991f804d005ULL, nullptr, nullptr, OperandInfo347, -1 ,nullptr },  // Inst #13965 = VSHUFF64X2Z256rrikz
30567
  { 13966,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x118191f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #13966 = VSHUFF64X2Zrmbi
30568
  { 13967,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a191f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #13967 = VSHUFF64X2Zrmbik
30569
  { 13968,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e191f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #13968 = VSHUFF64X2Zrmbikz
30570
  { 13969,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808191f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #13969 = VSHUFF64X2Zrmi
30571
  { 13970,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a191f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #13970 = VSHUFF64X2Zrmik
30572
  { 13971,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e191f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #13971 = VSHUFF64X2Zrmikz
30573
  { 13972,  4,  1,  0,  0,  0, 0x808191f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #13972 = VSHUFF64X2Zrri
30574
  { 13973,  6,  1,  0,  0,  0, 0x80a191f804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #13973 = VSHUFF64X2Zrrik
30575
  { 13974,  5,  1,  0,  0,  0, 0x80e191f804d005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr },  // Inst #13974 = VSHUFF64X2Zrrikz
30576
  { 13975,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90921f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13975 = VSHUFI32X4Z256rmbi
30577
  { 13976,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92921f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #13976 = VSHUFI32X4Z256rmbik
30578
  { 13977,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96921f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #13977 = VSHUFI32X4Z256rmbikz
30579
  { 13978,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400921f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13978 = VSHUFI32X4Z256rmi
30580
  { 13979,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402921f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #13979 = VSHUFI32X4Z256rmik
30581
  { 13980,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406921f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #13980 = VSHUFI32X4Z256rmikz
30582
  { 13981,  4,  1,  0,  0,  0, 0x400921f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #13981 = VSHUFI32X4Z256rri
30583
  { 13982,  6,  1,  0,  0,  0, 0x402921f804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr },  // Inst #13982 = VSHUFI32X4Z256rrik
30584
  { 13983,  5,  1,  0,  0,  0, 0x406921f804d005ULL, nullptr, nullptr, OperandInfo336, -1 ,nullptr },  // Inst #13983 = VSHUFI32X4Z256rrikz
30585
  { 13984,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98121f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #13984 = VSHUFI32X4Zrmbi
30586
  { 13985,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a121f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #13985 = VSHUFI32X4Zrmbik
30587
  { 13986,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e121f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #13986 = VSHUFI32X4Zrmbikz
30588
  { 13987,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808121f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #13987 = VSHUFI32X4Zrmi
30589
  { 13988,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a121f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #13988 = VSHUFI32X4Zrmik
30590
  { 13989,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e121f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #13989 = VSHUFI32X4Zrmikz
30591
  { 13990,  4,  1,  0,  0,  0, 0x808121f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #13990 = VSHUFI32X4Zrri
30592
  { 13991,  6,  1,  0,  0,  0, 0x80a121f804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #13991 = VSHUFI32X4Zrrik
30593
  { 13992,  5,  1,  0,  0,  0, 0x80e121f804d005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr },  // Inst #13992 = VSHUFI32X4Zrrikz
30594
  { 13993,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109a1f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13993 = VSHUFI64X2Z256rmbi
30595
  { 13994,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129a1f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #13994 = VSHUFI64X2Z256rmbik
30596
  { 13995,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169a1f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #13995 = VSHUFI64X2Z256rmbikz
30597
  { 13996,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009a1f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #13996 = VSHUFI64X2Z256rmi
30598
  { 13997,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029a1f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #13997 = VSHUFI64X2Z256rmik
30599
  { 13998,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069a1f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #13998 = VSHUFI64X2Z256rmikz
30600
  { 13999,  4,  1,  0,  0,  0, 0x4009a1f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #13999 = VSHUFI64X2Z256rri
30601
  { 14000,  6,  1,  0,  0,  0, 0x4029a1f804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr },  // Inst #14000 = VSHUFI64X2Z256rrik
30602
  { 14001,  5,  1,  0,  0,  0, 0x4069a1f804d005ULL, nullptr, nullptr, OperandInfo347, -1 ,nullptr },  // Inst #14001 = VSHUFI64X2Z256rrikz
30603
  { 14002,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181a1f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #14002 = VSHUFI64X2Zrmbi
30604
  { 14003,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1a1f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #14003 = VSHUFI64X2Zrmbik
30605
  { 14004,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1a1f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #14004 = VSHUFI64X2Zrmbikz
30606
  { 14005,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081a1f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #14005 = VSHUFI64X2Zrmi
30607
  { 14006,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1a1f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #14006 = VSHUFI64X2Zrmik
30608
  { 14007,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1a1f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #14007 = VSHUFI64X2Zrmikz
30609
  { 14008,  4,  1,  0,  0,  0, 0x8081a1f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #14008 = VSHUFI64X2Zrri
30610
  { 14009,  6,  1,  0,  0,  0, 0x80a1a1f804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #14009 = VSHUFI64X2Zrrik
30611
  { 14010,  5,  1,  0,  0,  0, 0x80e1a1f804d005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr },  // Inst #14010 = VSHUFI64X2Zrrikz
30612
  { 14011,  8,  1,  0,  491,  0|(1ULL<<MCID::MayLoad), 0x96330045006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #14011 = VSHUFPDYrmi
30613
  { 14012,  4,  1,  0,  492,  0, 0x96330045005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #14012 = VSHUFPDYrri
30614
  { 14013,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101e378045006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #14013 = VSHUFPDZ128rmbi
30615
  { 14014,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121e378045006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #14014 = VSHUFPDZ128rmbik
30616
  { 14015,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161e378045006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr },  // Inst #14015 = VSHUFPDZ128rmbikz
30617
  { 14016,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001e378045006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #14016 = VSHUFPDZ128rmi
30618
  { 14017,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021e378045006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr },  // Inst #14017 = VSHUFPDZ128rmik
30619
  { 14018,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061e378045006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr },  // Inst #14018 = VSHUFPDZ128rmikz
30620
  { 14019,  4,  1,  0,  0,  0, 0x2001e378045005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #14019 = VSHUFPDZ128rri
30621
  { 14020,  6,  1,  0,  0,  0, 0x2021e378045005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr },  // Inst #14020 = VSHUFPDZ128rrik
30622
  { 14021,  5,  1,  0,  0,  0, 0x2061e378045005ULL, nullptr, nullptr, OperandInfo343, -1 ,nullptr },  // Inst #14021 = VSHUFPDZ128rrikz
30623
  { 14022,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109e378045006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #14022 = VSHUFPDZ256rmbi
30624
  { 14023,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129e378045006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #14023 = VSHUFPDZ256rmbik
30625
  { 14024,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169e378045006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #14024 = VSHUFPDZ256rmbikz
30626
  { 14025,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009e378045006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #14025 = VSHUFPDZ256rmi
30627
  { 14026,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029e378045006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr },  // Inst #14026 = VSHUFPDZ256rmik
30628
  { 14027,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069e378045006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr },  // Inst #14027 = VSHUFPDZ256rmikz
30629
  { 14028,  4,  1,  0,  0,  0, 0x4009e378045005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #14028 = VSHUFPDZ256rri
30630
  { 14029,  6,  1,  0,  0,  0, 0x4029e378045005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr },  // Inst #14029 = VSHUFPDZ256rrik
30631
  { 14030,  5,  1,  0,  0,  0, 0x4069e378045005ULL, nullptr, nullptr, OperandInfo347, -1 ,nullptr },  // Inst #14030 = VSHUFPDZ256rrikz
30632
  { 14031,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181e378045006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #14031 = VSHUFPDZrmbi
30633
  { 14032,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1e378045006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #14032 = VSHUFPDZrmbik
30634
  { 14033,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1e378045006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #14033 = VSHUFPDZrmbikz
30635
  { 14034,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081e378045006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #14034 = VSHUFPDZrmi
30636
  { 14035,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1e378045006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr },  // Inst #14035 = VSHUFPDZrmik
30637
  { 14036,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1e378045006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr },  // Inst #14036 = VSHUFPDZrmikz
30638
  { 14037,  4,  1,  0,  0,  0, 0x8081e378045005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #14037 = VSHUFPDZrri
30639
  { 14038,  6,  1,  0,  0,  0, 0x80a1e378045005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #14038 = VSHUFPDZrrik
30640
  { 14039,  5,  1,  0,  0,  0, 0x80e1e378045005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr },  // Inst #14039 = VSHUFPDZrrikz
30641
  { 14040,  8,  1,  0,  491,  0|(1ULL<<MCID::MayLoad), 0x16330045006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #14040 = VSHUFPDrmi
30642
  { 14041,  4,  1,  0,  492,  0, 0x16330045005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #14041 = VSHUFPDrri
30643
  { 14042,  8,  1,  0,  491,  0|(1ULL<<MCID::MayLoad), 0x96328044806ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr },  // Inst #14042 = VSHUFPSYrmi
30644
  { 14043,  4,  1,  0,  492,  0, 0x96328044805ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr },  // Inst #14043 = VSHUFPSYrri
30645
  { 14044,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9016378044806ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #14044 = VSHUFPSZ128rmbi
30646
  { 14045,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9216378044806ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #14045 = VSHUFPSZ128rmbik
30647
  { 14046,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9616378044806ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr },  // Inst #14046 = VSHUFPSZ128rmbikz
30648
  { 14047,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20016378044806ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr },  // Inst #14047 = VSHUFPSZ128rmi
30649
  { 14048,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20216378044806ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr },  // Inst #14048 = VSHUFPSZ128rmik
30650
  { 14049,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20616378044806ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr },  // Inst #14049 = VSHUFPSZ128rmikz
30651
  { 14050,  4,  1,  0,  0,  0, 0x20016378044805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #14050 = VSHUFPSZ128rri
30652
  { 14051,  6,  1,  0,  0,  0, 0x20216378044805ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr },  // Inst #14051 = VSHUFPSZ128rrik
30653
  { 14052,  5,  1,  0,  0,  0, 0x20616378044805ULL, nullptr, nullptr, OperandInfo330, -1 ,nullptr },  // Inst #14052 = VSHUFPSZ128rrikz
30654
  { 14053,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9096378044806ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #14053 = VSHUFPSZ256rmbi
30655
  { 14054,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9296378044806ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #14054 = VSHUFPSZ256rmbik
30656
  { 14055,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9696378044806ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #14055 = VSHUFPSZ256rmbikz
30657
  { 14056,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40096378044806ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr },  // Inst #14056 = VSHUFPSZ256rmi
30658
  { 14057,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40296378044806ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr },  // Inst #14057 = VSHUFPSZ256rmik
30659
  { 14058,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40696378044806ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr },  // Inst #14058 = VSHUFPSZ256rmikz
30660
  { 14059,  4,  1,  0,  0,  0, 0x40096378044805ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr },  // Inst #14059 = VSHUFPSZ256rri
30661
  { 14060,  6,  1,  0,  0,  0, 0x40296378044805ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr },  // Inst #14060 = VSHUFPSZ256rrik
30662
  { 14061,  5,  1,  0,  0,  0, 0x40696378044805ULL, nullptr, nullptr, OperandInfo336, -1 ,nullptr },  // Inst #14061 = VSHUFPSZ256rrikz
30663
  { 14062,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9816378044806ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #14062 = VSHUFPSZrmbi
30664
  { 14063,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a16378044806ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #14063 = VSHUFPSZrmbik
30665
  { 14064,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e16378044806ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #14064 = VSHUFPSZrmbikz
30666
  { 14065,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80816378044806ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr },  // Inst #14065 = VSHUFPSZrmi
30667
  { 14066,  10, 1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a16378044806ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr },  // Inst #14066 = VSHUFPSZrmik
30668
  { 14067,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e16378044806ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr },  // Inst #14067 = VSHUFPSZrmikz
30669
  { 14068,  4,  1,  0,  0,  0, 0x80816378044805ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #14068 = VSHUFPSZrri
30670
  { 14069,  6,  1,  0,  0,  0, 0x80a16378044805ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #14069 = VSHUFPSZrrik
30671
  { 14070,  5,  1,  0,  0,  0, 0x80e16378044805ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr },  // Inst #14070 = VSHUFPSZrrikz
30672
  { 14071,  8,  1,  0,  491,  0|(1ULL<<MCID::MayLoad), 0x16328044806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr },  // Inst #14071 = VSHUFPSrmi
30673
  { 14072,  4,  1,  0,  492,  0, 0x16328044805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr },  // Inst #14072 = VSHUFPSrri
30674
  { 14073,  6,  1,  0,  931,  0|(1ULL<<MCID::MayLoad), 0x828b0005006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #14073 = VSQRTPDYm
30675
  { 14074,  2,  1,  0,  930,  0, 0x828b0005005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #14074 = VSQRTPDYr
30676
  { 14075,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2000a8e0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #14075 = VSQRTPDZ128m
30677
  { 14076,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1100a8e0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #14076 = VSQRTPDZ128mb
30678
  { 14077,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1120a8e0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #14077 = VSQRTPDZ128mbk
30679
  { 14078,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1160a8e0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #14078 = VSQRTPDZ128mbkz
30680
  { 14079,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2020a8e0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr },  // Inst #14079 = VSQRTPDZ128mk
30681
  { 14080,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2060a8e0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr },  // Inst #14080 = VSQRTPDZ128mkz
30682
  { 14081,  2,  1,  0,  0,  0, 0x2000a8e0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #14081 = VSQRTPDZ128r
30683
  { 14082,  4,  1,  0,  0,  0, 0x2020a8e0005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr },  // Inst #14082 = VSQRTPDZ128rk
30684
  { 14083,  3,  1,  0,  0,  0, 0x2060a8e0005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr },  // Inst #14083 = VSQRTPDZ128rkz
30685
  { 14084,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4008a8e0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #14084 = VSQRTPDZ256m
30686
  { 14085,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1108a8e0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #14085 = VSQRTPDZ256mb
30687
  { 14086,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1128a8e0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #14086 = VSQRTPDZ256mbk
30688
  { 14087,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1168a8e0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #14087 = VSQRTPDZ256mbkz
30689
  { 14088,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4028a8e0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr },  // Inst #14088 = VSQRTPDZ256mk
30690
  { 14089,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4068a8e0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr },  // Inst #14089 = VSQRTPDZ256mkz
30691
  { 14090,  2,  1,  0,  0,  0, 0x4008a8e0005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #14090 = VSQRTPDZ256r
30692
  { 14091,  4,  1,  0,  0,  0, 0x4028a8e0005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr },  // Inst #14091 = VSQRTPDZ256rk
30693
  { 14092,  3,  1,  0,  0,  0, 0x4068a8e0005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr },  // Inst #14092 = VSQRTPDZ256rkz
30694
  { 14093,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8080a8e0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #14093 = VSQRTPDZm
30695
  { 14094,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1180a8e0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #14094 = VSQRTPDZmb
30696
  { 14095,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a0a8e0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #14095 = VSQRTPDZmbk
30697
  { 14096,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e0a8e0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14096 = VSQRTPDZmbkz
30698
  { 14097,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a0a8e0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr },  // Inst #14097 = VSQRTPDZmk
30699
  { 14098,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e0a8e0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr },  // Inst #14098 = VSQRTPDZmkz
30700
  { 14099,  2,  1,  0,  0,  0, 0x8080a8e0005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #14099 = VSQRTPDZr
30701
  { 14100,  3,  1,  0,  0,  0, 0x41180a8e0005005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #14100 = VSQRTPDZrb
30702
  { 14101,  5,  1,  0,  0,  0, 0x411a0a8e0005005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr },  // Inst #14101 = VSQRTPDZrbk
30703
  { 14102,  4,  1,  0,  0,  0, 0x411e0a8e0005005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr },  // Inst #14102 = VSQRTPDZrbkz
30704
  { 14103,  4,  1,  0,  0,  0, 0x80a0a8e0005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr },  // Inst #14103 = VSQRTPDZrk
30705
  { 14104,  3,  1,  0,  0,  0, 0x80e0a8e0005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr },  // Inst #14104 = VSQRTPDZrkz
30706
  { 14105,  6,  1,  0,  496,  0|(1ULL<<MCID::MayLoad), 0x28b0005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #14105 = VSQRTPDm
30707
  { 14106,  2,  1,  0,  497,  0, 0x28b0005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #14106 = VSQRTPDr
30708
  { 14107,  6,  1,  0,  929,  0|(1ULL<<MCID::MayLoad), 0x828a8004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr },  // Inst #14107 = VSQRTPSYm
30709
  { 14108,  2,  1,  0,  928,  0, 0x828a8004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr },  // Inst #14108 = VSQRTPSYr
30710
  { 14109,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x200028e0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #14109 = VSQRTPSZ128m
30711
  { 14110,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90028e0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr },  // Inst #14110 = VSQRTPSZ128mb
30712
  { 14111,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92028e0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #14111 = VSQRTPSZ128mbk
30713
  { 14112,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96028e0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #14112 = VSQRTPSZ128mbkz
30714
  { 14113,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x202028e0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr },  // Inst #14113 = VSQRTPSZ128mk
30715
  { 14114,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x206028e0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr },  // Inst #14114 = VSQRTPSZ128mkz
30716
  { 14115,  2,  1,  0,  0,  0, 0x200028e0004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr },  // Inst #14115 = VSQRTPSZ128r
30717
  { 14116,  4,  1,  0,  0,  0, 0x202028e0004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr },  // Inst #14116 = VSQRTPSZ128rk
30718
  { 14117,  3,  1,  0,  0,  0, 0x206028e0004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr },  // Inst #14117 = VSQRTPSZ128rkz
30719
  { 14118,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x400828e0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #14118 = VSQRTPSZ256m
30720
  { 14119,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x90828e0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr },  // Inst #14119 = VSQRTPSZ256mb
30721
  { 14120,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x92828e0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #14120 = VSQRTPSZ256mbk
30722
  { 14121,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x96828e0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #14121 = VSQRTPSZ256mbkz
30723
  { 14122,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x402828e0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr },  // Inst #14122 = VSQRTPSZ256mk
30724
  { 14123,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x406828e0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr },  // Inst #14123 = VSQRTPSZ256mkz
30725
  { 14124,  2,  1,  0,  0,  0, 0x400828e0004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr },  // Inst #14124 = VSQRTPSZ256r
30726
  { 14125,  4,  1,  0,  0,  0, 0x402828e0004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr },  // Inst #14125 = VSQRTPSZ256rk
30727
  { 14126,  3,  1,  0,  0,  0, 0x406828e0004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr },  // Inst #14126 = VSQRTPSZ256rkz
30728
  { 14127,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x808028e0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #14127 = VSQRTPSZm
30729
  { 14128,  6,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x98028e0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr },  // Inst #14128 = VSQRTPSZmb
30730
  { 14129,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a028e0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #14129 = VSQRTPSZmbk
30731
  { 14130,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e028e0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #14130 = VSQRTPSZmbkz
30732
  { 14131,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a028e0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr },  // Inst #14131 = VSQRTPSZmk
30733
  { 14132,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e028e0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr },  // Inst #14132 = VSQRTPSZmkz
30734
  { 14133,  2,  1,  0,  0,  0, 0x808028e0004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr },  // Inst #14133 = VSQRTPSZr
30735
  { 14134,  3,  1,  0,  0,  0, 0x4098028e0004805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr },  // Inst #14134 = VSQRTPSZrb
30736
  { 14135,  5,  1,  0,  0,  0, 0x409a028e0004805ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr },  // Inst #14135 = VSQRTPSZrbk
30737
  { 14136,  4,  1,  0,  0,  0, 0x409e028e0004805ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr },  // Inst #14136 = VSQRTPSZrbkz
30738
  { 14137,  4,  1,  0,  0,  0, 0x80a028e0004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr },  // Inst #14137 = VSQRTPSZrk
30739
  { 14138,  3,  1,  0,  0,  0, 0x80e028e0004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr },  // Inst #14138 = VSQRTPSZrkz
30740
  { 14139,  6,  1,  0,  498,  0|(1ULL<<MCID::MayLoad), 0x28a8004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr },  // Inst #14139 = VSQRTPSm
30741
  { 14140,  2,  1,  0,  499,  0, 0x28a8004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr },  // Inst #14140 = VSQRTPSr
30742
  { 14141,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1011a8e0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr },  // Inst #14141 = VSQRTSDZm
30743
  { 14142,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011a8e0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14142 = VSQRTSDZm_Int
30744
  { 14143,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031a8e0006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #14143 = VSQRTSDZm_Intk
30745
  { 14144,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071a8e0006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #14144 = VSQRTSDZm_Intkz
30746
  { 14145,  3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1011a8e0006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr },  // Inst #14145 = VSQRTSDZr
30747
  { 14146,  3,  1,  0,  0,  0, 0x1011a8e0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14146 = VSQRTSDZr_Int
30748
  { 14147,  5,  1,  0,  0,  0, 0x1031a8e0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #14147 = VSQRTSDZr_Intk
30749
  { 14148,  4,  1,  0,  0,  0, 0x1071a8e0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #14148 = VSQRTSDZr_Intkz
30750
  { 14149,  4,  1,  0,  0,  0, 0x41111a8e0006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #14149 = VSQRTSDZrb_Int
30751
  { 14150,  6,  1,  0,  0,  0, 0x41131a8e0006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #14150 = VSQRTSDZrb_Intk
30752
  { 14151,  5,  1,  0,  0,  0, 0x41171a8e0006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #14151 = VSQRTSDZrb_Intkz
30753
  { 14152,  7,  1,  0,  500,  0|(1ULL<<MCID::MayLoad), 0x1128b0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #14152 = VSQRTSDm
30754
  { 14153,  7,  1,  0,  501,  0|(1ULL<<MCID::MayLoad), 0x1128a0006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14153 = VSQRTSDm_Int
30755
  { 14154,  3,  1,  0,  502,  0, 0x1128b0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #14154 = VSQRTSDr
30756
  { 14155,  3,  1,  0,  579,  0, 0x1128a0006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14155 = VSQRTSDr_Int
30757
  { 14156,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x81128e0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr },  // Inst #14156 = VSQRTSSZm
30758
  { 14157,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x81128e0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14157 = VSQRTSSZm_Int
30759
  { 14158,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x83128e0005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #14158 = VSQRTSSZm_Intk
30760
  { 14159,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x87128e0005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #14159 = VSQRTSSZm_Intkz
30761
  { 14160,  3,  1,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x81128e0005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr },  // Inst #14160 = VSQRTSSZr
30762
  { 14161,  3,  1,  0,  0,  0, 0x81128e0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14161 = VSQRTSSZr_Int
30763
  { 14162,  5,  1,  0,  0,  0, 0x83128e0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #14162 = VSQRTSSZr_Intk
30764
  { 14163,  4,  1,  0,  0,  0, 0x87128e0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #14163 = VSQRTSSZr_Intkz
30765
  { 14164,  4,  1,  0,  0,  0, 0x4091128e0005805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #14164 = VSQRTSSZrb_Int
30766
  { 14165,  6,  1,  0,  0,  0, 0x4093128e0005805ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #14165 = VSQRTSSZrb_Intk
30767
  { 14166,  5,  1,  0,  0,  0, 0x4097128e0005805ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #14166 = VSQRTSSZrb_Intkz
30768
  { 14167,  7,  1,  0,  503,  0|(1ULL<<MCID::MayLoad), 0x1128a8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #14167 = VSQRTSSm
30769
  { 14168,  7,  1,  0,  501,  0|(1ULL<<MCID::MayLoad), 0x1128a0005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14168 = VSQRTSSm_Int
30770
  { 14169,  3,  1,  0,  504,  0, 0x1128a8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #14169 = VSQRTSSr
30771
  { 14170,  3,  1,  0,  579,  0, 0x1128a0005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14170 = VSQRTSSr_Int
30772
  { 14171,  5,  0,  0,  946,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x572800481bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14171 = VSTMXCSR
30773
  { 14172,  7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x92e30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #14172 = VSUBPDYrm
30774
  { 14173,  3,  1,  0,  14, 0, 0x92e30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #14173 = VSUBPDYrr
30775
  { 14174,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001ae60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14174 = VSUBPDZ128rm
30776
  { 14175,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101ae60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14175 = VSUBPDZ128rmb
30777
  { 14176,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121ae60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #14176 = VSUBPDZ128rmbk
30778
  { 14177,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161ae60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #14177 = VSUBPDZ128rmbkz
30779
  { 14178,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021ae60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #14178 = VSUBPDZ128rmk
30780
  { 14179,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061ae60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #14179 = VSUBPDZ128rmkz
30781
  { 14180,  3,  1,  0,  0,  0, 0x2001ae60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14180 = VSUBPDZ128rr
30782
  { 14181,  5,  1,  0,  0,  0, 0x2021ae60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #14181 = VSUBPDZ128rrk
30783
  { 14182,  4,  1,  0,  0,  0, 0x2061ae60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #14182 = VSUBPDZ128rrkz
30784
  { 14183,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009ae60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14183 = VSUBPDZ256rm
30785
  { 14184,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109ae60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14184 = VSUBPDZ256rmb
30786
  { 14185,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129ae60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #14185 = VSUBPDZ256rmbk
30787
  { 14186,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169ae60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #14186 = VSUBPDZ256rmbkz
30788
  { 14187,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029ae60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #14187 = VSUBPDZ256rmk
30789
  { 14188,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069ae60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #14188 = VSUBPDZ256rmkz
30790
  { 14189,  3,  1,  0,  0,  0, 0x4009ae60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #14189 = VSUBPDZ256rr
30791
  { 14190,  5,  1,  0,  0,  0, 0x4029ae60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #14190 = VSUBPDZ256rrk
30792
  { 14191,  4,  1,  0,  0,  0, 0x4069ae60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #14191 = VSUBPDZ256rrkz
30793
  { 14192,  4,  1,  0,  0,  0, 0x41181ae60005005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #14192 = VSUBPDZrb
30794
  { 14193,  6,  1,  0,  0,  0, 0x411a1ae60005005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr },  // Inst #14193 = VSUBPDZrbk
30795
  { 14194,  5,  1,  0,  0,  0, 0x411e1ae60005005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr },  // Inst #14194 = VSUBPDZrbkz
30796
  { 14195,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081ae60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14195 = VSUBPDZrm
30797
  { 14196,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181ae60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14196 = VSUBPDZrmb
30798
  { 14197,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1ae60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #14197 = VSUBPDZrmbk
30799
  { 14198,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1ae60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #14198 = VSUBPDZrmbkz
30800
  { 14199,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1ae60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #14199 = VSUBPDZrmk
30801
  { 14200,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1ae60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #14200 = VSUBPDZrmkz
30802
  { 14201,  3,  1,  0,  0,  0, 0x8081ae60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #14201 = VSUBPDZrr
30803
  { 14202,  5,  1,  0,  0,  0, 0x80a1ae60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #14202 = VSUBPDZrrk
30804
  { 14203,  4,  1,  0,  0,  0, 0x80e1ae60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #14203 = VSUBPDZrrkz
30805
  { 14204,  7,  1,  0,  13, 0|(1ULL<<MCID::MayLoad), 0x12e30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14204 = VSUBPDrm
30806
  { 14205,  3,  1,  0,  14, 0, 0x12e30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14205 = VSUBPDrr
30807
  { 14206,  7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x92e28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #14206 = VSUBPSYrm
30808
  { 14207,  3,  1,  0,  16, 0, 0x92e28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #14207 = VSUBPSYrr
30809
  { 14208,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012e60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14208 = VSUBPSZ128rm
30810
  { 14209,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012e60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14209 = VSUBPSZ128rmb
30811
  { 14210,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212e60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #14210 = VSUBPSZ128rmbk
30812
  { 14211,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612e60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #14211 = VSUBPSZ128rmbkz
30813
  { 14212,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212e60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #14212 = VSUBPSZ128rmk
30814
  { 14213,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612e60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #14213 = VSUBPSZ128rmkz
30815
  { 14214,  3,  1,  0,  0,  0, 0x20012e60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14214 = VSUBPSZ128rr
30816
  { 14215,  5,  1,  0,  0,  0, 0x20212e60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #14215 = VSUBPSZ128rrk
30817
  { 14216,  4,  1,  0,  0,  0, 0x20612e60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #14216 = VSUBPSZ128rrkz
30818
  { 14217,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092e60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14217 = VSUBPSZ256rm
30819
  { 14218,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092e60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14218 = VSUBPSZ256rmb
30820
  { 14219,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292e60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #14219 = VSUBPSZ256rmbk
30821
  { 14220,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692e60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #14220 = VSUBPSZ256rmbkz
30822
  { 14221,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292e60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #14221 = VSUBPSZ256rmk
30823
  { 14222,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692e60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #14222 = VSUBPSZ256rmkz
30824
  { 14223,  3,  1,  0,  0,  0, 0x40092e60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #14223 = VSUBPSZ256rr
30825
  { 14224,  5,  1,  0,  0,  0, 0x40292e60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #14224 = VSUBPSZ256rrk
30826
  { 14225,  4,  1,  0,  0,  0, 0x40692e60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #14225 = VSUBPSZ256rrkz
30827
  { 14226,  4,  1,  0,  0,  0, 0x409812e60004805ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr },  // Inst #14226 = VSUBPSZrb
30828
  { 14227,  6,  1,  0,  0,  0, 0x409a12e60004805ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr },  // Inst #14227 = VSUBPSZrbk
30829
  { 14228,  5,  1,  0,  0,  0, 0x409e12e60004805ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr },  // Inst #14228 = VSUBPSZrbkz
30830
  { 14229,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812e60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14229 = VSUBPSZrm
30831
  { 14230,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812e60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14230 = VSUBPSZrmb
30832
  { 14231,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12e60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #14231 = VSUBPSZrmbk
30833
  { 14232,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12e60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #14232 = VSUBPSZrmbkz
30834
  { 14233,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12e60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #14233 = VSUBPSZrmk
30835
  { 14234,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12e60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #14234 = VSUBPSZrmkz
30836
  { 14235,  3,  1,  0,  0,  0, 0x80812e60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #14235 = VSUBPSZrr
30837
  { 14236,  5,  1,  0,  0,  0, 0x80a12e60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #14236 = VSUBPSZrrk
30838
  { 14237,  4,  1,  0,  0,  0, 0x80e12e60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #14237 = VSUBPSZrrkz
30839
  { 14238,  7,  1,  0,  15, 0|(1ULL<<MCID::MayLoad), 0x12e28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14238 = VSUBPSrm
30840
  { 14239,  3,  1,  0,  16, 0, 0x12e28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14239 = VSUBPSrr
30841
  { 14240,  7,  1,  0,  525,  0|(1ULL<<MCID::MayLoad), 0x1011ae60006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr },  // Inst #14240 = VSUBSDZrm
30842
  { 14241,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1011ae60006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14241 = VSUBSDZrm_Int
30843
  { 14242,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1031ae60006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #14242 = VSUBSDZrm_Intk
30844
  { 14243,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1071ae60006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #14243 = VSUBSDZrm_Intkz
30845
  { 14244,  3,  1,  0,  525,  0, 0x1011ae60006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr },  // Inst #14244 = VSUBSDZrr
30846
  { 14245,  3,  1,  0,  0,  0, 0x1011ae60006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14245 = VSUBSDZrr_Int
30847
  { 14246,  5,  1,  0,  0,  0, 0x1031ae60006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #14246 = VSUBSDZrr_Intk
30848
  { 14247,  4,  1,  0,  0,  0, 0x1071ae60006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #14247 = VSUBSDZrr_Intkz
30849
  { 14248,  4,  1,  0,  0,  0, 0x41111ae60006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #14248 = VSUBSDZrrb
30850
  { 14249,  6,  1,  0,  0,  0, 0x41131ae60006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #14249 = VSUBSDZrrbk
30851
  { 14250,  5,  1,  0,  0,  0, 0x41171ae60006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #14250 = VSUBSDZrrbkz
30852
  { 14251,  7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x112e30006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr },  // Inst #14251 = VSUBSDrm
30853
  { 14252,  7,  1,  0,  17, 0|(1ULL<<MCID::MayLoad), 0x112e30006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14252 = VSUBSDrm_Int
30854
  { 14253,  3,  1,  0,  18, 0, 0x112e30006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr },  // Inst #14253 = VSUBSDrr
30855
  { 14254,  3,  1,  0,  18, 0, 0x112e30006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14254 = VSUBSDrr_Int
30856
  { 14255,  7,  1,  0,  526,  0|(1ULL<<MCID::MayLoad), 0x8112e60005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr },  // Inst #14255 = VSUBSSZrm
30857
  { 14256,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8112e60005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14256 = VSUBSSZrm_Int
30858
  { 14257,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8312e60005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr },  // Inst #14257 = VSUBSSZrm_Intk
30859
  { 14258,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8712e60005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr },  // Inst #14258 = VSUBSSZrm_Intkz
30860
  { 14259,  3,  1,  0,  526,  0, 0x8112e60005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr },  // Inst #14259 = VSUBSSZrr
30861
  { 14260,  3,  1,  0,  0,  0, 0x8112e60005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14260 = VSUBSSZrr_Int
30862
  { 14261,  5,  1,  0,  0,  0, 0x8312e60005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr },  // Inst #14261 = VSUBSSZrr_Intk
30863
  { 14262,  4,  1,  0,  0,  0, 0x8712e60005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr },  // Inst #14262 = VSUBSSZrr_Intkz
30864
  { 14263,  4,  1,  0,  0,  0, 0x409112e60005805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr },  // Inst #14263 = VSUBSSZrrb
30865
  { 14264,  6,  1,  0,  0,  0, 0x409312e60005805ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr },  // Inst #14264 = VSUBSSZrrbk
30866
  { 14265,  5,  1,  0,  0,  0, 0x409712e60005805ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr },  // Inst #14265 = VSUBSSZrrbkz
30867
  { 14266,  7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x112e28005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr },  // Inst #14266 = VSUBSSrm
30868
  { 14267,  7,  1,  0,  19, 0|(1ULL<<MCID::MayLoad), 0x112e28005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14267 = VSUBSSrm_Int
30869
  { 14268,  3,  1,  0,  20, 0, 0x112e28005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr },  // Inst #14268 = VSUBSSrr
30870
  { 14269,  3,  1,  0,  20, 0, 0x112e28005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14269 = VSUBSSrr_Int
30871
  { 14270,  6,  0,  0,  32, 0|(1ULL<<MCID::MayLoad), 0x807b0009006ULL, nullptr, ImplicitList6, OperandInfo356, -1 ,nullptr },  // Inst #14270 = VTESTPDYrm
30872
  { 14271,  2,  0,  0,  33, 0, 0x807b0009005ULL, nullptr, ImplicitList6, OperandInfo446, -1 ,nullptr },  // Inst #14271 = VTESTPDYrr
30873
  { 14272,  6,  0,  0,  32, 0|(1ULL<<MCID::MayLoad), 0x7b0009006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #14272 = VTESTPDrm
30874
  { 14273,  2,  0,  0,  33, 0, 0x7b0009005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #14273 = VTESTPDrr
30875
  { 14274,  6,  0,  0,  32, 0|(1ULL<<MCID::MayLoad), 0x80728009006ULL, nullptr, ImplicitList6, OperandInfo356, -1 ,nullptr },  // Inst #14274 = VTESTPSYrm
30876
  { 14275,  2,  0,  0,  33, 0, 0x80728009005ULL, nullptr, ImplicitList6, OperandInfo446, -1 ,nullptr },  // Inst #14275 = VTESTPSYrr
30877
  { 14276,  6,  0,  0,  32, 0|(1ULL<<MCID::MayLoad), 0x728009006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr },  // Inst #14276 = VTESTPSrm
30878
  { 14277,  2,  0,  0,  33, 0, 0x728009005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr },  // Inst #14277 = VTESTPSrr
30879
  { 14278,  2,  0,  0,  76, 0, 0x11109770045005ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr },  // Inst #14278 = VUCOMISDZrb
30880
  { 14279,  6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x10109760005006ULL, nullptr, ImplicitList6, OperandInfo416, -1 ,nullptr },  // Inst #14279 = VUCOMISDZrm
30881
  { 14280,  2,  0,  0,  76, 0, 0x10109760005005ULL, nullptr, ImplicitList6, OperandInfo417, -1 ,nullptr },  // Inst #14280 = VUCOMISDZrr
30882
  { 14281,  6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x101720005006ULL, nullptr, ImplicitList6, OperandInfo113, -1 ,nullptr },  // Inst #14281 = VUCOMISDrm
30883
  { 14282,  2,  0,  0,  76, 0, 0x101720005005ULL, nullptr, ImplicitList6, OperandInfo114, -1 ,nullptr },  // Inst #14282 = VUCOMISDrr
30884
  { 14283,  2,  0,  0,  76, 0, 0x9101768044805ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr },  // Inst #14283 = VUCOMISSZrb
30885
  { 14284,  6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x8101760004806ULL, nullptr, ImplicitList6, OperandInfo418, -1 ,nullptr },  // Inst #14284 = VUCOMISSZrm
30886
  { 14285,  2,  0,  0,  76, 0, 0x8101760004805ULL, nullptr, ImplicitList6, OperandInfo419, -1 ,nullptr },  // Inst #14285 = VUCOMISSZrr
30887
  { 14286,  6,  0,  0,  75, 0|(1ULL<<MCID::MayLoad), 0x101720004806ULL, nullptr, ImplicitList6, OperandInfo115, -1 ,nullptr },  // Inst #14286 = VUCOMISSrm
30888
  { 14287,  2,  0,  0,  76, 0, 0x101720004805ULL, nullptr, ImplicitList6, OperandInfo116, -1 ,nullptr },  // Inst #14287 = VUCOMISSrr
30889
  { 14288,  7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0x90ab0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #14288 = VUNPCKHPDYrm
30890
  { 14289,  3,  1,  0,  524,  0, 0x90ab0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #14289 = VUNPCKHPDYrr
30891
  { 14290,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20018ae0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14290 = VUNPCKHPDZ128rm
30892
  { 14291,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11018ae0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14291 = VUNPCKHPDZ128rmb
30893
  { 14292,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11218ae0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #14292 = VUNPCKHPDZ128rmbk
30894
  { 14293,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11618ae0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #14293 = VUNPCKHPDZ128rmbkz
30895
  { 14294,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20218ae0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #14294 = VUNPCKHPDZ128rmk
30896
  { 14295,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20618ae0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #14295 = VUNPCKHPDZ128rmkz
30897
  { 14296,  3,  1,  0,  0,  0, 0x20018ae0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14296 = VUNPCKHPDZ128rr
30898
  { 14297,  5,  1,  0,  0,  0, 0x20218ae0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #14297 = VUNPCKHPDZ128rrk
30899
  { 14298,  4,  1,  0,  0,  0, 0x20618ae0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #14298 = VUNPCKHPDZ128rrkz
30900
  { 14299,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40098ae0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14299 = VUNPCKHPDZ256rm
30901
  { 14300,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11098ae0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14300 = VUNPCKHPDZ256rmb
30902
  { 14301,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11298ae0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #14301 = VUNPCKHPDZ256rmbk
30903
  { 14302,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11698ae0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #14302 = VUNPCKHPDZ256rmbkz
30904
  { 14303,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40298ae0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #14303 = VUNPCKHPDZ256rmk
30905
  { 14304,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40698ae0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #14304 = VUNPCKHPDZ256rmkz
30906
  { 14305,  3,  1,  0,  0,  0, 0x40098ae0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #14305 = VUNPCKHPDZ256rr
30907
  { 14306,  5,  1,  0,  0,  0, 0x40298ae0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #14306 = VUNPCKHPDZ256rrk
30908
  { 14307,  4,  1,  0,  0,  0, 0x40698ae0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #14307 = VUNPCKHPDZ256rrkz
30909
  { 14308,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80818ae0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14308 = VUNPCKHPDZrm
30910
  { 14309,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11818ae0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14309 = VUNPCKHPDZrmb
30911
  { 14310,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a18ae0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #14310 = VUNPCKHPDZrmbk
30912
  { 14311,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e18ae0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #14311 = VUNPCKHPDZrmbkz
30913
  { 14312,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a18ae0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #14312 = VUNPCKHPDZrmk
30914
  { 14313,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e18ae0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #14313 = VUNPCKHPDZrmkz
30915
  { 14314,  3,  1,  0,  0,  0, 0x80818ae0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #14314 = VUNPCKHPDZrr
30916
  { 14315,  5,  1,  0,  0,  0, 0x80a18ae0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #14315 = VUNPCKHPDZrrk
30917
  { 14316,  4,  1,  0,  0,  0, 0x80e18ae0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #14316 = VUNPCKHPDZrrkz
30918
  { 14317,  7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0x10ab0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14317 = VUNPCKHPDrm
30919
  { 14318,  3,  1,  0,  524,  0, 0x10ab0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14318 = VUNPCKHPDrr
30920
  { 14319,  7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0x90aa8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #14319 = VUNPCKHPSYrm
30921
  { 14320,  3,  1,  0,  524,  0, 0x90aa8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #14320 = VUNPCKHPSYrr
30922
  { 14321,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20010ae0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14321 = VUNPCKHPSZ128rm
30923
  { 14322,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9010ae0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14322 = VUNPCKHPSZ128rmb
30924
  { 14323,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9210ae0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #14323 = VUNPCKHPSZ128rmbk
30925
  { 14324,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9610ae0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #14324 = VUNPCKHPSZ128rmbkz
30926
  { 14325,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20210ae0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #14325 = VUNPCKHPSZ128rmk
30927
  { 14326,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20610ae0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #14326 = VUNPCKHPSZ128rmkz
30928
  { 14327,  3,  1,  0,  0,  0, 0x20010ae0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14327 = VUNPCKHPSZ128rr
30929
  { 14328,  5,  1,  0,  0,  0, 0x20210ae0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #14328 = VUNPCKHPSZ128rrk
30930
  { 14329,  4,  1,  0,  0,  0, 0x20610ae0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #14329 = VUNPCKHPSZ128rrkz
30931
  { 14330,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40090ae0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14330 = VUNPCKHPSZ256rm
30932
  { 14331,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9090ae0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14331 = VUNPCKHPSZ256rmb
30933
  { 14332,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9290ae0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #14332 = VUNPCKHPSZ256rmbk
30934
  { 14333,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9690ae0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #14333 = VUNPCKHPSZ256rmbkz
30935
  { 14334,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40290ae0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #14334 = VUNPCKHPSZ256rmk
30936
  { 14335,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40690ae0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #14335 = VUNPCKHPSZ256rmkz
30937
  { 14336,  3,  1,  0,  0,  0, 0x40090ae0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #14336 = VUNPCKHPSZ256rr
30938
  { 14337,  5,  1,  0,  0,  0, 0x40290ae0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #14337 = VUNPCKHPSZ256rrk
30939
  { 14338,  4,  1,  0,  0,  0, 0x40690ae0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #14338 = VUNPCKHPSZ256rrkz
30940
  { 14339,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80810ae0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14339 = VUNPCKHPSZrm
30941
  { 14340,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9810ae0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14340 = VUNPCKHPSZrmb
30942
  { 14341,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a10ae0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #14341 = VUNPCKHPSZrmbk
30943
  { 14342,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e10ae0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #14342 = VUNPCKHPSZrmbkz
30944
  { 14343,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a10ae0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #14343 = VUNPCKHPSZrmk
30945
  { 14344,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e10ae0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #14344 = VUNPCKHPSZrmkz
30946
  { 14345,  3,  1,  0,  0,  0, 0x80810ae0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #14345 = VUNPCKHPSZrr
30947
  { 14346,  5,  1,  0,  0,  0, 0x80a10ae0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #14346 = VUNPCKHPSZrrk
30948
  { 14347,  4,  1,  0,  0,  0, 0x80e10ae0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #14347 = VUNPCKHPSZrrkz
30949
  { 14348,  7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0x10aa8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14348 = VUNPCKHPSrm
30950
  { 14349,  3,  1,  0,  524,  0, 0x10aa8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14349 = VUNPCKHPSrr
30951
  { 14350,  7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0x90a30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #14350 = VUNPCKLPDYrm
30952
  { 14351,  3,  1,  0,  524,  0, 0x90a30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #14351 = VUNPCKLPDYrr
30953
  { 14352,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20018a60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14352 = VUNPCKLPDZ128rm
30954
  { 14353,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11018a60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14353 = VUNPCKLPDZ128rmb
30955
  { 14354,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11218a60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #14354 = VUNPCKLPDZ128rmbk
30956
  { 14355,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11618a60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #14355 = VUNPCKLPDZ128rmbkz
30957
  { 14356,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20218a60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #14356 = VUNPCKLPDZ128rmk
30958
  { 14357,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20618a60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #14357 = VUNPCKLPDZ128rmkz
30959
  { 14358,  3,  1,  0,  0,  0, 0x20018a60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14358 = VUNPCKLPDZ128rr
30960
  { 14359,  5,  1,  0,  0,  0, 0x20218a60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #14359 = VUNPCKLPDZ128rrk
30961
  { 14360,  4,  1,  0,  0,  0, 0x20618a60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #14360 = VUNPCKLPDZ128rrkz
30962
  { 14361,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40098a60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14361 = VUNPCKLPDZ256rm
30963
  { 14362,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11098a60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14362 = VUNPCKLPDZ256rmb
30964
  { 14363,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11298a60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #14363 = VUNPCKLPDZ256rmbk
30965
  { 14364,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11698a60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #14364 = VUNPCKLPDZ256rmbkz
30966
  { 14365,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40298a60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #14365 = VUNPCKLPDZ256rmk
30967
  { 14366,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40698a60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #14366 = VUNPCKLPDZ256rmkz
30968
  { 14367,  3,  1,  0,  0,  0, 0x40098a60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #14367 = VUNPCKLPDZ256rr
30969
  { 14368,  5,  1,  0,  0,  0, 0x40298a60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #14368 = VUNPCKLPDZ256rrk
30970
  { 14369,  4,  1,  0,  0,  0, 0x40698a60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #14369 = VUNPCKLPDZ256rrkz
30971
  { 14370,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80818a60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14370 = VUNPCKLPDZrm
30972
  { 14371,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11818a60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14371 = VUNPCKLPDZrmb
30973
  { 14372,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a18a60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #14372 = VUNPCKLPDZrmbk
30974
  { 14373,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e18a60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #14373 = VUNPCKLPDZrmbkz
30975
  { 14374,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a18a60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #14374 = VUNPCKLPDZrmk
30976
  { 14375,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e18a60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #14375 = VUNPCKLPDZrmkz
30977
  { 14376,  3,  1,  0,  0,  0, 0x80818a60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #14376 = VUNPCKLPDZrr
30978
  { 14377,  5,  1,  0,  0,  0, 0x80a18a60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #14377 = VUNPCKLPDZrrk
30979
  { 14378,  4,  1,  0,  0,  0, 0x80e18a60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #14378 = VUNPCKLPDZrrkz
30980
  { 14379,  7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0x10a30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14379 = VUNPCKLPDrm
30981
  { 14380,  3,  1,  0,  524,  0, 0x10a30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14380 = VUNPCKLPDrr
30982
  { 14381,  7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0x90a28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #14381 = VUNPCKLPSYrm
30983
  { 14382,  3,  1,  0,  524,  0, 0x90a28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #14382 = VUNPCKLPSYrr
30984
  { 14383,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20010a60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14383 = VUNPCKLPSZ128rm
30985
  { 14384,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9010a60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14384 = VUNPCKLPSZ128rmb
30986
  { 14385,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9210a60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #14385 = VUNPCKLPSZ128rmbk
30987
  { 14386,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9610a60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #14386 = VUNPCKLPSZ128rmbkz
30988
  { 14387,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20210a60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #14387 = VUNPCKLPSZ128rmk
30989
  { 14388,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20610a60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #14388 = VUNPCKLPSZ128rmkz
30990
  { 14389,  3,  1,  0,  0,  0, 0x20010a60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14389 = VUNPCKLPSZ128rr
30991
  { 14390,  5,  1,  0,  0,  0, 0x20210a60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #14390 = VUNPCKLPSZ128rrk
30992
  { 14391,  4,  1,  0,  0,  0, 0x20610a60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #14391 = VUNPCKLPSZ128rrkz
30993
  { 14392,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40090a60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14392 = VUNPCKLPSZ256rm
30994
  { 14393,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9090a60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14393 = VUNPCKLPSZ256rmb
30995
  { 14394,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9290a60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #14394 = VUNPCKLPSZ256rmbk
30996
  { 14395,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9690a60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #14395 = VUNPCKLPSZ256rmbkz
30997
  { 14396,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40290a60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #14396 = VUNPCKLPSZ256rmk
30998
  { 14397,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40690a60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #14397 = VUNPCKLPSZ256rmkz
30999
  { 14398,  3,  1,  0,  0,  0, 0x40090a60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #14398 = VUNPCKLPSZ256rr
31000
  { 14399,  5,  1,  0,  0,  0, 0x40290a60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #14399 = VUNPCKLPSZ256rrk
31001
  { 14400,  4,  1,  0,  0,  0, 0x40690a60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #14400 = VUNPCKLPSZ256rrkz
31002
  { 14401,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80810a60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14401 = VUNPCKLPSZrm
31003
  { 14402,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9810a60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14402 = VUNPCKLPSZrmb
31004
  { 14403,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a10a60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #14403 = VUNPCKLPSZrmbk
31005
  { 14404,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e10a60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #14404 = VUNPCKLPSZrmbkz
31006
  { 14405,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a10a60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #14405 = VUNPCKLPSZrmk
31007
  { 14406,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e10a60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #14406 = VUNPCKLPSZrmkz
31008
  { 14407,  3,  1,  0,  0,  0, 0x80810a60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #14407 = VUNPCKLPSZrr
31009
  { 14408,  5,  1,  0,  0,  0, 0x80a10a60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #14408 = VUNPCKLPSZrrk
31010
  { 14409,  4,  1,  0,  0,  0, 0x80e10a60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #14409 = VUNPCKLPSZrrkz
31011
  { 14410,  7,  1,  0,  523,  0|(1ULL<<MCID::MayLoad), 0x10a28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14410 = VUNPCKLPSrm
31012
  { 14411,  3,  1,  0,  524,  0, 0x10a28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14411 = VUNPCKLPSrr
31013
  { 14412,  7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x92bb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #14412 = VXORPDYrm
31014
  { 14413,  3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x92bb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #14413 = VXORPDYrr
31015
  { 14414,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2001abe0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14414 = VXORPDZ128rm
31016
  { 14415,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1101abe0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14415 = VXORPDZ128rmb
31017
  { 14416,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1121abe0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #14416 = VXORPDZ128rmbk
31018
  { 14417,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1161abe0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #14417 = VXORPDZ128rmbkz
31019
  { 14418,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2021abe0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr },  // Inst #14418 = VXORPDZ128rmk
31020
  { 14419,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x2061abe0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr },  // Inst #14419 = VXORPDZ128rmkz
31021
  { 14420,  3,  1,  0,  0,  0, 0x2001abe0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14420 = VXORPDZ128rr
31022
  { 14421,  5,  1,  0,  0,  0, 0x2021abe0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr },  // Inst #14421 = VXORPDZ128rrk
31023
  { 14422,  4,  1,  0,  0,  0, 0x2061abe0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr },  // Inst #14422 = VXORPDZ128rrkz
31024
  { 14423,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4009abe0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14423 = VXORPDZ256rm
31025
  { 14424,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1109abe0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14424 = VXORPDZ256rmb
31026
  { 14425,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1129abe0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #14425 = VXORPDZ256rmbk
31027
  { 14426,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1169abe0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #14426 = VXORPDZ256rmbkz
31028
  { 14427,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4029abe0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr },  // Inst #14427 = VXORPDZ256rmk
31029
  { 14428,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x4069abe0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr },  // Inst #14428 = VXORPDZ256rmkz
31030
  { 14429,  3,  1,  0,  0,  0, 0x4009abe0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #14429 = VXORPDZ256rr
31031
  { 14430,  5,  1,  0,  0,  0, 0x4029abe0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr },  // Inst #14430 = VXORPDZ256rrk
31032
  { 14431,  4,  1,  0,  0,  0, 0x4069abe0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr },  // Inst #14431 = VXORPDZ256rrkz
31033
  { 14432,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x8081abe0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14432 = VXORPDZrm
31034
  { 14433,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x1181abe0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14433 = VXORPDZrmb
31035
  { 14434,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11a1abe0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #14434 = VXORPDZrmbk
31036
  { 14435,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x11e1abe0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #14435 = VXORPDZrmbkz
31037
  { 14436,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a1abe0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr },  // Inst #14436 = VXORPDZrmk
31038
  { 14437,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e1abe0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr },  // Inst #14437 = VXORPDZrmkz
31039
  { 14438,  3,  1,  0,  0,  0, 0x8081abe0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #14438 = VXORPDZrr
31040
  { 14439,  5,  1,  0,  0,  0, 0x80a1abe0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr },  // Inst #14439 = VXORPDZrrk
31041
  { 14440,  4,  1,  0,  0,  0, 0x80e1abe0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr },  // Inst #14440 = VXORPDZrrkz
31042
  { 14441,  7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x12bb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14441 = VXORPDrm
31043
  { 14442,  3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x12bb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14442 = VXORPDrr
31044
  { 14443,  7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x92ba8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr },  // Inst #14443 = VXORPSYrm
31045
  { 14444,  3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x92ba8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr },  // Inst #14444 = VXORPSYrr
31046
  { 14445,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20012be0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14445 = VXORPSZ128rm
31047
  { 14446,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9012be0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr },  // Inst #14446 = VXORPSZ128rmb
31048
  { 14447,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9212be0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #14447 = VXORPSZ128rmbk
31049
  { 14448,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9612be0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #14448 = VXORPSZ128rmbkz
31050
  { 14449,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20212be0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr },  // Inst #14449 = VXORPSZ128rmk
31051
  { 14450,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x20612be0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr },  // Inst #14450 = VXORPSZ128rmkz
31052
  { 14451,  3,  1,  0,  0,  0, 0x20012be0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr },  // Inst #14451 = VXORPSZ128rr
31053
  { 14452,  5,  1,  0,  0,  0, 0x20212be0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr },  // Inst #14452 = VXORPSZ128rrk
31054
  { 14453,  4,  1,  0,  0,  0, 0x20612be0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr },  // Inst #14453 = VXORPSZ128rrkz
31055
  { 14454,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40092be0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14454 = VXORPSZ256rm
31056
  { 14455,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9092be0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr },  // Inst #14455 = VXORPSZ256rmb
31057
  { 14456,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9292be0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #14456 = VXORPSZ256rmbk
31058
  { 14457,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9692be0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #14457 = VXORPSZ256rmbkz
31059
  { 14458,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40292be0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr },  // Inst #14458 = VXORPSZ256rmk
31060
  { 14459,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x40692be0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr },  // Inst #14459 = VXORPSZ256rmkz
31061
  { 14460,  3,  1,  0,  0,  0, 0x40092be0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr },  // Inst #14460 = VXORPSZ256rr
31062
  { 14461,  5,  1,  0,  0,  0, 0x40292be0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr },  // Inst #14461 = VXORPSZ256rrk
31063
  { 14462,  4,  1,  0,  0,  0, 0x40692be0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr },  // Inst #14462 = VXORPSZ256rrkz
31064
  { 14463,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80812be0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14463 = VXORPSZrm
31065
  { 14464,  7,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9812be0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr },  // Inst #14464 = VXORPSZrmb
31066
  { 14465,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9a12be0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #14465 = VXORPSZrmbk
31067
  { 14466,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x9e12be0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #14466 = VXORPSZrmbkz
31068
  { 14467,  9,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80a12be0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr },  // Inst #14467 = VXORPSZrmk
31069
  { 14468,  8,  1,  0,  0,  0|(1ULL<<MCID::MayLoad), 0x80e12be0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr },  // Inst #14468 = VXORPSZrmkz
31070
  { 14469,  3,  1,  0,  0,  0, 0x80812be0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr },  // Inst #14469 = VXORPSZrr
31071
  { 14470,  5,  1,  0,  0,  0, 0x80a12be0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr },  // Inst #14470 = VXORPSZrrk
31072
  { 14471,  4,  1,  0,  0,  0, 0x80e12be0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr },  // Inst #14471 = VXORPSZrrkz
31073
  { 14472,  7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x12ba8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr },  // Inst #14472 = VXORPSrm
31074
  { 14473,  3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x12ba8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr },  // Inst #14473 = VXORPSrr
31075
  { 14474,  0,  0,  0,  944,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x83ba0004801ULL, nullptr, ImplicitList87, nullptr, -1 ,nullptr },  // Inst #14474 = VZEROALL
31076
  { 14475,  0,  0,  0,  943,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3ba0004801ULL, nullptr, ImplicitList87, nullptr, -1 ,nullptr },  // Inst #14475 = VZEROUPPER
31077
  { 14476,  1,  1,  0,  36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo931, -1 ,nullptr },  // Inst #14476 = V_SET0
31078
  { 14477,  1,  1,  0,  36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo931, -1 ,nullptr },  // Inst #14477 = V_SETALLONES
31079
  { 14478,  0,  0,  0,  776,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4d80000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #14478 = WAIT
31080
  { 14479,  0,  0,  0,  198,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x480004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #14479 = WBINVD
31081
  { 14480,  0,  0,  0,  0,  0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList11, ImplicitList79, nullptr, -1 ,nullptr },  // Inst #14480 = WIN_ALLOCA
31082
  { 14481,  1,  0,  0,  454,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList12, OperandInfo83, -1 ,nullptr },  // Inst #14481 = WRFLAGS32
31083
  { 14482,  1,  0,  0,  454,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList13, ImplicitList14, OperandInfo85, -1 ,nullptr },  // Inst #14482 = WRFLAGS64
31084
  { 14483,  1,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700005812ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #14483 = WRFSBASE
31085
  { 14484,  1,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700025812ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #14484 = WRFSBASE64
31086
  { 14485,  1,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700005813ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #14485 = WRGSBASE
31087
  { 14486,  1,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700025813ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr },  // Inst #14486 = WRGSBASE64
31088
  { 14487,  0,  0,  0,  581,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x1800004001ULL, ImplicitList46, nullptr, nullptr, -1 ,nullptr },  // Inst #14487 = WRMSR
31089
  { 14488,  1,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #14488 = WRPKRU
31090
  { 14489,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000404fULL, ImplicitList46, nullptr, nullptr, -1 ,nullptr },  // Inst #14489 = WRPKRUr
31091
  { 14490,  1,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6300040058ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr },  // Inst #14490 = XABORT
31092
  { 14491,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7900000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #14491 = XACQUIRE_PREFIX
31093
  { 14492,  6,  0,  0,  725,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6080004084ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr },  // Inst #14492 = XADD16rm
31094
  { 14493,  2,  1,  0,  583,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6080004083ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr },  // Inst #14493 = XADD16rr
31095
  { 14494,  6,  0,  0,  725,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6080004104ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr },  // Inst #14494 = XADD32rm
31096
  { 14495,  2,  1,  0,  583,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6080004103ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr },  // Inst #14495 = XADD32rr
31097
  { 14496,  6,  0,  0,  725,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6080024004ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr },  // Inst #14496 = XADD64rm
31098
  { 14497,  2,  1,  0,  583,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6080024003ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr },  // Inst #14497 = XADD64rr
31099
  { 14498,  6,  0,  0,  725,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6000004004ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr },  // Inst #14498 = XADD8rm
31100
  { 14499,  2,  1,  0,  583,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6000004003ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr },  // Inst #14499 = XADD8rr
31101
  { 14500,  1,  1,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr },  // Inst #14500 = XBEGIN
31102
  { 14501,  1,  0,  0,  0,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x63801000d8ULL, nullptr, ImplicitList9, OperandInfo84, -1 ,nullptr },  // Inst #14501 = XBEGIN_2
31103
  { 14502,  1,  0,  0,  0,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380180158ULL, nullptr, ImplicitList9, OperandInfo84, -1 ,nullptr },  // Inst #14502 = XBEGIN_4
31104
  { 14503,  1,  0,  0,  595,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4800000082ULL, ImplicitList3, ImplicitList3, OperandInfo82, -1 ,nullptr },  // Inst #14503 = XCHG16ar
31105
  { 14504,  7,  1,  0,  596,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380000086ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr },  // Inst #14504 = XCHG16rm
31106
  { 14505,  3,  1,  0,  595,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4380000085ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr },  // Inst #14505 = XCHG16rr
31107
  { 14506,  1,  0,  0,  595,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4800000102ULL, ImplicitList9, ImplicitList9, OperandInfo83, -1 ,nullptr },  // Inst #14506 = XCHG32ar
31108
  { 14507,  1,  0,  0,  595,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4800000102ULL, ImplicitList9, ImplicitList9, OperandInfo932, -1 ,nullptr },  // Inst #14507 = XCHG32ar64
31109
  { 14508,  7,  1,  0,  596,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380000106ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr },  // Inst #14508 = XCHG32rm
31110
  { 14509,  3,  1,  0,  595,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4380000105ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr },  // Inst #14509 = XCHG32rr
31111
  { 14510,  1,  0,  0,  595,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4800020002ULL, ImplicitList10, ImplicitList10, OperandInfo85, -1 ,nullptr },  // Inst #14510 = XCHG64ar
31112
  { 14511,  7,  1,  0,  596,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380020006ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr },  // Inst #14511 = XCHG64rm
31113
  { 14512,  3,  1,  0,  595,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4380020005ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr },  // Inst #14512 = XCHG64rr
31114
  { 14513,  7,  1,  0,  596,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4300000006ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr },  // Inst #14513 = XCHG8rm
31115
  { 14514,  3,  1,  0,  595,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x4300000005ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr },  // Inst #14514 = XCHG8rr
31116
  { 14515,  1,  0,  0,  743,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000011ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr },  // Inst #14515 = XCH_F
31117
  { 14516,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004030ULL, ImplicitList88, ImplicitList89, nullptr, -1 ,nullptr },  // Inst #14516 = XCRYPTCBC
31118
  { 14517,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004040ULL, ImplicitList88, ImplicitList89, nullptr, -1 ,nullptr },  // Inst #14517 = XCRYPTCFB
31119
  { 14518,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004038ULL, ImplicitList88, ImplicitList89, nullptr, -1 ,nullptr },  // Inst #14518 = XCRYPTCTR
31120
  { 14519,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004028ULL, ImplicitList88, ImplicitList89, nullptr, -1 ,nullptr },  // Inst #14519 = XCRYPTECB
31121
  { 14520,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004048ULL, ImplicitList88, ImplicitList89, nullptr, -1 ,nullptr },  // Inst #14520 = XCRYPTOFB
31122
  { 14521,  0,  0,  0,  0,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80004035ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #14521 = XEND
31123
  { 14522,  0,  0,  0,  732,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004030ULL, ImplicitList35, ImplicitList90, nullptr, -1 ,nullptr },  // Inst #14522 = XGETBV
31124
  { 14523,  0,  0,  0,  597,  0|(1ULL<<MCID::MayLoad), 0x6b80000001ULL, ImplicitList91, ImplicitList4, nullptr, -1 ,nullptr },  // Inst #14523 = XLAT
31125
  { 14524,  1,  0,  0,  9,  0, 0x1a800c0081ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr },  // Inst #14524 = XOR16i16
31126
  { 14525,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c009eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #14525 = XOR16mi
31127
  { 14526,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004009eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #14526 = XOR16mi8
31128
  { 14527,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr },  // Inst #14527 = XOR16mr
31129
  { 14528,  3,  1,  0,  9,  0, 0x40800c0096ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #14528 = XOR16ri
31130
  { 14529,  3,  1,  0,  9,  0, 0x4180040096ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr },  // Inst #14529 = XOR16ri8
31131
  { 14530,  7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x1980000086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr },  // Inst #14530 = XOR16rm
31132
  { 14531,  3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x1880000083ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #14531 = XOR16rr
31133
  { 14532,  3,  1,  0,  9,  0, 0x1980000085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr },  // Inst #14532 = XOR16rr_REV
31134
  { 14533,  1,  0,  0,  9,  0, 0x1a80140101ULL, ImplicitList9, ImplicitList7, OperandInfo2, -1 ,nullptr },  // Inst #14533 = XOR32i32
31135
  { 14534,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408014011eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #14534 = XOR32mi
31136
  { 14535,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004011eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #14535 = XOR32mi8
31137
  { 14536,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr },  // Inst #14536 = XOR32mr
31138
  { 14537,  3,  1,  0,  9,  0, 0x4080140116ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #14537 = XOR32ri
31139
  { 14538,  3,  1,  0,  9,  0, 0x4180040116ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr },  // Inst #14538 = XOR32ri8
31140
  { 14539,  7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x1980000106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr },  // Inst #14539 = XOR32rm
31141
  { 14540,  3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x1880000103ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #14540 = XOR32rr
31142
  { 14541,  3,  1,  0,  9,  0, 0x1980000105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr },  // Inst #14541 = XOR32rr_REV
31143
  { 14542,  1,  0,  0,  9,  0, 0x1a801e0001ULL, ImplicitList10, ImplicitList8, OperandInfo2, -1 ,nullptr },  // Inst #14542 = XOR64i32
31144
  { 14543,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #14543 = XOR64mi32
31145
  { 14544,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418006001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #14544 = XOR64mi8
31146
  { 14545,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr },  // Inst #14545 = XOR64mr
31147
  { 14546,  3,  1,  0,  9,  0, 0x40801e0016ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #14546 = XOR64ri32
31148
  { 14547,  3,  1,  0,  9,  0, 0x4180060016ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr },  // Inst #14547 = XOR64ri8
31149
  { 14548,  7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x1980020006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr },  // Inst #14548 = XOR64rm
31150
  { 14549,  3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x1880020003ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #14549 = XOR64rr
31151
  { 14550,  3,  1,  0,  9,  0, 0x1980020005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr },  // Inst #14550 = XOR64rr_REV
31152
  { 14551,  1,  0,  0,  9,  0, 0x1a00040001ULL, ImplicitList4, ImplicitList1, OperandInfo2, -1 ,nullptr },  // Inst #14551 = XOR8i8
31153
  { 14552,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400004001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #14552 = XOR8mi
31154
  { 14553,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x410004001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr },  // Inst #14553 = XOR8mi8
31155
  { 14554,  6,  0,  0,  651,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1800000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr },  // Inst #14554 = XOR8mr
31156
  { 14555,  3,  1,  0,  9,  0, 0x4000040016ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #14555 = XOR8ri
31157
  { 14556,  3,  1,  0,  9,  0, 0x4100040016ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr },  // Inst #14556 = XOR8ri8
31158
  { 14557,  7,  1,  0,  12, 0|(1ULL<<MCID::MayLoad), 0x1900000006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr },  // Inst #14557 = XOR8rm
31159
  { 14558,  3,  1,  0,  9,  0|(1ULL<<MCID::Commutable), 0x1800000003ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #14558 = XOR8rr
31160
  { 14559,  3,  1,  0,  9,  0, 0x1900000005ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr },  // Inst #14559 = XOR8rr_REV
31161
  { 14560,  7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x2b90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #14560 = XORPDrm
31162
  { 14561,  3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x2b90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #14561 = XORPDrr
31163
  { 14562,  7,  1,  0,  942,  0|(1ULL<<MCID::MayLoad), 0x2b88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr },  // Inst #14562 = XORPSrm
31164
  { 14563,  3,  1,  0,  941,  0|(1ULL<<MCID::Commutable), 0x2b88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr },  // Inst #14563 = XORPSrr
31165
  { 14564,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x7980000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #14564 = XRELEASE_PREFIX
31166
  { 14565,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000401dULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14565 = XRSTOR
31167
  { 14566,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570002401dULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14566 = XRSTOR64
31168
  { 14567,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638000401bULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14567 = XRSTORS
31169
  { 14568,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638002401bULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14568 = XRSTORS64
31170
  { 14569,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000401cULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14569 = XSAVE
31171
  { 14570,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570002401cULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14570 = XSAVE64
31172
  { 14571,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638000401cULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14571 = XSAVEC
31173
  { 14572,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638002401cULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14572 = XSAVEC64
31174
  { 14573,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000481eULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14573 = XSAVEOPT
31175
  { 14574,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570002481eULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14574 = XSAVEOPT64
31176
  { 14575,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638000401dULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14575 = XSAVES
31177
  { 14576,  5,  0,  0,  56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638002401dULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr },  // Inst #14576 = XSAVES64
31178
  { 14577,  0,  0,  0,  56, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004031ULL, ImplicitList92, nullptr, nullptr, -1 ,nullptr },  // Inst #14577 = XSETBV
31179
  { 14578,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5300004028ULL, ImplicitList93, ImplicitList93, nullptr, -1 ,nullptr },  // Inst #14578 = XSHA1
31180
  { 14579,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5300004030ULL, ImplicitList93, ImplicitList93, nullptr, -1 ,nullptr },  // Inst #14579 = XSHA256
31181
  { 14580,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004020ULL, ImplicitList94, ImplicitList95, nullptr, -1 ,nullptr },  // Inst #14580 = XSTORE
31182
  { 14581,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004036ULL, nullptr, ImplicitList6, nullptr, -1 ,nullptr },  // Inst #14581 = XTEST
31183
  { 14582,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000041ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #14582 = fdisi8087_nop
31184
  { 14583,  0,  0,  0,  0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000040ULL, nullptr, nullptr, nullptr, -1 ,nullptr },  // Inst #14583 = feni8087_nop
31185
};
31186
31187
15.6k
static inline void InitX86MCInstrInfo(MCInstrInfo *II) {
31188
15.6k
  II->InitMCInstrInfo(X86Insts, NULL, NULL, 14584);
31189
15.6k
}
31190
31191
} // end llvm namespace 
31192
#endif // GET_INSTRINFO_MC_DESC
31193
31194
31195
#ifdef GET_INSTRINFO_HEADER
31196
#undef GET_INSTRINFO_HEADER
31197
namespace llvm_ks {
31198
struct X86GenInstrInfo : public TargetInstrInfo {
31199
  explicit X86GenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1);
31200
  ~X86GenInstrInfo() override {}
31201
};
31202
} // end llvm namespace 
31203
#endif // GET_INSTRINFO_HEADER