/src/keystone/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
Line | Count | Source (jump to first uncovered line) |
1 | | //===-- PPCMCTargetDesc.h - PowerPC Target Descriptions ---------*- C++ -*-===// |
2 | | // |
3 | | // The LLVM Compiler Infrastructure |
4 | | // |
5 | | // This file is distributed under the University of Illinois Open Source |
6 | | // License. See LICENSE.TXT for details. |
7 | | // |
8 | | //===----------------------------------------------------------------------===// |
9 | | // |
10 | | // This file provides PowerPC specific target descriptions. |
11 | | // |
12 | | //===----------------------------------------------------------------------===// |
13 | | |
14 | | #ifndef LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCMCTARGETDESC_H |
15 | | #define LLVM_LIB_TARGET_POWERPC_MCTARGETDESC_PPCMCTARGETDESC_H |
16 | | |
17 | | // GCC #defines PPC on Linux but we use it as our namespace name |
18 | | #undef PPC |
19 | | |
20 | | #include "llvm/Support/DataTypes.h" |
21 | | #include "llvm/Support/MathExtras.h" |
22 | | |
23 | | namespace llvm_ks { |
24 | | class MCAsmBackend; |
25 | | class MCCodeEmitter; |
26 | | class MCContext; |
27 | | class MCInstrInfo; |
28 | | class MCObjectWriter; |
29 | | class MCRegisterInfo; |
30 | | class MCSubtargetInfo; |
31 | | class Target; |
32 | | class Triple; |
33 | | class StringRef; |
34 | | class raw_pwrite_stream; |
35 | | class raw_ostream; |
36 | | |
37 | | extern Target ThePPC32Target; |
38 | | extern Target ThePPC64Target; |
39 | | extern Target ThePPC64LETarget; |
40 | | |
41 | | MCCodeEmitter *createPPCMCCodeEmitter(const MCInstrInfo &MCII, |
42 | | const MCRegisterInfo &MRI, |
43 | | MCContext &Ctx); |
44 | | |
45 | | MCAsmBackend *createPPCAsmBackend(const Target &T, const MCRegisterInfo &MRI, |
46 | | const Triple &TT, StringRef CPU); |
47 | | |
48 | | /// Construct an PPC ELF object writer. |
49 | | MCObjectWriter *createPPCELFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, |
50 | | bool IsLittleEndian, uint8_t OSABI); |
51 | | /// Construct a PPC Mach-O object writer. |
52 | | MCObjectWriter *createPPCMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, |
53 | | uint32_t CPUType, |
54 | | uint32_t CPUSubtype); |
55 | | |
56 | | /// Returns true iff Val consists of one contiguous run of 1s with any number of |
57 | | /// 0s on either side. The 1s are allowed to wrap from LSB to MSB, so |
58 | | /// 0x000FFF0, 0x0000FFFF, and 0xFF0000FF are all runs. 0x0F0F0000 is not, |
59 | | /// since all 1s are not contiguous. |
60 | 0 | static inline bool isRunOfOnes(unsigned Val, unsigned &MB, unsigned &ME) { |
61 | 0 | if (!Val) |
62 | 0 | return false; |
63 | | |
64 | 0 | if (isShiftedMask_32(Val)) { |
65 | | // look for the first non-zero bit |
66 | 0 | MB = countLeadingZeros(Val); |
67 | | // look for the first zero bit after the run of ones |
68 | 0 | ME = countLeadingZeros((Val - 1) ^ Val); |
69 | 0 | return true; |
70 | 0 | } else { |
71 | 0 | Val = ~Val; // invert mask |
72 | 0 | if (isShiftedMask_32(Val)) { |
73 | | // effectively look for the first zero bit |
74 | 0 | ME = countLeadingZeros(Val) - 1; |
75 | | // effectively look for the first one bit after the run of zeros |
76 | 0 | MB = countLeadingZeros((Val - 1) ^ Val) + 1; |
77 | 0 | return true; |
78 | 0 | } |
79 | 0 | } |
80 | | // no run present |
81 | 0 | return false; |
82 | 0 | } Unexecuted instantiation: PPCAsmParser.cpp:llvm_ks::isRunOfOnes(unsigned int, unsigned int&, unsigned int&) Unexecuted instantiation: PPCMCTargetDesc.cpp:llvm_ks::isRunOfOnes(unsigned int, unsigned int&, unsigned int&) Unexecuted instantiation: PowerPCTargetInfo.cpp:llvm_ks::isRunOfOnes(unsigned int, unsigned int&, unsigned int&) Unexecuted instantiation: PPCAsmBackend.cpp:llvm_ks::isRunOfOnes(unsigned int, unsigned int&, unsigned int&) Unexecuted instantiation: PPCELFObjectWriter.cpp:llvm_ks::isRunOfOnes(unsigned int, unsigned int&, unsigned int&) Unexecuted instantiation: PPCMCCodeEmitter.cpp:llvm_ks::isRunOfOnes(unsigned int, unsigned int&, unsigned int&) |
83 | | |
84 | | } // End llvm namespace |
85 | | |
86 | | // Generated files will use "namespace PPC". To avoid symbol clash, |
87 | | // undefine PPC here. PPC may be predefined on some hosts. |
88 | | #undef PPC |
89 | | |
90 | | // Defines symbolic names for PowerPC registers. This defines a mapping from |
91 | | // register name to register number. |
92 | | // |
93 | | #define GET_REGINFO_ENUM |
94 | | #include "PPCGenRegisterInfo.inc" |
95 | | |
96 | | // Defines symbolic names for the PowerPC instructions. |
97 | | // |
98 | | #define GET_INSTRINFO_ENUM |
99 | | #include "PPCGenInstrInfo.inc" |
100 | | |
101 | | #define GET_SUBTARGETINFO_ENUM |
102 | | #include "PPCGenSubtargetInfo.inc" |
103 | | |
104 | | #endif |