/src/keystone/llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
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1 | | //===-- MipsAsmBackend.h - Mips Asm Backend ------------------------------===// |
2 | | // |
3 | | // The LLVM Compiler Infrastructure |
4 | | // |
5 | | // This file is distributed under the University of Illinois Open Source |
6 | | // License. See LICENSE.TXT for details. |
7 | | // |
8 | | //===----------------------------------------------------------------------===// |
9 | | // |
10 | | // This file defines the MipsAsmBackend class. |
11 | | // |
12 | | //===----------------------------------------------------------------------===// |
13 | | // |
14 | | |
15 | | #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H |
16 | | #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H |
17 | | |
18 | | #include "MCTargetDesc/MipsFixupKinds.h" |
19 | | #include "llvm/ADT/Triple.h" |
20 | | #include "llvm/MC/MCAsmBackend.h" |
21 | | |
22 | | namespace llvm_ks { |
23 | | |
24 | | class MCAssembler; |
25 | | struct MCFixupKindInfo; |
26 | | class Target; |
27 | | class MCObjectWriter; |
28 | | |
29 | | class MipsAsmBackend : public MCAsmBackend { |
30 | | Triple::OSType OSType; |
31 | | bool IsLittle; // Big or little endian |
32 | | bool Is64Bit; // 32 or 64 bit words |
33 | | |
34 | | public: |
35 | | MipsAsmBackend(const Target &T, Triple::OSType OSType, bool IsLittle, |
36 | | bool Is64Bit) |
37 | 5.94k | : MCAsmBackend(), OSType(OSType), IsLittle(IsLittle), Is64Bit(Is64Bit) {} |
38 | | |
39 | | MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override; |
40 | | |
41 | | void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, |
42 | | uint64_t Value, bool IsPCRel, unsigned int &KsError) const override; |
43 | | |
44 | | Optional<MCFixupKind> getFixupKind(StringRef Name) const override; |
45 | | const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override; |
46 | | |
47 | 9.01k | unsigned getNumFixupKinds() const override { |
48 | 9.01k | return Mips::NumTargetFixupKinds; |
49 | 9.01k | } |
50 | | |
51 | | /// @name Target Relaxation Interfaces |
52 | | /// @{ |
53 | | |
54 | | /// MayNeedRelaxation - Check whether the given instruction may need |
55 | | /// relaxation. |
56 | | /// |
57 | | /// \param Inst - The instruction to test. |
58 | 22.4k | bool mayNeedRelaxation(const MCInst &Inst) const override { |
59 | 22.4k | return false; |
60 | 22.4k | } |
61 | | |
62 | | /// fixupNeedsRelaxation - Target specific predicate for whether a given |
63 | | /// fixup requires the associated instruction to be relaxed. |
64 | | bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, |
65 | | const MCRelaxableFragment *DF, |
66 | 0 | const MCAsmLayout &Layout, unsigned &KsError) const override { |
67 | | // FIXME. |
68 | 0 | llvm_unreachable("RelaxInstruction() unimplemented"); |
69 | 0 | return false; |
70 | 0 | } |
71 | | |
72 | | /// RelaxInstruction - Relax the instruction in the given fragment |
73 | | /// to the next wider instruction. |
74 | | /// |
75 | | /// \param Inst - The instruction to relax, which may be the same |
76 | | /// as the output. |
77 | | /// \param [out] Res On return, the relaxed instruction. |
78 | 0 | void relaxInstruction(const MCInst &Inst, MCInst &Res) const override {} |
79 | | |
80 | | /// @} |
81 | | |
82 | | bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override; |
83 | | |
84 | | void processFixupValue(const MCAssembler &Asm, const MCAsmLayout &Layout, |
85 | | const MCFixup &Fixup, const MCFragment *DF, |
86 | | const MCValue &Target, uint64_t &Value, |
87 | | bool &IsResolved) override; |
88 | | |
89 | | }; // class MipsAsmBackend |
90 | | |
91 | | } // namespace |
92 | | |
93 | | #endif |