/src/keystone/llvm/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc
Line | Count | Source (jump to first uncovered line) |
1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* Machine Code Emitter *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* *| |
7 | | \*===----------------------------------------------------------------------===*/ |
8 | | |
9 | | uint64_t PPCMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI, |
10 | | SmallVectorImpl<MCFixup> &Fixups, |
11 | 30.0k | const MCSubtargetInfo &STI) const { |
12 | 30.0k | static const uint64_t InstBits[] = { |
13 | 30.0k | UINT64_C(0), |
14 | 30.0k | UINT64_C(0), |
15 | 30.0k | UINT64_C(0), |
16 | 30.0k | UINT64_C(0), |
17 | 30.0k | UINT64_C(0), |
18 | 30.0k | UINT64_C(0), |
19 | 30.0k | UINT64_C(0), |
20 | 30.0k | UINT64_C(0), |
21 | 30.0k | UINT64_C(0), |
22 | 30.0k | UINT64_C(0), |
23 | 30.0k | UINT64_C(0), |
24 | 30.0k | UINT64_C(0), |
25 | 30.0k | UINT64_C(0), |
26 | 30.0k | UINT64_C(0), |
27 | 30.0k | UINT64_C(0), |
28 | 30.0k | UINT64_C(0), |
29 | 30.0k | UINT64_C(0), |
30 | 30.0k | UINT64_C(0), |
31 | 30.0k | UINT64_C(0), |
32 | 30.0k | UINT64_C(0), |
33 | 30.0k | UINT64_C(0), |
34 | 30.0k | UINT64_C(0), |
35 | 30.0k | UINT64_C(0), |
36 | 30.0k | UINT64_C(0), |
37 | 30.0k | UINT64_C(2080375316), // ADD4 |
38 | 30.0k | UINT64_C(2080375316), // ADD4TLS |
39 | 30.0k | UINT64_C(2080375317), // ADD4o |
40 | 30.0k | UINT64_C(2080375316), // ADD8 |
41 | 30.0k | UINT64_C(2080375316), // ADD8TLS |
42 | 30.0k | UINT64_C(2080375316), // ADD8TLS_ |
43 | 30.0k | UINT64_C(2080375317), // ADD8o |
44 | 30.0k | UINT64_C(2080374804), // ADDC |
45 | 30.0k | UINT64_C(2080374804), // ADDC8 |
46 | 30.0k | UINT64_C(2080374805), // ADDC8o |
47 | 30.0k | UINT64_C(2080374805), // ADDCo |
48 | 30.0k | UINT64_C(2080375060), // ADDE |
49 | 30.0k | UINT64_C(2080375060), // ADDE8 |
50 | 30.0k | UINT64_C(2080375061), // ADDE8o |
51 | 30.0k | UINT64_C(2080375061), // ADDEo |
52 | 30.0k | UINT64_C(939524096), // ADDI |
53 | 30.0k | UINT64_C(939524096), // ADDI8 |
54 | 30.0k | UINT64_C(805306368), // ADDIC |
55 | 30.0k | UINT64_C(805306368), // ADDIC8 |
56 | 30.0k | UINT64_C(872415232), // ADDICo |
57 | 30.0k | UINT64_C(1006632960), // ADDIS |
58 | 30.0k | UINT64_C(1006632960), // ADDIS8 |
59 | 30.0k | UINT64_C(0), // ADDISdtprelHA |
60 | 30.0k | UINT64_C(0), // ADDISdtprelHA32 |
61 | 30.0k | UINT64_C(0), // ADDISgotTprelHA |
62 | 30.0k | UINT64_C(0), // ADDIStlsgdHA |
63 | 30.0k | UINT64_C(0), // ADDIStlsldHA |
64 | 30.0k | UINT64_C(0), // ADDIStocHA |
65 | 30.0k | UINT64_C(0), // ADDIdtprelL |
66 | 30.0k | UINT64_C(0), // ADDIdtprelL32 |
67 | 30.0k | UINT64_C(0), // ADDItlsgdL |
68 | 30.0k | UINT64_C(0), // ADDItlsgdL32 |
69 | 30.0k | UINT64_C(0), // ADDItlsgdLADDR |
70 | 30.0k | UINT64_C(0), // ADDItlsgdLADDR32 |
71 | 30.0k | UINT64_C(0), // ADDItlsldL |
72 | 30.0k | UINT64_C(0), // ADDItlsldL32 |
73 | 30.0k | UINT64_C(0), // ADDItlsldLADDR |
74 | 30.0k | UINT64_C(0), // ADDItlsldLADDR32 |
75 | 30.0k | UINT64_C(0), // ADDItocL |
76 | 30.0k | UINT64_C(2080375252), // ADDME |
77 | 30.0k | UINT64_C(2080375252), // ADDME8 |
78 | 30.0k | UINT64_C(2080375253), // ADDME8o |
79 | 30.0k | UINT64_C(2080375253), // ADDMEo |
80 | 30.0k | UINT64_C(2080375188), // ADDZE |
81 | 30.0k | UINT64_C(2080375188), // ADDZE8 |
82 | 30.0k | UINT64_C(2080375189), // ADDZE8o |
83 | 30.0k | UINT64_C(2080375189), // ADDZEo |
84 | 30.0k | UINT64_C(0), // ADJCALLSTACKDOWN |
85 | 30.0k | UINT64_C(0), // ADJCALLSTACKUP |
86 | 30.0k | UINT64_C(2080374840), // AND |
87 | 30.0k | UINT64_C(2080374840), // AND8 |
88 | 30.0k | UINT64_C(2080374841), // AND8o |
89 | 30.0k | UINT64_C(2080374904), // ANDC |
90 | 30.0k | UINT64_C(2080374904), // ANDC8 |
91 | 30.0k | UINT64_C(2080374905), // ANDC8o |
92 | 30.0k | UINT64_C(2080374905), // ANDCo |
93 | 30.0k | UINT64_C(1946157056), // ANDISo |
94 | 30.0k | UINT64_C(1946157056), // ANDISo8 |
95 | 30.0k | UINT64_C(1879048192), // ANDIo |
96 | 30.0k | UINT64_C(1879048192), // ANDIo8 |
97 | 30.0k | UINT64_C(0), // ANDIo_1_EQ_BIT |
98 | 30.0k | UINT64_C(0), // ANDIo_1_EQ_BIT8 |
99 | 30.0k | UINT64_C(0), // ANDIo_1_GT_BIT |
100 | 30.0k | UINT64_C(0), // ANDIo_1_GT_BIT8 |
101 | 30.0k | UINT64_C(2080374841), // ANDo |
102 | 30.0k | UINT64_C(0), // ATOMIC_CMP_SWAP_I16 |
103 | 30.0k | UINT64_C(0), // ATOMIC_CMP_SWAP_I32 |
104 | 30.0k | UINT64_C(0), // ATOMIC_CMP_SWAP_I64 |
105 | 30.0k | UINT64_C(0), // ATOMIC_CMP_SWAP_I8 |
106 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_ADD_I16 |
107 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_ADD_I32 |
108 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_ADD_I64 |
109 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_ADD_I8 |
110 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_AND_I16 |
111 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_AND_I32 |
112 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_AND_I64 |
113 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_AND_I8 |
114 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_NAND_I16 |
115 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_NAND_I32 |
116 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_NAND_I64 |
117 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_NAND_I8 |
118 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_OR_I16 |
119 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_OR_I32 |
120 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_OR_I64 |
121 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_OR_I8 |
122 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_SUB_I16 |
123 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_SUB_I32 |
124 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_SUB_I64 |
125 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_SUB_I8 |
126 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_XOR_I16 |
127 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_XOR_I32 |
128 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_XOR_I64 |
129 | 30.0k | UINT64_C(0), // ATOMIC_LOAD_XOR_I8 |
130 | 30.0k | UINT64_C(0), // ATOMIC_SWAP_I16 |
131 | 30.0k | UINT64_C(0), // ATOMIC_SWAP_I32 |
132 | 30.0k | UINT64_C(0), // ATOMIC_SWAP_I64 |
133 | 30.0k | UINT64_C(0), // ATOMIC_SWAP_I8 |
134 | 30.0k | UINT64_C(512), // ATTN |
135 | 30.0k | UINT64_C(1207959552), // B |
136 | 30.0k | UINT64_C(1207959554), // BA |
137 | 30.0k | UINT64_C(1098907648), // BC |
138 | 30.0k | UINT64_C(1073741824), // BCC |
139 | 30.0k | UINT64_C(1073741826), // BCCA |
140 | 30.0k | UINT64_C(1275069472), // BCCCTR |
141 | 30.0k | UINT64_C(1275069472), // BCCCTR8 |
142 | 30.0k | UINT64_C(1275069473), // BCCCTRL |
143 | 30.0k | UINT64_C(1275069473), // BCCCTRL8 |
144 | 30.0k | UINT64_C(1073741825), // BCCL |
145 | 30.0k | UINT64_C(1073741827), // BCCLA |
146 | 30.0k | UINT64_C(1275068448), // BCCLR |
147 | 30.0k | UINT64_C(1275068449), // BCCLRL |
148 | 30.0k | UINT64_C(1300235296), // BCCTR |
149 | 30.0k | UINT64_C(1300235296), // BCCTR8 |
150 | 30.0k | UINT64_C(1283458080), // BCCTR8n |
151 | 30.0k | UINT64_C(1300235297), // BCCTRL |
152 | 30.0k | UINT64_C(1300235297), // BCCTRL8 |
153 | 30.0k | UINT64_C(1283458081), // BCCTRL8n |
154 | 30.0k | UINT64_C(1283458081), // BCCTRLn |
155 | 30.0k | UINT64_C(1283458080), // BCCTRn |
156 | 30.0k | UINT64_C(1098907649), // BCL |
157 | 30.0k | UINT64_C(1300234272), // BCLR |
158 | 30.0k | UINT64_C(1300234273), // BCLRL |
159 | 30.0k | UINT64_C(1283457057), // BCLRLn |
160 | 30.0k | UINT64_C(1283457056), // BCLRn |
161 | 30.0k | UINT64_C(1117716481), // BCLalways |
162 | 30.0k | UINT64_C(1082130433), // BCLn |
163 | 30.0k | UINT64_C(1317012512), // BCTR |
164 | 30.0k | UINT64_C(1317012512), // BCTR8 |
165 | 30.0k | UINT64_C(1317012513), // BCTRL |
166 | 30.0k | UINT64_C(1317012513), // BCTRL8 |
167 | 30.0k | UINT64_C(5656525675654283264), // BCTRL8_LDinto_toc |
168 | 30.0k | UINT64_C(1082130432), // BCn |
169 | 30.0k | UINT64_C(1107296256), // BDNZ |
170 | 30.0k | UINT64_C(1107296256), // BDNZ8 |
171 | 30.0k | UINT64_C(1107296258), // BDNZA |
172 | 30.0k | UINT64_C(1124073474), // BDNZAm |
173 | 30.0k | UINT64_C(1126170626), // BDNZAp |
174 | 30.0k | UINT64_C(1107296257), // BDNZL |
175 | 30.0k | UINT64_C(1107296259), // BDNZLA |
176 | 30.0k | UINT64_C(1124073475), // BDNZLAm |
177 | 30.0k | UINT64_C(1126170627), // BDNZLAp |
178 | 30.0k | UINT64_C(1308622880), // BDNZLR |
179 | 30.0k | UINT64_C(1308622880), // BDNZLR8 |
180 | 30.0k | UINT64_C(1308622881), // BDNZLRL |
181 | 30.0k | UINT64_C(1325400097), // BDNZLRLm |
182 | 30.0k | UINT64_C(1327497249), // BDNZLRLp |
183 | 30.0k | UINT64_C(1325400096), // BDNZLRm |
184 | 30.0k | UINT64_C(1327497248), // BDNZLRp |
185 | 30.0k | UINT64_C(1124073473), // BDNZLm |
186 | 30.0k | UINT64_C(1126170625), // BDNZLp |
187 | 30.0k | UINT64_C(1124073472), // BDNZm |
188 | 30.0k | UINT64_C(1126170624), // BDNZp |
189 | 30.0k | UINT64_C(1111490560), // BDZ |
190 | 30.0k | UINT64_C(1111490560), // BDZ8 |
191 | 30.0k | UINT64_C(1111490562), // BDZA |
192 | 30.0k | UINT64_C(1128267778), // BDZAm |
193 | 30.0k | UINT64_C(1130364930), // BDZAp |
194 | 30.0k | UINT64_C(1111490561), // BDZL |
195 | 30.0k | UINT64_C(1111490563), // BDZLA |
196 | 30.0k | UINT64_C(1128267779), // BDZLAm |
197 | 30.0k | UINT64_C(1130364931), // BDZLAp |
198 | 30.0k | UINT64_C(1312817184), // BDZLR |
199 | 30.0k | UINT64_C(1312817184), // BDZLR8 |
200 | 30.0k | UINT64_C(1312817185), // BDZLRL |
201 | 30.0k | UINT64_C(1329594401), // BDZLRLm |
202 | 30.0k | UINT64_C(1331691553), // BDZLRLp |
203 | 30.0k | UINT64_C(1329594400), // BDZLRm |
204 | 30.0k | UINT64_C(1331691552), // BDZLRp |
205 | 30.0k | UINT64_C(1128267777), // BDZLm |
206 | 30.0k | UINT64_C(1130364929), // BDZLp |
207 | 30.0k | UINT64_C(1128267776), // BDZm |
208 | 30.0k | UINT64_C(1130364928), // BDZp |
209 | 30.0k | UINT64_C(1207959553), // BL |
210 | 30.0k | UINT64_C(1207959553), // BL8 |
211 | 30.0k | UINT64_C(5188146776636391424), // BL8_NOP |
212 | 30.0k | UINT64_C(5188146776636391424), // BL8_NOP_TLS |
213 | 30.0k | UINT64_C(1207959553), // BL8_TLS |
214 | 30.0k | UINT64_C(1207959553), // BL8_TLS_ |
215 | 30.0k | UINT64_C(1207959555), // BLA |
216 | 30.0k | UINT64_C(1207959555), // BLA8 |
217 | 30.0k | UINT64_C(5188146785226326016), // BLA8_NOP |
218 | 30.0k | UINT64_C(1317011488), // BLR |
219 | 30.0k | UINT64_C(1317011488), // BLR8 |
220 | 30.0k | UINT64_C(1317011489), // BLRL |
221 | 30.0k | UINT64_C(1207959553), // BL_TLS |
222 | 30.0k | UINT64_C(2080375288), // BPERMD |
223 | 30.0k | UINT64_C(268435983), // BRINC |
224 | 30.0k | UINT64_C(2080375644), // CLRBHRB |
225 | 30.0k | UINT64_C(0), |
226 | 30.0k | UINT64_C(0), |
227 | 30.0k | UINT64_C(0), |
228 | 30.0k | UINT64_C(0), |
229 | 30.0k | UINT64_C(0), |
230 | 30.0k | UINT64_C(0), |
231 | 30.0k | UINT64_C(0), |
232 | 30.0k | UINT64_C(0), |
233 | 30.0k | UINT64_C(2080375800), // CMPB |
234 | 30.0k | UINT64_C(2080375800), // CMPB8 |
235 | 30.0k | UINT64_C(2082471936), // CMPD |
236 | 30.0k | UINT64_C(740294656), // CMPDI |
237 | 30.0k | UINT64_C(2082472000), // CMPLD |
238 | 30.0k | UINT64_C(673185792), // CMPLDI |
239 | 30.0k | UINT64_C(2080374848), // CMPLW |
240 | 30.0k | UINT64_C(671088640), // CMPLWI |
241 | 30.0k | UINT64_C(2080374784), // CMPW |
242 | 30.0k | UINT64_C(738197504), // CMPWI |
243 | 30.0k | UINT64_C(2080374900), // CNTLZD |
244 | 30.0k | UINT64_C(2080374901), // CNTLZDo |
245 | 30.0k | UINT64_C(2080374836), // CNTLZW |
246 | 30.0k | UINT64_C(2080374836), // CNTLZW8 |
247 | 30.0k | UINT64_C(2080374837), // CNTLZW8o |
248 | 30.0k | UINT64_C(2080374837), // CNTLZWo |
249 | 30.0k | UINT64_C(1288057410), // CR6SET |
250 | 30.0k | UINT64_C(1288057218), // CR6UNSET |
251 | 30.0k | UINT64_C(1275068930), // CRAND |
252 | 30.0k | UINT64_C(1275068674), // CRANDC |
253 | 30.0k | UINT64_C(1275068994), // CREQV |
254 | 30.0k | UINT64_C(1275068866), // CRNAND |
255 | 30.0k | UINT64_C(1275068482), // CRNOR |
256 | 30.0k | UINT64_C(1275069314), // CROR |
257 | 30.0k | UINT64_C(1275069250), // CRORC |
258 | 30.0k | UINT64_C(1275068994), // CRSET |
259 | 30.0k | UINT64_C(1275068802), // CRUNSET |
260 | 30.0k | UINT64_C(1275068802), // CRXOR |
261 | 30.0k | UINT64_C(2080376300), // DCBA |
262 | 30.0k | UINT64_C(2080374956), // DCBF |
263 | 30.0k | UINT64_C(2080375724), // DCBI |
264 | 30.0k | UINT64_C(2080374892), // DCBST |
265 | 30.0k | UINT64_C(2080375340), // DCBT |
266 | 30.0k | UINT64_C(0), |
267 | 30.0k | UINT64_C(0), |
268 | 30.0k | UINT64_C(2080375276), // DCBTST |
269 | 30.0k | UINT64_C(0), |
270 | 30.0k | UINT64_C(0), |
271 | 30.0k | UINT64_C(0), |
272 | 30.0k | UINT64_C(0), |
273 | 30.0k | UINT64_C(0), |
274 | 30.0k | UINT64_C(0), |
275 | 30.0k | UINT64_C(2080376812), // DCBZ |
276 | 30.0k | UINT64_C(2082473964), // DCBZL |
277 | 30.0k | UINT64_C(2080375692), // DCCCI |
278 | 30.0k | UINT64_C(2080375762), // DIVD |
279 | 30.0k | UINT64_C(2080375634), // DIVDE |
280 | 30.0k | UINT64_C(2080375570), // DIVDEU |
281 | 30.0k | UINT64_C(2080375571), // DIVDEUo |
282 | 30.0k | UINT64_C(2080375635), // DIVDEo |
283 | 30.0k | UINT64_C(2080375698), // DIVDU |
284 | 30.0k | UINT64_C(2080375699), // DIVDUo |
285 | 30.0k | UINT64_C(2080375763), // DIVDo |
286 | 30.0k | UINT64_C(2080375766), // DIVW |
287 | 30.0k | UINT64_C(2080375638), // DIVWE |
288 | 30.0k | UINT64_C(2080375574), // DIVWEU |
289 | 30.0k | UINT64_C(2080375575), // DIVWEUo |
290 | 30.0k | UINT64_C(2080375639), // DIVWEo |
291 | 30.0k | UINT64_C(2080375702), // DIVWU |
292 | 30.0k | UINT64_C(2080375703), // DIVWUo |
293 | 30.0k | UINT64_C(2080375767), // DIVWo |
294 | 30.0k | UINT64_C(2080376428), // DSS |
295 | 30.0k | UINT64_C(2113930860), // DSSALL |
296 | 30.0k | UINT64_C(2080375468), // DST |
297 | 30.0k | UINT64_C(2080375468), // DST64 |
298 | 30.0k | UINT64_C(2080375532), // DSTST |
299 | 30.0k | UINT64_C(2080375532), // DSTST64 |
300 | 30.0k | UINT64_C(2113929964), // DSTSTT |
301 | 30.0k | UINT64_C(2113929964), // DSTSTT64 |
302 | 30.0k | UINT64_C(2113929900), // DSTT |
303 | 30.0k | UINT64_C(2113929900), // DSTT64 |
304 | 30.0k | UINT64_C(0), // DYNALLOC |
305 | 30.0k | UINT64_C(0), // DYNALLOC8 |
306 | 30.0k | UINT64_C(0), // DYNAREAOFFSET |
307 | 30.0k | UINT64_C(0), // DYNAREAOFFSET8 |
308 | 30.0k | UINT64_C(0), // EH_SjLj_LongJmp32 |
309 | 30.0k | UINT64_C(0), // EH_SjLj_LongJmp64 |
310 | 30.0k | UINT64_C(0), // EH_SjLj_SetJmp32 |
311 | 30.0k | UINT64_C(0), // EH_SjLj_SetJmp64 |
312 | 30.0k | UINT64_C(0), // EH_SjLj_Setup |
313 | 30.0k | UINT64_C(2080375352), // EQV |
314 | 30.0k | UINT64_C(2080375352), // EQV8 |
315 | 30.0k | UINT64_C(2080375353), // EQV8o |
316 | 30.0k | UINT64_C(2080375353), // EQVo |
317 | 30.0k | UINT64_C(268435976), // EVABS |
318 | 30.0k | UINT64_C(268435970), // EVADDIW |
319 | 30.0k | UINT64_C(268436681), // EVADDSMIAAW |
320 | 30.0k | UINT64_C(268436673), // EVADDSSIAAW |
321 | 30.0k | UINT64_C(268436680), // EVADDUMIAAW |
322 | 30.0k | UINT64_C(268436672), // EVADDUSIAAW |
323 | 30.0k | UINT64_C(268435968), // EVADDW |
324 | 30.0k | UINT64_C(268435985), // EVAND |
325 | 30.0k | UINT64_C(268435986), // EVANDC |
326 | 30.0k | UINT64_C(268436020), // EVCMPEQ |
327 | 30.0k | UINT64_C(268436017), // EVCMPGTS |
328 | 30.0k | UINT64_C(268436016), // EVCMPGTU |
329 | 30.0k | UINT64_C(268436019), // EVCMPLTS |
330 | 30.0k | UINT64_C(268436018), // EVCMPLTU |
331 | 30.0k | UINT64_C(268435982), // EVCNTLSW |
332 | 30.0k | UINT64_C(268435981), // EVCNTLZW |
333 | 30.0k | UINT64_C(268436678), // EVDIVWS |
334 | 30.0k | UINT64_C(268436679), // EVDIVWU |
335 | 30.0k | UINT64_C(268435993), // EVEQV |
336 | 30.0k | UINT64_C(268435978), // EVEXTSB |
337 | 30.0k | UINT64_C(268435979), // EVEXTSH |
338 | 30.0k | UINT64_C(268436225), // EVLDD |
339 | 30.0k | UINT64_C(268436224), // EVLDDX |
340 | 30.0k | UINT64_C(268436229), // EVLDH |
341 | 30.0k | UINT64_C(268436228), // EVLDHX |
342 | 30.0k | UINT64_C(268436227), // EVLDW |
343 | 30.0k | UINT64_C(268436226), // EVLDWX |
344 | 30.0k | UINT64_C(268436233), // EVLHHESPLAT |
345 | 30.0k | UINT64_C(268436232), // EVLHHESPLATX |
346 | 30.0k | UINT64_C(268436239), // EVLHHOSSPLAT |
347 | 30.0k | UINT64_C(268436238), // EVLHHOSSPLATX |
348 | 30.0k | UINT64_C(268436237), // EVLHHOUSPLAT |
349 | 30.0k | UINT64_C(268436236), // EVLHHOUSPLATX |
350 | 30.0k | UINT64_C(268436241), // EVLWHE |
351 | 30.0k | UINT64_C(268436240), // EVLWHEX |
352 | 30.0k | UINT64_C(268436247), // EVLWHOS |
353 | 30.0k | UINT64_C(268436246), // EVLWHOSX |
354 | 30.0k | UINT64_C(268436245), // EVLWHOU |
355 | 30.0k | UINT64_C(268436244), // EVLWHOUX |
356 | 30.0k | UINT64_C(268436253), // EVLWHSPLAT |
357 | 30.0k | UINT64_C(268436252), // EVLWHSPLATX |
358 | 30.0k | UINT64_C(268436249), // EVLWWSPLAT |
359 | 30.0k | UINT64_C(268436248), // EVLWWSPLATX |
360 | 30.0k | UINT64_C(268436012), // EVMERGEHI |
361 | 30.0k | UINT64_C(268436014), // EVMERGEHILO |
362 | 30.0k | UINT64_C(268436013), // EVMERGELO |
363 | 30.0k | UINT64_C(268436015), // EVMERGELOHI |
364 | 30.0k | UINT64_C(268436779), // EVMHEGSMFAA |
365 | 30.0k | UINT64_C(268436907), // EVMHEGSMFAN |
366 | 30.0k | UINT64_C(268436777), // EVMHEGSMIAA |
367 | 30.0k | UINT64_C(268436905), // EVMHEGSMIAN |
368 | 30.0k | UINT64_C(268436776), // EVMHEGUMIAA |
369 | 30.0k | UINT64_C(268436904), // EVMHEGUMIAN |
370 | 30.0k | UINT64_C(268436491), // EVMHESMF |
371 | 30.0k | UINT64_C(268436523), // EVMHESMFA |
372 | 30.0k | UINT64_C(268436747), // EVMHESMFAAW |
373 | 30.0k | UINT64_C(268436875), // EVMHESMFANW |
374 | 30.0k | UINT64_C(268436489), // EVMHESMI |
375 | 30.0k | UINT64_C(268436521), // EVMHESMIA |
376 | 30.0k | UINT64_C(268436745), // EVMHESMIAAW |
377 | 30.0k | UINT64_C(268436873), // EVMHESMIANW |
378 | 30.0k | UINT64_C(268436483), // EVMHESSF |
379 | 30.0k | UINT64_C(268436515), // EVMHESSFA |
380 | 30.0k | UINT64_C(268436739), // EVMHESSFAAW |
381 | 30.0k | UINT64_C(268436867), // EVMHESSFANW |
382 | 30.0k | UINT64_C(268436737), // EVMHESSIAAW |
383 | 30.0k | UINT64_C(268436865), // EVMHESSIANW |
384 | 30.0k | UINT64_C(268436488), // EVMHEUMI |
385 | 30.0k | UINT64_C(268436520), // EVMHEUMIA |
386 | 30.0k | UINT64_C(268436744), // EVMHEUMIAAW |
387 | 30.0k | UINT64_C(268436872), // EVMHEUMIANW |
388 | 30.0k | UINT64_C(268436736), // EVMHEUSIAAW |
389 | 30.0k | UINT64_C(268436864), // EVMHEUSIANW |
390 | 30.0k | UINT64_C(268436783), // EVMHOGSMFAA |
391 | 30.0k | UINT64_C(268436911), // EVMHOGSMFAN |
392 | 30.0k | UINT64_C(268436781), // EVMHOGSMIAA |
393 | 30.0k | UINT64_C(268436909), // EVMHOGSMIAN |
394 | 30.0k | UINT64_C(268436780), // EVMHOGUMIAA |
395 | 30.0k | UINT64_C(268436908), // EVMHOGUMIAN |
396 | 30.0k | UINT64_C(268436495), // EVMHOSMF |
397 | 30.0k | UINT64_C(268436527), // EVMHOSMFA |
398 | 30.0k | UINT64_C(268436751), // EVMHOSMFAAW |
399 | 30.0k | UINT64_C(268436879), // EVMHOSMFANW |
400 | 30.0k | UINT64_C(268436493), // EVMHOSMI |
401 | 30.0k | UINT64_C(268436525), // EVMHOSMIA |
402 | 30.0k | UINT64_C(268436749), // EVMHOSMIAAW |
403 | 30.0k | UINT64_C(268436877), // EVMHOSMIANW |
404 | 30.0k | UINT64_C(268436487), // EVMHOSSF |
405 | 30.0k | UINT64_C(268436519), // EVMHOSSFA |
406 | 30.0k | UINT64_C(268436743), // EVMHOSSFAAW |
407 | 30.0k | UINT64_C(268436871), // EVMHOSSFANW |
408 | 30.0k | UINT64_C(268436741), // EVMHOSSIAAW |
409 | 30.0k | UINT64_C(268436869), // EVMHOSSIANW |
410 | 30.0k | UINT64_C(268436492), // EVMHOUMI |
411 | 30.0k | UINT64_C(268436524), // EVMHOUMIA |
412 | 30.0k | UINT64_C(268436748), // EVMHOUMIAAW |
413 | 30.0k | UINT64_C(268436876), // EVMHOUMIANW |
414 | 30.0k | UINT64_C(268436740), // EVMHOUSIAAW |
415 | 30.0k | UINT64_C(268436868), // EVMHOUSIANW |
416 | 30.0k | UINT64_C(268436676), // EVMRA |
417 | 30.0k | UINT64_C(268436559), // EVMWHSMF |
418 | 30.0k | UINT64_C(268436591), // EVMWHSMFA |
419 | 30.0k | UINT64_C(268436557), // EVMWHSMI |
420 | 30.0k | UINT64_C(268436589), // EVMWHSMIA |
421 | 30.0k | UINT64_C(268436551), // EVMWHSSF |
422 | 30.0k | UINT64_C(268436583), // EVMWHSSFA |
423 | 30.0k | UINT64_C(268436556), // EVMWHUMI |
424 | 30.0k | UINT64_C(268436588), // EVMWHUMIA |
425 | 30.0k | UINT64_C(268436809), // EVMWLSMIAAW |
426 | 30.0k | UINT64_C(268436937), // EVMWLSMIANW |
427 | 30.0k | UINT64_C(268436801), // EVMWLSSIAAW |
428 | 30.0k | UINT64_C(268436929), // EVMWLSSIANW |
429 | 30.0k | UINT64_C(268436552), // EVMWLUMI |
430 | 30.0k | UINT64_C(268436584), // EVMWLUMIA |
431 | 30.0k | UINT64_C(268436808), // EVMWLUMIAAW |
432 | 30.0k | UINT64_C(268436936), // EVMWLUMIANW |
433 | 30.0k | UINT64_C(268436800), // EVMWLUSIAAW |
434 | 30.0k | UINT64_C(268436928), // EVMWLUSIANW |
435 | 30.0k | UINT64_C(268436571), // EVMWSMF |
436 | 30.0k | UINT64_C(268436603), // EVMWSMFA |
437 | 30.0k | UINT64_C(268436827), // EVMWSMFAA |
438 | 30.0k | UINT64_C(268436955), // EVMWSMFAN |
439 | 30.0k | UINT64_C(268436569), // EVMWSMI |
440 | 30.0k | UINT64_C(268436601), // EVMWSMIA |
441 | 30.0k | UINT64_C(268436825), // EVMWSMIAA |
442 | 30.0k | UINT64_C(268436953), // EVMWSMIAN |
443 | 30.0k | UINT64_C(268436563), // EVMWSSF |
444 | 30.0k | UINT64_C(268436595), // EVMWSSFA |
445 | 30.0k | UINT64_C(268436819), // EVMWSSFAA |
446 | 30.0k | UINT64_C(268436947), // EVMWSSFAN |
447 | 30.0k | UINT64_C(268436568), // EVMWUMI |
448 | 30.0k | UINT64_C(268436600), // EVMWUMIA |
449 | 30.0k | UINT64_C(268436824), // EVMWUMIAA |
450 | 30.0k | UINT64_C(268436952), // EVMWUMIAN |
451 | 30.0k | UINT64_C(268435998), // EVNAND |
452 | 30.0k | UINT64_C(268435977), // EVNEG |
453 | 30.0k | UINT64_C(268435992), // EVNOR |
454 | 30.0k | UINT64_C(268435991), // EVOR |
455 | 30.0k | UINT64_C(268435995), // EVORC |
456 | 30.0k | UINT64_C(268436008), // EVRLW |
457 | 30.0k | UINT64_C(268436010), // EVRLWI |
458 | 30.0k | UINT64_C(268435980), // EVRNDW |
459 | 30.0k | UINT64_C(268436004), // EVSLW |
460 | 30.0k | UINT64_C(268436006), // EVSLWI |
461 | 30.0k | UINT64_C(268436011), // EVSPLATFI |
462 | 30.0k | UINT64_C(268436009), // EVSPLATI |
463 | 30.0k | UINT64_C(268436003), // EVSRWIS |
464 | 30.0k | UINT64_C(268436002), // EVSRWIU |
465 | 30.0k | UINT64_C(268436001), // EVSRWS |
466 | 30.0k | UINT64_C(268436000), // EVSRWU |
467 | 30.0k | UINT64_C(268436257), // EVSTDD |
468 | 30.0k | UINT64_C(268436256), // EVSTDDX |
469 | 30.0k | UINT64_C(268436261), // EVSTDH |
470 | 30.0k | UINT64_C(268436260), // EVSTDHX |
471 | 30.0k | UINT64_C(268436259), // EVSTDW |
472 | 30.0k | UINT64_C(268436258), // EVSTDWX |
473 | 30.0k | UINT64_C(268436273), // EVSTWHE |
474 | 30.0k | UINT64_C(268436272), // EVSTWHEX |
475 | 30.0k | UINT64_C(268436277), // EVSTWHO |
476 | 30.0k | UINT64_C(268436276), // EVSTWHOX |
477 | 30.0k | UINT64_C(268436281), // EVSTWWE |
478 | 30.0k | UINT64_C(268436280), // EVSTWWEX |
479 | 30.0k | UINT64_C(268436285), // EVSTWWO |
480 | 30.0k | UINT64_C(268436284), // EVSTWWOX |
481 | 30.0k | UINT64_C(268436683), // EVSUBFSMIAAW |
482 | 30.0k | UINT64_C(268436675), // EVSUBFSSIAAW |
483 | 30.0k | UINT64_C(268436682), // EVSUBFUMIAAW |
484 | 30.0k | UINT64_C(268436674), // EVSUBFUSIAAW |
485 | 30.0k | UINT64_C(268435972), // EVSUBFW |
486 | 30.0k | UINT64_C(268435974), // EVSUBIFW |
487 | 30.0k | UINT64_C(268435990), // EVXOR |
488 | 30.0k | UINT64_C(0), |
489 | 30.0k | UINT64_C(0), |
490 | 30.0k | UINT64_C(0), |
491 | 30.0k | UINT64_C(0), |
492 | 30.0k | UINT64_C(0), |
493 | 30.0k | UINT64_C(0), |
494 | 30.0k | UINT64_C(0), |
495 | 30.0k | UINT64_C(0), |
496 | 30.0k | UINT64_C(2080376692), // EXTSB |
497 | 30.0k | UINT64_C(2080376692), // EXTSB8 |
498 | 30.0k | UINT64_C(2080376692), // EXTSB8_32_64 |
499 | 30.0k | UINT64_C(2080376693), // EXTSB8o |
500 | 30.0k | UINT64_C(2080376693), // EXTSBo |
501 | 30.0k | UINT64_C(2080376628), // EXTSH |
502 | 30.0k | UINT64_C(2080376628), // EXTSH8 |
503 | 30.0k | UINT64_C(2080376628), // EXTSH8_32_64 |
504 | 30.0k | UINT64_C(2080376629), // EXTSH8o |
505 | 30.0k | UINT64_C(2080376629), // EXTSHo |
506 | 30.0k | UINT64_C(2080376756), // EXTSW |
507 | 30.0k | UINT64_C(2080376756), // EXTSW_32_64 |
508 | 30.0k | UINT64_C(2080376757), // EXTSW_32_64o |
509 | 30.0k | UINT64_C(2080376757), // EXTSWo |
510 | 30.0k | UINT64_C(2080376492), // EnforceIEIO |
511 | 30.0k | UINT64_C(4227858960), // FABSD |
512 | 30.0k | UINT64_C(4227858961), // FABSDo |
513 | 30.0k | UINT64_C(4227858960), // FABSS |
514 | 30.0k | UINT64_C(4227858961), // FABSSo |
515 | 30.0k | UINT64_C(4227858474), // FADD |
516 | 30.0k | UINT64_C(3959423018), // FADDS |
517 | 30.0k | UINT64_C(3959423019), // FADDSo |
518 | 30.0k | UINT64_C(4227858475), // FADDo |
519 | 30.0k | UINT64_C(0), // FADDrtz |
520 | 30.0k | UINT64_C(4227860124), // FCFID |
521 | 30.0k | UINT64_C(3959424668), // FCFIDS |
522 | 30.0k | UINT64_C(3959424669), // FCFIDSo |
523 | 30.0k | UINT64_C(4227860380), // FCFIDU |
524 | 30.0k | UINT64_C(3959424924), // FCFIDUS |
525 | 30.0k | UINT64_C(3959424925), // FCFIDUSo |
526 | 30.0k | UINT64_C(4227860381), // FCFIDUo |
527 | 30.0k | UINT64_C(4227860125), // FCFIDo |
528 | 30.0k | UINT64_C(4227858432), // FCMPUD |
529 | 30.0k | UINT64_C(4227858432), // FCMPUS |
530 | 30.0k | UINT64_C(4227858448), // FCPSGND |
531 | 30.0k | UINT64_C(4227858449), // FCPSGNDo |
532 | 30.0k | UINT64_C(4227858448), // FCPSGNS |
533 | 30.0k | UINT64_C(4227858449), // FCPSGNSo |
534 | 30.0k | UINT64_C(4227860060), // FCTID |
535 | 30.0k | UINT64_C(4227860318), // FCTIDUZ |
536 | 30.0k | UINT64_C(4227860319), // FCTIDUZo |
537 | 30.0k | UINT64_C(4227860062), // FCTIDZ |
538 | 30.0k | UINT64_C(4227860063), // FCTIDZo |
539 | 30.0k | UINT64_C(4227860061), // FCTIDo |
540 | 30.0k | UINT64_C(4227858460), // FCTIW |
541 | 30.0k | UINT64_C(4227858718), // FCTIWUZ |
542 | 30.0k | UINT64_C(4227858719), // FCTIWUZo |
543 | 30.0k | UINT64_C(4227858462), // FCTIWZ |
544 | 30.0k | UINT64_C(4227858463), // FCTIWZo |
545 | 30.0k | UINT64_C(4227858461), // FCTIWo |
546 | 30.0k | UINT64_C(4227858468), // FDIV |
547 | 30.0k | UINT64_C(3959423012), // FDIVS |
548 | 30.0k | UINT64_C(3959423013), // FDIVSo |
549 | 30.0k | UINT64_C(4227858469), // FDIVo |
550 | 30.0k | UINT64_C(4227858490), // FMADD |
551 | 30.0k | UINT64_C(3959423034), // FMADDS |
552 | 30.0k | UINT64_C(3959423035), // FMADDSo |
553 | 30.0k | UINT64_C(4227858491), // FMADDo |
554 | 30.0k | UINT64_C(4227858576), // FMR |
555 | 30.0k | UINT64_C(4227858577), // FMRo |
556 | 30.0k | UINT64_C(4227858488), // FMSUB |
557 | 30.0k | UINT64_C(3959423032), // FMSUBS |
558 | 30.0k | UINT64_C(3959423033), // FMSUBSo |
559 | 30.0k | UINT64_C(4227858489), // FMSUBo |
560 | 30.0k | UINT64_C(4227858482), // FMUL |
561 | 30.0k | UINT64_C(3959423026), // FMULS |
562 | 30.0k | UINT64_C(3959423027), // FMULSo |
563 | 30.0k | UINT64_C(4227858483), // FMULo |
564 | 30.0k | UINT64_C(4227858704), // FNABSD |
565 | 30.0k | UINT64_C(4227858705), // FNABSDo |
566 | 30.0k | UINT64_C(4227858704), // FNABSS |
567 | 30.0k | UINT64_C(4227858705), // FNABSSo |
568 | 30.0k | UINT64_C(4227858512), // FNEGD |
569 | 30.0k | UINT64_C(4227858513), // FNEGDo |
570 | 30.0k | UINT64_C(4227858512), // FNEGS |
571 | 30.0k | UINT64_C(4227858513), // FNEGSo |
572 | 30.0k | UINT64_C(4227858494), // FNMADD |
573 | 30.0k | UINT64_C(3959423038), // FNMADDS |
574 | 30.0k | UINT64_C(3959423039), // FNMADDSo |
575 | 30.0k | UINT64_C(4227858495), // FNMADDo |
576 | 30.0k | UINT64_C(4227858492), // FNMSUB |
577 | 30.0k | UINT64_C(3959423036), // FNMSUBS |
578 | 30.0k | UINT64_C(3959423037), // FNMSUBSo |
579 | 30.0k | UINT64_C(4227858493), // FNMSUBo |
580 | 30.0k | UINT64_C(4227858480), // FRE |
581 | 30.0k | UINT64_C(3959423024), // FRES |
582 | 30.0k | UINT64_C(3959423025), // FRESo |
583 | 30.0k | UINT64_C(4227858481), // FREo |
584 | 30.0k | UINT64_C(4227859408), // FRIMD |
585 | 30.0k | UINT64_C(4227859409), // FRIMDo |
586 | 30.0k | UINT64_C(4227859408), // FRIMS |
587 | 30.0k | UINT64_C(4227859409), // FRIMSo |
588 | 30.0k | UINT64_C(4227859216), // FRIND |
589 | 30.0k | UINT64_C(4227859217), // FRINDo |
590 | 30.0k | UINT64_C(4227859216), // FRINS |
591 | 30.0k | UINT64_C(4227859217), // FRINSo |
592 | 30.0k | UINT64_C(4227859344), // FRIPD |
593 | 30.0k | UINT64_C(4227859345), // FRIPDo |
594 | 30.0k | UINT64_C(4227859344), // FRIPS |
595 | 30.0k | UINT64_C(4227859345), // FRIPSo |
596 | 30.0k | UINT64_C(4227859280), // FRIZD |
597 | 30.0k | UINT64_C(4227859281), // FRIZDo |
598 | 30.0k | UINT64_C(4227859280), // FRIZS |
599 | 30.0k | UINT64_C(4227859281), // FRIZSo |
600 | 30.0k | UINT64_C(4227858456), // FRSP |
601 | 30.0k | UINT64_C(4227858457), // FRSPo |
602 | 30.0k | UINT64_C(4227858484), // FRSQRTE |
603 | 30.0k | UINT64_C(3959423028), // FRSQRTES |
604 | 30.0k | UINT64_C(3959423029), // FRSQRTESo |
605 | 30.0k | UINT64_C(4227858485), // FRSQRTEo |
606 | 30.0k | UINT64_C(4227858478), // FSELD |
607 | 30.0k | UINT64_C(4227858479), // FSELDo |
608 | 30.0k | UINT64_C(4227858478), // FSELS |
609 | 30.0k | UINT64_C(4227858479), // FSELSo |
610 | 30.0k | UINT64_C(4227858476), // FSQRT |
611 | 30.0k | UINT64_C(3959423020), // FSQRTS |
612 | 30.0k | UINT64_C(3959423021), // FSQRTSo |
613 | 30.0k | UINT64_C(4227858477), // FSQRTo |
614 | 30.0k | UINT64_C(4227858472), // FSUB |
615 | 30.0k | UINT64_C(3959423016), // FSUBS |
616 | 30.0k | UINT64_C(3959423017), // FSUBSo |
617 | 30.0k | UINT64_C(4227858473), // FSUBo |
618 | 30.0k | UINT64_C(0), // GETtlsADDR |
619 | 30.0k | UINT64_C(0), // GETtlsADDR32 |
620 | 30.0k | UINT64_C(0), // GETtlsldADDR |
621 | 30.0k | UINT64_C(0), // GETtlsldADDR32 |
622 | 30.0k | UINT64_C(2080376748), // ICBI |
623 | 30.0k | UINT64_C(2080374828), // ICBT |
624 | 30.0k | UINT64_C(2080376716), // ICCCI |
625 | 30.0k | UINT64_C(0), |
626 | 30.0k | UINT64_C(0), |
627 | 30.0k | UINT64_C(0), |
628 | 30.0k | UINT64_C(0), |
629 | 30.0k | UINT64_C(0), |
630 | 30.0k | UINT64_C(0), |
631 | 30.0k | UINT64_C(2080374814), // ISEL |
632 | 30.0k | UINT64_C(2080374814), // ISEL8 |
633 | 30.0k | UINT64_C(1275068716), // ISYNC |
634 | 30.0k | UINT64_C(939524096), // LA |
635 | 30.0k | UINT64_C(0), |
636 | 30.0k | UINT64_C(2080374888), // LBARX |
637 | 30.0k | UINT64_C(2080374889), // LBARXL |
638 | 30.0k | UINT64_C(2281701376), // LBZ |
639 | 30.0k | UINT64_C(2281701376), // LBZ8 |
640 | 30.0k | UINT64_C(2080376490), // LBZCIX |
641 | 30.0k | UINT64_C(2348810240), // LBZU |
642 | 30.0k | UINT64_C(2348810240), // LBZU8 |
643 | 30.0k | UINT64_C(2080375022), // LBZUX |
644 | 30.0k | UINT64_C(2080375022), // LBZUX8 |
645 | 30.0k | UINT64_C(2080374958), // LBZX |
646 | 30.0k | UINT64_C(2080374958), // LBZX8 |
647 | 30.0k | UINT64_C(3892314112), // LD |
648 | 30.0k | UINT64_C(2080374952), // LDARX |
649 | 30.0k | UINT64_C(2080374953), // LDARXL |
650 | 30.0k | UINT64_C(2080375848), // LDBRX |
651 | 30.0k | UINT64_C(2080376554), // LDCIX |
652 | 30.0k | UINT64_C(3892314113), // LDU |
653 | 30.0k | UINT64_C(2080374890), // LDUX |
654 | 30.0k | UINT64_C(2080374826), // LDX |
655 | 30.0k | UINT64_C(0), // LDgotTprelL |
656 | 30.0k | UINT64_C(0), // LDgotTprelL32 |
657 | 30.0k | UINT64_C(0), // LDtoc |
658 | 30.0k | UINT64_C(0), // LDtocBA |
659 | 30.0k | UINT64_C(0), // LDtocCPT |
660 | 30.0k | UINT64_C(0), // LDtocJTI |
661 | 30.0k | UINT64_C(0), // LDtocL |
662 | 30.0k | UINT64_C(3355443200), // LFD |
663 | 30.0k | UINT64_C(3422552064), // LFDU |
664 | 30.0k | UINT64_C(2080376046), // LFDUX |
665 | 30.0k | UINT64_C(2080375982), // LFDX |
666 | 30.0k | UINT64_C(2080376494), // LFIWAX |
667 | 30.0k | UINT64_C(2080376558), // LFIWZX |
668 | 30.0k | UINT64_C(3221225472), // LFS |
669 | 30.0k | UINT64_C(3288334336), // LFSU |
670 | 30.0k | UINT64_C(2080375918), // LFSUX |
671 | 30.0k | UINT64_C(2080375854), // LFSX |
672 | 30.0k | UINT64_C(2818572288), // LHA |
673 | 30.0k | UINT64_C(2818572288), // LHA8 |
674 | 30.0k | UINT64_C(2080375016), // LHARX |
675 | 30.0k | UINT64_C(2080375017), // LHARXL |
676 | 30.0k | UINT64_C(2885681152), // LHAU |
677 | 30.0k | UINT64_C(2885681152), // LHAU8 |
678 | 30.0k | UINT64_C(2080375534), // LHAUX |
679 | 30.0k | UINT64_C(2080375534), // LHAUX8 |
680 | 30.0k | UINT64_C(2080375470), // LHAX |
681 | 30.0k | UINT64_C(2080375470), // LHAX8 |
682 | 30.0k | UINT64_C(2080376364), // LHBRX |
683 | 30.0k | UINT64_C(2080376364), // LHBRX8 |
684 | 30.0k | UINT64_C(2684354560), // LHZ |
685 | 30.0k | UINT64_C(2684354560), // LHZ8 |
686 | 30.0k | UINT64_C(2080376426), // LHZCIX |
687 | 30.0k | UINT64_C(2751463424), // LHZU |
688 | 30.0k | UINT64_C(2751463424), // LHZU8 |
689 | 30.0k | UINT64_C(2080375406), // LHZUX |
690 | 30.0k | UINT64_C(2080375406), // LHZUX8 |
691 | 30.0k | UINT64_C(2080375342), // LHZX |
692 | 30.0k | UINT64_C(2080375342), // LHZX8 |
693 | 30.0k | UINT64_C(939524096), // LI |
694 | 30.0k | UINT64_C(939524096), // LI8 |
695 | 30.0k | UINT64_C(1006632960), // LIS |
696 | 30.0k | UINT64_C(1006632960), // LIS8 |
697 | 30.0k | UINT64_C(3087007744), // LMW |
698 | 30.0k | UINT64_C(2080375978), // LSWI |
699 | 30.0k | UINT64_C(2080374798), // LVEBX |
700 | 30.0k | UINT64_C(2080374862), // LVEHX |
701 | 30.0k | UINT64_C(2080374926), // LVEWX |
702 | 30.0k | UINT64_C(2080374796), // LVSL |
703 | 30.0k | UINT64_C(2080374860), // LVSR |
704 | 30.0k | UINT64_C(2080374990), // LVX |
705 | 30.0k | UINT64_C(2080375502), // LVXL |
706 | 30.0k | UINT64_C(3892314114), // LWA |
707 | 30.0k | UINT64_C(2080374824), // LWARX |
708 | 30.0k | UINT64_C(2080374825), // LWARXL |
709 | 30.0k | UINT64_C(2080375530), // LWAUX |
710 | 30.0k | UINT64_C(2080375466), // LWAX |
711 | 30.0k | UINT64_C(2080375466), // LWAX_32 |
712 | 30.0k | UINT64_C(3892314114), // LWA_32 |
713 | 30.0k | UINT64_C(2080375852), // LWBRX |
714 | 30.0k | UINT64_C(2080375852), // LWBRX8 |
715 | 30.0k | UINT64_C(2147483648), // LWZ |
716 | 30.0k | UINT64_C(2147483648), // LWZ8 |
717 | 30.0k | UINT64_C(2080376362), // LWZCIX |
718 | 30.0k | UINT64_C(2214592512), // LWZU |
719 | 30.0k | UINT64_C(2214592512), // LWZU8 |
720 | 30.0k | UINT64_C(2080374894), // LWZUX |
721 | 30.0k | UINT64_C(2080374894), // LWZUX8 |
722 | 30.0k | UINT64_C(2080374830), // LWZX |
723 | 30.0k | UINT64_C(2080374830), // LWZX8 |
724 | 30.0k | UINT64_C(0), // LWZtoc |
725 | 30.0k | UINT64_C(2080375960), // LXSDX |
726 | 30.0k | UINT64_C(2080374936), // LXSIWAX |
727 | 30.0k | UINT64_C(2080374808), // LXSIWZX |
728 | 30.0k | UINT64_C(2080375832), // LXSSPX |
729 | 30.0k | UINT64_C(2080376472), // LXVD2X |
730 | 30.0k | UINT64_C(2080375448), // LXVDSX |
731 | 30.0k | UINT64_C(2080376344), // LXVW4X |
732 | 30.0k | UINT64_C(2080376492), // MBAR |
733 | 30.0k | UINT64_C(1275068416), // MCRF |
734 | 30.0k | UINT64_C(4227858560), // MCRFS |
735 | 30.0k | UINT64_C(2080375388), // MFBHRBE |
736 | 30.0k | UINT64_C(2080374822), // MFCR |
737 | 30.0k | UINT64_C(2080374822), // MFCR8 |
738 | 30.0k | UINT64_C(2080965286), // MFCTR |
739 | 30.0k | UINT64_C(2080965286), // MFCTR8 |
740 | 30.0k | UINT64_C(2080375430), // MFDCR |
741 | 30.0k | UINT64_C(4227859598), // MFFS |
742 | 30.0k | UINT64_C(4227859599), // MFFSo |
743 | 30.0k | UINT64_C(2080899750), // MFLR |
744 | 30.0k | UINT64_C(2080899750), // MFLR8 |
745 | 30.0k | UINT64_C(2080374950), // MFMSR |
746 | 30.0k | UINT64_C(2081423398), // MFOCRF |
747 | 30.0k | UINT64_C(2081423398), // MFOCRF8 |
748 | 30.0k | UINT64_C(2080375462), // MFSPR |
749 | 30.0k | UINT64_C(2080375462), // MFSPR8 |
750 | 30.0k | UINT64_C(2080375974), // MFSR |
751 | 30.0k | UINT64_C(2080376102), // MFSRIN |
752 | 30.0k | UINT64_C(2080375526), // MFTB |
753 | 30.0k | UINT64_C(2081178278), // MFTB8 |
754 | 30.0k | UINT64_C(2080391846), // MFVRSAVE |
755 | 30.0k | UINT64_C(2080391846), // MFVRSAVEv |
756 | 30.0k | UINT64_C(268436996), // MFVSCR |
757 | 30.0k | UINT64_C(2080374886), // MFVSRD |
758 | 30.0k | UINT64_C(2080375014), // MFVSRWZ |
759 | 30.0k | UINT64_C(2080375980), // MSYNC |
760 | 30.0k | UINT64_C(2080375072), // MTCRF |
761 | 30.0k | UINT64_C(2080375072), // MTCRF8 |
762 | 30.0k | UINT64_C(2080965542), // MTCTR |
763 | 30.0k | UINT64_C(2080965542), // MTCTR8 |
764 | 30.0k | UINT64_C(2080965542), // MTCTR8loop |
765 | 30.0k | UINT64_C(2080965542), // MTCTRloop |
766 | 30.0k | UINT64_C(2080375686), // MTDCR |
767 | 30.0k | UINT64_C(4227858572), // MTFSB0 |
768 | 30.0k | UINT64_C(4227858508), // MTFSB1 |
769 | 30.0k | UINT64_C(4227859854), // MTFSF |
770 | 30.0k | UINT64_C(4227858700), // MTFSFI |
771 | 30.0k | UINT64_C(4227858701), // MTFSFIo |
772 | 30.0k | UINT64_C(4227859854), // MTFSFb |
773 | 30.0k | UINT64_C(4227859855), // MTFSFo |
774 | 30.0k | UINT64_C(2080900006), // MTLR |
775 | 30.0k | UINT64_C(2080900006), // MTLR8 |
776 | 30.0k | UINT64_C(2080375076), // MTMSR |
777 | 30.0k | UINT64_C(2080375140), // MTMSRD |
778 | 30.0k | UINT64_C(2081423648), // MTOCRF |
779 | 30.0k | UINT64_C(2081423648), // MTOCRF8 |
780 | 30.0k | UINT64_C(2080375718), // MTSPR |
781 | 30.0k | UINT64_C(2080375718), // MTSPR8 |
782 | 30.0k | UINT64_C(2080375204), // MTSR |
783 | 30.0k | UINT64_C(2080375268), // MTSRIN |
784 | 30.0k | UINT64_C(2080392102), // MTVRSAVE |
785 | 30.0k | UINT64_C(2080392102), // MTVRSAVEv |
786 | 30.0k | UINT64_C(268437060), // MTVSCR |
787 | 30.0k | UINT64_C(2080375142), // MTVSRD |
788 | 30.0k | UINT64_C(2080375206), // MTVSRWA |
789 | 30.0k | UINT64_C(2080375270), // MTVSRWZ |
790 | 30.0k | UINT64_C(2080374930), // MULHD |
791 | 30.0k | UINT64_C(2080374802), // MULHDU |
792 | 30.0k | UINT64_C(2080374803), // MULHDUo |
793 | 30.0k | UINT64_C(2080374931), // MULHDo |
794 | 30.0k | UINT64_C(2080374934), // MULHW |
795 | 30.0k | UINT64_C(2080374806), // MULHWU |
796 | 30.0k | UINT64_C(2080374807), // MULHWUo |
797 | 30.0k | UINT64_C(2080374935), // MULHWo |
798 | 30.0k | UINT64_C(2080375250), // MULLD |
799 | 30.0k | UINT64_C(2080375251), // MULLDo |
800 | 30.0k | UINT64_C(469762048), // MULLI |
801 | 30.0k | UINT64_C(469762048), // MULLI8 |
802 | 30.0k | UINT64_C(2080375254), // MULLW |
803 | 30.0k | UINT64_C(2080375255), // MULLWo |
804 | 30.0k | UINT64_C(0), // MoveGOTtoLR |
805 | 30.0k | UINT64_C(0), // MovePCtoLR |
806 | 30.0k | UINT64_C(0), // MovePCtoLR8 |
807 | 30.0k | UINT64_C(2080375736), // NAND |
808 | 30.0k | UINT64_C(2080375736), // NAND8 |
809 | 30.0k | UINT64_C(2080375737), // NAND8o |
810 | 30.0k | UINT64_C(2080375737), // NANDo |
811 | 30.0k | UINT64_C(2080374992), // NEG |
812 | 30.0k | UINT64_C(2080374992), // NEG8 |
813 | 30.0k | UINT64_C(2080374993), // NEG8o |
814 | 30.0k | UINT64_C(2080374993), // NEGo |
815 | 30.0k | UINT64_C(1610612736), // NOP |
816 | 30.0k | UINT64_C(1612775424), // NOP_GT_PWR6 |
817 | 30.0k | UINT64_C(1614938112), // NOP_GT_PWR7 |
818 | 30.0k | UINT64_C(2080375032), // NOR |
819 | 30.0k | UINT64_C(2080375032), // NOR8 |
820 | 30.0k | UINT64_C(2080375033), // NOR8o |
821 | 30.0k | UINT64_C(2080375033), // NORo |
822 | 30.0k | UINT64_C(2080375672), // OR |
823 | 30.0k | UINT64_C(2080375672), // OR8 |
824 | 30.0k | UINT64_C(2080375673), // OR8o |
825 | 30.0k | UINT64_C(2080375608), // ORC |
826 | 30.0k | UINT64_C(2080375608), // ORC8 |
827 | 30.0k | UINT64_C(2080375609), // ORC8o |
828 | 30.0k | UINT64_C(2080375609), // ORCo |
829 | 30.0k | UINT64_C(1610612736), // ORI |
830 | 30.0k | UINT64_C(1610612736), // ORI8 |
831 | 30.0k | UINT64_C(1677721600), // ORIS |
832 | 30.0k | UINT64_C(1677721600), // ORIS8 |
833 | 30.0k | UINT64_C(2080375673), // ORo |
834 | 30.0k | UINT64_C(2080375796), // POPCNTD |
835 | 30.0k | UINT64_C(2080375540), // POPCNTW |
836 | 30.0k | UINT64_C(0), // PPC32GOT |
837 | 30.0k | UINT64_C(0), // PPC32PICGOT |
838 | 30.0k | UINT64_C(268435466), // QVALIGNI |
839 | 30.0k | UINT64_C(268435466), // QVALIGNIb |
840 | 30.0k | UINT64_C(268435466), // QVALIGNIs |
841 | 30.0k | UINT64_C(268435530), // QVESPLATI |
842 | 30.0k | UINT64_C(268435530), // QVESPLATIb |
843 | 30.0k | UINT64_C(268435530), // QVESPLATIs |
844 | 30.0k | UINT64_C(268435984), // QVFABS |
845 | 30.0k | UINT64_C(268435984), // QVFABSs |
846 | 30.0k | UINT64_C(268435498), // QVFADD |
847 | 30.0k | UINT64_C(42), // QVFADDS |
848 | 30.0k | UINT64_C(42), // QVFADDSs |
849 | 30.0k | UINT64_C(268437148), // QVFCFID |
850 | 30.0k | UINT64_C(1692), // QVFCFIDS |
851 | 30.0k | UINT64_C(268437404), // QVFCFIDU |
852 | 30.0k | UINT64_C(1948), // QVFCFIDUS |
853 | 30.0k | UINT64_C(268437148), // QVFCFIDb |
854 | 30.0k | UINT64_C(268435456), // QVFCMPEQ |
855 | 30.0k | UINT64_C(268435456), // QVFCMPEQb |
856 | 30.0k | UINT64_C(268435456), // QVFCMPEQbs |
857 | 30.0k | UINT64_C(268435520), // QVFCMPGT |
858 | 30.0k | UINT64_C(268435520), // QVFCMPGTb |
859 | 30.0k | UINT64_C(268435520), // QVFCMPGTbs |
860 | 30.0k | UINT64_C(268435648), // QVFCMPLT |
861 | 30.0k | UINT64_C(268435648), // QVFCMPLTb |
862 | 30.0k | UINT64_C(268435648), // QVFCMPLTbs |
863 | 30.0k | UINT64_C(268435472), // QVFCPSGN |
864 | 30.0k | UINT64_C(268435472), // QVFCPSGNs |
865 | 30.0k | UINT64_C(268437084), // QVFCTID |
866 | 30.0k | UINT64_C(268437340), // QVFCTIDU |
867 | 30.0k | UINT64_C(268437342), // QVFCTIDUZ |
868 | 30.0k | UINT64_C(268437086), // QVFCTIDZ |
869 | 30.0k | UINT64_C(268437084), // QVFCTIDb |
870 | 30.0k | UINT64_C(268435484), // QVFCTIW |
871 | 30.0k | UINT64_C(268435740), // QVFCTIWU |
872 | 30.0k | UINT64_C(268435742), // QVFCTIWUZ |
873 | 30.0k | UINT64_C(268435486), // QVFCTIWZ |
874 | 30.0k | UINT64_C(268435464), // QVFLOGICAL |
875 | 30.0k | UINT64_C(268435464), // QVFLOGICALb |
876 | 30.0k | UINT64_C(268435464), // QVFLOGICALs |
877 | 30.0k | UINT64_C(268435514), // QVFMADD |
878 | 30.0k | UINT64_C(58), // QVFMADDS |
879 | 30.0k | UINT64_C(58), // QVFMADDSs |
880 | 30.0k | UINT64_C(268435600), // QVFMR |
881 | 30.0k | UINT64_C(268435600), // QVFMRb |
882 | 30.0k | UINT64_C(268435600), // QVFMRs |
883 | 30.0k | UINT64_C(268435512), // QVFMSUB |
884 | 30.0k | UINT64_C(56), // QVFMSUBS |
885 | 30.0k | UINT64_C(56), // QVFMSUBSs |
886 | 30.0k | UINT64_C(268435506), // QVFMUL |
887 | 30.0k | UINT64_C(50), // QVFMULS |
888 | 30.0k | UINT64_C(50), // QVFMULSs |
889 | 30.0k | UINT64_C(268435728), // QVFNABS |
890 | 30.0k | UINT64_C(268435728), // QVFNABSs |
891 | 30.0k | UINT64_C(268435536), // QVFNEG |
892 | 30.0k | UINT64_C(268435536), // QVFNEGs |
893 | 30.0k | UINT64_C(268435518), // QVFNMADD |
894 | 30.0k | UINT64_C(62), // QVFNMADDS |
895 | 30.0k | UINT64_C(62), // QVFNMADDSs |
896 | 30.0k | UINT64_C(268435516), // QVFNMSUB |
897 | 30.0k | UINT64_C(60), // QVFNMSUBS |
898 | 30.0k | UINT64_C(60), // QVFNMSUBSs |
899 | 30.0k | UINT64_C(268435468), // QVFPERM |
900 | 30.0k | UINT64_C(268435468), // QVFPERMs |
901 | 30.0k | UINT64_C(268435504), // QVFRE |
902 | 30.0k | UINT64_C(48), // QVFRES |
903 | 30.0k | UINT64_C(48), // QVFRESs |
904 | 30.0k | UINT64_C(268436432), // QVFRIM |
905 | 30.0k | UINT64_C(268436432), // QVFRIMs |
906 | 30.0k | UINT64_C(268436240), // QVFRIN |
907 | 30.0k | UINT64_C(268436240), // QVFRINs |
908 | 30.0k | UINT64_C(268436368), // QVFRIP |
909 | 30.0k | UINT64_C(268436368), // QVFRIPs |
910 | 30.0k | UINT64_C(268436304), // QVFRIZ |
911 | 30.0k | UINT64_C(268436304), // QVFRIZs |
912 | 30.0k | UINT64_C(268435480), // QVFRSP |
913 | 30.0k | UINT64_C(268435480), // QVFRSPs |
914 | 30.0k | UINT64_C(268435508), // QVFRSQRTE |
915 | 30.0k | UINT64_C(52), // QVFRSQRTES |
916 | 30.0k | UINT64_C(52), // QVFRSQRTESs |
917 | 30.0k | UINT64_C(268435502), // QVFSEL |
918 | 30.0k | UINT64_C(268435502), // QVFSELb |
919 | 30.0k | UINT64_C(268435502), // QVFSELbb |
920 | 30.0k | UINT64_C(268435502), // QVFSELbs |
921 | 30.0k | UINT64_C(268435496), // QVFSUB |
922 | 30.0k | UINT64_C(40), // QVFSUBS |
923 | 30.0k | UINT64_C(40), // QVFSUBSs |
924 | 30.0k | UINT64_C(268435584), // QVFTSTNAN |
925 | 30.0k | UINT64_C(268435584), // QVFTSTNANb |
926 | 30.0k | UINT64_C(268435584), // QVFTSTNANbs |
927 | 30.0k | UINT64_C(268435474), // QVFXMADD |
928 | 30.0k | UINT64_C(18), // QVFXMADDS |
929 | 30.0k | UINT64_C(268435490), // QVFXMUL |
930 | 30.0k | UINT64_C(34), // QVFXMULS |
931 | 30.0k | UINT64_C(268435462), // QVFXXCPNMADD |
932 | 30.0k | UINT64_C(6), // QVFXXCPNMADDS |
933 | 30.0k | UINT64_C(268435458), // QVFXXMADD |
934 | 30.0k | UINT64_C(2), // QVFXXMADDS |
935 | 30.0k | UINT64_C(268435478), // QVFXXNPMADD |
936 | 30.0k | UINT64_C(22), // QVFXXNPMADDS |
937 | 30.0k | UINT64_C(268435722), // QVGPCI |
938 | 30.0k | UINT64_C(2080374990), // QVLFCDUX |
939 | 30.0k | UINT64_C(2080374991), // QVLFCDUXA |
940 | 30.0k | UINT64_C(2080374926), // QVLFCDX |
941 | 30.0k | UINT64_C(2080374927), // QVLFCDXA |
942 | 30.0k | UINT64_C(2080374862), // QVLFCSUX |
943 | 30.0k | UINT64_C(2080374863), // QVLFCSUXA |
944 | 30.0k | UINT64_C(2080374798), // QVLFCSX |
945 | 30.0k | UINT64_C(2080374799), // QVLFCSXA |
946 | 30.0k | UINT64_C(2080374798), // QVLFCSXs |
947 | 30.0k | UINT64_C(2080376014), // QVLFDUX |
948 | 30.0k | UINT64_C(2080376015), // QVLFDUXA |
949 | 30.0k | UINT64_C(2080375950), // QVLFDX |
950 | 30.0k | UINT64_C(2080375951), // QVLFDXA |
951 | 30.0k | UINT64_C(2080375950), // QVLFDXb |
952 | 30.0k | UINT64_C(2080376526), // QVLFIWAX |
953 | 30.0k | UINT64_C(2080376527), // QVLFIWAXA |
954 | 30.0k | UINT64_C(2080376462), // QVLFIWZX |
955 | 30.0k | UINT64_C(2080376463), // QVLFIWZXA |
956 | 30.0k | UINT64_C(2080375886), // QVLFSUX |
957 | 30.0k | UINT64_C(2080375887), // QVLFSUXA |
958 | 30.0k | UINT64_C(2080375822), // QVLFSX |
959 | 30.0k | UINT64_C(2080375823), // QVLFSXA |
960 | 30.0k | UINT64_C(2080375822), // QVLFSXb |
961 | 30.0k | UINT64_C(2080375822), // QVLFSXs |
962 | 30.0k | UINT64_C(2080375948), // QVLPCLDX |
963 | 30.0k | UINT64_C(2080375820), // QVLPCLSX |
964 | 30.0k | UINT64_C(2080375820), // QVLPCLSXint |
965 | 30.0k | UINT64_C(2080374924), // QVLPCRDX |
966 | 30.0k | UINT64_C(2080374796), // QVLPCRSX |
967 | 30.0k | UINT64_C(2080375246), // QVSTFCDUX |
968 | 30.0k | UINT64_C(2080375247), // QVSTFCDUXA |
969 | 30.0k | UINT64_C(2080375242), // QVSTFCDUXI |
970 | 30.0k | UINT64_C(2080375243), // QVSTFCDUXIA |
971 | 30.0k | UINT64_C(2080375182), // QVSTFCDX |
972 | 30.0k | UINT64_C(2080375183), // QVSTFCDXA |
973 | 30.0k | UINT64_C(2080375178), // QVSTFCDXI |
974 | 30.0k | UINT64_C(2080375179), // QVSTFCDXIA |
975 | 30.0k | UINT64_C(2080375118), // QVSTFCSUX |
976 | 30.0k | UINT64_C(2080375119), // QVSTFCSUXA |
977 | 30.0k | UINT64_C(2080375114), // QVSTFCSUXI |
978 | 30.0k | UINT64_C(2080375115), // QVSTFCSUXIA |
979 | 30.0k | UINT64_C(2080375054), // QVSTFCSX |
980 | 30.0k | UINT64_C(2080375055), // QVSTFCSXA |
981 | 30.0k | UINT64_C(2080375050), // QVSTFCSXI |
982 | 30.0k | UINT64_C(2080375051), // QVSTFCSXIA |
983 | 30.0k | UINT64_C(2080375054), // QVSTFCSXs |
984 | 30.0k | UINT64_C(2080376270), // QVSTFDUX |
985 | 30.0k | UINT64_C(2080376271), // QVSTFDUXA |
986 | 30.0k | UINT64_C(2080376266), // QVSTFDUXI |
987 | 30.0k | UINT64_C(2080376267), // QVSTFDUXIA |
988 | 30.0k | UINT64_C(2080376206), // QVSTFDX |
989 | 30.0k | UINT64_C(2080376207), // QVSTFDXA |
990 | 30.0k | UINT64_C(2080376202), // QVSTFDXI |
991 | 30.0k | UINT64_C(2080376203), // QVSTFDXIA |
992 | 30.0k | UINT64_C(2080376206), // QVSTFDXb |
993 | 30.0k | UINT64_C(2080376718), // QVSTFIWX |
994 | 30.0k | UINT64_C(2080376719), // QVSTFIWXA |
995 | 30.0k | UINT64_C(2080376142), // QVSTFSUX |
996 | 30.0k | UINT64_C(2080376143), // QVSTFSUXA |
997 | 30.0k | UINT64_C(2080376138), // QVSTFSUXI |
998 | 30.0k | UINT64_C(2080376139), // QVSTFSUXIA |
999 | 30.0k | UINT64_C(2080376142), // QVSTFSUXs |
1000 | 30.0k | UINT64_C(2080376078), // QVSTFSX |
1001 | 30.0k | UINT64_C(2080376079), // QVSTFSXA |
1002 | 30.0k | UINT64_C(2080376074), // QVSTFSXI |
1003 | 30.0k | UINT64_C(2080376075), // QVSTFSXIA |
1004 | 30.0k | UINT64_C(2080376078), // QVSTFSXs |
1005 | 30.0k | UINT64_C(0), // RESTORE_CR |
1006 | 30.0k | UINT64_C(0), // RESTORE_CRBIT |
1007 | 30.0k | UINT64_C(0), // RESTORE_VRSAVE |
1008 | 30.0k | UINT64_C(1275068518), // RFCI |
1009 | 30.0k | UINT64_C(1275068494), // RFDI |
1010 | 30.0k | UINT64_C(1275068708), // RFEBB |
1011 | 30.0k | UINT64_C(1275068516), // RFI |
1012 | 30.0k | UINT64_C(1275068452), // RFID |
1013 | 30.0k | UINT64_C(1275068492), // RFMCI |
1014 | 30.0k | UINT64_C(2013265936), // RLDCL |
1015 | 30.0k | UINT64_C(2013265937), // RLDCLo |
1016 | 30.0k | UINT64_C(2013265938), // RLDCR |
1017 | 30.0k | UINT64_C(2013265939), // RLDCRo |
1018 | 30.0k | UINT64_C(2013265928), // RLDIC |
1019 | 30.0k | UINT64_C(2013265920), // RLDICL |
1020 | 30.0k | UINT64_C(2013265920), // RLDICL_32_64 |
1021 | 30.0k | UINT64_C(2013265921), // RLDICLo |
1022 | 30.0k | UINT64_C(2013265924), // RLDICR |
1023 | 30.0k | UINT64_C(2013265925), // RLDICRo |
1024 | 30.0k | UINT64_C(2013265929), // RLDICo |
1025 | 30.0k | UINT64_C(2013265932), // RLDIMI |
1026 | 30.0k | UINT64_C(2013265933), // RLDIMIo |
1027 | 30.0k | UINT64_C(1342177280), // RLWIMI |
1028 | 30.0k | UINT64_C(1342177280), // RLWIMI8 |
1029 | 30.0k | UINT64_C(1342177281), // RLWIMI8o |
1030 | 30.0k | UINT64_C(0), |
1031 | 30.0k | UINT64_C(1342177281), // RLWIMIo |
1032 | 30.0k | UINT64_C(0), |
1033 | 30.0k | UINT64_C(1409286144), // RLWINM |
1034 | 30.0k | UINT64_C(1409286144), // RLWINM8 |
1035 | 30.0k | UINT64_C(1409286145), // RLWINM8o |
1036 | 30.0k | UINT64_C(0), |
1037 | 30.0k | UINT64_C(1409286145), // RLWINMo |
1038 | 30.0k | UINT64_C(0), |
1039 | 30.0k | UINT64_C(1543503872), // RLWNM |
1040 | 30.0k | UINT64_C(1543503872), // RLWNM8 |
1041 | 30.0k | UINT64_C(1543503873), // RLWNM8o |
1042 | 30.0k | UINT64_C(0), |
1043 | 30.0k | UINT64_C(1543503873), // RLWNMo |
1044 | 30.0k | UINT64_C(0), |
1045 | 30.0k | UINT64_C(0), |
1046 | 30.0k | UINT64_C(0), |
1047 | 30.0k | UINT64_C(0), |
1048 | 30.0k | UINT64_C(0), |
1049 | 30.0k | UINT64_C(0), // ReadTB |
1050 | 30.0k | UINT64_C(1140850690), // SC |
1051 | 30.0k | UINT64_C(0), // SELECT_CC_F4 |
1052 | 30.0k | UINT64_C(0), // SELECT_CC_F8 |
1053 | 30.0k | UINT64_C(0), // SELECT_CC_I4 |
1054 | 30.0k | UINT64_C(0), // SELECT_CC_I8 |
1055 | 30.0k | UINT64_C(0), // SELECT_CC_QBRC |
1056 | 30.0k | UINT64_C(0), // SELECT_CC_QFRC |
1057 | 30.0k | UINT64_C(0), // SELECT_CC_QSRC |
1058 | 30.0k | UINT64_C(0), // SELECT_CC_VRRC |
1059 | 30.0k | UINT64_C(0), // SELECT_CC_VSFRC |
1060 | 30.0k | UINT64_C(0), // SELECT_CC_VSRC |
1061 | 30.0k | UINT64_C(0), // SELECT_CC_VSSRC |
1062 | 30.0k | UINT64_C(0), // SELECT_F4 |
1063 | 30.0k | UINT64_C(0), // SELECT_F8 |
1064 | 30.0k | UINT64_C(0), // SELECT_I4 |
1065 | 30.0k | UINT64_C(0), // SELECT_I8 |
1066 | 30.0k | UINT64_C(0), // SELECT_QBRC |
1067 | 30.0k | UINT64_C(0), // SELECT_QFRC |
1068 | 30.0k | UINT64_C(0), // SELECT_QSRC |
1069 | 30.0k | UINT64_C(0), // SELECT_VRRC |
1070 | 30.0k | UINT64_C(0), // SELECT_VSFRC |
1071 | 30.0k | UINT64_C(0), // SELECT_VSRC |
1072 | 30.0k | UINT64_C(0), // SELECT_VSSRC |
1073 | 30.0k | UINT64_C(2080375780), // SLBIA |
1074 | 30.0k | UINT64_C(2080375652), // SLBIE |
1075 | 30.0k | UINT64_C(2080376614), // SLBMFEE |
1076 | 30.0k | UINT64_C(2080375588), // SLBMTE |
1077 | 30.0k | UINT64_C(2080374838), // SLD |
1078 | 30.0k | UINT64_C(0), |
1079 | 30.0k | UINT64_C(0), |
1080 | 30.0k | UINT64_C(2080374839), // SLDo |
1081 | 30.0k | UINT64_C(2080374832), // SLW |
1082 | 30.0k | UINT64_C(2080374832), // SLW8 |
1083 | 30.0k | UINT64_C(2080374833), // SLW8o |
1084 | 30.0k | UINT64_C(0), |
1085 | 30.0k | UINT64_C(0), |
1086 | 30.0k | UINT64_C(2080374833), // SLWo |
1087 | 30.0k | UINT64_C(0), // SPILL_CR |
1088 | 30.0k | UINT64_C(0), // SPILL_CRBIT |
1089 | 30.0k | UINT64_C(0), // SPILL_VRSAVE |
1090 | 30.0k | UINT64_C(2080376372), // SRAD |
1091 | 30.0k | UINT64_C(2080376436), // SRADI |
1092 | 30.0k | UINT64_C(2080376437), // SRADIo |
1093 | 30.0k | UINT64_C(2080376373), // SRADo |
1094 | 30.0k | UINT64_C(2080376368), // SRAW |
1095 | 30.0k | UINT64_C(2080376432), // SRAWI |
1096 | 30.0k | UINT64_C(2080376433), // SRAWIo |
1097 | 30.0k | UINT64_C(2080376369), // SRAWo |
1098 | 30.0k | UINT64_C(2080375862), // SRD |
1099 | 30.0k | UINT64_C(0), |
1100 | 30.0k | UINT64_C(0), |
1101 | 30.0k | UINT64_C(2080375863), // SRDo |
1102 | 30.0k | UINT64_C(2080375856), // SRW |
1103 | 30.0k | UINT64_C(2080375856), // SRW8 |
1104 | 30.0k | UINT64_C(2080375857), // SRW8o |
1105 | 30.0k | UINT64_C(0), |
1106 | 30.0k | UINT64_C(0), |
1107 | 30.0k | UINT64_C(2080375857), // SRWo |
1108 | 30.0k | UINT64_C(2550136832), // STB |
1109 | 30.0k | UINT64_C(2550136832), // STB8 |
1110 | 30.0k | UINT64_C(2080376746), // STBCIX |
1111 | 30.0k | UINT64_C(2080376173), // STBCX |
1112 | 30.0k | UINT64_C(2617245696), // STBU |
1113 | 30.0k | UINT64_C(2617245696), // STBU8 |
1114 | 30.0k | UINT64_C(2080375278), // STBUX |
1115 | 30.0k | UINT64_C(2080375278), // STBUX8 |
1116 | 30.0k | UINT64_C(2080375214), // STBX |
1117 | 30.0k | UINT64_C(2080375214), // STBX8 |
1118 | 30.0k | UINT64_C(4160749568), // STD |
1119 | 30.0k | UINT64_C(2080376104), // STDBRX |
1120 | 30.0k | UINT64_C(2080376810), // STDCIX |
1121 | 30.0k | UINT64_C(2080375213), // STDCX |
1122 | 30.0k | UINT64_C(4160749569), // STDU |
1123 | 30.0k | UINT64_C(2080375146), // STDUX |
1124 | 30.0k | UINT64_C(2080375082), // STDX |
1125 | 30.0k | UINT64_C(3623878656), // STFD |
1126 | 30.0k | UINT64_C(3690987520), // STFDU |
1127 | 30.0k | UINT64_C(2080376302), // STFDUX |
1128 | 30.0k | UINT64_C(2080376238), // STFDX |
1129 | 30.0k | UINT64_C(2080376750), // STFIWX |
1130 | 30.0k | UINT64_C(3489660928), // STFS |
1131 | 30.0k | UINT64_C(3556769792), // STFSU |
1132 | 30.0k | UINT64_C(2080376174), // STFSUX |
1133 | 30.0k | UINT64_C(2080376110), // STFSX |
1134 | 30.0k | UINT64_C(2952790016), // STH |
1135 | 30.0k | UINT64_C(2952790016), // STH8 |
1136 | 30.0k | UINT64_C(2080376620), // STHBRX |
1137 | 30.0k | UINT64_C(2080376682), // STHCIX |
1138 | 30.0k | UINT64_C(2080376237), // STHCX |
1139 | 30.0k | UINT64_C(3019898880), // STHU |
1140 | 30.0k | UINT64_C(3019898880), // STHU8 |
1141 | 30.0k | UINT64_C(2080375662), // STHUX |
1142 | 30.0k | UINT64_C(2080375662), // STHUX8 |
1143 | 30.0k | UINT64_C(2080375598), // STHX |
1144 | 30.0k | UINT64_C(2080375598), // STHX8 |
1145 | 30.0k | UINT64_C(3154116608), // STMW |
1146 | 30.0k | UINT64_C(2080376234), // STSWI |
1147 | 30.0k | UINT64_C(2080375054), // STVEBX |
1148 | 30.0k | UINT64_C(2080375118), // STVEHX |
1149 | 30.0k | UINT64_C(2080375182), // STVEWX |
1150 | 30.0k | UINT64_C(2080375246), // STVX |
1151 | 30.0k | UINT64_C(2080375758), // STVXL |
1152 | 30.0k | UINT64_C(2415919104), // STW |
1153 | 30.0k | UINT64_C(2415919104), // STW8 |
1154 | 30.0k | UINT64_C(2080376108), // STWBRX |
1155 | 30.0k | UINT64_C(2080376618), // STWCIX |
1156 | 30.0k | UINT64_C(2080375085), // STWCX |
1157 | 30.0k | UINT64_C(2483027968), // STWU |
1158 | 30.0k | UINT64_C(2483027968), // STWU8 |
1159 | 30.0k | UINT64_C(2080375150), // STWUX |
1160 | 30.0k | UINT64_C(2080375150), // STWUX8 |
1161 | 30.0k | UINT64_C(2080375086), // STWX |
1162 | 30.0k | UINT64_C(2080375086), // STWX8 |
1163 | 30.0k | UINT64_C(2080376216), // STXSDX |
1164 | 30.0k | UINT64_C(2080375064), // STXSIWX |
1165 | 30.0k | UINT64_C(2080376088), // STXSSPX |
1166 | 30.0k | UINT64_C(2080376728), // STXVD2X |
1167 | 30.0k | UINT64_C(2080376600), // STXVW4X |
1168 | 30.0k | UINT64_C(2080374864), // SUBF |
1169 | 30.0k | UINT64_C(2080374864), // SUBF8 |
1170 | 30.0k | UINT64_C(2080374865), // SUBF8o |
1171 | 30.0k | UINT64_C(2080374800), // SUBFC |
1172 | 30.0k | UINT64_C(2080374800), // SUBFC8 |
1173 | 30.0k | UINT64_C(2080374801), // SUBFC8o |
1174 | 30.0k | UINT64_C(2080374801), // SUBFCo |
1175 | 30.0k | UINT64_C(2080375056), // SUBFE |
1176 | 30.0k | UINT64_C(2080375056), // SUBFE8 |
1177 | 30.0k | UINT64_C(2080375057), // SUBFE8o |
1178 | 30.0k | UINT64_C(2080375057), // SUBFEo |
1179 | 30.0k | UINT64_C(536870912), // SUBFIC |
1180 | 30.0k | UINT64_C(536870912), // SUBFIC8 |
1181 | 30.0k | UINT64_C(2080375248), // SUBFME |
1182 | 30.0k | UINT64_C(2080375248), // SUBFME8 |
1183 | 30.0k | UINT64_C(2080375249), // SUBFME8o |
1184 | 30.0k | UINT64_C(2080375249), // SUBFMEo |
1185 | 30.0k | UINT64_C(2080375184), // SUBFZE |
1186 | 30.0k | UINT64_C(2080375184), // SUBFZE8 |
1187 | 30.0k | UINT64_C(2080375185), // SUBFZE8o |
1188 | 30.0k | UINT64_C(2080375185), // SUBFZEo |
1189 | 30.0k | UINT64_C(2080374865), // SUBFo |
1190 | 30.0k | UINT64_C(0), |
1191 | 30.0k | UINT64_C(0), |
1192 | 30.0k | UINT64_C(0), |
1193 | 30.0k | UINT64_C(0), |
1194 | 30.0k | UINT64_C(2080375980), // SYNC |
1195 | 30.0k | UINT64_C(2080376605), // TABORT |
1196 | 30.0k | UINT64_C(2080376413), // TABORTDC |
1197 | 30.0k | UINT64_C(2080376541), // TABORTDCI |
1198 | 30.0k | UINT64_C(2080376349), // TABORTWC |
1199 | 30.0k | UINT64_C(2080376477), // TABORTWCI |
1200 | 30.0k | UINT64_C(1207959552), // TAILB |
1201 | 30.0k | UINT64_C(1207959552), // TAILB8 |
1202 | 30.0k | UINT64_C(1207959552), // TAILBA |
1203 | 30.0k | UINT64_C(1207959552), // TAILBA8 |
1204 | 30.0k | UINT64_C(1317012512), // TAILBCTR |
1205 | 30.0k | UINT64_C(1317012512), // TAILBCTR8 |
1206 | 30.0k | UINT64_C(2080376093), // TBEGIN |
1207 | 30.0k | UINT64_C(2080376220), // TCHECK |
1208 | 30.0k | UINT64_C(0), // TCHECK_RET |
1209 | 30.0k | UINT64_C(0), // TCRETURNai |
1210 | 30.0k | UINT64_C(0), // TCRETURNai8 |
1211 | 30.0k | UINT64_C(0), // TCRETURNdi |
1212 | 30.0k | UINT64_C(0), // TCRETURNdi8 |
1213 | 30.0k | UINT64_C(0), // TCRETURNri |
1214 | 30.0k | UINT64_C(0), // TCRETURNri8 |
1215 | 30.0k | UINT64_C(2080374920), // TD |
1216 | 30.0k | UINT64_C(134217728), // TDI |
1217 | 30.0k | UINT64_C(2080376157), // TEND |
1218 | 30.0k | UINT64_C(2080375524), // TLBIA |
1219 | 30.0k | UINT64_C(2080375396), // TLBIE |
1220 | 30.0k | UINT64_C(2080375332), // TLBIEL |
1221 | 30.0k | UINT64_C(2080376356), // TLBIVAX |
1222 | 30.0k | UINT64_C(2080376740), // TLBLD |
1223 | 30.0k | UINT64_C(2080376804), // TLBLI |
1224 | 30.0k | UINT64_C(2080376676), // TLBRE |
1225 | 30.0k | UINT64_C(2080376676), // TLBRE2 |
1226 | 30.0k | UINT64_C(2080376612), // TLBSX |
1227 | 30.0k | UINT64_C(2080376612), // TLBSX2 |
1228 | 30.0k | UINT64_C(2080376613), // TLBSX2D |
1229 | 30.0k | UINT64_C(2080375916), // TLBSYNC |
1230 | 30.0k | UINT64_C(2080376740), // TLBWE |
1231 | 30.0k | UINT64_C(2080376740), // TLBWE2 |
1232 | 30.0k | UINT64_C(2145386504), // TRAP |
1233 | 30.0k | UINT64_C(2080376797), // TRECHKPT |
1234 | 30.0k | UINT64_C(2080376669), // TRECLAIM |
1235 | 30.0k | UINT64_C(2080376285), // TSR |
1236 | 30.0k | UINT64_C(2080374792), // TW |
1237 | 30.0k | UINT64_C(201326592), // TWI |
1238 | 30.0k | UINT64_C(0), // UPDATE_VRSAVE |
1239 | 30.0k | UINT64_C(0), // UpdateGBR |
1240 | 30.0k | UINT64_C(268435776), // VADDCUQ |
1241 | 30.0k | UINT64_C(268435840), // VADDCUW |
1242 | 30.0k | UINT64_C(268435517), // VADDECUQ |
1243 | 30.0k | UINT64_C(268435516), // VADDEUQM |
1244 | 30.0k | UINT64_C(268435466), // VADDFP |
1245 | 30.0k | UINT64_C(268436224), // VADDSBS |
1246 | 30.0k | UINT64_C(268436288), // VADDSHS |
1247 | 30.0k | UINT64_C(268436352), // VADDSWS |
1248 | 30.0k | UINT64_C(268435456), // VADDUBM |
1249 | 30.0k | UINT64_C(268435968), // VADDUBS |
1250 | 30.0k | UINT64_C(268435648), // VADDUDM |
1251 | 30.0k | UINT64_C(268435520), // VADDUHM |
1252 | 30.0k | UINT64_C(268436032), // VADDUHS |
1253 | 30.0k | UINT64_C(268435712), // VADDUQM |
1254 | 30.0k | UINT64_C(268435584), // VADDUWM |
1255 | 30.0k | UINT64_C(268436096), // VADDUWS |
1256 | 30.0k | UINT64_C(268436484), // VAND |
1257 | 30.0k | UINT64_C(268436548), // VANDC |
1258 | 30.0k | UINT64_C(268436738), // VAVGSB |
1259 | 30.0k | UINT64_C(268436802), // VAVGSH |
1260 | 30.0k | UINT64_C(268436866), // VAVGSW |
1261 | 30.0k | UINT64_C(268436482), // VAVGUB |
1262 | 30.0k | UINT64_C(268436546), // VAVGUH |
1263 | 30.0k | UINT64_C(268436610), // VAVGUW |
1264 | 30.0k | UINT64_C(268436812), // VBPERMQ |
1265 | 30.0k | UINT64_C(268436298), // VCFSX |
1266 | 30.0k | UINT64_C(268436298), // VCFSX_0 |
1267 | 30.0k | UINT64_C(268436234), // VCFUX |
1268 | 30.0k | UINT64_C(268436234), // VCFUX_0 |
1269 | 30.0k | UINT64_C(268436744), // VCIPHER |
1270 | 30.0k | UINT64_C(268436745), // VCIPHERLAST |
1271 | 30.0k | UINT64_C(268437250), // VCLZB |
1272 | 30.0k | UINT64_C(268437442), // VCLZD |
1273 | 30.0k | UINT64_C(268437314), // VCLZH |
1274 | 30.0k | UINT64_C(268437378), // VCLZW |
1275 | 30.0k | UINT64_C(268436422), // VCMPBFP |
1276 | 30.0k | UINT64_C(268437446), // VCMPBFPo |
1277 | 30.0k | UINT64_C(268435654), // VCMPEQFP |
1278 | 30.0k | UINT64_C(268436678), // VCMPEQFPo |
1279 | 30.0k | UINT64_C(268435462), // VCMPEQUB |
1280 | 30.0k | UINT64_C(268436486), // VCMPEQUBo |
1281 | 30.0k | UINT64_C(268435655), // VCMPEQUD |
1282 | 30.0k | UINT64_C(268436679), // VCMPEQUDo |
1283 | 30.0k | UINT64_C(268435526), // VCMPEQUH |
1284 | 30.0k | UINT64_C(268436550), // VCMPEQUHo |
1285 | 30.0k | UINT64_C(268435590), // VCMPEQUW |
1286 | 30.0k | UINT64_C(268436614), // VCMPEQUWo |
1287 | 30.0k | UINT64_C(268435910), // VCMPGEFP |
1288 | 30.0k | UINT64_C(268436934), // VCMPGEFPo |
1289 | 30.0k | UINT64_C(268436166), // VCMPGTFP |
1290 | 30.0k | UINT64_C(268437190), // VCMPGTFPo |
1291 | 30.0k | UINT64_C(268436230), // VCMPGTSB |
1292 | 30.0k | UINT64_C(268437254), // VCMPGTSBo |
1293 | 30.0k | UINT64_C(268436423), // VCMPGTSD |
1294 | 30.0k | UINT64_C(268437447), // VCMPGTSDo |
1295 | 30.0k | UINT64_C(268436294), // VCMPGTSH |
1296 | 30.0k | UINT64_C(268437318), // VCMPGTSHo |
1297 | 30.0k | UINT64_C(268436358), // VCMPGTSW |
1298 | 30.0k | UINT64_C(268437382), // VCMPGTSWo |
1299 | 30.0k | UINT64_C(268435974), // VCMPGTUB |
1300 | 30.0k | UINT64_C(268436998), // VCMPGTUBo |
1301 | 30.0k | UINT64_C(268436167), // VCMPGTUD |
1302 | 30.0k | UINT64_C(268437191), // VCMPGTUDo |
1303 | 30.0k | UINT64_C(268436038), // VCMPGTUH |
1304 | 30.0k | UINT64_C(268437062), // VCMPGTUHo |
1305 | 30.0k | UINT64_C(268436102), // VCMPGTUW |
1306 | 30.0k | UINT64_C(268437126), // VCMPGTUWo |
1307 | 30.0k | UINT64_C(268436426), // VCTSXS |
1308 | 30.0k | UINT64_C(268436426), // VCTSXS_0 |
1309 | 30.0k | UINT64_C(268436362), // VCTUXS |
1310 | 30.0k | UINT64_C(268436362), // VCTUXS_0 |
1311 | 30.0k | UINT64_C(268437124), // VEQV |
1312 | 30.0k | UINT64_C(268435850), // VEXPTEFP |
1313 | 30.0k | UINT64_C(268436748), // VGBBD |
1314 | 30.0k | UINT64_C(268435914), // VLOGEFP |
1315 | 30.0k | UINT64_C(268435502), // VMADDFP |
1316 | 30.0k | UINT64_C(268436490), // VMAXFP |
1317 | 30.0k | UINT64_C(268435714), // VMAXSB |
1318 | 30.0k | UINT64_C(268435906), // VMAXSD |
1319 | 30.0k | UINT64_C(268435778), // VMAXSH |
1320 | 30.0k | UINT64_C(268435842), // VMAXSW |
1321 | 30.0k | UINT64_C(268435458), // VMAXUB |
1322 | 30.0k | UINT64_C(268435650), // VMAXUD |
1323 | 30.0k | UINT64_C(268435522), // VMAXUH |
1324 | 30.0k | UINT64_C(268435586), // VMAXUW |
1325 | 30.0k | UINT64_C(268435488), // VMHADDSHS |
1326 | 30.0k | UINT64_C(268435489), // VMHRADDSHS |
1327 | 30.0k | UINT64_C(268436554), // VMINFP |
1328 | 30.0k | UINT64_C(268436226), // VMINSB |
1329 | 30.0k | UINT64_C(268436418), // VMINSD |
1330 | 30.0k | UINT64_C(268436290), // VMINSH |
1331 | 30.0k | UINT64_C(268436354), // VMINSW |
1332 | 30.0k | UINT64_C(268435970), // VMINUB |
1333 | 30.0k | UINT64_C(268436162), // VMINUD |
1334 | 30.0k | UINT64_C(268436034), // VMINUH |
1335 | 30.0k | UINT64_C(268436098), // VMINUW |
1336 | 30.0k | UINT64_C(268435490), // VMLADDUHM |
1337 | 30.0k | UINT64_C(268437388), // VMRGEW |
1338 | 30.0k | UINT64_C(268435468), // VMRGHB |
1339 | 30.0k | UINT64_C(268435532), // VMRGHH |
1340 | 30.0k | UINT64_C(268435596), // VMRGHW |
1341 | 30.0k | UINT64_C(268435724), // VMRGLB |
1342 | 30.0k | UINT64_C(268435788), // VMRGLH |
1343 | 30.0k | UINT64_C(268435852), // VMRGLW |
1344 | 30.0k | UINT64_C(268437132), // VMRGOW |
1345 | 30.0k | UINT64_C(268435493), // VMSUMMBM |
1346 | 30.0k | UINT64_C(268435496), // VMSUMSHM |
1347 | 30.0k | UINT64_C(268435497), // VMSUMSHS |
1348 | 30.0k | UINT64_C(268435492), // VMSUMUBM |
1349 | 30.0k | UINT64_C(268435494), // VMSUMUHM |
1350 | 30.0k | UINT64_C(268435495), // VMSUMUHS |
1351 | 30.0k | UINT64_C(268436232), // VMULESB |
1352 | 30.0k | UINT64_C(268436296), // VMULESH |
1353 | 30.0k | UINT64_C(268436360), // VMULESW |
1354 | 30.0k | UINT64_C(268435976), // VMULEUB |
1355 | 30.0k | UINT64_C(268436040), // VMULEUH |
1356 | 30.0k | UINT64_C(268436104), // VMULEUW |
1357 | 30.0k | UINT64_C(268435720), // VMULOSB |
1358 | 30.0k | UINT64_C(268435784), // VMULOSH |
1359 | 30.0k | UINT64_C(268435848), // VMULOSW |
1360 | 30.0k | UINT64_C(268435464), // VMULOUB |
1361 | 30.0k | UINT64_C(268435528), // VMULOUH |
1362 | 30.0k | UINT64_C(268435592), // VMULOUW |
1363 | 30.0k | UINT64_C(268435593), // VMULUWM |
1364 | 30.0k | UINT64_C(268436868), // VNAND |
1365 | 30.0k | UINT64_C(268436808), // VNCIPHER |
1366 | 30.0k | UINT64_C(268436809), // VNCIPHERLAST |
1367 | 30.0k | UINT64_C(268435503), // VNMSUBFP |
1368 | 30.0k | UINT64_C(268436740), // VNOR |
1369 | 30.0k | UINT64_C(268436612), // VOR |
1370 | 30.0k | UINT64_C(268436804), // VORC |
1371 | 30.0k | UINT64_C(268435499), // VPERM |
1372 | 30.0k | UINT64_C(268435501), // VPERMXOR |
1373 | 30.0k | UINT64_C(268436238), // VPKPX |
1374 | 30.0k | UINT64_C(268436942), // VPKSDSS |
1375 | 30.0k | UINT64_C(268436814), // VPKSDUS |
1376 | 30.0k | UINT64_C(268435854), // VPKSHSS |
1377 | 30.0k | UINT64_C(268435726), // VPKSHUS |
1378 | 30.0k | UINT64_C(268435918), // VPKSWSS |
1379 | 30.0k | UINT64_C(268435790), // VPKSWUS |
1380 | 30.0k | UINT64_C(268436558), // VPKUDUM |
1381 | 30.0k | UINT64_C(268436686), // VPKUDUS |
1382 | 30.0k | UINT64_C(268435470), // VPKUHUM |
1383 | 30.0k | UINT64_C(268435598), // VPKUHUS |
1384 | 30.0k | UINT64_C(268435534), // VPKUWUM |
1385 | 30.0k | UINT64_C(268435662), // VPKUWUS |
1386 | 30.0k | UINT64_C(268436488), // VPMSUMB |
1387 | 30.0k | UINT64_C(268436680), // VPMSUMD |
1388 | 30.0k | UINT64_C(268436552), // VPMSUMH |
1389 | 30.0k | UINT64_C(268436616), // VPMSUMW |
1390 | 30.0k | UINT64_C(268437251), // VPOPCNTB |
1391 | 30.0k | UINT64_C(268437443), // VPOPCNTD |
1392 | 30.0k | UINT64_C(268437315), // VPOPCNTH |
1393 | 30.0k | UINT64_C(268437379), // VPOPCNTW |
1394 | 30.0k | UINT64_C(268435722), // VREFP |
1395 | 30.0k | UINT64_C(268436170), // VRFIM |
1396 | 30.0k | UINT64_C(268435978), // VRFIN |
1397 | 30.0k | UINT64_C(268436106), // VRFIP |
1398 | 30.0k | UINT64_C(268436042), // VRFIZ |
1399 | 30.0k | UINT64_C(268435460), // VRLB |
1400 | 30.0k | UINT64_C(268435652), // VRLD |
1401 | 30.0k | UINT64_C(268435524), // VRLH |
1402 | 30.0k | UINT64_C(268435588), // VRLW |
1403 | 30.0k | UINT64_C(268435786), // VRSQRTEFP |
1404 | 30.0k | UINT64_C(268436936), // VSBOX |
1405 | 30.0k | UINT64_C(268435498), // VSEL |
1406 | 30.0k | UINT64_C(268437186), // VSHASIGMAD |
1407 | 30.0k | UINT64_C(268437122), // VSHASIGMAW |
1408 | 30.0k | UINT64_C(268435908), // VSL |
1409 | 30.0k | UINT64_C(268435716), // VSLB |
1410 | 30.0k | UINT64_C(268436932), // VSLD |
1411 | 30.0k | UINT64_C(268435500), // VSLDOI |
1412 | 30.0k | UINT64_C(268435780), // VSLH |
1413 | 30.0k | UINT64_C(268436492), // VSLO |
1414 | 30.0k | UINT64_C(268435844), // VSLW |
1415 | 30.0k | UINT64_C(268435980), // VSPLTB |
1416 | 30.0k | UINT64_C(268436044), // VSPLTH |
1417 | 30.0k | UINT64_C(268436236), // VSPLTISB |
1418 | 30.0k | UINT64_C(268436300), // VSPLTISH |
1419 | 30.0k | UINT64_C(268436364), // VSPLTISW |
1420 | 30.0k | UINT64_C(268436108), // VSPLTW |
1421 | 30.0k | UINT64_C(268436164), // VSR |
1422 | 30.0k | UINT64_C(268436228), // VSRAB |
1423 | 30.0k | UINT64_C(268436420), // VSRAD |
1424 | 30.0k | UINT64_C(268436292), // VSRAH |
1425 | 30.0k | UINT64_C(268436356), // VSRAW |
1426 | 30.0k | UINT64_C(268435972), // VSRB |
1427 | 30.0k | UINT64_C(268437188), // VSRD |
1428 | 30.0k | UINT64_C(268436036), // VSRH |
1429 | 30.0k | UINT64_C(268436556), // VSRO |
1430 | 30.0k | UINT64_C(268436100), // VSRW |
1431 | 30.0k | UINT64_C(268436800), // VSUBCUQ |
1432 | 30.0k | UINT64_C(268436864), // VSUBCUW |
1433 | 30.0k | UINT64_C(268435519), // VSUBECUQ |
1434 | 30.0k | UINT64_C(268435518), // VSUBEUQM |
1435 | 30.0k | UINT64_C(268435530), // VSUBFP |
1436 | 30.0k | UINT64_C(268437248), // VSUBSBS |
1437 | 30.0k | UINT64_C(268437312), // VSUBSHS |
1438 | 30.0k | UINT64_C(268437376), // VSUBSWS |
1439 | 30.0k | UINT64_C(268436480), // VSUBUBM |
1440 | 30.0k | UINT64_C(268436992), // VSUBUBS |
1441 | 30.0k | UINT64_C(268436672), // VSUBUDM |
1442 | 30.0k | UINT64_C(268436544), // VSUBUHM |
1443 | 30.0k | UINT64_C(268437056), // VSUBUHS |
1444 | 30.0k | UINT64_C(268436736), // VSUBUQM |
1445 | 30.0k | UINT64_C(268436608), // VSUBUWM |
1446 | 30.0k | UINT64_C(268437120), // VSUBUWS |
1447 | 30.0k | UINT64_C(268437128), // VSUM2SWS |
1448 | 30.0k | UINT64_C(268437256), // VSUM4SBS |
1449 | 30.0k | UINT64_C(268437064), // VSUM4SHS |
1450 | 30.0k | UINT64_C(268437000), // VSUM4UBS |
1451 | 30.0k | UINT64_C(268437384), // VSUMSWS |
1452 | 30.0k | UINT64_C(268436302), // VUPKHPX |
1453 | 30.0k | UINT64_C(268435982), // VUPKHSB |
1454 | 30.0k | UINT64_C(268436046), // VUPKHSH |
1455 | 30.0k | UINT64_C(268437070), // VUPKHSW |
1456 | 30.0k | UINT64_C(268436430), // VUPKLPX |
1457 | 30.0k | UINT64_C(268436110), // VUPKLSB |
1458 | 30.0k | UINT64_C(268436174), // VUPKLSH |
1459 | 30.0k | UINT64_C(268437198), // VUPKLSW |
1460 | 30.0k | UINT64_C(268436676), // VXOR |
1461 | 30.0k | UINT64_C(268436676), // V_SET0 |
1462 | 30.0k | UINT64_C(268436676), // V_SET0B |
1463 | 30.0k | UINT64_C(268436676), // V_SET0H |
1464 | 30.0k | UINT64_C(270467980), // V_SETALLONES |
1465 | 30.0k | UINT64_C(270467980), // V_SETALLONESB |
1466 | 30.0k | UINT64_C(270467980), // V_SETALLONESH |
1467 | 30.0k | UINT64_C(2080374908), // WAIT |
1468 | 30.0k | UINT64_C(2080375046), // WRTEE |
1469 | 30.0k | UINT64_C(2080375110), // WRTEEI |
1470 | 30.0k | UINT64_C(2080375416), // XOR |
1471 | 30.0k | UINT64_C(2080375416), // XOR8 |
1472 | 30.0k | UINT64_C(2080375417), // XOR8o |
1473 | 30.0k | UINT64_C(1744830464), // XORI |
1474 | 30.0k | UINT64_C(1744830464), // XORI8 |
1475 | 30.0k | UINT64_C(1811939328), // XORIS |
1476 | 30.0k | UINT64_C(1811939328), // XORIS8 |
1477 | 30.0k | UINT64_C(2080375417), // XORo |
1478 | 30.0k | UINT64_C(4026533220), // XSABSDP |
1479 | 30.0k | UINT64_C(4026532096), // XSADDDP |
1480 | 30.0k | UINT64_C(4026531840), // XSADDSP |
1481 | 30.0k | UINT64_C(4026532184), // XSCMPODP |
1482 | 30.0k | UINT64_C(4026532120), // XSCMPUDP |
1483 | 30.0k | UINT64_C(4026533248), // XSCPSGNDP |
1484 | 30.0k | UINT64_C(4026532900), // XSCVDPSP |
1485 | 30.0k | UINT64_C(4026532908), // XSCVDPSPN |
1486 | 30.0k | UINT64_C(4026533216), // XSCVDPSXDS |
1487 | 30.0k | UINT64_C(4026532192), // XSCVDPSXWS |
1488 | 30.0k | UINT64_C(4026533152), // XSCVDPUXDS |
1489 | 30.0k | UINT64_C(4026532128), // XSCVDPUXWS |
1490 | 30.0k | UINT64_C(4026533156), // XSCVSPDP |
1491 | 30.0k | UINT64_C(4026533164), // XSCVSPDPN |
1492 | 30.0k | UINT64_C(4026533344), // XSCVSXDDP |
1493 | 30.0k | UINT64_C(4026533088), // XSCVSXDSP |
1494 | 30.0k | UINT64_C(4026533280), // XSCVUXDDP |
1495 | 30.0k | UINT64_C(4026533024), // XSCVUXDSP |
1496 | 30.0k | UINT64_C(4026532288), // XSDIVDP |
1497 | 30.0k | UINT64_C(4026532032), // XSDIVSP |
1498 | 30.0k | UINT64_C(4026532104), // XSMADDADP |
1499 | 30.0k | UINT64_C(4026531848), // XSMADDASP |
1500 | 30.0k | UINT64_C(4026532168), // XSMADDMDP |
1501 | 30.0k | UINT64_C(4026531912), // XSMADDMSP |
1502 | 30.0k | UINT64_C(4026533120), // XSMAXDP |
1503 | 30.0k | UINT64_C(4026533184), // XSMINDP |
1504 | 30.0k | UINT64_C(4026532232), // XSMSUBADP |
1505 | 30.0k | UINT64_C(4026531976), // XSMSUBASP |
1506 | 30.0k | UINT64_C(4026532296), // XSMSUBMDP |
1507 | 30.0k | UINT64_C(4026532040), // XSMSUBMSP |
1508 | 30.0k | UINT64_C(4026532224), // XSMULDP |
1509 | 30.0k | UINT64_C(4026531968), // XSMULSP |
1510 | 30.0k | UINT64_C(4026533284), // XSNABSDP |
1511 | 30.0k | UINT64_C(4026533348), // XSNEGDP |
1512 | 30.0k | UINT64_C(4026533128), // XSNMADDADP |
1513 | 30.0k | UINT64_C(4026532872), // XSNMADDASP |
1514 | 30.0k | UINT64_C(4026533192), // XSNMADDMDP |
1515 | 30.0k | UINT64_C(4026532936), // XSNMADDMSP |
1516 | 30.0k | UINT64_C(4026533256), // XSNMSUBADP |
1517 | 30.0k | UINT64_C(4026533000), // XSNMSUBASP |
1518 | 30.0k | UINT64_C(4026533320), // XSNMSUBMDP |
1519 | 30.0k | UINT64_C(4026533064), // XSNMSUBMSP |
1520 | 30.0k | UINT64_C(4026532132), // XSRDPI |
1521 | 30.0k | UINT64_C(4026532268), // XSRDPIC |
1522 | 30.0k | UINT64_C(4026532324), // XSRDPIM |
1523 | 30.0k | UINT64_C(4026532260), // XSRDPIP |
1524 | 30.0k | UINT64_C(4026532196), // XSRDPIZ |
1525 | 30.0k | UINT64_C(4026532200), // XSREDP |
1526 | 30.0k | UINT64_C(4026531944), // XSRESP |
1527 | 30.0k | UINT64_C(4026532136), // XSRSQRTEDP |
1528 | 30.0k | UINT64_C(4026531880), // XSRSQRTESP |
1529 | 30.0k | UINT64_C(4026532140), // XSSQRTDP |
1530 | 30.0k | UINT64_C(4026531884), // XSSQRTSP |
1531 | 30.0k | UINT64_C(4026532160), // XSSUBDP |
1532 | 30.0k | UINT64_C(4026531904), // XSSUBSP |
1533 | 30.0k | UINT64_C(4026532328), // XSTDIVDP |
1534 | 30.0k | UINT64_C(4026532264), // XSTSQRTDP |
1535 | 30.0k | UINT64_C(4026533732), // XVABSDP |
1536 | 30.0k | UINT64_C(4026533476), // XVABSSP |
1537 | 30.0k | UINT64_C(4026532608), // XVADDDP |
1538 | 30.0k | UINT64_C(4026532352), // XVADDSP |
1539 | 30.0k | UINT64_C(4026532632), // XVCMPEQDP |
1540 | 30.0k | UINT64_C(4026533656), // XVCMPEQDPo |
1541 | 30.0k | UINT64_C(4026532376), // XVCMPEQSP |
1542 | 30.0k | UINT64_C(4026533400), // XVCMPEQSPo |
1543 | 30.0k | UINT64_C(4026532760), // XVCMPGEDP |
1544 | 30.0k | UINT64_C(4026533784), // XVCMPGEDPo |
1545 | 30.0k | UINT64_C(4026532504), // XVCMPGESP |
1546 | 30.0k | UINT64_C(4026533528), // XVCMPGESPo |
1547 | 30.0k | UINT64_C(4026532696), // XVCMPGTDP |
1548 | 30.0k | UINT64_C(4026533720), // XVCMPGTDPo |
1549 | 30.0k | UINT64_C(4026532440), // XVCMPGTSP |
1550 | 30.0k | UINT64_C(4026533464), // XVCMPGTSPo |
1551 | 30.0k | UINT64_C(4026533760), // XVCPSGNDP |
1552 | 30.0k | UINT64_C(4026533504), // XVCPSGNSP |
1553 | 30.0k | UINT64_C(4026533412), // XVCVDPSP |
1554 | 30.0k | UINT64_C(4026533728), // XVCVDPSXDS |
1555 | 30.0k | UINT64_C(4026532704), // XVCVDPSXWS |
1556 | 30.0k | UINT64_C(4026533664), // XVCVDPUXDS |
1557 | 30.0k | UINT64_C(4026532640), // XVCVDPUXWS |
1558 | 30.0k | UINT64_C(4026533668), // XVCVSPDP |
1559 | 30.0k | UINT64_C(4026533472), // XVCVSPSXDS |
1560 | 30.0k | UINT64_C(4026532448), // XVCVSPSXWS |
1561 | 30.0k | UINT64_C(4026533408), // XVCVSPUXDS |
1562 | 30.0k | UINT64_C(4026532384), // XVCVSPUXWS |
1563 | 30.0k | UINT64_C(4026533856), // XVCVSXDDP |
1564 | 30.0k | UINT64_C(4026533600), // XVCVSXDSP |
1565 | 30.0k | UINT64_C(4026532832), // XVCVSXWDP |
1566 | 30.0k | UINT64_C(4026532576), // XVCVSXWSP |
1567 | 30.0k | UINT64_C(4026533792), // XVCVUXDDP |
1568 | 30.0k | UINT64_C(4026533536), // XVCVUXDSP |
1569 | 30.0k | UINT64_C(4026532768), // XVCVUXWDP |
1570 | 30.0k | UINT64_C(4026532512), // XVCVUXWSP |
1571 | 30.0k | UINT64_C(4026532800), // XVDIVDP |
1572 | 30.0k | UINT64_C(4026532544), // XVDIVSP |
1573 | 30.0k | UINT64_C(4026532616), // XVMADDADP |
1574 | 30.0k | UINT64_C(4026532360), // XVMADDASP |
1575 | 30.0k | UINT64_C(4026532680), // XVMADDMDP |
1576 | 30.0k | UINT64_C(4026532424), // XVMADDMSP |
1577 | 30.0k | UINT64_C(4026533632), // XVMAXDP |
1578 | 30.0k | UINT64_C(4026533376), // XVMAXSP |
1579 | 30.0k | UINT64_C(4026533696), // XVMINDP |
1580 | 30.0k | UINT64_C(4026533440), // XVMINSP |
1581 | 30.0k | UINT64_C(4026532744), // XVMSUBADP |
1582 | 30.0k | UINT64_C(4026532488), // XVMSUBASP |
1583 | 30.0k | UINT64_C(4026532808), // XVMSUBMDP |
1584 | 30.0k | UINT64_C(4026532552), // XVMSUBMSP |
1585 | 30.0k | UINT64_C(4026532736), // XVMULDP |
1586 | 30.0k | UINT64_C(4026532480), // XVMULSP |
1587 | 30.0k | UINT64_C(4026533796), // XVNABSDP |
1588 | 30.0k | UINT64_C(4026533540), // XVNABSSP |
1589 | 30.0k | UINT64_C(4026533860), // XVNEGDP |
1590 | 30.0k | UINT64_C(4026533604), // XVNEGSP |
1591 | 30.0k | UINT64_C(4026533640), // XVNMADDADP |
1592 | 30.0k | UINT64_C(4026533384), // XVNMADDASP |
1593 | 30.0k | UINT64_C(4026533704), // XVNMADDMDP |
1594 | 30.0k | UINT64_C(4026533448), // XVNMADDMSP |
1595 | 30.0k | UINT64_C(4026533768), // XVNMSUBADP |
1596 | 30.0k | UINT64_C(4026533512), // XVNMSUBASP |
1597 | 30.0k | UINT64_C(4026533832), // XVNMSUBMDP |
1598 | 30.0k | UINT64_C(4026533576), // XVNMSUBMSP |
1599 | 30.0k | UINT64_C(4026532644), // XVRDPI |
1600 | 30.0k | UINT64_C(4026532780), // XVRDPIC |
1601 | 30.0k | UINT64_C(4026532836), // XVRDPIM |
1602 | 30.0k | UINT64_C(4026532772), // XVRDPIP |
1603 | 30.0k | UINT64_C(4026532708), // XVRDPIZ |
1604 | 30.0k | UINT64_C(4026532712), // XVREDP |
1605 | 30.0k | UINT64_C(4026532456), // XVRESP |
1606 | 30.0k | UINT64_C(4026532388), // XVRSPI |
1607 | 30.0k | UINT64_C(4026532524), // XVRSPIC |
1608 | 30.0k | UINT64_C(4026532580), // XVRSPIM |
1609 | 30.0k | UINT64_C(4026532516), // XVRSPIP |
1610 | 30.0k | UINT64_C(4026532452), // XVRSPIZ |
1611 | 30.0k | UINT64_C(4026532648), // XVRSQRTEDP |
1612 | 30.0k | UINT64_C(4026532392), // XVRSQRTESP |
1613 | 30.0k | UINT64_C(4026532652), // XVSQRTDP |
1614 | 30.0k | UINT64_C(4026532396), // XVSQRTSP |
1615 | 30.0k | UINT64_C(4026532672), // XVSUBDP |
1616 | 30.0k | UINT64_C(4026532416), // XVSUBSP |
1617 | 30.0k | UINT64_C(4026532840), // XVTDIVDP |
1618 | 30.0k | UINT64_C(4026532584), // XVTDIVSP |
1619 | 30.0k | UINT64_C(4026532776), // XVTSQRTDP |
1620 | 30.0k | UINT64_C(4026532520), // XVTSQRTSP |
1621 | 30.0k | UINT64_C(4026532880), // XXLAND |
1622 | 30.0k | UINT64_C(4026532944), // XXLANDC |
1623 | 30.0k | UINT64_C(4026533328), // XXLEQV |
1624 | 30.0k | UINT64_C(4026533264), // XXLNAND |
1625 | 30.0k | UINT64_C(4026533136), // XXLNOR |
1626 | 30.0k | UINT64_C(4026533008), // XXLOR |
1627 | 30.0k | UINT64_C(4026533200), // XXLORC |
1628 | 30.0k | UINT64_C(4026533008), // XXLORf |
1629 | 30.0k | UINT64_C(4026533072), // XXLXOR |
1630 | 30.0k | UINT64_C(4026531984), // XXMRGHW |
1631 | 30.0k | UINT64_C(4026532240), // XXMRGLW |
1632 | 30.0k | UINT64_C(4026531920), // XXPERMDI |
1633 | 30.0k | UINT64_C(4026531888), // XXSEL |
1634 | 30.0k | UINT64_C(4026531856), // XXSLDWI |
1635 | 30.0k | UINT64_C(4026532496), // XXSPLTW |
1636 | 30.0k | UINT64_C(1073741824), // gBC |
1637 | 30.0k | UINT64_C(1073741826), // gBCA |
1638 | 30.0k | UINT64_C(1275069472), // gBCCTR |
1639 | 30.0k | UINT64_C(1275069473), // gBCCTRL |
1640 | 30.0k | UINT64_C(1073741825), // gBCL |
1641 | 30.0k | UINT64_C(1073741827), // gBCLA |
1642 | 30.0k | UINT64_C(1275068448), // gBCLR |
1643 | 30.0k | UINT64_C(1275068449), // gBCLRL |
1644 | 30.0k | UINT64_C(0) |
1645 | 30.0k | }; |
1646 | 30.0k | const unsigned opcode = MI.getOpcode(); |
1647 | 30.0k | uint64_t Value = InstBits[opcode]; |
1648 | 30.0k | uint64_t op = 0; |
1649 | 30.0k | (void)op; // suppress warning |
1650 | 30.0k | switch (opcode) { |
1651 | 0 | case PPC::ADDISdtprelHA: |
1652 | 0 | case PPC::ADDISdtprelHA32: |
1653 | 0 | case PPC::ADDISgotTprelHA: |
1654 | 0 | case PPC::ADDIStlsgdHA: |
1655 | 0 | case PPC::ADDIStlsldHA: |
1656 | 0 | case PPC::ADDIStocHA: |
1657 | 0 | case PPC::ADDIdtprelL: |
1658 | 0 | case PPC::ADDIdtprelL32: |
1659 | 0 | case PPC::ADDItlsgdL: |
1660 | 0 | case PPC::ADDItlsgdL32: |
1661 | 0 | case PPC::ADDItlsgdLADDR: |
1662 | 0 | case PPC::ADDItlsgdLADDR32: |
1663 | 0 | case PPC::ADDItlsldL: |
1664 | 0 | case PPC::ADDItlsldL32: |
1665 | 0 | case PPC::ADDItlsldLADDR: |
1666 | 0 | case PPC::ADDItlsldLADDR32: |
1667 | 0 | case PPC::ADDItocL: |
1668 | 0 | case PPC::ADJCALLSTACKDOWN: |
1669 | 0 | case PPC::ADJCALLSTACKUP: |
1670 | 0 | case PPC::ANDIo_1_EQ_BIT: |
1671 | 0 | case PPC::ANDIo_1_EQ_BIT8: |
1672 | 0 | case PPC::ANDIo_1_GT_BIT: |
1673 | 0 | case PPC::ANDIo_1_GT_BIT8: |
1674 | 0 | case PPC::ATOMIC_CMP_SWAP_I16: |
1675 | 0 | case PPC::ATOMIC_CMP_SWAP_I32: |
1676 | 0 | case PPC::ATOMIC_CMP_SWAP_I64: |
1677 | 0 | case PPC::ATOMIC_CMP_SWAP_I8: |
1678 | 0 | case PPC::ATOMIC_LOAD_ADD_I16: |
1679 | 0 | case PPC::ATOMIC_LOAD_ADD_I32: |
1680 | 0 | case PPC::ATOMIC_LOAD_ADD_I64: |
1681 | 0 | case PPC::ATOMIC_LOAD_ADD_I8: |
1682 | 0 | case PPC::ATOMIC_LOAD_AND_I16: |
1683 | 0 | case PPC::ATOMIC_LOAD_AND_I32: |
1684 | 0 | case PPC::ATOMIC_LOAD_AND_I64: |
1685 | 0 | case PPC::ATOMIC_LOAD_AND_I8: |
1686 | 0 | case PPC::ATOMIC_LOAD_NAND_I16: |
1687 | 0 | case PPC::ATOMIC_LOAD_NAND_I32: |
1688 | 0 | case PPC::ATOMIC_LOAD_NAND_I64: |
1689 | 0 | case PPC::ATOMIC_LOAD_NAND_I8: |
1690 | 0 | case PPC::ATOMIC_LOAD_OR_I16: |
1691 | 0 | case PPC::ATOMIC_LOAD_OR_I32: |
1692 | 0 | case PPC::ATOMIC_LOAD_OR_I64: |
1693 | 0 | case PPC::ATOMIC_LOAD_OR_I8: |
1694 | 0 | case PPC::ATOMIC_LOAD_SUB_I16: |
1695 | 0 | case PPC::ATOMIC_LOAD_SUB_I32: |
1696 | 0 | case PPC::ATOMIC_LOAD_SUB_I64: |
1697 | 0 | case PPC::ATOMIC_LOAD_SUB_I8: |
1698 | 0 | case PPC::ATOMIC_LOAD_XOR_I16: |
1699 | 0 | case PPC::ATOMIC_LOAD_XOR_I32: |
1700 | 0 | case PPC::ATOMIC_LOAD_XOR_I64: |
1701 | 0 | case PPC::ATOMIC_LOAD_XOR_I8: |
1702 | 0 | case PPC::ATOMIC_SWAP_I16: |
1703 | 0 | case PPC::ATOMIC_SWAP_I32: |
1704 | 0 | case PPC::ATOMIC_SWAP_I64: |
1705 | 0 | case PPC::ATOMIC_SWAP_I8: |
1706 | 0 | case PPC::ATTN: |
1707 | 1 | case PPC::BCTR: |
1708 | 1 | case PPC::BCTR8: |
1709 | 1 | case PPC::BCTRL: |
1710 | 1 | case PPC::BCTRL8: |
1711 | 1 | case PPC::BDNZLR: |
1712 | 1 | case PPC::BDNZLR8: |
1713 | 1 | case PPC::BDNZLRL: |
1714 | 1 | case PPC::BDNZLRLm: |
1715 | 1 | case PPC::BDNZLRLp: |
1716 | 1 | case PPC::BDNZLRm: |
1717 | 1 | case PPC::BDNZLRp: |
1718 | 23 | case PPC::BDZLR: |
1719 | 23 | case PPC::BDZLR8: |
1720 | 23 | case PPC::BDZLRL: |
1721 | 23 | case PPC::BDZLRLm: |
1722 | 23 | case PPC::BDZLRLp: |
1723 | 23 | case PPC::BDZLRm: |
1724 | 23 | case PPC::BDZLRp: |
1725 | 99 | case PPC::BLR: |
1726 | 99 | case PPC::BLR8: |
1727 | 99 | case PPC::BLRL: |
1728 | 171 | case PPC::CLRBHRB: |
1729 | 171 | case PPC::CR6SET: |
1730 | 171 | case PPC::CR6UNSET: |
1731 | 171 | case PPC::DSSALL: |
1732 | 171 | case PPC::DYNALLOC: |
1733 | 171 | case PPC::DYNALLOC8: |
1734 | 171 | case PPC::DYNAREAOFFSET: |
1735 | 171 | case PPC::DYNAREAOFFSET8: |
1736 | 171 | case PPC::EH_SjLj_LongJmp32: |
1737 | 171 | case PPC::EH_SjLj_LongJmp64: |
1738 | 171 | case PPC::EH_SjLj_SetJmp32: |
1739 | 171 | case PPC::EH_SjLj_SetJmp64: |
1740 | 171 | case PPC::EH_SjLj_Setup: |
1741 | 171 | case PPC::EnforceIEIO: |
1742 | 171 | case PPC::FADDrtz: |
1743 | 171 | case PPC::GETtlsADDR: |
1744 | 171 | case PPC::GETtlsADDR32: |
1745 | 171 | case PPC::GETtlsldADDR: |
1746 | 171 | case PPC::GETtlsldADDR32: |
1747 | 171 | case PPC::ISYNC: |
1748 | 171 | case PPC::LDgotTprelL: |
1749 | 171 | case PPC::LDgotTprelL32: |
1750 | 171 | case PPC::LDtoc: |
1751 | 171 | case PPC::LDtocBA: |
1752 | 171 | case PPC::LDtocCPT: |
1753 | 171 | case PPC::LDtocJTI: |
1754 | 171 | case PPC::LDtocL: |
1755 | 171 | case PPC::LWZtoc: |
1756 | 171 | case PPC::MSYNC: |
1757 | 171 | case PPC::MoveGOTtoLR: |
1758 | 171 | case PPC::MovePCtoLR: |
1759 | 171 | case PPC::MovePCtoLR8: |
1760 | 259 | case PPC::NOP: |
1761 | 259 | case PPC::NOP_GT_PWR6: |
1762 | 259 | case PPC::NOP_GT_PWR7: |
1763 | 259 | case PPC::PPC32GOT: |
1764 | 259 | case PPC::PPC32PICGOT: |
1765 | 259 | case PPC::RESTORE_CR: |
1766 | 259 | case PPC::RESTORE_CRBIT: |
1767 | 259 | case PPC::RESTORE_VRSAVE: |
1768 | 259 | case PPC::RFCI: |
1769 | 259 | case PPC::RFDI: |
1770 | 315 | case PPC::RFI: |
1771 | 317 | case PPC::RFID: |
1772 | 317 | case PPC::RFMCI: |
1773 | 317 | case PPC::ReadTB: |
1774 | 317 | case PPC::SELECT_CC_F4: |
1775 | 317 | case PPC::SELECT_CC_F8: |
1776 | 317 | case PPC::SELECT_CC_I4: |
1777 | 317 | case PPC::SELECT_CC_I8: |
1778 | 317 | case PPC::SELECT_CC_QBRC: |
1779 | 317 | case PPC::SELECT_CC_QFRC: |
1780 | 317 | case PPC::SELECT_CC_QSRC: |
1781 | 317 | case PPC::SELECT_CC_VRRC: |
1782 | 317 | case PPC::SELECT_CC_VSFRC: |
1783 | 317 | case PPC::SELECT_CC_VSRC: |
1784 | 317 | case PPC::SELECT_CC_VSSRC: |
1785 | 317 | case PPC::SELECT_F4: |
1786 | 317 | case PPC::SELECT_F8: |
1787 | 317 | case PPC::SELECT_I4: |
1788 | 317 | case PPC::SELECT_I8: |
1789 | 317 | case PPC::SELECT_QBRC: |
1790 | 317 | case PPC::SELECT_QFRC: |
1791 | 317 | case PPC::SELECT_QSRC: |
1792 | 317 | case PPC::SELECT_VRRC: |
1793 | 317 | case PPC::SELECT_VSFRC: |
1794 | 317 | case PPC::SELECT_VSRC: |
1795 | 317 | case PPC::SELECT_VSSRC: |
1796 | 317 | case PPC::SLBIA: |
1797 | 317 | case PPC::SPILL_CR: |
1798 | 317 | case PPC::SPILL_CRBIT: |
1799 | 317 | case PPC::SPILL_VRSAVE: |
1800 | 317 | case PPC::TAILBCTR: |
1801 | 317 | case PPC::TAILBCTR8: |
1802 | 317 | case PPC::TCHECK_RET: |
1803 | 317 | case PPC::TCRETURNai: |
1804 | 317 | case PPC::TCRETURNai8: |
1805 | 317 | case PPC::TCRETURNdi: |
1806 | 317 | case PPC::TCRETURNdi8: |
1807 | 317 | case PPC::TCRETURNri: |
1808 | 317 | case PPC::TCRETURNri8: |
1809 | 317 | case PPC::TLBIA: |
1810 | 317 | case PPC::TLBRE: |
1811 | 317 | case PPC::TLBSYNC: |
1812 | 317 | case PPC::TLBWE: |
1813 | 336 | case PPC::TRAP: |
1814 | 336 | case PPC::TRECHKPT: |
1815 | 336 | case PPC::UPDATE_VRSAVE: |
1816 | 336 | case PPC::UpdateGBR: { |
1817 | 336 | break; |
1818 | 336 | } |
1819 | 0 | case PPC::DCBA: |
1820 | 0 | case PPC::DCBF: |
1821 | 0 | case PPC::DCBI: |
1822 | 0 | case PPC::DCBST: |
1823 | 0 | case PPC::DCBZ: |
1824 | 0 | case PPC::DCBZL: |
1825 | 0 | case PPC::DCCCI: |
1826 | 0 | case PPC::ICBI: |
1827 | 0 | case PPC::ICCCI: |
1828 | 0 | case PPC::TLBIVAX: |
1829 | 0 | case PPC::TLBSX: { |
1830 | | // op: A |
1831 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
1832 | 0 | Value |= (op & UINT64_C(31)) << 16; |
1833 | | // op: B |
1834 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
1835 | 0 | Value |= (op & UINT64_C(31)) << 11; |
1836 | 0 | break; |
1837 | 0 | } |
1838 | 0 | case PPC::SRADI: |
1839 | 0 | case PPC::SRADIo: { |
1840 | | // op: A |
1841 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
1842 | 0 | Value |= (op & UINT64_C(31)) << 16; |
1843 | | // op: RS |
1844 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
1845 | 0 | Value |= (op & UINT64_C(31)) << 21; |
1846 | | // op: SH |
1847 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
1848 | 0 | Value |= (op & UINT64_C(31)) << 11; |
1849 | 0 | Value |= (op & UINT64_C(32)) >> 4; |
1850 | 0 | break; |
1851 | 0 | } |
1852 | 0 | case PPC::CNTLZD: |
1853 | 0 | case PPC::CNTLZDo: |
1854 | 7 | case PPC::CNTLZW: |
1855 | 7 | case PPC::CNTLZW8: |
1856 | 7 | case PPC::CNTLZW8o: |
1857 | 7 | case PPC::CNTLZWo: |
1858 | 7 | case PPC::EXTSB: |
1859 | 7 | case PPC::EXTSB8: |
1860 | 7 | case PPC::EXTSB8_32_64: |
1861 | 7 | case PPC::EXTSB8o: |
1862 | 7 | case PPC::EXTSBo: |
1863 | 7 | case PPC::EXTSH: |
1864 | 7 | case PPC::EXTSH8: |
1865 | 7 | case PPC::EXTSH8_32_64: |
1866 | 7 | case PPC::EXTSH8o: |
1867 | 7 | case PPC::EXTSHo: |
1868 | 7 | case PPC::EXTSW: |
1869 | 7 | case PPC::EXTSW_32_64: |
1870 | 7 | case PPC::EXTSW_32_64o: |
1871 | 7 | case PPC::EXTSWo: |
1872 | 7 | case PPC::POPCNTD: |
1873 | 7 | case PPC::POPCNTW: |
1874 | 7 | case PPC::QVLPCLSXint: { |
1875 | | // op: A |
1876 | 7 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
1877 | 7 | Value |= (op & UINT64_C(31)) << 16; |
1878 | | // op: RST |
1879 | 7 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
1880 | 7 | Value |= (op & UINT64_C(31)) << 21; |
1881 | 7 | break; |
1882 | 7 | } |
1883 | 0 | case PPC::AND: |
1884 | 0 | case PPC::AND8: |
1885 | 0 | case PPC::AND8o: |
1886 | 22 | case PPC::ANDC: |
1887 | 22 | case PPC::ANDC8: |
1888 | 22 | case PPC::ANDC8o: |
1889 | 107 | case PPC::ANDCo: |
1890 | 107 | case PPC::ANDo: |
1891 | 107 | case PPC::BPERMD: |
1892 | 107 | case PPC::CMPB: |
1893 | 107 | case PPC::CMPB8: |
1894 | 107 | case PPC::EQV: |
1895 | 107 | case PPC::EQV8: |
1896 | 107 | case PPC::EQV8o: |
1897 | 107 | case PPC::EQVo: |
1898 | 107 | case PPC::NAND: |
1899 | 107 | case PPC::NAND8: |
1900 | 107 | case PPC::NAND8o: |
1901 | 107 | case PPC::NANDo: |
1902 | 107 | case PPC::NOR: |
1903 | 107 | case PPC::NOR8: |
1904 | 107 | case PPC::NOR8o: |
1905 | 107 | case PPC::NORo: |
1906 | 107 | case PPC::OR: |
1907 | 236 | case PPC::OR8: |
1908 | 237 | case PPC::OR8o: |
1909 | 237 | case PPC::ORC: |
1910 | 237 | case PPC::ORC8: |
1911 | 237 | case PPC::ORC8o: |
1912 | 237 | case PPC::ORCo: |
1913 | 237 | case PPC::ORo: |
1914 | 237 | case PPC::SLD: |
1915 | 237 | case PPC::SLDo: |
1916 | 237 | case PPC::SLW: |
1917 | 237 | case PPC::SLW8: |
1918 | 237 | case PPC::SLW8o: |
1919 | 237 | case PPC::SLWo: |
1920 | 237 | case PPC::SRAD: |
1921 | 237 | case PPC::SRADo: |
1922 | 237 | case PPC::SRAW: |
1923 | 237 | case PPC::SRAWI: |
1924 | 237 | case PPC::SRAWIo: |
1925 | 237 | case PPC::SRAWo: |
1926 | 244 | case PPC::SRD: |
1927 | 244 | case PPC::SRDo: |
1928 | 244 | case PPC::SRW: |
1929 | 244 | case PPC::SRW8: |
1930 | 244 | case PPC::SRW8o: |
1931 | 244 | case PPC::SRWo: |
1932 | 244 | case PPC::XOR: |
1933 | 244 | case PPC::XOR8: |
1934 | 244 | case PPC::XOR8o: |
1935 | 244 | case PPC::XORo: { |
1936 | | // op: A |
1937 | 244 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
1938 | 244 | Value |= (op & UINT64_C(31)) << 16; |
1939 | | // op: RST |
1940 | 244 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
1941 | 244 | Value |= (op & UINT64_C(31)) << 21; |
1942 | | // op: B |
1943 | 244 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
1944 | 244 | Value |= (op & UINT64_C(31)) << 11; |
1945 | 244 | break; |
1946 | 244 | } |
1947 | 0 | case PPC::LBZ: |
1948 | 0 | case PPC::LBZ8: |
1949 | 5 | case PPC::LFD: |
1950 | 17 | case PPC::LFS: |
1951 | 17 | case PPC::LHA: |
1952 | 17 | case PPC::LHA8: |
1953 | 17 | case PPC::LHZ: |
1954 | 17 | case PPC::LHZ8: |
1955 | 17 | case PPC::LMW: |
1956 | 17 | case PPC::LWZ: |
1957 | 17 | case PPC::LWZ8: |
1958 | 19 | case PPC::STB: |
1959 | 19 | case PPC::STB8: |
1960 | 19 | case PPC::STFD: |
1961 | 19 | case PPC::STFS: |
1962 | 24 | case PPC::STH: |
1963 | 24 | case PPC::STH8: |
1964 | 24 | case PPC::STMW: |
1965 | 24 | case PPC::STW: |
1966 | 24 | case PPC::STW8: { |
1967 | | // op: A |
1968 | 24 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
1969 | 24 | Value |= (op & UINT64_C(31)) << 21; |
1970 | | // op: Addr |
1971 | 24 | op = getMemRIEncoding(MI, 1, Fixups, STI); |
1972 | 24 | Value |= op & UINT64_C(2097151); |
1973 | 24 | break; |
1974 | 24 | } |
1975 | 0 | case PPC::LBZU: |
1976 | 0 | case PPC::LBZU8: |
1977 | 0 | case PPC::LFDU: |
1978 | 9 | case PPC::LFSU: |
1979 | 9 | case PPC::LHAU: |
1980 | 9 | case PPC::LHAU8: |
1981 | 9 | case PPC::LHZU: |
1982 | 9 | case PPC::LHZU8: |
1983 | 9 | case PPC::LWZU: |
1984 | 9 | case PPC::LWZU8: { |
1985 | | // op: A |
1986 | 9 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
1987 | 9 | Value |= (op & UINT64_C(31)) << 21; |
1988 | | // op: Addr |
1989 | 9 | op = getMemRIEncoding(MI, 2, Fixups, STI); |
1990 | 9 | Value |= op & UINT64_C(2097151); |
1991 | 9 | break; |
1992 | 9 | } |
1993 | 22 | case PPC::LI: |
1994 | 22 | case PPC::LI8: |
1995 | 125 | case PPC::LIS: |
1996 | 125 | case PPC::LIS8: { |
1997 | | // op: A |
1998 | 125 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
1999 | 125 | Value |= (op & UINT64_C(31)) << 21; |
2000 | | // op: B |
2001 | 125 | op = getImm16Encoding(MI, 1, Fixups, STI); |
2002 | 125 | Value |= op & UINT64_C(65535); |
2003 | 125 | break; |
2004 | 125 | } |
2005 | 8 | case PPC::ADDI: |
2006 | 8 | case PPC::ADDI8: |
2007 | 8 | case PPC::ADDIC: |
2008 | 8 | case PPC::ADDIC8: |
2009 | 28 | case PPC::ADDICo: |
2010 | 28 | case PPC::ADDIS: |
2011 | 28 | case PPC::ADDIS8: |
2012 | 28 | case PPC::LA: |
2013 | 28 | case PPC::MULLI: |
2014 | 28 | case PPC::MULLI8: |
2015 | 28 | case PPC::SUBFIC: |
2016 | 28 | case PPC::SUBFIC8: |
2017 | 28 | case PPC::TDI: |
2018 | 28 | case PPC::TWI: { |
2019 | | // op: A |
2020 | 28 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2021 | 28 | Value |= (op & UINT64_C(31)) << 21; |
2022 | | // op: B |
2023 | 28 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2024 | 28 | Value |= (op & UINT64_C(31)) << 16; |
2025 | | // op: C |
2026 | 28 | op = getImm16Encoding(MI, 2, Fixups, STI); |
2027 | 28 | Value |= op & UINT64_C(65535); |
2028 | 28 | break; |
2029 | 28 | } |
2030 | 0 | case PPC::TEND: { |
2031 | | // op: A |
2032 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2033 | 0 | Value |= (op & UINT64_C(1)) << 25; |
2034 | 0 | break; |
2035 | 28 | } |
2036 | 0 | case PPC::TABORT: |
2037 | 0 | case PPC::TRECLAIM: { |
2038 | | // op: A |
2039 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2040 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2041 | 0 | break; |
2042 | 0 | } |
2043 | 0 | case PPC::STBU: |
2044 | 0 | case PPC::STBU8: |
2045 | 0 | case PPC::STFDU: |
2046 | 0 | case PPC::STFSU: |
2047 | 0 | case PPC::STHU: |
2048 | 0 | case PPC::STHU8: |
2049 | 0 | case PPC::STWU: |
2050 | 0 | case PPC::STWU8: { |
2051 | | // op: A |
2052 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2053 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2054 | | // op: Addr |
2055 | 0 | op = getMemRIEncoding(MI, 2, Fixups, STI); |
2056 | 0 | Value |= op & UINT64_C(2097151); |
2057 | 0 | break; |
2058 | 0 | } |
2059 | 0 | case PPC::SLBIE: |
2060 | 0 | case PPC::TLBIEL: |
2061 | 0 | case PPC::TLBLD: |
2062 | 0 | case PPC::TLBLI: { |
2063 | | // op: B |
2064 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2065 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2066 | 0 | break; |
2067 | 0 | } |
2068 | 0 | case PPC::ANDISo: |
2069 | 0 | case PPC::ANDISo8: |
2070 | 0 | case PPC::ANDIo: |
2071 | 0 | case PPC::ANDIo8: |
2072 | 0 | case PPC::ORI: |
2073 | 0 | case PPC::ORI8: |
2074 | 0 | case PPC::ORIS: |
2075 | 0 | case PPC::ORIS8: |
2076 | 84 | case PPC::XORI: |
2077 | 84 | case PPC::XORI8: |
2078 | 84 | case PPC::XORIS: |
2079 | 84 | case PPC::XORIS8: { |
2080 | | // op: B |
2081 | 84 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2082 | 84 | Value |= (op & UINT64_C(31)) << 16; |
2083 | | // op: A |
2084 | 84 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2085 | 84 | Value |= (op & UINT64_C(31)) << 21; |
2086 | | // op: C |
2087 | 84 | op = getImm16Encoding(MI, 2, Fixups, STI); |
2088 | 84 | Value |= op & UINT64_C(65535); |
2089 | 84 | break; |
2090 | 84 | } |
2091 | 79 | case PPC::BDNZA: |
2092 | 81 | case PPC::BDNZAm: |
2093 | 228 | case PPC::BDNZAp: |
2094 | 467 | case PPC::BDNZLA: |
2095 | 467 | case PPC::BDNZLAm: |
2096 | 467 | case PPC::BDNZLAp: |
2097 | 496 | case PPC::BDZA: |
2098 | 497 | case PPC::BDZAm: |
2099 | 505 | case PPC::BDZAp: |
2100 | 505 | case PPC::BDZLA: |
2101 | 506 | case PPC::BDZLAm: |
2102 | 524 | case PPC::BDZLAp: { |
2103 | | // op: BD |
2104 | 524 | op = getAbsCondBrEncoding(MI, 0, Fixups, STI); |
2105 | 524 | Value |= (op & UINT64_C(16383)) << 2; |
2106 | 524 | break; |
2107 | 506 | } |
2108 | 0 | case PPC::BCLalways: |
2109 | 20 | case PPC::BDNZ: |
2110 | 20 | case PPC::BDNZ8: |
2111 | 29 | case PPC::BDNZL: |
2112 | 36 | case PPC::BDNZLm: |
2113 | 49 | case PPC::BDNZLp: |
2114 | 49 | case PPC::BDNZm: |
2115 | 53 | case PPC::BDNZp: |
2116 | 57 | case PPC::BDZ: |
2117 | 57 | case PPC::BDZ8: |
2118 | 57 | case PPC::BDZL: |
2119 | 57 | case PPC::BDZLm: |
2120 | 67 | case PPC::BDZLp: |
2121 | 134 | case PPC::BDZm: |
2122 | 158 | case PPC::BDZp: { |
2123 | | // op: BD |
2124 | 158 | op = getCondBrEncoding(MI, 0, Fixups, STI); |
2125 | 158 | Value |= (op & UINT64_C(16383)) << 2; |
2126 | 158 | break; |
2127 | 134 | } |
2128 | 0 | case PPC::TCHECK: { |
2129 | | // op: BF |
2130 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2131 | 0 | Value |= (op & UINT64_C(7)) << 23; |
2132 | 0 | break; |
2133 | 134 | } |
2134 | 0 | case PPC::MCRF: |
2135 | 0 | case PPC::MCRFS: { |
2136 | | // op: BF |
2137 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2138 | 0 | Value |= (op & UINT64_C(7)) << 23; |
2139 | | // op: BFA |
2140 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2141 | 0 | Value |= (op & UINT64_C(7)) << 18; |
2142 | 0 | break; |
2143 | 0 | } |
2144 | 0 | case PPC::FCMPUD: |
2145 | 0 | case PPC::FCMPUS: { |
2146 | | // op: BF |
2147 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2148 | 0 | Value |= (op & UINT64_C(7)) << 23; |
2149 | | // op: FRA |
2150 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2151 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2152 | | // op: FRB |
2153 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2154 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2155 | 0 | break; |
2156 | 0 | } |
2157 | 0 | case PPC::CMPDI: |
2158 | 0 | case PPC::CMPLDI: |
2159 | 1 | case PPC::CMPLWI: |
2160 | 1 | case PPC::CMPWI: { |
2161 | | // op: BF |
2162 | 1 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2163 | 1 | Value |= (op & UINT64_C(7)) << 23; |
2164 | | // op: RA |
2165 | 1 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2166 | 1 | Value |= (op & UINT64_C(31)) << 16; |
2167 | | // op: I |
2168 | 1 | op = getImm16Encoding(MI, 2, Fixups, STI); |
2169 | 1 | Value |= op & UINT64_C(65535); |
2170 | 1 | break; |
2171 | 1 | } |
2172 | 0 | case PPC::CMPD: |
2173 | 0 | case PPC::CMPLD: |
2174 | 0 | case PPC::CMPLW: |
2175 | 0 | case PPC::CMPW: { |
2176 | | // op: BF |
2177 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2178 | 0 | Value |= (op & UINT64_C(7)) << 23; |
2179 | | // op: RA |
2180 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2181 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2182 | | // op: RB |
2183 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2184 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2185 | 0 | break; |
2186 | 0 | } |
2187 | 0 | case PPC::MTFSFI: |
2188 | 0 | case PPC::MTFSFIo: { |
2189 | | // op: BF |
2190 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2191 | 0 | Value |= (op & UINT64_C(7)) << 23; |
2192 | | // op: W |
2193 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2194 | 0 | Value |= (op & UINT64_C(1)) << 16; |
2195 | | // op: U |
2196 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2197 | 0 | Value |= (op & UINT64_C(15)) << 12; |
2198 | 0 | break; |
2199 | 0 | } |
2200 | 0 | case PPC::BCCTR: |
2201 | 0 | case PPC::BCCTR8: |
2202 | 0 | case PPC::BCCTR8n: |
2203 | 0 | case PPC::BCCTRL: |
2204 | 0 | case PPC::BCCTRL8: |
2205 | 0 | case PPC::BCCTRL8n: |
2206 | 0 | case PPC::BCCTRLn: |
2207 | 0 | case PPC::BCCTRn: |
2208 | 0 | case PPC::BCLR: |
2209 | 0 | case PPC::BCLRL: |
2210 | 0 | case PPC::BCLRLn: |
2211 | 0 | case PPC::BCLRn: { |
2212 | | // op: BI |
2213 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2214 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2215 | 0 | break; |
2216 | 0 | } |
2217 | 0 | case PPC::BC: |
2218 | 0 | case PPC::BCL: |
2219 | 0 | case PPC::BCLn: |
2220 | 0 | case PPC::BCn: { |
2221 | | // op: BI |
2222 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2223 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2224 | | // op: BD |
2225 | 0 | op = getCondBrEncoding(MI, 1, Fixups, STI); |
2226 | 0 | Value |= (op & UINT64_C(16383)) << 2; |
2227 | 0 | break; |
2228 | 0 | } |
2229 | 25 | case PPC::BCCCTR: |
2230 | 25 | case PPC::BCCCTR8: |
2231 | 25 | case PPC::BCCCTRL: |
2232 | 25 | case PPC::BCCCTRL8: |
2233 | 25 | case PPC::BCCLR: |
2234 | 25 | case PPC::BCCLRL: { |
2235 | | // op: BIBO |
2236 | 25 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2237 | 25 | Value |= (op & UINT64_C(31)) << 21; |
2238 | 25 | Value |= (op & UINT64_C(96)) << 11; |
2239 | | // op: CR |
2240 | 25 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2241 | 25 | Value |= (op & UINT64_C(7)) << 18; |
2242 | 25 | break; |
2243 | 25 | } |
2244 | 413 | case PPC::BCCA: |
2245 | 418 | case PPC::BCCLA: { |
2246 | | // op: BIBO |
2247 | 418 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2248 | 418 | Value |= (op & UINT64_C(31)) << 21; |
2249 | 418 | Value |= (op & UINT64_C(96)) << 11; |
2250 | | // op: CR |
2251 | 418 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2252 | 418 | Value |= (op & UINT64_C(7)) << 18; |
2253 | | // op: BD |
2254 | 418 | op = getAbsCondBrEncoding(MI, 2, Fixups, STI); |
2255 | 418 | Value |= (op & UINT64_C(16383)) << 2; |
2256 | 418 | break; |
2257 | 413 | } |
2258 | 24.6k | case PPC::BCC: |
2259 | 24.8k | case PPC::BCCL: { |
2260 | | // op: BIBO |
2261 | 24.8k | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2262 | 24.8k | Value |= (op & UINT64_C(31)) << 21; |
2263 | 24.8k | Value |= (op & UINT64_C(96)) << 11; |
2264 | | // op: CR |
2265 | 24.8k | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2266 | 24.8k | Value |= (op & UINT64_C(7)) << 18; |
2267 | | // op: BD |
2268 | 24.8k | op = getCondBrEncoding(MI, 2, Fixups, STI); |
2269 | 24.8k | Value |= (op & UINT64_C(16383)) << 2; |
2270 | 24.8k | break; |
2271 | 24.6k | } |
2272 | 0 | case PPC::gBCA: |
2273 | 0 | case PPC::gBCLA: { |
2274 | | // op: BO |
2275 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2276 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2277 | | // op: BI |
2278 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2279 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2280 | | // op: BD |
2281 | 0 | op = getAbsCondBrEncoding(MI, 2, Fixups, STI); |
2282 | 0 | Value |= (op & UINT64_C(16383)) << 2; |
2283 | 0 | break; |
2284 | 0 | } |
2285 | 2 | case PPC::gBC: |
2286 | 2 | case PPC::gBCL: { |
2287 | | // op: BO |
2288 | 2 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2289 | 2 | Value |= (op & UINT64_C(31)) << 21; |
2290 | | // op: BI |
2291 | 2 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2292 | 2 | Value |= (op & UINT64_C(31)) << 16; |
2293 | | // op: BD |
2294 | 2 | op = getCondBrEncoding(MI, 2, Fixups, STI); |
2295 | 2 | Value |= (op & UINT64_C(16383)) << 2; |
2296 | 2 | break; |
2297 | 2 | } |
2298 | 16 | case PPC::gBCCTR: |
2299 | 16 | case PPC::gBCCTRL: |
2300 | 16 | case PPC::gBCLR: |
2301 | 16 | case PPC::gBCLRL: { |
2302 | | // op: BO |
2303 | 16 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2304 | 16 | Value |= (op & UINT64_C(31)) << 21; |
2305 | | // op: BI |
2306 | 16 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2307 | 16 | Value |= (op & UINT64_C(31)) << 16; |
2308 | | // op: BH |
2309 | 16 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2310 | 16 | Value |= (op & UINT64_C(3)) << 11; |
2311 | 16 | break; |
2312 | 16 | } |
2313 | 0 | case PPC::XSCMPODP: |
2314 | 0 | case PPC::XSCMPUDP: |
2315 | 0 | case PPC::XSTDIVDP: |
2316 | 0 | case PPC::XVTDIVDP: |
2317 | 0 | case PPC::XVTDIVSP: { |
2318 | | // op: CR |
2319 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2320 | 0 | Value |= (op & UINT64_C(7)) << 23; |
2321 | | // op: XA |
2322 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2323 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2324 | 0 | Value |= (op & UINT64_C(32)) >> 3; |
2325 | | // op: XB |
2326 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2327 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2328 | 0 | Value |= (op & UINT64_C(32)) >> 4; |
2329 | 0 | break; |
2330 | 0 | } |
2331 | 0 | case PPC::XSTSQRTDP: |
2332 | 0 | case PPC::XVTSQRTDP: |
2333 | 0 | case PPC::XVTSQRTSP: { |
2334 | | // op: CR |
2335 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2336 | 0 | Value |= (op & UINT64_C(7)) << 23; |
2337 | | // op: XB |
2338 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2339 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2340 | 0 | Value |= (op & UINT64_C(32)) >> 4; |
2341 | 0 | break; |
2342 | 0 | } |
2343 | 0 | case PPC::CRAND: |
2344 | 0 | case PPC::CRANDC: |
2345 | 0 | case PPC::CREQV: |
2346 | 0 | case PPC::CRNAND: |
2347 | 0 | case PPC::CRNOR: |
2348 | 0 | case PPC::CROR: |
2349 | 0 | case PPC::CRORC: |
2350 | 0 | case PPC::CRXOR: { |
2351 | | // op: CRD |
2352 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2353 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2354 | | // op: CRA |
2355 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2356 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2357 | | // op: CRB |
2358 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2359 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2360 | 0 | break; |
2361 | 0 | } |
2362 | 0 | case PPC::CRSET: |
2363 | 0 | case PPC::CRUNSET: { |
2364 | | // op: CRD |
2365 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2366 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2367 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2368 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2369 | 0 | break; |
2370 | 0 | } |
2371 | 0 | case PPC::ICBT: { |
2372 | | // op: CT |
2373 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2374 | 0 | Value |= (op & UINT64_C(15)) << 21; |
2375 | | // op: RA |
2376 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2377 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2378 | | // op: RB |
2379 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2380 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2381 | 0 | break; |
2382 | 0 | } |
2383 | 0 | case PPC::BCTRL8_LDinto_toc: { |
2384 | | // op: DS_RA |
2385 | 0 | op = getMemRIXEncoding(MI, 0, Fixups, STI); |
2386 | 0 | Value |= (op & UINT64_C(524287)) << 2; |
2387 | 0 | break; |
2388 | 0 | } |
2389 | 0 | case PPC::WRTEEI: { |
2390 | | // op: E |
2391 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2392 | 0 | Value |= (op & UINT64_C(1)) << 15; |
2393 | 0 | break; |
2394 | 0 | } |
2395 | 0 | case PPC::MTFSFb: { |
2396 | | // op: FM |
2397 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2398 | 0 | Value |= (op & UINT64_C(255)) << 17; |
2399 | | // op: rT |
2400 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2401 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2402 | 0 | break; |
2403 | 0 | } |
2404 | 0 | case PPC::MTFSB0: |
2405 | 0 | case PPC::MTFSB1: { |
2406 | | // op: FM |
2407 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2408 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2409 | 0 | break; |
2410 | 0 | } |
2411 | 13 | case PPC::FADD: |
2412 | 13 | case PPC::FADDS: |
2413 | 13 | case PPC::FADDSo: |
2414 | 35 | case PPC::FADDo: |
2415 | 35 | case PPC::FDIV: |
2416 | 35 | case PPC::FDIVS: |
2417 | 35 | case PPC::FDIVSo: |
2418 | 35 | case PPC::FDIVo: |
2419 | 35 | case PPC::FSUB: |
2420 | 35 | case PPC::FSUBS: |
2421 | 35 | case PPC::FSUBSo: |
2422 | 35 | case PPC::FSUBo: |
2423 | 35 | case PPC::QVFADD: |
2424 | 35 | case PPC::QVFADDS: |
2425 | 35 | case PPC::QVFADDSs: |
2426 | 35 | case PPC::QVFCMPEQ: |
2427 | 35 | case PPC::QVFCMPEQb: |
2428 | 35 | case PPC::QVFCMPEQbs: |
2429 | 35 | case PPC::QVFCMPGT: |
2430 | 35 | case PPC::QVFCMPGTb: |
2431 | 35 | case PPC::QVFCMPGTbs: |
2432 | 35 | case PPC::QVFCMPLT: |
2433 | 35 | case PPC::QVFCMPLTb: |
2434 | 35 | case PPC::QVFCMPLTbs: |
2435 | 35 | case PPC::QVFCPSGN: |
2436 | 35 | case PPC::QVFCPSGNs: |
2437 | 35 | case PPC::QVFSUB: |
2438 | 35 | case PPC::QVFSUBS: |
2439 | 35 | case PPC::QVFSUBSs: |
2440 | 35 | case PPC::QVFTSTNAN: |
2441 | 35 | case PPC::QVFTSTNANb: |
2442 | 35 | case PPC::QVFTSTNANbs: { |
2443 | | // op: FRT |
2444 | 35 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2445 | 35 | Value |= (op & UINT64_C(31)) << 21; |
2446 | | // op: FRA |
2447 | 35 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2448 | 35 | Value |= (op & UINT64_C(31)) << 16; |
2449 | | // op: FRB |
2450 | 35 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2451 | 35 | Value |= (op & UINT64_C(31)) << 11; |
2452 | 35 | break; |
2453 | 35 | } |
2454 | 0 | case PPC::QVALIGNI: |
2455 | 0 | case PPC::QVALIGNIb: |
2456 | 0 | case PPC::QVALIGNIs: { |
2457 | | // op: FRT |
2458 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2459 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2460 | | // op: FRA |
2461 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2462 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2463 | | // op: FRB |
2464 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2465 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2466 | | // op: idx |
2467 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
2468 | 0 | Value |= (op & UINT64_C(3)) << 9; |
2469 | 0 | break; |
2470 | 0 | } |
2471 | 0 | case PPC::QVFLOGICAL: |
2472 | 0 | case PPC::QVFLOGICALb: |
2473 | 0 | case PPC::QVFLOGICALs: { |
2474 | | // op: FRT |
2475 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2476 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2477 | | // op: FRA |
2478 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2479 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2480 | | // op: FRB |
2481 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2482 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2483 | | // op: tttt |
2484 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
2485 | 0 | Value |= (op & UINT64_C(15)) << 7; |
2486 | 0 | break; |
2487 | 0 | } |
2488 | 0 | case PPC::FMUL: |
2489 | 0 | case PPC::FMULS: |
2490 | 0 | case PPC::FMULSo: |
2491 | 0 | case PPC::FMULo: |
2492 | 0 | case PPC::QVFMUL: |
2493 | 0 | case PPC::QVFMULS: |
2494 | 0 | case PPC::QVFMULSs: |
2495 | 0 | case PPC::QVFXMUL: |
2496 | 0 | case PPC::QVFXMULS: { |
2497 | | // op: FRT |
2498 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2499 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2500 | | // op: FRA |
2501 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2502 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2503 | | // op: FRC |
2504 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2505 | 0 | Value |= (op & UINT64_C(31)) << 6; |
2506 | 0 | break; |
2507 | 0 | } |
2508 | 0 | case PPC::FMADD: |
2509 | 0 | case PPC::FMADDS: |
2510 | 0 | case PPC::FMADDSo: |
2511 | 0 | case PPC::FMADDo: |
2512 | 0 | case PPC::FMSUB: |
2513 | 0 | case PPC::FMSUBS: |
2514 | 0 | case PPC::FMSUBSo: |
2515 | 0 | case PPC::FMSUBo: |
2516 | 0 | case PPC::FNMADD: |
2517 | 0 | case PPC::FNMADDS: |
2518 | 0 | case PPC::FNMADDSo: |
2519 | 0 | case PPC::FNMADDo: |
2520 | 0 | case PPC::FNMSUB: |
2521 | 0 | case PPC::FNMSUBS: |
2522 | 0 | case PPC::FNMSUBSo: |
2523 | 0 | case PPC::FNMSUBo: |
2524 | 0 | case PPC::FSELD: |
2525 | 0 | case PPC::FSELDo: |
2526 | 0 | case PPC::FSELS: |
2527 | 0 | case PPC::FSELSo: { |
2528 | | // op: FRT |
2529 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2530 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2531 | | // op: FRA |
2532 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2533 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2534 | | // op: FRC |
2535 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2536 | 0 | Value |= (op & UINT64_C(31)) << 6; |
2537 | | // op: FRB |
2538 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
2539 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2540 | 0 | break; |
2541 | 0 | } |
2542 | 0 | case PPC::QVFMADD: |
2543 | 0 | case PPC::QVFMADDS: |
2544 | 0 | case PPC::QVFMADDSs: |
2545 | 0 | case PPC::QVFMSUB: |
2546 | 0 | case PPC::QVFMSUBS: |
2547 | 0 | case PPC::QVFMSUBSs: |
2548 | 0 | case PPC::QVFNMADD: |
2549 | 0 | case PPC::QVFNMADDS: |
2550 | 0 | case PPC::QVFNMADDSs: |
2551 | 0 | case PPC::QVFNMSUB: |
2552 | 0 | case PPC::QVFNMSUBS: |
2553 | 0 | case PPC::QVFNMSUBSs: |
2554 | 0 | case PPC::QVFPERM: |
2555 | 0 | case PPC::QVFPERMs: |
2556 | 0 | case PPC::QVFSEL: |
2557 | 0 | case PPC::QVFSELb: |
2558 | 0 | case PPC::QVFSELbb: |
2559 | 0 | case PPC::QVFSELbs: |
2560 | 0 | case PPC::QVFXMADD: |
2561 | 0 | case PPC::QVFXMADDS: |
2562 | 0 | case PPC::QVFXXCPNMADD: |
2563 | 0 | case PPC::QVFXXCPNMADDS: |
2564 | 0 | case PPC::QVFXXMADD: |
2565 | 0 | case PPC::QVFXXMADDS: |
2566 | 0 | case PPC::QVFXXNPMADD: |
2567 | 0 | case PPC::QVFXXNPMADDS: { |
2568 | | // op: FRT |
2569 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2570 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2571 | | // op: FRA |
2572 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2573 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2574 | | // op: FRC |
2575 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
2576 | 0 | Value |= (op & UINT64_C(31)) << 6; |
2577 | | // op: FRB |
2578 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2579 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2580 | 0 | break; |
2581 | 0 | } |
2582 | 0 | case PPC::QVESPLATI: |
2583 | 0 | case PPC::QVESPLATIb: |
2584 | 0 | case PPC::QVESPLATIs: { |
2585 | | // op: FRT |
2586 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2587 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2588 | | // op: FRA |
2589 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2590 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2591 | | // op: idx |
2592 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2593 | 0 | Value |= (op & UINT64_C(3)) << 9; |
2594 | 0 | break; |
2595 | 0 | } |
2596 | 0 | case PPC::QVFABS: |
2597 | 0 | case PPC::QVFABSs: |
2598 | 0 | case PPC::QVFCFID: |
2599 | 0 | case PPC::QVFCFIDS: |
2600 | 0 | case PPC::QVFCFIDU: |
2601 | 0 | case PPC::QVFCFIDUS: |
2602 | 0 | case PPC::QVFCFIDb: |
2603 | 0 | case PPC::QVFCTID: |
2604 | 0 | case PPC::QVFCTIDU: |
2605 | 0 | case PPC::QVFCTIDUZ: |
2606 | 0 | case PPC::QVFCTIDZ: |
2607 | 0 | case PPC::QVFCTIDb: |
2608 | 0 | case PPC::QVFCTIW: |
2609 | 0 | case PPC::QVFCTIWU: |
2610 | 0 | case PPC::QVFCTIWUZ: |
2611 | 0 | case PPC::QVFCTIWZ: |
2612 | 0 | case PPC::QVFMR: |
2613 | 0 | case PPC::QVFMRb: |
2614 | 0 | case PPC::QVFMRs: |
2615 | 0 | case PPC::QVFNABS: |
2616 | 0 | case PPC::QVFNABSs: |
2617 | 0 | case PPC::QVFNEG: |
2618 | 0 | case PPC::QVFNEGs: |
2619 | 0 | case PPC::QVFRE: |
2620 | 0 | case PPC::QVFRES: |
2621 | 0 | case PPC::QVFRESs: |
2622 | 0 | case PPC::QVFRIM: |
2623 | 0 | case PPC::QVFRIMs: |
2624 | 0 | case PPC::QVFRIN: |
2625 | 0 | case PPC::QVFRINs: |
2626 | 0 | case PPC::QVFRIP: |
2627 | 0 | case PPC::QVFRIPs: |
2628 | 0 | case PPC::QVFRIZ: |
2629 | 0 | case PPC::QVFRIZs: |
2630 | 0 | case PPC::QVFRSP: |
2631 | 0 | case PPC::QVFRSPs: |
2632 | 0 | case PPC::QVFRSQRTE: |
2633 | 0 | case PPC::QVFRSQRTES: |
2634 | 0 | case PPC::QVFRSQRTESs: { |
2635 | | // op: FRT |
2636 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2637 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2638 | | // op: FRB |
2639 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2640 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2641 | 0 | break; |
2642 | 0 | } |
2643 | 0 | case PPC::QVGPCI: { |
2644 | | // op: FRT |
2645 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2646 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2647 | | // op: idx |
2648 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2649 | 0 | Value |= (op & UINT64_C(4095)) << 9; |
2650 | 0 | break; |
2651 | 0 | } |
2652 | 0 | case PPC::MTCRF: |
2653 | 0 | case PPC::MTCRF8: { |
2654 | | // op: FXM |
2655 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2656 | 0 | Value |= (op & UINT64_C(255)) << 12; |
2657 | | // op: rS |
2658 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2659 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2660 | 0 | break; |
2661 | 0 | } |
2662 | 0 | case PPC::SYNC: |
2663 | 409 | case PPC::WAIT: { |
2664 | | // op: L |
2665 | 409 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2666 | 409 | Value |= (op & UINT64_C(3)) << 21; |
2667 | 409 | break; |
2668 | 0 | } |
2669 | 0 | case PPC::TSR: { |
2670 | | // op: L |
2671 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2672 | 0 | Value |= (op & UINT64_C(1)) << 21; |
2673 | 0 | break; |
2674 | 0 | } |
2675 | 0 | case PPC::MTFSF: |
2676 | 0 | case PPC::MTFSFo: { |
2677 | | // op: L |
2678 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2679 | 0 | Value |= (op & UINT64_C(1)) << 25; |
2680 | | // op: FLM |
2681 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2682 | 0 | Value |= (op & UINT64_C(255)) << 17; |
2683 | | // op: W |
2684 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
2685 | 0 | Value |= (op & UINT64_C(1)) << 16; |
2686 | | // op: FRB |
2687 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2688 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2689 | 0 | break; |
2690 | 0 | } |
2691 | 0 | case PPC::SC: { |
2692 | | // op: LEV |
2693 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2694 | 0 | Value |= (op & UINT64_C(127)) << 5; |
2695 | 0 | break; |
2696 | 0 | } |
2697 | 25 | case PPC::BA: |
2698 | 47 | case PPC::BLA: |
2699 | 47 | case PPC::BLA8: |
2700 | 47 | case PPC::TAILBA: |
2701 | 47 | case PPC::TAILBA8: { |
2702 | | // op: LI |
2703 | 47 | op = getAbsDirectBrEncoding(MI, 0, Fixups, STI); |
2704 | 47 | Value |= (op & UINT64_C(16777215)) << 2; |
2705 | 47 | break; |
2706 | 47 | } |
2707 | 0 | case PPC::BLA8_NOP: { |
2708 | | // op: LI |
2709 | 0 | op = getAbsDirectBrEncoding(MI, 0, Fixups, STI); |
2710 | 0 | Value |= (op & UINT64_C(16777215)) << 34; |
2711 | 0 | break; |
2712 | 47 | } |
2713 | 1.16k | case PPC::B: |
2714 | 2.06k | case PPC::BL: |
2715 | 2.06k | case PPC::BL8: |
2716 | 2.06k | case PPC::TAILB: |
2717 | 2.06k | case PPC::TAILB8: { |
2718 | | // op: LI |
2719 | 2.06k | op = getDirectBrEncoding(MI, 0, Fixups, STI); |
2720 | 2.06k | Value |= (op & UINT64_C(16777215)) << 2; |
2721 | 2.06k | break; |
2722 | 2.06k | } |
2723 | 0 | case PPC::BL8_NOP: { |
2724 | | // op: LI |
2725 | 0 | op = getDirectBrEncoding(MI, 0, Fixups, STI); |
2726 | 0 | Value |= (op & UINT64_C(16777215)) << 34; |
2727 | 0 | break; |
2728 | 2.06k | } |
2729 | 0 | case PPC::BL8_TLS: |
2730 | 14 | case PPC::BL8_TLS_: |
2731 | 14 | case PPC::BL_TLS: { |
2732 | | // op: LI |
2733 | 14 | op = getTLSCallEncoding(MI, 0, Fixups, STI); |
2734 | 14 | Value |= (op & UINT64_C(16777215)) << 2; |
2735 | 14 | break; |
2736 | 14 | } |
2737 | 0 | case PPC::BL8_NOP_TLS: { |
2738 | | // op: LI |
2739 | 0 | op = getTLSCallEncoding(MI, 0, Fixups, STI); |
2740 | 0 | Value |= (op & UINT64_C(16777215)) << 34; |
2741 | 0 | break; |
2742 | 14 | } |
2743 | 0 | case PPC::MBAR: { |
2744 | | // op: MO |
2745 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2746 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2747 | 0 | break; |
2748 | 14 | } |
2749 | 0 | case PPC::TBEGIN: { |
2750 | | // op: R |
2751 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2752 | 0 | Value |= (op & UINT64_C(1)) << 21; |
2753 | 0 | break; |
2754 | 14 | } |
2755 | 0 | case PPC::RLWINM: |
2756 | 0 | case PPC::RLWINM8: |
2757 | 0 | case PPC::RLWINM8o: |
2758 | 0 | case PPC::RLWINMo: |
2759 | 0 | case PPC::RLWNM: |
2760 | 0 | case PPC::RLWNM8: |
2761 | 0 | case PPC::RLWNM8o: |
2762 | 0 | case PPC::RLWNMo: { |
2763 | | // op: RA |
2764 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2765 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2766 | | // op: RS |
2767 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2768 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2769 | | // op: RB |
2770 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2771 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2772 | | // op: MB |
2773 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
2774 | 0 | Value |= (op & UINT64_C(31)) << 6; |
2775 | | // op: ME |
2776 | 0 | op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); |
2777 | 0 | Value |= (op & UINT64_C(31)) << 1; |
2778 | 0 | break; |
2779 | 0 | } |
2780 | 0 | case PPC::RLDCL: |
2781 | 0 | case PPC::RLDCLo: |
2782 | 0 | case PPC::RLDCR: |
2783 | 0 | case PPC::RLDCRo: { |
2784 | | // op: RA |
2785 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2786 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2787 | | // op: RS |
2788 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2789 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2790 | | // op: RB |
2791 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2792 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2793 | | // op: MBE |
2794 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
2795 | 0 | Value |= (op & UINT64_C(31)) << 6; |
2796 | 0 | Value |= op & UINT64_C(32); |
2797 | 0 | break; |
2798 | 0 | } |
2799 | 0 | case PPC::RLDIC: |
2800 | 0 | case PPC::RLDICL: |
2801 | 0 | case PPC::RLDICL_32_64: |
2802 | 0 | case PPC::RLDICLo: |
2803 | 0 | case PPC::RLDICR: |
2804 | 0 | case PPC::RLDICRo: |
2805 | 0 | case PPC::RLDICo: { |
2806 | | // op: RA |
2807 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2808 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2809 | | // op: RS |
2810 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2811 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2812 | | // op: SH |
2813 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2814 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2815 | 0 | Value |= (op & UINT64_C(32)) >> 4; |
2816 | | // op: MBE |
2817 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
2818 | 0 | Value |= (op & UINT64_C(31)) << 6; |
2819 | 0 | Value |= op & UINT64_C(32); |
2820 | 0 | break; |
2821 | 0 | } |
2822 | 0 | case PPC::RLWIMI: |
2823 | 0 | case PPC::RLWIMI8: |
2824 | 0 | case PPC::RLWIMI8o: |
2825 | 0 | case PPC::RLWIMIo: { |
2826 | | // op: RA |
2827 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2828 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2829 | | // op: RS |
2830 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2831 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2832 | | // op: RB |
2833 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
2834 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2835 | | // op: MB |
2836 | 0 | op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); |
2837 | 0 | Value |= (op & UINT64_C(31)) << 6; |
2838 | | // op: ME |
2839 | 0 | op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI); |
2840 | 0 | Value |= (op & UINT64_C(31)) << 1; |
2841 | 0 | break; |
2842 | 0 | } |
2843 | 0 | case PPC::RLDIMI: |
2844 | 0 | case PPC::RLDIMIo: { |
2845 | | // op: RA |
2846 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2847 | 0 | Value |= (op & UINT64_C(31)) << 16; |
2848 | | // op: RS |
2849 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
2850 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2851 | | // op: SH |
2852 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
2853 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2854 | 0 | Value |= (op & UINT64_C(32)) >> 4; |
2855 | | // op: MBE |
2856 | 0 | op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI); |
2857 | 0 | Value |= (op & UINT64_C(31)) << 6; |
2858 | 0 | Value |= op & UINT64_C(32); |
2859 | 0 | break; |
2860 | 0 | } |
2861 | 0 | case PPC::WRTEE: { |
2862 | | // op: RS |
2863 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2864 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2865 | 0 | break; |
2866 | 0 | } |
2867 | 0 | case PPC::MTMSR: |
2868 | 0 | case PPC::MTMSRD: { |
2869 | | // op: RS |
2870 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2871 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2872 | | // op: L |
2873 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2874 | 0 | Value |= (op & UINT64_C(1)) << 16; |
2875 | 0 | break; |
2876 | 0 | } |
2877 | 0 | case PPC::MFSRIN: |
2878 | 0 | case PPC::MTSRIN: { |
2879 | | // op: RS |
2880 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2881 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2882 | | // op: RB |
2883 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2884 | 0 | Value |= (op & UINT64_C(31)) << 11; |
2885 | 0 | break; |
2886 | 0 | } |
2887 | 0 | case PPC::MFSR: |
2888 | 0 | case PPC::MTSR: { |
2889 | | // op: RS |
2890 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2891 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2892 | | // op: SR |
2893 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
2894 | 0 | Value |= (op & UINT64_C(15)) << 16; |
2895 | 0 | break; |
2896 | 0 | } |
2897 | 0 | case PPC::MFFS: |
2898 | 0 | case PPC::MFFSo: |
2899 | 0 | case PPC::MFMSR: { |
2900 | | // op: RST |
2901 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
2902 | 0 | Value |= (op & UINT64_C(31)) << 21; |
2903 | 0 | break; |
2904 | 0 | } |
2905 | 0 | case PPC::FCPSGND: |
2906 | 0 | case PPC::FCPSGNDo: |
2907 | 0 | case PPC::FCPSGNS: |
2908 | 0 | case PPC::FCPSGNSo: |
2909 | 0 | case PPC::LBARX: |
2910 | 0 | case PPC::LBARXL: |
2911 | 0 | case PPC::LBZCIX: |
2912 | 0 | case PPC::LBZX: |
2913 | 0 | case PPC::LBZX8: |
2914 | 0 | case PPC::LDARX: |
2915 | 0 | case PPC::LDARXL: |
2916 | 0 | case PPC::LDBRX: |
2917 | 0 | case PPC::LDCIX: |
2918 | 0 | case PPC::LDX: |
2919 | 0 | case PPC::LFDX: |
2920 | 0 | case PPC::LFIWAX: |
2921 | 0 | case PPC::LFIWZX: |
2922 | 0 | case PPC::LFSX: |
2923 | 0 | case PPC::LHARX: |
2924 | 0 | case PPC::LHARXL: |
2925 | 0 | case PPC::LHAX: |
2926 | 0 | case PPC::LHAX8: |
2927 | 0 | case PPC::LHBRX: |
2928 | 0 | case PPC::LHBRX8: |
2929 | 0 | case PPC::LHZCIX: |
2930 | 0 | case PPC::LHZX: |
2931 | 0 | case PPC::LHZX8: |
2932 | 0 | case PPC::LSWI: |
2933 | 0 | case PPC::LVEBX: |
2934 | 0 | case PPC::LVEHX: |
2935 | 0 | case PPC::LVEWX: |
2936 | 0 | case PPC::LVSL: |
2937 | 0 | case PPC::LVSR: |
2938 | 0 | case PPC::LVX: |
2939 | 0 | case PPC::LVXL: |
2940 | 0 | case PPC::LWARX: |
2941 | 0 | case PPC::LWARXL: |
2942 | 0 | case PPC::LWAX: |
2943 | 0 | case PPC::LWAX_32: |
2944 | 0 | case PPC::LWBRX: |
2945 | 0 | case PPC::LWBRX8: |
2946 | 0 | case PPC::LWZCIX: |
2947 | 0 | case PPC::LWZX: |
2948 | 0 | case PPC::LWZX8: |
2949 | 0 | case PPC::QVLFCDUX: |
2950 | 0 | case PPC::QVLFCDUXA: |
2951 | 0 | case PPC::QVLFCDX: |
2952 | 0 | case PPC::QVLFCDXA: |
2953 | 0 | case PPC::QVLFCSUX: |
2954 | 0 | case PPC::QVLFCSUXA: |
2955 | 0 | case PPC::QVLFCSX: |
2956 | 0 | case PPC::QVLFCSXA: |
2957 | 0 | case PPC::QVLFCSXs: |
2958 | 0 | case PPC::QVLFDUXA: |
2959 | 0 | case PPC::QVLFDX: |
2960 | 0 | case PPC::QVLFDXA: |
2961 | 0 | case PPC::QVLFDXb: |
2962 | 0 | case PPC::QVLFIWAX: |
2963 | 0 | case PPC::QVLFIWAXA: |
2964 | 0 | case PPC::QVLFIWZX: |
2965 | 0 | case PPC::QVLFIWZXA: |
2966 | 0 | case PPC::QVLFSUXA: |
2967 | 0 | case PPC::QVLFSX: |
2968 | 0 | case PPC::QVLFSXA: |
2969 | 0 | case PPC::QVLFSXb: |
2970 | 0 | case PPC::QVLFSXs: |
2971 | 0 | case PPC::QVLPCLDX: |
2972 | 0 | case PPC::QVLPCLSX: |
2973 | 0 | case PPC::QVLPCRDX: |
2974 | 0 | case PPC::QVLPCRSX: |
2975 | 0 | case PPC::QVSTFCDUX: |
2976 | 0 | case PPC::QVSTFCDUXA: |
2977 | 0 | case PPC::QVSTFCDUXI: |
2978 | 0 | case PPC::QVSTFCDUXIA: |
2979 | 0 | case PPC::QVSTFCDX: |
2980 | 0 | case PPC::QVSTFCDXA: |
2981 | 0 | case PPC::QVSTFCDXI: |
2982 | 0 | case PPC::QVSTFCDXIA: |
2983 | 0 | case PPC::QVSTFCSUX: |
2984 | 0 | case PPC::QVSTFCSUXA: |
2985 | 0 | case PPC::QVSTFCSUXI: |
2986 | 0 | case PPC::QVSTFCSUXIA: |
2987 | 0 | case PPC::QVSTFCSX: |
2988 | 0 | case PPC::QVSTFCSXA: |
2989 | 0 | case PPC::QVSTFCSXI: |
2990 | 0 | case PPC::QVSTFCSXIA: |
2991 | 0 | case PPC::QVSTFCSXs: |
2992 | 0 | case PPC::QVSTFDUXA: |
2993 | 0 | case PPC::QVSTFDUXI: |
2994 | 0 | case PPC::QVSTFDUXIA: |
2995 | 0 | case PPC::QVSTFDX: |
2996 | 0 | case PPC::QVSTFDXA: |
2997 | 0 | case PPC::QVSTFDXI: |
2998 | 0 | case PPC::QVSTFDXIA: |
2999 | 0 | case PPC::QVSTFDXb: |
3000 | 0 | case PPC::QVSTFIWX: |
3001 | 0 | case PPC::QVSTFIWXA: |
3002 | 0 | case PPC::QVSTFSUXA: |
3003 | 0 | case PPC::QVSTFSUXI: |
3004 | 0 | case PPC::QVSTFSUXIA: |
3005 | 0 | case PPC::QVSTFSX: |
3006 | 0 | case PPC::QVSTFSXA: |
3007 | 0 | case PPC::QVSTFSXI: |
3008 | 0 | case PPC::QVSTFSXIA: |
3009 | 0 | case PPC::QVSTFSXs: |
3010 | 0 | case PPC::STBCIX: |
3011 | 0 | case PPC::STBCX: |
3012 | 0 | case PPC::STBX: |
3013 | 0 | case PPC::STBX8: |
3014 | 0 | case PPC::STDBRX: |
3015 | 0 | case PPC::STDCIX: |
3016 | 0 | case PPC::STDCX: |
3017 | 0 | case PPC::STDX: |
3018 | 0 | case PPC::STFDX: |
3019 | 0 | case PPC::STFIWX: |
3020 | 0 | case PPC::STFSX: |
3021 | 0 | case PPC::STHBRX: |
3022 | 0 | case PPC::STHCIX: |
3023 | 0 | case PPC::STHCX: |
3024 | 0 | case PPC::STHX: |
3025 | 0 | case PPC::STHX8: |
3026 | 0 | case PPC::STSWI: |
3027 | 0 | case PPC::STVEBX: |
3028 | 0 | case PPC::STVEHX: |
3029 | 0 | case PPC::STVEWX: |
3030 | 0 | case PPC::STVX: |
3031 | 0 | case PPC::STVXL: |
3032 | 0 | case PPC::STWBRX: |
3033 | 0 | case PPC::STWCIX: |
3034 | 0 | case PPC::STWCX: |
3035 | 0 | case PPC::STWX: |
3036 | 0 | case PPC::STWX8: |
3037 | 4 | case PPC::TD: |
3038 | 4 | case PPC::TLBSX2: |
3039 | 4 | case PPC::TLBSX2D: |
3040 | 4 | case PPC::TW: { |
3041 | | // op: RST |
3042 | 4 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3043 | 4 | Value |= (op & UINT64_C(31)) << 21; |
3044 | | // op: A |
3045 | 4 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3046 | 4 | Value |= (op & UINT64_C(31)) << 16; |
3047 | | // op: B |
3048 | 4 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3049 | 4 | Value |= (op & UINT64_C(31)) << 11; |
3050 | 4 | break; |
3051 | 4 | } |
3052 | 0 | case PPC::TLBRE2: |
3053 | 0 | case PPC::TLBWE2: { |
3054 | | // op: RST |
3055 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3056 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3057 | | // op: A |
3058 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3059 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3060 | | // op: WS |
3061 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3062 | 0 | Value |= (op & UINT64_C(1)) << 11; |
3063 | 0 | break; |
3064 | 0 | } |
3065 | 0 | case PPC::LBZUX: |
3066 | 0 | case PPC::LBZUX8: |
3067 | 0 | case PPC::LDUX: |
3068 | 0 | case PPC::LFDUX: |
3069 | 0 | case PPC::LFSUX: |
3070 | 0 | case PPC::LHAUX: |
3071 | 0 | case PPC::LHAUX8: |
3072 | 0 | case PPC::LHZUX: |
3073 | 0 | case PPC::LHZUX8: |
3074 | 0 | case PPC::LWAUX: |
3075 | 0 | case PPC::LWZUX: |
3076 | 0 | case PPC::LWZUX8: |
3077 | 0 | case PPC::QVLFDUX: |
3078 | 0 | case PPC::QVLFSUX: |
3079 | 0 | case PPC::TABORTDC: |
3080 | 0 | case PPC::TABORTDCI: |
3081 | 0 | case PPC::TABORTWC: |
3082 | 0 | case PPC::TABORTWCI: { |
3083 | | // op: RST |
3084 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3085 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3086 | | // op: A |
3087 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3088 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3089 | | // op: B |
3090 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
3091 | 0 | Value |= (op & UINT64_C(31)) << 11; |
3092 | 0 | break; |
3093 | 0 | } |
3094 | 0 | case PPC::FABSD: |
3095 | 0 | case PPC::FABSDo: |
3096 | 0 | case PPC::FABSS: |
3097 | 0 | case PPC::FABSSo: |
3098 | 0 | case PPC::FCFID: |
3099 | 0 | case PPC::FCFIDS: |
3100 | 0 | case PPC::FCFIDSo: |
3101 | 0 | case PPC::FCFIDU: |
3102 | 0 | case PPC::FCFIDUS: |
3103 | 0 | case PPC::FCFIDUSo: |
3104 | 0 | case PPC::FCFIDUo: |
3105 | 0 | case PPC::FCFIDo: |
3106 | 0 | case PPC::FCTID: |
3107 | 0 | case PPC::FCTIDUZ: |
3108 | 0 | case PPC::FCTIDUZo: |
3109 | 0 | case PPC::FCTIDZ: |
3110 | 0 | case PPC::FCTIDZo: |
3111 | 0 | case PPC::FCTIDo: |
3112 | 0 | case PPC::FCTIW: |
3113 | 0 | case PPC::FCTIWUZ: |
3114 | 0 | case PPC::FCTIWUZo: |
3115 | 0 | case PPC::FCTIWZ: |
3116 | 0 | case PPC::FCTIWZo: |
3117 | 0 | case PPC::FCTIWo: |
3118 | 195 | case PPC::FMR: |
3119 | 195 | case PPC::FMRo: |
3120 | 195 | case PPC::FNABSD: |
3121 | 195 | case PPC::FNABSDo: |
3122 | 195 | case PPC::FNABSS: |
3123 | 195 | case PPC::FNABSSo: |
3124 | 195 | case PPC::FNEGD: |
3125 | 195 | case PPC::FNEGDo: |
3126 | 195 | case PPC::FNEGS: |
3127 | 195 | case PPC::FNEGSo: |
3128 | 195 | case PPC::FRE: |
3129 | 195 | case PPC::FRES: |
3130 | 195 | case PPC::FRESo: |
3131 | 195 | case PPC::FREo: |
3132 | 195 | case PPC::FRIMD: |
3133 | 195 | case PPC::FRIMDo: |
3134 | 195 | case PPC::FRIMS: |
3135 | 195 | case PPC::FRIMSo: |
3136 | 195 | case PPC::FRIND: |
3137 | 195 | case PPC::FRINDo: |
3138 | 195 | case PPC::FRINS: |
3139 | 195 | case PPC::FRINSo: |
3140 | 195 | case PPC::FRIPD: |
3141 | 195 | case PPC::FRIPDo: |
3142 | 195 | case PPC::FRIPS: |
3143 | 198 | case PPC::FRIPSo: |
3144 | 198 | case PPC::FRIZD: |
3145 | 198 | case PPC::FRIZDo: |
3146 | 198 | case PPC::FRIZS: |
3147 | 198 | case PPC::FRIZSo: |
3148 | 198 | case PPC::FRSP: |
3149 | 198 | case PPC::FRSPo: |
3150 | 198 | case PPC::FRSQRTE: |
3151 | 198 | case PPC::FRSQRTES: |
3152 | 198 | case PPC::FRSQRTESo: |
3153 | 198 | case PPC::FRSQRTEo: |
3154 | 198 | case PPC::FSQRT: |
3155 | 198 | case PPC::FSQRTS: |
3156 | 198 | case PPC::FSQRTSo: |
3157 | 198 | case PPC::FSQRTo: |
3158 | 198 | case PPC::SLBMFEE: |
3159 | 198 | case PPC::SLBMTE: |
3160 | 198 | case PPC::TLBIE: { |
3161 | | // op: RST |
3162 | 198 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3163 | 198 | Value |= (op & UINT64_C(31)) << 21; |
3164 | | // op: B |
3165 | 198 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3166 | 198 | Value |= (op & UINT64_C(31)) << 11; |
3167 | 198 | break; |
3168 | 198 | } |
3169 | 171 | case PPC::LD: |
3170 | 171 | case PPC::LWA: |
3171 | 171 | case PPC::LWA_32: |
3172 | 171 | case PPC::STD: { |
3173 | | // op: RST |
3174 | 171 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3175 | 171 | Value |= (op & UINT64_C(31)) << 21; |
3176 | | // op: DS_RA |
3177 | 171 | op = getMemRIXEncoding(MI, 1, Fixups, STI); |
3178 | 171 | Value |= (op & UINT64_C(524287)) << 2; |
3179 | 171 | break; |
3180 | 171 | } |
3181 | 0 | case PPC::LDU: { |
3182 | | // op: RST |
3183 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3184 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3185 | | // op: DS_RA |
3186 | 0 | op = getMemRIXEncoding(MI, 2, Fixups, STI); |
3187 | 0 | Value |= (op & UINT64_C(524287)) << 2; |
3188 | 0 | break; |
3189 | 171 | } |
3190 | 0 | case PPC::QVSTFDUX: |
3191 | 0 | case PPC::QVSTFSUX: |
3192 | 0 | case PPC::QVSTFSUXs: |
3193 | 0 | case PPC::STBUX: |
3194 | 0 | case PPC::STBUX8: |
3195 | 0 | case PPC::STDUX: |
3196 | 0 | case PPC::STFDUX: |
3197 | 0 | case PPC::STFSUX: |
3198 | 0 | case PPC::STHUX: |
3199 | 0 | case PPC::STHUX8: |
3200 | 0 | case PPC::STWUX: |
3201 | 0 | case PPC::STWUX8: { |
3202 | | // op: RST |
3203 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3204 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3205 | | // op: A |
3206 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3207 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3208 | | // op: B |
3209 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
3210 | 0 | Value |= (op & UINT64_C(31)) << 11; |
3211 | 0 | break; |
3212 | 0 | } |
3213 | 0 | case PPC::STDU: { |
3214 | | // op: RST |
3215 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3216 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3217 | | // op: DS_RA |
3218 | 0 | op = getMemRIXEncoding(MI, 2, Fixups, STI); |
3219 | 0 | Value |= (op & UINT64_C(524287)) << 2; |
3220 | 0 | break; |
3221 | 0 | } |
3222 | 0 | case PPC::MFCR: |
3223 | 0 | case PPC::MFCR8: |
3224 | 0 | case PPC::MFCTR: |
3225 | 0 | case PPC::MFCTR8: |
3226 | 0 | case PPC::MFLR: |
3227 | 0 | case PPC::MFLR8: |
3228 | 0 | case PPC::MFTB8: |
3229 | 0 | case PPC::MFVRSAVE: |
3230 | 0 | case PPC::MFVRSAVEv: |
3231 | 1 | case PPC::MTCTR: |
3232 | 1 | case PPC::MTCTR8: |
3233 | 1 | case PPC::MTCTR8loop: |
3234 | 1 | case PPC::MTCTRloop: |
3235 | 1 | case PPC::MTLR: |
3236 | 1 | case PPC::MTLR8: |
3237 | 1 | case PPC::MTVRSAVE: |
3238 | 1 | case PPC::MTVRSAVEv: { |
3239 | | // op: RT |
3240 | 1 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3241 | 1 | Value |= (op & UINT64_C(31)) << 21; |
3242 | 1 | break; |
3243 | 1 | } |
3244 | 0 | case PPC::EVLHHESPLAT: |
3245 | 0 | case PPC::EVLHHOSSPLAT: |
3246 | 0 | case PPC::EVLHHOUSPLAT: { |
3247 | | // op: RT |
3248 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3249 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3250 | | // op: D |
3251 | 0 | op = getSPE2DisEncoding(MI, 1, Fixups, STI); |
3252 | 0 | Value |= (op & UINT64_C(1)) << 20; |
3253 | 0 | Value |= (op & UINT64_C(2)) << 18; |
3254 | 0 | Value |= (op & UINT64_C(4)) << 16; |
3255 | 0 | Value |= (op & UINT64_C(8)) << 14; |
3256 | 0 | Value |= (op & UINT64_C(16)) << 12; |
3257 | 0 | Value |= (op & UINT64_C(32)) << 10; |
3258 | 0 | Value |= (op & UINT64_C(64)) << 8; |
3259 | 0 | Value |= (op & UINT64_C(128)) << 6; |
3260 | 0 | Value |= (op & UINT64_C(256)) << 4; |
3261 | 0 | Value |= (op & UINT64_C(512)) << 2; |
3262 | 0 | break; |
3263 | 0 | } |
3264 | 0 | case PPC::EVLWHE: |
3265 | 0 | case PPC::EVLWHOS: |
3266 | 0 | case PPC::EVLWHOU: |
3267 | 0 | case PPC::EVLWHSPLAT: |
3268 | 0 | case PPC::EVLWWSPLAT: |
3269 | 0 | case PPC::EVSTWHE: |
3270 | 0 | case PPC::EVSTWHO: |
3271 | 0 | case PPC::EVSTWWE: |
3272 | 0 | case PPC::EVSTWWO: { |
3273 | | // op: RT |
3274 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3275 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3276 | | // op: D |
3277 | 0 | op = getSPE4DisEncoding(MI, 1, Fixups, STI); |
3278 | 0 | Value |= (op & UINT64_C(1)) << 20; |
3279 | 0 | Value |= (op & UINT64_C(2)) << 18; |
3280 | 0 | Value |= (op & UINT64_C(4)) << 16; |
3281 | 0 | Value |= (op & UINT64_C(8)) << 14; |
3282 | 0 | Value |= (op & UINT64_C(16)) << 12; |
3283 | 0 | Value |= (op & UINT64_C(32)) << 10; |
3284 | 0 | Value |= (op & UINT64_C(64)) << 8; |
3285 | 0 | Value |= (op & UINT64_C(128)) << 6; |
3286 | 0 | Value |= (op & UINT64_C(256)) << 4; |
3287 | 0 | Value |= (op & UINT64_C(512)) << 2; |
3288 | 0 | break; |
3289 | 0 | } |
3290 | 0 | case PPC::EVLDD: |
3291 | 0 | case PPC::EVLDH: |
3292 | 0 | case PPC::EVLDW: |
3293 | 0 | case PPC::EVSTDD: |
3294 | 0 | case PPC::EVSTDH: |
3295 | 0 | case PPC::EVSTDW: { |
3296 | | // op: RT |
3297 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3298 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3299 | | // op: D |
3300 | 0 | op = getSPE8DisEncoding(MI, 1, Fixups, STI); |
3301 | 0 | Value |= (op & UINT64_C(1)) << 20; |
3302 | 0 | Value |= (op & UINT64_C(2)) << 18; |
3303 | 0 | Value |= (op & UINT64_C(4)) << 16; |
3304 | 0 | Value |= (op & UINT64_C(8)) << 14; |
3305 | 0 | Value |= (op & UINT64_C(16)) << 12; |
3306 | 0 | Value |= (op & UINT64_C(32)) << 10; |
3307 | 0 | Value |= (op & UINT64_C(64)) << 8; |
3308 | 0 | Value |= (op & UINT64_C(128)) << 6; |
3309 | 0 | Value |= (op & UINT64_C(256)) << 4; |
3310 | 0 | Value |= (op & UINT64_C(512)) << 2; |
3311 | 0 | break; |
3312 | 0 | } |
3313 | 0 | case PPC::MFBHRBE: { |
3314 | | // op: RT |
3315 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3316 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3317 | | // op: Entry |
3318 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3319 | 0 | Value |= (op & UINT64_C(1023)) << 11; |
3320 | 0 | break; |
3321 | 0 | } |
3322 | 0 | case PPC::ADDME: |
3323 | 0 | case PPC::ADDME8: |
3324 | 0 | case PPC::ADDME8o: |
3325 | 0 | case PPC::ADDMEo: |
3326 | 0 | case PPC::ADDZE: |
3327 | 0 | case PPC::ADDZE8: |
3328 | 0 | case PPC::ADDZE8o: |
3329 | 0 | case PPC::ADDZEo: |
3330 | 0 | case PPC::EVABS: |
3331 | 0 | case PPC::EVADDSMIAAW: |
3332 | 0 | case PPC::EVADDSSIAAW: |
3333 | 0 | case PPC::EVADDUMIAAW: |
3334 | 0 | case PPC::EVADDUSIAAW: |
3335 | 0 | case PPC::EVCNTLSW: |
3336 | 0 | case PPC::EVCNTLZW: |
3337 | 0 | case PPC::EVEXTSB: |
3338 | 0 | case PPC::EVEXTSH: |
3339 | 0 | case PPC::EVMRA: |
3340 | 0 | case PPC::EVNEG: |
3341 | 0 | case PPC::EVRNDW: |
3342 | 0 | case PPC::EVSPLATFI: |
3343 | 0 | case PPC::EVSPLATI: |
3344 | 0 | case PPC::EVSUBFSMIAAW: |
3345 | 0 | case PPC::EVSUBFSSIAAW: |
3346 | 0 | case PPC::EVSUBFUMIAAW: |
3347 | 0 | case PPC::EVSUBFUSIAAW: |
3348 | 0 | case PPC::NEG: |
3349 | 0 | case PPC::NEG8: |
3350 | 0 | case PPC::NEG8o: |
3351 | 0 | case PPC::NEGo: |
3352 | 0 | case PPC::SUBFME: |
3353 | 0 | case PPC::SUBFME8: |
3354 | 0 | case PPC::SUBFME8o: |
3355 | 0 | case PPC::SUBFMEo: |
3356 | 0 | case PPC::SUBFZE: |
3357 | 0 | case PPC::SUBFZE8: |
3358 | 0 | case PPC::SUBFZE8o: |
3359 | 0 | case PPC::SUBFZEo: { |
3360 | | // op: RT |
3361 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3362 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3363 | | // op: RA |
3364 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3365 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3366 | 0 | break; |
3367 | 0 | } |
3368 | 42 | case PPC::ADD4: |
3369 | 148 | case PPC::ADD4o: |
3370 | 148 | case PPC::ADD8: |
3371 | 148 | case PPC::ADD8o: |
3372 | 203 | case PPC::ADDC: |
3373 | 203 | case PPC::ADDC8: |
3374 | 203 | case PPC::ADDC8o: |
3375 | 213 | case PPC::ADDCo: |
3376 | 213 | case PPC::ADDE: |
3377 | 213 | case PPC::ADDE8: |
3378 | 213 | case PPC::ADDE8o: |
3379 | 213 | case PPC::ADDEo: |
3380 | 213 | case PPC::BRINC: |
3381 | 214 | case PPC::DIVD: |
3382 | 214 | case PPC::DIVDE: |
3383 | 214 | case PPC::DIVDEU: |
3384 | 214 | case PPC::DIVDEUo: |
3385 | 214 | case PPC::DIVDEo: |
3386 | 214 | case PPC::DIVDU: |
3387 | 214 | case PPC::DIVDUo: |
3388 | 214 | case PPC::DIVDo: |
3389 | 214 | case PPC::DIVW: |
3390 | 214 | case PPC::DIVWE: |
3391 | 214 | case PPC::DIVWEU: |
3392 | 214 | case PPC::DIVWEUo: |
3393 | 214 | case PPC::DIVWEo: |
3394 | 214 | case PPC::DIVWU: |
3395 | 214 | case PPC::DIVWUo: |
3396 | 214 | case PPC::DIVWo: |
3397 | 214 | case PPC::EVADDIW: |
3398 | 214 | case PPC::EVADDW: |
3399 | 214 | case PPC::EVAND: |
3400 | 214 | case PPC::EVANDC: |
3401 | 214 | case PPC::EVDIVWS: |
3402 | 214 | case PPC::EVDIVWU: |
3403 | 214 | case PPC::EVEQV: |
3404 | 214 | case PPC::EVLDDX: |
3405 | 214 | case PPC::EVLDHX: |
3406 | 214 | case PPC::EVLDWX: |
3407 | 214 | case PPC::EVLHHESPLATX: |
3408 | 214 | case PPC::EVLHHOSSPLATX: |
3409 | 214 | case PPC::EVLHHOUSPLATX: |
3410 | 214 | case PPC::EVLWHEX: |
3411 | 214 | case PPC::EVLWHOSX: |
3412 | 214 | case PPC::EVLWHOUX: |
3413 | 214 | case PPC::EVLWHSPLATX: |
3414 | 214 | case PPC::EVLWWSPLATX: |
3415 | 214 | case PPC::EVMERGEHI: |
3416 | 214 | case PPC::EVMERGEHILO: |
3417 | 214 | case PPC::EVMERGELO: |
3418 | 214 | case PPC::EVMERGELOHI: |
3419 | 214 | case PPC::EVMHEGSMFAA: |
3420 | 214 | case PPC::EVMHEGSMFAN: |
3421 | 214 | case PPC::EVMHEGSMIAA: |
3422 | 214 | case PPC::EVMHEGSMIAN: |
3423 | 214 | case PPC::EVMHEGUMIAA: |
3424 | 214 | case PPC::EVMHEGUMIAN: |
3425 | 214 | case PPC::EVMHESMF: |
3426 | 214 | case PPC::EVMHESMFA: |
3427 | 214 | case PPC::EVMHESMFAAW: |
3428 | 214 | case PPC::EVMHESMFANW: |
3429 | 214 | case PPC::EVMHESMI: |
3430 | 214 | case PPC::EVMHESMIA: |
3431 | 214 | case PPC::EVMHESMIAAW: |
3432 | 214 | case PPC::EVMHESMIANW: |
3433 | 214 | case PPC::EVMHESSF: |
3434 | 214 | case PPC::EVMHESSFA: |
3435 | 214 | case PPC::EVMHESSFAAW: |
3436 | 214 | case PPC::EVMHESSFANW: |
3437 | 214 | case PPC::EVMHESSIAAW: |
3438 | 214 | case PPC::EVMHESSIANW: |
3439 | 214 | case PPC::EVMHEUMI: |
3440 | 214 | case PPC::EVMHEUMIA: |
3441 | 214 | case PPC::EVMHEUMIAAW: |
3442 | 214 | case PPC::EVMHEUMIANW: |
3443 | 214 | case PPC::EVMHEUSIAAW: |
3444 | 214 | case PPC::EVMHEUSIANW: |
3445 | 214 | case PPC::EVMHOGSMFAA: |
3446 | 214 | case PPC::EVMHOGSMFAN: |
3447 | 214 | case PPC::EVMHOGSMIAA: |
3448 | 214 | case PPC::EVMHOGSMIAN: |
3449 | 214 | case PPC::EVMHOGUMIAA: |
3450 | 214 | case PPC::EVMHOGUMIAN: |
3451 | 214 | case PPC::EVMHOSMF: |
3452 | 214 | case PPC::EVMHOSMFA: |
3453 | 214 | case PPC::EVMHOSMFAAW: |
3454 | 214 | case PPC::EVMHOSMFANW: |
3455 | 214 | case PPC::EVMHOSMI: |
3456 | 214 | case PPC::EVMHOSMIA: |
3457 | 214 | case PPC::EVMHOSMIAAW: |
3458 | 214 | case PPC::EVMHOSMIANW: |
3459 | 214 | case PPC::EVMHOSSF: |
3460 | 214 | case PPC::EVMHOSSFA: |
3461 | 214 | case PPC::EVMHOSSFAAW: |
3462 | 214 | case PPC::EVMHOSSFANW: |
3463 | 214 | case PPC::EVMHOSSIAAW: |
3464 | 214 | case PPC::EVMHOSSIANW: |
3465 | 214 | case PPC::EVMHOUMI: |
3466 | 214 | case PPC::EVMHOUMIA: |
3467 | 214 | case PPC::EVMHOUMIAAW: |
3468 | 214 | case PPC::EVMHOUMIANW: |
3469 | 214 | case PPC::EVMHOUSIAAW: |
3470 | 214 | case PPC::EVMHOUSIANW: |
3471 | 214 | case PPC::EVMWHSMF: |
3472 | 214 | case PPC::EVMWHSMFA: |
3473 | 214 | case PPC::EVMWHSMI: |
3474 | 214 | case PPC::EVMWHSMIA: |
3475 | 214 | case PPC::EVMWHSSF: |
3476 | 214 | case PPC::EVMWHSSFA: |
3477 | 214 | case PPC::EVMWHUMI: |
3478 | 214 | case PPC::EVMWHUMIA: |
3479 | 214 | case PPC::EVMWLSMIAAW: |
3480 | 214 | case PPC::EVMWLSMIANW: |
3481 | 214 | case PPC::EVMWLSSIAAW: |
3482 | 214 | case PPC::EVMWLSSIANW: |
3483 | 214 | case PPC::EVMWLUMI: |
3484 | 214 | case PPC::EVMWLUMIA: |
3485 | 214 | case PPC::EVMWLUMIAAW: |
3486 | 214 | case PPC::EVMWLUMIANW: |
3487 | 214 | case PPC::EVMWLUSIAAW: |
3488 | 214 | case PPC::EVMWLUSIANW: |
3489 | 214 | case PPC::EVMWSMF: |
3490 | 214 | case PPC::EVMWSMFA: |
3491 | 214 | case PPC::EVMWSMFAA: |
3492 | 214 | case PPC::EVMWSMFAN: |
3493 | 214 | case PPC::EVMWSMI: |
3494 | 214 | case PPC::EVMWSMIA: |
3495 | 214 | case PPC::EVMWSMIAA: |
3496 | 214 | case PPC::EVMWSMIAN: |
3497 | 214 | case PPC::EVMWSSF: |
3498 | 214 | case PPC::EVMWSSFA: |
3499 | 214 | case PPC::EVMWSSFAA: |
3500 | 214 | case PPC::EVMWSSFAN: |
3501 | 214 | case PPC::EVMWUMI: |
3502 | 214 | case PPC::EVMWUMIA: |
3503 | 214 | case PPC::EVMWUMIAA: |
3504 | 214 | case PPC::EVMWUMIAN: |
3505 | 214 | case PPC::EVNAND: |
3506 | 214 | case PPC::EVNOR: |
3507 | 214 | case PPC::EVOR: |
3508 | 214 | case PPC::EVORC: |
3509 | 214 | case PPC::EVRLW: |
3510 | 214 | case PPC::EVRLWI: |
3511 | 214 | case PPC::EVSLW: |
3512 | 214 | case PPC::EVSLWI: |
3513 | 214 | case PPC::EVSRWIS: |
3514 | 214 | case PPC::EVSRWIU: |
3515 | 214 | case PPC::EVSRWS: |
3516 | 214 | case PPC::EVSRWU: |
3517 | 214 | case PPC::EVSTDDX: |
3518 | 214 | case PPC::EVSTDHX: |
3519 | 214 | case PPC::EVSTDWX: |
3520 | 214 | case PPC::EVSTWHEX: |
3521 | 214 | case PPC::EVSTWHOX: |
3522 | 214 | case PPC::EVSTWWEX: |
3523 | 214 | case PPC::EVSTWWOX: |
3524 | 214 | case PPC::EVSUBFW: |
3525 | 214 | case PPC::EVSUBIFW: |
3526 | 214 | case PPC::EVXOR: |
3527 | 214 | case PPC::MULHD: |
3528 | 214 | case PPC::MULHDU: |
3529 | 214 | case PPC::MULHDUo: |
3530 | 214 | case PPC::MULHDo: |
3531 | 214 | case PPC::MULHW: |
3532 | 214 | case PPC::MULHWU: |
3533 | 214 | case PPC::MULHWUo: |
3534 | 214 | case PPC::MULHWo: |
3535 | 214 | case PPC::MULLD: |
3536 | 214 | case PPC::MULLDo: |
3537 | 214 | case PPC::MULLW: |
3538 | 214 | case PPC::MULLWo: |
3539 | 214 | case PPC::SUBF: |
3540 | 214 | case PPC::SUBF8: |
3541 | 216 | case PPC::SUBF8o: |
3542 | 216 | case PPC::SUBFC: |
3543 | 216 | case PPC::SUBFC8: |
3544 | 216 | case PPC::SUBFC8o: |
3545 | 216 | case PPC::SUBFCo: |
3546 | 216 | case PPC::SUBFE: |
3547 | 216 | case PPC::SUBFE8: |
3548 | 216 | case PPC::SUBFE8o: |
3549 | 216 | case PPC::SUBFEo: |
3550 | 216 | case PPC::SUBFo: { |
3551 | | // op: RT |
3552 | 216 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3553 | 216 | Value |= (op & UINT64_C(31)) << 21; |
3554 | | // op: RA |
3555 | 216 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3556 | 216 | Value |= (op & UINT64_C(31)) << 16; |
3557 | | // op: RB |
3558 | 216 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3559 | 216 | Value |= (op & UINT64_C(31)) << 11; |
3560 | 216 | break; |
3561 | 216 | } |
3562 | 0 | case PPC::ISEL: |
3563 | 0 | case PPC::ISEL8: { |
3564 | | // op: RT |
3565 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3566 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3567 | | // op: RA |
3568 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3569 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3570 | | // op: RB |
3571 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3572 | 0 | Value |= (op & UINT64_C(31)) << 11; |
3573 | | // op: COND |
3574 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
3575 | 0 | Value |= (op & UINT64_C(31)) << 6; |
3576 | 0 | break; |
3577 | 0 | } |
3578 | 0 | case PPC::ADD4TLS: |
3579 | 0 | case PPC::ADD8TLS: |
3580 | 0 | case PPC::ADD8TLS_: { |
3581 | | // op: RT |
3582 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3583 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3584 | | // op: RA |
3585 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3586 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3587 | | // op: RB |
3588 | 0 | op = getTLSRegEncoding(MI, 2, Fixups, STI); |
3589 | 0 | Value |= (op & UINT64_C(31)) << 11; |
3590 | 0 | break; |
3591 | 0 | } |
3592 | 0 | case PPC::MFDCR: |
3593 | 1 | case PPC::MFSPR: |
3594 | 1 | case PPC::MFSPR8: |
3595 | 1 | case PPC::MFTB: |
3596 | 1 | case PPC::MTDCR: { |
3597 | | // op: RT |
3598 | 1 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3599 | 1 | Value |= (op & UINT64_C(31)) << 21; |
3600 | | // op: SPR |
3601 | 1 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3602 | 1 | Value |= (op & UINT64_C(31)) << 16; |
3603 | 1 | Value |= (op & UINT64_C(992)) << 6; |
3604 | 1 | break; |
3605 | 1 | } |
3606 | 19 | case PPC::MTSPR: |
3607 | 19 | case PPC::MTSPR8: { |
3608 | | // op: RT |
3609 | 19 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3610 | 19 | Value |= (op & UINT64_C(31)) << 21; |
3611 | | // op: SPR |
3612 | 19 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3613 | 19 | Value |= (op & UINT64_C(31)) << 16; |
3614 | 19 | Value |= (op & UINT64_C(992)) << 6; |
3615 | 19 | break; |
3616 | 19 | } |
3617 | 0 | case PPC::RFEBB: { |
3618 | | // op: S |
3619 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3620 | 0 | Value |= (op & UINT64_C(1)) << 11; |
3621 | 0 | break; |
3622 | 19 | } |
3623 | 0 | case PPC::MFOCRF: |
3624 | 0 | case PPC::MFOCRF8: { |
3625 | | // op: ST |
3626 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3627 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3628 | | // op: FXM |
3629 | 0 | op = get_crbitm_encoding(MI, 1, Fixups, STI); |
3630 | 0 | Value |= (op & UINT64_C(255)) << 12; |
3631 | 0 | break; |
3632 | 0 | } |
3633 | 0 | case PPC::MTOCRF: |
3634 | 0 | case PPC::MTOCRF8: { |
3635 | | // op: ST |
3636 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3637 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3638 | | // op: FXM |
3639 | 0 | op = get_crbitm_encoding(MI, 0, Fixups, STI); |
3640 | 0 | Value |= (op & UINT64_C(255)) << 12; |
3641 | 0 | break; |
3642 | 0 | } |
3643 | 0 | case PPC::DSS: { |
3644 | | // op: STRM |
3645 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3646 | 0 | Value |= (op & UINT64_C(3)) << 21; |
3647 | 0 | break; |
3648 | 0 | } |
3649 | 0 | case PPC::DST: |
3650 | 0 | case PPC::DST64: |
3651 | 0 | case PPC::DSTST: |
3652 | 0 | case PPC::DSTST64: |
3653 | 0 | case PPC::DSTSTT: |
3654 | 0 | case PPC::DSTSTT64: |
3655 | 0 | case PPC::DSTT: |
3656 | 0 | case PPC::DSTT64: { |
3657 | | // op: STRM |
3658 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3659 | 0 | Value |= (op & UINT64_C(3)) << 21; |
3660 | | // op: A |
3661 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3662 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3663 | | // op: B |
3664 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3665 | 0 | Value |= (op & UINT64_C(31)) << 11; |
3666 | 0 | break; |
3667 | 0 | } |
3668 | 0 | case PPC::DCBT: |
3669 | 0 | case PPC::DCBTST: { |
3670 | | // op: TH |
3671 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3672 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3673 | | // op: A |
3674 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3675 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3676 | | // op: B |
3677 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3678 | 0 | Value |= (op & UINT64_C(31)) << 11; |
3679 | 0 | break; |
3680 | 0 | } |
3681 | 0 | case PPC::MTVSCR: { |
3682 | | // op: VB |
3683 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3684 | 0 | Value |= (op & UINT64_C(31)) << 11; |
3685 | 0 | break; |
3686 | 0 | } |
3687 | 0 | case PPC::MFVSCR: |
3688 | 0 | case PPC::V_SETALLONES: |
3689 | 0 | case PPC::V_SETALLONESB: |
3690 | 0 | case PPC::V_SETALLONESH: { |
3691 | | // op: VD |
3692 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3693 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3694 | 0 | break; |
3695 | 0 | } |
3696 | 0 | case PPC::VSPLTISB: |
3697 | 0 | case PPC::VSPLTISH: |
3698 | 0 | case PPC::VSPLTISW: { |
3699 | | // op: VD |
3700 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3701 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3702 | | // op: IMM |
3703 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3704 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3705 | 0 | break; |
3706 | 0 | } |
3707 | 0 | case PPC::VSBOX: { |
3708 | | // op: VD |
3709 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3710 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3711 | | // op: VA |
3712 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3713 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3714 | 0 | break; |
3715 | 0 | } |
3716 | 0 | case PPC::VSHASIGMAD: |
3717 | 0 | case PPC::VSHASIGMAW: { |
3718 | | // op: VD |
3719 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3720 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3721 | | // op: VA |
3722 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3723 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3724 | | // op: ST |
3725 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3726 | 0 | Value |= (op & UINT64_C(1)) << 15; |
3727 | | // op: SIX |
3728 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
3729 | 0 | Value |= (op & UINT64_C(15)) << 11; |
3730 | 0 | break; |
3731 | 0 | } |
3732 | 0 | case PPC::VADDCUQ: |
3733 | 0 | case PPC::VADDCUW: |
3734 | 0 | case PPC::VADDFP: |
3735 | 0 | case PPC::VADDSBS: |
3736 | 0 | case PPC::VADDSHS: |
3737 | 0 | case PPC::VADDSWS: |
3738 | 0 | case PPC::VADDUBM: |
3739 | 0 | case PPC::VADDUBS: |
3740 | 0 | case PPC::VADDUDM: |
3741 | 0 | case PPC::VADDUHM: |
3742 | 0 | case PPC::VADDUHS: |
3743 | 0 | case PPC::VADDUQM: |
3744 | 0 | case PPC::VADDUWM: |
3745 | 0 | case PPC::VADDUWS: |
3746 | 0 | case PPC::VAND: |
3747 | 0 | case PPC::VANDC: |
3748 | 0 | case PPC::VAVGSB: |
3749 | 0 | case PPC::VAVGSH: |
3750 | 0 | case PPC::VAVGSW: |
3751 | 0 | case PPC::VAVGUB: |
3752 | 0 | case PPC::VAVGUH: |
3753 | 0 | case PPC::VAVGUW: |
3754 | 0 | case PPC::VBPERMQ: |
3755 | 0 | case PPC::VCFSX: |
3756 | 0 | case PPC::VCFUX: |
3757 | 0 | case PPC::VCIPHER: |
3758 | 0 | case PPC::VCIPHERLAST: |
3759 | 0 | case PPC::VCMPBFP: |
3760 | 0 | case PPC::VCMPBFPo: |
3761 | 0 | case PPC::VCMPEQFP: |
3762 | 0 | case PPC::VCMPEQFPo: |
3763 | 0 | case PPC::VCMPEQUB: |
3764 | 0 | case PPC::VCMPEQUBo: |
3765 | 0 | case PPC::VCMPEQUD: |
3766 | 0 | case PPC::VCMPEQUDo: |
3767 | 0 | case PPC::VCMPEQUH: |
3768 | 0 | case PPC::VCMPEQUHo: |
3769 | 0 | case PPC::VCMPEQUW: |
3770 | 0 | case PPC::VCMPEQUWo: |
3771 | 0 | case PPC::VCMPGEFP: |
3772 | 0 | case PPC::VCMPGEFPo: |
3773 | 0 | case PPC::VCMPGTFP: |
3774 | 0 | case PPC::VCMPGTFPo: |
3775 | 0 | case PPC::VCMPGTSB: |
3776 | 0 | case PPC::VCMPGTSBo: |
3777 | 0 | case PPC::VCMPGTSD: |
3778 | 0 | case PPC::VCMPGTSDo: |
3779 | 0 | case PPC::VCMPGTSH: |
3780 | 0 | case PPC::VCMPGTSHo: |
3781 | 0 | case PPC::VCMPGTSW: |
3782 | 0 | case PPC::VCMPGTSWo: |
3783 | 0 | case PPC::VCMPGTUB: |
3784 | 0 | case PPC::VCMPGTUBo: |
3785 | 0 | case PPC::VCMPGTUD: |
3786 | 0 | case PPC::VCMPGTUDo: |
3787 | 0 | case PPC::VCMPGTUH: |
3788 | 0 | case PPC::VCMPGTUHo: |
3789 | 0 | case PPC::VCMPGTUW: |
3790 | 0 | case PPC::VCMPGTUWo: |
3791 | 0 | case PPC::VCTSXS: |
3792 | 0 | case PPC::VCTUXS: |
3793 | 0 | case PPC::VEQV: |
3794 | 0 | case PPC::VMAXFP: |
3795 | 0 | case PPC::VMAXSB: |
3796 | 0 | case PPC::VMAXSD: |
3797 | 0 | case PPC::VMAXSH: |
3798 | 0 | case PPC::VMAXSW: |
3799 | 0 | case PPC::VMAXUB: |
3800 | 0 | case PPC::VMAXUD: |
3801 | 0 | case PPC::VMAXUH: |
3802 | 0 | case PPC::VMAXUW: |
3803 | 0 | case PPC::VMINFP: |
3804 | 0 | case PPC::VMINSB: |
3805 | 0 | case PPC::VMINSD: |
3806 | 0 | case PPC::VMINSH: |
3807 | 0 | case PPC::VMINSW: |
3808 | 0 | case PPC::VMINUB: |
3809 | 0 | case PPC::VMINUD: |
3810 | 0 | case PPC::VMINUH: |
3811 | 0 | case PPC::VMINUW: |
3812 | 0 | case PPC::VMRGEW: |
3813 | 0 | case PPC::VMRGHB: |
3814 | 0 | case PPC::VMRGHH: |
3815 | 0 | case PPC::VMRGHW: |
3816 | 0 | case PPC::VMRGLB: |
3817 | 0 | case PPC::VMRGLH: |
3818 | 0 | case PPC::VMRGLW: |
3819 | 0 | case PPC::VMRGOW: |
3820 | 0 | case PPC::VMULESB: |
3821 | 0 | case PPC::VMULESH: |
3822 | 0 | case PPC::VMULESW: |
3823 | 0 | case PPC::VMULEUB: |
3824 | 0 | case PPC::VMULEUH: |
3825 | 0 | case PPC::VMULEUW: |
3826 | 0 | case PPC::VMULOSB: |
3827 | 0 | case PPC::VMULOSH: |
3828 | 0 | case PPC::VMULOSW: |
3829 | 0 | case PPC::VMULOUB: |
3830 | 0 | case PPC::VMULOUH: |
3831 | 0 | case PPC::VMULOUW: |
3832 | 0 | case PPC::VMULUWM: |
3833 | 0 | case PPC::VNAND: |
3834 | 0 | case PPC::VNCIPHER: |
3835 | 0 | case PPC::VNCIPHERLAST: |
3836 | 0 | case PPC::VNOR: |
3837 | 0 | case PPC::VOR: |
3838 | 0 | case PPC::VORC: |
3839 | 0 | case PPC::VPKPX: |
3840 | 0 | case PPC::VPKSDSS: |
3841 | 0 | case PPC::VPKSDUS: |
3842 | 0 | case PPC::VPKSHSS: |
3843 | 0 | case PPC::VPKSHUS: |
3844 | 0 | case PPC::VPKSWSS: |
3845 | 0 | case PPC::VPKSWUS: |
3846 | 0 | case PPC::VPKUDUM: |
3847 | 0 | case PPC::VPKUDUS: |
3848 | 0 | case PPC::VPKUHUM: |
3849 | 0 | case PPC::VPKUHUS: |
3850 | 0 | case PPC::VPKUWUM: |
3851 | 0 | case PPC::VPKUWUS: |
3852 | 0 | case PPC::VPMSUMB: |
3853 | 0 | case PPC::VPMSUMD: |
3854 | 0 | case PPC::VPMSUMH: |
3855 | 0 | case PPC::VPMSUMW: |
3856 | 0 | case PPC::VRLB: |
3857 | 0 | case PPC::VRLD: |
3858 | 0 | case PPC::VRLH: |
3859 | 0 | case PPC::VRLW: |
3860 | 0 | case PPC::VSL: |
3861 | 0 | case PPC::VSLB: |
3862 | 0 | case PPC::VSLD: |
3863 | 0 | case PPC::VSLH: |
3864 | 0 | case PPC::VSLO: |
3865 | 3 | case PPC::VSLW: |
3866 | 3 | case PPC::VSPLTB: |
3867 | 3 | case PPC::VSPLTH: |
3868 | 3 | case PPC::VSPLTW: |
3869 | 5 | case PPC::VSR: |
3870 | 5 | case PPC::VSRAB: |
3871 | 5 | case PPC::VSRAD: |
3872 | 5 | case PPC::VSRAH: |
3873 | 5 | case PPC::VSRAW: |
3874 | 5 | case PPC::VSRB: |
3875 | 9 | case PPC::VSRD: |
3876 | 9 | case PPC::VSRH: |
3877 | 11 | case PPC::VSRO: |
3878 | 11 | case PPC::VSRW: |
3879 | 11 | case PPC::VSUBCUQ: |
3880 | 11 | case PPC::VSUBCUW: |
3881 | 11 | case PPC::VSUBFP: |
3882 | 11 | case PPC::VSUBSBS: |
3883 | 11 | case PPC::VSUBSHS: |
3884 | 11 | case PPC::VSUBSWS: |
3885 | 11 | case PPC::VSUBUBM: |
3886 | 11 | case PPC::VSUBUBS: |
3887 | 11 | case PPC::VSUBUDM: |
3888 | 11 | case PPC::VSUBUHM: |
3889 | 11 | case PPC::VSUBUHS: |
3890 | 11 | case PPC::VSUBUQM: |
3891 | 11 | case PPC::VSUBUWM: |
3892 | 11 | case PPC::VSUBUWS: |
3893 | 11 | case PPC::VSUM2SWS: |
3894 | 11 | case PPC::VSUM4SBS: |
3895 | 11 | case PPC::VSUM4SHS: |
3896 | 11 | case PPC::VSUM4UBS: |
3897 | 11 | case PPC::VSUMSWS: |
3898 | 11 | case PPC::VXOR: { |
3899 | | // op: VD |
3900 | 11 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3901 | 11 | Value |= (op & UINT64_C(31)) << 21; |
3902 | | // op: VA |
3903 | 11 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3904 | 11 | Value |= (op & UINT64_C(31)) << 16; |
3905 | | // op: VB |
3906 | 11 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3907 | 11 | Value |= (op & UINT64_C(31)) << 11; |
3908 | 11 | break; |
3909 | 11 | } |
3910 | 0 | case PPC::VSLDOI: { |
3911 | | // op: VD |
3912 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3913 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3914 | | // op: VA |
3915 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3916 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3917 | | // op: VB |
3918 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3919 | 0 | Value |= (op & UINT64_C(31)) << 11; |
3920 | | // op: SH |
3921 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
3922 | 0 | Value |= (op & UINT64_C(15)) << 6; |
3923 | 0 | break; |
3924 | 11 | } |
3925 | 0 | case PPC::VADDECUQ: |
3926 | 0 | case PPC::VADDEUQM: |
3927 | 0 | case PPC::VMHADDSHS: |
3928 | 0 | case PPC::VMHRADDSHS: |
3929 | 0 | case PPC::VMLADDUHM: |
3930 | 0 | case PPC::VMSUMMBM: |
3931 | 0 | case PPC::VMSUMSHM: |
3932 | 0 | case PPC::VMSUMSHS: |
3933 | 0 | case PPC::VMSUMUBM: |
3934 | 0 | case PPC::VMSUMUHM: |
3935 | 0 | case PPC::VMSUMUHS: |
3936 | 0 | case PPC::VPERM: |
3937 | 0 | case PPC::VPERMXOR: |
3938 | 0 | case PPC::VSEL: |
3939 | 0 | case PPC::VSUBECUQ: |
3940 | 0 | case PPC::VSUBEUQM: { |
3941 | | // op: VD |
3942 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3943 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3944 | | // op: VA |
3945 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3946 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3947 | | // op: VB |
3948 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3949 | 0 | Value |= (op & UINT64_C(31)) << 11; |
3950 | | // op: VC |
3951 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
3952 | 0 | Value |= (op & UINT64_C(31)) << 6; |
3953 | 0 | break; |
3954 | 0 | } |
3955 | 0 | case PPC::VMADDFP: |
3956 | 0 | case PPC::VNMSUBFP: { |
3957 | | // op: VD |
3958 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
3959 | 0 | Value |= (op & UINT64_C(31)) << 21; |
3960 | | // op: VA |
3961 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
3962 | 0 | Value |= (op & UINT64_C(31)) << 16; |
3963 | | // op: VC |
3964 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
3965 | 0 | Value |= (op & UINT64_C(31)) << 6; |
3966 | | // op: VB |
3967 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
3968 | 0 | Value |= (op & UINT64_C(31)) << 11; |
3969 | 0 | break; |
3970 | 0 | } |
3971 | 0 | case PPC::VCFSX_0: |
3972 | 0 | case PPC::VCFUX_0: |
3973 | 0 | case PPC::VCLZB: |
3974 | 0 | case PPC::VCLZD: |
3975 | 0 | case PPC::VCLZH: |
3976 | 0 | case PPC::VCLZW: |
3977 | 0 | case PPC::VCTSXS_0: |
3978 | 0 | case PPC::VCTUXS_0: |
3979 | 0 | case PPC::VEXPTEFP: |
3980 | 0 | case PPC::VGBBD: |
3981 | 0 | case PPC::VLOGEFP: |
3982 | 0 | case PPC::VPOPCNTB: |
3983 | 0 | case PPC::VPOPCNTD: |
3984 | 0 | case PPC::VPOPCNTH: |
3985 | 0 | case PPC::VPOPCNTW: |
3986 | 0 | case PPC::VREFP: |
3987 | 0 | case PPC::VRFIM: |
3988 | 0 | case PPC::VRFIN: |
3989 | 0 | case PPC::VRFIP: |
3990 | 0 | case PPC::VRFIZ: |
3991 | 0 | case PPC::VRSQRTEFP: |
3992 | 0 | case PPC::VUPKHPX: |
3993 | 0 | case PPC::VUPKHSB: |
3994 | 0 | case PPC::VUPKHSH: |
3995 | 0 | case PPC::VUPKHSW: |
3996 | 0 | case PPC::VUPKLPX: |
3997 | 0 | case PPC::VUPKLSB: |
3998 | 0 | case PPC::VUPKLSH: |
3999 | 0 | case PPC::VUPKLSW: { |
4000 | | // op: VD |
4001 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4002 | 0 | Value |= (op & UINT64_C(31)) << 21; |
4003 | | // op: VB |
4004 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
4005 | 0 | Value |= (op & UINT64_C(31)) << 11; |
4006 | 0 | break; |
4007 | 0 | } |
4008 | 0 | case PPC::V_SET0: |
4009 | 0 | case PPC::V_SET0B: |
4010 | 0 | case PPC::V_SET0H: { |
4011 | | // op: VD |
4012 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4013 | 0 | Value |= (op & UINT64_C(31)) << 21; |
4014 | 0 | Value |= (op & UINT64_C(31)) << 16; |
4015 | 0 | Value |= (op & UINT64_C(31)) << 11; |
4016 | 0 | break; |
4017 | 0 | } |
4018 | 0 | case PPC::MTVSRD: |
4019 | 0 | case PPC::MTVSRWA: |
4020 | 0 | case PPC::MTVSRWZ: { |
4021 | | // op: XT |
4022 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4023 | 0 | Value |= (op & UINT64_C(31)) << 21; |
4024 | 0 | Value |= (op & UINT64_C(32)) >> 5; |
4025 | | // op: A |
4026 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
4027 | 0 | Value |= (op & UINT64_C(31)) << 16; |
4028 | 0 | break; |
4029 | 0 | } |
4030 | 0 | case PPC::LXSDX: |
4031 | 0 | case PPC::LXSIWAX: |
4032 | 0 | case PPC::LXSIWZX: |
4033 | 0 | case PPC::LXSSPX: |
4034 | 0 | case PPC::LXVD2X: |
4035 | 0 | case PPC::LXVDSX: |
4036 | 0 | case PPC::LXVW4X: |
4037 | 0 | case PPC::STXSDX: |
4038 | 0 | case PPC::STXSIWX: |
4039 | 0 | case PPC::STXSSPX: |
4040 | 0 | case PPC::STXVD2X: |
4041 | 0 | case PPC::STXVW4X: { |
4042 | | // op: XT |
4043 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4044 | 0 | Value |= (op & UINT64_C(31)) << 21; |
4045 | 0 | Value |= (op & UINT64_C(32)) >> 5; |
4046 | | // op: A |
4047 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
4048 | 0 | Value |= (op & UINT64_C(31)) << 16; |
4049 | | // op: B |
4050 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
4051 | 0 | Value |= (op & UINT64_C(31)) << 11; |
4052 | 0 | break; |
4053 | 0 | } |
4054 | 0 | case PPC::XSADDDP: |
4055 | 0 | case PPC::XSADDSP: |
4056 | 0 | case PPC::XSCPSGNDP: |
4057 | 0 | case PPC::XSDIVDP: |
4058 | 0 | case PPC::XSDIVSP: |
4059 | 0 | case PPC::XSMAXDP: |
4060 | 0 | case PPC::XSMINDP: |
4061 | 0 | case PPC::XSMULDP: |
4062 | 0 | case PPC::XSMULSP: |
4063 | 0 | case PPC::XSSUBDP: |
4064 | 0 | case PPC::XSSUBSP: |
4065 | 0 | case PPC::XVADDDP: |
4066 | 0 | case PPC::XVADDSP: |
4067 | 0 | case PPC::XVCMPEQDP: |
4068 | 0 | case PPC::XVCMPEQDPo: |
4069 | 0 | case PPC::XVCMPEQSP: |
4070 | 0 | case PPC::XVCMPEQSPo: |
4071 | 0 | case PPC::XVCMPGEDP: |
4072 | 0 | case PPC::XVCMPGEDPo: |
4073 | 0 | case PPC::XVCMPGESP: |
4074 | 0 | case PPC::XVCMPGESPo: |
4075 | 0 | case PPC::XVCMPGTDP: |
4076 | 0 | case PPC::XVCMPGTDPo: |
4077 | 0 | case PPC::XVCMPGTSP: |
4078 | 0 | case PPC::XVCMPGTSPo: |
4079 | 0 | case PPC::XVCPSGNDP: |
4080 | 0 | case PPC::XVCPSGNSP: |
4081 | 0 | case PPC::XVDIVDP: |
4082 | 0 | case PPC::XVDIVSP: |
4083 | 0 | case PPC::XVMAXDP: |
4084 | 0 | case PPC::XVMAXSP: |
4085 | 0 | case PPC::XVMINDP: |
4086 | 0 | case PPC::XVMINSP: |
4087 | 0 | case PPC::XVMULDP: |
4088 | 0 | case PPC::XVMULSP: |
4089 | 0 | case PPC::XVSUBDP: |
4090 | 0 | case PPC::XVSUBSP: |
4091 | 0 | case PPC::XXLAND: |
4092 | 0 | case PPC::XXLANDC: |
4093 | 0 | case PPC::XXLEQV: |
4094 | 0 | case PPC::XXLNAND: |
4095 | 0 | case PPC::XXLNOR: |
4096 | 0 | case PPC::XXLOR: |
4097 | 0 | case PPC::XXLORC: |
4098 | 0 | case PPC::XXLORf: |
4099 | 0 | case PPC::XXLXOR: |
4100 | 0 | case PPC::XXMRGHW: |
4101 | 0 | case PPC::XXMRGLW: { |
4102 | | // op: XT |
4103 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4104 | 0 | Value |= (op & UINT64_C(31)) << 21; |
4105 | 0 | Value |= (op & UINT64_C(32)) >> 5; |
4106 | | // op: XA |
4107 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
4108 | 0 | Value |= (op & UINT64_C(31)) << 16; |
4109 | 0 | Value |= (op & UINT64_C(32)) >> 3; |
4110 | | // op: XB |
4111 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
4112 | 0 | Value |= (op & UINT64_C(31)) << 11; |
4113 | 0 | Value |= (op & UINT64_C(32)) >> 4; |
4114 | 0 | break; |
4115 | 0 | } |
4116 | 0 | case PPC::XXPERMDI: |
4117 | 0 | case PPC::XXSLDWI: { |
4118 | | // op: XT |
4119 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4120 | 0 | Value |= (op & UINT64_C(31)) << 21; |
4121 | 0 | Value |= (op & UINT64_C(32)) >> 5; |
4122 | | // op: XA |
4123 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
4124 | 0 | Value |= (op & UINT64_C(31)) << 16; |
4125 | 0 | Value |= (op & UINT64_C(32)) >> 3; |
4126 | | // op: XB |
4127 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
4128 | 0 | Value |= (op & UINT64_C(31)) << 11; |
4129 | 0 | Value |= (op & UINT64_C(32)) >> 4; |
4130 | | // op: D |
4131 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
4132 | 0 | Value |= (op & UINT64_C(3)) << 8; |
4133 | 0 | break; |
4134 | 0 | } |
4135 | 0 | case PPC::XXSEL: { |
4136 | | // op: XT |
4137 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4138 | 0 | Value |= (op & UINT64_C(31)) << 21; |
4139 | 0 | Value |= (op & UINT64_C(32)) >> 5; |
4140 | | // op: XA |
4141 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
4142 | 0 | Value |= (op & UINT64_C(31)) << 16; |
4143 | 0 | Value |= (op & UINT64_C(32)) >> 3; |
4144 | | // op: XB |
4145 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
4146 | 0 | Value |= (op & UINT64_C(31)) << 11; |
4147 | 0 | Value |= (op & UINT64_C(32)) >> 4; |
4148 | | // op: XC |
4149 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
4150 | 0 | Value |= (op & UINT64_C(31)) << 6; |
4151 | 0 | Value |= (op & UINT64_C(32)) >> 2; |
4152 | 0 | break; |
4153 | 0 | } |
4154 | 0 | case PPC::XSMADDADP: |
4155 | 0 | case PPC::XSMADDASP: |
4156 | 0 | case PPC::XSMADDMDP: |
4157 | 0 | case PPC::XSMADDMSP: |
4158 | 0 | case PPC::XSMSUBADP: |
4159 | 0 | case PPC::XSMSUBASP: |
4160 | 0 | case PPC::XSMSUBMDP: |
4161 | 0 | case PPC::XSMSUBMSP: |
4162 | 0 | case PPC::XSNMADDADP: |
4163 | 0 | case PPC::XSNMADDASP: |
4164 | 0 | case PPC::XSNMADDMDP: |
4165 | 0 | case PPC::XSNMADDMSP: |
4166 | 0 | case PPC::XSNMSUBADP: |
4167 | 0 | case PPC::XSNMSUBASP: |
4168 | 0 | case PPC::XSNMSUBMDP: |
4169 | 0 | case PPC::XSNMSUBMSP: |
4170 | 0 | case PPC::XVMADDADP: |
4171 | 0 | case PPC::XVMADDASP: |
4172 | 0 | case PPC::XVMADDMDP: |
4173 | 0 | case PPC::XVMADDMSP: |
4174 | 0 | case PPC::XVMSUBADP: |
4175 | 0 | case PPC::XVMSUBASP: |
4176 | 0 | case PPC::XVMSUBMDP: |
4177 | 0 | case PPC::XVMSUBMSP: |
4178 | 0 | case PPC::XVNMADDADP: |
4179 | 0 | case PPC::XVNMADDASP: |
4180 | 0 | case PPC::XVNMADDMDP: |
4181 | 0 | case PPC::XVNMADDMSP: |
4182 | 0 | case PPC::XVNMSUBADP: |
4183 | 0 | case PPC::XVNMSUBASP: |
4184 | 0 | case PPC::XVNMSUBMDP: |
4185 | 0 | case PPC::XVNMSUBMSP: { |
4186 | | // op: XT |
4187 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4188 | 0 | Value |= (op & UINT64_C(31)) << 21; |
4189 | 0 | Value |= (op & UINT64_C(32)) >> 5; |
4190 | | // op: XA |
4191 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
4192 | 0 | Value |= (op & UINT64_C(31)) << 16; |
4193 | 0 | Value |= (op & UINT64_C(32)) >> 3; |
4194 | | // op: XB |
4195 | 0 | op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI); |
4196 | 0 | Value |= (op & UINT64_C(31)) << 11; |
4197 | 0 | Value |= (op & UINT64_C(32)) >> 4; |
4198 | 0 | break; |
4199 | 0 | } |
4200 | 0 | case PPC::XSABSDP: |
4201 | 0 | case PPC::XSCVDPSP: |
4202 | 0 | case PPC::XSCVDPSPN: |
4203 | 0 | case PPC::XSCVDPSXDS: |
4204 | 0 | case PPC::XSCVDPSXWS: |
4205 | 0 | case PPC::XSCVDPUXDS: |
4206 | 0 | case PPC::XSCVDPUXWS: |
4207 | 0 | case PPC::XSCVSPDP: |
4208 | 0 | case PPC::XSCVSPDPN: |
4209 | 0 | case PPC::XSCVSXDDP: |
4210 | 0 | case PPC::XSCVSXDSP: |
4211 | 0 | case PPC::XSCVUXDDP: |
4212 | 0 | case PPC::XSCVUXDSP: |
4213 | 0 | case PPC::XSNABSDP: |
4214 | 0 | case PPC::XSNEGDP: |
4215 | 0 | case PPC::XSRDPI: |
4216 | 0 | case PPC::XSRDPIC: |
4217 | 0 | case PPC::XSRDPIM: |
4218 | 0 | case PPC::XSRDPIP: |
4219 | 0 | case PPC::XSRDPIZ: |
4220 | 0 | case PPC::XSREDP: |
4221 | 0 | case PPC::XSRESP: |
4222 | 0 | case PPC::XSRSQRTEDP: |
4223 | 0 | case PPC::XSRSQRTESP: |
4224 | 0 | case PPC::XSSQRTDP: |
4225 | 0 | case PPC::XSSQRTSP: |
4226 | 0 | case PPC::XVABSDP: |
4227 | 0 | case PPC::XVABSSP: |
4228 | 0 | case PPC::XVCVDPSP: |
4229 | 0 | case PPC::XVCVDPSXDS: |
4230 | 0 | case PPC::XVCVDPSXWS: |
4231 | 0 | case PPC::XVCVDPUXDS: |
4232 | 0 | case PPC::XVCVDPUXWS: |
4233 | 0 | case PPC::XVCVSPDP: |
4234 | 0 | case PPC::XVCVSPSXDS: |
4235 | 0 | case PPC::XVCVSPSXWS: |
4236 | 0 | case PPC::XVCVSPUXDS: |
4237 | 0 | case PPC::XVCVSPUXWS: |
4238 | 0 | case PPC::XVCVSXDDP: |
4239 | 0 | case PPC::XVCVSXDSP: |
4240 | 0 | case PPC::XVCVSXWDP: |
4241 | 0 | case PPC::XVCVSXWSP: |
4242 | 0 | case PPC::XVCVUXDDP: |
4243 | 0 | case PPC::XVCVUXDSP: |
4244 | 0 | case PPC::XVCVUXWDP: |
4245 | 0 | case PPC::XVCVUXWSP: |
4246 | 0 | case PPC::XVNABSDP: |
4247 | 0 | case PPC::XVNABSSP: |
4248 | 0 | case PPC::XVNEGDP: |
4249 | 0 | case PPC::XVNEGSP: |
4250 | 0 | case PPC::XVRDPI: |
4251 | 0 | case PPC::XVRDPIC: |
4252 | 0 | case PPC::XVRDPIM: |
4253 | 0 | case PPC::XVRDPIP: |
4254 | 0 | case PPC::XVRDPIZ: |
4255 | 0 | case PPC::XVREDP: |
4256 | 0 | case PPC::XVRESP: |
4257 | 0 | case PPC::XVRSPI: |
4258 | 0 | case PPC::XVRSPIC: |
4259 | 0 | case PPC::XVRSPIM: |
4260 | 0 | case PPC::XVRSPIP: |
4261 | 0 | case PPC::XVRSPIZ: |
4262 | 0 | case PPC::XVRSQRTEDP: |
4263 | 0 | case PPC::XVRSQRTESP: |
4264 | 0 | case PPC::XVSQRTDP: |
4265 | 0 | case PPC::XVSQRTSP: { |
4266 | | // op: XT |
4267 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4268 | 0 | Value |= (op & UINT64_C(31)) << 21; |
4269 | 0 | Value |= (op & UINT64_C(32)) >> 5; |
4270 | | // op: XB |
4271 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
4272 | 0 | Value |= (op & UINT64_C(31)) << 11; |
4273 | 0 | Value |= (op & UINT64_C(32)) >> 4; |
4274 | 0 | break; |
4275 | 0 | } |
4276 | 0 | case PPC::XXSPLTW: { |
4277 | | // op: XT |
4278 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4279 | 0 | Value |= (op & UINT64_C(31)) << 21; |
4280 | 0 | Value |= (op & UINT64_C(32)) >> 5; |
4281 | | // op: XB |
4282 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
4283 | 0 | Value |= (op & UINT64_C(31)) << 11; |
4284 | 0 | Value |= (op & UINT64_C(32)) >> 4; |
4285 | | // op: D |
4286 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
4287 | 0 | Value |= (op & UINT64_C(3)) << 16; |
4288 | 0 | break; |
4289 | 0 | } |
4290 | 0 | case PPC::MFVSRD: |
4291 | 0 | case PPC::MFVSRWZ: { |
4292 | | // op: XT |
4293 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
4294 | 0 | Value |= (op & UINT64_C(31)) << 21; |
4295 | 0 | Value |= (op & UINT64_C(32)) >> 5; |
4296 | | // op: A |
4297 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4298 | 0 | Value |= (op & UINT64_C(31)) << 16; |
4299 | 0 | break; |
4300 | 0 | } |
4301 | 0 | case PPC::EVCMPEQ: |
4302 | 0 | case PPC::EVCMPGTS: |
4303 | 0 | case PPC::EVCMPGTU: |
4304 | 0 | case PPC::EVCMPLTS: |
4305 | 0 | case PPC::EVCMPLTU: { |
4306 | | // op: crD |
4307 | 0 | op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI); |
4308 | 0 | Value |= (op & UINT64_C(7)) << 23; |
4309 | | // op: RA |
4310 | 0 | op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI); |
4311 | 0 | Value |= (op & UINT64_C(31)) << 16; |
4312 | | // op: RB |
4313 | 0 | op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI); |
4314 | 0 | Value |= (op & UINT64_C(31)) << 11; |
4315 | 0 | break; |
4316 | 0 | } |
4317 | 0 | default: |
4318 | 0 | std::string msg; |
4319 | 0 | raw_string_ostream Msg(msg); |
4320 | 0 | Msg << "Not supported instr: " << MI; |
4321 | 0 | report_fatal_error(Msg.str()); |
4322 | 30.0k | } |
4323 | 30.0k | return Value; |
4324 | 30.0k | } |
4325 | | |