/src/keystone/llvm/lib/Target/Hexagon/HexagonGenAsmMatcher.inc
Line | Count | Source (jump to first uncovered line) |
1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* Assembly Matcher Source Fragment *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* *| |
7 | | \*===----------------------------------------------------------------------===*/ |
8 | | |
9 | | |
10 | | #ifdef GET_ASSEMBLER_HEADER |
11 | | #undef GET_ASSEMBLER_HEADER |
12 | | // This should be included into the middle of the declaration of |
13 | | // your subclasses implementation of MCTargetAsmParser. |
14 | | uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const; |
15 | | void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
16 | | const OperandVector &Operands); |
17 | | void convertToMapAndConstraints(unsigned Kind, |
18 | | const OperandVector &Operands) override; |
19 | | unsigned MatchInstructionImpl(const OperandVector &Operands, |
20 | | MCInst &Inst, |
21 | | uint64_t &ErrorInfo, bool matchingInlineAsm, |
22 | | unsigned VariantID = 0); |
23 | | #endif // GET_ASSEMBLER_HEADER_INFO |
24 | | |
25 | | |
26 | | #ifdef GET_OPERAND_DIAGNOSTIC_TYPES |
27 | | #undef GET_OPERAND_DIAGNOSTIC_TYPES |
28 | | |
29 | | #endif // GET_OPERAND_DIAGNOSTIC_TYPES |
30 | | |
31 | | |
32 | | #ifdef GET_REGISTER_MATCHER |
33 | | #undef GET_REGISTER_MATCHER |
34 | | |
35 | | // Flags for subtarget features that participate in instruction matching. |
36 | | enum SubtargetFeatureFlag : uint8_t { |
37 | | Feature_HasV55T = (1ULL << 0), |
38 | | Feature_HasV60T = (1ULL << 1), |
39 | | Feature_UseHVXDbl = (1ULL << 3), |
40 | | Feature_UseHVX = (1ULL << 2), |
41 | | Feature_None = 0 |
42 | | }; |
43 | | |
44 | 1.32M | static unsigned MatchRegisterName(StringRef Name) { |
45 | 1.32M | switch (Name.size()) { |
46 | 1.15M | default: break; |
47 | 1.15M | case 2: // 35 strings to match. |
48 | 60.4k | switch (Name[0]) { |
49 | 19.3k | default: break; |
50 | 19.3k | case 'c': // 3 strings to match. |
51 | 18.1k | switch (Name[1]) { |
52 | 15.6k | default: break; |
53 | 15.6k | case '5': // 1 string to match. |
54 | 2 | return 10; // "c5" |
55 | 4 | case '6': // 1 string to match. |
56 | 4 | return 11; // "c6" |
57 | 2.44k | case '7': // 1 string to match. |
58 | 2.44k | return 12; // "c7" |
59 | 18.1k | } |
60 | 15.6k | break; |
61 | 15.6k | case 'g': // 1 string to match. |
62 | 542 | if (Name[1] != 'p') |
63 | 468 | break; |
64 | 74 | return 2; // "gp" |
65 | 1.26k | case 'm': // 2 strings to match. |
66 | 1.26k | switch (Name[1]) { |
67 | 1.17k | default: break; |
68 | 1.17k | case '0': // 1 string to match. |
69 | 56 | return 33; // "m0" |
70 | 34 | case '1': // 1 string to match. |
71 | 34 | return 34; // "m1" |
72 | 1.26k | } |
73 | 1.17k | break; |
74 | 7.99k | case 'p': // 5 strings to match. |
75 | 7.99k | switch (Name[1]) { |
76 | 1.54k | default: break; |
77 | 2.44k | case '0': // 1 string to match. |
78 | 2.44k | return 35; // "p0" |
79 | 1.31k | case '1': // 1 string to match. |
80 | 1.31k | return 36; // "p1" |
81 | 2.16k | case '2': // 1 string to match. |
82 | 2.16k | return 37; // "p2" |
83 | 58 | case '3': // 1 string to match. |
84 | 58 | return 38; // "p3" |
85 | 462 | case 'c': // 1 string to match. |
86 | 462 | return 3; // "pc" |
87 | 7.99k | } |
88 | 1.54k | break; |
89 | 6.00k | case 'q': // 4 strings to match. |
90 | 6.00k | switch (Name[1]) { |
91 | 3.08k | default: break; |
92 | 3.08k | case '0': // 1 string to match. |
93 | 425 | return 39; // "q0" |
94 | 26 | case '1': // 1 string to match. |
95 | 26 | return 40; // "q1" |
96 | 389 | case '2': // 1 string to match. |
97 | 389 | return 41; // "q2" |
98 | 2.08k | case '3': // 1 string to match. |
99 | 2.08k | return 42; // "q3" |
100 | 6.00k | } |
101 | 3.08k | break; |
102 | 4.28k | case 'r': // 10 strings to match. |
103 | 4.28k | switch (Name[1]) { |
104 | 558 | default: break; |
105 | 2.86k | case '0': // 1 string to match. |
106 | 2.86k | return 43; // "r0" |
107 | 122 | case '1': // 1 string to match. |
108 | 122 | return 44; // "r1" |
109 | 207 | case '2': // 1 string to match. |
110 | 207 | return 45; // "r2" |
111 | 165 | case '3': // 1 string to match. |
112 | 165 | return 46; // "r3" |
113 | 53 | case '4': // 1 string to match. |
114 | 53 | return 47; // "r4" |
115 | 73 | case '5': // 1 string to match. |
116 | 73 | return 48; // "r5" |
117 | 56 | case '6': // 1 string to match. |
118 | 56 | return 49; // "r6" |
119 | 93 | case '7': // 1 string to match. |
120 | 93 | return 50; // "r7" |
121 | 31 | case '8': // 1 string to match. |
122 | 31 | return 51; // "r8" |
123 | 56 | case '9': // 1 string to match. |
124 | 56 | return 52; // "r9" |
125 | 4.28k | } |
126 | 558 | break; |
127 | 2.89k | case 'v': // 10 strings to match. |
128 | 2.89k | switch (Name[1]) { |
129 | 2.10k | default: break; |
130 | 2.10k | case '0': // 1 string to match. |
131 | 67 | return 77; // "v0" |
132 | 62 | case '1': // 1 string to match. |
133 | 62 | return 78; // "v1" |
134 | 404 | case '2': // 1 string to match. |
135 | 404 | return 79; // "v2" |
136 | 147 | case '3': // 1 string to match. |
137 | 147 | return 80; // "v3" |
138 | 11 | case '4': // 1 string to match. |
139 | 11 | return 81; // "v4" |
140 | 6 | case '5': // 1 string to match. |
141 | 6 | return 82; // "v5" |
142 | 20 | case '6': // 1 string to match. |
143 | 20 | return 83; // "v6" |
144 | 18 | case '7': // 1 string to match. |
145 | 18 | return 84; // "v7" |
146 | 14 | case '8': // 1 string to match. |
147 | 14 | return 85; // "v8" |
148 | 35 | case '9': // 1 string to match. |
149 | 35 | return 86; // "v9" |
150 | 2.89k | } |
151 | 2.10k | break; |
152 | 60.4k | } |
153 | 43.9k | break; |
154 | 44.2k | case 3: // 52 strings to match. |
155 | 44.2k | switch (Name[0]) { |
156 | 23.3k | default: break; |
157 | 23.3k | case 'c': // 2 strings to match. |
158 | 9.59k | if (Name[1] != 's') |
159 | 9.50k | break; |
160 | 86 | switch (Name[2]) { |
161 | 74 | default: break; |
162 | 74 | case '0': // 1 string to match. |
163 | 12 | return 13; // "cs0" |
164 | 0 | case '1': // 1 string to match. |
165 | 0 | return 14; // "cs1" |
166 | 86 | } |
167 | 74 | break; |
168 | 485 | case 'l': // 2 strings to match. |
169 | 485 | if (Name[1] != 'c') |
170 | 440 | break; |
171 | 45 | switch (Name[2]) { |
172 | 41 | default: break; |
173 | 41 | case '0': // 1 string to match. |
174 | 0 | return 31; // "lc0" |
175 | 4 | case '1': // 1 string to match. |
176 | 4 | return 32; // "lc1" |
177 | 45 | } |
178 | 41 | break; |
179 | 5.61k | case 'r': // 22 strings to match. |
180 | 5.61k | switch (Name[1]) { |
181 | 4.14k | default: break; |
182 | 4.14k | case '1': // 10 strings to match. |
183 | 160 | switch (Name[2]) { |
184 | 23 | default: break; |
185 | 23 | case '0': // 1 string to match. |
186 | 14 | return 53; // "r10" |
187 | 17 | case '1': // 1 string to match. |
188 | 17 | return 54; // "r11" |
189 | 5 | case '2': // 1 string to match. |
190 | 5 | return 55; // "r12" |
191 | 77 | case '3': // 1 string to match. |
192 | 77 | return 56; // "r13" |
193 | 1 | case '4': // 1 string to match. |
194 | 1 | return 57; // "r14" |
195 | 2 | case '5': // 1 string to match. |
196 | 2 | return 58; // "r15" |
197 | 2 | case '6': // 1 string to match. |
198 | 2 | return 59; // "r16" |
199 | 16 | case '7': // 1 string to match. |
200 | 16 | return 60; // "r17" |
201 | 2 | case '8': // 1 string to match. |
202 | 2 | return 61; // "r18" |
203 | 1 | case '9': // 1 string to match. |
204 | 1 | return 62; // "r19" |
205 | 160 | } |
206 | 23 | break; |
207 | 153 | case '2': // 10 strings to match. |
208 | 153 | switch (Name[2]) { |
209 | 20 | default: break; |
210 | 81 | case '0': // 1 string to match. |
211 | 81 | return 63; // "r20" |
212 | 13 | case '1': // 1 string to match. |
213 | 13 | return 64; // "r21" |
214 | 4 | case '2': // 1 string to match. |
215 | 4 | return 65; // "r22" |
216 | 3 | case '3': // 1 string to match. |
217 | 3 | return 66; // "r23" |
218 | 2 | case '4': // 1 string to match. |
219 | 2 | return 67; // "r24" |
220 | 12 | case '5': // 1 string to match. |
221 | 12 | return 68; // "r25" |
222 | 5 | case '6': // 1 string to match. |
223 | 5 | return 69; // "r26" |
224 | 2 | case '7': // 1 string to match. |
225 | 2 | return 70; // "r27" |
226 | 0 | case '8': // 1 string to match. |
227 | 0 | return 71; // "r28" |
228 | 11 | case '9': // 1 string to match. |
229 | 11 | return 72; // "r29" |
230 | 153 | } |
231 | 20 | break; |
232 | 1.16k | case '3': // 2 strings to match. |
233 | 1.16k | switch (Name[2]) { |
234 | 1.14k | default: break; |
235 | 1.14k | case '0': // 1 string to match. |
236 | 11 | return 73; // "r30" |
237 | 1 | case '1': // 1 string to match. |
238 | 1 | return 74; // "r31" |
239 | 1.16k | } |
240 | 1.14k | break; |
241 | 5.61k | } |
242 | 5.33k | break; |
243 | 5.33k | case 's': // 2 strings to match. |
244 | 2.50k | if (Name[1] != 'a') |
245 | 2.29k | break; |
246 | 218 | switch (Name[2]) { |
247 | 218 | default: break; |
248 | 218 | case '0': // 1 string to match. |
249 | 0 | return 75; // "sa0" |
250 | 0 | case '1': // 1 string to match. |
251 | 0 | return 76; // "sa1" |
252 | 218 | } |
253 | 218 | break; |
254 | 966 | case 'u': // 2 strings to match. |
255 | 966 | switch (Name[1]) { |
256 | 142 | default: break; |
257 | 758 | case 'g': // 1 string to match. |
258 | 758 | if (Name[2] != 'p') |
259 | 714 | break; |
260 | 44 | return 4; // "ugp" |
261 | 66 | case 's': // 1 string to match. |
262 | 66 | if (Name[2] != 'r') |
263 | 29 | break; |
264 | 37 | return 8; // "usr" |
265 | 966 | } |
266 | 885 | break; |
267 | 1.79k | case 'v': // 22 strings to match. |
268 | 1.79k | switch (Name[1]) { |
269 | 784 | default: break; |
270 | 784 | case '1': // 10 strings to match. |
271 | 119 | switch (Name[2]) { |
272 | 24 | default: break; |
273 | 24 | case '0': // 1 string to match. |
274 | 19 | return 87; // "v10" |
275 | 12 | case '1': // 1 string to match. |
276 | 12 | return 88; // "v11" |
277 | 3 | case '2': // 1 string to match. |
278 | 3 | return 89; // "v12" |
279 | 9 | case '3': // 1 string to match. |
280 | 9 | return 90; // "v13" |
281 | 14 | case '4': // 1 string to match. |
282 | 14 | return 91; // "v14" |
283 | 24 | case '5': // 1 string to match. |
284 | 24 | return 92; // "v15" |
285 | 1 | case '6': // 1 string to match. |
286 | 1 | return 93; // "v16" |
287 | 0 | case '7': // 1 string to match. |
288 | 0 | return 94; // "v17" |
289 | 9 | case '8': // 1 string to match. |
290 | 9 | return 95; // "v18" |
291 | 4 | case '9': // 1 string to match. |
292 | 4 | return 96; // "v19" |
293 | 119 | } |
294 | 24 | break; |
295 | 815 | case '2': // 10 strings to match. |
296 | 815 | switch (Name[2]) { |
297 | 365 | default: break; |
298 | 365 | case '0': // 1 string to match. |
299 | 20 | return 97; // "v20" |
300 | 62 | case '1': // 1 string to match. |
301 | 62 | return 98; // "v21" |
302 | 0 | case '2': // 1 string to match. |
303 | 0 | return 99; // "v22" |
304 | 2 | case '3': // 1 string to match. |
305 | 2 | return 100; // "v23" |
306 | 0 | case '4': // 1 string to match. |
307 | 0 | return 101; // "v24" |
308 | 327 | case '5': // 1 string to match. |
309 | 327 | return 102; // "v25" |
310 | 6 | case '6': // 1 string to match. |
311 | 6 | return 103; // "v26" |
312 | 17 | case '7': // 1 string to match. |
313 | 17 | return 104; // "v27" |
314 | 3 | case '8': // 1 string to match. |
315 | 3 | return 105; // "v28" |
316 | 13 | case '9': // 1 string to match. |
317 | 13 | return 106; // "v29" |
318 | 815 | } |
319 | 365 | break; |
320 | 365 | case '3': // 2 strings to match. |
321 | 77 | switch (Name[2]) { |
322 | 67 | default: break; |
323 | 67 | case '0': // 1 string to match. |
324 | 4 | return 107; // "v30" |
325 | 6 | case '1': // 1 string to match. |
326 | 6 | return 108; // "v31" |
327 | 77 | } |
328 | 67 | break; |
329 | 1.79k | } |
330 | 1.24k | break; |
331 | 44.2k | } |
332 | 43.3k | break; |
333 | 43.3k | case 4: // 15 strings to match. |
334 | 25.3k | switch (Name[0]) { |
335 | 15.4k | default: break; |
336 | 15.4k | case 'c': // 4 strings to match. |
337 | 6.50k | switch (Name[1]) { |
338 | 2.92k | default: break; |
339 | 2.92k | case '1': // 1 string to match. |
340 | 43 | if (memcmp(Name.data()+2, ":0", 2)) |
341 | 43 | break; |
342 | 0 | return 125; // "c1:0" |
343 | 44 | case '3': // 1 string to match. |
344 | 44 | if (memcmp(Name.data()+2, ":2", 2)) |
345 | 29 | break; |
346 | 15 | return 126; // "c3:2" |
347 | 3.45k | case '7': // 1 string to match. |
348 | 3.45k | if (memcmp(Name.data()+2, ":6", 2)) |
349 | 3.45k | break; |
350 | 6 | return 127; // "c7:6" |
351 | 29 | case '9': // 1 string to match. |
352 | 29 | if (memcmp(Name.data()+2, ":8", 2)) |
353 | 28 | break; |
354 | 1 | return 128; // "c9:8" |
355 | 6.50k | } |
356 | 6.47k | break; |
357 | 6.47k | case 'p': // 1 string to match. |
358 | 1.61k | if (memcmp(Name.data()+1, "3:0", 3)) |
359 | 1.60k | break; |
360 | 5 | return 130; // "p3:0" |
361 | 1.17k | case 'r': // 5 strings to match. |
362 | 1.17k | switch (Name[1]) { |
363 | 850 | default: break; |
364 | 850 | case '1': // 1 string to match. |
365 | 43 | if (memcmp(Name.data()+2, ":0", 2)) |
366 | 35 | break; |
367 | 8 | return 15; // "r1:0" |
368 | 91 | case '3': // 1 string to match. |
369 | 91 | if (memcmp(Name.data()+2, ":2", 2)) |
370 | 42 | break; |
371 | 49 | return 16; // "r3:2" |
372 | 29 | case '5': // 1 string to match. |
373 | 29 | if (memcmp(Name.data()+2, ":4", 2)) |
374 | 15 | break; |
375 | 14 | return 17; // "r5:4" |
376 | 140 | case '7': // 1 string to match. |
377 | 140 | if (memcmp(Name.data()+2, ":6", 2)) |
378 | 99 | break; |
379 | 41 | return 18; // "r7:6" |
380 | 24 | case '9': // 1 string to match. |
381 | 24 | if (memcmp(Name.data()+2, ":8", 2)) |
382 | 20 | break; |
383 | 4 | return 19; // "r9:8" |
384 | 1.17k | } |
385 | 1.06k | break; |
386 | 1.06k | case 'v': // 5 strings to match. |
387 | 607 | switch (Name[1]) { |
388 | 207 | default: break; |
389 | 207 | case '1': // 1 string to match. |
390 | 54 | if (memcmp(Name.data()+2, ":0", 2)) |
391 | 52 | break; |
392 | 2 | return 109; // "v1:0" |
393 | 133 | case '3': // 1 string to match. |
394 | 133 | if (memcmp(Name.data()+2, ":2", 2)) |
395 | 92 | break; |
396 | 41 | return 110; // "v3:2" |
397 | 31 | case '5': // 1 string to match. |
398 | 31 | if (memcmp(Name.data()+2, ":4", 2)) |
399 | 17 | break; |
400 | 14 | return 111; // "v5:4" |
401 | 94 | case '7': // 1 string to match. |
402 | 94 | if (memcmp(Name.data()+2, ":6", 2)) |
403 | 85 | break; |
404 | 9 | return 112; // "v7:6" |
405 | 88 | case '9': // 1 string to match. |
406 | 88 | if (memcmp(Name.data()+2, ":8", 2)) |
407 | 60 | break; |
408 | 28 | return 113; // "v9:8" |
409 | 607 | } |
410 | 513 | break; |
411 | 25.3k | } |
412 | 25.1k | break; |
413 | 25.1k | case 6: // 25 strings to match. |
414 | 22.9k | switch (Name[0]) { |
415 | 11.9k | default: break; |
416 | 11.9k | case 'c': // 3 strings to match. |
417 | 1.36k | if (Name[1] != '1') |
418 | 1.29k | break; |
419 | 77 | switch (Name[2]) { |
420 | 37 | default: break; |
421 | 37 | case '1': // 1 string to match. |
422 | 19 | if (memcmp(Name.data()+3, ":10", 3)) |
423 | 10 | break; |
424 | 9 | return 129; // "c11:10" |
425 | 17 | case '3': // 1 string to match. |
426 | 17 | if (memcmp(Name.data()+3, ":12", 3)) |
427 | 13 | break; |
428 | 4 | return 1; // "c13:12" |
429 | 4 | case '5': // 1 string to match. |
430 | 4 | if (memcmp(Name.data()+3, ":14", 3)) |
431 | 4 | break; |
432 | 0 | return 5; // "c15:14" |
433 | 77 | } |
434 | 64 | break; |
435 | 7.61k | case 'r': // 11 strings to match. |
436 | 7.61k | switch (Name[1]) { |
437 | 6.48k | default: break; |
438 | 6.48k | case '1': // 5 strings to match. |
439 | 178 | switch (Name[2]) { |
440 | 14 | default: break; |
441 | 14 | case '1': // 1 string to match. |
442 | 12 | if (memcmp(Name.data()+3, ":10", 3)) |
443 | 12 | break; |
444 | 0 | return 20; // "r11:10" |
445 | 34 | case '3': // 1 string to match. |
446 | 34 | if (memcmp(Name.data()+3, ":12", 3)) |
447 | 13 | break; |
448 | 21 | return 21; // "r13:12" |
449 | 31 | case '5': // 1 string to match. |
450 | 31 | if (memcmp(Name.data()+3, ":14", 3)) |
451 | 30 | break; |
452 | 1 | return 22; // "r15:14" |
453 | 38 | case '7': // 1 string to match. |
454 | 38 | if (memcmp(Name.data()+3, ":16", 3)) |
455 | 7 | break; |
456 | 31 | return 23; // "r17:16" |
457 | 49 | case '9': // 1 string to match. |
458 | 49 | if (memcmp(Name.data()+3, ":18", 3)) |
459 | 44 | break; |
460 | 5 | return 24; // "r19:18" |
461 | 178 | } |
462 | 120 | break; |
463 | 332 | case '2': // 5 strings to match. |
464 | 332 | switch (Name[2]) { |
465 | 41 | default: break; |
466 | 41 | case '1': // 1 string to match. |
467 | 32 | if (memcmp(Name.data()+3, ":20", 3)) |
468 | 32 | break; |
469 | 0 | return 25; // "r21:20" |
470 | 23 | case '3': // 1 string to match. |
471 | 23 | if (memcmp(Name.data()+3, ":22", 3)) |
472 | 23 | break; |
473 | 0 | return 26; // "r23:22" |
474 | 89 | case '5': // 1 string to match. |
475 | 89 | if (memcmp(Name.data()+3, ":24", 3)) |
476 | 39 | break; |
477 | 50 | return 27; // "r25:24" |
478 | 43 | case '7': // 1 string to match. |
479 | 43 | if (memcmp(Name.data()+3, ":26", 3)) |
480 | 43 | break; |
481 | 0 | return 28; // "r27:26" |
482 | 104 | case '9': // 1 string to match. |
483 | 104 | if (memcmp(Name.data()+3, ":28", 3)) |
484 | 103 | break; |
485 | 1 | return 29; // "r29:28" |
486 | 332 | } |
487 | 281 | break; |
488 | 619 | case '3': // 1 string to match. |
489 | 619 | if (memcmp(Name.data()+2, "1:30", 4)) |
490 | 619 | break; |
491 | 0 | return 30; // "r31:30" |
492 | 7.61k | } |
493 | 7.50k | break; |
494 | 7.50k | case 'v': // 11 strings to match. |
495 | 1.99k | switch (Name[1]) { |
496 | 1.03k | default: break; |
497 | 1.03k | case '1': // 5 strings to match. |
498 | 131 | switch (Name[2]) { |
499 | 8 | default: break; |
500 | 43 | case '1': // 1 string to match. |
501 | 43 | if (memcmp(Name.data()+3, ":10", 3)) |
502 | 43 | break; |
503 | 0 | return 114; // "v11:10" |
504 | 14 | case '3': // 1 string to match. |
505 | 14 | if (memcmp(Name.data()+3, ":12", 3)) |
506 | 4 | break; |
507 | 10 | return 115; // "v13:12" |
508 | 38 | case '5': // 1 string to match. |
509 | 38 | if (memcmp(Name.data()+3, ":14", 3)) |
510 | 34 | break; |
511 | 4 | return 116; // "v15:14" |
512 | 9 | case '7': // 1 string to match. |
513 | 9 | if (memcmp(Name.data()+3, ":16", 3)) |
514 | 9 | break; |
515 | 0 | return 117; // "v17:16" |
516 | 19 | case '9': // 1 string to match. |
517 | 19 | if (memcmp(Name.data()+3, ":18", 3)) |
518 | 15 | break; |
519 | 4 | return 118; // "v19:18" |
520 | 131 | } |
521 | 113 | break; |
522 | 782 | case '2': // 5 strings to match. |
523 | 782 | switch (Name[2]) { |
524 | 80 | default: break; |
525 | 80 | case '1': // 1 string to match. |
526 | 70 | if (memcmp(Name.data()+3, ":20", 3)) |
527 | 58 | break; |
528 | 12 | return 119; // "v21:20" |
529 | 9 | case '3': // 1 string to match. |
530 | 9 | if (memcmp(Name.data()+3, ":22", 3)) |
531 | 9 | break; |
532 | 0 | return 120; // "v23:22" |
533 | 485 | case '5': // 1 string to match. |
534 | 485 | if (memcmp(Name.data()+3, ":24", 3)) |
535 | 353 | break; |
536 | 132 | return 121; // "v25:24" |
537 | 20 | case '7': // 1 string to match. |
538 | 20 | if (memcmp(Name.data()+3, ":26", 3)) |
539 | 18 | break; |
540 | 2 | return 122; // "v27:26" |
541 | 118 | case '9': // 1 string to match. |
542 | 118 | if (memcmp(Name.data()+3, ":28", 3)) |
543 | 43 | break; |
544 | 75 | return 123; // "v29:28" |
545 | 782 | } |
546 | 561 | break; |
547 | 561 | case '3': // 1 string to match. |
548 | 43 | if (memcmp(Name.data()+2, "1:30", 4)) |
549 | 43 | break; |
550 | 0 | return 124; // "v31:30" |
551 | 1.99k | } |
552 | 1.75k | break; |
553 | 22.9k | } |
554 | 22.5k | break; |
555 | 22.5k | case 7: // 1 string to match. |
556 | 16.3k | if (memcmp(Name.data()+0, "usr.ovf", 7)) |
557 | 16.3k | break; |
558 | 0 | return 9; // "usr.ovf" |
559 | 2.25k | case 9: // 2 strings to match. |
560 | 2.25k | if (memcmp(Name.data()+0, "upcycle", 7)) |
561 | 2.20k | break; |
562 | 44 | switch (Name[7]) { |
563 | 27 | default: break; |
564 | 27 | case 'h': // 1 string to match. |
565 | 17 | if (Name[8] != 'i') |
566 | 17 | break; |
567 | 0 | return 6; // "upcyclehi" |
568 | 0 | case 'l': // 1 string to match. |
569 | 0 | if (Name[8] != 'o') |
570 | 0 | break; |
571 | 0 | return 7; // "upcyclelo" |
572 | 44 | } |
573 | 44 | break; |
574 | 1.32M | } |
575 | 1.30M | return 0; |
576 | 1.32M | } |
577 | | |
578 | | #endif // GET_REGISTER_MATCHER |
579 | | |
580 | | |
581 | | #ifdef GET_SUBTARGET_FEATURE_NAME |
582 | | #undef GET_SUBTARGET_FEATURE_NAME |
583 | | |
584 | | // User-level names for subtarget features that participate in |
585 | | // instruction matching. |
586 | | static const char *getSubtargetFeatureName(uint64_t Val) { |
587 | | switch(Val) { |
588 | | case Feature_HasV55T: return ""; |
589 | | case Feature_HasV60T: return ""; |
590 | | case Feature_UseHVXDbl: return ""; |
591 | | case Feature_UseHVX: return ""; |
592 | | default: return "(unknown)"; |
593 | | } |
594 | | } |
595 | | |
596 | | #endif // GET_SUBTARGET_FEATURE_NAME |
597 | | |
598 | | |
599 | | #ifdef GET_MATCHER_IMPLEMENTATION |
600 | | #undef GET_MATCHER_IMPLEMENTATION |
601 | | |
602 | | namespace { |
603 | | enum OperatorConversionKind { |
604 | | CVT_Done, |
605 | | CVT_Reg, |
606 | | CVT_Tied, |
607 | | CVT_95_Reg, |
608 | | CVT_regC6, |
609 | | CVT_regC7, |
610 | | CVT_95_adds8Imm64Operands, |
611 | | CVT_95_addu64ImmOperands, |
612 | | CVT_95_adds16ExtOperands, |
613 | | CVT_imm_95_0, |
614 | | CVT_95_addu16ImmOperands, |
615 | | CVT_95_addImmOperands, |
616 | | CVT_95_addu16_95_3ImmOperands, |
617 | | CVT_95_addu32MustExtOperands, |
618 | | CVT_95_addu6ImmOperands, |
619 | | CVT_95_addu16_95_0ImmOperands, |
620 | | CVT_95_addu16_95_1ImmOperands, |
621 | | CVT_95_addu16_95_2ImmOperands, |
622 | | CVT_95_addu5ImmOperands, |
623 | | CVT_95_adds8ExtOperands, |
624 | | CVT_95_addu4ImmOperands, |
625 | | CVT_95_addu6ExtOperands, |
626 | | CVT_95_adds10ExtOperands, |
627 | | CVT_95_adds6ImmOperands, |
628 | | CVT_95_adds9ExtOperands, |
629 | | CVT_95_adds8ImmOperands, |
630 | | CVT_95_addu10ImmOperands, |
631 | | CVT_95_adds11_95_0ExtOperands, |
632 | | CVT_95_adds11_95_2ExtOperands, |
633 | | CVT_95_adds11_95_3ExtOperands, |
634 | | CVT_95_adds11_95_1ExtOperands, |
635 | | CVT_95_addu3ImmOperands, |
636 | | CVT_95_addu2ImmOperands, |
637 | | CVT_95_adds4_95_6ImmOperands, |
638 | | CVT_95_addu8ExtOperands, |
639 | | CVT_95_addu8ImmOperands, |
640 | | CVT_95_addf32ExtOperands, |
641 | | CVT_95_addu9ExtOperands, |
642 | | CVT_95_addu7ExtOperands, |
643 | | CVT_95_addu7ImmOperands, |
644 | | CVT_95_adds4_95_0ImmOperands, |
645 | | CVT_95_adds4_95_2ImmOperands, |
646 | | CVT_95_adds4_95_3ImmOperands, |
647 | | CVT_95_adds4_95_1ImmOperands, |
648 | | CVT_95_adds3_95_6ImmOperands, |
649 | | CVT_95_adds6ExtOperands, |
650 | | CVT_95_addu6_95_2ImmOperands, |
651 | | CVT_95_addu1ImmOperands, |
652 | | CVT_95_addu11_95_3ImmOperands, |
653 | | CVT_95_adds12ExtOperands, |
654 | | CVT_95_addu6_95_0ExtOperands, |
655 | | CVT_95_addu6_95_3ExtOperands, |
656 | | CVT_95_addu6_95_1ExtOperands, |
657 | | CVT_95_addu6_95_2ExtOperands, |
658 | | CVT_95_addu6_95_0ImmOperands, |
659 | | CVT_95_addu6_95_1ImmOperands, |
660 | | CVT_95_addu32ImmOperands, |
661 | | CVT_NUM_CONVERTERS |
662 | | }; |
663 | | |
664 | | enum InstructionConversionKind { |
665 | | Convert__Reg1_0__Reg1_2__Reg1_2, |
666 | | Convert__Reg1_0__Reg1_2, |
667 | | Convert__Reg1_0__regC6, |
668 | | Convert__Reg1_0__regC7, |
669 | | Convert__Reg1_0__s8Imm641_3, |
670 | | Convert__Reg1_0__u64Imm1_3, |
671 | | Convert__Reg1_0__s16Ext1_3, |
672 | | Convert__Reg1_0__Reg1_4, |
673 | | Convert__Reg1_0__Tie0__Reg1_4__imm_95_0, |
674 | | Convert__Reg1_0__Reg1_4__imm_95_0, |
675 | | Convert__Reg1_0__Tie0__u16Imm1_5, |
676 | | Convert__Reg1_0__imm_95_0__Reg1_4, |
677 | | Convert__Reg1_0__Reg1_2__Imm1_5, |
678 | | Convert__Reg1_0__Reg1_4__Reg1_5, |
679 | | Convert__Reg1_0__Imm1_5, |
680 | | Convert__Reg1_0__Tie0__Reg1_4__Reg1_5, |
681 | | Convert__Reg1_0__u16_3Imm1_5, |
682 | | Convert__Reg1_0__u32MustExt1_5, |
683 | | Convert__Reg1_0__u6Imm1_3__Imm1_6, |
684 | | Convert__Reg1_0__u16_0Imm1_5, |
685 | | Convert__Reg1_0__u16_1Imm1_5, |
686 | | Convert__Reg1_0__u16_2Imm1_5, |
687 | | Convert__Reg1_0__Reg1_1__Reg1_5, |
688 | | Convert__Reg1_0__Reg1_5__Reg1_6, |
689 | | Convert__Reg1_0__Reg1_4__Reg1_6, |
690 | | Convert__Reg1_0__Reg1_4__u6Imm1_6, |
691 | | Convert__Reg1_0__Reg1_4__u5Imm1_6, |
692 | | Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, |
693 | | Convert__Reg1_0__s8Ext1_5__Reg1_6, |
694 | | Convert__Reg1_0__Reg1_4__s8Ext1_6, |
695 | | Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, |
696 | | Convert__Reg1_0__Reg1_4__u4Imm1_6, |
697 | | Convert__Reg1_0__Reg1_1__Tie0__Reg1_5__Reg1_6, |
698 | | Convert__Reg1_0__u6Ext1_6, |
699 | | Convert__Reg1_0__Reg1_4__s16Ext1_6, |
700 | | Convert__Reg1_0__Reg1_4__s10Ext1_6, |
701 | | Convert__Reg1_0__s6Imm1_5__Reg1_6, |
702 | | Convert__Reg1_0__Reg1_4__s9Ext1_6, |
703 | | Convert__Reg1_0__s10Ext1_5__Reg1_6, |
704 | | Convert__Reg1_0__Reg1_1__Reg1_5__Reg1_6, |
705 | | Convert__Reg1_0__Tie0__Reg1_6, |
706 | | Convert__Reg1_0__Reg1_5__u6Imm1_7, |
707 | | Convert__Reg1_0__Reg1_5__u5Imm1_7, |
708 | | Convert__Reg1_0__Reg1_6__Reg1_7, |
709 | | Convert__Reg1_0__Reg1_7__Reg1_6, |
710 | | Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, |
711 | | Convert__Reg1_0__s8Ext1_5__s8Imm1_7, |
712 | | Convert__Reg1_0__s8Imm1_5__u6Ext1_7, |
713 | | Convert__Reg1_0__u10Imm1_5, |
714 | | Convert__Reg1_0__Tie0__Reg1_4__s11_0Ext1_7, |
715 | | Convert__Reg1_0__Reg1_4__Tie0__Tie1__Reg1_7, |
716 | | Convert__Reg1_0__Reg1_4__u6Ext1_7, |
717 | | Convert__Reg1_0__Reg1_4__s11_2Ext1_7, |
718 | | Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, |
719 | | Convert__Reg1_0__u16_3Imm1_7, |
720 | | Convert__Reg1_0__Reg1_4__s11_3Ext1_7, |
721 | | Convert__Reg1_0__Tie0__Reg1_4__s11_1Ext1_7, |
722 | | Convert__Reg1_0__Reg1_4__Reg1_5__u3Imm1_7, |
723 | | Convert__Reg1_0__Reg1_4__Reg1_5__u2Imm1_7, |
724 | | Convert__Reg1_0__Reg1_4__Imm1_7, |
725 | | Convert__Reg1_0__Reg1_4__s4_6Imm1_7, |
726 | | Convert__Reg1_0__Tie0__Reg1_5__Reg1_7, |
727 | | Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, |
728 | | Convert__Reg1_0__Tie0__Reg1_5__s8Ext1_7, |
729 | | Convert__Reg1_0__Tie0__Reg1_5__u8Ext1_7, |
730 | | Convert__Reg1_0__Imm1_7, |
731 | | Convert__Reg1_0__Reg1_5__u8Ext1_7, |
732 | | Convert__Reg1_0__Reg1_5__u8Imm1_7, |
733 | | Convert__Reg1_0__u16_0Imm1_7, |
734 | | Convert__Reg1_0__Reg1_4__s11_0Ext1_7, |
735 | | Convert__Reg1_0__Reg1_4__s11_1Ext1_7, |
736 | | Convert__Reg1_0__u16_1Imm1_7, |
737 | | Convert__Reg1_0__u16_2Imm1_7, |
738 | | Convert__Reg1_0__Reg1_4__f32Ext1_6__Reg1_7, |
739 | | Convert__Reg1_0__Reg1_4__s8Ext1_6__Reg1_7, |
740 | | Convert__Reg1_0__Reg1_4__Reg1_5__f32Ext1_7, |
741 | | Convert__Reg1_0__Reg1_4__Reg1_5__s8Ext1_7, |
742 | | Convert__Reg1_0__Tie0__Reg1_5__s10Ext1_7, |
743 | | Convert__Reg1_0__Reg1_7__Reg1_8, |
744 | | Convert__Reg1_0__Reg1_6__s10Ext1_8, |
745 | | Convert__Reg1_0__Reg1_6__s8Ext1_8, |
746 | | Convert__Reg1_0__Reg1_6__u8Ext1_8, |
747 | | Convert__Reg1_0__Reg1_6__u9Ext1_8, |
748 | | Convert__Reg1_0__Reg1_6__u8Imm1_8, |
749 | | Convert__Reg1_0__Reg1_6__s8Imm1_8, |
750 | | Convert__Reg1_0__Reg1_6__u7Ext1_8, |
751 | | Convert__Reg1_0__Reg1_6__u7Imm1_8, |
752 | | Convert__Reg1_0__Tie0__Reg1_5__Reg1_6__u2Imm1_8, |
753 | | Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1, |
754 | | Convert__Reg1_0__s8Ext1_6__s8Imm1_8, |
755 | | Convert__Reg1_0__Reg1_4__u6Imm1_6__u6Imm1_8, |
756 | | Convert__Reg1_0__Tie0__Reg1_4__u6Imm1_6__u6Imm1_8, |
757 | | Convert__Reg1_0__Reg1_4__Tie0__Tie1__s4_0Imm1_8, |
758 | | Convert__Reg1_0__Reg1_4__Tie1__s4_2Imm1_8, |
759 | | Convert__Reg1_0__Reg1_4__Tie1__s4_3Imm1_8, |
760 | | Convert__Reg1_0__Reg1_4__Tie0__Tie1__s4_1Imm1_8, |
761 | | Convert__Reg1_0__Reg1_6, |
762 | | Convert__Reg1_0__Reg1_4__u5Imm1_6__u5Imm1_8, |
763 | | Convert__Reg1_0__Tie0__Reg1_4__u5Imm1_6__u5Imm1_8, |
764 | | Convert__Reg1_0__Reg1_4__Tie1__s4_0Imm1_8, |
765 | | Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8, |
766 | | Convert__Reg1_0__Reg1_4__s8Ext1_6__s8Imm1_8, |
767 | | Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__u5Imm1_8, |
768 | | Convert__Reg1_0__Reg1_4__Tie1__s3_6Imm1_8, |
769 | | Convert__Reg1_0__Reg1_7__s10Ext1_9, |
770 | | Convert__Reg1_0__Reg1_7__u9Ext1_9, |
771 | | Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, |
772 | | Convert__Reg1_0__Reg1_4__Reg1_7, |
773 | | Convert__Reg1_0__Tie0__Reg1_7, |
774 | | Convert__Reg1_0__Tie0__Reg1_5__Reg1_6__Reg1_7, |
775 | | Convert__Reg1_0__Reg1_7__s8Ext1_9, |
776 | | Convert__Reg1_0__Reg1_6__s6Imm1_9, |
777 | | Convert__Reg1_0__Reg1_4__Tie0__Reg1_8, |
778 | | Convert__Reg1_0__Reg1_6__s4_6Imm1_9, |
779 | | Convert__Reg1_0__Reg1_6__Tie1__Reg1_9, |
780 | | Convert__Reg1_0__Reg1_6__Reg1_9, |
781 | | Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, |
782 | | Convert__Reg1_0__Reg1_8__Reg1_9, |
783 | | Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, |
784 | | Convert__Reg1_0__Reg1_4__Reg1_6__u2Imm1_10, |
785 | | Convert__Reg1_0__u6Ext1_5__Reg1_8__Reg1_9, |
786 | | Convert__Reg1_0__Reg1_4__Reg1_7__s6Ext1_9, |
787 | | Convert__Reg1_0__Reg1_4__u6_2Imm1_8__Reg1_9, |
788 | | Convert__Reg1_0__Reg1_4__Reg1_7__u6Ext1_9, |
789 | | Convert__Reg1_0__Reg1_4__s6Ext1_8__Reg1_9, |
790 | | Convert__Reg1_0__Reg1_4__Tie0__s10Ext1_9, |
791 | | Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__s6Imm1_8, |
792 | | Convert__Reg1_0__Reg1_6__Tie1__s3_6Imm1_10, |
793 | | Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, |
794 | | Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, |
795 | | Convert__Reg1_0__u6Ext1_5__Reg1_8__u6Imm1_10, |
796 | | Convert__Reg1_0__u8Ext1_5__Tie0__u5Imm1_10, |
797 | | Convert__Reg1_0__Reg1_4__Tie0__Tie1__Reg1_11, |
798 | | Convert__Reg1_0__Reg1_4__Tie1__Reg1_11, |
799 | | Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, |
800 | | Convert__Reg1_0__Reg1_4__Tie1__s4_0Imm1_8__Reg1_12, |
801 | | Convert__Reg1_0__Reg1_4__Tie1__s4_2Imm1_8__Reg1_12, |
802 | | Convert__Reg1_0__Reg1_4__Tie1__s4_3Imm1_8__Reg1_12, |
803 | | Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8__Reg1_12, |
804 | | Convert__Reg1_0__Tie0__Reg1_7__Reg1_10__Reg1_13, |
805 | | Convert__Reg1_0__Reg1_6__Reg1_9__u1Imm1_13, |
806 | | Convert__Reg1_0__Tie0__Reg1_7__Reg1_10__u1Imm1_14, |
807 | | Convert__u11_3Imm1_3, |
808 | | Convert_NoOperands, |
809 | | Convert__Imm1_1, |
810 | | Convert__Reg1_1, |
811 | | Convert__Reg1_2, |
812 | | Convert__Reg1_2__imm_95_0, |
813 | | Convert__Reg1_2__u11_3Imm1_5, |
814 | | Convert__Reg1_3, |
815 | | Convert__Reg1_2__Imm1_5, |
816 | | Convert__Reg1_2__Reg1_5, |
817 | | Convert__Reg1_3__Imm1_6, |
818 | | Convert__Reg1_3__Reg1_6, |
819 | | Convert__Reg1_2__Imm1_6, |
820 | | Convert__Reg1_4__Reg1_2__Reg1_6, |
821 | | Convert__Reg1_3__Imm1_7, |
822 | | Convert__Reg1_5__Reg1_3__Reg1_7, |
823 | | Convert__Reg1_2__Imm1_7, |
824 | | Convert__Reg1_4__Reg1_2__s12Ext1_7, |
825 | | Convert__Reg1_3__Imm1_8, |
826 | | Convert__Reg1_5__Reg1_3__f32Ext1_8, |
827 | | Convert__Reg1_5__Reg1_3__s12Ext1_8, |
828 | | Convert__Reg1_6__Reg1_2__Reg1_8, |
829 | | Convert__Reg1_7__Reg1_3__Reg1_9, |
830 | | Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, |
831 | | Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, |
832 | | Convert__Reg1_4__Reg1_2__Reg1_8, |
833 | | Convert__Reg1_2__Imm1_9, |
834 | | Convert__Reg1_2__Reg1_9, |
835 | | Convert__Reg1_6__Reg1_2__s12Ext1_9, |
836 | | Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, |
837 | | Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, |
838 | | Convert__Reg1_5__Reg1_3__Reg1_9, |
839 | | Convert__Reg1_3__Imm1_10, |
840 | | Convert__Reg1_3__Reg1_10, |
841 | | Convert__Reg1_7__Reg1_3__s12Ext1_10, |
842 | | Convert__Reg1_2__u32MustExt1_7__Reg1_10, |
843 | | Convert__Reg1_2__Reg1_6__imm_95_0__s6Ext1_10, |
844 | | Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, |
845 | | Convert__Reg1_4__Reg1_2__u32MustExt1_9, |
846 | | Convert__Reg1_2__Imm1_10, |
847 | | Convert__Reg1_3__u32MustExt1_8__Reg1_11, |
848 | | Convert__Reg1_3__Reg1_7__imm_95_0__s6Ext1_11, |
849 | | Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, |
850 | | Convert__Reg1_5__Reg1_3__u32MustExt1_10, |
851 | | Convert__Reg1_3__Imm1_11, |
852 | | Convert__Reg1_4__Reg1_2__Reg1_8__s8Ext1_10, |
853 | | Convert__Reg1_2__Imm1_11, |
854 | | Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, |
855 | | Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, |
856 | | Convert__Reg1_6__Reg1_2__Reg1_10, |
857 | | Convert__Reg1_4__Reg1_2__Tie0__Reg1_9, |
858 | | Convert__Reg1_5__Reg1_3__Reg1_9__s8Ext1_11, |
859 | | Convert__Reg1_3__Imm1_12, |
860 | | Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, |
861 | | Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, |
862 | | Convert__Reg1_7__Reg1_3__Reg1_11, |
863 | | Convert__Reg1_5__Reg1_3__Tie0__Reg1_10, |
864 | | Convert__Reg1_2__u6Ext1_7__Reg1_10, |
865 | | Convert__Reg1_2__Reg1_6__u6_0Ext1_9__Reg1_12, |
866 | | Convert__Reg1_2__Reg1_6__u6_3Ext1_9__Reg1_12, |
867 | | Convert__Reg1_2__Reg1_6__u6_1Ext1_9__Reg1_12, |
868 | | Convert__Reg1_2__Reg1_6__u6_2Ext1_9__Reg1_12, |
869 | | Convert__Reg1_2__Reg1_6__s4_6Imm1_9__Reg1_12, |
870 | | Convert__Reg1_6__Reg1_2__Tie0__Reg1_9__Reg1_12, |
871 | | Convert__Reg1_4__Reg1_2__Reg1_8__u6_3Ext1_11, |
872 | | Convert__Reg1_4__Reg1_2__Reg1_8__u6_0Ext1_11, |
873 | | Convert__Reg1_4__Reg1_2__Reg1_8__u6_1Ext1_11, |
874 | | Convert__Reg1_4__Reg1_2__Reg1_8__u6_2Ext1_11, |
875 | | Convert__Reg1_2__u32MustExt1_9__Reg1_12, |
876 | | Convert__Reg1_2__Reg1_8__imm_95_0__s6Ext1_12, |
877 | | Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, |
878 | | Convert__Reg1_6__Reg1_2__u32MustExt1_11, |
879 | | Convert__Reg1_3__u6Ext1_8__Reg1_11, |
880 | | Convert__Reg1_3__Reg1_7__u6_0Ext1_10__Reg1_13, |
881 | | Convert__Reg1_3__Reg1_7__u6_3Ext1_10__Reg1_13, |
882 | | Convert__Reg1_3__Reg1_7__u6_1Ext1_10__Reg1_13, |
883 | | Convert__Reg1_3__Reg1_7__u6_2Ext1_10__Reg1_13, |
884 | | Convert__Reg1_3__Reg1_7__s4_6Imm1_10__Reg1_13, |
885 | | Convert__Reg1_7__Reg1_3__Tie0__Reg1_10__Reg1_13, |
886 | | Convert__Reg1_5__Reg1_3__Reg1_9__u6_3Ext1_12, |
887 | | Convert__Reg1_5__Reg1_3__Reg1_9__u6_0Ext1_12, |
888 | | Convert__Reg1_5__Reg1_3__Reg1_9__u6_1Ext1_12, |
889 | | Convert__Reg1_5__Reg1_3__Reg1_9__u6_2Ext1_12, |
890 | | Convert__Reg1_3__u32MustExt1_10__Reg1_13, |
891 | | Convert__Reg1_3__Reg1_9__imm_95_0__s6Ext1_13, |
892 | | Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, |
893 | | Convert__Reg1_7__Reg1_3__u32MustExt1_12, |
894 | | Convert__Reg1_2__Reg1_6__u6_0Imm1_9__s6Ext1_13, |
895 | | Convert__Reg1_6__Reg1_2__Tie0__s4_0Imm1_10__Reg1_13, |
896 | | Convert__Reg1_6__Reg1_2__Tie0__s4_3Imm1_10__Reg1_13, |
897 | | Convert__Reg1_2__Reg1_6__u6_1Imm1_9__s6Ext1_13, |
898 | | Convert__Reg1_6__Reg1_2__Tie0__s4_1Imm1_10__Reg1_13, |
899 | | Convert__Reg1_2__Reg1_6__u6_2Imm1_9__s6Ext1_13, |
900 | | Convert__Reg1_6__Reg1_2__Tie0__s4_2Imm1_10__Reg1_13, |
901 | | Convert__Reg1_6__Reg1_2__Tie0__s3_6Imm1_10__Reg1_13, |
902 | | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_3Imm1_12, |
903 | | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_0Imm1_12, |
904 | | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_1Imm1_12, |
905 | | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_2Imm1_12, |
906 | | Convert__Reg1_6__Reg1_2__Reg1_10__s8Ext1_12, |
907 | | Convert__Reg1_3__Reg1_7__u6_0Imm1_10__s6Ext1_14, |
908 | | Convert__Reg1_7__Reg1_3__Tie0__s4_0Imm1_11__Reg1_14, |
909 | | Convert__Reg1_7__Reg1_3__Tie0__s4_3Imm1_11__Reg1_14, |
910 | | Convert__Reg1_3__Reg1_7__u6_1Imm1_10__s6Ext1_14, |
911 | | Convert__Reg1_7__Reg1_3__Tie0__s4_1Imm1_11__Reg1_14, |
912 | | Convert__Reg1_3__Reg1_7__u6_2Imm1_10__s6Ext1_14, |
913 | | Convert__Reg1_7__Reg1_3__Tie0__s4_2Imm1_11__Reg1_14, |
914 | | Convert__Reg1_7__Reg1_3__Tie0__s3_6Imm1_11__Reg1_14, |
915 | | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_3Imm1_13, |
916 | | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_0Imm1_13, |
917 | | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_1Imm1_13, |
918 | | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_2Imm1_13, |
919 | | Convert__Reg1_7__Reg1_3__Reg1_11__s8Ext1_13, |
920 | | Convert__Reg1_4__Imm1_14, |
921 | | Convert__Reg1_2__Reg1_6__s4_6Imm1_9__Reg1_14, |
922 | | Convert__Reg1_6__Reg1_2__Tie0__Reg1_9__Reg1_14, |
923 | | Convert__Reg1_2__u6Ext1_9__Reg1_12, |
924 | | Convert__Reg1_2__Reg1_8__u6_0Ext1_11__Reg1_14, |
925 | | Convert__Reg1_2__Reg1_8__u6_3Ext1_11__Reg1_14, |
926 | | Convert__Reg1_2__Reg1_8__u6_1Ext1_11__Reg1_14, |
927 | | Convert__Reg1_2__Reg1_8__u6_2Ext1_11__Reg1_14, |
928 | | Convert__Reg1_6__Reg1_2__Reg1_10__u6_3Ext1_13, |
929 | | Convert__Reg1_6__Reg1_2__Reg1_10__u6_0Ext1_13, |
930 | | Convert__Reg1_6__Reg1_2__Reg1_10__u6_1Ext1_13, |
931 | | Convert__Reg1_6__Reg1_2__Reg1_10__u6_2Ext1_13, |
932 | | Convert__Reg1_5__Imm1_15, |
933 | | Convert__Reg1_3__Reg1_7__s4_6Imm1_10__Reg1_15, |
934 | | Convert__Reg1_7__Reg1_3__Tie0__Reg1_10__Reg1_15, |
935 | | Convert__Reg1_3__u6Ext1_10__Reg1_13, |
936 | | Convert__Reg1_3__Reg1_9__u6_0Ext1_12__Reg1_15, |
937 | | Convert__Reg1_3__Reg1_9__u6_3Ext1_12__Reg1_15, |
938 | | Convert__Reg1_3__Reg1_9__u6_1Ext1_12__Reg1_15, |
939 | | Convert__Reg1_3__Reg1_9__u6_2Ext1_12__Reg1_15, |
940 | | Convert__Reg1_7__Reg1_3__Reg1_11__u6_3Ext1_14, |
941 | | Convert__Reg1_7__Reg1_3__Reg1_11__u6_0Ext1_14, |
942 | | Convert__Reg1_7__Reg1_3__Reg1_11__u6_1Ext1_14, |
943 | | Convert__Reg1_7__Reg1_3__Reg1_11__u6_2Ext1_14, |
944 | | Convert__Reg1_6__Reg1_9__Imm1_15, |
945 | | Convert__Reg1_6__Reg1_7__Imm1_15, |
946 | | Convert__Reg1_2__Reg1_6__Reg1_8__u2Imm1_12__Reg1_15, |
947 | | Convert__Reg1_6__Reg1_2__Tie0__s3_6Imm1_10__Reg1_15, |
948 | | Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14, |
949 | | Convert__Reg1_2__Reg1_8__u6_0Imm1_11__s6Ext1_15, |
950 | | Convert__Reg1_8__Reg1_2__Tie0__s4_0Imm1_12__Reg1_15, |
951 | | Convert__Reg1_8__Reg1_2__Tie0__s4_3Imm1_12__Reg1_15, |
952 | | Convert__Reg1_2__Reg1_8__u6_1Imm1_11__s6Ext1_15, |
953 | | Convert__Reg1_8__Reg1_2__Tie0__s4_1Imm1_12__Reg1_15, |
954 | | Convert__Reg1_2__Reg1_8__u6_2Imm1_11__s6Ext1_15, |
955 | | Convert__Reg1_8__Reg1_2__Tie0__s4_2Imm1_12__Reg1_15, |
956 | | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_3Imm1_14, |
957 | | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_0Imm1_14, |
958 | | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_1Imm1_14, |
959 | | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_2Imm1_14, |
960 | | Convert__Reg1_7__Reg1_10__Imm1_16, |
961 | | Convert__Reg1_7__Reg1_8__Imm1_16, |
962 | | Convert__Reg1_3__Reg1_7__Reg1_9__u2Imm1_13__Reg1_16, |
963 | | Convert__Reg1_7__Reg1_3__Tie0__s3_6Imm1_11__Reg1_16, |
964 | | Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15, |
965 | | Convert__Reg1_3__Reg1_9__u6_0Imm1_12__s6Ext1_16, |
966 | | Convert__Reg1_9__Reg1_3__Tie0__s4_0Imm1_13__Reg1_16, |
967 | | Convert__Reg1_9__Reg1_3__Tie0__s4_3Imm1_13__Reg1_16, |
968 | | Convert__Reg1_3__Reg1_9__u6_1Imm1_12__s6Ext1_16, |
969 | | Convert__Reg1_9__Reg1_3__Tie0__s4_1Imm1_13__Reg1_16, |
970 | | Convert__Reg1_3__Reg1_9__u6_2Imm1_12__s6Ext1_16, |
971 | | Convert__Reg1_9__Reg1_3__Tie0__s4_2Imm1_13__Reg1_16, |
972 | | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_3Imm1_15, |
973 | | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_0Imm1_15, |
974 | | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_1Imm1_15, |
975 | | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_2Imm1_15, |
976 | | Convert__Reg1_6__Imm1_16, |
977 | | Convert__Reg1_6__u5Imm1_10__Imm1_16, |
978 | | Convert__Reg1_7__Imm1_17, |
979 | | Convert__Reg1_7__u5Imm1_11__Imm1_17, |
980 | | Convert__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14__Reg1_17, |
981 | | Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2Imm1_16, |
982 | | Convert__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15__Reg1_18, |
983 | | Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2Imm1_17, |
984 | | Convert__Imm1_2, |
985 | | Convert__Imm1_3, |
986 | | Convert__Reg1_2__Reg1_3, |
987 | | Convert__Imm1_2__Reg1_3, |
988 | | Convert__Imm1_2__u10Imm1_4, |
989 | | Convert__regC6__Reg1_2, |
990 | | Convert__regC7__Reg1_2, |
991 | | Convert__Reg1_2__imm_95_0__Reg1_5, |
992 | | Convert__u16_0Imm1_3__Reg1_6, |
993 | | Convert__u32MustExt1_3__Reg1_6, |
994 | | Convert__Reg1_2__imm_95_0__Reg1_6, |
995 | | Convert__Reg1_2__imm_95_0__s8Ext1_6, |
996 | | Convert__Reg1_2__imm_95_0__u5Imm1_7, |
997 | | Convert__u32Imm1_3__Reg1_6, |
998 | | Convert__u16_0Imm1_5__Reg1_8, |
999 | | Convert__Reg1_2__s11_0Ext1_5__Reg1_8, |
1000 | | Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, |
1001 | | Convert__Reg1_2__u6Ext1_5__Reg1_8, |
1002 | | Convert__u32Imm1_4__Reg1_7, |
1003 | | Convert__Reg1_2__imm_95_0__u5Imm1_8, |
1004 | | Convert__Reg1_2__u6_0Ext1_5__Reg1_9, |
1005 | | Convert__Reg1_2__u6_0Imm1_5__s8Ext1_9, |
1006 | | Convert__Reg1_2__Tie0__s4_0Imm1_6__Reg1_9, |
1007 | | Convert__Reg1_2__u6_0Ext1_5__u5Imm1_10, |
1008 | | Convert__Reg1_2__Tie0__Reg1_5__Reg1_10, |
1009 | | Convert__Reg1_2__Reg1_4__u2Imm1_8__Reg1_11, |
1010 | | Convert__Reg1_2__u6_0Ext1_5__u5Imm1_11, |
1011 | | Convert__Reg1_2__u2Imm1_6__u6Ext1_9__Reg1_12, |
1012 | | Convert__Reg1_2__Tie0__Reg1_9__Reg1_13, |
1013 | | Convert__Reg1_2__Tie0__s4_0Imm1_6__Reg1_10__Reg1_14, |
1014 | | Convert__u16_3Imm1_3__Reg1_6, |
1015 | | Convert__u16_3Imm1_5__Reg1_8, |
1016 | | Convert__Reg1_2__s11_3Ext1_5__Reg1_8, |
1017 | | Convert__Reg1_2__Tie0__s4_3Imm1_6__Reg1_9, |
1018 | | Convert__Reg1_2__Tie0__s4_3Imm1_6__Reg1_10__Reg1_14, |
1019 | | Convert__Reg1_3__Reg1_2__Reg1_6, |
1020 | | Convert__u16_1Imm1_3__Reg1_6, |
1021 | | Convert__u16_1Imm1_5__Reg1_8, |
1022 | | Convert__Reg1_2__s11_1Ext1_5__Reg1_8, |
1023 | | Convert__Reg1_2__u6_1Ext1_5__Reg1_9, |
1024 | | Convert__Reg1_2__u6_1Imm1_5__s8Ext1_9, |
1025 | | Convert__Reg1_2__Tie0__s4_1Imm1_6__Reg1_9, |
1026 | | Convert__Reg1_2__u6_1Ext1_5__u5Imm1_10, |
1027 | | Convert__Reg1_2__u6_1Ext1_5__u5Imm1_11, |
1028 | | Convert__Reg1_2__Tie0__s4_1Imm1_6__Reg1_10__Reg1_14, |
1029 | | Convert__u16_2Imm1_3__Reg1_6, |
1030 | | Convert__u16_2Imm1_5__Reg1_8, |
1031 | | Convert__Reg1_2__s11_2Ext1_5__Reg1_8, |
1032 | | Convert__Reg1_2__u6_2Ext1_5__Reg1_9, |
1033 | | Convert__Reg1_2__u6_2Imm1_5__s8Ext1_9, |
1034 | | Convert__Reg1_2__Tie0__s4_2Imm1_6__Reg1_9, |
1035 | | Convert__Reg1_2__u6_2Ext1_5__u5Imm1_10, |
1036 | | Convert__Reg1_2__u6_2Ext1_5__u5Imm1_11, |
1037 | | Convert__Reg1_2__Tie0__s4_2Imm1_6__Reg1_10__Reg1_14, |
1038 | | Convert__Reg1_4__Imm1_18, |
1039 | | Convert__Reg1_6__Reg1_7__Imm1_19, |
1040 | | Convert__Reg1_4__Imm1_19, |
1041 | | Convert__Reg1_6__Imm1_20, |
1042 | | Convert__Reg1_6__u5Imm1_8__Imm1_20, |
1043 | | Convert__Reg1_6__Reg1_7__Imm1_20, |
1044 | | Convert__Reg1_6__Imm1_21, |
1045 | | Convert__Reg1_6__u5Imm1_8__Imm1_21, |
1046 | | Convert__Imm1_4__Reg1_5, |
1047 | | Convert__Imm1_4__u10Imm1_6, |
1048 | | Convert__Reg1_2__Reg1_3__Tie0__Tie1__Reg1_4, |
1049 | | Convert__Reg1_2__s4_6Imm1_5__Reg1_8, |
1050 | | Convert__Reg1_2__Tie0__s3_6Imm1_6__Reg1_9, |
1051 | | Convert__Reg1_2__s4_6Imm1_5__Reg1_10, |
1052 | | Convert__Reg1_2__Tie0__s3_6Imm1_6__Reg1_11, |
1053 | | Convert__Reg1_2__Imm1_5__Reg1_8, |
1054 | | CVT_NUM_SIGNATURES |
1055 | | }; |
1056 | | |
1057 | | } // end anonymous namespace |
1058 | | |
1059 | | static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][11] = { |
1060 | | // Convert__Reg1_0__Reg1_2__Reg1_2 |
1061 | | { CVT_95_Reg, 0, CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_Done }, |
1062 | | // Convert__Reg1_0__Reg1_2 |
1063 | | { CVT_95_Reg, 0, CVT_95_Reg, 2, CVT_Done }, |
1064 | | // Convert__Reg1_0__regC6 |
1065 | | { CVT_95_Reg, 0, CVT_regC6, 0, CVT_Done }, |
1066 | | // Convert__Reg1_0__regC7 |
1067 | | { CVT_95_Reg, 0, CVT_regC7, 0, CVT_Done }, |
1068 | | // Convert__Reg1_0__s8Imm641_3 |
1069 | | { CVT_95_Reg, 0, CVT_95_adds8Imm64Operands, 3, CVT_Done }, |
1070 | | // Convert__Reg1_0__u64Imm1_3 |
1071 | | { CVT_95_Reg, 0, CVT_95_addu64ImmOperands, 3, CVT_Done }, |
1072 | | // Convert__Reg1_0__s16Ext1_3 |
1073 | | { CVT_95_Reg, 0, CVT_95_adds16ExtOperands, 3, CVT_Done }, |
1074 | | // Convert__Reg1_0__Reg1_4 |
1075 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Done }, |
1076 | | // Convert__Reg1_0__Tie0__Reg1_4__imm_95_0 |
1077 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done }, |
1078 | | // Convert__Reg1_0__Reg1_4__imm_95_0 |
1079 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done }, |
1080 | | // Convert__Reg1_0__Tie0__u16Imm1_5 |
1081 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_addu16ImmOperands, 5, CVT_Done }, |
1082 | | // Convert__Reg1_0__imm_95_0__Reg1_4 |
1083 | | { CVT_95_Reg, 0, CVT_imm_95_0, 0, CVT_95_Reg, 4, CVT_Done }, |
1084 | | // Convert__Reg1_0__Reg1_2__Imm1_5 |
1085 | | { CVT_95_Reg, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_Done }, |
1086 | | // Convert__Reg1_0__Reg1_4__Reg1_5 |
1087 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done }, |
1088 | | // Convert__Reg1_0__Imm1_5 |
1089 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
1090 | | // Convert__Reg1_0__Tie0__Reg1_4__Reg1_5 |
1091 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done }, |
1092 | | // Convert__Reg1_0__u16_3Imm1_5 |
1093 | | { CVT_95_Reg, 0, CVT_95_addu16_95_3ImmOperands, 5, CVT_Done }, |
1094 | | // Convert__Reg1_0__u32MustExt1_5 |
1095 | | { CVT_95_Reg, 0, CVT_95_addu32MustExtOperands, 5, CVT_Done }, |
1096 | | // Convert__Reg1_0__u6Imm1_3__Imm1_6 |
1097 | | { CVT_95_Reg, 0, CVT_95_addu6ImmOperands, 3, CVT_95_addImmOperands, 6, CVT_Done }, |
1098 | | // Convert__Reg1_0__u16_0Imm1_5 |
1099 | | { CVT_95_Reg, 0, CVT_95_addu16_95_0ImmOperands, 5, CVT_Done }, |
1100 | | // Convert__Reg1_0__u16_1Imm1_5 |
1101 | | { CVT_95_Reg, 0, CVT_95_addu16_95_1ImmOperands, 5, CVT_Done }, |
1102 | | // Convert__Reg1_0__u16_2Imm1_5 |
1103 | | { CVT_95_Reg, 0, CVT_95_addu16_95_2ImmOperands, 5, CVT_Done }, |
1104 | | // Convert__Reg1_0__Reg1_1__Reg1_5 |
1105 | | { CVT_95_Reg, 0, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_Done }, |
1106 | | // Convert__Reg1_0__Reg1_5__Reg1_6 |
1107 | | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
1108 | | // Convert__Reg1_0__Reg1_4__Reg1_6 |
1109 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_Done }, |
1110 | | // Convert__Reg1_0__Reg1_4__u6Imm1_6 |
1111 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addu6ImmOperands, 6, CVT_Done }, |
1112 | | // Convert__Reg1_0__Reg1_4__u5Imm1_6 |
1113 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addu5ImmOperands, 6, CVT_Done }, |
1114 | | // Convert__Reg1_0__Tie0__Reg1_5__Reg1_6 |
1115 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
1116 | | // Convert__Reg1_0__s8Ext1_5__Reg1_6 |
1117 | | { CVT_95_Reg, 0, CVT_95_adds8ExtOperands, 5, CVT_95_Reg, 6, CVT_Done }, |
1118 | | // Convert__Reg1_0__Reg1_4__s8Ext1_6 |
1119 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds8ExtOperands, 6, CVT_Done }, |
1120 | | // Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6 |
1121 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
1122 | | // Convert__Reg1_0__Reg1_4__u4Imm1_6 |
1123 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addu4ImmOperands, 6, CVT_Done }, |
1124 | | // Convert__Reg1_0__Reg1_1__Tie0__Reg1_5__Reg1_6 |
1125 | | { CVT_95_Reg, 0, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
1126 | | // Convert__Reg1_0__u6Ext1_6 |
1127 | | { CVT_95_Reg, 0, CVT_95_addu6ExtOperands, 6, CVT_Done }, |
1128 | | // Convert__Reg1_0__Reg1_4__s16Ext1_6 |
1129 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds16ExtOperands, 6, CVT_Done }, |
1130 | | // Convert__Reg1_0__Reg1_4__s10Ext1_6 |
1131 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds10ExtOperands, 6, CVT_Done }, |
1132 | | // Convert__Reg1_0__s6Imm1_5__Reg1_6 |
1133 | | { CVT_95_Reg, 0, CVT_95_adds6ImmOperands, 5, CVT_95_Reg, 6, CVT_Done }, |
1134 | | // Convert__Reg1_0__Reg1_4__s9Ext1_6 |
1135 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds9ExtOperands, 6, CVT_Done }, |
1136 | | // Convert__Reg1_0__s10Ext1_5__Reg1_6 |
1137 | | { CVT_95_Reg, 0, CVT_95_adds10ExtOperands, 5, CVT_95_Reg, 6, CVT_Done }, |
1138 | | // Convert__Reg1_0__Reg1_1__Reg1_5__Reg1_6 |
1139 | | { CVT_95_Reg, 0, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
1140 | | // Convert__Reg1_0__Tie0__Reg1_6 |
1141 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 6, CVT_Done }, |
1142 | | // Convert__Reg1_0__Reg1_5__u6Imm1_7 |
1143 | | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addu6ImmOperands, 7, CVT_Done }, |
1144 | | // Convert__Reg1_0__Reg1_5__u5Imm1_7 |
1145 | | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addu5ImmOperands, 7, CVT_Done }, |
1146 | | // Convert__Reg1_0__Reg1_6__Reg1_7 |
1147 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done }, |
1148 | | // Convert__Reg1_0__Reg1_7__Reg1_6 |
1149 | | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_Reg, 6, CVT_Done }, |
1150 | | // Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7 |
1151 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addu6ImmOperands, 7, CVT_Done }, |
1152 | | // Convert__Reg1_0__s8Ext1_5__s8Imm1_7 |
1153 | | { CVT_95_Reg, 0, CVT_95_adds8ExtOperands, 5, CVT_95_adds8ImmOperands, 7, CVT_Done }, |
1154 | | // Convert__Reg1_0__s8Imm1_5__u6Ext1_7 |
1155 | | { CVT_95_Reg, 0, CVT_95_adds8ImmOperands, 5, CVT_95_addu6ExtOperands, 7, CVT_Done }, |
1156 | | // Convert__Reg1_0__u10Imm1_5 |
1157 | | { CVT_95_Reg, 0, CVT_95_addu10ImmOperands, 5, CVT_Done }, |
1158 | | // Convert__Reg1_0__Tie0__Reg1_4__s11_0Ext1_7 |
1159 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_adds11_95_0ExtOperands, 7, CVT_Done }, |
1160 | | // Convert__Reg1_0__Reg1_4__Tie0__Tie1__Reg1_7 |
1161 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_Reg, 7, CVT_Done }, |
1162 | | // Convert__Reg1_0__Reg1_4__u6Ext1_7 |
1163 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addu6ExtOperands, 7, CVT_Done }, |
1164 | | // Convert__Reg1_0__Reg1_4__s11_2Ext1_7 |
1165 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds11_95_2ExtOperands, 7, CVT_Done }, |
1166 | | // Convert__Reg1_0__Reg1_4__Tie1__Reg1_7 |
1167 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 1, CVT_95_Reg, 7, CVT_Done }, |
1168 | | // Convert__Reg1_0__u16_3Imm1_7 |
1169 | | { CVT_95_Reg, 0, CVT_95_addu16_95_3ImmOperands, 7, CVT_Done }, |
1170 | | // Convert__Reg1_0__Reg1_4__s11_3Ext1_7 |
1171 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds11_95_3ExtOperands, 7, CVT_Done }, |
1172 | | // Convert__Reg1_0__Tie0__Reg1_4__s11_1Ext1_7 |
1173 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_adds11_95_1ExtOperands, 7, CVT_Done }, |
1174 | | // Convert__Reg1_0__Reg1_4__Reg1_5__u3Imm1_7 |
1175 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addu3ImmOperands, 7, CVT_Done }, |
1176 | | // Convert__Reg1_0__Reg1_4__Reg1_5__u2Imm1_7 |
1177 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addu2ImmOperands, 7, CVT_Done }, |
1178 | | // Convert__Reg1_0__Reg1_4__Imm1_7 |
1179 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 7, CVT_Done }, |
1180 | | // Convert__Reg1_0__Reg1_4__s4_6Imm1_7 |
1181 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds4_95_6ImmOperands, 7, CVT_Done }, |
1182 | | // Convert__Reg1_0__Tie0__Reg1_5__Reg1_7 |
1183 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_Done }, |
1184 | | // Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7 |
1185 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addu5ImmOperands, 7, CVT_Done }, |
1186 | | // Convert__Reg1_0__Tie0__Reg1_5__s8Ext1_7 |
1187 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_adds8ExtOperands, 7, CVT_Done }, |
1188 | | // Convert__Reg1_0__Tie0__Reg1_5__u8Ext1_7 |
1189 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addu8ExtOperands, 7, CVT_Done }, |
1190 | | // Convert__Reg1_0__Imm1_7 |
1191 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 7, CVT_Done }, |
1192 | | // Convert__Reg1_0__Reg1_5__u8Ext1_7 |
1193 | | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addu8ExtOperands, 7, CVT_Done }, |
1194 | | // Convert__Reg1_0__Reg1_5__u8Imm1_7 |
1195 | | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addu8ImmOperands, 7, CVT_Done }, |
1196 | | // Convert__Reg1_0__u16_0Imm1_7 |
1197 | | { CVT_95_Reg, 0, CVT_95_addu16_95_0ImmOperands, 7, CVT_Done }, |
1198 | | // Convert__Reg1_0__Reg1_4__s11_0Ext1_7 |
1199 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds11_95_0ExtOperands, 7, CVT_Done }, |
1200 | | // Convert__Reg1_0__Reg1_4__s11_1Ext1_7 |
1201 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds11_95_1ExtOperands, 7, CVT_Done }, |
1202 | | // Convert__Reg1_0__u16_1Imm1_7 |
1203 | | { CVT_95_Reg, 0, CVT_95_addu16_95_1ImmOperands, 7, CVT_Done }, |
1204 | | // Convert__Reg1_0__u16_2Imm1_7 |
1205 | | { CVT_95_Reg, 0, CVT_95_addu16_95_2ImmOperands, 7, CVT_Done }, |
1206 | | // Convert__Reg1_0__Reg1_4__f32Ext1_6__Reg1_7 |
1207 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addf32ExtOperands, 6, CVT_95_Reg, 7, CVT_Done }, |
1208 | | // Convert__Reg1_0__Reg1_4__s8Ext1_6__Reg1_7 |
1209 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds8ExtOperands, 6, CVT_95_Reg, 7, CVT_Done }, |
1210 | | // Convert__Reg1_0__Reg1_4__Reg1_5__f32Ext1_7 |
1211 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addf32ExtOperands, 7, CVT_Done }, |
1212 | | // Convert__Reg1_0__Reg1_4__Reg1_5__s8Ext1_7 |
1213 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_adds8ExtOperands, 7, CVT_Done }, |
1214 | | // Convert__Reg1_0__Tie0__Reg1_5__s10Ext1_7 |
1215 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_adds10ExtOperands, 7, CVT_Done }, |
1216 | | // Convert__Reg1_0__Reg1_7__Reg1_8 |
1217 | | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_Done }, |
1218 | | // Convert__Reg1_0__Reg1_6__s10Ext1_8 |
1219 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_adds10ExtOperands, 8, CVT_Done }, |
1220 | | // Convert__Reg1_0__Reg1_6__s8Ext1_8 |
1221 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_adds8ExtOperands, 8, CVT_Done }, |
1222 | | // Convert__Reg1_0__Reg1_6__u8Ext1_8 |
1223 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addu8ExtOperands, 8, CVT_Done }, |
1224 | | // Convert__Reg1_0__Reg1_6__u9Ext1_8 |
1225 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addu9ExtOperands, 8, CVT_Done }, |
1226 | | // Convert__Reg1_0__Reg1_6__u8Imm1_8 |
1227 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addu8ImmOperands, 8, CVT_Done }, |
1228 | | // Convert__Reg1_0__Reg1_6__s8Imm1_8 |
1229 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_adds8ImmOperands, 8, CVT_Done }, |
1230 | | // Convert__Reg1_0__Reg1_6__u7Ext1_8 |
1231 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addu7ExtOperands, 8, CVT_Done }, |
1232 | | // Convert__Reg1_0__Reg1_6__u7Imm1_8 |
1233 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addu7ImmOperands, 8, CVT_Done }, |
1234 | | // Convert__Reg1_0__Tie0__Reg1_5__Reg1_6__u2Imm1_8 |
1235 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addu2ImmOperands, 8, CVT_Done }, |
1236 | | // Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1 |
1237 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Tied, 1, CVT_Done }, |
1238 | | // Convert__Reg1_0__s8Ext1_6__s8Imm1_8 |
1239 | | { CVT_95_Reg, 0, CVT_95_adds8ExtOperands, 6, CVT_95_adds8ImmOperands, 8, CVT_Done }, |
1240 | | // Convert__Reg1_0__Reg1_4__u6Imm1_6__u6Imm1_8 |
1241 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addu6ImmOperands, 6, CVT_95_addu6ImmOperands, 8, CVT_Done }, |
1242 | | // Convert__Reg1_0__Tie0__Reg1_4__u6Imm1_6__u6Imm1_8 |
1243 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addu6ImmOperands, 6, CVT_95_addu6ImmOperands, 8, CVT_Done }, |
1244 | | // Convert__Reg1_0__Reg1_4__Tie0__Tie1__s4_0Imm1_8 |
1245 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_adds4_95_0ImmOperands, 8, CVT_Done }, |
1246 | | // Convert__Reg1_0__Reg1_4__Tie1__s4_2Imm1_8 |
1247 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 1, CVT_95_adds4_95_2ImmOperands, 8, CVT_Done }, |
1248 | | // Convert__Reg1_0__Reg1_4__Tie1__s4_3Imm1_8 |
1249 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 1, CVT_95_adds4_95_3ImmOperands, 8, CVT_Done }, |
1250 | | // Convert__Reg1_0__Reg1_4__Tie0__Tie1__s4_1Imm1_8 |
1251 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_adds4_95_1ImmOperands, 8, CVT_Done }, |
1252 | | // Convert__Reg1_0__Reg1_6 |
1253 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_Done }, |
1254 | | // Convert__Reg1_0__Reg1_4__u5Imm1_6__u5Imm1_8 |
1255 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addu5ImmOperands, 6, CVT_95_addu5ImmOperands, 8, CVT_Done }, |
1256 | | // Convert__Reg1_0__Tie0__Reg1_4__u5Imm1_6__u5Imm1_8 |
1257 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addu5ImmOperands, 6, CVT_95_addu5ImmOperands, 8, CVT_Done }, |
1258 | | // Convert__Reg1_0__Reg1_4__Tie1__s4_0Imm1_8 |
1259 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 1, CVT_95_adds4_95_0ImmOperands, 8, CVT_Done }, |
1260 | | // Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8 |
1261 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 1, CVT_95_adds4_95_1ImmOperands, 8, CVT_Done }, |
1262 | | // Convert__Reg1_0__Reg1_4__s8Ext1_6__s8Imm1_8 |
1263 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds8ExtOperands, 6, CVT_95_adds8ImmOperands, 8, CVT_Done }, |
1264 | | // Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__u5Imm1_8 |
1265 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addu4ImmOperands, 6, CVT_95_addu5ImmOperands, 8, CVT_Done }, |
1266 | | // Convert__Reg1_0__Reg1_4__Tie1__s3_6Imm1_8 |
1267 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 1, CVT_95_adds3_95_6ImmOperands, 8, CVT_Done }, |
1268 | | // Convert__Reg1_0__Reg1_7__s10Ext1_9 |
1269 | | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_adds10ExtOperands, 9, CVT_Done }, |
1270 | | // Convert__Reg1_0__Reg1_7__u9Ext1_9 |
1271 | | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_addu9ExtOperands, 9, CVT_Done }, |
1272 | | // Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8 |
1273 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_Done }, |
1274 | | // Convert__Reg1_0__Reg1_4__Reg1_7 |
1275 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_Done }, |
1276 | | // Convert__Reg1_0__Tie0__Reg1_7 |
1277 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 7, CVT_Done }, |
1278 | | // Convert__Reg1_0__Tie0__Reg1_5__Reg1_6__Reg1_7 |
1279 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done }, |
1280 | | // Convert__Reg1_0__Reg1_7__s8Ext1_9 |
1281 | | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_adds8ExtOperands, 9, CVT_Done }, |
1282 | | // Convert__Reg1_0__Reg1_6__s6Imm1_9 |
1283 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_adds6ImmOperands, 9, CVT_Done }, |
1284 | | // Convert__Reg1_0__Reg1_4__Tie0__Reg1_8 |
1285 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 8, CVT_Done }, |
1286 | | // Convert__Reg1_0__Reg1_6__s4_6Imm1_9 |
1287 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_adds4_95_6ImmOperands, 9, CVT_Done }, |
1288 | | // Convert__Reg1_0__Reg1_6__Tie1__Reg1_9 |
1289 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_Tied, 1, CVT_95_Reg, 9, CVT_Done }, |
1290 | | // Convert__Reg1_0__Reg1_6__Reg1_9 |
1291 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_Done }, |
1292 | | // Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9 |
1293 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_Reg, 9, CVT_Done }, |
1294 | | // Convert__Reg1_0__Reg1_8__Reg1_9 |
1295 | | { CVT_95_Reg, 0, CVT_95_Reg, 8, CVT_95_Reg, 9, CVT_Done }, |
1296 | | // Convert__Reg1_0__Tie0__Reg1_5__Reg1_8 |
1297 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 8, CVT_Done }, |
1298 | | // Convert__Reg1_0__Reg1_4__Reg1_6__u2Imm1_10 |
1299 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addu2ImmOperands, 10, CVT_Done }, |
1300 | | // Convert__Reg1_0__u6Ext1_5__Reg1_8__Reg1_9 |
1301 | | { CVT_95_Reg, 0, CVT_95_addu6ExtOperands, 5, CVT_95_Reg, 8, CVT_95_Reg, 9, CVT_Done }, |
1302 | | // Convert__Reg1_0__Reg1_4__Reg1_7__s6Ext1_9 |
1303 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_adds6ExtOperands, 9, CVT_Done }, |
1304 | | // Convert__Reg1_0__Reg1_4__u6_2Imm1_8__Reg1_9 |
1305 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addu6_95_2ImmOperands, 8, CVT_95_Reg, 9, CVT_Done }, |
1306 | | // Convert__Reg1_0__Reg1_4__Reg1_7__u6Ext1_9 |
1307 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_addu6ExtOperands, 9, CVT_Done }, |
1308 | | // Convert__Reg1_0__Reg1_4__s6Ext1_8__Reg1_9 |
1309 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_adds6ExtOperands, 8, CVT_95_Reg, 9, CVT_Done }, |
1310 | | // Convert__Reg1_0__Reg1_4__Tie0__s10Ext1_9 |
1311 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_adds10ExtOperands, 9, CVT_Done }, |
1312 | | // Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__s6Imm1_8 |
1313 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addu4ImmOperands, 6, CVT_95_adds6ImmOperands, 8, CVT_Done }, |
1314 | | // Convert__Reg1_0__Reg1_6__Tie1__s3_6Imm1_10 |
1315 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_Tied, 1, CVT_95_adds3_95_6ImmOperands, 10, CVT_Done }, |
1316 | | // Convert__Reg1_0__Tie0__Reg1_7__Reg1_10 |
1317 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_Done }, |
1318 | | // Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11 |
1319 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addu2ImmOperands, 8, CVT_95_addu6ExtOperands, 11, CVT_Done }, |
1320 | | // Convert__Reg1_0__u6Ext1_5__Reg1_8__u6Imm1_10 |
1321 | | { CVT_95_Reg, 0, CVT_95_addu6ExtOperands, 5, CVT_95_Reg, 8, CVT_95_addu6ImmOperands, 10, CVT_Done }, |
1322 | | // Convert__Reg1_0__u8Ext1_5__Tie0__u5Imm1_10 |
1323 | | { CVT_95_Reg, 0, CVT_95_addu8ExtOperands, 5, CVT_Tied, 0, CVT_95_addu5ImmOperands, 10, CVT_Done }, |
1324 | | // Convert__Reg1_0__Reg1_4__Tie0__Tie1__Reg1_11 |
1325 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_Reg, 11, CVT_Done }, |
1326 | | // Convert__Reg1_0__Reg1_4__Tie1__Reg1_11 |
1327 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 1, CVT_95_Reg, 11, CVT_Done }, |
1328 | | // Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12 |
1329 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_Reg, 12, CVT_Done }, |
1330 | | // Convert__Reg1_0__Reg1_4__Tie1__s4_0Imm1_8__Reg1_12 |
1331 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 1, CVT_95_adds4_95_0ImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
1332 | | // Convert__Reg1_0__Reg1_4__Tie1__s4_2Imm1_8__Reg1_12 |
1333 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 1, CVT_95_adds4_95_2ImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
1334 | | // Convert__Reg1_0__Reg1_4__Tie1__s4_3Imm1_8__Reg1_12 |
1335 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 1, CVT_95_adds4_95_3ImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
1336 | | // Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8__Reg1_12 |
1337 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, 1, CVT_95_adds4_95_1ImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
1338 | | // Convert__Reg1_0__Tie0__Reg1_7__Reg1_10__Reg1_13 |
1339 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_Reg, 13, CVT_Done }, |
1340 | | // Convert__Reg1_0__Reg1_6__Reg1_9__u1Imm1_13 |
1341 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_addu1ImmOperands, 13, CVT_Done }, |
1342 | | // Convert__Reg1_0__Tie0__Reg1_7__Reg1_10__u1Imm1_14 |
1343 | | { CVT_95_Reg, 0, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_addu1ImmOperands, 14, CVT_Done }, |
1344 | | // Convert__u11_3Imm1_3 |
1345 | | { CVT_95_addu11_95_3ImmOperands, 3, CVT_Done }, |
1346 | | // Convert_NoOperands |
1347 | | { CVT_Done }, |
1348 | | // Convert__Imm1_1 |
1349 | | { CVT_95_addImmOperands, 1, CVT_Done }, |
1350 | | // Convert__Reg1_1 |
1351 | | { CVT_95_Reg, 1, CVT_Done }, |
1352 | | // Convert__Reg1_2 |
1353 | | { CVT_95_Reg, 2, CVT_Done }, |
1354 | | // Convert__Reg1_2__imm_95_0 |
1355 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done }, |
1356 | | // Convert__Reg1_2__u11_3Imm1_5 |
1357 | | { CVT_95_Reg, 2, CVT_95_addu11_95_3ImmOperands, 5, CVT_Done }, |
1358 | | // Convert__Reg1_3 |
1359 | | { CVT_95_Reg, 3, CVT_Done }, |
1360 | | // Convert__Reg1_2__Imm1_5 |
1361 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_Done }, |
1362 | | // Convert__Reg1_2__Reg1_5 |
1363 | | { CVT_95_Reg, 2, CVT_95_Reg, 5, CVT_Done }, |
1364 | | // Convert__Reg1_3__Imm1_6 |
1365 | | { CVT_95_Reg, 3, CVT_95_addImmOperands, 6, CVT_Done }, |
1366 | | // Convert__Reg1_3__Reg1_6 |
1367 | | { CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_Done }, |
1368 | | // Convert__Reg1_2__Imm1_6 |
1369 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 6, CVT_Done }, |
1370 | | // Convert__Reg1_4__Reg1_2__Reg1_6 |
1371 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_Done }, |
1372 | | // Convert__Reg1_3__Imm1_7 |
1373 | | { CVT_95_Reg, 3, CVT_95_addImmOperands, 7, CVT_Done }, |
1374 | | // Convert__Reg1_5__Reg1_3__Reg1_7 |
1375 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_Done }, |
1376 | | // Convert__Reg1_2__Imm1_7 |
1377 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 7, CVT_Done }, |
1378 | | // Convert__Reg1_4__Reg1_2__s12Ext1_7 |
1379 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_adds12ExtOperands, 7, CVT_Done }, |
1380 | | // Convert__Reg1_3__Imm1_8 |
1381 | | { CVT_95_Reg, 3, CVT_95_addImmOperands, 8, CVT_Done }, |
1382 | | // Convert__Reg1_5__Reg1_3__f32Ext1_8 |
1383 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_addf32ExtOperands, 8, CVT_Done }, |
1384 | | // Convert__Reg1_5__Reg1_3__s12Ext1_8 |
1385 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_adds12ExtOperands, 8, CVT_Done }, |
1386 | | // Convert__Reg1_6__Reg1_2__Reg1_8 |
1387 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_Done }, |
1388 | | // Convert__Reg1_7__Reg1_3__Reg1_9 |
1389 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_Done }, |
1390 | | // Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9 |
1391 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_imm_95_0, 0, CVT_95_Reg, 9, CVT_Done }, |
1392 | | // Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0 |
1393 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_Done }, |
1394 | | // Convert__Reg1_4__Reg1_2__Reg1_8 |
1395 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_Done }, |
1396 | | // Convert__Reg1_2__Imm1_9 |
1397 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 9, CVT_Done }, |
1398 | | // Convert__Reg1_2__Reg1_9 |
1399 | | { CVT_95_Reg, 2, CVT_95_Reg, 9, CVT_Done }, |
1400 | | // Convert__Reg1_6__Reg1_2__s12Ext1_9 |
1401 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_adds12ExtOperands, 9, CVT_Done }, |
1402 | | // Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10 |
1403 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_imm_95_0, 0, CVT_95_Reg, 10, CVT_Done }, |
1404 | | // Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0 |
1405 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_imm_95_0, 0, CVT_Done }, |
1406 | | // Convert__Reg1_5__Reg1_3__Reg1_9 |
1407 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_Done }, |
1408 | | // Convert__Reg1_3__Imm1_10 |
1409 | | { CVT_95_Reg, 3, CVT_95_addImmOperands, 10, CVT_Done }, |
1410 | | // Convert__Reg1_3__Reg1_10 |
1411 | | { CVT_95_Reg, 3, CVT_95_Reg, 10, CVT_Done }, |
1412 | | // Convert__Reg1_7__Reg1_3__s12Ext1_10 |
1413 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_adds12ExtOperands, 10, CVT_Done }, |
1414 | | // Convert__Reg1_2__u32MustExt1_7__Reg1_10 |
1415 | | { CVT_95_Reg, 2, CVT_95_addu32MustExtOperands, 7, CVT_95_Reg, 10, CVT_Done }, |
1416 | | // Convert__Reg1_2__Reg1_6__imm_95_0__s6Ext1_10 |
1417 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_imm_95_0, 0, CVT_95_adds6ExtOperands, 10, CVT_Done }, |
1418 | | // Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9 |
1419 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_Reg, 9, CVT_Done }, |
1420 | | // Convert__Reg1_4__Reg1_2__u32MustExt1_9 |
1421 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_addu32MustExtOperands, 9, CVT_Done }, |
1422 | | // Convert__Reg1_2__Imm1_10 |
1423 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 10, CVT_Done }, |
1424 | | // Convert__Reg1_3__u32MustExt1_8__Reg1_11 |
1425 | | { CVT_95_Reg, 3, CVT_95_addu32MustExtOperands, 8, CVT_95_Reg, 11, CVT_Done }, |
1426 | | // Convert__Reg1_3__Reg1_7__imm_95_0__s6Ext1_11 |
1427 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_imm_95_0, 0, CVT_95_adds6ExtOperands, 11, CVT_Done }, |
1428 | | // Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10 |
1429 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_Reg, 10, CVT_Done }, |
1430 | | // Convert__Reg1_5__Reg1_3__u32MustExt1_10 |
1431 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_addu32MustExtOperands, 10, CVT_Done }, |
1432 | | // Convert__Reg1_3__Imm1_11 |
1433 | | { CVT_95_Reg, 3, CVT_95_addImmOperands, 11, CVT_Done }, |
1434 | | // Convert__Reg1_4__Reg1_2__Reg1_8__s8Ext1_10 |
1435 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_adds8ExtOperands, 10, CVT_Done }, |
1436 | | // Convert__Reg1_2__Imm1_11 |
1437 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 11, CVT_Done }, |
1438 | | // Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11 |
1439 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_95_Reg, 11, CVT_Done }, |
1440 | | // Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0 |
1441 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_imm_95_0, 0, CVT_Done }, |
1442 | | // Convert__Reg1_6__Reg1_2__Reg1_10 |
1443 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_Done }, |
1444 | | // Convert__Reg1_4__Reg1_2__Tie0__Reg1_9 |
1445 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 9, CVT_Done }, |
1446 | | // Convert__Reg1_5__Reg1_3__Reg1_9__s8Ext1_11 |
1447 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_adds8ExtOperands, 11, CVT_Done }, |
1448 | | // Convert__Reg1_3__Imm1_12 |
1449 | | { CVT_95_Reg, 3, CVT_95_addImmOperands, 12, CVT_Done }, |
1450 | | // Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12 |
1451 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_imm_95_0, 0, CVT_95_Reg, 12, CVT_Done }, |
1452 | | // Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0 |
1453 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_imm_95_0, 0, CVT_Done }, |
1454 | | // Convert__Reg1_7__Reg1_3__Reg1_11 |
1455 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_Done }, |
1456 | | // Convert__Reg1_5__Reg1_3__Tie0__Reg1_10 |
1457 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 10, CVT_Done }, |
1458 | | // Convert__Reg1_2__u6Ext1_7__Reg1_10 |
1459 | | { CVT_95_Reg, 2, CVT_95_addu6ExtOperands, 7, CVT_95_Reg, 10, CVT_Done }, |
1460 | | // Convert__Reg1_2__Reg1_6__u6_0Ext1_9__Reg1_12 |
1461 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addu6_95_0ExtOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
1462 | | // Convert__Reg1_2__Reg1_6__u6_3Ext1_9__Reg1_12 |
1463 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addu6_95_3ExtOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
1464 | | // Convert__Reg1_2__Reg1_6__u6_1Ext1_9__Reg1_12 |
1465 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addu6_95_1ExtOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
1466 | | // Convert__Reg1_2__Reg1_6__u6_2Ext1_9__Reg1_12 |
1467 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addu6_95_2ExtOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
1468 | | // Convert__Reg1_2__Reg1_6__s4_6Imm1_9__Reg1_12 |
1469 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_adds4_95_6ImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
1470 | | // Convert__Reg1_6__Reg1_2__Tie0__Reg1_9__Reg1_12 |
1471 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 9, CVT_95_Reg, 12, CVT_Done }, |
1472 | | // Convert__Reg1_4__Reg1_2__Reg1_8__u6_3Ext1_11 |
1473 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addu6_95_3ExtOperands, 11, CVT_Done }, |
1474 | | // Convert__Reg1_4__Reg1_2__Reg1_8__u6_0Ext1_11 |
1475 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addu6_95_0ExtOperands, 11, CVT_Done }, |
1476 | | // Convert__Reg1_4__Reg1_2__Reg1_8__u6_1Ext1_11 |
1477 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addu6_95_1ExtOperands, 11, CVT_Done }, |
1478 | | // Convert__Reg1_4__Reg1_2__Reg1_8__u6_2Ext1_11 |
1479 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addu6_95_2ExtOperands, 11, CVT_Done }, |
1480 | | // Convert__Reg1_2__u32MustExt1_9__Reg1_12 |
1481 | | { CVT_95_Reg, 2, CVT_95_addu32MustExtOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
1482 | | // Convert__Reg1_2__Reg1_8__imm_95_0__s6Ext1_12 |
1483 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_95_adds6ExtOperands, 12, CVT_Done }, |
1484 | | // Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11 |
1485 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_Reg, 11, CVT_Done }, |
1486 | | // Convert__Reg1_6__Reg1_2__u32MustExt1_11 |
1487 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_addu32MustExtOperands, 11, CVT_Done }, |
1488 | | // Convert__Reg1_3__u6Ext1_8__Reg1_11 |
1489 | | { CVT_95_Reg, 3, CVT_95_addu6ExtOperands, 8, CVT_95_Reg, 11, CVT_Done }, |
1490 | | // Convert__Reg1_3__Reg1_7__u6_0Ext1_10__Reg1_13 |
1491 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addu6_95_0ExtOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1492 | | // Convert__Reg1_3__Reg1_7__u6_3Ext1_10__Reg1_13 |
1493 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addu6_95_3ExtOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1494 | | // Convert__Reg1_3__Reg1_7__u6_1Ext1_10__Reg1_13 |
1495 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addu6_95_1ExtOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1496 | | // Convert__Reg1_3__Reg1_7__u6_2Ext1_10__Reg1_13 |
1497 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addu6_95_2ExtOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1498 | | // Convert__Reg1_3__Reg1_7__s4_6Imm1_10__Reg1_13 |
1499 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_adds4_95_6ImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1500 | | // Convert__Reg1_7__Reg1_3__Tie0__Reg1_10__Reg1_13 |
1501 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 10, CVT_95_Reg, 13, CVT_Done }, |
1502 | | // Convert__Reg1_5__Reg1_3__Reg1_9__u6_3Ext1_12 |
1503 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addu6_95_3ExtOperands, 12, CVT_Done }, |
1504 | | // Convert__Reg1_5__Reg1_3__Reg1_9__u6_0Ext1_12 |
1505 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addu6_95_0ExtOperands, 12, CVT_Done }, |
1506 | | // Convert__Reg1_5__Reg1_3__Reg1_9__u6_1Ext1_12 |
1507 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addu6_95_1ExtOperands, 12, CVT_Done }, |
1508 | | // Convert__Reg1_5__Reg1_3__Reg1_9__u6_2Ext1_12 |
1509 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addu6_95_2ExtOperands, 12, CVT_Done }, |
1510 | | // Convert__Reg1_3__u32MustExt1_10__Reg1_13 |
1511 | | { CVT_95_Reg, 3, CVT_95_addu32MustExtOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1512 | | // Convert__Reg1_3__Reg1_9__imm_95_0__s6Ext1_13 |
1513 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_imm_95_0, 0, CVT_95_adds6ExtOperands, 13, CVT_Done }, |
1514 | | // Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12 |
1515 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_Reg, 12, CVT_Done }, |
1516 | | // Convert__Reg1_7__Reg1_3__u32MustExt1_12 |
1517 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_addu32MustExtOperands, 12, CVT_Done }, |
1518 | | // Convert__Reg1_2__Reg1_6__u6_0Imm1_9__s6Ext1_13 |
1519 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addu6_95_0ImmOperands, 9, CVT_95_adds6ExtOperands, 13, CVT_Done }, |
1520 | | // Convert__Reg1_6__Reg1_2__Tie0__s4_0Imm1_10__Reg1_13 |
1521 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_0ImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1522 | | // Convert__Reg1_6__Reg1_2__Tie0__s4_3Imm1_10__Reg1_13 |
1523 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_3ImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1524 | | // Convert__Reg1_2__Reg1_6__u6_1Imm1_9__s6Ext1_13 |
1525 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addu6_95_1ImmOperands, 9, CVT_95_adds6ExtOperands, 13, CVT_Done }, |
1526 | | // Convert__Reg1_6__Reg1_2__Tie0__s4_1Imm1_10__Reg1_13 |
1527 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_1ImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1528 | | // Convert__Reg1_2__Reg1_6__u6_2Imm1_9__s6Ext1_13 |
1529 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addu6_95_2ImmOperands, 9, CVT_95_adds6ExtOperands, 13, CVT_Done }, |
1530 | | // Convert__Reg1_6__Reg1_2__Tie0__s4_2Imm1_10__Reg1_13 |
1531 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_2ImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1532 | | // Convert__Reg1_6__Reg1_2__Tie0__s3_6Imm1_10__Reg1_13 |
1533 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds3_95_6ImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1534 | | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_3Imm1_12 |
1535 | | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, 1, CVT_95_adds4_95_3ImmOperands, 12, CVT_Done }, |
1536 | | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_0Imm1_12 |
1537 | | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, 1, CVT_95_adds4_95_0ImmOperands, 12, CVT_Done }, |
1538 | | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_1Imm1_12 |
1539 | | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, 1, CVT_95_adds4_95_1ImmOperands, 12, CVT_Done }, |
1540 | | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_2Imm1_12 |
1541 | | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, 1, CVT_95_adds4_95_2ImmOperands, 12, CVT_Done }, |
1542 | | // Convert__Reg1_6__Reg1_2__Reg1_10__s8Ext1_12 |
1543 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_adds8ExtOperands, 12, CVT_Done }, |
1544 | | // Convert__Reg1_3__Reg1_7__u6_0Imm1_10__s6Ext1_14 |
1545 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addu6_95_0ImmOperands, 10, CVT_95_adds6ExtOperands, 14, CVT_Done }, |
1546 | | // Convert__Reg1_7__Reg1_3__Tie0__s4_0Imm1_11__Reg1_14 |
1547 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_adds4_95_0ImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
1548 | | // Convert__Reg1_7__Reg1_3__Tie0__s4_3Imm1_11__Reg1_14 |
1549 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_adds4_95_3ImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
1550 | | // Convert__Reg1_3__Reg1_7__u6_1Imm1_10__s6Ext1_14 |
1551 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addu6_95_1ImmOperands, 10, CVT_95_adds6ExtOperands, 14, CVT_Done }, |
1552 | | // Convert__Reg1_7__Reg1_3__Tie0__s4_1Imm1_11__Reg1_14 |
1553 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_adds4_95_1ImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
1554 | | // Convert__Reg1_3__Reg1_7__u6_2Imm1_10__s6Ext1_14 |
1555 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addu6_95_2ImmOperands, 10, CVT_95_adds6ExtOperands, 14, CVT_Done }, |
1556 | | // Convert__Reg1_7__Reg1_3__Tie0__s4_2Imm1_11__Reg1_14 |
1557 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_adds4_95_2ImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
1558 | | // Convert__Reg1_7__Reg1_3__Tie0__s3_6Imm1_11__Reg1_14 |
1559 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_adds3_95_6ImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
1560 | | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_3Imm1_13 |
1561 | | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, 1, CVT_95_adds4_95_3ImmOperands, 13, CVT_Done }, |
1562 | | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_0Imm1_13 |
1563 | | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, 1, CVT_95_adds4_95_0ImmOperands, 13, CVT_Done }, |
1564 | | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_1Imm1_13 |
1565 | | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, 1, CVT_95_adds4_95_1ImmOperands, 13, CVT_Done }, |
1566 | | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_2Imm1_13 |
1567 | | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, 1, CVT_95_adds4_95_2ImmOperands, 13, CVT_Done }, |
1568 | | // Convert__Reg1_7__Reg1_3__Reg1_11__s8Ext1_13 |
1569 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_adds8ExtOperands, 13, CVT_Done }, |
1570 | | // Convert__Reg1_4__Imm1_14 |
1571 | | { CVT_95_Reg, 4, CVT_95_addImmOperands, 14, CVT_Done }, |
1572 | | // Convert__Reg1_2__Reg1_6__s4_6Imm1_9__Reg1_14 |
1573 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_adds4_95_6ImmOperands, 9, CVT_95_Reg, 14, CVT_Done }, |
1574 | | // Convert__Reg1_6__Reg1_2__Tie0__Reg1_9__Reg1_14 |
1575 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 9, CVT_95_Reg, 14, CVT_Done }, |
1576 | | // Convert__Reg1_2__u6Ext1_9__Reg1_12 |
1577 | | { CVT_95_Reg, 2, CVT_95_addu6ExtOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
1578 | | // Convert__Reg1_2__Reg1_8__u6_0Ext1_11__Reg1_14 |
1579 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addu6_95_0ExtOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
1580 | | // Convert__Reg1_2__Reg1_8__u6_3Ext1_11__Reg1_14 |
1581 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addu6_95_3ExtOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
1582 | | // Convert__Reg1_2__Reg1_8__u6_1Ext1_11__Reg1_14 |
1583 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addu6_95_1ExtOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
1584 | | // Convert__Reg1_2__Reg1_8__u6_2Ext1_11__Reg1_14 |
1585 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addu6_95_2ExtOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
1586 | | // Convert__Reg1_6__Reg1_2__Reg1_10__u6_3Ext1_13 |
1587 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addu6_95_3ExtOperands, 13, CVT_Done }, |
1588 | | // Convert__Reg1_6__Reg1_2__Reg1_10__u6_0Ext1_13 |
1589 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addu6_95_0ExtOperands, 13, CVT_Done }, |
1590 | | // Convert__Reg1_6__Reg1_2__Reg1_10__u6_1Ext1_13 |
1591 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addu6_95_1ExtOperands, 13, CVT_Done }, |
1592 | | // Convert__Reg1_6__Reg1_2__Reg1_10__u6_2Ext1_13 |
1593 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addu6_95_2ExtOperands, 13, CVT_Done }, |
1594 | | // Convert__Reg1_5__Imm1_15 |
1595 | | { CVT_95_Reg, 5, CVT_95_addImmOperands, 15, CVT_Done }, |
1596 | | // Convert__Reg1_3__Reg1_7__s4_6Imm1_10__Reg1_15 |
1597 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_adds4_95_6ImmOperands, 10, CVT_95_Reg, 15, CVT_Done }, |
1598 | | // Convert__Reg1_7__Reg1_3__Tie0__Reg1_10__Reg1_15 |
1599 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 10, CVT_95_Reg, 15, CVT_Done }, |
1600 | | // Convert__Reg1_3__u6Ext1_10__Reg1_13 |
1601 | | { CVT_95_Reg, 3, CVT_95_addu6ExtOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
1602 | | // Convert__Reg1_3__Reg1_9__u6_0Ext1_12__Reg1_15 |
1603 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addu6_95_0ExtOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
1604 | | // Convert__Reg1_3__Reg1_9__u6_3Ext1_12__Reg1_15 |
1605 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addu6_95_3ExtOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
1606 | | // Convert__Reg1_3__Reg1_9__u6_1Ext1_12__Reg1_15 |
1607 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addu6_95_1ExtOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
1608 | | // Convert__Reg1_3__Reg1_9__u6_2Ext1_12__Reg1_15 |
1609 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addu6_95_2ExtOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
1610 | | // Convert__Reg1_7__Reg1_3__Reg1_11__u6_3Ext1_14 |
1611 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addu6_95_3ExtOperands, 14, CVT_Done }, |
1612 | | // Convert__Reg1_7__Reg1_3__Reg1_11__u6_0Ext1_14 |
1613 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addu6_95_0ExtOperands, 14, CVT_Done }, |
1614 | | // Convert__Reg1_7__Reg1_3__Reg1_11__u6_1Ext1_14 |
1615 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addu6_95_1ExtOperands, 14, CVT_Done }, |
1616 | | // Convert__Reg1_7__Reg1_3__Reg1_11__u6_2Ext1_14 |
1617 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addu6_95_2ExtOperands, 14, CVT_Done }, |
1618 | | // Convert__Reg1_6__Reg1_9__Imm1_15 |
1619 | | { CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_addImmOperands, 15, CVT_Done }, |
1620 | | // Convert__Reg1_6__Reg1_7__Imm1_15 |
1621 | | { CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 15, CVT_Done }, |
1622 | | // Convert__Reg1_2__Reg1_6__Reg1_8__u2Imm1_12__Reg1_15 |
1623 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_addu2ImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
1624 | | // Convert__Reg1_6__Reg1_2__Tie0__s3_6Imm1_10__Reg1_15 |
1625 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds3_95_6ImmOperands, 10, CVT_95_Reg, 15, CVT_Done }, |
1626 | | // Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14 |
1627 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_Reg, 10, CVT_95_addu2ImmOperands, 14, CVT_Done }, |
1628 | | // Convert__Reg1_2__Reg1_8__u6_0Imm1_11__s6Ext1_15 |
1629 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addu6_95_0ImmOperands, 11, CVT_95_adds6ExtOperands, 15, CVT_Done }, |
1630 | | // Convert__Reg1_8__Reg1_2__Tie0__s4_0Imm1_12__Reg1_15 |
1631 | | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_0ImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
1632 | | // Convert__Reg1_8__Reg1_2__Tie0__s4_3Imm1_12__Reg1_15 |
1633 | | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_3ImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
1634 | | // Convert__Reg1_2__Reg1_8__u6_1Imm1_11__s6Ext1_15 |
1635 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addu6_95_1ImmOperands, 11, CVT_95_adds6ExtOperands, 15, CVT_Done }, |
1636 | | // Convert__Reg1_8__Reg1_2__Tie0__s4_1Imm1_12__Reg1_15 |
1637 | | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_1ImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
1638 | | // Convert__Reg1_2__Reg1_8__u6_2Imm1_11__s6Ext1_15 |
1639 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addu6_95_2ImmOperands, 11, CVT_95_adds6ExtOperands, 15, CVT_Done }, |
1640 | | // Convert__Reg1_8__Reg1_2__Tie0__s4_2Imm1_12__Reg1_15 |
1641 | | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_2ImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
1642 | | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_3Imm1_14 |
1643 | | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, 1, CVT_95_adds4_95_3ImmOperands, 14, CVT_Done }, |
1644 | | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_0Imm1_14 |
1645 | | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, 1, CVT_95_adds4_95_0ImmOperands, 14, CVT_Done }, |
1646 | | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_1Imm1_14 |
1647 | | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, 1, CVT_95_adds4_95_1ImmOperands, 14, CVT_Done }, |
1648 | | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_2Imm1_14 |
1649 | | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, 1, CVT_95_adds4_95_2ImmOperands, 14, CVT_Done }, |
1650 | | // Convert__Reg1_7__Reg1_10__Imm1_16 |
1651 | | { CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_addImmOperands, 16, CVT_Done }, |
1652 | | // Convert__Reg1_7__Reg1_8__Imm1_16 |
1653 | | { CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_addImmOperands, 16, CVT_Done }, |
1654 | | // Convert__Reg1_3__Reg1_7__Reg1_9__u2Imm1_13__Reg1_16 |
1655 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_Reg, 9, CVT_95_addu2ImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
1656 | | // Convert__Reg1_7__Reg1_3__Tie0__s3_6Imm1_11__Reg1_16 |
1657 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_adds3_95_6ImmOperands, 11, CVT_95_Reg, 16, CVT_Done }, |
1658 | | // Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15 |
1659 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_Reg, 11, CVT_95_addu2ImmOperands, 15, CVT_Done }, |
1660 | | // Convert__Reg1_3__Reg1_9__u6_0Imm1_12__s6Ext1_16 |
1661 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addu6_95_0ImmOperands, 12, CVT_95_adds6ExtOperands, 16, CVT_Done }, |
1662 | | // Convert__Reg1_9__Reg1_3__Tie0__s4_0Imm1_13__Reg1_16 |
1663 | | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_adds4_95_0ImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
1664 | | // Convert__Reg1_9__Reg1_3__Tie0__s4_3Imm1_13__Reg1_16 |
1665 | | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_adds4_95_3ImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
1666 | | // Convert__Reg1_3__Reg1_9__u6_1Imm1_12__s6Ext1_16 |
1667 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addu6_95_1ImmOperands, 12, CVT_95_adds6ExtOperands, 16, CVT_Done }, |
1668 | | // Convert__Reg1_9__Reg1_3__Tie0__s4_1Imm1_13__Reg1_16 |
1669 | | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_adds4_95_1ImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
1670 | | // Convert__Reg1_3__Reg1_9__u6_2Imm1_12__s6Ext1_16 |
1671 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addu6_95_2ImmOperands, 12, CVT_95_adds6ExtOperands, 16, CVT_Done }, |
1672 | | // Convert__Reg1_9__Reg1_3__Tie0__s4_2Imm1_13__Reg1_16 |
1673 | | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_adds4_95_2ImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
1674 | | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_3Imm1_15 |
1675 | | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, 1, CVT_95_adds4_95_3ImmOperands, 15, CVT_Done }, |
1676 | | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_0Imm1_15 |
1677 | | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, 1, CVT_95_adds4_95_0ImmOperands, 15, CVT_Done }, |
1678 | | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_1Imm1_15 |
1679 | | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, 1, CVT_95_adds4_95_1ImmOperands, 15, CVT_Done }, |
1680 | | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_2Imm1_15 |
1681 | | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, 1, CVT_95_adds4_95_2ImmOperands, 15, CVT_Done }, |
1682 | | // Convert__Reg1_6__Imm1_16 |
1683 | | { CVT_95_Reg, 6, CVT_95_addImmOperands, 16, CVT_Done }, |
1684 | | // Convert__Reg1_6__u5Imm1_10__Imm1_16 |
1685 | | { CVT_95_Reg, 6, CVT_95_addu5ImmOperands, 10, CVT_95_addImmOperands, 16, CVT_Done }, |
1686 | | // Convert__Reg1_7__Imm1_17 |
1687 | | { CVT_95_Reg, 7, CVT_95_addImmOperands, 17, CVT_Done }, |
1688 | | // Convert__Reg1_7__u5Imm1_11__Imm1_17 |
1689 | | { CVT_95_Reg, 7, CVT_95_addu5ImmOperands, 11, CVT_95_addImmOperands, 17, CVT_Done }, |
1690 | | // Convert__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14__Reg1_17 |
1691 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_Reg, 10, CVT_95_addu2ImmOperands, 14, CVT_95_Reg, 17, CVT_Done }, |
1692 | | // Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2Imm1_16 |
1693 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_Reg, 12, CVT_95_addu2ImmOperands, 16, CVT_Done }, |
1694 | | // Convert__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15__Reg1_18 |
1695 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_Reg, 11, CVT_95_addu2ImmOperands, 15, CVT_95_Reg, 18, CVT_Done }, |
1696 | | // Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2Imm1_17 |
1697 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_Reg, 13, CVT_95_addu2ImmOperands, 17, CVT_Done }, |
1698 | | // Convert__Imm1_2 |
1699 | | { CVT_95_addImmOperands, 2, CVT_Done }, |
1700 | | // Convert__Imm1_3 |
1701 | | { CVT_95_addImmOperands, 3, CVT_Done }, |
1702 | | // Convert__Reg1_2__Reg1_3 |
1703 | | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, |
1704 | | // Convert__Imm1_2__Reg1_3 |
1705 | | { CVT_95_addImmOperands, 2, CVT_95_Reg, 3, CVT_Done }, |
1706 | | // Convert__Imm1_2__u10Imm1_4 |
1707 | | { CVT_95_addImmOperands, 2, CVT_95_addu10ImmOperands, 4, CVT_Done }, |
1708 | | // Convert__regC6__Reg1_2 |
1709 | | { CVT_regC6, 0, CVT_95_Reg, 2, CVT_Done }, |
1710 | | // Convert__regC7__Reg1_2 |
1711 | | { CVT_regC7, 0, CVT_95_Reg, 2, CVT_Done }, |
1712 | | // Convert__Reg1_2__imm_95_0__Reg1_5 |
1713 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_Reg, 5, CVT_Done }, |
1714 | | // Convert__u16_0Imm1_3__Reg1_6 |
1715 | | { CVT_95_addu16_95_0ImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
1716 | | // Convert__u32MustExt1_3__Reg1_6 |
1717 | | { CVT_95_addu32MustExtOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
1718 | | // Convert__Reg1_2__imm_95_0__Reg1_6 |
1719 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_Reg, 6, CVT_Done }, |
1720 | | // Convert__Reg1_2__imm_95_0__s8Ext1_6 |
1721 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_adds8ExtOperands, 6, CVT_Done }, |
1722 | | // Convert__Reg1_2__imm_95_0__u5Imm1_7 |
1723 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addu5ImmOperands, 7, CVT_Done }, |
1724 | | // Convert__u32Imm1_3__Reg1_6 |
1725 | | { CVT_95_addu32ImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
1726 | | // Convert__u16_0Imm1_5__Reg1_8 |
1727 | | { CVT_95_addu16_95_0ImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
1728 | | // Convert__Reg1_2__s11_0Ext1_5__Reg1_8 |
1729 | | { CVT_95_Reg, 2, CVT_95_adds11_95_0ExtOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
1730 | | // Convert__Reg1_2__Tie0__Reg1_5__Reg1_8 |
1731 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 8, CVT_Done }, |
1732 | | // Convert__Reg1_2__u6Ext1_5__Reg1_8 |
1733 | | { CVT_95_Reg, 2, CVT_95_addu6ExtOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
1734 | | // Convert__u32Imm1_4__Reg1_7 |
1735 | | { CVT_95_addu32ImmOperands, 4, CVT_95_Reg, 7, CVT_Done }, |
1736 | | // Convert__Reg1_2__imm_95_0__u5Imm1_8 |
1737 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addu5ImmOperands, 8, CVT_Done }, |
1738 | | // Convert__Reg1_2__u6_0Ext1_5__Reg1_9 |
1739 | | { CVT_95_Reg, 2, CVT_95_addu6_95_0ExtOperands, 5, CVT_95_Reg, 9, CVT_Done }, |
1740 | | // Convert__Reg1_2__u6_0Imm1_5__s8Ext1_9 |
1741 | | { CVT_95_Reg, 2, CVT_95_addu6_95_0ImmOperands, 5, CVT_95_adds8ExtOperands, 9, CVT_Done }, |
1742 | | // Convert__Reg1_2__Tie0__s4_0Imm1_6__Reg1_9 |
1743 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_0ImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
1744 | | // Convert__Reg1_2__u6_0Ext1_5__u5Imm1_10 |
1745 | | { CVT_95_Reg, 2, CVT_95_addu6_95_0ExtOperands, 5, CVT_95_addu5ImmOperands, 10, CVT_Done }, |
1746 | | // Convert__Reg1_2__Tie0__Reg1_5__Reg1_10 |
1747 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 10, CVT_Done }, |
1748 | | // Convert__Reg1_2__Reg1_4__u2Imm1_8__Reg1_11 |
1749 | | { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addu2ImmOperands, 8, CVT_95_Reg, 11, CVT_Done }, |
1750 | | // Convert__Reg1_2__u6_0Ext1_5__u5Imm1_11 |
1751 | | { CVT_95_Reg, 2, CVT_95_addu6_95_0ExtOperands, 5, CVT_95_addu5ImmOperands, 11, CVT_Done }, |
1752 | | // Convert__Reg1_2__u2Imm1_6__u6Ext1_9__Reg1_12 |
1753 | | { CVT_95_Reg, 2, CVT_95_addu2ImmOperands, 6, CVT_95_addu6ExtOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
1754 | | // Convert__Reg1_2__Tie0__Reg1_9__Reg1_13 |
1755 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 9, CVT_95_Reg, 13, CVT_Done }, |
1756 | | // Convert__Reg1_2__Tie0__s4_0Imm1_6__Reg1_10__Reg1_14 |
1757 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_0ImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
1758 | | // Convert__u16_3Imm1_3__Reg1_6 |
1759 | | { CVT_95_addu16_95_3ImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
1760 | | // Convert__u16_3Imm1_5__Reg1_8 |
1761 | | { CVT_95_addu16_95_3ImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
1762 | | // Convert__Reg1_2__s11_3Ext1_5__Reg1_8 |
1763 | | { CVT_95_Reg, 2, CVT_95_adds11_95_3ExtOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
1764 | | // Convert__Reg1_2__Tie0__s4_3Imm1_6__Reg1_9 |
1765 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_3ImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
1766 | | // Convert__Reg1_2__Tie0__s4_3Imm1_6__Reg1_10__Reg1_14 |
1767 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_3ImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
1768 | | // Convert__Reg1_3__Reg1_2__Reg1_6 |
1769 | | { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_Done }, |
1770 | | // Convert__u16_1Imm1_3__Reg1_6 |
1771 | | { CVT_95_addu16_95_1ImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
1772 | | // Convert__u16_1Imm1_5__Reg1_8 |
1773 | | { CVT_95_addu16_95_1ImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
1774 | | // Convert__Reg1_2__s11_1Ext1_5__Reg1_8 |
1775 | | { CVT_95_Reg, 2, CVT_95_adds11_95_1ExtOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
1776 | | // Convert__Reg1_2__u6_1Ext1_5__Reg1_9 |
1777 | | { CVT_95_Reg, 2, CVT_95_addu6_95_1ExtOperands, 5, CVT_95_Reg, 9, CVT_Done }, |
1778 | | // Convert__Reg1_2__u6_1Imm1_5__s8Ext1_9 |
1779 | | { CVT_95_Reg, 2, CVT_95_addu6_95_1ImmOperands, 5, CVT_95_adds8ExtOperands, 9, CVT_Done }, |
1780 | | // Convert__Reg1_2__Tie0__s4_1Imm1_6__Reg1_9 |
1781 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_1ImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
1782 | | // Convert__Reg1_2__u6_1Ext1_5__u5Imm1_10 |
1783 | | { CVT_95_Reg, 2, CVT_95_addu6_95_1ExtOperands, 5, CVT_95_addu5ImmOperands, 10, CVT_Done }, |
1784 | | // Convert__Reg1_2__u6_1Ext1_5__u5Imm1_11 |
1785 | | { CVT_95_Reg, 2, CVT_95_addu6_95_1ExtOperands, 5, CVT_95_addu5ImmOperands, 11, CVT_Done }, |
1786 | | // Convert__Reg1_2__Tie0__s4_1Imm1_6__Reg1_10__Reg1_14 |
1787 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_1ImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
1788 | | // Convert__u16_2Imm1_3__Reg1_6 |
1789 | | { CVT_95_addu16_95_2ImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
1790 | | // Convert__u16_2Imm1_5__Reg1_8 |
1791 | | { CVT_95_addu16_95_2ImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
1792 | | // Convert__Reg1_2__s11_2Ext1_5__Reg1_8 |
1793 | | { CVT_95_Reg, 2, CVT_95_adds11_95_2ExtOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
1794 | | // Convert__Reg1_2__u6_2Ext1_5__Reg1_9 |
1795 | | { CVT_95_Reg, 2, CVT_95_addu6_95_2ExtOperands, 5, CVT_95_Reg, 9, CVT_Done }, |
1796 | | // Convert__Reg1_2__u6_2Imm1_5__s8Ext1_9 |
1797 | | { CVT_95_Reg, 2, CVT_95_addu6_95_2ImmOperands, 5, CVT_95_adds8ExtOperands, 9, CVT_Done }, |
1798 | | // Convert__Reg1_2__Tie0__s4_2Imm1_6__Reg1_9 |
1799 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_2ImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
1800 | | // Convert__Reg1_2__u6_2Ext1_5__u5Imm1_10 |
1801 | | { CVT_95_Reg, 2, CVT_95_addu6_95_2ExtOperands, 5, CVT_95_addu5ImmOperands, 10, CVT_Done }, |
1802 | | // Convert__Reg1_2__u6_2Ext1_5__u5Imm1_11 |
1803 | | { CVT_95_Reg, 2, CVT_95_addu6_95_2ExtOperands, 5, CVT_95_addu5ImmOperands, 11, CVT_Done }, |
1804 | | // Convert__Reg1_2__Tie0__s4_2Imm1_6__Reg1_10__Reg1_14 |
1805 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds4_95_2ImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
1806 | | // Convert__Reg1_4__Imm1_18 |
1807 | | { CVT_95_Reg, 4, CVT_95_addImmOperands, 18, CVT_Done }, |
1808 | | // Convert__Reg1_6__Reg1_7__Imm1_19 |
1809 | | { CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 19, CVT_Done }, |
1810 | | // Convert__Reg1_4__Imm1_19 |
1811 | | { CVT_95_Reg, 4, CVT_95_addImmOperands, 19, CVT_Done }, |
1812 | | // Convert__Reg1_6__Imm1_20 |
1813 | | { CVT_95_Reg, 6, CVT_95_addImmOperands, 20, CVT_Done }, |
1814 | | // Convert__Reg1_6__u5Imm1_8__Imm1_20 |
1815 | | { CVT_95_Reg, 6, CVT_95_addu5ImmOperands, 8, CVT_95_addImmOperands, 20, CVT_Done }, |
1816 | | // Convert__Reg1_6__Reg1_7__Imm1_20 |
1817 | | { CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 20, CVT_Done }, |
1818 | | // Convert__Reg1_6__Imm1_21 |
1819 | | { CVT_95_Reg, 6, CVT_95_addImmOperands, 21, CVT_Done }, |
1820 | | // Convert__Reg1_6__u5Imm1_8__Imm1_21 |
1821 | | { CVT_95_Reg, 6, CVT_95_addu5ImmOperands, 8, CVT_95_addImmOperands, 21, CVT_Done }, |
1822 | | // Convert__Imm1_4__Reg1_5 |
1823 | | { CVT_95_addImmOperands, 4, CVT_95_Reg, 5, CVT_Done }, |
1824 | | // Convert__Imm1_4__u10Imm1_6 |
1825 | | { CVT_95_addImmOperands, 4, CVT_95_addu10ImmOperands, 6, CVT_Done }, |
1826 | | // Convert__Reg1_2__Reg1_3__Tie0__Tie1__Reg1_4 |
1827 | | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_Reg, 4, CVT_Done }, |
1828 | | // Convert__Reg1_2__s4_6Imm1_5__Reg1_8 |
1829 | | { CVT_95_Reg, 2, CVT_95_adds4_95_6ImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
1830 | | // Convert__Reg1_2__Tie0__s3_6Imm1_6__Reg1_9 |
1831 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds3_95_6ImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
1832 | | // Convert__Reg1_2__s4_6Imm1_5__Reg1_10 |
1833 | | { CVT_95_Reg, 2, CVT_95_adds4_95_6ImmOperands, 5, CVT_95_Reg, 10, CVT_Done }, |
1834 | | // Convert__Reg1_2__Tie0__s3_6Imm1_6__Reg1_11 |
1835 | | { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_adds3_95_6ImmOperands, 6, CVT_95_Reg, 11, CVT_Done }, |
1836 | | // Convert__Reg1_2__Imm1_5__Reg1_8 |
1837 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
1838 | | }; |
1839 | | |
1840 | | void HexagonAsmParser:: |
1841 | | convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
1842 | 5.63k | const OperandVector &Operands) { |
1843 | 5.63k | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
1844 | 5.63k | const uint8_t *Converter = ConversionTable[Kind]; |
1845 | 5.63k | Inst.setOpcode(Opcode); |
1846 | 13.8k | for (const uint8_t *p = Converter; *p; p+= 2) { |
1847 | 8.22k | switch (*p) { |
1848 | 0 | default: llvm_unreachable("invalid conversion entry!"); |
1849 | 0 | case CVT_Reg: |
1850 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addRegOperands(Inst, 1); |
1851 | 0 | break; |
1852 | 19 | case CVT_Tied: |
1853 | 19 | Inst.addOperand(Inst.getOperand(*(p + 1))); |
1854 | 19 | break; |
1855 | 3.98k | case CVT_95_Reg: |
1856 | 3.98k | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addRegOperands(Inst, 1); |
1857 | 3.98k | break; |
1858 | 0 | case CVT_regC6: |
1859 | 0 | Inst.addOperand(MCOperand::createReg(Hexagon::C6)); |
1860 | 0 | break; |
1861 | 7 | case CVT_regC7: |
1862 | 7 | Inst.addOperand(MCOperand::createReg(Hexagon::C7)); |
1863 | 7 | break; |
1864 | 1 | case CVT_95_adds8Imm64Operands: |
1865 | 1 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds8Imm64Operands(Inst, 1); |
1866 | 1 | break; |
1867 | 16 | case CVT_95_addu64ImmOperands: |
1868 | 16 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu64ImmOperands(Inst, 1); |
1869 | 16 | break; |
1870 | 2.13k | case CVT_95_adds16ExtOperands: |
1871 | 2.13k | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds16ExtOperands(Inst, 1); |
1872 | 2.13k | break; |
1873 | 0 | case CVT_imm_95_0: |
1874 | 0 | Inst.addOperand(MCOperand::createImm(0)); |
1875 | 0 | break; |
1876 | 19 | case CVT_95_addu16ImmOperands: |
1877 | 19 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu16ImmOperands(Inst, 1); |
1878 | 19 | break; |
1879 | 2.03k | case CVT_95_addImmOperands: |
1880 | 2.03k | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addImmOperands(Inst, 1); |
1881 | 2.03k | break; |
1882 | 0 | case CVT_95_addu16_95_3ImmOperands: |
1883 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu16_3ImmOperands(Inst, 1); |
1884 | 0 | break; |
1885 | 0 | case CVT_95_addu32MustExtOperands: |
1886 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu32MustExtOperands(Inst, 1); |
1887 | 0 | break; |
1888 | 0 | case CVT_95_addu6ImmOperands: |
1889 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu6ImmOperands(Inst, 1); |
1890 | 0 | break; |
1891 | 0 | case CVT_95_addu16_95_0ImmOperands: |
1892 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu16_0ImmOperands(Inst, 1); |
1893 | 0 | break; |
1894 | 0 | case CVT_95_addu16_95_1ImmOperands: |
1895 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu16_1ImmOperands(Inst, 1); |
1896 | 0 | break; |
1897 | 0 | case CVT_95_addu16_95_2ImmOperands: |
1898 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu16_2ImmOperands(Inst, 1); |
1899 | 0 | break; |
1900 | 0 | case CVT_95_addu5ImmOperands: |
1901 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu5ImmOperands(Inst, 1); |
1902 | 0 | break; |
1903 | 0 | case CVT_95_adds8ExtOperands: |
1904 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds8ExtOperands(Inst, 1); |
1905 | 0 | break; |
1906 | 0 | case CVT_95_addu4ImmOperands: |
1907 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu4ImmOperands(Inst, 1); |
1908 | 0 | break; |
1909 | 0 | case CVT_95_addu6ExtOperands: |
1910 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu6ExtOperands(Inst, 1); |
1911 | 0 | break; |
1912 | 0 | case CVT_95_adds10ExtOperands: |
1913 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds10ExtOperands(Inst, 1); |
1914 | 0 | break; |
1915 | 0 | case CVT_95_adds6ImmOperands: |
1916 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds6ImmOperands(Inst, 1); |
1917 | 0 | break; |
1918 | 0 | case CVT_95_adds9ExtOperands: |
1919 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds9ExtOperands(Inst, 1); |
1920 | 0 | break; |
1921 | 0 | case CVT_95_adds8ImmOperands: |
1922 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds8ImmOperands(Inst, 1); |
1923 | 0 | break; |
1924 | 0 | case CVT_95_addu10ImmOperands: |
1925 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu10ImmOperands(Inst, 1); |
1926 | 0 | break; |
1927 | 0 | case CVT_95_adds11_95_0ExtOperands: |
1928 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds11_0ExtOperands(Inst, 1); |
1929 | 0 | break; |
1930 | 0 | case CVT_95_adds11_95_2ExtOperands: |
1931 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds11_2ExtOperands(Inst, 1); |
1932 | 0 | break; |
1933 | 0 | case CVT_95_adds11_95_3ExtOperands: |
1934 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds11_3ExtOperands(Inst, 1); |
1935 | 0 | break; |
1936 | 0 | case CVT_95_adds11_95_1ExtOperands: |
1937 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds11_1ExtOperands(Inst, 1); |
1938 | 0 | break; |
1939 | 0 | case CVT_95_addu3ImmOperands: |
1940 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu3ImmOperands(Inst, 1); |
1941 | 0 | break; |
1942 | 0 | case CVT_95_addu2ImmOperands: |
1943 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu2ImmOperands(Inst, 1); |
1944 | 0 | break; |
1945 | 0 | case CVT_95_adds4_95_6ImmOperands: |
1946 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds4_6ImmOperands(Inst, 1); |
1947 | 0 | break; |
1948 | 0 | case CVT_95_addu8ExtOperands: |
1949 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu8ExtOperands(Inst, 1); |
1950 | 0 | break; |
1951 | 0 | case CVT_95_addu8ImmOperands: |
1952 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu8ImmOperands(Inst, 1); |
1953 | 0 | break; |
1954 | 0 | case CVT_95_addf32ExtOperands: |
1955 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addf32ExtOperands(Inst, 1); |
1956 | 0 | break; |
1957 | 0 | case CVT_95_addu9ExtOperands: |
1958 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu9ExtOperands(Inst, 1); |
1959 | 0 | break; |
1960 | 0 | case CVT_95_addu7ExtOperands: |
1961 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu7ExtOperands(Inst, 1); |
1962 | 0 | break; |
1963 | 0 | case CVT_95_addu7ImmOperands: |
1964 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu7ImmOperands(Inst, 1); |
1965 | 0 | break; |
1966 | 0 | case CVT_95_adds4_95_0ImmOperands: |
1967 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds4_0ImmOperands(Inst, 1); |
1968 | 0 | break; |
1969 | 0 | case CVT_95_adds4_95_2ImmOperands: |
1970 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds4_2ImmOperands(Inst, 1); |
1971 | 0 | break; |
1972 | 0 | case CVT_95_adds4_95_3ImmOperands: |
1973 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds4_3ImmOperands(Inst, 1); |
1974 | 0 | break; |
1975 | 0 | case CVT_95_adds4_95_1ImmOperands: |
1976 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds4_1ImmOperands(Inst, 1); |
1977 | 0 | break; |
1978 | 0 | case CVT_95_adds3_95_6ImmOperands: |
1979 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds3_6ImmOperands(Inst, 1); |
1980 | 0 | break; |
1981 | 0 | case CVT_95_adds6ExtOperands: |
1982 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds6ExtOperands(Inst, 1); |
1983 | 0 | break; |
1984 | 0 | case CVT_95_addu6_95_2ImmOperands: |
1985 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu6_2ImmOperands(Inst, 1); |
1986 | 0 | break; |
1987 | 0 | case CVT_95_addu1ImmOperands: |
1988 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu1ImmOperands(Inst, 1); |
1989 | 0 | break; |
1990 | 0 | case CVT_95_addu11_95_3ImmOperands: |
1991 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu11_3ImmOperands(Inst, 1); |
1992 | 0 | break; |
1993 | 1 | case CVT_95_adds12ExtOperands: |
1994 | 1 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).adds12ExtOperands(Inst, 1); |
1995 | 1 | break; |
1996 | 0 | case CVT_95_addu6_95_0ExtOperands: |
1997 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu6_0ExtOperands(Inst, 1); |
1998 | 0 | break; |
1999 | 0 | case CVT_95_addu6_95_3ExtOperands: |
2000 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu6_3ExtOperands(Inst, 1); |
2001 | 0 | break; |
2002 | 0 | case CVT_95_addu6_95_1ExtOperands: |
2003 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu6_1ExtOperands(Inst, 1); |
2004 | 0 | break; |
2005 | 0 | case CVT_95_addu6_95_2ExtOperands: |
2006 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu6_2ExtOperands(Inst, 1); |
2007 | 0 | break; |
2008 | 0 | case CVT_95_addu6_95_0ImmOperands: |
2009 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu6_0ImmOperands(Inst, 1); |
2010 | 0 | break; |
2011 | 0 | case CVT_95_addu6_95_1ImmOperands: |
2012 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu6_1ImmOperands(Inst, 1); |
2013 | 0 | break; |
2014 | 0 | case CVT_95_addu32ImmOperands: |
2015 | 0 | static_cast<HexagonOperand&>(*Operands[*(p + 1)]).addu32ImmOperands(Inst, 1); |
2016 | 0 | break; |
2017 | 8.22k | } |
2018 | 8.22k | } |
2019 | 5.63k | } |
2020 | | |
2021 | | void HexagonAsmParser:: |
2022 | | convertToMapAndConstraints(unsigned Kind, |
2023 | 0 | const OperandVector &Operands) { |
2024 | 0 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
2025 | 0 | unsigned NumMCOperands = 0; |
2026 | 0 | const uint8_t *Converter = ConversionTable[Kind]; |
2027 | 0 | for (const uint8_t *p = Converter; *p; p+= 2) { |
2028 | 0 | switch (*p) { |
2029 | 0 | default: llvm_unreachable("invalid conversion entry!"); |
2030 | 0 | case CVT_Reg: |
2031 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2032 | 0 | Operands[*(p + 1)]->setConstraint("r"); |
2033 | 0 | ++NumMCOperands; |
2034 | 0 | break; |
2035 | 0 | case CVT_Tied: |
2036 | 0 | ++NumMCOperands; |
2037 | 0 | break; |
2038 | 0 | case CVT_95_Reg: |
2039 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2040 | 0 | Operands[*(p + 1)]->setConstraint("r"); |
2041 | 0 | NumMCOperands += 1; |
2042 | 0 | break; |
2043 | 0 | case CVT_regC6: |
2044 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2045 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2046 | 0 | ++NumMCOperands; |
2047 | 0 | break; |
2048 | 0 | case CVT_regC7: |
2049 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2050 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2051 | 0 | ++NumMCOperands; |
2052 | 0 | break; |
2053 | 0 | case CVT_95_adds8Imm64Operands: |
2054 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2055 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2056 | 0 | NumMCOperands += 1; |
2057 | 0 | break; |
2058 | 0 | case CVT_95_addu64ImmOperands: |
2059 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2060 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2061 | 0 | NumMCOperands += 1; |
2062 | 0 | break; |
2063 | 0 | case CVT_95_adds16ExtOperands: |
2064 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2065 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2066 | 0 | NumMCOperands += 1; |
2067 | 0 | break; |
2068 | 0 | case CVT_imm_95_0: |
2069 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2070 | 0 | Operands[*(p + 1)]->setConstraint(""); |
2071 | 0 | ++NumMCOperands; |
2072 | 0 | break; |
2073 | 0 | case CVT_95_addu16ImmOperands: |
2074 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2075 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2076 | 0 | NumMCOperands += 1; |
2077 | 0 | break; |
2078 | 0 | case CVT_95_addImmOperands: |
2079 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2080 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2081 | 0 | NumMCOperands += 1; |
2082 | 0 | break; |
2083 | 0 | case CVT_95_addu16_95_3ImmOperands: |
2084 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2085 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2086 | 0 | NumMCOperands += 1; |
2087 | 0 | break; |
2088 | 0 | case CVT_95_addu32MustExtOperands: |
2089 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2090 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2091 | 0 | NumMCOperands += 1; |
2092 | 0 | break; |
2093 | 0 | case CVT_95_addu6ImmOperands: |
2094 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2095 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2096 | 0 | NumMCOperands += 1; |
2097 | 0 | break; |
2098 | 0 | case CVT_95_addu16_95_0ImmOperands: |
2099 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2100 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2101 | 0 | NumMCOperands += 1; |
2102 | 0 | break; |
2103 | 0 | case CVT_95_addu16_95_1ImmOperands: |
2104 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2105 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2106 | 0 | NumMCOperands += 1; |
2107 | 0 | break; |
2108 | 0 | case CVT_95_addu16_95_2ImmOperands: |
2109 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2110 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2111 | 0 | NumMCOperands += 1; |
2112 | 0 | break; |
2113 | 0 | case CVT_95_addu5ImmOperands: |
2114 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2115 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2116 | 0 | NumMCOperands += 1; |
2117 | 0 | break; |
2118 | 0 | case CVT_95_adds8ExtOperands: |
2119 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2120 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2121 | 0 | NumMCOperands += 1; |
2122 | 0 | break; |
2123 | 0 | case CVT_95_addu4ImmOperands: |
2124 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2125 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2126 | 0 | NumMCOperands += 1; |
2127 | 0 | break; |
2128 | 0 | case CVT_95_addu6ExtOperands: |
2129 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2130 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2131 | 0 | NumMCOperands += 1; |
2132 | 0 | break; |
2133 | 0 | case CVT_95_adds10ExtOperands: |
2134 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2135 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2136 | 0 | NumMCOperands += 1; |
2137 | 0 | break; |
2138 | 0 | case CVT_95_adds6ImmOperands: |
2139 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2140 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2141 | 0 | NumMCOperands += 1; |
2142 | 0 | break; |
2143 | 0 | case CVT_95_adds9ExtOperands: |
2144 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2145 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2146 | 0 | NumMCOperands += 1; |
2147 | 0 | break; |
2148 | 0 | case CVT_95_adds8ImmOperands: |
2149 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2150 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2151 | 0 | NumMCOperands += 1; |
2152 | 0 | break; |
2153 | 0 | case CVT_95_addu10ImmOperands: |
2154 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2155 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2156 | 0 | NumMCOperands += 1; |
2157 | 0 | break; |
2158 | 0 | case CVT_95_adds11_95_0ExtOperands: |
2159 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2160 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2161 | 0 | NumMCOperands += 1; |
2162 | 0 | break; |
2163 | 0 | case CVT_95_adds11_95_2ExtOperands: |
2164 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2165 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2166 | 0 | NumMCOperands += 1; |
2167 | 0 | break; |
2168 | 0 | case CVT_95_adds11_95_3ExtOperands: |
2169 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2170 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2171 | 0 | NumMCOperands += 1; |
2172 | 0 | break; |
2173 | 0 | case CVT_95_adds11_95_1ExtOperands: |
2174 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2175 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2176 | 0 | NumMCOperands += 1; |
2177 | 0 | break; |
2178 | 0 | case CVT_95_addu3ImmOperands: |
2179 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2180 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2181 | 0 | NumMCOperands += 1; |
2182 | 0 | break; |
2183 | 0 | case CVT_95_addu2ImmOperands: |
2184 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2185 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2186 | 0 | NumMCOperands += 1; |
2187 | 0 | break; |
2188 | 0 | case CVT_95_adds4_95_6ImmOperands: |
2189 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2190 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2191 | 0 | NumMCOperands += 1; |
2192 | 0 | break; |
2193 | 0 | case CVT_95_addu8ExtOperands: |
2194 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2195 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2196 | 0 | NumMCOperands += 1; |
2197 | 0 | break; |
2198 | 0 | case CVT_95_addu8ImmOperands: |
2199 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2200 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2201 | 0 | NumMCOperands += 1; |
2202 | 0 | break; |
2203 | 0 | case CVT_95_addf32ExtOperands: |
2204 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2205 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2206 | 0 | NumMCOperands += 1; |
2207 | 0 | break; |
2208 | 0 | case CVT_95_addu9ExtOperands: |
2209 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2210 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2211 | 0 | NumMCOperands += 1; |
2212 | 0 | break; |
2213 | 0 | case CVT_95_addu7ExtOperands: |
2214 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2215 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2216 | 0 | NumMCOperands += 1; |
2217 | 0 | break; |
2218 | 0 | case CVT_95_addu7ImmOperands: |
2219 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2220 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2221 | 0 | NumMCOperands += 1; |
2222 | 0 | break; |
2223 | 0 | case CVT_95_adds4_95_0ImmOperands: |
2224 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2225 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2226 | 0 | NumMCOperands += 1; |
2227 | 0 | break; |
2228 | 0 | case CVT_95_adds4_95_2ImmOperands: |
2229 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2230 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2231 | 0 | NumMCOperands += 1; |
2232 | 0 | break; |
2233 | 0 | case CVT_95_adds4_95_3ImmOperands: |
2234 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2235 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2236 | 0 | NumMCOperands += 1; |
2237 | 0 | break; |
2238 | 0 | case CVT_95_adds4_95_1ImmOperands: |
2239 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2240 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2241 | 0 | NumMCOperands += 1; |
2242 | 0 | break; |
2243 | 0 | case CVT_95_adds3_95_6ImmOperands: |
2244 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2245 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2246 | 0 | NumMCOperands += 1; |
2247 | 0 | break; |
2248 | 0 | case CVT_95_adds6ExtOperands: |
2249 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2250 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2251 | 0 | NumMCOperands += 1; |
2252 | 0 | break; |
2253 | 0 | case CVT_95_addu6_95_2ImmOperands: |
2254 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2255 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2256 | 0 | NumMCOperands += 1; |
2257 | 0 | break; |
2258 | 0 | case CVT_95_addu1ImmOperands: |
2259 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2260 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2261 | 0 | NumMCOperands += 1; |
2262 | 0 | break; |
2263 | 0 | case CVT_95_addu11_95_3ImmOperands: |
2264 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2265 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2266 | 0 | NumMCOperands += 1; |
2267 | 0 | break; |
2268 | 0 | case CVT_95_adds12ExtOperands: |
2269 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2270 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2271 | 0 | NumMCOperands += 1; |
2272 | 0 | break; |
2273 | 0 | case CVT_95_addu6_95_0ExtOperands: |
2274 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2275 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2276 | 0 | NumMCOperands += 1; |
2277 | 0 | break; |
2278 | 0 | case CVT_95_addu6_95_3ExtOperands: |
2279 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2280 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2281 | 0 | NumMCOperands += 1; |
2282 | 0 | break; |
2283 | 0 | case CVT_95_addu6_95_1ExtOperands: |
2284 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2285 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2286 | 0 | NumMCOperands += 1; |
2287 | 0 | break; |
2288 | 0 | case CVT_95_addu6_95_2ExtOperands: |
2289 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2290 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2291 | 0 | NumMCOperands += 1; |
2292 | 0 | break; |
2293 | 0 | case CVT_95_addu6_95_0ImmOperands: |
2294 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2295 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2296 | 0 | NumMCOperands += 1; |
2297 | 0 | break; |
2298 | 0 | case CVT_95_addu6_95_1ImmOperands: |
2299 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2300 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2301 | 0 | NumMCOperands += 1; |
2302 | 0 | break; |
2303 | 0 | case CVT_95_addu32ImmOperands: |
2304 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
2305 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
2306 | 0 | NumMCOperands += 1; |
2307 | 0 | break; |
2308 | 0 | } |
2309 | 0 | } |
2310 | 0 | } |
2311 | | |
2312 | | namespace { |
2313 | | |
2314 | | /// MatchClassKind - The kinds of classes which participate in |
2315 | | /// instruction matching. |
2316 | | enum MatchClassKind { |
2317 | | InvalidMatchClass = 0, |
2318 | | MCK__EXCLAIM_, // '!' |
2319 | | MCK__35_, // '#' |
2320 | | MCK__38_, // '&' |
2321 | | MCK__40_, // '(' |
2322 | | MCK__41_, // ')' |
2323 | | MCK__STAR_, // '*' |
2324 | | MCK__43_, // '+' |
2325 | | MCK__MINUS_, // '-' |
2326 | | MCK__MINUS_1, // '-1' |
2327 | | MCK__DOT_, // '.' |
2328 | | MCK_0, // '0' |
2329 | | MCK_1, // '1' |
2330 | | MCK_16, // '16' |
2331 | | MCK__COLON_, // ':' |
2332 | | MCK__59_, // ';' |
2333 | | MCK__LT_, // '<' |
2334 | | MCK__61_, // '=' |
2335 | | MCK__GT_, // '>' |
2336 | | MCK_CONST32, // 'CONST32' |
2337 | | MCK_CONST64, // 'CONST64' |
2338 | | MCK_HI, // 'HI' |
2339 | | MCK_I, // 'I' |
2340 | | MCK_LO, // 'LO' |
2341 | | MCK__94_, // '^' |
2342 | | MCK_abs, // 'abs' |
2343 | | MCK_add, // 'add' |
2344 | | MCK_addasl, // 'addasl' |
2345 | | MCK_all8, // 'all8' |
2346 | | MCK_allocframe, // 'allocframe' |
2347 | | MCK_and, // 'and' |
2348 | | MCK_any8, // 'any8' |
2349 | | MCK_asl, // 'asl' |
2350 | | MCK_aslh, // 'aslh' |
2351 | | MCK_asr, // 'asr' |
2352 | | MCK_asrh, // 'asrh' |
2353 | | MCK_asrrnd, // 'asrrnd' |
2354 | | MCK_b, // 'b' |
2355 | | MCK_barrier, // 'barrier' |
2356 | | MCK_bitsclr, // 'bitsclr' |
2357 | | MCK_bitsplit, // 'bitsplit' |
2358 | | MCK_bitsset, // 'bitsset' |
2359 | | MCK_boundscheck, // 'boundscheck' |
2360 | | MCK_brev, // 'brev' |
2361 | | MCK_call, // 'call' |
2362 | | MCK_callr, // 'callr' |
2363 | | MCK_carry, // 'carry' |
2364 | | MCK_chop, // 'chop' |
2365 | | MCK_circ, // 'circ' |
2366 | | MCK_cl0, // 'cl0' |
2367 | | MCK_cl1, // 'cl1' |
2368 | | MCK_clb, // 'clb' |
2369 | | MCK_clrbit, // 'clrbit' |
2370 | | MCK_cmp, // 'cmp' |
2371 | | MCK_cmpb, // 'cmpb' |
2372 | | MCK_cmph, // 'cmph' |
2373 | | MCK_cmpy, // 'cmpy' |
2374 | | MCK_cmpyi, // 'cmpyi' |
2375 | | MCK_cmpyiwh, // 'cmpyiwh' |
2376 | | MCK_cmpyr, // 'cmpyr' |
2377 | | MCK_cmpyrwh, // 'cmpyrwh' |
2378 | | MCK_combine, // 'combine' |
2379 | | MCK_convert_95_d2df, // 'convert_d2df' |
2380 | | MCK_convert_95_d2sf, // 'convert_d2sf' |
2381 | | MCK_convert_95_df2d, // 'convert_df2d' |
2382 | | MCK_convert_95_df2sf, // 'convert_df2sf' |
2383 | | MCK_convert_95_df2ud, // 'convert_df2ud' |
2384 | | MCK_convert_95_df2uw, // 'convert_df2uw' |
2385 | | MCK_convert_95_df2w, // 'convert_df2w' |
2386 | | MCK_convert_95_sf2d, // 'convert_sf2d' |
2387 | | MCK_convert_95_sf2df, // 'convert_sf2df' |
2388 | | MCK_convert_95_sf2ud, // 'convert_sf2ud' |
2389 | | MCK_convert_95_sf2uw, // 'convert_sf2uw' |
2390 | | MCK_convert_95_sf2w, // 'convert_sf2w' |
2391 | | MCK_convert_95_ud2df, // 'convert_ud2df' |
2392 | | MCK_convert_95_ud2sf, // 'convert_ud2sf' |
2393 | | MCK_convert_95_uw2df, // 'convert_uw2df' |
2394 | | MCK_convert_95_uw2sf, // 'convert_uw2sf' |
2395 | | MCK_convert_95_w2df, // 'convert_w2df' |
2396 | | MCK_convert_95_w2sf, // 'convert_w2sf' |
2397 | | MCK_crnd, // 'crnd' |
2398 | | MCK_cround, // 'cround' |
2399 | | MCK_ct0, // 'ct0' |
2400 | | MCK_ct1, // 'ct1' |
2401 | | MCK_cur, // 'cur' |
2402 | | MCK_dccleana, // 'dccleana' |
2403 | | MCK_dccleaninva, // 'dccleaninva' |
2404 | | MCK_dcfetch, // 'dcfetch' |
2405 | | MCK_dcinva, // 'dcinva' |
2406 | | MCK_dczeroa, // 'dczeroa' |
2407 | | MCK_dealloc_95_return, // 'dealloc_return' |
2408 | | MCK_deallocframe, // 'deallocframe' |
2409 | | MCK_decbin, // 'decbin' |
2410 | | MCK_deinterleave, // 'deinterleave' |
2411 | | MCK_deprecated, // 'deprecated' |
2412 | | MCK_dfclass, // 'dfclass' |
2413 | | MCK_dfcmp, // 'dfcmp' |
2414 | | MCK_dfmake, // 'dfmake' |
2415 | | MCK_encbin, // 'encbin' |
2416 | | MCK_eq, // 'eq' |
2417 | | MCK_extract, // 'extract' |
2418 | | MCK_extractu, // 'extractu' |
2419 | | MCK_fastcorner9, // 'fastcorner9' |
2420 | | MCK_ge, // 'ge' |
2421 | | MCK_geu, // 'geu' |
2422 | | MCK_gt, // 'gt' |
2423 | | MCK_gtu, // 'gtu' |
2424 | | MCK_h, // 'h' |
2425 | | MCK_hi, // 'hi' |
2426 | | MCK_hi_95_W, // 'hi_W' |
2427 | | MCK_hintjr, // 'hintjr' |
2428 | | MCK_icinva, // 'icinva' |
2429 | | MCK_if, // 'if' |
2430 | | MCK_insert, // 'insert' |
2431 | | MCK_interleave, // 'interleave' |
2432 | | MCK_isync, // 'isync' |
2433 | | MCK_jump, // 'jump' |
2434 | | MCK_jumpr, // 'jumpr' |
2435 | | MCK_l, // 'l' |
2436 | | MCK_l2fetch, // 'l2fetch' |
2437 | | MCK_l2gclean, // 'l2gclean' |
2438 | | MCK_l2gcleaninv, // 'l2gcleaninv' |
2439 | | MCK_l2gunlock, // 'l2gunlock' |
2440 | | MCK_l2locka, // 'l2locka' |
2441 | | MCK_l2unlocka, // 'l2unlocka' |
2442 | | MCK_lfs, // 'lfs' |
2443 | | MCK_lib, // 'lib' |
2444 | | MCK_lo, // 'lo' |
2445 | | MCK_lo_95_W, // 'lo_W' |
2446 | | MCK_loop0, // 'loop0' |
2447 | | MCK_loop1, // 'loop1' |
2448 | | MCK_lsl, // 'lsl' |
2449 | | MCK_lsr, // 'lsr' |
2450 | | MCK_lt, // 'lt' |
2451 | | MCK_ltu, // 'ltu' |
2452 | | MCK_mask, // 'mask' |
2453 | | MCK_max, // 'max' |
2454 | | MCK_maxu, // 'maxu' |
2455 | | MCK_memb, // 'memb' |
2456 | | MCK_memb_95_fifo, // 'memb_fifo' |
2457 | | MCK_membh, // 'membh' |
2458 | | MCK_memd, // 'memd' |
2459 | | MCK_memd_95_locked, // 'memd_locked' |
2460 | | MCK_memh, // 'memh' |
2461 | | MCK_memh_95_fifo, // 'memh_fifo' |
2462 | | MCK_memub, // 'memub' |
2463 | | MCK_memubh, // 'memubh' |
2464 | | MCK_memuh, // 'memuh' |
2465 | | MCK_memw, // 'memw' |
2466 | | MCK_memw_95_locked, // 'memw_locked' |
2467 | | MCK_min, // 'min' |
2468 | | MCK_minu, // 'minu' |
2469 | | MCK_modwrap, // 'modwrap' |
2470 | | MCK_mpy, // 'mpy' |
2471 | | MCK_mpyi, // 'mpyi' |
2472 | | MCK_mpysu, // 'mpysu' |
2473 | | MCK_mpyu, // 'mpyu' |
2474 | | MCK_mpyui, // 'mpyui' |
2475 | | MCK_mux, // 'mux' |
2476 | | MCK_neg, // 'neg' |
2477 | | MCK_new, // 'new' |
2478 | | MCK_nop, // 'nop' |
2479 | | MCK_normamt, // 'normamt' |
2480 | | MCK_not, // 'not' |
2481 | | MCK_nt, // 'nt' |
2482 | | MCK_or, // 'or' |
2483 | | MCK_packhl, // 'packhl' |
2484 | | MCK_parity, // 'parity' |
2485 | | MCK_pmpyw, // 'pmpyw' |
2486 | | MCK_popcount, // 'popcount' |
2487 | | MCK_pos, // 'pos' |
2488 | | MCK_raw, // 'raw' |
2489 | | MCK_rnd, // 'rnd' |
2490 | | MCK_rol, // 'rol' |
2491 | | MCK_round, // 'round' |
2492 | | MCK_sat, // 'sat' |
2493 | | MCK_satb, // 'satb' |
2494 | | MCK_sath, // 'sath' |
2495 | | MCK_satub, // 'satub' |
2496 | | MCK_satuh, // 'satuh' |
2497 | | MCK_scale, // 'scale' |
2498 | | MCK_setbit, // 'setbit' |
2499 | | MCK_sfadd, // 'sfadd' |
2500 | | MCK_sfclass, // 'sfclass' |
2501 | | MCK_sfcmp, // 'sfcmp' |
2502 | | MCK_sffixupd, // 'sffixupd' |
2503 | | MCK_sffixupn, // 'sffixupn' |
2504 | | MCK_sffixupr, // 'sffixupr' |
2505 | | MCK_sfinvsqrta, // 'sfinvsqrta' |
2506 | | MCK_sfmake, // 'sfmake' |
2507 | | MCK_sfmax, // 'sfmax' |
2508 | | MCK_sfmin, // 'sfmin' |
2509 | | MCK_sfmpy, // 'sfmpy' |
2510 | | MCK_sfrecipa, // 'sfrecipa' |
2511 | | MCK_sfsub, // 'sfsub' |
2512 | | MCK_shift, // 'shift' |
2513 | | MCK_shuffeb, // 'shuffeb' |
2514 | | MCK_shuffeh, // 'shuffeh' |
2515 | | MCK_shuffob, // 'shuffob' |
2516 | | MCK_shuffoh, // 'shuffoh' |
2517 | | MCK_sp1loop0, // 'sp1loop0' |
2518 | | MCK_sp2loop0, // 'sp2loop0' |
2519 | | MCK_sp3loop0, // 'sp3loop0' |
2520 | | MCK_sub, // 'sub' |
2521 | | MCK_swiz, // 'swiz' |
2522 | | MCK_sxtb, // 'sxtb' |
2523 | | MCK_sxth, // 'sxth' |
2524 | | MCK_sxtw, // 'sxtw' |
2525 | | MCK_syncht, // 'syncht' |
2526 | | MCK_t, // 't' |
2527 | | MCK_tableidxb, // 'tableidxb' |
2528 | | MCK_tableidxd, // 'tableidxd' |
2529 | | MCK_tableidxh, // 'tableidxh' |
2530 | | MCK_tableidxw, // 'tableidxw' |
2531 | | MCK_tlbmatch, // 'tlbmatch' |
2532 | | MCK_tmp, // 'tmp' |
2533 | | MCK_togglebit, // 'togglebit' |
2534 | | MCK_trace, // 'trace' |
2535 | | MCK_tstbit, // 'tstbit' |
2536 | | MCK_ub, // 'ub' |
2537 | | MCK_uh, // 'uh' |
2538 | | MCK_uo, // 'uo' |
2539 | | MCK_uw, // 'uw' |
2540 | | MCK_vabs, // 'vabs' |
2541 | | MCK_vabsdiff, // 'vabsdiff' |
2542 | | MCK_vabsdiffh, // 'vabsdiffh' |
2543 | | MCK_vabsdiffw, // 'vabsdiffw' |
2544 | | MCK_vabsh, // 'vabsh' |
2545 | | MCK_vabsw, // 'vabsw' |
2546 | | MCK_vacsh, // 'vacsh' |
2547 | | MCK_vadd, // 'vadd' |
2548 | | MCK_vaddb, // 'vaddb' |
2549 | | MCK_vaddh, // 'vaddh' |
2550 | | MCK_vaddhub, // 'vaddhub' |
2551 | | MCK_vaddub, // 'vaddub' |
2552 | | MCK_vadduh, // 'vadduh' |
2553 | | MCK_vaddw, // 'vaddw' |
2554 | | MCK_valign, // 'valign' |
2555 | | MCK_valignb, // 'valignb' |
2556 | | MCK_vand, // 'vand' |
2557 | | MCK_vasl, // 'vasl' |
2558 | | MCK_vaslh, // 'vaslh' |
2559 | | MCK_vaslw, // 'vaslw' |
2560 | | MCK_vasr, // 'vasr' |
2561 | | MCK_vasrh, // 'vasrh' |
2562 | | MCK_vasrhub, // 'vasrhub' |
2563 | | MCK_vasrw, // 'vasrw' |
2564 | | MCK_vassignp_95_W, // 'vassignp_W' |
2565 | | MCK_vassignp_95_W_95_128B, // 'vassignp_W_128B' |
2566 | | MCK_vavg, // 'vavg' |
2567 | | MCK_vavgh, // 'vavgh' |
2568 | | MCK_vavgub, // 'vavgub' |
2569 | | MCK_vavguh, // 'vavguh' |
2570 | | MCK_vavguw, // 'vavguw' |
2571 | | MCK_vavgw, // 'vavgw' |
2572 | | MCK_vcl0, // 'vcl0' |
2573 | | MCK_vcmp, // 'vcmp' |
2574 | | MCK_vcmpb, // 'vcmpb' |
2575 | | MCK_vcmph, // 'vcmph' |
2576 | | MCK_vcmpw, // 'vcmpw' |
2577 | | MCK_vcmpyi, // 'vcmpyi' |
2578 | | MCK_vcmpyr, // 'vcmpyr' |
2579 | | MCK_vcnegh, // 'vcnegh' |
2580 | | MCK_vcombine, // 'vcombine' |
2581 | | MCK_vconj, // 'vconj' |
2582 | | MCK_vcrotate, // 'vcrotate' |
2583 | | MCK_vdeal, // 'vdeal' |
2584 | | MCK_vdeale, // 'vdeale' |
2585 | | MCK_vdelta, // 'vdelta' |
2586 | | MCK_vdmpy, // 'vdmpy' |
2587 | | MCK_vdmpybsu, // 'vdmpybsu' |
2588 | | MCK_vdsad, // 'vdsad' |
2589 | | MCK_vextract, // 'vextract' |
2590 | | MCK_vhist, // 'vhist' |
2591 | | MCK_vinsert, // 'vinsert' |
2592 | | MCK_vitpack, // 'vitpack' |
2593 | | MCK_vlalign, // 'vlalign' |
2594 | | MCK_vlslh, // 'vlslh' |
2595 | | MCK_vlslw, // 'vlslw' |
2596 | | MCK_vlsr, // 'vlsr' |
2597 | | MCK_vlsrh, // 'vlsrh' |
2598 | | MCK_vlsrw, // 'vlsrw' |
2599 | | MCK_vlut16, // 'vlut16' |
2600 | | MCK_vlut32, // 'vlut32' |
2601 | | MCK_vmax, // 'vmax' |
2602 | | MCK_vmaxb, // 'vmaxb' |
2603 | | MCK_vmaxh, // 'vmaxh' |
2604 | | MCK_vmaxub, // 'vmaxub' |
2605 | | MCK_vmaxuh, // 'vmaxuh' |
2606 | | MCK_vmaxuw, // 'vmaxuw' |
2607 | | MCK_vmaxw, // 'vmaxw' |
2608 | | MCK_vmem, // 'vmem' |
2609 | | MCK_vmemu, // 'vmemu' |
2610 | | MCK_vmin, // 'vmin' |
2611 | | MCK_vminb, // 'vminb' |
2612 | | MCK_vminh, // 'vminh' |
2613 | | MCK_vminub, // 'vminub' |
2614 | | MCK_vminuh, // 'vminuh' |
2615 | | MCK_vminuw, // 'vminuw' |
2616 | | MCK_vminw, // 'vminw' |
2617 | | MCK_vmpa, // 'vmpa' |
2618 | | MCK_vmpy, // 'vmpy' |
2619 | | MCK_vmpybsu, // 'vmpybsu' |
2620 | | MCK_vmpybu, // 'vmpybu' |
2621 | | MCK_vmpye, // 'vmpye' |
2622 | | MCK_vmpyeh, // 'vmpyeh' |
2623 | | MCK_vmpyh, // 'vmpyh' |
2624 | | MCK_vmpyhsu, // 'vmpyhsu' |
2625 | | MCK_vmpyi, // 'vmpyi' |
2626 | | MCK_vmpyie, // 'vmpyie' |
2627 | | MCK_vmpyieo, // 'vmpyieo' |
2628 | | MCK_vmpyio, // 'vmpyio' |
2629 | | MCK_vmpyo, // 'vmpyo' |
2630 | | MCK_vmpyweh, // 'vmpyweh' |
2631 | | MCK_vmpyweuh, // 'vmpyweuh' |
2632 | | MCK_vmpywoh, // 'vmpywoh' |
2633 | | MCK_vmpywouh, // 'vmpywouh' |
2634 | | MCK_vmux, // 'vmux' |
2635 | | MCK_vnavg, // 'vnavg' |
2636 | | MCK_vnavgh, // 'vnavgh' |
2637 | | MCK_vnavgw, // 'vnavgw' |
2638 | | MCK_vnormamt, // 'vnormamt' |
2639 | | MCK_vnot, // 'vnot' |
2640 | | MCK_vor, // 'vor' |
2641 | | MCK_vpack, // 'vpack' |
2642 | | MCK_vpacke, // 'vpacke' |
2643 | | MCK_vpacko, // 'vpacko' |
2644 | | MCK_vpmpyh, // 'vpmpyh' |
2645 | | MCK_vpopcount, // 'vpopcount' |
2646 | | MCK_vraddh, // 'vraddh' |
2647 | | MCK_vraddub, // 'vraddub' |
2648 | | MCK_vradduh, // 'vradduh' |
2649 | | MCK_vrcmpyi, // 'vrcmpyi' |
2650 | | MCK_vrcmpyr, // 'vrcmpyr' |
2651 | | MCK_vrcmpys, // 'vrcmpys' |
2652 | | MCK_vrcnegh, // 'vrcnegh' |
2653 | | MCK_vrcrotate, // 'vrcrotate' |
2654 | | MCK_vrdelta, // 'vrdelta' |
2655 | | MCK_vrmaxh, // 'vrmaxh' |
2656 | | MCK_vrmaxuh, // 'vrmaxuh' |
2657 | | MCK_vrmaxuw, // 'vrmaxuw' |
2658 | | MCK_vrmaxw, // 'vrmaxw' |
2659 | | MCK_vrminh, // 'vrminh' |
2660 | | MCK_vrminuh, // 'vrminuh' |
2661 | | MCK_vrminuw, // 'vrminuw' |
2662 | | MCK_vrminw, // 'vrminw' |
2663 | | MCK_vrmpy, // 'vrmpy' |
2664 | | MCK_vrmpybsu, // 'vrmpybsu' |
2665 | | MCK_vrmpybu, // 'vrmpybu' |
2666 | | MCK_vrmpyh, // 'vrmpyh' |
2667 | | MCK_vrmpyweh, // 'vrmpyweh' |
2668 | | MCK_vrmpywoh, // 'vrmpywoh' |
2669 | | MCK_vrndwh, // 'vrndwh' |
2670 | | MCK_vror, // 'vror' |
2671 | | MCK_vround, // 'vround' |
2672 | | MCK_vrsad, // 'vrsad' |
2673 | | MCK_vrsadub, // 'vrsadub' |
2674 | | MCK_vsat, // 'vsat' |
2675 | | MCK_vsathb, // 'vsathb' |
2676 | | MCK_vsathub, // 'vsathub' |
2677 | | MCK_vsatwh, // 'vsatwh' |
2678 | | MCK_vsatwuh, // 'vsatwuh' |
2679 | | MCK_vsetq, // 'vsetq' |
2680 | | MCK_vshuff, // 'vshuff' |
2681 | | MCK_vshuffe, // 'vshuffe' |
2682 | | MCK_vshuffo, // 'vshuffo' |
2683 | | MCK_vshuffoe, // 'vshuffoe' |
2684 | | MCK_vsplat, // 'vsplat' |
2685 | | MCK_vsplatb, // 'vsplatb' |
2686 | | MCK_vsplath, // 'vsplath' |
2687 | | MCK_vspliceb, // 'vspliceb' |
2688 | | MCK_vsub, // 'vsub' |
2689 | | MCK_vsubb, // 'vsubb' |
2690 | | MCK_vsubh, // 'vsubh' |
2691 | | MCK_vsubub, // 'vsubub' |
2692 | | MCK_vsubuh, // 'vsubuh' |
2693 | | MCK_vsubw, // 'vsubw' |
2694 | | MCK_vswap, // 'vswap' |
2695 | | MCK_vsxt, // 'vsxt' |
2696 | | MCK_vsxtbh, // 'vsxtbh' |
2697 | | MCK_vsxthw, // 'vsxthw' |
2698 | | MCK_vtmpy, // 'vtmpy' |
2699 | | MCK_vtrunehb, // 'vtrunehb' |
2700 | | MCK_vtrunewh, // 'vtrunewh' |
2701 | | MCK_vtrunohb, // 'vtrunohb' |
2702 | | MCK_vtrunowh, // 'vtrunowh' |
2703 | | MCK_vunpack, // 'vunpack' |
2704 | | MCK_vunpacko, // 'vunpacko' |
2705 | | MCK_vvmem, // 'vvmem' |
2706 | | MCK_vxaddsubh, // 'vxaddsubh' |
2707 | | MCK_vxaddsubw, // 'vxaddsubw' |
2708 | | MCK_vxor, // 'vxor' |
2709 | | MCK_vxsubaddh, // 'vxsubaddh' |
2710 | | MCK_vxsubaddw, // 'vxsubaddw' |
2711 | | MCK_vzxt, // 'vzxt' |
2712 | | MCK_vzxtbh, // 'vzxtbh' |
2713 | | MCK_vzxthw, // 'vzxthw' |
2714 | | MCK_w, // 'w' |
2715 | | MCK_xor, // 'xor' |
2716 | | MCK_zxtb, // 'zxtb' |
2717 | | MCK_zxth, // 'zxth' |
2718 | | MCK__124_, // '|' |
2719 | | MCK__126_, // '~' |
2720 | | MCK_Reg16, // derived register class |
2721 | | MCK_Reg12, // derived register class |
2722 | | MCK_GP, // register class 'GP' |
2723 | | MCK_M0, // register class 'M0' |
2724 | | MCK_M1, // register class 'M1' |
2725 | | MCK_P0, // register class 'P0' |
2726 | | MCK_P1, // register class 'P1' |
2727 | | MCK_P3, // register class 'P3' |
2728 | | MCK_PC, // register class 'PC' |
2729 | | MCK_ModRegs, // register class 'ModRegs' |
2730 | | MCK_Reg2, // derived register class |
2731 | | MCK_PredRegs, // register class 'PredRegs' |
2732 | | MCK_VecPredRegs, // register class 'VecPredRegs,VecPredRegs128B' |
2733 | | MCK_CtrRegs64, // register class 'CtrRegs64' |
2734 | | MCK_IntRegsLow8, // register class 'IntRegsLow8' |
2735 | | MCK_DoubleRegs, // register class 'DoubleRegs' |
2736 | | MCK_VecDblRegs, // register class 'VecDblRegs,VecDblRegs128B' |
2737 | | MCK_CtrRegs, // register class 'CtrRegs' |
2738 | | MCK_IntRegs, // register class 'IntRegs' |
2739 | | MCK_VectorRegs, // register class 'VectorRegs,VectorRegs128B' |
2740 | | MCK_Imm, // user defined class 'ImmAsmOperand' |
2741 | | MCK_f32Ext, // user defined class 'f32ExtOperand' |
2742 | | MCK_n8Imm, // user defined class 'n8ImmOperand' |
2743 | | MCK_s10Ext, // user defined class 's10ExtOperand' |
2744 | | MCK_s11_0Ext, // user defined class 's11_0ExtOperand' |
2745 | | MCK_s11_1Ext, // user defined class 's11_1ExtOperand' |
2746 | | MCK_s11_2Ext, // user defined class 's11_2ExtOperand' |
2747 | | MCK_s11_3Ext, // user defined class 's11_3ExtOperand' |
2748 | | MCK_s12Ext, // user defined class 's12ExtOperand' |
2749 | | MCK_s16Ext, // user defined class 's16ExtOperand' |
2750 | | MCK_s32Imm, // user defined class 's32ImmOperand' |
2751 | | MCK_s3_6Imm, // user defined class 's3_6ImmOperand' |
2752 | | MCK_s4Imm, // user defined class 's4ImmOperand' |
2753 | | MCK_s4_0Imm, // user defined class 's4_0ImmOperand' |
2754 | | MCK_s4_1Imm, // user defined class 's4_1ImmOperand' |
2755 | | MCK_s4_2Imm, // user defined class 's4_2ImmOperand' |
2756 | | MCK_s4_3Imm, // user defined class 's4_3ImmOperand' |
2757 | | MCK_s4_6Imm, // user defined class 's4_6ImmOperand' |
2758 | | MCK_s6Ext, // user defined class 's6ExtOperand' |
2759 | | MCK_s6Imm, // user defined class 's6ImmOperand' |
2760 | | MCK_s7Ext, // user defined class 's7ExtOperand' |
2761 | | MCK_s8Ext, // user defined class 's8ExtOperand' |
2762 | | MCK_s8Imm64, // user defined class 's8Imm64Operand' |
2763 | | MCK_s8Imm, // user defined class 's8ImmOperand' |
2764 | | MCK_s9Ext, // user defined class 's9ExtOperand' |
2765 | | MCK_u10Ext, // user defined class 'u10ExtOperand' |
2766 | | MCK_u10Imm, // user defined class 'u10ImmOperand' |
2767 | | MCK_u11_3Imm, // user defined class 'u11_3ImmOperand' |
2768 | | MCK_u16Imm, // user defined class 'u16ImmOperand' |
2769 | | MCK_u16_0Imm, // user defined class 'u16_0ImmOperand' |
2770 | | MCK_u16_1Imm, // user defined class 'u16_1ImmOperand' |
2771 | | MCK_u16_2Imm, // user defined class 'u16_2ImmOperand' |
2772 | | MCK_u16_3Imm, // user defined class 'u16_3ImmOperand' |
2773 | | MCK_u1Imm, // user defined class 'u1ImmOperand' |
2774 | | MCK_u26_6Imm, // user defined class 'u26_6ImmOperand' |
2775 | | MCK_u2Imm, // user defined class 'u2ImmOperand' |
2776 | | MCK_u32Imm, // user defined class 'u32ImmOperand' |
2777 | | MCK_u32MustExt, // user defined class 'u32MustExtOperand' |
2778 | | MCK_u3Imm, // user defined class 'u3ImmOperand' |
2779 | | MCK_u4Imm, // user defined class 'u4ImmOperand' |
2780 | | MCK_u5Imm, // user defined class 'u5ImmOperand' |
2781 | | MCK_u64Imm, // user defined class 'u64ImmOperand' |
2782 | | MCK_u6Ext, // user defined class 'u6ExtOperand' |
2783 | | MCK_u6Imm, // user defined class 'u6ImmOperand' |
2784 | | MCK_u6_0Ext, // user defined class 'u6_0ExtOperand' |
2785 | | MCK_u6_0Imm, // user defined class 'u6_0ImmOperand' |
2786 | | MCK_u6_1Ext, // user defined class 'u6_1ExtOperand' |
2787 | | MCK_u6_1Imm, // user defined class 'u6_1ImmOperand' |
2788 | | MCK_u6_2Ext, // user defined class 'u6_2ExtOperand' |
2789 | | MCK_u6_2Imm, // user defined class 'u6_2ImmOperand' |
2790 | | MCK_u6_3Ext, // user defined class 'u6_3ExtOperand' |
2791 | | MCK_u6_3Imm, // user defined class 'u6_3ImmOperand' |
2792 | | MCK_u7Ext, // user defined class 'u7ExtOperand' |
2793 | | MCK_u7Imm, // user defined class 'u7ImmOperand' |
2794 | | MCK_u8Ext, // user defined class 'u8ExtOperand' |
2795 | | MCK_u8Imm, // user defined class 'u8ImmOperand' |
2796 | | MCK_u9Ext, // user defined class 'u9ExtOperand' |
2797 | | MCK_u9Imm, // user defined class 'u9ImmOperand' |
2798 | | NumMatchClassKinds |
2799 | | }; |
2800 | | |
2801 | | } |
2802 | | |
2803 | 231k | static MatchClassKind matchTokenString(StringRef Name) { |
2804 | 231k | switch (Name.size()) { |
2805 | 5.13k | default: break; |
2806 | 180k | case 1: // 25 strings to match. |
2807 | 180k | switch (Name[0]) { |
2808 | 6.51k | default: break; |
2809 | 8.45k | case '!': // 1 string to match. |
2810 | 8.45k | return MCK__EXCLAIM_; // "!" |
2811 | 63.2k | case '#': // 1 string to match. |
2812 | 63.2k | return MCK__35_; // "#" |
2813 | 10.8k | case '&': // 1 string to match. |
2814 | 10.8k | return MCK__38_; // "&" |
2815 | 3.17k | case '(': // 1 string to match. |
2816 | 3.17k | return MCK__40_; // "(" |
2817 | 3.10k | case ')': // 1 string to match. |
2818 | 3.10k | return MCK__41_; // ")" |
2819 | 1.12k | case '*': // 1 string to match. |
2820 | 1.12k | return MCK__STAR_; // "*" |
2821 | 1.12k | case '+': // 1 string to match. |
2822 | 1.12k | return MCK__43_; // "+" |
2823 | 2.81k | case '-': // 1 string to match. |
2824 | 2.81k | return MCK__MINUS_; // "-" |
2825 | 26.8k | case '.': // 1 string to match. |
2826 | 26.8k | return MCK__DOT_; // "." |
2827 | 3.65k | case '0': // 1 string to match. |
2828 | 3.65k | return MCK_0; // "0" |
2829 | 0 | case '1': // 1 string to match. |
2830 | 0 | return MCK_1; // "1" |
2831 | 3 | case ':': // 1 string to match. |
2832 | 3 | return MCK__COLON_; // ":" |
2833 | 0 | case ';': // 1 string to match. |
2834 | 0 | return MCK__59_; // ";" |
2835 | 0 | case '<': // 1 string to match. |
2836 | 0 | return MCK__LT_; // "<" |
2837 | 41.9k | case '=': // 1 string to match. |
2838 | 41.9k | return MCK__61_; // "=" |
2839 | 0 | case '>': // 1 string to match. |
2840 | 0 | return MCK__GT_; // ">" |
2841 | 0 | case 'I': // 1 string to match. |
2842 | 0 | return MCK_I; // "I" |
2843 | 6.10k | case '^': // 1 string to match. |
2844 | 6.10k | return MCK__94_; // "^" |
2845 | 0 | case 'b': // 1 string to match. |
2846 | 0 | return MCK_b; // "b" |
2847 | 7 | case 'h': // 1 string to match. |
2848 | 7 | return MCK_h; // "h" |
2849 | 47 | case 'l': // 1 string to match. |
2850 | 47 | return MCK_l; // "l" |
2851 | 0 | case 't': // 1 string to match. |
2852 | 0 | return MCK_t; // "t" |
2853 | 0 | case 'w': // 1 string to match. |
2854 | 0 | return MCK_w; // "w" |
2855 | 1.18k | case '|': // 1 string to match. |
2856 | 1.18k | return MCK__124_; // "|" |
2857 | 141 | case '~': // 1 string to match. |
2858 | 141 | return MCK__126_; // "~" |
2859 | 180k | } |
2860 | 6.51k | break; |
2861 | 6.51k | case 2: // 17 strings to match. |
2862 | 1.89k | switch (Name[0]) { |
2863 | 990 | default: break; |
2864 | 990 | case '-': // 1 string to match. |
2865 | 0 | if (Name[1] != '1') |
2866 | 0 | break; |
2867 | 0 | return MCK__MINUS_1; // "-1" |
2868 | 0 | case '1': // 1 string to match. |
2869 | 0 | if (Name[1] != '6') |
2870 | 0 | break; |
2871 | 0 | return MCK_16; // "16" |
2872 | 0 | case 'H': // 1 string to match. |
2873 | 0 | if (Name[1] != 'I') |
2874 | 0 | break; |
2875 | 0 | return MCK_HI; // "HI" |
2876 | 9 | case 'L': // 1 string to match. |
2877 | 9 | if (Name[1] != 'O') |
2878 | 0 | break; |
2879 | 9 | return MCK_LO; // "LO" |
2880 | 358 | case 'e': // 1 string to match. |
2881 | 358 | if (Name[1] != 'q') |
2882 | 358 | break; |
2883 | 0 | return MCK_eq; // "eq" |
2884 | 0 | case 'g': // 2 strings to match. |
2885 | 0 | switch (Name[1]) { |
2886 | 0 | default: break; |
2887 | 0 | case 'e': // 1 string to match. |
2888 | 0 | return MCK_ge; // "ge" |
2889 | 0 | case 't': // 1 string to match. |
2890 | 0 | return MCK_gt; // "gt" |
2891 | 0 | } |
2892 | 0 | break; |
2893 | 0 | case 'h': // 1 string to match. |
2894 | 0 | if (Name[1] != 'i') |
2895 | 0 | break; |
2896 | 0 | return MCK_hi; // "hi" |
2897 | 524 | case 'i': // 1 string to match. |
2898 | 524 | if (Name[1] != 'f') |
2899 | 173 | break; |
2900 | 351 | return MCK_if; // "if" |
2901 | 18 | case 'l': // 2 strings to match. |
2902 | 18 | switch (Name[1]) { |
2903 | 0 | default: break; |
2904 | 18 | case 'o': // 1 string to match. |
2905 | 18 | return MCK_lo; // "lo" |
2906 | 0 | case 't': // 1 string to match. |
2907 | 0 | return MCK_lt; // "lt" |
2908 | 18 | } |
2909 | 0 | break; |
2910 | 0 | case 'n': // 1 string to match. |
2911 | 0 | if (Name[1] != 't') |
2912 | 0 | break; |
2913 | 0 | return MCK_nt; // "nt" |
2914 | 0 | case 'o': // 1 string to match. |
2915 | 0 | if (Name[1] != 'r') |
2916 | 0 | break; |
2917 | 0 | return MCK_or; // "or" |
2918 | 0 | case 'u': // 4 strings to match. |
2919 | 0 | switch (Name[1]) { |
2920 | 0 | default: break; |
2921 | 0 | case 'b': // 1 string to match. |
2922 | 0 | return MCK_ub; // "ub" |
2923 | 0 | case 'h': // 1 string to match. |
2924 | 0 | return MCK_uh; // "uh" |
2925 | 0 | case 'o': // 1 string to match. |
2926 | 0 | return MCK_uo; // "uo" |
2927 | 0 | case 'w': // 1 string to match. |
2928 | 0 | return MCK_uw; // "uw" |
2929 | 0 | } |
2930 | 0 | break; |
2931 | 1.89k | } |
2932 | 1.52k | break; |
2933 | 10.7k | case 3: // 36 strings to match. |
2934 | 10.7k | switch (Name[0]) { |
2935 | 4.71k | default: break; |
2936 | 4.71k | case 'a': // 5 strings to match. |
2937 | 0 | switch (Name[1]) { |
2938 | 0 | default: break; |
2939 | 0 | case 'b': // 1 string to match. |
2940 | 0 | if (Name[2] != 's') |
2941 | 0 | break; |
2942 | 0 | return MCK_abs; // "abs" |
2943 | 0 | case 'd': // 1 string to match. |
2944 | 0 | if (Name[2] != 'd') |
2945 | 0 | break; |
2946 | 0 | return MCK_add; // "add" |
2947 | 0 | case 'n': // 1 string to match. |
2948 | 0 | if (Name[2] != 'd') |
2949 | 0 | break; |
2950 | 0 | return MCK_and; // "and" |
2951 | 0 | case 's': // 2 strings to match. |
2952 | 0 | switch (Name[2]) { |
2953 | 0 | default: break; |
2954 | 0 | case 'l': // 1 string to match. |
2955 | 0 | return MCK_asl; // "asl" |
2956 | 0 | case 'r': // 1 string to match. |
2957 | 0 | return MCK_asr; // "asr" |
2958 | 0 | } |
2959 | 0 | break; |
2960 | 0 | } |
2961 | 0 | break; |
2962 | 0 | case 'c': // 7 strings to match. |
2963 | 0 | switch (Name[1]) { |
2964 | 0 | default: break; |
2965 | 0 | case 'l': // 3 strings to match. |
2966 | 0 | switch (Name[2]) { |
2967 | 0 | default: break; |
2968 | 0 | case '0': // 1 string to match. |
2969 | 0 | return MCK_cl0; // "cl0" |
2970 | 0 | case '1': // 1 string to match. |
2971 | 0 | return MCK_cl1; // "cl1" |
2972 | 0 | case 'b': // 1 string to match. |
2973 | 0 | return MCK_clb; // "clb" |
2974 | 0 | } |
2975 | 0 | break; |
2976 | 0 | case 'm': // 1 string to match. |
2977 | 0 | if (Name[2] != 'p') |
2978 | 0 | break; |
2979 | 0 | return MCK_cmp; // "cmp" |
2980 | 0 | case 't': // 2 strings to match. |
2981 | 0 | switch (Name[2]) { |
2982 | 0 | default: break; |
2983 | 0 | case '0': // 1 string to match. |
2984 | 0 | return MCK_ct0; // "ct0" |
2985 | 0 | case '1': // 1 string to match. |
2986 | 0 | return MCK_ct1; // "ct1" |
2987 | 0 | } |
2988 | 0 | break; |
2989 | 0 | case 'u': // 1 string to match. |
2990 | 0 | if (Name[2] != 'r') |
2991 | 0 | break; |
2992 | 0 | return MCK_cur; // "cur" |
2993 | 0 | } |
2994 | 0 | break; |
2995 | 0 | case 'g': // 2 strings to match. |
2996 | 0 | switch (Name[1]) { |
2997 | 0 | default: break; |
2998 | 0 | case 'e': // 1 string to match. |
2999 | 0 | if (Name[2] != 'u') |
3000 | 0 | break; |
3001 | 0 | return MCK_geu; // "geu" |
3002 | 0 | case 't': // 1 string to match. |
3003 | 0 | if (Name[2] != 'u') |
3004 | 0 | break; |
3005 | 0 | return MCK_gtu; // "gtu" |
3006 | 0 | } |
3007 | 0 | break; |
3008 | 0 | case 'l': // 5 strings to match. |
3009 | 0 | switch (Name[1]) { |
3010 | 0 | default: break; |
3011 | 0 | case 'f': // 1 string to match. |
3012 | 0 | if (Name[2] != 's') |
3013 | 0 | break; |
3014 | 0 | return MCK_lfs; // "lfs" |
3015 | 0 | case 'i': // 1 string to match. |
3016 | 0 | if (Name[2] != 'b') |
3017 | 0 | break; |
3018 | 0 | return MCK_lib; // "lib" |
3019 | 0 | case 's': // 2 strings to match. |
3020 | 0 | switch (Name[2]) { |
3021 | 0 | default: break; |
3022 | 0 | case 'l': // 1 string to match. |
3023 | 0 | return MCK_lsl; // "lsl" |
3024 | 0 | case 'r': // 1 string to match. |
3025 | 0 | return MCK_lsr; // "lsr" |
3026 | 0 | } |
3027 | 0 | break; |
3028 | 0 | case 't': // 1 string to match. |
3029 | 0 | if (Name[2] != 'u') |
3030 | 0 | break; |
3031 | 0 | return MCK_ltu; // "ltu" |
3032 | 0 | } |
3033 | 0 | break; |
3034 | 1.25k | case 'm': // 4 strings to match. |
3035 | 1.25k | switch (Name[1]) { |
3036 | 900 | default: break; |
3037 | 900 | case 'a': // 1 string to match. |
3038 | 358 | if (Name[2] != 'x') |
3039 | 358 | break; |
3040 | 0 | return MCK_max; // "max" |
3041 | 0 | case 'i': // 1 string to match. |
3042 | 0 | if (Name[2] != 'n') |
3043 | 0 | break; |
3044 | 0 | return MCK_min; // "min" |
3045 | 0 | case 'p': // 1 string to match. |
3046 | 0 | if (Name[2] != 'y') |
3047 | 0 | break; |
3048 | 0 | return MCK_mpy; // "mpy" |
3049 | 0 | case 'u': // 1 string to match. |
3050 | 0 | if (Name[2] != 'x') |
3051 | 0 | break; |
3052 | 0 | return MCK_mux; // "mux" |
3053 | 1.25k | } |
3054 | 1.25k | break; |
3055 | 1.25k | case 'n': // 4 strings to match. |
3056 | 1 | switch (Name[1]) { |
3057 | 0 | default: break; |
3058 | 1 | case 'e': // 2 strings to match. |
3059 | 1 | switch (Name[2]) { |
3060 | 1 | default: break; |
3061 | 1 | case 'g': // 1 string to match. |
3062 | 0 | return MCK_neg; // "neg" |
3063 | 0 | case 'w': // 1 string to match. |
3064 | 0 | return MCK_new; // "new" |
3065 | 1 | } |
3066 | 1 | break; |
3067 | 1 | case 'o': // 2 strings to match. |
3068 | 0 | switch (Name[2]) { |
3069 | 0 | default: break; |
3070 | 0 | case 'p': // 1 string to match. |
3071 | 0 | return MCK_nop; // "nop" |
3072 | 0 | case 't': // 1 string to match. |
3073 | 0 | return MCK_not; // "not" |
3074 | 0 | } |
3075 | 0 | break; |
3076 | 1 | } |
3077 | 1 | break; |
3078 | 2.33k | case 'p': // 1 string to match. |
3079 | 2.33k | if (memcmp(Name.data()+1, "os", 2)) |
3080 | 2.33k | break; |
3081 | 0 | return MCK_pos; // "pos" |
3082 | 1.50k | case 'r': // 3 strings to match. |
3083 | 1.50k | switch (Name[1]) { |
3084 | 640 | default: break; |
3085 | 640 | case 'a': // 1 string to match. |
3086 | 374 | if (Name[2] != 'w') |
3087 | 374 | break; |
3088 | 0 | return MCK_raw; // "raw" |
3089 | 494 | case 'n': // 1 string to match. |
3090 | 494 | if (Name[2] != 'd') |
3091 | 494 | break; |
3092 | 0 | return MCK_rnd; // "rnd" |
3093 | 0 | case 'o': // 1 string to match. |
3094 | 0 | if (Name[2] != 'l') |
3095 | 0 | break; |
3096 | 0 | return MCK_rol; // "rol" |
3097 | 1.50k | } |
3098 | 1.50k | break; |
3099 | 1.50k | case 's': // 2 strings to match. |
3100 | 3 | switch (Name[1]) { |
3101 | 0 | default: break; |
3102 | 0 | case 'a': // 1 string to match. |
3103 | 0 | if (Name[2] != 't') |
3104 | 0 | break; |
3105 | 0 | return MCK_sat; // "sat" |
3106 | 3 | case 'u': // 1 string to match. |
3107 | 3 | if (Name[2] != 'b') |
3108 | 0 | break; |
3109 | 3 | return MCK_sub; // "sub" |
3110 | 3 | } |
3111 | 0 | break; |
3112 | 2 | case 't': // 1 string to match. |
3113 | 2 | if (memcmp(Name.data()+1, "mp", 2)) |
3114 | 2 | break; |
3115 | 0 | return MCK_tmp; // "tmp" |
3116 | 952 | case 'v': // 1 string to match. |
3117 | 952 | if (memcmp(Name.data()+1, "or", 2)) |
3118 | 952 | break; |
3119 | 0 | return MCK_vor; // "vor" |
3120 | 0 | case 'x': // 1 string to match. |
3121 | 0 | if (memcmp(Name.data()+1, "or", 2)) |
3122 | 0 | break; |
3123 | 0 | return MCK_xor; // "xor" |
3124 | 10.7k | } |
3125 | 10.7k | break; |
3126 | 10.7k | case 4: // 54 strings to match. |
3127 | 4.48k | switch (Name[0]) { |
3128 | 2.98k | default: break; |
3129 | 2.98k | case 'a': // 4 strings to match. |
3130 | 179 | switch (Name[1]) { |
3131 | 0 | default: break; |
3132 | 179 | case 'l': // 1 string to match. |
3133 | 179 | if (memcmp(Name.data()+2, "l8", 2)) |
3134 | 179 | break; |
3135 | 0 | return MCK_all8; // "all8" |
3136 | 0 | case 'n': // 1 string to match. |
3137 | 0 | if (memcmp(Name.data()+2, "y8", 2)) |
3138 | 0 | break; |
3139 | 0 | return MCK_any8; // "any8" |
3140 | 0 | case 's': // 2 strings to match. |
3141 | 0 | switch (Name[2]) { |
3142 | 0 | default: break; |
3143 | 0 | case 'l': // 1 string to match. |
3144 | 0 | if (Name[3] != 'h') |
3145 | 0 | break; |
3146 | 0 | return MCK_aslh; // "aslh" |
3147 | 0 | case 'r': // 1 string to match. |
3148 | 0 | if (Name[3] != 'h') |
3149 | 0 | break; |
3150 | 0 | return MCK_asrh; // "asrh" |
3151 | 0 | } |
3152 | 0 | break; |
3153 | 179 | } |
3154 | 179 | break; |
3155 | 179 | case 'b': // 1 string to match. |
3156 | 0 | if (memcmp(Name.data()+1, "rev", 3)) |
3157 | 0 | break; |
3158 | 0 | return MCK_brev; // "brev" |
3159 | 140 | case 'c': // 7 strings to match. |
3160 | 140 | switch (Name[1]) { |
3161 | 0 | default: break; |
3162 | 139 | case 'a': // 1 string to match. |
3163 | 139 | if (memcmp(Name.data()+2, "ll", 2)) |
3164 | 0 | break; |
3165 | 139 | return MCK_call; // "call" |
3166 | 0 | case 'h': // 1 string to match. |
3167 | 0 | if (memcmp(Name.data()+2, "op", 2)) |
3168 | 0 | break; |
3169 | 0 | return MCK_chop; // "chop" |
3170 | 1 | case 'i': // 1 string to match. |
3171 | 1 | if (memcmp(Name.data()+2, "rc", 2)) |
3172 | 1 | break; |
3173 | 0 | return MCK_circ; // "circ" |
3174 | 0 | case 'm': // 3 strings to match. |
3175 | 0 | if (Name[2] != 'p') |
3176 | 0 | break; |
3177 | 0 | switch (Name[3]) { |
3178 | 0 | default: break; |
3179 | 0 | case 'b': // 1 string to match. |
3180 | 0 | return MCK_cmpb; // "cmpb" |
3181 | 0 | case 'h': // 1 string to match. |
3182 | 0 | return MCK_cmph; // "cmph" |
3183 | 0 | case 'y': // 1 string to match. |
3184 | 0 | return MCK_cmpy; // "cmpy" |
3185 | 0 | } |
3186 | 0 | break; |
3187 | 0 | case 'r': // 1 string to match. |
3188 | 0 | if (memcmp(Name.data()+2, "nd", 2)) |
3189 | 0 | break; |
3190 | 0 | return MCK_crnd; // "crnd" |
3191 | 140 | } |
3192 | 1 | break; |
3193 | 1 | case 'h': // 1 string to match. |
3194 | 0 | if (memcmp(Name.data()+1, "i_W", 3)) |
3195 | 0 | break; |
3196 | 0 | return MCK_hi_95_W; // "hi_W" |
3197 | 6 | case 'j': // 1 string to match. |
3198 | 6 | if (memcmp(Name.data()+1, "ump", 3)) |
3199 | 3 | break; |
3200 | 3 | return MCK_jump; // "jump" |
3201 | 179 | case 'l': // 1 string to match. |
3202 | 179 | if (memcmp(Name.data()+1, "o_W", 3)) |
3203 | 179 | break; |
3204 | 0 | return MCK_lo_95_W; // "lo_W" |
3205 | 368 | case 'm': // 9 strings to match. |
3206 | 368 | switch (Name[1]) { |
3207 | 0 | default: break; |
3208 | 4 | case 'a': // 2 strings to match. |
3209 | 4 | switch (Name[2]) { |
3210 | 2 | default: break; |
3211 | 2 | case 's': // 1 string to match. |
3212 | 2 | if (Name[3] != 'k') |
3213 | 0 | break; |
3214 | 2 | return MCK_mask; // "mask" |
3215 | 0 | case 'x': // 1 string to match. |
3216 | 0 | if (Name[3] != 'u') |
3217 | 0 | break; |
3218 | 0 | return MCK_maxu; // "maxu" |
3219 | 4 | } |
3220 | 2 | break; |
3221 | 364 | case 'e': // 4 strings to match. |
3222 | 364 | if (Name[2] != 'm') |
3223 | 0 | break; |
3224 | 364 | switch (Name[3]) { |
3225 | 0 | default: break; |
3226 | 0 | case 'b': // 1 string to match. |
3227 | 0 | return MCK_memb; // "memb" |
3228 | 6 | case 'd': // 1 string to match. |
3229 | 6 | return MCK_memd; // "memd" |
3230 | 0 | case 'h': // 1 string to match. |
3231 | 0 | return MCK_memh; // "memh" |
3232 | 358 | case 'w': // 1 string to match. |
3233 | 358 | return MCK_memw; // "memw" |
3234 | 364 | } |
3235 | 0 | break; |
3236 | 0 | case 'i': // 1 string to match. |
3237 | 0 | if (memcmp(Name.data()+2, "nu", 2)) |
3238 | 0 | break; |
3239 | 0 | return MCK_minu; // "minu" |
3240 | 0 | case 'p': // 2 strings to match. |
3241 | 0 | if (Name[2] != 'y') |
3242 | 0 | break; |
3243 | 0 | switch (Name[3]) { |
3244 | 0 | default: break; |
3245 | 0 | case 'i': // 1 string to match. |
3246 | 0 | return MCK_mpyi; // "mpyi" |
3247 | 0 | case 'u': // 1 string to match. |
3248 | 0 | return MCK_mpyu; // "mpyu" |
3249 | 0 | } |
3250 | 0 | break; |
3251 | 368 | } |
3252 | 2 | break; |
3253 | 2 | case 's': // 6 strings to match. |
3254 | 0 | switch (Name[1]) { |
3255 | 0 | default: break; |
3256 | 0 | case 'a': // 2 strings to match. |
3257 | 0 | if (Name[2] != 't') |
3258 | 0 | break; |
3259 | 0 | switch (Name[3]) { |
3260 | 0 | default: break; |
3261 | 0 | case 'b': // 1 string to match. |
3262 | 0 | return MCK_satb; // "satb" |
3263 | 0 | case 'h': // 1 string to match. |
3264 | 0 | return MCK_sath; // "sath" |
3265 | 0 | } |
3266 | 0 | break; |
3267 | 0 | case 'w': // 1 string to match. |
3268 | 0 | if (memcmp(Name.data()+2, "iz", 2)) |
3269 | 0 | break; |
3270 | 0 | return MCK_swiz; // "swiz" |
3271 | 0 | case 'x': // 3 strings to match. |
3272 | 0 | if (Name[2] != 't') |
3273 | 0 | break; |
3274 | 0 | switch (Name[3]) { |
3275 | 0 | default: break; |
3276 | 0 | case 'b': // 1 string to match. |
3277 | 0 | return MCK_sxtb; // "sxtb" |
3278 | 0 | case 'h': // 1 string to match. |
3279 | 0 | return MCK_sxth; // "sxth" |
3280 | 0 | case 'w': // 1 string to match. |
3281 | 0 | return MCK_sxtw; // "sxtw" |
3282 | 0 | } |
3283 | 0 | break; |
3284 | 0 | } |
3285 | 0 | break; |
3286 | 628 | case 'v': // 22 strings to match. |
3287 | 628 | switch (Name[1]) { |
3288 | 253 | default: break; |
3289 | 253 | case 'a': // 6 strings to match. |
3290 | 2 | switch (Name[2]) { |
3291 | 2 | default: break; |
3292 | 2 | case 'b': // 1 string to match. |
3293 | 0 | if (Name[3] != 's') |
3294 | 0 | break; |
3295 | 0 | return MCK_vabs; // "vabs" |
3296 | 0 | case 'd': // 1 string to match. |
3297 | 0 | if (Name[3] != 'd') |
3298 | 0 | break; |
3299 | 0 | return MCK_vadd; // "vadd" |
3300 | 0 | case 'n': // 1 string to match. |
3301 | 0 | if (Name[3] != 'd') |
3302 | 0 | break; |
3303 | 0 | return MCK_vand; // "vand" |
3304 | 0 | case 's': // 2 strings to match. |
3305 | 0 | switch (Name[3]) { |
3306 | 0 | default: break; |
3307 | 0 | case 'l': // 1 string to match. |
3308 | 0 | return MCK_vasl; // "vasl" |
3309 | 0 | case 'r': // 1 string to match. |
3310 | 0 | return MCK_vasr; // "vasr" |
3311 | 0 | } |
3312 | 0 | break; |
3313 | 0 | case 'v': // 1 string to match. |
3314 | 0 | if (Name[3] != 'g') |
3315 | 0 | break; |
3316 | 0 | return MCK_vavg; // "vavg" |
3317 | 2 | } |
3318 | 2 | break; |
3319 | 2 | case 'c': // 2 strings to match. |
3320 | 0 | switch (Name[2]) { |
3321 | 0 | default: break; |
3322 | 0 | case 'l': // 1 string to match. |
3323 | 0 | if (Name[3] != '0') |
3324 | 0 | break; |
3325 | 0 | return MCK_vcl0; // "vcl0" |
3326 | 0 | case 'm': // 1 string to match. |
3327 | 0 | if (Name[3] != 'p') |
3328 | 0 | break; |
3329 | 0 | return MCK_vcmp; // "vcmp" |
3330 | 0 | } |
3331 | 0 | break; |
3332 | 0 | case 'l': // 1 string to match. |
3333 | 0 | if (memcmp(Name.data()+2, "sr", 2)) |
3334 | 0 | break; |
3335 | 0 | return MCK_vlsr; // "vlsr" |
3336 | 373 | case 'm': // 6 strings to match. |
3337 | 373 | switch (Name[2]) { |
3338 | 12 | default: break; |
3339 | 12 | case 'a': // 1 string to match. |
3340 | 0 | if (Name[3] != 'x') |
3341 | 0 | break; |
3342 | 0 | return MCK_vmax; // "vmax" |
3343 | 3 | case 'e': // 1 string to match. |
3344 | 3 | if (Name[3] != 'm') |
3345 | 0 | break; |
3346 | 3 | return MCK_vmem; // "vmem" |
3347 | 0 | case 'i': // 1 string to match. |
3348 | 0 | if (Name[3] != 'n') |
3349 | 0 | break; |
3350 | 0 | return MCK_vmin; // "vmin" |
3351 | 358 | case 'p': // 2 strings to match. |
3352 | 358 | switch (Name[3]) { |
3353 | 358 | default: break; |
3354 | 358 | case 'a': // 1 string to match. |
3355 | 0 | return MCK_vmpa; // "vmpa" |
3356 | 0 | case 'y': // 1 string to match. |
3357 | 0 | return MCK_vmpy; // "vmpy" |
3358 | 358 | } |
3359 | 358 | break; |
3360 | 358 | case 'u': // 1 string to match. |
3361 | 0 | if (Name[3] != 'x') |
3362 | 0 | break; |
3363 | 0 | return MCK_vmux; // "vmux" |
3364 | 373 | } |
3365 | 370 | break; |
3366 | 370 | case 'n': // 1 string to match. |
3367 | 0 | if (memcmp(Name.data()+2, "ot", 2)) |
3368 | 0 | break; |
3369 | 0 | return MCK_vnot; // "vnot" |
3370 | 0 | case 'r': // 1 string to match. |
3371 | 0 | if (memcmp(Name.data()+2, "or", 2)) |
3372 | 0 | break; |
3373 | 0 | return MCK_vror; // "vror" |
3374 | 0 | case 's': // 3 strings to match. |
3375 | 0 | switch (Name[2]) { |
3376 | 0 | default: break; |
3377 | 0 | case 'a': // 1 string to match. |
3378 | 0 | if (Name[3] != 't') |
3379 | 0 | break; |
3380 | 0 | return MCK_vsat; // "vsat" |
3381 | 0 | case 'u': // 1 string to match. |
3382 | 0 | if (Name[3] != 'b') |
3383 | 0 | break; |
3384 | 0 | return MCK_vsub; // "vsub" |
3385 | 0 | case 'x': // 1 string to match. |
3386 | 0 | if (Name[3] != 't') |
3387 | 0 | break; |
3388 | 0 | return MCK_vsxt; // "vsxt" |
3389 | 0 | } |
3390 | 0 | break; |
3391 | 0 | case 'x': // 1 string to match. |
3392 | 0 | if (memcmp(Name.data()+2, "or", 2)) |
3393 | 0 | break; |
3394 | 0 | return MCK_vxor; // "vxor" |
3395 | 0 | case 'z': // 1 string to match. |
3396 | 0 | if (memcmp(Name.data()+2, "xt", 2)) |
3397 | 0 | break; |
3398 | 0 | return MCK_vzxt; // "vzxt" |
3399 | 628 | } |
3400 | 625 | break; |
3401 | 625 | case 'z': // 2 strings to match. |
3402 | 0 | if (memcmp(Name.data()+1, "xt", 2)) |
3403 | 0 | break; |
3404 | 0 | switch (Name[3]) { |
3405 | 0 | default: break; |
3406 | 0 | case 'b': // 1 string to match. |
3407 | 0 | return MCK_zxtb; // "zxtb" |
3408 | 0 | case 'h': // 1 string to match. |
3409 | 0 | return MCK_zxth; // "zxth" |
3410 | 0 | } |
3411 | 0 | break; |
3412 | 4.48k | } |
3413 | 3.97k | break; |
3414 | 4.85k | case 5: // 73 strings to match. |
3415 | 4.85k | switch (Name[0]) { |
3416 | 3.91k | default: break; |
3417 | 3.91k | case 'c': // 4 strings to match. |
3418 | 11 | switch (Name[1]) { |
3419 | 0 | default: break; |
3420 | 11 | case 'a': // 2 strings to match. |
3421 | 11 | switch (Name[2]) { |
3422 | 0 | default: break; |
3423 | 11 | case 'l': // 1 string to match. |
3424 | 11 | if (memcmp(Name.data()+3, "lr", 2)) |
3425 | 11 | break; |
3426 | 0 | return MCK_callr; // "callr" |
3427 | 0 | case 'r': // 1 string to match. |
3428 | 0 | if (memcmp(Name.data()+3, "ry", 2)) |
3429 | 0 | break; |
3430 | 0 | return MCK_carry; // "carry" |
3431 | 11 | } |
3432 | 11 | break; |
3433 | 11 | case 'm': // 2 strings to match. |
3434 | 0 | if (memcmp(Name.data()+2, "py", 2)) |
3435 | 0 | break; |
3436 | 0 | switch (Name[4]) { |
3437 | 0 | default: break; |
3438 | 0 | case 'i': // 1 string to match. |
3439 | 0 | return MCK_cmpyi; // "cmpyi" |
3440 | 0 | case 'r': // 1 string to match. |
3441 | 0 | return MCK_cmpyr; // "cmpyr" |
3442 | 0 | } |
3443 | 0 | break; |
3444 | 11 | } |
3445 | 11 | break; |
3446 | 11 | case 'd': // 1 string to match. |
3447 | 0 | if (memcmp(Name.data()+1, "fcmp", 4)) |
3448 | 0 | break; |
3449 | 0 | return MCK_dfcmp; // "dfcmp" |
3450 | 0 | case 'i': // 1 string to match. |
3451 | 0 | if (memcmp(Name.data()+1, "sync", 4)) |
3452 | 0 | break; |
3453 | 0 | return MCK_isync; // "isync" |
3454 | 0 | case 'j': // 1 string to match. |
3455 | 0 | if (memcmp(Name.data()+1, "umpr", 4)) |
3456 | 0 | break; |
3457 | 0 | return MCK_jumpr; // "jumpr" |
3458 | 0 | case 'l': // 2 strings to match. |
3459 | 0 | if (memcmp(Name.data()+1, "oop", 3)) |
3460 | 0 | break; |
3461 | 0 | switch (Name[4]) { |
3462 | 0 | default: break; |
3463 | 0 | case '0': // 1 string to match. |
3464 | 0 | return MCK_loop0; // "loop0" |
3465 | 0 | case '1': // 1 string to match. |
3466 | 0 | return MCK_loop1; // "loop1" |
3467 | 0 | } |
3468 | 0 | break; |
3469 | 0 | case 'm': // 5 strings to match. |
3470 | 0 | switch (Name[1]) { |
3471 | 0 | default: break; |
3472 | 0 | case 'e': // 3 strings to match. |
3473 | 0 | if (Name[2] != 'm') |
3474 | 0 | break; |
3475 | 0 | switch (Name[3]) { |
3476 | 0 | default: break; |
3477 | 0 | case 'b': // 1 string to match. |
3478 | 0 | if (Name[4] != 'h') |
3479 | 0 | break; |
3480 | 0 | return MCK_membh; // "membh" |
3481 | 0 | case 'u': // 2 strings to match. |
3482 | 0 | switch (Name[4]) { |
3483 | 0 | default: break; |
3484 | 0 | case 'b': // 1 string to match. |
3485 | 0 | return MCK_memub; // "memub" |
3486 | 0 | case 'h': // 1 string to match. |
3487 | 0 | return MCK_memuh; // "memuh" |
3488 | 0 | } |
3489 | 0 | break; |
3490 | 0 | } |
3491 | 0 | break; |
3492 | 0 | case 'p': // 2 strings to match. |
3493 | 0 | if (Name[2] != 'y') |
3494 | 0 | break; |
3495 | 0 | switch (Name[3]) { |
3496 | 0 | default: break; |
3497 | 0 | case 's': // 1 string to match. |
3498 | 0 | if (Name[4] != 'u') |
3499 | 0 | break; |
3500 | 0 | return MCK_mpysu; // "mpysu" |
3501 | 0 | case 'u': // 1 string to match. |
3502 | 0 | if (Name[4] != 'i') |
3503 | 0 | break; |
3504 | 0 | return MCK_mpyui; // "mpyui" |
3505 | 0 | } |
3506 | 0 | break; |
3507 | 0 | } |
3508 | 0 | break; |
3509 | 0 | case 'p': // 1 string to match. |
3510 | 0 | if (memcmp(Name.data()+1, "mpyw", 4)) |
3511 | 0 | break; |
3512 | 0 | return MCK_pmpyw; // "pmpyw" |
3513 | 0 | case 'r': // 1 string to match. |
3514 | 0 | if (memcmp(Name.data()+1, "ound", 4)) |
3515 | 0 | break; |
3516 | 0 | return MCK_round; // "round" |
3517 | 1 | case 's': // 10 strings to match. |
3518 | 1 | switch (Name[1]) { |
3519 | 0 | default: break; |
3520 | 0 | case 'a': // 2 strings to match. |
3521 | 0 | if (memcmp(Name.data()+2, "tu", 2)) |
3522 | 0 | break; |
3523 | 0 | switch (Name[4]) { |
3524 | 0 | default: break; |
3525 | 0 | case 'b': // 1 string to match. |
3526 | 0 | return MCK_satub; // "satub" |
3527 | 0 | case 'h': // 1 string to match. |
3528 | 0 | return MCK_satuh; // "satuh" |
3529 | 0 | } |
3530 | 0 | break; |
3531 | 1 | case 'c': // 1 string to match. |
3532 | 1 | if (memcmp(Name.data()+2, "ale", 3)) |
3533 | 1 | break; |
3534 | 0 | return MCK_scale; // "scale" |
3535 | 0 | case 'f': // 6 strings to match. |
3536 | 0 | switch (Name[2]) { |
3537 | 0 | default: break; |
3538 | 0 | case 'a': // 1 string to match. |
3539 | 0 | if (memcmp(Name.data()+3, "dd", 2)) |
3540 | 0 | break; |
3541 | 0 | return MCK_sfadd; // "sfadd" |
3542 | 0 | case 'c': // 1 string to match. |
3543 | 0 | if (memcmp(Name.data()+3, "mp", 2)) |
3544 | 0 | break; |
3545 | 0 | return MCK_sfcmp; // "sfcmp" |
3546 | 0 | case 'm': // 3 strings to match. |
3547 | 0 | switch (Name[3]) { |
3548 | 0 | default: break; |
3549 | 0 | case 'a': // 1 string to match. |
3550 | 0 | if (Name[4] != 'x') |
3551 | 0 | break; |
3552 | 0 | return MCK_sfmax; // "sfmax" |
3553 | 0 | case 'i': // 1 string to match. |
3554 | 0 | if (Name[4] != 'n') |
3555 | 0 | break; |
3556 | 0 | return MCK_sfmin; // "sfmin" |
3557 | 0 | case 'p': // 1 string to match. |
3558 | 0 | if (Name[4] != 'y') |
3559 | 0 | break; |
3560 | 0 | return MCK_sfmpy; // "sfmpy" |
3561 | 0 | } |
3562 | 0 | break; |
3563 | 0 | case 's': // 1 string to match. |
3564 | 0 | if (memcmp(Name.data()+3, "ub", 2)) |
3565 | 0 | break; |
3566 | 0 | return MCK_sfsub; // "sfsub" |
3567 | 0 | } |
3568 | 0 | break; |
3569 | 0 | case 'h': // 1 string to match. |
3570 | 0 | if (memcmp(Name.data()+2, "ift", 3)) |
3571 | 0 | break; |
3572 | 0 | return MCK_shift; // "shift" |
3573 | 1 | } |
3574 | 1 | break; |
3575 | 751 | case 't': // 1 string to match. |
3576 | 751 | if (memcmp(Name.data()+1, "race", 4)) |
3577 | 1 | break; |
3578 | 750 | return MCK_trace; // "trace" |
3579 | 172 | case 'v': // 46 strings to match. |
3580 | 172 | switch (Name[1]) { |
3581 | 34 | default: break; |
3582 | 34 | case 'a': // 12 strings to match. |
3583 | 0 | switch (Name[2]) { |
3584 | 0 | default: break; |
3585 | 0 | case 'b': // 2 strings to match. |
3586 | 0 | if (Name[3] != 's') |
3587 | 0 | break; |
3588 | 0 | switch (Name[4]) { |
3589 | 0 | default: break; |
3590 | 0 | case 'h': // 1 string to match. |
3591 | 0 | return MCK_vabsh; // "vabsh" |
3592 | 0 | case 'w': // 1 string to match. |
3593 | 0 | return MCK_vabsw; // "vabsw" |
3594 | 0 | } |
3595 | 0 | break; |
3596 | 0 | case 'c': // 1 string to match. |
3597 | 0 | if (memcmp(Name.data()+3, "sh", 2)) |
3598 | 0 | break; |
3599 | 0 | return MCK_vacsh; // "vacsh" |
3600 | 0 | case 'd': // 3 strings to match. |
3601 | 0 | if (Name[3] != 'd') |
3602 | 0 | break; |
3603 | 0 | switch (Name[4]) { |
3604 | 0 | default: break; |
3605 | 0 | case 'b': // 1 string to match. |
3606 | 0 | return MCK_vaddb; // "vaddb" |
3607 | 0 | case 'h': // 1 string to match. |
3608 | 0 | return MCK_vaddh; // "vaddh" |
3609 | 0 | case 'w': // 1 string to match. |
3610 | 0 | return MCK_vaddw; // "vaddw" |
3611 | 0 | } |
3612 | 0 | break; |
3613 | 0 | case 's': // 4 strings to match. |
3614 | 0 | switch (Name[3]) { |
3615 | 0 | default: break; |
3616 | 0 | case 'l': // 2 strings to match. |
3617 | 0 | switch (Name[4]) { |
3618 | 0 | default: break; |
3619 | 0 | case 'h': // 1 string to match. |
3620 | 0 | return MCK_vaslh; // "vaslh" |
3621 | 0 | case 'w': // 1 string to match. |
3622 | 0 | return MCK_vaslw; // "vaslw" |
3623 | 0 | } |
3624 | 0 | break; |
3625 | 0 | case 'r': // 2 strings to match. |
3626 | 0 | switch (Name[4]) { |
3627 | 0 | default: break; |
3628 | 0 | case 'h': // 1 string to match. |
3629 | 0 | return MCK_vasrh; // "vasrh" |
3630 | 0 | case 'w': // 1 string to match. |
3631 | 0 | return MCK_vasrw; // "vasrw" |
3632 | 0 | } |
3633 | 0 | break; |
3634 | 0 | } |
3635 | 0 | break; |
3636 | 0 | case 'v': // 2 strings to match. |
3637 | 0 | if (Name[3] != 'g') |
3638 | 0 | break; |
3639 | 0 | switch (Name[4]) { |
3640 | 0 | default: break; |
3641 | 0 | case 'h': // 1 string to match. |
3642 | 0 | return MCK_vavgh; // "vavgh" |
3643 | 0 | case 'w': // 1 string to match. |
3644 | 0 | return MCK_vavgw; // "vavgw" |
3645 | 0 | } |
3646 | 0 | break; |
3647 | 0 | } |
3648 | 0 | break; |
3649 | 2 | case 'c': // 4 strings to match. |
3650 | 2 | switch (Name[2]) { |
3651 | 0 | default: break; |
3652 | 2 | case 'm': // 3 strings to match. |
3653 | 2 | if (Name[3] != 'p') |
3654 | 0 | break; |
3655 | 2 | switch (Name[4]) { |
3656 | 0 | default: break; |
3657 | 0 | case 'b': // 1 string to match. |
3658 | 0 | return MCK_vcmpb; // "vcmpb" |
3659 | 2 | case 'h': // 1 string to match. |
3660 | 2 | return MCK_vcmph; // "vcmph" |
3661 | 0 | case 'w': // 1 string to match. |
3662 | 0 | return MCK_vcmpw; // "vcmpw" |
3663 | 2 | } |
3664 | 0 | break; |
3665 | 0 | case 'o': // 1 string to match. |
3666 | 0 | if (memcmp(Name.data()+3, "nj", 2)) |
3667 | 0 | break; |
3668 | 0 | return MCK_vconj; // "vconj" |
3669 | 2 | } |
3670 | 0 | break; |
3671 | 6 | case 'd': // 3 strings to match. |
3672 | 6 | switch (Name[2]) { |
3673 | 0 | default: break; |
3674 | 0 | case 'e': // 1 string to match. |
3675 | 0 | if (memcmp(Name.data()+3, "al", 2)) |
3676 | 0 | break; |
3677 | 0 | return MCK_vdeal; // "vdeal" |
3678 | 0 | case 'm': // 1 string to match. |
3679 | 0 | if (memcmp(Name.data()+3, "py", 2)) |
3680 | 0 | break; |
3681 | 0 | return MCK_vdmpy; // "vdmpy" |
3682 | 6 | case 's': // 1 string to match. |
3683 | 6 | if (memcmp(Name.data()+3, "ad", 2)) |
3684 | 6 | break; |
3685 | 0 | return MCK_vdsad; // "vdsad" |
3686 | 6 | } |
3687 | 6 | break; |
3688 | 6 | case 'h': // 1 string to match. |
3689 | 0 | if (memcmp(Name.data()+2, "ist", 3)) |
3690 | 0 | break; |
3691 | 0 | return MCK_vhist; // "vhist" |
3692 | 3 | case 'l': // 4 strings to match. |
3693 | 3 | if (Name[2] != 's') |
3694 | 2 | break; |
3695 | 1 | switch (Name[3]) { |
3696 | 0 | default: break; |
3697 | 0 | case 'l': // 2 strings to match. |
3698 | 0 | switch (Name[4]) { |
3699 | 0 | default: break; |
3700 | 0 | case 'h': // 1 string to match. |
3701 | 0 | return MCK_vlslh; // "vlslh" |
3702 | 0 | case 'w': // 1 string to match. |
3703 | 0 | return MCK_vlslw; // "vlslw" |
3704 | 0 | } |
3705 | 0 | break; |
3706 | 1 | case 'r': // 2 strings to match. |
3707 | 1 | switch (Name[4]) { |
3708 | 1 | default: break; |
3709 | 1 | case 'h': // 1 string to match. |
3710 | 0 | return MCK_vlsrh; // "vlsrh" |
3711 | 0 | case 'w': // 1 string to match. |
3712 | 0 | return MCK_vlsrw; // "vlsrw" |
3713 | 1 | } |
3714 | 1 | break; |
3715 | 1 | } |
3716 | 1 | break; |
3717 | 5 | case 'm': // 11 strings to match. |
3718 | 5 | switch (Name[2]) { |
3719 | 0 | default: break; |
3720 | 0 | case 'a': // 3 strings to match. |
3721 | 0 | if (Name[3] != 'x') |
3722 | 0 | break; |
3723 | 0 | switch (Name[4]) { |
3724 | 0 | default: break; |
3725 | 0 | case 'b': // 1 string to match. |
3726 | 0 | return MCK_vmaxb; // "vmaxb" |
3727 | 0 | case 'h': // 1 string to match. |
3728 | 0 | return MCK_vmaxh; // "vmaxh" |
3729 | 0 | case 'w': // 1 string to match. |
3730 | 0 | return MCK_vmaxw; // "vmaxw" |
3731 | 0 | } |
3732 | 0 | break; |
3733 | 5 | case 'e': // 1 string to match. |
3734 | 5 | if (memcmp(Name.data()+3, "mu", 2)) |
3735 | 0 | break; |
3736 | 5 | return MCK_vmemu; // "vmemu" |
3737 | 0 | case 'i': // 3 strings to match. |
3738 | 0 | if (Name[3] != 'n') |
3739 | 0 | break; |
3740 | 0 | switch (Name[4]) { |
3741 | 0 | default: break; |
3742 | 0 | case 'b': // 1 string to match. |
3743 | 0 | return MCK_vminb; // "vminb" |
3744 | 0 | case 'h': // 1 string to match. |
3745 | 0 | return MCK_vminh; // "vminh" |
3746 | 0 | case 'w': // 1 string to match. |
3747 | 0 | return MCK_vminw; // "vminw" |
3748 | 0 | } |
3749 | 0 | break; |
3750 | 0 | case 'p': // 4 strings to match. |
3751 | 0 | if (Name[3] != 'y') |
3752 | 0 | break; |
3753 | 0 | switch (Name[4]) { |
3754 | 0 | default: break; |
3755 | 0 | case 'e': // 1 string to match. |
3756 | 0 | return MCK_vmpye; // "vmpye" |
3757 | 0 | case 'h': // 1 string to match. |
3758 | 0 | return MCK_vmpyh; // "vmpyh" |
3759 | 0 | case 'i': // 1 string to match. |
3760 | 0 | return MCK_vmpyi; // "vmpyi" |
3761 | 0 | case 'o': // 1 string to match. |
3762 | 0 | return MCK_vmpyo; // "vmpyo" |
3763 | 0 | } |
3764 | 0 | break; |
3765 | 5 | } |
3766 | 0 | break; |
3767 | 0 | case 'n': // 1 string to match. |
3768 | 0 | if (memcmp(Name.data()+2, "avg", 3)) |
3769 | 0 | break; |
3770 | 0 | return MCK_vnavg; // "vnavg" |
3771 | 0 | case 'p': // 1 string to match. |
3772 | 0 | if (memcmp(Name.data()+2, "ack", 3)) |
3773 | 0 | break; |
3774 | 0 | return MCK_vpack; // "vpack" |
3775 | 90 | case 'r': // 2 strings to match. |
3776 | 90 | switch (Name[2]) { |
3777 | 0 | default: break; |
3778 | 90 | case 'm': // 1 string to match. |
3779 | 90 | if (memcmp(Name.data()+3, "py", 2)) |
3780 | 90 | break; |
3781 | 0 | return MCK_vrmpy; // "vrmpy" |
3782 | 0 | case 's': // 1 string to match. |
3783 | 0 | if (memcmp(Name.data()+3, "ad", 2)) |
3784 | 0 | break; |
3785 | 0 | return MCK_vrsad; // "vrsad" |
3786 | 90 | } |
3787 | 90 | break; |
3788 | 90 | case 's': // 5 strings to match. |
3789 | 32 | switch (Name[2]) { |
3790 | 1 | default: break; |
3791 | 1 | case 'e': // 1 string to match. |
3792 | 0 | if (memcmp(Name.data()+3, "tq", 2)) |
3793 | 0 | break; |
3794 | 0 | return MCK_vsetq; // "vsetq" |
3795 | 31 | case 'u': // 3 strings to match. |
3796 | 31 | if (Name[3] != 'b') |
3797 | 29 | break; |
3798 | 2 | switch (Name[4]) { |
3799 | 2 | default: break; |
3800 | 2 | case 'b': // 1 string to match. |
3801 | 0 | return MCK_vsubb; // "vsubb" |
3802 | 0 | case 'h': // 1 string to match. |
3803 | 0 | return MCK_vsubh; // "vsubh" |
3804 | 0 | case 'w': // 1 string to match. |
3805 | 0 | return MCK_vsubw; // "vsubw" |
3806 | 2 | } |
3807 | 2 | break; |
3808 | 2 | case 'w': // 1 string to match. |
3809 | 0 | if (memcmp(Name.data()+3, "ap", 2)) |
3810 | 0 | break; |
3811 | 0 | return MCK_vswap; // "vswap" |
3812 | 32 | } |
3813 | 32 | break; |
3814 | 32 | case 't': // 1 string to match. |
3815 | 0 | if (memcmp(Name.data()+2, "mpy", 3)) |
3816 | 0 | break; |
3817 | 0 | return MCK_vtmpy; // "vtmpy" |
3818 | 0 | case 'v': // 1 string to match. |
3819 | 0 | if (memcmp(Name.data()+2, "mem", 3)) |
3820 | 0 | break; |
3821 | 0 | return MCK_vvmem; // "vvmem" |
3822 | 172 | } |
3823 | 165 | break; |
3824 | 4.85k | } |
3825 | 4.09k | break; |
3826 | 6.45k | case 6: // 64 strings to match. |
3827 | 6.45k | switch (Name[0]) { |
3828 | 2.38k | default: break; |
3829 | 2.38k | case 'a': // 2 strings to match. |
3830 | 46 | switch (Name[1]) { |
3831 | 46 | default: break; |
3832 | 46 | case 'd': // 1 string to match. |
3833 | 0 | if (memcmp(Name.data()+2, "dasl", 4)) |
3834 | 0 | break; |
3835 | 0 | return MCK_addasl; // "addasl" |
3836 | 0 | case 's': // 1 string to match. |
3837 | 0 | if (memcmp(Name.data()+2, "rrnd", 4)) |
3838 | 0 | break; |
3839 | 0 | return MCK_asrrnd; // "asrrnd" |
3840 | 46 | } |
3841 | 46 | break; |
3842 | 399 | case 'c': // 2 strings to match. |
3843 | 399 | switch (Name[1]) { |
3844 | 133 | default: break; |
3845 | 266 | case 'l': // 1 string to match. |
3846 | 266 | if (memcmp(Name.data()+2, "rbit", 4)) |
3847 | 266 | break; |
3848 | 0 | return MCK_clrbit; // "clrbit" |
3849 | 0 | case 'r': // 1 string to match. |
3850 | 0 | if (memcmp(Name.data()+2, "ound", 4)) |
3851 | 0 | break; |
3852 | 0 | return MCK_cround; // "cround" |
3853 | 399 | } |
3854 | 399 | break; |
3855 | 399 | case 'd': // 3 strings to match. |
3856 | 306 | switch (Name[1]) { |
3857 | 0 | default: break; |
3858 | 6 | case 'c': // 1 string to match. |
3859 | 6 | if (memcmp(Name.data()+2, "inva", 4)) |
3860 | 0 | break; |
3861 | 6 | return MCK_dcinva; // "dcinva" |
3862 | 300 | case 'e': // 1 string to match. |
3863 | 300 | if (memcmp(Name.data()+2, "cbin", 4)) |
3864 | 300 | break; |
3865 | 0 | return MCK_decbin; // "decbin" |
3866 | 0 | case 'f': // 1 string to match. |
3867 | 0 | if (memcmp(Name.data()+2, "make", 4)) |
3868 | 0 | break; |
3869 | 0 | return MCK_dfmake; // "dfmake" |
3870 | 306 | } |
3871 | 300 | break; |
3872 | 300 | case 'e': // 1 string to match. |
3873 | 0 | if (memcmp(Name.data()+1, "ncbin", 5)) |
3874 | 0 | break; |
3875 | 0 | return MCK_encbin; // "encbin" |
3876 | 0 | case 'h': // 1 string to match. |
3877 | 0 | if (memcmp(Name.data()+1, "intjr", 5)) |
3878 | 0 | break; |
3879 | 0 | return MCK_hintjr; // "hintjr" |
3880 | 2 | case 'i': // 2 strings to match. |
3881 | 2 | switch (Name[1]) { |
3882 | 0 | default: break; |
3883 | 0 | case 'c': // 1 string to match. |
3884 | 0 | if (memcmp(Name.data()+2, "inva", 4)) |
3885 | 0 | break; |
3886 | 0 | return MCK_icinva; // "icinva" |
3887 | 2 | case 'n': // 1 string to match. |
3888 | 2 | if (memcmp(Name.data()+2, "sert", 4)) |
3889 | 2 | break; |
3890 | 0 | return MCK_insert; // "insert" |
3891 | 2 | } |
3892 | 2 | break; |
3893 | 2 | case 'm': // 1 string to match. |
3894 | 0 | if (memcmp(Name.data()+1, "emubh", 5)) |
3895 | 0 | break; |
3896 | 0 | return MCK_memubh; // "memubh" |
3897 | 0 | case 'p': // 2 strings to match. |
3898 | 0 | if (Name[1] != 'a') |
3899 | 0 | break; |
3900 | 0 | switch (Name[2]) { |
3901 | 0 | default: break; |
3902 | 0 | case 'c': // 1 string to match. |
3903 | 0 | if (memcmp(Name.data()+3, "khl", 3)) |
3904 | 0 | break; |
3905 | 0 | return MCK_packhl; // "packhl" |
3906 | 0 | case 'r': // 1 string to match. |
3907 | 0 | if (memcmp(Name.data()+3, "ity", 3)) |
3908 | 0 | break; |
3909 | 0 | return MCK_parity; // "parity" |
3910 | 0 | } |
3911 | 0 | break; |
3912 | 1.97k | case 's': // 3 strings to match. |
3913 | 1.97k | switch (Name[1]) { |
3914 | 988 | default: break; |
3915 | 988 | case 'e': // 1 string to match. |
3916 | 0 | if (memcmp(Name.data()+2, "tbit", 4)) |
3917 | 0 | break; |
3918 | 0 | return MCK_setbit; // "setbit" |
3919 | 0 | case 'f': // 1 string to match. |
3920 | 0 | if (memcmp(Name.data()+2, "make", 4)) |
3921 | 0 | break; |
3922 | 0 | return MCK_sfmake; // "sfmake" |
3923 | 990 | case 'y': // 1 string to match. |
3924 | 990 | if (memcmp(Name.data()+2, "ncht", 4)) |
3925 | 989 | break; |
3926 | 1 | return MCK_syncht; // "syncht" |
3927 | 1.97k | } |
3928 | 1.97k | break; |
3929 | 1.97k | case 't': // 1 string to match. |
3930 | 1 | if (memcmp(Name.data()+1, "stbit", 5)) |
3931 | 1 | break; |
3932 | 0 | return MCK_tstbit; // "tstbit" |
3933 | 1.34k | case 'v': // 46 strings to match. |
3934 | 1.34k | switch (Name[1]) { |
3935 | 0 | default: break; |
3936 | 896 | case 'a': // 6 strings to match. |
3937 | 896 | switch (Name[2]) { |
3938 | 133 | default: break; |
3939 | 266 | case 'd': // 2 strings to match. |
3940 | 266 | if (memcmp(Name.data()+3, "du", 2)) |
3941 | 0 | break; |
3942 | 266 | switch (Name[5]) { |
3943 | 266 | default: break; |
3944 | 266 | case 'b': // 1 string to match. |
3945 | 0 | return MCK_vaddub; // "vaddub" |
3946 | 0 | case 'h': // 1 string to match. |
3947 | 0 | return MCK_vadduh; // "vadduh" |
3948 | 266 | } |
3949 | 266 | break; |
3950 | 497 | case 'l': // 1 string to match. |
3951 | 497 | if (memcmp(Name.data()+3, "ign", 3)) |
3952 | 139 | break; |
3953 | 358 | return MCK_valign; // "valign" |
3954 | 0 | case 'v': // 3 strings to match. |
3955 | 0 | if (memcmp(Name.data()+3, "gu", 2)) |
3956 | 0 | break; |
3957 | 0 | switch (Name[5]) { |
3958 | 0 | default: break; |
3959 | 0 | case 'b': // 1 string to match. |
3960 | 0 | return MCK_vavgub; // "vavgub" |
3961 | 0 | case 'h': // 1 string to match. |
3962 | 0 | return MCK_vavguh; // "vavguh" |
3963 | 0 | case 'w': // 1 string to match. |
3964 | 0 | return MCK_vavguw; // "vavguw" |
3965 | 0 | } |
3966 | 0 | break; |
3967 | 896 | } |
3968 | 538 | break; |
3969 | 538 | case 'c': // 3 strings to match. |
3970 | 0 | switch (Name[2]) { |
3971 | 0 | default: break; |
3972 | 0 | case 'm': // 2 strings to match. |
3973 | 0 | if (memcmp(Name.data()+3, "py", 2)) |
3974 | 0 | break; |
3975 | 0 | switch (Name[5]) { |
3976 | 0 | default: break; |
3977 | 0 | case 'i': // 1 string to match. |
3978 | 0 | return MCK_vcmpyi; // "vcmpyi" |
3979 | 0 | case 'r': // 1 string to match. |
3980 | 0 | return MCK_vcmpyr; // "vcmpyr" |
3981 | 0 | } |
3982 | 0 | break; |
3983 | 0 | case 'n': // 1 string to match. |
3984 | 0 | if (memcmp(Name.data()+3, "egh", 3)) |
3985 | 0 | break; |
3986 | 0 | return MCK_vcnegh; // "vcnegh" |
3987 | 0 | } |
3988 | 0 | break; |
3989 | 0 | case 'd': // 2 strings to match. |
3990 | 0 | if (Name[2] != 'e') |
3991 | 0 | break; |
3992 | 0 | switch (Name[3]) { |
3993 | 0 | default: break; |
3994 | 0 | case 'a': // 1 string to match. |
3995 | 0 | if (memcmp(Name.data()+4, "le", 2)) |
3996 | 0 | break; |
3997 | 0 | return MCK_vdeale; // "vdeale" |
3998 | 0 | case 'l': // 1 string to match. |
3999 | 0 | if (memcmp(Name.data()+4, "ta", 2)) |
4000 | 0 | break; |
4001 | 0 | return MCK_vdelta; // "vdelta" |
4002 | 0 | } |
4003 | 0 | break; |
4004 | 0 | case 'l': // 2 strings to match. |
4005 | 0 | if (memcmp(Name.data()+2, "ut", 2)) |
4006 | 0 | break; |
4007 | 0 | switch (Name[4]) { |
4008 | 0 | default: break; |
4009 | 0 | case '1': // 1 string to match. |
4010 | 0 | if (Name[5] != '6') |
4011 | 0 | break; |
4012 | 0 | return MCK_vlut16; // "vlut16" |
4013 | 0 | case '3': // 1 string to match. |
4014 | 0 | if (Name[5] != '2') |
4015 | 0 | break; |
4016 | 0 | return MCK_vlut32; // "vlut32" |
4017 | 0 | } |
4018 | 0 | break; |
4019 | 24 | case 'm': // 10 strings to match. |
4020 | 24 | switch (Name[2]) { |
4021 | 0 | default: break; |
4022 | 24 | case 'a': // 3 strings to match. |
4023 | 24 | if (memcmp(Name.data()+3, "xu", 2)) |
4024 | 24 | break; |
4025 | 0 | switch (Name[5]) { |
4026 | 0 | default: break; |
4027 | 0 | case 'b': // 1 string to match. |
4028 | 0 | return MCK_vmaxub; // "vmaxub" |
4029 | 0 | case 'h': // 1 string to match. |
4030 | 0 | return MCK_vmaxuh; // "vmaxuh" |
4031 | 0 | case 'w': // 1 string to match. |
4032 | 0 | return MCK_vmaxuw; // "vmaxuw" |
4033 | 0 | } |
4034 | 0 | break; |
4035 | 0 | case 'i': // 3 strings to match. |
4036 | 0 | if (memcmp(Name.data()+3, "nu", 2)) |
4037 | 0 | break; |
4038 | 0 | switch (Name[5]) { |
4039 | 0 | default: break; |
4040 | 0 | case 'b': // 1 string to match. |
4041 | 0 | return MCK_vminub; // "vminub" |
4042 | 0 | case 'h': // 1 string to match. |
4043 | 0 | return MCK_vminuh; // "vminuh" |
4044 | 0 | case 'w': // 1 string to match. |
4045 | 0 | return MCK_vminuw; // "vminuw" |
4046 | 0 | } |
4047 | 0 | break; |
4048 | 0 | case 'p': // 4 strings to match. |
4049 | 0 | if (Name[3] != 'y') |
4050 | 0 | break; |
4051 | 0 | switch (Name[4]) { |
4052 | 0 | default: break; |
4053 | 0 | case 'b': // 1 string to match. |
4054 | 0 | if (Name[5] != 'u') |
4055 | 0 | break; |
4056 | 0 | return MCK_vmpybu; // "vmpybu" |
4057 | 0 | case 'e': // 1 string to match. |
4058 | 0 | if (Name[5] != 'h') |
4059 | 0 | break; |
4060 | 0 | return MCK_vmpyeh; // "vmpyeh" |
4061 | 0 | case 'i': // 2 strings to match. |
4062 | 0 | switch (Name[5]) { |
4063 | 0 | default: break; |
4064 | 0 | case 'e': // 1 string to match. |
4065 | 0 | return MCK_vmpyie; // "vmpyie" |
4066 | 0 | case 'o': // 1 string to match. |
4067 | 0 | return MCK_vmpyio; // "vmpyio" |
4068 | 0 | } |
4069 | 0 | break; |
4070 | 0 | } |
4071 | 0 | break; |
4072 | 24 | } |
4073 | 24 | break; |
4074 | 24 | case 'n': // 2 strings to match. |
4075 | 14 | if (memcmp(Name.data()+2, "avg", 3)) |
4076 | 14 | break; |
4077 | 0 | switch (Name[5]) { |
4078 | 0 | default: break; |
4079 | 0 | case 'h': // 1 string to match. |
4080 | 0 | return MCK_vnavgh; // "vnavgh" |
4081 | 0 | case 'w': // 1 string to match. |
4082 | 0 | return MCK_vnavgw; // "vnavgw" |
4083 | 0 | } |
4084 | 0 | break; |
4085 | 358 | case 'p': // 3 strings to match. |
4086 | 358 | switch (Name[2]) { |
4087 | 179 | default: break; |
4088 | 179 | case 'a': // 2 strings to match. |
4089 | 0 | if (memcmp(Name.data()+3, "ck", 2)) |
4090 | 0 | break; |
4091 | 0 | switch (Name[5]) { |
4092 | 0 | default: break; |
4093 | 0 | case 'e': // 1 string to match. |
4094 | 0 | return MCK_vpacke; // "vpacke" |
4095 | 0 | case 'o': // 1 string to match. |
4096 | 0 | return MCK_vpacko; // "vpacko" |
4097 | 0 | } |
4098 | 0 | break; |
4099 | 179 | case 'm': // 1 string to match. |
4100 | 179 | if (memcmp(Name.data()+3, "pyh", 3)) |
4101 | 179 | break; |
4102 | 0 | return MCK_vpmpyh; // "vpmpyh" |
4103 | 358 | } |
4104 | 358 | break; |
4105 | 358 | case 'r': // 8 strings to match. |
4106 | 0 | switch (Name[2]) { |
4107 | 0 | default: break; |
4108 | 0 | case 'a': // 1 string to match. |
4109 | 0 | if (memcmp(Name.data()+3, "ddh", 3)) |
4110 | 0 | break; |
4111 | 0 | return MCK_vraddh; // "vraddh" |
4112 | 0 | case 'm': // 5 strings to match. |
4113 | 0 | switch (Name[3]) { |
4114 | 0 | default: break; |
4115 | 0 | case 'a': // 2 strings to match. |
4116 | 0 | if (Name[4] != 'x') |
4117 | 0 | break; |
4118 | 0 | switch (Name[5]) { |
4119 | 0 | default: break; |
4120 | 0 | case 'h': // 1 string to match. |
4121 | 0 | return MCK_vrmaxh; // "vrmaxh" |
4122 | 0 | case 'w': // 1 string to match. |
4123 | 0 | return MCK_vrmaxw; // "vrmaxw" |
4124 | 0 | } |
4125 | 0 | break; |
4126 | 0 | case 'i': // 2 strings to match. |
4127 | 0 | if (Name[4] != 'n') |
4128 | 0 | break; |
4129 | 0 | switch (Name[5]) { |
4130 | 0 | default: break; |
4131 | 0 | case 'h': // 1 string to match. |
4132 | 0 | return MCK_vrminh; // "vrminh" |
4133 | 0 | case 'w': // 1 string to match. |
4134 | 0 | return MCK_vrminw; // "vrminw" |
4135 | 0 | } |
4136 | 0 | break; |
4137 | 0 | case 'p': // 1 string to match. |
4138 | 0 | if (memcmp(Name.data()+4, "yh", 2)) |
4139 | 0 | break; |
4140 | 0 | return MCK_vrmpyh; // "vrmpyh" |
4141 | 0 | } |
4142 | 0 | break; |
4143 | 0 | case 'n': // 1 string to match. |
4144 | 0 | if (memcmp(Name.data()+3, "dwh", 3)) |
4145 | 0 | break; |
4146 | 0 | return MCK_vrndwh; // "vrndwh" |
4147 | 0 | case 'o': // 1 string to match. |
4148 | 0 | if (memcmp(Name.data()+3, "und", 3)) |
4149 | 0 | break; |
4150 | 0 | return MCK_vround; // "vround" |
4151 | 0 | } |
4152 | 0 | break; |
4153 | 49 | case 's': // 8 strings to match. |
4154 | 49 | switch (Name[2]) { |
4155 | 2 | default: break; |
4156 | 2 | case 'a': // 2 strings to match. |
4157 | 0 | if (Name[3] != 't') |
4158 | 0 | break; |
4159 | 0 | switch (Name[4]) { |
4160 | 0 | default: break; |
4161 | 0 | case 'h': // 1 string to match. |
4162 | 0 | if (Name[5] != 'b') |
4163 | 0 | break; |
4164 | 0 | return MCK_vsathb; // "vsathb" |
4165 | 0 | case 'w': // 1 string to match. |
4166 | 0 | if (Name[5] != 'h') |
4167 | 0 | break; |
4168 | 0 | return MCK_vsatwh; // "vsatwh" |
4169 | 0 | } |
4170 | 0 | break; |
4171 | 0 | case 'h': // 1 string to match. |
4172 | 0 | if (memcmp(Name.data()+3, "uff", 3)) |
4173 | 0 | break; |
4174 | 0 | return MCK_vshuff; // "vshuff" |
4175 | 0 | case 'p': // 1 string to match. |
4176 | 0 | if (memcmp(Name.data()+3, "lat", 3)) |
4177 | 0 | break; |
4178 | 0 | return MCK_vsplat; // "vsplat" |
4179 | 45 | case 'u': // 2 strings to match. |
4180 | 45 | if (memcmp(Name.data()+3, "bu", 2)) |
4181 | 45 | break; |
4182 | 0 | switch (Name[5]) { |
4183 | 0 | default: break; |
4184 | 0 | case 'b': // 1 string to match. |
4185 | 0 | return MCK_vsubub; // "vsubub" |
4186 | 0 | case 'h': // 1 string to match. |
4187 | 0 | return MCK_vsubuh; // "vsubuh" |
4188 | 0 | } |
4189 | 0 | break; |
4190 | 2 | case 'x': // 2 strings to match. |
4191 | 2 | if (Name[3] != 't') |
4192 | 0 | break; |
4193 | 2 | switch (Name[4]) { |
4194 | 0 | default: break; |
4195 | 2 | case 'b': // 1 string to match. |
4196 | 2 | if (Name[5] != 'h') |
4197 | 2 | break; |
4198 | 0 | return MCK_vsxtbh; // "vsxtbh" |
4199 | 0 | case 'h': // 1 string to match. |
4200 | 0 | if (Name[5] != 'w') |
4201 | 0 | break; |
4202 | 0 | return MCK_vsxthw; // "vsxthw" |
4203 | 2 | } |
4204 | 2 | break; |
4205 | 49 | } |
4206 | 49 | break; |
4207 | 49 | case 'z': // 2 strings to match. |
4208 | 0 | if (memcmp(Name.data()+2, "xt", 2)) |
4209 | 0 | break; |
4210 | 0 | switch (Name[4]) { |
4211 | 0 | default: break; |
4212 | 0 | case 'b': // 1 string to match. |
4213 | 0 | if (Name[5] != 'h') |
4214 | 0 | break; |
4215 | 0 | return MCK_vzxtbh; // "vzxtbh" |
4216 | 0 | case 'h': // 1 string to match. |
4217 | 0 | if (Name[5] != 'w') |
4218 | 0 | break; |
4219 | 0 | return MCK_vzxthw; // "vzxthw" |
4220 | 0 | } |
4221 | 0 | break; |
4222 | 1.34k | } |
4223 | 983 | break; |
4224 | 6.45k | } |
4225 | 6.09k | break; |
4226 | 6.71k | case 7: // 52 strings to match. |
4227 | 6.71k | switch (Name[0]) { |
4228 | 4.12k | default: break; |
4229 | 4.12k | case 'C': // 2 strings to match. |
4230 | 21 | if (memcmp(Name.data()+1, "ONST", 4)) |
4231 | 2 | break; |
4232 | 19 | switch (Name[5]) { |
4233 | 1 | default: break; |
4234 | 18 | case '3': // 1 string to match. |
4235 | 18 | if (Name[6] != '2') |
4236 | 18 | break; |
4237 | 0 | return MCK_CONST32; // "CONST32" |
4238 | 0 | case '6': // 1 string to match. |
4239 | 0 | if (Name[6] != '4') |
4240 | 0 | break; |
4241 | 0 | return MCK_CONST64; // "CONST64" |
4242 | 19 | } |
4243 | 19 | break; |
4244 | 19 | case 'b': // 3 strings to match. |
4245 | 0 | switch (Name[1]) { |
4246 | 0 | default: break; |
4247 | 0 | case 'a': // 1 string to match. |
4248 | 0 | if (memcmp(Name.data()+2, "rrier", 5)) |
4249 | 0 | break; |
4250 | 0 | return MCK_barrier; // "barrier" |
4251 | 0 | case 'i': // 2 strings to match. |
4252 | 0 | if (memcmp(Name.data()+2, "ts", 2)) |
4253 | 0 | break; |
4254 | 0 | switch (Name[4]) { |
4255 | 0 | default: break; |
4256 | 0 | case 'c': // 1 string to match. |
4257 | 0 | if (memcmp(Name.data()+5, "lr", 2)) |
4258 | 0 | break; |
4259 | 0 | return MCK_bitsclr; // "bitsclr" |
4260 | 0 | case 's': // 1 string to match. |
4261 | 0 | if (memcmp(Name.data()+5, "et", 2)) |
4262 | 0 | break; |
4263 | 0 | return MCK_bitsset; // "bitsset" |
4264 | 0 | } |
4265 | 0 | break; |
4266 | 0 | } |
4267 | 0 | break; |
4268 | 36 | case 'c': // 3 strings to match. |
4269 | 36 | switch (Name[1]) { |
4270 | 17 | default: break; |
4271 | 17 | case 'm': // 2 strings to match. |
4272 | 0 | if (memcmp(Name.data()+2, "py", 2)) |
4273 | 0 | break; |
4274 | 0 | switch (Name[4]) { |
4275 | 0 | default: break; |
4276 | 0 | case 'i': // 1 string to match. |
4277 | 0 | if (memcmp(Name.data()+5, "wh", 2)) |
4278 | 0 | break; |
4279 | 0 | return MCK_cmpyiwh; // "cmpyiwh" |
4280 | 0 | case 'r': // 1 string to match. |
4281 | 0 | if (memcmp(Name.data()+5, "wh", 2)) |
4282 | 0 | break; |
4283 | 0 | return MCK_cmpyrwh; // "cmpyrwh" |
4284 | 0 | } |
4285 | 0 | break; |
4286 | 19 | case 'o': // 1 string to match. |
4287 | 19 | if (memcmp(Name.data()+2, "mbine", 5)) |
4288 | 19 | break; |
4289 | 0 | return MCK_combine; // "combine" |
4290 | 36 | } |
4291 | 36 | break; |
4292 | 1.28k | case 'd': // 3 strings to match. |
4293 | 1.28k | switch (Name[1]) { |
4294 | 300 | default: break; |
4295 | 988 | case 'c': // 2 strings to match. |
4296 | 988 | switch (Name[2]) { |
4297 | 0 | default: break; |
4298 | 0 | case 'f': // 1 string to match. |
4299 | 0 | if (memcmp(Name.data()+3, "etch", 4)) |
4300 | 0 | break; |
4301 | 0 | return MCK_dcfetch; // "dcfetch" |
4302 | 988 | case 'z': // 1 string to match. |
4303 | 988 | if (memcmp(Name.data()+3, "eroa", 4)) |
4304 | 988 | break; |
4305 | 0 | return MCK_dczeroa; // "dczeroa" |
4306 | 988 | } |
4307 | 988 | break; |
4308 | 988 | case 'f': // 1 string to match. |
4309 | 0 | if (memcmp(Name.data()+2, "class", 5)) |
4310 | 0 | break; |
4311 | 0 | return MCK_dfclass; // "dfclass" |
4312 | 1.28k | } |
4313 | 1.28k | break; |
4314 | 1.28k | case 'e': // 1 string to match. |
4315 | 300 | if (memcmp(Name.data()+1, "xtract", 6)) |
4316 | 300 | break; |
4317 | 0 | return MCK_extract; // "extract" |
4318 | 0 | case 'l': // 2 strings to match. |
4319 | 0 | if (Name[1] != '2') |
4320 | 0 | break; |
4321 | 0 | switch (Name[2]) { |
4322 | 0 | default: break; |
4323 | 0 | case 'f': // 1 string to match. |
4324 | 0 | if (memcmp(Name.data()+3, "etch", 4)) |
4325 | 0 | break; |
4326 | 0 | return MCK_l2fetch; // "l2fetch" |
4327 | 0 | case 'l': // 1 string to match. |
4328 | 0 | if (memcmp(Name.data()+3, "ocka", 4)) |
4329 | 0 | break; |
4330 | 0 | return MCK_l2locka; // "l2locka" |
4331 | 0 | } |
4332 | 0 | break; |
4333 | 494 | case 'm': // 1 string to match. |
4334 | 494 | if (memcmp(Name.data()+1, "odwrap", 6)) |
4335 | 0 | break; |
4336 | 494 | return MCK_modwrap; // "modwrap" |
4337 | 0 | case 'n': // 1 string to match. |
4338 | 0 | if (memcmp(Name.data()+1, "ormamt", 6)) |
4339 | 0 | break; |
4340 | 0 | return MCK_normamt; // "normamt" |
4341 | 0 | case 's': // 5 strings to match. |
4342 | 0 | switch (Name[1]) { |
4343 | 0 | default: break; |
4344 | 0 | case 'f': // 1 string to match. |
4345 | 0 | if (memcmp(Name.data()+2, "class", 5)) |
4346 | 0 | break; |
4347 | 0 | return MCK_sfclass; // "sfclass" |
4348 | 0 | case 'h': // 4 strings to match. |
4349 | 0 | if (memcmp(Name.data()+2, "uff", 3)) |
4350 | 0 | break; |
4351 | 0 | switch (Name[5]) { |
4352 | 0 | default: break; |
4353 | 0 | case 'e': // 2 strings to match. |
4354 | 0 | switch (Name[6]) { |
4355 | 0 | default: break; |
4356 | 0 | case 'b': // 1 string to match. |
4357 | 0 | return MCK_shuffeb; // "shuffeb" |
4358 | 0 | case 'h': // 1 string to match. |
4359 | 0 | return MCK_shuffeh; // "shuffeh" |
4360 | 0 | } |
4361 | 0 | break; |
4362 | 0 | case 'o': // 2 strings to match. |
4363 | 0 | switch (Name[6]) { |
4364 | 0 | default: break; |
4365 | 0 | case 'b': // 1 string to match. |
4366 | 0 | return MCK_shuffob; // "shuffob" |
4367 | 0 | case 'h': // 1 string to match. |
4368 | 0 | return MCK_shuffoh; // "shuffoh" |
4369 | 0 | } |
4370 | 0 | break; |
4371 | 0 | } |
4372 | 0 | break; |
4373 | 0 | } |
4374 | 0 | break; |
4375 | 445 | case 'v': // 31 strings to match. |
4376 | 445 | switch (Name[1]) { |
4377 | 0 | default: break; |
4378 | 0 | case 'a': // 3 strings to match. |
4379 | 0 | switch (Name[2]) { |
4380 | 0 | default: break; |
4381 | 0 | case 'd': // 1 string to match. |
4382 | 0 | if (memcmp(Name.data()+3, "dhub", 4)) |
4383 | 0 | break; |
4384 | 0 | return MCK_vaddhub; // "vaddhub" |
4385 | 0 | case 'l': // 1 string to match. |
4386 | 0 | if (memcmp(Name.data()+3, "ignb", 4)) |
4387 | 0 | break; |
4388 | 0 | return MCK_valignb; // "valignb" |
4389 | 0 | case 's': // 1 string to match. |
4390 | 0 | if (memcmp(Name.data()+3, "rhub", 4)) |
4391 | 0 | break; |
4392 | 0 | return MCK_vasrhub; // "vasrhub" |
4393 | 0 | } |
4394 | 0 | break; |
4395 | 0 | case 'i': // 2 strings to match. |
4396 | 0 | switch (Name[2]) { |
4397 | 0 | default: break; |
4398 | 0 | case 'n': // 1 string to match. |
4399 | 0 | if (memcmp(Name.data()+3, "sert", 4)) |
4400 | 0 | break; |
4401 | 0 | return MCK_vinsert; // "vinsert" |
4402 | 0 | case 't': // 1 string to match. |
4403 | 0 | if (memcmp(Name.data()+3, "pack", 4)) |
4404 | 0 | break; |
4405 | 0 | return MCK_vitpack; // "vitpack" |
4406 | 0 | } |
4407 | 0 | break; |
4408 | 0 | case 'l': // 1 string to match. |
4409 | 0 | if (memcmp(Name.data()+2, "align", 5)) |
4410 | 0 | break; |
4411 | 0 | return MCK_vlalign; // "vlalign" |
4412 | 36 | case 'm': // 5 strings to match. |
4413 | 36 | if (memcmp(Name.data()+2, "py", 2)) |
4414 | 28 | break; |
4415 | 8 | switch (Name[4]) { |
4416 | 0 | default: break; |
4417 | 7 | case 'b': // 1 string to match. |
4418 | 7 | if (memcmp(Name.data()+5, "su", 2)) |
4419 | 7 | break; |
4420 | 0 | return MCK_vmpybsu; // "vmpybsu" |
4421 | 1 | case 'h': // 1 string to match. |
4422 | 1 | if (memcmp(Name.data()+5, "su", 2)) |
4423 | 1 | break; |
4424 | 0 | return MCK_vmpyhsu; // "vmpyhsu" |
4425 | 0 | case 'i': // 1 string to match. |
4426 | 0 | if (memcmp(Name.data()+5, "eo", 2)) |
4427 | 0 | break; |
4428 | 0 | return MCK_vmpyieo; // "vmpyieo" |
4429 | 0 | case 'w': // 2 strings to match. |
4430 | 0 | switch (Name[5]) { |
4431 | 0 | default: break; |
4432 | 0 | case 'e': // 1 string to match. |
4433 | 0 | if (Name[6] != 'h') |
4434 | 0 | break; |
4435 | 0 | return MCK_vmpyweh; // "vmpyweh" |
4436 | 0 | case 'o': // 1 string to match. |
4437 | 0 | if (Name[6] != 'h') |
4438 | 0 | break; |
4439 | 0 | return MCK_vmpywoh; // "vmpywoh" |
4440 | 0 | } |
4441 | 0 | break; |
4442 | 8 | } |
4443 | 8 | break; |
4444 | 374 | case 'r': // 13 strings to match. |
4445 | 374 | switch (Name[2]) { |
4446 | 0 | default: break; |
4447 | 0 | case 'a': // 2 strings to match. |
4448 | 0 | if (memcmp(Name.data()+3, "ddu", 3)) |
4449 | 0 | break; |
4450 | 0 | switch (Name[6]) { |
4451 | 0 | default: break; |
4452 | 0 | case 'b': // 1 string to match. |
4453 | 0 | return MCK_vraddub; // "vraddub" |
4454 | 0 | case 'h': // 1 string to match. |
4455 | 0 | return MCK_vradduh; // "vradduh" |
4456 | 0 | } |
4457 | 0 | break; |
4458 | 374 | case 'c': // 4 strings to match. |
4459 | 374 | switch (Name[3]) { |
4460 | 0 | default: break; |
4461 | 374 | case 'm': // 3 strings to match. |
4462 | 374 | if (memcmp(Name.data()+4, "py", 2)) |
4463 | 374 | break; |
4464 | 0 | switch (Name[6]) { |
4465 | 0 | default: break; |
4466 | 0 | case 'i': // 1 string to match. |
4467 | 0 | return MCK_vrcmpyi; // "vrcmpyi" |
4468 | 0 | case 'r': // 1 string to match. |
4469 | 0 | return MCK_vrcmpyr; // "vrcmpyr" |
4470 | 0 | case 's': // 1 string to match. |
4471 | 0 | return MCK_vrcmpys; // "vrcmpys" |
4472 | 0 | } |
4473 | 0 | break; |
4474 | 0 | case 'n': // 1 string to match. |
4475 | 0 | if (memcmp(Name.data()+4, "egh", 3)) |
4476 | 0 | break; |
4477 | 0 | return MCK_vrcnegh; // "vrcnegh" |
4478 | 374 | } |
4479 | 374 | break; |
4480 | 374 | case 'd': // 1 string to match. |
4481 | 0 | if (memcmp(Name.data()+3, "elta", 4)) |
4482 | 0 | break; |
4483 | 0 | return MCK_vrdelta; // "vrdelta" |
4484 | 0 | case 'm': // 5 strings to match. |
4485 | 0 | switch (Name[3]) { |
4486 | 0 | default: break; |
4487 | 0 | case 'a': // 2 strings to match. |
4488 | 0 | if (memcmp(Name.data()+4, "xu", 2)) |
4489 | 0 | break; |
4490 | 0 | switch (Name[6]) { |
4491 | 0 | default: break; |
4492 | 0 | case 'h': // 1 string to match. |
4493 | 0 | return MCK_vrmaxuh; // "vrmaxuh" |
4494 | 0 | case 'w': // 1 string to match. |
4495 | 0 | return MCK_vrmaxuw; // "vrmaxuw" |
4496 | 0 | } |
4497 | 0 | break; |
4498 | 0 | case 'i': // 2 strings to match. |
4499 | 0 | if (memcmp(Name.data()+4, "nu", 2)) |
4500 | 0 | break; |
4501 | 0 | switch (Name[6]) { |
4502 | 0 | default: break; |
4503 | 0 | case 'h': // 1 string to match. |
4504 | 0 | return MCK_vrminuh; // "vrminuh" |
4505 | 0 | case 'w': // 1 string to match. |
4506 | 0 | return MCK_vrminuw; // "vrminuw" |
4507 | 0 | } |
4508 | 0 | break; |
4509 | 0 | case 'p': // 1 string to match. |
4510 | 0 | if (memcmp(Name.data()+4, "ybu", 3)) |
4511 | 0 | break; |
4512 | 0 | return MCK_vrmpybu; // "vrmpybu" |
4513 | 0 | } |
4514 | 0 | break; |
4515 | 0 | case 's': // 1 string to match. |
4516 | 0 | if (memcmp(Name.data()+3, "adub", 4)) |
4517 | 0 | break; |
4518 | 0 | return MCK_vrsadub; // "vrsadub" |
4519 | 374 | } |
4520 | 374 | break; |
4521 | 374 | case 's': // 6 strings to match. |
4522 | 35 | switch (Name[2]) { |
4523 | 17 | default: break; |
4524 | 18 | case 'a': // 2 strings to match. |
4525 | 18 | if (Name[3] != 't') |
4526 | 0 | break; |
4527 | 18 | switch (Name[4]) { |
4528 | 0 | default: break; |
4529 | 0 | case 'h': // 1 string to match. |
4530 | 0 | if (memcmp(Name.data()+5, "ub", 2)) |
4531 | 0 | break; |
4532 | 0 | return MCK_vsathub; // "vsathub" |
4533 | 18 | case 'w': // 1 string to match. |
4534 | 18 | if (memcmp(Name.data()+5, "uh", 2)) |
4535 | 18 | break; |
4536 | 0 | return MCK_vsatwuh; // "vsatwuh" |
4537 | 18 | } |
4538 | 18 | break; |
4539 | 18 | case 'h': // 2 strings to match. |
4540 | 0 | if (memcmp(Name.data()+3, "uff", 3)) |
4541 | 0 | break; |
4542 | 0 | switch (Name[6]) { |
4543 | 0 | default: break; |
4544 | 0 | case 'e': // 1 string to match. |
4545 | 0 | return MCK_vshuffe; // "vshuffe" |
4546 | 0 | case 'o': // 1 string to match. |
4547 | 0 | return MCK_vshuffo; // "vshuffo" |
4548 | 0 | } |
4549 | 0 | break; |
4550 | 0 | case 'p': // 2 strings to match. |
4551 | 0 | if (memcmp(Name.data()+3, "lat", 3)) |
4552 | 0 | break; |
4553 | 0 | switch (Name[6]) { |
4554 | 0 | default: break; |
4555 | 0 | case 'b': // 1 string to match. |
4556 | 0 | return MCK_vsplatb; // "vsplatb" |
4557 | 0 | case 'h': // 1 string to match. |
4558 | 0 | return MCK_vsplath; // "vsplath" |
4559 | 0 | } |
4560 | 0 | break; |
4561 | 35 | } |
4562 | 35 | break; |
4563 | 35 | case 'u': // 1 string to match. |
4564 | 0 | if (memcmp(Name.data()+2, "npack", 5)) |
4565 | 0 | break; |
4566 | 0 | return MCK_vunpack; // "vunpack" |
4567 | 445 | } |
4568 | 445 | break; |
4569 | 6.71k | } |
4570 | 6.21k | break; |
4571 | 6.21k | case 8: // 31 strings to match. |
4572 | 1.47k | switch (Name[0]) { |
4573 | 507 | default: break; |
4574 | 507 | case 'b': // 1 string to match. |
4575 | 1 | if (memcmp(Name.data()+1, "itsplit", 7)) |
4576 | 1 | break; |
4577 | 0 | return MCK_bitsplit; // "bitsplit" |
4578 | 0 | case 'd': // 1 string to match. |
4579 | 0 | if (memcmp(Name.data()+1, "ccleana", 7)) |
4580 | 0 | break; |
4581 | 0 | return MCK_dccleana; // "dccleana" |
4582 | 0 | case 'e': // 1 string to match. |
4583 | 0 | if (memcmp(Name.data()+1, "xtractu", 7)) |
4584 | 0 | break; |
4585 | 0 | return MCK_extractu; // "extractu" |
4586 | 12 | case 'l': // 1 string to match. |
4587 | 12 | if (memcmp(Name.data()+1, "2gclean", 7)) |
4588 | 12 | break; |
4589 | 0 | return MCK_l2gclean; // "l2gclean" |
4590 | 266 | case 'p': // 1 string to match. |
4591 | 266 | if (memcmp(Name.data()+1, "opcount", 7)) |
4592 | 266 | break; |
4593 | 0 | return MCK_popcount; // "popcount" |
4594 | 0 | case 's': // 7 strings to match. |
4595 | 0 | switch (Name[1]) { |
4596 | 0 | default: break; |
4597 | 0 | case 'f': // 4 strings to match. |
4598 | 0 | switch (Name[2]) { |
4599 | 0 | default: break; |
4600 | 0 | case 'f': // 3 strings to match. |
4601 | 0 | if (memcmp(Name.data()+3, "ixup", 4)) |
4602 | 0 | break; |
4603 | 0 | switch (Name[7]) { |
4604 | 0 | default: break; |
4605 | 0 | case 'd': // 1 string to match. |
4606 | 0 | return MCK_sffixupd; // "sffixupd" |
4607 | 0 | case 'n': // 1 string to match. |
4608 | 0 | return MCK_sffixupn; // "sffixupn" |
4609 | 0 | case 'r': // 1 string to match. |
4610 | 0 | return MCK_sffixupr; // "sffixupr" |
4611 | 0 | } |
4612 | 0 | break; |
4613 | 0 | case 'r': // 1 string to match. |
4614 | 0 | if (memcmp(Name.data()+3, "ecipa", 5)) |
4615 | 0 | break; |
4616 | 0 | return MCK_sfrecipa; // "sfrecipa" |
4617 | 0 | } |
4618 | 0 | break; |
4619 | 0 | case 'p': // 3 strings to match. |
4620 | 0 | switch (Name[2]) { |
4621 | 0 | default: break; |
4622 | 0 | case '1': // 1 string to match. |
4623 | 0 | if (memcmp(Name.data()+3, "loop0", 5)) |
4624 | 0 | break; |
4625 | 0 | return MCK_sp1loop0; // "sp1loop0" |
4626 | 0 | case '2': // 1 string to match. |
4627 | 0 | if (memcmp(Name.data()+3, "loop0", 5)) |
4628 | 0 | break; |
4629 | 0 | return MCK_sp2loop0; // "sp2loop0" |
4630 | 0 | case '3': // 1 string to match. |
4631 | 0 | if (memcmp(Name.data()+3, "loop0", 5)) |
4632 | 0 | break; |
4633 | 0 | return MCK_sp3loop0; // "sp3loop0" |
4634 | 0 | } |
4635 | 0 | break; |
4636 | 0 | } |
4637 | 0 | break; |
4638 | 300 | case 't': // 1 string to match. |
4639 | 300 | if (memcmp(Name.data()+1, "lbmatch", 7)) |
4640 | 300 | break; |
4641 | 0 | return MCK_tlbmatch; // "tlbmatch" |
4642 | 390 | case 'v': // 18 strings to match. |
4643 | 390 | switch (Name[1]) { |
4644 | 24 | default: break; |
4645 | 24 | case 'a': // 1 string to match. |
4646 | 0 | if (memcmp(Name.data()+2, "bsdiff", 6)) |
4647 | 0 | break; |
4648 | 0 | return MCK_vabsdiff; // "vabsdiff" |
4649 | 56 | case 'c': // 2 strings to match. |
4650 | 56 | switch (Name[2]) { |
4651 | 28 | default: break; |
4652 | 28 | case 'o': // 1 string to match. |
4653 | 0 | if (memcmp(Name.data()+3, "mbine", 5)) |
4654 | 0 | break; |
4655 | 0 | return MCK_vcombine; // "vcombine" |
4656 | 28 | case 'r': // 1 string to match. |
4657 | 28 | if (memcmp(Name.data()+3, "otate", 5)) |
4658 | 28 | break; |
4659 | 0 | return MCK_vcrotate; // "vcrotate" |
4660 | 56 | } |
4661 | 56 | break; |
4662 | 56 | case 'd': // 1 string to match. |
4663 | 0 | if (memcmp(Name.data()+2, "mpybsu", 6)) |
4664 | 0 | break; |
4665 | 0 | return MCK_vdmpybsu; // "vdmpybsu" |
4666 | 266 | case 'e': // 1 string to match. |
4667 | 266 | if (memcmp(Name.data()+2, "xtract", 6)) |
4668 | 266 | break; |
4669 | 0 | return MCK_vextract; // "vextract" |
4670 | 24 | case 'm': // 2 strings to match. |
4671 | 24 | if (memcmp(Name.data()+2, "pyw", 3)) |
4672 | 0 | break; |
4673 | 24 | switch (Name[5]) { |
4674 | 12 | default: break; |
4675 | 12 | case 'e': // 1 string to match. |
4676 | 0 | if (memcmp(Name.data()+6, "uh", 2)) |
4677 | 0 | break; |
4678 | 0 | return MCK_vmpyweuh; // "vmpyweuh" |
4679 | 12 | case 'o': // 1 string to match. |
4680 | 12 | if (memcmp(Name.data()+6, "uh", 2)) |
4681 | 12 | break; |
4682 | 0 | return MCK_vmpywouh; // "vmpywouh" |
4683 | 24 | } |
4684 | 24 | break; |
4685 | 24 | case 'n': // 1 string to match. |
4686 | 0 | if (memcmp(Name.data()+2, "ormamt", 6)) |
4687 | 0 | break; |
4688 | 0 | return MCK_vnormamt; // "vnormamt" |
4689 | 6 | case 'r': // 3 strings to match. |
4690 | 6 | if (memcmp(Name.data()+2, "mpy", 3)) |
4691 | 6 | break; |
4692 | 0 | switch (Name[5]) { |
4693 | 0 | default: break; |
4694 | 0 | case 'b': // 1 string to match. |
4695 | 0 | if (memcmp(Name.data()+6, "su", 2)) |
4696 | 0 | break; |
4697 | 0 | return MCK_vrmpybsu; // "vrmpybsu" |
4698 | 0 | case 'w': // 2 strings to match. |
4699 | 0 | switch (Name[6]) { |
4700 | 0 | default: break; |
4701 | 0 | case 'e': // 1 string to match. |
4702 | 0 | if (Name[7] != 'h') |
4703 | 0 | break; |
4704 | 0 | return MCK_vrmpyweh; // "vrmpyweh" |
4705 | 0 | case 'o': // 1 string to match. |
4706 | 0 | if (Name[7] != 'h') |
4707 | 0 | break; |
4708 | 0 | return MCK_vrmpywoh; // "vrmpywoh" |
4709 | 0 | } |
4710 | 0 | break; |
4711 | 0 | } |
4712 | 0 | break; |
4713 | 2 | case 's': // 2 strings to match. |
4714 | 2 | switch (Name[2]) { |
4715 | 2 | default: break; |
4716 | 2 | case 'h': // 1 string to match. |
4717 | 0 | if (memcmp(Name.data()+3, "uffoe", 5)) |
4718 | 0 | break; |
4719 | 0 | return MCK_vshuffoe; // "vshuffoe" |
4720 | 0 | case 'p': // 1 string to match. |
4721 | 0 | if (memcmp(Name.data()+3, "liceb", 5)) |
4722 | 0 | break; |
4723 | 0 | return MCK_vspliceb; // "vspliceb" |
4724 | 2 | } |
4725 | 2 | break; |
4726 | 2 | case 't': // 4 strings to match. |
4727 | 0 | if (memcmp(Name.data()+2, "run", 3)) |
4728 | 0 | break; |
4729 | 0 | switch (Name[5]) { |
4730 | 0 | default: break; |
4731 | 0 | case 'e': // 2 strings to match. |
4732 | 0 | switch (Name[6]) { |
4733 | 0 | default: break; |
4734 | 0 | case 'h': // 1 string to match. |
4735 | 0 | if (Name[7] != 'b') |
4736 | 0 | break; |
4737 | 0 | return MCK_vtrunehb; // "vtrunehb" |
4738 | 0 | case 'w': // 1 string to match. |
4739 | 0 | if (Name[7] != 'h') |
4740 | 0 | break; |
4741 | 0 | return MCK_vtrunewh; // "vtrunewh" |
4742 | 0 | } |
4743 | 0 | break; |
4744 | 0 | case 'o': // 2 strings to match. |
4745 | 0 | switch (Name[6]) { |
4746 | 0 | default: break; |
4747 | 0 | case 'h': // 1 string to match. |
4748 | 0 | if (Name[7] != 'b') |
4749 | 0 | break; |
4750 | 0 | return MCK_vtrunohb; // "vtrunohb" |
4751 | 0 | case 'w': // 1 string to match. |
4752 | 0 | if (Name[7] != 'h') |
4753 | 0 | break; |
4754 | 0 | return MCK_vtrunowh; // "vtrunowh" |
4755 | 0 | } |
4756 | 0 | break; |
4757 | 0 | } |
4758 | 0 | break; |
4759 | 12 | case 'u': // 1 string to match. |
4760 | 12 | if (memcmp(Name.data()+2, "npacko", 6)) |
4761 | 12 | break; |
4762 | 0 | return MCK_vunpacko; // "vunpacko" |
4763 | 390 | } |
4764 | 390 | break; |
4765 | 1.47k | } |
4766 | 1.47k | break; |
4767 | 4.00k | case 9: // 17 strings to match. |
4768 | 4.00k | switch (Name[0]) { |
4769 | 2.35k | default: break; |
4770 | 2.35k | case 'l': // 2 strings to match. |
4771 | 2 | if (Name[1] != '2') |
4772 | 0 | break; |
4773 | 2 | switch (Name[2]) { |
4774 | 0 | default: break; |
4775 | 2 | case 'g': // 1 string to match. |
4776 | 2 | if (memcmp(Name.data()+3, "unlock", 6)) |
4777 | 2 | break; |
4778 | 0 | return MCK_l2gunlock; // "l2gunlock" |
4779 | 0 | case 'u': // 1 string to match. |
4780 | 0 | if (memcmp(Name.data()+3, "nlocka", 6)) |
4781 | 0 | break; |
4782 | 0 | return MCK_l2unlocka; // "l2unlocka" |
4783 | 2 | } |
4784 | 2 | break; |
4785 | 2 | case 'm': // 2 strings to match. |
4786 | 0 | if (memcmp(Name.data()+1, "em", 2)) |
4787 | 0 | break; |
4788 | 0 | switch (Name[3]) { |
4789 | 0 | default: break; |
4790 | 0 | case 'b': // 1 string to match. |
4791 | 0 | if (memcmp(Name.data()+4, "_fifo", 5)) |
4792 | 0 | break; |
4793 | 0 | return MCK_memb_95_fifo; // "memb_fifo" |
4794 | 0 | case 'h': // 1 string to match. |
4795 | 0 | if (memcmp(Name.data()+4, "_fifo", 5)) |
4796 | 0 | break; |
4797 | 0 | return MCK_memh_95_fifo; // "memh_fifo" |
4798 | 0 | } |
4799 | 0 | break; |
4800 | 638 | case 't': // 5 strings to match. |
4801 | 638 | switch (Name[1]) { |
4802 | 491 | default: break; |
4803 | 491 | case 'a': // 4 strings to match. |
4804 | 133 | if (memcmp(Name.data()+2, "bleidx", 6)) |
4805 | 133 | break; |
4806 | 0 | switch (Name[8]) { |
4807 | 0 | default: break; |
4808 | 0 | case 'b': // 1 string to match. |
4809 | 0 | return MCK_tableidxb; // "tableidxb" |
4810 | 0 | case 'd': // 1 string to match. |
4811 | 0 | return MCK_tableidxd; // "tableidxd" |
4812 | 0 | case 'h': // 1 string to match. |
4813 | 0 | return MCK_tableidxh; // "tableidxh" |
4814 | 0 | case 'w': // 1 string to match. |
4815 | 0 | return MCK_tableidxw; // "tableidxw" |
4816 | 0 | } |
4817 | 0 | break; |
4818 | 14 | case 'o': // 1 string to match. |
4819 | 14 | if (memcmp(Name.data()+2, "gglebit", 7)) |
4820 | 14 | break; |
4821 | 0 | return MCK_togglebit; // "togglebit" |
4822 | 638 | } |
4823 | 638 | break; |
4824 | 1.01k | case 'v': // 8 strings to match. |
4825 | 1.01k | switch (Name[1]) { |
4826 | 988 | default: break; |
4827 | 988 | case 'a': // 2 strings to match. |
4828 | 28 | if (memcmp(Name.data()+2, "bsdiff", 6)) |
4829 | 28 | break; |
4830 | 0 | switch (Name[8]) { |
4831 | 0 | default: break; |
4832 | 0 | case 'h': // 1 string to match. |
4833 | 0 | return MCK_vabsdiffh; // "vabsdiffh" |
4834 | 0 | case 'w': // 1 string to match. |
4835 | 0 | return MCK_vabsdiffw; // "vabsdiffw" |
4836 | 0 | } |
4837 | 0 | break; |
4838 | 0 | case 'p': // 1 string to match. |
4839 | 0 | if (memcmp(Name.data()+2, "opcount", 7)) |
4840 | 0 | break; |
4841 | 0 | return MCK_vpopcount; // "vpopcount" |
4842 | 0 | case 'r': // 1 string to match. |
4843 | 0 | if (memcmp(Name.data()+2, "crotate", 7)) |
4844 | 0 | break; |
4845 | 0 | return MCK_vrcrotate; // "vrcrotate" |
4846 | 0 | case 'x': // 4 strings to match. |
4847 | 0 | switch (Name[2]) { |
4848 | 0 | default: break; |
4849 | 0 | case 'a': // 2 strings to match. |
4850 | 0 | if (memcmp(Name.data()+3, "ddsub", 5)) |
4851 | 0 | break; |
4852 | 0 | switch (Name[8]) { |
4853 | 0 | default: break; |
4854 | 0 | case 'h': // 1 string to match. |
4855 | 0 | return MCK_vxaddsubh; // "vxaddsubh" |
4856 | 0 | case 'w': // 1 string to match. |
4857 | 0 | return MCK_vxaddsubw; // "vxaddsubw" |
4858 | 0 | } |
4859 | 0 | break; |
4860 | 0 | case 's': // 2 strings to match. |
4861 | 0 | if (memcmp(Name.data()+3, "ubadd", 5)) |
4862 | 0 | break; |
4863 | 0 | switch (Name[8]) { |
4864 | 0 | default: break; |
4865 | 0 | case 'h': // 1 string to match. |
4866 | 0 | return MCK_vxsubaddh; // "vxsubaddh" |
4867 | 0 | case 'w': // 1 string to match. |
4868 | 0 | return MCK_vxsubaddw; // "vxsubaddw" |
4869 | 0 | } |
4870 | 0 | break; |
4871 | 0 | } |
4872 | 0 | break; |
4873 | 1.01k | } |
4874 | 1.01k | break; |
4875 | 4.00k | } |
4876 | 4.00k | break; |
4877 | 4.00k | case 10: // 5 strings to match. |
4878 | 819 | switch (Name[0]) { |
4879 | 285 | default: break; |
4880 | 285 | case 'a': // 1 string to match. |
4881 | 0 | if (memcmp(Name.data()+1, "llocframe", 9)) |
4882 | 0 | break; |
4883 | 0 | return MCK_allocframe; // "allocframe" |
4884 | 300 | case 'd': // 1 string to match. |
4885 | 300 | if (memcmp(Name.data()+1, "eprecated", 9)) |
4886 | 300 | break; |
4887 | 0 | return MCK_deprecated; // "deprecated" |
4888 | 232 | case 'i': // 1 string to match. |
4889 | 232 | if (memcmp(Name.data()+1, "nterleave", 9)) |
4890 | 232 | break; |
4891 | 0 | return MCK_interleave; // "interleave" |
4892 | 0 | case 's': // 1 string to match. |
4893 | 0 | if (memcmp(Name.data()+1, "finvsqrta", 9)) |
4894 | 0 | break; |
4895 | 0 | return MCK_sfinvsqrta; // "sfinvsqrta" |
4896 | 2 | case 'v': // 1 string to match. |
4897 | 2 | if (memcmp(Name.data()+1, "assignp_W", 9)) |
4898 | 2 | break; |
4899 | 0 | return MCK_vassignp_95_W; // "vassignp_W" |
4900 | 819 | } |
4901 | 819 | break; |
4902 | 819 | case 11: // 6 strings to match. |
4903 | 456 | switch (Name[0]) { |
4904 | 152 | default: break; |
4905 | 152 | case 'b': // 1 string to match. |
4906 | 0 | if (memcmp(Name.data()+1, "oundscheck", 10)) |
4907 | 0 | break; |
4908 | 0 | return MCK_boundscheck; // "boundscheck" |
4909 | 0 | case 'd': // 1 string to match. |
4910 | 0 | if (memcmp(Name.data()+1, "ccleaninva", 10)) |
4911 | 0 | break; |
4912 | 0 | return MCK_dccleaninva; // "dccleaninva" |
4913 | 0 | case 'f': // 1 string to match. |
4914 | 0 | if (memcmp(Name.data()+1, "astcorner9", 10)) |
4915 | 0 | break; |
4916 | 0 | return MCK_fastcorner9; // "fastcorner9" |
4917 | 302 | case 'l': // 1 string to match. |
4918 | 302 | if (memcmp(Name.data()+1, "2gcleaninv", 10)) |
4919 | 300 | break; |
4920 | 2 | return MCK_l2gcleaninv; // "l2gcleaninv" |
4921 | 2 | case 'm': // 2 strings to match. |
4922 | 2 | if (memcmp(Name.data()+1, "em", 2)) |
4923 | 2 | break; |
4924 | 0 | switch (Name[3]) { |
4925 | 0 | default: break; |
4926 | 0 | case 'd': // 1 string to match. |
4927 | 0 | if (memcmp(Name.data()+4, "_locked", 7)) |
4928 | 0 | break; |
4929 | 0 | return MCK_memd_95_locked; // "memd_locked" |
4930 | 0 | case 'w': // 1 string to match. |
4931 | 0 | if (memcmp(Name.data()+4, "_locked", 7)) |
4932 | 0 | break; |
4933 | 0 | return MCK_memw_95_locked; // "memw_locked" |
4934 | 0 | } |
4935 | 0 | break; |
4936 | 456 | } |
4937 | 454 | break; |
4938 | 454 | case 12: // 10 strings to match. |
4939 | 150 | switch (Name[0]) { |
4940 | 50 | default: break; |
4941 | 50 | case 'c': // 8 strings to match. |
4942 | 0 | if (memcmp(Name.data()+1, "onvert_", 7)) |
4943 | 0 | break; |
4944 | 0 | switch (Name[8]) { |
4945 | 0 | default: break; |
4946 | 0 | case 'd': // 4 strings to match. |
4947 | 0 | switch (Name[9]) { |
4948 | 0 | default: break; |
4949 | 0 | case '2': // 2 strings to match. |
4950 | 0 | switch (Name[10]) { |
4951 | 0 | default: break; |
4952 | 0 | case 'd': // 1 string to match. |
4953 | 0 | if (Name[11] != 'f') |
4954 | 0 | break; |
4955 | 0 | return MCK_convert_95_d2df; // "convert_d2df" |
4956 | 0 | case 's': // 1 string to match. |
4957 | 0 | if (Name[11] != 'f') |
4958 | 0 | break; |
4959 | 0 | return MCK_convert_95_d2sf; // "convert_d2sf" |
4960 | 0 | } |
4961 | 0 | break; |
4962 | 0 | case 'f': // 2 strings to match. |
4963 | 0 | if (Name[10] != '2') |
4964 | 0 | break; |
4965 | 0 | switch (Name[11]) { |
4966 | 0 | default: break; |
4967 | 0 | case 'd': // 1 string to match. |
4968 | 0 | return MCK_convert_95_df2d; // "convert_df2d" |
4969 | 0 | case 'w': // 1 string to match. |
4970 | 0 | return MCK_convert_95_df2w; // "convert_df2w" |
4971 | 0 | } |
4972 | 0 | break; |
4973 | 0 | } |
4974 | 0 | break; |
4975 | 0 | case 's': // 2 strings to match. |
4976 | 0 | if (memcmp(Name.data()+9, "f2", 2)) |
4977 | 0 | break; |
4978 | 0 | switch (Name[11]) { |
4979 | 0 | default: break; |
4980 | 0 | case 'd': // 1 string to match. |
4981 | 0 | return MCK_convert_95_sf2d; // "convert_sf2d" |
4982 | 0 | case 'w': // 1 string to match. |
4983 | 0 | return MCK_convert_95_sf2w; // "convert_sf2w" |
4984 | 0 | } |
4985 | 0 | break; |
4986 | 0 | case 'w': // 2 strings to match. |
4987 | 0 | if (Name[9] != '2') |
4988 | 0 | break; |
4989 | 0 | switch (Name[10]) { |
4990 | 0 | default: break; |
4991 | 0 | case 'd': // 1 string to match. |
4992 | 0 | if (Name[11] != 'f') |
4993 | 0 | break; |
4994 | 0 | return MCK_convert_95_w2df; // "convert_w2df" |
4995 | 0 | case 's': // 1 string to match. |
4996 | 0 | if (Name[11] != 'f') |
4997 | 0 | break; |
4998 | 0 | return MCK_convert_95_w2sf; // "convert_w2sf" |
4999 | 0 | } |
5000 | 0 | break; |
5001 | 0 | } |
5002 | 0 | break; |
5003 | 100 | case 'd': // 2 strings to match. |
5004 | 100 | if (Name[1] != 'e') |
5005 | 12 | break; |
5006 | 88 | switch (Name[2]) { |
5007 | 0 | default: break; |
5008 | 88 | case 'a': // 1 string to match. |
5009 | 88 | if (memcmp(Name.data()+3, "llocframe", 9)) |
5010 | 0 | break; |
5011 | 88 | return MCK_deallocframe; // "deallocframe" |
5012 | 0 | case 'i': // 1 string to match. |
5013 | 0 | if (memcmp(Name.data()+3, "nterleave", 9)) |
5014 | 0 | break; |
5015 | 0 | return MCK_deinterleave; // "deinterleave" |
5016 | 88 | } |
5017 | 0 | break; |
5018 | 150 | } |
5019 | 62 | break; |
5020 | 1.91k | case 13: // 10 strings to match. |
5021 | 1.91k | if (memcmp(Name.data()+0, "convert_", 8)) |
5022 | 929 | break; |
5023 | 988 | switch (Name[8]) { |
5024 | 494 | default: break; |
5025 | 494 | case 'd': // 3 strings to match. |
5026 | 494 | if (memcmp(Name.data()+9, "f2", 2)) |
5027 | 494 | break; |
5028 | 0 | switch (Name[11]) { |
5029 | 0 | default: break; |
5030 | 0 | case 's': // 1 string to match. |
5031 | 0 | if (Name[12] != 'f') |
5032 | 0 | break; |
5033 | 0 | return MCK_convert_95_df2sf; // "convert_df2sf" |
5034 | 0 | case 'u': // 2 strings to match. |
5035 | 0 | switch (Name[12]) { |
5036 | 0 | default: break; |
5037 | 0 | case 'd': // 1 string to match. |
5038 | 0 | return MCK_convert_95_df2ud; // "convert_df2ud" |
5039 | 0 | case 'w': // 1 string to match. |
5040 | 0 | return MCK_convert_95_df2uw; // "convert_df2uw" |
5041 | 0 | } |
5042 | 0 | break; |
5043 | 0 | } |
5044 | 0 | break; |
5045 | 0 | case 's': // 3 strings to match. |
5046 | 0 | if (memcmp(Name.data()+9, "f2", 2)) |
5047 | 0 | break; |
5048 | 0 | switch (Name[11]) { |
5049 | 0 | default: break; |
5050 | 0 | case 'd': // 1 string to match. |
5051 | 0 | if (Name[12] != 'f') |
5052 | 0 | break; |
5053 | 0 | return MCK_convert_95_sf2df; // "convert_sf2df" |
5054 | 0 | case 'u': // 2 strings to match. |
5055 | 0 | switch (Name[12]) { |
5056 | 0 | default: break; |
5057 | 0 | case 'd': // 1 string to match. |
5058 | 0 | return MCK_convert_95_sf2ud; // "convert_sf2ud" |
5059 | 0 | case 'w': // 1 string to match. |
5060 | 0 | return MCK_convert_95_sf2uw; // "convert_sf2uw" |
5061 | 0 | } |
5062 | 0 | break; |
5063 | 0 | } |
5064 | 0 | break; |
5065 | 0 | case 'u': // 4 strings to match. |
5066 | 0 | switch (Name[9]) { |
5067 | 0 | default: break; |
5068 | 0 | case 'd': // 2 strings to match. |
5069 | 0 | if (Name[10] != '2') |
5070 | 0 | break; |
5071 | 0 | switch (Name[11]) { |
5072 | 0 | default: break; |
5073 | 0 | case 'd': // 1 string to match. |
5074 | 0 | if (Name[12] != 'f') |
5075 | 0 | break; |
5076 | 0 | return MCK_convert_95_ud2df; // "convert_ud2df" |
5077 | 0 | case 's': // 1 string to match. |
5078 | 0 | if (Name[12] != 'f') |
5079 | 0 | break; |
5080 | 0 | return MCK_convert_95_ud2sf; // "convert_ud2sf" |
5081 | 0 | } |
5082 | 0 | break; |
5083 | 0 | case 'w': // 2 strings to match. |
5084 | 0 | if (Name[10] != '2') |
5085 | 0 | break; |
5086 | 0 | switch (Name[11]) { |
5087 | 0 | default: break; |
5088 | 0 | case 'd': // 1 string to match. |
5089 | 0 | if (Name[12] != 'f') |
5090 | 0 | break; |
5091 | 0 | return MCK_convert_95_uw2df; // "convert_uw2df" |
5092 | 0 | case 's': // 1 string to match. |
5093 | 0 | if (Name[12] != 'f') |
5094 | 0 | break; |
5095 | 0 | return MCK_convert_95_uw2sf; // "convert_uw2sf" |
5096 | 0 | } |
5097 | 0 | break; |
5098 | 0 | } |
5099 | 0 | break; |
5100 | 988 | } |
5101 | 988 | break; |
5102 | 1.52k | case 14: // 1 string to match. |
5103 | 1.52k | if (memcmp(Name.data()+0, "dealloc_return", 14)) |
5104 | 507 | break; |
5105 | 1.01k | return MCK_dealloc_95_return; // "dealloc_return" |
5106 | 0 | case 15: // 1 string to match. |
5107 | 0 | if (memcmp(Name.data()+0, "vassignp_W_128B", 15)) |
5108 | 0 | break; |
5109 | 0 | return MCK_vassignp_95_W_95_128B; // "vassignp_W_128B" |
5110 | 231k | } |
5111 | 53.5k | return InvalidMatchClass; |
5112 | 231k | } |
5113 | | |
5114 | | /// isSubclass - Compute whether \p A is a subclass of \p B. |
5115 | 591k | static bool isSubclass(MatchClassKind A, MatchClassKind B) { |
5116 | 591k | if (A == B) |
5117 | 62.5k | return true; |
5118 | | |
5119 | 529k | switch (A) { |
5120 | 261k | default: |
5121 | 261k | return false; |
5122 | | |
5123 | 1 | case MCK_Reg16: |
5124 | 1 | return B == MCK_CtrRegs64; |
5125 | | |
5126 | 0 | case MCK_Reg12: |
5127 | 0 | return B == MCK_CtrRegs; |
5128 | | |
5129 | 2.16k | case MCK_GP: |
5130 | 2.16k | return B == MCK_CtrRegs; |
5131 | | |
5132 | 6.50k | case MCK_M0: |
5133 | 6.50k | switch (B) { |
5134 | 6.49k | default: return false; |
5135 | 0 | case MCK_ModRegs: return true; |
5136 | 3 | case MCK_CtrRegs: return true; |
5137 | 6.50k | } |
5138 | | |
5139 | 13.0k | case MCK_M1: |
5140 | 13.0k | switch (B) { |
5141 | 13.0k | default: return false; |
5142 | 0 | case MCK_ModRegs: return true; |
5143 | 6 | case MCK_CtrRegs: return true; |
5144 | 13.0k | } |
5145 | | |
5146 | 26.2k | case MCK_P0: |
5147 | 26.2k | return B == MCK_PredRegs; |
5148 | | |
5149 | 19.3k | case MCK_P1: |
5150 | 19.3k | return B == MCK_PredRegs; |
5151 | | |
5152 | 2.44k | case MCK_P3: |
5153 | 2.44k | return B == MCK_PredRegs; |
5154 | | |
5155 | 41.0k | case MCK_PC: |
5156 | 41.0k | return B == MCK_CtrRegs; |
5157 | | |
5158 | 0 | case MCK_ModRegs: |
5159 | 0 | return B == MCK_CtrRegs; |
5160 | | |
5161 | 6.78k | case MCK_Reg2: |
5162 | 6.78k | return B == MCK_DoubleRegs; |
5163 | | |
5164 | 150k | case MCK_IntRegsLow8: |
5165 | 150k | return B == MCK_IntRegs; |
5166 | 529k | } |
5167 | 529k | } |
5168 | | |
5169 | 595k | static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { |
5170 | 595k | HexagonOperand &Operand = (HexagonOperand&)GOp; |
5171 | 595k | if (Kind == InvalidMatchClass) |
5172 | 34 | return MCTargetAsmParser::Match_InvalidOperand; |
5173 | | |
5174 | 595k | if (Operand.isToken()) |
5175 | 102k | return isSubclass(matchTokenString(Operand.getToken()), Kind) ? |
5176 | 38.7k | MCTargetAsmParser::Match_Success : |
5177 | 102k | MCTargetAsmParser::Match_InvalidOperand; |
5178 | | |
5179 | | // 'Imm' class |
5180 | 493k | if (Kind == MCK_Imm) { |
5181 | 2.06k | if (Operand.isImm()) |
5182 | 2.06k | return MCTargetAsmParser::Match_Success; |
5183 | 2.06k | } |
5184 | | |
5185 | | // 'f32Ext' class |
5186 | 490k | if (Kind == MCK_f32Ext) { |
5187 | 0 | if (Operand.isf32Ext()) |
5188 | 0 | return MCTargetAsmParser::Match_Success; |
5189 | 0 | } |
5190 | | |
5191 | | // 'n8Imm' class |
5192 | 490k | if (Kind == MCK_n8Imm) { |
5193 | 0 | if (Operand.isn8Imm()) |
5194 | 0 | return MCTargetAsmParser::Match_Success; |
5195 | 0 | } |
5196 | | |
5197 | | // 's10Ext' class |
5198 | 490k | if (Kind == MCK_s10Ext) { |
5199 | 0 | if (Operand.iss10Ext()) |
5200 | 0 | return MCTargetAsmParser::Match_Success; |
5201 | 0 | } |
5202 | | |
5203 | | // 's11_0Ext' class |
5204 | 490k | if (Kind == MCK_s11_0Ext) { |
5205 | 0 | if (Operand.iss11_0Ext()) |
5206 | 0 | return MCTargetAsmParser::Match_Success; |
5207 | 0 | } |
5208 | | |
5209 | | // 's11_1Ext' class |
5210 | 490k | if (Kind == MCK_s11_1Ext) { |
5211 | 0 | if (Operand.iss11_1Ext()) |
5212 | 0 | return MCTargetAsmParser::Match_Success; |
5213 | 0 | } |
5214 | | |
5215 | | // 's11_2Ext' class |
5216 | 490k | if (Kind == MCK_s11_2Ext) { |
5217 | 0 | if (Operand.iss11_2Ext()) |
5218 | 0 | return MCTargetAsmParser::Match_Success; |
5219 | 0 | } |
5220 | | |
5221 | | // 's11_3Ext' class |
5222 | 490k | if (Kind == MCK_s11_3Ext) { |
5223 | 0 | if (Operand.iss11_3Ext()) |
5224 | 0 | return MCTargetAsmParser::Match_Success; |
5225 | 0 | } |
5226 | | |
5227 | | // 's12Ext' class |
5228 | 490k | if (Kind == MCK_s12Ext) { |
5229 | 1 | if (Operand.iss12Ext()) |
5230 | 1 | return MCTargetAsmParser::Match_Success; |
5231 | 1 | } |
5232 | | |
5233 | | // 's16Ext' class |
5234 | 490k | if (Kind == MCK_s16Ext) { |
5235 | 2.14k | if (Operand.iss16Ext()) |
5236 | 2.14k | return MCTargetAsmParser::Match_Success; |
5237 | 2.14k | } |
5238 | | |
5239 | | // 's32Imm' class |
5240 | 488k | if (Kind == MCK_s32Imm) { |
5241 | 0 | if (Operand.iss32Imm()) |
5242 | 0 | return MCTargetAsmParser::Match_Success; |
5243 | 0 | } |
5244 | | |
5245 | | // 's3_6Imm' class |
5246 | 488k | if (Kind == MCK_s3_6Imm) { |
5247 | 0 | if (Operand.iss3_6Imm()) |
5248 | 0 | return MCTargetAsmParser::Match_Success; |
5249 | 0 | } |
5250 | | |
5251 | | // 's4Imm' class |
5252 | 488k | if (Kind == MCK_s4Imm) { |
5253 | 0 | if (Operand.iss4Imm()) |
5254 | 0 | return MCTargetAsmParser::Match_Success; |
5255 | 0 | } |
5256 | | |
5257 | | // 's4_0Imm' class |
5258 | 488k | if (Kind == MCK_s4_0Imm) { |
5259 | 0 | if (Operand.iss4_0Imm()) |
5260 | 0 | return MCTargetAsmParser::Match_Success; |
5261 | 0 | } |
5262 | | |
5263 | | // 's4_1Imm' class |
5264 | 488k | if (Kind == MCK_s4_1Imm) { |
5265 | 0 | if (Operand.iss4_1Imm()) |
5266 | 0 | return MCTargetAsmParser::Match_Success; |
5267 | 0 | } |
5268 | | |
5269 | | // 's4_2Imm' class |
5270 | 488k | if (Kind == MCK_s4_2Imm) { |
5271 | 0 | if (Operand.iss4_2Imm()) |
5272 | 0 | return MCTargetAsmParser::Match_Success; |
5273 | 0 | } |
5274 | | |
5275 | | // 's4_3Imm' class |
5276 | 488k | if (Kind == MCK_s4_3Imm) { |
5277 | 0 | if (Operand.iss4_3Imm()) |
5278 | 0 | return MCTargetAsmParser::Match_Success; |
5279 | 0 | } |
5280 | | |
5281 | | // 's4_6Imm' class |
5282 | 488k | if (Kind == MCK_s4_6Imm) { |
5283 | 0 | if (Operand.iss4_6Imm()) |
5284 | 0 | return MCTargetAsmParser::Match_Success; |
5285 | 0 | } |
5286 | | |
5287 | | // 's6Ext' class |
5288 | 488k | if (Kind == MCK_s6Ext) { |
5289 | 0 | if (Operand.iss6Ext()) |
5290 | 0 | return MCTargetAsmParser::Match_Success; |
5291 | 0 | } |
5292 | | |
5293 | | // 's6Imm' class |
5294 | 488k | if (Kind == MCK_s6Imm) { |
5295 | 0 | if (Operand.iss6Imm()) |
5296 | 0 | return MCTargetAsmParser::Match_Success; |
5297 | 0 | } |
5298 | | |
5299 | | // 's7Ext' class |
5300 | 488k | if (Kind == MCK_s7Ext) { |
5301 | 0 | if (Operand.iss7Ext()) |
5302 | 0 | return MCTargetAsmParser::Match_Success; |
5303 | 0 | } |
5304 | | |
5305 | | // 's8Ext' class |
5306 | 488k | if (Kind == MCK_s8Ext) { |
5307 | 0 | if (Operand.iss8Ext()) |
5308 | 0 | return MCTargetAsmParser::Match_Success; |
5309 | 0 | } |
5310 | | |
5311 | | // 's8Imm64' class |
5312 | 488k | if (Kind == MCK_s8Imm64) { |
5313 | 17 | if (Operand.iss8Imm64()) |
5314 | 1 | return MCTargetAsmParser::Match_Success; |
5315 | 17 | } |
5316 | | |
5317 | | // 's8Imm' class |
5318 | 488k | if (Kind == MCK_s8Imm) { |
5319 | 0 | if (Operand.iss8Imm()) |
5320 | 0 | return MCTargetAsmParser::Match_Success; |
5321 | 0 | } |
5322 | | |
5323 | | // 's9Ext' class |
5324 | 488k | if (Kind == MCK_s9Ext) { |
5325 | 0 | if (Operand.iss9Ext()) |
5326 | 0 | return MCTargetAsmParser::Match_Success; |
5327 | 0 | } |
5328 | | |
5329 | | // 'u10Ext' class |
5330 | 488k | if (Kind == MCK_u10Ext) { |
5331 | 0 | if (Operand.isu10Ext()) |
5332 | 0 | return MCTargetAsmParser::Match_Success; |
5333 | 0 | } |
5334 | | |
5335 | | // 'u10Imm' class |
5336 | 488k | if (Kind == MCK_u10Imm) { |
5337 | 2 | if (Operand.isu10Imm()) |
5338 | 1 | return MCTargetAsmParser::Match_Success; |
5339 | 2 | } |
5340 | | |
5341 | | // 'u11_3Imm' class |
5342 | 488k | if (Kind == MCK_u11_3Imm) { |
5343 | 0 | if (Operand.isu11_3Imm()) |
5344 | 0 | return MCTargetAsmParser::Match_Success; |
5345 | 0 | } |
5346 | | |
5347 | | // 'u16Imm' class |
5348 | 488k | if (Kind == MCK_u16Imm) { |
5349 | 19 | if (Operand.isu16Imm()) |
5350 | 19 | return MCTargetAsmParser::Match_Success; |
5351 | 19 | } |
5352 | | |
5353 | | // 'u16_0Imm' class |
5354 | 488k | if (Kind == MCK_u16_0Imm) { |
5355 | 0 | if (Operand.isu16_0Imm()) |
5356 | 0 | return MCTargetAsmParser::Match_Success; |
5357 | 0 | } |
5358 | | |
5359 | | // 'u16_1Imm' class |
5360 | 488k | if (Kind == MCK_u16_1Imm) { |
5361 | 0 | if (Operand.isu16_1Imm()) |
5362 | 0 | return MCTargetAsmParser::Match_Success; |
5363 | 0 | } |
5364 | | |
5365 | | // 'u16_2Imm' class |
5366 | 488k | if (Kind == MCK_u16_2Imm) { |
5367 | 0 | if (Operand.isu16_2Imm()) |
5368 | 0 | return MCTargetAsmParser::Match_Success; |
5369 | 0 | } |
5370 | | |
5371 | | // 'u16_3Imm' class |
5372 | 488k | if (Kind == MCK_u16_3Imm) { |
5373 | 0 | if (Operand.isu16_3Imm()) |
5374 | 0 | return MCTargetAsmParser::Match_Success; |
5375 | 0 | } |
5376 | | |
5377 | | // 'u1Imm' class |
5378 | 488k | if (Kind == MCK_u1Imm) { |
5379 | 0 | if (Operand.isu1Imm()) |
5380 | 0 | return MCTargetAsmParser::Match_Success; |
5381 | 0 | } |
5382 | | |
5383 | | // 'u26_6Imm' class |
5384 | 488k | if (Kind == MCK_u26_6Imm) { |
5385 | 0 | if (Operand.isu26_6Imm()) |
5386 | 0 | return MCTargetAsmParser::Match_Success; |
5387 | 0 | } |
5388 | | |
5389 | | // 'u2Imm' class |
5390 | 488k | if (Kind == MCK_u2Imm) { |
5391 | 0 | if (Operand.isu2Imm()) |
5392 | 0 | return MCTargetAsmParser::Match_Success; |
5393 | 0 | } |
5394 | | |
5395 | | // 'u32Imm' class |
5396 | 488k | if (Kind == MCK_u32Imm) { |
5397 | 0 | if (Operand.isu32Imm()) |
5398 | 0 | return MCTargetAsmParser::Match_Success; |
5399 | 0 | } |
5400 | | |
5401 | | // 'u32MustExt' class |
5402 | 488k | if (Kind == MCK_u32MustExt) { |
5403 | 0 | if (Operand.isu32MustExt()) |
5404 | 0 | return MCTargetAsmParser::Match_Success; |
5405 | 0 | } |
5406 | | |
5407 | | // 'u3Imm' class |
5408 | 488k | if (Kind == MCK_u3Imm) { |
5409 | 0 | if (Operand.isu3Imm()) |
5410 | 0 | return MCTargetAsmParser::Match_Success; |
5411 | 0 | } |
5412 | | |
5413 | | // 'u4Imm' class |
5414 | 488k | if (Kind == MCK_u4Imm) { |
5415 | 0 | if (Operand.isu4Imm()) |
5416 | 0 | return MCTargetAsmParser::Match_Success; |
5417 | 0 | } |
5418 | | |
5419 | | // 'u5Imm' class |
5420 | 488k | if (Kind == MCK_u5Imm) { |
5421 | 0 | if (Operand.isu5Imm()) |
5422 | 0 | return MCTargetAsmParser::Match_Success; |
5423 | 0 | } |
5424 | | |
5425 | | // 'u64Imm' class |
5426 | 488k | if (Kind == MCK_u64Imm) { |
5427 | 16 | if (Operand.isu64Imm()) |
5428 | 16 | return MCTargetAsmParser::Match_Success; |
5429 | 16 | } |
5430 | | |
5431 | | // 'u6Ext' class |
5432 | 488k | if (Kind == MCK_u6Ext) { |
5433 | 0 | if (Operand.isu6Ext()) |
5434 | 0 | return MCTargetAsmParser::Match_Success; |
5435 | 0 | } |
5436 | | |
5437 | | // 'u6Imm' class |
5438 | 488k | if (Kind == MCK_u6Imm) { |
5439 | 13 | if (Operand.isu6Imm()) |
5440 | 9 | return MCTargetAsmParser::Match_Success; |
5441 | 13 | } |
5442 | | |
5443 | | // 'u6_0Ext' class |
5444 | 488k | if (Kind == MCK_u6_0Ext) { |
5445 | 0 | if (Operand.isu6_0Ext()) |
5446 | 0 | return MCTargetAsmParser::Match_Success; |
5447 | 0 | } |
5448 | | |
5449 | | // 'u6_0Imm' class |
5450 | 488k | if (Kind == MCK_u6_0Imm) { |
5451 | 0 | if (Operand.isu6_0Imm()) |
5452 | 0 | return MCTargetAsmParser::Match_Success; |
5453 | 0 | } |
5454 | | |
5455 | | // 'u6_1Ext' class |
5456 | 488k | if (Kind == MCK_u6_1Ext) { |
5457 | 0 | if (Operand.isu6_1Ext()) |
5458 | 0 | return MCTargetAsmParser::Match_Success; |
5459 | 0 | } |
5460 | | |
5461 | | // 'u6_1Imm' class |
5462 | 488k | if (Kind == MCK_u6_1Imm) { |
5463 | 0 | if (Operand.isu6_1Imm()) |
5464 | 0 | return MCTargetAsmParser::Match_Success; |
5465 | 0 | } |
5466 | | |
5467 | | // 'u6_2Ext' class |
5468 | 488k | if (Kind == MCK_u6_2Ext) { |
5469 | 0 | if (Operand.isu6_2Ext()) |
5470 | 0 | return MCTargetAsmParser::Match_Success; |
5471 | 0 | } |
5472 | | |
5473 | | // 'u6_2Imm' class |
5474 | 488k | if (Kind == MCK_u6_2Imm) { |
5475 | 0 | if (Operand.isu6_2Imm()) |
5476 | 0 | return MCTargetAsmParser::Match_Success; |
5477 | 0 | } |
5478 | | |
5479 | | // 'u6_3Ext' class |
5480 | 488k | if (Kind == MCK_u6_3Ext) { |
5481 | 0 | if (Operand.isu6_3Ext()) |
5482 | 0 | return MCTargetAsmParser::Match_Success; |
5483 | 0 | } |
5484 | | |
5485 | | // 'u6_3Imm' class |
5486 | 488k | if (Kind == MCK_u6_3Imm) { |
5487 | 0 | if (Operand.isu6_3Imm()) |
5488 | 0 | return MCTargetAsmParser::Match_Success; |
5489 | 0 | } |
5490 | | |
5491 | | // 'u7Ext' class |
5492 | 488k | if (Kind == MCK_u7Ext) { |
5493 | 0 | if (Operand.isu7Ext()) |
5494 | 0 | return MCTargetAsmParser::Match_Success; |
5495 | 0 | } |
5496 | | |
5497 | | // 'u7Imm' class |
5498 | 488k | if (Kind == MCK_u7Imm) { |
5499 | 0 | if (Operand.isu7Imm()) |
5500 | 0 | return MCTargetAsmParser::Match_Success; |
5501 | 0 | } |
5502 | | |
5503 | | // 'u8Ext' class |
5504 | 488k | if (Kind == MCK_u8Ext) { |
5505 | 0 | if (Operand.isu8Ext()) |
5506 | 0 | return MCTargetAsmParser::Match_Success; |
5507 | 0 | } |
5508 | | |
5509 | | // 'u8Imm' class |
5510 | 488k | if (Kind == MCK_u8Imm) { |
5511 | 0 | if (Operand.isu8Imm()) |
5512 | 0 | return MCTargetAsmParser::Match_Success; |
5513 | 0 | } |
5514 | | |
5515 | | // 'u9Ext' class |
5516 | 488k | if (Kind == MCK_u9Ext) { |
5517 | 0 | if (Operand.isu9Ext()) |
5518 | 0 | return MCTargetAsmParser::Match_Success; |
5519 | 0 | } |
5520 | | |
5521 | | // 'u9Imm' class |
5522 | 488k | if (Kind == MCK_u9Imm) { |
5523 | 0 | if (Operand.isu9Imm()) |
5524 | 0 | return MCTargetAsmParser::Match_Success; |
5525 | 0 | } |
5526 | | |
5527 | 488k | if (Operand.isReg()) { |
5528 | 488k | MatchClassKind OpKind; |
5529 | 488k | switch (Operand.getReg()) { |
5530 | 0 | default: OpKind = InvalidMatchClass; break; |
5531 | 56.6k | case Hexagon::R0: OpKind = MCK_IntRegsLow8; break; |
5532 | 7.08k | case Hexagon::R1: OpKind = MCK_IntRegsLow8; break; |
5533 | 12.6k | case Hexagon::R2: OpKind = MCK_IntRegsLow8; break; |
5534 | 19.9k | case Hexagon::R3: OpKind = MCK_IntRegsLow8; break; |
5535 | 7.03k | case Hexagon::R4: OpKind = MCK_IntRegsLow8; break; |
5536 | 5.01k | case Hexagon::R5: OpKind = MCK_IntRegsLow8; break; |
5537 | 24.2k | case Hexagon::R6: OpKind = MCK_IntRegsLow8; break; |
5538 | 17.6k | case Hexagon::R7: OpKind = MCK_IntRegsLow8; break; |
5539 | 11.1k | case Hexagon::R8: OpKind = MCK_IntRegs; break; |
5540 | 19.8k | case Hexagon::R9: OpKind = MCK_IntRegs; break; |
5541 | 21 | case Hexagon::R10: OpKind = MCK_IntRegs; break; |
5542 | 2.55k | case Hexagon::R11: OpKind = MCK_IntRegs; break; |
5543 | 0 | case Hexagon::R12: OpKind = MCK_IntRegs; break; |
5544 | 2.65k | case Hexagon::R13: OpKind = MCK_IntRegs; break; |
5545 | 0 | case Hexagon::R14: OpKind = MCK_IntRegs; break; |
5546 | 2.17k | case Hexagon::R15: OpKind = MCK_IntRegs; break; |
5547 | 0 | case Hexagon::R16: OpKind = MCK_IntRegs; break; |
5548 | 49 | case Hexagon::R17: OpKind = MCK_IntRegs; break; |
5549 | 0 | case Hexagon::R18: OpKind = MCK_IntRegs; break; |
5550 | 0 | case Hexagon::R19: OpKind = MCK_IntRegs; break; |
5551 | 6.53k | case Hexagon::R20: OpKind = MCK_IntRegs; break; |
5552 | 2.17k | case Hexagon::R21: OpKind = MCK_IntRegs; break; |
5553 | 7 | case Hexagon::R22: OpKind = MCK_IntRegs; break; |
5554 | 14 | case Hexagon::R23: OpKind = MCK_IntRegs; break; |
5555 | 26 | case Hexagon::R24: OpKind = MCK_IntRegs; break; |
5556 | 0 | case Hexagon::R25: OpKind = MCK_IntRegs; break; |
5557 | 13 | case Hexagon::R26: OpKind = MCK_IntRegs; break; |
5558 | 0 | case Hexagon::R27: OpKind = MCK_IntRegs; break; |
5559 | 0 | case Hexagon::R28: OpKind = MCK_IntRegs; break; |
5560 | 2.16k | case Hexagon::R29: OpKind = MCK_IntRegs; break; |
5561 | 0 | case Hexagon::R30: OpKind = MCK_IntRegs; break; |
5562 | 0 | case Hexagon::R31: OpKind = MCK_IntRegs; break; |
5563 | 2 | case Hexagon::D0: OpKind = MCK_Reg2; break; |
5564 | 0 | case Hexagon::D1: OpKind = MCK_Reg2; break; |
5565 | 0 | case Hexagon::D2: OpKind = MCK_Reg2; break; |
5566 | 6.77k | case Hexagon::D3: OpKind = MCK_Reg2; break; |
5567 | 7 | case Hexagon::D4: OpKind = MCK_DoubleRegs; break; |
5568 | 0 | case Hexagon::D5: OpKind = MCK_DoubleRegs; break; |
5569 | 4.33k | case Hexagon::D6: OpKind = MCK_DoubleRegs; break; |
5570 | 0 | case Hexagon::D7: OpKind = MCK_DoubleRegs; break; |
5571 | 2.16k | case Hexagon::D8: OpKind = MCK_DoubleRegs; break; |
5572 | 0 | case Hexagon::D9: OpKind = MCK_DoubleRegs; break; |
5573 | 0 | case Hexagon::D10: OpKind = MCK_DoubleRegs; break; |
5574 | 0 | case Hexagon::D11: OpKind = MCK_DoubleRegs; break; |
5575 | 0 | case Hexagon::D12: OpKind = MCK_DoubleRegs; break; |
5576 | 0 | case Hexagon::D13: OpKind = MCK_DoubleRegs; break; |
5577 | 0 | case Hexagon::D14: OpKind = MCK_DoubleRegs; break; |
5578 | 0 | case Hexagon::D15: OpKind = MCK_DoubleRegs; break; |
5579 | 26.6k | case Hexagon::P0: OpKind = MCK_P0; break; |
5580 | 19.6k | case Hexagon::P1: OpKind = MCK_P1; break; |
5581 | 12.0k | case Hexagon::P2: OpKind = MCK_PredRegs; break; |
5582 | 2.45k | case Hexagon::P3: OpKind = MCK_P3; break; |
5583 | 6.50k | case Hexagon::M0: OpKind = MCK_M0; break; |
5584 | 13.0k | case Hexagon::M1: OpKind = MCK_M1; break; |
5585 | 0 | case Hexagon::USR_OVF: OpKind = MCK_CtrRegs; break; |
5586 | 0 | case Hexagon::SA0: OpKind = MCK_CtrRegs; break; |
5587 | 0 | case Hexagon::LC0: OpKind = MCK_CtrRegs; break; |
5588 | 0 | case Hexagon::SA1: OpKind = MCK_CtrRegs; break; |
5589 | 0 | case Hexagon::LC1: OpKind = MCK_CtrRegs; break; |
5590 | 2.16k | case Hexagon::P3_0: OpKind = MCK_CtrRegs; break; |
5591 | 4.33k | case Hexagon::C6: OpKind = MCK_CtrRegs; break; |
5592 | 6.62k | case Hexagon::C7: OpKind = MCK_CtrRegs; break; |
5593 | 0 | case Hexagon::USR: OpKind = MCK_Reg12; break; |
5594 | 41.0k | case Hexagon::PC: OpKind = MCK_PC; break; |
5595 | 0 | case Hexagon::UGP: OpKind = MCK_CtrRegs; break; |
5596 | 2.16k | case Hexagon::GP: OpKind = MCK_GP; break; |
5597 | 0 | case Hexagon::CS0: OpKind = MCK_CtrRegs; break; |
5598 | 0 | case Hexagon::CS1: OpKind = MCK_CtrRegs; break; |
5599 | 0 | case Hexagon::UPCL: OpKind = MCK_CtrRegs; break; |
5600 | 0 | case Hexagon::UPCH: OpKind = MCK_CtrRegs; break; |
5601 | 0 | case Hexagon::C1_0: OpKind = MCK_CtrRegs64; break; |
5602 | 12 | case Hexagon::C3_2: OpKind = MCK_CtrRegs64; break; |
5603 | 0 | case Hexagon::C7_6: OpKind = MCK_CtrRegs64; break; |
5604 | 1 | case Hexagon::C9_8: OpKind = MCK_Reg16; break; |
5605 | 0 | case Hexagon::C11_10: OpKind = MCK_CtrRegs64; break; |
5606 | 0 | case Hexagon::CS: OpKind = MCK_CtrRegs64; break; |
5607 | 0 | case Hexagon::UPC: OpKind = MCK_CtrRegs64; break; |
5608 | 8.72k | case Hexagon::V0: OpKind = MCK_VectorRegs; break; |
5609 | 39.0k | case Hexagon::V1: OpKind = MCK_VectorRegs; break; |
5610 | 2.16k | case Hexagon::V2: OpKind = MCK_VectorRegs; break; |
5611 | 4.39k | case Hexagon::V3: OpKind = MCK_VectorRegs; break; |
5612 | 2.16k | case Hexagon::V4: OpKind = MCK_VectorRegs; break; |
5613 | 6.50k | case Hexagon::V5: OpKind = MCK_VectorRegs; break; |
5614 | 4.33k | case Hexagon::V6: OpKind = MCK_VectorRegs; break; |
5615 | 2.16k | case Hexagon::V7: OpKind = MCK_VectorRegs; break; |
5616 | 10.8k | case Hexagon::V8: OpKind = MCK_VectorRegs; break; |
5617 | 2.16k | case Hexagon::V9: OpKind = MCK_VectorRegs; break; |
5618 | 0 | case Hexagon::V10: OpKind = MCK_VectorRegs; break; |
5619 | 4.45k | case Hexagon::V11: OpKind = MCK_VectorRegs; break; |
5620 | 0 | case Hexagon::V12: OpKind = MCK_VectorRegs; break; |
5621 | 2.16k | case Hexagon::V13: OpKind = MCK_VectorRegs; break; |
5622 | 0 | case Hexagon::V14: OpKind = MCK_VectorRegs; break; |
5623 | 2.16k | case Hexagon::V15: OpKind = MCK_VectorRegs; break; |
5624 | 0 | case Hexagon::V16: OpKind = MCK_VectorRegs; break; |
5625 | 0 | case Hexagon::V17: OpKind = MCK_VectorRegs; break; |
5626 | 0 | case Hexagon::V18: OpKind = MCK_VectorRegs; break; |
5627 | 2.16k | case Hexagon::V19: OpKind = MCK_VectorRegs; break; |
5628 | 2.16k | case Hexagon::V20: OpKind = MCK_VectorRegs; break; |
5629 | 0 | case Hexagon::V21: OpKind = MCK_VectorRegs; break; |
5630 | 0 | case Hexagon::V22: OpKind = MCK_VectorRegs; break; |
5631 | 0 | case Hexagon::V23: OpKind = MCK_VectorRegs; break; |
5632 | 0 | case Hexagon::V24: OpKind = MCK_VectorRegs; break; |
5633 | 0 | case Hexagon::V25: OpKind = MCK_VectorRegs; break; |
5634 | 0 | case Hexagon::V26: OpKind = MCK_VectorRegs; break; |
5635 | 0 | case Hexagon::V27: OpKind = MCK_VectorRegs; break; |
5636 | 0 | case Hexagon::V28: OpKind = MCK_VectorRegs; break; |
5637 | 0 | case Hexagon::V29: OpKind = MCK_VectorRegs; break; |
5638 | 0 | case Hexagon::V30: OpKind = MCK_VectorRegs; break; |
5639 | 0 | case Hexagon::V31: OpKind = MCK_VectorRegs; break; |
5640 | 0 | case Hexagon::W0: OpKind = MCK_VecDblRegs; break; |
5641 | 0 | case Hexagon::W1: OpKind = MCK_VecDblRegs; break; |
5642 | 0 | case Hexagon::W2: OpKind = MCK_VecDblRegs; break; |
5643 | 1 | case Hexagon::W3: OpKind = MCK_VecDblRegs; break; |
5644 | 45 | case Hexagon::W4: OpKind = MCK_VecDblRegs; break; |
5645 | 0 | case Hexagon::W5: OpKind = MCK_VecDblRegs; break; |
5646 | 0 | case Hexagon::W6: OpKind = MCK_VecDblRegs; break; |
5647 | 2.25k | case Hexagon::W7: OpKind = MCK_VecDblRegs; break; |
5648 | 0 | case Hexagon::W8: OpKind = MCK_VecDblRegs; break; |
5649 | 2.16k | case Hexagon::W9: OpKind = MCK_VecDblRegs; break; |
5650 | 6.50k | case Hexagon::W10: OpKind = MCK_VecDblRegs; break; |
5651 | 0 | case Hexagon::W11: OpKind = MCK_VecDblRegs; break; |
5652 | 0 | case Hexagon::W12: OpKind = MCK_VecDblRegs; break; |
5653 | 0 | case Hexagon::W13: OpKind = MCK_VecDblRegs; break; |
5654 | 0 | case Hexagon::W14: OpKind = MCK_VecDblRegs; break; |
5655 | 0 | case Hexagon::W15: OpKind = MCK_VecDblRegs; break; |
5656 | 19.5k | case Hexagon::Q0: OpKind = MCK_VecPredRegs; break; |
5657 | 6.50k | case Hexagon::Q1: OpKind = MCK_VecPredRegs; break; |
5658 | 2.16k | case Hexagon::Q2: OpKind = MCK_VecPredRegs; break; |
5659 | 4.33k | case Hexagon::Q3: OpKind = MCK_VecPredRegs; break; |
5660 | 488k | } |
5661 | 488k | return isSubclass(OpKind, Kind) ? MCTargetAsmParser::Match_Success : |
5662 | 488k | MCTargetAsmParser::Match_InvalidOperand; |
5663 | 488k | } |
5664 | | |
5665 | 32 | return MCTargetAsmParser::Match_InvalidOperand; |
5666 | 488k | } |
5667 | | |
5668 | | uint64_t HexagonAsmParser:: |
5669 | 3.26k | ComputeAvailableFeatures(const FeatureBitset& FB) const { |
5670 | 3.26k | uint64_t Features = 0; |
5671 | 3.26k | if ((FB[Hexagon::ArchV55])) |
5672 | 3.26k | Features |= Feature_HasV55T; |
5673 | 3.26k | if ((FB[Hexagon::ArchV60])) |
5674 | 3.26k | Features |= Feature_HasV60T; |
5675 | 3.26k | if ((FB[Hexagon::ExtensionHVXDbl])) |
5676 | 0 | Features |= Feature_UseHVXDbl; |
5677 | 3.26k | if ((FB[Hexagon::ExtensionHVX])) |
5678 | 3.26k | Features |= Feature_UseHVX; |
5679 | 3.26k | return Features; |
5680 | 3.26k | } |
5681 | | |
5682 | | static const char *const MnemonicTable = |
5683 | | "\000\nallocframe\007barrier\004call\005callr\010dccleana\013dccleaninva" |
5684 | | "\007dcfetch\006dcinva\007dczeroa\016dealloc_return\014deallocframe\006h" |
5685 | | "intjr\006icinva\002if\005isync\004jump\005jumpr\007l2fetch\010l2gclean\013" |
5686 | | "l2gcleaninv\tl2gunlock\tl2unlocka\005loop0\005loop1\002m0\002m1\004memb" |
5687 | | "\004memd\013memd_locked\004memh\004memw\013memw_locked\003nop\002p0\002" |
5688 | | "p1\002p3\006syncht\005trace\005vdeal\005vhist\004vmem\005vmemu\006vshuf" |
5689 | | "f\005vvmem"; |
5690 | | |
5691 | | namespace { |
5692 | | struct MatchEntry { |
5693 | | uint16_t Mnemonic; |
5694 | | uint16_t Opcode; |
5695 | | uint16_t ConvertFn; |
5696 | | uint8_t RequiredFeatures; |
5697 | | uint16_t Classes[24]; |
5698 | 50.9k | StringRef getMnemonic() const { |
5699 | 50.9k | return StringRef(MnemonicTable + Mnemonic + 1, |
5700 | 50.9k | MnemonicTable[Mnemonic]); |
5701 | 50.9k | } |
5702 | | }; |
5703 | | |
5704 | | // Predicate for searching for an opcode. |
5705 | | struct LessOpcode { |
5706 | 34.8k | bool operator()(const MatchEntry &LHS, StringRef RHS) { |
5707 | 34.8k | return LHS.getMnemonic() < RHS; |
5708 | 34.8k | } |
5709 | 16.0k | bool operator()(StringRef LHS, const MatchEntry &RHS) { |
5710 | 16.0k | return LHS < RHS.getMnemonic(); |
5711 | 16.0k | } |
5712 | 0 | bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { |
5713 | 0 | return LHS.getMnemonic() < RHS.getMnemonic(); |
5714 | 0 | } |
5715 | | }; |
5716 | | } // end anonymous namespace. |
5717 | | |
5718 | | static const MatchEntry MatchTable0[] = { |
5719 | | { 0 /* */, Hexagon::C2_or, Convert__Reg1_0__Reg1_2__Reg1_2, 0, { MCK_PredRegs, MCK__61_, MCK_PredRegs }, }, |
5720 | | { 0 /* */, Hexagon::C2_tfrrp, Convert__Reg1_0__Reg1_2, 0, { MCK_PredRegs, MCK__61_, MCK_IntRegs }, }, |
5721 | | { 0 /* */, Hexagon::A4_tfrpcp, Convert__Reg1_0__Reg1_2, 0, { MCK_CtrRegs64, MCK__61_, MCK_DoubleRegs }, }, |
5722 | | { 0 /* */, Hexagon::A4_tfrcpp, Convert__Reg1_0__Reg1_2, 0, { MCK_DoubleRegs, MCK__61_, MCK_CtrRegs64 }, }, |
5723 | | { 0 /* */, Hexagon::A2_tfrp, Convert__Reg1_0__Reg1_2, 0, { MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
5724 | | { 0 /* */, Hexagon::A2_tfrrcr, Convert__Reg1_0__Reg1_2, 0, { MCK_CtrRegs, MCK__61_, MCK_IntRegs }, }, |
5725 | | { 0 /* */, Hexagon::A2_tfrcrr, Convert__Reg1_0__regC6, 0, { MCK_IntRegs, MCK__61_, MCK_M0 }, }, |
5726 | | { 0 /* */, Hexagon::A2_tfrcrr, Convert__Reg1_0__regC6, 0, { MCK_IntRegs, MCK__61_, MCK_M0 }, }, |
5727 | | { 0 /* */, Hexagon::A2_tfrcrr, Convert__Reg1_0__regC7, 0, { MCK_IntRegs, MCK__61_, MCK_M1 }, }, |
5728 | | { 0 /* */, Hexagon::A2_tfrcrr, Convert__Reg1_0__regC7, 0, { MCK_IntRegs, MCK__61_, MCK_M1 }, }, |
5729 | | { 0 /* */, Hexagon::C2_tfrpr, Convert__Reg1_0__Reg1_2, 0, { MCK_IntRegs, MCK__61_, MCK_PredRegs }, }, |
5730 | | { 0 /* */, Hexagon::A2_tfrcrr, Convert__Reg1_0__Reg1_2, 0, { MCK_IntRegs, MCK__61_, MCK_CtrRegs }, }, |
5731 | | { 0 /* */, Hexagon::A2_tfr, Convert__Reg1_0__Reg1_2, 0, { MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
5732 | | { 0 /* */, Hexagon::V6_vassign, Convert__Reg1_0__Reg1_2, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_VectorRegs }, }, |
5733 | | { 0 /* */, Hexagon::A2_tfrpi, Convert__Reg1_0__s8Imm641_3, 0, { MCK_DoubleRegs, MCK__61_, MCK__35_, MCK_s8Imm64 }, }, |
5734 | | { 0 /* */, Hexagon::TFRI64_V4, Convert__Reg1_0__u64Imm1_3, 0, { MCK_DoubleRegs, MCK__61_, MCK__35_, MCK_u64Imm }, }, |
5735 | | { 0 /* */, Hexagon::A2_tfrsi, Convert__Reg1_0__s16Ext1_3, 0, { MCK_IntRegs, MCK__61_, MCK__35_, MCK_s16Ext }, }, |
5736 | | { 0 /* */, Hexagon::C2_all8, Convert__Reg1_0__Reg1_4, 0, { MCK_PredRegs, MCK__61_, MCK_all8, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
5737 | | { 0 /* */, Hexagon::C2_any8, Convert__Reg1_0__Reg1_4, 0, { MCK_PredRegs, MCK__61_, MCK_any8, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
5738 | | { 0 /* */, Hexagon::Y5_l2locka, Convert__Reg1_0__Reg1_4, 0, { MCK_PredRegs, MCK__61_, MCK_l2locka, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5739 | | { 0 /* */, Hexagon::C2_not, Convert__Reg1_0__Reg1_4, 0, { MCK_PredRegs, MCK__61_, MCK_not, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
5740 | | { 0 /* */, Hexagon::V6_pred_not, Convert__Reg1_0__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_not, MCK__40_, MCK_VecPredRegs, MCK__41_ }, }, |
5741 | | { 0 /* */, Hexagon::V6_pred_scalar2, Convert__Reg1_0__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_vsetq, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5742 | | { 0 /* */, Hexagon::A2_absp, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_abs, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5743 | | { 0 /* */, Hexagon::S2_brevp, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_brev, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5744 | | { 0 /* */, Hexagon::F2_conv_d2df, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_d2df, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5745 | | { 0 /* */, Hexagon::F2_conv_df2d, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2d, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5746 | | { 0 /* */, Hexagon::F2_conv_df2ud, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2ud, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5747 | | { 0 /* */, Hexagon::F2_conv_sf2d, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2d, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5748 | | { 0 /* */, Hexagon::F2_conv_sf2df, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2df, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5749 | | { 0 /* */, Hexagon::F2_conv_sf2ud, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2ud, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5750 | | { 0 /* */, Hexagon::F2_conv_ud2df, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_ud2df, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5751 | | { 0 /* */, Hexagon::F2_conv_uw2df, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_uw2df, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5752 | | { 0 /* */, Hexagon::F2_conv_w2df, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_w2df, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5753 | | { 0 /* */, Hexagon::S2_deinterleave, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_deinterleave, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5754 | | { 0 /* */, Hexagon::S2_interleave, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_interleave, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5755 | | { 0 /* */, Hexagon::C2_mask, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_mask, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
5756 | | { 0 /* */, Hexagon::L2_loadalignb_io, Convert__Reg1_0__Tie0__Reg1_4__imm_95_0, 0, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5757 | | { 0 /* */, Hexagon::L2_loadbsw4_io, Convert__Reg1_0__Reg1_4__imm_95_0, 0, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5758 | | { 0 /* */, Hexagon::L2_loadrd_io, Convert__Reg1_0__Reg1_4__imm_95_0, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5759 | | { 0 /* */, Hexagon::L4_loadd_locked, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd_95_locked, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5760 | | { 0 /* */, Hexagon::L2_loadalignh_io, Convert__Reg1_0__Tie0__Reg1_4__imm_95_0, 0, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5761 | | { 0 /* */, Hexagon::L2_loadbzw4_io, Convert__Reg1_0__Reg1_4__imm_95_0, 0, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5762 | | { 0 /* */, Hexagon::A2_negp, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_neg, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5763 | | { 0 /* */, Hexagon::A2_notp, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_not, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5764 | | { 0 /* */, Hexagon::A2_sxtw, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_sxtw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5765 | | { 0 /* */, Hexagon::A2_vabsh, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vabsh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5766 | | { 0 /* */, Hexagon::A2_vabsw, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vabsw, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5767 | | { 0 /* */, Hexagon::S2_vsathb_nopack, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsathb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5768 | | { 0 /* */, Hexagon::S2_vsathub_nopack, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsathub, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5769 | | { 0 /* */, Hexagon::S2_vsatwh_nopack, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsatwh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5770 | | { 0 /* */, Hexagon::S2_vsatwuh_nopack, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsatwuh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5771 | | { 0 /* */, Hexagon::S2_vsplatrh, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsplath, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5772 | | { 0 /* */, Hexagon::S2_vsxtbh, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsxtbh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5773 | | { 0 /* */, Hexagon::S2_vsxthw, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsxthw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5774 | | { 0 /* */, Hexagon::S2_vzxtbh, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vzxtbh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5775 | | { 0 /* */, Hexagon::S2_vzxthw, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vzxthw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5776 | | { 0 /* */, Hexagon::HEXAGON_V6_vassignp, Convert__Reg1_0__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__61_, MCK_vassignp_95_W, MCK__40_, MCK_VecDblRegs, MCK__41_ }, }, |
5777 | | { 0 /* */, Hexagon::HEXAGON_V6_vassignp_128B, Convert__Reg1_0__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__61_, MCK_vassignp_95_W_95_128B, MCK__40_, MCK_VecDblRegs, MCK__41_ }, }, |
5778 | | { 0 /* */, Hexagon::A2_tfrih, Convert__Reg1_0__Tie0__u16Imm1_5, 0, { MCK_IntRegs, MCK__DOT_, MCK_h, MCK__61_, MCK__35_, MCK_u16Imm }, }, |
5779 | | { 0 /* */, Hexagon::A2_tfril, Convert__Reg1_0__Tie0__u16Imm1_5, 0, { MCK_IntRegs, MCK__DOT_, MCK_l, MCK__61_, MCK__35_, MCK_u16Imm }, }, |
5780 | | { 0 /* */, Hexagon::A2_abs, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_abs, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5781 | | { 0 /* */, Hexagon::A2_aslh, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5782 | | { 0 /* */, Hexagon::A2_asrh, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5783 | | { 0 /* */, Hexagon::S2_brev, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_brev, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5784 | | { 0 /* */, Hexagon::S2_cl0p, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_cl0, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5785 | | { 0 /* */, Hexagon::S2_cl0, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_cl0, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5786 | | { 0 /* */, Hexagon::S2_cl1p, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_cl1, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5787 | | { 0 /* */, Hexagon::S2_cl1, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_cl1, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5788 | | { 0 /* */, Hexagon::S2_clbp, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_clb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5789 | | { 0 /* */, Hexagon::S2_clb, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_clb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5790 | | { 0 /* */, Hexagon::F2_conv_d2sf, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_d2sf, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5791 | | { 0 /* */, Hexagon::F2_conv_df2sf, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2sf, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5792 | | { 0 /* */, Hexagon::F2_conv_df2uw, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2uw, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5793 | | { 0 /* */, Hexagon::F2_conv_df2w, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2w, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5794 | | { 0 /* */, Hexagon::F2_conv_sf2uw, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2uw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5795 | | { 0 /* */, Hexagon::F2_conv_sf2w, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2w, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5796 | | { 0 /* */, Hexagon::F2_conv_ud2sf, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_ud2sf, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5797 | | { 0 /* */, Hexagon::F2_conv_uw2sf, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_uw2sf, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5798 | | { 0 /* */, Hexagon::F2_conv_w2sf, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_w2sf, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5799 | | { 0 /* */, Hexagon::S2_ct0p, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_ct0, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5800 | | { 0 /* */, Hexagon::S2_ct0, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_ct0, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5801 | | { 0 /* */, Hexagon::S2_ct1p, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_ct1, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5802 | | { 0 /* */, Hexagon::S2_ct1, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_ct1, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5803 | | { 0 /* */, Hexagon::L2_loadrb_io, Convert__Reg1_0__Reg1_4__imm_95_0, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5804 | | { 0 /* */, Hexagon::L2_loadbsw2_io, Convert__Reg1_0__Reg1_4__imm_95_0, 0, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5805 | | { 0 /* */, Hexagon::L2_loadrh_io, Convert__Reg1_0__Reg1_4__imm_95_0, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5806 | | { 0 /* */, Hexagon::L2_loadrub_io, Convert__Reg1_0__Reg1_4__imm_95_0, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5807 | | { 0 /* */, Hexagon::L2_loadbzw2_io, Convert__Reg1_0__Reg1_4__imm_95_0, 0, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5808 | | { 0 /* */, Hexagon::L2_loadruh_io, Convert__Reg1_0__Reg1_4__imm_95_0, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5809 | | { 0 /* */, Hexagon::L2_loadri_io, Convert__Reg1_0__Reg1_4__imm_95_0, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5810 | | { 0 /* */, Hexagon::L2_loadw_locked, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_memw_95_locked, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5811 | | { 0 /* */, Hexagon::A2_subri, Convert__Reg1_0__imm_95_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_neg, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5812 | | { 0 /* */, Hexagon::S4_clbpnorm, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_normamt, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5813 | | { 0 /* */, Hexagon::S2_clbnorm, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_normamt, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5814 | | { 0 /* */, Hexagon::A2_not, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_not, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5815 | | { 0 /* */, Hexagon::S5_popcountp, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_popcount, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5816 | | { 0 /* */, Hexagon::A2_sat, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_sat, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5817 | | { 0 /* */, Hexagon::A2_satb, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_satb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5818 | | { 0 /* */, Hexagon::A2_sath, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_sath, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5819 | | { 0 /* */, Hexagon::A2_satub, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_satub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5820 | | { 0 /* */, Hexagon::A2_satuh, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_satuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5821 | | { 0 /* */, Hexagon::F2_sffixupr, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_sffixupr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5822 | | { 0 /* */, Hexagon::A2_swiz, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_swiz, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5823 | | { 0 /* */, Hexagon::A2_sxtb, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5824 | | { 0 /* */, Hexagon::A2_sxth, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5825 | | { 0 /* */, Hexagon::S2_vrndpackwh, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_vrndwh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5826 | | { 0 /* */, Hexagon::S2_vsathb, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_vsathb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5827 | | { 0 /* */, Hexagon::S2_svsathb, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_vsathb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5828 | | { 0 /* */, Hexagon::S2_vsathub, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_vsathub, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5829 | | { 0 /* */, Hexagon::S2_svsathub, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_vsathub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5830 | | { 0 /* */, Hexagon::S2_vsatwh, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_vsatwh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5831 | | { 0 /* */, Hexagon::S2_vsatwuh, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_vsatwuh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5832 | | { 0 /* */, Hexagon::S2_vsplatrb, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_vsplatb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5833 | | { 0 /* */, Hexagon::S2_vtrunehb, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_vtrunehb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5834 | | { 0 /* */, Hexagon::S2_vtrunohb, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_vtrunohb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
5835 | | { 0 /* */, Hexagon::A2_zxtb, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5836 | | { 0 /* */, Hexagon::A2_zxth, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5837 | | { 0 /* */, Hexagon::J4_jumpsetr, Convert__Reg1_0__Reg1_2__Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_IntRegs, MCK__59_, MCK_jump, MCK_Imm }, }, |
5838 | | { 0 /* */, Hexagon::HEXAGON_V6_hi, Convert__Reg1_0__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_hi_95_W, MCK__40_, MCK_VecDblRegs, MCK__41_ }, }, |
5839 | | { 0 /* */, Hexagon::HEXAGON_V6_hi_128B, Convert__Reg1_0__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_hi_95_W, MCK__40_, MCK_VecDblRegs, MCK__41_ }, }, |
5840 | | { 0 /* */, Hexagon::HEXAGON_V6_lo, Convert__Reg1_0__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_lo_95_W, MCK__40_, MCK_VecDblRegs, MCK__41_ }, }, |
5841 | | { 0 /* */, Hexagon::HEXAGON_V6_lo_128B, Convert__Reg1_0__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_lo_95_W, MCK__40_, MCK_VecDblRegs, MCK__41_ }, }, |
5842 | | { 0 /* */, Hexagon::V6_vnot, Convert__Reg1_0__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vnot, MCK__40_, MCK_VectorRegs, MCK__41_ }, }, |
5843 | | { 0 /* */, Hexagon::V6_lvsplatw, Convert__Reg1_0__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vsplat, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
5844 | | { 0 /* */, Hexagon::C2_and, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
5845 | | { 0 /* */, Hexagon::C2_bitsclr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_PredRegs, MCK__61_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5846 | | { 0 /* */, Hexagon::C2_bitsset, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_PredRegs, MCK__61_, MCK_bitsset, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5847 | | { 0 /* */, Hexagon::A4_boundscheck, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_PredRegs, MCK__61_, MCK_boundscheck, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5848 | | { 0 /* */, Hexagon::C4_fastcorner9, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_PredRegs, MCK__61_, MCK_fastcorner9, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
5849 | | { 0 /* */, Hexagon::C2_or, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
5850 | | { 0 /* */, Hexagon::A4_tlbmatch, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_PredRegs, MCK__61_, MCK_tlbmatch, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5851 | | { 0 /* */, Hexagon::S2_tstbit_r, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_PredRegs, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5852 | | { 0 /* */, Hexagon::C2_xor, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_PredRegs, MCK__61_, MCK_xor, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
5853 | | { 0 /* */, Hexagon::V6_pred_and, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_and, MCK__40_, MCK_VecPredRegs, MCK_VecPredRegs, MCK__41_ }, }, |
5854 | | { 0 /* */, Hexagon::V6_pred_or, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_or, MCK__40_, MCK_VecPredRegs, MCK_VecPredRegs, MCK__41_ }, }, |
5855 | | { 0 /* */, Hexagon::V6_vandvrt, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_vand, MCK__40_, MCK_VectorRegs, MCK_IntRegs, MCK__41_ }, }, |
5856 | | { 0 /* */, Hexagon::V6_pred_xor, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_xor, MCK__40_, MCK_VecPredRegs, MCK_VecPredRegs, MCK__41_ }, }, |
5857 | | { 0 /* */, Hexagon::CONST64_Float_Real, Convert__Reg1_0__Imm1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_CONST64, MCK__40_, MCK__35_, MCK_Imm, MCK__41_ }, }, |
5858 | | { 0 /* */, Hexagon::CONST64_Int_Real, Convert__Reg1_0__Imm1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_CONST64, MCK__40_, MCK__35_, MCK_Imm, MCK__41_ }, }, |
5859 | | { 0 /* */, Hexagon::A2_addp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5860 | | { 0 /* */, Hexagon::A2_addsp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5861 | | { 0 /* */, Hexagon::A2_andp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_and, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5862 | | { 0 /* */, Hexagon::S2_asl_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5863 | | { 0 /* */, Hexagon::S2_asr_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5864 | | { 0 /* */, Hexagon::A4_bitsplit, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_bitsplit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5865 | | { 0 /* */, Hexagon::M2_cmpyi_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_cmpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5866 | | { 0 /* */, Hexagon::M2_cmpyr_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_cmpyr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5867 | | { 0 /* */, Hexagon::A2_combinew, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5868 | | { 0 /* */, Hexagon::S2_cabacdecbin, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_decbin, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5869 | | { 0 /* */, Hexagon::S4_extractp_rp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_extract, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5870 | | { 0 /* */, Hexagon::S2_extractup_rp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5871 | | { 0 /* */, Hexagon::S2_insertp_rp, Convert__Reg1_0__Tie0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_insert, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5872 | | { 0 /* */, Hexagon::S2_lfsp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_lfs, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5873 | | { 0 /* */, Hexagon::S2_lsl_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5874 | | { 0 /* */, Hexagon::S2_lsr_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5875 | | { 0 /* */, Hexagon::A2_maxp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_max, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5876 | | { 0 /* */, Hexagon::A2_maxup, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_maxu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5877 | | { 0 /* */, Hexagon::L2_loadrdgp, Convert__Reg1_0__u16_3Imm1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__35_, MCK_u16_3Imm, MCK__41_ }, }, |
5878 | | { 0 /* */, Hexagon::L4_loadrd_abs, Convert__Reg1_0__u32MustExt1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
5879 | | { 0 /* */, Hexagon::A2_minp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_min, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5880 | | { 0 /* */, Hexagon::A2_minup, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_minu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5881 | | { 0 /* */, Hexagon::M2_dpmpyss_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5882 | | { 0 /* */, Hexagon::M2_dpmpyuu_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5883 | | { 0 /* */, Hexagon::A2_orp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_or, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5884 | | { 0 /* */, Hexagon::S2_packhl, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_packhl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5885 | | { 0 /* */, Hexagon::M4_pmpyw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_pmpyw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5886 | | { 0 /* */, Hexagon::S2_shuffeb, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_shuffeb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5887 | | { 0 /* */, Hexagon::S2_shuffeh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_shuffeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5888 | | { 0 /* */, Hexagon::S2_shuffob, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_shuffob, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5889 | | { 0 /* */, Hexagon::S2_shuffoh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_shuffoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5890 | | { 0 /* */, Hexagon::A2_subp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_sub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5891 | | { 0 /* */, Hexagon::M2_vabsdiffh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vabsdiffh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5892 | | { 0 /* */, Hexagon::M2_vabsdiffw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vabsdiffw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5893 | | { 0 /* */, Hexagon::A2_vaddub, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vaddb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5894 | | { 0 /* */, Hexagon::A2_vaddh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5895 | | { 0 /* */, Hexagon::A2_vaddub, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vaddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5896 | | { 0 /* */, Hexagon::A2_vaddw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vaddw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5897 | | { 0 /* */, Hexagon::S2_asl_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vaslh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5898 | | { 0 /* */, Hexagon::S2_asl_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vaslw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5899 | | { 0 /* */, Hexagon::S2_asr_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5900 | | { 0 /* */, Hexagon::S2_asr_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5901 | | { 0 /* */, Hexagon::A2_vavgh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5902 | | { 0 /* */, Hexagon::A2_vavgub, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavgub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5903 | | { 0 /* */, Hexagon::A2_vavguh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavguh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5904 | | { 0 /* */, Hexagon::A2_vavguw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavguw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5905 | | { 0 /* */, Hexagon::A2_vavgw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5906 | | { 0 /* */, Hexagon::S2_vcnegh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vcnegh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5907 | | { 0 /* */, Hexagon::S2_vcrotate, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vcrotate, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5908 | | { 0 /* */, Hexagon::S2_lsl_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vlslh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5909 | | { 0 /* */, Hexagon::S2_lsl_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vlslw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5910 | | { 0 /* */, Hexagon::S2_lsr_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vlsrh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5911 | | { 0 /* */, Hexagon::S2_lsr_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vlsrw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5912 | | { 0 /* */, Hexagon::A2_vmaxb, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmaxb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5913 | | { 0 /* */, Hexagon::A2_vmaxh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmaxh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5914 | | { 0 /* */, Hexagon::A2_vmaxub, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmaxub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5915 | | { 0 /* */, Hexagon::A2_vmaxuh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmaxuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5916 | | { 0 /* */, Hexagon::A2_vmaxuw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmaxuw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5917 | | { 0 /* */, Hexagon::A2_vmaxw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmaxw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5918 | | { 0 /* */, Hexagon::A2_vminb, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vminb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5919 | | { 0 /* */, Hexagon::A2_vminh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vminh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5920 | | { 0 /* */, Hexagon::A2_vminub, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vminub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5921 | | { 0 /* */, Hexagon::A2_vminuh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vminuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5922 | | { 0 /* */, Hexagon::A2_vminuw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vminuw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5923 | | { 0 /* */, Hexagon::A2_vminw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vminw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5924 | | { 0 /* */, Hexagon::M5_vmpybsu, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpybsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5925 | | { 0 /* */, Hexagon::M5_vmpybuu, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpybu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5926 | | { 0 /* */, Hexagon::A2_vnavgh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5927 | | { 0 /* */, Hexagon::A2_vnavgw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vnavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5928 | | { 0 /* */, Hexagon::M4_vpmpyh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vpmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5929 | | { 0 /* */, Hexagon::A2_vraddub, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vraddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5930 | | { 0 /* */, Hexagon::M2_vrcmpyi_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5931 | | { 0 /* */, Hexagon::M2_vrcmpyr_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5932 | | { 0 /* */, Hexagon::A4_vrmaxh, Convert__Reg1_0__Tie0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5933 | | { 0 /* */, Hexagon::A4_vrmaxuh, Convert__Reg1_0__Tie0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxuh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5934 | | { 0 /* */, Hexagon::A4_vrmaxuw, Convert__Reg1_0__Tie0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxuw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5935 | | { 0 /* */, Hexagon::A4_vrmaxw, Convert__Reg1_0__Tie0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5936 | | { 0 /* */, Hexagon::A4_vrminh, Convert__Reg1_0__Tie0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrminh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5937 | | { 0 /* */, Hexagon::A4_vrminuh, Convert__Reg1_0__Tie0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrminuh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5938 | | { 0 /* */, Hexagon::A4_vrminuw, Convert__Reg1_0__Tie0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrminuw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5939 | | { 0 /* */, Hexagon::A4_vrminw, Convert__Reg1_0__Tie0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrminw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
5940 | | { 0 /* */, Hexagon::M5_vrmpybsu, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5941 | | { 0 /* */, Hexagon::M5_vrmpybuu, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrmpybu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5942 | | { 0 /* */, Hexagon::M2_vrmpy_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrmpyh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5943 | | { 0 /* */, Hexagon::M4_vrmpyeh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5944 | | { 0 /* */, Hexagon::M4_vrmpyoh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5945 | | { 0 /* */, Hexagon::A2_vrsadub, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrsadub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5946 | | { 0 /* */, Hexagon::A2_vsubub, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsubb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5947 | | { 0 /* */, Hexagon::A2_vsubh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5948 | | { 0 /* */, Hexagon::A2_vsubub, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsubub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5949 | | { 0 /* */, Hexagon::A2_vsubw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsubw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5950 | | { 0 /* */, Hexagon::S2_vtrunewh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vtrunewh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5951 | | { 0 /* */, Hexagon::S2_vtrunowh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vtrunowh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5952 | | { 0 /* */, Hexagon::A2_xorp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_xor, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5953 | | { 0 /* */, Hexagon::V6_vcombine, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__61_, MCK_vcombine, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK__41_ }, }, |
5954 | | { 0 /* */, Hexagon::J4_jumpseti, Convert__Reg1_0__u6Imm1_3__Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Imm, MCK__59_, MCK_jump, MCK_Imm }, }, |
5955 | | { 0 /* */, Hexagon::CONST32, Convert__Reg1_0__Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_CONST32, MCK__40_, MCK__35_, MCK_Imm, MCK__41_ }, }, |
5956 | | { 0 /* */, Hexagon::CONST32_Float_Real, Convert__Reg1_0__Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_CONST32, MCK__40_, MCK__35_, MCK_Imm, MCK__41_ }, }, |
5957 | | { 0 /* */, Hexagon::CONST32_Int_Real, Convert__Reg1_0__Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_CONST32, MCK__40_, MCK__35_, MCK_Imm, MCK__41_ }, }, |
5958 | | { 0 /* */, Hexagon::FCONST32_nsdata, Convert__Reg1_0__Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_CONST32, MCK__40_, MCK__35_, MCK_Imm, MCK__41_ }, }, |
5959 | | { 0 /* */, Hexagon::A2_add, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5960 | | { 0 /* */, Hexagon::A2_and, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5961 | | { 0 /* */, Hexagon::S2_asl_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5962 | | { 0 /* */, Hexagon::S2_asr_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5963 | | { 0 /* */, Hexagon::S2_clrbit_r, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_clrbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5964 | | { 0 /* */, Hexagon::A4_cround_rr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_cround, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5965 | | { 0 /* */, Hexagon::S4_extract_rp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_extract, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5966 | | { 0 /* */, Hexagon::S2_extractu_rp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5967 | | { 0 /* */, Hexagon::S2_insert_rp, Convert__Reg1_0__Tie0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_insert, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5968 | | { 0 /* */, Hexagon::S2_lsl_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5969 | | { 0 /* */, Hexagon::S2_lsr_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5970 | | { 0 /* */, Hexagon::A2_max, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_max, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5971 | | { 0 /* */, Hexagon::A2_maxu, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_maxu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5972 | | { 0 /* */, Hexagon::L2_loadrbgp, Convert__Reg1_0__u16_0Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__35_, MCK_u16_0Imm, MCK__41_ }, }, |
5973 | | { 0 /* */, Hexagon::L4_loadrb_abs, Convert__Reg1_0__u32MustExt1_5, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
5974 | | { 0 /* */, Hexagon::L2_loadrhgp, Convert__Reg1_0__u16_1Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__35_, MCK_u16_1Imm, MCK__41_ }, }, |
5975 | | { 0 /* */, Hexagon::L4_loadrh_abs, Convert__Reg1_0__u32MustExt1_5, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
5976 | | { 0 /* */, Hexagon::L2_loadrubgp, Convert__Reg1_0__u16_0Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__35_, MCK_u16_0Imm, MCK__41_ }, }, |
5977 | | { 0 /* */, Hexagon::L4_loadrub_abs, Convert__Reg1_0__u32MustExt1_5, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
5978 | | { 0 /* */, Hexagon::L2_loadruhgp, Convert__Reg1_0__u16_1Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__35_, MCK_u16_1Imm, MCK__41_ }, }, |
5979 | | { 0 /* */, Hexagon::L4_loadruh_abs, Convert__Reg1_0__u32MustExt1_5, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
5980 | | { 0 /* */, Hexagon::L2_loadrigp, Convert__Reg1_0__u16_2Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__35_, MCK_u16_2Imm, MCK__41_ }, }, |
5981 | | { 0 /* */, Hexagon::L4_loadri_abs, Convert__Reg1_0__u32MustExt1_5, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
5982 | | { 0 /* */, Hexagon::A2_min, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_min, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5983 | | { 0 /* */, Hexagon::A2_minu, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_minu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5984 | | { 0 /* */, Hexagon::A4_modwrapu, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_modwrap, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5985 | | { 0 /* */, Hexagon::M2_mpy_up, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5986 | | { 0 /* */, Hexagon::M2_mpyi, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5987 | | { 0 /* */, Hexagon::M2_mpysu_up, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpysu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5988 | | { 0 /* */, Hexagon::M2_mpyu_up, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5989 | | { 0 /* */, Hexagon::M2_mpyui, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpyui, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5990 | | { 0 /* */, Hexagon::M2_mpyi, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpyui, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5991 | | { 0 /* */, Hexagon::A2_or, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5992 | | { 0 /* */, Hexagon::S2_parityp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_parity, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
5993 | | { 0 /* */, Hexagon::S4_parity, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_parity, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5994 | | { 0 /* */, Hexagon::A4_round_rr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5995 | | { 0 /* */, Hexagon::S2_setbit_r, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_setbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5996 | | { 0 /* */, Hexagon::F2_sfadd, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sfadd, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5997 | | { 0 /* */, Hexagon::F2_sffixupd, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sffixupd, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5998 | | { 0 /* */, Hexagon::F2_sffixupn, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sffixupn, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
5999 | | { 0 /* */, Hexagon::F2_sfmax, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sfmax, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6000 | | { 0 /* */, Hexagon::F2_sfmin, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sfmin, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6001 | | { 0 /* */, Hexagon::F2_sfmpy, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6002 | | { 0 /* */, Hexagon::F2_sfsub, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sfsub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6003 | | { 0 /* */, Hexagon::A2_sub, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6004 | | { 0 /* */, Hexagon::S2_togglebit_r, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_togglebit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6005 | | { 0 /* */, Hexagon::A2_svaddh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6006 | | { 0 /* */, Hexagon::S2_asr_r_svw_trun, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6007 | | { 0 /* */, Hexagon::A2_svavgh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6008 | | { 0 /* */, Hexagon::V6_extractw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vextract, MCK__40_, MCK_VectorRegs, MCK_IntRegs, MCK__41_ }, }, |
6009 | | { 0 /* */, Hexagon::C2_vitpack, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vitpack, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
6010 | | { 0 /* */, Hexagon::A2_svnavgh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6011 | | { 0 /* */, Hexagon::M2_vraddh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vraddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6012 | | { 0 /* */, Hexagon::M2_vradduh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vradduh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6013 | | { 0 /* */, Hexagon::A2_svsubh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6014 | | { 0 /* */, Hexagon::A2_xor, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6015 | | { 0 /* */, Hexagon::F2_sfinvsqrta, Convert__Reg1_0__Reg1_1__Reg1_5, 0, { MCK_IntRegs, MCK_PredRegs, MCK__61_, MCK_sfinvsqrta, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
6016 | | { 0 /* */, Hexagon::V6_vandqrt, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vand, MCK__40_, MCK_VecPredRegs, MCK_IntRegs, MCK__41_ }, }, |
6017 | | { 0 /* */, Hexagon::V6_vand, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vand, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK__41_ }, }, |
6018 | | { 0 /* */, Hexagon::V6_vdelta, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vdelta, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK__41_ }, }, |
6019 | | { 0 /* */, Hexagon::V6_vor, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vor, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK__41_ }, }, |
6020 | | { 0 /* */, Hexagon::V6_vrdelta, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vrdelta, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK__41_ }, }, |
6021 | | { 0 /* */, Hexagon::V6_vror, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vror, MCK__40_, MCK_VectorRegs, MCK_IntRegs, MCK__41_ }, }, |
6022 | | { 0 /* */, Hexagon::V6_vxor, Convert__Reg1_0__Reg1_4__Reg1_5, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vxor, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK__41_ }, }, |
6023 | | { 0 /* */, Hexagon::C4_nbitsclr, Convert__Reg1_0__Reg1_5__Reg1_6, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6024 | | { 0 /* */, Hexagon::C4_nbitsset, Convert__Reg1_0__Reg1_5__Reg1_6, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_bitsset, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6025 | | { 0 /* */, Hexagon::C4_fastcorner9_not, Convert__Reg1_0__Reg1_5__Reg1_6, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_fastcorner9, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
6026 | | { 0 /* */, Hexagon::S4_ntstbit_r, Convert__Reg1_0__Reg1_5__Reg1_6, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6027 | | { 0 /* */, Hexagon::C2_andn, Convert__Reg1_0__Reg1_4__Reg1_6, 0, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_ }, }, |
6028 | | { 0 /* */, Hexagon::C2_bitsclri, Convert__Reg1_0__Reg1_4__u6Imm1_6, 0, { MCK_PredRegs, MCK__61_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6029 | | { 0 /* */, Hexagon::F2_dfclass, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_PredRegs, MCK__61_, MCK_dfclass, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6030 | | { 0 /* */, Hexagon::C2_orn, Convert__Reg1_0__Reg1_4__Reg1_6, 0, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_ }, }, |
6031 | | { 0 /* */, Hexagon::F2_sfclass, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_PredRegs, MCK__61_, MCK_sfclass, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6032 | | { 0 /* */, Hexagon::S2_tstbit_i, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_PredRegs, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6033 | | { 0 /* */, Hexagon::V6_pred_and_n, Convert__Reg1_0__Reg1_4__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_and, MCK__40_, MCK_VecPredRegs, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_ }, }, |
6034 | | { 0 /* */, Hexagon::V6_pred_or_n, Convert__Reg1_0__Reg1_4__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_or, MCK__40_, MCK_VecPredRegs, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_ }, }, |
6035 | | { 0 /* */, Hexagon::V6_vandvrt_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK_VectorRegs, MCK_IntRegs, MCK__41_ }, }, |
6036 | | { 0 /* */, Hexagon::S2_asl_r_p_and, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6037 | | { 0 /* */, Hexagon::S2_asr_r_p_and, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6038 | | { 0 /* */, Hexagon::S2_lsl_r_p_and, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6039 | | { 0 /* */, Hexagon::S2_lsr_r_p_and, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6040 | | { 0 /* */, Hexagon::S2_asl_r_p_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6041 | | { 0 /* */, Hexagon::S2_asr_r_p_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6042 | | { 0 /* */, Hexagon::M2_cmaci_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6043 | | { 0 /* */, Hexagon::M2_cmacr_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6044 | | { 0 /* */, Hexagon::S2_lsl_r_p_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6045 | | { 0 /* */, Hexagon::S2_lsr_r_p_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6046 | | { 0 /* */, Hexagon::M2_dpmpyss_acc_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6047 | | { 0 /* */, Hexagon::M2_dpmpyuu_acc_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6048 | | { 0 /* */, Hexagon::M5_vmacbsu, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpybsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6049 | | { 0 /* */, Hexagon::M5_vmacbuu, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpybu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6050 | | { 0 /* */, Hexagon::M2_vmac2es, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6051 | | { 0 /* */, Hexagon::M2_vmac2, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6052 | | { 0 /* */, Hexagon::A2_vraddub_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vraddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6053 | | { 0 /* */, Hexagon::M2_vrcmaci_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6054 | | { 0 /* */, Hexagon::M2_vrcmacr_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6055 | | { 0 /* */, Hexagon::S2_vrcnegh, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcnegh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6056 | | { 0 /* */, Hexagon::M5_vrmacbsu, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6057 | | { 0 /* */, Hexagon::M5_vrmacbuu, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpybu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6058 | | { 0 /* */, Hexagon::M2_vrmac_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpyh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6059 | | { 0 /* */, Hexagon::M4_vrmpyeh_acc_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6060 | | { 0 /* */, Hexagon::M4_vrmpyoh_acc_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6061 | | { 0 /* */, Hexagon::A2_vrsadub_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrsadub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6062 | | { 0 /* */, Hexagon::S2_asl_r_p_nac, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6063 | | { 0 /* */, Hexagon::S2_asr_r_p_nac, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6064 | | { 0 /* */, Hexagon::S2_lsl_r_p_nac, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6065 | | { 0 /* */, Hexagon::S2_lsr_r_p_nac, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6066 | | { 0 /* */, Hexagon::M2_dpmpyss_nac_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6067 | | { 0 /* */, Hexagon::M2_dpmpyuu_nac_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6068 | | { 0 /* */, Hexagon::A4_andnp, Convert__Reg1_0__Reg1_4__Reg1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_and, MCK__40_, MCK_DoubleRegs, MCK__126_, MCK_DoubleRegs, MCK__41_ }, }, |
6069 | | { 0 /* */, Hexagon::S2_asl_i_p, Convert__Reg1_0__Reg1_4__u6Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6070 | | { 0 /* */, Hexagon::S2_asr_i_p, Convert__Reg1_0__Reg1_4__u6Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6071 | | { 0 /* */, Hexagon::S2_asr_i_p_rnd_goodsyntax, Convert__Reg1_0__Reg1_4__u6Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_asrrnd, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6072 | | { 0 /* */, Hexagon::A4_bitspliti, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_bitsplit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6073 | | { 0 /* */, Hexagon::A4_combineir, Convert__Reg1_0__s8Ext1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__35_, MCK_s8Ext, MCK_IntRegs, MCK__41_ }, }, |
6074 | | { 0 /* */, Hexagon::A4_combineri, Convert__Reg1_0__Reg1_4__s8Ext1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
6075 | | { 0 /* */, Hexagon::F2_conv_df2d_chop, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2d, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
6076 | | { 0 /* */, Hexagon::F2_conv_df2ud_chop, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2ud, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
6077 | | { 0 /* */, Hexagon::F2_conv_sf2d_chop, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2d, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
6078 | | { 0 /* */, Hexagon::F2_conv_sf2ud_chop, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2ud, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
6079 | | { 0 /* */, Hexagon::S2_cabacencbin, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_encbin, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_ }, }, |
6080 | | { 0 /* */, Hexagon::S2_lsr_i_p, Convert__Reg1_0__Reg1_4__u6Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6081 | | { 0 /* */, Hexagon::A4_ornp, Convert__Reg1_0__Reg1_4__Reg1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_or, MCK__40_, MCK_DoubleRegs, MCK__126_, MCK_DoubleRegs, MCK__41_ }, }, |
6082 | | { 0 /* */, Hexagon::S6_rol_i_p, Convert__Reg1_0__Reg1_4__u6Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6083 | | { 0 /* */, Hexagon::A2_vabshsat, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vabsh, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6084 | | { 0 /* */, Hexagon::A2_vabswsat, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vabsw, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6085 | | { 0 /* */, Hexagon::S2_valignrb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_valignb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_ }, }, |
6086 | | { 0 /* */, Hexagon::S2_asl_i_vh, Convert__Reg1_0__Reg1_4__u4Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_vaslh, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u4Imm, MCK__41_ }, }, |
6087 | | { 0 /* */, Hexagon::S2_asl_i_vw, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_vaslw, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6088 | | { 0 /* */, Hexagon::S2_asr_i_vh, Convert__Reg1_0__Reg1_4__u4Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u4Imm, MCK__41_ }, }, |
6089 | | { 0 /* */, Hexagon::S2_asr_i_vw, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6090 | | { 0 /* */, Hexagon::A2_vconj, Convert__Reg1_0__Reg1_4, 0, { MCK_DoubleRegs, MCK__61_, MCK_vconj, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6091 | | { 0 /* */, Hexagon::S2_lsr_i_vh, Convert__Reg1_0__Reg1_4__u4Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_vlsrh, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u4Imm, MCK__41_ }, }, |
6092 | | { 0 /* */, Hexagon::S2_lsr_i_vw, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_vlsrw, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6093 | | { 0 /* */, Hexagon::C2_vmux, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmux, MCK__40_, MCK_PredRegs, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6094 | | { 0 /* */, Hexagon::M2_vrcmpyi_s0c, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
6095 | | { 0 /* */, Hexagon::M2_vrcmpyr_s0c, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
6096 | | { 0 /* */, Hexagon::S2_vsplicerb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_vspliceb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_ }, }, |
6097 | | { 0 /* */, Hexagon::S2_asl_r_p_xor, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6098 | | { 0 /* */, Hexagon::S2_asr_r_p_xor, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6099 | | { 0 /* */, Hexagon::S2_lsl_r_p_xor, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6100 | | { 0 /* */, Hexagon::S2_lsr_r_p_xor, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6101 | | { 0 /* */, Hexagon::M4_pmpyw_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_pmpyw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6102 | | { 0 /* */, Hexagon::M4_vpmpyh_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_vpmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6103 | | { 0 /* */, Hexagon::M4_xor_xacc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_xor, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6104 | | { 0 /* */, Hexagon::S2_asl_r_p_or, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6105 | | { 0 /* */, Hexagon::S2_asr_r_p_or, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6106 | | { 0 /* */, Hexagon::S2_lsl_r_p_or, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6107 | | { 0 /* */, Hexagon::S2_lsr_r_p_or, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
6108 | | { 0 /* */, Hexagon::A5_ACS, Convert__Reg1_0__Reg1_1__Tie0__Reg1_5__Reg1_6, Feature_HasV55T, { MCK_DoubleRegs, MCK_PredRegs, MCK__61_, MCK_vacsh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6109 | | { 0 /* */, Hexagon::V6_vdealvdd, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__61_, MCK_vdeal, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK_IntRegsLow8, MCK__41_ }, }, |
6110 | | { 0 /* */, Hexagon::V6_vshuffvdd, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__61_, MCK_vshuff, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK_IntRegsLow8, MCK__41_ }, }, |
6111 | | { 0 /* */, Hexagon::V6_vswap, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__61_, MCK_vswap, MCK__40_, MCK_VecPredRegs, MCK_VectorRegs, MCK_VectorRegs, MCK__41_ }, }, |
6112 | | { 0 /* */, Hexagon::M4_and_and, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6113 | | { 0 /* */, Hexagon::S2_asl_r_r_and, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6114 | | { 0 /* */, Hexagon::S2_asr_r_r_and, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6115 | | { 0 /* */, Hexagon::S2_lsl_r_r_and, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6116 | | { 0 /* */, Hexagon::S2_lsr_r_r_and, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6117 | | { 0 /* */, Hexagon::M4_and_or, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6118 | | { 0 /* */, Hexagon::M4_and_xor, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6119 | | { 0 /* */, Hexagon::M2_acci, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6120 | | { 0 /* */, Hexagon::S2_asl_r_r_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6121 | | { 0 /* */, Hexagon::S2_asr_r_r_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6122 | | { 0 /* */, Hexagon::S2_lsl_r_r_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6123 | | { 0 /* */, Hexagon::S2_lsr_r_r_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6124 | | { 0 /* */, Hexagon::M2_maci, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6125 | | { 0 /* */, Hexagon::F2_sffma, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6126 | | { 0 /* */, Hexagon::M2_subacc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6127 | | { 0 /* */, Hexagon::M2_nacci, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6128 | | { 0 /* */, Hexagon::S2_asl_r_r_nac, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6129 | | { 0 /* */, Hexagon::S2_asr_r_r_nac, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6130 | | { 0 /* */, Hexagon::S2_lsl_r_r_nac, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6131 | | { 0 /* */, Hexagon::S2_lsr_r_r_nac, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6132 | | { 0 /* */, Hexagon::F2_sffms, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6133 | | { 0 /* */, Hexagon::A2_abssat, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_abs, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6134 | | { 0 /* */, Hexagon::C4_addipc, Convert__Reg1_0__u6Ext1_6, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_PC, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6135 | | { 0 /* */, Hexagon::A2_addi, Convert__Reg1_0__Reg1_4__s16Ext1_6, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s16Ext, MCK__41_ }, }, |
6136 | | { 0 /* */, Hexagon::A2_andir, Convert__Reg1_0__Reg1_4__s10Ext1_6, 0, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s10Ext, MCK__41_ }, }, |
6137 | | { 0 /* */, Hexagon::A4_andn, Convert__Reg1_0__Reg1_4__Reg1_6, 0, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
6138 | | { 0 /* */, Hexagon::S2_asl_i_r, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6139 | | { 0 /* */, Hexagon::S2_asr_i_r, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6140 | | { 0 /* */, Hexagon::S2_asr_i_r_rnd_goodsyntax, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_asrrnd, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6141 | | { 0 /* */, Hexagon::S2_clrbit_i, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_clrbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6142 | | { 0 /* */, Hexagon::F2_conv_df2uw_chop, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2uw, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
6143 | | { 0 /* */, Hexagon::F2_conv_df2w_chop, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2w, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
6144 | | { 0 /* */, Hexagon::F2_conv_sf2uw_chop, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2uw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
6145 | | { 0 /* */, Hexagon::F2_conv_sf2w_chop, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2w, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
6146 | | { 0 /* */, Hexagon::A4_cround_ri, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_cround, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6147 | | { 0 /* */, Hexagon::S4_lsli, Convert__Reg1_0__s6Imm1_5__Reg1_6, 0, { MCK_IntRegs, MCK__61_, MCK_lsl, MCK__40_, MCK__35_, MCK_s6Imm, MCK_IntRegs, MCK__41_ }, }, |
6148 | | { 0 /* */, Hexagon::S2_lsr_i_r, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6149 | | { 0 /* */, Hexagon::M2_mpysmi, Convert__Reg1_0__Reg1_4__s9Ext1_6, 0, { MCK_IntRegs, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s9Ext, MCK__41_ }, }, |
6150 | | { 0 /* */, Hexagon::C2_mux, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6151 | | { 0 /* */, Hexagon::A2_negsat, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_neg, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6152 | | { 0 /* */, Hexagon::A2_orir, Convert__Reg1_0__Reg1_4__s10Ext1_6, 0, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s10Ext, MCK__41_ }, }, |
6153 | | { 0 /* */, Hexagon::A4_orn, Convert__Reg1_0__Reg1_4__Reg1_6, 0, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
6154 | | { 0 /* */, Hexagon::S6_rol_i_r, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6155 | | { 0 /* */, Hexagon::A2_roundsat, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6156 | | { 0 /* */, Hexagon::A4_round_ri, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6157 | | { 0 /* */, Hexagon::S2_setbit_i, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_setbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6158 | | { 0 /* */, Hexagon::A2_subri, Convert__Reg1_0__s10Ext1_5__Reg1_6, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK__35_, MCK_s10Ext, MCK_IntRegs, MCK__41_ }, }, |
6159 | | { 0 /* */, Hexagon::S2_togglebit_i, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_togglebit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6160 | | { 0 /* */, Hexagon::S2_asr_i_svw_trun, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6161 | | { 0 /* */, Hexagon::S2_vrndpackwhs, Convert__Reg1_0__Reg1_4, 0, { MCK_IntRegs, MCK__61_, MCK_vrndwh, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6162 | | { 0 /* */, Hexagon::M4_xor_and, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6163 | | { 0 /* */, Hexagon::M4_xor_or, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6164 | | { 0 /* */, Hexagon::M2_xor_xacc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6165 | | { 0 /* */, Hexagon::M4_or_and, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6166 | | { 0 /* */, Hexagon::S2_asl_r_r_or, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6167 | | { 0 /* */, Hexagon::S2_asr_r_r_or, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6168 | | { 0 /* */, Hexagon::S2_lsl_r_r_or, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6169 | | { 0 /* */, Hexagon::S2_lsr_r_r_or, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6170 | | { 0 /* */, Hexagon::M4_or_or, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6171 | | { 0 /* */, Hexagon::M4_or_xor, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6172 | | { 0 /* */, Hexagon::F2_sfrecipa, Convert__Reg1_0__Reg1_1__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK_PredRegs, MCK__61_, MCK_sfrecipa, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6173 | | { 0 /* */, Hexagon::V6_vinsertwr, Convert__Reg1_0__Tie0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vinsert, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
6174 | | { 0 /* */, Hexagon::V6_valignb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_valign, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK_IntRegsLow8, MCK__41_ }, }, |
6175 | | { 0 /* */, Hexagon::V6_vlalignb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vlalign, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK_IntRegsLow8, MCK__41_ }, }, |
6176 | | { 0 /* */, Hexagon::V6_vmux, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vmux, MCK__40_, MCK_VecPredRegs, MCK_VectorRegs, MCK_VectorRegs, MCK__41_ }, }, |
6177 | | { 0 /* */, Hexagon::V6_vandqrt_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK_VecPredRegs, MCK_IntRegs, MCK__41_ }, }, |
6178 | | { 0 /* */, Hexagon::C4_nbitsclri, Convert__Reg1_0__Reg1_5__u6Imm1_7, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6179 | | { 0 /* */, Hexagon::S4_ntstbit_i, Convert__Reg1_0__Reg1_5__u5Imm1_7, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6180 | | { 0 /* */, Hexagon::C2_cmpeqp, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6181 | | { 0 /* */, Hexagon::C2_cmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6182 | | { 0 /* */, Hexagon::C2_cmpgtp, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6183 | | { 0 /* */, Hexagon::C2_cmpgt, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6184 | | { 0 /* */, Hexagon::C2_cmpgtup, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6185 | | { 0 /* */, Hexagon::C2_cmpgtu, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6186 | | { 0 /* */, Hexagon::C2_cmpgt, Convert__Reg1_0__Reg1_7__Reg1_6, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_lt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6187 | | { 0 /* */, Hexagon::C2_cmpgt, Convert__Reg1_0__Reg1_7__Reg1_6, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_lt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6188 | | { 0 /* */, Hexagon::C2_cmpgtu, Convert__Reg1_0__Reg1_7__Reg1_6, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_ltu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6189 | | { 0 /* */, Hexagon::C2_cmpgtu, Convert__Reg1_0__Reg1_7__Reg1_6, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_ltu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6190 | | { 0 /* */, Hexagon::A4_cmpbeq, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6191 | | { 0 /* */, Hexagon::A4_cmpbgt, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6192 | | { 0 /* */, Hexagon::A4_cmpbgtu, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6193 | | { 0 /* */, Hexagon::A4_cmpheq, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6194 | | { 0 /* */, Hexagon::A4_cmphgt, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6195 | | { 0 /* */, Hexagon::A4_cmphgtu, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6196 | | { 0 /* */, Hexagon::F2_dfcmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6197 | | { 0 /* */, Hexagon::F2_dfcmpge, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_ge, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6198 | | { 0 /* */, Hexagon::F2_dfcmpgt, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6199 | | { 0 /* */, Hexagon::F2_dfcmpuo, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_uo, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6200 | | { 0 /* */, Hexagon::F2_sfcmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6201 | | { 0 /* */, Hexagon::F2_sfcmpge, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_ge, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6202 | | { 0 /* */, Hexagon::F2_sfcmpgt, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6203 | | { 0 /* */, Hexagon::F2_sfcmpuo, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_uo, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6204 | | { 0 /* */, Hexagon::A2_vcmpbeq, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6205 | | { 0 /* */, Hexagon::A4_vcmpbgt, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6206 | | { 0 /* */, Hexagon::A2_vcmpbgtu, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6207 | | { 0 /* */, Hexagon::A2_vcmpheq, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6208 | | { 0 /* */, Hexagon::A2_vcmphgt, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6209 | | { 0 /* */, Hexagon::A2_vcmphgtu, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6210 | | { 0 /* */, Hexagon::A2_vcmpweq, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6211 | | { 0 /* */, Hexagon::A2_vcmpwgt, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6212 | | { 0 /* */, Hexagon::A2_vcmpwgtu, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
6213 | | { 0 /* */, Hexagon::S2_asl_i_p_and, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6214 | | { 0 /* */, Hexagon::S2_asr_i_p_and, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6215 | | { 0 /* */, Hexagon::S2_lsr_i_p_and, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6216 | | { 0 /* */, Hexagon::S6_rol_i_p_and, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6217 | | { 0 /* */, Hexagon::S2_asl_i_p_acc, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6218 | | { 0 /* */, Hexagon::S2_asr_i_p_acc, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6219 | | { 0 /* */, Hexagon::S2_lsr_i_p_acc, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6220 | | { 0 /* */, Hexagon::S6_rol_i_p_acc, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6221 | | { 0 /* */, Hexagon::M2_vrcmaci_s0c, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
6222 | | { 0 /* */, Hexagon::M2_vrcmacr_s0c, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
6223 | | { 0 /* */, Hexagon::S2_asl_i_p_nac, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6224 | | { 0 /* */, Hexagon::S2_asr_i_p_nac, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6225 | | { 0 /* */, Hexagon::S2_lsr_i_p_nac, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6226 | | { 0 /* */, Hexagon::S6_rol_i_p_nac, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6227 | | { 0 /* */, Hexagon::A2_addpsat, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6228 | | { 0 /* */, Hexagon::M2_cmpys_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6229 | | { 0 /* */, Hexagon::A2_combineii, Convert__Reg1_0__s8Ext1_5__s8Imm1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__35_, MCK_s8Ext, MCK__35_, MCK_s8Imm, MCK__41_ }, }, |
6230 | | { 0 /* */, Hexagon::A4_combineii, Convert__Reg1_0__s8Imm1_5__u6Ext1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__35_, MCK_s8Imm, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6231 | | { 0 /* */, Hexagon::F2_dfimm_n, Convert__Reg1_0__u10Imm1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_dfmake, MCK__40_, MCK__35_, MCK_u10Imm, MCK__41_, MCK__COLON_, MCK_neg }, }, |
6232 | | { 0 /* */, Hexagon::F2_dfimm_p, Convert__Reg1_0__u10Imm1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_dfmake, MCK__40_, MCK__35_, MCK_u10Imm, MCK__41_, MCK__COLON_, MCK_pos }, }, |
6233 | | { 0 /* */, Hexagon::L2_loadalignb_io, Convert__Reg1_0__Tie0__Reg1_4__s11_0Ext1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_0Ext, MCK__41_ }, }, |
6234 | | { 0 /* */, Hexagon::L2_loadalignb_pr, Convert__Reg1_0__Reg1_4__Tie0__Tie1__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6235 | | { 0 /* */, Hexagon::L4_loadalignb_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6236 | | { 0 /* */, Hexagon::L2_loadbsw4_io, Convert__Reg1_0__Reg1_4__s11_2Ext1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_2Ext, MCK__41_ }, }, |
6237 | | { 0 /* */, Hexagon::L2_loadbsw4_pr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6238 | | { 0 /* */, Hexagon::L4_loadbsw4_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6239 | | { 0 /* */, Hexagon::L2_loadrdgp, Convert__Reg1_0__u16_3Imm1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_3Imm, MCK__41_ }, }, |
6240 | | { 0 /* */, Hexagon::L2_loadrd_io, Convert__Reg1_0__Reg1_4__s11_3Ext1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_3Ext, MCK__41_ }, }, |
6241 | | { 0 /* */, Hexagon::L2_loadrd_pr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6242 | | { 0 /* */, Hexagon::L4_loadrd_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6243 | | { 0 /* */, Hexagon::L2_loadalignh_io, Convert__Reg1_0__Tie0__Reg1_4__s11_1Ext1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_1Ext, MCK__41_ }, }, |
6244 | | { 0 /* */, Hexagon::L2_loadalignh_pr, Convert__Reg1_0__Reg1_4__Tie0__Tie1__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6245 | | { 0 /* */, Hexagon::L4_loadalignh_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6246 | | { 0 /* */, Hexagon::L2_loadbzw4_io, Convert__Reg1_0__Reg1_4__s11_2Ext1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_2Ext, MCK__41_ }, }, |
6247 | | { 0 /* */, Hexagon::L2_loadbzw4_pr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6248 | | { 0 /* */, Hexagon::L4_loadbzw4_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6249 | | { 0 /* */, Hexagon::dep_S2_packhl, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_packhl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_deprecated }, }, |
6250 | | { 0 /* */, Hexagon::A2_vaddhs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6251 | | { 0 /* */, Hexagon::A2_vaddubs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vaddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6252 | | { 0 /* */, Hexagon::A2_vadduhs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vadduh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6253 | | { 0 /* */, Hexagon::A2_vaddws, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vaddw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6254 | | { 0 /* */, Hexagon::S2_valignib, Convert__Reg1_0__Reg1_4__Reg1_5__u3Imm1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_valignb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__35_, MCK_u3Imm, MCK__41_ }, }, |
6255 | | { 0 /* */, Hexagon::A2_vavghcr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd }, }, |
6256 | | { 0 /* */, Hexagon::A2_vavghr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6257 | | { 0 /* */, Hexagon::A2_vavgubr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavgub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6258 | | { 0 /* */, Hexagon::A2_vavguhr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavguh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6259 | | { 0 /* */, Hexagon::A2_vavguwr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavguw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6260 | | { 0 /* */, Hexagon::A2_vavgwcr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd }, }, |
6261 | | { 0 /* */, Hexagon::A2_vavgwr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6262 | | { 0 /* */, Hexagon::M2_vcmpy_s0_sat_i, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6263 | | { 0 /* */, Hexagon::M2_vcmpy_s0_sat_r, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6264 | | { 0 /* */, Hexagon::M2_vdmpys_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6265 | | { 0 /* */, Hexagon::M5_vdmpybsu, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vdmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6266 | | { 0 /* */, Hexagon::M2_vmpy2es_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6267 | | { 0 /* */, Hexagon::M2_vmpy2s_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6268 | | { 0 /* */, Hexagon::M2_vmpy2su_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6269 | | { 0 /* */, Hexagon::M2_mmpyl_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6270 | | { 0 /* */, Hexagon::M2_mmpyul_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6271 | | { 0 /* */, Hexagon::M2_mmpyh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6272 | | { 0 /* */, Hexagon::M2_mmpyuh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6273 | | { 0 /* */, Hexagon::S4_vrcrotate, Convert__Reg1_0__Reg1_4__Reg1_5__u2Imm1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrcrotate, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
6274 | | { 0 /* */, Hexagon::S2_vspliceib, Convert__Reg1_0__Reg1_4__Reg1_5__u3Imm1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_vspliceb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__35_, MCK_u3Imm, MCK__41_ }, }, |
6275 | | { 0 /* */, Hexagon::A2_vsubhs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6276 | | { 0 /* */, Hexagon::A2_vsububs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsubub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6277 | | { 0 /* */, Hexagon::A2_vsubuhs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsubuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6278 | | { 0 /* */, Hexagon::A2_vsubws, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vsubw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6279 | | { 0 /* */, Hexagon::S4_vxaddsubh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vxaddsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6280 | | { 0 /* */, Hexagon::S4_vxaddsubw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vxaddsubw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6281 | | { 0 /* */, Hexagon::S4_vxsubaddh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vxsubaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6282 | | { 0 /* */, Hexagon::S4_vxsubaddw, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vxsubaddw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6283 | | { 0 /* */, Hexagon::S2_asl_i_p_xacc, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6284 | | { 0 /* */, Hexagon::S2_lsr_i_p_xacc, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6285 | | { 0 /* */, Hexagon::S6_rol_i_p_xacc, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6286 | | { 0 /* */, Hexagon::S2_asl_i_p_or, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6287 | | { 0 /* */, Hexagon::S2_asr_i_p_or, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6288 | | { 0 /* */, Hexagon::S2_lsr_i_p_or, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6289 | | { 0 /* */, Hexagon::S6_rol_i_p_or, Convert__Reg1_0__Tie0__Reg1_5__u6Imm1_7, 0, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6290 | | { 0 /* */, Hexagon::LDrivv_indexed_128B, Convert__Reg1_0__Reg1_4__Imm1_7, Feature_HasV60T, { MCK_VecDblRegs, MCK__61_, MCK_vvmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_Imm, MCK__41_ }, }, |
6291 | | { 0 /* */, Hexagon::LDrivv_indexed, Convert__Reg1_0__Reg1_4__s4_6Imm1_7, Feature_HasV60T, { MCK_VecDblRegs, MCK__61_, MCK_vvmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_ }, }, |
6292 | | { 0 /* */, Hexagon::M4_and_andn, Convert__Reg1_0__Tie0__Reg1_5__Reg1_7, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
6293 | | { 0 /* */, Hexagon::S2_asl_i_r_and, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6294 | | { 0 /* */, Hexagon::S2_asr_i_r_and, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6295 | | { 0 /* */, Hexagon::S2_lsr_i_r_and, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6296 | | { 0 /* */, Hexagon::S6_rol_i_r_and, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6297 | | { 0 /* */, Hexagon::M2_accii, Convert__Reg1_0__Tie0__Reg1_5__s8Ext1_7, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
6298 | | { 0 /* */, Hexagon::S2_asl_i_r_acc, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6299 | | { 0 /* */, Hexagon::S2_asr_i_r_acc, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6300 | | { 0 /* */, Hexagon::S2_lsr_i_r_acc, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6301 | | { 0 /* */, Hexagon::M2_macsip, Convert__Reg1_0__Tie0__Reg1_5__u8Ext1_7, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u8Ext, MCK__41_ }, }, |
6302 | | { 0 /* */, Hexagon::S6_rol_i_r_acc, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6303 | | { 0 /* */, Hexagon::M2_naccii, Convert__Reg1_0__Tie0__Reg1_5__s8Ext1_7, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
6304 | | { 0 /* */, Hexagon::S2_asl_i_r_nac, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6305 | | { 0 /* */, Hexagon::S2_asr_i_r_nac, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6306 | | { 0 /* */, Hexagon::S2_lsr_i_r_nac, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6307 | | { 0 /* */, Hexagon::M2_macsin, Convert__Reg1_0__Tie0__Reg1_5__u8Ext1_7, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u8Ext, MCK__41_ }, }, |
6308 | | { 0 /* */, Hexagon::S6_rol_i_r_nac, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6309 | | { 0 /* */, Hexagon::HI, Convert__Reg1_0__Imm1_7, 0, { MCK_IntRegs, MCK__DOT_, MCK_h, MCK__61_, MCK__35_, MCK_HI, MCK__40_, MCK_Imm, MCK__41_ }, }, |
6310 | | { 0 /* */, Hexagon::HI_L, Convert__Reg1_0__Imm1_7, 0, { MCK_IntRegs, MCK__DOT_, MCK_h, MCK__61_, MCK__35_, MCK_LO, MCK__40_, MCK_Imm, MCK__41_ }, }, |
6311 | | { 0 /* */, Hexagon::LO_H, Convert__Reg1_0__Imm1_7, 0, { MCK_IntRegs, MCK__DOT_, MCK_l, MCK__61_, MCK__35_, MCK_HI, MCK__40_, MCK_Imm, MCK__41_ }, }, |
6312 | | { 0 /* */, Hexagon::LO, Convert__Reg1_0__Imm1_7, 0, { MCK_IntRegs, MCK__DOT_, MCK_l, MCK__61_, MCK__35_, MCK_LO, MCK__40_, MCK_Imm, MCK__41_ }, }, |
6313 | | { 0 /* */, Hexagon::M2_mpysip, Convert__Reg1_0__Reg1_5__u8Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK__43_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u8Ext, MCK__41_ }, }, |
6314 | | { 0 /* */, Hexagon::M2_mpysin, Convert__Reg1_0__Reg1_5__u8Imm1_7, 0, { MCK_IntRegs, MCK__61_, MCK__MINUS_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u8Imm, MCK__41_ }, }, |
6315 | | { 0 /* */, Hexagon::A2_addsat, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6316 | | { 0 /* */, Hexagon::S2_addasl_rrri, Convert__Reg1_0__Reg1_4__Reg1_5__u3Imm1_7, 0, { MCK_IntRegs, MCK__61_, MCK_addasl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__35_, MCK_u3Imm, MCK__41_ }, }, |
6317 | | { 0 /* */, Hexagon::S2_asl_r_r_sat, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6318 | | { 0 /* */, Hexagon::S2_asr_r_r_sat, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6319 | | { 0 /* */, Hexagon::A4_rcmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6320 | | { 0 /* */, Hexagon::L2_loadrbgp, Convert__Reg1_0__u16_0Imm1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_0Imm, MCK__41_ }, }, |
6321 | | { 0 /* */, Hexagon::L2_loadrb_io, Convert__Reg1_0__Reg1_4__s11_0Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_0Ext, MCK__41_ }, }, |
6322 | | { 0 /* */, Hexagon::L2_loadrb_pr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6323 | | { 0 /* */, Hexagon::L4_loadrb_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6324 | | { 0 /* */, Hexagon::L2_loadbsw2_io, Convert__Reg1_0__Reg1_4__s11_1Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_1Ext, MCK__41_ }, }, |
6325 | | { 0 /* */, Hexagon::L2_loadbsw2_pr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6326 | | { 0 /* */, Hexagon::L4_loadbsw2_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6327 | | { 0 /* */, Hexagon::L2_loadrhgp, Convert__Reg1_0__u16_1Imm1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_1Imm, MCK__41_ }, }, |
6328 | | { 0 /* */, Hexagon::L2_loadrh_io, Convert__Reg1_0__Reg1_4__s11_1Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_1Ext, MCK__41_ }, }, |
6329 | | { 0 /* */, Hexagon::L2_loadrh_pr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6330 | | { 0 /* */, Hexagon::L4_loadrh_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6331 | | { 0 /* */, Hexagon::L2_loadrubgp, Convert__Reg1_0__u16_0Imm1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_0Imm, MCK__41_ }, }, |
6332 | | { 0 /* */, Hexagon::L2_loadrub_io, Convert__Reg1_0__Reg1_4__s11_0Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_0Ext, MCK__41_ }, }, |
6333 | | { 0 /* */, Hexagon::L2_loadrub_pr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6334 | | { 0 /* */, Hexagon::L4_loadrub_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6335 | | { 0 /* */, Hexagon::L2_loadbzw2_io, Convert__Reg1_0__Reg1_4__s11_1Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_1Ext, MCK__41_ }, }, |
6336 | | { 0 /* */, Hexagon::L2_loadbzw2_pr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6337 | | { 0 /* */, Hexagon::L4_loadbzw2_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6338 | | { 0 /* */, Hexagon::L2_loadruhgp, Convert__Reg1_0__u16_1Imm1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_1Imm, MCK__41_ }, }, |
6339 | | { 0 /* */, Hexagon::L2_loadruh_io, Convert__Reg1_0__Reg1_4__s11_1Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_1Ext, MCK__41_ }, }, |
6340 | | { 0 /* */, Hexagon::L2_loadruh_pr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6341 | | { 0 /* */, Hexagon::L4_loadruh_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6342 | | { 0 /* */, Hexagon::L2_loadrigp, Convert__Reg1_0__u16_2Imm1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_2Imm, MCK__41_ }, }, |
6343 | | { 0 /* */, Hexagon::L2_loadri_io, Convert__Reg1_0__Reg1_4__s11_2Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_2Ext, MCK__41_ }, }, |
6344 | | { 0 /* */, Hexagon::L2_loadri_pr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6345 | | { 0 /* */, Hexagon::L4_loadri_ap, Convert__Reg1_0__Reg1_4__u6Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6346 | | { 0 /* */, Hexagon::M2_dpmpyss_rnd_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6347 | | { 0 /* */, Hexagon::MUX_ri_f, Convert__Reg1_0__Reg1_4__f32Ext1_6__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK__35_, MCK_f32Ext, MCK_IntRegs, MCK__41_ }, }, |
6348 | | { 0 /* */, Hexagon::C2_muxri, Convert__Reg1_0__Reg1_4__s8Ext1_6__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK__35_, MCK_s8Ext, MCK_IntRegs, MCK__41_ }, }, |
6349 | | { 0 /* */, Hexagon::MUX_ir_f, Convert__Reg1_0__Reg1_4__Reg1_5__f32Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK__35_, MCK_f32Ext, MCK__41_ }, }, |
6350 | | { 0 /* */, Hexagon::C2_muxir, Convert__Reg1_0__Reg1_4__Reg1_5__s8Ext1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
6351 | | { 0 /* */, Hexagon::A4_round_rr_sat, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6352 | | { 0 /* */, Hexagon::F2_sfimm_n, Convert__Reg1_0__u10Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sfmake, MCK__40_, MCK__35_, MCK_u10Imm, MCK__41_, MCK__COLON_, MCK_neg }, }, |
6353 | | { 0 /* */, Hexagon::F2_sfimm_p, Convert__Reg1_0__u10Imm1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sfmake, MCK__40_, MCK__35_, MCK_u10Imm, MCK__41_, MCK__COLON_, MCK_pos }, }, |
6354 | | { 0 /* */, Hexagon::A2_subsat, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6355 | | { 0 /* */, Hexagon::A2_svaddhs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6356 | | { 0 /* */, Hexagon::A5_vaddhubs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vaddhub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6357 | | { 0 /* */, Hexagon::A2_svadduhs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vadduh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6358 | | { 0 /* */, Hexagon::A2_svavghs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6359 | | { 0 /* */, Hexagon::A2_svsubhs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6360 | | { 0 /* */, Hexagon::A2_svsubuhs, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vsubuh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6361 | | { 0 /* */, Hexagon::M4_xor_andn, Convert__Reg1_0__Tie0__Reg1_5__Reg1_7, 0, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
6362 | | { 0 /* */, Hexagon::S2_asl_i_r_xacc, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6363 | | { 0 /* */, Hexagon::S2_lsr_i_r_xacc, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6364 | | { 0 /* */, Hexagon::S6_rol_i_r_xacc, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6365 | | { 0 /* */, Hexagon::S4_or_andi, Convert__Reg1_0__Tie0__Reg1_5__s10Ext1_7, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s10Ext, MCK__41_ }, }, |
6366 | | { 0 /* */, Hexagon::M4_or_andn, Convert__Reg1_0__Tie0__Reg1_5__Reg1_7, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
6367 | | { 0 /* */, Hexagon::S2_asl_i_r_or, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6368 | | { 0 /* */, Hexagon::S2_asr_i_r_or, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6369 | | { 0 /* */, Hexagon::S2_lsr_i_r_or, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6370 | | { 0 /* */, Hexagon::S4_or_ori, Convert__Reg1_0__Tie0__Reg1_5__s10Ext1_7, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s10Ext, MCK__41_ }, }, |
6371 | | { 0 /* */, Hexagon::S6_rol_i_r_or, Convert__Reg1_0__Tie0__Reg1_5__u5Imm1_7, 0, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6372 | | { 0 /* */, Hexagon::V6_valignbi, Convert__Reg1_0__Reg1_4__Reg1_5__u3Imm1_7, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_valign, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK__35_, MCK_u3Imm, MCK__41_ }, }, |
6373 | | { 0 /* */, Hexagon::V6_vlalignbi, Convert__Reg1_0__Reg1_4__Reg1_5__u3Imm1_7, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vlalign, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK__35_, MCK_u3Imm, MCK__41_ }, }, |
6374 | | { 0 /* */, Hexagon::V6_vL32b_ai, Convert__Reg1_0__Reg1_4__s4_6Imm1_7, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_ }, }, |
6375 | | { 0 /* */, Hexagon::V6_vL32b_ppu, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6376 | | { 0 /* */, Hexagon::V6_vL32Ub_ai, Convert__Reg1_0__Reg1_4__s4_6Imm1_7, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_ }, }, |
6377 | | { 0 /* */, Hexagon::V6_vL32Ub_ppu, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6378 | | { 0 /* */, Hexagon::C4_cmpneq, Convert__Reg1_0__Reg1_7__Reg1_8, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6379 | | { 0 /* */, Hexagon::C4_cmplte, Convert__Reg1_0__Reg1_7__Reg1_8, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6380 | | { 0 /* */, Hexagon::C4_cmplteu, Convert__Reg1_0__Reg1_7__Reg1_8, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6381 | | { 0 /* */, Hexagon::C2_cmpeqi, Convert__Reg1_0__Reg1_6__s10Ext1_8, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s10Ext, MCK__41_ }, }, |
6382 | | { 0 /* */, Hexagon::C2_cmpgei, Convert__Reg1_0__Reg1_6__s8Ext1_8, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_ge, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
6383 | | { 0 /* */, Hexagon::C2_cmpgeui, Convert__Reg1_0__Reg1_6__u8Ext1_8, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_geu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u8Ext, MCK__41_ }, }, |
6384 | | { 0 /* */, Hexagon::C2_cmpgti, Convert__Reg1_0__Reg1_6__s10Ext1_8, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s10Ext, MCK__41_ }, }, |
6385 | | { 0 /* */, Hexagon::C2_cmpgtui, Convert__Reg1_0__Reg1_6__u9Ext1_8, 0, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u9Ext, MCK__41_ }, }, |
6386 | | { 0 /* */, Hexagon::A4_cmpbeqi, Convert__Reg1_0__Reg1_6__u8Imm1_8, 0, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u8Imm, MCK__41_ }, }, |
6387 | | { 0 /* */, Hexagon::A4_cmpbgti, Convert__Reg1_0__Reg1_6__s8Imm1_8, 0, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Imm, MCK__41_ }, }, |
6388 | | { 0 /* */, Hexagon::A4_cmpbgtui, Convert__Reg1_0__Reg1_6__u7Ext1_8, 0, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u7Ext, MCK__41_ }, }, |
6389 | | { 0 /* */, Hexagon::A4_cmpheqi, Convert__Reg1_0__Reg1_6__s8Ext1_8, 0, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
6390 | | { 0 /* */, Hexagon::A4_cmphgti, Convert__Reg1_0__Reg1_6__s8Ext1_8, 0, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
6391 | | { 0 /* */, Hexagon::A4_cmphgtui, Convert__Reg1_0__Reg1_6__u7Ext1_8, 0, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u7Ext, MCK__41_ }, }, |
6392 | | { 0 /* */, Hexagon::A4_vcmpbeqi, Convert__Reg1_0__Reg1_6__u8Imm1_8, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u8Imm, MCK__41_ }, }, |
6393 | | { 0 /* */, Hexagon::A4_vcmpbgti, Convert__Reg1_0__Reg1_6__s8Imm1_8, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_s8Imm, MCK__41_ }, }, |
6394 | | { 0 /* */, Hexagon::A4_vcmpbgtui, Convert__Reg1_0__Reg1_6__u7Imm1_8, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u7Imm, MCK__41_ }, }, |
6395 | | { 0 /* */, Hexagon::A4_vcmpheqi, Convert__Reg1_0__Reg1_6__s8Imm1_8, 0, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_s8Imm, MCK__41_ }, }, |
6396 | | { 0 /* */, Hexagon::A4_vcmphgti, Convert__Reg1_0__Reg1_6__s8Imm1_8, 0, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_s8Imm, MCK__41_ }, }, |
6397 | | { 0 /* */, Hexagon::A4_vcmphgtui, Convert__Reg1_0__Reg1_6__u7Imm1_8, 0, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u7Imm, MCK__41_ }, }, |
6398 | | { 0 /* */, Hexagon::A4_vcmpweqi, Convert__Reg1_0__Reg1_6__s8Imm1_8, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_s8Imm, MCK__41_ }, }, |
6399 | | { 0 /* */, Hexagon::A4_vcmpwgti, Convert__Reg1_0__Reg1_6__s8Imm1_8, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_s8Imm, MCK__41_ }, }, |
6400 | | { 0 /* */, Hexagon::A4_vcmpwgtui, Convert__Reg1_0__Reg1_6__u7Imm1_8, 0, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u7Imm, MCK__41_ }, }, |
6401 | | { 0 /* */, Hexagon::M2_cmacs_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6402 | | { 0 /* */, Hexagon::M2_vcmac_s0_sat_i, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6403 | | { 0 /* */, Hexagon::M2_vcmac_s0_sat_r, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6404 | | { 0 /* */, Hexagon::M2_vdmacs_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6405 | | { 0 /* */, Hexagon::M5_vdmacbsu, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vdmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6406 | | { 0 /* */, Hexagon::M2_vmac2es_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6407 | | { 0 /* */, Hexagon::M2_vmac2s_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6408 | | { 0 /* */, Hexagon::M2_vmac2su_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6409 | | { 0 /* */, Hexagon::M2_mmacls_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6410 | | { 0 /* */, Hexagon::M2_mmaculs_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6411 | | { 0 /* */, Hexagon::M2_mmachs_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6412 | | { 0 /* */, Hexagon::M2_mmacuhs_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6413 | | { 0 /* */, Hexagon::S4_vrcrotate_acc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6__u2Imm1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcrotate, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
6414 | | { 0 /* */, Hexagon::M2_cnacs_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6415 | | { 0 /* */, Hexagon::A4_addp_c, Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1, 0, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_, MCK__COLON_, MCK_carry }, }, |
6416 | | { 0 /* */, Hexagon::S2_asr_i_p_rnd, Convert__Reg1_0__Reg1_4__u6Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6417 | | { 0 /* */, Hexagon::M2_cmpysc_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6418 | | { 0 /* */, Hexagon::TFRI64_V2_ext, Convert__Reg1_0__s8Ext1_6__s8Imm1_8, 0, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__35_, MCK__35_, MCK_s8Ext, MCK__35_, MCK_s8Imm, MCK__41_ }, }, |
6419 | | { 0 /* */, Hexagon::S4_extractp, Convert__Reg1_0__Reg1_4__u6Imm1_6__u6Imm1_8, 0, { MCK_DoubleRegs, MCK__61_, MCK_extract, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6420 | | { 0 /* */, Hexagon::S2_extractup, Convert__Reg1_0__Reg1_4__u6Imm1_6__u6Imm1_8, 0, { MCK_DoubleRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6421 | | { 0 /* */, Hexagon::S2_insertp, Convert__Reg1_0__Tie0__Reg1_4__u6Imm1_6__u6Imm1_8, 0, { MCK_DoubleRegs, MCK__61_, MCK_insert, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u6Imm, MCK__35_, MCK_u6Imm, MCK__41_ }, }, |
6422 | | { 0 /* */, Hexagon::L2_loadalignb_pi, Convert__Reg1_0__Reg1_4__Tie0__Tie1__s4_0Imm1_8, 0, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_ }, }, |
6423 | | { 0 /* */, Hexagon::L2_loadbsw4_pi, Convert__Reg1_0__Reg1_4__Tie1__s4_2Imm1_8, 0, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_ }, }, |
6424 | | { 0 /* */, Hexagon::L2_loadrd_pi, Convert__Reg1_0__Reg1_4__Tie1__s4_3Imm1_8, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__41_ }, }, |
6425 | | { 0 /* */, Hexagon::L2_loadalignh_pi, Convert__Reg1_0__Reg1_4__Tie0__Tie1__s4_1Imm1_8, 0, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
6426 | | { 0 /* */, Hexagon::L2_loadbzw4_pi, Convert__Reg1_0__Reg1_4__Tie1__s4_2Imm1_8, 0, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_ }, }, |
6427 | | { 0 /* */, Hexagon::A4_subp_c, Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1, 0, { MCK_DoubleRegs, MCK__61_, MCK_sub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_, MCK__COLON_, MCK_carry }, }, |
6428 | | { 0 /* */, Hexagon::S5_vasrhrnd, Convert__Reg1_0__Reg1_4__u4Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u4Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
6429 | | { 0 /* */, Hexagon::S5_vasrhrnd_goodsyntax, Convert__Reg1_0__Reg1_4__u4Imm1_6, 0, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u4Imm, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6430 | | { 0 /* */, Hexagon::V6_vsb, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vsxt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6431 | | { 0 /* */, Hexagon::V6_vunpackb, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vunpack, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6432 | | { 0 /* */, Hexagon::V6_vunpackub, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vunpack, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6433 | | { 0 /* */, Hexagon::V6_vzb, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vzxt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6434 | | { 0 /* */, Hexagon::V6_vunpackuh, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vunpack, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6435 | | { 0 /* */, Hexagon::V6_vzh, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vzxt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6436 | | { 0 /* */, Hexagon::V6_vsh, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vsxt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6437 | | { 0 /* */, Hexagon::V6_vunpackh, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vunpack, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6438 | | { 0 /* */, Hexagon::F2_sffma_lib, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_lib }, }, |
6439 | | { 0 /* */, Hexagon::F2_sffms_lib, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_lib }, }, |
6440 | | { 0 /* */, Hexagon::A4_rcmpneq, Convert__Reg1_0__Reg1_7__Reg1_8, 0, { MCK_IntRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
6441 | | { 0 /* */, Hexagon::S2_asl_i_r_sat, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6442 | | { 0 /* */, Hexagon::S2_asr_i_r_rnd, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6443 | | { 0 /* */, Hexagon::A4_rcmpeqi, Convert__Reg1_0__Reg1_6__s8Ext1_8, 0, { MCK_IntRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
6444 | | { 0 /* */, Hexagon::S4_extract, Convert__Reg1_0__Reg1_4__u5Imm1_6__u5Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_extract, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6445 | | { 0 /* */, Hexagon::S2_extractu, Convert__Reg1_0__Reg1_4__u5Imm1_6__u5Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6446 | | { 0 /* */, Hexagon::S2_insert, Convert__Reg1_0__Tie0__Reg1_4__u5Imm1_6__u5Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_insert, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6447 | | { 0 /* */, Hexagon::L2_loadrb_pi, Convert__Reg1_0__Reg1_4__Tie1__s4_0Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_ }, }, |
6448 | | { 0 /* */, Hexagon::L2_loadbsw2_pi, Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
6449 | | { 0 /* */, Hexagon::L2_loadrh_pi, Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
6450 | | { 0 /* */, Hexagon::L2_loadrub_pi, Convert__Reg1_0__Reg1_4__Tie1__s4_0Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_ }, }, |
6451 | | { 0 /* */, Hexagon::L2_loadbzw2_pi, Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
6452 | | { 0 /* */, Hexagon::L2_loadruh_pi, Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
6453 | | { 0 /* */, Hexagon::L2_loadri_pi, Convert__Reg1_0__Reg1_4__Tie1__s4_2Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_ }, }, |
6454 | | { 0 /* */, Hexagon::C2_muxii, Convert__Reg1_0__Reg1_4__s8Ext1_6__s8Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK__35_, MCK_s8Ext, MCK__35_, MCK_s8Imm, MCK__41_ }, }, |
6455 | | { 0 /* */, Hexagon::A4_round_ri_sat, Convert__Reg1_0__Reg1_4__u5Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6456 | | { 0 /* */, Hexagon::S2_tableidxb_goodsyntax, Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__u5Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_tableidxb, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u4Imm, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6457 | | { 0 /* */, Hexagon::S2_tableidxd_goodsyntax, Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__u5Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_tableidxd, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u4Imm, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6458 | | { 0 /* */, Hexagon::S2_tableidxh_goodsyntax, Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__u5Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_tableidxh, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u4Imm, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6459 | | { 0 /* */, Hexagon::S2_tableidxw_goodsyntax, Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__u5Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_tableidxw, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u4Imm, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
6460 | | { 0 /* */, Hexagon::S5_asrhub_rnd_sat, Convert__Reg1_0__Reg1_4__u4Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u4Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
6461 | | { 0 /* */, Hexagon::S5_asrhub_sat, Convert__Reg1_0__Reg1_4__u4Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u4Imm, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6462 | | { 0 /* */, Hexagon::V6_vdealb, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vdeal, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6463 | | { 0 /* */, Hexagon::V6_vshuffb, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuff, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6464 | | { 0 /* */, Hexagon::V6_vabsh, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vabs, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6465 | | { 0 /* */, Hexagon::V6_vdealh, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vdeal, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6466 | | { 0 /* */, Hexagon::V6_vnormamth, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vnormamt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6467 | | { 0 /* */, Hexagon::V6_vpopcounth, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vpopcount, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6468 | | { 0 /* */, Hexagon::V6_vshuffh, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuff, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6469 | | { 0 /* */, Hexagon::V6_vcl0h, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vcl0, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6470 | | { 0 /* */, Hexagon::V6_vcl0w, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vcl0, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
6471 | | { 0 /* */, Hexagon::V6_vabsw, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vabs, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6472 | | { 0 /* */, Hexagon::V6_vnormamtw, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vnormamt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6473 | | { 0 /* */, Hexagon::V6_vL32b_pi, Convert__Reg1_0__Reg1_4__Tie1__s3_6Imm1_8, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_ }, }, |
6474 | | { 0 /* */, Hexagon::V6_vL32Ub_pi, Convert__Reg1_0__Reg1_4__Tie1__s3_6Imm1_8, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_ }, }, |
6475 | | { 0 /* */, Hexagon::C4_cmpneqi, Convert__Reg1_0__Reg1_7__s10Ext1_9, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s10Ext, MCK__41_ }, }, |
6476 | | { 0 /* */, Hexagon::C4_cmpltei, Convert__Reg1_0__Reg1_7__s10Ext1_9, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s10Ext, MCK__41_ }, }, |
6477 | | { 0 /* */, Hexagon::C4_cmplteui, Convert__Reg1_0__Reg1_7__u9Ext1_9, 0, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u9Ext, MCK__41_ }, }, |
6478 | | { 0 /* */, Hexagon::C4_and_and, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, 0, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
6479 | | { 0 /* */, Hexagon::C4_and_or, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, 0, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
6480 | | { 0 /* */, Hexagon::A4_boundscheck_hi, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_PredRegs, MCK__61_, MCK_boundscheck, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
6481 | | { 0 /* */, Hexagon::A4_boundscheck_lo, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_PredRegs, MCK__61_, MCK_boundscheck, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
6482 | | { 0 /* */, Hexagon::C4_or_and, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, 0, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
6483 | | { 0 /* */, Hexagon::C4_or_or, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, 0, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
6484 | | { 0 /* */, Hexagon::M2_cmacsc_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6485 | | { 0 /* */, Hexagon::M2_cnacsc_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6486 | | { 0 /* */, Hexagon::A2_addsph, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
6487 | | { 0 /* */, Hexagon::A2_addspl, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
6488 | | { 0 /* */, Hexagon::L2_loadalignb_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6489 | | { 0 /* */, Hexagon::L2_loadbsw4_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6490 | | { 0 /* */, Hexagon::L2_loadrd_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6491 | | { 0 /* */, Hexagon::L2_loadalignh_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6492 | | { 0 /* */, Hexagon::L2_loadbzw4_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6493 | | { 0 /* */, Hexagon::M2_mpyd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6494 | | { 0 /* */, Hexagon::M2_mpyd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6495 | | { 0 /* */, Hexagon::M2_mpyd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6496 | | { 0 /* */, Hexagon::M2_mpyd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6497 | | { 0 /* */, Hexagon::M2_mpyud_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6498 | | { 0 /* */, Hexagon::M2_mpyud_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6499 | | { 0 /* */, Hexagon::M2_mpyud_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6500 | | { 0 /* */, Hexagon::M2_mpyud_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6501 | | { 0 /* */, Hexagon::M2_mmpyl_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6502 | | { 0 /* */, Hexagon::M2_mmpyul_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6503 | | { 0 /* */, Hexagon::M2_mmpyh_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6504 | | { 0 /* */, Hexagon::M2_mmpyuh_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6505 | | { 0 /* */, Hexagon::A2_vnavghcr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd, MCK__COLON_, MCK_sat }, }, |
6506 | | { 0 /* */, Hexagon::A2_vnavghr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6507 | | { 0 /* */, Hexagon::A2_vnavgwcr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vnavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd, MCK__COLON_, MCK_sat }, }, |
6508 | | { 0 /* */, Hexagon::A2_vnavgwr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vnavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6509 | | { 0 /* */, Hexagon::M4_vrmpyeh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6510 | | { 0 /* */, Hexagon::M4_vrmpyoh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6511 | | { 0 /* */, Hexagon::V6_vunpackob, Convert__Reg1_0__Tie0__Reg1_7, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__124_, MCK__61_, MCK_vunpacko, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6512 | | { 0 /* */, Hexagon::V6_vunpackoh, Convert__Reg1_0__Tie0__Reg1_7, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__124_, MCK__61_, MCK_vunpacko, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6513 | | { 0 /* */, Hexagon::F2_sffma_sc, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6__Reg1_7, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK_PredRegs, MCK__41_, MCK__COLON_, MCK_scale }, }, |
6514 | | { 0 /* */, Hexagon::A4_rcmpneqi, Convert__Reg1_0__Reg1_7__s8Ext1_9, 0, { MCK_IntRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
6515 | | { 0 /* */, Hexagon::S4_clbpaddi, Convert__Reg1_0__Reg1_6__s6Imm1_9, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_clb, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__35_, MCK_s6Imm, MCK__41_ }, }, |
6516 | | { 0 /* */, Hexagon::S4_clbaddi, Convert__Reg1_0__Reg1_6__s6Imm1_9, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_clb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__35_, MCK_s6Imm, MCK__41_ }, }, |
6517 | | { 0 /* */, Hexagon::A2_addh_l16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6518 | | { 0 /* */, Hexagon::A2_addh_l16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6519 | | { 0 /* */, Hexagon::M4_mpyrr_addr, Convert__Reg1_0__Reg1_4__Tie0__Reg1_8, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
6520 | | { 0 /* */, Hexagon::dep_A2_addsat, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_deprecated }, }, |
6521 | | { 0 /* */, Hexagon::M2_cmpyrs_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6522 | | { 0 /* */, Hexagon::A2_combine_hh, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6523 | | { 0 /* */, Hexagon::A2_combine_hl, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6524 | | { 0 /* */, Hexagon::A2_combine_lh, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6525 | | { 0 /* */, Hexagon::A2_combine_ll, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6526 | | { 0 /* */, Hexagon::L2_loadrb_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6527 | | { 0 /* */, Hexagon::L2_loadbsw2_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6528 | | { 0 /* */, Hexagon::L2_loadrh_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6529 | | { 0 /* */, Hexagon::L2_loadrub_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6530 | | { 0 /* */, Hexagon::L2_loadbzw2_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6531 | | { 0 /* */, Hexagon::L2_loadruh_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6532 | | { 0 /* */, Hexagon::L2_loadri_pbr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
6533 | | { 0 /* */, Hexagon::M2_mpy_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6534 | | { 0 /* */, Hexagon::M2_mpy_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6535 | | { 0 /* */, Hexagon::M2_mpy_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6536 | | { 0 /* */, Hexagon::M2_mpy_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6537 | | { 0 /* */, Hexagon::M2_mpy_up_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6538 | | { 0 /* */, Hexagon::M2_mpyu_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6539 | | { 0 /* */, Hexagon::M2_mpyu_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6540 | | { 0 /* */, Hexagon::M2_mpyu_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6541 | | { 0 /* */, Hexagon::M2_mpyu_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6542 | | { 0 /* */, Hexagon::A2_subh_l16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6543 | | { 0 /* */, Hexagon::A2_subh_l16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6544 | | { 0 /* */, Hexagon::dep_A2_subsat, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_deprecated }, }, |
6545 | | { 0 /* */, Hexagon::M2_vdmpyrs_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6546 | | { 0 /* */, Hexagon::M2_vmpy2s_s0pack, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6547 | | { 0 /* */, Hexagon::V6_vL32b_cur_ai, Convert__Reg1_0__Reg1_6__s4_6Imm1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_ }, }, |
6548 | | { 0 /* */, Hexagon::V6_vL32b_cur_ppu, Convert__Reg1_0__Reg1_6__Tie1__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6549 | | { 0 /* */, Hexagon::V6_vaslh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vasl, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__41_ }, }, |
6550 | | { 0 /* */, Hexagon::V6_vasrh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__41_ }, }, |
6551 | | { 0 /* */, Hexagon::V6_vL32b_tmp_ai, Convert__Reg1_0__Reg1_6__s4_6Imm1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_ }, }, |
6552 | | { 0 /* */, Hexagon::V6_vL32b_tmp_ppu, Convert__Reg1_0__Reg1_6__Tie1__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
6553 | | { 0 /* */, Hexagon::V6_vlsrh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vlsr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__41_ }, }, |
6554 | | { 0 /* */, Hexagon::V6_vlsrw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vlsr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK_IntRegs, MCK__41_ }, }, |
6555 | | { 0 /* */, Hexagon::V6_vaslw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vasl, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
6556 | | { 0 /* */, Hexagon::V6_vasrw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
6557 | | { 0 /* */, Hexagon::V6_vL32b_nt_ai, Convert__Reg1_0__Reg1_4__s4_6Imm1_7, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
6558 | | { 0 /* */, Hexagon::V6_vL32b_nt_ppu, Convert__Reg1_0__Reg1_4__Tie1__Reg1_7, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
6559 | | { 0 /* */, Hexagon::C4_and_andn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, 0, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
6560 | | { 0 /* */, Hexagon::C4_and_orn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, 0, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
6561 | | { 0 /* */, Hexagon::A4_vcmpbeq_any, Convert__Reg1_0__Reg1_8__Reg1_9, 0, { MCK_PredRegs, MCK__61_, MCK_any8, MCK__40_, MCK_vcmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__41_ }, }, |
6562 | | { 0 /* */, Hexagon::C4_or_andn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, 0, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
6563 | | { 0 /* */, Hexagon::C4_or_orn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, 0, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
6564 | | { 0 /* */, Hexagon::M2_mpyd_acc_hh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6565 | | { 0 /* */, Hexagon::M2_mpyd_acc_hl_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6566 | | { 0 /* */, Hexagon::M2_mpyd_acc_lh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6567 | | { 0 /* */, Hexagon::M2_mpyd_acc_ll_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6568 | | { 0 /* */, Hexagon::M2_mpyud_acc_hh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6569 | | { 0 /* */, Hexagon::M2_mpyud_acc_hl_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6570 | | { 0 /* */, Hexagon::M2_mpyud_acc_lh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6571 | | { 0 /* */, Hexagon::M2_mpyud_acc_ll_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6572 | | { 0 /* */, Hexagon::M2_mmacls_rs0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6573 | | { 0 /* */, Hexagon::M2_mmaculs_rs0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6574 | | { 0 /* */, Hexagon::M2_mmachs_rs0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6575 | | { 0 /* */, Hexagon::M2_mmacuhs_rs0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6576 | | { 0 /* */, Hexagon::M4_vrmpyeh_acc_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6577 | | { 0 /* */, Hexagon::M4_vrmpyoh_acc_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6578 | | { 0 /* */, Hexagon::M2_mpyd_nac_hh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6579 | | { 0 /* */, Hexagon::M2_mpyd_nac_hl_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6580 | | { 0 /* */, Hexagon::M2_mpyd_nac_lh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6581 | | { 0 /* */, Hexagon::M2_mpyd_nac_ll_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6582 | | { 0 /* */, Hexagon::M2_mpyud_nac_hh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6583 | | { 0 /* */, Hexagon::M2_mpyud_nac_hl_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6584 | | { 0 /* */, Hexagon::M2_mpyud_nac_lh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6585 | | { 0 /* */, Hexagon::M2_mpyud_nac_ll_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6586 | | { 0 /* */, Hexagon::L4_loadrd_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2Imm1_10, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
6587 | | { 0 /* */, Hexagon::M2_mpy_acc_hh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6588 | | { 0 /* */, Hexagon::M2_mpy_acc_hl_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6589 | | { 0 /* */, Hexagon::M2_mpy_acc_lh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6590 | | { 0 /* */, Hexagon::M2_mpy_acc_ll_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6591 | | { 0 /* */, Hexagon::M2_mpyu_acc_hh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6592 | | { 0 /* */, Hexagon::M2_mpyu_acc_hl_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6593 | | { 0 /* */, Hexagon::M2_mpyu_acc_lh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6594 | | { 0 /* */, Hexagon::M2_mpyu_acc_ll_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6595 | | { 0 /* */, Hexagon::M2_mpy_nac_hh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6596 | | { 0 /* */, Hexagon::M2_mpy_nac_hl_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6597 | | { 0 /* */, Hexagon::M2_mpy_nac_lh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6598 | | { 0 /* */, Hexagon::M2_mpy_nac_ll_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6599 | | { 0 /* */, Hexagon::M2_mpyu_nac_hh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6600 | | { 0 /* */, Hexagon::M2_mpyu_nac_hl_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6601 | | { 0 /* */, Hexagon::M2_mpyu_nac_lh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6602 | | { 0 /* */, Hexagon::M2_mpyu_nac_ll_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
6603 | | { 0 /* */, Hexagon::M4_mpyrr_addi, Convert__Reg1_0__u6Ext1_5__Reg1_8__Reg1_9, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__35_, MCK_u6Ext, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
6604 | | { 0 /* */, Hexagon::S4_addaddi, Convert__Reg1_0__Reg1_4__Reg1_7__s6Ext1_9, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_add, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s6Ext, MCK__41_, MCK__41_ }, }, |
6605 | | { 0 /* */, Hexagon::M4_mpyri_addr_u2, Convert__Reg1_0__Reg1_4__u6_2Imm1_8__Reg1_9, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_mpyi, MCK__40_, MCK__35_, MCK_u6_2Imm, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
6606 | | { 0 /* */, Hexagon::M4_mpyri_addr, Convert__Reg1_0__Reg1_4__Reg1_7__u6Ext1_9, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u6Ext, MCK__41_, MCK__41_ }, }, |
6607 | | { 0 /* */, Hexagon::S4_subaddi, Convert__Reg1_0__Reg1_4__s6Ext1_8__Reg1_9, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_sub, MCK__40_, MCK__35_, MCK_s6Ext, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
6608 | | { 0 /* */, Hexagon::M2_cmpyrsc_s0, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6609 | | { 0 /* */, Hexagon::L4_loadrb_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
6610 | | { 0 /* */, Hexagon::L4_loadrh_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
6611 | | { 0 /* */, Hexagon::L4_loadrub_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
6612 | | { 0 /* */, Hexagon::L4_loadruh_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
6613 | | { 0 /* */, Hexagon::L4_loadri_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
6614 | | { 0 /* */, Hexagon::S4_or_andix, Convert__Reg1_0__Reg1_4__Tie0__s10Ext1_9, 0, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_and, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s10Ext, MCK__41_, MCK__41_ }, }, |
6615 | | { 0 /* */, Hexagon::S2_tableidxb, Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__s6Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_tableidxb, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u4Imm, MCK__35_, MCK_s6Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
6616 | | { 0 /* */, Hexagon::S2_tableidxd, Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__s6Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_tableidxd, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u4Imm, MCK__35_, MCK_s6Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
6617 | | { 0 /* */, Hexagon::S2_tableidxh, Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__s6Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_tableidxh, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u4Imm, MCK__35_, MCK_s6Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
6618 | | { 0 /* */, Hexagon::S2_tableidxw, Convert__Reg1_0__Tie0__Reg1_4__u4Imm1_6__s6Imm1_8, 0, { MCK_IntRegs, MCK__61_, MCK_tableidxw, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u4Imm, MCK__35_, MCK_s6Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
6619 | | { 0 /* */, Hexagon::S5_asrhub_rnd_sat_goodsyntax, Convert__Reg1_0__Reg1_4__u4Imm1_6, 0, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__35_, MCK_u4Imm, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6620 | | { 0 /* */, Hexagon::V6_vL32b_cur_pi, Convert__Reg1_0__Reg1_6__Tie1__s3_6Imm1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_ }, }, |
6621 | | { 0 /* */, Hexagon::V6_vabsh_sat, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vabs, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6622 | | { 0 /* */, Hexagon::V6_vL32b_tmp_pi, Convert__Reg1_0__Reg1_6__Tie1__s3_6Imm1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_ }, }, |
6623 | | { 0 /* */, Hexagon::V6_vaslw_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vasl, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
6624 | | { 0 /* */, Hexagon::V6_vasrw_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
6625 | | { 0 /* */, Hexagon::V6_vabsw_sat, Convert__Reg1_0__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vabs, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6626 | | { 0 /* */, Hexagon::V6_vL32b_nt_pi, Convert__Reg1_0__Reg1_4__Tie1__s3_6Imm1_8, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
6627 | | { 0 /* */, Hexagon::V6_veqb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6628 | | { 0 /* */, Hexagon::V6_veqh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6629 | | { 0 /* */, Hexagon::V6_veqw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6630 | | { 0 /* */, Hexagon::V6_vgtb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6631 | | { 0 /* */, Hexagon::V6_vgth, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6632 | | { 0 /* */, Hexagon::V6_vgtub, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6633 | | { 0 /* */, Hexagon::V6_vgtuh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6634 | | { 0 /* */, Hexagon::V6_vgtuw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
6635 | | { 0 /* */, Hexagon::V6_vgtw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6636 | | { 0 /* */, Hexagon::M2_cmpys_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6637 | | { 0 /* */, Hexagon::L4_loadalignb_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6638 | | { 0 /* */, Hexagon::L4_loadbsw4_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6639 | | { 0 /* */, Hexagon::L4_loadrd_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6640 | | { 0 /* */, Hexagon::L4_loadalignh_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6641 | | { 0 /* */, Hexagon::L4_loadbzw4_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6642 | | { 0 /* */, Hexagon::M2_mpyd_rnd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6643 | | { 0 /* */, Hexagon::M2_mpyd_rnd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6644 | | { 0 /* */, Hexagon::M2_mpyd_rnd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6645 | | { 0 /* */, Hexagon::M2_mpyd_rnd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6646 | | { 0 /* */, Hexagon::M2_vcmpy_s1_sat_i, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6647 | | { 0 /* */, Hexagon::M2_vcmpy_s1_sat_r, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6648 | | { 0 /* */, Hexagon::M2_vdmpys_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6649 | | { 0 /* */, Hexagon::M2_vmpy2es_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6650 | | { 0 /* */, Hexagon::M2_vmpy2s_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6651 | | { 0 /* */, Hexagon::M2_vmpy2su_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6652 | | { 0 /* */, Hexagon::M2_mmpyl_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6653 | | { 0 /* */, Hexagon::M2_mmpyul_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6654 | | { 0 /* */, Hexagon::M2_mmpyh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6655 | | { 0 /* */, Hexagon::M2_mmpyuh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6656 | | { 0 /* */, Hexagon::M2_vrcmpys_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6657 | | { 0 /* */, Hexagon::V6_vaddb_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vadd, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_b, MCK_VecDblRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6658 | | { 0 /* */, Hexagon::V6_vshufoeb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuffoe, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6659 | | { 0 /* */, Hexagon::V6_vsubb_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vsub, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_b, MCK_VecDblRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6660 | | { 0 /* */, Hexagon::V6_vaddh_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6661 | | { 0 /* */, Hexagon::V6_vaddubh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6662 | | { 0 /* */, Hexagon::V6_vdmpybus_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6663 | | { 0 /* */, Hexagon::V6_vmpabusv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_VecDblRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6664 | | { 0 /* */, Hexagon::V6_vmpabuuv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6665 | | { 0 /* */, Hexagon::V6_vmpabus, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6666 | | { 0 /* */, Hexagon::V6_vmpybv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6667 | | { 0 /* */, Hexagon::V6_vmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6668 | | { 0 /* */, Hexagon::V6_vmpybusv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6669 | | { 0 /* */, Hexagon::V6_vshufoeh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuffoe, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6670 | | { 0 /* */, Hexagon::V6_vsubh_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6671 | | { 0 /* */, Hexagon::V6_vsububh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6672 | | { 0 /* */, Hexagon::V6_vtmpyb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vtmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_b, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6673 | | { 0 /* */, Hexagon::V6_vtmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vtmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6674 | | { 0 /* */, Hexagon::V6_vmpyub, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6675 | | { 0 /* */, Hexagon::V6_vmpyubv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6676 | | { 0 /* */, Hexagon::V6_vdsaduh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vdsad, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6677 | | { 0 /* */, Hexagon::V6_vmpyuh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6678 | | { 0 /* */, Hexagon::V6_vmpyuhv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6679 | | { 0 /* */, Hexagon::V6_vaddw_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6680 | | { 0 /* */, Hexagon::V6_vaddhw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6681 | | { 0 /* */, Hexagon::V6_vadduhw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6682 | | { 0 /* */, Hexagon::V6_vdmpyhb_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6683 | | { 0 /* */, Hexagon::V6_vmpahb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpa, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6684 | | { 0 /* */, Hexagon::V6_vmpyh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6685 | | { 0 /* */, Hexagon::V6_vmpyhv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6686 | | { 0 /* */, Hexagon::V6_vmpyhus, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6687 | | { 0 /* */, Hexagon::V6_vsubw_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6688 | | { 0 /* */, Hexagon::V6_vsubhw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6689 | | { 0 /* */, Hexagon::V6_vsubuhw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6690 | | { 0 /* */, Hexagon::V6_vtmpyhb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vtmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6691 | | { 0 /* */, Hexagon::M4_mpyri_addi, Convert__Reg1_0__u6Ext1_5__Reg1_8__u6Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__35_, MCK_u6Ext, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u6Imm, MCK__41_, MCK__41_ }, }, |
6692 | | { 0 /* */, Hexagon::S4_addi_asl_ri, Convert__Reg1_0__u8Ext1_5__Tie0__u5Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__35_, MCK_u8Ext, MCK_asl, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_ }, }, |
6693 | | { 0 /* */, Hexagon::S4_addi_lsr_ri, Convert__Reg1_0__u8Ext1_5__Tie0__u5Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__35_, MCK_u8Ext, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_ }, }, |
6694 | | { 0 /* */, Hexagon::A2_addh_l16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6695 | | { 0 /* */, Hexagon::A2_addh_l16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6696 | | { 0 /* */, Hexagon::S4_andi_asl_ri, Convert__Reg1_0__u8Ext1_5__Tie0__u5Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK__35_, MCK_u8Ext, MCK_asl, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_ }, }, |
6697 | | { 0 /* */, Hexagon::S4_andi_lsr_ri, Convert__Reg1_0__u8Ext1_5__Tie0__u5Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK__35_, MCK_u8Ext, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_ }, }, |
6698 | | { 0 /* */, Hexagon::L4_loadrb_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6699 | | { 0 /* */, Hexagon::L4_loadbsw2_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6700 | | { 0 /* */, Hexagon::L4_loadrh_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6701 | | { 0 /* */, Hexagon::L4_loadrub_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6702 | | { 0 /* */, Hexagon::L4_loadbzw2_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6703 | | { 0 /* */, Hexagon::L4_loadruh_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6704 | | { 0 /* */, Hexagon::L4_loadri_ur, Convert__Reg1_0__Reg1_4__u2Imm1_8__u6Ext1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_ }, }, |
6705 | | { 0 /* */, Hexagon::M2_mpy_rnd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6706 | | { 0 /* */, Hexagon::M2_mpy_sat_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6707 | | { 0 /* */, Hexagon::M2_mpy_rnd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6708 | | { 0 /* */, Hexagon::M2_mpy_sat_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6709 | | { 0 /* */, Hexagon::M2_mpy_rnd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6710 | | { 0 /* */, Hexagon::M2_mpy_sat_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6711 | | { 0 /* */, Hexagon::M2_mpy_rnd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6712 | | { 0 /* */, Hexagon::M2_mpy_sat_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6713 | | { 0 /* */, Hexagon::M2_mpy_up_s1_sat, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6714 | | { 0 /* */, Hexagon::S4_ori_asl_ri, Convert__Reg1_0__u8Ext1_5__Tie0__u5Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK__35_, MCK_u8Ext, MCK_asl, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_ }, }, |
6715 | | { 0 /* */, Hexagon::S4_ori_lsr_ri, Convert__Reg1_0__u8Ext1_5__Tie0__u5Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK__35_, MCK_u8Ext, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_ }, }, |
6716 | | { 0 /* */, Hexagon::S4_subi_asl_ri, Convert__Reg1_0__u8Ext1_5__Tie0__u5Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK__35_, MCK_u8Ext, MCK_asl, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_ }, }, |
6717 | | { 0 /* */, Hexagon::S4_subi_lsr_ri, Convert__Reg1_0__u8Ext1_5__Tie0__u5Imm1_10, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK__35_, MCK_u8Ext, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_ }, }, |
6718 | | { 0 /* */, Hexagon::A2_subh_l16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6719 | | { 0 /* */, Hexagon::A2_subh_l16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6720 | | { 0 /* */, Hexagon::V6_vaddb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vadd, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6721 | | { 0 /* */, Hexagon::V6_vdealb4w, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vdeale, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6722 | | { 0 /* */, Hexagon::V6_vnavgub, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vnavg, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6723 | | { 0 /* */, Hexagon::V6_vpackeb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vpacke, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6724 | | { 0 /* */, Hexagon::V6_vpackob, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vpacko, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6725 | | { 0 /* */, Hexagon::V6_vshuffeb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuffe, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6726 | | { 0 /* */, Hexagon::V6_vshuffob, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuffo, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6727 | | { 0 /* */, Hexagon::V6_vsubb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vsub, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6728 | | { 0 /* */, Hexagon::V6_vL32b_nt_cur_ai, Convert__Reg1_0__Reg1_6__s4_6Imm1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
6729 | | { 0 /* */, Hexagon::V6_vL32b_nt_cur_ppu, Convert__Reg1_0__Reg1_6__Tie1__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
6730 | | { 0 /* */, Hexagon::V6_vaddh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6731 | | { 0 /* */, Hexagon::V6_vaslhv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vasl, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6732 | | { 0 /* */, Hexagon::V6_vasrhv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6733 | | { 0 /* */, Hexagon::V6_vavgh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vavg, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6734 | | { 0 /* */, Hexagon::V6_vdmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6735 | | { 0 /* */, Hexagon::V6_vlsrhv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vlsr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6736 | | { 0 /* */, Hexagon::V6_vmaxh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmax, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6737 | | { 0 /* */, Hexagon::V6_vminh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmin, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6738 | | { 0 /* */, Hexagon::V6_vmpyihb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpyi, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6739 | | { 0 /* */, Hexagon::V6_vmpyih, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpyi, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6740 | | { 0 /* */, Hexagon::V6_vnavgh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vnavg, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6741 | | { 0 /* */, Hexagon::V6_vpackeh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vpacke, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6742 | | { 0 /* */, Hexagon::V6_vpackoh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vpacko, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6743 | | { 0 /* */, Hexagon::V6_vsatwh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vsat, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6744 | | { 0 /* */, Hexagon::V6_vshufeh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuffe, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6745 | | { 0 /* */, Hexagon::V6_vshufoh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuffo, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6746 | | { 0 /* */, Hexagon::V6_vsubh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6747 | | { 0 /* */, Hexagon::V6_vL32b_nt_tmp_ai, Convert__Reg1_0__Reg1_6__s4_6Imm1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
6748 | | { 0 /* */, Hexagon::V6_vL32b_nt_tmp_ppu, Convert__Reg1_0__Reg1_6__Tie1__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
6749 | | { 0 /* */, Hexagon::V6_vabsdiffub, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6750 | | { 0 /* */, Hexagon::V6_vavgub, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vavg, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6751 | | { 0 /* */, Hexagon::V6_vmaxub, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vmax, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6752 | | { 0 /* */, Hexagon::V6_vminub, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vmin, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6753 | | { 0 /* */, Hexagon::V6_vsathub, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vsat, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6754 | | { 0 /* */, Hexagon::V6_vabsdiffh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6755 | | { 0 /* */, Hexagon::V6_vabsdiffuh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6756 | | { 0 /* */, Hexagon::V6_vavguh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vavg, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6757 | | { 0 /* */, Hexagon::V6_vmaxuh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmax, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6758 | | { 0 /* */, Hexagon::V6_vminuh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmin, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6759 | | { 0 /* */, Hexagon::V6_vabsdiffw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6760 | | { 0 /* */, Hexagon::V6_vrmpyub, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6761 | | { 0 /* */, Hexagon::V6_vrmpyubv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6762 | | { 0 /* */, Hexagon::V6_vaddw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6763 | | { 0 /* */, Hexagon::V6_vaslwv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vasl, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6764 | | { 0 /* */, Hexagon::V6_vasrwv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6765 | | { 0 /* */, Hexagon::V6_vavgw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vavg, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6766 | | { 0 /* */, Hexagon::V6_vdmpyhb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6767 | | { 0 /* */, Hexagon::V6_vlsrwv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vlsr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6768 | | { 0 /* */, Hexagon::V6_vmaxw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmax, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6769 | | { 0 /* */, Hexagon::V6_vminw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmin, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6770 | | { 0 /* */, Hexagon::V6_vmpyewuh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpye, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6771 | | { 0 /* */, Hexagon::V6_vmpyiwb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyi, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6772 | | { 0 /* */, Hexagon::V6_vmpyiwh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyi, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6773 | | { 0 /* */, Hexagon::V6_vmpyiewuh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyie, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6774 | | { 0 /* */, Hexagon::V6_vmpyieoh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyieo, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6775 | | { 0 /* */, Hexagon::V6_vmpyiowh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyio, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6776 | | { 0 /* */, Hexagon::V6_vnavgw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vnavg, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6777 | | { 0 /* */, Hexagon::V6_vrmpybv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6778 | | { 0 /* */, Hexagon::V6_vrmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6779 | | { 0 /* */, Hexagon::V6_vrmpybusv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6780 | | { 0 /* */, Hexagon::V6_vsubw, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6781 | | { 0 /* */, Hexagon::V6_veqb_and, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6782 | | { 0 /* */, Hexagon::V6_veqh_and, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6783 | | { 0 /* */, Hexagon::V6_veqw_and, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6784 | | { 0 /* */, Hexagon::V6_vgtb_and, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6785 | | { 0 /* */, Hexagon::V6_vgth_and, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6786 | | { 0 /* */, Hexagon::V6_vgtub_and, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6787 | | { 0 /* */, Hexagon::V6_vgtuh_and, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6788 | | { 0 /* */, Hexagon::V6_vgtuw_and, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
6789 | | { 0 /* */, Hexagon::V6_vgtw_and, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6790 | | { 0 /* */, Hexagon::V6_veqb_xor, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6791 | | { 0 /* */, Hexagon::V6_veqh_xor, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6792 | | { 0 /* */, Hexagon::V6_veqw_xor, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6793 | | { 0 /* */, Hexagon::V6_vgtb_xor, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6794 | | { 0 /* */, Hexagon::V6_vgth_xor, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6795 | | { 0 /* */, Hexagon::V6_vgtub_xor, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6796 | | { 0 /* */, Hexagon::V6_vgtuh_xor, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6797 | | { 0 /* */, Hexagon::V6_vgtuw_xor, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
6798 | | { 0 /* */, Hexagon::V6_vgtw_xor, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6799 | | { 0 /* */, Hexagon::V6_veqb_or, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6800 | | { 0 /* */, Hexagon::V6_veqh_or, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6801 | | { 0 /* */, Hexagon::V6_veqw_or, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6802 | | { 0 /* */, Hexagon::V6_vgtb_or, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6803 | | { 0 /* */, Hexagon::V6_vgth_or, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6804 | | { 0 /* */, Hexagon::V6_vgtub_or, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6805 | | { 0 /* */, Hexagon::V6_vgtuh_or, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6806 | | { 0 /* */, Hexagon::V6_vgtuw_or, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
6807 | | { 0 /* */, Hexagon::V6_vgtw_or, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecPredRegs, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_ }, }, |
6808 | | { 0 /* */, Hexagon::M2_cmacs_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6809 | | { 0 /* */, Hexagon::M2_vdmacs_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6810 | | { 0 /* */, Hexagon::M2_vmac2es_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6811 | | { 0 /* */, Hexagon::M2_vmac2s_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6812 | | { 0 /* */, Hexagon::M2_vmac2su_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6813 | | { 0 /* */, Hexagon::M2_mmacls_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6814 | | { 0 /* */, Hexagon::M2_mmaculs_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6815 | | { 0 /* */, Hexagon::M2_mmachs_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6816 | | { 0 /* */, Hexagon::M2_mmacuhs_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6817 | | { 0 /* */, Hexagon::M2_vrcmpys_acc_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6818 | | { 0 /* */, Hexagon::M2_cnacs_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6819 | | { 0 /* */, Hexagon::M2_cmpysc_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6820 | | { 0 /* */, Hexagon::L2_loadalignb_pcr, Convert__Reg1_0__Reg1_4__Tie0__Tie1__Reg1_11, 0, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6821 | | { 0 /* */, Hexagon::L2_loadbsw4_pcr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_11, 0, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6822 | | { 0 /* */, Hexagon::L2_loadrd_pcr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_11, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6823 | | { 0 /* */, Hexagon::L2_loadalignh_pcr, Convert__Reg1_0__Reg1_4__Tie0__Tie1__Reg1_11, 0, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6824 | | { 0 /* */, Hexagon::L2_loadbzw4_pcr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_11, 0, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6825 | | { 0 /* */, Hexagon::V6_vdmpybus_dv_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6826 | | { 0 /* */, Hexagon::V6_vmpabus_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpa, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6827 | | { 0 /* */, Hexagon::V6_vmpybv_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6828 | | { 0 /* */, Hexagon::V6_vmpybus_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6829 | | { 0 /* */, Hexagon::V6_vmpybusv_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6830 | | { 0 /* */, Hexagon::V6_vtmpyb_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vtmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_b, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6831 | | { 0 /* */, Hexagon::V6_vtmpybus_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vtmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6832 | | { 0 /* */, Hexagon::V6_vlutvwh, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vlut16, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_ }, }, |
6833 | | { 0 /* */, Hexagon::V6_vmpyub_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6834 | | { 0 /* */, Hexagon::V6_vmpyubv_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6835 | | { 0 /* */, Hexagon::V6_vdsaduh_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vdsad, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6836 | | { 0 /* */, Hexagon::V6_vmpyuh_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6837 | | { 0 /* */, Hexagon::V6_vmpyuhv_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6838 | | { 0 /* */, Hexagon::V6_vdmpyhb_dv_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6839 | | { 0 /* */, Hexagon::V6_vmpahb_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpa, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6840 | | { 0 /* */, Hexagon::V6_vmpyhv_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6841 | | { 0 /* */, Hexagon::V6_vmpyhus_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6842 | | { 0 /* */, Hexagon::V6_vtmpyhb_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vtmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6843 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_hh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6844 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_hl_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6845 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_lh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6846 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_ll_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6847 | | { 0 /* */, Hexagon::M4_mac_up_s1_sat, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6848 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_hh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6849 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_hl_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6850 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_lh_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6851 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_ll_s0, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6852 | | { 0 /* */, Hexagon::M4_nac_up_s1_sat, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6853 | | { 0 /* */, Hexagon::L2_loadrb_pcr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6854 | | { 0 /* */, Hexagon::L2_loadbsw2_pcr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_11, 0, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6855 | | { 0 /* */, Hexagon::L2_loadrh_pcr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6856 | | { 0 /* */, Hexagon::L2_loadrub_pcr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6857 | | { 0 /* */, Hexagon::L2_loadbzw2_pcr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6858 | | { 0 /* */, Hexagon::L2_loadruh_pcr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6859 | | { 0 /* */, Hexagon::L2_loadri_pcr, Convert__Reg1_0__Reg1_4__Tie1__Reg1_11, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6860 | | { 0 /* */, Hexagon::V6_vlutvvb, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vlut32, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__41_ }, }, |
6861 | | { 0 /* */, Hexagon::V6_vL32b_nt_cur_pi, Convert__Reg1_0__Reg1_6__Tie1__s3_6Imm1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
6862 | | { 0 /* */, Hexagon::V6_vdmpybus_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6863 | | { 0 /* */, Hexagon::V6_vmpyihb_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6864 | | { 0 /* */, Hexagon::V6_vmpyih_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6865 | | { 0 /* */, Hexagon::V6_vasrwh, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_ }, }, |
6866 | | { 0 /* */, Hexagon::V6_vL32b_nt_tmp_pi, Convert__Reg1_0__Reg1_6__Tie1__s3_6Imm1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
6867 | | { 0 /* */, Hexagon::V6_vrmpyub_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6868 | | { 0 /* */, Hexagon::V6_vrmpyubv_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
6869 | | { 0 /* */, Hexagon::V6_vdmpyhb_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6870 | | { 0 /* */, Hexagon::V6_vmpyiwb_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6871 | | { 0 /* */, Hexagon::V6_vmpyiwh_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6872 | | { 0 /* */, Hexagon::V6_vmpyiewh_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyie, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
6873 | | { 0 /* */, Hexagon::V6_vmpyiewuh_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyie, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
6874 | | { 0 /* */, Hexagon::V6_vrmpybv_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6875 | | { 0 /* */, Hexagon::V6_vrmpybus_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6876 | | { 0 /* */, Hexagon::V6_vrmpybusv_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
6877 | | { 0 /* */, Hexagon::M2_cmacsc_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6878 | | { 0 /* */, Hexagon::M2_cnacsc_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6879 | | { 0 /* */, Hexagon::L2_loadalignb_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_0Imm1_8__Reg1_12, 0, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6880 | | { 0 /* */, Hexagon::L2_loadbsw4_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_2Imm1_8__Reg1_12, 0, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6881 | | { 0 /* */, Hexagon::L2_loadrd_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_3Imm1_8__Reg1_12, 0, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6882 | | { 0 /* */, Hexagon::L2_loadalignh_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8__Reg1_12, 0, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6883 | | { 0 /* */, Hexagon::L2_loadbzw4_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_2Imm1_8__Reg1_12, 0, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6884 | | { 0 /* */, Hexagon::M2_mpyd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6885 | | { 0 /* */, Hexagon::M2_mpyd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6886 | | { 0 /* */, Hexagon::M2_mpyd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6887 | | { 0 /* */, Hexagon::M2_mpyd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6888 | | { 0 /* */, Hexagon::M2_mpyud_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6889 | | { 0 /* */, Hexagon::M2_mpyud_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6890 | | { 0 /* */, Hexagon::M2_mpyud_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6891 | | { 0 /* */, Hexagon::M2_mpyud_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6892 | | { 0 /* */, Hexagon::M2_mmpyl_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6893 | | { 0 /* */, Hexagon::M2_mmpyul_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6894 | | { 0 /* */, Hexagon::M2_mmpyh_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6895 | | { 0 /* */, Hexagon::M2_mmpyuh_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6896 | | { 0 /* */, Hexagon::S4_vxaddsubhr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vxaddsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK__GT_, MCK__GT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6897 | | { 0 /* */, Hexagon::S4_vxsubaddhr, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vxsubaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK__GT_, MCK__GT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6898 | | { 0 /* */, Hexagon::V6_vaddhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6899 | | { 0 /* */, Hexagon::V6_vsubhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6900 | | { 0 /* */, Hexagon::V6_vlutvwh_oracc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK__124_, MCK__61_, MCK_vlut16, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_ }, }, |
6901 | | { 0 /* */, Hexagon::V6_vaddubsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vadd, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6902 | | { 0 /* */, Hexagon::V6_vsububsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vsub, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6903 | | { 0 /* */, Hexagon::V6_vadduhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vadd, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6904 | | { 0 /* */, Hexagon::V6_vsubuhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vsub, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK_VecDblRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6905 | | { 0 /* */, Hexagon::V6_vrmpyubi, Convert__Reg1_0__Reg1_6__Reg1_9__u1Imm1_13, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__35_, MCK_u1Imm, MCK__41_ }, }, |
6906 | | { 0 /* */, Hexagon::V6_vrsadubi, Convert__Reg1_0__Reg1_6__Reg1_9__u1Imm1_13, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrsad, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__35_, MCK_u1Imm, MCK__41_ }, }, |
6907 | | { 0 /* */, Hexagon::V6_vaddwsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6908 | | { 0 /* */, Hexagon::V6_vrmpybusi, Convert__Reg1_0__Reg1_6__Reg1_9__u1Imm1_13, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__35_, MCK_u1Imm, MCK__41_ }, }, |
6909 | | { 0 /* */, Hexagon::V6_vsubwsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6910 | | { 0 /* */, Hexagon::A2_addh_h16_hh, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
6911 | | { 0 /* */, Hexagon::A2_addh_h16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
6912 | | { 0 /* */, Hexagon::A2_addh_h16_lh, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
6913 | | { 0 /* */, Hexagon::A2_addh_h16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
6914 | | { 0 /* */, Hexagon::M2_cmpyrs_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6915 | | { 0 /* */, Hexagon::M4_cmpyi_wh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_cmpyiwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6916 | | { 0 /* */, Hexagon::M4_cmpyr_wh, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_cmpyrwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6917 | | { 0 /* */, Hexagon::L2_loadrb_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_0Imm1_8__Reg1_12, 0, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6918 | | { 0 /* */, Hexagon::L2_loadbsw2_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8__Reg1_12, 0, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6919 | | { 0 /* */, Hexagon::L2_loadrh_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8__Reg1_12, 0, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6920 | | { 0 /* */, Hexagon::L2_loadrub_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_0Imm1_8__Reg1_12, 0, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6921 | | { 0 /* */, Hexagon::L2_loadbzw2_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8__Reg1_12, 0, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6922 | | { 0 /* */, Hexagon::L2_loadruh_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_1Imm1_8__Reg1_12, 0, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6923 | | { 0 /* */, Hexagon::L2_loadri_pci, Convert__Reg1_0__Reg1_4__Tie1__s4_2Imm1_8__Reg1_12, 0, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
6924 | | { 0 /* */, Hexagon::M2_mpy_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6925 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6926 | | { 0 /* */, Hexagon::M2_mpy_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6927 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6928 | | { 0 /* */, Hexagon::M2_mpy_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6929 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6930 | | { 0 /* */, Hexagon::M2_mpy_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6931 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6932 | | { 0 /* */, Hexagon::M2_hmmpyh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6933 | | { 0 /* */, Hexagon::M2_hmmpyl_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
6934 | | { 0 /* */, Hexagon::M2_mpyu_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6935 | | { 0 /* */, Hexagon::M2_mpyu_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6936 | | { 0 /* */, Hexagon::M2_mpyu_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6937 | | { 0 /* */, Hexagon::M2_mpyu_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6938 | | { 0 /* */, Hexagon::A2_subh_h16_hh, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
6939 | | { 0 /* */, Hexagon::A2_subh_h16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
6940 | | { 0 /* */, Hexagon::A2_subh_h16_lh, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
6941 | | { 0 /* */, Hexagon::A2_subh_h16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
6942 | | { 0 /* */, Hexagon::M2_vdmpyrs_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6943 | | { 0 /* */, Hexagon::M2_vmpy2s_s1pack, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6944 | | { 0 /* */, Hexagon::M2_vrcmpys_s1rp, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6945 | | { 0 /* */, Hexagon::V6_vpackhb_sat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vpack, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6946 | | { 0 /* */, Hexagon::V6_vroundhb, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vround, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6947 | | { 0 /* */, Hexagon::V6_vlutvvb_oracc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__124_, MCK__61_, MCK_vlut32, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__41_ }, }, |
6948 | | { 0 /* */, Hexagon::V6_vaddhsat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6949 | | { 0 /* */, Hexagon::V6_vavghrnd, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vavg, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6950 | | { 0 /* */, Hexagon::V6_vpackwh_sat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vpack, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6951 | | { 0 /* */, Hexagon::V6_vroundwh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vround, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6952 | | { 0 /* */, Hexagon::V6_vsubhsat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6953 | | { 0 /* */, Hexagon::V6_vaddubsat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vadd, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6954 | | { 0 /* */, Hexagon::V6_vavgubrnd, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vavg, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6955 | | { 0 /* */, Hexagon::V6_vpackhub_sat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vpack, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6956 | | { 0 /* */, Hexagon::V6_vroundhub, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vround, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6957 | | { 0 /* */, Hexagon::V6_vsububsat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vsub, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6958 | | { 0 /* */, Hexagon::V6_vadduhsat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vadd, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6959 | | { 0 /* */, Hexagon::V6_vavguhrnd, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vavg, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6960 | | { 0 /* */, Hexagon::V6_vpackwuh_sat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vpack, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6961 | | { 0 /* */, Hexagon::V6_vroundwuh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vround, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6962 | | { 0 /* */, Hexagon::V6_vsubuhsat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vsub, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6963 | | { 0 /* */, Hexagon::V6_vaddwsat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6964 | | { 0 /* */, Hexagon::V6_vavgwrnd, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vavg, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
6965 | | { 0 /* */, Hexagon::V6_vdmpyhisat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6966 | | { 0 /* */, Hexagon::V6_vdmpyhsat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6967 | | { 0 /* */, Hexagon::V6_vdmpyhsusat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6968 | | { 0 /* */, Hexagon::V6_vdmpyhvsat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6969 | | { 0 /* */, Hexagon::V6_vsubwsat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6970 | | { 0 /* */, Hexagon::M2_mpyd_acc_hh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6971 | | { 0 /* */, Hexagon::M2_mpyd_acc_hl_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6972 | | { 0 /* */, Hexagon::M2_mpyd_acc_lh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6973 | | { 0 /* */, Hexagon::M2_mpyd_acc_ll_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6974 | | { 0 /* */, Hexagon::M2_mpyud_acc_hh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6975 | | { 0 /* */, Hexagon::M2_mpyud_acc_hl_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6976 | | { 0 /* */, Hexagon::M2_mpyud_acc_lh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6977 | | { 0 /* */, Hexagon::M2_mpyud_acc_ll_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6978 | | { 0 /* */, Hexagon::M2_mmacls_rs1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6979 | | { 0 /* */, Hexagon::M2_mmaculs_rs1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6980 | | { 0 /* */, Hexagon::M2_mmachs_rs1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6981 | | { 0 /* */, Hexagon::M2_mmacuhs_rs1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
6982 | | { 0 /* */, Hexagon::M2_mpyd_nac_hh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6983 | | { 0 /* */, Hexagon::M2_mpyd_nac_hl_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6984 | | { 0 /* */, Hexagon::M2_mpyd_nac_lh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6985 | | { 0 /* */, Hexagon::M2_mpyd_nac_ll_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6986 | | { 0 /* */, Hexagon::M2_mpyud_nac_hh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6987 | | { 0 /* */, Hexagon::M2_mpyud_nac_hl_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6988 | | { 0 /* */, Hexagon::M2_mpyud_nac_lh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6989 | | { 0 /* */, Hexagon::M2_mpyud_nac_ll_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6990 | | { 0 /* */, Hexagon::V6_vrmpyubi_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10__u1Imm1_14, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__35_, MCK_u1Imm, MCK__41_ }, }, |
6991 | | { 0 /* */, Hexagon::V6_vrsadubi_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10__u1Imm1_14, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrsad, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__35_, MCK_u1Imm, MCK__41_ }, }, |
6992 | | { 0 /* */, Hexagon::V6_vmpyhsat_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
6993 | | { 0 /* */, Hexagon::V6_vrmpybusi_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10__u1Imm1_14, Feature_HasV60T|Feature_UseHVX, { MCK_VecDblRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__35_, MCK_u1Imm, MCK__41_ }, }, |
6994 | | { 0 /* */, Hexagon::M2_mpy_acc_hh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6995 | | { 0 /* */, Hexagon::M2_mpy_acc_hl_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6996 | | { 0 /* */, Hexagon::M2_mpy_acc_lh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6997 | | { 0 /* */, Hexagon::M2_mpy_acc_ll_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6998 | | { 0 /* */, Hexagon::M2_mpyu_acc_hh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
6999 | | { 0 /* */, Hexagon::M2_mpyu_acc_hl_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
7000 | | { 0 /* */, Hexagon::M2_mpyu_acc_lh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
7001 | | { 0 /* */, Hexagon::M2_mpyu_acc_ll_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
7002 | | { 0 /* */, Hexagon::M2_mpy_nac_hh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
7003 | | { 0 /* */, Hexagon::M2_mpy_nac_hl_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
7004 | | { 0 /* */, Hexagon::M2_mpy_nac_lh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
7005 | | { 0 /* */, Hexagon::M2_mpy_nac_ll_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
7006 | | { 0 /* */, Hexagon::M2_mpyu_nac_hh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
7007 | | { 0 /* */, Hexagon::M2_mpyu_nac_hl_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
7008 | | { 0 /* */, Hexagon::M2_mpyu_nac_lh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
7009 | | { 0 /* */, Hexagon::M2_mpyu_nac_ll_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
7010 | | { 0 /* */, Hexagon::M2_cmpyrsc_s1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7011 | | { 0 /* */, Hexagon::M4_cmpyi_whc, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_cmpyiwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7012 | | { 0 /* */, Hexagon::M4_cmpyr_whc, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_cmpyrwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7013 | | { 0 /* */, Hexagon::V6_vasrwhsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
7014 | | { 0 /* */, Hexagon::V6_vasrhubsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
7015 | | { 0 /* */, Hexagon::V6_vasrwuhsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
7016 | | { 0 /* */, Hexagon::V6_vdmpyhisat_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
7017 | | { 0 /* */, Hexagon::V6_vdmpyhsat_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
7018 | | { 0 /* */, Hexagon::V6_vdmpyhsusat_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
7019 | | { 0 /* */, Hexagon::V6_vdmpyhvsat_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
7020 | | { 0 /* */, Hexagon::M2_mpyd_rnd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
7021 | | { 0 /* */, Hexagon::M2_mpyd_rnd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
7022 | | { 0 /* */, Hexagon::M2_mpyd_rnd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
7023 | | { 0 /* */, Hexagon::M2_mpyd_rnd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
7024 | | { 0 /* */, Hexagon::M2_vrcmpys_s1_h, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
7025 | | { 0 /* */, Hexagon::M2_vrcmpys_s1_l, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
7026 | | { 0 /* */, Hexagon::A2_addh_h16_sat_hh, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
7027 | | { 0 /* */, Hexagon::A2_addh_h16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
7028 | | { 0 /* */, Hexagon::A2_addh_h16_sat_lh, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
7029 | | { 0 /* */, Hexagon::A2_addh_h16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
7030 | | { 0 /* */, Hexagon::M2_mpy_rnd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
7031 | | { 0 /* */, Hexagon::M2_mpy_sat_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7032 | | { 0 /* */, Hexagon::M2_mpy_rnd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
7033 | | { 0 /* */, Hexagon::M2_mpy_sat_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7034 | | { 0 /* */, Hexagon::M2_mpy_rnd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
7035 | | { 0 /* */, Hexagon::M2_mpy_sat_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7036 | | { 0 /* */, Hexagon::M2_mpy_rnd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
7037 | | { 0 /* */, Hexagon::M2_mpy_sat_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7038 | | { 0 /* */, Hexagon::M2_hmmpyh_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7039 | | { 0 /* */, Hexagon::M2_hmmpyl_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7040 | | { 0 /* */, Hexagon::A2_subh_h16_sat_hh, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
7041 | | { 0 /* */, Hexagon::A2_subh_h16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
7042 | | { 0 /* */, Hexagon::A2_subh_h16_sat_lh, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
7043 | | { 0 /* */, Hexagon::A2_subh_h16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
7044 | | { 0 /* */, Hexagon::V6_vdmpyhsuisat, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__35_, MCK_1, MCK__41_, MCK__COLON_, MCK_sat }, }, |
7045 | | { 0 /* */, Hexagon::M2_vrcmpys_acc_s1_h, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
7046 | | { 0 /* */, Hexagon::M2_vrcmpys_acc_s1_l, Convert__Reg1_0__Tie0__Reg1_5__Reg1_6, 0, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
7047 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_hh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7048 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_hl_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7049 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_lh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7050 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_ll_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7051 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_hh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7052 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_hl_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7053 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_lh_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7054 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_ll_s1, Convert__Reg1_0__Tie0__Reg1_5__Reg1_8, 0, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7055 | | { 0 /* */, Hexagon::V6_vasrhbrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7056 | | { 0 /* */, Hexagon::V6_vasrwhrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7057 | | { 0 /* */, Hexagon::V6_vasrhubrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7058 | | { 0 /* */, Hexagon::V6_vdmpyhsuisat_acc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_VecDblRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__35_, MCK_1, MCK__41_, MCK__COLON_, MCK_sat }, }, |
7059 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7060 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7061 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7062 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, 0, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7063 | | { 0 /* */, Hexagon::M2_vrcmpys_s1rp_h, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
7064 | | { 0 /* */, Hexagon::M2_vrcmpys_s1rp_l, Convert__Reg1_0__Reg1_4__Reg1_5, 0, { MCK_IntRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
7065 | | { 0 /* */, Hexagon::V6_vmpyhss, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7066 | | { 0 /* */, Hexagon::V6_vmpyowh, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyo, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
7067 | | { 0 /* */, Hexagon::V6_vmpyhsrs, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7068 | | { 0 /* */, Hexagon::V6_vmpyhvsrs, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7069 | | { 0 /* */, Hexagon::V6_vmpyowh_rnd, Convert__Reg1_0__Reg1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyo, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
7070 | | { 0 /* */, Hexagon::V6_vmpyowh_sacc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyo, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_shift }, }, |
7071 | | { 0 /* */, Hexagon::V6_vmpyowh_rnd_sacc, Convert__Reg1_0__Tie0__Reg1_7__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyo, MCK__40_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_shift }, }, |
7072 | | { 1 /* allocframe */, Hexagon::S2_allocframe, Convert__u11_3Imm1_3, 0, { MCK_allocframe, MCK__40_, MCK__35_, MCK_u11_3Imm, MCK__41_ }, }, |
7073 | | { 12 /* barrier */, Hexagon::Y2_barrier, Convert_NoOperands, 0, { MCK_barrier }, }, |
7074 | | { 20 /* call */, Hexagon::J2_call, Convert__Imm1_1, 0, { MCK_call, MCK_Imm }, }, |
7075 | | { 20 /* call */, Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4, Convert__Imm1_1, 0, { MCK_call, MCK_Imm }, }, |
7076 | | { 20 /* call */, Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT, Convert__Imm1_1, 0, { MCK_call, MCK_Imm }, }, |
7077 | | { 20 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4, Convert__Imm1_1, 0, { MCK_call, MCK_Imm }, }, |
7078 | | { 20 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4_EXT, Convert__Imm1_1, 0, { MCK_call, MCK_Imm }, }, |
7079 | | { 25 /* callr */, Hexagon::J2_callr, Convert__Reg1_1, 0, { MCK_callr, MCK_IntRegs }, }, |
7080 | | { 31 /* dccleana */, Hexagon::Y2_dccleana, Convert__Reg1_2, 0, { MCK_dccleana, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7081 | | { 40 /* dccleaninva */, Hexagon::Y2_dccleaninva, Convert__Reg1_2, 0, { MCK_dccleaninva, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7082 | | { 52 /* dcfetch */, Hexagon::Y2_dcfetchbo, Convert__Reg1_2__imm_95_0, 0, { MCK_dcfetch, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7083 | | { 52 /* dcfetch */, Hexagon::Y2_dcfetchbo, Convert__Reg1_2__u11_3Imm1_5, 0, { MCK_dcfetch, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u11_3Imm, MCK__41_ }, }, |
7084 | | { 60 /* dcinva */, Hexagon::Y2_dcinva, Convert__Reg1_2, 0, { MCK_dcinva, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7085 | | { 67 /* dczeroa */, Hexagon::Y2_dczeroa, Convert__Reg1_2, 0, { MCK_dczeroa, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7086 | | { 75 /* dealloc_return */, Hexagon::L4_return, Convert_NoOperands, 0, { MCK_dealloc_95_return }, }, |
7087 | | { 90 /* deallocframe */, Hexagon::L2_deallocframe, Convert_NoOperands, 0, { MCK_deallocframe }, }, |
7088 | | { 103 /* hintjr */, Hexagon::J4_hintjumpr, Convert__Reg1_2, 0, { MCK_hintjr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7089 | | { 110 /* icinva */, Hexagon::Y2_icinva, Convert__Reg1_2, 0, { MCK_icinva, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7090 | | { 117 /* if */, Hexagon::L4_return_t, Convert__Reg1_2, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_dealloc_95_return }, }, |
7091 | | { 117 /* if */, Hexagon::L4_return_f, Convert__Reg1_3, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_dealloc_95_return }, }, |
7092 | | { 117 /* if */, Hexagon::J2_callt, Convert__Reg1_2__Imm1_5, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_call, MCK_Imm }, }, |
7093 | | { 117 /* if */, Hexagon::J2_callrt, Convert__Reg1_2__Reg1_5, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_callr, MCK_IntRegs }, }, |
7094 | | { 117 /* if */, Hexagon::J2_jumpt, Convert__Reg1_2__Imm1_5, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jump, MCK_Imm }, }, |
7095 | | { 117 /* if */, Hexagon::J2_jumprt, Convert__Reg1_2__Reg1_5, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK_IntRegs }, }, |
7096 | | { 117 /* if */, Hexagon::J2_callf, Convert__Reg1_3__Imm1_6, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_call, MCK_Imm }, }, |
7097 | | { 117 /* if */, Hexagon::J2_callrf, Convert__Reg1_3__Reg1_6, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_callr, MCK_IntRegs }, }, |
7098 | | { 117 /* if */, Hexagon::J2_jumpf, Convert__Reg1_3__Imm1_6, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jump, MCK_Imm }, }, |
7099 | | { 117 /* if */, Hexagon::J2_jumprf, Convert__Reg1_3__Reg1_6, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK_IntRegs }, }, |
7100 | | { 117 /* if */, Hexagon::J2_jump_noextt, Convert__Reg1_2__Imm1_6, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__35_, MCK_Imm }, }, |
7101 | | { 117 /* if */, Hexagon::A2_tfrpt, Convert__Reg1_4__Reg1_2__Reg1_6, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
7102 | | { 117 /* if */, Hexagon::A2_tfrt, Convert__Reg1_4__Reg1_2__Reg1_6, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
7103 | | { 117 /* if */, Hexagon::V6_vcmov, Convert__Reg1_4__Reg1_2__Reg1_6, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_VectorRegs, MCK__61_, MCK_VectorRegs }, }, |
7104 | | { 117 /* if */, Hexagon::J2_jump_noextf, Convert__Reg1_3__Imm1_7, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__35_, MCK_Imm }, }, |
7105 | | { 117 /* if */, Hexagon::A2_tfrpf, Convert__Reg1_5__Reg1_3__Reg1_7, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
7106 | | { 117 /* if */, Hexagon::A2_tfrf, Convert__Reg1_5__Reg1_3__Reg1_7, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
7107 | | { 117 /* if */, Hexagon::V6_vncmov, Convert__Reg1_5__Reg1_3__Reg1_7, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_VectorRegs, MCK__61_, MCK_VectorRegs }, }, |
7108 | | { 117 /* if */, Hexagon::J2_jump_extt, Convert__Reg1_2__Imm1_7, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__35_, MCK__35_, MCK_Imm }, }, |
7109 | | { 117 /* if */, Hexagon::C2_cmoveit, Convert__Reg1_4__Reg1_2__s12Ext1_7, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_s12Ext }, }, |
7110 | | { 117 /* if */, Hexagon::J2_jump_extf, Convert__Reg1_3__Imm1_8, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__35_, MCK__35_, MCK_Imm }, }, |
7111 | | { 117 /* if */, Hexagon::TFRI_cNotPt_f, Convert__Reg1_5__Reg1_3__f32Ext1_8, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_f32Ext }, }, |
7112 | | { 117 /* if */, Hexagon::C2_cmoveif, Convert__Reg1_5__Reg1_3__s12Ext1_8, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_s12Ext }, }, |
7113 | | { 117 /* if */, Hexagon::L4_return_tnew_pnt, Convert__Reg1_2, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_nt }, }, |
7114 | | { 117 /* if */, Hexagon::L4_return_tnew_pt, Convert__Reg1_2, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_t }, }, |
7115 | | { 117 /* if */, Hexagon::A2_tfrptnew, Convert__Reg1_6__Reg1_2__Reg1_8, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
7116 | | { 117 /* if */, Hexagon::A2_tfrtnew, Convert__Reg1_6__Reg1_2__Reg1_8, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
7117 | | { 117 /* if */, Hexagon::L4_return_fnew_pnt, Convert__Reg1_3, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_nt }, }, |
7118 | | { 117 /* if */, Hexagon::L4_return_fnew_pt, Convert__Reg1_3, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_t }, }, |
7119 | | { 117 /* if */, Hexagon::A2_tfrpfnew, Convert__Reg1_7__Reg1_3__Reg1_9, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
7120 | | { 117 /* if */, Hexagon::A2_tfrfnew, Convert__Reg1_7__Reg1_3__Reg1_9, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
7121 | | { 117 /* if */, Hexagon::S2_pstorerbt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7122 | | { 117 /* if */, Hexagon::S2_pstorerdt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7123 | | { 117 /* if */, Hexagon::S2_pstorerht_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7124 | | { 117 /* if */, Hexagon::S2_pstorerit_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7125 | | { 117 /* if */, Hexagon::L2_ploadrdt_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7126 | | { 117 /* if */, Hexagon::A4_paslht, Convert__Reg1_4__Reg1_2__Reg1_8, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7127 | | { 117 /* if */, Hexagon::A4_pasrht, Convert__Reg1_4__Reg1_2__Reg1_8, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7128 | | { 117 /* if */, Hexagon::L2_ploadrbt_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7129 | | { 117 /* if */, Hexagon::L2_ploadrht_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7130 | | { 117 /* if */, Hexagon::L2_ploadrubt_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7131 | | { 117 /* if */, Hexagon::L2_ploadruht_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7132 | | { 117 /* if */, Hexagon::L2_ploadrit_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7133 | | { 117 /* if */, Hexagon::A4_psxtbt, Convert__Reg1_4__Reg1_2__Reg1_8, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7134 | | { 117 /* if */, Hexagon::A4_psxtht, Convert__Reg1_4__Reg1_2__Reg1_8, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7135 | | { 117 /* if */, Hexagon::A4_pzxtbt, Convert__Reg1_4__Reg1_2__Reg1_8, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7136 | | { 117 /* if */, Hexagon::A4_pzxtht, Convert__Reg1_4__Reg1_2__Reg1_8, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7137 | | { 117 /* if */, Hexagon::J2_jumptnew, Convert__Reg1_2__Imm1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7138 | | { 117 /* if */, Hexagon::J2_jumptnewpt, Convert__Reg1_2__Imm1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7139 | | { 117 /* if */, Hexagon::J2_jumprtnew, Convert__Reg1_2__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_nt, MCK_IntRegs }, }, |
7140 | | { 117 /* if */, Hexagon::J2_jumprtnewpt, Convert__Reg1_2__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_t, MCK_IntRegs }, }, |
7141 | | { 117 /* if */, Hexagon::C2_cmovenewit, Convert__Reg1_6__Reg1_2__s12Ext1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_s12Ext }, }, |
7142 | | { 117 /* if */, Hexagon::S2_pstorerbf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7143 | | { 117 /* if */, Hexagon::S2_pstorerdf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7144 | | { 117 /* if */, Hexagon::S2_pstorerhf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7145 | | { 117 /* if */, Hexagon::S2_pstorerif_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7146 | | { 117 /* if */, Hexagon::L2_ploadrdf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7147 | | { 117 /* if */, Hexagon::A4_paslhf, Convert__Reg1_5__Reg1_3__Reg1_9, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7148 | | { 117 /* if */, Hexagon::A4_pasrhf, Convert__Reg1_5__Reg1_3__Reg1_9, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7149 | | { 117 /* if */, Hexagon::L2_ploadrbf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7150 | | { 117 /* if */, Hexagon::L2_ploadrhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7151 | | { 117 /* if */, Hexagon::L2_ploadrubf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7152 | | { 117 /* if */, Hexagon::L2_ploadruhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7153 | | { 117 /* if */, Hexagon::L2_ploadrif_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7154 | | { 117 /* if */, Hexagon::A4_psxtbf, Convert__Reg1_5__Reg1_3__Reg1_9, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7155 | | { 117 /* if */, Hexagon::A4_psxthf, Convert__Reg1_5__Reg1_3__Reg1_9, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7156 | | { 117 /* if */, Hexagon::A4_pzxtbf, Convert__Reg1_5__Reg1_3__Reg1_9, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7157 | | { 117 /* if */, Hexagon::A4_pzxthf, Convert__Reg1_5__Reg1_3__Reg1_9, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7158 | | { 117 /* if */, Hexagon::J2_jumpfnew, Convert__Reg1_3__Imm1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7159 | | { 117 /* if */, Hexagon::J2_jumpfnewpt, Convert__Reg1_3__Imm1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7160 | | { 117 /* if */, Hexagon::J2_jumprfnew, Convert__Reg1_3__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_nt, MCK_IntRegs }, }, |
7161 | | { 117 /* if */, Hexagon::J2_jumprfnewpt, Convert__Reg1_3__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_t, MCK_IntRegs }, }, |
7162 | | { 117 /* if */, Hexagon::C2_cmovenewif, Convert__Reg1_7__Reg1_3__s12Ext1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_s12Ext }, }, |
7163 | | { 117 /* if */, Hexagon::S4_pstorerbt_abs, Convert__Reg1_2__u32MustExt1_7__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7164 | | { 117 /* if */, Hexagon::S4_storeirbt_io, Convert__Reg1_2__Reg1_6__imm_95_0__s6Ext1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7165 | | { 117 /* if */, Hexagon::S4_pstorerdt_abs, Convert__Reg1_2__u32MustExt1_7__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7166 | | { 117 /* if */, Hexagon::S4_pstorerht_abs, Convert__Reg1_2__u32MustExt1_7__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7167 | | { 117 /* if */, Hexagon::S4_storeirht_io, Convert__Reg1_2__Reg1_6__imm_95_0__s6Ext1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7168 | | { 117 /* if */, Hexagon::S4_pstorerit_abs, Convert__Reg1_2__u32MustExt1_7__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7169 | | { 117 /* if */, Hexagon::S4_storeirit_io, Convert__Reg1_2__Reg1_6__imm_95_0__s6Ext1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7170 | | { 117 /* if */, Hexagon::C2_ccombinewt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7171 | | { 117 /* if */, Hexagon::L4_ploadrdt_abs, Convert__Reg1_4__Reg1_2__u32MustExt1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7172 | | { 117 /* if */, Hexagon::V6_vccombine, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_VecDblRegs, MCK__61_, MCK_vcombine, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK__41_ }, }, |
7173 | | { 117 /* if */, Hexagon::A2_paddt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7174 | | { 117 /* if */, Hexagon::A2_pandt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7175 | | { 117 /* if */, Hexagon::L4_ploadrbt_abs, Convert__Reg1_4__Reg1_2__u32MustExt1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7176 | | { 117 /* if */, Hexagon::L4_ploadrht_abs, Convert__Reg1_4__Reg1_2__u32MustExt1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7177 | | { 117 /* if */, Hexagon::L4_ploadrubt_abs, Convert__Reg1_4__Reg1_2__u32MustExt1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7178 | | { 117 /* if */, Hexagon::L4_ploadruht_abs, Convert__Reg1_4__Reg1_2__u32MustExt1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7179 | | { 117 /* if */, Hexagon::L4_ploadrit_abs, Convert__Reg1_4__Reg1_2__u32MustExt1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7180 | | { 117 /* if */, Hexagon::A2_port, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7181 | | { 117 /* if */, Hexagon::A2_psubt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7182 | | { 117 /* if */, Hexagon::A2_pxort, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7183 | | { 117 /* if */, Hexagon::J2_jump_noexttnew, Convert__Reg1_2__Imm1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK__35_, MCK_Imm }, }, |
7184 | | { 117 /* if */, Hexagon::J2_jump_noexttnewpt, Convert__Reg1_2__Imm1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK__35_, MCK_Imm }, }, |
7185 | | { 117 /* if */, Hexagon::S4_pstorerbf_abs, Convert__Reg1_3__u32MustExt1_8__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7186 | | { 117 /* if */, Hexagon::S4_storeirbf_io, Convert__Reg1_3__Reg1_7__imm_95_0__s6Ext1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7187 | | { 117 /* if */, Hexagon::S4_pstorerdf_abs, Convert__Reg1_3__u32MustExt1_8__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7188 | | { 117 /* if */, Hexagon::S4_pstorerhf_abs, Convert__Reg1_3__u32MustExt1_8__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7189 | | { 117 /* if */, Hexagon::S4_storeirhf_io, Convert__Reg1_3__Reg1_7__imm_95_0__s6Ext1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7190 | | { 117 /* if */, Hexagon::S4_pstorerif_abs, Convert__Reg1_3__u32MustExt1_8__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7191 | | { 117 /* if */, Hexagon::S4_storeirif_io, Convert__Reg1_3__Reg1_7__imm_95_0__s6Ext1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7192 | | { 117 /* if */, Hexagon::C2_ccombinewf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7193 | | { 117 /* if */, Hexagon::L4_ploadrdf_abs, Convert__Reg1_5__Reg1_3__u32MustExt1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7194 | | { 117 /* if */, Hexagon::V6_vnccombine, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_VecDblRegs, MCK__61_, MCK_vcombine, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK__41_ }, }, |
7195 | | { 117 /* if */, Hexagon::A2_paddf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7196 | | { 117 /* if */, Hexagon::A2_pandf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7197 | | { 117 /* if */, Hexagon::L4_ploadrbf_abs, Convert__Reg1_5__Reg1_3__u32MustExt1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7198 | | { 117 /* if */, Hexagon::L4_ploadrhf_abs, Convert__Reg1_5__Reg1_3__u32MustExt1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7199 | | { 117 /* if */, Hexagon::L4_ploadrubf_abs, Convert__Reg1_5__Reg1_3__u32MustExt1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7200 | | { 117 /* if */, Hexagon::L4_ploadruhf_abs, Convert__Reg1_5__Reg1_3__u32MustExt1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7201 | | { 117 /* if */, Hexagon::L4_ploadrif_abs, Convert__Reg1_5__Reg1_3__u32MustExt1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7202 | | { 117 /* if */, Hexagon::A2_porf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7203 | | { 117 /* if */, Hexagon::A2_psubf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7204 | | { 117 /* if */, Hexagon::A2_pxorf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7205 | | { 117 /* if */, Hexagon::J2_jump_noextfnew, Convert__Reg1_3__Imm1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK__35_, MCK_Imm }, }, |
7206 | | { 117 /* if */, Hexagon::J2_jump_noextfnewpt, Convert__Reg1_3__Imm1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK__35_, MCK_Imm }, }, |
7207 | | { 117 /* if */, Hexagon::S2_pstorerbnewt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7208 | | { 117 /* if */, Hexagon::S2_pstorerft_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7209 | | { 117 /* if */, Hexagon::S2_pstorerhnewt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7210 | | { 117 /* if */, Hexagon::S2_pstorerinewt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7211 | | { 117 /* if */, Hexagon::A2_paddit, Convert__Reg1_4__Reg1_2__Reg1_8__s8Ext1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
7212 | | { 117 /* if */, Hexagon::J2_jump_exttnew, Convert__Reg1_2__Imm1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK__35_, MCK__35_, MCK_Imm }, }, |
7213 | | { 117 /* if */, Hexagon::J2_jump_exttnewpt, Convert__Reg1_2__Imm1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK__35_, MCK__35_, MCK_Imm }, }, |
7214 | | { 117 /* if */, Hexagon::S4_pstorerbtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7215 | | { 117 /* if */, Hexagon::S4_pstorerdtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7216 | | { 117 /* if */, Hexagon::S4_pstorerhtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7217 | | { 117 /* if */, Hexagon::S4_pstoreritnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7218 | | { 117 /* if */, Hexagon::L2_ploadrdtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7219 | | { 117 /* if */, Hexagon::A4_paslhtnew, Convert__Reg1_6__Reg1_2__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7220 | | { 117 /* if */, Hexagon::A4_pasrhtnew, Convert__Reg1_6__Reg1_2__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7221 | | { 117 /* if */, Hexagon::L2_ploadrbtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7222 | | { 117 /* if */, Hexagon::L2_ploadrhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7223 | | { 117 /* if */, Hexagon::L2_ploadrubtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7224 | | { 117 /* if */, Hexagon::L2_ploadruhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7225 | | { 117 /* if */, Hexagon::L2_ploadritnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7226 | | { 117 /* if */, Hexagon::A4_psxtbtnew, Convert__Reg1_6__Reg1_2__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7227 | | { 117 /* if */, Hexagon::A4_psxthtnew, Convert__Reg1_6__Reg1_2__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7228 | | { 117 /* if */, Hexagon::A4_pzxtbtnew, Convert__Reg1_6__Reg1_2__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7229 | | { 117 /* if */, Hexagon::A4_pzxthtnew, Convert__Reg1_6__Reg1_2__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7230 | | { 117 /* if */, Hexagon::V6_vaddbq, Convert__Reg1_4__Reg1_2__Tie0__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__43_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_b }, }, |
7231 | | { 117 /* if */, Hexagon::V6_vsubbq, Convert__Reg1_4__Reg1_2__Tie0__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__MINUS_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_b }, }, |
7232 | | { 117 /* if */, Hexagon::V6_vaddhq, Convert__Reg1_4__Reg1_2__Tie0__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_h }, }, |
7233 | | { 117 /* if */, Hexagon::V6_vsubhq, Convert__Reg1_4__Reg1_2__Tie0__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__MINUS_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_h }, }, |
7234 | | { 117 /* if */, Hexagon::V6_vaddwq, Convert__Reg1_4__Reg1_2__Tie0__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_w }, }, |
7235 | | { 117 /* if */, Hexagon::V6_vsubwq, Convert__Reg1_4__Reg1_2__Tie0__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__MINUS_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_w }, }, |
7236 | | { 117 /* if */, Hexagon::J2_jumprz, Convert__Reg1_2__Imm1_11, 0, { MCK_if, MCK__40_, MCK_IntRegs, MCK__EXCLAIM_, MCK__61_, MCK__35_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7237 | | { 117 /* if */, Hexagon::J2_jumprzpt, Convert__Reg1_2__Imm1_11, 0, { MCK_if, MCK__40_, MCK_IntRegs, MCK__EXCLAIM_, MCK__61_, MCK__35_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7238 | | { 117 /* if */, Hexagon::J2_jumprltez, Convert__Reg1_2__Imm1_11, 0, { MCK_if, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__61_, MCK__35_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7239 | | { 117 /* if */, Hexagon::J2_jumprltezpt, Convert__Reg1_2__Imm1_11, 0, { MCK_if, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__61_, MCK__35_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7240 | | { 117 /* if */, Hexagon::J2_jumprnz, Convert__Reg1_2__Imm1_11, 0, { MCK_if, MCK__40_, MCK_IntRegs, MCK__61_, MCK__61_, MCK__35_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7241 | | { 117 /* if */, Hexagon::J2_jumprnzpt, Convert__Reg1_2__Imm1_11, 0, { MCK_if, MCK__40_, MCK_IntRegs, MCK__61_, MCK__61_, MCK__35_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7242 | | { 117 /* if */, Hexagon::J2_jumprgtez, Convert__Reg1_2__Imm1_11, 0, { MCK_if, MCK__40_, MCK_IntRegs, MCK__GT_, MCK__61_, MCK__35_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7243 | | { 117 /* if */, Hexagon::J2_jumprgtezpt, Convert__Reg1_2__Imm1_11, 0, { MCK_if, MCK__40_, MCK_IntRegs, MCK__GT_, MCK__61_, MCK__35_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7244 | | { 117 /* if */, Hexagon::S2_pstorerbnewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7245 | | { 117 /* if */, Hexagon::S2_pstorerff_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7246 | | { 117 /* if */, Hexagon::S2_pstorerhnewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7247 | | { 117 /* if */, Hexagon::S2_pstorerinewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7248 | | { 117 /* if */, Hexagon::A2_paddif, Convert__Reg1_5__Reg1_3__Reg1_9__s8Ext1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
7249 | | { 117 /* if */, Hexagon::J2_jump_extfnew, Convert__Reg1_3__Imm1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK__35_, MCK__35_, MCK_Imm }, }, |
7250 | | { 117 /* if */, Hexagon::J2_jump_extfnewpt, Convert__Reg1_3__Imm1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK__35_, MCK__35_, MCK_Imm }, }, |
7251 | | { 117 /* if */, Hexagon::S4_pstorerbfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7252 | | { 117 /* if */, Hexagon::S4_pstorerdfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7253 | | { 117 /* if */, Hexagon::S4_pstorerhfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7254 | | { 117 /* if */, Hexagon::S4_pstorerifnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7255 | | { 117 /* if */, Hexagon::L2_ploadrdfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7256 | | { 117 /* if */, Hexagon::A4_paslhfnew, Convert__Reg1_7__Reg1_3__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7257 | | { 117 /* if */, Hexagon::A4_pasrhfnew, Convert__Reg1_7__Reg1_3__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7258 | | { 117 /* if */, Hexagon::L2_ploadrbfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7259 | | { 117 /* if */, Hexagon::L2_ploadrhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7260 | | { 117 /* if */, Hexagon::L2_ploadrubfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7261 | | { 117 /* if */, Hexagon::L2_ploadruhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7262 | | { 117 /* if */, Hexagon::L2_ploadrifnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7263 | | { 117 /* if */, Hexagon::A4_psxtbfnew, Convert__Reg1_7__Reg1_3__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7264 | | { 117 /* if */, Hexagon::A4_psxthfnew, Convert__Reg1_7__Reg1_3__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7265 | | { 117 /* if */, Hexagon::A4_pzxtbfnew, Convert__Reg1_7__Reg1_3__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7266 | | { 117 /* if */, Hexagon::A4_pzxthfnew, Convert__Reg1_7__Reg1_3__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7267 | | { 117 /* if */, Hexagon::V6_vaddbnq, Convert__Reg1_5__Reg1_3__Tie0__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__43_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_b }, }, |
7268 | | { 117 /* if */, Hexagon::V6_vsubbnq, Convert__Reg1_5__Reg1_3__Tie0__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_b, MCK__MINUS_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_b }, }, |
7269 | | { 117 /* if */, Hexagon::V6_vaddhnq, Convert__Reg1_5__Reg1_3__Tie0__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_h }, }, |
7270 | | { 117 /* if */, Hexagon::V6_vsubhnq, Convert__Reg1_5__Reg1_3__Tie0__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_h, MCK__MINUS_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_h }, }, |
7271 | | { 117 /* if */, Hexagon::V6_vaddwnq, Convert__Reg1_5__Reg1_3__Tie0__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_w }, }, |
7272 | | { 117 /* if */, Hexagon::V6_vsubwnq, Convert__Reg1_5__Reg1_3__Tie0__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_VectorRegs, MCK__DOT_, MCK_w, MCK__MINUS_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_w }, }, |
7273 | | { 117 /* if */, Hexagon::S4_pstorerbnewt_abs, Convert__Reg1_2__u6Ext1_7__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7274 | | { 117 /* if */, Hexagon::S2_pstorerbt_io, Convert__Reg1_2__Reg1_6__u6_0Ext1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7275 | | { 117 /* if */, Hexagon::S2_pstorerdt_io, Convert__Reg1_2__Reg1_6__u6_3Ext1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_3Ext, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7276 | | { 117 /* if */, Hexagon::S4_pstorerft_abs, Convert__Reg1_2__u32MustExt1_7__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7277 | | { 117 /* if */, Hexagon::S4_pstorerhnewt_abs, Convert__Reg1_2__u6Ext1_7__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7278 | | { 117 /* if */, Hexagon::S2_pstorerht_io, Convert__Reg1_2__Reg1_6__u6_1Ext1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7279 | | { 117 /* if */, Hexagon::S4_pstorerinewt_abs, Convert__Reg1_2__u6Ext1_7__Reg1_10, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7280 | | { 117 /* if */, Hexagon::S2_pstorerit_io, Convert__Reg1_2__Reg1_6__u6_2Ext1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7281 | | { 117 /* if */, Hexagon::V6_vS32b_pred_ai, Convert__Reg1_2__Reg1_6__s4_6Imm1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7282 | | { 117 /* if */, Hexagon::V6_vS32b_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7283 | | { 117 /* if */, Hexagon::V6_vS32Ub_pred_ai, Convert__Reg1_2__Reg1_6__s4_6Imm1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7284 | | { 117 /* if */, Hexagon::V6_vS32Ub_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7285 | | { 117 /* if */, Hexagon::L2_ploadrdt_io, Convert__Reg1_4__Reg1_2__Reg1_8__u6_3Ext1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_3Ext, MCK__41_ }, }, |
7286 | | { 117 /* if */, Hexagon::L2_ploadrbt_io, Convert__Reg1_4__Reg1_2__Reg1_8__u6_0Ext1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_ }, }, |
7287 | | { 117 /* if */, Hexagon::L2_ploadrht_io, Convert__Reg1_4__Reg1_2__Reg1_8__u6_1Ext1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_ }, }, |
7288 | | { 117 /* if */, Hexagon::L2_ploadrubt_io, Convert__Reg1_4__Reg1_2__Reg1_8__u6_0Ext1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_ }, }, |
7289 | | { 117 /* if */, Hexagon::L2_ploadruht_io, Convert__Reg1_4__Reg1_2__Reg1_8__u6_1Ext1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_ }, }, |
7290 | | { 117 /* if */, Hexagon::L2_ploadrit_io, Convert__Reg1_4__Reg1_2__Reg1_8__u6_2Ext1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_ }, }, |
7291 | | { 117 /* if */, Hexagon::S4_pstorerbtnew_abs, Convert__Reg1_2__u32MustExt1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7292 | | { 117 /* if */, Hexagon::S4_storeirbtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s6Ext1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7293 | | { 117 /* if */, Hexagon::S4_pstorerdtnew_abs, Convert__Reg1_2__u32MustExt1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7294 | | { 117 /* if */, Hexagon::S4_pstorerhtnew_abs, Convert__Reg1_2__u32MustExt1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7295 | | { 117 /* if */, Hexagon::S4_storeirhtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s6Ext1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7296 | | { 117 /* if */, Hexagon::S4_pstoreritnew_abs, Convert__Reg1_2__u32MustExt1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7297 | | { 117 /* if */, Hexagon::S4_storeiritnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s6Ext1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7298 | | { 117 /* if */, Hexagon::C2_ccombinewnewt, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7299 | | { 117 /* if */, Hexagon::L4_ploadrdtnew_abs, Convert__Reg1_6__Reg1_2__u32MustExt1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7300 | | { 117 /* if */, Hexagon::A2_paddtnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7301 | | { 117 /* if */, Hexagon::A2_pandtnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7302 | | { 117 /* if */, Hexagon::L4_ploadrbtnew_abs, Convert__Reg1_6__Reg1_2__u32MustExt1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7303 | | { 117 /* if */, Hexagon::L4_ploadrhtnew_abs, Convert__Reg1_6__Reg1_2__u32MustExt1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7304 | | { 117 /* if */, Hexagon::L4_ploadrubtnew_abs, Convert__Reg1_6__Reg1_2__u32MustExt1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7305 | | { 117 /* if */, Hexagon::L4_ploadruhtnew_abs, Convert__Reg1_6__Reg1_2__u32MustExt1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7306 | | { 117 /* if */, Hexagon::L4_ploadritnew_abs, Convert__Reg1_6__Reg1_2__u32MustExt1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7307 | | { 117 /* if */, Hexagon::A2_portnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7308 | | { 117 /* if */, Hexagon::A2_psubtnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7309 | | { 117 /* if */, Hexagon::A2_pxortnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7310 | | { 117 /* if */, Hexagon::V6_vS32b_qpred_ai, Convert__Reg1_2__Reg1_6__s4_6Imm1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7311 | | { 117 /* if */, Hexagon::V6_vS32b_qpred_ppu, Convert__Reg1_6__Reg1_2__Tie0__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7312 | | { 117 /* if */, Hexagon::S4_pstorerbnewf_abs, Convert__Reg1_3__u6Ext1_8__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7313 | | { 117 /* if */, Hexagon::S2_pstorerbf_io, Convert__Reg1_3__Reg1_7__u6_0Ext1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7314 | | { 117 /* if */, Hexagon::S2_pstorerdf_io, Convert__Reg1_3__Reg1_7__u6_3Ext1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_3Ext, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7315 | | { 117 /* if */, Hexagon::S4_pstorerff_abs, Convert__Reg1_3__u32MustExt1_8__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7316 | | { 117 /* if */, Hexagon::S4_pstorerhnewf_abs, Convert__Reg1_3__u6Ext1_8__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7317 | | { 117 /* if */, Hexagon::S2_pstorerhf_io, Convert__Reg1_3__Reg1_7__u6_1Ext1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7318 | | { 117 /* if */, Hexagon::S4_pstorerinewf_abs, Convert__Reg1_3__u6Ext1_8__Reg1_11, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7319 | | { 117 /* if */, Hexagon::S2_pstorerif_io, Convert__Reg1_3__Reg1_7__u6_2Ext1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7320 | | { 117 /* if */, Hexagon::V6_vS32b_npred_ai, Convert__Reg1_3__Reg1_7__s4_6Imm1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7321 | | { 117 /* if */, Hexagon::V6_vS32b_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0__Reg1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7322 | | { 117 /* if */, Hexagon::V6_vS32Ub_npred_ai, Convert__Reg1_3__Reg1_7__s4_6Imm1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7323 | | { 117 /* if */, Hexagon::V6_vS32Ub_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0__Reg1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7324 | | { 117 /* if */, Hexagon::L2_ploadrdf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u6_3Ext1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_3Ext, MCK__41_ }, }, |
7325 | | { 117 /* if */, Hexagon::L2_ploadrbf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u6_0Ext1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_ }, }, |
7326 | | { 117 /* if */, Hexagon::L2_ploadrhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u6_1Ext1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_ }, }, |
7327 | | { 117 /* if */, Hexagon::L2_ploadrubf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u6_0Ext1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_ }, }, |
7328 | | { 117 /* if */, Hexagon::L2_ploadruhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u6_1Ext1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_ }, }, |
7329 | | { 117 /* if */, Hexagon::L2_ploadrif_io, Convert__Reg1_5__Reg1_3__Reg1_9__u6_2Ext1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_ }, }, |
7330 | | { 117 /* if */, Hexagon::S4_pstorerbfnew_abs, Convert__Reg1_3__u32MustExt1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7331 | | { 117 /* if */, Hexagon::S4_storeirbfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s6Ext1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7332 | | { 117 /* if */, Hexagon::S4_pstorerdfnew_abs, Convert__Reg1_3__u32MustExt1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7333 | | { 117 /* if */, Hexagon::S4_pstorerhfnew_abs, Convert__Reg1_3__u32MustExt1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7334 | | { 117 /* if */, Hexagon::S4_storeirhfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s6Ext1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7335 | | { 117 /* if */, Hexagon::S4_pstorerifnew_abs, Convert__Reg1_3__u32MustExt1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7336 | | { 117 /* if */, Hexagon::S4_storeirifnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s6Ext1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7337 | | { 117 /* if */, Hexagon::C2_ccombinewnewf, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7338 | | { 117 /* if */, Hexagon::L4_ploadrdfnew_abs, Convert__Reg1_7__Reg1_3__u32MustExt1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7339 | | { 117 /* if */, Hexagon::A2_paddfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7340 | | { 117 /* if */, Hexagon::A2_pandfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7341 | | { 117 /* if */, Hexagon::L4_ploadrbfnew_abs, Convert__Reg1_7__Reg1_3__u32MustExt1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7342 | | { 117 /* if */, Hexagon::L4_ploadrhfnew_abs, Convert__Reg1_7__Reg1_3__u32MustExt1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7343 | | { 117 /* if */, Hexagon::L4_ploadrubfnew_abs, Convert__Reg1_7__Reg1_3__u32MustExt1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7344 | | { 117 /* if */, Hexagon::L4_ploadruhfnew_abs, Convert__Reg1_7__Reg1_3__u32MustExt1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7345 | | { 117 /* if */, Hexagon::L4_ploadrifnew_abs, Convert__Reg1_7__Reg1_3__u32MustExt1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_ }, }, |
7346 | | { 117 /* if */, Hexagon::A2_porfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7347 | | { 117 /* if */, Hexagon::A2_psubfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7348 | | { 117 /* if */, Hexagon::A2_pxorfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7349 | | { 117 /* if */, Hexagon::V6_vS32b_nqpred_ai, Convert__Reg1_3__Reg1_7__s4_6Imm1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7350 | | { 117 /* if */, Hexagon::V6_vS32b_nqpred_ppu, Convert__Reg1_7__Reg1_3__Tie0__Reg1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7351 | | { 117 /* if */, Hexagon::S4_storeirbt_io, Convert__Reg1_2__Reg1_6__u6_0Imm1_9__s6Ext1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7352 | | { 117 /* if */, Hexagon::S2_pstorerbt_pi, Convert__Reg1_6__Reg1_2__Tie0__s4_0Imm1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7353 | | { 117 /* if */, Hexagon::S2_pstorerdt_pi, Convert__Reg1_6__Reg1_2__Tie0__s4_3Imm1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7354 | | { 117 /* if */, Hexagon::S4_storeirht_io, Convert__Reg1_2__Reg1_6__u6_1Imm1_9__s6Ext1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7355 | | { 117 /* if */, Hexagon::S2_pstorerht_pi, Convert__Reg1_6__Reg1_2__Tie0__s4_1Imm1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7356 | | { 117 /* if */, Hexagon::S4_storeirit_io, Convert__Reg1_2__Reg1_6__u6_2Imm1_9__s6Ext1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7357 | | { 117 /* if */, Hexagon::S2_pstorerit_pi, Convert__Reg1_6__Reg1_2__Tie0__s4_2Imm1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7358 | | { 117 /* if */, Hexagon::V6_vS32b_pred_pi, Convert__Reg1_6__Reg1_2__Tie0__s3_6Imm1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7359 | | { 117 /* if */, Hexagon::V6_vS32Ub_pred_pi, Convert__Reg1_6__Reg1_2__Tie0__s3_6Imm1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7360 | | { 117 /* if */, Hexagon::L2_ploadrdt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_3Imm1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__41_ }, }, |
7361 | | { 117 /* if */, Hexagon::L2_ploadrbt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_0Imm1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_ }, }, |
7362 | | { 117 /* if */, Hexagon::L2_ploadrht_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_1Imm1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
7363 | | { 117 /* if */, Hexagon::L2_ploadrubt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_0Imm1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_ }, }, |
7364 | | { 117 /* if */, Hexagon::L2_ploadruht_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_1Imm1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
7365 | | { 117 /* if */, Hexagon::L2_ploadrit_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1__s4_2Imm1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_ }, }, |
7366 | | { 117 /* if */, Hexagon::S4_pstorerbnewtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7367 | | { 117 /* if */, Hexagon::S4_pstorerftnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7368 | | { 117 /* if */, Hexagon::S4_pstorerhnewtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7369 | | { 117 /* if */, Hexagon::S4_pstorerinewtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7370 | | { 117 /* if */, Hexagon::A2_padditnew, Convert__Reg1_6__Reg1_2__Reg1_10__s8Ext1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
7371 | | { 117 /* if */, Hexagon::V6_vS32b_qpred_pi, Convert__Reg1_6__Reg1_2__Tie0__s3_6Imm1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7372 | | { 117 /* if */, Hexagon::S4_storeirbf_io, Convert__Reg1_3__Reg1_7__u6_0Imm1_10__s6Ext1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7373 | | { 117 /* if */, Hexagon::S2_pstorerbf_pi, Convert__Reg1_7__Reg1_3__Tie0__s4_0Imm1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7374 | | { 117 /* if */, Hexagon::S2_pstorerdf_pi, Convert__Reg1_7__Reg1_3__Tie0__s4_3Imm1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7375 | | { 117 /* if */, Hexagon::S4_storeirhf_io, Convert__Reg1_3__Reg1_7__u6_1Imm1_10__s6Ext1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7376 | | { 117 /* if */, Hexagon::S2_pstorerhf_pi, Convert__Reg1_7__Reg1_3__Tie0__s4_1Imm1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7377 | | { 117 /* if */, Hexagon::S4_storeirif_io, Convert__Reg1_3__Reg1_7__u6_2Imm1_10__s6Ext1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7378 | | { 117 /* if */, Hexagon::S2_pstorerif_pi, Convert__Reg1_7__Reg1_3__Tie0__s4_2Imm1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7379 | | { 117 /* if */, Hexagon::V6_vS32b_npred_pi, Convert__Reg1_7__Reg1_3__Tie0__s3_6Imm1_11__Reg1_14, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7380 | | { 117 /* if */, Hexagon::V6_vS32Ub_npred_pi, Convert__Reg1_7__Reg1_3__Tie0__s3_6Imm1_11__Reg1_14, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7381 | | { 117 /* if */, Hexagon::L2_ploadrdf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_3Imm1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__41_ }, }, |
7382 | | { 117 /* if */, Hexagon::L2_ploadrbf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_0Imm1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_ }, }, |
7383 | | { 117 /* if */, Hexagon::L2_ploadrhf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_1Imm1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
7384 | | { 117 /* if */, Hexagon::L2_ploadrubf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_0Imm1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_ }, }, |
7385 | | { 117 /* if */, Hexagon::L2_ploadruhf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_1Imm1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
7386 | | { 117 /* if */, Hexagon::L2_ploadrif_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1__s4_2Imm1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_ }, }, |
7387 | | { 117 /* if */, Hexagon::S4_pstorerbnewfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7388 | | { 117 /* if */, Hexagon::S4_pstorerffnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7389 | | { 117 /* if */, Hexagon::S4_pstorerhnewfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7390 | | { 117 /* if */, Hexagon::S4_pstorerinewfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7391 | | { 117 /* if */, Hexagon::A2_paddifnew, Convert__Reg1_7__Reg1_3__Reg1_11__s8Ext1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__35_, MCK_s8Ext, MCK__41_ }, }, |
7392 | | { 117 /* if */, Hexagon::V6_vS32b_nqpred_pi, Convert__Reg1_7__Reg1_3__Tie0__s3_6Imm1_11__Reg1_14, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7393 | | { 117 /* if */, Hexagon::J4_tstbit0_t_jumpnv_nt, Convert__Reg1_4__Imm1_14, 0, { MCK_if, MCK__40_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7394 | | { 117 /* if */, Hexagon::J4_tstbit0_t_jumpnv_t, Convert__Reg1_4__Imm1_14, 0, { MCK_if, MCK__40_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7395 | | { 117 /* if */, Hexagon::S2_pstorerbnewt_io, Convert__Reg1_2__Reg1_6__u6_0Ext1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7396 | | { 117 /* if */, Hexagon::S2_pstorerft_io, Convert__Reg1_2__Reg1_6__u6_1Ext1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7397 | | { 117 /* if */, Hexagon::S2_pstorerhnewt_io, Convert__Reg1_2__Reg1_6__u6_1Ext1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7398 | | { 117 /* if */, Hexagon::S2_pstorerinewt_io, Convert__Reg1_2__Reg1_6__u6_2Ext1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7399 | | { 117 /* if */, Hexagon::V6_vS32b_nt_pred_ai, Convert__Reg1_2__Reg1_6__s4_6Imm1_9__Reg1_14, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7400 | | { 117 /* if */, Hexagon::V6_vS32b_new_pred_ai, Convert__Reg1_2__Reg1_6__s4_6Imm1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7401 | | { 117 /* if */, Hexagon::V6_vS32b_nt_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0__Reg1_9__Reg1_14, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7402 | | { 117 /* if */, Hexagon::V6_vS32b_new_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0__Reg1_9__Reg1_12, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7403 | | { 117 /* if */, Hexagon::S4_pstorerbnewtnew_abs, Convert__Reg1_2__u6Ext1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7404 | | { 117 /* if */, Hexagon::S4_pstorerbtnew_io, Convert__Reg1_2__Reg1_8__u6_0Ext1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7405 | | { 117 /* if */, Hexagon::S4_pstorerdtnew_io, Convert__Reg1_2__Reg1_8__u6_3Ext1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_3Ext, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7406 | | { 117 /* if */, Hexagon::S4_pstorerftnew_abs, Convert__Reg1_2__u32MustExt1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7407 | | { 117 /* if */, Hexagon::S4_pstorerhnewtnew_abs, Convert__Reg1_2__u6Ext1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7408 | | { 117 /* if */, Hexagon::S4_pstorerhtnew_io, Convert__Reg1_2__Reg1_8__u6_1Ext1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7409 | | { 117 /* if */, Hexagon::S4_pstorerinewtnew_abs, Convert__Reg1_2__u6Ext1_9__Reg1_12, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7410 | | { 117 /* if */, Hexagon::S4_pstoreritnew_io, Convert__Reg1_2__Reg1_8__u6_2Ext1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7411 | | { 117 /* if */, Hexagon::L2_ploadrdtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u6_3Ext1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_3Ext, MCK__41_ }, }, |
7412 | | { 117 /* if */, Hexagon::L2_ploadrbtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u6_0Ext1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_ }, }, |
7413 | | { 117 /* if */, Hexagon::L2_ploadrhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u6_1Ext1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_ }, }, |
7414 | | { 117 /* if */, Hexagon::L2_ploadrubtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u6_0Ext1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_ }, }, |
7415 | | { 117 /* if */, Hexagon::L2_ploadruhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u6_1Ext1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_ }, }, |
7416 | | { 117 /* if */, Hexagon::L2_ploadritnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u6_2Ext1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_ }, }, |
7417 | | { 117 /* if */, Hexagon::V6_vS32b_nt_qpred_ai, Convert__Reg1_2__Reg1_6__s4_6Imm1_9__Reg1_14, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7418 | | { 117 /* if */, Hexagon::V6_vS32b_nt_qpred_ppu, Convert__Reg1_6__Reg1_2__Tie0__Reg1_9__Reg1_14, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7419 | | { 117 /* if */, Hexagon::J4_tstbit0_f_jumpnv_nt, Convert__Reg1_5__Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7420 | | { 117 /* if */, Hexagon::J4_tstbit0_f_jumpnv_t, Convert__Reg1_5__Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7421 | | { 117 /* if */, Hexagon::S2_pstorerbnewf_io, Convert__Reg1_3__Reg1_7__u6_0Ext1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7422 | | { 117 /* if */, Hexagon::S2_pstorerff_io, Convert__Reg1_3__Reg1_7__u6_1Ext1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7423 | | { 117 /* if */, Hexagon::S2_pstorerhnewf_io, Convert__Reg1_3__Reg1_7__u6_1Ext1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7424 | | { 117 /* if */, Hexagon::S2_pstorerinewf_io, Convert__Reg1_3__Reg1_7__u6_2Ext1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7425 | | { 117 /* if */, Hexagon::V6_vS32b_nt_npred_ai, Convert__Reg1_3__Reg1_7__s4_6Imm1_10__Reg1_15, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7426 | | { 117 /* if */, Hexagon::V6_vS32b_new_npred_ai, Convert__Reg1_3__Reg1_7__s4_6Imm1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7427 | | { 117 /* if */, Hexagon::V6_vS32b_nt_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0__Reg1_10__Reg1_15, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7428 | | { 117 /* if */, Hexagon::V6_vS32b_new_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0__Reg1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7429 | | { 117 /* if */, Hexagon::S4_pstorerbnewfnew_abs, Convert__Reg1_3__u6Ext1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7430 | | { 117 /* if */, Hexagon::S4_pstorerbfnew_io, Convert__Reg1_3__Reg1_9__u6_0Ext1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7431 | | { 117 /* if */, Hexagon::S4_pstorerdfnew_io, Convert__Reg1_3__Reg1_9__u6_3Ext1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_3Ext, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7432 | | { 117 /* if */, Hexagon::S4_pstorerffnew_abs, Convert__Reg1_3__u32MustExt1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7433 | | { 117 /* if */, Hexagon::S4_pstorerhnewfnew_abs, Convert__Reg1_3__u6Ext1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7434 | | { 117 /* if */, Hexagon::S4_pstorerhfnew_io, Convert__Reg1_3__Reg1_9__u6_1Ext1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7435 | | { 117 /* if */, Hexagon::S4_pstorerinewfnew_abs, Convert__Reg1_3__u6Ext1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7436 | | { 117 /* if */, Hexagon::S4_pstorerifnew_io, Convert__Reg1_3__Reg1_9__u6_2Ext1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7437 | | { 117 /* if */, Hexagon::L2_ploadrdfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u6_3Ext1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_3Ext, MCK__41_ }, }, |
7438 | | { 117 /* if */, Hexagon::L2_ploadrbfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u6_0Ext1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_ }, }, |
7439 | | { 117 /* if */, Hexagon::L2_ploadrhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u6_1Ext1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_ }, }, |
7440 | | { 117 /* if */, Hexagon::L2_ploadrubfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u6_0Ext1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_ }, }, |
7441 | | { 117 /* if */, Hexagon::L2_ploadruhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u6_1Ext1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_ }, }, |
7442 | | { 117 /* if */, Hexagon::L2_ploadrifnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u6_2Ext1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_ }, }, |
7443 | | { 117 /* if */, Hexagon::V6_vS32b_nt_nqpred_ai, Convert__Reg1_3__Reg1_7__s4_6Imm1_10__Reg1_15, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7444 | | { 117 /* if */, Hexagon::V6_vS32b_nt_nqpred_ppu, Convert__Reg1_7__Reg1_3__Tie0__Reg1_10__Reg1_15, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7445 | | { 117 /* if */, Hexagon::J4_cmpeq_t_jumpnv_nt, Convert__Reg1_6__Reg1_9__Imm1_15, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7446 | | { 117 /* if */, Hexagon::J4_cmpeq_t_jumpnv_t, Convert__Reg1_6__Reg1_9__Imm1_15, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7447 | | { 117 /* if */, Hexagon::J4_cmpgt_t_jumpnv_nt, Convert__Reg1_6__Reg1_9__Imm1_15, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7448 | | { 117 /* if */, Hexagon::J4_cmpgt_t_jumpnv_t, Convert__Reg1_6__Reg1_9__Imm1_15, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7449 | | { 117 /* if */, Hexagon::J4_cmplt_t_jumpnv_nt, Convert__Reg1_6__Reg1_7__Imm1_15, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7450 | | { 117 /* if */, Hexagon::J4_cmplt_t_jumpnv_t, Convert__Reg1_6__Reg1_7__Imm1_15, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7451 | | { 117 /* if */, Hexagon::J4_cmpgtu_t_jumpnv_nt, Convert__Reg1_6__Reg1_9__Imm1_15, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7452 | | { 117 /* if */, Hexagon::J4_cmpgtu_t_jumpnv_t, Convert__Reg1_6__Reg1_9__Imm1_15, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7453 | | { 117 /* if */, Hexagon::J4_cmpltu_t_jumpnv_nt, Convert__Reg1_6__Reg1_7__Imm1_15, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7454 | | { 117 /* if */, Hexagon::J4_cmpltu_t_jumpnv_t, Convert__Reg1_6__Reg1_7__Imm1_15, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7455 | | { 117 /* if */, Hexagon::S2_pstorerbnewt_pi, Convert__Reg1_6__Reg1_2__Tie0__s4_0Imm1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7456 | | { 117 /* if */, Hexagon::S4_pstorerbt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7457 | | { 117 /* if */, Hexagon::S4_pstorerdt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7458 | | { 117 /* if */, Hexagon::S2_pstorerft_pi, Convert__Reg1_6__Reg1_2__Tie0__s4_1Imm1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7459 | | { 117 /* if */, Hexagon::S2_pstorerhnewt_pi, Convert__Reg1_6__Reg1_2__Tie0__s4_1Imm1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7460 | | { 117 /* if */, Hexagon::S4_pstorerht_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7461 | | { 117 /* if */, Hexagon::S2_pstorerinewt_pi, Convert__Reg1_6__Reg1_2__Tie0__s4_2Imm1_10__Reg1_13, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7462 | | { 117 /* if */, Hexagon::S4_pstorerit_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7463 | | { 117 /* if */, Hexagon::V6_vS32b_nt_pred_pi, Convert__Reg1_6__Reg1_2__Tie0__s3_6Imm1_10__Reg1_15, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7464 | | { 117 /* if */, Hexagon::V6_vS32b_new_pred_pi, Convert__Reg1_6__Reg1_2__Tie0__s3_6Imm1_10__Reg1_13, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7465 | | { 117 /* if */, Hexagon::L4_ploadrdt_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7466 | | { 117 /* if */, Hexagon::L4_ploadrbt_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7467 | | { 117 /* if */, Hexagon::L4_ploadrht_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7468 | | { 117 /* if */, Hexagon::L4_ploadrubt_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7469 | | { 117 /* if */, Hexagon::L4_ploadruht_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7470 | | { 117 /* if */, Hexagon::L4_ploadrit_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7471 | | { 117 /* if */, Hexagon::S4_storeirbtnew_io, Convert__Reg1_2__Reg1_8__u6_0Imm1_11__s6Ext1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7472 | | { 117 /* if */, Hexagon::S2_pstorerbtnew_pi, Convert__Reg1_8__Reg1_2__Tie0__s4_0Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7473 | | { 117 /* if */, Hexagon::S2_pstorerdtnew_pi, Convert__Reg1_8__Reg1_2__Tie0__s4_3Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7474 | | { 117 /* if */, Hexagon::S4_storeirhtnew_io, Convert__Reg1_2__Reg1_8__u6_1Imm1_11__s6Ext1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7475 | | { 117 /* if */, Hexagon::S2_pstorerhtnew_pi, Convert__Reg1_8__Reg1_2__Tie0__s4_1Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7476 | | { 117 /* if */, Hexagon::S4_storeiritnew_io, Convert__Reg1_2__Reg1_8__u6_2Imm1_11__s6Ext1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7477 | | { 117 /* if */, Hexagon::S2_pstoreritnew_pi, Convert__Reg1_8__Reg1_2__Tie0__s4_2Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7478 | | { 117 /* if */, Hexagon::L2_ploadrdtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_3Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__41_ }, }, |
7479 | | { 117 /* if */, Hexagon::L2_ploadrbtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_0Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_ }, }, |
7480 | | { 117 /* if */, Hexagon::L2_ploadrhtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_1Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
7481 | | { 117 /* if */, Hexagon::L2_ploadrubtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_0Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_ }, }, |
7482 | | { 117 /* if */, Hexagon::L2_ploadruhtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_1Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
7483 | | { 117 /* if */, Hexagon::L2_ploadritnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1__s4_2Imm1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_ }, }, |
7484 | | { 117 /* if */, Hexagon::V6_vS32b_nt_qpred_pi, Convert__Reg1_6__Reg1_2__Tie0__s3_6Imm1_10__Reg1_15, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7485 | | { 117 /* if */, Hexagon::J4_cmpeq_f_jumpnv_nt, Convert__Reg1_7__Reg1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7486 | | { 117 /* if */, Hexagon::J4_cmpeq_f_jumpnv_t, Convert__Reg1_7__Reg1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7487 | | { 117 /* if */, Hexagon::J4_cmpgt_f_jumpnv_nt, Convert__Reg1_7__Reg1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7488 | | { 117 /* if */, Hexagon::J4_cmpgt_f_jumpnv_t, Convert__Reg1_7__Reg1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7489 | | { 117 /* if */, Hexagon::J4_cmplt_f_jumpnv_nt, Convert__Reg1_7__Reg1_8__Imm1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7490 | | { 117 /* if */, Hexagon::J4_cmplt_f_jumpnv_t, Convert__Reg1_7__Reg1_8__Imm1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7491 | | { 117 /* if */, Hexagon::J4_cmpgtu_f_jumpnv_nt, Convert__Reg1_7__Reg1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7492 | | { 117 /* if */, Hexagon::J4_cmpgtu_f_jumpnv_t, Convert__Reg1_7__Reg1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7493 | | { 117 /* if */, Hexagon::J4_cmpltu_f_jumpnv_nt, Convert__Reg1_7__Reg1_8__Imm1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7494 | | { 117 /* if */, Hexagon::J4_cmpltu_f_jumpnv_t, Convert__Reg1_7__Reg1_8__Imm1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7495 | | { 117 /* if */, Hexagon::S2_pstorerbnewf_pi, Convert__Reg1_7__Reg1_3__Tie0__s4_0Imm1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7496 | | { 117 /* if */, Hexagon::S4_pstorerbf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7497 | | { 117 /* if */, Hexagon::S4_pstorerdf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7498 | | { 117 /* if */, Hexagon::S2_pstorerff_pi, Convert__Reg1_7__Reg1_3__Tie0__s4_1Imm1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7499 | | { 117 /* if */, Hexagon::S2_pstorerhnewf_pi, Convert__Reg1_7__Reg1_3__Tie0__s4_1Imm1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7500 | | { 117 /* if */, Hexagon::S4_pstorerhf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7501 | | { 117 /* if */, Hexagon::S2_pstorerinewf_pi, Convert__Reg1_7__Reg1_3__Tie0__s4_2Imm1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7502 | | { 117 /* if */, Hexagon::S4_pstorerif_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7503 | | { 117 /* if */, Hexagon::V6_vS32b_nt_npred_pi, Convert__Reg1_7__Reg1_3__Tie0__s3_6Imm1_11__Reg1_16, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7504 | | { 117 /* if */, Hexagon::V6_vS32b_new_npred_pi, Convert__Reg1_7__Reg1_3__Tie0__s3_6Imm1_11__Reg1_14, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7505 | | { 117 /* if */, Hexagon::L4_ploadrdf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7506 | | { 117 /* if */, Hexagon::L4_ploadrbf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7507 | | { 117 /* if */, Hexagon::L4_ploadrhf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7508 | | { 117 /* if */, Hexagon::L4_ploadrubf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7509 | | { 117 /* if */, Hexagon::L4_ploadruhf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7510 | | { 117 /* if */, Hexagon::L4_ploadrif_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7511 | | { 117 /* if */, Hexagon::S4_storeirbfnew_io, Convert__Reg1_3__Reg1_9__u6_0Imm1_12__s6Ext1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7512 | | { 117 /* if */, Hexagon::S2_pstorerbfnew_pi, Convert__Reg1_9__Reg1_3__Tie0__s4_0Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7513 | | { 117 /* if */, Hexagon::S2_pstorerdfnew_pi, Convert__Reg1_9__Reg1_3__Tie0__s4_3Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7514 | | { 117 /* if */, Hexagon::S4_storeirhfnew_io, Convert__Reg1_3__Reg1_9__u6_1Imm1_12__s6Ext1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7515 | | { 117 /* if */, Hexagon::S2_pstorerhfnew_pi, Convert__Reg1_9__Reg1_3__Tie0__s4_1Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7516 | | { 117 /* if */, Hexagon::S4_storeirifnew_io, Convert__Reg1_3__Reg1_9__u6_2Imm1_12__s6Ext1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s6Ext }, }, |
7517 | | { 117 /* if */, Hexagon::S2_pstorerifnew_pi, Convert__Reg1_9__Reg1_3__Tie0__s4_2Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7518 | | { 117 /* if */, Hexagon::L2_ploadrdfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_3Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__41_ }, }, |
7519 | | { 117 /* if */, Hexagon::L2_ploadrbfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_0Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_ }, }, |
7520 | | { 117 /* if */, Hexagon::L2_ploadrhfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_1Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
7521 | | { 117 /* if */, Hexagon::L2_ploadrubfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_0Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_ }, }, |
7522 | | { 117 /* if */, Hexagon::L2_ploadruhfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_1Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_ }, }, |
7523 | | { 117 /* if */, Hexagon::L2_ploadrifnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1__s4_2Imm1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_ }, }, |
7524 | | { 117 /* if */, Hexagon::V6_vS32b_nt_nqpred_pi, Convert__Reg1_7__Reg1_3__Tie0__s3_6Imm1_11__Reg1_16, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_VecPredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7525 | | { 117 /* if */, Hexagon::J4_cmpeqn1_t_jumpnv_nt, Convert__Reg1_6__Imm1_16, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7526 | | { 117 /* if */, Hexagon::J4_cmpeqn1_t_jumpnv_t, Convert__Reg1_6__Imm1_16, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7527 | | { 117 /* if */, Hexagon::J4_cmpeqi_t_jumpnv_nt, Convert__Reg1_6__u5Imm1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7528 | | { 117 /* if */, Hexagon::J4_cmpeqi_t_jumpnv_t, Convert__Reg1_6__u5Imm1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7529 | | { 117 /* if */, Hexagon::J4_cmpgtn1_t_jumpnv_nt, Convert__Reg1_6__Imm1_16, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7530 | | { 117 /* if */, Hexagon::J4_cmpgtn1_t_jumpnv_t, Convert__Reg1_6__Imm1_16, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7531 | | { 117 /* if */, Hexagon::J4_cmpgti_t_jumpnv_nt, Convert__Reg1_6__u5Imm1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7532 | | { 117 /* if */, Hexagon::J4_cmpgti_t_jumpnv_t, Convert__Reg1_6__u5Imm1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7533 | | { 117 /* if */, Hexagon::J4_cmpgtui_t_jumpnv_nt, Convert__Reg1_6__u5Imm1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7534 | | { 117 /* if */, Hexagon::J4_cmpgtui_t_jumpnv_t, Convert__Reg1_6__u5Imm1_10__Imm1_16, 0, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7535 | | { 117 /* if */, Hexagon::V6_vS32b_nt_new_pred_ai, Convert__Reg1_2__Reg1_6__s4_6Imm1_9__Reg1_14, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7536 | | { 117 /* if */, Hexagon::V6_vS32b_nt_new_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0__Reg1_9__Reg1_14, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7537 | | { 117 /* if */, Hexagon::S4_pstorerbnewtnew_io, Convert__Reg1_2__Reg1_8__u6_0Ext1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7538 | | { 117 /* if */, Hexagon::S4_pstorerftnew_io, Convert__Reg1_2__Reg1_8__u6_1Ext1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7539 | | { 117 /* if */, Hexagon::S4_pstorerhnewtnew_io, Convert__Reg1_2__Reg1_8__u6_1Ext1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7540 | | { 117 /* if */, Hexagon::S4_pstorerinewtnew_io, Convert__Reg1_2__Reg1_8__u6_2Ext1_11__Reg1_14, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7541 | | { 117 /* if */, Hexagon::J4_cmpeqn1_f_jumpnv_nt, Convert__Reg1_7__Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7542 | | { 117 /* if */, Hexagon::J4_cmpeqn1_f_jumpnv_t, Convert__Reg1_7__Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7543 | | { 117 /* if */, Hexagon::J4_cmpeqi_f_jumpnv_nt, Convert__Reg1_7__u5Imm1_11__Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7544 | | { 117 /* if */, Hexagon::J4_cmpeqi_f_jumpnv_t, Convert__Reg1_7__u5Imm1_11__Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7545 | | { 117 /* if */, Hexagon::J4_cmpgtn1_f_jumpnv_nt, Convert__Reg1_7__Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7546 | | { 117 /* if */, Hexagon::J4_cmpgtn1_f_jumpnv_t, Convert__Reg1_7__Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7547 | | { 117 /* if */, Hexagon::J4_cmpgti_f_jumpnv_nt, Convert__Reg1_7__u5Imm1_11__Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7548 | | { 117 /* if */, Hexagon::J4_cmpgti_f_jumpnv_t, Convert__Reg1_7__u5Imm1_11__Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7549 | | { 117 /* if */, Hexagon::J4_cmpgtui_f_jumpnv_nt, Convert__Reg1_7__u5Imm1_11__Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7550 | | { 117 /* if */, Hexagon::J4_cmpgtui_f_jumpnv_t, Convert__Reg1_7__u5Imm1_11__Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__35_, MCK_u5Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7551 | | { 117 /* if */, Hexagon::V6_vS32b_nt_new_npred_ai, Convert__Reg1_3__Reg1_7__s4_6Imm1_10__Reg1_15, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7552 | | { 117 /* if */, Hexagon::V6_vS32b_nt_new_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0__Reg1_10__Reg1_15, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7553 | | { 117 /* if */, Hexagon::S4_pstorerbnewfnew_io, Convert__Reg1_3__Reg1_9__u6_0Ext1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7554 | | { 117 /* if */, Hexagon::S4_pstorerffnew_io, Convert__Reg1_3__Reg1_9__u6_1Ext1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7555 | | { 117 /* if */, Hexagon::S4_pstorerhnewfnew_io, Convert__Reg1_3__Reg1_9__u6_1Ext1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7556 | | { 117 /* if */, Hexagon::S4_pstorerinewfnew_io, Convert__Reg1_3__Reg1_9__u6_2Ext1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7557 | | { 117 /* if */, Hexagon::S4_pstorerbnewt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7558 | | { 117 /* if */, Hexagon::S4_pstorerft_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7559 | | { 117 /* if */, Hexagon::S4_pstorerhnewt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7560 | | { 117 /* if */, Hexagon::S4_pstorerinewt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7561 | | { 117 /* if */, Hexagon::V6_vS32b_nt_new_pred_pi, Convert__Reg1_6__Reg1_2__Tie0__s3_6Imm1_10__Reg1_15, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7562 | | { 117 /* if */, Hexagon::S2_pstorerbnewtnew_pi, Convert__Reg1_8__Reg1_2__Tie0__s4_0Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7563 | | { 117 /* if */, Hexagon::S4_pstorerbtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14__Reg1_17, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7564 | | { 117 /* if */, Hexagon::S4_pstorerdtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14__Reg1_17, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7565 | | { 117 /* if */, Hexagon::S2_pstorerftnew_pi, Convert__Reg1_8__Reg1_2__Tie0__s4_1Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7566 | | { 117 /* if */, Hexagon::S2_pstorerhnewtnew_pi, Convert__Reg1_8__Reg1_2__Tie0__s4_1Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7567 | | { 117 /* if */, Hexagon::S4_pstorerhtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14__Reg1_17, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7568 | | { 117 /* if */, Hexagon::S2_pstorerinewtnew_pi, Convert__Reg1_8__Reg1_2__Tie0__s4_2Imm1_12__Reg1_15, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7569 | | { 117 /* if */, Hexagon::S4_pstoreritnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14__Reg1_17, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7570 | | { 117 /* if */, Hexagon::L4_ploadrdtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2Imm1_16, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7571 | | { 117 /* if */, Hexagon::L4_ploadrbtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2Imm1_16, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7572 | | { 117 /* if */, Hexagon::L4_ploadrhtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2Imm1_16, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7573 | | { 117 /* if */, Hexagon::L4_ploadrubtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2Imm1_16, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7574 | | { 117 /* if */, Hexagon::L4_ploadruhtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2Imm1_16, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7575 | | { 117 /* if */, Hexagon::L4_ploadritnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2Imm1_16, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7576 | | { 117 /* if */, Hexagon::S4_pstorerbnewf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7577 | | { 117 /* if */, Hexagon::S4_pstorerff_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7578 | | { 117 /* if */, Hexagon::S4_pstorerhnewf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7579 | | { 117 /* if */, Hexagon::S4_pstorerinewf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7580 | | { 117 /* if */, Hexagon::V6_vS32b_nt_new_npred_pi, Convert__Reg1_7__Reg1_3__Tie0__s3_6Imm1_11__Reg1_16, Feature_HasV60T|Feature_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7581 | | { 117 /* if */, Hexagon::S2_pstorerbnewfnew_pi, Convert__Reg1_9__Reg1_3__Tie0__s4_0Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7582 | | { 117 /* if */, Hexagon::S4_pstorerbfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15__Reg1_18, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7583 | | { 117 /* if */, Hexagon::S4_pstorerdfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15__Reg1_18, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7584 | | { 117 /* if */, Hexagon::S2_pstorerffnew_pi, Convert__Reg1_9__Reg1_3__Tie0__s4_1Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7585 | | { 117 /* if */, Hexagon::S2_pstorerhnewfnew_pi, Convert__Reg1_9__Reg1_3__Tie0__s4_1Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7586 | | { 117 /* if */, Hexagon::S4_pstorerhfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15__Reg1_18, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7587 | | { 117 /* if */, Hexagon::S2_pstorerinewfnew_pi, Convert__Reg1_9__Reg1_3__Tie0__s4_2Imm1_13__Reg1_16, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7588 | | { 117 /* if */, Hexagon::S4_pstorerifnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15__Reg1_18, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7589 | | { 117 /* if */, Hexagon::L4_ploadrdfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7590 | | { 117 /* if */, Hexagon::L4_ploadrbfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7591 | | { 117 /* if */, Hexagon::L4_ploadrhfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7592 | | { 117 /* if */, Hexagon::L4_ploadrubfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7593 | | { 117 /* if */, Hexagon::L4_ploadruhfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7594 | | { 117 /* if */, Hexagon::L4_ploadrifnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2Imm1_17, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_ }, }, |
7595 | | { 117 /* if */, Hexagon::S4_pstorerbnewtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14__Reg1_17, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7596 | | { 117 /* if */, Hexagon::S4_pstorerftnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14__Reg1_17, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7597 | | { 117 /* if */, Hexagon::S4_pstorerhnewtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14__Reg1_17, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7598 | | { 117 /* if */, Hexagon::S4_pstorerinewtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2Imm1_14__Reg1_17, 0, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7599 | | { 117 /* if */, Hexagon::S4_pstorerbnewfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15__Reg1_18, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7600 | | { 117 /* if */, Hexagon::S4_pstorerffnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15__Reg1_18, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7601 | | { 117 /* if */, Hexagon::S4_pstorerhnewfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15__Reg1_18, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7602 | | { 117 /* if */, Hexagon::S4_pstorerinewfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2Imm1_15__Reg1_18, 0, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7603 | | { 120 /* isync */, Hexagon::Y2_isync, Convert_NoOperands, 0, { MCK_isync }, }, |
7604 | | { 126 /* jump */, Hexagon::J2_jump, Convert__Imm1_1, 0, { MCK_jump, MCK_Imm }, }, |
7605 | | { 126 /* jump */, Hexagon::RESTORE_DEALLOC_RET_JMP_V4, Convert__Imm1_1, 0, { MCK_jump, MCK_Imm }, }, |
7606 | | { 126 /* jump */, Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT, Convert__Imm1_1, 0, { MCK_jump, MCK_Imm }, }, |
7607 | | { 126 /* jump */, Hexagon::J2_jump_noext, Convert__Imm1_2, 0, { MCK_jump, MCK__35_, MCK_Imm }, }, |
7608 | | { 126 /* jump */, Hexagon::J2_jump_ext, Convert__Imm1_3, 0, { MCK_jump, MCK__35_, MCK__35_, MCK_Imm }, }, |
7609 | | { 131 /* jumpr */, Hexagon::J2_jumpr, Convert__Reg1_1, 0, { MCK_jumpr, MCK_IntRegs }, }, |
7610 | | { 137 /* l2fetch */, Hexagon::Y5_l2fetch, Convert__Reg1_2__Reg1_3, 0, { MCK_l2fetch, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
7611 | | { 137 /* l2fetch */, Hexagon::Y4_l2fetch, Convert__Reg1_2__Reg1_3, 0, { MCK_l2fetch, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
7612 | | { 145 /* l2gclean */, Hexagon::Y5_l2gclean, Convert_NoOperands, 0, { MCK_l2gclean }, }, |
7613 | | { 145 /* l2gclean */, Hexagon::Y6_l2gcleanpa, Convert__Reg1_2, 0, { MCK_l2gclean, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
7614 | | { 154 /* l2gcleaninv */, Hexagon::Y5_l2gcleaninv, Convert_NoOperands, 0, { MCK_l2gcleaninv }, }, |
7615 | | { 154 /* l2gcleaninv */, Hexagon::Y6_l2gcleaninvpa, Convert__Reg1_2, 0, { MCK_l2gcleaninv, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
7616 | | { 166 /* l2gunlock */, Hexagon::Y5_l2gunlock, Convert_NoOperands, 0, { MCK_l2gunlock }, }, |
7617 | | { 176 /* l2unlocka */, Hexagon::Y5_l2unlocka, Convert__Reg1_2, 0, { MCK_l2unlocka, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7618 | | { 186 /* loop0 */, Hexagon::J2_loop0r, Convert__Imm1_2__Reg1_3, 0, { MCK_loop0, MCK__40_, MCK_Imm, MCK_IntRegs, MCK__41_ }, }, |
7619 | | { 186 /* loop0 */, Hexagon::J2_loop0i, Convert__Imm1_2__u10Imm1_4, 0, { MCK_loop0, MCK__40_, MCK_Imm, MCK__35_, MCK_u10Imm, MCK__41_ }, }, |
7620 | | { 192 /* loop1 */, Hexagon::J2_loop1r, Convert__Imm1_2__Reg1_3, 0, { MCK_loop1, MCK__40_, MCK_Imm, MCK_IntRegs, MCK__41_ }, }, |
7621 | | { 192 /* loop1 */, Hexagon::J2_loop1i, Convert__Imm1_2__u10Imm1_4, 0, { MCK_loop1, MCK__40_, MCK_Imm, MCK__35_, MCK_u10Imm, MCK__41_ }, }, |
7622 | | { 198 /* m0 */, Hexagon::A2_tfrrcr, Convert__regC6__Reg1_2, 0, { MCK_M0, MCK__61_, MCK_IntRegs }, }, |
7623 | | { 198 /* m0 */, Hexagon::A2_tfrrcr, Convert__regC6__Reg1_2, 0, { MCK_M0, MCK__61_, MCK_IntRegs }, }, |
7624 | | { 201 /* m1 */, Hexagon::A2_tfrrcr, Convert__regC7__Reg1_2, 0, { MCK_M1, MCK__61_, MCK_IntRegs }, }, |
7625 | | { 201 /* m1 */, Hexagon::A2_tfrrcr, Convert__regC7__Reg1_2, 0, { MCK_M1, MCK__61_, MCK_IntRegs }, }, |
7626 | | { 204 /* memb */, Hexagon::S2_storerb_io, Convert__Reg1_2__imm_95_0__Reg1_5, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7627 | | { 204 /* memb */, Hexagon::S2_storerbgp, Convert__u16_0Imm1_3__Reg1_6, 0, { MCK_memb, MCK__40_, MCK__35_, MCK_u16_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7628 | | { 204 /* memb */, Hexagon::S2_storerbabs, Convert__u32MustExt1_3__Reg1_6, 0, { MCK_memb, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7629 | | { 204 /* memb */, Hexagon::L4_and_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
7630 | | { 204 /* memb */, Hexagon::L4_add_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
7631 | | { 204 /* memb */, Hexagon::L4_sub_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
7632 | | { 204 /* memb */, Hexagon::S4_storeirb_io, Convert__Reg1_2__imm_95_0__s8Ext1_6, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s8Ext }, }, |
7633 | | { 204 /* memb */, Hexagon::L4_or_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
7634 | | { 204 /* memb */, Hexagon::L4_iadd_memopb_io, Convert__Reg1_2__imm_95_0__u5Imm1_7, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7635 | | { 204 /* memb */, Hexagon::L4_isub_memopb_io, Convert__Reg1_2__imm_95_0__u5Imm1_7, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7636 | | { 204 /* memb */, Hexagon::S2_storerbnew_io, Convert__Reg1_2__imm_95_0__Reg1_5, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7637 | | { 204 /* memb */, Hexagon::S2_storerbnewgp, Convert__u32Imm1_3__Reg1_6, 0, { MCK_memb, MCK__40_, MCK__35_, MCK_u32Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7638 | | { 204 /* memb */, Hexagon::S2_storerbgp, Convert__u16_0Imm1_5__Reg1_8, 0, { MCK_memb, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7639 | | { 204 /* memb */, Hexagon::S2_storerb_io, Convert__Reg1_2__s11_0Ext1_5__Reg1_8, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_0Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7640 | | { 204 /* memb */, Hexagon::S2_storerb_pr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7641 | | { 204 /* memb */, Hexagon::S4_storerb_ap, Convert__Reg1_2__u6Ext1_5__Reg1_8, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7642 | | { 204 /* memb */, Hexagon::S2_storerbnewabs, Convert__u32Imm1_4__Reg1_7, 0, { MCK_memb, MCK__40_, MCK__35_, MCK__35_, MCK_u32Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7643 | | { 204 /* memb */, Hexagon::L4_iand_memopb_io, Convert__Reg1_2__imm_95_0__u5Imm1_8, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7644 | | { 204 /* memb */, Hexagon::L4_ior_memopb_io, Convert__Reg1_2__imm_95_0__u5Imm1_8, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7645 | | { 204 /* memb */, Hexagon::L4_and_memopb_io, Convert__Reg1_2__u6_0Ext1_5__Reg1_9, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
7646 | | { 204 /* memb */, Hexagon::L4_add_memopb_io, Convert__Reg1_2__u6_0Ext1_5__Reg1_9, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
7647 | | { 204 /* memb */, Hexagon::L4_sub_memopb_io, Convert__Reg1_2__u6_0Ext1_5__Reg1_9, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
7648 | | { 204 /* memb */, Hexagon::L4_or_memopb_io, Convert__Reg1_2__u6_0Ext1_5__Reg1_9, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
7649 | | { 204 /* memb */, Hexagon::S4_storeirb_io, Convert__Reg1_2__u6_0Imm1_5__s8Ext1_9, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s8Ext }, }, |
7650 | | { 204 /* memb */, Hexagon::S2_storerb_pi, Convert__Reg1_2__Tie0__s4_0Imm1_6__Reg1_9, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7651 | | { 204 /* memb */, Hexagon::S2_storerbnewgp, Convert__u16_0Imm1_5__Reg1_8, 0, { MCK_memb, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7652 | | { 204 /* memb */, Hexagon::S2_storerbnew_io, Convert__Reg1_2__s11_0Ext1_5__Reg1_8, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_0Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7653 | | { 204 /* memb */, Hexagon::L4_iadd_memopb_io, Convert__Reg1_2__u6_0Ext1_5__u5Imm1_10, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__43_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7654 | | { 204 /* memb */, Hexagon::L4_isub_memopb_io, Convert__Reg1_2__u6_0Ext1_5__u5Imm1_10, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__MINUS_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7655 | | { 204 /* memb */, Hexagon::S2_storerbnew_pr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7656 | | { 204 /* memb */, Hexagon::S2_storerb_pbr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_10, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7657 | | { 204 /* memb */, Hexagon::S4_storerbnew_ap, Convert__Reg1_2__u6Ext1_5__Reg1_8, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7658 | | { 204 /* memb */, Hexagon::S2_storerbnew_pi, Convert__Reg1_2__Tie0__s4_0Imm1_6__Reg1_9, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7659 | | { 204 /* memb */, Hexagon::S4_storerb_rr, Convert__Reg1_2__Reg1_4__u2Imm1_8__Reg1_11, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7660 | | { 204 /* memb */, Hexagon::L4_iand_memopb_io, Convert__Reg1_2__u6_0Ext1_5__u5Imm1_11, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7661 | | { 204 /* memb */, Hexagon::L4_ior_memopb_io, Convert__Reg1_2__u6_0Ext1_5__u5Imm1_11, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_0Ext, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7662 | | { 204 /* memb */, Hexagon::S2_storerbnew_pbr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_10, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7663 | | { 204 /* memb */, Hexagon::S4_storerb_ur, Convert__Reg1_2__u2Imm1_6__u6Ext1_9__Reg1_12, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7664 | | { 204 /* memb */, Hexagon::S2_storerb_pcr, Convert__Reg1_2__Tie0__Reg1_9__Reg1_13, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7665 | | { 204 /* memb */, Hexagon::S4_storerbnew_rr, Convert__Reg1_2__Reg1_4__u2Imm1_8__Reg1_11, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7666 | | { 204 /* memb */, Hexagon::S2_storerb_pci, Convert__Reg1_2__Tie0__s4_0Imm1_6__Reg1_10__Reg1_14, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7667 | | { 204 /* memb */, Hexagon::S4_storerbnew_ur, Convert__Reg1_2__u2Imm1_6__u6Ext1_9__Reg1_12, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7668 | | { 204 /* memb */, Hexagon::S2_storerbnew_pcr, Convert__Reg1_2__Tie0__Reg1_9__Reg1_13, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7669 | | { 204 /* memb */, Hexagon::S2_storerbnew_pci, Convert__Reg1_2__Tie0__s4_0Imm1_6__Reg1_10__Reg1_14, 0, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7670 | | { 209 /* memd */, Hexagon::S2_storerd_io, Convert__Reg1_2__imm_95_0__Reg1_5, 0, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7671 | | { 209 /* memd */, Hexagon::S2_storerdgp, Convert__u16_3Imm1_3__Reg1_6, 0, { MCK_memd, MCK__40_, MCK__35_, MCK_u16_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7672 | | { 209 /* memd */, Hexagon::S2_storerdabs, Convert__u32MustExt1_3__Reg1_6, 0, { MCK_memd, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7673 | | { 209 /* memd */, Hexagon::S2_storerdgp, Convert__u16_3Imm1_5__Reg1_8, 0, { MCK_memd, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7674 | | { 209 /* memd */, Hexagon::S2_storerd_io, Convert__Reg1_2__s11_3Ext1_5__Reg1_8, 0, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_3Ext, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7675 | | { 209 /* memd */, Hexagon::S2_storerd_pr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, 0, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7676 | | { 209 /* memd */, Hexagon::S4_storerd_ap, Convert__Reg1_2__u6Ext1_5__Reg1_8, 0, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7677 | | { 209 /* memd */, Hexagon::S2_storerd_pi, Convert__Reg1_2__Tie0__s4_3Imm1_6__Reg1_9, 0, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7678 | | { 209 /* memd */, Hexagon::S2_storerd_pbr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_10, 0, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7679 | | { 209 /* memd */, Hexagon::S4_storerd_rr, Convert__Reg1_2__Reg1_4__u2Imm1_8__Reg1_11, 0, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7680 | | { 209 /* memd */, Hexagon::S4_storerd_ur, Convert__Reg1_2__u2Imm1_6__u6Ext1_9__Reg1_12, 0, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7681 | | { 209 /* memd */, Hexagon::S2_storerd_pcr, Convert__Reg1_2__Tie0__Reg1_9__Reg1_13, 0, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7682 | | { 209 /* memd */, Hexagon::S2_storerd_pci, Convert__Reg1_2__Tie0__s4_3Imm1_6__Reg1_10__Reg1_14, 0, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_3Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7683 | | { 214 /* memd_locked */, Hexagon::S4_stored_locked, Convert__Reg1_3__Reg1_2__Reg1_6, 0, { MCK_memd_95_locked, MCK__40_, MCK_IntRegs, MCK_PredRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
7684 | | { 226 /* memh */, Hexagon::S2_storerh_io, Convert__Reg1_2__imm_95_0__Reg1_5, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7685 | | { 226 /* memh */, Hexagon::S2_storerhgp, Convert__u16_1Imm1_3__Reg1_6, 0, { MCK_memh, MCK__40_, MCK__35_, MCK_u16_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7686 | | { 226 /* memh */, Hexagon::S2_storerhabs, Convert__u32MustExt1_3__Reg1_6, 0, { MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7687 | | { 226 /* memh */, Hexagon::L4_and_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
7688 | | { 226 /* memh */, Hexagon::L4_add_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
7689 | | { 226 /* memh */, Hexagon::L4_sub_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
7690 | | { 226 /* memh */, Hexagon::S4_storeirh_io, Convert__Reg1_2__imm_95_0__s8Ext1_6, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s8Ext }, }, |
7691 | | { 226 /* memh */, Hexagon::L4_or_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
7692 | | { 226 /* memh */, Hexagon::L4_iadd_memoph_io, Convert__Reg1_2__imm_95_0__u5Imm1_7, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7693 | | { 226 /* memh */, Hexagon::L4_isub_memoph_io, Convert__Reg1_2__imm_95_0__u5Imm1_7, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7694 | | { 226 /* memh */, Hexagon::S2_storerf_io, Convert__Reg1_2__imm_95_0__Reg1_5, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7695 | | { 226 /* memh */, Hexagon::S2_storerhnew_io, Convert__Reg1_2__imm_95_0__Reg1_5, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7696 | | { 226 /* memh */, Hexagon::S2_storerfgp, Convert__u16_1Imm1_3__Reg1_6, 0, { MCK_memh, MCK__40_, MCK__35_, MCK_u16_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7697 | | { 226 /* memh */, Hexagon::S2_storerhnewgp, Convert__u32Imm1_3__Reg1_6, 0, { MCK_memh, MCK__40_, MCK__35_, MCK_u32Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7698 | | { 226 /* memh */, Hexagon::S2_storerfabs, Convert__u32MustExt1_3__Reg1_6, 0, { MCK_memh, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7699 | | { 226 /* memh */, Hexagon::S2_storerhgp, Convert__u16_1Imm1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7700 | | { 226 /* memh */, Hexagon::S2_storerh_io, Convert__Reg1_2__s11_1Ext1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_1Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7701 | | { 226 /* memh */, Hexagon::S2_storerh_pr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7702 | | { 226 /* memh */, Hexagon::S4_storerh_ap, Convert__Reg1_2__u6Ext1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7703 | | { 226 /* memh */, Hexagon::S2_storerhnewabs, Convert__u32Imm1_4__Reg1_7, 0, { MCK_memh, MCK__40_, MCK__35_, MCK__35_, MCK_u32Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7704 | | { 226 /* memh */, Hexagon::L4_iand_memoph_io, Convert__Reg1_2__imm_95_0__u5Imm1_8, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7705 | | { 226 /* memh */, Hexagon::L4_ior_memoph_io, Convert__Reg1_2__imm_95_0__u5Imm1_8, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7706 | | { 226 /* memh */, Hexagon::L4_and_memoph_io, Convert__Reg1_2__u6_1Ext1_5__Reg1_9, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
7707 | | { 226 /* memh */, Hexagon::L4_add_memoph_io, Convert__Reg1_2__u6_1Ext1_5__Reg1_9, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
7708 | | { 226 /* memh */, Hexagon::L4_sub_memoph_io, Convert__Reg1_2__u6_1Ext1_5__Reg1_9, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
7709 | | { 226 /* memh */, Hexagon::L4_or_memoph_io, Convert__Reg1_2__u6_1Ext1_5__Reg1_9, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
7710 | | { 226 /* memh */, Hexagon::S4_storeirh_io, Convert__Reg1_2__u6_1Imm1_5__s8Ext1_9, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s8Ext }, }, |
7711 | | { 226 /* memh */, Hexagon::S2_storerh_pi, Convert__Reg1_2__Tie0__s4_1Imm1_6__Reg1_9, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7712 | | { 226 /* memh */, Hexagon::S2_storerfgp, Convert__u16_1Imm1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7713 | | { 226 /* memh */, Hexagon::S2_storerhnewgp, Convert__u16_1Imm1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7714 | | { 226 /* memh */, Hexagon::S2_storerf_io, Convert__Reg1_2__s11_1Ext1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_1Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7715 | | { 226 /* memh */, Hexagon::S2_storerhnew_io, Convert__Reg1_2__s11_1Ext1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_1Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7716 | | { 226 /* memh */, Hexagon::L4_iadd_memoph_io, Convert__Reg1_2__u6_1Ext1_5__u5Imm1_10, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__43_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7717 | | { 226 /* memh */, Hexagon::L4_isub_memoph_io, Convert__Reg1_2__u6_1Ext1_5__u5Imm1_10, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__MINUS_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7718 | | { 226 /* memh */, Hexagon::S2_storerf_pr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7719 | | { 226 /* memh */, Hexagon::S2_storerhnew_pr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7720 | | { 226 /* memh */, Hexagon::S2_storerh_pbr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_10, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7721 | | { 226 /* memh */, Hexagon::S4_storerf_ap, Convert__Reg1_2__u6Ext1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7722 | | { 226 /* memh */, Hexagon::S4_storerhnew_ap, Convert__Reg1_2__u6Ext1_5__Reg1_8, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7723 | | { 226 /* memh */, Hexagon::S2_storerf_pi, Convert__Reg1_2__Tie0__s4_1Imm1_6__Reg1_9, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7724 | | { 226 /* memh */, Hexagon::S2_storerhnew_pi, Convert__Reg1_2__Tie0__s4_1Imm1_6__Reg1_9, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7725 | | { 226 /* memh */, Hexagon::S4_storerh_rr, Convert__Reg1_2__Reg1_4__u2Imm1_8__Reg1_11, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7726 | | { 226 /* memh */, Hexagon::L4_iand_memoph_io, Convert__Reg1_2__u6_1Ext1_5__u5Imm1_11, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7727 | | { 226 /* memh */, Hexagon::L4_ior_memoph_io, Convert__Reg1_2__u6_1Ext1_5__u5Imm1_11, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_1Ext, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7728 | | { 226 /* memh */, Hexagon::S2_storerf_pbr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_10, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7729 | | { 226 /* memh */, Hexagon::S2_storerhnew_pbr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_10, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7730 | | { 226 /* memh */, Hexagon::S4_storerh_ur, Convert__Reg1_2__u2Imm1_6__u6Ext1_9__Reg1_12, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7731 | | { 226 /* memh */, Hexagon::S2_storerh_pcr, Convert__Reg1_2__Tie0__Reg1_9__Reg1_13, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7732 | | { 226 /* memh */, Hexagon::S4_storerf_rr, Convert__Reg1_2__Reg1_4__u2Imm1_8__Reg1_11, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7733 | | { 226 /* memh */, Hexagon::S4_storerhnew_rr, Convert__Reg1_2__Reg1_4__u2Imm1_8__Reg1_11, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7734 | | { 226 /* memh */, Hexagon::S2_storerh_pci, Convert__Reg1_2__Tie0__s4_1Imm1_6__Reg1_10__Reg1_14, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7735 | | { 226 /* memh */, Hexagon::S4_storerf_ur, Convert__Reg1_2__u2Imm1_6__u6Ext1_9__Reg1_12, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7736 | | { 226 /* memh */, Hexagon::S4_storerhnew_ur, Convert__Reg1_2__u2Imm1_6__u6Ext1_9__Reg1_12, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7737 | | { 226 /* memh */, Hexagon::S2_storerf_pcr, Convert__Reg1_2__Tie0__Reg1_9__Reg1_13, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7738 | | { 226 /* memh */, Hexagon::S2_storerhnew_pcr, Convert__Reg1_2__Tie0__Reg1_9__Reg1_13, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7739 | | { 226 /* memh */, Hexagon::S2_storerf_pci, Convert__Reg1_2__Tie0__s4_1Imm1_6__Reg1_10__Reg1_14, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
7740 | | { 226 /* memh */, Hexagon::S2_storerhnew_pci, Convert__Reg1_2__Tie0__s4_1Imm1_6__Reg1_10__Reg1_14, 0, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7741 | | { 231 /* memw */, Hexagon::S2_storeri_io, Convert__Reg1_2__imm_95_0__Reg1_5, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7742 | | { 231 /* memw */, Hexagon::S2_storerigp, Convert__u16_2Imm1_3__Reg1_6, 0, { MCK_memw, MCK__40_, MCK__35_, MCK_u16_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7743 | | { 231 /* memw */, Hexagon::S2_storeriabs, Convert__u32MustExt1_3__Reg1_6, 0, { MCK_memw, MCK__40_, MCK__35_, MCK_u32MustExt, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7744 | | { 231 /* memw */, Hexagon::L4_and_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
7745 | | { 231 /* memw */, Hexagon::L4_add_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
7746 | | { 231 /* memw */, Hexagon::L4_sub_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
7747 | | { 231 /* memw */, Hexagon::S4_storeiri_io, Convert__Reg1_2__imm_95_0__s8Ext1_6, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__35_, MCK_s8Ext }, }, |
7748 | | { 231 /* memw */, Hexagon::L4_or_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
7749 | | { 231 /* memw */, Hexagon::L4_iadd_memopw_io, Convert__Reg1_2__imm_95_0__u5Imm1_7, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7750 | | { 231 /* memw */, Hexagon::L4_isub_memopw_io, Convert__Reg1_2__imm_95_0__u5Imm1_7, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7751 | | { 231 /* memw */, Hexagon::S2_storerinew_io, Convert__Reg1_2__imm_95_0__Reg1_5, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7752 | | { 231 /* memw */, Hexagon::S2_storerinewgp, Convert__u32Imm1_3__Reg1_6, 0, { MCK_memw, MCK__40_, MCK__35_, MCK_u32Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7753 | | { 231 /* memw */, Hexagon::S2_storerigp, Convert__u16_2Imm1_5__Reg1_8, 0, { MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7754 | | { 231 /* memw */, Hexagon::S2_storeri_io, Convert__Reg1_2__s11_2Ext1_5__Reg1_8, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_2Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7755 | | { 231 /* memw */, Hexagon::S2_storeri_pr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7756 | | { 231 /* memw */, Hexagon::S4_storeri_ap, Convert__Reg1_2__u6Ext1_5__Reg1_8, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7757 | | { 231 /* memw */, Hexagon::S2_storerinewabs, Convert__u32Imm1_4__Reg1_7, 0, { MCK_memw, MCK__40_, MCK__35_, MCK__35_, MCK_u32Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7758 | | { 231 /* memw */, Hexagon::L4_iand_memopw_io, Convert__Reg1_2__imm_95_0__u5Imm1_8, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7759 | | { 231 /* memw */, Hexagon::L4_ior_memopw_io, Convert__Reg1_2__imm_95_0__u5Imm1_8, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7760 | | { 231 /* memw */, Hexagon::L4_and_memopw_io, Convert__Reg1_2__u6_2Ext1_5__Reg1_9, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
7761 | | { 231 /* memw */, Hexagon::L4_add_memopw_io, Convert__Reg1_2__u6_2Ext1_5__Reg1_9, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
7762 | | { 231 /* memw */, Hexagon::L4_sub_memopw_io, Convert__Reg1_2__u6_2Ext1_5__Reg1_9, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
7763 | | { 231 /* memw */, Hexagon::L4_or_memopw_io, Convert__Reg1_2__u6_2Ext1_5__Reg1_9, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
7764 | | { 231 /* memw */, Hexagon::S4_storeiri_io, Convert__Reg1_2__u6_2Imm1_5__s8Ext1_9, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__35_, MCK_s8Ext }, }, |
7765 | | { 231 /* memw */, Hexagon::S2_storeri_pi, Convert__Reg1_2__Tie0__s4_2Imm1_6__Reg1_9, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7766 | | { 231 /* memw */, Hexagon::S2_storerinewgp, Convert__u16_2Imm1_5__Reg1_8, 0, { MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__35_, MCK_u16_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7767 | | { 231 /* memw */, Hexagon::S2_storerinew_io, Convert__Reg1_2__s11_2Ext1_5__Reg1_8, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s11_2Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7768 | | { 231 /* memw */, Hexagon::L4_iadd_memopw_io, Convert__Reg1_2__u6_2Ext1_5__u5Imm1_10, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__43_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7769 | | { 231 /* memw */, Hexagon::L4_isub_memopw_io, Convert__Reg1_2__u6_2Ext1_5__u5Imm1_10, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__MINUS_, MCK__61_, MCK__35_, MCK_u5Imm }, }, |
7770 | | { 231 /* memw */, Hexagon::S2_storerinew_pr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7771 | | { 231 /* memw */, Hexagon::S2_storeri_pbr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_10, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7772 | | { 231 /* memw */, Hexagon::S4_storerinew_ap, Convert__Reg1_2__u6Ext1_5__Reg1_8, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__61_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7773 | | { 231 /* memw */, Hexagon::S2_storerinew_pi, Convert__Reg1_2__Tie0__s4_2Imm1_6__Reg1_9, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7774 | | { 231 /* memw */, Hexagon::S4_storeri_rr, Convert__Reg1_2__Reg1_4__u2Imm1_8__Reg1_11, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7775 | | { 231 /* memw */, Hexagon::L4_iand_memopw_io, Convert__Reg1_2__u6_2Ext1_5__u5Imm1_11, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7776 | | { 231 /* memw */, Hexagon::L4_ior_memopw_io, Convert__Reg1_2__u6_2Ext1_5__u5Imm1_11, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_u6_2Ext, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__35_, MCK_u5Imm, MCK__41_ }, }, |
7777 | | { 231 /* memw */, Hexagon::S2_storerinew_pbr, Convert__Reg1_2__Tie0__Reg1_5__Reg1_10, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7778 | | { 231 /* memw */, Hexagon::S4_storeri_ur, Convert__Reg1_2__u2Imm1_6__u6Ext1_9__Reg1_12, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7779 | | { 231 /* memw */, Hexagon::S2_storeri_pcr, Convert__Reg1_2__Tie0__Reg1_9__Reg1_13, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7780 | | { 231 /* memw */, Hexagon::S4_storerinew_rr, Convert__Reg1_2__Reg1_4__u2Imm1_8__Reg1_11, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7781 | | { 231 /* memw */, Hexagon::S2_storeri_pci, Convert__Reg1_2__Tie0__s4_2Imm1_6__Reg1_10__Reg1_14, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7782 | | { 231 /* memw */, Hexagon::S4_storerinew_ur, Convert__Reg1_2__u2Imm1_6__u6Ext1_9__Reg1_12, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__35_, MCK_u2Imm, MCK__43_, MCK__35_, MCK_u6Ext, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7783 | | { 231 /* memw */, Hexagon::S2_storerinew_pcr, Convert__Reg1_2__Tie0__Reg1_9__Reg1_13, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7784 | | { 231 /* memw */, Hexagon::S2_storerinew_pci, Convert__Reg1_2__Tie0__s4_2Imm1_6__Reg1_10__Reg1_14, 0, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
7785 | | { 236 /* memw_locked */, Hexagon::S2_storew_locked, Convert__Reg1_3__Reg1_2__Reg1_6, 0, { MCK_memw_95_locked, MCK__40_, MCK_IntRegs, MCK_PredRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
7786 | | { 248 /* nop */, Hexagon::A2_nop, Convert_NoOperands, 0, { MCK_nop }, }, |
7787 | | { 252 /* p0 */, Hexagon::J4_tstbit0_tp0_jump_nt, Convert__Reg1_4__Imm1_18, 0, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7788 | | { 252 /* p0 */, Hexagon::J4_tstbit0_tp0_jump_t, Convert__Reg1_4__Imm1_18, 0, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7789 | | { 252 /* p0 */, Hexagon::J4_cmpeq_tp0_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7790 | | { 252 /* p0 */, Hexagon::J4_cmpeq_tp0_jump_t, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7791 | | { 252 /* p0 */, Hexagon::J4_cmpgt_tp0_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7792 | | { 252 /* p0 */, Hexagon::J4_cmpgt_tp0_jump_t, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7793 | | { 252 /* p0 */, Hexagon::J4_cmpgtu_tp0_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7794 | | { 252 /* p0 */, Hexagon::J4_cmpgtu_tp0_jump_t, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7795 | | { 252 /* p0 */, Hexagon::J4_tstbit0_fp0_jump_nt, Convert__Reg1_4__Imm1_19, 0, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7796 | | { 252 /* p0 */, Hexagon::J4_tstbit0_fp0_jump_t, Convert__Reg1_4__Imm1_19, 0, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7797 | | { 252 /* p0 */, Hexagon::J4_cmpeqn1_tp0_jump_nt, Convert__Reg1_6__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7798 | | { 252 /* p0 */, Hexagon::J4_cmpeqn1_tp0_jump_t, Convert__Reg1_6__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7799 | | { 252 /* p0 */, Hexagon::J4_cmpeqi_tp0_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7800 | | { 252 /* p0 */, Hexagon::J4_cmpeqi_tp0_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7801 | | { 252 /* p0 */, Hexagon::J4_cmpeq_fp0_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7802 | | { 252 /* p0 */, Hexagon::J4_cmpeq_fp0_jump_t, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7803 | | { 252 /* p0 */, Hexagon::J4_cmpgtn1_tp0_jump_nt, Convert__Reg1_6__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7804 | | { 252 /* p0 */, Hexagon::J4_cmpgtn1_tp0_jump_t, Convert__Reg1_6__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7805 | | { 252 /* p0 */, Hexagon::J4_cmpgti_tp0_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7806 | | { 252 /* p0 */, Hexagon::J4_cmpgti_tp0_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7807 | | { 252 /* p0 */, Hexagon::J4_cmpgt_fp0_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7808 | | { 252 /* p0 */, Hexagon::J4_cmpgt_fp0_jump_t, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7809 | | { 252 /* p0 */, Hexagon::J4_cmpgtui_tp0_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7810 | | { 252 /* p0 */, Hexagon::J4_cmpgtui_tp0_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7811 | | { 252 /* p0 */, Hexagon::J4_cmpgtu_fp0_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7812 | | { 252 /* p0 */, Hexagon::J4_cmpgtu_fp0_jump_t, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7813 | | { 252 /* p0 */, Hexagon::J4_cmpeqn1_fp0_jump_nt, Convert__Reg1_6__Imm1_21, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7814 | | { 252 /* p0 */, Hexagon::J4_cmpeqn1_fp0_jump_t, Convert__Reg1_6__Imm1_21, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7815 | | { 252 /* p0 */, Hexagon::J4_cmpeqi_fp0_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7816 | | { 252 /* p0 */, Hexagon::J4_cmpeqi_fp0_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7817 | | { 252 /* p0 */, Hexagon::J4_cmpgtn1_fp0_jump_nt, Convert__Reg1_6__Imm1_21, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7818 | | { 252 /* p0 */, Hexagon::J4_cmpgtn1_fp0_jump_t, Convert__Reg1_6__Imm1_21, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7819 | | { 252 /* p0 */, Hexagon::J4_cmpgti_fp0_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7820 | | { 252 /* p0 */, Hexagon::J4_cmpgti_fp0_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7821 | | { 252 /* p0 */, Hexagon::J4_cmpgtui_fp0_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7822 | | { 252 /* p0 */, Hexagon::J4_cmpgtui_fp0_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7823 | | { 255 /* p1 */, Hexagon::J4_tstbit0_tp1_jump_nt, Convert__Reg1_4__Imm1_18, 0, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7824 | | { 255 /* p1 */, Hexagon::J4_tstbit0_tp1_jump_t, Convert__Reg1_4__Imm1_18, 0, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7825 | | { 255 /* p1 */, Hexagon::J4_cmpeq_tp1_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7826 | | { 255 /* p1 */, Hexagon::J4_cmpeq_tp1_jump_t, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7827 | | { 255 /* p1 */, Hexagon::J4_cmpgt_tp1_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7828 | | { 255 /* p1 */, Hexagon::J4_cmpgt_tp1_jump_t, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7829 | | { 255 /* p1 */, Hexagon::J4_cmpgtu_tp1_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7830 | | { 255 /* p1 */, Hexagon::J4_cmpgtu_tp1_jump_t, Convert__Reg1_6__Reg1_7__Imm1_19, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7831 | | { 255 /* p1 */, Hexagon::J4_tstbit0_fp1_jump_nt, Convert__Reg1_4__Imm1_19, 0, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7832 | | { 255 /* p1 */, Hexagon::J4_tstbit0_fp1_jump_t, Convert__Reg1_4__Imm1_19, 0, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__35_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7833 | | { 255 /* p1 */, Hexagon::J4_cmpeqn1_tp1_jump_nt, Convert__Reg1_6__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7834 | | { 255 /* p1 */, Hexagon::J4_cmpeqn1_tp1_jump_t, Convert__Reg1_6__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7835 | | { 255 /* p1 */, Hexagon::J4_cmpeqi_tp1_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7836 | | { 255 /* p1 */, Hexagon::J4_cmpeqi_tp1_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7837 | | { 255 /* p1 */, Hexagon::J4_cmpeq_fp1_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7838 | | { 255 /* p1 */, Hexagon::J4_cmpeq_fp1_jump_t, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7839 | | { 255 /* p1 */, Hexagon::J4_cmpgtn1_tp1_jump_nt, Convert__Reg1_6__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7840 | | { 255 /* p1 */, Hexagon::J4_cmpgtn1_tp1_jump_t, Convert__Reg1_6__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7841 | | { 255 /* p1 */, Hexagon::J4_cmpgti_tp1_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7842 | | { 255 /* p1 */, Hexagon::J4_cmpgti_tp1_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7843 | | { 255 /* p1 */, Hexagon::J4_cmpgt_fp1_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7844 | | { 255 /* p1 */, Hexagon::J4_cmpgt_fp1_jump_t, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7845 | | { 255 /* p1 */, Hexagon::J4_cmpgtui_tp1_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7846 | | { 255 /* p1 */, Hexagon::J4_cmpgtui_tp1_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7847 | | { 255 /* p1 */, Hexagon::J4_cmpgtu_fp1_jump_nt, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7848 | | { 255 /* p1 */, Hexagon::J4_cmpgtu_fp1_jump_t, Convert__Reg1_6__Reg1_7__Imm1_20, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7849 | | { 255 /* p1 */, Hexagon::J4_cmpeqn1_fp1_jump_nt, Convert__Reg1_6__Imm1_21, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7850 | | { 255 /* p1 */, Hexagon::J4_cmpeqn1_fp1_jump_t, Convert__Reg1_6__Imm1_21, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7851 | | { 255 /* p1 */, Hexagon::J4_cmpeqi_fp1_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7852 | | { 255 /* p1 */, Hexagon::J4_cmpeqi_fp1_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7853 | | { 255 /* p1 */, Hexagon::J4_cmpgtn1_fp1_jump_nt, Convert__Reg1_6__Imm1_21, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7854 | | { 255 /* p1 */, Hexagon::J4_cmpgtn1_fp1_jump_t, Convert__Reg1_6__Imm1_21, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK__MINUS_1, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7855 | | { 255 /* p1 */, Hexagon::J4_cmpgti_fp1_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7856 | | { 255 /* p1 */, Hexagon::J4_cmpgti_fp1_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7857 | | { 255 /* p1 */, Hexagon::J4_cmpgtui_fp1_jump_nt, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_Imm }, }, |
7858 | | { 255 /* p1 */, Hexagon::J4_cmpgtui_fp1_jump_t, Convert__Reg1_6__u5Imm1_8__Imm1_21, 0, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__35_, MCK_u5Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_Imm }, }, |
7859 | | { 258 /* p3 */, Hexagon::J2_ploop1sr, Convert__Imm1_4__Reg1_5, 0, { MCK_P3, MCK__61_, MCK_sp1loop0, MCK__40_, MCK_Imm, MCK_IntRegs, MCK__41_ }, }, |
7860 | | { 258 /* p3 */, Hexagon::J2_ploop2sr, Convert__Imm1_4__Reg1_5, 0, { MCK_P3, MCK__61_, MCK_sp2loop0, MCK__40_, MCK_Imm, MCK_IntRegs, MCK__41_ }, }, |
7861 | | { 258 /* p3 */, Hexagon::J2_ploop3sr, Convert__Imm1_4__Reg1_5, 0, { MCK_P3, MCK__61_, MCK_sp3loop0, MCK__40_, MCK_Imm, MCK_IntRegs, MCK__41_ }, }, |
7862 | | { 258 /* p3 */, Hexagon::J2_ploop1si, Convert__Imm1_4__u10Imm1_6, 0, { MCK_P3, MCK__61_, MCK_sp1loop0, MCK__40_, MCK_Imm, MCK__35_, MCK_u10Imm, MCK__41_ }, }, |
7863 | | { 258 /* p3 */, Hexagon::J2_ploop2si, Convert__Imm1_4__u10Imm1_6, 0, { MCK_P3, MCK__61_, MCK_sp2loop0, MCK__40_, MCK_Imm, MCK__35_, MCK_u10Imm, MCK__41_ }, }, |
7864 | | { 258 /* p3 */, Hexagon::J2_ploop3si, Convert__Imm1_4__u10Imm1_6, 0, { MCK_P3, MCK__61_, MCK_sp3loop0, MCK__40_, MCK_Imm, MCK__35_, MCK_u10Imm, MCK__41_ }, }, |
7865 | | { 261 /* syncht */, Hexagon::Y2_syncht, Convert_NoOperands, 0, { MCK_syncht }, }, |
7866 | | { 268 /* trace */, Hexagon::Y4_trace, Convert__Reg1_2, 0, { MCK_trace, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
7867 | | { 274 /* vdeal */, Hexagon::V6_vdeal, Convert__Reg1_2__Reg1_3__Tie0__Tie1__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_vdeal, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK_IntRegs, MCK__41_ }, }, |
7868 | | { 280 /* vhist */, Hexagon::V6_vhist, Convert_NoOperands, Feature_HasV60T|Feature_UseHVX, { MCK_vhist }, }, |
7869 | | { 280 /* vhist */, Hexagon::V6_vhistq, Convert__Reg1_2, Feature_HasV60T|Feature_UseHVX, { MCK_vhist, MCK__40_, MCK_VecPredRegs, MCK__41_ }, }, |
7870 | | { 286 /* vmem */, Hexagon::V6_vS32b_ai, Convert__Reg1_2__s4_6Imm1_5__Reg1_8, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7871 | | { 286 /* vmem */, Hexagon::V6_vS32b_ppu, Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7872 | | { 286 /* vmem */, Hexagon::V6_vS32b_pi, Convert__Reg1_2__Tie0__s3_6Imm1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7873 | | { 286 /* vmem */, Hexagon::V6_vS32b_nt_ai, Convert__Reg1_2__s4_6Imm1_5__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7874 | | { 286 /* vmem */, Hexagon::V6_vS32b_new_ai, Convert__Reg1_2__s4_6Imm1_5__Reg1_8, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7875 | | { 286 /* vmem */, Hexagon::V6_vS32b_nt_ppu, Convert__Reg1_2__Tie0__Reg1_5__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7876 | | { 286 /* vmem */, Hexagon::V6_vS32b_new_ppu, Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7877 | | { 286 /* vmem */, Hexagon::V6_vS32b_nt_pi, Convert__Reg1_2__Tie0__s3_6Imm1_6__Reg1_11, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs }, }, |
7878 | | { 286 /* vmem */, Hexagon::V6_vS32b_new_pi, Convert__Reg1_2__Tie0__s3_6Imm1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7879 | | { 286 /* vmem */, Hexagon::V6_vS32b_nt_new_ai, Convert__Reg1_2__s4_6Imm1_5__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7880 | | { 286 /* vmem */, Hexagon::V6_vS32b_nt_new_ppu, Convert__Reg1_2__Tie0__Reg1_5__Reg1_10, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7881 | | { 286 /* vmem */, Hexagon::V6_vS32b_nt_new_pi, Convert__Reg1_2__Tie0__s3_6Imm1_6__Reg1_11, Feature_HasV60T|Feature_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_VectorRegs, MCK__DOT_, MCK_new }, }, |
7882 | | { 291 /* vmemu */, Hexagon::V6_vS32Ub_ai, Convert__Reg1_2__s4_6Imm1_5__Reg1_8, Feature_HasV60T|Feature_UseHVX, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7883 | | { 291 /* vmemu */, Hexagon::V6_vS32Ub_ppu, Convert__Reg1_2__Tie0__Reg1_5__Reg1_8, Feature_HasV60T|Feature_UseHVX, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7884 | | { 291 /* vmemu */, Hexagon::V6_vS32Ub_pi, Convert__Reg1_2__Tie0__s3_6Imm1_6__Reg1_9, Feature_HasV60T|Feature_UseHVX, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__35_, MCK_s3_6Imm, MCK__41_, MCK__61_, MCK_VectorRegs }, }, |
7885 | | { 297 /* vshuff */, Hexagon::V6_vshuff, Convert__Reg1_2__Reg1_3__Tie0__Tie1__Reg1_4, Feature_HasV60T|Feature_UseHVX, { MCK_vshuff, MCK__40_, MCK_VectorRegs, MCK_VectorRegs, MCK_IntRegs, MCK__41_ }, }, |
7886 | | { 304 /* vvmem */, Hexagon::STrivv_indexed_128B, Convert__Reg1_2__Imm1_5__Reg1_8, Feature_HasV60T|Feature_UseHVXDbl, { MCK_vvmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_Imm, MCK__41_, MCK__61_, MCK_VecDblRegs }, }, |
7887 | | { 304 /* vvmem */, Hexagon::STrivv_indexed, Convert__Reg1_2__s4_6Imm1_5__Reg1_8, Feature_HasV60T, { MCK_vvmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__35_, MCK_s4_6Imm, MCK__41_, MCK__61_, MCK_VecDblRegs }, }, |
7888 | | }; |
7889 | | |
7890 | | unsigned HexagonAsmParser:: |
7891 | | MatchInstructionImpl(const OperandVector &Operands, |
7892 | | MCInst &Inst, uint64_t &ErrorInfo, |
7893 | 6.90k | bool matchingInlineAsm, unsigned VariantID) { |
7894 | | // Eliminate obvious mismatches. |
7895 | 6.90k | if (Operands.size() > 24) { |
7896 | 469 | ErrorInfo = 24; |
7897 | 469 | return Match_InvalidOperand; |
7898 | 469 | } |
7899 | | |
7900 | | // Get the current feature set. |
7901 | 6.43k | uint64_t AvailableFeatures = getAvailableFeatures(); |
7902 | | |
7903 | | // Get the instruction mnemonic, which is the first token. |
7904 | 6.43k | StringRef Mnemonic; |
7905 | 6.43k | if (Operands[0]->isToken()) |
7906 | 3.17k | Mnemonic = ((HexagonOperand&)*Operands[0]).getToken(); |
7907 | | |
7908 | | // Some state to try to produce better error messages. |
7909 | 6.43k | bool HadMatchOtherThanFeatures = false; |
7910 | 6.43k | bool HadMatchOtherThanPredicate = false; |
7911 | 6.43k | unsigned RetCode = Match_InvalidOperand; |
7912 | 6.43k | uint64_t MissingFeatures = ~0ULL; |
7913 | | // Set ErrorInfo to the operand that mismatches if it is |
7914 | | // wrong for all instances of the instruction. |
7915 | 6.43k | ErrorInfo = ~0ULL; |
7916 | | // Find the appropriate table for this asm variant. |
7917 | 6.43k | const MatchEntry *Start, *End; |
7918 | 6.43k | switch (VariantID) { |
7919 | 0 | default: llvm_unreachable("invalid variant!"); |
7920 | 6.43k | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
7921 | 6.43k | } |
7922 | | // Search the table. |
7923 | 6.43k | auto MnemonicRange = std::make_pair(Start, End); |
7924 | 6.43k | unsigned SIndex = Mnemonic.empty() ? 0 : 1; |
7925 | 6.43k | if (!Mnemonic.empty()) |
7926 | 3.17k | MnemonicRange = std::equal_range(Start, End, Mnemonic.lower(), LessOpcode()); |
7927 | | |
7928 | | // Return a more specific error code if no mnemonics match. |
7929 | 6.43k | if (MnemonicRange.first == MnemonicRange.second) |
7930 | 576 | return Match_MnemonicFail; |
7931 | | |
7932 | 5.86k | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
7933 | 487k | it != ie; ++it) { |
7934 | 487k | bool OperandsValid = true; |
7935 | 602k | for (unsigned i = SIndex; i != 24; ++i) { |
7936 | 602k | auto Formal = static_cast<MatchClassKind>(it->Classes[i]); |
7937 | 602k | if (i >= Operands.size()) { |
7938 | 6.91k | OperandsValid = (Formal == InvalidMatchClass); |
7939 | 6.91k | if (!OperandsValid) ErrorInfo = i; |
7940 | 6.91k | break; |
7941 | 6.91k | } |
7942 | 595k | MCParsedAsmOperand &Actual = *Operands[i]; |
7943 | 595k | unsigned Diag = validateOperandClass(Actual, Formal); |
7944 | 595k | if (Diag == Match_Success) |
7945 | 115k | continue; |
7946 | | // If the generic handler indicates an invalid operand |
7947 | | // failure, check for a special case. |
7948 | 480k | if (Diag == Match_InvalidOperand) { |
7949 | 480k | Diag = validateTargetOperandClass(Actual, Formal); |
7950 | 480k | if (Diag == Match_Success) |
7951 | 22 | continue; |
7952 | 480k | } |
7953 | | // If this operand is broken for all of the instances of this |
7954 | | // mnemonic, keep track of it so we can report loc info. |
7955 | | // If we already had a match that only failed due to a |
7956 | | // target predicate, that diagnostic is preferred. |
7957 | 480k | if (!HadMatchOtherThanPredicate && |
7958 | 480k | (it == MnemonicRange.first || ErrorInfo <= i)) { |
7959 | 60.3k | ErrorInfo = i; |
7960 | | // InvalidOperand is the default. Prefer specificity. |
7961 | 60.3k | if (Diag != Match_InvalidOperand) |
7962 | 0 | RetCode = Diag; |
7963 | 60.3k | } |
7964 | | // Otherwise, just reject this instance of the mnemonic. |
7965 | 480k | OperandsValid = false; |
7966 | 480k | break; |
7967 | 480k | } |
7968 | | |
7969 | 487k | if (!OperandsValid) continue; |
7970 | 5.63k | if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) { |
7971 | 0 | HadMatchOtherThanFeatures = true; |
7972 | 0 | uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures; |
7973 | 0 | if (countPopulation(NewMissingFeatures) <= |
7974 | 0 | countPopulation(MissingFeatures)) |
7975 | 0 | MissingFeatures = NewMissingFeatures; |
7976 | 0 | continue; |
7977 | 0 | } |
7978 | | |
7979 | 5.63k | Inst.clear(); |
7980 | | |
7981 | 5.63k | if (matchingInlineAsm) { |
7982 | 0 | Inst.setOpcode(it->Opcode); |
7983 | 0 | convertToMapAndConstraints(it->ConvertFn, Operands); |
7984 | 0 | return Match_Success; |
7985 | 0 | } |
7986 | | |
7987 | | // We have selected a definite instruction, convert the parsed |
7988 | | // operands into the appropriate MCInst. |
7989 | 5.63k | convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); |
7990 | | |
7991 | | // We have a potential match. Check the target predicate to |
7992 | | // handle any context sensitive constraints. |
7993 | 5.63k | unsigned MatchResult; |
7994 | 5.63k | if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { |
7995 | 0 | Inst.clear(); |
7996 | 0 | RetCode = MatchResult; |
7997 | 0 | HadMatchOtherThanPredicate = true; |
7998 | 0 | continue; |
7999 | 0 | } |
8000 | | |
8001 | 5.63k | return Match_Success; |
8002 | 5.63k | } |
8003 | | |
8004 | | // Okay, we had no match. Try to return a useful error code. |
8005 | 229 | if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) |
8006 | 229 | return RetCode; |
8007 | | |
8008 | | // Missing feature matches return which features were missing |
8009 | 0 | ErrorInfo = MissingFeatures; |
8010 | 0 | return Match_MissingFeature; |
8011 | 229 | } |
8012 | | |
8013 | | #endif // GET_MATCHER_IMPLEMENTATION |
8014 | | |