/src/keystone/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
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1 | | //===-- HexagonMCCodeEmitter.h - Hexagon Target Descriptions ----*- C++ -*-===// |
2 | | // |
3 | | // The LLVM Compiler Infrastructure |
4 | | // |
5 | | // This file is distributed under the University of Illinois Open Source |
6 | | // License. See LICENSE.TXT for details. |
7 | | // |
8 | | //===----------------------------------------------------------------------===// |
9 | | /// |
10 | | /// \file |
11 | | /// \brief Definition for classes that emit Hexagon machine code from MCInsts |
12 | | /// |
13 | | //===----------------------------------------------------------------------===// |
14 | | |
15 | | #ifndef HEXAGONMCCODEEMITTER_H |
16 | | #define HEXAGONMCCODEEMITTER_H |
17 | | |
18 | | #include "llvm/MC/MCCodeEmitter.h" |
19 | | #include "llvm/MC/MCExpr.h" |
20 | | #include "llvm/MC/MCInst.h" |
21 | | #include "llvm/MC/MCInstrInfo.h" |
22 | | #include "llvm/MC/MCRegisterInfo.h" |
23 | | #include "llvm/MC/MCSubtargetInfo.h" |
24 | | #include "llvm/Support/raw_ostream.h" |
25 | | |
26 | | namespace llvm_ks { |
27 | | |
28 | | class HexagonMCCodeEmitter : public MCCodeEmitter { |
29 | | MCContext &MCT; |
30 | | MCInstrInfo const &MCII; |
31 | | std::unique_ptr<unsigned> Addend; |
32 | | std::unique_ptr<bool> Extended; |
33 | | std::unique_ptr<MCInst const *> CurrentBundle; |
34 | | mutable unsigned KsError; |
35 | | |
36 | | // helper routine for getMachineOpValue() |
37 | | unsigned getExprOpValue(const MCInst &MI, const MCOperand &MO, |
38 | | const MCExpr *ME, SmallVectorImpl<MCFixup> &Fixups, |
39 | | const MCSubtargetInfo &STI) const; |
40 | | |
41 | | public: |
42 | | HexagonMCCodeEmitter(MCInstrInfo const &aMII, MCContext &aMCT); |
43 | | |
44 | 3.95k | void setError(unsigned E) const { KsError = E; } |
45 | 13.4k | unsigned getError() const { return KsError; } |
46 | | |
47 | | // Return parse bits for instruction `MCI' inside bundle `MCB' |
48 | | uint32_t parseBits(size_t Instruction, size_t Last, MCInst const &MCB, |
49 | | MCInst const &MCI) const; |
50 | | |
51 | | void encodeInstruction(MCInst &MI, raw_ostream &OS, |
52 | | SmallVectorImpl<MCFixup> &Fixups, |
53 | | MCSubtargetInfo const &STI, |
54 | | unsigned int &KsError) const override; |
55 | | |
56 | | void EncodeSingleInstruction(const MCInst &MI, raw_ostream &OS, |
57 | | SmallVectorImpl<MCFixup> &Fixups, |
58 | | const MCSubtargetInfo &STI, |
59 | | uint32_t Parse, size_t Index) const; |
60 | | |
61 | | // \brief TableGen'erated function for getting the |
62 | | // binary encoding for an instruction. |
63 | | uint64_t getBinaryCodeForInstr(MCInst const &MI, |
64 | | SmallVectorImpl<MCFixup> &Fixups, |
65 | | MCSubtargetInfo const &STI) const; |
66 | | |
67 | | /// \brief Return binary encoding of operand. |
68 | | unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO, |
69 | | SmallVectorImpl<MCFixup> &Fixups, |
70 | | MCSubtargetInfo const &STI) const; |
71 | | }; // class HexagonMCCodeEmitter |
72 | | |
73 | | } // namespace llvm_ks |
74 | | |
75 | | #endif /* HEXAGONMCCODEEMITTER_H */ |