/src/keystone/llvm/lib/Target/SystemZ/SystemZGenAsmMatcher.inc
Line | Count | Source |
1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* Assembly Matcher Source Fragment *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* *| |
7 | | \*===----------------------------------------------------------------------===*/ |
8 | | |
9 | | |
10 | | #ifdef GET_ASSEMBLER_HEADER |
11 | | #undef GET_ASSEMBLER_HEADER |
12 | | // This should be included into the middle of the declaration of |
13 | | // your subclasses implementation of MCTargetAsmParser. |
14 | | uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const; |
15 | | void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
16 | | const OperandVector &Operands); |
17 | | void convertToMapAndConstraints(unsigned Kind, |
18 | | const OperandVector &Operands) override; |
19 | | unsigned MatchInstructionImpl(const OperandVector &Operands, |
20 | | MCInst &Inst, |
21 | | uint64_t &ErrorInfo, bool matchingInlineAsm, |
22 | | unsigned VariantID = 0); |
23 | | |
24 | | enum OperandMatchResultTy { |
25 | | MatchOperand_Success, // operand matched successfully |
26 | | MatchOperand_NoMatch, // operand did not match |
27 | | MatchOperand_ParseFail // operand matched but had errors |
28 | | }; |
29 | | OperandMatchResultTy MatchOperandParserImpl( |
30 | | OperandVector &Operands, |
31 | | StringRef Mnemonic, unsigned int &ErrorCode); |
32 | | OperandMatchResultTy tryCustomParseOperand( |
33 | | OperandVector &Operands, |
34 | | unsigned MCK, unsigned int &ErrorCode); |
35 | | |
36 | | #endif // GET_ASSEMBLER_HEADER_INFO |
37 | | |
38 | | |
39 | | #ifdef GET_OPERAND_DIAGNOSTIC_TYPES |
40 | | #undef GET_OPERAND_DIAGNOSTIC_TYPES |
41 | | |
42 | | #endif // GET_OPERAND_DIAGNOSTIC_TYPES |
43 | | |
44 | | |
45 | | #ifdef GET_REGISTER_MATCHER |
46 | | #undef GET_REGISTER_MATCHER |
47 | | |
48 | | // Flags for subtarget features that participate in instruction matching. |
49 | | enum SubtargetFeatureFlag : uint16_t { |
50 | | Feature_FeatureDistinctOps = (1ULL << 0), |
51 | | Feature_FeatureLoadStoreOnCond = (1ULL << 5), |
52 | | Feature_FeatureHighWord = (1ULL << 3), |
53 | | Feature_FeatureFPExtension = (1ULL << 1), |
54 | | Feature_FeaturePopulationCount = (1ULL << 7), |
55 | | Feature_FeatureFastSerialization = (1ULL << 2), |
56 | | Feature_FeatureInterlockedAccess1 = (1ULL << 4), |
57 | | Feature_FeatureMiscellaneousExtensions = (1ULL << 6), |
58 | | Feature_FeatureTransactionalExecution = (1ULL << 9), |
59 | | Feature_FeatureProcessorAssist = (1ULL << 8), |
60 | | Feature_FeatureVector = (1ULL << 10), |
61 | | Feature_None = 0 |
62 | | }; |
63 | | |
64 | | #endif // GET_REGISTER_MATCHER |
65 | | |
66 | | #ifdef GET_MATCHER_IMPLEMENTATION |
67 | | #undef GET_MATCHER_IMPLEMENTATION |
68 | | |
69 | | namespace { |
70 | | enum OperatorConversionKind { |
71 | | CVT_Done, |
72 | | CVT_Reg, |
73 | | CVT_Tied, |
74 | | CVT_95_addRegOperands, |
75 | | CVT_95_addBDXAddrOperands, |
76 | | CVT_95_addImmOperands, |
77 | | CVT_95_addBDAddrOperands, |
78 | | CVT_95_addImmTLSOperands, |
79 | | CVT_95_addBDLAddrOperands, |
80 | | CVT_95_addAccessRegOperands, |
81 | | CVT_imm_95_0, |
82 | | CVT_95_addBDVAddrOperands, |
83 | | CVT_NUM_CONVERTERS |
84 | | }; |
85 | | |
86 | | enum InstructionConversionKind { |
87 | | Convert__GR321_0__Tie0__BDXAddr64Disp123_1, |
88 | | Convert__FP641_0__Tie0__BDXAddr64Disp123_1, |
89 | | Convert__FP641_0__Tie0__FP641_1, |
90 | | Convert__FP321_0__Tie0__BDXAddr64Disp123_1, |
91 | | Convert__FP321_0__Tie0__FP321_1, |
92 | | Convert__GR321_0__Tie0__S32Imm1_1, |
93 | | Convert__GR641_0__Tie0__BDXAddr64Disp203_1, |
94 | | Convert__GR641_0__Tie0__S32Imm1_1, |
95 | | Convert__GR641_0__Tie0__GR321_1, |
96 | | Convert__GR641_0__Tie0__S16Imm1_1, |
97 | | Convert__GR641_0__GR641_1__S16Imm1_2, |
98 | | Convert__GR641_0__Tie0__GR641_1, |
99 | | Convert__GR641_0__GR641_1__GR641_2, |
100 | | Convert__BDAddr64Disp202_0__S8Imm1_1, |
101 | | Convert__GR321_0__Tie0__S16Imm1_1, |
102 | | Convert__GR321_0__GR321_1__S16Imm1_2, |
103 | | Convert__GR321_0__Tie0__BDXAddr64Disp203_1, |
104 | | Convert__GRH321_0__Tie0__S32Imm1_1, |
105 | | Convert__GR321_0__Tie0__GR321_1, |
106 | | Convert__GR321_0__Tie0__U32Imm1_1, |
107 | | Convert__GR641_0__Tie0__U32Imm1_1, |
108 | | Convert__GR321_0__GR321_1__GR321_2, |
109 | | Convert__FP1281_0__Tie0__FP1281_1, |
110 | | Convert__GR641_0__ADDR641_1, |
111 | | Convert__U4Imm1_0__GR641_1, |
112 | | Convert__ADDR641_0, |
113 | | Convert__GR641_0__PCRelTLS162_1, |
114 | | Convert__GR641_0__PCRelTLS322_1, |
115 | | Convert__U4Imm1_0__PCRel161_1, |
116 | | Convert__U4Imm1_0__PCRel321_1, |
117 | | Convert__GR321_0__Tie0__PCRel161_1, |
118 | | Convert__GR641_0__Tie0__PCRel161_1, |
119 | | Convert__GR321_0__BDXAddr64Disp123_1, |
120 | | Convert__FP641_0__BDXAddr64Disp123_1, |
121 | | Convert__FP641_0__FP641_1, |
122 | | Convert__FP641_0__GR321_1, |
123 | | Convert__FP641_0__GR641_1, |
124 | | Convert__FP641_0__U4Imm1_1__GR321_2__U4Imm1_3, |
125 | | Convert__FP641_0__U4Imm1_1__GR641_2__U4Imm1_3, |
126 | | Convert__FP321_0__BDXAddr64Disp123_1, |
127 | | Convert__FP321_0__FP321_1, |
128 | | Convert__FP321_0__GR321_1, |
129 | | Convert__FP321_0__GR641_1, |
130 | | Convert__FP321_0__U4Imm1_1__GR321_2__U4Imm1_3, |
131 | | Convert__FP321_0__U4Imm1_1__GR641_2__U4Imm1_3, |
132 | | Convert__GR321_0__U4Imm1_1__FP641_2, |
133 | | Convert__GR321_0__U4Imm1_1__FP321_2, |
134 | | Convert__GR321_0__S32Imm1_1, |
135 | | Convert__GR321_0__U4Imm1_1__FP1281_2, |
136 | | Convert__GR641_0__BDXAddr64Disp203_1, |
137 | | Convert__GR641_0__U4Imm1_1__FP641_2, |
138 | | Convert__GR641_0__U4Imm1_1__FP321_2, |
139 | | Convert__GR641_0__S32Imm1_1, |
140 | | Convert__GR641_0__GR321_1, |
141 | | Convert__GR641_0__PCRel321_1, |
142 | | Convert__GR641_0__S16Imm1_1, |
143 | | Convert__BDAddr64Disp122_0__S16Imm1_1, |
144 | | Convert__GR641_0__S8Imm1_1__U4Imm1_2__PCRel161_3, |
145 | | Convert__GR641_0__S8Imm1_1__PCRel161_2, |
146 | | Convert__GR641_0__GR641_1, |
147 | | Convert__GR641_0__GR641_1__U4Imm1_2__PCRel161_3, |
148 | | Convert__GR641_0__GR641_1__PCRel161_2, |
149 | | Convert__GR641_0__U4Imm1_1__FP1281_2, |
150 | | Convert__GRH321_0__BDXAddr64Disp203_1, |
151 | | Convert__GR321_0__S16Imm1_1, |
152 | | Convert__GR321_0__PCRel321_1, |
153 | | Convert__GR321_0__BDXAddr64Disp203_1, |
154 | | Convert__GRH321_0__S32Imm1_1, |
155 | | Convert__GR321_0__S8Imm1_1__U4Imm1_2__PCRel161_3, |
156 | | Convert__GR321_0__S8Imm1_1__PCRel161_2, |
157 | | Convert__BDLAddr64Disp12Len83_0__BDAddr64Disp122_1, |
158 | | Convert__GR321_0__U4Imm1_1__FP641_2__U4Imm1_3, |
159 | | Convert__GR321_0__U4Imm1_1__FP321_2__U4Imm1_3, |
160 | | Convert__BDAddr64Disp122_0__U16Imm1_1, |
161 | | Convert__GR321_0__U32Imm1_1, |
162 | | Convert__GR321_0__U4Imm1_1__FP1281_2__U4Imm1_3, |
163 | | Convert__GR641_0__U4Imm1_1__FP641_2__U4Imm1_3, |
164 | | Convert__GR641_0__U4Imm1_1__FP321_2__U4Imm1_3, |
165 | | Convert__GR641_0__U32Imm1_1, |
166 | | Convert__GR641_0__U8Imm1_1__U4Imm1_2__PCRel161_3, |
167 | | Convert__GR641_0__U8Imm1_1__PCRel161_2, |
168 | | Convert__GR641_0__U4Imm1_1__FP1281_2__U4Imm1_3, |
169 | | Convert__BDAddr64Disp122_0__U8Imm1_1, |
170 | | Convert__GRH321_0__U32Imm1_1, |
171 | | Convert__GR321_0__U8Imm1_1__U4Imm1_2__PCRel161_3, |
172 | | Convert__GR321_0__U8Imm1_1__PCRel161_2, |
173 | | Convert__BDAddr64Disp202_0__U8Imm1_1, |
174 | | Convert__GR321_0__GR321_1, |
175 | | Convert__GR321_0__GR321_1__U4Imm1_2__PCRel161_3, |
176 | | Convert__GR321_0__GR321_1__PCRel161_2, |
177 | | Convert__GR641_0__GR641_1__Tie0__Tie1, |
178 | | Convert__FP641_0__FP641_1__FP641_2, |
179 | | Convert__GR321_0__Tie0__GR321_1__BDAddr64Disp122_2, |
180 | | Convert__GR641_0__Tie0__GR641_1__BDAddr64Disp202_2, |
181 | | Convert__GR321_0__Tie0__GR321_1__BDAddr64Disp202_2, |
182 | | Convert__FP1281_0__FP1281_1, |
183 | | Convert__FP1281_0__GR321_1, |
184 | | Convert__FP1281_0__GR641_1, |
185 | | Convert__FP1281_0__U4Imm1_1__GR321_2__U4Imm1_3, |
186 | | Convert__FP1281_0__U4Imm1_1__GR641_2__U4Imm1_3, |
187 | | Convert__GR1281_0__Tie0__BDXAddr64Disp203_1, |
188 | | Convert__GR1281_0__Tie0__GR641_1, |
189 | | Convert__GR1281_0__Tie0__GR321_1, |
190 | | Convert__GR321_0__AccessReg1_1, |
191 | | Convert__GR321_0, |
192 | | Convert__FP641_0__U4Imm1_1__FP641_2, |
193 | | Convert__FP641_0__U4Imm1_1__FP641_2__U4Imm1_3, |
194 | | Convert__FP321_0__U4Imm1_1__FP321_2, |
195 | | Convert__FP321_0__U4Imm1_1__FP321_2__U4Imm1_3, |
196 | | Convert__FP1281_0__U4Imm1_1__FP1281_2, |
197 | | Convert__FP1281_0__U4Imm1_1__FP1281_2__U4Imm1_3, |
198 | | Convert__GR1281_0__GR641_1, |
199 | | Convert__GR641_0__Tie0__BDXAddr64Disp123_1, |
200 | | Convert__GRH321_0__Tie0__U16Imm1_1, |
201 | | Convert__GR321_0__Tie0__U16Imm1_1, |
202 | | Convert__PCRel161_0, |
203 | | Convert__PCRel321_0, |
204 | | Convert__GR641_0__BDXAddr64Disp123_1, |
205 | | Convert__GR321_0__GR321_1__BDAddr64Disp202_2, |
206 | | Convert__GR641_0__GR641_1__BDAddr64Disp202_2, |
207 | | Convert__GR321_0__BDXAddr64Disp123_1__U4Imm1_2, |
208 | | Convert__FP641_0__FP321_1, |
209 | | Convert__FP641_0__BDXAddr64Disp203_1, |
210 | | Convert__FP321_0__FP641_1, |
211 | | Convert__FP321_0__U4Imm1_1__FP641_2__U4Imm1_3, |
212 | | Convert__FP321_0__BDXAddr64Disp203_1, |
213 | | Convert__GR641_0__FP641_1, |
214 | | Convert__GR641_0__U16Imm1_1, |
215 | | Convert__GR321_0__Tie0__BDAddr64Disp202_1__U4Imm1_2, |
216 | | Convert__GR321_0__Tie0__BDAddr64Disp202_1, |
217 | | Convert__GR641_0__Tie0__BDAddr64Disp202_1__U4Imm1_2, |
218 | | Convert__GR641_0__Tie0__BDAddr64Disp202_1, |
219 | | Convert__GR641_0__Tie0__GR641_1__U4Imm1_2, |
220 | | Convert__GR321_0__Tie0__GR321_1__U4Imm1_2, |
221 | | Convert__FP1281_0__BDXAddr64Disp123_1, |
222 | | Convert__FP1281_0__FP641_1, |
223 | | Convert__FP1281_0__FP321_1, |
224 | | Convert__FP641_0, |
225 | | Convert__FP321_0, |
226 | | Convert__FP1281_0, |
227 | | Convert__FP641_0__Tie0__FP641_1__BDXAddr64Disp123_2, |
228 | | Convert__FP641_0__Tie0__FP641_1__FP641_2, |
229 | | Convert__FP321_0__Tie0__FP321_1__BDXAddr64Disp123_2, |
230 | | Convert__FP321_0__Tie0__FP321_1__FP321_2, |
231 | | Convert__FP641_0__Tie0__FP321_1, |
232 | | Convert__FP1281_0__Tie0__BDXAddr64Disp123_1, |
233 | | Convert__FP1281_0__Tie0__FP641_1, |
234 | | Convert__GRH321_0__Tie0__U32Imm1_1, |
235 | | Convert__U4Imm1_0__BDXAddr64Disp203_1, |
236 | | Convert__GR641_0__GR641_1__U4Imm1_2, |
237 | | Convert__GR641_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4, |
238 | | Convert__GRH321_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4, |
239 | | Convert__GR321_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4, |
240 | | Convert__GR321_0__GR321_1__BDAddr32Disp202_2, |
241 | | Convert__GR641_0__GR641_1__BDAddr32Disp202_2, |
242 | | Convert__GR321_0__Tie0__BDAddr32Disp122_1, |
243 | | Convert__BDAddr64Disp122_0, |
244 | | Convert__GR321_0__BDAddr64Disp202_1__U4Imm1_2, |
245 | | Convert__GR321_0__BDAddr64Disp202_1, |
246 | | Convert__GR641_0__BDAddr64Disp202_1__U4Imm1_2, |
247 | | Convert__GR641_0__BDAddr64Disp202_1, |
248 | | Convert_NoOperands, |
249 | | Convert__GRH321_0__U16Imm1_1, |
250 | | Convert__GR321_0__U16Imm1_1, |
251 | | Convert__VR1281_0__VR1281_1__VR1281_2, |
252 | | Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, |
253 | | Convert__VR1281_0__VR1281_1__U4Imm1_2__U4Imm1_3, |
254 | | Convert__VR1281_0__VR1281_1, |
255 | | Convert__VR1281_0__Tie0__VR1281_1__VR1281_2__U8Imm1_3, |
256 | | Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, |
257 | | Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, |
258 | | Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, |
259 | | Convert__VR1281_0__VR1281_1__U12Imm1_2, |
260 | | Convert__VR1281_0__U16Imm1_1, |
261 | | Convert__VR1281_0__Tie0__BDVAddr64Disp123_1__U2Imm1_2, |
262 | | Convert__VR1281_0__Tie0__BDVAddr64Disp123_1__U1Imm1_2, |
263 | | Convert__VR1281_0__U8Imm1_1__U8Imm1_2, |
264 | | Convert__VR1281_0__BDXAddr64Disp123_1, |
265 | | Convert__VR1281_0__BDXAddr64Disp123_1__U4Imm1_2, |
266 | | Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U4Imm1_2, |
267 | | Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U2Imm1_2, |
268 | | Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U1Imm1_2, |
269 | | Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U3Imm1_2, |
270 | | Convert__VR1281_0__Tie0__S16Imm1_1__U4Imm1_2, |
271 | | Convert__VR1281_0__Tie0__S16Imm1_1__U2Imm1_2, |
272 | | Convert__VR1281_0__Tie0__S16Imm1_1__U1Imm1_2, |
273 | | Convert__VR1281_0__Tie0__S16Imm1_1__U3Imm1_2, |
274 | | Convert__GR641_0__VR1281_1__BDAddr32Disp122_2, |
275 | | Convert__VR1281_0__GR321_1__BDAddr64Disp122_2, |
276 | | Convert__VR1281_0__VR1281_1__BDAddr64Disp122_2, |
277 | | Convert__VR1281_0__Tie0__GR321_1__BDAddr32Disp122_2, |
278 | | Convert__VR1281_0__Tie0__GR641_1__BDAddr32Disp122_2, |
279 | | Convert__VR1281_0__GR641_1__GR641_2, |
280 | | Convert__VR1281_0, |
281 | | Convert__VR1281_0__VR1281_1__U4Imm1_2, |
282 | | Convert__VR1281_0__VR1281_1__U16Imm1_2, |
283 | | Convert__VR1281_0__S16Imm1_1, |
284 | | Convert__VR1281_0__BDVAddr64Disp123_1__U2Imm1_2, |
285 | | Convert__VR1281_0__BDVAddr64Disp123_1__U1Imm1_2, |
286 | | Convert__VR1281_0__VR1281_1__VR1281_2__U8Imm1_3, |
287 | | Convert__VR1281_0__BDXAddr64Disp123_1__U2Imm1_2, |
288 | | Convert__VR1281_0__BDXAddr64Disp123_1__U1Imm1_2, |
289 | | Convert__VR1281_0__BDXAddr64Disp123_1__U3Imm1_2, |
290 | | Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, |
291 | | Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, |
292 | | Convert__VR641_0__VR641_1__U4Imm1_2__U4Imm1_3, |
293 | | Convert__VR641_0__VR641_1__VR641_2, |
294 | | Convert__VR641_0__VR641_1, |
295 | | Convert__VR641_0__VR641_1__VR641_2__VR641_3, |
296 | | Convert__VR641_0__VR641_1__U12Imm1_2, |
297 | | Convert__VR641_0__VR321_1, |
298 | | Convert__VR321_0__VR641_1__U4Imm1_2__U4Imm1_3, |
299 | | CVT_NUM_SIGNATURES |
300 | | }; |
301 | | |
302 | | } // end anonymous namespace |
303 | | |
304 | | static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = { |
305 | | // Convert__GR321_0__Tie0__BDXAddr64Disp123_1 |
306 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
307 | | // Convert__FP641_0__Tie0__BDXAddr64Disp123_1 |
308 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
309 | | // Convert__FP641_0__Tie0__FP641_1 |
310 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_Done }, |
311 | | // Convert__FP321_0__Tie0__BDXAddr64Disp123_1 |
312 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
313 | | // Convert__FP321_0__Tie0__FP321_1 |
314 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_Done }, |
315 | | // Convert__GR321_0__Tie0__S32Imm1_1 |
316 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
317 | | // Convert__GR641_0__Tie0__BDXAddr64Disp203_1 |
318 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
319 | | // Convert__GR641_0__Tie0__S32Imm1_1 |
320 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
321 | | // Convert__GR641_0__Tie0__GR321_1 |
322 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_Done }, |
323 | | // Convert__GR641_0__Tie0__S16Imm1_1 |
324 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
325 | | // Convert__GR641_0__GR641_1__S16Imm1_2 |
326 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
327 | | // Convert__GR641_0__Tie0__GR641_1 |
328 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_Done }, |
329 | | // Convert__GR641_0__GR641_1__GR641_2 |
330 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
331 | | // Convert__BDAddr64Disp202_0__S8Imm1_1 |
332 | | { CVT_95_addBDAddrOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
333 | | // Convert__GR321_0__Tie0__S16Imm1_1 |
334 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
335 | | // Convert__GR321_0__GR321_1__S16Imm1_2 |
336 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
337 | | // Convert__GR321_0__Tie0__BDXAddr64Disp203_1 |
338 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
339 | | // Convert__GRH321_0__Tie0__S32Imm1_1 |
340 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
341 | | // Convert__GR321_0__Tie0__GR321_1 |
342 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_Done }, |
343 | | // Convert__GR321_0__Tie0__U32Imm1_1 |
344 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
345 | | // Convert__GR641_0__Tie0__U32Imm1_1 |
346 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
347 | | // Convert__GR321_0__GR321_1__GR321_2 |
348 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
349 | | // Convert__FP1281_0__Tie0__FP1281_1 |
350 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_Done }, |
351 | | // Convert__GR641_0__ADDR641_1 |
352 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
353 | | // Convert__U4Imm1_0__GR641_1 |
354 | | { CVT_95_addImmOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
355 | | // Convert__ADDR641_0 |
356 | | { CVT_95_addRegOperands, 1, CVT_Done }, |
357 | | // Convert__GR641_0__PCRelTLS162_1 |
358 | | { CVT_95_addRegOperands, 1, CVT_95_addImmTLSOperands, 2, CVT_Done }, |
359 | | // Convert__GR641_0__PCRelTLS322_1 |
360 | | { CVT_95_addRegOperands, 1, CVT_95_addImmTLSOperands, 2, CVT_Done }, |
361 | | // Convert__U4Imm1_0__PCRel161_1 |
362 | | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
363 | | // Convert__U4Imm1_0__PCRel321_1 |
364 | | { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
365 | | // Convert__GR321_0__Tie0__PCRel161_1 |
366 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
367 | | // Convert__GR641_0__Tie0__PCRel161_1 |
368 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
369 | | // Convert__GR321_0__BDXAddr64Disp123_1 |
370 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
371 | | // Convert__FP641_0__BDXAddr64Disp123_1 |
372 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
373 | | // Convert__FP641_0__FP641_1 |
374 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
375 | | // Convert__FP641_0__GR321_1 |
376 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
377 | | // Convert__FP641_0__GR641_1 |
378 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
379 | | // Convert__FP641_0__U4Imm1_1__GR321_2__U4Imm1_3 |
380 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
381 | | // Convert__FP641_0__U4Imm1_1__GR641_2__U4Imm1_3 |
382 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
383 | | // Convert__FP321_0__BDXAddr64Disp123_1 |
384 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
385 | | // Convert__FP321_0__FP321_1 |
386 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
387 | | // Convert__FP321_0__GR321_1 |
388 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
389 | | // Convert__FP321_0__GR641_1 |
390 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
391 | | // Convert__FP321_0__U4Imm1_1__GR321_2__U4Imm1_3 |
392 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
393 | | // Convert__FP321_0__U4Imm1_1__GR641_2__U4Imm1_3 |
394 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
395 | | // Convert__GR321_0__U4Imm1_1__FP641_2 |
396 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
397 | | // Convert__GR321_0__U4Imm1_1__FP321_2 |
398 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
399 | | // Convert__GR321_0__S32Imm1_1 |
400 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
401 | | // Convert__GR321_0__U4Imm1_1__FP1281_2 |
402 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
403 | | // Convert__GR641_0__BDXAddr64Disp203_1 |
404 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
405 | | // Convert__GR641_0__U4Imm1_1__FP641_2 |
406 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
407 | | // Convert__GR641_0__U4Imm1_1__FP321_2 |
408 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
409 | | // Convert__GR641_0__S32Imm1_1 |
410 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
411 | | // Convert__GR641_0__GR321_1 |
412 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
413 | | // Convert__GR641_0__PCRel321_1 |
414 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
415 | | // Convert__GR641_0__S16Imm1_1 |
416 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
417 | | // Convert__BDAddr64Disp122_0__S16Imm1_1 |
418 | | { CVT_95_addBDAddrOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
419 | | // Convert__GR641_0__S8Imm1_1__U4Imm1_2__PCRel161_3 |
420 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
421 | | // Convert__GR641_0__S8Imm1_1__PCRel161_2 |
422 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
423 | | // Convert__GR641_0__GR641_1 |
424 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
425 | | // Convert__GR641_0__GR641_1__U4Imm1_2__PCRel161_3 |
426 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
427 | | // Convert__GR641_0__GR641_1__PCRel161_2 |
428 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
429 | | // Convert__GR641_0__U4Imm1_1__FP1281_2 |
430 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
431 | | // Convert__GRH321_0__BDXAddr64Disp203_1 |
432 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
433 | | // Convert__GR321_0__S16Imm1_1 |
434 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
435 | | // Convert__GR321_0__PCRel321_1 |
436 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
437 | | // Convert__GR321_0__BDXAddr64Disp203_1 |
438 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
439 | | // Convert__GRH321_0__S32Imm1_1 |
440 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
441 | | // Convert__GR321_0__S8Imm1_1__U4Imm1_2__PCRel161_3 |
442 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
443 | | // Convert__GR321_0__S8Imm1_1__PCRel161_2 |
444 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
445 | | // Convert__BDLAddr64Disp12Len83_0__BDAddr64Disp122_1 |
446 | | { CVT_95_addBDLAddrOperands, 1, CVT_95_addBDAddrOperands, 2, CVT_Done }, |
447 | | // Convert__GR321_0__U4Imm1_1__FP641_2__U4Imm1_3 |
448 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
449 | | // Convert__GR321_0__U4Imm1_1__FP321_2__U4Imm1_3 |
450 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
451 | | // Convert__BDAddr64Disp122_0__U16Imm1_1 |
452 | | { CVT_95_addBDAddrOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
453 | | // Convert__GR321_0__U32Imm1_1 |
454 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
455 | | // Convert__GR321_0__U4Imm1_1__FP1281_2__U4Imm1_3 |
456 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
457 | | // Convert__GR641_0__U4Imm1_1__FP641_2__U4Imm1_3 |
458 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
459 | | // Convert__GR641_0__U4Imm1_1__FP321_2__U4Imm1_3 |
460 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
461 | | // Convert__GR641_0__U32Imm1_1 |
462 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
463 | | // Convert__GR641_0__U8Imm1_1__U4Imm1_2__PCRel161_3 |
464 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
465 | | // Convert__GR641_0__U8Imm1_1__PCRel161_2 |
466 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
467 | | // Convert__GR641_0__U4Imm1_1__FP1281_2__U4Imm1_3 |
468 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
469 | | // Convert__BDAddr64Disp122_0__U8Imm1_1 |
470 | | { CVT_95_addBDAddrOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
471 | | // Convert__GRH321_0__U32Imm1_1 |
472 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
473 | | // Convert__GR321_0__U8Imm1_1__U4Imm1_2__PCRel161_3 |
474 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
475 | | // Convert__GR321_0__U8Imm1_1__PCRel161_2 |
476 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
477 | | // Convert__BDAddr64Disp202_0__U8Imm1_1 |
478 | | { CVT_95_addBDAddrOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
479 | | // Convert__GR321_0__GR321_1 |
480 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
481 | | // Convert__GR321_0__GR321_1__U4Imm1_2__PCRel161_3 |
482 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
483 | | // Convert__GR321_0__GR321_1__PCRel161_2 |
484 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
485 | | // Convert__GR641_0__GR641_1__Tie0__Tie1 |
486 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Tied, 0, CVT_Tied, 1, CVT_Done }, |
487 | | // Convert__FP641_0__FP641_1__FP641_2 |
488 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
489 | | // Convert__GR321_0__Tie0__GR321_1__BDAddr64Disp122_2 |
490 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
491 | | // Convert__GR641_0__Tie0__GR641_1__BDAddr64Disp202_2 |
492 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
493 | | // Convert__GR321_0__Tie0__GR321_1__BDAddr64Disp202_2 |
494 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
495 | | // Convert__FP1281_0__FP1281_1 |
496 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
497 | | // Convert__FP1281_0__GR321_1 |
498 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
499 | | // Convert__FP1281_0__GR641_1 |
500 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
501 | | // Convert__FP1281_0__U4Imm1_1__GR321_2__U4Imm1_3 |
502 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
503 | | // Convert__FP1281_0__U4Imm1_1__GR641_2__U4Imm1_3 |
504 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
505 | | // Convert__GR1281_0__Tie0__BDXAddr64Disp203_1 |
506 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
507 | | // Convert__GR1281_0__Tie0__GR641_1 |
508 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_Done }, |
509 | | // Convert__GR1281_0__Tie0__GR321_1 |
510 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_Done }, |
511 | | // Convert__GR321_0__AccessReg1_1 |
512 | | { CVT_95_addRegOperands, 1, CVT_95_addAccessRegOperands, 2, CVT_Done }, |
513 | | // Convert__GR321_0 |
514 | | { CVT_95_addRegOperands, 1, CVT_Done }, |
515 | | // Convert__FP641_0__U4Imm1_1__FP641_2 |
516 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
517 | | // Convert__FP641_0__U4Imm1_1__FP641_2__U4Imm1_3 |
518 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
519 | | // Convert__FP321_0__U4Imm1_1__FP321_2 |
520 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
521 | | // Convert__FP321_0__U4Imm1_1__FP321_2__U4Imm1_3 |
522 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
523 | | // Convert__FP1281_0__U4Imm1_1__FP1281_2 |
524 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
525 | | // Convert__FP1281_0__U4Imm1_1__FP1281_2__U4Imm1_3 |
526 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
527 | | // Convert__GR1281_0__GR641_1 |
528 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
529 | | // Convert__GR641_0__Tie0__BDXAddr64Disp123_1 |
530 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
531 | | // Convert__GRH321_0__Tie0__U16Imm1_1 |
532 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
533 | | // Convert__GR321_0__Tie0__U16Imm1_1 |
534 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
535 | | // Convert__PCRel161_0 |
536 | | { CVT_95_addImmOperands, 1, CVT_Done }, |
537 | | // Convert__PCRel321_0 |
538 | | { CVT_95_addImmOperands, 1, CVT_Done }, |
539 | | // Convert__GR641_0__BDXAddr64Disp123_1 |
540 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
541 | | // Convert__GR321_0__GR321_1__BDAddr64Disp202_2 |
542 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
543 | | // Convert__GR641_0__GR641_1__BDAddr64Disp202_2 |
544 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
545 | | // Convert__GR321_0__BDXAddr64Disp123_1__U4Imm1_2 |
546 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
547 | | // Convert__FP641_0__FP321_1 |
548 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
549 | | // Convert__FP641_0__BDXAddr64Disp203_1 |
550 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
551 | | // Convert__FP321_0__FP641_1 |
552 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
553 | | // Convert__FP321_0__U4Imm1_1__FP641_2__U4Imm1_3 |
554 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
555 | | // Convert__FP321_0__BDXAddr64Disp203_1 |
556 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
557 | | // Convert__GR641_0__FP641_1 |
558 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
559 | | // Convert__GR641_0__U16Imm1_1 |
560 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
561 | | // Convert__GR321_0__Tie0__BDAddr64Disp202_1__U4Imm1_2 |
562 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
563 | | // Convert__GR321_0__Tie0__BDAddr64Disp202_1 |
564 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDAddrOperands, 2, CVT_Done }, |
565 | | // Convert__GR641_0__Tie0__BDAddr64Disp202_1__U4Imm1_2 |
566 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
567 | | // Convert__GR641_0__Tie0__BDAddr64Disp202_1 |
568 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDAddrOperands, 2, CVT_Done }, |
569 | | // Convert__GR641_0__Tie0__GR641_1__U4Imm1_2 |
570 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
571 | | // Convert__GR321_0__Tie0__GR321_1__U4Imm1_2 |
572 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
573 | | // Convert__FP1281_0__BDXAddr64Disp123_1 |
574 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
575 | | // Convert__FP1281_0__FP641_1 |
576 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
577 | | // Convert__FP1281_0__FP321_1 |
578 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
579 | | // Convert__FP641_0 |
580 | | { CVT_95_addRegOperands, 1, CVT_Done }, |
581 | | // Convert__FP321_0 |
582 | | { CVT_95_addRegOperands, 1, CVT_Done }, |
583 | | // Convert__FP1281_0 |
584 | | { CVT_95_addRegOperands, 1, CVT_Done }, |
585 | | // Convert__FP641_0__Tie0__FP641_1__BDXAddr64Disp123_2 |
586 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addBDXAddrOperands, 3, CVT_Done }, |
587 | | // Convert__FP641_0__Tie0__FP641_1__FP641_2 |
588 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
589 | | // Convert__FP321_0__Tie0__FP321_1__BDXAddr64Disp123_2 |
590 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addBDXAddrOperands, 3, CVT_Done }, |
591 | | // Convert__FP321_0__Tie0__FP321_1__FP321_2 |
592 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
593 | | // Convert__FP641_0__Tie0__FP321_1 |
594 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_Done }, |
595 | | // Convert__FP1281_0__Tie0__BDXAddr64Disp123_1 |
596 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
597 | | // Convert__FP1281_0__Tie0__FP641_1 |
598 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_Done }, |
599 | | // Convert__GRH321_0__Tie0__U32Imm1_1 |
600 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done }, |
601 | | // Convert__U4Imm1_0__BDXAddr64Disp203_1 |
602 | | { CVT_95_addImmOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
603 | | // Convert__GR641_0__GR641_1__U4Imm1_2 |
604 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
605 | | // Convert__GR641_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4 |
606 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
607 | | // Convert__GRH321_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4 |
608 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
609 | | // Convert__GR321_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4 |
610 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
611 | | // Convert__GR321_0__GR321_1__BDAddr32Disp202_2 |
612 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
613 | | // Convert__GR641_0__GR641_1__BDAddr32Disp202_2 |
614 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
615 | | // Convert__GR321_0__Tie0__BDAddr32Disp122_1 |
616 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDAddrOperands, 2, CVT_Done }, |
617 | | // Convert__BDAddr64Disp122_0 |
618 | | { CVT_95_addBDAddrOperands, 1, CVT_Done }, |
619 | | // Convert__GR321_0__BDAddr64Disp202_1__U4Imm1_2 |
620 | | { CVT_95_addRegOperands, 1, CVT_95_addBDAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
621 | | // Convert__GR321_0__BDAddr64Disp202_1 |
622 | | { CVT_95_addRegOperands, 1, CVT_95_addBDAddrOperands, 2, CVT_Done }, |
623 | | // Convert__GR641_0__BDAddr64Disp202_1__U4Imm1_2 |
624 | | { CVT_95_addRegOperands, 1, CVT_95_addBDAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
625 | | // Convert__GR641_0__BDAddr64Disp202_1 |
626 | | { CVT_95_addRegOperands, 1, CVT_95_addBDAddrOperands, 2, CVT_Done }, |
627 | | // Convert_NoOperands |
628 | | { CVT_Done }, |
629 | | // Convert__GRH321_0__U16Imm1_1 |
630 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
631 | | // Convert__GR321_0__U16Imm1_1 |
632 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
633 | | // Convert__VR1281_0__VR1281_1__VR1281_2 |
634 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
635 | | // Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3 |
636 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addRegOperands, 4, CVT_Done }, |
637 | | // Convert__VR1281_0__VR1281_1__U4Imm1_2__U4Imm1_3 |
638 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
639 | | // Convert__VR1281_0__VR1281_1 |
640 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
641 | | // Convert__VR1281_0__Tie0__VR1281_1__VR1281_2__U8Imm1_3 |
642 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
643 | | // Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2 |
644 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
645 | | // Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0 |
646 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_imm_95_0, 0, CVT_Done }, |
647 | | // Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3 |
648 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
649 | | // Convert__VR1281_0__VR1281_1__U12Imm1_2 |
650 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
651 | | // Convert__VR1281_0__U16Imm1_1 |
652 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
653 | | // Convert__VR1281_0__Tie0__BDVAddr64Disp123_1__U2Imm1_2 |
654 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDVAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
655 | | // Convert__VR1281_0__Tie0__BDVAddr64Disp123_1__U1Imm1_2 |
656 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDVAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
657 | | // Convert__VR1281_0__U8Imm1_1__U8Imm1_2 |
658 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
659 | | // Convert__VR1281_0__BDXAddr64Disp123_1 |
660 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_Done }, |
661 | | // Convert__VR1281_0__BDXAddr64Disp123_1__U4Imm1_2 |
662 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
663 | | // Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U4Imm1_2 |
664 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
665 | | // Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U2Imm1_2 |
666 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
667 | | // Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U1Imm1_2 |
668 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
669 | | // Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U3Imm1_2 |
670 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addBDXAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
671 | | // Convert__VR1281_0__Tie0__S16Imm1_1__U4Imm1_2 |
672 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
673 | | // Convert__VR1281_0__Tie0__S16Imm1_1__U2Imm1_2 |
674 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
675 | | // Convert__VR1281_0__Tie0__S16Imm1_1__U1Imm1_2 |
676 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
677 | | // Convert__VR1281_0__Tie0__S16Imm1_1__U3Imm1_2 |
678 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
679 | | // Convert__GR641_0__VR1281_1__BDAddr32Disp122_2 |
680 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
681 | | // Convert__VR1281_0__GR321_1__BDAddr64Disp122_2 |
682 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
683 | | // Convert__VR1281_0__VR1281_1__BDAddr64Disp122_2 |
684 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
685 | | // Convert__VR1281_0__Tie0__GR321_1__BDAddr32Disp122_2 |
686 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
687 | | // Convert__VR1281_0__Tie0__GR641_1__BDAddr32Disp122_2 |
688 | | { CVT_95_addRegOperands, 1, CVT_Tied, 0, CVT_95_addRegOperands, 2, CVT_95_addBDAddrOperands, 3, CVT_Done }, |
689 | | // Convert__VR1281_0__GR641_1__GR641_2 |
690 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
691 | | // Convert__VR1281_0 |
692 | | { CVT_95_addRegOperands, 1, CVT_Done }, |
693 | | // Convert__VR1281_0__VR1281_1__U4Imm1_2 |
694 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
695 | | // Convert__VR1281_0__VR1281_1__U16Imm1_2 |
696 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
697 | | // Convert__VR1281_0__S16Imm1_1 |
698 | | { CVT_95_addRegOperands, 1, CVT_95_addImmOperands, 2, CVT_Done }, |
699 | | // Convert__VR1281_0__BDVAddr64Disp123_1__U2Imm1_2 |
700 | | { CVT_95_addRegOperands, 1, CVT_95_addBDVAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
701 | | // Convert__VR1281_0__BDVAddr64Disp123_1__U1Imm1_2 |
702 | | { CVT_95_addRegOperands, 1, CVT_95_addBDVAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
703 | | // Convert__VR1281_0__VR1281_1__VR1281_2__U8Imm1_3 |
704 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
705 | | // Convert__VR1281_0__BDXAddr64Disp123_1__U2Imm1_2 |
706 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
707 | | // Convert__VR1281_0__BDXAddr64Disp123_1__U1Imm1_2 |
708 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
709 | | // Convert__VR1281_0__BDXAddr64Disp123_1__U3Imm1_2 |
710 | | { CVT_95_addRegOperands, 1, CVT_95_addBDXAddrOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
711 | | // Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0 |
712 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addRegOperands, 4, CVT_imm_95_0, 0, CVT_Done }, |
713 | | // Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4 |
714 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addRegOperands, 4, CVT_95_addImmOperands, 5, CVT_Done }, |
715 | | // Convert__VR641_0__VR641_1__U4Imm1_2__U4Imm1_3 |
716 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
717 | | // Convert__VR641_0__VR641_1__VR641_2 |
718 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_Done }, |
719 | | // Convert__VR641_0__VR641_1 |
720 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
721 | | // Convert__VR641_0__VR641_1__VR641_2__VR641_3 |
722 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addRegOperands, 3, CVT_95_addRegOperands, 4, CVT_Done }, |
723 | | // Convert__VR641_0__VR641_1__U12Imm1_2 |
724 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_Done }, |
725 | | // Convert__VR641_0__VR321_1 |
726 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Done }, |
727 | | // Convert__VR321_0__VR641_1__U4Imm1_2__U4Imm1_3 |
728 | | { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done }, |
729 | | }; |
730 | | |
731 | | void SystemZAsmParser:: |
732 | | convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
733 | 0 | const OperandVector &Operands) { |
734 | 0 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
735 | 0 | const uint8_t *Converter = ConversionTable[Kind]; |
736 | 0 | Inst.setOpcode(Opcode); |
737 | 0 | for (const uint8_t *p = Converter; *p; p+= 2) { |
738 | 0 | switch (*p) { |
739 | 0 | default: llvm_unreachable("invalid conversion entry!"); |
740 | 0 | case CVT_Reg: |
741 | 0 | static_cast<SystemZOperand&>(*Operands[*(p + 1)]).addRegOperands(Inst, 1); |
742 | 0 | break; |
743 | 0 | case CVT_Tied: |
744 | 0 | Inst.addOperand(Inst.getOperand(*(p + 1))); |
745 | 0 | break; |
746 | 0 | case CVT_95_addRegOperands: |
747 | 0 | static_cast<SystemZOperand&>(*Operands[*(p + 1)]).addRegOperands(Inst, 1); |
748 | 0 | break; |
749 | 0 | case CVT_95_addBDXAddrOperands: |
750 | 0 | static_cast<SystemZOperand&>(*Operands[*(p + 1)]).addBDXAddrOperands(Inst, 3); |
751 | 0 | break; |
752 | 0 | case CVT_95_addImmOperands: |
753 | 0 | static_cast<SystemZOperand&>(*Operands[*(p + 1)]).addImmOperands(Inst, 1); |
754 | 0 | break; |
755 | 0 | case CVT_95_addBDAddrOperands: |
756 | 0 | static_cast<SystemZOperand&>(*Operands[*(p + 1)]).addBDAddrOperands(Inst, 2); |
757 | 0 | break; |
758 | 0 | case CVT_95_addImmTLSOperands: |
759 | 0 | static_cast<SystemZOperand&>(*Operands[*(p + 1)]).addImmTLSOperands(Inst, 2); |
760 | 0 | break; |
761 | 0 | case CVT_95_addBDLAddrOperands: |
762 | 0 | static_cast<SystemZOperand&>(*Operands[*(p + 1)]).addBDLAddrOperands(Inst, 3); |
763 | 0 | break; |
764 | 0 | case CVT_95_addAccessRegOperands: |
765 | 0 | static_cast<SystemZOperand&>(*Operands[*(p + 1)]).addAccessRegOperands(Inst, 1); |
766 | 0 | break; |
767 | 0 | case CVT_imm_95_0: |
768 | 0 | Inst.addOperand(MCOperand::createImm(0)); |
769 | 0 | break; |
770 | 0 | case CVT_95_addBDVAddrOperands: |
771 | 0 | static_cast<SystemZOperand&>(*Operands[*(p + 1)]).addBDVAddrOperands(Inst, 3); |
772 | 0 | break; |
773 | 0 | } |
774 | 0 | } |
775 | 0 | } |
776 | | |
777 | | void SystemZAsmParser:: |
778 | | convertToMapAndConstraints(unsigned Kind, |
779 | 0 | const OperandVector &Operands) { |
780 | 0 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
781 | 0 | unsigned NumMCOperands = 0; |
782 | 0 | const uint8_t *Converter = ConversionTable[Kind]; |
783 | 0 | for (const uint8_t *p = Converter; *p; p+= 2) { |
784 | 0 | switch (*p) { |
785 | 0 | default: llvm_unreachable("invalid conversion entry!"); |
786 | 0 | case CVT_Reg: |
787 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
788 | 0 | Operands[*(p + 1)]->setConstraint("r"); |
789 | 0 | ++NumMCOperands; |
790 | 0 | break; |
791 | 0 | case CVT_Tied: |
792 | 0 | ++NumMCOperands; |
793 | 0 | break; |
794 | 0 | case CVT_95_addRegOperands: |
795 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
796 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
797 | 0 | NumMCOperands += 1; |
798 | 0 | break; |
799 | 0 | case CVT_95_addBDXAddrOperands: |
800 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
801 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
802 | 0 | NumMCOperands += 3; |
803 | 0 | break; |
804 | 0 | case CVT_95_addImmOperands: |
805 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
806 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
807 | 0 | NumMCOperands += 1; |
808 | 0 | break; |
809 | 0 | case CVT_95_addBDAddrOperands: |
810 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
811 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
812 | 0 | NumMCOperands += 2; |
813 | 0 | break; |
814 | 0 | case CVT_95_addImmTLSOperands: |
815 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
816 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
817 | 0 | NumMCOperands += 2; |
818 | 0 | break; |
819 | 0 | case CVT_95_addBDLAddrOperands: |
820 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
821 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
822 | 0 | NumMCOperands += 3; |
823 | 0 | break; |
824 | 0 | case CVT_95_addAccessRegOperands: |
825 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
826 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
827 | 0 | NumMCOperands += 1; |
828 | 0 | break; |
829 | 0 | case CVT_imm_95_0: |
830 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
831 | 0 | Operands[*(p + 1)]->setConstraint(""); |
832 | 0 | ++NumMCOperands; |
833 | 0 | break; |
834 | 0 | case CVT_95_addBDVAddrOperands: |
835 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
836 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
837 | 0 | NumMCOperands += 3; |
838 | 0 | break; |
839 | 0 | } |
840 | 0 | } |
841 | 0 | } |
842 | | |
843 | | namespace { |
844 | | |
845 | | /// MatchClassKind - The kinds of classes which participate in |
846 | | /// instruction matching. |
847 | | enum MatchClassKind { |
848 | | InvalidMatchClass = 0, |
849 | | MCK_CCRegs, // register class 'CCRegs' |
850 | | MCK_ADDR128Bit, // register class 'ADDR128Bit' |
851 | | MCK_FP128Bit, // register class 'FP128Bit' |
852 | | MCK_GR128Bit, // register class 'GR128Bit' |
853 | | MCK_ADDR32Bit, // register class 'ADDR32Bit' |
854 | | MCK_ADDR64Bit, // register class 'ADDR64Bit' |
855 | | MCK_FP32Bit, // register class 'FP32Bit' |
856 | | MCK_FP64Bit, // register class 'FP64Bit' |
857 | | MCK_GR32Bit, // register class 'GR32Bit' |
858 | | MCK_GR64Bit, // register class 'GR64Bit' |
859 | | MCK_GRH32Bit, // register class 'GRH32Bit' |
860 | | MCK_VF128Bit, // register class 'VF128Bit' |
861 | | MCK_GRX32Bit, // register class 'GRX32Bit' |
862 | | MCK_VR128Bit, // register class 'VR128Bit' |
863 | | MCK_VR32Bit, // register class 'VR32Bit' |
864 | | MCK_VR64Bit, // register class 'VR64Bit' |
865 | | MCK_ADDR128, // user defined class 'ADDR128AsmOperand' |
866 | | MCK_ADDR32, // user defined class 'ADDR32AsmOperand' |
867 | | MCK_ADDR64, // user defined class 'ADDR64AsmOperand' |
868 | | MCK_AccessReg, // user defined class 'AccessReg' |
869 | | MCK_BDAddr32Disp12, // user defined class 'BDAddr32Disp12' |
870 | | MCK_BDAddr32Disp20, // user defined class 'BDAddr32Disp20' |
871 | | MCK_BDAddr64Disp12, // user defined class 'BDAddr64Disp12' |
872 | | MCK_BDAddr64Disp20, // user defined class 'BDAddr64Disp20' |
873 | | MCK_BDLAddr64Disp12Len8, // user defined class 'BDLAddr64Disp12Len8' |
874 | | MCK_BDVAddr64Disp12, // user defined class 'BDVAddr64Disp12' |
875 | | MCK_BDXAddr64Disp12, // user defined class 'BDXAddr64Disp12' |
876 | | MCK_BDXAddr64Disp20, // user defined class 'BDXAddr64Disp20' |
877 | | MCK_FP128, // user defined class 'FP128AsmOperand' |
878 | | MCK_FP32, // user defined class 'FP32AsmOperand' |
879 | | MCK_FP64, // user defined class 'FP64AsmOperand' |
880 | | MCK_GR128, // user defined class 'GR128AsmOperand' |
881 | | MCK_GR32, // user defined class 'GR32AsmOperand' |
882 | | MCK_GR64, // user defined class 'GR64AsmOperand' |
883 | | MCK_GRH32, // user defined class 'GRH32AsmOperand' |
884 | | MCK_GRX32, // user defined class 'GRX32AsmOperand' |
885 | | MCK_Imm, // user defined class 'ImmAsmOperand' |
886 | | MCK_PCRel16, // user defined class 'PCRel16' |
887 | | MCK_PCRel32, // user defined class 'PCRel32' |
888 | | MCK_PCRelTLS16, // user defined class 'PCRelTLS16' |
889 | | MCK_PCRelTLS32, // user defined class 'PCRelTLS32' |
890 | | MCK_S16Imm, // user defined class 'S16Imm' |
891 | | MCK_S32Imm, // user defined class 'S32Imm' |
892 | | MCK_S8Imm, // user defined class 'S8Imm' |
893 | | MCK_U12Imm, // user defined class 'U12Imm' |
894 | | MCK_U16Imm, // user defined class 'U16Imm' |
895 | | MCK_U1Imm, // user defined class 'U1Imm' |
896 | | MCK_U2Imm, // user defined class 'U2Imm' |
897 | | MCK_U32Imm, // user defined class 'U32Imm' |
898 | | MCK_U3Imm, // user defined class 'U3Imm' |
899 | | MCK_U4Imm, // user defined class 'U4Imm' |
900 | | MCK_U6Imm, // user defined class 'U6Imm' |
901 | | MCK_U8Imm, // user defined class 'U8Imm' |
902 | | MCK_VF128, // user defined class 'VF128AsmOperand' |
903 | | MCK_VR128, // user defined class 'VR128AsmOperand' |
904 | | MCK_VR32, // user defined class 'VR32AsmOperand' |
905 | | MCK_VR64, // user defined class 'VR64AsmOperand' |
906 | | NumMatchClassKinds |
907 | | }; |
908 | | |
909 | | } |
910 | | |
911 | 0 | static MatchClassKind matchTokenString(StringRef Name) { |
912 | 0 | return InvalidMatchClass; |
913 | 0 | } |
914 | | |
915 | | /// isSubclass - Compute whether \p A is a subclass of \p B. |
916 | 0 | static bool isSubclass(MatchClassKind A, MatchClassKind B) { |
917 | 0 | if (A == B) |
918 | 0 | return true; |
919 | | |
920 | 0 | switch (A) { |
921 | 0 | default: |
922 | 0 | return false; |
923 | | |
924 | 0 | case MCK_ADDR128Bit: |
925 | 0 | return B == MCK_GR128Bit; |
926 | | |
927 | 0 | case MCK_ADDR32Bit: |
928 | 0 | switch (B) { |
929 | 0 | default: return false; |
930 | 0 | case MCK_GR32Bit: return true; |
931 | 0 | case MCK_GRX32Bit: return true; |
932 | 0 | } |
933 | | |
934 | 0 | case MCK_ADDR64Bit: |
935 | 0 | return B == MCK_GR64Bit; |
936 | | |
937 | 0 | case MCK_FP32Bit: |
938 | 0 | return B == MCK_VR32Bit; |
939 | | |
940 | 0 | case MCK_FP64Bit: |
941 | 0 | return B == MCK_VR64Bit; |
942 | | |
943 | 0 | case MCK_GR32Bit: |
944 | 0 | return B == MCK_GRX32Bit; |
945 | | |
946 | 0 | case MCK_GRH32Bit: |
947 | 0 | return B == MCK_GRX32Bit; |
948 | | |
949 | 0 | case MCK_VF128Bit: |
950 | 0 | return B == MCK_VR128Bit; |
951 | 0 | } |
952 | 0 | } |
953 | | |
954 | 0 | static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { |
955 | 0 | SystemZOperand &Operand = (SystemZOperand&)GOp; |
956 | 0 | if (Kind == InvalidMatchClass) |
957 | 0 | return MCTargetAsmParser::Match_InvalidOperand; |
958 | | |
959 | 0 | if (Operand.isToken()) |
960 | 0 | return isSubclass(matchTokenString(Operand.getToken()), Kind) ? |
961 | 0 | MCTargetAsmParser::Match_Success : |
962 | 0 | MCTargetAsmParser::Match_InvalidOperand; |
963 | | |
964 | | // 'ADDR128' class |
965 | 0 | if (Kind == MCK_ADDR128) { |
966 | 0 | if (Operand.isADDR128()) |
967 | 0 | return MCTargetAsmParser::Match_Success; |
968 | 0 | } |
969 | | |
970 | | // 'ADDR32' class |
971 | 0 | if (Kind == MCK_ADDR32) { |
972 | 0 | if (Operand.isADDR32()) |
973 | 0 | return MCTargetAsmParser::Match_Success; |
974 | 0 | } |
975 | | |
976 | | // 'ADDR64' class |
977 | 0 | if (Kind == MCK_ADDR64) { |
978 | 0 | if (Operand.isADDR64()) |
979 | 0 | return MCTargetAsmParser::Match_Success; |
980 | 0 | } |
981 | | |
982 | | // 'AccessReg' class |
983 | 0 | if (Kind == MCK_AccessReg) { |
984 | 0 | if (Operand.isAccessReg()) |
985 | 0 | return MCTargetAsmParser::Match_Success; |
986 | 0 | } |
987 | | |
988 | | // 'BDAddr32Disp12' class |
989 | 0 | if (Kind == MCK_BDAddr32Disp12) { |
990 | 0 | if (Operand.isBDAddr32Disp12()) |
991 | 0 | return MCTargetAsmParser::Match_Success; |
992 | 0 | } |
993 | | |
994 | | // 'BDAddr32Disp20' class |
995 | 0 | if (Kind == MCK_BDAddr32Disp20) { |
996 | 0 | if (Operand.isBDAddr32Disp20()) |
997 | 0 | return MCTargetAsmParser::Match_Success; |
998 | 0 | } |
999 | | |
1000 | | // 'BDAddr64Disp12' class |
1001 | 0 | if (Kind == MCK_BDAddr64Disp12) { |
1002 | 0 | if (Operand.isBDAddr64Disp12()) |
1003 | 0 | return MCTargetAsmParser::Match_Success; |
1004 | 0 | } |
1005 | | |
1006 | | // 'BDAddr64Disp20' class |
1007 | 0 | if (Kind == MCK_BDAddr64Disp20) { |
1008 | 0 | if (Operand.isBDAddr64Disp20()) |
1009 | 0 | return MCTargetAsmParser::Match_Success; |
1010 | 0 | } |
1011 | | |
1012 | | // 'BDLAddr64Disp12Len8' class |
1013 | 0 | if (Kind == MCK_BDLAddr64Disp12Len8) { |
1014 | 0 | if (Operand.isBDLAddr64Disp12Len8()) |
1015 | 0 | return MCTargetAsmParser::Match_Success; |
1016 | 0 | } |
1017 | | |
1018 | | // 'BDVAddr64Disp12' class |
1019 | 0 | if (Kind == MCK_BDVAddr64Disp12) { |
1020 | 0 | if (Operand.isBDVAddr64Disp12()) |
1021 | 0 | return MCTargetAsmParser::Match_Success; |
1022 | 0 | } |
1023 | | |
1024 | | // 'BDXAddr64Disp12' class |
1025 | 0 | if (Kind == MCK_BDXAddr64Disp12) { |
1026 | 0 | if (Operand.isBDXAddr64Disp12()) |
1027 | 0 | return MCTargetAsmParser::Match_Success; |
1028 | 0 | } |
1029 | | |
1030 | | // 'BDXAddr64Disp20' class |
1031 | 0 | if (Kind == MCK_BDXAddr64Disp20) { |
1032 | 0 | if (Operand.isBDXAddr64Disp20()) |
1033 | 0 | return MCTargetAsmParser::Match_Success; |
1034 | 0 | } |
1035 | | |
1036 | | // 'FP128' class |
1037 | 0 | if (Kind == MCK_FP128) { |
1038 | 0 | if (Operand.isFP128()) |
1039 | 0 | return MCTargetAsmParser::Match_Success; |
1040 | 0 | } |
1041 | | |
1042 | | // 'FP32' class |
1043 | 0 | if (Kind == MCK_FP32) { |
1044 | 0 | if (Operand.isFP32()) |
1045 | 0 | return MCTargetAsmParser::Match_Success; |
1046 | 0 | } |
1047 | | |
1048 | | // 'FP64' class |
1049 | 0 | if (Kind == MCK_FP64) { |
1050 | 0 | if (Operand.isFP64()) |
1051 | 0 | return MCTargetAsmParser::Match_Success; |
1052 | 0 | } |
1053 | | |
1054 | | // 'GR128' class |
1055 | 0 | if (Kind == MCK_GR128) { |
1056 | 0 | if (Operand.isGR128()) |
1057 | 0 | return MCTargetAsmParser::Match_Success; |
1058 | 0 | } |
1059 | | |
1060 | | // 'GR32' class |
1061 | 0 | if (Kind == MCK_GR32) { |
1062 | 0 | if (Operand.isGR32()) |
1063 | 0 | return MCTargetAsmParser::Match_Success; |
1064 | 0 | } |
1065 | | |
1066 | | // 'GR64' class |
1067 | 0 | if (Kind == MCK_GR64) { |
1068 | 0 | if (Operand.isGR64()) |
1069 | 0 | return MCTargetAsmParser::Match_Success; |
1070 | 0 | } |
1071 | | |
1072 | | // 'GRH32' class |
1073 | 0 | if (Kind == MCK_GRH32) { |
1074 | 0 | if (Operand.isGRH32()) |
1075 | 0 | return MCTargetAsmParser::Match_Success; |
1076 | 0 | } |
1077 | | |
1078 | | // 'GRX32' class |
1079 | 0 | if (Kind == MCK_GRX32) { |
1080 | 0 | if (Operand.isGRX32()) |
1081 | 0 | return MCTargetAsmParser::Match_Success; |
1082 | 0 | } |
1083 | | |
1084 | | // 'Imm' class |
1085 | 0 | if (Kind == MCK_Imm) { |
1086 | 0 | if (Operand.isImm()) |
1087 | 0 | return MCTargetAsmParser::Match_Success; |
1088 | 0 | } |
1089 | | |
1090 | | // 'PCRel16' class |
1091 | 0 | if (Kind == MCK_PCRel16) { |
1092 | 0 | if (Operand.isImm()) |
1093 | 0 | return MCTargetAsmParser::Match_Success; |
1094 | 0 | } |
1095 | | |
1096 | | // 'PCRel32' class |
1097 | 0 | if (Kind == MCK_PCRel32) { |
1098 | 0 | if (Operand.isImm()) |
1099 | 0 | return MCTargetAsmParser::Match_Success; |
1100 | 0 | } |
1101 | | |
1102 | | // 'PCRelTLS16' class |
1103 | 0 | if (Kind == MCK_PCRelTLS16) { |
1104 | 0 | if (Operand.isImmTLS()) |
1105 | 0 | return MCTargetAsmParser::Match_Success; |
1106 | 0 | } |
1107 | | |
1108 | | // 'PCRelTLS32' class |
1109 | 0 | if (Kind == MCK_PCRelTLS32) { |
1110 | 0 | if (Operand.isImmTLS()) |
1111 | 0 | return MCTargetAsmParser::Match_Success; |
1112 | 0 | } |
1113 | | |
1114 | | // 'S16Imm' class |
1115 | 0 | if (Kind == MCK_S16Imm) { |
1116 | 0 | if (Operand.isS16Imm()) |
1117 | 0 | return MCTargetAsmParser::Match_Success; |
1118 | 0 | } |
1119 | | |
1120 | | // 'S32Imm' class |
1121 | 0 | if (Kind == MCK_S32Imm) { |
1122 | 0 | if (Operand.isS32Imm()) |
1123 | 0 | return MCTargetAsmParser::Match_Success; |
1124 | 0 | } |
1125 | | |
1126 | | // 'S8Imm' class |
1127 | 0 | if (Kind == MCK_S8Imm) { |
1128 | 0 | if (Operand.isS8Imm()) |
1129 | 0 | return MCTargetAsmParser::Match_Success; |
1130 | 0 | } |
1131 | | |
1132 | | // 'U12Imm' class |
1133 | 0 | if (Kind == MCK_U12Imm) { |
1134 | 0 | if (Operand.isU12Imm()) |
1135 | 0 | return MCTargetAsmParser::Match_Success; |
1136 | 0 | } |
1137 | | |
1138 | | // 'U16Imm' class |
1139 | 0 | if (Kind == MCK_U16Imm) { |
1140 | 0 | if (Operand.isU16Imm()) |
1141 | 0 | return MCTargetAsmParser::Match_Success; |
1142 | 0 | } |
1143 | | |
1144 | | // 'U1Imm' class |
1145 | 0 | if (Kind == MCK_U1Imm) { |
1146 | 0 | if (Operand.isU1Imm()) |
1147 | 0 | return MCTargetAsmParser::Match_Success; |
1148 | 0 | } |
1149 | | |
1150 | | // 'U2Imm' class |
1151 | 0 | if (Kind == MCK_U2Imm) { |
1152 | 0 | if (Operand.isU2Imm()) |
1153 | 0 | return MCTargetAsmParser::Match_Success; |
1154 | 0 | } |
1155 | | |
1156 | | // 'U32Imm' class |
1157 | 0 | if (Kind == MCK_U32Imm) { |
1158 | 0 | if (Operand.isU32Imm()) |
1159 | 0 | return MCTargetAsmParser::Match_Success; |
1160 | 0 | } |
1161 | | |
1162 | | // 'U3Imm' class |
1163 | 0 | if (Kind == MCK_U3Imm) { |
1164 | 0 | if (Operand.isU3Imm()) |
1165 | 0 | return MCTargetAsmParser::Match_Success; |
1166 | 0 | } |
1167 | | |
1168 | | // 'U4Imm' class |
1169 | 0 | if (Kind == MCK_U4Imm) { |
1170 | 0 | if (Operand.isU4Imm()) |
1171 | 0 | return MCTargetAsmParser::Match_Success; |
1172 | 0 | } |
1173 | | |
1174 | | // 'U6Imm' class |
1175 | 0 | if (Kind == MCK_U6Imm) { |
1176 | 0 | if (Operand.isU6Imm()) |
1177 | 0 | return MCTargetAsmParser::Match_Success; |
1178 | 0 | } |
1179 | | |
1180 | | // 'U8Imm' class |
1181 | 0 | if (Kind == MCK_U8Imm) { |
1182 | 0 | if (Operand.isU8Imm()) |
1183 | 0 | return MCTargetAsmParser::Match_Success; |
1184 | 0 | } |
1185 | | |
1186 | | // 'VF128' class |
1187 | 0 | if (Kind == MCK_VF128) { |
1188 | 0 | if (Operand.isVF128()) |
1189 | 0 | return MCTargetAsmParser::Match_Success; |
1190 | 0 | } |
1191 | | |
1192 | | // 'VR128' class |
1193 | 0 | if (Kind == MCK_VR128) { |
1194 | 0 | if (Operand.isVR128()) |
1195 | 0 | return MCTargetAsmParser::Match_Success; |
1196 | 0 | } |
1197 | | |
1198 | | // 'VR32' class |
1199 | 0 | if (Kind == MCK_VR32) { |
1200 | 0 | if (Operand.isVR32()) |
1201 | 0 | return MCTargetAsmParser::Match_Success; |
1202 | 0 | } |
1203 | | |
1204 | | // 'VR64' class |
1205 | 0 | if (Kind == MCK_VR64) { |
1206 | 0 | if (Operand.isVR64()) |
1207 | 0 | return MCTargetAsmParser::Match_Success; |
1208 | 0 | } |
1209 | | |
1210 | 0 | if (Operand.isReg()) { |
1211 | 0 | MatchClassKind OpKind; |
1212 | 0 | switch (Operand.getReg()) { |
1213 | 0 | default: OpKind = InvalidMatchClass; break; |
1214 | 0 | case SystemZ::R0L: OpKind = MCK_GR32Bit; break; |
1215 | 0 | case SystemZ::R1L: OpKind = MCK_ADDR32Bit; break; |
1216 | 0 | case SystemZ::R2L: OpKind = MCK_ADDR32Bit; break; |
1217 | 0 | case SystemZ::R3L: OpKind = MCK_ADDR32Bit; break; |
1218 | 0 | case SystemZ::R4L: OpKind = MCK_ADDR32Bit; break; |
1219 | 0 | case SystemZ::R5L: OpKind = MCK_ADDR32Bit; break; |
1220 | 0 | case SystemZ::R6L: OpKind = MCK_ADDR32Bit; break; |
1221 | 0 | case SystemZ::R7L: OpKind = MCK_ADDR32Bit; break; |
1222 | 0 | case SystemZ::R8L: OpKind = MCK_ADDR32Bit; break; |
1223 | 0 | case SystemZ::R9L: OpKind = MCK_ADDR32Bit; break; |
1224 | 0 | case SystemZ::R10L: OpKind = MCK_ADDR32Bit; break; |
1225 | 0 | case SystemZ::R11L: OpKind = MCK_ADDR32Bit; break; |
1226 | 0 | case SystemZ::R12L: OpKind = MCK_ADDR32Bit; break; |
1227 | 0 | case SystemZ::R13L: OpKind = MCK_ADDR32Bit; break; |
1228 | 0 | case SystemZ::R14L: OpKind = MCK_ADDR32Bit; break; |
1229 | 0 | case SystemZ::R15L: OpKind = MCK_ADDR32Bit; break; |
1230 | 0 | case SystemZ::R0H: OpKind = MCK_GRH32Bit; break; |
1231 | 0 | case SystemZ::R1H: OpKind = MCK_GRH32Bit; break; |
1232 | 0 | case SystemZ::R2H: OpKind = MCK_GRH32Bit; break; |
1233 | 0 | case SystemZ::R3H: OpKind = MCK_GRH32Bit; break; |
1234 | 0 | case SystemZ::R4H: OpKind = MCK_GRH32Bit; break; |
1235 | 0 | case SystemZ::R5H: OpKind = MCK_GRH32Bit; break; |
1236 | 0 | case SystemZ::R6H: OpKind = MCK_GRH32Bit; break; |
1237 | 0 | case SystemZ::R7H: OpKind = MCK_GRH32Bit; break; |
1238 | 0 | case SystemZ::R8H: OpKind = MCK_GRH32Bit; break; |
1239 | 0 | case SystemZ::R9H: OpKind = MCK_GRH32Bit; break; |
1240 | 0 | case SystemZ::R10H: OpKind = MCK_GRH32Bit; break; |
1241 | 0 | case SystemZ::R11H: OpKind = MCK_GRH32Bit; break; |
1242 | 0 | case SystemZ::R12H: OpKind = MCK_GRH32Bit; break; |
1243 | 0 | case SystemZ::R13H: OpKind = MCK_GRH32Bit; break; |
1244 | 0 | case SystemZ::R14H: OpKind = MCK_GRH32Bit; break; |
1245 | 0 | case SystemZ::R15H: OpKind = MCK_GRH32Bit; break; |
1246 | 0 | case SystemZ::R0D: OpKind = MCK_GR64Bit; break; |
1247 | 0 | case SystemZ::R1D: OpKind = MCK_ADDR64Bit; break; |
1248 | 0 | case SystemZ::R2D: OpKind = MCK_ADDR64Bit; break; |
1249 | 0 | case SystemZ::R3D: OpKind = MCK_ADDR64Bit; break; |
1250 | 0 | case SystemZ::R4D: OpKind = MCK_ADDR64Bit; break; |
1251 | 0 | case SystemZ::R5D: OpKind = MCK_ADDR64Bit; break; |
1252 | 0 | case SystemZ::R6D: OpKind = MCK_ADDR64Bit; break; |
1253 | 0 | case SystemZ::R7D: OpKind = MCK_ADDR64Bit; break; |
1254 | 0 | case SystemZ::R8D: OpKind = MCK_ADDR64Bit; break; |
1255 | 0 | case SystemZ::R9D: OpKind = MCK_ADDR64Bit; break; |
1256 | 0 | case SystemZ::R10D: OpKind = MCK_ADDR64Bit; break; |
1257 | 0 | case SystemZ::R11D: OpKind = MCK_ADDR64Bit; break; |
1258 | 0 | case SystemZ::R12D: OpKind = MCK_ADDR64Bit; break; |
1259 | 0 | case SystemZ::R13D: OpKind = MCK_ADDR64Bit; break; |
1260 | 0 | case SystemZ::R14D: OpKind = MCK_ADDR64Bit; break; |
1261 | 0 | case SystemZ::R15D: OpKind = MCK_ADDR64Bit; break; |
1262 | 0 | case SystemZ::R0Q: OpKind = MCK_GR128Bit; break; |
1263 | 0 | case SystemZ::R2Q: OpKind = MCK_ADDR128Bit; break; |
1264 | 0 | case SystemZ::R4Q: OpKind = MCK_ADDR128Bit; break; |
1265 | 0 | case SystemZ::R6Q: OpKind = MCK_ADDR128Bit; break; |
1266 | 0 | case SystemZ::R8Q: OpKind = MCK_ADDR128Bit; break; |
1267 | 0 | case SystemZ::R10Q: OpKind = MCK_ADDR128Bit; break; |
1268 | 0 | case SystemZ::R12Q: OpKind = MCK_ADDR128Bit; break; |
1269 | 0 | case SystemZ::R14Q: OpKind = MCK_ADDR128Bit; break; |
1270 | 0 | case SystemZ::F0S: OpKind = MCK_FP32Bit; break; |
1271 | 0 | case SystemZ::F1S: OpKind = MCK_FP32Bit; break; |
1272 | 0 | case SystemZ::F2S: OpKind = MCK_FP32Bit; break; |
1273 | 0 | case SystemZ::F3S: OpKind = MCK_FP32Bit; break; |
1274 | 0 | case SystemZ::F4S: OpKind = MCK_FP32Bit; break; |
1275 | 0 | case SystemZ::F5S: OpKind = MCK_FP32Bit; break; |
1276 | 0 | case SystemZ::F6S: OpKind = MCK_FP32Bit; break; |
1277 | 0 | case SystemZ::F7S: OpKind = MCK_FP32Bit; break; |
1278 | 0 | case SystemZ::F8S: OpKind = MCK_FP32Bit; break; |
1279 | 0 | case SystemZ::F9S: OpKind = MCK_FP32Bit; break; |
1280 | 0 | case SystemZ::F10S: OpKind = MCK_FP32Bit; break; |
1281 | 0 | case SystemZ::F11S: OpKind = MCK_FP32Bit; break; |
1282 | 0 | case SystemZ::F12S: OpKind = MCK_FP32Bit; break; |
1283 | 0 | case SystemZ::F13S: OpKind = MCK_FP32Bit; break; |
1284 | 0 | case SystemZ::F14S: OpKind = MCK_FP32Bit; break; |
1285 | 0 | case SystemZ::F15S: OpKind = MCK_FP32Bit; break; |
1286 | 0 | case SystemZ::F0D: OpKind = MCK_FP64Bit; break; |
1287 | 0 | case SystemZ::F1D: OpKind = MCK_FP64Bit; break; |
1288 | 0 | case SystemZ::F2D: OpKind = MCK_FP64Bit; break; |
1289 | 0 | case SystemZ::F3D: OpKind = MCK_FP64Bit; break; |
1290 | 0 | case SystemZ::F4D: OpKind = MCK_FP64Bit; break; |
1291 | 0 | case SystemZ::F5D: OpKind = MCK_FP64Bit; break; |
1292 | 0 | case SystemZ::F6D: OpKind = MCK_FP64Bit; break; |
1293 | 0 | case SystemZ::F7D: OpKind = MCK_FP64Bit; break; |
1294 | 0 | case SystemZ::F8D: OpKind = MCK_FP64Bit; break; |
1295 | 0 | case SystemZ::F9D: OpKind = MCK_FP64Bit; break; |
1296 | 0 | case SystemZ::F10D: OpKind = MCK_FP64Bit; break; |
1297 | 0 | case SystemZ::F11D: OpKind = MCK_FP64Bit; break; |
1298 | 0 | case SystemZ::F12D: OpKind = MCK_FP64Bit; break; |
1299 | 0 | case SystemZ::F13D: OpKind = MCK_FP64Bit; break; |
1300 | 0 | case SystemZ::F14D: OpKind = MCK_FP64Bit; break; |
1301 | 0 | case SystemZ::F15D: OpKind = MCK_FP64Bit; break; |
1302 | 0 | case SystemZ::F16S: OpKind = MCK_VR32Bit; break; |
1303 | 0 | case SystemZ::F17S: OpKind = MCK_VR32Bit; break; |
1304 | 0 | case SystemZ::F18S: OpKind = MCK_VR32Bit; break; |
1305 | 0 | case SystemZ::F19S: OpKind = MCK_VR32Bit; break; |
1306 | 0 | case SystemZ::F20S: OpKind = MCK_VR32Bit; break; |
1307 | 0 | case SystemZ::F21S: OpKind = MCK_VR32Bit; break; |
1308 | 0 | case SystemZ::F22S: OpKind = MCK_VR32Bit; break; |
1309 | 0 | case SystemZ::F23S: OpKind = MCK_VR32Bit; break; |
1310 | 0 | case SystemZ::F24S: OpKind = MCK_VR32Bit; break; |
1311 | 0 | case SystemZ::F25S: OpKind = MCK_VR32Bit; break; |
1312 | 0 | case SystemZ::F26S: OpKind = MCK_VR32Bit; break; |
1313 | 0 | case SystemZ::F27S: OpKind = MCK_VR32Bit; break; |
1314 | 0 | case SystemZ::F28S: OpKind = MCK_VR32Bit; break; |
1315 | 0 | case SystemZ::F29S: OpKind = MCK_VR32Bit; break; |
1316 | 0 | case SystemZ::F30S: OpKind = MCK_VR32Bit; break; |
1317 | 0 | case SystemZ::F31S: OpKind = MCK_VR32Bit; break; |
1318 | 0 | case SystemZ::F16D: OpKind = MCK_VR64Bit; break; |
1319 | 0 | case SystemZ::F17D: OpKind = MCK_VR64Bit; break; |
1320 | 0 | case SystemZ::F18D: OpKind = MCK_VR64Bit; break; |
1321 | 0 | case SystemZ::F19D: OpKind = MCK_VR64Bit; break; |
1322 | 0 | case SystemZ::F20D: OpKind = MCK_VR64Bit; break; |
1323 | 0 | case SystemZ::F21D: OpKind = MCK_VR64Bit; break; |
1324 | 0 | case SystemZ::F22D: OpKind = MCK_VR64Bit; break; |
1325 | 0 | case SystemZ::F23D: OpKind = MCK_VR64Bit; break; |
1326 | 0 | case SystemZ::F24D: OpKind = MCK_VR64Bit; break; |
1327 | 0 | case SystemZ::F25D: OpKind = MCK_VR64Bit; break; |
1328 | 0 | case SystemZ::F26D: OpKind = MCK_VR64Bit; break; |
1329 | 0 | case SystemZ::F27D: OpKind = MCK_VR64Bit; break; |
1330 | 0 | case SystemZ::F28D: OpKind = MCK_VR64Bit; break; |
1331 | 0 | case SystemZ::F29D: OpKind = MCK_VR64Bit; break; |
1332 | 0 | case SystemZ::F30D: OpKind = MCK_VR64Bit; break; |
1333 | 0 | case SystemZ::F31D: OpKind = MCK_VR64Bit; break; |
1334 | 0 | case SystemZ::F0Q: OpKind = MCK_FP128Bit; break; |
1335 | 0 | case SystemZ::F1Q: OpKind = MCK_FP128Bit; break; |
1336 | 0 | case SystemZ::F4Q: OpKind = MCK_FP128Bit; break; |
1337 | 0 | case SystemZ::F5Q: OpKind = MCK_FP128Bit; break; |
1338 | 0 | case SystemZ::F8Q: OpKind = MCK_FP128Bit; break; |
1339 | 0 | case SystemZ::F9Q: OpKind = MCK_FP128Bit; break; |
1340 | 0 | case SystemZ::F12Q: OpKind = MCK_FP128Bit; break; |
1341 | 0 | case SystemZ::F13Q: OpKind = MCK_FP128Bit; break; |
1342 | 0 | case SystemZ::V0: OpKind = MCK_VF128Bit; break; |
1343 | 0 | case SystemZ::V1: OpKind = MCK_VF128Bit; break; |
1344 | 0 | case SystemZ::V2: OpKind = MCK_VF128Bit; break; |
1345 | 0 | case SystemZ::V3: OpKind = MCK_VF128Bit; break; |
1346 | 0 | case SystemZ::V4: OpKind = MCK_VF128Bit; break; |
1347 | 0 | case SystemZ::V5: OpKind = MCK_VF128Bit; break; |
1348 | 0 | case SystemZ::V6: OpKind = MCK_VF128Bit; break; |
1349 | 0 | case SystemZ::V7: OpKind = MCK_VF128Bit; break; |
1350 | 0 | case SystemZ::V8: OpKind = MCK_VF128Bit; break; |
1351 | 0 | case SystemZ::V9: OpKind = MCK_VF128Bit; break; |
1352 | 0 | case SystemZ::V10: OpKind = MCK_VF128Bit; break; |
1353 | 0 | case SystemZ::V11: OpKind = MCK_VF128Bit; break; |
1354 | 0 | case SystemZ::V12: OpKind = MCK_VF128Bit; break; |
1355 | 0 | case SystemZ::V13: OpKind = MCK_VF128Bit; break; |
1356 | 0 | case SystemZ::V14: OpKind = MCK_VF128Bit; break; |
1357 | 0 | case SystemZ::V15: OpKind = MCK_VF128Bit; break; |
1358 | 0 | case SystemZ::V16: OpKind = MCK_VR128Bit; break; |
1359 | 0 | case SystemZ::V17: OpKind = MCK_VR128Bit; break; |
1360 | 0 | case SystemZ::V18: OpKind = MCK_VR128Bit; break; |
1361 | 0 | case SystemZ::V19: OpKind = MCK_VR128Bit; break; |
1362 | 0 | case SystemZ::V20: OpKind = MCK_VR128Bit; break; |
1363 | 0 | case SystemZ::V21: OpKind = MCK_VR128Bit; break; |
1364 | 0 | case SystemZ::V22: OpKind = MCK_VR128Bit; break; |
1365 | 0 | case SystemZ::V23: OpKind = MCK_VR128Bit; break; |
1366 | 0 | case SystemZ::V24: OpKind = MCK_VR128Bit; break; |
1367 | 0 | case SystemZ::V25: OpKind = MCK_VR128Bit; break; |
1368 | 0 | case SystemZ::V26: OpKind = MCK_VR128Bit; break; |
1369 | 0 | case SystemZ::V27: OpKind = MCK_VR128Bit; break; |
1370 | 0 | case SystemZ::V28: OpKind = MCK_VR128Bit; break; |
1371 | 0 | case SystemZ::V29: OpKind = MCK_VR128Bit; break; |
1372 | 0 | case SystemZ::V30: OpKind = MCK_VR128Bit; break; |
1373 | 0 | case SystemZ::V31: OpKind = MCK_VR128Bit; break; |
1374 | 0 | case SystemZ::CC: OpKind = MCK_CCRegs; break; |
1375 | 0 | } |
1376 | 0 | return isSubclass(OpKind, Kind) ? MCTargetAsmParser::Match_Success : |
1377 | 0 | MCTargetAsmParser::Match_InvalidOperand; |
1378 | 0 | } |
1379 | | |
1380 | 0 | return MCTargetAsmParser::Match_InvalidOperand; |
1381 | 0 | } |
1382 | | |
1383 | | uint64_t SystemZAsmParser:: |
1384 | 59 | ComputeAvailableFeatures(const FeatureBitset& FB) const { |
1385 | 59 | uint64_t Features = 0; |
1386 | 59 | if ((FB[SystemZ::FeatureDistinctOps])) |
1387 | 0 | Features |= Feature_FeatureDistinctOps; |
1388 | 59 | if ((FB[SystemZ::FeatureLoadStoreOnCond])) |
1389 | 0 | Features |= Feature_FeatureLoadStoreOnCond; |
1390 | 59 | if ((FB[SystemZ::FeatureHighWord])) |
1391 | 0 | Features |= Feature_FeatureHighWord; |
1392 | 59 | if ((FB[SystemZ::FeatureFPExtension])) |
1393 | 0 | Features |= Feature_FeatureFPExtension; |
1394 | 59 | if ((FB[SystemZ::FeaturePopulationCount])) |
1395 | 0 | Features |= Feature_FeaturePopulationCount; |
1396 | 59 | if ((FB[SystemZ::FeatureFastSerialization])) |
1397 | 0 | Features |= Feature_FeatureFastSerialization; |
1398 | 59 | if ((FB[SystemZ::FeatureInterlockedAccess1])) |
1399 | 0 | Features |= Feature_FeatureInterlockedAccess1; |
1400 | 59 | if ((FB[SystemZ::FeatureMiscellaneousExtensions])) |
1401 | 0 | Features |= Feature_FeatureMiscellaneousExtensions; |
1402 | 59 | if ((FB[SystemZ::FeatureTransactionalExecution])) |
1403 | 0 | Features |= Feature_FeatureTransactionalExecution; |
1404 | 59 | if ((FB[SystemZ::FeatureProcessorAssist])) |
1405 | 0 | Features |= Feature_FeatureProcessorAssist; |
1406 | 59 | if ((FB[SystemZ::FeatureVector])) |
1407 | 0 | Features |= Feature_FeatureVector; |
1408 | 59 | return Features; |
1409 | 59 | } |
1410 | | |
1411 | | static const char *const MnemonicTable = |
1412 | | "\001a\003adb\004adbr\003aeb\004aebr\003afi\002ag\003agf\004agfi\004agfr" |
1413 | | "\004aghi\005aghik\003agr\004agrk\004agsi\002ah\003ahi\004ahik\003ahy\003" |
1414 | | "aih\002al\003alc\004alcg\005alcgr\004alcr\004alfi\003alg\004algf\005alg" |
1415 | | "fi\005algfr\007alghsik\004algr\005algrk\006alhsik\003alr\004alrk\003aly" |
1416 | | "\002ar\003ark\003asi\004axbr\002ay\004basr\003bcr\003ber\004bher\003bhr" |
1417 | | "\004bler\004blhr\003blr\004bner\005bnher\004bnhr\005bnler\005bnlhr\004b" |
1418 | | "nlr\004bnor\003bor\002br\004bras\005brasl\003brc\004brcl\004brct\005brc" |
1419 | | "tg\001c\003cdb\004cdbr\005cdfbr\005cdgbr\006cdlfbr\006cdlgbr\003ceb\004" |
1420 | | "cebr\005cefbr\005cegbr\006celfbr\006celgbr\005cfdbr\005cfebr\003cfi\005" |
1421 | | "cfxbr\002cg\005cgdbr\005cgebr\003cgf\004cgfi\004cgfr\005cgfrl\003cgh\004" |
1422 | | "cghi\005cghrl\005cghsi\004cgij\005cgije\005cgijh\006cgijhe\005cgijl\006" |
1423 | | "cgijle\006cgijlh\006cgijne\006cgijnh\007cgijnhe\006cgijnl\007cgijnle\007" |
1424 | | "cgijnlh\003cgr\004cgrj\005cgrje\005cgrjh\006cgrjhe\005cgrjl\006cgrjle\006" |
1425 | | "cgrjlh\006cgrjne\006cgrjnh\007cgrjnhe\006cgrjnl\007cgrjnle\007cgrjnlh\004" |
1426 | | "cgrl\005cgxbr\002ch\003chf\005chhsi\003chi\004chrl\004chsi\003chy\003ci" |
1427 | | "h\003cij\004cije\004cijh\005cijhe\004cijl\005cijle\005cijlh\005cijne\005" |
1428 | | "cijnh\006cijnhe\005cijnl\006cijnle\006cijnlh\002cl\003clc\006clfdbr\006" |
1429 | | "clfebr\006clfhsi\004clfi\006clfxbr\003clg\006clgdbr\006clgebr\004clgf\005" |
1430 | | "clgfi\005clgfr\006clgfrl\006clghrl\006clghsi\005clgij\006clgije\006clgi" |
1431 | | "jh\007clgijhe\006clgijl\007clgijle\007clgijlh\007clgijne\007clgijnh\010" |
1432 | | "clgijnhe\007clgijnl\010clgijnle\010clgijnlh\004clgr\005clgrj\006clgrje\006" |
1433 | | "clgrjh\007clgrjhe\006clgrjl\007clgrjle\007clgrjlh\007clgrjne\007clgrjnh" |
1434 | | "\010clgrjnhe\007clgrjnl\010clgrjnle\010clgrjnlh\005clgrl\006clgxbr\004c" |
1435 | | "lhf\006clhhsi\005clhrl\003cli\004clih\004clij\005clije\005clijh\006clij" |
1436 | | "he\005clijl\006clijle\006clijlh\006clijne\006clijnh\007clijnhe\006clijn" |
1437 | | "l\007clijnle\007clijnlh\004cliy\003clr\004clrj\005clrje\005clrjh\006clr" |
1438 | | "jhe\005clrjl\006clrjle\006clrjlh\006clrjne\006clrjnh\007clrjnhe\006clrj" |
1439 | | "nl\007clrjnle\007clrjnlh\004clrl\004clst\003cly\005cpsdr\002cr\003crj\004" |
1440 | | "crje\004crjh\005crjhe\004crjl\005crjle\005crjlh\005crjne\005crjnh\006cr" |
1441 | | "jnhe\005crjnl\006crjnle\006crjnlh\003crl\002cs\003csg\003csy\004cxbr\005" |
1442 | | "cxfbr\005cxgbr\006cxlfbr\006cxlgbr\002cy\003ddb\004ddbr\003deb\004debr\002" |
1443 | | "dl\003dlg\004dlgr\003dlr\003dsg\004dsgf\005dsgfr\004dsgr\004dxbr\003ear" |
1444 | | "\004etnd\005fidbr\006fidbra\005fiebr\006fiebra\005fixbr\006fixbra\005fl" |
1445 | | "ogr\002ic\003icy\004iihf\004iihh\004iihl\004iilf\004iilh\004iill\003ipm" |
1446 | | "\001j\002je\002jg\003jge\003jgh\004jghe\003jgl\004jgle\004jglh\004jgne\004" |
1447 | | "jgnh\005jgnhe\004jgnl\005jgnle\005jgnlh\004jgno\003jgo\002jh\003jhe\002" |
1448 | | "jl\003jle\003jlh\003jne\003jnh\004jnhe\003jnl\004jnle\004jnlh\003jno\002" |
1449 | | "jo\001l\002la\003laa\004laag\004laal\005laalg\003lan\004lang\003lao\004" |
1450 | | "laog\004larl\003lax\004laxg\003lay\002lb\003lbh\003lbr\004lcbb\005lcdbr" |
1451 | | "\005lcdfr\005lcebr\005lcgfr\004lcgr\003lcr\005lcxbr\002ld\003lde\004lde" |
1452 | | "b\005ldebr\004ldgr\003ldr\005ldxbr\006ldxbra\003ldy\002le\005ledbr\006l" |
1453 | | "edbra\003ler\005lexbr\006lexbra\003ley\003lfh\002lg\003lgb\004lgbr\004l" |
1454 | | "gdr\003lgf\004lgfi\004lgfr\005lgfrl\003lgh\004lghi\004lghr\005lghrl\003" |
1455 | | "lgr\004lgrl\002lh\003lhh\003lhi\003lhr\004lhrl\003lhy\003llc\004llch\004" |
1456 | | "llcr\004llgc\005llgcr\004llgf\005llgfr\006llgfrl\004llgh\005llghr\006ll" |
1457 | | "ghrl\003llh\004llhh\004llhr\005llhrl\005llihf\005llihh\005llihl\005llil" |
1458 | | "f\005llilh\005llill\003lmg\005lndbr\005lndfr\005lnebr\005lngfr\004lngr\003" |
1459 | | "lnr\005lnxbr\003loc\004loce\004locg\005locge\005locgh\006locghe\005locg" |
1460 | | "l\006locgle\006locglh\006locgne\006locgnh\007locgnhe\006locgnl\007locgn" |
1461 | | "le\007locgnlh\006locgno\005locgo\005locgr\006locgre\006locgrh\007locgrh" |
1462 | | "e\006locgrl\007locgrle\007locgrlh\007locgrne\007locgrnh\010locgrnhe\007" |
1463 | | "locgrnl\010locgrnle\010locgrnlh\007locgrno\006locgro\004loch\005loche\004" |
1464 | | "locl\005locle\005loclh\005locne\005locnh\006locnhe\005locnl\006locnle\006" |
1465 | | "locnlh\005locno\004loco\004locr\005locre\005locrh\006locrhe\005locrl\006" |
1466 | | "locrle\006locrlh\006locrne\006locrnh\007locrnhe\006locrnl\007locrnle\007" |
1467 | | "locrnlh\006locrno\005locro\005lpdbr\005lpdfr\005lpebr\005lpgfr\004lpgr\003" |
1468 | | "lpr\005lpxbr\002lr\003lrl\003lrv\004lrvg\005lrvgr\004lrvr\002lt\005ltdb" |
1469 | | "r\005ltebr\003ltg\004ltgf\005ltgfr\004ltgr\003ltr\005ltxbr\004lxdb\005l" |
1470 | | "xdbr\004lxeb\005lxebr\003lxr\002ly\004lzdr\004lzer\004lzxr\004madb\005m" |
1471 | | "adbr\004maeb\005maebr\003mdb\004mdbr\004mdeb\005mdebr\004meeb\005meebr\004" |
1472 | | "mghi\002mh\003mhi\003mhy\003mlg\004mlgr\002ms\004msdb\005msdbr\004mseb\005" |
1473 | | "msebr\004msfi\003msg\004msgf\005msgfi\005msgfr\004msgr\003msr\003msy\003" |
1474 | | "mvc\005mvghi\005mvhhi\004mvhi\003mvi\004mviy\004mvst\004mxbr\004mxdb\005" |
1475 | | "mxdbr\001n\002nc\002ng\003ngr\004ngrk\002ni\004nihf\004nihh\004nihl\004" |
1476 | | "nilf\004nilh\004nill\003niy\002nr\003nrk\005ntstg\002ny\001o\002oc\002o" |
1477 | | "g\003ogr\004ogrk\002oi\004oihf\004oihh\004oihl\004oilf\004oilh\004oill\003" |
1478 | | "oiy\002or\003ork\002oy\003pfd\005pfdrl\006popcnt\003ppa\005risbg\006ris" |
1479 | | "bgn\006risbhg\006risblg\003rll\004rllg\005rnsbg\005rosbg\005rxsbg\001s\003" |
1480 | | "sdb\004sdbr\003seb\004sebr\002sg\003sgf\004sgfr\003sgr\004sgrk\002sh\003" |
1481 | | "shy\002sl\003slb\004slbg\005slbgr\004slbr\004slfi\003slg\004slgf\005slg" |
1482 | | "fi\005slgfr\004slgr\005slgrk\003sll\004sllg\004sllk\003slr\004slrk\003s" |
1483 | | "ly\004sqdb\005sqdbr\004sqeb\005sqebr\005sqxbr\002sr\003sra\004srag\004s" |
1484 | | "rak\003srk\003srl\004srlg\004srlk\004srst\002st\003stc\004stch\004stck\005" |
1485 | | "stcke\005stckf\004stcy\003std\004stdy\003ste\004stey\004stfh\005stfle\003" |
1486 | | "stg\005stgrl\003sth\004sthh\005sthrl\004sthy\004stmg\004stoc\005stoce\005" |
1487 | | "stocg\006stocge\006stocgh\007stocghe\006stocgl\007stocgle\007stocglh\007" |
1488 | | "stocgne\007stocgnh\010stocgnhe\007stocgnl\010stocgnle\010stocgnlh\007st" |
1489 | | "ocgno\006stocgo\005stoch\006stoche\005stocl\006stocle\006stoclh\006stoc" |
1490 | | "ne\006stocnh\007stocnhe\006stocnl\007stocnle\007stocnlh\006stocno\005st" |
1491 | | "oco\004strl\004strv\005strvg\003sty\004sxbr\002sy\006tabort\006tbegin\007" |
1492 | | "tbeginc\004tend\002tm\004tmhh\004tmhl\004tmlh\004tmll\003tmy\003vab\005" |
1493 | | "vaccb\006vacccq\005vaccf\005vaccg\005vacch\005vaccq\004vacq\003vaf\003v" |
1494 | | "ag\003vah\003vaq\005vavgb\005vavgf\005vavgg\005vavgh\006vavglb\006vavgl" |
1495 | | "f\006vavglg\006vavglh\005vcdgb\006vcdlgb\005vceqb\006vceqbs\005vceqf\006" |
1496 | | "vceqfs\005vceqg\006vceqgs\005vceqh\006vceqhs\005vcgdb\004vchb\005vchbs\004" |
1497 | | "vchf\005vchfs\004vchg\005vchgs\004vchh\005vchhs\005vchlb\006vchlbs\005v" |
1498 | | "chlf\006vchlfs\005vchlg\006vchlgs\005vchlh\006vchlhs\005vcksm\006vclgdb" |
1499 | | "\005vclzb\005vclzf\005vclzg\005vclzh\005vctzb\005vctzf\005vctzg\005vctz" |
1500 | | "h\004vecb\004vecf\004vecg\004vech\005veclb\005veclf\005veclg\005veclh\006" |
1501 | | "verimb\006verimf\006verimg\006verimh\006verllb\006verllf\006verllg\006v" |
1502 | | "erllh\007verllvb\007verllvf\007verllvg\007verllvh\005veslb\005veslf\005" |
1503 | | "veslg\005veslh\006veslvb\006veslvf\006veslvg\006veslvh\006vesrab\006ves" |
1504 | | "raf\006vesrag\006vesrah\007vesravb\007vesravf\007vesravg\007vesravh\006" |
1505 | | "vesrlb\006vesrlf\006vesrlg\006vesrlh\007vesrlvb\007vesrlvf\007vesrlvg\007" |
1506 | | "vesrlvh\005vfadb\005vfaeb\006vfaebs\005vfaef\006vfaefs\005vfaeh\006vfae" |
1507 | | "hs\006vfaezb\007vfaezbs\006vfaezf\007vfaezfs\006vfaezh\007vfaezhs\006vf" |
1508 | | "cedb\007vfcedbs\006vfchdb\007vfchdbs\007vfchedb\010vfchedbs\005vfddb\005" |
1509 | | "vfeeb\006vfeebs\005vfeef\006vfeefs\005vfeeh\006vfeehs\006vfeezb\007vfee" |
1510 | | "zbs\006vfeezf\007vfeezfs\006vfeezh\007vfeezhs\006vfeneb\007vfenebs\006v" |
1511 | | "fenef\007vfenefs\006vfeneh\007vfenehs\007vfenezb\010vfenezbs\007vfenezf" |
1512 | | "\010vfenezfs\007vfenezh\010vfenezhs\005vfidb\006vflcdb\006vflndb\006vfl" |
1513 | | "pdb\006vfmadb\005vfmdb\006vfmsdb\005vfsdb\006vfsqdb\007vftcidb\004vgbm\004" |
1514 | | "vgef\004vgeg\006vgfmab\006vgfmaf\006vgfmag\006vgfmah\005vgfmb\005vgfmf\005" |
1515 | | "vgfmg\005vgfmh\004vgmb\004vgmf\004vgmg\004vgmh\006vistrb\007vistrbs\006" |
1516 | | "vistrf\007vistrfs\006vistrh\007vistrhs\002vl\004vlbb\004vlcb\004vlcf\004" |
1517 | | "vlcg\004vlch\005vldeb\004vleb\005vledb\004vlef\004vleg\004vleh\005vleib" |
1518 | | "\005vleif\005vleig\005vleih\005vlgvb\005vlgvf\005vlgvg\005vlgvh\003vll\006" |
1519 | | "vllezb\006vllezf\006vllezg\006vllezh\003vlm\004vlpb\004vlpf\004vlpg\004" |
1520 | | "vlph\003vlr\006vlrepb\006vlrepf\006vlrepg\006vlreph\005vlvgb\005vlvgf\005" |
1521 | | "vlvgg\005vlvgh\005vlvgp\005vmaeb\005vmaef\005vmaeh\005vmahb\005vmahf\005" |
1522 | | "vmahh\005vmalb\006vmaleb\006vmalef\006vmaleh\005vmalf\006vmalhb\006vmal" |
1523 | | "hf\006vmalhh\006vmalhw\006vmalob\006vmalof\006vmaloh\005vmaob\005vmaof\005" |
1524 | | "vmaoh\004vmeb\004vmef\004vmeh\004vmhb\004vmhf\004vmhh\004vmlb\005vmleb\005" |
1525 | | "vmlef\005vmleh\004vmlf\005vmlhb\005vmlhf\005vmlhh\005vmlhw\005vmlob\005" |
1526 | | "vmlof\005vmloh\004vmnb\004vmnf\004vmng\004vmnh\005vmnlb\005vmnlf\005vmn" |
1527 | | "lg\005vmnlh\004vmob\004vmof\004vmoh\005vmrhb\005vmrhf\005vmrhg\005vmrhh" |
1528 | | "\005vmrlb\005vmrlf\005vmrlg\005vmrlh\004vmxb\004vmxf\004vmxg\004vmxh\005" |
1529 | | "vmxlb\005vmxlf\005vmxlg\005vmxlh\002vn\003vnc\003vno\002vo\004vone\004v" |
1530 | | "pdi\005vperm\004vpkf\004vpkg\004vpkh\006vpklsf\007vpklsfs\006vpklsg\007" |
1531 | | "vpklsgs\006vpklsh\007vpklshs\005vpksf\006vpksfs\005vpksg\006vpksgs\005v" |
1532 | | "pksh\006vpkshs\006vpopct\005vrepb\005vrepf\005vrepg\005vreph\006vrepib\006" |
1533 | | "vrepif\006vrepig\006vrepih\003vsb\007vsbcbiq\005vsbiq\006vscbib\006vscb" |
1534 | | "if\006vscbig\006vscbih\006vscbiq\005vscef\005vsceg\005vsegb\005vsegf\005" |
1535 | | "vsegh\004vsel\003vsf\003vsg\003vsh\003vsl\004vslb\005vsldb\003vsq\004vs" |
1536 | | "ra\005vsrab\004vsrl\005vsrlb\003vst\005vsteb\005vstef\005vsteg\005vsteh" |
1537 | | "\004vstl\004vstm\006vstrcb\007vstrcbs\006vstrcf\007vstrcfs\006vstrch\007" |
1538 | | "vstrchs\007vstrczb\010vstrczbs\007vstrczf\010vstrczfs\007vstrczh\010vst" |
1539 | | "rczhs\005vsumb\006vsumgf\006vsumgh\005vsumh\006vsumqf\006vsumqg\003vtm\005" |
1540 | | "vuphb\005vuphf\005vuphh\005vuplb\005vuplf\006vuplhb\006vuplhf\006vuplhh" |
1541 | | "\006vuplhw\006vupllb\006vupllf\006vupllh\002vx\005vzero\005wcdgb\006wcd" |
1542 | | "lgb\005wcgdb\006wclgdb\005wfadb\005wfcdb\006wfcedb\007wfcedbs\006wfchdb" |
1543 | | "\007wfchdbs\007wfchedb\010wfchedbs\005wfddb\005wfidb\005wfkdb\006wflcdb" |
1544 | | "\006wflndb\006wflpdb\006wfmadb\005wfmdb\006wfmsdb\005wfsdb\006wfsqdb\007" |
1545 | | "wftcidb\005wldeb\005wledb\001x\002xc\002xg\003xgr\004xgrk\002xi\004xihf" |
1546 | | "\004xilf\003xiy\002xr\003xrk\002xy"; |
1547 | | |
1548 | | namespace { |
1549 | | struct MatchEntry { |
1550 | | uint16_t Mnemonic; |
1551 | | uint16_t Opcode; |
1552 | | uint16_t ConvertFn; |
1553 | | uint16_t RequiredFeatures; |
1554 | | uint8_t Classes[5]; |
1555 | 104 | StringRef getMnemonic() const { |
1556 | 104 | return StringRef(MnemonicTable + Mnemonic + 1, |
1557 | 104 | MnemonicTable[Mnemonic]); |
1558 | 104 | } |
1559 | | }; |
1560 | | |
1561 | | // Predicate for searching for an opcode. |
1562 | | struct LessOpcode { |
1563 | 64 | bool operator()(const MatchEntry &LHS, StringRef RHS) { |
1564 | 64 | return LHS.getMnemonic() < RHS; |
1565 | 64 | } |
1566 | 40 | bool operator()(StringRef LHS, const MatchEntry &RHS) { |
1567 | 40 | return LHS < RHS.getMnemonic(); |
1568 | 40 | } |
1569 | 0 | bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { |
1570 | 0 | return LHS.getMnemonic() < RHS.getMnemonic(); |
1571 | 0 | } |
1572 | | }; |
1573 | | } // end anonymous namespace. |
1574 | | |
1575 | | static const MatchEntry MatchTable0[] = { |
1576 | | { 0 /* a */, SystemZ::A, Convert__GR321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
1577 | | { 2 /* adb */, SystemZ::ADB, Convert__FP641_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
1578 | | { 6 /* adbr */, SystemZ::ADBR, Convert__FP641_0__Tie0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
1579 | | { 11 /* aeb */, SystemZ::AEB, Convert__FP321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_FP32, MCK_BDXAddr64Disp12 }, }, |
1580 | | { 15 /* aebr */, SystemZ::AEBR, Convert__FP321_0__Tie0__FP321_1, 0, { MCK_FP32, MCK_FP32 }, }, |
1581 | | { 20 /* afi */, SystemZ::AFI, Convert__GR321_0__Tie0__S32Imm1_1, 0, { MCK_GR32, MCK_S32Imm }, }, |
1582 | | { 24 /* ag */, SystemZ::AG, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1583 | | { 27 /* agf */, SystemZ::AGF, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1584 | | { 31 /* agfi */, SystemZ::AGFI, Convert__GR641_0__Tie0__S32Imm1_1, 0, { MCK_GR64, MCK_S32Imm }, }, |
1585 | | { 36 /* agfr */, SystemZ::AGFR, Convert__GR641_0__Tie0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
1586 | | { 41 /* aghi */, SystemZ::AGHI, Convert__GR641_0__Tie0__S16Imm1_1, 0, { MCK_GR64, MCK_S16Imm }, }, |
1587 | | { 46 /* aghik */, SystemZ::AGHIK, Convert__GR641_0__GR641_1__S16Imm1_2, Feature_FeatureDistinctOps, { MCK_GR64, MCK_GR64, MCK_S16Imm }, }, |
1588 | | { 52 /* agr */, SystemZ::AGR, Convert__GR641_0__Tie0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1589 | | { 56 /* agrk */, SystemZ::AGRK, Convert__GR641_0__GR641_1__GR641_2, Feature_FeatureDistinctOps, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, |
1590 | | { 61 /* agsi */, SystemZ::AGSI, Convert__BDAddr64Disp202_0__S8Imm1_1, 0, { MCK_BDAddr64Disp20, MCK_S8Imm }, }, |
1591 | | { 66 /* ah */, SystemZ::AH, Convert__GR321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
1592 | | { 69 /* ahi */, SystemZ::AHI, Convert__GR321_0__Tie0__S16Imm1_1, 0, { MCK_GR32, MCK_S16Imm }, }, |
1593 | | { 73 /* ahik */, SystemZ::AHIK, Convert__GR321_0__GR321_1__S16Imm1_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_S16Imm }, }, |
1594 | | { 78 /* ahy */, SystemZ::AHY, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
1595 | | { 82 /* aih */, SystemZ::AIH, Convert__GRH321_0__Tie0__S32Imm1_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_S32Imm }, }, |
1596 | | { 86 /* al */, SystemZ::AL, Convert__GR321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
1597 | | { 89 /* alc */, SystemZ::ALC, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
1598 | | { 93 /* alcg */, SystemZ::ALCG, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1599 | | { 98 /* alcgr */, SystemZ::ALCGR, Convert__GR641_0__Tie0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1600 | | { 104 /* alcr */, SystemZ::ALCR, Convert__GR321_0__Tie0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
1601 | | { 109 /* alfi */, SystemZ::ALFI, Convert__GR321_0__Tie0__U32Imm1_1, 0, { MCK_GR32, MCK_U32Imm }, }, |
1602 | | { 114 /* alg */, SystemZ::ALG, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1603 | | { 118 /* algf */, SystemZ::ALGF, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1604 | | { 123 /* algfi */, SystemZ::ALGFI, Convert__GR641_0__Tie0__U32Imm1_1, 0, { MCK_GR64, MCK_U32Imm }, }, |
1605 | | { 129 /* algfr */, SystemZ::ALGFR, Convert__GR641_0__Tie0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
1606 | | { 135 /* alghsik */, SystemZ::ALGHSIK, Convert__GR641_0__GR641_1__S16Imm1_2, Feature_FeatureDistinctOps, { MCK_GR64, MCK_GR64, MCK_S16Imm }, }, |
1607 | | { 143 /* algr */, SystemZ::ALGR, Convert__GR641_0__Tie0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1608 | | { 148 /* algrk */, SystemZ::ALGRK, Convert__GR641_0__GR641_1__GR641_2, Feature_FeatureDistinctOps, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, |
1609 | | { 154 /* alhsik */, SystemZ::ALHSIK, Convert__GR321_0__GR321_1__S16Imm1_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_S16Imm }, }, |
1610 | | { 161 /* alr */, SystemZ::ALR, Convert__GR321_0__Tie0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
1611 | | { 165 /* alrk */, SystemZ::ALRK, Convert__GR321_0__GR321_1__GR321_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, |
1612 | | { 170 /* aly */, SystemZ::ALY, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
1613 | | { 174 /* ar */, SystemZ::AR, Convert__GR321_0__Tie0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
1614 | | { 177 /* ark */, SystemZ::ARK, Convert__GR321_0__GR321_1__GR321_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, |
1615 | | { 181 /* asi */, SystemZ::ASI, Convert__BDAddr64Disp202_0__S8Imm1_1, 0, { MCK_BDAddr64Disp20, MCK_S8Imm }, }, |
1616 | | { 185 /* axbr */, SystemZ::AXBR, Convert__FP1281_0__Tie0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
1617 | | { 190 /* ay */, SystemZ::AY, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
1618 | | { 193 /* basr */, SystemZ::BASR, Convert__GR641_0__ADDR641_1, 0, { MCK_GR64, MCK_ADDR64 }, }, |
1619 | | { 198 /* bcr */, SystemZ::AsmBCR, Convert__U4Imm1_0__GR641_1, 0, { MCK_U4Imm, MCK_GR64 }, }, |
1620 | | { 202 /* ber */, SystemZ::AsmEBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1621 | | { 206 /* bher */, SystemZ::AsmHEBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1622 | | { 211 /* bhr */, SystemZ::AsmHBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1623 | | { 215 /* bler */, SystemZ::AsmLEBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1624 | | { 220 /* blhr */, SystemZ::AsmLHBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1625 | | { 225 /* blr */, SystemZ::AsmLBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1626 | | { 229 /* bner */, SystemZ::AsmNEBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1627 | | { 234 /* bnher */, SystemZ::AsmNHEBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1628 | | { 240 /* bnhr */, SystemZ::AsmNHBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1629 | | { 245 /* bnler */, SystemZ::AsmNLEBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1630 | | { 251 /* bnlhr */, SystemZ::AsmNLHBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1631 | | { 257 /* bnlr */, SystemZ::AsmNLBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1632 | | { 262 /* bnor */, SystemZ::AsmNOBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1633 | | { 267 /* bor */, SystemZ::AsmOBR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1634 | | { 271 /* br */, SystemZ::BR, Convert__ADDR641_0, 0, { MCK_ADDR64 }, }, |
1635 | | { 274 /* bras */, SystemZ::BRAS, Convert__GR641_0__PCRelTLS162_1, 0, { MCK_GR64, MCK_PCRelTLS16 }, }, |
1636 | | { 279 /* brasl */, SystemZ::BRASL, Convert__GR641_0__PCRelTLS322_1, 0, { MCK_GR64, MCK_PCRelTLS32 }, }, |
1637 | | { 285 /* brc */, SystemZ::AsmBRC, Convert__U4Imm1_0__PCRel161_1, 0, { MCK_U4Imm, MCK_PCRel16 }, }, |
1638 | | { 289 /* brcl */, SystemZ::AsmBRCL, Convert__U4Imm1_0__PCRel321_1, 0, { MCK_U4Imm, MCK_PCRel32 }, }, |
1639 | | { 294 /* brct */, SystemZ::BRCT, Convert__GR321_0__Tie0__PCRel161_1, 0, { MCK_GR32, MCK_PCRel16 }, }, |
1640 | | { 299 /* brctg */, SystemZ::BRCTG, Convert__GR641_0__Tie0__PCRel161_1, 0, { MCK_GR64, MCK_PCRel16 }, }, |
1641 | | { 305 /* c */, SystemZ::C, Convert__GR321_0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
1642 | | { 307 /* cdb */, SystemZ::CDB, Convert__FP641_0__BDXAddr64Disp123_1, 0, { MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
1643 | | { 311 /* cdbr */, SystemZ::CDBR, Convert__FP641_0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
1644 | | { 316 /* cdfbr */, SystemZ::CDFBR, Convert__FP641_0__GR321_1, 0, { MCK_FP64, MCK_GR32 }, }, |
1645 | | { 322 /* cdgbr */, SystemZ::CDGBR, Convert__FP641_0__GR641_1, 0, { MCK_FP64, MCK_GR64 }, }, |
1646 | | { 328 /* cdlfbr */, SystemZ::CDLFBR, Convert__FP641_0__U4Imm1_1__GR321_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP64, MCK_U4Imm, MCK_GR32, MCK_U4Imm }, }, |
1647 | | { 335 /* cdlgbr */, SystemZ::CDLGBR, Convert__FP641_0__U4Imm1_1__GR641_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP64, MCK_U4Imm, MCK_GR64, MCK_U4Imm }, }, |
1648 | | { 342 /* ceb */, SystemZ::CEB, Convert__FP321_0__BDXAddr64Disp123_1, 0, { MCK_FP32, MCK_BDXAddr64Disp12 }, }, |
1649 | | { 346 /* cebr */, SystemZ::CEBR, Convert__FP321_0__FP321_1, 0, { MCK_FP32, MCK_FP32 }, }, |
1650 | | { 351 /* cefbr */, SystemZ::CEFBR, Convert__FP321_0__GR321_1, 0, { MCK_FP32, MCK_GR32 }, }, |
1651 | | { 357 /* cegbr */, SystemZ::CEGBR, Convert__FP321_0__GR641_1, 0, { MCK_FP32, MCK_GR64 }, }, |
1652 | | { 363 /* celfbr */, SystemZ::CELFBR, Convert__FP321_0__U4Imm1_1__GR321_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP32, MCK_U4Imm, MCK_GR32, MCK_U4Imm }, }, |
1653 | | { 370 /* celgbr */, SystemZ::CELGBR, Convert__FP321_0__U4Imm1_1__GR641_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP32, MCK_U4Imm, MCK_GR64, MCK_U4Imm }, }, |
1654 | | { 377 /* cfdbr */, SystemZ::CFDBR, Convert__GR321_0__U4Imm1_1__FP641_2, 0, { MCK_GR32, MCK_U4Imm, MCK_FP64 }, }, |
1655 | | { 383 /* cfebr */, SystemZ::CFEBR, Convert__GR321_0__U4Imm1_1__FP321_2, 0, { MCK_GR32, MCK_U4Imm, MCK_FP32 }, }, |
1656 | | { 389 /* cfi */, SystemZ::CFI, Convert__GR321_0__S32Imm1_1, 0, { MCK_GR32, MCK_S32Imm }, }, |
1657 | | { 393 /* cfxbr */, SystemZ::CFXBR, Convert__GR321_0__U4Imm1_1__FP1281_2, 0, { MCK_GR32, MCK_U4Imm, MCK_FP128 }, }, |
1658 | | { 399 /* cg */, SystemZ::CG, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1659 | | { 402 /* cgdbr */, SystemZ::CGDBR, Convert__GR641_0__U4Imm1_1__FP641_2, 0, { MCK_GR64, MCK_U4Imm, MCK_FP64 }, }, |
1660 | | { 408 /* cgebr */, SystemZ::CGEBR, Convert__GR641_0__U4Imm1_1__FP321_2, 0, { MCK_GR64, MCK_U4Imm, MCK_FP32 }, }, |
1661 | | { 414 /* cgf */, SystemZ::CGF, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1662 | | { 418 /* cgfi */, SystemZ::CGFI, Convert__GR641_0__S32Imm1_1, 0, { MCK_GR64, MCK_S32Imm }, }, |
1663 | | { 423 /* cgfr */, SystemZ::CGFR, Convert__GR641_0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
1664 | | { 428 /* cgfrl */, SystemZ::CGFRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1665 | | { 434 /* cgh */, SystemZ::CGH, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1666 | | { 438 /* cghi */, SystemZ::CGHI, Convert__GR641_0__S16Imm1_1, 0, { MCK_GR64, MCK_S16Imm }, }, |
1667 | | { 443 /* cghrl */, SystemZ::CGHRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1668 | | { 449 /* cghsi */, SystemZ::CGHSI, Convert__BDAddr64Disp122_0__S16Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_S16Imm }, }, |
1669 | | { 455 /* cgij */, SystemZ::AsmCGIJ, Convert__GR641_0__S8Imm1_1__U4Imm1_2__PCRel161_3, 0, { MCK_GR64, MCK_S8Imm, MCK_U4Imm, MCK_PCRel16 }, }, |
1670 | | { 460 /* cgije */, SystemZ::AsmJECGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1671 | | { 466 /* cgijh */, SystemZ::AsmJHCGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1672 | | { 472 /* cgijhe */, SystemZ::AsmJHECGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1673 | | { 479 /* cgijl */, SystemZ::AsmJLCGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1674 | | { 485 /* cgijle */, SystemZ::AsmJLECGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1675 | | { 492 /* cgijlh */, SystemZ::AsmJLHCGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1676 | | { 499 /* cgijne */, SystemZ::AsmJLHAltCGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1677 | | { 506 /* cgijnh */, SystemZ::AsmJLEAltCGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1678 | | { 513 /* cgijnhe */, SystemZ::AsmJLAltCGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1679 | | { 521 /* cgijnl */, SystemZ::AsmJHEAltCGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1680 | | { 528 /* cgijnle */, SystemZ::AsmJHAltCGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1681 | | { 536 /* cgijnlh */, SystemZ::AsmJEAltCGI, Convert__GR641_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_S8Imm, MCK_PCRel16 }, }, |
1682 | | { 544 /* cgr */, SystemZ::CGR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1683 | | { 548 /* cgrj */, SystemZ::AsmCGRJ, Convert__GR641_0__GR641_1__U4Imm1_2__PCRel161_3, 0, { MCK_GR64, MCK_GR64, MCK_U4Imm, MCK_PCRel16 }, }, |
1684 | | { 553 /* cgrje */, SystemZ::AsmJECGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1685 | | { 559 /* cgrjh */, SystemZ::AsmJHCGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1686 | | { 565 /* cgrjhe */, SystemZ::AsmJHECGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1687 | | { 572 /* cgrjl */, SystemZ::AsmJLCGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1688 | | { 578 /* cgrjle */, SystemZ::AsmJLECGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1689 | | { 585 /* cgrjlh */, SystemZ::AsmJLHCGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1690 | | { 592 /* cgrjne */, SystemZ::AsmJLHAltCGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1691 | | { 599 /* cgrjnh */, SystemZ::AsmJLEAltCGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1692 | | { 606 /* cgrjnhe */, SystemZ::AsmJLAltCGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1693 | | { 614 /* cgrjnl */, SystemZ::AsmJHEAltCGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1694 | | { 621 /* cgrjnle */, SystemZ::AsmJHAltCGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1695 | | { 629 /* cgrjnlh */, SystemZ::AsmJEAltCGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1696 | | { 637 /* cgrl */, SystemZ::CGRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1697 | | { 642 /* cgxbr */, SystemZ::CGXBR, Convert__GR641_0__U4Imm1_1__FP1281_2, 0, { MCK_GR64, MCK_U4Imm, MCK_FP128 }, }, |
1698 | | { 648 /* ch */, SystemZ::CH, Convert__GR321_0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
1699 | | { 651 /* chf */, SystemZ::CHF, Convert__GRH321_0__BDXAddr64Disp203_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_BDXAddr64Disp20 }, }, |
1700 | | { 655 /* chhsi */, SystemZ::CHHSI, Convert__BDAddr64Disp122_0__S16Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_S16Imm }, }, |
1701 | | { 661 /* chi */, SystemZ::CHI, Convert__GR321_0__S16Imm1_1, 0, { MCK_GR32, MCK_S16Imm }, }, |
1702 | | { 665 /* chrl */, SystemZ::CHRL, Convert__GR321_0__PCRel321_1, 0, { MCK_GR32, MCK_PCRel32 }, }, |
1703 | | { 670 /* chsi */, SystemZ::CHSI, Convert__BDAddr64Disp122_0__S16Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_S16Imm }, }, |
1704 | | { 675 /* chy */, SystemZ::CHY, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
1705 | | { 679 /* cih */, SystemZ::CIH, Convert__GRH321_0__S32Imm1_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_S32Imm }, }, |
1706 | | { 683 /* cij */, SystemZ::AsmCIJ, Convert__GR321_0__S8Imm1_1__U4Imm1_2__PCRel161_3, 0, { MCK_GR32, MCK_S8Imm, MCK_U4Imm, MCK_PCRel16 }, }, |
1707 | | { 687 /* cije */, SystemZ::AsmJECI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1708 | | { 692 /* cijh */, SystemZ::AsmJHCI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1709 | | { 697 /* cijhe */, SystemZ::AsmJHECI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1710 | | { 703 /* cijl */, SystemZ::AsmJLCI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1711 | | { 708 /* cijle */, SystemZ::AsmJLECI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1712 | | { 714 /* cijlh */, SystemZ::AsmJLHCI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1713 | | { 720 /* cijne */, SystemZ::AsmJLHAltCI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1714 | | { 726 /* cijnh */, SystemZ::AsmJLEAltCI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1715 | | { 732 /* cijnhe */, SystemZ::AsmJLAltCI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1716 | | { 739 /* cijnl */, SystemZ::AsmJHEAltCI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1717 | | { 745 /* cijnle */, SystemZ::AsmJHAltCI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1718 | | { 752 /* cijnlh */, SystemZ::AsmJEAltCI, Convert__GR321_0__S8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_S8Imm, MCK_PCRel16 }, }, |
1719 | | { 759 /* cl */, SystemZ::CL, Convert__GR321_0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
1720 | | { 762 /* clc */, SystemZ::CLC, Convert__BDLAddr64Disp12Len83_0__BDAddr64Disp122_1, 0, { MCK_BDLAddr64Disp12Len8, MCK_BDAddr64Disp12 }, }, |
1721 | | { 766 /* clfdbr */, SystemZ::CLFDBR, Convert__GR321_0__U4Imm1_1__FP641_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_GR32, MCK_U4Imm, MCK_FP64, MCK_U4Imm }, }, |
1722 | | { 773 /* clfebr */, SystemZ::CLFEBR, Convert__GR321_0__U4Imm1_1__FP321_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_GR32, MCK_U4Imm, MCK_FP32, MCK_U4Imm }, }, |
1723 | | { 780 /* clfhsi */, SystemZ::CLFHSI, Convert__BDAddr64Disp122_0__U16Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_U16Imm }, }, |
1724 | | { 787 /* clfi */, SystemZ::CLFI, Convert__GR321_0__U32Imm1_1, 0, { MCK_GR32, MCK_U32Imm }, }, |
1725 | | { 792 /* clfxbr */, SystemZ::CLFXBR, Convert__GR321_0__U4Imm1_1__FP1281_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_GR32, MCK_U4Imm, MCK_FP128, MCK_U4Imm }, }, |
1726 | | { 799 /* clg */, SystemZ::CLG, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1727 | | { 803 /* clgdbr */, SystemZ::CLGDBR, Convert__GR641_0__U4Imm1_1__FP641_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_GR64, MCK_U4Imm, MCK_FP64, MCK_U4Imm }, }, |
1728 | | { 810 /* clgebr */, SystemZ::CLGEBR, Convert__GR641_0__U4Imm1_1__FP321_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_GR64, MCK_U4Imm, MCK_FP32, MCK_U4Imm }, }, |
1729 | | { 817 /* clgf */, SystemZ::CLGF, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1730 | | { 822 /* clgfi */, SystemZ::CLGFI, Convert__GR641_0__U32Imm1_1, 0, { MCK_GR64, MCK_U32Imm }, }, |
1731 | | { 828 /* clgfr */, SystemZ::CLGFR, Convert__GR641_0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
1732 | | { 834 /* clgfrl */, SystemZ::CLGFRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1733 | | { 841 /* clghrl */, SystemZ::CLGHRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1734 | | { 848 /* clghsi */, SystemZ::CLGHSI, Convert__BDAddr64Disp122_0__U16Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_U16Imm }, }, |
1735 | | { 855 /* clgij */, SystemZ::AsmCLGIJ, Convert__GR641_0__U8Imm1_1__U4Imm1_2__PCRel161_3, 0, { MCK_GR64, MCK_U8Imm, MCK_U4Imm, MCK_PCRel16 }, }, |
1736 | | { 861 /* clgije */, SystemZ::AsmJECLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1737 | | { 868 /* clgijh */, SystemZ::AsmJHCLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1738 | | { 875 /* clgijhe */, SystemZ::AsmJHECLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1739 | | { 883 /* clgijl */, SystemZ::AsmJLCLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1740 | | { 890 /* clgijle */, SystemZ::AsmJLECLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1741 | | { 898 /* clgijlh */, SystemZ::AsmJLHCLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1742 | | { 906 /* clgijne */, SystemZ::AsmJLHAltCLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1743 | | { 914 /* clgijnh */, SystemZ::AsmJLEAltCLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1744 | | { 922 /* clgijnhe */, SystemZ::AsmJLAltCLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1745 | | { 931 /* clgijnl */, SystemZ::AsmJHEAltCLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1746 | | { 939 /* clgijnle */, SystemZ::AsmJHAltCLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1747 | | { 948 /* clgijnlh */, SystemZ::AsmJEAltCLGI, Convert__GR641_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR64, MCK_U8Imm, MCK_PCRel16 }, }, |
1748 | | { 957 /* clgr */, SystemZ::CLGR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1749 | | { 962 /* clgrj */, SystemZ::AsmCLGRJ, Convert__GR641_0__GR641_1__U4Imm1_2__PCRel161_3, 0, { MCK_GR64, MCK_GR64, MCK_U4Imm, MCK_PCRel16 }, }, |
1750 | | { 968 /* clgrje */, SystemZ::AsmJECLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1751 | | { 975 /* clgrjh */, SystemZ::AsmJHCLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1752 | | { 982 /* clgrjhe */, SystemZ::AsmJHECLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1753 | | { 990 /* clgrjl */, SystemZ::AsmJLCLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1754 | | { 997 /* clgrjle */, SystemZ::AsmJLECLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1755 | | { 1005 /* clgrjlh */, SystemZ::AsmJLHCLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1756 | | { 1013 /* clgrjne */, SystemZ::AsmJLHAltCLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1757 | | { 1021 /* clgrjnh */, SystemZ::AsmJLEAltCLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1758 | | { 1029 /* clgrjnhe */, SystemZ::AsmJLAltCLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1759 | | { 1038 /* clgrjnl */, SystemZ::AsmJHEAltCLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1760 | | { 1046 /* clgrjnle */, SystemZ::AsmJHAltCLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1761 | | { 1055 /* clgrjnlh */, SystemZ::AsmJEAltCLGR, Convert__GR641_0__GR641_1__PCRel161_2, 0, { MCK_GR64, MCK_GR64, MCK_PCRel16 }, }, |
1762 | | { 1064 /* clgrl */, SystemZ::CLGRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1763 | | { 1070 /* clgxbr */, SystemZ::CLGXBR, Convert__GR641_0__U4Imm1_1__FP1281_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_GR64, MCK_U4Imm, MCK_FP128, MCK_U4Imm }, }, |
1764 | | { 1077 /* clhf */, SystemZ::CLHF, Convert__GRH321_0__BDXAddr64Disp203_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_BDXAddr64Disp20 }, }, |
1765 | | { 1082 /* clhhsi */, SystemZ::CLHHSI, Convert__BDAddr64Disp122_0__U16Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_U16Imm }, }, |
1766 | | { 1089 /* clhrl */, SystemZ::CLHRL, Convert__GR321_0__PCRel321_1, 0, { MCK_GR32, MCK_PCRel32 }, }, |
1767 | | { 1095 /* cli */, SystemZ::CLI, Convert__BDAddr64Disp122_0__U8Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_U8Imm }, }, |
1768 | | { 1099 /* clih */, SystemZ::CLIH, Convert__GRH321_0__U32Imm1_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_U32Imm }, }, |
1769 | | { 1104 /* clij */, SystemZ::AsmCLIJ, Convert__GR321_0__U8Imm1_1__U4Imm1_2__PCRel161_3, 0, { MCK_GR32, MCK_U8Imm, MCK_U4Imm, MCK_PCRel16 }, }, |
1770 | | { 1109 /* clije */, SystemZ::AsmJECLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1771 | | { 1115 /* clijh */, SystemZ::AsmJHCLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1772 | | { 1121 /* clijhe */, SystemZ::AsmJHECLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1773 | | { 1128 /* clijl */, SystemZ::AsmJLCLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1774 | | { 1134 /* clijle */, SystemZ::AsmJLECLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1775 | | { 1141 /* clijlh */, SystemZ::AsmJLHCLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1776 | | { 1148 /* clijne */, SystemZ::AsmJLHAltCLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1777 | | { 1155 /* clijnh */, SystemZ::AsmJLEAltCLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1778 | | { 1162 /* clijnhe */, SystemZ::AsmJLAltCLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1779 | | { 1170 /* clijnl */, SystemZ::AsmJHEAltCLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1780 | | { 1177 /* clijnle */, SystemZ::AsmJHAltCLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1781 | | { 1185 /* clijnlh */, SystemZ::AsmJEAltCLI, Convert__GR321_0__U8Imm1_1__PCRel161_2, 0, { MCK_GR32, MCK_U8Imm, MCK_PCRel16 }, }, |
1782 | | { 1193 /* cliy */, SystemZ::CLIY, Convert__BDAddr64Disp202_0__U8Imm1_1, 0, { MCK_BDAddr64Disp20, MCK_U8Imm }, }, |
1783 | | { 1198 /* clr */, SystemZ::CLR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
1784 | | { 1202 /* clrj */, SystemZ::AsmCLRJ, Convert__GR321_0__GR321_1__U4Imm1_2__PCRel161_3, 0, { MCK_GR32, MCK_GR32, MCK_U4Imm, MCK_PCRel16 }, }, |
1785 | | { 1207 /* clrje */, SystemZ::AsmJECLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1786 | | { 1213 /* clrjh */, SystemZ::AsmJHCLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1787 | | { 1219 /* clrjhe */, SystemZ::AsmJHECLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1788 | | { 1226 /* clrjl */, SystemZ::AsmJLCLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1789 | | { 1232 /* clrjle */, SystemZ::AsmJLECLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1790 | | { 1239 /* clrjlh */, SystemZ::AsmJLHCLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1791 | | { 1246 /* clrjne */, SystemZ::AsmJLHAltCLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1792 | | { 1253 /* clrjnh */, SystemZ::AsmJLEAltCLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1793 | | { 1260 /* clrjnhe */, SystemZ::AsmJLAltCLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1794 | | { 1268 /* clrjnl */, SystemZ::AsmJHEAltCLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1795 | | { 1275 /* clrjnle */, SystemZ::AsmJHAltCLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1796 | | { 1283 /* clrjnlh */, SystemZ::AsmJEAltCLR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1797 | | { 1291 /* clrl */, SystemZ::CLRL, Convert__GR321_0__PCRel321_1, 0, { MCK_GR32, MCK_PCRel32 }, }, |
1798 | | { 1296 /* clst */, SystemZ::CLST, Convert__GR641_0__GR641_1__Tie0__Tie1, 0, { MCK_GR64, MCK_GR64 }, }, |
1799 | | { 1301 /* cly */, SystemZ::CLY, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
1800 | | { 1305 /* cpsdr */, SystemZ::CPSDRdd, Convert__FP641_0__FP641_1__FP641_2, 0, { MCK_FP64, MCK_FP64, MCK_FP64 }, }, |
1801 | | { 1311 /* cr */, SystemZ::CR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
1802 | | { 1314 /* crj */, SystemZ::AsmCRJ, Convert__GR321_0__GR321_1__U4Imm1_2__PCRel161_3, 0, { MCK_GR32, MCK_GR32, MCK_U4Imm, MCK_PCRel16 }, }, |
1803 | | { 1318 /* crje */, SystemZ::AsmJECR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1804 | | { 1323 /* crjh */, SystemZ::AsmJHCR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1805 | | { 1328 /* crjhe */, SystemZ::AsmJHECR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1806 | | { 1334 /* crjl */, SystemZ::AsmJLCR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1807 | | { 1339 /* crjle */, SystemZ::AsmJLECR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1808 | | { 1345 /* crjlh */, SystemZ::AsmJLHCR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1809 | | { 1351 /* crjne */, SystemZ::AsmJLHAltCR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1810 | | { 1357 /* crjnh */, SystemZ::AsmJLEAltCR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1811 | | { 1363 /* crjnhe */, SystemZ::AsmJLAltCR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1812 | | { 1370 /* crjnl */, SystemZ::AsmJHEAltCR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1813 | | { 1376 /* crjnle */, SystemZ::AsmJHAltCR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1814 | | { 1383 /* crjnlh */, SystemZ::AsmJEAltCR, Convert__GR321_0__GR321_1__PCRel161_2, 0, { MCK_GR32, MCK_GR32, MCK_PCRel16 }, }, |
1815 | | { 1390 /* crl */, SystemZ::CRL, Convert__GR321_0__PCRel321_1, 0, { MCK_GR32, MCK_PCRel32 }, }, |
1816 | | { 1394 /* cs */, SystemZ::CS, Convert__GR321_0__Tie0__GR321_1__BDAddr64Disp122_2, 0, { MCK_GR32, MCK_GR32, MCK_BDAddr64Disp12 }, }, |
1817 | | { 1397 /* csg */, SystemZ::CSG, Convert__GR641_0__Tie0__GR641_1__BDAddr64Disp202_2, 0, { MCK_GR64, MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1818 | | { 1401 /* csy */, SystemZ::CSY, Convert__GR321_0__Tie0__GR321_1__BDAddr64Disp202_2, 0, { MCK_GR32, MCK_GR32, MCK_BDAddr64Disp20 }, }, |
1819 | | { 1405 /* cxbr */, SystemZ::CXBR, Convert__FP1281_0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
1820 | | { 1410 /* cxfbr */, SystemZ::CXFBR, Convert__FP1281_0__GR321_1, 0, { MCK_FP128, MCK_GR32 }, }, |
1821 | | { 1416 /* cxgbr */, SystemZ::CXGBR, Convert__FP1281_0__GR641_1, 0, { MCK_FP128, MCK_GR64 }, }, |
1822 | | { 1422 /* cxlfbr */, SystemZ::CXLFBR, Convert__FP1281_0__U4Imm1_1__GR321_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP128, MCK_U4Imm, MCK_GR32, MCK_U4Imm }, }, |
1823 | | { 1429 /* cxlgbr */, SystemZ::CXLGBR, Convert__FP1281_0__U4Imm1_1__GR641_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP128, MCK_U4Imm, MCK_GR64, MCK_U4Imm }, }, |
1824 | | { 1436 /* cy */, SystemZ::CY, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
1825 | | { 1439 /* ddb */, SystemZ::DDB, Convert__FP641_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
1826 | | { 1443 /* ddbr */, SystemZ::DDBR, Convert__FP641_0__Tie0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
1827 | | { 1448 /* deb */, SystemZ::DEB, Convert__FP321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_FP32, MCK_BDXAddr64Disp12 }, }, |
1828 | | { 1452 /* debr */, SystemZ::DEBR, Convert__FP321_0__Tie0__FP321_1, 0, { MCK_FP32, MCK_FP32 }, }, |
1829 | | { 1457 /* dl */, SystemZ::DL, Convert__GR1281_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR128, MCK_BDXAddr64Disp20 }, }, |
1830 | | { 1460 /* dlg */, SystemZ::DLG, Convert__GR1281_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR128, MCK_BDXAddr64Disp20 }, }, |
1831 | | { 1464 /* dlgr */, SystemZ::DLGR, Convert__GR1281_0__Tie0__GR641_1, 0, { MCK_GR128, MCK_GR64 }, }, |
1832 | | { 1469 /* dlr */, SystemZ::DLR, Convert__GR1281_0__Tie0__GR321_1, 0, { MCK_GR128, MCK_GR32 }, }, |
1833 | | { 1473 /* dsg */, SystemZ::DSG, Convert__GR1281_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR128, MCK_BDXAddr64Disp20 }, }, |
1834 | | { 1477 /* dsgf */, SystemZ::DSGF, Convert__GR1281_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR128, MCK_BDXAddr64Disp20 }, }, |
1835 | | { 1482 /* dsgfr */, SystemZ::DSGFR, Convert__GR1281_0__Tie0__GR321_1, 0, { MCK_GR128, MCK_GR32 }, }, |
1836 | | { 1488 /* dsgr */, SystemZ::DSGR, Convert__GR1281_0__Tie0__GR641_1, 0, { MCK_GR128, MCK_GR64 }, }, |
1837 | | { 1493 /* dxbr */, SystemZ::DXBR, Convert__FP1281_0__Tie0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
1838 | | { 1498 /* ear */, SystemZ::EAR, Convert__GR321_0__AccessReg1_1, 0, { MCK_GR32, MCK_AccessReg }, }, |
1839 | | { 1502 /* etnd */, SystemZ::ETND, Convert__GR321_0, Feature_FeatureTransactionalExecution, { MCK_GR32 }, }, |
1840 | | { 1507 /* fidbr */, SystemZ::FIDBR, Convert__FP641_0__U4Imm1_1__FP641_2, 0, { MCK_FP64, MCK_U4Imm, MCK_FP64 }, }, |
1841 | | { 1513 /* fidbra */, SystemZ::FIDBRA, Convert__FP641_0__U4Imm1_1__FP641_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP64, MCK_U4Imm, MCK_FP64, MCK_U4Imm }, }, |
1842 | | { 1520 /* fiebr */, SystemZ::FIEBR, Convert__FP321_0__U4Imm1_1__FP321_2, 0, { MCK_FP32, MCK_U4Imm, MCK_FP32 }, }, |
1843 | | { 1526 /* fiebra */, SystemZ::FIEBRA, Convert__FP321_0__U4Imm1_1__FP321_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP32, MCK_U4Imm, MCK_FP32, MCK_U4Imm }, }, |
1844 | | { 1533 /* fixbr */, SystemZ::FIXBR, Convert__FP1281_0__U4Imm1_1__FP1281_2, 0, { MCK_FP128, MCK_U4Imm, MCK_FP128 }, }, |
1845 | | { 1539 /* fixbra */, SystemZ::FIXBRA, Convert__FP1281_0__U4Imm1_1__FP1281_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP128, MCK_U4Imm, MCK_FP128, MCK_U4Imm }, }, |
1846 | | { 1546 /* flogr */, SystemZ::FLOGR, Convert__GR1281_0__GR641_1, 0, { MCK_GR128, MCK_GR64 }, }, |
1847 | | { 1552 /* ic */, SystemZ::IC, Convert__GR641_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR64, MCK_BDXAddr64Disp12 }, }, |
1848 | | { 1555 /* icy */, SystemZ::ICY, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1849 | | { 1559 /* iihf */, SystemZ::IIHF, Convert__GRH321_0__U32Imm1_1, 0, { MCK_GRH32, MCK_U32Imm }, }, |
1850 | | { 1564 /* iihh */, SystemZ::IIHH, Convert__GRH321_0__Tie0__U16Imm1_1, 0, { MCK_GRH32, MCK_U16Imm }, }, |
1851 | | { 1569 /* iihl */, SystemZ::IIHL, Convert__GRH321_0__Tie0__U16Imm1_1, 0, { MCK_GRH32, MCK_U16Imm }, }, |
1852 | | { 1574 /* iilf */, SystemZ::IILF, Convert__GR321_0__U32Imm1_1, 0, { MCK_GR32, MCK_U32Imm }, }, |
1853 | | { 1579 /* iilh */, SystemZ::IILH, Convert__GR321_0__Tie0__U16Imm1_1, 0, { MCK_GR32, MCK_U16Imm }, }, |
1854 | | { 1584 /* iill */, SystemZ::IILL, Convert__GR321_0__Tie0__U16Imm1_1, 0, { MCK_GR32, MCK_U16Imm }, }, |
1855 | | { 1589 /* ipm */, SystemZ::IPM, Convert__GR321_0, 0, { MCK_GR32 }, }, |
1856 | | { 1593 /* j */, SystemZ::J, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1857 | | { 1595 /* je */, SystemZ::AsmEJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1858 | | { 1598 /* jg */, SystemZ::JG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1859 | | { 1601 /* jge */, SystemZ::AsmEJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1860 | | { 1605 /* jgh */, SystemZ::AsmHJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1861 | | { 1609 /* jghe */, SystemZ::AsmHEJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1862 | | { 1614 /* jgl */, SystemZ::AsmLJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1863 | | { 1618 /* jgle */, SystemZ::AsmLEJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1864 | | { 1623 /* jglh */, SystemZ::AsmLHJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1865 | | { 1628 /* jgne */, SystemZ::AsmNEJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1866 | | { 1633 /* jgnh */, SystemZ::AsmNHJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1867 | | { 1638 /* jgnhe */, SystemZ::AsmNHEJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1868 | | { 1644 /* jgnl */, SystemZ::AsmNLJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1869 | | { 1649 /* jgnle */, SystemZ::AsmNLEJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1870 | | { 1655 /* jgnlh */, SystemZ::AsmNLHJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1871 | | { 1661 /* jgno */, SystemZ::AsmNOJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1872 | | { 1666 /* jgo */, SystemZ::AsmOJG, Convert__PCRel321_0, 0, { MCK_PCRel32 }, }, |
1873 | | { 1670 /* jh */, SystemZ::AsmHJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1874 | | { 1673 /* jhe */, SystemZ::AsmHEJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1875 | | { 1677 /* jl */, SystemZ::AsmLJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1876 | | { 1680 /* jle */, SystemZ::AsmLEJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1877 | | { 1684 /* jlh */, SystemZ::AsmLHJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1878 | | { 1688 /* jne */, SystemZ::AsmNEJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1879 | | { 1692 /* jnh */, SystemZ::AsmNHJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1880 | | { 1696 /* jnhe */, SystemZ::AsmNHEJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1881 | | { 1701 /* jnl */, SystemZ::AsmNLJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1882 | | { 1705 /* jnle */, SystemZ::AsmNLEJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1883 | | { 1710 /* jnlh */, SystemZ::AsmNLHJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1884 | | { 1715 /* jno */, SystemZ::AsmNOJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1885 | | { 1719 /* jo */, SystemZ::AsmOJ, Convert__PCRel161_0, 0, { MCK_PCRel16 }, }, |
1886 | | { 1722 /* l */, SystemZ::L, Convert__GR321_0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
1887 | | { 1724 /* la */, SystemZ::LA, Convert__GR641_0__BDXAddr64Disp123_1, 0, { MCK_GR64, MCK_BDXAddr64Disp12 }, }, |
1888 | | { 1727 /* laa */, SystemZ::LAA, Convert__GR321_0__GR321_1__BDAddr64Disp202_2, Feature_FeatureInterlockedAccess1, { MCK_GR32, MCK_GR32, MCK_BDAddr64Disp20 }, }, |
1889 | | { 1731 /* laag */, SystemZ::LAAG, Convert__GR641_0__GR641_1__BDAddr64Disp202_2, Feature_FeatureInterlockedAccess1, { MCK_GR64, MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1890 | | { 1736 /* laal */, SystemZ::LAAL, Convert__GR321_0__GR321_1__BDAddr64Disp202_2, Feature_FeatureInterlockedAccess1, { MCK_GR32, MCK_GR32, MCK_BDAddr64Disp20 }, }, |
1891 | | { 1741 /* laalg */, SystemZ::LAALG, Convert__GR641_0__GR641_1__BDAddr64Disp202_2, Feature_FeatureInterlockedAccess1, { MCK_GR64, MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1892 | | { 1747 /* lan */, SystemZ::LAN, Convert__GR321_0__GR321_1__BDAddr64Disp202_2, Feature_FeatureInterlockedAccess1, { MCK_GR32, MCK_GR32, MCK_BDAddr64Disp20 }, }, |
1893 | | { 1751 /* lang */, SystemZ::LANG, Convert__GR641_0__GR641_1__BDAddr64Disp202_2, Feature_FeatureInterlockedAccess1, { MCK_GR64, MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1894 | | { 1756 /* lao */, SystemZ::LAO, Convert__GR321_0__GR321_1__BDAddr64Disp202_2, Feature_FeatureInterlockedAccess1, { MCK_GR32, MCK_GR32, MCK_BDAddr64Disp20 }, }, |
1895 | | { 1760 /* laog */, SystemZ::LAOG, Convert__GR641_0__GR641_1__BDAddr64Disp202_2, Feature_FeatureInterlockedAccess1, { MCK_GR64, MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1896 | | { 1765 /* larl */, SystemZ::LARL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1897 | | { 1770 /* lax */, SystemZ::LAX, Convert__GR321_0__GR321_1__BDAddr64Disp202_2, Feature_FeatureInterlockedAccess1, { MCK_GR32, MCK_GR32, MCK_BDAddr64Disp20 }, }, |
1898 | | { 1774 /* laxg */, SystemZ::LAXG, Convert__GR641_0__GR641_1__BDAddr64Disp202_2, Feature_FeatureInterlockedAccess1, { MCK_GR64, MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1899 | | { 1779 /* lay */, SystemZ::LAY, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1900 | | { 1783 /* lb */, SystemZ::LB, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
1901 | | { 1786 /* lbh */, SystemZ::LBH, Convert__GRH321_0__BDXAddr64Disp203_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_BDXAddr64Disp20 }, }, |
1902 | | { 1790 /* lbr */, SystemZ::LBR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
1903 | | { 1794 /* lcbb */, SystemZ::LCBB, Convert__GR321_0__BDXAddr64Disp123_1__U4Imm1_2, Feature_FeatureVector, { MCK_GR32, MCK_BDXAddr64Disp12, MCK_U4Imm }, }, |
1904 | | { 1799 /* lcdbr */, SystemZ::LCDBR, Convert__FP641_0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
1905 | | { 1805 /* lcdfr */, SystemZ::LCDFR, Convert__FP641_0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
1906 | | { 1811 /* lcebr */, SystemZ::LCEBR, Convert__FP321_0__FP321_1, 0, { MCK_FP32, MCK_FP32 }, }, |
1907 | | { 1817 /* lcgfr */, SystemZ::LCGFR, Convert__GR641_0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
1908 | | { 1823 /* lcgr */, SystemZ::LCGR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1909 | | { 1828 /* lcr */, SystemZ::LCR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
1910 | | { 1832 /* lcxbr */, SystemZ::LCXBR, Convert__FP1281_0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
1911 | | { 1838 /* ld */, SystemZ::LD, Convert__FP641_0__BDXAddr64Disp123_1, 0, { MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
1912 | | { 1841 /* lde */, SystemZ::LDE32, Convert__FP321_0__BDXAddr64Disp123_1, 0, { MCK_FP32, MCK_BDXAddr64Disp12 }, }, |
1913 | | { 1845 /* ldeb */, SystemZ::LDEB, Convert__FP641_0__BDXAddr64Disp123_1, 0, { MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
1914 | | { 1850 /* ldebr */, SystemZ::LDEBR, Convert__FP641_0__FP321_1, 0, { MCK_FP64, MCK_FP32 }, }, |
1915 | | { 1856 /* ldgr */, SystemZ::LDGR, Convert__FP641_0__GR641_1, 0, { MCK_FP64, MCK_GR64 }, }, |
1916 | | { 1861 /* ldr */, SystemZ::LDR, Convert__FP641_0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
1917 | | { 1865 /* ldxbr */, SystemZ::LDXBR, Convert__FP1281_0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
1918 | | { 1871 /* ldxbra */, SystemZ::LDXBRA, Convert__FP1281_0__U4Imm1_1__FP1281_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP128, MCK_U4Imm, MCK_FP128, MCK_U4Imm }, }, |
1919 | | { 1878 /* ldy */, SystemZ::LDY, Convert__FP641_0__BDXAddr64Disp203_1, 0, { MCK_FP64, MCK_BDXAddr64Disp20 }, }, |
1920 | | { 1882 /* le */, SystemZ::LE, Convert__FP321_0__BDXAddr64Disp123_1, 0, { MCK_FP32, MCK_BDXAddr64Disp12 }, }, |
1921 | | { 1885 /* ledbr */, SystemZ::LEDBR, Convert__FP321_0__FP641_1, 0, { MCK_FP32, MCK_FP64 }, }, |
1922 | | { 1891 /* ledbra */, SystemZ::LEDBRA, Convert__FP321_0__U4Imm1_1__FP641_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP32, MCK_U4Imm, MCK_FP64, MCK_U4Imm }, }, |
1923 | | { 1898 /* ler */, SystemZ::LER, Convert__FP321_0__FP321_1, 0, { MCK_FP32, MCK_FP32 }, }, |
1924 | | { 1902 /* lexbr */, SystemZ::LEXBR, Convert__FP1281_0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
1925 | | { 1908 /* lexbra */, SystemZ::LEXBRA, Convert__FP1281_0__U4Imm1_1__FP1281_2__U4Imm1_3, Feature_FeatureFPExtension, { MCK_FP128, MCK_U4Imm, MCK_FP128, MCK_U4Imm }, }, |
1926 | | { 1915 /* ley */, SystemZ::LEY, Convert__FP321_0__BDXAddr64Disp203_1, 0, { MCK_FP32, MCK_BDXAddr64Disp20 }, }, |
1927 | | { 1919 /* lfh */, SystemZ::LFH, Convert__GRH321_0__BDXAddr64Disp203_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_BDXAddr64Disp20 }, }, |
1928 | | { 1923 /* lg */, SystemZ::LG, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1929 | | { 1926 /* lgb */, SystemZ::LGB, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1930 | | { 1930 /* lgbr */, SystemZ::LGBR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1931 | | { 1935 /* lgdr */, SystemZ::LGDR, Convert__GR641_0__FP641_1, 0, { MCK_GR64, MCK_FP64 }, }, |
1932 | | { 1940 /* lgf */, SystemZ::LGF, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1933 | | { 1944 /* lgfi */, SystemZ::LGFI, Convert__GR641_0__S32Imm1_1, 0, { MCK_GR64, MCK_S32Imm }, }, |
1934 | | { 1949 /* lgfr */, SystemZ::LGFR, Convert__GR641_0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
1935 | | { 1954 /* lgfrl */, SystemZ::LGFRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1936 | | { 1960 /* lgh */, SystemZ::LGH, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1937 | | { 1964 /* lghi */, SystemZ::LGHI, Convert__GR641_0__S16Imm1_1, 0, { MCK_GR64, MCK_S16Imm }, }, |
1938 | | { 1969 /* lghr */, SystemZ::LGHR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1939 | | { 1974 /* lghrl */, SystemZ::LGHRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1940 | | { 1980 /* lgr */, SystemZ::LGR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1941 | | { 1984 /* lgrl */, SystemZ::LGRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1942 | | { 1989 /* lh */, SystemZ::LH, Convert__GR321_0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
1943 | | { 1992 /* lhh */, SystemZ::LHH, Convert__GRH321_0__BDXAddr64Disp203_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_BDXAddr64Disp20 }, }, |
1944 | | { 1996 /* lhi */, SystemZ::LHI, Convert__GR321_0__S16Imm1_1, 0, { MCK_GR32, MCK_S16Imm }, }, |
1945 | | { 2000 /* lhr */, SystemZ::LHR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
1946 | | { 2004 /* lhrl */, SystemZ::LHRL, Convert__GR321_0__PCRel321_1, 0, { MCK_GR32, MCK_PCRel32 }, }, |
1947 | | { 2009 /* lhy */, SystemZ::LHY, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
1948 | | { 2013 /* llc */, SystemZ::LLC, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
1949 | | { 2017 /* llch */, SystemZ::LLCH, Convert__GRH321_0__BDXAddr64Disp203_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_BDXAddr64Disp20 }, }, |
1950 | | { 2022 /* llcr */, SystemZ::LLCR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
1951 | | { 2027 /* llgc */, SystemZ::LLGC, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1952 | | { 2032 /* llgcr */, SystemZ::LLGCR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1953 | | { 2038 /* llgf */, SystemZ::LLGF, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1954 | | { 2043 /* llgfr */, SystemZ::LLGFR, Convert__GR641_0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
1955 | | { 2049 /* llgfrl */, SystemZ::LLGFRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1956 | | { 2056 /* llgh */, SystemZ::LLGH, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
1957 | | { 2061 /* llghr */, SystemZ::LLGHR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1958 | | { 2067 /* llghrl */, SystemZ::LLGHRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
1959 | | { 2074 /* llh */, SystemZ::LLH, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
1960 | | { 2078 /* llhh */, SystemZ::LLHH, Convert__GRH321_0__BDXAddr64Disp203_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_BDXAddr64Disp20 }, }, |
1961 | | { 2083 /* llhr */, SystemZ::LLHR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
1962 | | { 2088 /* llhrl */, SystemZ::LLHRL, Convert__GR321_0__PCRel321_1, 0, { MCK_GR32, MCK_PCRel32 }, }, |
1963 | | { 2094 /* llihf */, SystemZ::LLIHF, Convert__GR641_0__U32Imm1_1, 0, { MCK_GR64, MCK_U32Imm }, }, |
1964 | | { 2100 /* llihh */, SystemZ::LLIHH, Convert__GR641_0__U16Imm1_1, 0, { MCK_GR64, MCK_U16Imm }, }, |
1965 | | { 2106 /* llihl */, SystemZ::LLIHL, Convert__GR641_0__U16Imm1_1, 0, { MCK_GR64, MCK_U16Imm }, }, |
1966 | | { 2112 /* llilf */, SystemZ::LLILF, Convert__GR641_0__U32Imm1_1, 0, { MCK_GR64, MCK_U32Imm }, }, |
1967 | | { 2118 /* llilh */, SystemZ::LLILH, Convert__GR641_0__U16Imm1_1, 0, { MCK_GR64, MCK_U16Imm }, }, |
1968 | | { 2124 /* llill */, SystemZ::LLILL, Convert__GR641_0__U16Imm1_1, 0, { MCK_GR64, MCK_U16Imm }, }, |
1969 | | { 2130 /* lmg */, SystemZ::LMG, Convert__GR641_0__GR641_1__BDAddr64Disp202_2, 0, { MCK_GR64, MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1970 | | { 2134 /* lndbr */, SystemZ::LNDBR, Convert__FP641_0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
1971 | | { 2140 /* lndfr */, SystemZ::LNDFR, Convert__FP641_0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
1972 | | { 2146 /* lnebr */, SystemZ::LNEBR, Convert__FP321_0__FP321_1, 0, { MCK_FP32, MCK_FP32 }, }, |
1973 | | { 2152 /* lngfr */, SystemZ::LNGFR, Convert__GR641_0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
1974 | | { 2158 /* lngr */, SystemZ::LNGR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
1975 | | { 2163 /* lnr */, SystemZ::LNR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
1976 | | { 2167 /* lnxbr */, SystemZ::LNXBR, Convert__FP1281_0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
1977 | | { 2173 /* loc */, SystemZ::AsmLOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1__U4Imm1_2, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20, MCK_U4Imm }, }, |
1978 | | { 2177 /* loce */, SystemZ::AsmELOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
1979 | | { 2182 /* locg */, SystemZ::AsmLOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1__U4Imm1_2, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20, MCK_U4Imm }, }, |
1980 | | { 2187 /* locge */, SystemZ::AsmELOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1981 | | { 2193 /* locgh */, SystemZ::AsmHLOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1982 | | { 2199 /* locghe */, SystemZ::AsmHELOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1983 | | { 2206 /* locgl */, SystemZ::AsmLLOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1984 | | { 2212 /* locgle */, SystemZ::AsmLELOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1985 | | { 2219 /* locglh */, SystemZ::AsmLHLOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1986 | | { 2226 /* locgne */, SystemZ::AsmNELOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1987 | | { 2233 /* locgnh */, SystemZ::AsmNHLOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1988 | | { 2240 /* locgnhe */, SystemZ::AsmNHELOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1989 | | { 2248 /* locgnl */, SystemZ::AsmNLLOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1990 | | { 2255 /* locgnle */, SystemZ::AsmNLELOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1991 | | { 2263 /* locgnlh */, SystemZ::AsmNLHLOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1992 | | { 2271 /* locgno */, SystemZ::AsmNOLOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1993 | | { 2278 /* locgo */, SystemZ::AsmOLOCG, Convert__GR641_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
1994 | | { 2284 /* locgr */, SystemZ::AsmLOCGR, Convert__GR641_0__Tie0__GR641_1__U4Imm1_2, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64, MCK_U4Imm }, }, |
1995 | | { 2290 /* locgre */, SystemZ::AsmELOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
1996 | | { 2297 /* locgrh */, SystemZ::AsmHLOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
1997 | | { 2304 /* locgrhe */, SystemZ::AsmHELOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
1998 | | { 2312 /* locgrl */, SystemZ::AsmLLOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
1999 | | { 2319 /* locgrle */, SystemZ::AsmLELOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
2000 | | { 2327 /* locgrlh */, SystemZ::AsmLHLOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
2001 | | { 2335 /* locgrne */, SystemZ::AsmNELOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
2002 | | { 2343 /* locgrnh */, SystemZ::AsmNHLOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
2003 | | { 2351 /* locgrnhe */, SystemZ::AsmNHELOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
2004 | | { 2360 /* locgrnl */, SystemZ::AsmNLLOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
2005 | | { 2368 /* locgrnle */, SystemZ::AsmNLELOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
2006 | | { 2377 /* locgrnlh */, SystemZ::AsmNLHLOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
2007 | | { 2386 /* locgrno */, SystemZ::AsmNOLOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
2008 | | { 2394 /* locgro */, SystemZ::AsmOLOCGR, Convert__GR641_0__Tie0__GR641_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_GR64 }, }, |
2009 | | { 2401 /* loch */, SystemZ::AsmHLOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2010 | | { 2406 /* loche */, SystemZ::AsmHELOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2011 | | { 2412 /* locl */, SystemZ::AsmLLOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2012 | | { 2417 /* locle */, SystemZ::AsmLELOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2013 | | { 2423 /* loclh */, SystemZ::AsmLHLOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2014 | | { 2429 /* locne */, SystemZ::AsmNELOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2015 | | { 2435 /* locnh */, SystemZ::AsmNHLOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2016 | | { 2441 /* locnhe */, SystemZ::AsmNHELOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2017 | | { 2448 /* locnl */, SystemZ::AsmNLLOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2018 | | { 2454 /* locnle */, SystemZ::AsmNLELOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2019 | | { 2461 /* locnlh */, SystemZ::AsmNLHLOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2020 | | { 2468 /* locno */, SystemZ::AsmNOLOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2021 | | { 2474 /* loco */, SystemZ::AsmOLOC, Convert__GR321_0__Tie0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2022 | | { 2479 /* locr */, SystemZ::AsmLOCR, Convert__GR321_0__Tie0__GR321_1__U4Imm1_2, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32, MCK_U4Imm }, }, |
2023 | | { 2484 /* locre */, SystemZ::AsmELOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2024 | | { 2490 /* locrh */, SystemZ::AsmHLOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2025 | | { 2496 /* locrhe */, SystemZ::AsmHELOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2026 | | { 2503 /* locrl */, SystemZ::AsmLLOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2027 | | { 2509 /* locrle */, SystemZ::AsmLELOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2028 | | { 2516 /* locrlh */, SystemZ::AsmLHLOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2029 | | { 2523 /* locrne */, SystemZ::AsmNELOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2030 | | { 2530 /* locrnh */, SystemZ::AsmNHLOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2031 | | { 2537 /* locrnhe */, SystemZ::AsmNHELOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2032 | | { 2545 /* locrnl */, SystemZ::AsmNLLOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2033 | | { 2552 /* locrnle */, SystemZ::AsmNLELOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2034 | | { 2560 /* locrnlh */, SystemZ::AsmNLHLOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2035 | | { 2568 /* locrno */, SystemZ::AsmNOLOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2036 | | { 2575 /* locro */, SystemZ::AsmOLOCR, Convert__GR321_0__Tie0__GR321_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_GR32 }, }, |
2037 | | { 2581 /* lpdbr */, SystemZ::LPDBR, Convert__FP641_0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
2038 | | { 2587 /* lpdfr */, SystemZ::LPDFR, Convert__FP641_0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
2039 | | { 2593 /* lpebr */, SystemZ::LPEBR, Convert__FP321_0__FP321_1, 0, { MCK_FP32, MCK_FP32 }, }, |
2040 | | { 2599 /* lpgfr */, SystemZ::LPGFR, Convert__GR641_0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
2041 | | { 2605 /* lpgr */, SystemZ::LPGR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
2042 | | { 2610 /* lpr */, SystemZ::LPR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
2043 | | { 2614 /* lpxbr */, SystemZ::LPXBR, Convert__FP1281_0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
2044 | | { 2620 /* lr */, SystemZ::LR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
2045 | | { 2623 /* lrl */, SystemZ::LRL, Convert__GR321_0__PCRel321_1, 0, { MCK_GR32, MCK_PCRel32 }, }, |
2046 | | { 2627 /* lrv */, SystemZ::LRV, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2047 | | { 2631 /* lrvg */, SystemZ::LRVG, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2048 | | { 2636 /* lrvgr */, SystemZ::LRVGR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
2049 | | { 2642 /* lrvr */, SystemZ::LRVR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
2050 | | { 2647 /* lt */, SystemZ::LT, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2051 | | { 2650 /* ltdbr */, SystemZ::LTDBR, Convert__FP641_0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
2052 | | { 2656 /* ltebr */, SystemZ::LTEBR, Convert__FP321_0__FP321_1, 0, { MCK_FP32, MCK_FP32 }, }, |
2053 | | { 2662 /* ltg */, SystemZ::LTG, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2054 | | { 2666 /* ltgf */, SystemZ::LTGF, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2055 | | { 2671 /* ltgfr */, SystemZ::LTGFR, Convert__GR641_0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
2056 | | { 2677 /* ltgr */, SystemZ::LTGR, Convert__GR641_0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
2057 | | { 2682 /* ltr */, SystemZ::LTR, Convert__GR321_0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
2058 | | { 2686 /* ltxbr */, SystemZ::LTXBR, Convert__FP1281_0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
2059 | | { 2692 /* lxdb */, SystemZ::LXDB, Convert__FP1281_0__BDXAddr64Disp123_1, 0, { MCK_FP128, MCK_BDXAddr64Disp12 }, }, |
2060 | | { 2697 /* lxdbr */, SystemZ::LXDBR, Convert__FP1281_0__FP641_1, 0, { MCK_FP128, MCK_FP64 }, }, |
2061 | | { 2703 /* lxeb */, SystemZ::LXEB, Convert__FP1281_0__BDXAddr64Disp123_1, 0, { MCK_FP128, MCK_BDXAddr64Disp12 }, }, |
2062 | | { 2708 /* lxebr */, SystemZ::LXEBR, Convert__FP1281_0__FP321_1, 0, { MCK_FP128, MCK_FP32 }, }, |
2063 | | { 2714 /* lxr */, SystemZ::LXR, Convert__FP1281_0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
2064 | | { 2718 /* ly */, SystemZ::LY, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2065 | | { 2721 /* lzdr */, SystemZ::LZDR, Convert__FP641_0, 0, { MCK_FP64 }, }, |
2066 | | { 2726 /* lzer */, SystemZ::LZER, Convert__FP321_0, 0, { MCK_FP32 }, }, |
2067 | | { 2731 /* lzxr */, SystemZ::LZXR, Convert__FP1281_0, 0, { MCK_FP128 }, }, |
2068 | | { 2736 /* madb */, SystemZ::MADB, Convert__FP641_0__Tie0__FP641_1__BDXAddr64Disp123_2, 0, { MCK_FP64, MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
2069 | | { 2741 /* madbr */, SystemZ::MADBR, Convert__FP641_0__Tie0__FP641_1__FP641_2, 0, { MCK_FP64, MCK_FP64, MCK_FP64 }, }, |
2070 | | { 2747 /* maeb */, SystemZ::MAEB, Convert__FP321_0__Tie0__FP321_1__BDXAddr64Disp123_2, 0, { MCK_FP32, MCK_FP32, MCK_BDXAddr64Disp12 }, }, |
2071 | | { 2752 /* maebr */, SystemZ::MAEBR, Convert__FP321_0__Tie0__FP321_1__FP321_2, 0, { MCK_FP32, MCK_FP32, MCK_FP32 }, }, |
2072 | | { 2758 /* mdb */, SystemZ::MDB, Convert__FP641_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
2073 | | { 2762 /* mdbr */, SystemZ::MDBR, Convert__FP641_0__Tie0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
2074 | | { 2767 /* mdeb */, SystemZ::MDEB, Convert__FP641_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
2075 | | { 2772 /* mdebr */, SystemZ::MDEBR, Convert__FP641_0__Tie0__FP321_1, 0, { MCK_FP64, MCK_FP32 }, }, |
2076 | | { 2778 /* meeb */, SystemZ::MEEB, Convert__FP321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_FP32, MCK_BDXAddr64Disp12 }, }, |
2077 | | { 2783 /* meebr */, SystemZ::MEEBR, Convert__FP321_0__Tie0__FP321_1, 0, { MCK_FP32, MCK_FP32 }, }, |
2078 | | { 2789 /* mghi */, SystemZ::MGHI, Convert__GR641_0__Tie0__S16Imm1_1, 0, { MCK_GR64, MCK_S16Imm }, }, |
2079 | | { 2794 /* mh */, SystemZ::MH, Convert__GR321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
2080 | | { 2797 /* mhi */, SystemZ::MHI, Convert__GR321_0__Tie0__S16Imm1_1, 0, { MCK_GR32, MCK_S16Imm }, }, |
2081 | | { 2801 /* mhy */, SystemZ::MHY, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2082 | | { 2805 /* mlg */, SystemZ::MLG, Convert__GR1281_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR128, MCK_BDXAddr64Disp20 }, }, |
2083 | | { 2809 /* mlgr */, SystemZ::MLGR, Convert__GR1281_0__Tie0__GR641_1, 0, { MCK_GR128, MCK_GR64 }, }, |
2084 | | { 2814 /* ms */, SystemZ::MS, Convert__GR321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
2085 | | { 2817 /* msdb */, SystemZ::MSDB, Convert__FP641_0__Tie0__FP641_1__BDXAddr64Disp123_2, 0, { MCK_FP64, MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
2086 | | { 2822 /* msdbr */, SystemZ::MSDBR, Convert__FP641_0__Tie0__FP641_1__FP641_2, 0, { MCK_FP64, MCK_FP64, MCK_FP64 }, }, |
2087 | | { 2828 /* mseb */, SystemZ::MSEB, Convert__FP321_0__Tie0__FP321_1__BDXAddr64Disp123_2, 0, { MCK_FP32, MCK_FP32, MCK_BDXAddr64Disp12 }, }, |
2088 | | { 2833 /* msebr */, SystemZ::MSEBR, Convert__FP321_0__Tie0__FP321_1__FP321_2, 0, { MCK_FP32, MCK_FP32, MCK_FP32 }, }, |
2089 | | { 2839 /* msfi */, SystemZ::MSFI, Convert__GR321_0__Tie0__S32Imm1_1, 0, { MCK_GR32, MCK_S32Imm }, }, |
2090 | | { 2844 /* msg */, SystemZ::MSG, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2091 | | { 2848 /* msgf */, SystemZ::MSGF, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2092 | | { 2853 /* msgfi */, SystemZ::MSGFI, Convert__GR641_0__Tie0__S32Imm1_1, 0, { MCK_GR64, MCK_S32Imm }, }, |
2093 | | { 2859 /* msgfr */, SystemZ::MSGFR, Convert__GR641_0__Tie0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
2094 | | { 2865 /* msgr */, SystemZ::MSGR, Convert__GR641_0__Tie0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
2095 | | { 2870 /* msr */, SystemZ::MSR, Convert__GR321_0__Tie0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
2096 | | { 2874 /* msy */, SystemZ::MSY, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2097 | | { 2878 /* mvc */, SystemZ::MVC, Convert__BDLAddr64Disp12Len83_0__BDAddr64Disp122_1, 0, { MCK_BDLAddr64Disp12Len8, MCK_BDAddr64Disp12 }, }, |
2098 | | { 2882 /* mvghi */, SystemZ::MVGHI, Convert__BDAddr64Disp122_0__S16Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_S16Imm }, }, |
2099 | | { 2888 /* mvhhi */, SystemZ::MVHHI, Convert__BDAddr64Disp122_0__S16Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_S16Imm }, }, |
2100 | | { 2894 /* mvhi */, SystemZ::MVHI, Convert__BDAddr64Disp122_0__S16Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_S16Imm }, }, |
2101 | | { 2899 /* mvi */, SystemZ::MVI, Convert__BDAddr64Disp122_0__U8Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_U8Imm }, }, |
2102 | | { 2903 /* mviy */, SystemZ::MVIY, Convert__BDAddr64Disp202_0__U8Imm1_1, 0, { MCK_BDAddr64Disp20, MCK_U8Imm }, }, |
2103 | | { 2908 /* mvst */, SystemZ::MVST, Convert__GR641_0__GR641_1__Tie0__Tie1, 0, { MCK_GR64, MCK_GR64 }, }, |
2104 | | { 2913 /* mxbr */, SystemZ::MXBR, Convert__FP1281_0__Tie0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
2105 | | { 2918 /* mxdb */, SystemZ::MXDB, Convert__FP1281_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_FP128, MCK_BDXAddr64Disp12 }, }, |
2106 | | { 2923 /* mxdbr */, SystemZ::MXDBR, Convert__FP1281_0__Tie0__FP641_1, 0, { MCK_FP128, MCK_FP64 }, }, |
2107 | | { 2929 /* n */, SystemZ::N, Convert__GR321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
2108 | | { 2931 /* nc */, SystemZ::NC, Convert__BDLAddr64Disp12Len83_0__BDAddr64Disp122_1, 0, { MCK_BDLAddr64Disp12Len8, MCK_BDAddr64Disp12 }, }, |
2109 | | { 2934 /* ng */, SystemZ::NG, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2110 | | { 2937 /* ngr */, SystemZ::NGR, Convert__GR641_0__Tie0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
2111 | | { 2941 /* ngrk */, SystemZ::NGRK, Convert__GR641_0__GR641_1__GR641_2, Feature_FeatureDistinctOps, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, |
2112 | | { 2946 /* ni */, SystemZ::NI, Convert__BDAddr64Disp122_0__U8Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_U8Imm }, }, |
2113 | | { 2949 /* nihf */, SystemZ::NIHF, Convert__GRH321_0__Tie0__U32Imm1_1, 0, { MCK_GRH32, MCK_U32Imm }, }, |
2114 | | { 2954 /* nihh */, SystemZ::NIHH, Convert__GRH321_0__Tie0__U16Imm1_1, 0, { MCK_GRH32, MCK_U16Imm }, }, |
2115 | | { 2959 /* nihl */, SystemZ::NIHL, Convert__GRH321_0__Tie0__U16Imm1_1, 0, { MCK_GRH32, MCK_U16Imm }, }, |
2116 | | { 2964 /* nilf */, SystemZ::NILF, Convert__GR321_0__Tie0__U32Imm1_1, 0, { MCK_GR32, MCK_U32Imm }, }, |
2117 | | { 2969 /* nilh */, SystemZ::NILH, Convert__GR321_0__Tie0__U16Imm1_1, 0, { MCK_GR32, MCK_U16Imm }, }, |
2118 | | { 2974 /* nill */, SystemZ::NILL, Convert__GR321_0__Tie0__U16Imm1_1, 0, { MCK_GR32, MCK_U16Imm }, }, |
2119 | | { 2979 /* niy */, SystemZ::NIY, Convert__BDAddr64Disp202_0__U8Imm1_1, 0, { MCK_BDAddr64Disp20, MCK_U8Imm }, }, |
2120 | | { 2983 /* nr */, SystemZ::NR, Convert__GR321_0__Tie0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
2121 | | { 2986 /* nrk */, SystemZ::NRK, Convert__GR321_0__GR321_1__GR321_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, |
2122 | | { 2990 /* ntstg */, SystemZ::NTSTG, Convert__GR641_0__BDXAddr64Disp203_1, Feature_FeatureTransactionalExecution, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2123 | | { 2996 /* ny */, SystemZ::NY, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2124 | | { 2999 /* o */, SystemZ::O, Convert__GR321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
2125 | | { 3001 /* oc */, SystemZ::OC, Convert__BDLAddr64Disp12Len83_0__BDAddr64Disp122_1, 0, { MCK_BDLAddr64Disp12Len8, MCK_BDAddr64Disp12 }, }, |
2126 | | { 3004 /* og */, SystemZ::OG, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2127 | | { 3007 /* ogr */, SystemZ::OGR, Convert__GR641_0__Tie0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
2128 | | { 3011 /* ogrk */, SystemZ::OGRK, Convert__GR641_0__GR641_1__GR641_2, Feature_FeatureDistinctOps, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, |
2129 | | { 3016 /* oi */, SystemZ::OI, Convert__BDAddr64Disp122_0__U8Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_U8Imm }, }, |
2130 | | { 3019 /* oihf */, SystemZ::OIHF, Convert__GRH321_0__Tie0__U32Imm1_1, 0, { MCK_GRH32, MCK_U32Imm }, }, |
2131 | | { 3024 /* oihh */, SystemZ::OIHH, Convert__GRH321_0__Tie0__U16Imm1_1, 0, { MCK_GRH32, MCK_U16Imm }, }, |
2132 | | { 3029 /* oihl */, SystemZ::OIHL, Convert__GRH321_0__Tie0__U16Imm1_1, 0, { MCK_GRH32, MCK_U16Imm }, }, |
2133 | | { 3034 /* oilf */, SystemZ::OILF, Convert__GR321_0__Tie0__U32Imm1_1, 0, { MCK_GR32, MCK_U32Imm }, }, |
2134 | | { 3039 /* oilh */, SystemZ::OILH, Convert__GR321_0__Tie0__U16Imm1_1, 0, { MCK_GR32, MCK_U16Imm }, }, |
2135 | | { 3044 /* oill */, SystemZ::OILL, Convert__GR321_0__Tie0__U16Imm1_1, 0, { MCK_GR32, MCK_U16Imm }, }, |
2136 | | { 3049 /* oiy */, SystemZ::OIY, Convert__BDAddr64Disp202_0__U8Imm1_1, 0, { MCK_BDAddr64Disp20, MCK_U8Imm }, }, |
2137 | | { 3053 /* or */, SystemZ::OR, Convert__GR321_0__Tie0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
2138 | | { 3056 /* ork */, SystemZ::ORK, Convert__GR321_0__GR321_1__GR321_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, |
2139 | | { 3060 /* oy */, SystemZ::OY, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2140 | | { 3063 /* pfd */, SystemZ::PFD, Convert__U4Imm1_0__BDXAddr64Disp203_1, 0, { MCK_U4Imm, MCK_BDXAddr64Disp20 }, }, |
2141 | | { 3067 /* pfdrl */, SystemZ::PFDRL, Convert__U4Imm1_0__PCRel321_1, 0, { MCK_U4Imm, MCK_PCRel32 }, }, |
2142 | | { 3073 /* popcnt */, SystemZ::POPCNT, Convert__GR641_0__GR641_1, Feature_FeaturePopulationCount, { MCK_GR64, MCK_GR64 }, }, |
2143 | | { 3080 /* ppa */, SystemZ::PPA, Convert__GR641_0__GR641_1__U4Imm1_2, Feature_FeatureProcessorAssist, { MCK_GR64, MCK_GR64, MCK_U4Imm }, }, |
2144 | | { 3084 /* risbg */, SystemZ::RISBG, Convert__GR641_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4, 0, { MCK_GR64, MCK_GR64, MCK_U8Imm, MCK_U8Imm, MCK_U6Imm }, }, |
2145 | | { 3090 /* risbgn */, SystemZ::RISBGN, Convert__GR641_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4, Feature_FeatureMiscellaneousExtensions, { MCK_GR64, MCK_GR64, MCK_U8Imm, MCK_U8Imm, MCK_U6Imm }, }, |
2146 | | { 3097 /* risbhg */, SystemZ::RISBHG, Convert__GRH321_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4, Feature_FeatureHighWord, { MCK_GRH32, MCK_GR64, MCK_U8Imm, MCK_U8Imm, MCK_U6Imm }, }, |
2147 | | { 3104 /* risblg */, SystemZ::RISBLG, Convert__GR321_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4, Feature_FeatureHighWord, { MCK_GR32, MCK_GR64, MCK_U8Imm, MCK_U8Imm, MCK_U6Imm }, }, |
2148 | | { 3111 /* rll */, SystemZ::RLL, Convert__GR321_0__GR321_1__BDAddr32Disp202_2, 0, { MCK_GR32, MCK_GR32, MCK_BDAddr32Disp20 }, }, |
2149 | | { 3115 /* rllg */, SystemZ::RLLG, Convert__GR641_0__GR641_1__BDAddr32Disp202_2, 0, { MCK_GR64, MCK_GR64, MCK_BDAddr32Disp20 }, }, |
2150 | | { 3120 /* rnsbg */, SystemZ::RNSBG, Convert__GR641_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4, 0, { MCK_GR64, MCK_GR64, MCK_U8Imm, MCK_U8Imm, MCK_U6Imm }, }, |
2151 | | { 3126 /* rosbg */, SystemZ::ROSBG, Convert__GR641_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4, 0, { MCK_GR64, MCK_GR64, MCK_U8Imm, MCK_U8Imm, MCK_U6Imm }, }, |
2152 | | { 3132 /* rxsbg */, SystemZ::RXSBG, Convert__GR641_0__Tie0__GR641_1__U8Imm1_2__U8Imm1_3__U6Imm1_4, 0, { MCK_GR64, MCK_GR64, MCK_U8Imm, MCK_U8Imm, MCK_U6Imm }, }, |
2153 | | { 3138 /* s */, SystemZ::S, Convert__GR321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
2154 | | { 3140 /* sdb */, SystemZ::SDB, Convert__FP641_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
2155 | | { 3144 /* sdbr */, SystemZ::SDBR, Convert__FP641_0__Tie0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
2156 | | { 3149 /* seb */, SystemZ::SEB, Convert__FP321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_FP32, MCK_BDXAddr64Disp12 }, }, |
2157 | | { 3153 /* sebr */, SystemZ::SEBR, Convert__FP321_0__Tie0__FP321_1, 0, { MCK_FP32, MCK_FP32 }, }, |
2158 | | { 3158 /* sg */, SystemZ::SG, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2159 | | { 3161 /* sgf */, SystemZ::SGF, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2160 | | { 3165 /* sgfr */, SystemZ::SGFR, Convert__GR641_0__Tie0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
2161 | | { 3170 /* sgr */, SystemZ::SGR, Convert__GR641_0__Tie0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
2162 | | { 3174 /* sgrk */, SystemZ::SGRK, Convert__GR641_0__GR641_1__GR641_2, Feature_FeatureDistinctOps, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, |
2163 | | { 3179 /* sh */, SystemZ::SH, Convert__GR321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
2164 | | { 3182 /* shy */, SystemZ::SHY, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2165 | | { 3186 /* sl */, SystemZ::SL, Convert__GR321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
2166 | | { 3189 /* slb */, SystemZ::SLB, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2167 | | { 3193 /* slbg */, SystemZ::SLBG, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2168 | | { 3198 /* slbgr */, SystemZ::SLBGR, Convert__GR641_0__Tie0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
2169 | | { 3204 /* slbr */, SystemZ::SLBR, Convert__GR321_0__Tie0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
2170 | | { 3209 /* slfi */, SystemZ::SLFI, Convert__GR321_0__Tie0__U32Imm1_1, 0, { MCK_GR32, MCK_U32Imm }, }, |
2171 | | { 3214 /* slg */, SystemZ::SLG, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2172 | | { 3218 /* slgf */, SystemZ::SLGF, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2173 | | { 3223 /* slgfi */, SystemZ::SLGFI, Convert__GR641_0__Tie0__U32Imm1_1, 0, { MCK_GR64, MCK_U32Imm }, }, |
2174 | | { 3229 /* slgfr */, SystemZ::SLGFR, Convert__GR641_0__Tie0__GR321_1, 0, { MCK_GR64, MCK_GR32 }, }, |
2175 | | { 3235 /* slgr */, SystemZ::SLGR, Convert__GR641_0__Tie0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
2176 | | { 3240 /* slgrk */, SystemZ::SLGRK, Convert__GR641_0__GR641_1__GR641_2, Feature_FeatureDistinctOps, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, |
2177 | | { 3246 /* sll */, SystemZ::SLL, Convert__GR321_0__Tie0__BDAddr32Disp122_1, 0, { MCK_GR32, MCK_BDAddr32Disp12 }, }, |
2178 | | { 3250 /* sllg */, SystemZ::SLLG, Convert__GR641_0__GR641_1__BDAddr32Disp202_2, 0, { MCK_GR64, MCK_GR64, MCK_BDAddr32Disp20 }, }, |
2179 | | { 3255 /* sllk */, SystemZ::SLLK, Convert__GR321_0__GR321_1__BDAddr32Disp202_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_BDAddr32Disp20 }, }, |
2180 | | { 3260 /* slr */, SystemZ::SLR, Convert__GR321_0__Tie0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
2181 | | { 3264 /* slrk */, SystemZ::SLRK, Convert__GR321_0__GR321_1__GR321_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, |
2182 | | { 3269 /* sly */, SystemZ::SLY, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2183 | | { 3273 /* sqdb */, SystemZ::SQDB, Convert__FP641_0__BDXAddr64Disp123_1, 0, { MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
2184 | | { 3278 /* sqdbr */, SystemZ::SQDBR, Convert__FP641_0__FP641_1, 0, { MCK_FP64, MCK_FP64 }, }, |
2185 | | { 3284 /* sqeb */, SystemZ::SQEB, Convert__FP321_0__BDXAddr64Disp123_1, 0, { MCK_FP32, MCK_BDXAddr64Disp12 }, }, |
2186 | | { 3289 /* sqebr */, SystemZ::SQEBR, Convert__FP321_0__FP321_1, 0, { MCK_FP32, MCK_FP32 }, }, |
2187 | | { 3295 /* sqxbr */, SystemZ::SQXBR, Convert__FP1281_0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
2188 | | { 3301 /* sr */, SystemZ::SR, Convert__GR321_0__Tie0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
2189 | | { 3304 /* sra */, SystemZ::SRA, Convert__GR321_0__Tie0__BDAddr32Disp122_1, 0, { MCK_GR32, MCK_BDAddr32Disp12 }, }, |
2190 | | { 3308 /* srag */, SystemZ::SRAG, Convert__GR641_0__GR641_1__BDAddr32Disp202_2, 0, { MCK_GR64, MCK_GR64, MCK_BDAddr32Disp20 }, }, |
2191 | | { 3313 /* srak */, SystemZ::SRAK, Convert__GR321_0__GR321_1__BDAddr32Disp202_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_BDAddr32Disp20 }, }, |
2192 | | { 3318 /* srk */, SystemZ::SRK, Convert__GR321_0__GR321_1__GR321_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, |
2193 | | { 3322 /* srl */, SystemZ::SRL, Convert__GR321_0__Tie0__BDAddr32Disp122_1, 0, { MCK_GR32, MCK_BDAddr32Disp12 }, }, |
2194 | | { 3326 /* srlg */, SystemZ::SRLG, Convert__GR641_0__GR641_1__BDAddr32Disp202_2, 0, { MCK_GR64, MCK_GR64, MCK_BDAddr32Disp20 }, }, |
2195 | | { 3331 /* srlk */, SystemZ::SRLK, Convert__GR321_0__GR321_1__BDAddr32Disp202_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_BDAddr32Disp20 }, }, |
2196 | | { 3336 /* srst */, SystemZ::SRST, Convert__GR641_0__GR641_1__Tie0__Tie1, 0, { MCK_GR64, MCK_GR64 }, }, |
2197 | | { 3341 /* st */, SystemZ::ST, Convert__GR321_0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
2198 | | { 3344 /* stc */, SystemZ::STC, Convert__GR321_0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
2199 | | { 3348 /* stch */, SystemZ::STCH, Convert__GRH321_0__BDXAddr64Disp203_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_BDXAddr64Disp20 }, }, |
2200 | | { 3353 /* stck */, SystemZ::STCK, Convert__BDAddr64Disp122_0, 0, { MCK_BDAddr64Disp12 }, }, |
2201 | | { 3358 /* stcke */, SystemZ::STCKE, Convert__BDAddr64Disp122_0, 0, { MCK_BDAddr64Disp12 }, }, |
2202 | | { 3364 /* stckf */, SystemZ::STCKF, Convert__BDAddr64Disp122_0, 0, { MCK_BDAddr64Disp12 }, }, |
2203 | | { 3370 /* stcy */, SystemZ::STCY, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2204 | | { 3375 /* std */, SystemZ::STD, Convert__FP641_0__BDXAddr64Disp123_1, 0, { MCK_FP64, MCK_BDXAddr64Disp12 }, }, |
2205 | | { 3379 /* stdy */, SystemZ::STDY, Convert__FP641_0__BDXAddr64Disp203_1, 0, { MCK_FP64, MCK_BDXAddr64Disp20 }, }, |
2206 | | { 3384 /* ste */, SystemZ::STE, Convert__FP321_0__BDXAddr64Disp123_1, 0, { MCK_FP32, MCK_BDXAddr64Disp12 }, }, |
2207 | | { 3388 /* stey */, SystemZ::STEY, Convert__FP321_0__BDXAddr64Disp203_1, 0, { MCK_FP32, MCK_BDXAddr64Disp20 }, }, |
2208 | | { 3393 /* stfh */, SystemZ::STFH, Convert__GRH321_0__BDXAddr64Disp203_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_BDXAddr64Disp20 }, }, |
2209 | | { 3398 /* stfle */, SystemZ::STFLE, Convert__BDAddr64Disp122_0, 0, { MCK_BDAddr64Disp12 }, }, |
2210 | | { 3404 /* stg */, SystemZ::STG, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2211 | | { 3408 /* stgrl */, SystemZ::STGRL, Convert__GR641_0__PCRel321_1, 0, { MCK_GR64, MCK_PCRel32 }, }, |
2212 | | { 3414 /* sth */, SystemZ::STH, Convert__GR321_0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
2213 | | { 3418 /* sthh */, SystemZ::STHH, Convert__GRH321_0__BDXAddr64Disp203_1, Feature_FeatureHighWord, { MCK_GRH32, MCK_BDXAddr64Disp20 }, }, |
2214 | | { 3423 /* sthrl */, SystemZ::STHRL, Convert__GR321_0__PCRel321_1, 0, { MCK_GR32, MCK_PCRel32 }, }, |
2215 | | { 3429 /* sthy */, SystemZ::STHY, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2216 | | { 3434 /* stmg */, SystemZ::STMG, Convert__GR641_0__GR641_1__BDAddr64Disp202_2, 0, { MCK_GR64, MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2217 | | { 3439 /* stoc */, SystemZ::AsmSTOC, Convert__GR321_0__BDAddr64Disp202_1__U4Imm1_2, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20, MCK_U4Imm }, }, |
2218 | | { 3444 /* stoce */, SystemZ::AsmESTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2219 | | { 3450 /* stocg */, SystemZ::AsmSTOCG, Convert__GR641_0__BDAddr64Disp202_1__U4Imm1_2, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20, MCK_U4Imm }, }, |
2220 | | { 3456 /* stocge */, SystemZ::AsmESTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2221 | | { 3463 /* stocgh */, SystemZ::AsmHSTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2222 | | { 3470 /* stocghe */, SystemZ::AsmHESTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2223 | | { 3478 /* stocgl */, SystemZ::AsmLSTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2224 | | { 3485 /* stocgle */, SystemZ::AsmLESTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2225 | | { 3493 /* stocglh */, SystemZ::AsmLHSTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2226 | | { 3501 /* stocgne */, SystemZ::AsmNESTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2227 | | { 3509 /* stocgnh */, SystemZ::AsmNHSTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2228 | | { 3517 /* stocgnhe */, SystemZ::AsmNHESTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2229 | | { 3526 /* stocgnl */, SystemZ::AsmNLSTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2230 | | { 3534 /* stocgnle */, SystemZ::AsmNLESTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2231 | | { 3543 /* stocgnlh */, SystemZ::AsmNLHSTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2232 | | { 3552 /* stocgno */, SystemZ::AsmNOSTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2233 | | { 3560 /* stocgo */, SystemZ::AsmOSTOCG, Convert__GR641_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR64, MCK_BDAddr64Disp20 }, }, |
2234 | | { 3567 /* stoch */, SystemZ::AsmHSTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2235 | | { 3573 /* stoche */, SystemZ::AsmHESTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2236 | | { 3580 /* stocl */, SystemZ::AsmLSTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2237 | | { 3586 /* stocle */, SystemZ::AsmLESTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2238 | | { 3593 /* stoclh */, SystemZ::AsmLHSTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2239 | | { 3600 /* stocne */, SystemZ::AsmNESTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2240 | | { 3607 /* stocnh */, SystemZ::AsmNHSTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2241 | | { 3614 /* stocnhe */, SystemZ::AsmNHESTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2242 | | { 3622 /* stocnl */, SystemZ::AsmNLSTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2243 | | { 3629 /* stocnle */, SystemZ::AsmNLESTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2244 | | { 3637 /* stocnlh */, SystemZ::AsmNLHSTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2245 | | { 3645 /* stocno */, SystemZ::AsmNOSTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2246 | | { 3652 /* stoco */, SystemZ::AsmOSTOC, Convert__GR321_0__BDAddr64Disp202_1, Feature_FeatureLoadStoreOnCond, { MCK_GR32, MCK_BDAddr64Disp20 }, }, |
2247 | | { 3658 /* strl */, SystemZ::STRL, Convert__GR321_0__PCRel321_1, 0, { MCK_GR32, MCK_PCRel32 }, }, |
2248 | | { 3663 /* strv */, SystemZ::STRV, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2249 | | { 3668 /* strvg */, SystemZ::STRVG, Convert__GR641_0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2250 | | { 3674 /* sty */, SystemZ::STY, Convert__GR321_0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2251 | | { 3678 /* sxbr */, SystemZ::SXBR, Convert__FP1281_0__Tie0__FP1281_1, 0, { MCK_FP128, MCK_FP128 }, }, |
2252 | | { 3683 /* sy */, SystemZ::SY, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2253 | | { 3686 /* tabort */, SystemZ::TABORT, Convert__BDAddr64Disp122_0, Feature_FeatureTransactionalExecution, { MCK_BDAddr64Disp12 }, }, |
2254 | | { 3693 /* tbegin */, SystemZ::TBEGIN, Convert__BDAddr64Disp122_0__U16Imm1_1, Feature_FeatureTransactionalExecution, { MCK_BDAddr64Disp12, MCK_U16Imm }, }, |
2255 | | { 3700 /* tbeginc */, SystemZ::TBEGINC, Convert__BDAddr64Disp122_0__U16Imm1_1, Feature_FeatureTransactionalExecution, { MCK_BDAddr64Disp12, MCK_U16Imm }, }, |
2256 | | { 3708 /* tend */, SystemZ::TEND, Convert_NoOperands, Feature_FeatureTransactionalExecution, { }, }, |
2257 | | { 3713 /* tm */, SystemZ::TM, Convert__BDAddr64Disp122_0__U8Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_U8Imm }, }, |
2258 | | { 3716 /* tmhh */, SystemZ::TMHH, Convert__GRH321_0__U16Imm1_1, 0, { MCK_GRH32, MCK_U16Imm }, }, |
2259 | | { 3721 /* tmhl */, SystemZ::TMHL, Convert__GRH321_0__U16Imm1_1, 0, { MCK_GRH32, MCK_U16Imm }, }, |
2260 | | { 3726 /* tmlh */, SystemZ::TMLH, Convert__GR321_0__U16Imm1_1, 0, { MCK_GR32, MCK_U16Imm }, }, |
2261 | | { 3731 /* tmll */, SystemZ::TMLL, Convert__GR321_0__U16Imm1_1, 0, { MCK_GR32, MCK_U16Imm }, }, |
2262 | | { 3736 /* tmy */, SystemZ::TMY, Convert__BDAddr64Disp202_0__U8Imm1_1, 0, { MCK_BDAddr64Disp20, MCK_U8Imm }, }, |
2263 | | { 3740 /* vab */, SystemZ::VAB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2264 | | { 3744 /* vaccb */, SystemZ::VACCB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2265 | | { 3750 /* vacccq */, SystemZ::VACCCQ, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2266 | | { 3757 /* vaccf */, SystemZ::VACCF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2267 | | { 3763 /* vaccg */, SystemZ::VACCG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2268 | | { 3769 /* vacch */, SystemZ::VACCH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2269 | | { 3775 /* vaccq */, SystemZ::VACCQ, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2270 | | { 3781 /* vacq */, SystemZ::VACQ, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2271 | | { 3786 /* vaf */, SystemZ::VAF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2272 | | { 3790 /* vag */, SystemZ::VAG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2273 | | { 3794 /* vah */, SystemZ::VAH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2274 | | { 3798 /* vaq */, SystemZ::VAQ, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2275 | | { 3802 /* vavgb */, SystemZ::VAVGB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2276 | | { 3808 /* vavgf */, SystemZ::VAVGF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2277 | | { 3814 /* vavgg */, SystemZ::VAVGG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2278 | | { 3820 /* vavgh */, SystemZ::VAVGH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2279 | | { 3826 /* vavglb */, SystemZ::VAVGLB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2280 | | { 3833 /* vavglf */, SystemZ::VAVGLF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2281 | | { 3840 /* vavglg */, SystemZ::VAVGLG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2282 | | { 3847 /* vavglh */, SystemZ::VAVGLH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2283 | | { 3854 /* vcdgb */, SystemZ::VCDGB, Convert__VR1281_0__VR1281_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm }, }, |
2284 | | { 3860 /* vcdlgb */, SystemZ::VCDLGB, Convert__VR1281_0__VR1281_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm }, }, |
2285 | | { 3867 /* vceqb */, SystemZ::VCEQB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2286 | | { 3873 /* vceqbs */, SystemZ::VCEQBS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2287 | | { 3880 /* vceqf */, SystemZ::VCEQF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2288 | | { 3886 /* vceqfs */, SystemZ::VCEQFS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2289 | | { 3893 /* vceqg */, SystemZ::VCEQG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2290 | | { 3899 /* vceqgs */, SystemZ::VCEQGS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2291 | | { 3906 /* vceqh */, SystemZ::VCEQH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2292 | | { 3912 /* vceqhs */, SystemZ::VCEQHS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2293 | | { 3919 /* vcgdb */, SystemZ::VCGDB, Convert__VR1281_0__VR1281_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm }, }, |
2294 | | { 3925 /* vchb */, SystemZ::VCHB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2295 | | { 3930 /* vchbs */, SystemZ::VCHBS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2296 | | { 3936 /* vchf */, SystemZ::VCHF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2297 | | { 3941 /* vchfs */, SystemZ::VCHFS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2298 | | { 3947 /* vchg */, SystemZ::VCHG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2299 | | { 3952 /* vchgs */, SystemZ::VCHGS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2300 | | { 3958 /* vchh */, SystemZ::VCHH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2301 | | { 3963 /* vchhs */, SystemZ::VCHHS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2302 | | { 3969 /* vchlb */, SystemZ::VCHLB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2303 | | { 3975 /* vchlbs */, SystemZ::VCHLBS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2304 | | { 3982 /* vchlf */, SystemZ::VCHLF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2305 | | { 3988 /* vchlfs */, SystemZ::VCHLFS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2306 | | { 3995 /* vchlg */, SystemZ::VCHLG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2307 | | { 4001 /* vchlgs */, SystemZ::VCHLGS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2308 | | { 4008 /* vchlh */, SystemZ::VCHLH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2309 | | { 4014 /* vchlhs */, SystemZ::VCHLHS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2310 | | { 4021 /* vcksm */, SystemZ::VCKSM, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2311 | | { 4027 /* vclgdb */, SystemZ::VCLGDB, Convert__VR1281_0__VR1281_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm }, }, |
2312 | | { 4034 /* vclzb */, SystemZ::VCLZB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2313 | | { 4040 /* vclzf */, SystemZ::VCLZF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2314 | | { 4046 /* vclzg */, SystemZ::VCLZG, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2315 | | { 4052 /* vclzh */, SystemZ::VCLZH, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2316 | | { 4058 /* vctzb */, SystemZ::VCTZB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2317 | | { 4064 /* vctzf */, SystemZ::VCTZF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2318 | | { 4070 /* vctzg */, SystemZ::VCTZG, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2319 | | { 4076 /* vctzh */, SystemZ::VCTZH, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2320 | | { 4082 /* vecb */, SystemZ::VECB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2321 | | { 4087 /* vecf */, SystemZ::VECF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2322 | | { 4092 /* vecg */, SystemZ::VECG, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2323 | | { 4097 /* vech */, SystemZ::VECH, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2324 | | { 4102 /* veclb */, SystemZ::VECLB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2325 | | { 4108 /* veclf */, SystemZ::VECLF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2326 | | { 4114 /* veclg */, SystemZ::VECLG, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2327 | | { 4120 /* veclh */, SystemZ::VECLH, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2328 | | { 4126 /* verimb */, SystemZ::VERIMB, Convert__VR1281_0__Tie0__VR1281_1__VR1281_2__U8Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U8Imm }, }, |
2329 | | { 4133 /* verimf */, SystemZ::VERIMF, Convert__VR1281_0__Tie0__VR1281_1__VR1281_2__U8Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U8Imm }, }, |
2330 | | { 4140 /* verimg */, SystemZ::VERIMG, Convert__VR1281_0__Tie0__VR1281_1__VR1281_2__U8Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U8Imm }, }, |
2331 | | { 4147 /* verimh */, SystemZ::VERIMH, Convert__VR1281_0__Tie0__VR1281_1__VR1281_2__U8Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U8Imm }, }, |
2332 | | { 4154 /* verllb */, SystemZ::VERLLB, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2333 | | { 4161 /* verllf */, SystemZ::VERLLF, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2334 | | { 4168 /* verllg */, SystemZ::VERLLG, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2335 | | { 4175 /* verllh */, SystemZ::VERLLH, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2336 | | { 4182 /* verllvb */, SystemZ::VERLLVB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2337 | | { 4190 /* verllvf */, SystemZ::VERLLVF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2338 | | { 4198 /* verllvg */, SystemZ::VERLLVG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2339 | | { 4206 /* verllvh */, SystemZ::VERLLVH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2340 | | { 4214 /* veslb */, SystemZ::VESLB, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2341 | | { 4220 /* veslf */, SystemZ::VESLF, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2342 | | { 4226 /* veslg */, SystemZ::VESLG, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2343 | | { 4232 /* veslh */, SystemZ::VESLH, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2344 | | { 4238 /* veslvb */, SystemZ::VESLVB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2345 | | { 4245 /* veslvf */, SystemZ::VESLVF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2346 | | { 4252 /* veslvg */, SystemZ::VESLVG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2347 | | { 4259 /* veslvh */, SystemZ::VESLVH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2348 | | { 4266 /* vesrab */, SystemZ::VESRAB, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2349 | | { 4273 /* vesraf */, SystemZ::VESRAF, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2350 | | { 4280 /* vesrag */, SystemZ::VESRAG, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2351 | | { 4287 /* vesrah */, SystemZ::VESRAH, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2352 | | { 4294 /* vesravb */, SystemZ::VESRAVB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2353 | | { 4302 /* vesravf */, SystemZ::VESRAVF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2354 | | { 4310 /* vesravg */, SystemZ::VESRAVG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2355 | | { 4318 /* vesravh */, SystemZ::VESRAVH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2356 | | { 4326 /* vesrlb */, SystemZ::VESRLB, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2357 | | { 4333 /* vesrlf */, SystemZ::VESRLF, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2358 | | { 4340 /* vesrlg */, SystemZ::VESRLG, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2359 | | { 4347 /* vesrlh */, SystemZ::VESRLH, Convert__VR1281_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2360 | | { 4354 /* vesrlvb */, SystemZ::VESRLVB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2361 | | { 4362 /* vesrlvf */, SystemZ::VESRLVF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2362 | | { 4370 /* vesrlvg */, SystemZ::VESRLVG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2363 | | { 4378 /* vesrlvh */, SystemZ::VESRLVH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2364 | | { 4386 /* vfadb */, SystemZ::VFADB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2365 | | { 4392 /* vfaeb */, SystemZ::VFAEB, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2366 | | { 4392 /* vfaeb */, SystemZ::VFAEB, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2367 | | { 4398 /* vfaebs */, SystemZ::VFAEBS, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2368 | | { 4398 /* vfaebs */, SystemZ::VFAEBS, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2369 | | { 4405 /* vfaef */, SystemZ::VFAEF, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2370 | | { 4405 /* vfaef */, SystemZ::VFAEF, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2371 | | { 4411 /* vfaefs */, SystemZ::VFAEFS, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2372 | | { 4411 /* vfaefs */, SystemZ::VFAEFS, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2373 | | { 4418 /* vfaeh */, SystemZ::VFAEH, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2374 | | { 4418 /* vfaeh */, SystemZ::VFAEH, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2375 | | { 4424 /* vfaehs */, SystemZ::VFAEHS, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2376 | | { 4424 /* vfaehs */, SystemZ::VFAEHS, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2377 | | { 4431 /* vfaezb */, SystemZ::VFAEZB, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2378 | | { 4431 /* vfaezb */, SystemZ::VFAEZB, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2379 | | { 4438 /* vfaezbs */, SystemZ::VFAEZBS, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2380 | | { 4438 /* vfaezbs */, SystemZ::VFAEZBS, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2381 | | { 4446 /* vfaezf */, SystemZ::VFAEZF, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2382 | | { 4446 /* vfaezf */, SystemZ::VFAEZF, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2383 | | { 4453 /* vfaezfs */, SystemZ::VFAEZFS, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2384 | | { 4453 /* vfaezfs */, SystemZ::VFAEZFS, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2385 | | { 4461 /* vfaezh */, SystemZ::VFAEZH, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2386 | | { 4461 /* vfaezh */, SystemZ::VFAEZH, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2387 | | { 4468 /* vfaezhs */, SystemZ::VFAEZHS, Convert__VR1281_0__VR1281_1__VR1281_2__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2388 | | { 4468 /* vfaezhs */, SystemZ::VFAEZHS, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2389 | | { 4476 /* vfcedb */, SystemZ::VFCEDB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2390 | | { 4483 /* vfcedbs */, SystemZ::VFCEDBS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2391 | | { 4491 /* vfchdb */, SystemZ::VFCHDB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2392 | | { 4498 /* vfchdbs */, SystemZ::VFCHDBS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2393 | | { 4506 /* vfchedb */, SystemZ::VFCHEDB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2394 | | { 4514 /* vfchedbs */, SystemZ::VFCHEDBS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2395 | | { 4523 /* vfddb */, SystemZ::VFDDB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2396 | | { 4529 /* vfeeb */, SystemZ::VFEEB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2397 | | { 4535 /* vfeebs */, SystemZ::VFEEBS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2398 | | { 4542 /* vfeef */, SystemZ::VFEEF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2399 | | { 4548 /* vfeefs */, SystemZ::VFEEFS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2400 | | { 4555 /* vfeeh */, SystemZ::VFEEH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2401 | | { 4561 /* vfeehs */, SystemZ::VFEEHS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2402 | | { 4568 /* vfeezb */, SystemZ::VFEEZB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2403 | | { 4575 /* vfeezbs */, SystemZ::VFEEZBS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2404 | | { 4583 /* vfeezf */, SystemZ::VFEEZF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2405 | | { 4590 /* vfeezfs */, SystemZ::VFEEZFS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2406 | | { 4598 /* vfeezh */, SystemZ::VFEEZH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2407 | | { 4605 /* vfeezhs */, SystemZ::VFEEZHS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2408 | | { 4613 /* vfeneb */, SystemZ::VFENEB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2409 | | { 4620 /* vfenebs */, SystemZ::VFENEBS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2410 | | { 4628 /* vfenef */, SystemZ::VFENEF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2411 | | { 4635 /* vfenefs */, SystemZ::VFENEFS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2412 | | { 4643 /* vfeneh */, SystemZ::VFENEH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2413 | | { 4650 /* vfenehs */, SystemZ::VFENEHS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2414 | | { 4658 /* vfenezb */, SystemZ::VFENEZB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2415 | | { 4666 /* vfenezbs */, SystemZ::VFENEZBS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2416 | | { 4675 /* vfenezf */, SystemZ::VFENEZF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2417 | | { 4683 /* vfenezfs */, SystemZ::VFENEZFS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2418 | | { 4692 /* vfenezh */, SystemZ::VFENEZH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2419 | | { 4700 /* vfenezhs */, SystemZ::VFENEZHS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2420 | | { 4709 /* vfidb */, SystemZ::VFIDB, Convert__VR1281_0__VR1281_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm }, }, |
2421 | | { 4715 /* vflcdb */, SystemZ::VFLCDB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2422 | | { 4722 /* vflndb */, SystemZ::VFLNDB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2423 | | { 4729 /* vflpdb */, SystemZ::VFLPDB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2424 | | { 4736 /* vfmadb */, SystemZ::VFMADB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2425 | | { 4743 /* vfmdb */, SystemZ::VFMDB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2426 | | { 4749 /* vfmsdb */, SystemZ::VFMSDB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2427 | | { 4756 /* vfsdb */, SystemZ::VFSDB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2428 | | { 4762 /* vfsqdb */, SystemZ::VFSQDB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2429 | | { 4769 /* vftcidb */, SystemZ::VFTCIDB, Convert__VR1281_0__VR1281_1__U12Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U12Imm }, }, |
2430 | | { 4777 /* vgbm */, SystemZ::VGBM, Convert__VR1281_0__U16Imm1_1, Feature_FeatureVector, { MCK_VR128, MCK_U16Imm }, }, |
2431 | | { 4782 /* vgef */, SystemZ::VGEF, Convert__VR1281_0__Tie0__BDVAddr64Disp123_1__U2Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDVAddr64Disp12, MCK_U2Imm }, }, |
2432 | | { 4787 /* vgeg */, SystemZ::VGEG, Convert__VR1281_0__Tie0__BDVAddr64Disp123_1__U1Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDVAddr64Disp12, MCK_U1Imm }, }, |
2433 | | { 4792 /* vgfmab */, SystemZ::VGFMAB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2434 | | { 4799 /* vgfmaf */, SystemZ::VGFMAF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2435 | | { 4806 /* vgfmag */, SystemZ::VGFMAG, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2436 | | { 4813 /* vgfmah */, SystemZ::VGFMAH, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2437 | | { 4820 /* vgfmb */, SystemZ::VGFMB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2438 | | { 4826 /* vgfmf */, SystemZ::VGFMF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2439 | | { 4832 /* vgfmg */, SystemZ::VGFMG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2440 | | { 4838 /* vgfmh */, SystemZ::VGFMH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2441 | | { 4844 /* vgmb */, SystemZ::VGMB, Convert__VR1281_0__U8Imm1_1__U8Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_U8Imm, MCK_U8Imm }, }, |
2442 | | { 4849 /* vgmf */, SystemZ::VGMF, Convert__VR1281_0__U8Imm1_1__U8Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_U8Imm, MCK_U8Imm }, }, |
2443 | | { 4854 /* vgmg */, SystemZ::VGMG, Convert__VR1281_0__U8Imm1_1__U8Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_U8Imm, MCK_U8Imm }, }, |
2444 | | { 4859 /* vgmh */, SystemZ::VGMH, Convert__VR1281_0__U8Imm1_1__U8Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_U8Imm, MCK_U8Imm }, }, |
2445 | | { 4864 /* vistrb */, SystemZ::VISTRB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2446 | | { 4871 /* vistrbs */, SystemZ::VISTRBS, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2447 | | { 4879 /* vistrf */, SystemZ::VISTRF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2448 | | { 4886 /* vistrfs */, SystemZ::VISTRFS, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2449 | | { 4894 /* vistrh */, SystemZ::VISTRH, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2450 | | { 4901 /* vistrhs */, SystemZ::VISTRHS, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2451 | | { 4909 /* vl */, SystemZ::VL, Convert__VR1281_0__BDXAddr64Disp123_1, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12 }, }, |
2452 | | { 4912 /* vlbb */, SystemZ::VLBB, Convert__VR1281_0__BDXAddr64Disp123_1__U4Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12, MCK_U4Imm }, }, |
2453 | | { 4917 /* vlcb */, SystemZ::VLCB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2454 | | { 4922 /* vlcf */, SystemZ::VLCF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2455 | | { 4927 /* vlcg */, SystemZ::VLCG, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2456 | | { 4932 /* vlch */, SystemZ::VLCH, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2457 | | { 4937 /* vldeb */, SystemZ::VLDEB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2458 | | { 4943 /* vleb */, SystemZ::VLEB, Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U4Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12, MCK_U4Imm }, }, |
2459 | | { 4948 /* vledb */, SystemZ::VLEDB, Convert__VR1281_0__VR1281_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U4Imm, MCK_U4Imm }, }, |
2460 | | { 4954 /* vlef */, SystemZ::VLEF, Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U2Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12, MCK_U2Imm }, }, |
2461 | | { 4959 /* vleg */, SystemZ::VLEG, Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U1Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12, MCK_U1Imm }, }, |
2462 | | { 4964 /* vleh */, SystemZ::VLEH, Convert__VR1281_0__Tie0__BDXAddr64Disp123_1__U3Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12, MCK_U3Imm }, }, |
2463 | | { 4969 /* vleib */, SystemZ::VLEIB, Convert__VR1281_0__Tie0__S16Imm1_1__U4Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_S16Imm, MCK_U4Imm }, }, |
2464 | | { 4975 /* vleif */, SystemZ::VLEIF, Convert__VR1281_0__Tie0__S16Imm1_1__U2Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_S16Imm, MCK_U2Imm }, }, |
2465 | | { 4981 /* vleig */, SystemZ::VLEIG, Convert__VR1281_0__Tie0__S16Imm1_1__U1Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_S16Imm, MCK_U1Imm }, }, |
2466 | | { 4987 /* vleih */, SystemZ::VLEIH, Convert__VR1281_0__Tie0__S16Imm1_1__U3Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_S16Imm, MCK_U3Imm }, }, |
2467 | | { 4993 /* vlgvb */, SystemZ::VLGVB, Convert__GR641_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_GR64, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2468 | | { 4999 /* vlgvf */, SystemZ::VLGVF, Convert__GR641_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_GR64, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2469 | | { 5005 /* vlgvg */, SystemZ::VLGVG, Convert__GR641_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_GR64, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2470 | | { 5011 /* vlgvh */, SystemZ::VLGVH, Convert__GR641_0__VR1281_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_GR64, MCK_VR128, MCK_BDAddr32Disp12 }, }, |
2471 | | { 5017 /* vll */, SystemZ::VLL, Convert__VR1281_0__GR321_1__BDAddr64Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_GR32, MCK_BDAddr64Disp12 }, }, |
2472 | | { 5021 /* vllezb */, SystemZ::VLLEZB, Convert__VR1281_0__BDXAddr64Disp123_1, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12 }, }, |
2473 | | { 5028 /* vllezf */, SystemZ::VLLEZF, Convert__VR1281_0__BDXAddr64Disp123_1, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12 }, }, |
2474 | | { 5035 /* vllezg */, SystemZ::VLLEZG, Convert__VR1281_0__BDXAddr64Disp123_1, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12 }, }, |
2475 | | { 5042 /* vllezh */, SystemZ::VLLEZH, Convert__VR1281_0__BDXAddr64Disp123_1, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12 }, }, |
2476 | | { 5049 /* vlm */, SystemZ::VLM, Convert__VR1281_0__VR1281_1__BDAddr64Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr64Disp12 }, }, |
2477 | | { 5053 /* vlpb */, SystemZ::VLPB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2478 | | { 5058 /* vlpf */, SystemZ::VLPF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2479 | | { 5063 /* vlpg */, SystemZ::VLPG, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2480 | | { 5068 /* vlph */, SystemZ::VLPH, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2481 | | { 5073 /* vlr */, SystemZ::VLR, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2482 | | { 5077 /* vlrepb */, SystemZ::VLREPB, Convert__VR1281_0__BDXAddr64Disp123_1, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12 }, }, |
2483 | | { 5084 /* vlrepf */, SystemZ::VLREPF, Convert__VR1281_0__BDXAddr64Disp123_1, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12 }, }, |
2484 | | { 5091 /* vlrepg */, SystemZ::VLREPG, Convert__VR1281_0__BDXAddr64Disp123_1, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12 }, }, |
2485 | | { 5098 /* vlreph */, SystemZ::VLREPH, Convert__VR1281_0__BDXAddr64Disp123_1, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12 }, }, |
2486 | | { 5105 /* vlvgb */, SystemZ::VLVGB, Convert__VR1281_0__Tie0__GR321_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_GR32, MCK_BDAddr32Disp12 }, }, |
2487 | | { 5111 /* vlvgf */, SystemZ::VLVGF, Convert__VR1281_0__Tie0__GR321_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_GR32, MCK_BDAddr32Disp12 }, }, |
2488 | | { 5117 /* vlvgg */, SystemZ::VLVGG, Convert__VR1281_0__Tie0__GR641_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_GR64, MCK_BDAddr32Disp12 }, }, |
2489 | | { 5123 /* vlvgh */, SystemZ::VLVGH, Convert__VR1281_0__Tie0__GR321_1__BDAddr32Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_GR32, MCK_BDAddr32Disp12 }, }, |
2490 | | { 5129 /* vlvgp */, SystemZ::VLVGP, Convert__VR1281_0__GR641_1__GR641_2, Feature_FeatureVector, { MCK_VR128, MCK_GR64, MCK_GR64 }, }, |
2491 | | { 5135 /* vmaeb */, SystemZ::VMAEB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2492 | | { 5141 /* vmaef */, SystemZ::VMAEF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2493 | | { 5147 /* vmaeh */, SystemZ::VMAEH, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2494 | | { 5153 /* vmahb */, SystemZ::VMAHB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2495 | | { 5159 /* vmahf */, SystemZ::VMAHF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2496 | | { 5165 /* vmahh */, SystemZ::VMAHH, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2497 | | { 5171 /* vmalb */, SystemZ::VMALB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2498 | | { 5177 /* vmaleb */, SystemZ::VMALEB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2499 | | { 5184 /* vmalef */, SystemZ::VMALEF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2500 | | { 5191 /* vmaleh */, SystemZ::VMALEH, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2501 | | { 5198 /* vmalf */, SystemZ::VMALF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2502 | | { 5204 /* vmalhb */, SystemZ::VMALHB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2503 | | { 5211 /* vmalhf */, SystemZ::VMALHF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2504 | | { 5218 /* vmalhh */, SystemZ::VMALHH, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2505 | | { 5225 /* vmalhw */, SystemZ::VMALHW, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2506 | | { 5232 /* vmalob */, SystemZ::VMALOB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2507 | | { 5239 /* vmalof */, SystemZ::VMALOF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2508 | | { 5246 /* vmaloh */, SystemZ::VMALOH, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2509 | | { 5253 /* vmaob */, SystemZ::VMAOB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2510 | | { 5259 /* vmaof */, SystemZ::VMAOF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2511 | | { 5265 /* vmaoh */, SystemZ::VMAOH, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2512 | | { 5271 /* vmeb */, SystemZ::VMEB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2513 | | { 5276 /* vmef */, SystemZ::VMEF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2514 | | { 5281 /* vmeh */, SystemZ::VMEH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2515 | | { 5286 /* vmhb */, SystemZ::VMHB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2516 | | { 5291 /* vmhf */, SystemZ::VMHF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2517 | | { 5296 /* vmhh */, SystemZ::VMHH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2518 | | { 5301 /* vmlb */, SystemZ::VMLB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2519 | | { 5306 /* vmleb */, SystemZ::VMLEB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2520 | | { 5312 /* vmlef */, SystemZ::VMLEF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2521 | | { 5318 /* vmleh */, SystemZ::VMLEH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2522 | | { 5324 /* vmlf */, SystemZ::VMLF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2523 | | { 5329 /* vmlhb */, SystemZ::VMLHB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2524 | | { 5335 /* vmlhf */, SystemZ::VMLHF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2525 | | { 5341 /* vmlhh */, SystemZ::VMLHH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2526 | | { 5347 /* vmlhw */, SystemZ::VMLHW, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2527 | | { 5353 /* vmlob */, SystemZ::VMLOB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2528 | | { 5359 /* vmlof */, SystemZ::VMLOF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2529 | | { 5365 /* vmloh */, SystemZ::VMLOH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2530 | | { 5371 /* vmnb */, SystemZ::VMNB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2531 | | { 5376 /* vmnf */, SystemZ::VMNF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2532 | | { 5381 /* vmng */, SystemZ::VMNG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2533 | | { 5386 /* vmnh */, SystemZ::VMNH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2534 | | { 5391 /* vmnlb */, SystemZ::VMNLB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2535 | | { 5397 /* vmnlf */, SystemZ::VMNLF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2536 | | { 5403 /* vmnlg */, SystemZ::VMNLG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2537 | | { 5409 /* vmnlh */, SystemZ::VMNLH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2538 | | { 5415 /* vmob */, SystemZ::VMOB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2539 | | { 5420 /* vmof */, SystemZ::VMOF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2540 | | { 5425 /* vmoh */, SystemZ::VMOH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2541 | | { 5430 /* vmrhb */, SystemZ::VMRHB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2542 | | { 5436 /* vmrhf */, SystemZ::VMRHF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2543 | | { 5442 /* vmrhg */, SystemZ::VMRHG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2544 | | { 5448 /* vmrhh */, SystemZ::VMRHH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2545 | | { 5454 /* vmrlb */, SystemZ::VMRLB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2546 | | { 5460 /* vmrlf */, SystemZ::VMRLF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2547 | | { 5466 /* vmrlg */, SystemZ::VMRLG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2548 | | { 5472 /* vmrlh */, SystemZ::VMRLH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2549 | | { 5478 /* vmxb */, SystemZ::VMXB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2550 | | { 5483 /* vmxf */, SystemZ::VMXF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2551 | | { 5488 /* vmxg */, SystemZ::VMXG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2552 | | { 5493 /* vmxh */, SystemZ::VMXH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2553 | | { 5498 /* vmxlb */, SystemZ::VMXLB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2554 | | { 5504 /* vmxlf */, SystemZ::VMXLF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2555 | | { 5510 /* vmxlg */, SystemZ::VMXLG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2556 | | { 5516 /* vmxlh */, SystemZ::VMXLH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2557 | | { 5522 /* vn */, SystemZ::VN, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2558 | | { 5525 /* vnc */, SystemZ::VNC, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2559 | | { 5529 /* vno */, SystemZ::VNO, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2560 | | { 5533 /* vo */, SystemZ::VO, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2561 | | { 5536 /* vone */, SystemZ::VONE, Convert__VR1281_0, Feature_FeatureVector, { MCK_VR128 }, }, |
2562 | | { 5541 /* vpdi */, SystemZ::VPDI, Convert__VR1281_0__VR1281_1__VR1281_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2563 | | { 5546 /* vperm */, SystemZ::VPERM, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2564 | | { 5552 /* vpkf */, SystemZ::VPKF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2565 | | { 5557 /* vpkg */, SystemZ::VPKG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2566 | | { 5562 /* vpkh */, SystemZ::VPKH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2567 | | { 5567 /* vpklsf */, SystemZ::VPKLSF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2568 | | { 5574 /* vpklsfs */, SystemZ::VPKLSFS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2569 | | { 5582 /* vpklsg */, SystemZ::VPKLSG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2570 | | { 5589 /* vpklsgs */, SystemZ::VPKLSGS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2571 | | { 5597 /* vpklsh */, SystemZ::VPKLSH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2572 | | { 5604 /* vpklshs */, SystemZ::VPKLSHS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2573 | | { 5612 /* vpksf */, SystemZ::VPKSF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2574 | | { 5618 /* vpksfs */, SystemZ::VPKSFS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2575 | | { 5625 /* vpksg */, SystemZ::VPKSG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2576 | | { 5631 /* vpksgs */, SystemZ::VPKSGS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2577 | | { 5638 /* vpksh */, SystemZ::VPKSH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2578 | | { 5644 /* vpkshs */, SystemZ::VPKSHS, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2579 | | { 5651 /* vpopct */, SystemZ::VPOPCT, Convert__VR1281_0__VR1281_1__U4Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2580 | | { 5658 /* vrepb */, SystemZ::VREPB, Convert__VR1281_0__VR1281_1__U16Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U16Imm }, }, |
2581 | | { 5664 /* vrepf */, SystemZ::VREPF, Convert__VR1281_0__VR1281_1__U16Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U16Imm }, }, |
2582 | | { 5670 /* vrepg */, SystemZ::VREPG, Convert__VR1281_0__VR1281_1__U16Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U16Imm }, }, |
2583 | | { 5676 /* vreph */, SystemZ::VREPH, Convert__VR1281_0__VR1281_1__U16Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_U16Imm }, }, |
2584 | | { 5682 /* vrepib */, SystemZ::VREPIB, Convert__VR1281_0__S16Imm1_1, Feature_FeatureVector, { MCK_VR128, MCK_S16Imm }, }, |
2585 | | { 5689 /* vrepif */, SystemZ::VREPIF, Convert__VR1281_0__S16Imm1_1, Feature_FeatureVector, { MCK_VR128, MCK_S16Imm }, }, |
2586 | | { 5696 /* vrepig */, SystemZ::VREPIG, Convert__VR1281_0__S16Imm1_1, Feature_FeatureVector, { MCK_VR128, MCK_S16Imm }, }, |
2587 | | { 5703 /* vrepih */, SystemZ::VREPIH, Convert__VR1281_0__S16Imm1_1, Feature_FeatureVector, { MCK_VR128, MCK_S16Imm }, }, |
2588 | | { 5710 /* vsb */, SystemZ::VSB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2589 | | { 5714 /* vsbcbiq */, SystemZ::VSBCBIQ, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2590 | | { 5722 /* vsbiq */, SystemZ::VSBIQ, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2591 | | { 5728 /* vscbib */, SystemZ::VSCBIB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2592 | | { 5735 /* vscbif */, SystemZ::VSCBIF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2593 | | { 5742 /* vscbig */, SystemZ::VSCBIG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2594 | | { 5749 /* vscbih */, SystemZ::VSCBIH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2595 | | { 5756 /* vscbiq */, SystemZ::VSCBIQ, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2596 | | { 5763 /* vscef */, SystemZ::VSCEF, Convert__VR1281_0__BDVAddr64Disp123_1__U2Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDVAddr64Disp12, MCK_U2Imm }, }, |
2597 | | { 5769 /* vsceg */, SystemZ::VSCEG, Convert__VR1281_0__BDVAddr64Disp123_1__U1Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDVAddr64Disp12, MCK_U1Imm }, }, |
2598 | | { 5775 /* vsegb */, SystemZ::VSEGB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2599 | | { 5781 /* vsegf */, SystemZ::VSEGF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2600 | | { 5787 /* vsegh */, SystemZ::VSEGH, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2601 | | { 5793 /* vsel */, SystemZ::VSEL, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2602 | | { 5798 /* vsf */, SystemZ::VSF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2603 | | { 5802 /* vsg */, SystemZ::VSG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2604 | | { 5806 /* vsh */, SystemZ::VSH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2605 | | { 5810 /* vsl */, SystemZ::VSL, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2606 | | { 5814 /* vslb */, SystemZ::VSLB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2607 | | { 5819 /* vsldb */, SystemZ::VSLDB, Convert__VR1281_0__VR1281_1__VR1281_2__U8Imm1_3, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_U8Imm }, }, |
2608 | | { 5825 /* vsq */, SystemZ::VSQ, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2609 | | { 5829 /* vsra */, SystemZ::VSRA, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2610 | | { 5834 /* vsrab */, SystemZ::VSRAB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2611 | | { 5840 /* vsrl */, SystemZ::VSRL, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2612 | | { 5845 /* vsrlb */, SystemZ::VSRLB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2613 | | { 5851 /* vst */, SystemZ::VST, Convert__VR1281_0__BDXAddr64Disp123_1, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12 }, }, |
2614 | | { 5855 /* vsteb */, SystemZ::VSTEB, Convert__VR1281_0__BDXAddr64Disp123_1__U4Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12, MCK_U4Imm }, }, |
2615 | | { 5861 /* vstef */, SystemZ::VSTEF, Convert__VR1281_0__BDXAddr64Disp123_1__U2Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12, MCK_U2Imm }, }, |
2616 | | { 5867 /* vsteg */, SystemZ::VSTEG, Convert__VR1281_0__BDXAddr64Disp123_1__U1Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12, MCK_U1Imm }, }, |
2617 | | { 5873 /* vsteh */, SystemZ::VSTEH, Convert__VR1281_0__BDXAddr64Disp123_1__U3Imm1_2, Feature_FeatureVector, { MCK_VR128, MCK_BDXAddr64Disp12, MCK_U3Imm }, }, |
2618 | | { 5879 /* vstl */, SystemZ::VSTL, Convert__VR1281_0__GR321_1__BDAddr64Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_GR32, MCK_BDAddr64Disp12 }, }, |
2619 | | { 5884 /* vstm */, SystemZ::VSTM, Convert__VR1281_0__VR1281_1__BDAddr64Disp122_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_BDAddr64Disp12 }, }, |
2620 | | { 5889 /* vstrcb */, SystemZ::VSTRCB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2621 | | { 5889 /* vstrcb */, SystemZ::VSTRCB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2622 | | { 5896 /* vstrcbs */, SystemZ::VSTRCBS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2623 | | { 5896 /* vstrcbs */, SystemZ::VSTRCBS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2624 | | { 5904 /* vstrcf */, SystemZ::VSTRCF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2625 | | { 5904 /* vstrcf */, SystemZ::VSTRCF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2626 | | { 5911 /* vstrcfs */, SystemZ::VSTRCFS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2627 | | { 5911 /* vstrcfs */, SystemZ::VSTRCFS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2628 | | { 5919 /* vstrch */, SystemZ::VSTRCH, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2629 | | { 5919 /* vstrch */, SystemZ::VSTRCH, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2630 | | { 5926 /* vstrchs */, SystemZ::VSTRCHS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2631 | | { 5926 /* vstrchs */, SystemZ::VSTRCHS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2632 | | { 5934 /* vstrczb */, SystemZ::VSTRCZB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2633 | | { 5934 /* vstrczb */, SystemZ::VSTRCZB, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2634 | | { 5942 /* vstrczbs */, SystemZ::VSTRCZBS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2635 | | { 5942 /* vstrczbs */, SystemZ::VSTRCZBS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2636 | | { 5951 /* vstrczf */, SystemZ::VSTRCZF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2637 | | { 5951 /* vstrczf */, SystemZ::VSTRCZF, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2638 | | { 5959 /* vstrczfs */, SystemZ::VSTRCZFS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2639 | | { 5959 /* vstrczfs */, SystemZ::VSTRCZFS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2640 | | { 5968 /* vstrczh */, SystemZ::VSTRCZH, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2641 | | { 5968 /* vstrczh */, SystemZ::VSTRCZH, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2642 | | { 5976 /* vstrczhs */, SystemZ::VSTRCZHS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__imm_95_0, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2643 | | { 5976 /* vstrczhs */, SystemZ::VSTRCZHS, Convert__VR1281_0__VR1281_1__VR1281_2__VR1281_3__U4Imm1_4, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128, MCK_VR128, MCK_U4Imm }, }, |
2644 | | { 5985 /* vsumb */, SystemZ::VSUMB, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2645 | | { 5991 /* vsumgf */, SystemZ::VSUMGF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2646 | | { 5998 /* vsumgh */, SystemZ::VSUMGH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2647 | | { 6005 /* vsumh */, SystemZ::VSUMH, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2648 | | { 6011 /* vsumqf */, SystemZ::VSUMQF, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2649 | | { 6018 /* vsumqg */, SystemZ::VSUMQG, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2650 | | { 6025 /* vtm */, SystemZ::VTM, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2651 | | { 6029 /* vuphb */, SystemZ::VUPHB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2652 | | { 6035 /* vuphf */, SystemZ::VUPHF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2653 | | { 6041 /* vuphh */, SystemZ::VUPHH, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2654 | | { 6047 /* vuplb */, SystemZ::VUPLB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2655 | | { 6053 /* vuplf */, SystemZ::VUPLF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2656 | | { 6059 /* vuplhb */, SystemZ::VUPLHB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2657 | | { 6066 /* vuplhf */, SystemZ::VUPLHF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2658 | | { 6073 /* vuplhh */, SystemZ::VUPLHH, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2659 | | { 6080 /* vuplhw */, SystemZ::VUPLHW, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2660 | | { 6087 /* vupllb */, SystemZ::VUPLLB, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2661 | | { 6094 /* vupllf */, SystemZ::VUPLLF, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2662 | | { 6101 /* vupllh */, SystemZ::VUPLLH, Convert__VR1281_0__VR1281_1, Feature_FeatureVector, { MCK_VR128, MCK_VR128 }, }, |
2663 | | { 6108 /* vx */, SystemZ::VX, Convert__VR1281_0__VR1281_1__VR1281_2, Feature_FeatureVector, { MCK_VR128, MCK_VR128, MCK_VR128 }, }, |
2664 | | { 6111 /* vzero */, SystemZ::VZERO, Convert__VR1281_0, Feature_FeatureVector, { MCK_VR128 }, }, |
2665 | | { 6117 /* wcdgb */, SystemZ::WCDGB, Convert__VR641_0__VR641_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_U4Imm, MCK_U4Imm }, }, |
2666 | | { 6123 /* wcdlgb */, SystemZ::WCDLGB, Convert__VR641_0__VR641_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_U4Imm, MCK_U4Imm }, }, |
2667 | | { 6130 /* wcgdb */, SystemZ::WCGDB, Convert__VR641_0__VR641_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_U4Imm, MCK_U4Imm }, }, |
2668 | | { 6136 /* wclgdb */, SystemZ::WCLGDB, Convert__VR641_0__VR641_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_U4Imm, MCK_U4Imm }, }, |
2669 | | { 6143 /* wfadb */, SystemZ::WFADB, Convert__VR641_0__VR641_1__VR641_2, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2670 | | { 6149 /* wfcdb */, SystemZ::WFCDB, Convert__VR641_0__VR641_1, Feature_FeatureVector, { MCK_VR64, MCK_VR64 }, }, |
2671 | | { 6155 /* wfcedb */, SystemZ::WFCEDB, Convert__VR641_0__VR641_1__VR641_2, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2672 | | { 6162 /* wfcedbs */, SystemZ::WFCEDBS, Convert__VR641_0__VR641_1__VR641_2, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2673 | | { 6170 /* wfchdb */, SystemZ::WFCHDB, Convert__VR641_0__VR641_1__VR641_2, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2674 | | { 6177 /* wfchdbs */, SystemZ::WFCHDBS, Convert__VR641_0__VR641_1__VR641_2, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2675 | | { 6185 /* wfchedb */, SystemZ::WFCHEDB, Convert__VR641_0__VR641_1__VR641_2, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2676 | | { 6193 /* wfchedbs */, SystemZ::WFCHEDBS, Convert__VR641_0__VR641_1__VR641_2, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2677 | | { 6202 /* wfddb */, SystemZ::WFDDB, Convert__VR641_0__VR641_1__VR641_2, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2678 | | { 6208 /* wfidb */, SystemZ::WFIDB, Convert__VR641_0__VR641_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_U4Imm, MCK_U4Imm }, }, |
2679 | | { 6214 /* wfkdb */, SystemZ::WFKDB, Convert__VR641_0__VR641_1, Feature_FeatureVector, { MCK_VR64, MCK_VR64 }, }, |
2680 | | { 6220 /* wflcdb */, SystemZ::WFLCDB, Convert__VR641_0__VR641_1, Feature_FeatureVector, { MCK_VR64, MCK_VR64 }, }, |
2681 | | { 6227 /* wflndb */, SystemZ::WFLNDB, Convert__VR641_0__VR641_1, Feature_FeatureVector, { MCK_VR64, MCK_VR64 }, }, |
2682 | | { 6234 /* wflpdb */, SystemZ::WFLPDB, Convert__VR641_0__VR641_1, Feature_FeatureVector, { MCK_VR64, MCK_VR64 }, }, |
2683 | | { 6241 /* wfmadb */, SystemZ::WFMADB, Convert__VR641_0__VR641_1__VR641_2__VR641_3, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2684 | | { 6248 /* wfmdb */, SystemZ::WFMDB, Convert__VR641_0__VR641_1__VR641_2, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2685 | | { 6254 /* wfmsdb */, SystemZ::WFMSDB, Convert__VR641_0__VR641_1__VR641_2__VR641_3, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2686 | | { 6261 /* wfsdb */, SystemZ::WFSDB, Convert__VR641_0__VR641_1__VR641_2, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_VR64 }, }, |
2687 | | { 6267 /* wfsqdb */, SystemZ::WFSQDB, Convert__VR641_0__VR641_1, Feature_FeatureVector, { MCK_VR64, MCK_VR64 }, }, |
2688 | | { 6274 /* wftcidb */, SystemZ::WFTCIDB, Convert__VR641_0__VR641_1__U12Imm1_2, Feature_FeatureVector, { MCK_VR64, MCK_VR64, MCK_U12Imm }, }, |
2689 | | { 6282 /* wldeb */, SystemZ::WLDEB, Convert__VR641_0__VR321_1, Feature_FeatureVector, { MCK_VR64, MCK_VR32 }, }, |
2690 | | { 6288 /* wledb */, SystemZ::WLEDB, Convert__VR321_0__VR641_1__U4Imm1_2__U4Imm1_3, Feature_FeatureVector, { MCK_VR32, MCK_VR64, MCK_U4Imm, MCK_U4Imm }, }, |
2691 | | { 6294 /* x */, SystemZ::X, Convert__GR321_0__Tie0__BDXAddr64Disp123_1, 0, { MCK_GR32, MCK_BDXAddr64Disp12 }, }, |
2692 | | { 6296 /* xc */, SystemZ::XC, Convert__BDLAddr64Disp12Len83_0__BDAddr64Disp122_1, 0, { MCK_BDLAddr64Disp12Len8, MCK_BDAddr64Disp12 }, }, |
2693 | | { 6299 /* xg */, SystemZ::XG, Convert__GR641_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR64, MCK_BDXAddr64Disp20 }, }, |
2694 | | { 6302 /* xgr */, SystemZ::XGR, Convert__GR641_0__Tie0__GR641_1, 0, { MCK_GR64, MCK_GR64 }, }, |
2695 | | { 6306 /* xgrk */, SystemZ::XGRK, Convert__GR641_0__GR641_1__GR641_2, Feature_FeatureDistinctOps, { MCK_GR64, MCK_GR64, MCK_GR64 }, }, |
2696 | | { 6311 /* xi */, SystemZ::XI, Convert__BDAddr64Disp122_0__U8Imm1_1, 0, { MCK_BDAddr64Disp12, MCK_U8Imm }, }, |
2697 | | { 6314 /* xihf */, SystemZ::XIHF, Convert__GRH321_0__Tie0__U32Imm1_1, 0, { MCK_GRH32, MCK_U32Imm }, }, |
2698 | | { 6319 /* xilf */, SystemZ::XILF, Convert__GR321_0__Tie0__U32Imm1_1, 0, { MCK_GR32, MCK_U32Imm }, }, |
2699 | | { 6324 /* xiy */, SystemZ::XIY, Convert__BDAddr64Disp202_0__U8Imm1_1, 0, { MCK_BDAddr64Disp20, MCK_U8Imm }, }, |
2700 | | { 6328 /* xr */, SystemZ::XR, Convert__GR321_0__Tie0__GR321_1, 0, { MCK_GR32, MCK_GR32 }, }, |
2701 | | { 6331 /* xrk */, SystemZ::XRK, Convert__GR321_0__GR321_1__GR321_2, Feature_FeatureDistinctOps, { MCK_GR32, MCK_GR32, MCK_GR32 }, }, |
2702 | | { 6335 /* xy */, SystemZ::XY, Convert__GR321_0__Tie0__BDXAddr64Disp203_1, 0, { MCK_GR32, MCK_BDXAddr64Disp20 }, }, |
2703 | | }; |
2704 | | |
2705 | | unsigned SystemZAsmParser:: |
2706 | | MatchInstructionImpl(const OperandVector &Operands, |
2707 | | MCInst &Inst, uint64_t &ErrorInfo, |
2708 | 6 | bool matchingInlineAsm, unsigned VariantID) { |
2709 | | // Eliminate obvious mismatches. |
2710 | 6 | if (Operands.size() > 6) { |
2711 | 0 | ErrorInfo = 6; |
2712 | 0 | return Match_InvalidOperand; |
2713 | 0 | } |
2714 | | |
2715 | | // Get the current feature set. |
2716 | 6 | uint64_t AvailableFeatures = getAvailableFeatures(); |
2717 | | |
2718 | | // Get the instruction mnemonic, which is the first token. |
2719 | 6 | StringRef Mnemonic = ((SystemZOperand&)*Operands[0]).getToken(); |
2720 | | |
2721 | | // Some state to try to produce better error messages. |
2722 | 6 | bool HadMatchOtherThanFeatures = false; |
2723 | 6 | bool HadMatchOtherThanPredicate = false; |
2724 | 6 | unsigned RetCode = Match_InvalidOperand; |
2725 | 6 | uint64_t MissingFeatures = ~0ULL; |
2726 | | // Set ErrorInfo to the operand that mismatches if it is |
2727 | | // wrong for all instances of the instruction. |
2728 | 6 | ErrorInfo = ~0ULL; |
2729 | | // Find the appropriate table for this asm variant. |
2730 | 6 | const MatchEntry *Start, *End; |
2731 | 6 | switch (VariantID) { |
2732 | 0 | default: llvm_unreachable("invalid variant!"); |
2733 | 6 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
2734 | 6 | } |
2735 | | // Search the table. |
2736 | 6 | auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode()); |
2737 | | |
2738 | | // Return a more specific error code if no mnemonics match. |
2739 | 6 | if (MnemonicRange.first == MnemonicRange.second) |
2740 | 6 | return Match_MnemonicFail; |
2741 | | |
2742 | 0 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
2743 | 0 | it != ie; ++it) { |
2744 | | // equal_range guarantees that instruction mnemonic matches. |
2745 | 0 | assert(Mnemonic == it->getMnemonic()); |
2746 | 0 | bool OperandsValid = true; |
2747 | 0 | for (unsigned i = 0; i != 5; ++i) { |
2748 | 0 | auto Formal = static_cast<MatchClassKind>(it->Classes[i]); |
2749 | 0 | if (i+1 >= Operands.size()) { |
2750 | 0 | OperandsValid = (Formal == InvalidMatchClass); |
2751 | 0 | if (!OperandsValid) ErrorInfo = i+1; |
2752 | 0 | break; |
2753 | 0 | } |
2754 | 0 | MCParsedAsmOperand &Actual = *Operands[i+1]; |
2755 | 0 | unsigned Diag = validateOperandClass(Actual, Formal); |
2756 | 0 | if (Diag == Match_Success) |
2757 | 0 | continue; |
2758 | | // If the generic handler indicates an invalid operand |
2759 | | // failure, check for a special case. |
2760 | 0 | if (Diag == Match_InvalidOperand) { |
2761 | 0 | Diag = validateTargetOperandClass(Actual, Formal); |
2762 | 0 | if (Diag == Match_Success) |
2763 | 0 | continue; |
2764 | 0 | } |
2765 | | // If this operand is broken for all of the instances of this |
2766 | | // mnemonic, keep track of it so we can report loc info. |
2767 | | // If we already had a match that only failed due to a |
2768 | | // target predicate, that diagnostic is preferred. |
2769 | 0 | if (!HadMatchOtherThanPredicate && |
2770 | 0 | (it == MnemonicRange.first || ErrorInfo <= i+1)) { |
2771 | 0 | ErrorInfo = i+1; |
2772 | | // InvalidOperand is the default. Prefer specificity. |
2773 | 0 | if (Diag != Match_InvalidOperand) |
2774 | 0 | RetCode = Diag; |
2775 | 0 | } |
2776 | | // Otherwise, just reject this instance of the mnemonic. |
2777 | 0 | OperandsValid = false; |
2778 | 0 | break; |
2779 | 0 | } |
2780 | |
|
2781 | 0 | if (!OperandsValid) continue; |
2782 | 0 | if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) { |
2783 | 0 | HadMatchOtherThanFeatures = true; |
2784 | 0 | uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures; |
2785 | 0 | if (countPopulation(NewMissingFeatures) <= |
2786 | 0 | countPopulation(MissingFeatures)) |
2787 | 0 | MissingFeatures = NewMissingFeatures; |
2788 | 0 | continue; |
2789 | 0 | } |
2790 | | |
2791 | 0 | Inst.clear(); |
2792 | |
|
2793 | 0 | if (matchingInlineAsm) { |
2794 | 0 | Inst.setOpcode(it->Opcode); |
2795 | 0 | convertToMapAndConstraints(it->ConvertFn, Operands); |
2796 | 0 | return Match_Success; |
2797 | 0 | } |
2798 | | |
2799 | | // We have selected a definite instruction, convert the parsed |
2800 | | // operands into the appropriate MCInst. |
2801 | 0 | convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); |
2802 | | |
2803 | | // We have a potential match. Check the target predicate to |
2804 | | // handle any context sensitive constraints. |
2805 | 0 | unsigned MatchResult; |
2806 | 0 | if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { |
2807 | 0 | Inst.clear(); |
2808 | 0 | RetCode = MatchResult; |
2809 | 0 | HadMatchOtherThanPredicate = true; |
2810 | 0 | continue; |
2811 | 0 | } |
2812 | | |
2813 | 0 | return Match_Success; |
2814 | 0 | } |
2815 | | |
2816 | | // Okay, we had no match. Try to return a useful error code. |
2817 | 0 | if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) |
2818 | 0 | return RetCode; |
2819 | | |
2820 | | // Missing feature matches return which features were missing |
2821 | 0 | ErrorInfo = MissingFeatures; |
2822 | 0 | return Match_MissingFeature; |
2823 | 0 | } |
2824 | | |
2825 | | namespace { |
2826 | | struct OperandMatchEntry { |
2827 | | uint16_t RequiredFeatures; |
2828 | | uint16_t Mnemonic; |
2829 | | uint8_t Class; |
2830 | | uint8_t OperandMask; |
2831 | | |
2832 | 15.5k | StringRef getMnemonic() const { |
2833 | 15.5k | return StringRef(MnemonicTable + Mnemonic + 1, |
2834 | 15.5k | MnemonicTable[Mnemonic]); |
2835 | 15.5k | } |
2836 | | }; |
2837 | | |
2838 | | // Predicate for searching for an opcode. |
2839 | | struct LessOpcodeOperand { |
2840 | 13.3k | bool operator()(const OperandMatchEntry &LHS, StringRef RHS) { |
2841 | 13.3k | return LHS.getMnemonic() < RHS; |
2842 | 13.3k | } |
2843 | 1.99k | bool operator()(StringRef LHS, const OperandMatchEntry &RHS) { |
2844 | 1.99k | return LHS < RHS.getMnemonic(); |
2845 | 1.99k | } |
2846 | 0 | bool operator()(const OperandMatchEntry &LHS, const OperandMatchEntry &RHS) { |
2847 | 0 | return LHS.getMnemonic() < RHS.getMnemonic(); |
2848 | 0 | } |
2849 | | }; |
2850 | | } // end anonymous namespace. |
2851 | | |
2852 | | static const OperandMatchEntry OperandMatchTable[1596] = { |
2853 | | /* Operand List Mask, Mnemonic, Operand Class, Features */ |
2854 | | { 0, 0 /* a */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
2855 | | { 0, 0 /* a */, MCK_GR32, 1 /* 0 */ }, |
2856 | | { 0, 2 /* adb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
2857 | | { 0, 2 /* adb */, MCK_FP64, 1 /* 0 */ }, |
2858 | | { 0, 6 /* adbr */, MCK_FP64, 3 /* 0, 1 */ }, |
2859 | | { 0, 11 /* aeb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
2860 | | { 0, 11 /* aeb */, MCK_FP32, 1 /* 0 */ }, |
2861 | | { 0, 15 /* aebr */, MCK_FP32, 3 /* 0, 1 */ }, |
2862 | | { 0, 20 /* afi */, MCK_GR32, 1 /* 0 */ }, |
2863 | | { 0, 24 /* ag */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2864 | | { 0, 24 /* ag */, MCK_GR64, 1 /* 0 */ }, |
2865 | | { 0, 27 /* agf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2866 | | { 0, 27 /* agf */, MCK_GR64, 1 /* 0 */ }, |
2867 | | { 0, 31 /* agfi */, MCK_GR64, 1 /* 0 */ }, |
2868 | | { 0, 36 /* agfr */, MCK_GR32, 2 /* 1 */ }, |
2869 | | { 0, 36 /* agfr */, MCK_GR64, 1 /* 0 */ }, |
2870 | | { 0, 41 /* aghi */, MCK_GR64, 1 /* 0 */ }, |
2871 | | { Feature_FeatureDistinctOps, 46 /* aghik */, MCK_GR64, 3 /* 0, 1 */ }, |
2872 | | { 0, 52 /* agr */, MCK_GR64, 3 /* 0, 1 */ }, |
2873 | | { Feature_FeatureDistinctOps, 56 /* agrk */, MCK_GR64, 7 /* 0, 1, 2 */ }, |
2874 | | { 0, 61 /* agsi */, MCK_BDAddr64Disp20, 1 /* 0 */ }, |
2875 | | { 0, 66 /* ah */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
2876 | | { 0, 66 /* ah */, MCK_GR32, 1 /* 0 */ }, |
2877 | | { 0, 69 /* ahi */, MCK_GR32, 1 /* 0 */ }, |
2878 | | { Feature_FeatureDistinctOps, 73 /* ahik */, MCK_GR32, 3 /* 0, 1 */ }, |
2879 | | { 0, 78 /* ahy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2880 | | { 0, 78 /* ahy */, MCK_GR32, 1 /* 0 */ }, |
2881 | | { Feature_FeatureHighWord, 82 /* aih */, MCK_GRH32, 1 /* 0 */ }, |
2882 | | { 0, 86 /* al */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
2883 | | { 0, 86 /* al */, MCK_GR32, 1 /* 0 */ }, |
2884 | | { 0, 89 /* alc */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2885 | | { 0, 89 /* alc */, MCK_GR32, 1 /* 0 */ }, |
2886 | | { 0, 93 /* alcg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2887 | | { 0, 93 /* alcg */, MCK_GR64, 1 /* 0 */ }, |
2888 | | { 0, 98 /* alcgr */, MCK_GR64, 3 /* 0, 1 */ }, |
2889 | | { 0, 104 /* alcr */, MCK_GR32, 3 /* 0, 1 */ }, |
2890 | | { 0, 109 /* alfi */, MCK_GR32, 1 /* 0 */ }, |
2891 | | { 0, 114 /* alg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2892 | | { 0, 114 /* alg */, MCK_GR64, 1 /* 0 */ }, |
2893 | | { 0, 118 /* algf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2894 | | { 0, 118 /* algf */, MCK_GR64, 1 /* 0 */ }, |
2895 | | { 0, 123 /* algfi */, MCK_GR64, 1 /* 0 */ }, |
2896 | | { 0, 129 /* algfr */, MCK_GR32, 2 /* 1 */ }, |
2897 | | { 0, 129 /* algfr */, MCK_GR64, 1 /* 0 */ }, |
2898 | | { Feature_FeatureDistinctOps, 135 /* alghsik */, MCK_GR64, 3 /* 0, 1 */ }, |
2899 | | { 0, 143 /* algr */, MCK_GR64, 3 /* 0, 1 */ }, |
2900 | | { Feature_FeatureDistinctOps, 148 /* algrk */, MCK_GR64, 7 /* 0, 1, 2 */ }, |
2901 | | { Feature_FeatureDistinctOps, 154 /* alhsik */, MCK_GR32, 3 /* 0, 1 */ }, |
2902 | | { 0, 161 /* alr */, MCK_GR32, 3 /* 0, 1 */ }, |
2903 | | { Feature_FeatureDistinctOps, 165 /* alrk */, MCK_GR32, 7 /* 0, 1, 2 */ }, |
2904 | | { 0, 170 /* aly */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2905 | | { 0, 170 /* aly */, MCK_GR32, 1 /* 0 */ }, |
2906 | | { 0, 174 /* ar */, MCK_GR32, 3 /* 0, 1 */ }, |
2907 | | { Feature_FeatureDistinctOps, 177 /* ark */, MCK_GR32, 7 /* 0, 1, 2 */ }, |
2908 | | { 0, 181 /* asi */, MCK_BDAddr64Disp20, 1 /* 0 */ }, |
2909 | | { 0, 185 /* axbr */, MCK_FP128, 3 /* 0, 1 */ }, |
2910 | | { 0, 190 /* ay */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2911 | | { 0, 190 /* ay */, MCK_GR32, 1 /* 0 */ }, |
2912 | | { 0, 193 /* basr */, MCK_ADDR64, 2 /* 1 */ }, |
2913 | | { 0, 193 /* basr */, MCK_GR64, 1 /* 0 */ }, |
2914 | | { 0, 198 /* bcr */, MCK_GR64, 2 /* 1 */ }, |
2915 | | { 0, 202 /* ber */, MCK_ADDR64, 1 /* 0 */ }, |
2916 | | { 0, 206 /* bher */, MCK_ADDR64, 1 /* 0 */ }, |
2917 | | { 0, 211 /* bhr */, MCK_ADDR64, 1 /* 0 */ }, |
2918 | | { 0, 215 /* bler */, MCK_ADDR64, 1 /* 0 */ }, |
2919 | | { 0, 220 /* blhr */, MCK_ADDR64, 1 /* 0 */ }, |
2920 | | { 0, 225 /* blr */, MCK_ADDR64, 1 /* 0 */ }, |
2921 | | { 0, 229 /* bner */, MCK_ADDR64, 1 /* 0 */ }, |
2922 | | { 0, 234 /* bnher */, MCK_ADDR64, 1 /* 0 */ }, |
2923 | | { 0, 240 /* bnhr */, MCK_ADDR64, 1 /* 0 */ }, |
2924 | | { 0, 245 /* bnler */, MCK_ADDR64, 1 /* 0 */ }, |
2925 | | { 0, 251 /* bnlhr */, MCK_ADDR64, 1 /* 0 */ }, |
2926 | | { 0, 257 /* bnlr */, MCK_ADDR64, 1 /* 0 */ }, |
2927 | | { 0, 262 /* bnor */, MCK_ADDR64, 1 /* 0 */ }, |
2928 | | { 0, 267 /* bor */, MCK_ADDR64, 1 /* 0 */ }, |
2929 | | { 0, 271 /* br */, MCK_ADDR64, 1 /* 0 */ }, |
2930 | | { 0, 274 /* bras */, MCK_GR64, 1 /* 0 */ }, |
2931 | | { 0, 274 /* bras */, MCK_PCRelTLS16, 2 /* 1 */ }, |
2932 | | { 0, 279 /* brasl */, MCK_GR64, 1 /* 0 */ }, |
2933 | | { 0, 279 /* brasl */, MCK_PCRelTLS32, 2 /* 1 */ }, |
2934 | | { 0, 285 /* brc */, MCK_PCRel16, 2 /* 1 */ }, |
2935 | | { 0, 289 /* brcl */, MCK_PCRel32, 2 /* 1 */ }, |
2936 | | { 0, 294 /* brct */, MCK_GR32, 1 /* 0 */ }, |
2937 | | { 0, 294 /* brct */, MCK_PCRel16, 2 /* 1 */ }, |
2938 | | { 0, 299 /* brctg */, MCK_GR64, 1 /* 0 */ }, |
2939 | | { 0, 299 /* brctg */, MCK_PCRel16, 2 /* 1 */ }, |
2940 | | { 0, 305 /* c */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
2941 | | { 0, 305 /* c */, MCK_GR32, 1 /* 0 */ }, |
2942 | | { 0, 307 /* cdb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
2943 | | { 0, 307 /* cdb */, MCK_FP64, 1 /* 0 */ }, |
2944 | | { 0, 311 /* cdbr */, MCK_FP64, 3 /* 0, 1 */ }, |
2945 | | { 0, 316 /* cdfbr */, MCK_FP64, 1 /* 0 */ }, |
2946 | | { 0, 316 /* cdfbr */, MCK_GR32, 2 /* 1 */ }, |
2947 | | { 0, 322 /* cdgbr */, MCK_FP64, 1 /* 0 */ }, |
2948 | | { 0, 322 /* cdgbr */, MCK_GR64, 2 /* 1 */ }, |
2949 | | { Feature_FeatureFPExtension, 328 /* cdlfbr */, MCK_FP64, 1 /* 0 */ }, |
2950 | | { Feature_FeatureFPExtension, 328 /* cdlfbr */, MCK_GR32, 4 /* 2 */ }, |
2951 | | { Feature_FeatureFPExtension, 335 /* cdlgbr */, MCK_FP64, 1 /* 0 */ }, |
2952 | | { Feature_FeatureFPExtension, 335 /* cdlgbr */, MCK_GR64, 4 /* 2 */ }, |
2953 | | { 0, 342 /* ceb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
2954 | | { 0, 342 /* ceb */, MCK_FP32, 1 /* 0 */ }, |
2955 | | { 0, 346 /* cebr */, MCK_FP32, 3 /* 0, 1 */ }, |
2956 | | { 0, 351 /* cefbr */, MCK_FP32, 1 /* 0 */ }, |
2957 | | { 0, 351 /* cefbr */, MCK_GR32, 2 /* 1 */ }, |
2958 | | { 0, 357 /* cegbr */, MCK_FP32, 1 /* 0 */ }, |
2959 | | { 0, 357 /* cegbr */, MCK_GR64, 2 /* 1 */ }, |
2960 | | { Feature_FeatureFPExtension, 363 /* celfbr */, MCK_FP32, 1 /* 0 */ }, |
2961 | | { Feature_FeatureFPExtension, 363 /* celfbr */, MCK_GR32, 4 /* 2 */ }, |
2962 | | { Feature_FeatureFPExtension, 370 /* celgbr */, MCK_FP32, 1 /* 0 */ }, |
2963 | | { Feature_FeatureFPExtension, 370 /* celgbr */, MCK_GR64, 4 /* 2 */ }, |
2964 | | { 0, 377 /* cfdbr */, MCK_FP64, 4 /* 2 */ }, |
2965 | | { 0, 377 /* cfdbr */, MCK_GR32, 1 /* 0 */ }, |
2966 | | { 0, 383 /* cfebr */, MCK_FP32, 4 /* 2 */ }, |
2967 | | { 0, 383 /* cfebr */, MCK_GR32, 1 /* 0 */ }, |
2968 | | { 0, 389 /* cfi */, MCK_GR32, 1 /* 0 */ }, |
2969 | | { 0, 393 /* cfxbr */, MCK_FP128, 4 /* 2 */ }, |
2970 | | { 0, 393 /* cfxbr */, MCK_GR32, 1 /* 0 */ }, |
2971 | | { 0, 399 /* cg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2972 | | { 0, 399 /* cg */, MCK_GR64, 1 /* 0 */ }, |
2973 | | { 0, 402 /* cgdbr */, MCK_FP64, 4 /* 2 */ }, |
2974 | | { 0, 402 /* cgdbr */, MCK_GR64, 1 /* 0 */ }, |
2975 | | { 0, 408 /* cgebr */, MCK_FP32, 4 /* 2 */ }, |
2976 | | { 0, 408 /* cgebr */, MCK_GR64, 1 /* 0 */ }, |
2977 | | { 0, 414 /* cgf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2978 | | { 0, 414 /* cgf */, MCK_GR64, 1 /* 0 */ }, |
2979 | | { 0, 418 /* cgfi */, MCK_GR64, 1 /* 0 */ }, |
2980 | | { 0, 423 /* cgfr */, MCK_GR32, 2 /* 1 */ }, |
2981 | | { 0, 423 /* cgfr */, MCK_GR64, 1 /* 0 */ }, |
2982 | | { 0, 428 /* cgfrl */, MCK_GR64, 1 /* 0 */ }, |
2983 | | { 0, 428 /* cgfrl */, MCK_PCRel32, 2 /* 1 */ }, |
2984 | | { 0, 434 /* cgh */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
2985 | | { 0, 434 /* cgh */, MCK_GR64, 1 /* 0 */ }, |
2986 | | { 0, 438 /* cghi */, MCK_GR64, 1 /* 0 */ }, |
2987 | | { 0, 443 /* cghrl */, MCK_GR64, 1 /* 0 */ }, |
2988 | | { 0, 443 /* cghrl */, MCK_PCRel32, 2 /* 1 */ }, |
2989 | | { 0, 449 /* cghsi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
2990 | | { 0, 455 /* cgij */, MCK_GR64, 1 /* 0 */ }, |
2991 | | { 0, 455 /* cgij */, MCK_PCRel16, 8 /* 3 */ }, |
2992 | | { 0, 460 /* cgije */, MCK_GR64, 1 /* 0 */ }, |
2993 | | { 0, 460 /* cgije */, MCK_PCRel16, 4 /* 2 */ }, |
2994 | | { 0, 466 /* cgijh */, MCK_GR64, 1 /* 0 */ }, |
2995 | | { 0, 466 /* cgijh */, MCK_PCRel16, 4 /* 2 */ }, |
2996 | | { 0, 472 /* cgijhe */, MCK_GR64, 1 /* 0 */ }, |
2997 | | { 0, 472 /* cgijhe */, MCK_PCRel16, 4 /* 2 */ }, |
2998 | | { 0, 479 /* cgijl */, MCK_GR64, 1 /* 0 */ }, |
2999 | | { 0, 479 /* cgijl */, MCK_PCRel16, 4 /* 2 */ }, |
3000 | | { 0, 485 /* cgijle */, MCK_GR64, 1 /* 0 */ }, |
3001 | | { 0, 485 /* cgijle */, MCK_PCRel16, 4 /* 2 */ }, |
3002 | | { 0, 492 /* cgijlh */, MCK_GR64, 1 /* 0 */ }, |
3003 | | { 0, 492 /* cgijlh */, MCK_PCRel16, 4 /* 2 */ }, |
3004 | | { 0, 499 /* cgijne */, MCK_GR64, 1 /* 0 */ }, |
3005 | | { 0, 499 /* cgijne */, MCK_PCRel16, 4 /* 2 */ }, |
3006 | | { 0, 506 /* cgijnh */, MCK_GR64, 1 /* 0 */ }, |
3007 | | { 0, 506 /* cgijnh */, MCK_PCRel16, 4 /* 2 */ }, |
3008 | | { 0, 513 /* cgijnhe */, MCK_GR64, 1 /* 0 */ }, |
3009 | | { 0, 513 /* cgijnhe */, MCK_PCRel16, 4 /* 2 */ }, |
3010 | | { 0, 521 /* cgijnl */, MCK_GR64, 1 /* 0 */ }, |
3011 | | { 0, 521 /* cgijnl */, MCK_PCRel16, 4 /* 2 */ }, |
3012 | | { 0, 528 /* cgijnle */, MCK_GR64, 1 /* 0 */ }, |
3013 | | { 0, 528 /* cgijnle */, MCK_PCRel16, 4 /* 2 */ }, |
3014 | | { 0, 536 /* cgijnlh */, MCK_GR64, 1 /* 0 */ }, |
3015 | | { 0, 536 /* cgijnlh */, MCK_PCRel16, 4 /* 2 */ }, |
3016 | | { 0, 544 /* cgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3017 | | { 0, 548 /* cgrj */, MCK_GR64, 3 /* 0, 1 */ }, |
3018 | | { 0, 548 /* cgrj */, MCK_PCRel16, 8 /* 3 */ }, |
3019 | | { 0, 553 /* cgrje */, MCK_GR64, 3 /* 0, 1 */ }, |
3020 | | { 0, 553 /* cgrje */, MCK_PCRel16, 4 /* 2 */ }, |
3021 | | { 0, 559 /* cgrjh */, MCK_GR64, 3 /* 0, 1 */ }, |
3022 | | { 0, 559 /* cgrjh */, MCK_PCRel16, 4 /* 2 */ }, |
3023 | | { 0, 565 /* cgrjhe */, MCK_GR64, 3 /* 0, 1 */ }, |
3024 | | { 0, 565 /* cgrjhe */, MCK_PCRel16, 4 /* 2 */ }, |
3025 | | { 0, 572 /* cgrjl */, MCK_GR64, 3 /* 0, 1 */ }, |
3026 | | { 0, 572 /* cgrjl */, MCK_PCRel16, 4 /* 2 */ }, |
3027 | | { 0, 578 /* cgrjle */, MCK_GR64, 3 /* 0, 1 */ }, |
3028 | | { 0, 578 /* cgrjle */, MCK_PCRel16, 4 /* 2 */ }, |
3029 | | { 0, 585 /* cgrjlh */, MCK_GR64, 3 /* 0, 1 */ }, |
3030 | | { 0, 585 /* cgrjlh */, MCK_PCRel16, 4 /* 2 */ }, |
3031 | | { 0, 592 /* cgrjne */, MCK_GR64, 3 /* 0, 1 */ }, |
3032 | | { 0, 592 /* cgrjne */, MCK_PCRel16, 4 /* 2 */ }, |
3033 | | { 0, 599 /* cgrjnh */, MCK_GR64, 3 /* 0, 1 */ }, |
3034 | | { 0, 599 /* cgrjnh */, MCK_PCRel16, 4 /* 2 */ }, |
3035 | | { 0, 606 /* cgrjnhe */, MCK_GR64, 3 /* 0, 1 */ }, |
3036 | | { 0, 606 /* cgrjnhe */, MCK_PCRel16, 4 /* 2 */ }, |
3037 | | { 0, 614 /* cgrjnl */, MCK_GR64, 3 /* 0, 1 */ }, |
3038 | | { 0, 614 /* cgrjnl */, MCK_PCRel16, 4 /* 2 */ }, |
3039 | | { 0, 621 /* cgrjnle */, MCK_GR64, 3 /* 0, 1 */ }, |
3040 | | { 0, 621 /* cgrjnle */, MCK_PCRel16, 4 /* 2 */ }, |
3041 | | { 0, 629 /* cgrjnlh */, MCK_GR64, 3 /* 0, 1 */ }, |
3042 | | { 0, 629 /* cgrjnlh */, MCK_PCRel16, 4 /* 2 */ }, |
3043 | | { 0, 637 /* cgrl */, MCK_GR64, 1 /* 0 */ }, |
3044 | | { 0, 637 /* cgrl */, MCK_PCRel32, 2 /* 1 */ }, |
3045 | | { 0, 642 /* cgxbr */, MCK_FP128, 4 /* 2 */ }, |
3046 | | { 0, 642 /* cgxbr */, MCK_GR64, 1 /* 0 */ }, |
3047 | | { 0, 648 /* ch */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3048 | | { 0, 648 /* ch */, MCK_GR32, 1 /* 0 */ }, |
3049 | | { Feature_FeatureHighWord, 651 /* chf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3050 | | { Feature_FeatureHighWord, 651 /* chf */, MCK_GRH32, 1 /* 0 */ }, |
3051 | | { 0, 655 /* chhsi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3052 | | { 0, 661 /* chi */, MCK_GR32, 1 /* 0 */ }, |
3053 | | { 0, 665 /* chrl */, MCK_GR32, 1 /* 0 */ }, |
3054 | | { 0, 665 /* chrl */, MCK_PCRel32, 2 /* 1 */ }, |
3055 | | { 0, 670 /* chsi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3056 | | { 0, 675 /* chy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3057 | | { 0, 675 /* chy */, MCK_GR32, 1 /* 0 */ }, |
3058 | | { Feature_FeatureHighWord, 679 /* cih */, MCK_GRH32, 1 /* 0 */ }, |
3059 | | { 0, 683 /* cij */, MCK_GR32, 1 /* 0 */ }, |
3060 | | { 0, 683 /* cij */, MCK_PCRel16, 8 /* 3 */ }, |
3061 | | { 0, 687 /* cije */, MCK_GR32, 1 /* 0 */ }, |
3062 | | { 0, 687 /* cije */, MCK_PCRel16, 4 /* 2 */ }, |
3063 | | { 0, 692 /* cijh */, MCK_GR32, 1 /* 0 */ }, |
3064 | | { 0, 692 /* cijh */, MCK_PCRel16, 4 /* 2 */ }, |
3065 | | { 0, 697 /* cijhe */, MCK_GR32, 1 /* 0 */ }, |
3066 | | { 0, 697 /* cijhe */, MCK_PCRel16, 4 /* 2 */ }, |
3067 | | { 0, 703 /* cijl */, MCK_GR32, 1 /* 0 */ }, |
3068 | | { 0, 703 /* cijl */, MCK_PCRel16, 4 /* 2 */ }, |
3069 | | { 0, 708 /* cijle */, MCK_GR32, 1 /* 0 */ }, |
3070 | | { 0, 708 /* cijle */, MCK_PCRel16, 4 /* 2 */ }, |
3071 | | { 0, 714 /* cijlh */, MCK_GR32, 1 /* 0 */ }, |
3072 | | { 0, 714 /* cijlh */, MCK_PCRel16, 4 /* 2 */ }, |
3073 | | { 0, 720 /* cijne */, MCK_GR32, 1 /* 0 */ }, |
3074 | | { 0, 720 /* cijne */, MCK_PCRel16, 4 /* 2 */ }, |
3075 | | { 0, 726 /* cijnh */, MCK_GR32, 1 /* 0 */ }, |
3076 | | { 0, 726 /* cijnh */, MCK_PCRel16, 4 /* 2 */ }, |
3077 | | { 0, 732 /* cijnhe */, MCK_GR32, 1 /* 0 */ }, |
3078 | | { 0, 732 /* cijnhe */, MCK_PCRel16, 4 /* 2 */ }, |
3079 | | { 0, 739 /* cijnl */, MCK_GR32, 1 /* 0 */ }, |
3080 | | { 0, 739 /* cijnl */, MCK_PCRel16, 4 /* 2 */ }, |
3081 | | { 0, 745 /* cijnle */, MCK_GR32, 1 /* 0 */ }, |
3082 | | { 0, 745 /* cijnle */, MCK_PCRel16, 4 /* 2 */ }, |
3083 | | { 0, 752 /* cijnlh */, MCK_GR32, 1 /* 0 */ }, |
3084 | | { 0, 752 /* cijnlh */, MCK_PCRel16, 4 /* 2 */ }, |
3085 | | { 0, 759 /* cl */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3086 | | { 0, 759 /* cl */, MCK_GR32, 1 /* 0 */ }, |
3087 | | { 0, 762 /* clc */, MCK_BDAddr64Disp12, 2 /* 1 */ }, |
3088 | | { 0, 762 /* clc */, MCK_BDLAddr64Disp12Len8, 1 /* 0 */ }, |
3089 | | { Feature_FeatureFPExtension, 766 /* clfdbr */, MCK_FP64, 4 /* 2 */ }, |
3090 | | { Feature_FeatureFPExtension, 766 /* clfdbr */, MCK_GR32, 1 /* 0 */ }, |
3091 | | { Feature_FeatureFPExtension, 773 /* clfebr */, MCK_FP32, 4 /* 2 */ }, |
3092 | | { Feature_FeatureFPExtension, 773 /* clfebr */, MCK_GR32, 1 /* 0 */ }, |
3093 | | { 0, 780 /* clfhsi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3094 | | { 0, 787 /* clfi */, MCK_GR32, 1 /* 0 */ }, |
3095 | | { Feature_FeatureFPExtension, 792 /* clfxbr */, MCK_FP128, 4 /* 2 */ }, |
3096 | | { Feature_FeatureFPExtension, 792 /* clfxbr */, MCK_GR32, 1 /* 0 */ }, |
3097 | | { 0, 799 /* clg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3098 | | { 0, 799 /* clg */, MCK_GR64, 1 /* 0 */ }, |
3099 | | { Feature_FeatureFPExtension, 803 /* clgdbr */, MCK_FP64, 4 /* 2 */ }, |
3100 | | { Feature_FeatureFPExtension, 803 /* clgdbr */, MCK_GR64, 1 /* 0 */ }, |
3101 | | { Feature_FeatureFPExtension, 810 /* clgebr */, MCK_FP32, 4 /* 2 */ }, |
3102 | | { Feature_FeatureFPExtension, 810 /* clgebr */, MCK_GR64, 1 /* 0 */ }, |
3103 | | { 0, 817 /* clgf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3104 | | { 0, 817 /* clgf */, MCK_GR64, 1 /* 0 */ }, |
3105 | | { 0, 822 /* clgfi */, MCK_GR64, 1 /* 0 */ }, |
3106 | | { 0, 828 /* clgfr */, MCK_GR32, 2 /* 1 */ }, |
3107 | | { 0, 828 /* clgfr */, MCK_GR64, 1 /* 0 */ }, |
3108 | | { 0, 834 /* clgfrl */, MCK_GR64, 1 /* 0 */ }, |
3109 | | { 0, 834 /* clgfrl */, MCK_PCRel32, 2 /* 1 */ }, |
3110 | | { 0, 841 /* clghrl */, MCK_GR64, 1 /* 0 */ }, |
3111 | | { 0, 841 /* clghrl */, MCK_PCRel32, 2 /* 1 */ }, |
3112 | | { 0, 848 /* clghsi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3113 | | { 0, 855 /* clgij */, MCK_GR64, 1 /* 0 */ }, |
3114 | | { 0, 855 /* clgij */, MCK_PCRel16, 8 /* 3 */ }, |
3115 | | { 0, 861 /* clgije */, MCK_GR64, 1 /* 0 */ }, |
3116 | | { 0, 861 /* clgije */, MCK_PCRel16, 4 /* 2 */ }, |
3117 | | { 0, 868 /* clgijh */, MCK_GR64, 1 /* 0 */ }, |
3118 | | { 0, 868 /* clgijh */, MCK_PCRel16, 4 /* 2 */ }, |
3119 | | { 0, 875 /* clgijhe */, MCK_GR64, 1 /* 0 */ }, |
3120 | | { 0, 875 /* clgijhe */, MCK_PCRel16, 4 /* 2 */ }, |
3121 | | { 0, 883 /* clgijl */, MCK_GR64, 1 /* 0 */ }, |
3122 | | { 0, 883 /* clgijl */, MCK_PCRel16, 4 /* 2 */ }, |
3123 | | { 0, 890 /* clgijle */, MCK_GR64, 1 /* 0 */ }, |
3124 | | { 0, 890 /* clgijle */, MCK_PCRel16, 4 /* 2 */ }, |
3125 | | { 0, 898 /* clgijlh */, MCK_GR64, 1 /* 0 */ }, |
3126 | | { 0, 898 /* clgijlh */, MCK_PCRel16, 4 /* 2 */ }, |
3127 | | { 0, 906 /* clgijne */, MCK_GR64, 1 /* 0 */ }, |
3128 | | { 0, 906 /* clgijne */, MCK_PCRel16, 4 /* 2 */ }, |
3129 | | { 0, 914 /* clgijnh */, MCK_GR64, 1 /* 0 */ }, |
3130 | | { 0, 914 /* clgijnh */, MCK_PCRel16, 4 /* 2 */ }, |
3131 | | { 0, 922 /* clgijnhe */, MCK_GR64, 1 /* 0 */ }, |
3132 | | { 0, 922 /* clgijnhe */, MCK_PCRel16, 4 /* 2 */ }, |
3133 | | { 0, 931 /* clgijnl */, MCK_GR64, 1 /* 0 */ }, |
3134 | | { 0, 931 /* clgijnl */, MCK_PCRel16, 4 /* 2 */ }, |
3135 | | { 0, 939 /* clgijnle */, MCK_GR64, 1 /* 0 */ }, |
3136 | | { 0, 939 /* clgijnle */, MCK_PCRel16, 4 /* 2 */ }, |
3137 | | { 0, 948 /* clgijnlh */, MCK_GR64, 1 /* 0 */ }, |
3138 | | { 0, 948 /* clgijnlh */, MCK_PCRel16, 4 /* 2 */ }, |
3139 | | { 0, 957 /* clgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3140 | | { 0, 962 /* clgrj */, MCK_GR64, 3 /* 0, 1 */ }, |
3141 | | { 0, 962 /* clgrj */, MCK_PCRel16, 8 /* 3 */ }, |
3142 | | { 0, 968 /* clgrje */, MCK_GR64, 3 /* 0, 1 */ }, |
3143 | | { 0, 968 /* clgrje */, MCK_PCRel16, 4 /* 2 */ }, |
3144 | | { 0, 975 /* clgrjh */, MCK_GR64, 3 /* 0, 1 */ }, |
3145 | | { 0, 975 /* clgrjh */, MCK_PCRel16, 4 /* 2 */ }, |
3146 | | { 0, 982 /* clgrjhe */, MCK_GR64, 3 /* 0, 1 */ }, |
3147 | | { 0, 982 /* clgrjhe */, MCK_PCRel16, 4 /* 2 */ }, |
3148 | | { 0, 990 /* clgrjl */, MCK_GR64, 3 /* 0, 1 */ }, |
3149 | | { 0, 990 /* clgrjl */, MCK_PCRel16, 4 /* 2 */ }, |
3150 | | { 0, 997 /* clgrjle */, MCK_GR64, 3 /* 0, 1 */ }, |
3151 | | { 0, 997 /* clgrjle */, MCK_PCRel16, 4 /* 2 */ }, |
3152 | | { 0, 1005 /* clgrjlh */, MCK_GR64, 3 /* 0, 1 */ }, |
3153 | | { 0, 1005 /* clgrjlh */, MCK_PCRel16, 4 /* 2 */ }, |
3154 | | { 0, 1013 /* clgrjne */, MCK_GR64, 3 /* 0, 1 */ }, |
3155 | | { 0, 1013 /* clgrjne */, MCK_PCRel16, 4 /* 2 */ }, |
3156 | | { 0, 1021 /* clgrjnh */, MCK_GR64, 3 /* 0, 1 */ }, |
3157 | | { 0, 1021 /* clgrjnh */, MCK_PCRel16, 4 /* 2 */ }, |
3158 | | { 0, 1029 /* clgrjnhe */, MCK_GR64, 3 /* 0, 1 */ }, |
3159 | | { 0, 1029 /* clgrjnhe */, MCK_PCRel16, 4 /* 2 */ }, |
3160 | | { 0, 1038 /* clgrjnl */, MCK_GR64, 3 /* 0, 1 */ }, |
3161 | | { 0, 1038 /* clgrjnl */, MCK_PCRel16, 4 /* 2 */ }, |
3162 | | { 0, 1046 /* clgrjnle */, MCK_GR64, 3 /* 0, 1 */ }, |
3163 | | { 0, 1046 /* clgrjnle */, MCK_PCRel16, 4 /* 2 */ }, |
3164 | | { 0, 1055 /* clgrjnlh */, MCK_GR64, 3 /* 0, 1 */ }, |
3165 | | { 0, 1055 /* clgrjnlh */, MCK_PCRel16, 4 /* 2 */ }, |
3166 | | { 0, 1064 /* clgrl */, MCK_GR64, 1 /* 0 */ }, |
3167 | | { 0, 1064 /* clgrl */, MCK_PCRel32, 2 /* 1 */ }, |
3168 | | { Feature_FeatureFPExtension, 1070 /* clgxbr */, MCK_FP128, 4 /* 2 */ }, |
3169 | | { Feature_FeatureFPExtension, 1070 /* clgxbr */, MCK_GR64, 1 /* 0 */ }, |
3170 | | { Feature_FeatureHighWord, 1077 /* clhf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3171 | | { Feature_FeatureHighWord, 1077 /* clhf */, MCK_GRH32, 1 /* 0 */ }, |
3172 | | { 0, 1082 /* clhhsi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3173 | | { 0, 1089 /* clhrl */, MCK_GR32, 1 /* 0 */ }, |
3174 | | { 0, 1089 /* clhrl */, MCK_PCRel32, 2 /* 1 */ }, |
3175 | | { 0, 1095 /* cli */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3176 | | { Feature_FeatureHighWord, 1099 /* clih */, MCK_GRH32, 1 /* 0 */ }, |
3177 | | { 0, 1104 /* clij */, MCK_GR32, 1 /* 0 */ }, |
3178 | | { 0, 1104 /* clij */, MCK_PCRel16, 8 /* 3 */ }, |
3179 | | { 0, 1109 /* clije */, MCK_GR32, 1 /* 0 */ }, |
3180 | | { 0, 1109 /* clije */, MCK_PCRel16, 4 /* 2 */ }, |
3181 | | { 0, 1115 /* clijh */, MCK_GR32, 1 /* 0 */ }, |
3182 | | { 0, 1115 /* clijh */, MCK_PCRel16, 4 /* 2 */ }, |
3183 | | { 0, 1121 /* clijhe */, MCK_GR32, 1 /* 0 */ }, |
3184 | | { 0, 1121 /* clijhe */, MCK_PCRel16, 4 /* 2 */ }, |
3185 | | { 0, 1128 /* clijl */, MCK_GR32, 1 /* 0 */ }, |
3186 | | { 0, 1128 /* clijl */, MCK_PCRel16, 4 /* 2 */ }, |
3187 | | { 0, 1134 /* clijle */, MCK_GR32, 1 /* 0 */ }, |
3188 | | { 0, 1134 /* clijle */, MCK_PCRel16, 4 /* 2 */ }, |
3189 | | { 0, 1141 /* clijlh */, MCK_GR32, 1 /* 0 */ }, |
3190 | | { 0, 1141 /* clijlh */, MCK_PCRel16, 4 /* 2 */ }, |
3191 | | { 0, 1148 /* clijne */, MCK_GR32, 1 /* 0 */ }, |
3192 | | { 0, 1148 /* clijne */, MCK_PCRel16, 4 /* 2 */ }, |
3193 | | { 0, 1155 /* clijnh */, MCK_GR32, 1 /* 0 */ }, |
3194 | | { 0, 1155 /* clijnh */, MCK_PCRel16, 4 /* 2 */ }, |
3195 | | { 0, 1162 /* clijnhe */, MCK_GR32, 1 /* 0 */ }, |
3196 | | { 0, 1162 /* clijnhe */, MCK_PCRel16, 4 /* 2 */ }, |
3197 | | { 0, 1170 /* clijnl */, MCK_GR32, 1 /* 0 */ }, |
3198 | | { 0, 1170 /* clijnl */, MCK_PCRel16, 4 /* 2 */ }, |
3199 | | { 0, 1177 /* clijnle */, MCK_GR32, 1 /* 0 */ }, |
3200 | | { 0, 1177 /* clijnle */, MCK_PCRel16, 4 /* 2 */ }, |
3201 | | { 0, 1185 /* clijnlh */, MCK_GR32, 1 /* 0 */ }, |
3202 | | { 0, 1185 /* clijnlh */, MCK_PCRel16, 4 /* 2 */ }, |
3203 | | { 0, 1193 /* cliy */, MCK_BDAddr64Disp20, 1 /* 0 */ }, |
3204 | | { 0, 1198 /* clr */, MCK_GR32, 3 /* 0, 1 */ }, |
3205 | | { 0, 1202 /* clrj */, MCK_GR32, 3 /* 0, 1 */ }, |
3206 | | { 0, 1202 /* clrj */, MCK_PCRel16, 8 /* 3 */ }, |
3207 | | { 0, 1207 /* clrje */, MCK_GR32, 3 /* 0, 1 */ }, |
3208 | | { 0, 1207 /* clrje */, MCK_PCRel16, 4 /* 2 */ }, |
3209 | | { 0, 1213 /* clrjh */, MCK_GR32, 3 /* 0, 1 */ }, |
3210 | | { 0, 1213 /* clrjh */, MCK_PCRel16, 4 /* 2 */ }, |
3211 | | { 0, 1219 /* clrjhe */, MCK_GR32, 3 /* 0, 1 */ }, |
3212 | | { 0, 1219 /* clrjhe */, MCK_PCRel16, 4 /* 2 */ }, |
3213 | | { 0, 1226 /* clrjl */, MCK_GR32, 3 /* 0, 1 */ }, |
3214 | | { 0, 1226 /* clrjl */, MCK_PCRel16, 4 /* 2 */ }, |
3215 | | { 0, 1232 /* clrjle */, MCK_GR32, 3 /* 0, 1 */ }, |
3216 | | { 0, 1232 /* clrjle */, MCK_PCRel16, 4 /* 2 */ }, |
3217 | | { 0, 1239 /* clrjlh */, MCK_GR32, 3 /* 0, 1 */ }, |
3218 | | { 0, 1239 /* clrjlh */, MCK_PCRel16, 4 /* 2 */ }, |
3219 | | { 0, 1246 /* clrjne */, MCK_GR32, 3 /* 0, 1 */ }, |
3220 | | { 0, 1246 /* clrjne */, MCK_PCRel16, 4 /* 2 */ }, |
3221 | | { 0, 1253 /* clrjnh */, MCK_GR32, 3 /* 0, 1 */ }, |
3222 | | { 0, 1253 /* clrjnh */, MCK_PCRel16, 4 /* 2 */ }, |
3223 | | { 0, 1260 /* clrjnhe */, MCK_GR32, 3 /* 0, 1 */ }, |
3224 | | { 0, 1260 /* clrjnhe */, MCK_PCRel16, 4 /* 2 */ }, |
3225 | | { 0, 1268 /* clrjnl */, MCK_GR32, 3 /* 0, 1 */ }, |
3226 | | { 0, 1268 /* clrjnl */, MCK_PCRel16, 4 /* 2 */ }, |
3227 | | { 0, 1275 /* clrjnle */, MCK_GR32, 3 /* 0, 1 */ }, |
3228 | | { 0, 1275 /* clrjnle */, MCK_PCRel16, 4 /* 2 */ }, |
3229 | | { 0, 1283 /* clrjnlh */, MCK_GR32, 3 /* 0, 1 */ }, |
3230 | | { 0, 1283 /* clrjnlh */, MCK_PCRel16, 4 /* 2 */ }, |
3231 | | { 0, 1291 /* clrl */, MCK_GR32, 1 /* 0 */ }, |
3232 | | { 0, 1291 /* clrl */, MCK_PCRel32, 2 /* 1 */ }, |
3233 | | { 0, 1296 /* clst */, MCK_GR64, 3 /* 0, 1 */ }, |
3234 | | { 0, 1301 /* cly */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3235 | | { 0, 1301 /* cly */, MCK_GR32, 1 /* 0 */ }, |
3236 | | { 0, 1305 /* cpsdr */, MCK_FP64, 7 /* 0, 1, 2 */ }, |
3237 | | { 0, 1311 /* cr */, MCK_GR32, 3 /* 0, 1 */ }, |
3238 | | { 0, 1314 /* crj */, MCK_GR32, 3 /* 0, 1 */ }, |
3239 | | { 0, 1314 /* crj */, MCK_PCRel16, 8 /* 3 */ }, |
3240 | | { 0, 1318 /* crje */, MCK_GR32, 3 /* 0, 1 */ }, |
3241 | | { 0, 1318 /* crje */, MCK_PCRel16, 4 /* 2 */ }, |
3242 | | { 0, 1323 /* crjh */, MCK_GR32, 3 /* 0, 1 */ }, |
3243 | | { 0, 1323 /* crjh */, MCK_PCRel16, 4 /* 2 */ }, |
3244 | | { 0, 1328 /* crjhe */, MCK_GR32, 3 /* 0, 1 */ }, |
3245 | | { 0, 1328 /* crjhe */, MCK_PCRel16, 4 /* 2 */ }, |
3246 | | { 0, 1334 /* crjl */, MCK_GR32, 3 /* 0, 1 */ }, |
3247 | | { 0, 1334 /* crjl */, MCK_PCRel16, 4 /* 2 */ }, |
3248 | | { 0, 1339 /* crjle */, MCK_GR32, 3 /* 0, 1 */ }, |
3249 | | { 0, 1339 /* crjle */, MCK_PCRel16, 4 /* 2 */ }, |
3250 | | { 0, 1345 /* crjlh */, MCK_GR32, 3 /* 0, 1 */ }, |
3251 | | { 0, 1345 /* crjlh */, MCK_PCRel16, 4 /* 2 */ }, |
3252 | | { 0, 1351 /* crjne */, MCK_GR32, 3 /* 0, 1 */ }, |
3253 | | { 0, 1351 /* crjne */, MCK_PCRel16, 4 /* 2 */ }, |
3254 | | { 0, 1357 /* crjnh */, MCK_GR32, 3 /* 0, 1 */ }, |
3255 | | { 0, 1357 /* crjnh */, MCK_PCRel16, 4 /* 2 */ }, |
3256 | | { 0, 1363 /* crjnhe */, MCK_GR32, 3 /* 0, 1 */ }, |
3257 | | { 0, 1363 /* crjnhe */, MCK_PCRel16, 4 /* 2 */ }, |
3258 | | { 0, 1370 /* crjnl */, MCK_GR32, 3 /* 0, 1 */ }, |
3259 | | { 0, 1370 /* crjnl */, MCK_PCRel16, 4 /* 2 */ }, |
3260 | | { 0, 1376 /* crjnle */, MCK_GR32, 3 /* 0, 1 */ }, |
3261 | | { 0, 1376 /* crjnle */, MCK_PCRel16, 4 /* 2 */ }, |
3262 | | { 0, 1383 /* crjnlh */, MCK_GR32, 3 /* 0, 1 */ }, |
3263 | | { 0, 1383 /* crjnlh */, MCK_PCRel16, 4 /* 2 */ }, |
3264 | | { 0, 1390 /* crl */, MCK_GR32, 1 /* 0 */ }, |
3265 | | { 0, 1390 /* crl */, MCK_PCRel32, 2 /* 1 */ }, |
3266 | | { 0, 1394 /* cs */, MCK_BDAddr64Disp12, 4 /* 2 */ }, |
3267 | | { 0, 1394 /* cs */, MCK_GR32, 3 /* 0, 1 */ }, |
3268 | | { 0, 1397 /* csg */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3269 | | { 0, 1397 /* csg */, MCK_GR64, 3 /* 0, 1 */ }, |
3270 | | { 0, 1401 /* csy */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3271 | | { 0, 1401 /* csy */, MCK_GR32, 3 /* 0, 1 */ }, |
3272 | | { 0, 1405 /* cxbr */, MCK_FP128, 3 /* 0, 1 */ }, |
3273 | | { 0, 1410 /* cxfbr */, MCK_FP128, 1 /* 0 */ }, |
3274 | | { 0, 1410 /* cxfbr */, MCK_GR32, 2 /* 1 */ }, |
3275 | | { 0, 1416 /* cxgbr */, MCK_FP128, 1 /* 0 */ }, |
3276 | | { 0, 1416 /* cxgbr */, MCK_GR64, 2 /* 1 */ }, |
3277 | | { Feature_FeatureFPExtension, 1422 /* cxlfbr */, MCK_FP128, 1 /* 0 */ }, |
3278 | | { Feature_FeatureFPExtension, 1422 /* cxlfbr */, MCK_GR32, 4 /* 2 */ }, |
3279 | | { Feature_FeatureFPExtension, 1429 /* cxlgbr */, MCK_FP128, 1 /* 0 */ }, |
3280 | | { Feature_FeatureFPExtension, 1429 /* cxlgbr */, MCK_GR64, 4 /* 2 */ }, |
3281 | | { 0, 1436 /* cy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3282 | | { 0, 1436 /* cy */, MCK_GR32, 1 /* 0 */ }, |
3283 | | { 0, 1439 /* ddb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3284 | | { 0, 1439 /* ddb */, MCK_FP64, 1 /* 0 */ }, |
3285 | | { 0, 1443 /* ddbr */, MCK_FP64, 3 /* 0, 1 */ }, |
3286 | | { 0, 1448 /* deb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3287 | | { 0, 1448 /* deb */, MCK_FP32, 1 /* 0 */ }, |
3288 | | { 0, 1452 /* debr */, MCK_FP32, 3 /* 0, 1 */ }, |
3289 | | { 0, 1457 /* dl */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3290 | | { 0, 1457 /* dl */, MCK_GR128, 1 /* 0 */ }, |
3291 | | { 0, 1460 /* dlg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3292 | | { 0, 1460 /* dlg */, MCK_GR128, 1 /* 0 */ }, |
3293 | | { 0, 1464 /* dlgr */, MCK_GR128, 1 /* 0 */ }, |
3294 | | { 0, 1464 /* dlgr */, MCK_GR64, 2 /* 1 */ }, |
3295 | | { 0, 1469 /* dlr */, MCK_GR128, 1 /* 0 */ }, |
3296 | | { 0, 1469 /* dlr */, MCK_GR32, 2 /* 1 */ }, |
3297 | | { 0, 1473 /* dsg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3298 | | { 0, 1473 /* dsg */, MCK_GR128, 1 /* 0 */ }, |
3299 | | { 0, 1477 /* dsgf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3300 | | { 0, 1477 /* dsgf */, MCK_GR128, 1 /* 0 */ }, |
3301 | | { 0, 1482 /* dsgfr */, MCK_GR128, 1 /* 0 */ }, |
3302 | | { 0, 1482 /* dsgfr */, MCK_GR32, 2 /* 1 */ }, |
3303 | | { 0, 1488 /* dsgr */, MCK_GR128, 1 /* 0 */ }, |
3304 | | { 0, 1488 /* dsgr */, MCK_GR64, 2 /* 1 */ }, |
3305 | | { 0, 1493 /* dxbr */, MCK_FP128, 3 /* 0, 1 */ }, |
3306 | | { 0, 1498 /* ear */, MCK_AccessReg, 2 /* 1 */ }, |
3307 | | { 0, 1498 /* ear */, MCK_GR32, 1 /* 0 */ }, |
3308 | | { Feature_FeatureTransactionalExecution, 1502 /* etnd */, MCK_GR32, 1 /* 0 */ }, |
3309 | | { 0, 1507 /* fidbr */, MCK_FP64, 5 /* 0, 2 */ }, |
3310 | | { Feature_FeatureFPExtension, 1513 /* fidbra */, MCK_FP64, 5 /* 0, 2 */ }, |
3311 | | { 0, 1520 /* fiebr */, MCK_FP32, 5 /* 0, 2 */ }, |
3312 | | { Feature_FeatureFPExtension, 1526 /* fiebra */, MCK_FP32, 5 /* 0, 2 */ }, |
3313 | | { 0, 1533 /* fixbr */, MCK_FP128, 5 /* 0, 2 */ }, |
3314 | | { Feature_FeatureFPExtension, 1539 /* fixbra */, MCK_FP128, 5 /* 0, 2 */ }, |
3315 | | { 0, 1546 /* flogr */, MCK_GR128, 1 /* 0 */ }, |
3316 | | { 0, 1546 /* flogr */, MCK_GR64, 2 /* 1 */ }, |
3317 | | { 0, 1552 /* ic */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3318 | | { 0, 1552 /* ic */, MCK_GR64, 1 /* 0 */ }, |
3319 | | { 0, 1555 /* icy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3320 | | { 0, 1555 /* icy */, MCK_GR64, 1 /* 0 */ }, |
3321 | | { 0, 1559 /* iihf */, MCK_GRH32, 1 /* 0 */ }, |
3322 | | { 0, 1564 /* iihh */, MCK_GRH32, 1 /* 0 */ }, |
3323 | | { 0, 1569 /* iihl */, MCK_GRH32, 1 /* 0 */ }, |
3324 | | { 0, 1574 /* iilf */, MCK_GR32, 1 /* 0 */ }, |
3325 | | { 0, 1579 /* iilh */, MCK_GR32, 1 /* 0 */ }, |
3326 | | { 0, 1584 /* iill */, MCK_GR32, 1 /* 0 */ }, |
3327 | | { 0, 1589 /* ipm */, MCK_GR32, 1 /* 0 */ }, |
3328 | | { 0, 1593 /* j */, MCK_PCRel16, 1 /* 0 */ }, |
3329 | | { 0, 1595 /* je */, MCK_PCRel16, 1 /* 0 */ }, |
3330 | | { 0, 1598 /* jg */, MCK_PCRel32, 1 /* 0 */ }, |
3331 | | { 0, 1601 /* jge */, MCK_PCRel32, 1 /* 0 */ }, |
3332 | | { 0, 1605 /* jgh */, MCK_PCRel32, 1 /* 0 */ }, |
3333 | | { 0, 1609 /* jghe */, MCK_PCRel32, 1 /* 0 */ }, |
3334 | | { 0, 1614 /* jgl */, MCK_PCRel32, 1 /* 0 */ }, |
3335 | | { 0, 1618 /* jgle */, MCK_PCRel32, 1 /* 0 */ }, |
3336 | | { 0, 1623 /* jglh */, MCK_PCRel32, 1 /* 0 */ }, |
3337 | | { 0, 1628 /* jgne */, MCK_PCRel32, 1 /* 0 */ }, |
3338 | | { 0, 1633 /* jgnh */, MCK_PCRel32, 1 /* 0 */ }, |
3339 | | { 0, 1638 /* jgnhe */, MCK_PCRel32, 1 /* 0 */ }, |
3340 | | { 0, 1644 /* jgnl */, MCK_PCRel32, 1 /* 0 */ }, |
3341 | | { 0, 1649 /* jgnle */, MCK_PCRel32, 1 /* 0 */ }, |
3342 | | { 0, 1655 /* jgnlh */, MCK_PCRel32, 1 /* 0 */ }, |
3343 | | { 0, 1661 /* jgno */, MCK_PCRel32, 1 /* 0 */ }, |
3344 | | { 0, 1666 /* jgo */, MCK_PCRel32, 1 /* 0 */ }, |
3345 | | { 0, 1670 /* jh */, MCK_PCRel16, 1 /* 0 */ }, |
3346 | | { 0, 1673 /* jhe */, MCK_PCRel16, 1 /* 0 */ }, |
3347 | | { 0, 1677 /* jl */, MCK_PCRel16, 1 /* 0 */ }, |
3348 | | { 0, 1680 /* jle */, MCK_PCRel16, 1 /* 0 */ }, |
3349 | | { 0, 1684 /* jlh */, MCK_PCRel16, 1 /* 0 */ }, |
3350 | | { 0, 1688 /* jne */, MCK_PCRel16, 1 /* 0 */ }, |
3351 | | { 0, 1692 /* jnh */, MCK_PCRel16, 1 /* 0 */ }, |
3352 | | { 0, 1696 /* jnhe */, MCK_PCRel16, 1 /* 0 */ }, |
3353 | | { 0, 1701 /* jnl */, MCK_PCRel16, 1 /* 0 */ }, |
3354 | | { 0, 1705 /* jnle */, MCK_PCRel16, 1 /* 0 */ }, |
3355 | | { 0, 1710 /* jnlh */, MCK_PCRel16, 1 /* 0 */ }, |
3356 | | { 0, 1715 /* jno */, MCK_PCRel16, 1 /* 0 */ }, |
3357 | | { 0, 1719 /* jo */, MCK_PCRel16, 1 /* 0 */ }, |
3358 | | { 0, 1722 /* l */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3359 | | { 0, 1722 /* l */, MCK_GR32, 1 /* 0 */ }, |
3360 | | { 0, 1724 /* la */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3361 | | { 0, 1724 /* la */, MCK_GR64, 1 /* 0 */ }, |
3362 | | { Feature_FeatureInterlockedAccess1, 1727 /* laa */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3363 | | { Feature_FeatureInterlockedAccess1, 1727 /* laa */, MCK_GR32, 3 /* 0, 1 */ }, |
3364 | | { Feature_FeatureInterlockedAccess1, 1731 /* laag */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3365 | | { Feature_FeatureInterlockedAccess1, 1731 /* laag */, MCK_GR64, 3 /* 0, 1 */ }, |
3366 | | { Feature_FeatureInterlockedAccess1, 1736 /* laal */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3367 | | { Feature_FeatureInterlockedAccess1, 1736 /* laal */, MCK_GR32, 3 /* 0, 1 */ }, |
3368 | | { Feature_FeatureInterlockedAccess1, 1741 /* laalg */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3369 | | { Feature_FeatureInterlockedAccess1, 1741 /* laalg */, MCK_GR64, 3 /* 0, 1 */ }, |
3370 | | { Feature_FeatureInterlockedAccess1, 1747 /* lan */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3371 | | { Feature_FeatureInterlockedAccess1, 1747 /* lan */, MCK_GR32, 3 /* 0, 1 */ }, |
3372 | | { Feature_FeatureInterlockedAccess1, 1751 /* lang */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3373 | | { Feature_FeatureInterlockedAccess1, 1751 /* lang */, MCK_GR64, 3 /* 0, 1 */ }, |
3374 | | { Feature_FeatureInterlockedAccess1, 1756 /* lao */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3375 | | { Feature_FeatureInterlockedAccess1, 1756 /* lao */, MCK_GR32, 3 /* 0, 1 */ }, |
3376 | | { Feature_FeatureInterlockedAccess1, 1760 /* laog */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3377 | | { Feature_FeatureInterlockedAccess1, 1760 /* laog */, MCK_GR64, 3 /* 0, 1 */ }, |
3378 | | { 0, 1765 /* larl */, MCK_GR64, 1 /* 0 */ }, |
3379 | | { 0, 1765 /* larl */, MCK_PCRel32, 2 /* 1 */ }, |
3380 | | { Feature_FeatureInterlockedAccess1, 1770 /* lax */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3381 | | { Feature_FeatureInterlockedAccess1, 1770 /* lax */, MCK_GR32, 3 /* 0, 1 */ }, |
3382 | | { Feature_FeatureInterlockedAccess1, 1774 /* laxg */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3383 | | { Feature_FeatureInterlockedAccess1, 1774 /* laxg */, MCK_GR64, 3 /* 0, 1 */ }, |
3384 | | { 0, 1779 /* lay */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3385 | | { 0, 1779 /* lay */, MCK_GR64, 1 /* 0 */ }, |
3386 | | { 0, 1783 /* lb */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3387 | | { 0, 1783 /* lb */, MCK_GR32, 1 /* 0 */ }, |
3388 | | { Feature_FeatureHighWord, 1786 /* lbh */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3389 | | { Feature_FeatureHighWord, 1786 /* lbh */, MCK_GRH32, 1 /* 0 */ }, |
3390 | | { 0, 1790 /* lbr */, MCK_GR32, 3 /* 0, 1 */ }, |
3391 | | { Feature_FeatureVector, 1794 /* lcbb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3392 | | { Feature_FeatureVector, 1794 /* lcbb */, MCK_GR32, 1 /* 0 */ }, |
3393 | | { 0, 1799 /* lcdbr */, MCK_FP64, 3 /* 0, 1 */ }, |
3394 | | { 0, 1805 /* lcdfr */, MCK_FP64, 3 /* 0, 1 */ }, |
3395 | | { 0, 1811 /* lcebr */, MCK_FP32, 3 /* 0, 1 */ }, |
3396 | | { 0, 1817 /* lcgfr */, MCK_GR32, 2 /* 1 */ }, |
3397 | | { 0, 1817 /* lcgfr */, MCK_GR64, 1 /* 0 */ }, |
3398 | | { 0, 1823 /* lcgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3399 | | { 0, 1828 /* lcr */, MCK_GR32, 3 /* 0, 1 */ }, |
3400 | | { 0, 1832 /* lcxbr */, MCK_FP128, 3 /* 0, 1 */ }, |
3401 | | { 0, 1838 /* ld */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3402 | | { 0, 1838 /* ld */, MCK_FP64, 1 /* 0 */ }, |
3403 | | { 0, 1841 /* lde */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3404 | | { 0, 1841 /* lde */, MCK_FP32, 1 /* 0 */ }, |
3405 | | { 0, 1845 /* ldeb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3406 | | { 0, 1845 /* ldeb */, MCK_FP64, 1 /* 0 */ }, |
3407 | | { 0, 1850 /* ldebr */, MCK_FP32, 2 /* 1 */ }, |
3408 | | { 0, 1850 /* ldebr */, MCK_FP64, 1 /* 0 */ }, |
3409 | | { 0, 1856 /* ldgr */, MCK_FP64, 1 /* 0 */ }, |
3410 | | { 0, 1856 /* ldgr */, MCK_GR64, 2 /* 1 */ }, |
3411 | | { 0, 1861 /* ldr */, MCK_FP64, 3 /* 0, 1 */ }, |
3412 | | { 0, 1865 /* ldxbr */, MCK_FP128, 3 /* 0, 1 */ }, |
3413 | | { Feature_FeatureFPExtension, 1871 /* ldxbra */, MCK_FP128, 5 /* 0, 2 */ }, |
3414 | | { 0, 1878 /* ldy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3415 | | { 0, 1878 /* ldy */, MCK_FP64, 1 /* 0 */ }, |
3416 | | { 0, 1882 /* le */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3417 | | { 0, 1882 /* le */, MCK_FP32, 1 /* 0 */ }, |
3418 | | { 0, 1885 /* ledbr */, MCK_FP32, 1 /* 0 */ }, |
3419 | | { 0, 1885 /* ledbr */, MCK_FP64, 2 /* 1 */ }, |
3420 | | { Feature_FeatureFPExtension, 1891 /* ledbra */, MCK_FP32, 1 /* 0 */ }, |
3421 | | { Feature_FeatureFPExtension, 1891 /* ledbra */, MCK_FP64, 4 /* 2 */ }, |
3422 | | { 0, 1898 /* ler */, MCK_FP32, 3 /* 0, 1 */ }, |
3423 | | { 0, 1902 /* lexbr */, MCK_FP128, 3 /* 0, 1 */ }, |
3424 | | { Feature_FeatureFPExtension, 1908 /* lexbra */, MCK_FP128, 5 /* 0, 2 */ }, |
3425 | | { 0, 1915 /* ley */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3426 | | { 0, 1915 /* ley */, MCK_FP32, 1 /* 0 */ }, |
3427 | | { Feature_FeatureHighWord, 1919 /* lfh */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3428 | | { Feature_FeatureHighWord, 1919 /* lfh */, MCK_GRH32, 1 /* 0 */ }, |
3429 | | { 0, 1923 /* lg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3430 | | { 0, 1923 /* lg */, MCK_GR64, 1 /* 0 */ }, |
3431 | | { 0, 1926 /* lgb */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3432 | | { 0, 1926 /* lgb */, MCK_GR64, 1 /* 0 */ }, |
3433 | | { 0, 1930 /* lgbr */, MCK_GR64, 3 /* 0, 1 */ }, |
3434 | | { 0, 1935 /* lgdr */, MCK_FP64, 2 /* 1 */ }, |
3435 | | { 0, 1935 /* lgdr */, MCK_GR64, 1 /* 0 */ }, |
3436 | | { 0, 1940 /* lgf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3437 | | { 0, 1940 /* lgf */, MCK_GR64, 1 /* 0 */ }, |
3438 | | { 0, 1944 /* lgfi */, MCK_GR64, 1 /* 0 */ }, |
3439 | | { 0, 1949 /* lgfr */, MCK_GR32, 2 /* 1 */ }, |
3440 | | { 0, 1949 /* lgfr */, MCK_GR64, 1 /* 0 */ }, |
3441 | | { 0, 1954 /* lgfrl */, MCK_GR64, 1 /* 0 */ }, |
3442 | | { 0, 1954 /* lgfrl */, MCK_PCRel32, 2 /* 1 */ }, |
3443 | | { 0, 1960 /* lgh */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3444 | | { 0, 1960 /* lgh */, MCK_GR64, 1 /* 0 */ }, |
3445 | | { 0, 1964 /* lghi */, MCK_GR64, 1 /* 0 */ }, |
3446 | | { 0, 1969 /* lghr */, MCK_GR64, 3 /* 0, 1 */ }, |
3447 | | { 0, 1974 /* lghrl */, MCK_GR64, 1 /* 0 */ }, |
3448 | | { 0, 1974 /* lghrl */, MCK_PCRel32, 2 /* 1 */ }, |
3449 | | { 0, 1980 /* lgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3450 | | { 0, 1984 /* lgrl */, MCK_GR64, 1 /* 0 */ }, |
3451 | | { 0, 1984 /* lgrl */, MCK_PCRel32, 2 /* 1 */ }, |
3452 | | { 0, 1989 /* lh */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3453 | | { 0, 1989 /* lh */, MCK_GR32, 1 /* 0 */ }, |
3454 | | { Feature_FeatureHighWord, 1992 /* lhh */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3455 | | { Feature_FeatureHighWord, 1992 /* lhh */, MCK_GRH32, 1 /* 0 */ }, |
3456 | | { 0, 1996 /* lhi */, MCK_GR32, 1 /* 0 */ }, |
3457 | | { 0, 2000 /* lhr */, MCK_GR32, 3 /* 0, 1 */ }, |
3458 | | { 0, 2004 /* lhrl */, MCK_GR32, 1 /* 0 */ }, |
3459 | | { 0, 2004 /* lhrl */, MCK_PCRel32, 2 /* 1 */ }, |
3460 | | { 0, 2009 /* lhy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3461 | | { 0, 2009 /* lhy */, MCK_GR32, 1 /* 0 */ }, |
3462 | | { 0, 2013 /* llc */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3463 | | { 0, 2013 /* llc */, MCK_GR32, 1 /* 0 */ }, |
3464 | | { Feature_FeatureHighWord, 2017 /* llch */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3465 | | { Feature_FeatureHighWord, 2017 /* llch */, MCK_GRH32, 1 /* 0 */ }, |
3466 | | { 0, 2022 /* llcr */, MCK_GR32, 3 /* 0, 1 */ }, |
3467 | | { 0, 2027 /* llgc */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3468 | | { 0, 2027 /* llgc */, MCK_GR64, 1 /* 0 */ }, |
3469 | | { 0, 2032 /* llgcr */, MCK_GR64, 3 /* 0, 1 */ }, |
3470 | | { 0, 2038 /* llgf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3471 | | { 0, 2038 /* llgf */, MCK_GR64, 1 /* 0 */ }, |
3472 | | { 0, 2043 /* llgfr */, MCK_GR32, 2 /* 1 */ }, |
3473 | | { 0, 2043 /* llgfr */, MCK_GR64, 1 /* 0 */ }, |
3474 | | { 0, 2049 /* llgfrl */, MCK_GR64, 1 /* 0 */ }, |
3475 | | { 0, 2049 /* llgfrl */, MCK_PCRel32, 2 /* 1 */ }, |
3476 | | { 0, 2056 /* llgh */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3477 | | { 0, 2056 /* llgh */, MCK_GR64, 1 /* 0 */ }, |
3478 | | { 0, 2061 /* llghr */, MCK_GR64, 3 /* 0, 1 */ }, |
3479 | | { 0, 2067 /* llghrl */, MCK_GR64, 1 /* 0 */ }, |
3480 | | { 0, 2067 /* llghrl */, MCK_PCRel32, 2 /* 1 */ }, |
3481 | | { 0, 2074 /* llh */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3482 | | { 0, 2074 /* llh */, MCK_GR32, 1 /* 0 */ }, |
3483 | | { Feature_FeatureHighWord, 2078 /* llhh */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3484 | | { Feature_FeatureHighWord, 2078 /* llhh */, MCK_GRH32, 1 /* 0 */ }, |
3485 | | { 0, 2083 /* llhr */, MCK_GR32, 3 /* 0, 1 */ }, |
3486 | | { 0, 2088 /* llhrl */, MCK_GR32, 1 /* 0 */ }, |
3487 | | { 0, 2088 /* llhrl */, MCK_PCRel32, 2 /* 1 */ }, |
3488 | | { 0, 2094 /* llihf */, MCK_GR64, 1 /* 0 */ }, |
3489 | | { 0, 2100 /* llihh */, MCK_GR64, 1 /* 0 */ }, |
3490 | | { 0, 2106 /* llihl */, MCK_GR64, 1 /* 0 */ }, |
3491 | | { 0, 2112 /* llilf */, MCK_GR64, 1 /* 0 */ }, |
3492 | | { 0, 2118 /* llilh */, MCK_GR64, 1 /* 0 */ }, |
3493 | | { 0, 2124 /* llill */, MCK_GR64, 1 /* 0 */ }, |
3494 | | { 0, 2130 /* lmg */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3495 | | { 0, 2130 /* lmg */, MCK_GR64, 3 /* 0, 1 */ }, |
3496 | | { 0, 2134 /* lndbr */, MCK_FP64, 3 /* 0, 1 */ }, |
3497 | | { 0, 2140 /* lndfr */, MCK_FP64, 3 /* 0, 1 */ }, |
3498 | | { 0, 2146 /* lnebr */, MCK_FP32, 3 /* 0, 1 */ }, |
3499 | | { 0, 2152 /* lngfr */, MCK_GR32, 2 /* 1 */ }, |
3500 | | { 0, 2152 /* lngfr */, MCK_GR64, 1 /* 0 */ }, |
3501 | | { 0, 2158 /* lngr */, MCK_GR64, 3 /* 0, 1 */ }, |
3502 | | { 0, 2163 /* lnr */, MCK_GR32, 3 /* 0, 1 */ }, |
3503 | | { 0, 2167 /* lnxbr */, MCK_FP128, 3 /* 0, 1 */ }, |
3504 | | { Feature_FeatureLoadStoreOnCond, 2173 /* loc */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3505 | | { Feature_FeatureLoadStoreOnCond, 2173 /* loc */, MCK_GR32, 1 /* 0 */ }, |
3506 | | { Feature_FeatureLoadStoreOnCond, 2177 /* loce */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3507 | | { Feature_FeatureLoadStoreOnCond, 2177 /* loce */, MCK_GR32, 1 /* 0 */ }, |
3508 | | { Feature_FeatureLoadStoreOnCond, 2182 /* locg */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3509 | | { Feature_FeatureLoadStoreOnCond, 2182 /* locg */, MCK_GR64, 1 /* 0 */ }, |
3510 | | { Feature_FeatureLoadStoreOnCond, 2187 /* locge */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3511 | | { Feature_FeatureLoadStoreOnCond, 2187 /* locge */, MCK_GR64, 1 /* 0 */ }, |
3512 | | { Feature_FeatureLoadStoreOnCond, 2193 /* locgh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3513 | | { Feature_FeatureLoadStoreOnCond, 2193 /* locgh */, MCK_GR64, 1 /* 0 */ }, |
3514 | | { Feature_FeatureLoadStoreOnCond, 2199 /* locghe */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3515 | | { Feature_FeatureLoadStoreOnCond, 2199 /* locghe */, MCK_GR64, 1 /* 0 */ }, |
3516 | | { Feature_FeatureLoadStoreOnCond, 2206 /* locgl */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3517 | | { Feature_FeatureLoadStoreOnCond, 2206 /* locgl */, MCK_GR64, 1 /* 0 */ }, |
3518 | | { Feature_FeatureLoadStoreOnCond, 2212 /* locgle */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3519 | | { Feature_FeatureLoadStoreOnCond, 2212 /* locgle */, MCK_GR64, 1 /* 0 */ }, |
3520 | | { Feature_FeatureLoadStoreOnCond, 2219 /* locglh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3521 | | { Feature_FeatureLoadStoreOnCond, 2219 /* locglh */, MCK_GR64, 1 /* 0 */ }, |
3522 | | { Feature_FeatureLoadStoreOnCond, 2226 /* locgne */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3523 | | { Feature_FeatureLoadStoreOnCond, 2226 /* locgne */, MCK_GR64, 1 /* 0 */ }, |
3524 | | { Feature_FeatureLoadStoreOnCond, 2233 /* locgnh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3525 | | { Feature_FeatureLoadStoreOnCond, 2233 /* locgnh */, MCK_GR64, 1 /* 0 */ }, |
3526 | | { Feature_FeatureLoadStoreOnCond, 2240 /* locgnhe */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3527 | | { Feature_FeatureLoadStoreOnCond, 2240 /* locgnhe */, MCK_GR64, 1 /* 0 */ }, |
3528 | | { Feature_FeatureLoadStoreOnCond, 2248 /* locgnl */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3529 | | { Feature_FeatureLoadStoreOnCond, 2248 /* locgnl */, MCK_GR64, 1 /* 0 */ }, |
3530 | | { Feature_FeatureLoadStoreOnCond, 2255 /* locgnle */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3531 | | { Feature_FeatureLoadStoreOnCond, 2255 /* locgnle */, MCK_GR64, 1 /* 0 */ }, |
3532 | | { Feature_FeatureLoadStoreOnCond, 2263 /* locgnlh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3533 | | { Feature_FeatureLoadStoreOnCond, 2263 /* locgnlh */, MCK_GR64, 1 /* 0 */ }, |
3534 | | { Feature_FeatureLoadStoreOnCond, 2271 /* locgno */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3535 | | { Feature_FeatureLoadStoreOnCond, 2271 /* locgno */, MCK_GR64, 1 /* 0 */ }, |
3536 | | { Feature_FeatureLoadStoreOnCond, 2278 /* locgo */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3537 | | { Feature_FeatureLoadStoreOnCond, 2278 /* locgo */, MCK_GR64, 1 /* 0 */ }, |
3538 | | { Feature_FeatureLoadStoreOnCond, 2284 /* locgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3539 | | { Feature_FeatureLoadStoreOnCond, 2290 /* locgre */, MCK_GR64, 3 /* 0, 1 */ }, |
3540 | | { Feature_FeatureLoadStoreOnCond, 2297 /* locgrh */, MCK_GR64, 3 /* 0, 1 */ }, |
3541 | | { Feature_FeatureLoadStoreOnCond, 2304 /* locgrhe */, MCK_GR64, 3 /* 0, 1 */ }, |
3542 | | { Feature_FeatureLoadStoreOnCond, 2312 /* locgrl */, MCK_GR64, 3 /* 0, 1 */ }, |
3543 | | { Feature_FeatureLoadStoreOnCond, 2319 /* locgrle */, MCK_GR64, 3 /* 0, 1 */ }, |
3544 | | { Feature_FeatureLoadStoreOnCond, 2327 /* locgrlh */, MCK_GR64, 3 /* 0, 1 */ }, |
3545 | | { Feature_FeatureLoadStoreOnCond, 2335 /* locgrne */, MCK_GR64, 3 /* 0, 1 */ }, |
3546 | | { Feature_FeatureLoadStoreOnCond, 2343 /* locgrnh */, MCK_GR64, 3 /* 0, 1 */ }, |
3547 | | { Feature_FeatureLoadStoreOnCond, 2351 /* locgrnhe */, MCK_GR64, 3 /* 0, 1 */ }, |
3548 | | { Feature_FeatureLoadStoreOnCond, 2360 /* locgrnl */, MCK_GR64, 3 /* 0, 1 */ }, |
3549 | | { Feature_FeatureLoadStoreOnCond, 2368 /* locgrnle */, MCK_GR64, 3 /* 0, 1 */ }, |
3550 | | { Feature_FeatureLoadStoreOnCond, 2377 /* locgrnlh */, MCK_GR64, 3 /* 0, 1 */ }, |
3551 | | { Feature_FeatureLoadStoreOnCond, 2386 /* locgrno */, MCK_GR64, 3 /* 0, 1 */ }, |
3552 | | { Feature_FeatureLoadStoreOnCond, 2394 /* locgro */, MCK_GR64, 3 /* 0, 1 */ }, |
3553 | | { Feature_FeatureLoadStoreOnCond, 2401 /* loch */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3554 | | { Feature_FeatureLoadStoreOnCond, 2401 /* loch */, MCK_GR32, 1 /* 0 */ }, |
3555 | | { Feature_FeatureLoadStoreOnCond, 2406 /* loche */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3556 | | { Feature_FeatureLoadStoreOnCond, 2406 /* loche */, MCK_GR32, 1 /* 0 */ }, |
3557 | | { Feature_FeatureLoadStoreOnCond, 2412 /* locl */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3558 | | { Feature_FeatureLoadStoreOnCond, 2412 /* locl */, MCK_GR32, 1 /* 0 */ }, |
3559 | | { Feature_FeatureLoadStoreOnCond, 2417 /* locle */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3560 | | { Feature_FeatureLoadStoreOnCond, 2417 /* locle */, MCK_GR32, 1 /* 0 */ }, |
3561 | | { Feature_FeatureLoadStoreOnCond, 2423 /* loclh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3562 | | { Feature_FeatureLoadStoreOnCond, 2423 /* loclh */, MCK_GR32, 1 /* 0 */ }, |
3563 | | { Feature_FeatureLoadStoreOnCond, 2429 /* locne */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3564 | | { Feature_FeatureLoadStoreOnCond, 2429 /* locne */, MCK_GR32, 1 /* 0 */ }, |
3565 | | { Feature_FeatureLoadStoreOnCond, 2435 /* locnh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3566 | | { Feature_FeatureLoadStoreOnCond, 2435 /* locnh */, MCK_GR32, 1 /* 0 */ }, |
3567 | | { Feature_FeatureLoadStoreOnCond, 2441 /* locnhe */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3568 | | { Feature_FeatureLoadStoreOnCond, 2441 /* locnhe */, MCK_GR32, 1 /* 0 */ }, |
3569 | | { Feature_FeatureLoadStoreOnCond, 2448 /* locnl */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3570 | | { Feature_FeatureLoadStoreOnCond, 2448 /* locnl */, MCK_GR32, 1 /* 0 */ }, |
3571 | | { Feature_FeatureLoadStoreOnCond, 2454 /* locnle */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3572 | | { Feature_FeatureLoadStoreOnCond, 2454 /* locnle */, MCK_GR32, 1 /* 0 */ }, |
3573 | | { Feature_FeatureLoadStoreOnCond, 2461 /* locnlh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3574 | | { Feature_FeatureLoadStoreOnCond, 2461 /* locnlh */, MCK_GR32, 1 /* 0 */ }, |
3575 | | { Feature_FeatureLoadStoreOnCond, 2468 /* locno */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3576 | | { Feature_FeatureLoadStoreOnCond, 2468 /* locno */, MCK_GR32, 1 /* 0 */ }, |
3577 | | { Feature_FeatureLoadStoreOnCond, 2474 /* loco */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3578 | | { Feature_FeatureLoadStoreOnCond, 2474 /* loco */, MCK_GR32, 1 /* 0 */ }, |
3579 | | { Feature_FeatureLoadStoreOnCond, 2479 /* locr */, MCK_GR32, 3 /* 0, 1 */ }, |
3580 | | { Feature_FeatureLoadStoreOnCond, 2484 /* locre */, MCK_GR32, 3 /* 0, 1 */ }, |
3581 | | { Feature_FeatureLoadStoreOnCond, 2490 /* locrh */, MCK_GR32, 3 /* 0, 1 */ }, |
3582 | | { Feature_FeatureLoadStoreOnCond, 2496 /* locrhe */, MCK_GR32, 3 /* 0, 1 */ }, |
3583 | | { Feature_FeatureLoadStoreOnCond, 2503 /* locrl */, MCK_GR32, 3 /* 0, 1 */ }, |
3584 | | { Feature_FeatureLoadStoreOnCond, 2509 /* locrle */, MCK_GR32, 3 /* 0, 1 */ }, |
3585 | | { Feature_FeatureLoadStoreOnCond, 2516 /* locrlh */, MCK_GR32, 3 /* 0, 1 */ }, |
3586 | | { Feature_FeatureLoadStoreOnCond, 2523 /* locrne */, MCK_GR32, 3 /* 0, 1 */ }, |
3587 | | { Feature_FeatureLoadStoreOnCond, 2530 /* locrnh */, MCK_GR32, 3 /* 0, 1 */ }, |
3588 | | { Feature_FeatureLoadStoreOnCond, 2537 /* locrnhe */, MCK_GR32, 3 /* 0, 1 */ }, |
3589 | | { Feature_FeatureLoadStoreOnCond, 2545 /* locrnl */, MCK_GR32, 3 /* 0, 1 */ }, |
3590 | | { Feature_FeatureLoadStoreOnCond, 2552 /* locrnle */, MCK_GR32, 3 /* 0, 1 */ }, |
3591 | | { Feature_FeatureLoadStoreOnCond, 2560 /* locrnlh */, MCK_GR32, 3 /* 0, 1 */ }, |
3592 | | { Feature_FeatureLoadStoreOnCond, 2568 /* locrno */, MCK_GR32, 3 /* 0, 1 */ }, |
3593 | | { Feature_FeatureLoadStoreOnCond, 2575 /* locro */, MCK_GR32, 3 /* 0, 1 */ }, |
3594 | | { 0, 2581 /* lpdbr */, MCK_FP64, 3 /* 0, 1 */ }, |
3595 | | { 0, 2587 /* lpdfr */, MCK_FP64, 3 /* 0, 1 */ }, |
3596 | | { 0, 2593 /* lpebr */, MCK_FP32, 3 /* 0, 1 */ }, |
3597 | | { 0, 2599 /* lpgfr */, MCK_GR32, 2 /* 1 */ }, |
3598 | | { 0, 2599 /* lpgfr */, MCK_GR64, 1 /* 0 */ }, |
3599 | | { 0, 2605 /* lpgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3600 | | { 0, 2610 /* lpr */, MCK_GR32, 3 /* 0, 1 */ }, |
3601 | | { 0, 2614 /* lpxbr */, MCK_FP128, 3 /* 0, 1 */ }, |
3602 | | { 0, 2620 /* lr */, MCK_GR32, 3 /* 0, 1 */ }, |
3603 | | { 0, 2623 /* lrl */, MCK_GR32, 1 /* 0 */ }, |
3604 | | { 0, 2623 /* lrl */, MCK_PCRel32, 2 /* 1 */ }, |
3605 | | { 0, 2627 /* lrv */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3606 | | { 0, 2627 /* lrv */, MCK_GR32, 1 /* 0 */ }, |
3607 | | { 0, 2631 /* lrvg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3608 | | { 0, 2631 /* lrvg */, MCK_GR64, 1 /* 0 */ }, |
3609 | | { 0, 2636 /* lrvgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3610 | | { 0, 2642 /* lrvr */, MCK_GR32, 3 /* 0, 1 */ }, |
3611 | | { 0, 2647 /* lt */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3612 | | { 0, 2647 /* lt */, MCK_GR32, 1 /* 0 */ }, |
3613 | | { 0, 2650 /* ltdbr */, MCK_FP64, 3 /* 0, 1 */ }, |
3614 | | { 0, 2656 /* ltebr */, MCK_FP32, 3 /* 0, 1 */ }, |
3615 | | { 0, 2662 /* ltg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3616 | | { 0, 2662 /* ltg */, MCK_GR64, 1 /* 0 */ }, |
3617 | | { 0, 2666 /* ltgf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3618 | | { 0, 2666 /* ltgf */, MCK_GR64, 1 /* 0 */ }, |
3619 | | { 0, 2671 /* ltgfr */, MCK_GR32, 2 /* 1 */ }, |
3620 | | { 0, 2671 /* ltgfr */, MCK_GR64, 1 /* 0 */ }, |
3621 | | { 0, 2677 /* ltgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3622 | | { 0, 2682 /* ltr */, MCK_GR32, 3 /* 0, 1 */ }, |
3623 | | { 0, 2686 /* ltxbr */, MCK_FP128, 3 /* 0, 1 */ }, |
3624 | | { 0, 2692 /* lxdb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3625 | | { 0, 2692 /* lxdb */, MCK_FP128, 1 /* 0 */ }, |
3626 | | { 0, 2697 /* lxdbr */, MCK_FP128, 1 /* 0 */ }, |
3627 | | { 0, 2697 /* lxdbr */, MCK_FP64, 2 /* 1 */ }, |
3628 | | { 0, 2703 /* lxeb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3629 | | { 0, 2703 /* lxeb */, MCK_FP128, 1 /* 0 */ }, |
3630 | | { 0, 2708 /* lxebr */, MCK_FP128, 1 /* 0 */ }, |
3631 | | { 0, 2708 /* lxebr */, MCK_FP32, 2 /* 1 */ }, |
3632 | | { 0, 2714 /* lxr */, MCK_FP128, 3 /* 0, 1 */ }, |
3633 | | { 0, 2718 /* ly */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3634 | | { 0, 2718 /* ly */, MCK_GR32, 1 /* 0 */ }, |
3635 | | { 0, 2721 /* lzdr */, MCK_FP64, 1 /* 0 */ }, |
3636 | | { 0, 2726 /* lzer */, MCK_FP32, 1 /* 0 */ }, |
3637 | | { 0, 2731 /* lzxr */, MCK_FP128, 1 /* 0 */ }, |
3638 | | { 0, 2736 /* madb */, MCK_BDXAddr64Disp12, 4 /* 2 */ }, |
3639 | | { 0, 2736 /* madb */, MCK_FP64, 3 /* 0, 1 */ }, |
3640 | | { 0, 2741 /* madbr */, MCK_FP64, 7 /* 0, 1, 2 */ }, |
3641 | | { 0, 2747 /* maeb */, MCK_BDXAddr64Disp12, 4 /* 2 */ }, |
3642 | | { 0, 2747 /* maeb */, MCK_FP32, 3 /* 0, 1 */ }, |
3643 | | { 0, 2752 /* maebr */, MCK_FP32, 7 /* 0, 1, 2 */ }, |
3644 | | { 0, 2758 /* mdb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3645 | | { 0, 2758 /* mdb */, MCK_FP64, 1 /* 0 */ }, |
3646 | | { 0, 2762 /* mdbr */, MCK_FP64, 3 /* 0, 1 */ }, |
3647 | | { 0, 2767 /* mdeb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3648 | | { 0, 2767 /* mdeb */, MCK_FP64, 1 /* 0 */ }, |
3649 | | { 0, 2772 /* mdebr */, MCK_FP32, 2 /* 1 */ }, |
3650 | | { 0, 2772 /* mdebr */, MCK_FP64, 1 /* 0 */ }, |
3651 | | { 0, 2778 /* meeb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3652 | | { 0, 2778 /* meeb */, MCK_FP32, 1 /* 0 */ }, |
3653 | | { 0, 2783 /* meebr */, MCK_FP32, 3 /* 0, 1 */ }, |
3654 | | { 0, 2789 /* mghi */, MCK_GR64, 1 /* 0 */ }, |
3655 | | { 0, 2794 /* mh */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3656 | | { 0, 2794 /* mh */, MCK_GR32, 1 /* 0 */ }, |
3657 | | { 0, 2797 /* mhi */, MCK_GR32, 1 /* 0 */ }, |
3658 | | { 0, 2801 /* mhy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3659 | | { 0, 2801 /* mhy */, MCK_GR32, 1 /* 0 */ }, |
3660 | | { 0, 2805 /* mlg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3661 | | { 0, 2805 /* mlg */, MCK_GR128, 1 /* 0 */ }, |
3662 | | { 0, 2809 /* mlgr */, MCK_GR128, 1 /* 0 */ }, |
3663 | | { 0, 2809 /* mlgr */, MCK_GR64, 2 /* 1 */ }, |
3664 | | { 0, 2814 /* ms */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3665 | | { 0, 2814 /* ms */, MCK_GR32, 1 /* 0 */ }, |
3666 | | { 0, 2817 /* msdb */, MCK_BDXAddr64Disp12, 4 /* 2 */ }, |
3667 | | { 0, 2817 /* msdb */, MCK_FP64, 3 /* 0, 1 */ }, |
3668 | | { 0, 2822 /* msdbr */, MCK_FP64, 7 /* 0, 1, 2 */ }, |
3669 | | { 0, 2828 /* mseb */, MCK_BDXAddr64Disp12, 4 /* 2 */ }, |
3670 | | { 0, 2828 /* mseb */, MCK_FP32, 3 /* 0, 1 */ }, |
3671 | | { 0, 2833 /* msebr */, MCK_FP32, 7 /* 0, 1, 2 */ }, |
3672 | | { 0, 2839 /* msfi */, MCK_GR32, 1 /* 0 */ }, |
3673 | | { 0, 2844 /* msg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3674 | | { 0, 2844 /* msg */, MCK_GR64, 1 /* 0 */ }, |
3675 | | { 0, 2848 /* msgf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3676 | | { 0, 2848 /* msgf */, MCK_GR64, 1 /* 0 */ }, |
3677 | | { 0, 2853 /* msgfi */, MCK_GR64, 1 /* 0 */ }, |
3678 | | { 0, 2859 /* msgfr */, MCK_GR32, 2 /* 1 */ }, |
3679 | | { 0, 2859 /* msgfr */, MCK_GR64, 1 /* 0 */ }, |
3680 | | { 0, 2865 /* msgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3681 | | { 0, 2870 /* msr */, MCK_GR32, 3 /* 0, 1 */ }, |
3682 | | { 0, 2874 /* msy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3683 | | { 0, 2874 /* msy */, MCK_GR32, 1 /* 0 */ }, |
3684 | | { 0, 2878 /* mvc */, MCK_BDAddr64Disp12, 2 /* 1 */ }, |
3685 | | { 0, 2878 /* mvc */, MCK_BDLAddr64Disp12Len8, 1 /* 0 */ }, |
3686 | | { 0, 2882 /* mvghi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3687 | | { 0, 2888 /* mvhhi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3688 | | { 0, 2894 /* mvhi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3689 | | { 0, 2899 /* mvi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3690 | | { 0, 2903 /* mviy */, MCK_BDAddr64Disp20, 1 /* 0 */ }, |
3691 | | { 0, 2908 /* mvst */, MCK_GR64, 3 /* 0, 1 */ }, |
3692 | | { 0, 2913 /* mxbr */, MCK_FP128, 3 /* 0, 1 */ }, |
3693 | | { 0, 2918 /* mxdb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3694 | | { 0, 2918 /* mxdb */, MCK_FP128, 1 /* 0 */ }, |
3695 | | { 0, 2923 /* mxdbr */, MCK_FP128, 1 /* 0 */ }, |
3696 | | { 0, 2923 /* mxdbr */, MCK_FP64, 2 /* 1 */ }, |
3697 | | { 0, 2929 /* n */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3698 | | { 0, 2929 /* n */, MCK_GR32, 1 /* 0 */ }, |
3699 | | { 0, 2931 /* nc */, MCK_BDAddr64Disp12, 2 /* 1 */ }, |
3700 | | { 0, 2931 /* nc */, MCK_BDLAddr64Disp12Len8, 1 /* 0 */ }, |
3701 | | { 0, 2934 /* ng */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3702 | | { 0, 2934 /* ng */, MCK_GR64, 1 /* 0 */ }, |
3703 | | { 0, 2937 /* ngr */, MCK_GR64, 3 /* 0, 1 */ }, |
3704 | | { Feature_FeatureDistinctOps, 2941 /* ngrk */, MCK_GR64, 7 /* 0, 1, 2 */ }, |
3705 | | { 0, 2946 /* ni */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3706 | | { 0, 2949 /* nihf */, MCK_GRH32, 1 /* 0 */ }, |
3707 | | { 0, 2954 /* nihh */, MCK_GRH32, 1 /* 0 */ }, |
3708 | | { 0, 2959 /* nihl */, MCK_GRH32, 1 /* 0 */ }, |
3709 | | { 0, 2964 /* nilf */, MCK_GR32, 1 /* 0 */ }, |
3710 | | { 0, 2969 /* nilh */, MCK_GR32, 1 /* 0 */ }, |
3711 | | { 0, 2974 /* nill */, MCK_GR32, 1 /* 0 */ }, |
3712 | | { 0, 2979 /* niy */, MCK_BDAddr64Disp20, 1 /* 0 */ }, |
3713 | | { 0, 2983 /* nr */, MCK_GR32, 3 /* 0, 1 */ }, |
3714 | | { Feature_FeatureDistinctOps, 2986 /* nrk */, MCK_GR32, 7 /* 0, 1, 2 */ }, |
3715 | | { Feature_FeatureTransactionalExecution, 2990 /* ntstg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3716 | | { Feature_FeatureTransactionalExecution, 2990 /* ntstg */, MCK_GR64, 1 /* 0 */ }, |
3717 | | { 0, 2996 /* ny */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3718 | | { 0, 2996 /* ny */, MCK_GR32, 1 /* 0 */ }, |
3719 | | { 0, 2999 /* o */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3720 | | { 0, 2999 /* o */, MCK_GR32, 1 /* 0 */ }, |
3721 | | { 0, 3001 /* oc */, MCK_BDAddr64Disp12, 2 /* 1 */ }, |
3722 | | { 0, 3001 /* oc */, MCK_BDLAddr64Disp12Len8, 1 /* 0 */ }, |
3723 | | { 0, 3004 /* og */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3724 | | { 0, 3004 /* og */, MCK_GR64, 1 /* 0 */ }, |
3725 | | { 0, 3007 /* ogr */, MCK_GR64, 3 /* 0, 1 */ }, |
3726 | | { Feature_FeatureDistinctOps, 3011 /* ogrk */, MCK_GR64, 7 /* 0, 1, 2 */ }, |
3727 | | { 0, 3016 /* oi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3728 | | { 0, 3019 /* oihf */, MCK_GRH32, 1 /* 0 */ }, |
3729 | | { 0, 3024 /* oihh */, MCK_GRH32, 1 /* 0 */ }, |
3730 | | { 0, 3029 /* oihl */, MCK_GRH32, 1 /* 0 */ }, |
3731 | | { 0, 3034 /* oilf */, MCK_GR32, 1 /* 0 */ }, |
3732 | | { 0, 3039 /* oilh */, MCK_GR32, 1 /* 0 */ }, |
3733 | | { 0, 3044 /* oill */, MCK_GR32, 1 /* 0 */ }, |
3734 | | { 0, 3049 /* oiy */, MCK_BDAddr64Disp20, 1 /* 0 */ }, |
3735 | | { 0, 3053 /* or */, MCK_GR32, 3 /* 0, 1 */ }, |
3736 | | { Feature_FeatureDistinctOps, 3056 /* ork */, MCK_GR32, 7 /* 0, 1, 2 */ }, |
3737 | | { 0, 3060 /* oy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3738 | | { 0, 3060 /* oy */, MCK_GR32, 1 /* 0 */ }, |
3739 | | { 0, 3063 /* pfd */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3740 | | { 0, 3067 /* pfdrl */, MCK_PCRel32, 2 /* 1 */ }, |
3741 | | { Feature_FeaturePopulationCount, 3073 /* popcnt */, MCK_GR64, 3 /* 0, 1 */ }, |
3742 | | { Feature_FeatureProcessorAssist, 3080 /* ppa */, MCK_GR64, 3 /* 0, 1 */ }, |
3743 | | { 0, 3084 /* risbg */, MCK_GR64, 3 /* 0, 1 */ }, |
3744 | | { Feature_FeatureMiscellaneousExtensions, 3090 /* risbgn */, MCK_GR64, 3 /* 0, 1 */ }, |
3745 | | { Feature_FeatureHighWord, 3097 /* risbhg */, MCK_GR64, 2 /* 1 */ }, |
3746 | | { Feature_FeatureHighWord, 3097 /* risbhg */, MCK_GRH32, 1 /* 0 */ }, |
3747 | | { Feature_FeatureHighWord, 3104 /* risblg */, MCK_GR32, 1 /* 0 */ }, |
3748 | | { Feature_FeatureHighWord, 3104 /* risblg */, MCK_GR64, 2 /* 1 */ }, |
3749 | | { 0, 3111 /* rll */, MCK_BDAddr32Disp20, 4 /* 2 */ }, |
3750 | | { 0, 3111 /* rll */, MCK_GR32, 3 /* 0, 1 */ }, |
3751 | | { 0, 3115 /* rllg */, MCK_BDAddr32Disp20, 4 /* 2 */ }, |
3752 | | { 0, 3115 /* rllg */, MCK_GR64, 3 /* 0, 1 */ }, |
3753 | | { 0, 3120 /* rnsbg */, MCK_GR64, 3 /* 0, 1 */ }, |
3754 | | { 0, 3126 /* rosbg */, MCK_GR64, 3 /* 0, 1 */ }, |
3755 | | { 0, 3132 /* rxsbg */, MCK_GR64, 3 /* 0, 1 */ }, |
3756 | | { 0, 3138 /* s */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3757 | | { 0, 3138 /* s */, MCK_GR32, 1 /* 0 */ }, |
3758 | | { 0, 3140 /* sdb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3759 | | { 0, 3140 /* sdb */, MCK_FP64, 1 /* 0 */ }, |
3760 | | { 0, 3144 /* sdbr */, MCK_FP64, 3 /* 0, 1 */ }, |
3761 | | { 0, 3149 /* seb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3762 | | { 0, 3149 /* seb */, MCK_FP32, 1 /* 0 */ }, |
3763 | | { 0, 3153 /* sebr */, MCK_FP32, 3 /* 0, 1 */ }, |
3764 | | { 0, 3158 /* sg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3765 | | { 0, 3158 /* sg */, MCK_GR64, 1 /* 0 */ }, |
3766 | | { 0, 3161 /* sgf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3767 | | { 0, 3161 /* sgf */, MCK_GR64, 1 /* 0 */ }, |
3768 | | { 0, 3165 /* sgfr */, MCK_GR32, 2 /* 1 */ }, |
3769 | | { 0, 3165 /* sgfr */, MCK_GR64, 1 /* 0 */ }, |
3770 | | { 0, 3170 /* sgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3771 | | { Feature_FeatureDistinctOps, 3174 /* sgrk */, MCK_GR64, 7 /* 0, 1, 2 */ }, |
3772 | | { 0, 3179 /* sh */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3773 | | { 0, 3179 /* sh */, MCK_GR32, 1 /* 0 */ }, |
3774 | | { 0, 3182 /* shy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3775 | | { 0, 3182 /* shy */, MCK_GR32, 1 /* 0 */ }, |
3776 | | { 0, 3186 /* sl */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3777 | | { 0, 3186 /* sl */, MCK_GR32, 1 /* 0 */ }, |
3778 | | { 0, 3189 /* slb */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3779 | | { 0, 3189 /* slb */, MCK_GR32, 1 /* 0 */ }, |
3780 | | { 0, 3193 /* slbg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3781 | | { 0, 3193 /* slbg */, MCK_GR64, 1 /* 0 */ }, |
3782 | | { 0, 3198 /* slbgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3783 | | { 0, 3204 /* slbr */, MCK_GR32, 3 /* 0, 1 */ }, |
3784 | | { 0, 3209 /* slfi */, MCK_GR32, 1 /* 0 */ }, |
3785 | | { 0, 3214 /* slg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3786 | | { 0, 3214 /* slg */, MCK_GR64, 1 /* 0 */ }, |
3787 | | { 0, 3218 /* slgf */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3788 | | { 0, 3218 /* slgf */, MCK_GR64, 1 /* 0 */ }, |
3789 | | { 0, 3223 /* slgfi */, MCK_GR64, 1 /* 0 */ }, |
3790 | | { 0, 3229 /* slgfr */, MCK_GR32, 2 /* 1 */ }, |
3791 | | { 0, 3229 /* slgfr */, MCK_GR64, 1 /* 0 */ }, |
3792 | | { 0, 3235 /* slgr */, MCK_GR64, 3 /* 0, 1 */ }, |
3793 | | { Feature_FeatureDistinctOps, 3240 /* slgrk */, MCK_GR64, 7 /* 0, 1, 2 */ }, |
3794 | | { 0, 3246 /* sll */, MCK_BDAddr32Disp12, 2 /* 1 */ }, |
3795 | | { 0, 3246 /* sll */, MCK_GR32, 1 /* 0 */ }, |
3796 | | { 0, 3250 /* sllg */, MCK_BDAddr32Disp20, 4 /* 2 */ }, |
3797 | | { 0, 3250 /* sllg */, MCK_GR64, 3 /* 0, 1 */ }, |
3798 | | { Feature_FeatureDistinctOps, 3255 /* sllk */, MCK_BDAddr32Disp20, 4 /* 2 */ }, |
3799 | | { Feature_FeatureDistinctOps, 3255 /* sllk */, MCK_GR32, 3 /* 0, 1 */ }, |
3800 | | { 0, 3260 /* slr */, MCK_GR32, 3 /* 0, 1 */ }, |
3801 | | { Feature_FeatureDistinctOps, 3264 /* slrk */, MCK_GR32, 7 /* 0, 1, 2 */ }, |
3802 | | { 0, 3269 /* sly */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3803 | | { 0, 3269 /* sly */, MCK_GR32, 1 /* 0 */ }, |
3804 | | { 0, 3273 /* sqdb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3805 | | { 0, 3273 /* sqdb */, MCK_FP64, 1 /* 0 */ }, |
3806 | | { 0, 3278 /* sqdbr */, MCK_FP64, 3 /* 0, 1 */ }, |
3807 | | { 0, 3284 /* sqeb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3808 | | { 0, 3284 /* sqeb */, MCK_FP32, 1 /* 0 */ }, |
3809 | | { 0, 3289 /* sqebr */, MCK_FP32, 3 /* 0, 1 */ }, |
3810 | | { 0, 3295 /* sqxbr */, MCK_FP128, 3 /* 0, 1 */ }, |
3811 | | { 0, 3301 /* sr */, MCK_GR32, 3 /* 0, 1 */ }, |
3812 | | { 0, 3304 /* sra */, MCK_BDAddr32Disp12, 2 /* 1 */ }, |
3813 | | { 0, 3304 /* sra */, MCK_GR32, 1 /* 0 */ }, |
3814 | | { 0, 3308 /* srag */, MCK_BDAddr32Disp20, 4 /* 2 */ }, |
3815 | | { 0, 3308 /* srag */, MCK_GR64, 3 /* 0, 1 */ }, |
3816 | | { Feature_FeatureDistinctOps, 3313 /* srak */, MCK_BDAddr32Disp20, 4 /* 2 */ }, |
3817 | | { Feature_FeatureDistinctOps, 3313 /* srak */, MCK_GR32, 3 /* 0, 1 */ }, |
3818 | | { Feature_FeatureDistinctOps, 3318 /* srk */, MCK_GR32, 7 /* 0, 1, 2 */ }, |
3819 | | { 0, 3322 /* srl */, MCK_BDAddr32Disp12, 2 /* 1 */ }, |
3820 | | { 0, 3322 /* srl */, MCK_GR32, 1 /* 0 */ }, |
3821 | | { 0, 3326 /* srlg */, MCK_BDAddr32Disp20, 4 /* 2 */ }, |
3822 | | { 0, 3326 /* srlg */, MCK_GR64, 3 /* 0, 1 */ }, |
3823 | | { Feature_FeatureDistinctOps, 3331 /* srlk */, MCK_BDAddr32Disp20, 4 /* 2 */ }, |
3824 | | { Feature_FeatureDistinctOps, 3331 /* srlk */, MCK_GR32, 3 /* 0, 1 */ }, |
3825 | | { 0, 3336 /* srst */, MCK_GR64, 3 /* 0, 1 */ }, |
3826 | | { 0, 3341 /* st */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3827 | | { 0, 3341 /* st */, MCK_GR32, 1 /* 0 */ }, |
3828 | | { 0, 3344 /* stc */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3829 | | { 0, 3344 /* stc */, MCK_GR32, 1 /* 0 */ }, |
3830 | | { Feature_FeatureHighWord, 3348 /* stch */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3831 | | { Feature_FeatureHighWord, 3348 /* stch */, MCK_GRH32, 1 /* 0 */ }, |
3832 | | { 0, 3353 /* stck */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3833 | | { 0, 3358 /* stcke */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3834 | | { 0, 3364 /* stckf */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3835 | | { 0, 3370 /* stcy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3836 | | { 0, 3370 /* stcy */, MCK_GR32, 1 /* 0 */ }, |
3837 | | { 0, 3375 /* std */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3838 | | { 0, 3375 /* std */, MCK_FP64, 1 /* 0 */ }, |
3839 | | { 0, 3379 /* stdy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3840 | | { 0, 3379 /* stdy */, MCK_FP64, 1 /* 0 */ }, |
3841 | | { 0, 3384 /* ste */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3842 | | { 0, 3384 /* ste */, MCK_FP32, 1 /* 0 */ }, |
3843 | | { 0, 3388 /* stey */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3844 | | { 0, 3388 /* stey */, MCK_FP32, 1 /* 0 */ }, |
3845 | | { Feature_FeatureHighWord, 3393 /* stfh */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3846 | | { Feature_FeatureHighWord, 3393 /* stfh */, MCK_GRH32, 1 /* 0 */ }, |
3847 | | { 0, 3398 /* stfle */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3848 | | { 0, 3404 /* stg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3849 | | { 0, 3404 /* stg */, MCK_GR64, 1 /* 0 */ }, |
3850 | | { 0, 3408 /* stgrl */, MCK_GR64, 1 /* 0 */ }, |
3851 | | { 0, 3408 /* stgrl */, MCK_PCRel32, 2 /* 1 */ }, |
3852 | | { 0, 3414 /* sth */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
3853 | | { 0, 3414 /* sth */, MCK_GR32, 1 /* 0 */ }, |
3854 | | { Feature_FeatureHighWord, 3418 /* sthh */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3855 | | { Feature_FeatureHighWord, 3418 /* sthh */, MCK_GRH32, 1 /* 0 */ }, |
3856 | | { 0, 3423 /* sthrl */, MCK_GR32, 1 /* 0 */ }, |
3857 | | { 0, 3423 /* sthrl */, MCK_PCRel32, 2 /* 1 */ }, |
3858 | | { 0, 3429 /* sthy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3859 | | { 0, 3429 /* sthy */, MCK_GR32, 1 /* 0 */ }, |
3860 | | { 0, 3434 /* stmg */, MCK_BDAddr64Disp20, 4 /* 2 */ }, |
3861 | | { 0, 3434 /* stmg */, MCK_GR64, 3 /* 0, 1 */ }, |
3862 | | { Feature_FeatureLoadStoreOnCond, 3439 /* stoc */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3863 | | { Feature_FeatureLoadStoreOnCond, 3439 /* stoc */, MCK_GR32, 1 /* 0 */ }, |
3864 | | { Feature_FeatureLoadStoreOnCond, 3444 /* stoce */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3865 | | { Feature_FeatureLoadStoreOnCond, 3444 /* stoce */, MCK_GR32, 1 /* 0 */ }, |
3866 | | { Feature_FeatureLoadStoreOnCond, 3450 /* stocg */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3867 | | { Feature_FeatureLoadStoreOnCond, 3450 /* stocg */, MCK_GR64, 1 /* 0 */ }, |
3868 | | { Feature_FeatureLoadStoreOnCond, 3456 /* stocge */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3869 | | { Feature_FeatureLoadStoreOnCond, 3456 /* stocge */, MCK_GR64, 1 /* 0 */ }, |
3870 | | { Feature_FeatureLoadStoreOnCond, 3463 /* stocgh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3871 | | { Feature_FeatureLoadStoreOnCond, 3463 /* stocgh */, MCK_GR64, 1 /* 0 */ }, |
3872 | | { Feature_FeatureLoadStoreOnCond, 3470 /* stocghe */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3873 | | { Feature_FeatureLoadStoreOnCond, 3470 /* stocghe */, MCK_GR64, 1 /* 0 */ }, |
3874 | | { Feature_FeatureLoadStoreOnCond, 3478 /* stocgl */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3875 | | { Feature_FeatureLoadStoreOnCond, 3478 /* stocgl */, MCK_GR64, 1 /* 0 */ }, |
3876 | | { Feature_FeatureLoadStoreOnCond, 3485 /* stocgle */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3877 | | { Feature_FeatureLoadStoreOnCond, 3485 /* stocgle */, MCK_GR64, 1 /* 0 */ }, |
3878 | | { Feature_FeatureLoadStoreOnCond, 3493 /* stocglh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3879 | | { Feature_FeatureLoadStoreOnCond, 3493 /* stocglh */, MCK_GR64, 1 /* 0 */ }, |
3880 | | { Feature_FeatureLoadStoreOnCond, 3501 /* stocgne */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3881 | | { Feature_FeatureLoadStoreOnCond, 3501 /* stocgne */, MCK_GR64, 1 /* 0 */ }, |
3882 | | { Feature_FeatureLoadStoreOnCond, 3509 /* stocgnh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3883 | | { Feature_FeatureLoadStoreOnCond, 3509 /* stocgnh */, MCK_GR64, 1 /* 0 */ }, |
3884 | | { Feature_FeatureLoadStoreOnCond, 3517 /* stocgnhe */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3885 | | { Feature_FeatureLoadStoreOnCond, 3517 /* stocgnhe */, MCK_GR64, 1 /* 0 */ }, |
3886 | | { Feature_FeatureLoadStoreOnCond, 3526 /* stocgnl */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3887 | | { Feature_FeatureLoadStoreOnCond, 3526 /* stocgnl */, MCK_GR64, 1 /* 0 */ }, |
3888 | | { Feature_FeatureLoadStoreOnCond, 3534 /* stocgnle */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3889 | | { Feature_FeatureLoadStoreOnCond, 3534 /* stocgnle */, MCK_GR64, 1 /* 0 */ }, |
3890 | | { Feature_FeatureLoadStoreOnCond, 3543 /* stocgnlh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3891 | | { Feature_FeatureLoadStoreOnCond, 3543 /* stocgnlh */, MCK_GR64, 1 /* 0 */ }, |
3892 | | { Feature_FeatureLoadStoreOnCond, 3552 /* stocgno */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3893 | | { Feature_FeatureLoadStoreOnCond, 3552 /* stocgno */, MCK_GR64, 1 /* 0 */ }, |
3894 | | { Feature_FeatureLoadStoreOnCond, 3560 /* stocgo */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3895 | | { Feature_FeatureLoadStoreOnCond, 3560 /* stocgo */, MCK_GR64, 1 /* 0 */ }, |
3896 | | { Feature_FeatureLoadStoreOnCond, 3567 /* stoch */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3897 | | { Feature_FeatureLoadStoreOnCond, 3567 /* stoch */, MCK_GR32, 1 /* 0 */ }, |
3898 | | { Feature_FeatureLoadStoreOnCond, 3573 /* stoche */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3899 | | { Feature_FeatureLoadStoreOnCond, 3573 /* stoche */, MCK_GR32, 1 /* 0 */ }, |
3900 | | { Feature_FeatureLoadStoreOnCond, 3580 /* stocl */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3901 | | { Feature_FeatureLoadStoreOnCond, 3580 /* stocl */, MCK_GR32, 1 /* 0 */ }, |
3902 | | { Feature_FeatureLoadStoreOnCond, 3586 /* stocle */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3903 | | { Feature_FeatureLoadStoreOnCond, 3586 /* stocle */, MCK_GR32, 1 /* 0 */ }, |
3904 | | { Feature_FeatureLoadStoreOnCond, 3593 /* stoclh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3905 | | { Feature_FeatureLoadStoreOnCond, 3593 /* stoclh */, MCK_GR32, 1 /* 0 */ }, |
3906 | | { Feature_FeatureLoadStoreOnCond, 3600 /* stocne */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3907 | | { Feature_FeatureLoadStoreOnCond, 3600 /* stocne */, MCK_GR32, 1 /* 0 */ }, |
3908 | | { Feature_FeatureLoadStoreOnCond, 3607 /* stocnh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3909 | | { Feature_FeatureLoadStoreOnCond, 3607 /* stocnh */, MCK_GR32, 1 /* 0 */ }, |
3910 | | { Feature_FeatureLoadStoreOnCond, 3614 /* stocnhe */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3911 | | { Feature_FeatureLoadStoreOnCond, 3614 /* stocnhe */, MCK_GR32, 1 /* 0 */ }, |
3912 | | { Feature_FeatureLoadStoreOnCond, 3622 /* stocnl */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3913 | | { Feature_FeatureLoadStoreOnCond, 3622 /* stocnl */, MCK_GR32, 1 /* 0 */ }, |
3914 | | { Feature_FeatureLoadStoreOnCond, 3629 /* stocnle */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3915 | | { Feature_FeatureLoadStoreOnCond, 3629 /* stocnle */, MCK_GR32, 1 /* 0 */ }, |
3916 | | { Feature_FeatureLoadStoreOnCond, 3637 /* stocnlh */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3917 | | { Feature_FeatureLoadStoreOnCond, 3637 /* stocnlh */, MCK_GR32, 1 /* 0 */ }, |
3918 | | { Feature_FeatureLoadStoreOnCond, 3645 /* stocno */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3919 | | { Feature_FeatureLoadStoreOnCond, 3645 /* stocno */, MCK_GR32, 1 /* 0 */ }, |
3920 | | { Feature_FeatureLoadStoreOnCond, 3652 /* stoco */, MCK_BDAddr64Disp20, 2 /* 1 */ }, |
3921 | | { Feature_FeatureLoadStoreOnCond, 3652 /* stoco */, MCK_GR32, 1 /* 0 */ }, |
3922 | | { 0, 3658 /* strl */, MCK_GR32, 1 /* 0 */ }, |
3923 | | { 0, 3658 /* strl */, MCK_PCRel32, 2 /* 1 */ }, |
3924 | | { 0, 3663 /* strv */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3925 | | { 0, 3663 /* strv */, MCK_GR32, 1 /* 0 */ }, |
3926 | | { 0, 3668 /* strvg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3927 | | { 0, 3668 /* strvg */, MCK_GR64, 1 /* 0 */ }, |
3928 | | { 0, 3674 /* sty */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3929 | | { 0, 3674 /* sty */, MCK_GR32, 1 /* 0 */ }, |
3930 | | { 0, 3678 /* sxbr */, MCK_FP128, 3 /* 0, 1 */ }, |
3931 | | { 0, 3683 /* sy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
3932 | | { 0, 3683 /* sy */, MCK_GR32, 1 /* 0 */ }, |
3933 | | { Feature_FeatureTransactionalExecution, 3686 /* tabort */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3934 | | { Feature_FeatureTransactionalExecution, 3693 /* tbegin */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3935 | | { Feature_FeatureTransactionalExecution, 3700 /* tbeginc */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3936 | | { 0, 3713 /* tm */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
3937 | | { 0, 3716 /* tmhh */, MCK_GRH32, 1 /* 0 */ }, |
3938 | | { 0, 3721 /* tmhl */, MCK_GRH32, 1 /* 0 */ }, |
3939 | | { 0, 3726 /* tmlh */, MCK_GR32, 1 /* 0 */ }, |
3940 | | { 0, 3731 /* tmll */, MCK_GR32, 1 /* 0 */ }, |
3941 | | { 0, 3736 /* tmy */, MCK_BDAddr64Disp20, 1 /* 0 */ }, |
3942 | | { Feature_FeatureVector, 3740 /* vab */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3943 | | { Feature_FeatureVector, 3744 /* vaccb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3944 | | { Feature_FeatureVector, 3750 /* vacccq */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
3945 | | { Feature_FeatureVector, 3757 /* vaccf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3946 | | { Feature_FeatureVector, 3763 /* vaccg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3947 | | { Feature_FeatureVector, 3769 /* vacch */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3948 | | { Feature_FeatureVector, 3775 /* vaccq */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3949 | | { Feature_FeatureVector, 3781 /* vacq */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
3950 | | { Feature_FeatureVector, 3786 /* vaf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3951 | | { Feature_FeatureVector, 3790 /* vag */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3952 | | { Feature_FeatureVector, 3794 /* vah */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3953 | | { Feature_FeatureVector, 3798 /* vaq */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3954 | | { Feature_FeatureVector, 3802 /* vavgb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3955 | | { Feature_FeatureVector, 3808 /* vavgf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3956 | | { Feature_FeatureVector, 3814 /* vavgg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3957 | | { Feature_FeatureVector, 3820 /* vavgh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3958 | | { Feature_FeatureVector, 3826 /* vavglb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3959 | | { Feature_FeatureVector, 3833 /* vavglf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3960 | | { Feature_FeatureVector, 3840 /* vavglg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3961 | | { Feature_FeatureVector, 3847 /* vavglh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3962 | | { Feature_FeatureVector, 3854 /* vcdgb */, MCK_VR128, 3 /* 0, 1 */ }, |
3963 | | { Feature_FeatureVector, 3860 /* vcdlgb */, MCK_VR128, 3 /* 0, 1 */ }, |
3964 | | { Feature_FeatureVector, 3867 /* vceqb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3965 | | { Feature_FeatureVector, 3873 /* vceqbs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3966 | | { Feature_FeatureVector, 3880 /* vceqf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3967 | | { Feature_FeatureVector, 3886 /* vceqfs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3968 | | { Feature_FeatureVector, 3893 /* vceqg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3969 | | { Feature_FeatureVector, 3899 /* vceqgs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3970 | | { Feature_FeatureVector, 3906 /* vceqh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3971 | | { Feature_FeatureVector, 3912 /* vceqhs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3972 | | { Feature_FeatureVector, 3919 /* vcgdb */, MCK_VR128, 3 /* 0, 1 */ }, |
3973 | | { Feature_FeatureVector, 3925 /* vchb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3974 | | { Feature_FeatureVector, 3930 /* vchbs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3975 | | { Feature_FeatureVector, 3936 /* vchf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3976 | | { Feature_FeatureVector, 3941 /* vchfs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3977 | | { Feature_FeatureVector, 3947 /* vchg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3978 | | { Feature_FeatureVector, 3952 /* vchgs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3979 | | { Feature_FeatureVector, 3958 /* vchh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3980 | | { Feature_FeatureVector, 3963 /* vchhs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3981 | | { Feature_FeatureVector, 3969 /* vchlb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3982 | | { Feature_FeatureVector, 3975 /* vchlbs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3983 | | { Feature_FeatureVector, 3982 /* vchlf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3984 | | { Feature_FeatureVector, 3988 /* vchlfs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3985 | | { Feature_FeatureVector, 3995 /* vchlg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3986 | | { Feature_FeatureVector, 4001 /* vchlgs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3987 | | { Feature_FeatureVector, 4008 /* vchlh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3988 | | { Feature_FeatureVector, 4014 /* vchlhs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3989 | | { Feature_FeatureVector, 4021 /* vcksm */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
3990 | | { Feature_FeatureVector, 4027 /* vclgdb */, MCK_VR128, 3 /* 0, 1 */ }, |
3991 | | { Feature_FeatureVector, 4034 /* vclzb */, MCK_VR128, 3 /* 0, 1 */ }, |
3992 | | { Feature_FeatureVector, 4040 /* vclzf */, MCK_VR128, 3 /* 0, 1 */ }, |
3993 | | { Feature_FeatureVector, 4046 /* vclzg */, MCK_VR128, 3 /* 0, 1 */ }, |
3994 | | { Feature_FeatureVector, 4052 /* vclzh */, MCK_VR128, 3 /* 0, 1 */ }, |
3995 | | { Feature_FeatureVector, 4058 /* vctzb */, MCK_VR128, 3 /* 0, 1 */ }, |
3996 | | { Feature_FeatureVector, 4064 /* vctzf */, MCK_VR128, 3 /* 0, 1 */ }, |
3997 | | { Feature_FeatureVector, 4070 /* vctzg */, MCK_VR128, 3 /* 0, 1 */ }, |
3998 | | { Feature_FeatureVector, 4076 /* vctzh */, MCK_VR128, 3 /* 0, 1 */ }, |
3999 | | { Feature_FeatureVector, 4082 /* vecb */, MCK_VR128, 3 /* 0, 1 */ }, |
4000 | | { Feature_FeatureVector, 4087 /* vecf */, MCK_VR128, 3 /* 0, 1 */ }, |
4001 | | { Feature_FeatureVector, 4092 /* vecg */, MCK_VR128, 3 /* 0, 1 */ }, |
4002 | | { Feature_FeatureVector, 4097 /* vech */, MCK_VR128, 3 /* 0, 1 */ }, |
4003 | | { Feature_FeatureVector, 4102 /* veclb */, MCK_VR128, 3 /* 0, 1 */ }, |
4004 | | { Feature_FeatureVector, 4108 /* veclf */, MCK_VR128, 3 /* 0, 1 */ }, |
4005 | | { Feature_FeatureVector, 4114 /* veclg */, MCK_VR128, 3 /* 0, 1 */ }, |
4006 | | { Feature_FeatureVector, 4120 /* veclh */, MCK_VR128, 3 /* 0, 1 */ }, |
4007 | | { Feature_FeatureVector, 4126 /* verimb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4008 | | { Feature_FeatureVector, 4133 /* verimf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4009 | | { Feature_FeatureVector, 4140 /* verimg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4010 | | { Feature_FeatureVector, 4147 /* verimh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4011 | | { Feature_FeatureVector, 4154 /* verllb */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4012 | | { Feature_FeatureVector, 4154 /* verllb */, MCK_VR128, 3 /* 0, 1 */ }, |
4013 | | { Feature_FeatureVector, 4161 /* verllf */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4014 | | { Feature_FeatureVector, 4161 /* verllf */, MCK_VR128, 3 /* 0, 1 */ }, |
4015 | | { Feature_FeatureVector, 4168 /* verllg */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4016 | | { Feature_FeatureVector, 4168 /* verllg */, MCK_VR128, 3 /* 0, 1 */ }, |
4017 | | { Feature_FeatureVector, 4175 /* verllh */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4018 | | { Feature_FeatureVector, 4175 /* verllh */, MCK_VR128, 3 /* 0, 1 */ }, |
4019 | | { Feature_FeatureVector, 4182 /* verllvb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4020 | | { Feature_FeatureVector, 4190 /* verllvf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4021 | | { Feature_FeatureVector, 4198 /* verllvg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4022 | | { Feature_FeatureVector, 4206 /* verllvh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4023 | | { Feature_FeatureVector, 4214 /* veslb */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4024 | | { Feature_FeatureVector, 4214 /* veslb */, MCK_VR128, 3 /* 0, 1 */ }, |
4025 | | { Feature_FeatureVector, 4220 /* veslf */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4026 | | { Feature_FeatureVector, 4220 /* veslf */, MCK_VR128, 3 /* 0, 1 */ }, |
4027 | | { Feature_FeatureVector, 4226 /* veslg */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4028 | | { Feature_FeatureVector, 4226 /* veslg */, MCK_VR128, 3 /* 0, 1 */ }, |
4029 | | { Feature_FeatureVector, 4232 /* veslh */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4030 | | { Feature_FeatureVector, 4232 /* veslh */, MCK_VR128, 3 /* 0, 1 */ }, |
4031 | | { Feature_FeatureVector, 4238 /* veslvb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4032 | | { Feature_FeatureVector, 4245 /* veslvf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4033 | | { Feature_FeatureVector, 4252 /* veslvg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4034 | | { Feature_FeatureVector, 4259 /* veslvh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4035 | | { Feature_FeatureVector, 4266 /* vesrab */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4036 | | { Feature_FeatureVector, 4266 /* vesrab */, MCK_VR128, 3 /* 0, 1 */ }, |
4037 | | { Feature_FeatureVector, 4273 /* vesraf */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4038 | | { Feature_FeatureVector, 4273 /* vesraf */, MCK_VR128, 3 /* 0, 1 */ }, |
4039 | | { Feature_FeatureVector, 4280 /* vesrag */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4040 | | { Feature_FeatureVector, 4280 /* vesrag */, MCK_VR128, 3 /* 0, 1 */ }, |
4041 | | { Feature_FeatureVector, 4287 /* vesrah */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4042 | | { Feature_FeatureVector, 4287 /* vesrah */, MCK_VR128, 3 /* 0, 1 */ }, |
4043 | | { Feature_FeatureVector, 4294 /* vesravb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4044 | | { Feature_FeatureVector, 4302 /* vesravf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4045 | | { Feature_FeatureVector, 4310 /* vesravg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4046 | | { Feature_FeatureVector, 4318 /* vesravh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4047 | | { Feature_FeatureVector, 4326 /* vesrlb */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4048 | | { Feature_FeatureVector, 4326 /* vesrlb */, MCK_VR128, 3 /* 0, 1 */ }, |
4049 | | { Feature_FeatureVector, 4333 /* vesrlf */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4050 | | { Feature_FeatureVector, 4333 /* vesrlf */, MCK_VR128, 3 /* 0, 1 */ }, |
4051 | | { Feature_FeatureVector, 4340 /* vesrlg */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4052 | | { Feature_FeatureVector, 4340 /* vesrlg */, MCK_VR128, 3 /* 0, 1 */ }, |
4053 | | { Feature_FeatureVector, 4347 /* vesrlh */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4054 | | { Feature_FeatureVector, 4347 /* vesrlh */, MCK_VR128, 3 /* 0, 1 */ }, |
4055 | | { Feature_FeatureVector, 4354 /* vesrlvb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4056 | | { Feature_FeatureVector, 4362 /* vesrlvf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4057 | | { Feature_FeatureVector, 4370 /* vesrlvg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4058 | | { Feature_FeatureVector, 4378 /* vesrlvh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4059 | | { Feature_FeatureVector, 4386 /* vfadb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4060 | | { Feature_FeatureVector, 4392 /* vfaeb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4061 | | { Feature_FeatureVector, 4392 /* vfaeb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4062 | | { Feature_FeatureVector, 4398 /* vfaebs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4063 | | { Feature_FeatureVector, 4398 /* vfaebs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4064 | | { Feature_FeatureVector, 4405 /* vfaef */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4065 | | { Feature_FeatureVector, 4405 /* vfaef */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4066 | | { Feature_FeatureVector, 4411 /* vfaefs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4067 | | { Feature_FeatureVector, 4411 /* vfaefs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4068 | | { Feature_FeatureVector, 4418 /* vfaeh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4069 | | { Feature_FeatureVector, 4418 /* vfaeh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4070 | | { Feature_FeatureVector, 4424 /* vfaehs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4071 | | { Feature_FeatureVector, 4424 /* vfaehs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4072 | | { Feature_FeatureVector, 4431 /* vfaezb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4073 | | { Feature_FeatureVector, 4431 /* vfaezb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4074 | | { Feature_FeatureVector, 4438 /* vfaezbs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4075 | | { Feature_FeatureVector, 4438 /* vfaezbs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4076 | | { Feature_FeatureVector, 4446 /* vfaezf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4077 | | { Feature_FeatureVector, 4446 /* vfaezf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4078 | | { Feature_FeatureVector, 4453 /* vfaezfs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4079 | | { Feature_FeatureVector, 4453 /* vfaezfs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4080 | | { Feature_FeatureVector, 4461 /* vfaezh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4081 | | { Feature_FeatureVector, 4461 /* vfaezh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4082 | | { Feature_FeatureVector, 4468 /* vfaezhs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4083 | | { Feature_FeatureVector, 4468 /* vfaezhs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4084 | | { Feature_FeatureVector, 4476 /* vfcedb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4085 | | { Feature_FeatureVector, 4483 /* vfcedbs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4086 | | { Feature_FeatureVector, 4491 /* vfchdb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4087 | | { Feature_FeatureVector, 4498 /* vfchdbs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4088 | | { Feature_FeatureVector, 4506 /* vfchedb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4089 | | { Feature_FeatureVector, 4514 /* vfchedbs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4090 | | { Feature_FeatureVector, 4523 /* vfddb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4091 | | { Feature_FeatureVector, 4529 /* vfeeb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4092 | | { Feature_FeatureVector, 4535 /* vfeebs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4093 | | { Feature_FeatureVector, 4542 /* vfeef */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4094 | | { Feature_FeatureVector, 4548 /* vfeefs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4095 | | { Feature_FeatureVector, 4555 /* vfeeh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4096 | | { Feature_FeatureVector, 4561 /* vfeehs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4097 | | { Feature_FeatureVector, 4568 /* vfeezb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4098 | | { Feature_FeatureVector, 4575 /* vfeezbs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4099 | | { Feature_FeatureVector, 4583 /* vfeezf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4100 | | { Feature_FeatureVector, 4590 /* vfeezfs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4101 | | { Feature_FeatureVector, 4598 /* vfeezh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4102 | | { Feature_FeatureVector, 4605 /* vfeezhs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4103 | | { Feature_FeatureVector, 4613 /* vfeneb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4104 | | { Feature_FeatureVector, 4620 /* vfenebs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4105 | | { Feature_FeatureVector, 4628 /* vfenef */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4106 | | { Feature_FeatureVector, 4635 /* vfenefs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4107 | | { Feature_FeatureVector, 4643 /* vfeneh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4108 | | { Feature_FeatureVector, 4650 /* vfenehs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4109 | | { Feature_FeatureVector, 4658 /* vfenezb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4110 | | { Feature_FeatureVector, 4666 /* vfenezbs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4111 | | { Feature_FeatureVector, 4675 /* vfenezf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4112 | | { Feature_FeatureVector, 4683 /* vfenezfs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4113 | | { Feature_FeatureVector, 4692 /* vfenezh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4114 | | { Feature_FeatureVector, 4700 /* vfenezhs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4115 | | { Feature_FeatureVector, 4709 /* vfidb */, MCK_VR128, 3 /* 0, 1 */ }, |
4116 | | { Feature_FeatureVector, 4715 /* vflcdb */, MCK_VR128, 3 /* 0, 1 */ }, |
4117 | | { Feature_FeatureVector, 4722 /* vflndb */, MCK_VR128, 3 /* 0, 1 */ }, |
4118 | | { Feature_FeatureVector, 4729 /* vflpdb */, MCK_VR128, 3 /* 0, 1 */ }, |
4119 | | { Feature_FeatureVector, 4736 /* vfmadb */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4120 | | { Feature_FeatureVector, 4743 /* vfmdb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4121 | | { Feature_FeatureVector, 4749 /* vfmsdb */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4122 | | { Feature_FeatureVector, 4756 /* vfsdb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4123 | | { Feature_FeatureVector, 4762 /* vfsqdb */, MCK_VR128, 3 /* 0, 1 */ }, |
4124 | | { Feature_FeatureVector, 4769 /* vftcidb */, MCK_VR128, 3 /* 0, 1 */ }, |
4125 | | { Feature_FeatureVector, 4777 /* vgbm */, MCK_VR128, 1 /* 0 */ }, |
4126 | | { Feature_FeatureVector, 4782 /* vgef */, MCK_BDVAddr64Disp12, 2 /* 1 */ }, |
4127 | | { Feature_FeatureVector, 4782 /* vgef */, MCK_VR128, 1 /* 0 */ }, |
4128 | | { Feature_FeatureVector, 4787 /* vgeg */, MCK_BDVAddr64Disp12, 2 /* 1 */ }, |
4129 | | { Feature_FeatureVector, 4787 /* vgeg */, MCK_VR128, 1 /* 0 */ }, |
4130 | | { Feature_FeatureVector, 4792 /* vgfmab */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4131 | | { Feature_FeatureVector, 4799 /* vgfmaf */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4132 | | { Feature_FeatureVector, 4806 /* vgfmag */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4133 | | { Feature_FeatureVector, 4813 /* vgfmah */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4134 | | { Feature_FeatureVector, 4820 /* vgfmb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4135 | | { Feature_FeatureVector, 4826 /* vgfmf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4136 | | { Feature_FeatureVector, 4832 /* vgfmg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4137 | | { Feature_FeatureVector, 4838 /* vgfmh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4138 | | { Feature_FeatureVector, 4844 /* vgmb */, MCK_VR128, 1 /* 0 */ }, |
4139 | | { Feature_FeatureVector, 4849 /* vgmf */, MCK_VR128, 1 /* 0 */ }, |
4140 | | { Feature_FeatureVector, 4854 /* vgmg */, MCK_VR128, 1 /* 0 */ }, |
4141 | | { Feature_FeatureVector, 4859 /* vgmh */, MCK_VR128, 1 /* 0 */ }, |
4142 | | { Feature_FeatureVector, 4864 /* vistrb */, MCK_VR128, 3 /* 0, 1 */ }, |
4143 | | { Feature_FeatureVector, 4871 /* vistrbs */, MCK_VR128, 3 /* 0, 1 */ }, |
4144 | | { Feature_FeatureVector, 4879 /* vistrf */, MCK_VR128, 3 /* 0, 1 */ }, |
4145 | | { Feature_FeatureVector, 4886 /* vistrfs */, MCK_VR128, 3 /* 0, 1 */ }, |
4146 | | { Feature_FeatureVector, 4894 /* vistrh */, MCK_VR128, 3 /* 0, 1 */ }, |
4147 | | { Feature_FeatureVector, 4901 /* vistrhs */, MCK_VR128, 3 /* 0, 1 */ }, |
4148 | | { Feature_FeatureVector, 4909 /* vl */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4149 | | { Feature_FeatureVector, 4909 /* vl */, MCK_VR128, 1 /* 0 */ }, |
4150 | | { Feature_FeatureVector, 4912 /* vlbb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4151 | | { Feature_FeatureVector, 4912 /* vlbb */, MCK_VR128, 1 /* 0 */ }, |
4152 | | { Feature_FeatureVector, 4917 /* vlcb */, MCK_VR128, 3 /* 0, 1 */ }, |
4153 | | { Feature_FeatureVector, 4922 /* vlcf */, MCK_VR128, 3 /* 0, 1 */ }, |
4154 | | { Feature_FeatureVector, 4927 /* vlcg */, MCK_VR128, 3 /* 0, 1 */ }, |
4155 | | { Feature_FeatureVector, 4932 /* vlch */, MCK_VR128, 3 /* 0, 1 */ }, |
4156 | | { Feature_FeatureVector, 4937 /* vldeb */, MCK_VR128, 3 /* 0, 1 */ }, |
4157 | | { Feature_FeatureVector, 4943 /* vleb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4158 | | { Feature_FeatureVector, 4943 /* vleb */, MCK_VR128, 1 /* 0 */ }, |
4159 | | { Feature_FeatureVector, 4948 /* vledb */, MCK_VR128, 3 /* 0, 1 */ }, |
4160 | | { Feature_FeatureVector, 4954 /* vlef */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4161 | | { Feature_FeatureVector, 4954 /* vlef */, MCK_VR128, 1 /* 0 */ }, |
4162 | | { Feature_FeatureVector, 4959 /* vleg */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4163 | | { Feature_FeatureVector, 4959 /* vleg */, MCK_VR128, 1 /* 0 */ }, |
4164 | | { Feature_FeatureVector, 4964 /* vleh */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4165 | | { Feature_FeatureVector, 4964 /* vleh */, MCK_VR128, 1 /* 0 */ }, |
4166 | | { Feature_FeatureVector, 4969 /* vleib */, MCK_VR128, 1 /* 0 */ }, |
4167 | | { Feature_FeatureVector, 4975 /* vleif */, MCK_VR128, 1 /* 0 */ }, |
4168 | | { Feature_FeatureVector, 4981 /* vleig */, MCK_VR128, 1 /* 0 */ }, |
4169 | | { Feature_FeatureVector, 4987 /* vleih */, MCK_VR128, 1 /* 0 */ }, |
4170 | | { Feature_FeatureVector, 4993 /* vlgvb */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4171 | | { Feature_FeatureVector, 4993 /* vlgvb */, MCK_GR64, 1 /* 0 */ }, |
4172 | | { Feature_FeatureVector, 4993 /* vlgvb */, MCK_VR128, 2 /* 1 */ }, |
4173 | | { Feature_FeatureVector, 4999 /* vlgvf */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4174 | | { Feature_FeatureVector, 4999 /* vlgvf */, MCK_GR64, 1 /* 0 */ }, |
4175 | | { Feature_FeatureVector, 4999 /* vlgvf */, MCK_VR128, 2 /* 1 */ }, |
4176 | | { Feature_FeatureVector, 5005 /* vlgvg */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4177 | | { Feature_FeatureVector, 5005 /* vlgvg */, MCK_GR64, 1 /* 0 */ }, |
4178 | | { Feature_FeatureVector, 5005 /* vlgvg */, MCK_VR128, 2 /* 1 */ }, |
4179 | | { Feature_FeatureVector, 5011 /* vlgvh */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4180 | | { Feature_FeatureVector, 5011 /* vlgvh */, MCK_GR64, 1 /* 0 */ }, |
4181 | | { Feature_FeatureVector, 5011 /* vlgvh */, MCK_VR128, 2 /* 1 */ }, |
4182 | | { Feature_FeatureVector, 5017 /* vll */, MCK_BDAddr64Disp12, 4 /* 2 */ }, |
4183 | | { Feature_FeatureVector, 5017 /* vll */, MCK_GR32, 2 /* 1 */ }, |
4184 | | { Feature_FeatureVector, 5017 /* vll */, MCK_VR128, 1 /* 0 */ }, |
4185 | | { Feature_FeatureVector, 5021 /* vllezb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4186 | | { Feature_FeatureVector, 5021 /* vllezb */, MCK_VR128, 1 /* 0 */ }, |
4187 | | { Feature_FeatureVector, 5028 /* vllezf */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4188 | | { Feature_FeatureVector, 5028 /* vllezf */, MCK_VR128, 1 /* 0 */ }, |
4189 | | { Feature_FeatureVector, 5035 /* vllezg */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4190 | | { Feature_FeatureVector, 5035 /* vllezg */, MCK_VR128, 1 /* 0 */ }, |
4191 | | { Feature_FeatureVector, 5042 /* vllezh */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4192 | | { Feature_FeatureVector, 5042 /* vllezh */, MCK_VR128, 1 /* 0 */ }, |
4193 | | { Feature_FeatureVector, 5049 /* vlm */, MCK_BDAddr64Disp12, 4 /* 2 */ }, |
4194 | | { Feature_FeatureVector, 5049 /* vlm */, MCK_VR128, 3 /* 0, 1 */ }, |
4195 | | { Feature_FeatureVector, 5053 /* vlpb */, MCK_VR128, 3 /* 0, 1 */ }, |
4196 | | { Feature_FeatureVector, 5058 /* vlpf */, MCK_VR128, 3 /* 0, 1 */ }, |
4197 | | { Feature_FeatureVector, 5063 /* vlpg */, MCK_VR128, 3 /* 0, 1 */ }, |
4198 | | { Feature_FeatureVector, 5068 /* vlph */, MCK_VR128, 3 /* 0, 1 */ }, |
4199 | | { Feature_FeatureVector, 5073 /* vlr */, MCK_VR128, 3 /* 0, 1 */ }, |
4200 | | { Feature_FeatureVector, 5077 /* vlrepb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4201 | | { Feature_FeatureVector, 5077 /* vlrepb */, MCK_VR128, 1 /* 0 */ }, |
4202 | | { Feature_FeatureVector, 5084 /* vlrepf */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4203 | | { Feature_FeatureVector, 5084 /* vlrepf */, MCK_VR128, 1 /* 0 */ }, |
4204 | | { Feature_FeatureVector, 5091 /* vlrepg */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4205 | | { Feature_FeatureVector, 5091 /* vlrepg */, MCK_VR128, 1 /* 0 */ }, |
4206 | | { Feature_FeatureVector, 5098 /* vlreph */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4207 | | { Feature_FeatureVector, 5098 /* vlreph */, MCK_VR128, 1 /* 0 */ }, |
4208 | | { Feature_FeatureVector, 5105 /* vlvgb */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4209 | | { Feature_FeatureVector, 5105 /* vlvgb */, MCK_GR32, 2 /* 1 */ }, |
4210 | | { Feature_FeatureVector, 5105 /* vlvgb */, MCK_VR128, 1 /* 0 */ }, |
4211 | | { Feature_FeatureVector, 5111 /* vlvgf */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4212 | | { Feature_FeatureVector, 5111 /* vlvgf */, MCK_GR32, 2 /* 1 */ }, |
4213 | | { Feature_FeatureVector, 5111 /* vlvgf */, MCK_VR128, 1 /* 0 */ }, |
4214 | | { Feature_FeatureVector, 5117 /* vlvgg */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4215 | | { Feature_FeatureVector, 5117 /* vlvgg */, MCK_GR64, 2 /* 1 */ }, |
4216 | | { Feature_FeatureVector, 5117 /* vlvgg */, MCK_VR128, 1 /* 0 */ }, |
4217 | | { Feature_FeatureVector, 5123 /* vlvgh */, MCK_BDAddr32Disp12, 4 /* 2 */ }, |
4218 | | { Feature_FeatureVector, 5123 /* vlvgh */, MCK_GR32, 2 /* 1 */ }, |
4219 | | { Feature_FeatureVector, 5123 /* vlvgh */, MCK_VR128, 1 /* 0 */ }, |
4220 | | { Feature_FeatureVector, 5129 /* vlvgp */, MCK_GR64, 6 /* 1, 2 */ }, |
4221 | | { Feature_FeatureVector, 5129 /* vlvgp */, MCK_VR128, 1 /* 0 */ }, |
4222 | | { Feature_FeatureVector, 5135 /* vmaeb */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4223 | | { Feature_FeatureVector, 5141 /* vmaef */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4224 | | { Feature_FeatureVector, 5147 /* vmaeh */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4225 | | { Feature_FeatureVector, 5153 /* vmahb */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4226 | | { Feature_FeatureVector, 5159 /* vmahf */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4227 | | { Feature_FeatureVector, 5165 /* vmahh */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4228 | | { Feature_FeatureVector, 5171 /* vmalb */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4229 | | { Feature_FeatureVector, 5177 /* vmaleb */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4230 | | { Feature_FeatureVector, 5184 /* vmalef */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4231 | | { Feature_FeatureVector, 5191 /* vmaleh */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4232 | | { Feature_FeatureVector, 5198 /* vmalf */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4233 | | { Feature_FeatureVector, 5204 /* vmalhb */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4234 | | { Feature_FeatureVector, 5211 /* vmalhf */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4235 | | { Feature_FeatureVector, 5218 /* vmalhh */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4236 | | { Feature_FeatureVector, 5225 /* vmalhw */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4237 | | { Feature_FeatureVector, 5232 /* vmalob */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4238 | | { Feature_FeatureVector, 5239 /* vmalof */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4239 | | { Feature_FeatureVector, 5246 /* vmaloh */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4240 | | { Feature_FeatureVector, 5253 /* vmaob */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4241 | | { Feature_FeatureVector, 5259 /* vmaof */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4242 | | { Feature_FeatureVector, 5265 /* vmaoh */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4243 | | { Feature_FeatureVector, 5271 /* vmeb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4244 | | { Feature_FeatureVector, 5276 /* vmef */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4245 | | { Feature_FeatureVector, 5281 /* vmeh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4246 | | { Feature_FeatureVector, 5286 /* vmhb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4247 | | { Feature_FeatureVector, 5291 /* vmhf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4248 | | { Feature_FeatureVector, 5296 /* vmhh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4249 | | { Feature_FeatureVector, 5301 /* vmlb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4250 | | { Feature_FeatureVector, 5306 /* vmleb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4251 | | { Feature_FeatureVector, 5312 /* vmlef */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4252 | | { Feature_FeatureVector, 5318 /* vmleh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4253 | | { Feature_FeatureVector, 5324 /* vmlf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4254 | | { Feature_FeatureVector, 5329 /* vmlhb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4255 | | { Feature_FeatureVector, 5335 /* vmlhf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4256 | | { Feature_FeatureVector, 5341 /* vmlhh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4257 | | { Feature_FeatureVector, 5347 /* vmlhw */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4258 | | { Feature_FeatureVector, 5353 /* vmlob */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4259 | | { Feature_FeatureVector, 5359 /* vmlof */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4260 | | { Feature_FeatureVector, 5365 /* vmloh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4261 | | { Feature_FeatureVector, 5371 /* vmnb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4262 | | { Feature_FeatureVector, 5376 /* vmnf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4263 | | { Feature_FeatureVector, 5381 /* vmng */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4264 | | { Feature_FeatureVector, 5386 /* vmnh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4265 | | { Feature_FeatureVector, 5391 /* vmnlb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4266 | | { Feature_FeatureVector, 5397 /* vmnlf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4267 | | { Feature_FeatureVector, 5403 /* vmnlg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4268 | | { Feature_FeatureVector, 5409 /* vmnlh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4269 | | { Feature_FeatureVector, 5415 /* vmob */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4270 | | { Feature_FeatureVector, 5420 /* vmof */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4271 | | { Feature_FeatureVector, 5425 /* vmoh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4272 | | { Feature_FeatureVector, 5430 /* vmrhb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4273 | | { Feature_FeatureVector, 5436 /* vmrhf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4274 | | { Feature_FeatureVector, 5442 /* vmrhg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4275 | | { Feature_FeatureVector, 5448 /* vmrhh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4276 | | { Feature_FeatureVector, 5454 /* vmrlb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4277 | | { Feature_FeatureVector, 5460 /* vmrlf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4278 | | { Feature_FeatureVector, 5466 /* vmrlg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4279 | | { Feature_FeatureVector, 5472 /* vmrlh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4280 | | { Feature_FeatureVector, 5478 /* vmxb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4281 | | { Feature_FeatureVector, 5483 /* vmxf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4282 | | { Feature_FeatureVector, 5488 /* vmxg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4283 | | { Feature_FeatureVector, 5493 /* vmxh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4284 | | { Feature_FeatureVector, 5498 /* vmxlb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4285 | | { Feature_FeatureVector, 5504 /* vmxlf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4286 | | { Feature_FeatureVector, 5510 /* vmxlg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4287 | | { Feature_FeatureVector, 5516 /* vmxlh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4288 | | { Feature_FeatureVector, 5522 /* vn */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4289 | | { Feature_FeatureVector, 5525 /* vnc */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4290 | | { Feature_FeatureVector, 5529 /* vno */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4291 | | { Feature_FeatureVector, 5533 /* vo */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4292 | | { Feature_FeatureVector, 5536 /* vone */, MCK_VR128, 1 /* 0 */ }, |
4293 | | { Feature_FeatureVector, 5541 /* vpdi */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4294 | | { Feature_FeatureVector, 5546 /* vperm */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4295 | | { Feature_FeatureVector, 5552 /* vpkf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4296 | | { Feature_FeatureVector, 5557 /* vpkg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4297 | | { Feature_FeatureVector, 5562 /* vpkh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4298 | | { Feature_FeatureVector, 5567 /* vpklsf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4299 | | { Feature_FeatureVector, 5574 /* vpklsfs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4300 | | { Feature_FeatureVector, 5582 /* vpklsg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4301 | | { Feature_FeatureVector, 5589 /* vpklsgs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4302 | | { Feature_FeatureVector, 5597 /* vpklsh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4303 | | { Feature_FeatureVector, 5604 /* vpklshs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4304 | | { Feature_FeatureVector, 5612 /* vpksf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4305 | | { Feature_FeatureVector, 5618 /* vpksfs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4306 | | { Feature_FeatureVector, 5625 /* vpksg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4307 | | { Feature_FeatureVector, 5631 /* vpksgs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4308 | | { Feature_FeatureVector, 5638 /* vpksh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4309 | | { Feature_FeatureVector, 5644 /* vpkshs */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4310 | | { Feature_FeatureVector, 5651 /* vpopct */, MCK_VR128, 3 /* 0, 1 */ }, |
4311 | | { Feature_FeatureVector, 5658 /* vrepb */, MCK_VR128, 3 /* 0, 1 */ }, |
4312 | | { Feature_FeatureVector, 5664 /* vrepf */, MCK_VR128, 3 /* 0, 1 */ }, |
4313 | | { Feature_FeatureVector, 5670 /* vrepg */, MCK_VR128, 3 /* 0, 1 */ }, |
4314 | | { Feature_FeatureVector, 5676 /* vreph */, MCK_VR128, 3 /* 0, 1 */ }, |
4315 | | { Feature_FeatureVector, 5682 /* vrepib */, MCK_VR128, 1 /* 0 */ }, |
4316 | | { Feature_FeatureVector, 5689 /* vrepif */, MCK_VR128, 1 /* 0 */ }, |
4317 | | { Feature_FeatureVector, 5696 /* vrepig */, MCK_VR128, 1 /* 0 */ }, |
4318 | | { Feature_FeatureVector, 5703 /* vrepih */, MCK_VR128, 1 /* 0 */ }, |
4319 | | { Feature_FeatureVector, 5710 /* vsb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4320 | | { Feature_FeatureVector, 5714 /* vsbcbiq */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4321 | | { Feature_FeatureVector, 5722 /* vsbiq */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4322 | | { Feature_FeatureVector, 5728 /* vscbib */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4323 | | { Feature_FeatureVector, 5735 /* vscbif */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4324 | | { Feature_FeatureVector, 5742 /* vscbig */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4325 | | { Feature_FeatureVector, 5749 /* vscbih */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4326 | | { Feature_FeatureVector, 5756 /* vscbiq */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4327 | | { Feature_FeatureVector, 5763 /* vscef */, MCK_BDVAddr64Disp12, 2 /* 1 */ }, |
4328 | | { Feature_FeatureVector, 5763 /* vscef */, MCK_VR128, 1 /* 0 */ }, |
4329 | | { Feature_FeatureVector, 5769 /* vsceg */, MCK_BDVAddr64Disp12, 2 /* 1 */ }, |
4330 | | { Feature_FeatureVector, 5769 /* vsceg */, MCK_VR128, 1 /* 0 */ }, |
4331 | | { Feature_FeatureVector, 5775 /* vsegb */, MCK_VR128, 3 /* 0, 1 */ }, |
4332 | | { Feature_FeatureVector, 5781 /* vsegf */, MCK_VR128, 3 /* 0, 1 */ }, |
4333 | | { Feature_FeatureVector, 5787 /* vsegh */, MCK_VR128, 3 /* 0, 1 */ }, |
4334 | | { Feature_FeatureVector, 5793 /* vsel */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4335 | | { Feature_FeatureVector, 5798 /* vsf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4336 | | { Feature_FeatureVector, 5802 /* vsg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4337 | | { Feature_FeatureVector, 5806 /* vsh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4338 | | { Feature_FeatureVector, 5810 /* vsl */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4339 | | { Feature_FeatureVector, 5814 /* vslb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4340 | | { Feature_FeatureVector, 5819 /* vsldb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4341 | | { Feature_FeatureVector, 5825 /* vsq */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4342 | | { Feature_FeatureVector, 5829 /* vsra */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4343 | | { Feature_FeatureVector, 5834 /* vsrab */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4344 | | { Feature_FeatureVector, 5840 /* vsrl */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4345 | | { Feature_FeatureVector, 5845 /* vsrlb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4346 | | { Feature_FeatureVector, 5851 /* vst */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4347 | | { Feature_FeatureVector, 5851 /* vst */, MCK_VR128, 1 /* 0 */ }, |
4348 | | { Feature_FeatureVector, 5855 /* vsteb */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4349 | | { Feature_FeatureVector, 5855 /* vsteb */, MCK_VR128, 1 /* 0 */ }, |
4350 | | { Feature_FeatureVector, 5861 /* vstef */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4351 | | { Feature_FeatureVector, 5861 /* vstef */, MCK_VR128, 1 /* 0 */ }, |
4352 | | { Feature_FeatureVector, 5867 /* vsteg */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4353 | | { Feature_FeatureVector, 5867 /* vsteg */, MCK_VR128, 1 /* 0 */ }, |
4354 | | { Feature_FeatureVector, 5873 /* vsteh */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4355 | | { Feature_FeatureVector, 5873 /* vsteh */, MCK_VR128, 1 /* 0 */ }, |
4356 | | { Feature_FeatureVector, 5879 /* vstl */, MCK_BDAddr64Disp12, 4 /* 2 */ }, |
4357 | | { Feature_FeatureVector, 5879 /* vstl */, MCK_GR32, 2 /* 1 */ }, |
4358 | | { Feature_FeatureVector, 5879 /* vstl */, MCK_VR128, 1 /* 0 */ }, |
4359 | | { Feature_FeatureVector, 5884 /* vstm */, MCK_BDAddr64Disp12, 4 /* 2 */ }, |
4360 | | { Feature_FeatureVector, 5884 /* vstm */, MCK_VR128, 3 /* 0, 1 */ }, |
4361 | | { Feature_FeatureVector, 5889 /* vstrcb */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4362 | | { Feature_FeatureVector, 5889 /* vstrcb */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4363 | | { Feature_FeatureVector, 5896 /* vstrcbs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4364 | | { Feature_FeatureVector, 5896 /* vstrcbs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4365 | | { Feature_FeatureVector, 5904 /* vstrcf */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4366 | | { Feature_FeatureVector, 5904 /* vstrcf */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4367 | | { Feature_FeatureVector, 5911 /* vstrcfs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4368 | | { Feature_FeatureVector, 5911 /* vstrcfs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4369 | | { Feature_FeatureVector, 5919 /* vstrch */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4370 | | { Feature_FeatureVector, 5919 /* vstrch */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4371 | | { Feature_FeatureVector, 5926 /* vstrchs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4372 | | { Feature_FeatureVector, 5926 /* vstrchs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4373 | | { Feature_FeatureVector, 5934 /* vstrczb */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4374 | | { Feature_FeatureVector, 5934 /* vstrczb */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4375 | | { Feature_FeatureVector, 5942 /* vstrczbs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4376 | | { Feature_FeatureVector, 5942 /* vstrczbs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4377 | | { Feature_FeatureVector, 5951 /* vstrczf */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4378 | | { Feature_FeatureVector, 5951 /* vstrczf */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4379 | | { Feature_FeatureVector, 5959 /* vstrczfs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4380 | | { Feature_FeatureVector, 5959 /* vstrczfs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4381 | | { Feature_FeatureVector, 5968 /* vstrczh */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4382 | | { Feature_FeatureVector, 5968 /* vstrczh */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4383 | | { Feature_FeatureVector, 5976 /* vstrczhs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4384 | | { Feature_FeatureVector, 5976 /* vstrczhs */, MCK_VR128, 15 /* 0, 1, 2, 3 */ }, |
4385 | | { Feature_FeatureVector, 5985 /* vsumb */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4386 | | { Feature_FeatureVector, 5991 /* vsumgf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4387 | | { Feature_FeatureVector, 5998 /* vsumgh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4388 | | { Feature_FeatureVector, 6005 /* vsumh */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4389 | | { Feature_FeatureVector, 6011 /* vsumqf */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4390 | | { Feature_FeatureVector, 6018 /* vsumqg */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4391 | | { Feature_FeatureVector, 6025 /* vtm */, MCK_VR128, 3 /* 0, 1 */ }, |
4392 | | { Feature_FeatureVector, 6029 /* vuphb */, MCK_VR128, 3 /* 0, 1 */ }, |
4393 | | { Feature_FeatureVector, 6035 /* vuphf */, MCK_VR128, 3 /* 0, 1 */ }, |
4394 | | { Feature_FeatureVector, 6041 /* vuphh */, MCK_VR128, 3 /* 0, 1 */ }, |
4395 | | { Feature_FeatureVector, 6047 /* vuplb */, MCK_VR128, 3 /* 0, 1 */ }, |
4396 | | { Feature_FeatureVector, 6053 /* vuplf */, MCK_VR128, 3 /* 0, 1 */ }, |
4397 | | { Feature_FeatureVector, 6059 /* vuplhb */, MCK_VR128, 3 /* 0, 1 */ }, |
4398 | | { Feature_FeatureVector, 6066 /* vuplhf */, MCK_VR128, 3 /* 0, 1 */ }, |
4399 | | { Feature_FeatureVector, 6073 /* vuplhh */, MCK_VR128, 3 /* 0, 1 */ }, |
4400 | | { Feature_FeatureVector, 6080 /* vuplhw */, MCK_VR128, 3 /* 0, 1 */ }, |
4401 | | { Feature_FeatureVector, 6087 /* vupllb */, MCK_VR128, 3 /* 0, 1 */ }, |
4402 | | { Feature_FeatureVector, 6094 /* vupllf */, MCK_VR128, 3 /* 0, 1 */ }, |
4403 | | { Feature_FeatureVector, 6101 /* vupllh */, MCK_VR128, 3 /* 0, 1 */ }, |
4404 | | { Feature_FeatureVector, 6108 /* vx */, MCK_VR128, 7 /* 0, 1, 2 */ }, |
4405 | | { Feature_FeatureVector, 6111 /* vzero */, MCK_VR128, 1 /* 0 */ }, |
4406 | | { Feature_FeatureVector, 6117 /* wcdgb */, MCK_VR64, 3 /* 0, 1 */ }, |
4407 | | { Feature_FeatureVector, 6123 /* wcdlgb */, MCK_VR64, 3 /* 0, 1 */ }, |
4408 | | { Feature_FeatureVector, 6130 /* wcgdb */, MCK_VR64, 3 /* 0, 1 */ }, |
4409 | | { Feature_FeatureVector, 6136 /* wclgdb */, MCK_VR64, 3 /* 0, 1 */ }, |
4410 | | { Feature_FeatureVector, 6143 /* wfadb */, MCK_VR64, 7 /* 0, 1, 2 */ }, |
4411 | | { Feature_FeatureVector, 6149 /* wfcdb */, MCK_VR64, 3 /* 0, 1 */ }, |
4412 | | { Feature_FeatureVector, 6155 /* wfcedb */, MCK_VR64, 7 /* 0, 1, 2 */ }, |
4413 | | { Feature_FeatureVector, 6162 /* wfcedbs */, MCK_VR64, 7 /* 0, 1, 2 */ }, |
4414 | | { Feature_FeatureVector, 6170 /* wfchdb */, MCK_VR64, 7 /* 0, 1, 2 */ }, |
4415 | | { Feature_FeatureVector, 6177 /* wfchdbs */, MCK_VR64, 7 /* 0, 1, 2 */ }, |
4416 | | { Feature_FeatureVector, 6185 /* wfchedb */, MCK_VR64, 7 /* 0, 1, 2 */ }, |
4417 | | { Feature_FeatureVector, 6193 /* wfchedbs */, MCK_VR64, 7 /* 0, 1, 2 */ }, |
4418 | | { Feature_FeatureVector, 6202 /* wfddb */, MCK_VR64, 7 /* 0, 1, 2 */ }, |
4419 | | { Feature_FeatureVector, 6208 /* wfidb */, MCK_VR64, 3 /* 0, 1 */ }, |
4420 | | { Feature_FeatureVector, 6214 /* wfkdb */, MCK_VR64, 3 /* 0, 1 */ }, |
4421 | | { Feature_FeatureVector, 6220 /* wflcdb */, MCK_VR64, 3 /* 0, 1 */ }, |
4422 | | { Feature_FeatureVector, 6227 /* wflndb */, MCK_VR64, 3 /* 0, 1 */ }, |
4423 | | { Feature_FeatureVector, 6234 /* wflpdb */, MCK_VR64, 3 /* 0, 1 */ }, |
4424 | | { Feature_FeatureVector, 6241 /* wfmadb */, MCK_VR64, 15 /* 0, 1, 2, 3 */ }, |
4425 | | { Feature_FeatureVector, 6248 /* wfmdb */, MCK_VR64, 7 /* 0, 1, 2 */ }, |
4426 | | { Feature_FeatureVector, 6254 /* wfmsdb */, MCK_VR64, 15 /* 0, 1, 2, 3 */ }, |
4427 | | { Feature_FeatureVector, 6261 /* wfsdb */, MCK_VR64, 7 /* 0, 1, 2 */ }, |
4428 | | { Feature_FeatureVector, 6267 /* wfsqdb */, MCK_VR64, 3 /* 0, 1 */ }, |
4429 | | { Feature_FeatureVector, 6274 /* wftcidb */, MCK_VR64, 3 /* 0, 1 */ }, |
4430 | | { Feature_FeatureVector, 6282 /* wldeb */, MCK_VR32, 2 /* 1 */ }, |
4431 | | { Feature_FeatureVector, 6282 /* wldeb */, MCK_VR64, 1 /* 0 */ }, |
4432 | | { Feature_FeatureVector, 6288 /* wledb */, MCK_VR32, 1 /* 0 */ }, |
4433 | | { Feature_FeatureVector, 6288 /* wledb */, MCK_VR64, 2 /* 1 */ }, |
4434 | | { 0, 6294 /* x */, MCK_BDXAddr64Disp12, 2 /* 1 */ }, |
4435 | | { 0, 6294 /* x */, MCK_GR32, 1 /* 0 */ }, |
4436 | | { 0, 6296 /* xc */, MCK_BDAddr64Disp12, 2 /* 1 */ }, |
4437 | | { 0, 6296 /* xc */, MCK_BDLAddr64Disp12Len8, 1 /* 0 */ }, |
4438 | | { 0, 6299 /* xg */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
4439 | | { 0, 6299 /* xg */, MCK_GR64, 1 /* 0 */ }, |
4440 | | { 0, 6302 /* xgr */, MCK_GR64, 3 /* 0, 1 */ }, |
4441 | | { Feature_FeatureDistinctOps, 6306 /* xgrk */, MCK_GR64, 7 /* 0, 1, 2 */ }, |
4442 | | { 0, 6311 /* xi */, MCK_BDAddr64Disp12, 1 /* 0 */ }, |
4443 | | { 0, 6314 /* xihf */, MCK_GRH32, 1 /* 0 */ }, |
4444 | | { 0, 6319 /* xilf */, MCK_GR32, 1 /* 0 */ }, |
4445 | | { 0, 6324 /* xiy */, MCK_BDAddr64Disp20, 1 /* 0 */ }, |
4446 | | { 0, 6328 /* xr */, MCK_GR32, 3 /* 0, 1 */ }, |
4447 | | { Feature_FeatureDistinctOps, 6331 /* xrk */, MCK_GR32, 7 /* 0, 1, 2 */ }, |
4448 | | { 0, 6335 /* xy */, MCK_BDXAddr64Disp20, 2 /* 1 */ }, |
4449 | | { 0, 6335 /* xy */, MCK_GR32, 1 /* 0 */ }, |
4450 | | }; |
4451 | | |
4452 | | SystemZAsmParser::OperandMatchResultTy SystemZAsmParser:: |
4453 | | tryCustomParseOperand(OperandVector &Operands, |
4454 | 201 | unsigned MCK, unsigned int &ErrorCode) { |
4455 | | |
4456 | 201 | switch(MCK) { |
4457 | 0 | case MCK_ADDR128: |
4458 | 0 | return parseADDR128(Operands); |
4459 | 0 | case MCK_ADDR32: |
4460 | 0 | return parseADDR32(Operands, ErrorCode); |
4461 | 0 | case MCK_ADDR64: |
4462 | 0 | return parseADDR64(Operands, ErrorCode); |
4463 | 0 | case MCK_AccessReg: |
4464 | 0 | return parseAccessReg(Operands, ErrorCode); |
4465 | 0 | case MCK_BDAddr32Disp12: |
4466 | 0 | return parseBDAddr32(Operands, ErrorCode); |
4467 | 0 | case MCK_BDAddr32Disp20: |
4468 | 0 | return parseBDAddr32(Operands, ErrorCode); |
4469 | 0 | case MCK_BDAddr64Disp12: |
4470 | 0 | return parseBDAddr64(Operands, ErrorCode); |
4471 | 0 | case MCK_BDAddr64Disp20: |
4472 | 0 | return parseBDAddr64(Operands, ErrorCode); |
4473 | 0 | case MCK_BDLAddr64Disp12Len8: |
4474 | 0 | return parseBDLAddr64(Operands, ErrorCode); |
4475 | 0 | case MCK_BDVAddr64Disp12: |
4476 | 0 | return parseBDVAddr64(Operands, ErrorCode); |
4477 | 0 | case MCK_BDXAddr64Disp12: |
4478 | 0 | return parseBDXAddr64(Operands, ErrorCode); |
4479 | 0 | case MCK_BDXAddr64Disp20: |
4480 | 0 | return parseBDXAddr64(Operands, ErrorCode); |
4481 | 0 | case MCK_FP128: |
4482 | 0 | return parseFP128(Operands, ErrorCode); |
4483 | 0 | case MCK_FP32: |
4484 | 0 | return parseFP32(Operands, ErrorCode); |
4485 | 0 | case MCK_FP64: |
4486 | 0 | return parseFP64(Operands, ErrorCode); |
4487 | 0 | case MCK_GR128: |
4488 | 0 | return parseGR128(Operands, ErrorCode); |
4489 | 0 | case MCK_GR32: |
4490 | 0 | return parseGR32(Operands, ErrorCode); |
4491 | 0 | case MCK_GR64: |
4492 | 0 | return parseGR64(Operands, ErrorCode); |
4493 | 0 | case MCK_GRH32: |
4494 | 0 | return parseGRH32(Operands, ErrorCode); |
4495 | 0 | case MCK_GRX32: |
4496 | 0 | return parseGRX32(Operands, ErrorCode); |
4497 | 201 | case MCK_PCRel16: |
4498 | 201 | return parsePCRel16(Operands); |
4499 | 0 | case MCK_PCRel32: |
4500 | 0 | return parsePCRel32(Operands); |
4501 | 0 | case MCK_PCRelTLS16: |
4502 | 0 | return parsePCRelTLS16(Operands); |
4503 | 0 | case MCK_PCRelTLS32: |
4504 | 0 | return parsePCRelTLS32(Operands); |
4505 | 0 | case MCK_VF128: |
4506 | 0 | return parseVF128(Operands, ErrorCode); |
4507 | 0 | case MCK_VR128: |
4508 | 0 | return parseVR128(Operands, ErrorCode); |
4509 | 0 | case MCK_VR32: |
4510 | 0 | return parseVR32(Operands, ErrorCode); |
4511 | 0 | case MCK_VR64: |
4512 | 0 | return parseVR64(Operands, ErrorCode); |
4513 | 0 | default: |
4514 | 0 | return MatchOperand_NoMatch; |
4515 | 201 | } |
4516 | 0 | return MatchOperand_NoMatch; |
4517 | 201 | } |
4518 | | |
4519 | | SystemZAsmParser::OperandMatchResultTy SystemZAsmParser:: |
4520 | | MatchOperandParserImpl(OperandVector &Operands, |
4521 | 1.32k | StringRef Mnemonic, unsigned int &ErrorCode) { |
4522 | | // Get the current feature set. |
4523 | 1.32k | uint64_t AvailableFeatures = getAvailableFeatures(); |
4524 | | |
4525 | | // Get the next operand index. |
4526 | 1.32k | unsigned NextOpNum = Operands.size() - 1; |
4527 | | // Search the table. |
4528 | 1.32k | auto MnemonicRange = |
4529 | 1.32k | std::equal_range(std::begin(OperandMatchTable), std::end(OperandMatchTable), |
4530 | 1.32k | Mnemonic, LessOpcodeOperand()); |
4531 | | |
4532 | 1.32k | if (MnemonicRange.first == MnemonicRange.second) |
4533 | 1.11k | return MatchOperand_NoMatch; |
4534 | | |
4535 | 201 | for (const OperandMatchEntry *it = MnemonicRange.first, |
4536 | 400 | *ie = MnemonicRange.second; it != ie; ++it) { |
4537 | | // equal_range guarantees that instruction mnemonic matches. |
4538 | 201 | assert(Mnemonic == it->getMnemonic()); |
4539 | | |
4540 | | // check if the available features match |
4541 | 201 | if ((AvailableFeatures & it->RequiredFeatures) != it->RequiredFeatures) { |
4542 | 0 | continue; |
4543 | 0 | } |
4544 | | |
4545 | | // check if the operand in question has a custom parser. |
4546 | 201 | if (!(it->OperandMask & (1 << NextOpNum))) |
4547 | 0 | continue; |
4548 | | |
4549 | | // call custom parse method to handle the operand |
4550 | 201 | OperandMatchResultTy Result = tryCustomParseOperand(Operands, it->Class, ErrorCode); |
4551 | 201 | if (Result != MatchOperand_NoMatch) |
4552 | 2 | return Result; |
4553 | 201 | } |
4554 | | |
4555 | | // Okay, we had no match. |
4556 | 199 | return MatchOperand_NoMatch; |
4557 | 201 | } |
4558 | | |
4559 | | #endif // GET_MATCHER_IMPLEMENTATION |
4560 | | |