Coverage Report

Created: 2026-07-25 06:13

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/keystone/llvm/lib/Target/Hexagon/HexagonGenMCCodeEmitter.inc
Line
Count
Source
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Machine Code Emitter                                                       *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
uint64_t HexagonMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
10
    SmallVectorImpl<MCFixup> &Fixups,
11
5.77k
    const MCSubtargetInfo &STI) const {
12
5.77k
  static const uint64_t InstBits[] = {
13
5.77k
    UINT64_C(0),
14
5.77k
    UINT64_C(0),
15
5.77k
    UINT64_C(0),
16
5.77k
    UINT64_C(0),
17
5.77k
    UINT64_C(0),
18
5.77k
    UINT64_C(0),
19
5.77k
    UINT64_C(0),
20
5.77k
    UINT64_C(0),
21
5.77k
    UINT64_C(0),
22
5.77k
    UINT64_C(0),
23
5.77k
    UINT64_C(0),
24
5.77k
    UINT64_C(0),
25
5.77k
    UINT64_C(0),
26
5.77k
    UINT64_C(0),
27
5.77k
    UINT64_C(0),
28
5.77k
    UINT64_C(0),
29
5.77k
    UINT64_C(0),
30
5.77k
    UINT64_C(0),
31
5.77k
    UINT64_C(0),
32
5.77k
    UINT64_C(0),
33
5.77k
    UINT64_C(0),
34
5.77k
    UINT64_C(0),
35
5.77k
    UINT64_C(0),
36
5.77k
    UINT64_C(0),
37
5.77k
    UINT64_C(2357198976), // A2_abs
38
5.77k
    UINT64_C(2155872448), // A2_absp
39
5.77k
    UINT64_C(2357199008), // A2_abssat
40
5.77k
    UINT64_C(4076863488), // A2_add
41
5.77k
    UINT64_C(3577741408), // A2_addh_h16_hh
42
5.77k
    UINT64_C(3577741376), // A2_addh_h16_hl
43
5.77k
    UINT64_C(3577741344), // A2_addh_h16_lh
44
5.77k
    UINT64_C(3577741312), // A2_addh_h16_ll
45
5.77k
    UINT64_C(3577741536), // A2_addh_h16_sat_hh
46
5.77k
    UINT64_C(3577741504), // A2_addh_h16_sat_hl
47
5.77k
    UINT64_C(3577741472), // A2_addh_h16_sat_lh
48
5.77k
    UINT64_C(3577741440), // A2_addh_h16_sat_ll
49
5.77k
    UINT64_C(3573547072), // A2_addh_l16_hl
50
5.77k
    UINT64_C(3573547008), // A2_addh_l16_ll
51
5.77k
    UINT64_C(3573547200), // A2_addh_l16_sat_hl
52
5.77k
    UINT64_C(3573547136), // A2_addh_l16_sat_ll
53
5.77k
    UINT64_C(2952790016), // A2_addi
54
5.77k
    UINT64_C(3539992800), // A2_addp
55
5.77k
    UINT64_C(3546284192), // A2_addpsat
56
5.77k
    UINT64_C(4131389440), // A2_addsat
57
5.77k
    UINT64_C(0),  // A2_addsp
58
5.77k
    UINT64_C(3546284256), // A2_addsph
59
5.77k
    UINT64_C(3546284224), // A2_addspl
60
5.77k
    UINT64_C(4043309056), // A2_and
61
5.77k
    UINT64_C(1979711488), // A2_andir
62
5.77k
    UINT64_C(3554672640), // A2_andp
63
5.77k
    UINT64_C(1879048192), // A2_aslh
64
5.77k
    UINT64_C(1881145344), // A2_asrh
65
5.77k
    UINT64_C(4085252096), // A2_combine_hh
66
5.77k
    UINT64_C(4087349248), // A2_combine_hl
67
5.77k
    UINT64_C(4089446400), // A2_combine_lh
68
5.77k
    UINT64_C(4091543552), // A2_combine_ll
69
5.77k
    UINT64_C(2080374784), // A2_combineii
70
5.77k
    UINT64_C(4110417920), // A2_combinew
71
5.77k
    UINT64_C(3586129920), // A2_max
72
5.77k
    UINT64_C(3552575616), // A2_maxp
73
5.77k
    UINT64_C(3586130048), // A2_maxu
74
5.77k
    UINT64_C(3552575648), // A2_maxup
75
5.77k
    UINT64_C(3584032768), // A2_min
76
5.77k
    UINT64_C(3550478528), // A2_minp
77
5.77k
    UINT64_C(3584032896), // A2_minu
78
5.77k
    UINT64_C(3550478560), // A2_minup
79
5.77k
    UINT64_C(2155872416), // A2_negp
80
5.77k
    UINT64_C(2357199040), // A2_negsat
81
5.77k
    UINT64_C(2130706432), // A2_nop
82
5.77k
    UINT64_C(0),  // A2_not
83
5.77k
    UINT64_C(2155872384), // A2_notp
84
5.77k
    UINT64_C(4045406208), // A2_or
85
5.77k
    UINT64_C(1988100096), // A2_orir
86
5.77k
    UINT64_C(3554672704), // A2_orp
87
5.77k
    UINT64_C(4211081344), // A2_paddf
88
5.77k
    UINT64_C(4211089536), // A2_paddfnew
89
5.77k
    UINT64_C(1954545664), // A2_paddif
90
5.77k
    UINT64_C(1954553856), // A2_paddifnew
91
5.77k
    UINT64_C(1946157056), // A2_paddit
92
5.77k
    UINT64_C(1946165248), // A2_padditnew
93
5.77k
    UINT64_C(4211081216), // A2_paddt
94
5.77k
    UINT64_C(4211089408), // A2_paddtnew
95
5.77k
    UINT64_C(4177526912), // A2_pandf
96
5.77k
    UINT64_C(4177535104), // A2_pandfnew
97
5.77k
    UINT64_C(4177526784), // A2_pandt
98
5.77k
    UINT64_C(4177534976), // A2_pandtnew
99
5.77k
    UINT64_C(4179624064), // A2_porf
100
5.77k
    UINT64_C(4179632256), // A2_porfnew
101
5.77k
    UINT64_C(4179623936), // A2_port
102
5.77k
    UINT64_C(4179632128), // A2_portnew
103
5.77k
    UINT64_C(4213178496), // A2_psubf
104
5.77k
    UINT64_C(4213186688), // A2_psubfnew
105
5.77k
    UINT64_C(4213178368), // A2_psubt
106
5.77k
    UINT64_C(4213186560), // A2_psubtnew
107
5.77k
    UINT64_C(4183818368), // A2_pxorf
108
5.77k
    UINT64_C(4183826560), // A2_pxorfnew
109
5.77k
    UINT64_C(4183818240), // A2_pxort
110
5.77k
    UINT64_C(4183826432), // A2_pxortnew
111
5.77k
    UINT64_C(2294284320), // A2_roundsat
112
5.77k
    UINT64_C(2294284288), // A2_sat
113
5.77k
    UINT64_C(2361393376), // A2_satb
114
5.77k
    UINT64_C(2361393280), // A2_sath
115
5.77k
    UINT64_C(2361393344), // A2_satub
116
5.77k
    UINT64_C(2361393312), // A2_satuh
117
5.77k
    UINT64_C(4078960640), // A2_sub
118
5.77k
    UINT64_C(3579838560), // A2_subh_h16_hh
119
5.77k
    UINT64_C(3579838528), // A2_subh_h16_hl
120
5.77k
    UINT64_C(3579838496), // A2_subh_h16_lh
121
5.77k
    UINT64_C(3579838464), // A2_subh_h16_ll
122
5.77k
    UINT64_C(3579838688), // A2_subh_h16_sat_hh
123
5.77k
    UINT64_C(3579838656), // A2_subh_h16_sat_hl
124
5.77k
    UINT64_C(3579838624), // A2_subh_h16_sat_lh
125
5.77k
    UINT64_C(3579838592), // A2_subh_h16_sat_ll
126
5.77k
    UINT64_C(3575644224), // A2_subh_l16_hl
127
5.77k
    UINT64_C(3575644160), // A2_subh_l16_ll
128
5.77k
    UINT64_C(3575644352), // A2_subh_l16_sat_hl
129
5.77k
    UINT64_C(3575644288), // A2_subh_l16_sat_ll
130
5.77k
    UINT64_C(3542089952), // A2_subp
131
5.77k
    UINT64_C(1983905792), // A2_subri
132
5.77k
    UINT64_C(4139778048), // A2_subsat
133
5.77k
    UINT64_C(4127195136), // A2_svaddh
134
5.77k
    UINT64_C(4129292288), // A2_svaddhs
135
5.77k
    UINT64_C(4133486592), // A2_svadduhs
136
5.77k
    UINT64_C(4143972352), // A2_svavgh
137
5.77k
    UINT64_C(4146069504), // A2_svavghs
138
5.77k
    UINT64_C(4150263808), // A2_svnavgh
139
5.77k
    UINT64_C(4135583744), // A2_svsubh
140
5.77k
    UINT64_C(4137680896), // A2_svsubhs
141
5.77k
    UINT64_C(4141875200), // A2_svsubuhs
142
5.77k
    UINT64_C(2357199072), // A2_swiz
143
5.77k
    UINT64_C(1889533952), // A2_sxtb
144
5.77k
    UINT64_C(1893728256), // A2_sxth
145
5.77k
    UINT64_C(2218786816), // A2_sxtw
146
5.77k
    UINT64_C(1885339648), // A2_tfr
147
5.77k
    UINT64_C(1778384896), // A2_tfrcrr
148
5.77k
    UINT64_C(1954545664), // A2_tfrf
149
5.77k
    UINT64_C(1954553856), // A2_tfrfnew
150
5.77k
    UINT64_C(1914699776), // A2_tfrih
151
5.77k
    UINT64_C(1897922560), // A2_tfril
152
5.77k
    UINT64_C(0),  // A2_tfrp
153
5.77k
    UINT64_C(0),  // A2_tfrpf
154
5.77k
    UINT64_C(0),  // A2_tfrpfnew
155
5.77k
    UINT64_C(0),  // A2_tfrpi
156
5.77k
    UINT64_C(0),  // A2_tfrpt
157
5.77k
    UINT64_C(0),  // A2_tfrptnew
158
5.77k
    UINT64_C(1646264320), // A2_tfrrcr
159
5.77k
    UINT64_C(2013265920), // A2_tfrsi
160
5.77k
    UINT64_C(1946157056), // A2_tfrt
161
5.77k
    UINT64_C(1946165248), // A2_tfrtnew
162
5.77k
    UINT64_C(2151678080), // A2_vabsh
163
5.77k
    UINT64_C(2151678112), // A2_vabshsat
164
5.77k
    UINT64_C(2151678144), // A2_vabsw
165
5.77k
    UINT64_C(2151678176), // A2_vabswsat
166
5.77k
    UINT64_C(3539992640), // A2_vaddh
167
5.77k
    UINT64_C(3539992672), // A2_vaddhs
168
5.77k
    UINT64_C(3539992576), // A2_vaddub
169
5.77k
    UINT64_C(3539992608), // A2_vaddubs
170
5.77k
    UINT64_C(3539992704), // A2_vadduhs
171
5.77k
    UINT64_C(3539992736), // A2_vaddw
172
5.77k
    UINT64_C(3539992768), // A2_vaddws
173
5.77k
    UINT64_C(3544186944), // A2_vavgh
174
5.77k
    UINT64_C(3544187008), // A2_vavghcr
175
5.77k
    UINT64_C(3544186976), // A2_vavghr
176
5.77k
    UINT64_C(3544186880), // A2_vavgub
177
5.77k
    UINT64_C(3544186912), // A2_vavgubr
178
5.77k
    UINT64_C(3544187040), // A2_vavguh
179
5.77k
    UINT64_C(3544187072), // A2_vavguhr
180
5.77k
    UINT64_C(3546284128), // A2_vavguw
181
5.77k
    UINT64_C(3546284160), // A2_vavguwr
182
5.77k
    UINT64_C(3546284032), // A2_vavgw
183
5.77k
    UINT64_C(3546284096), // A2_vavgwcr
184
5.77k
    UINT64_C(3546284064), // A2_vavgwr
185
5.77k
    UINT64_C(3523215552), // A2_vcmpbeq
186
5.77k
    UINT64_C(3523215584), // A2_vcmpbgtu
187
5.77k
    UINT64_C(3523215456), // A2_vcmpheq
188
5.77k
    UINT64_C(3523215488), // A2_vcmphgt
189
5.77k
    UINT64_C(3523215520), // A2_vcmphgtu
190
5.77k
    UINT64_C(3523215360), // A2_vcmpweq
191
5.77k
    UINT64_C(3523215392), // A2_vcmpwgt
192
5.77k
    UINT64_C(3523215424), // A2_vcmpwgtu
193
5.77k
    UINT64_C(2155872480), // A2_vconj
194
5.77k
    UINT64_C(3552575680), // A2_vmaxb
195
5.77k
    UINT64_C(3552575520), // A2_vmaxh
196
5.77k
    UINT64_C(3552575488), // A2_vmaxub
197
5.77k
    UINT64_C(3552575552), // A2_vmaxuh
198
5.77k
    UINT64_C(3550478496), // A2_vmaxuw
199
5.77k
    UINT64_C(3552575584), // A2_vmaxw
200
5.77k
    UINT64_C(3552575712), // A2_vminb
201
5.77k
    UINT64_C(3550478368), // A2_vminh
202
5.77k
    UINT64_C(3550478336), // A2_vminub
203
5.77k
    UINT64_C(3550478400), // A2_vminuh
204
5.77k
    UINT64_C(3550478464), // A2_vminuw
205
5.77k
    UINT64_C(3550478432), // A2_vminw
206
5.77k
    UINT64_C(3548381184), // A2_vnavgh
207
5.77k
    UINT64_C(3548381248), // A2_vnavghcr
208
5.77k
    UINT64_C(3548381216), // A2_vnavghr
209
5.77k
    UINT64_C(3548381280), // A2_vnavgw
210
5.77k
    UINT64_C(3548381376), // A2_vnavgwcr
211
5.77k
    UINT64_C(3548381312), // A2_vnavgwr
212
5.77k
    UINT64_C(3896508448), // A2_vraddub
213
5.77k
    UINT64_C(3930062880), // A2_vraddub_acc
214
5.77k
    UINT64_C(3896508480), // A2_vrsadub
215
5.77k
    UINT64_C(3930062912), // A2_vrsadub_acc
216
5.77k
    UINT64_C(3542089792), // A2_vsubh
217
5.77k
    UINT64_C(3542089824), // A2_vsubhs
218
5.77k
    UINT64_C(3542089728), // A2_vsubub
219
5.77k
    UINT64_C(3542089760), // A2_vsububs
220
5.77k
    UINT64_C(3542089856), // A2_vsubuhs
221
5.77k
    UINT64_C(3542089888), // A2_vsubw
222
5.77k
    UINT64_C(3542089920), // A2_vsubws
223
5.77k
    UINT64_C(4049600512), // A2_xor
224
5.77k
    UINT64_C(3554672768), // A2_xorp
225
5.77k
    UINT64_C(1979719648), // A2_zxtb
226
5.77k
    UINT64_C(1891631104), // A2_zxth
227
5.77k
    UINT64_C(3267362816), // A4_addp_c
228
5.77k
    UINT64_C(4051697664), // A4_andn
229
5.77k
    UINT64_C(3554672672), // A4_andnp
230
5.77k
    UINT64_C(3558866944), // A4_bitsplit
231
5.77k
    UINT64_C(2294284416), // A4_bitspliti
232
5.77k
    UINT64_C(0),  // A4_boundscheck
233
5.77k
    UINT64_C(3523223712), // A4_boundscheck_hi
234
5.77k
    UINT64_C(3523223680), // A4_boundscheck_lo
235
5.77k
    UINT64_C(3351249088), // A4_cmpbeq
236
5.77k
    UINT64_C(3707764736), // A4_cmpbeqi
237
5.77k
    UINT64_C(3351248960), // A4_cmpbgt
238
5.77k
    UINT64_C(3709861888), // A4_cmpbgti
239
5.77k
    UINT64_C(3351249120), // A4_cmpbgtu
240
5.77k
    UINT64_C(3711959040), // A4_cmpbgtui
241
5.77k
    UINT64_C(3351248992), // A4_cmpheq
242
5.77k
    UINT64_C(3707764744), // A4_cmpheqi
243
5.77k
    UINT64_C(3351249024), // A4_cmphgt
244
5.77k
    UINT64_C(3709861896), // A4_cmphgti
245
5.77k
    UINT64_C(3351249056), // A4_cmphgtu
246
5.77k
    UINT64_C(3711959048), // A4_cmphgtui
247
5.77k
    UINT64_C(2088763392), // A4_combineii
248
5.77k
    UINT64_C(1931485184), // A4_combineir
249
5.77k
    UINT64_C(1929388032), // A4_combineri
250
5.77k
    UINT64_C(2363490304), // A4_cround_ri
251
5.77k
    UINT64_C(3334471680), // A4_cround_rr
252
5.77k
    UINT64_C(0),  // A4_ext
253
5.77k
    UINT64_C(0),  // A4_ext_b
254
5.77k
    UINT64_C(0),  // A4_ext_c
255
5.77k
    UINT64_C(0),  // A4_ext_g
256
5.77k
    UINT64_C(3554672864), // A4_modwrapu
257
5.77k
    UINT64_C(4053794816), // A4_orn
258
5.77k
    UINT64_C(3554672736), // A4_ornp
259
5.77k
    UINT64_C(1879058432), // A4_paslhf
260
5.77k
    UINT64_C(1879059456), // A4_paslhfnew
261
5.77k
    UINT64_C(1879056384), // A4_paslht
262
5.77k
    UINT64_C(1879057408), // A4_paslhtnew
263
5.77k
    UINT64_C(1881155584), // A4_pasrhf
264
5.77k
    UINT64_C(1881156608), // A4_pasrhfnew
265
5.77k
    UINT64_C(1881153536), // A4_pasrht
266
5.77k
    UINT64_C(1881154560), // A4_pasrhtnew
267
5.77k
    UINT64_C(1889544192), // A4_psxtbf
268
5.77k
    UINT64_C(1889545216), // A4_psxtbfnew
269
5.77k
    UINT64_C(1889542144), // A4_psxtbt
270
5.77k
    UINT64_C(1889543168), // A4_psxtbtnew
271
5.77k
    UINT64_C(1893738496), // A4_psxthf
272
5.77k
    UINT64_C(1893739520), // A4_psxthfnew
273
5.77k
    UINT64_C(1893736448), // A4_psxtht
274
5.77k
    UINT64_C(1893737472), // A4_psxthtnew
275
5.77k
    UINT64_C(1887447040), // A4_pzxtbf
276
5.77k
    UINT64_C(1887448064), // A4_pzxtbfnew
277
5.77k
    UINT64_C(1887444992), // A4_pzxtbt
278
5.77k
    UINT64_C(1887446016), // A4_pzxtbtnew
279
5.77k
    UINT64_C(1891641344), // A4_pzxthf
280
5.77k
    UINT64_C(1891642368), // A4_pzxthfnew
281
5.77k
    UINT64_C(1891639296), // A4_pzxtht
282
5.77k
    UINT64_C(1891640320), // A4_pzxthtnew
283
5.77k
    UINT64_C(4081057792), // A4_rcmpeq
284
5.77k
    UINT64_C(1933582336), // A4_rcmpeqi
285
5.77k
    UINT64_C(4083154944), // A4_rcmpneq
286
5.77k
    UINT64_C(1935679488), // A4_rcmpneqi
287
5.77k
    UINT64_C(2363490432), // A4_round_ri
288
5.77k
    UINT64_C(2363490496), // A4_round_ri_sat
289
5.77k
    UINT64_C(3334471808), // A4_round_rr
290
5.77k
    UINT64_C(3334471872), // A4_round_rr_sat
291
5.77k
    UINT64_C(3269459968), // A4_subp_c
292
5.77k
    UINT64_C(1744830464), // A4_tfrcpp
293
5.77k
    UINT64_C(1663041536), // A4_tfrpcp
294
5.77k
    UINT64_C(3523223648), // A4_tlbmatch
295
5.77k
    UINT64_C(3523223552), // A4_vcmpbeq_any
296
5.77k
    UINT64_C(3690987520), // A4_vcmpbeqi
297
5.77k
    UINT64_C(3523223616), // A4_vcmpbgt
298
5.77k
    UINT64_C(3693084672), // A4_vcmpbgti
299
5.77k
    UINT64_C(3695181824), // A4_vcmpbgtui
300
5.77k
    UINT64_C(3690987528), // A4_vcmpheqi
301
5.77k
    UINT64_C(3693084680), // A4_vcmphgti
302
5.77k
    UINT64_C(3695181832), // A4_vcmphgtui
303
5.77k
    UINT64_C(3690987536), // A4_vcmpweqi
304
5.77k
    UINT64_C(3693084688), // A4_vcmpwgti
305
5.77k
    UINT64_C(3695181840), // A4_vcmpwgtui
306
5.77k
    UINT64_C(3407872032), // A4_vrmaxh
307
5.77k
    UINT64_C(3407880224), // A4_vrmaxuh
308
5.77k
    UINT64_C(3407880256), // A4_vrmaxuw
309
5.77k
    UINT64_C(3407872064), // A4_vrmaxw
310
5.77k
    UINT64_C(3407872160), // A4_vrminh
311
5.77k
    UINT64_C(3407880352), // A4_vrminuh
312
5.77k
    UINT64_C(3407880384), // A4_vrminuw
313
5.77k
    UINT64_C(3407872192), // A4_vrminw
314
5.77k
    UINT64_C(3936354304), // A5_ACS
315
5.77k
    UINT64_C(3242197024), // A5_vaddhubs
316
5.77k
    UINT64_C(0),
317
5.77k
    UINT64_C(0),
318
5.77k
    UINT64_C(0),
319
5.77k
    UINT64_C(0),
320
5.77k
    UINT64_C(0),  // ARGEXTEND
321
5.77k
    UINT64_C(1805647872), // C2_all8
322
5.77k
    UINT64_C(1795162112), // C2_and
323
5.77k
    UINT64_C(1801453568), // C2_andn
324
5.77k
    UINT64_C(1803550720), // C2_any8
325
5.77k
    UINT64_C(3347054592), // C2_bitsclr
326
5.77k
    UINT64_C(2239758336), // C2_bitsclri
327
5.77k
    UINT64_C(3342860288), // C2_bitsset
328
5.77k
    UINT64_C(4244635776), // C2_ccombinewf
329
5.77k
    UINT64_C(4244643968), // C2_ccombinewnewf
330
5.77k
    UINT64_C(4244643840), // C2_ccombinewnewt
331
5.77k
    UINT64_C(4244635648), // C2_ccombinewt
332
5.77k
    UINT64_C(2122317824), // C2_cmoveif
333
5.77k
    UINT64_C(2113929216), // C2_cmoveit
334
5.77k
    UINT64_C(2122326016), // C2_cmovenewif
335
5.77k
    UINT64_C(2113937408), // C2_cmovenewit
336
5.77k
    UINT64_C(4060086272), // C2_cmpeq
337
5.77k
    UINT64_C(1962934272), // C2_cmpeqi
338
5.77k
    UINT64_C(3531603968), // C2_cmpeqp
339
5.77k
    UINT64_C(0),
340
5.77k
    UINT64_C(0),
341
5.77k
    UINT64_C(4064280576), // C2_cmpgt
342
5.77k
    UINT64_C(1967128576), // C2_cmpgti
343
5.77k
    UINT64_C(3531604032), // C2_cmpgtp
344
5.77k
    UINT64_C(4066377728), // C2_cmpgtu
345
5.77k
    UINT64_C(1971322880), // C2_cmpgtui
346
5.77k
    UINT64_C(3531604096), // C2_cmpgtup
347
5.77k
    UINT64_C(2248146944), // C2_mask
348
5.77k
    UINT64_C(4093640704), // C2_mux
349
5.77k
    UINT64_C(2046820352), // C2_muxii
350
5.77k
    UINT64_C(1929379840), // C2_muxir
351
5.77k
    UINT64_C(1937768448), // C2_muxri
352
5.77k
    UINT64_C(1807745024), // C2_not
353
5.77k
    UINT64_C(1797259264), // C2_or
354
5.77k
    UINT64_C(1809842176), // C2_orn
355
5.77k
    UINT64_C(0),  // C2_pxfer_map
356
5.77k
    UINT64_C(2302672896), // C2_tfrpr
357
5.77k
    UINT64_C(2235564032), // C2_tfrrp
358
5.77k
    UINT64_C(2298478592), // C2_vitpack
359
5.77k
    UINT64_C(3506438144), // C2_vmux
360
5.77k
    UINT64_C(1799356416), // C2_xor
361
5.77k
    UINT64_C(1783169024), // C4_addipc
362
5.77k
    UINT64_C(1796210688), // C4_and_and
363
5.77k
    UINT64_C(1804599296), // C4_and_andn
364
5.77k
    UINT64_C(1798307840), // C4_and_or
365
5.77k
    UINT64_C(1806696448), // C4_and_orn
366
5.77k
    UINT64_C(4064280592), // C4_cmplte
367
5.77k
    UINT64_C(1967128592), // C4_cmpltei
368
5.77k
    UINT64_C(4066377744), // C4_cmplteu
369
5.77k
    UINT64_C(1971322896), // C4_cmplteui
370
5.77k
    UINT64_C(4060086288), // C4_cmpneq
371
5.77k
    UINT64_C(1962934288), // C4_cmpneqi
372
5.77k
    UINT64_C(1795170448), // C4_fastcorner9
373
5.77k
    UINT64_C(1796219024), // C4_fastcorner9_not
374
5.77k
    UINT64_C(3349151744), // C4_nbitsclr
375
5.77k
    UINT64_C(2241855488), // C4_nbitsclri
376
5.77k
    UINT64_C(3344957440), // C4_nbitsset
377
5.77k
    UINT64_C(1800404992), // C4_or_and
378
5.77k
    UINT64_C(1808793600), // C4_or_andn
379
5.77k
    UINT64_C(1802502144), // C4_or_or
380
5.77k
    UINT64_C(1810890752), // C4_or_orn
381
5.77k
    UINT64_C(1352663040), // CALLRv3nr
382
5.77k
    UINT64_C(1509949440), // CALLv3nr
383
5.77k
    UINT64_C(0),  // CONST32
384
5.77k
    UINT64_C(0),  // CONST32_Float_Real
385
5.77k
    UINT64_C(0),  // CONST32_Int_Real
386
5.77k
    UINT64_C(0),  // CONST64_Float_Real
387
5.77k
    UINT64_C(0),  // CONST64_Int_Real
388
5.77k
    UINT64_C(0),  // DuplexIClass0
389
5.77k
    UINT64_C(8192), // DuplexIClass1
390
5.77k
    UINT64_C(536870912),  // DuplexIClass2
391
5.77k
    UINT64_C(536879104),  // DuplexIClass3
392
5.77k
    UINT64_C(1073741824), // DuplexIClass4
393
5.77k
    UINT64_C(1073750016), // DuplexIClass5
394
5.77k
    UINT64_C(1610612736), // DuplexIClass6
395
5.77k
    UINT64_C(1610620928), // DuplexIClass7
396
5.77k
    UINT64_C(2147483648), // DuplexIClass8
397
5.77k
    UINT64_C(2147491840), // DuplexIClass9
398
5.77k
    UINT64_C(2684354560), // DuplexIClassA
399
5.77k
    UINT64_C(2684362752), // DuplexIClassB
400
5.77k
    UINT64_C(3221225472), // DuplexIClassC
401
5.77k
    UINT64_C(3221233664), // DuplexIClassD
402
5.77k
    UINT64_C(3758096384), // DuplexIClassE
403
5.77k
    UINT64_C(3758104576), // DuplexIClassF
404
5.77k
    UINT64_C(1384120320), // EH_RETURN_JMPR
405
5.77k
    UINT64_C(0),
406
5.77k
    UINT64_C(0),
407
5.77k
    UINT64_C(2162163808), // F2_conv_d2df
408
5.77k
    UINT64_C(2285895712), // F2_conv_d2sf
409
5.77k
    UINT64_C(2162163712), // F2_conv_df2d
410
5.77k
    UINT64_C(2162163904), // F2_conv_df2d_chop
411
5.77k
    UINT64_C(2281701408), // F2_conv_df2sf
412
5.77k
    UINT64_C(2162163744), // F2_conv_df2ud
413
5.77k
    UINT64_C(2162163936), // F2_conv_df2ud_chop
414
5.77k
    UINT64_C(2287992864), // F2_conv_df2uw
415
5.77k
    UINT64_C(2292187168), // F2_conv_df2uw_chop
416
5.77k
    UINT64_C(2290090016), // F2_conv_df2w
417
5.77k
    UINT64_C(2296381472), // F2_conv_df2w_chop
418
5.77k
    UINT64_C(2222981248), // F2_conv_sf2d
419
5.77k
    UINT64_C(2222981312), // F2_conv_sf2d_chop
420
5.77k
    UINT64_C(2222981120), // F2_conv_sf2df
421
5.77k
    UINT64_C(2222981216), // F2_conv_sf2ud
422
5.77k
    UINT64_C(2222981280), // F2_conv_sf2ud_chop
423
5.77k
    UINT64_C(2338324480), // F2_conv_sf2uw
424
5.77k
    UINT64_C(2338324512), // F2_conv_sf2uw_chop
425
5.77k
    UINT64_C(2340421632), // F2_conv_sf2w
426
5.77k
    UINT64_C(2340421664), // F2_conv_sf2w_chop
427
5.77k
    UINT64_C(2162163776), // F2_conv_ud2df
428
5.77k
    UINT64_C(2283798560), // F2_conv_ud2sf
429
5.77k
    UINT64_C(2222981152), // F2_conv_uw2df
430
5.77k
    UINT64_C(2334130176), // F2_conv_uw2sf
431
5.77k
    UINT64_C(2222981184), // F2_conv_w2df
432
5.77k
    UINT64_C(2336227328), // F2_conv_w2sf
433
5.77k
    UINT64_C(3699376144), // F2_dfclass
434
5.77k
    UINT64_C(3537895424), // F2_dfcmpeq
435
5.77k
    UINT64_C(3537895488), // F2_dfcmpge
436
5.77k
    UINT64_C(3537895456), // F2_dfcmpgt
437
5.77k
    UINT64_C(3537895520), // F2_dfcmpuo
438
5.77k
    UINT64_C(3644850176), // F2_dfimm_n
439
5.77k
    UINT64_C(3640655872), // F2_dfimm_p
440
5.77k
    UINT64_C(3942645760), // F2_sfadd
441
5.77k
    UINT64_C(2246049792), // F2_sfclass
442
5.77k
    UINT64_C(3353346144), // F2_sfcmpeq
443
5.77k
    UINT64_C(3353346048), // F2_sfcmpge
444
5.77k
    UINT64_C(3353346176), // F2_sfcmpgt
445
5.77k
    UINT64_C(3353346080), // F2_sfcmpuo
446
5.77k
    UINT64_C(3955228704), // F2_sffixupd
447
5.77k
    UINT64_C(3955228672), // F2_sffixupn
448
5.77k
    UINT64_C(2342518784), // F2_sffixupr
449
5.77k
    UINT64_C(4009754752), // F2_sffma
450
5.77k
    UINT64_C(4009754816), // F2_sffma_lib
451
5.77k
    UINT64_C(4016046208), // F2_sffma_sc
452
5.77k
    UINT64_C(4009754784), // F2_sffms
453
5.77k
    UINT64_C(4009754848), // F2_sffms_lib
454
5.77k
    UINT64_C(3594518528), // F2_sfimm_n
455
5.77k
    UINT64_C(3590324224), // F2_sfimm_p
456
5.77k
    UINT64_C(2346713088), // F2_sfinvsqrta
457
5.77k
    UINT64_C(3951034368), // F2_sfmax
458
5.77k
    UINT64_C(3951034400), // F2_sfmin
459
5.77k
    UINT64_C(3946840064), // F2_sfmpy
460
5.77k
    UINT64_C(3957325952), // F2_sfrecipa
461
5.77k
    UINT64_C(3942645792), // F2_sfsub
462
5.77k
    UINT64_C(0),  // FCONST32_nsdata
463
5.77k
    UINT64_C(0),
464
5.77k
    UINT64_C(0),
465
5.77k
    UINT64_C(0),
466
5.77k
    UINT64_C(0),
467
5.77k
    UINT64_C(0),
468
5.77k
    UINT64_C(0),
469
5.77k
    UINT64_C(0),  // HEXAGON_V6_vd0_pseudo
470
5.77k
    UINT64_C(0),  // HEXAGON_V6_vd0_pseudo_128B
471
5.77k
    UINT64_C(1914699776), // HI
472
5.77k
    UINT64_C(0),  // HI_GOT
473
5.77k
    UINT64_C(0),  // HI_GOTREL
474
5.77k
    UINT64_C(1914699776), // HI_L
475
5.77k
    UINT64_C(0),  // HI_PIC
476
5.77k
    UINT64_C(0),
477
5.77k
    UINT64_C(1509949440), // J2_call
478
5.77k
    UINT64_C(1562378240), // J2_callf
479
5.77k
    UINT64_C(1352663040), // J2_callr
480
5.77k
    UINT64_C(1361051648), // J2_callrf
481
5.77k
    UINT64_C(1358954496), // J2_callrt
482
5.77k
    UINT64_C(1560281088), // J2_callt
483
5.77k
    UINT64_C(1476395008), // J2_jump
484
5.77k
    UINT64_C(1476395008), // J2_jump_ext
485
5.77k
    UINT64_C(1545601024), // J2_jump_extf
486
5.77k
    UINT64_C(1545603072), // J2_jump_extfnew
487
5.77k
    UINT64_C(1545607168), // J2_jump_extfnewpt
488
5.77k
    UINT64_C(1543503872), // J2_jump_extt
489
5.77k
    UINT64_C(1543505920), // J2_jump_exttnew
490
5.77k
    UINT64_C(1543510016), // J2_jump_exttnewpt
491
5.77k
    UINT64_C(1476395008), // J2_jump_noext
492
5.77k
    UINT64_C(1545601024), // J2_jump_noextf
493
5.77k
    UINT64_C(1545603072), // J2_jump_noextfnew
494
5.77k
    UINT64_C(1545607168), // J2_jump_noextfnewpt
495
5.77k
    UINT64_C(1543503872), // J2_jump_noextt
496
5.77k
    UINT64_C(1543505920), // J2_jump_noexttnew
497
5.77k
    UINT64_C(1543510016), // J2_jump_noexttnewpt
498
5.77k
    UINT64_C(1545601024), // J2_jumpf
499
5.77k
    UINT64_C(1545603072), // J2_jumpfnew
500
5.77k
    UINT64_C(1545607168), // J2_jumpfnewpt
501
5.77k
    UINT64_C(1384120320), // J2_jumpr
502
5.77k
    UINT64_C(1398800384), // J2_jumprf
503
5.77k
    UINT64_C(1398802432), // J2_jumprfnew
504
5.77k
    UINT64_C(1398806528), // J2_jumprfnewpt
505
5.77k
    UINT64_C(1631584256), // J2_jumprgtez
506
5.77k
    UINT64_C(1631588352), // J2_jumprgtezpt
507
5.77k
    UINT64_C(1639972864), // J2_jumprltez
508
5.77k
    UINT64_C(1639976960), // J2_jumprltezpt
509
5.77k
    UINT64_C(1635778560), // J2_jumprnz
510
5.77k
    UINT64_C(1635782656), // J2_jumprnzpt
511
5.77k
    UINT64_C(1396703232), // J2_jumprt
512
5.77k
    UINT64_C(1396705280), // J2_jumprtnew
513
5.77k
    UINT64_C(1396709376), // J2_jumprtnewpt
514
5.77k
    UINT64_C(1627389952), // J2_jumprz
515
5.77k
    UINT64_C(1627394048), // J2_jumprzpt
516
5.77k
    UINT64_C(1543503872), // J2_jumpt
517
5.77k
    UINT64_C(1543505920), // J2_jumptnew
518
5.77k
    UINT64_C(1543510016), // J2_jumptnewpt
519
5.77k
    UINT64_C(1761607680), // J2_loop0i
520
5.77k
    UINT64_C(1761607680), // J2_loop0iext
521
5.77k
    UINT64_C(1610612736), // J2_loop0r
522
5.77k
    UINT64_C(1610612736), // J2_loop0rext
523
5.77k
    UINT64_C(1763704832), // J2_loop1i
524
5.77k
    UINT64_C(1763704832), // J2_loop1iext
525
5.77k
    UINT64_C(1612709888), // J2_loop1r
526
5.77k
    UINT64_C(1612709888), // J2_loop1rext
527
5.77k
    UINT64_C(1772093440), // J2_ploop1si
528
5.77k
    UINT64_C(1621098496), // J2_ploop1sr
529
5.77k
    UINT64_C(1774190592), // J2_ploop2si
530
5.77k
    UINT64_C(1623195648), // J2_ploop2sr
531
5.77k
    UINT64_C(1776287744), // J2_ploop3si
532
5.77k
    UINT64_C(1625292800), // J2_ploop3sr
533
5.77k
    UINT64_C(541065216),  // J4_cmpeq_f_jumpnv_nt
534
5.77k
    UINT64_C(541073408),  // J4_cmpeq_f_jumpnv_t
535
5.77k
    UINT64_C(339738624),  // J4_cmpeq_fp0_jump_nt
536
5.77k
    UINT64_C(339746816),  // J4_cmpeq_fp0_jump_t
537
5.77k
    UINT64_C(339742720),  // J4_cmpeq_fp1_jump_nt
538
5.77k
    UINT64_C(339750912),  // J4_cmpeq_fp1_jump_t
539
5.77k
    UINT64_C(536870912),  // J4_cmpeq_t_jumpnv_nt
540
5.77k
    UINT64_C(536879104),  // J4_cmpeq_t_jumpnv_t
541
5.77k
    UINT64_C(335544320),  // J4_cmpeq_tp0_jump_nt
542
5.77k
    UINT64_C(335552512),  // J4_cmpeq_tp0_jump_t
543
5.77k
    UINT64_C(335548416),  // J4_cmpeq_tp1_jump_nt
544
5.77k
    UINT64_C(335556608),  // J4_cmpeq_tp1_jump_t
545
5.77k
    UINT64_C(608174080),  // J4_cmpeqi_f_jumpnv_nt
546
5.77k
    UINT64_C(608182272),  // J4_cmpeqi_f_jumpnv_t
547
5.77k
    UINT64_C(272629760),  // J4_cmpeqi_fp0_jump_nt
548
5.77k
    UINT64_C(272637952),  // J4_cmpeqi_fp0_jump_t
549
5.77k
    UINT64_C(306184192),  // J4_cmpeqi_fp1_jump_nt
550
5.77k
    UINT64_C(306192384),  // J4_cmpeqi_fp1_jump_t
551
5.77k
    UINT64_C(603979776),  // J4_cmpeqi_t_jumpnv_nt
552
5.77k
    UINT64_C(603987968),  // J4_cmpeqi_t_jumpnv_t
553
5.77k
    UINT64_C(268435456),  // J4_cmpeqi_tp0_jump_nt
554
5.77k
    UINT64_C(268443648),  // J4_cmpeqi_tp0_jump_t
555
5.77k
    UINT64_C(301989888),  // J4_cmpeqi_tp1_jump_nt
556
5.77k
    UINT64_C(301998080),  // J4_cmpeqi_tp1_jump_t
557
5.77k
    UINT64_C(641728512),  // J4_cmpeqn1_f_jumpnv_nt
558
5.77k
    UINT64_C(641736704),  // J4_cmpeqn1_f_jumpnv_t
559
5.77k
    UINT64_C(297795584),  // J4_cmpeqn1_fp0_jump_nt
560
5.77k
    UINT64_C(297803776),  // J4_cmpeqn1_fp0_jump_t
561
5.77k
    UINT64_C(331350016),  // J4_cmpeqn1_fp1_jump_nt
562
5.77k
    UINT64_C(331358208),  // J4_cmpeqn1_fp1_jump_t
563
5.77k
    UINT64_C(637534208),  // J4_cmpeqn1_t_jumpnv_nt
564
5.77k
    UINT64_C(637542400),  // J4_cmpeqn1_t_jumpnv_t
565
5.77k
    UINT64_C(293601280),  // J4_cmpeqn1_tp0_jump_nt
566
5.77k
    UINT64_C(293609472),  // J4_cmpeqn1_tp0_jump_t
567
5.77k
    UINT64_C(327155712),  // J4_cmpeqn1_tp1_jump_nt
568
5.77k
    UINT64_C(327163904),  // J4_cmpeqn1_tp1_jump_t
569
5.77k
    UINT64_C(549453824),  // J4_cmpgt_f_jumpnv_nt
570
5.77k
    UINT64_C(549462016),  // J4_cmpgt_f_jumpnv_t
571
5.77k
    UINT64_C(348127232),  // J4_cmpgt_fp0_jump_nt
572
5.77k
    UINT64_C(348135424),  // J4_cmpgt_fp0_jump_t
573
5.77k
    UINT64_C(348131328),  // J4_cmpgt_fp1_jump_nt
574
5.77k
    UINT64_C(348139520),  // J4_cmpgt_fp1_jump_t
575
5.77k
    UINT64_C(545259520),  // J4_cmpgt_t_jumpnv_nt
576
5.77k
    UINT64_C(545267712),  // J4_cmpgt_t_jumpnv_t
577
5.77k
    UINT64_C(343932928),  // J4_cmpgt_tp0_jump_nt
578
5.77k
    UINT64_C(343941120),  // J4_cmpgt_tp0_jump_t
579
5.77k
    UINT64_C(343937024),  // J4_cmpgt_tp1_jump_nt
580
5.77k
    UINT64_C(343945216),  // J4_cmpgt_tp1_jump_t
581
5.77k
    UINT64_C(616562688),  // J4_cmpgti_f_jumpnv_nt
582
5.77k
    UINT64_C(616570880),  // J4_cmpgti_f_jumpnv_t
583
5.77k
    UINT64_C(281018368),  // J4_cmpgti_fp0_jump_nt
584
5.77k
    UINT64_C(281026560),  // J4_cmpgti_fp0_jump_t
585
5.77k
    UINT64_C(314572800),  // J4_cmpgti_fp1_jump_nt
586
5.77k
    UINT64_C(314580992),  // J4_cmpgti_fp1_jump_t
587
5.77k
    UINT64_C(612368384),  // J4_cmpgti_t_jumpnv_nt
588
5.77k
    UINT64_C(612376576),  // J4_cmpgti_t_jumpnv_t
589
5.77k
    UINT64_C(276824064),  // J4_cmpgti_tp0_jump_nt
590
5.77k
    UINT64_C(276832256),  // J4_cmpgti_tp0_jump_t
591
5.77k
    UINT64_C(310378496),  // J4_cmpgti_tp1_jump_nt
592
5.77k
    UINT64_C(310386688),  // J4_cmpgti_tp1_jump_t
593
5.77k
    UINT64_C(650117120),  // J4_cmpgtn1_f_jumpnv_nt
594
5.77k
    UINT64_C(650125312),  // J4_cmpgtn1_f_jumpnv_t
595
5.77k
    UINT64_C(297795840),  // J4_cmpgtn1_fp0_jump_nt
596
5.77k
    UINT64_C(297804032),  // J4_cmpgtn1_fp0_jump_t
597
5.77k
    UINT64_C(331350272),  // J4_cmpgtn1_fp1_jump_nt
598
5.77k
    UINT64_C(331358464),  // J4_cmpgtn1_fp1_jump_t
599
5.77k
    UINT64_C(645922816),  // J4_cmpgtn1_t_jumpnv_nt
600
5.77k
    UINT64_C(645931008),  // J4_cmpgtn1_t_jumpnv_t
601
5.77k
    UINT64_C(293601536),  // J4_cmpgtn1_tp0_jump_nt
602
5.77k
    UINT64_C(293609728),  // J4_cmpgtn1_tp0_jump_t
603
5.77k
    UINT64_C(327155968),  // J4_cmpgtn1_tp1_jump_nt
604
5.77k
    UINT64_C(327164160),  // J4_cmpgtn1_tp1_jump_t
605
5.77k
    UINT64_C(557842432),  // J4_cmpgtu_f_jumpnv_nt
606
5.77k
    UINT64_C(557850624),  // J4_cmpgtu_f_jumpnv_t
607
5.77k
    UINT64_C(356515840),  // J4_cmpgtu_fp0_jump_nt
608
5.77k
    UINT64_C(356524032),  // J4_cmpgtu_fp0_jump_t
609
5.77k
    UINT64_C(356519936),  // J4_cmpgtu_fp1_jump_nt
610
5.77k
    UINT64_C(356528128),  // J4_cmpgtu_fp1_jump_t
611
5.77k
    UINT64_C(553648128),  // J4_cmpgtu_t_jumpnv_nt
612
5.77k
    UINT64_C(553656320),  // J4_cmpgtu_t_jumpnv_t
613
5.77k
    UINT64_C(352321536),  // J4_cmpgtu_tp0_jump_nt
614
5.77k
    UINT64_C(352329728),  // J4_cmpgtu_tp0_jump_t
615
5.77k
    UINT64_C(352325632),  // J4_cmpgtu_tp1_jump_nt
616
5.77k
    UINT64_C(352333824),  // J4_cmpgtu_tp1_jump_t
617
5.77k
    UINT64_C(624951296),  // J4_cmpgtui_f_jumpnv_nt
618
5.77k
    UINT64_C(624959488),  // J4_cmpgtui_f_jumpnv_t
619
5.77k
    UINT64_C(289406976),  // J4_cmpgtui_fp0_jump_nt
620
5.77k
    UINT64_C(289415168),  // J4_cmpgtui_fp0_jump_t
621
5.77k
    UINT64_C(322961408),  // J4_cmpgtui_fp1_jump_nt
622
5.77k
    UINT64_C(322969600),  // J4_cmpgtui_fp1_jump_t
623
5.77k
    UINT64_C(620756992),  // J4_cmpgtui_t_jumpnv_nt
624
5.77k
    UINT64_C(620765184),  // J4_cmpgtui_t_jumpnv_t
625
5.77k
    UINT64_C(285212672),  // J4_cmpgtui_tp0_jump_nt
626
5.77k
    UINT64_C(285220864),  // J4_cmpgtui_tp0_jump_t
627
5.77k
    UINT64_C(318767104),  // J4_cmpgtui_tp1_jump_nt
628
5.77k
    UINT64_C(318775296),  // J4_cmpgtui_tp1_jump_t
629
5.77k
    UINT64_C(566231040),  // J4_cmplt_f_jumpnv_nt
630
5.77k
    UINT64_C(566239232),  // J4_cmplt_f_jumpnv_t
631
5.77k
    UINT64_C(562036736),  // J4_cmplt_t_jumpnv_nt
632
5.77k
    UINT64_C(562044928),  // J4_cmplt_t_jumpnv_t
633
5.77k
    UINT64_C(574619648),  // J4_cmpltu_f_jumpnv_nt
634
5.77k
    UINT64_C(574627840),  // J4_cmpltu_f_jumpnv_t
635
5.77k
    UINT64_C(570425344),  // J4_cmpltu_t_jumpnv_nt
636
5.77k
    UINT64_C(570433536),  // J4_cmpltu_t_jumpnv_t
637
5.77k
    UINT64_C(1386217472), // J4_hintjumpr
638
5.77k
    UINT64_C(369098752),  // J4_jumpseti
639
5.77k
    UINT64_C(385875968),  // J4_jumpsetr
640
5.77k
    UINT64_C(633339904),  // J4_tstbit0_f_jumpnv_nt
641
5.77k
    UINT64_C(633348096),  // J4_tstbit0_f_jumpnv_t
642
5.77k
    UINT64_C(297796352),  // J4_tstbit0_fp0_jump_nt
643
5.77k
    UINT64_C(297804544),  // J4_tstbit0_fp0_jump_t
644
5.77k
    UINT64_C(331350784),  // J4_tstbit0_fp1_jump_nt
645
5.77k
    UINT64_C(331358976),  // J4_tstbit0_fp1_jump_t
646
5.77k
    UINT64_C(629145600),  // J4_tstbit0_t_jumpnv_nt
647
5.77k
    UINT64_C(629153792),  // J4_tstbit0_t_jumpnv_t
648
5.77k
    UINT64_C(293602048),  // J4_tstbit0_tp0_jump_nt
649
5.77k
    UINT64_C(293610240),  // J4_tstbit0_tp0_jump_t
650
5.77k
    UINT64_C(327156480),  // J4_tstbit0_tp1_jump_nt
651
5.77k
    UINT64_C(327164672),  // J4_tstbit0_tp1_jump_t
652
5.77k
    UINT64_C(1384120320), // JMPret
653
5.77k
    UINT64_C(1398800384), // JMPretf
654
5.77k
    UINT64_C(1398802432), // JMPretfnew
655
5.77k
    UINT64_C(1398806528), // JMPretfnewpt
656
5.77k
    UINT64_C(1396703232), // JMPrett
657
5.77k
    UINT64_C(1396705280), // JMPrettnew
658
5.77k
    UINT64_C(1396709376), // JMPrettnewpt
659
5.77k
    UINT64_C(2417885214), // L2_deallocframe
660
5.77k
    UINT64_C(2424307712), // L2_loadalignb_io
661
5.77k
    UINT64_C(2659188736), // L2_loadalignb_pbr
662
5.77k
    UINT64_C(2558525440), // L2_loadalignb_pci
663
5.77k
    UINT64_C(2558525952), // L2_loadalignb_pcr
664
5.77k
    UINT64_C(2592079872), // L2_loadalignb_pi
665
5.77k
    UINT64_C(2625634304), // L2_loadalignb_pr
666
5.77k
    UINT64_C(2420113408), // L2_loadalignh_io
667
5.77k
    UINT64_C(2654994432), // L2_loadalignh_pbr
668
5.77k
    UINT64_C(2554331136), // L2_loadalignh_pci
669
5.77k
    UINT64_C(2554331648), // L2_loadalignh_pcr
670
5.77k
    UINT64_C(2587885568), // L2_loadalignh_pi
671
5.77k
    UINT64_C(2621440000), // L2_loadalignh_pr
672
5.77k
    UINT64_C(2418016256), // L2_loadbsw2_io
673
5.77k
    UINT64_C(2652897280), // L2_loadbsw2_pbr
674
5.77k
    UINT64_C(2552233984), // L2_loadbsw2_pci
675
5.77k
    UINT64_C(2552234496), // L2_loadbsw2_pcr
676
5.77k
    UINT64_C(2585788416), // L2_loadbsw2_pi
677
5.77k
    UINT64_C(2619342848), // L2_loadbsw2_pr
678
5.77k
    UINT64_C(2430599168), // L2_loadbsw4_io
679
5.77k
    UINT64_C(2665480192), // L2_loadbsw4_pbr
680
5.77k
    UINT64_C(2564816896), // L2_loadbsw4_pci
681
5.77k
    UINT64_C(2564817408), // L2_loadbsw4_pcr
682
5.77k
    UINT64_C(2598371328), // L2_loadbsw4_pi
683
5.77k
    UINT64_C(2631925760), // L2_loadbsw4_pr
684
5.77k
    UINT64_C(2422210560), // L2_loadbzw2_io
685
5.77k
    UINT64_C(2657091584), // L2_loadbzw2_pbr
686
5.77k
    UINT64_C(2556428288), // L2_loadbzw2_pci
687
5.77k
    UINT64_C(2556428800), // L2_loadbzw2_pcr
688
5.77k
    UINT64_C(2589982720), // L2_loadbzw2_pi
689
5.77k
    UINT64_C(2623537152), // L2_loadbzw2_pr
690
5.77k
    UINT64_C(2426404864), // L2_loadbzw4_io
691
5.77k
    UINT64_C(2661285888), // L2_loadbzw4_pbr
692
5.77k
    UINT64_C(2560622592), // L2_loadbzw4_pci
693
5.77k
    UINT64_C(2560623104), // L2_loadbzw4_pcr
694
5.77k
    UINT64_C(2594177024), // L2_loadbzw4_pi
695
5.77k
    UINT64_C(2627731456), // L2_loadbzw4_pr
696
5.77k
    UINT64_C(2432696320), // L2_loadrb_io
697
5.77k
    UINT64_C(2667577344), // L2_loadrb_pbr
698
5.77k
    UINT64_C(0),
699
5.77k
    UINT64_C(2566914048), // L2_loadrb_pci
700
5.77k
    UINT64_C(0),
701
5.77k
    UINT64_C(2566914560), // L2_loadrb_pcr
702
5.77k
    UINT64_C(2600468480), // L2_loadrb_pi
703
5.77k
    UINT64_C(2634022912), // L2_loadrb_pr
704
5.77k
    UINT64_C(1224736768), // L2_loadrbgp
705
5.77k
    UINT64_C(2445279232), // L2_loadrd_io
706
5.77k
    UINT64_C(2680160256), // L2_loadrd_pbr
707
5.77k
    UINT64_C(0),
708
5.77k
    UINT64_C(2579496960), // L2_loadrd_pci
709
5.77k
    UINT64_C(0),
710
5.77k
    UINT64_C(2579497472), // L2_loadrd_pcr
711
5.77k
    UINT64_C(2613051392), // L2_loadrd_pi
712
5.77k
    UINT64_C(2646605824), // L2_loadrd_pr
713
5.77k
    UINT64_C(1237319680), // L2_loadrdgp
714
5.77k
    UINT64_C(2436890624), // L2_loadrh_io
715
5.77k
    UINT64_C(2671771648), // L2_loadrh_pbr
716
5.77k
    UINT64_C(0),
717
5.77k
    UINT64_C(2571108352), // L2_loadrh_pci
718
5.77k
    UINT64_C(0),
719
5.77k
    UINT64_C(2571108864), // L2_loadrh_pcr
720
5.77k
    UINT64_C(2604662784), // L2_loadrh_pi
721
5.77k
    UINT64_C(2638217216), // L2_loadrh_pr
722
5.77k
    UINT64_C(1228931072), // L2_loadrhgp
723
5.77k
    UINT64_C(2441084928), // L2_loadri_io
724
5.77k
    UINT64_C(2675965952), // L2_loadri_pbr
725
5.77k
    UINT64_C(0),
726
5.77k
    UINT64_C(2575302656), // L2_loadri_pci
727
5.77k
    UINT64_C(0),
728
5.77k
    UINT64_C(2575303168), // L2_loadri_pcr
729
5.77k
    UINT64_C(2608857088), // L2_loadri_pi
730
5.77k
    UINT64_C(2642411520), // L2_loadri_pr
731
5.77k
    UINT64_C(1233125376), // L2_loadrigp
732
5.77k
    UINT64_C(2434793472), // L2_loadrub_io
733
5.77k
    UINT64_C(2669674496), // L2_loadrub_pbr
734
5.77k
    UINT64_C(0),
735
5.77k
    UINT64_C(2569011200), // L2_loadrub_pci
736
5.77k
    UINT64_C(0),
737
5.77k
    UINT64_C(2569011712), // L2_loadrub_pcr
738
5.77k
    UINT64_C(2602565632), // L2_loadrub_pi
739
5.77k
    UINT64_C(2636120064), // L2_loadrub_pr
740
5.77k
    UINT64_C(1226833920), // L2_loadrubgp
741
5.77k
    UINT64_C(2438987776), // L2_loadruh_io
742
5.77k
    UINT64_C(2673868800), // L2_loadruh_pbr
743
5.77k
    UINT64_C(0),
744
5.77k
    UINT64_C(2573205504), // L2_loadruh_pci
745
5.77k
    UINT64_C(0),
746
5.77k
    UINT64_C(2573206016), // L2_loadruh_pcr
747
5.77k
    UINT64_C(2606759936), // L2_loadruh_pi
748
5.77k
    UINT64_C(2640314368), // L2_loadruh_pr
749
5.77k
    UINT64_C(1231028224), // L2_loadruhgp
750
5.77k
    UINT64_C(2449473536), // L2_loadw_locked
751
5.77k
    UINT64_C(1157627904), // L2_ploadrbf_io
752
5.77k
    UINT64_C(2600478720), // L2_ploadrbf_pi
753
5.77k
    UINT64_C(1191182336), // L2_ploadrbfnew_io
754
5.77k
    UINT64_C(2600482816), // L2_ploadrbfnew_pi
755
5.77k
    UINT64_C(1090519040), // L2_ploadrbt_io
756
5.77k
    UINT64_C(2600476672), // L2_ploadrbt_pi
757
5.77k
    UINT64_C(1124073472), // L2_ploadrbtnew_io
758
5.77k
    UINT64_C(2600480768), // L2_ploadrbtnew_pi
759
5.77k
    UINT64_C(1170210816), // L2_ploadrdf_io
760
5.77k
    UINT64_C(2613061632), // L2_ploadrdf_pi
761
5.77k
    UINT64_C(1203765248), // L2_ploadrdfnew_io
762
5.77k
    UINT64_C(2613065728), // L2_ploadrdfnew_pi
763
5.77k
    UINT64_C(1103101952), // L2_ploadrdt_io
764
5.77k
    UINT64_C(2613059584), // L2_ploadrdt_pi
765
5.77k
    UINT64_C(1136656384), // L2_ploadrdtnew_io
766
5.77k
    UINT64_C(2613063680), // L2_ploadrdtnew_pi
767
5.77k
    UINT64_C(1161822208), // L2_ploadrhf_io
768
5.77k
    UINT64_C(2604673024), // L2_ploadrhf_pi
769
5.77k
    UINT64_C(1195376640), // L2_ploadrhfnew_io
770
5.77k
    UINT64_C(2604677120), // L2_ploadrhfnew_pi
771
5.77k
    UINT64_C(1094713344), // L2_ploadrht_io
772
5.77k
    UINT64_C(2604670976), // L2_ploadrht_pi
773
5.77k
    UINT64_C(1128267776), // L2_ploadrhtnew_io
774
5.77k
    UINT64_C(2604675072), // L2_ploadrhtnew_pi
775
5.77k
    UINT64_C(1166016512), // L2_ploadrif_io
776
5.77k
    UINT64_C(2608867328), // L2_ploadrif_pi
777
5.77k
    UINT64_C(1199570944), // L2_ploadrifnew_io
778
5.77k
    UINT64_C(2608871424), // L2_ploadrifnew_pi
779
5.77k
    UINT64_C(1098907648), // L2_ploadrit_io
780
5.77k
    UINT64_C(2608865280), // L2_ploadrit_pi
781
5.77k
    UINT64_C(1132462080), // L2_ploadritnew_io
782
5.77k
    UINT64_C(2608869376), // L2_ploadritnew_pi
783
5.77k
    UINT64_C(1159725056), // L2_ploadrubf_io
784
5.77k
    UINT64_C(2602575872), // L2_ploadrubf_pi
785
5.77k
    UINT64_C(1193279488), // L2_ploadrubfnew_io
786
5.77k
    UINT64_C(2602579968), // L2_ploadrubfnew_pi
787
5.77k
    UINT64_C(1092616192), // L2_ploadrubt_io
788
5.77k
    UINT64_C(2602573824), // L2_ploadrubt_pi
789
5.77k
    UINT64_C(1126170624), // L2_ploadrubtnew_io
790
5.77k
    UINT64_C(2602577920), // L2_ploadrubtnew_pi
791
5.77k
    UINT64_C(1163919360), // L2_ploadruhf_io
792
5.77k
    UINT64_C(2606770176), // L2_ploadruhf_pi
793
5.77k
    UINT64_C(1197473792), // L2_ploadruhfnew_io
794
5.77k
    UINT64_C(2606774272), // L2_ploadruhfnew_pi
795
5.77k
    UINT64_C(1096810496), // L2_ploadruht_io
796
5.77k
    UINT64_C(2606768128), // L2_ploadruht_pi
797
5.77k
    UINT64_C(1130364928), // L2_ploadruhtnew_io
798
5.77k
    UINT64_C(2606772224), // L2_ploadruhtnew_pi
799
5.77k
    UINT64_C(1040187392), // L4_add_memopb_io
800
5.77k
    UINT64_C(1042284544), // L4_add_memoph_io
801
5.77k
    UINT64_C(1044381696), // L4_add_memopw_io
802
5.77k
    UINT64_C(1040187456), // L4_and_memopb_io
803
5.77k
    UINT64_C(1042284608), // L4_and_memoph_io
804
5.77k
    UINT64_C(1044381760), // L4_and_memopw_io
805
5.77k
    UINT64_C(1056964608), // L4_iadd_memopb_io
806
5.77k
    UINT64_C(1059061760), // L4_iadd_memoph_io
807
5.77k
    UINT64_C(1061158912), // L4_iadd_memopw_io
808
5.77k
    UINT64_C(1056964672), // L4_iand_memopb_io
809
5.77k
    UINT64_C(1059061824), // L4_iand_memoph_io
810
5.77k
    UINT64_C(1061158976), // L4_iand_memopw_io
811
5.77k
    UINT64_C(1056964704), // L4_ior_memopb_io
812
5.77k
    UINT64_C(1059061856), // L4_ior_memoph_io
813
5.77k
    UINT64_C(1061159008), // L4_ior_memopw_io
814
5.77k
    UINT64_C(1056964640), // L4_isub_memopb_io
815
5.77k
    UINT64_C(1059061792), // L4_isub_memoph_io
816
5.77k
    UINT64_C(1061158944), // L4_isub_memopw_io
817
5.77k
    UINT64_C(2592083968), // L4_loadalignb_ap
818
5.77k
    UINT64_C(2625638400), // L4_loadalignb_ur
819
5.77k
    UINT64_C(2587889664), // L4_loadalignh_ap
820
5.77k
    UINT64_C(2621444096), // L4_loadalignh_ur
821
5.77k
    UINT64_C(2585792512), // L4_loadbsw2_ap
822
5.77k
    UINT64_C(2619346944), // L4_loadbsw2_ur
823
5.77k
    UINT64_C(2598375424), // L4_loadbsw4_ap
824
5.77k
    UINT64_C(2631929856), // L4_loadbsw4_ur
825
5.77k
    UINT64_C(2589986816), // L4_loadbzw2_ap
826
5.77k
    UINT64_C(2623541248), // L4_loadbzw2_ur
827
5.77k
    UINT64_C(2594181120), // L4_loadbzw4_ap
828
5.77k
    UINT64_C(2627735552), // L4_loadbzw4_ur
829
5.77k
    UINT64_C(2449477632), // L4_loadd_locked
830
5.77k
    UINT64_C(1224736768), // L4_loadrb_abs
831
5.77k
    UINT64_C(2600472576), // L4_loadrb_ap
832
5.77k
    UINT64_C(973078528),  // L4_loadrb_rr
833
5.77k
    UINT64_C(2634027008), // L4_loadrb_ur
834
5.77k
    UINT64_C(1237319680), // L4_loadrd_abs
835
5.77k
    UINT64_C(2613055488), // L4_loadrd_ap
836
5.77k
    UINT64_C(985661440),  // L4_loadrd_rr
837
5.77k
    UINT64_C(2646609920), // L4_loadrd_ur
838
5.77k
    UINT64_C(1228931072), // L4_loadrh_abs
839
5.77k
    UINT64_C(2604666880), // L4_loadrh_ap
840
5.77k
    UINT64_C(977272832),  // L4_loadrh_rr
841
5.77k
    UINT64_C(2638221312), // L4_loadrh_ur
842
5.77k
    UINT64_C(1233125376), // L4_loadri_abs
843
5.77k
    UINT64_C(2608861184), // L4_loadri_ap
844
5.77k
    UINT64_C(981467136),  // L4_loadri_rr
845
5.77k
    UINT64_C(2642415616), // L4_loadri_ur
846
5.77k
    UINT64_C(1226833920), // L4_loadrub_abs
847
5.77k
    UINT64_C(2602569728), // L4_loadrub_ap
848
5.77k
    UINT64_C(975175680),  // L4_loadrub_rr
849
5.77k
    UINT64_C(2636124160), // L4_loadrub_ur
850
5.77k
    UINT64_C(1231028224), // L4_loadruh_abs
851
5.77k
    UINT64_C(2606764032), // L4_loadruh_ap
852
5.77k
    UINT64_C(979369984),  // L4_loadruh_rr
853
5.77k
    UINT64_C(2640318464), // L4_loadruh_ur
854
5.77k
    UINT64_C(1040187488), // L4_or_memopb_io
855
5.77k
    UINT64_C(1042284640), // L4_or_memoph_io
856
5.77k
    UINT64_C(1044381792), // L4_or_memopw_io
857
5.77k
    UINT64_C(2667587712), // L4_ploadrbf_abs
858
5.77k
    UINT64_C(822083584),  // L4_ploadrbf_rr
859
5.77k
    UINT64_C(2667591808), // L4_ploadrbfnew_abs
860
5.77k
    UINT64_C(855638016),  // L4_ploadrbfnew_rr
861
5.77k
    UINT64_C(2667585664), // L4_ploadrbt_abs
862
5.77k
    UINT64_C(805306368),  // L4_ploadrbt_rr
863
5.77k
    UINT64_C(2667589760), // L4_ploadrbtnew_abs
864
5.77k
    UINT64_C(838860800),  // L4_ploadrbtnew_rr
865
5.77k
    UINT64_C(2680170624), // L4_ploadrdf_abs
866
5.77k
    UINT64_C(834666496),  // L4_ploadrdf_rr
867
5.77k
    UINT64_C(2680174720), // L4_ploadrdfnew_abs
868
5.77k
    UINT64_C(868220928),  // L4_ploadrdfnew_rr
869
5.77k
    UINT64_C(2680168576), // L4_ploadrdt_abs
870
5.77k
    UINT64_C(817889280),  // L4_ploadrdt_rr
871
5.77k
    UINT64_C(2680172672), // L4_ploadrdtnew_abs
872
5.77k
    UINT64_C(851443712),  // L4_ploadrdtnew_rr
873
5.77k
    UINT64_C(2671782016), // L4_ploadrhf_abs
874
5.77k
    UINT64_C(826277888),  // L4_ploadrhf_rr
875
5.77k
    UINT64_C(2671786112), // L4_ploadrhfnew_abs
876
5.77k
    UINT64_C(859832320),  // L4_ploadrhfnew_rr
877
5.77k
    UINT64_C(2671779968), // L4_ploadrht_abs
878
5.77k
    UINT64_C(809500672),  // L4_ploadrht_rr
879
5.77k
    UINT64_C(2671784064), // L4_ploadrhtnew_abs
880
5.77k
    UINT64_C(843055104),  // L4_ploadrhtnew_rr
881
5.77k
    UINT64_C(2675976320), // L4_ploadrif_abs
882
5.77k
    UINT64_C(830472192),  // L4_ploadrif_rr
883
5.77k
    UINT64_C(2675980416), // L4_ploadrifnew_abs
884
5.77k
    UINT64_C(864026624),  // L4_ploadrifnew_rr
885
5.77k
    UINT64_C(2675974272), // L4_ploadrit_abs
886
5.77k
    UINT64_C(813694976),  // L4_ploadrit_rr
887
5.77k
    UINT64_C(2675978368), // L4_ploadritnew_abs
888
5.77k
    UINT64_C(847249408),  // L4_ploadritnew_rr
889
5.77k
    UINT64_C(2669684864), // L4_ploadrubf_abs
890
5.77k
    UINT64_C(824180736),  // L4_ploadrubf_rr
891
5.77k
    UINT64_C(2669688960), // L4_ploadrubfnew_abs
892
5.77k
    UINT64_C(857735168),  // L4_ploadrubfnew_rr
893
5.77k
    UINT64_C(2669682816), // L4_ploadrubt_abs
894
5.77k
    UINT64_C(807403520),  // L4_ploadrubt_rr
895
5.77k
    UINT64_C(2669686912), // L4_ploadrubtnew_abs
896
5.77k
    UINT64_C(840957952),  // L4_ploadrubtnew_rr
897
5.77k
    UINT64_C(2673879168), // L4_ploadruhf_abs
898
5.77k
    UINT64_C(828375040),  // L4_ploadruhf_rr
899
5.77k
    UINT64_C(2673883264), // L4_ploadruhfnew_abs
900
5.77k
    UINT64_C(861929472),  // L4_ploadruhfnew_rr
901
5.77k
    UINT64_C(2673877120), // L4_ploadruht_abs
902
5.77k
    UINT64_C(811597824),  // L4_ploadruht_rr
903
5.77k
    UINT64_C(2673881216), // L4_ploadruhtnew_abs
904
5.77k
    UINT64_C(845152256),  // L4_ploadruhtnew_rr
905
5.77k
    UINT64_C(2518548510), // L4_return
906
5.77k
    UINT64_C(2518560798), // L4_return_f
907
5.77k
    UINT64_C(2518558750), // L4_return_fnew_pnt
908
5.77k
    UINT64_C(2518562846), // L4_return_fnew_pt
909
5.77k
    UINT64_C(2518552606), // L4_return_t
910
5.77k
    UINT64_C(2518550558), // L4_return_tnew_pnt
911
5.77k
    UINT64_C(2518554654), // L4_return_tnew_pt
912
5.77k
    UINT64_C(1040187424), // L4_sub_memopb_io
913
5.77k
    UINT64_C(1042284576), // L4_sub_memoph_io
914
5.77k
    UINT64_C(1044381728), // L4_sub_memopw_io
915
5.77k
    UINT64_C(0),
916
5.77k
    UINT64_C(0),
917
5.77k
    UINT64_C(0),
918
5.77k
    UINT64_C(0),
919
5.77k
    UINT64_C(0),
920
5.77k
    UINT64_C(0),
921
5.77k
    UINT64_C(0),
922
5.77k
    UINT64_C(0),
923
5.77k
    UINT64_C(0),
924
5.77k
    UINT64_C(0),
925
5.77k
    UINT64_C(0),
926
5.77k
    UINT64_C(0),
927
5.77k
    UINT64_C(1897922560), // LO
928
5.77k
    UINT64_C(0),  // LO_GOT
929
5.77k
    UINT64_C(0),  // LO_GOTREL
930
5.77k
    UINT64_C(1897922560), // LO_H
931
5.77k
    UINT64_C(0),  // LO_PIC
932
5.77k
    UINT64_C(4009754656), // M2_acci
933
5.77k
    UINT64_C(3791650816), // M2_accii
934
5.77k
    UINT64_C(3875536928), // M2_cmaci_s0
935
5.77k
    UINT64_C(3875536960), // M2_cmacr_s0
936
5.77k
    UINT64_C(3875537088), // M2_cmacs_s0
937
5.77k
    UINT64_C(3883925696), // M2_cmacs_s1
938
5.77k
    UINT64_C(3879731392), // M2_cmacsc_s0
939
5.77k
    UINT64_C(3888120000), // M2_cmacsc_s1
940
5.77k
    UINT64_C(3841982496), // M2_cmpyi_s0
941
5.77k
    UINT64_C(3841982528), // M2_cmpyr_s0
942
5.77k
    UINT64_C(3978297536), // M2_cmpyrs_s0
943
5.77k
    UINT64_C(3986686144), // M2_cmpyrs_s1
944
5.77k
    UINT64_C(3982491840), // M2_cmpyrsc_s0
945
5.77k
    UINT64_C(3990880448), // M2_cmpyrsc_s1
946
5.77k
    UINT64_C(3841982656), // M2_cmpys_s0
947
5.77k
    UINT64_C(3850371264), // M2_cmpys_s1
948
5.77k
    UINT64_C(3846176960), // M2_cmpysc_s0
949
5.77k
    UINT64_C(3854565568), // M2_cmpysc_s1
950
5.77k
    UINT64_C(3875537120), // M2_cnacs_s0
951
5.77k
    UINT64_C(3883925728), // M2_cnacs_s1
952
5.77k
    UINT64_C(3879731424), // M2_cnacsc_s0
953
5.77k
    UINT64_C(3888120032), // M2_cnacsc_s1
954
5.77k
    UINT64_C(3875536896), // M2_dpmpyss_acc_s0
955
5.77k
    UINT64_C(3877634048), // M2_dpmpyss_nac_s0
956
5.77k
    UINT64_C(3978297376), // M2_dpmpyss_rnd_s0
957
5.77k
    UINT64_C(3841982464), // M2_dpmpyss_s0
958
5.77k
    UINT64_C(3879731200), // M2_dpmpyuu_acc_s0
959
5.77k
    UINT64_C(3881828352), // M2_dpmpyuu_nac_s0
960
5.77k
    UINT64_C(3846176768), // M2_dpmpyuu_s0
961
5.77k
    UINT64_C(3986686080), // M2_hmmpyh_rs1
962
5.77k
    UINT64_C(3986685952), // M2_hmmpyh_s1
963
5.77k
    UINT64_C(3990880384), // M2_hmmpyl_rs1
964
5.77k
    UINT64_C(3986685984), // M2_hmmpyl_s1
965
5.77k
    UINT64_C(4009754624), // M2_maci
966
5.77k
    UINT64_C(3783262208), // M2_macsin
967
5.77k
    UINT64_C(3774873600), // M2_macsip
968
5.77k
    UINT64_C(3927965920), // M2_mmachs_rs0
969
5.77k
    UINT64_C(3936354528), // M2_mmachs_rs1
970
5.77k
    UINT64_C(3925868768), // M2_mmachs_s0
971
5.77k
    UINT64_C(3934257376), // M2_mmachs_s1
972
5.77k
    UINT64_C(3927965856), // M2_mmacls_rs0
973
5.77k
    UINT64_C(3936354464), // M2_mmacls_rs1
974
5.77k
    UINT64_C(3925868704), // M2_mmacls_s0
975
5.77k
    UINT64_C(3934257312), // M2_mmacls_s1
976
5.77k
    UINT64_C(3932160224), // M2_mmacuhs_rs0
977
5.77k
    UINT64_C(3940548832), // M2_mmacuhs_rs1
978
5.77k
    UINT64_C(3930063072), // M2_mmacuhs_s0
979
5.77k
    UINT64_C(3938451680), // M2_mmacuhs_s1
980
5.77k
    UINT64_C(3932160160), // M2_mmaculs_rs0
981
5.77k
    UINT64_C(3940548768), // M2_mmaculs_rs1
982
5.77k
    UINT64_C(3930063008), // M2_mmaculs_s0
983
5.77k
    UINT64_C(3938451616), // M2_mmaculs_s1
984
5.77k
    UINT64_C(3894411488), // M2_mmpyh_rs0
985
5.77k
    UINT64_C(3902800096), // M2_mmpyh_rs1
986
5.77k
    UINT64_C(3892314336), // M2_mmpyh_s0
987
5.77k
    UINT64_C(3900702944), // M2_mmpyh_s1
988
5.77k
    UINT64_C(3894411424), // M2_mmpyl_rs0
989
5.77k
    UINT64_C(3902800032), // M2_mmpyl_rs1
990
5.77k
    UINT64_C(3892314272), // M2_mmpyl_s0
991
5.77k
    UINT64_C(3900702880), // M2_mmpyl_s1
992
5.77k
    UINT64_C(3898605792), // M2_mmpyuh_rs0
993
5.77k
    UINT64_C(3906994400), // M2_mmpyuh_rs1
994
5.77k
    UINT64_C(3896508640), // M2_mmpyuh_s0
995
5.77k
    UINT64_C(3904897248), // M2_mmpyuh_s1
996
5.77k
    UINT64_C(3898605728), // M2_mmpyul_rs0
997
5.77k
    UINT64_C(3906994336), // M2_mmpyul_rs1
998
5.77k
    UINT64_C(3896508576), // M2_mmpyul_s0
999
5.77k
    UINT64_C(3904897184), // M2_mmpyul_s1
1000
5.77k
    UINT64_C(3992977504), // M2_mpy_acc_hh_s0
1001
5.77k
    UINT64_C(4001366112), // M2_mpy_acc_hh_s1
1002
5.77k
    UINT64_C(3992977472), // M2_mpy_acc_hl_s0
1003
5.77k
    UINT64_C(4001366080), // M2_mpy_acc_hl_s1
1004
5.77k
    UINT64_C(3992977440), // M2_mpy_acc_lh_s0
1005
5.77k
    UINT64_C(4001366048), // M2_mpy_acc_lh_s1
1006
5.77k
    UINT64_C(3992977408), // M2_mpy_acc_ll_s0
1007
5.77k
    UINT64_C(4001366016), // M2_mpy_acc_ll_s1
1008
5.77k
    UINT64_C(3992977632), // M2_mpy_acc_sat_hh_s0
1009
5.77k
    UINT64_C(4001366240), // M2_mpy_acc_sat_hh_s1
1010
5.77k
    UINT64_C(3992977600), // M2_mpy_acc_sat_hl_s0
1011
5.77k
    UINT64_C(4001366208), // M2_mpy_acc_sat_hl_s1
1012
5.77k
    UINT64_C(3992977568), // M2_mpy_acc_sat_lh_s0
1013
5.77k
    UINT64_C(4001366176), // M2_mpy_acc_sat_lh_s1
1014
5.77k
    UINT64_C(3992977536), // M2_mpy_acc_sat_ll_s0
1015
5.77k
    UINT64_C(4001366144), // M2_mpy_acc_sat_ll_s1
1016
5.77k
    UINT64_C(3959423072), // M2_mpy_hh_s0
1017
5.77k
    UINT64_C(3967811680), // M2_mpy_hh_s1
1018
5.77k
    UINT64_C(3959423040), // M2_mpy_hl_s0
1019
5.77k
    UINT64_C(3967811648), // M2_mpy_hl_s1
1020
5.77k
    UINT64_C(3959423008), // M2_mpy_lh_s0
1021
5.77k
    UINT64_C(3967811616), // M2_mpy_lh_s1
1022
5.77k
    UINT64_C(3959422976), // M2_mpy_ll_s0
1023
5.77k
    UINT64_C(3967811584), // M2_mpy_ll_s1
1024
5.77k
    UINT64_C(3995074656), // M2_mpy_nac_hh_s0
1025
5.77k
    UINT64_C(4003463264), // M2_mpy_nac_hh_s1
1026
5.77k
    UINT64_C(3995074624), // M2_mpy_nac_hl_s0
1027
5.77k
    UINT64_C(4003463232), // M2_mpy_nac_hl_s1
1028
5.77k
    UINT64_C(3995074592), // M2_mpy_nac_lh_s0
1029
5.77k
    UINT64_C(4003463200), // M2_mpy_nac_lh_s1
1030
5.77k
    UINT64_C(3995074560), // M2_mpy_nac_ll_s0
1031
5.77k
    UINT64_C(4003463168), // M2_mpy_nac_ll_s1
1032
5.77k
    UINT64_C(3995074784), // M2_mpy_nac_sat_hh_s0
1033
5.77k
    UINT64_C(4003463392), // M2_mpy_nac_sat_hh_s1
1034
5.77k
    UINT64_C(3995074752), // M2_mpy_nac_sat_hl_s0
1035
5.77k
    UINT64_C(4003463360), // M2_mpy_nac_sat_hl_s1
1036
5.77k
    UINT64_C(3995074720), // M2_mpy_nac_sat_lh_s0
1037
5.77k
    UINT64_C(4003463328), // M2_mpy_nac_sat_lh_s1
1038
5.77k
    UINT64_C(3995074688), // M2_mpy_nac_sat_ll_s0
1039
5.77k
    UINT64_C(4003463296), // M2_mpy_nac_sat_ll_s1
1040
5.77k
    UINT64_C(3961520224), // M2_mpy_rnd_hh_s0
1041
5.77k
    UINT64_C(3969908832), // M2_mpy_rnd_hh_s1
1042
5.77k
    UINT64_C(3961520192), // M2_mpy_rnd_hl_s0
1043
5.77k
    UINT64_C(3969908800), // M2_mpy_rnd_hl_s1
1044
5.77k
    UINT64_C(3961520160), // M2_mpy_rnd_lh_s0
1045
5.77k
    UINT64_C(3969908768), // M2_mpy_rnd_lh_s1
1046
5.77k
    UINT64_C(3961520128), // M2_mpy_rnd_ll_s0
1047
5.77k
    UINT64_C(3969908736), // M2_mpy_rnd_ll_s1
1048
5.77k
    UINT64_C(3959423200), // M2_mpy_sat_hh_s0
1049
5.77k
    UINT64_C(3967811808), // M2_mpy_sat_hh_s1
1050
5.77k
    UINT64_C(3959423168), // M2_mpy_sat_hl_s0
1051
5.77k
    UINT64_C(3967811776), // M2_mpy_sat_hl_s1
1052
5.77k
    UINT64_C(3959423136), // M2_mpy_sat_lh_s0
1053
5.77k
    UINT64_C(3967811744), // M2_mpy_sat_lh_s1
1054
5.77k
    UINT64_C(3959423104), // M2_mpy_sat_ll_s0
1055
5.77k
    UINT64_C(3967811712), // M2_mpy_sat_ll_s1
1056
5.77k
    UINT64_C(3961520352), // M2_mpy_sat_rnd_hh_s0
1057
5.77k
    UINT64_C(3969908960), // M2_mpy_sat_rnd_hh_s1
1058
5.77k
    UINT64_C(3961520320), // M2_mpy_sat_rnd_hl_s0
1059
5.77k
    UINT64_C(3969908928), // M2_mpy_sat_rnd_hl_s1
1060
5.77k
    UINT64_C(3961520288), // M2_mpy_sat_rnd_lh_s0
1061
5.77k
    UINT64_C(3969908896), // M2_mpy_sat_rnd_lh_s1
1062
5.77k
    UINT64_C(3961520256), // M2_mpy_sat_rnd_ll_s0
1063
5.77k
    UINT64_C(3969908864), // M2_mpy_sat_rnd_ll_s1
1064
5.77k
    UINT64_C(3976200224), // M2_mpy_up
1065
5.77k
    UINT64_C(3986686016), // M2_mpy_up_s1
1066
5.77k
    UINT64_C(3990880256), // M2_mpy_up_s1_sat
1067
5.77k
    UINT64_C(3858759776), // M2_mpyd_acc_hh_s0
1068
5.77k
    UINT64_C(3867148384), // M2_mpyd_acc_hh_s1
1069
5.77k
    UINT64_C(3858759744), // M2_mpyd_acc_hl_s0
1070
5.77k
    UINT64_C(3867148352), // M2_mpyd_acc_hl_s1
1071
5.77k
    UINT64_C(3858759712), // M2_mpyd_acc_lh_s0
1072
5.77k
    UINT64_C(3867148320), // M2_mpyd_acc_lh_s1
1073
5.77k
    UINT64_C(3858759680), // M2_mpyd_acc_ll_s0
1074
5.77k
    UINT64_C(3867148288), // M2_mpyd_acc_ll_s1
1075
5.77k
    UINT64_C(3825205344), // M2_mpyd_hh_s0
1076
5.77k
    UINT64_C(3833593952), // M2_mpyd_hh_s1
1077
5.77k
    UINT64_C(3825205312), // M2_mpyd_hl_s0
1078
5.77k
    UINT64_C(3833593920), // M2_mpyd_hl_s1
1079
5.77k
    UINT64_C(3825205280), // M2_mpyd_lh_s0
1080
5.77k
    UINT64_C(3833593888), // M2_mpyd_lh_s1
1081
5.77k
    UINT64_C(3825205248), // M2_mpyd_ll_s0
1082
5.77k
    UINT64_C(3833593856), // M2_mpyd_ll_s1
1083
5.77k
    UINT64_C(3860856928), // M2_mpyd_nac_hh_s0
1084
5.77k
    UINT64_C(3869245536), // M2_mpyd_nac_hh_s1
1085
5.77k
    UINT64_C(3860856896), // M2_mpyd_nac_hl_s0
1086
5.77k
    UINT64_C(3869245504), // M2_mpyd_nac_hl_s1
1087
5.77k
    UINT64_C(3860856864), // M2_mpyd_nac_lh_s0
1088
5.77k
    UINT64_C(3869245472), // M2_mpyd_nac_lh_s1
1089
5.77k
    UINT64_C(3860856832), // M2_mpyd_nac_ll_s0
1090
5.77k
    UINT64_C(3869245440), // M2_mpyd_nac_ll_s1
1091
5.77k
    UINT64_C(3827302496), // M2_mpyd_rnd_hh_s0
1092
5.77k
    UINT64_C(3835691104), // M2_mpyd_rnd_hh_s1
1093
5.77k
    UINT64_C(3827302464), // M2_mpyd_rnd_hl_s0
1094
5.77k
    UINT64_C(3835691072), // M2_mpyd_rnd_hl_s1
1095
5.77k
    UINT64_C(3827302432), // M2_mpyd_rnd_lh_s0
1096
5.77k
    UINT64_C(3835691040), // M2_mpyd_rnd_lh_s1
1097
5.77k
    UINT64_C(3827302400), // M2_mpyd_rnd_ll_s0
1098
5.77k
    UINT64_C(3835691008), // M2_mpyd_rnd_ll_s1
1099
5.77k
    UINT64_C(3976200192), // M2_mpyi
1100
5.77k
    UINT64_C(3766484992), // M2_mpysin
1101
5.77k
    UINT64_C(3758096384), // M2_mpysip
1102
5.77k
    UINT64_C(0),  // M2_mpysmi
1103
5.77k
    UINT64_C(3982491680), // M2_mpysu_up
1104
5.77k
    UINT64_C(3997171808), // M2_mpyu_acc_hh_s0
1105
5.77k
    UINT64_C(4005560416), // M2_mpyu_acc_hh_s1
1106
5.77k
    UINT64_C(3997171776), // M2_mpyu_acc_hl_s0
1107
5.77k
    UINT64_C(4005560384), // M2_mpyu_acc_hl_s1
1108
5.77k
    UINT64_C(3997171744), // M2_mpyu_acc_lh_s0
1109
5.77k
    UINT64_C(4005560352), // M2_mpyu_acc_lh_s1
1110
5.77k
    UINT64_C(3997171712), // M2_mpyu_acc_ll_s0
1111
5.77k
    UINT64_C(4005560320), // M2_mpyu_acc_ll_s1
1112
5.77k
    UINT64_C(3963617376), // M2_mpyu_hh_s0
1113
5.77k
    UINT64_C(3972005984), // M2_mpyu_hh_s1
1114
5.77k
    UINT64_C(3963617344), // M2_mpyu_hl_s0
1115
5.77k
    UINT64_C(3972005952), // M2_mpyu_hl_s1
1116
5.77k
    UINT64_C(3963617312), // M2_mpyu_lh_s0
1117
5.77k
    UINT64_C(3972005920), // M2_mpyu_lh_s1
1118
5.77k
    UINT64_C(3963617280), // M2_mpyu_ll_s0
1119
5.77k
    UINT64_C(3972005888), // M2_mpyu_ll_s1
1120
5.77k
    UINT64_C(3999268960), // M2_mpyu_nac_hh_s0
1121
5.77k
    UINT64_C(4007657568), // M2_mpyu_nac_hh_s1
1122
5.77k
    UINT64_C(3999268928), // M2_mpyu_nac_hl_s0
1123
5.77k
    UINT64_C(4007657536), // M2_mpyu_nac_hl_s1
1124
5.77k
    UINT64_C(3999268896), // M2_mpyu_nac_lh_s0
1125
5.77k
    UINT64_C(4007657504), // M2_mpyu_nac_lh_s1
1126
5.77k
    UINT64_C(3999268864), // M2_mpyu_nac_ll_s0
1127
5.77k
    UINT64_C(4007657472), // M2_mpyu_nac_ll_s1
1128
5.77k
    UINT64_C(3980394528), // M2_mpyu_up
1129
5.77k
    UINT64_C(3862954080), // M2_mpyud_acc_hh_s0
1130
5.77k
    UINT64_C(3871342688), // M2_mpyud_acc_hh_s1
1131
5.77k
    UINT64_C(3862954048), // M2_mpyud_acc_hl_s0
1132
5.77k
    UINT64_C(3871342656), // M2_mpyud_acc_hl_s1
1133
5.77k
    UINT64_C(3862954016), // M2_mpyud_acc_lh_s0
1134
5.77k
    UINT64_C(3871342624), // M2_mpyud_acc_lh_s1
1135
5.77k
    UINT64_C(3862953984), // M2_mpyud_acc_ll_s0
1136
5.77k
    UINT64_C(3871342592), // M2_mpyud_acc_ll_s1
1137
5.77k
    UINT64_C(3829399648), // M2_mpyud_hh_s0
1138
5.77k
    UINT64_C(3837788256), // M2_mpyud_hh_s1
1139
5.77k
    UINT64_C(3829399616), // M2_mpyud_hl_s0
1140
5.77k
    UINT64_C(3837788224), // M2_mpyud_hl_s1
1141
5.77k
    UINT64_C(3829399584), // M2_mpyud_lh_s0
1142
5.77k
    UINT64_C(3837788192), // M2_mpyud_lh_s1
1143
5.77k
    UINT64_C(3829399552), // M2_mpyud_ll_s0
1144
5.77k
    UINT64_C(3837788160), // M2_mpyud_ll_s1
1145
5.77k
    UINT64_C(3865051232), // M2_mpyud_nac_hh_s0
1146
5.77k
    UINT64_C(3873439840), // M2_mpyud_nac_hh_s1
1147
5.77k
    UINT64_C(3865051200), // M2_mpyud_nac_hl_s0
1148
5.77k
    UINT64_C(3873439808), // M2_mpyud_nac_hl_s1
1149
5.77k
    UINT64_C(3865051168), // M2_mpyud_nac_lh_s0
1150
5.77k
    UINT64_C(3873439776), // M2_mpyud_nac_lh_s1
1151
5.77k
    UINT64_C(3865051136), // M2_mpyud_nac_ll_s0
1152
5.77k
    UINT64_C(3873439744), // M2_mpyud_nac_ll_s1
1153
5.77k
    UINT64_C(0),  // M2_mpyui
1154
5.77k
    UINT64_C(4018143264), // M2_nacci
1155
5.77k
    UINT64_C(3800039424), // M2_naccii
1156
5.77k
    UINT64_C(4009754720), // M2_subacc
1157
5.77k
    UINT64_C(3898605568), // M2_vabsdiffh
1158
5.77k
    UINT64_C(3894411264), // M2_vabsdiffw
1159
5.77k
    UINT64_C(3930062976), // M2_vcmac_s0_sat_i
1160
5.77k
    UINT64_C(3927965824), // M2_vcmac_s0_sat_r
1161
5.77k
    UINT64_C(3896508608), // M2_vcmpy_s0_sat_i
1162
5.77k
    UINT64_C(3894411456), // M2_vcmpy_s0_sat_r
1163
5.77k
    UINT64_C(3904897216), // M2_vcmpy_s1_sat_i
1164
5.77k
    UINT64_C(3902800064), // M2_vcmpy_s1_sat_r
1165
5.77k
    UINT64_C(3925868672), // M2_vdmacs_s0
1166
5.77k
    UINT64_C(3934257280), // M2_vdmacs_s1
1167
5.77k
    UINT64_C(3909091328), // M2_vdmpyrs_s0
1168
5.77k
    UINT64_C(3917479936), // M2_vdmpyrs_s1
1169
5.77k
    UINT64_C(3892314240), // M2_vdmpys_s0
1170
5.77k
    UINT64_C(3900702848), // M2_vdmpys_s1
1171
5.77k
    UINT64_C(3877634080), // M2_vmac2
1172
5.77k
    UINT64_C(3927965760), // M2_vmac2es
1173
5.77k
    UINT64_C(3925868736), // M2_vmac2es_s0
1174
5.77k
    UINT64_C(3934257344), // M2_vmac2es_s1
1175
5.77k
    UINT64_C(3875537056), // M2_vmac2s_s0
1176
5.77k
    UINT64_C(3883925664), // M2_vmac2s_s1
1177
5.77k
    UINT64_C(3881828512), // M2_vmac2su_s0
1178
5.77k
    UINT64_C(3890217120), // M2_vmac2su_s1
1179
5.77k
    UINT64_C(3892314304), // M2_vmpy2es_s0
1180
5.77k
    UINT64_C(3900702912), // M2_vmpy2es_s1
1181
5.77k
    UINT64_C(3841982624), // M2_vmpy2s_s0
1182
5.77k
    UINT64_C(3978297568), // M2_vmpy2s_s0pack
1183
5.77k
    UINT64_C(3850371232), // M2_vmpy2s_s1
1184
5.77k
    UINT64_C(3986686176), // M2_vmpy2s_s1pack
1185
5.77k
    UINT64_C(3841982688), // M2_vmpy2su_s0
1186
5.77k
    UINT64_C(3850371296), // M2_vmpy2su_s1
1187
5.77k
    UINT64_C(3911188704), // M2_vraddh
1188
5.77k
    UINT64_C(3909091360), // M2_vradduh
1189
5.77k
    UINT64_C(3925868544), // M2_vrcmaci_s0
1190
5.77k
    UINT64_C(3930062848), // M2_vrcmaci_s0c
1191
5.77k
    UINT64_C(3925868576), // M2_vrcmacr_s0
1192
5.77k
    UINT64_C(3932160032), // M2_vrcmacr_s0c
1193
5.77k
    UINT64_C(3892314112), // M2_vrcmpyi_s0
1194
5.77k
    UINT64_C(3896508416), // M2_vrcmpyi_s0c
1195
5.77k
    UINT64_C(3892314144), // M2_vrcmpyr_s0
1196
5.77k
    UINT64_C(3898605600), // M2_vrcmpyr_s0c
1197
5.77k
    UINT64_C(0),  // M2_vrcmpys_acc_s1
1198
5.77k
    UINT64_C(3936354432), // M2_vrcmpys_acc_s1_h
1199
5.77k
    UINT64_C(3940548736), // M2_vrcmpys_acc_s1_l
1200
5.77k
    UINT64_C(0),  // M2_vrcmpys_s1
1201
5.77k
    UINT64_C(3902800000), // M2_vrcmpys_s1_h
1202
5.77k
    UINT64_C(3906994304), // M2_vrcmpys_s1_l
1203
5.77k
    UINT64_C(0),  // M2_vrcmpys_s1rp
1204
5.77k
    UINT64_C(3919577280), // M2_vrcmpys_s1rp_h
1205
5.77k
    UINT64_C(3919577312), // M2_vrcmpys_s1rp_l
1206
5.77k
    UINT64_C(3925868608), // M2_vrmac_s0
1207
5.77k
    UINT64_C(3892314176), // M2_vrmpy_s0
1208
5.77k
    UINT64_C(4018143328), // M2_xor_xacc
1209
5.77k
    UINT64_C(4013948928), // M4_and_and
1210
5.77k
    UINT64_C(4011851808), // M4_and_andn
1211
5.77k
    UINT64_C(4013948960), // M4_and_or
1212
5.77k
    UINT64_C(4013948992), // M4_and_xor
1213
5.77k
    UINT64_C(3305111680), // M4_cmpyi_wh
1214
5.77k
    UINT64_C(3305111712), // M4_cmpyi_whc
1215
5.77k
    UINT64_C(3305111744), // M4_cmpyr_wh
1216
5.77k
    UINT64_C(3305111776), // M4_cmpyr_whc
1217
5.77k
    UINT64_C(4016046080), // M4_mac_up_s1_sat
1218
5.77k
    UINT64_C(3623878656), // M4_mpyri_addi
1219
5.77k
    UINT64_C(3749707776), // M4_mpyri_addr
1220
5.77k
    UINT64_C(3741319168), // M4_mpyri_addr_u2
1221
5.77k
    UINT64_C(3607101440), // M4_mpyrr_addi
1222
5.77k
    UINT64_C(3808428032), // M4_mpyrr_addr
1223
5.77k
    UINT64_C(4016046112), // M4_nac_up_s1_sat
1224
5.77k
    UINT64_C(4013949024), // M4_or_and
1225
5.77k
    UINT64_C(4011851776), // M4_or_andn
1226
5.77k
    UINT64_C(4022337536), // M4_or_or
1227
5.77k
    UINT64_C(4022337568), // M4_or_xor
1228
5.77k
    UINT64_C(3846176992), // M4_pmpyw
1229
5.77k
    UINT64_C(3877634272), // M4_pmpyw_acc
1230
5.77k
    UINT64_C(3854565600), // M4_vpmpyh
1231
5.77k
    UINT64_C(3886022880), // M4_vpmpyh_acc
1232
5.77k
    UINT64_C(3927965888), // M4_vrmpyeh_acc_s0
1233
5.77k
    UINT64_C(3936354496), // M4_vrmpyeh_acc_s1
1234
5.77k
    UINT64_C(3896508544), // M4_vrmpyeh_s0
1235
5.77k
    UINT64_C(3904897152), // M4_vrmpyeh_s1
1236
5.77k
    UINT64_C(3932160192), // M4_vrmpyoh_acc_s0
1237
5.77k
    UINT64_C(3940548800), // M4_vrmpyoh_acc_s1
1238
5.77k
    UINT64_C(3894411328), // M4_vrmpyoh_s0
1239
5.77k
    UINT64_C(3902799936), // M4_vrmpyoh_s1
1240
5.77k
    UINT64_C(4022337600), // M4_xor_and
1241
5.77k
    UINT64_C(4011851840), // M4_xor_andn
1242
5.77k
    UINT64_C(4022337632), // M4_xor_or
1243
5.77k
    UINT64_C(3397386240), // M4_xor_xacc
1244
5.77k
    UINT64_C(3927965728), // M5_vdmacbsu
1245
5.77k
    UINT64_C(3902799904), // M5_vdmpybsu
1246
5.77k
    UINT64_C(3888119840), // M5_vmacbsu
1247
5.77k
    UINT64_C(3883925536), // M5_vmacbuu
1248
5.77k
    UINT64_C(3846176800), // M5_vmpybsu
1249
5.77k
    UINT64_C(3850371104), // M5_vmpybuu
1250
5.77k
    UINT64_C(3938451488), // M5_vrmacbsu
1251
5.77k
    UINT64_C(3934257184), // M5_vrmacbuu
1252
5.77k
    UINT64_C(3904897056), // M5_vrmpybsu
1253
5.77k
    UINT64_C(3900702752), // M5_vrmpybuu
1254
5.77k
    UINT64_C(0),
1255
5.77k
    UINT64_C(0),
1256
5.77k
    UINT64_C(0),
1257
5.77k
    UINT64_C(1509949440), // RESTORE_DEALLOC_BEFORE_TAILCALL_V4
1258
5.77k
    UINT64_C(1509949440), // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT
1259
5.77k
    UINT64_C(1476395008), // RESTORE_DEALLOC_RET_JMP_V4
1260
5.77k
    UINT64_C(1476395008), // RESTORE_DEALLOC_RET_JMP_V4_EXT
1261
5.77k
    UINT64_C(3288334336), // S2_addasl_rrri
1262
5.77k
    UINT64_C(2694643712), // S2_allocframe
1263
5.77k
    UINT64_C(2147483712), // S2_asl_i_p
1264
5.77k
    UINT64_C(2181038272), // S2_asl_i_p_acc
1265
5.77k
    UINT64_C(2185232448), // S2_asl_i_p_and
1266
5.77k
    UINT64_C(2181038144), // S2_asl_i_p_nac
1267
5.77k
    UINT64_C(2185232576), // S2_asl_i_p_or
1268
5.77k
    UINT64_C(2189426752), // S2_asl_i_p_xacc
1269
5.77k
    UINT64_C(2348810304), // S2_asl_i_r
1270
5.77k
    UINT64_C(2382364864), // S2_asl_i_r_acc
1271
5.77k
    UINT64_C(2386559040), // S2_asl_i_r_and
1272
5.77k
    UINT64_C(2382364736), // S2_asl_i_r_nac
1273
5.77k
    UINT64_C(2386559168), // S2_asl_i_r_or
1274
5.77k
    UINT64_C(2353004608), // S2_asl_i_r_sat
1275
5.77k
    UINT64_C(2390753344), // S2_asl_i_r_xacc
1276
5.77k
    UINT64_C(2155872320), // S2_asl_i_vh
1277
5.77k
    UINT64_C(2151678016), // S2_asl_i_vw
1278
5.77k
    UINT64_C(3279945856), // S2_asl_r_p
1279
5.77k
    UINT64_C(3418357888), // S2_asl_r_p_acc
1280
5.77k
    UINT64_C(3409969280), // S2_asl_r_p_and
1281
5.77k
    UINT64_C(3414163584), // S2_asl_r_p_nac
1282
5.77k
    UINT64_C(3405774976), // S2_asl_r_p_or
1283
5.77k
    UINT64_C(3412066432), // S2_asl_r_p_xor
1284
5.77k
    UINT64_C(3326083200), // S2_asl_r_r
1285
5.77k
    UINT64_C(3435135104), // S2_asl_r_r_acc
1286
5.77k
    UINT64_C(3426746496), // S2_asl_r_r_and
1287
5.77k
    UINT64_C(3430940800), // S2_asl_r_r_nac
1288
5.77k
    UINT64_C(3422552192), // S2_asl_r_r_or
1289
5.77k
    UINT64_C(3321888896), // S2_asl_r_r_sat
1290
5.77k
    UINT64_C(3275751552), // S2_asl_r_vh
1291
5.77k
    UINT64_C(3271557248), // S2_asl_r_vw
1292
5.77k
    UINT64_C(2147483648), // S2_asr_i_p
1293
5.77k
    UINT64_C(2181038208), // S2_asr_i_p_acc
1294
5.77k
    UINT64_C(2185232384), // S2_asr_i_p_and
1295
5.77k
    UINT64_C(2181038080), // S2_asr_i_p_nac
1296
5.77k
    UINT64_C(2185232512), // S2_asr_i_p_or
1297
5.77k
    UINT64_C(2160066784), // S2_asr_i_p_rnd
1298
5.77k
    UINT64_C(0),  // S2_asr_i_p_rnd_goodsyntax
1299
5.77k
    UINT64_C(2348810240), // S2_asr_i_r
1300
5.77k
    UINT64_C(2382364800), // S2_asr_i_r_acc
1301
5.77k
    UINT64_C(2386558976), // S2_asr_i_r_and
1302
5.77k
    UINT64_C(2382364672), // S2_asr_i_r_nac
1303
5.77k
    UINT64_C(2386559104), // S2_asr_i_r_or
1304
5.77k
    UINT64_C(2353004544), // S2_asr_i_r_rnd
1305
5.77k
    UINT64_C(0),  // S2_asr_i_r_rnd_goodsyntax
1306
5.77k
    UINT64_C(2294284352), // S2_asr_i_svw_trun
1307
5.77k
    UINT64_C(2155872256), // S2_asr_i_vh
1308
5.77k
    UINT64_C(2151677952), // S2_asr_i_vw
1309
5.77k
    UINT64_C(3279945728), // S2_asr_r_p
1310
5.77k
    UINT64_C(3418357760), // S2_asr_r_p_acc
1311
5.77k
    UINT64_C(3409969152), // S2_asr_r_p_and
1312
5.77k
    UINT64_C(3414163456), // S2_asr_r_p_nac
1313
5.77k
    UINT64_C(3405774848), // S2_asr_r_p_or
1314
5.77k
    UINT64_C(3412066304), // S2_asr_r_p_xor
1315
5.77k
    UINT64_C(3326083072), // S2_asr_r_r
1316
5.77k
    UINT64_C(3435134976), // S2_asr_r_r_acc
1317
5.77k
    UINT64_C(3426746368), // S2_asr_r_r_and
1318
5.77k
    UINT64_C(3430940672), // S2_asr_r_r_nac
1319
5.77k
    UINT64_C(3422552064), // S2_asr_r_r_or
1320
5.77k
    UINT64_C(3321888768), // S2_asr_r_r_sat
1321
5.77k
    UINT64_C(3305111616), // S2_asr_r_svw_trun
1322
5.77k
    UINT64_C(3275751424), // S2_asr_r_vh
1323
5.77k
    UINT64_C(3271557120), // S2_asr_r_vw
1324
5.77k
    UINT64_C(2353004736), // S2_brev
1325
5.77k
    UINT64_C(2160066752), // S2_brevp
1326
5.77k
    UINT64_C(3250585792), // S2_cabacdecbin
1327
5.77k
    UINT64_C(3265265664), // S2_cabacencbin
1328
5.77k
    UINT64_C(2348810400), // S2_cl0
1329
5.77k
    UINT64_C(2285895744), // S2_cl0p
1330
5.77k
    UINT64_C(2348810432), // S2_cl1
1331
5.77k
    UINT64_C(2285895808), // S2_cl1p
1332
5.77k
    UINT64_C(2348810368), // S2_clb
1333
5.77k
    UINT64_C(2348810464), // S2_clbnorm
1334
5.77k
    UINT64_C(2285895680), // S2_clbp
1335
5.77k
    UINT64_C(2361393184), // S2_clrbit_i
1336
5.77k
    UINT64_C(3330277440), // S2_clrbit_r
1337
5.77k
    UINT64_C(2353004672), // S2_ct0
1338
5.77k
    UINT64_C(2296381504), // S2_ct0p
1339
5.77k
    UINT64_C(2353004704), // S2_ct1
1340
5.77k
    UINT64_C(2296381568), // S2_ct1p
1341
5.77k
    UINT64_C(2160066688), // S2_deinterleave
1342
5.77k
    UINT64_C(2365587456), // S2_extractu
1343
5.77k
    UINT64_C(3372220416), // S2_extractu_rp
1344
5.77k
    UINT64_C(2164260864), // S2_extractup
1345
5.77k
    UINT64_C(3238002688), // S2_extractup_rp
1346
5.77k
    UINT64_C(2399141888), // S2_insert
1347
5.77k
    UINT64_C(3355443200), // S2_insert_rp
1348
5.77k
    UINT64_C(2197815296), // S2_insertp
1349
5.77k
    UINT64_C(3388997632), // S2_insertp_rp
1350
5.77k
    UINT64_C(2160066720), // S2_interleave
1351
5.77k
    UINT64_C(3246391488), // S2_lfsp
1352
5.77k
    UINT64_C(3279945920), // S2_lsl_r_p
1353
5.77k
    UINT64_C(3418357952), // S2_lsl_r_p_acc
1354
5.77k
    UINT64_C(3409969344), // S2_lsl_r_p_and
1355
5.77k
    UINT64_C(3414163648), // S2_lsl_r_p_nac
1356
5.77k
    UINT64_C(3405775040), // S2_lsl_r_p_or
1357
5.77k
    UINT64_C(3412066496), // S2_lsl_r_p_xor
1358
5.77k
    UINT64_C(3326083264), // S2_lsl_r_r
1359
5.77k
    UINT64_C(3435135168), // S2_lsl_r_r_acc
1360
5.77k
    UINT64_C(3426746560), // S2_lsl_r_r_and
1361
5.77k
    UINT64_C(3430940864), // S2_lsl_r_r_nac
1362
5.77k
    UINT64_C(3422552256), // S2_lsl_r_r_or
1363
5.77k
    UINT64_C(3275751616), // S2_lsl_r_vh
1364
5.77k
    UINT64_C(3271557312), // S2_lsl_r_vw
1365
5.77k
    UINT64_C(2147483680), // S2_lsr_i_p
1366
5.77k
    UINT64_C(2181038240), // S2_lsr_i_p_acc
1367
5.77k
    UINT64_C(2185232416), // S2_lsr_i_p_and
1368
5.77k
    UINT64_C(2181038112), // S2_lsr_i_p_nac
1369
5.77k
    UINT64_C(2185232544), // S2_lsr_i_p_or
1370
5.77k
    UINT64_C(2189426720), // S2_lsr_i_p_xacc
1371
5.77k
    UINT64_C(2348810272), // S2_lsr_i_r
1372
5.77k
    UINT64_C(2382364832), // S2_lsr_i_r_acc
1373
5.77k
    UINT64_C(2386559008), // S2_lsr_i_r_and
1374
5.77k
    UINT64_C(2382364704), // S2_lsr_i_r_nac
1375
5.77k
    UINT64_C(2386559136), // S2_lsr_i_r_or
1376
5.77k
    UINT64_C(2390753312), // S2_lsr_i_r_xacc
1377
5.77k
    UINT64_C(2155872288), // S2_lsr_i_vh
1378
5.77k
    UINT64_C(2151677984), // S2_lsr_i_vw
1379
5.77k
    UINT64_C(3279945792), // S2_lsr_r_p
1380
5.77k
    UINT64_C(3418357824), // S2_lsr_r_p_acc
1381
5.77k
    UINT64_C(3409969216), // S2_lsr_r_p_and
1382
5.77k
    UINT64_C(3414163520), // S2_lsr_r_p_nac
1383
5.77k
    UINT64_C(3405774912), // S2_lsr_r_p_or
1384
5.77k
    UINT64_C(3412066368), // S2_lsr_r_p_xor
1385
5.77k
    UINT64_C(3326083136), // S2_lsr_r_r
1386
5.77k
    UINT64_C(3435135040), // S2_lsr_r_r_acc
1387
5.77k
    UINT64_C(3426746432), // S2_lsr_r_r_and
1388
5.77k
    UINT64_C(3430940736), // S2_lsr_r_r_nac
1389
5.77k
    UINT64_C(3422552128), // S2_lsr_r_r_or
1390
5.77k
    UINT64_C(3275751488), // S2_lsr_r_vh
1391
5.77k
    UINT64_C(3271557184), // S2_lsr_r_vw
1392
5.77k
    UINT64_C(4118806528), // S2_packhl
1393
5.77k
    UINT64_C(3489660928), // S2_parityp
1394
5.77k
    UINT64_C(1140850688), // S2_pstorerbf_io
1395
5.77k
    UINT64_C(2868912132), // S2_pstorerbf_pi
1396
5.77k
    UINT64_C(2868912260), // S2_pstorerbfnew_pi
1397
5.77k
    UINT64_C(1151336448), // S2_pstorerbnewf_io
1398
5.77k
    UINT64_C(2879397892), // S2_pstorerbnewf_pi
1399
5.77k
    UINT64_C(2879398020), // S2_pstorerbnewfnew_pi
1400
5.77k
    UINT64_C(1084227584), // S2_pstorerbnewt_io
1401
5.77k
    UINT64_C(2879397888), // S2_pstorerbnewt_pi
1402
5.77k
    UINT64_C(2879398016), // S2_pstorerbnewtnew_pi
1403
5.77k
    UINT64_C(1073741824), // S2_pstorerbt_io
1404
5.77k
    UINT64_C(2868912128), // S2_pstorerbt_pi
1405
5.77k
    UINT64_C(2868912256), // S2_pstorerbtnew_pi
1406
5.77k
    UINT64_C(1153433600), // S2_pstorerdf_io
1407
5.77k
    UINT64_C(2881495044), // S2_pstorerdf_pi
1408
5.77k
    UINT64_C(2881495172), // S2_pstorerdfnew_pi
1409
5.77k
    UINT64_C(1086324736), // S2_pstorerdt_io
1410
5.77k
    UINT64_C(2881495040), // S2_pstorerdt_pi
1411
5.77k
    UINT64_C(2881495168), // S2_pstorerdtnew_pi
1412
5.77k
    UINT64_C(1147142144), // S2_pstorerff_io
1413
5.77k
    UINT64_C(2875203588), // S2_pstorerff_pi
1414
5.77k
    UINT64_C(2875203716), // S2_pstorerffnew_pi
1415
5.77k
    UINT64_C(1080033280), // S2_pstorerft_io
1416
5.77k
    UINT64_C(2875203584), // S2_pstorerft_pi
1417
5.77k
    UINT64_C(2875203712), // S2_pstorerftnew_pi
1418
5.77k
    UINT64_C(1145044992), // S2_pstorerhf_io
1419
5.77k
    UINT64_C(2873106436), // S2_pstorerhf_pi
1420
5.77k
    UINT64_C(2873106564), // S2_pstorerhfnew_pi
1421
5.77k
    UINT64_C(1151338496), // S2_pstorerhnewf_io
1422
5.77k
    UINT64_C(2879399940), // S2_pstorerhnewf_pi
1423
5.77k
    UINT64_C(2879400068), // S2_pstorerhnewfnew_pi
1424
5.77k
    UINT64_C(1084229632), // S2_pstorerhnewt_io
1425
5.77k
    UINT64_C(2879399936), // S2_pstorerhnewt_pi
1426
5.77k
    UINT64_C(2879400064), // S2_pstorerhnewtnew_pi
1427
5.77k
    UINT64_C(1077936128), // S2_pstorerht_io
1428
5.77k
    UINT64_C(2873106432), // S2_pstorerht_pi
1429
5.77k
    UINT64_C(2873106560), // S2_pstorerhtnew_pi
1430
5.77k
    UINT64_C(1149239296), // S2_pstorerif_io
1431
5.77k
    UINT64_C(2877300740), // S2_pstorerif_pi
1432
5.77k
    UINT64_C(2877300868), // S2_pstorerifnew_pi
1433
5.77k
    UINT64_C(1151340544), // S2_pstorerinewf_io
1434
5.77k
    UINT64_C(2879401988), // S2_pstorerinewf_pi
1435
5.77k
    UINT64_C(2879402116), // S2_pstorerinewfnew_pi
1436
5.77k
    UINT64_C(1084231680), // S2_pstorerinewt_io
1437
5.77k
    UINT64_C(2879401984), // S2_pstorerinewt_pi
1438
5.77k
    UINT64_C(2879402112), // S2_pstorerinewtnew_pi
1439
5.77k
    UINT64_C(1082130432), // S2_pstorerit_io
1440
5.77k
    UINT64_C(2877300736), // S2_pstorerit_pi
1441
5.77k
    UINT64_C(2877300864), // S2_pstoreritnew_pi
1442
5.77k
    UINT64_C(2361393152), // S2_setbit_i
1443
5.77k
    UINT64_C(3330277376), // S2_setbit_r
1444
5.77k
    UINT64_C(3238002752), // S2_shuffeb
1445
5.77k
    UINT64_C(3238002880), // S2_shuffeh
1446
5.77k
    UINT64_C(3238002816), // S2_shuffob
1447
5.77k
    UINT64_C(3246391296), // S2_shuffoh
1448
5.77k
    UINT64_C(2701131776), // S2_storerb_io
1449
5.77k
    UINT64_C(2936012800), // S2_storerb_pbr
1450
5.77k
    UINT64_C(0),
1451
5.77k
    UINT64_C(2835349504), // S2_storerb_pci
1452
5.77k
    UINT64_C(0),
1453
5.77k
    UINT64_C(2835349506), // S2_storerb_pcr
1454
5.77k
    UINT64_C(2868903936), // S2_storerb_pi
1455
5.77k
    UINT64_C(2902458368), // S2_storerb_pr
1456
5.77k
    UINT64_C(1207959552), // S2_storerbabs
1457
5.77k
    UINT64_C(1207959552), // S2_storerbgp
1458
5.77k
    UINT64_C(2711617536), // S2_storerbnew_io
1459
5.77k
    UINT64_C(2946498560), // S2_storerbnew_pbr
1460
5.77k
    UINT64_C(2845835264), // S2_storerbnew_pci
1461
5.77k
    UINT64_C(2845835266), // S2_storerbnew_pcr
1462
5.77k
    UINT64_C(2879389696), // S2_storerbnew_pi
1463
5.77k
    UINT64_C(2912944128), // S2_storerbnew_pr
1464
5.77k
    UINT64_C(1218445312), // S2_storerbnewabs
1465
5.77k
    UINT64_C(1218445312), // S2_storerbnewgp
1466
5.77k
    UINT64_C(2713714688), // S2_storerd_io
1467
5.77k
    UINT64_C(2948595712), // S2_storerd_pbr
1468
5.77k
    UINT64_C(0),
1469
5.77k
    UINT64_C(2847932416), // S2_storerd_pci
1470
5.77k
    UINT64_C(0),
1471
5.77k
    UINT64_C(2847932418), // S2_storerd_pcr
1472
5.77k
    UINT64_C(2881486848), // S2_storerd_pi
1473
5.77k
    UINT64_C(2915041280), // S2_storerd_pr
1474
5.77k
    UINT64_C(1220542464), // S2_storerdabs
1475
5.77k
    UINT64_C(1220542464), // S2_storerdgp
1476
5.77k
    UINT64_C(2707423232), // S2_storerf_io
1477
5.77k
    UINT64_C(2942304256), // S2_storerf_pbr
1478
5.77k
    UINT64_C(0),
1479
5.77k
    UINT64_C(2841640960), // S2_storerf_pci
1480
5.77k
    UINT64_C(0),
1481
5.77k
    UINT64_C(2841640962), // S2_storerf_pcr
1482
5.77k
    UINT64_C(2875195392), // S2_storerf_pi
1483
5.77k
    UINT64_C(2908749824), // S2_storerf_pr
1484
5.77k
    UINT64_C(1214251008), // S2_storerfabs
1485
5.77k
    UINT64_C(1214251008), // S2_storerfgp
1486
5.77k
    UINT64_C(2705326080), // S2_storerh_io
1487
5.77k
    UINT64_C(2940207104), // S2_storerh_pbr
1488
5.77k
    UINT64_C(0),
1489
5.77k
    UINT64_C(2839543808), // S2_storerh_pci
1490
5.77k
    UINT64_C(0),
1491
5.77k
    UINT64_C(2839543810), // S2_storerh_pcr
1492
5.77k
    UINT64_C(2873098240), // S2_storerh_pi
1493
5.77k
    UINT64_C(2906652672), // S2_storerh_pr
1494
5.77k
    UINT64_C(1212153856), // S2_storerhabs
1495
5.77k
    UINT64_C(1212153856), // S2_storerhgp
1496
5.77k
    UINT64_C(2711619584), // S2_storerhnew_io
1497
5.77k
    UINT64_C(2946500608), // S2_storerhnew_pbr
1498
5.77k
    UINT64_C(2845837312), // S2_storerhnew_pci
1499
5.77k
    UINT64_C(2845837314), // S2_storerhnew_pcr
1500
5.77k
    UINT64_C(2879391744), // S2_storerhnew_pi
1501
5.77k
    UINT64_C(2912946176), // S2_storerhnew_pr
1502
5.77k
    UINT64_C(1218447360), // S2_storerhnewabs
1503
5.77k
    UINT64_C(1218447360), // S2_storerhnewgp
1504
5.77k
    UINT64_C(2709520384), // S2_storeri_io
1505
5.77k
    UINT64_C(2944401408), // S2_storeri_pbr
1506
5.77k
    UINT64_C(0),
1507
5.77k
    UINT64_C(2843738112), // S2_storeri_pci
1508
5.77k
    UINT64_C(0),
1509
5.77k
    UINT64_C(2843738114), // S2_storeri_pcr
1510
5.77k
    UINT64_C(2877292544), // S2_storeri_pi
1511
5.77k
    UINT64_C(2910846976), // S2_storeri_pr
1512
5.77k
    UINT64_C(1216348160), // S2_storeriabs
1513
5.77k
    UINT64_C(1216348160), // S2_storerigp
1514
5.77k
    UINT64_C(2711621632), // S2_storerinew_io
1515
5.77k
    UINT64_C(2946502656), // S2_storerinew_pbr
1516
5.77k
    UINT64_C(2845839360), // S2_storerinew_pci
1517
5.77k
    UINT64_C(2845839362), // S2_storerinew_pcr
1518
5.77k
    UINT64_C(2879393792), // S2_storerinew_pi
1519
5.77k
    UINT64_C(2912948224), // S2_storerinew_pr
1520
5.77k
    UINT64_C(1218449408), // S2_storerinewabs
1521
5.77k
    UINT64_C(1218449408), // S2_storerinewgp
1522
5.77k
    UINT64_C(2694840320), // S2_storew_locked
1523
5.77k
    UINT64_C(2357198848), // S2_svsathb
1524
5.77k
    UINT64_C(2357198912), // S2_svsathub
1525
5.77k
    UINT64_C(2264924160), // S2_tableidxb
1526
5.77k
    UINT64_C(0),
1527
5.77k
    UINT64_C(2277507072), // S2_tableidxd
1528
5.77k
    UINT64_C(0),
1529
5.77k
    UINT64_C(2269118464), // S2_tableidxh
1530
5.77k
    UINT64_C(0),
1531
5.77k
    UINT64_C(2273312768), // S2_tableidxw
1532
5.77k
    UINT64_C(0),
1533
5.77k
    UINT64_C(2361393216), // S2_togglebit_i
1534
5.77k
    UINT64_C(3330277504), // S2_togglebit_r
1535
5.77k
    UINT64_C(2231369728), // S2_tstbit_i
1536
5.77k
    UINT64_C(3338665984), // S2_tstbit_r
1537
5.77k
    UINT64_C(3221225472), // S2_valignib
1538
5.77k
    UINT64_C(3254779904), // S2_valignrb
1539
5.77k
    UINT64_C(3284140096), // S2_vcnegh
1540
5.77k
    UINT64_C(3284140032), // S2_vcrotate
1541
5.77k
    UINT64_C(3407880416), // S2_vrcnegh
1542
5.77k
    UINT64_C(2290090112), // S2_vrndpackwh
1543
5.77k
    UINT64_C(2290090176), // S2_vrndpackwhs
1544
5.77k
    UINT64_C(2281701568), // S2_vsathb
1545
5.77k
    UINT64_C(2147483872), // S2_vsathb_nopack
1546
5.77k
    UINT64_C(2281701376), // S2_vsathub
1547
5.77k
    UINT64_C(2147483776), // S2_vsathub_nopack
1548
5.77k
    UINT64_C(2281701440), // S2_vsatwh
1549
5.77k
    UINT64_C(2147483840), // S2_vsatwh_nopack
1550
5.77k
    UINT64_C(2281701504), // S2_vsatwuh
1551
5.77k
    UINT64_C(2147483808), // S2_vsatwuh_nopack
1552
5.77k
    UINT64_C(2353004768), // S2_vsplatrb
1553
5.77k
    UINT64_C(2218786880), // S2_vsplatrh
1554
5.77k
    UINT64_C(3229614080), // S2_vspliceib
1555
5.77k
    UINT64_C(3263168512), // S2_vsplicerb
1556
5.77k
    UINT64_C(2214592512), // S2_vsxtbh
1557
5.77k
    UINT64_C(2214592640), // S2_vsxthw
1558
5.77k
    UINT64_C(2290090048), // S2_vtrunehb
1559
5.77k
    UINT64_C(3246391360), // S2_vtrunewh
1560
5.77k
    UINT64_C(2290089984), // S2_vtrunohb
1561
5.77k
    UINT64_C(3246391424), // S2_vtrunowh
1562
5.77k
    UINT64_C(2214592576), // S2_vzxtbh
1563
5.77k
    UINT64_C(2214592704), // S2_vzxthw
1564
5.77k
    UINT64_C(3674210304), // S4_addaddi
1565
5.77k
    UINT64_C(3724541956), // S4_addi_asl_ri
1566
5.77k
    UINT64_C(3724541972), // S4_addi_lsr_ri
1567
5.77k
    UINT64_C(3724541952), // S4_andi_asl_ri
1568
5.77k
    UINT64_C(3724541968), // S4_andi_lsr_ri
1569
5.77k
    UINT64_C(2350907392), // S4_clbaddi
1570
5.77k
    UINT64_C(2287992896), // S4_clbpaddi
1571
5.77k
    UINT64_C(2287992832), // S4_clbpnorm
1572
5.77k
    UINT64_C(2373976064), // S4_extract
1573
5.77k
    UINT64_C(3372220480), // S4_extract_rp
1574
5.77k
    UINT64_C(2315255808), // S4_extractp
1575
5.77k
    UINT64_C(3250585728), // S4_extractp_rp
1576
5.77k
    UINT64_C(3330277568), // S4_lsli
1577
5.77k
    UINT64_C(2233466880), // S4_ntstbit_i
1578
5.77k
    UINT64_C(3340763136), // S4_ntstbit_r
1579
5.77k
    UINT64_C(3657433088), // S4_or_andi
1580
5.77k
    UINT64_C(3661627392), // S4_or_andix
1581
5.77k
    UINT64_C(3665821696), // S4_or_ori
1582
5.77k
    UINT64_C(3724541954), // S4_ori_asl_ri
1583
5.77k
    UINT64_C(3724541970), // S4_ori_lsr_ri
1584
5.77k
    UINT64_C(3588227072), // S4_parity
1585
5.77k
    UINT64_C(2936012932), // S4_pstorerbf_abs
1586
5.77k
    UINT64_C(889192448),  // S4_pstorerbf_rr
1587
5.77k
    UINT64_C(2936021124), // S4_pstorerbfnew_abs
1588
5.77k
    UINT64_C(1174405120), // S4_pstorerbfnew_io
1589
5.77k
    UINT64_C(922746880),  // S4_pstorerbfnew_rr
1590
5.77k
    UINT64_C(2946498692), // S4_pstorerbnewf_abs
1591
5.77k
    UINT64_C(899678208),  // S4_pstorerbnewf_rr
1592
5.77k
    UINT64_C(2946506884), // S4_pstorerbnewfnew_abs
1593
5.77k
    UINT64_C(1184890880), // S4_pstorerbnewfnew_io
1594
5.77k
    UINT64_C(933232640),  // S4_pstorerbnewfnew_rr
1595
5.77k
    UINT64_C(2946498688), // S4_pstorerbnewt_abs
1596
5.77k
    UINT64_C(882900992),  // S4_pstorerbnewt_rr
1597
5.77k
    UINT64_C(2946506880), // S4_pstorerbnewtnew_abs
1598
5.77k
    UINT64_C(1117782016), // S4_pstorerbnewtnew_io
1599
5.77k
    UINT64_C(916455424),  // S4_pstorerbnewtnew_rr
1600
5.77k
    UINT64_C(2936012928), // S4_pstorerbt_abs
1601
5.77k
    UINT64_C(872415232),  // S4_pstorerbt_rr
1602
5.77k
    UINT64_C(2936021120), // S4_pstorerbtnew_abs
1603
5.77k
    UINT64_C(1107296256), // S4_pstorerbtnew_io
1604
5.77k
    UINT64_C(905969664),  // S4_pstorerbtnew_rr
1605
5.77k
    UINT64_C(2948595844), // S4_pstorerdf_abs
1606
5.77k
    UINT64_C(901775360),  // S4_pstorerdf_rr
1607
5.77k
    UINT64_C(2948604036), // S4_pstorerdfnew_abs
1608
5.77k
    UINT64_C(1186988032), // S4_pstorerdfnew_io
1609
5.77k
    UINT64_C(935329792),  // S4_pstorerdfnew_rr
1610
5.77k
    UINT64_C(2948595840), // S4_pstorerdt_abs
1611
5.77k
    UINT64_C(884998144),  // S4_pstorerdt_rr
1612
5.77k
    UINT64_C(2948604032), // S4_pstorerdtnew_abs
1613
5.77k
    UINT64_C(1119879168), // S4_pstorerdtnew_io
1614
5.77k
    UINT64_C(918552576),  // S4_pstorerdtnew_rr
1615
5.77k
    UINT64_C(2942304388), // S4_pstorerff_abs
1616
5.77k
    UINT64_C(895483904),  // S4_pstorerff_rr
1617
5.77k
    UINT64_C(2942312580), // S4_pstorerffnew_abs
1618
5.77k
    UINT64_C(1180696576), // S4_pstorerffnew_io
1619
5.77k
    UINT64_C(929038336),  // S4_pstorerffnew_rr
1620
5.77k
    UINT64_C(2942304384), // S4_pstorerft_abs
1621
5.77k
    UINT64_C(878706688),  // S4_pstorerft_rr
1622
5.77k
    UINT64_C(2942312576), // S4_pstorerftnew_abs
1623
5.77k
    UINT64_C(1113587712), // S4_pstorerftnew_io
1624
5.77k
    UINT64_C(912261120),  // S4_pstorerftnew_rr
1625
5.77k
    UINT64_C(2940207236), // S4_pstorerhf_abs
1626
5.77k
    UINT64_C(893386752),  // S4_pstorerhf_rr
1627
5.77k
    UINT64_C(2940215428), // S4_pstorerhfnew_abs
1628
5.77k
    UINT64_C(1178599424), // S4_pstorerhfnew_io
1629
5.77k
    UINT64_C(926941184),  // S4_pstorerhfnew_rr
1630
5.77k
    UINT64_C(2946500740), // S4_pstorerhnewf_abs
1631
5.77k
    UINT64_C(899678216),  // S4_pstorerhnewf_rr
1632
5.77k
    UINT64_C(2946508932), // S4_pstorerhnewfnew_abs
1633
5.77k
    UINT64_C(1184892928), // S4_pstorerhnewfnew_io
1634
5.77k
    UINT64_C(933232648),  // S4_pstorerhnewfnew_rr
1635
5.77k
    UINT64_C(2946500736), // S4_pstorerhnewt_abs
1636
5.77k
    UINT64_C(882901000),  // S4_pstorerhnewt_rr
1637
5.77k
    UINT64_C(2946508928), // S4_pstorerhnewtnew_abs
1638
5.77k
    UINT64_C(1117784064), // S4_pstorerhnewtnew_io
1639
5.77k
    UINT64_C(916455432),  // S4_pstorerhnewtnew_rr
1640
5.77k
    UINT64_C(2940207232), // S4_pstorerht_abs
1641
5.77k
    UINT64_C(876609536),  // S4_pstorerht_rr
1642
5.77k
    UINT64_C(2940215424), // S4_pstorerhtnew_abs
1643
5.77k
    UINT64_C(1111490560), // S4_pstorerhtnew_io
1644
5.77k
    UINT64_C(910163968),  // S4_pstorerhtnew_rr
1645
5.77k
    UINT64_C(2944401540), // S4_pstorerif_abs
1646
5.77k
    UINT64_C(897581056),  // S4_pstorerif_rr
1647
5.77k
    UINT64_C(2944409732), // S4_pstorerifnew_abs
1648
5.77k
    UINT64_C(1182793728), // S4_pstorerifnew_io
1649
5.77k
    UINT64_C(931135488),  // S4_pstorerifnew_rr
1650
5.77k
    UINT64_C(2946502788), // S4_pstorerinewf_abs
1651
5.77k
    UINT64_C(899678224),  // S4_pstorerinewf_rr
1652
5.77k
    UINT64_C(2946510980), // S4_pstorerinewfnew_abs
1653
5.77k
    UINT64_C(1184894976), // S4_pstorerinewfnew_io
1654
5.77k
    UINT64_C(933232656),  // S4_pstorerinewfnew_rr
1655
5.77k
    UINT64_C(2946502784), // S4_pstorerinewt_abs
1656
5.77k
    UINT64_C(882901008),  // S4_pstorerinewt_rr
1657
5.77k
    UINT64_C(2946510976), // S4_pstorerinewtnew_abs
1658
5.77k
    UINT64_C(1117786112), // S4_pstorerinewtnew_io
1659
5.77k
    UINT64_C(916455440),  // S4_pstorerinewtnew_rr
1660
5.77k
    UINT64_C(2944401536), // S4_pstorerit_abs
1661
5.77k
    UINT64_C(880803840),  // S4_pstorerit_rr
1662
5.77k
    UINT64_C(2944409728), // S4_pstoreritnew_abs
1663
5.77k
    UINT64_C(1115684864), // S4_pstoreritnew_io
1664
5.77k
    UINT64_C(914358272),  // S4_pstoreritnew_rr
1665
5.77k
    UINT64_C(2699034624), // S4_stored_locked
1666
5.77k
    UINT64_C(1006632960), // S4_storeirb_io
1667
5.77k
    UINT64_C(947912704),  // S4_storeirbf_io
1668
5.77k
    UINT64_C(964689920),  // S4_storeirbfnew_io
1669
5.77k
    UINT64_C(939524096),  // S4_storeirbt_io
1670
5.77k
    UINT64_C(956301312),  // S4_storeirbtnew_io
1671
5.77k
    UINT64_C(1008730112), // S4_storeirh_io
1672
5.77k
    UINT64_C(950009856),  // S4_storeirhf_io
1673
5.77k
    UINT64_C(966787072),  // S4_storeirhfnew_io
1674
5.77k
    UINT64_C(941621248),  // S4_storeirht_io
1675
5.77k
    UINT64_C(958398464),  // S4_storeirhtnew_io
1676
5.77k
    UINT64_C(1010827264), // S4_storeiri_io
1677
5.77k
    UINT64_C(952107008),  // S4_storeirif_io
1678
5.77k
    UINT64_C(968884224),  // S4_storeirifnew_io
1679
5.77k
    UINT64_C(943718400),  // S4_storeirit_io
1680
5.77k
    UINT64_C(960495616),  // S4_storeiritnew_io
1681
5.77k
    UINT64_C(2868904064), // S4_storerb_ap
1682
5.77k
    UINT64_C(989855744),  // S4_storerb_rr
1683
5.77k
    UINT64_C(2902458496), // S4_storerb_ur
1684
5.77k
    UINT64_C(2879389824), // S4_storerbnew_ap
1685
5.77k
    UINT64_C(1000341504), // S4_storerbnew_rr
1686
5.77k
    UINT64_C(2912944256), // S4_storerbnew_ur
1687
5.77k
    UINT64_C(2881486976), // S4_storerd_ap
1688
5.77k
    UINT64_C(1002438656), // S4_storerd_rr
1689
5.77k
    UINT64_C(2915041408), // S4_storerd_ur
1690
5.77k
    UINT64_C(2875195520), // S4_storerf_ap
1691
5.77k
    UINT64_C(996147200),  // S4_storerf_rr
1692
5.77k
    UINT64_C(2908749952), // S4_storerf_ur
1693
5.77k
    UINT64_C(2873098368), // S4_storerh_ap
1694
5.77k
    UINT64_C(994050048),  // S4_storerh_rr
1695
5.77k
    UINT64_C(2906652800), // S4_storerh_ur
1696
5.77k
    UINT64_C(2879391872), // S4_storerhnew_ap
1697
5.77k
    UINT64_C(1000341512), // S4_storerhnew_rr
1698
5.77k
    UINT64_C(2912946304), // S4_storerhnew_ur
1699
5.77k
    UINT64_C(2877292672), // S4_storeri_ap
1700
5.77k
    UINT64_C(998244352),  // S4_storeri_rr
1701
5.77k
    UINT64_C(2910847104), // S4_storeri_ur
1702
5.77k
    UINT64_C(2879393920), // S4_storerinew_ap
1703
5.77k
    UINT64_C(1000341520), // S4_storerinew_rr
1704
5.77k
    UINT64_C(2912948352), // S4_storerinew_ur
1705
5.77k
    UINT64_C(3682598912), // S4_subaddi
1706
5.77k
    UINT64_C(3724541958), // S4_subi_asl_ri
1707
5.77k
    UINT64_C(3724541974), // S4_subi_lsr_ri
1708
5.77k
    UINT64_C(3284140224), // S4_vrcrotate
1709
5.77k
    UINT64_C(3416260608), // S4_vrcrotate_acc
1710
5.77k
    UINT64_C(3242197120), // S4_vxaddsubh
1711
5.77k
    UINT64_C(3250585600), // S4_vxaddsubhr
1712
5.77k
    UINT64_C(3242196992), // S4_vxaddsubw
1713
5.77k
    UINT64_C(3242197184), // S4_vxsubaddh
1714
5.77k
    UINT64_C(3250585664), // S4_vxsubaddhr
1715
5.77k
    UINT64_C(3242197056), // S4_vxsubaddw
1716
5.77k
    UINT64_C(2287992960), // S5_asrhub_rnd_sat
1717
5.77k
    UINT64_C(0),  // S5_asrhub_rnd_sat_goodsyntax
1718
5.77k
    UINT64_C(2287992992), // S5_asrhub_sat
1719
5.77k
    UINT64_C(2287992928), // S5_popcountp
1720
5.77k
    UINT64_C(2149580800), // S5_vasrhrnd
1721
5.77k
    UINT64_C(0),  // S5_vasrhrnd_goodsyntax
1722
5.77k
    UINT64_C(2147483744), // S6_rol_i_p
1723
5.77k
    UINT64_C(2181038304), // S6_rol_i_p_acc
1724
5.77k
    UINT64_C(2185232480), // S6_rol_i_p_and
1725
5.77k
    UINT64_C(2181038176), // S6_rol_i_p_nac
1726
5.77k
    UINT64_C(2185232608), // S6_rol_i_p_or
1727
5.77k
    UINT64_C(2189426784), // S6_rol_i_p_xacc
1728
5.77k
    UINT64_C(2348810336), // S6_rol_i_r
1729
5.77k
    UINT64_C(2382364896), // S6_rol_i_r_acc
1730
5.77k
    UINT64_C(2386559072), // S6_rol_i_r_and
1731
5.77k
    UINT64_C(2382364768), // S6_rol_i_r_nac
1732
5.77k
    UINT64_C(2386559200), // S6_rol_i_r_or
1733
5.77k
    UINT64_C(2390753376), // S6_rol_i_r_xacc
1734
5.77k
    UINT64_C(1509949440), // SAVE_REGISTERS_CALL_V4
1735
5.77k
    UINT64_C(1509949440), // SAVE_REGISTERS_CALL_V4_EXT
1736
5.77k
    UINT64_C(0),
1737
5.77k
    UINT64_C(0),
1738
5.77k
    UINT64_C(0),
1739
5.77k
    UINT64_C(0),
1740
5.77k
    UINT64_C(0),
1741
5.77k
    UINT64_C(0),
1742
5.77k
    UINT64_C(0),
1743
5.77k
    UINT64_C(0),
1744
5.77k
    UINT64_C(0),
1745
5.77k
    UINT64_C(0),
1746
5.77k
    UINT64_C(0),
1747
5.77k
    UINT64_C(0),
1748
5.77k
    UINT64_C(0),
1749
5.77k
    UINT64_C(0),
1750
5.77k
    UINT64_C(0),  // TFRI64_V2_ext
1751
5.77k
    UINT64_C(0),  // TFRI64_V4
1752
5.77k
    UINT64_C(0),
1753
5.77k
    UINT64_C(0),
1754
5.77k
    UINT64_C(0),
1755
5.77k
    UINT64_C(0),
1756
5.77k
    UINT64_C(0),
1757
5.77k
    UINT64_C(0),
1758
5.77k
    UINT64_C(0),
1759
5.77k
    UINT64_C(0),  // V4_SA1_addi
1760
5.77k
    UINT64_C(6144), // V4_SA1_addrx
1761
5.77k
    UINT64_C(3072), // V4_SA1_addsp
1762
5.77k
    UINT64_C(4608), // V4_SA1_and1
1763
5.77k
    UINT64_C(6768), // V4_SA1_clrf
1764
5.77k
    UINT64_C(6736), // V4_SA1_clrfnew
1765
5.77k
    UINT64_C(6752), // V4_SA1_clrt
1766
5.77k
    UINT64_C(6720), // V4_SA1_clrtnew
1767
5.77k
    UINT64_C(6400), // V4_SA1_cmpeqi
1768
5.77k
    UINT64_C(7168), // V4_SA1_combine0i
1769
5.77k
    UINT64_C(7176), // V4_SA1_combine1i
1770
5.77k
    UINT64_C(7184), // V4_SA1_combine2i
1771
5.77k
    UINT64_C(7192), // V4_SA1_combine3i
1772
5.77k
    UINT64_C(7432), // V4_SA1_combinerz
1773
5.77k
    UINT64_C(7424), // V4_SA1_combinezr
1774
5.77k
    UINT64_C(4864), // V4_SA1_dec
1775
5.77k
    UINT64_C(4352), // V4_SA1_inc
1776
5.77k
    UINT64_C(2048), // V4_SA1_seti
1777
5.77k
    UINT64_C(6656), // V4_SA1_setin1
1778
5.77k
    UINT64_C(5376), // V4_SA1_sxtb
1779
5.77k
    UINT64_C(5120), // V4_SA1_sxth
1780
5.77k
    UINT64_C(4096), // V4_SA1_tfr
1781
5.77k
    UINT64_C(5888), // V4_SA1_zxtb
1782
5.77k
    UINT64_C(5632), // V4_SA1_zxth
1783
5.77k
    UINT64_C(0),  // V4_SL1_loadri_io
1784
5.77k
    UINT64_C(4096), // V4_SL1_loadrub_io
1785
5.77k
    UINT64_C(7936), // V4_SL2_deallocframe
1786
5.77k
    UINT64_C(8128), // V4_SL2_jumpr31
1787
5.77k
    UINT64_C(8133), // V4_SL2_jumpr31_f
1788
5.77k
    UINT64_C(8135), // V4_SL2_jumpr31_fnew
1789
5.77k
    UINT64_C(8132), // V4_SL2_jumpr31_t
1790
5.77k
    UINT64_C(8134), // V4_SL2_jumpr31_tnew
1791
5.77k
    UINT64_C(4096), // V4_SL2_loadrb_io
1792
5.77k
    UINT64_C(7680), // V4_SL2_loadrd_sp
1793
5.77k
    UINT64_C(0),  // V4_SL2_loadrh_io
1794
5.77k
    UINT64_C(7168), // V4_SL2_loadri_sp
1795
5.77k
    UINT64_C(2048), // V4_SL2_loadruh_io
1796
5.77k
    UINT64_C(8000), // V4_SL2_return
1797
5.77k
    UINT64_C(8005), // V4_SL2_return_f
1798
5.77k
    UINT64_C(8007), // V4_SL2_return_fnew
1799
5.77k
    UINT64_C(8004), // V4_SL2_return_t
1800
5.77k
    UINT64_C(8006), // V4_SL2_return_tnew
1801
5.77k
    UINT64_C(4096), // V4_SS1_storeb_io
1802
5.77k
    UINT64_C(0),  // V4_SS1_storew_io
1803
5.77k
    UINT64_C(7168), // V4_SS2_allocframe
1804
5.77k
    UINT64_C(4608), // V4_SS2_storebi0
1805
5.77k
    UINT64_C(4864), // V4_SS2_storebi1
1806
5.77k
    UINT64_C(2560), // V4_SS2_stored_sp
1807
5.77k
    UINT64_C(0),  // V4_SS2_storeh_io
1808
5.77k
    UINT64_C(2048), // V4_SS2_storew_sp
1809
5.77k
    UINT64_C(4096), // V4_SS2_storewi0
1810
5.77k
    UINT64_C(4352), // V4_SS2_storewi1
1811
5.77k
    UINT64_C(2449473568), // V6_extractw
1812
5.77k
    UINT64_C(2449473568), // V6_extractw_128B
1813
5.77k
    UINT64_C(429916192),  // V6_lvsplatw
1814
5.77k
    UINT64_C(429916192),  // V6_lvsplatw_128B
1815
5.77k
    UINT64_C(503513088),  // V6_pred_and
1816
5.77k
    UINT64_C(503513088),  // V6_pred_and_128B
1817
5.77k
    UINT64_C(503513108),  // V6_pred_and_n
1818
5.77k
    UINT64_C(503513108),  // V6_pred_and_n_128B
1819
5.77k
    UINT64_C(503513096),  // V6_pred_not
1820
5.77k
    UINT64_C(503513096),  // V6_pred_not_128B
1821
5.77k
    UINT64_C(503513092),  // V6_pred_or
1822
5.77k
    UINT64_C(503513092),  // V6_pred_or_128B
1823
5.77k
    UINT64_C(503513104),  // V6_pred_or_n
1824
5.77k
    UINT64_C(503513104),  // V6_pred_or_n_128B
1825
5.77k
    UINT64_C(429916228),  // V6_pred_scalar2
1826
5.77k
    UINT64_C(429916228),  // V6_pred_scalar2_128B
1827
5.77k
    UINT64_C(503513100),  // V6_pred_xor
1828
5.77k
    UINT64_C(503513100),  // V6_pred_xor_128B
1829
5.77k
    UINT64_C(671088864),  // V6_vL32Ub_ai
1830
5.77k
    UINT64_C(671088864),  // V6_vL32Ub_ai_128B
1831
5.77k
    UINT64_C(687866080),  // V6_vL32Ub_pi
1832
5.77k
    UINT64_C(687866080),  // V6_vL32Ub_pi_128B
1833
5.77k
    UINT64_C(721420512),  // V6_vL32Ub_ppu
1834
5.77k
    UINT64_C(671088640),  // V6_vL32b_ai
1835
5.77k
    UINT64_C(671088640),  // V6_vL32b_ai_128B
1836
5.77k
    UINT64_C(671088672),  // V6_vL32b_cur_ai
1837
5.77k
    UINT64_C(671088672),  // V6_vL32b_cur_ai_128B
1838
5.77k
    UINT64_C(687865888),  // V6_vL32b_cur_pi
1839
5.77k
    UINT64_C(687865888),  // V6_vL32b_cur_pi_128B
1840
5.77k
    UINT64_C(721420320),  // V6_vL32b_cur_ppu
1841
5.77k
    UINT64_C(675282944),  // V6_vL32b_nt_ai
1842
5.77k
    UINT64_C(675282944),  // V6_vL32b_nt_ai_128B
1843
5.77k
    UINT64_C(675282976),  // V6_vL32b_nt_cur_ai
1844
5.77k
    UINT64_C(675282976),  // V6_vL32b_nt_cur_ai_128B
1845
5.77k
    UINT64_C(692060192),  // V6_vL32b_nt_cur_pi
1846
5.77k
    UINT64_C(692060192),  // V6_vL32b_nt_cur_pi_128B
1847
5.77k
    UINT64_C(725614624),  // V6_vL32b_nt_cur_ppu
1848
5.77k
    UINT64_C(692060160),  // V6_vL32b_nt_pi
1849
5.77k
    UINT64_C(692060160),  // V6_vL32b_nt_pi_128B
1850
5.77k
    UINT64_C(725614592),  // V6_vL32b_nt_ppu
1851
5.77k
    UINT64_C(675283008),  // V6_vL32b_nt_tmp_ai
1852
5.77k
    UINT64_C(675283008),  // V6_vL32b_nt_tmp_ai_128B
1853
5.77k
    UINT64_C(692060224),  // V6_vL32b_nt_tmp_pi
1854
5.77k
    UINT64_C(692060224),  // V6_vL32b_nt_tmp_pi_128B
1855
5.77k
    UINT64_C(725614656),  // V6_vL32b_nt_tmp_ppu
1856
5.77k
    UINT64_C(687865856),  // V6_vL32b_pi
1857
5.77k
    UINT64_C(687865856),  // V6_vL32b_pi_128B
1858
5.77k
    UINT64_C(721420288),  // V6_vL32b_ppu
1859
5.77k
    UINT64_C(671088704),  // V6_vL32b_tmp_ai
1860
5.77k
    UINT64_C(671088704),  // V6_vL32b_tmp_ai_128B
1861
5.77k
    UINT64_C(687865920),  // V6_vL32b_tmp_pi
1862
5.77k
    UINT64_C(687865920),  // V6_vL32b_tmp_pi_128B
1863
5.77k
    UINT64_C(721420352),  // V6_vL32b_tmp_ppu
1864
5.77k
    UINT64_C(673186016),  // V6_vS32Ub_ai
1865
5.77k
    UINT64_C(673186016),  // V6_vS32Ub_ai_128B
1866
5.77k
    UINT64_C(681574624),  // V6_vS32Ub_npred_ai
1867
5.77k
    UINT64_C(681574624),  // V6_vS32Ub_npred_ai_128B
1868
5.77k
    UINT64_C(698351840),  // V6_vS32Ub_npred_pi
1869
5.77k
    UINT64_C(698351840),  // V6_vS32Ub_npred_pi_128B
1870
5.77k
    UINT64_C(731906272),  // V6_vS32Ub_npred_ppu
1871
5.77k
    UINT64_C(689963232),  // V6_vS32Ub_pi
1872
5.77k
    UINT64_C(689963232),  // V6_vS32Ub_pi_128B
1873
5.77k
    UINT64_C(723517664),  // V6_vS32Ub_ppu
1874
5.77k
    UINT64_C(681574592),  // V6_vS32Ub_pred_ai
1875
5.77k
    UINT64_C(681574592),  // V6_vS32Ub_pred_ai_128B
1876
5.77k
    UINT64_C(698351808),  // V6_vS32Ub_pred_pi
1877
5.77k
    UINT64_C(698351808),  // V6_vS32Ub_pred_pi_128B
1878
5.77k
    UINT64_C(731906240),  // V6_vS32Ub_pred_ppu
1879
5.77k
    UINT64_C(673185792),  // V6_vS32b_ai
1880
5.77k
    UINT64_C(673185792),  // V6_vS32b_ai_128B
1881
5.77k
    UINT64_C(673185824),  // V6_vS32b_new_ai
1882
5.77k
    UINT64_C(673185824),  // V6_vS32b_new_ai_128B
1883
5.77k
    UINT64_C(681574504),  // V6_vS32b_new_npred_ai
1884
5.77k
    UINT64_C(681574504),  // V6_vS32b_new_npred_ai_128B
1885
5.77k
    UINT64_C(698351720),  // V6_vS32b_new_npred_pi
1886
5.77k
    UINT64_C(698351720),  // V6_vS32b_new_npred_pi_128B
1887
5.77k
    UINT64_C(731906152),  // V6_vS32b_new_npred_ppu
1888
5.77k
    UINT64_C(689963040),  // V6_vS32b_new_pi
1889
5.77k
    UINT64_C(689963040),  // V6_vS32b_new_pi_128B
1890
5.77k
    UINT64_C(723517472),  // V6_vS32b_new_ppu
1891
5.77k
    UINT64_C(681574464),  // V6_vS32b_new_pred_ai
1892
5.77k
    UINT64_C(681574464),  // V6_vS32b_new_pred_ai_128B
1893
5.77k
    UINT64_C(698351680),  // V6_vS32b_new_pred_pi
1894
5.77k
    UINT64_C(698351680),  // V6_vS32b_new_pred_pi_128B
1895
5.77k
    UINT64_C(731906112),  // V6_vS32b_new_pred_ppu
1896
5.77k
    UINT64_C(681574432),  // V6_vS32b_npred_ai
1897
5.77k
    UINT64_C(681574432),  // V6_vS32b_npred_ai_128B
1898
5.77k
    UINT64_C(698351648),  // V6_vS32b_npred_pi
1899
5.77k
    UINT64_C(698351648),  // V6_vS32b_npred_pi_128B
1900
5.77k
    UINT64_C(731906080),  // V6_vS32b_npred_ppu
1901
5.77k
    UINT64_C(679477280),  // V6_vS32b_nqpred_ai
1902
5.77k
    UINT64_C(679477280),  // V6_vS32b_nqpred_ai_128B
1903
5.77k
    UINT64_C(696254496),  // V6_vS32b_nqpred_pi
1904
5.77k
    UINT64_C(696254496),  // V6_vS32b_nqpred_pi_128B
1905
5.77k
    UINT64_C(729808928),  // V6_vS32b_nqpred_ppu
1906
5.77k
    UINT64_C(677380096),  // V6_vS32b_nt_ai
1907
5.77k
    UINT64_C(677380096),  // V6_vS32b_nt_ai_128B
1908
5.77k
    UINT64_C(677380128),  // V6_vS32b_nt_new_ai
1909
5.77k
    UINT64_C(677380128),  // V6_vS32b_nt_new_ai_128B
1910
5.77k
    UINT64_C(685768824),  // V6_vS32b_nt_new_npred_ai
1911
5.77k
    UINT64_C(685768824),  // V6_vS32b_nt_new_npred_ai_128B
1912
5.77k
    UINT64_C(702546040),  // V6_vS32b_nt_new_npred_pi
1913
5.77k
    UINT64_C(702546040),  // V6_vS32b_nt_new_npred_pi_128B
1914
5.77k
    UINT64_C(736100472),  // V6_vS32b_nt_new_npred_ppu
1915
5.77k
    UINT64_C(694157344),  // V6_vS32b_nt_new_pi
1916
5.77k
    UINT64_C(694157344),  // V6_vS32b_nt_new_pi_128B
1917
5.77k
    UINT64_C(727711776),  // V6_vS32b_nt_new_ppu
1918
5.77k
    UINT64_C(685768784),  // V6_vS32b_nt_new_pred_ai
1919
5.77k
    UINT64_C(685768784),  // V6_vS32b_nt_new_pred_ai_128B
1920
5.77k
    UINT64_C(702546000),  // V6_vS32b_nt_new_pred_pi
1921
5.77k
    UINT64_C(702546000),  // V6_vS32b_nt_new_pred_pi_128B
1922
5.77k
    UINT64_C(736100432),  // V6_vS32b_nt_new_pred_ppu
1923
5.77k
    UINT64_C(685768736),  // V6_vS32b_nt_npred_ai
1924
5.77k
    UINT64_C(685768736),  // V6_vS32b_nt_npred_ai_128B
1925
5.77k
    UINT64_C(702545952),  // V6_vS32b_nt_npred_pi
1926
5.77k
    UINT64_C(702545952),  // V6_vS32b_nt_npred_pi_128B
1927
5.77k
    UINT64_C(736100384),  // V6_vS32b_nt_npred_ppu
1928
5.77k
    UINT64_C(683671584),  // V6_vS32b_nt_nqpred_ai
1929
5.77k
    UINT64_C(683671584),  // V6_vS32b_nt_nqpred_ai_128B
1930
5.77k
    UINT64_C(700448800),  // V6_vS32b_nt_nqpred_pi
1931
5.77k
    UINT64_C(700448800),  // V6_vS32b_nt_nqpred_pi_128B
1932
5.77k
    UINT64_C(734003232),  // V6_vS32b_nt_nqpred_ppu
1933
5.77k
    UINT64_C(694157312),  // V6_vS32b_nt_pi
1934
5.77k
    UINT64_C(694157312),  // V6_vS32b_nt_pi_128B
1935
5.77k
    UINT64_C(727711744),  // V6_vS32b_nt_ppu
1936
5.77k
    UINT64_C(685768704),  // V6_vS32b_nt_pred_ai
1937
5.77k
    UINT64_C(685768704),  // V6_vS32b_nt_pred_ai_128B
1938
5.77k
    UINT64_C(702545920),  // V6_vS32b_nt_pred_pi
1939
5.77k
    UINT64_C(702545920),  // V6_vS32b_nt_pred_pi_128B
1940
5.77k
    UINT64_C(736100352),  // V6_vS32b_nt_pred_ppu
1941
5.77k
    UINT64_C(683671552),  // V6_vS32b_nt_qpred_ai
1942
5.77k
    UINT64_C(683671552),  // V6_vS32b_nt_qpred_ai_128B
1943
5.77k
    UINT64_C(700448768),  // V6_vS32b_nt_qpred_pi
1944
5.77k
    UINT64_C(700448768),  // V6_vS32b_nt_qpred_pi_128B
1945
5.77k
    UINT64_C(734003200),  // V6_vS32b_nt_qpred_ppu
1946
5.77k
    UINT64_C(689963008),  // V6_vS32b_pi
1947
5.77k
    UINT64_C(689963008),  // V6_vS32b_pi_128B
1948
5.77k
    UINT64_C(723517440),  // V6_vS32b_ppu
1949
5.77k
    UINT64_C(681574400),  // V6_vS32b_pred_ai
1950
5.77k
    UINT64_C(681574400),  // V6_vS32b_pred_ai_128B
1951
5.77k
    UINT64_C(698351616),  // V6_vS32b_pred_pi
1952
5.77k
    UINT64_C(698351616),  // V6_vS32b_pred_pi_128B
1953
5.77k
    UINT64_C(731906048),  // V6_vS32b_pred_ppu
1954
5.77k
    UINT64_C(679477248),  // V6_vS32b_qpred_ai
1955
5.77k
    UINT64_C(679477248),  // V6_vS32b_qpred_ai_128B
1956
5.77k
    UINT64_C(696254464),  // V6_vS32b_qpred_pi
1957
5.77k
    UINT64_C(696254464),  // V6_vS32b_qpred_pi_128B
1958
5.77k
    UINT64_C(729808896),  // V6_vS32b_qpred_ppu
1959
5.77k
    UINT64_C(482344992),  // V6_vabsdiffh
1960
5.77k
    UINT64_C(482344992),  // V6_vabsdiffh_128B
1961
5.77k
    UINT64_C(482344960),  // V6_vabsdiffub
1962
5.77k
    UINT64_C(482344960),  // V6_vabsdiffub_128B
1963
5.77k
    UINT64_C(482345024),  // V6_vabsdiffuh
1964
5.77k
    UINT64_C(482345024),  // V6_vabsdiffuh_128B
1965
5.77k
    UINT64_C(482345056),  // V6_vabsdiffw
1966
5.77k
    UINT64_C(482345056),  // V6_vabsdiffw_128B
1967
5.77k
    UINT64_C(503316480),  // V6_vabsh
1968
5.77k
    UINT64_C(503316480),  // V6_vabsh_128B
1969
5.77k
    UINT64_C(503316512),  // V6_vabsh_sat
1970
5.77k
    UINT64_C(503316512),  // V6_vabsh_sat_128B
1971
5.77k
    UINT64_C(503316544),  // V6_vabsw
1972
5.77k
    UINT64_C(503316544),  // V6_vabsw_128B
1973
5.77k
    UINT64_C(503316576),  // V6_vabsw_sat
1974
5.77k
    UINT64_C(503316576),  // V6_vabsw_sat_128B
1975
5.77k
    UINT64_C(530579648),  // V6_vaddb
1976
5.77k
    UINT64_C(530579648),  // V6_vaddb_128B
1977
5.77k
    UINT64_C(476053632),  // V6_vaddb_dv
1978
5.77k
    UINT64_C(476053632),  // V6_vaddb_dv_128B
1979
5.77k
    UINT64_C(503390304),  // V6_vaddbnq
1980
5.77k
    UINT64_C(503390304),  // V6_vaddbnq_128B
1981
5.77k
    UINT64_C(503390208),  // V6_vaddbq
1982
5.77k
    UINT64_C(503390208),  // V6_vaddbq_128B
1983
5.77k
    UINT64_C(530579680),  // V6_vaddh
1984
5.77k
    UINT64_C(530579680),  // V6_vaddh_128B
1985
5.77k
    UINT64_C(476053664),  // V6_vaddh_dv
1986
5.77k
    UINT64_C(476053664),  // V6_vaddh_dv_128B
1987
5.77k
    UINT64_C(503390336),  // V6_vaddhnq
1988
5.77k
    UINT64_C(503390336),  // V6_vaddhnq_128B
1989
5.77k
    UINT64_C(503390240),  // V6_vaddhq
1990
5.77k
    UINT64_C(503390240),  // V6_vaddhq_128B
1991
5.77k
    UINT64_C(473956448),  // V6_vaddhsat
1992
5.77k
    UINT64_C(473956448),  // V6_vaddhsat_128B
1993
5.77k
    UINT64_C(478150688),  // V6_vaddhsat_dv
1994
5.77k
    UINT64_C(478150688),  // V6_vaddhsat_dv_128B
1995
5.77k
    UINT64_C(480247936),  // V6_vaddhw
1996
5.77k
    UINT64_C(480247936),  // V6_vaddhw_128B
1997
5.77k
    UINT64_C(480247872),  // V6_vaddubh
1998
5.77k
    UINT64_C(480247872),  // V6_vaddubh_128B
1999
5.77k
    UINT64_C(473956384),  // V6_vaddubsat
2000
5.77k
    UINT64_C(473956384),  // V6_vaddubsat_128B
2001
5.77k
    UINT64_C(476053728),  // V6_vaddubsat_dv
2002
5.77k
    UINT64_C(476053728),  // V6_vaddubsat_dv_128B
2003
5.77k
    UINT64_C(473956416),  // V6_vadduhsat
2004
5.77k
    UINT64_C(473956416),  // V6_vadduhsat_128B
2005
5.77k
    UINT64_C(478150656),  // V6_vadduhsat_dv
2006
5.77k
    UINT64_C(478150656),  // V6_vadduhsat_dv_128B
2007
5.77k
    UINT64_C(480247904),  // V6_vadduhw
2008
5.77k
    UINT64_C(480247904),  // V6_vadduhw_128B
2009
5.77k
    UINT64_C(473956352),  // V6_vaddw
2010
5.77k
    UINT64_C(473956352),  // V6_vaddw_128B
2011
5.77k
    UINT64_C(476053696),  // V6_vaddw_dv
2012
5.77k
    UINT64_C(476053696),  // V6_vaddw_dv_128B
2013
5.77k
    UINT64_C(503390368),  // V6_vaddwnq
2014
5.77k
    UINT64_C(503390368),  // V6_vaddwnq_128B
2015
5.77k
    UINT64_C(503390272),  // V6_vaddwq
2016
5.77k
    UINT64_C(503390272),  // V6_vaddwq_128B
2017
5.77k
    UINT64_C(473956480),  // V6_vaddwsat
2018
5.77k
    UINT64_C(473956480),  // V6_vaddwsat_128B
2019
5.77k
    UINT64_C(478150720),  // V6_vaddwsat_dv
2020
5.77k
    UINT64_C(478150720),  // V6_vaddwsat_dv_128B
2021
5.77k
    UINT64_C(452984832),  // V6_valignb
2022
5.77k
    UINT64_C(452984832),  // V6_valignb_128B
2023
5.77k
    UINT64_C(505421824),  // V6_valignbi
2024
5.77k
    UINT64_C(505421824),  // V6_valignbi_128B
2025
5.77k
    UINT64_C(471859360),  // V6_vand
2026
5.77k
    UINT64_C(471859360),  // V6_vand_128B
2027
5.77k
    UINT64_C(429916320),  // V6_vandqrt
2028
5.77k
    UINT64_C(429916320),  // V6_vandqrt_128B
2029
5.77k
    UINT64_C(425730144),  // V6_vandqrt_acc
2030
5.77k
    UINT64_C(425730144),  // V6_vandqrt_acc_128B
2031
5.77k
    UINT64_C(429916232),  // V6_vandvrt
2032
5.77k
    UINT64_C(429916232),  // V6_vandvrt_128B
2033
5.77k
    UINT64_C(425730176),  // V6_vandvrt_acc
2034
5.77k
    UINT64_C(425730176),  // V6_vandvrt_acc_128B
2035
5.77k
    UINT64_C(427819008),  // V6_vaslh
2036
5.77k
    UINT64_C(427819008),  // V6_vaslh_128B
2037
5.77k
    UINT64_C(530579616),  // V6_vaslhv
2038
5.77k
    UINT64_C(530579616),  // V6_vaslhv_128B
2039
5.77k
    UINT64_C(425722080),  // V6_vaslw
2040
5.77k
    UINT64_C(425722080),  // V6_vaslw_128B
2041
5.77k
    UINT64_C(425730112),  // V6_vaslw_acc
2042
5.77k
    UINT64_C(425730112),  // V6_vaslw_acc_128B
2043
5.77k
    UINT64_C(530579584),  // V6_vaslwv
2044
5.77k
    UINT64_C(530579584),  // V6_vaslwv_128B
2045
5.77k
    UINT64_C(425722048),  // V6_vasrh
2046
5.77k
    UINT64_C(425722048),  // V6_vasrh_128B
2047
5.77k
    UINT64_C(452993024),  // V6_vasrhbrndsat
2048
5.77k
    UINT64_C(452993024),  // V6_vasrhbrndsat_128B
2049
5.77k
    UINT64_C(452985056),  // V6_vasrhubrndsat
2050
5.77k
    UINT64_C(452985056),  // V6_vasrhubrndsat_128B
2051
5.77k
    UINT64_C(452985024),  // V6_vasrhubsat
2052
5.77k
    UINT64_C(452985024),  // V6_vasrhubsat_128B
2053
5.77k
    UINT64_C(530579552),  // V6_vasrhv
2054
5.77k
    UINT64_C(530579552),  // V6_vasrhv_128B
2055
5.77k
    UINT64_C(425722016),  // V6_vasrw
2056
5.77k
    UINT64_C(425722016),  // V6_vasrw_128B
2057
5.77k
    UINT64_C(425730208),  // V6_vasrw_acc
2058
5.77k
    UINT64_C(425730208),  // V6_vasrw_acc_128B
2059
5.77k
    UINT64_C(452984896),  // V6_vasrwh
2060
5.77k
    UINT64_C(452984896),  // V6_vasrwh_128B
2061
5.77k
    UINT64_C(452984960),  // V6_vasrwhrndsat
2062
5.77k
    UINT64_C(452984960),  // V6_vasrwhrndsat_128B
2063
5.77k
    UINT64_C(452984928),  // V6_vasrwhsat
2064
5.77k
    UINT64_C(452984928),  // V6_vasrwhsat_128B
2065
5.77k
    UINT64_C(452984992),  // V6_vasrwuhsat
2066
5.77k
    UINT64_C(452984992),  // V6_vasrwuhsat_128B
2067
5.77k
    UINT64_C(530579456),  // V6_vasrwv
2068
5.77k
    UINT64_C(530579456),  // V6_vasrwv_128B
2069
5.77k
    UINT64_C(503521504),  // V6_vassign
2070
5.77k
    UINT64_C(503521504),  // V6_vassign_128B
2071
5.77k
    UINT64_C(482345152),  // V6_vavgh
2072
5.77k
    UINT64_C(482345152),  // V6_vavgh_128B
2073
5.77k
    UINT64_C(484442272),  // V6_vavghrnd
2074
5.77k
    UINT64_C(484442272),  // V6_vavghrnd_128B
2075
5.77k
    UINT64_C(482345088),  // V6_vavgub
2076
5.77k
    UINT64_C(482345088),  // V6_vavgub_128B
2077
5.77k
    UINT64_C(484442208),  // V6_vavgubrnd
2078
5.77k
    UINT64_C(484442208),  // V6_vavgubrnd_128B
2079
5.77k
    UINT64_C(482345120),  // V6_vavguh
2080
5.77k
    UINT64_C(482345120),  // V6_vavguh_128B
2081
5.77k
    UINT64_C(484442240),  // V6_vavguhrnd
2082
5.77k
    UINT64_C(484442240),  // V6_vavguhrnd_128B
2083
5.77k
    UINT64_C(482345184),  // V6_vavgw
2084
5.77k
    UINT64_C(482345184),  // V6_vavgw_128B
2085
5.77k
    UINT64_C(484442304),  // V6_vavgwrnd
2086
5.77k
    UINT64_C(484442304),  // V6_vavgwrnd_128B
2087
5.77k
    UINT64_C(442499072),  // V6_vccombine
2088
5.77k
    UINT64_C(442499072),  // V6_vccombine_128B
2089
5.77k
    UINT64_C(503447776),  // V6_vcl0h
2090
5.77k
    UINT64_C(503447776),  // V6_vcl0h_128B
2091
5.77k
    UINT64_C(503447712),  // V6_vcl0w
2092
5.77k
    UINT64_C(503447712),  // V6_vcl0w_128B
2093
5.77k
    UINT64_C(436207616),  // V6_vcmov
2094
5.77k
    UINT64_C(436207616),  // V6_vcmov_128B
2095
5.77k
    UINT64_C(524288224),  // V6_vcombine
2096
5.77k
    UINT64_C(524288224),  // V6_vcombine_128B
2097
5.77k
    UINT64_C(434118720),  // V6_vdeal
2098
5.77k
    UINT64_C(434118720),  // V6_vdeal_128B
2099
5.77k
    UINT64_C(503316704),  // V6_vdealb
2100
5.77k
    UINT64_C(522191072),  // V6_vdealb4w
2101
5.77k
    UINT64_C(522191072),  // V6_vdealb4w_128B
2102
5.77k
    UINT64_C(503316704),  // V6_vdealb_128B
2103
5.77k
    UINT64_C(503316672),  // V6_vdealh
2104
5.77k
    UINT64_C(503316672),  // V6_vdealh_128B
2105
5.77k
    UINT64_C(452993152),  // V6_vdealvdd
2106
5.77k
    UINT64_C(452993152),  // V6_vdealvdd_128B
2107
5.77k
    UINT64_C(522190880),  // V6_vdelta
2108
5.77k
    UINT64_C(522190880),  // V6_vdelta_128B
2109
5.77k
    UINT64_C(419430592),  // V6_vdmpybus
2110
5.77k
    UINT64_C(419430592),  // V6_vdmpybus_128B
2111
5.77k
    UINT64_C(419438784),  // V6_vdmpybus_acc
2112
5.77k
    UINT64_C(419438784),  // V6_vdmpybus_acc_128B
2113
5.77k
    UINT64_C(419430624),  // V6_vdmpybus_dv
2114
5.77k
    UINT64_C(419430624),  // V6_vdmpybus_dv_128B
2115
5.77k
    UINT64_C(419438816),  // V6_vdmpybus_dv_acc
2116
5.77k
    UINT64_C(419438816),  // V6_vdmpybus_dv_acc_128B
2117
5.77k
    UINT64_C(419430464),  // V6_vdmpyhb
2118
5.77k
    UINT64_C(419430464),  // V6_vdmpyhb_128B
2119
5.77k
    UINT64_C(419438688),  // V6_vdmpyhb_acc
2120
5.77k
    UINT64_C(419438688),  // V6_vdmpyhb_acc_128B
2121
5.77k
    UINT64_C(421527680),  // V6_vdmpyhb_dv
2122
5.77k
    UINT64_C(421527680),  // V6_vdmpyhb_dv_128B
2123
5.77k
    UINT64_C(421535872),  // V6_vdmpyhb_dv_acc
2124
5.77k
    UINT64_C(421535872),  // V6_vdmpyhb_dv_acc_128B
2125
5.77k
    UINT64_C(421527648),  // V6_vdmpyhisat
2126
5.77k
    UINT64_C(421527648),  // V6_vdmpyhisat_128B
2127
5.77k
    UINT64_C(421535808),  // V6_vdmpyhisat_acc
2128
5.77k
    UINT64_C(421535808),  // V6_vdmpyhisat_acc_128B
2129
5.77k
    UINT64_C(421527616),  // V6_vdmpyhsat
2130
5.77k
    UINT64_C(421527616),  // V6_vdmpyhsat_128B
2131
5.77k
    UINT64_C(421535840),  // V6_vdmpyhsat_acc
2132
5.77k
    UINT64_C(421535840),  // V6_vdmpyhsat_acc_128B
2133
5.77k
    UINT64_C(421527584),  // V6_vdmpyhsuisat
2134
5.77k
    UINT64_C(421527584),  // V6_vdmpyhsuisat_128B
2135
5.77k
    UINT64_C(421535776),  // V6_vdmpyhsuisat_acc
2136
5.77k
    UINT64_C(421535776),  // V6_vdmpyhsuisat_acc_128B
2137
5.77k
    UINT64_C(421527552),  // V6_vdmpyhsusat
2138
5.77k
    UINT64_C(421527552),  // V6_vdmpyhsusat_128B
2139
5.77k
    UINT64_C(421535744),  // V6_vdmpyhsusat_acc
2140
5.77k
    UINT64_C(421535744),  // V6_vdmpyhsusat_acc_128B
2141
5.77k
    UINT64_C(469762144),  // V6_vdmpyhvsat
2142
5.77k
    UINT64_C(469762144),  // V6_vdmpyhvsat_128B
2143
5.77k
    UINT64_C(469770336),  // V6_vdmpyhvsat_acc
2144
5.77k
    UINT64_C(469770336),  // V6_vdmpyhvsat_acc_128B
2145
5.77k
    UINT64_C(419430560),  // V6_vdsaduh
2146
5.77k
    UINT64_C(419430560),  // V6_vdsaduh_128B
2147
5.77k
    UINT64_C(425730048),  // V6_vdsaduh_acc
2148
5.77k
    UINT64_C(425730048),  // V6_vdsaduh_acc_128B
2149
5.77k
    UINT64_C(528482304),  // V6_veqb
2150
5.77k
    UINT64_C(528482304),  // V6_veqb_128B
2151
5.77k
    UINT64_C(478158848),  // V6_veqb_and
2152
5.77k
    UINT64_C(478158848),  // V6_veqb_and_128B
2153
5.77k
    UINT64_C(478158912),  // V6_veqb_or
2154
5.77k
    UINT64_C(478158912),  // V6_veqb_or_128B
2155
5.77k
    UINT64_C(478158976),  // V6_veqb_xor
2156
5.77k
    UINT64_C(478158976),  // V6_veqb_xor_128B
2157
5.77k
    UINT64_C(528482308),  // V6_veqh
2158
5.77k
    UINT64_C(528482308),  // V6_veqh_128B
2159
5.77k
    UINT64_C(478158852),  // V6_veqh_and
2160
5.77k
    UINT64_C(478158852),  // V6_veqh_and_128B
2161
5.77k
    UINT64_C(478158916),  // V6_veqh_or
2162
5.77k
    UINT64_C(478158916),  // V6_veqh_or_128B
2163
5.77k
    UINT64_C(478158980),  // V6_veqh_xor
2164
5.77k
    UINT64_C(478158980),  // V6_veqh_xor_128B
2165
5.77k
    UINT64_C(528482312),  // V6_veqw
2166
5.77k
    UINT64_C(528482312),  // V6_veqw_128B
2167
5.77k
    UINT64_C(478158856),  // V6_veqw_and
2168
5.77k
    UINT64_C(478158856),  // V6_veqw_and_128B
2169
5.77k
    UINT64_C(478158920),  // V6_veqw_or
2170
5.77k
    UINT64_C(478158920),  // V6_veqw_or_128B
2171
5.77k
    UINT64_C(478158984),  // V6_veqw_xor
2172
5.77k
    UINT64_C(478158984),  // V6_veqw_xor_128B
2173
5.77k
    UINT64_C(528482320),  // V6_vgtb
2174
5.77k
    UINT64_C(528482320),  // V6_vgtb_128B
2175
5.77k
    UINT64_C(478158864),  // V6_vgtb_and
2176
5.77k
    UINT64_C(478158864),  // V6_vgtb_and_128B
2177
5.77k
    UINT64_C(478158928),  // V6_vgtb_or
2178
5.77k
    UINT64_C(478158928),  // V6_vgtb_or_128B
2179
5.77k
    UINT64_C(478158992),  // V6_vgtb_xor
2180
5.77k
    UINT64_C(478158992),  // V6_vgtb_xor_128B
2181
5.77k
    UINT64_C(528482324),  // V6_vgth
2182
5.77k
    UINT64_C(528482324),  // V6_vgth_128B
2183
5.77k
    UINT64_C(478158868),  // V6_vgth_and
2184
5.77k
    UINT64_C(478158868),  // V6_vgth_and_128B
2185
5.77k
    UINT64_C(478158932),  // V6_vgth_or
2186
5.77k
    UINT64_C(478158932),  // V6_vgth_or_128B
2187
5.77k
    UINT64_C(478158996),  // V6_vgth_xor
2188
5.77k
    UINT64_C(478158996),  // V6_vgth_xor_128B
2189
5.77k
    UINT64_C(528482336),  // V6_vgtub
2190
5.77k
    UINT64_C(528482336),  // V6_vgtub_128B
2191
5.77k
    UINT64_C(478158880),  // V6_vgtub_and
2192
5.77k
    UINT64_C(478158880),  // V6_vgtub_and_128B
2193
5.77k
    UINT64_C(478158944),  // V6_vgtub_or
2194
5.77k
    UINT64_C(478158944),  // V6_vgtub_or_128B
2195
5.77k
    UINT64_C(478159008),  // V6_vgtub_xor
2196
5.77k
    UINT64_C(478159008),  // V6_vgtub_xor_128B
2197
5.77k
    UINT64_C(528482340),  // V6_vgtuh
2198
5.77k
    UINT64_C(528482340),  // V6_vgtuh_128B
2199
5.77k
    UINT64_C(478158884),  // V6_vgtuh_and
2200
5.77k
    UINT64_C(478158884),  // V6_vgtuh_and_128B
2201
5.77k
    UINT64_C(478158948),  // V6_vgtuh_or
2202
5.77k
    UINT64_C(478158948),  // V6_vgtuh_or_128B
2203
5.77k
    UINT64_C(478159012),  // V6_vgtuh_xor
2204
5.77k
    UINT64_C(478159012),  // V6_vgtuh_xor_128B
2205
5.77k
    UINT64_C(528482344),  // V6_vgtuw
2206
5.77k
    UINT64_C(528482344),  // V6_vgtuw_128B
2207
5.77k
    UINT64_C(478158888),  // V6_vgtuw_and
2208
5.77k
    UINT64_C(478158888),  // V6_vgtuw_and_128B
2209
5.77k
    UINT64_C(478158952),  // V6_vgtuw_or
2210
5.77k
    UINT64_C(478158952),  // V6_vgtuw_or_128B
2211
5.77k
    UINT64_C(478159016),  // V6_vgtuw_xor
2212
5.77k
    UINT64_C(478159016),  // V6_vgtuw_xor_128B
2213
5.77k
    UINT64_C(528482328),  // V6_vgtw
2214
5.77k
    UINT64_C(528482328),  // V6_vgtw_128B
2215
5.77k
    UINT64_C(478158872),  // V6_vgtw_and
2216
5.77k
    UINT64_C(478158872),  // V6_vgtw_and_128B
2217
5.77k
    UINT64_C(478158936),  // V6_vgtw_or
2218
5.77k
    UINT64_C(478158936),  // V6_vgtw_or_128B
2219
5.77k
    UINT64_C(478159000),  // V6_vgtw_xor
2220
5.77k
    UINT64_C(478159000),  // V6_vgtw_xor_128B
2221
5.77k
    UINT64_C(503324800),  // V6_vhist
2222
5.77k
    UINT64_C(503455872),  // V6_vhistq
2223
5.77k
    UINT64_C(429924384),  // V6_vinsertwr
2224
5.77k
    UINT64_C(429924384),  // V6_vinsertwr_128B
2225
5.77k
    UINT64_C(452984864),  // V6_vlalignb
2226
5.77k
    UINT64_C(452984864),  // V6_vlalignb_128B
2227
5.77k
    UINT64_C(509616128),  // V6_vlalignbi
2228
5.77k
    UINT64_C(509616128),  // V6_vlalignbi_128B
2229
5.77k
    UINT64_C(427819072),  // V6_vlsrh
2230
5.77k
    UINT64_C(427819072),  // V6_vlsrh_128B
2231
5.77k
    UINT64_C(530579520),  // V6_vlsrhv
2232
5.77k
    UINT64_C(530579520),  // V6_vlsrhv_128B
2233
5.77k
    UINT64_C(427819040),  // V6_vlsrw
2234
5.77k
    UINT64_C(427819040),  // V6_vlsrw_128B
2235
5.77k
    UINT64_C(530579488),  // V6_vlsrwv
2236
5.77k
    UINT64_C(530579488),  // V6_vlsrwv_128B
2237
5.77k
    UINT64_C(452993056),  // V6_vlutvvb
2238
5.77k
    UINT64_C(452993056),  // V6_vlutvvb_128B
2239
5.77k
    UINT64_C(452993184),  // V6_vlutvvb_oracc
2240
5.77k
    UINT64_C(452993184),  // V6_vlutvvb_oracc_128B
2241
5.77k
    UINT64_C(452993216),  // V6_vlutvwh
2242
5.77k
    UINT64_C(452993216),  // V6_vlutvwh_128B
2243
5.77k
    UINT64_C(452993248),  // V6_vlutvwh_oracc
2244
5.77k
    UINT64_C(452993248),  // V6_vlutvwh_oracc_128B
2245
5.77k
    UINT64_C(520093920),  // V6_vmaxh
2246
5.77k
    UINT64_C(520093920),  // V6_vmaxh_128B
2247
5.77k
    UINT64_C(520093856),  // V6_vmaxub
2248
5.77k
    UINT64_C(520093856),  // V6_vmaxub_128B
2249
5.77k
    UINT64_C(520093888),  // V6_vmaxuh
2250
5.77k
    UINT64_C(520093888),  // V6_vmaxuh_128B
2251
5.77k
    UINT64_C(522190848),  // V6_vmaxw
2252
5.77k
    UINT64_C(522190848),  // V6_vmaxw_128B
2253
5.77k
    UINT64_C(520093792),  // V6_vminh
2254
5.77k
    UINT64_C(520093792),  // V6_vminh_128B
2255
5.77k
    UINT64_C(520093728),  // V6_vminub
2256
5.77k
    UINT64_C(520093728),  // V6_vminub_128B
2257
5.77k
    UINT64_C(520093760),  // V6_vminuh
2258
5.77k
    UINT64_C(520093760),  // V6_vminuh_128B
2259
5.77k
    UINT64_C(520093824),  // V6_vminw
2260
5.77k
    UINT64_C(520093824),  // V6_vminw_128B
2261
5.77k
    UINT64_C(421527744),  // V6_vmpabus
2262
5.77k
    UINT64_C(421527744),  // V6_vmpabus_128B
2263
5.77k
    UINT64_C(421535936),  // V6_vmpabus_acc
2264
5.77k
    UINT64_C(421535936),  // V6_vmpabus_acc_128B
2265
5.77k
    UINT64_C(471859296),  // V6_vmpabusv
2266
5.77k
    UINT64_C(471859296),  // V6_vmpabusv_128B
2267
5.77k
    UINT64_C(484442336),  // V6_vmpabuuv
2268
5.77k
    UINT64_C(484442336),  // V6_vmpabuuv_128B
2269
5.77k
    UINT64_C(421527776),  // V6_vmpahb
2270
5.77k
    UINT64_C(421527776),  // V6_vmpahb_128B
2271
5.77k
    UINT64_C(421535968),  // V6_vmpahb_acc
2272
5.77k
    UINT64_C(421535968),  // V6_vmpahb_acc_128B
2273
5.77k
    UINT64_C(421527712),  // V6_vmpybus
2274
5.77k
    UINT64_C(421527712),  // V6_vmpybus_128B
2275
5.77k
    UINT64_C(421535904),  // V6_vmpybus_acc
2276
5.77k
    UINT64_C(421535904),  // V6_vmpybus_acc_128B
2277
5.77k
    UINT64_C(469762240),  // V6_vmpybusv
2278
5.77k
    UINT64_C(469762240),  // V6_vmpybusv_128B
2279
5.77k
    UINT64_C(469770432),  // V6_vmpybusv_acc
2280
5.77k
    UINT64_C(469770432),  // V6_vmpybusv_acc_128B
2281
5.77k
    UINT64_C(469762176),  // V6_vmpybv
2282
5.77k
    UINT64_C(469762176),  // V6_vmpybv_128B
2283
5.77k
    UINT64_C(469770368),  // V6_vmpybv_acc
2284
5.77k
    UINT64_C(469770368),  // V6_vmpybv_acc_128B
2285
5.77k
    UINT64_C(534773920),  // V6_vmpyewuh
2286
5.77k
    UINT64_C(534773920),  // V6_vmpyewuh_128B
2287
5.77k
    UINT64_C(423624704),  // V6_vmpyh
2288
5.77k
    UINT64_C(423624704),  // V6_vmpyh_128B
2289
5.77k
    UINT64_C(423632896),  // V6_vmpyhsat_acc
2290
5.77k
    UINT64_C(423632896),  // V6_vmpyhsat_acc_128B
2291
5.77k
    UINT64_C(423624768),  // V6_vmpyhsrs
2292
5.77k
    UINT64_C(423624768),  // V6_vmpyhsrs_128B
2293
5.77k
    UINT64_C(423624736),  // V6_vmpyhss
2294
5.77k
    UINT64_C(423624736),  // V6_vmpyhss_128B
2295
5.77k
    UINT64_C(471859264),  // V6_vmpyhus
2296
5.77k
    UINT64_C(471859264),  // V6_vmpyhus_128B
2297
5.77k
    UINT64_C(471867424),  // V6_vmpyhus_acc
2298
5.77k
    UINT64_C(471867424),  // V6_vmpyhus_acc_128B
2299
5.77k
    UINT64_C(469762272),  // V6_vmpyhv
2300
5.77k
    UINT64_C(469762272),  // V6_vmpyhv_128B
2301
5.77k
    UINT64_C(469770464),  // V6_vmpyhv_acc
2302
5.77k
    UINT64_C(469770464),  // V6_vmpyhv_acc_128B
2303
5.77k
    UINT64_C(471859232),  // V6_vmpyhvsrs
2304
5.77k
    UINT64_C(471859232),  // V6_vmpyhvsrs_128B
2305
5.77k
    UINT64_C(526385152),  // V6_vmpyieoh
2306
5.77k
    UINT64_C(526385152),  // V6_vmpyieoh_128B
2307
5.77k
    UINT64_C(473964544),  // V6_vmpyiewh_acc
2308
5.77k
    UINT64_C(473964544),  // V6_vmpyiewh_acc_128B
2309
5.77k
    UINT64_C(532676608),  // V6_vmpyiewuh
2310
5.77k
    UINT64_C(532676608),  // V6_vmpyiewuh_128B
2311
5.77k
    UINT64_C(471867552),  // V6_vmpyiewuh_acc
2312
5.77k
    UINT64_C(471867552),  // V6_vmpyiewuh_acc_128B
2313
5.77k
    UINT64_C(471859328),  // V6_vmpyih
2314
5.77k
    UINT64_C(471859328),  // V6_vmpyih_128B
2315
5.77k
    UINT64_C(471867520),  // V6_vmpyih_acc
2316
5.77k
    UINT64_C(471867520),  // V6_vmpyih_acc_128B
2317
5.77k
    UINT64_C(425721856),  // V6_vmpyihb
2318
5.77k
    UINT64_C(425721856),  // V6_vmpyihb_128B
2319
5.77k
    UINT64_C(425730080),  // V6_vmpyihb_acc
2320
5.77k
    UINT64_C(425730080),  // V6_vmpyihb_acc_128B
2321
5.77k
    UINT64_C(532676640),  // V6_vmpyiowh
2322
5.77k
    UINT64_C(532676640),  // V6_vmpyiowh_128B
2323
5.77k
    UINT64_C(429916160),  // V6_vmpyiwb
2324
5.77k
    UINT64_C(429916160),  // V6_vmpyiwb_128B
2325
5.77k
    UINT64_C(423632960),  // V6_vmpyiwb_acc
2326
5.77k
    UINT64_C(423632960),  // V6_vmpyiwb_acc_128B
2327
5.77k
    UINT64_C(427819232),  // V6_vmpyiwh
2328
5.77k
    UINT64_C(427819232),  // V6_vmpyiwh_128B
2329
5.77k
    UINT64_C(423632992),  // V6_vmpyiwh_acc
2330
5.77k
    UINT64_C(423632992),  // V6_vmpyiwh_acc_128B
2331
5.77k
    UINT64_C(534773984),  // V6_vmpyowh
2332
5.77k
    UINT64_C(534773984),  // V6_vmpyowh_128B
2333
5.77k
    UINT64_C(524288000),  // V6_vmpyowh_rnd
2334
5.77k
    UINT64_C(524288000),  // V6_vmpyowh_rnd_128B
2335
5.77k
    UINT64_C(471867616),  // V6_vmpyowh_rnd_sacc
2336
5.77k
    UINT64_C(471867616),  // V6_vmpyowh_rnd_sacc_128B
2337
5.77k
    UINT64_C(471867584),  // V6_vmpyowh_sacc
2338
5.77k
    UINT64_C(471867584),  // V6_vmpyowh_sacc_128B
2339
5.77k
    UINT64_C(432013312),  // V6_vmpyub
2340
5.77k
    UINT64_C(432013312),  // V6_vmpyub_128B
2341
5.77k
    UINT64_C(427827200),  // V6_vmpyub_acc
2342
5.77k
    UINT64_C(427827200),  // V6_vmpyub_acc_128B
2343
5.77k
    UINT64_C(469762208),  // V6_vmpyubv
2344
5.77k
    UINT64_C(469762208),  // V6_vmpyubv_128B
2345
5.77k
    UINT64_C(469770400),  // V6_vmpyubv_acc
2346
5.77k
    UINT64_C(469770400),  // V6_vmpyubv_acc_128B
2347
5.77k
    UINT64_C(423624800),  // V6_vmpyuh
2348
5.77k
    UINT64_C(423624800),  // V6_vmpyuh_128B
2349
5.77k
    UINT64_C(423632928),  // V6_vmpyuh_acc
2350
5.77k
    UINT64_C(423632928),  // V6_vmpyuh_acc_128B
2351
5.77k
    UINT64_C(471859200),  // V6_vmpyuhv
2352
5.77k
    UINT64_C(471859200),  // V6_vmpyuhv_128B
2353
5.77k
    UINT64_C(471867392),  // V6_vmpyuhv_acc
2354
5.77k
    UINT64_C(471867392),  // V6_vmpyuhv_acc_128B
2355
5.77k
    UINT64_C(518004736),  // V6_vmux
2356
5.77k
    UINT64_C(518004736),  // V6_vmux_128B
2357
5.77k
    UINT64_C(484442144),  // V6_vnavgh
2358
5.77k
    UINT64_C(484442144),  // V6_vnavgh_128B
2359
5.77k
    UINT64_C(484442112),  // V6_vnavgub
2360
5.77k
    UINT64_C(484442112),  // V6_vnavgub_128B
2361
5.77k
    UINT64_C(484442176),  // V6_vnavgw
2362
5.77k
    UINT64_C(484442176),  // V6_vnavgw_128B
2363
5.77k
    UINT64_C(440401920),  // V6_vnccombine
2364
5.77k
    UINT64_C(440401920),  // V6_vnccombine_128B
2365
5.77k
    UINT64_C(438304768),  // V6_vncmov
2366
5.77k
    UINT64_C(438304768),  // V6_vncmov_128B
2367
5.77k
    UINT64_C(503513248),  // V6_vnormamth
2368
5.77k
    UINT64_C(503513248),  // V6_vnormamth_128B
2369
5.77k
    UINT64_C(503513216),  // V6_vnormamtw
2370
5.77k
    UINT64_C(503513216),  // V6_vnormamtw_128B
2371
5.77k
    UINT64_C(503316608),  // V6_vnot
2372
5.77k
    UINT64_C(503316608),  // V6_vnot_128B
2373
5.77k
    UINT64_C(471859392),  // V6_vor
2374
5.77k
    UINT64_C(471859392),  // V6_vor_128B
2375
5.77k
    UINT64_C(532676672),  // V6_vpackeb
2376
5.77k
    UINT64_C(532676672),  // V6_vpackeb_128B
2377
5.77k
    UINT64_C(532676704),  // V6_vpackeh
2378
5.77k
    UINT64_C(532676704),  // V6_vpackeh_128B
2379
5.77k
    UINT64_C(532676800),  // V6_vpackhb_sat
2380
5.77k
    UINT64_C(532676800),  // V6_vpackhb_sat_128B
2381
5.77k
    UINT64_C(532676768),  // V6_vpackhub_sat
2382
5.77k
    UINT64_C(532676768),  // V6_vpackhub_sat_128B
2383
5.77k
    UINT64_C(534773792),  // V6_vpackob
2384
5.77k
    UINT64_C(534773792),  // V6_vpackob_128B
2385
5.77k
    UINT64_C(534773824),  // V6_vpackoh
2386
5.77k
    UINT64_C(534773824),  // V6_vpackoh_128B
2387
5.77k
    UINT64_C(534773760),  // V6_vpackwh_sat
2388
5.77k
    UINT64_C(534773760),  // V6_vpackwh_sat_128B
2389
5.77k
    UINT64_C(532676832),  // V6_vpackwuh_sat
2390
5.77k
    UINT64_C(532676832),  // V6_vpackwuh_sat_128B
2391
5.77k
    UINT64_C(503447744),  // V6_vpopcounth
2392
5.77k
    UINT64_C(503447744),  // V6_vpopcounth_128B
2393
5.77k
    UINT64_C(522190944),  // V6_vrdelta
2394
5.77k
    UINT64_C(522190944),  // V6_vrdelta_128B
2395
5.77k
    UINT64_C(419430528),  // V6_vrmpybus
2396
5.77k
    UINT64_C(419430528),  // V6_vrmpybus_128B
2397
5.77k
    UINT64_C(419438752),  // V6_vrmpybus_acc
2398
5.77k
    UINT64_C(419438752),  // V6_vrmpybus_acc_128B
2399
5.77k
    UINT64_C(423624832),  // V6_vrmpybusi
2400
5.77k
    UINT64_C(423624832),  // V6_vrmpybusi_128B
2401
5.77k
    UINT64_C(423633024),  // V6_vrmpybusi_acc
2402
5.77k
    UINT64_C(423633024),  // V6_vrmpybusi_acc_128B
2403
5.77k
    UINT64_C(469762112),  // V6_vrmpybusv
2404
5.77k
    UINT64_C(469762112),  // V6_vrmpybusv_128B
2405
5.77k
    UINT64_C(469770304),  // V6_vrmpybusv_acc
2406
5.77k
    UINT64_C(469770304),  // V6_vrmpybusv_acc_128B
2407
5.77k
    UINT64_C(469762080),  // V6_vrmpybv
2408
5.77k
    UINT64_C(469762080),  // V6_vrmpybv_128B
2409
5.77k
    UINT64_C(469770272),  // V6_vrmpybv_acc
2410
5.77k
    UINT64_C(469770272),  // V6_vrmpybv_acc_128B
2411
5.77k
    UINT64_C(419430496),  // V6_vrmpyub
2412
5.77k
    UINT64_C(419430496),  // V6_vrmpyub_128B
2413
5.77k
    UINT64_C(419438720),  // V6_vrmpyub_acc
2414
5.77k
    UINT64_C(419438720),  // V6_vrmpyub_acc_128B
2415
5.77k
    UINT64_C(429916352),  // V6_vrmpyubi
2416
5.77k
    UINT64_C(429916352),  // V6_vrmpyubi_128B
2417
5.77k
    UINT64_C(425730240),  // V6_vrmpyubi_acc
2418
5.77k
    UINT64_C(425730240),  // V6_vrmpyubi_acc_128B
2419
5.77k
    UINT64_C(469762048),  // V6_vrmpyubv
2420
5.77k
    UINT64_C(469762048),  // V6_vrmpyubv_128B
2421
5.77k
    UINT64_C(469770240),  // V6_vrmpyubv_acc
2422
5.77k
    UINT64_C(469770240),  // V6_vrmpyubv_acc_128B
2423
5.77k
    UINT64_C(425721888),  // V6_vror
2424
5.77k
    UINT64_C(425721888),  // V6_vror_128B
2425
5.77k
    UINT64_C(526385344),  // V6_vroundhb
2426
5.77k
    UINT64_C(526385344),  // V6_vroundhb_128B
2427
5.77k
    UINT64_C(526385376),  // V6_vroundhub
2428
5.77k
    UINT64_C(526385376),  // V6_vroundhub_128B
2429
5.77k
    UINT64_C(526385280),  // V6_vroundwh
2430
5.77k
    UINT64_C(526385280),  // V6_vroundwh_128B
2431
5.77k
    UINT64_C(526385312),  // V6_vroundwuh
2432
5.77k
    UINT64_C(526385312),  // V6_vroundwuh_128B
2433
5.77k
    UINT64_C(423624896),  // V6_vrsadubi
2434
5.77k
    UINT64_C(423624896),  // V6_vrsadubi_128B
2435
5.77k
    UINT64_C(423633088),  // V6_vrsadubi_acc
2436
5.77k
    UINT64_C(423633088),  // V6_vrsadubi_acc_128B
2437
5.77k
    UINT64_C(526385216),  // V6_vsathub
2438
5.77k
    UINT64_C(526385216),  // V6_vsathub_128B
2439
5.77k
    UINT64_C(526385248),  // V6_vsatwh
2440
5.77k
    UINT64_C(526385248),  // V6_vsatwh_128B
2441
5.77k
    UINT64_C(503447648),  // V6_vsb
2442
5.77k
    UINT64_C(503447648),  // V6_vsb_128B
2443
5.77k
    UINT64_C(503447680),  // V6_vsh
2444
5.77k
    UINT64_C(503447680),  // V6_vsh_128B
2445
5.77k
    UINT64_C(524288096),  // V6_vshufeh
2446
5.77k
    UINT64_C(524288096),  // V6_vshufeh_128B
2447
5.77k
    UINT64_C(434118688),  // V6_vshuff
2448
5.77k
    UINT64_C(434118688),  // V6_vshuff_128B
2449
5.77k
    UINT64_C(503447552),  // V6_vshuffb
2450
5.77k
    UINT64_C(503447552),  // V6_vshuffb_128B
2451
5.77k
    UINT64_C(524288032),  // V6_vshuffeb
2452
5.77k
    UINT64_C(524288032),  // V6_vshuffeb_128B
2453
5.77k
    UINT64_C(503382240),  // V6_vshuffh
2454
5.77k
    UINT64_C(503382240),  // V6_vshuffh_128B
2455
5.77k
    UINT64_C(524288064),  // V6_vshuffob
2456
5.77k
    UINT64_C(524288064),  // V6_vshuffob_128B
2457
5.77k
    UINT64_C(452993120),  // V6_vshuffvdd
2458
5.77k
    UINT64_C(452993120),  // V6_vshuffvdd_128B
2459
5.77k
    UINT64_C(524288192),  // V6_vshufoeb
2460
5.77k
    UINT64_C(524288192),  // V6_vshufoeb_128B
2461
5.77k
    UINT64_C(524288160),  // V6_vshufoeh
2462
5.77k
    UINT64_C(524288160),  // V6_vshufoeh_128B
2463
5.77k
    UINT64_C(524288128),  // V6_vshufoh
2464
5.77k
    UINT64_C(524288128),  // V6_vshufoh_128B
2465
5.77k
    UINT64_C(473956512),  // V6_vsubb
2466
5.77k
    UINT64_C(473956512),  // V6_vsubb_128B
2467
5.77k
    UINT64_C(478150752),  // V6_vsubb_dv
2468
5.77k
    UINT64_C(478150752),  // V6_vsubb_dv_128B
2469
5.77k
    UINT64_C(503455776),  // V6_vsubbnq
2470
5.77k
    UINT64_C(503455776),  // V6_vsubbnq_128B
2471
5.77k
    UINT64_C(503390400),  // V6_vsubbq
2472
5.77k
    UINT64_C(503390400),  // V6_vsubbq_128B
2473
5.77k
    UINT64_C(473956544),  // V6_vsubh
2474
5.77k
    UINT64_C(473956544),  // V6_vsubh_128B
2475
5.77k
    UINT64_C(478150784),  // V6_vsubh_dv
2476
5.77k
    UINT64_C(478150784),  // V6_vsubh_dv_128B
2477
5.77k
    UINT64_C(503455808),  // V6_vsubhnq
2478
5.77k
    UINT64_C(503455808),  // V6_vsubhnq_128B
2479
5.77k
    UINT64_C(503390432),  // V6_vsubhq
2480
5.77k
    UINT64_C(503390432),  // V6_vsubhq_128B
2481
5.77k
    UINT64_C(476053568),  // V6_vsubhsat
2482
5.77k
    UINT64_C(476053568),  // V6_vsubhsat_128B
2483
5.77k
    UINT64_C(480247808),  // V6_vsubhsat_dv
2484
5.77k
    UINT64_C(480247808),  // V6_vsubhsat_dv_128B
2485
5.77k
    UINT64_C(480248032),  // V6_vsubhw
2486
5.77k
    UINT64_C(480248032),  // V6_vsubhw_128B
2487
5.77k
    UINT64_C(480247968),  // V6_vsububh
2488
5.77k
    UINT64_C(480247968),  // V6_vsububh_128B
2489
5.77k
    UINT64_C(476053504),  // V6_vsububsat
2490
5.77k
    UINT64_C(476053504),  // V6_vsububsat_128B
2491
5.77k
    UINT64_C(478150848),  // V6_vsububsat_dv
2492
5.77k
    UINT64_C(478150848),  // V6_vsububsat_dv_128B
2493
5.77k
    UINT64_C(476053536),  // V6_vsubuhsat
2494
5.77k
    UINT64_C(476053536),  // V6_vsubuhsat_128B
2495
5.77k
    UINT64_C(478150880),  // V6_vsubuhsat_dv
2496
5.77k
    UINT64_C(478150880),  // V6_vsubuhsat_dv_128B
2497
5.77k
    UINT64_C(480248000),  // V6_vsubuhw
2498
5.77k
    UINT64_C(480248000),  // V6_vsubuhw_128B
2499
5.77k
    UINT64_C(473956576),  // V6_vsubw
2500
5.77k
    UINT64_C(473956576),  // V6_vsubw_128B
2501
5.77k
    UINT64_C(478150816),  // V6_vsubw_dv
2502
5.77k
    UINT64_C(478150816),  // V6_vsubw_dv_128B
2503
5.77k
    UINT64_C(503455840),  // V6_vsubwnq
2504
5.77k
    UINT64_C(503455840),  // V6_vsubwnq_128B
2505
5.77k
    UINT64_C(503455744),  // V6_vsubwq
2506
5.77k
    UINT64_C(503455744),  // V6_vsubwq_128B
2507
5.77k
    UINT64_C(476053600),  // V6_vsubwsat
2508
5.77k
    UINT64_C(476053600),  // V6_vsubwsat_128B
2509
5.77k
    UINT64_C(480247840),  // V6_vsubwsat_dv
2510
5.77k
    UINT64_C(480247840),  // V6_vsubwsat_dv_128B
2511
5.77k
    UINT64_C(513810432),  // V6_vswap
2512
5.77k
    UINT64_C(513810432),  // V6_vswap_128B
2513
5.77k
    UINT64_C(419430400),  // V6_vtmpyb
2514
5.77k
    UINT64_C(419430400),  // V6_vtmpyb_128B
2515
5.77k
    UINT64_C(419438592),  // V6_vtmpyb_acc
2516
5.77k
    UINT64_C(419438592),  // V6_vtmpyb_acc_128B
2517
5.77k
    UINT64_C(419430432),  // V6_vtmpybus
2518
5.77k
    UINT64_C(419430432),  // V6_vtmpybus_128B
2519
5.77k
    UINT64_C(419438624),  // V6_vtmpybus_acc
2520
5.77k
    UINT64_C(419438624),  // V6_vtmpybus_acc_128B
2521
5.77k
    UINT64_C(429916288),  // V6_vtmpyhb
2522
5.77k
    UINT64_C(429916288),  // V6_vtmpyhb_128B
2523
5.77k
    UINT64_C(419438656),  // V6_vtmpyhb_acc
2524
5.77k
    UINT64_C(419438656),  // V6_vtmpyhb_acc_128B
2525
5.77k
    UINT64_C(503382080),  // V6_vunpackb
2526
5.77k
    UINT64_C(503382080),  // V6_vunpackb_128B
2527
5.77k
    UINT64_C(503382112),  // V6_vunpackh
2528
5.77k
    UINT64_C(503382112),  // V6_vunpackh_128B
2529
5.77k
    UINT64_C(503324672),  // V6_vunpackob
2530
5.77k
    UINT64_C(503324672),  // V6_vunpackob_128B
2531
5.77k
    UINT64_C(503324704),  // V6_vunpackoh
2532
5.77k
    UINT64_C(503324704),  // V6_vunpackoh_128B
2533
5.77k
    UINT64_C(503382016),  // V6_vunpackub
2534
5.77k
    UINT64_C(503382016),  // V6_vunpackub_128B
2535
5.77k
    UINT64_C(503382048),  // V6_vunpackuh
2536
5.77k
    UINT64_C(503382048),  // V6_vunpackuh_128B
2537
5.77k
    UINT64_C(471859424),  // V6_vxor
2538
5.77k
    UINT64_C(471859424),  // V6_vxor_128B
2539
5.77k
    UINT64_C(503447584),  // V6_vzb
2540
5.77k
    UINT64_C(503447584),  // V6_vzb_128B
2541
5.77k
    UINT64_C(503447616),  // V6_vzh
2542
5.77k
    UINT64_C(503447616),  // V6_vzh_128B
2543
5.77k
    UINT64_C(0),
2544
5.77k
    UINT64_C(0),
2545
5.77k
    UINT64_C(0),
2546
5.77k
    UINT64_C(0),
2547
5.77k
    UINT64_C(2818572288), // Y2_barrier
2548
5.77k
    UINT64_C(2684354560), // Y2_dccleana
2549
5.77k
    UINT64_C(2688548864), // Y2_dccleaninva
2550
5.77k
    UINT64_C(2483027968), // Y2_dcfetchbo
2551
5.77k
    UINT64_C(2686451712), // Y2_dcinva
2552
5.77k
    UINT64_C(2696937472), // Y2_dczeroa
2553
5.77k
    UINT64_C(1455423488), // Y2_icinva
2554
5.77k
    UINT64_C(1472200706), // Y2_isync
2555
5.77k
    UINT64_C(2822766592), // Y2_syncht
2556
5.77k
    UINT64_C(2785017856), // Y4_l2fetch
2557
5.77k
    UINT64_C(1648361472), // Y4_trace
2558
5.77k
    UINT64_C(2793406464), // Y5_l2fetch
2559
5.77k
    UINT64_C(2820673536), // Y5_l2gclean
2560
5.77k
    UINT64_C(2820675584), // Y5_l2gcleaninv
2561
5.77k
    UINT64_C(2820671488), // Y5_l2gunlock
2562
5.77k
    UINT64_C(2699042816), // Y5_l2locka
2563
5.77k
    UINT64_C(2791309312), // Y5_l2unlocka
2564
5.77k
    UINT64_C(2797600768), // Y6_l2gcleaninvpa
2565
5.77k
    UINT64_C(2795503616), // Y6_l2gcleanpa
2566
5.77k
    UINT64_C(3581935616), // dep_A2_addsat
2567
5.77k
    UINT64_C(3581935744), // dep_A2_subsat
2568
5.77k
    UINT64_C(3556769792), // dep_S2_packhl
2569
5.77k
    UINT64_C(0)
2570
5.77k
  };
2571
5.77k
  const unsigned opcode = MI.getOpcode();
2572
5.77k
  uint64_t Value = InstBits[opcode];
2573
5.77k
  uint64_t op = 0;
2574
5.77k
  (void)op;  // suppress warning
2575
5.77k
  switch (opcode) {
2576
0
    case Hexagon::A2_addsp:
2577
491
    case Hexagon::A2_nop:
2578
491
    case Hexagon::A2_not:
2579
491
    case Hexagon::A2_tfrp:
2580
491
    case Hexagon::A2_tfrpf:
2581
491
    case Hexagon::A2_tfrpfnew:
2582
491
    case Hexagon::A2_tfrpi:
2583
491
    case Hexagon::A2_tfrpt:
2584
491
    case Hexagon::A2_tfrptnew:
2585
491
    case Hexagon::A4_boundscheck:
2586
491
    case Hexagon::ARGEXTEND:
2587
491
    case Hexagon::C2_pxfer_map:
2588
491
    case Hexagon::CONST32:
2589
491
    case Hexagon::CONST32_Float_Real:
2590
491
    case Hexagon::CONST32_Int_Real:
2591
491
    case Hexagon::CONST64_Float_Real:
2592
491
    case Hexagon::CONST64_Int_Real:
2593
491
    case Hexagon::DuplexIClass0:
2594
491
    case Hexagon::DuplexIClass1:
2595
491
    case Hexagon::DuplexIClass2:
2596
507
    case Hexagon::DuplexIClass3:
2597
507
    case Hexagon::DuplexIClass4:
2598
507
    case Hexagon::DuplexIClass5:
2599
507
    case Hexagon::DuplexIClass6:
2600
507
    case Hexagon::DuplexIClass7:
2601
507
    case Hexagon::DuplexIClass8:
2602
507
    case Hexagon::DuplexIClass9:
2603
507
    case Hexagon::DuplexIClassA:
2604
507
    case Hexagon::DuplexIClassB:
2605
507
    case Hexagon::DuplexIClassC:
2606
507
    case Hexagon::DuplexIClassD:
2607
507
    case Hexagon::DuplexIClassE:
2608
507
    case Hexagon::DuplexIClassF:
2609
507
    case Hexagon::FCONST32_nsdata:
2610
507
    case Hexagon::HEXAGON_V6_vd0_pseudo:
2611
507
    case Hexagon::HEXAGON_V6_vd0_pseudo_128B:
2612
507
    case Hexagon::HI_GOT:
2613
507
    case Hexagon::HI_GOTREL:
2614
507
    case Hexagon::HI_PIC:
2615
507
    case Hexagon::L2_deallocframe:
2616
507
    case Hexagon::L4_return:
2617
507
    case Hexagon::LO_GOT:
2618
507
    case Hexagon::LO_GOTREL:
2619
507
    case Hexagon::LO_PIC:
2620
507
    case Hexagon::M2_mpysmi:
2621
507
    case Hexagon::M2_mpyui:
2622
507
    case Hexagon::M2_vrcmpys_acc_s1:
2623
507
    case Hexagon::M2_vrcmpys_s1:
2624
507
    case Hexagon::M2_vrcmpys_s1rp:
2625
507
    case Hexagon::S2_asr_i_p_rnd_goodsyntax:
2626
507
    case Hexagon::S2_asr_i_r_rnd_goodsyntax:
2627
507
    case Hexagon::S5_asrhub_rnd_sat_goodsyntax:
2628
507
    case Hexagon::S5_vasrhrnd_goodsyntax:
2629
507
    case Hexagon::TFRI64_V2_ext:
2630
507
    case Hexagon::TFRI64_V4:
2631
507
    case Hexagon::V4_SL2_deallocframe:
2632
507
    case Hexagon::V4_SL2_jumpr31:
2633
507
    case Hexagon::V4_SL2_jumpr31_f:
2634
507
    case Hexagon::V4_SL2_jumpr31_fnew:
2635
507
    case Hexagon::V4_SL2_jumpr31_t:
2636
507
    case Hexagon::V4_SL2_jumpr31_tnew:
2637
507
    case Hexagon::V4_SL2_return:
2638
507
    case Hexagon::V4_SL2_return_f:
2639
507
    case Hexagon::V4_SL2_return_fnew:
2640
507
    case Hexagon::V4_SL2_return_t:
2641
507
    case Hexagon::V4_SL2_return_tnew:
2642
507
    case Hexagon::V6_vhist:
2643
507
    case Hexagon::Y2_barrier:
2644
507
    case Hexagon::Y2_isync:
2645
507
    case Hexagon::Y2_syncht:
2646
507
    case Hexagon::Y5_l2gclean:
2647
507
    case Hexagon::Y5_l2gcleaninv:
2648
507
    case Hexagon::Y5_l2gunlock: {
2649
507
      break;
2650
507
    }
2651
0
    case Hexagon::C2_all8:
2652
0
    case Hexagon::C2_any8:
2653
0
    case Hexagon::C2_not: {
2654
      // op: Pd
2655
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2656
0
      Value |= op & UINT64_C(3);
2657
      // op: Ps
2658
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2659
0
      Value |= (op & UINT64_C(3)) << 16;
2660
0
      break;
2661
0
    }
2662
0
    case Hexagon::C2_xor:
2663
0
    case Hexagon::C4_fastcorner9:
2664
0
    case Hexagon::C4_fastcorner9_not: {
2665
      // op: Pd
2666
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2667
0
      Value |= op & UINT64_C(3);
2668
      // op: Ps
2669
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2670
0
      Value |= (op & UINT64_C(3)) << 16;
2671
      // op: Pt
2672
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2673
0
      Value |= (op & UINT64_C(3)) << 8;
2674
0
      break;
2675
0
    }
2676
0
    case Hexagon::C4_and_and:
2677
0
    case Hexagon::C4_and_andn:
2678
0
    case Hexagon::C4_and_or:
2679
0
    case Hexagon::C4_and_orn:
2680
0
    case Hexagon::C4_or_and:
2681
0
    case Hexagon::C4_or_andn:
2682
0
    case Hexagon::C4_or_or:
2683
0
    case Hexagon::C4_or_orn: {
2684
      // op: Pd
2685
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2686
0
      Value |= op & UINT64_C(3);
2687
      // op: Ps
2688
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2689
0
      Value |= (op & UINT64_C(3)) << 16;
2690
      // op: Pt
2691
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2692
0
      Value |= (op & UINT64_C(3)) << 8;
2693
      // op: Pu
2694
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
2695
0
      Value |= (op & UINT64_C(3)) << 6;
2696
0
      break;
2697
0
    }
2698
0
    case Hexagon::C2_and:
2699
0
    case Hexagon::C2_andn:
2700
28
    case Hexagon::C2_or:
2701
28
    case Hexagon::C2_orn: {
2702
      // op: Pd
2703
28
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2704
28
      Value |= op & UINT64_C(3);
2705
      // op: Ps
2706
28
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2707
28
      Value |= (op & UINT64_C(3)) << 8;
2708
      // op: Pt
2709
28
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2710
28
      Value |= (op & UINT64_C(3)) << 16;
2711
28
      break;
2712
28
    }
2713
498
    case Hexagon::C2_tfrrp: {
2714
      // op: Pd
2715
498
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2716
498
      Value |= op & UINT64_C(3);
2717
      // op: Rs
2718
498
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2719
498
      Value |= (op & UINT64_C(31)) << 16;
2720
498
      break;
2721
28
    }
2722
0
    case Hexagon::A4_cmpbeqi:
2723
0
    case Hexagon::A4_cmpbgti:
2724
0
    case Hexagon::A4_cmpbgtui:
2725
0
    case Hexagon::A4_cmpheqi:
2726
0
    case Hexagon::A4_cmphgti:
2727
0
    case Hexagon::A4_cmphgtui: {
2728
      // op: Pd
2729
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2730
0
      Value |= op & UINT64_C(3);
2731
      // op: Rs
2732
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2733
0
      Value |= (op & UINT64_C(31)) << 16;
2734
      // op: Imm
2735
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2736
0
      Value |= (op & UINT64_C(255)) << 5;
2737
0
      break;
2738
0
    }
2739
0
    case Hexagon::A4_cmpbeq:
2740
0
    case Hexagon::A4_cmpbgt:
2741
0
    case Hexagon::A4_cmpbgtu:
2742
0
    case Hexagon::A4_cmpheq:
2743
0
    case Hexagon::A4_cmphgt:
2744
0
    case Hexagon::A4_cmphgtu:
2745
0
    case Hexagon::A4_tlbmatch:
2746
0
    case Hexagon::C2_bitsclr:
2747
0
    case Hexagon::C2_bitsset:
2748
0
    case Hexagon::C2_cmpeqp:
2749
0
    case Hexagon::C2_cmpgtp:
2750
0
    case Hexagon::C2_cmpgtup:
2751
0
    case Hexagon::C4_nbitsclr:
2752
0
    case Hexagon::C4_nbitsset:
2753
0
    case Hexagon::S2_storew_locked:
2754
0
    case Hexagon::S2_tstbit_r:
2755
0
    case Hexagon::S4_ntstbit_r:
2756
0
    case Hexagon::S4_stored_locked: {
2757
      // op: Pd
2758
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2759
0
      Value |= op & UINT64_C(3);
2760
      // op: Rs
2761
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2762
0
      Value |= (op & UINT64_C(31)) << 16;
2763
      // op: Rt
2764
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2765
0
      Value |= (op & UINT64_C(31)) << 8;
2766
0
      break;
2767
0
    }
2768
0
    case Hexagon::F2_sfclass:
2769
0
    case Hexagon::S2_tstbit_i:
2770
0
    case Hexagon::S4_ntstbit_i: {
2771
      // op: Pd
2772
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2773
0
      Value |= op & UINT64_C(3);
2774
      // op: Rs
2775
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2776
0
      Value |= (op & UINT64_C(31)) << 16;
2777
      // op: u5
2778
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2779
0
      Value |= (op & UINT64_C(31)) << 8;
2780
0
      break;
2781
0
    }
2782
0
    case Hexagon::C2_bitsclri:
2783
0
    case Hexagon::C4_nbitsclri: {
2784
      // op: Pd
2785
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2786
0
      Value |= op & UINT64_C(3);
2787
      // op: Rs
2788
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2789
0
      Value |= (op & UINT64_C(31)) << 16;
2790
      // op: u6
2791
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2792
0
      Value |= (op & UINT64_C(63)) << 8;
2793
0
      break;
2794
0
    }
2795
0
    case Hexagon::A4_vcmpbgtui:
2796
0
    case Hexagon::A4_vcmphgtui:
2797
0
    case Hexagon::A4_vcmpwgtui: {
2798
      // op: Pd
2799
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2800
0
      Value |= op & UINT64_C(3);
2801
      // op: Rss
2802
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2803
0
      Value |= (op & UINT64_C(31)) << 16;
2804
      // op: Imm
2805
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2806
0
      Value |= (op & UINT64_C(127)) << 5;
2807
0
      break;
2808
0
    }
2809
0
    case Hexagon::A4_vcmpbeqi:
2810
0
    case Hexagon::A4_vcmpbgti:
2811
0
    case Hexagon::A4_vcmpheqi:
2812
0
    case Hexagon::A4_vcmphgti:
2813
0
    case Hexagon::A4_vcmpweqi:
2814
0
    case Hexagon::A4_vcmpwgti: {
2815
      // op: Pd
2816
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2817
0
      Value |= op & UINT64_C(3);
2818
      // op: Rss
2819
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2820
0
      Value |= (op & UINT64_C(31)) << 16;
2821
      // op: Imm
2822
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2823
0
      Value |= (op & UINT64_C(255)) << 5;
2824
0
      break;
2825
0
    }
2826
0
    case Hexagon::A2_vcmpbeq:
2827
0
    case Hexagon::A2_vcmpbgtu:
2828
0
    case Hexagon::A2_vcmpheq:
2829
0
    case Hexagon::A2_vcmphgt:
2830
0
    case Hexagon::A2_vcmphgtu:
2831
0
    case Hexagon::A2_vcmpweq:
2832
0
    case Hexagon::A2_vcmpwgt:
2833
0
    case Hexagon::A2_vcmpwgtu:
2834
0
    case Hexagon::A4_boundscheck_hi:
2835
0
    case Hexagon::A4_boundscheck_lo:
2836
0
    case Hexagon::A4_vcmpbeq_any:
2837
0
    case Hexagon::A4_vcmpbgt: {
2838
      // op: Pd
2839
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2840
0
      Value |= op & UINT64_C(3);
2841
      // op: Rss
2842
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2843
0
      Value |= (op & UINT64_C(31)) << 16;
2844
      // op: Rtt
2845
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2846
0
      Value |= (op & UINT64_C(31)) << 8;
2847
0
      break;
2848
0
    }
2849
0
    case Hexagon::F2_dfclass: {
2850
      // op: Pd
2851
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2852
0
      Value |= op & UINT64_C(3);
2853
      // op: Rss
2854
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2855
0
      Value |= (op & UINT64_C(31)) << 16;
2856
      // op: u5
2857
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2858
0
      Value |= (op & UINT64_C(31)) << 5;
2859
0
      break;
2860
0
    }
2861
14
    case Hexagon::J2_callf:
2862
16
    case Hexagon::J2_callt: {
2863
      // op: Pu
2864
16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2865
16
      Value |= (op & UINT64_C(3)) << 8;
2866
      // op: dst
2867
16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2868
16
      Value |= (op & UINT64_C(98304)) << 7;
2869
16
      Value |= (op & UINT64_C(31744)) << 6;
2870
16
      Value |= (op & UINT64_C(512)) << 4;
2871
16
      Value |= (op & UINT64_C(508)) >> 1;
2872
16
      break;
2873
14
    }
2874
0
    case Hexagon::A2_paddf:
2875
0
    case Hexagon::A2_paddfnew:
2876
0
    case Hexagon::A2_paddt:
2877
0
    case Hexagon::A2_paddtnew:
2878
0
    case Hexagon::A2_pandf:
2879
0
    case Hexagon::A2_pandfnew:
2880
0
    case Hexagon::A2_pandt:
2881
0
    case Hexagon::A2_pandtnew:
2882
0
    case Hexagon::A2_porf:
2883
0
    case Hexagon::A2_porfnew:
2884
0
    case Hexagon::A2_port:
2885
0
    case Hexagon::A2_portnew:
2886
0
    case Hexagon::A2_pxorf:
2887
0
    case Hexagon::A2_pxorfnew:
2888
0
    case Hexagon::A2_pxort:
2889
0
    case Hexagon::A2_pxortnew:
2890
0
    case Hexagon::C2_ccombinewf:
2891
0
    case Hexagon::C2_ccombinewnewf:
2892
0
    case Hexagon::C2_ccombinewnewt:
2893
0
    case Hexagon::C2_ccombinewt: {
2894
      // op: Pu
2895
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2896
0
      Value |= (op & UINT64_C(3)) << 5;
2897
      // op: Rs
2898
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2899
0
      Value |= (op & UINT64_C(31)) << 16;
2900
      // op: Rt
2901
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
2902
0
      Value |= (op & UINT64_C(31)) << 8;
2903
      // op: Rd
2904
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2905
0
      Value |= op & UINT64_C(31);
2906
0
      break;
2907
0
    }
2908
0
    case Hexagon::A2_psubf:
2909
0
    case Hexagon::A2_psubfnew:
2910
0
    case Hexagon::A2_psubt:
2911
0
    case Hexagon::A2_psubtnew: {
2912
      // op: Pu
2913
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2914
0
      Value |= (op & UINT64_C(3)) << 5;
2915
      // op: Rs
2916
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2917
0
      Value |= (op & UINT64_C(31)) << 8;
2918
      // op: Rt
2919
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
2920
0
      Value |= (op & UINT64_C(31)) << 16;
2921
      // op: Rd
2922
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2923
0
      Value |= op & UINT64_C(31);
2924
0
      break;
2925
0
    }
2926
0
    case Hexagon::S4_pstorerbnewf_rr:
2927
0
    case Hexagon::S4_pstorerbnewfnew_rr:
2928
0
    case Hexagon::S4_pstorerbnewt_rr:
2929
0
    case Hexagon::S4_pstorerbnewtnew_rr:
2930
0
    case Hexagon::S4_pstorerhnewf_rr:
2931
0
    case Hexagon::S4_pstorerhnewfnew_rr:
2932
0
    case Hexagon::S4_pstorerhnewt_rr:
2933
0
    case Hexagon::S4_pstorerhnewtnew_rr:
2934
0
    case Hexagon::S4_pstorerinewf_rr:
2935
0
    case Hexagon::S4_pstorerinewfnew_rr:
2936
0
    case Hexagon::S4_pstorerinewt_rr:
2937
0
    case Hexagon::S4_pstorerinewtnew_rr: {
2938
      // op: Pv
2939
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2940
0
      Value |= (op & UINT64_C(3)) << 5;
2941
      // op: Rs
2942
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2943
0
      Value |= (op & UINT64_C(31)) << 16;
2944
      // op: Ru
2945
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2946
0
      Value |= (op & UINT64_C(31)) << 8;
2947
      // op: u2
2948
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
2949
0
      Value |= (op & UINT64_C(2)) << 12;
2950
0
      Value |= (op & UINT64_C(1)) << 7;
2951
      // op: Nt
2952
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
2953
0
      Value |= op & UINT64_C(7);
2954
0
      break;
2955
0
    }
2956
0
    case Hexagon::S4_pstorerbf_rr:
2957
0
    case Hexagon::S4_pstorerbfnew_rr:
2958
0
    case Hexagon::S4_pstorerbt_rr:
2959
0
    case Hexagon::S4_pstorerbtnew_rr:
2960
0
    case Hexagon::S4_pstorerdf_rr:
2961
0
    case Hexagon::S4_pstorerdfnew_rr:
2962
0
    case Hexagon::S4_pstorerdt_rr:
2963
0
    case Hexagon::S4_pstorerdtnew_rr:
2964
0
    case Hexagon::S4_pstorerff_rr:
2965
0
    case Hexagon::S4_pstorerffnew_rr:
2966
0
    case Hexagon::S4_pstorerft_rr:
2967
0
    case Hexagon::S4_pstorerftnew_rr:
2968
0
    case Hexagon::S4_pstorerhf_rr:
2969
0
    case Hexagon::S4_pstorerhfnew_rr:
2970
0
    case Hexagon::S4_pstorerht_rr:
2971
0
    case Hexagon::S4_pstorerhtnew_rr:
2972
0
    case Hexagon::S4_pstorerif_rr:
2973
0
    case Hexagon::S4_pstorerifnew_rr:
2974
0
    case Hexagon::S4_pstorerit_rr:
2975
0
    case Hexagon::S4_pstoreritnew_rr: {
2976
      // op: Pv
2977
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
2978
0
      Value |= (op & UINT64_C(3)) << 5;
2979
      // op: Rs
2980
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
2981
0
      Value |= (op & UINT64_C(31)) << 16;
2982
      // op: Ru
2983
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
2984
0
      Value |= (op & UINT64_C(31)) << 8;
2985
      // op: u2
2986
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
2987
0
      Value |= (op & UINT64_C(2)) << 12;
2988
0
      Value |= (op & UINT64_C(1)) << 7;
2989
      // op: Rt
2990
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
2991
0
      Value |= op & UINT64_C(31);
2992
0
      break;
2993
0
    }
2994
0
    case Hexagon::S4_storeirhf_io:
2995
0
    case Hexagon::S4_storeirhfnew_io:
2996
0
    case Hexagon::S4_storeirht_io:
2997
0
    case Hexagon::S4_storeirhtnew_io: {
2998
      // op: Pv
2999
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3000
0
      Value |= (op & UINT64_C(3)) << 5;
3001
      // op: Rs
3002
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3003
0
      Value |= (op & UINT64_C(31)) << 16;
3004
      // op: S6
3005
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3006
0
      Value |= (op & UINT64_C(32)) << 8;
3007
0
      Value |= op & UINT64_C(31);
3008
      // op: offset
3009
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3010
0
      Value |= (op & UINT64_C(126)) << 6;
3011
0
      break;
3012
0
    }
3013
0
    case Hexagon::S4_storeirif_io:
3014
0
    case Hexagon::S4_storeirifnew_io:
3015
0
    case Hexagon::S4_storeirit_io:
3016
0
    case Hexagon::S4_storeiritnew_io: {
3017
      // op: Pv
3018
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3019
0
      Value |= (op & UINT64_C(3)) << 5;
3020
      // op: Rs
3021
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3022
0
      Value |= (op & UINT64_C(31)) << 16;
3023
      // op: S6
3024
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3025
0
      Value |= (op & UINT64_C(32)) << 8;
3026
0
      Value |= op & UINT64_C(31);
3027
      // op: offset
3028
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3029
0
      Value |= (op & UINT64_C(252)) << 5;
3030
0
      break;
3031
0
    }
3032
0
    case Hexagon::S4_storeirbf_io:
3033
0
    case Hexagon::S4_storeirbfnew_io:
3034
0
    case Hexagon::S4_storeirbt_io:
3035
0
    case Hexagon::S4_storeirbtnew_io: {
3036
      // op: Pv
3037
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3038
0
      Value |= (op & UINT64_C(3)) << 5;
3039
      // op: Rs
3040
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3041
0
      Value |= (op & UINT64_C(31)) << 16;
3042
      // op: S6
3043
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3044
0
      Value |= (op & UINT64_C(32)) << 8;
3045
0
      Value |= op & UINT64_C(31);
3046
      // op: offset
3047
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3048
0
      Value |= (op & UINT64_C(63)) << 7;
3049
0
      break;
3050
0
    }
3051
0
    case Hexagon::J4_jumpseti: {
3052
      // op: Rd
3053
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3054
0
      Value |= (op & UINT64_C(15)) << 16;
3055
      // op: U6
3056
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3057
0
      Value |= (op & UINT64_C(63)) << 8;
3058
      // op: r9_2
3059
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3060
0
      Value |= (op & UINT64_C(1536)) << 11;
3061
0
      Value |= (op & UINT64_C(508)) >> 1;
3062
0
      break;
3063
0
    }
3064
0
    case Hexagon::J4_jumpsetr: {
3065
      // op: Rd
3066
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3067
0
      Value |= (op & UINT64_C(15)) << 8;
3068
      // op: Rs
3069
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3070
0
      Value |= (op & UINT64_C(15)) << 16;
3071
      // op: r9_2
3072
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3073
0
      Value |= (op & UINT64_C(1536)) << 11;
3074
0
      Value |= (op & UINT64_C(508)) >> 1;
3075
0
      break;
3076
0
    }
3077
0
    case Hexagon::S4_addi_asl_ri:
3078
0
    case Hexagon::S4_addi_lsr_ri:
3079
0
    case Hexagon::S4_andi_asl_ri:
3080
0
    case Hexagon::S4_andi_lsr_ri:
3081
0
    case Hexagon::S4_ori_asl_ri:
3082
0
    case Hexagon::S4_ori_lsr_ri:
3083
0
    case Hexagon::S4_subi_asl_ri:
3084
0
    case Hexagon::S4_subi_lsr_ri: {
3085
      // op: Rd
3086
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3087
0
      Value |= (op & UINT64_C(31)) << 16;
3088
      // op: u8
3089
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3090
0
      Value |= (op & UINT64_C(224)) << 16;
3091
0
      Value |= (op & UINT64_C(16)) << 9;
3092
0
      Value |= (op & UINT64_C(14)) << 4;
3093
0
      Value |= (op & UINT64_C(1)) << 3;
3094
      // op: U5
3095
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3096
0
      Value |= (op & UINT64_C(31)) << 8;
3097
0
      break;
3098
0
    }
3099
0
    case Hexagon::S4_addaddi: {
3100
      // op: Rd
3101
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3102
0
      Value |= (op & UINT64_C(31)) << 8;
3103
      // op: Rs
3104
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3105
0
      Value |= (op & UINT64_C(31)) << 16;
3106
      // op: Ru
3107
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3108
0
      Value |= op & UINT64_C(31);
3109
      // op: s6
3110
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3111
0
      Value |= (op & UINT64_C(48)) << 17;
3112
0
      Value |= (op & UINT64_C(8)) << 10;
3113
0
      Value |= (op & UINT64_C(7)) << 5;
3114
0
      break;
3115
0
    }
3116
0
    case Hexagon::S4_subaddi: {
3117
      // op: Rd
3118
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3119
0
      Value |= (op & UINT64_C(31)) << 8;
3120
      // op: Rs
3121
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3122
0
      Value |= (op & UINT64_C(31)) << 16;
3123
      // op: s6
3124
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3125
0
      Value |= (op & UINT64_C(48)) << 17;
3126
0
      Value |= (op & UINT64_C(8)) << 10;
3127
0
      Value |= (op & UINT64_C(7)) << 5;
3128
      // op: Ru
3129
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3130
0
      Value |= op & UINT64_C(31);
3131
0
      break;
3132
0
    }
3133
0
    case Hexagon::M4_mpyri_addi: {
3134
      // op: Rd
3135
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3136
0
      Value |= (op & UINT64_C(31)) << 8;
3137
      // op: u6
3138
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3139
0
      Value |= (op & UINT64_C(48)) << 17;
3140
0
      Value |= (op & UINT64_C(8)) << 10;
3141
0
      Value |= (op & UINT64_C(7)) << 5;
3142
      // op: Rs
3143
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3144
0
      Value |= (op & UINT64_C(31)) << 16;
3145
      // op: U6
3146
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3147
0
      Value |= (op & UINT64_C(32)) << 18;
3148
0
      Value |= op & UINT64_C(31);
3149
0
      break;
3150
0
    }
3151
0
    case Hexagon::V4_SA1_clrf:
3152
0
    case Hexagon::V4_SA1_clrfnew:
3153
0
    case Hexagon::V4_SA1_clrt:
3154
0
    case Hexagon::V4_SA1_clrtnew:
3155
3
    case Hexagon::V4_SA1_setin1: {
3156
      // op: Rd
3157
3
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3158
3
      Value |= op & UINT64_C(15);
3159
3
      break;
3160
0
    }
3161
0
    case Hexagon::V4_SA1_and1:
3162
0
    case Hexagon::V4_SA1_dec:
3163
0
    case Hexagon::V4_SA1_inc:
3164
0
    case Hexagon::V4_SA1_sxtb:
3165
0
    case Hexagon::V4_SA1_sxth:
3166
22
    case Hexagon::V4_SA1_tfr:
3167
22
    case Hexagon::V4_SA1_zxtb:
3168
22
    case Hexagon::V4_SA1_zxth: {
3169
      // op: Rd
3170
22
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3171
22
      Value |= op & UINT64_C(15);
3172
      // op: Rs
3173
22
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3174
22
      Value |= (op & UINT64_C(15)) << 4;
3175
22
      break;
3176
22
    }
3177
0
    case Hexagon::V4_SL2_loadrb_io: {
3178
      // op: Rd
3179
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3180
0
      Value |= op & UINT64_C(15);
3181
      // op: Rs
3182
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3183
0
      Value |= (op & UINT64_C(15)) << 4;
3184
      // op: u3_0
3185
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3186
0
      Value |= (op & UINT64_C(7)) << 8;
3187
0
      break;
3188
22
    }
3189
0
    case Hexagon::V4_SL2_loadrh_io:
3190
0
    case Hexagon::V4_SL2_loadruh_io: {
3191
      // op: Rd
3192
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3193
0
      Value |= op & UINT64_C(15);
3194
      // op: Rs
3195
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3196
0
      Value |= (op & UINT64_C(15)) << 4;
3197
      // op: u3_1
3198
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3199
0
      Value |= (op & UINT64_C(14)) << 7;
3200
0
      break;
3201
0
    }
3202
0
    case Hexagon::V4_SL1_loadrub_io: {
3203
      // op: Rd
3204
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3205
0
      Value |= op & UINT64_C(15);
3206
      // op: Rs
3207
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3208
0
      Value |= (op & UINT64_C(15)) << 4;
3209
      // op: u4_0
3210
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3211
0
      Value |= (op & UINT64_C(15)) << 8;
3212
0
      break;
3213
0
    }
3214
0
    case Hexagon::V4_SL1_loadri_io: {
3215
      // op: Rd
3216
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3217
0
      Value |= op & UINT64_C(15);
3218
      // op: Rs
3219
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3220
0
      Value |= (op & UINT64_C(15)) << 4;
3221
      // op: u4_2
3222
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3223
0
      Value |= (op & UINT64_C(60)) << 6;
3224
0
      break;
3225
0
    }
3226
0
    case Hexagon::V4_SL2_loadri_sp: {
3227
      // op: Rd
3228
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3229
0
      Value |= op & UINT64_C(15);
3230
      // op: u5_2
3231
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3232
0
      Value |= (op & UINT64_C(124)) << 2;
3233
0
      break;
3234
0
    }
3235
7
    case Hexagon::V4_SA1_seti: {
3236
      // op: Rd
3237
7
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3238
7
      Value |= op & UINT64_C(15);
3239
      // op: u6
3240
7
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3241
7
      Value |= (op & UINT64_C(63)) << 4;
3242
7
      break;
3243
0
    }
3244
0
    case Hexagon::V4_SA1_addsp: {
3245
      // op: Rd
3246
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3247
0
      Value |= op & UINT64_C(15);
3248
      // op: u6_2
3249
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3250
0
      Value |= (op & UINT64_C(252)) << 2;
3251
0
      break;
3252
0
    }
3253
0
    case Hexagon::F2_sfinvsqrta: {
3254
      // op: Rd
3255
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3256
0
      Value |= op & UINT64_C(31);
3257
      // op: Pe
3258
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3259
0
      Value |= (op & UINT64_C(3)) << 5;
3260
      // op: Rs
3261
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3262
0
      Value |= (op & UINT64_C(31)) << 16;
3263
0
      break;
3264
0
    }
3265
0
    case Hexagon::F2_sfrecipa: {
3266
      // op: Rd
3267
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3268
0
      Value |= op & UINT64_C(31);
3269
      // op: Pe
3270
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3271
0
      Value |= (op & UINT64_C(3)) << 5;
3272
      // op: Rs
3273
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3274
0
      Value |= (op & UINT64_C(31)) << 16;
3275
      // op: Rt
3276
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3277
0
      Value |= (op & UINT64_C(31)) << 8;
3278
0
      break;
3279
0
    }
3280
4
    case Hexagon::C2_tfrpr: {
3281
      // op: Rd
3282
4
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3283
4
      Value |= op & UINT64_C(31);
3284
      // op: Ps
3285
4
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3286
4
      Value |= (op & UINT64_C(3)) << 16;
3287
4
      break;
3288
0
    }
3289
0
    case Hexagon::C2_vitpack: {
3290
      // op: Rd
3291
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3292
0
      Value |= op & UINT64_C(31);
3293
      // op: Ps
3294
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3295
0
      Value |= (op & UINT64_C(3)) << 16;
3296
      // op: Pt
3297
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3298
0
      Value |= (op & UINT64_C(3)) << 8;
3299
0
      break;
3300
0
    }
3301
0
    case Hexagon::C2_mask: {
3302
      // op: Rd
3303
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3304
0
      Value |= op & UINT64_C(31);
3305
      // op: Pt
3306
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3307
0
      Value |= (op & UINT64_C(3)) << 8;
3308
0
      break;
3309
0
    }
3310
0
    case Hexagon::A2_paddif:
3311
0
    case Hexagon::A2_paddifnew:
3312
0
    case Hexagon::A2_paddit:
3313
0
    case Hexagon::A2_padditnew: {
3314
      // op: Rd
3315
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3316
0
      Value |= op & UINT64_C(31);
3317
      // op: Pu
3318
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3319
0
      Value |= (op & UINT64_C(3)) << 21;
3320
      // op: Rs
3321
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3322
0
      Value |= (op & UINT64_C(31)) << 16;
3323
      // op: s8
3324
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3325
0
      Value |= (op & UINT64_C(255)) << 5;
3326
0
      break;
3327
0
    }
3328
0
    case Hexagon::C2_cmoveif:
3329
1
    case Hexagon::C2_cmoveit:
3330
1
    case Hexagon::C2_cmovenewif:
3331
1
    case Hexagon::C2_cmovenewit: {
3332
      // op: Rd
3333
1
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3334
1
      Value |= op & UINT64_C(31);
3335
      // op: Pu
3336
1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3337
1
      Value |= (op & UINT64_C(3)) << 21;
3338
      // op: s12
3339
1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3340
1
      Value |= (op & UINT64_C(3840)) << 8;
3341
1
      Value |= (op & UINT64_C(255)) << 5;
3342
1
      break;
3343
1
    }
3344
0
    case Hexagon::C2_muxri: {
3345
      // op: Rd
3346
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3347
0
      Value |= op & UINT64_C(31);
3348
      // op: Pu
3349
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3350
0
      Value |= (op & UINT64_C(3)) << 21;
3351
      // op: s8
3352
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3353
0
      Value |= (op & UINT64_C(255)) << 5;
3354
      // op: Rs
3355
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3356
0
      Value |= (op & UINT64_C(31)) << 16;
3357
0
      break;
3358
1
    }
3359
0
    case Hexagon::C2_muxir: {
3360
      // op: Rd
3361
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3362
0
      Value |= op & UINT64_C(31);
3363
      // op: Pu
3364
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3365
0
      Value |= (op & UINT64_C(3)) << 21;
3366
      // op: s8
3367
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3368
0
      Value |= (op & UINT64_C(255)) << 5;
3369
      // op: Rs
3370
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3371
0
      Value |= (op & UINT64_C(31)) << 16;
3372
0
      break;
3373
1
    }
3374
0
    case Hexagon::C2_muxii: {
3375
      // op: Rd
3376
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3377
0
      Value |= op & UINT64_C(31);
3378
      // op: Pu
3379
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3380
0
      Value |= (op & UINT64_C(3)) << 23;
3381
      // op: s8
3382
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3383
0
      Value |= (op & UINT64_C(255)) << 5;
3384
      // op: S8
3385
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3386
0
      Value |= (op & UINT64_C(254)) << 15;
3387
0
      Value |= (op & UINT64_C(1)) << 13;
3388
0
      break;
3389
1
    }
3390
0
    case Hexagon::C2_mux:
3391
0
    case Hexagon::C2_vmux: {
3392
      // op: Rd
3393
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3394
0
      Value |= op & UINT64_C(31);
3395
      // op: Pu
3396
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3397
0
      Value |= (op & UINT64_C(3)) << 5;
3398
      // op: Rs
3399
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3400
0
      Value |= (op & UINT64_C(31)) << 16;
3401
      // op: Rt
3402
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3403
0
      Value |= (op & UINT64_C(31)) << 8;
3404
0
      break;
3405
0
    }
3406
0
    case Hexagon::A4_paslhf:
3407
0
    case Hexagon::A4_paslhfnew:
3408
0
    case Hexagon::A4_paslht:
3409
0
    case Hexagon::A4_paslhtnew:
3410
0
    case Hexagon::A4_pasrhf:
3411
0
    case Hexagon::A4_pasrhfnew:
3412
0
    case Hexagon::A4_pasrht:
3413
0
    case Hexagon::A4_pasrhtnew:
3414
0
    case Hexagon::A4_psxtbf:
3415
0
    case Hexagon::A4_psxtbfnew:
3416
0
    case Hexagon::A4_psxtbt:
3417
0
    case Hexagon::A4_psxtbtnew:
3418
0
    case Hexagon::A4_psxthf:
3419
0
    case Hexagon::A4_psxthfnew:
3420
0
    case Hexagon::A4_psxtht:
3421
0
    case Hexagon::A4_psxthtnew:
3422
0
    case Hexagon::A4_pzxtbf:
3423
0
    case Hexagon::A4_pzxtbfnew:
3424
0
    case Hexagon::A4_pzxtbt:
3425
0
    case Hexagon::A4_pzxtbtnew:
3426
0
    case Hexagon::A4_pzxthf:
3427
0
    case Hexagon::A4_pzxthfnew:
3428
0
    case Hexagon::A4_pzxtht:
3429
0
    case Hexagon::A4_pzxthtnew: {
3430
      // op: Rd
3431
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3432
0
      Value |= op & UINT64_C(31);
3433
      // op: Pu
3434
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3435
0
      Value |= (op & UINT64_C(3)) << 8;
3436
      // op: Rs
3437
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3438
0
      Value |= (op & UINT64_C(31)) << 16;
3439
0
      break;
3440
0
    }
3441
0
    case Hexagon::A2_aslh:
3442
0
    case Hexagon::A2_asrh:
3443
0
    case Hexagon::A2_sxtb:
3444
0
    case Hexagon::A2_sxth:
3445
0
    case Hexagon::A2_zxtb:
3446
0
    case Hexagon::A2_zxth:
3447
0
    case Hexagon::F2_conv_sf2uw:
3448
0
    case Hexagon::F2_conv_sf2uw_chop:
3449
0
    case Hexagon::F2_conv_sf2w:
3450
0
    case Hexagon::F2_conv_sf2w_chop:
3451
0
    case Hexagon::F2_conv_uw2sf:
3452
0
    case Hexagon::F2_conv_w2sf:
3453
0
    case Hexagon::F2_sffixupr: {
3454
      // op: Rd
3455
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3456
0
      Value |= op & UINT64_C(31);
3457
      // op: Rs
3458
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3459
0
      Value |= (op & UINT64_C(31)) << 16;
3460
0
      break;
3461
0
    }
3462
0
    case Hexagon::A4_bitsplit:
3463
0
    case Hexagon::A4_modwrapu:
3464
0
    case Hexagon::F2_sfadd:
3465
0
    case Hexagon::F2_sffixupd:
3466
0
    case Hexagon::F2_sffixupn:
3467
0
    case Hexagon::F2_sfmax:
3468
0
    case Hexagon::F2_sfmin:
3469
0
    case Hexagon::F2_sfmpy:
3470
0
    case Hexagon::F2_sfsub:
3471
0
    case Hexagon::M2_mpy_hh_s0:
3472
0
    case Hexagon::M2_mpy_hh_s1:
3473
0
    case Hexagon::M2_mpy_hl_s0:
3474
0
    case Hexagon::M2_mpy_hl_s1:
3475
0
    case Hexagon::M2_mpy_lh_s0:
3476
0
    case Hexagon::M2_mpy_lh_s1:
3477
0
    case Hexagon::M2_mpy_ll_s0:
3478
0
    case Hexagon::M2_mpy_ll_s1:
3479
0
    case Hexagon::M2_mpy_rnd_hh_s0:
3480
0
    case Hexagon::M2_mpy_rnd_hh_s1:
3481
0
    case Hexagon::M2_mpy_rnd_hl_s0:
3482
0
    case Hexagon::M2_mpy_rnd_hl_s1:
3483
0
    case Hexagon::M2_mpy_rnd_lh_s0:
3484
0
    case Hexagon::M2_mpy_rnd_lh_s1:
3485
0
    case Hexagon::M2_mpy_rnd_ll_s0:
3486
0
    case Hexagon::M2_mpy_rnd_ll_s1:
3487
0
    case Hexagon::M2_mpy_sat_hh_s0:
3488
0
    case Hexagon::M2_mpy_sat_hh_s1:
3489
0
    case Hexagon::M2_mpy_sat_hl_s0:
3490
0
    case Hexagon::M2_mpy_sat_hl_s1:
3491
0
    case Hexagon::M2_mpy_sat_lh_s0:
3492
0
    case Hexagon::M2_mpy_sat_lh_s1:
3493
0
    case Hexagon::M2_mpy_sat_ll_s0:
3494
0
    case Hexagon::M2_mpy_sat_ll_s1:
3495
0
    case Hexagon::M2_mpy_sat_rnd_hh_s0:
3496
0
    case Hexagon::M2_mpy_sat_rnd_hh_s1:
3497
0
    case Hexagon::M2_mpy_sat_rnd_hl_s0:
3498
0
    case Hexagon::M2_mpy_sat_rnd_hl_s1:
3499
0
    case Hexagon::M2_mpy_sat_rnd_lh_s0:
3500
0
    case Hexagon::M2_mpy_sat_rnd_lh_s1:
3501
0
    case Hexagon::M2_mpy_sat_rnd_ll_s0:
3502
0
    case Hexagon::M2_mpy_sat_rnd_ll_s1:
3503
0
    case Hexagon::M2_mpyu_hh_s0:
3504
0
    case Hexagon::M2_mpyu_hh_s1:
3505
0
    case Hexagon::M2_mpyu_hl_s0:
3506
0
    case Hexagon::M2_mpyu_hl_s1:
3507
0
    case Hexagon::M2_mpyu_lh_s0:
3508
0
    case Hexagon::M2_mpyu_lh_s1:
3509
0
    case Hexagon::M2_mpyu_ll_s0:
3510
0
    case Hexagon::M2_mpyu_ll_s1:
3511
0
    case Hexagon::S2_clrbit_r:
3512
0
    case Hexagon::S2_parityp:
3513
0
    case Hexagon::S2_setbit_r:
3514
0
    case Hexagon::S2_togglebit_r:
3515
0
    case Hexagon::S4_parity:
3516
0
    case Hexagon::dep_A2_addsat:
3517
0
    case Hexagon::dep_S2_packhl: {
3518
      // op: Rd
3519
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3520
0
      Value |= op & UINT64_C(31);
3521
      // op: Rs
3522
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3523
0
      Value |= (op & UINT64_C(31)) << 16;
3524
      // op: Rt
3525
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3526
0
      Value |= (op & UINT64_C(31)) << 8;
3527
0
      break;
3528
0
    }
3529
0
    case Hexagon::S2_extractu_rp:
3530
0
    case Hexagon::S4_extract_rp: {
3531
      // op: Rd
3532
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3533
0
      Value |= op & UINT64_C(31);
3534
      // op: Rs
3535
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3536
0
      Value |= (op & UINT64_C(31)) << 16;
3537
      // op: Rtt
3538
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3539
0
      Value |= (op & UINT64_C(31)) << 8;
3540
0
      break;
3541
0
    }
3542
0
    case Hexagon::A2_andir:
3543
0
    case Hexagon::A2_orir: {
3544
      // op: Rd
3545
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3546
0
      Value |= op & UINT64_C(31);
3547
      // op: Rs
3548
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3549
0
      Value |= (op & UINT64_C(31)) << 16;
3550
      // op: s10
3551
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3552
0
      Value |= (op & UINT64_C(512)) << 12;
3553
0
      Value |= (op & UINT64_C(511)) << 5;
3554
0
      break;
3555
0
    }
3556
0
    case Hexagon::A2_addi: {
3557
      // op: Rd
3558
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3559
0
      Value |= op & UINT64_C(31);
3560
      // op: Rs
3561
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3562
0
      Value |= (op & UINT64_C(31)) << 16;
3563
      // op: s16
3564
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3565
0
      Value |= (op & UINT64_C(65024)) << 12;
3566
0
      Value |= (op & UINT64_C(511)) << 5;
3567
0
      break;
3568
0
    }
3569
0
    case Hexagon::A4_rcmpeqi:
3570
0
    case Hexagon::A4_rcmpneqi: {
3571
      // op: Rd
3572
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3573
0
      Value |= op & UINT64_C(31);
3574
      // op: Rs
3575
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3576
0
      Value |= (op & UINT64_C(31)) << 16;
3577
      // op: s8
3578
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3579
0
      Value |= (op & UINT64_C(255)) << 5;
3580
0
      break;
3581
0
    }
3582
0
    case Hexagon::S2_clrbit_i:
3583
0
    case Hexagon::S2_setbit_i:
3584
0
    case Hexagon::S2_togglebit_i: {
3585
      // op: Rd
3586
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3587
0
      Value |= op & UINT64_C(31);
3588
      // op: Rs
3589
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3590
0
      Value |= (op & UINT64_C(31)) << 16;
3591
      // op: u5
3592
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3593
0
      Value |= (op & UINT64_C(31)) << 8;
3594
0
      break;
3595
0
    }
3596
0
    case Hexagon::M2_mpysin:
3597
0
    case Hexagon::M2_mpysip: {
3598
      // op: Rd
3599
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3600
0
      Value |= op & UINT64_C(31);
3601
      // op: Rs
3602
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3603
0
      Value |= (op & UINT64_C(31)) << 16;
3604
      // op: u8
3605
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3606
0
      Value |= (op & UINT64_C(255)) << 5;
3607
0
      break;
3608
0
    }
3609
0
    case Hexagon::dep_A2_subsat: {
3610
      // op: Rd
3611
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3612
0
      Value |= op & UINT64_C(31);
3613
      // op: Rs
3614
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3615
0
      Value |= (op & UINT64_C(31)) << 8;
3616
      // op: Rt
3617
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3618
0
      Value |= (op & UINT64_C(31)) << 16;
3619
0
      break;
3620
0
    }
3621
0
    case Hexagon::A2_minp:
3622
0
    case Hexagon::A2_minup: {
3623
      // op: Rd
3624
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3625
0
      Value |= op & UINT64_C(31);
3626
      // op: Rs
3627
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3628
0
      Value |= (op & UINT64_C(31)) << 16;
3629
      // op: Rt
3630
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3631
0
      Value |= (op & UINT64_C(31)) << 8;
3632
0
      break;
3633
0
    }
3634
0
    case Hexagon::A2_maxp:
3635
0
    case Hexagon::A2_maxup: {
3636
      // op: Rd
3637
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3638
0
      Value |= op & UINT64_C(31);
3639
      // op: Rs
3640
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3641
0
      Value |= (op & UINT64_C(31)) << 8;
3642
      // op: Rt
3643
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3644
0
      Value |= (op & UINT64_C(31)) << 16;
3645
0
      break;
3646
0
    }
3647
0
    case Hexagon::F2_conv_d2sf:
3648
0
    case Hexagon::F2_conv_df2sf:
3649
0
    case Hexagon::F2_conv_df2uw:
3650
0
    case Hexagon::F2_conv_df2uw_chop:
3651
0
    case Hexagon::F2_conv_df2w:
3652
0
    case Hexagon::F2_conv_df2w_chop:
3653
0
    case Hexagon::F2_conv_ud2sf:
3654
0
    case Hexagon::S5_popcountp: {
3655
      // op: Rd
3656
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3657
0
      Value |= op & UINT64_C(31);
3658
      // op: Rss
3659
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3660
0
      Value |= (op & UINT64_C(31)) << 16;
3661
0
      break;
3662
0
    }
3663
0
    case Hexagon::M4_cmpyi_wh:
3664
0
    case Hexagon::M4_cmpyi_whc:
3665
0
    case Hexagon::M4_cmpyr_wh:
3666
0
    case Hexagon::M4_cmpyr_whc:
3667
0
    case Hexagon::S2_asr_r_svw_trun: {
3668
      // op: Rd
3669
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3670
0
      Value |= op & UINT64_C(31);
3671
      // op: Rss
3672
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3673
0
      Value |= (op & UINT64_C(31)) << 16;
3674
      // op: Rt
3675
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3676
0
      Value |= (op & UINT64_C(31)) << 8;
3677
0
      break;
3678
0
    }
3679
0
    case Hexagon::S5_asrhub_rnd_sat:
3680
0
    case Hexagon::S5_asrhub_sat: {
3681
      // op: Rd
3682
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3683
0
      Value |= op & UINT64_C(31);
3684
      // op: Rss
3685
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3686
0
      Value |= (op & UINT64_C(31)) << 16;
3687
      // op: u4
3688
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3689
0
      Value |= (op & UINT64_C(15)) << 8;
3690
0
      break;
3691
0
    }
3692
0
    case Hexagon::A2_max:
3693
0
    case Hexagon::A2_maxu: {
3694
      // op: Rd
3695
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3696
0
      Value |= op & UINT64_C(31);
3697
      // op: Rt
3698
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3699
0
      Value |= (op & UINT64_C(31)) << 16;
3700
      // op: Rs
3701
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3702
0
      Value |= (op & UINT64_C(31)) << 8;
3703
0
      break;
3704
0
    }
3705
0
    case Hexagon::A2_addh_h16_hh:
3706
0
    case Hexagon::A2_addh_h16_hl:
3707
0
    case Hexagon::A2_addh_h16_lh:
3708
0
    case Hexagon::A2_addh_h16_ll:
3709
0
    case Hexagon::A2_addh_h16_sat_hh:
3710
0
    case Hexagon::A2_addh_h16_sat_hl:
3711
0
    case Hexagon::A2_addh_h16_sat_lh:
3712
0
    case Hexagon::A2_addh_h16_sat_ll:
3713
0
    case Hexagon::A2_addh_l16_hl:
3714
0
    case Hexagon::A2_addh_l16_ll:
3715
0
    case Hexagon::A2_addh_l16_sat_hl:
3716
0
    case Hexagon::A2_addh_l16_sat_ll:
3717
0
    case Hexagon::A2_min:
3718
0
    case Hexagon::A2_minu:
3719
0
    case Hexagon::A2_subh_h16_hh:
3720
0
    case Hexagon::A2_subh_h16_hl:
3721
0
    case Hexagon::A2_subh_h16_lh:
3722
0
    case Hexagon::A2_subh_h16_ll:
3723
0
    case Hexagon::A2_subh_h16_sat_hh:
3724
0
    case Hexagon::A2_subh_h16_sat_hl:
3725
0
    case Hexagon::A2_subh_h16_sat_lh:
3726
0
    case Hexagon::A2_subh_h16_sat_ll:
3727
0
    case Hexagon::A2_subh_l16_hl:
3728
0
    case Hexagon::A2_subh_l16_ll:
3729
0
    case Hexagon::A2_subh_l16_sat_hl:
3730
0
    case Hexagon::A2_subh_l16_sat_ll: {
3731
      // op: Rd
3732
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3733
0
      Value |= op & UINT64_C(31);
3734
      // op: Rt
3735
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3736
0
      Value |= (op & UINT64_C(31)) << 8;
3737
      // op: Rs
3738
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3739
0
      Value |= (op & UINT64_C(31)) << 16;
3740
0
      break;
3741
0
    }
3742
0
    case Hexagon::S2_addasl_rrri: {
3743
      // op: Rd
3744
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3745
0
      Value |= op & UINT64_C(31);
3746
      // op: Rt
3747
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3748
0
      Value |= (op & UINT64_C(31)) << 8;
3749
      // op: Rs
3750
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3751
0
      Value |= (op & UINT64_C(31)) << 16;
3752
      // op: u3
3753
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3754
0
      Value |= (op & UINT64_C(7)) << 5;
3755
0
      break;
3756
0
    }
3757
0
    case Hexagon::A2_subri: {
3758
      // op: Rd
3759
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3760
0
      Value |= op & UINT64_C(31);
3761
      // op: s10
3762
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3763
0
      Value |= (op & UINT64_C(512)) << 12;
3764
0
      Value |= (op & UINT64_C(511)) << 5;
3765
      // op: Rs
3766
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3767
0
      Value |= (op & UINT64_C(31)) << 16;
3768
0
      break;
3769
0
    }
3770
478
    case Hexagon::A2_tfrsi: {
3771
      // op: Rd
3772
478
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3773
478
      Value |= op & UINT64_C(31);
3774
      // op: s16
3775
478
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3776
478
      Value |= (op & UINT64_C(49152)) << 8;
3777
478
      Value |= (op & UINT64_C(15872)) << 7;
3778
478
      Value |= (op & UINT64_C(511)) << 5;
3779
478
      break;
3780
0
    }
3781
0
    case Hexagon::S4_lsli: {
3782
      // op: Rd
3783
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3784
0
      Value |= op & UINT64_C(31);
3785
      // op: s6
3786
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3787
0
      Value |= (op & UINT64_C(62)) << 15;
3788
0
      Value |= (op & UINT64_C(1)) << 5;
3789
      // op: Rt
3790
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3791
0
      Value |= (op & UINT64_C(31)) << 8;
3792
0
      break;
3793
0
    }
3794
0
    case Hexagon::M4_mpyrr_addi: {
3795
      // op: Rd
3796
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3797
0
      Value |= op & UINT64_C(31);
3798
      // op: u6
3799
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3800
0
      Value |= (op & UINT64_C(48)) << 17;
3801
0
      Value |= (op & UINT64_C(8)) << 10;
3802
0
      Value |= (op & UINT64_C(7)) << 5;
3803
      // op: Rs
3804
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3805
0
      Value |= (op & UINT64_C(31)) << 16;
3806
      // op: Rt
3807
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3808
0
      Value |= (op & UINT64_C(31)) << 8;
3809
0
      break;
3810
0
    }
3811
0
    case Hexagon::C4_addipc: {
3812
      // op: Rd
3813
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3814
0
      Value |= op & UINT64_C(31);
3815
      // op: u6
3816
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3817
0
      Value |= (op & UINT64_C(63)) << 7;
3818
0
      break;
3819
0
    }
3820
0
    case Hexagon::F2_conv_sf2d:
3821
0
    case Hexagon::F2_conv_sf2d_chop:
3822
0
    case Hexagon::F2_conv_sf2df:
3823
0
    case Hexagon::F2_conv_sf2ud:
3824
0
    case Hexagon::F2_conv_sf2ud_chop:
3825
0
    case Hexagon::F2_conv_uw2df:
3826
0
    case Hexagon::F2_conv_w2df: {
3827
      // op: Rdd
3828
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3829
0
      Value |= op & UINT64_C(31);
3830
      // op: Rs
3831
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3832
0
      Value |= (op & UINT64_C(31)) << 16;
3833
0
      break;
3834
0
    }
3835
0
    case Hexagon::M2_cmpyi_s0:
3836
0
    case Hexagon::M2_cmpyr_s0:
3837
0
    case Hexagon::M2_cmpys_s0:
3838
0
    case Hexagon::M2_cmpys_s1:
3839
0
    case Hexagon::M2_cmpysc_s0:
3840
0
    case Hexagon::M2_cmpysc_s1:
3841
0
    case Hexagon::M2_dpmpyss_s0:
3842
0
    case Hexagon::M2_dpmpyuu_s0:
3843
0
    case Hexagon::M2_mpyd_hh_s0:
3844
0
    case Hexagon::M2_mpyd_hh_s1:
3845
0
    case Hexagon::M2_mpyd_hl_s0:
3846
0
    case Hexagon::M2_mpyd_hl_s1:
3847
0
    case Hexagon::M2_mpyd_lh_s0:
3848
0
    case Hexagon::M2_mpyd_lh_s1:
3849
0
    case Hexagon::M2_mpyd_ll_s0:
3850
0
    case Hexagon::M2_mpyd_ll_s1:
3851
0
    case Hexagon::M2_mpyd_rnd_hh_s0:
3852
0
    case Hexagon::M2_mpyd_rnd_hh_s1:
3853
0
    case Hexagon::M2_mpyd_rnd_hl_s0:
3854
0
    case Hexagon::M2_mpyd_rnd_hl_s1:
3855
0
    case Hexagon::M2_mpyd_rnd_lh_s0:
3856
0
    case Hexagon::M2_mpyd_rnd_lh_s1:
3857
0
    case Hexagon::M2_mpyd_rnd_ll_s0:
3858
0
    case Hexagon::M2_mpyd_rnd_ll_s1:
3859
0
    case Hexagon::M2_mpyud_hh_s0:
3860
0
    case Hexagon::M2_mpyud_hh_s1:
3861
0
    case Hexagon::M2_mpyud_hl_s0:
3862
0
    case Hexagon::M2_mpyud_hl_s1:
3863
0
    case Hexagon::M2_mpyud_lh_s0:
3864
0
    case Hexagon::M2_mpyud_lh_s1:
3865
0
    case Hexagon::M2_mpyud_ll_s0:
3866
0
    case Hexagon::M2_mpyud_ll_s1:
3867
0
    case Hexagon::M2_vmpy2s_s0:
3868
0
    case Hexagon::M2_vmpy2s_s1:
3869
0
    case Hexagon::M2_vmpy2su_s0:
3870
0
    case Hexagon::M2_vmpy2su_s1:
3871
0
    case Hexagon::M4_pmpyw:
3872
0
    case Hexagon::M4_vpmpyh:
3873
0
    case Hexagon::M5_vmpybsu:
3874
0
    case Hexagon::M5_vmpybuu: {
3875
      // op: Rdd
3876
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3877
0
      Value |= op & UINT64_C(31);
3878
      // op: Rs
3879
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3880
0
      Value |= (op & UINT64_C(31)) << 16;
3881
      // op: Rt
3882
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3883
0
      Value |= (op & UINT64_C(31)) << 8;
3884
0
      break;
3885
0
    }
3886
0
    case Hexagon::A4_combineri: {
3887
      // op: Rdd
3888
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3889
0
      Value |= op & UINT64_C(31);
3890
      // op: Rs
3891
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3892
0
      Value |= (op & UINT64_C(31)) << 16;
3893
      // op: s8
3894
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3895
0
      Value |= (op & UINT64_C(255)) << 5;
3896
0
      break;
3897
0
    }
3898
0
    case Hexagon::A4_combineir: {
3899
      // op: Rdd
3900
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3901
0
      Value |= op & UINT64_C(31);
3902
      // op: Rs
3903
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3904
0
      Value |= (op & UINT64_C(31)) << 16;
3905
      // op: s8
3906
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3907
0
      Value |= (op & UINT64_C(255)) << 5;
3908
0
      break;
3909
0
    }
3910
0
    case Hexagon::F2_conv_d2df:
3911
0
    case Hexagon::F2_conv_df2d:
3912
0
    case Hexagon::F2_conv_df2d_chop:
3913
0
    case Hexagon::F2_conv_df2ud:
3914
0
    case Hexagon::F2_conv_df2ud_chop:
3915
0
    case Hexagon::F2_conv_ud2df: {
3916
      // op: Rdd
3917
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3918
0
      Value |= op & UINT64_C(31);
3919
      // op: Rss
3920
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3921
0
      Value |= (op & UINT64_C(31)) << 16;
3922
0
      break;
3923
0
    }
3924
0
    case Hexagon::S4_vrcrotate: {
3925
      // op: Rdd
3926
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
3927
0
      Value |= op & UINT64_C(31);
3928
      // op: Rss
3929
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
3930
0
      Value |= (op & UINT64_C(31)) << 16;
3931
      // op: Rt
3932
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
3933
0
      Value |= (op & UINT64_C(31)) << 8;
3934
      // op: u2
3935
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
3936
0
      Value |= (op & UINT64_C(2)) << 12;
3937
0
      Value |= (op & UINT64_C(1)) << 5;
3938
0
      break;
3939
0
    }
3940
0
    case Hexagon::A2_vaddh:
3941
0
    case Hexagon::A2_vaddhs:
3942
0
    case Hexagon::A2_vaddub:
3943
0
    case Hexagon::A2_vaddubs:
3944
0
    case Hexagon::A2_vadduhs:
3945
0
    case Hexagon::A2_vaddw:
3946
0
    case Hexagon::A2_vaddws:
3947
0
    case Hexagon::A2_vavgh:
3948
0
    case Hexagon::A2_vavghcr:
3949
0
    case Hexagon::A2_vavghr:
3950
0
    case Hexagon::A2_vavgub:
3951
0
    case Hexagon::A2_vavgubr:
3952
0
    case Hexagon::A2_vavguh:
3953
0
    case Hexagon::A2_vavguhr:
3954
0
    case Hexagon::A2_vavguw:
3955
0
    case Hexagon::A2_vavguwr:
3956
0
    case Hexagon::A2_vavgw:
3957
0
    case Hexagon::A2_vavgwcr:
3958
0
    case Hexagon::A2_vavgwr:
3959
0
    case Hexagon::A2_vraddub:
3960
0
    case Hexagon::A2_vrsadub:
3961
0
    case Hexagon::M2_mmpyh_rs0:
3962
0
    case Hexagon::M2_mmpyh_rs1:
3963
0
    case Hexagon::M2_mmpyh_s0:
3964
0
    case Hexagon::M2_mmpyh_s1:
3965
0
    case Hexagon::M2_mmpyl_rs0:
3966
0
    case Hexagon::M2_mmpyl_rs1:
3967
0
    case Hexagon::M2_mmpyl_s0:
3968
0
    case Hexagon::M2_mmpyl_s1:
3969
0
    case Hexagon::M2_mmpyuh_rs0:
3970
0
    case Hexagon::M2_mmpyuh_rs1:
3971
0
    case Hexagon::M2_mmpyuh_s0:
3972
0
    case Hexagon::M2_mmpyuh_s1:
3973
0
    case Hexagon::M2_mmpyul_rs0:
3974
0
    case Hexagon::M2_mmpyul_rs1:
3975
0
    case Hexagon::M2_mmpyul_s0:
3976
0
    case Hexagon::M2_mmpyul_s1:
3977
0
    case Hexagon::M2_vcmpy_s0_sat_i:
3978
0
    case Hexagon::M2_vcmpy_s0_sat_r:
3979
0
    case Hexagon::M2_vcmpy_s1_sat_i:
3980
0
    case Hexagon::M2_vcmpy_s1_sat_r:
3981
0
    case Hexagon::M2_vdmpys_s0:
3982
0
    case Hexagon::M2_vdmpys_s1:
3983
0
    case Hexagon::M2_vmpy2es_s0:
3984
0
    case Hexagon::M2_vmpy2es_s1:
3985
0
    case Hexagon::M2_vrcmpyi_s0:
3986
0
    case Hexagon::M2_vrcmpyi_s0c:
3987
0
    case Hexagon::M2_vrcmpyr_s0:
3988
0
    case Hexagon::M2_vrcmpyr_s0c:
3989
0
    case Hexagon::M2_vrcmpys_s1_h:
3990
0
    case Hexagon::M2_vrcmpys_s1_l:
3991
0
    case Hexagon::M2_vrmpy_s0:
3992
0
    case Hexagon::M4_vrmpyeh_s0:
3993
0
    case Hexagon::M4_vrmpyeh_s1:
3994
0
    case Hexagon::M4_vrmpyoh_s0:
3995
0
    case Hexagon::M4_vrmpyoh_s1:
3996
0
    case Hexagon::M5_vdmpybsu:
3997
0
    case Hexagon::M5_vrmpybsu:
3998
0
    case Hexagon::M5_vrmpybuu: {
3999
      // op: Rdd
4000
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4001
0
      Value |= op & UINT64_C(31);
4002
      // op: Rss
4003
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4004
0
      Value |= (op & UINT64_C(31)) << 16;
4005
      // op: Rtt
4006
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4007
0
      Value |= (op & UINT64_C(31)) << 8;
4008
0
      break;
4009
0
    }
4010
0
    case Hexagon::S2_vsplicerb: {
4011
      // op: Rdd
4012
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4013
0
      Value |= op & UINT64_C(31);
4014
      // op: Rss
4015
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4016
0
      Value |= (op & UINT64_C(31)) << 16;
4017
      // op: Rtt
4018
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4019
0
      Value |= (op & UINT64_C(31)) << 8;
4020
      // op: Pu
4021
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4022
0
      Value |= (op & UINT64_C(3)) << 5;
4023
0
      break;
4024
0
    }
4025
0
    case Hexagon::S2_vspliceib: {
4026
      // op: Rdd
4027
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4028
0
      Value |= op & UINT64_C(31);
4029
      // op: Rss
4030
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4031
0
      Value |= (op & UINT64_C(31)) << 16;
4032
      // op: Rtt
4033
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4034
0
      Value |= (op & UINT64_C(31)) << 8;
4035
      // op: u3
4036
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4037
0
      Value |= (op & UINT64_C(7)) << 5;
4038
0
      break;
4039
0
    }
4040
0
    case Hexagon::S5_vasrhrnd: {
4041
      // op: Rdd
4042
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4043
0
      Value |= op & UINT64_C(31);
4044
      // op: Rss
4045
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4046
0
      Value |= (op & UINT64_C(31)) << 16;
4047
      // op: u4
4048
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4049
0
      Value |= (op & UINT64_C(15)) << 8;
4050
0
      break;
4051
0
    }
4052
0
    case Hexagon::A2_vmaxb:
4053
0
    case Hexagon::A2_vmaxh:
4054
0
    case Hexagon::A2_vmaxub:
4055
0
    case Hexagon::A2_vmaxuh:
4056
0
    case Hexagon::A2_vmaxuw:
4057
0
    case Hexagon::A2_vmaxw:
4058
0
    case Hexagon::A2_vminb:
4059
0
    case Hexagon::A2_vminh:
4060
0
    case Hexagon::A2_vminub:
4061
0
    case Hexagon::A2_vminuh:
4062
0
    case Hexagon::A2_vminuw:
4063
0
    case Hexagon::A2_vminw:
4064
0
    case Hexagon::A2_vnavgh:
4065
0
    case Hexagon::A2_vnavghcr:
4066
0
    case Hexagon::A2_vnavghr:
4067
0
    case Hexagon::A2_vnavgw:
4068
0
    case Hexagon::A2_vnavgwcr:
4069
0
    case Hexagon::A2_vnavgwr:
4070
0
    case Hexagon::A2_vsubh:
4071
0
    case Hexagon::A2_vsubhs:
4072
0
    case Hexagon::A2_vsubub:
4073
0
    case Hexagon::A2_vsububs:
4074
0
    case Hexagon::A2_vsubuhs:
4075
0
    case Hexagon::A2_vsubw:
4076
0
    case Hexagon::A2_vsubws: {
4077
      // op: Rdd
4078
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4079
0
      Value |= op & UINT64_C(31);
4080
      // op: Rss
4081
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4082
0
      Value |= (op & UINT64_C(31)) << 8;
4083
      // op: Rtt
4084
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4085
0
      Value |= (op & UINT64_C(31)) << 16;
4086
0
      break;
4087
0
    }
4088
0
    case Hexagon::S2_valignrb: {
4089
      // op: Rdd
4090
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4091
0
      Value |= op & UINT64_C(31);
4092
      // op: Rss
4093
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4094
0
      Value |= (op & UINT64_C(31)) << 8;
4095
      // op: Rtt
4096
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4097
0
      Value |= (op & UINT64_C(31)) << 16;
4098
      // op: Pu
4099
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4100
0
      Value |= (op & UINT64_C(3)) << 5;
4101
0
      break;
4102
0
    }
4103
0
    case Hexagon::S2_valignib: {
4104
      // op: Rdd
4105
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4106
0
      Value |= op & UINT64_C(31);
4107
      // op: Rss
4108
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4109
0
      Value |= (op & UINT64_C(31)) << 8;
4110
      // op: Rtt
4111
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4112
0
      Value |= (op & UINT64_C(31)) << 16;
4113
      // op: u3
4114
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4115
0
      Value |= (op & UINT64_C(7)) << 5;
4116
0
      break;
4117
0
    }
4118
0
    case Hexagon::M2_vabsdiffh:
4119
0
    case Hexagon::M2_vabsdiffw: {
4120
      // op: Rdd
4121
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4122
0
      Value |= op & UINT64_C(31);
4123
      // op: Rss
4124
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4125
0
      Value |= (op & UINT64_C(31)) << 16;
4126
      // op: Rtt
4127
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4128
0
      Value |= (op & UINT64_C(31)) << 8;
4129
0
      break;
4130
0
    }
4131
0
    case Hexagon::A2_vraddub_acc:
4132
0
    case Hexagon::A2_vrsadub_acc:
4133
0
    case Hexagon::M2_vrcmaci_s0:
4134
0
    case Hexagon::M2_vrcmaci_s0c:
4135
0
    case Hexagon::M2_vrcmacr_s0:
4136
0
    case Hexagon::M2_vrcmacr_s0c:
4137
0
    case Hexagon::M2_vrmac_s0:
4138
0
    case Hexagon::M5_vrmacbsu:
4139
0
    case Hexagon::M5_vrmacbuu: {
4140
      // op: Rdd
4141
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4142
0
      Value |= op & UINT64_C(31);
4143
      // op: Rss
4144
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4145
0
      Value |= (op & UINT64_C(31)) << 16;
4146
      // op: Rtt
4147
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4148
0
      Value |= (op & UINT64_C(31)) << 8;
4149
0
      break;
4150
0
    }
4151
0
    case Hexagon::A4_addp_c:
4152
0
    case Hexagon::A4_subp_c: {
4153
      // op: Rdd
4154
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4155
0
      Value |= op & UINT64_C(31);
4156
      // op: Rss
4157
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4158
0
      Value |= (op & UINT64_C(31)) << 16;
4159
      // op: Rtt
4160
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4161
0
      Value |= (op & UINT64_C(31)) << 8;
4162
      // op: Pu
4163
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
4164
0
      Value |= (op & UINT64_C(3)) << 5;
4165
0
      break;
4166
0
    }
4167
8
    case Hexagon::A2_combineii: {
4168
      // op: Rdd
4169
8
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4170
8
      Value |= op & UINT64_C(31);
4171
      // op: s8
4172
8
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4173
8
      Value |= (op & UINT64_C(255)) << 5;
4174
      // op: S8
4175
8
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4176
8
      Value |= (op & UINT64_C(254)) << 15;
4177
8
      Value |= (op & UINT64_C(1)) << 13;
4178
8
      break;
4179
0
    }
4180
22
    case Hexagon::A4_combineii: {
4181
      // op: Rdd
4182
22
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4183
22
      Value |= op & UINT64_C(31);
4184
      // op: s8
4185
22
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4186
22
      Value |= (op & UINT64_C(255)) << 5;
4187
      // op: U6
4188
22
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4189
22
      Value |= (op & UINT64_C(62)) << 15;
4190
22
      Value |= (op & UINT64_C(1)) << 13;
4191
22
      break;
4192
0
    }
4193
0
    case Hexagon::V4_SA1_combinerz:
4194
0
    case Hexagon::V4_SA1_combinezr: {
4195
      // op: Rdd
4196
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4197
0
      Value |= op & UINT64_C(7);
4198
      // op: Rs
4199
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4200
0
      Value |= (op & UINT64_C(15)) << 4;
4201
0
      break;
4202
0
    }
4203
0
    case Hexagon::V4_SA1_combine0i:
4204
0
    case Hexagon::V4_SA1_combine1i:
4205
0
    case Hexagon::V4_SA1_combine2i:
4206
0
    case Hexagon::V4_SA1_combine3i: {
4207
      // op: Rdd
4208
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4209
0
      Value |= op & UINT64_C(7);
4210
      // op: u2
4211
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4212
0
      Value |= (op & UINT64_C(3)) << 5;
4213
0
      break;
4214
0
    }
4215
0
    case Hexagon::V4_SL2_loadrd_sp: {
4216
      // op: Rdd
4217
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4218
0
      Value |= op & UINT64_C(7);
4219
      // op: u5_3
4220
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4221
0
      Value |= op & UINT64_C(248);
4222
0
      break;
4223
0
    }
4224
0
    case Hexagon::J4_cmpeq_fp0_jump_nt:
4225
0
    case Hexagon::J4_cmpeq_fp0_jump_t:
4226
0
    case Hexagon::J4_cmpeq_fp1_jump_nt:
4227
0
    case Hexagon::J4_cmpeq_fp1_jump_t:
4228
0
    case Hexagon::J4_cmpeq_tp0_jump_nt:
4229
0
    case Hexagon::J4_cmpeq_tp0_jump_t:
4230
0
    case Hexagon::J4_cmpeq_tp1_jump_nt:
4231
0
    case Hexagon::J4_cmpeq_tp1_jump_t:
4232
0
    case Hexagon::J4_cmpgt_fp0_jump_nt:
4233
0
    case Hexagon::J4_cmpgt_fp0_jump_t:
4234
0
    case Hexagon::J4_cmpgt_fp1_jump_nt:
4235
0
    case Hexagon::J4_cmpgt_fp1_jump_t:
4236
0
    case Hexagon::J4_cmpgt_tp0_jump_nt:
4237
0
    case Hexagon::J4_cmpgt_tp0_jump_t:
4238
0
    case Hexagon::J4_cmpgt_tp1_jump_nt:
4239
0
    case Hexagon::J4_cmpgt_tp1_jump_t:
4240
0
    case Hexagon::J4_cmpgtu_fp0_jump_nt:
4241
0
    case Hexagon::J4_cmpgtu_fp0_jump_t:
4242
0
    case Hexagon::J4_cmpgtu_fp1_jump_nt:
4243
0
    case Hexagon::J4_cmpgtu_fp1_jump_t:
4244
0
    case Hexagon::J4_cmpgtu_tp0_jump_nt:
4245
0
    case Hexagon::J4_cmpgtu_tp0_jump_t:
4246
0
    case Hexagon::J4_cmpgtu_tp1_jump_nt:
4247
0
    case Hexagon::J4_cmpgtu_tp1_jump_t: {
4248
      // op: Rs
4249
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4250
0
      Value |= (op & UINT64_C(15)) << 16;
4251
      // op: Rt
4252
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4253
0
      Value |= (op & UINT64_C(15)) << 8;
4254
      // op: r9_2
4255
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4256
0
      Value |= (op & UINT64_C(1536)) << 11;
4257
0
      Value |= (op & UINT64_C(508)) >> 1;
4258
0
      break;
4259
0
    }
4260
0
    case Hexagon::J4_cmpeqi_fp0_jump_nt:
4261
0
    case Hexagon::J4_cmpeqi_fp0_jump_t:
4262
0
    case Hexagon::J4_cmpeqi_fp1_jump_nt:
4263
0
    case Hexagon::J4_cmpeqi_fp1_jump_t:
4264
0
    case Hexagon::J4_cmpeqi_tp0_jump_nt:
4265
0
    case Hexagon::J4_cmpeqi_tp0_jump_t:
4266
0
    case Hexagon::J4_cmpeqi_tp1_jump_nt:
4267
0
    case Hexagon::J4_cmpeqi_tp1_jump_t:
4268
0
    case Hexagon::J4_cmpgti_fp0_jump_nt:
4269
0
    case Hexagon::J4_cmpgti_fp0_jump_t:
4270
0
    case Hexagon::J4_cmpgti_fp1_jump_nt:
4271
0
    case Hexagon::J4_cmpgti_fp1_jump_t:
4272
0
    case Hexagon::J4_cmpgti_tp0_jump_nt:
4273
0
    case Hexagon::J4_cmpgti_tp0_jump_t:
4274
0
    case Hexagon::J4_cmpgti_tp1_jump_nt:
4275
0
    case Hexagon::J4_cmpgti_tp1_jump_t:
4276
0
    case Hexagon::J4_cmpgtui_fp0_jump_nt:
4277
0
    case Hexagon::J4_cmpgtui_fp0_jump_t:
4278
0
    case Hexagon::J4_cmpgtui_fp1_jump_nt:
4279
0
    case Hexagon::J4_cmpgtui_fp1_jump_t:
4280
0
    case Hexagon::J4_cmpgtui_tp0_jump_nt:
4281
0
    case Hexagon::J4_cmpgtui_tp0_jump_t:
4282
0
    case Hexagon::J4_cmpgtui_tp1_jump_nt:
4283
0
    case Hexagon::J4_cmpgtui_tp1_jump_t: {
4284
      // op: Rs
4285
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4286
0
      Value |= (op & UINT64_C(15)) << 16;
4287
      // op: U5
4288
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4289
0
      Value |= (op & UINT64_C(31)) << 8;
4290
      // op: r9_2
4291
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4292
0
      Value |= (op & UINT64_C(1536)) << 11;
4293
0
      Value |= (op & UINT64_C(508)) >> 1;
4294
0
      break;
4295
0
    }
4296
0
    case Hexagon::J4_cmpeqn1_fp0_jump_nt:
4297
0
    case Hexagon::J4_cmpeqn1_fp0_jump_t:
4298
0
    case Hexagon::J4_cmpeqn1_fp1_jump_nt:
4299
0
    case Hexagon::J4_cmpeqn1_fp1_jump_t:
4300
0
    case Hexagon::J4_cmpeqn1_tp0_jump_nt:
4301
0
    case Hexagon::J4_cmpeqn1_tp0_jump_t:
4302
0
    case Hexagon::J4_cmpeqn1_tp1_jump_nt:
4303
0
    case Hexagon::J4_cmpeqn1_tp1_jump_t:
4304
0
    case Hexagon::J4_cmpgtn1_fp0_jump_nt:
4305
0
    case Hexagon::J4_cmpgtn1_fp0_jump_t:
4306
0
    case Hexagon::J4_cmpgtn1_fp1_jump_nt:
4307
0
    case Hexagon::J4_cmpgtn1_fp1_jump_t:
4308
0
    case Hexagon::J4_cmpgtn1_tp0_jump_nt:
4309
0
    case Hexagon::J4_cmpgtn1_tp0_jump_t:
4310
0
    case Hexagon::J4_cmpgtn1_tp1_jump_nt:
4311
0
    case Hexagon::J4_cmpgtn1_tp1_jump_t:
4312
0
    case Hexagon::J4_tstbit0_fp0_jump_nt:
4313
0
    case Hexagon::J4_tstbit0_fp0_jump_t:
4314
0
    case Hexagon::J4_tstbit0_fp1_jump_nt:
4315
0
    case Hexagon::J4_tstbit0_fp1_jump_t:
4316
0
    case Hexagon::J4_tstbit0_tp0_jump_nt:
4317
0
    case Hexagon::J4_tstbit0_tp0_jump_t:
4318
0
    case Hexagon::J4_tstbit0_tp1_jump_nt:
4319
0
    case Hexagon::J4_tstbit0_tp1_jump_t: {
4320
      // op: Rs
4321
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4322
0
      Value |= (op & UINT64_C(15)) << 16;
4323
      // op: r9_2
4324
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4325
0
      Value |= (op & UINT64_C(1536)) << 11;
4326
0
      Value |= (op & UINT64_C(508)) >> 1;
4327
0
      break;
4328
0
    }
4329
0
    case Hexagon::V4_SA1_cmpeqi: {
4330
      // op: Rs
4331
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4332
0
      Value |= (op & UINT64_C(15)) << 4;
4333
      // op: u2
4334
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4335
0
      Value |= op & UINT64_C(3);
4336
0
      break;
4337
0
    }
4338
0
    case Hexagon::V4_SS2_storeh_io: {
4339
      // op: Rs
4340
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4341
0
      Value |= (op & UINT64_C(15)) << 4;
4342
      // op: u3_1
4343
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4344
0
      Value |= (op & UINT64_C(14)) << 7;
4345
      // op: Rt
4346
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4347
0
      Value |= op & UINT64_C(15);
4348
0
      break;
4349
0
    }
4350
0
    case Hexagon::V4_SS1_storeb_io: {
4351
      // op: Rs
4352
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4353
0
      Value |= (op & UINT64_C(15)) << 4;
4354
      // op: u4_0
4355
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4356
0
      Value |= (op & UINT64_C(15)) << 8;
4357
      // op: Rt
4358
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4359
0
      Value |= op & UINT64_C(15);
4360
0
      break;
4361
0
    }
4362
0
    case Hexagon::V4_SS2_storebi0:
4363
0
    case Hexagon::V4_SS2_storebi1: {
4364
      // op: Rs
4365
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4366
0
      Value |= (op & UINT64_C(15)) << 4;
4367
      // op: u4_0
4368
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4369
0
      Value |= op & UINT64_C(15);
4370
0
      break;
4371
0
    }
4372
0
    case Hexagon::V4_SS1_storew_io: {
4373
      // op: Rs
4374
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4375
0
      Value |= (op & UINT64_C(15)) << 4;
4376
      // op: u4_2
4377
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4378
0
      Value |= (op & UINT64_C(60)) << 6;
4379
      // op: Rt
4380
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4381
0
      Value |= op & UINT64_C(15);
4382
0
      break;
4383
0
    }
4384
0
    case Hexagon::V4_SS2_storewi0:
4385
0
    case Hexagon::V4_SS2_storewi1: {
4386
      // op: Rs
4387
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4388
0
      Value |= (op & UINT64_C(15)) << 4;
4389
      // op: u4_2
4390
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4391
0
      Value |= (op & UINT64_C(60)) >> 2;
4392
0
      break;
4393
0
    }
4394
0
    case Hexagon::CALLRv3nr:
4395
0
    case Hexagon::J2_callr:
4396
0
    case Hexagon::J4_hintjumpr:
4397
0
    case Hexagon::Y2_dccleana:
4398
0
    case Hexagon::Y2_dccleaninva:
4399
0
    case Hexagon::Y2_dcinva:
4400
0
    case Hexagon::Y2_dczeroa:
4401
0
    case Hexagon::Y2_icinva:
4402
0
    case Hexagon::Y4_trace: {
4403
      // op: Rs
4404
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4405
0
      Value |= (op & UINT64_C(31)) << 16;
4406
0
      break;
4407
0
    }
4408
0
    case Hexagon::Y4_l2fetch:
4409
0
    case Hexagon::Y5_l2fetch: {
4410
      // op: Rs
4411
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4412
0
      Value |= (op & UINT64_C(31)) << 16;
4413
      // op: Rt
4414
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4415
0
      Value |= (op & UINT64_C(31)) << 8;
4416
0
      break;
4417
0
    }
4418
0
    case Hexagon::S4_storerbnew_rr:
4419
0
    case Hexagon::S4_storerhnew_rr:
4420
0
    case Hexagon::S4_storerinew_rr: {
4421
      // op: Rs
4422
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4423
0
      Value |= (op & UINT64_C(31)) << 16;
4424
      // op: Ru
4425
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4426
0
      Value |= (op & UINT64_C(31)) << 8;
4427
      // op: u2
4428
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4429
0
      Value |= (op & UINT64_C(2)) << 12;
4430
0
      Value |= (op & UINT64_C(1)) << 7;
4431
      // op: Nt
4432
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4433
0
      Value |= op & UINT64_C(7);
4434
0
      break;
4435
0
    }
4436
0
    case Hexagon::S4_storerb_rr:
4437
0
    case Hexagon::S4_storerd_rr:
4438
0
    case Hexagon::S4_storerf_rr:
4439
0
    case Hexagon::S4_storerh_rr:
4440
0
    case Hexagon::S4_storeri_rr: {
4441
      // op: Rs
4442
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4443
0
      Value |= (op & UINT64_C(31)) << 16;
4444
      // op: Ru
4445
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4446
0
      Value |= (op & UINT64_C(31)) << 8;
4447
      // op: u2
4448
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4449
0
      Value |= (op & UINT64_C(2)) << 12;
4450
0
      Value |= (op & UINT64_C(1)) << 7;
4451
      // op: Rt
4452
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4453
0
      Value |= op & UINT64_C(31);
4454
0
      break;
4455
0
    }
4456
0
    case Hexagon::S4_storeirh_io: {
4457
      // op: Rs
4458
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4459
0
      Value |= (op & UINT64_C(31)) << 16;
4460
      // op: S8
4461
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4462
0
      Value |= (op & UINT64_C(128)) << 6;
4463
0
      Value |= op & UINT64_C(127);
4464
      // op: offset
4465
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4466
0
      Value |= (op & UINT64_C(126)) << 6;
4467
0
      break;
4468
0
    }
4469
0
    case Hexagon::S4_storeiri_io: {
4470
      // op: Rs
4471
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4472
0
      Value |= (op & UINT64_C(31)) << 16;
4473
      // op: S8
4474
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4475
0
      Value |= (op & UINT64_C(128)) << 6;
4476
0
      Value |= op & UINT64_C(127);
4477
      // op: offset
4478
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4479
0
      Value |= (op & UINT64_C(252)) << 5;
4480
0
      break;
4481
0
    }
4482
0
    case Hexagon::S4_storeirb_io: {
4483
      // op: Rs
4484
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4485
0
      Value |= (op & UINT64_C(31)) << 16;
4486
      // op: S8
4487
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4488
0
      Value |= (op & UINT64_C(128)) << 6;
4489
0
      Value |= op & UINT64_C(127);
4490
      // op: offset
4491
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4492
0
      Value |= (op & UINT64_C(63)) << 7;
4493
0
      break;
4494
0
    }
4495
0
    case Hexagon::J2_jumprgtez:
4496
0
    case Hexagon::J2_jumprgtezpt:
4497
0
    case Hexagon::J2_jumprltez:
4498
0
    case Hexagon::J2_jumprltezpt:
4499
0
    case Hexagon::J2_jumprnz:
4500
0
    case Hexagon::J2_jumprnzpt:
4501
0
    case Hexagon::J2_jumprz:
4502
0
    case Hexagon::J2_jumprzpt: {
4503
      // op: Rs
4504
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4505
0
      Value |= (op & UINT64_C(31)) << 16;
4506
      // op: r13_2
4507
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4508
0
      Value |= (op & UINT64_C(16384)) << 7;
4509
0
      Value |= op & UINT64_C(8192);
4510
0
      Value |= (op & UINT64_C(8188)) >> 1;
4511
0
      break;
4512
0
    }
4513
0
    case Hexagon::Y2_dcfetchbo: {
4514
      // op: Rs
4515
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4516
0
      Value |= (op & UINT64_C(31)) << 16;
4517
      // op: u11_3
4518
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4519
0
      Value |= (op & UINT64_C(16376)) >> 3;
4520
0
      break;
4521
0
    }
4522
0
    case Hexagon::J2_callrf:
4523
0
    case Hexagon::J2_callrt: {
4524
      // op: Rs
4525
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4526
0
      Value |= (op & UINT64_C(31)) << 16;
4527
      // op: Pu
4528
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4529
0
      Value |= (op & UINT64_C(3)) << 8;
4530
0
      break;
4531
0
    }
4532
0
    case Hexagon::S2_cl0:
4533
0
    case Hexagon::S2_cl0p:
4534
0
    case Hexagon::S2_cl1:
4535
0
    case Hexagon::S2_cl1p:
4536
0
    case Hexagon::S2_clb:
4537
0
    case Hexagon::S2_clbnorm:
4538
0
    case Hexagon::S2_clbp:
4539
0
    case Hexagon::S2_ct0:
4540
0
    case Hexagon::S2_ct0p:
4541
0
    case Hexagon::S2_ct1:
4542
0
    case Hexagon::S2_ct1p:
4543
0
    case Hexagon::S4_clbpnorm: {
4544
      // op: Rs
4545
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4546
0
      Value |= (op & UINT64_C(31)) << 16;
4547
      // op: Rd
4548
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4549
0
      Value |= op & UINT64_C(31);
4550
0
      break;
4551
0
    }
4552
0
    case Hexagon::S4_clbaddi:
4553
0
    case Hexagon::S4_clbpaddi: {
4554
      // op: Rs
4555
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4556
0
      Value |= (op & UINT64_C(31)) << 16;
4557
      // op: Rd
4558
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4559
0
      Value |= op & UINT64_C(31);
4560
      // op: s6
4561
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4562
0
      Value |= (op & UINT64_C(63)) << 8;
4563
0
      break;
4564
0
    }
4565
0
    case Hexagon::C2_cmpeq:
4566
0
    case Hexagon::C2_cmpgt:
4567
0
    case Hexagon::C2_cmpgtu:
4568
0
    case Hexagon::C4_cmplte:
4569
0
    case Hexagon::C4_cmplteu:
4570
0
    case Hexagon::C4_cmpneq: {
4571
      // op: Rs
4572
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4573
0
      Value |= (op & UINT64_C(31)) << 16;
4574
      // op: Rt
4575
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4576
0
      Value |= (op & UINT64_C(31)) << 8;
4577
      // op: Pd
4578
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4579
0
      Value |= op & UINT64_C(3);
4580
0
      break;
4581
0
    }
4582
0
    case Hexagon::A2_add:
4583
0
    case Hexagon::A2_addp:
4584
0
    case Hexagon::A2_addpsat:
4585
0
    case Hexagon::A2_addsat:
4586
0
    case Hexagon::A2_addsph:
4587
0
    case Hexagon::A2_addspl:
4588
0
    case Hexagon::A2_and:
4589
0
    case Hexagon::A2_andp:
4590
0
    case Hexagon::A2_combinew:
4591
0
    case Hexagon::A2_or:
4592
0
    case Hexagon::A2_orp:
4593
0
    case Hexagon::A2_svaddh:
4594
0
    case Hexagon::A2_svaddhs:
4595
0
    case Hexagon::A2_svadduhs:
4596
0
    case Hexagon::A2_svavgh:
4597
0
    case Hexagon::A2_svavghs:
4598
0
    case Hexagon::A2_xor:
4599
0
    case Hexagon::A2_xorp:
4600
0
    case Hexagon::A4_rcmpeq:
4601
0
    case Hexagon::A4_rcmpneq:
4602
0
    case Hexagon::S2_packhl: {
4603
      // op: Rs
4604
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4605
0
      Value |= (op & UINT64_C(31)) << 16;
4606
      // op: Rt
4607
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4608
0
      Value |= (op & UINT64_C(31)) << 8;
4609
      // op: Rd
4610
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4611
0
      Value |= op & UINT64_C(31);
4612
0
      break;
4613
0
    }
4614
0
    case Hexagon::A2_combine_hh:
4615
0
    case Hexagon::A2_combine_hl:
4616
0
    case Hexagon::A2_combine_lh:
4617
0
    case Hexagon::A2_combine_ll:
4618
0
    case Hexagon::A2_sub:
4619
0
    case Hexagon::A2_subp:
4620
0
    case Hexagon::A2_subsat:
4621
0
    case Hexagon::A2_svnavgh:
4622
0
    case Hexagon::A2_svsubh:
4623
0
    case Hexagon::A2_svsubhs:
4624
0
    case Hexagon::A2_svsubuhs:
4625
0
    case Hexagon::A4_andn:
4626
0
    case Hexagon::A4_andnp:
4627
0
    case Hexagon::A4_orn:
4628
0
    case Hexagon::A4_ornp: {
4629
      // op: Rs
4630
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4631
0
      Value |= (op & UINT64_C(31)) << 8;
4632
      // op: Rt
4633
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4634
0
      Value |= (op & UINT64_C(31)) << 16;
4635
      // op: Rd
4636
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4637
0
      Value |= op & UINT64_C(31);
4638
0
      break;
4639
0
    }
4640
0
    case Hexagon::A2_absp:
4641
0
    case Hexagon::A2_negp:
4642
0
    case Hexagon::A2_notp:
4643
0
    case Hexagon::A2_vabsh:
4644
0
    case Hexagon::A2_vabshsat:
4645
0
    case Hexagon::A2_vabsw:
4646
0
    case Hexagon::A2_vabswsat:
4647
0
    case Hexagon::A2_vconj:
4648
0
    case Hexagon::S2_brevp:
4649
0
    case Hexagon::S2_deinterleave:
4650
0
    case Hexagon::S2_interleave:
4651
0
    case Hexagon::S2_vsathb_nopack:
4652
0
    case Hexagon::S2_vsathub_nopack:
4653
0
    case Hexagon::S2_vsatwh_nopack:
4654
0
    case Hexagon::S2_vsatwuh_nopack: {
4655
      // op: Rss
4656
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4657
0
      Value |= (op & UINT64_C(31)) << 16;
4658
      // op: Rdd
4659
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4660
0
      Value |= op & UINT64_C(31);
4661
0
      break;
4662
0
    }
4663
0
    case Hexagon::S4_or_andix: {
4664
      // op: Rx
4665
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4666
0
      Value |= (op & UINT64_C(31)) << 16;
4667
      // op: Ru
4668
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4669
0
      Value |= op & UINT64_C(31);
4670
      // op: s10
4671
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4672
0
      Value |= (op & UINT64_C(512)) << 12;
4673
0
      Value |= (op & UINT64_C(511)) << 5;
4674
0
      break;
4675
0
    }
4676
1
    case Hexagon::A2_tfrih:
4677
22
    case Hexagon::A2_tfril: {
4678
      // op: Rx
4679
22
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4680
22
      Value |= (op & UINT64_C(31)) << 16;
4681
      // op: u16
4682
22
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4683
22
      Value |= (op & UINT64_C(49152)) << 8;
4684
22
      Value |= op & UINT64_C(16383);
4685
22
      break;
4686
1
    }
4687
0
    case Hexagon::M4_mpyrr_addr: {
4688
      // op: Rx
4689
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4690
0
      Value |= (op & UINT64_C(31)) << 8;
4691
      // op: Ru
4692
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
4693
0
      Value |= op & UINT64_C(31);
4694
      // op: Rs
4695
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4696
0
      Value |= (op & UINT64_C(31)) << 16;
4697
0
      break;
4698
1
    }
4699
0
    case Hexagon::V4_SA1_addrx: {
4700
      // op: Rx
4701
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4702
0
      Value |= op & UINT64_C(15);
4703
      // op: Rs
4704
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4705
0
      Value |= (op & UINT64_C(15)) << 4;
4706
0
      break;
4707
1
    }
4708
0
    case Hexagon::V4_SA1_addi: {
4709
      // op: Rx
4710
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4711
0
      Value |= op & UINT64_C(15);
4712
      // op: s7
4713
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4714
0
      Value |= (op & UINT64_C(127)) << 4;
4715
0
      break;
4716
1
    }
4717
0
    case Hexagon::F2_sffma:
4718
0
    case Hexagon::F2_sffma_lib:
4719
0
    case Hexagon::F2_sffms:
4720
0
    case Hexagon::F2_sffms_lib:
4721
0
    case Hexagon::M2_mpy_acc_hh_s0:
4722
0
    case Hexagon::M2_mpy_acc_hh_s1:
4723
0
    case Hexagon::M2_mpy_acc_hl_s0:
4724
0
    case Hexagon::M2_mpy_acc_hl_s1:
4725
0
    case Hexagon::M2_mpy_acc_lh_s0:
4726
0
    case Hexagon::M2_mpy_acc_lh_s1:
4727
0
    case Hexagon::M2_mpy_acc_ll_s0:
4728
0
    case Hexagon::M2_mpy_acc_ll_s1:
4729
0
    case Hexagon::M2_mpy_acc_sat_hh_s0:
4730
0
    case Hexagon::M2_mpy_acc_sat_hh_s1:
4731
0
    case Hexagon::M2_mpy_acc_sat_hl_s0:
4732
0
    case Hexagon::M2_mpy_acc_sat_hl_s1:
4733
0
    case Hexagon::M2_mpy_acc_sat_lh_s0:
4734
0
    case Hexagon::M2_mpy_acc_sat_lh_s1:
4735
0
    case Hexagon::M2_mpy_acc_sat_ll_s0:
4736
0
    case Hexagon::M2_mpy_acc_sat_ll_s1:
4737
0
    case Hexagon::M2_mpy_nac_hh_s0:
4738
0
    case Hexagon::M2_mpy_nac_hh_s1:
4739
0
    case Hexagon::M2_mpy_nac_hl_s0:
4740
0
    case Hexagon::M2_mpy_nac_hl_s1:
4741
0
    case Hexagon::M2_mpy_nac_lh_s0:
4742
0
    case Hexagon::M2_mpy_nac_lh_s1:
4743
0
    case Hexagon::M2_mpy_nac_ll_s0:
4744
0
    case Hexagon::M2_mpy_nac_ll_s1:
4745
0
    case Hexagon::M2_mpy_nac_sat_hh_s0:
4746
0
    case Hexagon::M2_mpy_nac_sat_hh_s1:
4747
0
    case Hexagon::M2_mpy_nac_sat_hl_s0:
4748
0
    case Hexagon::M2_mpy_nac_sat_hl_s1:
4749
0
    case Hexagon::M2_mpy_nac_sat_lh_s0:
4750
0
    case Hexagon::M2_mpy_nac_sat_lh_s1:
4751
0
    case Hexagon::M2_mpy_nac_sat_ll_s0:
4752
0
    case Hexagon::M2_mpy_nac_sat_ll_s1:
4753
0
    case Hexagon::M2_mpyu_acc_hh_s0:
4754
0
    case Hexagon::M2_mpyu_acc_hh_s1:
4755
0
    case Hexagon::M2_mpyu_acc_hl_s0:
4756
0
    case Hexagon::M2_mpyu_acc_hl_s1:
4757
0
    case Hexagon::M2_mpyu_acc_lh_s0:
4758
0
    case Hexagon::M2_mpyu_acc_lh_s1:
4759
0
    case Hexagon::M2_mpyu_acc_ll_s0:
4760
0
    case Hexagon::M2_mpyu_acc_ll_s1:
4761
0
    case Hexagon::M2_mpyu_nac_hh_s0:
4762
0
    case Hexagon::M2_mpyu_nac_hh_s1:
4763
0
    case Hexagon::M2_mpyu_nac_hl_s0:
4764
0
    case Hexagon::M2_mpyu_nac_hl_s1:
4765
0
    case Hexagon::M2_mpyu_nac_lh_s0:
4766
0
    case Hexagon::M2_mpyu_nac_lh_s1:
4767
0
    case Hexagon::M2_mpyu_nac_ll_s0:
4768
0
    case Hexagon::M2_mpyu_nac_ll_s1:
4769
0
    case Hexagon::S2_asl_r_r_acc:
4770
0
    case Hexagon::S2_asl_r_r_and:
4771
0
    case Hexagon::S2_asl_r_r_nac:
4772
0
    case Hexagon::S2_asl_r_r_or:
4773
0
    case Hexagon::S2_asr_r_r_acc:
4774
0
    case Hexagon::S2_asr_r_r_and:
4775
0
    case Hexagon::S2_asr_r_r_nac:
4776
0
    case Hexagon::S2_asr_r_r_or:
4777
0
    case Hexagon::S2_lsl_r_r_acc:
4778
0
    case Hexagon::S2_lsl_r_r_and:
4779
0
    case Hexagon::S2_lsl_r_r_nac:
4780
0
    case Hexagon::S2_lsl_r_r_or:
4781
0
    case Hexagon::S2_lsr_r_r_acc:
4782
0
    case Hexagon::S2_lsr_r_r_and:
4783
0
    case Hexagon::S2_lsr_r_r_nac:
4784
0
    case Hexagon::S2_lsr_r_r_or: {
4785
      // op: Rx
4786
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4787
0
      Value |= op & UINT64_C(31);
4788
      // op: Rs
4789
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4790
0
      Value |= (op & UINT64_C(31)) << 16;
4791
      // op: Rt
4792
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4793
0
      Value |= (op & UINT64_C(31)) << 8;
4794
0
      break;
4795
0
    }
4796
0
    case Hexagon::F2_sffma_sc: {
4797
      // op: Rx
4798
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4799
0
      Value |= op & UINT64_C(31);
4800
      // op: Rs
4801
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4802
0
      Value |= (op & UINT64_C(31)) << 16;
4803
      // op: Rt
4804
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4805
0
      Value |= (op & UINT64_C(31)) << 8;
4806
      // op: Pu
4807
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
4808
0
      Value |= (op & UINT64_C(3)) << 5;
4809
0
      break;
4810
0
    }
4811
0
    case Hexagon::S4_or_andi:
4812
0
    case Hexagon::S4_or_ori: {
4813
      // op: Rx
4814
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4815
0
      Value |= op & UINT64_C(31);
4816
      // op: Rs
4817
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4818
0
      Value |= (op & UINT64_C(31)) << 16;
4819
      // op: s10
4820
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4821
0
      Value |= (op & UINT64_C(512)) << 12;
4822
0
      Value |= (op & UINT64_C(511)) << 5;
4823
0
      break;
4824
0
    }
4825
0
    case Hexagon::S2_tableidxb:
4826
0
    case Hexagon::S2_tableidxd:
4827
0
    case Hexagon::S2_tableidxh:
4828
0
    case Hexagon::S2_tableidxw: {
4829
      // op: Rx
4830
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4831
0
      Value |= op & UINT64_C(31);
4832
      // op: Rs
4833
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4834
0
      Value |= (op & UINT64_C(31)) << 16;
4835
      // op: u4
4836
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4837
0
      Value |= (op & UINT64_C(8)) << 18;
4838
0
      Value |= (op & UINT64_C(7)) << 5;
4839
      // op: S6
4840
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
4841
0
      Value |= (op & UINT64_C(63)) << 8;
4842
0
      break;
4843
0
    }
4844
0
    case Hexagon::S2_asl_i_r_acc:
4845
0
    case Hexagon::S2_asl_i_r_and:
4846
0
    case Hexagon::S2_asl_i_r_nac:
4847
0
    case Hexagon::S2_asl_i_r_or:
4848
0
    case Hexagon::S2_asl_i_r_xacc:
4849
0
    case Hexagon::S2_asr_i_r_acc:
4850
0
    case Hexagon::S2_asr_i_r_and:
4851
0
    case Hexagon::S2_asr_i_r_nac:
4852
0
    case Hexagon::S2_asr_i_r_or:
4853
0
    case Hexagon::S2_lsr_i_r_acc:
4854
0
    case Hexagon::S2_lsr_i_r_and:
4855
0
    case Hexagon::S2_lsr_i_r_nac:
4856
0
    case Hexagon::S2_lsr_i_r_or:
4857
0
    case Hexagon::S2_lsr_i_r_xacc: {
4858
      // op: Rx
4859
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4860
0
      Value |= op & UINT64_C(31);
4861
      // op: Rs
4862
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4863
0
      Value |= (op & UINT64_C(31)) << 16;
4864
      // op: u5
4865
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4866
0
      Value |= (op & UINT64_C(31)) << 8;
4867
0
      break;
4868
0
    }
4869
0
    case Hexagon::A4_vrmaxh:
4870
0
    case Hexagon::A4_vrmaxuh:
4871
0
    case Hexagon::A4_vrmaxuw:
4872
0
    case Hexagon::A4_vrmaxw:
4873
0
    case Hexagon::A4_vrminh:
4874
0
    case Hexagon::A4_vrminuh:
4875
0
    case Hexagon::A4_vrminuw:
4876
0
    case Hexagon::A4_vrminw: {
4877
      // op: Rxx
4878
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4879
0
      Value |= (op & UINT64_C(31)) << 8;
4880
      // op: Rss
4881
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4882
0
      Value |= (op & UINT64_C(31)) << 16;
4883
      // op: Ru
4884
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4885
0
      Value |= op & UINT64_C(31);
4886
0
      break;
4887
0
    }
4888
0
    case Hexagon::M2_cmaci_s0:
4889
0
    case Hexagon::M2_cmacr_s0:
4890
0
    case Hexagon::M2_cmacs_s0:
4891
0
    case Hexagon::M2_cmacs_s1:
4892
0
    case Hexagon::M2_cmacsc_s0:
4893
0
    case Hexagon::M2_cmacsc_s1:
4894
0
    case Hexagon::M2_cnacs_s0:
4895
0
    case Hexagon::M2_cnacs_s1:
4896
0
    case Hexagon::M2_cnacsc_s0:
4897
0
    case Hexagon::M2_cnacsc_s1:
4898
0
    case Hexagon::M2_dpmpyss_acc_s0:
4899
0
    case Hexagon::M2_dpmpyss_nac_s0:
4900
0
    case Hexagon::M2_dpmpyuu_acc_s0:
4901
0
    case Hexagon::M2_dpmpyuu_nac_s0:
4902
0
    case Hexagon::M2_mpyd_acc_hh_s0:
4903
0
    case Hexagon::M2_mpyd_acc_hh_s1:
4904
0
    case Hexagon::M2_mpyd_acc_hl_s0:
4905
0
    case Hexagon::M2_mpyd_acc_hl_s1:
4906
0
    case Hexagon::M2_mpyd_acc_lh_s0:
4907
0
    case Hexagon::M2_mpyd_acc_lh_s1:
4908
0
    case Hexagon::M2_mpyd_acc_ll_s0:
4909
0
    case Hexagon::M2_mpyd_acc_ll_s1:
4910
0
    case Hexagon::M2_mpyd_nac_hh_s0:
4911
0
    case Hexagon::M2_mpyd_nac_hh_s1:
4912
0
    case Hexagon::M2_mpyd_nac_hl_s0:
4913
0
    case Hexagon::M2_mpyd_nac_hl_s1:
4914
0
    case Hexagon::M2_mpyd_nac_lh_s0:
4915
0
    case Hexagon::M2_mpyd_nac_lh_s1:
4916
0
    case Hexagon::M2_mpyd_nac_ll_s0:
4917
0
    case Hexagon::M2_mpyd_nac_ll_s1:
4918
0
    case Hexagon::M2_mpyud_acc_hh_s0:
4919
0
    case Hexagon::M2_mpyud_acc_hh_s1:
4920
0
    case Hexagon::M2_mpyud_acc_hl_s0:
4921
0
    case Hexagon::M2_mpyud_acc_hl_s1:
4922
0
    case Hexagon::M2_mpyud_acc_lh_s0:
4923
0
    case Hexagon::M2_mpyud_acc_lh_s1:
4924
0
    case Hexagon::M2_mpyud_acc_ll_s0:
4925
0
    case Hexagon::M2_mpyud_acc_ll_s1:
4926
0
    case Hexagon::M2_mpyud_nac_hh_s0:
4927
0
    case Hexagon::M2_mpyud_nac_hh_s1:
4928
0
    case Hexagon::M2_mpyud_nac_hl_s0:
4929
0
    case Hexagon::M2_mpyud_nac_hl_s1:
4930
0
    case Hexagon::M2_mpyud_nac_lh_s0:
4931
0
    case Hexagon::M2_mpyud_nac_lh_s1:
4932
0
    case Hexagon::M2_mpyud_nac_ll_s0:
4933
0
    case Hexagon::M2_mpyud_nac_ll_s1:
4934
0
    case Hexagon::M2_vmac2:
4935
0
    case Hexagon::M2_vmac2s_s0:
4936
0
    case Hexagon::M2_vmac2s_s1:
4937
0
    case Hexagon::M2_vmac2su_s0:
4938
0
    case Hexagon::M2_vmac2su_s1:
4939
0
    case Hexagon::M4_pmpyw_acc:
4940
0
    case Hexagon::M4_vpmpyh_acc:
4941
0
    case Hexagon::M5_vmacbsu:
4942
0
    case Hexagon::M5_vmacbuu: {
4943
      // op: Rxx
4944
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4945
0
      Value |= op & UINT64_C(31);
4946
      // op: Rs
4947
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4948
0
      Value |= (op & UINT64_C(31)) << 16;
4949
      // op: Rt
4950
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4951
0
      Value |= (op & UINT64_C(31)) << 8;
4952
0
      break;
4953
0
    }
4954
0
    case Hexagon::S2_asl_r_p_acc:
4955
0
    case Hexagon::S2_asl_r_p_and:
4956
0
    case Hexagon::S2_asl_r_p_nac:
4957
0
    case Hexagon::S2_asl_r_p_or:
4958
0
    case Hexagon::S2_asl_r_p_xor:
4959
0
    case Hexagon::S2_asr_r_p_acc:
4960
0
    case Hexagon::S2_asr_r_p_and:
4961
0
    case Hexagon::S2_asr_r_p_nac:
4962
0
    case Hexagon::S2_asr_r_p_or:
4963
0
    case Hexagon::S2_asr_r_p_xor:
4964
0
    case Hexagon::S2_lsl_r_p_acc:
4965
0
    case Hexagon::S2_lsl_r_p_and:
4966
0
    case Hexagon::S2_lsl_r_p_nac:
4967
0
    case Hexagon::S2_lsl_r_p_or:
4968
0
    case Hexagon::S2_lsl_r_p_xor:
4969
0
    case Hexagon::S2_lsr_r_p_acc:
4970
0
    case Hexagon::S2_lsr_r_p_and:
4971
0
    case Hexagon::S2_lsr_r_p_nac:
4972
0
    case Hexagon::S2_lsr_r_p_or:
4973
0
    case Hexagon::S2_lsr_r_p_xor:
4974
0
    case Hexagon::S2_vrcnegh: {
4975
      // op: Rxx
4976
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4977
0
      Value |= op & UINT64_C(31);
4978
      // op: Rss
4979
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4980
0
      Value |= (op & UINT64_C(31)) << 16;
4981
      // op: Rt
4982
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4983
0
      Value |= (op & UINT64_C(31)) << 8;
4984
0
      break;
4985
0
    }
4986
0
    case Hexagon::S4_vrcrotate_acc: {
4987
      // op: Rxx
4988
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
4989
0
      Value |= op & UINT64_C(31);
4990
      // op: Rss
4991
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
4992
0
      Value |= (op & UINT64_C(31)) << 16;
4993
      // op: Rt
4994
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
4995
0
      Value |= (op & UINT64_C(31)) << 8;
4996
      // op: u2
4997
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
4998
0
      Value |= (op & UINT64_C(2)) << 12;
4999
0
      Value |= (op & UINT64_C(1)) << 5;
5000
0
      break;
5001
0
    }
5002
0
    case Hexagon::M2_mmachs_rs0:
5003
0
    case Hexagon::M2_mmachs_rs1:
5004
0
    case Hexagon::M2_mmachs_s0:
5005
0
    case Hexagon::M2_mmachs_s1:
5006
0
    case Hexagon::M2_mmacls_rs0:
5007
0
    case Hexagon::M2_mmacls_rs1:
5008
0
    case Hexagon::M2_mmacls_s0:
5009
0
    case Hexagon::M2_mmacls_s1:
5010
0
    case Hexagon::M2_mmacuhs_rs0:
5011
0
    case Hexagon::M2_mmacuhs_rs1:
5012
0
    case Hexagon::M2_mmacuhs_s0:
5013
0
    case Hexagon::M2_mmacuhs_s1:
5014
0
    case Hexagon::M2_mmaculs_rs0:
5015
0
    case Hexagon::M2_mmaculs_rs1:
5016
0
    case Hexagon::M2_mmaculs_s0:
5017
0
    case Hexagon::M2_mmaculs_s1:
5018
0
    case Hexagon::M2_vcmac_s0_sat_i:
5019
0
    case Hexagon::M2_vcmac_s0_sat_r:
5020
0
    case Hexagon::M2_vdmacs_s0:
5021
0
    case Hexagon::M2_vdmacs_s1:
5022
0
    case Hexagon::M2_vmac2es:
5023
0
    case Hexagon::M2_vmac2es_s0:
5024
0
    case Hexagon::M2_vmac2es_s1:
5025
0
    case Hexagon::M2_vrcmpys_acc_s1_h:
5026
0
    case Hexagon::M2_vrcmpys_acc_s1_l:
5027
0
    case Hexagon::M4_vrmpyeh_acc_s0:
5028
0
    case Hexagon::M4_vrmpyeh_acc_s1:
5029
0
    case Hexagon::M4_vrmpyoh_acc_s0:
5030
0
    case Hexagon::M4_vrmpyoh_acc_s1:
5031
0
    case Hexagon::M4_xor_xacc:
5032
0
    case Hexagon::M5_vdmacbsu: {
5033
      // op: Rxx
5034
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5035
0
      Value |= op & UINT64_C(31);
5036
      // op: Rss
5037
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5038
0
      Value |= (op & UINT64_C(31)) << 16;
5039
      // op: Rtt
5040
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5041
0
      Value |= (op & UINT64_C(31)) << 8;
5042
0
      break;
5043
0
    }
5044
0
    case Hexagon::S2_asl_i_p_acc:
5045
0
    case Hexagon::S2_asl_i_p_and:
5046
0
    case Hexagon::S2_asl_i_p_nac:
5047
0
    case Hexagon::S2_asl_i_p_or:
5048
0
    case Hexagon::S2_asl_i_p_xacc:
5049
0
    case Hexagon::S2_asr_i_p_acc:
5050
0
    case Hexagon::S2_asr_i_p_and:
5051
0
    case Hexagon::S2_asr_i_p_nac:
5052
0
    case Hexagon::S2_asr_i_p_or:
5053
0
    case Hexagon::S2_lsr_i_p_acc:
5054
0
    case Hexagon::S2_lsr_i_p_and:
5055
0
    case Hexagon::S2_lsr_i_p_nac:
5056
0
    case Hexagon::S2_lsr_i_p_or:
5057
0
    case Hexagon::S2_lsr_i_p_xacc: {
5058
      // op: Rxx
5059
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5060
0
      Value |= op & UINT64_C(31);
5061
      // op: Rss
5062
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5063
0
      Value |= (op & UINT64_C(31)) << 16;
5064
      // op: u6
5065
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5066
0
      Value |= (op & UINT64_C(63)) << 8;
5067
0
      break;
5068
0
    }
5069
0
    case Hexagon::S2_storerbnew_pbr:
5070
0
    case Hexagon::S2_storerbnew_pcr:
5071
0
    case Hexagon::S2_storerhnew_pbr:
5072
0
    case Hexagon::S2_storerhnew_pcr:
5073
0
    case Hexagon::S2_storerinew_pbr:
5074
0
    case Hexagon::S2_storerinew_pcr: {
5075
      // op: Rz
5076
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5077
0
      Value |= (op & UINT64_C(31)) << 16;
5078
      // op: Mu
5079
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5080
0
      Value |= (op & UINT64_C(1)) << 13;
5081
      // op: Nt
5082
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5083
0
      Value |= (op & UINT64_C(7)) << 8;
5084
0
      break;
5085
0
    }
5086
0
    case Hexagon::S2_storerb_pcr:
5087
0
    case Hexagon::S2_storerd_pcr:
5088
0
    case Hexagon::S2_storerf_pcr:
5089
0
    case Hexagon::S2_storerh_pcr:
5090
0
    case Hexagon::S2_storeri_pcr: {
5091
      // op: Rz
5092
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5093
0
      Value |= (op & UINT64_C(31)) << 16;
5094
      // op: Mu
5095
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5096
0
      Value |= (op & UINT64_C(1)) << 13;
5097
      // op: Rt
5098
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5099
0
      Value |= (op & UINT64_C(31)) << 8;
5100
0
      break;
5101
0
    }
5102
0
    case Hexagon::S2_storerb_pbr:
5103
0
    case Hexagon::S2_storerd_pbr:
5104
0
    case Hexagon::S2_storerf_pbr:
5105
0
    case Hexagon::S2_storerh_pbr:
5106
0
    case Hexagon::S2_storeri_pbr: {
5107
      // op: Rz
5108
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5109
0
      Value |= (op & UINT64_C(31)) << 16;
5110
      // op: Mu
5111
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5112
0
      Value |= (op & UINT64_C(1)) << 13;
5113
      // op: src
5114
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5115
0
      Value |= (op & UINT64_C(31)) << 8;
5116
0
      break;
5117
0
    }
5118
0
    case Hexagon::S2_storerbnew_pci: {
5119
      // op: Rz
5120
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5121
0
      Value |= (op & UINT64_C(31)) << 16;
5122
      // op: offset
5123
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5124
0
      Value |= (op & UINT64_C(15)) << 3;
5125
      // op: Mu
5126
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5127
0
      Value |= (op & UINT64_C(1)) << 13;
5128
      // op: Nt
5129
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5130
0
      Value |= (op & UINT64_C(7)) << 8;
5131
0
      break;
5132
0
    }
5133
0
    case Hexagon::S2_storerb_pci: {
5134
      // op: Rz
5135
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5136
0
      Value |= (op & UINT64_C(31)) << 16;
5137
      // op: offset
5138
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5139
0
      Value |= (op & UINT64_C(15)) << 3;
5140
      // op: Mu
5141
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5142
0
      Value |= (op & UINT64_C(1)) << 13;
5143
      // op: Rt
5144
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5145
0
      Value |= (op & UINT64_C(31)) << 8;
5146
0
      break;
5147
0
    }
5148
0
    case Hexagon::S2_storerhnew_pci: {
5149
      // op: Rz
5150
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5151
0
      Value |= (op & UINT64_C(31)) << 16;
5152
      // op: offset
5153
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5154
0
      Value |= (op & UINT64_C(30)) << 2;
5155
      // op: Mu
5156
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5157
0
      Value |= (op & UINT64_C(1)) << 13;
5158
      // op: Nt
5159
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5160
0
      Value |= (op & UINT64_C(7)) << 8;
5161
0
      break;
5162
0
    }
5163
0
    case Hexagon::S2_storerf_pci:
5164
0
    case Hexagon::S2_storerh_pci: {
5165
      // op: Rz
5166
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5167
0
      Value |= (op & UINT64_C(31)) << 16;
5168
      // op: offset
5169
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5170
0
      Value |= (op & UINT64_C(30)) << 2;
5171
      // op: Mu
5172
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5173
0
      Value |= (op & UINT64_C(1)) << 13;
5174
      // op: Rt
5175
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5176
0
      Value |= (op & UINT64_C(31)) << 8;
5177
0
      break;
5178
0
    }
5179
0
    case Hexagon::S2_storerinew_pci: {
5180
      // op: Rz
5181
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5182
0
      Value |= (op & UINT64_C(31)) << 16;
5183
      // op: offset
5184
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5185
0
      Value |= (op & UINT64_C(60)) << 1;
5186
      // op: Mu
5187
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5188
0
      Value |= (op & UINT64_C(1)) << 13;
5189
      // op: Nt
5190
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5191
0
      Value |= (op & UINT64_C(7)) << 8;
5192
0
      break;
5193
0
    }
5194
0
    case Hexagon::S2_storeri_pci: {
5195
      // op: Rz
5196
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5197
0
      Value |= (op & UINT64_C(31)) << 16;
5198
      // op: offset
5199
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5200
0
      Value |= (op & UINT64_C(60)) << 1;
5201
      // op: Mu
5202
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5203
0
      Value |= (op & UINT64_C(1)) << 13;
5204
      // op: Rt
5205
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5206
0
      Value |= (op & UINT64_C(31)) << 8;
5207
0
      break;
5208
0
    }
5209
0
    case Hexagon::S2_storerd_pci: {
5210
      // op: Rz
5211
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5212
0
      Value |= (op & UINT64_C(31)) << 16;
5213
      // op: offset
5214
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5215
0
      Value |= op & UINT64_C(120);
5216
      // op: Mu
5217
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5218
0
      Value |= (op & UINT64_C(1)) << 13;
5219
      // op: Rt
5220
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5221
0
      Value |= (op & UINT64_C(31)) << 8;
5222
0
      break;
5223
0
    }
5224
0
    case Hexagon::S2_storeriabs:
5225
0
    case Hexagon::S2_storerigp: {
5226
      // op: addr
5227
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5228
0
      Value |= (op & UINT64_C(196608)) << 9;
5229
0
      Value |= (op & UINT64_C(63488)) << 5;
5230
0
      Value |= (op & UINT64_C(1024)) << 3;
5231
0
      Value |= (op & UINT64_C(1020)) >> 2;
5232
      // op: src
5233
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5234
0
      Value |= (op & UINT64_C(31)) << 8;
5235
0
      break;
5236
0
    }
5237
0
    case Hexagon::S2_storerinewabs:
5238
0
    case Hexagon::S2_storerinewgp: {
5239
      // op: addr
5240
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5241
0
      Value |= (op & UINT64_C(196608)) << 9;
5242
0
      Value |= (op & UINT64_C(63488)) << 5;
5243
0
      Value |= (op & UINT64_C(1024)) << 3;
5244
0
      Value |= (op & UINT64_C(1020)) >> 2;
5245
      // op: src
5246
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5247
0
      Value |= (op & UINT64_C(7)) << 8;
5248
0
      break;
5249
0
    }
5250
0
    case Hexagon::S2_storerdabs:
5251
0
    case Hexagon::S2_storerdgp: {
5252
      // op: addr
5253
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5254
0
      Value |= (op & UINT64_C(393216)) << 8;
5255
0
      Value |= (op & UINT64_C(126976)) << 4;
5256
0
      Value |= (op & UINT64_C(2048)) << 2;
5257
0
      Value |= (op & UINT64_C(2040)) >> 3;
5258
      // op: src
5259
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5260
0
      Value |= (op & UINT64_C(31)) << 8;
5261
0
      break;
5262
0
    }
5263
0
    case Hexagon::S2_storerbabs:
5264
0
    case Hexagon::S2_storerbgp: {
5265
      // op: addr
5266
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5267
0
      Value |= (op & UINT64_C(49152)) << 11;
5268
0
      Value |= (op & UINT64_C(15872)) << 7;
5269
0
      Value |= (op & UINT64_C(256)) << 5;
5270
0
      Value |= op & UINT64_C(255);
5271
      // op: src
5272
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5273
0
      Value |= (op & UINT64_C(31)) << 8;
5274
0
      break;
5275
0
    }
5276
0
    case Hexagon::S2_storerbnewabs:
5277
0
    case Hexagon::S2_storerbnewgp: {
5278
      // op: addr
5279
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5280
0
      Value |= (op & UINT64_C(49152)) << 11;
5281
0
      Value |= (op & UINT64_C(15872)) << 7;
5282
0
      Value |= (op & UINT64_C(256)) << 5;
5283
0
      Value |= op & UINT64_C(255);
5284
      // op: src
5285
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5286
0
      Value |= (op & UINT64_C(7)) << 8;
5287
0
      break;
5288
0
    }
5289
0
    case Hexagon::S2_storerfabs:
5290
0
    case Hexagon::S2_storerfgp:
5291
0
    case Hexagon::S2_storerhabs:
5292
0
    case Hexagon::S2_storerhgp: {
5293
      // op: addr
5294
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5295
0
      Value |= (op & UINT64_C(98304)) << 10;
5296
0
      Value |= (op & UINT64_C(31744)) << 6;
5297
0
      Value |= (op & UINT64_C(512)) << 4;
5298
0
      Value |= (op & UINT64_C(510)) >> 1;
5299
      // op: src
5300
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5301
0
      Value |= (op & UINT64_C(31)) << 8;
5302
0
      break;
5303
0
    }
5304
0
    case Hexagon::S2_storerhnewabs:
5305
0
    case Hexagon::S2_storerhnewgp: {
5306
      // op: addr
5307
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5308
0
      Value |= (op & UINT64_C(98304)) << 10;
5309
0
      Value |= (op & UINT64_C(31744)) << 6;
5310
0
      Value |= (op & UINT64_C(512)) << 4;
5311
0
      Value |= (op & UINT64_C(510)) >> 1;
5312
      // op: src
5313
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5314
0
      Value |= (op & UINT64_C(7)) << 8;
5315
0
      break;
5316
0
    }
5317
0
    case Hexagon::L4_add_memoph_io:
5318
0
    case Hexagon::L4_and_memoph_io:
5319
0
    case Hexagon::L4_iadd_memoph_io:
5320
0
    case Hexagon::L4_iand_memoph_io:
5321
0
    case Hexagon::L4_ior_memoph_io:
5322
0
    case Hexagon::L4_isub_memoph_io:
5323
0
    case Hexagon::L4_or_memoph_io:
5324
0
    case Hexagon::L4_sub_memoph_io: {
5325
      // op: base
5326
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5327
0
      Value |= (op & UINT64_C(31)) << 16;
5328
      // op: delta
5329
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5330
0
      Value |= op & UINT64_C(31);
5331
      // op: offset
5332
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5333
0
      Value |= (op & UINT64_C(126)) << 6;
5334
0
      break;
5335
0
    }
5336
0
    case Hexagon::L4_add_memopw_io:
5337
0
    case Hexagon::L4_and_memopw_io:
5338
0
    case Hexagon::L4_iadd_memopw_io:
5339
0
    case Hexagon::L4_iand_memopw_io:
5340
0
    case Hexagon::L4_ior_memopw_io:
5341
0
    case Hexagon::L4_isub_memopw_io:
5342
0
    case Hexagon::L4_or_memopw_io:
5343
0
    case Hexagon::L4_sub_memopw_io: {
5344
      // op: base
5345
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5346
0
      Value |= (op & UINT64_C(31)) << 16;
5347
      // op: delta
5348
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5349
0
      Value |= op & UINT64_C(31);
5350
      // op: offset
5351
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5352
0
      Value |= (op & UINT64_C(252)) << 5;
5353
0
      break;
5354
0
    }
5355
0
    case Hexagon::L4_add_memopb_io:
5356
0
    case Hexagon::L4_and_memopb_io:
5357
0
    case Hexagon::L4_iadd_memopb_io:
5358
0
    case Hexagon::L4_iand_memopb_io:
5359
0
    case Hexagon::L4_ior_memopb_io:
5360
0
    case Hexagon::L4_isub_memopb_io:
5361
0
    case Hexagon::L4_or_memopb_io:
5362
0
    case Hexagon::L4_sub_memopb_io: {
5363
      // op: base
5364
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5365
0
      Value |= (op & UINT64_C(31)) << 16;
5366
      // op: delta
5367
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5368
0
      Value |= op & UINT64_C(31);
5369
      // op: offset
5370
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5371
0
      Value |= (op & UINT64_C(63)) << 7;
5372
0
      break;
5373
0
    }
5374
0
    case Hexagon::CALLv3nr:
5375
333
    case Hexagon::J2_call:
5376
3.22k
    case Hexagon::J2_jump:
5377
3.22k
    case Hexagon::J2_jump_ext:
5378
3.22k
    case Hexagon::J2_jump_noext:
5379
3.22k
    case Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4:
5380
3.22k
    case Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT:
5381
3.22k
    case Hexagon::RESTORE_DEALLOC_RET_JMP_V4:
5382
3.22k
    case Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT:
5383
3.22k
    case Hexagon::SAVE_REGISTERS_CALL_V4:
5384
3.22k
    case Hexagon::SAVE_REGISTERS_CALL_V4_EXT: {
5385
      // op: dst
5386
3.22k
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5387
3.22k
      Value |= (op & UINT64_C(16744448)) << 1;
5388
3.22k
      Value |= (op & UINT64_C(32764)) >> 1;
5389
3.22k
      break;
5390
3.22k
    }
5391
0
    case Hexagon::EH_RETURN_JMPR:
5392
0
    case Hexagon::J2_jumpr:
5393
0
    case Hexagon::JMPret: {
5394
      // op: dst
5395
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5396
0
      Value |= (op & UINT64_C(31)) << 16;
5397
0
      break;
5398
0
    }
5399
0
    case Hexagon::S4_storerb_ap:
5400
0
    case Hexagon::S4_storerd_ap:
5401
0
    case Hexagon::S4_storerf_ap:
5402
0
    case Hexagon::S4_storerh_ap:
5403
0
    case Hexagon::S4_storeri_ap: {
5404
      // op: dst
5405
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5406
0
      Value |= (op & UINT64_C(31)) << 16;
5407
      // op: addr
5408
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5409
0
      Value |= op & UINT64_C(63);
5410
      // op: src
5411
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5412
0
      Value |= (op & UINT64_C(31)) << 8;
5413
0
      break;
5414
0
    }
5415
0
    case Hexagon::S4_storerbnew_ap:
5416
0
    case Hexagon::S4_storerhnew_ap:
5417
0
    case Hexagon::S4_storerinew_ap: {
5418
      // op: dst
5419
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5420
0
      Value |= (op & UINT64_C(31)) << 16;
5421
      // op: addr
5422
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5423
0
      Value |= op & UINT64_C(63);
5424
      // op: src
5425
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5426
0
      Value |= (op & UINT64_C(7)) << 8;
5427
0
      break;
5428
0
    }
5429
0
    case Hexagon::HI:
5430
0
    case Hexagon::LO_H: {
5431
      // op: dst
5432
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5433
0
      Value |= (op & UINT64_C(31)) << 16;
5434
      // op: imm_value
5435
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5436
0
      Value |= (op & UINT64_C(3221225472)) >> 8;
5437
0
      Value |= (op & UINT64_C(1073676288)) >> 16;
5438
0
      break;
5439
0
    }
5440
0
    case Hexagon::HI_L:
5441
0
    case Hexagon::LO: {
5442
      // op: dst
5443
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5444
0
      Value |= (op & UINT64_C(31)) << 16;
5445
      // op: imm_value
5446
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5447
0
      Value |= (op & UINT64_C(49152)) << 8;
5448
0
      Value |= op & UINT64_C(16383);
5449
0
      break;
5450
0
    }
5451
0
    case Hexagon::M4_mpyri_addr_u2: {
5452
      // op: dst
5453
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5454
0
      Value |= (op & UINT64_C(31)) << 8;
5455
      // op: src1
5456
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5457
0
      Value |= op & UINT64_C(31);
5458
      // op: src2
5459
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5460
0
      Value |= (op & UINT64_C(192)) << 15;
5461
0
      Value |= (op & UINT64_C(32)) << 8;
5462
0
      Value |= (op & UINT64_C(28)) << 3;
5463
      // op: src3
5464
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5465
0
      Value |= (op & UINT64_C(31)) << 16;
5466
0
      break;
5467
0
    }
5468
0
    case Hexagon::M4_mpyri_addr: {
5469
      // op: dst
5470
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5471
0
      Value |= (op & UINT64_C(31)) << 8;
5472
      // op: src1
5473
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5474
0
      Value |= op & UINT64_C(31);
5475
      // op: src2
5476
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5477
0
      Value |= (op & UINT64_C(48)) << 17;
5478
0
      Value |= (op & UINT64_C(8)) << 10;
5479
0
      Value |= (op & UINT64_C(7)) << 5;
5480
      // op: src3
5481
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5482
0
      Value |= (op & UINT64_C(31)) << 16;
5483
0
      break;
5484
0
    }
5485
0
    case Hexagon::V6_pred_not:
5486
0
    case Hexagon::V6_pred_not_128B: {
5487
      // op: dst
5488
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5489
0
      Value |= op & UINT64_C(3);
5490
      // op: src1
5491
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5492
0
      Value |= (op & UINT64_C(3)) << 8;
5493
0
      break;
5494
0
    }
5495
0
    case Hexagon::V6_pred_and:
5496
0
    case Hexagon::V6_pred_and_128B:
5497
0
    case Hexagon::V6_pred_and_n:
5498
0
    case Hexagon::V6_pred_and_n_128B:
5499
0
    case Hexagon::V6_pred_or:
5500
0
    case Hexagon::V6_pred_or_128B:
5501
0
    case Hexagon::V6_pred_or_n:
5502
0
    case Hexagon::V6_pred_or_n_128B:
5503
0
    case Hexagon::V6_pred_xor:
5504
0
    case Hexagon::V6_pred_xor_128B: {
5505
      // op: dst
5506
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5507
0
      Value |= op & UINT64_C(3);
5508
      // op: src1
5509
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5510
0
      Value |= (op & UINT64_C(3)) << 8;
5511
      // op: src2
5512
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5513
0
      Value |= (op & UINT64_C(3)) << 22;
5514
0
      break;
5515
0
    }
5516
0
    case Hexagon::V6_pred_scalar2:
5517
0
    case Hexagon::V6_pred_scalar2_128B:
5518
0
    case Hexagon::Y5_l2locka: {
5519
      // op: dst
5520
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5521
0
      Value |= op & UINT64_C(3);
5522
      // op: src1
5523
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5524
0
      Value |= (op & UINT64_C(31)) << 16;
5525
0
      break;
5526
0
    }
5527
0
    case Hexagon::F2_dfcmpeq:
5528
0
    case Hexagon::F2_dfcmpge:
5529
0
    case Hexagon::F2_dfcmpgt:
5530
0
    case Hexagon::F2_dfcmpuo:
5531
0
    case Hexagon::F2_sfcmpeq:
5532
0
    case Hexagon::F2_sfcmpge:
5533
0
    case Hexagon::F2_sfcmpgt:
5534
0
    case Hexagon::F2_sfcmpuo: {
5535
      // op: dst
5536
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5537
0
      Value |= op & UINT64_C(3);
5538
      // op: src1
5539
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5540
0
      Value |= (op & UINT64_C(31)) << 16;
5541
      // op: src2
5542
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5543
0
      Value |= (op & UINT64_C(31)) << 8;
5544
0
      break;
5545
0
    }
5546
0
    case Hexagon::C2_cmpgtui:
5547
0
    case Hexagon::C4_cmplteui: {
5548
      // op: dst
5549
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5550
0
      Value |= op & UINT64_C(3);
5551
      // op: src1
5552
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5553
0
      Value |= (op & UINT64_C(31)) << 16;
5554
      // op: src2
5555
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5556
0
      Value |= (op & UINT64_C(511)) << 5;
5557
0
      break;
5558
0
    }
5559
0
    case Hexagon::C2_cmpeqi:
5560
0
    case Hexagon::C2_cmpgti:
5561
0
    case Hexagon::C4_cmpltei:
5562
0
    case Hexagon::C4_cmpneqi: {
5563
      // op: dst
5564
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5565
0
      Value |= op & UINT64_C(3);
5566
      // op: src1
5567
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5568
0
      Value |= (op & UINT64_C(31)) << 16;
5569
      // op: src2
5570
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5571
0
      Value |= (op & UINT64_C(512)) << 12;
5572
0
      Value |= (op & UINT64_C(511)) << 5;
5573
0
      break;
5574
0
    }
5575
0
    case Hexagon::V6_vandvrt:
5576
0
    case Hexagon::V6_vandvrt_128B:
5577
0
    case Hexagon::V6_veqb:
5578
0
    case Hexagon::V6_veqb_128B:
5579
0
    case Hexagon::V6_veqh:
5580
0
    case Hexagon::V6_veqh_128B:
5581
0
    case Hexagon::V6_veqw:
5582
0
    case Hexagon::V6_veqw_128B:
5583
0
    case Hexagon::V6_vgtb:
5584
0
    case Hexagon::V6_vgtb_128B:
5585
0
    case Hexagon::V6_vgth:
5586
0
    case Hexagon::V6_vgth_128B:
5587
0
    case Hexagon::V6_vgtub:
5588
0
    case Hexagon::V6_vgtub_128B:
5589
0
    case Hexagon::V6_vgtuh:
5590
0
    case Hexagon::V6_vgtuh_128B:
5591
0
    case Hexagon::V6_vgtuw:
5592
0
    case Hexagon::V6_vgtuw_128B:
5593
0
    case Hexagon::V6_vgtw:
5594
0
    case Hexagon::V6_vgtw_128B: {
5595
      // op: dst
5596
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5597
0
      Value |= op & UINT64_C(3);
5598
      // op: src1
5599
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5600
0
      Value |= (op & UINT64_C(31)) << 8;
5601
      // op: src2
5602
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5603
0
      Value |= (op & UINT64_C(31)) << 16;
5604
0
      break;
5605
0
    }
5606
0
    case Hexagon::V6_vandvrt_acc:
5607
0
    case Hexagon::V6_vandvrt_acc_128B:
5608
0
    case Hexagon::V6_veqb_and:
5609
0
    case Hexagon::V6_veqb_and_128B:
5610
0
    case Hexagon::V6_veqb_or:
5611
0
    case Hexagon::V6_veqb_or_128B:
5612
0
    case Hexagon::V6_veqb_xor:
5613
0
    case Hexagon::V6_veqb_xor_128B:
5614
0
    case Hexagon::V6_veqh_and:
5615
0
    case Hexagon::V6_veqh_and_128B:
5616
0
    case Hexagon::V6_veqh_or:
5617
0
    case Hexagon::V6_veqh_or_128B:
5618
0
    case Hexagon::V6_veqh_xor:
5619
0
    case Hexagon::V6_veqh_xor_128B:
5620
0
    case Hexagon::V6_veqw_and:
5621
0
    case Hexagon::V6_veqw_and_128B:
5622
0
    case Hexagon::V6_veqw_or:
5623
0
    case Hexagon::V6_veqw_or_128B:
5624
0
    case Hexagon::V6_veqw_xor:
5625
0
    case Hexagon::V6_veqw_xor_128B:
5626
0
    case Hexagon::V6_vgtb_and:
5627
0
    case Hexagon::V6_vgtb_and_128B:
5628
0
    case Hexagon::V6_vgtb_or:
5629
0
    case Hexagon::V6_vgtb_or_128B:
5630
0
    case Hexagon::V6_vgtb_xor:
5631
0
    case Hexagon::V6_vgtb_xor_128B:
5632
0
    case Hexagon::V6_vgth_and:
5633
0
    case Hexagon::V6_vgth_and_128B:
5634
0
    case Hexagon::V6_vgth_or:
5635
0
    case Hexagon::V6_vgth_or_128B:
5636
0
    case Hexagon::V6_vgth_xor:
5637
0
    case Hexagon::V6_vgth_xor_128B:
5638
0
    case Hexagon::V6_vgtub_and:
5639
0
    case Hexagon::V6_vgtub_and_128B:
5640
0
    case Hexagon::V6_vgtub_or:
5641
0
    case Hexagon::V6_vgtub_or_128B:
5642
0
    case Hexagon::V6_vgtub_xor:
5643
0
    case Hexagon::V6_vgtub_xor_128B:
5644
0
    case Hexagon::V6_vgtuh_and:
5645
0
    case Hexagon::V6_vgtuh_and_128B:
5646
0
    case Hexagon::V6_vgtuh_or:
5647
0
    case Hexagon::V6_vgtuh_or_128B:
5648
0
    case Hexagon::V6_vgtuh_xor:
5649
0
    case Hexagon::V6_vgtuh_xor_128B:
5650
0
    case Hexagon::V6_vgtuw_and:
5651
0
    case Hexagon::V6_vgtuw_and_128B:
5652
0
    case Hexagon::V6_vgtuw_or:
5653
0
    case Hexagon::V6_vgtuw_or_128B:
5654
0
    case Hexagon::V6_vgtuw_xor:
5655
0
    case Hexagon::V6_vgtuw_xor_128B:
5656
0
    case Hexagon::V6_vgtw_and:
5657
0
    case Hexagon::V6_vgtw_and_128B:
5658
0
    case Hexagon::V6_vgtw_or:
5659
0
    case Hexagon::V6_vgtw_or_128B:
5660
0
    case Hexagon::V6_vgtw_xor:
5661
0
    case Hexagon::V6_vgtw_xor_128B: {
5662
      // op: dst
5663
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5664
0
      Value |= op & UINT64_C(3);
5665
      // op: src1
5666
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5667
0
      Value |= (op & UINT64_C(31)) << 8;
5668
      // op: src2
5669
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5670
0
      Value |= (op & UINT64_C(31)) << 16;
5671
0
      break;
5672
0
    }
5673
0
    case Hexagon::L2_loadalignb_pbr:
5674
0
    case Hexagon::L2_loadalignh_pbr:
5675
0
    case Hexagon::L2_loadbsw2_pbr:
5676
0
    case Hexagon::L2_loadbsw2_pcr:
5677
0
    case Hexagon::L2_loadbsw4_pbr:
5678
0
    case Hexagon::L2_loadbsw4_pcr:
5679
0
    case Hexagon::L2_loadbzw2_pbr:
5680
0
    case Hexagon::L2_loadbzw2_pcr:
5681
0
    case Hexagon::L2_loadbzw4_pbr:
5682
0
    case Hexagon::L2_loadbzw4_pcr:
5683
0
    case Hexagon::L2_loadrb_pbr:
5684
0
    case Hexagon::L2_loadrb_pcr:
5685
0
    case Hexagon::L2_loadrd_pbr:
5686
0
    case Hexagon::L2_loadrd_pcr:
5687
0
    case Hexagon::L2_loadrh_pbr:
5688
0
    case Hexagon::L2_loadrh_pcr:
5689
0
    case Hexagon::L2_loadri_pbr:
5690
0
    case Hexagon::L2_loadri_pcr:
5691
0
    case Hexagon::L2_loadrub_pbr:
5692
0
    case Hexagon::L2_loadrub_pcr:
5693
0
    case Hexagon::L2_loadruh_pbr:
5694
0
    case Hexagon::L2_loadruh_pcr: {
5695
      // op: dst
5696
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5697
0
      Value |= op & UINT64_C(31);
5698
      // op: Rz
5699
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5700
0
      Value |= (op & UINT64_C(31)) << 16;
5701
      // op: Mu
5702
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5703
0
      Value |= (op & UINT64_C(1)) << 13;
5704
0
      break;
5705
0
    }
5706
0
    case Hexagon::L2_loadrd_pci: {
5707
      // op: dst
5708
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5709
0
      Value |= op & UINT64_C(31);
5710
      // op: Rz
5711
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5712
0
      Value |= (op & UINT64_C(31)) << 16;
5713
      // op: Mu
5714
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5715
0
      Value |= (op & UINT64_C(1)) << 13;
5716
      // op: offset
5717
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5718
0
      Value |= (op & UINT64_C(120)) << 2;
5719
0
      break;
5720
0
    }
5721
0
    case Hexagon::L2_loadalignb_pci:
5722
0
    case Hexagon::L2_loadrb_pci:
5723
0
    case Hexagon::L2_loadrub_pci: {
5724
      // op: dst
5725
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5726
0
      Value |= op & UINT64_C(31);
5727
      // op: Rz
5728
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5729
0
      Value |= (op & UINT64_C(31)) << 16;
5730
      // op: Mu
5731
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5732
0
      Value |= (op & UINT64_C(1)) << 13;
5733
      // op: offset
5734
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5735
0
      Value |= (op & UINT64_C(15)) << 5;
5736
0
      break;
5737
0
    }
5738
0
    case Hexagon::L2_loadalignh_pci:
5739
0
    case Hexagon::L2_loadbsw2_pci:
5740
0
    case Hexagon::L2_loadbzw2_pci:
5741
0
    case Hexagon::L2_loadrh_pci:
5742
0
    case Hexagon::L2_loadruh_pci: {
5743
      // op: dst
5744
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5745
0
      Value |= op & UINT64_C(31);
5746
      // op: Rz
5747
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5748
0
      Value |= (op & UINT64_C(31)) << 16;
5749
      // op: Mu
5750
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5751
0
      Value |= (op & UINT64_C(1)) << 13;
5752
      // op: offset
5753
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5754
0
      Value |= (op & UINT64_C(30)) << 4;
5755
0
      break;
5756
0
    }
5757
0
    case Hexagon::L2_loadbsw4_pci:
5758
0
    case Hexagon::L2_loadbzw4_pci:
5759
0
    case Hexagon::L2_loadri_pci: {
5760
      // op: dst
5761
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5762
0
      Value |= op & UINT64_C(31);
5763
      // op: Rz
5764
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5765
0
      Value |= (op & UINT64_C(31)) << 16;
5766
      // op: Mu
5767
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5768
0
      Value |= (op & UINT64_C(1)) << 13;
5769
      // op: offset
5770
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5771
0
      Value |= (op & UINT64_C(60)) << 3;
5772
0
      break;
5773
0
    }
5774
0
    case Hexagon::L2_loadalignb_pcr:
5775
0
    case Hexagon::L2_loadalignh_pcr: {
5776
      // op: dst
5777
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5778
0
      Value |= op & UINT64_C(31);
5779
      // op: Rz
5780
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5781
0
      Value |= (op & UINT64_C(31)) << 16;
5782
      // op: Mu
5783
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
5784
0
      Value |= (op & UINT64_C(1)) << 13;
5785
0
      break;
5786
0
    }
5787
0
    case Hexagon::L2_loadrigp:
5788
0
    case Hexagon::L4_loadri_abs: {
5789
      // op: dst
5790
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5791
0
      Value |= op & UINT64_C(31);
5792
      // op: addr
5793
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5794
0
      Value |= (op & UINT64_C(196608)) << 9;
5795
0
      Value |= (op & UINT64_C(63488)) << 5;
5796
0
      Value |= (op & UINT64_C(2044)) << 3;
5797
0
      break;
5798
0
    }
5799
0
    case Hexagon::L2_loadrdgp:
5800
0
    case Hexagon::L4_loadrd_abs: {
5801
      // op: dst
5802
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5803
0
      Value |= op & UINT64_C(31);
5804
      // op: addr
5805
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5806
0
      Value |= (op & UINT64_C(393216)) << 8;
5807
0
      Value |= (op & UINT64_C(126976)) << 4;
5808
0
      Value |= (op & UINT64_C(4088)) << 2;
5809
0
      break;
5810
0
    }
5811
0
    case Hexagon::L2_loadrbgp:
5812
0
    case Hexagon::L2_loadrubgp:
5813
0
    case Hexagon::L4_loadrb_abs:
5814
0
    case Hexagon::L4_loadrub_abs: {
5815
      // op: dst
5816
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5817
0
      Value |= op & UINT64_C(31);
5818
      // op: addr
5819
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5820
0
      Value |= (op & UINT64_C(49152)) << 11;
5821
0
      Value |= (op & UINT64_C(15872)) << 7;
5822
0
      Value |= (op & UINT64_C(511)) << 5;
5823
0
      break;
5824
0
    }
5825
0
    case Hexagon::L2_loadrhgp:
5826
0
    case Hexagon::L2_loadruhgp:
5827
0
    case Hexagon::L4_loadrh_abs:
5828
0
    case Hexagon::L4_loadruh_abs: {
5829
      // op: dst
5830
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5831
0
      Value |= op & UINT64_C(31);
5832
      // op: addr
5833
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5834
0
      Value |= (op & UINT64_C(98304)) << 10;
5835
0
      Value |= (op & UINT64_C(31744)) << 6;
5836
0
      Value |= (op & UINT64_C(1022)) << 4;
5837
0
      break;
5838
0
    }
5839
0
    case Hexagon::A2_abs:
5840
0
    case Hexagon::A2_abssat:
5841
0
    case Hexagon::A2_negsat:
5842
0
    case Hexagon::A2_roundsat:
5843
0
    case Hexagon::A2_sat:
5844
0
    case Hexagon::A2_satb:
5845
0
    case Hexagon::A2_sath:
5846
0
    case Hexagon::A2_satub:
5847
0
    case Hexagon::A2_satuh:
5848
0
    case Hexagon::A2_swiz:
5849
0
    case Hexagon::A2_sxtw:
5850
14
    case Hexagon::A2_tfr:
5851
16
    case Hexagon::A2_tfrcrr:
5852
68
    case Hexagon::A2_tfrrcr:
5853
68
    case Hexagon::A4_tfrcpp:
5854
68
    case Hexagon::A4_tfrpcp:
5855
68
    case Hexagon::L2_loadw_locked:
5856
68
    case Hexagon::L4_loadd_locked:
5857
68
    case Hexagon::S2_brev:
5858
68
    case Hexagon::S2_svsathb:
5859
68
    case Hexagon::S2_svsathub:
5860
68
    case Hexagon::S2_vrndpackwh:
5861
68
    case Hexagon::S2_vrndpackwhs:
5862
68
    case Hexagon::S2_vsathb:
5863
68
    case Hexagon::S2_vsathub:
5864
68
    case Hexagon::S2_vsatwh:
5865
68
    case Hexagon::S2_vsatwuh:
5866
68
    case Hexagon::S2_vsplatrb:
5867
68
    case Hexagon::S2_vsplatrh:
5868
68
    case Hexagon::S2_vsxtbh:
5869
68
    case Hexagon::S2_vsxthw:
5870
68
    case Hexagon::S2_vtrunehb:
5871
68
    case Hexagon::S2_vtrunohb:
5872
68
    case Hexagon::S2_vzxtbh:
5873
68
    case Hexagon::S2_vzxthw: {
5874
      // op: dst
5875
68
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5876
68
      Value |= op & UINT64_C(31);
5877
      // op: src
5878
68
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5879
68
      Value |= (op & UINT64_C(31)) << 16;
5880
68
      break;
5881
68
    }
5882
0
    case Hexagon::A4_bitspliti:
5883
0
    case Hexagon::A4_cround_ri:
5884
0
    case Hexagon::A4_round_ri:
5885
0
    case Hexagon::A4_round_ri_sat:
5886
0
    case Hexagon::S2_asl_i_r:
5887
0
    case Hexagon::S2_asl_i_r_sat:
5888
0
    case Hexagon::S2_asr_i_r:
5889
0
    case Hexagon::S2_asr_i_r_rnd:
5890
0
    case Hexagon::S2_asr_i_svw_trun:
5891
0
    case Hexagon::S2_lsr_i_r: {
5892
      // op: dst
5893
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5894
0
      Value |= op & UINT64_C(31);
5895
      // op: src
5896
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5897
0
      Value |= (op & UINT64_C(31)) << 16;
5898
      // op: u5
5899
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5900
0
      Value |= (op & UINT64_C(31)) << 8;
5901
0
      break;
5902
0
    }
5903
0
    case Hexagon::F2_dfimm_n:
5904
0
    case Hexagon::F2_dfimm_p:
5905
0
    case Hexagon::F2_sfimm_n:
5906
0
    case Hexagon::F2_sfimm_p: {
5907
      // op: dst
5908
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5909
0
      Value |= op & UINT64_C(31);
5910
      // op: src
5911
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5912
0
      Value |= (op & UINT64_C(512)) << 12;
5913
0
      Value |= (op & UINT64_C(511)) << 5;
5914
0
      break;
5915
0
    }
5916
0
    case Hexagon::L2_ploadrhf_io:
5917
0
    case Hexagon::L2_ploadrhfnew_io:
5918
0
    case Hexagon::L2_ploadrht_io:
5919
0
    case Hexagon::L2_ploadrhtnew_io:
5920
0
    case Hexagon::L2_ploadruhf_io:
5921
0
    case Hexagon::L2_ploadruhfnew_io:
5922
0
    case Hexagon::L2_ploadruht_io:
5923
0
    case Hexagon::L2_ploadruhtnew_io: {
5924
      // op: dst
5925
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5926
0
      Value |= op & UINT64_C(31);
5927
      // op: src1
5928
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5929
0
      Value |= (op & UINT64_C(3)) << 11;
5930
      // op: src2
5931
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5932
0
      Value |= (op & UINT64_C(31)) << 16;
5933
      // op: offset
5934
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5935
0
      Value |= (op & UINT64_C(126)) << 4;
5936
0
      break;
5937
0
    }
5938
0
    case Hexagon::L2_ploadrif_io:
5939
0
    case Hexagon::L2_ploadrifnew_io:
5940
0
    case Hexagon::L2_ploadrit_io:
5941
0
    case Hexagon::L2_ploadritnew_io: {
5942
      // op: dst
5943
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5944
0
      Value |= op & UINT64_C(31);
5945
      // op: src1
5946
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5947
0
      Value |= (op & UINT64_C(3)) << 11;
5948
      // op: src2
5949
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5950
0
      Value |= (op & UINT64_C(31)) << 16;
5951
      // op: offset
5952
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5953
0
      Value |= (op & UINT64_C(252)) << 3;
5954
0
      break;
5955
0
    }
5956
0
    case Hexagon::L2_ploadrdf_io:
5957
0
    case Hexagon::L2_ploadrdfnew_io:
5958
0
    case Hexagon::L2_ploadrdt_io:
5959
0
    case Hexagon::L2_ploadrdtnew_io: {
5960
      // op: dst
5961
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5962
0
      Value |= op & UINT64_C(31);
5963
      // op: src1
5964
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5965
0
      Value |= (op & UINT64_C(3)) << 11;
5966
      // op: src2
5967
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5968
0
      Value |= (op & UINT64_C(31)) << 16;
5969
      // op: offset
5970
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5971
0
      Value |= (op & UINT64_C(504)) << 2;
5972
0
      break;
5973
0
    }
5974
0
    case Hexagon::L2_ploadrbf_io:
5975
0
    case Hexagon::L2_ploadrbfnew_io:
5976
0
    case Hexagon::L2_ploadrbt_io:
5977
0
    case Hexagon::L2_ploadrbtnew_io:
5978
0
    case Hexagon::L2_ploadrubf_io:
5979
0
    case Hexagon::L2_ploadrubfnew_io:
5980
0
    case Hexagon::L2_ploadrubt_io:
5981
0
    case Hexagon::L2_ploadrubtnew_io: {
5982
      // op: dst
5983
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
5984
0
      Value |= op & UINT64_C(31);
5985
      // op: src1
5986
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
5987
0
      Value |= (op & UINT64_C(3)) << 11;
5988
      // op: src2
5989
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
5990
0
      Value |= (op & UINT64_C(31)) << 16;
5991
      // op: offset
5992
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
5993
0
      Value |= (op & UINT64_C(63)) << 5;
5994
0
      break;
5995
0
    }
5996
0
    case Hexagon::A2_tfrf:
5997
0
    case Hexagon::A2_tfrfnew:
5998
0
    case Hexagon::A2_tfrt:
5999
0
    case Hexagon::A2_tfrtnew: {
6000
      // op: dst
6001
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6002
0
      Value |= op & UINT64_C(31);
6003
      // op: src1
6004
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6005
0
      Value |= (op & UINT64_C(3)) << 21;
6006
      // op: src2
6007
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6008
0
      Value |= (op & UINT64_C(31)) << 16;
6009
0
      break;
6010
0
    }
6011
0
    case Hexagon::L4_ploadrbf_rr:
6012
0
    case Hexagon::L4_ploadrbfnew_rr:
6013
0
    case Hexagon::L4_ploadrbt_rr:
6014
0
    case Hexagon::L4_ploadrbtnew_rr:
6015
0
    case Hexagon::L4_ploadrdf_rr:
6016
0
    case Hexagon::L4_ploadrdfnew_rr:
6017
0
    case Hexagon::L4_ploadrdt_rr:
6018
0
    case Hexagon::L4_ploadrdtnew_rr:
6019
0
    case Hexagon::L4_ploadrhf_rr:
6020
0
    case Hexagon::L4_ploadrhfnew_rr:
6021
0
    case Hexagon::L4_ploadrht_rr:
6022
0
    case Hexagon::L4_ploadrhtnew_rr:
6023
0
    case Hexagon::L4_ploadrif_rr:
6024
0
    case Hexagon::L4_ploadrifnew_rr:
6025
0
    case Hexagon::L4_ploadrit_rr:
6026
0
    case Hexagon::L4_ploadritnew_rr:
6027
0
    case Hexagon::L4_ploadrubf_rr:
6028
0
    case Hexagon::L4_ploadrubfnew_rr:
6029
0
    case Hexagon::L4_ploadrubt_rr:
6030
0
    case Hexagon::L4_ploadrubtnew_rr:
6031
0
    case Hexagon::L4_ploadruhf_rr:
6032
0
    case Hexagon::L4_ploadruhfnew_rr:
6033
0
    case Hexagon::L4_ploadruht_rr:
6034
0
    case Hexagon::L4_ploadruhtnew_rr: {
6035
      // op: dst
6036
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6037
0
      Value |= op & UINT64_C(31);
6038
      // op: src1
6039
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6040
0
      Value |= (op & UINT64_C(3)) << 5;
6041
      // op: src2
6042
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6043
0
      Value |= (op & UINT64_C(31)) << 16;
6044
      // op: src3
6045
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6046
0
      Value |= (op & UINT64_C(31)) << 8;
6047
      // op: u2
6048
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6049
0
      Value |= (op & UINT64_C(2)) << 12;
6050
0
      Value |= (op & UINT64_C(1)) << 7;
6051
0
      break;
6052
0
    }
6053
0
    case Hexagon::V6_vmux:
6054
0
    case Hexagon::V6_vmux_128B:
6055
0
    case Hexagon::V6_vswap:
6056
0
    case Hexagon::V6_vswap_128B: {
6057
      // op: dst
6058
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6059
0
      Value |= op & UINT64_C(31);
6060
      // op: src1
6061
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6062
0
      Value |= (op & UINT64_C(3)) << 5;
6063
      // op: src2
6064
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6065
0
      Value |= (op & UINT64_C(31)) << 8;
6066
      // op: src3
6067
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6068
0
      Value |= (op & UINT64_C(31)) << 16;
6069
0
      break;
6070
0
    }
6071
0
    case Hexagon::V6_vandqrt:
6072
0
    case Hexagon::V6_vandqrt_128B: {
6073
      // op: dst
6074
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6075
0
      Value |= op & UINT64_C(31);
6076
      // op: src1
6077
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6078
0
      Value |= (op & UINT64_C(3)) << 8;
6079
      // op: src2
6080
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6081
0
      Value |= (op & UINT64_C(31)) << 16;
6082
0
      break;
6083
0
    }
6084
0
    case Hexagon::L4_ploadrbf_abs:
6085
0
    case Hexagon::L4_ploadrbfnew_abs:
6086
0
    case Hexagon::L4_ploadrbt_abs:
6087
0
    case Hexagon::L4_ploadrbtnew_abs:
6088
0
    case Hexagon::L4_ploadrdf_abs:
6089
0
    case Hexagon::L4_ploadrdfnew_abs:
6090
0
    case Hexagon::L4_ploadrdt_abs:
6091
0
    case Hexagon::L4_ploadrdtnew_abs:
6092
0
    case Hexagon::L4_ploadrhf_abs:
6093
0
    case Hexagon::L4_ploadrhfnew_abs:
6094
0
    case Hexagon::L4_ploadrht_abs:
6095
0
    case Hexagon::L4_ploadrhtnew_abs:
6096
0
    case Hexagon::L4_ploadrif_abs:
6097
0
    case Hexagon::L4_ploadrifnew_abs:
6098
0
    case Hexagon::L4_ploadrit_abs:
6099
0
    case Hexagon::L4_ploadritnew_abs:
6100
0
    case Hexagon::L4_ploadrubf_abs:
6101
0
    case Hexagon::L4_ploadrubfnew_abs:
6102
0
    case Hexagon::L4_ploadrubt_abs:
6103
0
    case Hexagon::L4_ploadrubtnew_abs:
6104
0
    case Hexagon::L4_ploadruhf_abs:
6105
0
    case Hexagon::L4_ploadruhfnew_abs:
6106
0
    case Hexagon::L4_ploadruht_abs:
6107
0
    case Hexagon::L4_ploadruhtnew_abs: {
6108
      // op: dst
6109
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6110
0
      Value |= op & UINT64_C(31);
6111
      // op: src1
6112
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6113
0
      Value |= (op & UINT64_C(3)) << 9;
6114
      // op: absaddr
6115
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6116
0
      Value |= (op & UINT64_C(62)) << 15;
6117
0
      Value |= (op & UINT64_C(1)) << 8;
6118
0
      break;
6119
0
    }
6120
0
    case Hexagon::V6_lvsplatw:
6121
0
    case Hexagon::V6_lvsplatw_128B: {
6122
      // op: dst
6123
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6124
0
      Value |= op & UINT64_C(31);
6125
      // op: src1
6126
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6127
0
      Value |= (op & UINT64_C(31)) << 16;
6128
0
      break;
6129
0
    }
6130
0
    case Hexagon::L2_loadrd_io: {
6131
      // op: dst
6132
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6133
0
      Value |= op & UINT64_C(31);
6134
      // op: src1
6135
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6136
0
      Value |= (op & UINT64_C(31)) << 16;
6137
      // op: offset
6138
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6139
0
      Value |= (op & UINT64_C(12288)) << 13;
6140
0
      Value |= (op & UINT64_C(4088)) << 2;
6141
0
      break;
6142
0
    }
6143
0
    case Hexagon::L2_loadrb_io:
6144
0
    case Hexagon::L2_loadrub_io: {
6145
      // op: dst
6146
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6147
0
      Value |= op & UINT64_C(31);
6148
      // op: src1
6149
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6150
0
      Value |= (op & UINT64_C(31)) << 16;
6151
      // op: offset
6152
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6153
0
      Value |= (op & UINT64_C(1536)) << 16;
6154
0
      Value |= (op & UINT64_C(511)) << 5;
6155
0
      break;
6156
0
    }
6157
0
    case Hexagon::L2_loadbsw2_io:
6158
0
    case Hexagon::L2_loadbzw2_io:
6159
0
    case Hexagon::L2_loadrh_io:
6160
0
    case Hexagon::L2_loadruh_io: {
6161
      // op: dst
6162
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6163
0
      Value |= op & UINT64_C(31);
6164
      // op: src1
6165
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6166
0
      Value |= (op & UINT64_C(31)) << 16;
6167
      // op: offset
6168
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6169
0
      Value |= (op & UINT64_C(3072)) << 15;
6170
0
      Value |= (op & UINT64_C(1022)) << 4;
6171
0
      break;
6172
0
    }
6173
0
    case Hexagon::L2_loadbsw4_io:
6174
0
    case Hexagon::L2_loadbzw4_io:
6175
0
    case Hexagon::L2_loadri_io: {
6176
      // op: dst
6177
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6178
0
      Value |= op & UINT64_C(31);
6179
      // op: src1
6180
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6181
0
      Value |= (op & UINT64_C(31)) << 16;
6182
      // op: offset
6183
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6184
0
      Value |= (op & UINT64_C(6144)) << 14;
6185
0
      Value |= (op & UINT64_C(2044)) << 3;
6186
0
      break;
6187
0
    }
6188
0
    case Hexagon::V6_vL32Ub_ai_128B:
6189
0
    case Hexagon::V6_vL32b_ai_128B:
6190
0
    case Hexagon::V6_vL32b_cur_ai_128B:
6191
0
    case Hexagon::V6_vL32b_nt_ai_128B:
6192
0
    case Hexagon::V6_vL32b_nt_cur_ai_128B:
6193
0
    case Hexagon::V6_vL32b_nt_tmp_ai_128B:
6194
0
    case Hexagon::V6_vL32b_tmp_ai_128B: {
6195
      // op: dst
6196
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6197
0
      Value |= op & UINT64_C(31);
6198
      // op: src1
6199
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6200
0
      Value |= (op & UINT64_C(31)) << 16;
6201
      // op: src2
6202
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6203
0
      Value |= (op & UINT64_C(1024)) << 3;
6204
0
      Value |= (op & UINT64_C(896)) << 1;
6205
0
      break;
6206
0
    }
6207
0
    case Hexagon::L4_loadalignb_ur:
6208
0
    case Hexagon::L4_loadalignh_ur:
6209
0
    case Hexagon::L4_loadbsw2_ur:
6210
0
    case Hexagon::L4_loadbsw4_ur:
6211
0
    case Hexagon::L4_loadbzw2_ur:
6212
0
    case Hexagon::L4_loadbzw4_ur:
6213
0
    case Hexagon::L4_loadrb_ur:
6214
0
    case Hexagon::L4_loadrd_ur:
6215
0
    case Hexagon::L4_loadrh_ur:
6216
0
    case Hexagon::L4_loadri_ur:
6217
0
    case Hexagon::L4_loadrub_ur:
6218
0
    case Hexagon::L4_loadruh_ur: {
6219
      // op: dst
6220
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6221
0
      Value |= op & UINT64_C(31);
6222
      // op: src1
6223
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6224
0
      Value |= (op & UINT64_C(31)) << 16;
6225
      // op: src2
6226
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6227
0
      Value |= (op & UINT64_C(2)) << 12;
6228
0
      Value |= (op & UINT64_C(1)) << 7;
6229
      // op: src3
6230
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6231
0
      Value |= (op & UINT64_C(60)) << 6;
6232
0
      Value |= (op & UINT64_C(3)) << 5;
6233
0
      break;
6234
0
    }
6235
0
    case Hexagon::A4_cround_rr:
6236
0
    case Hexagon::A4_round_rr:
6237
0
    case Hexagon::A4_round_rr_sat:
6238
0
    case Hexagon::A5_vaddhubs:
6239
0
    case Hexagon::M2_cmpyrs_s0:
6240
0
    case Hexagon::M2_cmpyrs_s1:
6241
0
    case Hexagon::M2_cmpyrsc_s0:
6242
0
    case Hexagon::M2_cmpyrsc_s1:
6243
0
    case Hexagon::M2_dpmpyss_rnd_s0:
6244
0
    case Hexagon::M2_hmmpyh_rs1:
6245
0
    case Hexagon::M2_hmmpyh_s1:
6246
0
    case Hexagon::M2_hmmpyl_rs1:
6247
0
    case Hexagon::M2_hmmpyl_s1:
6248
0
    case Hexagon::M2_mpy_up:
6249
0
    case Hexagon::M2_mpy_up_s1:
6250
0
    case Hexagon::M2_mpy_up_s1_sat:
6251
0
    case Hexagon::M2_mpyi:
6252
0
    case Hexagon::M2_mpysu_up:
6253
0
    case Hexagon::M2_mpyu_up:
6254
0
    case Hexagon::M2_vdmpyrs_s0:
6255
0
    case Hexagon::M2_vdmpyrs_s1:
6256
0
    case Hexagon::M2_vmpy2s_s0pack:
6257
0
    case Hexagon::M2_vmpy2s_s1pack:
6258
0
    case Hexagon::M2_vraddh:
6259
0
    case Hexagon::M2_vradduh:
6260
0
    case Hexagon::M2_vrcmpys_s1rp_h:
6261
0
    case Hexagon::M2_vrcmpys_s1rp_l:
6262
0
    case Hexagon::S2_asl_r_p:
6263
0
    case Hexagon::S2_asl_r_r:
6264
0
    case Hexagon::S2_asl_r_r_sat:
6265
0
    case Hexagon::S2_asl_r_vh:
6266
0
    case Hexagon::S2_asl_r_vw:
6267
0
    case Hexagon::S2_asr_r_p:
6268
0
    case Hexagon::S2_asr_r_r:
6269
0
    case Hexagon::S2_asr_r_r_sat:
6270
0
    case Hexagon::S2_asr_r_vh:
6271
0
    case Hexagon::S2_asr_r_vw:
6272
0
    case Hexagon::S2_cabacdecbin:
6273
0
    case Hexagon::S2_extractup_rp:
6274
0
    case Hexagon::S2_lfsp:
6275
0
    case Hexagon::S2_lsl_r_p:
6276
0
    case Hexagon::S2_lsl_r_r:
6277
0
    case Hexagon::S2_lsl_r_vh:
6278
0
    case Hexagon::S2_lsl_r_vw:
6279
0
    case Hexagon::S2_lsr_r_p:
6280
0
    case Hexagon::S2_lsr_r_r:
6281
0
    case Hexagon::S2_lsr_r_vh:
6282
0
    case Hexagon::S2_lsr_r_vw:
6283
0
    case Hexagon::S2_shuffeb:
6284
0
    case Hexagon::S2_shuffeh:
6285
0
    case Hexagon::S2_vcnegh:
6286
0
    case Hexagon::S2_vcrotate:
6287
0
    case Hexagon::S2_vtrunewh:
6288
0
    case Hexagon::S2_vtrunowh:
6289
0
    case Hexagon::S4_extractp_rp:
6290
0
    case Hexagon::S4_vxaddsubh:
6291
0
    case Hexagon::S4_vxaddsubhr:
6292
0
    case Hexagon::S4_vxaddsubw:
6293
0
    case Hexagon::S4_vxsubaddh:
6294
0
    case Hexagon::S4_vxsubaddhr:
6295
0
    case Hexagon::S4_vxsubaddw:
6296
0
    case Hexagon::S6_rol_i_r: {
6297
      // op: dst
6298
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6299
0
      Value |= op & UINT64_C(31);
6300
      // op: src1
6301
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6302
0
      Value |= (op & UINT64_C(31)) << 16;
6303
      // op: src2
6304
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6305
0
      Value |= (op & UINT64_C(31)) << 8;
6306
0
      break;
6307
0
    }
6308
0
    case Hexagon::S2_extractu:
6309
0
    case Hexagon::S4_extract: {
6310
      // op: dst
6311
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6312
0
      Value |= op & UINT64_C(31);
6313
      // op: src1
6314
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6315
0
      Value |= (op & UINT64_C(31)) << 16;
6316
      // op: src2
6317
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6318
0
      Value |= (op & UINT64_C(31)) << 8;
6319
      // op: src3
6320
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6321
0
      Value |= (op & UINT64_C(24)) << 18;
6322
0
      Value |= (op & UINT64_C(7)) << 5;
6323
0
      break;
6324
0
    }
6325
0
    case Hexagon::S2_cabacencbin: {
6326
      // op: dst
6327
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6328
0
      Value |= op & UINT64_C(31);
6329
      // op: src1
6330
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6331
0
      Value |= (op & UINT64_C(31)) << 16;
6332
      // op: src2
6333
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6334
0
      Value |= (op & UINT64_C(31)) << 8;
6335
      // op: src3
6336
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6337
0
      Value |= (op & UINT64_C(3)) << 5;
6338
0
      break;
6339
0
    }
6340
0
    case Hexagon::L4_loadrb_rr:
6341
0
    case Hexagon::L4_loadrd_rr:
6342
0
    case Hexagon::L4_loadrh_rr:
6343
0
    case Hexagon::L4_loadri_rr:
6344
0
    case Hexagon::L4_loadrub_rr:
6345
0
    case Hexagon::L4_loadruh_rr: {
6346
      // op: dst
6347
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6348
0
      Value |= op & UINT64_C(31);
6349
      // op: src1
6350
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6351
0
      Value |= (op & UINT64_C(31)) << 16;
6352
      // op: src2
6353
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6354
0
      Value |= (op & UINT64_C(31)) << 8;
6355
      // op: u2
6356
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6357
0
      Value |= (op & UINT64_C(2)) << 12;
6358
0
      Value |= (op & UINT64_C(1)) << 7;
6359
0
      break;
6360
0
    }
6361
0
    case Hexagon::V6_vL32Ub_ai:
6362
0
    case Hexagon::V6_vL32b_ai:
6363
0
    case Hexagon::V6_vL32b_cur_ai:
6364
0
    case Hexagon::V6_vL32b_nt_ai:
6365
0
    case Hexagon::V6_vL32b_nt_cur_ai:
6366
0
    case Hexagon::V6_vL32b_nt_tmp_ai:
6367
0
    case Hexagon::V6_vL32b_tmp_ai: {
6368
      // op: dst
6369
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6370
0
      Value |= op & UINT64_C(31);
6371
      // op: src1
6372
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6373
0
      Value |= (op & UINT64_C(31)) << 16;
6374
      // op: src2
6375
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6376
0
      Value |= (op & UINT64_C(512)) << 4;
6377
0
      Value |= (op & UINT64_C(448)) << 2;
6378
0
      break;
6379
0
    }
6380
0
    case Hexagon::S6_rol_i_p: {
6381
      // op: dst
6382
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6383
0
      Value |= op & UINT64_C(31);
6384
      // op: src1
6385
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6386
0
      Value |= (op & UINT64_C(31)) << 16;
6387
      // op: src2
6388
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6389
0
      Value |= (op & UINT64_C(63)) << 8;
6390
0
      break;
6391
0
    }
6392
0
    case Hexagon::S2_extractup:
6393
0
    case Hexagon::S4_extractp: {
6394
      // op: dst
6395
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6396
0
      Value |= op & UINT64_C(31);
6397
      // op: src1
6398
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6399
0
      Value |= (op & UINT64_C(31)) << 16;
6400
      // op: src2
6401
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6402
0
      Value |= (op & UINT64_C(63)) << 8;
6403
      // op: src3
6404
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6405
0
      Value |= (op & UINT64_C(56)) << 18;
6406
0
      Value |= (op & UINT64_C(7)) << 5;
6407
0
      break;
6408
0
    }
6409
0
    case Hexagon::V6_vabsh:
6410
0
    case Hexagon::V6_vabsh_128B:
6411
0
    case Hexagon::V6_vabsh_sat:
6412
0
    case Hexagon::V6_vabsh_sat_128B:
6413
0
    case Hexagon::V6_vabsw:
6414
0
    case Hexagon::V6_vabsw_128B:
6415
0
    case Hexagon::V6_vabsw_sat:
6416
0
    case Hexagon::V6_vabsw_sat_128B:
6417
6
    case Hexagon::V6_vassign:
6418
6
    case Hexagon::V6_vassign_128B:
6419
6
    case Hexagon::V6_vcl0h:
6420
6
    case Hexagon::V6_vcl0h_128B:
6421
6
    case Hexagon::V6_vcl0w:
6422
6
    case Hexagon::V6_vcl0w_128B:
6423
6
    case Hexagon::V6_vdealb:
6424
6
    case Hexagon::V6_vdealb_128B:
6425
6
    case Hexagon::V6_vdealh:
6426
6
    case Hexagon::V6_vdealh_128B:
6427
6
    case Hexagon::V6_vnormamth:
6428
6
    case Hexagon::V6_vnormamth_128B:
6429
6
    case Hexagon::V6_vnormamtw:
6430
6
    case Hexagon::V6_vnormamtw_128B:
6431
6
    case Hexagon::V6_vnot:
6432
6
    case Hexagon::V6_vnot_128B:
6433
6
    case Hexagon::V6_vpopcounth:
6434
6
    case Hexagon::V6_vpopcounth_128B:
6435
6
    case Hexagon::V6_vsb:
6436
6
    case Hexagon::V6_vsb_128B:
6437
6
    case Hexagon::V6_vsh:
6438
6
    case Hexagon::V6_vsh_128B:
6439
6
    case Hexagon::V6_vshuffb:
6440
6
    case Hexagon::V6_vshuffb_128B:
6441
6
    case Hexagon::V6_vshuffh:
6442
6
    case Hexagon::V6_vshuffh_128B:
6443
6
    case Hexagon::V6_vunpackb:
6444
6
    case Hexagon::V6_vunpackb_128B:
6445
6
    case Hexagon::V6_vunpackh:
6446
6
    case Hexagon::V6_vunpackh_128B:
6447
6
    case Hexagon::V6_vunpackub:
6448
6
    case Hexagon::V6_vunpackub_128B:
6449
6
    case Hexagon::V6_vunpackuh:
6450
6
    case Hexagon::V6_vunpackuh_128B:
6451
6
    case Hexagon::V6_vzb:
6452
6
    case Hexagon::V6_vzb_128B:
6453
6
    case Hexagon::V6_vzh:
6454
6
    case Hexagon::V6_vzh_128B: {
6455
      // op: dst
6456
6
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6457
6
      Value |= op & UINT64_C(31);
6458
      // op: src1
6459
6
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6460
6
      Value |= (op & UINT64_C(31)) << 8;
6461
6
      break;
6462
6
    }
6463
0
    case Hexagon::S2_shuffob:
6464
0
    case Hexagon::S2_shuffoh:
6465
0
    case Hexagon::V6_extractw:
6466
0
    case Hexagon::V6_extractw_128B:
6467
0
    case Hexagon::V6_vabsdiffh:
6468
0
    case Hexagon::V6_vabsdiffh_128B:
6469
0
    case Hexagon::V6_vabsdiffub:
6470
0
    case Hexagon::V6_vabsdiffub_128B:
6471
0
    case Hexagon::V6_vabsdiffuh:
6472
0
    case Hexagon::V6_vabsdiffuh_128B:
6473
0
    case Hexagon::V6_vabsdiffw:
6474
0
    case Hexagon::V6_vabsdiffw_128B:
6475
0
    case Hexagon::V6_vaddb:
6476
0
    case Hexagon::V6_vaddb_128B:
6477
0
    case Hexagon::V6_vaddb_dv:
6478
0
    case Hexagon::V6_vaddb_dv_128B:
6479
0
    case Hexagon::V6_vaddh:
6480
0
    case Hexagon::V6_vaddh_128B:
6481
0
    case Hexagon::V6_vaddh_dv:
6482
0
    case Hexagon::V6_vaddh_dv_128B:
6483
0
    case Hexagon::V6_vaddhsat:
6484
0
    case Hexagon::V6_vaddhsat_128B:
6485
0
    case Hexagon::V6_vaddhsat_dv:
6486
0
    case Hexagon::V6_vaddhsat_dv_128B:
6487
0
    case Hexagon::V6_vaddhw:
6488
0
    case Hexagon::V6_vaddhw_128B:
6489
0
    case Hexagon::V6_vaddubh:
6490
0
    case Hexagon::V6_vaddubh_128B:
6491
0
    case Hexagon::V6_vaddubsat:
6492
0
    case Hexagon::V6_vaddubsat_128B:
6493
0
    case Hexagon::V6_vaddubsat_dv:
6494
0
    case Hexagon::V6_vaddubsat_dv_128B:
6495
0
    case Hexagon::V6_vadduhsat:
6496
0
    case Hexagon::V6_vadduhsat_128B:
6497
0
    case Hexagon::V6_vadduhsat_dv:
6498
0
    case Hexagon::V6_vadduhsat_dv_128B:
6499
0
    case Hexagon::V6_vadduhw:
6500
0
    case Hexagon::V6_vadduhw_128B:
6501
0
    case Hexagon::V6_vaddw:
6502
0
    case Hexagon::V6_vaddw_128B:
6503
0
    case Hexagon::V6_vaddw_dv:
6504
0
    case Hexagon::V6_vaddw_dv_128B:
6505
0
    case Hexagon::V6_vaddwsat:
6506
0
    case Hexagon::V6_vaddwsat_128B:
6507
0
    case Hexagon::V6_vaddwsat_dv:
6508
0
    case Hexagon::V6_vaddwsat_dv_128B:
6509
0
    case Hexagon::V6_vand:
6510
0
    case Hexagon::V6_vand_128B:
6511
0
    case Hexagon::V6_vaslh:
6512
0
    case Hexagon::V6_vaslh_128B:
6513
0
    case Hexagon::V6_vaslhv:
6514
0
    case Hexagon::V6_vaslhv_128B:
6515
0
    case Hexagon::V6_vaslw:
6516
0
    case Hexagon::V6_vaslw_128B:
6517
0
    case Hexagon::V6_vaslwv:
6518
0
    case Hexagon::V6_vaslwv_128B:
6519
0
    case Hexagon::V6_vasrh:
6520
0
    case Hexagon::V6_vasrh_128B:
6521
0
    case Hexagon::V6_vasrhv:
6522
0
    case Hexagon::V6_vasrhv_128B:
6523
0
    case Hexagon::V6_vasrw:
6524
0
    case Hexagon::V6_vasrw_128B:
6525
0
    case Hexagon::V6_vasrwv:
6526
0
    case Hexagon::V6_vasrwv_128B:
6527
0
    case Hexagon::V6_vavgh:
6528
0
    case Hexagon::V6_vavgh_128B:
6529
0
    case Hexagon::V6_vavghrnd:
6530
0
    case Hexagon::V6_vavghrnd_128B:
6531
0
    case Hexagon::V6_vavgub:
6532
0
    case Hexagon::V6_vavgub_128B:
6533
0
    case Hexagon::V6_vavgubrnd:
6534
0
    case Hexagon::V6_vavgubrnd_128B:
6535
0
    case Hexagon::V6_vavguh:
6536
0
    case Hexagon::V6_vavguh_128B:
6537
0
    case Hexagon::V6_vavguhrnd:
6538
0
    case Hexagon::V6_vavguhrnd_128B:
6539
0
    case Hexagon::V6_vavgw:
6540
0
    case Hexagon::V6_vavgw_128B:
6541
0
    case Hexagon::V6_vavgwrnd:
6542
0
    case Hexagon::V6_vavgwrnd_128B:
6543
0
    case Hexagon::V6_vcombine:
6544
0
    case Hexagon::V6_vcombine_128B:
6545
0
    case Hexagon::V6_vdealb4w:
6546
0
    case Hexagon::V6_vdealb4w_128B:
6547
0
    case Hexagon::V6_vdelta:
6548
0
    case Hexagon::V6_vdelta_128B:
6549
0
    case Hexagon::V6_vdmpybus:
6550
0
    case Hexagon::V6_vdmpybus_128B:
6551
0
    case Hexagon::V6_vdmpybus_dv:
6552
0
    case Hexagon::V6_vdmpybus_dv_128B:
6553
0
    case Hexagon::V6_vdmpyhb:
6554
0
    case Hexagon::V6_vdmpyhb_128B:
6555
0
    case Hexagon::V6_vdmpyhb_dv:
6556
0
    case Hexagon::V6_vdmpyhb_dv_128B:
6557
0
    case Hexagon::V6_vdmpyhisat:
6558
0
    case Hexagon::V6_vdmpyhisat_128B:
6559
0
    case Hexagon::V6_vdmpyhsat:
6560
0
    case Hexagon::V6_vdmpyhsat_128B:
6561
0
    case Hexagon::V6_vdmpyhsuisat:
6562
0
    case Hexagon::V6_vdmpyhsuisat_128B:
6563
0
    case Hexagon::V6_vdmpyhsusat:
6564
0
    case Hexagon::V6_vdmpyhsusat_128B:
6565
0
    case Hexagon::V6_vdmpyhvsat:
6566
0
    case Hexagon::V6_vdmpyhvsat_128B:
6567
0
    case Hexagon::V6_vdsaduh:
6568
0
    case Hexagon::V6_vdsaduh_128B:
6569
0
    case Hexagon::V6_vlsrh:
6570
0
    case Hexagon::V6_vlsrh_128B:
6571
0
    case Hexagon::V6_vlsrhv:
6572
0
    case Hexagon::V6_vlsrhv_128B:
6573
0
    case Hexagon::V6_vlsrw:
6574
0
    case Hexagon::V6_vlsrw_128B:
6575
0
    case Hexagon::V6_vlsrwv:
6576
0
    case Hexagon::V6_vlsrwv_128B:
6577
0
    case Hexagon::V6_vmaxh:
6578
0
    case Hexagon::V6_vmaxh_128B:
6579
0
    case Hexagon::V6_vmaxub:
6580
0
    case Hexagon::V6_vmaxub_128B:
6581
0
    case Hexagon::V6_vmaxuh:
6582
0
    case Hexagon::V6_vmaxuh_128B:
6583
0
    case Hexagon::V6_vmaxw:
6584
0
    case Hexagon::V6_vmaxw_128B:
6585
0
    case Hexagon::V6_vminh:
6586
0
    case Hexagon::V6_vminh_128B:
6587
0
    case Hexagon::V6_vminub:
6588
0
    case Hexagon::V6_vminub_128B:
6589
0
    case Hexagon::V6_vminuh:
6590
0
    case Hexagon::V6_vminuh_128B:
6591
0
    case Hexagon::V6_vminw:
6592
0
    case Hexagon::V6_vminw_128B:
6593
0
    case Hexagon::V6_vmpabus:
6594
0
    case Hexagon::V6_vmpabus_128B:
6595
0
    case Hexagon::V6_vmpabusv:
6596
0
    case Hexagon::V6_vmpabusv_128B:
6597
0
    case Hexagon::V6_vmpabuuv:
6598
0
    case Hexagon::V6_vmpabuuv_128B:
6599
0
    case Hexagon::V6_vmpahb:
6600
0
    case Hexagon::V6_vmpahb_128B:
6601
0
    case Hexagon::V6_vmpybus:
6602
0
    case Hexagon::V6_vmpybus_128B:
6603
0
    case Hexagon::V6_vmpybusv:
6604
0
    case Hexagon::V6_vmpybusv_128B:
6605
0
    case Hexagon::V6_vmpybv:
6606
0
    case Hexagon::V6_vmpybv_128B:
6607
0
    case Hexagon::V6_vmpyewuh:
6608
0
    case Hexagon::V6_vmpyewuh_128B:
6609
0
    case Hexagon::V6_vmpyh:
6610
0
    case Hexagon::V6_vmpyh_128B:
6611
0
    case Hexagon::V6_vmpyhsrs:
6612
0
    case Hexagon::V6_vmpyhsrs_128B:
6613
0
    case Hexagon::V6_vmpyhss:
6614
0
    case Hexagon::V6_vmpyhss_128B:
6615
0
    case Hexagon::V6_vmpyhus:
6616
0
    case Hexagon::V6_vmpyhus_128B:
6617
0
    case Hexagon::V6_vmpyhv:
6618
0
    case Hexagon::V6_vmpyhv_128B:
6619
0
    case Hexagon::V6_vmpyhvsrs:
6620
0
    case Hexagon::V6_vmpyhvsrs_128B:
6621
0
    case Hexagon::V6_vmpyieoh:
6622
0
    case Hexagon::V6_vmpyieoh_128B:
6623
0
    case Hexagon::V6_vmpyiewuh:
6624
0
    case Hexagon::V6_vmpyiewuh_128B:
6625
0
    case Hexagon::V6_vmpyih:
6626
0
    case Hexagon::V6_vmpyih_128B:
6627
0
    case Hexagon::V6_vmpyihb:
6628
0
    case Hexagon::V6_vmpyihb_128B:
6629
0
    case Hexagon::V6_vmpyiowh:
6630
0
    case Hexagon::V6_vmpyiowh_128B:
6631
0
    case Hexagon::V6_vmpyiwb:
6632
0
    case Hexagon::V6_vmpyiwb_128B:
6633
0
    case Hexagon::V6_vmpyiwh:
6634
0
    case Hexagon::V6_vmpyiwh_128B:
6635
0
    case Hexagon::V6_vmpyowh:
6636
0
    case Hexagon::V6_vmpyowh_128B:
6637
0
    case Hexagon::V6_vmpyowh_rnd:
6638
0
    case Hexagon::V6_vmpyowh_rnd_128B:
6639
0
    case Hexagon::V6_vmpyub:
6640
0
    case Hexagon::V6_vmpyub_128B:
6641
0
    case Hexagon::V6_vmpyubv:
6642
0
    case Hexagon::V6_vmpyubv_128B:
6643
0
    case Hexagon::V6_vmpyuh:
6644
0
    case Hexagon::V6_vmpyuh_128B:
6645
0
    case Hexagon::V6_vmpyuhv:
6646
0
    case Hexagon::V6_vmpyuhv_128B:
6647
0
    case Hexagon::V6_vnavgh:
6648
0
    case Hexagon::V6_vnavgh_128B:
6649
0
    case Hexagon::V6_vnavgub:
6650
0
    case Hexagon::V6_vnavgub_128B:
6651
0
    case Hexagon::V6_vnavgw:
6652
0
    case Hexagon::V6_vnavgw_128B:
6653
0
    case Hexagon::V6_vor:
6654
0
    case Hexagon::V6_vor_128B:
6655
0
    case Hexagon::V6_vpackeb:
6656
0
    case Hexagon::V6_vpackeb_128B:
6657
0
    case Hexagon::V6_vpackeh:
6658
0
    case Hexagon::V6_vpackeh_128B:
6659
0
    case Hexagon::V6_vpackhb_sat:
6660
0
    case Hexagon::V6_vpackhb_sat_128B:
6661
0
    case Hexagon::V6_vpackhub_sat:
6662
0
    case Hexagon::V6_vpackhub_sat_128B:
6663
0
    case Hexagon::V6_vpackob:
6664
0
    case Hexagon::V6_vpackob_128B:
6665
0
    case Hexagon::V6_vpackoh:
6666
0
    case Hexagon::V6_vpackoh_128B:
6667
0
    case Hexagon::V6_vpackwh_sat:
6668
0
    case Hexagon::V6_vpackwh_sat_128B:
6669
0
    case Hexagon::V6_vpackwuh_sat:
6670
0
    case Hexagon::V6_vpackwuh_sat_128B:
6671
0
    case Hexagon::V6_vrdelta:
6672
0
    case Hexagon::V6_vrdelta_128B:
6673
0
    case Hexagon::V6_vrmpybus:
6674
0
    case Hexagon::V6_vrmpybus_128B:
6675
0
    case Hexagon::V6_vrmpybusv:
6676
0
    case Hexagon::V6_vrmpybusv_128B:
6677
0
    case Hexagon::V6_vrmpybv:
6678
0
    case Hexagon::V6_vrmpybv_128B:
6679
0
    case Hexagon::V6_vrmpyub:
6680
0
    case Hexagon::V6_vrmpyub_128B:
6681
0
    case Hexagon::V6_vrmpyubv:
6682
0
    case Hexagon::V6_vrmpyubv_128B:
6683
0
    case Hexagon::V6_vror:
6684
0
    case Hexagon::V6_vror_128B:
6685
0
    case Hexagon::V6_vroundhb:
6686
0
    case Hexagon::V6_vroundhb_128B:
6687
0
    case Hexagon::V6_vroundhub:
6688
0
    case Hexagon::V6_vroundhub_128B:
6689
0
    case Hexagon::V6_vroundwh:
6690
0
    case Hexagon::V6_vroundwh_128B:
6691
0
    case Hexagon::V6_vroundwuh:
6692
0
    case Hexagon::V6_vroundwuh_128B:
6693
0
    case Hexagon::V6_vsathub:
6694
0
    case Hexagon::V6_vsathub_128B:
6695
0
    case Hexagon::V6_vsatwh:
6696
0
    case Hexagon::V6_vsatwh_128B:
6697
0
    case Hexagon::V6_vshufeh:
6698
0
    case Hexagon::V6_vshufeh_128B:
6699
0
    case Hexagon::V6_vshuffeb:
6700
0
    case Hexagon::V6_vshuffeb_128B:
6701
0
    case Hexagon::V6_vshuffob:
6702
0
    case Hexagon::V6_vshuffob_128B:
6703
0
    case Hexagon::V6_vshufoeb:
6704
0
    case Hexagon::V6_vshufoeb_128B:
6705
0
    case Hexagon::V6_vshufoeh:
6706
0
    case Hexagon::V6_vshufoeh_128B:
6707
0
    case Hexagon::V6_vshufoh:
6708
0
    case Hexagon::V6_vshufoh_128B:
6709
0
    case Hexagon::V6_vsubb:
6710
0
    case Hexagon::V6_vsubb_128B:
6711
0
    case Hexagon::V6_vsubb_dv:
6712
0
    case Hexagon::V6_vsubb_dv_128B:
6713
0
    case Hexagon::V6_vsubh:
6714
0
    case Hexagon::V6_vsubh_128B:
6715
0
    case Hexagon::V6_vsubh_dv:
6716
0
    case Hexagon::V6_vsubh_dv_128B:
6717
0
    case Hexagon::V6_vsubhsat:
6718
0
    case Hexagon::V6_vsubhsat_128B:
6719
0
    case Hexagon::V6_vsubhsat_dv:
6720
0
    case Hexagon::V6_vsubhsat_dv_128B:
6721
0
    case Hexagon::V6_vsubhw:
6722
0
    case Hexagon::V6_vsubhw_128B:
6723
0
    case Hexagon::V6_vsububh:
6724
0
    case Hexagon::V6_vsububh_128B:
6725
0
    case Hexagon::V6_vsububsat:
6726
0
    case Hexagon::V6_vsububsat_128B:
6727
0
    case Hexagon::V6_vsububsat_dv:
6728
0
    case Hexagon::V6_vsububsat_dv_128B:
6729
0
    case Hexagon::V6_vsubuhsat:
6730
0
    case Hexagon::V6_vsubuhsat_128B:
6731
0
    case Hexagon::V6_vsubuhsat_dv:
6732
0
    case Hexagon::V6_vsubuhsat_dv_128B:
6733
0
    case Hexagon::V6_vsubuhw:
6734
0
    case Hexagon::V6_vsubuhw_128B:
6735
0
    case Hexagon::V6_vsubw:
6736
0
    case Hexagon::V6_vsubw_128B:
6737
0
    case Hexagon::V6_vsubw_dv:
6738
0
    case Hexagon::V6_vsubw_dv_128B:
6739
0
    case Hexagon::V6_vsubwsat:
6740
0
    case Hexagon::V6_vsubwsat_128B:
6741
0
    case Hexagon::V6_vsubwsat_dv:
6742
0
    case Hexagon::V6_vsubwsat_dv_128B:
6743
0
    case Hexagon::V6_vtmpyb:
6744
0
    case Hexagon::V6_vtmpyb_128B:
6745
0
    case Hexagon::V6_vtmpybus:
6746
0
    case Hexagon::V6_vtmpybus_128B:
6747
0
    case Hexagon::V6_vtmpyhb:
6748
0
    case Hexagon::V6_vtmpyhb_128B:
6749
0
    case Hexagon::V6_vxor:
6750
0
    case Hexagon::V6_vxor_128B: {
6751
      // op: dst
6752
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6753
0
      Value |= op & UINT64_C(31);
6754
      // op: src1
6755
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6756
0
      Value |= (op & UINT64_C(31)) << 8;
6757
      // op: src2
6758
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6759
0
      Value |= (op & UINT64_C(31)) << 16;
6760
0
      break;
6761
0
    }
6762
0
    case Hexagon::V6_vrmpybusi:
6763
0
    case Hexagon::V6_vrmpybusi_128B:
6764
0
    case Hexagon::V6_vrmpyubi:
6765
0
    case Hexagon::V6_vrmpyubi_128B:
6766
0
    case Hexagon::V6_vrsadubi:
6767
0
    case Hexagon::V6_vrsadubi_128B: {
6768
      // op: dst
6769
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6770
0
      Value |= op & UINT64_C(31);
6771
      // op: src1
6772
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6773
0
      Value |= (op & UINT64_C(31)) << 8;
6774
      // op: src2
6775
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6776
0
      Value |= (op & UINT64_C(31)) << 16;
6777
      // op: src3
6778
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6779
0
      Value |= (op & UINT64_C(1)) << 5;
6780
0
      break;
6781
0
    }
6782
0
    case Hexagon::V6_valignbi:
6783
0
    case Hexagon::V6_valignbi_128B:
6784
0
    case Hexagon::V6_vlalignbi:
6785
0
    case Hexagon::V6_vlalignbi_128B: {
6786
      // op: dst
6787
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6788
0
      Value |= op & UINT64_C(31);
6789
      // op: src1
6790
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6791
0
      Value |= (op & UINT64_C(31)) << 8;
6792
      // op: src2
6793
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6794
0
      Value |= (op & UINT64_C(31)) << 16;
6795
      // op: src3
6796
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6797
0
      Value |= (op & UINT64_C(7)) << 5;
6798
0
      break;
6799
0
    }
6800
0
    case Hexagon::V6_valignb:
6801
0
    case Hexagon::V6_valignb_128B:
6802
0
    case Hexagon::V6_vasrhbrndsat:
6803
0
    case Hexagon::V6_vasrhbrndsat_128B:
6804
0
    case Hexagon::V6_vasrhubrndsat:
6805
0
    case Hexagon::V6_vasrhubrndsat_128B:
6806
0
    case Hexagon::V6_vasrhubsat:
6807
0
    case Hexagon::V6_vasrhubsat_128B:
6808
0
    case Hexagon::V6_vasrwh:
6809
0
    case Hexagon::V6_vasrwh_128B:
6810
0
    case Hexagon::V6_vasrwhrndsat:
6811
0
    case Hexagon::V6_vasrwhrndsat_128B:
6812
0
    case Hexagon::V6_vasrwhsat:
6813
0
    case Hexagon::V6_vasrwhsat_128B:
6814
0
    case Hexagon::V6_vasrwuhsat:
6815
0
    case Hexagon::V6_vasrwuhsat_128B:
6816
0
    case Hexagon::V6_vdealvdd:
6817
0
    case Hexagon::V6_vdealvdd_128B:
6818
0
    case Hexagon::V6_vlalignb:
6819
0
    case Hexagon::V6_vlalignb_128B:
6820
0
    case Hexagon::V6_vlutvvb:
6821
0
    case Hexagon::V6_vlutvvb_128B:
6822
0
    case Hexagon::V6_vlutvwh:
6823
0
    case Hexagon::V6_vlutvwh_128B:
6824
0
    case Hexagon::V6_vshuffvdd:
6825
0
    case Hexagon::V6_vshuffvdd_128B: {
6826
      // op: dst
6827
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6828
0
      Value |= op & UINT64_C(31);
6829
      // op: src1
6830
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
6831
0
      Value |= (op & UINT64_C(31)) << 8;
6832
      // op: src2
6833
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6834
0
      Value |= (op & UINT64_C(31)) << 19;
6835
      // op: src3
6836
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6837
0
      Value |= (op & UINT64_C(7)) << 16;
6838
0
      break;
6839
0
    }
6840
0
    case Hexagon::V6_vandqrt_acc:
6841
0
    case Hexagon::V6_vandqrt_acc_128B: {
6842
      // op: dst
6843
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6844
0
      Value |= op & UINT64_C(31);
6845
      // op: src1
6846
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6847
0
      Value |= (op & UINT64_C(3)) << 8;
6848
      // op: src2
6849
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6850
0
      Value |= (op & UINT64_C(31)) << 16;
6851
0
      break;
6852
0
    }
6853
0
    case Hexagon::L2_ploadrdf_pi:
6854
0
    case Hexagon::L2_ploadrdfnew_pi:
6855
0
    case Hexagon::L2_ploadrdt_pi:
6856
0
    case Hexagon::L2_ploadrdtnew_pi: {
6857
      // op: dst
6858
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6859
0
      Value |= op & UINT64_C(31);
6860
      // op: src1
6861
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6862
0
      Value |= (op & UINT64_C(3)) << 9;
6863
      // op: src2
6864
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6865
0
      Value |= (op & UINT64_C(31)) << 16;
6866
      // op: offset
6867
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6868
0
      Value |= (op & UINT64_C(120)) << 2;
6869
0
      break;
6870
0
    }
6871
0
    case Hexagon::L2_ploadrbf_pi:
6872
0
    case Hexagon::L2_ploadrbfnew_pi:
6873
0
    case Hexagon::L2_ploadrbt_pi:
6874
0
    case Hexagon::L2_ploadrbtnew_pi:
6875
0
    case Hexagon::L2_ploadrubf_pi:
6876
0
    case Hexagon::L2_ploadrubfnew_pi:
6877
0
    case Hexagon::L2_ploadrubt_pi:
6878
0
    case Hexagon::L2_ploadrubtnew_pi: {
6879
      // op: dst
6880
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6881
0
      Value |= op & UINT64_C(31);
6882
      // op: src1
6883
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6884
0
      Value |= (op & UINT64_C(3)) << 9;
6885
      // op: src2
6886
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6887
0
      Value |= (op & UINT64_C(31)) << 16;
6888
      // op: offset
6889
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6890
0
      Value |= (op & UINT64_C(15)) << 5;
6891
0
      break;
6892
0
    }
6893
0
    case Hexagon::L2_ploadrhf_pi:
6894
0
    case Hexagon::L2_ploadrhfnew_pi:
6895
0
    case Hexagon::L2_ploadrht_pi:
6896
0
    case Hexagon::L2_ploadrhtnew_pi:
6897
0
    case Hexagon::L2_ploadruhf_pi:
6898
0
    case Hexagon::L2_ploadruhfnew_pi:
6899
0
    case Hexagon::L2_ploadruht_pi:
6900
0
    case Hexagon::L2_ploadruhtnew_pi: {
6901
      // op: dst
6902
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6903
0
      Value |= op & UINT64_C(31);
6904
      // op: src1
6905
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6906
0
      Value |= (op & UINT64_C(3)) << 9;
6907
      // op: src2
6908
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6909
0
      Value |= (op & UINT64_C(31)) << 16;
6910
      // op: offset
6911
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6912
0
      Value |= (op & UINT64_C(30)) << 4;
6913
0
      break;
6914
0
    }
6915
0
    case Hexagon::L2_ploadrif_pi:
6916
0
    case Hexagon::L2_ploadrifnew_pi:
6917
0
    case Hexagon::L2_ploadrit_pi:
6918
0
    case Hexagon::L2_ploadritnew_pi: {
6919
      // op: dst
6920
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6921
0
      Value |= op & UINT64_C(31);
6922
      // op: src1
6923
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6924
0
      Value |= (op & UINT64_C(3)) << 9;
6925
      // op: src2
6926
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6927
0
      Value |= (op & UINT64_C(31)) << 16;
6928
      // op: offset
6929
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
6930
0
      Value |= (op & UINT64_C(60)) << 3;
6931
0
      break;
6932
0
    }
6933
0
    case Hexagon::V6_vinsertwr:
6934
0
    case Hexagon::V6_vinsertwr_128B: {
6935
      // op: dst
6936
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6937
0
      Value |= op & UINT64_C(31);
6938
      // op: src1
6939
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6940
0
      Value |= (op & UINT64_C(31)) << 16;
6941
0
      break;
6942
0
    }
6943
0
    case Hexagon::L2_loadrd_pi: {
6944
      // op: dst
6945
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6946
0
      Value |= op & UINT64_C(31);
6947
      // op: src1
6948
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6949
0
      Value |= (op & UINT64_C(31)) << 16;
6950
      // op: offset
6951
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6952
0
      Value |= (op & UINT64_C(120)) << 2;
6953
0
      break;
6954
0
    }
6955
0
    case Hexagon::L2_loadrb_pi:
6956
0
    case Hexagon::L2_loadrub_pi: {
6957
      // op: dst
6958
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6959
0
      Value |= op & UINT64_C(31);
6960
      // op: src1
6961
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6962
0
      Value |= (op & UINT64_C(31)) << 16;
6963
      // op: offset
6964
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6965
0
      Value |= (op & UINT64_C(15)) << 5;
6966
0
      break;
6967
0
    }
6968
0
    case Hexagon::L2_loadbsw2_pi:
6969
0
    case Hexagon::L2_loadbzw2_pi:
6970
0
    case Hexagon::L2_loadrh_pi:
6971
0
    case Hexagon::L2_loadruh_pi: {
6972
      // op: dst
6973
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6974
0
      Value |= op & UINT64_C(31);
6975
      // op: src1
6976
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6977
0
      Value |= (op & UINT64_C(31)) << 16;
6978
      // op: offset
6979
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6980
0
      Value |= (op & UINT64_C(30)) << 4;
6981
0
      break;
6982
0
    }
6983
0
    case Hexagon::L2_loadbsw4_pi:
6984
0
    case Hexagon::L2_loadbzw4_pi:
6985
0
    case Hexagon::L2_loadri_pi: {
6986
      // op: dst
6987
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
6988
0
      Value |= op & UINT64_C(31);
6989
      // op: src1
6990
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
6991
0
      Value |= (op & UINT64_C(31)) << 16;
6992
      // op: offset
6993
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
6994
0
      Value |= (op & UINT64_C(60)) << 3;
6995
0
      break;
6996
0
    }
6997
0
    case Hexagon::L2_loadbsw2_pr:
6998
0
    case Hexagon::L2_loadbsw4_pr:
6999
0
    case Hexagon::L2_loadbzw2_pr:
7000
0
    case Hexagon::L2_loadbzw4_pr:
7001
0
    case Hexagon::L2_loadrb_pr:
7002
0
    case Hexagon::L2_loadrd_pr:
7003
0
    case Hexagon::L2_loadrh_pr:
7004
0
    case Hexagon::L2_loadri_pr:
7005
0
    case Hexagon::L2_loadrub_pr:
7006
0
    case Hexagon::L2_loadruh_pr:
7007
0
    case Hexagon::V6_vL32Ub_ppu:
7008
0
    case Hexagon::V6_vL32b_cur_ppu:
7009
0
    case Hexagon::V6_vL32b_nt_cur_ppu:
7010
0
    case Hexagon::V6_vL32b_nt_ppu:
7011
0
    case Hexagon::V6_vL32b_nt_tmp_ppu:
7012
0
    case Hexagon::V6_vL32b_ppu:
7013
0
    case Hexagon::V6_vL32b_tmp_ppu: {
7014
      // op: dst
7015
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7016
0
      Value |= op & UINT64_C(31);
7017
      // op: src1
7018
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7019
0
      Value |= (op & UINT64_C(31)) << 16;
7020
      // op: src2
7021
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7022
0
      Value |= (op & UINT64_C(1)) << 13;
7023
0
      break;
7024
0
    }
7025
0
    case Hexagon::S6_rol_i_r_acc:
7026
0
    case Hexagon::S6_rol_i_r_and:
7027
0
    case Hexagon::S6_rol_i_r_nac:
7028
0
    case Hexagon::S6_rol_i_r_or:
7029
0
    case Hexagon::S6_rol_i_r_xacc: {
7030
      // op: dst
7031
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7032
0
      Value |= op & UINT64_C(31);
7033
      // op: src1
7034
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7035
0
      Value |= (op & UINT64_C(31)) << 16;
7036
      // op: src2
7037
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7038
0
      Value |= (op & UINT64_C(31)) << 8;
7039
0
      break;
7040
0
    }
7041
0
    case Hexagon::S2_insert: {
7042
      // op: dst
7043
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7044
0
      Value |= op & UINT64_C(31);
7045
      // op: src1
7046
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7047
0
      Value |= (op & UINT64_C(31)) << 16;
7048
      // op: src2
7049
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7050
0
      Value |= (op & UINT64_C(31)) << 8;
7051
      // op: src3
7052
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7053
0
      Value |= (op & UINT64_C(24)) << 18;
7054
0
      Value |= (op & UINT64_C(7)) << 5;
7055
0
      break;
7056
0
    }
7057
0
    case Hexagon::V6_vL32Ub_pi:
7058
0
    case Hexagon::V6_vL32b_cur_pi:
7059
0
    case Hexagon::V6_vL32b_nt_cur_pi:
7060
0
    case Hexagon::V6_vL32b_nt_pi:
7061
0
    case Hexagon::V6_vL32b_nt_tmp_pi:
7062
0
    case Hexagon::V6_vL32b_pi:
7063
0
    case Hexagon::V6_vL32b_tmp_pi: {
7064
      // op: dst
7065
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7066
0
      Value |= op & UINT64_C(31);
7067
      // op: src1
7068
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7069
0
      Value |= (op & UINT64_C(31)) << 16;
7070
      // op: src2
7071
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7072
0
      Value |= (op & UINT64_C(448)) << 2;
7073
0
      break;
7074
0
    }
7075
0
    case Hexagon::S6_rol_i_p_acc:
7076
0
    case Hexagon::S6_rol_i_p_and:
7077
0
    case Hexagon::S6_rol_i_p_nac:
7078
0
    case Hexagon::S6_rol_i_p_or:
7079
0
    case Hexagon::S6_rol_i_p_xacc: {
7080
      // op: dst
7081
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7082
0
      Value |= op & UINT64_C(31);
7083
      // op: src1
7084
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7085
0
      Value |= (op & UINT64_C(31)) << 16;
7086
      // op: src2
7087
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7088
0
      Value |= (op & UINT64_C(63)) << 8;
7089
0
      break;
7090
0
    }
7091
0
    case Hexagon::S2_insertp: {
7092
      // op: dst
7093
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7094
0
      Value |= op & UINT64_C(31);
7095
      // op: src1
7096
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7097
0
      Value |= (op & UINT64_C(31)) << 16;
7098
      // op: src2
7099
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7100
0
      Value |= (op & UINT64_C(63)) << 8;
7101
      // op: src3
7102
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7103
0
      Value |= (op & UINT64_C(56)) << 18;
7104
0
      Value |= (op & UINT64_C(7)) << 5;
7105
0
      break;
7106
0
    }
7107
0
    case Hexagon::V6_vL32Ub_pi_128B:
7108
0
    case Hexagon::V6_vL32b_cur_pi_128B:
7109
0
    case Hexagon::V6_vL32b_nt_cur_pi_128B:
7110
0
    case Hexagon::V6_vL32b_nt_pi_128B:
7111
0
    case Hexagon::V6_vL32b_nt_tmp_pi_128B:
7112
0
    case Hexagon::V6_vL32b_pi_128B:
7113
0
    case Hexagon::V6_vL32b_tmp_pi_128B: {
7114
      // op: dst
7115
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7116
0
      Value |= op & UINT64_C(31);
7117
      // op: src1
7118
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7119
0
      Value |= (op & UINT64_C(31)) << 16;
7120
      // op: src2
7121
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7122
0
      Value |= (op & UINT64_C(896)) << 1;
7123
0
      break;
7124
0
    }
7125
0
    case Hexagon::V6_vunpackob:
7126
0
    case Hexagon::V6_vunpackob_128B:
7127
0
    case Hexagon::V6_vunpackoh:
7128
0
    case Hexagon::V6_vunpackoh_128B: {
7129
      // op: dst
7130
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7131
0
      Value |= op & UINT64_C(31);
7132
      // op: src1
7133
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7134
0
      Value |= (op & UINT64_C(31)) << 8;
7135
0
      break;
7136
0
    }
7137
0
    case Hexagon::V6_vaslw_acc:
7138
0
    case Hexagon::V6_vaslw_acc_128B:
7139
0
    case Hexagon::V6_vasrw_acc:
7140
0
    case Hexagon::V6_vasrw_acc_128B:
7141
0
    case Hexagon::V6_vdmpybus_acc:
7142
0
    case Hexagon::V6_vdmpybus_acc_128B:
7143
0
    case Hexagon::V6_vdmpybus_dv_acc:
7144
0
    case Hexagon::V6_vdmpybus_dv_acc_128B:
7145
0
    case Hexagon::V6_vdmpyhb_acc:
7146
0
    case Hexagon::V6_vdmpyhb_acc_128B:
7147
0
    case Hexagon::V6_vdmpyhb_dv_acc:
7148
0
    case Hexagon::V6_vdmpyhb_dv_acc_128B:
7149
0
    case Hexagon::V6_vdmpyhisat_acc:
7150
0
    case Hexagon::V6_vdmpyhisat_acc_128B:
7151
0
    case Hexagon::V6_vdmpyhsat_acc:
7152
0
    case Hexagon::V6_vdmpyhsat_acc_128B:
7153
0
    case Hexagon::V6_vdmpyhsuisat_acc:
7154
0
    case Hexagon::V6_vdmpyhsuisat_acc_128B:
7155
0
    case Hexagon::V6_vdmpyhsusat_acc:
7156
0
    case Hexagon::V6_vdmpyhsusat_acc_128B:
7157
0
    case Hexagon::V6_vdmpyhvsat_acc:
7158
0
    case Hexagon::V6_vdmpyhvsat_acc_128B:
7159
0
    case Hexagon::V6_vdsaduh_acc:
7160
0
    case Hexagon::V6_vdsaduh_acc_128B:
7161
0
    case Hexagon::V6_vmpabus_acc:
7162
0
    case Hexagon::V6_vmpabus_acc_128B:
7163
0
    case Hexagon::V6_vmpahb_acc:
7164
0
    case Hexagon::V6_vmpahb_acc_128B:
7165
0
    case Hexagon::V6_vmpybus_acc:
7166
0
    case Hexagon::V6_vmpybus_acc_128B:
7167
0
    case Hexagon::V6_vmpybusv_acc:
7168
0
    case Hexagon::V6_vmpybusv_acc_128B:
7169
0
    case Hexagon::V6_vmpybv_acc:
7170
0
    case Hexagon::V6_vmpybv_acc_128B:
7171
0
    case Hexagon::V6_vmpyhsat_acc:
7172
0
    case Hexagon::V6_vmpyhsat_acc_128B:
7173
0
    case Hexagon::V6_vmpyhus_acc:
7174
0
    case Hexagon::V6_vmpyhus_acc_128B:
7175
0
    case Hexagon::V6_vmpyhv_acc:
7176
0
    case Hexagon::V6_vmpyhv_acc_128B:
7177
0
    case Hexagon::V6_vmpyiewh_acc:
7178
0
    case Hexagon::V6_vmpyiewh_acc_128B:
7179
0
    case Hexagon::V6_vmpyiewuh_acc:
7180
0
    case Hexagon::V6_vmpyiewuh_acc_128B:
7181
0
    case Hexagon::V6_vmpyih_acc:
7182
0
    case Hexagon::V6_vmpyih_acc_128B:
7183
0
    case Hexagon::V6_vmpyihb_acc:
7184
0
    case Hexagon::V6_vmpyihb_acc_128B:
7185
0
    case Hexagon::V6_vmpyiwb_acc:
7186
0
    case Hexagon::V6_vmpyiwb_acc_128B:
7187
0
    case Hexagon::V6_vmpyiwh_acc:
7188
0
    case Hexagon::V6_vmpyiwh_acc_128B:
7189
0
    case Hexagon::V6_vmpyowh_rnd_sacc:
7190
0
    case Hexagon::V6_vmpyowh_rnd_sacc_128B:
7191
0
    case Hexagon::V6_vmpyowh_sacc:
7192
0
    case Hexagon::V6_vmpyowh_sacc_128B:
7193
0
    case Hexagon::V6_vmpyub_acc:
7194
0
    case Hexagon::V6_vmpyub_acc_128B:
7195
0
    case Hexagon::V6_vmpyubv_acc:
7196
0
    case Hexagon::V6_vmpyubv_acc_128B:
7197
0
    case Hexagon::V6_vmpyuh_acc:
7198
0
    case Hexagon::V6_vmpyuh_acc_128B:
7199
0
    case Hexagon::V6_vmpyuhv_acc:
7200
0
    case Hexagon::V6_vmpyuhv_acc_128B:
7201
0
    case Hexagon::V6_vrmpybus_acc:
7202
0
    case Hexagon::V6_vrmpybus_acc_128B:
7203
0
    case Hexagon::V6_vrmpybusv_acc:
7204
0
    case Hexagon::V6_vrmpybusv_acc_128B:
7205
0
    case Hexagon::V6_vrmpybv_acc:
7206
0
    case Hexagon::V6_vrmpybv_acc_128B:
7207
0
    case Hexagon::V6_vrmpyub_acc:
7208
0
    case Hexagon::V6_vrmpyub_acc_128B:
7209
0
    case Hexagon::V6_vrmpyubv_acc:
7210
0
    case Hexagon::V6_vrmpyubv_acc_128B:
7211
0
    case Hexagon::V6_vtmpyb_acc:
7212
0
    case Hexagon::V6_vtmpyb_acc_128B:
7213
0
    case Hexagon::V6_vtmpybus_acc:
7214
0
    case Hexagon::V6_vtmpybus_acc_128B:
7215
0
    case Hexagon::V6_vtmpyhb_acc:
7216
0
    case Hexagon::V6_vtmpyhb_acc_128B: {
7217
      // op: dst
7218
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7219
0
      Value |= op & UINT64_C(31);
7220
      // op: src1
7221
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7222
0
      Value |= (op & UINT64_C(31)) << 8;
7223
      // op: src2
7224
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7225
0
      Value |= (op & UINT64_C(31)) << 16;
7226
0
      break;
7227
0
    }
7228
0
    case Hexagon::V6_vrmpybusi_acc:
7229
0
    case Hexagon::V6_vrmpybusi_acc_128B:
7230
0
    case Hexagon::V6_vrmpyubi_acc:
7231
0
    case Hexagon::V6_vrmpyubi_acc_128B:
7232
0
    case Hexagon::V6_vrsadubi_acc:
7233
0
    case Hexagon::V6_vrsadubi_acc_128B: {
7234
      // op: dst
7235
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7236
0
      Value |= op & UINT64_C(31);
7237
      // op: src1
7238
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7239
0
      Value |= (op & UINT64_C(31)) << 8;
7240
      // op: src2
7241
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7242
0
      Value |= (op & UINT64_C(31)) << 16;
7243
      // op: src3
7244
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7245
0
      Value |= (op & UINT64_C(1)) << 5;
7246
0
      break;
7247
0
    }
7248
0
    case Hexagon::V6_vlutvvb_oracc:
7249
0
    case Hexagon::V6_vlutvvb_oracc_128B:
7250
0
    case Hexagon::V6_vlutvwh_oracc:
7251
0
    case Hexagon::V6_vlutvwh_oracc_128B: {
7252
      // op: dst
7253
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7254
0
      Value |= op & UINT64_C(31);
7255
      // op: src1
7256
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7257
0
      Value |= (op & UINT64_C(31)) << 8;
7258
      // op: src2
7259
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7260
0
      Value |= (op & UINT64_C(31)) << 19;
7261
      // op: src3
7262
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7263
0
      Value |= (op & UINT64_C(7)) << 16;
7264
0
      break;
7265
0
    }
7266
0
    case Hexagon::L2_loadalignb_io: {
7267
      // op: dst
7268
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7269
0
      Value |= op & UINT64_C(31);
7270
      // op: src2
7271
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7272
0
      Value |= (op & UINT64_C(31)) << 16;
7273
      // op: offset
7274
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7275
0
      Value |= (op & UINT64_C(1536)) << 16;
7276
0
      Value |= (op & UINT64_C(511)) << 5;
7277
0
      break;
7278
0
    }
7279
0
    case Hexagon::L2_loadalignh_io: {
7280
      // op: dst
7281
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7282
0
      Value |= op & UINT64_C(31);
7283
      // op: src2
7284
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7285
0
      Value |= (op & UINT64_C(31)) << 16;
7286
      // op: offset
7287
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7288
0
      Value |= (op & UINT64_C(3072)) << 15;
7289
0
      Value |= (op & UINT64_C(1022)) << 4;
7290
0
      break;
7291
0
    }
7292
0
    case Hexagon::M2_accii:
7293
0
    case Hexagon::M2_macsin:
7294
0
    case Hexagon::M2_macsip:
7295
0
    case Hexagon::M2_naccii: {
7296
      // op: dst
7297
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7298
0
      Value |= op & UINT64_C(31);
7299
      // op: src2
7300
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7301
0
      Value |= (op & UINT64_C(31)) << 16;
7302
      // op: src3
7303
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7304
0
      Value |= (op & UINT64_C(255)) << 5;
7305
0
      break;
7306
0
    }
7307
0
    case Hexagon::M2_acci:
7308
0
    case Hexagon::M2_maci:
7309
0
    case Hexagon::M2_nacci:
7310
0
    case Hexagon::M2_xor_xacc:
7311
0
    case Hexagon::M4_and_and:
7312
0
    case Hexagon::M4_and_andn:
7313
0
    case Hexagon::M4_and_or:
7314
0
    case Hexagon::M4_and_xor:
7315
0
    case Hexagon::M4_mac_up_s1_sat:
7316
0
    case Hexagon::M4_nac_up_s1_sat:
7317
0
    case Hexagon::M4_or_and:
7318
0
    case Hexagon::M4_or_andn:
7319
0
    case Hexagon::M4_or_or:
7320
0
    case Hexagon::M4_or_xor:
7321
0
    case Hexagon::M4_xor_and:
7322
0
    case Hexagon::M4_xor_andn:
7323
0
    case Hexagon::M4_xor_or:
7324
0
    case Hexagon::S2_insert_rp:
7325
0
    case Hexagon::S2_insertp_rp: {
7326
      // op: dst
7327
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7328
0
      Value |= op & UINT64_C(31);
7329
      // op: src2
7330
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7331
0
      Value |= (op & UINT64_C(31)) << 16;
7332
      // op: src3
7333
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7334
0
      Value |= (op & UINT64_C(31)) << 8;
7335
0
      break;
7336
0
    }
7337
0
    case Hexagon::M2_subacc: {
7338
      // op: dst
7339
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7340
0
      Value |= op & UINT64_C(31);
7341
      // op: src2
7342
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7343
0
      Value |= (op & UINT64_C(31)) << 8;
7344
      // op: src3
7345
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7346
0
      Value |= (op & UINT64_C(31)) << 16;
7347
0
      break;
7348
0
    }
7349
0
    case Hexagon::L2_loadalignb_pi: {
7350
      // op: dst
7351
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7352
0
      Value |= op & UINT64_C(31);
7353
      // op: src2
7354
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7355
0
      Value |= (op & UINT64_C(31)) << 16;
7356
      // op: offset
7357
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7358
0
      Value |= (op & UINT64_C(15)) << 5;
7359
0
      break;
7360
0
    }
7361
0
    case Hexagon::L2_loadalignh_pi: {
7362
      // op: dst
7363
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7364
0
      Value |= op & UINT64_C(31);
7365
      // op: src2
7366
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7367
0
      Value |= (op & UINT64_C(31)) << 16;
7368
      // op: offset
7369
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7370
0
      Value |= (op & UINT64_C(30)) << 4;
7371
0
      break;
7372
0
    }
7373
0
    case Hexagon::L2_loadalignb_pr:
7374
0
    case Hexagon::L2_loadalignh_pr: {
7375
      // op: dst
7376
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7377
0
      Value |= op & UINT64_C(31);
7378
      // op: src2
7379
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7380
0
      Value |= (op & UINT64_C(31)) << 16;
7381
      // op: src3
7382
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7383
0
      Value |= (op & UINT64_C(1)) << 13;
7384
0
      break;
7385
0
    }
7386
0
    case Hexagon::A5_ACS: {
7387
      // op: dst1
7388
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7389
0
      Value |= op & UINT64_C(31);
7390
      // op: dst2
7391
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7392
0
      Value |= (op & UINT64_C(3)) << 5;
7393
      // op: src1
7394
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7395
0
      Value |= (op & UINT64_C(31)) << 16;
7396
      // op: src2
7397
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
7398
0
      Value |= (op & UINT64_C(31)) << 8;
7399
0
      break;
7400
0
    }
7401
0
    case Hexagon::L4_loadalignb_ap:
7402
0
    case Hexagon::L4_loadalignh_ap:
7403
0
    case Hexagon::L4_loadbsw2_ap:
7404
0
    case Hexagon::L4_loadbsw4_ap:
7405
0
    case Hexagon::L4_loadbzw2_ap:
7406
0
    case Hexagon::L4_loadbzw4_ap:
7407
0
    case Hexagon::L4_loadrb_ap:
7408
0
    case Hexagon::L4_loadrd_ap:
7409
0
    case Hexagon::L4_loadrh_ap:
7410
0
    case Hexagon::L4_loadri_ap:
7411
0
    case Hexagon::L4_loadrub_ap:
7412
0
    case Hexagon::L4_loadruh_ap: {
7413
      // op: dst1
7414
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7415
0
      Value |= op & UINT64_C(31);
7416
      // op: dst2
7417
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7418
0
      Value |= (op & UINT64_C(31)) << 16;
7419
      // op: addr
7420
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7421
0
      Value |= (op & UINT64_C(60)) << 6;
7422
0
      Value |= (op & UINT64_C(3)) << 5;
7423
0
      break;
7424
0
    }
7425
438
    case Hexagon::A4_ext:
7426
843
    case Hexagon::A4_ext_b:
7427
843
    case Hexagon::A4_ext_c:
7428
843
    case Hexagon::A4_ext_g: {
7429
      // op: imm
7430
843
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7431
843
      Value |= (op & UINT64_C(4293918720)) >> 4;
7432
843
      Value |= (op & UINT64_C(1048512)) >> 6;
7433
843
      break;
7434
843
    }
7435
0
    case Hexagon::J2_loop0r:
7436
0
    case Hexagon::J2_loop0rext:
7437
0
    case Hexagon::J2_loop1r:
7438
0
    case Hexagon::J2_loop1rext: {
7439
      // op: offset
7440
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7441
0
      Value |= (op & UINT64_C(496)) << 4;
7442
0
      Value |= (op & UINT64_C(12)) << 1;
7443
      // op: src2
7444
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7445
0
      Value |= (op & UINT64_C(31)) << 16;
7446
0
      break;
7447
0
    }
7448
1
    case Hexagon::J2_loop0i:
7449
1
    case Hexagon::J2_loop0iext:
7450
5
    case Hexagon::J2_loop1i:
7451
5
    case Hexagon::J2_loop1iext: {
7452
      // op: offset
7453
5
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7454
5
      Value |= (op & UINT64_C(496)) << 4;
7455
5
      Value |= (op & UINT64_C(12)) << 1;
7456
      // op: src2
7457
5
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7458
5
      Value |= (op & UINT64_C(992)) << 11;
7459
5
      Value |= (op & UINT64_C(28)) << 3;
7460
5
      Value |= op & UINT64_C(3);
7461
5
      break;
7462
5
    }
7463
0
    case Hexagon::J2_ploop1sr:
7464
0
    case Hexagon::J2_ploop2sr:
7465
0
    case Hexagon::J2_ploop3sr: {
7466
      // op: r7_2
7467
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7468
0
      Value |= (op & UINT64_C(496)) << 4;
7469
0
      Value |= (op & UINT64_C(12)) << 1;
7470
      // op: Rs
7471
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7472
0
      Value |= (op & UINT64_C(31)) << 16;
7473
0
      break;
7474
0
    }
7475
0
    case Hexagon::J2_ploop1si:
7476
0
    case Hexagon::J2_ploop2si:
7477
0
    case Hexagon::J2_ploop3si: {
7478
      // op: r7_2
7479
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7480
0
      Value |= (op & UINT64_C(496)) << 4;
7481
0
      Value |= (op & UINT64_C(12)) << 1;
7482
      // op: U10
7483
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7484
0
      Value |= (op & UINT64_C(992)) << 11;
7485
0
      Value |= (op & UINT64_C(28)) << 3;
7486
0
      Value |= op & UINT64_C(3);
7487
0
      break;
7488
0
    }
7489
0
    case Hexagon::V4_SS2_stored_sp: {
7490
      // op: s6_3
7491
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7492
0
      Value |= op & UINT64_C(504);
7493
      // op: Rtt
7494
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7495
0
      Value |= op & UINT64_C(7);
7496
0
      break;
7497
0
    }
7498
0
    case Hexagon::L4_return_f:
7499
0
    case Hexagon::L4_return_fnew_pnt:
7500
0
    case Hexagon::L4_return_fnew_pt:
7501
0
    case Hexagon::L4_return_t:
7502
0
    case Hexagon::L4_return_tnew_pnt:
7503
0
    case Hexagon::L4_return_tnew_pt: {
7504
      // op: src
7505
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7506
0
      Value |= (op & UINT64_C(3)) << 8;
7507
0
      break;
7508
0
    }
7509
0
    case Hexagon::J2_jumprf:
7510
0
    case Hexagon::J2_jumprfnew:
7511
0
    case Hexagon::J2_jumprfnewpt:
7512
0
    case Hexagon::J2_jumprt:
7513
0
    case Hexagon::J2_jumprtnew:
7514
0
    case Hexagon::J2_jumprtnewpt:
7515
0
    case Hexagon::JMPretf:
7516
0
    case Hexagon::JMPretfnew:
7517
0
    case Hexagon::JMPretfnewpt:
7518
0
    case Hexagon::JMPrett:
7519
0
    case Hexagon::JMPrettnew:
7520
0
    case Hexagon::JMPrettnewpt: {
7521
      // op: src
7522
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7523
0
      Value |= (op & UINT64_C(3)) << 8;
7524
      // op: dst
7525
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7526
0
      Value |= (op & UINT64_C(31)) << 16;
7527
0
      break;
7528
0
    }
7529
0
    case Hexagon::J2_jump_extf:
7530
0
    case Hexagon::J2_jump_extfnew:
7531
0
    case Hexagon::J2_jump_extfnewpt:
7532
0
    case Hexagon::J2_jump_extt:
7533
0
    case Hexagon::J2_jump_exttnew:
7534
0
    case Hexagon::J2_jump_exttnewpt:
7535
0
    case Hexagon::J2_jump_noextf:
7536
0
    case Hexagon::J2_jump_noextfnew:
7537
0
    case Hexagon::J2_jump_noextfnewpt:
7538
0
    case Hexagon::J2_jump_noextt:
7539
0
    case Hexagon::J2_jump_noexttnew:
7540
0
    case Hexagon::J2_jump_noexttnewpt:
7541
3
    case Hexagon::J2_jumpf:
7542
3
    case Hexagon::J2_jumpfnew:
7543
3
    case Hexagon::J2_jumpfnewpt:
7544
5
    case Hexagon::J2_jumpt:
7545
5
    case Hexagon::J2_jumptnew:
7546
5
    case Hexagon::J2_jumptnewpt: {
7547
      // op: src
7548
5
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7549
5
      Value |= (op & UINT64_C(3)) << 8;
7550
      // op: dst
7551
5
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7552
5
      Value |= (op & UINT64_C(98304)) << 7;
7553
5
      Value |= (op & UINT64_C(31744)) << 6;
7554
5
      Value |= (op & UINT64_C(512)) << 4;
7555
5
      Value |= (op & UINT64_C(508)) >> 1;
7556
5
      break;
7557
5
    }
7558
0
    case Hexagon::V6_vS32Ub_npred_ai_128B:
7559
0
    case Hexagon::V6_vS32Ub_pred_ai_128B:
7560
0
    case Hexagon::V6_vS32b_npred_ai_128B:
7561
0
    case Hexagon::V6_vS32b_nqpred_ai_128B:
7562
0
    case Hexagon::V6_vS32b_nt_npred_ai_128B:
7563
0
    case Hexagon::V6_vS32b_nt_nqpred_ai_128B:
7564
0
    case Hexagon::V6_vS32b_nt_pred_ai_128B:
7565
0
    case Hexagon::V6_vS32b_nt_qpred_ai_128B:
7566
0
    case Hexagon::V6_vS32b_pred_ai_128B:
7567
0
    case Hexagon::V6_vS32b_qpred_ai_128B: {
7568
      // op: src1
7569
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7570
0
      Value |= (op & UINT64_C(3)) << 11;
7571
      // op: src2
7572
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7573
0
      Value |= (op & UINT64_C(31)) << 16;
7574
      // op: src3
7575
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7576
0
      Value |= (op & UINT64_C(1024)) << 3;
7577
0
      Value |= (op & UINT64_C(896)) << 1;
7578
      // op: src4
7579
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7580
0
      Value |= op & UINT64_C(31);
7581
0
      break;
7582
0
    }
7583
0
    case Hexagon::V6_vS32b_new_npred_ai_128B:
7584
0
    case Hexagon::V6_vS32b_new_pred_ai_128B:
7585
0
    case Hexagon::V6_vS32b_nt_new_npred_ai_128B:
7586
0
    case Hexagon::V6_vS32b_nt_new_pred_ai_128B: {
7587
      // op: src1
7588
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7589
0
      Value |= (op & UINT64_C(3)) << 11;
7590
      // op: src2
7591
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7592
0
      Value |= (op & UINT64_C(31)) << 16;
7593
      // op: src3
7594
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7595
0
      Value |= (op & UINT64_C(1024)) << 3;
7596
0
      Value |= (op & UINT64_C(896)) << 1;
7597
      // op: src4
7598
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7599
0
      Value |= op & UINT64_C(7);
7600
0
      break;
7601
0
    }
7602
0
    case Hexagon::V6_vS32Ub_npred_ai:
7603
0
    case Hexagon::V6_vS32Ub_pred_ai:
7604
0
    case Hexagon::V6_vS32b_npred_ai:
7605
0
    case Hexagon::V6_vS32b_nqpred_ai:
7606
0
    case Hexagon::V6_vS32b_nt_npred_ai:
7607
0
    case Hexagon::V6_vS32b_nt_nqpred_ai:
7608
0
    case Hexagon::V6_vS32b_nt_pred_ai:
7609
0
    case Hexagon::V6_vS32b_nt_qpred_ai:
7610
0
    case Hexagon::V6_vS32b_pred_ai:
7611
0
    case Hexagon::V6_vS32b_qpred_ai: {
7612
      // op: src1
7613
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7614
0
      Value |= (op & UINT64_C(3)) << 11;
7615
      // op: src2
7616
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7617
0
      Value |= (op & UINT64_C(31)) << 16;
7618
      // op: src3
7619
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7620
0
      Value |= (op & UINT64_C(512)) << 4;
7621
0
      Value |= (op & UINT64_C(448)) << 2;
7622
      // op: src4
7623
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7624
0
      Value |= op & UINT64_C(31);
7625
0
      break;
7626
0
    }
7627
0
    case Hexagon::V6_vS32b_new_npred_ai:
7628
0
    case Hexagon::V6_vS32b_new_pred_ai:
7629
0
    case Hexagon::V6_vS32b_nt_new_npred_ai:
7630
0
    case Hexagon::V6_vS32b_nt_new_pred_ai: {
7631
      // op: src1
7632
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7633
0
      Value |= (op & UINT64_C(3)) << 11;
7634
      // op: src2
7635
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7636
0
      Value |= (op & UINT64_C(31)) << 16;
7637
      // op: src3
7638
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7639
0
      Value |= (op & UINT64_C(512)) << 4;
7640
0
      Value |= (op & UINT64_C(448)) << 2;
7641
      // op: src4
7642
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7643
0
      Value |= op & UINT64_C(7);
7644
0
      break;
7645
0
    }
7646
0
    case Hexagon::V6_vhistq: {
7647
      // op: src1
7648
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7649
0
      Value |= (op & UINT64_C(3)) << 22;
7650
0
      break;
7651
0
    }
7652
0
    case Hexagon::Y5_l2unlocka: {
7653
      // op: src1
7654
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7655
0
      Value |= (op & UINT64_C(31)) << 16;
7656
0
      break;
7657
0
    }
7658
0
    case Hexagon::V6_vS32Ub_ai_128B:
7659
0
    case Hexagon::V6_vS32b_ai_128B:
7660
0
    case Hexagon::V6_vS32b_nt_ai_128B: {
7661
      // op: src1
7662
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7663
0
      Value |= (op & UINT64_C(31)) << 16;
7664
      // op: src2
7665
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7666
0
      Value |= (op & UINT64_C(1024)) << 3;
7667
0
      Value |= (op & UINT64_C(896)) << 1;
7668
      // op: src3
7669
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7670
0
      Value |= op & UINT64_C(31);
7671
0
      break;
7672
0
    }
7673
0
    case Hexagon::V6_vS32b_new_ai_128B:
7674
0
    case Hexagon::V6_vS32b_nt_new_ai_128B: {
7675
      // op: src1
7676
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7677
0
      Value |= (op & UINT64_C(31)) << 16;
7678
      // op: src2
7679
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7680
0
      Value |= (op & UINT64_C(1024)) << 3;
7681
0
      Value |= (op & UINT64_C(896)) << 1;
7682
      // op: src3
7683
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7684
0
      Value |= op & UINT64_C(7);
7685
0
      break;
7686
0
    }
7687
0
    case Hexagon::S2_storerd_io: {
7688
      // op: src1
7689
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7690
0
      Value |= (op & UINT64_C(31)) << 16;
7691
      // op: src2
7692
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7693
0
      Value |= (op & UINT64_C(12288)) << 13;
7694
0
      Value |= (op & UINT64_C(2048)) << 2;
7695
0
      Value |= (op & UINT64_C(2040)) >> 3;
7696
      // op: src3
7697
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7698
0
      Value |= (op & UINT64_C(31)) << 8;
7699
0
      break;
7700
0
    }
7701
0
    case Hexagon::S2_storerb_io: {
7702
      // op: src1
7703
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7704
0
      Value |= (op & UINT64_C(31)) << 16;
7705
      // op: src2
7706
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7707
0
      Value |= (op & UINT64_C(1536)) << 16;
7708
0
      Value |= (op & UINT64_C(256)) << 5;
7709
0
      Value |= op & UINT64_C(255);
7710
      // op: src3
7711
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7712
0
      Value |= (op & UINT64_C(31)) << 8;
7713
0
      break;
7714
0
    }
7715
0
    case Hexagon::S2_storerbnew_io: {
7716
      // op: src1
7717
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7718
0
      Value |= (op & UINT64_C(31)) << 16;
7719
      // op: src2
7720
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7721
0
      Value |= (op & UINT64_C(1536)) << 16;
7722
0
      Value |= (op & UINT64_C(256)) << 5;
7723
0
      Value |= op & UINT64_C(255);
7724
      // op: src3
7725
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7726
0
      Value |= (op & UINT64_C(7)) << 8;
7727
0
      break;
7728
0
    }
7729
0
    case Hexagon::S4_storerb_ur:
7730
0
    case Hexagon::S4_storerd_ur:
7731
0
    case Hexagon::S4_storerf_ur:
7732
0
    case Hexagon::S4_storerh_ur:
7733
0
    case Hexagon::S4_storeri_ur: {
7734
      // op: src1
7735
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7736
0
      Value |= (op & UINT64_C(31)) << 16;
7737
      // op: src2
7738
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7739
0
      Value |= (op & UINT64_C(2)) << 12;
7740
0
      Value |= (op & UINT64_C(1)) << 6;
7741
      // op: src3
7742
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7743
0
      Value |= op & UINT64_C(63);
7744
      // op: src4
7745
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7746
0
      Value |= (op & UINT64_C(31)) << 8;
7747
0
      break;
7748
0
    }
7749
0
    case Hexagon::S4_storerbnew_ur:
7750
0
    case Hexagon::S4_storerhnew_ur:
7751
0
    case Hexagon::S4_storerinew_ur: {
7752
      // op: src1
7753
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7754
0
      Value |= (op & UINT64_C(31)) << 16;
7755
      // op: src2
7756
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7757
0
      Value |= (op & UINT64_C(2)) << 12;
7758
0
      Value |= (op & UINT64_C(1)) << 6;
7759
      // op: src3
7760
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7761
0
      Value |= op & UINT64_C(63);
7762
      // op: src4
7763
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
7764
0
      Value |= (op & UINT64_C(7)) << 8;
7765
0
      break;
7766
0
    }
7767
0
    case Hexagon::S2_storerf_io:
7768
0
    case Hexagon::S2_storerh_io: {
7769
      // op: src1
7770
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7771
0
      Value |= (op & UINT64_C(31)) << 16;
7772
      // op: src2
7773
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7774
0
      Value |= (op & UINT64_C(3072)) << 15;
7775
0
      Value |= (op & UINT64_C(512)) << 4;
7776
0
      Value |= (op & UINT64_C(510)) >> 1;
7777
      // op: src3
7778
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7779
0
      Value |= (op & UINT64_C(31)) << 8;
7780
0
      break;
7781
0
    }
7782
0
    case Hexagon::S2_storerhnew_io: {
7783
      // op: src1
7784
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7785
0
      Value |= (op & UINT64_C(31)) << 16;
7786
      // op: src2
7787
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7788
0
      Value |= (op & UINT64_C(3072)) << 15;
7789
0
      Value |= (op & UINT64_C(512)) << 4;
7790
0
      Value |= (op & UINT64_C(510)) >> 1;
7791
      // op: src3
7792
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7793
0
      Value |= (op & UINT64_C(7)) << 8;
7794
0
      break;
7795
0
    }
7796
0
    case Hexagon::V6_vS32Ub_ai:
7797
0
    case Hexagon::V6_vS32b_ai:
7798
0
    case Hexagon::V6_vS32b_nt_ai: {
7799
      // op: src1
7800
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7801
0
      Value |= (op & UINT64_C(31)) << 16;
7802
      // op: src2
7803
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7804
0
      Value |= (op & UINT64_C(512)) << 4;
7805
0
      Value |= (op & UINT64_C(448)) << 2;
7806
      // op: src3
7807
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7808
0
      Value |= op & UINT64_C(31);
7809
0
      break;
7810
0
    }
7811
0
    case Hexagon::V6_vS32b_new_ai:
7812
0
    case Hexagon::V6_vS32b_nt_new_ai: {
7813
      // op: src1
7814
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7815
0
      Value |= (op & UINT64_C(31)) << 16;
7816
      // op: src2
7817
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7818
0
      Value |= (op & UINT64_C(512)) << 4;
7819
0
      Value |= (op & UINT64_C(448)) << 2;
7820
      // op: src3
7821
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7822
0
      Value |= op & UINT64_C(7);
7823
0
      break;
7824
0
    }
7825
0
    case Hexagon::S2_storeri_io: {
7826
      // op: src1
7827
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7828
0
      Value |= (op & UINT64_C(31)) << 16;
7829
      // op: src2
7830
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7831
0
      Value |= (op & UINT64_C(6144)) << 14;
7832
0
      Value |= (op & UINT64_C(1024)) << 3;
7833
0
      Value |= (op & UINT64_C(1020)) >> 2;
7834
      // op: src3
7835
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7836
0
      Value |= (op & UINT64_C(31)) << 8;
7837
0
      break;
7838
0
    }
7839
0
    case Hexagon::S2_storerinew_io: {
7840
      // op: src1
7841
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7842
0
      Value |= (op & UINT64_C(31)) << 16;
7843
      // op: src2
7844
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7845
0
      Value |= (op & UINT64_C(6144)) << 14;
7846
0
      Value |= (op & UINT64_C(1024)) << 3;
7847
0
      Value |= (op & UINT64_C(1020)) >> 2;
7848
      // op: src3
7849
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7850
0
      Value |= (op & UINT64_C(7)) << 8;
7851
0
      break;
7852
0
    }
7853
0
    case Hexagon::Y6_l2gcleaninvpa:
7854
0
    case Hexagon::Y6_l2gcleanpa: {
7855
      // op: src1
7856
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7857
0
      Value |= (op & UINT64_C(31)) << 8;
7858
0
      break;
7859
0
    }
7860
0
    case Hexagon::J4_cmplt_f_jumpnv_nt:
7861
0
    case Hexagon::J4_cmplt_f_jumpnv_t:
7862
0
    case Hexagon::J4_cmplt_t_jumpnv_nt:
7863
0
    case Hexagon::J4_cmplt_t_jumpnv_t:
7864
0
    case Hexagon::J4_cmpltu_f_jumpnv_nt:
7865
0
    case Hexagon::J4_cmpltu_f_jumpnv_t:
7866
0
    case Hexagon::J4_cmpltu_t_jumpnv_nt:
7867
0
    case Hexagon::J4_cmpltu_t_jumpnv_t: {
7868
      // op: src1
7869
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7870
0
      Value |= (op & UINT64_C(31)) << 8;
7871
      // op: src2
7872
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7873
0
      Value |= (op & UINT64_C(7)) << 16;
7874
      // op: offset
7875
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7876
0
      Value |= (op & UINT64_C(1536)) << 11;
7877
0
      Value |= (op & UINT64_C(508)) >> 1;
7878
0
      break;
7879
0
    }
7880
0
    case Hexagon::J4_cmpeqn1_f_jumpnv_nt:
7881
0
    case Hexagon::J4_cmpeqn1_f_jumpnv_t:
7882
0
    case Hexagon::J4_cmpeqn1_t_jumpnv_nt:
7883
0
    case Hexagon::J4_cmpeqn1_t_jumpnv_t:
7884
0
    case Hexagon::J4_cmpgtn1_f_jumpnv_nt:
7885
0
    case Hexagon::J4_cmpgtn1_f_jumpnv_t:
7886
0
    case Hexagon::J4_cmpgtn1_t_jumpnv_nt:
7887
0
    case Hexagon::J4_cmpgtn1_t_jumpnv_t:
7888
0
    case Hexagon::J4_tstbit0_f_jumpnv_nt:
7889
0
    case Hexagon::J4_tstbit0_f_jumpnv_t:
7890
0
    case Hexagon::J4_tstbit0_t_jumpnv_nt:
7891
0
    case Hexagon::J4_tstbit0_t_jumpnv_t: {
7892
      // op: src1
7893
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7894
0
      Value |= (op & UINT64_C(7)) << 16;
7895
      // op: offset
7896
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7897
0
      Value |= (op & UINT64_C(1536)) << 11;
7898
0
      Value |= (op & UINT64_C(508)) >> 1;
7899
0
      break;
7900
0
    }
7901
0
    case Hexagon::J4_cmpeq_f_jumpnv_nt:
7902
0
    case Hexagon::J4_cmpeq_f_jumpnv_t:
7903
0
    case Hexagon::J4_cmpeq_t_jumpnv_nt:
7904
0
    case Hexagon::J4_cmpeq_t_jumpnv_t:
7905
0
    case Hexagon::J4_cmpeqi_f_jumpnv_nt:
7906
0
    case Hexagon::J4_cmpeqi_f_jumpnv_t:
7907
0
    case Hexagon::J4_cmpeqi_t_jumpnv_nt:
7908
0
    case Hexagon::J4_cmpeqi_t_jumpnv_t:
7909
0
    case Hexagon::J4_cmpgt_f_jumpnv_nt:
7910
0
    case Hexagon::J4_cmpgt_f_jumpnv_t:
7911
0
    case Hexagon::J4_cmpgt_t_jumpnv_nt:
7912
0
    case Hexagon::J4_cmpgt_t_jumpnv_t:
7913
0
    case Hexagon::J4_cmpgti_f_jumpnv_nt:
7914
0
    case Hexagon::J4_cmpgti_f_jumpnv_t:
7915
0
    case Hexagon::J4_cmpgti_t_jumpnv_nt:
7916
0
    case Hexagon::J4_cmpgti_t_jumpnv_t:
7917
0
    case Hexagon::J4_cmpgtu_f_jumpnv_nt:
7918
0
    case Hexagon::J4_cmpgtu_f_jumpnv_t:
7919
0
    case Hexagon::J4_cmpgtu_t_jumpnv_nt:
7920
0
    case Hexagon::J4_cmpgtu_t_jumpnv_t:
7921
0
    case Hexagon::J4_cmpgtui_f_jumpnv_nt:
7922
0
    case Hexagon::J4_cmpgtui_f_jumpnv_t:
7923
0
    case Hexagon::J4_cmpgtui_t_jumpnv_nt:
7924
0
    case Hexagon::J4_cmpgtui_t_jumpnv_t: {
7925
      // op: src1
7926
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7927
0
      Value |= (op & UINT64_C(7)) << 16;
7928
      // op: src2
7929
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7930
0
      Value |= (op & UINT64_C(31)) << 8;
7931
      // op: offset
7932
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7933
0
      Value |= (op & UINT64_C(1536)) << 11;
7934
0
      Value |= (op & UINT64_C(508)) >> 1;
7935
0
      break;
7936
0
    }
7937
0
    case Hexagon::S4_pstorerbf_abs:
7938
0
    case Hexagon::S4_pstorerbfnew_abs:
7939
0
    case Hexagon::S4_pstorerbt_abs:
7940
0
    case Hexagon::S4_pstorerbtnew_abs:
7941
0
    case Hexagon::S4_pstorerdf_abs:
7942
0
    case Hexagon::S4_pstorerdfnew_abs:
7943
0
    case Hexagon::S4_pstorerdt_abs:
7944
0
    case Hexagon::S4_pstorerdtnew_abs:
7945
0
    case Hexagon::S4_pstorerff_abs:
7946
0
    case Hexagon::S4_pstorerffnew_abs:
7947
0
    case Hexagon::S4_pstorerft_abs:
7948
0
    case Hexagon::S4_pstorerftnew_abs:
7949
0
    case Hexagon::S4_pstorerhf_abs:
7950
0
    case Hexagon::S4_pstorerhfnew_abs:
7951
0
    case Hexagon::S4_pstorerht_abs:
7952
0
    case Hexagon::S4_pstorerhtnew_abs:
7953
0
    case Hexagon::S4_pstorerif_abs:
7954
0
    case Hexagon::S4_pstorerifnew_abs:
7955
0
    case Hexagon::S4_pstorerit_abs:
7956
0
    case Hexagon::S4_pstoreritnew_abs: {
7957
      // op: src1
7958
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7959
0
      Value |= op & UINT64_C(3);
7960
      // op: absaddr
7961
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7962
0
      Value |= (op & UINT64_C(48)) << 12;
7963
0
      Value |= (op & UINT64_C(15)) << 3;
7964
      // op: src2
7965
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7966
0
      Value |= (op & UINT64_C(31)) << 8;
7967
0
      break;
7968
0
    }
7969
0
    case Hexagon::S4_pstorerbnewf_abs:
7970
0
    case Hexagon::S4_pstorerbnewfnew_abs:
7971
0
    case Hexagon::S4_pstorerbnewt_abs:
7972
0
    case Hexagon::S4_pstorerbnewtnew_abs:
7973
0
    case Hexagon::S4_pstorerhnewf_abs:
7974
0
    case Hexagon::S4_pstorerhnewfnew_abs:
7975
0
    case Hexagon::S4_pstorerhnewt_abs:
7976
0
    case Hexagon::S4_pstorerhnewtnew_abs:
7977
0
    case Hexagon::S4_pstorerinewf_abs:
7978
0
    case Hexagon::S4_pstorerinewfnew_abs:
7979
0
    case Hexagon::S4_pstorerinewt_abs:
7980
0
    case Hexagon::S4_pstorerinewtnew_abs: {
7981
      // op: src1
7982
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7983
0
      Value |= op & UINT64_C(3);
7984
      // op: absaddr
7985
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
7986
0
      Value |= (op & UINT64_C(48)) << 12;
7987
0
      Value |= (op & UINT64_C(15)) << 3;
7988
      // op: src2
7989
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
7990
0
      Value |= (op & UINT64_C(7)) << 8;
7991
0
      break;
7992
0
    }
7993
0
    case Hexagon::S2_pstorerif_io:
7994
0
    case Hexagon::S2_pstorerit_io:
7995
0
    case Hexagon::S4_pstorerifnew_io:
7996
0
    case Hexagon::S4_pstoreritnew_io: {
7997
      // op: src1
7998
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
7999
0
      Value |= op & UINT64_C(3);
8000
      // op: src2
8001
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8002
0
      Value |= (op & UINT64_C(31)) << 16;
8003
      // op: src3
8004
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8005
0
      Value |= (op & UINT64_C(128)) << 6;
8006
0
      Value |= (op & UINT64_C(124)) << 1;
8007
      // op: src4
8008
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8009
0
      Value |= (op & UINT64_C(31)) << 8;
8010
0
      break;
8011
0
    }
8012
0
    case Hexagon::S2_pstorerinewf_io:
8013
0
    case Hexagon::S2_pstorerinewt_io:
8014
0
    case Hexagon::S4_pstorerinewfnew_io:
8015
0
    case Hexagon::S4_pstorerinewtnew_io: {
8016
      // op: src1
8017
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8018
0
      Value |= op & UINT64_C(3);
8019
      // op: src2
8020
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8021
0
      Value |= (op & UINT64_C(31)) << 16;
8022
      // op: src3
8023
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8024
0
      Value |= (op & UINT64_C(128)) << 6;
8025
0
      Value |= (op & UINT64_C(124)) << 1;
8026
      // op: src4
8027
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8028
0
      Value |= (op & UINT64_C(7)) << 8;
8029
0
      break;
8030
0
    }
8031
0
    case Hexagon::S2_pstorerdf_io:
8032
0
    case Hexagon::S2_pstorerdt_io:
8033
0
    case Hexagon::S4_pstorerdfnew_io:
8034
0
    case Hexagon::S4_pstorerdtnew_io: {
8035
      // op: src1
8036
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8037
0
      Value |= op & UINT64_C(3);
8038
      // op: src2
8039
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8040
0
      Value |= (op & UINT64_C(31)) << 16;
8041
      // op: src3
8042
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8043
0
      Value |= (op & UINT64_C(256)) << 5;
8044
0
      Value |= op & UINT64_C(248);
8045
      // op: src4
8046
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8047
0
      Value |= (op & UINT64_C(31)) << 8;
8048
0
      break;
8049
0
    }
8050
0
    case Hexagon::S2_pstorerbf_io:
8051
0
    case Hexagon::S2_pstorerbt_io:
8052
0
    case Hexagon::S4_pstorerbfnew_io:
8053
0
    case Hexagon::S4_pstorerbtnew_io: {
8054
      // op: src1
8055
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8056
0
      Value |= op & UINT64_C(3);
8057
      // op: src2
8058
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8059
0
      Value |= (op & UINT64_C(31)) << 16;
8060
      // op: src3
8061
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8062
0
      Value |= (op & UINT64_C(32)) << 8;
8063
0
      Value |= (op & UINT64_C(31)) << 3;
8064
      // op: src4
8065
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8066
0
      Value |= (op & UINT64_C(31)) << 8;
8067
0
      break;
8068
0
    }
8069
0
    case Hexagon::S2_pstorerbnewf_io:
8070
0
    case Hexagon::S2_pstorerbnewt_io:
8071
0
    case Hexagon::S4_pstorerbnewfnew_io:
8072
0
    case Hexagon::S4_pstorerbnewtnew_io: {
8073
      // op: src1
8074
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8075
0
      Value |= op & UINT64_C(3);
8076
      // op: src2
8077
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8078
0
      Value |= (op & UINT64_C(31)) << 16;
8079
      // op: src3
8080
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8081
0
      Value |= (op & UINT64_C(32)) << 8;
8082
0
      Value |= (op & UINT64_C(31)) << 3;
8083
      // op: src4
8084
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8085
0
      Value |= (op & UINT64_C(7)) << 8;
8086
0
      break;
8087
0
    }
8088
0
    case Hexagon::S2_pstorerff_io:
8089
0
    case Hexagon::S2_pstorerft_io:
8090
0
    case Hexagon::S2_pstorerhf_io:
8091
0
    case Hexagon::S2_pstorerht_io:
8092
0
    case Hexagon::S4_pstorerffnew_io:
8093
0
    case Hexagon::S4_pstorerftnew_io:
8094
0
    case Hexagon::S4_pstorerhfnew_io:
8095
0
    case Hexagon::S4_pstorerhtnew_io: {
8096
      // op: src1
8097
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8098
0
      Value |= op & UINT64_C(3);
8099
      // op: src2
8100
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8101
0
      Value |= (op & UINT64_C(31)) << 16;
8102
      // op: src3
8103
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8104
0
      Value |= (op & UINT64_C(64)) << 7;
8105
0
      Value |= (op & UINT64_C(62)) << 2;
8106
      // op: src4
8107
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8108
0
      Value |= (op & UINT64_C(31)) << 8;
8109
0
      break;
8110
0
    }
8111
0
    case Hexagon::S2_pstorerhnewf_io:
8112
0
    case Hexagon::S2_pstorerhnewt_io:
8113
0
    case Hexagon::S4_pstorerhnewfnew_io:
8114
0
    case Hexagon::S4_pstorerhnewtnew_io: {
8115
      // op: src1
8116
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8117
0
      Value |= op & UINT64_C(3);
8118
      // op: src2
8119
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8120
0
      Value |= (op & UINT64_C(31)) << 16;
8121
      // op: src3
8122
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8123
0
      Value |= (op & UINT64_C(64)) << 7;
8124
0
      Value |= (op & UINT64_C(62)) << 2;
8125
      // op: src4
8126
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8127
0
      Value |= (op & UINT64_C(7)) << 8;
8128
0
      break;
8129
0
    }
8130
0
    case Hexagon::V6_vS32Ub_npred_ppu:
8131
0
    case Hexagon::V6_vS32Ub_pred_ppu:
8132
0
    case Hexagon::V6_vS32b_npred_ppu:
8133
0
    case Hexagon::V6_vS32b_nqpred_ppu:
8134
0
    case Hexagon::V6_vS32b_nt_npred_ppu:
8135
0
    case Hexagon::V6_vS32b_nt_nqpred_ppu:
8136
0
    case Hexagon::V6_vS32b_nt_pred_ppu:
8137
0
    case Hexagon::V6_vS32b_nt_qpred_ppu:
8138
0
    case Hexagon::V6_vS32b_pred_ppu:
8139
0
    case Hexagon::V6_vS32b_qpred_ppu: {
8140
      // op: src1
8141
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8142
0
      Value |= (op & UINT64_C(3)) << 11;
8143
      // op: src2
8144
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8145
0
      Value |= (op & UINT64_C(31)) << 16;
8146
      // op: src3
8147
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8148
0
      Value |= (op & UINT64_C(1)) << 13;
8149
      // op: src4
8150
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8151
0
      Value |= op & UINT64_C(31);
8152
0
      break;
8153
0
    }
8154
0
    case Hexagon::V6_vS32b_new_npred_ppu:
8155
0
    case Hexagon::V6_vS32b_new_pred_ppu:
8156
0
    case Hexagon::V6_vS32b_nt_new_npred_ppu:
8157
0
    case Hexagon::V6_vS32b_nt_new_pred_ppu: {
8158
      // op: src1
8159
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8160
0
      Value |= (op & UINT64_C(3)) << 11;
8161
      // op: src2
8162
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8163
0
      Value |= (op & UINT64_C(31)) << 16;
8164
      // op: src3
8165
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8166
0
      Value |= (op & UINT64_C(1)) << 13;
8167
      // op: src4
8168
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8169
0
      Value |= op & UINT64_C(7);
8170
0
      break;
8171
0
    }
8172
0
    case Hexagon::V6_vS32Ub_npred_pi:
8173
0
    case Hexagon::V6_vS32Ub_pred_pi:
8174
0
    case Hexagon::V6_vS32b_npred_pi:
8175
0
    case Hexagon::V6_vS32b_nqpred_pi:
8176
0
    case Hexagon::V6_vS32b_nt_npred_pi:
8177
0
    case Hexagon::V6_vS32b_nt_nqpred_pi:
8178
0
    case Hexagon::V6_vS32b_nt_pred_pi:
8179
0
    case Hexagon::V6_vS32b_nt_qpred_pi:
8180
0
    case Hexagon::V6_vS32b_pred_pi:
8181
0
    case Hexagon::V6_vS32b_qpred_pi: {
8182
      // op: src1
8183
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8184
0
      Value |= (op & UINT64_C(3)) << 11;
8185
      // op: src2
8186
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8187
0
      Value |= (op & UINT64_C(31)) << 16;
8188
      // op: src3
8189
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8190
0
      Value |= (op & UINT64_C(448)) << 2;
8191
      // op: src4
8192
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8193
0
      Value |= op & UINT64_C(31);
8194
0
      break;
8195
0
    }
8196
0
    case Hexagon::V6_vS32b_new_npred_pi:
8197
0
    case Hexagon::V6_vS32b_new_pred_pi:
8198
0
    case Hexagon::V6_vS32b_nt_new_npred_pi:
8199
0
    case Hexagon::V6_vS32b_nt_new_pred_pi: {
8200
      // op: src1
8201
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8202
0
      Value |= (op & UINT64_C(3)) << 11;
8203
      // op: src2
8204
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8205
0
      Value |= (op & UINT64_C(31)) << 16;
8206
      // op: src3
8207
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8208
0
      Value |= (op & UINT64_C(448)) << 2;
8209
      // op: src4
8210
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8211
0
      Value |= op & UINT64_C(7);
8212
0
      break;
8213
0
    }
8214
0
    case Hexagon::V6_vS32Ub_npred_pi_128B:
8215
0
    case Hexagon::V6_vS32Ub_pred_pi_128B:
8216
0
    case Hexagon::V6_vS32b_npred_pi_128B:
8217
0
    case Hexagon::V6_vS32b_nqpred_pi_128B:
8218
0
    case Hexagon::V6_vS32b_nt_npred_pi_128B:
8219
0
    case Hexagon::V6_vS32b_nt_nqpred_pi_128B:
8220
0
    case Hexagon::V6_vS32b_nt_pred_pi_128B:
8221
0
    case Hexagon::V6_vS32b_nt_qpred_pi_128B:
8222
0
    case Hexagon::V6_vS32b_pred_pi_128B:
8223
0
    case Hexagon::V6_vS32b_qpred_pi_128B: {
8224
      // op: src1
8225
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8226
0
      Value |= (op & UINT64_C(3)) << 11;
8227
      // op: src2
8228
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8229
0
      Value |= (op & UINT64_C(31)) << 16;
8230
      // op: src3
8231
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8232
0
      Value |= (op & UINT64_C(896)) << 1;
8233
      // op: src4
8234
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8235
0
      Value |= op & UINT64_C(31);
8236
0
      break;
8237
0
    }
8238
0
    case Hexagon::V6_vS32b_new_npred_pi_128B:
8239
0
    case Hexagon::V6_vS32b_new_pred_pi_128B:
8240
0
    case Hexagon::V6_vS32b_nt_new_npred_pi_128B:
8241
0
    case Hexagon::V6_vS32b_nt_new_pred_pi_128B: {
8242
      // op: src1
8243
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8244
0
      Value |= (op & UINT64_C(3)) << 11;
8245
      // op: src2
8246
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8247
0
      Value |= (op & UINT64_C(31)) << 16;
8248
      // op: src3
8249
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8250
0
      Value |= (op & UINT64_C(896)) << 1;
8251
      // op: src4
8252
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8253
0
      Value |= op & UINT64_C(7);
8254
0
      break;
8255
0
    }
8256
0
    case Hexagon::V6_vaddbnq:
8257
0
    case Hexagon::V6_vaddbnq_128B:
8258
0
    case Hexagon::V6_vaddbq:
8259
0
    case Hexagon::V6_vaddbq_128B:
8260
0
    case Hexagon::V6_vaddhnq:
8261
0
    case Hexagon::V6_vaddhnq_128B:
8262
0
    case Hexagon::V6_vaddhq:
8263
0
    case Hexagon::V6_vaddhq_128B:
8264
0
    case Hexagon::V6_vaddwnq:
8265
0
    case Hexagon::V6_vaddwnq_128B:
8266
0
    case Hexagon::V6_vaddwq:
8267
0
    case Hexagon::V6_vaddwq_128B:
8268
0
    case Hexagon::V6_vsubbnq:
8269
0
    case Hexagon::V6_vsubbnq_128B:
8270
0
    case Hexagon::V6_vsubbq:
8271
0
    case Hexagon::V6_vsubbq_128B:
8272
0
    case Hexagon::V6_vsubhnq:
8273
0
    case Hexagon::V6_vsubhnq_128B:
8274
0
    case Hexagon::V6_vsubhq:
8275
0
    case Hexagon::V6_vsubhq_128B:
8276
0
    case Hexagon::V6_vsubwnq:
8277
0
    case Hexagon::V6_vsubwnq_128B:
8278
0
    case Hexagon::V6_vsubwq:
8279
0
    case Hexagon::V6_vsubwq_128B: {
8280
      // op: src1
8281
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8282
0
      Value |= (op & UINT64_C(3)) << 22;
8283
      // op: dst
8284
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8285
0
      Value |= op & UINT64_C(31);
8286
      // op: src2
8287
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8288
0
      Value |= (op & UINT64_C(31)) << 8;
8289
0
      break;
8290
0
    }
8291
0
    case Hexagon::V6_vcmov:
8292
0
    case Hexagon::V6_vcmov_128B:
8293
0
    case Hexagon::V6_vncmov:
8294
0
    case Hexagon::V6_vncmov_128B: {
8295
      // op: src1
8296
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8297
0
      Value |= (op & UINT64_C(3)) << 5;
8298
      // op: dst
8299
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8300
0
      Value |= op & UINT64_C(31);
8301
      // op: src2
8302
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8303
0
      Value |= (op & UINT64_C(31)) << 8;
8304
0
      break;
8305
0
    }
8306
0
    case Hexagon::V6_vccombine:
8307
0
    case Hexagon::V6_vccombine_128B:
8308
0
    case Hexagon::V6_vnccombine:
8309
0
    case Hexagon::V6_vnccombine_128B: {
8310
      // op: src1
8311
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8312
0
      Value |= (op & UINT64_C(3)) << 5;
8313
      // op: dst
8314
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8315
0
      Value |= op & UINT64_C(31);
8316
      // op: src2
8317
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8318
0
      Value |= (op & UINT64_C(31)) << 8;
8319
      // op: src3
8320
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8321
0
      Value |= (op & UINT64_C(31)) << 16;
8322
0
      break;
8323
0
    }
8324
0
    case Hexagon::S2_asl_i_vh:
8325
0
    case Hexagon::S2_asr_i_vh:
8326
0
    case Hexagon::S2_lsr_i_vh: {
8327
      // op: src1
8328
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8329
0
      Value |= (op & UINT64_C(31)) << 16;
8330
      // op: dst
8331
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8332
0
      Value |= op & UINT64_C(31);
8333
      // op: src2
8334
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8335
0
      Value |= (op & UINT64_C(15)) << 8;
8336
0
      break;
8337
0
    }
8338
0
    case Hexagon::S2_asl_i_vw:
8339
0
    case Hexagon::S2_asr_i_vw:
8340
0
    case Hexagon::S2_lsr_i_vw: {
8341
      // op: src1
8342
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8343
0
      Value |= (op & UINT64_C(31)) << 16;
8344
      // op: dst
8345
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8346
0
      Value |= op & UINT64_C(31);
8347
      // op: src2
8348
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8349
0
      Value |= (op & UINT64_C(31)) << 8;
8350
0
      break;
8351
0
    }
8352
0
    case Hexagon::S2_asl_i_p:
8353
0
    case Hexagon::S2_asr_i_p:
8354
0
    case Hexagon::S2_asr_i_p_rnd:
8355
0
    case Hexagon::S2_lsr_i_p: {
8356
      // op: src1
8357
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8358
0
      Value |= (op & UINT64_C(31)) << 16;
8359
      // op: dst
8360
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8361
0
      Value |= op & UINT64_C(31);
8362
      // op: src2
8363
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8364
0
      Value |= (op & UINT64_C(63)) << 8;
8365
0
      break;
8366
0
    }
8367
0
    case Hexagon::S2_storerb_pr:
8368
0
    case Hexagon::S2_storerd_pr:
8369
0
    case Hexagon::S2_storerf_pr:
8370
0
    case Hexagon::S2_storerh_pr:
8371
0
    case Hexagon::S2_storeri_pr: {
8372
      // op: src1
8373
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8374
0
      Value |= (op & UINT64_C(31)) << 16;
8375
      // op: src2
8376
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8377
0
      Value |= (op & UINT64_C(1)) << 13;
8378
      // op: src3
8379
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8380
0
      Value |= (op & UINT64_C(31)) << 8;
8381
0
      break;
8382
0
    }
8383
0
    case Hexagon::S2_storerbnew_pr:
8384
0
    case Hexagon::S2_storerhnew_pr:
8385
0
    case Hexagon::S2_storerinew_pr: {
8386
      // op: src1
8387
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8388
0
      Value |= (op & UINT64_C(31)) << 16;
8389
      // op: src2
8390
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8391
0
      Value |= (op & UINT64_C(1)) << 13;
8392
      // op: src3
8393
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8394
0
      Value |= (op & UINT64_C(7)) << 8;
8395
0
      break;
8396
0
    }
8397
0
    case Hexagon::V6_vS32Ub_ppu:
8398
0
    case Hexagon::V6_vS32b_nt_ppu:
8399
0
    case Hexagon::V6_vS32b_ppu: {
8400
      // op: src1
8401
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8402
0
      Value |= (op & UINT64_C(31)) << 16;
8403
      // op: src2
8404
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8405
0
      Value |= (op & UINT64_C(1)) << 13;
8406
      // op: src3
8407
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8408
0
      Value |= op & UINT64_C(31);
8409
0
      break;
8410
0
    }
8411
0
    case Hexagon::V6_vS32b_new_ppu:
8412
0
    case Hexagon::V6_vS32b_nt_new_ppu: {
8413
      // op: src1
8414
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8415
0
      Value |= (op & UINT64_C(31)) << 16;
8416
      // op: src2
8417
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8418
0
      Value |= (op & UINT64_C(1)) << 13;
8419
      // op: src3
8420
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8421
0
      Value |= op & UINT64_C(7);
8422
0
      break;
8423
0
    }
8424
0
    case Hexagon::V6_vS32Ub_pi:
8425
0
    case Hexagon::V6_vS32b_nt_pi:
8426
0
    case Hexagon::V6_vS32b_pi: {
8427
      // op: src1
8428
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8429
0
      Value |= (op & UINT64_C(31)) << 16;
8430
      // op: src2
8431
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8432
0
      Value |= (op & UINT64_C(448)) << 2;
8433
      // op: src3
8434
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8435
0
      Value |= op & UINT64_C(31);
8436
0
      break;
8437
0
    }
8438
0
    case Hexagon::V6_vS32b_new_pi:
8439
0
    case Hexagon::V6_vS32b_nt_new_pi: {
8440
      // op: src1
8441
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8442
0
      Value |= (op & UINT64_C(31)) << 16;
8443
      // op: src2
8444
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8445
0
      Value |= (op & UINT64_C(448)) << 2;
8446
      // op: src3
8447
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8448
0
      Value |= op & UINT64_C(7);
8449
0
      break;
8450
0
    }
8451
0
    case Hexagon::V6_vS32Ub_pi_128B:
8452
0
    case Hexagon::V6_vS32b_nt_pi_128B:
8453
0
    case Hexagon::V6_vS32b_pi_128B: {
8454
      // op: src1
8455
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8456
0
      Value |= (op & UINT64_C(31)) << 16;
8457
      // op: src2
8458
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8459
0
      Value |= (op & UINT64_C(896)) << 1;
8460
      // op: src3
8461
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8462
0
      Value |= op & UINT64_C(31);
8463
0
      break;
8464
0
    }
8465
0
    case Hexagon::V6_vS32b_new_pi_128B:
8466
0
    case Hexagon::V6_vS32b_nt_new_pi_128B: {
8467
      // op: src1
8468
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8469
0
      Value |= (op & UINT64_C(31)) << 16;
8470
      // op: src2
8471
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8472
0
      Value |= (op & UINT64_C(896)) << 1;
8473
      // op: src3
8474
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8475
0
      Value |= op & UINT64_C(7);
8476
0
      break;
8477
0
    }
8478
0
    case Hexagon::S2_storerb_pi: {
8479
      // op: src1
8480
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8481
0
      Value |= (op & UINT64_C(31)) << 16;
8482
      // op: src2
8483
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8484
0
      Value |= (op & UINT64_C(31)) << 8;
8485
      // op: offset
8486
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8487
0
      Value |= (op & UINT64_C(15)) << 3;
8488
0
      break;
8489
0
    }
8490
0
    case Hexagon::S2_storerf_pi:
8491
0
    case Hexagon::S2_storerh_pi: {
8492
      // op: src1
8493
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8494
0
      Value |= (op & UINT64_C(31)) << 16;
8495
      // op: src2
8496
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8497
0
      Value |= (op & UINT64_C(31)) << 8;
8498
      // op: offset
8499
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8500
0
      Value |= (op & UINT64_C(30)) << 2;
8501
0
      break;
8502
0
    }
8503
0
    case Hexagon::S2_storeri_pi: {
8504
      // op: src1
8505
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8506
0
      Value |= (op & UINT64_C(31)) << 16;
8507
      // op: src2
8508
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8509
0
      Value |= (op & UINT64_C(31)) << 8;
8510
      // op: offset
8511
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8512
0
      Value |= (op & UINT64_C(60)) << 1;
8513
0
      break;
8514
0
    }
8515
0
    case Hexagon::S2_storerd_pi: {
8516
      // op: src1
8517
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8518
0
      Value |= (op & UINT64_C(31)) << 16;
8519
      // op: src2
8520
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8521
0
      Value |= (op & UINT64_C(31)) << 8;
8522
      // op: offset
8523
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8524
0
      Value |= op & UINT64_C(120);
8525
0
      break;
8526
0
    }
8527
0
    case Hexagon::S2_storerbnew_pi: {
8528
      // op: src1
8529
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8530
0
      Value |= (op & UINT64_C(31)) << 16;
8531
      // op: src2
8532
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8533
0
      Value |= (op & UINT64_C(7)) << 8;
8534
      // op: offset
8535
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8536
0
      Value |= (op & UINT64_C(15)) << 3;
8537
0
      break;
8538
0
    }
8539
0
    case Hexagon::S2_storerhnew_pi: {
8540
      // op: src1
8541
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8542
0
      Value |= (op & UINT64_C(31)) << 16;
8543
      // op: src2
8544
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8545
0
      Value |= (op & UINT64_C(7)) << 8;
8546
      // op: offset
8547
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8548
0
      Value |= (op & UINT64_C(30)) << 2;
8549
0
      break;
8550
0
    }
8551
0
    case Hexagon::S2_storerinew_pi: {
8552
      // op: src1
8553
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8554
0
      Value |= (op & UINT64_C(31)) << 16;
8555
      // op: src2
8556
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8557
0
      Value |= (op & UINT64_C(7)) << 8;
8558
      // op: offset
8559
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8560
0
      Value |= (op & UINT64_C(60)) << 1;
8561
0
      break;
8562
0
    }
8563
0
    case Hexagon::S2_pstorerbf_pi:
8564
0
    case Hexagon::S2_pstorerbfnew_pi:
8565
0
    case Hexagon::S2_pstorerbt_pi:
8566
0
    case Hexagon::S2_pstorerbtnew_pi: {
8567
      // op: src1
8568
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8569
0
      Value |= op & UINT64_C(3);
8570
      // op: src2
8571
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8572
0
      Value |= (op & UINT64_C(31)) << 16;
8573
      // op: offset
8574
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8575
0
      Value |= (op & UINT64_C(15)) << 3;
8576
      // op: src3
8577
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8578
0
      Value |= (op & UINT64_C(31)) << 8;
8579
0
      break;
8580
0
    }
8581
0
    case Hexagon::S2_pstorerff_pi:
8582
0
    case Hexagon::S2_pstorerffnew_pi:
8583
0
    case Hexagon::S2_pstorerft_pi:
8584
0
    case Hexagon::S2_pstorerftnew_pi:
8585
0
    case Hexagon::S2_pstorerhf_pi:
8586
0
    case Hexagon::S2_pstorerhfnew_pi:
8587
0
    case Hexagon::S2_pstorerht_pi:
8588
0
    case Hexagon::S2_pstorerhtnew_pi: {
8589
      // op: src1
8590
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8591
0
      Value |= op & UINT64_C(3);
8592
      // op: src2
8593
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8594
0
      Value |= (op & UINT64_C(31)) << 16;
8595
      // op: offset
8596
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8597
0
      Value |= (op & UINT64_C(30)) << 2;
8598
      // op: src3
8599
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8600
0
      Value |= (op & UINT64_C(31)) << 8;
8601
0
      break;
8602
0
    }
8603
0
    case Hexagon::S2_pstorerif_pi:
8604
0
    case Hexagon::S2_pstorerifnew_pi:
8605
0
    case Hexagon::S2_pstorerit_pi:
8606
0
    case Hexagon::S2_pstoreritnew_pi: {
8607
      // op: src1
8608
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8609
0
      Value |= op & UINT64_C(3);
8610
      // op: src2
8611
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8612
0
      Value |= (op & UINT64_C(31)) << 16;
8613
      // op: offset
8614
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8615
0
      Value |= (op & UINT64_C(60)) << 1;
8616
      // op: src3
8617
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8618
0
      Value |= (op & UINT64_C(31)) << 8;
8619
0
      break;
8620
0
    }
8621
0
    case Hexagon::S2_pstorerdf_pi:
8622
0
    case Hexagon::S2_pstorerdfnew_pi:
8623
0
    case Hexagon::S2_pstorerdt_pi:
8624
0
    case Hexagon::S2_pstorerdtnew_pi: {
8625
      // op: src1
8626
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8627
0
      Value |= op & UINT64_C(3);
8628
      // op: src2
8629
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8630
0
      Value |= (op & UINT64_C(31)) << 16;
8631
      // op: offset
8632
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8633
0
      Value |= op & UINT64_C(120);
8634
      // op: src3
8635
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8636
0
      Value |= (op & UINT64_C(31)) << 8;
8637
0
      break;
8638
0
    }
8639
0
    case Hexagon::S2_pstorerbnewf_pi:
8640
0
    case Hexagon::S2_pstorerbnewfnew_pi:
8641
0
    case Hexagon::S2_pstorerbnewt_pi:
8642
0
    case Hexagon::S2_pstorerbnewtnew_pi: {
8643
      // op: src1
8644
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8645
0
      Value |= op & UINT64_C(3);
8646
      // op: src2
8647
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8648
0
      Value |= (op & UINT64_C(31)) << 16;
8649
      // op: src3
8650
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8651
0
      Value |= (op & UINT64_C(7)) << 8;
8652
      // op: offset
8653
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8654
0
      Value |= (op & UINT64_C(15)) << 3;
8655
0
      break;
8656
0
    }
8657
0
    case Hexagon::S2_pstorerhnewf_pi:
8658
0
    case Hexagon::S2_pstorerhnewfnew_pi:
8659
0
    case Hexagon::S2_pstorerhnewt_pi:
8660
0
    case Hexagon::S2_pstorerhnewtnew_pi: {
8661
      // op: src1
8662
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8663
0
      Value |= op & UINT64_C(3);
8664
      // op: src2
8665
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8666
0
      Value |= (op & UINT64_C(31)) << 16;
8667
      // op: src3
8668
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8669
0
      Value |= (op & UINT64_C(7)) << 8;
8670
      // op: offset
8671
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8672
0
      Value |= (op & UINT64_C(30)) << 2;
8673
0
      break;
8674
0
    }
8675
0
    case Hexagon::S2_pstorerinewf_pi:
8676
0
    case Hexagon::S2_pstorerinewfnew_pi:
8677
0
    case Hexagon::S2_pstorerinewt_pi:
8678
0
    case Hexagon::S2_pstorerinewtnew_pi: {
8679
      // op: src1
8680
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8681
0
      Value |= op & UINT64_C(3);
8682
      // op: src2
8683
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8684
0
      Value |= (op & UINT64_C(31)) << 16;
8685
      // op: src3
8686
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8687
0
      Value |= (op & UINT64_C(7)) << 8;
8688
      // op: offset
8689
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8690
0
      Value |= (op & UINT64_C(60)) << 1;
8691
0
      break;
8692
0
    }
8693
0
    case Hexagon::V6_vdeal:
8694
0
    case Hexagon::V6_vdeal_128B:
8695
0
    case Hexagon::V6_vshuff:
8696
0
    case Hexagon::V6_vshuff_128B: {
8697
      // op: src1
8698
0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
8699
0
      Value |= (op & UINT64_C(31)) << 8;
8700
      // op: src2
8701
0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
8702
0
      Value |= op & UINT64_C(31);
8703
      // op: src3
8704
0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
8705
0
      Value |= (op & UINT64_C(31)) << 16;
8706
0
      break;
8707
0
    }
8708
0
    case Hexagon::S2_allocframe: {
8709
      // op: u11_3
8710
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8711
0
      Value |= (op & UINT64_C(16376)) >> 3;
8712
0
      break;
8713
0
    }
8714
0
    case Hexagon::V4_SS2_storew_sp: {
8715
      // op: u5_2
8716
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8717
0
      Value |= (op & UINT64_C(124)) << 2;
8718
      // op: Rt
8719
0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
8720
0
      Value |= op & UINT64_C(15);
8721
0
      break;
8722
0
    }
8723
0
    case Hexagon::V4_SS2_allocframe: {
8724
      // op: u5_3
8725
0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
8726
0
      Value |= (op & UINT64_C(248)) << 1;
8727
0
      break;
8728
0
    }
8729
0
  default:
8730
0
    std::string msg;
8731
0
    raw_string_ostream Msg(msg);
8732
0
    Msg << "Not supported instr: " << MI;
8733
0
    report_fatal_error(Msg.str());
8734
5.77k
  }
8735
5.77k
  return Value;
8736
5.77k
}
8737