Coverage Report

Created: 2026-09-07 06:44

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/aom/aom_dsp/x86/obmc_variance_avx2.c
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Source
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/*
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 * Copyright (c) 2018, Alliance for Open Media. All rights reserved.
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 *
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 * This source code is subject to the terms of the BSD 2 Clause License and
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 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
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 * was not distributed with this source code in the LICENSE file, you can
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 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
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 * Media Patent License 1.0 was not distributed with this source code in the
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 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
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 */
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#include <assert.h>
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#include <immintrin.h>
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#include "config/aom_config.h"
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#include "config/aom_dsp_rtcd.h"
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#include "aom_ports/mem.h"
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#include "aom/aom_integer.h"
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#include "aom_dsp/aom_dsp_common.h"
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#include "aom_dsp/aom_filter.h"
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#include "aom_dsp/x86/obmc_intrinsic_sse4.h"
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////////////////////////////////////////////////////////////////////////////////
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// 8 bit
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////////////////////////////////////////////////////////////////////////////////
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static inline void obmc_variance_w8n(const uint8_t *pre, const int pre_stride,
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                                     const int32_t *wsrc, const int32_t *mask,
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                                     unsigned int *const sse, int *const sum,
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0
                                     const int w, const int h) {
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0
  int n = 0, width, height = h;
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0
  __m128i v_sum_d = _mm_setzero_si128();
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  __m128i v_sse_d = _mm_setzero_si128();
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  const __m256i v_bias_d = _mm256_set1_epi32((1 << 12) >> 1);
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  __m128i v_d;
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  const uint8_t *pre_temp;
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  assert(w >= 8);
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  assert(IS_POWER_OF_TWO(w));
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  assert(IS_POWER_OF_TWO(h));
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  do {
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    width = w;
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0
    pre_temp = pre;
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    do {
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      const __m128i v_p_b = _mm_loadl_epi64((const __m128i *)pre_temp);
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      const __m256i v_m_d = _mm256_loadu_si256((__m256i const *)(mask + n));
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      const __m256i v_w_d = _mm256_loadu_si256((__m256i const *)(wsrc + n));
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      const __m256i v_p0_d = _mm256_cvtepu8_epi32(v_p_b);
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      // Values in both pre and mask fit in 15 bits, and are packed at 32 bit
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      // boundaries. We use pmaddwd, as it has lower latency on Haswell
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      // than pmulld but produces the same result with these inputs.
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      const __m256i v_pm_d = _mm256_madd_epi16(v_p0_d, v_m_d);
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      const __m256i v_diff0_d = _mm256_sub_epi32(v_w_d, v_pm_d);
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      const __m256i v_sign_d = _mm256_srai_epi32(v_diff0_d, 31);
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      const __m256i v_tmp_d =
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          _mm256_add_epi32(_mm256_add_epi32(v_diff0_d, v_bias_d), v_sign_d);
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      const __m256i v_rdiff0_d = _mm256_srai_epi32(v_tmp_d, 12);
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      const __m128i v_rdiff_d = _mm256_castsi256_si128(v_rdiff0_d);
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      const __m128i v_rdiff1_d = _mm256_extracti128_si256(v_rdiff0_d, 1);
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      const __m128i v_rdiff01_w = _mm_packs_epi32(v_rdiff_d, v_rdiff1_d);
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      const __m128i v_sqrdiff_d = _mm_madd_epi16(v_rdiff01_w, v_rdiff01_w);
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      v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff_d);
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      v_sum_d = _mm_add_epi32(v_sum_d, v_rdiff1_d);
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      v_sse_d = _mm_add_epi32(v_sse_d, v_sqrdiff_d);
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      pre_temp += 8;
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      n += 8;
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      width -= 8;
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    } while (width > 0);
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    pre += pre_stride;
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    height -= 1;
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  } while (height > 0);
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  v_d = _mm_hadd_epi32(v_sum_d, v_sse_d);
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  v_d = _mm_hadd_epi32(v_d, v_d);
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  *sum = _mm_cvtsi128_si32(v_d);
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  *sse = (unsigned int)_mm_cvtsi128_si32(_mm_srli_si128(v_d, 4));
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}
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static inline void obmc_variance_w16n(const uint8_t *pre, const int pre_stride,
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                                      const int32_t *wsrc, const int32_t *mask,
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                                      unsigned int *const sse, int *const sum,
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0
                                      const int w, const int h) {
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  int n = 0, width, height = h;
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  __m256i v_d;
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  __m128i res0;
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  const uint8_t *pre_temp;
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  const __m256i v_bias_d = _mm256_set1_epi32((1 << 12) >> 1);
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  __m256i v_sum_d = _mm256_setzero_si256();
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  __m256i v_sse_d = _mm256_setzero_si256();
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  assert(w >= 16);
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  assert(IS_POWER_OF_TWO(w));
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  assert(IS_POWER_OF_TWO(h));
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  do {
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    width = w;
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    pre_temp = pre;
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    do {
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      const __m128i v_p_b = _mm_loadu_si128((__m128i *)pre_temp);
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      const __m256i v_m0_d = _mm256_loadu_si256((__m256i const *)(mask + n));
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      const __m256i v_w0_d = _mm256_loadu_si256((__m256i const *)(wsrc + n));
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      const __m256i v_m1_d =
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          _mm256_loadu_si256((__m256i const *)(mask + n + 8));
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      const __m256i v_w1_d =
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          _mm256_loadu_si256((__m256i const *)(wsrc + n + 8));
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      const __m256i v_p0_d = _mm256_cvtepu8_epi32(v_p_b);
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      const __m256i v_p1_d = _mm256_cvtepu8_epi32(_mm_srli_si128(v_p_b, 8));
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      const __m256i v_pm0_d = _mm256_madd_epi16(v_p0_d, v_m0_d);
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      const __m256i v_pm1_d = _mm256_madd_epi16(v_p1_d, v_m1_d);
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      const __m256i v_diff0_d = _mm256_sub_epi32(v_w0_d, v_pm0_d);
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      const __m256i v_diff1_d = _mm256_sub_epi32(v_w1_d, v_pm1_d);
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      const __m256i v_sign0_d = _mm256_srai_epi32(v_diff0_d, 31);
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      const __m256i v_sign1_d = _mm256_srai_epi32(v_diff1_d, 31);
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      const __m256i v_tmp0_d =
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0
          _mm256_add_epi32(_mm256_add_epi32(v_diff0_d, v_bias_d), v_sign0_d);
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      const __m256i v_tmp1_d =
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          _mm256_add_epi32(_mm256_add_epi32(v_diff1_d, v_bias_d), v_sign1_d);
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      const __m256i v_rdiff0_d = _mm256_srai_epi32(v_tmp0_d, 12);
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      const __m256i v_rdiff2_d = _mm256_srai_epi32(v_tmp1_d, 12);
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      const __m256i v_rdiff1_d = _mm256_add_epi32(v_rdiff0_d, v_rdiff2_d);
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      const __m256i v_rdiff01_w = _mm256_packs_epi32(v_rdiff0_d, v_rdiff2_d);
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      const __m256i v_sqrdiff_d = _mm256_madd_epi16(v_rdiff01_w, v_rdiff01_w);
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      v_sum_d = _mm256_add_epi32(v_sum_d, v_rdiff1_d);
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      v_sse_d = _mm256_add_epi32(v_sse_d, v_sqrdiff_d);
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      pre_temp += 16;
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      n += 16;
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      width -= 16;
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    } while (width > 0);
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    pre += pre_stride;
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    height -= 1;
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  } while (height > 0);
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  v_d = _mm256_hadd_epi32(v_sum_d, v_sse_d);
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  v_d = _mm256_hadd_epi32(v_d, v_d);
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  res0 = _mm256_castsi256_si128(v_d);
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  res0 = _mm_add_epi32(res0, _mm256_extractf128_si256(v_d, 1));
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  *sum = _mm_cvtsi128_si32(res0);
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  *sse = (unsigned int)_mm_cvtsi128_si32(_mm_srli_si128(res0, 4));
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0
}
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#define OBMCVARWXH(W, H)                                                \
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  unsigned int aom_obmc_variance##W##x##H##_avx2(                       \
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      const uint8_t *pre, int pre_stride, const int32_t *wsrc,          \
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0
      const int32_t *mask, unsigned int *sse) {                         \
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0
    int sum;                                                            \
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0
    if (W == 4) {                                                       \
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0
      obmc_variance_w4(pre, pre_stride, wsrc, mask, sse, &sum, H);      \
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0
    } else if (W == 8) {                                                \
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      obmc_variance_w8n(pre, pre_stride, wsrc, mask, sse, &sum, W, H);  \
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0
    } else {                                                            \
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      obmc_variance_w16n(pre, pre_stride, wsrc, mask, sse, &sum, W, H); \
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0
    }                                                                   \
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0
                                                                        \
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    return *sse - (unsigned int)(((int64_t)sum * sum) / (W * H));       \
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0
  }
Unexecuted instantiation: aom_obmc_variance128x128_avx2
Unexecuted instantiation: aom_obmc_variance128x64_avx2
Unexecuted instantiation: aom_obmc_variance64x128_avx2
Unexecuted instantiation: aom_obmc_variance64x64_avx2
Unexecuted instantiation: aom_obmc_variance64x32_avx2
Unexecuted instantiation: aom_obmc_variance32x64_avx2
Unexecuted instantiation: aom_obmc_variance32x32_avx2
Unexecuted instantiation: aom_obmc_variance32x16_avx2
Unexecuted instantiation: aom_obmc_variance16x32_avx2
Unexecuted instantiation: aom_obmc_variance16x16_avx2
Unexecuted instantiation: aom_obmc_variance16x8_avx2
Unexecuted instantiation: aom_obmc_variance8x16_avx2
Unexecuted instantiation: aom_obmc_variance8x8_avx2
Unexecuted instantiation: aom_obmc_variance8x4_avx2
Unexecuted instantiation: aom_obmc_variance4x8_avx2
Unexecuted instantiation: aom_obmc_variance4x4_avx2
Unexecuted instantiation: aom_obmc_variance4x16_avx2
Unexecuted instantiation: aom_obmc_variance16x4_avx2
Unexecuted instantiation: aom_obmc_variance8x32_avx2
Unexecuted instantiation: aom_obmc_variance32x8_avx2
Unexecuted instantiation: aom_obmc_variance16x64_avx2
Unexecuted instantiation: aom_obmc_variance64x16_avx2
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OBMCVARWXH(128, 128)
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OBMCVARWXH(128, 64)
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OBMCVARWXH(64, 128)
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OBMCVARWXH(64, 64)
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OBMCVARWXH(64, 32)
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OBMCVARWXH(32, 64)
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OBMCVARWXH(32, 32)
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OBMCVARWXH(32, 16)
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OBMCVARWXH(16, 32)
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OBMCVARWXH(16, 16)
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OBMCVARWXH(16, 8)
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OBMCVARWXH(8, 16)
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OBMCVARWXH(8, 8)
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OBMCVARWXH(8, 4)
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OBMCVARWXH(4, 8)
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OBMCVARWXH(4, 4)
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OBMCVARWXH(4, 16)
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OBMCVARWXH(16, 4)
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OBMCVARWXH(8, 32)
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OBMCVARWXH(32, 8)
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OBMCVARWXH(16, 64)
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OBMCVARWXH(64, 16)