Coverage Report

Created: 2026-11-12 08:20

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/aom/aom_dsp/x86/sum_squares_sse2.c
Line
Count
Source
1
/*
2
 * Copyright (c) 2016, Alliance for Open Media. All rights reserved.
3
 *
4
 * This source code is subject to the terms of the BSD 2 Clause License and
5
 * the Alliance for Open Media Patent License 1.0. If the BSD 2 Clause License
6
 * was not distributed with this source code in the LICENSE file, you can
7
 * obtain it at www.aomedia.org/license/software. If the Alliance for Open
8
 * Media Patent License 1.0 was not distributed with this source code in the
9
 * PATENTS file, you can obtain it at www.aomedia.org/license/patent.
10
 */
11
12
#include <assert.h>
13
#include <emmintrin.h>
14
#include <stdio.h>
15
16
#include "aom_dsp/x86/synonyms.h"
17
#include "aom_dsp/x86/sum_squares_sse2.h"
18
#include "config/aom_dsp_rtcd.h"
19
20
0
static inline __m128i xx_loadh_64(__m128i a, const void *b) {
21
0
  const __m128d ad = _mm_castsi128_pd(a);
22
0
  return _mm_castpd_si128(_mm_loadh_pd(ad, (double *)b));
23
0
}
24
25
0
static inline uint64_t xx_cvtsi128_si64(__m128i a) {
26
0
#if AOM_ARCH_X86_64
27
0
  return (uint64_t)_mm_cvtsi128_si64(a);
28
#else
29
  {
30
    uint64_t tmp;
31
    _mm_storel_epi64((__m128i *)&tmp, a);
32
    return tmp;
33
  }
34
#endif
35
0
}
36
37
0
static inline __m128i sum_squares_i16_4x4_sse2(const int16_t *src, int stride) {
38
0
  const __m128i v_val_0_w = xx_loadl_64(src + 0 * stride);
39
0
  const __m128i v_val_2_w = xx_loadl_64(src + 2 * stride);
40
0
  const __m128i v_val_01_w = xx_loadh_64(v_val_0_w, src + 1 * stride);
41
0
  const __m128i v_val_23_w = xx_loadh_64(v_val_2_w, src + 3 * stride);
42
0
  const __m128i v_sq_01_d = _mm_madd_epi16(v_val_01_w, v_val_01_w);
43
0
  const __m128i v_sq_23_d = _mm_madd_epi16(v_val_23_w, v_val_23_w);
44
45
0
  return _mm_add_epi32(v_sq_01_d, v_sq_23_d);
46
0
}
47
48
0
uint64_t aom_sum_squares_2d_i16_4x4_sse2(const int16_t *src, int stride) {
49
0
  const __m128i v_sum_0123_d = sum_squares_i16_4x4_sse2(src, stride);
50
0
  __m128i v_sum_d =
51
0
      _mm_add_epi32(v_sum_0123_d, _mm_srli_epi64(v_sum_0123_d, 32));
52
0
  v_sum_d = _mm_add_epi32(v_sum_d, _mm_srli_si128(v_sum_d, 8));
53
0
  return (uint64_t)_mm_cvtsi128_si32(v_sum_d);
54
0
}
55
56
0
uint64_t aom_sum_sse_2d_i16_4x4_sse2(const int16_t *src, int stride, int *sum) {
57
0
  const __m128i one_reg = _mm_set1_epi16(1);
58
0
  const __m128i v_val_0_w = xx_loadl_64(src + 0 * stride);
59
0
  const __m128i v_val_2_w = xx_loadl_64(src + 2 * stride);
60
0
  __m128i v_val_01_w = xx_loadh_64(v_val_0_w, src + 1 * stride);
61
0
  __m128i v_val_23_w = xx_loadh_64(v_val_2_w, src + 3 * stride);
62
63
0
  __m128i v_sum_0123_d = _mm_add_epi16(v_val_01_w, v_val_23_w);
64
0
  v_sum_0123_d = _mm_madd_epi16(v_sum_0123_d, one_reg);
65
0
  v_sum_0123_d = _mm_add_epi32(v_sum_0123_d, _mm_srli_si128(v_sum_0123_d, 8));
66
0
  v_sum_0123_d = _mm_add_epi32(v_sum_0123_d, _mm_srli_si128(v_sum_0123_d, 4));
67
0
  *sum = _mm_cvtsi128_si32(v_sum_0123_d);
68
69
0
  const __m128i v_sq_01_d = _mm_madd_epi16(v_val_01_w, v_val_01_w);
70
0
  const __m128i v_sq_23_d = _mm_madd_epi16(v_val_23_w, v_val_23_w);
71
0
  __m128i v_sq_0123_d = _mm_add_epi32(v_sq_01_d, v_sq_23_d);
72
0
  v_sq_0123_d = _mm_add_epi32(v_sq_0123_d, _mm_srli_si128(v_sq_0123_d, 8));
73
0
  v_sq_0123_d = _mm_add_epi32(v_sq_0123_d, _mm_srli_si128(v_sq_0123_d, 4));
74
0
  return (uint64_t)_mm_cvtsi128_si32(v_sq_0123_d);
75
0
}
76
77
uint64_t aom_sum_squares_2d_i16_4xn_sse2(const int16_t *src, int stride,
78
0
                                         int height) {
79
0
  int r = 0;
80
0
  __m128i v_acc_q = _mm_setzero_si128();
81
0
  do {
82
0
    const __m128i v_acc_d = sum_squares_i16_4x4_sse2(src, stride);
83
0
    v_acc_q = _mm_add_epi32(v_acc_q, v_acc_d);
84
0
    src += stride << 2;
85
0
    r += 4;
86
0
  } while (r < height);
87
0
  const __m128i v_zext_mask_q = _mm_set1_epi64x(~0u);
88
0
  __m128i v_acc_64 = _mm_add_epi64(_mm_srli_epi64(v_acc_q, 32),
89
0
                                   _mm_and_si128(v_acc_q, v_zext_mask_q));
90
0
  v_acc_64 = _mm_add_epi64(v_acc_64, _mm_srli_si128(v_acc_64, 8));
91
0
  return xx_cvtsi128_si64(v_acc_64);
92
0
}
93
94
uint64_t aom_sum_sse_2d_i16_4xn_sse2(const int16_t *src, int stride, int height,
95
0
                                     int *sum) {
96
0
  int r = 0;
97
0
  uint64_t sse = 0;
98
0
  do {
99
0
    int curr_sum = 0;
100
0
    sse += aom_sum_sse_2d_i16_4x4_sse2(src, stride, &curr_sum);
101
0
    *sum += curr_sum;
102
0
    src += stride << 2;
103
0
    r += 4;
104
0
  } while (r < height);
105
0
  return sse;
106
0
}
107
108
#ifdef __GNUC__
109
// This prevents GCC/Clang from inlining this function into
110
// aom_sum_squares_2d_i16_sse2, which in turn saves some stack
111
// maintenance instructions in the common case of 4x4.
112
__attribute__((noinline))
113
#endif
114
uint64_t aom_sum_squares_2d_i16_nxn_sse2(const int16_t *src, int stride,
115
0
                                         int width, int height) {
116
0
  int r = 0;
117
118
0
  const __m128i v_zext_mask_q = _mm_set1_epi64x(~0u);
119
0
  __m128i v_acc_q = _mm_setzero_si128();
120
121
0
  do {
122
0
    __m128i v_acc_d = _mm_setzero_si128();
123
0
    int c = 0;
124
0
    do {
125
0
      const int16_t *b = src + c;
126
127
0
      const __m128i v_val_0_w = xx_load_128(b + 0 * stride);
128
0
      const __m128i v_val_1_w = xx_load_128(b + 1 * stride);
129
0
      const __m128i v_val_2_w = xx_load_128(b + 2 * stride);
130
0
      const __m128i v_val_3_w = xx_load_128(b + 3 * stride);
131
132
0
      const __m128i v_sq_0_d = _mm_madd_epi16(v_val_0_w, v_val_0_w);
133
0
      const __m128i v_sq_1_d = _mm_madd_epi16(v_val_1_w, v_val_1_w);
134
0
      const __m128i v_sq_2_d = _mm_madd_epi16(v_val_2_w, v_val_2_w);
135
0
      const __m128i v_sq_3_d = _mm_madd_epi16(v_val_3_w, v_val_3_w);
136
137
0
      const __m128i v_sum_01_d = _mm_add_epi32(v_sq_0_d, v_sq_1_d);
138
0
      const __m128i v_sum_23_d = _mm_add_epi32(v_sq_2_d, v_sq_3_d);
139
140
0
      const __m128i v_sum_0123_d = _mm_add_epi32(v_sum_01_d, v_sum_23_d);
141
142
0
      v_acc_d = _mm_add_epi32(v_acc_d, v_sum_0123_d);
143
0
      c += 8;
144
0
    } while (c < width);
145
146
0
    v_acc_q = _mm_add_epi64(v_acc_q, _mm_and_si128(v_acc_d, v_zext_mask_q));
147
0
    v_acc_q = _mm_add_epi64(v_acc_q, _mm_srli_epi64(v_acc_d, 32));
148
149
0
    src += 4 * stride;
150
0
    r += 4;
151
0
  } while (r < height);
152
153
0
  v_acc_q = _mm_add_epi64(v_acc_q, _mm_srli_si128(v_acc_q, 8));
154
0
  return xx_cvtsi128_si64(v_acc_q);
155
0
}
156
157
#ifdef __GNUC__
158
// This prevents GCC/Clang from inlining this function into
159
// aom_sum_sse_2d_i16_nxn_sse2, which in turn saves some stack
160
// maintenance instructions in the common case of 4x4.
161
__attribute__((noinline))
162
#endif
163
uint64_t aom_sum_sse_2d_i16_nxn_sse2(const int16_t *src, int stride, int width,
164
0
                                     int height, int *sum) {
165
0
  int r = 0;
166
0
  uint64_t result;
167
0
  const __m128i zero_reg = _mm_setzero_si128();
168
0
  const __m128i one_reg = _mm_set1_epi16(1);
169
170
0
  __m128i v_sse_total = zero_reg;
171
0
  __m128i v_sum_total = zero_reg;
172
173
0
  do {
174
0
    int c = 0;
175
0
    __m128i v_sse_row = zero_reg;
176
0
    do {
177
0
      const int16_t *b = src + c;
178
179
0
      __m128i v_val_0_w = xx_load_128(b + 0 * stride);
180
0
      __m128i v_val_1_w = xx_load_128(b + 1 * stride);
181
0
      __m128i v_val_2_w = xx_load_128(b + 2 * stride);
182
0
      __m128i v_val_3_w = xx_load_128(b + 3 * stride);
183
184
0
      const __m128i v_sq_0_d = _mm_madd_epi16(v_val_0_w, v_val_0_w);
185
0
      const __m128i v_sq_1_d = _mm_madd_epi16(v_val_1_w, v_val_1_w);
186
0
      const __m128i v_sq_2_d = _mm_madd_epi16(v_val_2_w, v_val_2_w);
187
0
      const __m128i v_sq_3_d = _mm_madd_epi16(v_val_3_w, v_val_3_w);
188
0
      const __m128i v_sq_01_d = _mm_add_epi32(v_sq_0_d, v_sq_1_d);
189
0
      const __m128i v_sq_23_d = _mm_add_epi32(v_sq_2_d, v_sq_3_d);
190
0
      const __m128i v_sq_0123_d = _mm_add_epi32(v_sq_01_d, v_sq_23_d);
191
0
      v_sse_row = _mm_add_epi32(v_sse_row, v_sq_0123_d);
192
193
0
      const __m128i v_sum_01 = _mm_add_epi16(v_val_0_w, v_val_1_w);
194
0
      const __m128i v_sum_23 = _mm_add_epi16(v_val_2_w, v_val_3_w);
195
0
      __m128i v_sum_0123_d = _mm_add_epi16(v_sum_01, v_sum_23);
196
0
      v_sum_0123_d = _mm_madd_epi16(v_sum_0123_d, one_reg);
197
0
      v_sum_total = _mm_add_epi32(v_sum_total, v_sum_0123_d);
198
199
0
      c += 8;
200
0
    } while (c < width);
201
202
0
    const __m128i v_sse_row_low = _mm_unpacklo_epi32(v_sse_row, zero_reg);
203
0
    const __m128i v_sse_row_hi = _mm_unpackhi_epi32(v_sse_row, zero_reg);
204
0
    v_sse_row = _mm_add_epi64(v_sse_row_low, v_sse_row_hi);
205
0
    v_sse_total = _mm_add_epi64(v_sse_total, v_sse_row);
206
0
    src += 4 * stride;
207
0
    r += 4;
208
0
  } while (r < height);
209
210
0
  v_sum_total = _mm_add_epi32(v_sum_total, _mm_srli_si128(v_sum_total, 8));
211
0
  v_sum_total = _mm_add_epi32(v_sum_total, _mm_srli_si128(v_sum_total, 4));
212
0
  *sum += _mm_cvtsi128_si32(v_sum_total);
213
214
0
  v_sse_total = _mm_add_epi64(v_sse_total, _mm_srli_si128(v_sse_total, 8));
215
0
  xx_storel_64(&result, v_sse_total);
216
0
  return result;
217
0
}
218
219
uint64_t aom_sum_squares_2d_i16_sse2(const int16_t *src, int stride, int width,
220
0
                                     int height) {
221
  // 4 elements per row only requires half an XMM register, so this
222
  // must be a special case, but also note that over 75% of all calls
223
  // are with size == 4, so it is also the common case.
224
0
  if (LIKELY(width == 4 && height == 4)) {
225
0
    return aom_sum_squares_2d_i16_4x4_sse2(src, stride);
226
0
  } else if (LIKELY(width == 4 && (height & 3) == 0)) {
227
0
    return aom_sum_squares_2d_i16_4xn_sse2(src, stride, height);
228
0
  } else if (LIKELY((width & 7) == 0 && (height & 3) == 0)) {
229
    // Generic case
230
0
    return aom_sum_squares_2d_i16_nxn_sse2(src, stride, width, height);
231
0
  } else {
232
0
    return aom_sum_squares_2d_i16_c(src, stride, width, height);
233
0
  }
234
0
}
235
236
uint64_t aom_sum_sse_2d_i16_sse2(const int16_t *src, int src_stride, int width,
237
0
                                 int height, int *sum) {
238
0
  if (LIKELY(width == 4 && height == 4)) {
239
0
    return aom_sum_sse_2d_i16_4x4_sse2(src, src_stride, sum);
240
0
  } else if (LIKELY(width == 4 && (height & 3) == 0)) {
241
0
    return aom_sum_sse_2d_i16_4xn_sse2(src, src_stride, height, sum);
242
0
  } else if (LIKELY((width & 7) == 0 && (height & 3) == 0)) {
243
    // Generic case
244
0
    return aom_sum_sse_2d_i16_nxn_sse2(src, src_stride, width, height, sum);
245
0
  } else {
246
0
    return aom_sum_sse_2d_i16_c(src, src_stride, width, height, sum);
247
0
  }
248
0
}
249
250
//////////////////////////////////////////////////////////////////////////////
251
// 1D version
252
//////////////////////////////////////////////////////////////////////////////
253
254
0
static uint64_t aom_sum_squares_i16_64n_sse2(const int16_t *src, uint32_t n) {
255
0
  const __m128i v_zext_mask_q = _mm_set1_epi64x(~0u);
256
0
  __m128i v_acc0_q = _mm_setzero_si128();
257
0
  __m128i v_acc1_q = _mm_setzero_si128();
258
259
0
  const int16_t *const end = src + n;
260
261
0
  assert(n % 64 == 0);
262
263
0
  while (src < end) {
264
0
    const __m128i v_val_0_w = xx_load_128(src);
265
0
    const __m128i v_val_1_w = xx_load_128(src + 8);
266
0
    const __m128i v_val_2_w = xx_load_128(src + 16);
267
0
    const __m128i v_val_3_w = xx_load_128(src + 24);
268
0
    const __m128i v_val_4_w = xx_load_128(src + 32);
269
0
    const __m128i v_val_5_w = xx_load_128(src + 40);
270
0
    const __m128i v_val_6_w = xx_load_128(src + 48);
271
0
    const __m128i v_val_7_w = xx_load_128(src + 56);
272
273
0
    const __m128i v_sq_0_d = _mm_madd_epi16(v_val_0_w, v_val_0_w);
274
0
    const __m128i v_sq_1_d = _mm_madd_epi16(v_val_1_w, v_val_1_w);
275
0
    const __m128i v_sq_2_d = _mm_madd_epi16(v_val_2_w, v_val_2_w);
276
0
    const __m128i v_sq_3_d = _mm_madd_epi16(v_val_3_w, v_val_3_w);
277
0
    const __m128i v_sq_4_d = _mm_madd_epi16(v_val_4_w, v_val_4_w);
278
0
    const __m128i v_sq_5_d = _mm_madd_epi16(v_val_5_w, v_val_5_w);
279
0
    const __m128i v_sq_6_d = _mm_madd_epi16(v_val_6_w, v_val_6_w);
280
0
    const __m128i v_sq_7_d = _mm_madd_epi16(v_val_7_w, v_val_7_w);
281
282
0
    const __m128i v_sum_01_d = _mm_add_epi32(v_sq_0_d, v_sq_1_d);
283
0
    const __m128i v_sum_23_d = _mm_add_epi32(v_sq_2_d, v_sq_3_d);
284
0
    const __m128i v_sum_45_d = _mm_add_epi32(v_sq_4_d, v_sq_5_d);
285
0
    const __m128i v_sum_67_d = _mm_add_epi32(v_sq_6_d, v_sq_7_d);
286
287
0
    const __m128i v_sum_0123_d = _mm_add_epi32(v_sum_01_d, v_sum_23_d);
288
0
    const __m128i v_sum_4567_d = _mm_add_epi32(v_sum_45_d, v_sum_67_d);
289
290
0
    const __m128i v_sum_d = _mm_add_epi32(v_sum_0123_d, v_sum_4567_d);
291
292
0
    v_acc0_q = _mm_add_epi64(v_acc0_q, _mm_and_si128(v_sum_d, v_zext_mask_q));
293
0
    v_acc1_q = _mm_add_epi64(v_acc1_q, _mm_srli_epi64(v_sum_d, 32));
294
295
0
    src += 64;
296
0
  }
297
298
0
  v_acc0_q = _mm_add_epi64(v_acc0_q, v_acc1_q);
299
0
  v_acc0_q = _mm_add_epi64(v_acc0_q, _mm_srli_si128(v_acc0_q, 8));
300
0
  return xx_cvtsi128_si64(v_acc0_q);
301
0
}
302
303
0
uint64_t aom_sum_squares_i16_sse2(const int16_t *src, uint32_t n) {
304
0
  if (n % 64 == 0) {
305
0
    return aom_sum_squares_i16_64n_sse2(src, n);
306
0
  } else if (n > 64) {
307
0
    const uint32_t k = n & ~63u;
308
0
    return aom_sum_squares_i16_64n_sse2(src, k) +
309
0
           aom_sum_squares_i16_c(src + k, n - k);
310
0
  } else {
311
0
    return aom_sum_squares_i16_c(src, n);
312
0
  }
313
0
}
314
315
// Accumulate sum of 16-bit elements in the vector
316
0
static inline int32_t mm_accumulate_epi16(__m128i vec_a) {
317
0
  __m128i vtmp = _mm_srli_si128(vec_a, 8);
318
0
  vec_a = _mm_add_epi16(vec_a, vtmp);
319
0
  vtmp = _mm_srli_si128(vec_a, 4);
320
0
  vec_a = _mm_add_epi16(vec_a, vtmp);
321
0
  vtmp = _mm_srli_si128(vec_a, 2);
322
0
  vec_a = _mm_add_epi16(vec_a, vtmp);
323
0
  return _mm_extract_epi16(vec_a, 0);
324
0
}
325
326
// Accumulate sum of 32-bit elements in the vector
327
0
static inline int32_t mm_accumulate_epi32(__m128i vec_a) {
328
0
  __m128i vtmp = _mm_srli_si128(vec_a, 8);
329
0
  vec_a = _mm_add_epi32(vec_a, vtmp);
330
0
  vtmp = _mm_srli_si128(vec_a, 4);
331
0
  vec_a = _mm_add_epi32(vec_a, vtmp);
332
0
  return _mm_cvtsi128_si32(vec_a);
333
0
}
334
335
uint64_t aom_var_2d_u8_sse2(uint8_t *src, int src_stride, int width,
336
0
                            int height) {
337
0
  uint8_t *srcp;
338
0
  uint64_t s = 0, ss = 0;
339
0
  __m128i vzero = _mm_setzero_si128();
340
0
  __m128i v_acc_sum = vzero;
341
0
  __m128i v_acc_sqs = vzero;
342
0
  int i, j;
343
344
  // Process 16 elements in a row
345
0
  for (i = 0; i < width - 15; i += 16) {
346
0
    srcp = src + i;
347
    // Process 8 columns at a time
348
0
    for (j = 0; j < height - 7; j += 8) {
349
0
      __m128i vsrc[8];
350
0
      for (int k = 0; k < 8; k++) {
351
0
        vsrc[k] = _mm_loadu_si128((__m128i *)srcp);
352
0
        srcp += src_stride;
353
0
      }
354
0
      for (int k = 0; k < 8; k++) {
355
0
        __m128i vsrc0 = _mm_unpacklo_epi8(vsrc[k], vzero);
356
0
        __m128i vsrc1 = _mm_unpackhi_epi8(vsrc[k], vzero);
357
0
        v_acc_sum = _mm_add_epi16(v_acc_sum, vsrc0);
358
0
        v_acc_sum = _mm_add_epi16(v_acc_sum, vsrc1);
359
360
0
        __m128i vsqs0 = _mm_madd_epi16(vsrc0, vsrc0);
361
0
        __m128i vsqs1 = _mm_madd_epi16(vsrc1, vsrc1);
362
0
        v_acc_sqs = _mm_add_epi32(v_acc_sqs, vsqs0);
363
0
        v_acc_sqs = _mm_add_epi32(v_acc_sqs, vsqs1);
364
0
      }
365
366
      // Update total sum and clear the vectors
367
0
      s += mm_accumulate_epi16(v_acc_sum);
368
0
      ss += mm_accumulate_epi32(v_acc_sqs);
369
0
      v_acc_sum = vzero;
370
0
      v_acc_sqs = vzero;
371
0
    }
372
373
    // Process remaining rows (height not a multiple of 8)
374
0
    for (; j < height; j++) {
375
0
      __m128i vsrc = _mm_loadu_si128((__m128i *)srcp);
376
0
      __m128i vsrc0 = _mm_unpacklo_epi8(vsrc, vzero);
377
0
      __m128i vsrc1 = _mm_unpackhi_epi8(vsrc, vzero);
378
0
      v_acc_sum = _mm_add_epi16(v_acc_sum, vsrc0);
379
0
      v_acc_sum = _mm_add_epi16(v_acc_sum, vsrc1);
380
381
0
      __m128i vsqs0 = _mm_madd_epi16(vsrc0, vsrc0);
382
0
      __m128i vsqs1 = _mm_madd_epi16(vsrc1, vsrc1);
383
0
      v_acc_sqs = _mm_add_epi32(v_acc_sqs, vsqs0);
384
0
      v_acc_sqs = _mm_add_epi32(v_acc_sqs, vsqs1);
385
386
0
      srcp += src_stride;
387
0
    }
388
389
    // Update total sum and clear the vectors
390
0
    s += mm_accumulate_epi16(v_acc_sum);
391
0
    ss += mm_accumulate_epi32(v_acc_sqs);
392
0
    v_acc_sum = vzero;
393
0
    v_acc_sqs = vzero;
394
0
  }
395
396
  // Process the remaining area using C
397
0
  srcp = src;
398
0
  for (int k = 0; k < height; k++) {
399
0
    for (int m = i; m < width; m++) {
400
0
      uint8_t val = srcp[m];
401
0
      s += val;
402
0
      ss += val * val;
403
0
    }
404
0
    srcp += src_stride;
405
0
  }
406
0
  return (ss - s * s / (width * height));
407
0
}
408
409
#if CONFIG_AV1_HIGHBITDEPTH
410
uint64_t aom_var_2d_u16_sse2(uint8_t *src, int src_stride, int width,
411
0
                             int height) {
412
0
  uint16_t *srcp1 = CONVERT_TO_SHORTPTR(src), *srcp;
413
0
  uint64_t s = 0, ss = 0;
414
0
  __m128i vzero = _mm_setzero_si128();
415
0
  __m128i v_acc_sum = vzero;
416
0
  __m128i v_acc_sqs = vzero;
417
0
  int i, j;
418
419
  // Process 8 elements in a row
420
0
  for (i = 0; i < width - 8; i += 8) {
421
0
    srcp = srcp1 + i;
422
    // Process 8 columns at a time
423
0
    for (j = 0; j < height - 8; j += 8) {
424
0
      __m128i vsrc[8];
425
0
      for (int k = 0; k < 8; k++) {
426
0
        vsrc[k] = _mm_loadu_si128((__m128i *)srcp);
427
0
        srcp += src_stride;
428
0
      }
429
0
      for (int k = 0; k < 8; k++) {
430
0
        __m128i vsrc0 = _mm_unpacklo_epi16(vsrc[k], vzero);
431
0
        __m128i vsrc1 = _mm_unpackhi_epi16(vsrc[k], vzero);
432
0
        v_acc_sum = _mm_add_epi32(vsrc0, v_acc_sum);
433
0
        v_acc_sum = _mm_add_epi32(vsrc1, v_acc_sum);
434
435
0
        __m128i vsqs0 = _mm_madd_epi16(vsrc[k], vsrc[k]);
436
0
        v_acc_sqs = _mm_add_epi32(v_acc_sqs, vsqs0);
437
0
      }
438
439
      // Update total sum and clear the vectors
440
0
      s += mm_accumulate_epi32(v_acc_sum);
441
0
      ss += mm_accumulate_epi32(v_acc_sqs);
442
0
      v_acc_sum = vzero;
443
0
      v_acc_sqs = vzero;
444
0
    }
445
446
    // Process remaining rows (height not a multiple of 8)
447
0
    for (; j < height; j++) {
448
0
      __m128i vsrc = _mm_loadu_si128((__m128i *)srcp);
449
0
      __m128i vsrc0 = _mm_unpacklo_epi16(vsrc, vzero);
450
0
      __m128i vsrc1 = _mm_unpackhi_epi16(vsrc, vzero);
451
0
      v_acc_sum = _mm_add_epi32(vsrc0, v_acc_sum);
452
0
      v_acc_sum = _mm_add_epi32(vsrc1, v_acc_sum);
453
454
0
      __m128i vsqs0 = _mm_madd_epi16(vsrc, vsrc);
455
0
      v_acc_sqs = _mm_add_epi32(v_acc_sqs, vsqs0);
456
0
      srcp += src_stride;
457
0
    }
458
459
    // Update total sum and clear the vectors
460
0
    s += mm_accumulate_epi32(v_acc_sum);
461
0
    ss += mm_accumulate_epi32(v_acc_sqs);
462
0
    v_acc_sum = vzero;
463
0
    v_acc_sqs = vzero;
464
0
  }
465
466
  // Process the remaining area using C
467
0
  srcp = srcp1;
468
0
  for (int k = 0; k < height; k++) {
469
0
    for (int m = i; m < width; m++) {
470
0
      uint16_t val = srcp[m];
471
0
      s += val;
472
0
      ss += val * val;
473
0
    }
474
0
    srcp += src_stride;
475
0
  }
476
0
  return (ss - s * s / (width * height));
477
0
}
478
#endif  // CONFIG_AV1_HIGHBITDEPTH