Coverage Report

Created: 2025-07-11 06:37

/src/libavc/decoder/ih264d_utils.c
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Count
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1
/******************************************************************************
2
 *
3
 * Copyright (C) 2015 The Android Open Source Project
4
 *
5
 * Licensed under the Apache License, Version 2.0 (the "License");
6
 * you may not use this file except in compliance with the License.
7
 * You may obtain a copy of the License at:
8
 *
9
 * http://www.apache.org/licenses/LICENSE-2.0
10
 *
11
 * Unless required by applicable law or agreed to in writing, software
12
 * distributed under the License is distributed on an "AS IS" BASIS,
13
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
 * See the License for the specific language governing permissions and
15
 * limitations under the License.
16
 *
17
 *****************************************************************************
18
 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19
*/
20
/*!
21
 **************************************************************************
22
 * \file ih264d_utils.c
23
 *
24
 * \brief
25
 *    Contains routines that handle of start and end of pic processing
26
 *
27
 * \date
28
 *    19/12/2002
29
 *
30
 * \author  AI
31
 **************************************************************************
32
 */
33
34
#include <string.h>
35
#include "ih264_typedefs.h"
36
#include "ithread.h"
37
#include "ih264d_deblocking.h"
38
#include "ih264d_parse_slice.h"
39
#include "ih264d_parse_cavlc.h"
40
#include "ih264d_dpb_manager.h"
41
#include "ih264d_defs.h"
42
#include "ih264d_structs.h"
43
#include "ih264d_mem_request.h"
44
#include "ih264_typedefs.h"
45
#include "ih264_macros.h"
46
#include "ih264_platform_macros.h"
47
#include "ih264d_tables.h"
48
#include "ih264d_debug.h"
49
#include "ih264d_mb_utils.h"
50
#include "ih264d_error_handler.h"
51
#include "ih264d_dpb_manager.h"
52
#include "ih264d_utils.h"
53
#include "ih264d_defs.h"
54
#include "ih264d_tables.h"
55
#include "ih264d_inter_pred.h"
56
#include "ih264d_dpb_manager.h"
57
#include "iv.h"
58
#include "ivd.h"
59
#include "ih264d_format_conv.h"
60
#include "ih264_error.h"
61
#include "ih264_disp_mgr.h"
62
#include "ih264_buf_mgr.h"
63
#include "ih264d_utils.h"
64
65
/*!
66
 **************************************************************************
67
 * \if Function name : ih264d_is_end_of_pic \endif
68
 *
69
 * \brief
70
 *    Determines whether current slice is first slice of a new picture as
71
 *    defined in 7.4.1.2.4 of 14496-10.
72
 *
73
 * \return
74
 *    Return 1 if current slice is first slice of a new picture
75
 *    Otherwise it returns 0
76
 **************************************************************************
77
 */
78
UWORD8 ih264d_is_end_of_pic(UWORD16 u2_frame_num,
79
                            UWORD8 u1_nal_ref_idc,
80
                            pocstruct_t *ps_cur_poc,
81
                            pocstruct_t *ps_prev_poc,
82
                            dec_slice_params_t * ps_prev_slice, /*!< Previous slice parameters*/
83
                            UWORD8 u1_pic_order_cnt_type,
84
                            UWORD8 u1_nal_unit_type,
85
                            UWORD32 u4_idr_pic_id,
86
                            UWORD8 u1_field_pic_flag,
87
                            UWORD8 u1_bottom_field_flag)
88
3.43k
{
89
3.43k
    WORD8 i1_is_end_of_pic;
90
3.43k
    WORD8 a, b, c, d, e, f, g, h;
91
92
3.43k
    a = b = c = d = e = f = g = h = 0;
93
3.43k
    a = (ps_prev_slice->u2_frame_num != u2_frame_num);
94
3.43k
    b = (ps_prev_slice->u1_field_pic_flag != u1_field_pic_flag);
95
3.43k
    if(u1_field_pic_flag && ps_prev_slice->u1_field_pic_flag)
96
0
        c = (u1_bottom_field_flag != ps_prev_slice->u1_bottom_field_flag);
97
3.43k
    d =
98
3.43k
                    (u1_nal_ref_idc == 0 && ps_prev_slice->u1_nal_ref_idc != 0)
99
3.43k
                                    || (u1_nal_ref_idc != 0
100
3.43k
                                                    && ps_prev_slice->u1_nal_ref_idc
101
1.54k
                                                                    == 0);
102
3.43k
    if(!a)
103
3.30k
    {
104
3.30k
        if((u1_pic_order_cnt_type == 0)
105
3.30k
                        && (ps_prev_slice->u1_pic_order_cnt_type == 0))
106
2.75k
        {
107
2.75k
            e =
108
2.75k
                            ((ps_cur_poc->i4_pic_order_cnt_lsb
109
2.75k
                                            != ps_prev_poc->i4_pic_order_cnt_lsb)
110
2.75k
                                            || (ps_cur_poc->i4_delta_pic_order_cnt_bottom
111
2.68k
                                                            != ps_prev_poc->i4_delta_pic_order_cnt_bottom));
112
2.75k
        }
113
114
3.30k
        if((u1_pic_order_cnt_type == 1)
115
3.30k
                        && (ps_prev_slice->u1_pic_order_cnt_type == 1))
116
343
        {
117
343
            f =
118
343
                            ((ps_cur_poc->i4_delta_pic_order_cnt[0]
119
343
                                            != ps_prev_poc->i4_delta_pic_order_cnt[0])
120
343
                                            || (ps_cur_poc->i4_delta_pic_order_cnt[1]
121
277
                                                            != ps_prev_poc->i4_delta_pic_order_cnt[1]));
122
343
        }
123
3.30k
    }
124
125
3.43k
    if((u1_nal_unit_type == IDR_SLICE_NAL)
126
3.43k
                    && (ps_prev_slice->u1_nal_unit_type == IDR_SLICE_NAL))
127
1.20k
    {
128
1.20k
        g = (u4_idr_pic_id != ps_prev_slice->u4_idr_pic_id);
129
1.20k
    }
130
131
3.43k
    if((u1_nal_unit_type == IDR_SLICE_NAL)
132
3.43k
                    && (ps_prev_slice->u1_nal_unit_type != IDR_SLICE_NAL))
133
0
    {
134
0
        h = 1;
135
0
    }
136
3.43k
    i1_is_end_of_pic = a + b + c + d + e + f + g + h;
137
3.43k
    return (i1_is_end_of_pic);
138
3.43k
}
139
140
/*!
141
 **************************************************************************
142
 * \if Function name : ih264d_decode_pic_order_cnt \endif
143
 *
144
 * \brief
145
 *    Calculates picture order count of picture.
146
 *
147
 * \return
148
 *    Returns the pic order count of the picture to which current
149
 *    Slice belongs.
150
 *
151
 **************************************************************************
152
 */
153
WORD32 ih264d_decode_pic_order_cnt(UWORD8 u1_is_idr_slice,
154
                                   UWORD32 u2_frame_num,
155
                                   pocstruct_t *ps_prev_poc,
156
                                   pocstruct_t *ps_cur_poc,
157
                                   dec_slice_params_t *ps_cur_slice, /*!< Pointer to current slice Params*/
158
                                   dec_pic_params_t * ps_pps,
159
                                   UWORD8 u1_nal_ref_idc,
160
                                   UWORD8 u1_bottom_field_flag,
161
                                   UWORD8 u1_field_pic_flag,
162
                                   WORD32 *pi4_poc)
163
0
{
164
0
    WORD64 i8_pic_msb;
165
0
    WORD32 i4_top_field_order_cnt = 0, i4_bottom_field_order_cnt = 0;
166
0
    dec_seq_params_t *ps_seq = ps_pps->ps_sps;
167
0
    WORD32 i4_prev_frame_num_ofst;
168
169
0
    switch(ps_seq->u1_pic_order_cnt_type)
170
0
    {
171
0
        case 0:
172
            /* POC TYPE 0 */
173
0
            if(u1_is_idr_slice)
174
0
            {
175
0
                ps_cur_poc->i4_pic_order_cnt_msb = 0;
176
0
                ps_cur_poc->i4_pic_order_cnt_lsb = 0;
177
0
            }
178
0
            if(ps_prev_poc->u1_mmco_equalto5)
179
0
            {
180
0
                if(ps_prev_poc->u1_bot_field != 1)
181
0
                {
182
0
                    ps_prev_poc->i4_pic_order_cnt_msb = 0;
183
0
                    ps_prev_poc->i4_pic_order_cnt_lsb =
184
0
                                    ps_prev_poc->i4_top_field_order_count;
185
0
                }
186
0
                else
187
0
                {
188
0
                    ps_prev_poc->i4_pic_order_cnt_msb = 0;
189
0
                    ps_prev_poc->i4_pic_order_cnt_lsb = 0;
190
0
                }
191
0
            }
192
193
0
            if((ps_cur_poc->i4_pic_order_cnt_lsb
194
0
                            < ps_prev_poc->i4_pic_order_cnt_lsb)
195
0
                            && ((ps_prev_poc->i4_pic_order_cnt_lsb
196
0
                                            - ps_cur_poc->i4_pic_order_cnt_lsb)
197
0
                                            >= (ps_seq->i4_max_pic_order_cntLsb
198
0
                                                            >> 1)))
199
0
            {
200
0
                i8_pic_msb = (WORD64)ps_prev_poc->i4_pic_order_cnt_msb
201
0
                                + ps_seq->i4_max_pic_order_cntLsb;
202
0
            }
203
0
            else if((ps_cur_poc->i4_pic_order_cnt_lsb
204
0
                            > ps_prev_poc->i4_pic_order_cnt_lsb)
205
0
                            && ((ps_cur_poc->i4_pic_order_cnt_lsb
206
0
                                            - ps_prev_poc->i4_pic_order_cnt_lsb)
207
0
                                            >= (ps_seq->i4_max_pic_order_cntLsb
208
0
                                                            >> 1)))
209
0
            {
210
0
                i8_pic_msb = (WORD64)ps_prev_poc->i4_pic_order_cnt_msb
211
0
                                - ps_seq->i4_max_pic_order_cntLsb;
212
0
            }
213
0
            else
214
0
            {
215
0
                i8_pic_msb = ps_prev_poc->i4_pic_order_cnt_msb;
216
0
            }
217
218
0
            if(!u1_field_pic_flag || !u1_bottom_field_flag)
219
0
            {
220
0
                WORD64 i8_result = i8_pic_msb + ps_cur_poc->i4_pic_order_cnt_lsb;
221
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
222
0
                {
223
0
                    return ERROR_INV_POC;
224
0
                }
225
0
                i4_top_field_order_cnt = i8_result;
226
0
            }
227
228
0
            if(!u1_field_pic_flag)
229
0
            {
230
0
                WORD64 i8_result = (WORD64)i4_top_field_order_cnt
231
0
                                     + ps_cur_poc->i4_delta_pic_order_cnt_bottom;
232
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
233
0
                {
234
0
                    return ERROR_INV_POC;
235
0
                }
236
0
                i4_bottom_field_order_cnt = i8_result;
237
0
            }
238
0
            else if(u1_bottom_field_flag)
239
0
            {
240
0
                WORD64 i8_result = i8_pic_msb + ps_cur_poc->i4_pic_order_cnt_lsb;
241
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
242
0
                {
243
0
                    return ERROR_INV_POC;
244
0
                }
245
0
                i4_bottom_field_order_cnt = i8_result;
246
0
            }
247
248
0
            if(IS_OUT_OF_RANGE_S32(i8_pic_msb))
249
0
            {
250
0
                return ERROR_INV_POC;
251
0
            }
252
0
            ps_cur_poc->i4_pic_order_cnt_msb = i8_pic_msb;
253
0
            break;
254
255
0
        case 1:
256
0
        {
257
            /* POC TYPE 1 */
258
0
            UWORD8 i;
259
0
            WORD32 prev_frame_num;
260
0
            WORD32 frame_num_ofst;
261
0
            WORD32 abs_frm_num;
262
0
            WORD32 poc_cycle_cnt, frame_num_in_poc_cycle;
263
0
            WORD64 i8_expected_delta_poc_cycle;
264
0
            WORD32 expected_poc;
265
0
            WORD64 i8_result;
266
267
0
            prev_frame_num = (WORD32)ps_cur_slice->u2_frame_num;
268
0
            if(!u1_is_idr_slice)
269
0
            {
270
0
                if(ps_cur_slice->u1_mmco_equalto5)
271
0
                {
272
0
                    prev_frame_num = 0;
273
0
                    i4_prev_frame_num_ofst = 0;
274
0
                }
275
0
                else
276
0
                {
277
0
                    i4_prev_frame_num_ofst = ps_prev_poc->i4_prev_frame_num_ofst;
278
0
                }
279
0
            }
280
0
            else
281
0
                i4_prev_frame_num_ofst = 0;
282
283
            /* 1. Derivation for FrameNumOffset */
284
0
            if(u1_is_idr_slice)
285
0
            {
286
0
                frame_num_ofst = 0;
287
0
                ps_cur_poc->i4_delta_pic_order_cnt[0] = 0;
288
0
                ps_cur_poc->i4_delta_pic_order_cnt[1] = 0;
289
0
            }
290
0
            else if(prev_frame_num > ((WORD32)u2_frame_num))
291
0
            {
292
0
                WORD64 i8_result = i4_prev_frame_num_ofst
293
0
                                + (WORD64)ps_seq->u2_u4_max_pic_num_minus1 + 1;
294
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
295
0
                {
296
0
                    return ERROR_INV_FRAME_NUM;
297
0
                }
298
0
                frame_num_ofst = i8_result;
299
0
            }
300
0
            else
301
0
                frame_num_ofst = i4_prev_frame_num_ofst;
302
303
            /* 2. Derivation for absFrameNum */
304
0
            if(0 != ps_seq->u1_num_ref_frames_in_pic_order_cnt_cycle)
305
0
            {
306
0
                WORD64 i8_result = frame_num_ofst + (WORD64)u2_frame_num;
307
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
308
0
                {
309
0
                    return ERROR_INV_FRAME_NUM;
310
0
                }
311
0
                abs_frm_num = i8_result;
312
0
            }
313
0
            else
314
0
                abs_frm_num = 0;
315
0
            if((u1_nal_ref_idc == 0) && (abs_frm_num > 0))
316
0
                abs_frm_num = abs_frm_num - 1;
317
318
            /* 4. expectedDeltaPerPicOrderCntCycle is derived as */
319
0
            i8_expected_delta_poc_cycle = 0;
320
0
            for(i = 0; i < ps_seq->u1_num_ref_frames_in_pic_order_cnt_cycle;
321
0
                            i++)
322
0
            {
323
0
                i8_expected_delta_poc_cycle +=
324
0
                                ps_seq->i4_ofst_for_ref_frame[i];
325
0
            }
326
327
            /* 3. When absFrameNum > 0, picOrderCntCycleCnt and
328
             frame_num_in_poc_cycle are derived as : */
329
            /* 5. expectedPicOrderCnt is derived as : */
330
0
            if(abs_frm_num > 0)
331
0
            {
332
0
                poc_cycle_cnt =
333
0
                                DIV((abs_frm_num - 1),
334
0
                                    ps_seq->u1_num_ref_frames_in_pic_order_cnt_cycle);
335
0
                frame_num_in_poc_cycle =
336
0
                                MOD((abs_frm_num - 1),
337
0
                                    ps_seq->u1_num_ref_frames_in_pic_order_cnt_cycle);
338
339
0
                i8_result = poc_cycle_cnt
340
0
                                * i8_expected_delta_poc_cycle;
341
342
0
                for(i = 0; i <= frame_num_in_poc_cycle; i++)
343
0
                {
344
0
                    i8_result = i8_result
345
0
                                    + ps_seq->i4_ofst_for_ref_frame[i];
346
0
                }
347
348
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
349
0
                    return ERROR_INV_POC;
350
351
0
                expected_poc = (WORD32)i8_result;
352
353
0
            }
354
0
            else
355
0
                expected_poc = 0;
356
357
0
            if(u1_nal_ref_idc == 0)
358
0
            {
359
0
                i8_result = (WORD64)expected_poc
360
0
                                + ps_seq->i4_ofst_for_non_ref_pic;
361
362
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
363
0
                    return ERROR_INV_POC;
364
365
0
                expected_poc = (WORD32)i8_result;
366
0
            }
367
368
            /* 6. TopFieldOrderCnt or BottomFieldOrderCnt are derived as */
369
0
            if(!u1_field_pic_flag)
370
0
            {
371
0
                i8_result = (WORD64)expected_poc
372
0
                                + ps_cur_poc->i4_delta_pic_order_cnt[0];
373
374
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
375
0
                    return ERROR_INV_POC;
376
0
                i4_top_field_order_cnt = (WORD32)i8_result;
377
378
0
                i8_result = (WORD64)i4_top_field_order_cnt
379
0
                                + ps_seq->i4_ofst_for_top_to_bottom_field
380
0
                                + ps_cur_poc->i4_delta_pic_order_cnt[1];
381
382
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
383
0
                    return ERROR_INV_POC;
384
0
                i4_bottom_field_order_cnt = (WORD32)i8_result;
385
0
            }
386
0
            else if(!u1_bottom_field_flag)
387
0
            {
388
0
                i8_result = (WORD64)expected_poc
389
0
                                + ps_cur_poc->i4_delta_pic_order_cnt[0];
390
391
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
392
0
                    return ERROR_INV_POC;
393
0
                i4_top_field_order_cnt = (WORD32)i8_result;
394
0
            }
395
0
            else
396
0
            {
397
0
                i8_result = (WORD64)expected_poc
398
0
                                + ps_seq->i4_ofst_for_top_to_bottom_field
399
0
                                + ps_cur_poc->i4_delta_pic_order_cnt[0];
400
401
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
402
0
                    return ERROR_INV_POC;
403
0
                i4_bottom_field_order_cnt = (WORD32)i8_result;
404
0
            }
405
            /* Copy the current POC info into Previous POC structure */
406
0
            ps_cur_poc->i4_prev_frame_num_ofst = frame_num_ofst;
407
0
        }
408
409
0
            break;
410
0
        case 2:
411
0
        {
412
            /* POC TYPE 2 */
413
0
            WORD32 prev_frame_num;
414
0
            WORD32 frame_num_ofst;
415
0
            WORD32 tmp_poc;
416
417
0
            prev_frame_num = (WORD32)ps_cur_slice->u2_frame_num;
418
0
            if(!u1_is_idr_slice)
419
0
            {
420
0
                if(ps_cur_slice->u1_mmco_equalto5)
421
0
                {
422
0
                    prev_frame_num = 0;
423
0
                    i4_prev_frame_num_ofst = 0;
424
0
                }
425
0
                else
426
0
                    i4_prev_frame_num_ofst = ps_prev_poc->i4_prev_frame_num_ofst;
427
0
            }
428
0
            else
429
0
                i4_prev_frame_num_ofst = 0;
430
431
            /* 1. Derivation for FrameNumOffset */
432
0
            if(u1_is_idr_slice)
433
0
            {
434
0
                frame_num_ofst = 0;
435
0
                ps_cur_poc->i4_delta_pic_order_cnt[0] = 0;
436
0
                ps_cur_poc->i4_delta_pic_order_cnt[1] = 0;
437
0
            }
438
0
            else if(prev_frame_num > ((WORD32)u2_frame_num))
439
0
            {
440
0
                WORD64 i8_result = i4_prev_frame_num_ofst
441
0
                                + (WORD64)ps_seq->u2_u4_max_pic_num_minus1 + 1;
442
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
443
0
                {
444
0
                    return ERROR_INV_FRAME_NUM;
445
0
                }
446
0
                frame_num_ofst = i8_result;
447
0
            }
448
0
            else
449
0
                frame_num_ofst = i4_prev_frame_num_ofst;
450
451
            /* 2. Derivation for tempPicOrderCnt */
452
0
            if(u1_is_idr_slice)
453
0
                tmp_poc = 0;
454
0
            else if(u1_nal_ref_idc == 0)
455
0
            {
456
0
                WORD64 i8_result = ((frame_num_ofst + (WORD64)u2_frame_num) << 1) - 1;
457
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
458
0
                {
459
0
                    return ERROR_INV_POC;
460
0
                }
461
0
                tmp_poc = i8_result;
462
0
            }
463
0
            else
464
0
            {
465
0
                WORD64 i8_result = (frame_num_ofst + (WORD64)u2_frame_num) << 1;
466
0
                if(IS_OUT_OF_RANGE_S32(i8_result))
467
0
                {
468
0
                    return ERROR_INV_POC;
469
0
                }
470
0
                tmp_poc = i8_result;
471
0
            }
472
473
            /* 6. TopFieldOrderCnt or BottomFieldOrderCnt are derived as */
474
0
            if(!u1_field_pic_flag)
475
0
            {
476
0
                i4_top_field_order_cnt = tmp_poc;
477
0
                i4_bottom_field_order_cnt = tmp_poc;
478
0
            }
479
0
            else if(!u1_bottom_field_flag)
480
0
                i4_top_field_order_cnt = tmp_poc;
481
0
            else
482
0
                i4_bottom_field_order_cnt = tmp_poc;
483
484
            /* Copy the current POC info into Previous POC structure */
485
0
            ps_prev_poc->i4_prev_frame_num_ofst = frame_num_ofst;
486
0
            ps_cur_poc->i4_prev_frame_num_ofst = frame_num_ofst;
487
0
        }
488
0
            break;
489
0
        default:
490
0
            return ERROR_INV_POC_TYPE_T;
491
0
            break;
492
0
    }
493
494
0
    if(!u1_field_pic_flag) // or a complementary field pair
495
0
    {
496
0
        *pi4_poc = MIN(i4_top_field_order_cnt, i4_bottom_field_order_cnt);
497
0
        ps_pps->i4_top_field_order_cnt = i4_top_field_order_cnt;
498
0
        ps_pps->i4_bottom_field_order_cnt = i4_bottom_field_order_cnt;
499
0
    }
500
0
    else if(!u1_bottom_field_flag)
501
0
    {
502
0
        *pi4_poc = i4_top_field_order_cnt;
503
0
        ps_pps->i4_top_field_order_cnt = i4_top_field_order_cnt;
504
0
    }
505
0
    else
506
0
    {
507
0
        *pi4_poc = i4_bottom_field_order_cnt;
508
0
        ps_pps->i4_bottom_field_order_cnt = i4_bottom_field_order_cnt;
509
0
    }
510
511
0
    ps_pps->i4_avg_poc = *pi4_poc;
512
513
0
    return OK;
514
0
}
515
516
/*!
517
 **************************************************************************
518
 * \if Function name : ih264d_end_of_pic_processing \endif
519
 *
520
 * \brief
521
 *    Performs the end of picture processing.
522
 *
523
 * It performs deblocking on the current picture and sets the i4_status of
524
 * current picture as decoded.
525
 *
526
 * \return
527
 *    0 on Success and Error code otherwise.
528
 **************************************************************************
529
 */
530
WORD32 ih264d_end_of_pic_processing(dec_struct_t *ps_dec)
531
133k
{
532
133k
    UWORD8 u1_pic_type, u1_nal_ref_idc;
533
133k
    dec_slice_params_t *ps_cur_slice = ps_dec->ps_cur_slice;
534
535
    /* If nal_ref_idc is equal to 0 for one slice or slice data partition NAL
536
     unit of a particular picture, it shall be equal to 0 for all slice and
537
     slice data partition NAL units of the picture. nal_ref_idc greater
538
     than 0 indicates that the content of the NAL unit belongs to a decoded
539
     picture that is stored and marked for use as a reference picture in the
540
     decoded picture buffer. */
541
542
    /* 1. Do MMCO
543
     2. Add Cur Pic to list of reference pics.
544
     */
545
546
    /* Call MMCO */
547
133k
    u1_pic_type = 0;
548
133k
    u1_nal_ref_idc = ps_cur_slice->u1_nal_ref_idc;
549
550
133k
    if(u1_nal_ref_idc)
551
117k
    {
552
117k
        if(ps_cur_slice->u1_nal_unit_type == IDR_SLICE_NAL)
553
103k
        {
554
103k
            ps_dec->ps_dpb_mgr->u1_mmco_error_in_seq = 0;
555
103k
            if(ps_dec->ps_dpb_cmds->u1_long_term_reference_flag == 0)
556
88.3k
            {
557
88.3k
                ih264d_reset_ref_bufs(ps_dec->ps_dpb_mgr);
558
                /* ignore DPB errors */
559
88.3k
                ih264d_insert_st_node(ps_dec->ps_dpb_mgr,
560
88.3k
                                      ps_dec->ps_cur_pic,
561
88.3k
                                      ps_dec->u1_pic_buf_id,
562
88.3k
                                      ps_cur_slice->u2_frame_num);
563
88.3k
                ps_dec->ps_dpb_mgr->u1_max_lt_frame_idx = NO_LONG_TERM_INDICIES;
564
88.3k
            }
565
15.1k
            else
566
15.1k
            {
567
                /* Equivalent of inserting a pic directly as longterm Pic */
568
569
15.1k
                {
570
                    /* ignore DPB errors */
571
15.1k
                    ih264d_insert_st_node(ps_dec->ps_dpb_mgr,
572
15.1k
                                          ps_dec->ps_cur_pic,
573
15.1k
                                          ps_dec->u1_pic_buf_id,
574
15.1k
                                          ps_cur_slice->u2_frame_num);
575
576
                    /* Set longTermIdx = 0, MaxLongTermFrameIdx = 0 */
577
15.1k
                    ih264d_delete_st_node_or_make_lt(
578
15.1k
                                    ps_dec->ps_dpb_mgr,
579
15.1k
                                    ps_cur_slice->u2_frame_num, 0,
580
15.1k
                                    ps_cur_slice->u1_field_pic_flag);
581
582
15.1k
                    ps_dec->ps_dpb_mgr->u1_max_lt_frame_idx = 0;
583
15.1k
                }
584
15.1k
            }
585
103k
        }
586
13.8k
        else
587
13.8k
        {
588
589
13.8k
            {
590
13.8k
                UWORD16 u2_pic_num = ps_cur_slice->u2_frame_num;
591
592
13.8k
                if(!ps_dec->ps_dpb_mgr->u1_mmco_error_in_seq)
593
12.4k
                {
594
12.4k
                    WORD32 ret = ih264d_do_mmco_buffer(ps_dec->ps_dpb_cmds, ps_dec->ps_dpb_mgr,
595
12.4k
                                               ps_dec->ps_cur_sps->u1_num_ref_frames, u2_pic_num,
596
12.4k
                                               (ps_dec->ps_cur_sps->u2_u4_max_pic_num_minus1),
597
12.4k
                                               ps_dec->u1_nal_unit_type, ps_dec->ps_cur_pic,
598
12.4k
                                               ps_dec->u1_pic_buf_id,
599
12.4k
                                               ps_cur_slice->u1_field_pic_flag,
600
12.4k
                                               ps_dec->e_dec_status);
601
12.4k
                    ps_dec->ps_dpb_mgr->u1_mmco_error_in_seq = ret != OK;
602
12.4k
                }
603
13.8k
            }
604
13.8k
        }
605
117k
        ih264d_update_default_index_list(ps_dec->ps_dpb_mgr);
606
117k
    }
607
608
133k
    if(ps_cur_slice->u1_field_pic_flag)
609
0
    {
610
0
        if(ps_cur_slice->u1_bottom_field_flag)
611
0
        {
612
0
            if(u1_nal_ref_idc)
613
0
                u1_pic_type = u1_pic_type | BOT_REF;
614
0
            u1_pic_type = u1_pic_type | BOT_FLD;
615
0
        }
616
0
        else
617
0
        {
618
0
            if(u1_nal_ref_idc)
619
0
                u1_pic_type = u1_pic_type | TOP_REF;
620
0
            u1_pic_type = u1_pic_type | TOP_FLD;
621
0
        }
622
0
    }
623
133k
    else
624
133k
        u1_pic_type = TOP_REF | BOT_REF;
625
133k
    ps_dec->ps_cur_pic->u1_pic_type |= u1_pic_type;
626
627
628
133k
    if(ps_cur_slice->u1_field_pic_flag)
629
0
    {
630
0
        H264_DEC_DEBUG_PRINT("Toggling secondField\n");
631
0
        ps_dec->u1_second_field = 1 - ps_dec->u1_second_field;
632
0
    }
633
634
133k
    return OK;
635
133k
}
636
637
/*****************************************************************************/
638
/*                                                                           */
639
/*  Function Name : init_dpb_size                                            */
640
/*                                                                           */
641
/*  Description   : This function calculates the DBP i4_size in frames          */
642
/*  Inputs        : ps_seq - current sequence params                         */
643
/*                                                                           */
644
/*  Globals       : None                                                     */
645
/*                                                                           */
646
/*  Outputs       : None                                                     */
647
/*                                                                           */
648
/*  Returns       : DPB in frames                                            */
649
/*                                                                           */
650
/*  Issues        : None                                                     */
651
/*                                                                           */
652
/*  Revision History:                                                        */
653
/*                                                                           */
654
/*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
655
/*         28 04 2005   NS              Draft                                */
656
/*                                                                           */
657
/*****************************************************************************/
658
WORD32 ih264d_get_dpb_size(dec_seq_params_t *ps_seq)
659
122k
{
660
122k
    WORD32 i4_size;
661
122k
    UWORD8 u1_level_idc;
662
663
122k
    u1_level_idc = ps_seq->u1_level_idc;
664
665
122k
    switch(u1_level_idc)
666
122k
    {
667
1.05k
        case 10:
668
1.05k
            i4_size = 152064;
669
1.05k
            break;
670
18.7k
        case 11:
671
18.7k
            i4_size = 345600;
672
18.7k
            break;
673
2.03k
        case 12:
674
2.03k
            i4_size = 912384;
675
2.03k
            break;
676
796
        case 13:
677
796
            i4_size = 912384;
678
796
            break;
679
25.7k
        case 20:
680
25.7k
            i4_size = 912384;
681
25.7k
            break;
682
4.85k
        case 21:
683
4.85k
            i4_size = 1824768;
684
4.85k
            break;
685
790
        case 22:
686
790
            i4_size = 3110400;
687
790
            break;
688
2.31k
        case 30:
689
2.31k
            i4_size = 3110400;
690
2.31k
            break;
691
823
        case 31:
692
823
            i4_size = 6912000;
693
823
            break;
694
29.6k
        case 32:
695
29.6k
            i4_size = 7864320;
696
29.6k
            break;
697
6.83k
        case 40:
698
6.83k
            i4_size = 12582912;
699
6.83k
            break;
700
1.78k
        case 41:
701
1.78k
            i4_size = 12582912;
702
1.78k
            break;
703
7.05k
        case 42:
704
7.05k
            i4_size = 12582912;
705
7.05k
            break;
706
90
        case 50:
707
90
            i4_size = 42393600;
708
90
            break;
709
278
        case 51:
710
278
            i4_size = 70778880;
711
278
            break;
712
205
        case 52:
713
205
            i4_size = 70778880;
714
205
            break;
715
19.2k
        default:
716
19.2k
            i4_size = 70778880;
717
19.2k
            break;
718
122k
    }
719
720
122k
    i4_size /= (ps_seq->u2_frm_wd_in_mbs * (ps_seq->u2_frm_ht_in_mbs << (1 - ps_seq->u1_frame_mbs_only_flag)));
721
122k
    i4_size /= 384;
722
122k
    i4_size = MIN(i4_size, 16);
723
122k
    i4_size = MAX(i4_size, 1);
724
122k
    return (i4_size);
725
122k
}
726
727
/**************************************************************************/
728
/* This function initialises the value of ps_dec->u1_recon_mb_grp         */
729
/* ps_dec->u1_recon_mb_grp must satisfy the following criteria            */
730
/*  - multiple of 2 (required for N/2 parse-mvpred design)                */
731
/*  - multiple of 4 (if it is not a frame_mbs_only sequence),             */
732
/*         in this case N/2 itself needs to be even for mbpair processing */
733
/*  - lesser than ps_dec->u2_frm_wd_in_mbs/2 (at least 3 N-Chunks       */
734
/*         should make a row to ensure proper MvTop transferring)         */
735
/**************************************************************************/
736
WORD32 ih264d_init_dec_mb_grp(dec_struct_t *ps_dec)
737
23.4k
{
738
23.4k
    dec_seq_params_t *ps_seq = ps_dec->ps_cur_sps;
739
23.4k
    UWORD8 u1_frm = ps_seq->u1_frame_mbs_only_flag;
740
741
23.4k
    ps_dec->u1_recon_mb_grp = ps_dec->u2_frm_wd_in_mbs << ps_seq->u1_mb_aff_flag;
742
743
23.4k
    ps_dec->u1_recon_mb_grp_pair = ps_dec->u1_recon_mb_grp >> 1;
744
745
23.4k
    if(!ps_dec->u1_recon_mb_grp)
746
0
    {
747
0
        return ERROR_MB_GROUP_ASSGN_T;
748
0
    }
749
750
23.4k
    ps_dec->u4_num_mbs_prev_nmb = ps_dec->u1_recon_mb_grp;
751
752
23.4k
    return OK;
753
23.4k
}
754
755
756
/*!
757
 **************************************************************************
758
 * \if Function name : ih264d_init_pic \endif
759
 *
760
 * \brief
761
 *    Initializes the picture.
762
 *
763
 * \return
764
 *    0 on Success and Error code otherwise
765
 *
766
 * \note
767
 *    This function is called when first slice of the
768
 *    NON -IDR picture is encountered.
769
 **************************************************************************
770
 */
771
WORD32 ih264d_init_pic(dec_struct_t *ps_dec,
772
                       UWORD16 u2_frame_num,
773
                       WORD32 i4_poc,
774
                       dec_pic_params_t *ps_pps)
775
0
{
776
0
    dec_seq_params_t *ps_seq = ps_pps->ps_sps;
777
0
    prev_seq_params_t * ps_prev_seq_params = &ps_dec->s_prev_seq_params;
778
0
    WORD32 i4_pic_bufs;
779
0
    WORD32 ret;
780
781
0
    ps_dec->ps_cur_slice->u2_frame_num = u2_frame_num;
782
0
    ps_dec->ps_cur_slice->i4_poc = i4_poc;
783
0
    ps_dec->ps_cur_pps = ps_pps;
784
0
    ps_dec->ps_cur_pps->pv_codec_handle = ps_dec;
785
786
0
    ps_dec->ps_cur_sps = ps_seq;
787
0
    ps_dec->ps_dpb_mgr->i4_max_frm_num = ps_seq->u2_u4_max_pic_num_minus1
788
0
                    + 1;
789
790
0
    ps_dec->ps_dpb_mgr->u2_pic_ht = ps_dec->u2_pic_ht;
791
0
    ps_dec->ps_dpb_mgr->u2_pic_wd = ps_dec->u2_pic_wd;
792
0
    ps_dec->i4_pic_type = NA_SLICE;
793
0
    ps_dec->i4_frametype = IV_NA_FRAME;
794
0
    ps_dec->i4_content_type = IV_CONTENTTYPE_NA;
795
796
    /*--------------------------------------------------------------------*/
797
    /* Get the value of MaxMbAddress and frmheight in Mbs                 */
798
    /*--------------------------------------------------------------------*/
799
0
    ps_seq->u2_max_mb_addr =
800
0
                    (ps_seq->u2_frm_wd_in_mbs
801
0
                                    * (ps_dec->u2_pic_ht
802
0
                                                    >> (4
803
0
                                                                    + ps_dec->ps_cur_slice->u1_field_pic_flag)))
804
0
                                    - 1;
805
0
    ps_dec->u2_frm_ht_in_mbs = (ps_dec->u2_pic_ht
806
0
                    >> (4 + ps_dec->ps_cur_slice->u1_field_pic_flag));
807
808
    /***************************************************************************/
809
    /* If change in Level or the required PicBuffers i4_size is more than the  */
810
    /* current one FREE the current PicBuffers and allocate affresh            */
811
    /***************************************************************************/
812
0
    if(!ps_dec->u1_init_dec_flag)
813
0
    {
814
0
        ps_dec->u1_max_dec_frame_buffering = ih264d_get_dpb_size(ps_seq);
815
816
0
        ps_dec->i4_display_delay = ps_dec->u1_max_dec_frame_buffering;
817
0
        if((1 == ps_seq->u1_vui_parameters_present_flag) &&
818
0
           (1 == ps_seq->s_vui.u1_bitstream_restriction_flag))
819
0
        {
820
0
            if(ps_seq->u1_frame_mbs_only_flag == 1)
821
0
                ps_dec->i4_display_delay = ps_seq->s_vui.u4_num_reorder_frames + 1;
822
0
            else
823
0
                ps_dec->i4_display_delay = ps_seq->s_vui.u4_num_reorder_frames * 2 + 2;
824
0
        }
825
826
0
        if(IVD_DECODE_FRAME_OUT == ps_dec->e_frm_out_mode)
827
0
            ps_dec->i4_display_delay = 0;
828
829
0
        if(ps_dec->u4_share_disp_buf == 0)
830
0
        {
831
0
            if(ps_seq->u1_frame_mbs_only_flag == 1)
832
0
                ps_dec->u1_pic_bufs = ps_dec->i4_display_delay + ps_seq->u1_num_ref_frames + 1;
833
0
            else
834
0
                ps_dec->u1_pic_bufs = ps_dec->i4_display_delay + ps_seq->u1_num_ref_frames * 2 + 2;
835
0
        }
836
0
        else
837
0
        {
838
0
            ps_dec->u1_pic_bufs = (WORD32)ps_dec->u4_num_disp_bufs;
839
0
        }
840
841
        /* Ensure at least two buffers are allocated */
842
0
        ps_dec->u1_pic_bufs = MAX(ps_dec->u1_pic_bufs, 2);
843
844
0
        if(ps_dec->u4_share_disp_buf == 0)
845
0
            ps_dec->u1_pic_bufs = MIN(ps_dec->u1_pic_bufs,
846
0
                                      (H264_MAX_REF_PICS * 2));
847
848
0
        ps_dec->u1_max_dec_frame_buffering = MIN(
849
0
                        ps_dec->u1_max_dec_frame_buffering,
850
0
                        ps_dec->u1_pic_bufs);
851
852
        /* Temporary hack to run Tractor Cav/Cab/MbAff Profiler streams  also for CAFI1_SVA_C.264 in conformance*/
853
0
        if(ps_dec->u1_init_dec_flag)
854
0
        {
855
0
            ih264d_release_pics_in_dpb((void *)ps_dec,
856
0
                                       ps_dec->u1_pic_bufs);
857
0
            ih264d_release_display_bufs(ps_dec);
858
0
            ih264d_reset_ref_bufs(ps_dec->ps_dpb_mgr);
859
0
        }
860
861
        /*********************************************************************/
862
        /* Configuring decoder parameters based on level and then            */
863
        /* fresh pointer initialisation in decoder scratch and state buffers */
864
        /*********************************************************************/
865
0
        if(!ps_dec->u1_init_dec_flag ||
866
0
                ((ps_seq->u1_level_idc < H264_LEVEL_3_0) ^ (ps_prev_seq_params->u1_level_idc < H264_LEVEL_3_0)))
867
0
        {
868
0
            ret = ih264d_init_dec_mb_grp(ps_dec);
869
0
            if(ret != OK)
870
0
                return ret;
871
0
        }
872
873
0
        ret = ih264d_allocate_dynamic_bufs(ps_dec);
874
0
        if(ret != OK)
875
0
        {
876
            /* Free any dynamic buffers that are allocated */
877
0
            ih264d_free_dynamic_bufs(ps_dec);
878
0
            ps_dec->i4_error_code = IVD_MEM_ALLOC_FAILED;
879
0
            return IVD_MEM_ALLOC_FAILED;
880
0
        }
881
882
0
        ret = ih264d_create_pic_buffers(ps_dec->u1_pic_bufs,
883
0
                                        ps_dec);
884
0
        if(ret != OK)
885
0
            return ret;
886
887
888
889
0
        ret = ih264d_create_mv_bank(ps_dec, ps_dec->u2_pic_wd,
890
0
                                    ps_dec->u2_pic_ht);
891
0
        if(ret != OK)
892
0
            return ret;
893
894
        /* In shared mode, set all of them as used by display */
895
0
        if(ps_dec->u4_share_disp_buf == 1)
896
0
        {
897
0
            WORD32 i;
898
899
0
            for(i = 0; i < ps_dec->u1_pic_bufs; i++)
900
0
            {
901
0
                ih264_buf_mgr_set_status((buf_mgr_t *)ps_dec->pv_pic_buf_mgr, i,
902
0
                                         BUF_MGR_IO);
903
0
            }
904
0
        }
905
906
0
        ps_dec->u1_init_dec_flag = 1;
907
0
        ps_prev_seq_params->u2_frm_wd_in_mbs = ps_seq->u2_frm_wd_in_mbs;
908
0
        ps_prev_seq_params->u1_level_idc = ps_seq->u1_level_idc;
909
0
        ps_prev_seq_params->u1_profile_idc = ps_seq->u1_profile_idc;
910
0
        ps_prev_seq_params->u2_frm_ht_in_mbs = ps_seq->u2_frm_ht_in_mbs;
911
0
        ps_prev_seq_params->u1_frame_mbs_only_flag =
912
0
                        ps_seq->u1_frame_mbs_only_flag;
913
0
        ps_prev_seq_params->u1_direct_8x8_inference_flag =
914
0
                        ps_seq->u1_direct_8x8_inference_flag;
915
916
0
        ps_dec->i4_cur_display_seq = 0;
917
0
        ps_dec->i4_prev_max_display_seq = 0;
918
0
        ps_dec->i4_max_poc = 0;
919
920
0
        {
921
            /* 0th entry of CtxtIncMbMap will be always be containing default values
922
             for CABAC context representing MB not available */
923
0
            ctxt_inc_mb_info_t *p_DefCtxt = ps_dec->p_ctxt_inc_mb_map - 1;
924
0
            UWORD8 *pu1_temp;
925
0
            WORD8 i;
926
0
            p_DefCtxt->u1_mb_type = CAB_SKIP;
927
928
0
            p_DefCtxt->u1_cbp = 0x0f;
929
0
            p_DefCtxt->u1_intra_chroma_pred_mode = 0;
930
931
0
            p_DefCtxt->u1_yuv_dc_csbp = 0x7;
932
933
0
            p_DefCtxt->u1_transform8x8_ctxt = 0;
934
935
0
            pu1_temp = (UWORD8*)p_DefCtxt->i1_ref_idx;
936
0
            for(i = 0; i < 4; i++, pu1_temp++)
937
0
                (*pu1_temp) = 0;
938
0
            pu1_temp = (UWORD8*)p_DefCtxt->u1_mv;
939
0
            for(i = 0; i < 16; i++, pu1_temp++)
940
0
                (*pu1_temp) = 0;
941
0
            ps_dec->ps_def_ctxt_mb_info = p_DefCtxt;
942
0
        }
943
944
0
    }
945
    /* reset DBP commands read u4_flag */
946
0
    ps_dec->ps_dpb_cmds->u1_dpb_commands_read = 0;
947
948
0
    return OK;
949
0
}
950
951
/*****************************************************************************/
952
/*                                                                           */
953
/*  Function Name : ih264d_get_next_display_field                                   */
954
/*                                                                           */
955
/*  Description   : Application calls this module to get the next field      */
956
/*                  to be displayed                                          */
957
/*                                                                           */
958
/*  Inputs        : 1.   IBUFAPI_Handle Hnadle to the Display buffer         */
959
/*                  2.   IH264DEC_DispUnit    Pointer to the display struct  */
960
/*                                                                           */
961
/*  Globals       :                                                          */
962
/*                                                                           */
963
/*                                                                           */
964
/*  Processing    : None                                                     */
965
/*  Outputs       : None                                                     */
966
/*  Returns       : None                                                     */
967
/*  Issues        : None                                                     */
968
/*                                                                           */
969
/*  Revision History:                                                        */
970
/*                                                                           */
971
/*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
972
/*         27 05 2005   Ittiam          Draft                                */
973
/*                                                                           */
974
/*****************************************************************************/
975
976
WORD32 ih264d_get_next_display_field(dec_struct_t * ps_dec,
977
                                  ivd_out_bufdesc_t *ps_out_buffer,
978
                                  ivd_get_display_frame_op_t *pv_disp_op)
979
195k
{
980
195k
    pic_buffer_t *pic_buf;
981
982
195k
    UWORD8 i1_cur_fld;
983
195k
    WORD32 u4_api_ret = -1;
984
195k
    WORD32 i4_disp_buf_id;
985
195k
    iv_yuv_buf_t *ps_op_frm;
986
987
988
989
195k
    ps_op_frm = &(ps_dec->s_disp_frame_info);
990
195k
    H264_MUTEX_LOCK(&ps_dec->process_disp_mutex);
991
195k
    pic_buf = (pic_buffer_t *)ih264_disp_mgr_get(
992
195k
                    (disp_mgr_t *)ps_dec->pv_disp_buf_mgr, &i4_disp_buf_id);
993
195k
    ps_dec->u4_num_fld_in_frm = 0;
994
195k
    u4_api_ret = -1;
995
195k
    pv_disp_op->u4_ts = 0;
996
195k
    pv_disp_op->e_output_format = ps_dec->u1_chroma_format;
997
998
195k
    pv_disp_op->s_disp_frm_buf.pv_y_buf = ps_out_buffer->pu1_bufs[0];
999
195k
    pv_disp_op->s_disp_frm_buf.pv_u_buf = ps_out_buffer->pu1_bufs[1];
1000
195k
    pv_disp_op->s_disp_frm_buf.pv_v_buf = ps_out_buffer->pu1_bufs[2];
1001
195k
    ps_dec->i4_display_index  = DEFAULT_POC;
1002
195k
    if(pic_buf != NULL)
1003
92.3k
    {
1004
92.3k
        ps_dec->pv_disp_sei_params = &pic_buf->s_sei_pic;
1005
92.3k
        pv_disp_op->e4_fld_type = 0;
1006
92.3k
        pv_disp_op->u4_disp_buf_id = i4_disp_buf_id;
1007
1008
92.3k
        ps_op_frm->u4_y_ht = pic_buf->u2_disp_height << 1;
1009
92.3k
        ps_op_frm->u4_u_ht = ps_op_frm->u4_v_ht = ps_op_frm->u4_y_ht >> 1;
1010
92.3k
        ps_op_frm->u4_y_wd = pic_buf->u2_disp_width;
1011
1012
92.3k
        ps_op_frm->u4_u_wd = ps_op_frm->u4_v_wd = ps_op_frm->u4_y_wd >> 1;
1013
1014
92.3k
        ps_op_frm->u4_y_strd = pic_buf->u2_frm_wd_y;
1015
92.3k
        ps_op_frm->u4_u_strd = ps_op_frm->u4_v_strd = pic_buf->u2_frm_wd_uv;
1016
1017
        /* ! */
1018
92.3k
        pv_disp_op->u4_ts = pic_buf->u4_ts;
1019
92.3k
        ps_dec->i4_display_index = pic_buf->i4_poc;
1020
1021
        /* set the start of the Y, U and V buffer pointer for display    */
1022
92.3k
        ps_op_frm->pv_y_buf = pic_buf->pu1_buf1 + pic_buf->u2_crop_offset_y;
1023
92.3k
        ps_op_frm->pv_u_buf = pic_buf->pu1_buf2 + pic_buf->u2_crop_offset_uv;
1024
92.3k
        ps_op_frm->pv_v_buf = pic_buf->pu1_buf3 + pic_buf->u2_crop_offset_uv;
1025
92.3k
        ps_dec->u4_num_fld_in_frm++;
1026
92.3k
        ps_dec->u4_num_fld_in_frm++;
1027
92.3k
        u4_api_ret = 0;
1028
1029
92.3k
        if(pic_buf->u1_picturetype == 0)
1030
92.3k
            pv_disp_op->u4_progressive_frame_flag = 1;
1031
0
        else
1032
0
            pv_disp_op->u4_progressive_frame_flag = 0;
1033
1034
92.3k
    } H264_MUTEX_UNLOCK(&ps_dec->process_disp_mutex);
1035
195k
    pv_disp_op->u4_error_code = u4_api_ret;
1036
195k
    pv_disp_op->e_pic_type = 0xFFFFFFFF; //Junk;
1037
1038
195k
    if(u4_api_ret)
1039
102k
    {
1040
102k
        pv_disp_op->u4_error_code = 1; //put a proper error code here
1041
102k
    }
1042
92.3k
    else
1043
92.3k
    {
1044
1045
        //Release the buffer if being sent for display
1046
92.3k
        UWORD32 temp;
1047
92.3k
        UWORD32 dest_inc_Y = 0, dest_inc_UV = 0;
1048
1049
92.3k
        pv_disp_op->s_disp_frm_buf.u4_y_wd = temp = MIN(ps_op_frm->u4_y_wd,
1050
92.3k
                                                        ps_op_frm->u4_y_strd);
1051
92.3k
        pv_disp_op->s_disp_frm_buf.u4_u_wd = pv_disp_op->s_disp_frm_buf.u4_y_wd
1052
92.3k
                        >> 1;
1053
92.3k
        pv_disp_op->s_disp_frm_buf.u4_v_wd = pv_disp_op->s_disp_frm_buf.u4_y_wd
1054
92.3k
                        >> 1;
1055
1056
92.3k
        pv_disp_op->s_disp_frm_buf.u4_y_ht = ps_op_frm->u4_y_ht;
1057
92.3k
        pv_disp_op->s_disp_frm_buf.u4_u_ht = pv_disp_op->s_disp_frm_buf.u4_y_ht
1058
92.3k
                        >> 1;
1059
92.3k
        pv_disp_op->s_disp_frm_buf.u4_v_ht = pv_disp_op->s_disp_frm_buf.u4_y_ht
1060
92.3k
                        >> 1;
1061
92.3k
        if(0 == ps_dec->u4_share_disp_buf)
1062
92.3k
        {
1063
92.3k
            pv_disp_op->s_disp_frm_buf.u4_y_strd =
1064
92.3k
                            pv_disp_op->s_disp_frm_buf.u4_y_wd;
1065
92.3k
            pv_disp_op->s_disp_frm_buf.u4_u_strd =
1066
92.3k
                            pv_disp_op->s_disp_frm_buf.u4_y_wd >> 1;
1067
92.3k
            pv_disp_op->s_disp_frm_buf.u4_v_strd =
1068
92.3k
                            pv_disp_op->s_disp_frm_buf.u4_y_wd >> 1;
1069
1070
92.3k
        }
1071
0
        else
1072
0
        {
1073
0
            pv_disp_op->s_disp_frm_buf.u4_y_strd = ps_op_frm->u4_y_strd;
1074
0
        }
1075
1076
92.3k
        if(ps_dec->u4_app_disp_width)
1077
0
        {
1078
0
            pv_disp_op->s_disp_frm_buf.u4_y_strd = MAX(
1079
0
                            ps_dec->u4_app_disp_width,
1080
0
                            pv_disp_op->s_disp_frm_buf.u4_y_strd);
1081
0
        }
1082
1083
92.3k
        pv_disp_op->u4_error_code = 0;
1084
92.3k
        if(pv_disp_op->e_output_format == IV_YUV_420P)
1085
50.3k
        {
1086
50.3k
            UWORD32 i;
1087
50.3k
            pv_disp_op->s_disp_frm_buf.u4_u_strd =
1088
50.3k
                            pv_disp_op->s_disp_frm_buf.u4_y_strd >> 1;
1089
50.3k
            pv_disp_op->s_disp_frm_buf.u4_v_strd =
1090
50.3k
                            pv_disp_op->s_disp_frm_buf.u4_y_strd >> 1;
1091
1092
50.3k
            pv_disp_op->s_disp_frm_buf.u4_u_wd = ps_op_frm->u4_y_wd >> 1;
1093
50.3k
            pv_disp_op->s_disp_frm_buf.u4_v_wd = ps_op_frm->u4_y_wd >> 1;
1094
1095
50.3k
            if(1 == ps_dec->u4_share_disp_buf)
1096
0
            {
1097
0
                pv_disp_op->s_disp_frm_buf.pv_y_buf = ps_op_frm->pv_y_buf;
1098
1099
0
                for(i = 0; i < MAX_DISP_BUFS_NEW; i++)
1100
0
                {
1101
0
                    UWORD8 *buf = ps_dec->disp_bufs[i].buf[0];
1102
0
                    buf += ps_dec->disp_bufs[i].u4_ofst[0];
1103
0
                    if(((UWORD8 *)pv_disp_op->s_disp_frm_buf.pv_y_buf
1104
0
                                    - pic_buf->u2_crop_offset_y) == buf)
1105
0
                    {
1106
0
                        buf = ps_dec->disp_bufs[i].buf[1];
1107
0
                        buf += ps_dec->disp_bufs[i].u4_ofst[1];
1108
0
                        pv_disp_op->s_disp_frm_buf.pv_u_buf = buf
1109
0
                                        + (pic_buf->u2_crop_offset_uv
1110
0
                                           / YUV420SP_FACTOR);
1111
1112
0
                        buf = ps_dec->disp_bufs[i].buf[2];
1113
0
                        buf += ps_dec->disp_bufs[i].u4_ofst[2];
1114
0
                        pv_disp_op->s_disp_frm_buf.pv_v_buf = buf
1115
0
                                        + (pic_buf->u2_crop_offset_uv
1116
0
                                           / YUV420SP_FACTOR);
1117
1118
0
                    }
1119
0
                }
1120
0
            }
1121
1122
50.3k
        }
1123
41.9k
        else if((pv_disp_op->e_output_format == IV_YUV_420SP_UV)
1124
41.9k
                        || (pv_disp_op->e_output_format == IV_YUV_420SP_VU))
1125
41.9k
        {
1126
41.9k
            pv_disp_op->s_disp_frm_buf.u4_u_strd =
1127
41.9k
                            pv_disp_op->s_disp_frm_buf.u4_y_strd;
1128
41.9k
            pv_disp_op->s_disp_frm_buf.u4_v_strd = 0;
1129
1130
41.9k
            if(1 == ps_dec->u4_share_disp_buf)
1131
0
            {
1132
0
                UWORD32 i;
1133
1134
0
                pv_disp_op->s_disp_frm_buf.pv_y_buf = ps_op_frm->pv_y_buf;
1135
1136
0
                for(i = 0; i < MAX_DISP_BUFS_NEW; i++)
1137
0
                {
1138
0
                    UWORD8 *buf = ps_dec->disp_bufs[i].buf[0];
1139
0
                    buf += ps_dec->disp_bufs[i].u4_ofst[0];
1140
0
                    if((UWORD8 *)pv_disp_op->s_disp_frm_buf.pv_y_buf
1141
0
                                    - pic_buf->u2_crop_offset_y == buf)
1142
0
                    {
1143
0
                        buf = ps_dec->disp_bufs[i].buf[1];
1144
0
                        buf += ps_dec->disp_bufs[i].u4_ofst[1];
1145
0
                        pv_disp_op->s_disp_frm_buf.pv_u_buf = buf
1146
0
                                        + pic_buf->u2_crop_offset_uv;
1147
0
                        ;
1148
1149
0
                        buf = ps_dec->disp_bufs[i].buf[2];
1150
0
                        buf += ps_dec->disp_bufs[i].u4_ofst[2];
1151
0
                        pv_disp_op->s_disp_frm_buf.pv_v_buf = buf
1152
0
                                        + pic_buf->u2_crop_offset_uv;
1153
0
                        ;
1154
0
                    }
1155
0
                }
1156
0
            }
1157
41.9k
            pv_disp_op->s_disp_frm_buf.u4_u_wd =
1158
41.9k
                            pv_disp_op->s_disp_frm_buf.u4_y_wd;
1159
41.9k
            pv_disp_op->s_disp_frm_buf.u4_v_wd = 0;
1160
1161
41.9k
        }
1162
0
        else if((pv_disp_op->e_output_format == IV_RGB_565)
1163
0
                        || (pv_disp_op->e_output_format == IV_YUV_422ILE))
1164
0
        {
1165
1166
0
            pv_disp_op->s_disp_frm_buf.u4_u_strd = 0;
1167
0
            pv_disp_op->s_disp_frm_buf.u4_v_strd = 0;
1168
0
            pv_disp_op->s_disp_frm_buf.u4_u_wd = 0;
1169
0
            pv_disp_op->s_disp_frm_buf.u4_v_wd = 0;
1170
0
            pv_disp_op->s_disp_frm_buf.u4_u_ht = 0;
1171
0
            pv_disp_op->s_disp_frm_buf.u4_v_ht = 0;
1172
1173
0
        }
1174
1175
1176
92.3k
    }
1177
1178
195k
    return u4_api_ret;
1179
195k
}
1180
1181
1182
/*****************************************************************************/
1183
/*  Function Name : ih264d_release_display_field                                         */
1184
/*                                                                           */
1185
/*  Description   : This function releases the display field that was returned   */
1186
/*                  here.                                                    */
1187
/*  Inputs        : ps_dec - Decoder parameters                              */
1188
/*  Globals       : None                                                     */
1189
/*  Processing    : Refer bumping process in the standard                    */
1190
/*  Outputs       : Assigns display sequence number.                         */
1191
/*  Returns       : None                                                     */
1192
/*                                                                           */
1193
/*  Issues        : None                                                     */
1194
/*                                                                           */
1195
/*  Revision History:                                                        */
1196
/*                                                                           */
1197
/*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
1198
/*         27 04 2005   NS              Draft                                */
1199
/*                                                                           */
1200
/*****************************************************************************/
1201
void ih264d_release_display_field(dec_struct_t *ps_dec,
1202
                                  ivd_get_display_frame_op_t *pv_disp_op)
1203
133k
{
1204
133k
    if(1 == pv_disp_op->u4_error_code)
1205
78.8k
    {
1206
78.8k
        if(1 == ps_dec->u1_flushfrm)
1207
0
        {
1208
0
            UWORD32 i;
1209
1210
0
            if(1 == ps_dec->u4_share_disp_buf)
1211
0
            {
1212
0
                H264_MUTEX_LOCK(&ps_dec->process_disp_mutex);
1213
0
                for(i = 0; i < (MAX_DISP_BUFS_NEW); i++)
1214
0
                {
1215
0
                    if(1 == ps_dec->u4_disp_buf_mapping[i])
1216
0
                    {
1217
0
                        ih264_buf_mgr_release(
1218
0
                                        (buf_mgr_t *)ps_dec->pv_pic_buf_mgr, i,
1219
0
                                        BUF_MGR_IO);
1220
0
                        ps_dec->u4_disp_buf_mapping[i] = 0;
1221
0
                    }
1222
0
                } H264_MUTEX_UNLOCK(&ps_dec->process_disp_mutex);
1223
1224
0
                memset(ps_dec->u4_disp_buf_to_be_freed, 0,
1225
0
                       (MAX_DISP_BUFS_NEW) * sizeof(UWORD32));
1226
0
                for(i = 0; i < ps_dec->u1_pic_bufs; i++)
1227
0
                    ps_dec->u4_disp_buf_mapping[i] = 1;
1228
0
            }
1229
0
            ps_dec->u1_flushfrm = 0;
1230
1231
0
        }
1232
78.8k
    }
1233
54.5k
    else
1234
54.5k
    {
1235
54.5k
        H264_MUTEX_LOCK(&ps_dec->process_disp_mutex);
1236
1237
54.5k
        if(0 == ps_dec->u4_share_disp_buf)
1238
54.5k
        {
1239
54.5k
            ih264_buf_mgr_release((buf_mgr_t *)ps_dec->pv_pic_buf_mgr,
1240
54.5k
                                  pv_disp_op->u4_disp_buf_id,
1241
54.5k
                                  BUF_MGR_IO);
1242
1243
54.5k
        }
1244
0
        else
1245
0
        {
1246
0
            ps_dec->u4_disp_buf_mapping[pv_disp_op->u4_disp_buf_id] = 1;
1247
0
        } H264_MUTEX_UNLOCK(&ps_dec->process_disp_mutex);
1248
1249
54.5k
    }
1250
133k
}
1251
/*****************************************************************************/
1252
/*  Function Name : ih264d_assign_display_seq                                         */
1253
/*                                                                           */
1254
/*  Description   : This function implments bumping process. Every outgoing  */
1255
/*                  frame from DPB is assigned a display sequence number     */
1256
/*                  which increases monotonically. System looks for this     */
1257
/*                  number to display a frame.                              */
1258
/*                  here.                                                    */
1259
/*  Inputs        : ps_dec - Decoder parameters                              */
1260
/*  Globals       : None                                                     */
1261
/*  Processing    : Refer bumping process in the standard                    */
1262
/*  Outputs       : Assigns display sequence number.                         */
1263
/*  Returns       : None                                                     */
1264
/*                                                                           */
1265
/*  Issues        : None                                                     */
1266
/*                                                                           */
1267
/*  Revision History:                                                        */
1268
/*                                                                           */
1269
/*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
1270
/*         27 04 2005   NS              Draft                                */
1271
/*                                                                           */
1272
/*****************************************************************************/
1273
WORD32 ih264d_assign_display_seq(dec_struct_t *ps_dec)
1274
133k
{
1275
133k
    WORD32 i;
1276
133k
    WORD32 i4_min_poc;
1277
133k
    WORD32 i4_min_poc_buf_id;
1278
133k
    WORD32 i4_min_index;
1279
133k
    dpb_manager_t *ps_dpb_mgr = ps_dec->ps_dpb_mgr;
1280
133k
    WORD32 (*i4_poc_buf_id_map)[3] = ps_dpb_mgr->ai4_poc_buf_id_map;
1281
1282
133k
    i4_min_poc = 0x7fffffff;
1283
133k
    i4_min_poc_buf_id = -1;
1284
133k
    i4_min_index = -1;
1285
1286
133k
    if(ps_dpb_mgr->i1_poc_buf_id_entries >= ps_dec->i4_display_delay)
1287
2.74k
    {
1288
46.7k
        for(i = 0; i < MAX_FRAMES; i++)
1289
43.9k
        {
1290
43.9k
            if((i4_poc_buf_id_map[i][0] != -1)
1291
43.9k
                            && (DO_NOT_DISP
1292
37.9k
                                            != ps_dpb_mgr->ai4_poc_buf_id_map[i][0]))
1293
37.9k
            {
1294
                /* Checking for <= is necessary to handle cases where there is one
1295
                   valid buffer with poc set to 0x7FFFFFFF. */
1296
37.9k
                if(i4_poc_buf_id_map[i][1] <= i4_min_poc)
1297
17.1k
                {
1298
17.1k
                    i4_min_poc = i4_poc_buf_id_map[i][1];
1299
17.1k
                    i4_min_poc_buf_id = i4_poc_buf_id_map[i][0];
1300
17.1k
                    i4_min_index = i;
1301
17.1k
                }
1302
37.9k
            }
1303
43.9k
        }
1304
1305
2.74k
        if((i4_min_index != -1) && (DO_NOT_DISP != i4_min_poc_buf_id))
1306
2.74k
        {
1307
2.74k
            ps_dec->i4_cur_display_seq++;
1308
2.74k
            ih264_disp_mgr_add(
1309
2.74k
                            (disp_mgr_t *)ps_dec->pv_disp_buf_mgr,
1310
2.74k
                            i4_min_poc_buf_id, ps_dec->i4_cur_display_seq,
1311
2.74k
                            ps_dec->apv_buf_id_pic_buf_map[i4_min_poc_buf_id]);
1312
2.74k
            i4_poc_buf_id_map[i4_min_index][0] = -1;
1313
2.74k
            i4_poc_buf_id_map[i4_min_index][1] = 0x7fffffff;
1314
2.74k
            ps_dpb_mgr->i1_poc_buf_id_entries--;
1315
2.74k
        }
1316
0
        else if(DO_NOT_DISP == i4_min_poc_buf_id)
1317
0
        {
1318
0
            WORD32 i4_error_code;
1319
0
            i4_error_code = ERROR_GAPS_IN_FRM_NUM;
1320
//          i4_error_code |= 1<<IVD_CORRUPTEDDATA;
1321
0
            return i4_error_code;
1322
0
        }
1323
2.74k
    }
1324
133k
    return OK;
1325
133k
}
1326
1327
/*****************************************************************************/
1328
/*                                                                           */
1329
/*  Function Name : ih264d_release_display_bufs                                       */
1330
/*                                                                           */
1331
/*  Description   : This function implments bumping process when mmco = 5.   */
1332
/*                  Each outgoing frame from DPB is assigned a display       */
1333
/*                  sequence number which increases monotonically. System    */
1334
/*                  looks for this number to display a frame.                */
1335
/*  Inputs        : ps_dec - Decoder parameters                              */
1336
/*  Globals       : None                                                     */
1337
/*  Processing    : Refer bumping process in the standard for mmco = 5       */
1338
/*  Outputs       : Assigns display sequence number.                         */
1339
/*  Returns       : None                                                     */
1340
/*                                                                           */
1341
/*  Issues        : None                                                     */
1342
/*                                                                           */
1343
/*  Revision History:                                                        */
1344
/*                                                                           */
1345
/*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
1346
/*         27 04 2005   NS              Draft                                */
1347
/*                                                                           */
1348
/*****************************************************************************/
1349
void ih264d_release_display_bufs(dec_struct_t *ps_dec)
1350
113k
{
1351
113k
    WORD32 i, j;
1352
113k
    WORD32 i4_min_poc;
1353
113k
    WORD32 i4_min_poc_buf_id;
1354
113k
    WORD32 i4_min_index;
1355
113k
    WORD64 i8_temp;
1356
113k
    dpb_manager_t *ps_dpb_mgr = ps_dec->ps_dpb_mgr;
1357
113k
    WORD32 (*i4_poc_buf_id_map)[3] = ps_dpb_mgr->ai4_poc_buf_id_map;
1358
1359
113k
    i4_min_poc = 0x7fffffff;
1360
113k
    i4_min_poc_buf_id = 0;
1361
113k
    i4_min_index = 0;
1362
1363
113k
    ih264d_delete_nonref_nondisplay_pics(ps_dpb_mgr);
1364
1365
212k
    for(j = 0; j < ps_dpb_mgr->i1_poc_buf_id_entries; j++)
1366
99.5k
    {
1367
99.5k
        i4_min_poc = 0x7fffffff;
1368
1.69M
        for(i = 0; i < MAX_FRAMES; i++)
1369
1.59M
        {
1370
1.59M
            if(i4_poc_buf_id_map[i][0] != -1)
1371
127k
            {
1372
                /* Checking for <= is necessary to handle cases where there is one
1373
                   valid buffer with poc set to 0x7FFFFFFF. */
1374
127k
                if(i4_poc_buf_id_map[i][1] <= i4_min_poc)
1375
111k
                {
1376
111k
                    i4_min_poc = i4_poc_buf_id_map[i][1];
1377
111k
                    i4_min_poc_buf_id = i4_poc_buf_id_map[i][0];
1378
111k
                    i4_min_index = i;
1379
111k
                }
1380
127k
            }
1381
1.59M
        }
1382
1383
99.5k
        if(DO_NOT_DISP != i4_min_poc_buf_id)
1384
99.5k
        {
1385
99.5k
            ps_dec->i4_cur_display_seq++;
1386
99.5k
            ih264_disp_mgr_add(
1387
99.5k
                            (disp_mgr_t *)ps_dec->pv_disp_buf_mgr,
1388
99.5k
                            i4_min_poc_buf_id, ps_dec->i4_cur_display_seq,
1389
99.5k
                            ps_dec->apv_buf_id_pic_buf_map[i4_min_poc_buf_id]);
1390
99.5k
            i4_poc_buf_id_map[i4_min_index][0] = -1;
1391
99.5k
            i4_poc_buf_id_map[i4_min_index][1] = 0x7fffffff;
1392
99.5k
            ps_dpb_mgr->ai4_poc_buf_id_map[i4_min_index][2] = 0;
1393
99.5k
        }
1394
0
        else
1395
0
        {
1396
0
            i4_poc_buf_id_map[i4_min_index][0] = -1;
1397
0
            i4_poc_buf_id_map[i4_min_index][1] = 0x7fffffff;
1398
0
            ps_dpb_mgr->ai4_poc_buf_id_map[i4_min_index][2] = 0;
1399
0
        }
1400
99.5k
    }
1401
113k
    ps_dpb_mgr->i1_poc_buf_id_entries = 0;
1402
113k
    i8_temp = (WORD64)ps_dec->i4_prev_max_display_seq + ps_dec->i4_max_poc
1403
113k
              + ps_dec->u1_max_dec_frame_buffering + 1;
1404
    /*If i4_prev_max_display_seq overflows integer range, reset it */
1405
113k
    ps_dec->i4_prev_max_display_seq = IS_OUT_OF_RANGE_S32(i8_temp)?
1406
113k
                                      0 : i8_temp;
1407
113k
    ps_dec->i4_max_poc = 0;
1408
113k
}
1409
1410
/*****************************************************************************/
1411
/*                                                                           */
1412
/*  Function Name : ih264d_assign_pic_num                                           */
1413
/*                                                                           */
1414
/*  Description   : This function assigns pic num to each reference frame    */
1415
/*                  depending on the cur_frame_num as speified in section    */
1416
/*                  8.2.4.1                                                  */
1417
/*                                                                           */
1418
/*  Inputs        : ps_dec                                                   */
1419
/*                                                                           */
1420
/*  Globals       : NO globals used                                          */
1421
/*                                                                           */
1422
/*  Processing    : for all ST pictures                                      */
1423
/*                    if( FrameNum > cur_frame_num)                          */
1424
/*                    PicNum = FrameNum - MaxFrameNum                        */
1425
/*                    else                                                   */
1426
/*                    PicNum = FrameNum                                      */
1427
/*                                                                           */
1428
/*  Returns       : void                                                     */
1429
/*                                                                           */
1430
/*  Issues        : NO                                                       */
1431
/*                                                                           */
1432
/*  Revision History:                                                        */
1433
/*                                                                           */
1434
/*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
1435
/*         13 07 2002   Jay             Draft                                */
1436
/*                                                                           */
1437
/*****************************************************************************/
1438
1439
void ih264d_assign_pic_num(dec_struct_t *ps_dec)
1440
141k
{
1441
141k
    dpb_manager_t *ps_dpb_mgr;
1442
141k
    struct dpb_info_t *ps_next_dpb;
1443
141k
    WORD8 i;
1444
141k
    WORD32 i4_cur_frame_num, i4_max_frame_num;
1445
141k
    WORD32 i4_ref_frame_num;
1446
141k
    UWORD8 u1_fld_pic_flag = ps_dec->ps_cur_slice->u1_field_pic_flag;
1447
1448
141k
    i4_max_frame_num = ps_dec->ps_cur_sps->u2_u4_max_pic_num_minus1 + 1;
1449
141k
    i4_cur_frame_num = ps_dec->ps_cur_pic->i4_frame_num;
1450
141k
    ps_dpb_mgr = ps_dec->ps_dpb_mgr;
1451
1452
    /* Start from ST head */
1453
141k
    ps_next_dpb = ps_dpb_mgr->ps_dpb_st_head;
1454
248k
    for(i = 0; i < ps_dpb_mgr->u1_num_st_ref_bufs; i++)
1455
106k
    {
1456
106k
        WORD32 i4_pic_num;
1457
1458
106k
        i4_ref_frame_num = ps_next_dpb->ps_pic_buf->i4_frame_num;
1459
106k
        if(i4_ref_frame_num > i4_cur_frame_num)
1460
27.9k
        {
1461
            /* RefPic Buf frame_num is before Current frame_num in decode order */
1462
27.9k
            i4_pic_num = i4_ref_frame_num - i4_max_frame_num;
1463
27.9k
        }
1464
78.9k
        else
1465
78.9k
        {
1466
            /* RefPic Buf frame_num is after Current frame_num in decode order */
1467
78.9k
            i4_pic_num = i4_ref_frame_num;
1468
78.9k
        }
1469
1470
106k
        ps_next_dpb->ps_pic_buf->i4_pic_num = i4_pic_num;
1471
106k
        ps_next_dpb->i4_frame_num = i4_pic_num;
1472
106k
        ps_next_dpb->ps_pic_buf->u1_long_term_frm_idx = MAX_REF_BUFS + 1;
1473
106k
        if(u1_fld_pic_flag)
1474
0
        {
1475
            /* Assign the pic num to top fields and bot fields */
1476
1477
0
            ps_next_dpb->s_top_field.i4_pic_num = i4_pic_num * 2
1478
0
                            + !(ps_dec->ps_cur_slice->u1_bottom_field_flag);
1479
0
            ps_next_dpb->s_bot_field.i4_pic_num = i4_pic_num * 2
1480
0
                            + ps_dec->ps_cur_slice->u1_bottom_field_flag;
1481
0
        }
1482
        /* Chase the next link */
1483
106k
        ps_next_dpb = ps_next_dpb->ps_prev_short;
1484
106k
    }
1485
1486
141k
    if(ps_dec->ps_cur_sps->u1_gaps_in_frame_num_value_allowed_flag
1487
141k
                    && ps_dpb_mgr->u1_num_gaps)
1488
0
    {
1489
0
        WORD32 i4_start_frm, i4_end_frm;
1490
        /* Assign pic numbers for gaps */
1491
0
        for(i = 0; i < MAX_FRAMES; i++)
1492
0
        {
1493
0
            i4_start_frm = ps_dpb_mgr->ai4_gaps_start_frm_num[i];
1494
0
            if(i4_start_frm != INVALID_FRAME_NUM)
1495
0
            {
1496
0
                if(i4_start_frm > i4_cur_frame_num)
1497
0
                {
1498
                    /* gap's frame_num is before Current frame_num in
1499
                     decode order */
1500
0
                    i4_start_frm -= i4_max_frame_num;
1501
0
                }
1502
0
                ps_dpb_mgr->ai4_gaps_start_frm_num[i] = i4_start_frm;
1503
0
                i4_end_frm = ps_dpb_mgr->ai4_gaps_end_frm_num[i];
1504
1505
0
                if(i4_end_frm > i4_cur_frame_num)
1506
0
                {
1507
                    /* gap's frame_num is before Current frame_num in
1508
                     decode order */
1509
0
                    i4_end_frm -= i4_max_frame_num;
1510
0
                }
1511
0
                ps_dpb_mgr->ai4_gaps_end_frm_num[i] = i4_end_frm;
1512
0
            }
1513
0
        }
1514
0
    }
1515
141k
}
1516
1517
/*!
1518
 **************************************************************************
1519
 * \if Function name : ih264d_update_qp \endif
1520
 *
1521
 * \brief
1522
 *    Updates the values of QP and its related entities
1523
 *
1524
 * \return
1525
 *    0 on Success and Error code otherwise
1526
 *
1527
 **************************************************************************
1528
 */
1529
WORD32 ih264d_update_qp(dec_struct_t * ps_dec, const WORD8 i1_qp)
1530
332k
{
1531
332k
    WORD32 i_temp;
1532
332k
    i_temp = (ps_dec->u1_qp + i1_qp + 52) % 52;
1533
1534
332k
    if((i_temp < 0) || (i_temp > 51) || (i1_qp < -26) || (i1_qp > 25))
1535
0
        return ERROR_INV_RANGE_QP_T;
1536
1537
332k
    ps_dec->u1_qp = i_temp;
1538
332k
    ps_dec->u1_qp_y_rem6 = ps_dec->u1_qp % 6;
1539
332k
    ps_dec->u1_qp_y_div6 = ps_dec->u1_qp / 6;
1540
332k
    i_temp = CLIP3(0, 51, ps_dec->u1_qp + ps_dec->ps_cur_pps->i1_chroma_qp_index_offset);
1541
332k
    ps_dec->u1_qp_u_rem6 = MOD(gau1_ih264d_qp_scale_cr[12 + i_temp], 6);
1542
332k
    ps_dec->u1_qp_u_div6 = DIV(gau1_ih264d_qp_scale_cr[12 + i_temp], 6);
1543
1544
332k
    i_temp = CLIP3(0, 51, ps_dec->u1_qp + ps_dec->ps_cur_pps->i1_second_chroma_qp_index_offset);
1545
332k
    ps_dec->u1_qp_v_rem6 = MOD(gau1_ih264d_qp_scale_cr[12 + i_temp], 6);
1546
332k
    ps_dec->u1_qp_v_div6 = DIV(gau1_ih264d_qp_scale_cr[12 + i_temp], 6);
1547
1548
332k
    ps_dec->pu2_quant_scale_y =
1549
332k
                    gau2_ih264_iquant_scale_4x4[ps_dec->u1_qp_y_rem6];
1550
332k
    ps_dec->pu2_quant_scale_u =
1551
332k
                    gau2_ih264_iquant_scale_4x4[ps_dec->u1_qp_u_rem6];
1552
332k
    ps_dec->pu2_quant_scale_v =
1553
332k
                    gau2_ih264_iquant_scale_4x4[ps_dec->u1_qp_v_rem6];
1554
332k
    return OK;
1555
332k
}
1556
1557
/*****************************************************************************/
1558
/*                                                                           */
1559
/*  Function Name : ih264d_decode_gaps_in_frame_num                                 */
1560
/*                                                                           */
1561
/*  Description   : This function decodes gaps in frame number               */
1562
/*                                                                           */
1563
/*  Inputs        : ps_dec          Decoder parameters                       */
1564
/*                  u2_frame_num   current frame number                     */
1565
/*                                                                           */
1566
/*  Globals       : None                                                     */
1567
/*  Processing    : This functionality needs to be implemented               */
1568
/*  Outputs       : None                                                     */
1569
/*  Returns       : None                                                     */
1570
/*                                                                           */
1571
/*  Issues        : Not implemented                                          */
1572
/*                                                                           */
1573
/*  Revision History:                                                        */
1574
/*                                                                           */
1575
/*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
1576
/*         06 05 2002   NS              Draft                                */
1577
/*                                                                           */
1578
/*****************************************************************************/
1579
WORD32 ih264d_decode_gaps_in_frame_num(dec_struct_t *ps_dec,
1580
                                       UWORD16 u2_frame_num)
1581
0
{
1582
0
    UWORD32 u4_next_frm_num, u4_start_frm_num;
1583
0
    UWORD32 u4_max_frm_num;
1584
0
    pocstruct_t s_tmp_poc;
1585
0
    WORD32 i4_poc;
1586
0
    dec_slice_params_t *ps_cur_slice;
1587
1588
0
    dec_pic_params_t *ps_pic_params;
1589
0
    WORD8 i1_gap_idx;
1590
0
    WORD32 *i4_gaps_start_frm_num;
1591
0
    dpb_manager_t *ps_dpb_mgr;
1592
0
    WORD32 i4_frame_gaps;
1593
0
    WORD8 *pi1_gaps_per_seq;
1594
0
    WORD32 ret;
1595
1596
0
    ps_cur_slice = ps_dec->ps_cur_slice;
1597
0
    if(ps_cur_slice->u1_field_pic_flag)
1598
0
    {
1599
0
        if(ps_dec->u2_prev_ref_frame_num == u2_frame_num)
1600
0
            return 0;
1601
0
    }
1602
0
    ps_pic_params = ps_dec->ps_cur_pps;
1603
1604
0
    u4_next_frm_num = ps_dec->u2_prev_ref_frame_num + 1;
1605
0
    u4_max_frm_num = ps_pic_params->ps_sps->u2_u4_max_pic_num_minus1 + 1;
1606
1607
    // check
1608
0
    if(u4_next_frm_num >= u4_max_frm_num)
1609
0
    {
1610
0
        u4_next_frm_num -= u4_max_frm_num;
1611
0
    }
1612
1613
0
    if(u4_next_frm_num == u2_frame_num)
1614
0
    {
1615
0
        return (0);
1616
0
    }
1617
1618
    // check
1619
0
    if((ps_dec->u1_nal_unit_type == IDR_SLICE_NAL)
1620
0
                    && (u4_next_frm_num >= u2_frame_num))
1621
0
    {
1622
0
        return (0);
1623
0
    }
1624
0
    u4_start_frm_num = u4_next_frm_num;
1625
1626
0
    s_tmp_poc.i4_pic_order_cnt_lsb = 0;
1627
0
    s_tmp_poc.i4_delta_pic_order_cnt_bottom = 0;
1628
0
    s_tmp_poc.i4_pic_order_cnt_lsb = 0;
1629
0
    s_tmp_poc.i4_delta_pic_order_cnt_bottom = 0;
1630
0
    s_tmp_poc.i4_delta_pic_order_cnt[0] = 0;
1631
0
    s_tmp_poc.i4_delta_pic_order_cnt[1] = 0;
1632
1633
0
    ps_cur_slice = ps_dec->ps_cur_slice;
1634
1635
0
    i4_frame_gaps = 0;
1636
0
    ps_dpb_mgr = ps_dec->ps_dpb_mgr;
1637
1638
    /* Find a empty slot to store gap seqn info */
1639
0
    i4_gaps_start_frm_num = ps_dpb_mgr->ai4_gaps_start_frm_num;
1640
0
    for(i1_gap_idx = 0; i1_gap_idx < MAX_FRAMES; i1_gap_idx++)
1641
0
    {
1642
0
        if(INVALID_FRAME_NUM == i4_gaps_start_frm_num[i1_gap_idx])
1643
0
            break;
1644
0
    }
1645
0
    if(MAX_FRAMES == i1_gap_idx)
1646
0
    {
1647
0
        UWORD32 i4_error_code;
1648
0
        i4_error_code = ERROR_DBP_MANAGER_T;
1649
//          i4_error_code |= 1<<IVD_CORRUPTEDDATA;
1650
0
        return i4_error_code;
1651
0
    }
1652
1653
0
    i4_poc = 0;
1654
0
    i4_gaps_start_frm_num[i1_gap_idx] = u4_start_frm_num;
1655
0
    ps_dpb_mgr->ai4_gaps_end_frm_num[i1_gap_idx] = u2_frame_num - 1;
1656
0
    pi1_gaps_per_seq = ps_dpb_mgr->ai1_gaps_per_seq;
1657
0
    pi1_gaps_per_seq[i1_gap_idx] = 0;
1658
0
    while(u4_next_frm_num != u2_frame_num)
1659
0
    {
1660
0
        ih264d_delete_nonref_nondisplay_pics(ps_dpb_mgr);
1661
0
        if(ps_pic_params->ps_sps->u1_pic_order_cnt_type)
1662
0
        {
1663
            /* allocate a picture buffer and insert it as ST node */
1664
0
            ret = ih264d_decode_pic_order_cnt(0, u4_next_frm_num,
1665
0
                                              &ps_dec->s_prev_pic_poc,
1666
0
                                              &s_tmp_poc, ps_cur_slice,
1667
0
                                              ps_pic_params, 1, 0, 0,
1668
0
                                              &i4_poc);
1669
0
            if(ret != OK)
1670
0
                return ret;
1671
1672
            /* Display seq no calculations */
1673
0
            if(i4_poc >= ps_dec->i4_max_poc)
1674
0
                ps_dec->i4_max_poc = i4_poc;
1675
            /* IDR Picture or POC wrap around */
1676
0
            if(i4_poc == 0)
1677
0
            {
1678
0
                WORD64 i8_temp;
1679
0
                i8_temp = (WORD64)ps_dec->i4_prev_max_display_seq
1680
0
                          + ps_dec->i4_max_poc
1681
0
                          + ps_dec->u1_max_dec_frame_buffering + 1;
1682
                /*If i4_prev_max_display_seq overflows integer range, reset it */
1683
0
                ps_dec->i4_prev_max_display_seq = IS_OUT_OF_RANGE_S32(i8_temp)?
1684
0
                                                  0 : i8_temp;
1685
0
                ps_dec->i4_max_poc = 0;
1686
0
            }
1687
1688
0
            ps_cur_slice->u1_mmco_equalto5 = 0;
1689
0
            ps_cur_slice->u2_frame_num = u4_next_frm_num;
1690
0
        }
1691
1692
        // check
1693
0
        if(ps_dpb_mgr->i1_poc_buf_id_entries
1694
0
                        >= ps_dec->u1_max_dec_frame_buffering)
1695
0
        {
1696
0
            ret = ih264d_assign_display_seq(ps_dec);
1697
0
            if(ret != OK)
1698
0
                return ret;
1699
0
        }
1700
1701
0
        {
1702
0
            WORD64 i8_display_poc;
1703
0
            i8_display_poc = (WORD64)ps_dec->i4_prev_max_display_seq +
1704
0
                        i4_poc;
1705
0
            if(IS_OUT_OF_RANGE_S32(i8_display_poc))
1706
0
            {
1707
0
                ps_dec->i4_prev_max_display_seq = 0;
1708
0
            }
1709
0
        }
1710
0
        ret = ih264d_insert_pic_in_display_list(
1711
0
                        ps_dec->ps_dpb_mgr, (WORD8) DO_NOT_DISP,
1712
0
                        (WORD32)(ps_dec->i4_prev_max_display_seq + i4_poc),
1713
0
                        u4_next_frm_num);
1714
0
        if(ret != OK)
1715
0
            return ret;
1716
1717
0
        pi1_gaps_per_seq[i1_gap_idx]++;
1718
0
        ret = ih264d_do_mmco_for_gaps(ps_dpb_mgr,
1719
0
                                ps_dec->ps_cur_sps->u1_num_ref_frames);
1720
0
        if(ret != OK)
1721
0
            return ret;
1722
1723
0
        ih264d_delete_nonref_nondisplay_pics(ps_dpb_mgr);
1724
1725
0
        u4_next_frm_num++;
1726
0
        if(u4_next_frm_num >= u4_max_frm_num)
1727
0
        {
1728
0
            u4_next_frm_num -= u4_max_frm_num;
1729
0
        }
1730
1731
0
        i4_frame_gaps++;
1732
0
    }
1733
1734
0
    return OK;
1735
0
}
1736
1737
/*!
1738
 **************************************************************************
1739
 * \if Function name : ih264d_create_pic_buffers \endif
1740
 *
1741
 * \brief
1742
 *    This function creates Picture Buffers.
1743
 *
1744
 * \return
1745
 *    0 on Success and -1 on error
1746
 **************************************************************************
1747
 */
1748
WORD32 ih264d_create_pic_buffers(UWORD8 u1_num_of_buf,
1749
                               dec_struct_t *ps_dec)
1750
23.4k
{
1751
23.4k
    struct pic_buffer_t *ps_pic_buf;
1752
23.4k
    UWORD8 i;
1753
23.4k
    UWORD32 u4_luma_size, u4_chroma_size;
1754
23.4k
    UWORD8 u1_frm = ps_dec->ps_cur_sps->u1_frame_mbs_only_flag;
1755
23.4k
    WORD32 j;
1756
23.4k
    UWORD8 *pu1_buf;
1757
1758
23.4k
    ps_pic_buf = ps_dec->ps_pic_buf_base;
1759
23.4k
    ih264_disp_mgr_init((disp_mgr_t *)ps_dec->pv_disp_buf_mgr);
1760
23.4k
    ih264_buf_mgr_init((buf_mgr_t *)ps_dec->pv_pic_buf_mgr);
1761
23.4k
    u4_luma_size = ps_dec->u2_frm_wd_y * ps_dec->u2_frm_ht_y;
1762
23.4k
    u4_chroma_size = ps_dec->u2_frm_wd_uv * ps_dec->u2_frm_ht_uv;
1763
1764
23.4k
    {
1765
23.4k
        if(ps_dec->u4_share_disp_buf == 1)
1766
0
        {
1767
            /* In case of buffers getting shared between application and library
1768
             there is no need of reference memtabs. Instead of setting the i4_size
1769
             to zero, it is reduced to a small i4_size to ensure that changes
1770
             in the code are minimal */
1771
0
            if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
1772
0
                            || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU)
1773
0
                            || (ps_dec->u1_chroma_format == IV_YUV_420P))
1774
0
            {
1775
0
                u4_luma_size = 64;
1776
0
            }
1777
1778
0
            if(ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
1779
0
            {
1780
0
                u4_chroma_size = 64;
1781
0
            }
1782
1783
0
        }
1784
23.4k
    }
1785
1786
23.4k
    pu1_buf = ps_dec->pu1_pic_buf_base;
1787
1788
    /* Allocate memory for refernce buffers */
1789
426k
    for(i = 0; i < u1_num_of_buf; i++)
1790
403k
    {
1791
403k
        UWORD32 u4_offset;
1792
403k
        WORD32 buf_ret;
1793
403k
        UWORD8 *pu1_luma, *pu1_chroma;
1794
403k
        void *pv_mem_ctxt = ps_dec->pv_mem_ctxt;
1795
1796
403k
        pu1_luma = pu1_buf;
1797
403k
        pu1_buf += ALIGN64(u4_luma_size);
1798
403k
        pu1_chroma = pu1_buf;
1799
403k
        pu1_buf += ALIGN64(u4_chroma_size);
1800
1801
        /* Offset to the start of the pic from the top left corner of the frame
1802
         buffer */
1803
1804
403k
        if((0 == ps_dec->u4_share_disp_buf)
1805
403k
                        || (NULL == ps_dec->disp_bufs[i].buf[0]))
1806
403k
        {
1807
403k
            UWORD32 pad_len_h, pad_len_v;
1808
1809
403k
            u4_offset = ps_dec->u2_frm_wd_y * (PAD_LEN_Y_V << 1) + PAD_LEN_Y_H;
1810
403k
            ps_pic_buf->pu1_buf1 = (UWORD8 *)(pu1_luma) + u4_offset;
1811
1812
403k
            pad_len_h = MAX(PAD_LEN_UV_H, (PAD_LEN_Y_H >> 1));
1813
403k
            pad_len_v = MAX(PAD_LEN_UV_V, PAD_LEN_Y_V);
1814
1815
403k
            u4_offset = ps_dec->u2_frm_wd_uv * pad_len_v + pad_len_h;
1816
1817
403k
            ps_pic_buf->pu1_buf2 = (UWORD8 *)(pu1_chroma) + u4_offset;
1818
403k
            ps_pic_buf->pu1_buf3 = (UWORD8 *)(NULL) + u4_offset;
1819
1820
403k
        }
1821
0
        else
1822
0
        {
1823
0
            UWORD32 pad_len_h, pad_len_v;
1824
0
            u4_offset = ps_dec->u2_frm_wd_y * (PAD_LEN_Y_V << 1) + PAD_LEN_Y_H;
1825
0
            ps_pic_buf->pu1_buf1 = (UWORD8 *)ps_dec->disp_bufs[i].buf[0]
1826
0
                            + u4_offset;
1827
1828
0
            ps_dec->disp_bufs[i].u4_ofst[0] = u4_offset;
1829
1830
0
            if(ps_dec->u1_chroma_format == IV_YUV_420P)
1831
0
            {
1832
0
                pad_len_h = MAX(PAD_LEN_UV_H * YUV420SP_FACTOR,
1833
0
                                (PAD_LEN_Y_H >> 1));
1834
0
                pad_len_v = MAX(PAD_LEN_UV_V, PAD_LEN_Y_V);
1835
1836
0
                u4_offset = ps_dec->u2_frm_wd_uv * pad_len_v + pad_len_h;
1837
0
                ps_pic_buf->pu1_buf2 = (UWORD8 *)(pu1_chroma) + u4_offset;
1838
0
                ps_pic_buf->pu1_buf3 = (UWORD8 *)(NULL) + u4_offset;
1839
1840
0
                ps_dec->disp_bufs[i].u4_ofst[1] = u4_offset;
1841
0
                ps_dec->disp_bufs[i].u4_ofst[2] = u4_offset;
1842
1843
0
            }
1844
0
            else
1845
0
            {
1846
0
                pad_len_h = MAX(PAD_LEN_UV_H * YUV420SP_FACTOR,
1847
0
                                (PAD_LEN_Y_H >> 1));
1848
0
                pad_len_v = MAX(PAD_LEN_UV_V, PAD_LEN_Y_V);
1849
1850
0
                u4_offset = ps_dec->u2_frm_wd_uv * pad_len_v + pad_len_h;
1851
0
                ps_pic_buf->pu1_buf2 = (UWORD8 *)(ps_dec->disp_bufs[i].buf[1])
1852
0
                                + u4_offset;
1853
0
                ps_pic_buf->pu1_buf3 = (UWORD8 *)(ps_dec->disp_bufs[i].buf[1])
1854
0
                                + u4_offset;
1855
1856
0
                ps_dec->disp_bufs[i].u4_ofst[1] = u4_offset;
1857
0
                ps_dec->disp_bufs[i].u4_ofst[2] = u4_offset;
1858
0
            }
1859
0
        }
1860
1861
403k
        ps_pic_buf->u2_frm_ht_y = ps_dec->u2_frm_ht_y;
1862
403k
        ps_pic_buf->u2_frm_ht_uv = ps_dec->u2_frm_ht_uv;
1863
403k
        ps_pic_buf->u2_frm_wd_y = ps_dec->u2_frm_wd_y;
1864
403k
        ps_pic_buf->u2_frm_wd_uv = ps_dec->u2_frm_wd_uv;
1865
1866
403k
        ps_pic_buf->u1_pic_buf_id = i;
1867
1868
403k
        buf_ret = ih264_buf_mgr_add((buf_mgr_t *)ps_dec->pv_pic_buf_mgr,
1869
403k
                                    ps_pic_buf, i);
1870
403k
        if(0 != buf_ret)
1871
0
        {
1872
0
            ps_dec->i4_error_code = ERROR_BUF_MGR;
1873
0
            return ERROR_BUF_MGR;
1874
0
        }
1875
1876
403k
        ps_dec->apv_buf_id_pic_buf_map[i] = (void *)ps_pic_buf;
1877
403k
        ps_pic_buf++;
1878
403k
    }
1879
1880
23.4k
    if(1 == ps_dec->u4_share_disp_buf)
1881
0
    {
1882
0
        for(i = 0; i < u1_num_of_buf; i++)
1883
0
            ps_dec->u4_disp_buf_mapping[i] = 1;
1884
0
    }
1885
23.4k
    return OK;
1886
23.4k
}
1887
1888
/*!
1889
 **************************************************************************
1890
 * \if Function name : ih264d_allocate_dynamic_bufs \endif
1891
 *
1892
 * \brief
1893
 *    This function allocates memory required by Decoder.
1894
 *
1895
 * \param ps_dec: Pointer to dec_struct_t.
1896
 *
1897
 * \return
1898
 *    Returns i4_status as returned by MemManager.
1899
 *
1900
 **************************************************************************
1901
 */
1902
WORD16 ih264d_allocate_dynamic_bufs(dec_struct_t * ps_dec)
1903
23.4k
{
1904
23.4k
    struct MemReq s_MemReq;
1905
23.4k
    struct MemBlock *p_MemBlock;
1906
1907
23.4k
    pred_info_t *ps_pred_frame;
1908
23.4k
    dec_mb_info_t *ps_frm_mb_info;
1909
23.4k
    dec_slice_struct_t *ps_dec_slice_buf;
1910
23.4k
    UWORD8 *pu1_dec_mb_map, *pu1_recon_mb_map;
1911
23.4k
    UWORD16 *pu2_slice_num_map;
1912
1913
23.4k
    WORD16 *pi16_res_coeff;
1914
23.4k
    WORD16 i16_status = 0;
1915
23.4k
    UWORD8 uc_frmOrFld = (1 - ps_dec->ps_cur_sps->u1_frame_mbs_only_flag);
1916
23.4k
    UWORD16 u4_luma_wd = ps_dec->u2_frm_wd_y;
1917
23.4k
    UWORD16 u4_chroma_wd = ps_dec->u2_frm_wd_uv;
1918
23.4k
    WORD8 c_i = 0;
1919
23.4k
    dec_seq_params_t *ps_sps = ps_dec->ps_cur_sps;
1920
23.4k
    UWORD32 u4_total_mbs = ps_sps->u2_total_num_of_mbs << uc_frmOrFld;
1921
23.4k
    UWORD32 u4_wd_mbs = ps_dec->u2_frm_wd_in_mbs;
1922
23.4k
    UWORD32 u4_ht_mbs = ps_dec->u2_frm_ht_in_mbs;
1923
23.4k
    UWORD32 u4_blk_wd;
1924
23.4k
    UWORD32 ui_size = 0;
1925
23.4k
    UWORD32 u4_int_scratch_size = 0, u4_ref_pred_size = 0;
1926
23.4k
    UWORD8 *pu1_buf;
1927
23.4k
    WORD32 num_entries;
1928
23.4k
    WORD32 size;
1929
23.4k
    void *pv_buf;
1930
23.4k
    UWORD32 u4_num_bufs;
1931
23.4k
    UWORD32 u4_luma_size, u4_chroma_size;
1932
23.4k
    void *pv_mem_ctxt = ps_dec->pv_mem_ctxt;
1933
1934
23.4k
    size = u4_total_mbs;
1935
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1936
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1937
23.4k
    memset(pv_buf, 0, size);
1938
23.4k
    ps_dec->pu1_dec_mb_map = pv_buf;
1939
1940
23.4k
    size = u4_total_mbs;
1941
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1942
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1943
23.4k
    memset(pv_buf, 0, size);
1944
23.4k
    ps_dec->pu1_recon_mb_map = pv_buf;
1945
1946
23.4k
    size = u4_total_mbs * sizeof(UWORD16);
1947
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1948
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1949
23.4k
    memset(pv_buf, 0, size);
1950
23.4k
    ps_dec->pu2_slice_num_map = pv_buf;
1951
1952
    /************************************************************/
1953
    /* Post allocation Initialisations                          */
1954
    /************************************************************/
1955
23.4k
    ps_dec->ps_parse_cur_slice = &(ps_dec->ps_dec_slice_buf[0]);
1956
23.4k
    ps_dec->ps_decode_cur_slice = &(ps_dec->ps_dec_slice_buf[0]);
1957
23.4k
    ps_dec->ps_computebs_cur_slice = &(ps_dec->ps_dec_slice_buf[0]);
1958
1959
23.4k
    ps_dec->ps_pred_start = ps_dec->ps_pred;
1960
1961
23.4k
    size = sizeof(parse_pmbarams_t) * (ps_dec->u1_recon_mb_grp);
1962
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1963
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1964
23.4k
    memset(pv_buf, 0, size);
1965
23.4k
    ps_dec->ps_parse_mb_data = pv_buf;
1966
1967
23.4k
    size = sizeof(parse_part_params_t)
1968
23.4k
                        * ((ps_dec->u1_recon_mb_grp) << 4);
1969
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1970
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1971
23.4k
    memset(pv_buf, 0, size);
1972
23.4k
    ps_dec->ps_parse_part_params = pv_buf;
1973
1974
23.4k
    size = ((u4_wd_mbs * sizeof(deblkmb_neighbour_t)) << uc_frmOrFld);
1975
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1976
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1977
23.4k
    memset(pv_buf, 0, size);
1978
23.4k
    ps_dec->ps_deblk_top_mb = pv_buf;
1979
1980
23.4k
    size = ((sizeof(ctxt_inc_mb_info_t))
1981
23.4k
                        * (((u4_wd_mbs + 1) << uc_frmOrFld) + 1));
1982
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1983
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1984
23.4k
    memset(pv_buf, 0, size);
1985
23.4k
    ps_dec->p_ctxt_inc_mb_map = pv_buf;
1986
1987
    /* 0th entry of CtxtIncMbMap will be always be containing default values
1988
     for CABAC context representing MB not available */
1989
23.4k
    ps_dec->p_ctxt_inc_mb_map += 1;
1990
1991
23.4k
    size = (sizeof(mv_pred_t) * ps_dec->u1_recon_mb_grp
1992
23.4k
                        * 16);
1993
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1994
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1995
23.4k
    memset(pv_buf, 0, size);
1996
23.4k
    ps_dec->ps_mv_p[0] = pv_buf;
1997
1998
23.4k
    size = (sizeof(mv_pred_t) * ps_dec->u1_recon_mb_grp
1999
23.4k
                        * 16);
2000
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2001
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2002
23.4k
    memset(pv_buf, 0, size);
2003
23.4k
    ps_dec->ps_mv_p[1] = pv_buf;
2004
2005
23.4k
    {
2006
23.4k
        UWORD8 i;
2007
117k
        for(i = 0; i < MV_SCRATCH_BUFS; i++)
2008
93.9k
        {
2009
93.9k
            size = (sizeof(mv_pred_t)
2010
93.9k
                            * ps_dec->u1_recon_mb_grp * 4);
2011
93.9k
            pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2012
93.9k
            RETURN_IF((NULL == pv_buf), IV_FAIL);
2013
93.9k
            memset(pv_buf, 0, size);
2014
93.9k
            ps_dec->ps_mv_top_p[i] = pv_buf;
2015
93.9k
        }
2016
23.4k
    }
2017
2018
23.4k
    size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
2019
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2020
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2021
23.4k
    ps_dec->pu1_y_intra_pred_line = pv_buf;
2022
23.4k
    memset(ps_dec->pu1_y_intra_pred_line, 0, size);
2023
23.4k
    ps_dec->pu1_y_intra_pred_line += MB_SIZE;
2024
2025
23.4k
    size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
2026
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2027
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2028
23.4k
    ps_dec->pu1_u_intra_pred_line = pv_buf;
2029
23.4k
    memset(ps_dec->pu1_u_intra_pred_line, 0, size);
2030
23.4k
    ps_dec->pu1_u_intra_pred_line += MB_SIZE;
2031
2032
23.4k
    size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
2033
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2034
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2035
23.4k
    ps_dec->pu1_v_intra_pred_line = pv_buf;
2036
23.4k
    memset(ps_dec->pu1_v_intra_pred_line, 0, size);
2037
23.4k
    ps_dec->pu1_v_intra_pred_line += MB_SIZE;
2038
2039
23.4k
    if(ps_dec->u1_separate_parse)
2040
7.23k
    {
2041
        /* Needs one extra row of info, to hold top row data */
2042
7.23k
        size = sizeof(mb_neigbour_params_t)
2043
7.23k
                        * 2 * ((u4_wd_mbs + 2) * (u4_ht_mbs + 1));
2044
7.23k
    }
2045
16.2k
    else
2046
16.2k
    {
2047
16.2k
        size = sizeof(mb_neigbour_params_t)
2048
16.2k
                        * 2 * ((u4_wd_mbs + 2) << uc_frmOrFld);
2049
16.2k
    }
2050
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2051
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2052
2053
23.4k
    ps_dec->ps_nbr_mb_row = pv_buf;
2054
23.4k
    memset(ps_dec->ps_nbr_mb_row, 0, size);
2055
2056
    /* Allocate deblock MB info */
2057
23.4k
    size = (u4_total_mbs + u4_wd_mbs) * sizeof(deblk_mb_t);
2058
2059
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2060
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2061
23.4k
    ps_dec->ps_deblk_pic = pv_buf;
2062
2063
23.4k
    memset(ps_dec->ps_deblk_pic, 0, size);
2064
2065
    /* Allocate frame level mb info */
2066
23.4k
    size = sizeof(dec_mb_info_t) * u4_total_mbs;
2067
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2068
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2069
23.4k
    ps_dec->ps_frm_mb_info = pv_buf;
2070
23.4k
    memset(ps_dec->ps_frm_mb_info, 0, size);
2071
2072
    /* Allocate memory for slice headers dec_slice_struct_t */
2073
23.4k
    num_entries = MAX_FRAMES;
2074
23.4k
    if((1 >= ps_dec->ps_cur_sps->u1_num_ref_frames) &&
2075
23.4k
        (0 == ps_dec->i4_display_delay))
2076
0
    {
2077
0
        num_entries = 1;
2078
0
    }
2079
23.4k
    num_entries = ((2 * num_entries) + 1);
2080
23.4k
    num_entries *= 2;
2081
2082
23.4k
    size = num_entries * sizeof(void *);
2083
23.4k
    size += PAD_MAP_IDX_POC * sizeof(void *);
2084
23.4k
    size *= u4_total_mbs;
2085
23.4k
    size += sizeof(dec_slice_struct_t) * u4_total_mbs;
2086
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2087
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2088
2089
23.4k
    ps_dec->ps_dec_slice_buf = pv_buf;
2090
23.4k
    memset(ps_dec->ps_dec_slice_buf, 0, size);
2091
23.4k
    pu1_buf = (UWORD8 *)ps_dec->ps_dec_slice_buf;
2092
23.4k
    pu1_buf += sizeof(dec_slice_struct_t) * u4_total_mbs;
2093
23.4k
    ps_dec->pv_map_ref_idx_to_poc_buf = (void *)pu1_buf;
2094
2095
    /* Allocate memory for packed pred info */
2096
23.4k
    num_entries = u4_total_mbs;
2097
23.4k
    num_entries *= 16 * 2;
2098
2099
23.4k
    size = sizeof(pred_info_pkd_t) * num_entries;
2100
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2101
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2102
23.4k
    memset(pv_buf, 0, size);
2103
23.4k
    ps_dec->ps_pred_pkd = pv_buf;
2104
2105
    /* Allocate memory for coeff data */
2106
23.4k
    size = MB_LUM_SIZE * sizeof(WORD16);
2107
    /*For I16x16 MBs, 16 4x4 AC coeffs and 1 4x4 DC coeff TU blocks will be sent
2108
    For all MBs along with 8 4x4 AC coeffs 2 2x2 DC coeff TU blocks will be sent
2109
    So use 17 4x4 TU blocks for luma and 9 4x4 TU blocks for chroma */
2110
23.4k
    size += u4_total_mbs * (MAX(17 * sizeof(tu_sblk4x4_coeff_data_t),4 * sizeof(tu_blk8x8_coeff_data_t))
2111
23.4k
                                            + 9 * sizeof(tu_sblk4x4_coeff_data_t));
2112
    //32 bytes for each mb to store u1_prev_intra4x4_pred_mode and u1_rem_intra4x4_pred_mode data
2113
23.4k
    size += u4_total_mbs * 32;
2114
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2115
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2116
23.4k
    memset(pv_buf, 0, size);
2117
2118
23.4k
    ps_dec->pi2_coeff_data = pv_buf;
2119
2120
23.4k
    ps_dec->pv_pic_tu_coeff_data = (void *)(ps_dec->pi2_coeff_data + MB_LUM_SIZE);
2121
2122
    /* Allocate MV bank buffer */
2123
23.4k
    {
2124
23.4k
        UWORD32 col_flag_buffer_size, mvpred_buffer_size;
2125
2126
23.4k
        col_flag_buffer_size = ((ps_dec->u2_pic_wd * ps_dec->u2_pic_ht) >> 4);
2127
23.4k
        mvpred_buffer_size = sizeof(mv_pred_t)
2128
23.4k
                        * ((ps_dec->u2_pic_wd * (ps_dec->u2_pic_ht + PAD_MV_BANK_ROW)) >> 4);
2129
2130
23.4k
        u4_num_bufs = ps_dec->ps_cur_sps->u1_num_ref_frames + 1;
2131
2132
23.4k
        u4_num_bufs = MIN(u4_num_bufs, ps_dec->u1_pic_bufs);
2133
23.4k
        u4_num_bufs = MAX(u4_num_bufs, 2);
2134
23.4k
        size = ALIGN64(mvpred_buffer_size) + ALIGN64(col_flag_buffer_size);
2135
23.4k
        size *= u4_num_bufs;
2136
23.4k
        pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2137
23.4k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2138
23.4k
        memset(pv_buf, 0, size);
2139
23.4k
        ps_dec->pu1_mv_bank_buf_base = pv_buf;
2140
23.4k
    }
2141
2142
    /* Allocate Pic buffer */
2143
0
    u4_luma_size = ps_dec->u2_frm_wd_y * ps_dec->u2_frm_ht_y;
2144
23.4k
    u4_chroma_size = ps_dec->u2_frm_wd_uv * ps_dec->u2_frm_ht_uv;
2145
2146
23.4k
    {
2147
23.4k
        if(ps_dec->u4_share_disp_buf == 1)
2148
0
        {
2149
            /* In case of buffers getting shared between application and library
2150
             there is no need of reference memtabs. Instead of setting the i4_size
2151
             to zero, it is reduced to a small i4_size to ensure that changes
2152
             in the code are minimal */
2153
0
            if((ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
2154
0
                            || (ps_dec->u1_chroma_format == IV_YUV_420SP_VU)
2155
0
                            || (ps_dec->u1_chroma_format == IV_YUV_420P))
2156
0
            {
2157
0
                u4_luma_size = 64;
2158
0
            }
2159
2160
0
            if(ps_dec->u1_chroma_format == IV_YUV_420SP_UV)
2161
0
            {
2162
0
                u4_chroma_size = 64;
2163
0
            }
2164
2165
0
        }
2166
23.4k
    }
2167
2168
23.4k
    size = ALIGN64(u4_luma_size) + ALIGN64(u4_chroma_size);
2169
23.4k
    size *= ps_dec->u1_pic_bufs;
2170
23.4k
    pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2171
23.4k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2172
23.4k
    memset(pv_buf, 0, size);
2173
23.4k
    ps_dec->pu1_pic_buf_base = pv_buf;
2174
2175
    /* Allocate memory for mb_info maps */
2176
23.4k
    if(ps_dec->u1_enable_mb_info)
2177
0
    {
2178
0
        size = (u4_total_mbs << 2) * MAX_DISP_BUFS_NEW;
2179
2180
0
        pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2181
0
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2182
0
        memset(pv_buf, 0, size);
2183
0
        ps_dec->pu1_qp_map_base = pv_buf;
2184
2185
0
        pv_buf = ps_dec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2186
0
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2187
0
        memset(pv_buf, 0, size);
2188
0
        ps_dec->pu1_mb_type_map_base = pv_buf;
2189
0
    }
2190
2191
    /* Post allocation Increment Actions */
2192
2193
    /***************************************************************************/
2194
    /*Initialize cabac context pointers for every SE that has fixed contextIdx */
2195
    /***************************************************************************/
2196
23.4k
    {
2197
23.4k
        bin_ctxt_model_t * const p_cabac_ctxt_table_t =
2198
23.4k
                        ps_dec->p_cabac_ctxt_table_t;
2199
23.4k
        bin_ctxt_model_t * * p_coeff_abs_level_minus1_t =
2200
23.4k
                        ps_dec->p_coeff_abs_level_minus1_t;
2201
23.4k
        bin_ctxt_model_t * * p_cbf_t = ps_dec->p_cbf_t;
2202
2203
23.4k
        ps_dec->p_mb_field_dec_flag_t = p_cabac_ctxt_table_t
2204
23.4k
                        + MB_FIELD_DECODING_FLAG;
2205
23.4k
        ps_dec->p_prev_intra4x4_pred_mode_flag_t = p_cabac_ctxt_table_t
2206
23.4k
                        + PREV_INTRA4X4_PRED_MODE_FLAG;
2207
23.4k
        ps_dec->p_rem_intra4x4_pred_mode_t = p_cabac_ctxt_table_t
2208
23.4k
                        + REM_INTRA4X4_PRED_MODE;
2209
23.4k
        ps_dec->p_intra_chroma_pred_mode_t = p_cabac_ctxt_table_t
2210
23.4k
                        + INTRA_CHROMA_PRED_MODE;
2211
23.4k
        ps_dec->p_mb_qp_delta_t = p_cabac_ctxt_table_t + MB_QP_DELTA;
2212
23.4k
        ps_dec->p_ref_idx_t = p_cabac_ctxt_table_t + REF_IDX;
2213
23.4k
        ps_dec->p_mvd_x_t = p_cabac_ctxt_table_t + MVD_X;
2214
23.4k
        ps_dec->p_mvd_y_t = p_cabac_ctxt_table_t + MVD_Y;
2215
23.4k
        p_cbf_t[0] = p_cabac_ctxt_table_t + CBF + 0;
2216
23.4k
        p_cbf_t[1] = p_cabac_ctxt_table_t + CBF + 4;
2217
23.4k
        p_cbf_t[2] = p_cabac_ctxt_table_t + CBF + 8;
2218
23.4k
        p_cbf_t[3] = p_cabac_ctxt_table_t + CBF + 12;
2219
23.4k
        p_cbf_t[4] = p_cabac_ctxt_table_t + CBF + 16;
2220
23.4k
        ps_dec->p_cbp_luma_t = p_cabac_ctxt_table_t + CBP_LUMA;
2221
23.4k
        ps_dec->p_cbp_chroma_t = p_cabac_ctxt_table_t + CBP_CHROMA;
2222
2223
23.4k
        p_coeff_abs_level_minus1_t[LUMA_DC_CTXCAT] = p_cabac_ctxt_table_t
2224
23.4k
                        + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_0_OFFSET;
2225
2226
23.4k
        p_coeff_abs_level_minus1_t[LUMA_AC_CTXCAT] = p_cabac_ctxt_table_t
2227
23.4k
                        + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_1_OFFSET;
2228
2229
23.4k
        p_coeff_abs_level_minus1_t[LUMA_4X4_CTXCAT] = p_cabac_ctxt_table_t
2230
23.4k
                        + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_2_OFFSET;
2231
2232
23.4k
        p_coeff_abs_level_minus1_t[CHROMA_DC_CTXCAT] = p_cabac_ctxt_table_t
2233
23.4k
                        + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_3_OFFSET;
2234
2235
23.4k
        p_coeff_abs_level_minus1_t[CHROMA_AC_CTXCAT] = p_cabac_ctxt_table_t
2236
23.4k
                        + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_4_OFFSET;
2237
2238
23.4k
        p_coeff_abs_level_minus1_t[LUMA_8X8_CTXCAT] = p_cabac_ctxt_table_t
2239
23.4k
                        + COEFF_ABS_LEVEL_MINUS1_8X8
2240
23.4k
                        + COEFF_ABS_LEVEL_CAT_5_OFFSET;
2241
2242
        /********************************************************/
2243
        /* context for the high profile related syntax elements */
2244
        /* This is maintained seperately in s_high_profile     */
2245
        /********************************************************/
2246
23.4k
        {
2247
2248
23.4k
            ps_dec->s_high_profile.ps_transform8x8_flag = p_cabac_ctxt_table_t
2249
23.4k
                            + TRANSFORM_SIZE_8X8_FLAG;
2250
2251
23.4k
            ps_dec->s_high_profile.ps_sigcoeff_8x8_frame = p_cabac_ctxt_table_t
2252
23.4k
                            + SIGNIFICANT_COEFF_FLAG_8X8_FRAME;
2253
2254
23.4k
            ps_dec->s_high_profile.ps_last_sigcoeff_8x8_frame =
2255
23.4k
                            p_cabac_ctxt_table_t
2256
23.4k
                                            + LAST_SIGNIFICANT_COEFF_FLAG_8X8_FRAME;
2257
2258
23.4k
            ps_dec->s_high_profile.ps_coeff_abs_levelminus1 =
2259
23.4k
                            p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1_8X8;
2260
2261
23.4k
            ps_dec->s_high_profile.ps_sigcoeff_8x8_field = p_cabac_ctxt_table_t
2262
23.4k
                            + SIGNIFICANT_COEFF_FLAG_8X8_FIELD;
2263
2264
23.4k
            ps_dec->s_high_profile.ps_last_sigcoeff_8x8_field =
2265
23.4k
                            p_cabac_ctxt_table_t
2266
23.4k
                                            + LAST_SIGNIFICANT_COEFF_FLAG_8X8_FIELD;
2267
23.4k
        }
2268
23.4k
    }
2269
23.4k
    return (i16_status);
2270
23.4k
}
2271
2272
/*!
2273
 **************************************************************************
2274
 * \if Function name : ih264d_free_dynamic_bufs \endif
2275
 *
2276
 * \brief
2277
 *    This function frees dynamic memory allocated by Decoder.
2278
 *
2279
 * \param ps_dec: Pointer to dec_struct_t.
2280
 *
2281
 * \return
2282
 *    Returns i4_status as returned by MemManager.
2283
 *
2284
 **************************************************************************
2285
 */
2286
WORD16 ih264d_free_dynamic_bufs(dec_struct_t * ps_dec)
2287
147k
{
2288
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_bits_buf_dynamic);
2289
2290
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_deblk_pic);
2291
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_dec_mb_map);
2292
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_recon_mb_map);
2293
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu2_slice_num_map);
2294
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_dec_slice_buf);
2295
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_frm_mb_info);
2296
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pi2_coeff_data);
2297
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_parse_mb_data);
2298
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_parse_part_params);
2299
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_deblk_top_mb);
2300
2301
147k
    if(ps_dec->p_ctxt_inc_mb_map)
2302
23.4k
    {
2303
23.4k
        ps_dec->p_ctxt_inc_mb_map -= 1;
2304
23.4k
        PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->p_ctxt_inc_mb_map);
2305
23.4k
    }
2306
2307
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_mv_p[0]);
2308
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_mv_p[1]);
2309
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_pred_pkd);
2310
147k
    {
2311
147k
        UWORD8 i;
2312
739k
        for(i = 0; i < MV_SCRATCH_BUFS; i++)
2313
591k
        {
2314
591k
            PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_mv_top_p[i]);
2315
591k
        }
2316
147k
    }
2317
2318
147k
    if(ps_dec->pu1_y_intra_pred_line)
2319
23.4k
    {
2320
23.4k
        ps_dec->pu1_y_intra_pred_line -= MB_SIZE;
2321
23.4k
    }
2322
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_y_intra_pred_line);
2323
2324
147k
    if(ps_dec->pu1_u_intra_pred_line)
2325
23.4k
    {
2326
23.4k
        ps_dec->pu1_u_intra_pred_line -= MB_SIZE;
2327
23.4k
    }
2328
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_u_intra_pred_line);
2329
2330
147k
    if(ps_dec->pu1_v_intra_pred_line)
2331
23.4k
    {
2332
23.4k
        ps_dec->pu1_v_intra_pred_line -= MB_SIZE;
2333
23.4k
    }
2334
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_v_intra_pred_line);
2335
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->ps_nbr_mb_row);
2336
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_mv_bank_buf_base);
2337
147k
    PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_pic_buf_base);
2338
2339
    /* Free memory for mb_info maps */
2340
147k
    if(ps_dec->u1_enable_mb_info)
2341
0
    {
2342
0
        PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_qp_map_base);
2343
0
        PS_DEC_ALIGNED_FREE(ps_dec, ps_dec->pu1_mb_type_map_base);
2344
0
    }
2345
147k
    return 0;
2346
147k
}
2347
2348
/*!
2349
 **************************************************************************
2350
 * \if Function name : ih264d_create_mv_bank \endif
2351
 *
2352
 * \brief
2353
 *    This function creates MV bank.
2354
 *
2355
 * \param memType  : Type of memory being handled
2356
 *                   0: Display Buffer
2357
 *                   1: Decoder Buffer
2358
 *                   2: Internal Buffer
2359
 * \param u1_num_of_buf: Number of decode or display buffers.
2360
 * \param u4_wd : Frame width.
2361
 * \param u4_ht : Frame Height.
2362
 * \param ps_pic_buf_api : Pointer to Picture Buffer API.
2363
 * \param ih264d_dec_mem_manager  : Memory manager utility supplied by system.
2364
 *
2365
 * \return
2366
 *    0 on Success and -1 on error
2367
 *
2368
 **************************************************************************
2369
 */
2370
WORD32 ih264d_create_mv_bank(void *pv_dec,
2371
                             UWORD32 ui_width,
2372
                             UWORD32 ui_height)
2373
23.4k
{
2374
23.4k
    UWORD8  i;
2375
23.4k
    UWORD32 col_flag_buffer_size, mvpred_buffer_size;
2376
23.4k
    UWORD8 *pu1_mv_buf_mgr_base, *pu1_mv_bank_base;
2377
23.4k
    col_mv_buf_t *ps_col_mv;
2378
23.4k
    mv_pred_t *ps_mv;
2379
23.4k
    UWORD8 *pu1_col_zero_flag_buf;
2380
23.4k
    dec_struct_t *ps_dec = (dec_struct_t *)pv_dec;
2381
23.4k
    WORD32 buf_ret;
2382
23.4k
    UWORD32 u4_num_bufs;
2383
23.4k
    UWORD8 *pu1_buf;
2384
23.4k
    WORD32 size;
2385
23.4k
    void *pv_mem_ctxt = ps_dec->pv_mem_ctxt;
2386
2387
23.4k
    col_flag_buffer_size = ((ui_width * ui_height) >> 4);
2388
23.4k
    mvpred_buffer_size = sizeof(mv_pred_t)
2389
23.4k
                    * ((ui_width * (ui_height + PAD_MV_BANK_ROW)) >> 4);
2390
2391
23.4k
    ih264_buf_mgr_init((buf_mgr_t *)ps_dec->pv_mv_buf_mgr);
2392
2393
23.4k
    ps_col_mv = ps_dec->ps_col_mv_base;
2394
2395
23.4k
    u4_num_bufs = ps_dec->ps_cur_sps->u1_num_ref_frames + 1;
2396
2397
23.4k
    u4_num_bufs = MIN(u4_num_bufs, ps_dec->u1_pic_bufs);
2398
23.4k
    u4_num_bufs = MAX(u4_num_bufs, 2);
2399
23.4k
    pu1_buf = ps_dec->pu1_mv_bank_buf_base;
2400
93.7k
    for(i = 0 ; i < u4_num_bufs ; i++)
2401
70.2k
    {
2402
70.2k
        pu1_col_zero_flag_buf = pu1_buf;
2403
70.2k
        pu1_buf += ALIGN64(col_flag_buffer_size);
2404
2405
70.2k
        ps_mv = (mv_pred_t *)pu1_buf;
2406
70.2k
        pu1_buf += ALIGN64(mvpred_buffer_size);
2407
2408
70.2k
        memset(ps_mv, 0, ((ui_width * OFFSET_MV_BANK_ROW) >> 4) * sizeof(mv_pred_t));
2409
70.2k
        ps_mv += (ui_width*OFFSET_MV_BANK_ROW) >> 4;
2410
2411
70.2k
        ps_col_mv->pv_col_zero_flag = (void *)pu1_col_zero_flag_buf;
2412
70.2k
        ps_col_mv->pv_mv = (void *)ps_mv;
2413
70.2k
        buf_ret = ih264_buf_mgr_add((buf_mgr_t *)ps_dec->pv_mv_buf_mgr, ps_col_mv, i);
2414
70.2k
        if(0 != buf_ret)
2415
0
        {
2416
0
            ps_dec->i4_error_code = ERROR_BUF_MGR;
2417
0
            return ERROR_BUF_MGR;
2418
0
        }
2419
70.2k
        ps_col_mv++;
2420
70.2k
    }
2421
23.4k
    return OK;
2422
23.4k
}
2423
2424
void ih264d_unpack_coeff4x4_dc_4x4blk(tu_sblk4x4_coeff_data_t *ps_tu_4x4,
2425
                                      WORD16 *pi2_out_coeff_data,
2426
                                      UWORD8 *pu1_inv_scan)
2427
300k
{
2428
300k
    UWORD16 u2_sig_coeff_map = ps_tu_4x4->u2_sig_coeff_map;
2429
300k
    WORD32 idx;
2430
300k
    WORD16 *pi2_coeff_data = &ps_tu_4x4->ai2_level[0];
2431
2432
752k
    while(u2_sig_coeff_map)
2433
451k
    {
2434
451k
        idx = CLZ(u2_sig_coeff_map);
2435
2436
451k
        idx = 31 - idx;
2437
451k
        RESET_BIT(u2_sig_coeff_map,idx);
2438
2439
451k
        idx = pu1_inv_scan[idx];
2440
451k
        pi2_out_coeff_data[idx] = *pi2_coeff_data++;
2441
2442
451k
    }
2443
300k
}