Coverage Report

Created: 2025-07-11 06:39

/src/libavc/decoder/svc/isvcd_thread_parse_decode.c
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1
/******************************************************************************
2
 *
3
 * Copyright (C) 2022 The Android Open Source Project
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 *
5
 * Licensed under the Apache License, Version 2.0 (the "License");
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 * you may not use this file except in compliance with the License.
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 * You may obtain a copy of the License at:
8
 *
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 * http://www.apache.org/licenses/LICENSE-2.0
10
 *
11
 * Unless required by applicable law or agreed to in writing, software
12
 * distributed under the License is distributed on an "AS IS" BASIS,
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 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
 * See the License for the specific language governing permissions and
15
 * limitations under the License.
16
 *
17
 *****************************************************************************
18
 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19
 */
20
/**
21
 *******************************************************************************
22
 * @file
23
 *  isvcd_thread_parse_decode.c
24
 *
25
 * @brief
26
 *  Contains routines that for multi-thread decoder
27
 *
28
 * @author
29
 *  Kishore
30
 *
31
 * @remarks
32
 *  None
33
 *
34
 *******************************************************************************
35
 */
36
37
#include <string.h>
38
#include "ih264d_error_handler.h"
39
#include "ih264d_debug.h"
40
#include "ithread.h"
41
#include "ih264d_defs.h"
42
#include "ih264d_debug.h"
43
#include "ih264d_tables.h"
44
#include "isvcd_structs.h"
45
#include "ih264d_defs.h"
46
#include "ih264d_mb_utils.h"
47
#include "ih264d_thread_parse_decode.h"
48
#include "ih264d_inter_pred.h"
49
#include "ih264d_process_pslice.h"
50
#include "isvcd_process_epslice.h"
51
#include "ih264d_process_intra_mb.h"
52
#include "ih264d_deblocking.h"
53
#include "ih264d_format_conv.h"
54
#include "isvcd_thread_parse_decode.h"
55
56
/*****************************************************************************/
57
/*                                                                           */
58
/*  Function Name : isvcd_decode_recon_tfr_nmb_thread                        */
59
/*                                                                           */
60
/*  Description   :                                                          */
61
/*                :                                                          */
62
/*                :                                                          */
63
/*  Inputs        :                                                          */
64
/*  Processing    :Only for Target Layer processing                          */
65
/*                                                                           */
66
/*  Outputs       :                                                          */
67
/*  Returns       : None                                                     */
68
/*                                                                           */
69
/*  Revision History:                                                        */
70
/*                                                                           */
71
/*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
72
/*                      ITTIAM                                               */
73
/*****************************************************************************/
74
WORD32 isvcd_decode_recon_tfr_nmb_thread(svc_dec_lyr_struct_t *ps_svc_lyr_dec, UWORD8 u1_num_mbs,
75
                                         UWORD8 u1_num_mbs_next, UWORD8 u1_end_of_row)
76
165k
{
77
165k
    WORD32 i, j;
78
165k
    dec_mb_info_t *ps_cur_mb_info;
79
165k
    dec_svc_mb_info_t *ps_svc_cur_mb_info;
80
165k
    dec_struct_t *ps_dec = &ps_svc_lyr_dec->s_dec;
81
165k
    const UWORD32 u1_mbaff = ps_dec->ps_cur_slice->u1_mbaff_frame_flag;
82
165k
    UWORD32 u1_slice_type, u1_B;
83
165k
    WORD32 u1_skip_th;
84
165k
    UWORD32 u1_ipcm_th;
85
165k
    UWORD32 u4_cond;
86
165k
    UWORD16 u2_slice_num, u2_cur_dec_mb_num;
87
165k
    UWORD32 u4_mb_num;
88
165k
    WORD32 nop_cnt = 8 * 128;
89
165k
    UWORD16 *pu2_res_luma_csbp;
90
165k
    WORD32 ret;
91
165k
    u1_slice_type = ps_dec->ps_decode_cur_slice->slice_type;
92
93
165k
    u1_B = (u1_slice_type == B_SLICE);
94
165k
    u1_skip_th = ((u1_slice_type != I_SLICE) ? (u1_B ? B_8x8 : PRED_8x8R0) : -1);
95
165k
    u1_ipcm_th = ((u1_slice_type != I_SLICE) ? (u1_B ? 23 : 5) : 0);
96
165k
    u2_cur_dec_mb_num = ps_dec->cur_dec_mb_num;
97
98
235k
    while(1)
99
235k
    {
100
235k
        UWORD32 u4_max_mb =
101
235k
            (UWORD32) (ps_dec->i2_dec_thread_mb_y + (1 << u1_mbaff)) * ps_dec->u2_frm_wd_in_mbs - 1;
102
235k
        u4_mb_num = u2_cur_dec_mb_num;
103
        /*introducing 1 MB delay*/
104
235k
        u4_mb_num = MIN(u4_mb_num + u1_num_mbs + 1, u4_max_mb);
105
106
235k
        CHECK_MB_MAP_BYTE(u4_mb_num, ps_dec->pu1_dec_mb_map, u4_cond);
107
235k
        if(u4_cond)
108
164k
        {
109
164k
            break;
110
164k
        }
111
71.2k
        else
112
71.2k
        {
113
71.2k
            if(nop_cnt > 0)
114
60.8k
            {
115
60.8k
                nop_cnt -= 128;
116
60.8k
                NOP(128);
117
60.8k
            }
118
10.4k
            else
119
10.4k
            {
120
10.4k
                if(ps_dec->u4_output_present && (2 == ps_dec->u4_num_cores) &&
121
10.4k
                   (ps_dec->u4_fmt_conv_cur_row < ps_dec->s_disp_frame_info.u4_y_ht))
122
4.75k
                {
123
4.75k
                    ps_dec->u4_fmt_conv_num_rows =
124
4.75k
                        MIN(FMT_CONV_NUM_ROWS,
125
4.75k
                            (ps_dec->s_disp_frame_info.u4_y_ht - ps_dec->u4_fmt_conv_cur_row));
126
4.75k
                    ih264d_format_convert(ps_dec, &(ps_dec->s_disp_op), ps_dec->u4_fmt_conv_cur_row,
127
4.75k
                                          ps_dec->u4_fmt_conv_num_rows);
128
4.75k
                    ps_dec->u4_fmt_conv_cur_row += ps_dec->u4_fmt_conv_num_rows;
129
4.75k
                }
130
5.65k
                else
131
5.65k
                {
132
5.65k
                    nop_cnt = 8 * 128;
133
5.65k
                    ithread_yield();
134
5.65k
                }
135
10.4k
                if(1 == ps_svc_lyr_dec->u1_error_in_cur_frame)
136
1.06k
                {
137
1.06k
                    return NOT_OK;
138
1.06k
                }
139
10.4k
            }
140
71.2k
        }
141
235k
    }
142
143
    /* N Mb MC Loop */
144
700k
    for(i = 0; i < u1_num_mbs; i++)
145
542k
    {
146
542k
        u4_mb_num = u2_cur_dec_mb_num;
147
542k
        GET_SLICE_NUM_MAP(ps_dec->pu2_slice_num_map, u2_cur_dec_mb_num, u2_slice_num);
148
149
542k
        if(u2_slice_num != ps_dec->u2_cur_slice_num_dec_thread)
150
6.17k
        {
151
6.17k
            ps_dec->u4_cur_slice_decode_done = 1;
152
6.17k
            break;
153
6.17k
        }
154
155
536k
        ps_cur_mb_info = &ps_dec->ps_frm_mb_info[u2_cur_dec_mb_num];
156
157
536k
        ps_dec->u4_dma_buf_idx = 0;
158
536k
        ps_dec->u4_pred_info_idx = 0;
159
160
        /*Pointer assignment for Residual NNZ */
161
536k
        pu2_res_luma_csbp = ps_svc_lyr_dec->pu2_frm_res_luma_csbp + ps_cur_mb_info->u2_mbx;
162
536k
        pu2_res_luma_csbp += ps_cur_mb_info->u2_mby * ps_svc_lyr_dec->i4_frm_res_luma_csbp_stride;
163
164
536k
        if(ps_cur_mb_info->u1_mb_type <= u1_skip_th)
165
125k
        {
166
125k
            WORD32 pred_cnt = 0;
167
125k
            pred_info_pkd_t *ps_pred_pkd;
168
125k
            UWORD32 u4_pred_info_pkd_idx;
169
170
125k
            u4_pred_info_pkd_idx = ps_cur_mb_info->u4_pred_info_pkd_idx;
171
172
373k
            while(pred_cnt < ps_cur_mb_info->u1_num_pred_parts)
173
247k
            {
174
247k
                ps_pred_pkd = ps_dec->ps_pred_pkd + u4_pred_info_pkd_idx;
175
176
247k
                ps_dec->p_form_mb_part_info_thread(ps_pred_pkd, ps_dec, ps_cur_mb_info->u2_mbx,
177
247k
                                                   ps_cur_mb_info->u2_mby, (i >> u1_mbaff),
178
247k
                                                   ps_cur_mb_info);
179
180
247k
                u4_pred_info_pkd_idx++;
181
247k
                pred_cnt++;
182
247k
            }
183
125k
            ps_dec->p_mc_dec_thread(ps_dec, ps_cur_mb_info);
184
125k
        }
185
410k
        else if(ps_cur_mb_info->u1_mb_type == MB_SKIP)
186
327k
        {
187
327k
            WORD32 pred_cnt = 0;
188
327k
            pred_info_pkd_t *ps_pred_pkd;
189
327k
            UWORD32 u4_pred_info_pkd_idx;
190
191
327k
            u4_pred_info_pkd_idx = ps_cur_mb_info->u4_pred_info_pkd_idx;
192
193
675k
            while(pred_cnt < ps_cur_mb_info->u1_num_pred_parts)
194
347k
            {
195
347k
                ps_pred_pkd = ps_dec->ps_pred_pkd + u4_pred_info_pkd_idx;
196
197
347k
                ps_dec->p_form_mb_part_info_thread(ps_pred_pkd, ps_dec, ps_cur_mb_info->u2_mbx,
198
347k
                                                   ps_cur_mb_info->u2_mby, (i >> u1_mbaff),
199
347k
                                                   ps_cur_mb_info);
200
201
347k
                u4_pred_info_pkd_idx++;
202
347k
                pred_cnt++;
203
347k
            }
204
            /* Decode MB skip */
205
327k
            ps_dec->p_mc_dec_thread(ps_dec, ps_cur_mb_info);
206
207
327k
            *pu2_res_luma_csbp = 0;
208
327k
            ps_svc_lyr_dec->ps_inter_lyr_mb_prms_cur_mb =
209
327k
                ps_svc_lyr_dec->ps_inter_lyr_mb_prms_frm_start + ps_cur_mb_info->u2_mbx +
210
327k
                (ps_svc_lyr_dec->u2_inter_lyr_mb_prms_stride * (ps_cur_mb_info->u2_mby));
211
327k
            ps_svc_lyr_dec->ps_inter_lyr_mb_prms_cur_mb->i1_mb_mode = SVC_INTER_MB;
212
327k
            ps_svc_lyr_dec->ps_inter_lyr_mb_prms_cur_mb->i1_tx_size =
213
327k
                ps_cur_mb_info->u1_tran_form8x8;
214
327k
            ps_svc_lyr_dec->ps_inter_lyr_mb_prms_cur_mb->u2_luma_nnz = 0;
215
327k
            ps_svc_lyr_dec->ps_inter_lyr_mb_prms_cur_mb->u1_chroma_nnz = 0;
216
327k
        }
217
218
536k
        u2_cur_dec_mb_num++;
219
536k
    }
220
221
    /* N Mb IQ IT RECON  Loop */
222
700k
    for(j = 0; j < i; j++)
223
536k
    {
224
536k
        ps_cur_mb_info = &ps_dec->ps_frm_mb_info[ps_dec->cur_dec_mb_num];
225
536k
        ps_svc_cur_mb_info = &ps_svc_lyr_dec->ps_svc_frm_mb_info[ps_dec->cur_dec_mb_num];
226
227
536k
        if(NULL == ps_cur_mb_info->ps_curmb)
228
0
        {
229
0
            return NOT_OK;
230
0
        }
231
232
        /*Pointer assignment for Residual NNZ */
233
536k
        pu2_res_luma_csbp = ps_svc_lyr_dec->pu2_frm_res_luma_csbp + ps_cur_mb_info->u2_mbx;
234
536k
        pu2_res_luma_csbp += ps_cur_mb_info->u2_mby * ps_svc_lyr_dec->i4_frm_res_luma_csbp_stride;
235
236
536k
        ps_svc_lyr_dec->ps_inter_lyr_mb_prms_cur_mb =
237
536k
            ps_svc_lyr_dec->ps_inter_lyr_mb_prms_frm_start + ps_cur_mb_info->u2_mbx +
238
536k
            (ps_svc_lyr_dec->u2_inter_lyr_mb_prms_stride * (ps_cur_mb_info->u2_mby));
239
240
536k
        ps_svc_lyr_dec->ps_inter_lyr_mb_prms_cur_mb->i1_slice_id = (WORD8) ps_dec->u2_cur_slice_num;
241
242
536k
        if((ps_dec->u4_num_cores == 2) || !ps_dec->i1_recon_in_thread3_flag)
243
536k
        {
244
536k
            if(ps_cur_mb_info->u1_mb_type <= u1_skip_th)
245
125k
            {
246
125k
                {
247
                    /* inter intra pred generation */
248
125k
                    if(SVCD_FALSE == ps_svc_lyr_dec->u1_dyadic_flag)
249
92.1k
                    {
250
92.1k
                        ret = isvcd_process_ii_mb(ps_svc_lyr_dec, ps_cur_mb_info,
251
92.1k
                                                  ps_svc_cur_mb_info, j);
252
92.1k
                        if(ret != OK) return ret;
253
92.1k
                    }
254
125k
                    if(0 == ps_svc_cur_mb_info->u1_residual_prediction_flag)
255
21.8k
                    {
256
                        /* IT + Recon */
257
21.8k
                        ih264d_process_inter_mb(ps_dec, ps_cur_mb_info, j);
258
21.8k
                        isvcd_update_inter_mb_inter_layer_info(ps_svc_lyr_dec, ps_cur_mb_info, 0);
259
21.8k
                        *pu2_res_luma_csbp = ps_cur_mb_info->u2_luma_csbp;
260
21.8k
                    }
261
103k
                    else
262
103k
                    {
263
                        /* IT + Residual + Recon */
264
103k
                        ret = isvcd_process_inter_mb_rsd_pred_target_lyr(
265
103k
                            ps_svc_lyr_dec, ps_cur_mb_info, j, 0, pu2_res_luma_csbp);
266
103k
                        if(ret != OK) return ret;
267
103k
                    }
268
125k
                }
269
125k
            }
270
271
410k
            else if((ps_cur_mb_info->u1_mb_type != MB_SKIP) &&
272
410k
                    (ps_cur_mb_info->u1_mb_type != MB_INFER))
273
17.6k
            {
274
17.6k
                if((u1_ipcm_th + 25) != ps_cur_mb_info->u1_mb_type)
275
17.4k
                {
276
17.4k
                    ps_cur_mb_info->u1_mb_type -= (u1_skip_th + 1);
277
17.4k
                    ih264d_process_intra_mb(ps_dec, ps_cur_mb_info, j);
278
17.4k
                    isvcd_update_intra_mb_inter_layer_info(ps_svc_lyr_dec, ps_cur_mb_info);
279
17.4k
                }
280
196
                else
281
196
                {
282
196
                    isvcd_update_ipcm_mb_inter_layer_info(ps_svc_lyr_dec, ps_cur_mb_info);
283
196
                }
284
17.6k
                *pu2_res_luma_csbp = 0;
285
17.6k
            }
286
393k
            else if(ps_cur_mb_info->u1_mb_type == MB_INFER)
287
65.5k
            {
288
                /* inter layer intra prediction : intra upsample, IQ, IT ,deblock */
289
65.5k
                {
290
                    /* Intra resample for IBL mode */
291
65.5k
                    ret = isvcd_process_ibl_mb(ps_svc_lyr_dec, ps_cur_mb_info, j, 0);
292
65.5k
                    if(ret != OK) return ret;
293
                    /* Pass intra resample as pred to Recon generation */
294
65.5k
                    ih264d_process_inter_mb(ps_dec, ps_cur_mb_info, j);
295
65.5k
                    isvcd_update_inter_mb_inter_layer_info(ps_svc_lyr_dec, ps_cur_mb_info, 1);
296
65.5k
                    *pu2_res_luma_csbp = ps_cur_mb_info->u2_luma_csbp;
297
65.5k
                }
298
65.5k
                ps_dec->pi1_left_pred_mode[0] = DC;
299
65.5k
                ps_dec->pi1_left_pred_mode[1] = DC;
300
65.5k
                ps_dec->pi1_left_pred_mode[2] = DC;
301
65.5k
                ps_dec->pi1_left_pred_mode[3] = DC;
302
303
65.5k
                ps_cur_mb_info->ps_curmb->pi1_intrapredmodes[0] = DC;
304
65.5k
                ps_cur_mb_info->ps_curmb->pi1_intrapredmodes[1] = DC;
305
65.5k
                ps_cur_mb_info->ps_curmb->pi1_intrapredmodes[2] = DC;
306
65.5k
                ps_cur_mb_info->ps_curmb->pi1_intrapredmodes[3] = DC;
307
308
65.5k
                isvcd_update_ibl_mb_inter_layer_info(ps_svc_lyr_dec, ps_cur_mb_info);
309
65.5k
            }
310
311
536k
            if(ps_dec->u4_use_intrapred_line_copy == 1)
312
536k
                ih264d_copy_intra_pred_line(ps_dec, ps_cur_mb_info, j);
313
536k
        }
314
315
536k
        DATA_SYNC();
316
317
536k
        u4_mb_num = ps_cur_mb_info->u2_mbx + ps_dec->u2_frm_wd_in_mbs * ps_cur_mb_info->u2_mby;
318
536k
        UPDATE_MB_MAP_MBNUM_BYTE(ps_dec->pu1_recon_mb_map, u4_mb_num);
319
536k
        ps_dec->cur_dec_mb_num++;
320
536k
    }
321
322
    /*N MB deblocking*/
323
164k
    if(ps_dec->u4_nmb_deblk == 1)
324
0
    {
325
0
        UWORD32 u4_wd_y, u4_wd_uv;
326
0
        tfr_ctxt_t *ps_tfr_cxt = &(ps_dec->s_tran_addrecon);
327
0
        UWORD8 u1_field_pic_flag = ps_dec->ps_cur_slice->u1_field_pic_flag;
328
0
        const WORD32 i4_cb_qp_idx_ofst = ps_dec->ps_cur_pps->i1_chroma_qp_index_offset;
329
0
        const WORD32 i4_cr_qp_idx_ofst = ps_dec->ps_cur_pps->i1_second_chroma_qp_index_offset;
330
331
0
        u4_wd_y = ps_dec->u2_frm_wd_y << u1_field_pic_flag;
332
0
        u4_wd_uv = ps_dec->u2_frm_wd_uv << u1_field_pic_flag;
333
334
0
        ps_cur_mb_info = &ps_dec->ps_frm_mb_info[ps_dec->u4_cur_deblk_mb_num];
335
336
0
        ps_dec->u4_deblk_mb_x = ps_cur_mb_info->u2_mbx;
337
0
        ps_dec->u4_deblk_mb_y = ps_cur_mb_info->u2_mby;
338
339
0
        for(j = 0; j < i; j++)
340
0
        {
341
0
            ih264d_deblock_mb_nonmbaff(ps_dec, ps_tfr_cxt, i4_cb_qp_idx_ofst, i4_cr_qp_idx_ofst,
342
0
                                       u4_wd_y, u4_wd_uv);
343
0
        }
344
0
    }
345
346
    /*handle the last mb in picture case*/
347
164k
    if(ps_dec->cur_dec_mb_num > ps_dec->ps_cur_sps->u2_max_mb_addr)
348
16.3k
        ps_dec->u4_cur_slice_decode_done = 1;
349
350
164k
    if(i != u1_num_mbs)
351
6.17k
    {
352
6.17k
        u1_end_of_row = 0;
353
        /*Number of MB's left in row*/
354
6.17k
        u1_num_mbs_next = u1_num_mbs_next + ((u1_num_mbs - i) >> u1_mbaff);
355
6.17k
    }
356
357
164k
    ih264d_decode_tfr_nmb(ps_dec, (i), u1_num_mbs_next, u1_end_of_row);
358
359
164k
    return OK;
360
164k
}
361
362
/*****************************************************************************/
363
/*                                                                           */
364
/*  Function Name : isvcd_decode_slice_thread                                */
365
/*                                                                           */
366
/*  Description   :                                                          */
367
/*                :                                                          */
368
/*                :                                                          */
369
/*  Inputs        :                                                          */
370
/*  Processing    :                                                          */
371
/*                                                                           */
372
/*  Outputs       :                                                          */
373
/*  Returns       : 0 on success                                             */
374
/*                                                                           */
375
/*  Revision History:                                                        */
376
/*                                                                           */
377
/*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
378
/*                      ITTIAM                                               */
379
/*****************************************************************************/
380
WORD32 isvcd_decode_slice_thread(svc_dec_lyr_struct_t *ps_svc_lyr_dec)
381
24.2k
{
382
24.2k
    UWORD8 u1_num_mbs_next, u1_num_mbsleft, u1_end_of_row = 0;
383
24.2k
    dec_struct_t *ps_dec = &ps_svc_lyr_dec->s_dec;
384
24.2k
    const UWORD32 i2_pic_wdin_mbs = ps_dec->u2_frm_wd_in_mbs;
385
24.2k
    UWORD8 u1_mbaff, u1_num_mbs;
386
387
24.2k
    UWORD16 u2_first_mb_in_slice;
388
24.2k
    UWORD16 i16_mb_x, i16_mb_y;
389
24.2k
    UWORD8 u1_field_pic;
390
24.2k
    UWORD32 u4_frame_stride, x_offset, y_offset;
391
24.2k
    WORD32 ret;
392
24.2k
    tfr_ctxt_t *ps_trns_addr;
393
394
    /*check for mb map of first mb in slice to ensure slice header is parsed*/
395
163k
    while(1)
396
163k
    {
397
163k
        UWORD32 u4_mb_num = ps_dec->cur_dec_mb_num;
398
163k
        UWORD32 u4_cond = 0;
399
163k
        WORD32 nop_cnt = 8 * 128;
400
163k
        CHECK_MB_MAP_BYTE(u4_mb_num, ps_dec->pu1_dec_mb_map, u4_cond);
401
163k
        if(u4_cond)
402
23.5k
        {
403
23.5k
            break;
404
23.5k
        }
405
139k
        else
406
139k
        {
407
139k
            if(nop_cnt > 0)
408
139k
            {
409
139k
                nop_cnt -= 128;
410
139k
                NOP(128);
411
139k
            }
412
0
            else if(ps_dec->u4_output_present && (2 == ps_dec->u4_num_cores) &&
413
0
                    (ps_dec->u4_fmt_conv_cur_row < ps_dec->s_disp_frame_info.u4_y_ht))
414
0
            {
415
0
                ps_dec->u4_fmt_conv_num_rows =
416
0
                    MIN(FMT_CONV_NUM_ROWS,
417
0
                        (ps_dec->s_disp_frame_info.u4_y_ht - ps_dec->u4_fmt_conv_cur_row));
418
0
                ih264d_format_convert(ps_dec, &(ps_dec->s_disp_op), ps_dec->u4_fmt_conv_cur_row,
419
0
                                      ps_dec->u4_fmt_conv_num_rows);
420
0
                ps_dec->u4_fmt_conv_cur_row += ps_dec->u4_fmt_conv_num_rows;
421
0
            }
422
0
            else
423
0
            {
424
0
                nop_cnt = 8 * 128;
425
0
                ithread_yield();
426
0
            }
427
139k
            if(1 == ps_svc_lyr_dec->u1_error_in_cur_frame)
428
675
            {
429
675
                return NOT_OK;
430
675
            }
431
139k
            DEBUG_THREADS_PRINTF(
432
139k
                "waiting for mb mapcur_dec_mb_num = %d,ps_dec->u2_cur_mb_addr  = "
433
139k
                "%d\n",
434
139k
                u2_cur_dec_mb_num, ps_dec->u2_cur_mb_addr);
435
139k
        }
436
163k
    }
437
438
23.5k
    u1_mbaff = ps_dec->ps_cur_slice->u1_mbaff_frame_flag;
439
23.5k
    u2_first_mb_in_slice = ps_dec->ps_decode_cur_slice->u4_first_mb_in_slice;
440
23.5k
    i16_mb_x = MOD(u2_first_mb_in_slice, i2_pic_wdin_mbs);
441
23.5k
    i16_mb_y = DIV(u2_first_mb_in_slice, i2_pic_wdin_mbs);
442
23.5k
    i16_mb_y <<= u1_mbaff;
443
23.5k
    ps_dec->i2_dec_thread_mb_y = i16_mb_y;
444
23.5k
    ps_dec->cur_dec_mb_num = u2_first_mb_in_slice << u1_mbaff;
445
446
23.5k
    if((ps_dec->u4_num_cores == 2) || !ps_dec->i1_recon_in_thread3_flag)
447
23.5k
    {
448
23.5k
        ps_dec->pv_proc_tu_coeff_data =
449
23.5k
            (void *) ps_dec->ps_decode_cur_slice->pv_tu_coeff_data_start;
450
23.5k
    }
451
452
    // recalculate recon pointers
453
23.5k
    u1_field_pic = ps_dec->ps_cur_slice->u1_field_pic_flag;
454
23.5k
    u4_frame_stride = ps_dec->u2_frm_wd_y << u1_field_pic;
455
23.5k
    x_offset = i16_mb_x << 4;
456
23.5k
    y_offset = (i16_mb_y * u4_frame_stride) << 4;
457
458
23.5k
    ps_trns_addr = &(ps_dec->s_tran_addrecon);
459
460
23.5k
    ps_trns_addr->pu1_dest_y = ps_dec->s_cur_pic.pu1_buf1 + x_offset + y_offset;
461
462
23.5k
    u4_frame_stride = ps_dec->u2_frm_wd_uv << u1_field_pic;
463
23.5k
    x_offset >>= 1;
464
23.5k
    y_offset = (i16_mb_y * u4_frame_stride) << 3;
465
23.5k
    x_offset *= YUV420SP_FACTOR;
466
467
23.5k
    ps_trns_addr->pu1_dest_u = ps_dec->s_cur_pic.pu1_buf2 + x_offset + y_offset;
468
23.5k
    ps_trns_addr->pu1_dest_v = ps_dec->s_cur_pic.pu1_buf3 + x_offset + y_offset;
469
470
23.5k
    ps_trns_addr->pu1_mb_y = ps_trns_addr->pu1_dest_y;
471
23.5k
    ps_trns_addr->pu1_mb_u = ps_trns_addr->pu1_dest_u;
472
23.5k
    ps_trns_addr->pu1_mb_v = ps_trns_addr->pu1_dest_v;
473
474
    /* Initialise MC and formMbPartInfo fn ptrs one time based on profile_idc */
475
23.5k
    {
476
23.5k
        ps_dec->p_mc_dec_thread = ih264d_motion_compensate_bp;
477
23.5k
        ps_dec->p_form_mb_part_info_thread = ih264d_form_mb_part_info_bp;
478
23.5k
    }
479
23.5k
    {
480
23.5k
        UWORD8 uc_nofield_nombaff;
481
23.5k
        uc_nofield_nombaff = ((ps_dec->ps_cur_slice->u1_field_pic_flag == 0) &&
482
23.5k
                              (ps_dec->ps_cur_slice->u1_mbaff_frame_flag == 0) &&
483
23.5k
                              (ps_dec->ps_decode_cur_slice->slice_type != B_SLICE) &&
484
23.5k
                              (ps_dec->ps_cur_pps->u1_wted_pred_flag == 0));
485
486
23.5k
        if(uc_nofield_nombaff == 0)
487
6.19k
        {
488
6.19k
            ps_dec->p_mc_dec_thread = ih264d_motion_compensate_mp;
489
6.19k
            ps_dec->p_form_mb_part_info_thread = ih264d_form_mb_part_info_mp;
490
6.19k
        }
491
23.5k
    }
492
493
23.5k
    ps_dec->u4_cur_slice_decode_done = 0;
494
495
188k
    while(ps_dec->u4_cur_slice_decode_done != 1)
496
165k
    {
497
165k
        u1_num_mbsleft = ((i2_pic_wdin_mbs - i16_mb_x) << u1_mbaff);
498
499
165k
        if(u1_num_mbsleft <= ps_dec->u1_recon_mb_grp)
500
165k
        {
501
165k
            u1_num_mbs = u1_num_mbsleft;
502
503
            /*Indicate number of mb's left in a row*/
504
165k
            u1_num_mbs_next = 0;
505
165k
            u1_end_of_row = 1;
506
165k
            i16_mb_x = 0;
507
165k
        }
508
0
        else
509
0
        {
510
0
            u1_num_mbs = ps_dec->u1_recon_mb_grp;
511
512
            /*Indicate number of mb's left in a row*/
513
0
            u1_num_mbs_next = i2_pic_wdin_mbs - i16_mb_x - (ps_dec->u1_recon_mb_grp >> u1_mbaff);
514
0
            i16_mb_x += (u1_num_mbs >> u1_mbaff);
515
0
            u1_end_of_row = 0;
516
0
        }
517
165k
        if(ps_svc_lyr_dec->u1_layer_identifier == TARGET_LAYER)
518
165k
        {
519
165k
            ret = isvcd_decode_recon_tfr_nmb_thread(ps_svc_lyr_dec, u1_num_mbs, u1_num_mbs_next,
520
165k
                                                    u1_end_of_row);
521
165k
        }
522
165k
        if(ret != OK) return ret;
523
165k
    }
524
22.4k
    return OK;
525
23.5k
}
526
527
/*****************************************************************************/
528
/*                                                                           */
529
/*  Function Name : isvcd_decode_picture_thread                              */
530
/*                                                                           */
531
/*  Description   :                                                          */
532
/*                :                                                          */
533
/*                :                                                          */
534
/*  Inputs        :                                                          */
535
/*  Processing    :                                                          */
536
/*                                                                           */
537
/*  Outputs       :                                                          */
538
/*  Returns       : None                                                     */
539
/*                                                                           */
540
/*  Revision History:                                                        */
541
/*                                                                           */
542
/*         DD MM YYYY   Author(s)       Changes (Describe the changes made)  */
543
/*                      ITTIAM                                               */
544
/*****************************************************************************/
545
void isvcd_decode_picture_thread(svc_dec_lyr_struct_t *ps_svc_lyr_dec)
546
18.0k
{
547
18.0k
    dec_struct_t *ps_dec = &ps_svc_lyr_dec->s_dec;
548
18.0k
    WORD32 ret;
549
18.0k
    ithread_set_name("isvcd_decode_picture_thread");
550
18.0k
    while(1)
551
18.0k
    {
552
#ifdef KEEP_THREADS_ACTIVE
553
        ret = ithread_mutex_lock(ps_dec->apv_proc_start_mutex[0]);
554
        if(OK != ret) break;
555
556
        while(ps_dec->ai4_process_start[0] != PROC_START)
557
        {
558
            ithread_cond_wait(ps_dec->apv_proc_start_condition[0], ps_dec->apv_proc_start_mutex[0]);
559
        }
560
        ps_dec->ai4_process_start[0] = PROC_IN_PROGRESS;
561
562
        ret = ithread_mutex_unlock(ps_dec->apv_proc_start_mutex[0]);
563
        if(OK != ret || ps_dec->i4_break_threads == 1) break;
564
#endif
565
24.2k
        while(1)
566
24.2k
        {
567
            /*Complete all writes before processing next slice*/
568
569
24.2k
            DEBUG_THREADS_PRINTF(" Entering decode slice svc ext\n");
570
571
24.2k
            ret = isvcd_decode_slice_thread(ps_svc_lyr_dec);
572
24.2k
            if(OK != ret) break;
573
22.4k
            DEBUG_THREADS_PRINTF(" Exit  isvcd_decode_slice_thread\n");
574
575
22.4k
            if(ps_dec->cur_dec_mb_num > ps_dec->ps_cur_sps->u2_max_mb_addr)
576
16.3k
            {
577
                /*Last slice in frame*/
578
16.3k
                break;
579
16.3k
            }
580
6.17k
            else
581
6.17k
            {
582
6.17k
                ps_dec->ps_decode_cur_slice++;
583
6.17k
                ps_dec->u2_cur_slice_num_dec_thread++;
584
6.17k
            }
585
22.4k
        }
586
18.0k
        if(ps_dec->u4_output_present && (2 == ps_dec->u4_num_cores) &&
587
18.0k
           (ps_dec->u4_fmt_conv_cur_row < ps_dec->s_disp_frame_info.u4_y_ht))
588
7.32k
        {
589
7.32k
            ps_dec->u4_fmt_conv_num_rows =
590
7.32k
                (ps_dec->s_disp_frame_info.u4_y_ht - ps_dec->u4_fmt_conv_cur_row);
591
7.32k
            ih264d_format_convert(ps_dec, &(ps_dec->s_disp_op), ps_dec->u4_fmt_conv_cur_row,
592
7.32k
                                  ps_dec->u4_fmt_conv_num_rows);
593
7.32k
            ps_dec->u4_fmt_conv_cur_row += ps_dec->u4_fmt_conv_num_rows;
594
7.32k
        }
595
#ifdef KEEP_THREADS_ACTIVE
596
        ret = ithread_mutex_lock(ps_dec->apv_proc_done_mutex[0]);
597
        if(OK != ret) break;
598
599
        ps_dec->ai4_process_done[0] = PROC_DONE;
600
        ithread_cond_signal(ps_dec->apv_proc_done_condition[0]);
601
602
        ret = ithread_mutex_unlock(ps_dec->apv_proc_done_mutex[0]);
603
        if(OK != ret) break;
604
#else
605
18.0k
        break;
606
18.0k
#endif
607
18.0k
    }
608
18.0k
}