Coverage Report

Created: 2025-07-11 06:39

/src/libavc/encoder/svc/isvce_encode_header.c
Line
Count
Source (jump to first uncovered line)
1
/******************************************************************************
2
 *
3
 * Copyright (C) 2022 The Android Open Source Project
4
 *
5
 * Licensed under the Apache License, Version 2.0 (the "License");
6
 * you may not use this file except in compliance with the License.
7
 * You may obtain a copy of the License at:
8
 *
9
 * http://www.apache.org/licenses/LICENSE-2.0
10
 *
11
 * Unless required by applicable law or agreed to in writing, software
12
 * distributed under the License is distributed on an "AS IS" BASIS,
13
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
 * See the License for the specific language governing permissions and
15
 * limitations under the License.
16
 *
17
 *****************************************************************************
18
 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19
 */
20
21
/**
22
*******************************************************************************
23
* @file
24
*  isvce_encode_header.c
25
*
26
* @brief
27
*  This file contains function definitions related to header encoding.
28
*
29
* @author
30
*  ittiam
31
*
32
* @par List of Functions:
33
*  - isvce_generate_sps()
34
*  - isvce_generate_pps()
35
*  - isvce_generate_slice_header()
36
*  - isvce_populate_sps()
37
*  - isvce_populate_pps()
38
*  - isvce_populate_slice_header()
39
*
40
*******************************************************************************
41
*/
42
43
#include "ih264_typedefs.h"
44
#include "ih264_debug.h"
45
46
/* Dependencies of ih264e_bitstream.h */
47
#include "ih264e_error.h"
48
49
#include "ih264e_bitstream.h"
50
51
#include "isvce_encode_header.h"
52
#include "isvce_utils.h"
53
54
static FORCEINLINE IH264E_ERROR_T isvce_generate_nal_unit_header(bitstrm_t *ps_bitstrm,
55
                                                                 WORD32 nal_unit_type,
56
                                                                 WORD32 nal_ref_idc)
57
100k
{
58
100k
    WORD32 return_status = IH264E_SUCCESS;
59
60
100k
    if(!((nal_unit_type > 0) && (nal_unit_type < 32)))
61
0
    {
62
0
        return IH264E_FAIL;
63
0
    }
64
65
    /* forbidden_zero_bit + nal_ref_idc + nal_unit_type */
66
100k
    PUT_BITS(ps_bitstrm, ((nal_ref_idc << 5) + nal_unit_type),
67
100k
             (1 + 2 + 5), /*1 forbidden zero bit + 2 nal_ref_idc + 5 nal_unit_type */
68
100k
             return_status, "nal_unit_header");
69
70
100k
    return return_status;
71
100k
}
72
73
/**
74
******************************************************************************
75
*
76
* @brief Generates SPS (Sequence Parameter Set)
77
*
78
* @par   Description
79
*  This function generates Sequence Parameter Set header as per the spec
80
*
81
* @param[in]   ps_bitstrm
82
*  pointer to bitstream context (handle)
83
*
84
* @param[in]   ps_sps
85
*  pointer to structure containing SPS data
86
*
87
* @param[in]   ps_vui
88
*  pointer to structure containing VUI data
89
*
90
* @return      success or failure error code
91
*
92
******************************************************************************
93
*/
94
WORD32 isvce_generate_sps(bitstrm_t *ps_bitstrm, sps_t *ps_sps, NAL_UNIT_TYPE_T nal_type)
95
11.8k
{
96
11.8k
    WORD32 return_status = IH264E_SUCCESS;
97
11.8k
    WORD32 i;
98
11.8k
    WORD8 i1_nal_ref_idc = 3;
99
11.8k
    vui_t *ps_vui = &ps_sps->s_vui_parameters;
100
101
    /* Insert Start Code */
102
11.8k
    return_status = ih264e_put_nal_start_code_prefix(ps_bitstrm, 1);
103
11.8k
    if(return_status != IH264E_SUCCESS)
104
0
    {
105
0
        return return_status;
106
0
    }
107
    /* Insert Nal Unit Header */
108
11.8k
    return_status = isvce_generate_nal_unit_header(ps_bitstrm, nal_type, i1_nal_ref_idc);
109
11.8k
    if(return_status != IH264E_SUCCESS)
110
0
    {
111
0
        return return_status;
112
0
    }
113
114
    /* profile_idc */
115
11.8k
    PUT_BITS(ps_bitstrm, ps_sps->u1_profile_idc, 8, return_status, "profile_idc");
116
117
    /* constrained_set_flags */
118
11.8k
    PUT_BITS(ps_bitstrm, ps_sps->u1_constraint_set0_flag, 1, return_status,
119
11.8k
             "constrained_set0_flag");
120
11.8k
    PUT_BITS(ps_bitstrm, ps_sps->u1_constraint_set1_flag, 1, return_status,
121
11.8k
             "constrained_set1_flag");
122
11.8k
    PUT_BITS(ps_bitstrm, ps_sps->u1_constraint_set2_flag, 1, return_status,
123
11.8k
             "constrained_set2_flag");
124
11.8k
    PUT_BITS(ps_bitstrm, ps_sps->u1_constraint_set3_flag, 1, return_status,
125
11.8k
             "constrained_set3_flag");
126
127
    /* reserved_zero_four_bits */
128
11.8k
    PUT_BITS(ps_bitstrm, 0, 4, return_status, "reserved_zero_four_bits");
129
130
    /* level_idc */
131
11.8k
    PUT_BITS(ps_bitstrm, ps_sps->u1_level_idc, 8, return_status, "level_idc");
132
133
    /* seq_parameter_set_id */
134
11.8k
    PUT_BITS_UEV(ps_bitstrm, ps_sps->u1_sps_id, return_status, "seq_parameter_set_id");
135
136
11.8k
    if((ps_sps->u1_profile_idc == IH264_SCALABLE_BASELINE) ||
137
11.8k
       (ps_sps->u1_profile_idc >= IH264_PROFILE_HIGH))
138
6.72k
    {
139
        /* chroma_format_idc */
140
6.72k
        PUT_BITS_UEV(ps_bitstrm, ps_sps->u1_chroma_format_idc, return_status, "chroma_format_idc");
141
142
6.72k
        if(ps_sps->u1_chroma_format_idc == CHROMA_FMT_IDC_YUV444)
143
0
        {
144
            /* i1_residual_colour_transform_flag */
145
0
            PUT_BITS(ps_bitstrm, ps_sps->i1_residual_colour_transform_flag, 1, return_status,
146
0
                     "i1_residual_colour_transform_flag");
147
0
        }
148
149
        /* bit_depth_luma_minus8 */
150
6.72k
        PUT_BITS_UEV(ps_bitstrm, (ps_sps->i1_bit_depth_luma - 8), return_status,
151
6.72k
                     "bit_depth_luma_minus8");
152
153
        /* bit_depth_chroma_minus8 */
154
6.72k
        PUT_BITS_UEV(ps_bitstrm, (ps_sps->i1_bit_depth_chroma - 8), return_status,
155
6.72k
                     "bit_depth_chroma_minus8");
156
157
        /* qpprime_y_zero_transform_bypass_flag */
158
6.72k
        PUT_BITS(ps_bitstrm, ps_sps->i1_qpprime_y_zero_transform_bypass_flag, 1, return_status,
159
6.72k
                 "qpprime_y_zero_transform_bypass_flag");
160
161
        /* seq_scaling_matrix_present_flag */
162
6.72k
        PUT_BITS(ps_bitstrm, ps_sps->i1_seq_scaling_matrix_present_flag, 1, return_status,
163
6.72k
                 "seq_scaling_matrix_present_flag");
164
165
        /* seq_scaling_list */
166
6.72k
        if(ps_sps->i1_seq_scaling_matrix_present_flag)
167
0
        {
168
            /* TODO_LATER: Will be enabled once scaling list support is added */
169
0
        }
170
6.72k
    }
171
172
    /* log2_max_frame_num_minus4 */
173
11.8k
    PUT_BITS_UEV(ps_bitstrm, (ps_sps->i1_log2_max_frame_num - 4), return_status,
174
11.8k
                 "log2_max_frame_num_minus4");
175
176
    /* pic_order_cnt_type */
177
11.8k
    PUT_BITS_UEV(ps_bitstrm, ps_sps->i1_pic_order_cnt_type, return_status, "pic_order_cnt_type");
178
179
11.8k
    if(ps_sps->i1_pic_order_cnt_type == 0)
180
0
    {
181
        /* log2_max_pic_order_cnt_lsb_minus4 */
182
0
        PUT_BITS_UEV(ps_bitstrm, (ps_sps->i1_log2_max_pic_order_cnt_lsb - 4), return_status,
183
0
                     "log2_max_pic_order_cnt_lsb_minus4");
184
0
    }
185
11.8k
    else if(ps_sps->i1_pic_order_cnt_type == 1)
186
0
    {
187
        /* delta_pic_order_always_zero_flag */
188
0
        PUT_BITS(ps_bitstrm, ps_sps->i1_delta_pic_order_always_zero_flag, 1, return_status,
189
0
                 "delta_pic_order_always_zero_flag");
190
191
        /* offset_for_non_ref_pic */
192
0
        PUT_BITS_SEV(ps_bitstrm, ps_sps->i4_offset_for_non_ref_pic, return_status,
193
0
                     "offset_for_non_ref_pic");
194
195
        /* offset_for_top_to_bottom_field */
196
0
        PUT_BITS_SEV(ps_bitstrm, ps_sps->i4_offset_for_top_to_bottom_field, return_status,
197
0
                     "offset_for_top_to_bottom_field");
198
199
        /* num_ref_frames_in_pic_order_cnt_cycle */
200
0
        PUT_BITS_UEV(ps_bitstrm, ps_sps->u1_num_ref_frames_in_pic_order_cnt_cycle, return_status,
201
0
                     "num_ref_frames_in_pic_order_cnt_cycle");
202
203
        /* Offset for ref frame */
204
0
        for(i = 0; i < ps_sps->u1_num_ref_frames_in_pic_order_cnt_cycle; i++)
205
0
        {
206
            /* offset_for_ref_frame */
207
0
            PUT_BITS_SEV(ps_bitstrm, ps_sps->ai4_offset_for_ref_frame[i], return_status,
208
0
                         "offset_for_ref_frame");
209
0
        }
210
0
    }
211
212
    /* num_ref_frames */
213
11.8k
    PUT_BITS_UEV(ps_bitstrm, ps_sps->u1_max_num_ref_frames, return_status, "num_ref_frames");
214
215
    /* gaps_in_frame_num_value_allowed_flag */
216
11.8k
    PUT_BITS(ps_bitstrm, ps_sps->i1_gaps_in_frame_num_value_allowed_flag, 1, return_status,
217
11.8k
             "gaps_in_frame_num_value_allowed_flag");
218
219
    /* pic_width_in_mbs_minus1 */
220
11.8k
    PUT_BITS_UEV(ps_bitstrm, ps_sps->i2_pic_width_in_mbs_minus1, return_status,
221
11.8k
                 "pic_width_in_mbs_minus1");
222
223
    /* pic_height_in_map_units_minus1 */
224
11.8k
    PUT_BITS_UEV(ps_bitstrm, ps_sps->i2_pic_height_in_map_units_minus1, return_status,
225
11.8k
                 "pic_height_in_map_units_minus1");
226
227
    /* frame_mbs_only_flag */
228
11.8k
    PUT_BITS(ps_bitstrm, ps_sps->i1_frame_mbs_only_flag, 1, return_status, "frame_mbs_only_flag");
229
230
11.8k
    if(!ps_sps->i1_frame_mbs_only_flag)
231
0
    {
232
        /* mb_adaptive_frame_field_flag */
233
0
        PUT_BITS(ps_bitstrm, ps_sps->i1_mb_adaptive_frame_field_flag, 1, return_status,
234
0
                 "mb_adaptive_frame_field_flag");
235
0
    }
236
237
    /* direct_8x8_inference_flag */
238
11.8k
    PUT_BITS(ps_bitstrm, ps_sps->i1_direct_8x8_inference_flag, 1, return_status,
239
11.8k
             "direct_8x8_inference_flag");
240
241
    /* frame_cropping_flag */
242
11.8k
    PUT_BITS(ps_bitstrm, ps_sps->i1_frame_cropping_flag, 1, return_status, "frame_cropping_flag");
243
244
11.8k
    if(ps_sps->i1_frame_cropping_flag)
245
0
    {
246
        /* frame_crop_left_offset */
247
0
        PUT_BITS_UEV(ps_bitstrm, ps_sps->i2_frame_crop_left_offset, return_status,
248
0
                     "frame_crop_left_offset");
249
250
        /* frame_crop_right_offset */
251
0
        PUT_BITS_UEV(ps_bitstrm, ps_sps->i2_frame_crop_right_offset, return_status,
252
0
                     "frame_crop_right_offset");
253
254
        /* frame_crop_top_offset */
255
0
        PUT_BITS_UEV(ps_bitstrm, ps_sps->i2_frame_crop_top_offset, return_status,
256
0
                     "frame_crop_top_offset");
257
258
        /* frame_crop_bottom_offset */
259
0
        PUT_BITS_UEV(ps_bitstrm, ps_sps->i2_frame_crop_bottom_offset, return_status,
260
0
                     "frame_crop_bottom_offset");
261
0
    }
262
263
    /* vui_parameters_present_flag */
264
11.8k
    PUT_BITS(ps_bitstrm, ps_sps->i1_vui_parameters_present_flag, 1, return_status,
265
11.8k
             "vui_parameters_present_flag");
266
267
11.8k
    if(ps_sps->i1_vui_parameters_present_flag)
268
0
    {
269
0
        /* Add vui parameters to the bitstream */;
270
0
        return_status = ih264e_generate_vui(ps_bitstrm, ps_vui);
271
0
        if(return_status != IH264E_SUCCESS)
272
0
        {
273
0
            return return_status;
274
0
        }
275
0
    }
276
277
11.8k
    if(nal_type != NAL_SUBSET_SPS)
278
5.14k
    {
279
        /* rbsp trailing bits */
280
5.14k
        return_status = ih264e_put_rbsp_trailing_bits(ps_bitstrm);
281
5.14k
    }
282
283
11.8k
    return return_status;
284
11.8k
}
285
286
/**
287
******************************************************************************
288
*
289
* @brief Generates PPS (Picture Parameter Set)
290
*
291
* @par   Description
292
*  Generate Picture Parameter Set as per Section 7.3.2.2
293
*
294
* @param[in]   ps_bitstrm
295
*  pointer to bitstream context (handle)
296
*
297
* @param[in]   ps_pps
298
*  pointer to structure containing PPS data
299
*
300
* @return      success or failure error code
301
*
302
******************************************************************************
303
*/
304
WORD32 isvce_generate_pps(bitstrm_t *ps_bitstrm, pps_t *ps_pps, sps_t *ps_sps)
305
11.8k
{
306
11.8k
    WORD32 return_status = IH264E_SUCCESS;
307
308
    /* Insert the NAL start code */
309
11.8k
    return_status = ih264e_put_nal_start_code_prefix(ps_bitstrm, 1);
310
11.8k
    if(return_status != IH264E_SUCCESS)
311
0
    {
312
0
        return return_status;
313
0
    }
314
315
    /* Insert Nal Unit Header */
316
11.8k
    PUT_BITS(ps_bitstrm, NAL_PPS_FIRST_BYTE, 8, return_status, "pps_header");
317
318
    /* pic_parameter_set_id */
319
11.8k
    PUT_BITS_UEV(ps_bitstrm, ps_pps->u1_pps_id, return_status, "pic_parameter_set_id");
320
321
    /* seq_parameter_set_id */
322
11.8k
    PUT_BITS_UEV(ps_bitstrm, ps_pps->u1_sps_id, return_status, "seq_parameter_set_id");
323
324
    /* Entropy coding : 0-VLC; 1 - CABAC */
325
11.8k
    PUT_BITS(ps_bitstrm, ps_pps->u1_entropy_coding_mode_flag, 1, return_status,
326
11.8k
             "Entropy coding : 0-VLC; 1 - CABAC");
327
328
    /* Pic order present flag */
329
11.8k
    PUT_BITS(ps_bitstrm, ps_pps->u1_pic_order_present_flag, 1, return_status,
330
11.8k
             "Pic order present flag");
331
332
    /* Number of slice groups */
333
11.8k
    PUT_BITS_UEV(ps_bitstrm, ps_pps->u1_num_slice_groups - 1, return_status,
334
11.8k
                 "Number of slice groups");
335
336
11.8k
    if(ps_pps->u1_num_slice_groups > 1)
337
0
    {
338
        /* TODO_LATER: Currently the number of slice groups minus 1 is 0.
339
         * If this is not the case, we have to add Slice group map type to the bit
340
         * stream*/
341
0
    }
342
343
    /* num_ref_idx_l0_default_active_minus1 */
344
11.8k
    PUT_BITS_UEV(ps_bitstrm, ps_pps->i1_num_ref_idx_l0_default_active - 1, return_status,
345
11.8k
                 "num_ref_idx_l0_default_active_minus1");
346
347
    /* num_ref_idx_l1_default_active_minus1 */
348
11.8k
    PUT_BITS_UEV(ps_bitstrm, ps_pps->i1_num_ref_idx_l1_default_active - 1, return_status,
349
11.8k
                 "num_ref_idx_l1_default_active_minus1");
350
351
    /* weighted_pred_flag */
352
11.8k
    PUT_BITS(ps_bitstrm, ps_pps->i1_weighted_pred_flag, 1, return_status, "weighted_pred_flag");
353
354
    /* weighted_bipred_flag */
355
11.8k
    PUT_BITS(ps_bitstrm, ps_pps->i1_weighted_bipred_idc, 2, return_status, "weighted_bipred_idc");
356
357
    /* pic_init_qp_minus26 */
358
11.8k
    PUT_BITS_SEV(ps_bitstrm, ps_pps->i1_pic_init_qp - 26, return_status, "pic_init_qp_minus26");
359
360
    /* pic_init_qs_minus26 */
361
11.8k
    PUT_BITS_SEV(ps_bitstrm, ps_pps->i1_pic_init_qs - 26, return_status, "pic_init_qs_minus26");
362
363
    /* chroma_qp_index_offset */
364
11.8k
    PUT_BITS_SEV(ps_bitstrm, ps_pps->i1_chroma_qp_index_offset, return_status,
365
11.8k
                 "chroma_qp_index_offset");
366
367
    /* deblocking_filter_control_present_flag */
368
11.8k
    PUT_BITS(ps_bitstrm, ps_pps->i1_deblocking_filter_control_present_flag, 1, return_status,
369
11.8k
             "deblocking_filter_control_present_flag");
370
371
    /* constrained_intra_pred_flag */
372
11.8k
    PUT_BITS(ps_bitstrm, ps_pps->i1_constrained_intra_pred_flag, 1, return_status,
373
11.8k
             "constrained_intra_pred_flag");
374
375
    /*redundant_pic_cnt_present_flag */
376
11.8k
    PUT_BITS(ps_bitstrm, ps_pps->i1_redundant_pic_cnt_present_flag, 1, return_status,
377
11.8k
             "redundant_pic_cnt_present_flag");
378
379
11.8k
    if(ps_sps->u1_profile_idc >= IH264_PROFILE_HIGH)
380
0
    {
381
        /* transform_8x8_mode_flag */
382
0
        PUT_BITS(ps_bitstrm, ps_pps->i1_transform_8x8_mode_flag, 1, return_status,
383
0
                 "transform_8x8_mode_flag");
384
385
        /* pic_scaling_matrix_present_flag */
386
0
        PUT_BITS(ps_bitstrm, ps_pps->i1_pic_scaling_matrix_present_flag, 1, return_status,
387
0
                 "pic_scaling_matrix_present_flag");
388
389
0
        if(ps_pps->i1_pic_scaling_matrix_present_flag)
390
0
        {
391
            /* TODO_LATER: Will be enabled once scaling list support is added */
392
0
        }
393
394
        /* Second chroma QP offset */
395
0
        PUT_BITS_SEV(ps_bitstrm, ps_pps->i1_second_chroma_qp_index_offset, return_status,
396
0
                     "Second chroma QP offset");
397
0
    }
398
399
11.8k
    return_status = ih264e_put_rbsp_trailing_bits(ps_bitstrm);
400
401
11.8k
    return return_status;
402
11.8k
}
403
404
/**
405
******************************************************************************
406
*
407
* @brief Generates Slice Header
408
*
409
* @par   Description
410
*  Generate Slice Header as per Section 7.3.5.1
411
*
412
* @param[inout]   ps_bitstrm
413
*  pointer to bitstream context for generating slice header
414
*
415
* @param[in]   ps_slice_hdr
416
*  pointer to slice header params
417
*
418
* @param[in]   ps_pps
419
*  pointer to pps params referred by slice
420
*
421
* @param[in]   ps_sps
422
*  pointer to sps params referred by slice
423
*
424
* @param[out]   ps_dup_bit_strm_ent_offset
425
*  Bitstream struct to store bitstream state
426
*
427
* @param[out]   pu4_first_slice_start_offset
428
*  first slice offset is returned
429
*
430
* @return      success or failure error code
431
*
432
******************************************************************************
433
*/
434
WORD32 isvce_generate_slice_header(bitstrm_t *ps_bitstrm, slice_header_t *ps_slice_hdr,
435
                                   pps_t *ps_pps, sps_t *ps_sps, UWORD8 u1_idr_flag)
436
28.9k
{
437
28.9k
    WORD32 return_status = IH264E_SUCCESS;
438
28.9k
    UWORD8 u1_slice_type;
439
440
    /* Insert start code */
441
28.9k
    return_status = ih264e_put_nal_start_code_prefix(ps_bitstrm, 1);
442
28.9k
    if(return_status != IH264E_SUCCESS)
443
0
    {
444
0
        return return_status;
445
0
    }
446
    /* Insert Nal Unit Header */
447
28.9k
    return_status = isvce_generate_nal_unit_header(ps_bitstrm, ps_slice_hdr->i1_nal_unit_type,
448
28.9k
                                                   ps_slice_hdr->i1_nal_unit_idc);
449
28.9k
    if(return_status != IH264E_SUCCESS)
450
0
    {
451
0
        return return_status;
452
0
    }
453
    /* first_mb_in_slice */
454
28.9k
    PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u2_first_mb_in_slice, return_status,
455
28.9k
                 "first_mb_in_slice");
456
457
    /* slice_type */
458
28.9k
    PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u1_slice_type, return_status, "slice_type");
459
460
    /* pic_parameter_set_id */
461
28.9k
    PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u1_pps_id, return_status, "pic_parameter_set_id");
462
463
    /* frame_num */
464
28.9k
    PUT_BITS(ps_bitstrm, ps_slice_hdr->i4_frame_num, ps_sps->i1_log2_max_frame_num, return_status,
465
28.9k
             "frame_num");
466
467
28.9k
    if(!ps_sps->i1_frame_mbs_only_flag)
468
0
    {
469
        /* field_pic_flag */
470
0
        PUT_BITS(ps_bitstrm, ps_slice_hdr->i1_field_pic_flag, 1, return_status, "field_pic_flag");
471
472
0
        if(ps_slice_hdr->i1_field_pic_flag)
473
0
        {
474
            /* bottom_field_flag */
475
0
            PUT_BITS(ps_bitstrm, ps_slice_hdr->i1_bottom_field_flag, 1, return_status,
476
0
                     "bottom_field_flag");
477
0
        }
478
0
    }
479
480
28.9k
    if(u1_idr_flag == 1)
481
8.09k
    {
482
        /* u2_idr_pic_id */
483
8.09k
        PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u2_idr_pic_id, return_status, "idr_pic_id");
484
8.09k
    }
485
486
28.9k
    if(ps_sps->i1_pic_order_cnt_type == 0)
487
0
    {
488
        /* pic_order_cnt_lsb */
489
0
        PUT_BITS(ps_bitstrm, ps_slice_hdr->i4_pic_order_cnt_lsb,
490
0
                 ps_sps->i1_log2_max_pic_order_cnt_lsb, return_status, "pic_order_cnt_lsb");
491
492
0
        if(ps_pps->u1_pic_order_present_flag && !ps_slice_hdr->i1_field_pic_flag)
493
0
        {
494
            /* delta_pic_order_cnt_bottom */
495
0
            PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->i4_delta_pic_order_cnt_bottom, return_status,
496
0
                         "delta_pic_order_cnt_bottom");
497
0
        }
498
0
    }
499
500
28.9k
    if(ps_sps->i1_pic_order_cnt_type == 1 && !ps_sps->i1_delta_pic_order_always_zero_flag)
501
0
    {
502
        /* delta_pic_order_cnt[0] */
503
0
        PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->ai4_delta_pic_order_cnt[0], return_status,
504
0
                     "delta_pic_order_cnt[0]");
505
506
0
        if(ps_pps->u1_pic_order_present_flag && !ps_slice_hdr->i1_field_pic_flag)
507
0
        {
508
            /* delta_pic_order_cnt[1] */
509
0
            PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->ai4_delta_pic_order_cnt[1], return_status,
510
0
                         "delta_pic_order_cnt[1]");
511
0
        }
512
0
    }
513
514
28.9k
    if(ps_pps->i1_redundant_pic_cnt_present_flag)
515
0
    {
516
        /* redundant_pic_cnt */
517
0
        PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u1_redundant_pic_cnt, return_status,
518
0
                     "redundant_pic_cnt");
519
0
    }
520
521
28.9k
    u1_slice_type = ps_slice_hdr->u1_slice_type % EPSLICE;
522
523
28.9k
    if(u1_slice_type == BSLICE)
524
0
    {
525
        /* direct_spatial_mv_pred_flag */
526
0
        PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_direct_spatial_mv_pred_flag, 1, return_status,
527
0
                 "direct_spatial_mv_pred_flag");
528
0
    }
529
530
28.9k
    if(u1_slice_type == PSLICE || u1_slice_type == SPSLICE || u1_slice_type == BSLICE)
531
19.3k
    {
532
        /* num_ref_idx_active_override_flag */
533
19.3k
        PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_num_ref_idx_active_override_flag, 1, return_status,
534
19.3k
                 "num_ref_idx_active_override_flag");
535
536
19.3k
        if(ps_slice_hdr->u1_num_ref_idx_active_override_flag)
537
0
        {
538
            /* num_ref_idx_l0_active_minus1 */
539
0
            PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->i1_num_ref_idx_l0_active - 1, return_status,
540
0
                         "num_ref_idx_l0_active_minus1");
541
542
0
            if(u1_slice_type == BSLICE)
543
0
            {
544
                /* num_ref_idx_l1_active_minus1 */
545
0
                PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->i1_num_ref_idx_l1_active - 1, return_status,
546
0
                             "num_ref_idx_l1_active_minus1");
547
0
            }
548
0
        }
549
19.3k
    }
550
551
    /* ref_pic_list_modification */
552
28.9k
    if((u1_slice_type != ISLICE) && (u1_slice_type != SISLICE))
553
19.3k
    {
554
        /* ref_pic_list_modification_flag_l0 */
555
19.3k
        PUT_BITS(ps_bitstrm, ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l0, 1,
556
19.3k
                 return_status, "ref_pic_list_modification_flag_l0");
557
558
19.3k
        if(ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l0)
559
19.3k
        {
560
19.3k
            UWORD8 i = 0;
561
562
19.3k
            WORD8 *pi1_modification_of_pic_nums_idc_l0 =
563
19.3k
                ps_slice_hdr->s_rplm.i1_modification_of_pic_nums_idc_l0;
564
19.3k
            UWORD32 *pu4_abs_diff_pic_num_minus1_l0 =
565
19.3k
                ps_slice_hdr->s_rplm.u4_abs_diff_pic_num_minus1_l0;
566
19.3k
            UWORD8 *pu1_long_term_pic_num_l0 = ps_slice_hdr->s_rplm.u1_long_term_pic_num_l0;
567
568
19.3k
            do
569
38.6k
            {
570
                /* modification_of_pic_nums_idc */
571
38.6k
                PUT_BITS_UEV(ps_bitstrm, pi1_modification_of_pic_nums_idc_l0[i], return_status,
572
38.6k
                             "modification_of_pic_nums_idc");
573
574
38.6k
                if((0 == pi1_modification_of_pic_nums_idc_l0[i]) ||
575
38.6k
                   (1 == pi1_modification_of_pic_nums_idc_l0[i]))
576
19.3k
                {
577
                    /* abs_diff_pic_num_minus1 */
578
19.3k
                    PUT_BITS_UEV(ps_bitstrm, pu4_abs_diff_pic_num_minus1_l0[0], return_status,
579
19.3k
                                 "abs_diff_pic_num_minus1");
580
581
19.3k
                    pu4_abs_diff_pic_num_minus1_l0++;
582
19.3k
                }
583
19.3k
                else if(2 == pi1_modification_of_pic_nums_idc_l0[i])
584
0
                {
585
                    /* long_term_pic_num */
586
0
                    PUT_BITS_UEV(ps_bitstrm, pu1_long_term_pic_num_l0[0], return_status,
587
0
                                 "abs_diff_pic_num_minus1");
588
589
0
                    pu1_long_term_pic_num_l0++;
590
0
                }
591
38.6k
            } while(pi1_modification_of_pic_nums_idc_l0[i++] != 3);
592
19.3k
        }
593
19.3k
    }
594
595
28.9k
    if(u1_slice_type == BSLICE)
596
0
    {
597
        /* ref_pic_list_modification_flag_l1 */
598
0
        PUT_BITS(ps_bitstrm, ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l1, 1,
599
0
                 return_status, "ref_pic_list_modification_flag_l1");
600
601
0
        if(ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l1)
602
0
        {
603
0
            UWORD8 i = 0;
604
605
0
            WORD8 *pi1_modification_of_pic_nums_idc_l1 =
606
0
                ps_slice_hdr->s_rplm.i1_modification_of_pic_nums_idc_l1;
607
0
            UWORD32 *pu4_abs_diff_pic_num_minus1_l1 =
608
0
                ps_slice_hdr->s_rplm.u4_abs_diff_pic_num_minus1_l1;
609
0
            UWORD8 *pu1_long_term_pic_num_l1 = ps_slice_hdr->s_rplm.u1_long_term_pic_num_l1;
610
611
0
            do
612
0
            {
613
                /* modification_of_pic_nums_idc */
614
0
                PUT_BITS_UEV(ps_bitstrm, pi1_modification_of_pic_nums_idc_l1[i], return_status,
615
0
                             "modification_of_pic_nums_idc");
616
617
0
                if((0 == pi1_modification_of_pic_nums_idc_l1[i]) ||
618
0
                   (1 == pi1_modification_of_pic_nums_idc_l1[i]))
619
0
                {
620
                    /* abs_diff_pic_num_minus1 */
621
0
                    PUT_BITS_UEV(ps_bitstrm, pu4_abs_diff_pic_num_minus1_l1[0], return_status,
622
0
                                 "abs_diff_pic_num_minus1");
623
624
0
                    pu4_abs_diff_pic_num_minus1_l1++;
625
0
                }
626
0
                else if(2 == pi1_modification_of_pic_nums_idc_l1[i])
627
0
                {
628
                    /* long_term_pic_num */
629
0
                    PUT_BITS_UEV(ps_bitstrm, pu1_long_term_pic_num_l1[0], return_status,
630
0
                                 "abs_diff_pic_num_minus1");
631
632
0
                    pu1_long_term_pic_num_l1++;
633
0
                }
634
0
            } while(pi1_modification_of_pic_nums_idc_l1[i++] != 3);
635
0
        }
636
0
    }
637
638
28.9k
    if((ps_pps->i1_weighted_pred_flag && u1_slice_type == PSLICE) ||
639
28.9k
       (u1_slice_type == BSLICE && ps_pps->i1_weighted_bipred_idc == 1))
640
0
    {
641
        /* TODO_LATER: Currently there is no support for weighted prediction.
642
         This needs to be updated when the support is added */
643
0
    }
644
645
28.9k
    if(ps_slice_hdr->i1_nal_unit_idc != 0)
646
28.9k
    {
647
28.9k
        if(u1_idr_flag == 1)
648
8.09k
        {
649
            /* no_output_of_prior_pics_flag  */
650
8.09k
            PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_no_output_of_prior_pics_flag, 1, return_status,
651
8.09k
                     "no_output_of_prior_pics_flag ");
652
653
            /* long_term_reference_flag  */
654
8.09k
            PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_long_term_reference_flag, 1, return_status,
655
8.09k
                     "long_term_reference_flag ");
656
8.09k
        }
657
20.8k
        else
658
20.8k
        {
659
            /* adaptive_ref_pic_marking_mode_flag  */
660
20.8k
            PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_adaptive_ref_pic_marking_mode_flag, 1,
661
20.8k
                     return_status, "adaptive_ref_pic_marking_mode_flag ");
662
663
20.8k
            if(ps_slice_hdr->u1_adaptive_ref_pic_marking_mode_flag)
664
0
            {
665
                /* TODO: if the reference picture marking mode is adaptive
666
                 add these fields in the bit-stream */
667
0
            }
668
20.8k
        }
669
28.9k
    }
670
671
28.9k
    if(ps_slice_hdr->u1_entropy_coding_mode_flag && u1_slice_type != ISLICE &&
672
28.9k
       u1_slice_type != SISLICE)
673
2.59k
    {
674
        /* cabac_init_idc */
675
2.59k
        PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->i1_cabac_init_idc, return_status, "cabac_init_idc");
676
2.59k
    }
677
678
    /* slice_qp_delta */
679
28.9k
    PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->i1_slice_qp - ps_pps->i1_pic_init_qp, return_status,
680
28.9k
                 "slice_qp_delta");
681
682
28.9k
    if(ps_slice_hdr->u1_slice_type == SPSLICE || ps_slice_hdr->u1_slice_type == SISLICE)
683
0
    {
684
0
        if(ps_slice_hdr->u1_slice_type == SPSLICE)
685
0
        {
686
            /* sp_for_switch_flag */
687
0
            PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_sp_for_switch_flag, 1, return_status,
688
0
                     "sp_for_switch_flag");
689
0
        }
690
        /* slice_qs_delta */
691
0
        PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->u1_slice_qs - ps_pps->i1_pic_init_qs, return_status,
692
0
                     "slice_qs_delta");
693
0
    }
694
695
28.9k
    if(ps_pps->i1_deblocking_filter_control_present_flag)
696
28.9k
    {
697
        /* disable_deblocking_filter_idc */
698
28.9k
        PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u1_disable_deblocking_filter_idc, return_status,
699
28.9k
                     "disable_deblocking_filter_idc");
700
701
28.9k
        if(ps_slice_hdr->u1_disable_deblocking_filter_idc != 1)
702
18.7k
        {
703
            /* slice_alpha_c0_offset_div2 */
704
18.7k
            PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->i1_slice_alpha_c0_offset_div2, return_status,
705
18.7k
                         "slice_alpha_c0_offset_div2");
706
707
            /* slice_beta_offset_div2 */
708
18.7k
            PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->i1_slice_beta_offset_div2, return_status,
709
18.7k
                         "slice_beta_offset_div2");
710
18.7k
        }
711
28.9k
    }
712
713
28.9k
    if(ps_slice_hdr->u1_num_slice_groups_minus1 > 0 && ps_pps->u1_slice_group_map_type >= 3 &&
714
28.9k
       ps_pps->u1_slice_group_map_type <= 5)
715
0
    {
716
        /* slice_group_change_cycle */
717
        /* TODO_LATER: Currently the number of slice groups minus 1 is 0.
718
         * If this is not the case, we have to add Slice group map type to the bit
719
         * stream */
720
0
    }
721
722
28.9k
    return return_status;
723
28.9k
}
724
725
/**
726
******************************************************************************
727
*
728
* @brief Populates VUI structure
729
*
730
* @par   Description
731
*  Populates VUI structure for its use in header generation
732
*
733
* @param[in]   ps_codec
734
*  pointer to encoder context
735
*
736
* @return      success or failure error code
737
*
738
******************************************************************************
739
*/
740
static IH264E_ERROR_T isvce_populate_vui(isvce_codec_t *ps_codec, sps_t *ps_sps)
741
11.8k
{
742
11.8k
    vui_t *ps_vui = &ps_sps->s_vui_parameters;
743
744
11.8k
    ps_vui->u1_nal_hrd_parameters_present_flag = 0;
745
11.8k
    ps_vui->u1_vcl_hrd_parameters_present_flag = 0;
746
747
11.8k
    ps_vui->u1_bitstream_restriction_flag = 1;
748
11.8k
    ps_vui->u1_motion_vectors_over_pic_boundaries_flag = 1;
749
11.8k
    ps_vui->u1_max_bytes_per_pic_denom = 0;
750
11.8k
    ps_vui->u1_max_bits_per_mb_denom = 0;
751
11.8k
    ps_vui->u1_log2_max_mv_length_horizontal = 16;
752
11.8k
    ps_vui->u1_log2_max_mv_length_vertical = 16;
753
754
11.8k
    if(ps_codec->s_cfg.u4_num_bframes == 0)
755
11.8k
    {
756
11.8k
        ps_vui->u1_num_reorder_frames = 0;
757
11.8k
    }
758
0
    else
759
0
    {
760
0
        ps_vui->u1_num_reorder_frames = 1;
761
0
    }
762
763
11.8k
    ps_vui->u1_max_dec_frame_buffering = ps_sps->u1_max_num_ref_frames;
764
765
11.8k
    return 0;
766
11.8k
}
767
768
/**
769
******************************************************************************
770
*
771
* @brief Populates sps structure
772
*
773
* @par   Description
774
*  Populates sps structure for its use in header generation
775
*
776
* @param[in]   ps_codec
777
*  pointer to encoder context
778
*
779
* @param[out]  ps_sps
780
*  pointer to sps params that needs to be populated
781
*
782
* @return      success or failure error code
783
*
784
******************************************************************************
785
*/
786
IH264E_ERROR_T isvce_populate_sps(isvce_codec_t *ps_codec, sps_t *ps_sps, UWORD8 u1_sps_id,
787
                                  UWORD8 u1_profile_idc, isvce_inp_buf_t *ps_inp_buf,
788
                                  UWORD8 u1_spatial_layer_id)
789
11.8k
{
790
    /* active config parameters */
791
11.8k
    isvce_cfg_params_t *ps_cfg = &(ps_codec->s_cfg);
792
793
    //    /* level */
794
    //    IH264_LEVEL_T   level_idc;
795
796
    /* error_status */
797
11.8k
    IH264E_ERROR_T i4_err_code = IH264E_FAIL;
798
799
    /* profile */
800
    /*
801
     * Baseline profile supports, 8 bits per sample, 4:2:0 format, CAVLC.
802
     * B frames are not allowed. Further, Flexible mb ordering, Redundant slices,
803
     * Arbitrary slice ordering are supported. The constrained baseline profile is
804
     * baseline profile minus ASO, FMO and redundant slices. To the constrained
805
     * baseline profile if we add support for B slices, support for encoding
806
     * interlaced frames, support for weighted prediction and introduce CABAC
807
     * entropy coding then we have Main Profile.
808
     */
809
11.8k
    ps_sps->u1_profile_idc = u1_profile_idc;
810
811
    /* level */
812
11.8k
    ps_sps->u1_level_idc = MAX(
813
11.8k
        ps_cfg->u4_max_level, (UWORD32) ih264e_get_min_level(ps_cfg->u4_max_wd, ps_cfg->u4_max_ht));
814
815
    /* constrained flags */
816
    /*
817
     * baseline profile automatically implies set 0 flag
818
     */
819
11.8k
    ps_sps->u1_constraint_set0_flag = (ps_sps->u1_profile_idc == IH264_PROFILE_BASELINE);
820
    /*
821
     * main profile automatically implies set 1 flag
822
     * Although the encoder says it supports Baseline profile it actually supports
823
     * constrained baseline profile as ASO, FMO and redundant slices are not
824
     * supported
825
     */
826
11.8k
    ps_sps->u1_constraint_set1_flag = (ps_sps->u1_profile_idc <= IH264_PROFILE_MAIN);
827
    /*
828
     * extended profile is not supported
829
     */
830
11.8k
    ps_sps->u1_constraint_set2_flag = 0x00;
831
    /*
832
     * level 1b or level 11
833
     */
834
11.8k
    if(ps_sps->u1_level_idc == IH264_LEVEL_1B)
835
0
    {
836
0
        ps_sps->u1_constraint_set3_flag = 0;
837
0
        ps_sps->u1_level_idc = IH264_LEVEL_11;
838
0
    }
839
11.8k
    else
840
11.8k
    {
841
11.8k
        ps_sps->u1_constraint_set3_flag = 0;
842
11.8k
    }
843
844
    /* active sps id */
845
11.8k
    ps_sps->u1_sps_id = u1_sps_id;
846
847
11.8k
    if((ps_sps->u1_profile_idc == IH264_SCALABLE_BASELINE) ||
848
11.8k
       (ps_sps->u1_profile_idc >= IH264_PROFILE_HIGH))
849
6.72k
    {
850
        /* chroma format idc */
851
6.72k
        ps_sps->u1_chroma_format_idc = CHROMA_FMT_IDC_YUV420;
852
853
        /* residual_colour_transform_flag */
854
6.72k
        ps_sps->i1_residual_colour_transform_flag = 0;
855
856
        /* luma bit depth 8 */
857
6.72k
        ps_sps->i1_bit_depth_luma = 8;
858
859
        /* chroma bit depth 8 */
860
6.72k
        ps_sps->i1_bit_depth_chroma = 8;
861
862
        /* qpprime_y_zero_transform_bypass_flag */
863
6.72k
        ps_sps->i1_qpprime_y_zero_transform_bypass_flag = 0;
864
865
        /* seq_scaling_matrix_present_flag */
866
6.72k
        ps_sps->i1_seq_scaling_matrix_present_flag = 0;
867
868
6.72k
        if(ps_sps->i1_seq_scaling_matrix_present_flag)
869
0
        {
870
            /* TODO_LATER: Will be enabled once scaling list support is added */
871
0
        }
872
6.72k
    }
873
874
    /* log2_max_frame_num_minus4 */
875
11.8k
    ps_sps->i1_log2_max_frame_num = LOG2_MAX_FRAME_NUM_MINUS4 + 4;
876
877
    /* pic_order_cnt_type */
878
11.8k
    ps_sps->i1_pic_order_cnt_type = 2;
879
880
11.8k
    if(ps_codec->i4_non_ref_frames_in_stream)
881
0
    {
882
0
        ps_sps->i1_pic_order_cnt_type = 0;
883
0
    }
884
885
    /* log2_max_pic_order_cnt_lsb_minus4 */
886
11.8k
    ps_sps->i1_log2_max_pic_order_cnt_lsb = 8;
887
888
    /* TODO : add support for other poc types */
889
11.8k
    if(ps_sps->i1_pic_order_cnt_type == 0)
890
0
    {
891
0
    }
892
11.8k
    else if(ps_sps->i1_pic_order_cnt_type == 1)
893
0
    {
894
0
    }
895
896
11.8k
    ps_sps->u1_max_num_ref_frames = ps_codec->i4_max_num_reference_frames;
897
898
    /* gaps_in_frame_num_value_allowed_flag */
899
11.8k
    ps_sps->i1_gaps_in_frame_num_value_allowed_flag = 0;
900
901
    /* pic width in mb - 1 */
902
11.8k
    ps_sps->i2_pic_width_in_mbs_minus1 =
903
11.8k
        (ps_inp_buf->as_layer_yuv_buf_props[u1_spatial_layer_id].u4_width >> 4) - 1;
904
905
    /* pic height in mb - 1 */
906
11.8k
    ps_sps->i2_pic_height_in_map_units_minus1 =
907
11.8k
        (ps_inp_buf->as_layer_yuv_buf_props[u1_spatial_layer_id].u4_height >> 4) - 1;
908
909
    /* frame_mbs_only_flag, no support for interlace encoding */
910
11.8k
    ps_sps->i1_frame_mbs_only_flag = 1;
911
912
    /* mb_adaptive_frame_field_flag */
913
11.8k
    if(ps_sps->i1_frame_mbs_only_flag == 0)
914
0
    {
915
0
        ps_sps->i1_mb_adaptive_frame_field_flag = 0;
916
0
    }
917
918
    /* direct_8x8_inference_flag */
919
11.8k
    if(ps_sps->u1_level_idc < IH264_LEVEL_30)
920
5.31k
    {
921
5.31k
        ps_sps->i1_direct_8x8_inference_flag = 0;
922
5.31k
    }
923
6.55k
    else
924
6.55k
    {
925
6.55k
        ps_sps->i1_direct_8x8_inference_flag = 1;
926
6.55k
    }
927
928
    /* cropping params */
929
    /*NOTE : Cropping values depend on the chroma format
930
     * For our case ,decoder interprets the cropping values as 2*num pixels
931
     * Hence the difference in the disp width and width must be halved before
932
     * sending to get the expected results
933
     */
934
11.8k
    ps_sps->i1_frame_cropping_flag = 0;
935
11.8k
    ps_sps->i2_frame_crop_left_offset = 0;
936
11.8k
    ps_sps->i2_frame_crop_right_offset = (ps_codec->s_cfg.u4_wd - ps_codec->s_cfg.u4_disp_wd) >> 1;
937
11.8k
    ps_sps->i2_frame_crop_top_offset = 0;
938
11.8k
    ps_sps->i2_frame_crop_bottom_offset = (ps_codec->s_cfg.u4_ht - ps_codec->s_cfg.u4_disp_ht) >> 1;
939
940
11.8k
    if(ps_sps->i2_frame_crop_left_offset || ps_sps->i2_frame_crop_right_offset ||
941
11.8k
       ps_sps->i2_frame_crop_top_offset || ps_sps->i2_frame_crop_bottom_offset)
942
0
    {
943
0
        ps_sps->i1_frame_cropping_flag = 1;
944
0
    }
945
946
    /* vui params */
947
11.8k
    ps_sps->i1_vui_parameters_present_flag = !(ps_cfg->u4_disable_vui);
948
949
11.8k
    if(!ps_sps->i1_vui_parameters_present_flag)
950
11.8k
    {
951
        /* populate vui params */
952
11.8k
        isvce_populate_vui(ps_codec, ps_sps);
953
11.8k
    }
954
0
    else
955
0
    {
956
0
        ps_sps->s_vui_parameters = ps_cfg->s_vui;
957
0
    }
958
959
11.8k
    return i4_err_code;
960
11.8k
}
961
962
/**
963
******************************************************************************
964
*
965
* @brief Populates pps structure
966
*
967
* @par   Description
968
*  Populates pps structure for its use in header generation
969
*
970
* @param[in]   ps_codec
971
*  pointer to encoder context
972
*
973
* @param[out]  ps_pps
974
*  pointer to pps params that needs to be populated
975
*
976
* @return      success or failure error code
977
*
978
******************************************************************************
979
*/
980
IH264E_ERROR_T isvce_populate_pps(isvce_codec_t *ps_codec, pps_t *ps_pps, UWORD8 u1_sps_id,
981
                                  UWORD8 u1_pps_id, UWORD8 u1_spatial_layer_id)
982
11.8k
{
983
    /* seq_parameter_set_id */
984
11.8k
    ps_pps->u1_sps_id = u1_sps_id;
985
986
    /* pic_parameter_set_id */
987
11.8k
    ps_pps->u1_pps_id = u1_pps_id;
988
989
    /* entropy_coding_mode */
990
11.8k
    ps_pps->u1_entropy_coding_mode_flag =
991
11.8k
        ((ps_codec->s_cfg.s_svc_params.u1_num_spatial_layers > 1) && (0 == u1_spatial_layer_id))
992
11.8k
            ? CAVLC
993
11.8k
            : ps_codec->s_cfg.u4_entropy_coding_mode;
994
995
    /* pic_order_present_flag is unset if we don't have feilds */
996
11.8k
    ps_pps->u1_pic_order_present_flag = 0;
997
998
    /* Currently number of slice groups supported are 1 */
999
11.8k
    ps_pps->u1_num_slice_groups = 1;
1000
1001
11.8k
    if(ps_pps->u1_num_slice_groups - 1)
1002
0
    {
1003
        /* TODO_LATER: Currently the number of slice groups minus 1 is 0.
1004
         * If this is not the case, we have to add Slice group map type to the bit
1005
         * stream*/
1006
0
    }
1007
1008
    /* number of reference frames for list 0 */
1009
    /* FIXME : fix this hard coded value */
1010
11.8k
    ps_pps->i1_num_ref_idx_l0_default_active = 1;
1011
1012
    /* number of reference frames for list 1 */
1013
11.8k
    ps_pps->i1_num_ref_idx_l1_default_active = 1;
1014
1015
    /* weighted prediction for now is disabled */
1016
11.8k
    ps_pps->i1_weighted_pred_flag = 0;
1017
11.8k
    ps_pps->i1_weighted_bipred_idc = 0;
1018
1019
    /* The intent is to not signal qp from pps. Rather send the same in slice
1020
     * headers */
1021
11.8k
    ps_pps->i1_pic_init_qp = 0;
1022
1023
    /* The intent is to not signal qp from pps. Rather send the same in slice
1024
     * headers */
1025
11.8k
    ps_pps->i1_pic_init_qs = 0;
1026
1027
    /* The intent is to not signal qp from pps. Rather send the same in slice
1028
     * headers */
1029
11.8k
    ps_pps->i1_chroma_qp_index_offset = 0;
1030
1031
    /* deblocking filter flags present in slice header */
1032
11.8k
    ps_pps->i1_deblocking_filter_control_present_flag = 1;
1033
1034
    /* constrained intra prediction */
1035
11.8k
    ps_pps->i1_constrained_intra_pred_flag =
1036
11.8k
        ps_codec->au4_constrained_intra_pred[u1_spatial_layer_id];
1037
1038
    /* sending redundant slices is not supported for now */
1039
11.8k
    ps_pps->i1_redundant_pic_cnt_present_flag = 0;
1040
1041
11.8k
    ps_pps->u1_slice_group_map_type = 0;
1042
1043
11.8k
    return IH264E_SUCCESS;
1044
11.8k
}
1045
1046
/**
1047
******************************************************************************
1048
*
1049
* @brief Populates slice header structure
1050
*
1051
* @par   Description
1052
*  Populates slice header structure for its use in header generation
1053
*
1054
* @param[in]  ps_proc
1055
*  pointer to proc context
1056
*
1057
* @param[out]  ps_slice_hdr
1058
*  pointer to slice header structure that needs to be populated
1059
*
1060
* @param[in]  ps_pps
1061
*  pointer to pps params structure referred by the slice
1062
*
1063
* @param[in]   ps_sps
1064
*  pointer to sps params referred by the pps
1065
*
1066
* @return      success or failure error code
1067
*
1068
******************************************************************************
1069
*/
1070
WORD32 isvce_populate_slice_header(isvce_process_ctxt_t *ps_proc, slice_header_t *ps_slice_hdr,
1071
                                   pps_t *ps_pps, sps_t *ps_sps, UWORD8 u1_is_idr)
1072
63.0k
{
1073
    /* entropy context */
1074
63.0k
    isvce_entropy_ctxt_t *ps_entropy = &ps_proc->s_entropy;
1075
1076
63.0k
    isvce_codec_t *ps_codec = ps_proc->ps_codec;
1077
1078
63.0k
    if(ps_codec->u4_is_curr_frm_ref)
1079
63.0k
    {
1080
63.0k
        ps_slice_hdr->i1_nal_unit_idc = 3;
1081
63.0k
    }
1082
0
    else
1083
0
    {
1084
0
        ps_slice_hdr->i1_nal_unit_idc = 0;
1085
0
    }
1086
1087
    /* start mb address */
1088
63.0k
    ps_slice_hdr->u2_first_mb_in_slice = ps_entropy->i4_mb_start_add;
1089
1090
    /* slice type */
1091
63.0k
    ps_slice_hdr->u1_slice_type = ps_proc->i4_slice_type;
1092
1093
    /* pic_parameter_set_id */
1094
63.0k
    ps_slice_hdr->u1_pps_id = ps_pps->u1_pps_id;
1095
1096
    /* Separate color plane flag is 0,
1097
     * hence the syntax element color_plane_id not included */
1098
1099
    /* frame num */
1100
63.0k
    ps_slice_hdr->i4_frame_num = ps_proc->i4_frame_num;
1101
1102
    /* frame_mbs_only_flag, no support for interlace encoding */
1103
63.0k
    if(!ps_sps->i1_frame_mbs_only_flag)
1104
0
    {
1105
0
        ps_slice_hdr->i1_field_pic_flag = 0;
1106
1107
0
        if(ps_slice_hdr->i1_field_pic_flag)
1108
0
        {
1109
0
            ps_slice_hdr->i1_bottom_field_flag = 0;
1110
0
        }
1111
0
    }
1112
1113
    /* idr pic id */
1114
63.0k
    if(u1_is_idr)
1115
17.6k
    {
1116
17.6k
        ps_slice_hdr->u2_idr_pic_id = ps_proc->u4_idr_pic_id;
1117
17.6k
        ps_slice_hdr->i1_nal_unit_type = NAL_SLICE_IDR;
1118
17.6k
    }
1119
45.3k
    else
1120
45.3k
    {
1121
45.3k
        ps_slice_hdr->i1_nal_unit_type = NAL_SLICE_NON_IDR;
1122
45.3k
    }
1123
1124
63.0k
    if(ps_proc->u1_spatial_layer_id > 0)
1125
34.0k
    {
1126
34.0k
        ps_slice_hdr->i1_nal_unit_type = NAL_CODED_SLICE_EXTENSION;
1127
34.0k
    }
1128
1129
63.0k
    if(ps_sps->i1_pic_order_cnt_type == 0)
1130
0
    {
1131
0
        WORD32 i4_poc;
1132
0
        i4_poc = ps_codec->i4_poc;
1133
0
        i4_poc %= (1 << ps_sps->i1_log2_max_pic_order_cnt_lsb);
1134
0
        ps_slice_hdr->i4_pic_order_cnt_lsb = i4_poc;
1135
0
    }
1136
    /* TODO add support for poc type 1 */
1137
63.0k
    else if(ps_sps->i1_pic_order_cnt_type == 1)
1138
0
    {
1139
0
    }
1140
1141
    /*
1142
     * redundant slices are not currently supported.
1143
     * Hence the syntax element redundant slice cnt is not initialized
1144
     */
1145
63.0k
    if(ps_pps->i1_redundant_pic_cnt_present_flag)
1146
0
    {
1147
0
    }
1148
1149
    /* direct spatial mv pred flag */
1150
63.0k
    if(ps_proc->i4_slice_type == BSLICE)
1151
0
    {
1152
0
        ps_slice_hdr->u1_direct_spatial_mv_pred_flag = 1;
1153
0
    }
1154
1155
63.0k
    if(ps_proc->i4_slice_type == PSLICE || ps_proc->i4_slice_type == SPSLICE ||
1156
63.0k
       ps_proc->i4_slice_type == BSLICE)
1157
42.7k
    {
1158
        /* num_ref_idx_active_override_flag */
1159
42.7k
        ps_slice_hdr->u1_num_ref_idx_active_override_flag = 0;
1160
1161
42.7k
        if(ps_slice_hdr->u1_num_ref_idx_active_override_flag)
1162
0
        {
1163
            /* num_ref_idx_l0_active_minus1 */
1164
1165
0
            if(ps_proc->i4_slice_type == BSLICE)
1166
0
            {
1167
                /* num_ref_idx_l1_active_minus1 */
1168
0
            }
1169
0
        }
1170
42.7k
    }
1171
1172
    /* ref_pic_list_modification */
1173
63.0k
    if((ps_proc->i4_slice_type != ISLICE) && (ps_proc->i4_slice_type != SISLICE))
1174
42.7k
    {
1175
        /* ref_pic_list_modification_flag_l0 */
1176
42.7k
        ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l0 = 1;
1177
1178
42.7k
        if(ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l0)
1179
42.7k
        {
1180
42.7k
            ps_slice_hdr->s_rplm.i1_modification_of_pic_nums_idc_l0[0] = 0;
1181
42.7k
            ps_slice_hdr->s_rplm.i1_modification_of_pic_nums_idc_l0[1] = 3;
1182
1183
42.7k
            if((ps_codec->i4_frame_num - ps_proc->aps_ref_pic[L0]->i4_frame_num) < 1)
1184
0
            {
1185
0
                return IH264E_FAIL;
1186
0
            }
1187
1188
42.7k
            ps_slice_hdr->s_rplm.u4_abs_diff_pic_num_minus1_l0[0] =
1189
42.7k
                ps_codec->i4_frame_num - ps_proc->aps_ref_pic[L0]->i4_frame_num - 1;
1190
42.7k
        }
1191
42.7k
    }
1192
1193
63.0k
    if(ps_proc->i4_slice_type == BSLICE)
1194
0
    {
1195
        /* ref_pic_list_modification_flag_l1 */
1196
0
        ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l1 = 0;
1197
1198
0
        if(ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l1)
1199
0
        {
1200
0
        }
1201
0
    }
1202
1203
    /* Currently we do not support weighted pred */
1204
    /* ps_slice_hdr->u1_weighted_bipred_idc = 0; */
1205
1206
63.0k
    if((ps_pps->i1_weighted_pred_flag &&
1207
63.0k
        (ps_proc->i4_slice_type == PSLICE || ps_proc->i4_slice_type == SPSLICE)) ||
1208
63.0k
       (ps_proc->i4_slice_type == BSLICE && ps_pps->i1_weighted_bipred_idc == 1))
1209
0
    {
1210
        /* TODO_LATER: Currently there is no support for weighted prediction.
1211
             This needs to be updated when the support is added */
1212
0
    }
1213
1214
63.0k
    if(ps_slice_hdr->i1_nal_unit_idc != 0)
1215
63.0k
    {
1216
63.0k
        if(u1_is_idr)
1217
17.6k
        {
1218
            /* no_output_of_prior_pics_flag  */
1219
17.6k
            ps_slice_hdr->u1_no_output_of_prior_pics_flag = 0;
1220
1221
            /* long_term_reference_flag  */
1222
17.6k
            ps_slice_hdr->u1_long_term_reference_flag = 0;
1223
17.6k
        }
1224
45.3k
        else
1225
45.3k
        {
1226
            /* adaptive_ref_pic_marking_mode_flag  */
1227
45.3k
            ps_slice_hdr->u1_adaptive_ref_pic_marking_mode_flag = 0;
1228
1229
45.3k
            if(ps_slice_hdr->u1_adaptive_ref_pic_marking_mode_flag)
1230
0
            {
1231
                /* TODO: if the reference picture marking mode is adaptive
1232
                     add these fields in the bit-stream */
1233
0
            }
1234
45.3k
        }
1235
63.0k
    }
1236
1237
    /* entropy coding mode flag */
1238
63.0k
    ps_slice_hdr->u1_entropy_coding_mode_flag = ps_entropy->u1_entropy_coding_mode_flag;
1239
1240
63.0k
    if(ps_slice_hdr->u1_entropy_coding_mode_flag && ps_proc->i4_slice_type != ISLICE &&
1241
63.0k
       ps_proc->i4_slice_type != SISLICE)
1242
4.99k
    {
1243
        /* cabac_init_idc */
1244
4.99k
        ps_slice_hdr->i1_cabac_init_idc = CABAC_INIT_IDC;
1245
4.99k
    }
1246
1247
    /* slice qp */
1248
63.0k
    ps_slice_hdr->i1_slice_qp = ps_proc->u1_frame_qp;
1249
1250
63.0k
    if(ps_proc->i4_slice_type == SPSLICE || ps_proc->i4_slice_type == SISLICE)
1251
0
    {
1252
0
        if(ps_proc->i4_slice_type == SPSLICE)
1253
0
        {
1254
            /* sp_for_switch_flag */
1255
0
        }
1256
        /* slice_qs_delta */
1257
0
    }
1258
1259
63.0k
    if(ps_pps->i1_deblocking_filter_control_present_flag)
1260
63.0k
    {
1261
        /* disable_deblocking_filter_idc */
1262
63.0k
        ps_slice_hdr->u1_disable_deblocking_filter_idc = ps_proc->u4_disable_deblock_level;
1263
1264
63.0k
        if(ps_slice_hdr->u1_disable_deblocking_filter_idc != 1)
1265
42.0k
        {
1266
            /* slice_alpha_c0_offset_div2 */
1267
42.0k
            ps_slice_hdr->i1_slice_alpha_c0_offset_div2 = 0;
1268
1269
            /* slice_beta_offset_div2 */
1270
42.0k
            ps_slice_hdr->i1_slice_beta_offset_div2 = 0;
1271
42.0k
        }
1272
63.0k
    }
1273
63.0k
    ps_slice_hdr->u1_num_slice_groups_minus1 = 0;
1274
63.0k
    if(ps_slice_hdr->u1_num_slice_groups_minus1 > 0 && ps_pps->u1_slice_group_map_type >= 3 &&
1275
63.0k
       ps_pps->u1_slice_group_map_type <= 5)
1276
0
    {
1277
        /* slice_group_change_cycle */
1278
        /* TODO_LATER: Currently the number of slice groups minus 1 is 0.
1279
         * If this is not the case, we have to add Slice group map type to the bit
1280
         * stream */
1281
0
    }
1282
1283
63.0k
    ps_slice_hdr->i1_cabac_init_idc = CABAC_INIT_IDC;
1284
1285
63.0k
    return IH264E_SUCCESS;
1286
63.0k
}
1287
1288
/**
1289
******************************************************************************
1290
*
1291
* @brief Populates svc_nalu_ext structure
1292
*
1293
* @par   Description
1294
*  Populates svc_nalu_ext structure for its use in header generation
1295
*
1296
* @param[in]  ps_proc
1297
*  pointer to proc context
1298
*
1299
* @param[out]  ps_slice_hdr
1300
*  pointer to slice header structure that needs to be populated
1301
*
1302
* @param[in]  ps_pps
1303
*  pointer to pps params structure referred by the slice
1304
*
1305
* @param[in]   ps_sps
1306
*  pointer to sps params referred by the pps
1307
*
1308
* @return      success or failure error code
1309
*
1310
******************************************************************************
1311
*/
1312
WORD32 isvce_populate_svc_nalu_extension(isvce_process_ctxt_t *ps_proc,
1313
                                         svc_nalu_ext_t *ps_svc_nalu_ext, NAL_UNIT_TYPE_T nalu_type,
1314
                                         UWORD8 u1_idr_flag)
1315
97.1k
{
1316
97.1k
    isvce_codec_t *ps_codec = ps_proc->ps_codec;
1317
1318
97.1k
    ps_svc_nalu_ext->u1_idr_flag = u1_idr_flag;
1319
1320
97.1k
    ps_svc_nalu_ext->u1_priority_id = 0;
1321
1322
97.1k
    ps_svc_nalu_ext->u1_no_inter_layer_pred_flag = ((nalu_type == NAL_PREFIX) ? 1 : 0);
1323
1324
97.1k
    ps_svc_nalu_ext->u1_dependency_id =
1325
97.1k
        ((nalu_type == NAL_PREFIX) ? 0 : ps_proc->u1_spatial_layer_id);
1326
1327
97.1k
    ps_svc_nalu_ext->u1_temporal_id = ps_proc->ps_cur_pic->i1_temporal_id;
1328
1329
97.1k
    ps_svc_nalu_ext->u1_quality_id = 0;
1330
1331
97.1k
    ps_svc_nalu_ext->u1_use_ref_base_pic_flag = 0;
1332
1333
97.1k
    ps_svc_nalu_ext->u1_discardable_flag = 0;
1334
1335
97.1k
    ps_svc_nalu_ext->u1_output_flag = 1;
1336
1337
97.1k
    ps_svc_nalu_ext->u1_reserved_three_2bits = 3;
1338
1339
97.1k
    ps_svc_nalu_ext->s_nalu_header.u1_nal_ref_idc = ps_codec->u4_is_curr_frm_ref ? 3 : 0;
1340
1341
97.1k
    ps_svc_nalu_ext->s_nalu_header.u1_nal_unit_type = nalu_type;
1342
1343
97.1k
    return IH264E_SUCCESS;
1344
97.1k
}
1345
1346
WORD32 isvce_populate_subset_sps(isvce_codec_t *ps_codec, subset_sps_t *ps_subset_sps,
1347
                                 UWORD8 u1_sps_id, isvce_inp_buf_t *ps_inp_buf,
1348
                                 UWORD8 u1_spatial_layer_id)
1349
6.72k
{
1350
6.72k
    sps_t *ps_sps = &ps_subset_sps->s_sps;
1351
1352
6.72k
    isvce_populate_sps(ps_codec, ps_sps, u1_sps_id, IH264_SCALABLE_BASELINE, ps_inp_buf,
1353
6.72k
                       u1_spatial_layer_id);
1354
1355
6.72k
    ps_subset_sps->s_sps_svc_ext.u1_inter_layer_deblocking_filter_control_present_flag = 1;
1356
1357
6.72k
    ps_subset_sps->s_sps_svc_ext.i1_slice_header_restriction_flag = 1;
1358
1359
6.72k
    ps_subset_sps->s_sps_svc_ext.u1_extended_spatial_scalability_idc = 0;
1360
1361
6.72k
    ps_subset_sps->s_sps_svc_ext.i1_seq_tcoeff_level_prediction_flag = 0;
1362
1363
6.72k
    ps_subset_sps->i1_svc_vui_parameters_present_flag = 0;
1364
1365
6.72k
    ps_subset_sps->i1_additional_extension2_flag = 0;
1366
1367
6.72k
    ps_subset_sps->s_sps_svc_ext.u1_chroma_phase_x_plus1 = 1;
1368
1369
6.72k
    ps_subset_sps->s_sps_svc_ext.u1_chroma_phase_y_plus1 = 1;
1370
1371
6.72k
    ps_subset_sps->s_sps_svc_ext.i1_adaptive_tcoeff_level_prediction_flag = 0;
1372
1373
6.72k
    return IH264E_SUCCESS;
1374
6.72k
}
1375
1376
WORD32 isvce_populate_svc_slice(isvce_process_ctxt_t *ps_proc, svc_slice_header_t *ps_svc_slice_hdr,
1377
                                pps_t *ps_pps, subset_sps_t *ps_subset_sps,
1378
                                svc_nalu_ext_t *ps_svc_nalu_ext)
1379
34.0k
{
1380
34.0k
    WORD32 i4_return_status;
1381
1382
34.0k
    i4_return_status =
1383
34.0k
        isvce_populate_slice_header(ps_proc, &ps_svc_slice_hdr->s_slice_header, ps_pps,
1384
34.0k
                                    &ps_subset_sps->s_sps, ps_svc_nalu_ext->u1_idr_flag);
1385
1386
34.0k
    if(IH264E_SUCCESS != i4_return_status)
1387
0
    {
1388
0
        return IH264E_FAIL;
1389
0
    }
1390
1391
34.0k
    ps_svc_slice_hdr->i1_slice_skip_flag = 0;
1392
34.0k
    ps_svc_slice_hdr->i1_adaptive_residual_prediction_flag = ENABLE_RESIDUAL_PREDICTION;
1393
34.0k
    ps_svc_slice_hdr->i1_default_residual_prediction_flag = 0;
1394
34.0k
    ps_svc_slice_hdr->i1_adaptive_base_mode_flag = ENABLE_ILP_MV || ENABLE_IBL_MODE;
1395
34.0k
    ps_svc_slice_hdr->i1_default_base_mode_flag = 0;
1396
34.0k
    ps_svc_slice_hdr->i1_tcoeff_level_prediction_flag = 0;
1397
34.0k
    ps_svc_slice_hdr->i1_constrained_intra_resampling_flag = 0;
1398
34.0k
    ps_svc_slice_hdr->i1_adaptive_motion_prediction_flag = USE_ILP_MV_AS_MVP;
1399
34.0k
    ps_svc_slice_hdr->i1_default_motion_prediction_flag = 0;
1400
34.0k
    ps_svc_slice_hdr->u4_disable_inter_layer_deblocking_filter_idc =
1401
34.0k
        !ENABLE_INTRA_BASE_DEBLOCK || ps_proc->u4_disable_deblock_level;
1402
1403
34.0k
    if(ps_svc_slice_hdr->u4_disable_inter_layer_deblocking_filter_idc != 1)
1404
0
    {
1405
        /* slice_alpha_c0_offset_div2 */
1406
0
        ps_svc_slice_hdr->i4_inter_layer_slice_alpha_c0_offset_div2 = 0;
1407
1408
        /* slice_beta_offset_div2 */
1409
0
        ps_svc_slice_hdr->i4_inter_layer_slice_beta_offset_div2 = 0;
1410
0
    }
1411
1412
34.0k
    if((ps_svc_nalu_ext->u1_quality_id == 0) && (ps_svc_nalu_ext->u1_no_inter_layer_pred_flag == 0))
1413
34.0k
    {
1414
34.0k
        ps_svc_slice_hdr->u4_ref_layer_dq_id = (ps_proc->u1_spatial_layer_id - 1) << 4;
1415
34.0k
    }
1416
1417
34.0k
    return IH264E_SUCCESS;
1418
34.0k
}
1419
1420
/**
1421
******************************************************************************
1422
*
1423
* @brief Signals prefix_nal_unit_rbsp
1424
*
1425
* @par   Description
1426
*  prefix_nal_unit_rbsp as per Section G.7.3.2.12
1427
*
1428
* @param[inout]   ps_bitstrm
1429
*  pointer to bitstream context for generating slice header
1430
*
1431
* @param[in]    svc_nalu_ext
1432
*  pointer to svc NAL unit structure
1433
*
1434
* @param[in]    ps_slice_header
1435
*  pointer to slice header
1436
*
1437
* @return      success or failure error code
1438
*
1439
******************************************************************************
1440
*/
1441
WORD32 isvce_generate_prefix_nal(bitstrm_t *ps_bitstrm, svc_nalu_ext_t *ps_svc_nalu_ext,
1442
                                 slice_header_t *ps_slice_header, UWORD8 u1_max_num_ref_frames,
1443
                                 UWORD8 u1_num_spatial_layers)
1444
25.6k
{
1445
25.6k
    WORD32 return_status = IH264E_SUCCESS;
1446
1447
25.6k
    WORD32 i4_store_ref_base_pic_flag = 0;
1448
25.6k
    WORD32 i4_additional_prefix_nal_unit_extension_flag = 0;
1449
1450
25.6k
    if(ps_svc_nalu_ext->u1_dependency_id == (u1_num_spatial_layers - 1))
1451
3.50k
    {
1452
3.50k
        i4_store_ref_base_pic_flag = 1;
1453
3.50k
        if(u1_max_num_ref_frames < 2)
1454
79
        {
1455
79
            i4_store_ref_base_pic_flag = 0;
1456
79
        }
1457
3.50k
    }
1458
1459
    /* store_ref_base_pic_flag */
1460
25.6k
    if(ps_svc_nalu_ext->s_nalu_header.u1_nal_ref_idc != 0)
1461
25.6k
    {
1462
25.6k
        PUT_BITS(ps_bitstrm, i4_store_ref_base_pic_flag, 1, return_status,
1463
25.6k
                 "store_ref_base_pic_flag");
1464
1465
25.6k
        if((ps_svc_nalu_ext->u1_use_ref_base_pic_flag || i4_store_ref_base_pic_flag) &&
1466
25.6k
           !ps_svc_nalu_ext->u1_idr_flag)
1467
2.23k
        {
1468
2.23k
            PUT_BITS(ps_bitstrm, ps_slice_header->u1_adaptive_ref_pic_marking_mode_flag, 1,
1469
2.23k
                     return_status, "DPRM: adaptive_ref_base_pic_marking_mode_flag");
1470
2.23k
        }
1471
1472
25.6k
        PUT_BITS(ps_bitstrm, i4_additional_prefix_nal_unit_extension_flag, 1, return_status,
1473
25.6k
                 "additional_prefix_nal_unit_extension_flag");
1474
25.6k
    }
1475
1476
    /* rbsp trailing bits */
1477
25.6k
    return_status = ih264e_put_rbsp_trailing_bits(ps_bitstrm);
1478
1479
25.6k
    return return_status;
1480
25.6k
}
1481
1482
WORD32 isvce_generate_slice_header_svc(bitstrm_t *ps_bitstrm, pps_t *ps_pps,
1483
                                       svc_nalu_ext_t *ps_svc_nalu_ext,
1484
                                       svc_slice_header_t *ps_svc_slice_hdr,
1485
                                       subset_sps_t *ps_subset_sps)
1486
34.0k
{
1487
34.0k
    WORD32 return_status = IH264E_SUCCESS;
1488
1489
34.0k
    UWORD8 u1_slice_type;
1490
34.0k
    sps_t *ps_sps = &ps_subset_sps->s_sps;
1491
34.0k
    slice_header_t *ps_slice_hdr = &ps_svc_slice_hdr->s_slice_header;
1492
1493
    /* first_mb_in_slice */
1494
34.0k
    PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u2_first_mb_in_slice, return_status,
1495
34.0k
                 "SH: first_mb_in_slice");
1496
1497
    /* slice_type */
1498
34.0k
    PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u1_slice_type, return_status, "SH: slice_type");
1499
1500
    /* pic_parameter_set_id */
1501
34.0k
    PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u1_pps_id, return_status, "SH: pic_parameter_set_id");
1502
1503
    /* frame_num */
1504
34.0k
    PUT_BITS(ps_bitstrm, ps_slice_hdr->i4_frame_num, ps_sps->i1_log2_max_frame_num, return_status,
1505
34.0k
             "SH: frame_num");
1506
1507
34.0k
    if(!ps_sps->i1_frame_mbs_only_flag)
1508
0
    {
1509
        /* field_pic_flag */
1510
0
        PUT_BITS(ps_bitstrm, ps_slice_hdr->i1_field_pic_flag, 1, return_status,
1511
0
                 "SH: field_pic_flag");
1512
1513
0
        if(ps_slice_hdr->i1_field_pic_flag)
1514
0
        {
1515
            /* bottom_field_flag */
1516
0
            PUT_BITS(ps_bitstrm, ps_slice_hdr->i1_bottom_field_flag, 1, return_status,
1517
0
                     "SH: bottom_field_flag");
1518
0
        }
1519
0
    }
1520
1521
34.0k
    if(ps_svc_nalu_ext->u1_idr_flag == 1)
1522
9.56k
    {
1523
        /* u2_idr_pic_id */
1524
9.56k
        PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u2_idr_pic_id, return_status, "SH: idr_pic_id");
1525
9.56k
    }
1526
1527
34.0k
    if(ps_sps->i1_pic_order_cnt_type == 0)
1528
0
    {
1529
        /* pic_order_cnt_lsb */
1530
0
        PUT_BITS(ps_bitstrm, ps_slice_hdr->i4_pic_order_cnt_lsb,
1531
0
                 ps_sps->i1_log2_max_pic_order_cnt_lsb, return_status, "SH: pic_order_cnt_lsb");
1532
1533
0
        if(ps_pps->u1_pic_order_present_flag && !ps_slice_hdr->i1_field_pic_flag)
1534
0
        {
1535
            /* delta_pic_order_cnt_bottom */
1536
0
            PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->i4_delta_pic_order_cnt_bottom, return_status,
1537
0
                         "SH: delta_pic_order_cnt_bottom");
1538
0
        }
1539
0
    }
1540
1541
34.0k
    if(ps_sps->i1_pic_order_cnt_type == 1 && !ps_sps->i1_delta_pic_order_always_zero_flag)
1542
0
    {
1543
        /* delta_pic_order_cnt[0] */
1544
0
        PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->ai4_delta_pic_order_cnt[0], return_status,
1545
0
                     "SH: delta_pic_order_cnt[0]");
1546
1547
0
        if(ps_pps->u1_pic_order_present_flag && !ps_slice_hdr->i1_field_pic_flag)
1548
0
        {
1549
            /* delta_pic_order_cnt[1] */
1550
0
            PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->ai4_delta_pic_order_cnt[1], return_status,
1551
0
                         "SH: delta_pic_order_cnt[1]");
1552
0
        }
1553
0
    }
1554
1555
34.0k
    if(ps_pps->i1_redundant_pic_cnt_present_flag)
1556
0
    {
1557
        /* redundant_pic_cnt */
1558
0
        PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u1_redundant_pic_cnt, return_status,
1559
0
                     "SH: redundant_pic_cnt");
1560
0
    }
1561
1562
34.0k
    u1_slice_type = ps_slice_hdr->u1_slice_type % EPSLICE;
1563
1564
34.0k
    if(ps_svc_nalu_ext->u1_quality_id == 0)
1565
34.0k
    {
1566
34.0k
        if(u1_slice_type == BSLICE)
1567
0
        {
1568
            /* direct_spatial_mv_pred_flag */
1569
0
            PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_direct_spatial_mv_pred_flag, 1, return_status,
1570
0
                     "SH: direct_spatial_mv_pred_flag");
1571
0
        }
1572
1573
34.0k
        if(u1_slice_type == PSLICE || u1_slice_type == BSLICE)
1574
23.3k
        {
1575
            /* num_ref_idx_active_override_flag */
1576
23.3k
            PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_num_ref_idx_active_override_flag, 1,
1577
23.3k
                     return_status, "SH: num_ref_idx_active_override_flag");
1578
1579
23.3k
            if(ps_slice_hdr->u1_num_ref_idx_active_override_flag)
1580
0
            {
1581
                /* num_ref_idx_l0_active_minus1 */
1582
0
                PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->i1_num_ref_idx_l0_active - 1, return_status,
1583
0
                             "SH: num_ref_idx_l0_active_minus1");
1584
1585
0
                if(u1_slice_type == BSLICE)
1586
0
                {
1587
                    /* num_ref_idx_l1_active_minus1 */
1588
0
                    PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->i1_num_ref_idx_l1_active - 1,
1589
0
                                 return_status, "SH: num_ref_idx_l1_active_minus1");
1590
0
                }
1591
0
            }
1592
23.3k
        }
1593
1594
        /* ref_pic_list_modification */
1595
34.0k
        if((u1_slice_type != ISLICE) && (u1_slice_type != SISLICE))
1596
23.3k
        {
1597
            /* ref_pic_list_modification_flag_l0 */
1598
23.3k
            PUT_BITS(ps_bitstrm, ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l0, 1,
1599
23.3k
                     return_status, "RPLR: ref_pic_list_reordering_flag");
1600
1601
23.3k
            if(ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l0)
1602
23.3k
            {
1603
23.3k
                UWORD8 i = 0;
1604
1605
23.3k
                WORD8 *pi1_modification_of_pic_nums_idc_l0 =
1606
23.3k
                    ps_slice_hdr->s_rplm.i1_modification_of_pic_nums_idc_l0;
1607
23.3k
                UWORD32 *pu4_abs_diff_pic_num_minus1_l0 =
1608
23.3k
                    ps_slice_hdr->s_rplm.u4_abs_diff_pic_num_minus1_l0;
1609
23.3k
                UWORD8 *pu1_long_term_pic_num_l0 = ps_slice_hdr->s_rplm.u1_long_term_pic_num_l0;
1610
1611
23.3k
                do
1612
46.7k
                {
1613
                    /* modification_of_pic_nums_idc */
1614
46.7k
                    PUT_BITS_UEV(ps_bitstrm, pi1_modification_of_pic_nums_idc_l0[i], return_status,
1615
46.7k
                                 "RPLR: reordering_of_pic_nums_idc");
1616
1617
46.7k
                    if((0 == pi1_modification_of_pic_nums_idc_l0[i]) ||
1618
46.7k
                       (1 == pi1_modification_of_pic_nums_idc_l0[i]))
1619
23.3k
                    {
1620
                        /* abs_diff_pic_num_minus1 */
1621
23.3k
                        PUT_BITS_UEV(ps_bitstrm, pu4_abs_diff_pic_num_minus1_l0[0], return_status,
1622
23.3k
                                     "RPLR: abs_diff_pic_num_minus1");
1623
1624
23.3k
                        pu4_abs_diff_pic_num_minus1_l0++;
1625
23.3k
                    }
1626
23.3k
                    else if(2 == pi1_modification_of_pic_nums_idc_l0[i])
1627
0
                    {
1628
                        /* long_term_pic_num */
1629
0
                        PUT_BITS_UEV(ps_bitstrm, pu1_long_term_pic_num_l0[0], return_status,
1630
0
                                     "RPLR: long_term_pic_num");
1631
1632
0
                        pu1_long_term_pic_num_l0++;
1633
0
                    }
1634
46.7k
                } while(pi1_modification_of_pic_nums_idc_l0[i++] != 3);
1635
23.3k
            }
1636
23.3k
        }
1637
1638
34.0k
        if(u1_slice_type == BSLICE)
1639
0
        {
1640
            /* ref_pic_list_modification_flag_l1 */
1641
0
            PUT_BITS(ps_bitstrm, ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l1, 1,
1642
0
                     return_status, "SH: ref_pic_list_modification_flag_l1");
1643
1644
0
            if(ps_slice_hdr->s_rplm.i1_ref_pic_list_modification_flag_l1)
1645
0
            {
1646
0
                UWORD8 i = 0;
1647
1648
0
                WORD8 *pi1_modification_of_pic_nums_idc_l1 =
1649
0
                    ps_slice_hdr->s_rplm.i1_modification_of_pic_nums_idc_l1;
1650
0
                UWORD32 *pu4_abs_diff_pic_num_minus1_l1 =
1651
0
                    ps_slice_hdr->s_rplm.u4_abs_diff_pic_num_minus1_l1;
1652
0
                UWORD8 *pu1_long_term_pic_num_l1 = ps_slice_hdr->s_rplm.u1_long_term_pic_num_l1;
1653
1654
0
                do
1655
0
                {
1656
                    /* modification_of_pic_nums_idc */
1657
0
                    PUT_BITS_UEV(ps_bitstrm, pi1_modification_of_pic_nums_idc_l1[i], return_status,
1658
0
                                 "SH: modification_of_pic_nums_idc");
1659
1660
0
                    if((0 == pi1_modification_of_pic_nums_idc_l1[i]) ||
1661
0
                       (1 == pi1_modification_of_pic_nums_idc_l1[i]))
1662
0
                    {
1663
                        /* abs_diff_pic_num_minus1 */
1664
0
                        PUT_BITS_UEV(ps_bitstrm, pu4_abs_diff_pic_num_minus1_l1[0], return_status,
1665
0
                                     "SH: abs_diff_pic_num_minus1");
1666
1667
0
                        pu4_abs_diff_pic_num_minus1_l1++;
1668
0
                    }
1669
0
                    else if(2 == pi1_modification_of_pic_nums_idc_l1[i])
1670
0
                    {
1671
                        /* long_term_pic_num */
1672
0
                        PUT_BITS_UEV(ps_bitstrm, pu1_long_term_pic_num_l1[0], return_status,
1673
0
                                     "SH: abs_diff_pic_num_minus1");
1674
1675
0
                        pu1_long_term_pic_num_l1++;
1676
0
                    }
1677
0
                } while(pi1_modification_of_pic_nums_idc_l1[i++] != 3);
1678
0
            }
1679
0
        }
1680
1681
34.0k
        if((ps_pps->i1_weighted_pred_flag && u1_slice_type == PSLICE) ||
1682
34.0k
           (u1_slice_type == BSLICE && ps_pps->i1_weighted_bipred_idc == 1))
1683
0
        {
1684
            /* TODO_LATER: Currently there is no support for weighted prediction.
1685
             This needs to be updated when the support is added */
1686
0
        }
1687
1688
34.0k
        if(ps_slice_hdr->i1_nal_unit_idc != 0)
1689
34.0k
        {
1690
34.0k
            if(ps_svc_nalu_ext->u1_idr_flag)
1691
9.56k
            {
1692
                /* no_output_of_prior_pics_flag  */
1693
9.56k
                PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_no_output_of_prior_pics_flag, 1,
1694
9.56k
                         return_status, "DRPM: no_output_of_prior_pics_flag ");
1695
1696
                /* long_term_reference_flag  */
1697
9.56k
                PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_long_term_reference_flag, 1, return_status,
1698
9.56k
                         "DRPM: long_term_reference_flag ");
1699
9.56k
            }
1700
24.5k
            else
1701
24.5k
            {
1702
                /* adaptive_ref_pic_marking_mode_flag  */
1703
24.5k
                PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_adaptive_ref_pic_marking_mode_flag, 1,
1704
24.5k
                         return_status, "DPRM: adaptive_ref_pic_marking_mode_flag ");
1705
1706
24.5k
                if(ps_slice_hdr->u1_adaptive_ref_pic_marking_mode_flag)
1707
0
                {
1708
                    /* TODO: if the reference picture marking mode is adaptive
1709
                     add these fields in the bit-stream */
1710
0
                }
1711
24.5k
            }
1712
34.0k
            if(ps_subset_sps->s_sps_svc_ext.i1_slice_header_restriction_flag == 0)
1713
0
            {
1714
0
                WORD32 i4_store_ref_base_pic_flag = 0;
1715
1716
0
                if(ps_sps->u1_max_num_ref_frames >= 2)
1717
0
                {
1718
0
                    i4_store_ref_base_pic_flag = 1;
1719
0
                }
1720
1721
                /* store_ref_base_pic_flag */
1722
0
                PUT_BITS(ps_bitstrm, i4_store_ref_base_pic_flag, 1, return_status,
1723
0
                         "SH: store_ref_base_pic_flag");
1724
1725
0
                if((ps_svc_nalu_ext->u1_use_ref_base_pic_flag || i4_store_ref_base_pic_flag) &&
1726
0
                   (!ps_svc_nalu_ext->u1_idr_flag))
1727
0
                {
1728
0
                    PUT_BITS(ps_bitstrm, ps_slice_hdr->u1_adaptive_ref_pic_marking_mode_flag, 1,
1729
0
                             return_status, "SH: adaptive_ref_base_pic_marking_mode_flag");
1730
0
                }
1731
0
            }
1732
34.0k
        }
1733
34.0k
    }
1734
1735
34.0k
    if(ps_slice_hdr->u1_entropy_coding_mode_flag && u1_slice_type != ISLICE)
1736
2.40k
    {
1737
        /* cabac_init_idc */
1738
2.40k
        PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->i1_cabac_init_idc, return_status,
1739
2.40k
                     "SH: cabac_init_idc");
1740
2.40k
    }
1741
1742
    /* slice_qp_delta */
1743
34.0k
    PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->i1_slice_qp - ps_pps->i1_pic_init_qp, return_status,
1744
34.0k
                 "SH: slice_qp_delta");
1745
1746
34.0k
    if(ps_pps->i1_deblocking_filter_control_present_flag)
1747
34.0k
    {
1748
        /* disable_deblocking_filter_idc */
1749
34.0k
        PUT_BITS_UEV(ps_bitstrm, ps_slice_hdr->u1_disable_deblocking_filter_idc, return_status,
1750
34.0k
                     "SH: disable_deblocking_filter_idc");
1751
1752
34.0k
        if(ps_slice_hdr->u1_disable_deblocking_filter_idc != 1)
1753
23.2k
        {
1754
            /* slice_alpha_c0_offset_div2 */
1755
23.2k
            PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->i1_slice_alpha_c0_offset_div2, return_status,
1756
23.2k
                         "SH: slice_alpha_c0_offset_div2");
1757
1758
            /* slice_beta_offset_div2 */
1759
23.2k
            PUT_BITS_SEV(ps_bitstrm, ps_slice_hdr->i1_slice_beta_offset_div2, return_status,
1760
23.2k
                         "SH: slice_beta_offset_div2");
1761
23.2k
        }
1762
34.0k
    }
1763
1764
34.0k
    if(ps_slice_hdr->u1_num_slice_groups_minus1 > 0 && ps_pps->u1_slice_group_map_type >= 3 &&
1765
34.0k
       ps_pps->u1_slice_group_map_type <= 5)
1766
0
    {
1767
        /* slice_group_change_cycle */
1768
        /* TODO_LATER: Currently the number of slice groups minus 1 is 0.
1769
         * If this is not the case, we have to add Slice group map type to the bit
1770
         * stream */
1771
0
    }
1772
1773
34.0k
    if((ps_svc_nalu_ext->u1_no_inter_layer_pred_flag == 0) && (ps_svc_nalu_ext->u1_quality_id == 0))
1774
34.0k
    {
1775
34.0k
        PUT_BITS_UEV(ps_bitstrm, ps_svc_slice_hdr->u4_ref_layer_dq_id, return_status,
1776
34.0k
                     "SH: ref_layer_dq_id");
1777
34.0k
        if(ps_subset_sps->s_sps_svc_ext.u1_inter_layer_deblocking_filter_control_present_flag)
1778
34.0k
        {
1779
34.0k
            PUT_BITS_UEV(ps_bitstrm, ps_svc_slice_hdr->u4_disable_inter_layer_deblocking_filter_idc,
1780
34.0k
                         return_status, "SH: disable_inter_layer_deblocking_filter_idc");
1781
34.0k
            if(ps_svc_slice_hdr->u4_disable_inter_layer_deblocking_filter_idc != 1)
1782
0
            {
1783
0
                PUT_BITS_SEV(ps_bitstrm,
1784
0
                             ps_svc_slice_hdr->i4_inter_layer_slice_alpha_c0_offset_div2,
1785
0
                             return_status, "SH: inter_layer_slice_alpha_c0_offset_div2");
1786
0
                PUT_BITS_SEV(ps_bitstrm, ps_svc_slice_hdr->i4_inter_layer_slice_beta_offset_div2,
1787
0
                             return_status, "SH: inter_layer_slice_beta_offset_div2");
1788
0
            }
1789
34.0k
        }
1790
34.0k
        PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->i1_constrained_intra_resampling_flag, 1,
1791
34.0k
                 return_status, "SH: constrained_intra_resampling_flag");
1792
34.0k
        if(ps_subset_sps->s_sps_svc_ext.u1_extended_spatial_scalability_idc == 2)
1793
0
        {
1794
0
            if(ps_sps->u1_chroma_format_idc > 0)
1795
0
            {
1796
0
                PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->i1_ref_layer_chroma_phase_x_plus1_flag, 1,
1797
0
                         return_status, "SH: ref_layer_chroma_phase_x_plus1_flag");
1798
0
                PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->i1_ref_layer_chroma_phase_y_plus1, 2,
1799
0
                         return_status, "SH: ref_layer_chroma_phase_y_plus1");
1800
0
            }
1801
0
            PUT_BITS_SEV(ps_bitstrm, ps_svc_slice_hdr->i4_scaled_ref_layer_left, return_status,
1802
0
                         "SH: scaled_ref_layer_left_offset");
1803
0
            PUT_BITS_SEV(ps_bitstrm, ps_svc_slice_hdr->i4_scaled_ref_layer_top, return_status,
1804
0
                         "SH: scaled_ref_layer_top_offset");
1805
0
            PUT_BITS_SEV(ps_bitstrm, ps_svc_slice_hdr->i4_scaled_ref_layer_right, return_status,
1806
0
                         "SH: scaled_ref_layer_right_offset");
1807
0
            PUT_BITS_SEV(ps_bitstrm, ps_svc_slice_hdr->i4_scaled_ref_layer_bottom, return_status,
1808
0
                         "SH: scaled_ref_layer_bottom_offset");
1809
0
        }
1810
34.0k
    }
1811
1812
34.0k
    if(!ps_svc_nalu_ext->u1_no_inter_layer_pred_flag)
1813
34.0k
    {
1814
34.0k
        PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->i1_slice_skip_flag, 1, return_status,
1815
34.0k
                 "SH: slice_skip_flag");
1816
34.0k
        if(ps_svc_slice_hdr->i1_slice_skip_flag)
1817
0
        {
1818
0
            PUT_BITS_UEV(ps_bitstrm, ps_svc_slice_hdr->u4_num_mbs_in_slice_minus1, return_status,
1819
0
                         "SH: num_mbs_in_slice_minus1");
1820
0
        }
1821
34.0k
        else
1822
34.0k
        {
1823
34.0k
            PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->i1_adaptive_base_mode_flag, 1, return_status,
1824
34.0k
                     "SH: adaptive_base_mode_flag");
1825
34.0k
            if(!ps_svc_slice_hdr->i1_adaptive_base_mode_flag)
1826
0
                PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->i1_default_base_mode_flag, 1, return_status,
1827
34.0k
                         "SH: default_base_mode_flag");
1828
1829
34.0k
            if(!ps_svc_slice_hdr->i1_default_base_mode_flag)
1830
34.0k
            {
1831
34.0k
                PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->i1_adaptive_motion_prediction_flag, 1,
1832
34.0k
                         return_status, "SH: adaptive_motion_prediction_flag");
1833
34.0k
                if(!ps_svc_slice_hdr->i1_adaptive_motion_prediction_flag)
1834
0
                    PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->i1_default_motion_prediction_flag, 1,
1835
34.0k
                             return_status, "SH: default_motion_prediction_flag");
1836
34.0k
            }
1837
34.0k
            PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->i1_adaptive_residual_prediction_flag, 1,
1838
34.0k
                     return_status, "SH: adaptive_residual_prediction_flag");
1839
34.0k
            if(!ps_svc_slice_hdr->i1_adaptive_residual_prediction_flag)
1840
0
                PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->i1_default_residual_prediction_flag, 1,
1841
34.0k
                         return_status, "SH: default_residual_prediction_flag");
1842
34.0k
        }
1843
1844
34.0k
        if(ps_subset_sps->s_sps_svc_ext.i1_adaptive_tcoeff_level_prediction_flag)
1845
0
        {
1846
0
            PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->i1_tcoeff_level_prediction_flag, 1,
1847
0
                     return_status, "SH: tcoeff_level_prediction_flag");
1848
0
        }
1849
34.0k
    }
1850
1851
34.0k
    if(!ps_subset_sps->s_sps_svc_ext.i1_slice_header_restriction_flag &&
1852
34.0k
       !ps_svc_slice_hdr->i1_slice_skip_flag)
1853
0
    {
1854
0
        PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->u4_scan_idx_start, 4, return_status,
1855
0
                 "SH: scan_idx_start");
1856
0
        PUT_BITS(ps_bitstrm, ps_svc_slice_hdr->u4_scan_idx_end, 4, return_status,
1857
0
                 "SH: scan_idx_end");
1858
0
    }
1859
1860
34.0k
    return return_status;
1861
34.0k
}
1862
1863
WORD32 isvce_seq_parameter_set_svc_extension(bitstrm_t *ps_bitstrm, subset_sps_t *ps_sub_sps,
1864
                                             UWORD8 u1_chroma_format_idc)
1865
6.72k
{
1866
6.72k
    WORD32 return_status = IH264E_SUCCESS;
1867
1868
    /* inter_layer_deblocking_filter_control_present_flag */
1869
6.72k
    PUT_BITS(ps_bitstrm,
1870
6.72k
             ps_sub_sps->s_sps_svc_ext.u1_inter_layer_deblocking_filter_control_present_flag, 1,
1871
6.72k
             return_status, "SPS: inter_layer_deblocking_filter_control_present_flag");
1872
1873
    /* extended_spatial_scalability */
1874
6.72k
    PUT_BITS(ps_bitstrm, ps_sub_sps->s_sps_svc_ext.u1_extended_spatial_scalability_idc, 2,
1875
6.72k
             return_status, "SPS: extended_spatial_scalability");
1876
1877
6.72k
    if(u1_chroma_format_idc == 1 || u1_chroma_format_idc == 2)
1878
6.72k
    {
1879
        /* chroma_phase_x_plus1_flag */
1880
6.72k
        PUT_BITS(ps_bitstrm, ps_sub_sps->s_sps_svc_ext.u1_chroma_phase_x_plus1, 1, return_status,
1881
6.72k
                 "SPS: chroma_phase_x_plus1_flag");
1882
6.72k
    }
1883
1884
6.72k
    if(u1_chroma_format_idc == 1)
1885
6.72k
    {
1886
        /* chroma_phase_y_plus1 */
1887
6.72k
        PUT_BITS(ps_bitstrm, ps_sub_sps->s_sps_svc_ext.u1_chroma_phase_y_plus1, 2, return_status,
1888
6.72k
                 "SPS: chroma_phase_y_plus1");
1889
6.72k
    }
1890
1891
6.72k
    if(ps_sub_sps->s_sps_svc_ext.u1_extended_spatial_scalability_idc == 1)
1892
0
    {
1893
0
        if(u1_chroma_format_idc > 0)
1894
0
        {
1895
            /* seq_ref_layer_chroma_phase_x_plus1_flag */
1896
0
            PUT_BITS(ps_bitstrm,
1897
0
                     ps_sub_sps->s_sps_svc_ext.u1_seq_ref_layer_chroma_phase_x_plus1_flag, 1,
1898
0
                     return_status, "SPS: seq_ref_layer_chroma_phase_x_plus1_flag");
1899
1900
            /* seq_ref_layer_chroma_phase_y_plus1 */
1901
0
            PUT_BITS(ps_bitstrm, ps_sub_sps->s_sps_svc_ext.u1_seq_ref_layer_chroma_phase_y_plus1, 2,
1902
0
                     return_status, "SPS: seq_ref_layer_chroma_phase_y_plus1");
1903
0
        }
1904
        /* seq_scaled_ref_layer_left_offset */
1905
0
        PUT_BITS_SEV(ps_bitstrm, ps_sub_sps->s_sps_svc_ext.i4_seq_scaled_ref_layer_left_offset,
1906
0
                     return_status, "SPS: seq_scaled_ref_layer_left_offset");
1907
1908
        /* seq_scaled_ref_layer_top_offset */
1909
0
        PUT_BITS_SEV(ps_bitstrm, ps_sub_sps->s_sps_svc_ext.i4_seq_scaled_ref_layer_top_offset,
1910
0
                     return_status, "SPS: seq_scaled_ref_layer_top_offset");
1911
1912
        /* seq_scaled_ref_layer_right_offset */
1913
0
        PUT_BITS_SEV(ps_bitstrm, ps_sub_sps->s_sps_svc_ext.i4_seq_scaled_ref_layer_right_offset,
1914
0
                     return_status, "SPS: seq_scaled_ref_layer_right_offset");
1915
1916
        /* seq_scaled_ref_layer_bottom_offset */
1917
0
        PUT_BITS_SEV(ps_bitstrm, ps_sub_sps->s_sps_svc_ext.i4_seq_scaled_ref_layer_bottom_offset,
1918
0
                     return_status, "SPS: seq_scaled_ref_layer_bottom_offset");
1919
0
    }
1920
1921
    /* seq_tcoeff_level_prediction_flag */
1922
6.72k
    PUT_BITS(ps_bitstrm, ps_sub_sps->s_sps_svc_ext.i1_seq_tcoeff_level_prediction_flag, 1,
1923
6.72k
             return_status, "SPS: seq_tcoeff_level_prediction_flag");
1924
1925
6.72k
    if(ps_sub_sps->s_sps_svc_ext.i1_seq_tcoeff_level_prediction_flag)
1926
0
    {
1927
        /* adaptive_tcoeff_level_prediction_flag */
1928
0
        PUT_BITS(ps_bitstrm, ps_sub_sps->s_sps_svc_ext.i1_adaptive_tcoeff_level_prediction_flag, 1,
1929
0
                 return_status, "SPS: adaptive_tcoeff_level_prediction_flag");
1930
0
    }
1931
1932
    /* slice_header_restriction_flag */
1933
6.72k
    PUT_BITS(ps_bitstrm, ps_sub_sps->s_sps_svc_ext.i1_slice_header_restriction_flag, 1,
1934
6.72k
             return_status, "SPS: slice_header_restriction_flag");
1935
1936
6.72k
    return return_status;
1937
6.72k
}
1938
1939
WORD32 isvce_svc_vui_parameters_extension(bitstrm_t *ps_bitstrm, svc_vui_ext_t *ps_svc_vui)
1940
0
{
1941
0
    WORD32 return_status = IH264E_SUCCESS;
1942
0
    UWORD32 i;
1943
1944
0
    PUT_BITS_UEV(ps_bitstrm, ps_svc_vui->u4_vui_ext_num_entries_minus1, return_status,
1945
0
                 "num_layers_minus1");
1946
1947
0
    for(i = 0; i < ps_svc_vui->u4_vui_ext_num_entries_minus1; i++)
1948
0
    {
1949
        /* dependency_id */
1950
0
        PUT_BITS(ps_bitstrm, ps_svc_vui->u1_vui_ext_dependency_id[i], 3, return_status,
1951
0
                 "dependency_id");
1952
1953
        /* quality_id */
1954
0
        PUT_BITS(ps_bitstrm, ps_svc_vui->u1_vui_ext_quality_id[i], 4, return_status, "quality_id");
1955
1956
        /* temporal_id */
1957
0
        PUT_BITS(ps_bitstrm, ps_svc_vui->u1_vui_ext_temporal_id[i], 3, return_status,
1958
0
                 "temporal_id");
1959
1960
        /* timing_info_present_flag */
1961
0
        PUT_BITS(ps_bitstrm, ps_svc_vui->u1_vui_ext_timing_info_present_flag[i], 1, return_status,
1962
0
                 "timing_info_present_flag");
1963
1964
0
        if(ps_svc_vui->u1_vui_ext_timing_info_present_flag[i])
1965
0
        {
1966
            /* num_units_in_tick */
1967
0
            PUT_BITS(ps_bitstrm, ps_svc_vui->u4_vui_ext_num_units_in_tick[i], 32, return_status,
1968
0
                     "num_units_in_tick");
1969
1970
            /* time_scale */
1971
0
            PUT_BITS(ps_bitstrm, ps_svc_vui->u4_vui_ext_time_scale[i], 32, return_status,
1972
0
                     "time_scale");
1973
1974
            /* fixed_frame_rate_flag */
1975
0
            PUT_BITS(ps_bitstrm, ps_svc_vui->u1_vui_ext_fixed_frame_rate_flag[i], 1, return_status,
1976
0
                     "fixed_frame_rate_flag");
1977
0
        }
1978
1979
        /* nal_hrd_parameters_present_flag */
1980
0
        PUT_BITS(ps_bitstrm, ps_svc_vui->u1_vui_ext_nal_hrd_params_present_flag[i], 1,
1981
0
                 return_status, "nal_hrd_parameters_present_flag");
1982
1983
0
        if(ps_svc_vui->u1_vui_ext_nal_hrd_params_present_flag[i])
1984
0
        {
1985
0
        }
1986
1987
        /* nal_hrd_parameters_present_flag */
1988
0
        PUT_BITS(ps_bitstrm, ps_svc_vui->u1_vui_ext_vcl_hrd_params_present_flag[i], 1,
1989
0
                 return_status, "vcl_hrd_parameters_present_flag");
1990
1991
0
        if(ps_svc_vui->u1_vui_ext_vcl_hrd_params_present_flag[i])
1992
0
        {
1993
0
        }
1994
1995
0
        if(ps_svc_vui->u1_vui_ext_nal_hrd_params_present_flag[i] ||
1996
0
           ps_svc_vui->u1_vui_ext_vcl_hrd_params_present_flag[i])
1997
0
        {
1998
            /* low_delay_hrd_flag */
1999
0
            PUT_BITS(ps_bitstrm, ps_svc_vui->u1_vui_ext_low_delay_hrd_flag[i], 1, return_status,
2000
0
                     "low_delay_hrd_flag");
2001
0
        }
2002
2003
        /* pic_struct_present_flag */
2004
0
        PUT_BITS(ps_bitstrm, ps_svc_vui->u1_vui_ext_pic_struct_present_flag[i], 1, return_status,
2005
0
                 "pic_struct_present_flag");
2006
0
    }
2007
2008
0
    return return_status;
2009
0
}
2010
2011
WORD32 isvce_generate_subset_sps(bitstrm_t *ps_bitstrm, subset_sps_t *ps_subset_sps)
2012
6.72k
{
2013
6.72k
    WORD32 return_status = IH264E_SUCCESS;
2014
6.72k
    sps_t *ps_sps = &ps_subset_sps->s_sps;
2015
6.72k
    return_status = isvce_generate_sps(ps_bitstrm, &ps_subset_sps->s_sps, NAL_SUBSET_SPS);
2016
2017
    /* generate subset sps */
2018
6.72k
    if(ps_sps->u1_profile_idc == IH264_SCALABLE_BASELINE ||
2019
6.72k
       ps_sps->u1_profile_idc == IH264_SCALABLE_HIGH_PROFILE)
2020
6.72k
    {
2021
6.72k
        isvce_seq_parameter_set_svc_extension(ps_bitstrm, ps_subset_sps,
2022
6.72k
                                              ps_sps->u1_chroma_format_idc);
2023
2024
        /* svc_vui_parameters_present_flag */
2025
6.72k
        PUT_BITS(ps_bitstrm, ps_subset_sps->i1_svc_vui_parameters_present_flag, 1, return_status,
2026
6.72k
                 "SPS: svc_vui_parameters_present_flag");
2027
2028
6.72k
        if(ps_subset_sps->i1_svc_vui_parameters_present_flag == 1)
2029
0
        {
2030
0
            svc_vui_ext_t *ps_svc_vui = NULL;
2031
0
            isvce_svc_vui_parameters_extension(ps_bitstrm, ps_svc_vui);
2032
0
        }
2033
2034
        /* additional_extension2_flag */
2035
6.72k
        PUT_BITS(ps_bitstrm, ps_subset_sps->i1_additional_extension2_flag, 1, return_status,
2036
6.72k
                 "SPS: additional_extension2_flag");
2037
6.72k
    }
2038
2039
    /* rbsp trailing bits */
2040
6.72k
    return_status = ih264e_put_rbsp_trailing_bits(ps_bitstrm);
2041
2042
6.72k
    return return_status;
2043
6.72k
}
2044
/**
2045
******************************************************************************
2046
*
2047
* @brief Generates svc_nalu_ext
2048
*
2049
* @par   Description
2050
*  Generate svc_nalu_ext as per Section G.7.3.1.1
2051
*
2052
* @param[inout]   ps_bitstrm
2053
*  pointer to bitstream context for generating slice header
2054
*
2055
* @param[in]   ps_svc_nalu_ext
2056
*  pointer to svc_nalu_ext struct
2057
*
2058
* @return    success or failure error code
2059
*
2060
******************************************************************************
2061
*/
2062
WORD32 isvce_generate_svc_nalu_extension(bitstrm_t *ps_bitstrm, svc_nalu_ext_t *ps_svc_nalu_ext,
2063
                                         UWORD8 u1_nalu_id)
2064
59.7k
{
2065
59.7k
    WORD32 return_status = IH264E_SUCCESS;
2066
2067
    /* Insert start code */
2068
59.7k
    return_status = ih264e_put_nal_start_code_prefix(ps_bitstrm, 1);
2069
2070
59.7k
    if(return_status != IH264E_SUCCESS)
2071
0
    {
2072
0
        return return_status;
2073
0
    }
2074
2075
    /* Insert Nal Unit Header */
2076
59.7k
    return_status = isvce_generate_nal_unit_header(ps_bitstrm, u1_nalu_id, 3);
2077
2078
59.7k
    if(return_status != IH264E_SUCCESS)
2079
0
    {
2080
0
        return return_status;
2081
0
    }
2082
2083
    /* reserved_one_bit */
2084
59.7k
    PUT_BITS(ps_bitstrm, 1, 1, return_status, "NAL unit header: reserved_one_bit");
2085
2086
    /* idr_flag */
2087
59.7k
    PUT_BITS(ps_bitstrm, ps_svc_nalu_ext->u1_idr_flag, 1, return_status,
2088
59.7k
             "NAL unit header: idr_flag");
2089
2090
    /* priority_id */
2091
59.7k
    PUT_BITS(ps_bitstrm, ps_svc_nalu_ext->u1_priority_id, 6, return_status,
2092
59.7k
             "NAL unit header: priority_id");
2093
2094
    /* no_inter_layer_pred_flag */
2095
59.7k
    PUT_BITS(ps_bitstrm, ps_svc_nalu_ext->u1_no_inter_layer_pred_flag, 1, return_status,
2096
59.7k
             "NAL unit header: no_inter_layer_pred_flag");
2097
2098
    /* dependency_id */
2099
59.7k
    PUT_BITS(ps_bitstrm, ps_svc_nalu_ext->u1_dependency_id, 3, return_status,
2100
59.7k
             "NAL unit header: dependency_id");
2101
2102
    /* quality_id */
2103
59.7k
    PUT_BITS(ps_bitstrm, ps_svc_nalu_ext->u1_quality_id, 4, return_status,
2104
59.7k
             "NAL unit header: quality_id");
2105
2106
    /* temporal_id */
2107
59.7k
    PUT_BITS(ps_bitstrm, ps_svc_nalu_ext->u1_temporal_id, 3, return_status,
2108
59.7k
             "NAL unit header: temporal_id");
2109
2110
    /* use_ref_base_pic_flag */
2111
59.7k
    PUT_BITS(ps_bitstrm, ps_svc_nalu_ext->u1_use_ref_base_pic_flag, 1, return_status,
2112
59.7k
             "NAL unit header: use_ref_base_pic_flag");
2113
2114
    /* discardable_flag */
2115
59.7k
    PUT_BITS(ps_bitstrm, ps_svc_nalu_ext->u1_discardable_flag, 1, return_status,
2116
59.7k
             "NAL unit header: discardable_flag");
2117
2118
    /* output_flag */
2119
59.7k
    PUT_BITS(ps_bitstrm, ps_svc_nalu_ext->u1_output_flag, 1, return_status,
2120
59.7k
             "NAL unit header: output_flag");
2121
2122
    /* reserved_three_2bits */
2123
59.7k
    PUT_BITS(ps_bitstrm, ps_svc_nalu_ext->u1_reserved_three_2bits, 2, return_status,
2124
59.7k
             "NAL unit header: reserved_three_2bits");
2125
2126
59.7k
    return return_status;
2127
59.7k
}