/src/libavc/encoder/irc_rate_control_api.c
Line | Count | Source (jump to first uncovered line) |
1 | | /****************************************************************************** |
2 | | * |
3 | | * Copyright (C) 2015 The Android Open Source Project |
4 | | * |
5 | | * Licensed under the Apache License, Version 2.0 (the "License"); |
6 | | * you may not use this file except in compliance with the License. |
7 | | * You may obtain a copy of the License at: |
8 | | * |
9 | | * http://www.apache.org/licenses/LICENSE-2.0 |
10 | | * |
11 | | * Unless required by applicable law or agreed to in writing, software |
12 | | * distributed under the License is distributed on an "AS IS" BASIS, |
13 | | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
14 | | * See the License for the specific language governing permissions and |
15 | | * limitations under the License. |
16 | | * |
17 | | ***************************************************************************** |
18 | | * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore |
19 | | */ |
20 | | |
21 | | /*****************************************************************************/ |
22 | | /* Includes */ |
23 | | /*****************************************************************************/ |
24 | | |
25 | | /* System include files */ |
26 | | #include "stdio.h" |
27 | | |
28 | | /* User include files */ |
29 | | #include "irc_datatypes.h" |
30 | | #include "irc_common.h" |
31 | | #include "irc_cntrl_param.h" |
32 | | #include "irc_mem_req_and_acq.h" |
33 | | #include "irc_rd_model.h" |
34 | | #include "irc_est_sad.h" |
35 | | #include "irc_fixed_point_error_bits.h" |
36 | | #include "irc_vbr_storage_vbv.h" |
37 | | #include "irc_picture_type.h" |
38 | | #include "irc_bit_allocation.h" |
39 | | #include "irc_mb_model_based.h" |
40 | | #include "irc_cbr_buffer_control.h" |
41 | | #include "irc_vbr_str_prms.h" |
42 | | #include "irc_rate_control_api.h" |
43 | | #include "irc_rate_control_api_structs.h" |
44 | | #include "irc_trace_support.h" |
45 | | |
46 | | |
47 | 83.6k | #define MIN(a,b) (((a) < (b)) ? (a) : (b)) |
48 | 83.6k | #define MAX(a,b) (((a) > (b)) ? (a) : (b)) |
49 | | |
50 | 167k | #define DEV_Q 4 /*Q format(Shift) for Deviation range factor */ |
51 | 41.8k | #define HI_DEV_FCTR 22 /* 1.4*16 */ |
52 | 41.8k | #define LO_DEV_FCTR 12 /* 0.75*16 */ |
53 | 41.8k | #define GET_HI_DEV_QP(Qprev) (( ((WORD32) Qprev)*HI_DEV_FCTR + (1<<(DEV_Q-1)))>>DEV_Q) |
54 | 41.8k | #define GET_LO_DEV_QP(Qprev) (( ((WORD32) Qprev)*LO_DEV_FCTR + (1<<(DEV_Q-1)))>>DEV_Q) |
55 | 41.8k | #define CLIP_QP(Qc, hi_d, lo_d) (((Qc) < (lo_d))?((lo_d)):(((Qc) > (hi_d))?(hi_d):(Qc))) |
56 | | |
57 | | /***************************************************************************** |
58 | | Function Name : fill_memtab |
59 | | Description : fill memtab |
60 | | Inputs : |
61 | | ps_mem_tab - Memtab pointer |
62 | | u4_size - Size of the memtab |
63 | | i4_alignment - alignment of the memtab |
64 | | e_usage - usage |
65 | | e_mem_region - region |
66 | | *****************************************************************************/ |
67 | | void fill_memtab(itt_memtab_t *ps_mem_tab, |
68 | | WORD32 u4_size, |
69 | | WORD32 i4_alignment, |
70 | | ITT_MEM_USAGE_TYPE_E e_usage, |
71 | | ITT_MEM_REGION_E e_mem_region) |
72 | 937k | { |
73 | | /* Make the size next multiple of alignment */ |
74 | 937k | WORD32 i4_aligned_size = (((u4_size) + (i4_alignment-1)) & (~(i4_alignment-1))); |
75 | | |
76 | | /* Fill the memtab */ |
77 | 937k | ps_mem_tab->u4_size = i4_aligned_size; |
78 | 937k | ps_mem_tab->i4_alignment = i4_alignment; |
79 | 937k | ps_mem_tab->e_usage = e_usage; |
80 | 937k | ps_mem_tab->e_mem_region = e_mem_region; |
81 | 937k | } |
82 | | |
83 | | /***************************************************************************** |
84 | | Function Name : use_or_fill_base |
85 | | Description : Get or Set base pointer for the memtab |
86 | | Inputs : |
87 | | ps_mem_tab - Memtab pointer |
88 | | ptr_to_be_filled - Pointer to base pointer |
89 | | e_func_type - Get/Set flag |
90 | | *****************************************************************************/ |
91 | | WORD32 use_or_fill_base(itt_memtab_t *ps_mem_tab, |
92 | | void **ptr_to_be_filled, |
93 | | ITT_FUNC_TYPE_E e_func_type) |
94 | 937k | { |
95 | | /* Fill base for freeing the allocated memory */ |
96 | 937k | if (e_func_type == FILL_BASE) |
97 | 0 | { |
98 | 0 | if (ptr_to_be_filled[0] != 0) |
99 | 0 | { |
100 | 0 | ps_mem_tab->pv_base = ptr_to_be_filled[0]; |
101 | 0 | return (0); |
102 | 0 | } |
103 | 0 | else |
104 | 0 | { |
105 | 0 | return (-1); |
106 | 0 | } |
107 | 0 | } |
108 | | /* obtain the allocated memory from base pointer */ |
109 | 937k | if (e_func_type == USE_BASE) |
110 | 312k | { |
111 | 312k | if (ps_mem_tab->pv_base != 0) |
112 | 312k | { |
113 | 312k | ptr_to_be_filled[0] = ps_mem_tab->pv_base; |
114 | 312k | return (0); |
115 | 312k | } |
116 | 0 | else |
117 | 0 | { |
118 | 0 | return (-1); |
119 | 0 | } |
120 | 312k | } |
121 | 625k | return (0); |
122 | 937k | } |
123 | | |
124 | | /*****************************************************************************/ |
125 | | /* Restricts the quantization parameter variation within delta */ |
126 | | /*****************************************************************************/ |
127 | | /* static WORD32 restrict_swing(WORD32 cur_qp, WORD32 prev_qp, WORD32 delta_qp) |
128 | | { |
129 | | if((cur_qp) - (prev_qp) > (delta_qp)) (cur_qp) = (prev_qp) + (delta_qp) ; |
130 | | if((prev_qp) - (cur_qp) > (delta_qp)) (cur_qp) = (prev_qp) - (delta_qp) ; |
131 | | return cur_qp; |
132 | | }*/ |
133 | | |
134 | | /***************************************************************************** |
135 | | Function Name : rate_control_get_init_free_memtab |
136 | | Description : Takes or gives memtab |
137 | | Inputs : pps_rate_control_api - pointer to RC api pointer |
138 | | ps_memtab - Memtab pointer |
139 | | i4_use_base - Set during init, else 0 |
140 | | i4_fill_base - Set during free, else 0 |
141 | | *****************************************************************************/ |
142 | | WORD32 irc_rate_control_num_fill_use_free_memtab(rate_control_handle *pps_rate_control_api, |
143 | | itt_memtab_t *ps_memtab, |
144 | | ITT_FUNC_TYPE_E e_func_type) |
145 | 121k | { |
146 | 121k | WORD32 i4_mem_tab_idx = 0, i; |
147 | 121k | rate_control_api_t s_temp_rc_api; |
148 | | |
149 | | /* |
150 | | * Hack for al alloc, during which we dont have any state memory. |
151 | | * Dereferencing can cause issues |
152 | | */ |
153 | 121k | if(e_func_type == GET_NUM_MEMTAB || e_func_type == FILL_MEMTAB) |
154 | 101k | (*pps_rate_control_api) = &s_temp_rc_api; |
155 | | |
156 | | /*for src rate control state structure*/ |
157 | 121k | if(e_func_type != GET_NUM_MEMTAB) |
158 | 60.6k | { |
159 | 60.6k | fill_memtab(&ps_memtab[i4_mem_tab_idx], sizeof(rate_control_api_t), |
160 | 60.6k | ALIGN_128_BYTE, PERSISTENT, DDR); |
161 | 60.6k | use_or_fill_base(&ps_memtab[0], (void**)pps_rate_control_api, |
162 | 60.6k | e_func_type); |
163 | 60.6k | } |
164 | 121k | i4_mem_tab_idx++; |
165 | | |
166 | | /* Get the memory requirement of lower modules */ |
167 | 121k | i4_mem_tab_idx += irc_ba_num_fill_use_free_memtab( |
168 | 121k | &pps_rate_control_api[0]->ps_bit_allocation, |
169 | 121k | &ps_memtab[i4_mem_tab_idx], e_func_type); |
170 | | |
171 | 121k | i4_mem_tab_idx += irc_cbr_buffer_num_fill_use_free_memtab( |
172 | 121k | &pps_rate_control_api[0]->ps_cbr_buffer, |
173 | 121k | &ps_memtab[i4_mem_tab_idx], e_func_type); |
174 | | |
175 | 121k | i4_mem_tab_idx += irc_est_sad_num_fill_use_free_memtab( |
176 | 121k | &pps_rate_control_api[0]->ps_est_sad, |
177 | 121k | &ps_memtab[i4_mem_tab_idx], e_func_type); |
178 | | |
179 | 121k | i4_mem_tab_idx += irc_mbrc_num_fill_use_free_memtab( |
180 | 121k | &pps_rate_control_api[0]->ps_mb_rate_control, |
181 | 121k | &ps_memtab[i4_mem_tab_idx], e_func_type); |
182 | | |
183 | 121k | i4_mem_tab_idx += irc_vbr_vbv_num_fill_use_free_memtab( |
184 | 121k | &pps_rate_control_api[0]->ps_vbr_storage_vbv, |
185 | 121k | &ps_memtab[i4_mem_tab_idx], e_func_type); |
186 | | |
187 | 484k | for(i = 0; i < MAX_PIC_TYPE; i++) |
188 | 363k | { |
189 | 363k | i4_mem_tab_idx += irc_rd_model_num_fill_use_free_memtab( |
190 | 363k | &pps_rate_control_api[0]->aps_rd_model[i], |
191 | 363k | &ps_memtab[i4_mem_tab_idx], e_func_type); |
192 | 363k | } |
193 | 121k | i4_mem_tab_idx += irc_pic_handling_num_fill_use_free_memtab( |
194 | 121k | &pps_rate_control_api[0]->ps_pic_handling, |
195 | 121k | &ps_memtab[i4_mem_tab_idx], e_func_type); |
196 | | |
197 | 121k | return (i4_mem_tab_idx); |
198 | 121k | } |
199 | | |
200 | | /***************************************************************************** |
201 | | Function Name : irc_initialise_rate_control |
202 | | Description : Initialise the rate control structure |
203 | | Inputs : ps_rate_control_api - api struct |
204 | | e_rate_control_type - VBR, CBR (NLDRC/LDRC), VBR_STREAMING |
205 | | u1_is_mb_level_rc_on - enabling mb level RC |
206 | | u4_avg_bit_rate - bit rate to achieved across the entire |
207 | | file size |
208 | | u4_peak_bit_rate - max possible drain rate |
209 | | u4_frame_rate - number of frames in 1000 seconds |
210 | | u4_intra_frame_interval - num frames between two I frames |
211 | | *au1_init_qp - init_qp for I,P,B |
212 | | *****************************************************************************/ |
213 | | void irc_initialise_rate_control(rate_control_api_t *ps_rate_control_api, |
214 | | rc_type_e e_rate_control_type, |
215 | | UWORD8 u1_is_mb_level_rc_on, |
216 | | UWORD32 u4_avg_bit_rate, |
217 | | UWORD32 *pu4_peak_bit_rate, |
218 | | UWORD32 u4_min_bit_rate, |
219 | | UWORD32 u4_frame_rate, |
220 | | UWORD32 u4_max_delay, |
221 | | UWORD32 u4_intra_frame_interval, |
222 | | WORD32 i4_inter_frm_int, |
223 | | UWORD8 *pu1_init_qp, |
224 | | UWORD32 u4_max_vbv_buff_size, |
225 | | WORD32 i4_max_inter_frm_int, |
226 | | WORD32 i4_is_gop_closed, |
227 | | UWORD8 *pu1_min_max_qp, |
228 | | WORD32 i4_use_est_intra_sad, |
229 | | UWORD32 u4_src_ticks, |
230 | | UWORD32 u4_tgt_ticks) |
231 | 55.5k | { |
232 | 55.5k | WORD32 i; |
233 | 55.5k | UWORD32 u4_frms_in_delay_prd; |
234 | | |
235 | 55.5k | X_PROD_Y_DIV_Z(u4_frame_rate, u4_max_delay, 1000000, u4_frms_in_delay_prd); |
236 | 55.5k | ps_rate_control_api->e_rc_type = e_rate_control_type; |
237 | 55.5k | ps_rate_control_api->u1_is_mb_level_rc_on = u1_is_mb_level_rc_on; |
238 | | |
239 | 55.5k | TRACE_PRINTF((const WORD8*)"RC type = %d\n", e_rate_control_type); |
240 | | |
241 | | /* Set the avg_bitrate_changed flag for each pic_type to 0 */ |
242 | 222k | for(i = 0; i < MAX_PIC_TYPE; i++) |
243 | 166k | { |
244 | 166k | ps_rate_control_api->au1_avg_bitrate_changed[i] = 0; |
245 | 166k | } |
246 | | |
247 | | /* Initialize the pic_handling module */ |
248 | 55.5k | irc_init_pic_handling(ps_rate_control_api->ps_pic_handling, |
249 | 55.5k | (WORD32)u4_intra_frame_interval, |
250 | 55.5k | i4_inter_frm_int, i4_max_inter_frm_int, |
251 | 55.5k | i4_is_gop_closed); |
252 | | |
253 | | /*** Initialize the rate control modules ***/ |
254 | 55.5k | if(ps_rate_control_api->e_rc_type != CONST_QP) |
255 | 39.8k | { |
256 | 39.8k | UWORD32 au4_num_pics_in_delay_prd[MAX_PIC_TYPE]; |
257 | | |
258 | | /* Initialize the model parameter structures */ |
259 | 159k | for(i = 0; i < MAX_PIC_TYPE; i++) |
260 | 119k | { |
261 | 119k | irc_init_frm_rc_rd_model(ps_rate_control_api->aps_rd_model[i], |
262 | 119k | MAX_FRAMES_MODELLED); |
263 | 119k | } |
264 | | |
265 | | /* Initialize the buffer mechanism */ |
266 | 39.8k | if((ps_rate_control_api->e_rc_type == VBR_STORAGE) |
267 | 39.8k | || (ps_rate_control_api->e_rc_type |
268 | 23.8k | == VBR_STORAGE_DVD_COMP)) |
269 | 16.0k | { |
270 | | /* Assuming both the peak bit rates are same for a VBR_STORAGE and |
271 | | VBR_STORAGE_DVD_COMP */ |
272 | 16.0k | if(pu4_peak_bit_rate[0] != pu4_peak_bit_rate[1]) |
273 | 0 | { |
274 | 0 | TRACE_PRINTF((const WORD8*)"For VBR_STORAGE and VBR_STORAGE_DVD_COMP the peak bit rates should be same\n"); |
275 | 0 | } |
276 | 16.0k | irc_init_vbr_vbv(ps_rate_control_api->ps_vbr_storage_vbv, |
277 | 16.0k | (WORD32)pu4_peak_bit_rate[0], |
278 | 16.0k | (WORD32)u4_frame_rate, |
279 | 16.0k | (WORD32)u4_max_vbv_buff_size); |
280 | 16.0k | } |
281 | 23.8k | else if(ps_rate_control_api->e_rc_type == CBR_NLDRC) |
282 | 23.8k | { |
283 | 23.8k | UWORD32 u4_avg_bit_rate_copy[MAX_NUM_DRAIN_RATES]; |
284 | 71.5k | for(i = 0; i < MAX_NUM_DRAIN_RATES; i++) |
285 | 47.7k | { |
286 | 47.7k | u4_avg_bit_rate_copy[i] = u4_avg_bit_rate; |
287 | 47.7k | } |
288 | | /* In case of CBR the num pics in delay is ignored */ |
289 | 95.4k | for(i = 0; i < MAX_PIC_TYPE; i++) |
290 | 71.5k | au4_num_pics_in_delay_prd[i] = 0; |
291 | | |
292 | 23.8k | irc_init_cbr_buffer(ps_rate_control_api->ps_cbr_buffer, |
293 | 23.8k | u4_max_delay, u4_frame_rate, |
294 | 23.8k | (WORD32 *)u4_avg_bit_rate_copy, |
295 | 23.8k | au4_num_pics_in_delay_prd, |
296 | 23.8k | u4_max_vbv_buff_size); |
297 | 23.8k | } |
298 | 0 | else if(ps_rate_control_api->e_rc_type == VBR_STREAMING) |
299 | 0 | { |
300 | 0 | irc_init_vbv_str_prms(&ps_rate_control_api->s_vbr_str_prms, |
301 | 0 | u4_intra_frame_interval, u4_src_ticks, |
302 | 0 | u4_tgt_ticks, u4_frms_in_delay_prd); |
303 | | |
304 | | /* Get the number of pics of each type in delay period */ |
305 | 0 | irc_get_vsp_num_pics_in_dly_prd( |
306 | 0 | &ps_rate_control_api->s_vbr_str_prms, |
307 | 0 | au4_num_pics_in_delay_prd); |
308 | |
|
309 | 0 | irc_init_cbr_buffer(ps_rate_control_api->ps_cbr_buffer, |
310 | 0 | u4_max_delay, u4_frame_rate, |
311 | 0 | (WORD32 *)pu4_peak_bit_rate, |
312 | 0 | au4_num_pics_in_delay_prd, |
313 | 0 | u4_max_vbv_buff_size); |
314 | 0 | } |
315 | | |
316 | | /* Initialize the SAD estimation module */ |
317 | 39.8k | irc_init_est_sad(ps_rate_control_api->ps_est_sad, i4_use_est_intra_sad); |
318 | | |
319 | | /* Initialize the bit allocation module according to VBR or CBR */ |
320 | 39.8k | if((ps_rate_control_api->e_rc_type == VBR_STORAGE) |
321 | 39.8k | || (ps_rate_control_api->e_rc_type == VBR_STREAMING) |
322 | 39.8k | || (ps_rate_control_api->e_rc_type |
323 | 23.8k | == VBR_STORAGE_DVD_COMP)) |
324 | 16.0k | { |
325 | 16.0k | irc_ba_init_bit_allocation(ps_rate_control_api->ps_bit_allocation, |
326 | 16.0k | ps_rate_control_api->ps_pic_handling, |
327 | 16.0k | VBR_BIT_ALLOC_PERIOD, u4_avg_bit_rate, |
328 | 16.0k | u4_frame_rate, |
329 | 16.0k | (WORD32 *)pu4_peak_bit_rate, |
330 | 16.0k | u4_min_bit_rate); |
331 | 16.0k | } |
332 | 23.8k | else if(ps_rate_control_api->e_rc_type == CBR_NLDRC) |
333 | 23.8k | { |
334 | 23.8k | irc_ba_init_bit_allocation(ps_rate_control_api->ps_bit_allocation, |
335 | 23.8k | ps_rate_control_api->ps_pic_handling, |
336 | 23.8k | CBR_BIT_ALLOC_PERIOD, u4_avg_bit_rate, |
337 | 23.8k | u4_frame_rate, |
338 | 23.8k | (WORD32 *)pu4_peak_bit_rate, |
339 | 23.8k | u4_min_bit_rate); |
340 | 23.8k | } |
341 | | |
342 | | /* |
343 | | * u1_scd_detected will be initialized to 1 when a Scene change is |
344 | | * detected |
345 | | */ |
346 | 39.8k | ps_rate_control_api->u1_scd_detected = 0; |
347 | 39.8k | } |
348 | | |
349 | | /* Initialize the init_qp */ |
350 | 222k | for(i = 0; i < MAX_PIC_TYPE; i++) |
351 | 166k | { |
352 | 166k | ps_rate_control_api->au1_init_qp[i] = pu1_init_qp[i]; |
353 | 166k | ps_rate_control_api->au1_prev_frm_qp[i] = pu1_init_qp[i]; |
354 | 166k | ps_rate_control_api->au1_min_max_qp[(i << 1)] = |
355 | 166k | pu1_min_max_qp[(i << 1)]; |
356 | 166k | ps_rate_control_api->au1_min_max_qp[(i << 1) + 1] = pu1_min_max_qp[(i |
357 | 166k | << 1) + 1]; |
358 | 166k | } |
359 | | |
360 | | /* Initialize the is_first_frm_encoded */ |
361 | 222k | for(i = 0; i < MAX_PIC_TYPE; i++) |
362 | 166k | { |
363 | 166k | ps_rate_control_api->au1_is_first_frm_coded[i] = 0; |
364 | 166k | } |
365 | 55.5k | ps_rate_control_api->u1_is_first_frm = 1; |
366 | | |
367 | | /* |
368 | | * Control flag for delayed impact after a change in peak bitrate has been |
369 | | * made |
370 | | */ |
371 | 55.5k | ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change = 0; |
372 | 166k | for(i = 0; i < MAX_NUM_DRAIN_RATES; i++) |
373 | 111k | { |
374 | 111k | ps_rate_control_api->au4_new_peak_bit_rate[i] = pu4_peak_bit_rate[i]; |
375 | 111k | } |
376 | | |
377 | | /* Initialize the mb level rate control module */ |
378 | 55.5k | irc_init_mb_level_rc(ps_rate_control_api->ps_mb_rate_control); |
379 | 55.5k | X_PROD_Y_DIV_Z(u4_avg_bit_rate, 1000, u4_frame_rate, |
380 | 55.5k | ps_rate_control_api->i4_prev_frm_est_bits); |
381 | | |
382 | 55.5k | ps_rate_control_api->prev_ref_pic_type = I_PIC; |
383 | 55.5k | } |
384 | | |
385 | | /****************************************************************************** |
386 | | *Description : calls irc_add_pic_to_stack |
387 | | ******************************************************************************/ |
388 | | void irc_add_picture_to_stack(rate_control_api_t *rate_control_api, |
389 | | WORD32 i4_enc_pic_id) |
390 | 140k | { |
391 | | /* Call the routine to add the pic to stack in encode order */ |
392 | 140k | irc_add_pic_to_stack(rate_control_api->ps_pic_handling, i4_enc_pic_id); |
393 | 140k | } |
394 | | |
395 | | void irc_add_picture_to_stack_re_enc(rate_control_api_t *rate_control_api, |
396 | | WORD32 i4_enc_pic_id, |
397 | | picture_type_e e_pic_type) |
398 | 0 | { |
399 | | /* |
400 | | * In case of a re-encoder, the pics will come in the encode order itself. |
401 | | * So, there is no need to buffer the pics up |
402 | | */ |
403 | 0 | irc_add_pic_to_stack_re_enc(rate_control_api->ps_pic_handling, |
404 | 0 | i4_enc_pic_id, e_pic_type); |
405 | 0 | } |
406 | | |
407 | | /******************************************************************************* |
408 | | Description : Decides the picture type based on the state |
409 | | ******************************************************************************/ |
410 | | void irc_get_picture_details(rate_control_handle rate_control_api, |
411 | | WORD32 *pi4_pic_id, |
412 | | WORD32 *pi4_pic_disp_order_no, |
413 | | picture_type_e *pe_pic_type) |
414 | 130k | { |
415 | | /* Call to get the pic_details */ |
416 | 130k | irc_get_pic_from_stack(rate_control_api->ps_pic_handling, pi4_pic_id, |
417 | 130k | pi4_pic_disp_order_no, pe_pic_type); |
418 | 130k | } |
419 | | |
420 | | /******************************************************************************* |
421 | | * Description : Gets the frame level qp for the given picture type |
422 | | ******************************************************************************/ |
423 | | UWORD8 irc_get_frame_level_qp(rate_control_api_t *ps_rate_control_api, |
424 | | picture_type_e e_pic_type, |
425 | | WORD32 i4_ud_max_bits) |
426 | 130k | { |
427 | 130k | UWORD8 u1_frame_qp, i; |
428 | | |
429 | 130k | if((ps_rate_control_api->e_rc_type != VBR_STORAGE) |
430 | 130k | && (ps_rate_control_api->e_rc_type != VBR_STORAGE_DVD_COMP) |
431 | 130k | && (ps_rate_control_api->e_rc_type != CBR_NLDRC) |
432 | 130k | && (ps_rate_control_api->e_rc_type != CONST_QP) |
433 | 130k | && (ps_rate_control_api->e_rc_type != VBR_STREAMING)) |
434 | 0 | { |
435 | 0 | TRACE_PRINTF((const WORD8*)(const WORD8*)" Only VBR,NLDRC and CONST QP supported for now \n"); |
436 | 0 | return (0); |
437 | 0 | } |
438 | | |
439 | 130k | if(ps_rate_control_api->e_rc_type != CONST_QP) |
440 | 91.1k | { |
441 | 91.1k | UWORD8 u1_is_first_frm_coded = 1; |
442 | | |
443 | | /* Check whether at least one frame of a each picture type gets encoded*/ |
444 | | /* Check whether it is an IPP or IPB kind of encoding */ |
445 | 91.1k | if((ps_rate_control_api->au1_is_first_frm_coded[I_PIC] |
446 | 91.1k | && ps_rate_control_api->au1_is_first_frm_coded[P_PIC]) |
447 | 91.1k | || ((irc_pic_type_get_intra_frame_interval( |
448 | 59.3k | ps_rate_control_api->ps_pic_handling) |
449 | 59.3k | == 1) |
450 | 59.3k | && (ps_rate_control_api->au1_is_first_frm_coded[I_PIC]))) |
451 | 43.3k | { |
452 | 43.3k | if(e_pic_type != B_PIC) |
453 | 36.3k | u1_is_first_frm_coded = 1; |
454 | 6.99k | else |
455 | 6.99k | { |
456 | 27.9k | for(i = 0; i < MAX_PIC_TYPE; i++) |
457 | 20.9k | { |
458 | 20.9k | u1_is_first_frm_coded &= |
459 | 20.9k | ps_rate_control_api->au1_is_first_frm_coded[i]; |
460 | 20.9k | } |
461 | 6.99k | } |
462 | 43.3k | } |
463 | 47.8k | else |
464 | 47.8k | { |
465 | 47.8k | u1_is_first_frm_coded = 0; |
466 | 47.8k | } |
467 | | |
468 | 91.1k | if(u1_is_first_frm_coded) |
469 | 42.6k | { |
470 | 42.6k | WORD32 i4_cur_est_texture_bits, i4_cur_est_header_bits; |
471 | 42.6k | WORD32 i4_cur_est_bits; |
472 | 42.6k | UWORD32 u4_estimated_sad; |
473 | | |
474 | | /* Force I frame updation of rem_bits_in_frame*/ |
475 | 42.6k | if(irc_get_forced_I_frame_cur_frm_flag( |
476 | 42.6k | ps_rate_control_api->ps_pic_handling) == 1) |
477 | 716 | { |
478 | 716 | irc_ba_change_rem_bits_in_prd_at_force_I_frame( |
479 | 716 | ps_rate_control_api->ps_bit_allocation, |
480 | 716 | ps_rate_control_api->ps_pic_handling); |
481 | 716 | irc_reset_forced_I_frame_cur_frm_flag( |
482 | 716 | ps_rate_control_api->ps_pic_handling); |
483 | 716 | } |
484 | | |
485 | | /* Get the estimated texture bits allocated for the current frame*/ |
486 | 42.6k | i4_cur_est_texture_bits = irc_ba_get_cur_frm_est_texture_bits( |
487 | 42.6k | ps_rate_control_api->ps_bit_allocation, |
488 | 42.6k | ps_rate_control_api->aps_rd_model, |
489 | 42.6k | ps_rate_control_api->ps_est_sad, |
490 | 42.6k | ps_rate_control_api->ps_pic_handling, e_pic_type); |
491 | | |
492 | | /* Get the estimated header bits*/ |
493 | 42.6k | i4_cur_est_header_bits = irc_ba_get_cur_frm_est_header_bits( |
494 | 42.6k | ps_rate_control_api->ps_bit_allocation, e_pic_type); |
495 | | |
496 | | /* Total estimated bits */ |
497 | 42.6k | i4_cur_est_bits = i4_cur_est_header_bits + i4_cur_est_texture_bits; |
498 | | |
499 | 42.6k | TRACE_PRINTF((const WORD8*)"ft %d, etb = %d, eb %d, ", e_pic_type, |
500 | 42.6k | i4_cur_est_texture_bits, i4_cur_est_bits); |
501 | | |
502 | | /* Threshold the estimated bits based on the buffer fullness*/ |
503 | 42.6k | if(ps_rate_control_api->e_rc_type == VBR_STORAGE) |
504 | 24.5k | { |
505 | 24.5k | WORD32 i4_cur_frm_max_bit_possible; |
506 | 24.5k | i4_cur_frm_max_bit_possible = irc_get_max_target_bits( |
507 | 24.5k | ps_rate_control_api->ps_vbr_storage_vbv); |
508 | | |
509 | 24.5k | if(i4_cur_est_bits > i4_cur_frm_max_bit_possible) |
510 | 2.58k | { |
511 | | /* Assuming header would consume the same amount of bits */ |
512 | 2.58k | i4_cur_est_texture_bits = i4_cur_frm_max_bit_possible |
513 | 2.58k | - i4_cur_est_header_bits; |
514 | 2.58k | } |
515 | 24.5k | } |
516 | 18.0k | else if(ps_rate_control_api->e_rc_type == VBR_STORAGE_DVD_COMP) |
517 | 0 | { |
518 | 0 | WORD32 i4_rem_bits_in_gop, i4_rem_frms_in_gop, i; |
519 | 0 | WORD32 i4_cur_frm_max_bit_possible, |
520 | 0 | ai4_rem_frms_in_gop[MAX_PIC_TYPE]; |
521 | 0 | irc_pic_type_get_rem_frms_in_gop( |
522 | 0 | ps_rate_control_api->ps_pic_handling, |
523 | 0 | ai4_rem_frms_in_gop); |
524 | 0 | i4_rem_bits_in_gop = irc_get_rem_bits_in_period( |
525 | 0 | ps_rate_control_api); |
526 | 0 | i4_rem_frms_in_gop = 0; |
527 | 0 | for(i = 0; i < MAX_PIC_TYPE; i++) |
528 | 0 | i4_rem_frms_in_gop += ai4_rem_frms_in_gop[i]; |
529 | | |
530 | | /* Threshold the bits based on estimated buffer fullness */ |
531 | 0 | i4_cur_frm_max_bit_possible = irc_get_max_tgt_bits_dvd_comp( |
532 | 0 | ps_rate_control_api->ps_vbr_storage_vbv, |
533 | 0 | i4_rem_bits_in_gop, i4_rem_frms_in_gop, |
534 | 0 | e_pic_type); |
535 | |
|
536 | 0 | if(i4_cur_est_bits > i4_cur_frm_max_bit_possible) |
537 | 0 | { |
538 | | /* Assuming header would consume the same amount of bits */ |
539 | 0 | i4_cur_est_texture_bits = i4_cur_frm_max_bit_possible |
540 | 0 | - i4_cur_est_header_bits; |
541 | |
|
542 | 0 | } |
543 | 0 | } |
544 | 18.0k | else if(ps_rate_control_api->e_rc_type == CBR_NLDRC) |
545 | 18.0k | { |
546 | 18.0k | WORD32 i4_cur_frm_bits_acc_buffer = |
547 | 18.0k | irc_cbr_buffer_constraint_check( |
548 | 18.0k | ps_rate_control_api->ps_cbr_buffer, |
549 | 18.0k | i4_cur_est_bits, e_pic_type); |
550 | | |
551 | | /* Assuming the header would consume the same amount of bits */ |
552 | 18.0k | i4_cur_est_texture_bits = i4_cur_frm_bits_acc_buffer |
553 | 18.0k | - i4_cur_est_header_bits; |
554 | | |
555 | 18.0k | } |
556 | 0 | else if(ps_rate_control_api->e_rc_type == VBR_STREAMING) |
557 | 0 | { |
558 | 0 | WORD32 i4_cur_frm_bits_acc_buffer = |
559 | 0 | irc_vbr_stream_buffer_constraint_check( |
560 | 0 | ps_rate_control_api->ps_cbr_buffer, |
561 | 0 | i4_cur_est_bits, e_pic_type); |
562 | | |
563 | | /* Assuming the header would consume the same amount of bits */ |
564 | 0 | i4_cur_est_texture_bits = i4_cur_frm_bits_acc_buffer |
565 | 0 | - i4_cur_est_header_bits; |
566 | 0 | } |
567 | | |
568 | 42.6k | TRACE_PRINTF((const WORD8*)"emtb = %d, ", i4_cur_est_texture_bits); |
569 | | |
570 | | /* |
571 | | * If the estimated texture bits go to values less than zero |
572 | | * due to buffer underflow, make the estimated target bits to go |
573 | | * to zero |
574 | | */ |
575 | 42.6k | if(i4_cur_est_texture_bits < 0) |
576 | 2.55k | i4_cur_est_texture_bits = 0; |
577 | | |
578 | 42.6k | ps_rate_control_api->i4_prev_frm_est_bits = (i4_cur_est_texture_bits |
579 | 42.6k | + i4_cur_est_header_bits); |
580 | | |
581 | | /* Clip est_texture_bits according to the user-defined max value */ |
582 | 42.6k | if((i4_cur_est_texture_bits |
583 | 42.6k | > (i4_ud_max_bits - i4_cur_est_header_bits)) |
584 | 42.6k | && (e_pic_type != I_PIC)) |
585 | 0 | { |
586 | 0 | i4_cur_est_texture_bits = (i4_ud_max_bits |
587 | 0 | - i4_cur_est_header_bits); |
588 | 0 | TRACE_PRINTF((const WORD8*)"udcb = %d, ", |
589 | 0 | i4_ud_max_bits - i4_cur_est_header_bits); |
590 | 0 | } |
591 | | |
592 | | /* Calculate the estimated SAD for corresponding frame*/ |
593 | 42.6k | u4_estimated_sad = irc_get_est_sad(ps_rate_control_api->ps_est_sad, |
594 | 42.6k | e_pic_type); |
595 | | |
596 | | /* Query the model for the Qp for the corresponding frame*/ |
597 | | |
598 | | /* |
599 | | * The check is because the model gives a negative QP when the |
600 | | * i4_cur_est_texture_bits is less than or equal to 0 |
601 | | * [This is a bug in the model]. As a temporary fix, the frame QP |
602 | | * is being set to the max QP allowed |
603 | | */ |
604 | 42.6k | if(i4_cur_est_texture_bits > 0) |
605 | 33.1k | { |
606 | 33.1k | u1_frame_qp = irc_find_qp_for_target_bits( |
607 | 33.1k | ps_rate_control_api->aps_rd_model[e_pic_type], |
608 | 33.1k | i4_cur_est_texture_bits, |
609 | 33.1k | u4_estimated_sad, |
610 | 33.1k | ps_rate_control_api->au1_min_max_qp[(e_pic_type |
611 | 33.1k | << 1)], |
612 | 33.1k | ps_rate_control_api->au1_min_max_qp[(e_pic_type |
613 | 33.1k | << 1) + 1]); |
614 | 33.1k | } |
615 | 9.48k | else |
616 | 9.48k | { |
617 | 9.48k | u1_frame_qp = ps_rate_control_api->au1_min_max_qp[(e_pic_type |
618 | 9.48k | << 1) + 1]; |
619 | 9.48k | } |
620 | | |
621 | 42.6k | TRACE_PRINTF((const WORD8*)"ehb %d, etb %d, fqp %d, es %d, eb %d, ", |
622 | 42.6k | i4_cur_est_header_bits, i4_cur_est_texture_bits, |
623 | 42.6k | u1_frame_qp, u4_estimated_sad, i4_cur_est_bits); |
624 | | |
625 | | /* Restricting the QP swing if the average bit rate has changed */ |
626 | 42.6k | if(ps_rate_control_api->au1_avg_bitrate_changed[e_pic_type] == 0) |
627 | 41.8k | { |
628 | 41.8k | WORD32 prev_qp; |
629 | 41.8k | WORD32 hi_dev_qp, lo_dev_qp; |
630 | | /* Restricting the qp swing */ |
631 | 41.8k | prev_qp = ps_rate_control_api->au1_prev_frm_qp[ps_rate_control_api->prev_ref_pic_type]; |
632 | | |
633 | 41.8k | if(ps_rate_control_api->prev_ref_pic_type != e_pic_type) |
634 | 9.38k | { |
635 | 9.38k | if(e_pic_type == I_PIC) |
636 | 1.72k | { |
637 | | /* |
638 | | * Constrain I-frame QP to be within specified limit of |
639 | | * prev_ref_qp/Kp |
640 | | */ |
641 | 1.72k | prev_qp = (P_TO_I_RATIO * prev_qp + (1 << (K_Q - 1))) |
642 | 1.72k | >> (K_Q); |
643 | 1.72k | } |
644 | 7.65k | else if(e_pic_type == P_PIC) |
645 | 1.38k | { |
646 | | /* |
647 | | * Constrain P-frame QP to be within specified limit of |
648 | | * Kp*prev_ref_qp |
649 | | */ |
650 | 1.38k | prev_qp = (I_TO_P_RATIO * prev_qp + (1 << (K_Q - 1))) |
651 | 1.38k | >> (K_Q); |
652 | 1.38k | } |
653 | 6.27k | else if(ps_rate_control_api->prev_ref_pic_type == P_PIC) |
654 | 5.87k | { |
655 | | /* current frame is B-pic */ |
656 | | /* Constrain B-frame QP to be within specified limit of |
657 | | * prev_ref_qp/Kb |
658 | | */ |
659 | 5.87k | prev_qp = (P_TO_B_RATIO * prev_qp + (1 << (K_Q - 1))) |
660 | 5.87k | >> (K_Q); |
661 | 5.87k | } |
662 | 401 | else /* if(ps_rate_control_api->prev_ref_pic_type == I_PIC*/ |
663 | 401 | { |
664 | | /* current frame is B-pic */ |
665 | | /* |
666 | | * Constrain B-frame QP to be within specified limit of |
667 | | * prev_ref_qp/Kb |
668 | | */ |
669 | 401 | prev_qp = (P_TO_B_RATIO * I_TO_P_RATIO * prev_qp |
670 | 401 | + (1 << (K_Q + K_Q - 1))) |
671 | 401 | >> (K_Q + K_Q); |
672 | 401 | } |
673 | 9.38k | } |
674 | | |
675 | | /* |
676 | | * Due to the inexact nature of translation tables, QP may |
677 | | * get locked at some values. This is because of the inexactness of |
678 | | * the tables causing a change of +-1 in back and forth translations. |
679 | | * In that case, if we restrict the QP swing to +-1, we will get |
680 | | * the lock up condition. Hence we make it such that we will have |
681 | | * a swing of atleast +- 2 from prev_qp |
682 | | */ |
683 | | |
684 | 41.8k | lo_dev_qp = GET_LO_DEV_QP(prev_qp); |
685 | 41.8k | lo_dev_qp = MIN(lo_dev_qp, prev_qp - 2); |
686 | 41.8k | lo_dev_qp = MAX(lo_dev_qp, ps_rate_control_api->au1_min_max_qp[(e_pic_type << 1)]); |
687 | | |
688 | 41.8k | hi_dev_qp = GET_HI_DEV_QP(prev_qp); |
689 | 41.8k | hi_dev_qp = MAX(hi_dev_qp, prev_qp + 2); |
690 | 41.8k | hi_dev_qp = MIN(hi_dev_qp, ps_rate_control_api->au1_min_max_qp[(e_pic_type << 1) + 1]); |
691 | | |
692 | 41.8k | u1_frame_qp = (UWORD8)CLIP_QP((WORD32)u1_frame_qp, hi_dev_qp , lo_dev_qp); |
693 | | |
694 | 41.8k | } |
695 | 833 | else |
696 | 833 | { |
697 | 833 | ps_rate_control_api->au1_avg_bitrate_changed[e_pic_type] = 0; |
698 | 833 | } |
699 | 42.6k | } |
700 | 48.4k | else |
701 | 48.4k | { |
702 | | /* |
703 | | * The u1_is_first_frm_coded gets reset |
704 | | * a) at start of sequence |
705 | | * b) whenever there is a scene change. |
706 | | * In both cases since we do not have any estimate about the |
707 | | * current frame, we just send in the previous frame qp value.IN |
708 | | * Scene change case the previous QP is incremented by 4 , This is |
709 | | * done because the Scene changed VOP will have over consumed and |
710 | | * chances of future frames skipping is very high. For the init |
711 | | * case, the previous frame QP is initialized with the init qp |
712 | | */ |
713 | 48.4k | if((ps_rate_control_api->u1_scd_detected) |
714 | 48.4k | && (ps_rate_control_api->e_rc_type != CONST_QP)) |
715 | 3.02k | { |
716 | | /* |
717 | | * If scene change is detected, I frame Qp would have been |
718 | | * updated |
719 | | */ |
720 | | /* Use a QP calculated in the prev update fxn */ |
721 | 3.02k | u1_frame_qp = ps_rate_control_api->u1_frm_qp_after_scd; |
722 | 3.02k | } |
723 | 45.4k | else |
724 | 45.4k | { |
725 | 45.4k | u1_frame_qp = ps_rate_control_api->au1_prev_frm_qp[e_pic_type]; |
726 | 45.4k | } |
727 | 48.4k | } |
728 | 91.1k | } |
729 | 39.7k | else |
730 | 39.7k | { |
731 | 39.7k | u1_frame_qp = ps_rate_control_api->au1_init_qp[e_pic_type]; |
732 | 39.7k | } |
733 | | |
734 | 130k | TRACE_PRINTF((const WORD8*)"fqp %d\n", u1_frame_qp); |
735 | | |
736 | 130k | return (u1_frame_qp); |
737 | 130k | } |
738 | | |
739 | | /******************************************************************************* |
740 | | *Function Name : irc_get_buffer_status |
741 | | *Description : Gets the state of VBV buffer |
742 | | *Outputs : 0 = normal, 1 = underflow, 2= overflow |
743 | | *Returns : vbv_buf_status_e |
744 | | ******************************************************************************/ |
745 | | vbv_buf_status_e irc_get_buffer_status(rate_control_api_t *ps_rate_control_api, |
746 | | WORD32 i4_total_frame_bits, |
747 | | picture_type_e e_pic_type, |
748 | | WORD32 *pi4_num_bits_to_prevent_vbv_underflow) |
749 | 5.45M | { |
750 | 5.45M | vbv_buf_status_e e_buf_status = VBV_NORMAL; |
751 | | |
752 | | /* Get the buffer status for the current total consumed bits and error bits*/ |
753 | 5.45M | if(ps_rate_control_api->e_rc_type == VBR_STORAGE_DVD_COMP) |
754 | 0 | { |
755 | 0 | e_buf_status = irc_get_vbv_buffer_status( |
756 | 0 | ps_rate_control_api->ps_vbr_storage_vbv, |
757 | 0 | i4_total_frame_bits, |
758 | 0 | pi4_num_bits_to_prevent_vbv_underflow); |
759 | |
|
760 | 0 | TRACE_PRINTF((const WORD8*)"e_buf_status = %d\n", e_buf_status); |
761 | 0 | } |
762 | 5.45M | else if(ps_rate_control_api->e_rc_type == VBR_STORAGE) |
763 | 2.27M | { |
764 | | /* For VBR case since there is not underflow returning the max value */ |
765 | 2.27M | pi4_num_bits_to_prevent_vbv_underflow[0] = irc_get_max_vbv_buf_size( |
766 | 2.27M | ps_rate_control_api->ps_vbr_storage_vbv); |
767 | 2.27M | e_buf_status = VBV_NORMAL; |
768 | 2.27M | } |
769 | 3.18M | else if(ps_rate_control_api->e_rc_type == CBR_NLDRC) |
770 | 3.17M | { |
771 | 3.17M | e_buf_status = irc_get_cbr_buffer_status( |
772 | 3.17M | ps_rate_control_api->ps_cbr_buffer, i4_total_frame_bits, |
773 | 3.17M | pi4_num_bits_to_prevent_vbv_underflow, e_pic_type); |
774 | | |
775 | 3.17M | } |
776 | 980 | else if(ps_rate_control_api->e_rc_type == VBR_STREAMING) |
777 | 0 | { |
778 | | /* For VBR_streaming, error bits are computed according to peak bitrate*/ |
779 | 0 | e_buf_status = irc_get_cbr_buffer_status( |
780 | 0 | ps_rate_control_api->ps_cbr_buffer, i4_total_frame_bits, |
781 | 0 | pi4_num_bits_to_prevent_vbv_underflow, e_pic_type); |
782 | 0 | } |
783 | 5.45M | return e_buf_status; |
784 | 5.45M | } |
785 | | |
786 | | /******************************************************************************* |
787 | | Function Name : irc_update_pic_handling_state |
788 | | Description : If the forward path and the backward path of rate control |
789 | | ******************************************************************************/ |
790 | | void irc_update_pic_handling_state(rate_control_api_t *ps_rate_control_api, |
791 | | picture_type_e e_pic_type) |
792 | 0 | { |
793 | 0 | irc_update_pic_handling(ps_rate_control_api->ps_pic_handling, e_pic_type); |
794 | 0 | } |
795 | | |
796 | | /****************************************************************************** |
797 | | Function Name : irc_update_frame_level_info |
798 | | Description : Updates the frame level information into the rate control |
799 | | structure |
800 | | ******************************************************************************/ |
801 | | void irc_update_frame_level_info(rate_control_api_t *ps_rate_control_api, |
802 | | picture_type_e e_pic_type, |
803 | | WORD32 *pi4_mb_type_sad, |
804 | | WORD32 i4_total_frame_bits, |
805 | | WORD32 i4_model_updation_hdr_bits, |
806 | | WORD32 *pi4_mb_type_tex_bits, |
807 | | WORD32 *pi4_tot_mb_type_qp, |
808 | | WORD32 *pi4_tot_mb_in_type, |
809 | | WORD32 i4_avg_activity, |
810 | | UWORD8 u1_is_scd, |
811 | | WORD32 i4_is_it_a_skip, |
812 | | WORD32 i4_intra_frm_cost, |
813 | | WORD32 i4_is_pic_handling_done) |
814 | 105k | { |
815 | 105k | UWORD8 u1_num_skips = 0; |
816 | 105k | WORD32 i; |
817 | 105k | UWORD32 u4_frame_sad = 0; |
818 | 105k | WORD32 i4_tot_texture_bits = 0; |
819 | 105k | WORD32 i4_tot_mbs = 0; |
820 | 105k | WORD32 i4_avg_qp = 0; |
821 | | |
822 | | /* SCD not supported in case of IPB encoder */ |
823 | 105k | if(u1_is_scd && (irc_pic_type_get_inter_frame_interval( |
824 | 7.90k | ps_rate_control_api->ps_pic_handling) > 1)) |
825 | 1.37k | { |
826 | 1.37k | u1_is_scd = 0; |
827 | 1.37k | } |
828 | | |
829 | | /* For frames that contain plane areas that differ from reference frames, encoder |
830 | | * might generate more INTRA MBs because of lower SAD compared with INTER MBs. |
831 | | * Such cases should not be treated as scene change. |
832 | | * For such frames bits consumed will be lesser than the allocated bits. |
833 | | */ |
834 | 105k | if(i4_total_frame_bits < ps_rate_control_api->i4_prev_frm_est_bits) |
835 | 63.2k | { |
836 | 63.2k | u1_is_scd = 0; |
837 | 63.2k | } |
838 | 105k | TRACE_PRINTF((const WORD8*)"i4_total_frame_bits %d\n", i4_total_frame_bits); |
839 | | |
840 | 105k | if(!i4_is_it_a_skip && !i4_is_pic_handling_done) |
841 | 105k | { |
842 | | /* Update the pic_handling struct */ |
843 | 105k | irc_update_pic_handling(ps_rate_control_api->ps_pic_handling, |
844 | 105k | e_pic_type); |
845 | 105k | } |
846 | | |
847 | 105k | if(ps_rate_control_api->e_rc_type != CONST_QP) |
848 | 73.0k | { |
849 | 73.0k | if(!i4_is_it_a_skip) |
850 | 73.0k | { |
851 | 73.0k | WORD32 i4_new_period_flag; |
852 | | /****************************************************************** |
853 | | Calculate the total values from the individual values |
854 | | ******************************************************************/ |
855 | 219k | for(i = 0; i < MAX_MB_TYPE; i++) |
856 | 146k | u4_frame_sad += pi4_mb_type_sad[i]; |
857 | 219k | for(i = 0; i < MAX_MB_TYPE; i++) |
858 | 146k | i4_tot_texture_bits += pi4_mb_type_tex_bits[i]; |
859 | 219k | for(i = 0; i < MAX_MB_TYPE; i++) |
860 | 146k | i4_avg_qp += pi4_tot_mb_type_qp[i]; |
861 | 219k | for(i = 0; i < MAX_MB_TYPE; i++) |
862 | 146k | i4_tot_mbs += pi4_tot_mb_in_type[i]; |
863 | 73.0k | i4_avg_qp /= i4_tot_mbs; /* Calculate the average QP */ |
864 | | |
865 | 73.0k | if(ps_rate_control_api->u1_is_mb_level_rc_on) |
866 | 0 | { |
867 | | /* |
868 | | * The model needs to take into consideration the average |
869 | | * activity of the entire frame while estimating the QP. Thus |
870 | | * the frame sad values are scaled by the average activity |
871 | | * before updating it into the model. |
872 | | */ |
873 | 0 | if(!i4_avg_activity) |
874 | 0 | i4_avg_activity = 1; |
875 | 0 | i4_intra_frm_cost *= i4_avg_activity; |
876 | 0 | u4_frame_sad *= i4_avg_activity; |
877 | 0 | } |
878 | | |
879 | | /****************************************************************** |
880 | | Update the bit allocation module |
881 | | NOTE: For bit allocation module, the pic_type should not be |
882 | | modified to that of 'I', in case of a SCD. |
883 | | ******************************************************************/ |
884 | 73.0k | i4_new_period_flag = irc_is_last_frame_in_gop( |
885 | 73.0k | ps_rate_control_api->ps_pic_handling); |
886 | 73.0k | irc_ba_update_cur_frm_consumed_bits( |
887 | 73.0k | ps_rate_control_api->ps_bit_allocation, |
888 | 73.0k | ps_rate_control_api->ps_pic_handling, |
889 | 73.0k | i4_total_frame_bits, i4_model_updation_hdr_bits, |
890 | 73.0k | e_pic_type, u1_is_scd, i4_new_period_flag); |
891 | | |
892 | 73.0k | if(1 == i4_new_period_flag |
893 | 73.0k | && ((ps_rate_control_api->e_rc_type == VBR_STORAGE) |
894 | 12.9k | || (ps_rate_control_api->e_rc_type |
895 | 6.37k | == VBR_STORAGE_DVD_COMP))) |
896 | 6.57k | { |
897 | 6.57k | irc_ba_check_and_update_bit_allocation( |
898 | 6.57k | ps_rate_control_api->ps_bit_allocation, |
899 | 6.57k | ps_rate_control_api->ps_pic_handling, |
900 | 6.57k | irc_get_cur_vbv_buf_size( |
901 | 6.57k | ps_rate_control_api->ps_vbr_storage_vbv), |
902 | 6.57k | irc_get_max_vbv_buf_size( |
903 | 6.57k | ps_rate_control_api->ps_vbr_storage_vbv), |
904 | 6.57k | irc_get_max_bits_per_tgt_frm( |
905 | 6.57k | ps_rate_control_api->ps_vbr_storage_vbv), |
906 | 6.57k | i4_total_frame_bits); |
907 | 6.57k | } |
908 | 73.0k | } |
909 | | |
910 | | /********************************************************************** |
911 | | Update the buffer status |
912 | | *********************************************************************/ |
913 | | /* |
914 | | * This update is done after overflow and underflow handling to |
915 | | * account for the actual bits dumped |
916 | | */ |
917 | 73.0k | if((ps_rate_control_api->e_rc_type == VBR_STORAGE) |
918 | 73.0k | || (ps_rate_control_api->e_rc_type |
919 | 41.3k | == VBR_STORAGE_DVD_COMP)) |
920 | 31.7k | { |
921 | 31.7k | irc_update_vbr_vbv(ps_rate_control_api->ps_vbr_storage_vbv, |
922 | 31.7k | i4_total_frame_bits); |
923 | 31.7k | } |
924 | 41.3k | else if(ps_rate_control_api->e_rc_type == CBR_NLDRC) |
925 | 41.3k | { |
926 | 41.3k | irc_update_cbr_buffer(ps_rate_control_api->ps_cbr_buffer, |
927 | 41.3k | i4_total_frame_bits, e_pic_type); |
928 | 41.3k | } |
929 | 0 | else if(ps_rate_control_api->e_rc_type == VBR_STREAMING) |
930 | 0 | { |
931 | 0 | UWORD32 au4_num_pics_in_delay_prd[MAX_PIC_TYPE]; |
932 | |
|
933 | 0 | irc_get_vsp_num_pics_in_dly_prd( |
934 | 0 | &ps_rate_control_api->s_vbr_str_prms, |
935 | 0 | au4_num_pics_in_delay_prd); |
936 | |
|
937 | 0 | irc_update_cbr_buffer(ps_rate_control_api->ps_cbr_buffer, |
938 | 0 | i4_total_frame_bits, e_pic_type); |
939 | |
|
940 | 0 | irc_update_vbr_str_prms(&ps_rate_control_api->s_vbr_str_prms, |
941 | 0 | e_pic_type); |
942 | |
|
943 | 0 | irc_change_cbr_vbv_num_pics_in_delay_period( |
944 | 0 | ps_rate_control_api->ps_cbr_buffer, |
945 | 0 | au4_num_pics_in_delay_prd); |
946 | | |
947 | | /* |
948 | | * If the change_in_peak_bitrate flag is set, after the delay period |
949 | | * update the peak_bitrate and the buffer parameters |
950 | | */ |
951 | 0 | if(!ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change) |
952 | 0 | { |
953 | 0 | irc_ba_change_ba_peak_bit_rate( |
954 | 0 | ps_rate_control_api->ps_bit_allocation, |
955 | 0 | (WORD32 *)&ps_rate_control_api->au4_new_peak_bit_rate[0]); |
956 | 0 | irc_change_cbr_vbv_bit_rate( |
957 | 0 | ps_rate_control_api->ps_cbr_buffer, |
958 | 0 | (WORD32 *)&ps_rate_control_api->au4_new_peak_bit_rate[0]); |
959 | 0 | } |
960 | 0 | if(ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change) |
961 | 0 | ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change--; |
962 | 0 | } |
963 | | |
964 | 73.0k | if(!i4_is_it_a_skip) |
965 | 73.0k | { |
966 | | /******************************************************************* |
967 | | Handle the SCENE CHANGE DETECTED |
968 | | 1) Make the picture type as I, so that updation happens as if it is |
969 | | an I frame |
970 | | 2) Reset model, SAD and flag to restart the estimation process |
971 | | ******************************************************************/ |
972 | 73.0k | if(u1_is_scd) |
973 | 2.80k | { |
974 | 2.80k | WORD32 i4_frm_qp_after_scd; |
975 | 2.80k | UWORD32 u4_prev_I_frm_sad; |
976 | | |
977 | 2.80k | e_pic_type = I_PIC; |
978 | | |
979 | | /* Scale scd qp based on SCD Frm sad and previous I Frm sad */ |
980 | | /* frm_qp_after_scd = (avg_qp * cur_frm_sad)/prev_I_frm_sad */ |
981 | | |
982 | | /* |
983 | | * QP for the next frame should take care of |
984 | | * 1) due to scene change, the current picture has consumed more |
985 | | * bits |
986 | | * 2) relative complexity of the previous scene and the current |
987 | | * scene |
988 | | */ |
989 | | |
990 | | /* Get the intra SAD for the previous scene */ |
991 | 2.80k | u4_prev_I_frm_sad = irc_get_est_sad( |
992 | 2.80k | ps_rate_control_api->ps_est_sad, I_PIC); |
993 | | |
994 | | /* |
995 | | * Scale the QP based on the SAD ratio of the current pic and |
996 | | * previous scene intra SAD |
997 | | */ |
998 | 2.80k | X_PROD_Y_DIV_Z(i4_avg_qp, u4_frame_sad, u4_prev_I_frm_sad, |
999 | 2.80k | i4_frm_qp_after_scd); |
1000 | | |
1001 | | /* Limit the next frame qp by 50% across both the sides */ |
1002 | 2.80k | if(i4_frm_qp_after_scd > ((i4_avg_qp * 3) >> 1)) |
1003 | 1.27k | { |
1004 | 1.27k | i4_frm_qp_after_scd = (i4_avg_qp * 3) >> 1; |
1005 | 1.27k | } |
1006 | 1.52k | else if(i4_frm_qp_after_scd < (i4_avg_qp >> 1)) |
1007 | 386 | { |
1008 | 386 | i4_frm_qp_after_scd = (i4_avg_qp >> 1); |
1009 | 386 | } |
1010 | | |
1011 | | /* |
1012 | | * Ensure that the next frame QP is within the min_max limit of |
1013 | | * QP allowed |
1014 | | */ |
1015 | 2.80k | if(i4_frm_qp_after_scd |
1016 | 2.80k | > ps_rate_control_api->au1_min_max_qp[(e_pic_type |
1017 | 2.80k | << 1) + 1]) |
1018 | 681 | { |
1019 | 681 | i4_frm_qp_after_scd = |
1020 | 681 | ps_rate_control_api->au1_min_max_qp[(e_pic_type |
1021 | 681 | << 1) + 1]; |
1022 | 681 | } |
1023 | 2.11k | else if(i4_frm_qp_after_scd |
1024 | 2.11k | < ps_rate_control_api->au1_min_max_qp[(e_pic_type |
1025 | 2.11k | << 1)]) |
1026 | 413 | { |
1027 | 413 | i4_frm_qp_after_scd = |
1028 | 413 | ps_rate_control_api->au1_min_max_qp[(e_pic_type |
1029 | 413 | << 1)]; |
1030 | 413 | } |
1031 | | |
1032 | | /* Update the state var */ |
1033 | 2.80k | ps_rate_control_api->u1_frm_qp_after_scd = |
1034 | 2.80k | (UWORD8)i4_frm_qp_after_scd; |
1035 | | |
1036 | | /* re-set model */ |
1037 | 11.2k | for(i = 0; i < MAX_PIC_TYPE; i++) |
1038 | 8.40k | { |
1039 | 8.40k | irc_reset_frm_rc_rd_model( |
1040 | 8.40k | ps_rate_control_api->aps_rd_model[i]); |
1041 | 8.40k | } |
1042 | | |
1043 | | /* Reset the SAD estimation module */ |
1044 | 2.80k | irc_reset_est_sad(ps_rate_control_api->ps_est_sad); |
1045 | | |
1046 | | /* Reset flag */ |
1047 | 11.2k | for(i = 0; i < MAX_PIC_TYPE; i++) |
1048 | 8.40k | { |
1049 | 8.40k | ps_rate_control_api->au1_is_first_frm_coded[i] = 0; |
1050 | 8.40k | } |
1051 | | |
1052 | | /* Reset the MB Rate control */ |
1053 | 2.80k | irc_init_mb_level_rc(ps_rate_control_api->ps_mb_rate_control); |
1054 | | |
1055 | | /*Set u1_scd_detected flag*/ |
1056 | 2.80k | ps_rate_control_api->u1_scd_detected = 1; |
1057 | | |
1058 | | /* |
1059 | | * Adjust the average QP for the frame based on bits |
1060 | | * consumption |
1061 | | */ |
1062 | | /* |
1063 | | * Initialize the QP for each picture type according to the |
1064 | | * average QP of the SCD pic |
1065 | | */ |
1066 | 2.80k | ps_rate_control_api->au1_prev_frm_qp[I_PIC] = (UWORD8)i4_avg_qp; |
1067 | | |
1068 | 2.80k | TRACE_PRINTF((const WORD8*)"SCD DETECTED\n"); |
1069 | 2.80k | } |
1070 | 70.2k | else |
1071 | 70.2k | { |
1072 | 70.2k | ps_rate_control_api->u1_scd_detected = 0; |
1073 | | /************************************************************** |
1074 | | Update the Qp used by the current frame |
1075 | | **************************************************************/ |
1076 | 70.2k | ps_rate_control_api->au1_prev_frm_qp[e_pic_type] = |
1077 | 70.2k | (UWORD8)i4_avg_qp; |
1078 | 70.2k | } |
1079 | | |
1080 | | /******************************************************************** |
1081 | | Update the model of the correponding picture type |
1082 | | NOTE: For SCD, we force the frame type from 'P' to that of a 'I' |
1083 | | ******************************************************************/ |
1084 | | /* |
1085 | | * For very simple sequences no bits are consumed by texture. These |
1086 | | * frames do not add any information to the model and so not added |
1087 | | */ |
1088 | 73.0k | if(i4_tot_texture_bits && u4_frame_sad) |
1089 | 47.3k | { |
1090 | 47.3k | irc_add_frame_to_rd_model( |
1091 | 47.3k | ps_rate_control_api->aps_rd_model[e_pic_type], |
1092 | 47.3k | i4_tot_texture_bits, (UWORD8)i4_avg_qp, |
1093 | 47.3k | u4_frame_sad, u1_num_skips); |
1094 | | |
1095 | | /* |
1096 | | * At least one proper frame in added into the model. Until that |
1097 | | * keep using the initial QP |
1098 | | */ |
1099 | 47.3k | ps_rate_control_api->au1_is_first_frm_coded[e_pic_type] = 1; |
1100 | 47.3k | } |
1101 | | |
1102 | 73.0k | if(i4_avg_activity) |
1103 | 0 | { |
1104 | | /* Update the mb_level model */ |
1105 | 0 | irc_mb_update_frame_level( |
1106 | 0 | ps_rate_control_api->ps_mb_rate_control, |
1107 | 0 | i4_avg_activity); |
1108 | 0 | } |
1109 | | |
1110 | | /****************************************************************** |
1111 | | Update the sad estimation module |
1112 | | NOTE: For SCD, we force the frame type from 'P' to that of a 'I' |
1113 | | ******************************************************************/ |
1114 | 73.0k | if(u4_frame_sad) |
1115 | 68.1k | { |
1116 | 68.1k | irc_update_actual_sad(ps_rate_control_api->ps_est_sad, |
1117 | 68.1k | u4_frame_sad, e_pic_type); |
1118 | | |
1119 | 68.1k | irc_update_actual_sad_for_intra(ps_rate_control_api->ps_est_sad, |
1120 | 68.1k | i4_intra_frm_cost); |
1121 | 68.1k | } |
1122 | | |
1123 | | /* |
1124 | | * Update the variable which denotes that a frame has been |
1125 | | * encountered |
1126 | | */ |
1127 | 73.0k | ps_rate_control_api->u1_is_first_frm = 0; |
1128 | | |
1129 | 73.0k | } |
1130 | 73.0k | } |
1131 | | |
1132 | | /* Store the prev encoded picture type for restricting Qp swing */ |
1133 | 105k | if((e_pic_type == I_PIC) || (e_pic_type == P_PIC)) |
1134 | 90.6k | { |
1135 | 90.6k | ps_rate_control_api->prev_ref_pic_type = e_pic_type; |
1136 | 90.6k | } |
1137 | | |
1138 | 105k | TRACE_PRINTF((const WORD8*)"ft %d,hb %d,tb %d,qp %d,fs %d\n", e_pic_type, |
1139 | 105k | i4_model_updation_hdr_bits, i4_tot_texture_bits, i4_avg_qp, |
1140 | 105k | u4_frame_sad); |
1141 | | |
1142 | 105k | return; |
1143 | 105k | } |
1144 | | |
1145 | | /******************************************************************************* |
1146 | | MB Level API functions |
1147 | | ******************************************************************************/ |
1148 | | |
1149 | | /****************************************************************************** |
1150 | | Function Name : irc_init_mb_rc_frame_level |
1151 | | Description : Initialise the frame level details required for a mb level |
1152 | | ******************************************************************************/ |
1153 | | |
1154 | | void irc_init_mb_rc_frame_level(rate_control_api_t *ps_rate_control_api, |
1155 | | UWORD8 u1_frame_qp) |
1156 | 0 | { |
1157 | 0 | irc_mb_init_frame_level(ps_rate_control_api->ps_mb_rate_control, |
1158 | 0 | u1_frame_qp); |
1159 | 0 | } |
1160 | | |
1161 | | /****************************************************************************** |
1162 | | Function Name : irc_get_mb_level_qp |
1163 | | Description : Get the mb level qp |
1164 | | *****************************************************************************/ |
1165 | | void irc_get_mb_level_qp(rate_control_api_t *ps_rate_control_api, |
1166 | | WORD32 i4_cur_mb_activity, |
1167 | | WORD32 *pi4_mb_qp, |
1168 | | picture_type_e e_pic_type) |
1169 | 0 | { |
1170 | 0 | if(ps_rate_control_api->u1_is_mb_level_rc_on) |
1171 | 0 | { |
1172 | 0 | irc_get_mb_qp(ps_rate_control_api->ps_mb_rate_control, |
1173 | 0 | i4_cur_mb_activity, pi4_mb_qp); |
1174 | | |
1175 | | /* Truncating the QP to the Max and Min Qp values possible */ |
1176 | 0 | if(pi4_mb_qp[1] < ps_rate_control_api->au1_min_max_qp[e_pic_type << 1]) |
1177 | 0 | { |
1178 | 0 | pi4_mb_qp[1] = ps_rate_control_api->au1_min_max_qp[e_pic_type << 1]; |
1179 | 0 | } |
1180 | 0 | if(pi4_mb_qp[1] |
1181 | 0 | > ps_rate_control_api->au1_min_max_qp[(e_pic_type << 1) |
1182 | 0 | + 1]) |
1183 | 0 | { |
1184 | 0 | pi4_mb_qp[1] = ps_rate_control_api->au1_min_max_qp[(e_pic_type << 1) |
1185 | 0 | + 1]; |
1186 | 0 | } |
1187 | 0 | } |
1188 | 0 | else |
1189 | 0 | { |
1190 | 0 | WORD32 i4_qp; |
1191 | 0 | i4_qp = irc_get_frm_level_qp(ps_rate_control_api->ps_mb_rate_control); |
1192 | | /* Both the qp are used for */ |
1193 | 0 | pi4_mb_qp[0] = i4_qp; /* Used as feedback for the rate control */ |
1194 | 0 | pi4_mb_qp[1] = i4_qp; /* Used for quantising the MB*/ |
1195 | 0 | } |
1196 | 0 | } |
1197 | | |
1198 | | /**************************************************************************** |
1199 | | Function Name : irc_get_bits_to_stuff |
1200 | | Description : Gets the bits to stuff to prevent Underflow of Encoder Buffer |
1201 | | *****************************************************************************/ |
1202 | | WORD32 irc_get_bits_to_stuff(rate_control_api_t *ps_rate_control_api, |
1203 | | WORD32 i4_tot_consumed_bits, |
1204 | | picture_type_e e_pic_type) |
1205 | 3.48k | { |
1206 | 3.48k | WORD32 i4_bits_to_stuff; |
1207 | | /* Get the CBR bits to stuff*/ |
1208 | 3.48k | i4_bits_to_stuff = irc_get_cbr_bits_to_stuff( |
1209 | 3.48k | ps_rate_control_api->ps_cbr_buffer, i4_tot_consumed_bits, |
1210 | 3.48k | e_pic_type); |
1211 | 3.48k | return i4_bits_to_stuff; |
1212 | 3.48k | } |
1213 | | |
1214 | | /**************************************************************************** |
1215 | | Function Name : irc_get_prev_frm_est_bits |
1216 | | Description : Returns previous frame estimated bits |
1217 | | *****************************************************************************/ |
1218 | | WORD32 irc_get_prev_frm_est_bits(rate_control_api_t *ps_rate_control_api) |
1219 | 365k | { |
1220 | 365k | return (ps_rate_control_api->i4_prev_frm_est_bits); |
1221 | 365k | } |
1222 | | |
1223 | | /****************************************************************************** |
1224 | | Control Level API functions |
1225 | | Logic: The control call sets the state structure of the rate control api |
1226 | | accordingly such that the next process call would implement the same. |
1227 | | ******************************************************************************/ |
1228 | | |
1229 | | void irc_change_inter_frm_int_call(rate_control_api_t *ps_rate_control_api, |
1230 | | WORD32 i4_inter_frm_int) |
1231 | 0 | { |
1232 | 0 | irc_pic_handling_register_new_inter_frm_interval( |
1233 | 0 | ps_rate_control_api->ps_pic_handling, i4_inter_frm_int); |
1234 | 0 | } |
1235 | | |
1236 | | void irc_change_intra_frm_int_call(rate_control_api_t *ps_rate_control_api, |
1237 | | WORD32 i4_intra_frm_int) |
1238 | 15.6k | { |
1239 | 15.6k | irc_pic_handling_register_new_int_frm_interval( |
1240 | 15.6k | ps_rate_control_api->ps_pic_handling, i4_intra_frm_int); |
1241 | | |
1242 | 15.6k | if(ps_rate_control_api->e_rc_type == VBR_STREAMING) |
1243 | 0 | { |
1244 | 0 | irc_change_vsp_ifi(&ps_rate_control_api->s_vbr_str_prms, |
1245 | 0 | i4_intra_frm_int); |
1246 | 0 | } |
1247 | 15.6k | } |
1248 | | |
1249 | | /**************************************************************************** |
1250 | | Function Name : irc_change_avg_bit_rate |
1251 | | Description : Whenever the average bit rate changes, the excess bits is |
1252 | | between the changed bit rate and the old one is re-distributed |
1253 | | in the bit allocation module |
1254 | | *****************************************************************************/ |
1255 | | void irc_change_avg_bit_rate(rate_control_api_t *ps_rate_control_api, |
1256 | | UWORD32 u4_average_bit_rate) |
1257 | 11.2k | { |
1258 | 11.2k | int i; |
1259 | 11.2k | if(ps_rate_control_api->e_rc_type != CONST_QP) |
1260 | 11.2k | { |
1261 | | /* |
1262 | | * Bit Allocation Module: distribute the excess/deficit bits between the |
1263 | | * old and the new frame rate to all the remaining frames |
1264 | | */ |
1265 | 11.2k | irc_ba_change_remaining_bits_in_period( |
1266 | 11.2k | ps_rate_control_api->ps_bit_allocation, |
1267 | 11.2k | ps_rate_control_api->ps_pic_handling, |
1268 | 11.2k | u4_average_bit_rate, |
1269 | 11.2k | irc_ba_get_frame_rate( |
1270 | 11.2k | ps_rate_control_api->ps_bit_allocation), |
1271 | 11.2k | (WORD32 *)(ps_rate_control_api->au4_new_peak_bit_rate)); |
1272 | 11.2k | } |
1273 | 11.2k | if(ps_rate_control_api->e_rc_type == CBR_NLDRC) |
1274 | 6.17k | { |
1275 | 6.17k | UWORD32 u4_average_bit_rate_copy[MAX_NUM_DRAIN_RATES]; |
1276 | 18.5k | for(i = 0; i < MAX_NUM_DRAIN_RATES; i++) |
1277 | 12.3k | { |
1278 | 12.3k | u4_average_bit_rate_copy[i] = u4_average_bit_rate; |
1279 | 12.3k | } |
1280 | 6.17k | irc_change_cbr_vbv_bit_rate(ps_rate_control_api->ps_cbr_buffer, |
1281 | 6.17k | (WORD32 *)(u4_average_bit_rate_copy)); |
1282 | 6.17k | } |
1283 | | |
1284 | | /* |
1285 | | * This is done only for average bitrate changing somewhere after the model |
1286 | | * stabilizes.Here it is assumed that user will not do this call after |
1287 | | * first few frames. If we dont have this check, what would happen is since |
1288 | | * the model has not stabilized, also bitrate has changed before the first |
1289 | | * frame, we dont restrict the qp. Qp can go to very bad values after init |
1290 | | * qp since if swing is disabled. |
1291 | | * This check will become buggy if change bitrate is called say somewhere |
1292 | | * after first two frames.Bottom line - RC init is done during create and |
1293 | | * this call is done just before first process.And we want to differentiate |
1294 | | * between this call done before first process and the call which is done |
1295 | | * during run time |
1296 | | */ |
1297 | 11.2k | if(ps_rate_control_api->u1_is_first_frm == 0) |
1298 | 989 | { |
1299 | 3.95k | for(i = 0; i < MAX_PIC_TYPE; i++) |
1300 | 2.96k | { |
1301 | 2.96k | ps_rate_control_api->au1_avg_bitrate_changed[i] = 1; |
1302 | 2.96k | } |
1303 | 989 | } |
1304 | 11.2k | } |
1305 | | |
1306 | | /**************************************************************************** |
1307 | | Function Name : irc_change_frame_rate |
1308 | | Description : Does the necessary changes whenever there is a change in |
1309 | | frame rate |
1310 | | *****************************************************************************/ |
1311 | | void irc_change_frame_rate(rate_control_api_t *ps_rate_control_api, |
1312 | | UWORD32 u4_frame_rate, |
1313 | | UWORD32 u4_src_ticks, |
1314 | | UWORD32 u4_tgt_ticks) |
1315 | 25.7k | { |
1316 | | |
1317 | 25.7k | if(ps_rate_control_api->e_rc_type != CONST_QP) |
1318 | 17.5k | { |
1319 | 17.5k | UWORD32 u4_frms_in_delay_prd = ((u4_frame_rate |
1320 | 17.5k | * irc_get_cbr_buffer_delay( |
1321 | 17.5k | ps_rate_control_api->ps_cbr_buffer)) |
1322 | 17.5k | / 1000000); |
1323 | 17.5k | if((ps_rate_control_api->e_rc_type == VBR_STORAGE) |
1324 | 17.5k | || (ps_rate_control_api->e_rc_type |
1325 | 10.4k | == VBR_STORAGE_DVD_COMP)) |
1326 | 7.09k | { |
1327 | 7.09k | irc_change_vbr_vbv_frame_rate( |
1328 | 7.09k | ps_rate_control_api->ps_vbr_storage_vbv, |
1329 | 7.09k | u4_frame_rate); |
1330 | 7.09k | } |
1331 | 10.4k | else if(ps_rate_control_api->e_rc_type == CBR_NLDRC) |
1332 | 10.4k | { |
1333 | 10.4k | irc_change_cbr_vbv_tgt_frame_rate( |
1334 | 10.4k | ps_rate_control_api->ps_cbr_buffer, u4_frame_rate); |
1335 | 10.4k | } |
1336 | 0 | else if(ps_rate_control_api->e_rc_type == VBR_STREAMING) |
1337 | 0 | { |
1338 | 0 | UWORD32 au4_num_pics_in_delay_prd[MAX_PIC_TYPE]; |
1339 | 0 | irc_change_vsp_tgt_ticks(&ps_rate_control_api->s_vbr_str_prms, |
1340 | 0 | u4_tgt_ticks); |
1341 | 0 | irc_change_vsp_src_ticks(&ps_rate_control_api->s_vbr_str_prms, |
1342 | 0 | u4_src_ticks); |
1343 | 0 | irc_change_vsp_fidp(&ps_rate_control_api->s_vbr_str_prms, |
1344 | 0 | u4_frms_in_delay_prd); |
1345 | |
|
1346 | 0 | irc_get_vsp_num_pics_in_dly_prd( |
1347 | 0 | &ps_rate_control_api->s_vbr_str_prms, |
1348 | 0 | au4_num_pics_in_delay_prd); |
1349 | 0 | irc_change_cbr_vbv_tgt_frame_rate( |
1350 | 0 | ps_rate_control_api->ps_cbr_buffer, u4_frame_rate); |
1351 | 0 | irc_change_cbr_vbv_num_pics_in_delay_period( |
1352 | 0 | ps_rate_control_api->ps_cbr_buffer, |
1353 | 0 | au4_num_pics_in_delay_prd); |
1354 | 0 | } |
1355 | | |
1356 | | /* |
1357 | | * Bit Allocation Module: distribute the excess/deficit bits between the |
1358 | | * old and the new frame rate to all the remaining frames |
1359 | | */ |
1360 | 17.5k | irc_ba_change_remaining_bits_in_period( |
1361 | 17.5k | ps_rate_control_api->ps_bit_allocation, |
1362 | 17.5k | ps_rate_control_api->ps_pic_handling, |
1363 | 17.5k | irc_ba_get_bit_rate( |
1364 | 17.5k | ps_rate_control_api->ps_bit_allocation), |
1365 | 17.5k | u4_frame_rate, |
1366 | 17.5k | (WORD32 *)(ps_rate_control_api->au4_new_peak_bit_rate)); |
1367 | 17.5k | } |
1368 | 25.7k | } |
1369 | | |
1370 | | /**************************************************************************** |
1371 | | Function Name : irc_change_frm_rate_for_bit_alloc |
1372 | | Description : Does the necessary changes only in the bit_allocation module |
1373 | | there is a change in frame rate |
1374 | | *****************************************************************************/ |
1375 | | void irc_change_frm_rate_for_bit_alloc(rate_control_api_t *ps_rate_control_api, |
1376 | | UWORD32 u4_frame_rate) |
1377 | 153k | { |
1378 | | |
1379 | 153k | if(ps_rate_control_api->e_rc_type != CONST_QP) |
1380 | 105k | { |
1381 | | /* |
1382 | | * Bit Allocation Module: distribute the excess/deficit bits between the |
1383 | | * old and the new frame rate to all the remaining frames |
1384 | | */ |
1385 | 105k | irc_ba_change_remaining_bits_in_period( |
1386 | 105k | ps_rate_control_api->ps_bit_allocation, |
1387 | 105k | ps_rate_control_api->ps_pic_handling, |
1388 | 105k | irc_ba_get_bit_rate( |
1389 | 105k | ps_rate_control_api->ps_bit_allocation), |
1390 | 105k | u4_frame_rate, |
1391 | 105k | (WORD32 *)(ps_rate_control_api->au4_new_peak_bit_rate)); |
1392 | | |
1393 | 105k | if(ps_rate_control_api->e_rc_type == VBR_STORAGE |
1394 | 105k | || ps_rate_control_api->e_rc_type |
1395 | 60.4k | == VBR_STORAGE_DVD_COMP) |
1396 | 45.1k | { |
1397 | 45.1k | irc_change_vbr_max_bits_per_tgt_frm( |
1398 | 45.1k | ps_rate_control_api->ps_vbr_storage_vbv, |
1399 | 45.1k | u4_frame_rate); |
1400 | 45.1k | } |
1401 | 105k | } |
1402 | 153k | } |
1403 | | |
1404 | | void irc_change_init_qp(rate_control_api_t *ps_rate_control_api, |
1405 | | UWORD8 *pu1_init_qp) |
1406 | 9.54k | { |
1407 | 9.54k | WORD32 i; |
1408 | | /* Initialize the init_qp */ |
1409 | 38.1k | for(i = 0; i < MAX_PIC_TYPE; i++) |
1410 | 28.6k | { |
1411 | 28.6k | ps_rate_control_api->au1_init_qp[i] = pu1_init_qp[i]; |
1412 | 28.6k | ps_rate_control_api->au1_prev_frm_qp[i] = pu1_init_qp[i]; |
1413 | 28.6k | } |
1414 | 9.54k | } |
1415 | | |
1416 | | void irc_change_min_max_qp(rate_control_api_t *ps_rate_control_api, |
1417 | | UWORD8 *pu1_min_max_qp) |
1418 | 4.75k | { |
1419 | 4.75k | WORD32 i; |
1420 | 19.0k | for(i = 0; i < MAX_PIC_TYPE; i++) |
1421 | 14.2k | { |
1422 | 14.2k | ps_rate_control_api->au1_min_max_qp[(i << 1)] = |
1423 | 14.2k | pu1_min_max_qp[(i << 1)]; |
1424 | 14.2k | ps_rate_control_api->au1_min_max_qp[(i << 1) + 1] = pu1_min_max_qp[(i |
1425 | 14.2k | << 1) + 1]; |
1426 | 14.2k | } |
1427 | 4.75k | } |
1428 | | |
1429 | | /**************************************************************************** |
1430 | | Function Name : irc_change_peak_bit_rate |
1431 | | Description : Does the necessary changes whenever there is a change in |
1432 | | peak bit rate |
1433 | | *****************************************************************************/ |
1434 | | WORD32 irc_change_peak_bit_rate(rate_control_api_t *ps_rate_control_api, |
1435 | | UWORD32 *pu4_peak_bit_rate) |
1436 | 0 | { |
1437 | 0 | WORD32 i4_ret_val = RC_OK; |
1438 | 0 | int i; |
1439 | | |
1440 | | /* |
1441 | | * Buffer Mechanism Module: Re-initialize the number of bits consumed per |
1442 | | * frame |
1443 | | */ |
1444 | 0 | if(ps_rate_control_api->e_rc_type == VBR_STORAGE |
1445 | 0 | || ps_rate_control_api->e_rc_type == VBR_STORAGE_DVD_COMP) |
1446 | 0 | { |
1447 | | /* Send the new peak bit rate and the old frame rate */ |
1448 | 0 | irc_change_vbr_vbv_bit_rate(ps_rate_control_api->ps_vbr_storage_vbv, |
1449 | 0 | pu4_peak_bit_rate[0]); |
1450 | 0 | irc_ba_change_ba_peak_bit_rate(ps_rate_control_api->ps_bit_allocation, |
1451 | 0 | (WORD32 *)pu4_peak_bit_rate); |
1452 | |
|
1453 | 0 | for(i = 0; i < MAX_NUM_DRAIN_RATES; i++) |
1454 | 0 | { |
1455 | 0 | ps_rate_control_api->au4_new_peak_bit_rate[i] = |
1456 | 0 | pu4_peak_bit_rate[i]; |
1457 | 0 | } |
1458 | 0 | } |
1459 | 0 | else if(ps_rate_control_api->e_rc_type == VBR_STREAMING) |
1460 | 0 | { |
1461 | 0 | if(ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change) |
1462 | 0 | { |
1463 | | /* |
1464 | | * Means that change in peak bit rate has been made twice before the |
1465 | | * previous change could take effect |
1466 | | */ |
1467 | 0 | i4_ret_val = RC_BENIGN_ERR; |
1468 | 0 | } |
1469 | | /* |
1470 | | * If the change happens before encoding the first frame make the |
1471 | | * effect immediately else delay the effect |
1472 | | */ |
1473 | 0 | if(ps_rate_control_api->u1_is_first_frm) |
1474 | 0 | { |
1475 | 0 | for(i = 0; i < MAX_NUM_DRAIN_RATES; i++) |
1476 | 0 | { |
1477 | 0 | ps_rate_control_api->au4_new_peak_bit_rate[i] = |
1478 | 0 | pu4_peak_bit_rate[i]; |
1479 | 0 | } |
1480 | 0 | irc_ba_change_ba_peak_bit_rate( |
1481 | 0 | ps_rate_control_api->ps_bit_allocation, |
1482 | 0 | (WORD32 *)pu4_peak_bit_rate); |
1483 | 0 | irc_change_cbr_vbv_bit_rate(ps_rate_control_api->ps_cbr_buffer, |
1484 | 0 | (WORD32 *)pu4_peak_bit_rate); |
1485 | 0 | } |
1486 | 0 | else |
1487 | 0 | { |
1488 | 0 | UWORD32 au4_num_pics_in_delay_prd[MAX_NUM_DRAIN_RATES]; |
1489 | | /* |
1490 | | * Else store the number of frames after which the effect should |
1491 | | * happen and then update the peak bitrate |
1492 | | */ |
1493 | 0 | ps_rate_control_api->u4_frms_in_delay_prd_for_peak_bit_rate_change = |
1494 | 0 | irc_get_vsp_num_pics_in_dly_prd( |
1495 | 0 | &ps_rate_control_api->s_vbr_str_prms, |
1496 | 0 | au4_num_pics_in_delay_prd); |
1497 | 0 | for(i = 0; i < MAX_NUM_DRAIN_RATES; i++) |
1498 | 0 | { |
1499 | 0 | ps_rate_control_api->au4_new_peak_bit_rate[i] = |
1500 | 0 | pu4_peak_bit_rate[i]; |
1501 | 0 | } |
1502 | 0 | } |
1503 | 0 | } |
1504 | |
|
1505 | 0 | return (i4_ret_val); |
1506 | 0 | } |
1507 | | |
1508 | | void irc_change_buffer_delay(rate_control_api_t *ps_rate_control_api, |
1509 | | UWORD32 u4_buffer_delay) |
1510 | 0 | { |
1511 | 0 | UWORD32 u4_frms_in_delay_prd = ((irc_ba_get_frame_rate( |
1512 | 0 | ps_rate_control_api->ps_bit_allocation) * u4_buffer_delay) |
1513 | 0 | / 1000000); |
1514 | | |
1515 | | /* Initialize the rate control modules */ |
1516 | 0 | if(ps_rate_control_api->e_rc_type == CBR_NLDRC) |
1517 | 0 | { |
1518 | 0 | irc_change_cbr_buffer_delay(ps_rate_control_api->ps_cbr_buffer, |
1519 | 0 | u4_buffer_delay); |
1520 | 0 | } |
1521 | 0 | else if(ps_rate_control_api->e_rc_type == VBR_STORAGE |
1522 | 0 | || ps_rate_control_api->e_rc_type == VBR_STORAGE_DVD_COMP) |
1523 | 0 | { |
1524 | 0 | UWORD32 au4_num_pics_in_delay_prd[MAX_PIC_TYPE]; |
1525 | |
|
1526 | 0 | irc_change_vsp_fidp(&ps_rate_control_api->s_vbr_str_prms, |
1527 | 0 | u4_frms_in_delay_prd); |
1528 | | |
1529 | | /* Get the number of pics of each type in delay period */ |
1530 | 0 | irc_get_vsp_num_pics_in_dly_prd(&ps_rate_control_api->s_vbr_str_prms, |
1531 | 0 | au4_num_pics_in_delay_prd); |
1532 | |
|
1533 | 0 | irc_change_cbr_vbv_num_pics_in_delay_period( |
1534 | 0 | ps_rate_control_api->ps_cbr_buffer, |
1535 | 0 | au4_num_pics_in_delay_prd); |
1536 | 0 | } |
1537 | 0 | } |
1538 | | |
1539 | | /* Getter functions to get the current rate control parameters */ |
1540 | | UWORD32 irc_get_frame_rate(rate_control_api_t *ps_rate_control_api) |
1541 | 0 | { |
1542 | 0 | return (irc_ba_get_frame_rate(ps_rate_control_api->ps_bit_allocation)); |
1543 | 0 | } |
1544 | | |
1545 | | UWORD32 irc_get_bit_rate(rate_control_api_t *ps_rate_control_api) |
1546 | 0 | { |
1547 | 0 | return (irc_ba_get_bit_rate(ps_rate_control_api->ps_bit_allocation)); |
1548 | 0 | } |
1549 | | |
1550 | | UWORD32 irc_get_peak_bit_rate(rate_control_api_t *ps_rate_control_api, |
1551 | | WORD32 i4_index) |
1552 | 0 | { |
1553 | 0 | return (ps_rate_control_api->au4_new_peak_bit_rate[i4_index]); |
1554 | 0 | } |
1555 | | |
1556 | | UWORD32 irc_get_intra_frame_interval(rate_control_api_t *ps_rate_control_api) |
1557 | 96.8k | { |
1558 | 96.8k | return (irc_pic_type_get_intra_frame_interval( |
1559 | 96.8k | ps_rate_control_api->ps_pic_handling)); |
1560 | 96.8k | } |
1561 | | |
1562 | | UWORD32 irc_get_inter_frame_interval(rate_control_api_t *ps_rate_control_api) |
1563 | 0 | { |
1564 | 0 | return (irc_pic_type_get_inter_frame_interval( |
1565 | 0 | ps_rate_control_api->ps_pic_handling)); |
1566 | 0 | } |
1567 | | |
1568 | | rc_type_e irc_get_rc_type(rate_control_api_t *ps_rate_control_api) |
1569 | 62.5k | { |
1570 | 62.5k | return (ps_rate_control_api->e_rc_type); |
1571 | 62.5k | } |
1572 | | |
1573 | | WORD32 irc_get_bits_per_frame(rate_control_api_t *ps_rate_control_api) |
1574 | 96.8k | { |
1575 | 96.8k | WORD32 i4_bits_per_frm; |
1576 | | |
1577 | 96.8k | X_PROD_Y_DIV_Z(irc_ba_get_bit_rate(ps_rate_control_api->ps_bit_allocation), |
1578 | 96.8k | (UWORD32)1000, |
1579 | 96.8k | irc_ba_get_frame_rate(ps_rate_control_api->ps_bit_allocation), |
1580 | 96.8k | i4_bits_per_frm); |
1581 | | |
1582 | 96.8k | return (i4_bits_per_frm); |
1583 | 96.8k | } |
1584 | | |
1585 | | UWORD32 irc_get_max_delay(rate_control_api_t *ps_rate_control_api) |
1586 | 0 | { |
1587 | 0 | return (irc_get_cbr_buffer_delay(ps_rate_control_api->ps_cbr_buffer)); |
1588 | 0 | } |
1589 | | |
1590 | | UWORD32 irc_get_seq_no(rate_control_api_t *ps_rate_control_api) |
1591 | 0 | { |
1592 | 0 | return (irc_pic_type_get_disp_order_no(ps_rate_control_api->ps_pic_handling)); |
1593 | 0 | } |
1594 | | |
1595 | | UWORD32 irc_get_rem_frames_in_gop(rate_control_api_t *ps_rate_control_api) |
1596 | 0 | { |
1597 | 0 | WORD32 ai4_rem_frms_in_period[MAX_PIC_TYPE]; |
1598 | 0 | WORD32 j; |
1599 | 0 | UWORD32 u4_rem_frms_in_period = 0; |
1600 | | |
1601 | | /* Get the rem_frms_in_gop & the frms_in_gop from the pic_type state struct */ |
1602 | 0 | irc_pic_type_get_rem_frms_in_gop(ps_rate_control_api->ps_pic_handling, |
1603 | 0 | ai4_rem_frms_in_period); |
1604 | | |
1605 | | /* Depending on the number of gops in a period, find the num_frms_in_prd */ |
1606 | 0 | for(j = 0; j < MAX_PIC_TYPE; j++) |
1607 | 0 | { |
1608 | 0 | u4_rem_frms_in_period += ai4_rem_frms_in_period[j]; |
1609 | 0 | } |
1610 | |
|
1611 | 0 | return (u4_rem_frms_in_period); |
1612 | 0 | } |
1613 | | |
1614 | | /**************************************************************************** |
1615 | | Function Name : irc_flush_buf_frames |
1616 | | Description : API call to flush the buffered up frames |
1617 | | *****************************************************************************/ |
1618 | | void irc_flush_buf_frames(rate_control_api_t *ps_rate_control_api) |
1619 | 0 | { |
1620 | 0 | irc_flush_frame_from_pic_stack(ps_rate_control_api->ps_pic_handling); |
1621 | 0 | } |
1622 | | |
1623 | | /**************************************************************************** |
1624 | | Function Name : irc_flush_buf_frames |
1625 | | Description : API call to flush the buffered up frames |
1626 | | *****************************************************************************/ |
1627 | | |
1628 | | void irc_post_encode_frame_skip(rate_control_api_t *ps_rate_control_api, |
1629 | | picture_type_e e_pic_type) |
1630 | 0 | { |
1631 | 0 | irc_skip_encoded_frame(ps_rate_control_api->ps_pic_handling, e_pic_type); |
1632 | 0 | } |
1633 | | |
1634 | | /**************************************************************************** |
1635 | | Function Name : irc_force_I_frame |
1636 | | Description : API call to force an I frame |
1637 | | *****************************************************************************/ |
1638 | | void irc_force_I_frame(rate_control_api_t *ps_rate_control_api) |
1639 | 18.4k | { |
1640 | 18.4k | irc_set_force_I_frame_flag(ps_rate_control_api->ps_pic_handling); |
1641 | 18.4k | } |
1642 | | |
1643 | | /**************************************************************************** |
1644 | | * Function Name : rc_get_rem_bits_in_gop |
1645 | | * Description : API call to get remaining bits in GOP |
1646 | | * *****************************************************************************/ |
1647 | | WORD32 irc_get_rem_bits_in_period(rate_control_api_t *ps_rate_control_api) |
1648 | 0 | { |
1649 | 0 | return (irc_ba_get_rem_bits_in_period( |
1650 | 0 | ps_rate_control_api->ps_bit_allocation, |
1651 | 0 | ps_rate_control_api->ps_pic_handling)); |
1652 | 0 | } |
1653 | | |
1654 | | /**************************************************************************** |
1655 | | * Function Name : irc_get_vbv_buf_fullness |
1656 | | * Description : API call to get VBV buffer fullness |
1657 | | ******************************************************************************/ |
1658 | | WORD32 irc_get_vbv_buf_fullness(rate_control_api_t *ps_rate_control_api) |
1659 | 0 | { |
1660 | 0 | return (irc_get_cur_vbv_buf_size(ps_rate_control_api->ps_vbr_storage_vbv)); |
1661 | 0 | } |
1662 | | |
1663 | | WORD32 irc_get_vbv_buf_size(rate_control_api_t *ps_rate_control_api) |
1664 | 156k | { |
1665 | 156k | if(ps_rate_control_api->e_rc_type == CBR_NLDRC |
1666 | 156k | || ps_rate_control_api->e_rc_type == VBR_STREAMING) |
1667 | 72.2k | { |
1668 | 72.2k | return (irc_get_cbr_buffer_size(ps_rate_control_api->ps_cbr_buffer)); |
1669 | 72.2k | } |
1670 | 84.0k | else |
1671 | 84.0k | { |
1672 | 84.0k | return (irc_get_max_vbv_buf_size( |
1673 | 84.0k | ps_rate_control_api->ps_vbr_storage_vbv)); |
1674 | 84.0k | } |
1675 | 156k | } |
1676 | | |
1677 | | WORD32 irc_get_vbv_fulness_with_cur_bits(rate_control_api_t *ps_rate_control_api, |
1678 | | UWORD32 u4_bits) |
1679 | 0 | { |
1680 | 0 | return (irc_vbv_get_vbv_buf_fullness( |
1681 | 0 | ps_rate_control_api->ps_vbr_storage_vbv, u4_bits)); |
1682 | 0 | } |
1683 | | |
1684 | | void irc_set_avg_mb_act(rate_control_api_t *ps_rate_control_api, |
1685 | | WORD32 i4_avg_activity) |
1686 | 0 | { |
1687 | 0 | irc_mb_update_frame_level(ps_rate_control_api->ps_mb_rate_control, |
1688 | 0 | i4_avg_activity); |
1689 | 0 | return; |
1690 | 0 | } |