Coverage Report

Created: 2025-12-29 06:18

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/libavc/decoder/mvc/imvcd_utils.c
Line
Count
Source
1
/******************************************************************************
2
 *
3
 * Copyright (C) 2021 The Android Open Source Project
4
 *
5
 * Licensed under the Apache License, Version 2.0 (the "License");
6
 * you may not use this file except in compliance with the License.
7
 * You may obtain a copy of the License at:
8
 *
9
 * http://www.apache.org/licenses/LICENSE-2.0
10
 *
11
 * Unless required by applicable law or agreed to in writing, software
12
 * distributed under the License is distributed on an "AS IS" BASIS,
13
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
 * See the License for the specific language governing permissions and
15
 * limitations under the License.
16
 *
17
 *****************************************************************************
18
 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19
 */
20
21
/*****************************************************************************/
22
/*                                                                           */
23
/*  File Name         : imvcd_utils.c                                        */
24
/*                                                                           */
25
/*  Description       : MVCD Utility functions used by 'imvcd_api.c'         */
26
/*                                                                           */
27
/*****************************************************************************/
28
#include <string.h>
29
30
#include "ih264_typedefs.h"
31
#include "iv.h"
32
#include "ih264_debug.h"
33
#include "ih264_disp_mgr.h"
34
#include "ih264_macros.h"
35
#include "ih264d_error_handler.h"
36
#include "ih264d_format_conv.h"
37
#include "ih264d_utils.h"
38
#include "imvcd_structs.h"
39
#include "imvcd_utils.h"
40
41
void imvcd_free_ref_bufs(mvc_au_buf_mgr_t *ps_mvc_au_buf_mgr,
42
                         mvc_au_mv_pred_buf_mgr_t *ps_mvc_au_mv_pred_buf_mgr, WORD32 i4_pic_buf_id)
43
59.7k
{
44
59.7k
    ih264_buf_mgr_release(ps_mvc_au_buf_mgr->ps_buf_mgr_ctxt, i4_pic_buf_id, BUF_MGR_REF);
45
46
59.7k
    ih264_buf_mgr_release(ps_mvc_au_mv_pred_buf_mgr->ps_buf_mgr_ctxt,
47
59.7k
                          ps_mvc_au_buf_mgr->au1_au_buf_id_to_mv_buf_id_map[i4_pic_buf_id],
48
59.7k
                          BUF_MGR_REF);
49
59.7k
}
50
51
void imvcd_release_all_ref_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt, WORD32 i4_num_bufs)
52
0
{
53
0
    WORD32 i;
54
55
0
    for(i = 0; i < i4_num_bufs; i++)
56
0
    {
57
0
        ih264_buf_mgr_release(ps_mvcd_ctxt->s_mvc_au_buf_mgr.ps_buf_mgr_ctxt, i, BUF_MGR_REF);
58
59
0
        ih264_buf_mgr_release(ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.ps_buf_mgr_ctxt,
60
0
                              ps_mvcd_ctxt->s_mvc_au_buf_mgr.au1_au_buf_id_to_mv_buf_id_map[i],
61
0
                              BUF_MGR_REF);
62
0
    }
63
0
}
64
65
void imvcd_free_ref_and_io_bufs(mvc_au_buf_mgr_t *ps_mvc_au_buf_mgr,
66
                                mvc_au_mv_pred_buf_mgr_t *ps_mvc_au_mv_pred_buf_mgr,
67
                                WORD32 i4_pic_buf_id)
68
0
{
69
0
    ih264_buf_mgr_release(ps_mvc_au_buf_mgr->ps_buf_mgr_ctxt, i4_pic_buf_id,
70
0
                          BUF_MGR_REF | BUF_MGR_IO);
71
72
0
    ih264_buf_mgr_release(ps_mvc_au_mv_pred_buf_mgr->ps_buf_mgr_ctxt,
73
0
                          ps_mvc_au_buf_mgr->au1_au_buf_id_to_mv_buf_id_map[i4_pic_buf_id],
74
0
                          BUF_MGR_REF | BUF_MGR_IO);
75
0
}
76
77
void imvcd_release_all_ref_and_io_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt, WORD32 i4_num_bufs)
78
0
{
79
0
    WORD32 i;
80
81
0
    for(i = 0; i < i4_num_bufs; i++)
82
0
    {
83
0
        ih264_buf_mgr_release(ps_mvcd_ctxt->s_mvc_au_buf_mgr.ps_buf_mgr_ctxt, i,
84
0
                              BUF_MGR_REF | BUF_MGR_IO);
85
86
0
        ih264_buf_mgr_release(ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.ps_buf_mgr_ctxt,
87
0
                              ps_mvcd_ctxt->s_mvc_au_buf_mgr.au1_au_buf_id_to_mv_buf_id_map[i],
88
0
                              BUF_MGR_REF | BUF_MGR_IO);
89
0
    }
90
0
}
91
92
bool is_header_decoded(WORD32 i4_header_decoded, AVC_EXT_NALU_ID_T e_nalu_id)
93
258k
{
94
    /* Accounting for idiocy in 'ih264d_parse_nal_unit' */
95
258k
    e_nalu_id = (SPS == e_nalu_id) ? UNSPEC_0 : ((PPS == e_nalu_id) ? SLICE_NON_IDR : e_nalu_id);
96
258k
    return !!(i4_header_decoded & (1 << e_nalu_id));
97
258k
}
98
99
bool is_mvc_nalu(AVC_EXT_NALU_ID_T e_nalu_id)
100
146k
{
101
146k
    switch(e_nalu_id)
102
146k
    {
103
68.9k
        case SLICE_NON_IDR:
104
68.9k
        case SLICE_DPA:
105
68.9k
        case SLICE_DPB:
106
68.9k
        case SLICE_DPC:
107
95.6k
        case SLICE_IDR:
108
98.1k
        case PREFIX_NAL:
109
102k
        case SUBSET_SPS:
110
102k
        case CODED_SLICE_EXTENSION:
111
102k
        {
112
102k
            return true;
113
102k
        }
114
44.1k
        default:
115
44.1k
        {
116
44.1k
            return false;
117
102k
        }
118
146k
    }
119
146k
}
120
121
bool is_slice_nalu_type(AVC_EXT_NALU_ID_T e_nalu_id)
122
35
{
123
35
    switch(e_nalu_id)
124
35
    {
125
1
        case SLICE_NON_IDR:
126
1
        case SLICE_DPA:
127
1
        case SLICE_DPB:
128
1
        case SLICE_DPC:
129
3
        case SLICE_IDR:
130
3
        case CODED_SLICE_EXTENSION:
131
32
        case PREFIX_NAL:
132
32
        {
133
32
            return true;
134
3
        }
135
3
        default:
136
3
        {
137
3
            return false;
138
3
        }
139
35
    }
140
35
}
141
142
nalu_mvc_ext_t *imvcd_get_cur_nalu_mvc_ext(mvc_dec_ctxt_t *ps_mvcd_ctxt)
143
565k
{
144
565k
    return &ps_mvcd_ctxt->as_nalu_mvc_ext[ps_mvcd_ctxt->u2_num_views_decoded];
145
565k
}
146
147
nalu_mvc_ext_t *imvcd_get_nalu_mvc_ext(nalu_mvc_ext_t *ps_nalu_mvc_exts,
148
                                       UWORD16 u2_num_views_decoded, UWORD16 u2_view_id)
149
3.02k
{
150
3.02k
    WORD32 i;
151
152
3.02k
    for(i = 0; i < u2_num_views_decoded; i++)
153
3.02k
    {
154
3.02k
        if(ps_nalu_mvc_exts[i].u2_view_id == u2_view_id)
155
3.02k
        {
156
3.02k
            return &ps_nalu_mvc_exts[i];
157
3.02k
        }
158
3.02k
    }
159
160
0
    return NULL;
161
3.02k
}
162
163
ref_pic_list_mod_data_t *imvcd_get_cur_ref_pic_list_mod_data(mvc_dec_ctxt_t *ps_mvcd_ctxt)
164
125k
{
165
125k
    return &ps_mvcd_ctxt->as_ref_pic_list_mod_data[ps_mvcd_ctxt->u2_num_views_decoded];
166
125k
}
167
168
subset_sps_t *imvcd_get_valid_subset_sps(mvc_dec_ctxt_t *ps_mvcd_ctxt)
169
290k
{
170
290k
    if(0 != ps_mvcd_ctxt->u2_num_views_decoded)
171
1.78k
    {
172
1.78k
        dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
173
174
1.78k
        return ps_mvcd_ctxt
175
1.78k
            ->aps_pps_id_to_subset_sps_map[ps_view_ctxt->ps_cur_pps->u1_pic_parameter_set_id];
176
1.78k
    }
177
288k
    else
178
288k
    {
179
288k
        WORD32 i;
180
181
9.30M
        for(i = 0; i < MAX_NUM_SEQ_PARAMS; i++)
182
9.02M
        {
183
9.02M
            if(ps_mvcd_ctxt->as_subset_sps[i].s_sps_data.u1_is_valid)
184
7.26k
            {
185
7.26k
                return &ps_mvcd_ctxt->as_subset_sps[i];
186
7.26k
            }
187
9.02M
        }
188
189
281k
        return NULL;
190
288k
    }
191
290k
}
192
193
void imvcd_modulate_max_disp_seq(dec_struct_t *ps_view_ctxt)
194
149k
{
195
149k
    WORD64 i8_temp;
196
197
149k
    i8_temp = ((WORD64) ps_view_ctxt->i4_prev_max_display_seq) +
198
149k
              ((WORD64) ps_view_ctxt->i4_max_poc) +
199
149k
              ((WORD64) ps_view_ctxt->u1_max_dec_frame_buffering) + 1ll;
200
201
149k
    ps_view_ctxt->i4_prev_max_display_seq = IS_OUT_OF_RANGE_S32(i8_temp) ? 0 : ((WORD32) i8_temp);
202
149k
    ps_view_ctxt->i4_max_poc = 0;
203
149k
}
204
205
mv_pred_t imvcd_get_default_mv_pred(void)
206
62.6k
{
207
62.6k
    mv_pred_t s_mv_pred = {.i2_mv = {0},
208
62.6k
                           .i1_ref_frame = {OUT_OF_RANGE_REF, OUT_OF_RANGE_REF},
209
62.6k
                           .u1_col_ref_pic_idx = UINT8_MAX,
210
62.6k
                           .u1_pic_type = UINT8_MAX};
211
212
62.6k
    return s_mv_pred;
213
62.6k
}
214
215
UWORD32 imvcd_get_max_num_ivp_refs(mvc_dec_ctxt_t *ps_mvcd_ctxt)
216
3.30k
{
217
3.30k
    WORD32 i;
218
219
3.30k
    subset_sps_t *ps_subset_sps = imvcd_get_valid_subset_sps(ps_mvcd_ctxt);
220
221
3.30k
    UWORD32 u4_max_ivp_refs = 0;
222
223
3.30k
    if(!ps_subset_sps)
224
3.17k
    {
225
3.17k
        return u4_max_ivp_refs;
226
3.17k
    }
227
228
354
    for(i = 0; i < ps_subset_sps->s_sps_mvc_ext.u2_num_views; i++)
229
227
    {
230
227
        u4_max_ivp_refs = MAX(
231
227
            u4_max_ivp_refs, ps_subset_sps->s_sps_mvc_ext.as_anchor_ref_data[0][i].u1_num_refs +
232
227
                                 ps_subset_sps->s_sps_mvc_ext.as_anchor_ref_data[1][i].u1_num_refs);
233
227
        u4_max_ivp_refs =
234
227
            MAX(u4_max_ivp_refs,
235
227
                ps_subset_sps->s_sps_mvc_ext.as_non_anchor_ref_data[0][i].u1_num_refs +
236
227
                    ps_subset_sps->s_sps_mvc_ext.as_non_anchor_ref_data[1][i].u1_num_refs);
237
227
    }
238
239
127
    return u4_max_ivp_refs;
240
3.30k
}
241
242
bool imvcd_is_idr_au(mvc_dec_ctxt_t *ps_mvcd_ctxt)
243
402k
{
244
402k
    return (ps_mvcd_ctxt->u2_num_views_decoded > 1)
245
402k
               ? !ps_mvcd_ctxt->as_nalu_mvc_ext->u1_non_idr_flag
246
402k
               : (ps_mvcd_ctxt->ae_nalu_id[0] == SLICE_IDR);
247
402k
}
248
249
coordinates_t imvcd_get_buf_pad_dims(bool b_is_chroma)
250
6.04k
{
251
6.04k
    coordinates_t s_dims;
252
253
    /* Vert pad is '4 * PAD_LEN_UV_V' to account for field Pics */
254
6.04k
    if(b_is_chroma)
255
3.02k
    {
256
3.02k
        s_dims.i4_abscissa = (PAD_LEN_UV_H * 4);
257
3.02k
        s_dims.i4_ordinate = (PAD_LEN_UV_V * 4);
258
3.02k
    }
259
3.02k
    else
260
3.02k
    {
261
3.02k
        s_dims.i4_abscissa = (PAD_LEN_Y_H * 2);
262
3.02k
        s_dims.i4_ordinate = (PAD_LEN_Y_V * 4);
263
3.02k
    }
264
265
6.04k
    return s_dims;
266
6.04k
}
267
268
WORD32 imvcd_get_ref_pic_pad_offset(WORD32 i4_stride, bool b_is_chroma)
269
150k
{
270
150k
    return !b_is_chroma ? (i4_stride * PAD_LEN_Y_V * 2 + PAD_LEN_Y_H)
271
150k
                        : (i4_stride * PAD_LEN_UV_V * 2 + PAD_LEN_UV_H * 2);
272
150k
}
273
274
UWORD32 imvcd_get_next_bits(dec_bit_stream_t *ps_bitstream)
275
0
{
276
0
    UWORD32 u4_next_word;
277
278
0
    NEXTBITS(u4_next_word, ps_bitstream->u4_ofst, ps_bitstream->pu4_buffer, 32);
279
280
0
    return u4_next_word;
281
0
}
282
283
void imvcd_set_view_buf_id_to_buf_map(dec_struct_t *ps_view_ctxt)
284
252k
{
285
252k
    WORD32 i, j;
286
287
252k
    memset(ps_view_ctxt->apv_buf_id_pic_buf_map, 0, sizeof(ps_view_ctxt->apv_buf_id_pic_buf_map));
288
289
758k
    for(i = 0; i < 2; i++)
290
505k
    {
291
1.35M
        for(j = 0; j < ps_view_ctxt->ps_cur_slice->u1_num_ref_idx_lx_active[i]; j++)
292
848k
        {
293
848k
            ps_view_ctxt
294
848k
                ->apv_buf_id_pic_buf_map[ps_view_ctxt->ps_ref_pic_buf_lx[i][j]->u1_pic_buf_id] =
295
848k
                (void *) ps_view_ctxt->ps_ref_pic_buf_lx[i][j];
296
848k
        }
297
505k
    }
298
252k
}
299
300
IV_API_CALL_STATUS_T imvcd_get_next_display_au_buf(mvc_dec_ctxt_t *ps_mvcd_ctxt)
301
93.2k
{
302
93.2k
    mvc_au_buffer_t *ps_au_buf;
303
304
93.2k
    IV_API_CALL_STATUS_T e_retval = IV_FAIL;
305
306
93.2k
    UWORD32 i;
307
93.2k
    WORD32 i4_buf_id;
308
309
93.2k
    dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
310
311
93.2k
    ps_au_buf =
312
93.2k
        (mvc_au_buffer_t *) ih264_disp_mgr_get(&ps_mvcd_ctxt->s_mvc_disp_buf_mgr, &i4_buf_id);
313
314
93.2k
    ps_view_ctxt->i4_display_index = DEFAULT_POC;
315
316
93.2k
    if(ps_au_buf != NULL)
317
75.1k
    {
318
75.1k
        ps_view_ctxt->pv_disp_sei_params = &ps_au_buf->s_sei_pic;
319
75.1k
        ps_view_ctxt->i4_display_index = ps_au_buf->i4_poc;
320
75.1k
        ps_view_ctxt->u4_num_fld_in_frm += 2;
321
75.1k
        ps_view_ctxt->s_disp_op.u4_ts = ps_au_buf->u4_time_stamp;
322
323
75.1k
        e_retval = IV_SUCCESS;
324
75.1k
    }
325
326
93.2k
    if(ps_au_buf)
327
75.1k
    {
328
151k
        for(i = 0; i < ps_mvcd_ctxt->u2_num_views; i++)
329
76.7k
        {
330
76.7k
            yuv_buf_props_t *ps_src = &ps_au_buf->as_view_buffers[i];
331
76.7k
            yuv_buf_props_t *ps_dst = &ps_mvcd_ctxt->s_out_buffer.as_view_buf_props[i];
332
333
76.7k
            WORD32 i4_y_src_stride = ps_src->as_component_bufs[Y].i4_data_stride;
334
76.7k
            WORD32 i4_uv_src_stride = ps_src->as_component_bufs[UV].i4_data_stride;
335
76.7k
            UWORD8 *pu1_y_src = (UWORD8 *) ps_src->as_component_bufs[Y].pv_data;
336
76.7k
            UWORD8 *pu1_uv_src = (UWORD8 *) ps_src->as_component_bufs[UV].pv_data;
337
338
76.7k
            pu1_y_src += (0 == i) ? ps_view_ctxt->u2_crop_offset_y
339
76.7k
                                  : (ps_au_buf->as_disp_offsets[i].u2_left_offset +
340
1.62k
                                     ps_au_buf->as_disp_offsets[i].u2_top_offset * i4_y_src_stride);
341
76.7k
            pu1_uv_src +=
342
76.7k
                (0 == i) ? ps_view_ctxt->u2_crop_offset_uv
343
76.7k
                         : (ps_au_buf->as_disp_offsets[i].u2_left_offset +
344
1.62k
                            (ps_au_buf->as_disp_offsets[i].u2_top_offset * i4_uv_src_stride) / 2);
345
346
76.7k
            ps_dst->u2_width = ps_au_buf->u2_disp_width;
347
76.7k
            ps_dst->u2_height = ps_au_buf->u2_disp_height;
348
349
76.7k
            ASSERT(ps_dst->as_component_bufs[U].i4_data_stride ==
350
76.7k
                   ps_dst->as_component_bufs[V].i4_data_stride);
351
352
76.7k
            ih264d_fmt_conv_420sp_to_420p(
353
76.7k
                pu1_y_src, pu1_uv_src, (UWORD8 *) ps_dst->as_component_bufs[Y].pv_data,
354
76.7k
                (UWORD8 *) ps_dst->as_component_bufs[U].pv_data,
355
76.7k
                (UWORD8 *) ps_dst->as_component_bufs[V].pv_data, ps_dst->u2_width,
356
76.7k
                ps_dst->u2_height, i4_y_src_stride, i4_uv_src_stride,
357
76.7k
                ps_dst->as_component_bufs[Y].i4_data_stride,
358
76.7k
                ps_dst->as_component_bufs[U].i4_data_stride, 1, 0);
359
76.7k
        }
360
361
75.1k
        ih264_buf_mgr_release(ps_mvcd_ctxt->s_mvc_au_buf_mgr.ps_buf_mgr_ctxt,
362
75.1k
                              ps_au_buf->i4_pic_buf_id, BUF_MGR_IO);
363
75.1k
    }
364
365
93.2k
    return e_retval;
366
93.2k
}
367
368
UWORD32 imvcd_get_num_mbs_in_level(UWORD8 u1_level_idc)
369
104k
{
370
104k
    switch(u1_level_idc)
371
104k
    {
372
898
        case H264_LEVEL_1_0:
373
898
        {
374
898
            return MAX_MBS_LEVEL_10;
375
0
        }
376
551
        case H264_LEVEL_1_1:
377
551
        {
378
551
            return MAX_MBS_LEVEL_11;
379
0
        }
380
1.34k
        case H264_LEVEL_1_2:
381
1.34k
        {
382
1.34k
            return MAX_MBS_LEVEL_12;
383
0
        }
384
1.08k
        case H264_LEVEL_1_3:
385
1.08k
        {
386
1.08k
            return MAX_MBS_LEVEL_13;
387
0
        }
388
514
        case H264_LEVEL_2_0:
389
514
        {
390
514
            return MAX_MBS_LEVEL_20;
391
0
        }
392
286
        case H264_LEVEL_2_1:
393
286
        {
394
286
            return MAX_MBS_LEVEL_21;
395
0
        }
396
549
        case H264_LEVEL_2_2:
397
549
        {
398
549
            return MAX_MBS_LEVEL_22;
399
0
        }
400
4.26k
        case H264_LEVEL_3_0:
401
4.26k
        {
402
4.26k
            return MAX_MBS_LEVEL_30;
403
0
        }
404
21.6k
        case H264_LEVEL_3_1:
405
21.6k
        {
406
21.6k
            return MAX_MBS_LEVEL_31;
407
0
        }
408
4.53k
        case H264_LEVEL_3_2:
409
4.53k
        {
410
4.53k
            return MAX_MBS_LEVEL_32;
411
0
        }
412
3.18k
        case H264_LEVEL_4_0:
413
3.18k
        {
414
3.18k
            return MAX_MBS_LEVEL_40;
415
0
        }
416
1.21k
        case H264_LEVEL_4_1:
417
1.21k
        {
418
1.21k
            return MAX_MBS_LEVEL_41;
419
0
        }
420
1.44k
        case H264_LEVEL_4_2:
421
1.44k
        {
422
1.44k
            return MAX_MBS_LEVEL_42;
423
0
        }
424
357
        case H264_LEVEL_5_0:
425
357
        {
426
357
            return MAX_MBS_LEVEL_50;
427
0
        }
428
384
        case H264_LEVEL_5_1:
429
62.6k
        default:
430
62.6k
        {
431
62.6k
            return MAX_MBS_LEVEL_51;
432
384
        }
433
104k
    }
434
104k
}
435
436
WORD16 imvcd_free_dynamic_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt)
437
3.82k
{
438
3.82k
    dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
439
440
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_deblk_pic);
441
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu1_dec_mb_map);
442
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu1_recon_mb_map);
443
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu2_slice_num_map);
444
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_dec_slice_buf);
445
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_frm_mb_info);
446
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pi2_coeff_data);
447
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_parse_mb_data);
448
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_parse_part_params);
449
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_deblk_top_mb);
450
451
3.82k
    if(ps_view_ctxt->p_ctxt_inc_mb_map)
452
3.30k
    {
453
3.30k
        ps_view_ctxt->p_ctxt_inc_mb_map -= 1;
454
3.30k
        PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->p_ctxt_inc_mb_map);
455
3.30k
    }
456
457
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_mv_p[0]);
458
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_mv_p[1]);
459
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_pred_pkd);
460
3.82k
    {
461
3.82k
        UWORD8 i;
462
19.1k
        for(i = 0; i < MV_SCRATCH_BUFS; i++)
463
15.2k
        {
464
15.2k
            PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_mv_top_p[i]);
465
15.2k
        }
466
3.82k
    }
467
468
3.82k
    if(ps_view_ctxt->pu1_y_intra_pred_line)
469
3.30k
    {
470
3.30k
        ps_view_ctxt->pu1_y_intra_pred_line -= MB_SIZE;
471
3.30k
    }
472
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu1_y_intra_pred_line);
473
474
3.82k
    if(ps_view_ctxt->pu1_u_intra_pred_line)
475
3.30k
    {
476
3.30k
        ps_view_ctxt->pu1_u_intra_pred_line -= MB_SIZE;
477
3.30k
    }
478
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu1_u_intra_pred_line);
479
480
3.82k
    if(ps_view_ctxt->pu1_v_intra_pred_line)
481
3.30k
    {
482
3.30k
        ps_view_ctxt->pu1_v_intra_pred_line -= MB_SIZE;
483
3.30k
    }
484
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->pu1_v_intra_pred_line);
485
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_view_ctxt->ps_nbr_mb_row);
486
487
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt, ps_mvcd_ctxt->s_mvc_au_buf_mgr.pv_au_buf_base);
488
3.82k
    PS_DEC_ALIGNED_FREE(ps_view_ctxt,
489
3.82k
                        ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.pv_au_mv_pred_buf_base);
490
491
3.82k
    return OK;
492
3.82k
}
493
494
static UWORD32 imvcd_get_num_au_data_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt)
495
19.8k
{
496
19.8k
    dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
497
498
19.8k
    return ps_view_ctxt->u1_pic_bufs;
499
19.8k
}
500
501
static UWORD32 imvcd_get_num_elements_in_mv_pred_buf(UWORD32 u4_view_wd, UWORD32 u4_view_ht)
502
12.9k
{
503
12.9k
    return (u4_view_wd * (u4_view_ht + PAD_MV_BANK_ROW)) / MB_SIZE;
504
12.9k
}
505
506
static UWORD32 imvcd_get_mv_pred_buf_padding_length(UWORD32 u4_view_wd)
507
141k
{
508
141k
    return (u4_view_wd * OFFSET_MV_BANK_ROW) / MB_SIZE;
509
141k
}
510
511
static UWORD32 imvcd_get_au_mv_pred_buf_size(mvc_dec_ctxt_t *ps_mvcd_ctxt)
512
6.60k
{
513
6.60k
    dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
514
515
6.60k
    UWORD32 u4_num_bufs = imvcd_get_num_au_data_bufs(ps_mvcd_ctxt);
516
517
6.60k
    UWORD32 u4_size = 0;
518
519
6.60k
    u4_size += sizeof(mvc_au_mv_pred_t);
520
521
6.60k
    u4_size +=
522
6.60k
        imvcd_get_num_elements_in_mv_pred_buf(ps_view_ctxt->u2_pic_wd, ps_view_ctxt->u2_pic_ht) *
523
6.60k
        (sizeof(mv_pred_t) + sizeof(UWORD8));
524
525
6.60k
    u4_size *= u4_num_bufs;
526
6.60k
    u4_size *= ps_mvcd_ctxt->u2_num_views;
527
528
6.60k
    return u4_size;
529
6.60k
}
530
531
static UWORD32 imvcd_get_au_buf_size(mvc_dec_ctxt_t *ps_mvcd_ctxt)
532
6.60k
{
533
6.60k
    dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
534
535
6.60k
    UWORD32 u4_size = 0;
536
6.60k
    UWORD32 u4_num_bufs = imvcd_get_num_au_data_bufs(ps_mvcd_ctxt);
537
538
6.60k
    u4_size += sizeof(mvc_au_buffer_t);
539
540
    /* All rvalues below incorporate both padding and pic dimensions */
541
6.60k
    u4_size += ALIGN64(ps_view_ctxt->u2_frm_wd_y * ps_view_ctxt->u2_frm_ht_y) * sizeof(UWORD8);
542
6.60k
    u4_size += ALIGN64(ps_view_ctxt->u2_frm_wd_uv * ps_view_ctxt->u2_frm_ht_uv) * sizeof(UWORD8);
543
544
6.60k
    u4_size *= ps_mvcd_ctxt->u2_num_views;
545
6.60k
    u4_size *= u4_num_bufs;
546
547
6.60k
    return u4_size;
548
6.60k
}
549
550
WORD32 imvcd_init_au_buffers(mvc_dec_ctxt_t *ps_mvcd_ctxt)
551
3.30k
{
552
3.30k
    UWORD32 i, j;
553
3.30k
    UWORD32 u4_luma_size, u4_chroma_size;
554
3.30k
    WORD32 i4_error_code;
555
556
3.30k
    dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
557
558
3.30k
    WORD64 i8_alloc_mem_size = imvcd_get_au_buf_size(ps_mvcd_ctxt);
559
3.30k
    UWORD8 *pu1_buf = (UWORD8 *) ps_mvcd_ctxt->s_mvc_au_buf_mgr.pv_au_buf_base;
560
3.30k
    UWORD32 u4_num_bufs = imvcd_get_num_au_data_bufs(ps_mvcd_ctxt);
561
562
3.30k
    if(ps_mvcd_ctxt->u2_num_views > MAX_NUM_VIEWS)
563
0
    {
564
0
        ps_view_ctxt->i4_error_code = ERROR_BUF_MGR;
565
0
        return ERROR_BUF_MGR;
566
0
    }
567
568
3.30k
    u4_luma_size = ps_view_ctxt->u2_frm_wd_y * ps_view_ctxt->u2_frm_ht_y;
569
3.30k
    u4_chroma_size = ps_view_ctxt->u2_frm_wd_uv * ps_view_ctxt->u2_frm_ht_uv;
570
571
69.9k
    for(i = 0; i < u4_num_bufs; i++)
572
66.6k
    {
573
66.6k
        WORD32 i4_stride;
574
575
66.6k
        mvc_au_buffer_t *ps_au_buf = (mvc_au_buffer_t *) pu1_buf;
576
577
66.6k
        pu1_buf += sizeof(ps_au_buf[0]);
578
579
135k
        for(j = 0; j < ps_mvcd_ctxt->u2_num_views; j++)
580
69.1k
        {
581
69.1k
            i4_stride = ps_view_ctxt->u2_frm_wd_y;
582
69.1k
            ps_au_buf->as_view_buffers[j].as_component_bufs[Y].i4_data_stride = i4_stride;
583
69.1k
            ps_au_buf->as_view_buffers[j].as_component_bufs[Y].pv_data =
584
69.1k
                pu1_buf + imvcd_get_ref_pic_pad_offset(i4_stride, false);
585
69.1k
            pu1_buf += ALIGN64(u4_luma_size) * sizeof(pu1_buf[0]);
586
69.1k
            i8_alloc_mem_size -= ALIGN64(u4_luma_size) * sizeof(pu1_buf[0]);
587
588
69.1k
            i4_stride = ps_view_ctxt->u2_frm_wd_uv;
589
69.1k
            ps_au_buf->as_view_buffers[j].as_component_bufs[UV].i4_data_stride = i4_stride;
590
69.1k
            ps_au_buf->as_view_buffers[j].as_component_bufs[UV].pv_data =
591
69.1k
                pu1_buf + imvcd_get_ref_pic_pad_offset(i4_stride, true);
592
69.1k
            pu1_buf += ALIGN64(u4_chroma_size) * sizeof(pu1_buf[0]);
593
69.1k
            i8_alloc_mem_size -= ALIGN64(u4_chroma_size) * sizeof(pu1_buf[0]);
594
595
69.1k
            ps_au_buf->as_view_buffers[j].as_component_bufs[V].pv_data = NULL;
596
597
69.1k
            ps_au_buf->as_view_buffers[j].u2_height =
598
69.1k
                ps_view_ctxt->ps_cur_sps->u2_frm_ht_in_mbs * MB_SIZE;
599
69.1k
            ps_au_buf->as_view_buffers[j].u2_width =
600
69.1k
                ps_view_ctxt->ps_cur_sps->u2_frm_wd_in_mbs * MB_SIZE;
601
69.1k
            ps_au_buf->as_view_buffers[j].u1_bit_depth = 8;
602
603
69.1k
            ASSERT(i8_alloc_mem_size >= 0);
604
69.1k
        }
605
606
66.6k
        ps_au_buf->i4_pic_buf_id = i;
607
608
66.6k
        i4_error_code =
609
66.6k
            ih264_buf_mgr_add(ps_mvcd_ctxt->s_mvc_au_buf_mgr.ps_buf_mgr_ctxt, ps_au_buf, i);
610
611
66.6k
        if(0 != i4_error_code)
612
0
        {
613
0
            ps_view_ctxt->i4_error_code = ERROR_BUF_MGR;
614
615
0
            return ERROR_BUF_MGR;
616
0
        }
617
618
66.6k
        ps_mvcd_ctxt->s_mvc_au_buf_mgr.aps_buf_id_to_au_buf_map[i] = ps_au_buf;
619
66.6k
    }
620
621
3.30k
    return OK;
622
3.30k
}
623
624
WORD32 imvcd_init_au_mv_pred_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt)
625
3.30k
{
626
3.30k
    UWORD32 i, j;
627
3.30k
    WORD32 buf_ret;
628
629
3.30k
    dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
630
631
3.30k
    UWORD32 u4_width = ps_view_ctxt->u2_pic_wd;
632
3.30k
    UWORD32 u4_height = ps_view_ctxt->u2_pic_ht;
633
3.30k
    UWORD32 u4_mode_info_buf_size = imvcd_get_num_elements_in_mv_pred_buf(u4_width, u4_height);
634
3.30k
    UWORD8 *pu1_buf = ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.pv_au_mv_pred_buf_base;
635
3.30k
    WORD64 i8_alloc_mem_size = imvcd_get_au_mv_pred_buf_size(ps_mvcd_ctxt);
636
3.30k
    UWORD32 u4_num_bufs = imvcd_get_num_au_data_bufs(ps_mvcd_ctxt);
637
638
3.30k
    if(ps_mvcd_ctxt->u2_num_views > MAX_NUM_VIEWS)
639
0
    {
640
0
        return ERROR_BUF_MGR;
641
0
    }
642
643
69.9k
    for(i = 0; i < u4_num_bufs; i++)
644
66.6k
    {
645
66.6k
        mvc_au_mv_pred_t *ps_au_mv_data = (mvc_au_mv_pred_t *) pu1_buf;
646
647
66.6k
        pu1_buf += sizeof(ps_au_mv_data[0]);
648
649
66.6k
        buf_ret = ih264_buf_mgr_add(ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.ps_buf_mgr_ctxt,
650
66.6k
                                    ps_au_mv_data, i);
651
652
66.6k
        if(0 != buf_ret)
653
0
        {
654
0
            return ERROR_BUF_MGR;
655
0
        }
656
657
135k
        for(j = 0; j < ps_mvcd_ctxt->u2_num_views; j++)
658
69.1k
        {
659
69.1k
            UWORD32 u4_mv_buf_size = u4_mode_info_buf_size * sizeof(ps_au_mv_data->aps_mvs[j][0]);
660
69.1k
            UWORD32 u4_mode_desc_buf_size =
661
69.1k
                u4_mode_info_buf_size * sizeof(ps_au_mv_data->apu1_mode_descriptors[j][0]);
662
663
69.1k
            ps_au_mv_data->aps_mvs[j] = (mv_pred_t *) pu1_buf;
664
69.1k
            ps_au_mv_data->aps_mvs[j] += imvcd_get_mv_pred_buf_padding_length(u4_width);
665
69.1k
            pu1_buf += u4_mv_buf_size;
666
69.1k
            i8_alloc_mem_size -= u4_mv_buf_size;
667
668
69.1k
            ps_au_mv_data->apu1_mode_descriptors[j] = pu1_buf;
669
69.1k
            pu1_buf += u4_mode_desc_buf_size;
670
69.1k
            i8_alloc_mem_size -= u4_mode_desc_buf_size;
671
672
69.1k
            memset(ps_au_mv_data->aps_mvs[j] - imvcd_get_mv_pred_buf_padding_length(u4_width), 0,
673
69.1k
                   u4_mv_buf_size);
674
675
69.1k
            memset(ps_au_mv_data->apu1_mode_descriptors[j], 0, u4_mode_desc_buf_size);
676
677
69.1k
            ASSERT(i8_alloc_mem_size >= 0);
678
69.1k
        }
679
66.6k
    }
680
681
3.30k
    return OK;
682
3.30k
}
683
684
WORD32 imvcd_allocate_dynamic_bufs(mvc_dec_ctxt_t *ps_mvcd_ctxt)
685
3.30k
{
686
3.30k
    dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
687
3.30k
    dec_seq_params_t *ps_sps = ps_view_ctxt->ps_cur_sps;
688
689
3.30k
    UWORD32 u4_total_mbs = ps_sps->u4_total_num_of_mbs;
690
3.30k
    UWORD32 u4_wd_mbs = ps_view_ctxt->u2_frm_wd_in_mbs;
691
3.30k
    UWORD32 u4_ht_mbs = ps_view_ctxt->u2_frm_ht_in_mbs;
692
3.30k
    const WORD32 i4_default_alignment = 128;
693
3.30k
    void *pv_mem_ctxt = ps_view_ctxt->pv_mem_ctxt;
694
695
3.30k
    UWORD8 *pu1_buf;
696
3.30k
    WORD32 i4_mem_size;
697
3.30k
    WORD32 i;
698
3.30k
    void *pv_buf;
699
3.30k
    WORD32 i4_num_entries;
700
701
3.30k
    if(ps_mvcd_ctxt->u2_num_views > MAX_NUM_VIEWS)
702
0
    {
703
0
        return IV_FAIL;
704
0
    }
705
706
3.30k
    i4_mem_size = u4_total_mbs * sizeof(ps_view_ctxt->pu1_dec_mb_map[0]);
707
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
708
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
709
3.30k
    memset(pv_buf, 0, i4_mem_size);
710
3.30k
    ps_view_ctxt->pu1_dec_mb_map = pv_buf;
711
712
3.30k
    i4_mem_size = u4_total_mbs * sizeof(ps_view_ctxt->pu1_recon_mb_map[0]);
713
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
714
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
715
3.30k
    memset(pv_buf, 0, i4_mem_size);
716
3.30k
    ps_view_ctxt->pu1_recon_mb_map = pv_buf;
717
718
3.30k
    i4_mem_size = u4_total_mbs * sizeof(ps_view_ctxt->pu2_slice_num_map[0]);
719
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
720
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
721
3.30k
    memset(pv_buf, 0, i4_mem_size);
722
3.30k
    ps_view_ctxt->pu2_slice_num_map = pv_buf;
723
724
3.30k
    ps_view_ctxt->ps_parse_cur_slice = ps_view_ctxt->ps_dec_slice_buf;
725
3.30k
    ps_view_ctxt->ps_decode_cur_slice = ps_view_ctxt->ps_dec_slice_buf;
726
3.30k
    ps_view_ctxt->ps_computebs_cur_slice = ps_view_ctxt->ps_dec_slice_buf;
727
3.30k
    ps_view_ctxt->ps_pred_start = ps_view_ctxt->ps_pred;
728
729
3.30k
    i4_mem_size = sizeof(parse_pmbarams_t) * (ps_view_ctxt->u4_recon_mb_grp);
730
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
731
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
732
3.30k
    memset(pv_buf, 0, i4_mem_size);
733
3.30k
    ps_view_ctxt->ps_parse_mb_data = pv_buf;
734
735
3.30k
    i4_mem_size = sizeof(parse_part_params_t) * ((ps_view_ctxt->u4_recon_mb_grp) << 4);
736
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
737
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
738
3.30k
    memset(pv_buf, 0, i4_mem_size);
739
3.30k
    ps_view_ctxt->ps_parse_part_params = pv_buf;
740
741
3.30k
    i4_mem_size = (u4_wd_mbs * sizeof(deblkmb_neighbour_t));
742
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
743
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
744
3.30k
    memset(pv_buf, 0, i4_mem_size);
745
3.30k
    ps_view_ctxt->ps_deblk_top_mb = pv_buf;
746
747
3.30k
    i4_mem_size = sizeof(ctxt_inc_mb_info_t) * (u4_wd_mbs + 2);
748
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
749
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
750
3.30k
    memset(pv_buf, 0, i4_mem_size);
751
3.30k
    ps_view_ctxt->p_ctxt_inc_mb_map = pv_buf;
752
    /* 0th entry of CtxtIncMbMap will be always be containing default values
753
     for CABAC context representing MB not available */
754
3.30k
    ps_view_ctxt->p_ctxt_inc_mb_map += 1;
755
756
3.30k
    i4_mem_size = sizeof(mv_pred_t) * ps_view_ctxt->u4_recon_mb_grp * 16;
757
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
758
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
759
3.30k
    memset(pv_buf, 0, i4_mem_size);
760
3.30k
    ps_view_ctxt->ps_mv_p[0] = pv_buf;
761
762
3.30k
    i4_mem_size = sizeof(mv_pred_t) * ps_view_ctxt->u4_recon_mb_grp * 16;
763
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
764
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
765
3.30k
    memset(pv_buf, 0, i4_mem_size);
766
3.30k
    ps_view_ctxt->ps_mv_p[1] = pv_buf;
767
768
16.5k
    for(i = 0; i < MV_SCRATCH_BUFS; i++)
769
13.2k
    {
770
13.2k
        i4_mem_size = (sizeof(mv_pred_t) * ps_view_ctxt->u4_recon_mb_grp * 4);
771
13.2k
        pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
772
13.2k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
773
13.2k
        memset(pv_buf, 0, i4_mem_size);
774
13.2k
        ps_view_ctxt->ps_mv_top_p[i] = pv_buf;
775
13.2k
    }
776
777
3.30k
    i4_mem_size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
778
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
779
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
780
3.30k
    ps_view_ctxt->pu1_y_intra_pred_line = pv_buf;
781
3.30k
    memset(ps_view_ctxt->pu1_y_intra_pred_line, 0, i4_mem_size);
782
3.30k
    ps_view_ctxt->pu1_y_intra_pred_line += MB_SIZE;
783
784
3.30k
    i4_mem_size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
785
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
786
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
787
3.30k
    ps_view_ctxt->pu1_u_intra_pred_line = pv_buf;
788
3.30k
    memset(ps_view_ctxt->pu1_u_intra_pred_line, 0, i4_mem_size);
789
3.30k
    ps_view_ctxt->pu1_u_intra_pred_line += MB_SIZE;
790
791
3.30k
    i4_mem_size = sizeof(UWORD8) * ((u4_wd_mbs + 2) * MB_SIZE) * 2;
792
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
793
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
794
3.30k
    ps_view_ctxt->pu1_v_intra_pred_line = pv_buf;
795
3.30k
    memset(ps_view_ctxt->pu1_v_intra_pred_line, 0, i4_mem_size);
796
3.30k
    ps_view_ctxt->pu1_v_intra_pred_line += MB_SIZE;
797
798
3.30k
    if(ps_view_ctxt->u1_separate_parse)
799
2.26k
    {
800
        /* Needs one extra row of info, to hold top row data */
801
2.26k
        i4_mem_size = sizeof(mb_neigbour_params_t) * 2 * ((u4_wd_mbs + 2) * (u4_ht_mbs + 1));
802
2.26k
    }
803
1.04k
    else
804
1.04k
    {
805
1.04k
        i4_mem_size = sizeof(mb_neigbour_params_t) * 2 * (u4_wd_mbs + 2);
806
1.04k
    }
807
808
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
809
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
810
811
3.30k
    ps_view_ctxt->ps_nbr_mb_row = pv_buf;
812
3.30k
    memset(ps_view_ctxt->ps_nbr_mb_row, 0, i4_mem_size);
813
814
3.30k
    i4_mem_size = (u4_total_mbs + u4_wd_mbs) * sizeof(deblk_mb_t);
815
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
816
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
817
3.30k
    ps_view_ctxt->ps_deblk_pic = pv_buf;
818
3.30k
    memset(ps_view_ctxt->ps_deblk_pic, 0, i4_mem_size);
819
820
3.30k
    i4_mem_size = sizeof(dec_mb_info_t) * u4_total_mbs;
821
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
822
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
823
3.30k
    ps_view_ctxt->ps_frm_mb_info = pv_buf;
824
3.30k
    memset(ps_view_ctxt->ps_frm_mb_info, 0, i4_mem_size);
825
826
3.30k
    if((1 >= ps_view_ctxt->ps_cur_sps->u1_num_ref_frames) && (0 == ps_view_ctxt->i4_display_delay))
827
0
    {
828
0
        i4_num_entries = 1;
829
0
    }
830
3.30k
    else
831
3.30k
    {
832
3.30k
        i4_num_entries = MAX_FRAMES;
833
3.30k
    }
834
835
3.30k
    i4_num_entries = (2 * i4_num_entries) + 1;
836
3.30k
    i4_num_entries *= 2;
837
838
3.30k
    i4_mem_size = i4_num_entries * sizeof(void *);
839
3.30k
    i4_mem_size += PAD_MAP_IDX_POC * sizeof(void *);
840
3.30k
    i4_mem_size *= u4_total_mbs;
841
3.30k
    i4_mem_size += sizeof(dec_slice_struct_t) * u4_total_mbs;
842
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
843
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
844
845
3.30k
    ps_view_ctxt->ps_dec_slice_buf = pv_buf;
846
3.30k
    memset(ps_view_ctxt->ps_dec_slice_buf, 0, i4_mem_size);
847
3.30k
    pu1_buf = (UWORD8 *) ps_view_ctxt->ps_dec_slice_buf;
848
3.30k
    pu1_buf += sizeof(dec_slice_struct_t) * u4_total_mbs;
849
3.30k
    ps_view_ctxt->pv_map_ref_idx_to_poc_buf = (void *) pu1_buf;
850
851
    /* Allocate memory for packed pred info */
852
3.30k
    i4_num_entries = u4_total_mbs;
853
3.30k
    i4_num_entries *= 16 * 2;
854
855
3.30k
    i4_mem_size = sizeof(pred_info_pkd_t) * i4_num_entries;
856
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
857
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
858
3.30k
    memset(pv_buf, 0, i4_mem_size);
859
3.30k
    ps_view_ctxt->ps_pred_pkd = pv_buf;
860
861
    /* Allocate memory for coeff data */
862
3.30k
    i4_mem_size = MB_LUM_SIZE * sizeof(WORD16);
863
    /*For I16x16 MBs, 16 4x4 AC coeffs and 1 4x4 DC coeff TU blocks will be sent
864
    For all MBs along with 8 4x4 AC coeffs 2 2x2 DC coeff TU blocks will be sent
865
    So use 17 4x4 TU blocks for luma and 9 4x4 TU blocks for chroma */
866
3.30k
    i4_mem_size += u4_total_mbs *
867
3.30k
                   (MAX(17 * sizeof(tu_sblk4x4_coeff_data_t), 4 * sizeof(tu_blk8x8_coeff_data_t)) +
868
3.30k
                    9 * sizeof(tu_sblk4x4_coeff_data_t));
869
    // 32 bytes for each mb to store u1_prev_intra4x4_pred_mode and
870
    // u1_rem_intra4x4_pred_mode data
871
3.30k
    i4_mem_size += u4_total_mbs * 32;
872
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
873
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
874
3.30k
    memset(pv_buf, 0, i4_mem_size);
875
876
3.30k
    ps_view_ctxt->pi2_coeff_data = pv_buf;
877
878
3.30k
    ps_view_ctxt->pv_pic_tu_coeff_data = (void *) (ps_view_ctxt->pi2_coeff_data + MB_LUM_SIZE);
879
880
3.30k
    i4_mem_size = imvcd_get_au_mv_pred_buf_size(ps_mvcd_ctxt);
881
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
882
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
883
3.30k
    memset(pv_buf, 0, i4_mem_size);
884
3.30k
    ps_mvcd_ctxt->s_mvc_au_mv_pred_buf_mgr.pv_au_mv_pred_buf_base = pv_buf;
885
886
3.30k
    i4_mem_size = imvcd_get_au_buf_size(ps_mvcd_ctxt);
887
3.30k
    pv_buf = ps_view_ctxt->pf_aligned_alloc(pv_mem_ctxt, i4_default_alignment, i4_mem_size);
888
3.30k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
889
3.30k
    memset(pv_buf, 0, i4_mem_size);
890
3.30k
    ps_mvcd_ctxt->s_mvc_au_buf_mgr.pv_au_buf_base = pv_buf;
891
892
    /***************************************************************************/
893
    /*Initialize cabac context pointers for every SE that has fixed contextIdx */
894
    /***************************************************************************/
895
3.30k
    {
896
3.30k
        bin_ctxt_model_t *const p_cabac_ctxt_table_t = ps_view_ctxt->p_cabac_ctxt_table_t;
897
3.30k
        bin_ctxt_model_t **p_coeff_abs_level_minus1_t = ps_view_ctxt->p_coeff_abs_level_minus1_t;
898
3.30k
        bin_ctxt_model_t **p_cbf_t = ps_view_ctxt->p_cbf_t;
899
900
3.30k
        ps_view_ctxt->p_mb_field_dec_flag_t = p_cabac_ctxt_table_t + MB_FIELD_DECODING_FLAG;
901
3.30k
        ps_view_ctxt->p_prev_intra4x4_pred_mode_flag_t =
902
3.30k
            p_cabac_ctxt_table_t + PREV_INTRA4X4_PRED_MODE_FLAG;
903
3.30k
        ps_view_ctxt->p_rem_intra4x4_pred_mode_t = p_cabac_ctxt_table_t + REM_INTRA4X4_PRED_MODE;
904
3.30k
        ps_view_ctxt->p_intra_chroma_pred_mode_t = p_cabac_ctxt_table_t + INTRA_CHROMA_PRED_MODE;
905
3.30k
        ps_view_ctxt->p_mb_qp_delta_t = p_cabac_ctxt_table_t + MB_QP_DELTA;
906
3.30k
        ps_view_ctxt->p_ref_idx_t = p_cabac_ctxt_table_t + REF_IDX;
907
3.30k
        ps_view_ctxt->p_mvd_x_t = p_cabac_ctxt_table_t + MVD_X;
908
3.30k
        ps_view_ctxt->p_mvd_y_t = p_cabac_ctxt_table_t + MVD_Y;
909
3.30k
        p_cbf_t[0] = p_cabac_ctxt_table_t + CBF + 0;
910
3.30k
        p_cbf_t[1] = p_cabac_ctxt_table_t + CBF + 4;
911
3.30k
        p_cbf_t[2] = p_cabac_ctxt_table_t + CBF + 8;
912
3.30k
        p_cbf_t[3] = p_cabac_ctxt_table_t + CBF + 12;
913
3.30k
        p_cbf_t[4] = p_cabac_ctxt_table_t + CBF + 16;
914
3.30k
        ps_view_ctxt->p_cbp_luma_t = p_cabac_ctxt_table_t + CBP_LUMA;
915
3.30k
        ps_view_ctxt->p_cbp_chroma_t = p_cabac_ctxt_table_t + CBP_CHROMA;
916
917
3.30k
        p_coeff_abs_level_minus1_t[LUMA_DC_CTXCAT] =
918
3.30k
            p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_0_OFFSET;
919
920
3.30k
        p_coeff_abs_level_minus1_t[LUMA_AC_CTXCAT] =
921
3.30k
            p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_1_OFFSET;
922
923
3.30k
        p_coeff_abs_level_minus1_t[LUMA_4X4_CTXCAT] =
924
3.30k
            p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_2_OFFSET;
925
926
3.30k
        p_coeff_abs_level_minus1_t[CHROMA_DC_CTXCAT] =
927
3.30k
            p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_3_OFFSET;
928
929
3.30k
        p_coeff_abs_level_minus1_t[CHROMA_AC_CTXCAT] =
930
3.30k
            p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1 + COEFF_ABS_LEVEL_CAT_4_OFFSET;
931
932
3.30k
        p_coeff_abs_level_minus1_t[LUMA_8X8_CTXCAT] =
933
3.30k
            p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1_8X8 + COEFF_ABS_LEVEL_CAT_5_OFFSET;
934
935
        /********************************************************/
936
        /* context for the high profile related syntax elements */
937
        /* This is maintained seperately in s_high_profile     */
938
        /********************************************************/
939
3.30k
        {
940
3.30k
            ps_view_ctxt->s_high_profile.ps_transform8x8_flag =
941
3.30k
                p_cabac_ctxt_table_t + TRANSFORM_SIZE_8X8_FLAG;
942
943
3.30k
            ps_view_ctxt->s_high_profile.ps_sigcoeff_8x8_frame =
944
3.30k
                p_cabac_ctxt_table_t + SIGNIFICANT_COEFF_FLAG_8X8_FRAME;
945
946
3.30k
            ps_view_ctxt->s_high_profile.ps_last_sigcoeff_8x8_frame =
947
3.30k
                p_cabac_ctxt_table_t + LAST_SIGNIFICANT_COEFF_FLAG_8X8_FRAME;
948
949
3.30k
            ps_view_ctxt->s_high_profile.ps_coeff_abs_levelminus1 =
950
3.30k
                p_cabac_ctxt_table_t + COEFF_ABS_LEVEL_MINUS1_8X8;
951
952
3.30k
            ps_view_ctxt->s_high_profile.ps_sigcoeff_8x8_field =
953
3.30k
                p_cabac_ctxt_table_t + SIGNIFICANT_COEFF_FLAG_8X8_FIELD;
954
955
3.30k
            ps_view_ctxt->s_high_profile.ps_last_sigcoeff_8x8_field =
956
3.30k
                p_cabac_ctxt_table_t + LAST_SIGNIFICANT_COEFF_FLAG_8X8_FIELD;
957
3.30k
        }
958
3.30k
    }
959
960
3.30k
    return OK;
961
3.30k
}
962
963
void imvcd_convert_au_buf_to_view_buf(mvc_au_buffer_t *ps_au_buf, pic_buffer_t *ps_view_buf,
964
                                      UWORD16 u2_view_order_id, UWORD16 u2_view_id)
965
818k
{
966
818k
    yuv_buf_props_t *ps_view_buffer = &ps_au_buf->as_view_buffers[u2_view_id];
967
818k
    offsets_t *ps_disp_offsets = &ps_au_buf->as_disp_offsets[u2_view_id];
968
818k
    mvc_au_mv_pred_t *ps_au_mv_data = ps_au_buf->ps_au_mv_data;
969
970
818k
    ps_view_buf->pu1_buf1 = ps_view_buffer->as_component_bufs[Y].pv_data;
971
818k
    ps_view_buf->pu1_buf2 = ps_view_buffer->as_component_bufs[UV].pv_data;
972
818k
    ps_view_buf->pu1_buf3 = NULL;
973
818k
    ps_view_buf->u2_frm_wd_y = ps_view_buffer->as_component_bufs[Y].i4_data_stride;
974
818k
    ps_view_buf->u2_frm_wd_uv = ps_view_buffer->as_component_bufs[UV].i4_data_stride;
975
818k
    ps_view_buf->pu1_buf3 = NULL;
976
977
818k
    ps_view_buf->u2_disp_width = ps_au_buf->u2_disp_width;
978
818k
    ps_view_buf->u2_disp_height = ps_au_buf->u2_disp_height;
979
818k
    ps_view_buf->u2_frm_ht_y = ps_view_buffer->u2_height;
980
818k
    ps_view_buf->u2_frm_ht_uv = ps_view_buffer->u2_height / 2;
981
982
818k
    ps_view_buf->u4_time_stamp = ps_au_buf->u4_time_stamp;
983
818k
    ps_view_buf->u4_ts = ps_au_buf->u4_time_stamp;
984
985
818k
    ps_view_buf->u2_crop_offset_y =
986
818k
        ps_disp_offsets->u2_left_offset + ps_disp_offsets->u2_top_offset * ps_view_buf->u2_frm_wd_y;
987
818k
    ps_view_buf->u2_crop_offset_uv =
988
818k
        ps_disp_offsets->u2_left_offset +
989
818k
        (ps_disp_offsets->u2_top_offset / 2) * ps_view_buf->u2_frm_wd_uv;
990
991
818k
    ps_view_buf->i4_poc = ps_au_buf->i4_poc;
992
818k
    ps_view_buf->i4_pic_num = ps_au_buf->i4_frame_num;
993
818k
    ps_view_buf->i4_frame_num = ps_au_buf->i4_frame_num;
994
818k
    ps_view_buf->i4_avg_poc = ps_au_buf->i4_poc;
995
818k
    ps_view_buf->u1_is_short = ps_au_buf->b_is_short_term_ref;
996
818k
    ps_view_buf->u1_pic_type = ps_au_buf->u1_pic_type;
997
818k
    ps_view_buf->i4_top_field_order_cnt = ps_au_buf->i4_poc;
998
818k
    ps_view_buf->i4_bottom_field_order_cnt = ps_au_buf->i4_poc;
999
818k
    ps_view_buf->u1_picturetype = FRM_PIC;
1000
818k
    ps_view_buf->u1_long_term_frm_idx = ps_au_buf->u1_long_term_frm_idx;
1001
818k
    ps_view_buf->u1_long_term_pic_num = ps_au_buf->u1_long_term_pic_num;
1002
818k
    ps_view_buf->u4_pack_slc_typ = ps_au_buf->au4_pack_slc_typ[u2_view_order_id];
1003
818k
    ps_view_buf->u1_pic_struct = ps_au_buf->u1_pic_struct;
1004
818k
    ps_view_buf->s_sei_pic = ps_au_buf->s_sei_pic;
1005
1006
818k
    ps_view_buf->u1_pic_buf_id = ps_au_buf->i4_pic_buf_id;
1007
818k
    ps_view_buf->u1_mv_buf_id = ps_au_buf->i4_mv_buf_id;
1008
1009
818k
    ps_view_buf->pu1_col_zero_flag = ps_au_mv_data->apu1_mode_descriptors[u2_view_id];
1010
818k
    ps_view_buf->ps_mv = ps_au_mv_data->aps_mvs[u2_view_id];
1011
818k
}
1012
1013
void imvcd_init_ref_idx_to_ref_buf_map(mvc_dec_ctxt_t *ps_mvcd_ctxt)
1014
62.5k
{
1015
62.5k
    pic_buffer_t *ps_pic;
1016
1017
62.5k
    void **ppv_map_ref_idx_to_poc_lx;
1018
62.5k
    WORD8 i, j;
1019
1020
62.5k
    dec_struct_t *ps_view_ctxt = &ps_mvcd_ctxt->s_view_dec_ctxt;
1021
1022
62.5k
    bool b_is_b_pic = !!(
1023
62.5k
        ps_mvcd_ctxt->ps_cur_au->au4_pack_slc_typ[ps_mvcd_ctxt->u2_num_views_decoded] & B_SLC_BIT);
1024
1025
147k
    for(i = 0; i < 1 + ((WORD32) b_is_b_pic); i++)
1026
84.4k
    {
1027
84.4k
        ppv_map_ref_idx_to_poc_lx =
1028
84.4k
            ps_view_ctxt->ppv_map_ref_idx_to_poc + ((0 == i) ? FRM_LIST_L0 : FRM_LIST_L1);
1029
84.4k
        ppv_map_ref_idx_to_poc_lx[0] = NULL;
1030
84.4k
        ppv_map_ref_idx_to_poc_lx++;
1031
1032
351k
        for(j = 0; j < ps_view_ctxt->ps_cur_slice->u1_num_ref_idx_lx_active[i]; j++)
1033
266k
        {
1034
266k
            ps_pic = ps_view_ctxt->ps_ref_pic_buf_lx[i][j];
1035
1036
266k
            ppv_map_ref_idx_to_poc_lx[j] = ps_pic->pu1_buf1;
1037
266k
        }
1038
84.4k
    }
1039
1040
62.5k
    if(!b_is_b_pic)
1041
40.5k
    {
1042
40.5k
        ppv_map_ref_idx_to_poc_lx = ps_view_ctxt->ppv_map_ref_idx_to_poc + FRM_LIST_L1;
1043
40.5k
        ppv_map_ref_idx_to_poc_lx[0] = NULL;
1044
40.5k
    }
1045
1046
62.5k
    if(ps_view_ctxt->u4_num_cores >= 3)
1047
19.2k
    {
1048
19.2k
        WORD32 i4_size;
1049
1050
19.2k
        WORD32 i4_num_entries = MAX_FRAMES;
1051
1052
19.2k
        if((1 >= ps_view_ctxt->ps_cur_sps->u1_num_ref_frames) &&
1053
12.7k
           (0 == ps_view_ctxt->i4_display_delay))
1054
0
        {
1055
0
            i4_num_entries = 1;
1056
0
        }
1057
1058
19.2k
        i4_num_entries = 2 * i4_num_entries + 1;
1059
19.2k
        i4_num_entries *= 2;
1060
1061
19.2k
        i4_size = i4_num_entries * sizeof(void *);
1062
19.2k
        i4_size += PAD_MAP_IDX_POC * sizeof(void *);
1063
1064
19.2k
        memcpy(ps_view_ctxt->ps_parse_cur_slice->ppv_map_ref_idx_to_poc,
1065
19.2k
               ps_view_ctxt->ppv_map_ref_idx_to_poc, i4_size);
1066
19.2k
    }
1067
62.5k
}
1068
1069
void imvcd_ivp_buf_copier(mvc_au_buffer_t *ps_au_buf_src, mvc_au_buffer_t *ps_au_buf_dst,
1070
                          mvc_au_mv_pred_t *ps_au_mv_data_src, mvc_au_mv_pred_t *ps_au_mv_data_dst,
1071
                          UWORD16 u2_src_view_id, UWORD16 u2_dst_view_id)
1072
3.02k
{
1073
3.02k
    UWORD32 i, j;
1074
1075
3.02k
    mv_pred_t *ps_mode_info_src = ps_au_mv_data_src->aps_mvs[u2_src_view_id];
1076
3.02k
    mv_pred_t *ps_mode_info_dst = ps_au_mv_data_dst->aps_mvs[u2_dst_view_id];
1077
1078
3.02k
    UWORD32 u4_view_wd = ps_au_buf_src->as_view_buffers[u2_src_view_id].u2_width;
1079
3.02k
    UWORD32 u4_view_ht = ps_au_buf_src->as_view_buffers[u2_src_view_id].u2_height;
1080
3.02k
    UWORD32 u4_mode_info_buf_size = imvcd_get_num_elements_in_mv_pred_buf(u4_view_wd, u4_view_ht);
1081
3.02k
    UWORD32 u4_mode_info_pad_size = imvcd_get_mv_pred_buf_padding_length(u4_view_wd);
1082
1083
3.02k
    ps_mode_info_src -= u4_mode_info_pad_size;
1084
3.02k
    ps_mode_info_dst -= u4_mode_info_pad_size;
1085
1086
3.02k
    ps_au_buf_dst->ps_au_mv_data = ps_au_mv_data_dst;
1087
1088
3.02k
    ps_au_buf_dst->as_disp_offsets[u2_dst_view_id] = ps_au_buf_src->as_disp_offsets[u2_src_view_id];
1089
1090
9.06k
    for(i = 0; i < NUM_SP_COMPONENTS; i++)
1091
6.04k
    {
1092
6.04k
        bool b_is_chroma = ((COMPONENT_TYPES_T) i) != Y;
1093
1094
6.04k
        coordinates_t s_pad_dims = imvcd_get_buf_pad_dims(b_is_chroma);
1095
6.04k
        buffer_container_t *ps_src =
1096
6.04k
            &ps_au_buf_src->as_view_buffers[u2_src_view_id].as_component_bufs[i];
1097
6.04k
        buffer_container_t *ps_dst =
1098
6.04k
            &ps_au_buf_dst->as_view_buffers[u2_dst_view_id].as_component_bufs[i];
1099
1100
6.04k
        WORD32 i4_src_pad_offset =
1101
6.04k
            imvcd_get_ref_pic_pad_offset(ps_src->i4_data_stride, b_is_chroma);
1102
6.04k
        WORD32 i4_dst_pad_offset =
1103
6.04k
            imvcd_get_ref_pic_pad_offset(ps_dst->i4_data_stride, b_is_chroma);
1104
1105
417k
        for(j = 0; j < ((u4_view_ht >> b_is_chroma) + s_pad_dims.i4_ordinate); j++)
1106
410k
        {
1107
410k
            UWORD8 *pu1_src =
1108
410k
                ((UWORD8 *) ps_src->pv_data) + j * ps_src->i4_data_stride - i4_src_pad_offset;
1109
410k
            UWORD8 *pu1_dst =
1110
410k
                ((UWORD8 *) ps_dst->pv_data) + j * ps_dst->i4_data_stride - i4_dst_pad_offset;
1111
1112
410k
            memcpy(pu1_dst, pu1_src, (u4_view_wd + s_pad_dims.i4_abscissa) * sizeof(pu1_dst[0]));
1113
410k
        }
1114
6.04k
    }
1115
1116
3.02k
    memcpy(ps_mode_info_dst, ps_mode_info_src, u4_mode_info_buf_size * sizeof(ps_mode_info_dst[0]));
1117
1118
244k
    for(i = 0; i < u4_mode_info_buf_size; i++)
1119
241k
    {
1120
        /* In accordance with 'H.8.4' */
1121
241k
        ps_au_mv_data_dst->apu1_mode_descriptors[u2_dst_view_id][i] =
1122
241k
            ps_au_mv_data_src->apu1_mode_descriptors[u2_src_view_id][i] & 0xFE;
1123
241k
    }
1124
1125
3.02k
    ps_au_buf_dst->au4_pack_slc_typ[u2_dst_view_id] =
1126
3.02k
        ps_au_buf_src->au4_pack_slc_typ[u2_src_view_id];
1127
3.02k
    ps_au_buf_dst->b_is_short_term_ref = ps_au_buf_src->b_is_short_term_ref;
1128
3.02k
    ps_au_buf_dst->i4_avg_poc = ps_au_buf_src->i4_avg_poc;
1129
3.02k
    ps_au_buf_dst->i4_frame_num = ps_au_buf_src->i4_frame_num;
1130
3.02k
    ps_au_buf_dst->i4_pic_num = ps_au_buf_src->i4_pic_num;
1131
3.02k
    ps_au_buf_dst->i4_poc = ps_au_buf_src->i4_poc;
1132
3.02k
    ps_au_buf_dst->s_sei_pic = ps_au_buf_src->s_sei_pic;
1133
3.02k
    ps_au_buf_dst->u1_long_term_frm_idx = ps_au_buf_src->u1_long_term_frm_idx;
1134
3.02k
    ps_au_buf_dst->u1_long_term_pic_num = ps_au_buf_src->u1_long_term_pic_num;
1135
3.02k
    ps_au_buf_dst->u1_picturetype = ps_au_buf_src->u1_picturetype;
1136
3.02k
    ps_au_buf_dst->u1_pic_struct = ps_au_buf_src->u1_pic_struct;
1137
3.02k
    ps_au_buf_dst->u2_disp_height = ps_au_buf_src->u2_disp_height;
1138
3.02k
    ps_au_buf_dst->u2_disp_width = ps_au_buf_src->u2_disp_width;
1139
3.02k
    ps_au_buf_dst->u4_time_stamp = ps_au_buf_src->u4_time_stamp;
1140
3.02k
}