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1 | | /* |
2 | | * Copyright © 2018-2022, VideoLAN and dav1d authors |
3 | | * Copyright © 2018-2022, Two Orioles, LLC |
4 | | * All rights reserved. |
5 | | * |
6 | | * Redistribution and use in source and binary forms, with or without |
7 | | * modification, are permitted provided that the following conditions are met: |
8 | | * |
9 | | * 1. Redistributions of source code must retain the above copyright notice, this |
10 | | * list of conditions and the following disclaimer. |
11 | | * |
12 | | * 2. Redistributions in binary form must reproduce the above copyright notice, |
13 | | * this list of conditions and the following disclaimer in the documentation |
14 | | * and/or other materials provided with the distribution. |
15 | | * |
16 | | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
17 | | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
18 | | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
19 | | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR |
20 | | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
21 | | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
22 | | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
23 | | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
25 | | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | | */ |
27 | | |
28 | | #ifndef DAV1D_SRC_CPU_H |
29 | | #define DAV1D_SRC_CPU_H |
30 | | |
31 | | #include "config.h" |
32 | | |
33 | | #include "common/attributes.h" |
34 | | |
35 | | #include "dav1d/common.h" |
36 | | #include "dav1d/dav1d.h" |
37 | | |
38 | | #if ARCH_AARCH64 || ARCH_ARM |
39 | | #include "src/arm/cpu.h" |
40 | | #elif ARCH_LOONGARCH |
41 | | #include "src/loongarch/cpu.h" |
42 | | #elif ARCH_PPC64LE |
43 | | #include "src/ppc/cpu.h" |
44 | | #elif ARCH_RISCV |
45 | | #include "src/riscv/cpu.h" |
46 | | #elif ARCH_X86 |
47 | | #include "src/x86/cpu.h" |
48 | | #endif |
49 | | |
50 | | EXTERN unsigned dav1d_cpu_flags; |
51 | | EXTERN unsigned dav1d_cpu_flags_mask; |
52 | | |
53 | | void dav1d_init_cpu(void); |
54 | | DAV1D_API void dav1d_set_cpu_flags_mask(unsigned mask); |
55 | | int dav1d_num_logical_processors(Dav1dContext *c); |
56 | | unsigned long dav1d_getauxval(unsigned long); |
57 | | |
58 | 0 | static ALWAYS_INLINE unsigned dav1d_get_default_cpu_flags(void) { |
59 | 0 | unsigned flags = 0; |
60 | 0 |
|
61 | 0 | #if ARCH_AARCH64 || ARCH_ARM |
62 | 0 | #if defined(__ARM_NEON) || defined(__APPLE__) || defined(_WIN32) || ARCH_AARCH64 |
63 | 0 | flags |= DAV1D_ARM_CPU_FLAG_NEON; |
64 | 0 | #endif |
65 | 0 | #ifdef __ARM_FEATURE_DOTPROD |
66 | 0 | flags |= DAV1D_ARM_CPU_FLAG_DOTPROD; |
67 | 0 | #endif |
68 | 0 | #ifdef __ARM_FEATURE_MATMUL_INT8 |
69 | 0 | flags |= DAV1D_ARM_CPU_FLAG_I8MM; |
70 | 0 | #endif |
71 | 0 | #if ARCH_AARCH64 |
72 | 0 | #ifdef __ARM_FEATURE_SVE |
73 | 0 | flags |= DAV1D_ARM_CPU_FLAG_SVE; |
74 | 0 | #endif |
75 | 0 | #ifdef __ARM_FEATURE_SVE2 |
76 | 0 | flags |= DAV1D_ARM_CPU_FLAG_SVE2; |
77 | 0 | #endif |
78 | 0 | #endif /* ARCH_AARCH64 */ |
79 | 0 | #elif ARCH_PPC64LE |
80 | 0 | #if defined(__VSX__) |
81 | 0 | flags |= DAV1D_PPC_CPU_FLAG_VSX; |
82 | 0 | #endif |
83 | 0 | #if defined(__POWER9_VECTOR__) |
84 | 0 | flags |= DAV1D_PPC_CPU_FLAG_PWR9; |
85 | 0 | #endif |
86 | 0 | #elif ARCH_RISCV |
87 | 0 | #if defined(__riscv_v) |
88 | 0 | flags |= DAV1D_RISCV_CPU_FLAG_V; |
89 | 0 | #endif |
90 | 0 | #elif ARCH_X86 |
91 | 0 | #if defined(__AVX512F__) && defined(__AVX512CD__) && \ |
92 | 0 | defined(__AVX512BW__) && defined(__AVX512DQ__) && \ |
93 | 0 | defined(__AVX512VL__) && defined(__AVX512VNNI__) && \ |
94 | 0 | defined(__AVX512IFMA__) && defined(__AVX512VBMI__) && \ |
95 | 0 | defined(__AVX512VBMI2__) && defined(__AVX512VPOPCNTDQ__) && \ |
96 | 0 | defined(__AVX512BITALG__) && defined(__GFNI__) && \ |
97 | 0 | defined(__VAES__) && defined(__VPCLMULQDQ__) |
98 | 0 | flags |= DAV1D_X86_CPU_FLAG_AVX512ICL | |
99 | 0 | DAV1D_X86_CPU_FLAG_AVX2 | |
100 | 0 | DAV1D_X86_CPU_FLAG_SSE41 | |
101 | 0 | DAV1D_X86_CPU_FLAG_SSSE3 | |
102 | 0 | DAV1D_X86_CPU_FLAG_SSE2; |
103 | 0 | #elif defined(__AVX2__) |
104 | 0 | flags |= DAV1D_X86_CPU_FLAG_AVX2 | |
105 | 0 | DAV1D_X86_CPU_FLAG_SSE41 | |
106 | 0 | DAV1D_X86_CPU_FLAG_SSSE3 | |
107 | 0 | DAV1D_X86_CPU_FLAG_SSE2; |
108 | 0 | #elif defined(__SSE4_1__) || defined(__AVX__) |
109 | 0 | flags |= DAV1D_X86_CPU_FLAG_SSE41 | |
110 | 0 | DAV1D_X86_CPU_FLAG_SSSE3 | |
111 | 0 | DAV1D_X86_CPU_FLAG_SSE2; |
112 | 0 | #elif defined(__SSSE3__) |
113 | 0 | flags |= DAV1D_X86_CPU_FLAG_SSSE3 | |
114 | 0 | DAV1D_X86_CPU_FLAG_SSE2; |
115 | 0 | #elif ARCH_X86_64 || defined(__SSE2__) || \ |
116 | 0 | (defined(_M_IX86_FP) && _M_IX86_FP >= 2) |
117 | 0 | flags |= DAV1D_X86_CPU_FLAG_SSE2; |
118 | 0 | #endif |
119 | 0 | #endif |
120 | 0 |
|
121 | 0 | return flags; |
122 | 0 | } Unexecuted instantiation: lib.c:dav1d_get_default_cpu_flags Unexecuted instantiation: cpu.c:dav1d_get_default_cpu_flags |
123 | | |
124 | 0 | static ALWAYS_INLINE unsigned dav1d_get_cpu_flags(void) { |
125 | 0 | unsigned flags = dav1d_cpu_flags & dav1d_cpu_flags_mask; |
126 | 0 |
|
127 | 0 | #if TRIM_DSP_FUNCTIONS |
128 | 0 | /* Since this function is inlined, unconditionally setting a flag here will |
129 | 0 | * enable dead code elimination in the calling function. */ |
130 | 0 | flags |= dav1d_get_default_cpu_flags(); |
131 | 0 | #endif |
132 | 0 |
|
133 | 0 | return flags; |
134 | 0 | } Unexecuted instantiation: lib.c:dav1d_get_cpu_flags Unexecuted instantiation: cpu.c:dav1d_get_cpu_flags |
135 | | |
136 | | #endif /* DAV1D_SRC_CPU_H */ |