/work/dav1d/src/itx_tmpl.c
Line | Count | Source |
1 | | /* |
2 | | * Copyright © 2018-2019, VideoLAN and dav1d authors |
3 | | * Copyright © 2018-2019, Two Orioles, LLC |
4 | | * All rights reserved. |
5 | | * |
6 | | * Redistribution and use in source and binary forms, with or without |
7 | | * modification, are permitted provided that the following conditions are met: |
8 | | * |
9 | | * 1. Redistributions of source code must retain the above copyright notice, this |
10 | | * list of conditions and the following disclaimer. |
11 | | * |
12 | | * 2. Redistributions in binary form must reproduce the above copyright notice, |
13 | | * this list of conditions and the following disclaimer in the documentation |
14 | | * and/or other materials provided with the distribution. |
15 | | * |
16 | | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
17 | | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
18 | | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
19 | | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR |
20 | | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
21 | | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
22 | | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
23 | | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
25 | | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | | */ |
27 | | |
28 | | #include "config.h" |
29 | | |
30 | | #include <stddef.h> |
31 | | #include <stdint.h> |
32 | | #include <stdlib.h> |
33 | | #include <string.h> |
34 | | |
35 | | #include "common/attributes.h" |
36 | | #include "common/intops.h" |
37 | | |
38 | | #include "src/itx.h" |
39 | | #include "src/itx_1d.h" |
40 | | #include "src/scan.h" |
41 | | #include "src/tables.h" |
42 | | |
43 | | static NOINLINE void |
44 | | inv_txfm_add_c(pixel *dst, const ptrdiff_t stride, coef *const coeff, |
45 | | const int eob, const /*enum RectTxfmSize*/ int tx, const int shift, |
46 | | const enum TxfmType txtp HIGHBD_DECL_SUFFIX) |
47 | 2.12k | { |
48 | 2.12k | const TxfmInfo *const t_dim = &dav1d_txfm_dimensions[tx]; |
49 | 2.12k | const int w = 4 * t_dim->w, h = 4 * t_dim->h; |
50 | 2.12k | const int has_dconly = txtp == DCT_DCT; |
51 | 2.12k | assert(w >= 4 && w <= 64); |
52 | 2.12k | assert(h >= 4 && h <= 64); |
53 | 2.12k | assert(eob >= 0); |
54 | | |
55 | 2.12k | const int is_rect2 = w * 2 == h || h * 2 == w; |
56 | 2.12k | const int rnd = (1 << shift) >> 1; |
57 | | |
58 | 2.12k | if (eob < has_dconly) { |
59 | 190 | int dc = coeff[0]; |
60 | 190 | coeff[0] = 0; |
61 | 190 | if (is_rect2) |
62 | 66 | dc = (dc * 181 + 128) >> 8; |
63 | 190 | dc = (dc * 181 + 128) >> 8; |
64 | 190 | dc = (dc + rnd) >> shift; |
65 | 190 | dc = (dc * 181 + 128 + 2048) >> 12; |
66 | 2.53k | for (int y = 0; y < h; y++, dst += PXSTRIDE(stride)) |
67 | 43.1k | for (int x = 0; x < w; x++) |
68 | 40.7k | dst[x] = iclip_pixel(dst[x] + dc); |
69 | 190 | return; |
70 | 190 | } |
71 | | |
72 | 1.93k | const uint8_t *const txtps = dav1d_tx1d_types[txtp]; |
73 | 1.93k | const itx_1d_fn first_1d_fn = dav1d_tx1d_fns[t_dim->lw][txtps[0]]; |
74 | 1.93k | const itx_1d_fn second_1d_fn = dav1d_tx1d_fns[t_dim->lh][txtps[1]]; |
75 | 1.93k | const int sh = imin(h, 32), sw = imin(w, 32); |
76 | 1.93k | #if BITDEPTH == 8 |
77 | 1.93k | const int row_clip_min = INT16_MIN; |
78 | 1.93k | const int col_clip_min = INT16_MIN; |
79 | | #else |
80 | | const int row_clip_min = (int) ((unsigned) ~bitdepth_max << 7); |
81 | | const int col_clip_min = (int) ((unsigned) ~bitdepth_max << 5); |
82 | | #endif |
83 | 1.93k | const int row_clip_max = ~row_clip_min; |
84 | 1.93k | const int col_clip_max = ~col_clip_min; |
85 | | |
86 | 1.93k | int32_t tmp[64 * 64], *c = tmp; |
87 | 1.93k | int last_nonzero_col; // in first 1d itx |
88 | 1.93k | if (txtps[1] == IDENTITY && txtps[0] != IDENTITY) { |
89 | 140 | last_nonzero_col = imin(sh - 1, eob); |
90 | 1.79k | } else if (txtps[0] == IDENTITY && txtps[1] != IDENTITY) { |
91 | 64 | last_nonzero_col = eob >> (t_dim->lw + 2); |
92 | 1.73k | } else { |
93 | 1.73k | last_nonzero_col = dav1d_last_nonzero_col_from_eob[tx][eob]; |
94 | 1.73k | } |
95 | 1.93k | assert(last_nonzero_col < sh); |
96 | 9.83k | for (int y = 0; y <= last_nonzero_col; y++, c += w) { |
97 | 7.89k | if (is_rect2) |
98 | 17.5k | for (int x = 0; x < sw; x++) |
99 | 16.0k | c[x] = (coeff[y + x * sh] * 181 + 128) >> 8; |
100 | 6.34k | else |
101 | 81.9k | for (int x = 0; x < sw; x++) |
102 | 75.5k | c[x] = coeff[y + x * sh]; |
103 | 7.89k | first_1d_fn(c, 1, row_clip_min, row_clip_max); |
104 | 7.89k | } |
105 | 1.93k | if (last_nonzero_col + 1 < sh) |
106 | 1.50k | memset(c, 0, sizeof(*c) * (sh - last_nonzero_col - 1) * w); |
107 | | |
108 | 1.93k | memset(coeff, 0, sizeof(*coeff) * sw * sh); |
109 | 259k | for (int i = 0; i < w * sh; i++) |
110 | 257k | tmp[i] = iclip((tmp[i] + rnd) >> shift, col_clip_min, col_clip_max); |
111 | | |
112 | 21.5k | for (int x = 0; x < w; x++) |
113 | 19.6k | second_1d_fn(&tmp[x], w, col_clip_min, col_clip_max); |
114 | | |
115 | 1.93k | c = tmp; |
116 | 20.6k | for (int y = 0; y < h; y++, dst += PXSTRIDE(stride)) |
117 | 346k | for (int x = 0; x < w; x++) |
118 | 327k | dst[x] = iclip_pixel(dst[x] + ((*c++ + 8) >> 4)); |
119 | 1.93k | } |
120 | | |
121 | | #define inv_txfm_fn(type1, type2, type, pfx, w, h, shift) \ |
122 | | static void \ |
123 | | inv_txfm_add_##type1##_##type2##_##w##x##h##_c(pixel *dst, \ |
124 | | const ptrdiff_t stride, \ |
125 | | coef *const coeff, \ |
126 | | const int eob \ |
127 | 2.12k | HIGHBD_DECL_SUFFIX) \ |
128 | 2.12k | { \ |
129 | 2.12k | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ |
130 | 2.12k | HIGHBD_TAIL_SUFFIX); \ |
131 | 2.12k | } itx_tmpl.c:inv_txfm_add_dct_dct_4x4_c Line | Count | Source | 127 | 86 | HIGHBD_DECL_SUFFIX) \ | 128 | 86 | { \ | 129 | 86 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 86 | HIGHBD_TAIL_SUFFIX); \ | 131 | 86 | } |
itx_tmpl.c:inv_txfm_add_identity_identity_4x4_c Line | Count | Source | 127 | 28 | HIGHBD_DECL_SUFFIX) \ | 128 | 28 | { \ | 129 | 28 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 28 | HIGHBD_TAIL_SUFFIX); \ | 131 | 28 | } |
itx_tmpl.c:inv_txfm_add_adst_dct_4x4_c Line | Count | Source | 127 | 90 | HIGHBD_DECL_SUFFIX) \ | 128 | 90 | { \ | 129 | 90 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 90 | HIGHBD_TAIL_SUFFIX); \ | 131 | 90 | } |
itx_tmpl.c:inv_txfm_add_dct_adst_4x4_c Line | Count | Source | 127 | 78 | HIGHBD_DECL_SUFFIX) \ | 128 | 78 | { \ | 129 | 78 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 78 | HIGHBD_TAIL_SUFFIX); \ | 131 | 78 | } |
itx_tmpl.c:inv_txfm_add_adst_adst_4x4_c Line | Count | Source | 127 | 114 | HIGHBD_DECL_SUFFIX) \ | 128 | 114 | { \ | 129 | 114 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 114 | HIGHBD_TAIL_SUFFIX); \ | 131 | 114 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_adst_4x4_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_flipadst_4x4_c itx_tmpl.c:inv_txfm_add_flipadst_dct_4x4_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_flipadst_4x4_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_flipadst_4x4_c itx_tmpl.c:inv_txfm_add_dct_identity_4x4_c Line | Count | Source | 127 | 32 | HIGHBD_DECL_SUFFIX) \ | 128 | 32 | { \ | 129 | 32 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 32 | HIGHBD_TAIL_SUFFIX); \ | 131 | 32 | } |
itx_tmpl.c:inv_txfm_add_identity_dct_4x4_c Line | Count | Source | 127 | 22 | HIGHBD_DECL_SUFFIX) \ | 128 | 22 | { \ | 129 | 22 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 22 | HIGHBD_TAIL_SUFFIX); \ | 131 | 22 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_identity_4x4_c itx_tmpl.c:inv_txfm_add_identity_flipadst_4x4_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_adst_identity_4x4_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_adst_4x4_c itx_tmpl.c:inv_txfm_add_dct_dct_4x8_c Line | Count | Source | 127 | 30 | HIGHBD_DECL_SUFFIX) \ | 128 | 30 | { \ | 129 | 30 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 30 | HIGHBD_TAIL_SUFFIX); \ | 131 | 30 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_identity_4x8_c itx_tmpl.c:inv_txfm_add_adst_dct_4x8_c Line | Count | Source | 127 | 26 | HIGHBD_DECL_SUFFIX) \ | 128 | 26 | { \ | 129 | 26 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 26 | HIGHBD_TAIL_SUFFIX); \ | 131 | 26 | } |
itx_tmpl.c:inv_txfm_add_dct_adst_4x8_c Line | Count | Source | 127 | 14 | HIGHBD_DECL_SUFFIX) \ | 128 | 14 | { \ | 129 | 14 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 14 | HIGHBD_TAIL_SUFFIX); \ | 131 | 14 | } |
itx_tmpl.c:inv_txfm_add_adst_adst_4x8_c Line | Count | Source | 127 | 24 | HIGHBD_DECL_SUFFIX) \ | 128 | 24 | { \ | 129 | 24 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 24 | HIGHBD_TAIL_SUFFIX); \ | 131 | 24 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_adst_4x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_flipadst_4x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_dct_4x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_flipadst_4x8_c itx_tmpl.c:inv_txfm_add_flipadst_flipadst_4x8_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_dct_identity_4x8_c Line | Count | Source | 127 | 8 | HIGHBD_DECL_SUFFIX) \ | 128 | 8 | { \ | 129 | 8 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 8 | HIGHBD_TAIL_SUFFIX); \ | 131 | 8 | } |
itx_tmpl.c:inv_txfm_add_identity_dct_4x8_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_identity_4x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_flipadst_4x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_identity_4x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_adst_4x8_c itx_tmpl.c:inv_txfm_add_dct_dct_4x16_c Line | Count | Source | 127 | 8 | HIGHBD_DECL_SUFFIX) \ | 128 | 8 | { \ | 129 | 8 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 8 | HIGHBD_TAIL_SUFFIX); \ | 131 | 8 | } |
itx_tmpl.c:inv_txfm_add_identity_identity_4x16_c Line | Count | Source | 127 | 6 | HIGHBD_DECL_SUFFIX) \ | 128 | 6 | { \ | 129 | 6 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 6 | HIGHBD_TAIL_SUFFIX); \ | 131 | 6 | } |
itx_tmpl.c:inv_txfm_add_adst_dct_4x16_c Line | Count | Source | 127 | 6 | HIGHBD_DECL_SUFFIX) \ | 128 | 6 | { \ | 129 | 6 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 6 | HIGHBD_TAIL_SUFFIX); \ | 131 | 6 | } |
itx_tmpl.c:inv_txfm_add_dct_adst_4x16_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_adst_adst_4x16_c Line | Count | Source | 127 | 10 | HIGHBD_DECL_SUFFIX) \ | 128 | 10 | { \ | 129 | 10 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 10 | HIGHBD_TAIL_SUFFIX); \ | 131 | 10 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_adst_4x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_flipadst_4x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_dct_4x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_flipadst_4x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_flipadst_4x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_identity_4x16_c itx_tmpl.c:inv_txfm_add_identity_dct_4x16_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_identity_4x16_c itx_tmpl.c:inv_txfm_add_identity_flipadst_4x16_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_identity_4x16_c itx_tmpl.c:inv_txfm_add_identity_adst_4x16_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_dct_dct_8x4_c Line | Count | Source | 127 | 52 | HIGHBD_DECL_SUFFIX) \ | 128 | 52 | { \ | 129 | 52 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 52 | HIGHBD_TAIL_SUFFIX); \ | 131 | 52 | } |
itx_tmpl.c:inv_txfm_add_identity_identity_8x4_c Line | Count | Source | 127 | 4 | HIGHBD_DECL_SUFFIX) \ | 128 | 4 | { \ | 129 | 4 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 4 | HIGHBD_TAIL_SUFFIX); \ | 131 | 4 | } |
itx_tmpl.c:inv_txfm_add_adst_dct_8x4_c Line | Count | Source | 127 | 36 | HIGHBD_DECL_SUFFIX) \ | 128 | 36 | { \ | 129 | 36 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 36 | HIGHBD_TAIL_SUFFIX); \ | 131 | 36 | } |
itx_tmpl.c:inv_txfm_add_dct_adst_8x4_c Line | Count | Source | 127 | 32 | HIGHBD_DECL_SUFFIX) \ | 128 | 32 | { \ | 129 | 32 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 32 | HIGHBD_TAIL_SUFFIX); \ | 131 | 32 | } |
itx_tmpl.c:inv_txfm_add_adst_adst_8x4_c Line | Count | Source | 127 | 30 | HIGHBD_DECL_SUFFIX) \ | 128 | 30 | { \ | 129 | 30 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 30 | HIGHBD_TAIL_SUFFIX); \ | 131 | 30 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_adst_8x4_c itx_tmpl.c:inv_txfm_add_adst_flipadst_8x4_c Line | Count | Source | 127 | 4 | HIGHBD_DECL_SUFFIX) \ | 128 | 4 | { \ | 129 | 4 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 4 | HIGHBD_TAIL_SUFFIX); \ | 131 | 4 | } |
itx_tmpl.c:inv_txfm_add_flipadst_dct_8x4_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_flipadst_8x4_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_flipadst_8x4_c itx_tmpl.c:inv_txfm_add_dct_identity_8x4_c Line | Count | Source | 127 | 18 | HIGHBD_DECL_SUFFIX) \ | 128 | 18 | { \ | 129 | 18 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 18 | HIGHBD_TAIL_SUFFIX); \ | 131 | 18 | } |
itx_tmpl.c:inv_txfm_add_identity_dct_8x4_c Line | Count | Source | 127 | 4 | HIGHBD_DECL_SUFFIX) \ | 128 | 4 | { \ | 129 | 4 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 4 | HIGHBD_TAIL_SUFFIX); \ | 131 | 4 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_identity_8x4_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_flipadst_8x4_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_identity_8x4_c itx_tmpl.c:inv_txfm_add_identity_adst_8x4_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_dct_dct_8x8_c Line | Count | Source | 127 | 158 | HIGHBD_DECL_SUFFIX) \ | 128 | 158 | { \ | 129 | 158 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 158 | HIGHBD_TAIL_SUFFIX); \ | 131 | 158 | } |
itx_tmpl.c:inv_txfm_add_identity_identity_8x8_c Line | Count | Source | 127 | 14 | HIGHBD_DECL_SUFFIX) \ | 128 | 14 | { \ | 129 | 14 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 14 | HIGHBD_TAIL_SUFFIX); \ | 131 | 14 | } |
itx_tmpl.c:inv_txfm_add_adst_dct_8x8_c Line | Count | Source | 127 | 148 | HIGHBD_DECL_SUFFIX) \ | 128 | 148 | { \ | 129 | 148 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 148 | HIGHBD_TAIL_SUFFIX); \ | 131 | 148 | } |
itx_tmpl.c:inv_txfm_add_dct_adst_8x8_c Line | Count | Source | 127 | 152 | HIGHBD_DECL_SUFFIX) \ | 128 | 152 | { \ | 129 | 152 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 152 | HIGHBD_TAIL_SUFFIX); \ | 131 | 152 | } |
itx_tmpl.c:inv_txfm_add_adst_adst_8x8_c Line | Count | Source | 127 | 168 | HIGHBD_DECL_SUFFIX) \ | 128 | 168 | { \ | 129 | 168 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 168 | HIGHBD_TAIL_SUFFIX); \ | 131 | 168 | } |
itx_tmpl.c:inv_txfm_add_flipadst_adst_8x8_c Line | Count | Source | 127 | 4 | HIGHBD_DECL_SUFFIX) \ | 128 | 4 | { \ | 129 | 4 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 4 | HIGHBD_TAIL_SUFFIX); \ | 131 | 4 | } |
itx_tmpl.c:inv_txfm_add_adst_flipadst_8x8_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_flipadst_dct_8x8_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_dct_flipadst_8x8_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_flipadst_8x8_c itx_tmpl.c:inv_txfm_add_dct_identity_8x8_c Line | Count | Source | 127 | 62 | HIGHBD_DECL_SUFFIX) \ | 128 | 62 | { \ | 129 | 62 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 62 | HIGHBD_TAIL_SUFFIX); \ | 131 | 62 | } |
itx_tmpl.c:inv_txfm_add_identity_dct_8x8_c Line | Count | Source | 127 | 20 | HIGHBD_DECL_SUFFIX) \ | 128 | 20 | { \ | 129 | 20 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 20 | HIGHBD_TAIL_SUFFIX); \ | 131 | 20 | } |
itx_tmpl.c:inv_txfm_add_flipadst_identity_8x8_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_identity_flipadst_8x8_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_identity_8x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_adst_8x8_c itx_tmpl.c:inv_txfm_add_dct_dct_8x16_c Line | Count | Source | 127 | 16 | HIGHBD_DECL_SUFFIX) \ | 128 | 16 | { \ | 129 | 16 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 16 | HIGHBD_TAIL_SUFFIX); \ | 131 | 16 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_identity_8x16_c itx_tmpl.c:inv_txfm_add_adst_dct_8x16_c Line | Count | Source | 127 | 6 | HIGHBD_DECL_SUFFIX) \ | 128 | 6 | { \ | 129 | 6 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 6 | HIGHBD_TAIL_SUFFIX); \ | 131 | 6 | } |
itx_tmpl.c:inv_txfm_add_dct_adst_8x16_c Line | Count | Source | 127 | 12 | HIGHBD_DECL_SUFFIX) \ | 128 | 12 | { \ | 129 | 12 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 12 | HIGHBD_TAIL_SUFFIX); \ | 131 | 12 | } |
itx_tmpl.c:inv_txfm_add_adst_adst_8x16_c Line | Count | Source | 127 | 8 | HIGHBD_DECL_SUFFIX) \ | 128 | 8 | { \ | 129 | 8 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 8 | HIGHBD_TAIL_SUFFIX); \ | 131 | 8 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_adst_8x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_flipadst_8x16_c itx_tmpl.c:inv_txfm_add_flipadst_dct_8x16_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_dct_flipadst_8x16_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_flipadst_flipadst_8x16_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_identity_8x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_dct_8x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_identity_8x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_flipadst_8x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_identity_8x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_adst_8x16_c itx_tmpl.c:inv_txfm_add_dct_dct_8x32_c Line | Count | Source | 127 | 24 | HIGHBD_DECL_SUFFIX) \ | 128 | 24 | { \ | 129 | 24 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 24 | HIGHBD_TAIL_SUFFIX); \ | 131 | 24 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_identity_8x32_c itx_tmpl.c:inv_txfm_add_dct_dct_16x4_c Line | Count | Source | 127 | 8 | HIGHBD_DECL_SUFFIX) \ | 128 | 8 | { \ | 129 | 8 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 8 | HIGHBD_TAIL_SUFFIX); \ | 131 | 8 | } |
itx_tmpl.c:inv_txfm_add_identity_identity_16x4_c Line | Count | Source | 127 | 4 | HIGHBD_DECL_SUFFIX) \ | 128 | 4 | { \ | 129 | 4 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 4 | HIGHBD_TAIL_SUFFIX); \ | 131 | 4 | } |
itx_tmpl.c:inv_txfm_add_adst_dct_16x4_c Line | Count | Source | 127 | 18 | HIGHBD_DECL_SUFFIX) \ | 128 | 18 | { \ | 129 | 18 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 18 | HIGHBD_TAIL_SUFFIX); \ | 131 | 18 | } |
itx_tmpl.c:inv_txfm_add_dct_adst_16x4_c Line | Count | Source | 127 | 20 | HIGHBD_DECL_SUFFIX) \ | 128 | 20 | { \ | 129 | 20 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 20 | HIGHBD_TAIL_SUFFIX); \ | 131 | 20 | } |
itx_tmpl.c:inv_txfm_add_adst_adst_16x4_c Line | Count | Source | 127 | 14 | HIGHBD_DECL_SUFFIX) \ | 128 | 14 | { \ | 129 | 14 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 14 | HIGHBD_TAIL_SUFFIX); \ | 131 | 14 | } |
itx_tmpl.c:inv_txfm_add_flipadst_adst_16x4_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_flipadst_16x4_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_dct_16x4_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_flipadst_16x4_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_flipadst_16x4_c itx_tmpl.c:inv_txfm_add_dct_identity_16x4_c Line | Count | Source | 127 | 4 | HIGHBD_DECL_SUFFIX) \ | 128 | 4 | { \ | 129 | 4 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 4 | HIGHBD_TAIL_SUFFIX); \ | 131 | 4 | } |
itx_tmpl.c:inv_txfm_add_identity_dct_16x4_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_identity_16x4_c itx_tmpl.c:inv_txfm_add_identity_flipadst_16x4_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_identity_16x4_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_adst_16x4_c itx_tmpl.c:inv_txfm_add_dct_dct_16x8_c Line | Count | Source | 127 | 18 | HIGHBD_DECL_SUFFIX) \ | 128 | 18 | { \ | 129 | 18 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 18 | HIGHBD_TAIL_SUFFIX); \ | 131 | 18 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_identity_16x8_c itx_tmpl.c:inv_txfm_add_adst_dct_16x8_c Line | Count | Source | 127 | 32 | HIGHBD_DECL_SUFFIX) \ | 128 | 32 | { \ | 129 | 32 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 32 | HIGHBD_TAIL_SUFFIX); \ | 131 | 32 | } |
itx_tmpl.c:inv_txfm_add_dct_adst_16x8_c Line | Count | Source | 127 | 10 | HIGHBD_DECL_SUFFIX) \ | 128 | 10 | { \ | 129 | 10 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 10 | HIGHBD_TAIL_SUFFIX); \ | 131 | 10 | } |
itx_tmpl.c:inv_txfm_add_adst_adst_16x8_c Line | Count | Source | 127 | 8 | HIGHBD_DECL_SUFFIX) \ | 128 | 8 | { \ | 129 | 8 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 8 | HIGHBD_TAIL_SUFFIX); \ | 131 | 8 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_adst_16x8_c itx_tmpl.c:inv_txfm_add_adst_flipadst_16x8_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_dct_16x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_flipadst_16x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_flipadst_16x8_c itx_tmpl.c:inv_txfm_add_dct_identity_16x8_c Line | Count | Source | 127 | 8 | HIGHBD_DECL_SUFFIX) \ | 128 | 8 | { \ | 129 | 8 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 8 | HIGHBD_TAIL_SUFFIX); \ | 131 | 8 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_dct_16x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_identity_16x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_flipadst_16x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_adst_identity_16x8_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_adst_16x8_c itx_tmpl.c:inv_txfm_add_dct_dct_16x16_c Line | Count | Source | 127 | 84 | HIGHBD_DECL_SUFFIX) \ | 128 | 84 | { \ | 129 | 84 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 84 | HIGHBD_TAIL_SUFFIX); \ | 131 | 84 | } |
itx_tmpl.c:inv_txfm_add_identity_identity_16x16_c Line | Count | Source | 127 | 4 | HIGHBD_DECL_SUFFIX) \ | 128 | 4 | { \ | 129 | 4 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 4 | HIGHBD_TAIL_SUFFIX); \ | 131 | 4 | } |
itx_tmpl.c:inv_txfm_add_adst_dct_16x16_c Line | Count | Source | 127 | 64 | HIGHBD_DECL_SUFFIX) \ | 128 | 64 | { \ | 129 | 64 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 64 | HIGHBD_TAIL_SUFFIX); \ | 131 | 64 | } |
itx_tmpl.c:inv_txfm_add_dct_adst_16x16_c Line | Count | Source | 127 | 52 | HIGHBD_DECL_SUFFIX) \ | 128 | 52 | { \ | 129 | 52 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 52 | HIGHBD_TAIL_SUFFIX); \ | 131 | 52 | } |
itx_tmpl.c:inv_txfm_add_adst_adst_16x16_c Line | Count | Source | 127 | 42 | HIGHBD_DECL_SUFFIX) \ | 128 | 42 | { \ | 129 | 42 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 42 | HIGHBD_TAIL_SUFFIX); \ | 131 | 42 | } |
itx_tmpl.c:inv_txfm_add_flipadst_adst_16x16_c Line | Count | Source | 127 | 4 | HIGHBD_DECL_SUFFIX) \ | 128 | 4 | { \ | 129 | 4 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 4 | HIGHBD_TAIL_SUFFIX); \ | 131 | 4 | } |
itx_tmpl.c:inv_txfm_add_adst_flipadst_16x16_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_flipadst_dct_16x16_c Line | Count | Source | 127 | 4 | HIGHBD_DECL_SUFFIX) \ | 128 | 4 | { \ | 129 | 4 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 4 | HIGHBD_TAIL_SUFFIX); \ | 131 | 4 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_flipadst_16x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_flipadst_flipadst_16x16_c itx_tmpl.c:inv_txfm_add_dct_identity_16x16_c Line | Count | Source | 127 | 4 | HIGHBD_DECL_SUFFIX) \ | 128 | 4 | { \ | 129 | 4 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 4 | HIGHBD_TAIL_SUFFIX); \ | 131 | 4 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_dct_16x16_c itx_tmpl.c:inv_txfm_add_dct_dct_16x32_c Line | Count | Source | 127 | 22 | HIGHBD_DECL_SUFFIX) \ | 128 | 22 | { \ | 129 | 22 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 22 | HIGHBD_TAIL_SUFFIX); \ | 131 | 22 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_identity_16x32_c itx_tmpl.c:inv_txfm_add_dct_dct_16x64_c Line | Count | Source | 127 | 2 | HIGHBD_DECL_SUFFIX) \ | 128 | 2 | { \ | 129 | 2 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 2 | HIGHBD_TAIL_SUFFIX); \ | 131 | 2 | } |
itx_tmpl.c:inv_txfm_add_dct_dct_32x8_c Line | Count | Source | 127 | 20 | HIGHBD_DECL_SUFFIX) \ | 128 | 20 | { \ | 129 | 20 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 20 | HIGHBD_TAIL_SUFFIX); \ | 131 | 20 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_identity_32x8_c itx_tmpl.c:inv_txfm_add_dct_dct_32x16_c Line | Count | Source | 127 | 12 | HIGHBD_DECL_SUFFIX) \ | 128 | 12 | { \ | 129 | 12 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 12 | HIGHBD_TAIL_SUFFIX); \ | 131 | 12 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_identity_32x16_c itx_tmpl.c:inv_txfm_add_dct_dct_32x32_c Line | Count | Source | 127 | 28 | HIGHBD_DECL_SUFFIX) \ | 128 | 28 | { \ | 129 | 28 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 28 | HIGHBD_TAIL_SUFFIX); \ | 131 | 28 | } |
Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_identity_identity_32x32_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_dct_32x64_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_dct_64x16_c Unexecuted instantiation: itx_tmpl.c:inv_txfm_add_dct_dct_64x32_c itx_tmpl.c:inv_txfm_add_dct_dct_64x64_c Line | Count | Source | 127 | 38 | HIGHBD_DECL_SUFFIX) \ | 128 | 38 | { \ | 129 | 38 | inv_txfm_add_c(dst, stride, coeff, eob, pfx##TX_##w##X##h, shift, type \ | 130 | 38 | HIGHBD_TAIL_SUFFIX); \ | 131 | 38 | } |
|
132 | | |
133 | | #define inv_txfm_fn64(pfx, w, h, shift) \ |
134 | | inv_txfm_fn(dct, dct, DCT_DCT, pfx, w, h, shift) |
135 | | |
136 | | #define inv_txfm_fn32(pfx, w, h, shift) \ |
137 | | inv_txfm_fn64(pfx, w, h, shift) \ |
138 | | inv_txfm_fn(identity, identity, IDTX, pfx, w, h, shift) |
139 | | |
140 | | #define inv_txfm_fn16(pfx, w, h, shift) \ |
141 | | inv_txfm_fn32(pfx, w, h, shift) \ |
142 | | inv_txfm_fn(adst, dct, ADST_DCT, pfx, w, h, shift) \ |
143 | | inv_txfm_fn(dct, adst, DCT_ADST, pfx, w, h, shift) \ |
144 | | inv_txfm_fn(adst, adst, ADST_ADST, pfx, w, h, shift) \ |
145 | | inv_txfm_fn(dct, flipadst, DCT_FLIPADST, pfx, w, h, shift) \ |
146 | | inv_txfm_fn(flipadst, dct, FLIPADST_DCT, pfx, w, h, shift) \ |
147 | | inv_txfm_fn(adst, flipadst, ADST_FLIPADST, pfx, w, h, shift) \ |
148 | | inv_txfm_fn(flipadst, adst, FLIPADST_ADST, pfx, w, h, shift) \ |
149 | | inv_txfm_fn(flipadst, flipadst, FLIPADST_FLIPADST, pfx, w, h, shift) \ |
150 | | inv_txfm_fn(identity, dct, H_DCT, pfx, w, h, shift) \ |
151 | | inv_txfm_fn(dct, identity, V_DCT, pfx, w, h, shift) \ |
152 | | |
153 | | #define inv_txfm_fn84(pfx, w, h, shift) \ |
154 | | inv_txfm_fn16(pfx, w, h, shift) \ |
155 | | inv_txfm_fn(identity, flipadst, H_FLIPADST, pfx, w, h, shift) \ |
156 | | inv_txfm_fn(flipadst, identity, V_FLIPADST, pfx, w, h, shift) \ |
157 | | inv_txfm_fn(identity, adst, H_ADST, pfx, w, h, shift) \ |
158 | | inv_txfm_fn(adst, identity, V_ADST, pfx, w, h, shift) \ |
159 | | |
160 | | inv_txfm_fn84( , 4, 4, 0) |
161 | | inv_txfm_fn84(R, 4, 8, 0) |
162 | | inv_txfm_fn84(R, 4, 16, 1) |
163 | | inv_txfm_fn84(R, 8, 4, 0) |
164 | | inv_txfm_fn84( , 8, 8, 1) |
165 | | inv_txfm_fn84(R, 8, 16, 1) |
166 | | inv_txfm_fn32(R, 8, 32, 2) |
167 | | inv_txfm_fn84(R, 16, 4, 1) |
168 | | inv_txfm_fn84(R, 16, 8, 1) |
169 | | inv_txfm_fn16( , 16, 16, 2) |
170 | | inv_txfm_fn32(R, 16, 32, 1) |
171 | | inv_txfm_fn64(R, 16, 64, 2) |
172 | | inv_txfm_fn32(R, 32, 8, 2) |
173 | | inv_txfm_fn32(R, 32, 16, 1) |
174 | | inv_txfm_fn32( , 32, 32, 2) |
175 | | inv_txfm_fn64(R, 32, 64, 1) |
176 | | inv_txfm_fn64(R, 64, 16, 2) |
177 | | inv_txfm_fn64(R, 64, 32, 1) |
178 | | inv_txfm_fn64( , 64, 64, 2) |
179 | | |
180 | | #if !(HAVE_ASM && TRIM_DSP_FUNCTIONS && ( \ |
181 | | ARCH_AARCH64 || \ |
182 | | (ARCH_ARM && (defined(__ARM_NEON) || defined(__APPLE__) || defined(_WIN32))) \ |
183 | | )) |
184 | | static void inv_txfm_add_wht_wht_4x4_c(pixel *dst, const ptrdiff_t stride, |
185 | | coef *const coeff, const int eob |
186 | | HIGHBD_DECL_SUFFIX) |
187 | 0 | { |
188 | 0 | int32_t tmp[4 * 4], *c = tmp; |
189 | 0 | for (int y = 0; y < 4; y++, c += 4) { |
190 | 0 | for (int x = 0; x < 4; x++) |
191 | 0 | c[x] = coeff[y + x * 4] >> 2; |
192 | 0 | dav1d_inv_wht4_1d_c(c, 1); |
193 | 0 | } |
194 | 0 | memset(coeff, 0, sizeof(*coeff) * 4 * 4); |
195 | |
|
196 | 0 | for (int x = 0; x < 4; x++) |
197 | 0 | dav1d_inv_wht4_1d_c(&tmp[x], 4); |
198 | |
|
199 | 0 | c = tmp; |
200 | 0 | for (int y = 0; y < 4; y++, dst += PXSTRIDE(stride)) |
201 | 0 | for (int x = 0; x < 4; x++) |
202 | 0 | dst[x] = iclip_pixel(dst[x] + *c++); |
203 | 0 | } |
204 | | #endif |
205 | | |
206 | | #if HAVE_ASM |
207 | | #if ARCH_AARCH64 || ARCH_ARM |
208 | | #include "src/arm/itx.h" |
209 | | #elif ARCH_LOONGARCH64 |
210 | | #include "src/loongarch/itx.h" |
211 | | #elif ARCH_PPC64LE |
212 | | #include "src/ppc/itx.h" |
213 | | #elif ARCH_RISCV |
214 | | #include "src/riscv/itx.h" |
215 | | #elif ARCH_X86 |
216 | | #include "src/x86/itx.h" |
217 | | #endif |
218 | | #endif |
219 | | |
220 | 4 | COLD void bitfn(dav1d_itx_dsp_init)(Dav1dInvTxfmDSPContext *const c, int bpc) { |
221 | 4 | #define assign_itx_all_fn64(w, h, pfx) \ |
222 | 76 | c->itxfm_add[pfx##TX_##w##X##h][DCT_DCT ] = \ |
223 | 76 | inv_txfm_add_dct_dct_##w##x##h##_c |
224 | | |
225 | 4 | #define assign_itx_all_fn32(w, h, pfx) \ |
226 | 56 | assign_itx_all_fn64(w, h, pfx); \ |
227 | 56 | c->itxfm_add[pfx##TX_##w##X##h][IDTX] = \ |
228 | 56 | inv_txfm_add_identity_identity_##w##x##h##_c |
229 | | |
230 | 4 | #define assign_itx_all_fn16(w, h, pfx) \ |
231 | 36 | assign_itx_all_fn32(w, h, pfx); \ |
232 | 36 | c->itxfm_add[pfx##TX_##w##X##h][DCT_ADST ] = \ |
233 | 36 | inv_txfm_add_adst_dct_##w##x##h##_c; \ |
234 | 36 | c->itxfm_add[pfx##TX_##w##X##h][ADST_DCT ] = \ |
235 | 36 | inv_txfm_add_dct_adst_##w##x##h##_c; \ |
236 | 36 | c->itxfm_add[pfx##TX_##w##X##h][ADST_ADST] = \ |
237 | 36 | inv_txfm_add_adst_adst_##w##x##h##_c; \ |
238 | 36 | c->itxfm_add[pfx##TX_##w##X##h][ADST_FLIPADST] = \ |
239 | 36 | inv_txfm_add_flipadst_adst_##w##x##h##_c; \ |
240 | 36 | c->itxfm_add[pfx##TX_##w##X##h][FLIPADST_ADST] = \ |
241 | 36 | inv_txfm_add_adst_flipadst_##w##x##h##_c; \ |
242 | 36 | c->itxfm_add[pfx##TX_##w##X##h][DCT_FLIPADST] = \ |
243 | 36 | inv_txfm_add_flipadst_dct_##w##x##h##_c; \ |
244 | 36 | c->itxfm_add[pfx##TX_##w##X##h][FLIPADST_DCT] = \ |
245 | 36 | inv_txfm_add_dct_flipadst_##w##x##h##_c; \ |
246 | 36 | c->itxfm_add[pfx##TX_##w##X##h][FLIPADST_FLIPADST] = \ |
247 | 36 | inv_txfm_add_flipadst_flipadst_##w##x##h##_c; \ |
248 | 36 | c->itxfm_add[pfx##TX_##w##X##h][H_DCT] = \ |
249 | 36 | inv_txfm_add_dct_identity_##w##x##h##_c; \ |
250 | 36 | c->itxfm_add[pfx##TX_##w##X##h][V_DCT] = \ |
251 | 36 | inv_txfm_add_identity_dct_##w##x##h##_c |
252 | | |
253 | 4 | #define assign_itx_all_fn84(w, h, pfx) \ |
254 | 32 | assign_itx_all_fn16(w, h, pfx); \ |
255 | 32 | c->itxfm_add[pfx##TX_##w##X##h][H_FLIPADST] = \ |
256 | 32 | inv_txfm_add_flipadst_identity_##w##x##h##_c; \ |
257 | 32 | c->itxfm_add[pfx##TX_##w##X##h][V_FLIPADST] = \ |
258 | 32 | inv_txfm_add_identity_flipadst_##w##x##h##_c; \ |
259 | 32 | c->itxfm_add[pfx##TX_##w##X##h][H_ADST] = \ |
260 | 32 | inv_txfm_add_adst_identity_##w##x##h##_c; \ |
261 | 32 | c->itxfm_add[pfx##TX_##w##X##h][V_ADST] = \ |
262 | 32 | inv_txfm_add_identity_adst_##w##x##h##_c; \ |
263 | 4 | |
264 | 4 | #if !(HAVE_ASM && TRIM_DSP_FUNCTIONS && ( \ |
265 | 4 | ARCH_AARCH64 || \ |
266 | 4 | (ARCH_ARM && (defined(__ARM_NEON) || defined(__APPLE__) || defined(_WIN32))) \ |
267 | 4 | )) |
268 | 4 | c->itxfm_add[TX_4X4][WHT_WHT] = inv_txfm_add_wht_wht_4x4_c; |
269 | 4 | #endif |
270 | 4 | assign_itx_all_fn84( 4, 4, ); |
271 | 4 | assign_itx_all_fn84( 4, 8, R); |
272 | 4 | assign_itx_all_fn84( 4, 16, R); |
273 | 4 | assign_itx_all_fn84( 8, 4, R); |
274 | 4 | assign_itx_all_fn84( 8, 8, ); |
275 | 4 | assign_itx_all_fn84( 8, 16, R); |
276 | 4 | assign_itx_all_fn32( 8, 32, R); |
277 | 4 | assign_itx_all_fn84(16, 4, R); |
278 | 4 | assign_itx_all_fn84(16, 8, R); |
279 | 4 | assign_itx_all_fn16(16, 16, ); |
280 | 4 | assign_itx_all_fn32(16, 32, R); |
281 | 4 | assign_itx_all_fn64(16, 64, R); |
282 | 4 | assign_itx_all_fn32(32, 8, R); |
283 | 4 | assign_itx_all_fn32(32, 16, R); |
284 | 4 | assign_itx_all_fn32(32, 32, ); |
285 | 4 | assign_itx_all_fn64(32, 64, R); |
286 | 4 | assign_itx_all_fn64(64, 16, R); |
287 | 4 | assign_itx_all_fn64(64, 32, R); |
288 | 4 | assign_itx_all_fn64(64, 64, ); |
289 | | |
290 | 4 | int all_simd = 0; |
291 | | #if HAVE_ASM |
292 | | #if ARCH_AARCH64 || ARCH_ARM |
293 | | itx_dsp_init_arm(c, bpc, &all_simd); |
294 | | #endif |
295 | | #if ARCH_LOONGARCH64 |
296 | | itx_dsp_init_loongarch(c, bpc); |
297 | | #endif |
298 | | #if ARCH_PPC64LE |
299 | | itx_dsp_init_ppc(c, bpc); |
300 | | #endif |
301 | | #if ARCH_RISCV |
302 | | itx_dsp_init_riscv(c, bpc); |
303 | | #endif |
304 | | #if ARCH_X86 |
305 | | itx_dsp_init_x86(c, bpc, &all_simd); |
306 | | #endif |
307 | | #endif |
308 | | |
309 | 4 | if (!all_simd) |
310 | 4 | dav1d_init_last_nonzero_col_from_eob_tables(); |
311 | 4 | } Line | Count | Source | 220 | 4 | COLD void bitfn(dav1d_itx_dsp_init)(Dav1dInvTxfmDSPContext *const c, int bpc) { | 221 | 4 | #define assign_itx_all_fn64(w, h, pfx) \ | 222 | 4 | c->itxfm_add[pfx##TX_##w##X##h][DCT_DCT ] = \ | 223 | 4 | inv_txfm_add_dct_dct_##w##x##h##_c | 224 | | | 225 | 4 | #define assign_itx_all_fn32(w, h, pfx) \ | 226 | 4 | assign_itx_all_fn64(w, h, pfx); \ | 227 | 4 | c->itxfm_add[pfx##TX_##w##X##h][IDTX] = \ | 228 | 4 | inv_txfm_add_identity_identity_##w##x##h##_c | 229 | | | 230 | 4 | #define assign_itx_all_fn16(w, h, pfx) \ | 231 | 4 | assign_itx_all_fn32(w, h, pfx); \ | 232 | 4 | c->itxfm_add[pfx##TX_##w##X##h][DCT_ADST ] = \ | 233 | 4 | inv_txfm_add_adst_dct_##w##x##h##_c; \ | 234 | 4 | c->itxfm_add[pfx##TX_##w##X##h][ADST_DCT ] = \ | 235 | 4 | inv_txfm_add_dct_adst_##w##x##h##_c; \ | 236 | 4 | c->itxfm_add[pfx##TX_##w##X##h][ADST_ADST] = \ | 237 | 4 | inv_txfm_add_adst_adst_##w##x##h##_c; \ | 238 | 4 | c->itxfm_add[pfx##TX_##w##X##h][ADST_FLIPADST] = \ | 239 | 4 | inv_txfm_add_flipadst_adst_##w##x##h##_c; \ | 240 | 4 | c->itxfm_add[pfx##TX_##w##X##h][FLIPADST_ADST] = \ | 241 | 4 | inv_txfm_add_adst_flipadst_##w##x##h##_c; \ | 242 | 4 | c->itxfm_add[pfx##TX_##w##X##h][DCT_FLIPADST] = \ | 243 | 4 | inv_txfm_add_flipadst_dct_##w##x##h##_c; \ | 244 | 4 | c->itxfm_add[pfx##TX_##w##X##h][FLIPADST_DCT] = \ | 245 | 4 | inv_txfm_add_dct_flipadst_##w##x##h##_c; \ | 246 | 4 | c->itxfm_add[pfx##TX_##w##X##h][FLIPADST_FLIPADST] = \ | 247 | 4 | inv_txfm_add_flipadst_flipadst_##w##x##h##_c; \ | 248 | 4 | c->itxfm_add[pfx##TX_##w##X##h][H_DCT] = \ | 249 | 4 | inv_txfm_add_dct_identity_##w##x##h##_c; \ | 250 | 4 | c->itxfm_add[pfx##TX_##w##X##h][V_DCT] = \ | 251 | 4 | inv_txfm_add_identity_dct_##w##x##h##_c | 252 | | | 253 | 4 | #define assign_itx_all_fn84(w, h, pfx) \ | 254 | 4 | assign_itx_all_fn16(w, h, pfx); \ | 255 | 4 | c->itxfm_add[pfx##TX_##w##X##h][H_FLIPADST] = \ | 256 | 4 | inv_txfm_add_flipadst_identity_##w##x##h##_c; \ | 257 | 4 | c->itxfm_add[pfx##TX_##w##X##h][V_FLIPADST] = \ | 258 | 4 | inv_txfm_add_identity_flipadst_##w##x##h##_c; \ | 259 | 4 | c->itxfm_add[pfx##TX_##w##X##h][H_ADST] = \ | 260 | 4 | inv_txfm_add_adst_identity_##w##x##h##_c; \ | 261 | 4 | c->itxfm_add[pfx##TX_##w##X##h][V_ADST] = \ | 262 | 4 | inv_txfm_add_identity_adst_##w##x##h##_c; \ | 263 | 4 | | 264 | 4 | #if !(HAVE_ASM && TRIM_DSP_FUNCTIONS && ( \ | 265 | 4 | ARCH_AARCH64 || \ | 266 | 4 | (ARCH_ARM && (defined(__ARM_NEON) || defined(__APPLE__) || defined(_WIN32))) \ | 267 | 4 | )) | 268 | 4 | c->itxfm_add[TX_4X4][WHT_WHT] = inv_txfm_add_wht_wht_4x4_c; | 269 | 4 | #endif | 270 | 4 | assign_itx_all_fn84( 4, 4, ); | 271 | 4 | assign_itx_all_fn84( 4, 8, R); | 272 | 4 | assign_itx_all_fn84( 4, 16, R); | 273 | 4 | assign_itx_all_fn84( 8, 4, R); | 274 | 4 | assign_itx_all_fn84( 8, 8, ); | 275 | 4 | assign_itx_all_fn84( 8, 16, R); | 276 | 4 | assign_itx_all_fn32( 8, 32, R); | 277 | 4 | assign_itx_all_fn84(16, 4, R); | 278 | 4 | assign_itx_all_fn84(16, 8, R); | 279 | 4 | assign_itx_all_fn16(16, 16, ); | 280 | 4 | assign_itx_all_fn32(16, 32, R); | 281 | 4 | assign_itx_all_fn64(16, 64, R); | 282 | 4 | assign_itx_all_fn32(32, 8, R); | 283 | 4 | assign_itx_all_fn32(32, 16, R); | 284 | 4 | assign_itx_all_fn32(32, 32, ); | 285 | 4 | assign_itx_all_fn64(32, 64, R); | 286 | 4 | assign_itx_all_fn64(64, 16, R); | 287 | 4 | assign_itx_all_fn64(64, 32, R); | 288 | 4 | assign_itx_all_fn64(64, 64, ); | 289 | | | 290 | 4 | int all_simd = 0; | 291 | | #if HAVE_ASM | 292 | | #if ARCH_AARCH64 || ARCH_ARM | 293 | | itx_dsp_init_arm(c, bpc, &all_simd); | 294 | | #endif | 295 | | #if ARCH_LOONGARCH64 | 296 | | itx_dsp_init_loongarch(c, bpc); | 297 | | #endif | 298 | | #if ARCH_PPC64LE | 299 | | itx_dsp_init_ppc(c, bpc); | 300 | | #endif | 301 | | #if ARCH_RISCV | 302 | | itx_dsp_init_riscv(c, bpc); | 303 | | #endif | 304 | | #if ARCH_X86 | 305 | | itx_dsp_init_x86(c, bpc, &all_simd); | 306 | | #endif | 307 | | #endif | 308 | | | 309 | 4 | if (!all_simd) | 310 | 4 | dav1d_init_last_nonzero_col_from_eob_tables(); | 311 | 4 | } |
Unexecuted instantiation: dav1d_itx_dsp_init_16bpc |