Coverage Report

Created: 2025-07-11 06:43

/src/libhevc/decoder/ihevcd_api.c
Line
Count
Source (jump to first uncovered line)
1
/******************************************************************************
2
*
3
* Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4
*
5
* Licensed under the Apache License, Version 2.0 (the "License");
6
* you may not use this file except in compliance with the License.
7
* You may obtain a copy of the License at:
8
*
9
* http://www.apache.org/licenses/LICENSE-2.0
10
*
11
* Unless required by applicable law or agreed to in writing, software
12
* distributed under the License is distributed on an "AS IS" BASIS,
13
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
* See the License for the specific language governing permissions and
15
* limitations under the License.
16
*
17
******************************************************************************/
18
/**
19
*******************************************************************************
20
* @file
21
*  ihevcd_api.c
22
*
23
* @brief
24
*  Contains api functions definitions for HEVC decoder
25
*
26
* @author
27
*  Harish
28
*
29
* @par List of Functions:
30
* - api_check_struct_sanity()
31
* - ihevcd_get_version()
32
* - ihevcd_set_default_params()
33
* - ihevcd_init()
34
* - ihevcd_get_num_rec()
35
* - ihevcd_allocate_static_bufs()
36
* - ihevcd_create()
37
* - ihevcd_retrieve_memrec()
38
* - ihevcd_set_display_frame()
39
* - ihevcd_set_flush_mode()
40
* - ihevcd_get_status()
41
* - ihevcd_get_buf_info()
42
* - ihevcd_set_params()
43
* - ihevcd_reset()
44
* - ihevcd_rel_display_frame()
45
* - ihevcd_disable_deblk()
46
* - ihevcd_get_frame_dimensions()
47
* - ihevcd_set_num_cores()
48
* - ihevcd_ctl()
49
* - ihevcd_cxa_api_function()
50
*
51
* @remarks
52
*  None
53
*
54
*******************************************************************************
55
*/
56
/*****************************************************************************/
57
/* File Includes                                                             */
58
/*****************************************************************************/
59
#include <stdio.h>
60
#include <stddef.h>
61
#include <stdlib.h>
62
#include <string.h>
63
64
#include "ihevc_typedefs.h"
65
#include "iv.h"
66
#include "ivd.h"
67
#include "ihevcd_cxa.h"
68
#include "ithread.h"
69
70
#include "ihevc_defs.h"
71
#include "ihevc_debug.h"
72
73
#include "ihevc_structs.h"
74
#include "ihevc_macros.h"
75
#include "ihevc_platform_macros.h"
76
77
#include "ihevc_buf_mgr.h"
78
#include "ihevc_dpb_mgr.h"
79
#include "ihevc_disp_mgr.h"
80
#include "ihevc_common_tables.h"
81
#include "ihevc_cabac_tables.h"
82
#include "ihevc_error.h"
83
84
#include "ihevcd_defs.h"
85
#include "ihevcd_trace.h"
86
87
#include "ihevcd_function_selector.h"
88
#include "ihevcd_structs.h"
89
#include "ihevcd_error.h"
90
#include "ihevcd_utils.h"
91
#include "ihevcd_decode.h"
92
#include "ihevcd_job_queue.h"
93
#include "ihevcd_statistics.h"
94
95
96
63.1k
#define ALIGNED_FREE(ps_codec, y) \
97
63.1k
if(y) {ps_codec->pf_aligned_free(ps_codec->pv_mem_ctxt, ((void *)y)); (y) = NULL;}
98
99
/*****************************************************************************/
100
/* Function Prototypes                                                       */
101
/*****************************************************************************/
102
IV_API_CALL_STATUS_T ihevcd_get_version(CHAR *pc_version_string,
103
                                        UWORD32 u4_version_buffer_size);
104
WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec);
105
106
107
/**
108
*******************************************************************************
109
*
110
* @brief
111
*  Used to test arguments for corresponding API call
112
*
113
* @par Description:
114
*  For each command the arguments are validated
115
*
116
* @param[in] ps_handle
117
*  Codec handle at API level
118
*
119
* @param[in] pv_api_ip
120
*  Pointer to input structure
121
*
122
* @param[out] pv_api_op
123
*  Pointer to output structure
124
*
125
* @returns  Status of error checking
126
*
127
* @remarks
128
*
129
*
130
*******************************************************************************
131
*/
132
133
static IV_API_CALL_STATUS_T api_check_struct_sanity(iv_obj_t *ps_handle,
134
                                                    void *pv_api_ip,
135
                                                    void *pv_api_op)
136
48.0k
{
137
48.0k
    IVD_API_COMMAND_TYPE_T e_cmd;
138
48.0k
    UWORD32 *pu4_api_ip;
139
48.0k
    UWORD32 *pu4_api_op;
140
48.0k
    WORD32 i;
141
142
48.0k
    if(NULL == pv_api_op)
143
0
        return (IV_FAIL);
144
145
48.0k
    if(NULL == pv_api_ip)
146
0
        return (IV_FAIL);
147
148
48.0k
    pu4_api_ip = (UWORD32 *)pv_api_ip;
149
48.0k
    pu4_api_op = (UWORD32 *)pv_api_op;
150
48.0k
    e_cmd = (IVD_API_COMMAND_TYPE_T)*(pu4_api_ip + 1);
151
152
48.0k
    *(pu4_api_op + 1) = 0;
153
    /* error checks on handle */
154
48.0k
    switch((WORD32)e_cmd)
155
48.0k
    {
156
555
        case IVD_CMD_CREATE:
157
555
            break;
158
159
0
        case IVD_CMD_REL_DISPLAY_FRAME:
160
0
        case IVD_CMD_SET_DISPLAY_FRAME:
161
0
        case IVD_CMD_GET_DISPLAY_FRAME:
162
43.0k
        case IVD_CMD_VIDEO_DECODE:
163
43.6k
        case IVD_CMD_DELETE:
164
47.5k
        case IVD_CMD_VIDEO_CTL:
165
47.5k
            if(ps_handle == NULL)
166
615
            {
167
615
                *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
168
615
                *(pu4_api_op + 1) |= IVD_HANDLE_NULL;
169
615
                return IV_FAIL;
170
615
            }
171
172
46.9k
            if(ps_handle->u4_size != sizeof(iv_obj_t))
173
0
            {
174
0
                *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
175
0
                *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT;
176
0
                return IV_FAIL;
177
0
            }
178
179
180
46.9k
            if(ps_handle->pv_codec_handle == NULL)
181
0
            {
182
0
                *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
183
0
                *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
184
0
                return IV_FAIL;
185
0
            }
186
46.9k
            break;
187
46.9k
        default:
188
0
            *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
189
0
            *(pu4_api_op + 1) |= IVD_INVALID_API_CMD;
190
0
            return IV_FAIL;
191
48.0k
    }
192
193
47.4k
    switch((WORD32)e_cmd)
194
47.4k
    {
195
555
        case IVD_CMD_CREATE:
196
555
        {
197
555
            ihevcd_cxa_create_ip_t *ps_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
198
555
            ihevcd_cxa_create_op_t *ps_op = (ihevcd_cxa_create_op_t *)pv_api_op;
199
200
201
555
            ps_op->s_ivd_create_op_t.u4_error_code = 0;
202
203
555
            if((ps_ip->s_ivd_create_ip_t.u4_size > sizeof(ihevcd_cxa_create_ip_t))
204
555
                            || (ps_ip->s_ivd_create_ip_t.u4_size
205
555
                                            < sizeof(ivd_create_ip_t)))
206
0
            {
207
0
                ps_op->s_ivd_create_op_t.u4_error_code |= 1
208
0
                                << IVD_UNSUPPORTEDPARAM;
209
0
                ps_op->s_ivd_create_op_t.u4_error_code |=
210
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
211
212
0
                return (IV_FAIL);
213
0
            }
214
215
555
            if((ps_op->s_ivd_create_op_t.u4_size != sizeof(ihevcd_cxa_create_op_t))
216
555
                            && (ps_op->s_ivd_create_op_t.u4_size
217
0
                                            != sizeof(ivd_create_op_t)))
218
0
            {
219
0
                ps_op->s_ivd_create_op_t.u4_error_code |= 1
220
0
                                << IVD_UNSUPPORTEDPARAM;
221
0
                ps_op->s_ivd_create_op_t.u4_error_code |=
222
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
223
224
0
                return (IV_FAIL);
225
0
            }
226
227
228
555
            if((ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P)
229
555
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
230
340
                                            != IV_YUV_422ILE)
231
555
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
232
274
                                            != IV_RGB_565)
233
555
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
234
229
                                            != IV_YUV_420SP_UV)
235
555
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
236
144
                                            != IV_YUV_420SP_VU))
237
3
            {
238
3
                ps_op->s_ivd_create_op_t.u4_error_code |= 1
239
3
                                << IVD_UNSUPPORTEDPARAM;
240
3
                ps_op->s_ivd_create_op_t.u4_error_code |=
241
3
                                IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
242
243
3
                return (IV_FAIL);
244
3
            }
245
246
555
        }
247
552
            break;
248
249
552
        case IVD_CMD_GET_DISPLAY_FRAME:
250
0
        {
251
0
            ihevcd_cxa_get_display_frame_ip_t *ps_ip =
252
0
                            (ihevcd_cxa_get_display_frame_ip_t *)pv_api_ip;
253
0
            ihevcd_cxa_get_display_frame_op_t *ps_op =
254
0
                            (ihevcd_cxa_get_display_frame_op_t *)pv_api_op;
255
256
0
            ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0;
257
258
0
            if((ps_ip->s_ivd_get_display_frame_ip_t.u4_size
259
0
                            != sizeof(ihevcd_cxa_get_display_frame_ip_t))
260
0
                            && (ps_ip->s_ivd_get_display_frame_ip_t.u4_size
261
0
                                            != sizeof(ivd_get_display_frame_ip_t)))
262
0
            {
263
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
264
0
                                << IVD_UNSUPPORTEDPARAM;
265
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
266
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
267
0
                return (IV_FAIL);
268
0
            }
269
270
0
            if((ps_op->s_ivd_get_display_frame_op_t.u4_size
271
0
                            != sizeof(ihevcd_cxa_get_display_frame_op_t))
272
0
                            && (ps_op->s_ivd_get_display_frame_op_t.u4_size
273
0
                                            != sizeof(ivd_get_display_frame_op_t)))
274
0
            {
275
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
276
0
                                << IVD_UNSUPPORTEDPARAM;
277
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
278
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
279
0
                return (IV_FAIL);
280
0
            }
281
282
0
        }
283
0
            break;
284
285
0
        case IVD_CMD_REL_DISPLAY_FRAME:
286
0
        {
287
0
            ihevcd_cxa_rel_display_frame_ip_t *ps_ip =
288
0
                            (ihevcd_cxa_rel_display_frame_ip_t *)pv_api_ip;
289
0
            ihevcd_cxa_rel_display_frame_op_t *ps_op =
290
0
                            (ihevcd_cxa_rel_display_frame_op_t *)pv_api_op;
291
292
0
            ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0;
293
294
0
            if((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
295
0
                            != sizeof(ihevcd_cxa_rel_display_frame_ip_t))
296
0
                            && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
297
0
                                            != sizeof(ivd_rel_display_frame_ip_t)))
298
0
            {
299
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
300
0
                                << IVD_UNSUPPORTEDPARAM;
301
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
302
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
303
0
                return (IV_FAIL);
304
0
            }
305
306
0
            if((ps_op->s_ivd_rel_display_frame_op_t.u4_size
307
0
                            != sizeof(ihevcd_cxa_rel_display_frame_op_t))
308
0
                            && (ps_op->s_ivd_rel_display_frame_op_t.u4_size
309
0
                                            != sizeof(ivd_rel_display_frame_op_t)))
310
0
            {
311
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
312
0
                                << IVD_UNSUPPORTEDPARAM;
313
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
314
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
315
0
                return (IV_FAIL);
316
0
            }
317
318
0
        }
319
0
            break;
320
321
0
        case IVD_CMD_SET_DISPLAY_FRAME:
322
0
        {
323
0
            ihevcd_cxa_set_display_frame_ip_t *ps_ip =
324
0
                            (ihevcd_cxa_set_display_frame_ip_t *)pv_api_ip;
325
0
            ihevcd_cxa_set_display_frame_op_t *ps_op =
326
0
                            (ihevcd_cxa_set_display_frame_op_t *)pv_api_op;
327
0
            UWORD32 j;
328
329
0
            ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0;
330
331
0
            if((ps_ip->s_ivd_set_display_frame_ip_t.u4_size
332
0
                            != sizeof(ihevcd_cxa_set_display_frame_ip_t))
333
0
                            && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size
334
0
                                            != sizeof(ivd_set_display_frame_ip_t)))
335
0
            {
336
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
337
0
                                << IVD_UNSUPPORTEDPARAM;
338
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
339
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
340
0
                return (IV_FAIL);
341
0
            }
342
343
0
            if((ps_op->s_ivd_set_display_frame_op_t.u4_size
344
0
                            != sizeof(ihevcd_cxa_set_display_frame_op_t))
345
0
                            && (ps_op->s_ivd_set_display_frame_op_t.u4_size
346
0
                                            != sizeof(ivd_set_display_frame_op_t)))
347
0
            {
348
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
349
0
                                << IVD_UNSUPPORTEDPARAM;
350
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
351
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
352
0
                return (IV_FAIL);
353
0
            }
354
355
0
            if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0)
356
0
            {
357
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
358
0
                                << IVD_UNSUPPORTEDPARAM;
359
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
360
0
                                IVD_DISP_FRM_ZERO_OP_BUFS;
361
0
                return IV_FAIL;
362
0
            }
363
364
0
            for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs;
365
0
                            j++)
366
0
            {
367
0
                if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs
368
0
                                == 0)
369
0
                {
370
0
                    ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
371
0
                                    << IVD_UNSUPPORTEDPARAM;
372
0
                    ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
373
0
                                    IVD_DISP_FRM_ZERO_OP_BUFS;
374
0
                    return IV_FAIL;
375
0
                }
376
377
0
                for(i = 0;
378
0
                                i
379
0
                                                < (WORD32)ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;
380
0
                                i++)
381
0
                {
382
0
                    if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i]
383
0
                                    == NULL)
384
0
                    {
385
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
386
0
                                        << IVD_UNSUPPORTEDPARAM;
387
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
388
0
                                        IVD_DISP_FRM_OP_BUF_NULL;
389
0
                        return IV_FAIL;
390
0
                    }
391
392
0
                    if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i]
393
0
                                    == 0)
394
0
                    {
395
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
396
0
                                        << IVD_UNSUPPORTEDPARAM;
397
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
398
0
                                        IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
399
0
                        return IV_FAIL;
400
0
                    }
401
0
                }
402
0
            }
403
0
        }
404
0
            break;
405
406
42.4k
        case IVD_CMD_VIDEO_DECODE:
407
42.4k
        {
408
42.4k
            ihevcd_cxa_video_decode_ip_t *ps_ip =
409
42.4k
                            (ihevcd_cxa_video_decode_ip_t *)pv_api_ip;
410
42.4k
            ihevcd_cxa_video_decode_op_t *ps_op =
411
42.4k
                            (ihevcd_cxa_video_decode_op_t *)pv_api_op;
412
413
42.4k
            DEBUG("The input bytes is: %d",
414
42.4k
                            ps_ip->s_ivd_video_decode_ip_t.u4_num_Bytes);
415
42.4k
            ps_op->s_ivd_video_decode_op_t.u4_error_code = 0;
416
417
42.4k
            if(ps_ip->s_ivd_video_decode_ip_t.u4_size
418
42.4k
                            != sizeof(ihevcd_cxa_video_decode_ip_t)
419
42.4k
                            && ps_ip->s_ivd_video_decode_ip_t.u4_size
420
42.4k
                                            != sizeof(ivd_video_decode_ip_t))
421
0
            {
422
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
423
0
                                << IVD_UNSUPPORTEDPARAM;
424
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |=
425
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
426
0
                return (IV_FAIL);
427
0
            }
428
429
42.4k
            if(ps_op->s_ivd_video_decode_op_t.u4_size
430
42.4k
                            != sizeof(ihevcd_cxa_video_decode_op_t)
431
42.4k
                            && ps_op->s_ivd_video_decode_op_t.u4_size
432
42.4k
                                            != sizeof(ivd_video_decode_op_t))
433
0
            {
434
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
435
0
                                << IVD_UNSUPPORTEDPARAM;
436
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |=
437
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
438
0
                return (IV_FAIL);
439
0
            }
440
441
42.4k
            if(((codec_t *)(ps_handle->pv_codec_handle))->u1_enable_cu_info
442
42.4k
                            && !ps_ip->pu1_8x8_blk_qp_map && !ps_ip->pu1_8x8_blk_type_map)
443
0
            {
444
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
445
0
                                << IVD_UNSUPPORTEDPARAM;
446
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |=
447
0
                                IHEVCD_FRAME_INFO_OP_BUF_NULL;
448
0
                return (IV_FAIL);
449
0
            }
450
451
42.4k
        }
452
42.4k
            break;
453
454
42.4k
        case IVD_CMD_DELETE:
455
552
        {
456
552
            ihevcd_cxa_delete_ip_t *ps_ip =
457
552
                            (ihevcd_cxa_delete_ip_t *)pv_api_ip;
458
552
            ihevcd_cxa_delete_op_t *ps_op =
459
552
                            (ihevcd_cxa_delete_op_t *)pv_api_op;
460
461
552
            ps_op->s_ivd_delete_op_t.u4_error_code = 0;
462
463
552
            if(ps_ip->s_ivd_delete_ip_t.u4_size
464
552
                            != sizeof(ihevcd_cxa_delete_ip_t))
465
0
            {
466
0
                ps_op->s_ivd_delete_op_t.u4_error_code |= 1
467
0
                                << IVD_UNSUPPORTEDPARAM;
468
0
                ps_op->s_ivd_delete_op_t.u4_error_code |=
469
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
470
0
                return (IV_FAIL);
471
0
            }
472
473
552
            if(ps_op->s_ivd_delete_op_t.u4_size
474
552
                            != sizeof(ihevcd_cxa_delete_op_t))
475
0
            {
476
0
                ps_op->s_ivd_delete_op_t.u4_error_code |= 1
477
0
                                << IVD_UNSUPPORTEDPARAM;
478
0
                ps_op->s_ivd_delete_op_t.u4_error_code |=
479
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
480
0
                return (IV_FAIL);
481
0
            }
482
483
552
        }
484
552
            break;
485
486
3.85k
        case IVD_CMD_VIDEO_CTL:
487
3.85k
        {
488
3.85k
            UWORD32 *pu4_ptr_cmd;
489
3.85k
            UWORD32 sub_command;
490
491
3.85k
            pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
492
3.85k
            pu4_ptr_cmd += 2;
493
3.85k
            sub_command = *pu4_ptr_cmd;
494
495
3.85k
            switch(sub_command)
496
3.85k
            {
497
1.10k
                case IVD_CMD_CTL_SETPARAMS:
498
1.10k
                {
499
1.10k
                    ihevcd_cxa_ctl_set_config_ip_t *ps_ip;
500
1.10k
                    ihevcd_cxa_ctl_set_config_op_t *ps_op;
501
1.10k
                    ps_ip = (ihevcd_cxa_ctl_set_config_ip_t *)pv_api_ip;
502
1.10k
                    ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
503
504
1.10k
                    if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
505
1.10k
                                    != sizeof(ihevcd_cxa_ctl_set_config_ip_t) &&
506
1.10k
                                    ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
507
0
                                                != sizeof(ivd_ctl_set_config_ip_t))
508
0
                    {
509
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
510
0
                                        << IVD_UNSUPPORTEDPARAM;
511
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
512
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
513
0
                        return IV_FAIL;
514
0
                    }
515
1.10k
                }
516
                    //no break; is needed here
517
1.10k
                case IVD_CMD_CTL_SETDEFAULT:
518
1.10k
                {
519
1.10k
                    ihevcd_cxa_ctl_set_config_op_t *ps_op;
520
1.10k
                    ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
521
1.10k
                    if(ps_op->s_ivd_ctl_set_config_op_t.u4_size
522
1.10k
                                    != sizeof(ihevcd_cxa_ctl_set_config_op_t))
523
0
                    {
524
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
525
0
                                        << IVD_UNSUPPORTEDPARAM;
526
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
527
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
528
0
                        return IV_FAIL;
529
0
                    }
530
1.10k
                }
531
1.10k
                    break;
532
533
1.10k
                case IVD_CMD_CTL_GETPARAMS:
534
0
                {
535
0
                    ihevcd_cxa_ctl_getstatus_ip_t *ps_ip;
536
0
                    ihevcd_cxa_ctl_getstatus_op_t *ps_op;
537
538
0
                    ps_ip = (ihevcd_cxa_ctl_getstatus_ip_t *)pv_api_ip;
539
0
                    ps_op = (ihevcd_cxa_ctl_getstatus_op_t *)pv_api_op;
540
0
                    if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size
541
0
                                    != sizeof(ihevcd_cxa_ctl_getstatus_ip_t))
542
0
                    {
543
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
544
0
                                        << IVD_UNSUPPORTEDPARAM;
545
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
546
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
547
0
                        return IV_FAIL;
548
0
                    }
549
0
                    if((ps_op->s_ivd_ctl_getstatus_op_t.u4_size
550
0
                                    != sizeof(ihevcd_cxa_ctl_getstatus_op_t)) &&
551
0
                       (ps_op->s_ivd_ctl_getstatus_op_t.u4_size
552
0
                                    != sizeof(ivd_ctl_getstatus_op_t)))
553
0
                    {
554
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
555
0
                                        << IVD_UNSUPPORTEDPARAM;
556
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
557
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
558
0
                        return IV_FAIL;
559
0
                    }
560
0
                }
561
0
                    break;
562
563
0
                case IVD_CMD_CTL_GETBUFINFO:
564
0
                {
565
0
                    ihevcd_cxa_ctl_getbufinfo_ip_t *ps_ip;
566
0
                    ihevcd_cxa_ctl_getbufinfo_op_t *ps_op;
567
0
                    ps_ip = (ihevcd_cxa_ctl_getbufinfo_ip_t *)pv_api_ip;
568
0
                    ps_op = (ihevcd_cxa_ctl_getbufinfo_op_t *)pv_api_op;
569
570
0
                    if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size
571
0
                                    != sizeof(ihevcd_cxa_ctl_getbufinfo_ip_t))
572
0
                    {
573
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
574
0
                                        << IVD_UNSUPPORTEDPARAM;
575
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
576
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
577
0
                        return IV_FAIL;
578
0
                    }
579
0
                    if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size
580
0
                                    != sizeof(ihevcd_cxa_ctl_getbufinfo_op_t))
581
0
                    {
582
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
583
0
                                        << IVD_UNSUPPORTEDPARAM;
584
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
585
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
586
0
                        return IV_FAIL;
587
0
                    }
588
0
                }
589
0
                    break;
590
591
0
                case IVD_CMD_CTL_GETVERSION:
592
0
                {
593
0
                    ihevcd_cxa_ctl_getversioninfo_ip_t *ps_ip;
594
0
                    ihevcd_cxa_ctl_getversioninfo_op_t *ps_op;
595
0
                    ps_ip = (ihevcd_cxa_ctl_getversioninfo_ip_t *)pv_api_ip;
596
0
                    ps_op = (ihevcd_cxa_ctl_getversioninfo_op_t *)pv_api_op;
597
0
                    if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size
598
0
                                    != sizeof(ihevcd_cxa_ctl_getversioninfo_ip_t))
599
0
                    {
600
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
601
0
                                        << IVD_UNSUPPORTEDPARAM;
602
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
603
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
604
0
                        return IV_FAIL;
605
0
                    }
606
0
                    if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size
607
0
                                    != sizeof(ihevcd_cxa_ctl_getversioninfo_op_t))
608
0
                    {
609
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
610
0
                                        << IVD_UNSUPPORTEDPARAM;
611
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
612
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
613
0
                        return IV_FAIL;
614
0
                    }
615
0
                }
616
0
                    break;
617
618
0
                case IVD_CMD_CTL_FLUSH:
619
0
                {
620
0
                    ihevcd_cxa_ctl_flush_ip_t *ps_ip;
621
0
                    ihevcd_cxa_ctl_flush_op_t *ps_op;
622
0
                    ps_ip = (ihevcd_cxa_ctl_flush_ip_t *)pv_api_ip;
623
0
                    ps_op = (ihevcd_cxa_ctl_flush_op_t *)pv_api_op;
624
0
                    if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size
625
0
                                    != sizeof(ihevcd_cxa_ctl_flush_ip_t))
626
0
                    {
627
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
628
0
                                        << IVD_UNSUPPORTEDPARAM;
629
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
630
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
631
0
                        return IV_FAIL;
632
0
                    }
633
0
                    if(ps_op->s_ivd_ctl_flush_op_t.u4_size
634
0
                                    != sizeof(ihevcd_cxa_ctl_flush_op_t))
635
0
                    {
636
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
637
0
                                        << IVD_UNSUPPORTEDPARAM;
638
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
639
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
640
0
                        return IV_FAIL;
641
0
                    }
642
0
                }
643
0
                    break;
644
645
1.64k
                case IVD_CMD_CTL_RESET:
646
1.64k
                {
647
1.64k
                    ihevcd_cxa_ctl_reset_ip_t *ps_ip;
648
1.64k
                    ihevcd_cxa_ctl_reset_op_t *ps_op;
649
1.64k
                    ps_ip = (ihevcd_cxa_ctl_reset_ip_t *)pv_api_ip;
650
1.64k
                    ps_op = (ihevcd_cxa_ctl_reset_op_t *)pv_api_op;
651
1.64k
                    if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size
652
1.64k
                                    != sizeof(ihevcd_cxa_ctl_reset_ip_t))
653
0
                    {
654
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
655
0
                                        << IVD_UNSUPPORTEDPARAM;
656
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
657
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
658
0
                        return IV_FAIL;
659
0
                    }
660
1.64k
                    if(ps_op->s_ivd_ctl_reset_op_t.u4_size
661
1.64k
                                    != sizeof(ihevcd_cxa_ctl_reset_op_t))
662
0
                    {
663
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
664
0
                                        << IVD_UNSUPPORTEDPARAM;
665
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
666
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
667
0
                        return IV_FAIL;
668
0
                    }
669
1.64k
                }
670
1.64k
                    break;
671
1.64k
                case IHEVCD_CXA_CMD_CTL_DEGRADE:
672
0
                {
673
0
                    ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
674
0
                    ihevcd_cxa_ctl_degrade_op_t *ps_op;
675
676
0
                    ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
677
0
                    ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
678
679
0
                    if(ps_ip->u4_size
680
0
                                    != sizeof(ihevcd_cxa_ctl_degrade_ip_t))
681
0
                    {
682
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
683
0
                        ps_op->u4_error_code |=
684
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
685
0
                        return IV_FAIL;
686
0
                    }
687
688
0
                    if(ps_op->u4_size
689
0
                                    != sizeof(ihevcd_cxa_ctl_degrade_op_t))
690
0
                    {
691
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
692
0
                        ps_op->u4_error_code |=
693
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
694
0
                        return IV_FAIL;
695
0
                    }
696
697
0
                    if((ps_ip->i4_degrade_pics < 0) ||
698
0
                       (ps_ip->i4_degrade_pics > 4) ||
699
0
                       (ps_ip->i4_nondegrade_interval < 0) ||
700
0
                       (ps_ip->i4_degrade_type < 0) ||
701
0
                       (ps_ip->i4_degrade_type > 15))
702
0
                    {
703
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
704
0
                        return IV_FAIL;
705
0
                    }
706
707
0
                    break;
708
0
                }
709
710
0
                case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
711
0
                {
712
0
                    ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
713
0
                    ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
714
715
0
                    ps_ip =
716
0
                                    (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
717
0
                    ps_op =
718
0
                                    (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
719
720
0
                    if(ps_ip->u4_size
721
0
                                    != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_ip_t))
722
0
                    {
723
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
724
0
                        ps_op->u4_error_code |=
725
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
726
0
                        return IV_FAIL;
727
0
                    }
728
729
0
                    if(ps_op->u4_size
730
0
                                    != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_op_t))
731
0
                    {
732
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
733
0
                        ps_op->u4_error_code |=
734
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
735
0
                        return IV_FAIL;
736
0
                    }
737
738
0
                    break;
739
0
                }
740
741
0
                case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
742
0
                {
743
0
                    ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
744
0
                    ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
745
746
0
                    ps_ip =
747
0
                                    (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
748
0
                    ps_op =
749
0
                                    (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
750
751
0
                    if(ps_ip->u4_size
752
0
                                    != sizeof(ihevcd_cxa_ctl_get_vui_params_ip_t))
753
0
                    {
754
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
755
0
                        ps_op->u4_error_code |=
756
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
757
0
                        return IV_FAIL;
758
0
                    }
759
760
0
                    if(ps_op->u4_size
761
0
                                    != sizeof(ihevcd_cxa_ctl_get_vui_params_op_t))
762
0
                    {
763
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
764
0
                        ps_op->u4_error_code |=
765
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
766
0
                        return IV_FAIL;
767
0
                    }
768
769
0
                    break;
770
0
                }
771
0
#ifndef DISABLE_SEI
772
0
                case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
773
0
                {
774
0
                    ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
775
0
                    ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
776
777
0
                    ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
778
0
                    ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
779
780
0
                    if(ps_ip->u4_size
781
0
                                    != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_ip_t))
782
0
                    {
783
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
784
0
                        ps_op->u4_error_code |=
785
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
786
0
                        return IV_FAIL;
787
0
                    }
788
789
0
                    if(ps_op->u4_size
790
0
                                    != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_op_t))
791
0
                    {
792
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
793
0
                        ps_op->u4_error_code |=
794
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
795
0
                        return IV_FAIL;
796
0
                    }
797
798
0
                    break;
799
0
                }
800
0
#endif
801
552
                case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
802
552
                {
803
552
                    ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
804
552
                    ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
805
806
552
                    ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
807
552
                    ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
808
809
552
                    if(ps_ip->u4_size
810
552
                                    != sizeof(ihevcd_cxa_ctl_set_num_cores_ip_t))
811
0
                    {
812
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
813
0
                        ps_op->u4_error_code |=
814
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
815
0
                        return IV_FAIL;
816
0
                    }
817
818
552
                    if(ps_op->u4_size
819
552
                                    != sizeof(ihevcd_cxa_ctl_set_num_cores_op_t))
820
0
                    {
821
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
822
0
                        ps_op->u4_error_code |=
823
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
824
0
                        return IV_FAIL;
825
0
                    }
826
827
552
                    if((ps_ip->u4_num_cores < 1) || (ps_ip->u4_num_cores > MAX_NUM_CORES))
828
0
                    {
829
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
830
0
                        return IV_FAIL;
831
0
                    }
832
552
                    break;
833
552
                }
834
552
                case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
835
552
                {
836
552
                    ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
837
552
                    ihevcd_cxa_ctl_set_processor_op_t *ps_op;
838
839
552
                    ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
840
552
                    ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
841
842
552
                    if(ps_ip->u4_size
843
552
                                    != sizeof(ihevcd_cxa_ctl_set_processor_ip_t))
844
0
                    {
845
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
846
0
                        ps_op->u4_error_code |=
847
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
848
0
                        return IV_FAIL;
849
0
                    }
850
851
552
                    if(ps_op->u4_size
852
552
                                    != sizeof(ihevcd_cxa_ctl_set_processor_op_t))
853
0
                    {
854
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
855
0
                        ps_op->u4_error_code |=
856
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
857
0
                        return IV_FAIL;
858
0
                    }
859
860
552
                    break;
861
552
                }
862
552
                default:
863
0
                    *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
864
0
                    *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
865
0
                    return IV_FAIL;
866
3.85k
            }
867
3.85k
        }
868
3.85k
            break;
869
3.85k
        default:
870
0
            *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
871
0
            *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
872
0
            return IV_FAIL;
873
47.4k
    }
874
875
47.4k
    return IV_SUCCESS;
876
47.4k
}
877
878
879
/**
880
*******************************************************************************
881
*
882
* @brief
883
*  Sets default dynamic parameters
884
*
885
* @par Description:
886
*  Sets default dynamic parameters. Will be called in ihevcd_init() to ensure
887
* that even if set_params is not called, codec  continues to work
888
*
889
* @param[in] ps_codec_obj
890
*  Pointer to codec object at API level
891
*
892
* @param[in] pv_api_ip
893
*  Pointer to input argument structure
894
*
895
* @param[out] pv_api_op
896
*  Pointer to output argument structure
897
*
898
* @returns  Status
899
*
900
* @remarks
901
*
902
*
903
*******************************************************************************
904
*/
905
WORD32 ihevcd_set_default_params(codec_t *ps_codec)
906
2.24k
{
907
908
2.24k
    WORD32 ret = IV_SUCCESS;
909
910
2.24k
    ps_codec->e_pic_skip_mode = IVD_SKIP_NONE;
911
2.24k
    ps_codec->i4_strd = 0;
912
2.24k
    ps_codec->i4_disp_strd = 0;
913
2.24k
    ps_codec->i4_header_mode = 0;
914
2.24k
    ps_codec->e_pic_out_order = IVD_DISPLAY_FRAME_OUT;
915
2.24k
    return ret;
916
2.24k
}
917
918
void ihevcd_update_function_ptr(codec_t *ps_codec)
919
2.80k
{
920
921
    /* Init inter pred function array */
922
2.80k
    ps_codec->apf_inter_pred[0] = NULL;
923
2.80k
    ps_codec->apf_inter_pred[1] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_fptr;
924
2.80k
    ps_codec->apf_inter_pred[2] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_fptr;
925
2.80k
    ps_codec->apf_inter_pred[3] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_fptr;
926
2.80k
    ps_codec->apf_inter_pred[4] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
927
2.80k
    ps_codec->apf_inter_pred[5] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_w16out_fptr;
928
2.80k
    ps_codec->apf_inter_pred[6] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16out_fptr;
929
2.80k
    ps_codec->apf_inter_pred[7] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
930
2.80k
    ps_codec->apf_inter_pred[8] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
931
2.80k
    ps_codec->apf_inter_pred[9] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_fptr;
932
2.80k
    ps_codec->apf_inter_pred[10] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_w16out_fptr;
933
2.80k
    ps_codec->apf_inter_pred[11] = NULL;
934
2.80k
    ps_codec->apf_inter_pred[12] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_fptr;
935
2.80k
    ps_codec->apf_inter_pred[13] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_fptr;
936
2.80k
    ps_codec->apf_inter_pred[14] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_fptr;
937
2.80k
    ps_codec->apf_inter_pred[15] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
938
2.80k
    ps_codec->apf_inter_pred[16] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_w16out_fptr;
939
2.80k
    ps_codec->apf_inter_pred[17] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16out_fptr;
940
2.80k
    ps_codec->apf_inter_pred[18] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
941
2.80k
    ps_codec->apf_inter_pred[19] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
942
2.80k
    ps_codec->apf_inter_pred[20] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_fptr;
943
2.80k
    ps_codec->apf_inter_pred[21] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_w16out_fptr;
944
945
    /* Init intra pred function array */
946
2.80k
    ps_codec->apf_intra_pred_luma[0] = (pf_intra_pred)NULL;
947
2.80k
    ps_codec->apf_intra_pred_luma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_planar_fptr;
948
2.80k
    ps_codec->apf_intra_pred_luma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_dc_fptr;
949
2.80k
    ps_codec->apf_intra_pred_luma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode2_fptr;
950
2.80k
    ps_codec->apf_intra_pred_luma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_3_to_9_fptr;
951
2.80k
    ps_codec->apf_intra_pred_luma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_horz_fptr;
952
2.80k
    ps_codec->apf_intra_pred_luma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_11_to_17_fptr;
953
2.80k
    ps_codec->apf_intra_pred_luma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_18_34_fptr;
954
2.80k
    ps_codec->apf_intra_pred_luma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_19_to_25_fptr;
955
2.80k
    ps_codec->apf_intra_pred_luma[9] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_ver_fptr;
956
2.80k
    ps_codec->apf_intra_pred_luma[10] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_27_to_33_fptr;
957
958
2.80k
    ps_codec->apf_intra_pred_chroma[0] = (pf_intra_pred)NULL;
959
2.80k
    ps_codec->apf_intra_pred_chroma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_planar_fptr;
960
2.80k
    ps_codec->apf_intra_pred_chroma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_dc_fptr;
961
2.80k
    ps_codec->apf_intra_pred_chroma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode2_fptr;
962
2.80k
    ps_codec->apf_intra_pred_chroma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_3_to_9_fptr;
963
2.80k
    ps_codec->apf_intra_pred_chroma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_horz_fptr;
964
2.80k
    ps_codec->apf_intra_pred_chroma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_11_to_17_fptr;
965
2.80k
    ps_codec->apf_intra_pred_chroma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_18_34_fptr;
966
2.80k
    ps_codec->apf_intra_pred_chroma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_19_to_25_fptr;
967
2.80k
    ps_codec->apf_intra_pred_chroma[9] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_ver_fptr;
968
2.80k
    ps_codec->apf_intra_pred_chroma[10] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_27_to_33_fptr;
969
970
    /* Init itrans_recon function array */
971
2.80k
    ps_codec->apf_itrans_recon[0] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_ttype1_fptr;
972
2.80k
    ps_codec->apf_itrans_recon[1] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_fptr;
973
2.80k
    ps_codec->apf_itrans_recon[2] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_8x8_fptr;
974
2.80k
    ps_codec->apf_itrans_recon[3] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_16x16_fptr;
975
2.80k
    ps_codec->apf_itrans_recon[4] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_32x32_fptr;
976
2.80k
    ps_codec->apf_itrans_recon[5] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_4x4_fptr;
977
2.80k
    ps_codec->apf_itrans_recon[6] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_8x8_fptr;
978
2.80k
    ps_codec->apf_itrans_recon[7] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_16x16_fptr;
979
980
    /* Init recon function array */
981
2.80k
    ps_codec->apf_recon[0] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_ttype1_fptr;
982
2.80k
    ps_codec->apf_recon[1] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_fptr;
983
2.80k
    ps_codec->apf_recon[2] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_8x8_fptr;
984
2.80k
    ps_codec->apf_recon[3] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_16x16_fptr;
985
2.80k
    ps_codec->apf_recon[4] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_32x32_fptr;
986
2.80k
    ps_codec->apf_recon[5] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_4x4_fptr;
987
2.80k
    ps_codec->apf_recon[6] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_8x8_fptr;
988
2.80k
    ps_codec->apf_recon[7] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_16x16_fptr;
989
990
    /* Init itrans_recon_dc function array */
991
2.80k
    ps_codec->apf_itrans_recon_dc[0] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_luma_fptr;
992
2.80k
    ps_codec->apf_itrans_recon_dc[1] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_chroma_fptr;
993
994
    /* Init sao function array */
995
2.80k
    ps_codec->apf_sao_luma[0] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_fptr;
996
2.80k
    ps_codec->apf_sao_luma[1] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_fptr;
997
2.80k
    ps_codec->apf_sao_luma[2] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_fptr;
998
2.80k
    ps_codec->apf_sao_luma[3] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_fptr;
999
1000
2.80k
    ps_codec->apf_sao_chroma[0] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_chroma_fptr;
1001
2.80k
    ps_codec->apf_sao_chroma[1] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_chroma_fptr;
1002
2.80k
    ps_codec->apf_sao_chroma[2] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_chroma_fptr;
1003
2.80k
    ps_codec->apf_sao_chroma[3] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_chroma_fptr;
1004
2.80k
}
1005
/**
1006
*******************************************************************************
1007
*
1008
* @brief
1009
*  Initialize the context. This will be called by  create and during
1010
* reset
1011
*
1012
* @par Description:
1013
*  Initializes the context
1014
*
1015
* @param[in] ps_codec
1016
*  Codec context pointer
1017
*
1018
* @returns  Status
1019
*
1020
* @remarks
1021
*
1022
*
1023
*******************************************************************************
1024
*/
1025
WORD32 ihevcd_init(codec_t *ps_codec)
1026
2.24k
{
1027
2.24k
    WORD32 status = IV_SUCCESS;
1028
2.24k
    WORD32 i;
1029
1030
    /* Free any dynamic buffers that are allocated */
1031
2.24k
    ihevcd_free_dynamic_bufs(ps_codec);
1032
1033
2.24k
    ps_codec->u4_allocate_dynamic_done = 0;
1034
2.24k
    ps_codec->i4_num_disp_bufs = 1;
1035
2.24k
    ps_codec->i4_flush_mode = 0;
1036
1037
2.24k
    ps_codec->i4_ht = ps_codec->i4_disp_ht = 0;
1038
2.24k
    ps_codec->i4_wd = ps_codec->i4_disp_wd = 0;
1039
2.24k
    ps_codec->i4_strd = 0;
1040
2.24k
    ps_codec->i4_disp_strd = 0;
1041
2.24k
    ps_codec->i4_num_cores = 1;
1042
1043
2.24k
    ps_codec->u4_pic_cnt = 0;
1044
2.24k
    ps_codec->u4_disp_cnt = 0;
1045
1046
2.24k
    ps_codec->i4_header_mode = 0;
1047
2.24k
    ps_codec->i4_header_in_slice_mode = 0;
1048
2.24k
    ps_codec->i4_sps_done = 0;
1049
2.24k
    ps_codec->i4_pps_done = 0;
1050
2.24k
    ps_codec->i4_init_done   = 1;
1051
2.24k
    ps_codec->i4_first_pic_done = 0;
1052
2.24k
    ps_codec->s_parse.i4_first_pic_init = 0;
1053
2.24k
    ps_codec->i4_error_code = 0;
1054
2.24k
    ps_codec->i4_reset_flag = 0;
1055
2.24k
    ps_codec->i4_cra_as_first_pic = 1;
1056
2.24k
    ps_codec->i4_rasl_output_flag = 0;
1057
1058
2.24k
    ps_codec->i4_prev_poc_msb = 0;
1059
2.24k
    ps_codec->i4_prev_poc_lsb = -1;
1060
2.24k
    ps_codec->i4_max_prev_poc_lsb = -1;
1061
2.24k
    ps_codec->s_parse.i4_abs_pic_order_cnt = -1;
1062
1063
    /* Set ref chroma format by default to 420SP UV interleaved */
1064
2.24k
    ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_UV;
1065
1066
    /* If the codec is in shared mode and required format is 420 SP VU interleaved then change
1067
     * reference buffers chroma format
1068
     */
1069
2.24k
    if(IV_YUV_420SP_VU == ps_codec->e_chroma_fmt)
1070
346
    {
1071
346
        ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_VU;
1072
346
    }
1073
1074
1075
1076
2.24k
    ps_codec->i4_disable_deblk_pic = 0;
1077
1078
2.24k
    ps_codec->i4_degrade_pic_cnt    = 0;
1079
2.24k
    ps_codec->i4_degrade_pics       = 0;
1080
2.24k
    ps_codec->i4_degrade_type       = 0;
1081
2.24k
    ps_codec->i4_disable_sao_pic    = 0;
1082
2.24k
    ps_codec->i4_fullpel_inter_pred = 0;
1083
2.24k
    ps_codec->u4_enable_fmt_conv_ahead = 0;
1084
2.24k
    ps_codec->i4_share_disp_buf_cnt = 0;
1085
1086
2.24k
    {
1087
2.24k
        sps_t *ps_sps = ps_codec->ps_sps_base;
1088
2.24k
        pps_t *ps_pps = ps_codec->ps_pps_base;
1089
1090
40.4k
        for(i = 0; i < MAX_SPS_CNT; i++)
1091
38.2k
        {
1092
38.2k
            ps_sps->i1_sps_valid = 0;
1093
38.2k
            ps_sps++;
1094
38.2k
        }
1095
1096
148k
        for(i = 0; i < MAX_PPS_CNT; i++)
1097
146k
        {
1098
146k
            ps_pps->i1_pps_valid = 0;
1099
146k
            ps_pps++;
1100
146k
        }
1101
2.24k
    }
1102
1103
2.24k
    ihevcd_set_default_params(ps_codec);
1104
    /* Initialize MV Bank buffer manager */
1105
2.24k
    ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_mv_buf_mgr);
1106
1107
    /* Initialize Picture buffer manager */
1108
2.24k
    ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_pic_buf_mgr);
1109
1110
2.24k
    ps_codec->ps_pic_buf = (pic_buf_t *)ps_codec->pv_pic_buf_base;
1111
1112
2.24k
    memset(ps_codec->ps_pic_buf, 0, BUF_MGR_MAX_CNT  * sizeof(pic_buf_t));
1113
1114
1115
1116
    /* Initialize display buffer manager */
1117
2.24k
    ihevc_disp_mgr_init((disp_mgr_t *)ps_codec->pv_disp_buf_mgr);
1118
1119
    /* Initialize dpb manager */
1120
2.24k
    ihevc_dpb_mgr_init((dpb_mgr_t *)ps_codec->pv_dpb_mgr);
1121
1122
2.24k
    ps_codec->e_processor_soc = SOC_GENERIC;
1123
    /* The following can be over-ridden using soc parameter as a hack */
1124
2.24k
    ps_codec->u4_nctb = 0x7FFFFFFF;
1125
2.24k
    ihevcd_init_arch(ps_codec);
1126
1127
2.24k
    ihevcd_init_function_ptr(ps_codec);
1128
1129
2.24k
    ihevcd_update_function_ptr(ps_codec);
1130
1131
2.24k
    return status;
1132
2.24k
}
1133
1134
/**
1135
*******************************************************************************
1136
*
1137
* @brief
1138
*  Allocate static memory for the codec
1139
*
1140
* @par Description:
1141
*  Allocates static memory for the codec
1142
*
1143
* @param[in] pv_api_ip
1144
*  Pointer to input argument structure
1145
*
1146
* @param[out] pv_api_op
1147
*  Pointer to output argument structure
1148
*
1149
* @returns  Status
1150
*
1151
* @remarks
1152
*
1153
*
1154
*******************************************************************************
1155
*/
1156
WORD32 ihevcd_allocate_static_bufs(iv_obj_t **pps_codec_obj,
1157
                                   ihevcd_cxa_create_ip_t *ps_create_ip,
1158
                                   ihevcd_cxa_create_op_t *ps_create_op)
1159
552
{
1160
552
    WORD32 size;
1161
552
    void *pv_buf;
1162
552
    UWORD8 *pu1_buf;
1163
552
    WORD32 i;
1164
552
    codec_t *ps_codec;
1165
552
    IV_API_CALL_STATUS_T status = IV_SUCCESS;
1166
552
    void *(*pf_aligned_alloc)(void *pv_mem_ctxt, WORD32 alignment, WORD32 size);
1167
552
    void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1168
552
    void *pv_mem_ctxt;
1169
1170
    /* Request memory for HEVCD object */
1171
552
    ps_create_op->s_ivd_create_op_t.pv_handle = NULL;
1172
1173
552
    pf_aligned_alloc = ps_create_ip->s_ivd_create_ip_t.pf_aligned_alloc;
1174
552
    pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
1175
552
    pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
1176
1177
1178
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(iv_obj_t));
1179
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1180
552
    memset(pv_buf, 0, sizeof(iv_obj_t));
1181
552
    *pps_codec_obj = (iv_obj_t *)pv_buf;
1182
552
    ps_create_op->s_ivd_create_op_t.pv_handle = *pps_codec_obj;
1183
1184
1185
552
    (*pps_codec_obj)->pv_codec_handle = NULL;
1186
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(codec_t));
1187
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1188
552
    (*pps_codec_obj)->pv_codec_handle = (codec_t *)pv_buf;
1189
552
    ps_codec = (codec_t *)pv_buf;
1190
1191
552
    memset(ps_codec, 0, sizeof(codec_t));
1192
1193
552
#ifndef LOGO_EN
1194
552
    ps_codec->i4_share_disp_buf = ps_create_ip->s_ivd_create_ip_t.u4_share_disp_buf;
1195
#else
1196
    ps_codec->i4_share_disp_buf = 0;
1197
#endif
1198
1199
    /* Shared display mode is supported only for 420SP and 420P formats */
1200
552
    if((ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P) &&
1201
552
       (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_UV) &&
1202
552
       (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_VU))
1203
111
    {
1204
111
        ps_codec->i4_share_disp_buf = 0;
1205
111
    }
1206
1207
552
    if (ps_create_ip->s_ivd_create_ip_t.u4_size == sizeof(ihevcd_cxa_create_ip_t))
1208
552
    {
1209
552
        ps_codec->u1_enable_cu_info = ps_create_ip->u4_enable_frame_info;
1210
552
    }
1211
1212
552
    ps_codec->e_chroma_fmt = ps_create_ip->s_ivd_create_ip_t.e_output_format;
1213
1214
552
    ps_codec->pf_aligned_alloc = pf_aligned_alloc;
1215
552
    ps_codec->pf_aligned_free = pf_aligned_free;
1216
552
    ps_codec->pv_mem_ctxt = pv_mem_ctxt;
1217
552
    ps_codec->i4_threads_active = ps_create_ip->u4_keep_threads_active;
1218
1219
    /* Request memory to hold thread handles for each processing thread */
1220
552
    size = MAX_PROCESS_THREADS * ithread_get_handle_size();
1221
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1222
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1223
552
    memset(pv_buf, 0, size);
1224
1225
4.96k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
1226
4.41k
    {
1227
4.41k
        WORD32 handle_size = ithread_get_handle_size();
1228
4.41k
        ps_codec->apv_process_thread_handle[i] =
1229
4.41k
                        (UWORD8 *)pv_buf + (i * handle_size);
1230
4.41k
    }
1231
1232
552
    if(ps_codec->i4_threads_active)
1233
552
    {
1234
        /* Request memory to hold mutex (start/done) for each processing thread */
1235
552
        size = 2 * MAX_PROCESS_THREADS * ithread_get_mutex_lock_size();
1236
552
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1237
552
        RETURN_IF((NULL == pv_buf), IV_FAIL);
1238
552
        memset(pv_buf, 0, size);
1239
1240
4.96k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1241
4.41k
        {
1242
4.41k
            WORD32 ret;
1243
4.41k
            WORD32 mutex_size = ithread_get_mutex_lock_size();
1244
4.41k
            ps_codec->apv_proc_start_mutex[i] =
1245
4.41k
                            (UWORD8 *)pv_buf + (2 * i * mutex_size);
1246
4.41k
            ps_codec->apv_proc_done_mutex[i] =
1247
4.41k
                            (UWORD8 *)pv_buf + ((2 * i + 1) * mutex_size);
1248
1249
4.41k
            ret = ithread_mutex_init(ps_codec->apv_proc_start_mutex[i]);
1250
4.41k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1251
1252
4.41k
            ret = ithread_mutex_init(ps_codec->apv_proc_done_mutex[i]);
1253
4.41k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1254
4.41k
        }
1255
1256
552
        size = 2 * MAX_PROCESS_THREADS * ithread_get_cond_struct_size();
1257
552
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1258
552
        RETURN_IF((NULL == pv_buf), IV_FAIL);
1259
552
        memset(pv_buf, 0, size);
1260
1261
4.96k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1262
4.41k
        {
1263
4.41k
            WORD32 ret;
1264
4.41k
            WORD32 cond_size = ithread_get_cond_struct_size();
1265
4.41k
            ps_codec->apv_proc_start_condition[i] =
1266
4.41k
                            (UWORD8 *)pv_buf + (2 * i * cond_size);
1267
4.41k
            ps_codec->apv_proc_done_condition[i] =
1268
4.41k
                            (UWORD8 *)pv_buf + ((2 * i + 1) * cond_size);
1269
1270
4.41k
            ret = ithread_cond_init(ps_codec->apv_proc_start_condition[i]);
1271
4.41k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1272
1273
4.41k
            ret = ithread_cond_init(ps_codec->apv_proc_done_condition[i]);
1274
4.41k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1275
4.41k
        }
1276
552
    }
1277
1278
    /* Request memory for static bitstream buffer which holds bitstream after emulation prevention */
1279
552
    size = MIN_BITSBUF_SIZE;
1280
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size + 16); //Alloc extra for parse optimization
1281
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1282
552
    memset(pv_buf, 0, size + 16);
1283
552
    ps_codec->pu1_bitsbuf_static = pv_buf;
1284
552
    ps_codec->u4_bitsbuf_size_static = size;
1285
1286
    /* size for holding display manager context */
1287
552
    size = sizeof(buf_mgr_t);
1288
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1289
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1290
552
    memset(pv_buf, 0, size);
1291
552
    ps_codec->pv_disp_buf_mgr = pv_buf;
1292
1293
    /* size for holding dpb manager context */
1294
552
    size = sizeof(dpb_mgr_t);
1295
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1296
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1297
552
    memset(pv_buf, 0, size);
1298
552
    ps_codec->pv_dpb_mgr = pv_buf;
1299
1300
    /* size for holding buffer manager context */
1301
552
    size = sizeof(buf_mgr_t);
1302
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1303
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1304
552
    memset(pv_buf, 0, size);
1305
552
    ps_codec->pv_pic_buf_mgr = pv_buf;
1306
1307
    /* size for holding mv buffer manager context */
1308
552
    size = sizeof(buf_mgr_t);
1309
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1310
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1311
552
    memset(pv_buf, 0, size);
1312
552
    ps_codec->pv_mv_buf_mgr = pv_buf;
1313
1314
552
    size = MAX_VPS_CNT * sizeof(vps_t);
1315
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1316
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1317
552
    memset(pv_buf, 0, size);
1318
552
    ps_codec->ps_vps_base = pv_buf;
1319
552
    ps_codec->s_parse.ps_vps_base = ps_codec->ps_vps_base;
1320
1321
552
    size = MAX_SPS_CNT * sizeof(sps_t);
1322
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1323
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1324
552
    memset(pv_buf, 0, size);
1325
552
    ps_codec->ps_sps_base = pv_buf;
1326
552
    ps_codec->s_parse.ps_sps_base = ps_codec->ps_sps_base;
1327
1328
552
    size = MAX_PPS_CNT * sizeof(pps_t);
1329
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1330
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1331
552
    memset(pv_buf, 0, size);
1332
552
    ps_codec->ps_pps_base = pv_buf;
1333
552
    ps_codec->s_parse.ps_pps_base = ps_codec->ps_pps_base;
1334
1335
552
    size = MAX_SLICE_HDR_CNT * sizeof(slice_header_t);
1336
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1337
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1338
552
    memset(pv_buf, 0, size);
1339
552
    ps_codec->ps_slice_hdr_base = (slice_header_t *)pv_buf;
1340
552
    ps_codec->s_parse.ps_slice_hdr_base = ps_codec->ps_slice_hdr_base;
1341
1342
1343
552
    SCALING_MAT_SIZE(size)
1344
552
    size = (MAX_SPS_CNT + MAX_PPS_CNT) * size * sizeof(WORD16);
1345
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1346
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1347
552
    memset(pv_buf, 0, size);
1348
552
    ps_codec->pi2_scaling_mat = (WORD16 *)pv_buf;
1349
1350
1351
    /* Size for holding pic_buf_t for each reference picture
1352
     * Since this is only a structure allocation and not actual buffer allocation,
1353
     * it is allocated for BUF_MGR_MAX_CNT entries
1354
     */
1355
552
    size = BUF_MGR_MAX_CNT * sizeof(pic_buf_t);
1356
552
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1357
552
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1358
552
    memset(pv_buf, 0, size);
1359
552
    ps_codec->pv_pic_buf_base = (UWORD8 *)pv_buf;
1360
1361
    /* TO hold scratch buffers needed for each SAO context */
1362
552
    size = 4 * MAX_CTB_SIZE * MAX_CTB_SIZE;
1363
1364
    /* 2 temporary buffers*/
1365
552
    size *= 2;
1366
552
    size *= MAX_PROCESS_THREADS;
1367
1368
552
    pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1369
552
    RETURN_IF((NULL == pu1_buf), IV_FAIL);
1370
552
    memset(pu1_buf, 0, size);
1371
1372
4.96k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
1373
4.41k
    {
1374
4.41k
        ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_luma = (UWORD8 *)pu1_buf;
1375
4.41k
        pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1376
1377
4.41k
        ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_chroma = (UWORD8 *)pu1_buf;
1378
4.41k
        pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1379
4.41k
    }
1380
1381
    /* Allocate intra pred modes buffer */
1382
    /* 8 bits per 4x4 */
1383
    /* 16 bytes each for top and left 64 pixels and 16 bytes for default mode */
1384
552
    size =  3 * 16 * sizeof(UWORD8);
1385
552
    pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1386
552
    RETURN_IF((NULL == pu1_buf), IV_FAIL);
1387
552
    memset(pu1_buf, 0, size);
1388
552
    ps_codec->s_parse.pu1_luma_intra_pred_mode_left = pu1_buf;
1389
552
    ps_codec->s_parse.pu1_luma_intra_pred_mode_top  = pu1_buf + 16;
1390
1391
552
    {
1392
552
        WORD32 inter_pred_tmp_buf_size, ntaps_luma;
1393
552
        WORD32 pic_pu_idx_map_size;
1394
1395
        /* Max inter pred size */
1396
552
        ntaps_luma = 8;
1397
552
        inter_pred_tmp_buf_size = sizeof(WORD16) * (MAX_CTB_SIZE + ntaps_luma) * MAX_CTB_SIZE;
1398
1399
552
        inter_pred_tmp_buf_size = ALIGN64(inter_pred_tmp_buf_size);
1400
1401
        /* To hold pu_index w.r.t. frame level pu_t array for a CTB */
1402
552
        pic_pu_idx_map_size = sizeof(WORD32) * (18 * 18);
1403
552
        pic_pu_idx_map_size = ALIGN64(pic_pu_idx_map_size);
1404
1405
552
        size =  inter_pred_tmp_buf_size * 2;
1406
552
        size += pic_pu_idx_map_size;
1407
552
        size *= MAX_PROCESS_THREADS;
1408
1409
552
        pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1410
552
        RETURN_IF((NULL == pu1_buf), IV_FAIL);
1411
552
        memset(pu1_buf, 0, size);
1412
1413
4.96k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1414
4.41k
        {
1415
4.41k
            ps_codec->as_process[i].pi2_inter_pred_tmp_buf1 = (WORD16 *)pu1_buf;
1416
4.41k
            pu1_buf += inter_pred_tmp_buf_size;
1417
1418
4.41k
            ps_codec->as_process[i].pi2_inter_pred_tmp_buf2 = (WORD16 *)pu1_buf;
1419
4.41k
            pu1_buf += inter_pred_tmp_buf_size;
1420
1421
            /* Inverse transform intermediate and inverse scan output buffers reuse inter pred scratch buffers */
1422
4.41k
            ps_codec->as_process[i].pi2_itrans_intrmd_buf =
1423
4.41k
                            ps_codec->as_process[i].pi2_inter_pred_tmp_buf2;
1424
4.41k
            ps_codec->as_process[i].pi2_invscan_out =
1425
4.41k
                            ps_codec->as_process[i].pi2_inter_pred_tmp_buf1;
1426
1427
4.41k
            ps_codec->as_process[i].pu4_pic_pu_idx_map = (UWORD32 *)pu1_buf;
1428
4.41k
            ps_codec->as_process[i].s_bs_ctxt.pu4_pic_pu_idx_map =
1429
4.41k
                            (UWORD32 *)pu1_buf;
1430
4.41k
            pu1_buf += pic_pu_idx_map_size;
1431
1432
            //   ps_codec->as_process[i].pi2_inter_pred_tmp_buf3 = (WORD16 *)pu1_buf;
1433
            //   pu1_buf += inter_pred_tmp_buf_size;
1434
1435
4.41k
            ps_codec->as_process[i].i4_inter_pred_tmp_buf_strd = MAX_CTB_SIZE;
1436
1437
4.41k
        }
1438
552
    }
1439
    /* Initialize pointers in PPS structures */
1440
0
    {
1441
552
        sps_t *ps_sps = ps_codec->ps_sps_base;
1442
552
        pps_t *ps_pps = ps_codec->ps_pps_base;
1443
552
        WORD16 *pi2_scaling_mat =  ps_codec->pi2_scaling_mat;
1444
552
        WORD32 scaling_mat_size;
1445
1446
552
        SCALING_MAT_SIZE(scaling_mat_size);
1447
1448
9.93k
        for(i = 0; i < MAX_SPS_CNT; i++)
1449
9.38k
        {
1450
9.38k
            ps_sps->pi2_scaling_mat  = pi2_scaling_mat;
1451
9.38k
            pi2_scaling_mat += scaling_mat_size;
1452
9.38k
            ps_sps++;
1453
9.38k
        }
1454
1455
36.4k
        for(i = 0; i < MAX_PPS_CNT; i++)
1456
35.8k
        {
1457
35.8k
            ps_pps->pi2_scaling_mat  = pi2_scaling_mat;
1458
35.8k
            pi2_scaling_mat += scaling_mat_size;
1459
35.8k
            ps_pps++;
1460
35.8k
        }
1461
552
    }
1462
1463
552
    return (status);
1464
552
}
1465
1466
WORD32 ihevcd_join_threads(codec_t *ps_codec)
1467
2.19k
{
1468
2.19k
    if(ps_codec->i4_threads_active)
1469
2.19k
    {
1470
2.19k
        int i;
1471
        /* Wait for threads */
1472
2.19k
        ps_codec->i4_break_threads = 1;
1473
1474
19.7k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1475
17.5k
        {
1476
17.5k
            WORD32 ret;
1477
17.5k
            if(ps_codec->ai4_process_thread_created[i])
1478
470
            {
1479
470
                ret = ithread_mutex_lock(ps_codec->apv_proc_start_mutex[i]);
1480
470
                RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1481
1482
470
                ps_codec->ai4_process_start[i] = 1;
1483
470
                ret = ithread_cond_signal(ps_codec->apv_proc_start_condition[i]);
1484
470
                RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1485
1486
470
                ret = ithread_mutex_unlock(ps_codec->apv_proc_start_mutex[i]);
1487
470
                RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1488
1489
470
                ithread_join(ps_codec->apv_process_thread_handle[i], NULL);
1490
1491
470
                ps_codec->ai4_process_thread_created[i] = 0;
1492
470
            }
1493
17.5k
        }
1494
2.19k
    }
1495
2.19k
    return IV_SUCCESS;
1496
2.19k
}
1497
/**
1498
*******************************************************************************
1499
*
1500
* @brief
1501
*  Free static memory for the codec
1502
*
1503
* @par Description:
1504
*  Free static memory for the codec
1505
*
1506
* @param[in] ps_codec
1507
*  Pointer to codec context
1508
*
1509
* @returns  Status
1510
*
1511
* @remarks
1512
*
1513
*
1514
*******************************************************************************
1515
*/
1516
WORD32 ihevcd_free_static_bufs(iv_obj_t *ps_codec_obj)
1517
552
{
1518
552
    codec_t *ps_codec;
1519
1520
552
    void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1521
552
    void *pv_mem_ctxt;
1522
1523
552
    ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
1524
552
    pf_aligned_free = ps_codec->pf_aligned_free;
1525
552
    pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1526
1527
552
    if(ps_codec->i4_threads_active)
1528
552
    {
1529
        /* Wait for threads */
1530
552
        ihevcd_join_threads(ps_codec);
1531
1532
4.96k
        for(int i = 0; i < MAX_PROCESS_THREADS; i++)
1533
4.41k
        {
1534
4.41k
            WORD32 ret;
1535
4.41k
            ret = ithread_cond_destroy(ps_codec->apv_proc_start_condition[i]);
1536
4.41k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1537
1538
4.41k
            ret = ithread_cond_destroy(ps_codec->apv_proc_done_condition[i]);
1539
4.41k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1540
1541
4.41k
            ret = ithread_mutex_destroy(ps_codec->apv_proc_start_mutex[i]);
1542
4.41k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1543
1544
4.41k
            ret = ithread_mutex_destroy(ps_codec->apv_proc_done_mutex[i]);
1545
4.41k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1546
4.41k
        }
1547
552
        ALIGNED_FREE(ps_codec, ps_codec->apv_proc_start_mutex[0]);
1548
552
        ALIGNED_FREE(ps_codec, ps_codec->apv_proc_start_condition[0]);
1549
552
    }
1550
1551
552
    ALIGNED_FREE(ps_codec, ps_codec->apv_process_thread_handle[0]);
1552
552
    ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_static);
1553
1554
552
    ALIGNED_FREE(ps_codec, ps_codec->pv_disp_buf_mgr);
1555
552
    ALIGNED_FREE(ps_codec, ps_codec->pv_dpb_mgr);
1556
552
    ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_mgr);
1557
552
    ALIGNED_FREE(ps_codec, ps_codec->pv_mv_buf_mgr);
1558
552
    ALIGNED_FREE(ps_codec, ps_codec->ps_vps_base);
1559
552
    ALIGNED_FREE(ps_codec, ps_codec->ps_sps_base);
1560
552
    ALIGNED_FREE(ps_codec, ps_codec->ps_pps_base);
1561
552
    ALIGNED_FREE(ps_codec, ps_codec->ps_slice_hdr_base);
1562
552
    ALIGNED_FREE(ps_codec, ps_codec->pi2_scaling_mat);
1563
552
    ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_base);
1564
552
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu1_luma_intra_pred_mode_left);
1565
552
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_tmp_buf_luma);
1566
552
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pi2_inter_pred_tmp_buf1);
1567
552
    ALIGNED_FREE(ps_codec, ps_codec_obj->pv_codec_handle);
1568
1569
552
    if(ps_codec_obj)
1570
552
    {
1571
552
        pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
1572
552
    }
1573
1574
552
    return IV_SUCCESS;
1575
1576
552
}
1577
1578
1579
/**
1580
*******************************************************************************
1581
*
1582
* @brief
1583
*  Allocate dynamic memory for the codec
1584
*
1585
* @par Description:
1586
*  Allocates dynamic memory for the codec
1587
*
1588
* @param[in] ps_codec
1589
*  Pointer to codec context
1590
*
1591
* @returns  Status
1592
*
1593
* @remarks
1594
*
1595
*
1596
*******************************************************************************
1597
*/
1598
WORD32 ihevcd_allocate_dynamic_bufs(codec_t *ps_codec)
1599
2.20k
{
1600
2.20k
    WORD32 max_tile_cols, max_tile_rows;
1601
2.20k
    WORD32 max_ctb_rows, max_ctb_cols;
1602
2.20k
    WORD32 max_num_cu_cols;
1603
2.20k
    WORD32 max_num_cu_rows;
1604
2.20k
    WORD32 max_num_4x4_cols;
1605
2.20k
    WORD32 max_ctb_cnt;
1606
2.20k
    WORD32 wd;
1607
2.20k
    WORD32 ht;
1608
2.20k
    WORD32 i;
1609
2.20k
    WORD32 max_dpb_size;
1610
2.20k
    void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1611
2.20k
    void *pv_buf;
1612
2.20k
    UWORD8 *pu1_buf;
1613
2.20k
    WORD32 size;
1614
1615
2.20k
    wd = ALIGN64(ps_codec->i4_wd);
1616
2.20k
    ht = ALIGN64(ps_codec->i4_ht);
1617
1618
2.20k
    max_tile_cols = (wd + MIN_TILE_WD - 1) / MIN_TILE_WD;
1619
2.20k
    max_tile_rows = (ht + MIN_TILE_HT - 1) / MIN_TILE_HT;
1620
2.20k
    max_ctb_rows  = ht / MIN_CTB_SIZE;
1621
2.20k
    max_ctb_cols  = wd / MIN_CTB_SIZE;
1622
2.20k
    max_ctb_cnt   = max_ctb_rows * max_ctb_cols;
1623
2.20k
    max_num_cu_cols = wd / MIN_CU_SIZE;
1624
2.20k
    max_num_cu_rows = ht / MIN_CU_SIZE;
1625
2.20k
    max_num_4x4_cols = wd / 4;
1626
1627
    /* Allocate tile structures */
1628
2.20k
    size = max_tile_cols * max_tile_rows;
1629
2.20k
    size *= sizeof(tile_t);
1630
2.20k
    size *= MAX_PPS_CNT;
1631
1632
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1633
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1634
2.20k
    memset(pv_buf, 0, size);
1635
2.20k
    ps_codec->ps_tile = (tile_t *)pv_buf;
1636
1637
1638
    /* Allocate memory to hold entry point offsets */
1639
    /* One entry point per tile */
1640
2.20k
    size = max_tile_cols * max_tile_rows;
1641
1642
    /* One entry point per row of CTBs */
1643
    /*********************************************************************/
1644
    /* Only tiles or entropy sync is enabled at a time in main           */
1645
    /* profile, but since memory required does not increase too much,    */
1646
    /* this allocation is done to handle both cases                      */
1647
    /*********************************************************************/
1648
2.20k
    size  += max_ctb_rows;
1649
2.20k
    size *= sizeof(WORD32);
1650
1651
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1652
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1653
2.20k
    memset(pv_buf, 0, size);
1654
2.20k
    ps_codec->pi4_entry_ofst = (WORD32 *)pv_buf;
1655
1656
    /* Allocate parse skip flag buffer */
1657
    /* 1 bit per 8x8 */
1658
2.20k
    size = max_num_cu_cols / 8;
1659
2.20k
    size = ALIGN4(size);
1660
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1661
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1662
2.20k
    memset(pv_buf, 0, size);
1663
2.20k
    ps_codec->s_parse.pu4_skip_cu_top = (UWORD32 *)pv_buf;
1664
1665
    /* Allocate parse coding tree depth buffer */
1666
    /* 2 bits per 8x8 */
1667
2.20k
    size =  max_num_cu_cols / 4;
1668
2.20k
    size = ALIGN4(size);
1669
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1670
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1671
2.20k
    memset(pv_buf, 0, size);
1672
2.20k
    ps_codec->s_parse.pu4_ct_depth_top = (UWORD32 *)pv_buf;
1673
1674
    /* Allocate intra flag buffer */
1675
    /* 1 bit per 8x8 */
1676
2.20k
    size =  max_num_cu_cols * max_num_cu_rows / 8;
1677
2.20k
    size = ALIGN4(size);
1678
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1679
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1680
2.20k
    memset(pv_buf, 0, size);
1681
2.20k
    ps_codec->pu1_pic_intra_flag = (UWORD8 *)pv_buf;
1682
2.20k
    ps_codec->s_parse.pu1_pic_intra_flag = ps_codec->pu1_pic_intra_flag;
1683
1684
    /* Allocate transquant bypass flag buffer */
1685
    /* 1 bit per 8x8 */
1686
    /* Extra row and column are allocated for easy processing of top and left blocks while loop filtering */
1687
2.20k
    size =  ((max_num_cu_cols + 8) * (max_num_cu_rows + 8)) / 8;
1688
2.20k
    size = ALIGN4(size);
1689
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1690
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1691
2.20k
    memset(pv_buf, 1, size);
1692
2.20k
    {
1693
2.20k
        WORD32 loop_filter_strd = (wd + 63) >> 6;
1694
2.20k
        ps_codec->pu1_pic_no_loop_filter_flag_base = pv_buf;
1695
        /* The offset is added for easy processing of top and left blocks while loop filtering */
1696
2.20k
        ps_codec->pu1_pic_no_loop_filter_flag = (UWORD8 *)pv_buf + loop_filter_strd + 1;
1697
2.20k
        ps_codec->s_parse.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1698
2.20k
        ps_codec->s_parse.s_deblk_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1699
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1700
2.20k
    }
1701
1702
    /* Initialize pointers in PPS structures */
1703
2.20k
    {
1704
2.20k
        pps_t *ps_pps = ps_codec->ps_pps_base;
1705
2.20k
        tile_t *ps_tile =  ps_codec->ps_tile;
1706
1707
145k
        for(i = 0; i < MAX_PPS_CNT; i++)
1708
143k
        {
1709
143k
            ps_pps->ps_tile = ps_tile;
1710
143k
            ps_tile += (max_tile_cols * max_tile_rows);
1711
143k
            ps_pps++;
1712
143k
        }
1713
1714
2.20k
    }
1715
1716
    /* Allocate memory for job queue */
1717
1718
    /* One job per row of CTBs */
1719
2.20k
    size  = max_ctb_rows;
1720
1721
    /* One each tile a row of CTBs, num_jobs has to incremented */
1722
2.20k
    size  *= max_tile_cols;
1723
1724
    /* One format convert/frame copy job per row of CTBs for non-shared mode*/
1725
2.20k
    size  += max_ctb_rows;
1726
1727
2.20k
    size *= sizeof(proc_job_t);
1728
1729
2.20k
    size += ihevcd_jobq_ctxt_size();
1730
2.20k
    size = ALIGN4(size);
1731
1732
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1733
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1734
2.20k
    memset(pv_buf, 0, size);
1735
2.20k
    ps_codec->pv_proc_jobq_buf = pv_buf;
1736
2.20k
    ps_codec->i4_proc_jobq_buf_size = size;
1737
1738
2.20k
    size =  max_ctb_cnt;
1739
2.20k
    size = ALIGN4(size);
1740
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1741
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1742
2.20k
    memset(pv_buf, 0, size);
1743
2.20k
    ps_codec->pu1_parse_map = (UWORD8 *)pv_buf;
1744
1745
2.20k
    size =  max_ctb_cnt;
1746
2.20k
    size = ALIGN4(size);
1747
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1748
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1749
2.20k
    memset(pv_buf, 0, size);
1750
2.20k
    ps_codec->pu1_proc_map = (UWORD8 *)pv_buf;
1751
1752
    /** Holds top and left neighbor's pu idx into picture level pu array */
1753
    /* Only one top row is enough but left has to be replicated for each process context */
1754
2.20k
    size =  (max_num_4x4_cols  /* left */ + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4)/* top */ + 1/* top right */) * sizeof(WORD32);
1755
2.20k
    size = ALIGN4(size);
1756
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1757
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1758
2.20k
    memset(pv_buf, 0, size);
1759
1760
19.8k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
1761
17.6k
    {
1762
17.6k
        UWORD32 *pu4_buf = (UWORD32 *)pv_buf;
1763
17.6k
        ps_codec->as_process[i].pu4_pic_pu_idx_left = pu4_buf + i * (MAX_CTB_SIZE / 4);
1764
17.6k
        memset(ps_codec->as_process[i].pu4_pic_pu_idx_left, 0, sizeof(UWORD32) * MAX_CTB_SIZE / 4);
1765
17.6k
        ps_codec->as_process[i].pu4_pic_pu_idx_top = pu4_buf + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4);
1766
17.6k
    }
1767
2.20k
    memset(ps_codec->as_process[0].pu4_pic_pu_idx_top, 0, sizeof(UWORD32) * (wd / 4 + 1));
1768
1769
2.20k
    {
1770
        /* To hold SAO left buffer for luma */
1771
2.20k
        size  = sizeof(UWORD8) * (MAX(ht, wd));
1772
1773
        /* To hold SAO left buffer for chroma */
1774
2.20k
        size += sizeof(UWORD8) * (MAX(ht, wd));
1775
1776
        /* To hold SAO top buffer for luma */
1777
2.20k
        size += sizeof(UWORD8) * wd;
1778
1779
        /* To hold SAO top buffer for chroma */
1780
2.20k
        size += sizeof(UWORD8) * wd;
1781
1782
        /* To hold SAO top left luma pixel value for last output ctb in a row*/
1783
2.20k
        size += sizeof(UWORD8) * max_ctb_rows;
1784
1785
        /* To hold SAO top left chroma pixel value last output ctb in a row*/
1786
2.20k
        size += sizeof(UWORD8) * max_ctb_rows * 2;
1787
1788
        /* To hold SAO top left pixel luma for current ctb - column array*/
1789
2.20k
        size += sizeof(UWORD8) * max_ctb_rows;
1790
1791
        /* To hold SAO top left pixel chroma for current ctb-column array*/
1792
2.20k
        size += sizeof(UWORD8) * max_ctb_rows * 2;
1793
1794
        /* To hold SAO top right pixel luma pixel value last output ctb in a row*/
1795
2.20k
        size += sizeof(UWORD8) * max_ctb_cols;
1796
1797
        /* To hold SAO top right pixel chroma pixel value last output ctb in a row*/
1798
2.20k
        size += sizeof(UWORD8) * max_ctb_cols * 2;
1799
1800
        /*To hold SAO botton bottom left pixels for luma*/
1801
2.20k
        size += sizeof(UWORD8) * max_ctb_rows;
1802
1803
        /*To hold SAO botton bottom left pixels for luma*/
1804
2.20k
        size += sizeof(UWORD8) * max_ctb_rows * 2;
1805
2.20k
        size = ALIGN64(size);
1806
1807
2.20k
        pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1808
2.20k
        RETURN_IF((NULL == pu1_buf), IV_FAIL);
1809
2.20k
        memset(pu1_buf, 0, size);
1810
1811
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1812
17.6k
        {
1813
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1814
17.6k
        }
1815
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1816
2.20k
        pu1_buf += MAX(ht, wd);
1817
1818
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1819
17.6k
        {
1820
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1821
17.6k
        }
1822
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1823
2.20k
        pu1_buf += MAX(ht, wd);
1824
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1825
17.6k
        {
1826
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1827
17.6k
        }
1828
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1829
2.20k
        pu1_buf += wd;
1830
1831
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1832
17.6k
        {
1833
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1834
17.6k
        }
1835
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1836
2.20k
        pu1_buf += wd;
1837
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1838
17.6k
        {
1839
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1840
17.6k
        }
1841
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1842
2.20k
        pu1_buf += ht / MIN_CTB_SIZE;
1843
1844
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1845
17.6k
        {
1846
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1847
17.6k
        }
1848
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1849
2.20k
        pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1850
1851
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1852
17.6k
        {
1853
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1854
17.6k
        }
1855
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1856
2.20k
        pu1_buf += ht / MIN_CTB_SIZE;
1857
1858
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1859
17.6k
        {
1860
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1861
17.6k
        }
1862
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1863
1864
2.20k
        pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1865
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1866
17.6k
        {
1867
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1868
17.6k
        }
1869
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1870
1871
2.20k
        pu1_buf += wd / MIN_CTB_SIZE;
1872
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1873
17.6k
        {
1874
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1875
17.6k
        }
1876
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1877
1878
2.20k
        pu1_buf += (wd / MIN_CTB_SIZE) * 2;
1879
1880
        /*Per CTB, Store 1 value for luma , 2 values for chroma*/
1881
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1882
17.6k
        {
1883
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1884
17.6k
        }
1885
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1886
1887
2.20k
        pu1_buf += (ht / MIN_CTB_SIZE);
1888
1889
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1890
17.6k
        {
1891
17.6k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1892
17.6k
        }
1893
2.20k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1894
1895
2.20k
        pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1896
2.20k
    }
1897
1898
1899
0
    {
1900
2.20k
        UWORD8 *pu1_buf = (UWORD8 *)pv_buf;
1901
2.20k
        WORD32 vert_bs_size, horz_bs_size;
1902
2.20k
        WORD32 qp_const_flag_size;
1903
2.20k
        WORD32 qp_size;
1904
2.20k
        WORD32 num_8x8;
1905
1906
        /* Max Number of vertical edges */
1907
2.20k
        vert_bs_size = wd / 8 + 2 * MAX_CTB_SIZE / 8;
1908
1909
        /* Max Number of horizontal edges - extra MAX_CTB_SIZE / 8 to handle the last 4 rows separately(shifted CTB processing) */
1910
2.20k
        vert_bs_size *= (ht + MAX_CTB_SIZE) / MIN_TU_SIZE;
1911
1912
        /* Number of bytes */
1913
2.20k
        vert_bs_size /= 8;
1914
1915
        /* Two bits per edge */
1916
2.20k
        vert_bs_size *= 2;
1917
1918
        /* Max Number of horizontal edges */
1919
2.20k
        horz_bs_size = ht / 8 + MAX_CTB_SIZE / 8;
1920
1921
        /* Max Number of vertical edges - extra MAX_CTB_SIZE / 8 to handle the last 4 columns separately(shifted CTB processing) */
1922
2.20k
        horz_bs_size *= (wd + MAX_CTB_SIZE) / MIN_TU_SIZE;
1923
1924
        /* Number of bytes */
1925
2.20k
        horz_bs_size /= 8;
1926
1927
        /* Two bits per edge */
1928
2.20k
        horz_bs_size *= 2;
1929
1930
        /* Max CTBs in a row */
1931
2.20k
        qp_const_flag_size = wd / MIN_CTB_SIZE + 1 /* The last ctb row deblk is done in last ctb + 1 row.*/;
1932
1933
        /* Max CTBs in a column */
1934
2.20k
        qp_const_flag_size *= ht / MIN_CTB_SIZE;
1935
1936
        /* Number of bytes */
1937
2.20k
        qp_const_flag_size /= 8;
1938
1939
        /* QP changes at CU level - So store at 8x8 level */
1940
2.20k
        num_8x8 = (wd * ht) / (MIN_CU_SIZE * MIN_CU_SIZE);
1941
2.20k
        qp_size = num_8x8;
1942
1943
        /* To hold vertical boundary strength */
1944
2.20k
        size += vert_bs_size;
1945
1946
        /* To hold horizontal boundary strength */
1947
2.20k
        size += horz_bs_size;
1948
1949
        /* To hold QP */
1950
2.20k
        size += qp_size;
1951
1952
        /* To hold QP const in CTB flags */
1953
2.20k
        size += qp_const_flag_size;
1954
1955
2.20k
        pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1956
2.20k
        RETURN_IF((NULL == pu1_buf), IV_FAIL);
1957
1958
2.20k
        memset(pu1_buf, 0, size);
1959
1960
19.8k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1961
17.6k
        {
1962
17.6k
            ps_codec->as_process[i].s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1963
17.6k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1964
17.6k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1965
17.6k
            pu1_buf += vert_bs_size;
1966
1967
17.6k
            ps_codec->as_process[i].s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1968
17.6k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1969
17.6k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1970
17.6k
            pu1_buf += horz_bs_size;
1971
1972
17.6k
            ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1973
17.6k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1974
17.6k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1975
17.6k
            pu1_buf += qp_size;
1976
1977
17.6k
            ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1978
17.6k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1979
17.6k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1980
17.6k
            pu1_buf += qp_const_flag_size;
1981
1982
17.6k
            pu1_buf -= (vert_bs_size + horz_bs_size + qp_size + qp_const_flag_size);
1983
17.6k
        }
1984
2.20k
        ps_codec->s_parse.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
1985
2.20k
        pu1_buf += vert_bs_size;
1986
1987
2.20k
        ps_codec->s_parse.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
1988
2.20k
        pu1_buf += horz_bs_size;
1989
1990
2.20k
        ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
1991
2.20k
        pu1_buf += qp_size;
1992
1993
2.20k
        ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
1994
2.20k
        pu1_buf += qp_const_flag_size;
1995
1996
2.20k
    }
1997
1998
    /* Max CTBs in a row */
1999
2.20k
    size  = wd / MIN_CTB_SIZE;
2000
    /* Max CTBs in a column */
2001
2.20k
    size *= (ht / MIN_CTB_SIZE + 2) /* Top row and bottom row extra. This ensures accessing left,top in first row
2002
2.20k
                                              and right in last row will not result in invalid access*/;
2003
2004
2.20k
    size *= sizeof(UWORD16);
2005
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2006
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2007
2.20k
    memset(pv_buf, 0, size);
2008
2009
2.20k
    ps_codec->pu1_tile_idx_base = pv_buf;
2010
19.8k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
2011
17.6k
    {
2012
17.6k
        ps_codec->as_process[i].pu1_tile_idx = (UWORD16 *)pv_buf + wd / MIN_CTB_SIZE /* Offset 1 row */;
2013
17.6k
    }
2014
2015
    /* 4 bytes per color component per CTB */
2016
2.20k
    size = 3 * 4;
2017
2018
    /* MAX number of CTBs in a row */
2019
2.20k
    size *= wd / MIN_CTB_SIZE;
2020
2021
    /* MAX number of CTBs in a column */
2022
2.20k
    size *= ht / MIN_CTB_SIZE;
2023
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2024
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2025
2.20k
    memset(pv_buf, 0, size);
2026
2027
2.20k
    ps_codec->s_parse.ps_pic_sao = (sao_t *)pv_buf;
2028
2.20k
    ps_codec->s_parse.s_sao_ctxt.ps_pic_sao = (sao_t *)pv_buf;
2029
19.8k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
2030
17.6k
    {
2031
17.6k
        ps_codec->as_process[i].s_sao_ctxt.ps_pic_sao = ps_codec->s_parse.ps_pic_sao;
2032
17.6k
    }
2033
2034
    /* Only if width * height * 3 / 2 is greater than MIN_BITSBUF_SIZE,
2035
    then allocate dynamic bistream buffer */
2036
2.20k
    ps_codec->pu1_bitsbuf_dynamic = NULL;
2037
2.20k
    size = wd * ht;
2038
2.20k
    if(size > MIN_BITSBUF_SIZE)
2039
196
    {
2040
196
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size + 16); //Alloc extra for parse optimization
2041
196
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2042
196
        memset(pv_buf, 0, size + 16);
2043
196
        ps_codec->pu1_bitsbuf_dynamic = pv_buf;
2044
196
        ps_codec->u4_bitsbuf_size_dynamic = size;
2045
196
    }
2046
2047
2.20k
    size = ihevcd_get_tu_data_size(wd * ht);
2048
2.20k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2049
2.20k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2050
2.20k
    memset(pv_buf, 0, size);
2051
2.20k
    ps_codec->pv_tu_data = pv_buf;
2052
2053
    /* CU info map to store qp and CU type at 8x8 level */
2054
2.20k
    if(ps_codec->u1_enable_cu_info)
2055
0
    {
2056
0
        size = ((wd * ht) / (MIN_CU_SIZE * MIN_CU_SIZE)) * BUF_MGR_MAX_CNT;
2057
2058
0
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2059
0
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2060
0
        memset(pv_buf, 0, size);
2061
0
        ps_codec->pu1_qp_map_base = pv_buf;
2062
2063
0
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2064
0
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2065
0
        memset(pv_buf, 0, size);
2066
0
        ps_codec->pu1_cu_type_map_base = pv_buf;
2067
0
    }
2068
2069
2.20k
    {
2070
2.20k
        sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2071
2072
2073
        /* Allocate for pu_map, pu_t and pic_pu_idx for each MV bank */
2074
        /* Note: Number of luma samples is not max_wd * max_ht here, instead it is
2075
         * set to maximum number of luma samples allowed at the given level.
2076
         * This is done to ensure that any stream with width and height lesser
2077
         * than max_wd and max_ht is supported. Number of buffers required can be greater
2078
         * for lower width and heights at a given level and this increased number of buffers
2079
         * might require more memory than what max_wd and max_ht buffer would have required
2080
         * Also note one extra buffer is allocted to store current pictures MV bank
2081
         * In case of asynchronous parsing and processing, number of buffers should increase here
2082
         * based on when parsing and processing threads are synchronized
2083
         */
2084
2.20k
        max_dpb_size = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2085
        /* Size for holding mv_buf_t for each MV Bank
2086
         * One extra MV Bank is needed to hold current pics MV bank.
2087
         */
2088
2.20k
        size = (max_dpb_size + 1) * sizeof(mv_buf_t);
2089
2090
2.20k
        size += (max_dpb_size + 1) *
2091
2.20k
                        ihevcd_get_pic_mv_bank_size(wd * ht);
2092
2093
2.20k
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2094
2.20k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2095
2.20k
        memset(pv_buf, 0, size);
2096
2097
2.20k
        ps_codec->pv_mv_bank_buf_base = pv_buf;
2098
2.20k
        ps_codec->i4_total_mv_bank_size = size;
2099
2100
2.20k
    }
2101
2102
    /* In case of non-shared mode allocate for reference picture buffers */
2103
    /* In case of shared and 420p output, allocate for chroma samples */
2104
2.20k
    if(0 == ps_codec->i4_share_disp_buf)
2105
2.20k
    {
2106
        /* Number of buffers is doubled in order to return one frame at a time instead of sending
2107
         * multiple outputs during dpb full case.
2108
         * Also note one extra buffer is allocted to store current picture
2109
         * In case of asynchronous parsing and processing, number of buffers should increase here
2110
         * based on when parsing and processing threads are synchronized
2111
         */
2112
2.20k
        size = ihevcd_get_total_pic_buf_size(ps_codec, wd, ht);
2113
2.20k
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2114
2.20k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2115
2.20k
        memset(pv_buf, 0, size);
2116
2117
2.20k
        ps_codec->i4_total_pic_buf_size = size;
2118
2.20k
        ps_codec->pu1_ref_pic_buf_base = (UWORD8 *)pv_buf;
2119
2.20k
    }
2120
2121
2.20k
    ps_codec->pv_proc_jobq = ihevcd_jobq_init(ps_codec->pv_proc_jobq_buf, ps_codec->i4_proc_jobq_buf_size);
2122
2.20k
    RETURN_IF((ps_codec->pv_proc_jobq == NULL), IV_FAIL);
2123
2124
    /* Update the jobq context to all the threads */
2125
2.20k
    ps_codec->s_parse.pv_proc_jobq = ps_codec->pv_proc_jobq;
2126
19.8k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
2127
17.6k
    {
2128
17.6k
        ps_codec->as_process[i].pv_proc_jobq = ps_codec->pv_proc_jobq;
2129
17.6k
        ps_codec->as_process[i].i4_id = i;
2130
17.6k
        ps_codec->as_process[i].ps_codec = ps_codec;
2131
2132
        /* Set the following to zero assuming it is a single core solution
2133
         * When threads are launched these will be set appropriately
2134
         */
2135
17.6k
        ps_codec->as_process[i].i4_check_parse_status = 0;
2136
17.6k
        ps_codec->as_process[i].i4_check_proc_status = 0;
2137
17.6k
    }
2138
2139
2.20k
    ps_codec->u4_allocate_dynamic_done = 1;
2140
2141
2.20k
    return IV_SUCCESS;
2142
2.20k
}
2143
2144
/**
2145
*******************************************************************************
2146
*
2147
* @brief
2148
*  Free dynamic memory for the codec
2149
*
2150
* @par Description:
2151
*  Free dynamic memory for the codec
2152
*
2153
* @param[in] ps_codec
2154
*  Pointer to codec context
2155
*
2156
* @returns  Status
2157
*
2158
* @remarks
2159
*
2160
*
2161
*******************************************************************************
2162
*/
2163
WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec)
2164
2.80k
{
2165
2166
2.80k
    if(ps_codec->pv_proc_jobq)
2167
2.20k
    {
2168
2.20k
        ihevcd_jobq_deinit(ps_codec->pv_proc_jobq);
2169
2.20k
        ps_codec->pv_proc_jobq = NULL;
2170
2.20k
    }
2171
2172
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->ps_tile);
2173
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pi4_entry_ofst);
2174
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_skip_cu_top);
2175
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_ct_depth_top);
2176
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_intra_flag);
2177
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_no_loop_filter_flag_base);
2178
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pv_proc_jobq_buf);
2179
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_parse_map);
2180
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_proc_map);
2181
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pu4_pic_pu_idx_left);
2182
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_sao_src_left_luma);
2183
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_bs_ctxt.pu4_pic_vert_bs);
2184
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_tile_idx_base);
2185
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.ps_pic_sao);
2186
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_dynamic);
2187
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pv_tu_data);
2188
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pv_mv_bank_buf_base);
2189
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_ref_pic_buf_base);
2190
2.80k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_cur_chroma_ref_buf);
2191
2.80k
    if(ps_codec->u1_enable_cu_info)
2192
0
    {
2193
0
        ALIGNED_FREE(ps_codec, ps_codec->pu1_qp_map_base);
2194
0
        ALIGNED_FREE(ps_codec, ps_codec->pu1_cu_type_map_base);
2195
0
    }
2196
2197
2.80k
    ps_codec->u4_allocate_dynamic_done = 0;
2198
2.80k
    return IV_SUCCESS;
2199
2.80k
}
2200
2201
2202
/**
2203
*******************************************************************************
2204
*
2205
* @brief
2206
*  Initializes from mem records passed to the codec
2207
*
2208
* @par Description:
2209
*  Initializes pointers based on mem records passed
2210
*
2211
* @param[in] ps_codec_obj
2212
*  Pointer to codec object at API level
2213
*
2214
* @param[in] pv_api_ip
2215
*  Pointer to input argument structure
2216
*
2217
* @param[out] pv_api_op
2218
*  Pointer to output argument structure
2219
*
2220
* @returns  Status
2221
*
2222
* @remarks
2223
*
2224
*
2225
*******************************************************************************
2226
*/
2227
WORD32 ihevcd_create(iv_obj_t *ps_codec_obj,
2228
                           void *pv_api_ip,
2229
                           void *pv_api_op)
2230
552
{
2231
552
    ihevcd_cxa_create_ip_t *ps_create_ip;
2232
552
    ihevcd_cxa_create_op_t *ps_create_op;
2233
2234
552
    WORD32 ret;
2235
552
    codec_t *ps_codec;
2236
552
    ps_create_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
2237
552
    ps_create_op = (ihevcd_cxa_create_op_t *)pv_api_op;
2238
2239
552
    ps_create_op->s_ivd_create_op_t.u4_error_code = 0;
2240
552
    ps_codec_obj = NULL;
2241
552
    ret = ihevcd_allocate_static_bufs(&ps_codec_obj, pv_api_ip, pv_api_op);
2242
2243
    /* If allocation of some buffer fails, then free buffers allocated till then */
2244
552
    if(IV_FAIL == ret)
2245
0
    {
2246
0
        if(NULL != ps_codec_obj)
2247
0
        {
2248
0
            if(ps_codec_obj->pv_codec_handle)
2249
0
            {
2250
0
                ihevcd_free_static_bufs(ps_codec_obj);
2251
0
            }
2252
0
            else
2253
0
            {
2254
0
                void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
2255
0
                void *pv_mem_ctxt;
2256
2257
0
                pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
2258
0
                pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
2259
0
                pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
2260
0
            }
2261
0
        }
2262
0
        ps_create_op->s_ivd_create_op_t.u4_error_code = IVD_MEM_ALLOC_FAILED;
2263
0
        ps_create_op->s_ivd_create_op_t.u4_error_code |= 1 << IVD_FATALERROR;
2264
2265
0
        return IV_FAIL;
2266
0
    }
2267
552
    ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2268
552
    ret = ihevcd_init(ps_codec);
2269
2270
552
    TRACE_INIT(NULL);
2271
552
    STATS_INIT();
2272
2273
552
    return ret;
2274
552
}
2275
/**
2276
*******************************************************************************
2277
*
2278
* @brief
2279
*  Delete codec
2280
*
2281
* @par Description:
2282
*  Delete codec
2283
*
2284
* @param[in] ps_codec_obj
2285
*  Pointer to codec object at API level
2286
*
2287
* @param[in] pv_api_ip
2288
*  Pointer to input argument structure
2289
*
2290
* @param[out] pv_api_op
2291
*  Pointer to output argument structure
2292
*
2293
* @returns  Status
2294
*
2295
* @remarks
2296
*
2297
*
2298
*******************************************************************************
2299
*/
2300
WORD32 ihevcd_delete(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2301
552
{
2302
552
    codec_t *ps_dec;
2303
552
    ihevcd_cxa_delete_ip_t *ps_ip = (ihevcd_cxa_delete_ip_t *)pv_api_ip;
2304
552
    ihevcd_cxa_delete_op_t *ps_op = (ihevcd_cxa_delete_op_t *)pv_api_op;
2305
2306
552
    ps_dec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2307
552
    UNUSED(ps_ip);
2308
552
    ps_op->s_ivd_delete_op_t.u4_error_code = 0;
2309
552
    ihevcd_free_dynamic_bufs(ps_dec);
2310
552
    ihevcd_free_static_bufs(ps_codec_obj);
2311
552
    return IV_SUCCESS;
2312
552
}
2313
2314
2315
/**
2316
*******************************************************************************
2317
*
2318
* @brief
2319
*  Passes display buffer from application to codec
2320
*
2321
* @par Description:
2322
*  Adds display buffer to the codec
2323
*
2324
* @param[in] ps_codec_obj
2325
*  Pointer to codec object at API level
2326
*
2327
* @param[in] pv_api_ip
2328
*  Pointer to input argument structure
2329
*
2330
* @param[out] pv_api_op
2331
*  Pointer to output argument structure
2332
*
2333
* @returns  Status
2334
*
2335
* @remarks
2336
*
2337
*
2338
*******************************************************************************
2339
*/
2340
WORD32 ihevcd_set_display_frame(iv_obj_t *ps_codec_obj,
2341
                                void *pv_api_ip,
2342
                                void *pv_api_op)
2343
0
{
2344
0
    WORD32 ret = IV_SUCCESS;
2345
2346
0
    ivd_set_display_frame_ip_t *ps_dec_disp_ip;
2347
0
    ivd_set_display_frame_op_t *ps_dec_disp_op;
2348
2349
0
    WORD32 i;
2350
2351
0
    codec_t *ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2352
2353
0
    ps_dec_disp_ip = (ivd_set_display_frame_ip_t *)pv_api_ip;
2354
0
    ps_dec_disp_op = (ivd_set_display_frame_op_t *)pv_api_op;
2355
2356
0
    ps_codec->i4_num_disp_bufs = 0;
2357
0
    if(ps_codec->i4_share_disp_buf)
2358
0
    {
2359
0
        UWORD32 num_bufs = ps_dec_disp_ip->num_disp_bufs;
2360
0
        pic_buf_t *ps_pic_buf;
2361
0
        UWORD8 *pu1_buf;
2362
0
        WORD32 buf_ret;
2363
2364
0
        UWORD8 *pu1_chroma_buf = NULL;
2365
0
        num_bufs = MIN(num_bufs, BUF_MGR_MAX_CNT);
2366
0
        ps_codec->i4_num_disp_bufs = num_bufs;
2367
2368
0
        ps_pic_buf = (pic_buf_t *)ps_codec->ps_pic_buf;
2369
2370
        /* If color format is 420P, then allocate chroma buffers to hold semiplanar
2371
         * chroma data */
2372
0
        if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2373
0
        {
2374
0
            WORD32 num_samples = ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2375
0
            WORD32 size = num_samples * num_bufs;
2376
0
            void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
2377
2378
0
            pu1_chroma_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2379
0
            RETURN_IF((NULL == pu1_chroma_buf), IV_FAIL);
2380
0
            memset(pu1_chroma_buf, 0, size);
2381
2382
0
            ps_codec->pu1_cur_chroma_ref_buf = pu1_chroma_buf;
2383
0
        }
2384
0
        for(i = 0; i < (WORD32)num_bufs; i++)
2385
0
        {
2386
            /* Stride is not available in some cases here.
2387
               So store base pointers to buffer manager now,
2388
               and update these pointers once header is decoded */
2389
0
            pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[0];
2390
0
            ps_pic_buf->pu1_luma = pu1_buf;
2391
2392
0
            if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2393
0
            {
2394
0
                pu1_buf = pu1_chroma_buf;
2395
0
                pu1_chroma_buf += ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2396
0
            }
2397
0
            else
2398
0
            {
2399
                /* For YUV 420SP case use display buffer itself as chroma ref buffer */
2400
0
                pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[1];
2401
0
            }
2402
2403
0
            ps_pic_buf->pu1_chroma = pu1_buf;
2404
2405
0
            buf_ret = ihevc_buf_mgr_add((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_pic_buf, i);
2406
2407
0
            if(0 != buf_ret)
2408
0
            {
2409
0
                ps_codec->i4_error_code = IHEVCD_BUF_MGR_ERROR;
2410
0
                return IHEVCD_BUF_MGR_ERROR;
2411
0
            }
2412
2413
            /* Mark pic buf as needed for display */
2414
            /* This ensures that till the buffer is explicitly passed to the codec,
2415
             * application owns the buffer. Decoder is allowed to use a buffer only
2416
             * when application sends it through fill this buffer call in OMX
2417
             */
2418
0
            ihevc_buf_mgr_set_status((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, i, BUF_MGR_DISP);
2419
2420
0
            ps_pic_buf++;
2421
2422
            /* Store display buffers in codec context. Needed for 420p output */
2423
0
            memcpy(&ps_codec->s_disp_buffer[ps_codec->i4_share_disp_buf_cnt],
2424
0
                   &ps_dec_disp_ip->s_disp_buffer[i],
2425
0
                   sizeof(ps_dec_disp_ip->s_disp_buffer[i]));
2426
2427
0
            ps_codec->i4_share_disp_buf_cnt++;
2428
2429
0
        }
2430
0
    }
2431
2432
0
    ps_dec_disp_op->u4_error_code = 0;
2433
0
    return ret;
2434
2435
0
}
2436
2437
/**
2438
*******************************************************************************
2439
*
2440
* @brief
2441
*  Sets the decoder in flush mode. Decoder will come out of  flush only
2442
* after returning all the buffers or at reset
2443
*
2444
* @par Description:
2445
*  Sets the decoder in flush mode
2446
*
2447
* @param[in] ps_codec_obj
2448
*  Pointer to codec object at API level
2449
*
2450
* @param[in] pv_api_ip
2451
*  Pointer to input argument structure
2452
*
2453
* @param[out] pv_api_op
2454
*  Pointer to output argument structure
2455
*
2456
* @returns  Status
2457
*
2458
* @remarks
2459
*
2460
*
2461
*******************************************************************************
2462
*/
2463
WORD32 ihevcd_set_flush_mode(iv_obj_t *ps_codec_obj,
2464
                             void *pv_api_ip,
2465
                             void *pv_api_op)
2466
0
{
2467
2468
0
    codec_t *ps_codec;
2469
0
    ivd_ctl_flush_op_t *ps_ctl_op = (ivd_ctl_flush_op_t *)pv_api_op;
2470
0
    UNUSED(pv_api_ip);
2471
0
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2472
0
    ihevcd_join_threads(ps_codec);
2473
2474
    /* Signal flush frame control call */
2475
0
    ps_codec->i4_flush_mode = 1;
2476
2477
0
    ps_ctl_op->u4_error_code = 0;
2478
2479
    /* Set pic count to zero, so that decoder starts buffering again */
2480
    /* once it comes out of flush mode */
2481
0
    ps_codec->u4_pic_cnt = 0;
2482
0
    ps_codec->u4_disp_cnt = 0;
2483
2484
    /* If the first slice NAL fed to decoder after flush is a CRA NAL, then */
2485
    /* it may have associated RASL nals that need to be skipped */
2486
0
    ps_codec->i4_cra_as_first_pic = 1;
2487
0
    return IV_SUCCESS;
2488
2489
2490
0
}
2491
2492
/**
2493
*******************************************************************************
2494
*
2495
* @brief
2496
*  Gets decoder status and buffer requirements
2497
*
2498
* @par Description:
2499
*  Gets the decoder status
2500
*
2501
* @param[in] ps_codec_obj
2502
*  Pointer to codec object at API level
2503
*
2504
* @param[in] pv_api_ip
2505
*  Pointer to input argument structure
2506
*
2507
* @param[out] pv_api_op
2508
*  Pointer to output argument structure
2509
*
2510
* @returns  Status
2511
*
2512
* @remarks
2513
*
2514
*
2515
*******************************************************************************
2516
*/
2517
2518
WORD32 ihevcd_get_status(iv_obj_t *ps_codec_obj,
2519
                         void *pv_api_ip,
2520
                         void *pv_api_op)
2521
0
{
2522
2523
0
    WORD32 i;
2524
0
    codec_t *ps_codec;
2525
0
    WORD32 wd, ht;
2526
0
    ivd_ctl_getstatus_op_t *ps_ctl_op = (ivd_ctl_getstatus_op_t *)pv_api_op;
2527
2528
0
    UNUSED(pv_api_ip);
2529
2530
0
    ps_ctl_op->u4_error_code = 0;
2531
2532
0
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2533
2534
0
    ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2535
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2536
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2537
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2538
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2539
0
    else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2540
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2541
0
    else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2542
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2543
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2544
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2545
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2546
2547
0
    ps_ctl_op->u4_num_disp_bufs = 1;
2548
2549
0
    for(i = 0; i < (WORD32)ps_ctl_op->u4_min_num_in_bufs; i++)
2550
0
    {
2551
0
        wd = ALIGN64(ps_codec->i4_wd);
2552
0
        ht = ALIGN64(ps_codec->i4_ht);
2553
0
        ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2554
0
    }
2555
2556
0
    wd = ps_codec->i4_wd;
2557
0
    ht = ps_codec->i4_ht;
2558
2559
0
    if(ps_codec->i4_sps_done)
2560
0
    {
2561
0
        if(0 == ps_codec->i4_share_disp_buf)
2562
0
        {
2563
0
            wd = ps_codec->i4_disp_wd;
2564
0
            ht = ps_codec->i4_disp_ht;
2565
2566
0
        }
2567
0
        else
2568
0
        {
2569
0
            wd = ps_codec->i4_disp_strd;
2570
0
            ht = ps_codec->i4_ht + PAD_HT;
2571
0
        }
2572
0
    }
2573
2574
0
    if(ps_codec->i4_disp_strd > wd)
2575
0
        wd = ps_codec->i4_disp_strd;
2576
2577
0
    if(0 == ps_codec->i4_share_disp_buf)
2578
0
        ps_ctl_op->u4_num_disp_bufs = 1;
2579
0
    else
2580
0
    {
2581
0
        if(ps_codec->i4_sps_done)
2582
0
        {
2583
0
            sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2584
0
            WORD32 reorder_pic_cnt, ref_pic_cnt;
2585
0
            reorder_pic_cnt = 0;
2586
0
            if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2587
0
                reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2588
0
            ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2589
2590
0
            ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2591
2592
0
            ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2593
0
        }
2594
0
        else
2595
0
        {
2596
0
            ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2597
0
        }
2598
2599
0
        ps_ctl_op->u4_num_disp_bufs = MIN(
2600
0
                        ps_ctl_op->u4_num_disp_bufs, 32);
2601
0
    }
2602
2603
    /*!*/
2604
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2605
0
    {
2606
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2607
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2608
0
        ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2609
0
    }
2610
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2611
0
    {
2612
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2613
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2614
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2615
0
    }
2616
0
    else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2617
0
    {
2618
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2619
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2620
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2621
0
    }
2622
0
    else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2623
0
    {
2624
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2625
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2626
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2627
0
    }
2628
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2629
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2630
0
    {
2631
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2632
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2633
0
        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2634
0
    }
2635
0
    ps_ctl_op->u4_pic_ht = ht;
2636
0
    ps_ctl_op->u4_pic_wd = wd;
2637
0
    ps_ctl_op->u4_frame_rate = 30000;
2638
0
    ps_ctl_op->u4_bit_rate = 1000000;
2639
0
    ps_ctl_op->e_content_type = IV_PROGRESSIVE;
2640
0
    ps_ctl_op->e_output_chroma_format = ps_codec->e_chroma_fmt;
2641
0
    ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2642
2643
0
    if(ps_ctl_op->u4_size == sizeof(ihevcd_cxa_ctl_getstatus_op_t))
2644
0
    {
2645
0
        ihevcd_cxa_ctl_getstatus_op_t *ps_ext_ctl_op = (ihevcd_cxa_ctl_getstatus_op_t *)ps_ctl_op;
2646
0
        ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_wd;
2647
0
        ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_ht;
2648
0
    }
2649
0
    return IV_SUCCESS;
2650
0
}
2651
/**
2652
*******************************************************************************
2653
*
2654
* @brief
2655
*  Gets decoder buffer requirements
2656
*
2657
* @par Description:
2658
*  Gets the decoder buffer requirements. If called before  header decoder,
2659
* buffer requirements are based on max_wd  and max_ht else actual width and
2660
* height will be used
2661
*
2662
* @param[in] ps_codec_obj
2663
*  Pointer to codec object at API level
2664
*
2665
* @param[in] pv_api_ip
2666
*  Pointer to input argument structure
2667
*
2668
* @param[out] pv_api_op
2669
*  Pointer to output argument structure
2670
*
2671
* @returns  Status
2672
*
2673
* @remarks
2674
*
2675
*
2676
*******************************************************************************
2677
*/
2678
WORD32 ihevcd_get_buf_info(iv_obj_t *ps_codec_obj,
2679
                           void *pv_api_ip,
2680
                           void *pv_api_op)
2681
0
{
2682
2683
0
    codec_t *ps_codec;
2684
0
    UWORD32 i = 0;
2685
0
    WORD32 wd, ht;
2686
0
    ivd_ctl_getbufinfo_op_t *ps_ctl_op =
2687
0
                    (ivd_ctl_getbufinfo_op_t *)pv_api_op;
2688
2689
0
    UNUSED(pv_api_ip);
2690
0
    ps_ctl_op->u4_error_code = 0;
2691
2692
0
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2693
2694
0
    ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2695
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2696
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2697
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2698
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2699
0
    else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2700
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2701
0
    else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2702
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2703
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2704
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2705
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2706
2707
0
    ps_ctl_op->u4_num_disp_bufs = 1;
2708
2709
0
    for(i = 0; i < ps_ctl_op->u4_min_num_in_bufs; i++)
2710
0
    {
2711
0
        wd = ALIGN64(ps_codec->i4_wd);
2712
0
        ht = ALIGN64(ps_codec->i4_ht);
2713
2714
0
        ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2715
0
    }
2716
2717
0
    wd = 0;
2718
0
    ht = 0;
2719
2720
0
    if(ps_codec->i4_sps_done)
2721
0
    {
2722
0
        if(0 == ps_codec->i4_share_disp_buf)
2723
0
        {
2724
0
            wd = ps_codec->i4_disp_wd;
2725
0
            ht = ps_codec->i4_disp_ht;
2726
2727
0
        }
2728
0
        else
2729
0
        {
2730
0
            wd = ps_codec->i4_disp_strd;
2731
0
            ht = ps_codec->i4_ht + PAD_HT;
2732
0
        }
2733
0
    }
2734
0
    else
2735
0
    {
2736
0
        if(1 == ps_codec->i4_share_disp_buf)
2737
0
        {
2738
0
            wd = ALIGN32(wd + PAD_WD);
2739
0
            ht += PAD_HT;
2740
0
        }
2741
0
    }
2742
2743
0
    if(ps_codec->i4_disp_strd > wd)
2744
0
        wd = ps_codec->i4_disp_strd;
2745
2746
0
    if(0 == ps_codec->i4_share_disp_buf)
2747
0
        ps_ctl_op->u4_num_disp_bufs = 1;
2748
0
    else
2749
0
    {
2750
0
        if(ps_codec->i4_sps_done)
2751
0
        {
2752
0
            sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2753
0
            WORD32 reorder_pic_cnt, ref_pic_cnt;
2754
0
            reorder_pic_cnt = 0;
2755
0
            if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2756
0
                reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2757
0
            ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2758
2759
0
            ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2760
2761
0
            ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2762
0
        }
2763
0
        else
2764
0
        {
2765
0
            ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2766
0
        }
2767
2768
0
        ps_ctl_op->u4_num_disp_bufs = MIN(
2769
0
                        ps_ctl_op->u4_num_disp_bufs, 32);
2770
2771
0
    }
2772
2773
    /*!*/
2774
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2775
0
    {
2776
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2777
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2778
0
        ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2779
0
    }
2780
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2781
0
    {
2782
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2783
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2784
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2785
0
    }
2786
0
    else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2787
0
    {
2788
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2789
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2790
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2791
0
    }
2792
0
    else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2793
0
    {
2794
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2795
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2796
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2797
0
    }
2798
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2799
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2800
0
    {
2801
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2802
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2803
0
        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2804
0
    }
2805
0
    ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2806
2807
0
    return IV_SUCCESS;
2808
0
}
2809
2810
2811
/**
2812
*******************************************************************************
2813
*
2814
* @brief
2815
*  Sets dynamic parameters
2816
*
2817
* @par Description:
2818
*  Sets dynamic parameters. Note Frame skip, decode header  mode are dynamic
2819
*  Dynamic change in stride is not  supported
2820
*
2821
* @param[in] ps_codec_obj
2822
*  Pointer to codec object at API level
2823
*
2824
* @param[in] pv_api_ip
2825
*  Pointer to input argument structure
2826
*
2827
* @param[out] pv_api_op
2828
*  Pointer to output argument structure
2829
*
2830
* @returns  Status
2831
*
2832
* @remarks
2833
*
2834
*
2835
*******************************************************************************
2836
*/
2837
WORD32 ihevcd_set_params(iv_obj_t *ps_codec_obj,
2838
                         void *pv_api_ip,
2839
                         void *pv_api_op)
2840
1.10k
{
2841
2842
1.10k
    codec_t *ps_codec;
2843
1.10k
    WORD32 ret = IV_SUCCESS;
2844
1.10k
    WORD32 strd;
2845
1.10k
    ivd_ctl_set_config_ip_t *s_ctl_dynparams_ip =
2846
1.10k
                    (ivd_ctl_set_config_ip_t *)pv_api_ip;
2847
1.10k
    ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
2848
1.10k
                    (ivd_ctl_set_config_op_t *)pv_api_op;
2849
2850
1.10k
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2851
2852
1.10k
    s_ctl_dynparams_op->u4_error_code = 0;
2853
2854
1.10k
    ps_codec->e_pic_skip_mode = s_ctl_dynparams_ip->e_frm_skip_mode;
2855
2856
1.10k
    if(s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_NONE)
2857
0
    {
2858
2859
0
        if((s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_P) &&
2860
0
           (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_B) &&
2861
0
           (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_PB))
2862
0
        {
2863
0
            s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2864
0
            ret = IV_FAIL;
2865
0
        }
2866
0
    }
2867
2868
1.10k
    strd = ps_codec->i4_disp_strd;
2869
1.10k
    if(1 == ps_codec->i4_share_disp_buf)
2870
0
    {
2871
0
        strd = ps_codec->i4_strd;
2872
0
    }
2873
2874
2875
1.10k
    {
2876
1.10k
        if((WORD32)s_ctl_dynparams_ip->u4_disp_wd >= ps_codec->i4_disp_wd)
2877
623
        {
2878
623
            strd = s_ctl_dynparams_ip->u4_disp_wd;
2879
623
        }
2880
481
        else if(0 == ps_codec->i4_sps_done)
2881
0
        {
2882
0
            strd = s_ctl_dynparams_ip->u4_disp_wd;
2883
0
        }
2884
481
        else if(s_ctl_dynparams_ip->u4_disp_wd == 0)
2885
481
        {
2886
481
            strd = ps_codec->i4_disp_strd;
2887
481
        }
2888
0
        else
2889
0
        {
2890
0
            strd = 0;
2891
0
            s_ctl_dynparams_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
2892
0
            s_ctl_dynparams_op->u4_error_code |= IHEVCD_INVALID_DISP_STRD;
2893
0
            ret = IV_FAIL;
2894
0
        }
2895
1.10k
    }
2896
2897
1.10k
    ps_codec->i4_disp_strd = strd;
2898
1.10k
    if(1 == ps_codec->i4_share_disp_buf)
2899
0
    {
2900
0
        ps_codec->i4_strd = strd;
2901
0
    }
2902
2903
1.10k
    if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_FRAME)
2904
552
        ps_codec->i4_header_mode = 0;
2905
552
    else if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_HEADER)
2906
552
        ps_codec->i4_header_mode = 1;
2907
0
    else
2908
0
    {
2909
2910
0
        s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2911
0
        ps_codec->i4_header_mode = 1;
2912
0
        ret = IV_FAIL;
2913
0
    }
2914
2915
1.10k
    ps_codec->e_frm_out_mode = IVD_DISPLAY_FRAME_OUT;
2916
2917
1.10k
    if((s_ctl_dynparams_ip->e_frm_out_mode != IVD_DECODE_FRAME_OUT) &&
2918
1.10k
       (s_ctl_dynparams_ip->e_frm_out_mode != IVD_DISPLAY_FRAME_OUT))
2919
0
    {
2920
0
        s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2921
0
        ret = IV_FAIL;
2922
0
    }
2923
1.10k
    ps_codec->e_frm_out_mode = s_ctl_dynparams_ip->e_frm_out_mode;
2924
2925
1.10k
    return ret;
2926
2927
1.10k
}
2928
/**
2929
*******************************************************************************
2930
*
2931
* @brief
2932
*  Resets the decoder state
2933
*
2934
* @par Description:
2935
*  Resets the decoder state by calling ihevcd_init()
2936
*
2937
* @param[in] ps_codec_obj
2938
*  Pointer to codec object at API level
2939
*
2940
* @param[in] pv_api_ip
2941
*  Pointer to input argument structure
2942
*
2943
* @param[out] pv_api_op
2944
*  Pointer to output argument structure
2945
*
2946
* @returns  Status
2947
*
2948
* @remarks
2949
*
2950
*
2951
*******************************************************************************
2952
*/
2953
WORD32 ihevcd_reset(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2954
1.64k
{
2955
1.64k
    codec_t *ps_codec;
2956
1.64k
    ivd_ctl_reset_op_t *s_ctl_reset_op = (ivd_ctl_reset_op_t *)pv_api_op;
2957
1.64k
    UNUSED(pv_api_ip);
2958
1.64k
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2959
2960
1.64k
    if(ps_codec != NULL)
2961
1.64k
    {
2962
1.64k
        DEBUG("\nReset called \n");
2963
1.64k
        ihevcd_join_threads(ps_codec);
2964
2965
1.64k
        ihevcd_init(ps_codec);
2966
1.64k
    }
2967
0
    else
2968
0
    {
2969
0
        DEBUG("\nReset called without Initializing the decoder\n");
2970
0
        s_ctl_reset_op->u4_error_code = IHEVCD_INIT_NOT_DONE;
2971
0
    }
2972
2973
1.64k
    return IV_SUCCESS;
2974
1.64k
}
2975
2976
/**
2977
*******************************************************************************
2978
*
2979
* @brief
2980
*  Releases display buffer from application to codec  to signal to the codec
2981
* that it can write to this buffer  if required. Till release is called,
2982
* codec can not write  to this buffer
2983
*
2984
* @par Description:
2985
*  Marks the buffer as display done
2986
*
2987
* @param[in] ps_codec_obj
2988
*  Pointer to codec object at API level
2989
*
2990
* @param[in] pv_api_ip
2991
*  Pointer to input argument structure
2992
*
2993
* @param[out] pv_api_op
2994
*  Pointer to output argument structure
2995
*
2996
* @returns  Status
2997
*
2998
* @remarks
2999
*
3000
*
3001
*******************************************************************************
3002
*/
3003
3004
WORD32 ihevcd_rel_display_frame(iv_obj_t *ps_codec_obj,
3005
                                void *pv_api_ip,
3006
                                void *pv_api_op)
3007
0
{
3008
3009
0
    ivd_rel_display_frame_ip_t *ps_dec_rel_disp_ip;
3010
0
    ivd_rel_display_frame_op_t *ps_dec_rel_disp_op;
3011
3012
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3013
3014
0
    ps_dec_rel_disp_ip = (ivd_rel_display_frame_ip_t *)pv_api_ip;
3015
0
    ps_dec_rel_disp_op = (ivd_rel_display_frame_op_t *)pv_api_op;
3016
3017
0
    UNUSED(ps_dec_rel_disp_op);
3018
3019
0
    if(0 == ps_codec->i4_share_disp_buf)
3020
0
    {
3021
0
        return IV_SUCCESS;
3022
0
    }
3023
3024
0
    ihevc_buf_mgr_release((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_dec_rel_disp_ip->u4_disp_buf_id, BUF_MGR_DISP);
3025
3026
0
    return IV_SUCCESS;
3027
0
}
3028
/**
3029
*******************************************************************************
3030
*
3031
* @brief
3032
*  Sets degrade params
3033
*
3034
* @par Description:
3035
*  Sets degrade params.
3036
*  Refer to ihevcd_cxa_ctl_degrade_ip_t definition for details
3037
*
3038
* @param[in] ps_codec_obj
3039
*  Pointer to codec object at API level
3040
*
3041
* @param[in] pv_api_ip
3042
*  Pointer to input argument structure
3043
*
3044
* @param[out] pv_api_op
3045
*  Pointer to output argument structure
3046
*
3047
* @returns  Status
3048
*
3049
* @remarks
3050
*
3051
*
3052
*******************************************************************************
3053
*/
3054
3055
WORD32 ihevcd_set_degrade(iv_obj_t *ps_codec_obj,
3056
                          void *pv_api_ip,
3057
                          void *pv_api_op)
3058
0
{
3059
0
    ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
3060
0
    ihevcd_cxa_ctl_degrade_op_t *ps_op;
3061
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3062
3063
0
    ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
3064
0
    ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
3065
3066
0
    ps_codec->i4_degrade_type = ps_ip->i4_degrade_type;
3067
0
    ps_codec->i4_nondegrade_interval = ps_ip->i4_nondegrade_interval;
3068
0
    ps_codec->i4_degrade_pics = ps_ip->i4_degrade_pics;
3069
3070
0
    ps_op->u4_error_code = 0;
3071
0
    ps_codec->i4_degrade_pic_cnt = 0;
3072
3073
0
    return IV_SUCCESS;
3074
0
}
3075
3076
3077
/**
3078
*******************************************************************************
3079
*
3080
* @brief
3081
*  Gets frame dimensions/offsets
3082
*
3083
* @par Description:
3084
*  Gets frame buffer chararacteristics such a x & y offsets  display and
3085
* buffer dimensions
3086
*
3087
* @param[in] ps_codec_obj
3088
*  Pointer to codec object at API level
3089
*
3090
* @param[in] pv_api_ip
3091
*  Pointer to input argument structure
3092
*
3093
* @param[out] pv_api_op
3094
*  Pointer to output argument structure
3095
*
3096
* @returns  Status
3097
*
3098
* @remarks
3099
*
3100
*
3101
*******************************************************************************
3102
*/
3103
3104
WORD32 ihevcd_get_frame_dimensions(iv_obj_t *ps_codec_obj,
3105
                                   void *pv_api_ip,
3106
                                   void *pv_api_op)
3107
0
{
3108
0
    ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
3109
0
    ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
3110
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3111
0
    WORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset;
3112
0
    ps_ip = (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
3113
0
    ps_op = (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
3114
0
    UNUSED(ps_ip);
3115
0
    if(ps_codec->i4_sps_done)
3116
0
    {
3117
0
        disp_wd = ps_codec->i4_disp_wd;
3118
0
        disp_ht = ps_codec->i4_disp_ht;
3119
3120
0
        if(0 == ps_codec->i4_share_disp_buf)
3121
0
        {
3122
0
            buffer_wd = disp_wd;
3123
0
            buffer_ht = disp_ht;
3124
0
        }
3125
0
        else
3126
0
        {
3127
0
            buffer_wd = ps_codec->i4_strd;
3128
0
            buffer_ht = ps_codec->i4_ht + PAD_HT;
3129
0
        }
3130
0
    }
3131
0
    else
3132
0
    {
3133
3134
0
        disp_wd = 0;
3135
0
        disp_ht = 0;
3136
3137
0
        if(0 == ps_codec->i4_share_disp_buf)
3138
0
        {
3139
0
            buffer_wd = disp_wd;
3140
0
            buffer_ht = disp_ht;
3141
0
        }
3142
0
        else
3143
0
        {
3144
0
            buffer_wd = ALIGN16(disp_wd) + PAD_WD;
3145
0
            buffer_ht = ALIGN16(disp_ht) + PAD_HT;
3146
3147
0
        }
3148
0
    }
3149
0
    if(ps_codec->i4_strd > buffer_wd)
3150
0
        buffer_wd = ps_codec->i4_strd;
3151
3152
0
    if(0 == ps_codec->i4_share_disp_buf)
3153
0
    {
3154
0
        x_offset = 0;
3155
0
        y_offset = 0;
3156
0
    }
3157
0
    else
3158
0
    {
3159
0
        y_offset = PAD_TOP;
3160
0
        x_offset = PAD_LEFT;
3161
0
    }
3162
3163
0
    ps_op->u4_disp_wd[0] = disp_wd;
3164
0
    ps_op->u4_disp_ht[0] = disp_ht;
3165
0
    ps_op->u4_buffer_wd[0] = buffer_wd;
3166
0
    ps_op->u4_buffer_ht[0] = buffer_ht;
3167
0
    ps_op->u4_x_offset[0] = x_offset;
3168
0
    ps_op->u4_y_offset[0] = y_offset;
3169
3170
0
    ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1)
3171
0
                    >> 1);
3172
0
    ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1)
3173
0
                    >> 1);
3174
0
    ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0]
3175
0
                    >> 1);
3176
0
    ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0]
3177
0
                    >> 1);
3178
0
    ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = (ps_op->u4_x_offset[0]
3179
0
                    >> 1);
3180
0
    ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = (ps_op->u4_y_offset[0]
3181
0
                    >> 1);
3182
3183
0
    if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
3184
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
3185
0
    {
3186
0
        ps_op->u4_disp_wd[2] = 0;
3187
0
        ps_op->u4_disp_ht[2] = 0;
3188
0
        ps_op->u4_buffer_wd[2] = 0;
3189
0
        ps_op->u4_buffer_ht[2] = 0;
3190
0
        ps_op->u4_x_offset[2] = 0;
3191
0
        ps_op->u4_y_offset[2] = 0;
3192
3193
0
        ps_op->u4_disp_wd[1] <<= 1;
3194
0
        ps_op->u4_buffer_wd[1] <<= 1;
3195
0
        ps_op->u4_x_offset[1] <<= 1;
3196
0
    }
3197
3198
0
    return IV_SUCCESS;
3199
3200
0
}
3201
3202
3203
/**
3204
*******************************************************************************
3205
*
3206
* @brief
3207
*  Gets vui parameters
3208
*
3209
* @par Description:
3210
*  Gets VUI parameters
3211
*
3212
* @param[in] ps_codec_obj
3213
*  Pointer to codec object at API level
3214
*
3215
* @param[in] pv_api_ip
3216
*  Pointer to input argument structure
3217
*
3218
* @param[out] pv_api_op
3219
*  Pointer to output argument structure
3220
*
3221
* @returns  Status
3222
*
3223
* @remarks
3224
*
3225
*
3226
*******************************************************************************
3227
*/
3228
WORD32 ihevcd_get_vui_params(iv_obj_t *ps_codec_obj,
3229
                             void *pv_api_ip,
3230
                             void *pv_api_op)
3231
0
{
3232
0
    ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
3233
0
    ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
3234
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3235
0
    sps_t *ps_sps;
3236
0
    vui_t *ps_vui;
3237
0
    WORD32 i;
3238
3239
0
    ps_ip = (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
3240
0
    ps_op = (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
3241
3242
0
    if(0 == ps_codec->i4_sps_done)
3243
0
    {
3244
0
        ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3245
0
        return IV_FAIL;
3246
0
    }
3247
3248
0
    ps_sps = ps_codec->s_parse.ps_sps;
3249
0
    if(0 == ps_sps->i1_sps_valid || 0 == ps_sps->i1_vui_parameters_present_flag)
3250
0
    {
3251
0
        WORD32 sps_idx = 0;
3252
0
        ps_sps = ps_codec->ps_sps_base;
3253
3254
0
        while((0 == ps_sps->i1_sps_valid) || (0 == ps_sps->i1_vui_parameters_present_flag))
3255
0
        {
3256
0
            sps_idx++;
3257
0
            ps_sps++;
3258
3259
0
            if(sps_idx == MAX_SPS_CNT - 1)
3260
0
            {
3261
0
                ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3262
0
                return IV_FAIL;
3263
0
            }
3264
0
        }
3265
0
    }
3266
3267
0
    ps_vui = &ps_sps->s_vui_parameters;
3268
0
    UNUSED(ps_ip);
3269
3270
0
    ps_op->u1_aspect_ratio_info_present_flag         =  ps_vui->u1_aspect_ratio_info_present_flag;
3271
0
    ps_op->u1_aspect_ratio_idc                       =  ps_vui->u1_aspect_ratio_idc;
3272
0
    ps_op->u2_sar_width                              =  ps_vui->u2_sar_width;
3273
0
    ps_op->u2_sar_height                             =  ps_vui->u2_sar_height;
3274
0
    ps_op->u1_overscan_info_present_flag             =  ps_vui->u1_overscan_info_present_flag;
3275
0
    ps_op->u1_overscan_appropriate_flag              =  ps_vui->u1_overscan_appropriate_flag;
3276
0
    ps_op->u1_video_signal_type_present_flag         =  ps_vui->u1_video_signal_type_present_flag;
3277
0
    ps_op->u1_video_format                           =  ps_vui->u1_video_format;
3278
0
    ps_op->u1_video_full_range_flag                  =  ps_vui->u1_video_full_range_flag;
3279
0
    ps_op->u1_colour_description_present_flag        =  ps_vui->u1_colour_description_present_flag;
3280
0
    ps_op->u1_colour_primaries                       =  ps_vui->u1_colour_primaries;
3281
0
    ps_op->u1_transfer_characteristics               =  ps_vui->u1_transfer_characteristics;
3282
0
    ps_op->u1_matrix_coefficients                    =  ps_vui->u1_matrix_coefficients;
3283
0
    ps_op->u1_chroma_loc_info_present_flag           =  ps_vui->u1_chroma_loc_info_present_flag;
3284
0
    ps_op->u1_chroma_sample_loc_type_top_field       =  ps_vui->u1_chroma_sample_loc_type_top_field;
3285
0
    ps_op->u1_chroma_sample_loc_type_bottom_field    =  ps_vui->u1_chroma_sample_loc_type_bottom_field;
3286
0
    ps_op->u1_neutral_chroma_indication_flag         =  ps_vui->u1_neutral_chroma_indication_flag;
3287
0
    ps_op->u1_field_seq_flag                         =  ps_vui->u1_field_seq_flag;
3288
0
    ps_op->u1_frame_field_info_present_flag          =  ps_vui->u1_frame_field_info_present_flag;
3289
0
    ps_op->u1_default_display_window_flag            =  ps_vui->u1_default_display_window_flag;
3290
0
    ps_op->u4_def_disp_win_left_offset               =  ps_vui->u4_def_disp_win_left_offset;
3291
0
    ps_op->u4_def_disp_win_right_offset              =  ps_vui->u4_def_disp_win_right_offset;
3292
0
    ps_op->u4_def_disp_win_top_offset                =  ps_vui->u4_def_disp_win_top_offset;
3293
0
    ps_op->u4_def_disp_win_bottom_offset             =  ps_vui->u4_def_disp_win_bottom_offset;
3294
0
    ps_op->u1_vui_hrd_parameters_present_flag        =  ps_vui->u1_vui_hrd_parameters_present_flag;
3295
0
    ps_op->u1_vui_timing_info_present_flag           =  ps_vui->u1_vui_timing_info_present_flag;
3296
0
    ps_op->u4_vui_num_units_in_tick                  =  ps_vui->u4_vui_num_units_in_tick;
3297
0
    ps_op->u4_vui_time_scale                         =  ps_vui->u4_vui_time_scale;
3298
0
    ps_op->u1_poc_proportional_to_timing_flag        =  ps_vui->u1_poc_proportional_to_timing_flag;
3299
0
    ps_op->u4_num_ticks_poc_diff_one_minus1          =  ps_vui->u4_num_ticks_poc_diff_one_minus1;
3300
0
    ps_op->u1_bitstream_restriction_flag             =  ps_vui->u1_bitstream_restriction_flag;
3301
0
    ps_op->u1_tiles_fixed_structure_flag             =  ps_vui->u1_tiles_fixed_structure_flag;
3302
0
    ps_op->u1_motion_vectors_over_pic_boundaries_flag =  ps_vui->u1_motion_vectors_over_pic_boundaries_flag;
3303
0
    ps_op->u1_restricted_ref_pic_lists_flag          =  ps_vui->u1_restricted_ref_pic_lists_flag;
3304
0
    ps_op->u4_min_spatial_segmentation_idc           =  ps_vui->u4_min_spatial_segmentation_idc;
3305
0
    ps_op->u1_max_bytes_per_pic_denom                =  ps_vui->u1_max_bytes_per_pic_denom;
3306
0
    ps_op->u1_max_bits_per_mincu_denom               =  ps_vui->u1_max_bits_per_mincu_denom;
3307
0
    ps_op->u1_log2_max_mv_length_horizontal          =  ps_vui->u1_log2_max_mv_length_horizontal;
3308
0
    ps_op->u1_log2_max_mv_length_vertical            =  ps_vui->u1_log2_max_mv_length_vertical;
3309
3310
3311
    /* HRD parameters */
3312
0
    ps_op->u1_timing_info_present_flag                         =    ps_vui->s_vui_hrd_parameters.u1_timing_info_present_flag;
3313
0
    ps_op->u4_num_units_in_tick                                =    ps_vui->s_vui_hrd_parameters.u4_num_units_in_tick;
3314
0
    ps_op->u4_time_scale                                       =    ps_vui->s_vui_hrd_parameters.u4_time_scale;
3315
0
    ps_op->u1_nal_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_nal_hrd_parameters_present_flag;
3316
0
    ps_op->u1_vcl_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_vcl_hrd_parameters_present_flag;
3317
0
    ps_op->u1_cpbdpb_delays_present_flag                       =    ps_vui->s_vui_hrd_parameters.u1_cpbdpb_delays_present_flag;
3318
0
    ps_op->u1_sub_pic_cpb_params_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_present_flag;
3319
0
    ps_op->u1_tick_divisor_minus2                              =    ps_vui->s_vui_hrd_parameters.u1_tick_divisor_minus2;
3320
0
    ps_op->u1_du_cpb_removal_delay_increment_length_minus1     =    ps_vui->s_vui_hrd_parameters.u1_du_cpb_removal_delay_increment_length_minus1;
3321
0
    ps_op->u1_sub_pic_cpb_params_in_pic_timing_sei_flag        =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_in_pic_timing_sei_flag;
3322
0
    ps_op->u1_dpb_output_delay_du_length_minus1                =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_du_length_minus1;
3323
0
    ps_op->u4_bit_rate_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_bit_rate_scale;
3324
0
    ps_op->u4_cpb_size_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_scale;
3325
0
    ps_op->u4_cpb_size_du_scale                                =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_du_scale;
3326
0
    ps_op->u1_initial_cpb_removal_delay_length_minus1          =    ps_vui->s_vui_hrd_parameters.u1_initial_cpb_removal_delay_length_minus1;
3327
0
    ps_op->u1_au_cpb_removal_delay_length_minus1               =    ps_vui->s_vui_hrd_parameters.u1_au_cpb_removal_delay_length_minus1;
3328
0
    ps_op->u1_dpb_output_delay_length_minus1                   =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_length_minus1;
3329
3330
0
    for(i = 0; i < 6; i++)
3331
0
    {
3332
0
        ps_op->au1_fixed_pic_rate_general_flag[i]                  =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_general_flag[i];
3333
0
        ps_op->au1_fixed_pic_rate_within_cvs_flag[i]               =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_within_cvs_flag[i];
3334
0
        ps_op->au2_elemental_duration_in_tc_minus1[i]              =    ps_vui->s_vui_hrd_parameters.au2_elemental_duration_in_tc_minus1[i];
3335
0
        ps_op->au1_low_delay_hrd_flag[i]                           =    ps_vui->s_vui_hrd_parameters.au1_low_delay_hrd_flag[i];
3336
0
        ps_op->au1_cpb_cnt_minus1[i]                               =    ps_vui->s_vui_hrd_parameters.au1_cpb_cnt_minus1[i];
3337
0
    }
3338
3339
3340
0
    return IV_SUCCESS;
3341
0
}
3342
3343
#ifndef DISABLE_SEI
3344
/**
3345
*******************************************************************************
3346
*
3347
* @brief
3348
*  Gets SEI mastering display color volume parameters
3349
*
3350
* @par Description:
3351
*  Gets SEI mastering display color volume parameters
3352
*
3353
* @param[in] ps_codec_obj
3354
*  Pointer to codec object at API level
3355
*
3356
* @param[in] pv_api_ip
3357
*  Pointer to input argument structure
3358
*
3359
* @param[out] pv_api_op
3360
*  Pointer to output argument structure
3361
*
3362
* @returns  Status
3363
*
3364
* @remarks
3365
*
3366
*
3367
*******************************************************************************
3368
*/
3369
WORD32 ihevcd_get_sei_mastering_params(iv_obj_t *ps_codec_obj,
3370
                             void *pv_api_ip,
3371
                             void *pv_api_op)
3372
0
{
3373
0
    ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
3374
0
    ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
3375
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3376
0
    sei_params_t *ps_sei;
3377
0
    mastering_dis_col_vol_sei_params_t *ps_mastering_dis_col_vol;
3378
0
    WORD32 i;
3379
3380
0
    ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
3381
0
    ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
3382
0
    UNUSED(ps_ip);
3383
0
    if(NULL == ps_codec->ps_disp_buf)
3384
0
    {
3385
0
        ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3386
0
        return IV_FAIL;
3387
0
    }
3388
0
    ps_sei = &ps_codec->ps_disp_buf->s_sei_params;
3389
0
    if((0 == ps_sei->i4_sei_mastering_disp_colour_vol_params_present_flags)
3390
0
                    || (0 == ps_sei->i1_sei_parameters_present_flag))
3391
0
    {
3392
0
        ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3393
0
        return IV_FAIL;
3394
0
    }
3395
3396
0
    ps_mastering_dis_col_vol = &ps_sei->s_mastering_dis_col_vol_sei_params;
3397
3398
0
    for(i = 0; i < 3; i++)
3399
0
    {
3400
0
        ps_op->au2_display_primaries_x[i] =
3401
0
                    ps_mastering_dis_col_vol->au2_display_primaries_x[i];
3402
3403
0
        ps_op->au2_display_primaries_y[i] =
3404
0
                    ps_mastering_dis_col_vol->au2_display_primaries_y[i];
3405
0
    }
3406
3407
0
    ps_op->u2_white_point_x = ps_mastering_dis_col_vol->u2_white_point_x;
3408
3409
0
    ps_op->u2_white_point_y = ps_mastering_dis_col_vol->u2_white_point_y;
3410
3411
0
    ps_op->u4_max_display_mastering_luminance =
3412
0
                    ps_mastering_dis_col_vol->u4_max_display_mastering_luminance;
3413
3414
0
    ps_op->u4_min_display_mastering_luminance =
3415
0
                    ps_mastering_dis_col_vol->u4_min_display_mastering_luminance;
3416
3417
0
    return IV_SUCCESS;
3418
0
}
3419
#endif
3420
3421
/**
3422
*******************************************************************************
3423
*
3424
* @brief
3425
*  Sets Processor type
3426
*
3427
* @par Description:
3428
*  Sets Processor type
3429
*
3430
* @param[in] ps_codec_obj
3431
*  Pointer to codec object at API level
3432
*
3433
* @param[in] pv_api_ip
3434
*  Pointer to input argument structure
3435
*
3436
* @param[out] pv_api_op
3437
*  Pointer to output argument structure
3438
*
3439
* @returns  Status
3440
*
3441
* @remarks
3442
*
3443
*
3444
*******************************************************************************
3445
*/
3446
3447
WORD32 ihevcd_set_processor(iv_obj_t *ps_codec_obj,
3448
                            void *pv_api_ip,
3449
                            void *pv_api_op)
3450
552
{
3451
552
    ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
3452
552
    ihevcd_cxa_ctl_set_processor_op_t *ps_op;
3453
552
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3454
3455
552
    ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
3456
552
    ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
3457
3458
552
    ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch;
3459
552
    ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc;
3460
3461
552
    ihevcd_init_function_ptr(ps_codec);
3462
3463
552
    ihevcd_update_function_ptr(ps_codec);
3464
3465
552
    if(ps_codec->e_processor_soc && (ps_codec->e_processor_soc <= SOC_HISI_37X))
3466
0
    {
3467
        /* 8th bit indicates if format conversion is to be done ahead */
3468
0
        if(ps_codec->e_processor_soc & 0x80)
3469
0
            ps_codec->u4_enable_fmt_conv_ahead = 1;
3470
3471
        /* Lower 7 bit indicate NCTB - if non-zero */
3472
0
        ps_codec->e_processor_soc &= 0x7F;
3473
3474
0
        if(ps_codec->e_processor_soc)
3475
0
            ps_codec->u4_nctb = ps_codec->e_processor_soc;
3476
3477
3478
0
    }
3479
3480
552
    if((ps_codec->e_processor_soc == SOC_HISI_37X) && (ps_codec->i4_num_cores == 2))
3481
0
    {
3482
0
        ps_codec->u4_nctb = 2;
3483
0
    }
3484
3485
3486
552
    ps_op->u4_error_code = 0;
3487
552
    return IV_SUCCESS;
3488
552
}
3489
3490
/**
3491
*******************************************************************************
3492
*
3493
* @brief
3494
*  Sets Number of cores that can be used in the codec. Codec uses these many
3495
* threads for decoding
3496
*
3497
* @par Description:
3498
*  Sets number of cores
3499
*
3500
* @param[in] ps_codec_obj
3501
*  Pointer to codec object at API level
3502
*
3503
* @param[in] pv_api_ip
3504
*  Pointer to input argument structure
3505
*
3506
* @param[out] pv_api_op
3507
*  Pointer to output argument structure
3508
*
3509
* @returns  Status
3510
*
3511
* @remarks
3512
*
3513
*
3514
*******************************************************************************
3515
*/
3516
3517
WORD32 ihevcd_set_num_cores(iv_obj_t *ps_codec_obj,
3518
                            void *pv_api_ip,
3519
                            void *pv_api_op)
3520
552
{
3521
552
    ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
3522
552
    ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
3523
552
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3524
3525
552
    ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
3526
552
    ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
3527
3528
552
    ps_codec->i4_num_cores = ps_ip->u4_num_cores;
3529
552
    ps_op->u4_error_code = 0;
3530
552
    return IV_SUCCESS;
3531
552
}
3532
/**
3533
*******************************************************************************
3534
*
3535
* @brief
3536
*  Codec control call
3537
*
3538
* @par Description:
3539
*  Codec control call which in turn calls appropriate calls  based on
3540
* subcommand
3541
*
3542
* @param[in] ps_codec_obj
3543
*  Pointer to codec object at API level
3544
*
3545
* @param[in] pv_api_ip
3546
*  Pointer to input argument structure
3547
*
3548
* @param[out] pv_api_op
3549
*  Pointer to output argument structure
3550
*
3551
* @returns  Status
3552
*
3553
* @remarks
3554
*
3555
*
3556
*******************************************************************************
3557
*/
3558
3559
WORD32 ihevcd_ctl(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
3560
3.85k
{
3561
3.85k
    ivd_ctl_set_config_ip_t *ps_ctl_ip;
3562
3.85k
    ivd_ctl_set_config_op_t *ps_ctl_op;
3563
3.85k
    WORD32 ret = 0;
3564
3.85k
    WORD32 subcommand;
3565
3.85k
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3566
3567
3.85k
    ps_ctl_ip = (ivd_ctl_set_config_ip_t *)pv_api_ip;
3568
3.85k
    ps_ctl_op = (ivd_ctl_set_config_op_t *)pv_api_op;
3569
3570
3.85k
    if(ps_codec->i4_init_done != 1)
3571
0
    {
3572
0
        ps_ctl_op->u4_error_code |= 1 << IVD_FATALERROR;
3573
0
        ps_ctl_op->u4_error_code |= IHEVCD_INIT_NOT_DONE;
3574
0
        return IV_FAIL;
3575
0
    }
3576
3.85k
    subcommand = ps_ctl_ip->e_sub_cmd;
3577
3578
3.85k
    switch(subcommand)
3579
3.85k
    {
3580
0
        case IVD_CMD_CTL_GETPARAMS:
3581
0
            ret = ihevcd_get_status(ps_codec_obj, (void *)pv_api_ip,
3582
0
                                    (void *)pv_api_op);
3583
0
            break;
3584
1.10k
        case IVD_CMD_CTL_SETPARAMS:
3585
1.10k
            ret = ihevcd_set_params(ps_codec_obj, (void *)pv_api_ip,
3586
1.10k
                                    (void *)pv_api_op);
3587
1.10k
            break;
3588
1.64k
        case IVD_CMD_CTL_RESET:
3589
1.64k
            ret = ihevcd_reset(ps_codec_obj, (void *)pv_api_ip,
3590
1.64k
                               (void *)pv_api_op);
3591
1.64k
            break;
3592
0
        case IVD_CMD_CTL_SETDEFAULT:
3593
0
        {
3594
0
            ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
3595
0
                            (ivd_ctl_set_config_op_t *)pv_api_op;
3596
3597
0
            ret = ihevcd_set_default_params(ps_codec);
3598
0
            if(IV_SUCCESS == ret)
3599
0
                s_ctl_dynparams_op->u4_error_code = 0;
3600
0
            break;
3601
0
        }
3602
0
        case IVD_CMD_CTL_FLUSH:
3603
0
            ret = ihevcd_set_flush_mode(ps_codec_obj, (void *)pv_api_ip,
3604
0
                                        (void *)pv_api_op);
3605
0
            break;
3606
0
        case IVD_CMD_CTL_GETBUFINFO:
3607
0
            ret = ihevcd_get_buf_info(ps_codec_obj, (void *)pv_api_ip,
3608
0
                                      (void *)pv_api_op);
3609
0
            break;
3610
0
        case IVD_CMD_CTL_GETVERSION:
3611
0
        {
3612
0
            ivd_ctl_getversioninfo_ip_t *ps_ip;
3613
0
            ivd_ctl_getversioninfo_op_t *ps_op;
3614
0
            IV_API_CALL_STATUS_T ret;
3615
0
            ps_ip = (ivd_ctl_getversioninfo_ip_t *)pv_api_ip;
3616
0
            ps_op = (ivd_ctl_getversioninfo_op_t *)pv_api_op;
3617
3618
0
            ps_op->u4_error_code = IV_SUCCESS;
3619
3620
0
            if((WORD32)ps_ip->u4_version_buffer_size <= 0)
3621
0
            {
3622
0
                ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3623
0
                ret = IV_FAIL;
3624
0
            }
3625
0
            else
3626
0
            {
3627
0
                ret = ihevcd_get_version((CHAR *)ps_ip->pv_version_buffer,
3628
0
                                         ps_ip->u4_version_buffer_size);
3629
0
                if(ret != IV_SUCCESS)
3630
0
                {
3631
0
                    ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3632
0
                    ret = IV_FAIL;
3633
0
                }
3634
0
            }
3635
0
        }
3636
0
            break;
3637
0
        case IHEVCD_CXA_CMD_CTL_DEGRADE:
3638
0
            ret = ihevcd_set_degrade(ps_codec_obj, (void *)pv_api_ip,
3639
0
                            (void *)pv_api_op);
3640
0
            break;
3641
552
        case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
3642
552
            ret = ihevcd_set_num_cores(ps_codec_obj, (void *)pv_api_ip,
3643
552
                                       (void *)pv_api_op);
3644
552
            break;
3645
0
        case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
3646
0
            ret = ihevcd_get_frame_dimensions(ps_codec_obj, (void *)pv_api_ip,
3647
0
                                              (void *)pv_api_op);
3648
0
            break;
3649
0
        case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
3650
0
            ret = ihevcd_get_vui_params(ps_codec_obj, (void *)pv_api_ip,
3651
0
                                        (void *)pv_api_op);
3652
0
            break;
3653
0
        case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
3654
0
#ifndef DISABLE_SEI
3655
0
            ret = ihevcd_get_sei_mastering_params(ps_codec_obj, (void *)pv_api_ip,
3656
0
                                        (void *)pv_api_op);
3657
#else
3658
            {
3659
                ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op =
3660
                        (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
3661
                ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3662
                return IV_FAIL;
3663
            }
3664
#endif
3665
0
            break;
3666
552
        case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
3667
552
            ret = ihevcd_set_processor(ps_codec_obj, (void *)pv_api_ip,
3668
552
                            (void *)pv_api_op);
3669
552
            break;
3670
0
        default:
3671
0
            DEBUG("\nDo nothing\n");
3672
0
            break;
3673
3.85k
    }
3674
3675
3.85k
    return ret;
3676
3.85k
}
3677
3678
/**
3679
*******************************************************************************
3680
*
3681
* @brief
3682
*  Codecs entry point function. All the function calls to  the codec are
3683
* done using this function with different  values specified in command
3684
*
3685
* @par Description:
3686
*  Arguments are tested for validity and then based on the  command
3687
* appropriate function is called
3688
*
3689
* @param[in] ps_handle
3690
*  API level handle for codec
3691
*
3692
* @param[in] pv_api_ip
3693
*  Input argument structure
3694
*
3695
* @param[out] pv_api_op
3696
*  Output argument structure
3697
*
3698
* @returns  Status of the function corresponding to command
3699
*
3700
* @remarks
3701
*
3702
*
3703
*******************************************************************************
3704
*/
3705
IV_API_CALL_STATUS_T ihevcd_cxa_api_function(iv_obj_t *ps_handle,
3706
                                             void *pv_api_ip,
3707
                                             void *pv_api_op)
3708
48.0k
{
3709
48.0k
    WORD32 command;
3710
48.0k
    UWORD32 *pu4_ptr_cmd;
3711
48.0k
    WORD32 ret = 0;
3712
48.0k
    IV_API_CALL_STATUS_T e_status;
3713
48.0k
    e_status = api_check_struct_sanity(ps_handle, pv_api_ip, pv_api_op);
3714
3715
48.0k
    if(e_status != IV_SUCCESS)
3716
618
    {
3717
618
        DEBUG("error code = %d\n", *((UWORD32 *)pv_api_op + 1));
3718
618
        return IV_FAIL;
3719
618
    }
3720
3721
47.4k
    pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
3722
47.4k
    pu4_ptr_cmd++;
3723
3724
47.4k
    command = *pu4_ptr_cmd;
3725
3726
47.4k
    switch(command)
3727
47.4k
    {
3728
552
        case IVD_CMD_CREATE:
3729
552
            ret = ihevcd_create(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3730
552
            break;
3731
552
        case IVD_CMD_DELETE:
3732
552
            ret = ihevcd_delete(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3733
552
            break;
3734
3735
42.4k
        case IVD_CMD_VIDEO_DECODE:
3736
42.4k
            ret = ihevcd_decode(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3737
42.4k
            break;
3738
3739
0
        case IVD_CMD_GET_DISPLAY_FRAME:
3740
            //ret = ihevcd_get_display_frame(ps_handle,(void *)pv_api_ip,(void *)pv_api_op);
3741
0
            break;
3742
3743
0
        case IVD_CMD_SET_DISPLAY_FRAME:
3744
0
            ret = ihevcd_set_display_frame(ps_handle, (void *)pv_api_ip,
3745
0
                                           (void *)pv_api_op);
3746
3747
0
            break;
3748
3749
0
        case IVD_CMD_REL_DISPLAY_FRAME:
3750
0
            ret = ihevcd_rel_display_frame(ps_handle, (void *)pv_api_ip,
3751
0
                                           (void *)pv_api_op);
3752
0
            break;
3753
3754
3.85k
        case IVD_CMD_VIDEO_CTL:
3755
3.85k
            ret = ihevcd_ctl(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3756
3.85k
            break;
3757
0
        default:
3758
0
            ret = IV_FAIL;
3759
0
            break;
3760
47.4k
    }
3761
3762
47.4k
    return (IV_API_CALL_STATUS_T)ret;
3763
47.4k
}
3764