Coverage Report

Created: 2025-07-18 07:02

/src/libhevc/decoder/ihevcd_get_mv.c
Line
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Source
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/******************************************************************************
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*
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* Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
17
******************************************************************************/
18
/**
19
 *******************************************************************************
20
 * @file
21
 *  ihevcd_get_mv.c
22
 *
23
 * @brief
24
 *  Contains functions to compute motion vectors
25
 *
26
 * @author
27
 *  Ittiam
28
 *
29
 * @par List of Functions:
30
 * - ihevcd_get_mv_ctb()
31
 *
32
 * @remarks
33
 *  None
34
 *
35
 *******************************************************************************
36
 */
37
/*****************************************************************************/
38
/* File Includes                                                             */
39
/*****************************************************************************/
40
41
#include <stdio.h>
42
#include <stddef.h>
43
#include <stdlib.h>
44
#include <string.h>
45
46
#include "ihevc_typedefs.h"
47
#include "iv.h"
48
#include "ivd.h"
49
#include "ihevcd_cxa.h"
50
#include "ithread.h"
51
52
#include "ihevc_defs.h"
53
#include "ihevc_debug.h"
54
#include "ihevc_structs.h"
55
#include "ihevc_macros.h"
56
#include "ihevc_platform_macros.h"
57
#include "ihevc_cabac_tables.h"
58
#include "ihevc_disp_mgr.h"
59
#include "ihevc_buf_mgr.h"
60
#include "ihevc_dpb_mgr.h"
61
62
#include "ihevcd_defs.h"
63
#include "ihevcd_function_selector.h"
64
#include "ihevcd_structs.h"
65
#include "ihevcd_error.h"
66
#include "ihevcd_nal.h"
67
#include "ihevcd_bitstream.h"
68
#include "ihevcd_fmt_conv.h"
69
#include "ihevcd_job_queue.h"
70
#include "ihevcd_debug.h"
71
#include "ihevcd_mv_merge.h"
72
#include "ihevcd_mv_pred.h"
73
#include "ihevcd_profile.h"
74
/**
75
 *******************************************************************************
76
 *
77
 * @brief
78
 * This function computes and stores MV's of all the PU's in CTB
79
 *
80
 * @par Description:
81
 * MV's of a PU will be stored in PU structure. MV computation can be merge or mv pred
82
 *
83
 * @param[in] ps_proc
84
 * processor context
85
 *
86
 * @param[in] pi4_ctb_top_pu_idx
87
 * Pointer to ctb top PU indices
88
 *
89
 * @param[in] pi4_ctb_left_pu_idx
90
 * Pointer to ctb left PU indices
91
 *
92
 * @param[in] pi4_ctb_top_left_pu_idx
93
 * Pointer to ctb top left PU indices
94
 *
95
 * @returns
96
 * number of PU's per ctb
97
 *
98
 * @remarks
99
 *
100
 *
101
 *******************************************************************************
102
 */
103
104
WORD32 ihevcd_get_mv_ctb(mv_ctxt_t *ps_mv_ctxt,
105
                         UWORD32 *pu4_ctb_top_pu_idx,
106
                         UWORD32 *pu4_ctb_left_pu_idx,
107
                         UWORD32 *pu4_ctb_top_left_pu_idx)
108
1.04M
{
109
110
1.04M
    WORD32 i;
111
1.04M
    sps_t *ps_sps;
112
1.04M
    pps_t *ps_pps;
113
1.04M
    pu_t *ps_pu;
114
1.04M
    tile_t *ps_tile;
115
1.04M
    UWORD8 *pu1_pic_pu_map_ctb;
116
1.04M
    WORD32 num_minpu_in_ctb;
117
1.04M
    WORD32 ctb_start_pu_idx;
118
1.04M
    UWORD32 *pu4_top_pu_idx, *pu4_left_pu_idx, *pu4_top_left_pu_idx;
119
1.04M
    WORD32 pu_x_in_4x4, pu_y_in_4x4;
120
1.04M
    WORD32 pu_x_in_4x4_single_mcl, pu_y_in_4x4_single_mcl;
121
1.04M
    pu_mv_t s_pred_mv;
122
1.04M
    WORD32 ctb_size, ctb_size_in_min_pu;
123
1.04M
    WORD32 num_pu_per_ctb, pu_wd, pu_ht, pu_cnt;
124
1.04M
    WORD32  pu_wd_single_mcl, pu_ht_single_mcl;
125
1.04M
    UWORD32 au4_nbr_avail[MAX_CTB_SIZE / MIN_PU_SIZE
126
1.04M
                    + 2 /* Top nbr + bot nbr */];
127
1.04M
    UWORD32 *pu4_nbr_pu_idx/* (Left + ctb_size + right ) * (top + ctb_size + bottom) */;
128
1.04M
    WORD32 top_avail_bits;
129
1.04M
    UWORD8 u1_lb_avail, u1_l_avail, u1_t_avail, u1_tr_avail, u1_tl_avail;
130
1.04M
    WORD32 nbr_pu_idx_strd;
131
1.04M
    WORD32 cb_size;
132
1.04M
    WORD32 single_mcl_flag;
133
134
1.04M
    PROFILE_DISABLE_MV_PREDICTION();
135
1.04M
    ps_sps = ps_mv_ctxt->ps_sps;
136
1.04M
    ps_pps = ps_mv_ctxt->ps_pps;
137
1.04M
    ps_pu = ps_mv_ctxt->ps_pu;
138
1.04M
    ps_tile = ps_mv_ctxt->ps_tile;
139
140
1.04M
    pu4_nbr_pu_idx = ps_mv_ctxt->pu4_pic_pu_idx_map;
141
142
1.04M
    ctb_size = (1 << ps_sps->i1_log2_ctb_size);
143
144
1.04M
    ctb_size_in_min_pu = (ctb_size / MIN_PU_SIZE);
145
146
1.04M
    num_minpu_in_ctb = ctb_size_in_min_pu * ctb_size_in_min_pu;
147
1.04M
    pu1_pic_pu_map_ctb = ps_mv_ctxt->pu1_pic_pu_map + (ps_mv_ctxt->i4_ctb_x + ps_mv_ctxt->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb) * num_minpu_in_ctb;
148
149
1.04M
    num_pu_per_ctb = ps_mv_ctxt->i4_ctb_pu_cnt;
150
1.04M
    ctb_start_pu_idx = ps_mv_ctxt->i4_ctb_start_pu_idx;
151
1.04M
    nbr_pu_idx_strd = MAX_CTB_SIZE / MIN_PU_SIZE + 2;
152
153
1.04M
    {
154
        /* Updating the initial availability map */
155
1.04M
        WORD32 i;
156
1.04M
        UWORD32 u4_left_ctb_avail, u4_top_lt_ctb_avail, u4_top_rt_ctb_avail,
157
1.04M
                        u4_top_ctb_avail;
158
159
1.04M
        u4_left_ctb_avail = ps_mv_ctxt->u1_left_ctb_avail;
160
1.04M
        u4_top_lt_ctb_avail = ps_mv_ctxt->u1_top_lt_ctb_avail;
161
1.04M
        u4_top_ctb_avail = ps_mv_ctxt->u1_top_ctb_avail;
162
1.04M
        u4_top_rt_ctb_avail = ps_mv_ctxt->u1_top_rt_ctb_avail;
163
164
        /* Initializing the availability array */
165
1.04M
        memset(au4_nbr_avail, 0,
166
1.04M
               (MAX_CTB_SIZE / MIN_PU_SIZE + 2) * sizeof(UWORD32));
167
        /* Initializing the availability array with CTB level availability flags */
168
1.04M
        {
169
1.04M
            WORD32 rows_remaining = ps_sps->i2_pic_height_in_luma_samples
170
1.04M
                            - (ps_mv_ctxt->i4_ctb_y << ps_sps->i1_log2_ctb_size);
171
1.04M
            WORD32 ctb_size_left = MIN(ctb_size, rows_remaining);
172
13.3M
            for(i = 0; i < ctb_size_left / MIN_PU_SIZE; i++)
173
12.2M
            {
174
12.2M
                au4_nbr_avail[i + 1] = (u4_left_ctb_avail << 31);
175
12.2M
            }
176
1.04M
        }
177
1.04M
        au4_nbr_avail[0] |= ((u4_top_rt_ctb_avail << 31)
178
1.04M
                        >> (1 + ctb_size_in_min_pu)); /* 1+ctb_size/4 position bit pos from msb */
179
180
1.04M
        au4_nbr_avail[0] |= (u4_top_lt_ctb_avail << 31);
181
1.04M
        {
182
1.04M
            WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples
183
1.04M
                            - (ps_mv_ctxt->i4_ctb_x << ps_sps->i1_log2_ctb_size);
184
1.04M
            WORD32 ctb_size_top = MIN(ctb_size, cols_remaining);
185
1.04M
            WORD32 shift = (31 - (ctb_size / MIN_TU_SIZE));
186
187
            /* ctb_size_top gives number of valid pixels remaining in the current row */
188
            /* Since we need pattern of 1's starting from the MSB, an additional shift */
189
            /* is needed */
190
1.04M
            shift += ((ctb_size - ctb_size_top) / MIN_TU_SIZE);
191
192
1.04M
            top_avail_bits = ((1 << (ctb_size_top / MIN_PU_SIZE)) - 1) << shift;
193
1.04M
        }
194
195
1.04M
        au4_nbr_avail[0] |= ((u4_top_ctb_avail == 1) ? top_avail_bits : 0x0);
196
        /* Starting from msb 2nd bit to (1+ctb_size/4) bit, set 1 if top avail,or 0 */
197
198
1.04M
    }
199
200
1.04M
    {
201
        /* In case of a  tile boundary, left and top arrays must change*/
202
        /*Left*/
203
        /* If start of tile row*/
204
1.04M
        if(((ps_tile->u1_pos_x) == (ps_mv_ctxt->i4_ctb_x)) && (ps_mv_ctxt->i4_ctb_x != 0))
205
24.7k
        {
206
24.7k
            WORD32 index_pic_map;
207
24.7k
            WORD32 ctb_pu_idx;
208
24.7k
            UWORD8 *pu1_pic_pu_map;
209
210
            /* Goto the left ctb which belongs to another tile */
211
24.7k
            index_pic_map = ((ps_mv_ctxt->i4_ctb_x - 1) + ps_mv_ctxt->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb);
212
24.7k
            ctb_pu_idx = ps_mv_ctxt->pu4_pic_pu_idx[index_pic_map];
213
24.7k
            index_pic_map *= num_minpu_in_ctb;
214
215
            /*Replicate the PUs of the last column of the left ctb*/
216
24.7k
            pu1_pic_pu_map = ps_mv_ctxt->pu1_pic_pu_map + index_pic_map + ctb_size_in_min_pu - 1;
217
247k
            for(i = 0; i < ctb_size_in_min_pu; i++)
218
222k
            {
219
                /* Left neighbors change*/
220
222k
                pu4_ctb_left_pu_idx[i] = ctb_pu_idx + (WORD32)*pu1_pic_pu_map;
221
222k
                pu1_pic_pu_map = pu1_pic_pu_map + ctb_size_in_min_pu;
222
222k
            }
223
224
225
24.7k
            index_pic_map = ((ps_mv_ctxt->i4_ctb_x - 1) + (ps_mv_ctxt->i4_ctb_y - 1) * ps_sps->i2_pic_wd_in_ctb);
226
24.7k
            ctb_pu_idx = ps_mv_ctxt->pu4_pic_pu_idx[index_pic_map];
227
24.7k
            index_pic_map *= num_minpu_in_ctb;
228
24.7k
            index_pic_map += (num_minpu_in_ctb - 1);
229
24.7k
            pu4_ctb_top_left_pu_idx[0] = ctb_pu_idx + pu1_pic_pu_map[index_pic_map];
230
24.7k
        }
231
        /*Top*/
232
        /* If start of tile column*/
233
1.04M
        if(((ps_tile->u1_pos_y) == (ps_mv_ctxt->i4_ctb_y)) && (ps_mv_ctxt->i4_ctb_y != 0))
234
44.4k
        {
235
44.4k
            WORD32 index_pic_map;
236
44.4k
            WORD32 ctb_pu_idx;
237
44.4k
            UWORD8 *pu1_pic_pu_map;
238
239
            /* Goto the top ctb which belongs to another tile */
240
44.4k
            index_pic_map =  (ps_mv_ctxt->i4_ctb_x) + ((ps_mv_ctxt->i4_ctb_y - 1) * ps_sps->i2_pic_wd_in_ctb);
241
44.4k
            ctb_pu_idx = ps_mv_ctxt->pu4_pic_pu_idx[index_pic_map];
242
44.4k
            index_pic_map *= num_minpu_in_ctb;
243
244
            /*Replicate the PUs of the last row of the top ctb*/
245
44.4k
            pu1_pic_pu_map = ps_mv_ctxt->pu1_pic_pu_map + index_pic_map + (ctb_size_in_min_pu * (ctb_size_in_min_pu - 1));
246
508k
            for(i = 0; i < ctb_size_in_min_pu; i++)
247
463k
            {
248
                /* Top neighbors change*/
249
463k
                pu4_ctb_top_pu_idx[i] = ctb_pu_idx + (WORD32)*pu1_pic_pu_map;
250
463k
                pu1_pic_pu_map++;
251
463k
            }
252
44.4k
        }
253
254
        /* Updating the initial neighbor pu idx map */
255
        /* Initializing the availability array with CTB level availability flags */
256
        /* 16x16 array for holding pu info of the ctb, wrt the frame pu count*/
257
13.8M
        for(i = 0; i < ctb_size_in_min_pu; i++)
258
12.8M
        {
259
            /* Left */
260
12.8M
            pu4_nbr_pu_idx[(i + 1) * nbr_pu_idx_strd] = pu4_ctb_left_pu_idx[i];
261
            /* Top */
262
12.8M
            pu4_nbr_pu_idx[i + 1] = pu4_ctb_top_pu_idx[i];
263
12.8M
        }
264
        /* Top right */
265
1.04M
        pu4_nbr_pu_idx[1 + ctb_size_in_min_pu] = pu4_ctb_top_pu_idx[ctb_size_in_min_pu];
266
267
        /* Top left */
268
1.04M
        pu4_nbr_pu_idx[0] = pu4_ctb_top_left_pu_idx[0];
269
270
1.04M
    }
271
272
    /* CTB level MV pred */
273
19.0M
    for(pu_cnt = 0; pu_cnt < num_pu_per_ctb; pu_cnt++, ps_pu++)
274
17.9M
    {
275
17.9M
        pu_ht = (ps_pu->b4_ht + 1) << 2;
276
17.9M
        pu_wd = (ps_pu->b4_wd + 1) << 2;
277
278
17.9M
        pu_ht_single_mcl = pu_ht;
279
17.9M
        pu_wd_single_mcl = pu_wd;
280
281
17.9M
        pu_x_in_4x4 = ps_pu->b4_pos_x;
282
17.9M
        pu_y_in_4x4 = ps_pu->b4_pos_y;
283
284
17.9M
        pu_x_in_4x4_single_mcl = pu_x_in_4x4;
285
17.9M
        pu_y_in_4x4_single_mcl = pu_y_in_4x4;
286
287
        /*******************************************/
288
        /* Neighbor location: Graphical indication */
289
        /*                                         */
290
        /*          B2 _____________B1 B0          */
291
        /*            |               |            */
292
        /*            |               |            */
293
        /*            |               |            */
294
        /*            |      PU     ht|            */
295
        /*            |               |            */
296
        /*            |               |            */
297
        /*          A1|______wd_______|            */
298
        /*          A0                             */
299
        /*                                         */
300
        /*******************************************/
301
        /* Below code is for merge mode, where if single_mcl_flag == 1,
302
         * all the prediction units of the current coding unit share a
303
         * single merge candidate list, which is identical to the
304
         * merge candidate list of the 2Nx2N prediction unit.
305
         */
306
17.9M
        single_mcl_flag = 0;
307
17.9M
        if(1 == ps_pu->b1_merge_flag)
308
17.0M
        {
309
17.0M
            cb_size = MAX(pu_wd_single_mcl, pu_ht_single_mcl);
310
17.0M
            cb_size = MAX(cb_size,
311
17.0M
                          (1 << ps_sps->i1_log2_min_coding_block_size));
312
17.0M
            if((ps_pps->i1_log2_parallel_merge_level > 2) && cb_size == 8 && (pu_wd_single_mcl != pu_ht_single_mcl))
313
1.61k
            {
314
1.61k
                single_mcl_flag = 1;
315
1.61k
                if((PART_Nx2N == ps_pu->b3_part_mode) && (1 == ps_pu->b2_part_idx))
316
418
                {
317
418
                    pu_x_in_4x4_single_mcl = pu_x_in_4x4_single_mcl - 1;
318
418
                }
319
1.19k
                else if((PART_2NxN == ps_pu->b3_part_mode) && (1 == ps_pu->b2_part_idx))
320
377
                {
321
377
                    pu_y_in_4x4_single_mcl = pu_y_in_4x4_single_mcl - 1;
322
377
                }
323
1.61k
                pu_ht_single_mcl = 8;
324
1.61k
                pu_wd_single_mcl = 8;
325
1.61k
            }
326
17.0M
        }
327
17.9M
        pu4_top_pu_idx = &pu4_nbr_pu_idx[(1 + pu_x_in_4x4_single_mcl)
328
17.9M
                        + (1 + pu_y_in_4x4_single_mcl - 1) * nbr_pu_idx_strd];
329
17.9M
        pu4_top_left_pu_idx = pu4_top_pu_idx - 1;
330
17.9M
        pu4_left_pu_idx = pu4_top_pu_idx - 1 + nbr_pu_idx_strd;
331
332
        /* Get neibhbor availability */
333
17.9M
        {
334
17.9M
            u1_lb_avail = (au4_nbr_avail[1 + pu_y_in_4x4_single_mcl + pu_ht_single_mcl / MIN_PU_SIZE]
335
17.9M
                            >> (31 - (1 + pu_x_in_4x4_single_mcl - 1))) & 1;
336
17.9M
            u1_l_avail = (au4_nbr_avail[1 + pu_y_in_4x4_single_mcl]
337
17.9M
                            >> (31 - (1 + pu_x_in_4x4_single_mcl - 1))) & 1;
338
17.9M
            u1_t_avail = (au4_nbr_avail[1 + pu_y_in_4x4_single_mcl - 1]
339
17.9M
                            >> (31 - (1 + pu_x_in_4x4_single_mcl))) & 1;
340
17.9M
            u1_tr_avail = (au4_nbr_avail[1 + pu_y_in_4x4_single_mcl - 1]
341
17.9M
                            >> (31 - (1 + pu_x_in_4x4_single_mcl + pu_wd_single_mcl / MIN_PU_SIZE)))
342
17.9M
                            & 1;
343
17.9M
            u1_tl_avail = (au4_nbr_avail[1 + pu_y_in_4x4_single_mcl - 1]
344
17.9M
                            >> (31 - (1 + pu_x_in_4x4_single_mcl - 1))) & 1;
345
17.9M
        }
346
17.9M
        if(ps_pu->b1_intra_flag == 0)
347
17.8M
        {
348
17.8M
            if(ps_pu->b1_merge_flag == 0)
349
828k
            {
350
828k
                WORD32 pred_flag_l0, pred_flag_l1;
351
828k
                WORD32 tmp_x, tmp_y, mvd_x, mvd_y, mvp_x, mvp_y;
352
828k
                WORD32 two_pow_16, two_pow_15;
353
354
828k
                ihevcd_mv_pred(ps_mv_ctxt, pu4_top_pu_idx, pu4_left_pu_idx,
355
828k
                               pu4_top_left_pu_idx, nbr_pu_idx_strd,
356
828k
                               ps_pu, u1_lb_avail, u1_l_avail,
357
828k
                               u1_tr_avail, u1_t_avail, u1_tl_avail,
358
828k
                               &s_pred_mv);
359
360
828k
                pred_flag_l0 = (ps_pu->b2_pred_mode != PRED_L1);
361
828k
                pred_flag_l1 = (ps_pu->b2_pred_mode != PRED_L0);
362
363
828k
                two_pow_16 = (1 << 16);
364
828k
                two_pow_15 = (1 << 15);
365
366
                /* L0 MV */
367
828k
                if(pred_flag_l0)
368
689k
                {
369
689k
                    mvp_x = s_pred_mv.s_l0_mv.i2_mvx;
370
689k
                    mvp_y = s_pred_mv.s_l0_mv.i2_mvy;
371
689k
                    mvd_x = ps_pu->mv.s_l0_mv.i2_mvx;
372
689k
                    mvd_y = ps_pu->mv.s_l0_mv.i2_mvy;
373
374
689k
                    tmp_x = (mvp_x + mvd_x + two_pow_16) & (two_pow_16 - 1);
375
689k
                    tmp_x = tmp_x >= two_pow_15 ?
376
414k
                                    (tmp_x - two_pow_16) : tmp_x;
377
689k
                    ps_pu->mv.s_l0_mv.i2_mvx = tmp_x;
378
689k
                    tmp_y = (mvp_y + mvd_y + two_pow_16) & (two_pow_16 - 1);
379
689k
                    tmp_y = tmp_y >= two_pow_15 ?
380
423k
                                    (tmp_y - two_pow_16) : tmp_y;
381
689k
                    ps_pu->mv.s_l0_mv.i2_mvy = tmp_y;
382
689k
                }
383
                /* L1 MV */
384
828k
                if(pred_flag_l1)
385
271k
                {
386
271k
                    mvp_x = s_pred_mv.s_l1_mv.i2_mvx;
387
271k
                    mvp_y = s_pred_mv.s_l1_mv.i2_mvy;
388
271k
                    mvd_x = ps_pu->mv.s_l1_mv.i2_mvx;
389
271k
                    mvd_y = ps_pu->mv.s_l1_mv.i2_mvy;
390
391
271k
                    tmp_x = (mvp_x + mvd_x + two_pow_16) & (two_pow_16 - 1);
392
271k
                    tmp_x = tmp_x >= two_pow_15 ?
393
171k
                                    (tmp_x - two_pow_16) : tmp_x;
394
271k
                    ps_pu->mv.s_l1_mv.i2_mvx = tmp_x;
395
271k
                    tmp_y = (mvp_y + mvd_y + two_pow_16) & (two_pow_16 - 1);
396
271k
                    tmp_y = tmp_y >= two_pow_15 ?
397
176k
                                    (tmp_y - two_pow_16) : tmp_y;
398
271k
                    ps_pu->mv.s_l1_mv.i2_mvy = tmp_y;
399
271k
                }
400
828k
            }
401
17.0M
            else
402
17.0M
            {
403
17.0M
                WORD32 part_mode;
404
17.0M
                WORD32 part_idx;
405
17.0M
                part_mode = ps_pu->b3_part_mode;
406
                //TODO: Get part_idx
407
17.0M
                part_idx = ps_pu->b2_part_idx;
408
409
17.0M
                ihevcd_mv_merge(ps_mv_ctxt, pu4_top_pu_idx, pu4_left_pu_idx,
410
17.0M
                                nbr_pu_idx_strd, ps_pu, part_mode,
411
17.0M
                                part_idx, pu_wd_single_mcl, pu_ht_single_mcl,
412
17.0M
                                pu_x_in_4x4_single_mcl << 2, pu_y_in_4x4_single_mcl << 2,
413
17.0M
                                single_mcl_flag, u1_lb_avail, u1_l_avail, u1_tr_avail,
414
17.0M
                                u1_t_avail, u1_tl_avail);
415
416
17.0M
                if(PRED_BI == ps_pu->b2_pred_mode)
417
8.09M
                {
418
8.09M
                    if(((ps_pu->b3_part_mode == PART_2NxN) && (pu_wd == 8))
419
8.09M
                                    || ((ps_pu->b3_part_mode == PART_Nx2N)
420
8.02M
                                                    && (pu_ht == 8)))
421
148k
                    {
422
148k
                        ps_pu->b2_pred_mode = PRED_L0;
423
148k
                    }
424
8.09M
                }
425
17.0M
            }
426
17.8M
        }
427
428
17.9M
        {
429
17.9M
            slice_header_t *ps_slice_hdr;
430
17.9M
            pic_buf_t *ps_pic_buf_l0, *ps_pic_buf_l1;
431
17.9M
            ps_slice_hdr = ps_mv_ctxt->ps_slice_hdr;
432
17.9M
            ps_pic_buf_l0 = (pic_buf_t *)((ps_slice_hdr->as_ref_pic_list0[ps_pu->mv.i1_l0_ref_idx].pv_pic_buf));
433
17.9M
            ps_pic_buf_l1 = (pic_buf_t *)((ps_slice_hdr->as_ref_pic_list1[ps_pu->mv.i1_l1_ref_idx].pv_pic_buf));
434
17.9M
            ps_pu->mv.i1_l0_ref_pic_buf_id = ps_pic_buf_l0->u1_buf_id;
435
17.9M
            if(BSLICE == ps_slice_hdr->i1_slice_type)
436
10.6M
            {
437
10.6M
                ps_pu->mv.i1_l1_ref_pic_buf_id = ps_pic_buf_l1->u1_buf_id;
438
10.6M
            }
439
17.9M
        }
440
441
        /* Neighbor availability inside CTB */
442
        /* 1bit per 4x4. Indicates whether that 4x4 block has been reconstructed(avialable) */
443
        /* Used for neighbor availability in intra pred */
444
17.9M
        {
445
17.9M
            WORD32 trans_in_min_tu;
446
17.9M
            UWORD32 cur_tu_in_bits;
447
17.9M
            UWORD32 cur_tu_avail_flag;
448
449
17.9M
            trans_in_min_tu = pu_wd / MIN_PU_SIZE;
450
17.9M
            cur_tu_in_bits = (1 << trans_in_min_tu) - 1;
451
17.9M
            cur_tu_in_bits = cur_tu_in_bits << (32 - trans_in_min_tu);
452
453
17.9M
            cur_tu_avail_flag = cur_tu_in_bits >> (pu_x_in_4x4 + 1);
454
455
60.3M
            for(i = 0; i < pu_ht / MIN_PU_SIZE; i++)
456
42.3M
                au4_nbr_avail[1 + pu_y_in_4x4 + i] |= cur_tu_avail_flag;
457
17.9M
        }
458
459
        /* Neighbor PU idx update inside CTB */
460
        /* 1byte per 4x4. Indicates the PU idx that 4x4 block belongs to */
461
462
17.9M
        {
463
17.9M
            WORD32 row, col;
464
17.9M
            UWORD32 cur_pu_idx;
465
17.9M
            WORD32 offset;
466
17.9M
            cur_pu_idx = ctb_start_pu_idx + pu_cnt;
467
468
17.9M
            offset = (1 + pu_x_in_4x4 + 0) + (1 + pu_y_in_4x4 + 0) * nbr_pu_idx_strd;
469
470
60.2M
            for(row = 0; row < pu_ht / MIN_PU_SIZE; row++)
471
42.2M
            {
472
205M
                for(col = 0; col < pu_wd / MIN_PU_SIZE; col++)
473
163M
                {
474
163M
                    pu4_nbr_pu_idx[offset + col] = cur_pu_idx;
475
163M
                }
476
42.2M
                offset += nbr_pu_idx_strd;
477
42.2M
            }
478
17.9M
        }
479
480
17.9M
    }
481
482
    /* Updating Top and Left pointers */
483
1.04M
    {
484
1.04M
        WORD32 offset_top, offset_left;
485
486
1.04M
        offset_left = ctb_size_in_min_pu + (0 + 1) * nbr_pu_idx_strd;
487
1.04M
        offset_top = ctb_size_in_min_pu * nbr_pu_idx_strd + 0 + 1;
488
489
        /* Top Left */
490
        /* saving top left before updating top ptr, as updating top ptr will overwrite the top left for the next ctb */
491
1.04M
        pu4_ctb_top_left_pu_idx[0] = pu4_ctb_top_pu_idx[ctb_size_in_min_pu - 1];
492
493
13.7M
        for(i = 0; i < ctb_size_in_min_pu; i++)
494
12.7M
        {
495
            /* Left */
496
            /* Last column of au4_nbr_pu_idx */
497
12.7M
            pu4_ctb_left_pu_idx[i] = pu4_nbr_pu_idx[offset_left];
498
            /* Top */
499
            /* Last row of au4_nbr_pu_idx */
500
12.7M
            pu4_ctb_top_pu_idx[i] = pu4_nbr_pu_idx[offset_top];
501
502
12.7M
            offset_left += nbr_pu_idx_strd;
503
12.7M
            offset_top += 1;
504
12.7M
        }
505
1.04M
    }
506
507
    /* Updating the CTB level PU idx (Used for collocated MV pred)*/
508
1.04M
    {
509
1.04M
        WORD32 ctb_row, ctb_col, index_pic_map, index_nbr_map;
510
1.04M
        WORD32 first_pu_of_ctb;
511
1.04M
        first_pu_of_ctb = pu4_nbr_pu_idx[1 + nbr_pu_idx_strd];
512
1.04M
        UWORD32 cur_ctb_ht_in_min_pu = MIN(((ps_sps->i2_pic_height_in_luma_samples
513
1.04M
                    - (ps_mv_ctxt->i4_ctb_y << ps_sps->i1_log2_ctb_size)) / MIN_PU_SIZE), ctb_size_in_min_pu);
514
1.04M
        UWORD32 cur_ctb_wd_in_min_pu = MIN(((ps_sps->i2_pic_width_in_luma_samples
515
1.04M
                    - (ps_mv_ctxt->i4_ctb_x << ps_sps->i1_log2_ctb_size)) / MIN_PU_SIZE), ctb_size_in_min_pu);
516
517
1.04M
        index_pic_map = 0 * ctb_size_in_min_pu + 0;
518
1.04M
        index_nbr_map = (0 + 1) * nbr_pu_idx_strd + (0 + 1);
519
520
13.1M
        for(ctb_row = 0; ctb_row < cur_ctb_ht_in_min_pu; ctb_row++)
521
12.0M
        {
522
175M
            for(ctb_col = 0; ctb_col < cur_ctb_wd_in_min_pu; ctb_col++)
523
162M
            {
524
162M
                pu1_pic_pu_map_ctb[index_pic_map + ctb_col] = pu4_nbr_pu_idx[index_nbr_map + ctb_col]
525
162M
                                - first_pu_of_ctb;
526
162M
            }
527
12.0M
            index_pic_map += ctb_size_in_min_pu;
528
12.0M
            index_nbr_map += nbr_pu_idx_strd;
529
12.0M
        }
530
1.04M
    }
531
1.04M
    return num_pu_per_ctb;
532
1.04M
}