Coverage Report

Created: 2025-12-08 07:01

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/libhevc/decoder/ihevcd_process_slice.c
Line
Count
Source
1
/******************************************************************************
2
*
3
* Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4
*
5
* Licensed under the Apache License, Version 2.0 (the "License");
6
* you may not use this file except in compliance with the License.
7
* You may obtain a copy of the License at:
8
*
9
* http://www.apache.org/licenses/LICENSE-2.0
10
*
11
* Unless required by applicable law or agreed to in writing, software
12
* distributed under the License is distributed on an "AS IS" BASIS,
13
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
* See the License for the specific language governing permissions and
15
* limitations under the License.
16
*
17
******************************************************************************/
18
/**
19
 *******************************************************************************
20
 * @file
21
 *  ihevcd_process_slice.c
22
 *
23
 * @brief
24
 *  Contains functions for processing slice data
25
 *
26
 * @author
27
 *  Harish
28
 *
29
 * @par List of Functions:
30
 *
31
 * @remarks
32
 *  None
33
 *
34
 *******************************************************************************
35
 */
36
/*****************************************************************************/
37
/* File Includes                                                             */
38
/*****************************************************************************/
39
#include <stdio.h>
40
#include <stddef.h>
41
#include <stdlib.h>
42
#include <string.h>
43
#include <assert.h>
44
45
#include "ihevc_typedefs.h"
46
#include "iv.h"
47
#include "ivd.h"
48
#include "ihevcd_cxa.h"
49
#include "ithread.h"
50
51
#include "ihevc_defs.h"
52
#include "ihevc_debug.h"
53
#include "ihevc_defs.h"
54
#include "ihevc_structs.h"
55
#include "ihevc_macros.h"
56
#include "ihevc_platform_macros.h"
57
#include "ihevc_cabac_tables.h"
58
#include "ihevc_padding.h"
59
#include "ihevc_iquant_itrans_recon.h"
60
#include "ihevc_chroma_iquant_itrans_recon.h"
61
#include "ihevc_recon.h"
62
#include "ihevc_chroma_recon.h"
63
#include "ihevc_iquant_recon.h"
64
#include "ihevc_chroma_iquant_recon.h"
65
#include "ihevc_intra_pred.h"
66
67
#include "ihevc_error.h"
68
#include "ihevc_common_tables.h"
69
#include "ihevc_quant_tables.h"
70
#include "ihevcd_common_tables.h"
71
72
#include "ihevcd_profile.h"
73
#include "ihevcd_trace.h"
74
#include "ihevcd_defs.h"
75
#include "ihevcd_function_selector.h"
76
#include "ihevcd_structs.h"
77
#include "ihevcd_error.h"
78
#include "ihevcd_nal.h"
79
#include "ihevcd_bitstream.h"
80
#include "ihevcd_job_queue.h"
81
#include "ihevcd_utils.h"
82
#include "ihevcd_debug.h"
83
#include "ihevcd_get_mv.h"
84
#include "ihevcd_inter_pred.h"
85
#include "ihevcd_iquant_itrans_recon_ctb.h"
86
#include "ihevcd_boundary_strength.h"
87
#include "ihevcd_deblk.h"
88
#include "ihevcd_fmt_conv.h"
89
#include "ihevcd_sao.h"
90
#include "ihevcd_profile.h"
91
92
IHEVCD_ERROR_T ihevcd_fmt_conv(codec_t *ps_codec,
93
                               process_ctxt_t *ps_proc,
94
                               UWORD8 *pu1_y_dst,
95
                               UWORD8 *pu1_u_dst,
96
                               UWORD8 *pu1_v_dst,
97
                               WORD32 cur_row,
98
                               WORD32 num_rows);
99
100
typedef enum
101
{
102
    PROC_ALL,
103
    PROC_INTER_PRED,
104
    PROC_RECON,
105
    PROC_DEBLK,
106
    PROC_SAO
107
}proc_type_t;
108
109
void ihevcd_proc_map_check(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb)
110
21.5M
{
111
21.5M
    tile_t *ps_tile = ps_proc->ps_tile;
112
21.5M
    sps_t *ps_sps = ps_proc->ps_sps;
113
21.5M
    pps_t *ps_pps = ps_proc->ps_pps;
114
21.5M
    codec_t *ps_codec = ps_proc->ps_codec;
115
21.5M
    WORD32 idx;
116
21.5M
    WORD32 nop_cnt;
117
21.5M
    WORD32 bit_pos = proc_type;
118
21.5M
    WORD32 bit_mask = (1 << bit_pos);
119
120
21.5M
    if(ps_proc->i4_check_proc_status)
121
13.5M
    {
122
13.5M
        nop_cnt = PROC_NOP_CNT;
123
186M
        while(1)
124
186M
        {
125
186M
            volatile UWORD8 *pu1_buf;
126
186M
            volatile WORD32 status;
127
186M
            status = 1;
128
            /* Check if all dependencies for the next nCTBs are met */
129
186M
            {
130
186M
                WORD32 x_pos;
131
132
186M
                {
133
                    /* Check if the top right of next nCTBs are processed */
134
186M
                    if(ps_proc->i4_ctb_y > 0)
135
184M
                    {
136
184M
                        x_pos = (ps_proc->i4_ctb_tile_x + nctb);
137
184M
                        idx = MIN(x_pos, (ps_tile->u2_wd - 1));
138
139
                        /* Check if top-right CTB for the last CTB in nCTB is within the tile */
140
184M
                        {
141
184M
                            idx += ps_tile->u1_pos_x;
142
184M
                            idx += ((ps_proc->i4_ctb_y - 1)
143
184M
                                            * ps_sps->i2_pic_wd_in_ctb);
144
184M
                            pu1_buf = (ps_codec->pu1_proc_map + idx);
145
184M
                            status = *pu1_buf & bit_mask;
146
184M
                        }
147
184M
                    }
148
186M
                }
149
150
                /* If tiles are enabled, then test left and top-left as well */
151
186M
                ps_pps = ps_proc->ps_pps;
152
186M
                if(ps_pps->i1_tiles_enabled_flag)
153
10.8M
                {
154
                    /*Check if left ctb is processed*/
155
10.8M
                    if((ps_proc->i4_ctb_x > 0) && ((0 != status)))
156
4.28M
                    {
157
4.28M
                        x_pos   = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1;
158
4.28M
                        idx     = x_pos + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb);
159
4.28M
                        pu1_buf = (ps_codec->pu1_proc_map + idx);
160
4.28M
                        status  = *pu1_buf & bit_mask;
161
4.28M
                    }
162
163
                    /*Check if top left ctb is processed*/
164
10.8M
                    if((ps_proc->i4_ctb_x > 0) && (0 != status) && (ps_proc->i4_ctb_y > 0))
165
285k
                    {
166
285k
                        x_pos   = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1;
167
285k
                        idx     = x_pos + ((ps_proc->i4_ctb_y - 1) * ps_sps->i2_pic_wd_in_ctb);
168
285k
                        pu1_buf = (ps_codec->pu1_proc_map + idx);
169
285k
                        status  = *pu1_buf & bit_mask;
170
285k
                    }
171
10.8M
                }
172
186M
            }
173
174
186M
            if(status)
175
13.4M
                break;
176
177
            /* if dependencies are not met, then wait for few cycles.
178
             * Even after few iterations, if the dependencies are not met then yield
179
             */
180
172M
            if(nop_cnt > 0)
181
153M
            {
182
153M
                NOP(128);
183
153M
                nop_cnt -= 128;
184
153M
            }
185
18.8M
            else
186
18.8M
            {
187
18.8M
                nop_cnt = PROC_NOP_CNT;
188
18.8M
                ithread_yield();
189
                //NOP(128 * 16);
190
18.8M
            }
191
172M
        }
192
13.5M
        DATA_SYNC();
193
13.5M
    }
194
21.5M
}
195
196
void ihevcd_proc_map_update(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb)
197
26.9M
{
198
26.9M
    codec_t *ps_codec = ps_proc->ps_codec;
199
26.9M
    WORD32 i, idx;
200
26.9M
    WORD32 bit_pos = proc_type;
201
26.9M
    WORD32 bit_mask = (1 << bit_pos);
202
203
    /* Update the current CTBs processing status */
204
26.9M
    if(ps_proc->i4_check_proc_status)
205
16.8M
    {
206
16.8M
        DATA_SYNC();
207
33.8M
        for(i = 0; i < nctb; i++)
208
16.9M
        {
209
16.9M
            sps_t *ps_sps = ps_proc->ps_sps;
210
16.9M
            UWORD8 *pu1_buf;
211
16.9M
            idx = (ps_proc->i4_ctb_x + i);
212
16.9M
            idx += ((ps_proc->i4_ctb_y) * ps_sps->i2_pic_wd_in_ctb);
213
16.9M
            pu1_buf = (ps_codec->pu1_proc_map + idx);
214
16.9M
            *pu1_buf = *pu1_buf | bit_mask;
215
16.9M
        }
216
16.8M
    }
217
26.9M
}
218
219
220
void ihevcd_slice_hdr_update(process_ctxt_t *ps_proc)
221
21.5M
{
222
223
    /* Slice x and y are initialized in proc_init. But initialize slice x and y count here
224
     *  if a new slice begins at the middle of a row since proc_init is invoked only at the beginning of each row */
225
21.5M
    if(!((ps_proc->i4_ctb_x == 0) && (ps_proc->i4_ctb_y == 0)))
226
21.5M
    {
227
21.5M
        slice_header_t *ps_slice_hdr_next = ps_proc->ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx + 1) & (MAX_SLICE_HDR_CNT - 1));
228
229
21.5M
        if((ps_slice_hdr_next->i2_ctb_x == ps_proc->i4_ctb_x)
230
399k
                        && (ps_slice_hdr_next->i2_ctb_y == ps_proc->i4_ctb_y))
231
48.2k
        {
232
48.2k
            if(0 == ps_slice_hdr_next->i1_dependent_slice_flag)
233
40.1k
            {
234
40.1k
                ps_proc->i4_ctb_slice_x = 0;
235
40.1k
                ps_proc->i4_ctb_slice_y = 0;
236
40.1k
            }
237
238
48.2k
            ps_proc->i4_cur_slice_idx++;
239
48.2k
            ps_proc->ps_slice_hdr = ps_slice_hdr_next;
240
48.2k
        }
241
242
21.5M
    }
243
21.5M
}
244
245
void ihevcd_ctb_pos_update(process_ctxt_t *ps_proc, WORD32 nctb)
246
16.1M
{
247
16.1M
    WORD32 tile_start_ctb_idx, slice_start_ctb_idx;
248
16.1M
    slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr;
249
16.1M
    tile_t *ps_tile = ps_proc->ps_tile;
250
16.1M
    sps_t *ps_sps = ps_proc->ps_sps;
251
252
    /* Update x and y positions */
253
16.1M
    ps_proc->i4_ctb_tile_x += nctb;
254
16.1M
    ps_proc->i4_ctb_x += nctb;
255
256
16.1M
    ps_proc->i4_ctb_slice_x += nctb;
257
    /*If tile are enabled, then handle the tile & slice counters differently*/
258
16.1M
    if(ps_proc->ps_pps->i1_tiles_enabled_flag)
259
4.48M
    {
260
        /* Update slice counters*/
261
4.48M
        slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb);
262
4.48M
        tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
263
        /*
264
         * There can be 2 cases where slice counters must be handled differently.
265
         * 1 - Multiple tiles span across a single/one of the many slice.
266
         * 2 - Multiple slices span across a single/one of the many tiles.
267
         */
268
269
        /*Case 1 */
270
4.48M
        if(slice_start_ctb_idx < tile_start_ctb_idx)
271
3.92M
        {
272
            /*End of tile row*/
273
3.92M
            if(ps_proc->i4_ctb_x > ps_slice_hdr->i2_ctb_x)
274
3.76M
            {
275
3.76M
                if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd + ps_tile->u1_pos_x))
276
236k
                {
277
236k
                    ps_proc->i4_ctb_slice_y++;
278
236k
                    ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x
279
236k
                                    - ps_tile->u2_wd;
280
236k
                }
281
3.76M
            }
282
157k
            else
283
157k
            {
284
157k
                WORD32 temp_stride = (ps_sps->i2_pic_wd_in_ctb - ps_slice_hdr->i2_ctb_x);
285
157k
                if(ps_proc->i4_ctb_slice_x >= (temp_stride + ps_tile->u2_wd + ps_tile->u1_pos_x))
286
9.75k
                {
287
9.75k
                    ps_proc->i4_ctb_slice_y++;
288
9.75k
                    ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x
289
9.75k
                                    - ps_tile->u2_wd;
290
9.75k
                }
291
157k
            }
292
3.92M
        }
293
        /*Case 2*/
294
565k
        else if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd))
295
74.2k
        {
296
            /*End of tile row*/
297
74.2k
            ps_proc->i4_ctb_slice_y++;
298
74.2k
            ps_proc->i4_ctb_slice_x = 0;
299
74.2k
        }
300
4.48M
    }
301
11.6M
    else
302
11.6M
    {
303
11.6M
        if(ps_proc->i4_ctb_slice_x >= ps_tile->u2_wd)
304
396k
        {
305
396k
            ps_proc->i4_ctb_slice_y++;
306
396k
            ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x
307
396k
                            - ps_tile->u2_wd;
308
396k
        }
309
11.6M
    }
310
16.1M
}
311
312
void ihevcd_ctb_avail_update(process_ctxt_t *ps_proc)
313
10.7M
{
314
10.7M
    slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr;
315
10.7M
    sps_t *ps_sps = ps_proc->ps_sps;
316
10.7M
    tile_t *ps_tile_prev;
317
10.7M
    tile_t *ps_tile = ps_proc->ps_tile;
318
10.7M
    WORD32 cur_pu_idx;
319
10.7M
    WORD32 tile_start_ctb_idx, slice_start_ctb_idx;
320
10.7M
    WORD16 i2_wd_in_ctb;
321
10.7M
    WORD32 continuous_tiles = 0;
322
10.7M
    WORD32 cur_ctb_idx;
323
10.7M
    WORD32 check_tile_wd;
324
325
10.7M
    if((0 != ps_tile->u1_pos_x) && (0 != ps_tile->u1_pos_y))
326
2.24M
    {
327
2.24M
        ps_tile_prev = ps_tile - 1;
328
2.24M
    }
329
8.53M
    else
330
8.53M
    {
331
8.53M
        ps_tile_prev = ps_tile;
332
8.53M
    }
333
334
335
10.7M
    check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd;
336
10.7M
    if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x))
337
3.18M
                                    || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x))))
338
2.82M
    {
339
2.82M
        continuous_tiles = 1;
340
2.82M
    }
341
342
10.7M
    slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb);
343
10.7M
    tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
344
345
10.7M
    if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles))
346
2.39M
    {
347
        //Slices span across multiple tiles.
348
2.39M
        i2_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb;
349
2.39M
    }
350
8.39M
    else
351
8.39M
    {
352
8.39M
        i2_wd_in_ctb = ps_tile->u2_wd;
353
8.39M
    }
354
10.7M
    cur_ctb_idx = ps_proc->i4_ctb_x
355
10.7M
                    + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
356
357
    /* Ctb level availability */
358
    /* Bottom left will not be available at a CTB level, no need to pass this */
359
10.7M
    ps_proc->u1_top_ctb_avail = 1;
360
10.7M
    ps_proc->u1_left_ctb_avail = 1;
361
10.7M
    ps_proc->u1_top_lt_ctb_avail = 1;
362
10.7M
    ps_proc->u1_top_rt_ctb_avail = 1;
363
    /* slice and tile boundaries */
364
365
10.7M
    if((0 == ps_proc->i4_ctb_y) || (0 == ps_proc->i4_ctb_tile_y))
366
1.13M
    {
367
1.13M
        ps_proc->u1_top_ctb_avail = 0;
368
1.13M
        ps_proc->u1_top_lt_ctb_avail = 0;
369
1.13M
        ps_proc->u1_top_rt_ctb_avail = 0;
370
1.13M
    }
371
372
10.7M
    if((0 == ps_proc->i4_ctb_x) || (0 == ps_proc->i4_ctb_tile_x))
373
499k
    {
374
499k
        ps_proc->u1_left_ctb_avail = 0;
375
499k
        ps_proc->u1_top_lt_ctb_avail = 0;
376
499k
        if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y))
377
99.4k
        {
378
99.4k
            ps_proc->u1_top_ctb_avail = 0;
379
99.4k
            if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x)
380
91.5k
            {
381
91.5k
                ps_proc->u1_top_rt_ctb_avail = 0;
382
91.5k
            }
383
99.4k
        }
384
499k
    }
385
    /*For slices not beginning at start of a ctb row*/
386
10.2M
    else if(ps_proc->i4_ctb_x > 0)
387
10.2M
    {
388
10.2M
        if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y))
389
1.23M
        {
390
1.23M
            ps_proc->u1_top_ctb_avail = 0;
391
1.23M
            ps_proc->u1_top_lt_ctb_avail = 0;
392
1.23M
            if(0 == ps_proc->i4_ctb_slice_x)
393
23.0k
            {
394
23.0k
                ps_proc->u1_left_ctb_avail = 0;
395
23.0k
            }
396
1.23M
            if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x)
397
1.19M
            {
398
1.19M
                ps_proc->u1_top_rt_ctb_avail = 0;
399
1.19M
            }
400
1.23M
        }
401
9.04M
        else if((1 == ps_proc->i4_ctb_slice_y) && (0 == ps_proc->i4_ctb_slice_x))
402
2.07k
        {
403
2.07k
            ps_proc->u1_top_lt_ctb_avail = 0;
404
2.07k
        }
405
10.2M
    }
406
407
10.7M
    if((ps_proc->i4_ctb_x == (ps_sps->i2_pic_wd_in_ctb - 1)) || ((ps_tile->u2_wd - 1) == ps_proc->i4_ctb_tile_x))
408
499k
    {
409
499k
        ps_proc->u1_top_rt_ctb_avail = 0;
410
499k
    }
411
412
413
10.7M
    {
414
10.7M
        WORD32 next_ctb_idx;
415
10.7M
        next_ctb_idx = cur_ctb_idx + 1;
416
417
10.7M
        if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1))
418
499k
        {
419
499k
            if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht)
420
83.3k
            {
421
                //Last tile
422
83.3k
                if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb))
423
32.2k
                {
424
32.2k
                    next_ctb_idx = cur_ctb_idx + 1;
425
32.2k
                }
426
51.1k
                else //Not last tile, but new tile
427
51.1k
                {
428
51.1k
                    tile_t *ps_tile_next = ps_proc->ps_tile + 1;
429
51.1k
                    next_ctb_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
430
51.1k
                }
431
83.3k
            }
432
416k
            else //End of each tile row
433
416k
            {
434
416k
                next_ctb_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x;
435
416k
            }
436
499k
        }
437
10.7M
        ps_proc->i4_next_pu_ctb_cnt = next_ctb_idx;
438
10.7M
        ps_proc->i4_ctb_pu_cnt =
439
10.7M
                        ps_proc->pu4_pic_pu_idx[next_ctb_idx]
440
10.7M
                        - ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
441
10.7M
        cur_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
442
10.7M
        ps_proc->i4_ctb_start_pu_idx = cur_pu_idx;
443
10.7M
        ps_proc->ps_pu = &ps_proc->ps_pic_pu[cur_pu_idx];
444
10.7M
    }
445
10.7M
}
446
447
void ihevcd_update_ctb_tu_cnt(process_ctxt_t *ps_proc)
448
7.12M
{
449
7.12M
    sps_t *ps_sps = ps_proc->ps_sps;
450
7.12M
    codec_t *ps_codec = ps_proc->ps_codec;
451
7.12M
    WORD32 cur_ctb_idx;
452
453
7.12M
    cur_ctb_idx = ps_proc->i4_ctb_x
454
7.12M
                    + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
455
456
7.12M
    {
457
7.12M
        tile_t *ps_tile;
458
7.12M
        WORD32 next_ctb_tu_idx;
459
7.12M
        ps_tile = ps_proc->ps_tile;
460
461
462
7.12M
        if(1 == ps_codec->i4_num_cores)
463
2.00M
        {
464
2.00M
            next_ctb_tu_idx = cur_ctb_idx % RESET_TU_BUF_NCTB + 1;
465
2.00M
            if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1))
466
124k
            {
467
124k
                if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht)
468
25.0k
                {
469
                    //Last tile
470
25.0k
                    if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb))
471
5.40k
                    {
472
5.40k
                        next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1;
473
5.40k
                    }
474
19.6k
                    else //Not last tile, but new tile
475
19.6k
                    {
476
19.6k
                        tile_t *ps_tile_next = ps_proc->ps_tile + 1;
477
19.6k
                        next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
478
19.6k
                    }
479
25.0k
                }
480
99.5k
                else //End of each tile row
481
99.5k
                {
482
99.5k
                    next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x;
483
99.5k
                }
484
124k
            }
485
2.00M
            ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx;
486
2.00M
            ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] - ps_proc->pu4_pic_tu_idx[cur_ctb_idx % RESET_TU_BUF_NCTB];
487
2.00M
        }
488
5.11M
        else
489
5.11M
        {
490
5.11M
            next_ctb_tu_idx = cur_ctb_idx + 1;
491
5.11M
            if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1))
492
202k
            {
493
202k
                if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht)
494
27.9k
                {
495
                    //Last tile
496
27.9k
                    if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb))
497
17.0k
                    {
498
17.0k
                        next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1;
499
17.0k
                    }
500
10.9k
                    else //Not last tile, but new tile
501
10.9k
                    {
502
10.9k
                        tile_t *ps_tile_next = ps_proc->ps_tile + 1;
503
10.9k
                        next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
504
10.9k
                    }
505
27.9k
                }
506
174k
                else //End of each tile row
507
174k
                {
508
174k
                    next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x;
509
174k
                }
510
202k
            }
511
5.11M
            ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx;
512
5.11M
            ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] -
513
5.11M
                            ps_proc->pu4_pic_tu_idx[cur_ctb_idx];
514
5.11M
        }
515
7.12M
    }
516
7.12M
}
517
518
IHEVCD_ERROR_T ihevcd_process(process_ctxt_t *ps_proc)
519
249k
{
520
249k
    IHEVCD_ERROR_T ret = (IHEVCD_ERROR_T)IHEVCD_SUCCESS;
521
249k
    codec_t *ps_codec;
522
249k
    sps_t *ps_sps = ps_proc->ps_sps;
523
524
249k
    WORD32 nctb;
525
249k
    WORD32 i;
526
249k
    WORD32 idx;
527
249k
    WORD32 nop_cnt;
528
249k
    WORD32 num_minpu_in_ctb;
529
249k
    WORD32 cur_slice_idx, cur_ctb_tile_x, cur_ctb_slice_x, cur_ctb_tile_y, cur_ctb_slice_y;
530
249k
    WORD32 nxt_ctb_slice_y, nxt_ctb_slice_x;
531
249k
    tu_t *ps_tu_cur, *ps_tu_nxt;
532
249k
    UWORD8 *pu1_pu_map_cur, *pu1_pu_map_nxt;
533
249k
    WORD32 num_ctb, num_ctb_tmp;
534
249k
    proc_type_t proc_type;
535
536
537
249k
    WORD32 ctb_size = 1 << ps_sps->i1_log2_ctb_size;
538
539
249k
    PROFILE_DISABLE_PROCESS_CTB();
540
541
249k
    ps_codec = ps_proc->ps_codec;
542
249k
    num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE);
543
544
249k
    nctb = MIN(ps_codec->i4_proc_nctb, ps_proc->i4_ctb_cnt);
545
249k
    nctb = MIN(nctb, (ps_proc->ps_tile->u2_wd - ps_proc->i4_ctb_tile_x));
546
547
249k
    if(ps_proc->i4_cur_slice_idx > (MAX_SLICE_HDR_CNT - 2 * ps_sps->i2_pic_wd_in_ctb))
548
24.8k
    {
549
24.8k
        num_ctb = 1;
550
24.8k
    }
551
224k
    else
552
224k
    {
553
224k
        num_ctb = ps_proc->i4_nctb;
554
224k
    }
555
249k
    nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y;
556
249k
    nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x;
557
249k
    pu1_pu_map_nxt = ps_proc->pu1_pu_map;
558
249k
    ps_tu_nxt = ps_proc->ps_tu;
559
560
1.70M
    while(ps_proc->i4_ctb_cnt)
561
1.45M
    {
562
1.45M
        ps_proc->i4_ctb_slice_y = nxt_ctb_slice_y;
563
1.45M
        ps_proc->i4_ctb_slice_x = nxt_ctb_slice_x;
564
1.45M
        ps_proc->pu1_pu_map = pu1_pu_map_nxt;
565
1.45M
        ps_proc->ps_tu = ps_tu_nxt;
566
567
1.45M
        cur_ctb_tile_x = ps_proc->i4_ctb_tile_x;
568
1.45M
        cur_ctb_tile_y = ps_proc->i4_ctb_tile_y;
569
1.45M
        cur_ctb_slice_x = ps_proc->i4_ctb_slice_x;
570
1.45M
        cur_ctb_slice_y = ps_proc->i4_ctb_slice_y;
571
1.45M
        cur_slice_idx = ps_proc->i4_cur_slice_idx;
572
1.45M
        ps_tu_cur = ps_proc->ps_tu;
573
1.45M
        pu1_pu_map_cur = ps_proc->pu1_pu_map;
574
1.45M
        proc_type = PROC_INTER_PRED;
575
576
1.45M
        if(ps_proc->i4_ctb_cnt < num_ctb)
577
0
        {
578
0
            num_ctb = ps_proc->i4_ctb_cnt;
579
0
        }
580
1.45M
        num_ctb_tmp = num_ctb;
581
582
6.84M
        while(num_ctb_tmp)
583
5.39M
        {
584
5.39M
            slice_header_t *ps_slice_hdr;
585
5.39M
            tile_t *ps_tile = ps_proc->ps_tile;
586
587
            /* Waiting for Parsing to be done*/
588
5.39M
            {
589
590
591
5.39M
                nop_cnt = PROC_NOP_CNT;
592
5.39M
                if(ps_proc->i4_check_parse_status || ps_proc->i4_check_proc_status)
593
3.38M
                {
594
11.1M
                    while(1)
595
11.1M
                    {
596
11.1M
                        volatile UWORD8 *pu1_buf;
597
11.1M
                        volatile WORD32 status;
598
11.1M
                        status = 1;
599
                        /* Check if all dependencies for the next nCTBs are met */
600
                        /* Check if the next nCTBs are parsed */
601
11.1M
                        if(ps_proc->i4_check_parse_status)
602
11.1M
                        {
603
11.1M
                            idx = (ps_proc->i4_ctb_x + nctb - 1);
604
11.1M
                            idx += (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb);
605
11.1M
                            pu1_buf = (ps_codec->pu1_parse_map + idx);
606
11.1M
                            status = *pu1_buf;
607
11.1M
                        }
608
609
11.1M
                        if(status)
610
3.38M
                            break;
611
612
                        /* if dependencies are not met, then wait for few cycles.
613
                         * Even after few iterations, if the dependencies are not met then yield
614
                         */
615
7.79M
                        if(nop_cnt > 0)
616
6.98M
                        {
617
6.98M
                            NOP(128);
618
6.98M
                            nop_cnt -= 128;
619
6.98M
                        }
620
808k
                        else
621
808k
                        {
622
808k
                            nop_cnt = PROC_NOP_CNT;
623
808k
                            ithread_yield();
624
808k
                        }
625
7.79M
                    }
626
3.38M
                }
627
5.39M
            }
628
629
            /* Check proc map to ensure dependencies for recon are met */
630
5.39M
            ihevcd_proc_map_check(ps_proc, proc_type, nctb);
631
632
5.39M
            ihevcd_slice_hdr_update(ps_proc);
633
5.39M
            ps_slice_hdr = ps_proc->ps_slice_hdr;
634
635
            //ihevcd_mv_prediction();
636
            //ihevcd_lvl_unpack();
637
            //ihevcd_inter_iq_it_recon();
638
            //Following does prediction, iq, it and recon on a TU by TU basis for intra TUs
639
            //ihevcd_intra_process();
640
            //ihevcd_ctb_boundary_strength_islice(ps_proc, ctb_size);
641
            //ihevcd_deblk_ctb(ps_proc);
642
643
            /* iq,it recon of Intra TU */
644
5.39M
            {
645
5.39M
                UWORD32 *pu4_ctb_top_pu_idx, *pu4_ctb_left_pu_idx, *pu4_ctb_top_left_pu_idx;
646
5.39M
                WORD32 cur_ctb_idx;
647
648
5.39M
                ihevcd_ctb_avail_update(ps_proc);
649
650
#if DEBUG_DUMP_FRAME_BUFFERS_INFO
651
                au1_pic_avail_ctb_flags[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] =
652
                                ((ps_proc->u1_top_ctb_avail << 3) | (ps_proc->u1_left_ctb_avail << 2) | (ps_proc->u1_top_lt_ctb_avail << 1) | (ps_proc->u1_top_rt_ctb_avail));
653
                au4_pic_ctb_slice_xy[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] =
654
                                (((UWORD16)ps_proc->i4_ctb_slice_x << 16) | ((UWORD16)ps_proc->i4_ctb_slice_y << 16));
655
#endif
656
657
                /*************************************************/
658
                /****************   MV pred **********************/
659
                /*************************************************/
660
5.39M
                if(PSLICE == ps_slice_hdr->i1_slice_type
661
5.20M
                                || BSLICE == ps_slice_hdr->i1_slice_type)
662
1.22M
                {
663
1.22M
                    mv_ctxt_t s_mv_ctxt;
664
665
1.22M
                    pu4_ctb_top_pu_idx = ps_proc->pu4_pic_pu_idx_top
666
1.22M
                                    + (ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE);
667
1.22M
                    pu4_ctb_left_pu_idx = ps_proc->pu4_pic_pu_idx_left;
668
1.22M
                    pu4_ctb_top_left_pu_idx = &ps_proc->u4_ctb_top_left_pu_idx;
669
670
                    /* Initializing s_mv_ctxt */
671
1.22M
                    if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD)
672
473k
                    {
673
473k
                        s_mv_ctxt.ps_pps = ps_proc->ps_pps;
674
473k
                        s_mv_ctxt.ps_sps = ps_proc->ps_sps;
675
473k
                        s_mv_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
676
473k
                        s_mv_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
677
473k
                        s_mv_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
678
473k
                        s_mv_ctxt.ps_pu = ps_proc->ps_pu;
679
473k
                        s_mv_ctxt.ps_pic_pu = ps_proc->ps_pic_pu;
680
473k
                        s_mv_ctxt.ps_tile = ps_tile;
681
473k
                        s_mv_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map;
682
473k
                        s_mv_ctxt.pu4_pic_pu_idx = ps_proc->pu4_pic_pu_idx;
683
473k
                        s_mv_ctxt.pu1_pic_pu_map = ps_proc->pu1_pic_pu_map;
684
473k
                        s_mv_ctxt.i4_ctb_pu_cnt = ps_proc->i4_ctb_pu_cnt;
685
473k
                        s_mv_ctxt.i4_ctb_start_pu_idx = ps_proc->i4_ctb_start_pu_idx;
686
473k
                        s_mv_ctxt.u1_top_ctb_avail = ps_proc->u1_top_ctb_avail;
687
473k
                        s_mv_ctxt.u1_top_rt_ctb_avail = ps_proc->u1_top_rt_ctb_avail;
688
473k
                        s_mv_ctxt.u1_top_lt_ctb_avail = ps_proc->u1_top_lt_ctb_avail;
689
473k
                        s_mv_ctxt.u1_left_ctb_avail = ps_proc->u1_left_ctb_avail;
690
691
473k
                        ihevcd_get_mv_ctb(&s_mv_ctxt, pu4_ctb_top_pu_idx,
692
473k
                                          pu4_ctb_left_pu_idx, pu4_ctb_top_left_pu_idx);
693
473k
                    }
694
695
1.22M
                    ihevcd_inter_pred_ctb(ps_proc);
696
1.22M
                }
697
4.16M
                else if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD)
698
1.55M
                {
699
1.55M
                    WORD32 next_ctb_idx, num_pu_per_ctb, ctb_start_pu_idx, pu_cnt;
700
1.55M
                    pu_t *ps_pu;
701
1.55M
                    WORD32 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE);
702
1.55M
                    UWORD8 *pu1_pic_pu_map_ctb = ps_proc->pu1_pic_pu_map +
703
1.55M
                                    (ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb) * num_minpu_in_ctb;
704
1.55M
                    WORD32 row, col;
705
1.55M
                    UWORD32 *pu4_nbr_pu_idx = ps_proc->pu4_pic_pu_idx_map;
706
1.55M
                    WORD32 nbr_pu_idx_strd = MAX_CTB_SIZE / MIN_PU_SIZE + 2;
707
1.55M
                    WORD32 ctb_size_in_min_pu = (ctb_size / MIN_PU_SIZE);
708
709
                    /* Neighbor PU idx update inside CTB */
710
                    /* 1byte per 4x4. Indicates the PU idx that 4x4 block belongs to */
711
712
1.55M
                    cur_ctb_idx = ps_proc->i4_ctb_x
713
1.55M
                                    + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
714
1.55M
                    next_ctb_idx = ps_proc->i4_next_pu_ctb_cnt;
715
1.55M
                    num_pu_per_ctb = ps_proc->pu4_pic_pu_idx[next_ctb_idx]
716
1.55M
                                    - ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
717
1.55M
                    ctb_start_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx];
718
1.55M
                    ps_pu = &ps_proc->ps_pic_pu[ctb_start_pu_idx];
719
720
76.8M
                    for(pu_cnt = 0; pu_cnt < num_pu_per_ctb; pu_cnt++, ps_pu++)
721
75.2M
                    {
722
75.2M
                        UWORD32 cur_pu_idx;
723
75.2M
                        WORD32 pu_ht = (ps_pu->b4_ht + 1) << 2;
724
75.2M
                        WORD32 pu_wd = (ps_pu->b4_wd + 1) << 2;
725
726
75.2M
                        cur_pu_idx = ctb_start_pu_idx + pu_cnt;
727
728
230M
                        for(row = 0; row < pu_ht / MIN_PU_SIZE; row++)
729
508M
                            for(col = 0; col < pu_wd / MIN_PU_SIZE; col++)
730
353M
                                pu4_nbr_pu_idx[(1 + ps_pu->b4_pos_x + col)
731
353M
                                                + (1 + ps_pu->b4_pos_y + row)
732
353M
                                                * nbr_pu_idx_strd] =
733
353M
                                                cur_pu_idx;
734
75.2M
                    }
735
736
                    /* Updating Top and Left pointers */
737
1.55M
                    {
738
1.55M
                        WORD32 rows_remaining = ps_sps->i2_pic_height_in_luma_samples
739
1.55M
                                        - (ps_proc->i4_ctb_y << ps_sps->i1_log2_ctb_size);
740
1.55M
                        WORD32 ctb_size_left = MIN(ctb_size, rows_remaining);
741
742
                        /* Top Left */
743
                        /* saving top left before updating top ptr, as updating top ptr will overwrite the top left for the next ctb */
744
1.55M
                        ps_proc->u4_ctb_top_left_pu_idx = ps_proc->pu4_pic_pu_idx_top[((ps_proc->i4_ctb_x + 1) * ctb_size / MIN_PU_SIZE) - 1];
745
25.9M
                        for(i = 0; i < ctb_size / MIN_PU_SIZE; i++)
746
24.3M
                        {
747
                            /* Left */
748
                            /* Last column of au4_nbr_pu_idx */
749
24.3M
                            ps_proc->pu4_pic_pu_idx_left[i] =
750
24.3M
                                            pu4_nbr_pu_idx[(ctb_size / MIN_PU_SIZE) + (i + 1) * nbr_pu_idx_strd];
751
                            /* Top */
752
                            /* Last row of au4_nbr_pu_idx */
753
24.3M
                            ps_proc->pu4_pic_pu_idx_top[(ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE) + i] =
754
24.3M
                                            pu4_nbr_pu_idx[(ctb_size_left / MIN_PU_SIZE) * nbr_pu_idx_strd + i + 1];
755
756
24.3M
                        }
757
758
                        /* Updating the CTB level PU idx (Used for collocated MV pred)*/
759
1.55M
                        {
760
1.55M
                            WORD32 ctb_row, ctb_col, index_pic_map, index_nbr_map;
761
1.55M
                            WORD32 first_pu_of_ctb;
762
1.55M
                            first_pu_of_ctb = pu4_nbr_pu_idx[1 + nbr_pu_idx_strd];
763
1.55M
                            UWORD32 cur_ctb_ht_in_min_pu = MIN(((ps_sps->i2_pic_height_in_luma_samples
764
1.55M
                                        - (ps_proc->i4_ctb_y << ps_sps->i1_log2_ctb_size)) / MIN_PU_SIZE), ctb_size_in_min_pu);
765
1.55M
                            UWORD32 cur_ctb_wd_in_min_pu = MIN(((ps_sps->i2_pic_width_in_luma_samples
766
1.55M
                                        - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size)) / MIN_PU_SIZE), ctb_size_in_min_pu);
767
768
1.55M
                            index_pic_map = 0 * ctb_size_in_min_pu + 0;
769
1.55M
                            index_nbr_map = (0 + 1) * nbr_pu_idx_strd + (0 + 1);
770
771
24.3M
                            for(ctb_row = 0; ctb_row < cur_ctb_ht_in_min_pu; ctb_row++)
772
22.7M
                            {
773
377M
                                for(ctb_col = 0; ctb_col < cur_ctb_wd_in_min_pu; ctb_col++)
774
354M
                                {
775
354M
                                    pu1_pic_pu_map_ctb[index_pic_map + ctb_col] = pu4_nbr_pu_idx[index_nbr_map + ctb_col]
776
354M
                                                    - first_pu_of_ctb;
777
354M
                                }
778
22.7M
                                index_pic_map += ctb_size_in_min_pu;
779
22.7M
                                index_nbr_map += nbr_pu_idx_strd;
780
22.7M
                            }
781
1.55M
                        }
782
1.55M
                    }
783
1.55M
                }
784
5.39M
            }
785
786
5.39M
            if(ps_proc->ps_pps->i1_tiles_enabled_flag)
787
1.49M
            {
788
                /*Update the tile index buffer with tile information for the current ctb*/
789
1.49M
                UWORD16 *pu1_tile_idx = ps_proc->pu1_tile_idx;
790
1.49M
                pu1_tile_idx[(ps_proc->i4_ctb_x + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb))]
791
1.49M
                                = ps_proc->i4_cur_tile_idx;
792
1.49M
            }
793
794
            /*************************************************/
795
            /*********** BS, QP and Deblocking  **************/
796
            /*************************************************/
797
            /* Boundary strength call has to be after IQ IT recon since QP population needs ps_proc->i4_qp_const_inc_ctb flag */
798
799
5.39M
            {
800
5.39M
                slice_header_t *ps_slice_hdr;
801
5.39M
                ps_slice_hdr = ps_proc->ps_slice_hdr;
802
803
804
                /* Check if deblock is disabled for the current slice or if it is disabled for the current picture
805
                 * because of disable deblock api
806
                 */
807
5.39M
                if(0 == ps_codec->i4_disable_deblk_pic)
808
5.39M
                {
809
5.39M
                    if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD)
810
2.03M
                    {
811
                        /* Boundary strength calculation is done irrespective of whether deblocking is disabled
812
                         * in the slice or not, to handle deblocking slice boundaries */
813
2.03M
                        if((0 == ps_codec->i4_slice_error))
814
1.73M
                        {
815
1.73M
                            ihevcd_update_ctb_tu_cnt(ps_proc);
816
1.73M
                            ps_proc->s_bs_ctxt.ps_pps = ps_proc->ps_pps;
817
1.73M
                            ps_proc->s_bs_ctxt.ps_sps = ps_proc->ps_sps;
818
1.73M
                            ps_proc->s_bs_ctxt.ps_codec = ps_proc->ps_codec;
819
1.73M
                            ps_proc->s_bs_ctxt.i4_ctb_tu_cnt = ps_proc->i4_ctb_tu_cnt;
820
1.73M
                            ps_proc->s_bs_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
821
1.73M
                            ps_proc->s_bs_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
822
1.73M
                            ps_proc->s_bs_ctxt.i4_ctb_tile_x = ps_proc->i4_ctb_tile_x;
823
1.73M
                            ps_proc->s_bs_ctxt.i4_ctb_tile_y = ps_proc->i4_ctb_tile_y;
824
1.73M
                            ps_proc->s_bs_ctxt.i4_ctb_slice_x = ps_proc->i4_ctb_slice_x;
825
1.73M
                            ps_proc->s_bs_ctxt.i4_ctb_slice_y = ps_proc->i4_ctb_slice_y;
826
1.73M
                            ps_proc->s_bs_ctxt.ps_tu = ps_proc->ps_tu;
827
1.73M
                            ps_proc->s_bs_ctxt.ps_pu = ps_proc->ps_pu;
828
1.73M
                            ps_proc->s_bs_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map;
829
1.73M
                            ps_proc->s_bs_ctxt.i4_next_pu_ctb_cnt = ps_proc->i4_next_pu_ctb_cnt;
830
1.73M
                            ps_proc->s_bs_ctxt.i4_next_tu_ctb_cnt = ps_proc->i4_next_tu_ctb_cnt;
831
1.73M
                            ps_proc->s_bs_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx;
832
1.73M
                            ps_proc->s_bs_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
833
1.73M
                            ps_proc->s_bs_ctxt.ps_tile = ps_proc->ps_tile;
834
835
1.73M
                            if(ISLICE == ps_slice_hdr->i1_slice_type)
836
1.26M
                            {
837
1.26M
                                ihevcd_ctb_boundary_strength_islice(&ps_proc->s_bs_ctxt);
838
1.26M
                            }
839
470k
                            else
840
470k
                            {
841
470k
                                ihevcd_ctb_boundary_strength_pbslice(&ps_proc->s_bs_ctxt);
842
470k
                            }
843
1.73M
                        }
844
845
                        /* Boundary strength is set to zero if deblocking is disabled for the current slice */
846
2.03M
                        if((0 != ps_slice_hdr->i1_slice_disable_deblocking_filter_flag))
847
158k
                        {
848
158k
                            WORD32 bs_strd = (ps_sps->i2_pic_wd_in_ctb + 1) * (ctb_size * ctb_size / 8 / 16);
849
850
158k
                            UWORD32 *pu4_vert_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_vert_bs +
851
158k
                                            ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) +
852
158k
                                            ps_proc->i4_ctb_y * bs_strd);
853
158k
                            UWORD32 *pu4_horz_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_horz_bs +
854
158k
                                            ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) +
855
158k
                                            ps_proc->i4_ctb_y * bs_strd);
856
857
158k
                            memset(pu4_vert_bs, 0, (ctb_size / 8) * (ctb_size / 4) / 8 * 2);
858
158k
                            memset(pu4_horz_bs, 0, (ctb_size / 8) * (ctb_size / 4) / 8 * 2);
859
158k
                        }
860
2.03M
                    }
861
5.39M
                }
862
5.39M
            }
863
864
            /* Per CTB update the following */
865
5.39M
            {
866
5.39M
                WORD32 cur_ctb_idx = ps_proc->i4_ctb_x
867
5.39M
                                + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
868
5.39M
                cur_ctb_idx++;
869
870
5.39M
                ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb;
871
5.39M
                ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt;
872
5.39M
                if((1 == ps_codec->i4_num_cores) &&
873
2.00M
                                (0 == cur_ctb_idx % RESET_TU_BUF_NCTB))
874
0
                {
875
0
                    ps_proc->ps_tu = ps_proc->ps_pic_tu;
876
0
                }
877
5.39M
                ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt;
878
5.39M
            }
879
880
            /* Update proc map for recon*/
881
5.39M
            ihevcd_proc_map_update(ps_proc, proc_type, nctb);
882
883
5.39M
            num_ctb_tmp -= nctb;
884
5.39M
            ihevcd_ctb_pos_update(ps_proc, nctb);
885
886
5.39M
        }
887
888
1.45M
        if(cur_slice_idx != ps_proc->i4_cur_slice_idx)
889
9.90k
        {
890
9.90k
            ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1));
891
9.90k
            ps_proc->i4_cur_slice_idx = cur_slice_idx;
892
9.90k
        }
893
        /* Restore the saved variables  */
894
1.45M
        num_ctb_tmp = num_ctb;
895
1.45M
        ps_proc->i4_ctb_x -= num_ctb;
896
1.45M
        ps_proc->i4_ctb_tile_x = cur_ctb_tile_x;
897
1.45M
        ps_proc->i4_ctb_slice_x = cur_ctb_slice_x;
898
1.45M
        ps_proc->i4_ctb_tile_y = cur_ctb_tile_y;
899
1.45M
        ps_proc->i4_ctb_slice_y = cur_ctb_slice_y;
900
1.45M
        ps_proc->pu1_pu_map = pu1_pu_map_cur;
901
1.45M
        ps_proc->ps_tu = ps_tu_cur;
902
1.45M
        proc_type = PROC_RECON;
903
904
6.84M
        while(num_ctb_tmp)
905
5.39M
        {
906
907
            /* Check proc map to ensure dependencies for recon are met */
908
5.39M
            ihevcd_proc_map_check(ps_proc, proc_type, nctb);
909
910
5.39M
            ihevcd_slice_hdr_update(ps_proc);
911
912
5.39M
            {
913
914
5.39M
                ihevcd_ctb_avail_update(ps_proc);
915
916
                /*************************************************/
917
                /**************** IQ IT RECON  *******************/
918
                /*************************************************/
919
920
5.39M
                ihevcd_update_ctb_tu_cnt(ps_proc);
921
922
                /* When scaling matrix is not to be used(scaling_list_enable_flag is zero in SPS),
923
                 * default value of 16 has to be used. Since the value is same for all sizes,
924
                 * same table is used for all cases.
925
                 */
926
5.39M
                if(0 == ps_sps->i1_scaling_list_enable_flag)
927
910k
                {
928
910k
                    ps_proc->api2_dequant_intra_matrix[0] =
929
910k
                                    (WORD16 *)gi2_flat_scale_mat_32x32;
930
910k
                    ps_proc->api2_dequant_intra_matrix[1] =
931
910k
                                    (WORD16 *)gi2_flat_scale_mat_32x32;
932
910k
                    ps_proc->api2_dequant_intra_matrix[2] =
933
910k
                                    (WORD16 *)gi2_flat_scale_mat_32x32;
934
910k
                    ps_proc->api2_dequant_intra_matrix[3] =
935
910k
                                    (WORD16 *)gi2_flat_scale_mat_32x32;
936
937
910k
                    ps_proc->api2_dequant_inter_matrix[0] =
938
910k
                                    (WORD16 *)gi2_flat_scale_mat_32x32;
939
910k
                    ps_proc->api2_dequant_inter_matrix[1] =
940
910k
                                    (WORD16 *)gi2_flat_scale_mat_32x32;
941
910k
                    ps_proc->api2_dequant_inter_matrix[2] =
942
910k
                                    (WORD16 *)gi2_flat_scale_mat_32x32;
943
910k
                    ps_proc->api2_dequant_inter_matrix[3] =
944
910k
                                    (WORD16 *)gi2_flat_scale_mat_32x32;
945
910k
                }
946
4.47M
                else
947
4.47M
                {
948
4.47M
                    if(0 == ps_sps->i1_sps_scaling_list_data_present_flag)
949
4.35M
                    {
950
4.35M
                        ps_proc->api2_dequant_intra_matrix[0] =
951
4.35M
                                        (WORD16 *)gi2_flat_scale_mat_32x32;
952
4.35M
                        ps_proc->api2_dequant_intra_matrix[1] =
953
4.35M
                                        (WORD16 *)gi2_intra_default_scale_mat_8x8;
954
4.35M
                        ps_proc->api2_dequant_intra_matrix[2] =
955
4.35M
                                        (WORD16 *)gi2_intra_default_scale_mat_16x16;
956
4.35M
                        ps_proc->api2_dequant_intra_matrix[3] =
957
4.35M
                                        (WORD16 *)gi2_intra_default_scale_mat_32x32;
958
959
4.35M
                        ps_proc->api2_dequant_inter_matrix[0] =
960
4.35M
                                        (WORD16 *)gi2_flat_scale_mat_32x32;
961
4.35M
                        ps_proc->api2_dequant_inter_matrix[1] =
962
4.35M
                                        (WORD16 *)gi2_inter_default_scale_mat_8x8;
963
4.35M
                        ps_proc->api2_dequant_inter_matrix[2] =
964
4.35M
                                        (WORD16 *)gi2_inter_default_scale_mat_16x16;
965
4.35M
                        ps_proc->api2_dequant_inter_matrix[3] =
966
4.35M
                                        (WORD16 *)gi2_inter_default_scale_mat_32x32;
967
4.35M
                    }
968
                    /*TODO: Add support for custom scaling matrices */
969
4.47M
                }
970
971
972
                /* CTB Level pointers */
973
5.39M
                ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma
974
5.39M
                                + (ps_proc->i4_ctb_x * ctb_size
975
5.39M
                                + ps_proc->i4_ctb_y * ctb_size
976
5.39M
                                * ps_codec->i4_strd);
977
5.39M
                ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma
978
5.39M
                                + ps_proc->i4_ctb_x * ctb_size
979
5.39M
                                + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2);
980
981
5.39M
                ihevcd_iquant_itrans_recon_ctb(ps_proc);
982
5.39M
            }
983
984
            /* Per CTB update the following */
985
5.39M
            {
986
5.39M
                WORD32 cur_ctb_idx = ps_proc->i4_ctb_x
987
5.39M
                                + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb);
988
5.39M
                cur_ctb_idx++;
989
990
5.39M
                ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb;
991
5.39M
                ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt;
992
5.39M
                if((1 == ps_codec->i4_num_cores) &&
993
2.00M
                                (0 == cur_ctb_idx % RESET_TU_BUF_NCTB))
994
0
                {
995
0
                    ps_proc->ps_tu = ps_proc->ps_pic_tu;
996
0
                }
997
5.39M
                ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt;
998
5.39M
            }
999
1000
1001
            /* Update proc map for recon*/
1002
5.39M
            ihevcd_proc_map_update(ps_proc, proc_type, nctb);
1003
1004
5.39M
            num_ctb_tmp -= nctb;
1005
5.39M
            ihevcd_ctb_pos_update(ps_proc, nctb);
1006
5.39M
        }
1007
1008
1.45M
        if(cur_slice_idx != ps_proc->i4_cur_slice_idx)
1009
9.90k
        {
1010
9.90k
            ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1));
1011
9.90k
            ps_proc->i4_cur_slice_idx = cur_slice_idx;
1012
9.90k
        }
1013
        /* Restore the saved variables  */
1014
1.45M
        num_ctb_tmp = num_ctb;
1015
1.45M
        ps_proc->i4_ctb_x -= num_ctb;
1016
1.45M
        ps_proc->i4_ctb_tile_x = cur_ctb_tile_x;
1017
1.45M
        ps_proc->i4_ctb_slice_x = cur_ctb_slice_x;
1018
1.45M
        ps_proc->i4_ctb_tile_y = cur_ctb_tile_y;
1019
1.45M
        ps_proc->i4_ctb_slice_y = cur_ctb_slice_y;
1020
1.45M
        pu1_pu_map_nxt = ps_proc->pu1_pu_map;
1021
1.45M
        ps_tu_nxt = ps_proc->ps_tu;
1022
1.45M
        ps_proc->pu1_pu_map = pu1_pu_map_cur;
1023
1.45M
        ps_proc->ps_tu = ps_tu_cur;
1024
1.45M
        proc_type = PROC_DEBLK;
1025
1026
6.84M
        while(num_ctb_tmp)
1027
5.38M
        {
1028
1029
1030
            /* Check proc map to ensure dependencies for deblk are met */
1031
5.38M
            ihevcd_proc_map_check(ps_proc, proc_type, nctb);
1032
1033
5.38M
            ihevcd_slice_hdr_update(ps_proc);
1034
1035
1036
5.38M
            if(((0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1)) &&
1037
5.39M
               (0 == ps_codec->i4_disable_deblk_pic))
1038
5.39M
            {
1039
5.39M
                WORD32 i4_is_last_ctb_x = 0;
1040
5.39M
                WORD32 i4_is_last_ctb_y = 0;
1041
1042
1043
                /* Deblocking is done irrespective of whether it is disabled in the slice or not,
1044
                 * to handle deblocking the slice boundaries */
1045
5.39M
                {
1046
5.39M
                    ps_proc->s_deblk_ctxt.ps_pps = ps_proc->ps_pps;
1047
5.39M
                    ps_proc->s_deblk_ctxt.ps_sps = ps_proc->ps_sps;
1048
5.39M
                    ps_proc->s_deblk_ctxt.ps_codec = ps_proc->ps_codec;
1049
5.39M
                    ps_proc->s_deblk_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
1050
5.39M
                    ps_proc->s_deblk_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
1051
5.39M
                    ps_proc->s_deblk_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
1052
5.39M
                    ps_proc->s_deblk_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx;
1053
5.39M
                    ps_proc->s_deblk_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU);
1054
1055
                    /* Populating Current CTB's no_loop_filter flags */
1056
5.39M
                    {
1057
5.39M
                        WORD32 row;
1058
5.39M
                        WORD32 log2_ctb_size = ps_sps->i1_log2_ctb_size;
1059
1060
                        /* Loop filter strd in units of num bits */
1061
5.39M
                        WORD32 loop_filter_strd = ((ps_sps->i2_pic_width_in_luma_samples + 63) >> 6) << 3;
1062
                        /* Bit position is the current 8x8 bit offset wrt pic_no_loop_filter
1063
                         * bit_pos has to be a WOR32 so that when it is negative, the downshift still retains it to be a negative value */
1064
5.39M
                        WORD32 bit_pos = ((ps_proc->i4_ctb_y << (log2_ctb_size - 3)) - 1) * loop_filter_strd + (ps_proc->i4_ctb_x << (log2_ctb_size - 3)) - 1;
1065
1066
43.2M
                        for(row = 0; row < (ctb_size >> 3) + 1; row++)
1067
37.8M
                        {
1068
                            /* Go to the corresponding byte - read 32 bits and downshift */
1069
37.8M
                            ps_proc->s_deblk_ctxt.au2_ctb_no_loop_filter_flag[row] = (*(UWORD32 *)(ps_proc->pu1_pic_no_loop_filter_flag + (bit_pos >> 3))) >> (bit_pos & 7);
1070
37.8M
                            bit_pos += loop_filter_strd;
1071
37.8M
                        }
1072
5.39M
                    }
1073
1074
5.39M
                    ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y);
1075
1076
                    /* If the last CTB in the row was a complete CTB then deblocking has to be called from remaining pixels, since deblocking
1077
                     * is applied on a shifted CTB structure
1078
                     */
1079
5.39M
                    if(ps_proc->i4_ctb_x == ps_sps->i2_pic_wd_in_ctb - 1)
1080
172k
                    {
1081
172k
                        WORD32 i4_is_last_ctb_x = 1;
1082
172k
                        WORD32 i4_is_last_ctb_y = 0;
1083
1084
172k
                        WORD32 last_x_pos;
1085
172k
                        last_x_pos = (ps_sps->i2_pic_wd_in_ctb << ps_sps->i1_log2_ctb_size);
1086
172k
                        if(last_x_pos  ==  ps_sps->i2_pic_width_in_luma_samples)
1087
46.5k
                        {
1088
46.5k
                            ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y);
1089
46.5k
                        }
1090
172k
                    }
1091
1092
1093
                    /* If the last CTB in the column was a complete CTB then deblocking has to be called from remaining pixels, since deblocking
1094
                     * is applied on a shifted CTB structure
1095
                     */
1096
5.39M
                    if(ps_proc->i4_ctb_y == ps_sps->i2_pic_ht_in_ctb - 1)
1097
430k
                    {
1098
430k
                        WORD32 i4_is_last_ctb_x = 0;
1099
430k
                        WORD32 i4_is_last_ctb_y = 1;
1100
430k
                        WORD32 last_y_pos;
1101
430k
                        last_y_pos = (ps_sps->i2_pic_ht_in_ctb << ps_sps->i1_log2_ctb_size);
1102
430k
                        if(last_y_pos == ps_sps->i2_pic_height_in_luma_samples)
1103
15.9k
                        {
1104
15.9k
                            ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y);
1105
15.9k
                        }
1106
430k
                    }
1107
5.39M
                }
1108
5.39M
            }
1109
1110
            /* Update proc map for deblk*/
1111
5.38M
            ihevcd_proc_map_update(ps_proc, proc_type, nctb);
1112
1113
5.38M
            num_ctb_tmp -= nctb;
1114
5.38M
            ihevcd_ctb_pos_update(ps_proc, nctb);
1115
5.38M
        }
1116
1117
1.45M
        if(cur_slice_idx != ps_proc->i4_cur_slice_idx)
1118
9.90k
        {
1119
9.90k
            ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1));
1120
9.90k
            ps_proc->i4_cur_slice_idx = cur_slice_idx;
1121
9.90k
        }
1122
        /* Restore the saved variables  */
1123
1.45M
        num_ctb_tmp = num_ctb;
1124
1.45M
        ps_proc->i4_ctb_x -= num_ctb;
1125
1.45M
        ps_proc->i4_ctb_tile_x = cur_ctb_tile_x;
1126
1.45M
        ps_proc->i4_ctb_tile_y = cur_ctb_tile_y;
1127
1.45M
        ps_proc->pu1_pu_map = pu1_pu_map_cur;
1128
1.45M
        ps_proc->ps_tu = ps_tu_cur;
1129
1.45M
        nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y;
1130
1.45M
        nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x;
1131
1.45M
        ps_proc->i4_ctb_slice_y = cur_ctb_slice_y;
1132
1.45M
        ps_proc->i4_ctb_slice_x = cur_ctb_slice_x;
1133
1.45M
        proc_type = PROC_SAO;
1134
1135
6.84M
        while(num_ctb_tmp)
1136
5.39M
        {
1137
1138
1139
            /* Check proc map to ensure dependencies for SAO are met */
1140
5.39M
            ihevcd_proc_map_check(ps_proc, proc_type, nctb);
1141
1142
5.39M
            ihevcd_slice_hdr_update(ps_proc);
1143
1144
1145
5.39M
            if(0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1)
1146
5.39M
            {
1147
                /* SAO is done even when it is disabled in the current slice, because
1148
                 * it is performed on a shifted CTB and the neighbor CTBs can belong
1149
                 * to different slices with SAO enabled */
1150
5.39M
                if(0 == ps_codec->i4_disable_sao_pic)
1151
5.39M
                {
1152
5.39M
                    ps_proc->s_sao_ctxt.ps_pps = ps_proc->ps_pps;
1153
5.39M
                    ps_proc->s_sao_ctxt.ps_sps = ps_proc->ps_sps;
1154
5.39M
                    ps_proc->s_sao_ctxt.ps_tile = ps_proc->ps_tile;
1155
5.39M
                    ps_proc->s_sao_ctxt.ps_codec = ps_proc->ps_codec;
1156
5.39M
                    ps_proc->s_sao_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr;
1157
5.39M
                    ps_proc->s_sao_ctxt.i4_cur_slice_idx = ps_proc->i4_cur_slice_idx;
1158
1159
1160
5.39M
#if SAO_PROCESS_SHIFT_CTB
1161
5.39M
                    ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
1162
5.39M
                    ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
1163
5.39M
                    ps_proc->s_sao_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU);
1164
1165
5.39M
                    ihevcd_sao_shift_ctb(&ps_proc->s_sao_ctxt);
1166
#else
1167
                    if(ps_proc->i4_ctb_x > 1 && ps_proc->i4_ctb_y > 0)
1168
                    {
1169
                        ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 2;
1170
                        ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1;
1171
1172
                        ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1173
                    }
1174
1175
                    if(ps_sps->i2_pic_wd_in_ctb - 1 == ps_proc->i4_ctb_x && ps_proc->i4_ctb_y > 0)
1176
                    {
1177
                        ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 1;
1178
                        ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1;
1179
1180
                        ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1181
1182
                        ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x;
1183
                        ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1;
1184
1185
                        ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1186
1187
                        if(ps_sps->i2_pic_ht_in_ctb - 1 == ps_proc->i4_ctb_y)
1188
                        {
1189
                            WORD32 i4_ctb_x;
1190
                            ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y;
1191
                            for(i4_ctb_x = 0; i4_ctb_x < ps_sps->i2_pic_wd_in_ctb; i4_ctb_x++)
1192
                            {
1193
                                ps_proc->s_sao_ctxt.i4_ctb_x = i4_ctb_x;
1194
                                ihevcd_sao_ctb(&ps_proc->s_sao_ctxt);
1195
                            }
1196
                        }
1197
                    }
1198
#endif
1199
5.39M
                }
1200
1201
1202
                /* Call padding if required */
1203
5.39M
                {
1204
5.39M
#if SAO_PROCESS_SHIFT_CTB
1205
1206
5.39M
                    if(0 == ps_proc->i4_ctb_x)
1207
172k
                    {
1208
172k
                        WORD32 pad_ht_luma;
1209
172k
                        WORD32 pad_ht_chroma;
1210
1211
172k
                        ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma
1212
172k
                                        + (ps_proc->i4_ctb_x * ctb_size
1213
172k
                                        + ps_proc->i4_ctb_y * ctb_size
1214
172k
                                        * ps_codec->i4_strd);
1215
172k
                        ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma
1216
172k
                                        + ps_proc->i4_ctb_x * ctb_size
1217
172k
                                        + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2);
1218
1219
172k
                        pad_ht_luma = ctb_size;
1220
172k
                        pad_ht_luma += (ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y ? 8 : 0;
1221
172k
                        pad_ht_chroma = ctb_size / 2;
1222
                        /* Pad left after 1st CTB is processed */
1223
172k
                        ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT);
1224
172k
                        if(CHROMA_FMT_IDC_MONOCHROME != ps_sps->i1_chroma_format_idc)
1225
172k
                        {
1226
172k
                            ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT);
1227
172k
                        }
1228
172k
                    }
1229
1230
5.39M
                    if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x)
1231
172k
                    {
1232
172k
                        WORD32 pad_ht_luma;
1233
172k
                        WORD32 pad_ht_chroma;
1234
172k
                        WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size);
1235
1236
172k
                        ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma
1237
172k
                                        + (ps_proc->i4_ctb_x * ctb_size
1238
172k
                                        + ps_proc->i4_ctb_y * ctb_size
1239
172k
                                        * ps_codec->i4_strd);
1240
172k
                        ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma
1241
172k
                                        + ps_proc->i4_ctb_x * ctb_size
1242
172k
                                        + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2);
1243
1244
172k
                        pad_ht_luma = ctb_size;
1245
172k
                        pad_ht_chroma = ctb_size / 2;
1246
172k
                        if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y)
1247
16.1k
                        {
1248
16.1k
                            pad_ht_luma += 8;
1249
16.1k
                            if (CHROMA_FMT_IDC_MONOCHROME != ps_sps->i1_chroma_format_idc)
1250
16.1k
                            {
1251
16.1k
                                pad_ht_chroma += 16;
1252
16.1k
                                ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + (ps_sps->i2_pic_height_in_luma_samples / 2 - 16) * ps_codec->i4_strd,
1253
16.1k
                                                                                 ps_codec->i4_strd, 16, PAD_LEFT);
1254
16.1k
                            }
1255
16.1k
                        }
1256
                        /* Pad right after last CTB in the current row is processed */
1257
172k
                        ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT);
1258
172k
                        if(CHROMA_FMT_IDC_MONOCHROME != ps_sps->i1_chroma_format_idc)
1259
172k
                        {
1260
172k
                            ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT);
1261
172k
                        }
1262
1263
172k
                        if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y)
1264
16.1k
                        {
1265
16.1k
                            UWORD8 *pu1_buf;
1266
                            /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */
1267
                            /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */
1268
                            /* Pad top after padding left and right for current rows after processing 1st CTB row */
1269
16.1k
                            ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP);
1270
16.1k
                            if(CHROMA_FMT_IDC_MONOCHROME != ps_sps->i1_chroma_format_idc)
1271
16.1k
                            {
1272
16.1k
                                ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2);
1273
16.1k
                            }
1274
1275
16.1k
                            pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT;
1276
                            /* Pad top after padding left and right for current rows after processing 1st CTB row */
1277
16.1k
                            ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT);
1278
1279
16.1k
                            if(CHROMA_FMT_IDC_MONOCHROME != ps_sps->i1_chroma_format_idc)
1280
16.1k
                            {
1281
16.1k
                                pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT;
1282
16.1k
                                ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2);
1283
16.1k
                            }
1284
16.1k
                        }
1285
172k
                    }
1286
#else
1287
                    if(ps_proc->i4_ctb_y > 1)
1288
                    {
1289
                        if(0 == ps_proc->i4_ctb_x)
1290
                        {
1291
                            WORD32 pad_ht_luma;
1292
                            WORD32 pad_ht_chroma;
1293
1294
                            pad_ht_luma = ctb_size;
1295
                            pad_ht_chroma = ctb_size / 2;
1296
                            /* Pad left after 1st CTB is processed */
1297
                            ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT);
1298
                            if(CHROMA_FMT_IDC_MONOCHROME != ps_sps->i1_chroma_format_idc)
1299
                            {
1300
                                ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT);
1301
                            }
1302
                        }
1303
                        else if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x)
1304
                        {
1305
                            WORD32 pad_ht_luma;
1306
                            WORD32 pad_ht_chroma;
1307
                            WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size);
1308
1309
                            pad_ht_luma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size : ctb_size;
1310
                            pad_ht_chroma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size / 2 : ctb_size / 2;
1311
                            /* Pad right after last CTB in the current row is processed */
1312
                            ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT);
1313
                            if(CHROMA_FMT_IDC_MONOCHROME != ps_sps->i1_chroma_format_idc)
1314
                            {
1315
                                ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT);
1316
                            }
1317
1318
                            if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y)
1319
                            {
1320
                                UWORD8 *pu1_buf;
1321
                                WORD32 pad_ht_luma;
1322
                                WORD32 pad_ht_chroma;
1323
1324
                                pad_ht_luma = 2 * ctb_size;
1325
                                pad_ht_chroma = ctb_size;
1326
1327
                                ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples - 2 * ctb_size),
1328
                                                                                   ps_codec->i4_strd, pad_ht_luma, PAD_LEFT);
1329
                                if(CHROMA_FMT_IDC_MONOCHROME != ps_sps->i1_chroma_format_idc)
1330
                                {
1331
                                    ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2 - ctb_size),
1332
                                                                                         ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT);
1333
1334
                                }
1335
                                /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */
1336
                                /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */
1337
                                /* Pad top after padding left and right for current rows after processing 1st CTB row */
1338
                                ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP);
1339
                                if(CHROMA_FMT_IDC_MONOCHROME != ps_sps->i1_chroma_format_idc)
1340
                                {
1341
                                    ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2);
1342
                                }
1343
1344
                                pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT;
1345
                                /* Pad top after padding left and right for current rows after processing 1st CTB row */
1346
                                ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT);
1347
1348
                                if(CHROMA_FMT_IDC_MONOCHROME != ps_sps->i1_chroma_format_idc)
1349
                                {
1350
                                    pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT;
1351
                                    ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2);
1352
                                }
1353
                            }
1354
                        }
1355
                    }
1356
#endif
1357
5.39M
                }
1358
5.39M
            }
1359
1360
1361
            /* Update proc map for SAO*/
1362
5.39M
            ihevcd_proc_map_update(ps_proc, proc_type, nctb);
1363
            /* Update proc map for Completion of CTB*/
1364
5.39M
            ihevcd_proc_map_update(ps_proc, PROC_ALL, nctb);
1365
5.39M
            {
1366
5.39M
                tile_t *ps_tile;
1367
1368
5.39M
                ps_tile = ps_proc->ps_tile;
1369
5.39M
                num_ctb_tmp -= nctb;
1370
1371
5.39M
                ps_proc->i4_ctb_tile_x += nctb;
1372
5.39M
                ps_proc->i4_ctb_x += nctb;
1373
1374
5.39M
                ps_proc->i4_ctb_slice_x += nctb;
1375
1376
1377
                /* Update tile counters */
1378
5.39M
                if(ps_proc->i4_ctb_tile_x >= (ps_tile->u2_wd))
1379
249k
                {
1380
                    /*End of tile row*/
1381
249k
                    ps_proc->i4_ctb_tile_x = 0;
1382
249k
                    ps_proc->i4_ctb_x = ps_tile->u1_pos_x;
1383
1384
249k
                    ps_proc->i4_ctb_tile_y++;
1385
249k
                    ps_proc->i4_ctb_y++;
1386
249k
                    if(ps_proc->i4_ctb_tile_y == ps_tile->u2_ht)
1387
41.6k
                    {
1388
                        /* Reached End of Tile */
1389
41.6k
                        ps_proc->i4_ctb_tile_y = 0;
1390
41.6k
                        ps_proc->i4_ctb_tile_x = 0;
1391
41.6k
                        ps_proc->ps_tile++;
1392
                        //End of picture
1393
41.6k
                        if(!((ps_tile->u2_ht + ps_tile->u1_pos_y  ==  ps_sps->i2_pic_ht_in_ctb) && (ps_tile->u2_wd + ps_tile->u1_pos_x  ==  ps_sps->i2_pic_wd_in_ctb)))
1394
25.5k
                        {
1395
25.5k
                            ps_tile = ps_proc->ps_tile;
1396
25.5k
                            ps_proc->i4_ctb_x = ps_tile->u1_pos_x;
1397
25.5k
                            ps_proc->i4_ctb_y = ps_tile->u1_pos_y;
1398
1399
25.5k
                        }
1400
41.6k
                    }
1401
249k
                }
1402
5.39M
            }
1403
5.39M
        }
1404
1405
1.45M
        ps_proc->i4_ctb_cnt -= num_ctb;
1406
1.45M
    }
1407
249k
    return ret;
1408
249k
}
1409
1410
void ihevcd_init_proc_ctxt(process_ctxt_t *ps_proc, WORD32 tu_coeff_data_ofst)
1411
250k
{
1412
250k
    codec_t *ps_codec;
1413
250k
    slice_header_t *ps_slice_hdr;
1414
250k
    pps_t *ps_pps;
1415
250k
    sps_t *ps_sps;
1416
250k
    tile_t *ps_tile, *ps_tile_prev;
1417
250k
    WORD32 tile_idx;
1418
250k
    WORD32 ctb_size;
1419
250k
    WORD32 num_minpu_in_ctb;
1420
250k
    WORD32 num_ctb_in_row;
1421
250k
    WORD32 ctb_addr;
1422
250k
    WORD32 i4_wd_in_ctb;
1423
250k
    WORD32 tile_start_ctb_idx;
1424
250k
    WORD32 slice_start_ctb_idx;
1425
250k
    WORD32 check_tile_wd;
1426
250k
    WORD32 continuous_tiles = 0; //Refers to tiles that are continuous, within a slice, horizontally
1427
1428
250k
    ps_codec = ps_proc->ps_codec;
1429
1430
250k
    ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx) & (MAX_SLICE_HDR_CNT - 1));
1431
250k
    ps_proc->ps_slice_hdr = ps_slice_hdr;
1432
250k
    ps_proc->ps_pps = ps_codec->ps_pps_base + ps_slice_hdr->i1_pps_id;
1433
250k
    ps_pps = ps_proc->ps_pps;
1434
250k
    ps_proc->ps_sps = ps_codec->ps_sps_base + ps_pps->i1_sps_id;
1435
250k
    ps_sps = ps_proc->ps_sps;
1436
250k
    ps_proc->i4_init_done = 1;
1437
250k
    ctb_size = 1 << ps_sps->i1_log2_ctb_size;
1438
250k
    num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE);
1439
250k
    num_ctb_in_row = ps_sps->i2_pic_wd_in_ctb;
1440
1441
250k
    ps_proc->s_sao_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx;
1442
1443
250k
    ihevcd_get_tile_pos(ps_pps, ps_sps, ps_proc->i4_ctb_x, ps_proc->i4_ctb_y,
1444
250k
                        &ps_proc->i4_ctb_tile_x, &ps_proc->i4_ctb_tile_y,
1445
250k
                        &tile_idx);
1446
1447
250k
    ps_proc->ps_tile = ps_pps->ps_tile + tile_idx;
1448
250k
    ps_proc->i4_cur_tile_idx = tile_idx;
1449
250k
    ps_tile = ps_proc->ps_tile;
1450
1451
250k
    if(ps_pps->i1_tiles_enabled_flag)
1452
110k
    {
1453
110k
        if(tile_idx)
1454
99.9k
            ps_tile_prev = ps_tile - 1;
1455
10.0k
        else
1456
10.0k
            ps_tile_prev = ps_tile;
1457
1458
110k
        slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb);
1459
110k
        tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb);
1460
1461
        /*Check if
1462
         * 1. Last tile that ends in frame boundary and 1st tile in next row belongs to same slice
1463
         * 1.1. If it does, check if the slice that has these tiles spans across the frame row.
1464
         * 2. Vertical tiles are present within a slice */
1465
110k
        if(((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x) && (ps_slice_hdr->i2_ctb_y != ps_tile->u1_pos_y)))
1466
17.9k
        {
1467
17.9k
            continuous_tiles = 1;
1468
17.9k
        }
1469
92.0k
        else
1470
92.0k
        {
1471
92.0k
            check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd;
1472
92.0k
            if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x))
1473
89.3k
                                            || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x))))
1474
73.1k
            {
1475
73.1k
                continuous_tiles = 1;
1476
73.1k
            }
1477
92.0k
        }
1478
1479
110k
        {
1480
110k
            WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x;
1481
110k
            WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y;
1482
1483
            /* Handles cases where
1484
             * 1. Slices begin at the start of each tile
1485
             * 2. Tiles lie in the same slice row.i.e, starting tile_x > slice_x, but tile_y == slice_y
1486
             * */
1487
110k
            if(ps_proc->i4_ctb_x >= i2_independent_ctb_x)
1488
99.3k
            {
1489
99.3k
                ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x;
1490
99.3k
            }
1491
10.6k
            else
1492
10.6k
            {
1493
                /* Indicates multiple tiles in a slice case where
1494
                 * The new tile belongs to an older slice that started in the previous rows-not the present row
1495
                 * & (tile_y > slice_y and tile_x < slice_x)
1496
                 */
1497
10.6k
                if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles))
1498
7.40k
                {
1499
7.40k
                    i4_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb;
1500
7.40k
                }
1501
                /* Indicates many-tiles-in-one-slice case, for slices that end without spanning the frame width*/
1502
3.21k
                else
1503
3.21k
                {
1504
3.21k
                    i4_wd_in_ctb = ps_tile->u2_wd;
1505
3.21k
                }
1506
1507
10.6k
                if(continuous_tiles)
1508
8.63k
                {
1509
8.63k
                    ps_proc->i4_ctb_slice_x = i4_wd_in_ctb
1510
8.63k
                                    - (i2_independent_ctb_x - ps_proc->i4_ctb_x);
1511
8.63k
                }
1512
1.98k
                else
1513
1.98k
                {
1514
1.98k
                    ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - ps_tile->u1_pos_x;
1515
1.98k
                }
1516
10.6k
            }
1517
            /* Initialize ctb slice y to zero and at the start of slice row initialize it
1518
        to difference between ctb_y and slice's start ctb y */
1519
1520
110k
            ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y;
1521
1522
            /*If beginning of tile, check if slice counters are set correctly*/
1523
110k
            if((0 == ps_proc->i4_ctb_tile_x) && (0 == ps_proc->i4_ctb_tile_y))
1524
28.0k
            {
1525
28.0k
                if(ps_slice_hdr->i1_dependent_slice_flag)
1526
1.89k
                {
1527
1.89k
                    ps_proc->i4_ctb_slice_x = 0;
1528
1.89k
                    ps_proc->i4_ctb_slice_y = 0;
1529
1.89k
                }
1530
                /*For slices that span across multiple tiles*/
1531
26.1k
                else if(slice_start_ctb_idx < tile_start_ctb_idx)
1532
22.9k
                {
1533
22.9k
                    ps_proc->i4_ctb_slice_y = ps_tile->u1_pos_y - i2_independent_ctb_y;
1534
                    /* Two Cases
1535
                     * 1 - slice spans across frame-width- but dose not start from 1st column
1536
                     * 2 - Slice spans across multiple tiles anywhere is a frame
1537
                     */
1538
                    /*TODO:In a multiple slice clip,  if an independent slice span across more than 2 tiles in a row, it is not supported*/
1539
22.9k
                    if(continuous_tiles) //Case 2-implemented for slices that span not more than 2 tiles
1540
22.6k
                    {
1541
22.6k
                        if(i2_independent_ctb_y <= ps_tile->u1_pos_y)
1542
20.6k
                        {
1543
                            //Check if ctb x is before or after
1544
20.6k
                            if(i2_independent_ctb_x > ps_tile->u1_pos_x)
1545
1.43k
                            {
1546
1.43k
                                ps_proc->i4_ctb_slice_y -= 1;
1547
1.43k
                            }
1548
20.6k
                        }
1549
22.6k
                    }
1550
22.9k
                }
1551
28.0k
            }
1552
            //Slice starts from a column which is not the starting tile-column, but is within the tile
1553
110k
            if(((i2_independent_ctb_x - ps_tile->u1_pos_x) != 0) && ((ps_proc->i4_ctb_slice_y != 0))
1554
71.5k
                            && ((i2_independent_ctb_x >= ps_tile->u1_pos_x) && (i2_independent_ctb_x < ps_tile->u1_pos_x + ps_tile->u2_wd)))
1555
2.87k
            {
1556
2.87k
                ps_proc->i4_ctb_slice_y -= 1;
1557
2.87k
            }
1558
110k
        }
1559
110k
    }
1560
140k
    else
1561
140k
    {
1562
140k
        WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x;
1563
140k
        WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y;
1564
1565
1566
140k
        {
1567
140k
            ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x;
1568
140k
            ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y;
1569
140k
            if(ps_proc->i4_ctb_slice_x < 0)
1570
15.2k
            {
1571
15.2k
                ps_proc->i4_ctb_slice_x += ps_sps->i2_pic_wd_in_ctb;
1572
15.2k
                ps_proc->i4_ctb_slice_y -= 1;
1573
15.2k
            }
1574
1575
            /* Initialize ctb slice y to zero and at the start of slice row initialize it
1576
            to difference between ctb_y and slice's start ctb y */
1577
140k
        }
1578
140k
    }
1579
1580
    /* Compute TU offset for the current CTB set */
1581
250k
    {
1582
1583
250k
        WORD32 ctb_luma_min_tu_cnt;
1584
250k
        WORD32 ctb_addr;
1585
1586
250k
        ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x;
1587
1588
250k
        ctb_luma_min_tu_cnt = (1 << ps_sps->i1_log2_ctb_size) / MIN_TU_SIZE;
1589
250k
        ctb_luma_min_tu_cnt *= ctb_luma_min_tu_cnt;
1590
1591
250k
        ps_proc->pu1_tu_map = ps_proc->pu1_pic_tu_map
1592
250k
                        + ctb_luma_min_tu_cnt * ctb_addr;
1593
250k
        if(1 == ps_codec->i4_num_cores)
1594
124k
        {
1595
124k
            ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr % RESET_TU_BUF_NCTB];
1596
124k
        }
1597
125k
        else
1598
125k
        {
1599
125k
            ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr];
1600
125k
        }
1601
250k
        ps_proc->pv_tu_coeff_data = (UWORD8 *)ps_proc->pv_pic_tu_coeff_data
1602
250k
                        + tu_coeff_data_ofst;
1603
1604
250k
    }
1605
1606
    /* Compute PU related elements for the current CTB set */
1607
250k
    {
1608
250k
        WORD32 pu_idx;
1609
250k
        ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x;
1610
250k
        pu_idx = ps_proc->pu4_pic_pu_idx[ctb_addr];
1611
250k
        ps_proc->pu1_pu_map = ps_proc->pu1_pic_pu_map
1612
250k
                        + ctb_addr * num_minpu_in_ctb;
1613
250k
        ps_proc->ps_pu = ps_proc->ps_pic_pu + pu_idx;
1614
250k
    }
1615
1616
    /* Number of ctbs processed in one loop of process function */
1617
250k
    {
1618
250k
        ps_proc->i4_nctb = MIN(ps_codec->u4_nctb, ps_tile->u2_wd);
1619
250k
    }
1620
1621
250k
}
1622
void ihevcd_process_thread(process_ctxt_t *ps_proc)
1623
985
{
1624
985
    IHEVCD_ERROR_T ret = (IHEVCD_ERROR_T)IHEVCD_SUCCESS;
1625
985
    {
1626
985
        ithread_set_affinity(ps_proc->i4_id + 1);
1627
985
    }
1628
1629
20.6k
    while(1)
1630
20.6k
    {
1631
20.6k
        codec_t *ps_dec = ps_proc->ps_codec;
1632
20.6k
        if(ps_proc->ps_codec->i4_threads_active)
1633
20.6k
        {
1634
20.6k
            DEBUG("In ihevcd_process_thread \n");
1635
1636
20.6k
            ret = ithread_mutex_lock(ps_dec->apv_proc_start_mutex[ps_proc->i4_id]);
1637
20.6k
            if((IHEVCD_ERROR_T)IHEVCD_SUCCESS != ret)
1638
0
                break;
1639
1640
40.2k
            while(!ps_dec->ai4_process_start[ps_proc->i4_id])
1641
19.6k
            {
1642
19.6k
                ithread_cond_wait(ps_dec->apv_proc_start_condition[ps_proc->i4_id],
1643
19.6k
                                  ps_dec->apv_proc_start_mutex[ps_proc->i4_id]);
1644
19.6k
            }
1645
20.6k
            ps_dec->ai4_process_start[ps_proc->i4_id] = 0;
1646
20.6k
            ret = ithread_mutex_unlock(ps_dec->apv_proc_start_mutex[ps_proc->i4_id]);
1647
20.6k
            if((IHEVCD_ERROR_T)IHEVCD_SUCCESS != ret)
1648
0
                break;
1649
1650
20.6k
            DEBUG(" Got control at ihevcd_process_thread \n");
1651
1652
20.6k
            if(ps_dec->i4_break_threads == 1)
1653
985
                break;
1654
20.6k
        }
1655
185k
        while(1)
1656
185k
        {
1657
185k
            proc_job_t s_job;
1658
1659
185k
            ret = ihevcd_jobq_dequeue((jobq_t *)ps_proc->pv_proc_jobq, &s_job,
1660
185k
                                    sizeof(proc_job_t), 1);
1661
185k
            if((IHEVCD_ERROR_T)IHEVCD_SUCCESS != ret)
1662
19.6k
                break;
1663
1664
166k
            ps_proc->i4_ctb_cnt = s_job.i2_ctb_cnt;
1665
166k
            ps_proc->i4_ctb_x = s_job.i2_ctb_x;
1666
166k
            ps_proc->i4_ctb_y = s_job.i2_ctb_y;
1667
166k
            ps_proc->i4_cur_slice_idx = s_job.i2_slice_idx;
1668
1669
1670
1671
166k
            if(CMD_PROCESS == s_job.i4_cmd)
1672
86.7k
            {
1673
86.7k
                ihevcd_init_proc_ctxt(ps_proc, s_job.i4_tu_coeff_data_ofst);
1674
86.7k
                ihevcd_process(ps_proc);
1675
86.7k
            }
1676
79.4k
            else if(CMD_FMTCONV == s_job.i4_cmd)
1677
79.9k
            {
1678
79.9k
                sps_t *ps_sps;
1679
79.9k
                codec_t *ps_codec;
1680
79.9k
                ivd_out_bufdesc_t *ps_out_buffer;
1681
79.9k
                WORD32 num_rows;
1682
1683
79.9k
                if(0 == ps_proc->i4_init_done)
1684
283
                {
1685
283
                    ihevcd_init_proc_ctxt(ps_proc, 0);
1686
283
                }
1687
79.9k
                ps_sps = ps_proc->ps_sps;
1688
79.9k
                ps_codec = ps_proc->ps_codec;
1689
79.9k
                ps_out_buffer = ps_proc->ps_out_buffer;
1690
79.9k
                num_rows = 1 << ps_sps->i1_log2_ctb_size;
1691
1692
79.9k
                num_rows = MIN(num_rows,
1693
79.9k
                               (ps_codec->i4_disp_ht - (s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size))
1694
79.9k
                              );
1695
1696
79.9k
                if(num_rows < 0)
1697
0
                    num_rows = 0;
1698
1699
79.9k
                ihevcd_fmt_conv(ps_proc->ps_codec, ps_proc, ps_out_buffer->pu1_bufs[0],
1700
79.9k
                                ps_out_buffer->pu1_bufs[1], ps_out_buffer->pu1_bufs[2],
1701
79.9k
                                s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size, num_rows);
1702
79.9k
            }
1703
166k
        }
1704
19.6k
        if(ps_proc->ps_codec->i4_threads_active)
1705
19.6k
        {
1706
19.6k
            ret = ithread_mutex_lock(ps_dec->apv_proc_done_mutex[ps_proc->i4_id]);
1707
19.6k
            if((IHEVCD_ERROR_T)IHEVCD_SUCCESS != ret)
1708
0
                break;
1709
1710
19.6k
            ps_dec->ai4_process_done[ps_proc->i4_id] = 1;
1711
19.6k
            ithread_cond_signal(ps_dec->apv_proc_done_condition[ps_proc->i4_id]);
1712
1713
19.6k
            ret = ithread_mutex_unlock(ps_dec->apv_proc_done_mutex[ps_proc->i4_id]);
1714
19.6k
            if((IHEVCD_ERROR_T)IHEVCD_SUCCESS != ret)
1715
0
                break;
1716
19.6k
        }
1717
1
        else
1718
1
        {
1719
1
            break;
1720
1
        }
1721
19.6k
    }
1722
    //ithread_exit(0);
1723
985
    return;
1724
985
}
1725