/******************************************************************************

 *

 * Copyright (C) 2018 The Android Open Source Project

 *

 * Licensed under the Apache License, Version 2.0 (the "License");

 * you may not use this file except in compliance with the License.

 * You may obtain a copy of the License at:

 *

 * http://www.apache.org/licenses/LICENSE-2.0

 *

 * Unless required by applicable law or agreed to in writing, software

 * distributed under the License is distributed on an "AS IS" BASIS,

 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

 * See the License for the specific language governing permissions and

 * limitations under the License.

 *

 *****************************************************************************

 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore

*/

/*!

******************************************************************************

* \file ihevce_memory_init.c

*

* \brief

*    This file contains functions which perform memory requirement gathering

*    and freeing of memories of encoder at the end

*

* \date

*    18/09/2012

*

* \author

*    Ittiam

*

* List of Functions

*    <TODO: TO BE ADDED>

*

******************************************************************************

*/

/*****************************************************************************/

/* File Includes                                                             */

/*****************************************************************************/

/* System include files */

#include <stdio.h>

#include <string.h>

#include <stdlib.h>

#include <assert.h>

#include <stdarg.h>

#include <math.h>

/* User include files */

#include "ihevc_typedefs.h"

#include "itt_video_api.h"

#include "ihevce_api.h"

#include "rc_cntrl_param.h"

#include "rc_frame_info_collector.h"

#include "rc_look_ahead_params.h"

#include "ihevc_defs.h"

#include "ihevc_macros.h"

#include "ihevc_debug.h"

#include "ihevc_structs.h"

#include "ihevc_platform_macros.h"

#include "ihevc_deblk.h"

#include "ihevc_itrans_recon.h"

#include "ihevc_chroma_itrans_recon.h"

#include "ihevc_chroma_intra_pred.h"

#include "ihevc_intra_pred.h"

#include "ihevc_inter_pred.h"

#include "ihevc_mem_fns.h"

#include "ihevc_padding.h"

#include "ihevc_weighted_pred.h"

#include "ihevc_sao.h"

#include "ihevc_resi_trans.h"

#include "ihevc_quant_iquant_ssd.h"

#include "ihevc_cabac_tables.h"

#include "ihevc_common_tables.h"

#include "ihevce_defs.h"

#include "ihevce_hle_interface.h"

#include "ihevce_lap_enc_structs.h"

#include "ihevce_lap_interface.h"

#include "ihevce_multi_thrd_structs.h"

#include "ihevce_multi_thrd_funcs.h"

#include "ihevce_me_common_defs.h"

#include "ihevce_had_satd.h"

#include "ihevce_error_codes.h"

#include "ihevce_bitstream.h"

#include "ihevce_cabac.h"

#include "ihevce_rdoq_macros.h"

#include "ihevce_function_selector.h"

#include "ihevce_enc_structs.h"

#include "ihevce_entropy_structs.h"

#include "ihevce_cmn_utils_instr_set_router.h"

#include "ihevce_ipe_instr_set_router.h"

#include "ihevce_decomp_pre_intra_structs.h"

#include "ihevce_decomp_pre_intra_pass.h"

#include "ihevce_enc_loop_structs.h"

#include "ihevce_nbr_avail.h"

#include "ihevce_enc_loop_utils.h"

#include "ihevce_sub_pic_rc.h"

#include "ihevce_global_tables.h"

#include "ihevce_bs_compute_ctb.h"

#include "ihevce_cabac_rdo.h"

#include "ihevce_deblk.h"

#include "ihevce_entropy_interface.h"

#include "ihevce_frame_process.h"

#include "ihevce_ipe_pass.h"

#include "ihevce_rc_enc_structs.h"

#include "ihevce_rc_interface.h"

#include "hme_datatype.h"

#include "hme_interface.h"

#include "hme_common_defs.h"

#include "hme_defs.h"

#include "ihevce_me_instr_set_router.h"

#include "ihevce_enc_subpel_gen.h"

#include "ihevce_inter_pred.h"

#include "ihevce_mv_pred.h"

#include "ihevce_mv_pred_merge.h"

#include "ihevce_enc_loop_inter_mode_sifter.h"

#include "ihevce_me_pass.h"

#include "ihevce_coarse_me_pass.h"

#include "ihevce_enc_cu_recursion.h"

#include "ihevce_enc_loop_pass.h"

#include "ihevce_common_utils.h"

#include "ihevce_buffer_que_interface.h"

#include "ihevce_dep_mngr_interface.h"

#include "ihevce_sao.h"

#include "ihevce_tile_interface.h"

#include "cast_types.h"

#include "osal.h"

#include "osal_defaults.h"

/*****************************************************************************/

/* Function Definitions                                                      */

/*****************************************************************************/

/*!

******************************************************************************

* \if Function name : ihevce_mem_manager_init \endif

*

* \brief

*    Encoder Memory init function

*

* \param[in] Processing interface context pointer

*

* \return

*    None

*

* \author

*  Ittiam

*

*****************************************************************************

*/

#define MAX_QUEUE 40

void ihevce_mem_manager_init(enc_ctxt_t *ps_enc_ctxt, ihevce_hle_ctxt_t *ps_intrf_ctxt)

{

    /* local variables */

    WORD32 total_memtabs_req = 0;

    WORD32 total_memtabs_used = 0;

    WORD32 total_system_memtabs = 0;

    WORD32 ctr;

    WORD32 buf_size;

    WORD32 num_ctb_horz;

    WORD32 num_ctb_vert;

    WORD32 num_cu_in_ctb;

    WORD32 num_pu_in_ctb;

    WORD32 num_tu_in_ctb;

    WORD32 ctb_size;

    WORD32 min_cu_size;

    WORD32 max_num_ref_pics;

    WORD32 mem_alloc_ctrl_flag;

    WORD32 space_for_mem_in_enc_grp = 0;

    WORD32 space_for_mem_in_pre_enc_grp = 0;

    WORD32 mv_bank_size;

    WORD32 ref_idx_bank_size;

    WORD32 a_wd[MAX_NUM_HME_LAYERS], a_ht[MAX_NUM_HME_LAYERS];

    WORD32 a_disp_wd[MAX_NUM_HME_LAYERS], a_disp_ht[MAX_NUM_HME_LAYERS];

    WORD32 a_ctb_align_wd[MAX_NUM_HME_LAYERS], a_ctb_align_ht[MAX_NUM_HME_LAYERS];

    WORD32 n_enc_layers = 1, n_tot_layers;

    WORD32 num_bufs_preenc_me_que, num_bufs_L0_ipe_enc, max_delay_preenc_l0_que;

    WORD32 i, i4_resolution_id = ps_enc_ctxt->i4_resolution_id;  //counter

    WORD32 i4_num_bitrate_inst;

    iv_mem_rec_t *ps_memtab;

    WORD32 i4_field_pic, i4_total_queues = 0;

    recon_pic_buf_t **pps_pre_enc_pic_bufs;

    frm_proc_ent_cod_ctxt_t **pps_frm_proc_ent_cod_bufs[IHEVCE_MAX_NUM_BITRATES];

    pre_enc_me_ctxt_t **pps_pre_enc_bufs;

    me_enc_rdopt_ctxt_t **pps_me_enc_bufs;

    pre_enc_L0_ipe_encloop_ctxt_t **pps_L0_ipe_enc_bufs;

    /*get number of input buffer required based on requirement from each stage*/

    ihevce_lap_enc_buf_t **pps_lap_enc_input_bufs;

    WORD32 i4_num_enc_loop_frm_pllel;

    WORD32 i4_num_me_frm_pllel;

    /*msr: These are parameters required to allocate input buffer,

    encoder needs to be initilized before getting requirements hence filled once static params are initilized*/

    WORD32 num_input_buf_per_queue, i4_yuv_min_size, i4_luma_min_size;

    i4_num_bitrate_inst = ps_enc_ctxt->i4_num_bitrates;

    i4_field_pic = ps_enc_ctxt->ps_stat_prms->s_src_prms.i4_field_pic;

    ps_intrf_ctxt->i4_gpu_mem_size = 0;

    /*Initialize the thrd id flag and all deafult values for sub pic rc */

    {

        WORD32 i, j, k;

        for(i = 0; i < MAX_NUM_ENC_LOOP_PARALLEL; i++)

        {

            for(j = 0; j < IHEVCE_MAX_NUM_BITRATES; j++)

            {

                ps_enc_ctxt->s_multi_thrd.ai4_acc_ctb_ctr[i][j] = 0;

                ps_enc_ctxt->s_multi_thrd.ai4_ctb_ctr[i][j] = 0;

                ps_enc_ctxt->s_multi_thrd.ai4_threshold_reached[i][j] = 0;

                ps_enc_ctxt->s_multi_thrd.ai4_curr_qp_acc[i][j] = 0;

                ps_enc_ctxt->s_multi_thrd.af_acc_hdr_bits_scale_err[i][j] = 0;

                for(k = 0; k < MAX_NUM_FRM_PROC_THRDS_ENC; k++)

                {

                    ps_enc_ctxt->s_multi_thrd.ai4_thrd_id_valid_flag[i][j][k] = -1;

                }

            }

        }

    }

#define ENABLE_FRM_PARALLEL

#ifdef ENABLE_FRM_PARALLEL

    i4_num_enc_loop_frm_pllel = MAX_NUM_ENC_LOOP_PARALLEL;

    i4_num_me_frm_pllel = MAX_NUM_ME_PARALLEL;

#else

    i4_num_enc_loop_frm_pllel = 1;

    i4_num_me_frm_pllel = 1;

#endif

    ps_enc_ctxt->s_multi_thrd.i4_num_enc_loop_frm_pllel = i4_num_enc_loop_frm_pllel;

    ps_enc_ctxt->i4_max_fr_enc_loop_parallel_rc = i4_num_enc_loop_frm_pllel;

    ps_enc_ctxt->s_multi_thrd.i4_num_me_frm_pllel = i4_num_me_frm_pllel;

    ps_enc_ctxt->s_multi_thrd.i4_force_end_flag = 0;

    ps_enc_ctxt->i4_ref_mbr_id = 0;

    /* get the ctb size from max cu size */

    ctb_size = ps_enc_ctxt->ps_stat_prms->s_config_prms.i4_max_log2_cu_size;

    /* get the min cu size from config params */

    min_cu_size = ps_enc_ctxt->ps_stat_prms->s_config_prms.i4_min_log2_cu_size;

    /* convert to actual width */

    ctb_size = 1 << ctb_size;

    min_cu_size = 1 << min_cu_size;

    /* Get the width and heights of different decomp layers */

    *a_wd =

        ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[ps_enc_ctxt->i4_resolution_id]

            .i4_width +

        SET_CTB_ALIGN(

            ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[ps_enc_ctxt->i4_resolution_id]

                .i4_width,

            min_cu_size);

    *a_ht =

        ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[ps_enc_ctxt->i4_resolution_id]

            .i4_height +

        SET_CTB_ALIGN(

            ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[ps_enc_ctxt->i4_resolution_id]

                .i4_height,

            min_cu_size);

    n_tot_layers = hme_derive_num_layers(n_enc_layers, a_wd, a_ht, a_disp_wd, a_disp_ht);

    hme_coarse_get_layer1_mv_bank_ref_idx_size(

        n_tot_layers,

        a_wd,

        a_ht,

        ((ps_enc_ctxt->ps_stat_prms->s_coding_tools_prms.i4_max_reference_frames == -1)

             ? ((DEFAULT_MAX_REFERENCE_PICS) << i4_field_pic)

             : ps_enc_ctxt->ps_stat_prms->s_coding_tools_prms.i4_max_reference_frames),

        (S32 *)(&mv_bank_size),

        (S32 *)(&ref_idx_bank_size));

    if(n_tot_layers < 3)

    {

        WORD32 error_code;

        error_code = IHEVCE_NUM_DECOMP_LYRS_NOT_SUPPORTED;

        ps_intrf_ctxt->i4_error_code = IHEVCE_SETUNSUPPORTEDINPUT(error_code);

        return;

    }

    /* calculate num cu,pu,tu in ctb */

    num_cu_in_ctb = ctb_size / MIN_CU_SIZE;

    num_cu_in_ctb *= num_cu_in_ctb;

    num_pu_in_ctb = ctb_size / MIN_PU_SIZE;

    num_pu_in_ctb *= num_pu_in_ctb;

    num_tu_in_ctb = ctb_size / MIN_PU_SIZE;

    num_tu_in_ctb *= num_tu_in_ctb;

    /* calcuate the number of ctb horizontally*/

    num_ctb_horz =

        ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[ps_enc_ctxt->i4_resolution_id]

            .i4_width +

        SET_CTB_ALIGN(

            ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[ps_enc_ctxt->i4_resolution_id]

                .i4_width,

            ctb_size);

    num_ctb_horz = num_ctb_horz / ctb_size;

    /* calcuate the number of ctb vertically*/

    num_ctb_vert =

        ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[ps_enc_ctxt->i4_resolution_id]

            .i4_height +

        SET_CTB_ALIGN(

            ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[ps_enc_ctxt->i4_resolution_id]

                .i4_height,

            ctb_size);

    num_ctb_vert = num_ctb_vert / ctb_size;

    /* align all the decomp layer dimensions to CTB alignment */

    for(ctr = 0; ctr < n_tot_layers; ctr++)

    {

        a_ctb_align_wd[ctr] = a_wd[ctr] + SET_CTB_ALIGN(a_wd[ctr], ctb_size);

        a_ctb_align_ht[ctr] = a_ht[ctr] + SET_CTB_ALIGN(a_ht[ctr], ctb_size);

    }

    /* SEI related parametert initialization */

    ps_enc_ctxt->u4_cur_pic_encode_cnt = 0;

    /* store the frame level ctb parameters which will be constant for the session */

    ps_enc_ctxt->s_frm_ctb_prms.i4_ctb_size = ctb_size;

    ps_enc_ctxt->s_frm_ctb_prms.i4_min_cu_size = min_cu_size;

    ps_enc_ctxt->s_frm_ctb_prms.i4_num_cus_in_ctb = num_cu_in_ctb;

    ps_enc_ctxt->s_frm_ctb_prms.i4_num_pus_in_ctb = num_pu_in_ctb;

    ps_enc_ctxt->s_frm_ctb_prms.i4_num_tus_in_ctb = num_tu_in_ctb;

    /* intialize cra poc to default value */

    ps_enc_ctxt->i4_cra_poc = 0;

    /* initialise the memory alloc control flag */

    mem_alloc_ctrl_flag = ps_enc_ctxt->ps_stat_prms->s_multi_thrd_prms.i4_memory_alloc_ctrl_flag;

    /* decide the memory space for enc_grp and pre_enc_grp based on control flag */

    if(0 == mem_alloc_ctrl_flag)

    {

        /* normal memory */

        space_for_mem_in_enc_grp = IV_EXT_CACHEABLE_NORMAL_MEM;

        space_for_mem_in_pre_enc_grp = IV_EXT_CACHEABLE_NORMAL_MEM;

    }

    else if(1 == mem_alloc_ctrl_flag)

    {

        /* only NUMA Node 0 memory allocation */

        space_for_mem_in_enc_grp = IV_EXT_CACHEABLE_NUMA_NODE0_MEM;

        space_for_mem_in_pre_enc_grp = IV_EXT_CACHEABLE_NUMA_NODE0_MEM;

    }

    else if(2 == mem_alloc_ctrl_flag)

    {

        /* Both NUMA Node 0 & Node 1 memory allocation */

        space_for_mem_in_enc_grp = IV_EXT_CACHEABLE_NUMA_NODE0_MEM;

        space_for_mem_in_pre_enc_grp = IV_EXT_CACHEABLE_NUMA_NODE1_MEM;

    }

    else

    {

        /* should not enter here */

        ASSERT(0);

    }

    {

        if(ps_enc_ctxt->s_multi_thrd.i4_num_enc_loop_frm_pllel > 1)

        {

            num_bufs_preenc_me_que = MIN_L1_L0_STAGGER_NON_SEQ +

                                     ps_enc_ctxt->ps_stat_prms->s_lap_prms.i4_rc_look_ahead_pics +

                                     (MAX_L0_IPE_ENC_STAGGER - 1) + NUM_BUFS_DECOMP_HME;

        }

        else

        {

            num_bufs_preenc_me_que = MIN_L1_L0_STAGGER_NON_SEQ +

                                     ps_enc_ctxt->ps_stat_prms->s_lap_prms.i4_rc_look_ahead_pics +

                                     (MIN_L0_IPE_ENC_STAGGER - 1) + NUM_BUFS_DECOMP_HME;

        }

        /*The number of buffers to support stagger between L0 IPE, ME and enc loop. This is a separate queue to store L0 IPE

        output to save memory since this is not used in L1 stage*/

        if(ps_enc_ctxt->s_multi_thrd.i4_num_enc_loop_frm_pllel > 1)

        {

            num_bufs_L0_ipe_enc = MAX_L0_IPE_ENC_STAGGER;

        }

        else

        {

            num_bufs_L0_ipe_enc = MIN_L0_IPE_ENC_STAGGER;

        }

        max_delay_preenc_l0_que = MIN_L1_L0_STAGGER_NON_SEQ +

                                  ps_enc_ctxt->ps_stat_prms->s_lap_prms.i4_rc_look_ahead_pics + 1;

    }

    /* ------------ popluate the lap static parameters ------------- */

    ps_enc_ctxt->s_lap_stat_prms.i4_max_closed_gop_period =

        ps_enc_ctxt->ps_stat_prms->s_coding_tools_prms.i4_max_closed_gop_period;

    ps_enc_ctxt->s_lap_stat_prms.i4_min_closed_gop_period =

        ps_enc_ctxt->ps_stat_prms->s_coding_tools_prms.i4_min_closed_gop_period;

    ps_enc_ctxt->s_lap_stat_prms.i4_max_cra_open_gop_period =

        ps_enc_ctxt->ps_stat_prms->s_coding_tools_prms.i4_max_cra_open_gop_period;

    ps_enc_ctxt->s_lap_stat_prms.i4_max_i_open_gop_period =

        ps_enc_ctxt->ps_stat_prms->s_coding_tools_prms.i4_max_i_open_gop_period;

    ps_enc_ctxt->s_lap_stat_prms.i4_max_reference_frames =

        ps_enc_ctxt->ps_stat_prms->s_coding_tools_prms.i4_max_reference_frames;

    ps_enc_ctxt->s_lap_stat_prms.i4_max_temporal_layers =

        ps_enc_ctxt->ps_stat_prms->s_coding_tools_prms.i4_max_temporal_layers;

    ps_enc_ctxt->s_lap_stat_prms.i4_width = ps_enc_ctxt->ps_stat_prms->s_src_prms.i4_width;

    ps_enc_ctxt->s_lap_stat_prms.i4_height = ps_enc_ctxt->ps_stat_prms->s_src_prms.i4_height;

    ps_enc_ctxt->s_lap_stat_prms.i4_enable_logo = ps_enc_ctxt->ps_stat_prms->i4_enable_logo;

    ps_enc_ctxt->s_lap_stat_prms.i4_src_interlace_field =

        ps_enc_ctxt->ps_stat_prms->s_src_prms.i4_field_pic;

    ps_enc_ctxt->s_lap_stat_prms.i4_frame_rate =

        ps_enc_ctxt->ps_stat_prms->s_src_prms.i4_frm_rate_num /

        ps_enc_ctxt->ps_stat_prms->s_src_prms.i4_frm_rate_denom;

    ps_enc_ctxt->s_lap_stat_prms.i4_blu_ray_spec = ps_enc_ctxt->i4_blu_ray_spec;

    ps_enc_ctxt->s_lap_stat_prms.i4_internal_bit_depth =

        ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.i4_internal_bit_depth;

    ps_enc_ctxt->s_lap_stat_prms.i4_input_bit_depth =

        ps_enc_ctxt->ps_stat_prms->s_src_prms.i4_input_bit_depth;

    ps_enc_ctxt->s_lap_stat_prms.u1_chroma_array_type =

        (ps_enc_ctxt->ps_stat_prms->s_src_prms.i4_chr_format == IV_YUV_422SP_UV) ? 2 : 1;

    ps_enc_ctxt->s_lap_stat_prms.i4_rc_pass_num = ps_enc_ctxt->ps_stat_prms->s_pass_prms.i4_pass;

    if(0 == i4_resolution_id)

    {

        for(ctr = 0; ctr < ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.i4_num_res_layers; ctr++)

        {

            ps_enc_ctxt->s_lap_stat_prms.ai4_quality_preset[ctr] =

                ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[ctr].i4_quality_preset;

            if(ps_enc_ctxt->s_lap_stat_prms.ai4_quality_preset[ctr] == IHEVCE_QUALITY_P7)

            {

                ps_enc_ctxt->s_lap_stat_prms.ai4_quality_preset[ctr] = IHEVCE_QUALITY_P6;

            }

        }

    }

    memcpy(

        &ps_enc_ctxt->s_lap_stat_prms.s_lap_params,

        &ps_enc_ctxt->ps_stat_prms->s_lap_prms,

        sizeof(ihevce_lap_params_t));

    /* copy the create prms as runtime prms */

    memcpy(

        &ps_enc_ctxt->s_runtime_src_prms,

        &ps_enc_ctxt->ps_stat_prms->s_src_prms,

        sizeof(ihevce_src_params_t));

    /*Copy the target params*/

    memcpy(

        &ps_enc_ctxt->s_runtime_tgt_params,

        &ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id],

        sizeof(ihevce_tgt_params_t));

    ps_enc_ctxt->s_lap_stat_prms.e_arch_type = ps_enc_ctxt->ps_stat_prms->e_arch_type;

    ps_enc_ctxt->s_lap_stat_prms.u1_is_popcnt_available = ps_enc_ctxt->u1_is_popcnt_available;

    /* copy the create prms as runtime prms */

    memcpy(

        &ps_enc_ctxt->s_runtime_src_prms,

        &ps_enc_ctxt->ps_stat_prms->s_src_prms,

        sizeof(ihevce_src_params_t));

    /*Copy the target params*/

    memcpy(

        &ps_enc_ctxt->s_runtime_tgt_params,

        &ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id],

        sizeof(ihevce_tgt_params_t));

    /* copy the run time coding parameters */

    memcpy(

        &ps_enc_ctxt->s_runtime_coding_prms,

        &ps_enc_ctxt->ps_stat_prms->s_coding_tools_prms,

        sizeof(ihevce_coding_params_t));

    /*change in run time parameter*/

    if(ps_enc_ctxt->ps_stat_prms->s_coding_tools_prms.i4_max_reference_frames == -1)

    {

        ps_enc_ctxt->s_runtime_coding_prms.i4_max_reference_frames = (DEFAULT_MAX_REFERENCE_PICS)

                                                                     << i4_field_pic;

        ps_enc_ctxt->s_lap_stat_prms.i4_max_reference_frames =

            ps_enc_ctxt->s_runtime_coding_prms.i4_max_reference_frames;

    }

    ASSERT(i4_num_enc_loop_frm_pllel == i4_num_me_frm_pllel);

    if((1 == i4_num_enc_loop_frm_pllel) && (1 == i4_num_me_frm_pllel))

    {

        max_num_ref_pics = ps_enc_ctxt->s_runtime_coding_prms.i4_max_reference_frames;

    }

    else

    {

        max_num_ref_pics =

            ps_enc_ctxt->s_runtime_coding_prms.i4_max_reference_frames * i4_num_enc_loop_frm_pllel;

    }

    /* --------------------------------------------------------------------- */

    /* --------------  Collating the number of memtabs required ------------ */

    /* --------------------------------------------------------------------- */

    /* Memtabs for syntactical tiles */

    total_memtabs_req += ihevce_tiles_get_num_mem_recs();

    /* ---------- Enc loop Memtabs --------- */

    total_memtabs_req +=

        ihevce_enc_loop_get_num_mem_recs(i4_num_bitrate_inst, i4_num_enc_loop_frm_pllel);

    /* ---------- ME Memtabs --------------- */

    total_memtabs_req += ihevce_me_get_num_mem_recs(i4_num_me_frm_pllel);

    /* ---------- Coarse ME Memtabs --------------- */

    total_memtabs_req += ihevce_coarse_me_get_num_mem_recs();

    /* ---------- IPE Memtabs -------------- */

    total_memtabs_req += ihevce_ipe_get_num_mem_recs();

    /* ---------- ECD Memtabs -------------- */

    for(i = 0; i < i4_num_bitrate_inst; i++)

    {

        total_memtabs_req += ihevce_entropy_get_num_mem_recs();

    }

    if(0 == ps_enc_ctxt->i4_resolution_id)

    {

        /* ---------- LAP Memtabs--------------- */

        total_memtabs_req += ihevce_lap_get_num_mem_recs();

    }

    /* ---------- Decomp Pre Intra Memtabs--------------- */

    total_memtabs_req += ihevce_decomp_pre_intra_get_num_mem_recs();

    /* ---------- RC memtabs --------------- */

    for(i = 0; i < i4_num_bitrate_inst; i++)

    {

        total_memtabs_req += ihevce_rc_get_num_mem_recs(); /*HEVC_RC*/

    }

    /* ---------- System Memtabs ----------- */

    total_memtabs_req += TOTAL_SYSTEM_MEM_RECS;  //increment this based on final requirement

    /* -----Frameproc Entcod Que Memtabs --- */

    /* one queue for each bit-rate is used */

    for(i = 0; i < i4_num_bitrate_inst; i++)

    {

        total_memtabs_req += ihevce_buff_que_get_num_mem_recs();

    }

    /* mrs:memtab for one queue for encoder owned input queue, This is only request for memtab, currently more than

    required memtabs are allocated. Hence my change of using memtab for yuv buffers is surviving. Only memtab

    usage and initialization needs to be exact sync*/

    total_memtabs_req += ihevce_buff_que_get_num_mem_recs();

    /* ---Pre-encode Encode Que Mem requests -- */

    total_memtabs_req += ihevce_buff_que_get_num_mem_recs();

    /* -----ME / Enc-RD opt Que Mem requests --- */

    total_memtabs_req += ihevce_buff_que_get_num_mem_recs();

    /* ----Pre-encode L0 IPE to enc Que Mem requests -- */

    total_memtabs_req += ihevce_buff_que_get_num_mem_recs();

    /* --- ME-EncLoop Dep Mngr Row-Row Mem requests -- */

    total_memtabs_req += NUM_ME_ENC_BUFS * ihevce_dmgr_get_num_mem_recs();

    /* --- Prev. frame EncLoop Done Dep Mngr Frm-Frm Mem requests -- */

    total_memtabs_req += i4_num_enc_loop_frm_pllel * ihevce_dmgr_get_num_mem_recs();

    /* --- Prev. frame EncLoop Done for re-encode Dep Mngr Frm-Frm Mem requests -- */

    total_memtabs_req += ihevce_dmgr_get_num_mem_recs();

    /* --- Prev. frame ME Done Dep Mngr Frm-Frm Mem requests -- */

    total_memtabs_req += i4_num_me_frm_pllel * ihevce_dmgr_get_num_mem_recs();

    /* --- Prev. frame PreEnc L1 Done Dep Mngr Frm-Frm Mem requests -- */

    total_memtabs_req += ihevce_dmgr_get_num_mem_recs();

    /* --- Prev. frame PreEnc HME Done Dep Mngr Frm-Frm Mem requests -- */

    total_memtabs_req += ihevce_dmgr_get_num_mem_recs();

    /* --- Prev. frame PreEnc L0 Done Dep Mngr Frm-Frm Mem requests -- */

    total_memtabs_req += ihevce_dmgr_get_num_mem_recs();

    /* --- ME-Prev Recon Dep Mngr Row-Frm Mem requests -- */

    total_memtabs_req +=

        (max_num_ref_pics + 1 + NUM_EXTRA_RECON_BUFS) * ihevce_dmgr_get_num_mem_recs();

    /* ----- allocate memomry for memtabs --- */

    {

        iv_mem_rec_t s_memtab;

        s_memtab.i4_size = sizeof(iv_mem_rec_t);

        s_memtab.i4_mem_size = total_memtabs_req * sizeof(iv_mem_rec_t);

        s_memtab.e_mem_type = IV_EXT_CACHEABLE_NORMAL_MEM;

        s_memtab.i4_mem_alignment = 4;

        ps_intrf_ctxt->ihevce_mem_alloc(

            ps_intrf_ctxt->pv_mem_mgr_hdl, &ps_enc_ctxt->ps_stat_prms->s_sys_api, &s_memtab);

        if(s_memtab.pv_base == NULL)

        {

            ps_intrf_ctxt->i4_error_code = IHEVCE_CANNOT_ALLOCATE_MEMORY;

            return;

        }

        ps_memtab = (iv_mem_rec_t *)s_memtab.pv_base;

    }

    /* --------------------------------------------------------------------- */

    /* ------------------  Collating memory requirements ------------------- */

    /* --------------------------------------------------------------------- */

    /* ----------- Tiles mem requests -------------*/

    total_memtabs_used += ihevce_tiles_get_mem_recs(

        &ps_memtab[total_memtabs_used],

        ps_enc_ctxt->ps_stat_prms,

        &ps_enc_ctxt->s_frm_ctb_prms,

        i4_resolution_id,

        space_for_mem_in_enc_grp);

    /* ---------- Enc loop Mem requests --------- */

    total_memtabs_used += ihevce_enc_loop_get_mem_recs(

        &ps_memtab[total_memtabs_used],

        ps_enc_ctxt->ps_stat_prms,

        ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds,

        i4_num_bitrate_inst,

        i4_num_enc_loop_frm_pllel,

        space_for_mem_in_enc_grp,

        i4_resolution_id);

    /* ---------- ME Mem requests --------------- */

    total_memtabs_used += ihevce_me_get_mem_recs(

        &ps_memtab[total_memtabs_used],

        ps_enc_ctxt->ps_stat_prms,

        ps_enc_ctxt->s_multi_thrd.i4_num_enc_proc_thrds,

        space_for_mem_in_enc_grp,

        i4_resolution_id,

        i4_num_me_frm_pllel);

    /* ---------- Coarse ME Mem requests --------------- */

    total_memtabs_used += ihevce_coarse_me_get_mem_recs(

        &ps_memtab[total_memtabs_used],

        ps_enc_ctxt->ps_stat_prms,

        ps_enc_ctxt->s_multi_thrd.i4_num_pre_enc_proc_thrds,

        space_for_mem_in_pre_enc_grp,

        i4_resolution_id);

    /* ---------- IPE Mem requests -------------- */

    total_memtabs_used += ihevce_ipe_get_mem_recs(

        &ps_memtab[total_memtabs_used],

        ps_enc_ctxt->s_multi_thrd.i4_num_pre_enc_proc_thrds,

        space_for_mem_in_pre_enc_grp);

    /* ---------- ECD Mem requests -------------- */

    i4_num_bitrate_inst = ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id]

                              .i4_num_bitrate_instances;

    for(i = 0; i < i4_num_bitrate_inst; i++)

    {

        total_memtabs_used += ihevce_entropy_get_mem_recs(

            &ps_memtab[total_memtabs_used],

            ps_enc_ctxt->ps_stat_prms,

            space_for_mem_in_pre_enc_grp,

            i4_resolution_id);

    }

    if(0 == i4_resolution_id)

    {

        /* ---------- LAP Mem requests--------------- */

        total_memtabs_used +=

            ihevce_lap_get_mem_recs(&ps_memtab[total_memtabs_used], space_for_mem_in_pre_enc_grp);

    }

    /* -------- DECOMPOSITION PRE INTRA Mem requests-------- */

    total_memtabs_used += ihevce_decomp_pre_intra_get_mem_recs(

        &ps_memtab[total_memtabs_used],

        ps_enc_ctxt->s_multi_thrd.i4_num_pre_enc_proc_thrds,

        space_for_mem_in_pre_enc_grp);

    /* ---------- RC Mem requests --------------- */

    for(i = 0; i < i4_num_bitrate_inst; i++)

    {

        total_memtabs_used += ihevce_rc_get_mem_recs(

            &ps_memtab[total_memtabs_used],

            ps_enc_ctxt->ps_stat_prms,

            space_for_mem_in_pre_enc_grp,

            &ps_enc_ctxt->ps_stat_prms->s_sys_api);

    }

    /* ---------- System Mem requests ----------- */

    /* allocate memory for pps tile */

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    if(1 == ps_enc_ctxt->ps_stat_prms->s_app_tile_params.i4_tiles_enabled_flag)

    {

        ps_memtab[total_memtabs_used].i4_mem_size =

            (ps_enc_ctxt->ps_stat_prms->s_app_tile_params.i4_num_tile_cols *

             ps_enc_ctxt->ps_stat_prms->s_app_tile_params.i4_num_tile_rows) *

            (sizeof(tile_t));

    }

    else

    {

        ps_memtab[total_memtabs_used].i4_mem_size = sizeof(tile_t);

    }

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* recon picture buffer pointer array */

    for(i = 0; i < i4_num_bitrate_inst; i++)

    {

        ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

        ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

        ps_memtab[total_memtabs_used].i4_mem_size =

            (max_num_ref_pics + 1 + NUM_EXTRA_RECON_BUFS) * (sizeof(recon_pic_buf_t *));

        /* increment the memtab counter */

        total_memtabs_used++;

        total_system_memtabs++;

    }

    /* recon picture buffers structures */

    for(i = 0; i < i4_num_bitrate_inst; i++)

    {

        ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

        ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

        ps_memtab[total_memtabs_used].i4_mem_size =

            (max_num_ref_pics + 1 + NUM_EXTRA_RECON_BUFS) * (sizeof(recon_pic_buf_t));

        /* increment the memtab counter */

        total_memtabs_used++;

        total_system_memtabs++;

    }

    /* reference/recon picture buffers */

    for(i = 0; i < i4_num_bitrate_inst; i++)

    {

        WORD32 i4_chroma_buf_size_shift =

            -(ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.i4_internal_bit_depth <= 8) +

            (ps_enc_ctxt->ps_stat_prms->s_src_prms.i4_chr_format == IV_YUV_422SP_UV);

        buf_size = ((num_ctb_horz * ctb_size) + (PAD_HORZ << 1));

        buf_size = buf_size * ((num_ctb_vert * ctb_size) + (PAD_VERT << 1));

        buf_size = buf_size * (max_num_ref_pics + 1 + NUM_EXTRA_RECON_BUFS);

        ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

        ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

        /* If HBD, both 8bit and 16 bit luma buffers are required, whereas only 16bit chroma buffers are required */

        ps_memtab[total_memtabs_used].i4_mem_size =

            /* Luma */

            (buf_size * ((ps_enc_ctxt->ps_stat_prms->s_tgt_lyr_prms.i4_internal_bit_depth > 8)

                             ? BUFFER_SIZE_MULTIPLIER_IF_HBD

                             : 1)) +

            /* Chroma */

            (SHL_NEG(buf_size, i4_chroma_buf_size_shift));

        /* increment the memtab counter */

        total_memtabs_used++;

        total_system_memtabs++;

    }

    /* reference/recon picture subpel planes */

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size =

        buf_size * (3 + L0ME_IN_OPENLOOP_MODE); /* 3 planes */

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* reference colocated MV bank */

    /* Keep memory for an extra CTB at the right and bottom of frame.

    This extra space is needed by dist-encoding and unused in non-dist-encoding */

    buf_size = (num_ctb_horz + 1) * (num_ctb_vert + 1) * num_pu_in_ctb;

    buf_size = buf_size * sizeof(pu_col_mv_t) * (max_num_ref_pics + 1 + NUM_EXTRA_RECON_BUFS) *

               i4_num_bitrate_inst;

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size = buf_size;

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* reference colocated MV bank map */

    /* Keep memory for an extra CTB at the right and bottom of frame.

    This extra space is needed by dist-encoding and unused in non-dist-encoding */

    buf_size = (num_ctb_horz + 1) * (num_ctb_vert + 1) * num_pu_in_ctb;

    buf_size = buf_size * sizeof(UWORD8) * (max_num_ref_pics + 1 + NUM_EXTRA_RECON_BUFS) *

               i4_num_bitrate_inst;

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size = buf_size;

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* reference collocated MV bank map offsets map */

    buf_size = num_ctb_horz * num_ctb_vert;

    buf_size = buf_size * sizeof(UWORD16) * (max_num_ref_pics + 1 + NUM_EXTRA_RECON_BUFS) *

               i4_num_bitrate_inst;

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size = buf_size;

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* reference colocated MV bank ctb offset */

    buf_size = num_ctb_horz;

    buf_size = buf_size * num_ctb_vert;

    buf_size = buf_size * sizeof(UWORD32) * (max_num_ref_pics + 1 + NUM_EXTRA_RECON_BUFS) *

               i4_num_bitrate_inst;

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size = buf_size;

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* recon picture buffer pointer array for pre enc group */

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size =

        (max_num_ref_pics + 1) * (sizeof(recon_pic_buf_t *));

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* recon picture buffers structures for pre enc group */

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size = (max_num_ref_pics + 1) * (sizeof(recon_pic_buf_t));

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    {

        num_input_buf_per_queue = ihevce_lap_get_num_ip_bufs(&ps_enc_ctxt->s_lap_stat_prms);

        {

            WORD32 i4_count_temp = 0, i4_last_queue_length;

            /*First allocate the memory for the buffer based on resolution*/

            WORD32 ctb_align_pic_wd = ps_enc_ctxt->s_runtime_tgt_params.i4_width +

                                      SET_CTB_ALIGN(

                                          ps_enc_ctxt->s_runtime_tgt_params.i4_width,

                                          ps_enc_ctxt->s_frm_ctb_prms.i4_ctb_size);

            WORD32 ctb_align_pic_ht = ps_enc_ctxt->s_runtime_tgt_params.i4_height +

                                      SET_CTB_ALIGN(

                                          ps_enc_ctxt->s_runtime_tgt_params.i4_height,

                                          ps_enc_ctxt->s_frm_ctb_prms.i4_ctb_size);

            i4_last_queue_length = (num_input_buf_per_queue % MAX_QUEUE);

            if((num_input_buf_per_queue % MAX_QUEUE) == 0)

                i4_last_queue_length = MAX_QUEUE;

            ps_enc_ctxt->i4_num_input_buf_per_queue = num_input_buf_per_queue;

            i4_yuv_min_size =

                (ctb_align_pic_wd * ctb_align_pic_ht) +

                ((ps_enc_ctxt->ps_stat_prms->s_src_prms.i4_chr_format == IV_YUV_422SP_UV)

                     ? (ctb_align_pic_wd * ctb_align_pic_ht)

                     : ((ctb_align_pic_wd * ctb_align_pic_ht) >> 1));

            i4_luma_min_size = (ctb_align_pic_wd * ctb_align_pic_ht);

            /*Inorder to allocate memory for the large buffer sizes overflowing WORD32 we are splitting the memtabs using i4_total_hbd_queues and MAX_HBD_QUEUE*/

            i4_total_queues = num_input_buf_per_queue / MAX_QUEUE;

            if((num_input_buf_per_queue % MAX_QUEUE) != 0)

            {

                i4_total_queues++;

            }

            ASSERT(i4_total_queues < 5);

            for(i4_count_temp = 0; i4_count_temp < i4_total_queues; i4_count_temp++)

            {

                ps_memtab[total_memtabs_used].i4_mem_alignment = 32;

                ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

                /*Memory size for yuv buffer of one frame * num of input required to stored in the queue*/

                if((i4_count_temp < (i4_total_queues - 1)))

                    ps_memtab[total_memtabs_used].i4_mem_size = i4_yuv_min_size * MAX_QUEUE;

                else

                    ps_memtab[total_memtabs_used].i4_mem_size =

                        (i4_yuv_min_size)*i4_last_queue_length;

                /* increment the memtab counter */

                total_memtabs_used++;

                total_system_memtabs++;

            }

        }

        /*memory for input buffer structure*/

        ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

        ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

        ps_memtab[total_memtabs_used].i4_mem_size =

            (num_input_buf_per_queue) * (sizeof(ihevce_lap_enc_buf_t *));

        /* increment the memtab counter */

        total_memtabs_used++;

        total_system_memtabs++;

        /* frame process/entropy coding buffer structures */

        ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

        ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

        ps_memtab[total_memtabs_used].i4_mem_size =

            (num_input_buf_per_queue) * (sizeof(ihevce_lap_enc_buf_t));

        /* increment the memtab counter */

        total_memtabs_used++;

        total_system_memtabs++;

        /*input synch ctrl command*/

        ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

        ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

        ps_memtab[total_memtabs_used].i4_mem_size =

            (num_input_buf_per_queue) * (ENC_COMMAND_BUFF_SIZE);

        total_memtabs_used++;

        total_system_memtabs++;

    }

    /* Pre-encode/encode coding buffer pointer array */

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size =

        (num_bufs_preenc_me_que) * (sizeof(pre_enc_me_ctxt_t *));

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* frame process/entropy coding buffer structures */

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size =

        (num_bufs_preenc_me_que) * (sizeof(pre_enc_me_ctxt_t));

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* Pre-encode L0 IPE output to ME buffer pointer*/

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size =

        (num_bufs_L0_ipe_enc) * (sizeof(pre_enc_L0_ipe_encloop_ctxt_t *));

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* Pre-encode L0 IPE output to ME buffer */

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size =

        (num_bufs_L0_ipe_enc) * (sizeof(pre_enc_L0_ipe_encloop_ctxt_t));

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* CTB analyse Frame level  */

    buf_size = num_ctb_horz;

    buf_size = buf_size * num_ctb_vert;

    buf_size = buf_size * sizeof(ctb_analyse_t) * num_bufs_preenc_me_que;

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size = buf_size;

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* ME layer ctxt pointer */

    buf_size = sizeof(layer_ctxt_t) * num_bufs_preenc_me_que;

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size = buf_size;

    /* increment the memtab counter */

    total_memtabs_used++;

    total_system_memtabs++;

    /* ME layer MV bank ctxt pointer */

    buf_size = sizeof(layer_mv_t) * num_bufs_preenc_me_que;

    ps_memtab[total_memtabs_used].i4_mem_alignment = 8;

    ps_memtab[total_memtabs_used].e_mem_type = (IV_MEM_TYPE_T)space_for_mem_in_enc_grp;

    ps_memtab[total_memtabs_used].i4_mem_size = buf_size;

    /* increment the memtab counter */