Coverage Report

Created: 2026-01-09 07:04

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/libhevc/encoder/hme_interface.c
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Source
1
/******************************************************************************
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 *
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 * Copyright (C) 2018 The Android Open Source Project
4
 *
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 * Licensed under the Apache License, Version 2.0 (the "License");
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 * you may not use this file except in compliance with the License.
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 * You may obtain a copy of the License at:
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 *
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 * http://www.apache.org/licenses/LICENSE-2.0
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 *
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 * Unless required by applicable law or agreed to in writing, software
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 * distributed under the License is distributed on an "AS IS" BASIS,
13
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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 * See the License for the specific language governing permissions and
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 * limitations under the License.
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 *
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 *****************************************************************************
18
 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19
*/
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21
/*****************************************************************************/
22
/* File Includes                                                             */
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/*****************************************************************************/
24
/* System include files */
25
#include <stdio.h>
26
#include <string.h>
27
#include <stdlib.h>
28
#include <assert.h>
29
#include <stdarg.h>
30
#include <math.h>
31
#include <limits.h>
32
33
/* User include files */
34
#include "ihevc_typedefs.h"
35
#include "itt_video_api.h"
36
#include "ihevce_api.h"
37
38
#include "rc_cntrl_param.h"
39
#include "rc_frame_info_collector.h"
40
#include "rc_look_ahead_params.h"
41
42
#include "ihevc_defs.h"
43
#include "ihevc_structs.h"
44
#include "ihevc_platform_macros.h"
45
#include "ihevc_deblk.h"
46
#include "ihevc_itrans_recon.h"
47
#include "ihevc_chroma_itrans_recon.h"
48
#include "ihevc_chroma_intra_pred.h"
49
#include "ihevc_intra_pred.h"
50
#include "ihevc_inter_pred.h"
51
#include "ihevc_mem_fns.h"
52
#include "ihevc_padding.h"
53
#include "ihevc_weighted_pred.h"
54
#include "ihevc_sao.h"
55
#include "ihevc_resi_trans.h"
56
#include "ihevc_quant_iquant_ssd.h"
57
#include "ihevc_cabac_tables.h"
58
59
#include "ihevce_defs.h"
60
#include "ihevce_lap_enc_structs.h"
61
#include "ihevce_multi_thrd_structs.h"
62
#include "ihevce_multi_thrd_funcs.h"
63
#include "ihevce_me_common_defs.h"
64
#include "ihevce_had_satd.h"
65
#include "ihevce_error_codes.h"
66
#include "ihevce_bitstream.h"
67
#include "ihevce_cabac.h"
68
#include "ihevce_rdoq_macros.h"
69
#include "ihevce_function_selector.h"
70
#include "ihevce_enc_structs.h"
71
#include "ihevce_entropy_structs.h"
72
#include "ihevce_cmn_utils_instr_set_router.h"
73
#include "ihevce_enc_loop_structs.h"
74
#include "ihevce_bs_compute_ctb.h"
75
#include "ihevce_global_tables.h"
76
#include "ihevce_dep_mngr_interface.h"
77
#include "hme_datatype.h"
78
#include "hme_interface.h"
79
#include "hme_common_defs.h"
80
#include "hme_defs.h"
81
#include "ihevce_me_instr_set_router.h"
82
#include "hme_globals.h"
83
#include "hme_utils.h"
84
#include "hme_coarse.h"
85
#include "hme_refine.h"
86
#include "hme_err_compute.h"
87
#include "hme_common_utils.h"
88
#include "hme_search_algo.h"
89
#include "ihevce_profile.h"
90
91
/*****************************************************************************/
92
/* Function Definitions                                                      */
93
/*****************************************************************************/
94
95
void hme_init_globals()
96
317
{
97
317
    GRID_PT_T id;
98
317
    S32 i, j;
99
    /*************************************************************************/
100
    /* Initialize the lookup table for x offset, y offset, optimized mask    */
101
    /* based on grid id. The design is as follows:                           */
102
    /*                                                                       */
103
    /*     a  b  c  d                                                        */
104
    /*    TL  T TR  e                                                        */
105
    /*     L  C  R  f                                                        */
106
    /*    BL  B BR                                                           */
107
    /*                                                                       */
108
    /*  IF a non corner pt, like T is the new minima, then we need to        */
109
    /*  evaluate only 3 new pts, in this case, a, b, c. So the optimal       */
110
    /*  grid mask would reflect this. If a corner pt like TR is the new      */
111
    /*  minima, then we need to evaluate 5 new pts, in this case, b, c, d,   */
112
    /*  e and f. So the grid mask will have 5 pts enabled.                   */
113
    /*************************************************************************/
114
115
317
    id = PT_C;
116
317
    gai4_opt_grid_mask[id] = GRID_ALL_PTS_VALID ^ (BIT_EN(PT_C));
117
317
    gai1_grid_id_to_x[id] = 0;
118
317
    gai1_grid_id_to_y[id] = 0;
119
317
    gai4_opt_grid_mask_diamond[id] = GRID_DIAMOND_ENABLE_ALL ^ (BIT_EN(PT_C));
120
317
    gai4_opt_grid_mask_conventional[id] = GRID_ALL_PTS_VALID ^ (BIT_EN(PT_C));
121
122
317
    id = PT_L;
123
317
    gai4_opt_grid_mask[id] = BIT_EN(PT_TL) | BIT_EN(PT_L) | BIT_EN(PT_BL);
124
317
    gai1_grid_id_to_x[id] = -1;
125
317
    gai1_grid_id_to_y[id] = 0;
126
317
    gai4_opt_grid_mask_diamond[id] = BIT_EN(PT_T) | BIT_EN(PT_L) | BIT_EN(PT_B);
127
317
    gai4_opt_grid_mask_conventional[id] = BIT_EN(PT_T) | BIT_EN(PT_L) | BIT_EN(PT_B);
128
129
317
    id = PT_R;
130
317
    gai4_opt_grid_mask[id] = BIT_EN(PT_TR) | BIT_EN(PT_R) | BIT_EN(PT_BR);
131
317
    gai1_grid_id_to_x[id] = 1;
132
317
    gai1_grid_id_to_y[id] = 0;
133
317
    gai4_opt_grid_mask_diamond[id] = BIT_EN(PT_T) | BIT_EN(PT_R) | BIT_EN(PT_B);
134
317
    gai4_opt_grid_mask_conventional[id] = BIT_EN(PT_T) | BIT_EN(PT_R) | BIT_EN(PT_B);
135
136
317
    id = PT_T;
137
317
    gai4_opt_grid_mask[id] = BIT_EN(PT_TL) | BIT_EN(PT_T) | BIT_EN(PT_TR);
138
317
    gai1_grid_id_to_x[id] = 0;
139
317
    gai1_grid_id_to_y[id] = -1;
140
317
    gai4_opt_grid_mask_diamond[id] = BIT_EN(PT_R) | BIT_EN(PT_L) | BIT_EN(PT_T);
141
317
    gai4_opt_grid_mask_conventional[id] = BIT_EN(PT_R) | BIT_EN(PT_L) | BIT_EN(PT_T);
142
143
317
    id = PT_B;
144
317
    gai4_opt_grid_mask[id] = BIT_EN(PT_BL) | BIT_EN(PT_B) | BIT_EN(PT_BR);
145
317
    gai1_grid_id_to_x[id] = 0;
146
317
    gai1_grid_id_to_y[id] = 1;
147
317
    gai4_opt_grid_mask_diamond[id] = BIT_EN(PT_B) | BIT_EN(PT_L) | BIT_EN(PT_R);
148
317
    gai4_opt_grid_mask_conventional[id] = BIT_EN(PT_B) | BIT_EN(PT_L) | BIT_EN(PT_R);
149
150
317
    id = PT_TL;
151
317
    gai4_opt_grid_mask[id] = gai4_opt_grid_mask[PT_L] | gai4_opt_grid_mask[PT_T];
152
317
    gai1_grid_id_to_x[id] = -1;
153
317
    gai1_grid_id_to_y[id] = -1;
154
317
    gai4_opt_grid_mask_conventional[id] = BIT_EN(PT_T) | BIT_EN(PT_L);
155
156
317
    id = PT_TR;
157
317
    gai4_opt_grid_mask[id] = gai4_opt_grid_mask[PT_R] | gai4_opt_grid_mask[PT_T];
158
317
    gai1_grid_id_to_x[id] = 1;
159
317
    gai1_grid_id_to_y[id] = -1;
160
317
    gai4_opt_grid_mask_conventional[id] = BIT_EN(PT_T) | BIT_EN(PT_R);
161
162
317
    id = PT_BL;
163
317
    gai4_opt_grid_mask[id] = gai4_opt_grid_mask[PT_L] | gai4_opt_grid_mask[PT_B];
164
317
    gai1_grid_id_to_x[id] = -1;
165
317
    gai1_grid_id_to_y[id] = 1;
166
317
    gai4_opt_grid_mask_conventional[id] = BIT_EN(PT_L) | BIT_EN(PT_B);
167
168
317
    id = PT_BR;
169
317
    gai4_opt_grid_mask[id] = gai4_opt_grid_mask[PT_R] | gai4_opt_grid_mask[PT_B];
170
317
    gai1_grid_id_to_x[id] = 1;
171
317
    gai1_grid_id_to_y[id] = 1;
172
317
    gai4_opt_grid_mask_conventional[id] = BIT_EN(PT_R) | BIT_EN(PT_B);
173
174
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_2Nx2N] = BLK_8x8;
175
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_2NxN_T] = BLK_8x4;
176
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_2NxN_B] = BLK_8x4;
177
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_Nx2N_L] = BLK_4x8;
178
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_Nx2N_R] = BLK_4x8;
179
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_NxN_TL] = BLK_4x4;
180
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_NxN_TR] = BLK_4x4;
181
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_NxN_BL] = BLK_4x4;
182
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_NxN_BR] = BLK_4x4;
183
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_2NxnU_T] = BLK_INVALID;
184
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_2NxnU_B] = BLK_INVALID;
185
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_2NxnD_T] = BLK_INVALID;
186
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_2NxnD_B] = BLK_INVALID;
187
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_nLx2N_L] = BLK_INVALID;
188
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_nLx2N_R] = BLK_INVALID;
189
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_nRx2N_L] = BLK_INVALID;
190
317
    ge_part_id_to_blk_size[CU_8x8][PART_ID_nRx2N_R] = BLK_INVALID;
191
192
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_2Nx2N] = BLK_16x16;
193
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_2NxN_T] = BLK_16x8;
194
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_2NxN_B] = BLK_16x8;
195
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_Nx2N_L] = BLK_8x16;
196
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_Nx2N_R] = BLK_8x16;
197
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_NxN_TL] = BLK_8x8;
198
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_NxN_TR] = BLK_8x8;
199
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_NxN_BL] = BLK_8x8;
200
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_NxN_BR] = BLK_8x8;
201
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_2NxnU_T] = BLK_16x4;
202
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_2NxnU_B] = BLK_16x12;
203
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_2NxnD_T] = BLK_16x12;
204
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_2NxnD_B] = BLK_16x4;
205
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_nLx2N_L] = BLK_4x16;
206
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_nLx2N_R] = BLK_12x16;
207
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_nRx2N_L] = BLK_12x16;
208
317
    ge_part_id_to_blk_size[CU_16x16][PART_ID_nRx2N_R] = BLK_4x16;
209
210
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_2Nx2N] = BLK_32x32;
211
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_2NxN_T] = BLK_32x16;
212
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_2NxN_B] = BLK_32x16;
213
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_Nx2N_L] = BLK_16x32;
214
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_Nx2N_R] = BLK_16x32;
215
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_NxN_TL] = BLK_16x16;
216
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_NxN_TR] = BLK_16x16;
217
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_NxN_BL] = BLK_16x16;
218
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_NxN_BR] = BLK_16x16;
219
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_2NxnU_T] = BLK_32x8;
220
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_2NxnU_B] = BLK_32x24;
221
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_2NxnD_T] = BLK_32x24;
222
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_2NxnD_B] = BLK_32x8;
223
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_nLx2N_L] = BLK_8x32;
224
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_nLx2N_R] = BLK_24x32;
225
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_nRx2N_L] = BLK_24x32;
226
317
    ge_part_id_to_blk_size[CU_32x32][PART_ID_nRx2N_R] = BLK_8x32;
227
228
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_2Nx2N] = BLK_64x64;
229
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_2NxN_T] = BLK_64x32;
230
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_2NxN_B] = BLK_64x32;
231
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_Nx2N_L] = BLK_32x64;
232
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_Nx2N_R] = BLK_32x64;
233
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_NxN_TL] = BLK_32x32;
234
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_NxN_TR] = BLK_32x32;
235
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_NxN_BL] = BLK_32x32;
236
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_NxN_BR] = BLK_32x32;
237
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_2NxnU_T] = BLK_64x16;
238
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_2NxnU_B] = BLK_64x48;
239
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_2NxnD_T] = BLK_64x48;
240
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_2NxnD_B] = BLK_64x16;
241
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_nLx2N_L] = BLK_16x64;
242
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_nLx2N_R] = BLK_48x64;
243
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_nRx2N_L] = BLK_48x64;
244
317
    ge_part_id_to_blk_size[CU_64x64][PART_ID_nRx2N_R] = BLK_16x64;
245
246
317
    gau1_num_parts_in_part_type[PRT_2Nx2N] = 1;
247
317
    gau1_num_parts_in_part_type[PRT_2NxN] = 2;
248
317
    gau1_num_parts_in_part_type[PRT_Nx2N] = 2;
249
317
    gau1_num_parts_in_part_type[PRT_NxN] = 4;
250
317
    gau1_num_parts_in_part_type[PRT_2NxnU] = 2;
251
317
    gau1_num_parts_in_part_type[PRT_2NxnD] = 2;
252
317
    gau1_num_parts_in_part_type[PRT_nLx2N] = 2;
253
317
    gau1_num_parts_in_part_type[PRT_nRx2N] = 2;
254
255
2.85k
    for(i = 0; i < MAX_PART_TYPES; i++)
256
12.6k
        for(j = 0; j < MAX_NUM_PARTS; j++)
257
10.1k
            ge_part_type_to_part_id[i][j] = PART_ID_INVALID;
258
259
    /* 2Nx2N only one partition */
260
317
    ge_part_type_to_part_id[PRT_2Nx2N][0] = PART_ID_2Nx2N;
261
262
    /* 2NxN 2 partitions */
263
317
    ge_part_type_to_part_id[PRT_2NxN][0] = PART_ID_2NxN_T;
264
317
    ge_part_type_to_part_id[PRT_2NxN][1] = PART_ID_2NxN_B;
265
266
    /* Nx2N 2 partitions */
267
317
    ge_part_type_to_part_id[PRT_Nx2N][0] = PART_ID_Nx2N_L;
268
317
    ge_part_type_to_part_id[PRT_Nx2N][1] = PART_ID_Nx2N_R;
269
270
    /* NxN 4 partitions */
271
317
    ge_part_type_to_part_id[PRT_NxN][0] = PART_ID_NxN_TL;
272
317
    ge_part_type_to_part_id[PRT_NxN][1] = PART_ID_NxN_TR;
273
317
    ge_part_type_to_part_id[PRT_NxN][2] = PART_ID_NxN_BL;
274
317
    ge_part_type_to_part_id[PRT_NxN][3] = PART_ID_NxN_BR;
275
276
    /* AMP 2Nx (N/2 + 3N/2) 2 partitions */
277
317
    ge_part_type_to_part_id[PRT_2NxnU][0] = PART_ID_2NxnU_T;
278
317
    ge_part_type_to_part_id[PRT_2NxnU][1] = PART_ID_2NxnU_B;
279
280
    /* AMP 2Nx (3N/2 + N/2) 2 partitions */
281
317
    ge_part_type_to_part_id[PRT_2NxnD][0] = PART_ID_2NxnD_T;
282
317
    ge_part_type_to_part_id[PRT_2NxnD][1] = PART_ID_2NxnD_B;
283
284
    /* AMP (N/2 + 3N/2) x 2N 2 partitions */
285
317
    ge_part_type_to_part_id[PRT_nLx2N][0] = PART_ID_nLx2N_L;
286
317
    ge_part_type_to_part_id[PRT_nLx2N][1] = PART_ID_nLx2N_R;
287
288
    /* AMP (3N/2 + N/2) x 2N 2 partitions */
289
317
    ge_part_type_to_part_id[PRT_nRx2N][0] = PART_ID_nRx2N_L;
290
317
    ge_part_type_to_part_id[PRT_nRx2N][1] = PART_ID_nRx2N_R;
291
292
    /*************************************************************************/
293
    /* initialize attributes for each partition id within the cu.            */
294
    /*************************************************************************/
295
317
    {
296
317
        part_attr_t *ps_part_attr;
297
298
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_2Nx2N];
299
317
        ps_part_attr->u1_x_start = 0;
300
317
        ps_part_attr->u1_y_start = 0;
301
317
        ps_part_attr->u1_x_count = 8;
302
317
        ps_part_attr->u1_y_count = 8;
303
304
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_2NxN_T];
305
317
        ps_part_attr->u1_x_start = 0;
306
317
        ps_part_attr->u1_y_start = 0;
307
317
        ps_part_attr->u1_x_count = 8;
308
317
        ps_part_attr->u1_y_count = 4;
309
310
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_2NxN_B];
311
317
        ps_part_attr->u1_x_start = 0;
312
317
        ps_part_attr->u1_y_start = 4;
313
317
        ps_part_attr->u1_x_count = 8;
314
317
        ps_part_attr->u1_y_count = 4;
315
316
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_Nx2N_L];
317
317
        ps_part_attr->u1_x_start = 0;
318
317
        ps_part_attr->u1_y_start = 0;
319
317
        ps_part_attr->u1_x_count = 4;
320
317
        ps_part_attr->u1_y_count = 8;
321
322
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_Nx2N_R];
323
317
        ps_part_attr->u1_x_start = 4;
324
317
        ps_part_attr->u1_y_start = 0;
325
317
        ps_part_attr->u1_x_count = 4;
326
317
        ps_part_attr->u1_y_count = 8;
327
328
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_NxN_TL];
329
317
        ps_part_attr->u1_x_start = 0;
330
317
        ps_part_attr->u1_y_start = 0;
331
317
        ps_part_attr->u1_x_count = 4;
332
317
        ps_part_attr->u1_y_count = 4;
333
334
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_NxN_TR];
335
317
        ps_part_attr->u1_x_start = 4;
336
317
        ps_part_attr->u1_y_start = 0;
337
317
        ps_part_attr->u1_x_count = 4;
338
317
        ps_part_attr->u1_y_count = 4;
339
340
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_NxN_BL];
341
317
        ps_part_attr->u1_x_start = 0;
342
317
        ps_part_attr->u1_y_start = 4;
343
317
        ps_part_attr->u1_x_count = 4;
344
317
        ps_part_attr->u1_y_count = 4;
345
346
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_NxN_BR];
347
317
        ps_part_attr->u1_x_start = 4;
348
317
        ps_part_attr->u1_y_start = 4;
349
317
        ps_part_attr->u1_x_count = 4;
350
317
        ps_part_attr->u1_y_count = 4;
351
352
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_2NxnU_T];
353
317
        ps_part_attr->u1_x_start = 0;
354
317
        ps_part_attr->u1_y_start = 0;
355
317
        ps_part_attr->u1_x_count = 8;
356
317
        ps_part_attr->u1_y_count = 2;
357
358
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_2NxnU_B];
359
317
        ps_part_attr->u1_x_start = 0;
360
317
        ps_part_attr->u1_y_start = 2;
361
317
        ps_part_attr->u1_x_count = 8;
362
317
        ps_part_attr->u1_y_count = 6;
363
364
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_2NxnD_T];
365
317
        ps_part_attr->u1_x_start = 0;
366
317
        ps_part_attr->u1_y_start = 0;
367
317
        ps_part_attr->u1_x_count = 8;
368
317
        ps_part_attr->u1_y_count = 6;
369
370
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_2NxnD_B];
371
317
        ps_part_attr->u1_x_start = 0;
372
317
        ps_part_attr->u1_y_start = 6;
373
317
        ps_part_attr->u1_x_count = 8;
374
317
        ps_part_attr->u1_y_count = 2;
375
376
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_nLx2N_L];
377
317
        ps_part_attr->u1_x_start = 0;
378
317
        ps_part_attr->u1_y_start = 0;
379
317
        ps_part_attr->u1_x_count = 2;
380
317
        ps_part_attr->u1_y_count = 8;
381
382
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_nLx2N_R];
383
317
        ps_part_attr->u1_x_start = 2;
384
317
        ps_part_attr->u1_y_start = 0;
385
317
        ps_part_attr->u1_x_count = 6;
386
317
        ps_part_attr->u1_y_count = 8;
387
388
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_nRx2N_L];
389
317
        ps_part_attr->u1_x_start = 0;
390
317
        ps_part_attr->u1_y_start = 0;
391
317
        ps_part_attr->u1_x_count = 6;
392
317
        ps_part_attr->u1_y_count = 8;
393
394
317
        ps_part_attr = &gas_part_attr_in_cu[PART_ID_nRx2N_R];
395
317
        ps_part_attr->u1_x_start = 6;
396
317
        ps_part_attr->u1_y_start = 0;
397
317
        ps_part_attr->u1_x_count = 2;
398
317
        ps_part_attr->u1_y_count = 8;
399
317
    }
400
8.24k
    for(i = 0; i < NUM_BLK_SIZES; i++)
401
7.92k
        ge_blk_size_to_cu_size[i] = CU_INVALID;
402
403
317
    ge_blk_size_to_cu_size[BLK_8x8] = CU_8x8;
404
317
    ge_blk_size_to_cu_size[BLK_16x16] = CU_16x16;
405
317
    ge_blk_size_to_cu_size[BLK_32x32] = CU_32x32;
406
317
    ge_blk_size_to_cu_size[BLK_64x64] = CU_64x64;
407
408
    /* This is the reverse, given cU size, get blk size */
409
317
    ge_cu_size_to_blk_size[CU_8x8] = BLK_8x8;
410
317
    ge_cu_size_to_blk_size[CU_16x16] = BLK_16x16;
411
317
    ge_cu_size_to_blk_size[CU_32x32] = BLK_32x32;
412
317
    ge_cu_size_to_blk_size[CU_64x64] = BLK_64x64;
413
414
317
    gau1_is_vert_part[PRT_2Nx2N] = 0;
415
317
    gau1_is_vert_part[PRT_2NxN] = 0;
416
317
    gau1_is_vert_part[PRT_Nx2N] = 1;
417
317
    gau1_is_vert_part[PRT_NxN] = 1;
418
317
    gau1_is_vert_part[PRT_2NxnU] = 0;
419
317
    gau1_is_vert_part[PRT_2NxnD] = 0;
420
317
    gau1_is_vert_part[PRT_nLx2N] = 1;
421
317
    gau1_is_vert_part[PRT_nRx2N] = 1;
422
423
    /* Initialise the number of best results for the full pell refinement */
424
317
    gau1_num_best_results_PQ[PART_ID_2Nx2N] = 2;
425
317
    gau1_num_best_results_PQ[PART_ID_2NxN_T] = 0;
426
317
    gau1_num_best_results_PQ[PART_ID_2NxN_B] = 0;
427
317
    gau1_num_best_results_PQ[PART_ID_Nx2N_L] = 0;
428
317
    gau1_num_best_results_PQ[PART_ID_Nx2N_R] = 0;
429
317
    gau1_num_best_results_PQ[PART_ID_NxN_TL] = 1;
430
317
    gau1_num_best_results_PQ[PART_ID_NxN_TR] = 1;
431
317
    gau1_num_best_results_PQ[PART_ID_NxN_BL] = 1;
432
317
    gau1_num_best_results_PQ[PART_ID_NxN_BR] = 1;
433
317
    gau1_num_best_results_PQ[PART_ID_2NxnU_T] = 1;
434
317
    gau1_num_best_results_PQ[PART_ID_2NxnU_B] = 0;
435
317
    gau1_num_best_results_PQ[PART_ID_2NxnD_T] = 0;
436
317
    gau1_num_best_results_PQ[PART_ID_2NxnD_B] = 1;
437
317
    gau1_num_best_results_PQ[PART_ID_nLx2N_L] = 1;
438
317
    gau1_num_best_results_PQ[PART_ID_nLx2N_R] = 0;
439
317
    gau1_num_best_results_PQ[PART_ID_nRx2N_L] = 0;
440
317
    gau1_num_best_results_PQ[PART_ID_nRx2N_R] = 1;
441
442
317
    gau1_num_best_results_HQ[PART_ID_2Nx2N] = 2;
443
317
    gau1_num_best_results_HQ[PART_ID_2NxN_T] = 0;
444
317
    gau1_num_best_results_HQ[PART_ID_2NxN_B] = 0;
445
317
    gau1_num_best_results_HQ[PART_ID_Nx2N_L] = 0;
446
317
    gau1_num_best_results_HQ[PART_ID_Nx2N_R] = 0;
447
317
    gau1_num_best_results_HQ[PART_ID_NxN_TL] = 1;
448
317
    gau1_num_best_results_HQ[PART_ID_NxN_TR] = 1;
449
317
    gau1_num_best_results_HQ[PART_ID_NxN_BL] = 1;
450
317
    gau1_num_best_results_HQ[PART_ID_NxN_BR] = 1;
451
317
    gau1_num_best_results_HQ[PART_ID_2NxnU_T] = 1;
452
317
    gau1_num_best_results_HQ[PART_ID_2NxnU_B] = 0;
453
317
    gau1_num_best_results_HQ[PART_ID_2NxnD_T] = 0;
454
317
    gau1_num_best_results_HQ[PART_ID_2NxnD_B] = 1;
455
317
    gau1_num_best_results_HQ[PART_ID_nLx2N_L] = 1;
456
317
    gau1_num_best_results_HQ[PART_ID_nLx2N_R] = 0;
457
317
    gau1_num_best_results_HQ[PART_ID_nRx2N_L] = 0;
458
317
    gau1_num_best_results_HQ[PART_ID_nRx2N_R] = 1;
459
460
317
    gau1_num_best_results_MS[PART_ID_2Nx2N] = 2;
461
317
    gau1_num_best_results_MS[PART_ID_2NxN_T] = 0;
462
317
    gau1_num_best_results_MS[PART_ID_2NxN_B] = 0;
463
317
    gau1_num_best_results_MS[PART_ID_Nx2N_L] = 0;
464
317
    gau1_num_best_results_MS[PART_ID_Nx2N_R] = 0;
465
317
    gau1_num_best_results_MS[PART_ID_NxN_TL] = 1;
466
317
    gau1_num_best_results_MS[PART_ID_NxN_TR] = 1;
467
317
    gau1_num_best_results_MS[PART_ID_NxN_BL] = 1;
468
317
    gau1_num_best_results_MS[PART_ID_NxN_BR] = 1;
469
317
    gau1_num_best_results_MS[PART_ID_2NxnU_T] = 1;
470
317
    gau1_num_best_results_MS[PART_ID_2NxnU_B] = 0;
471
317
    gau1_num_best_results_MS[PART_ID_2NxnD_T] = 0;
472
317
    gau1_num_best_results_MS[PART_ID_2NxnD_B] = 1;
473
317
    gau1_num_best_results_MS[PART_ID_nLx2N_L] = 1;
474
317
    gau1_num_best_results_MS[PART_ID_nLx2N_R] = 0;
475
317
    gau1_num_best_results_MS[PART_ID_nRx2N_L] = 0;
476
317
    gau1_num_best_results_MS[PART_ID_nRx2N_R] = 1;
477
478
317
    gau1_num_best_results_HS[PART_ID_2Nx2N] = 2;
479
317
    gau1_num_best_results_HS[PART_ID_2NxN_T] = 0;
480
317
    gau1_num_best_results_HS[PART_ID_2NxN_B] = 0;
481
317
    gau1_num_best_results_HS[PART_ID_Nx2N_L] = 0;
482
317
    gau1_num_best_results_HS[PART_ID_Nx2N_R] = 0;
483
317
    gau1_num_best_results_HS[PART_ID_NxN_TL] = 0;
484
317
    gau1_num_best_results_HS[PART_ID_NxN_TR] = 0;
485
317
    gau1_num_best_results_HS[PART_ID_NxN_BL] = 0;
486
317
    gau1_num_best_results_HS[PART_ID_NxN_BR] = 0;
487
317
    gau1_num_best_results_HS[PART_ID_2NxnU_T] = 0;
488
317
    gau1_num_best_results_HS[PART_ID_2NxnU_B] = 0;
489
317
    gau1_num_best_results_HS[PART_ID_2NxnD_T] = 0;
490
317
    gau1_num_best_results_HS[PART_ID_2NxnD_B] = 0;
491
317
    gau1_num_best_results_HS[PART_ID_nLx2N_L] = 0;
492
317
    gau1_num_best_results_HS[PART_ID_nLx2N_R] = 0;
493
317
    gau1_num_best_results_HS[PART_ID_nRx2N_L] = 0;
494
317
    gau1_num_best_results_HS[PART_ID_nRx2N_R] = 0;
495
496
317
    gau1_num_best_results_XS[PART_ID_2Nx2N] = 2;
497
317
    gau1_num_best_results_XS[PART_ID_2NxN_T] = 0;
498
317
    gau1_num_best_results_XS[PART_ID_2NxN_B] = 0;
499
317
    gau1_num_best_results_XS[PART_ID_Nx2N_L] = 0;
500
317
    gau1_num_best_results_XS[PART_ID_Nx2N_R] = 0;
501
317
    gau1_num_best_results_XS[PART_ID_NxN_TL] = 0;
502
317
    gau1_num_best_results_XS[PART_ID_NxN_TR] = 0;
503
317
    gau1_num_best_results_XS[PART_ID_NxN_BL] = 0;
504
317
    gau1_num_best_results_XS[PART_ID_NxN_BR] = 0;
505
317
    gau1_num_best_results_XS[PART_ID_2NxnU_T] = 0;
506
317
    gau1_num_best_results_XS[PART_ID_2NxnU_B] = 0;
507
317
    gau1_num_best_results_XS[PART_ID_2NxnD_T] = 0;
508
317
    gau1_num_best_results_XS[PART_ID_2NxnD_B] = 0;
509
317
    gau1_num_best_results_XS[PART_ID_nLx2N_L] = 0;
510
317
    gau1_num_best_results_XS[PART_ID_nLx2N_R] = 0;
511
317
    gau1_num_best_results_XS[PART_ID_nRx2N_L] = 0;
512
317
    gau1_num_best_results_XS[PART_ID_nRx2N_R] = 0;
513
514
317
    gau1_num_best_results_XS25[PART_ID_2Nx2N] = MAX_NUM_CANDS_FOR_FPEL_REFINE_IN_XS25;
515
317
    gau1_num_best_results_XS25[PART_ID_2NxN_T] = 0;
516
317
    gau1_num_best_results_XS25[PART_ID_2NxN_B] = 0;
517
317
    gau1_num_best_results_XS25[PART_ID_Nx2N_L] = 0;
518
317
    gau1_num_best_results_XS25[PART_ID_Nx2N_R] = 0;
519
317
    gau1_num_best_results_XS25[PART_ID_NxN_TL] = 0;
520
317
    gau1_num_best_results_XS25[PART_ID_NxN_TR] = 0;
521
317
    gau1_num_best_results_XS25[PART_ID_NxN_BL] = 0;
522
317
    gau1_num_best_results_XS25[PART_ID_NxN_BR] = 0;
523
317
    gau1_num_best_results_XS25[PART_ID_2NxnU_T] = 0;
524
317
    gau1_num_best_results_XS25[PART_ID_2NxnU_B] = 0;
525
317
    gau1_num_best_results_XS25[PART_ID_2NxnD_T] = 0;
526
317
    gau1_num_best_results_XS25[PART_ID_2NxnD_B] = 0;
527
317
    gau1_num_best_results_XS25[PART_ID_nLx2N_L] = 0;
528
317
    gau1_num_best_results_XS25[PART_ID_nLx2N_R] = 0;
529
317
    gau1_num_best_results_XS25[PART_ID_nRx2N_L] = 0;
530
317
    gau1_num_best_results_XS25[PART_ID_nRx2N_R] = 0;
531
532
    /* Top right validity for each part id */
533
317
    gau1_partid_tr_valid[PART_ID_2Nx2N] = 1;
534
317
    gau1_partid_tr_valid[PART_ID_2NxN_T] = 1;
535
317
    gau1_partid_tr_valid[PART_ID_2NxN_B] = 0;
536
317
    gau1_partid_tr_valid[PART_ID_Nx2N_L] = 1;
537
317
    gau1_partid_tr_valid[PART_ID_Nx2N_R] = 1;
538
317
    gau1_partid_tr_valid[PART_ID_NxN_TL] = 1;
539
317
    gau1_partid_tr_valid[PART_ID_NxN_TR] = 1;
540
317
    gau1_partid_tr_valid[PART_ID_NxN_BL] = 1;
541
317
    gau1_partid_tr_valid[PART_ID_NxN_BR] = 0;
542
317
    gau1_partid_tr_valid[PART_ID_2NxnU_T] = 1;
543
317
    gau1_partid_tr_valid[PART_ID_2NxnU_B] = 0;
544
317
    gau1_partid_tr_valid[PART_ID_2NxnD_T] = 1;
545
317
    gau1_partid_tr_valid[PART_ID_2NxnD_B] = 0;
546
317
    gau1_partid_tr_valid[PART_ID_nLx2N_L] = 1;
547
317
    gau1_partid_tr_valid[PART_ID_nLx2N_R] = 1;
548
317
    gau1_partid_tr_valid[PART_ID_nRx2N_L] = 1;
549
317
    gau1_partid_tr_valid[PART_ID_nRx2N_R] = 1;
550
551
    /* Bot Left validity for each part id */
552
317
    gau1_partid_bl_valid[PART_ID_2Nx2N] = 1;
553
317
    gau1_partid_bl_valid[PART_ID_2NxN_T] = 1;
554
317
    gau1_partid_bl_valid[PART_ID_2NxN_B] = 1;
555
317
    gau1_partid_bl_valid[PART_ID_Nx2N_L] = 1;
556
317
    gau1_partid_bl_valid[PART_ID_Nx2N_R] = 0;
557
317
    gau1_partid_bl_valid[PART_ID_NxN_TL] = 1;
558
317
    gau1_partid_bl_valid[PART_ID_NxN_TR] = 0;
559
317
    gau1_partid_bl_valid[PART_ID_NxN_BL] = 1;
560
317
    gau1_partid_bl_valid[PART_ID_NxN_BR] = 0;
561
317
    gau1_partid_bl_valid[PART_ID_2NxnU_T] = 1;
562
317
    gau1_partid_bl_valid[PART_ID_2NxnU_B] = 1;
563
317
    gau1_partid_bl_valid[PART_ID_2NxnD_T] = 1;
564
317
    gau1_partid_bl_valid[PART_ID_2NxnD_B] = 1;
565
317
    gau1_partid_bl_valid[PART_ID_nLx2N_L] = 1;
566
317
    gau1_partid_bl_valid[PART_ID_nLx2N_R] = 0;
567
317
    gau1_partid_bl_valid[PART_ID_nRx2N_L] = 1;
568
317
    gau1_partid_bl_valid[PART_ID_nRx2N_R] = 0;
569
570
    /*Part id to part num of this partition id in the CU */
571
317
    gau1_part_id_to_part_num[PART_ID_2Nx2N] = 0;
572
317
    gau1_part_id_to_part_num[PART_ID_2NxN_T] = 0;
573
317
    gau1_part_id_to_part_num[PART_ID_2NxN_B] = 1;
574
317
    gau1_part_id_to_part_num[PART_ID_Nx2N_L] = 0;
575
317
    gau1_part_id_to_part_num[PART_ID_Nx2N_R] = 1;
576
317
    gau1_part_id_to_part_num[PART_ID_NxN_TL] = 0;
577
317
    gau1_part_id_to_part_num[PART_ID_NxN_TR] = 1;
578
317
    gau1_part_id_to_part_num[PART_ID_NxN_BL] = 2;
579
317
    gau1_part_id_to_part_num[PART_ID_NxN_BR] = 3;
580
317
    gau1_part_id_to_part_num[PART_ID_2NxnU_T] = 0;
581
317
    gau1_part_id_to_part_num[PART_ID_2NxnU_B] = 1;
582
317
    gau1_part_id_to_part_num[PART_ID_2NxnD_T] = 0;
583
317
    gau1_part_id_to_part_num[PART_ID_2NxnD_B] = 1;
584
317
    gau1_part_id_to_part_num[PART_ID_nLx2N_L] = 0;
585
317
    gau1_part_id_to_part_num[PART_ID_nLx2N_R] = 1;
586
317
    gau1_part_id_to_part_num[PART_ID_nRx2N_L] = 0;
587
317
    gau1_part_id_to_part_num[PART_ID_nRx2N_R] = 1;
588
589
    /*Which partition type does this partition id belong to */
590
317
    ge_part_id_to_part_type[PART_ID_2Nx2N] = PRT_2Nx2N;
591
317
    ge_part_id_to_part_type[PART_ID_2NxN_T] = PRT_2NxN;
592
317
    ge_part_id_to_part_type[PART_ID_2NxN_B] = PRT_2NxN;
593
317
    ge_part_id_to_part_type[PART_ID_Nx2N_L] = PRT_Nx2N;
594
317
    ge_part_id_to_part_type[PART_ID_Nx2N_R] = PRT_Nx2N;
595
317
    ge_part_id_to_part_type[PART_ID_NxN_TL] = PRT_NxN;
596
317
    ge_part_id_to_part_type[PART_ID_NxN_TR] = PRT_NxN;
597
317
    ge_part_id_to_part_type[PART_ID_NxN_BL] = PRT_NxN;
598
317
    ge_part_id_to_part_type[PART_ID_NxN_BR] = PRT_NxN;
599
317
    ge_part_id_to_part_type[PART_ID_2NxnU_T] = PRT_2NxnU;
600
317
    ge_part_id_to_part_type[PART_ID_2NxnU_B] = PRT_2NxnU;
601
317
    ge_part_id_to_part_type[PART_ID_2NxnD_T] = PRT_2NxnD;
602
317
    ge_part_id_to_part_type[PART_ID_2NxnD_B] = PRT_2NxnD;
603
317
    ge_part_id_to_part_type[PART_ID_nLx2N_L] = PRT_nLx2N;
604
317
    ge_part_id_to_part_type[PART_ID_nLx2N_R] = PRT_nLx2N;
605
317
    ge_part_id_to_part_type[PART_ID_nRx2N_L] = PRT_nRx2N;
606
317
    ge_part_id_to_part_type[PART_ID_nRx2N_R] = PRT_nRx2N;
607
608
    /*************************************************************************/
609
    /* Set up the bits to be taken up for the part type. This is equally     */
610
    /* divided up between the various partitions in the part-type.           */
611
    /* For NxN @ CU 16x16, we assume it as CU 8x8, so consider it as         */
612
    /* partition 2Nx2N.                                                      */
613
    /*************************************************************************/
614
    /* 1 bit for 2Nx2N partition */
615
317
    gau1_bits_for_part_id_q1[PART_ID_2Nx2N] = 2;
616
617
    /* 3 bits for symmetric part types, so 1.5 bits per partition */
618
317
    gau1_bits_for_part_id_q1[PART_ID_2NxN_T] = 3;
619
317
    gau1_bits_for_part_id_q1[PART_ID_2NxN_B] = 3;
620
317
    gau1_bits_for_part_id_q1[PART_ID_Nx2N_L] = 3;
621
317
    gau1_bits_for_part_id_q1[PART_ID_Nx2N_R] = 3;
622
623
    /* 1 bit for NxN partitions, assuming these to be 2Nx2N CUs of lower level */
624
317
    gau1_bits_for_part_id_q1[PART_ID_NxN_TL] = 2;
625
317
    gau1_bits_for_part_id_q1[PART_ID_NxN_TR] = 2;
626
317
    gau1_bits_for_part_id_q1[PART_ID_NxN_BL] = 2;
627
317
    gau1_bits_for_part_id_q1[PART_ID_NxN_BR] = 2;
628
629
    /* 4 bits for AMP so 2 bits per partition */
630
317
    gau1_bits_for_part_id_q1[PART_ID_2NxnU_T] = 4;
631
317
    gau1_bits_for_part_id_q1[PART_ID_2NxnU_B] = 4;
632
317
    gau1_bits_for_part_id_q1[PART_ID_2NxnD_T] = 4;
633
317
    gau1_bits_for_part_id_q1[PART_ID_2NxnD_B] = 4;
634
317
    gau1_bits_for_part_id_q1[PART_ID_nLx2N_L] = 4;
635
317
    gau1_bits_for_part_id_q1[PART_ID_nLx2N_R] = 4;
636
317
    gau1_bits_for_part_id_q1[PART_ID_nRx2N_L] = 4;
637
317
    gau1_bits_for_part_id_q1[PART_ID_nRx2N_R] = 4;
638
317
}
639
640
/**
641
********************************************************************************
642
*  @fn     hme_enc_num_alloc()
643
*
644
*  @brief  returns number of memtabs that is required by hme module
645
*
646
*  @return   Number of memtabs required
647
********************************************************************************
648
*/
649
S32 hme_enc_num_alloc(WORD32 i4_num_me_frm_pllel)
650
2.85k
{
651
2.85k
    if(i4_num_me_frm_pllel > 1)
652
0
    {
653
0
        return ((S32)MAX_HME_ENC_TOT_MEMTABS);
654
0
    }
655
2.85k
    else
656
2.85k
    {
657
2.85k
        return ((S32)MIN_HME_ENC_TOT_MEMTABS);
658
2.85k
    }
659
2.85k
}
660
661
/**
662
********************************************************************************
663
*  @fn     hme_coarse_num_alloc()
664
*
665
*  @brief  returns number of memtabs that is required by hme module
666
*
667
*  @return   Number of memtabs required
668
********************************************************************************
669
*/
670
S32 hme_coarse_num_alloc()
671
2.85k
{
672
2.85k
    return ((S32)HME_COARSE_TOT_MEMTABS);
673
2.85k
}
674
675
/**
676
********************************************************************************
677
*  @fn     hme_coarse_dep_mngr_num_alloc()
678
*
679
*  @brief  returns number of memtabs that is required by Dep Mngr for hme module
680
*
681
*  @return   Number of memtabs required
682
********************************************************************************
683
*/
684
WORD32 hme_coarse_dep_mngr_num_alloc()
685
1.90k
{
686
1.90k
    return ((WORD32)((MAX_NUM_HME_LAYERS - 1) * ihevce_dmgr_get_num_mem_recs()));
687
1.90k
}
688
689
S32 hme_validate_init_prms(hme_init_prms_t *ps_prms)
690
1.26k
{
691
1.26k
    S32 n_layers = ps_prms->num_simulcast_layers;
692
693
    /* The final layer has got to be a non encode coarse layer */
694
1.26k
    if(n_layers > (MAX_NUM_LAYERS - 1))
695
0
        return (-1);
696
697
1.26k
    if(n_layers < 1)
698
0
        return (-1);
699
700
    /* Width of the coarsest encode layer got to be >= 2*min_wd where min_Wd */
701
    /* represents the min allowed width in any layer. Ditto with ht          */
702
1.26k
    if(ps_prms->a_wd[n_layers - 1] < 2 * (MIN_WD_COARSE))
703
0
        return (-1);
704
1.26k
    if(ps_prms->a_ht[n_layers - 1] < 2 * (MIN_HT_COARSE))
705
0
        return (-1);
706
1.26k
    if(ps_prms->max_num_ref > MAX_NUM_REF)
707
0
        return (-1);
708
1.26k
    if(ps_prms->max_num_ref < 0)
709
0
        return (-1);
710
711
1.26k
    return (0);
712
1.26k
}
713
void hme_set_layer_res_attrs(
714
    layer_ctxt_t *ps_layer, S32 wd, S32 ht, S32 disp_wd, S32 disp_ht, U08 u1_enc)
715
12.7k
{
716
12.7k
    ps_layer->i4_wd = wd;
717
12.7k
    ps_layer->i4_ht = ht;
718
12.7k
    ps_layer->i4_disp_wd = disp_wd;
719
12.7k
    ps_layer->i4_disp_ht = disp_ht;
720
12.7k
    if(0 == u1_enc)
721
9.62k
    {
722
9.62k
        ps_layer->i4_inp_stride = wd + 32 + 4;
723
9.62k
        ps_layer->i4_inp_offset = (ps_layer->i4_inp_stride * 16) + 16;
724
9.62k
        ps_layer->i4_pad_x_inp = 16;
725
9.62k
        ps_layer->i4_pad_y_inp = 16;
726
9.62k
        ps_layer->pu1_inp = ps_layer->pu1_inp_base + ps_layer->i4_inp_offset;
727
9.62k
    }
728
12.7k
}
729
730
/**
731
********************************************************************************
732
*  @fn     hme_coarse_get_layer1_mv_bank_ref_idx_size()
733
*
734
*  @brief  returns the MV bank and ref idx size of Layer 1 (penultimate)
735
*
736
*  @return   none
737
********************************************************************************
738
*/
739
void hme_coarse_get_layer1_mv_bank_ref_idx_size(
740
    S32 n_tot_layers,
741
    S32 *a_wd,
742
    S32 *a_ht,
743
    S32 max_num_ref,
744
    S32 *pi4_mv_bank_size,
745
    S32 *pi4_ref_idx_size)
746
317
{
747
317
    S32 num_blks, num_mvs_per_blk, num_ref;
748
317
    S32 num_cols, num_rows, num_mvs_per_row;
749
317
    S32 is_explicit_store = 1;
750
317
    S32 wd, ht, num_layers_explicit_search;
751
317
    S32 num_results, use_4x4;
752
317
    wd = a_wd[1];
753
317
    ht = a_ht[1];
754
755
    /* Assuming abt 4 layers for 1080p, we do explicit search across all ref */
756
    /* frames in all but final layer In final layer, it could be 1/2 */
757
    //ps_hme_init_prms->num_layers_explicit_search = 3;
758
317
    num_layers_explicit_search = 3;
759
760
317
    if(num_layers_explicit_search <= 0)
761
0
        num_layers_explicit_search = n_tot_layers - 1;
762
763
317
    num_layers_explicit_search = MIN(num_layers_explicit_search, n_tot_layers - 1);
764
765
    /* Possibly implicit search for lower (finer) layers */
766
317
    if(n_tot_layers - 1 > num_layers_explicit_search)
767
0
        is_explicit_store = 0;
768
769
    /* coarsest layer alwasy uses 4x4 blks to store results */
770
317
    if(1 == (n_tot_layers - 1))
771
0
    {
772
        /* we store 4 results in coarsest layer per blk. 8x4L, 8x4R, 4x8T, 4x8B */
773
        //ps_hme_init_prms->max_num_results_coarse = 4;
774
        //vijay : with new algo in coarseset layer this has to be revisited
775
0
        num_results = 4;
776
0
    }
777
317
    else
778
317
    {
779
        /* Every refinement layer stores a max of 2 results per partition */
780
        //ps_hme_init_prms->max_num_results = 2;
781
317
        num_results = 2;
782
317
    }
783
317
    use_4x4 = hme_get_mv_blk_size(1, 1, n_tot_layers, 0);
784
785
317
    num_cols = use_4x4 ? ((wd >> 2) + 2) : ((wd >> 3) + 2);
786
317
    num_rows = use_4x4 ? ((ht >> 2) + 2) : ((ht >> 3) + 2);
787
788
317
    if(is_explicit_store)
789
317
        num_ref = max_num_ref;
790
0
    else
791
0
        num_ref = 2;
792
793
317
    num_blks = num_cols * num_rows;
794
317
    num_mvs_per_blk = num_ref * num_results;
795
317
    num_mvs_per_row = num_mvs_per_blk * num_cols;
796
797
    /* stroe the sizes */
798
317
    *pi4_mv_bank_size = num_blks * num_mvs_per_blk * sizeof(hme_mv_t);
799
317
    *pi4_ref_idx_size = num_blks * num_mvs_per_blk * sizeof(S08);
800
801
317
    return;
802
317
}
803
/**
804
********************************************************************************
805
*  @fn     hme_alloc_init_layer_mv_bank()
806
*
807
*  @brief  memory alloc and init function for MV bank
808
*
809
*  @return   Number of memtabs required
810
********************************************************************************
811
*/
812
S32 hme_alloc_init_layer_mv_bank(
813
    hme_memtab_t *ps_memtab,
814
    S32 max_num_results,
815
    S32 max_num_ref,
816
    S32 use_4x4,
817
    S32 mem_avail,
818
    S32 u1_enc,
819
    S32 wd,
820
    S32 ht,
821
    S32 is_explicit_store,
822
    hme_mv_t **pps_mv_base,
823
    S08 **pi1_ref_idx_base,
824
    S32 *pi4_num_mvs_per_row)
825
4.14k
{
826
4.14k
    S32 count = 0;
827
4.14k
    S32 size;
828
4.14k
    S32 num_blks, num_mvs_per_blk;
829
4.14k
    S32 num_ref;
830
4.14k
    S32 num_cols, num_rows, num_mvs_per_row;
831
832
4.14k
    if(is_explicit_store)
833
970
        num_ref = max_num_ref;
834
3.17k
    else
835
3.17k
        num_ref = 2;
836
837
    /* MV Bank allocation takes into consideration following */
838
    /* number of results per reference x max num refrences is the amount     */
839
    /* bufffered up per blk. Numbero f blks in pic deps on the blk size,     */
840
    /* which could be either 4x4 or 8x8.                                     */
841
4.14k
    num_cols = use_4x4 ? ((wd >> 2) + 2) : ((wd >> 3) + 2);
842
4.14k
    num_rows = use_4x4 ? ((ht >> 2) + 2) : ((ht >> 3) + 2);
843
844
4.14k
    if(u1_enc)
845
3.17k
    {
846
        /* TODO: CTB64x64 is assumed. FIX according to actual CTB */
847
3.17k
        WORD32 num_ctb_cols = ((wd + 63) >> 6);
848
3.17k
        WORD32 num_ctb_rows = ((ht + 63) >> 6);
849
850
3.17k
        num_cols = (num_ctb_cols << 3) + 2;
851
3.17k
        num_rows = (num_ctb_rows << 3) + 2;
852
3.17k
    }
853
4.14k
    num_blks = num_cols * num_rows;
854
4.14k
    num_mvs_per_blk = num_ref * max_num_results;
855
4.14k
    num_mvs_per_row = num_mvs_per_blk * num_cols;
856
857
4.14k
    size = num_blks * num_mvs_per_blk * sizeof(hme_mv_t);
858
4.14k
    if(mem_avail)
859
2.07k
    {
860
        /* store this for run time verifications */
861
2.07k
        *pi4_num_mvs_per_row = num_mvs_per_row;
862
2.07k
        ASSERT(ps_memtab[count].size == size);
863
2.07k
        *pps_mv_base = (hme_mv_t *)ps_memtab[count].pu1_mem;
864
2.07k
    }
865
2.07k
    else
866
2.07k
    {
867
2.07k
        ps_memtab[count].size = size;
868
2.07k
        ps_memtab[count].align = 4;
869
2.07k
        ps_memtab[count].e_mem_attr = HME_PERSISTENT_MEM;
870
2.07k
    }
871
872
4.14k
    count++;
873
    /* Ref idx takes the same route as mvbase */
874
875
4.14k
    size = num_blks * num_mvs_per_blk * sizeof(S08);
876
4.14k
    if(mem_avail)
877
2.07k
    {
878
2.07k
        ASSERT(ps_memtab[count].size == size);
879
2.07k
        *pi1_ref_idx_base = (S08 *)ps_memtab[count].pu1_mem;
880
2.07k
    }
881
2.07k
    else
882
2.07k
    {
883
2.07k
        ps_memtab[count].size = size;
884
2.07k
        ps_memtab[count].align = 4;
885
2.07k
        ps_memtab[count].e_mem_attr = HME_PERSISTENT_MEM;
886
2.07k
    }
887
4.14k
    count++;
888
889
4.14k
    return (count);
890
4.14k
}
891
/**
892
********************************************************************************
893
*  @fn     hme_alloc_init_layer()
894
*
895
*  @brief  memory alloc and init function
896
*
897
*  @return   Number of memtabs required
898
********************************************************************************
899
*/
900
S32 hme_alloc_init_layer(
901
    hme_memtab_t *ps_memtab,
902
    S32 max_num_results,
903
    S32 max_num_ref,
904
    S32 use_4x4,
905
    S32 mem_avail,
906
    S32 u1_enc,
907
    S32 wd,
908
    S32 ht,
909
    S32 disp_wd,
910
    S32 disp_ht,
911
    S32 segment_layer,
912
    S32 is_explicit_store,
913
    layer_ctxt_t **pps_layer)
914
12.7k
{
915
12.7k
    S32 count = 0;
916
12.7k
    layer_ctxt_t *ps_layer = NULL;
917
12.7k
    S32 size;
918
12.7k
    S32 num_ref;
919
920
12.7k
    ARG_NOT_USED(segment_layer);
921
922
12.7k
    if(is_explicit_store)
923
9.62k
        num_ref = max_num_ref;
924
3.17k
    else
925
3.17k
        num_ref = 2;
926
927
    /* We do not store 4x4 results for encoding layers */
928
12.7k
    if(u1_enc)
929
3.17k
        use_4x4 = 0;
930
931
12.7k
    size = sizeof(layer_ctxt_t);
932
12.7k
    if(mem_avail)
933
6.39k
    {
934
6.39k
        ASSERT(ps_memtab[count].size == size);
935
6.39k
        ps_layer = (layer_ctxt_t *)ps_memtab[count].pu1_mem;
936
6.39k
        *pps_layer = ps_layer;
937
6.39k
    }
938
6.39k
    else
939
6.39k
    {
940
6.39k
        ps_memtab[count].size = size;
941
6.39k
        ps_memtab[count].align = 8;
942
6.39k
        ps_memtab[count].e_mem_attr = HME_PERSISTENT_MEM;
943
6.39k
    }
944
945
12.7k
    count++;
946
947
    /* Input luma buffer allocated only for non encode case */
948
12.7k
    if(0 == u1_enc)
949
9.62k
    {
950
        /* Allocate input with padding of 16 pixels */
951
9.62k
        size = (wd + 32 + 4) * (ht + 32 + 4);
952
9.62k
        if(mem_avail)
953
4.81k
        {
954
4.81k
            ASSERT(ps_memtab[count].size == size);
955
4.81k
            ps_layer->pu1_inp_base = ps_memtab[count].pu1_mem;
956
4.81k
        }
957
4.81k
        else
958
4.81k
        {
959
4.81k
            ps_memtab[count].size = size;
960
4.81k
            ps_memtab[count].align = 16;
961
4.81k
            ps_memtab[count].e_mem_attr = HME_PERSISTENT_MEM;
962
4.81k
        }
963
9.62k
        count++;
964
9.62k
    }
965
966
    /* Allocate memory or just the layer mvbank strcture. */
967
    /* TODO : see if this can be removed by moving it to layer_ctxt */
968
12.7k
    size = sizeof(layer_mv_t);
969
970
12.7k
    if(mem_avail)
971
6.39k
    {
972
6.39k
        ASSERT(ps_memtab[count].size == size);
973
6.39k
        ps_layer->ps_layer_mvbank = (layer_mv_t *)ps_memtab[count].pu1_mem;
974
6.39k
    }
975
6.39k
    else
976
6.39k
    {
977
6.39k
        ps_memtab[count].size = size;
978
6.39k
        ps_memtab[count].align = 8;
979
6.39k
        ps_memtab[count].e_mem_attr = HME_PERSISTENT_MEM;
980
6.39k
    }
981
982
12.7k
    count++;
983
984
12.7k
    if(mem_avail)
985
6.39k
    {
986
6.39k
        hme_set_layer_res_attrs(ps_layer, wd, ht, disp_wd, disp_ht, u1_enc);
987
6.39k
    }
988
989
12.7k
    return (count);
990
12.7k
}
991
992
S32 hme_alloc_init_search_nodes(
993
    search_results_t *ps_search_results,
994
    hme_memtab_t *ps_memtabs,
995
    S32 mem_avail,
996
    S32 max_num_ref,
997
    S32 max_num_results)
998
13.9k
{
999
13.9k
    S32 size = max_num_results * sizeof(search_node_t) * max_num_ref * TOT_NUM_PARTS;
1000
13.9k
    S32 j, k;
1001
13.9k
    search_node_t *ps_search_node;
1002
1003
13.9k
    if(mem_avail == 0)
1004
6.97k
    {
1005
6.97k
        ps_memtabs->size = size;
1006
6.97k
        ps_memtabs->align = 4;
1007
6.97k
        ps_memtabs->e_mem_attr = HME_SCRATCH_OVLY_MEM;
1008
6.97k
        return (1);
1009
6.97k
    }
1010
1011
6.97k
    ps_search_node = (search_node_t *)ps_memtabs->pu1_mem;
1012
6.97k
    ASSERT(ps_memtabs->size == size);
1013
    /****************************************************************************/
1014
    /* For each CU, we search and store N best results, per partition, per ref  */
1015
    /* So, number of memtabs is  num_refs * num_parts                           */
1016
    /****************************************************************************/
1017
21.5k
    for(j = 0; j < max_num_ref; j++)
1018
14.5k
    {
1019
262k
        for(k = 0; k < TOT_NUM_PARTS; k++)
1020
247k
        {
1021
247k
            ps_search_results->aps_part_results[j][k] = ps_search_node;
1022
247k
            ps_search_node += max_num_results;
1023
247k
        }
1024
14.5k
    }
1025
6.97k
    return (1);
1026
6.97k
}
1027
1028
S32 hme_derive_num_layers(S32 n_enc_layers, S32 *p_wd, S32 *p_ht, S32 *p_disp_wd, S32 *p_disp_ht)
1029
9.84k
{
1030
9.84k
    S32 i;
1031
    /* We keep downscaling by 2 till we hit one of the conditions:           */
1032
    /* 1. MAX_NUM_LAYERS reached.                                            */
1033
    /* 2. Width or ht goes below min width and ht allowed at coarsest layer  */
1034
9.84k
    ASSERT(n_enc_layers < MAX_NUM_LAYERS);
1035
9.84k
    ASSERT(n_enc_layers > 0);
1036
9.84k
    ASSERT(p_wd[0] <= HME_MAX_WIDTH);
1037
9.84k
    ASSERT(p_ht[0] <= HME_MAX_HEIGHT);
1038
1039
9.84k
    p_disp_wd[0] = p_wd[0];
1040
9.84k
    p_disp_ht[0] = p_ht[0];
1041
    /*************************************************************************/
1042
    /* Verify that for simulcast, lower layer to higher layer ratio is bet   */
1043
    /* 2 (dyadic) and 1.33. Typically it should be 1.5.                      */
1044
    /* TODO : for interlace, we may choose to have additional downscaling for*/
1045
    /* width alone in coarsest layer to next layer.                          */
1046
    /*************************************************************************/
1047
9.84k
    for(i = 1; i < n_enc_layers; i++)
1048
0
    {
1049
0
        S32 wd1, wd2, ht1, ht2;
1050
0
        wd1 = FLOOR16(p_wd[i - 1] >> 1);
1051
0
        wd2 = CEIL16((p_wd[i - 1] * 3) >> 2);
1052
0
        ASSERT(p_wd[i] >= wd1);
1053
0
        ASSERT(p_wd[i] <= wd2);
1054
0
        ht1 = FLOOR16(p_ht[i - 1] >> 1);
1055
0
        ht2 = CEIL16((p_ht[i - 1] * 3) >> 2);
1056
0
        ASSERT(p_ht[i] >= ht1);
1057
0
        ASSERT(p_ht[i] <= ht2);
1058
0
    }
1059
9.84k
    ASSERT(p_wd[n_enc_layers - 1] >= 2 * MIN_WD_COARSE);
1060
9.84k
    ASSERT(p_ht[n_enc_layers - 1] >= 2 * MIN_HT_COARSE);
1061
1062
32.0k
    for(i = n_enc_layers; i < MAX_NUM_LAYERS; i++)
1063
29.5k
    {
1064
29.5k
        if((p_wd[i - 1] < 2 * MIN_WD_COARSE) || (p_ht[i - 1] < 2 * MIN_HT_COARSE))
1065
7.31k
        {
1066
7.31k
            return (i);
1067
7.31k
        }
1068
        /* Use CEIL16 to facilitate 16x16 searches in future, or to do       */
1069
        /* segmentation study in future                                      */
1070
22.2k
        p_wd[i] = CEIL16(p_wd[i - 1] >> 1);
1071
22.2k
        p_ht[i] = CEIL16(p_ht[i - 1] >> 1);
1072
1073
22.2k
        p_disp_wd[i] = p_disp_wd[i - 1] >> 1;
1074
22.2k
        p_disp_ht[i] = p_disp_ht[i - 1] >> 1;
1075
22.2k
    }
1076
2.52k
    return (i);
1077
9.84k
}
1078
1079
/**
1080
********************************************************************************
1081
*  @fn     hme_get_mv_blk_size()
1082
*
1083
*  @brief  returns whether blk uses 4x4 size or something else.
1084
*
1085
*  @param[in] enable_4x4 : input param from application to enable 4x4
1086
*
1087
*  @param[in] layer_id : id of current layer (0 finest)
1088
*
1089
*  @param[in] num_layeers : total num layers
1090
*
1091
*  @param[in] is_enc : Whether encoding enabled for layer
1092
*
1093
*  @return   1 for 4x4 blks, 0 for 8x8
1094
********************************************************************************
1095
*/
1096
S32 hme_get_mv_blk_size(S32 enable_4x4, S32 layer_id, S32 num_layers, S32 is_enc)
1097
44.6k
{
1098
44.6k
    S32 use_4x4 = enable_4x4;
1099
1100
44.6k
    if((layer_id <= 1) && (num_layers >= 4))
1101
8.37k
        use_4x4 = USE_4x4_IN_L1;
1102
44.6k
    if(layer_id == num_layers - 1)
1103
5.84k
        use_4x4 = 1;
1104
44.6k
    if(is_enc)
1105
17.6k
        use_4x4 = 0;
1106
1107
44.6k
    return (use_4x4);
1108
44.6k
}
1109
1110
/**
1111
********************************************************************************
1112
*  @fn     hme_enc_alloc_init_mem()
1113
*
1114
*  @brief  Requests/ assign memory based on mem avail
1115
*
1116
*  @param[in] ps_memtabs : memtab array
1117
*
1118
*  @param[in] ps_prms : init prms
1119
*
1120
*  @param[in] pv_ctxt : ME ctxt
1121
*
1122
*  @param[in] mem_avail : request/assign flag
1123
*
1124
*  @return   1 for 4x4 blks, 0 for 8x8
1125
********************************************************************************
1126
*/
1127
S32 hme_enc_alloc_init_mem(
1128
    hme_memtab_t *ps_memtabs,
1129
    hme_init_prms_t *ps_prms,
1130
    void *pv_ctxt,
1131
    S32 mem_avail,
1132
    S32 i4_num_me_frm_pllel)
1133
634
{
1134
634
    me_master_ctxt_t *ps_master_ctxt = (me_master_ctxt_t *)pv_ctxt;
1135
634
    me_ctxt_t *ps_ctxt;
1136
634
    S32 count = 0, size, i, j, use_4x4;
1137
634
    S32 n_tot_layers, n_enc_layers;
1138
634
    S32 num_layers_explicit_search;
1139
634
    S32 a_wd[MAX_NUM_LAYERS], a_ht[MAX_NUM_LAYERS];
1140
634
    S32 a_disp_wd[MAX_NUM_LAYERS], a_disp_ht[MAX_NUM_LAYERS];
1141
634
    S32 num_results;
1142
634
    S32 num_thrds;
1143
634
    S32 ctb_wd = 1 << ps_prms->log_ctb_size;
1144
1145
    /* MV bank changes */
1146
634
    hme_mv_t *aps_mv_bank[((DEFAULT_MAX_REFERENCE_PICS << 1) * MAX_NUM_ME_PARALLEL) + 1] = { NULL };
1147
634
    S32 i4_num_mvs_per_row = 0;
1148
634
    S08 *api1_ref_idx[((DEFAULT_MAX_REFERENCE_PICS << 1) * MAX_NUM_ME_PARALLEL) + 1] = { NULL };
1149
1150
634
    n_enc_layers = ps_prms->num_simulcast_layers;
1151
1152
    /* Memtab 0: handle */
1153
634
    size = sizeof(me_master_ctxt_t);
1154
634
    if(mem_avail)
1155
317
    {
1156
        /* store the number of processing threads */
1157
317
        ps_master_ctxt->i4_num_proc_thrds = ps_prms->i4_num_proc_thrds;
1158
317
    }
1159
317
    else
1160
317
    {
1161
317
        ps_memtabs[count].size = size;
1162
317
        ps_memtabs[count].align = 8;
1163
317
        ps_memtabs[count].e_mem_attr = HME_PERSISTENT_MEM;
1164
317
    }
1165
1166
634
    count++;
1167
1168
    /* Memtab 1: ME threads ctxt */
1169
634
    size = ps_prms->i4_num_proc_thrds * sizeof(me_ctxt_t);
1170
634
    if(mem_avail)
1171
317
    {
1172
317
        me_ctxt_t *ps_me_tmp_ctxt = (me_ctxt_t *)ps_memtabs[count].pu1_mem;
1173
1174
        /* store the indivisual thread ctxt pointers */
1175
634
        for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1176
317
        {
1177
317
            ps_master_ctxt->aps_me_ctxt[num_thrds] = ps_me_tmp_ctxt++;
1178
317
        }
1179
317
    }
1180
317
    else
1181
317
    {
1182
317
        ps_memtabs[count].size = size;
1183
317
        ps_memtabs[count].align = 8;
1184
317
        ps_memtabs[count].e_mem_attr = HME_PERSISTENT_MEM;
1185
317
    }
1186
1187
634
    count++;
1188
1189
    /* Memtab 2: ME frame ctxts */
1190
634
    size = sizeof(me_frm_ctxt_t) * MAX_NUM_ME_PARALLEL * ps_prms->i4_num_proc_thrds;
1191
634
    if(mem_avail)
1192
317
    {
1193
317
        me_frm_ctxt_t *ps_me_frm_tmp_ctxt = (me_frm_ctxt_t *)ps_memtabs[count].pu1_mem;
1194
1195
634
        for(i = 0; i < MAX_NUM_ME_PARALLEL; i++)
1196
317
        {
1197
            /* store the indivisual thread ctxt pointers */
1198
634
            for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1199
317
            {
1200
317
                ps_master_ctxt->aps_me_ctxt[num_thrds]->aps_me_frm_prms[i] = ps_me_frm_tmp_ctxt;
1201
1202
317
                ps_me_frm_tmp_ctxt++;
1203
317
            }
1204
317
        }
1205
317
    }
1206
317
    else
1207
317
    {
1208
317
        ps_memtabs[count].size = size;
1209
317
        ps_memtabs[count].align = 8;
1210
317
        ps_memtabs[count].e_mem_attr = HME_PERSISTENT_MEM;
1211
317
    }
1212
1213
634
    count++;
1214
1215
634
    memcpy(a_wd, ps_prms->a_wd, sizeof(S32) * ps_prms->num_simulcast_layers);
1216
634
    memcpy(a_ht, ps_prms->a_ht, sizeof(S32) * ps_prms->num_simulcast_layers);
1217
    /*************************************************************************/
1218
    /* Derive the number of HME layers, including both encoded and non encode*/
1219
    /* This function also derives the width and ht of each layer.            */
1220
    /*************************************************************************/
1221
634
    n_tot_layers = hme_derive_num_layers(n_enc_layers, a_wd, a_ht, a_disp_wd, a_disp_ht);
1222
634
    num_layers_explicit_search = ps_prms->num_layers_explicit_search;
1223
634
    if(num_layers_explicit_search <= 0)
1224
0
        num_layers_explicit_search = n_tot_layers - 1;
1225
1226
634
    num_layers_explicit_search = MIN(num_layers_explicit_search, n_tot_layers - 1);
1227
1228
634
    if(mem_avail)
1229
317
    {
1230
634
        for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1231
317
        {
1232
317
            me_frm_ctxt_t *ps_frm_ctxt;
1233
317
            ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1234
1235
634
            for(i = 0; i < MAX_NUM_ME_PARALLEL; i++)
1236
317
            {
1237
317
                ps_frm_ctxt = ps_ctxt->aps_me_frm_prms[i];
1238
1239
317
                memset(ps_frm_ctxt->u1_encode, 0, n_tot_layers);
1240
317
                memset(ps_frm_ctxt->u1_encode, 1, n_enc_layers);
1241
1242
                /* only one enocde layer is used */
1243
317
                ps_frm_ctxt->num_layers = 1;
1244
1245
317
                ps_frm_ctxt->i4_wd = a_wd[0];
1246
317
                ps_frm_ctxt->i4_ht = a_ht[0];
1247
                /*
1248
            memcpy(ps_ctxt->a_wd, a_wd, sizeof(S32)*n_tot_layers);
1249
            memcpy(ps_ctxt->a_ht, a_ht, sizeof(S32)*n_tot_layers);
1250
*/
1251
317
                ps_frm_ctxt->num_layers_explicit_search = num_layers_explicit_search;
1252
317
                ps_frm_ctxt->max_num_results = ps_prms->max_num_results;
1253
317
                ps_frm_ctxt->max_num_results_coarse = ps_prms->max_num_results_coarse;
1254
317
                ps_frm_ctxt->max_num_ref = ps_prms->max_num_ref;
1255
317
            }
1256
317
        }
1257
317
    }
1258
1259
    /* Memtabs : Layers MV bank for encode layer */
1260
    /* Each ref_desr in master ctxt will have seperate layer ctxt */
1261
1262
3.80k
    for(i = 0; i < (ps_prms->max_num_ref * i4_num_me_frm_pllel) + 1; i++)
1263
3.17k
    {
1264
6.34k
        for(j = 0; j < 1; j++)
1265
3.17k
        {
1266
3.17k
            S32 is_explicit_store = 1;
1267
3.17k
            S32 wd, ht;
1268
3.17k
            U08 u1_enc = 1;
1269
3.17k
            wd = a_wd[j];
1270
3.17k
            ht = a_ht[j];
1271
1272
            /* Possibly implicit search for lower (finer) layers */
1273
3.17k
            if(n_tot_layers - j > num_layers_explicit_search)
1274
3.17k
                is_explicit_store = 0;
1275
1276
            /* Even if explicit search, we store only 2 results (L0 and L1) */
1277
            /* in finest layer */
1278
3.17k
            if(j == 0)
1279
3.17k
            {
1280
3.17k
                is_explicit_store = 0;
1281
3.17k
            }
1282
1283
            /* coarsest layer alwasy uses 4x4 blks to store results */
1284
3.17k
            if(j == n_tot_layers - 1)
1285
0
            {
1286
0
                num_results = ps_prms->max_num_results_coarse;
1287
0
            }
1288
3.17k
            else
1289
3.17k
            {
1290
3.17k
                num_results = ps_prms->max_num_results;
1291
3.17k
                if(j == 0)
1292
3.17k
                    num_results = 1;
1293
3.17k
            }
1294
3.17k
            use_4x4 = hme_get_mv_blk_size(ps_prms->use_4x4, j, n_tot_layers, u1_enc);
1295
1296
3.17k
            count += hme_alloc_init_layer_mv_bank(
1297
3.17k
                &ps_memtabs[count],
1298
3.17k
                num_results,
1299
3.17k
                ps_prms->max_num_ref,
1300
3.17k
                use_4x4,
1301
3.17k
                mem_avail,
1302
3.17k
                u1_enc,
1303
3.17k
                wd,
1304
3.17k
                ht,
1305
3.17k
                is_explicit_store,
1306
3.17k
                &aps_mv_bank[i],
1307
3.17k
                &api1_ref_idx[i],
1308
3.17k
                &i4_num_mvs_per_row);
1309
3.17k
        }
1310
3.17k
    }
1311
1312
    /* Memtabs : Layers * num-ref + 1 */
1313
3.80k
    for(i = 0; i < (ps_prms->max_num_ref * i4_num_me_frm_pllel) + 1; i++)
1314
3.17k
    {
1315
        /* layer memory allocated only for enocde layer */
1316
6.34k
        for(j = 0; j < 1; j++)
1317
3.17k
        {
1318
3.17k
            layer_ctxt_t *ps_layer;
1319
3.17k
            S32 is_explicit_store = 1;
1320
3.17k
            S32 segment_this_layer = (j == 0) ? 1 : ps_prms->segment_higher_layers;
1321
3.17k
            S32 wd, ht;
1322
3.17k
            U08 u1_enc = 1;
1323
3.17k
            wd = a_wd[j];
1324
3.17k
            ht = a_ht[j];
1325
1326
            /* Possibly implicit search for lower (finer) layers */
1327
3.17k
            if(n_tot_layers - j > num_layers_explicit_search)
1328
3.17k
                is_explicit_store = 0;
1329
1330
            /* Even if explicit search, we store only 2 results (L0 and L1) */
1331
            /* in finest layer */
1332
3.17k
            if(j == 0)
1333
3.17k
            {
1334
3.17k
                is_explicit_store = 0;
1335
3.17k
            }
1336
1337
            /* coarsest layer alwasy uses 4x4 blks to store results */
1338
3.17k
            if(j == n_tot_layers - 1)
1339
0
            {
1340
0
                num_results = ps_prms->max_num_results_coarse;
1341
0
            }
1342
3.17k
            else
1343
3.17k
            {
1344
3.17k
                num_results = ps_prms->max_num_results;
1345
3.17k
                if(j == 0)
1346
3.17k
                    num_results = 1;
1347
3.17k
            }
1348
3.17k
            use_4x4 = hme_get_mv_blk_size(ps_prms->use_4x4, j, n_tot_layers, u1_enc);
1349
1350
3.17k
            count += hme_alloc_init_layer(
1351
3.17k
                &ps_memtabs[count],
1352
3.17k
                num_results,
1353
3.17k
                ps_prms->max_num_ref,
1354
3.17k
                use_4x4,
1355
3.17k
                mem_avail,
1356
3.17k
                u1_enc,
1357
3.17k
                wd,
1358
3.17k
                ht,
1359
3.17k
                a_disp_wd[j],
1360
3.17k
                a_disp_ht[j],
1361
3.17k
                segment_this_layer,
1362
3.17k
                is_explicit_store,
1363
3.17k
                &ps_layer);
1364
3.17k
            if(mem_avail)
1365
1.58k
            {
1366
                /* same ps_layer memory pointer is stored in all the threads */
1367
3.17k
                for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1368
1.58k
                {
1369
1.58k
                    ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1370
1.58k
                    ps_ctxt->as_ref_descr[i].aps_layers[j] = ps_layer;
1371
1.58k
                }
1372
1373
                /* store the MV bank pointers */
1374
1.58k
                ps_layer->ps_layer_mvbank->max_num_mvs_per_row = i4_num_mvs_per_row;
1375
1.58k
                ps_layer->ps_layer_mvbank->ps_mv_base = aps_mv_bank[i];
1376
1.58k
                ps_layer->ps_layer_mvbank->pi1_ref_idx_base = api1_ref_idx[i];
1377
1.58k
            }
1378
3.17k
        }
1379
3.17k
    }
1380
1381
    /* Memtabs : Buf Mgr for predictor bufs and working mem */
1382
    /* TODO : Parameterise this appropriately */
1383
634
    size = MAX_WKG_MEM_SIZE_PER_THREAD * ps_prms->i4_num_proc_thrds * i4_num_me_frm_pllel;
1384
1385
634
    if(mem_avail)
1386
317
    {
1387
317
        U08 *pu1_mem = ps_memtabs[count].pu1_mem;
1388
1389
317
        ASSERT(ps_memtabs[count].size == size);
1390
1391
634
        for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1392
317
        {
1393
317
            me_frm_ctxt_t *ps_frm_ctxt;
1394
317
            ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1395
1396
634
            for(i = 0; i < MAX_NUM_ME_PARALLEL; i++)
1397
317
            {
1398
317
                ps_frm_ctxt = ps_ctxt->aps_me_frm_prms[i];
1399
1400
317
                hme_init_wkg_mem(&ps_frm_ctxt->s_buf_mgr, pu1_mem, MAX_WKG_MEM_SIZE_PER_THREAD);
1401
1402
317
                if(i4_num_me_frm_pllel != 1)
1403
0
                {
1404
                    /* update the memory buffer pointer */
1405
0
                    pu1_mem += MAX_WKG_MEM_SIZE_PER_THREAD;
1406
0
                }
1407
317
            }
1408
317
            if(i4_num_me_frm_pllel == 1)
1409
317
            {
1410
317
                pu1_mem += MAX_WKG_MEM_SIZE_PER_THREAD;
1411
317
            }
1412
317
        }
1413
317
    }
1414
317
    else
1415
317
    {
1416
317
        ps_memtabs[count].size = size;
1417
317
        ps_memtabs[count].align = 4;
1418
317
        ps_memtabs[count].e_mem_attr = HME_SCRATCH_OVLY_MEM;
1419
317
    }
1420
634
    count++;
1421
1422
    /*************************************************************************/
1423
    /* Memtab : We need 64x64 buffer to store the entire CTB input for bidir */
1424
    /* refinement. This memtab stores 2I - P0, I is input and P0 is L0 pred  */
1425
    /*************************************************************************/
1426
634
    size = sizeof(S16) * CTB_BLK_SIZE * CTB_BLK_SIZE * ps_prms->i4_num_proc_thrds *
1427
634
           i4_num_me_frm_pllel;
1428
1429
634
    if(mem_avail)
1430
317
    {
1431
317
        S16 *pi2_mem = (S16 *)ps_memtabs[count].pu1_mem;
1432
1433
317
        ASSERT(ps_memtabs[count].size == size);
1434
1435
634
        for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1436
317
        {
1437
317
            me_frm_ctxt_t *ps_frm_ctxt;
1438
317
            ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1439
1440
634
            for(i = 0; i < MAX_NUM_ME_PARALLEL; i++)
1441
317
            {
1442
317
                ps_frm_ctxt = ps_ctxt->aps_me_frm_prms[i];
1443
1444
317
                ps_frm_ctxt->pi2_inp_bck = pi2_mem;
1445
                /** If no me frames running in parallel update the other aps_me_frm_prms indices with same memory **/
1446
317
                if(i4_num_me_frm_pllel != 1)
1447
0
                {
1448
0
                    pi2_mem += (CTB_BLK_SIZE * CTB_BLK_SIZE);
1449
0
                }
1450
317
            }
1451
317
            if(i4_num_me_frm_pllel == 1)
1452
317
            {
1453
317
                pi2_mem += (CTB_BLK_SIZE * CTB_BLK_SIZE);
1454
317
            }
1455
317
        }
1456
317
    }
1457
317
    else
1458
317
    {
1459
317
        ps_memtabs[count].size = size;
1460
317
        ps_memtabs[count].align = 16;
1461
317
        ps_memtabs[count].e_mem_attr = HME_SCRATCH_OVLY_MEM;
1462
317
    }
1463
1464
634
    count++;
1465
1466
    /* Allocate a memtab for each histogram. As many as num ref and number of threads */
1467
    /* Loop across for each ME_FRM in PARALLEL */
1468
1.26k
    for(j = 0; j < MAX_NUM_ME_PARALLEL; j++)
1469
634
    {
1470
3.17k
        for(i = 0; i < ps_prms->max_num_ref; i++)
1471
2.53k
        {
1472
2.53k
            size = ps_prms->i4_num_proc_thrds * sizeof(mv_hist_t);
1473
2.53k
            if(mem_avail)
1474
1.26k
            {
1475
1.26k
                mv_hist_t *ps_mv_hist = (mv_hist_t *)ps_memtabs[count].pu1_mem;
1476
1477
1.26k
                ASSERT(size == ps_memtabs[count].size);
1478
1479
                /* divide the memory accross the threads */
1480
2.53k
                for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1481
1.26k
                {
1482
1.26k
                    ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1483
1484
1.26k
                    ps_ctxt->aps_me_frm_prms[j]->aps_mv_hist[i] = ps_mv_hist;
1485
1.26k
                    ps_mv_hist++;
1486
1.26k
                }
1487
1.26k
            }
1488
1.26k
            else
1489
1.26k
            {
1490
1.26k
                ps_memtabs[count].size = size;
1491
1.26k
                ps_memtabs[count].align = 8;
1492
1.26k
                ps_memtabs[count].e_mem_attr = HME_PERSISTENT_MEM;
1493
1.26k
            }
1494
2.53k
            count++;
1495
2.53k
        }
1496
634
        if((i4_num_me_frm_pllel == 1) && (j != (MAX_NUM_ME_PARALLEL - 1)))
1497
0
        {
1498
            /** If no me frames running in parallel update the other aps_me_frm_prms indices with same memory **/
1499
            /** bring the count back to earlier value if there are no me frames in parallel. don't decrement for last loop **/
1500
0
            count -= ps_prms->max_num_ref;
1501
0
        }
1502
634
    }
1503
1504
    /* Memtabs : Search nodes for 16x16 CUs, 32x32 and 64x64 CUs */
1505
1.26k
    for(j = 0; j < MAX_NUM_ME_PARALLEL; j++)
1506
634
    {
1507
634
        S32 count_cpy = count;
1508
1.26k
        for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1509
634
        {
1510
634
            if(mem_avail)
1511
317
            {
1512
317
                ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1513
317
            }
1514
1515
13.9k
            for(i = 0; i < 21; i++)
1516
13.3k
            {
1517
13.3k
                search_results_t *ps_search_results = NULL;
1518
13.3k
                if(mem_avail)
1519
6.65k
                {
1520
6.65k
                    if(i < 16)
1521
5.07k
                    {
1522
5.07k
                        ps_search_results =
1523
5.07k
                            &ps_ctxt->aps_me_frm_prms[j]->as_search_results_16x16[i];
1524
5.07k
                    }
1525
1.58k
                    else if(i < 20)
1526
1.26k
                    {
1527
1.26k
                        ps_search_results =
1528
1.26k
                            &ps_ctxt->aps_me_frm_prms[j]->as_search_results_32x32[i - 16];
1529
1.26k
                        ps_search_results->ps_cu_results =
1530
1.26k
                            &ps_ctxt->aps_me_frm_prms[j]->as_cu32x32_results[i - 16];
1531
1.26k
                    }
1532
317
                    else if(i == 20)
1533
317
                    {
1534
317
                        ps_search_results = &ps_ctxt->aps_me_frm_prms[j]->s_search_results_64x64;
1535
317
                        ps_search_results->ps_cu_results =
1536
317
                            &ps_ctxt->aps_me_frm_prms[j]->s_cu64x64_results;
1537
317
                    }
1538
0
                    else
1539
0
                    {
1540
                        /* 8x8 search results are not required in LO ME */
1541
0
                        ASSERT(0);
1542
0
                    }
1543
6.65k
                }
1544
13.3k
                count += hme_alloc_init_search_nodes(
1545
13.3k
                    ps_search_results, &ps_memtabs[count], mem_avail, 2, ps_prms->max_num_results);
1546
13.3k
            }
1547
634
        }
1548
1549
634
        if((i4_num_me_frm_pllel == 1) && (j != (MAX_NUM_ME_PARALLEL - 1)))
1550
0
        {
1551
0
            count = count_cpy;
1552
0
        }
1553
634
    }
1554
1555
    /* Weighted inputs, one for each ref + one non weighted */
1556
1.26k
    for(j = 0; j < MAX_NUM_ME_PARALLEL; j++)
1557
634
    {
1558
634
        size = (ps_prms->max_num_ref + 1) * ctb_wd * ctb_wd * ps_prms->i4_num_proc_thrds;
1559
634
        if(mem_avail)
1560
317
        {
1561
317
            U08 *pu1_mem;
1562
317
            ASSERT(ps_memtabs[count].size == size);
1563
317
            pu1_mem = ps_memtabs[count].pu1_mem;
1564
1565
634
            for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1566
317
            {
1567
317
                ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1568
1569
1.90k
                for(i = 0; i < ps_prms->max_num_ref + 1; i++)
1570
1.58k
                {
1571
1.58k
                    ps_ctxt->aps_me_frm_prms[j]->s_wt_pred.apu1_wt_inp_buf_array[i] = pu1_mem;
1572
1.58k
                    pu1_mem += (ctb_wd * ctb_wd);
1573
1.58k
                }
1574
317
            }
1575
317
        }
1576
317
        else
1577
317
        {
1578
317
            ps_memtabs[count].size = size;
1579
317
            ps_memtabs[count].align = 16;
1580
317
            ps_memtabs[count].e_mem_attr = HME_SCRATCH_OVLY_MEM;
1581
317
        }
1582
634
        if((i4_num_me_frm_pllel != 1) || (j == (MAX_NUM_ME_PARALLEL - 1)))
1583
634
        {
1584
634
            count++;
1585
634
        }
1586
634
    }
1587
1588
    /* if memory is allocated the intislaise the frm prms ptr to each thrd */
1589
634
    if(mem_avail)
1590
317
    {
1591
634
        for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1592
317
        {
1593
317
            me_frm_ctxt_t *ps_frm_ctxt;
1594
317
            ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1595
1596
634
            for(i = 0; i < MAX_NUM_ME_PARALLEL; i++)
1597
317
            {
1598
317
                ps_frm_ctxt = ps_ctxt->aps_me_frm_prms[i];
1599
1600
317
                ps_frm_ctxt->ps_hme_frm_prms = &ps_master_ctxt->as_frm_prms[i];
1601
317
                ps_frm_ctxt->ps_hme_ref_map = &ps_master_ctxt->as_ref_map[i];
1602
317
            }
1603
317
        }
1604
317
    }
1605
1606
    /* Memory allocation for use in Clustering */
1607
634
    if(ps_prms->s_me_coding_tools.e_me_quality_presets == ME_PRISTINE_QUALITY)
1608
274
    {
1609
548
        for(i = 0; i < MAX_NUM_ME_PARALLEL; i++)
1610
274
        {
1611
274
            size = 16 * sizeof(cluster_16x16_blk_t) + 4 * sizeof(cluster_32x32_blk_t) +
1612
274
                   sizeof(cluster_64x64_blk_t) + sizeof(ctb_cluster_info_t);
1613
274
            size *= ps_prms->i4_num_proc_thrds;
1614
1615
274
            if(mem_avail)
1616
137
            {
1617
137
                U08 *pu1_mem;
1618
1619
137
                ASSERT(ps_memtabs[count].size == size);
1620
137
                pu1_mem = ps_memtabs[count].pu1_mem;
1621
1622
274
                for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1623
137
                {
1624
137
                    ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1625
1626
137
                    ps_ctxt->aps_me_frm_prms[i]->ps_blk_16x16 = (cluster_16x16_blk_t *)pu1_mem;
1627
137
                    pu1_mem += (16 * sizeof(cluster_16x16_blk_t));
1628
1629
137
                    ps_ctxt->aps_me_frm_prms[i]->ps_blk_32x32 = (cluster_32x32_blk_t *)pu1_mem;
1630
137
                    pu1_mem += (4 * sizeof(cluster_32x32_blk_t));
1631
1632
137
                    ps_ctxt->aps_me_frm_prms[i]->ps_blk_64x64 = (cluster_64x64_blk_t *)pu1_mem;
1633
137
                    pu1_mem += (sizeof(cluster_64x64_blk_t));
1634
1635
137
                    ps_ctxt->aps_me_frm_prms[i]->ps_ctb_cluster_info =
1636
137
                        (ctb_cluster_info_t *)pu1_mem;
1637
137
                    pu1_mem += (sizeof(ctb_cluster_info_t));
1638
137
                }
1639
137
            }
1640
137
            else
1641
137
            {
1642
137
                ps_memtabs[count].size = size;
1643
137
                ps_memtabs[count].align = 16;
1644
137
                ps_memtabs[count].e_mem_attr = HME_SCRATCH_OVLY_MEM;
1645
137
            }
1646
1647
274
            if((i4_num_me_frm_pllel != 1) || (i == (MAX_NUM_ME_PARALLEL - 1)))
1648
274
            {
1649
274
                count++;
1650
274
            }
1651
274
        }
1652
274
    }
1653
360
    else if(mem_avail)
1654
180
    {
1655
360
        for(i = 0; i < MAX_NUM_ME_PARALLEL; i++)
1656
180
        {
1657
360
            for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1658
180
            {
1659
180
                ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1660
1661
180
                ps_ctxt->aps_me_frm_prms[i]->ps_blk_16x16 = NULL;
1662
1663
180
                ps_ctxt->aps_me_frm_prms[i]->ps_blk_32x32 = NULL;
1664
1665
180
                ps_ctxt->aps_me_frm_prms[i]->ps_blk_64x64 = NULL;
1666
1667
180
                ps_ctxt->aps_me_frm_prms[i]->ps_ctb_cluster_info = NULL;
1668
180
            }
1669
180
        }
1670
180
    }
1671
1672
1.26k
    for(i = 0; i < MAX_NUM_ME_PARALLEL; i++)
1673
634
    {
1674
634
        size = sizeof(fullpel_refine_ctxt_t);
1675
634
        size *= ps_prms->i4_num_proc_thrds;
1676
1677
634
        if(mem_avail)
1678
317
        {
1679
317
            U08 *pu1_mem;
1680
1681
317
            ASSERT(ps_memtabs[count].size == size);
1682
317
            pu1_mem = ps_memtabs[count].pu1_mem;
1683
1684
634
            for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1685
317
            {
1686
317
                ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1687
1688
317
                ps_ctxt->aps_me_frm_prms[i]->ps_fullpel_refine_ctxt =
1689
317
                    (fullpel_refine_ctxt_t *)pu1_mem;
1690
317
                pu1_mem += (sizeof(fullpel_refine_ctxt_t));
1691
317
            }
1692
317
        }
1693
317
        else
1694
317
        {
1695
317
            ps_memtabs[count].size = size;
1696
317
            ps_memtabs[count].align = 16;
1697
317
            ps_memtabs[count].e_mem_attr = HME_SCRATCH_OVLY_MEM;
1698
317
        }
1699
1700
634
        if((i4_num_me_frm_pllel != 1) || (i == (MAX_NUM_ME_PARALLEL - 1)))
1701
634
        {
1702
634
            count++;
1703
634
        }
1704
634
    }
1705
1706
    /* Memory for ihevce_me_optimised_function_list_t struct  */
1707
634
    if(mem_avail)
1708
317
    {
1709
317
        ps_master_ctxt->pv_me_optimised_function_list = (void *)ps_memtabs[count++].pu1_mem;
1710
317
    }
1711
317
    else
1712
317
    {
1713
317
        ps_memtabs[count].size = sizeof(ihevce_me_optimised_function_list_t);
1714
317
        ps_memtabs[count].align = 16;
1715
317
        ps_memtabs[count++].e_mem_attr = HME_SCRATCH_OVLY_MEM;
1716
317
    }
1717
1718
634
    ASSERT(count < hme_enc_num_alloc(i4_num_me_frm_pllel));
1719
634
    return (count);
1720
634
}
1721
1722
/**
1723
********************************************************************************
1724
*  @fn     hme_coarse_alloc_init_mem()
1725
*
1726
*  @brief  Requests/ assign memory based on mem avail
1727
*
1728
*  @param[in] ps_memtabs : memtab array
1729
*
1730
*  @param[in] ps_prms : init prms
1731
*
1732
*  @param[in] pv_ctxt : ME ctxt
1733
*
1734
*  @param[in] mem_avail : request/assign flag
1735
*
1736
*  @return  number of memtabs
1737
********************************************************************************
1738
*/
1739
S32 hme_coarse_alloc_init_mem(
1740
    hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms, void *pv_ctxt, S32 mem_avail)
1741
634
{
1742
634
    coarse_me_master_ctxt_t *ps_master_ctxt = (coarse_me_master_ctxt_t *)pv_ctxt;
1743
634
    coarse_me_ctxt_t *ps_ctxt;
1744
634
    S32 count = 0, size, i, j, use_4x4, wd;
1745
634
    S32 n_tot_layers;
1746
634
    S32 num_layers_explicit_search;
1747
634
    S32 a_wd[MAX_NUM_LAYERS], a_ht[MAX_NUM_LAYERS];
1748
634
    S32 a_disp_wd[MAX_NUM_LAYERS], a_disp_ht[MAX_NUM_LAYERS];
1749
634
    S32 num_results;
1750
634
    S32 num_thrds;
1751
    //S32 ctb_wd = 1 << ps_prms->log_ctb_size;
1752
634
    S32 sad_4x4_block_size, sad_4x4_block_stride, search_step, num_rows;
1753
634
    S32 layer1_blk_width = 8;  // 8x8 search
1754
634
    S32 blk_shift;
1755
1756
    /* MV bank changes */
1757
634
    hme_mv_t *aps_mv_bank[MAX_NUM_LAYERS] = { NULL };
1758
634
    S32 ai4_num_mvs_per_row[MAX_NUM_LAYERS] = { 0 };
1759
634
    S08 *api1_ref_idx[MAX_NUM_LAYERS] = { NULL };
1760
1761
    /* Memtab 0: handle */
1762
634
    size = sizeof(coarse_me_master_ctxt_t);
1763
634
    if(mem_avail)
1764
317
    {
1765
        /* store the number of processing threads */
1766
317
        ps_master_ctxt->i4_num_proc_thrds = ps_prms->i4_num_proc_thrds;
1767
317
    }
1768
317
    else
1769
317
    {
1770
317
        ps_memtabs[count].size = size;
1771
317
        ps_memtabs[count].align = 8;
1772
317
        ps_memtabs[count].e_mem_attr = HME_PERSISTENT_MEM;
1773
317
    }
1774
1775
634
    count++;
1776
1777
    /* Memtab 1: ME threads ctxt */
1778
634
    size = ps_prms->i4_num_proc_thrds * sizeof(coarse_me_ctxt_t);
1779
634
    if(mem_avail)
1780
317
    {
1781
317
        coarse_me_ctxt_t *ps_me_tmp_ctxt = (coarse_me_ctxt_t *)ps_memtabs[count].pu1_mem;
1782
1783
        /* store the indivisual thread ctxt pointers */
1784
634
        for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1785
317
        {
1786
317
            ps_master_ctxt->aps_me_ctxt[num_thrds] = ps_me_tmp_ctxt++;
1787
317
        }
1788
317
    }
1789
317
    else
1790
317
    {
1791
317
        ps_memtabs[count].size = size;
1792
317
        ps_memtabs[count].align = 8;
1793
317
        ps_memtabs[count].e_mem_attr = HME_PERSISTENT_MEM;
1794
317
    }
1795
1796
634
    count++;
1797
1798
634
    memcpy(a_wd, ps_prms->a_wd, sizeof(S32) * ps_prms->num_simulcast_layers);
1799
634
    memcpy(a_ht, ps_prms->a_ht, sizeof(S32) * ps_prms->num_simulcast_layers);
1800
    /*************************************************************************/
1801
    /* Derive the number of HME layers, including both encoded and non encode*/
1802
    /* This function also derives the width and ht of each layer.            */
1803
    /*************************************************************************/
1804
634
    n_tot_layers = hme_derive_num_layers(1, a_wd, a_ht, a_disp_wd, a_disp_ht);
1805
1806
634
    num_layers_explicit_search = ps_prms->num_layers_explicit_search;
1807
1808
634
    if(num_layers_explicit_search <= 0)
1809
0
        num_layers_explicit_search = n_tot_layers - 1;
1810
1811
634
    num_layers_explicit_search = MIN(num_layers_explicit_search, n_tot_layers - 1);
1812
1813
634
    if(mem_avail)
1814
317
    {
1815
634
        for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1816
317
        {
1817
317
            ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1818
317
            memset(ps_ctxt->u1_encode, 0, n_tot_layers);
1819
1820
            /* encode layer should be excluded during processing */
1821
317
            ps_ctxt->num_layers = n_tot_layers;
1822
1823
317
            memcpy(ps_ctxt->a_wd, a_wd, sizeof(S32) * n_tot_layers);
1824
317
            memcpy(ps_ctxt->a_ht, a_ht, sizeof(S32) * n_tot_layers);
1825
1826
317
            ps_ctxt->num_layers_explicit_search = num_layers_explicit_search;
1827
317
            ps_ctxt->max_num_results = ps_prms->max_num_results;
1828
317
            ps_ctxt->max_num_results_coarse = ps_prms->max_num_results_coarse;
1829
317
            ps_ctxt->max_num_ref = ps_prms->max_num_ref;
1830
317
        }
1831
317
    }
1832
1833
    /* Memtabs : Layers MV bank for total layers - 2  */
1834
    /* for penultimate layer MV bank will be initialsed at every frame level */
1835
2.23k
    for(j = 1; j < n_tot_layers; j++)
1836
1.60k
    {
1837
1.60k
        S32 is_explicit_store = 1;
1838
1.60k
        S32 wd, ht;
1839
1.60k
        U08 u1_enc = 0;
1840
1.60k
        wd = a_wd[j];
1841
1.60k
        ht = a_ht[j];
1842
1843
        /* Possibly implicit search for lower (finer) layers */
1844
1.60k
        if(n_tot_layers - j > num_layers_explicit_search)
1845
0
            is_explicit_store = 0;
1846
1847
        /* Even if explicit search, we store only 2 results (L0 and L1) */
1848
        /* in finest layer */
1849
1.60k
        if(j == 0)
1850
0
        {
1851
0
            is_explicit_store = 0;
1852
0
        }
1853
1854
        /* coarsest layer alwasy uses 4x4 blks to store results */
1855
1.60k
        if(j == n_tot_layers - 1)
1856
634
        {
1857
634
            num_results = ps_prms->max_num_results_coarse;
1858
634
        }
1859
970
        else
1860
970
        {
1861
970
            num_results = ps_prms->max_num_results;
1862
970
            if(j == 0)
1863
0
                num_results = 1;
1864
970
        }
1865
1.60k
        use_4x4 = hme_get_mv_blk_size(ps_prms->use_4x4, j, n_tot_layers, u1_enc);
1866
1867
        /* for penultimate compute the parameters and store */
1868
1.60k
        if(j == 1)
1869
634
        {
1870
634
            S32 num_blks, num_mvs_per_blk, num_ref;
1871
634
            S32 num_cols, num_rows, num_mvs_per_row;
1872
1873
634
            num_cols = use_4x4 ? ((wd >> 2) + 2) : ((wd >> 3) + 2);
1874
634
            num_rows = use_4x4 ? ((ht >> 2) + 2) : ((ht >> 3) + 2);
1875
1876
634
            if(is_explicit_store)
1877
634
                num_ref = ps_prms->max_num_ref;
1878
0
            else
1879
0
                num_ref = 2;
1880
1881
634
            num_blks = num_cols * num_rows;
1882
634
            num_mvs_per_blk = num_ref * num_results;
1883
634
            num_mvs_per_row = num_mvs_per_blk * num_cols;
1884
1885
634
            ai4_num_mvs_per_row[j] = num_mvs_per_row;
1886
634
            aps_mv_bank[j] = NULL;
1887
634
            api1_ref_idx[j] = NULL;
1888
634
        }
1889
970
        else
1890
970
        {
1891
970
            count += hme_alloc_init_layer_mv_bank(
1892
970
                &ps_memtabs[count],
1893
970
                num_results,
1894
970
                ps_prms->max_num_ref,
1895
970
                use_4x4,
1896
970
                mem_avail,
1897
970
                u1_enc,
1898
970
                wd,
1899
970
                ht,
1900
970
                is_explicit_store,
1901
970
                &aps_mv_bank[j],
1902
970
                &api1_ref_idx[j],
1903
970
                &ai4_num_mvs_per_row[j]);
1904
970
        }
1905
1.60k
    }
1906
1907
    /* Memtabs : Layers * num-ref + 1 */
1908
4.43k
    for(i = 0; i < ps_prms->max_num_ref + 1 + NUM_BUFS_DECOMP_HME; i++)
1909
3.80k
    {
1910
        /* for all layer except encode layer */
1911
13.4k
        for(j = 1; j < n_tot_layers; j++)
1912
9.62k
        {
1913
9.62k
            layer_ctxt_t *ps_layer;
1914
9.62k
            S32 is_explicit_store = 1;
1915
9.62k
            S32 segment_this_layer = (j == 0) ? 1 : ps_prms->segment_higher_layers;
1916
9.62k
            S32 wd, ht;
1917
9.62k
            U08 u1_enc = 0;
1918
9.62k
            wd = a_wd[j];
1919
9.62k
            ht = a_ht[j];
1920
1921
            /* Possibly implicit search for lower (finer) layers */
1922
9.62k
            if(n_tot_layers - j > num_layers_explicit_search)
1923
0
                is_explicit_store = 0;
1924
1925
            /* Even if explicit search, we store only 2 results (L0 and L1) */
1926
            /* in finest layer */
1927
9.62k
            if(j == 0)
1928
0
            {
1929
0
                is_explicit_store = 0;
1930
0
            }
1931
1932
            /* coarsest layer alwasy uses 4x4 blks to store results */
1933
9.62k
            if(j == n_tot_layers - 1)
1934
3.80k
            {
1935
3.80k
                num_results = ps_prms->max_num_results_coarse;
1936
3.80k
            }
1937
5.82k
            else
1938
5.82k
            {
1939
5.82k
                num_results = ps_prms->max_num_results;
1940
5.82k
                if(j == 0)
1941
0
                    num_results = 1;
1942
5.82k
            }
1943
9.62k
            use_4x4 = hme_get_mv_blk_size(ps_prms->use_4x4, j, n_tot_layers, u1_enc);
1944
1945
9.62k
            count += hme_alloc_init_layer(
1946
9.62k
                &ps_memtabs[count],
1947
9.62k
                num_results,
1948
9.62k
                ps_prms->max_num_ref,
1949
9.62k
                use_4x4,
1950
9.62k
                mem_avail,
1951
9.62k
                u1_enc,
1952
9.62k
                wd,
1953
9.62k
                ht,
1954
9.62k
                a_disp_wd[j],
1955
9.62k
                a_disp_ht[j],
1956
9.62k
                segment_this_layer,
1957
9.62k
                is_explicit_store,
1958
9.62k
                &ps_layer);
1959
9.62k
            if(mem_avail)
1960
4.81k
            {
1961
                /* same ps_layer memory pointer is stored in all the threads */
1962
9.62k
                for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
1963
4.81k
                {
1964
4.81k
                    ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
1965
4.81k
                    ps_ctxt->as_ref_descr[i].aps_layers[j] = ps_layer;
1966
4.81k
                }
1967
1968
                /* store the MV bank pointers */
1969
4.81k
                ps_layer->ps_layer_mvbank->max_num_mvs_per_row = ai4_num_mvs_per_row[j];
1970
4.81k
                ps_layer->ps_layer_mvbank->ps_mv_base = aps_mv_bank[j];
1971
4.81k
                ps_layer->ps_layer_mvbank->pi1_ref_idx_base = api1_ref_idx[j];
1972
4.81k
            }
1973
9.62k
        }
1974
3.80k
    }
1975
1976
    /* Memtabs : Prev Row search node at coarsest layer */
1977
634
    wd = a_wd[n_tot_layers - 1];
1978
1979
    /* Allocate a memtab for storing 4x4 SADs for n rows. As many as num ref and number of threads */
1980
634
    num_rows = ps_prms->i4_num_proc_thrds + 1;
1981
634
    if(ps_prms->s_me_coding_tools.e_me_quality_presets < ME_MEDIUM_SPEED)
1982
346
        search_step = HME_COARSE_STEP_SIZE_HIGH_QUALITY;
1983
288
    else
1984
288
        search_step = HME_COARSE_STEP_SIZE_HIGH_SPEED;
1985
1986
    /*shift factor*/
1987
634
    blk_shift = 2; /*4x4*/
1988
634
    search_step >>= 1;
1989
1990
634
    sad_4x4_block_size = ((2 * MAX_MVX_SUPPORTED_IN_COARSE_LAYER) >> search_step) *
1991
634
                         ((2 * MAX_MVY_SUPPORTED_IN_COARSE_LAYER) >> search_step);
1992
634
    sad_4x4_block_stride = ((wd >> blk_shift) + 1) * sad_4x4_block_size;
1993
1994
634
    size = num_rows * sad_4x4_block_stride * sizeof(S16);
1995
3.17k
    for(i = 0; i < ps_prms->max_num_ref; i++)
1996
2.53k
    {
1997
2.53k
        if(mem_avail)
1998
1.26k
        {
1999
1.26k
            ASSERT(size == ps_memtabs[count].size);
2000
2001
            /* same row memory pointer is stored in all the threads */
2002
2.53k
            for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
2003
1.26k
            {
2004
1.26k
                ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
2005
1.26k
                ps_ctxt->api2_sads_4x4_n_rows[i] = (S16 *)ps_memtabs[count].pu1_mem;
2006
1.26k
            }
2007
1.26k
        }
2008
1.26k
        else
2009
1.26k
        {
2010
1.26k
            ps_memtabs[count].size = size;
2011
1.26k
            ps_memtabs[count].align = 4;
2012
1.26k
            ps_memtabs[count].e_mem_attr = HME_SCRATCH_OVLY_MEM;
2013
1.26k
        }
2014
2.53k
        count++;
2015
2.53k
    }
2016
2017
    /* Allocate a memtab for storing best search nodes 8x4 for n rows. Row is allocated for worst case (2*min_wd_coarse/4). As many as num ref and number of threads */
2018
634
    size = num_rows * ((wd >> blk_shift) + 1) * sizeof(search_node_t);
2019
3.17k
    for(i = 0; i < ps_prms->max_num_ref; i++)
2020
2.53k
    {
2021
2.53k
        if(mem_avail)
2022
1.26k
        {
2023
1.26k
            ASSERT(size == ps_memtabs[count].size);
2024
2025
            /* same row memory pointer is stored in all the threads */
2026
2.53k
            for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
2027
1.26k
            {
2028
1.26k
                ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
2029
1.26k
                ps_ctxt->aps_best_search_nodes_8x4_n_rows[i] =
2030
1.26k
                    (search_node_t *)ps_memtabs[count].pu1_mem;
2031
1.26k
            }
2032
1.26k
        }
2033
1.26k
        else
2034
1.26k
        {
2035
1.26k
            ps_memtabs[count].size = size;
2036
1.26k
            ps_memtabs[count].align = 4;
2037
1.26k
            ps_memtabs[count].e_mem_attr = HME_SCRATCH_OVLY_MEM;
2038
1.26k
        }
2039
2.53k
        count++;
2040
2.53k
    }
2041
    /* Allocate a memtab for storing best search nodes 4x8 for n rows. Row is allocated for worst case (2*min_wd_coarse/4). As many as num ref and number of threads */
2042
634
    size = num_rows * ((wd >> blk_shift) + 1) * sizeof(search_node_t);
2043
3.17k
    for(i = 0; i < ps_prms->max_num_ref; i++)
2044
2.53k
    {
2045
2.53k
        if(mem_avail)
2046
1.26k
        {
2047
1.26k
            ASSERT(size == ps_memtabs[count].size);
2048
2049
            /* same row memory pointer is stored in all the threads */
2050
2.53k
            for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
2051
1.26k
            {
2052
1.26k
                ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
2053
1.26k
                ps_ctxt->aps_best_search_nodes_4x8_n_rows[i] =
2054
1.26k
                    (search_node_t *)ps_memtabs[count].pu1_mem;
2055
1.26k
            }
2056
1.26k
        }
2057
1.26k
        else
2058
1.26k
        {
2059
1.26k
            ps_memtabs[count].size = size;
2060
1.26k
            ps_memtabs[count].align = 4;
2061
1.26k
            ps_memtabs[count].e_mem_attr = HME_SCRATCH_OVLY_MEM;
2062
1.26k
        }
2063
2.53k
        count++;
2064
2.53k
    }
2065
2066
    /* Allocate a memtab for each histogram. As many as num ref and number of threads */
2067
3.17k
    for(i = 0; i < ps_prms->max_num_ref; i++)
2068
2.53k
    {
2069
2.53k
        size = ps_prms->i4_num_proc_thrds * sizeof(mv_hist_t);
2070
2.53k
        if(mem_avail)
2071
1.26k
        {
2072
1.26k
            mv_hist_t *ps_mv_hist = (mv_hist_t *)ps_memtabs[count].pu1_mem;
2073
2074
1.26k
            ASSERT(size == ps_memtabs[count].size);
2075
2076
            /* divide the memory accross the threads */
2077
2.53k
            for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
2078
1.26k
            {
2079
1.26k
                ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
2080
1.26k
                ps_ctxt->aps_mv_hist[i] = ps_mv_hist;
2081
1.26k
                ps_mv_hist++;
2082
1.26k
            }
2083
1.26k
        }
2084
1.26k
        else
2085
1.26k
        {
2086
1.26k
            ps_memtabs[count].size = size;
2087
1.26k
            ps_memtabs[count].align = 8;
2088
1.26k
            ps_memtabs[count].e_mem_attr = HME_PERSISTENT_MEM;
2089
1.26k
        }
2090
2.53k
        count++;
2091
2.53k
    }
2092
2093
    /* Memtabs : Search nodes for 8x8 blks */
2094
1.26k
    for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
2095
634
    {
2096
634
        search_results_t *ps_search_results = NULL;
2097
2098
634
        if(mem_avail)
2099
317
        {
2100
317
            ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
2101
317
        }
2102
2103
634
        if(mem_avail)
2104
317
        {
2105
317
            ps_search_results = &ps_ctxt->s_search_results_8x8;
2106
317
        }
2107
634
        count += hme_alloc_init_search_nodes(
2108
634
            ps_search_results,
2109
634
            &ps_memtabs[count],
2110
634
            mem_avail,
2111
634
            ps_prms->max_num_ref,
2112
634
            ps_prms->max_num_results);
2113
634
    }
2114
2115
    /* Weighted inputs, one for each ref  */
2116
634
    size = (ps_prms->max_num_ref + 1) * layer1_blk_width * layer1_blk_width *
2117
634
           ps_prms->i4_num_proc_thrds;
2118
634
    if(mem_avail)
2119
317
    {
2120
317
        U08 *pu1_mem;
2121
317
        ASSERT(ps_memtabs[count].size == size);
2122
317
        pu1_mem = ps_memtabs[count].pu1_mem;
2123
2124
634
        for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
2125
317
        {
2126
317
            ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
2127
2128
1.90k
            for(i = 0; i < ps_prms->max_num_ref + 1; i++)
2129
1.58k
            {
2130
1.58k
                ps_ctxt->s_wt_pred.apu1_wt_inp_buf_array[i] = pu1_mem;
2131
1.58k
                pu1_mem += (layer1_blk_width * layer1_blk_width);
2132
1.58k
            }
2133
317
        }
2134
317
    }
2135
317
    else
2136
317
    {
2137
317
        ps_memtabs[count].size = size;
2138
317
        ps_memtabs[count].align = 16;
2139
317
        ps_memtabs[count].e_mem_attr = HME_SCRATCH_OVLY_MEM;
2140
317
    }
2141
634
    count++;
2142
2143
    /* if memory is allocated the intislaise the frm prms ptr to each thrd */
2144
634
    if(mem_avail)
2145
317
    {
2146
634
        for(num_thrds = 0; num_thrds < ps_prms->i4_num_proc_thrds; num_thrds++)
2147
317
        {
2148
317
            ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
2149
2150
317
            ps_ctxt->ps_hme_frm_prms = &ps_master_ctxt->s_frm_prms;
2151
317
            ps_ctxt->ps_hme_ref_map = &ps_master_ctxt->s_ref_map;
2152
317
        }
2153
317
    }
2154
2155
    /* Memory for ihevce_me_optimised_function_list_t struct  */
2156
634
    if(mem_avail)
2157
317
    {
2158
317
        ps_master_ctxt->pv_me_optimised_function_list = (void *)ps_memtabs[count++].pu1_mem;
2159
317
    }
2160
317
    else
2161
317
    {
2162
317
        ps_memtabs[count].size = sizeof(ihevce_me_optimised_function_list_t);
2163
317
        ps_memtabs[count].align = 16;
2164
317
        ps_memtabs[count++].e_mem_attr = HME_SCRATCH_OVLY_MEM;
2165
317
    }
2166
2167
    //ASSERT(count < hme_enc_num_alloc());
2168
634
    ASSERT(count < hme_coarse_num_alloc());
2169
634
    return (count);
2170
634
}
2171
2172
/*!
2173
******************************************************************************
2174
* \if Function name : ihevce_coarse_me_get_lyr_prms_dep_mngr \endif
2175
*
2176
* \brief Returns to the caller key attributes relevant for dependency manager,
2177
*        ie, the number of vertical units in each layer
2178
*
2179
* \par Description:
2180
*    This function requires the precondition that the width and ht of encode
2181
*    layer is known.
2182
*    The number of layers, number of vertical units in each layer, and for
2183
*    each vertial unit in each layer, its dependency on previous layer's units
2184
*    From ME's perspective, a vertical unit is one which is smallest min size
2185
*    vertically (and spans the entire row horizontally). This is CTB for encode
2186
*    layer, and 8x8 / 4x4 for non encode layers.
2187
*
2188
* \param[in] num_layers : Number of ME Layers
2189
* \param[in] pai4_ht    : Array storing ht at each layer
2190
* \param[in] pai4_wd    : Array storing wd at each layer
2191
* \param[out] pi4_num_vert_units_in_lyr : Array of size N (num layers), each
2192
*                     entry has num vertical units in that particular layer
2193
*
2194
* \return
2195
*    None
2196
*
2197
* \author
2198
*  Ittiam
2199
*
2200
*****************************************************************************
2201
*/
2202
void ihevce_coarse_me_get_lyr_prms_dep_mngr(
2203
    WORD32 num_layers, WORD32 *pai4_ht, WORD32 *pai4_wd, WORD32 *pai4_num_vert_units_in_lyr)
2204
634
{
2205
    /* Height of current and next layers */
2206
634
    WORD32 ht_c, ht_n;
2207
    /* Blk ht at a given layer and next layer*/
2208
634
    WORD32 unit_ht_c, unit_ht_n, blk_ht_c, blk_ht_n;
2209
    /* Number of vertical units in current and next layer */
2210
634
    WORD32 num_vert_c, num_vert_n;
2211
2212
634
    WORD32 ctb_size = 64, num_enc_layers = 1, use_4x4 = 1, i;
2213
634
    UWORD8 au1_encode[MAX_NUM_LAYERS];
2214
2215
634
    memset(au1_encode, 0, num_layers);
2216
634
    memset(au1_encode, 1, num_enc_layers);
2217
2218
634
    ht_n = pai4_ht[num_layers - 2];
2219
634
    ht_c = pai4_ht[num_layers - 1];
2220
2221
    /* compute blk ht and unit ht for c and n */
2222
634
    if(au1_encode[num_layers - 1])
2223
0
    {
2224
0
        blk_ht_c = 16;
2225
0
        unit_ht_c = ctb_size;
2226
0
    }
2227
634
    else
2228
634
    {
2229
634
        blk_ht_c = hme_get_blk_size(use_4x4, num_layers - 1, num_layers, 0);
2230
634
        unit_ht_c = blk_ht_c;
2231
634
    }
2232
2233
634
    num_vert_c = (ht_c + unit_ht_c - 1) / unit_ht_c;
2234
    /* For new design in Coarsest HME layer we need */
2235
    /* one additional row extra at the end of frame */
2236
    /* hence num_vert_c is incremented by 1         */
2237
634
    num_vert_c++;
2238
2239
    /*************************************************************************/
2240
    /* Run through each layer, set the number of vertical units              */
2241
    /*************************************************************************/
2242
2.23k
    for(i = num_layers - 1; i > 0; i--)
2243
1.60k
    {
2244
1.60k
        pai4_num_vert_units_in_lyr[i] = num_vert_c;
2245
2246
        /* "n" is computed for first time */
2247
1.60k
        ht_n = pai4_ht[i - 1];
2248
1.60k
        blk_ht_n = hme_get_blk_size(use_4x4, i - 1, num_layers, 0);
2249
1.60k
        unit_ht_n = blk_ht_n;
2250
1.60k
        if(au1_encode[i - 1])
2251
634
            unit_ht_n = ctb_size;
2252
2253
1.60k
        num_vert_n = (ht_n + unit_ht_n - 1) / unit_ht_n;
2254
2255
        /* Compute the blk size and vert unit size in each layer             */
2256
        /* "c" denotes curr layer, and "n" denotes the layer to which result */
2257
        /* is projected to                                                   */
2258
1.60k
        ht_c = ht_n;
2259
1.60k
        blk_ht_c = blk_ht_n;
2260
1.60k
        unit_ht_c = unit_ht_n;
2261
1.60k
        num_vert_c = num_vert_n;
2262
1.60k
    }
2263
2264
    /* LAYER 0 OR ENCODE LAYER UPDATE : NO OUTPUT DEPS */
2265
    /* set the numebr of vertical units */
2266
634
    pai4_num_vert_units_in_lyr[0] = num_vert_c;
2267
634
}
2268
2269
/**
2270
********************************************************************************
2271
*  @fn     hme_coarse_dep_mngr_alloc_mem()
2272
*
2273
*  @brief  Requests memory for HME Dep Mngr
2274
*
2275
* \param[in,out]  ps_mem_tab : pointer to memory descriptors table
2276
* \param[in] ps_init_prms : Create time static parameters
2277
* \param[in] i4_mem_space : memspace in whihc memory request should be done
2278
*
2279
*  @return  number of memtabs
2280
********************************************************************************
2281
*/
2282
WORD32 hme_coarse_dep_mngr_alloc_mem(
2283
    iv_mem_rec_t *ps_mem_tab,
2284
    ihevce_static_cfg_params_t *ps_init_prms,
2285
    WORD32 i4_mem_space,
2286
    WORD32 i4_num_proc_thrds,
2287
    WORD32 i4_resolution_id)
2288
317
{
2289
317
    WORD32 ai4_num_vert_units_in_lyr[MAX_NUM_HME_LAYERS];
2290
317
    WORD32 a_wd[MAX_NUM_HME_LAYERS], a_ht[MAX_NUM_HME_LAYERS];
2291
317
    WORD32 a_disp_wd[MAX_NUM_HME_LAYERS], a_disp_ht[MAX_NUM_HME_LAYERS];
2292
317
    WORD32 n_enc_layers = 1, n_tot_layers, n_dep_tabs = 0, i;
2293
317
    WORD32 min_cu_size;
2294
2295
    /* get the min cu size from config params */
2296
317
    min_cu_size = ps_init_prms->s_config_prms.i4_min_log2_cu_size;
2297
2298
317
    min_cu_size = 1 << min_cu_size;
2299
2300
    /* Get the width and heights of different decomp layers */
2301
317
    *a_wd = ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_width +
2302
317
            SET_CTB_ALIGN(
2303
317
                ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_width, min_cu_size);
2304
2305
317
    *a_ht =
2306
317
        ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_height +
2307
317
        SET_CTB_ALIGN(
2308
317
            ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_height, min_cu_size);
2309
2310
317
    n_tot_layers = hme_derive_num_layers(n_enc_layers, a_wd, a_ht, a_disp_wd, a_disp_ht);
2311
317
    ASSERT(n_tot_layers >= 3);
2312
2313
    /* --- Get the number of vartical units in each layer for dep. mngr -- */
2314
317
    ihevce_coarse_me_get_lyr_prms_dep_mngr(
2315
317
        n_tot_layers, &a_ht[0], &a_wd[0], &ai4_num_vert_units_in_lyr[0]);
2316
2317
    /* Fill memtabs for HME layers,except for L0 layer */
2318
1.11k
    for(i = 1; i < n_tot_layers; i++)
2319
802
    {
2320
802
        n_dep_tabs += ihevce_dmgr_get_mem_recs(
2321
802
            &ps_mem_tab[n_dep_tabs],
2322
802
            DEP_MNGR_ROW_ROW_SYNC,
2323
802
            ai4_num_vert_units_in_lyr[i],
2324
802
            1, /* Number of Col Tiles :  Not supported in PreEnc */
2325
802
            i4_num_proc_thrds,
2326
802
            i4_mem_space);
2327
802
    }
2328
2329
317
    ASSERT(n_dep_tabs <= hme_coarse_dep_mngr_num_alloc());
2330
2331
317
    return (n_dep_tabs);
2332
317
}
2333
2334
/**
2335
********************************************************************************
2336
*  @fn     hme_coarse_dep_mngr_init()
2337
*
2338
*  @brief  Assign memory for HME Dep Mngr
2339
*
2340
* \param[in,out]  ps_mem_tab : pointer to memory descriptors table
2341
* \param[in] ps_init_prms : Create time static parameters
2342
*  @param[in] pv_ctxt : ME ctxt
2343
* \param[in] pv_osal_handle : Osal handle
2344
*
2345
*  @return  number of memtabs
2346
********************************************************************************
2347
*/
2348
WORD32 hme_coarse_dep_mngr_init(
2349
    iv_mem_rec_t *ps_mem_tab,
2350
    ihevce_static_cfg_params_t *ps_init_prms,
2351
    void *pv_ctxt,
2352
    void *pv_osal_handle,
2353
    WORD32 i4_num_proc_thrds,
2354
    WORD32 i4_resolution_id)
2355
317
{
2356
317
    WORD32 ai4_num_vert_units_in_lyr[MAX_NUM_HME_LAYERS];
2357
317
    WORD32 a_wd[MAX_NUM_HME_LAYERS], a_ht[MAX_NUM_HME_LAYERS];
2358
317
    WORD32 a_disp_wd[MAX_NUM_HME_LAYERS], a_disp_ht[MAX_NUM_HME_LAYERS];
2359
317
    WORD32 n_enc_layers = 1, n_tot_layers, n_dep_tabs = 0, i;
2360
317
    WORD32 min_cu_size;
2361
2362
317
    coarse_me_master_ctxt_t *ps_me_ctxt = (coarse_me_master_ctxt_t *)pv_ctxt;
2363
2364
    /* get the min cu size from config params */
2365
317
    min_cu_size = ps_init_prms->s_config_prms.i4_min_log2_cu_size;
2366
2367
317
    min_cu_size = 1 << min_cu_size;
2368
2369
    /* Get the width and heights of different decomp layers */
2370
317
    *a_wd = ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_width +
2371
317
            SET_CTB_ALIGN(
2372
317
                ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_width, min_cu_size);
2373
317
    *a_ht =
2374
317
        ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_height +
2375
317
        SET_CTB_ALIGN(
2376
317
            ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_height, min_cu_size);
2377
2378
317
    n_tot_layers = hme_derive_num_layers(n_enc_layers, a_wd, a_ht, a_disp_wd, a_disp_ht);
2379
317
    ASSERT(n_tot_layers >= 3);
2380
2381
    /* --- Get the number of vartical units in each layer for dep. mngr -- */
2382
317
    ihevce_coarse_me_get_lyr_prms_dep_mngr(
2383
317
        n_tot_layers, &a_ht[0], &a_wd[0], &ai4_num_vert_units_in_lyr[0]);
2384
2385
    /* --- HME sync Dep Mngr Mem init --    */
2386
1.11k
    for(i = 1; i < n_tot_layers; i++)
2387
802
    {
2388
802
        WORD32 num_blks_in_row, num_blks_in_pic, blk_size_shift;
2389
2390
802
        if(i == (n_tot_layers - 1)) /* coarsest layer */
2391
317
            blk_size_shift = 2;
2392
485
        else
2393
485
            blk_size_shift = 3; /* refine layers */
2394
2395
802
        GET_NUM_BLKS_IN_PIC(a_wd[i], a_ht[i], blk_size_shift, num_blks_in_row, num_blks_in_pic);
2396
2397
        /* Coarsest layer : 1 block extra, since the last block */
2398
802
        if(i == (n_tot_layers - 1)) /*  in a row needs East block */
2399
317
            num_blks_in_row += 1;
2400
2401
        /* Note : i-1, only for HME layers, L0 is separate */
2402
802
        ps_me_ctxt->apv_dep_mngr_hme_sync[i - 1] = ihevce_dmgr_init(
2403
802
            &ps_mem_tab[n_dep_tabs],
2404
802
            pv_osal_handle,
2405
802
            DEP_MNGR_ROW_ROW_SYNC,
2406
802
            ai4_num_vert_units_in_lyr[i],
2407
802
            num_blks_in_row,
2408
802
            1, /* Number of Col Tiles : Not supported in PreEnc */
2409
802
            i4_num_proc_thrds,
2410
802
            1 /*Sem disabled*/
2411
802
        );
2412
2413
802
        n_dep_tabs += ihevce_dmgr_get_num_mem_recs();
2414
802
    }
2415
2416
317
    return n_dep_tabs;
2417
317
}
2418
2419
/**
2420
********************************************************************************
2421
*  @fn     hme_coarse_dep_mngr_reg_sem()
2422
*
2423
*  @brief  Assign semaphores for HME Dep Mngr
2424
*
2425
* \param[in] pv_me_ctxt : pointer to Coarse ME ctxt
2426
* \param[in] ppv_sem_hdls : Arry of semaphore handles
2427
* \param[in] i4_num_proc_thrds : Number of processing threads
2428
*
2429
*  @return  number of memtabs
2430
********************************************************************************
2431
*/
2432
void hme_coarse_dep_mngr_reg_sem(void *pv_ctxt, void **ppv_sem_hdls, WORD32 i4_num_proc_thrds)
2433
317
{
2434
317
    WORD32 i;
2435
317
    coarse_me_master_ctxt_t *ps_me_ctxt = (coarse_me_master_ctxt_t *)pv_ctxt;
2436
317
    coarse_me_ctxt_t *ps_ctxt = ps_me_ctxt->aps_me_ctxt[0];
2437
2438
    /* --- HME sync Dep Mngr semaphore init --    */
2439
1.11k
    for(i = 1; i < ps_ctxt->num_layers; i++)
2440
802
    {
2441
802
        ihevce_dmgr_reg_sem_hdls(
2442
802
            ps_me_ctxt->apv_dep_mngr_hme_sync[i - 1], ppv_sem_hdls, i4_num_proc_thrds);
2443
802
    }
2444
2445
317
    return;
2446
317
}
2447
2448
/**
2449
********************************************************************************
2450
*  @fn     hme_coarse_dep_mngr_delete()
2451
*
2452
*    Destroy Coarse ME Dep Mngr module
2453
*   Note : Only Destroys the resources allocated in the module like
2454
*   semaphore,etc. Memory free is done Separately using memtabs
2455
*
2456
* \param[in] pv_me_ctxt : pointer to Coarse ME ctxt
2457
* \param[in] ps_init_prms : Create time static parameters
2458
*
2459
*  @return  none
2460
********************************************************************************
2461
*/
2462
void hme_coarse_dep_mngr_delete(
2463
    void *pv_me_ctxt, ihevce_static_cfg_params_t *ps_init_prms, WORD32 i4_resolution_id)
2464
317
{
2465
317
    WORD32 a_wd[MAX_NUM_HME_LAYERS], a_ht[MAX_NUM_HME_LAYERS];
2466
317
    WORD32 a_disp_wd[MAX_NUM_HME_LAYERS], a_disp_ht[MAX_NUM_HME_LAYERS];
2467
317
    WORD32 n_enc_layers = 1, n_tot_layers, i;
2468
317
    WORD32 min_cu_size;
2469
2470
317
    coarse_me_master_ctxt_t *ps_me_ctxt = (coarse_me_master_ctxt_t *)pv_me_ctxt;
2471
2472
    /* get the min cu size from config params */
2473
317
    min_cu_size = ps_init_prms->s_config_prms.i4_min_log2_cu_size;
2474
2475
317
    min_cu_size = 1 << min_cu_size;
2476
2477
    /* Get the width and heights of different decomp layers */
2478
317
    *a_wd = ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_width +
2479
317
            SET_CTB_ALIGN(
2480
317
                ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_width, min_cu_size);
2481
317
    *a_ht =
2482
317
        ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_height +
2483
317
        SET_CTB_ALIGN(
2484
317
            ps_init_prms->s_tgt_lyr_prms.as_tgt_params[i4_resolution_id].i4_height, min_cu_size);
2485
317
    n_tot_layers = hme_derive_num_layers(n_enc_layers, a_wd, a_ht, a_disp_wd, a_disp_ht);
2486
317
    ASSERT(n_tot_layers >= 3);
2487
2488
    /* --- HME sync Dep Mngr Delete --    */
2489
1.11k
    for(i = 1; i < n_tot_layers; i++)
2490
802
    {
2491
        /* Note : i-1, only for HME layers, L0 is separate */
2492
802
        ihevce_dmgr_del(ps_me_ctxt->apv_dep_mngr_hme_sync[i - 1]);
2493
802
    }
2494
317
}
2495
2496
/**
2497
*******************************************************************************
2498
*  @fn     S32 hme_enc_alloc(hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms)
2499
*
2500
*  @brief  Fills up memtabs with memory information details required by HME
2501
*
2502
*  @param[out] ps_memtabs : Pointre to an array of memtabs where module fills
2503
*              up its requirements of memory
2504
*
2505
*  @param[in] ps_prms : Input parameters to module crucial in calculating reqd
2506
*                       amt of memory
2507
*
2508
*  @return   Number of memtabs required
2509
*******************************************************************************
2510
*/
2511
S32 hme_enc_alloc(hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms, WORD32 i4_num_me_frm_pllel)
2512
317
{
2513
317
    S32 num, tot, i;
2514
2515
    /* Validation of init params */
2516
317
    if(-1 == hme_validate_init_prms(ps_prms))
2517
0
        return (-1);
2518
2519
317
    num = hme_enc_alloc_init_mem(ps_memtabs, ps_prms, NULL, 0, i4_num_me_frm_pllel);
2520
317
    tot = hme_enc_num_alloc(i4_num_me_frm_pllel);
2521
94.6k
    for(i = num; i < tot; i++)
2522
94.3k
    {
2523
94.3k
        ps_memtabs[i].size = 4;
2524
94.3k
        ps_memtabs[i].align = 4;
2525
94.3k
        ps_memtabs[i].e_mem_attr = HME_PERSISTENT_MEM;
2526
94.3k
    }
2527
317
    return (tot);
2528
317
}
2529
2530
/**
2531
*******************************************************************************
2532
*  @fn     S32 hme_coarse_alloc(hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms)
2533
*
2534
*  @brief  Fills up memtabs with memory information details required by Coarse HME
2535
*
2536
*  @param[out] ps_memtabs : Pointre to an array of memtabs where module fills
2537
*              up its requirements of memory
2538
*
2539
*  @param[in] ps_prms : Input parameters to module crucial in calculating reqd
2540
*                       amt of memory
2541
*
2542
*  @return   Number of memtabs required
2543
*******************************************************************************
2544
*/
2545
S32 hme_coarse_alloc(hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms)
2546
317
{
2547
317
    S32 num, tot, i;
2548
2549
    /* Validation of init params */
2550
317
    if(-1 == hme_validate_init_prms(ps_prms))
2551
0
        return (-1);
2552
2553
317
    num = hme_coarse_alloc_init_mem(ps_memtabs, ps_prms, NULL, 0);
2554
317
    tot = hme_coarse_num_alloc();
2555
79.0k
    for(i = num; i < tot; i++)
2556
78.7k
    {
2557
78.7k
        ps_memtabs[i].size = 4;
2558
78.7k
        ps_memtabs[i].align = 4;
2559
78.7k
        ps_memtabs[i].e_mem_attr = HME_PERSISTENT_MEM;
2560
78.7k
    }
2561
317
    return (tot);
2562
317
}
2563
2564
/**
2565
*******************************************************************************
2566
*  @fn hme_coarse_dep_mngr_alloc
2567
*
2568
*  @brief  Fills up memtabs with memory information details required by Coarse HME
2569
*
2570
* \param[in,out]  ps_mem_tab : pointer to memory descriptors table
2571
* \param[in] ps_init_prms : Create time static parameters
2572
* \param[in] i4_mem_space : memspace in whihc memory request should be done
2573
*
2574
*  @return   Number of memtabs required
2575
*******************************************************************************
2576
*/
2577
WORD32 hme_coarse_dep_mngr_alloc(
2578
    iv_mem_rec_t *ps_mem_tab,
2579
    ihevce_static_cfg_params_t *ps_init_prms,
2580
    WORD32 i4_mem_space,
2581
    WORD32 i4_num_proc_thrds,
2582
    WORD32 i4_resolution_id)
2583
317
{
2584
317
    S32 num, tot, i;
2585
2586
317
    num = hme_coarse_dep_mngr_alloc_mem(
2587
317
        ps_mem_tab, ps_init_prms, i4_mem_space, i4_num_proc_thrds, i4_resolution_id);
2588
317
    tot = hme_coarse_dep_mngr_num_alloc();
2589
2.18k
    for(i = num; i < tot; i++)
2590
1.86k
    {
2591
1.86k
        ps_mem_tab[i].i4_mem_size = 4;
2592
1.86k
        ps_mem_tab[i].i4_mem_alignment = 4;
2593
1.86k
        ps_mem_tab[i].e_mem_type = (IV_MEM_TYPE_T)i4_mem_space;
2594
1.86k
    }
2595
317
    return (tot);
2596
317
}
2597
2598
/**
2599
********************************************************************************
2600
*  @fn     hme_coarse_init_ctxt()
2601
*
2602
*  @brief  initialise context memory
2603
*
2604
*  @param[in] ps_prms : init prms
2605
*
2606
*  @param[in] pv_ctxt : ME ctxt
2607
*
2608
*  @return  number of memtabs
2609
********************************************************************************
2610
*/
2611
void hme_coarse_init_ctxt(coarse_me_master_ctxt_t *ps_master_ctxt, hme_init_prms_t *ps_prms)
2612
317
{
2613
317
    S32 i, j, num_thrds;
2614
317
    coarse_me_ctxt_t *ps_ctxt;
2615
317
    S32 num_rows_coarse;
2616
2617
    /* initialise the parameters inot context of all threads */
2618
634
    for(num_thrds = 0; num_thrds < ps_master_ctxt->i4_num_proc_thrds; num_thrds++)
2619
317
    {
2620
317
        ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
2621
2622
        /* Copy the init prms to context */
2623
317
        ps_ctxt->s_init_prms = *ps_prms;
2624
2625
        /* Initialize some other variables in ctxt */
2626
317
        ps_ctxt->i4_prev_poc = -1;
2627
2628
317
        ps_ctxt->num_b_frms = ps_prms->num_b_frms;
2629
2630
317
        ps_ctxt->apu1_ref_bits_tlu_lc[0] = &ps_ctxt->au1_ref_bits_tlu_lc[0][0];
2631
317
        ps_ctxt->apu1_ref_bits_tlu_lc[1] = &ps_ctxt->au1_ref_bits_tlu_lc[1][0];
2632
2633
        /* Initialize num rows lookuptable */
2634
317
        ps_ctxt->i4_num_row_bufs = ps_prms->i4_num_proc_thrds + 1;
2635
317
        num_rows_coarse = ps_ctxt->i4_num_row_bufs;
2636
43.4k
        for(i = 0; i < ((HEVCE_MAX_HEIGHT >> 1) >> 2); i++)
2637
43.1k
        {
2638
43.1k
            ps_ctxt->ai4_row_index[i] = (i % num_rows_coarse);
2639
43.1k
        }
2640
317
    }
2641
2642
    /* since same layer desc pointer is stored in all the threads ctxt */
2643
    /* layer init is done only using 0th thread ctxt                   */
2644
317
    ps_ctxt = ps_master_ctxt->aps_me_ctxt[0];
2645
2646
    /* Initialize all layers descriptors to have -1 = poc meaning unfilled */
2647
2.21k
    for(i = 0; i < ps_ctxt->max_num_ref + 1 + NUM_BUFS_DECOMP_HME; i++)
2648
1.90k
    {
2649
6.71k
        for(j = 1; j < ps_ctxt->num_layers; j++)
2650
4.81k
        {
2651
4.81k
            layer_ctxt_t *ps_layer;
2652
4.81k
            ps_layer = ps_ctxt->as_ref_descr[i].aps_layers[j];
2653
4.81k
            ps_layer->i4_poc = -1;
2654
4.81k
            ps_layer->ppu1_list_inp = &ps_ctxt->apu1_list_inp[j][0];
2655
4.81k
            memset(
2656
4.81k
                ps_layer->s_global_mv, 0, sizeof(hme_mv_t) * ps_ctxt->max_num_ref * NUM_GMV_LOBES);
2657
4.81k
        }
2658
1.90k
    }
2659
317
}
2660
2661
/**
2662
********************************************************************************
2663
*  @fn     hme_enc_init_ctxt()
2664
*
2665
*  @brief  initialise context memory
2666
*
2667
*  @param[in] ps_prms : init prms
2668
*
2669
*  @param[in] pv_ctxt : ME ctxt
2670
*
2671
*  @return  number of memtabs
2672
********************************************************************************
2673
*/
2674
void hme_enc_init_ctxt(
2675
    me_master_ctxt_t *ps_master_ctxt, hme_init_prms_t *ps_prms, rc_quant_t *ps_rc_quant_ctxt)
2676
317
{
2677
317
    S32 i, j, num_thrds;
2678
317
    me_ctxt_t *ps_ctxt;
2679
317
    me_frm_ctxt_t *ps_frm_ctxt;
2680
2681
    /* initialise the parameters in context of all threads */
2682
634
    for(num_thrds = 0; num_thrds < ps_master_ctxt->i4_num_proc_thrds; num_thrds++)
2683
317
    {
2684
317
        ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
2685
        /* Store Tile params base into ME context */
2686
317
        ps_ctxt->pv_tile_params_base = ps_master_ctxt->pv_tile_params_base;
2687
2688
634
        for(i = 0; i < MAX_NUM_ME_PARALLEL; i++)
2689
317
        {
2690
317
            ps_frm_ctxt = ps_ctxt->aps_me_frm_prms[i];
2691
2692
            /* Copy the init prms to context */
2693
317
            ps_ctxt->s_init_prms = *ps_prms;
2694
2695
            /* Initialize some other variables in ctxt */
2696
317
            ps_frm_ctxt->i4_prev_poc = INVALID_POC;
2697
2698
317
            ps_frm_ctxt->log_ctb_size = ps_prms->log_ctb_size;
2699
2700
317
            ps_frm_ctxt->num_b_frms = ps_prms->num_b_frms;
2701
2702
317
            ps_frm_ctxt->i4_is_prev_frame_reference = 0;
2703
2704
317
            ps_frm_ctxt->ps_rc_quant_ctxt = ps_rc_quant_ctxt;
2705
2706
            /* Initialize mv grids for L0 and L1 used in final refinement layer */
2707
317
            {
2708
317
                hme_init_mv_grid(&ps_frm_ctxt->as_mv_grid[0]);
2709
317
                hme_init_mv_grid(&ps_frm_ctxt->as_mv_grid[1]);
2710
317
                hme_init_mv_grid(&ps_frm_ctxt->as_mv_grid_fpel[0]);
2711
317
                hme_init_mv_grid(&ps_frm_ctxt->as_mv_grid_fpel[1]);
2712
317
                hme_init_mv_grid(&ps_frm_ctxt->as_mv_grid_qpel[0]);
2713
317
                hme_init_mv_grid(&ps_frm_ctxt->as_mv_grid_qpel[1]);
2714
317
            }
2715
2716
317
            ps_frm_ctxt->apu1_ref_bits_tlu_lc[0] = &ps_frm_ctxt->au1_ref_bits_tlu_lc[0][0];
2717
317
            ps_frm_ctxt->apu1_ref_bits_tlu_lc[1] = &ps_frm_ctxt->au1_ref_bits_tlu_lc[1][0];
2718
317
        }
2719
317
    }
2720
2721
    /* since same layer desc pointer is stored in all the threads ctxt */
2722
    /* layer init is done only using 0th thread ctxt                   */
2723
317
    ps_ctxt = ps_master_ctxt->aps_me_ctxt[0];
2724
2725
317
    ps_frm_ctxt = ps_ctxt->aps_me_frm_prms[0];
2726
2727
    /* Initialize all layers descriptors to have -1 = poc meaning unfilled */
2728
634
    for(i = 0; i < (ps_frm_ctxt->max_num_ref * ps_master_ctxt->i4_num_me_frm_pllel) + 1; i++)
2729
317
    {
2730
        /* only enocde layer is processed */
2731
634
        for(j = 0; j < 1; j++)
2732
317
        {
2733
317
            layer_ctxt_t *ps_layer;
2734
317
            ps_layer = ps_ctxt->as_ref_descr[i].aps_layers[j];
2735
317
            ps_layer->i4_poc = INVALID_POC;
2736
317
            ps_layer->i4_is_free = 1;
2737
317
            ps_layer->ppu1_list_inp = &ps_frm_ctxt->apu1_list_inp[j][0];
2738
317
            ps_layer->ppu1_list_rec_fxfy = &ps_frm_ctxt->apu1_list_rec_fxfy[j][0];
2739
317
            ps_layer->ppu1_list_rec_hxfy = &ps_frm_ctxt->apu1_list_rec_hxfy[j][0];
2740
317
            ps_layer->ppu1_list_rec_fxhy = &ps_frm_ctxt->apu1_list_rec_fxhy[j][0];
2741
317
            ps_layer->ppu1_list_rec_hxhy = &ps_frm_ctxt->apu1_list_rec_hxhy[j][0];
2742
317
            ps_layer->ppv_dep_mngr_recon = &ps_frm_ctxt->apv_list_dep_mngr[j][0];
2743
2744
317
            memset(
2745
317
                ps_layer->s_global_mv,
2746
317
                0,
2747
317
                sizeof(hme_mv_t) * ps_frm_ctxt->max_num_ref * NUM_GMV_LOBES);
2748
317
        }
2749
317
    }
2750
317
}
2751
2752
/**
2753
*******************************************************************************
2754
*  @fn     S32 hme_enc_init(hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms,rc_quant_t *ps_rc_quant_ctxt)
2755
*
2756
*  @brief  Initialises the Encode Layer HME ctxt
2757
*
2758
*  @param[out] ps_memtabs : Pointer to an array of memtabs where module fills
2759
*              up its requirements of memory
2760
*
2761
*  @param[in] ps_prms : Input parameters to module crucial in calculating reqd
2762
*                       amt of memory
2763
*
2764
*  @return   Number of memtabs required
2765
*******************************************************************************
2766
*/
2767
S32 hme_enc_init(
2768
    void *pv_ctxt,
2769
    hme_memtab_t *ps_memtabs,
2770
    hme_init_prms_t *ps_prms,
2771
    rc_quant_t *ps_rc_quant_ctxt,
2772
    WORD32 i4_num_me_frm_pllel)
2773
317
{
2774
317
    S32 num, tot;
2775
317
    me_master_ctxt_t *ps_ctxt = (me_master_ctxt_t *)pv_ctxt;
2776
2777
317
    tot = hme_enc_num_alloc(i4_num_me_frm_pllel);
2778
    /* Validation of init params */
2779
317
    if(-1 == hme_validate_init_prms(ps_prms))
2780
0
        return (-1);
2781
2782
317
    num = hme_enc_alloc_init_mem(ps_memtabs, ps_prms, pv_ctxt, 1, i4_num_me_frm_pllel);
2783
317
    if(num > tot)
2784
0
        return (-1);
2785
2786
    /* Initialize all enumerations based globals */
2787
    //hme_init_globals(); /* done as part of coarse me */
2788
2789
    /* Copy the memtabs into the context for returning during free */
2790
317
    memcpy(ps_ctxt->as_memtabs, ps_memtabs, sizeof(hme_memtab_t) * tot);
2791
2792
    /* initialize the context and related buffers */
2793
317
    hme_enc_init_ctxt(ps_ctxt, ps_prms, ps_rc_quant_ctxt);
2794
317
    return (0);
2795
317
}
2796
2797
/**
2798
*******************************************************************************
2799
*  @fn     S32 hme_coarse_init(hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms)
2800
*
2801
*  @brief  Initialises the Coarse HME ctxt
2802
*
2803
*  @param[out] ps_memtabs : Pointer to an array of memtabs where module fills
2804
*              up its requirements of memory
2805
*
2806
*  @param[in] ps_prms : Input parameters to module crucial in calculating reqd
2807
*                       amt of memory
2808
*
2809
*  @return   Number of memtabs required
2810
*******************************************************************************
2811
*/
2812
S32 hme_coarse_init(void *pv_ctxt, hme_memtab_t *ps_memtabs, hme_init_prms_t *ps_prms)
2813
317
{
2814
317
    S32 num, tot;
2815
317
    coarse_me_master_ctxt_t *ps_ctxt = (coarse_me_master_ctxt_t *)pv_ctxt;
2816
2817
317
    tot = hme_coarse_num_alloc();
2818
    /* Validation of init params */
2819
317
    if(-1 == hme_validate_init_prms(ps_prms))
2820
0
        return (-1);
2821
2822
317
    num = hme_coarse_alloc_init_mem(ps_memtabs, ps_prms, pv_ctxt, 1);
2823
317
    if(num > tot)
2824
0
        return (-1);
2825
2826
    /* Initialize all enumerations based globals */
2827
317
    hme_init_globals();
2828
2829
    /* Copy the memtabs into the context for returning during free */
2830
317
    memcpy(ps_ctxt->as_memtabs, ps_memtabs, sizeof(hme_memtab_t) * tot);
2831
2832
    /* initialize the context and related buffers */
2833
317
    hme_coarse_init_ctxt(ps_ctxt, ps_prms);
2834
2835
317
    return (0);
2836
317
}
2837
2838
/**
2839
*******************************************************************************
2840
*  @fn     S32 hme_set_resolution(void *pv_me_ctxt,
2841
*                                   S32 n_enc_layers,
2842
*                                   S32 *p_wd,
2843
*                                   S32 *p_ht
2844
*
2845
*  @brief  Sets up the layers based on resolution information.
2846
*
2847
*  @param[in, out] pv_me_ctxt : ME handle, updated with the resolution info
2848
*
2849
*  @param[in] n_enc_layers : Number of layers encoded
2850
*
2851
*  @param[in] p_wd : Pointer to an array having widths for each encode layer
2852
*
2853
*  @param[in] p_ht : Pointer to an array having heights for each encode layer
2854
*
2855
*  @return   void
2856
*******************************************************************************
2857
*/
2858
2859
void hme_set_resolution(void *pv_me_ctxt, S32 n_enc_layers, S32 *p_wd, S32 *p_ht, S32 me_frm_id)
2860
317
{
2861
317
    S32 n_tot_layers, num_layers_explicit_search, i, j;
2862
317
    me_ctxt_t *ps_thrd_ctxt;
2863
317
    me_frm_ctxt_t *ps_ctxt;
2864
2865
317
    S32 a_wd[MAX_NUM_LAYERS], a_ht[MAX_NUM_LAYERS];
2866
317
    S32 a_disp_wd[MAX_NUM_LAYERS], a_disp_ht[MAX_NUM_LAYERS];
2867
317
    memcpy(a_wd, p_wd, n_enc_layers * sizeof(S32));
2868
317
    memcpy(a_ht, p_ht, n_enc_layers * sizeof(S32));
2869
2870
317
    ps_thrd_ctxt = (me_ctxt_t *)pv_me_ctxt;
2871
2872
317
    ps_ctxt = ps_thrd_ctxt->aps_me_frm_prms[me_frm_id];
2873
2874
    /*************************************************************************/
2875
    /* Derive the number of HME layers, including both encoded and non encode*/
2876
    /* This function also derives the width and ht of each layer.            */
2877
    /*************************************************************************/
2878
317
    n_tot_layers = hme_derive_num_layers(n_enc_layers, a_wd, a_ht, a_disp_wd, a_disp_ht);
2879
317
    num_layers_explicit_search = ps_thrd_ctxt->s_init_prms.num_layers_explicit_search;
2880
317
    if(num_layers_explicit_search <= 0)
2881
0
        num_layers_explicit_search = n_tot_layers - 1;
2882
2883
317
    num_layers_explicit_search = MIN(num_layers_explicit_search, n_tot_layers - 1);
2884
317
    ps_ctxt->num_layers_explicit_search = num_layers_explicit_search;
2885
317
    memset(ps_ctxt->u1_encode, 0, n_tot_layers);
2886
317
    memset(ps_ctxt->u1_encode, 1, n_enc_layers);
2887
2888
    /* only encode layer should be processed */
2889
317
    ps_ctxt->num_layers = n_tot_layers;
2890
2891
317
    ps_ctxt->i4_wd = a_wd[0];
2892
317
    ps_ctxt->i4_ht = a_ht[0];
2893
2894
    /* Memtabs : Layers * num-ref + 1 */
2895
1.90k
    for(i = 0; i < ps_ctxt->max_num_ref + 1; i++)
2896
1.58k
    {
2897
3.17k
        for(j = 0; j < 1; j++)
2898
1.58k
        {
2899
1.58k
            S32 wd, ht;
2900
1.58k
            layer_ctxt_t *ps_layer;
2901
1.58k
            U08 u1_enc = ps_ctxt->u1_encode[j];
2902
1.58k
            wd = a_wd[j];
2903
1.58k
            ht = a_ht[j];
2904
1.58k
            ps_layer = ps_thrd_ctxt->as_ref_descr[i].aps_layers[j];
2905
1.58k
            hme_set_layer_res_attrs(ps_layer, wd, ht, a_disp_wd[j], a_disp_ht[j], u1_enc);
2906
1.58k
        }
2907
1.58k
    }
2908
317
}
2909
2910
/**
2911
*******************************************************************************
2912
*  @fn     S32 hme_coarse_set_resolution(void *pv_me_ctxt,
2913
*                                   S32 n_enc_layers,
2914
*                                   S32 *p_wd,
2915
*                                   S32 *p_ht
2916
*
2917
*  @brief  Sets up the layers based on resolution information.
2918
*
2919
*  @param[in, out] pv_me_ctxt : ME handle, updated with the resolution info
2920
*
2921
*  @param[in] n_enc_layers : Number of layers encoded
2922
*
2923
*  @param[in] p_wd : Pointer to an array having widths for each encode layer
2924
*
2925
*  @param[in] p_ht : Pointer to an array having heights for each encode layer
2926
*
2927
*  @return   void
2928
*******************************************************************************
2929
*/
2930
2931
void hme_coarse_set_resolution(void *pv_me_ctxt, S32 n_enc_layers, S32 *p_wd, S32 *p_ht)
2932
317
{
2933
317
    S32 n_tot_layers, num_layers_explicit_search, i, j;
2934
317
    coarse_me_ctxt_t *ps_ctxt;
2935
317
    S32 a_wd[MAX_NUM_LAYERS], a_ht[MAX_NUM_LAYERS];
2936
317
    S32 a_disp_wd[MAX_NUM_LAYERS], a_disp_ht[MAX_NUM_LAYERS];
2937
317
    memcpy(a_wd, p_wd, n_enc_layers * sizeof(S32));
2938
317
    memcpy(a_ht, p_ht, n_enc_layers * sizeof(S32));
2939
2940
317
    ps_ctxt = (coarse_me_ctxt_t *)pv_me_ctxt;
2941
    /*************************************************************************/
2942
    /* Derive the number of HME layers, including both encoded and non encode*/
2943
    /* This function also derives the width and ht of each layer.            */
2944
    /*************************************************************************/
2945
317
    n_tot_layers = hme_derive_num_layers(n_enc_layers, a_wd, a_ht, a_disp_wd, a_disp_ht);
2946
317
    num_layers_explicit_search = ps_ctxt->s_init_prms.num_layers_explicit_search;
2947
317
    if(num_layers_explicit_search <= 0)
2948
0
        num_layers_explicit_search = n_tot_layers - 1;
2949
2950
317
    num_layers_explicit_search = MIN(num_layers_explicit_search, n_tot_layers - 1);
2951
317
    ps_ctxt->num_layers_explicit_search = num_layers_explicit_search;
2952
317
    memset(ps_ctxt->u1_encode, 0, n_tot_layers);
2953
317
    memset(ps_ctxt->u1_encode, 1, n_enc_layers);
2954
2955
    /* encode layer should be excluded */
2956
317
    ps_ctxt->num_layers = n_tot_layers;
2957
2958
317
    memcpy(ps_ctxt->a_wd, a_wd, sizeof(S32) * n_tot_layers);
2959
317
    memcpy(ps_ctxt->a_ht, a_ht, sizeof(S32) * n_tot_layers);
2960
2961
    /* Memtabs : Layers * num-ref + 1 */
2962
2.21k
    for(i = 0; i < ps_ctxt->max_num_ref + 1 + NUM_BUFS_DECOMP_HME; i++)
2963
1.90k
    {
2964
6.71k
        for(j = 1; j < n_tot_layers; j++)
2965
4.81k
        {
2966
4.81k
            S32 wd, ht;
2967
4.81k
            layer_ctxt_t *ps_layer;
2968
4.81k
            U08 u1_enc = ps_ctxt->u1_encode[j];
2969
4.81k
            wd = a_wd[j];
2970
4.81k
            ht = a_ht[j];
2971
4.81k
            ps_layer = ps_ctxt->as_ref_descr[i].aps_layers[j];
2972
4.81k
            hme_set_layer_res_attrs(ps_layer, wd, ht, a_disp_wd[j], a_disp_ht[j], u1_enc);
2973
4.81k
        }
2974
1.90k
    }
2975
317
}
2976
2977
S32 hme_find_descr_idx(me_ctxt_t *ps_ctxt, S32 i4_poc, S32 i4_idr_gop_num, S32 i4_num_me_frm_pllel)
2978
16.1k
{
2979
16.1k
    S32 i;
2980
2981
46.6k
    for(i = 0; i < (ps_ctxt->aps_me_frm_prms[0]->max_num_ref * i4_num_me_frm_pllel) + 1; i++)
2982
46.6k
    {
2983
46.6k
        if(ps_ctxt->as_ref_descr[i].aps_layers[0]->i4_poc == i4_poc &&
2984
16.6k
           ps_ctxt->as_ref_descr[i].aps_layers[0]->i4_idr_gop_num == i4_idr_gop_num)
2985
16.1k
            return i;
2986
46.6k
    }
2987
    /* Should not come here */
2988
0
    ASSERT(0);
2989
0
    return (-1);
2990
0
}
2991
2992
S32 hme_coarse_find_descr_idx(coarse_me_ctxt_t *ps_ctxt, S32 i4_poc)
2993
15.4k
{
2994
15.4k
    S32 i;
2995
2996
48.3k
    for(i = 0; i < ps_ctxt->max_num_ref + 1 + NUM_BUFS_DECOMP_HME; i++)
2997
48.3k
    {
2998
48.3k
        if(ps_ctxt->as_ref_descr[i].aps_layers[1]->i4_poc == i4_poc)
2999
15.4k
            return i;
3000
48.3k
    }
3001
    /* Should not come here */
3002
0
    ASSERT(0);
3003
0
    return (-1);
3004
0
}
3005
3006
S32 hme_find_free_descr_idx(me_ctxt_t *ps_ctxt, S32 i4_num_me_frm_pllel)
3007
6.35k
{
3008
6.35k
    S32 i;
3009
3010
17.9k
    for(i = 0; i < (ps_ctxt->aps_me_frm_prms[0]->max_num_ref * i4_num_me_frm_pllel) + 1; i++)
3011
17.9k
    {
3012
17.9k
        if(ps_ctxt->as_ref_descr[i].aps_layers[0]->i4_is_free == 1)
3013
6.35k
        {
3014
6.35k
            ps_ctxt->as_ref_descr[i].aps_layers[0]->i4_is_free = 0;
3015
6.35k
            return i;
3016
6.35k
        }
3017
17.9k
    }
3018
    /* Should not come here */
3019
0
    ASSERT(0);
3020
0
    return (-1);
3021
0
}
3022
3023
S32 hme_coarse_find_free_descr_idx(void *pv_ctxt)
3024
6.35k
{
3025
6.35k
    S32 i;
3026
3027
6.35k
    coarse_me_ctxt_t *ps_ctxt = (coarse_me_ctxt_t *)pv_ctxt;
3028
3029
19.5k
    for(i = 0; i < ps_ctxt->max_num_ref + 1 + NUM_BUFS_DECOMP_HME; i++)
3030
19.5k
    {
3031
19.5k
        if(ps_ctxt->as_ref_descr[i].aps_layers[1]->i4_poc == -1)
3032
6.35k
            return i;
3033
19.5k
    }
3034
    /* Should not come here */
3035
0
    ASSERT(0);
3036
0
    return (-1);
3037
0
}
3038
3039
void hme_discard_frm(
3040
    void *pv_me_ctxt, S32 *p_pocs_to_remove, S32 i4_idr_gop_num, S32 i4_num_me_frm_pllel)
3041
6.35k
{
3042
6.35k
    me_ctxt_t *ps_ctxt = (me_ctxt_t *)pv_me_ctxt;
3043
6.35k
    S32 count = 0, idx, i;
3044
6.35k
    layers_descr_t *ps_descr;
3045
3046
    /* Search for the id of the layer descriptor that has this poc */
3047
12.3k
    while(p_pocs_to_remove[count] != INVALID_POC)
3048
6.03k
    {
3049
6.03k
        ASSERT(count == 0);
3050
6.03k
        idx = hme_find_descr_idx(
3051
6.03k
            ps_ctxt, p_pocs_to_remove[count], i4_idr_gop_num, i4_num_me_frm_pllel);
3052
6.03k
        ps_descr = &ps_ctxt->as_ref_descr[idx];
3053
        /*********************************************************************/
3054
        /* Setting i4_is_free = 1 in all layers invalidates this layer ctxt        */
3055
        /* Now this can be used for a fresh picture.                         */
3056
        /*********************************************************************/
3057
12.0k
        for(i = 0; i < 1; i++)
3058
6.03k
        {
3059
6.03k
            ps_descr->aps_layers[i]->i4_is_free = 1;
3060
6.03k
        }
3061
6.03k
        count++;
3062
6.03k
    }
3063
6.35k
}
3064
3065
void hme_coarse_discard_frm(void *pv_me_ctxt, S32 *p_pocs_to_remove)
3066
6.35k
{
3067
6.35k
    coarse_me_ctxt_t *ps_ctxt = (coarse_me_ctxt_t *)pv_me_ctxt;
3068
6.35k
    S32 count = 0, idx, i;
3069
6.35k
    layers_descr_t *ps_descr;
3070
3071
    /* Search for the id of the layer descriptor that has this poc */
3072
11.7k
    while(p_pocs_to_remove[count] != -1)
3073
5.36k
    {
3074
5.36k
        idx = hme_coarse_find_descr_idx(ps_ctxt, p_pocs_to_remove[count]);
3075
5.36k
        ps_descr = &ps_ctxt->as_ref_descr[idx];
3076
        /*********************************************************************/
3077
        /* Setting poc = -1 in all layers invalidates this layer ctxt        */
3078
        /* Now this can be used for a fresh picture.                         */
3079
        /*********************************************************************/
3080
16.2k
        for(i = 1; i < ps_ctxt->num_layers; i++)
3081
10.9k
        {
3082
10.9k
            ps_descr->aps_layers[i]->i4_poc = -1;
3083
10.9k
        }
3084
5.36k
        count++;
3085
5.36k
    }
3086
6.35k
}
3087
3088
void hme_update_layer_desc(
3089
    layers_descr_t *ps_layers_desc,
3090
    hme_ref_desc_t *ps_ref_desc,
3091
    S32 start_lyr_id,
3092
    S32 num_layers,
3093
    layers_descr_t *ps_curr_desc)
3094
20.2k
{
3095
20.2k
    layer_ctxt_t *ps_layer_ctxt, *ps_curr_layer;
3096
20.2k
    S32 i;
3097
41.4k
    for(i = start_lyr_id; i < num_layers; i++)
3098
21.1k
    {
3099
21.1k
        ps_layer_ctxt = ps_layers_desc->aps_layers[i];
3100
21.1k
        ps_curr_layer = ps_curr_desc->aps_layers[i];
3101
3102
21.1k
        ps_layer_ctxt->i4_poc = ps_ref_desc->i4_poc;
3103
21.1k
        ps_layer_ctxt->i4_idr_gop_num = ps_ref_desc->i4_GOP_num;
3104
3105
        /* Copy the recon planes for the given reference pic at given layer */
3106
21.1k
        ps_layer_ctxt->pu1_rec_fxfy = ps_ref_desc->as_ref_info[i].pu1_rec_fxfy;
3107
21.1k
        ps_layer_ctxt->pu1_rec_hxfy = ps_ref_desc->as_ref_info[i].pu1_rec_hxfy;
3108
21.1k
        ps_layer_ctxt->pu1_rec_fxhy = ps_ref_desc->as_ref_info[i].pu1_rec_fxhy;
3109
21.1k
        ps_layer_ctxt->pu1_rec_hxhy = ps_ref_desc->as_ref_info[i].pu1_rec_hxhy;
3110
3111
        /*********************************************************************/
3112
        /* reconstruction strides, offsets and padding info are copied for   */
3113
        /* this reference pic. It is assumed that these will be same across  */
3114
        /* pics, so even the current pic has this info updated, though the   */
3115
        /* current pic still does not have valid recon pointers.             */
3116
        /*********************************************************************/
3117
21.1k
        ps_layer_ctxt->i4_rec_stride = ps_ref_desc->as_ref_info[i].luma_stride;
3118
21.1k
        ps_layer_ctxt->i4_rec_offset = ps_ref_desc->as_ref_info[i].luma_offset;
3119
21.1k
        ps_layer_ctxt->i4_pad_x_rec = ps_ref_desc->as_ref_info[i].u1_pad_x;
3120
21.1k
        ps_layer_ctxt->i4_pad_y_rec = ps_ref_desc->as_ref_info[i].u1_pad_y;
3121
3122
21.1k
        ps_curr_layer->i4_rec_stride = ps_ref_desc->as_ref_info[i].luma_stride;
3123
21.1k
        ps_curr_layer->i4_pad_x_rec = ps_ref_desc->as_ref_info[i].u1_pad_x;
3124
21.1k
        ps_curr_layer->i4_pad_y_rec = ps_ref_desc->as_ref_info[i].u1_pad_y;
3125
21.1k
    }
3126
20.2k
}
3127
3128
void hme_add_inp(void *pv_me_ctxt, hme_inp_desc_t *ps_inp_desc, S32 me_frm_id, S32 i4_thrd_id)
3129
6.35k
{
3130
6.35k
    layers_descr_t *ps_desc;
3131
6.35k
    layer_ctxt_t *ps_layer_ctxt;
3132
6.35k
    me_master_ctxt_t *ps_master_ctxt = (me_master_ctxt_t *)pv_me_ctxt;
3133
6.35k
    me_ctxt_t *ps_thrd_ctxt;
3134
6.35k
    me_frm_ctxt_t *ps_ctxt;
3135
3136
6.35k
    hme_inp_buf_attr_t *ps_attr;
3137
6.35k
    S32 i4_poc, idx, i, i4_prev_poc;
3138
6.35k
    S32 num_thrds, prev_me_frm_id;
3139
6.35k
    S32 i4_idr_gop_num, i4_is_reference;
3140
3141
    /* since same layer desc pointer is stored in all thread ctxt */
3142
    /* a free idx is obtained using 0th thread ctxt pointer */
3143
3144
6.35k
    ps_thrd_ctxt = ps_master_ctxt->aps_me_ctxt[i4_thrd_id];
3145
3146
6.35k
    ps_ctxt = ps_thrd_ctxt->aps_me_frm_prms[me_frm_id];
3147
3148
    /* Deriving the previous poc from previous frames context */
3149
6.35k
    if(me_frm_id == 0)
3150
6.35k
        prev_me_frm_id = (MAX_NUM_ME_PARALLEL - 1);
3151
0
    else
3152
0
        prev_me_frm_id = me_frm_id - 1;
3153
3154
6.35k
    i4_prev_poc = ps_thrd_ctxt->aps_me_frm_prms[prev_me_frm_id]->i4_curr_poc;
3155
3156
    /* Obtain an empty layer descriptor */
3157
6.35k
    idx = hme_find_free_descr_idx(ps_thrd_ctxt, ps_master_ctxt->i4_num_me_frm_pllel);
3158
6.35k
    ps_desc = &ps_thrd_ctxt->as_ref_descr[idx];
3159
3160
    /* initialise the parameters for all the threads */
3161
12.7k
    for(num_thrds = 0; num_thrds < ps_master_ctxt->i4_num_proc_thrds; num_thrds++)
3162
6.35k
    {
3163
6.35k
        me_frm_ctxt_t *ps_tmp_frm_ctxt;
3164
3165
6.35k
        ps_thrd_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
3166
6.35k
        ps_tmp_frm_ctxt = ps_thrd_ctxt->aps_me_frm_prms[me_frm_id];
3167
3168
6.35k
        ps_tmp_frm_ctxt->ps_curr_descr = &ps_thrd_ctxt->as_ref_descr[idx];
3169
3170
        /* Do the initialization for the first thread alone */
3171
6.35k
        i4_poc = ps_inp_desc->i4_poc;
3172
6.35k
        i4_idr_gop_num = ps_inp_desc->i4_idr_gop_num;
3173
6.35k
        i4_is_reference = ps_inp_desc->i4_is_reference;
3174
        /*Update poc id of previously encoded frm and curr frm */
3175
6.35k
        ps_tmp_frm_ctxt->i4_prev_poc = i4_prev_poc;
3176
6.35k
        ps_tmp_frm_ctxt->i4_curr_poc = i4_poc;
3177
6.35k
    }
3178
3179
    /* since same layer desc pointer is stored in all thread ctxt */
3180
    /* following processing is done using 0th thread ctxt pointer */
3181
6.35k
    ps_thrd_ctxt = ps_master_ctxt->aps_me_ctxt[0];
3182
3183
    /* only encode layer */
3184
12.7k
    for(i = 0; i < 1; i++)
3185
6.35k
    {
3186
6.35k
        ps_layer_ctxt = ps_desc->aps_layers[i];
3187
6.35k
        ps_attr = &ps_inp_desc->s_layer_desc[i];
3188
3189
6.35k
        ps_layer_ctxt->i4_poc = i4_poc;
3190
6.35k
        ps_layer_ctxt->i4_idr_gop_num = i4_idr_gop_num;
3191
6.35k
        ps_layer_ctxt->i4_is_reference = i4_is_reference;
3192
6.35k
        ps_layer_ctxt->i4_non_ref_free = 0;
3193
3194
        /* If this layer is encoded, copy input attributes */
3195
6.35k
        if(ps_ctxt->u1_encode[i])
3196
6.35k
        {
3197
6.35k
            ps_layer_ctxt->pu1_inp = ps_attr->pu1_y;
3198
6.35k
            ps_layer_ctxt->i4_inp_stride = ps_attr->luma_stride;
3199
6.35k
            ps_layer_ctxt->i4_pad_x_inp = 0;
3200
6.35k
            ps_layer_ctxt->i4_pad_y_inp = 0;
3201
6.35k
        }
3202
0
        else
3203
0
        {
3204
            /* If not encoded, then ME owns the buffer.*/
3205
0
            S32 wd, dst_stride;
3206
3207
0
            ASSERT(i != 0);
3208
3209
0
            wd = ps_ctxt->i4_wd;
3210
3211
            /* destination has padding on either side of 16 */
3212
0
            dst_stride = CEIL16((wd >> 1)) + 32 + 4;
3213
0
            ps_layer_ctxt->i4_inp_stride = dst_stride;
3214
0
        }
3215
6.35k
    }
3216
3217
6.35k
    return;
3218
6.35k
}
3219
3220
void hme_coarse_add_inp(void *pv_me_ctxt, hme_inp_desc_t *ps_inp_desc, WORD32 i4_curr_idx)
3221
6.35k
{
3222
6.35k
    layers_descr_t *ps_desc;
3223
6.35k
    layer_ctxt_t *ps_layer_ctxt;
3224
6.35k
    coarse_me_master_ctxt_t *ps_master_ctxt = (coarse_me_master_ctxt_t *)pv_me_ctxt;
3225
6.35k
    coarse_me_ctxt_t *ps_ctxt;
3226
6.35k
    hme_inp_buf_attr_t *ps_attr;
3227
6.35k
    S32 i4_poc, i;
3228
6.35k
    S32 num_thrds;
3229
3230
    /* since same layer desc pointer is stored in all thread ctxt */
3231
    /* a free idx is obtained using 0th thread ctxt pointer */
3232
6.35k
    ps_ctxt = ps_master_ctxt->aps_me_ctxt[0];
3233
3234
6.35k
    ps_desc = &ps_ctxt->as_ref_descr[i4_curr_idx];
3235
3236
    /* initialise the parameters for all the threads */
3237
12.7k
    for(num_thrds = 0; num_thrds < ps_master_ctxt->i4_num_proc_thrds; num_thrds++)
3238
6.35k
    {
3239
6.35k
        ps_ctxt = ps_master_ctxt->aps_me_ctxt[num_thrds];
3240
6.35k
        ps_ctxt->ps_curr_descr = &ps_ctxt->as_ref_descr[i4_curr_idx];
3241
6.35k
        i4_poc = ps_inp_desc->i4_poc;
3242
3243
        /*Update poc id of previously encoded frm and curr frm */
3244
6.35k
        ps_ctxt->i4_prev_poc = ps_ctxt->i4_curr_poc;
3245
6.35k
        ps_ctxt->i4_curr_poc = i4_poc;
3246
6.35k
    }
3247
3248
    /* since same layer desc pointer is stored in all thread ctxt */
3249
    /* following processing is done using 0th thread ctxt pointer */
3250
6.35k
    ps_ctxt = ps_master_ctxt->aps_me_ctxt[0];
3251
3252
    /* only non encode layer */
3253
19.7k
    for(i = 1; i < ps_ctxt->num_layers; i++)
3254
13.3k
    {
3255
13.3k
        ps_layer_ctxt = ps_desc->aps_layers[i];
3256
13.3k
        ps_attr = &ps_inp_desc->s_layer_desc[i];
3257
3258
13.3k
        ps_layer_ctxt->i4_poc = i4_poc;
3259
        /* If this layer is encoded, copy input attributes */
3260
13.3k
        if(ps_ctxt->u1_encode[i])
3261
0
        {
3262
0
            ps_layer_ctxt->pu1_inp = ps_attr->pu1_y;
3263
0
            ps_layer_ctxt->i4_inp_stride = ps_attr->luma_stride;
3264
0
            ps_layer_ctxt->i4_pad_x_inp = 0;
3265
0
            ps_layer_ctxt->i4_pad_y_inp = 0;
3266
0
        }
3267
13.3k
        else
3268
13.3k
        {
3269
            /* If not encoded, then ME owns the buffer.           */
3270
            /* decomp of lower layers happens on a seperate pass  */
3271
            /* Coarse Me should export the pointers to the caller */
3272
13.3k
            S32 wd, dst_stride;
3273
3274
13.3k
            ASSERT(i != 0);
3275
3276
13.3k
            wd = ps_ctxt->a_wd[i - 1];
3277
3278
            /* destination has padding on either side of 16 */
3279
13.3k
            dst_stride = CEIL16((wd >> 1)) + 32 + 4;
3280
13.3k
            ps_layer_ctxt->i4_inp_stride = dst_stride;
3281
13.3k
        }
3282
13.3k
    }
3283
6.35k
}
3284
3285
static __inline U08 hme_determine_num_results_per_part(
3286
    U08 u1_layer_id, U08 u1_num_layers, ME_QUALITY_PRESETS_T e_quality_preset)
3287
22.3k
{
3288
22.3k
    U08 u1_num_results_per_part = MAX_RESULTS_PER_PART;
3289
3290
22.3k
    if((u1_layer_id == 0) && !!RESTRICT_NUM_PARTITION_LEVEL_L0ME_RESULTS_TO_1)
3291
9.89k
    {
3292
9.89k
        switch(e_quality_preset)
3293
9.89k
        {
3294
2.84k
        case ME_XTREME_SPEED_25:
3295
5.26k
        case ME_XTREME_SPEED:
3296
6.87k
        case ME_HIGH_SPEED:
3297
8.25k
        case ME_MEDIUM_SPEED:
3298
8.62k
        case ME_HIGH_QUALITY:
3299
9.89k
        case ME_PRISTINE_QUALITY:
3300
9.89k
        {
3301
9.89k
            u1_num_results_per_part = 1;
3302
3303
9.89k
            break;
3304
8.62k
        }
3305
0
        default:
3306
0
        {
3307
0
            u1_num_results_per_part = MAX_RESULTS_PER_PART;
3308
3309
0
            break;
3310
8.62k
        }
3311
9.89k
        }
3312
9.89k
    }
3313
12.4k
    else if((u1_layer_id == 1) && !!RESTRICT_NUM_PARTITION_LEVEL_L1ME_RESULTS_TO_1)
3314
11.3k
    {
3315
11.3k
        switch(e_quality_preset)
3316
11.3k
        {
3317
3.26k
        case ME_XTREME_SPEED_25:
3318
3.70k
        case ME_HIGH_QUALITY:
3319
5.33k
        case ME_PRISTINE_QUALITY:
3320
5.33k
        {
3321
5.33k
            u1_num_results_per_part = 1;
3322
3323
5.33k
            break;
3324
3.70k
        }
3325
5.96k
        default:
3326
5.96k
        {
3327
5.96k
            u1_num_results_per_part = MAX_RESULTS_PER_PART;
3328
3329
5.96k
            break;
3330
3.70k
        }
3331
11.3k
        }
3332
11.3k
    }
3333
1.13k
    else if((u1_layer_id == 2) && (u1_num_layers > 3) && !!RESTRICT_NUM_PARTITION_LEVEL_L2ME_RESULTS_TO_1)
3334
1.13k
    {
3335
1.13k
        switch(e_quality_preset)
3336
1.13k
        {
3337
194
        case ME_XTREME_SPEED_25:
3338
284
        case ME_XTREME_SPEED:
3339
323
        case ME_HIGH_SPEED:
3340
470
        case ME_MEDIUM_SPEED:
3341
470
        {
3342
470
            u1_num_results_per_part = 1;
3343
3344
470
            break;
3345
323
        }
3346
666
        default:
3347
666
        {
3348
666
            u1_num_results_per_part = MAX_RESULTS_PER_PART;
3349
3350
666
            break;
3351
323
        }
3352
1.13k
        }
3353
1.13k
    }
3354
3355
22.3k
    return u1_num_results_per_part;
3356
22.3k
}
3357
3358
static __inline void hme_max_search_cands_per_search_cand_loc_populator(
3359
    hme_frm_prms_t *ps_frm_prms,
3360
    U08 *pu1_num_fpel_search_cands,
3361
    U08 u1_layer_id,
3362
    ME_QUALITY_PRESETS_T e_quality_preset)
3363
22.3k
{
3364
22.3k
    if(0 == u1_layer_id)
3365
9.89k
    {
3366
9.89k
        S32 i;
3367
3368
128k
        for(i = 0; i < NUM_SEARCH_CAND_LOCATIONS; i++)
3369
118k
        {
3370
118k
            switch(e_quality_preset)
3371
118k
            {
3372
0
#if RESTRICT_NUM_SEARCH_CANDS_PER_SEARCH_CAND_LOC
3373
34.1k
            case ME_XTREME_SPEED_25:
3374
63.1k
            case ME_XTREME_SPEED:
3375
82.4k
            case ME_HIGH_SPEED:
3376
99.0k
            case ME_MEDIUM_SPEED:
3377
99.0k
            {
3378
99.0k
                pu1_num_fpel_search_cands[i] = 1;
3379
3380
99.0k
                break;
3381
82.4k
            }
3382
0
#endif
3383
19.6k
            default:
3384
19.6k
            {
3385
19.6k
                pu1_num_fpel_search_cands[i] =
3386
19.6k
                    MAX(2,
3387
19.6k
                        MAX(ps_frm_prms->u1_num_active_ref_l0, ps_frm_prms->u1_num_active_ref_l1) *
3388
19.6k
                            ((COLOCATED == (SEARCH_CAND_LOCATIONS_T)i) + 1));
3389
3390
19.6k
                break;
3391
82.4k
            }
3392
118k
            }
3393
118k
        }
3394
9.89k
    }
3395
22.3k
}
3396
3397
static __inline U08
3398
    hme_determine_max_2nx2n_tu_recur_cands(U08 u1_layer_id, ME_QUALITY_PRESETS_T e_quality_preset)
3399
22.3k
{
3400
22.3k
    U08 u1_num_cands = 2;
3401
3402
22.3k
    if((u1_layer_id == 0) && !!RESTRICT_NUM_2NX2N_TU_RECUR_CANDS)
3403
9.89k
    {
3404
9.89k
        switch(e_quality_preset)
3405
9.89k
        {
3406
2.84k
        case ME_XTREME_SPEED_25:
3407
5.26k
        case ME_XTREME_SPEED:
3408
6.87k
        case ME_HIGH_SPEED:
3409
8.25k
        case ME_MEDIUM_SPEED:
3410
8.25k
        {
3411
8.25k
            u1_num_cands = 1;
3412
3413
8.25k
            break;
3414
6.87k
        }
3415
1.63k
        default:
3416
1.63k
        {
3417
1.63k
            u1_num_cands = 2;
3418
3419
1.63k
            break;
3420
6.87k
        }
3421
9.89k
        }
3422
9.89k
    }
3423
3424
22.3k
    return u1_num_cands;
3425
22.3k
}
3426
3427
static __inline U08
3428
    hme_determine_max_num_fpel_refine_centers(U08 u1_layer_id, ME_QUALITY_PRESETS_T e_quality_preset)
3429
22.3k
{
3430
22.3k
    U08 i;
3431
3432
22.3k
    U08 u1_num_centers = 0;
3433
3434
22.3k
    if(0 == u1_layer_id)
3435
9.89k
    {
3436
9.89k
        switch(e_quality_preset)
3437
9.89k
        {
3438
2.84k
        case ME_XTREME_SPEED_25:
3439
2.84k
        {
3440
51.2k
            for(i = 0; i < TOT_NUM_PARTS; i++)
3441
48.4k
            {
3442
48.4k
                u1_num_centers += gau1_num_best_results_XS25[i];
3443
48.4k
            }
3444
3445
2.84k
            break;
3446
0
        }
3447
2.41k
        case ME_XTREME_SPEED:
3448
2.41k
        {
3449
43.4k
            for(i = 0; i < TOT_NUM_PARTS; i++)
3450
41.0k
            {
3451
41.0k
                u1_num_centers += gau1_num_best_results_XS[i];
3452
41.0k
            }
3453
3454
2.41k
            break;
3455
0
        }
3456
1.61k
        case ME_HIGH_SPEED:
3457
1.61k
        {
3458
28.9k
            for(i = 0; i < TOT_NUM_PARTS; i++)
3459
27.3k
            {
3460
27.3k
                u1_num_centers += gau1_num_best_results_HS[i];
3461
27.3k
            }
3462
3463
1.61k
            break;
3464
0
        }
3465
1.38k
        case ME_MEDIUM_SPEED:
3466
1.38k
        {
3467
24.9k
            for(i = 0; i < TOT_NUM_PARTS; i++)
3468
23.5k
            {
3469
23.5k
                u1_num_centers += gau1_num_best_results_MS[i];
3470
23.5k
            }
3471
3472
1.38k
            break;
3473
0
        }
3474
372
        case ME_HIGH_QUALITY:
3475
372
        {
3476
6.69k
            for(i = 0; i < TOT_NUM_PARTS; i++)
3477
6.32k
            {
3478
6.32k
                u1_num_centers += gau1_num_best_results_HQ[i];
3479
6.32k
            }
3480
3481
372
            break;
3482
0
        }
3483
1.26k
        case ME_PRISTINE_QUALITY:
3484
1.26k
        {
3485
22.7k
            for(i = 0; i < TOT_NUM_PARTS; i++)
3486
21.4k
            {
3487
21.4k
                u1_num_centers += gau1_num_best_results_PQ[i];
3488
21.4k
            }
3489
3490
1.26k
            break;
3491
0
        }
3492
9.89k
        }
3493
9.89k
    }
3494
3495
22.3k
    return u1_num_centers;
3496
22.3k
}
3497
3498
static __inline U08 hme_determine_max_num_subpel_refine_centers(
3499
    U08 u1_layer_id, U08 u1_max_2Nx2N_subpel_cands, U08 u1_max_NxN_subpel_cands)
3500
22.3k
{
3501
22.3k
    U08 u1_num_centers = 0;
3502
3503
22.3k
    if(0 == u1_layer_id)
3504
9.89k
    {
3505
9.89k
        u1_num_centers += u1_max_2Nx2N_subpel_cands + 4 * u1_max_NxN_subpel_cands;
3506
9.89k
    }
3507
3508
22.3k
    return u1_num_centers;
3509
22.3k
}
3510
3511
void hme_set_refine_prms(
3512
    void *pv_refine_prms,
3513
    U08 u1_encode,
3514
    S32 num_ref,
3515
    S32 layer_id,
3516
    S32 num_layers,
3517
    S32 num_layers_explicit_search,
3518
    S32 use_4x4,
3519
    hme_frm_prms_t *ps_frm_prms,
3520
    double **ppd_intra_costs,
3521
    me_coding_params_t *ps_me_coding_tools)
3522
22.3k
{
3523
22.3k
    refine_prms_t *ps_refine_prms = (refine_prms_t *)pv_refine_prms;
3524
3525
22.3k
    ps_refine_prms->i4_encode = u1_encode;
3526
22.3k
    ps_refine_prms->bidir_enabled = ps_frm_prms->bidir_enabled;
3527
22.3k
    ps_refine_prms->i4_layer_id = layer_id;
3528
    /*************************************************************************/
3529
    /* Refinement layers have two lambdas, one for closed loop, another for  */
3530
    /* open loop. Non encode layers use only open loop lambda.               */
3531
    /*************************************************************************/
3532
22.3k
    ps_refine_prms->lambda_inp = ps_frm_prms->i4_ol_sad_lambda_qf;
3533
22.3k
    ps_refine_prms->lambda_recon = ps_frm_prms->i4_cl_sad_lambda_qf;
3534
22.3k
    ps_refine_prms->lambda_q_shift = ps_frm_prms->lambda_q_shift;
3535
22.3k
    ps_refine_prms->lambda_inp =
3536
22.3k
        ((float)ps_refine_prms->lambda_inp) * (100.0f - ME_LAMBDA_DISCOUNT) / 100.0f;
3537
22.3k
    ps_refine_prms->lambda_recon =
3538
22.3k
        ((float)ps_refine_prms->lambda_recon) * (100.0f - ME_LAMBDA_DISCOUNT) / 100.0f;
3539
3540
22.3k
    if((u1_encode) && (NULL != ppd_intra_costs))
3541
4.94k
    {
3542
4.94k
        ps_refine_prms->pd_intra_costs = ppd_intra_costs[layer_id];
3543
4.94k
    }
3544
3545
    /* Explicit or implicit depends on number of layers having eplicit search */
3546
22.3k
    if((layer_id == 0) || (num_layers - layer_id > num_layers_explicit_search))
3547
9.89k
    {
3548
9.89k
        ps_refine_prms->explicit_ref = 0;
3549
9.89k
        ps_refine_prms->i4_num_ref_fpel = MIN(2, num_ref);
3550
9.89k
    }
3551
12.4k
    else
3552
12.4k
    {
3553
12.4k
        ps_refine_prms->explicit_ref = 1;
3554
12.4k
        ps_refine_prms->i4_num_ref_fpel = num_ref;
3555
12.4k
    }
3556
3557
22.3k
    ps_refine_prms->e_search_complexity = SEARCH_CX_HIGH;
3558
3559
22.3k
    ps_refine_prms->i4_num_steps_hpel_refine = ps_me_coding_tools->i4_num_steps_hpel_refine;
3560
22.3k
    ps_refine_prms->i4_num_steps_qpel_refine = ps_me_coding_tools->i4_num_steps_qpel_refine;
3561
3562
22.3k
    if(u1_encode)
3563
9.89k
    {
3564
9.89k
        ps_refine_prms->i4_num_mvbank_results = 1;
3565
9.89k
        ps_refine_prms->i4_use_rec_in_fpel = 1;
3566
9.89k
        ps_refine_prms->i4_num_steps_fpel_refine = 1;
3567
3568
9.89k
        if(ps_me_coding_tools->e_me_quality_presets == ME_PRISTINE_QUALITY)
3569
1.26k
        {
3570
1.26k
            ps_refine_prms->i4_num_fpel_results = 4;
3571
1.26k
            ps_refine_prms->i4_num_32x32_merge_results = 4;
3572
1.26k
            ps_refine_prms->i4_num_64x64_merge_results = 4;
3573
1.26k
            ps_refine_prms->i4_num_steps_post_refine_fpel = 3;
3574
1.26k
            ps_refine_prms->i4_use_satd_subpel = 1;
3575
1.26k
            ps_refine_prms->u1_max_subpel_candts_2Nx2N = 2;
3576
1.26k
            ps_refine_prms->u1_max_subpel_candts_NxN = 1;
3577
1.26k
            ps_refine_prms->u1_subpel_candt_threshold = 1;
3578
1.26k
            ps_refine_prms->e_search_complexity = SEARCH_CX_MED;
3579
1.26k
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_PQ;
3580
1.26k
            ps_refine_prms->limit_active_partitions = 0;
3581
1.26k
        }
3582
8.62k
        else if(ps_me_coding_tools->e_me_quality_presets == ME_HIGH_QUALITY)
3583
372
        {
3584
372
            ps_refine_prms->i4_num_fpel_results = 4;
3585
372
            ps_refine_prms->i4_num_32x32_merge_results = 4;
3586
372
            ps_refine_prms->i4_num_64x64_merge_results = 4;
3587
372
            ps_refine_prms->i4_num_steps_post_refine_fpel = 3;
3588
372
            ps_refine_prms->i4_use_satd_subpel = 1;
3589
372
            ps_refine_prms->u1_max_subpel_candts_2Nx2N = 2;
3590
372
            ps_refine_prms->u1_max_subpel_candts_NxN = 1;
3591
372
            ps_refine_prms->u1_subpel_candt_threshold = 2;
3592
372
            ps_refine_prms->e_search_complexity = SEARCH_CX_MED;
3593
372
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_HQ;
3594
372
            ps_refine_prms->limit_active_partitions = 0;
3595
372
        }
3596
8.25k
        else if(ps_me_coding_tools->e_me_quality_presets == ME_MEDIUM_SPEED)
3597
1.38k
        {
3598
1.38k
            ps_refine_prms->i4_num_fpel_results = 1;
3599
1.38k
            ps_refine_prms->i4_num_32x32_merge_results = 2;
3600
1.38k
            ps_refine_prms->i4_num_64x64_merge_results = 2;
3601
1.38k
            ps_refine_prms->i4_num_steps_post_refine_fpel = 0;
3602
1.38k
            ps_refine_prms->i4_use_satd_subpel = 1;
3603
1.38k
            ps_refine_prms->u1_max_subpel_candts_2Nx2N = 2;
3604
1.38k
            ps_refine_prms->u1_max_subpel_candts_NxN = 1;
3605
1.38k
            ps_refine_prms->u1_subpel_candt_threshold = 3;
3606
1.38k
            ps_refine_prms->e_search_complexity = SEARCH_CX_MED;
3607
1.38k
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_MS;
3608
1.38k
            ps_refine_prms->limit_active_partitions = 1;
3609
1.38k
        }
3610
6.87k
        else if(ps_me_coding_tools->e_me_quality_presets == ME_HIGH_SPEED)
3611
1.61k
        {
3612
1.61k
            ps_refine_prms->i4_num_fpel_results = 1;
3613
1.61k
            ps_refine_prms->i4_num_32x32_merge_results = 2;
3614
1.61k
            ps_refine_prms->i4_num_64x64_merge_results = 2;
3615
1.61k
            ps_refine_prms->i4_num_steps_post_refine_fpel = 0;
3616
1.61k
            ps_refine_prms->u1_max_subpel_candts_2Nx2N = 1;
3617
1.61k
            ps_refine_prms->u1_max_subpel_candts_NxN = 1;
3618
1.61k
            ps_refine_prms->i4_use_satd_subpel = 0;
3619
1.61k
            ps_refine_prms->u1_subpel_candt_threshold = 0;
3620
1.61k
            ps_refine_prms->e_search_complexity = SEARCH_CX_MED;
3621
1.61k
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_HS;
3622
1.61k
            ps_refine_prms->limit_active_partitions = 1;
3623
1.61k
        }
3624
5.26k
        else if(ps_me_coding_tools->e_me_quality_presets == ME_XTREME_SPEED)
3625
2.41k
        {
3626
2.41k
            ps_refine_prms->i4_num_fpel_results = 1;
3627
2.41k
            ps_refine_prms->i4_num_32x32_merge_results = 2;
3628
2.41k
            ps_refine_prms->i4_num_64x64_merge_results = 2;
3629
2.41k
            ps_refine_prms->i4_num_steps_post_refine_fpel = 0;
3630
2.41k
            ps_refine_prms->i4_use_satd_subpel = 0;
3631
2.41k
            ps_refine_prms->u1_max_subpel_candts_2Nx2N = 1;
3632
2.41k
            ps_refine_prms->u1_max_subpel_candts_NxN = 0;
3633
2.41k
            ps_refine_prms->u1_subpel_candt_threshold = 0;
3634
2.41k
            ps_refine_prms->e_search_complexity = SEARCH_CX_MED;
3635
2.41k
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_XS;
3636
2.41k
            ps_refine_prms->limit_active_partitions = 1;
3637
2.41k
        }
3638
2.84k
        else if(ps_me_coding_tools->e_me_quality_presets == ME_XTREME_SPEED_25)
3639
2.84k
        {
3640
2.84k
            ps_refine_prms->i4_num_fpel_results = 1;
3641
2.84k
            ps_refine_prms->i4_num_32x32_merge_results = 2;
3642
2.84k
            ps_refine_prms->i4_num_64x64_merge_results = 2;
3643
2.84k
            ps_refine_prms->i4_num_steps_post_refine_fpel = 0;
3644
2.84k
            ps_refine_prms->i4_use_satd_subpel = 0;
3645
2.84k
            ps_refine_prms->u1_max_subpel_candts_2Nx2N = 1;
3646
2.84k
            ps_refine_prms->u1_max_subpel_candts_NxN = 0;
3647
2.84k
            ps_refine_prms->u1_subpel_candt_threshold = 0;
3648
2.84k
            ps_refine_prms->e_search_complexity = SEARCH_CX_LOW;
3649
2.84k
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_XS25;
3650
2.84k
            ps_refine_prms->limit_active_partitions = 1;
3651
2.84k
        }
3652
9.89k
    }
3653
12.4k
    else
3654
12.4k
    {
3655
12.4k
        ps_refine_prms->i4_num_fpel_results = 2;
3656
12.4k
        ps_refine_prms->i4_use_rec_in_fpel = 0;
3657
12.4k
        ps_refine_prms->i4_num_steps_fpel_refine = 1;
3658
12.4k
        ps_refine_prms->i4_num_steps_hpel_refine = 0;
3659
12.4k
        ps_refine_prms->i4_num_steps_qpel_refine = 0;
3660
3661
12.4k
        if(ps_me_coding_tools->e_me_quality_presets == ME_HIGH_SPEED)
3662
1.79k
        {
3663
1.79k
            ps_refine_prms->i4_num_steps_post_refine_fpel = 0;
3664
1.79k
            ps_refine_prms->i4_use_satd_subpel = 1;
3665
1.79k
            ps_refine_prms->e_search_complexity = SEARCH_CX_LOW;
3666
1.79k
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_HS;
3667
1.79k
        }
3668
10.6k
        else if(ps_me_coding_tools->e_me_quality_presets == ME_XTREME_SPEED)
3669
2.72k
        {
3670
2.72k
            ps_refine_prms->i4_num_steps_post_refine_fpel = 0;
3671
2.72k
            ps_refine_prms->i4_use_satd_subpel = 0;
3672
2.72k
            ps_refine_prms->e_search_complexity = SEARCH_CX_LOW;
3673
2.72k
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_XS;
3674
2.72k
        }
3675
7.92k
        else if(ps_me_coding_tools->e_me_quality_presets == ME_XTREME_SPEED_25)
3676
3.45k
        {
3677
3.45k
            ps_refine_prms->i4_num_steps_post_refine_fpel = 0;
3678
3.45k
            ps_refine_prms->i4_use_satd_subpel = 0;
3679
3.45k
            ps_refine_prms->e_search_complexity = SEARCH_CX_LOW;
3680
3.45k
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_XS25;
3681
3.45k
        }
3682
4.46k
        else if(ps_me_coding_tools->e_me_quality_presets == ME_PRISTINE_QUALITY)
3683
2.21k
        {
3684
2.21k
            ps_refine_prms->i4_num_steps_post_refine_fpel = 2;
3685
2.21k
            ps_refine_prms->i4_use_satd_subpel = 1;
3686
2.21k
            ps_refine_prms->e_search_complexity = SEARCH_CX_MED;
3687
2.21k
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_PQ;
3688
2.21k
        }
3689
2.24k
        else if(ps_me_coding_tools->e_me_quality_presets == ME_HIGH_QUALITY)
3690
522
        {
3691
522
            ps_refine_prms->i4_num_steps_post_refine_fpel = 2;
3692
522
            ps_refine_prms->i4_use_satd_subpel = 1;
3693
522
            ps_refine_prms->e_search_complexity = SEARCH_CX_MED;
3694
522
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_HQ;
3695
522
        }
3696
1.72k
        else if(ps_me_coding_tools->e_me_quality_presets == ME_MEDIUM_SPEED)
3697
1.72k
        {
3698
1.72k
            ps_refine_prms->i4_num_steps_post_refine_fpel = 0;
3699
1.72k
            ps_refine_prms->i4_use_satd_subpel = 1;
3700
1.72k
            ps_refine_prms->e_search_complexity = SEARCH_CX_LOW;
3701
1.72k
            ps_refine_prms->pu1_num_best_results = gau1_num_best_results_MS;
3702
1.72k
        }
3703
3704
        /* Following fields unused in the non-encode layers */
3705
        /* But setting the same to default values           */
3706
12.4k
        ps_refine_prms->i4_num_32x32_merge_results = 4;
3707
12.4k
        ps_refine_prms->i4_num_64x64_merge_results = 4;
3708
3709
12.4k
        if(!ps_frm_prms->bidir_enabled)
3710
10.8k
        {
3711
10.8k
            ps_refine_prms->limit_active_partitions = 0;
3712
10.8k
        }
3713
1.61k
        else
3714
1.61k
        {
3715
1.61k
            ps_refine_prms->limit_active_partitions = 1;
3716
1.61k
        }
3717
12.4k
    }
3718
3719
22.3k
    ps_refine_prms->i4_enable_4x4_part =
3720
22.3k
        hme_get_mv_blk_size(use_4x4, layer_id, num_layers, u1_encode);
3721
3722
22.3k
    if(!ps_me_coding_tools->u1_l0_me_controlled_via_cmd_line)
3723
22.3k
    {
3724
22.3k
        ps_refine_prms->i4_num_results_per_part = hme_determine_num_results_per_part(
3725
22.3k
            layer_id, num_layers, ps_me_coding_tools->e_me_quality_presets);
3726
3727
22.3k
        hme_max_search_cands_per_search_cand_loc_populator(
3728
22.3k
            ps_frm_prms,
3729
22.3k
            ps_refine_prms->au1_num_fpel_search_cands,
3730
22.3k
            layer_id,
3731
22.3k
            ps_me_coding_tools->e_me_quality_presets);
3732
3733
22.3k
        ps_refine_prms->u1_max_2nx2n_tu_recur_cands = hme_determine_max_2nx2n_tu_recur_cands(
3734
22.3k
            layer_id, ps_me_coding_tools->e_me_quality_presets);
3735
3736
22.3k
        ps_refine_prms->u1_max_num_fpel_refine_centers = hme_determine_max_num_fpel_refine_centers(
3737
22.3k
            layer_id, ps_me_coding_tools->e_me_quality_presets);
3738
3739
22.3k
        ps_refine_prms->u1_max_num_subpel_refine_centers =
3740
22.3k
            hme_determine_max_num_subpel_refine_centers(
3741
22.3k
                layer_id,
3742
22.3k
                ps_refine_prms->u1_max_subpel_candts_2Nx2N,
3743
22.3k
                ps_refine_prms->u1_max_subpel_candts_NxN);
3744
22.3k
    }
3745
0
    else
3746
0
    {
3747
0
        if(0 == layer_id)
3748
0
        {
3749
0
            ps_refine_prms->i4_num_results_per_part =
3750
0
                ps_me_coding_tools->u1_num_results_per_part_in_l0me;
3751
0
        }
3752
0
        else if(1 == layer_id)
3753
0
        {
3754
0
            ps_refine_prms->i4_num_results_per_part =
3755
0
                ps_me_coding_tools->u1_num_results_per_part_in_l1me;
3756
0
        }
3757
0
        else if((2 == layer_id) && (num_layers > 3))
3758
0
        {
3759
0
            ps_refine_prms->i4_num_results_per_part =
3760
0
                ps_me_coding_tools->u1_num_results_per_part_in_l2me;
3761
0
        }
3762
0
        else
3763
0
        {
3764
0
            ps_refine_prms->i4_num_results_per_part = hme_determine_num_results_per_part(
3765
0
                layer_id, num_layers, ps_me_coding_tools->e_me_quality_presets);
3766
0
        }
3767
3768
0
        memset(
3769
0
            ps_refine_prms->au1_num_fpel_search_cands,
3770
0
            ps_me_coding_tools->u1_max_num_coloc_cands,
3771
0
            sizeof(ps_refine_prms->au1_num_fpel_search_cands));
3772
3773
0
        ps_refine_prms->u1_max_2nx2n_tu_recur_cands =
3774
0
            ps_me_coding_tools->u1_max_2nx2n_tu_recur_cands;
3775
3776
0
        ps_refine_prms->u1_max_num_fpel_refine_centers =
3777
0
            ps_me_coding_tools->u1_max_num_fpel_refine_centers;
3778
3779
0
        ps_refine_prms->u1_max_num_subpel_refine_centers =
3780
0
            ps_me_coding_tools->u1_max_num_subpel_refine_centers;
3781
0
    }
3782
3783
22.3k
    if(layer_id != 0)
3784
12.4k
    {
3785
12.4k
        ps_refine_prms->i4_num_mvbank_results = ps_refine_prms->i4_num_results_per_part;
3786
12.4k
    }
3787
3788
    /* 4 * lambda */
3789
22.3k
    ps_refine_prms->sdi_threshold =
3790
22.3k
        (ps_refine_prms->lambda_recon + (1 << (ps_frm_prms->lambda_q_shift - 1))) >>
3791
22.3k
        (ps_frm_prms->lambda_q_shift - 2);
3792
3793
22.3k
    ps_refine_prms->u1_use_lambda_derived_from_min_8x8_act_in_ctb =
3794
22.3k
        MODULATE_LAMDA_WHEN_SPATIAL_MOD_ON && ps_frm_prms->u1_is_cu_qp_delta_enabled;
3795
22.3k
}
3796
3797
void hme_set_ctb_boundary_attrs(ctb_boundary_attrs_t *ps_attrs, S32 num_8x8_horz, S32 num_8x8_vert)
3798
7.85k
{
3799
7.85k
    S32 cu_16x16_valid_flag = 0, merge_pattern_x, merge_pattern_y;
3800
7.85k
    S32 blk, blk_x, blk_y;
3801
7.85k
    S32 num_16x16_horz, num_16x16_vert;
3802
7.85k
    blk_ctb_attrs_t *ps_blk_attrs = &ps_attrs->as_blk_attrs[0];
3803
3804
7.85k
    num_16x16_horz = (num_8x8_horz + 1) >> 1;
3805
7.85k
    num_16x16_vert = (num_8x8_vert + 1) >> 1;
3806
7.85k
    ps_attrs->u1_num_blks_in_ctb = (U08)(num_16x16_horz * num_16x16_vert);
3807
3808
    /*************************************************************************/
3809
    /* Run through each blk assuming all 16x16 CUs valid. The order would be */
3810
    /* 0   1   4   5                                                         */
3811
    /* 2   3   6   7                                                         */
3812
    /* 8   9   12  13                                                        */
3813
    /* 10  11  14  15                                                        */
3814
    /* Out of these some may not be valid. For example, if num_16x16_horz is */
3815
    /* 2 and num_16x16_vert is 4, then right 2 columns not valid. In this    */
3816
    /* case, blks 8-11 get encoding number of 4-7. Further, the variable     */
3817
    /* cu_16x16_valid_flag will be 1111 0000 1111 0000. Also, the variable   */
3818
    /* u1_merge_to_32x32_flag will be 1010, and u1_merge_to_64x64_flag 0     */
3819
    /*************************************************************************/
3820
133k
    for(blk = 0; blk < 16; blk++)
3821
125k
    {
3822
125k
        U08 u1_blk_8x8_mask = 0xF;
3823
125k
        blk_x = gau1_encode_to_raster_x[blk];
3824
125k
        blk_y = gau1_encode_to_raster_y[blk];
3825
125k
        if((blk_x >= num_16x16_horz) || (blk_y >= num_16x16_vert))
3826
28.4k
        {
3827
28.4k
            continue;
3828
28.4k
        }
3829
3830
        /* The CU at encode location blk is valid */
3831
97.2k
        cu_16x16_valid_flag |= (1 << blk);
3832
97.2k
        ps_blk_attrs->u1_blk_id_in_full_ctb = blk;
3833
97.2k
        ps_blk_attrs->u1_blk_x = blk_x;
3834
97.2k
        ps_blk_attrs->u1_blk_y = blk_y;
3835
3836
        /* Disable blks 1 and 3 if the 16x16 blk overshoots on rt border */
3837
97.2k
        if(((blk_x << 1) + 2) > num_8x8_horz)
3838
3.45k
            u1_blk_8x8_mask &= 0x5;
3839
        /* Disable blks 2 and 3 if the 16x16 blk overshoots on bot border */
3840
97.2k
        if(((blk_y << 1) + 2) > num_8x8_vert)
3841
5.27k
            u1_blk_8x8_mask &= 0x3;
3842
97.2k
        ps_blk_attrs->u1_blk_8x8_mask = u1_blk_8x8_mask;
3843
97.2k
        ps_blk_attrs++;
3844
97.2k
    }
3845
3846
7.85k
    ps_attrs->cu_16x16_valid_flag = cu_16x16_valid_flag;
3847
3848
    /* 32x32 merge is logical combination of what merge is possible          */
3849
    /* horizontally as well as vertically.                                   */
3850
7.85k
    if(num_8x8_horz < 4)
3851
1.20k
        merge_pattern_x = 0x0;
3852
6.64k
    else if(num_8x8_horz < 8)
3853
278
        merge_pattern_x = 0x5;
3854
6.37k
    else
3855
6.37k
        merge_pattern_x = 0xF;
3856
3857
7.85k
    if(num_8x8_vert < 4)
3858
1.25k
        merge_pattern_y = 0x0;
3859
6.60k
    else if(num_8x8_vert < 8)
3860
518
        merge_pattern_y = 0x3;
3861
6.08k
    else
3862
6.08k
        merge_pattern_y = 0xF;
3863
3864
7.85k
    ps_attrs->u1_merge_to_32x32_flag = (U08)(merge_pattern_x & merge_pattern_y);
3865
3866
    /* Do not attempt 64x64 merge if any blk invalid */
3867
7.85k
    if(ps_attrs->u1_merge_to_32x32_flag != 0xF)
3868
2.91k
        ps_attrs->u1_merge_to_64x64_flag = 0;
3869
4.94k
    else
3870
4.94k
        ps_attrs->u1_merge_to_64x64_flag = 1;
3871
7.85k
}
3872
3873
void hme_set_ctb_attrs(ctb_boundary_attrs_t *ps_attrs, S32 wd, S32 ht)
3874
4.94k
{
3875
4.94k
    S32 is_cropped_rt, is_cropped_bot;
3876
3877
4.94k
    is_cropped_rt = ((wd & 63) != 0) ? 1 : 0;
3878
4.94k
    is_cropped_bot = ((ht & 63) != 0) ? 1 : 0;
3879
3880
4.94k
    if(is_cropped_rt)
3881
1.13k
    {
3882
1.13k
        hme_set_ctb_boundary_attrs(&ps_attrs[CTB_RT_PIC_BOUNDARY], (wd & 63) >> 3, 8);
3883
1.13k
    }
3884
4.94k
    if(is_cropped_bot)
3885
1.42k
    {
3886
1.42k
        hme_set_ctb_boundary_attrs(&ps_attrs[CTB_BOT_PIC_BOUNDARY], 8, (ht & 63) >> 3);
3887
1.42k
    }
3888
4.94k
    if(is_cropped_rt & is_cropped_bot)
3889
347
    {
3890
347
        hme_set_ctb_boundary_attrs(
3891
347
            &ps_attrs[CTB_BOT_RT_PIC_BOUNDARY], (wd & 63) >> 3, (ht & 63) >> 3);
3892
347
    }
3893
4.94k
    hme_set_ctb_boundary_attrs(&ps_attrs[CTB_CENTRE], 8, 8);
3894
4.94k
}
3895
3896
/**
3897
********************************************************************************
3898
*  @fn     hme_scale_for_ref_idx(S32 curr_poc, S32 poc_from, S32 poc_to)
3899
*
3900
*  @brief  When we have an mv with ref id "poc_to" for which predictor to be
3901
*          computed, and predictor is ref id "poc_from", this funciton returns
3902
*          scale factor in Q8 for such a purpose
3903
*
3904
*  @param[in] curr_poc : input picture poc
3905
*
3906
*  @param[in] poc_from : POC of the pic, pointed to by ref id to be scaled
3907
*
3908
*  @param[in] poc_to : POC of hte pic, pointed to by ref id to be scaled to
3909
*
3910
*  @return Scale factor in Q8 format
3911
********************************************************************************
3912
*/
3913
S16 hme_scale_for_ref_idx(S32 curr_poc, S32 poc_from, S32 poc_to)
3914
44.5k
{
3915
44.5k
    S32 td, tx, tb;
3916
44.5k
    S16 i2_scf;
3917
    /*************************************************************************/
3918
    /* Approximate scale factor: 256 * num / denom                           */
3919
    /* num = curr_poc - poc_to, denom = curr_poc - poc_from                  */
3920
    /* Exact implementation as per standard.                                 */
3921
    /*************************************************************************/
3922
3923
44.5k
    tb = HME_CLIP((curr_poc - poc_to), -128, 127);
3924
44.5k
    td = HME_CLIP((curr_poc - poc_from), -128, 127);
3925
3926
44.5k
    tx = (16384 + (ABS(td) >> 1)) / td;
3927
    //i2_scf = HME_CLIP((((tb*tx)+32)>>6), -128, 127);
3928
44.5k
    i2_scf = HME_CLIP((((tb * tx) + 32) >> 6), -4096, 4095);
3929
3930
44.5k
    return (i2_scf);
3931
44.5k
}
3932
3933
/**
3934
********************************************************************************
3935
*  @fn     hme_process_frm_init
3936
*
3937
*  @brief  HME frame level initialsation processing function
3938
*
3939
*  @param[in] pv_me_ctxt : ME ctxt pointer
3940
*
3941
*  @param[in] ps_ref_map : Reference map prms pointer
3942
*
3943
*  @param[in] ps_frm_prms :Pointer to frame params
3944
*
3945
*  called only for encode layer
3946
*
3947
*  @return Scale factor in Q8 format
3948
********************************************************************************
3949
*/
3950
void hme_process_frm_init(
3951
    void *pv_me_ctxt,
3952
    hme_ref_map_t *ps_ref_map,
3953
    hme_frm_prms_t *ps_frm_prms,
3954
    WORD32 i4_me_frm_id,
3955
    WORD32 i4_num_me_frm_pllel)
3956
6.35k
{
3957
6.35k
    me_ctxt_t *ps_thrd_ctxt = (me_ctxt_t *)pv_me_ctxt;
3958
6.35k
    me_frm_ctxt_t *ps_ctxt = (me_frm_ctxt_t *)ps_thrd_ctxt->aps_me_frm_prms[i4_me_frm_id];
3959
3960
6.35k
    S32 i, j, desc_idx;
3961
6.35k
    S16 i2_max_x = 0, i2_max_y = 0;
3962
3963
    /* Set the Qp of current frm passed by caller. Required for intra cost */
3964
6.35k
    ps_ctxt->frm_qstep = ps_frm_prms->qstep;
3965
6.35k
    ps_ctxt->qstep_ls8 = ps_frm_prms->qstep_ls8;
3966
3967
    /* Bidir enabled or not */
3968
6.35k
    ps_ctxt->s_frm_prms = *ps_frm_prms;
3969
3970
    /*************************************************************************/
3971
    /* Set up the ref pic parameters across all layers. For this, we do the  */
3972
    /* following: the application has given us a ref pic list, we go index   */
3973
    /* by index and pick up the picture. A picture can be uniquely be mapped */
3974
    /* to a POC. So we search all layer descriptor array to find the POC     */
3975
    /* Once found, we update all attributes in this descriptor.              */
3976
    /* During this updation process we also create an index of descriptor id */
3977
    /* to ref id mapping. It is important to find the same POC in the layers */
3978
    /* descr strcture since it holds the pyramid inputs for non encode layers*/
3979
    /* Apart from this, e also update array containing the index of the descr*/
3980
    /* During processing for ease of access, each layer has a pointer to aray*/
3981
    /* of pointers containing fxfy, fxhy, hxfy, hxhy and inputs for each ref */
3982
    /* we update this too.                                                   */
3983
    /*************************************************************************/
3984
6.35k
    ps_ctxt->num_ref_past = 0;
3985
6.35k
    ps_ctxt->num_ref_future = 0;
3986
16.4k
    for(i = 0; i < ps_ref_map->i4_num_ref; i++)
3987
10.1k
    {
3988
10.1k
        S32 ref_id_lc, idx;
3989
10.1k
        hme_ref_desc_t *ps_ref_desc;
3990
3991
10.1k
        ps_ref_desc = &ps_ref_map->as_ref_desc[i];
3992
10.1k
        ref_id_lc = ps_ref_desc->i1_ref_id_lc;
3993
        /* Obtain the id of descriptor that contains this POC */
3994
10.1k
        idx = hme_find_descr_idx(
3995
10.1k
            ps_thrd_ctxt, ps_ref_desc->i4_poc, ps_ref_desc->i4_GOP_num, i4_num_me_frm_pllel);
3996
3997
        /* Update all layers in this descr with the reference attributes */
3998
10.1k
        hme_update_layer_desc(
3999
10.1k
            &ps_thrd_ctxt->as_ref_descr[idx],
4000
10.1k
            ps_ref_desc,
4001
10.1k
            0,
4002
10.1k
            1,  //ps_ctxt->num_layers,
4003
10.1k
            ps_ctxt->ps_curr_descr);
4004
4005
        /* Update the pointer holder for the recon planes */
4006
10.1k
        ps_ctxt->ps_curr_descr->aps_layers[0]->ppu1_list_inp = &ps_ctxt->apu1_list_inp[0][0];
4007
10.1k
        ps_ctxt->ps_curr_descr->aps_layers[0]->ppu1_list_rec_fxfy =
4008
10.1k
            &ps_ctxt->apu1_list_rec_fxfy[0][0];
4009
10.1k
        ps_ctxt->ps_curr_descr->aps_layers[0]->ppu1_list_rec_hxfy =
4010
10.1k
            &ps_ctxt->apu1_list_rec_hxfy[0][0];
4011
10.1k
        ps_ctxt->ps_curr_descr->aps_layers[0]->ppu1_list_rec_fxhy =
4012
10.1k
            &ps_ctxt->apu1_list_rec_fxhy[0][0];
4013
10.1k
        ps_ctxt->ps_curr_descr->aps_layers[0]->ppu1_list_rec_hxhy =
4014
10.1k
            &ps_ctxt->apu1_list_rec_hxhy[0][0];
4015
10.1k
        ps_ctxt->ps_curr_descr->aps_layers[0]->ppv_dep_mngr_recon =
4016
10.1k
            &ps_ctxt->apv_list_dep_mngr[0][0];
4017
4018
        /* Update the array having ref id lc to descr id mapping */
4019
10.1k
        ps_ctxt->a_ref_to_descr_id[ps_ref_desc->i1_ref_id_lc] = idx;
4020
4021
        /* From ref id lc we need to work out the POC, So update this array */
4022
10.1k
        ps_ctxt->ai4_ref_idx_to_poc_lc[ref_id_lc] = ps_ref_desc->i4_poc;
4023
4024
        /* When computing costs in L0 and L1 directions, we need the */
4025
        /* respective ref id L0 and L1, so update this mapping */
4026
10.1k
        ps_ctxt->a_ref_idx_lc_to_l0[ref_id_lc] = ps_ref_desc->i1_ref_id_l0;
4027
10.1k
        ps_ctxt->a_ref_idx_lc_to_l1[ref_id_lc] = ps_ref_desc->i1_ref_id_l1;
4028
10.1k
        if((ps_ctxt->i4_curr_poc > ps_ref_desc->i4_poc) || ps_ctxt->i4_curr_poc == 0)
4029
9.27k
        {
4030
9.27k
            ps_ctxt->au1_is_past[ref_id_lc] = 1;
4031
9.27k
            ps_ctxt->ai1_past_list[ps_ctxt->num_ref_past] = ref_id_lc;
4032
9.27k
            ps_ctxt->num_ref_past++;
4033
9.27k
        }
4034
829
        else
4035
829
        {
4036
829
            ps_ctxt->au1_is_past[ref_id_lc] = 0;
4037
829
            ps_ctxt->ai1_future_list[ps_ctxt->num_ref_future] = ref_id_lc;
4038
829
            ps_ctxt->num_ref_future++;
4039
829
        }
4040
4041
10.1k
        if(1 == ps_ctxt->i4_wt_pred_enable_flag)
4042
0
        {
4043
            /* copy the weight and offsets from current ref desc */
4044
0
            ps_ctxt->s_wt_pred.a_wpred_wt[ref_id_lc] = ps_ref_desc->i2_weight;
4045
4046
            /* inv weight is stored in Q15 format */
4047
0
            ps_ctxt->s_wt_pred.a_inv_wpred_wt[ref_id_lc] =
4048
0
                ((1 << 15) + (ps_ref_desc->i2_weight >> 1)) / ps_ref_desc->i2_weight;
4049
0
            ps_ctxt->s_wt_pred.a_wpred_off[ref_id_lc] = ps_ref_desc->i2_offset;
4050
0
        }
4051
10.1k
        else
4052
10.1k
        {
4053
            /* store default wt and offset*/
4054
10.1k
            ps_ctxt->s_wt_pred.a_wpred_wt[ref_id_lc] = WGHT_DEFAULT;
4055
4056
            /* inv weight is stored in Q15 format */
4057
10.1k
            ps_ctxt->s_wt_pred.a_inv_wpred_wt[ref_id_lc] =
4058
10.1k
                ((1 << 15) + (WGHT_DEFAULT >> 1)) / WGHT_DEFAULT;
4059
4060
10.1k
            ps_ctxt->s_wt_pred.a_wpred_off[ref_id_lc] = 0;
4061
10.1k
        }
4062
10.1k
    }
4063
4064
6.35k
    ps_ctxt->ai1_future_list[ps_ctxt->num_ref_future] = -1;
4065
6.35k
    ps_ctxt->ai1_past_list[ps_ctxt->num_ref_past] = -1;
4066
4067
    /*************************************************************************/
4068
    /* Preparation of the TLU for bits for reference indices.                */
4069
    /* Special case is that of numref = 2. (TEV)                             */
4070
    /* Other cases uses UEV                                                  */
4071
    /*************************************************************************/
4072
82.6k
    for(i = 0; i < MAX_NUM_REF; i++)
4073
76.2k
    {
4074
76.2k
        ps_ctxt->au1_ref_bits_tlu_lc[0][i] = 0;
4075
76.2k
        ps_ctxt->au1_ref_bits_tlu_lc[1][i] = 0;
4076
76.2k
    }
4077
4078
6.35k
    if(ps_ref_map->i4_num_ref == 2)
4079
3.06k
    {
4080
3.06k
        ps_ctxt->au1_ref_bits_tlu_lc[0][0] = 1;
4081
3.06k
        ps_ctxt->au1_ref_bits_tlu_lc[1][0] = 1;
4082
3.06k
        ps_ctxt->au1_ref_bits_tlu_lc[0][1] = 1;
4083
3.06k
        ps_ctxt->au1_ref_bits_tlu_lc[1][1] = 1;
4084
3.06k
    }
4085
3.29k
    else if(ps_ref_map->i4_num_ref > 2)
4086
575
    {
4087
2.73k
        for(i = 0; i < ps_ref_map->i4_num_ref; i++)
4088
2.15k
        {
4089
2.15k
            S32 l0, l1;
4090
2.15k
            l0 = ps_ctxt->a_ref_idx_lc_to_l0[i];
4091
2.15k
            l1 = ps_ctxt->a_ref_idx_lc_to_l1[i];
4092
2.15k
            ps_ctxt->au1_ref_bits_tlu_lc[0][i] = gau1_ref_bits[l0];
4093
2.15k
            ps_ctxt->au1_ref_bits_tlu_lc[1][i] = gau1_ref_bits[l1];
4094
2.15k
        }
4095
575
    }
4096
4097
    /*************************************************************************/
4098
    /* Preparation of the scaling factors for reference indices. The scale   */
4099
    /* factor depends on distance of the two ref indices from current input  */
4100
    /* in terms of poc delta.                                                */
4101
    /*************************************************************************/
4102
16.4k
    for(i = 0; i < ps_ref_map->i4_num_ref; i++)
4103
10.1k
    {
4104
32.3k
        for(j = 0; j < ps_ref_map->i4_num_ref; j++)
4105
22.2k
        {
4106
22.2k
            S16 i2_scf_q8;
4107
22.2k
            S32 poc_from, poc_to;
4108
4109
22.2k
            poc_from = ps_ctxt->ai4_ref_idx_to_poc_lc[j];
4110
22.2k
            poc_to = ps_ctxt->ai4_ref_idx_to_poc_lc[i];
4111
4112
22.2k
            i2_scf_q8 = hme_scale_for_ref_idx(ps_ctxt->i4_curr_poc, poc_from, poc_to);
4113
22.2k
            ps_ctxt->ai2_ref_scf[j + i * MAX_NUM_REF] = i2_scf_q8;
4114
22.2k
        }
4115
10.1k
    }
4116
4117
    /*************************************************************************/
4118
    /* We store simplified look ups for 4 hpel planes and inp y plane for    */
4119
    /* every layer and for every ref id in the layer. So update these lookups*/
4120
    /*************************************************************************/
4121
12.7k
    for(i = 0; i < 1; i++)
4122
6.35k
    {
4123
6.35k
        U08 **ppu1_rec_fxfy, **ppu1_rec_hxfy, **ppu1_rec_fxhy, **ppu1_rec_hxhy;
4124
6.35k
        U08 **ppu1_inp;
4125
6.35k
        void **ppvlist_dep_mngr;
4126
6.35k
        layer_ctxt_t *ps_layer_ctxt = ps_ctxt->ps_curr_descr->aps_layers[i];
4127
4128
6.35k
        ppvlist_dep_mngr = &ps_ctxt->apv_list_dep_mngr[i][0];
4129
6.35k
        ppu1_rec_fxfy = &ps_ctxt->apu1_list_rec_fxfy[i][0];
4130
6.35k
        ppu1_rec_hxfy = &ps_ctxt->apu1_list_rec_hxfy[i][0];
4131
6.35k
        ppu1_rec_fxhy = &ps_ctxt->apu1_list_rec_fxhy[i][0];
4132
6.35k
        ppu1_rec_hxhy = &ps_ctxt->apu1_list_rec_hxhy[i][0];
4133
6.35k
        ppu1_inp = &ps_ctxt->apu1_list_inp[i][0];
4134
16.4k
        for(j = 0; j < ps_ref_map->i4_num_ref; j++)
4135
10.1k
        {
4136
10.1k
            hme_ref_desc_t *ps_ref_desc;
4137
10.1k
            hme_ref_buf_info_t *ps_buf_info;
4138
10.1k
            layer_ctxt_t *ps_layer;
4139
10.1k
            S32 ref_id_lc;
4140
4141
10.1k
            ps_ref_desc = &ps_ref_map->as_ref_desc[j];
4142
10.1k
            ps_buf_info = &ps_ref_desc->as_ref_info[i];
4143
10.1k
            ref_id_lc = ps_ref_desc->i1_ref_id_lc;
4144
4145
10.1k
            desc_idx = ps_ctxt->a_ref_to_descr_id[ref_id_lc];
4146
10.1k
            ps_layer = ps_thrd_ctxt->as_ref_descr[desc_idx].aps_layers[i];
4147
4148
10.1k
            ppu1_inp[j] = ps_buf_info->pu1_ref_src;
4149
10.1k
            ppu1_rec_fxfy[j] = ps_buf_info->pu1_rec_fxfy;
4150
10.1k
            ppu1_rec_hxfy[j] = ps_buf_info->pu1_rec_hxfy;
4151
10.1k
            ppu1_rec_fxhy[j] = ps_buf_info->pu1_rec_fxhy;
4152
10.1k
            ppu1_rec_hxhy[j] = ps_buf_info->pu1_rec_hxhy;
4153
10.1k
            ppvlist_dep_mngr[j] = ps_buf_info->pv_dep_mngr;
4154
4155
            /* Update the curr descriptors reference pointers here */
4156
10.1k
            ps_layer_ctxt->ppu1_list_inp[j] = ps_buf_info->pu1_ref_src;
4157
10.1k
            ps_layer_ctxt->ppu1_list_rec_fxfy[j] = ps_buf_info->pu1_rec_fxfy;
4158
10.1k
            ps_layer_ctxt->ppu1_list_rec_hxfy[j] = ps_buf_info->pu1_rec_hxfy;
4159
10.1k
            ps_layer_ctxt->ppu1_list_rec_fxhy[j] = ps_buf_info->pu1_rec_fxhy;
4160
10.1k
            ps_layer_ctxt->ppu1_list_rec_hxhy[j] = ps_buf_info->pu1_rec_hxhy;
4161
10.1k
        }
4162
6.35k
    }
4163
    /*************************************************************************/
4164
    /* The mv range for each layer is computed. For dyadic layers it will    */
4165
    /* keep shrinking by 2, for non dyadic it will shrink by ratio of wd and */
4166
    /* ht. In general formula used is scale by ratio of wd for x and ht for y*/
4167
    /*************************************************************************/
4168
12.7k
    for(i = 0; i < 1; i++)
4169
6.35k
    {
4170
6.35k
        layer_ctxt_t *ps_layer_ctxt;
4171
6.35k
        if(i == 0)
4172
6.35k
        {
4173
6.35k
            i2_max_x = ps_frm_prms->i2_mv_range_x;
4174
6.35k
            i2_max_y = ps_frm_prms->i2_mv_range_y;
4175
6.35k
        }
4176
0
        else
4177
0
        {
4178
0
            i2_max_x = (S16)FLOOR8(((i2_max_x * ps_ctxt->i4_wd) / ps_ctxt->i4_wd));
4179
0
            i2_max_y = (S16)FLOOR8(((i2_max_y * ps_ctxt->i4_ht) / ps_ctxt->i4_ht));
4180
0
        }
4181
6.35k
        ps_layer_ctxt = ps_ctxt->ps_curr_descr->aps_layers[i];
4182
6.35k
        ps_layer_ctxt->i2_max_mv_x = i2_max_x;
4183
6.35k
        ps_layer_ctxt->i2_max_mv_y = i2_max_y;
4184
4185
        /*********************************************************************/
4186
        /* Every layer maintains a reference id lc to POC mapping. This is   */
4187
        /* because the mapping is unique for every frm. Also, in next frm,   */
4188
        /* we require colocated mvs which means scaling according to temporal*/
4189
        /*distance. Hence this mapping needs to be maintained in every       */
4190
        /* layer ctxt                                                        */
4191
        /*********************************************************************/
4192
6.35k
        memset(ps_layer_ctxt->ai4_ref_id_to_poc_lc, -1, sizeof(S32) * ps_ctxt->max_num_ref);
4193
6.35k
        if(ps_ref_map->i4_num_ref)
4194
5.46k
        {
4195
5.46k
            memcpy(
4196
5.46k
                ps_layer_ctxt->ai4_ref_id_to_poc_lc,
4197
5.46k
                ps_ctxt->ai4_ref_idx_to_poc_lc,
4198
5.46k
                ps_ref_map->i4_num_ref * sizeof(S32));
4199
5.46k
        }
4200
6.35k
    }
4201
4202
6.35k
    return;
4203
6.35k
}
4204
4205
/**
4206
********************************************************************************
4207
*  @fn     hme_coarse_process_frm_init
4208
*
4209
*  @brief  HME frame level initialsation processing function
4210
*
4211
*  @param[in] pv_me_ctxt : ME ctxt pointer
4212
*
4213
*  @param[in] ps_ref_map : Reference map prms pointer
4214
*
4215
*  @param[in] ps_frm_prms :Pointer to frame params
4216
*
4217
*  @return Scale factor in Q8 format
4218
********************************************************************************
4219
*/
4220
void hme_coarse_process_frm_init(
4221
    void *pv_me_ctxt, hme_ref_map_t *ps_ref_map, hme_frm_prms_t *ps_frm_prms)
4222
6.35k
{
4223
6.35k
    coarse_me_ctxt_t *ps_ctxt = (coarse_me_ctxt_t *)pv_me_ctxt;
4224
6.35k
    S32 i, j, desc_idx;
4225
6.35k
    S16 i2_max_x = 0, i2_max_y = 0;
4226
4227
    /* Set the Qp of current frm passed by caller. Required for intra cost */
4228
6.35k
    ps_ctxt->frm_qstep = ps_frm_prms->qstep;
4229
4230
    /* Bidir enabled or not */
4231
6.35k
    ps_ctxt->s_frm_prms = *ps_frm_prms;
4232
4233
    /*************************************************************************/
4234
    /* Set up the ref pic parameters across all layers. For this, we do the  */
4235
    /* following: the application has given us a ref pic list, we go index   */
4236
    /* by index and pick up the picture. A picture can be uniquely be mapped */
4237
    /* to a POC. So we search all layer descriptor array to find the POC     */
4238
    /* Once found, we update all attributes in this descriptor.              */
4239
    /* During this updation process we also create an index of descriptor id */
4240
    /* to ref id mapping. It is important to find the same POC in the layers */
4241
    /* descr strcture since it holds the pyramid inputs for non encode layers*/
4242
    /* Apart from this, e also update array containing the index of the descr*/
4243
    /* During processing for ease of access, each layer has a pointer to aray*/
4244
    /* of pointers containing fxfy, fxhy, hxfy, hxhy and inputs for each ref */
4245
    /* we update this too.                                                   */
4246
    /*************************************************************************/
4247
6.35k
    ps_ctxt->num_ref_past = 0;
4248
6.35k
    ps_ctxt->num_ref_future = 0;
4249
16.4k
    for(i = 0; i < ps_ref_map->i4_num_ref; i++)
4250
10.1k
    {
4251
10.1k
        S32 ref_id_lc, idx;
4252
10.1k
        hme_ref_desc_t *ps_ref_desc;
4253
4254
10.1k
        ps_ref_desc = &ps_ref_map->as_ref_desc[i];
4255
10.1k
        ref_id_lc = ps_ref_desc->i1_ref_id_lc;
4256
        /* Obtain the id of descriptor that contains this POC */
4257
10.1k
        idx = hme_coarse_find_descr_idx(ps_ctxt, ps_ref_desc->i4_poc);
4258
4259
        /* Update all layers in this descr with the reference attributes */
4260
10.1k
        hme_update_layer_desc(
4261
10.1k
            &ps_ctxt->as_ref_descr[idx],
4262
10.1k
            ps_ref_desc,
4263
10.1k
            1,
4264
10.1k
            ps_ctxt->num_layers - 1,
4265
10.1k
            ps_ctxt->ps_curr_descr);
4266
4267
        /* Update the array having ref id lc to descr id mapping */
4268
10.1k
        ps_ctxt->a_ref_to_descr_id[ps_ref_desc->i1_ref_id_lc] = idx;
4269
4270
        /* From ref id lc we need to work out the POC, So update this array */
4271
10.1k
        ps_ctxt->ai4_ref_idx_to_poc_lc[ref_id_lc] = ps_ref_desc->i4_poc;
4272
4273
        /* From ref id lc we need to work out the display num, So update this array */
4274
10.1k
        ps_ctxt->ai4_ref_idx_to_disp_num[ref_id_lc] = ps_ref_desc->i4_display_num;
4275
4276
        /* When computing costs in L0 and L1 directions, we need the */
4277
        /* respective ref id L0 and L1, so update this mapping */
4278
10.1k
        ps_ctxt->a_ref_idx_lc_to_l0[ref_id_lc] = ps_ref_desc->i1_ref_id_l0;
4279
10.1k
        ps_ctxt->a_ref_idx_lc_to_l1[ref_id_lc] = ps_ref_desc->i1_ref_id_l1;
4280
10.1k
        if((ps_ctxt->i4_curr_poc > ps_ref_desc->i4_poc) || ps_ctxt->i4_curr_poc == 0)
4281
9.27k
        {
4282
9.27k
            ps_ctxt->au1_is_past[ref_id_lc] = 1;
4283
9.27k
            ps_ctxt->ai1_past_list[ps_ctxt->num_ref_past] = ref_id_lc;
4284
9.27k
            ps_ctxt->num_ref_past++;
4285
9.27k
        }
4286
829
        else
4287
829
        {
4288
829
            ps_ctxt->au1_is_past[ref_id_lc] = 0;
4289
829
            ps_ctxt->ai1_future_list[ps_ctxt->num_ref_future] = ref_id_lc;
4290
829
            ps_ctxt->num_ref_future++;
4291
829
        }
4292
10.1k
        if(1 == ps_ctxt->i4_wt_pred_enable_flag)
4293
0
        {
4294
            /* copy the weight and offsets from current ref desc */
4295
0
            ps_ctxt->s_wt_pred.a_wpred_wt[ref_id_lc] = ps_ref_desc->i2_weight;
4296
4297
            /* inv weight is stored in Q15 format */
4298
0
            ps_ctxt->s_wt_pred.a_inv_wpred_wt[ref_id_lc] =
4299
0
                ((1 << 15) + (ps_ref_desc->i2_weight >> 1)) / ps_ref_desc->i2_weight;
4300
4301
0
            ps_ctxt->s_wt_pred.a_wpred_off[ref_id_lc] = ps_ref_desc->i2_offset;
4302
0
        }
4303
10.1k
        else
4304
10.1k
        {
4305
            /* store default wt and offset*/
4306
10.1k
            ps_ctxt->s_wt_pred.a_wpred_wt[ref_id_lc] = WGHT_DEFAULT;
4307
4308
            /* inv weight is stored in Q15 format */
4309
10.1k
            ps_ctxt->s_wt_pred.a_inv_wpred_wt[ref_id_lc] =
4310
10.1k
                ((1 << 15) + (WGHT_DEFAULT >> 1)) / WGHT_DEFAULT;
4311
4312
10.1k
            ps_ctxt->s_wt_pred.a_wpred_off[ref_id_lc] = 0;
4313
10.1k
        }
4314
10.1k
    }
4315
4316
6.35k
    ps_ctxt->ai1_future_list[ps_ctxt->num_ref_future] = -1;
4317
6.35k
    ps_ctxt->ai1_past_list[ps_ctxt->num_ref_past] = -1;
4318
4319
    /*************************************************************************/
4320
    /* Preparation of the TLU for bits for reference indices.                */
4321
    /* Special case is that of numref = 2. (TEV)                             */
4322
    /* Other cases uses UEV                                                  */
4323
    /*************************************************************************/
4324
82.6k
    for(i = 0; i < MAX_NUM_REF; i++)
4325
76.2k
    {
4326
76.2k
        ps_ctxt->au1_ref_bits_tlu_lc[0][i] = 0;
4327
76.2k
        ps_ctxt->au1_ref_bits_tlu_lc[1][i] = 0;
4328
76.2k
    }
4329
4330
6.35k
    if(ps_ref_map->i4_num_ref == 2)
4331
3.06k
    {
4332
3.06k
        ps_ctxt->au1_ref_bits_tlu_lc[0][0] = 1;
4333
3.06k
        ps_ctxt->au1_ref_bits_tlu_lc[1][0] = 1;
4334
3.06k
        ps_ctxt->au1_ref_bits_tlu_lc[0][1] = 1;
4335
3.06k
        ps_ctxt->au1_ref_bits_tlu_lc[1][1] = 1;
4336
3.06k
    }
4337
3.29k
    else if(ps_ref_map->i4_num_ref > 2)
4338
575
    {
4339
2.73k
        for(i = 0; i < ps_ref_map->i4_num_ref; i++)
4340
2.15k
        {
4341
2.15k
            S32 l0, l1;
4342
2.15k
            l0 = ps_ctxt->a_ref_idx_lc_to_l0[i];
4343
2.15k
            l1 = ps_ctxt->a_ref_idx_lc_to_l1[i];
4344
2.15k
            ps_ctxt->au1_ref_bits_tlu_lc[0][i] = gau1_ref_bits[l0];
4345
2.15k
            ps_ctxt->au1_ref_bits_tlu_lc[1][i] = gau1_ref_bits[l1];
4346
2.15k
        }
4347
575
    }
4348
4349
    /*************************************************************************/
4350
    /* Preparation of the scaling factors for reference indices. The scale   */
4351
    /* factor depends on distance of the two ref indices from current input  */
4352
    /* in terms of poc delta.                                                */
4353
    /*************************************************************************/
4354
16.4k
    for(i = 0; i < ps_ref_map->i4_num_ref; i++)
4355
10.1k
    {
4356
32.3k
        for(j = 0; j < ps_ref_map->i4_num_ref; j++)
4357
22.2k
        {
4358
22.2k
            S16 i2_scf_q8;
4359
22.2k
            S32 poc_from, poc_to;
4360
4361
22.2k
            poc_from = ps_ctxt->ai4_ref_idx_to_poc_lc[j];
4362
22.2k
            poc_to = ps_ctxt->ai4_ref_idx_to_poc_lc[i];
4363
4364
22.2k
            i2_scf_q8 = hme_scale_for_ref_idx(ps_ctxt->i4_curr_poc, poc_from, poc_to);
4365
22.2k
            ps_ctxt->ai2_ref_scf[j + i * MAX_NUM_REF] = i2_scf_q8;
4366
22.2k
        }
4367
10.1k
    }
4368
4369
    /*************************************************************************/
4370
    /* We store simplified look ups for inp y plane for                      */
4371
    /* every layer and for every ref id in the layer.                        */
4372
    /*************************************************************************/
4373
19.7k
    for(i = 1; i < ps_ctxt->num_layers; i++)
4374
13.3k
    {
4375
13.3k
        U08 **ppu1_inp;
4376
4377
13.3k
        ppu1_inp = &ps_ctxt->apu1_list_inp[i][0];
4378
34.5k
        for(j = 0; j < ps_ref_map->i4_num_ref; j++)
4379
21.1k
        {
4380
21.1k
            hme_ref_desc_t *ps_ref_desc;
4381
21.1k
            hme_ref_buf_info_t *ps_buf_info;
4382
21.1k
            layer_ctxt_t *ps_layer;
4383
21.1k
            S32 ref_id_lc;
4384
4385
21.1k
            ps_ref_desc = &ps_ref_map->as_ref_desc[j];
4386
21.1k
            ps_buf_info = &ps_ref_desc->as_ref_info[i];
4387
21.1k
            ref_id_lc = ps_ref_desc->i1_ref_id_lc;
4388
4389
21.1k
            desc_idx = ps_ctxt->a_ref_to_descr_id[ref_id_lc];
4390
21.1k
            ps_layer = ps_ctxt->as_ref_descr[desc_idx].aps_layers[i];
4391
4392
21.1k
            ppu1_inp[j] = ps_layer->pu1_inp;
4393
21.1k
        }
4394
13.3k
    }
4395
    /*************************************************************************/
4396
    /* The mv range for each layer is computed. For dyadic layers it will    */
4397
    /* keep shrinking by 2, for non dyadic it will shrink by ratio of wd and */
4398
    /* ht. In general formula used is scale by ratio of wd for x and ht for y*/
4399
    /*************************************************************************/
4400
4401
    /* set to layer 0 search range params */
4402
6.35k
    i2_max_x = ps_frm_prms->i2_mv_range_x;
4403
6.35k
    i2_max_y = ps_frm_prms->i2_mv_range_y;
4404
4405
19.7k
    for(i = 1; i < ps_ctxt->num_layers; i++)
4406
13.3k
    {
4407
13.3k
        layer_ctxt_t *ps_layer_ctxt;
4408
4409
13.3k
        {
4410
13.3k
            i2_max_x = (S16)FLOOR8(((i2_max_x * ps_ctxt->a_wd[i]) / ps_ctxt->a_wd[i - 1]));
4411
13.3k
            i2_max_y = (S16)FLOOR8(((i2_max_y * ps_ctxt->a_ht[i]) / ps_ctxt->a_ht[i - 1]));
4412
13.3k
        }
4413
13.3k
        ps_layer_ctxt = ps_ctxt->ps_curr_descr->aps_layers[i];
4414
13.3k
        ps_layer_ctxt->i2_max_mv_x = i2_max_x;
4415
13.3k
        ps_layer_ctxt->i2_max_mv_y = i2_max_y;
4416
4417
        /*********************************************************************/
4418
        /* Every layer maintains a reference id lc to POC mapping. This is   */
4419
        /* because the mapping is unique for every frm. Also, in next frm,   */
4420
        /* we require colocated mvs which means scaling according to temporal*/
4421
        /*distance. Hence this mapping needs to be maintained in every       */
4422
        /* layer ctxt                                                        */
4423
        /*********************************************************************/
4424
13.3k
        memset(ps_layer_ctxt->ai4_ref_id_to_poc_lc, -1, sizeof(S32) * ps_ctxt->max_num_ref);
4425
13.3k
        if(ps_ref_map->i4_num_ref)
4426
11.4k
        {
4427
11.4k
            memcpy(
4428
11.4k
                ps_layer_ctxt->ai4_ref_id_to_poc_lc,
4429
11.4k
                ps_ctxt->ai4_ref_idx_to_poc_lc,
4430
11.4k
                ps_ref_map->i4_num_ref * sizeof(S32));
4431
11.4k
            memcpy(
4432
11.4k
                ps_layer_ctxt->ai4_ref_id_to_disp_num,
4433
11.4k
                ps_ctxt->ai4_ref_idx_to_disp_num,
4434
11.4k
                ps_ref_map->i4_num_ref * sizeof(S32));
4435
11.4k
        }
4436
13.3k
    }
4437
4438
6.35k
    return;
4439
6.35k
}
4440
4441
/**
4442
********************************************************************************
4443
*  @fn     hme_process_frm
4444
*
4445
*  @brief  HME frame level processing function
4446
*
4447
*  @param[in] pv_me_ctxt : ME ctxt pointer
4448
*
4449
*  @param[in] ps_ref_map : Reference map prms pointer
4450
*
4451
*  @param[in] ppd_intra_costs : pointer to array of intra cost cost buffers for each layer
4452
*
4453
*  @param[in] ps_frm_prms : pointer to Frame level parameters of HME
4454
*
4455
*  @param[in] pf_ext_update_fxn : function pointer to update CTb results
4456
*
4457
*  @param[in] pf_get_intra_cu_and_cost :function pointer to get intra cu size and cost
4458
*
4459
*  @param[in] ps_multi_thrd_ctxt :function pointer to get intra cu size and cost
4460
*
4461
*  @return Scale factor in Q8 format
4462
********************************************************************************
4463
*/
4464
4465
void hme_process_frm(
4466
    void *pv_me_ctxt,
4467
    pre_enc_L0_ipe_encloop_ctxt_t *ps_l0_ipe_input,
4468
    hme_ref_map_t *ps_ref_map,
4469
    double **ppd_intra_costs,
4470
    hme_frm_prms_t *ps_frm_prms,
4471
    PF_EXT_UPDATE_FXN_T pf_ext_update_fxn,
4472
    void *pv_coarse_layer,
4473
    void *pv_multi_thrd_ctxt,
4474
    S32 i4_frame_parallelism_level,
4475
    S32 thrd_id,
4476
    S32 i4_me_frm_id)
4477
4.94k
{
4478
4.94k
    refine_prms_t s_refine_prms;
4479
4.94k
    me_ctxt_t *ps_thrd_ctxt = (me_ctxt_t *)pv_me_ctxt;
4480
4.94k
    me_frm_ctxt_t *ps_ctxt = ps_thrd_ctxt->aps_me_frm_prms[i4_me_frm_id];
4481
4482
4.94k
    S32 lyr_job_type;
4483
4.94k
    multi_thrd_ctxt_t *ps_multi_thrd_ctxt;
4484
4.94k
    layer_ctxt_t *ps_coarse_layer = (layer_ctxt_t *)pv_coarse_layer;
4485
4486
4.94k
    ps_multi_thrd_ctxt = (multi_thrd_ctxt_t *)pv_multi_thrd_ctxt;
4487
4488
4.94k
    lyr_job_type = ME_JOB_ENC_LYR;
4489
    /*************************************************************************/
4490
    /* Final L0 layer ME call                                                */
4491
    /*************************************************************************/
4492
4.94k
    {
4493
        /* Set the CTB attributes dependin on corner/rt edge/bot edge/center*/
4494
4.94k
        hme_set_ctb_attrs(ps_ctxt->as_ctb_bound_attrs, ps_ctxt->i4_wd, ps_ctxt->i4_ht);
4495
4496
4.94k
        hme_set_refine_prms(
4497
4.94k
            &s_refine_prms,
4498
4.94k
            ps_ctxt->u1_encode[0],
4499
4.94k
            ps_ref_map->i4_num_ref,
4500
4.94k
            0,
4501
4.94k
            ps_ctxt->num_layers,
4502
4.94k
            ps_ctxt->num_layers_explicit_search,
4503
4.94k
            ps_thrd_ctxt->s_init_prms.use_4x4,
4504
4.94k
            ps_frm_prms,
4505
4.94k
            ppd_intra_costs,
4506
4.94k
            &ps_thrd_ctxt->s_init_prms.s_me_coding_tools);
4507
4508
4.94k
        hme_refine(
4509
4.94k
            ps_thrd_ctxt,
4510
4.94k
            &s_refine_prms,
4511
4.94k
            pf_ext_update_fxn,
4512
4.94k
            ps_coarse_layer,
4513
4.94k
            ps_multi_thrd_ctxt,
4514
4.94k
            lyr_job_type,
4515
4.94k
            thrd_id,
4516
4.94k
            i4_me_frm_id,
4517
4.94k
            ps_l0_ipe_input);
4518
4519
        /* Set current ref pic status which will used as perv frame ref pic */
4520
4.94k
        if(i4_frame_parallelism_level)
4521
0
        {
4522
0
            ps_ctxt->i4_is_prev_frame_reference = 0;
4523
0
        }
4524
4.94k
        else
4525
4.94k
        {
4526
4.94k
            ps_ctxt->i4_is_prev_frame_reference =
4527
4.94k
                ps_multi_thrd_ctxt->aps_cur_inp_me_prms[i4_me_frm_id]
4528
4.94k
                    ->ps_curr_inp->s_lap_out.i4_is_ref_pic;
4529
4.94k
        }
4530
4.94k
    }
4531
4532
4.94k
    return;
4533
4.94k
}
4534
4535
/**
4536
********************************************************************************
4537
*  @fn     hme_coarse_process_frm
4538
*
4539
*  @brief  HME frame level processing function (coarse + refine)
4540
*
4541
*  @param[in] pv_me_ctxt : ME ctxt pointer
4542
*
4543
*  @param[in] ps_ref_map : Reference map prms pointer
4544
*
4545
*  @param[in] ps_frm_prms : pointer to Frame level parameters of HME
4546
*
4547
*  @param[in] ps_multi_thrd_ctxt :Multi thread related ctxt
4548
*
4549
*  @return Scale factor in Q8 format
4550
********************************************************************************
4551
*/
4552
4553
void hme_coarse_process_frm(
4554
    void *pv_me_ctxt,
4555
    hme_ref_map_t *ps_ref_map,
4556
    hme_frm_prms_t *ps_frm_prms,
4557
    void *pv_multi_thrd_ctxt,
4558
    WORD32 i4_ping_pong,
4559
    void **ppv_dep_mngr_hme_sync)
4560
6.35k
{
4561
6.35k
    S16 i2_max;
4562
6.35k
    S32 layer_id;
4563
6.35k
    coarse_prms_t s_coarse_prms;
4564
6.35k
    refine_prms_t s_refine_prms;
4565
6.35k
    coarse_me_ctxt_t *ps_ctxt = (coarse_me_ctxt_t *)pv_me_ctxt;
4566
6.35k
    S32 lyr_job_type;
4567
6.35k
    multi_thrd_ctxt_t *ps_multi_thrd_ctxt;
4568
4569
6.35k
    ps_multi_thrd_ctxt = (multi_thrd_ctxt_t *)pv_multi_thrd_ctxt;
4570
    /*************************************************************************/
4571
    /* Fire processing of all layers, starting with coarsest layer.          */
4572
    /*************************************************************************/
4573
6.35k
    layer_id = ps_ctxt->num_layers - 1;
4574
6.35k
    i2_max = ps_ctxt->ps_curr_descr->aps_layers[layer_id]->i2_max_mv_x;
4575
6.35k
    i2_max = MAX(i2_max, ps_ctxt->ps_curr_descr->aps_layers[layer_id]->i2_max_mv_y);
4576
6.35k
    s_coarse_prms.i4_layer_id = layer_id;
4577
6.35k
    {
4578
6.35k
        S32 log_start_step;
4579
        /* Based on Preset, set the starting step size for Refinement */
4580
6.35k
        if(ME_MEDIUM_SPEED > ps_ctxt->s_init_prms.s_me_coding_tools.e_me_quality_presets)
4581
1.25k
        {
4582
1.25k
            log_start_step = 0;
4583
1.25k
        }
4584
5.09k
        else
4585
5.09k
        {
4586
5.09k
            log_start_step = 1;
4587
5.09k
        }
4588
4589
6.35k
        s_coarse_prms.i4_max_iters = i2_max >> log_start_step;
4590
6.35k
        s_coarse_prms.i4_start_step = 1 << log_start_step;
4591
6.35k
    }
4592
6.35k
    s_coarse_prms.i4_num_ref = ps_ref_map->i4_num_ref;
4593
6.35k
    s_coarse_prms.do_full_search = 1;
4594
6.35k
    if(s_coarse_prms.do_full_search)
4595
6.35k
    {
4596
        /* Set to 2 or 4 */
4597
6.35k
        if(ps_ctxt->s_init_prms.s_me_coding_tools.e_me_quality_presets < ME_MEDIUM_SPEED)
4598
1.25k
            s_coarse_prms.full_search_step = HME_COARSE_STEP_SIZE_HIGH_QUALITY;
4599
5.09k
        else if(ps_ctxt->s_init_prms.s_me_coding_tools.e_me_quality_presets >= ME_MEDIUM_SPEED)
4600
5.09k
            s_coarse_prms.full_search_step = HME_COARSE_STEP_SIZE_HIGH_SPEED;
4601
6.35k
    }
4602
6.35k
    s_coarse_prms.num_results = ps_ctxt->max_num_results_coarse;
4603
4604
    /* Coarse layer uses only 1 lambda, i.e. the one for open loop ME */
4605
6.35k
    s_coarse_prms.lambda = ps_frm_prms->i4_ol_sad_lambda_qf;
4606
6.35k
    s_coarse_prms.lambda_q_shift = ps_frm_prms->lambda_q_shift;
4607
6.35k
    s_coarse_prms.lambda = ((float)s_coarse_prms.lambda * (100.0 - ME_LAMBDA_DISCOUNT) / 100.0);
4608
4609
6.35k
    hme_coarsest(ps_ctxt, &s_coarse_prms, ps_multi_thrd_ctxt, i4_ping_pong, ppv_dep_mngr_hme_sync);
4610
4611
    /* all refinement layer processed in the loop below */
4612
6.35k
    layer_id--;
4613
6.35k
    lyr_job_type = ps_multi_thrd_ctxt->i4_me_coarsest_lyr_type + 1;
4614
4615
    /*************************************************************************/
4616
    /* This loop will run for all refine layers (non- encode layers)          */
4617
    /*************************************************************************/
4618
13.3k
    while(layer_id > 0)
4619
7.03k
    {
4620
7.03k
        hme_set_refine_prms(
4621
7.03k
            &s_refine_prms,
4622
7.03k
            ps_ctxt->u1_encode[layer_id],
4623
7.03k
            ps_ref_map->i4_num_ref,
4624
7.03k
            layer_id,
4625
7.03k
            ps_ctxt->num_layers,
4626
7.03k
            ps_ctxt->num_layers_explicit_search,
4627
7.03k
            ps_ctxt->s_init_prms.use_4x4,
4628
7.03k
            ps_frm_prms,
4629
7.03k
            NULL,
4630
7.03k
            &ps_ctxt->s_init_prms.s_me_coding_tools);
4631
4632
7.03k
        hme_refine_no_encode(
4633
7.03k
            ps_ctxt,
4634
7.03k
            &s_refine_prms,
4635
7.03k
            ps_multi_thrd_ctxt,
4636
7.03k
            lyr_job_type,
4637
7.03k
            i4_ping_pong,
4638
7.03k
            ppv_dep_mngr_hme_sync);
4639
4640
7.03k
        layer_id--;
4641
7.03k
        lyr_job_type++;
4642
7.03k
    }
4643
6.35k
}
4644
/**
4645
********************************************************************************
4646
*  @fn     hme_fill_neighbour_mvs
4647
*
4648
*  @brief  HME neighbour MV population function
4649
*
4650
*  @param[in] pps_mv_grid : MV grid array pointer
4651
*
4652
*  @param[in] i4_ctb_x : CTB pos X
4653
4654
*  @param[in] i4_ctb_y : CTB pos Y
4655
*
4656
*  @remarks :  Needs to be populated for proper implementation of cost fxn
4657
*
4658
*  @return Scale factor in Q8 format
4659
********************************************************************************
4660
*/
4661
void hme_fill_neighbour_mvs(
4662
    mv_grid_t **pps_mv_grid, S32 i4_ctb_x, S32 i4_ctb_y, S32 i4_num_ref, void *pv_ctxt)
4663
0
{
4664
    /* TODO : Needs to be populated for proper implementation of cost fxn */
4665
0
    ARG_NOT_USED(pps_mv_grid);
4666
0
    ARG_NOT_USED(i4_ctb_x);
4667
0
    ARG_NOT_USED(i4_ctb_y);
4668
0
    ARG_NOT_USED(i4_num_ref);
4669
0
    ARG_NOT_USED(pv_ctxt);
4670
0
}
4671
4672
/**
4673
*******************************************************************************
4674
*  @fn     void hme_get_active_pocs_list(void *pv_me_ctxt,
4675
*                                       S32 *p_pocs_buffered_in_me)
4676
*
4677
*  @brief  Returns the list of active POCs in ME ctxt
4678
*
4679
*  @param[in] pv_me_ctxt : handle to ME context
4680
*
4681
*  @param[out] p_pocs_buffered_in_me : pointer to an array which this fxn
4682
*                                      populates with pocs active
4683
*
4684
*  @return   void
4685
*******************************************************************************
4686
*/
4687
WORD32 hme_get_active_pocs_list(void *pv_me_ctxt, S32 i4_num_me_frm_pllel)
4688
6.35k
{
4689
6.35k
    me_ctxt_t *ps_ctxt = (me_ctxt_t *)pv_me_ctxt;
4690
6.35k
    S32 i, count = 0;
4691
4692
38.1k
    for(i = 0; i < (ps_ctxt->aps_me_frm_prms[0]->max_num_ref * i4_num_me_frm_pllel) + 1; i++)
4693
31.7k
    {
4694
31.7k
        S32 poc = ps_ctxt->as_ref_descr[i].aps_layers[0]->i4_poc;
4695
31.7k
        S32 i4_is_free = ps_ctxt->as_ref_descr[i].aps_layers[0]->i4_is_free;
4696
4697
31.7k
        if((i4_is_free == 0) && (poc != INVALID_POC))
4698
31.4k
        {
4699
31.4k
            count++;
4700
31.4k
        }
4701
31.7k
    }
4702
6.35k
    if(count == (ps_ctxt->aps_me_frm_prms[0]->max_num_ref * i4_num_me_frm_pllel) + 1)
4703
6.03k
    {
4704
6.03k
        return 1;
4705
6.03k
    }
4706
317
    else
4707
317
    {
4708
317
        return 0;
4709
317
    }
4710
6.35k
}
4711
4712
/**
4713
*******************************************************************************
4714
*  @fn     void hme_coarse_get_active_pocs_list(void *pv_me_ctxt,
4715
*                                       S32 *p_pocs_buffered_in_me)
4716
*
4717
*  @brief  Returns the list of active POCs in ME ctxt
4718
*
4719
*  @param[in] pv_me_ctxt : handle to ME context
4720
*
4721
*  @param[out] p_pocs_buffered_in_me : pointer to an array which this fxn
4722
*                                      populates with pocs active
4723
*
4724
*  @return   void
4725
*******************************************************************************
4726
*/
4727
void hme_coarse_get_active_pocs_list(void *pv_me_ctxt, S32 *p_pocs_buffered_in_me)
4728
6.35k
{
4729
6.35k
    coarse_me_ctxt_t *ps_ctxt = (coarse_me_ctxt_t *)pv_me_ctxt;
4730
6.35k
    S32 i, count = 0;
4731
4732
44.4k
    for(i = 0; i < ps_ctxt->max_num_ref + 1 + NUM_BUFS_DECOMP_HME; i++)
4733
38.1k
    {
4734
38.1k
        S32 poc = ps_ctxt->as_ref_descr[i].aps_layers[1]->i4_poc;
4735
4736
38.1k
        if(poc != -1)
4737
22.6k
        {
4738
22.6k
            p_pocs_buffered_in_me[count] = poc;
4739
22.6k
            count++;
4740
22.6k
        }
4741
38.1k
    }
4742
6.35k
    p_pocs_buffered_in_me[count] = -1;
4743
6.35k
}
4744
4745
S32 hme_get_blk_size(S32 use_4x4, S32 layer_id, S32 n_layers, S32 encode)
4746
21.9k
{
4747
    /* coarsest layer uses 4x4 blks, lowermost layer/encode layer uses 16x16 */
4748
21.9k
    if(layer_id == n_layers - 1)
4749
6.98k
        return 4;
4750
14.9k
    else if((layer_id == 0) || (encode))
4751
6.98k
        return 16;
4752
4753
    /* Intermediate non encode layers use 8 */
4754
8.00k
    return 8;
4755
21.9k
}