Coverage Report

Created: 2026-02-14 06:43

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/libhevc/decoder/ihevcd_api.c
Line
Count
Source
1
/******************************************************************************
2
*
3
* Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4
*
5
* Licensed under the Apache License, Version 2.0 (the "License");
6
* you may not use this file except in compliance with the License.
7
* You may obtain a copy of the License at:
8
*
9
* http://www.apache.org/licenses/LICENSE-2.0
10
*
11
* Unless required by applicable law or agreed to in writing, software
12
* distributed under the License is distributed on an "AS IS" BASIS,
13
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
* See the License for the specific language governing permissions and
15
* limitations under the License.
16
*
17
******************************************************************************/
18
/**
19
*******************************************************************************
20
* @file
21
*  ihevcd_api.c
22
*
23
* @brief
24
*  Contains api functions definitions for HEVC decoder
25
*
26
* @author
27
*  Harish
28
*
29
* @par List of Functions:
30
* - api_check_struct_sanity()
31
* - ihevcd_get_version()
32
* - ihevcd_set_default_params()
33
* - ihevcd_init()
34
* - ihevcd_get_num_rec()
35
* - ihevcd_allocate_static_bufs()
36
* - ihevcd_create()
37
* - ihevcd_retrieve_memrec()
38
* - ihevcd_set_display_frame()
39
* - ihevcd_set_flush_mode()
40
* - ihevcd_get_status()
41
* - ihevcd_get_buf_info()
42
* - ihevcd_set_params()
43
* - ihevcd_reset()
44
* - ihevcd_rel_display_frame()
45
* - ihevcd_disable_deblk()
46
* - ihevcd_get_frame_dimensions()
47
* - ihevcd_set_num_cores()
48
* - ihevcd_ctl()
49
* - ihevcd_cxa_api_function()
50
*
51
* @remarks
52
*  None
53
*
54
*******************************************************************************
55
*/
56
/*****************************************************************************/
57
/* File Includes                                                             */
58
/*****************************************************************************/
59
#include <stdio.h>
60
#include <stddef.h>
61
#include <stdlib.h>
62
#include <string.h>
63
64
#include "ihevc_typedefs.h"
65
#include "iv.h"
66
#include "ivd.h"
67
#include "ihevcd_cxa.h"
68
#include "ithread.h"
69
70
#include "ihevc_defs.h"
71
#include "ihevc_debug.h"
72
73
#include "ihevc_structs.h"
74
#include "ihevc_macros.h"
75
#include "ihevc_platform_macros.h"
76
77
#include "ihevc_buf_mgr.h"
78
#include "ihevc_dpb_mgr.h"
79
#include "ihevc_disp_mgr.h"
80
#include "ihevc_common_tables.h"
81
#include "ihevc_cabac_tables.h"
82
#include "ihevc_error.h"
83
84
#include "ihevcd_defs.h"
85
#include "ihevcd_trace.h"
86
87
#include "ihevcd_function_selector.h"
88
#include "ihevcd_structs.h"
89
#include "ihevcd_error.h"
90
#include "ihevcd_utils.h"
91
#include "ihevcd_decode.h"
92
#include "ihevcd_job_queue.h"
93
#include "ihevcd_statistics.h"
94
95
96
298k
#define ALIGNED_FREE(ps_codec, y) \
97
298k
if(y) {ps_codec->pf_aligned_free(ps_codec->pv_mem_ctxt, ((void *)y)); (y) = NULL;}
98
99
/*****************************************************************************/
100
/* Function Prototypes                                                       */
101
/*****************************************************************************/
102
IV_API_CALL_STATUS_T ihevcd_get_version(CHAR *pc_version_string,
103
                                        UWORD32 u4_version_buffer_size);
104
WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec);
105
106
107
/**
108
*******************************************************************************
109
*
110
* @brief
111
*  Used to test arguments for corresponding API call
112
*
113
* @par Description:
114
*  For each command the arguments are validated
115
*
116
* @param[in] ps_handle
117
*  Codec handle at API level
118
*
119
* @param[in] pv_api_ip
120
*  Pointer to input structure
121
*
122
* @param[out] pv_api_op
123
*  Pointer to output structure
124
*
125
* @returns  Status of error checking
126
*
127
* @remarks
128
*
129
*
130
*******************************************************************************
131
*/
132
133
static IV_API_CALL_STATUS_T api_check_struct_sanity(iv_obj_t *ps_handle,
134
                                                    void *pv_api_ip,
135
                                                    void *pv_api_op)
136
202k
{
137
202k
    IVD_API_COMMAND_TYPE_T e_cmd;
138
202k
    UWORD32 *pu4_api_ip;
139
202k
    UWORD32 *pu4_api_op;
140
202k
    WORD32 i;
141
142
202k
    if(NULL == pv_api_op)
143
0
        return (IV_FAIL);
144
145
202k
    if(NULL == pv_api_ip)
146
0
        return (IV_FAIL);
147
148
202k
    pu4_api_ip = (UWORD32 *)pv_api_ip;
149
202k
    pu4_api_op = (UWORD32 *)pv_api_op;
150
202k
    e_cmd = (IVD_API_COMMAND_TYPE_T)*(pu4_api_ip + 1);
151
152
202k
    *(pu4_api_op + 1) = 0;
153
    /* error checks on handle */
154
202k
    switch((WORD32)e_cmd)
155
202k
    {
156
4.17k
        case IVD_CMD_CREATE:
157
4.17k
            break;
158
159
0
        case IVD_CMD_REL_DISPLAY_FRAME:
160
0
        case IVD_CMD_SET_DISPLAY_FRAME:
161
0
        case IVD_CMD_GET_DISPLAY_FRAME:
162
174k
        case IVD_CMD_VIDEO_DECODE:
163
178k
        case IVD_CMD_DELETE:
164
198k
        case IVD_CMD_VIDEO_CTL:
165
198k
            if(ps_handle == NULL)
166
1.34k
            {
167
1.34k
                *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
168
1.34k
                *(pu4_api_op + 1) |= IVD_HANDLE_NULL;
169
1.34k
                return IV_FAIL;
170
1.34k
            }
171
172
196k
            if(ps_handle->u4_size != sizeof(iv_obj_t))
173
0
            {
174
0
                *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
175
0
                *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT;
176
0
                return IV_FAIL;
177
0
            }
178
179
180
196k
            if(ps_handle->pv_codec_handle == NULL)
181
0
            {
182
0
                *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
183
0
                *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
184
0
                return IV_FAIL;
185
0
            }
186
196k
            break;
187
196k
        default:
188
0
            *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
189
0
            *(pu4_api_op + 1) |= IVD_INVALID_API_CMD;
190
0
            return IV_FAIL;
191
202k
    }
192
193
200k
    switch((WORD32)e_cmd)
194
200k
    {
195
4.17k
        case IVD_CMD_CREATE:
196
4.17k
        {
197
4.17k
            ihevcd_cxa_create_ip_t *ps_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
198
4.17k
            ihevcd_cxa_create_op_t *ps_op = (ihevcd_cxa_create_op_t *)pv_api_op;
199
200
201
4.17k
            ps_op->s_ivd_create_op_t.u4_error_code = 0;
202
203
4.17k
            if((ps_ip->s_ivd_create_ip_t.u4_size > sizeof(ihevcd_cxa_create_ip_t))
204
4.17k
                            || (ps_ip->s_ivd_create_ip_t.u4_size
205
4.17k
                                            < sizeof(ivd_create_ip_t)))
206
0
            {
207
0
                ps_op->s_ivd_create_op_t.u4_error_code |= 1
208
0
                                << IVD_UNSUPPORTEDPARAM;
209
0
                ps_op->s_ivd_create_op_t.u4_error_code |=
210
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
211
212
0
                return (IV_FAIL);
213
0
            }
214
215
4.17k
            if((ps_op->s_ivd_create_op_t.u4_size != sizeof(ihevcd_cxa_create_op_t))
216
0
                            && (ps_op->s_ivd_create_op_t.u4_size
217
0
                                            != sizeof(ivd_create_op_t)))
218
0
            {
219
0
                ps_op->s_ivd_create_op_t.u4_error_code |= 1
220
0
                                << IVD_UNSUPPORTEDPARAM;
221
0
                ps_op->s_ivd_create_op_t.u4_error_code |=
222
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
223
224
0
                return (IV_FAIL);
225
0
            }
226
227
228
4.17k
            if((ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P)
229
2.90k
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
230
2.90k
                                            != IV_YUV_422ILE)
231
2.27k
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
232
2.27k
                                            != IV_RGB_565)
233
1.86k
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
234
1.86k
                                            != IV_YUV_420SP_UV)
235
950
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
236
950
                                            != IV_YUV_420SP_VU)
237
519
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
238
519
                                            != IV_GRAY))
239
9
            {
240
9
                ps_op->s_ivd_create_op_t.u4_error_code |= 1
241
9
                                << IVD_UNSUPPORTEDPARAM;
242
9
                ps_op->s_ivd_create_op_t.u4_error_code |=
243
9
                                IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
244
245
9
                return (IV_FAIL);
246
9
            }
247
248
            /* Shared display mode is supported only for 420SP and 420P formats */
249
4.16k
            if((ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P)
250
2.89k
                            && (ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_UV)
251
1.97k
                            && (ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_VU)
252
1.54k
                            && ps_ip->s_ivd_create_ip_t.u4_share_disp_buf == 1)
253
0
            {
254
0
                ps_op->s_ivd_create_op_t.u4_error_code |= 1
255
0
                                << IVD_UNSUPPORTEDPARAM;
256
0
                ps_op->s_ivd_create_op_t.u4_error_code |=
257
0
                                IVD_INIT_DEC_FAILED;
258
0
                return (IV_FAIL);
259
0
            }
260
261
4.16k
        }
262
4.16k
            break;
263
264
4.16k
        case IVD_CMD_GET_DISPLAY_FRAME:
265
0
        {
266
0
            ihevcd_cxa_get_display_frame_ip_t *ps_ip =
267
0
                            (ihevcd_cxa_get_display_frame_ip_t *)pv_api_ip;
268
0
            ihevcd_cxa_get_display_frame_op_t *ps_op =
269
0
                            (ihevcd_cxa_get_display_frame_op_t *)pv_api_op;
270
271
0
            ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0;
272
273
0
            if((ps_ip->s_ivd_get_display_frame_ip_t.u4_size
274
0
                            != sizeof(ihevcd_cxa_get_display_frame_ip_t))
275
0
                            && (ps_ip->s_ivd_get_display_frame_ip_t.u4_size
276
0
                                            != sizeof(ivd_get_display_frame_ip_t)))
277
0
            {
278
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
279
0
                                << IVD_UNSUPPORTEDPARAM;
280
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
281
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
282
0
                return (IV_FAIL);
283
0
            }
284
285
0
            if((ps_op->s_ivd_get_display_frame_op_t.u4_size
286
0
                            != sizeof(ihevcd_cxa_get_display_frame_op_t))
287
0
                            && (ps_op->s_ivd_get_display_frame_op_t.u4_size
288
0
                                            != sizeof(ivd_get_display_frame_op_t)))
289
0
            {
290
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
291
0
                                << IVD_UNSUPPORTEDPARAM;
292
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
293
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
294
0
                return (IV_FAIL);
295
0
            }
296
297
0
        }
298
0
            break;
299
300
0
        case IVD_CMD_REL_DISPLAY_FRAME:
301
0
        {
302
0
            ihevcd_cxa_rel_display_frame_ip_t *ps_ip =
303
0
                            (ihevcd_cxa_rel_display_frame_ip_t *)pv_api_ip;
304
0
            ihevcd_cxa_rel_display_frame_op_t *ps_op =
305
0
                            (ihevcd_cxa_rel_display_frame_op_t *)pv_api_op;
306
307
0
            ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0;
308
309
0
            if((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
310
0
                            != sizeof(ihevcd_cxa_rel_display_frame_ip_t))
311
0
                            && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
312
0
                                            != sizeof(ivd_rel_display_frame_ip_t)))
313
0
            {
314
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
315
0
                                << IVD_UNSUPPORTEDPARAM;
316
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
317
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
318
0
                return (IV_FAIL);
319
0
            }
320
321
0
            if((ps_op->s_ivd_rel_display_frame_op_t.u4_size
322
0
                            != sizeof(ihevcd_cxa_rel_display_frame_op_t))
323
0
                            && (ps_op->s_ivd_rel_display_frame_op_t.u4_size
324
0
                                            != sizeof(ivd_rel_display_frame_op_t)))
325
0
            {
326
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
327
0
                                << IVD_UNSUPPORTEDPARAM;
328
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
329
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
330
0
                return (IV_FAIL);
331
0
            }
332
333
0
        }
334
0
            break;
335
336
0
        case IVD_CMD_SET_DISPLAY_FRAME:
337
0
        {
338
0
            ihevcd_cxa_set_display_frame_ip_t *ps_ip =
339
0
                            (ihevcd_cxa_set_display_frame_ip_t *)pv_api_ip;
340
0
            ihevcd_cxa_set_display_frame_op_t *ps_op =
341
0
                            (ihevcd_cxa_set_display_frame_op_t *)pv_api_op;
342
0
            UWORD32 j;
343
344
0
            ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0;
345
346
0
            if((ps_ip->s_ivd_set_display_frame_ip_t.u4_size
347
0
                            != sizeof(ihevcd_cxa_set_display_frame_ip_t))
348
0
                            && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size
349
0
                                            != sizeof(ivd_set_display_frame_ip_t)))
350
0
            {
351
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
352
0
                                << IVD_UNSUPPORTEDPARAM;
353
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
354
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
355
0
                return (IV_FAIL);
356
0
            }
357
358
0
            if((ps_op->s_ivd_set_display_frame_op_t.u4_size
359
0
                            != sizeof(ihevcd_cxa_set_display_frame_op_t))
360
0
                            && (ps_op->s_ivd_set_display_frame_op_t.u4_size
361
0
                                            != sizeof(ivd_set_display_frame_op_t)))
362
0
            {
363
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
364
0
                                << IVD_UNSUPPORTEDPARAM;
365
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
366
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
367
0
                return (IV_FAIL);
368
0
            }
369
370
0
            if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0)
371
0
            {
372
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
373
0
                                << IVD_UNSUPPORTEDPARAM;
374
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
375
0
                                IVD_DISP_FRM_ZERO_OP_BUFS;
376
0
                return IV_FAIL;
377
0
            }
378
379
0
            for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs;
380
0
                            j++)
381
0
            {
382
0
                if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs
383
0
                                == 0)
384
0
                {
385
0
                    ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
386
0
                                    << IVD_UNSUPPORTEDPARAM;
387
0
                    ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
388
0
                                    IVD_DISP_FRM_ZERO_OP_BUFS;
389
0
                    return IV_FAIL;
390
0
                }
391
392
0
                for(i = 0;
393
0
                                i
394
0
                                                < (WORD32)ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;
395
0
                                i++)
396
0
                {
397
0
                    if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i]
398
0
                                    == NULL)
399
0
                    {
400
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
401
0
                                        << IVD_UNSUPPORTEDPARAM;
402
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
403
0
                                        IVD_DISP_FRM_OP_BUF_NULL;
404
0
                        return IV_FAIL;
405
0
                    }
406
407
0
                    if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i]
408
0
                                    == 0)
409
0
                    {
410
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
411
0
                                        << IVD_UNSUPPORTEDPARAM;
412
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
413
0
                                        IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
414
0
                        return IV_FAIL;
415
0
                    }
416
0
                }
417
0
            }
418
0
        }
419
0
            break;
420
421
172k
        case IVD_CMD_VIDEO_DECODE:
422
172k
        {
423
172k
            ihevcd_cxa_video_decode_ip_t *ps_ip =
424
172k
                            (ihevcd_cxa_video_decode_ip_t *)pv_api_ip;
425
172k
            ihevcd_cxa_video_decode_op_t *ps_op =
426
172k
                            (ihevcd_cxa_video_decode_op_t *)pv_api_op;
427
428
172k
            DEBUG("The input bytes is: %d",
429
172k
                            ps_ip->s_ivd_video_decode_ip_t.u4_num_Bytes);
430
172k
            ps_op->s_ivd_video_decode_op_t.u4_error_code = 0;
431
432
172k
            if(ps_ip->s_ivd_video_decode_ip_t.u4_size
433
172k
                            != sizeof(ihevcd_cxa_video_decode_ip_t)
434
172k
                            && ps_ip->s_ivd_video_decode_ip_t.u4_size
435
172k
                                            != sizeof(ivd_video_decode_ip_t))
436
0
            {
437
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
438
0
                                << IVD_UNSUPPORTEDPARAM;
439
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |=
440
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
441
0
                return (IV_FAIL);
442
0
            }
443
444
172k
            if(ps_op->s_ivd_video_decode_op_t.u4_size
445
172k
                            != sizeof(ihevcd_cxa_video_decode_op_t)
446
172k
                            && ps_op->s_ivd_video_decode_op_t.u4_size
447
172k
                                            != sizeof(ivd_video_decode_op_t))
448
0
            {
449
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
450
0
                                << IVD_UNSUPPORTEDPARAM;
451
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |=
452
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
453
0
                return (IV_FAIL);
454
0
            }
455
456
172k
            if(((codec_t *)(ps_handle->pv_codec_handle))->u1_enable_cu_info
457
0
                            && !ps_ip->pu1_8x8_blk_qp_map && !ps_ip->pu1_8x8_blk_type_map)
458
0
            {
459
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
460
0
                                << IVD_UNSUPPORTEDPARAM;
461
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |=
462
0
                                IHEVCD_FRAME_INFO_OP_BUF_NULL;
463
0
                return (IV_FAIL);
464
0
            }
465
466
172k
        }
467
172k
            break;
468
469
172k
        case IVD_CMD_DELETE:
470
4.16k
        {
471
4.16k
            ihevcd_cxa_delete_ip_t *ps_ip =
472
4.16k
                            (ihevcd_cxa_delete_ip_t *)pv_api_ip;
473
4.16k
            ihevcd_cxa_delete_op_t *ps_op =
474
4.16k
                            (ihevcd_cxa_delete_op_t *)pv_api_op;
475
476
4.16k
            ps_op->s_ivd_delete_op_t.u4_error_code = 0;
477
478
4.16k
            if(ps_ip->s_ivd_delete_ip_t.u4_size
479
4.16k
                            != sizeof(ihevcd_cxa_delete_ip_t))
480
0
            {
481
0
                ps_op->s_ivd_delete_op_t.u4_error_code |= 1
482
0
                                << IVD_UNSUPPORTEDPARAM;
483
0
                ps_op->s_ivd_delete_op_t.u4_error_code |=
484
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
485
0
                return (IV_FAIL);
486
0
            }
487
488
4.16k
            if(ps_op->s_ivd_delete_op_t.u4_size
489
4.16k
                            != sizeof(ihevcd_cxa_delete_op_t))
490
0
            {
491
0
                ps_op->s_ivd_delete_op_t.u4_error_code |= 1
492
0
                                << IVD_UNSUPPORTEDPARAM;
493
0
                ps_op->s_ivd_delete_op_t.u4_error_code |=
494
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
495
0
                return (IV_FAIL);
496
0
            }
497
498
4.16k
        }
499
4.16k
            break;
500
501
19.8k
        case IVD_CMD_VIDEO_CTL:
502
19.8k
        {
503
19.8k
            UWORD32 *pu4_ptr_cmd;
504
19.8k
            UWORD32 sub_command;
505
506
19.8k
            pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
507
19.8k
            pu4_ptr_cmd += 2;
508
19.8k
            sub_command = *pu4_ptr_cmd;
509
510
19.8k
            switch(sub_command)
511
19.8k
            {
512
8.33k
                case IVD_CMD_CTL_SETPARAMS:
513
8.33k
                {
514
8.33k
                    ihevcd_cxa_ctl_set_config_ip_t *ps_ip;
515
8.33k
                    ihevcd_cxa_ctl_set_config_op_t *ps_op;
516
8.33k
                    ps_ip = (ihevcd_cxa_ctl_set_config_ip_t *)pv_api_ip;
517
8.33k
                    ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
518
519
8.33k
                    if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
520
8.33k
                                    != sizeof(ihevcd_cxa_ctl_set_config_ip_t) &&
521
0
                                    ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
522
0
                                                != sizeof(ivd_ctl_set_config_ip_t))
523
0
                    {
524
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
525
0
                                        << IVD_UNSUPPORTEDPARAM;
526
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
527
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
528
0
                        return IV_FAIL;
529
0
                    }
530
8.33k
                }
531
                    //no break; is needed here
532
8.33k
                case IVD_CMD_CTL_SETDEFAULT:
533
8.33k
                {
534
8.33k
                    ihevcd_cxa_ctl_set_config_op_t *ps_op;
535
8.33k
                    ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
536
8.33k
                    if(ps_op->s_ivd_ctl_set_config_op_t.u4_size
537
8.33k
                                    != sizeof(ihevcd_cxa_ctl_set_config_op_t))
538
0
                    {
539
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
540
0
                                        << IVD_UNSUPPORTEDPARAM;
541
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
542
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
543
0
                        return IV_FAIL;
544
0
                    }
545
8.33k
                }
546
8.33k
                    break;
547
548
8.33k
                case IVD_CMD_CTL_GETPARAMS:
549
0
                {
550
0
                    ihevcd_cxa_ctl_getstatus_ip_t *ps_ip;
551
0
                    ihevcd_cxa_ctl_getstatus_op_t *ps_op;
552
553
0
                    ps_ip = (ihevcd_cxa_ctl_getstatus_ip_t *)pv_api_ip;
554
0
                    ps_op = (ihevcd_cxa_ctl_getstatus_op_t *)pv_api_op;
555
0
                    if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size
556
0
                                    != sizeof(ihevcd_cxa_ctl_getstatus_ip_t))
557
0
                    {
558
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
559
0
                                        << IVD_UNSUPPORTEDPARAM;
560
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
561
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
562
0
                        return IV_FAIL;
563
0
                    }
564
0
                    if((ps_op->s_ivd_ctl_getstatus_op_t.u4_size
565
0
                                    != sizeof(ihevcd_cxa_ctl_getstatus_op_t)) &&
566
0
                       (ps_op->s_ivd_ctl_getstatus_op_t.u4_size
567
0
                                    != sizeof(ivd_ctl_getstatus_op_t)))
568
0
                    {
569
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
570
0
                                        << IVD_UNSUPPORTEDPARAM;
571
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
572
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
573
0
                        return IV_FAIL;
574
0
                    }
575
0
                }
576
0
                    break;
577
578
0
                case IVD_CMD_CTL_GETBUFINFO:
579
0
                {
580
0
                    ihevcd_cxa_ctl_getbufinfo_ip_t *ps_ip;
581
0
                    ihevcd_cxa_ctl_getbufinfo_op_t *ps_op;
582
0
                    ps_ip = (ihevcd_cxa_ctl_getbufinfo_ip_t *)pv_api_ip;
583
0
                    ps_op = (ihevcd_cxa_ctl_getbufinfo_op_t *)pv_api_op;
584
585
0
                    if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size
586
0
                                    != sizeof(ihevcd_cxa_ctl_getbufinfo_ip_t))
587
0
                    {
588
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
589
0
                                        << IVD_UNSUPPORTEDPARAM;
590
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
591
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
592
0
                        return IV_FAIL;
593
0
                    }
594
0
                    if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size
595
0
                                    != sizeof(ihevcd_cxa_ctl_getbufinfo_op_t))
596
0
                    {
597
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
598
0
                                        << IVD_UNSUPPORTEDPARAM;
599
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
600
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
601
0
                        return IV_FAIL;
602
0
                    }
603
0
                }
604
0
                    break;
605
606
0
                case IVD_CMD_CTL_GETVERSION:
607
0
                {
608
0
                    ihevcd_cxa_ctl_getversioninfo_ip_t *ps_ip;
609
0
                    ihevcd_cxa_ctl_getversioninfo_op_t *ps_op;
610
0
                    ps_ip = (ihevcd_cxa_ctl_getversioninfo_ip_t *)pv_api_ip;
611
0
                    ps_op = (ihevcd_cxa_ctl_getversioninfo_op_t *)pv_api_op;
612
0
                    if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size
613
0
                                    != sizeof(ihevcd_cxa_ctl_getversioninfo_ip_t))
614
0
                    {
615
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
616
0
                                        << IVD_UNSUPPORTEDPARAM;
617
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
618
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
619
0
                        return IV_FAIL;
620
0
                    }
621
0
                    if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size
622
0
                                    != sizeof(ihevcd_cxa_ctl_getversioninfo_op_t))
623
0
                    {
624
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
625
0
                                        << IVD_UNSUPPORTEDPARAM;
626
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
627
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
628
0
                        return IV_FAIL;
629
0
                    }
630
0
                }
631
0
                    break;
632
633
0
                case IVD_CMD_CTL_FLUSH:
634
0
                {
635
0
                    ihevcd_cxa_ctl_flush_ip_t *ps_ip;
636
0
                    ihevcd_cxa_ctl_flush_op_t *ps_op;
637
0
                    ps_ip = (ihevcd_cxa_ctl_flush_ip_t *)pv_api_ip;
638
0
                    ps_op = (ihevcd_cxa_ctl_flush_op_t *)pv_api_op;
639
0
                    if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size
640
0
                                    != sizeof(ihevcd_cxa_ctl_flush_ip_t))
641
0
                    {
642
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
643
0
                                        << IVD_UNSUPPORTEDPARAM;
644
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
645
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
646
0
                        return IV_FAIL;
647
0
                    }
648
0
                    if(ps_op->s_ivd_ctl_flush_op_t.u4_size
649
0
                                    != sizeof(ihevcd_cxa_ctl_flush_op_t))
650
0
                    {
651
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
652
0
                                        << IVD_UNSUPPORTEDPARAM;
653
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
654
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
655
0
                        return IV_FAIL;
656
0
                    }
657
0
                }
658
0
                    break;
659
660
3.13k
                case IVD_CMD_CTL_RESET:
661
3.13k
                {
662
3.13k
                    ihevcd_cxa_ctl_reset_ip_t *ps_ip;
663
3.13k
                    ihevcd_cxa_ctl_reset_op_t *ps_op;
664
3.13k
                    ps_ip = (ihevcd_cxa_ctl_reset_ip_t *)pv_api_ip;
665
3.13k
                    ps_op = (ihevcd_cxa_ctl_reset_op_t *)pv_api_op;
666
3.13k
                    if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size
667
3.13k
                                    != sizeof(ihevcd_cxa_ctl_reset_ip_t))
668
0
                    {
669
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
670
0
                                        << IVD_UNSUPPORTEDPARAM;
671
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
672
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
673
0
                        return IV_FAIL;
674
0
                    }
675
3.13k
                    if(ps_op->s_ivd_ctl_reset_op_t.u4_size
676
3.13k
                                    != sizeof(ihevcd_cxa_ctl_reset_op_t))
677
0
                    {
678
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
679
0
                                        << IVD_UNSUPPORTEDPARAM;
680
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
681
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
682
0
                        return IV_FAIL;
683
0
                    }
684
3.13k
                }
685
3.13k
                    break;
686
3.13k
                case IHEVCD_CXA_CMD_CTL_DEGRADE:
687
0
                {
688
0
                    ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
689
0
                    ihevcd_cxa_ctl_degrade_op_t *ps_op;
690
691
0
                    ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
692
0
                    ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
693
694
0
                    if(ps_ip->u4_size
695
0
                                    != sizeof(ihevcd_cxa_ctl_degrade_ip_t))
696
0
                    {
697
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
698
0
                        ps_op->u4_error_code |=
699
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
700
0
                        return IV_FAIL;
701
0
                    }
702
703
0
                    if(ps_op->u4_size
704
0
                                    != sizeof(ihevcd_cxa_ctl_degrade_op_t))
705
0
                    {
706
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
707
0
                        ps_op->u4_error_code |=
708
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
709
0
                        return IV_FAIL;
710
0
                    }
711
712
0
                    if((ps_ip->i4_degrade_pics < 0) ||
713
0
                       (ps_ip->i4_degrade_pics > 4) ||
714
0
                       (ps_ip->i4_nondegrade_interval < 0) ||
715
0
                       (ps_ip->i4_degrade_type < 0) ||
716
0
                       (ps_ip->i4_degrade_type > 15))
717
0
                    {
718
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
719
0
                        return IV_FAIL;
720
0
                    }
721
722
0
                    break;
723
0
                }
724
725
0
                case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
726
0
                {
727
0
                    ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
728
0
                    ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
729
730
0
                    ps_ip =
731
0
                                    (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
732
0
                    ps_op =
733
0
                                    (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
734
735
0
                    if(ps_ip->u4_size
736
0
                                    != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_ip_t))
737
0
                    {
738
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
739
0
                        ps_op->u4_error_code |=
740
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
741
0
                        return IV_FAIL;
742
0
                    }
743
744
0
                    if(ps_op->u4_size
745
0
                                    != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_op_t))
746
0
                    {
747
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
748
0
                        ps_op->u4_error_code |=
749
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
750
0
                        return IV_FAIL;
751
0
                    }
752
753
0
                    break;
754
0
                }
755
756
0
                case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
757
0
                {
758
0
                    ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
759
0
                    ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
760
761
0
                    ps_ip =
762
0
                                    (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
763
0
                    ps_op =
764
0
                                    (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
765
766
0
                    if(ps_ip->u4_size
767
0
                                    != sizeof(ihevcd_cxa_ctl_get_vui_params_ip_t))
768
0
                    {
769
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
770
0
                        ps_op->u4_error_code |=
771
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
772
0
                        return IV_FAIL;
773
0
                    }
774
775
0
                    if(ps_op->u4_size
776
0
                                    != sizeof(ihevcd_cxa_ctl_get_vui_params_op_t))
777
0
                    {
778
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
779
0
                        ps_op->u4_error_code |=
780
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
781
0
                        return IV_FAIL;
782
0
                    }
783
784
0
                    break;
785
0
                }
786
0
#ifndef DISABLE_SEI
787
0
                case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
788
0
                {
789
0
                    ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
790
0
                    ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
791
792
0
                    ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
793
0
                    ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
794
795
0
                    if(ps_ip->u4_size
796
0
                                    != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_ip_t))
797
0
                    {
798
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
799
0
                        ps_op->u4_error_code |=
800
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
801
0
                        return IV_FAIL;
802
0
                    }
803
804
0
                    if(ps_op->u4_size
805
0
                                    != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_op_t))
806
0
                    {
807
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
808
0
                        ps_op->u4_error_code |=
809
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
810
0
                        return IV_FAIL;
811
0
                    }
812
813
0
                    break;
814
0
                }
815
0
#endif
816
4.16k
                case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
817
4.16k
                {
818
4.16k
                    ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
819
4.16k
                    ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
820
821
4.16k
                    ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
822
4.16k
                    ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
823
824
4.16k
                    if(ps_ip->u4_size
825
4.16k
                                    != sizeof(ihevcd_cxa_ctl_set_num_cores_ip_t))
826
0
                    {
827
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
828
0
                        ps_op->u4_error_code |=
829
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
830
0
                        return IV_FAIL;
831
0
                    }
832
833
4.16k
                    if(ps_op->u4_size
834
4.16k
                                    != sizeof(ihevcd_cxa_ctl_set_num_cores_op_t))
835
0
                    {
836
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
837
0
                        ps_op->u4_error_code |=
838
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
839
0
                        return IV_FAIL;
840
0
                    }
841
842
4.16k
                    if((ps_ip->u4_num_cores < 1) || (ps_ip->u4_num_cores > MAX_NUM_CORES))
843
0
                    {
844
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
845
0
                        return IV_FAIL;
846
0
                    }
847
4.16k
                    break;
848
4.16k
                }
849
4.16k
                case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
850
4.16k
                {
851
4.16k
                    ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
852
4.16k
                    ihevcd_cxa_ctl_set_processor_op_t *ps_op;
853
854
4.16k
                    ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
855
4.16k
                    ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
856
857
4.16k
                    if(ps_ip->u4_size
858
4.16k
                                    != sizeof(ihevcd_cxa_ctl_set_processor_ip_t))
859
0
                    {
860
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
861
0
                        ps_op->u4_error_code |=
862
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
863
0
                        return IV_FAIL;
864
0
                    }
865
866
4.16k
                    if(ps_op->u4_size
867
4.16k
                                    != sizeof(ihevcd_cxa_ctl_set_processor_op_t))
868
0
                    {
869
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
870
0
                        ps_op->u4_error_code |=
871
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
872
0
                        return IV_FAIL;
873
0
                    }
874
875
4.16k
                    break;
876
4.16k
                }
877
4.16k
                default:
878
0
                    *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
879
0
                    *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
880
0
                    return IV_FAIL;
881
19.8k
            }
882
19.8k
        }
883
19.8k
            break;
884
19.8k
        default:
885
0
            *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
886
0
            *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
887
0
            return IV_FAIL;
888
200k
    }
889
890
200k
    return IV_SUCCESS;
891
200k
}
892
893
894
/**
895
*******************************************************************************
896
*
897
* @brief
898
*  Sets default dynamic parameters
899
*
900
* @par Description:
901
*  Sets default dynamic parameters. Will be called in ihevcd_init() to ensure
902
* that even if set_params is not called, codec  continues to work
903
*
904
* @param[in] ps_codec_obj
905
*  Pointer to codec object at API level
906
*
907
* @param[in] pv_api_ip
908
*  Pointer to input argument structure
909
*
910
* @param[out] pv_api_op
911
*  Pointer to output argument structure
912
*
913
* @returns  Status
914
*
915
* @remarks
916
*
917
*
918
*******************************************************************************
919
*/
920
WORD32 ihevcd_set_default_params(codec_t *ps_codec)
921
7.57k
{
922
923
7.57k
    WORD32 ret = IV_SUCCESS;
924
925
7.57k
    ps_codec->e_pic_skip_mode = IVD_SKIP_NONE;
926
7.57k
    ps_codec->i4_strd = 0;
927
7.57k
    ps_codec->i4_disp_strd = 0;
928
7.57k
    ps_codec->i4_header_mode = 0;
929
7.57k
    ps_codec->e_pic_out_order = IVD_DISPLAY_FRAME_OUT;
930
7.57k
    return ret;
931
7.57k
}
932
933
void ihevcd_update_function_ptr(codec_t *ps_codec)
934
11.7k
{
935
936
    /* Init inter pred function array */
937
11.7k
    ps_codec->apf_inter_pred[0] = NULL;
938
11.7k
    ps_codec->apf_inter_pred[1] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_fptr;
939
11.7k
    ps_codec->apf_inter_pred[2] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_fptr;
940
11.7k
    ps_codec->apf_inter_pred[3] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_fptr;
941
11.7k
    ps_codec->apf_inter_pred[4] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
942
11.7k
    ps_codec->apf_inter_pred[5] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_w16out_fptr;
943
11.7k
    ps_codec->apf_inter_pred[6] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16out_fptr;
944
11.7k
    ps_codec->apf_inter_pred[7] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
945
11.7k
    ps_codec->apf_inter_pred[8] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
946
11.7k
    ps_codec->apf_inter_pred[9] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_fptr;
947
11.7k
    ps_codec->apf_inter_pred[10] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_w16out_fptr;
948
11.7k
    ps_codec->apf_inter_pred[11] = NULL;
949
11.7k
    ps_codec->apf_inter_pred[12] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_fptr;
950
11.7k
    ps_codec->apf_inter_pred[13] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_fptr;
951
11.7k
    ps_codec->apf_inter_pred[14] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_fptr;
952
11.7k
    ps_codec->apf_inter_pred[15] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
953
11.7k
    ps_codec->apf_inter_pred[16] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_w16out_fptr;
954
11.7k
    ps_codec->apf_inter_pred[17] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16out_fptr;
955
11.7k
    ps_codec->apf_inter_pred[18] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
956
11.7k
    ps_codec->apf_inter_pred[19] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
957
11.7k
    ps_codec->apf_inter_pred[20] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_fptr;
958
11.7k
    ps_codec->apf_inter_pred[21] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_w16out_fptr;
959
960
    /* Init intra pred function array */
961
11.7k
    ps_codec->apf_intra_pred_luma[0] = (pf_intra_pred)NULL;
962
11.7k
    ps_codec->apf_intra_pred_luma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_planar_fptr;
963
11.7k
    ps_codec->apf_intra_pred_luma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_dc_fptr;
964
11.7k
    ps_codec->apf_intra_pred_luma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode2_fptr;
965
11.7k
    ps_codec->apf_intra_pred_luma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_3_to_9_fptr;
966
11.7k
    ps_codec->apf_intra_pred_luma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_horz_fptr;
967
11.7k
    ps_codec->apf_intra_pred_luma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_11_to_17_fptr;
968
11.7k
    ps_codec->apf_intra_pred_luma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_18_34_fptr;
969
11.7k
    ps_codec->apf_intra_pred_luma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_19_to_25_fptr;
970
11.7k
    ps_codec->apf_intra_pred_luma[9] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_ver_fptr;
971
11.7k
    ps_codec->apf_intra_pred_luma[10] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_27_to_33_fptr;
972
973
11.7k
    ps_codec->apf_intra_pred_chroma[0] = (pf_intra_pred)NULL;
974
11.7k
    ps_codec->apf_intra_pred_chroma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_planar_fptr;
975
11.7k
    ps_codec->apf_intra_pred_chroma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_dc_fptr;
976
11.7k
    ps_codec->apf_intra_pred_chroma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode2_fptr;
977
11.7k
    ps_codec->apf_intra_pred_chroma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_3_to_9_fptr;
978
11.7k
    ps_codec->apf_intra_pred_chroma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_horz_fptr;
979
11.7k
    ps_codec->apf_intra_pred_chroma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_11_to_17_fptr;
980
11.7k
    ps_codec->apf_intra_pred_chroma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_18_34_fptr;
981
11.7k
    ps_codec->apf_intra_pred_chroma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_19_to_25_fptr;
982
11.7k
    ps_codec->apf_intra_pred_chroma[9] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_ver_fptr;
983
11.7k
    ps_codec->apf_intra_pred_chroma[10] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_27_to_33_fptr;
984
985
    /* Init itrans_recon function array */
986
11.7k
    ps_codec->apf_itrans_recon[0] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_ttype1_fptr;
987
11.7k
    ps_codec->apf_itrans_recon[1] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_fptr;
988
11.7k
    ps_codec->apf_itrans_recon[2] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_8x8_fptr;
989
11.7k
    ps_codec->apf_itrans_recon[3] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_16x16_fptr;
990
11.7k
    ps_codec->apf_itrans_recon[4] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_32x32_fptr;
991
11.7k
    ps_codec->apf_itrans_recon[5] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_4x4_fptr;
992
11.7k
    ps_codec->apf_itrans_recon[6] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_8x8_fptr;
993
11.7k
    ps_codec->apf_itrans_recon[7] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_16x16_fptr;
994
995
    /* Init recon function array */
996
11.7k
    ps_codec->apf_recon[0] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_ttype1_fptr;
997
11.7k
    ps_codec->apf_recon[1] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_fptr;
998
11.7k
    ps_codec->apf_recon[2] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_8x8_fptr;
999
11.7k
    ps_codec->apf_recon[3] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_16x16_fptr;
1000
11.7k
    ps_codec->apf_recon[4] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_32x32_fptr;
1001
11.7k
    ps_codec->apf_recon[5] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_4x4_fptr;
1002
11.7k
    ps_codec->apf_recon[6] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_8x8_fptr;
1003
11.7k
    ps_codec->apf_recon[7] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_16x16_fptr;
1004
1005
    /* Init itrans_recon_dc function array */
1006
11.7k
    ps_codec->apf_itrans_recon_dc[0] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_luma_fptr;
1007
11.7k
    ps_codec->apf_itrans_recon_dc[1] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_chroma_fptr;
1008
1009
    /* Init sao function array */
1010
11.7k
    ps_codec->apf_sao_luma[0] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_fptr;
1011
11.7k
    ps_codec->apf_sao_luma[1] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_fptr;
1012
11.7k
    ps_codec->apf_sao_luma[2] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_fptr;
1013
11.7k
    ps_codec->apf_sao_luma[3] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_fptr;
1014
1015
11.7k
    ps_codec->apf_sao_chroma[0] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_chroma_fptr;
1016
11.7k
    ps_codec->apf_sao_chroma[1] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_chroma_fptr;
1017
11.7k
    ps_codec->apf_sao_chroma[2] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_chroma_fptr;
1018
11.7k
    ps_codec->apf_sao_chroma[3] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_chroma_fptr;
1019
11.7k
}
1020
/**
1021
*******************************************************************************
1022
*
1023
* @brief
1024
*  Initialize the context. This will be called by  create and during
1025
* reset
1026
*
1027
* @par Description:
1028
*  Initializes the context
1029
*
1030
* @param[in] ps_codec
1031
*  Codec context pointer
1032
*
1033
* @returns  Status
1034
*
1035
* @remarks
1036
*
1037
*
1038
*******************************************************************************
1039
*/
1040
WORD32 ihevcd_init(codec_t *ps_codec)
1041
7.57k
{
1042
7.57k
    WORD32 status = IV_SUCCESS;
1043
7.57k
    WORD32 i;
1044
1045
    /* Free any dynamic buffers that are allocated */
1046
7.57k
    ihevcd_free_dynamic_bufs(ps_codec);
1047
1048
7.57k
    ps_codec->u4_allocate_dynamic_done = 0;
1049
7.57k
    ps_codec->i4_num_disp_bufs = 1;
1050
7.57k
    ps_codec->i4_flush_mode = 0;
1051
1052
7.57k
    ps_codec->i4_ht = ps_codec->i4_disp_ht = 0;
1053
7.57k
    ps_codec->i4_wd = ps_codec->i4_disp_wd = 0;
1054
7.57k
    ps_codec->i4_strd = 0;
1055
7.57k
    ps_codec->i4_disp_strd = 0;
1056
7.57k
    ps_codec->i4_num_cores = 1;
1057
1058
7.57k
    ps_codec->u4_pic_cnt = 0;
1059
7.57k
    ps_codec->u4_disp_cnt = 0;
1060
1061
7.57k
    ps_codec->i4_header_mode = 0;
1062
7.57k
    ps_codec->i4_header_in_slice_mode = 0;
1063
7.57k
    ps_codec->i4_sps_done = 0;
1064
7.57k
    ps_codec->i4_pps_done = 0;
1065
7.57k
    ps_codec->i4_init_done   = 1;
1066
7.57k
    ps_codec->i4_first_pic_done = 0;
1067
7.57k
    ps_codec->s_parse.i4_first_pic_init = 0;
1068
7.57k
    ps_codec->i4_error_code = 0;
1069
7.57k
    ps_codec->i4_reset_flag = 0;
1070
7.57k
    ps_codec->i4_cra_as_first_pic = 1;
1071
7.57k
    ps_codec->i4_rasl_output_flag = 0;
1072
1073
7.57k
    ps_codec->i4_prev_poc_msb = 0;
1074
7.57k
    ps_codec->i4_prev_poc_lsb = -1;
1075
7.57k
    ps_codec->i4_max_prev_poc_lsb = -1;
1076
7.57k
    ps_codec->s_parse.i4_abs_pic_order_cnt = -1;
1077
1078
    /* Set ref chroma format by default to 420SP UV interleaved */
1079
7.57k
    ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_UV;
1080
1081
    /* If the codec is in shared mode and required format is 420 SP VU interleaved then change
1082
     * reference buffers chroma format
1083
     */
1084
7.57k
    if(IV_YUV_420SP_VU == ps_codec->e_chroma_fmt)
1085
813
    {
1086
813
        ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_VU;
1087
813
    }
1088
1089
1090
1091
7.57k
    ps_codec->i4_disable_deblk_pic = 0;
1092
1093
7.57k
    ps_codec->i4_degrade_pic_cnt    = 0;
1094
7.57k
    ps_codec->i4_degrade_pics       = 0;
1095
7.57k
    ps_codec->i4_degrade_type       = 0;
1096
7.57k
    ps_codec->i4_disable_sao_pic    = 0;
1097
7.57k
    ps_codec->i4_fullpel_inter_pred = 0;
1098
7.57k
    ps_codec->u4_enable_fmt_conv_ahead = 0;
1099
7.57k
    ps_codec->i4_share_disp_buf_cnt = 0;
1100
1101
7.57k
    {
1102
7.57k
        sps_t *ps_sps = ps_codec->ps_sps_base;
1103
7.57k
        pps_t *ps_pps = ps_codec->ps_pps_base;
1104
1105
136k
        for(i = 0; i < MAX_SPS_CNT; i++)
1106
128k
        {
1107
128k
            ps_sps->i1_sps_valid = 0;
1108
128k
            ps_sps++;
1109
128k
        }
1110
1111
499k
        for(i = 0; i < MAX_PPS_CNT; i++)
1112
492k
        {
1113
492k
            ps_pps->i1_pps_valid = 0;
1114
492k
            ps_pps++;
1115
492k
        }
1116
7.57k
    }
1117
1118
7.57k
    ihevcd_set_default_params(ps_codec);
1119
    /* Initialize MV Bank buffer manager */
1120
7.57k
    ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_mv_buf_mgr);
1121
1122
    /* Initialize Picture buffer manager */
1123
7.57k
    ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_pic_buf_mgr);
1124
1125
7.57k
    ps_codec->ps_pic_buf = (pic_buf_t *)ps_codec->pv_pic_buf_base;
1126
1127
7.57k
    memset(ps_codec->ps_pic_buf, 0, BUF_MGR_MAX_CNT  * sizeof(pic_buf_t));
1128
1129
1130
1131
    /* Initialize display buffer manager */
1132
7.57k
    ihevc_disp_mgr_init((disp_mgr_t *)ps_codec->pv_disp_buf_mgr);
1133
1134
    /* Initialize dpb manager */
1135
7.57k
    ihevc_dpb_mgr_init((dpb_mgr_t *)ps_codec->pv_dpb_mgr);
1136
1137
7.57k
    ps_codec->e_processor_soc = SOC_GENERIC;
1138
    /* The following can be over-ridden using soc parameter as a hack */
1139
7.57k
    ps_codec->u4_nctb = 0x7FFFFFFF;
1140
7.57k
    ihevcd_init_arch(ps_codec);
1141
1142
7.57k
    ihevcd_init_function_ptr(ps_codec);
1143
1144
7.57k
    ihevcd_update_function_ptr(ps_codec);
1145
1146
7.57k
    return status;
1147
7.57k
}
1148
1149
/**
1150
*******************************************************************************
1151
*
1152
* @brief
1153
*  Allocate static memory for the codec
1154
*
1155
* @par Description:
1156
*  Allocates static memory for the codec
1157
*
1158
* @param[in] pv_api_ip
1159
*  Pointer to input argument structure
1160
*
1161
* @param[out] pv_api_op
1162
*  Pointer to output argument structure
1163
*
1164
* @returns  Status
1165
*
1166
* @remarks
1167
*
1168
*
1169
*******************************************************************************
1170
*/
1171
WORD32 ihevcd_allocate_static_bufs(iv_obj_t **pps_codec_obj,
1172
                                   ihevcd_cxa_create_ip_t *ps_create_ip,
1173
                                   ihevcd_cxa_create_op_t *ps_create_op)
1174
4.16k
{
1175
4.16k
    WORD32 size;
1176
4.16k
    void *pv_buf;
1177
4.16k
    UWORD8 *pu1_buf;
1178
4.16k
    WORD32 i;
1179
4.16k
    codec_t *ps_codec;
1180
4.16k
    IV_API_CALL_STATUS_T status = IV_SUCCESS;
1181
4.16k
    void *(*pf_aligned_alloc)(void *pv_mem_ctxt, WORD32 alignment, WORD32 size);
1182
4.16k
    void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1183
4.16k
    void *pv_mem_ctxt;
1184
1185
    /* Request memory for HEVCD object */
1186
4.16k
    ps_create_op->s_ivd_create_op_t.pv_handle = NULL;
1187
1188
4.16k
    pf_aligned_alloc = ps_create_ip->s_ivd_create_ip_t.pf_aligned_alloc;
1189
4.16k
    pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
1190
4.16k
    pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
1191
1192
1193
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(iv_obj_t));
1194
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1195
4.16k
    memset(pv_buf, 0, sizeof(iv_obj_t));
1196
4.16k
    *pps_codec_obj = (iv_obj_t *)pv_buf;
1197
4.16k
    ps_create_op->s_ivd_create_op_t.pv_handle = *pps_codec_obj;
1198
1199
1200
4.16k
    (*pps_codec_obj)->pv_codec_handle = NULL;
1201
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(codec_t));
1202
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1203
4.16k
    (*pps_codec_obj)->pv_codec_handle = (codec_t *)pv_buf;
1204
4.16k
    ps_codec = (codec_t *)pv_buf;
1205
1206
4.16k
    memset(ps_codec, 0, sizeof(codec_t));
1207
1208
4.16k
#ifndef LOGO_EN
1209
4.16k
    ps_codec->i4_share_disp_buf = ps_create_ip->s_ivd_create_ip_t.u4_share_disp_buf;
1210
#else
1211
    ps_codec->i4_share_disp_buf = 0;
1212
#endif
1213
1214
    /* Shared display mode is supported only for 420SP and 420P formats */
1215
4.16k
    if((ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P) &&
1216
2.89k
       (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_UV) &&
1217
1.97k
       (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_VU))
1218
1.54k
    {
1219
1.54k
        ps_codec->i4_share_disp_buf = 0;
1220
1.54k
    }
1221
1222
4.16k
    if (ps_create_ip->s_ivd_create_ip_t.u4_size == sizeof(ihevcd_cxa_create_ip_t))
1223
4.16k
    {
1224
4.16k
        ps_codec->u1_enable_cu_info = ps_create_ip->u4_enable_frame_info;
1225
4.16k
    }
1226
1227
4.16k
    ps_codec->e_chroma_fmt = ps_create_ip->s_ivd_create_ip_t.e_output_format;
1228
1229
4.16k
    ps_codec->pf_aligned_alloc = pf_aligned_alloc;
1230
4.16k
    ps_codec->pf_aligned_free = pf_aligned_free;
1231
4.16k
    ps_codec->pv_mem_ctxt = pv_mem_ctxt;
1232
4.16k
    ps_codec->i4_threads_active = ps_create_ip->u4_keep_threads_active;
1233
1234
    /* Request memory to hold thread handles for each processing thread */
1235
4.16k
    size = MAX_PROCESS_THREADS * ithread_get_handle_size();
1236
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1237
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1238
4.16k
    memset(pv_buf, 0, size);
1239
1240
37.5k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
1241
33.3k
    {
1242
33.3k
        WORD32 handle_size = ithread_get_handle_size();
1243
33.3k
        ps_codec->apv_process_thread_handle[i] =
1244
33.3k
                        (UWORD8 *)pv_buf + (i * handle_size);
1245
33.3k
    }
1246
1247
4.16k
    if(ps_codec->i4_threads_active)
1248
4.16k
    {
1249
        /* Request memory to hold mutex (start/done) for each processing thread */
1250
4.16k
        size = 2 * MAX_PROCESS_THREADS * ithread_get_mutex_lock_size();
1251
4.16k
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1252
4.16k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
1253
4.16k
        memset(pv_buf, 0, size);
1254
1255
37.5k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1256
33.3k
        {
1257
33.3k
            WORD32 ret;
1258
33.3k
            WORD32 mutex_size = ithread_get_mutex_lock_size();
1259
33.3k
            ps_codec->apv_proc_start_mutex[i] =
1260
33.3k
                            (UWORD8 *)pv_buf + (2 * i * mutex_size);
1261
33.3k
            ps_codec->apv_proc_done_mutex[i] =
1262
33.3k
                            (UWORD8 *)pv_buf + ((2 * i + 1) * mutex_size);
1263
1264
33.3k
            ret = ithread_mutex_init(ps_codec->apv_proc_start_mutex[i]);
1265
33.3k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1266
1267
33.3k
            ret = ithread_mutex_init(ps_codec->apv_proc_done_mutex[i]);
1268
33.3k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1269
33.3k
        }
1270
1271
4.16k
        size = 2 * MAX_PROCESS_THREADS * ithread_get_cond_struct_size();
1272
4.16k
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1273
4.16k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
1274
4.16k
        memset(pv_buf, 0, size);
1275
1276
37.5k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1277
33.3k
        {
1278
33.3k
            WORD32 ret;
1279
33.3k
            WORD32 cond_size = ithread_get_cond_struct_size();
1280
33.3k
            ps_codec->apv_proc_start_condition[i] =
1281
33.3k
                            (UWORD8 *)pv_buf + (2 * i * cond_size);
1282
33.3k
            ps_codec->apv_proc_done_condition[i] =
1283
33.3k
                            (UWORD8 *)pv_buf + ((2 * i + 1) * cond_size);
1284
1285
33.3k
            ret = ithread_cond_init(ps_codec->apv_proc_start_condition[i]);
1286
33.3k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1287
1288
33.3k
            ret = ithread_cond_init(ps_codec->apv_proc_done_condition[i]);
1289
33.3k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1290
33.3k
        }
1291
4.16k
    }
1292
1293
    /* Request memory for static bitstream buffer which holds bitstream after emulation prevention */
1294
4.16k
    size = MIN_BITSBUF_SIZE;
1295
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size + 16); //Alloc extra for parse optimization
1296
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1297
4.16k
    memset(pv_buf, 0, size + 16);
1298
4.16k
    ps_codec->pu1_bitsbuf_static = pv_buf;
1299
4.16k
    ps_codec->u4_bitsbuf_size_static = size;
1300
1301
    /* size for holding display manager context */
1302
4.16k
    size = sizeof(buf_mgr_t);
1303
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1304
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1305
4.16k
    memset(pv_buf, 0, size);
1306
4.16k
    ps_codec->pv_disp_buf_mgr = pv_buf;
1307
1308
    /* size for holding dpb manager context */
1309
4.16k
    size = sizeof(dpb_mgr_t);
1310
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1311
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1312
4.16k
    memset(pv_buf, 0, size);
1313
4.16k
    ps_codec->pv_dpb_mgr = pv_buf;
1314
1315
    /* size for holding buffer manager context */
1316
4.16k
    size = sizeof(buf_mgr_t);
1317
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1318
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1319
4.16k
    memset(pv_buf, 0, size);
1320
4.16k
    ps_codec->pv_pic_buf_mgr = pv_buf;
1321
1322
    /* size for holding mv buffer manager context */
1323
4.16k
    size = sizeof(buf_mgr_t);
1324
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1325
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1326
4.16k
    memset(pv_buf, 0, size);
1327
4.16k
    ps_codec->pv_mv_buf_mgr = pv_buf;
1328
1329
4.16k
    size = MAX_VPS_CNT * sizeof(vps_t);
1330
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1331
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1332
4.16k
    memset(pv_buf, 0, size);
1333
4.16k
    ps_codec->ps_vps_base = pv_buf;
1334
4.16k
    ps_codec->s_parse.ps_vps_base = ps_codec->ps_vps_base;
1335
1336
4.16k
    size = MAX_SPS_CNT * sizeof(sps_t);
1337
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1338
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1339
4.16k
    memset(pv_buf, 0, size);
1340
4.16k
    ps_codec->ps_sps_base = pv_buf;
1341
4.16k
    ps_codec->s_parse.ps_sps_base = ps_codec->ps_sps_base;
1342
1343
4.16k
    size = MAX_PPS_CNT * sizeof(pps_t);
1344
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1345
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1346
4.16k
    memset(pv_buf, 0, size);
1347
4.16k
    ps_codec->ps_pps_base = pv_buf;
1348
4.16k
    ps_codec->s_parse.ps_pps_base = ps_codec->ps_pps_base;
1349
1350
4.16k
    size = MAX_SLICE_HDR_CNT * sizeof(slice_header_t);
1351
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1352
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1353
4.16k
    memset(pv_buf, 0, size);
1354
4.16k
    ps_codec->ps_slice_hdr_base = (slice_header_t *)pv_buf;
1355
4.16k
    ps_codec->s_parse.ps_slice_hdr_base = ps_codec->ps_slice_hdr_base;
1356
1357
1358
4.16k
    SCALING_MAT_SIZE(size)
1359
4.16k
    size = (MAX_SPS_CNT + MAX_PPS_CNT) * size * sizeof(WORD16);
1360
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1361
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1362
4.16k
    memset(pv_buf, 0, size);
1363
4.16k
    ps_codec->pi2_scaling_mat = (WORD16 *)pv_buf;
1364
1365
1366
    /* Size for holding pic_buf_t for each reference picture
1367
     * Since this is only a structure allocation and not actual buffer allocation,
1368
     * it is allocated for BUF_MGR_MAX_CNT entries
1369
     */
1370
4.16k
    size = BUF_MGR_MAX_CNT * sizeof(pic_buf_t);
1371
4.16k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1372
4.16k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1373
4.16k
    memset(pv_buf, 0, size);
1374
4.16k
    ps_codec->pv_pic_buf_base = (UWORD8 *)pv_buf;
1375
1376
    /* TO hold scratch buffers needed for each SAO context */
1377
4.16k
    size = 4 * MAX_CTB_SIZE * MAX_CTB_SIZE;
1378
1379
    /* 2 temporary buffers*/
1380
4.16k
    size *= 2;
1381
4.16k
    size *= MAX_PROCESS_THREADS;
1382
1383
4.16k
    pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1384
4.16k
    RETURN_IF((NULL == pu1_buf), IV_FAIL);
1385
4.16k
    memset(pu1_buf, 0, size);
1386
1387
37.5k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
1388
33.3k
    {
1389
33.3k
        ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_luma = (UWORD8 *)pu1_buf;
1390
33.3k
        pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1391
1392
33.3k
        ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_chroma = (UWORD8 *)pu1_buf;
1393
33.3k
        pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1394
33.3k
    }
1395
1396
    /* Allocate intra pred modes buffer */
1397
    /* 8 bits per 4x4 */
1398
    /* 16 bytes each for top and left 64 pixels and 16 bytes for default mode */
1399
4.16k
    size =  3 * 16 * sizeof(UWORD8);
1400
4.16k
    pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1401
4.16k
    RETURN_IF((NULL == pu1_buf), IV_FAIL);
1402
4.16k
    memset(pu1_buf, 0, size);
1403
4.16k
    ps_codec->s_parse.pu1_luma_intra_pred_mode_left = pu1_buf;
1404
4.16k
    ps_codec->s_parse.pu1_luma_intra_pred_mode_top  = pu1_buf + 16;
1405
1406
4.16k
    {
1407
4.16k
        WORD32 inter_pred_tmp_buf_size, ntaps_luma;
1408
4.16k
        WORD32 pic_pu_idx_map_size;
1409
1410
        /* Max inter pred size */
1411
4.16k
        ntaps_luma = 8;
1412
4.16k
        inter_pred_tmp_buf_size = sizeof(WORD16) * (MAX_CTB_SIZE + ntaps_luma) * MAX_CTB_SIZE;
1413
1414
4.16k
        inter_pred_tmp_buf_size = ALIGN64(inter_pred_tmp_buf_size);
1415
1416
        /* To hold pu_index w.r.t. frame level pu_t array for a CTB */
1417
4.16k
        pic_pu_idx_map_size = sizeof(WORD32) * (18 * 18);
1418
4.16k
        pic_pu_idx_map_size = ALIGN64(pic_pu_idx_map_size);
1419
1420
4.16k
        size =  inter_pred_tmp_buf_size * 2;
1421
4.16k
        size += pic_pu_idx_map_size;
1422
4.16k
        size *= MAX_PROCESS_THREADS;
1423
1424
4.16k
        pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1425
4.16k
        RETURN_IF((NULL == pu1_buf), IV_FAIL);
1426
4.16k
        memset(pu1_buf, 0, size);
1427
1428
37.5k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1429
33.3k
        {
1430
33.3k
            ps_codec->as_process[i].pi2_inter_pred_tmp_buf1 = (WORD16 *)pu1_buf;
1431
33.3k
            pu1_buf += inter_pred_tmp_buf_size;
1432
1433
33.3k
            ps_codec->as_process[i].pi2_inter_pred_tmp_buf2 = (WORD16 *)pu1_buf;
1434
33.3k
            pu1_buf += inter_pred_tmp_buf_size;
1435
1436
            /* Inverse transform intermediate and inverse scan output buffers reuse inter pred scratch buffers */
1437
33.3k
            ps_codec->as_process[i].pi2_itrans_intrmd_buf =
1438
33.3k
                            ps_codec->as_process[i].pi2_inter_pred_tmp_buf2;
1439
33.3k
            ps_codec->as_process[i].pi2_invscan_out =
1440
33.3k
                            ps_codec->as_process[i].pi2_inter_pred_tmp_buf1;
1441
1442
33.3k
            ps_codec->as_process[i].pu4_pic_pu_idx_map = (UWORD32 *)pu1_buf;
1443
33.3k
            ps_codec->as_process[i].s_bs_ctxt.pu4_pic_pu_idx_map =
1444
33.3k
                            (UWORD32 *)pu1_buf;
1445
33.3k
            pu1_buf += pic_pu_idx_map_size;
1446
1447
            //   ps_codec->as_process[i].pi2_inter_pred_tmp_buf3 = (WORD16 *)pu1_buf;
1448
            //   pu1_buf += inter_pred_tmp_buf_size;
1449
1450
33.3k
            ps_codec->as_process[i].i4_inter_pred_tmp_buf_strd = MAX_CTB_SIZE;
1451
1452
33.3k
        }
1453
4.16k
    }
1454
    /* Initialize pointers in PPS structures */
1455
0
    {
1456
4.16k
        sps_t *ps_sps = ps_codec->ps_sps_base;
1457
4.16k
        pps_t *ps_pps = ps_codec->ps_pps_base;
1458
4.16k
        WORD16 *pi2_scaling_mat =  ps_codec->pi2_scaling_mat;
1459
4.16k
        WORD32 scaling_mat_size;
1460
1461
4.16k
        SCALING_MAT_SIZE(scaling_mat_size);
1462
1463
75.0k
        for(i = 0; i < MAX_SPS_CNT; i++)
1464
70.8k
        {
1465
70.8k
            ps_sps->pi2_scaling_mat  = pi2_scaling_mat;
1466
70.8k
            pi2_scaling_mat += scaling_mat_size;
1467
70.8k
            ps_sps++;
1468
70.8k
        }
1469
1470
275k
        for(i = 0; i < MAX_PPS_CNT; i++)
1471
270k
        {
1472
270k
            ps_pps->pi2_scaling_mat  = pi2_scaling_mat;
1473
270k
            pi2_scaling_mat += scaling_mat_size;
1474
270k
            ps_pps++;
1475
270k
        }
1476
4.16k
    }
1477
1478
4.16k
    return (status);
1479
4.16k
}
1480
1481
WORD32 ihevcd_join_threads(codec_t *ps_codec)
1482
7.30k
{
1483
7.30k
    if(ps_codec->i4_threads_active)
1484
7.30k
    {
1485
7.30k
        int i;
1486
        /* Wait for threads */
1487
7.30k
        ps_codec->i4_break_threads = 1;
1488
1489
65.7k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1490
58.4k
        {
1491
58.4k
            WORD32 ret;
1492
58.4k
            if(ps_codec->ai4_process_thread_created[i])
1493
3.70k
            {
1494
3.70k
                ret = ithread_mutex_lock(ps_codec->apv_proc_start_mutex[i]);
1495
3.70k
                RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1496
1497
3.70k
                ps_codec->ai4_process_start[i] = 1;
1498
3.70k
                ret = ithread_cond_signal(ps_codec->apv_proc_start_condition[i]);
1499
3.70k
                RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1500
1501
3.70k
                ret = ithread_mutex_unlock(ps_codec->apv_proc_start_mutex[i]);
1502
3.70k
                RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1503
1504
3.70k
                ithread_join(ps_codec->apv_process_thread_handle[i], NULL);
1505
1506
3.70k
                ps_codec->ai4_process_thread_created[i] = 0;
1507
3.70k
            }
1508
58.4k
        }
1509
7.30k
    }
1510
7.30k
    return IV_SUCCESS;
1511
7.30k
}
1512
/**
1513
*******************************************************************************
1514
*
1515
* @brief
1516
*  Free static memory for the codec
1517
*
1518
* @par Description:
1519
*  Free static memory for the codec
1520
*
1521
* @param[in] ps_codec
1522
*  Pointer to codec context
1523
*
1524
* @returns  Status
1525
*
1526
* @remarks
1527
*
1528
*
1529
*******************************************************************************
1530
*/
1531
WORD32 ihevcd_free_static_bufs(iv_obj_t *ps_codec_obj)
1532
4.16k
{
1533
4.16k
    codec_t *ps_codec;
1534
1535
4.16k
    void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1536
4.16k
    void *pv_mem_ctxt;
1537
1538
4.16k
    ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
1539
4.16k
    pf_aligned_free = ps_codec->pf_aligned_free;
1540
4.16k
    pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1541
1542
4.16k
    if(ps_codec->i4_threads_active)
1543
4.16k
    {
1544
        /* Wait for threads */
1545
4.16k
        ihevcd_join_threads(ps_codec);
1546
1547
37.5k
        for(int i = 0; i < MAX_PROCESS_THREADS; i++)
1548
33.3k
        {
1549
33.3k
            WORD32 ret;
1550
33.3k
            ret = ithread_cond_destroy(ps_codec->apv_proc_start_condition[i]);
1551
33.3k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1552
1553
33.3k
            ret = ithread_cond_destroy(ps_codec->apv_proc_done_condition[i]);
1554
33.3k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1555
1556
33.3k
            ret = ithread_mutex_destroy(ps_codec->apv_proc_start_mutex[i]);
1557
33.3k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1558
1559
33.3k
            ret = ithread_mutex_destroy(ps_codec->apv_proc_done_mutex[i]);
1560
33.3k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1561
33.3k
        }
1562
4.16k
        ALIGNED_FREE(ps_codec, ps_codec->apv_proc_start_mutex[0]);
1563
4.16k
        ALIGNED_FREE(ps_codec, ps_codec->apv_proc_start_condition[0]);
1564
4.16k
    }
1565
1566
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->apv_process_thread_handle[0]);
1567
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_static);
1568
1569
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->pv_disp_buf_mgr);
1570
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->pv_dpb_mgr);
1571
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_mgr);
1572
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->pv_mv_buf_mgr);
1573
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->ps_vps_base);
1574
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->ps_sps_base);
1575
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->ps_pps_base);
1576
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->ps_slice_hdr_base);
1577
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->pi2_scaling_mat);
1578
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_base);
1579
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu1_luma_intra_pred_mode_left);
1580
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_tmp_buf_luma);
1581
4.16k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pi2_inter_pred_tmp_buf1);
1582
4.16k
    ALIGNED_FREE(ps_codec, ps_codec_obj->pv_codec_handle);
1583
1584
4.16k
    if(ps_codec_obj)
1585
4.16k
    {
1586
4.16k
        pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
1587
4.16k
    }
1588
1589
4.16k
    return IV_SUCCESS;
1590
1591
4.16k
}
1592
1593
1594
/**
1595
*******************************************************************************
1596
*
1597
* @brief
1598
*  Allocate dynamic memory for the codec
1599
*
1600
* @par Description:
1601
*  Allocates dynamic memory for the codec
1602
*
1603
* @param[in] ps_codec
1604
*  Pointer to codec context
1605
*
1606
* @returns  Status
1607
*
1608
* @remarks
1609
*
1610
*
1611
*******************************************************************************
1612
*/
1613
WORD32 ihevcd_allocate_dynamic_bufs(codec_t *ps_codec)
1614
7.10k
{
1615
7.10k
    WORD32 max_tile_cols, max_tile_rows;
1616
7.10k
    WORD32 max_ctb_rows, max_ctb_cols;
1617
7.10k
    WORD32 max_num_cu_cols;
1618
7.10k
    WORD32 max_num_cu_rows;
1619
7.10k
    WORD32 max_num_4x4_cols;
1620
7.10k
    WORD32 max_ctb_cnt;
1621
7.10k
    WORD32 wd;
1622
7.10k
    WORD32 ht;
1623
7.10k
    WORD32 i;
1624
7.10k
    WORD32 max_dpb_size;
1625
7.10k
    void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1626
7.10k
    void *pv_buf;
1627
7.10k
    UWORD8 *pu1_buf;
1628
7.10k
    WORD32 size;
1629
1630
7.10k
    wd = ALIGN64(ps_codec->i4_wd);
1631
7.10k
    ht = ALIGN64(ps_codec->i4_ht);
1632
1633
7.10k
    max_tile_cols = (wd + MIN_TILE_WD - 1) / MIN_TILE_WD;
1634
7.10k
    max_tile_rows = (ht + MIN_TILE_HT - 1) / MIN_TILE_HT;
1635
7.10k
    max_ctb_rows  = ht / MIN_CTB_SIZE;
1636
7.10k
    max_ctb_cols  = wd / MIN_CTB_SIZE;
1637
7.10k
    max_ctb_cnt   = max_ctb_rows * max_ctb_cols;
1638
7.10k
    max_num_cu_cols = wd / MIN_CU_SIZE;
1639
7.10k
    max_num_cu_rows = ht / MIN_CU_SIZE;
1640
7.10k
    max_num_4x4_cols = wd / 4;
1641
1642
    /* Allocate tile structures */
1643
7.10k
    size = max_tile_cols * max_tile_rows;
1644
7.10k
    size *= sizeof(tile_t);
1645
7.10k
    size *= MAX_PPS_CNT;
1646
1647
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1648
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1649
7.10k
    memset(pv_buf, 0, size);
1650
7.10k
    ps_codec->ps_tile = (tile_t *)pv_buf;
1651
1652
1653
    /* Allocate memory to hold entry point offsets */
1654
    /* One entry point per tile */
1655
7.10k
    size = max_tile_cols * max_tile_rows;
1656
1657
    /* One entry point per row of CTBs */
1658
    /*********************************************************************/
1659
    /* Only tiles or entropy sync is enabled at a time in main           */
1660
    /* profile, but since memory required does not increase too much,    */
1661
    /* this allocation is done to handle both cases                      */
1662
    /*********************************************************************/
1663
7.10k
    size  += max_ctb_rows;
1664
7.10k
    size *= sizeof(WORD32);
1665
1666
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1667
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1668
7.10k
    memset(pv_buf, 0, size);
1669
7.10k
    ps_codec->pi4_entry_ofst = (WORD32 *)pv_buf;
1670
1671
    /* Allocate parse skip flag buffer */
1672
    /* 1 bit per 8x8 */
1673
7.10k
    size = max_num_cu_cols / 8;
1674
7.10k
    size = ALIGN4(size);
1675
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1676
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1677
7.10k
    memset(pv_buf, 0, size);
1678
7.10k
    ps_codec->s_parse.pu4_skip_cu_top = (UWORD32 *)pv_buf;
1679
1680
    /* Allocate parse coding tree depth buffer */
1681
    /* 2 bits per 8x8 */
1682
7.10k
    size =  max_num_cu_cols / 4;
1683
7.10k
    size = ALIGN4(size);
1684
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1685
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1686
7.10k
    memset(pv_buf, 0, size);
1687
7.10k
    ps_codec->s_parse.pu4_ct_depth_top = (UWORD32 *)pv_buf;
1688
1689
    /* Allocate intra flag buffer */
1690
    /* 1 bit per 8x8 */
1691
7.10k
    size =  max_num_cu_cols * max_num_cu_rows / 8;
1692
7.10k
    size = ALIGN4(size);
1693
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1694
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1695
7.10k
    memset(pv_buf, 0, size);
1696
7.10k
    ps_codec->pu1_pic_intra_flag = (UWORD8 *)pv_buf;
1697
7.10k
    ps_codec->s_parse.pu1_pic_intra_flag = ps_codec->pu1_pic_intra_flag;
1698
1699
    /* Allocate transquant bypass flag buffer */
1700
    /* 1 bit per 8x8 */
1701
    /* Extra row and column are allocated for easy processing of top and left blocks while loop filtering */
1702
7.10k
    size =  ((max_num_cu_cols + 8) * (max_num_cu_rows + 8)) / 8;
1703
7.10k
    size = ALIGN4(size);
1704
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1705
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1706
7.10k
    memset(pv_buf, 1, size);
1707
7.10k
    {
1708
7.10k
        WORD32 loop_filter_strd = (wd + 63) >> 6;
1709
7.10k
        ps_codec->pu1_pic_no_loop_filter_flag_base = pv_buf;
1710
        /* The offset is added for easy processing of top and left blocks while loop filtering */
1711
7.10k
        ps_codec->pu1_pic_no_loop_filter_flag = (UWORD8 *)pv_buf + loop_filter_strd + 1;
1712
7.10k
        ps_codec->s_parse.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1713
7.10k
        ps_codec->s_parse.s_deblk_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1714
7.10k
        ps_codec->s_parse.s_sao_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1715
7.10k
    }
1716
1717
    /* Initialize pointers in PPS structures */
1718
7.10k
    {
1719
7.10k
        pps_t *ps_pps = ps_codec->ps_pps_base;
1720
7.10k
        tile_t *ps_tile =  ps_codec->ps_tile;
1721
1722
468k
        for(i = 0; i < MAX_PPS_CNT; i++)
1723
461k
        {
1724
461k
            ps_pps->ps_tile = ps_tile;
1725
461k
            ps_tile += (max_tile_cols * max_tile_rows);
1726
461k
            ps_pps++;
1727
461k
        }
1728
1729
7.10k
    }
1730
1731
    /* Allocate memory for job queue */
1732
1733
    /* One job per row of CTBs */
1734
7.10k
    size  = max_ctb_rows;
1735
1736
    /* One each tile a row of CTBs, num_jobs has to incremented */
1737
7.10k
    size  *= max_tile_cols;
1738
1739
    /* One format convert/frame copy job per row of CTBs for non-shared mode*/
1740
7.10k
    size  += max_ctb_rows;
1741
1742
7.10k
    size *= sizeof(proc_job_t);
1743
1744
7.10k
    size += ihevcd_jobq_ctxt_size();
1745
7.10k
    size = ALIGN4(size);
1746
1747
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1748
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1749
7.10k
    memset(pv_buf, 0, size);
1750
7.10k
    ps_codec->pv_proc_jobq_buf = pv_buf;
1751
7.10k
    ps_codec->i4_proc_jobq_buf_size = size;
1752
1753
7.10k
    size =  max_ctb_cnt;
1754
7.10k
    size = ALIGN4(size);
1755
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1756
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1757
7.10k
    memset(pv_buf, 0, size);
1758
7.10k
    ps_codec->pu1_parse_map = (UWORD8 *)pv_buf;
1759
1760
7.10k
    size =  max_ctb_cnt;
1761
7.10k
    size = ALIGN4(size);
1762
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1763
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1764
7.10k
    memset(pv_buf, 0, size);
1765
7.10k
    ps_codec->pu1_proc_map = (UWORD8 *)pv_buf;
1766
1767
    /** Holds top and left neighbor's pu idx into picture level pu array */
1768
    /* Only one top row is enough but left has to be replicated for each process context */
1769
7.10k
    size =  (max_num_4x4_cols  /* left */ + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4)/* top */ + 1/* top right */) * sizeof(WORD32);
1770
7.10k
    size = ALIGN4(size);
1771
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1772
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1773
7.10k
    memset(pv_buf, 0, size);
1774
1775
63.9k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
1776
56.8k
    {
1777
56.8k
        UWORD32 *pu4_buf = (UWORD32 *)pv_buf;
1778
56.8k
        ps_codec->as_process[i].pu4_pic_pu_idx_left = pu4_buf + i * (MAX_CTB_SIZE / 4);
1779
56.8k
        memset(ps_codec->as_process[i].pu4_pic_pu_idx_left, 0, sizeof(UWORD32) * MAX_CTB_SIZE / 4);
1780
56.8k
        ps_codec->as_process[i].pu4_pic_pu_idx_top = pu4_buf + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4);
1781
56.8k
    }
1782
7.10k
    memset(ps_codec->as_process[0].pu4_pic_pu_idx_top, 0, sizeof(UWORD32) * (wd / 4 + 1));
1783
1784
7.10k
    {
1785
7.10k
        sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
1786
1787
        /* To hold SAO left buffer for luma */
1788
7.10k
        size  = sizeof(UWORD8) * (MAX(ht, wd));
1789
1790
        /* To hold SAO left buffer for chroma */
1791
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1792
7.10k
        {
1793
7.10k
            size += sizeof(UWORD8) * (MAX(ht, wd));
1794
7.10k
        }
1795
1796
        /* To hold SAO top buffer for luma */
1797
7.10k
        size += sizeof(UWORD8) * wd;
1798
1799
        /* To hold SAO top buffer for chroma */
1800
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1801
7.10k
        {
1802
7.10k
            size += sizeof(UWORD8) * wd;
1803
7.10k
        }
1804
1805
        /* To hold SAO top left luma pixel value for last output ctb in a row*/
1806
7.10k
        size += sizeof(UWORD8) * max_ctb_rows;
1807
1808
        /* To hold SAO top left chroma pixel value last output ctb in a row*/
1809
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1810
7.10k
        {
1811
7.10k
            size += sizeof(UWORD8) * max_ctb_rows * 2;
1812
7.10k
        }
1813
1814
        /* To hold SAO top left pixel luma for current ctb - column array*/
1815
7.10k
        size += sizeof(UWORD8) * max_ctb_rows;
1816
1817
        /* To hold SAO top left pixel chroma for current ctb-column array*/
1818
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1819
7.10k
        {
1820
7.10k
            size += sizeof(UWORD8) * max_ctb_rows * 2;
1821
7.10k
        }
1822
1823
        /* To hold SAO top right pixel luma pixel value last output ctb in a row*/
1824
7.10k
        size += sizeof(UWORD8) * max_ctb_cols;
1825
1826
        /* To hold SAO top right pixel chroma pixel value last output ctb in a row*/
1827
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1828
7.10k
        {
1829
7.10k
            size += sizeof(UWORD8) * max_ctb_cols * 2;
1830
7.10k
        }
1831
1832
        /*To hold SAO botton bottom left pixels for luma*/
1833
7.10k
        size += sizeof(UWORD8) * max_ctb_rows;
1834
1835
        /*To hold SAO botton bottom left pixels for chroma*/
1836
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1837
7.10k
        {
1838
7.10k
            size += sizeof(UWORD8) * max_ctb_rows * 2;
1839
7.10k
        }
1840
1841
7.10k
        size = ALIGN64(size);
1842
1843
7.10k
        pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1844
7.10k
        RETURN_IF((NULL == pu1_buf), IV_FAIL);
1845
7.10k
        memset(pu1_buf, 0, size);
1846
1847
63.9k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1848
56.8k
        {
1849
56.8k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1850
56.8k
        }
1851
7.10k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1852
7.10k
        pu1_buf += MAX(ht, wd);
1853
1854
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1855
7.10k
        {
1856
63.9k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1857
56.8k
            {
1858
56.8k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1859
56.8k
            }
1860
7.10k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1861
7.10k
            pu1_buf += MAX(ht, wd);
1862
7.10k
        }
1863
1864
63.9k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1865
56.8k
        {
1866
56.8k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1867
56.8k
        }
1868
7.10k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1869
7.10k
        pu1_buf += wd;
1870
1871
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1872
7.10k
        {
1873
63.9k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1874
56.8k
            {
1875
56.8k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1876
56.8k
            }
1877
7.10k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1878
7.10k
            pu1_buf += wd;
1879
7.10k
        }
1880
1881
63.9k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1882
56.8k
        {
1883
56.8k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1884
56.8k
        }
1885
7.10k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1886
7.10k
        pu1_buf += ht / MIN_CTB_SIZE;
1887
1888
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1889
7.10k
        {
1890
63.9k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1891
56.8k
            {
1892
56.8k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1893
56.8k
            }
1894
7.10k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1895
7.10k
            pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1896
7.10k
        }
1897
1898
63.9k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1899
56.8k
        {
1900
56.8k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1901
56.8k
        }
1902
7.10k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1903
7.10k
        pu1_buf += ht / MIN_CTB_SIZE;
1904
1905
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1906
7.10k
        {
1907
63.9k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1908
56.8k
            {
1909
56.8k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1910
56.8k
            }
1911
7.10k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1912
7.10k
            pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1913
7.10k
        }
1914
1915
63.9k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1916
56.8k
        {
1917
56.8k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1918
56.8k
        }
1919
7.10k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1920
7.10k
        pu1_buf += wd / MIN_CTB_SIZE;
1921
1922
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1923
7.10k
        {
1924
63.9k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1925
56.8k
            {
1926
56.8k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1927
56.8k
            }
1928
7.10k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1929
7.10k
            pu1_buf += (wd / MIN_CTB_SIZE) * 2;
1930
7.10k
        }
1931
1932
        /*Per CTB, Store 1 value for luma , 2 values for chroma*/
1933
63.9k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1934
56.8k
        {
1935
56.8k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1936
56.8k
        }
1937
7.10k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1938
7.10k
        pu1_buf += (ht / MIN_CTB_SIZE);
1939
1940
7.10k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1941
7.10k
        {
1942
63.9k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1943
56.8k
            {
1944
56.8k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1945
56.8k
            }
1946
7.10k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1947
7.10k
            pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1948
7.10k
        }
1949
7.10k
    }
1950
1951
1952
0
    {
1953
7.10k
        UWORD8 *pu1_buf = (UWORD8 *)pv_buf;
1954
7.10k
        WORD32 vert_bs_size, horz_bs_size;
1955
7.10k
        WORD32 qp_const_flag_size;
1956
7.10k
        WORD32 qp_size;
1957
7.10k
        WORD32 num_8x8;
1958
1959
        /* Max Number of vertical edges */
1960
7.10k
        vert_bs_size = wd / 8 + 2 * MAX_CTB_SIZE / 8;
1961
1962
        /* Max Number of horizontal edges - extra MAX_CTB_SIZE / 8 to handle the last 4 rows separately(shifted CTB processing) */
1963
7.10k
        vert_bs_size *= (ht + MAX_CTB_SIZE) / MIN_TU_SIZE;
1964
1965
        /* Number of bytes */
1966
7.10k
        vert_bs_size /= 8;
1967
1968
        /* Two bits per edge */
1969
7.10k
        vert_bs_size *= 2;
1970
1971
        /* Max Number of horizontal edges */
1972
7.10k
        horz_bs_size = ht / 8 + MAX_CTB_SIZE / 8;
1973
1974
        /* Max Number of vertical edges - extra MAX_CTB_SIZE / 8 to handle the last 4 columns separately(shifted CTB processing) */
1975
7.10k
        horz_bs_size *= (wd + MAX_CTB_SIZE) / MIN_TU_SIZE;
1976
1977
        /* Number of bytes */
1978
7.10k
        horz_bs_size /= 8;
1979
1980
        /* Two bits per edge */
1981
7.10k
        horz_bs_size *= 2;
1982
1983
        /* Max CTBs in a row */
1984
7.10k
        qp_const_flag_size = wd / MIN_CTB_SIZE + 1 /* The last ctb row deblk is done in last ctb + 1 row.*/;
1985
1986
        /* Max CTBs in a column */
1987
7.10k
        qp_const_flag_size *= ht / MIN_CTB_SIZE;
1988
1989
        /* Number of bytes */
1990
7.10k
        qp_const_flag_size /= 8;
1991
1992
        /* QP changes at CU level - So store at 8x8 level */
1993
7.10k
        num_8x8 = (wd * ht) / (MIN_CU_SIZE * MIN_CU_SIZE);
1994
7.10k
        qp_size = num_8x8;
1995
1996
        /* To hold vertical boundary strength */
1997
7.10k
        size += vert_bs_size;
1998
1999
        /* To hold horizontal boundary strength */
2000
7.10k
        size += horz_bs_size;
2001
2002
        /* To hold QP */
2003
7.10k
        size += qp_size;
2004
2005
        /* To hold QP const in CTB flags */
2006
7.10k
        size += qp_const_flag_size;
2007
2008
7.10k
        pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2009
7.10k
        RETURN_IF((NULL == pu1_buf), IV_FAIL);
2010
2011
7.10k
        memset(pu1_buf, 0, size);
2012
2013
63.9k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
2014
56.8k
        {
2015
56.8k
            ps_codec->as_process[i].s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
2016
56.8k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
2017
56.8k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
2018
56.8k
            pu1_buf += vert_bs_size;
2019
2020
56.8k
            ps_codec->as_process[i].s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
2021
56.8k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
2022
56.8k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
2023
56.8k
            pu1_buf += horz_bs_size;
2024
2025
56.8k
            ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
2026
56.8k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
2027
56.8k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
2028
56.8k
            pu1_buf += qp_size;
2029
2030
56.8k
            ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
2031
56.8k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
2032
56.8k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
2033
56.8k
            pu1_buf += qp_const_flag_size;
2034
2035
56.8k
            pu1_buf -= (vert_bs_size + horz_bs_size + qp_size + qp_const_flag_size);
2036
56.8k
        }
2037
7.10k
        ps_codec->s_parse.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
2038
7.10k
        pu1_buf += vert_bs_size;
2039
2040
7.10k
        ps_codec->s_parse.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
2041
7.10k
        pu1_buf += horz_bs_size;
2042
2043
7.10k
        ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
2044
7.10k
        pu1_buf += qp_size;
2045
2046
7.10k
        ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
2047
7.10k
        pu1_buf += qp_const_flag_size;
2048
2049
7.10k
    }
2050
2051
    /* Max CTBs in a row */
2052
7.10k
    size  = wd / MIN_CTB_SIZE;
2053
    /* Max CTBs in a column */
2054
7.10k
    size *= (ht / MIN_CTB_SIZE + 2) /* Top row and bottom row extra. This ensures accessing left,top in first row
2055
7.10k
                                              and right in last row will not result in invalid access*/;
2056
2057
7.10k
    size *= sizeof(UWORD16);
2058
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2059
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2060
7.10k
    memset(pv_buf, 0, size);
2061
2062
7.10k
    ps_codec->pu1_tile_idx_base = pv_buf;
2063
63.9k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
2064
56.8k
    {
2065
56.8k
        ps_codec->as_process[i].pu1_tile_idx = (UWORD16 *)pv_buf + wd / MIN_CTB_SIZE /* Offset 1 row */;
2066
56.8k
    }
2067
2068
    /* 4 bytes per color component per CTB */
2069
7.10k
    size = 3 * 4;
2070
2071
    /* MAX number of CTBs in a row */
2072
7.10k
    size *= wd / MIN_CTB_SIZE;
2073
2074
    /* MAX number of CTBs in a column */
2075
7.10k
    size *= ht / MIN_CTB_SIZE;
2076
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2077
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2078
7.10k
    memset(pv_buf, 0, size);
2079
2080
7.10k
    ps_codec->s_parse.ps_pic_sao = (sao_t *)pv_buf;
2081
7.10k
    ps_codec->s_parse.s_sao_ctxt.ps_pic_sao = (sao_t *)pv_buf;
2082
63.9k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
2083
56.8k
    {
2084
56.8k
        ps_codec->as_process[i].s_sao_ctxt.ps_pic_sao = ps_codec->s_parse.ps_pic_sao;
2085
56.8k
    }
2086
2087
    /* Only if width * height * 3 / 2 is greater than MIN_BITSBUF_SIZE,
2088
    then allocate dynamic bistream buffer */
2089
7.10k
    ps_codec->pu1_bitsbuf_dynamic = NULL;
2090
7.10k
    size = wd * ht;
2091
7.10k
    if(size > MIN_BITSBUF_SIZE)
2092
661
    {
2093
661
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size + 16); //Alloc extra for parse optimization
2094
661
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2095
661
        memset(pv_buf, 0, size + 16);
2096
661
        ps_codec->pu1_bitsbuf_dynamic = pv_buf;
2097
661
        ps_codec->u4_bitsbuf_size_dynamic = size;
2098
661
    }
2099
2100
7.10k
    size = ihevcd_get_tu_data_size(ps_codec, wd * ht);
2101
7.10k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2102
7.10k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2103
7.10k
    memset(pv_buf, 0, size);
2104
7.10k
    ps_codec->pv_tu_data = pv_buf;
2105
2106
    /* CU info map to store qp and CU type at 8x8 level */
2107
7.10k
    if(ps_codec->u1_enable_cu_info)
2108
0
    {
2109
0
        size = ((wd * ht) / (MIN_CU_SIZE * MIN_CU_SIZE)) * BUF_MGR_MAX_CNT;
2110
2111
0
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2112
0
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2113
0
        memset(pv_buf, 0, size);
2114
0
        ps_codec->pu1_qp_map_base = pv_buf;
2115
2116
0
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2117
0
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2118
0
        memset(pv_buf, 0, size);
2119
0
        ps_codec->pu1_cu_type_map_base = pv_buf;
2120
0
    }
2121
2122
7.10k
    {
2123
7.10k
        sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2124
2125
2126
        /* Allocate for pu_map, pu_t and pic_pu_idx for each MV bank */
2127
        /* Note: Number of luma samples is not max_wd * max_ht here, instead it is
2128
         * set to maximum number of luma samples allowed at the given level.
2129
         * This is done to ensure that any stream with width and height lesser
2130
         * than max_wd and max_ht is supported. Number of buffers required can be greater
2131
         * for lower width and heights at a given level and this increased number of buffers
2132
         * might require more memory than what max_wd and max_ht buffer would have required
2133
         * Also note one extra buffer is allocted to store current pictures MV bank
2134
         * In case of asynchronous parsing and processing, number of buffers should increase here
2135
         * based on when parsing and processing threads are synchronized
2136
         */
2137
7.10k
        max_dpb_size = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2138
        /* Size for holding mv_buf_t for each MV Bank
2139
         * One extra MV Bank is needed to hold current pics MV bank.
2140
         */
2141
7.10k
        size = (max_dpb_size + 1) * sizeof(mv_buf_t);
2142
2143
7.10k
        size += (max_dpb_size + 1) *
2144
7.10k
                        ihevcd_get_pic_mv_bank_size(wd * ht);
2145
2146
7.10k
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2147
7.10k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2148
7.10k
        memset(pv_buf, 0, size);
2149
2150
7.10k
        ps_codec->pv_mv_bank_buf_base = pv_buf;
2151
7.10k
        ps_codec->i4_total_mv_bank_size = size;
2152
2153
7.10k
    }
2154
2155
    /* In case of non-shared mode allocate for reference picture buffers */
2156
    /* In case of shared and 420p output, allocate for chroma samples */
2157
7.10k
    if(0 == ps_codec->i4_share_disp_buf)
2158
7.10k
    {
2159
        /* Number of buffers is doubled in order to return one frame at a time instead of sending
2160
         * multiple outputs during dpb full case.
2161
         * Also note one extra buffer is allocted to store current picture
2162
         * In case of asynchronous parsing and processing, number of buffers should increase here
2163
         * based on when parsing and processing threads are synchronized
2164
         */
2165
7.10k
        size = ihevcd_get_total_pic_buf_size(ps_codec, wd, ht);
2166
7.10k
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2167
7.10k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2168
7.10k
        memset(pv_buf, 0, size);
2169
2170
7.10k
        ps_codec->i4_total_pic_buf_size = size;
2171
7.10k
        ps_codec->pu1_ref_pic_buf_base = (UWORD8 *)pv_buf;
2172
7.10k
    }
2173
2174
7.10k
    ps_codec->pv_proc_jobq = ihevcd_jobq_init(ps_codec->pv_proc_jobq_buf, ps_codec->i4_proc_jobq_buf_size);
2175
7.10k
    RETURN_IF((ps_codec->pv_proc_jobq == NULL), IV_FAIL);
2176
2177
    /* Update the jobq context to all the threads */
2178
7.10k
    ps_codec->s_parse.pv_proc_jobq = ps_codec->pv_proc_jobq;
2179
63.9k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
2180
56.8k
    {
2181
56.8k
        ps_codec->as_process[i].pv_proc_jobq = ps_codec->pv_proc_jobq;
2182
56.8k
        ps_codec->as_process[i].i4_id = i;
2183
56.8k
        ps_codec->as_process[i].ps_codec = ps_codec;
2184
2185
        /* Set the following to zero assuming it is a single core solution
2186
         * When threads are launched these will be set appropriately
2187
         */
2188
56.8k
        ps_codec->as_process[i].i4_check_parse_status = 0;
2189
56.8k
        ps_codec->as_process[i].i4_check_proc_status = 0;
2190
56.8k
    }
2191
2192
7.10k
    ps_codec->u4_allocate_dynamic_done = 1;
2193
2194
7.10k
    return IV_SUCCESS;
2195
7.10k
}
2196
2197
/**
2198
*******************************************************************************
2199
*
2200
* @brief
2201
*  Free dynamic memory for the codec
2202
*
2203
* @par Description:
2204
*  Free dynamic memory for the codec
2205
*
2206
* @param[in] ps_codec
2207
*  Pointer to codec context
2208
*
2209
* @returns  Status
2210
*
2211
* @remarks
2212
*
2213
*
2214
*******************************************************************************
2215
*/
2216
WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec)
2217
11.7k
{
2218
2219
11.7k
    if(ps_codec->pv_proc_jobq)
2220
7.10k
    {
2221
7.10k
        ihevcd_jobq_deinit(ps_codec->pv_proc_jobq);
2222
7.10k
        ps_codec->pv_proc_jobq = NULL;
2223
7.10k
    }
2224
2225
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->ps_tile);
2226
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pi4_entry_ofst);
2227
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_skip_cu_top);
2228
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_ct_depth_top);
2229
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_intra_flag);
2230
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_no_loop_filter_flag_base);
2231
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pv_proc_jobq_buf);
2232
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_parse_map);
2233
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_proc_map);
2234
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pu4_pic_pu_idx_left);
2235
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_sao_src_left_luma);
2236
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_bs_ctxt.pu4_pic_vert_bs);
2237
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_tile_idx_base);
2238
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.ps_pic_sao);
2239
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_dynamic);
2240
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pv_tu_data);
2241
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pv_mv_bank_buf_base);
2242
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_ref_pic_buf_base);
2243
11.7k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_cur_chroma_ref_buf);
2244
11.7k
    if(ps_codec->u1_enable_cu_info)
2245
0
    {
2246
0
        ALIGNED_FREE(ps_codec, ps_codec->pu1_qp_map_base);
2247
0
        ALIGNED_FREE(ps_codec, ps_codec->pu1_cu_type_map_base);
2248
0
    }
2249
2250
11.7k
    ps_codec->u4_allocate_dynamic_done = 0;
2251
11.7k
    return IV_SUCCESS;
2252
11.7k
}
2253
2254
2255
/**
2256
*******************************************************************************
2257
*
2258
* @brief
2259
*  Initializes from mem records passed to the codec
2260
*
2261
* @par Description:
2262
*  Initializes pointers based on mem records passed
2263
*
2264
* @param[in] ps_codec_obj
2265
*  Pointer to codec object at API level
2266
*
2267
* @param[in] pv_api_ip
2268
*  Pointer to input argument structure
2269
*
2270
* @param[out] pv_api_op
2271
*  Pointer to output argument structure
2272
*
2273
* @returns  Status
2274
*
2275
* @remarks
2276
*
2277
*
2278
*******************************************************************************
2279
*/
2280
WORD32 ihevcd_create(iv_obj_t *ps_codec_obj,
2281
                           void *pv_api_ip,
2282
                           void *pv_api_op)
2283
4.16k
{
2284
4.16k
    ihevcd_cxa_create_ip_t *ps_create_ip;
2285
4.16k
    ihevcd_cxa_create_op_t *ps_create_op;
2286
2287
4.16k
    WORD32 ret;
2288
4.16k
    codec_t *ps_codec;
2289
4.16k
    ps_create_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
2290
4.16k
    ps_create_op = (ihevcd_cxa_create_op_t *)pv_api_op;
2291
2292
4.16k
    ps_create_op->s_ivd_create_op_t.u4_error_code = 0;
2293
4.16k
    ps_codec_obj = NULL;
2294
4.16k
    ret = ihevcd_allocate_static_bufs(&ps_codec_obj, pv_api_ip, pv_api_op);
2295
2296
    /* If allocation of some buffer fails, then free buffers allocated till then */
2297
4.16k
    if(IV_FAIL == ret)
2298
0
    {
2299
0
        if(NULL != ps_codec_obj)
2300
0
        {
2301
0
            if(ps_codec_obj->pv_codec_handle)
2302
0
            {
2303
0
                ihevcd_free_static_bufs(ps_codec_obj);
2304
0
            }
2305
0
            else
2306
0
            {
2307
0
                void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
2308
0
                void *pv_mem_ctxt;
2309
2310
0
                pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
2311
0
                pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
2312
0
                pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
2313
0
            }
2314
0
        }
2315
0
        ps_create_op->s_ivd_create_op_t.u4_error_code = IVD_MEM_ALLOC_FAILED;
2316
0
        ps_create_op->s_ivd_create_op_t.u4_error_code |= 1 << IVD_FATALERROR;
2317
2318
0
        return IV_FAIL;
2319
0
    }
2320
4.16k
    ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2321
4.16k
    if (ps_create_ip->u4_enable_yuv_formats == 0) {
2322
1.58k
        ps_create_ip->u4_enable_yuv_formats = 1 << CHROMA_FMT_IDC_YUV420;
2323
1.58k
    }
2324
4.16k
    ps_codec->u4_enable_yuv_formats = ps_create_ip->u4_enable_yuv_formats;
2325
4.16k
    ret = ihevcd_init(ps_codec);
2326
2327
4.16k
    TRACE_INIT(NULL);
2328
4.16k
    STATS_INIT();
2329
2330
4.16k
    return ret;
2331
4.16k
}
2332
/**
2333
*******************************************************************************
2334
*
2335
* @brief
2336
*  Delete codec
2337
*
2338
* @par Description:
2339
*  Delete codec
2340
*
2341
* @param[in] ps_codec_obj
2342
*  Pointer to codec object at API level
2343
*
2344
* @param[in] pv_api_ip
2345
*  Pointer to input argument structure
2346
*
2347
* @param[out] pv_api_op
2348
*  Pointer to output argument structure
2349
*
2350
* @returns  Status
2351
*
2352
* @remarks
2353
*
2354
*
2355
*******************************************************************************
2356
*/
2357
WORD32 ihevcd_delete(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2358
4.16k
{
2359
4.16k
    codec_t *ps_dec;
2360
4.16k
    ihevcd_cxa_delete_ip_t *ps_ip = (ihevcd_cxa_delete_ip_t *)pv_api_ip;
2361
4.16k
    ihevcd_cxa_delete_op_t *ps_op = (ihevcd_cxa_delete_op_t *)pv_api_op;
2362
2363
4.16k
    ps_dec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2364
4.16k
    UNUSED(ps_ip);
2365
4.16k
    ps_op->s_ivd_delete_op_t.u4_error_code = 0;
2366
4.16k
    ihevcd_free_dynamic_bufs(ps_dec);
2367
4.16k
    ihevcd_free_static_bufs(ps_codec_obj);
2368
4.16k
    return IV_SUCCESS;
2369
4.16k
}
2370
2371
2372
/**
2373
*******************************************************************************
2374
*
2375
* @brief
2376
*  Passes display buffer from application to codec
2377
*
2378
* @par Description:
2379
*  Adds display buffer to the codec
2380
*
2381
* @param[in] ps_codec_obj
2382
*  Pointer to codec object at API level
2383
*
2384
* @param[in] pv_api_ip
2385
*  Pointer to input argument structure
2386
*
2387
* @param[out] pv_api_op
2388
*  Pointer to output argument structure
2389
*
2390
* @returns  Status
2391
*
2392
* @remarks
2393
*
2394
*
2395
*******************************************************************************
2396
*/
2397
WORD32 ihevcd_set_display_frame(iv_obj_t *ps_codec_obj,
2398
                                void *pv_api_ip,
2399
                                void *pv_api_op)
2400
0
{
2401
0
    WORD32 ret = IV_SUCCESS;
2402
2403
0
    ivd_set_display_frame_ip_t *ps_dec_disp_ip;
2404
0
    ivd_set_display_frame_op_t *ps_dec_disp_op;
2405
2406
0
    WORD32 i;
2407
2408
0
    codec_t *ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2409
2410
0
    ps_dec_disp_ip = (ivd_set_display_frame_ip_t *)pv_api_ip;
2411
0
    ps_dec_disp_op = (ivd_set_display_frame_op_t *)pv_api_op;
2412
2413
0
    ps_codec->i4_num_disp_bufs = 0;
2414
0
    if(ps_codec->i4_share_disp_buf)
2415
0
    {
2416
0
        UWORD32 num_bufs = ps_dec_disp_ip->num_disp_bufs;
2417
0
        pic_buf_t *ps_pic_buf;
2418
0
        UWORD8 *pu1_buf;
2419
0
        WORD32 buf_ret;
2420
2421
0
        UWORD8 *pu1_chroma_buf = NULL;
2422
0
        num_bufs = MIN(num_bufs, BUF_MGR_MAX_CNT);
2423
0
        ps_codec->i4_num_disp_bufs = num_bufs;
2424
2425
0
        ps_pic_buf = (pic_buf_t *)ps_codec->ps_pic_buf;
2426
2427
        /* If color format is 420P, then allocate chroma buffers to hold semiplanar
2428
         * chroma data */
2429
0
        if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2430
0
        {
2431
0
            WORD32 num_samples = ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2432
0
            WORD32 size = num_samples * num_bufs;
2433
0
            void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
2434
2435
0
            pu1_chroma_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2436
0
            RETURN_IF((NULL == pu1_chroma_buf), IV_FAIL);
2437
0
            memset(pu1_chroma_buf, 0, size);
2438
2439
0
            ps_codec->pu1_cur_chroma_ref_buf = pu1_chroma_buf;
2440
0
        }
2441
0
        for(i = 0; i < (WORD32)num_bufs; i++)
2442
0
        {
2443
            /* Stride is not available in some cases here.
2444
               So store base pointers to buffer manager now,
2445
               and update these pointers once header is decoded */
2446
0
            pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[0];
2447
0
            ps_pic_buf->pu1_luma = pu1_buf;
2448
2449
0
            if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2450
0
            {
2451
0
                pu1_buf = pu1_chroma_buf;
2452
0
                pu1_chroma_buf += ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2453
0
            }
2454
0
            else
2455
0
            {
2456
                /* For YUV 420SP case use display buffer itself as chroma ref buffer */
2457
0
                pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[1];
2458
0
            }
2459
2460
0
            ps_pic_buf->pu1_chroma = pu1_buf;
2461
2462
0
            buf_ret = ihevc_buf_mgr_add((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_pic_buf, i);
2463
2464
0
            if(0 != buf_ret)
2465
0
            {
2466
0
                ps_codec->i4_error_code = IHEVCD_BUF_MGR_ERROR;
2467
0
                return IHEVCD_BUF_MGR_ERROR;
2468
0
            }
2469
2470
            /* Mark pic buf as needed for display */
2471
            /* This ensures that till the buffer is explicitly passed to the codec,
2472
             * application owns the buffer. Decoder is allowed to use a buffer only
2473
             * when application sends it through fill this buffer call in OMX
2474
             */
2475
0
            ihevc_buf_mgr_set_status((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, i, BUF_MGR_DISP);
2476
2477
0
            ps_pic_buf++;
2478
2479
            /* Store display buffers in codec context. Needed for 420p output */
2480
0
            memcpy(&ps_codec->s_disp_buffer[ps_codec->i4_share_disp_buf_cnt],
2481
0
                   &ps_dec_disp_ip->s_disp_buffer[i],
2482
0
                   sizeof(ps_dec_disp_ip->s_disp_buffer[i]));
2483
2484
0
            ps_codec->i4_share_disp_buf_cnt++;
2485
2486
0
        }
2487
0
    }
2488
2489
0
    ps_dec_disp_op->u4_error_code = 0;
2490
0
    return ret;
2491
2492
0
}
2493
2494
/**
2495
*******************************************************************************
2496
*
2497
* @brief
2498
*  Sets the decoder in flush mode. Decoder will come out of  flush only
2499
* after returning all the buffers or at reset
2500
*
2501
* @par Description:
2502
*  Sets the decoder in flush mode
2503
*
2504
* @param[in] ps_codec_obj
2505
*  Pointer to codec object at API level
2506
*
2507
* @param[in] pv_api_ip
2508
*  Pointer to input argument structure
2509
*
2510
* @param[out] pv_api_op
2511
*  Pointer to output argument structure
2512
*
2513
* @returns  Status
2514
*
2515
* @remarks
2516
*
2517
*
2518
*******************************************************************************
2519
*/
2520
WORD32 ihevcd_set_flush_mode(iv_obj_t *ps_codec_obj,
2521
                             void *pv_api_ip,
2522
                             void *pv_api_op)
2523
0
{
2524
2525
0
    codec_t *ps_codec;
2526
0
    ivd_ctl_flush_op_t *ps_ctl_op = (ivd_ctl_flush_op_t *)pv_api_op;
2527
0
    UNUSED(pv_api_ip);
2528
0
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2529
0
    ihevcd_join_threads(ps_codec);
2530
2531
    /* Signal flush frame control call */
2532
0
    ps_codec->i4_flush_mode = 1;
2533
2534
0
    ps_ctl_op->u4_error_code = 0;
2535
2536
    /* Set pic count to zero, so that decoder starts buffering again */
2537
    /* once it comes out of flush mode */
2538
0
    ps_codec->u4_pic_cnt = 0;
2539
0
    ps_codec->u4_disp_cnt = 0;
2540
2541
    /* If the first slice NAL fed to decoder after flush is a CRA NAL, then */
2542
    /* it may have associated RASL nals that need to be skipped */
2543
0
    ps_codec->i4_cra_as_first_pic = 1;
2544
0
    return IV_SUCCESS;
2545
2546
2547
0
}
2548
2549
/**
2550
*******************************************************************************
2551
*
2552
* @brief
2553
*  Gets decoder status and buffer requirements
2554
*
2555
* @par Description:
2556
*  Gets the decoder status
2557
*
2558
* @param[in] ps_codec_obj
2559
*  Pointer to codec object at API level
2560
*
2561
* @param[in] pv_api_ip
2562
*  Pointer to input argument structure
2563
*
2564
* @param[out] pv_api_op
2565
*  Pointer to output argument structure
2566
*
2567
* @returns  Status
2568
*
2569
* @remarks
2570
*
2571
*
2572
*******************************************************************************
2573
*/
2574
2575
WORD32 ihevcd_get_status(iv_obj_t *ps_codec_obj,
2576
                         void *pv_api_ip,
2577
                         void *pv_api_op)
2578
0
{
2579
2580
0
    WORD32 i;
2581
0
    codec_t *ps_codec;
2582
0
    WORD32 wd, ht;
2583
0
    ivd_ctl_getstatus_op_t *ps_ctl_op = (ivd_ctl_getstatus_op_t *)pv_api_op;
2584
2585
0
    UNUSED(pv_api_ip);
2586
2587
0
    ps_ctl_op->u4_error_code = 0;
2588
2589
0
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2590
2591
0
    ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2592
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2593
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2594
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2595
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2596
0
    else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2597
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2598
0
    else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2599
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2600
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2601
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2602
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2603
0
    else if(ps_codec->e_chroma_fmt == IV_GRAY)
2604
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_GRAY;
2605
2606
0
    ps_ctl_op->u4_num_disp_bufs = 1;
2607
2608
0
    for(i = 0; i < (WORD32)ps_ctl_op->u4_min_num_in_bufs; i++)
2609
0
    {
2610
0
        wd = ALIGN64(ps_codec->i4_wd);
2611
0
        ht = ALIGN64(ps_codec->i4_ht);
2612
0
        ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2613
0
    }
2614
2615
0
    wd = ps_codec->i4_wd;
2616
0
    ht = ps_codec->i4_ht;
2617
2618
0
    if(ps_codec->i4_sps_done)
2619
0
    {
2620
0
        if(0 == ps_codec->i4_share_disp_buf)
2621
0
        {
2622
0
            wd = ps_codec->i4_disp_wd;
2623
0
            ht = ps_codec->i4_disp_ht;
2624
2625
0
        }
2626
0
        else
2627
0
        {
2628
0
            wd = ps_codec->i4_disp_strd;
2629
0
            ht = ps_codec->i4_ht + PAD_HT;
2630
0
        }
2631
0
    }
2632
2633
0
    if(ps_codec->i4_disp_strd > wd)
2634
0
        wd = ps_codec->i4_disp_strd;
2635
2636
0
    if(0 == ps_codec->i4_share_disp_buf)
2637
0
        ps_ctl_op->u4_num_disp_bufs = 1;
2638
0
    else
2639
0
    {
2640
0
        if(ps_codec->i4_sps_done)
2641
0
        {
2642
0
            sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2643
0
            WORD32 reorder_pic_cnt, ref_pic_cnt;
2644
0
            reorder_pic_cnt = 0;
2645
0
            if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2646
0
                reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2647
0
            ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2648
2649
0
            ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2650
2651
0
            ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2652
0
        }
2653
0
        else
2654
0
        {
2655
0
            ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2656
0
        }
2657
2658
0
        ps_ctl_op->u4_num_disp_bufs = MIN(
2659
0
                        ps_ctl_op->u4_num_disp_bufs, 32);
2660
0
    }
2661
2662
    /*!*/
2663
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2664
0
    {
2665
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2666
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2667
0
        ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2668
0
    }
2669
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2670
0
    {
2671
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2672
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2673
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2674
0
    }
2675
0
    else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2676
0
    {
2677
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2678
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2679
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2680
0
    }
2681
0
    else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2682
0
    {
2683
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2684
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2685
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2686
0
    }
2687
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2688
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2689
0
    {
2690
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2691
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2692
0
        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2693
0
    }
2694
0
    else if(ps_codec->e_chroma_fmt == IV_GRAY)
2695
0
    {
2696
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2697
0
        ps_ctl_op->u4_min_out_buf_size[1] = 0;
2698
0
        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2699
0
    }
2700
0
    ps_ctl_op->u4_pic_ht = ht;
2701
0
    ps_ctl_op->u4_pic_wd = wd;
2702
0
    ps_ctl_op->u4_frame_rate = 30000;
2703
0
    ps_ctl_op->u4_bit_rate = 1000000;
2704
0
    ps_ctl_op->e_content_type = IV_PROGRESSIVE;
2705
0
    ps_ctl_op->e_output_chroma_format = ps_codec->e_chroma_fmt;
2706
0
    ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2707
2708
0
    if(ps_ctl_op->u4_size == sizeof(ihevcd_cxa_ctl_getstatus_op_t))
2709
0
    {
2710
0
        ihevcd_cxa_ctl_getstatus_op_t *ps_ext_ctl_op = (ihevcd_cxa_ctl_getstatus_op_t *)ps_ctl_op;
2711
0
        ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_wd;
2712
0
        ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_ht;
2713
0
    }
2714
0
    return IV_SUCCESS;
2715
0
}
2716
/**
2717
*******************************************************************************
2718
*
2719
* @brief
2720
*  Gets decoder buffer requirements
2721
*
2722
* @par Description:
2723
*  Gets the decoder buffer requirements. If called before  header decoder,
2724
* buffer requirements are based on max_wd  and max_ht else actual width and
2725
* height will be used
2726
*
2727
* @param[in] ps_codec_obj
2728
*  Pointer to codec object at API level
2729
*
2730
* @param[in] pv_api_ip
2731
*  Pointer to input argument structure
2732
*
2733
* @param[out] pv_api_op
2734
*  Pointer to output argument structure
2735
*
2736
* @returns  Status
2737
*
2738
* @remarks
2739
*
2740
*
2741
*******************************************************************************
2742
*/
2743
WORD32 ihevcd_get_buf_info(iv_obj_t *ps_codec_obj,
2744
                           void *pv_api_ip,
2745
                           void *pv_api_op)
2746
0
{
2747
2748
0
    codec_t *ps_codec;
2749
0
    UWORD32 i = 0;
2750
0
    WORD32 wd, ht;
2751
0
    ivd_ctl_getbufinfo_op_t *ps_ctl_op =
2752
0
                    (ivd_ctl_getbufinfo_op_t *)pv_api_op;
2753
2754
0
    UNUSED(pv_api_ip);
2755
0
    ps_ctl_op->u4_error_code = 0;
2756
2757
0
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2758
2759
0
    ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2760
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2761
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2762
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2763
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE;
2764
0
    else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2765
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565;
2766
0
    else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2767
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_RGBA8888;
2768
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2769
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2770
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2771
0
    else if(ps_codec->e_chroma_fmt == IV_GRAY)
2772
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_GRAY;
2773
2774
0
    ps_ctl_op->u4_num_disp_bufs = 1;
2775
2776
0
    for(i = 0; i < ps_ctl_op->u4_min_num_in_bufs; i++)
2777
0
    {
2778
0
        wd = ALIGN64(ps_codec->i4_wd);
2779
0
        ht = ALIGN64(ps_codec->i4_ht);
2780
2781
0
        ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2782
0
    }
2783
2784
0
    wd = 0;
2785
0
    ht = 0;
2786
2787
0
    if(ps_codec->i4_sps_done)
2788
0
    {
2789
0
        if(0 == ps_codec->i4_share_disp_buf)
2790
0
        {
2791
0
            wd = ps_codec->i4_disp_wd;
2792
0
            ht = ps_codec->i4_disp_ht;
2793
2794
0
        }
2795
0
        else
2796
0
        {
2797
0
            wd = ps_codec->i4_disp_strd;
2798
0
            ht = ps_codec->i4_ht + PAD_HT;
2799
0
        }
2800
0
    }
2801
0
    else
2802
0
    {
2803
0
        if(1 == ps_codec->i4_share_disp_buf)
2804
0
        {
2805
0
            wd = ALIGN32(wd + PAD_WD);
2806
0
            ht += PAD_HT;
2807
0
        }
2808
0
    }
2809
2810
0
    if(ps_codec->i4_disp_strd > wd)
2811
0
        wd = ps_codec->i4_disp_strd;
2812
2813
0
    if(0 == ps_codec->i4_share_disp_buf)
2814
0
        ps_ctl_op->u4_num_disp_bufs = 1;
2815
0
    else
2816
0
    {
2817
0
        if(ps_codec->i4_sps_done)
2818
0
        {
2819
0
            sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2820
0
            WORD32 reorder_pic_cnt, ref_pic_cnt;
2821
0
            reorder_pic_cnt = 0;
2822
0
            if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2823
0
                reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2824
0
            ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2825
2826
0
            ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2827
2828
0
            ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2829
0
        }
2830
0
        else
2831
0
        {
2832
0
            ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2833
0
        }
2834
2835
0
        ps_ctl_op->u4_num_disp_bufs = MIN(
2836
0
                        ps_ctl_op->u4_num_disp_bufs, 32);
2837
2838
0
    }
2839
2840
    /*!*/
2841
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2842
0
    {
2843
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2844
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2845
0
        ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2846
0
    }
2847
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422ILE)
2848
0
    {
2849
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2850
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2851
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2852
0
    }
2853
0
    else if(ps_codec->e_chroma_fmt == IV_RGB_565)
2854
0
    {
2855
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 2;
2856
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2857
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2858
0
    }
2859
0
    else if(ps_codec->e_chroma_fmt == IV_RGBA_8888)
2860
0
    {
2861
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht) * 4;
2862
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2863
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2864
0
    }
2865
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2866
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2867
0
    {
2868
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2869
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2870
0
        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2871
0
    }
2872
0
    else if(ps_codec->e_chroma_fmt == IV_GRAY)
2873
0
    {
2874
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2875
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2876
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2877
0
    }
2878
0
    ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2879
2880
0
    return IV_SUCCESS;
2881
0
}
2882
2883
2884
/**
2885
*******************************************************************************
2886
*
2887
* @brief
2888
*  Sets dynamic parameters
2889
*
2890
* @par Description:
2891
*  Sets dynamic parameters. Note Frame skip, decode header  mode are dynamic
2892
*  Dynamic change in stride is not  supported
2893
*
2894
* @param[in] ps_codec_obj
2895
*  Pointer to codec object at API level
2896
*
2897
* @param[in] pv_api_ip
2898
*  Pointer to input argument structure
2899
*
2900
* @param[out] pv_api_op
2901
*  Pointer to output argument structure
2902
*
2903
* @returns  Status
2904
*
2905
* @remarks
2906
*
2907
*
2908
*******************************************************************************
2909
*/
2910
WORD32 ihevcd_set_params(iv_obj_t *ps_codec_obj,
2911
                         void *pv_api_ip,
2912
                         void *pv_api_op)
2913
8.33k
{
2914
2915
8.33k
    codec_t *ps_codec;
2916
8.33k
    WORD32 ret = IV_SUCCESS;
2917
8.33k
    WORD32 strd;
2918
8.33k
    ivd_ctl_set_config_ip_t *s_ctl_dynparams_ip =
2919
8.33k
                    (ivd_ctl_set_config_ip_t *)pv_api_ip;
2920
8.33k
    ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
2921
8.33k
                    (ivd_ctl_set_config_op_t *)pv_api_op;
2922
2923
8.33k
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2924
2925
8.33k
    s_ctl_dynparams_op->u4_error_code = 0;
2926
2927
8.33k
    ps_codec->e_pic_skip_mode = s_ctl_dynparams_ip->e_frm_skip_mode;
2928
2929
8.33k
    if(s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_NONE)
2930
0
    {
2931
2932
0
        if((s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_P) &&
2933
0
           (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_B) &&
2934
0
           (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_PB))
2935
0
        {
2936
0
            s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2937
0
            ret = IV_FAIL;
2938
0
        }
2939
0
    }
2940
2941
8.33k
    strd = ps_codec->i4_disp_strd;
2942
8.33k
    if(1 == ps_codec->i4_share_disp_buf)
2943
0
    {
2944
0
        strd = ps_codec->i4_strd;
2945
0
    }
2946
2947
2948
8.33k
    {
2949
8.33k
        if((WORD32)s_ctl_dynparams_ip->u4_disp_wd >= ps_codec->i4_disp_wd)
2950
4.60k
        {
2951
4.60k
            strd = s_ctl_dynparams_ip->u4_disp_wd;
2952
4.60k
        }
2953
3.73k
        else if(0 == ps_codec->i4_sps_done)
2954
0
        {
2955
0
            strd = s_ctl_dynparams_ip->u4_disp_wd;
2956
0
        }
2957
3.73k
        else if(s_ctl_dynparams_ip->u4_disp_wd == 0)
2958
3.73k
        {
2959
3.73k
            strd = ps_codec->i4_disp_strd;
2960
3.73k
        }
2961
0
        else
2962
0
        {
2963
0
            strd = 0;
2964
0
            s_ctl_dynparams_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
2965
0
            s_ctl_dynparams_op->u4_error_code |= IHEVCD_INVALID_DISP_STRD;
2966
0
            ret = IV_FAIL;
2967
0
        }
2968
8.33k
    }
2969
2970
8.33k
    ps_codec->i4_disp_strd = strd;
2971
8.33k
    if(1 == ps_codec->i4_share_disp_buf)
2972
0
    {
2973
0
        ps_codec->i4_strd = strd;
2974
0
    }
2975
2976
8.33k
    if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_FRAME)
2977
4.16k
        ps_codec->i4_header_mode = 0;
2978
4.16k
    else if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_HEADER)
2979
4.16k
        ps_codec->i4_header_mode = 1;
2980
0
    else
2981
0
    {
2982
2983
0
        s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2984
0
        ps_codec->i4_header_mode = 1;
2985
0
        ret = IV_FAIL;
2986
0
    }
2987
2988
8.33k
    ps_codec->e_frm_out_mode = IVD_DISPLAY_FRAME_OUT;
2989
2990
8.33k
    if((s_ctl_dynparams_ip->e_frm_out_mode != IVD_DECODE_FRAME_OUT) &&
2991
8.33k
       (s_ctl_dynparams_ip->e_frm_out_mode != IVD_DISPLAY_FRAME_OUT))
2992
0
    {
2993
0
        s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2994
0
        ret = IV_FAIL;
2995
0
    }
2996
8.33k
    ps_codec->e_frm_out_mode = s_ctl_dynparams_ip->e_frm_out_mode;
2997
2998
8.33k
    return ret;
2999
3000
8.33k
}
3001
/**
3002
*******************************************************************************
3003
*
3004
* @brief
3005
*  Resets the decoder state
3006
*
3007
* @par Description:
3008
*  Resets the decoder state by calling ihevcd_init()
3009
*
3010
* @param[in] ps_codec_obj
3011
*  Pointer to codec object at API level
3012
*
3013
* @param[in] pv_api_ip
3014
*  Pointer to input argument structure
3015
*
3016
* @param[out] pv_api_op
3017
*  Pointer to output argument structure
3018
*
3019
* @returns  Status
3020
*
3021
* @remarks
3022
*
3023
*
3024
*******************************************************************************
3025
*/
3026
WORD32 ihevcd_reset(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
3027
3.13k
{
3028
3.13k
    codec_t *ps_codec;
3029
3.13k
    ivd_ctl_reset_op_t *s_ctl_reset_op = (ivd_ctl_reset_op_t *)pv_api_op;
3030
3.13k
    UNUSED(pv_api_ip);
3031
3.13k
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
3032
3033
3.13k
    if(ps_codec != NULL)
3034
3.13k
    {
3035
3.13k
        DEBUG("\nReset called \n");
3036
3.13k
        ihevcd_join_threads(ps_codec);
3037
3038
3.13k
        ihevcd_init(ps_codec);
3039
3.13k
    }
3040
0
    else
3041
0
    {
3042
0
        DEBUG("\nReset called without Initializing the decoder\n");
3043
0
        s_ctl_reset_op->u4_error_code = IHEVCD_INIT_NOT_DONE;
3044
0
    }
3045
3046
3.13k
    return IV_SUCCESS;
3047
3.13k
}
3048
3049
/**
3050
*******************************************************************************
3051
*
3052
* @brief
3053
*  Releases display buffer from application to codec  to signal to the codec
3054
* that it can write to this buffer  if required. Till release is called,
3055
* codec can not write  to this buffer
3056
*
3057
* @par Description:
3058
*  Marks the buffer as display done
3059
*
3060
* @param[in] ps_codec_obj
3061
*  Pointer to codec object at API level
3062
*
3063
* @param[in] pv_api_ip
3064
*  Pointer to input argument structure
3065
*
3066
* @param[out] pv_api_op
3067
*  Pointer to output argument structure
3068
*
3069
* @returns  Status
3070
*
3071
* @remarks
3072
*
3073
*
3074
*******************************************************************************
3075
*/
3076
3077
WORD32 ihevcd_rel_display_frame(iv_obj_t *ps_codec_obj,
3078
                                void *pv_api_ip,
3079
                                void *pv_api_op)
3080
0
{
3081
3082
0
    ivd_rel_display_frame_ip_t *ps_dec_rel_disp_ip;
3083
0
    ivd_rel_display_frame_op_t *ps_dec_rel_disp_op;
3084
3085
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3086
3087
0
    ps_dec_rel_disp_ip = (ivd_rel_display_frame_ip_t *)pv_api_ip;
3088
0
    ps_dec_rel_disp_op = (ivd_rel_display_frame_op_t *)pv_api_op;
3089
3090
0
    UNUSED(ps_dec_rel_disp_op);
3091
3092
0
    if(0 == ps_codec->i4_share_disp_buf)
3093
0
    {
3094
0
        return IV_SUCCESS;
3095
0
    }
3096
3097
0
    ihevc_buf_mgr_release((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_dec_rel_disp_ip->u4_disp_buf_id, BUF_MGR_DISP);
3098
3099
0
    return IV_SUCCESS;
3100
0
}
3101
/**
3102
*******************************************************************************
3103
*
3104
* @brief
3105
*  Sets degrade params
3106
*
3107
* @par Description:
3108
*  Sets degrade params.
3109
*  Refer to ihevcd_cxa_ctl_degrade_ip_t definition for details
3110
*
3111
* @param[in] ps_codec_obj
3112
*  Pointer to codec object at API level
3113
*
3114
* @param[in] pv_api_ip
3115
*  Pointer to input argument structure
3116
*
3117
* @param[out] pv_api_op
3118
*  Pointer to output argument structure
3119
*
3120
* @returns  Status
3121
*
3122
* @remarks
3123
*
3124
*
3125
*******************************************************************************
3126
*/
3127
3128
WORD32 ihevcd_set_degrade(iv_obj_t *ps_codec_obj,
3129
                          void *pv_api_ip,
3130
                          void *pv_api_op)
3131
0
{
3132
0
    ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
3133
0
    ihevcd_cxa_ctl_degrade_op_t *ps_op;
3134
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3135
3136
0
    ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
3137
0
    ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
3138
3139
0
    ps_codec->i4_degrade_type = ps_ip->i4_degrade_type;
3140
0
    ps_codec->i4_nondegrade_interval = ps_ip->i4_nondegrade_interval;
3141
0
    ps_codec->i4_degrade_pics = ps_ip->i4_degrade_pics;
3142
3143
0
    ps_op->u4_error_code = 0;
3144
0
    ps_codec->i4_degrade_pic_cnt = 0;
3145
3146
0
    return IV_SUCCESS;
3147
0
}
3148
3149
3150
/**
3151
*******************************************************************************
3152
*
3153
* @brief
3154
*  Gets frame dimensions/offsets
3155
*
3156
* @par Description:
3157
*  Gets frame buffer chararacteristics such a x & y offsets  display and
3158
* buffer dimensions
3159
*
3160
* @param[in] ps_codec_obj
3161
*  Pointer to codec object at API level
3162
*
3163
* @param[in] pv_api_ip
3164
*  Pointer to input argument structure
3165
*
3166
* @param[out] pv_api_op
3167
*  Pointer to output argument structure
3168
*
3169
* @returns  Status
3170
*
3171
* @remarks
3172
*
3173
*
3174
*******************************************************************************
3175
*/
3176
3177
WORD32 ihevcd_get_frame_dimensions(iv_obj_t *ps_codec_obj,
3178
                                   void *pv_api_ip,
3179
                                   void *pv_api_op)
3180
0
{
3181
0
    ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
3182
0
    ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
3183
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3184
0
    WORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset;
3185
0
    ps_ip = (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
3186
0
    ps_op = (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
3187
0
    UNUSED(ps_ip);
3188
0
    if(ps_codec->i4_sps_done)
3189
0
    {
3190
0
        disp_wd = ps_codec->i4_disp_wd;
3191
0
        disp_ht = ps_codec->i4_disp_ht;
3192
3193
0
        if(0 == ps_codec->i4_share_disp_buf)
3194
0
        {
3195
0
            buffer_wd = disp_wd;
3196
0
            buffer_ht = disp_ht;
3197
0
        }
3198
0
        else
3199
0
        {
3200
0
            buffer_wd = ps_codec->i4_strd;
3201
0
            buffer_ht = ps_codec->i4_ht + PAD_HT;
3202
0
        }
3203
0
    }
3204
0
    else
3205
0
    {
3206
3207
0
        disp_wd = 0;
3208
0
        disp_ht = 0;
3209
3210
0
        if(0 == ps_codec->i4_share_disp_buf)
3211
0
        {
3212
0
            buffer_wd = disp_wd;
3213
0
            buffer_ht = disp_ht;
3214
0
        }
3215
0
        else
3216
0
        {
3217
0
            buffer_wd = ALIGN16(disp_wd) + PAD_WD;
3218
0
            buffer_ht = ALIGN16(disp_ht) + PAD_HT;
3219
3220
0
        }
3221
0
    }
3222
0
    if(ps_codec->i4_strd > buffer_wd)
3223
0
        buffer_wd = ps_codec->i4_strd;
3224
3225
0
    if(0 == ps_codec->i4_share_disp_buf)
3226
0
    {
3227
0
        x_offset = 0;
3228
0
        y_offset = 0;
3229
0
    }
3230
0
    else
3231
0
    {
3232
0
        y_offset = PAD_TOP;
3233
0
        x_offset = PAD_LEFT;
3234
0
    }
3235
3236
0
    ps_op->u4_disp_wd[0] = disp_wd;
3237
0
    ps_op->u4_disp_ht[0] = disp_ht;
3238
0
    ps_op->u4_buffer_wd[0] = buffer_wd;
3239
0
    ps_op->u4_buffer_ht[0] = buffer_ht;
3240
0
    ps_op->u4_x_offset[0] = x_offset;
3241
0
    ps_op->u4_y_offset[0] = y_offset;
3242
3243
0
    ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1)
3244
0
                    >> 1);
3245
0
    ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1)
3246
0
                    >> 1);
3247
0
    ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0]
3248
0
                    >> 1);
3249
0
    ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0]
3250
0
                    >> 1);
3251
0
    ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = (ps_op->u4_x_offset[0]
3252
0
                    >> 1);
3253
0
    ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = (ps_op->u4_y_offset[0]
3254
0
                    >> 1);
3255
3256
0
    if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
3257
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
3258
0
    {
3259
0
        ps_op->u4_disp_wd[2] = 0;
3260
0
        ps_op->u4_disp_ht[2] = 0;
3261
0
        ps_op->u4_buffer_wd[2] = 0;
3262
0
        ps_op->u4_buffer_ht[2] = 0;
3263
0
        ps_op->u4_x_offset[2] = 0;
3264
0
        ps_op->u4_y_offset[2] = 0;
3265
3266
0
        ps_op->u4_disp_wd[1] <<= 1;
3267
0
        ps_op->u4_buffer_wd[1] <<= 1;
3268
0
        ps_op->u4_x_offset[1] <<= 1;
3269
0
    }
3270
0
    else if(ps_codec->e_chroma_fmt == IV_GRAY)
3271
0
    {
3272
0
        ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = 0;
3273
0
        ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = 0;
3274
0
        ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = 0;
3275
0
        ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = 0;
3276
0
        ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = 0;
3277
0
        ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = 0;
3278
0
    }
3279
3280
0
    return IV_SUCCESS;
3281
3282
0
}
3283
3284
3285
/**
3286
*******************************************************************************
3287
*
3288
* @brief
3289
*  Gets vui parameters
3290
*
3291
* @par Description:
3292
*  Gets VUI parameters
3293
*
3294
* @param[in] ps_codec_obj
3295
*  Pointer to codec object at API level
3296
*
3297
* @param[in] pv_api_ip
3298
*  Pointer to input argument structure
3299
*
3300
* @param[out] pv_api_op
3301
*  Pointer to output argument structure
3302
*
3303
* @returns  Status
3304
*
3305
* @remarks
3306
*
3307
*
3308
*******************************************************************************
3309
*/
3310
WORD32 ihevcd_get_vui_params(iv_obj_t *ps_codec_obj,
3311
                             void *pv_api_ip,
3312
                             void *pv_api_op)
3313
0
{
3314
0
    ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
3315
0
    ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
3316
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3317
0
    sps_t *ps_sps;
3318
0
    vui_t *ps_vui;
3319
0
    WORD32 i;
3320
3321
0
    ps_ip = (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
3322
0
    ps_op = (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
3323
3324
0
    if(0 == ps_codec->i4_sps_done)
3325
0
    {
3326
0
        ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3327
0
        return IV_FAIL;
3328
0
    }
3329
3330
0
    ps_sps = ps_codec->s_parse.ps_sps;
3331
0
    if(0 == ps_sps->i1_sps_valid || 0 == ps_sps->i1_vui_parameters_present_flag)
3332
0
    {
3333
0
        WORD32 sps_idx = 0;
3334
0
        ps_sps = ps_codec->ps_sps_base;
3335
3336
0
        while((0 == ps_sps->i1_sps_valid) || (0 == ps_sps->i1_vui_parameters_present_flag))
3337
0
        {
3338
0
            sps_idx++;
3339
0
            ps_sps++;
3340
3341
0
            if(sps_idx == MAX_SPS_CNT - 1)
3342
0
            {
3343
0
                ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3344
0
                return IV_FAIL;
3345
0
            }
3346
0
        }
3347
0
    }
3348
3349
0
    ps_vui = &ps_sps->s_vui_parameters;
3350
0
    UNUSED(ps_ip);
3351
3352
0
    ps_op->u1_aspect_ratio_info_present_flag         =  ps_vui->u1_aspect_ratio_info_present_flag;
3353
0
    ps_op->u1_aspect_ratio_idc                       =  ps_vui->u1_aspect_ratio_idc;
3354
0
    ps_op->u2_sar_width                              =  ps_vui->u2_sar_width;
3355
0
    ps_op->u2_sar_height                             =  ps_vui->u2_sar_height;
3356
0
    ps_op->u1_overscan_info_present_flag             =  ps_vui->u1_overscan_info_present_flag;
3357
0
    ps_op->u1_overscan_appropriate_flag              =  ps_vui->u1_overscan_appropriate_flag;
3358
0
    ps_op->u1_video_signal_type_present_flag         =  ps_vui->u1_video_signal_type_present_flag;
3359
0
    ps_op->u1_video_format                           =  ps_vui->u1_video_format;
3360
0
    ps_op->u1_video_full_range_flag                  =  ps_vui->u1_video_full_range_flag;
3361
0
    ps_op->u1_colour_description_present_flag        =  ps_vui->u1_colour_description_present_flag;
3362
0
    ps_op->u1_colour_primaries                       =  ps_vui->u1_colour_primaries;
3363
0
    ps_op->u1_transfer_characteristics               =  ps_vui->u1_transfer_characteristics;
3364
0
    ps_op->u1_matrix_coefficients                    =  ps_vui->u1_matrix_coefficients;
3365
0
    ps_op->u1_chroma_loc_info_present_flag           =  ps_vui->u1_chroma_loc_info_present_flag;
3366
0
    ps_op->u1_chroma_sample_loc_type_top_field       =  ps_vui->u1_chroma_sample_loc_type_top_field;
3367
0
    ps_op->u1_chroma_sample_loc_type_bottom_field    =  ps_vui->u1_chroma_sample_loc_type_bottom_field;
3368
0
    ps_op->u1_neutral_chroma_indication_flag         =  ps_vui->u1_neutral_chroma_indication_flag;
3369
0
    ps_op->u1_field_seq_flag                         =  ps_vui->u1_field_seq_flag;
3370
0
    ps_op->u1_frame_field_info_present_flag          =  ps_vui->u1_frame_field_info_present_flag;
3371
0
    ps_op->u1_default_display_window_flag            =  ps_vui->u1_default_display_window_flag;
3372
0
    ps_op->u4_def_disp_win_left_offset               =  ps_vui->u4_def_disp_win_left_offset;
3373
0
    ps_op->u4_def_disp_win_right_offset              =  ps_vui->u4_def_disp_win_right_offset;
3374
0
    ps_op->u4_def_disp_win_top_offset                =  ps_vui->u4_def_disp_win_top_offset;
3375
0
    ps_op->u4_def_disp_win_bottom_offset             =  ps_vui->u4_def_disp_win_bottom_offset;
3376
0
    ps_op->u1_vui_hrd_parameters_present_flag        =  ps_vui->u1_vui_hrd_parameters_present_flag;
3377
0
    ps_op->u1_vui_timing_info_present_flag           =  ps_vui->u1_vui_timing_info_present_flag;
3378
0
    ps_op->u4_vui_num_units_in_tick                  =  ps_vui->u4_vui_num_units_in_tick;
3379
0
    ps_op->u4_vui_time_scale                         =  ps_vui->u4_vui_time_scale;
3380
0
    ps_op->u1_poc_proportional_to_timing_flag        =  ps_vui->u1_poc_proportional_to_timing_flag;
3381
0
    ps_op->u4_num_ticks_poc_diff_one_minus1          =  ps_vui->u4_num_ticks_poc_diff_one_minus1;
3382
0
    ps_op->u1_bitstream_restriction_flag             =  ps_vui->u1_bitstream_restriction_flag;
3383
0
    ps_op->u1_tiles_fixed_structure_flag             =  ps_vui->u1_tiles_fixed_structure_flag;
3384
0
    ps_op->u1_motion_vectors_over_pic_boundaries_flag =  ps_vui->u1_motion_vectors_over_pic_boundaries_flag;
3385
0
    ps_op->u1_restricted_ref_pic_lists_flag          =  ps_vui->u1_restricted_ref_pic_lists_flag;
3386
0
    ps_op->u4_min_spatial_segmentation_idc           =  ps_vui->u4_min_spatial_segmentation_idc;
3387
0
    ps_op->u1_max_bytes_per_pic_denom                =  ps_vui->u1_max_bytes_per_pic_denom;
3388
0
    ps_op->u1_max_bits_per_mincu_denom               =  ps_vui->u1_max_bits_per_mincu_denom;
3389
0
    ps_op->u1_log2_max_mv_length_horizontal          =  ps_vui->u1_log2_max_mv_length_horizontal;
3390
0
    ps_op->u1_log2_max_mv_length_vertical            =  ps_vui->u1_log2_max_mv_length_vertical;
3391
3392
3393
    /* HRD parameters */
3394
0
    ps_op->u1_timing_info_present_flag                         =    ps_vui->s_vui_hrd_parameters.u1_timing_info_present_flag;
3395
0
    ps_op->u4_num_units_in_tick                                =    ps_vui->s_vui_hrd_parameters.u4_num_units_in_tick;
3396
0
    ps_op->u4_time_scale                                       =    ps_vui->s_vui_hrd_parameters.u4_time_scale;
3397
0
    ps_op->u1_nal_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_nal_hrd_parameters_present_flag;
3398
0
    ps_op->u1_vcl_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_vcl_hrd_parameters_present_flag;
3399
0
    ps_op->u1_cpbdpb_delays_present_flag                       =    ps_vui->s_vui_hrd_parameters.u1_cpbdpb_delays_present_flag;
3400
0
    ps_op->u1_sub_pic_cpb_params_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_present_flag;
3401
0
    ps_op->u1_tick_divisor_minus2                              =    ps_vui->s_vui_hrd_parameters.u1_tick_divisor_minus2;
3402
0
    ps_op->u1_du_cpb_removal_delay_increment_length_minus1     =    ps_vui->s_vui_hrd_parameters.u1_du_cpb_removal_delay_increment_length_minus1;
3403
0
    ps_op->u1_sub_pic_cpb_params_in_pic_timing_sei_flag        =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_in_pic_timing_sei_flag;
3404
0
    ps_op->u1_dpb_output_delay_du_length_minus1                =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_du_length_minus1;
3405
0
    ps_op->u4_bit_rate_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_bit_rate_scale;
3406
0
    ps_op->u4_cpb_size_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_scale;
3407
0
    ps_op->u4_cpb_size_du_scale                                =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_du_scale;
3408
0
    ps_op->u1_initial_cpb_removal_delay_length_minus1          =    ps_vui->s_vui_hrd_parameters.u1_initial_cpb_removal_delay_length_minus1;
3409
0
    ps_op->u1_au_cpb_removal_delay_length_minus1               =    ps_vui->s_vui_hrd_parameters.u1_au_cpb_removal_delay_length_minus1;
3410
0
    ps_op->u1_dpb_output_delay_length_minus1                   =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_length_minus1;
3411
3412
0
    for(i = 0; i < 6; i++)
3413
0
    {
3414
0
        ps_op->au1_fixed_pic_rate_general_flag[i]                  =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_general_flag[i];
3415
0
        ps_op->au1_fixed_pic_rate_within_cvs_flag[i]               =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_within_cvs_flag[i];
3416
0
        ps_op->au2_elemental_duration_in_tc_minus1[i]              =    ps_vui->s_vui_hrd_parameters.au2_elemental_duration_in_tc_minus1[i];
3417
0
        ps_op->au1_low_delay_hrd_flag[i]                           =    ps_vui->s_vui_hrd_parameters.au1_low_delay_hrd_flag[i];
3418
0
        ps_op->au1_cpb_cnt_minus1[i]                               =    ps_vui->s_vui_hrd_parameters.au1_cpb_cnt_minus1[i];
3419
0
    }
3420
3421
3422
0
    return IV_SUCCESS;
3423
0
}
3424
3425
#ifndef DISABLE_SEI
3426
/**
3427
*******************************************************************************
3428
*
3429
* @brief
3430
*  Gets SEI mastering display color volume parameters
3431
*
3432
* @par Description:
3433
*  Gets SEI mastering display color volume parameters
3434
*
3435
* @param[in] ps_codec_obj
3436
*  Pointer to codec object at API level
3437
*
3438
* @param[in] pv_api_ip
3439
*  Pointer to input argument structure
3440
*
3441
* @param[out] pv_api_op
3442
*  Pointer to output argument structure
3443
*
3444
* @returns  Status
3445
*
3446
* @remarks
3447
*
3448
*
3449
*******************************************************************************
3450
*/
3451
WORD32 ihevcd_get_sei_mastering_params(iv_obj_t *ps_codec_obj,
3452
                             void *pv_api_ip,
3453
                             void *pv_api_op)
3454
0
{
3455
0
    ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
3456
0
    ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
3457
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3458
0
    sei_params_t *ps_sei;
3459
0
    mastering_dis_col_vol_sei_params_t *ps_mastering_dis_col_vol;
3460
0
    WORD32 i;
3461
3462
0
    ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
3463
0
    ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
3464
0
    UNUSED(ps_ip);
3465
0
    if(NULL == ps_codec->ps_disp_buf)
3466
0
    {
3467
0
        ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3468
0
        return IV_FAIL;
3469
0
    }
3470
0
    ps_sei = &ps_codec->ps_disp_buf->s_sei_params;
3471
0
    if((0 == ps_sei->i4_sei_mastering_disp_colour_vol_params_present_flags)
3472
0
                    || (0 == ps_sei->i1_sei_parameters_present_flag))
3473
0
    {
3474
0
        ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3475
0
        return IV_FAIL;
3476
0
    }
3477
3478
0
    ps_mastering_dis_col_vol = &ps_sei->s_mastering_dis_col_vol_sei_params;
3479
3480
0
    for(i = 0; i < 3; i++)
3481
0
    {
3482
0
        ps_op->au2_display_primaries_x[i] =
3483
0
                    ps_mastering_dis_col_vol->au2_display_primaries_x[i];
3484
3485
0
        ps_op->au2_display_primaries_y[i] =
3486
0
                    ps_mastering_dis_col_vol->au2_display_primaries_y[i];
3487
0
    }
3488
3489
0
    ps_op->u2_white_point_x = ps_mastering_dis_col_vol->u2_white_point_x;
3490
3491
0
    ps_op->u2_white_point_y = ps_mastering_dis_col_vol->u2_white_point_y;
3492
3493
0
    ps_op->u4_max_display_mastering_luminance =
3494
0
                    ps_mastering_dis_col_vol->u4_max_display_mastering_luminance;
3495
3496
0
    ps_op->u4_min_display_mastering_luminance =
3497
0
                    ps_mastering_dis_col_vol->u4_min_display_mastering_luminance;
3498
3499
0
    return IV_SUCCESS;
3500
0
}
3501
#endif
3502
3503
/**
3504
*******************************************************************************
3505
*
3506
* @brief
3507
*  Sets Processor type
3508
*
3509
* @par Description:
3510
*  Sets Processor type
3511
*
3512
* @param[in] ps_codec_obj
3513
*  Pointer to codec object at API level
3514
*
3515
* @param[in] pv_api_ip
3516
*  Pointer to input argument structure
3517
*
3518
* @param[out] pv_api_op
3519
*  Pointer to output argument structure
3520
*
3521
* @returns  Status
3522
*
3523
* @remarks
3524
*
3525
*
3526
*******************************************************************************
3527
*/
3528
3529
WORD32 ihevcd_set_processor(iv_obj_t *ps_codec_obj,
3530
                            void *pv_api_ip,
3531
                            void *pv_api_op)
3532
4.16k
{
3533
4.16k
    ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
3534
4.16k
    ihevcd_cxa_ctl_set_processor_op_t *ps_op;
3535
4.16k
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3536
3537
4.16k
    ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
3538
4.16k
    ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
3539
3540
4.16k
    ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch;
3541
4.16k
    ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc;
3542
3543
4.16k
    ihevcd_init_function_ptr(ps_codec);
3544
3545
4.16k
    ihevcd_update_function_ptr(ps_codec);
3546
3547
4.16k
    if(ps_codec->e_processor_soc && (ps_codec->e_processor_soc <= SOC_HISI_37X))
3548
0
    {
3549
        /* 8th bit indicates if format conversion is to be done ahead */
3550
0
        if(ps_codec->e_processor_soc & 0x80)
3551
0
            ps_codec->u4_enable_fmt_conv_ahead = 1;
3552
3553
        /* Lower 7 bit indicate NCTB - if non-zero */
3554
0
        ps_codec->e_processor_soc &= 0x7F;
3555
3556
0
        if(ps_codec->e_processor_soc)
3557
0
            ps_codec->u4_nctb = ps_codec->e_processor_soc;
3558
3559
3560
0
    }
3561
3562
4.16k
    if((ps_codec->e_processor_soc == SOC_HISI_37X) && (ps_codec->i4_num_cores == 2))
3563
0
    {
3564
0
        ps_codec->u4_nctb = 2;
3565
0
    }
3566
3567
3568
4.16k
    ps_op->u4_error_code = 0;
3569
4.16k
    return IV_SUCCESS;
3570
4.16k
}
3571
3572
/**
3573
*******************************************************************************
3574
*
3575
* @brief
3576
*  Sets Number of cores that can be used in the codec. Codec uses these many
3577
* threads for decoding
3578
*
3579
* @par Description:
3580
*  Sets number of cores
3581
*
3582
* @param[in] ps_codec_obj
3583
*  Pointer to codec object at API level
3584
*
3585
* @param[in] pv_api_ip
3586
*  Pointer to input argument structure
3587
*
3588
* @param[out] pv_api_op
3589
*  Pointer to output argument structure
3590
*
3591
* @returns  Status
3592
*
3593
* @remarks
3594
*
3595
*
3596
*******************************************************************************
3597
*/
3598
3599
WORD32 ihevcd_set_num_cores(iv_obj_t *ps_codec_obj,
3600
                            void *pv_api_ip,
3601
                            void *pv_api_op)
3602
4.16k
{
3603
4.16k
    ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
3604
4.16k
    ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
3605
4.16k
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3606
3607
4.16k
    ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
3608
4.16k
    ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
3609
3610
4.16k
    ps_codec->i4_num_cores = ps_ip->u4_num_cores;
3611
4.16k
    ps_op->u4_error_code = 0;
3612
4.16k
    return IV_SUCCESS;
3613
4.16k
}
3614
/**
3615
*******************************************************************************
3616
*
3617
* @brief
3618
*  Codec control call
3619
*
3620
* @par Description:
3621
*  Codec control call which in turn calls appropriate calls  based on
3622
* subcommand
3623
*
3624
* @param[in] ps_codec_obj
3625
*  Pointer to codec object at API level
3626
*
3627
* @param[in] pv_api_ip
3628
*  Pointer to input argument structure
3629
*
3630
* @param[out] pv_api_op
3631
*  Pointer to output argument structure
3632
*
3633
* @returns  Status
3634
*
3635
* @remarks
3636
*
3637
*
3638
*******************************************************************************
3639
*/
3640
3641
WORD32 ihevcd_ctl(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
3642
19.8k
{
3643
19.8k
    ivd_ctl_set_config_ip_t *ps_ctl_ip;
3644
19.8k
    ivd_ctl_set_config_op_t *ps_ctl_op;
3645
19.8k
    WORD32 ret = 0;
3646
19.8k
    WORD32 subcommand;
3647
19.8k
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3648
3649
19.8k
    ps_ctl_ip = (ivd_ctl_set_config_ip_t *)pv_api_ip;
3650
19.8k
    ps_ctl_op = (ivd_ctl_set_config_op_t *)pv_api_op;
3651
3652
19.8k
    if(ps_codec->i4_init_done != 1)
3653
0
    {
3654
0
        ps_ctl_op->u4_error_code |= 1 << IVD_FATALERROR;
3655
0
        ps_ctl_op->u4_error_code |= IHEVCD_INIT_NOT_DONE;
3656
0
        return IV_FAIL;
3657
0
    }
3658
19.8k
    subcommand = ps_ctl_ip->e_sub_cmd;
3659
3660
19.8k
    switch(subcommand)
3661
19.8k
    {
3662
0
        case IVD_CMD_CTL_GETPARAMS:
3663
0
            ret = ihevcd_get_status(ps_codec_obj, (void *)pv_api_ip,
3664
0
                                    (void *)pv_api_op);
3665
0
            break;
3666
8.33k
        case IVD_CMD_CTL_SETPARAMS:
3667
8.33k
            ret = ihevcd_set_params(ps_codec_obj, (void *)pv_api_ip,
3668
8.33k
                                    (void *)pv_api_op);
3669
8.33k
            break;
3670
3.13k
        case IVD_CMD_CTL_RESET:
3671
3.13k
            ret = ihevcd_reset(ps_codec_obj, (void *)pv_api_ip,
3672
3.13k
                               (void *)pv_api_op);
3673
3.13k
            break;
3674
0
        case IVD_CMD_CTL_SETDEFAULT:
3675
0
        {
3676
0
            ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
3677
0
                            (ivd_ctl_set_config_op_t *)pv_api_op;
3678
3679
0
            ret = ihevcd_set_default_params(ps_codec);
3680
0
            if(IV_SUCCESS == ret)
3681
0
                s_ctl_dynparams_op->u4_error_code = 0;
3682
0
            break;
3683
0
        }
3684
0
        case IVD_CMD_CTL_FLUSH:
3685
0
            ret = ihevcd_set_flush_mode(ps_codec_obj, (void *)pv_api_ip,
3686
0
                                        (void *)pv_api_op);
3687
0
            break;
3688
0
        case IVD_CMD_CTL_GETBUFINFO:
3689
0
            ret = ihevcd_get_buf_info(ps_codec_obj, (void *)pv_api_ip,
3690
0
                                      (void *)pv_api_op);
3691
0
            break;
3692
0
        case IVD_CMD_CTL_GETVERSION:
3693
0
        {
3694
0
            ivd_ctl_getversioninfo_ip_t *ps_ip;
3695
0
            ivd_ctl_getversioninfo_op_t *ps_op;
3696
0
            IV_API_CALL_STATUS_T ret;
3697
0
            ps_ip = (ivd_ctl_getversioninfo_ip_t *)pv_api_ip;
3698
0
            ps_op = (ivd_ctl_getversioninfo_op_t *)pv_api_op;
3699
3700
0
            ps_op->u4_error_code = IV_SUCCESS;
3701
3702
0
            if((WORD32)ps_ip->u4_version_buffer_size <= 0)
3703
0
            {
3704
0
                ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3705
0
                ret = IV_FAIL;
3706
0
            }
3707
0
            else
3708
0
            {
3709
0
                ret = ihevcd_get_version((CHAR *)ps_ip->pv_version_buffer,
3710
0
                                         ps_ip->u4_version_buffer_size);
3711
0
                if(ret != IV_SUCCESS)
3712
0
                {
3713
0
                    ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3714
0
                    ret = IV_FAIL;
3715
0
                }
3716
0
            }
3717
0
        }
3718
0
            break;
3719
0
        case IHEVCD_CXA_CMD_CTL_DEGRADE:
3720
0
            ret = ihevcd_set_degrade(ps_codec_obj, (void *)pv_api_ip,
3721
0
                            (void *)pv_api_op);
3722
0
            break;
3723
4.16k
        case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
3724
4.16k
            ret = ihevcd_set_num_cores(ps_codec_obj, (void *)pv_api_ip,
3725
4.16k
                                       (void *)pv_api_op);
3726
4.16k
            break;
3727
0
        case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
3728
0
            ret = ihevcd_get_frame_dimensions(ps_codec_obj, (void *)pv_api_ip,
3729
0
                                              (void *)pv_api_op);
3730
0
            break;
3731
0
        case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
3732
0
            ret = ihevcd_get_vui_params(ps_codec_obj, (void *)pv_api_ip,
3733
0
                                        (void *)pv_api_op);
3734
0
            break;
3735
0
        case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
3736
0
#ifndef DISABLE_SEI
3737
0
            ret = ihevcd_get_sei_mastering_params(ps_codec_obj, (void *)pv_api_ip,
3738
0
                                        (void *)pv_api_op);
3739
#else
3740
            {
3741
                ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op =
3742
                        (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
3743
                ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3744
                return IV_FAIL;
3745
            }
3746
#endif
3747
0
            break;
3748
4.16k
        case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
3749
4.16k
            ret = ihevcd_set_processor(ps_codec_obj, (void *)pv_api_ip,
3750
4.16k
                            (void *)pv_api_op);
3751
4.16k
            break;
3752
0
        default:
3753
0
            DEBUG("\nDo nothing\n");
3754
0
            break;
3755
19.8k
    }
3756
3757
19.8k
    return ret;
3758
19.8k
}
3759
3760
/**
3761
*******************************************************************************
3762
*
3763
* @brief
3764
*  Codecs entry point function. All the function calls to  the codec are
3765
* done using this function with different  values specified in command
3766
*
3767
* @par Description:
3768
*  Arguments are tested for validity and then based on the  command
3769
* appropriate function is called
3770
*
3771
* @param[in] ps_handle
3772
*  API level handle for codec
3773
*
3774
* @param[in] pv_api_ip
3775
*  Input argument structure
3776
*
3777
* @param[out] pv_api_op
3778
*  Output argument structure
3779
*
3780
* @returns  Status of the function corresponding to command
3781
*
3782
* @remarks
3783
*
3784
*
3785
*******************************************************************************
3786
*/
3787
IV_API_CALL_STATUS_T ihevcd_cxa_api_function(iv_obj_t *ps_handle,
3788
                                             void *pv_api_ip,
3789
                                             void *pv_api_op)
3790
202k
{
3791
202k
    WORD32 command;
3792
202k
    UWORD32 *pu4_ptr_cmd;
3793
202k
    WORD32 ret = 0;
3794
202k
    IV_API_CALL_STATUS_T e_status;
3795
202k
    e_status = api_check_struct_sanity(ps_handle, pv_api_ip, pv_api_op);
3796
3797
202k
    if(e_status != IV_SUCCESS)
3798
1.35k
    {
3799
1.35k
        DEBUG("error code = %d\n", *((UWORD32 *)pv_api_op + 1));
3800
1.35k
        return IV_FAIL;
3801
1.35k
    }
3802
3803
200k
    pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
3804
200k
    pu4_ptr_cmd++;
3805
3806
200k
    command = *pu4_ptr_cmd;
3807
3808
200k
    switch(command)
3809
200k
    {
3810
4.16k
        case IVD_CMD_CREATE:
3811
4.16k
            ret = ihevcd_create(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3812
4.16k
            break;
3813
4.16k
        case IVD_CMD_DELETE:
3814
4.16k
            ret = ihevcd_delete(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3815
4.16k
            break;
3816
3817
172k
        case IVD_CMD_VIDEO_DECODE:
3818
172k
            ret = ihevcd_decode(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3819
172k
            break;
3820
3821
0
        case IVD_CMD_GET_DISPLAY_FRAME:
3822
            //ret = ihevcd_get_display_frame(ps_handle,(void *)pv_api_ip,(void *)pv_api_op);
3823
0
            break;
3824
3825
0
        case IVD_CMD_SET_DISPLAY_FRAME:
3826
0
            ret = ihevcd_set_display_frame(ps_handle, (void *)pv_api_ip,
3827
0
                                           (void *)pv_api_op);
3828
3829
0
            break;
3830
3831
0
        case IVD_CMD_REL_DISPLAY_FRAME:
3832
0
            ret = ihevcd_rel_display_frame(ps_handle, (void *)pv_api_ip,
3833
0
                                           (void *)pv_api_op);
3834
0
            break;
3835
3836
19.8k
        case IVD_CMD_VIDEO_CTL:
3837
19.8k
            ret = ihevcd_ctl(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3838
19.8k
            break;
3839
0
        default:
3840
0
            ret = IV_FAIL;
3841
0
            break;
3842
200k
    }
3843
3844
200k
    return (IV_API_CALL_STATUS_T)ret;
3845
200k
}
3846