Coverage Report

Created: 2026-03-11 06:59

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/libhevc/decoder/ihevcd_api.c
Line
Count
Source
1
/******************************************************************************
2
*
3
* Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4
*
5
* Licensed under the Apache License, Version 2.0 (the "License");
6
* you may not use this file except in compliance with the License.
7
* You may obtain a copy of the License at:
8
*
9
* http://www.apache.org/licenses/LICENSE-2.0
10
*
11
* Unless required by applicable law or agreed to in writing, software
12
* distributed under the License is distributed on an "AS IS" BASIS,
13
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
* See the License for the specific language governing permissions and
15
* limitations under the License.
16
*
17
******************************************************************************/
18
/**
19
*******************************************************************************
20
* @file
21
*  ihevcd_api.c
22
*
23
* @brief
24
*  Contains api functions definitions for HEVC decoder
25
*
26
* @author
27
*  Harish
28
*
29
* @par List of Functions:
30
* - api_check_struct_sanity()
31
* - ihevcd_get_version()
32
* - ihevcd_set_default_params()
33
* - ihevcd_init()
34
* - ihevcd_get_num_rec()
35
* - ihevcd_allocate_static_bufs()
36
* - ihevcd_create()
37
* - ihevcd_retrieve_memrec()
38
* - ihevcd_set_display_frame()
39
* - ihevcd_set_flush_mode()
40
* - ihevcd_get_status()
41
* - ihevcd_get_buf_info()
42
* - ihevcd_set_params()
43
* - ihevcd_reset()
44
* - ihevcd_rel_display_frame()
45
* - ihevcd_disable_deblk()
46
* - ihevcd_get_frame_dimensions()
47
* - ihevcd_set_num_cores()
48
* - ihevcd_ctl()
49
* - ihevcd_cxa_api_function()
50
*
51
* @remarks
52
*  None
53
*
54
*******************************************************************************
55
*/
56
/*****************************************************************************/
57
/* File Includes                                                             */
58
/*****************************************************************************/
59
#include <stdio.h>
60
#include <stddef.h>
61
#include <stdlib.h>
62
#include <string.h>
63
64
#include "ihevc_typedefs.h"
65
#include "iv.h"
66
#include "ivd.h"
67
#include "ihevcd_cxa.h"
68
#include "ithread.h"
69
70
#include "ihevc_defs.h"
71
#include "ihevc_debug.h"
72
73
#include "ihevc_structs.h"
74
#include "ihevc_macros.h"
75
#include "ihevc_platform_macros.h"
76
77
#include "ihevc_buf_mgr.h"
78
#include "ihevc_dpb_mgr.h"
79
#include "ihevc_disp_mgr.h"
80
#include "ihevc_common_tables.h"
81
#include "ihevc_cabac_tables.h"
82
#include "ihevc_error.h"
83
84
#include "ihevcd_defs.h"
85
#include "ihevcd_trace.h"
86
87
#include "ihevcd_function_selector.h"
88
#include "ihevcd_structs.h"
89
#include "ihevcd_error.h"
90
#include "ihevcd_utils.h"
91
#include "ihevcd_decode.h"
92
#include "ihevcd_job_queue.h"
93
#include "ihevcd_statistics.h"
94
95
96
572k
#define ALIGNED_FREE(ps_codec, y) \
97
572k
if(y) {ps_codec->pf_aligned_free(ps_codec->pv_mem_ctxt, ((void *)y)); (y) = NULL;}
98
99
/*****************************************************************************/
100
/* Function Prototypes                                                       */
101
/*****************************************************************************/
102
IV_API_CALL_STATUS_T ihevcd_get_version(CHAR *pc_version_string,
103
                                        UWORD32 u4_version_buffer_size);
104
WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec);
105
106
107
/**
108
*******************************************************************************
109
*
110
* @brief
111
*  Used to test arguments for corresponding API call
112
*
113
* @par Description:
114
*  For each command the arguments are validated
115
*
116
* @param[in] ps_handle
117
*  Codec handle at API level
118
*
119
* @param[in] pv_api_ip
120
*  Pointer to input structure
121
*
122
* @param[out] pv_api_op
123
*  Pointer to output structure
124
*
125
* @returns  Status of error checking
126
*
127
* @remarks
128
*
129
*
130
*******************************************************************************
131
*/
132
133
static IV_API_CALL_STATUS_T api_check_struct_sanity(iv_obj_t *ps_handle,
134
                                                    void *pv_api_ip,
135
                                                    void *pv_api_op)
136
337k
{
137
337k
    IVD_API_COMMAND_TYPE_T e_cmd;
138
337k
    UWORD32 *pu4_api_ip;
139
337k
    UWORD32 *pu4_api_op;
140
337k
    WORD32 i;
141
142
337k
    if(NULL == pv_api_op)
143
0
        return (IV_FAIL);
144
145
337k
    if(NULL == pv_api_ip)
146
0
        return (IV_FAIL);
147
148
337k
    pu4_api_ip = (UWORD32 *)pv_api_ip;
149
337k
    pu4_api_op = (UWORD32 *)pv_api_op;
150
337k
    e_cmd = (IVD_API_COMMAND_TYPE_T)*(pu4_api_ip + 1);
151
152
337k
    *(pu4_api_op + 1) = 0;
153
    /* error checks on handle */
154
337k
    switch((WORD32)e_cmd)
155
337k
    {
156
9.25k
        case IVD_CMD_CREATE:
157
9.25k
            break;
158
159
0
        case IVD_CMD_REL_DISPLAY_FRAME:
160
0
        case IVD_CMD_SET_DISPLAY_FRAME:
161
0
        case IVD_CMD_GET_DISPLAY_FRAME:
162
279k
        case IVD_CMD_VIDEO_DECODE:
163
288k
        case IVD_CMD_DELETE:
164
328k
        case IVD_CMD_VIDEO_CTL:
165
328k
            if(ps_handle == NULL)
166
0
            {
167
0
                *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
168
0
                *(pu4_api_op + 1) |= IVD_HANDLE_NULL;
169
0
                return IV_FAIL;
170
0
            }
171
172
328k
            if(ps_handle->u4_size != sizeof(iv_obj_t))
173
0
            {
174
0
                *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
175
0
                *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT;
176
0
                return IV_FAIL;
177
0
            }
178
179
180
328k
            if(ps_handle->pv_codec_handle == NULL)
181
0
            {
182
0
                *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
183
0
                *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL;
184
0
                return IV_FAIL;
185
0
            }
186
328k
            break;
187
328k
        default:
188
0
            *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
189
0
            *(pu4_api_op + 1) |= IVD_INVALID_API_CMD;
190
0
            return IV_FAIL;
191
337k
    }
192
193
337k
    switch((WORD32)e_cmd)
194
337k
    {
195
9.25k
        case IVD_CMD_CREATE:
196
9.25k
        {
197
9.25k
            ihevcd_cxa_create_ip_t *ps_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
198
9.25k
            ihevcd_cxa_create_op_t *ps_op = (ihevcd_cxa_create_op_t *)pv_api_op;
199
200
201
9.25k
            ps_op->s_ivd_create_op_t.u4_error_code = 0;
202
203
9.25k
            if((ps_ip->s_ivd_create_ip_t.u4_size > sizeof(ihevcd_cxa_create_ip_t))
204
9.25k
                            || (ps_ip->s_ivd_create_ip_t.u4_size
205
9.25k
                                            < sizeof(ivd_create_ip_t)))
206
0
            {
207
0
                ps_op->s_ivd_create_op_t.u4_error_code |= 1
208
0
                                << IVD_UNSUPPORTEDPARAM;
209
0
                ps_op->s_ivd_create_op_t.u4_error_code |=
210
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
211
212
0
                return (IV_FAIL);
213
0
            }
214
215
9.25k
            if((ps_op->s_ivd_create_op_t.u4_size != sizeof(ihevcd_cxa_create_op_t))
216
0
                            && (ps_op->s_ivd_create_op_t.u4_size
217
0
                                            != sizeof(ivd_create_op_t)))
218
0
            {
219
0
                ps_op->s_ivd_create_op_t.u4_error_code |= 1
220
0
                                << IVD_UNSUPPORTEDPARAM;
221
0
                ps_op->s_ivd_create_op_t.u4_error_code |=
222
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
223
224
0
                return (IV_FAIL);
225
0
            }
226
227
228
9.25k
            if((ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P)
229
6.24k
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
230
6.24k
                                            != IV_YUV_420SP_UV)
231
3.17k
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
232
3.17k
                                            != IV_YUV_420SP_VU)
233
1.75k
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
234
1.75k
                                            != IV_GRAY)
235
0
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
236
0
                                            != IV_YUV_444P)
237
0
                            && (ps_ip->s_ivd_create_ip_t.e_output_format
238
0
                                             != IV_YUV_422P))
239
0
            {
240
0
                ps_op->s_ivd_create_op_t.u4_error_code |= 1
241
0
                                << IVD_UNSUPPORTEDPARAM;
242
0
                ps_op->s_ivd_create_op_t.u4_error_code |=
243
0
                                IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED;
244
245
0
                return (IV_FAIL);
246
0
            }
247
248
            /* Shared display mode is supported only for 420SP and 420P formats */
249
9.25k
            if((ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P)
250
6.24k
                            && (ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_UV)
251
3.17k
                            && (ps_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_VU)
252
1.75k
                            && ps_ip->s_ivd_create_ip_t.u4_share_disp_buf == 1)
253
0
            {
254
0
                ps_op->s_ivd_create_op_t.u4_error_code |= 1
255
0
                                << IVD_UNSUPPORTEDPARAM;
256
0
                ps_op->s_ivd_create_op_t.u4_error_code |=
257
0
                                IVD_INIT_DEC_FAILED;
258
0
                return (IV_FAIL);
259
0
            }
260
261
9.25k
        }
262
9.25k
            break;
263
264
9.25k
        case IVD_CMD_GET_DISPLAY_FRAME:
265
0
        {
266
0
            ihevcd_cxa_get_display_frame_ip_t *ps_ip =
267
0
                            (ihevcd_cxa_get_display_frame_ip_t *)pv_api_ip;
268
0
            ihevcd_cxa_get_display_frame_op_t *ps_op =
269
0
                            (ihevcd_cxa_get_display_frame_op_t *)pv_api_op;
270
271
0
            ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0;
272
273
0
            if((ps_ip->s_ivd_get_display_frame_ip_t.u4_size
274
0
                            != sizeof(ihevcd_cxa_get_display_frame_ip_t))
275
0
                            && (ps_ip->s_ivd_get_display_frame_ip_t.u4_size
276
0
                                            != sizeof(ivd_get_display_frame_ip_t)))
277
0
            {
278
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
279
0
                                << IVD_UNSUPPORTEDPARAM;
280
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
281
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
282
0
                return (IV_FAIL);
283
0
            }
284
285
0
            if((ps_op->s_ivd_get_display_frame_op_t.u4_size
286
0
                            != sizeof(ihevcd_cxa_get_display_frame_op_t))
287
0
                            && (ps_op->s_ivd_get_display_frame_op_t.u4_size
288
0
                                            != sizeof(ivd_get_display_frame_op_t)))
289
0
            {
290
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1
291
0
                                << IVD_UNSUPPORTEDPARAM;
292
0
                ps_op->s_ivd_get_display_frame_op_t.u4_error_code |=
293
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
294
0
                return (IV_FAIL);
295
0
            }
296
297
0
        }
298
0
            break;
299
300
0
        case IVD_CMD_REL_DISPLAY_FRAME:
301
0
        {
302
0
            ihevcd_cxa_rel_display_frame_ip_t *ps_ip =
303
0
                            (ihevcd_cxa_rel_display_frame_ip_t *)pv_api_ip;
304
0
            ihevcd_cxa_rel_display_frame_op_t *ps_op =
305
0
                            (ihevcd_cxa_rel_display_frame_op_t *)pv_api_op;
306
307
0
            ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0;
308
309
0
            if((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
310
0
                            != sizeof(ihevcd_cxa_rel_display_frame_ip_t))
311
0
                            && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size
312
0
                                            != sizeof(ivd_rel_display_frame_ip_t)))
313
0
            {
314
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
315
0
                                << IVD_UNSUPPORTEDPARAM;
316
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
317
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
318
0
                return (IV_FAIL);
319
0
            }
320
321
0
            if((ps_op->s_ivd_rel_display_frame_op_t.u4_size
322
0
                            != sizeof(ihevcd_cxa_rel_display_frame_op_t))
323
0
                            && (ps_op->s_ivd_rel_display_frame_op_t.u4_size
324
0
                                            != sizeof(ivd_rel_display_frame_op_t)))
325
0
            {
326
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1
327
0
                                << IVD_UNSUPPORTEDPARAM;
328
0
                ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |=
329
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
330
0
                return (IV_FAIL);
331
0
            }
332
333
0
        }
334
0
            break;
335
336
0
        case IVD_CMD_SET_DISPLAY_FRAME:
337
0
        {
338
0
            ihevcd_cxa_set_display_frame_ip_t *ps_ip =
339
0
                            (ihevcd_cxa_set_display_frame_ip_t *)pv_api_ip;
340
0
            ihevcd_cxa_set_display_frame_op_t *ps_op =
341
0
                            (ihevcd_cxa_set_display_frame_op_t *)pv_api_op;
342
0
            UWORD32 j;
343
344
0
            ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0;
345
346
0
            if((ps_ip->s_ivd_set_display_frame_ip_t.u4_size
347
0
                            != sizeof(ihevcd_cxa_set_display_frame_ip_t))
348
0
                            && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size
349
0
                                            != sizeof(ivd_set_display_frame_ip_t)))
350
0
            {
351
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
352
0
                                << IVD_UNSUPPORTEDPARAM;
353
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
354
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
355
0
                return (IV_FAIL);
356
0
            }
357
358
0
            if((ps_op->s_ivd_set_display_frame_op_t.u4_size
359
0
                            != sizeof(ihevcd_cxa_set_display_frame_op_t))
360
0
                            && (ps_op->s_ivd_set_display_frame_op_t.u4_size
361
0
                                            != sizeof(ivd_set_display_frame_op_t)))
362
0
            {
363
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
364
0
                                << IVD_UNSUPPORTEDPARAM;
365
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
366
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
367
0
                return (IV_FAIL);
368
0
            }
369
370
0
            if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0)
371
0
            {
372
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
373
0
                                << IVD_UNSUPPORTEDPARAM;
374
0
                ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
375
0
                                IVD_DISP_FRM_ZERO_OP_BUFS;
376
0
                return IV_FAIL;
377
0
            }
378
379
0
            for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs;
380
0
                            j++)
381
0
            {
382
0
                if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs
383
0
                                == 0)
384
0
                {
385
0
                    ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
386
0
                                    << IVD_UNSUPPORTEDPARAM;
387
0
                    ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
388
0
                                    IVD_DISP_FRM_ZERO_OP_BUFS;
389
0
                    return IV_FAIL;
390
0
                }
391
392
0
                for(i = 0;
393
0
                                i
394
0
                                                < (WORD32)ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;
395
0
                                i++)
396
0
                {
397
0
                    if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i]
398
0
                                    == NULL)
399
0
                    {
400
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
401
0
                                        << IVD_UNSUPPORTEDPARAM;
402
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
403
0
                                        IVD_DISP_FRM_OP_BUF_NULL;
404
0
                        return IV_FAIL;
405
0
                    }
406
407
0
                    if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i]
408
0
                                    == 0)
409
0
                    {
410
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1
411
0
                                        << IVD_UNSUPPORTEDPARAM;
412
0
                        ps_op->s_ivd_set_display_frame_op_t.u4_error_code |=
413
0
                                        IVD_DISP_FRM_ZERO_OP_BUF_SIZE;
414
0
                        return IV_FAIL;
415
0
                    }
416
0
                }
417
0
            }
418
0
        }
419
0
            break;
420
421
279k
        case IVD_CMD_VIDEO_DECODE:
422
279k
        {
423
279k
            ihevcd_cxa_video_decode_ip_t *ps_ip =
424
279k
                            (ihevcd_cxa_video_decode_ip_t *)pv_api_ip;
425
279k
            ihevcd_cxa_video_decode_op_t *ps_op =
426
279k
                            (ihevcd_cxa_video_decode_op_t *)pv_api_op;
427
428
279k
            DEBUG("The input bytes is: %d",
429
279k
                            ps_ip->s_ivd_video_decode_ip_t.u4_num_Bytes);
430
279k
            ps_op->s_ivd_video_decode_op_t.u4_error_code = 0;
431
432
279k
            if(ps_ip->s_ivd_video_decode_ip_t.u4_size
433
279k
                            != sizeof(ihevcd_cxa_video_decode_ip_t)
434
279k
                            && ps_ip->s_ivd_video_decode_ip_t.u4_size
435
279k
                                            != sizeof(ivd_video_decode_ip_t))
436
0
            {
437
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
438
0
                                << IVD_UNSUPPORTEDPARAM;
439
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |=
440
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
441
0
                return (IV_FAIL);
442
0
            }
443
444
279k
            if(ps_op->s_ivd_video_decode_op_t.u4_size
445
279k
                            != sizeof(ihevcd_cxa_video_decode_op_t)
446
279k
                            && ps_op->s_ivd_video_decode_op_t.u4_size
447
279k
                                            != sizeof(ivd_video_decode_op_t))
448
0
            {
449
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
450
0
                                << IVD_UNSUPPORTEDPARAM;
451
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |=
452
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
453
0
                return (IV_FAIL);
454
0
            }
455
456
279k
            if(((codec_t *)(ps_handle->pv_codec_handle))->u1_enable_cu_info
457
0
                            && !ps_ip->pu1_8x8_blk_qp_map && !ps_ip->pu1_8x8_blk_type_map)
458
0
            {
459
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1
460
0
                                << IVD_UNSUPPORTEDPARAM;
461
0
                ps_op->s_ivd_video_decode_op_t.u4_error_code |=
462
0
                                IHEVCD_FRAME_INFO_OP_BUF_NULL;
463
0
                return (IV_FAIL);
464
0
            }
465
466
279k
        }
467
279k
            break;
468
469
279k
        case IVD_CMD_DELETE:
470
9.25k
        {
471
9.25k
            ihevcd_cxa_delete_ip_t *ps_ip =
472
9.25k
                            (ihevcd_cxa_delete_ip_t *)pv_api_ip;
473
9.25k
            ihevcd_cxa_delete_op_t *ps_op =
474
9.25k
                            (ihevcd_cxa_delete_op_t *)pv_api_op;
475
476
9.25k
            ps_op->s_ivd_delete_op_t.u4_error_code = 0;
477
478
9.25k
            if(ps_ip->s_ivd_delete_ip_t.u4_size
479
9.25k
                            != sizeof(ihevcd_cxa_delete_ip_t))
480
0
            {
481
0
                ps_op->s_ivd_delete_op_t.u4_error_code |= 1
482
0
                                << IVD_UNSUPPORTEDPARAM;
483
0
                ps_op->s_ivd_delete_op_t.u4_error_code |=
484
0
                                IVD_IP_API_STRUCT_SIZE_INCORRECT;
485
0
                return (IV_FAIL);
486
0
            }
487
488
9.25k
            if(ps_op->s_ivd_delete_op_t.u4_size
489
9.25k
                            != sizeof(ihevcd_cxa_delete_op_t))
490
0
            {
491
0
                ps_op->s_ivd_delete_op_t.u4_error_code |= 1
492
0
                                << IVD_UNSUPPORTEDPARAM;
493
0
                ps_op->s_ivd_delete_op_t.u4_error_code |=
494
0
                                IVD_OP_API_STRUCT_SIZE_INCORRECT;
495
0
                return (IV_FAIL);
496
0
            }
497
498
9.25k
        }
499
9.25k
            break;
500
501
39.5k
        case IVD_CMD_VIDEO_CTL:
502
39.5k
        {
503
39.5k
            UWORD32 *pu4_ptr_cmd;
504
39.5k
            UWORD32 sub_command;
505
506
39.5k
            pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
507
39.5k
            pu4_ptr_cmd += 2;
508
39.5k
            sub_command = *pu4_ptr_cmd;
509
510
39.5k
            switch(sub_command)
511
39.5k
            {
512
18.5k
                case IVD_CMD_CTL_SETPARAMS:
513
18.5k
                {
514
18.5k
                    ihevcd_cxa_ctl_set_config_ip_t *ps_ip;
515
18.5k
                    ihevcd_cxa_ctl_set_config_op_t *ps_op;
516
18.5k
                    ps_ip = (ihevcd_cxa_ctl_set_config_ip_t *)pv_api_ip;
517
18.5k
                    ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
518
519
18.5k
                    if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
520
18.5k
                                    != sizeof(ihevcd_cxa_ctl_set_config_ip_t) &&
521
0
                                    ps_ip->s_ivd_ctl_set_config_ip_t.u4_size
522
0
                                                != sizeof(ivd_ctl_set_config_ip_t))
523
0
                    {
524
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
525
0
                                        << IVD_UNSUPPORTEDPARAM;
526
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
527
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
528
0
                        return IV_FAIL;
529
0
                    }
530
18.5k
                }
531
                    //no break; is needed here
532
18.5k
                case IVD_CMD_CTL_SETDEFAULT:
533
18.5k
                {
534
18.5k
                    ihevcd_cxa_ctl_set_config_op_t *ps_op;
535
18.5k
                    ps_op = (ihevcd_cxa_ctl_set_config_op_t *)pv_api_op;
536
18.5k
                    if(ps_op->s_ivd_ctl_set_config_op_t.u4_size
537
18.5k
                                    != sizeof(ihevcd_cxa_ctl_set_config_op_t))
538
0
                    {
539
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1
540
0
                                        << IVD_UNSUPPORTEDPARAM;
541
0
                        ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |=
542
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
543
0
                        return IV_FAIL;
544
0
                    }
545
18.5k
                }
546
18.5k
                    break;
547
548
18.5k
                case IVD_CMD_CTL_GETPARAMS:
549
0
                {
550
0
                    ihevcd_cxa_ctl_getstatus_ip_t *ps_ip;
551
0
                    ihevcd_cxa_ctl_getstatus_op_t *ps_op;
552
553
0
                    ps_ip = (ihevcd_cxa_ctl_getstatus_ip_t *)pv_api_ip;
554
0
                    ps_op = (ihevcd_cxa_ctl_getstatus_op_t *)pv_api_op;
555
0
                    if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size
556
0
                                    != sizeof(ihevcd_cxa_ctl_getstatus_ip_t))
557
0
                    {
558
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
559
0
                                        << IVD_UNSUPPORTEDPARAM;
560
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
561
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
562
0
                        return IV_FAIL;
563
0
                    }
564
0
                    if((ps_op->s_ivd_ctl_getstatus_op_t.u4_size
565
0
                                    != sizeof(ihevcd_cxa_ctl_getstatus_op_t)) &&
566
0
                       (ps_op->s_ivd_ctl_getstatus_op_t.u4_size
567
0
                                    != sizeof(ivd_ctl_getstatus_op_t)))
568
0
                    {
569
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1
570
0
                                        << IVD_UNSUPPORTEDPARAM;
571
0
                        ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |=
572
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
573
0
                        return IV_FAIL;
574
0
                    }
575
0
                }
576
0
                    break;
577
578
0
                case IVD_CMD_CTL_GETBUFINFO:
579
0
                {
580
0
                    ihevcd_cxa_ctl_getbufinfo_ip_t *ps_ip;
581
0
                    ihevcd_cxa_ctl_getbufinfo_op_t *ps_op;
582
0
                    ps_ip = (ihevcd_cxa_ctl_getbufinfo_ip_t *)pv_api_ip;
583
0
                    ps_op = (ihevcd_cxa_ctl_getbufinfo_op_t *)pv_api_op;
584
585
0
                    if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size
586
0
                                    != sizeof(ihevcd_cxa_ctl_getbufinfo_ip_t))
587
0
                    {
588
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
589
0
                                        << IVD_UNSUPPORTEDPARAM;
590
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
591
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
592
0
                        return IV_FAIL;
593
0
                    }
594
0
                    if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size
595
0
                                    != sizeof(ihevcd_cxa_ctl_getbufinfo_op_t))
596
0
                    {
597
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1
598
0
                                        << IVD_UNSUPPORTEDPARAM;
599
0
                        ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |=
600
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
601
0
                        return IV_FAIL;
602
0
                    }
603
0
                }
604
0
                    break;
605
606
0
                case IVD_CMD_CTL_GETVERSION:
607
0
                {
608
0
                    ihevcd_cxa_ctl_getversioninfo_ip_t *ps_ip;
609
0
                    ihevcd_cxa_ctl_getversioninfo_op_t *ps_op;
610
0
                    ps_ip = (ihevcd_cxa_ctl_getversioninfo_ip_t *)pv_api_ip;
611
0
                    ps_op = (ihevcd_cxa_ctl_getversioninfo_op_t *)pv_api_op;
612
0
                    if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size
613
0
                                    != sizeof(ihevcd_cxa_ctl_getversioninfo_ip_t))
614
0
                    {
615
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
616
0
                                        << IVD_UNSUPPORTEDPARAM;
617
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
618
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
619
0
                        return IV_FAIL;
620
0
                    }
621
0
                    if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size
622
0
                                    != sizeof(ihevcd_cxa_ctl_getversioninfo_op_t))
623
0
                    {
624
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1
625
0
                                        << IVD_UNSUPPORTEDPARAM;
626
0
                        ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |=
627
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
628
0
                        return IV_FAIL;
629
0
                    }
630
0
                }
631
0
                    break;
632
633
0
                case IVD_CMD_CTL_FLUSH:
634
0
                {
635
0
                    ihevcd_cxa_ctl_flush_ip_t *ps_ip;
636
0
                    ihevcd_cxa_ctl_flush_op_t *ps_op;
637
0
                    ps_ip = (ihevcd_cxa_ctl_flush_ip_t *)pv_api_ip;
638
0
                    ps_op = (ihevcd_cxa_ctl_flush_op_t *)pv_api_op;
639
0
                    if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size
640
0
                                    != sizeof(ihevcd_cxa_ctl_flush_ip_t))
641
0
                    {
642
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
643
0
                                        << IVD_UNSUPPORTEDPARAM;
644
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
645
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
646
0
                        return IV_FAIL;
647
0
                    }
648
0
                    if(ps_op->s_ivd_ctl_flush_op_t.u4_size
649
0
                                    != sizeof(ihevcd_cxa_ctl_flush_op_t))
650
0
                    {
651
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1
652
0
                                        << IVD_UNSUPPORTEDPARAM;
653
0
                        ps_op->s_ivd_ctl_flush_op_t.u4_error_code |=
654
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
655
0
                        return IV_FAIL;
656
0
                    }
657
0
                }
658
0
                    break;
659
660
2.51k
                case IVD_CMD_CTL_RESET:
661
2.51k
                {
662
2.51k
                    ihevcd_cxa_ctl_reset_ip_t *ps_ip;
663
2.51k
                    ihevcd_cxa_ctl_reset_op_t *ps_op;
664
2.51k
                    ps_ip = (ihevcd_cxa_ctl_reset_ip_t *)pv_api_ip;
665
2.51k
                    ps_op = (ihevcd_cxa_ctl_reset_op_t *)pv_api_op;
666
2.51k
                    if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size
667
2.51k
                                    != sizeof(ihevcd_cxa_ctl_reset_ip_t))
668
0
                    {
669
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
670
0
                                        << IVD_UNSUPPORTEDPARAM;
671
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
672
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
673
0
                        return IV_FAIL;
674
0
                    }
675
2.51k
                    if(ps_op->s_ivd_ctl_reset_op_t.u4_size
676
2.51k
                                    != sizeof(ihevcd_cxa_ctl_reset_op_t))
677
0
                    {
678
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1
679
0
                                        << IVD_UNSUPPORTEDPARAM;
680
0
                        ps_op->s_ivd_ctl_reset_op_t.u4_error_code |=
681
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
682
0
                        return IV_FAIL;
683
0
                    }
684
2.51k
                }
685
2.51k
                    break;
686
2.51k
                case IHEVCD_CXA_CMD_CTL_DEGRADE:
687
0
                {
688
0
                    ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
689
0
                    ihevcd_cxa_ctl_degrade_op_t *ps_op;
690
691
0
                    ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
692
0
                    ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
693
694
0
                    if(ps_ip->u4_size
695
0
                                    != sizeof(ihevcd_cxa_ctl_degrade_ip_t))
696
0
                    {
697
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
698
0
                        ps_op->u4_error_code |=
699
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
700
0
                        return IV_FAIL;
701
0
                    }
702
703
0
                    if(ps_op->u4_size
704
0
                                    != sizeof(ihevcd_cxa_ctl_degrade_op_t))
705
0
                    {
706
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
707
0
                        ps_op->u4_error_code |=
708
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
709
0
                        return IV_FAIL;
710
0
                    }
711
712
0
                    if((ps_ip->i4_degrade_pics < 0) ||
713
0
                       (ps_ip->i4_degrade_pics > 4) ||
714
0
                       (ps_ip->i4_nondegrade_interval < 0) ||
715
0
                       (ps_ip->i4_degrade_type < 0) ||
716
0
                       (ps_ip->i4_degrade_type > 15))
717
0
                    {
718
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
719
0
                        return IV_FAIL;
720
0
                    }
721
722
0
                    break;
723
0
                }
724
725
0
                case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
726
0
                {
727
0
                    ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
728
0
                    ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
729
730
0
                    ps_ip =
731
0
                                    (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
732
0
                    ps_op =
733
0
                                    (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
734
735
0
                    if(ps_ip->u4_size
736
0
                                    != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_ip_t))
737
0
                    {
738
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
739
0
                        ps_op->u4_error_code |=
740
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
741
0
                        return IV_FAIL;
742
0
                    }
743
744
0
                    if(ps_op->u4_size
745
0
                                    != sizeof(ihevcd_cxa_ctl_get_frame_dimensions_op_t))
746
0
                    {
747
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
748
0
                        ps_op->u4_error_code |=
749
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
750
0
                        return IV_FAIL;
751
0
                    }
752
753
0
                    break;
754
0
                }
755
756
0
                case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
757
0
                {
758
0
                    ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
759
0
                    ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
760
761
0
                    ps_ip =
762
0
                                    (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
763
0
                    ps_op =
764
0
                                    (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
765
766
0
                    if(ps_ip->u4_size
767
0
                                    != sizeof(ihevcd_cxa_ctl_get_vui_params_ip_t))
768
0
                    {
769
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
770
0
                        ps_op->u4_error_code |=
771
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
772
0
                        return IV_FAIL;
773
0
                    }
774
775
0
                    if(ps_op->u4_size
776
0
                                    != sizeof(ihevcd_cxa_ctl_get_vui_params_op_t))
777
0
                    {
778
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
779
0
                        ps_op->u4_error_code |=
780
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
781
0
                        return IV_FAIL;
782
0
                    }
783
784
0
                    break;
785
0
                }
786
0
#ifndef DISABLE_SEI
787
0
                case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
788
0
                {
789
0
                    ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
790
0
                    ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
791
792
0
                    ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
793
0
                    ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
794
795
0
                    if(ps_ip->u4_size
796
0
                                    != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_ip_t))
797
0
                    {
798
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
799
0
                        ps_op->u4_error_code |=
800
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
801
0
                        return IV_FAIL;
802
0
                    }
803
804
0
                    if(ps_op->u4_size
805
0
                                    != sizeof(ihevcd_cxa_ctl_get_sei_mastering_params_op_t))
806
0
                    {
807
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
808
0
                        ps_op->u4_error_code |=
809
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
810
0
                        return IV_FAIL;
811
0
                    }
812
813
0
                    break;
814
0
                }
815
0
#endif
816
9.25k
                case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
817
9.25k
                {
818
9.25k
                    ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
819
9.25k
                    ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
820
821
9.25k
                    ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
822
9.25k
                    ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
823
824
9.25k
                    if(ps_ip->u4_size
825
9.25k
                                    != sizeof(ihevcd_cxa_ctl_set_num_cores_ip_t))
826
0
                    {
827
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
828
0
                        ps_op->u4_error_code |=
829
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
830
0
                        return IV_FAIL;
831
0
                    }
832
833
9.25k
                    if(ps_op->u4_size
834
9.25k
                                    != sizeof(ihevcd_cxa_ctl_set_num_cores_op_t))
835
0
                    {
836
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
837
0
                        ps_op->u4_error_code |=
838
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
839
0
                        return IV_FAIL;
840
0
                    }
841
842
9.25k
                    if((ps_ip->u4_num_cores < 1) || (ps_ip->u4_num_cores > MAX_NUM_CORES))
843
0
                    {
844
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
845
0
                        return IV_FAIL;
846
0
                    }
847
9.25k
                    break;
848
9.25k
                }
849
9.25k
                case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
850
9.25k
                {
851
9.25k
                    ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
852
9.25k
                    ihevcd_cxa_ctl_set_processor_op_t *ps_op;
853
854
9.25k
                    ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
855
9.25k
                    ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
856
857
9.25k
                    if(ps_ip->u4_size
858
9.25k
                                    != sizeof(ihevcd_cxa_ctl_set_processor_ip_t))
859
0
                    {
860
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
861
0
                        ps_op->u4_error_code |=
862
0
                                        IVD_IP_API_STRUCT_SIZE_INCORRECT;
863
0
                        return IV_FAIL;
864
0
                    }
865
866
9.25k
                    if(ps_op->u4_size
867
9.25k
                                    != sizeof(ihevcd_cxa_ctl_set_processor_op_t))
868
0
                    {
869
0
                        ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM;
870
0
                        ps_op->u4_error_code |=
871
0
                                        IVD_OP_API_STRUCT_SIZE_INCORRECT;
872
0
                        return IV_FAIL;
873
0
                    }
874
875
9.25k
                    break;
876
9.25k
                }
877
9.25k
                default:
878
0
                    *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
879
0
                    *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
880
0
                    return IV_FAIL;
881
39.5k
            }
882
39.5k
        }
883
39.5k
            break;
884
39.5k
        default:
885
0
            *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM;
886
0
            *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD;
887
0
            return IV_FAIL;
888
337k
    }
889
890
337k
    return IV_SUCCESS;
891
337k
}
892
893
894
/**
895
*******************************************************************************
896
*
897
* @brief
898
*  Sets default dynamic parameters
899
*
900
* @par Description:
901
*  Sets default dynamic parameters. Will be called in ihevcd_init() to ensure
902
* that even if set_params is not called, codec  continues to work
903
*
904
* @param[in] ps_codec_obj
905
*  Pointer to codec object at API level
906
*
907
* @param[in] pv_api_ip
908
*  Pointer to input argument structure
909
*
910
* @param[out] pv_api_op
911
*  Pointer to output argument structure
912
*
913
* @returns  Status
914
*
915
* @remarks
916
*
917
*
918
*******************************************************************************
919
*/
920
WORD32 ihevcd_set_default_params(codec_t *ps_codec)
921
12.1k
{
922
923
12.1k
    WORD32 ret = IV_SUCCESS;
924
925
12.1k
    ps_codec->e_pic_skip_mode = IVD_SKIP_NONE;
926
12.1k
    ps_codec->i4_strd = 0;
927
12.1k
    ps_codec->i4_disp_strd = 0;
928
12.1k
    ps_codec->i4_header_mode = 0;
929
12.1k
    ps_codec->e_pic_out_order = IVD_DISPLAY_FRAME_OUT;
930
12.1k
    return ret;
931
12.1k
}
932
933
void ihevcd_update_function_ptr(codec_t *ps_codec)
934
21.3k
{
935
936
    /* Init inter pred function array */
937
21.3k
    ps_codec->apf_inter_pred[0] = NULL;
938
21.3k
    ps_codec->apf_inter_pred[1] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_fptr;
939
21.3k
    ps_codec->apf_inter_pred[2] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_fptr;
940
21.3k
    ps_codec->apf_inter_pred[3] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_fptr;
941
21.3k
    ps_codec->apf_inter_pred[4] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
942
21.3k
    ps_codec->apf_inter_pred[5] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_copy_w16out_fptr;
943
21.3k
    ps_codec->apf_inter_pred[6] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16out_fptr;
944
21.3k
    ps_codec->apf_inter_pred[7] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
945
21.3k
    ps_codec->apf_inter_pred[8] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_horz_w16out_fptr;
946
21.3k
    ps_codec->apf_inter_pred[9] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_fptr;
947
21.3k
    ps_codec->apf_inter_pred[10] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_luma_vert_w16inp_w16out_fptr;
948
21.3k
    ps_codec->apf_inter_pred[11] = NULL;
949
21.3k
    ps_codec->apf_inter_pred[12] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_fptr;
950
21.3k
    ps_codec->apf_inter_pred[13] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_fptr;
951
21.3k
    ps_codec->apf_inter_pred[14] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_fptr;
952
21.3k
    ps_codec->apf_inter_pred[15] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
953
21.3k
    ps_codec->apf_inter_pred[16] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_copy_w16out_fptr;
954
21.3k
    ps_codec->apf_inter_pred[17] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16out_fptr;
955
21.3k
    ps_codec->apf_inter_pred[18] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
956
21.3k
    ps_codec->apf_inter_pred[19] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_horz_w16out_fptr;
957
21.3k
    ps_codec->apf_inter_pred[20] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_fptr;
958
21.3k
    ps_codec->apf_inter_pred[21] = (pf_inter_pred)ps_codec->s_func_selector.ihevc_inter_pred_chroma_vert_w16inp_w16out_fptr;
959
960
    /* Init intra pred function array */
961
21.3k
    ps_codec->apf_intra_pred_luma[0] = (pf_intra_pred)NULL;
962
21.3k
    ps_codec->apf_intra_pred_luma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_planar_fptr;
963
21.3k
    ps_codec->apf_intra_pred_luma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_dc_fptr;
964
21.3k
    ps_codec->apf_intra_pred_luma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode2_fptr;
965
21.3k
    ps_codec->apf_intra_pred_luma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_3_to_9_fptr;
966
21.3k
    ps_codec->apf_intra_pred_luma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_horz_fptr;
967
21.3k
    ps_codec->apf_intra_pred_luma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_11_to_17_fptr;
968
21.3k
    ps_codec->apf_intra_pred_luma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_18_34_fptr;
969
21.3k
    ps_codec->apf_intra_pred_luma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_19_to_25_fptr;
970
21.3k
    ps_codec->apf_intra_pred_luma[9] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_ver_fptr;
971
21.3k
    ps_codec->apf_intra_pred_luma[10] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_luma_mode_27_to_33_fptr;
972
973
21.3k
    ps_codec->apf_intra_pred_chroma[0] = (pf_intra_pred)NULL;
974
21.3k
    ps_codec->apf_intra_pred_chroma[1] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_planar_fptr;
975
21.3k
    ps_codec->apf_intra_pred_chroma[2] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_dc_fptr;
976
21.3k
    ps_codec->apf_intra_pred_chroma[3] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode2_fptr;
977
21.3k
    ps_codec->apf_intra_pred_chroma[4] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_3_to_9_fptr;
978
21.3k
    ps_codec->apf_intra_pred_chroma[5] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_horz_fptr;
979
21.3k
    ps_codec->apf_intra_pred_chroma[6] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_11_to_17_fptr;
980
21.3k
    ps_codec->apf_intra_pred_chroma[7] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_18_34_fptr;
981
21.3k
    ps_codec->apf_intra_pred_chroma[8] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_19_to_25_fptr;
982
21.3k
    ps_codec->apf_intra_pred_chroma[9] =  (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_ver_fptr;
983
21.3k
    ps_codec->apf_intra_pred_chroma[10] = (pf_intra_pred)ps_codec->s_func_selector.ihevc_intra_pred_chroma_mode_27_to_33_fptr;
984
985
    /* Init itrans res function array */
986
21.3k
    ps_codec->apf_itrans_res[0] = (pf_itrans_res)ps_codec->s_func_selector.ihevc_itrans_res_4x4_ttype1_fptr;
987
21.3k
    ps_codec->apf_itrans_res[1] = (pf_itrans_res)ps_codec->s_func_selector.ihevc_itrans_res_4x4_fptr;
988
21.3k
    ps_codec->apf_itrans_res[2] = (pf_itrans_res)ps_codec->s_func_selector.ihevc_itrans_res_8x8_fptr;
989
21.3k
    ps_codec->apf_itrans_res[3] = (pf_itrans_res)ps_codec->s_func_selector.ihevc_itrans_res_16x16_fptr;
990
21.3k
    ps_codec->apf_itrans_res[4] = (pf_itrans_res)ps_codec->s_func_selector.ihevc_itrans_res_32x32_fptr;
991
992
    /* Init itrans_recon function array */
993
21.3k
    ps_codec->apf_itrans_recon[0] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_ttype1_fptr;
994
21.3k
    ps_codec->apf_itrans_recon[1] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_4x4_fptr;
995
21.3k
    ps_codec->apf_itrans_recon[2] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_8x8_fptr;
996
21.3k
    ps_codec->apf_itrans_recon[3] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_16x16_fptr;
997
21.3k
    ps_codec->apf_itrans_recon[4] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_itrans_recon_32x32_fptr;
998
21.3k
    ps_codec->apf_itrans_recon[5] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_4x4_fptr;
999
21.3k
    ps_codec->apf_itrans_recon[6] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_8x8_fptr;
1000
21.3k
    ps_codec->apf_itrans_recon[7] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_16x16_fptr;
1001
21.3k
    ps_codec->apf_itrans_recon[8] = (pf_itrans_recon)ps_codec->s_func_selector.ihevc_chroma_itrans_recon_32x32_fptr;
1002
1003
    /* Init recon function array */
1004
21.3k
    ps_codec->apf_recon[0] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_ttype1_fptr;
1005
21.3k
    ps_codec->apf_recon[1] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_4x4_fptr;
1006
21.3k
    ps_codec->apf_recon[2] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_8x8_fptr;
1007
21.3k
    ps_codec->apf_recon[3] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_16x16_fptr;
1008
21.3k
    ps_codec->apf_recon[4] = (pf_recon)ps_codec->s_func_selector.ihevc_recon_32x32_fptr;
1009
21.3k
    ps_codec->apf_recon[5] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_4x4_fptr;
1010
21.3k
    ps_codec->apf_recon[6] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_8x8_fptr;
1011
21.3k
    ps_codec->apf_recon[7] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_16x16_fptr;
1012
21.3k
    ps_codec->apf_recon[8] = (pf_recon)ps_codec->s_func_selector.ihevc_chroma_recon_32x32_fptr;
1013
1014
    /* Init itrans_recon_dc function array */
1015
21.3k
    ps_codec->apf_itrans_recon_dc[0] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_luma_fptr;
1016
21.3k
    ps_codec->apf_itrans_recon_dc[1] = (pf_itrans_recon_dc)ps_codec->s_func_selector.ihevcd_itrans_recon_dc_chroma_fptr;
1017
1018
21.3k
    ps_codec->apf_itrans_res_dc = (pf_itrans_res_dc)ps_codec->s_func_selector.ihevcd_itrans_res_dc_fptr;
1019
1020
    /* Init sao function array */
1021
21.3k
    ps_codec->apf_sao_luma[0] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_fptr;
1022
21.3k
    ps_codec->apf_sao_luma[1] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_fptr;
1023
21.3k
    ps_codec->apf_sao_luma[2] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_fptr;
1024
21.3k
    ps_codec->apf_sao_luma[3] = (pf_sao_luma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_fptr;
1025
1026
21.3k
    ps_codec->apf_sao_chroma[0] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class0_chroma_fptr;
1027
21.3k
    ps_codec->apf_sao_chroma[1] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class1_chroma_fptr;
1028
21.3k
    ps_codec->apf_sao_chroma[2] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class2_chroma_fptr;
1029
21.3k
    ps_codec->apf_sao_chroma[3] = (pf_sao_chroma)ps_codec->s_func_selector.ihevc_sao_edge_offset_class3_chroma_fptr;
1030
21.3k
}
1031
/**
1032
*******************************************************************************
1033
*
1034
* @brief
1035
*  Initialize the context. This will be called by  create and during
1036
* reset
1037
*
1038
* @par Description:
1039
*  Initializes the context
1040
*
1041
* @param[in] ps_codec
1042
*  Codec context pointer
1043
*
1044
* @returns  Status
1045
*
1046
* @remarks
1047
*
1048
*
1049
*******************************************************************************
1050
*/
1051
WORD32 ihevcd_init(codec_t *ps_codec)
1052
12.1k
{
1053
12.1k
    WORD32 status = IV_SUCCESS;
1054
12.1k
    WORD32 i;
1055
1056
    /* Free any dynamic buffers that are allocated */
1057
12.1k
    ihevcd_free_dynamic_bufs(ps_codec);
1058
1059
12.1k
    ps_codec->u4_allocate_dynamic_done = 0;
1060
12.1k
    ps_codec->i4_num_disp_bufs = 1;
1061
12.1k
    ps_codec->i4_flush_mode = 0;
1062
1063
12.1k
    ps_codec->i4_ht = ps_codec->i4_disp_ht = 0;
1064
12.1k
    ps_codec->i4_wd = ps_codec->i4_disp_wd = 0;
1065
12.1k
    ps_codec->i4_strd = 0;
1066
12.1k
    ps_codec->i4_disp_strd = 0;
1067
12.1k
    ps_codec->i4_num_cores = 1;
1068
1069
12.1k
    ps_codec->u4_pic_cnt = 0;
1070
12.1k
    ps_codec->u4_disp_cnt = 0;
1071
1072
12.1k
    ps_codec->i4_header_mode = 0;
1073
12.1k
    ps_codec->i4_header_in_slice_mode = 0;
1074
12.1k
    ps_codec->i4_sps_done = 0;
1075
12.1k
    ps_codec->i4_pps_done = 0;
1076
12.1k
    ps_codec->i4_init_done   = 1;
1077
12.1k
    ps_codec->i4_first_pic_done = 0;
1078
12.1k
    ps_codec->s_parse.i4_first_pic_init = 0;
1079
12.1k
    ps_codec->i4_error_code = 0;
1080
12.1k
    ps_codec->i4_reset_flag = 0;
1081
12.1k
    ps_codec->i4_cra_as_first_pic = 1;
1082
12.1k
    ps_codec->i4_rasl_output_flag = 0;
1083
1084
12.1k
    ps_codec->i4_prev_poc_msb = 0;
1085
12.1k
    ps_codec->i4_prev_poc_lsb = -1;
1086
12.1k
    ps_codec->i4_max_prev_poc_lsb = -1;
1087
12.1k
    ps_codec->s_parse.i4_abs_pic_order_cnt = -1;
1088
1089
    /* Set ref chroma format by default to 420SP UV interleaved */
1090
12.1k
    ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_UV;
1091
1092
    /* If the codec is in shared mode and required format is 420 SP VU interleaved then change
1093
     * reference buffers chroma format
1094
     */
1095
12.1k
    if(IV_YUV_420SP_VU == ps_codec->e_chroma_fmt)
1096
2.12k
    {
1097
2.12k
        ps_codec->e_ref_chroma_fmt = IV_YUV_420SP_VU;
1098
2.12k
    }
1099
1100
1101
1102
12.1k
    ps_codec->i4_disable_deblk_pic = 0;
1103
1104
12.1k
    ps_codec->i4_degrade_pic_cnt    = 0;
1105
12.1k
    ps_codec->i4_degrade_pics       = 0;
1106
12.1k
    ps_codec->i4_degrade_type       = 0;
1107
12.1k
    ps_codec->i4_disable_sao_pic    = 0;
1108
12.1k
    ps_codec->i4_fullpel_inter_pred = 0;
1109
12.1k
    ps_codec->u4_enable_fmt_conv_ahead = 0;
1110
12.1k
    ps_codec->i4_share_disp_buf_cnt = 0;
1111
1112
12.1k
    {
1113
12.1k
        sps_t *ps_sps = ps_codec->ps_sps_base;
1114
12.1k
        pps_t *ps_pps = ps_codec->ps_pps_base;
1115
1116
217k
        for(i = 0; i < MAX_SPS_CNT; i++)
1117
205k
        {
1118
205k
            ps_sps->i1_sps_valid = 0;
1119
205k
            ps_sps++;
1120
205k
        }
1121
1122
798k
        for(i = 0; i < MAX_PPS_CNT; i++)
1123
786k
        {
1124
786k
            ps_pps->i1_pps_valid = 0;
1125
786k
            ps_pps++;
1126
786k
        }
1127
12.1k
    }
1128
1129
12.1k
    ihevcd_set_default_params(ps_codec);
1130
    /* Initialize MV Bank buffer manager */
1131
12.1k
    ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_mv_buf_mgr);
1132
1133
    /* Initialize Picture buffer manager */
1134
12.1k
    ihevc_buf_mgr_init((buf_mgr_t *)ps_codec->pv_pic_buf_mgr);
1135
1136
12.1k
    ps_codec->ps_pic_buf = (pic_buf_t *)ps_codec->pv_pic_buf_base;
1137
1138
12.1k
    memset(ps_codec->ps_pic_buf, 0, BUF_MGR_MAX_CNT  * sizeof(pic_buf_t));
1139
1140
1141
1142
    /* Initialize display buffer manager */
1143
12.1k
    ihevc_disp_mgr_init((disp_mgr_t *)ps_codec->pv_disp_buf_mgr);
1144
1145
    /* Initialize dpb manager */
1146
12.1k
    ihevc_dpb_mgr_init((dpb_mgr_t *)ps_codec->pv_dpb_mgr);
1147
1148
12.1k
    ps_codec->e_processor_soc = SOC_GENERIC;
1149
    /* The following can be over-ridden using soc parameter as a hack */
1150
12.1k
    ps_codec->u4_nctb = 0x7FFFFFFF;
1151
12.1k
    ihevcd_init_arch(ps_codec);
1152
1153
12.1k
    ihevcd_init_function_ptr(ps_codec);
1154
1155
12.1k
    ihevcd_update_function_ptr(ps_codec);
1156
1157
12.1k
    return status;
1158
12.1k
}
1159
1160
/**
1161
*******************************************************************************
1162
*
1163
* @brief
1164
*  Allocate static memory for the codec
1165
*
1166
* @par Description:
1167
*  Allocates static memory for the codec
1168
*
1169
* @param[in] pv_api_ip
1170
*  Pointer to input argument structure
1171
*
1172
* @param[out] pv_api_op
1173
*  Pointer to output argument structure
1174
*
1175
* @returns  Status
1176
*
1177
* @remarks
1178
*
1179
*
1180
*******************************************************************************
1181
*/
1182
WORD32 ihevcd_allocate_static_bufs(iv_obj_t **pps_codec_obj,
1183
                                   ihevcd_cxa_create_ip_t *ps_create_ip,
1184
                                   ihevcd_cxa_create_op_t *ps_create_op)
1185
9.25k
{
1186
9.25k
    WORD32 size;
1187
9.25k
    void *pv_buf;
1188
9.25k
    UWORD8 *pu1_buf;
1189
9.25k
    WORD32 i;
1190
9.25k
    codec_t *ps_codec;
1191
9.25k
    IV_API_CALL_STATUS_T status = IV_SUCCESS;
1192
9.25k
    void *(*pf_aligned_alloc)(void *pv_mem_ctxt, WORD32 alignment, WORD32 size);
1193
9.25k
    void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1194
9.25k
    void *pv_mem_ctxt;
1195
1196
    /* Request memory for HEVCD object */
1197
9.25k
    ps_create_op->s_ivd_create_op_t.pv_handle = NULL;
1198
1199
9.25k
    pf_aligned_alloc = ps_create_ip->s_ivd_create_ip_t.pf_aligned_alloc;
1200
9.25k
    pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
1201
9.25k
    pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
1202
1203
1204
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(iv_obj_t));
1205
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1206
9.25k
    memset(pv_buf, 0, sizeof(iv_obj_t));
1207
9.25k
    *pps_codec_obj = (iv_obj_t *)pv_buf;
1208
9.25k
    ps_create_op->s_ivd_create_op_t.pv_handle = *pps_codec_obj;
1209
1210
1211
9.25k
    (*pps_codec_obj)->pv_codec_handle = NULL;
1212
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, sizeof(codec_t));
1213
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1214
9.25k
    (*pps_codec_obj)->pv_codec_handle = (codec_t *)pv_buf;
1215
9.25k
    ps_codec = (codec_t *)pv_buf;
1216
1217
9.25k
    memset(ps_codec, 0, sizeof(codec_t));
1218
1219
9.25k
#ifndef LOGO_EN
1220
9.25k
    ps_codec->i4_share_disp_buf = ps_create_ip->s_ivd_create_ip_t.u4_share_disp_buf;
1221
#else
1222
    ps_codec->i4_share_disp_buf = 0;
1223
#endif
1224
1225
    /* Shared display mode is supported only for 420SP and 420P formats */
1226
9.25k
    if((ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420P) &&
1227
6.24k
       (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_UV) &&
1228
3.17k
       (ps_create_ip->s_ivd_create_ip_t.e_output_format != IV_YUV_420SP_VU))
1229
1.75k
    {
1230
1.75k
        ps_codec->i4_share_disp_buf = 0;
1231
1.75k
    }
1232
1233
9.25k
    if (ps_create_ip->s_ivd_create_ip_t.u4_size == sizeof(ihevcd_cxa_create_ip_t))
1234
9.25k
    {
1235
9.25k
        ps_codec->u1_enable_cu_info = ps_create_ip->u4_enable_frame_info;
1236
9.25k
    }
1237
1238
9.25k
    ps_codec->e_chroma_fmt = ps_create_ip->s_ivd_create_ip_t.e_output_format;
1239
1240
9.25k
    ps_codec->pf_aligned_alloc = pf_aligned_alloc;
1241
9.25k
    ps_codec->pf_aligned_free = pf_aligned_free;
1242
9.25k
    ps_codec->pv_mem_ctxt = pv_mem_ctxt;
1243
9.25k
    ps_codec->i4_threads_active = ps_create_ip->u4_keep_threads_active;
1244
1245
    /* Request memory to hold thread handles for each processing thread */
1246
9.25k
    size = MAX_PROCESS_THREADS * ithread_get_handle_size();
1247
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1248
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1249
9.25k
    memset(pv_buf, 0, size);
1250
1251
83.2k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
1252
74.0k
    {
1253
74.0k
        WORD32 handle_size = ithread_get_handle_size();
1254
74.0k
        ps_codec->apv_process_thread_handle[i] =
1255
74.0k
                        (UWORD8 *)pv_buf + (i * handle_size);
1256
74.0k
    }
1257
1258
9.25k
    if(ps_codec->i4_threads_active)
1259
9.25k
    {
1260
        /* Request memory to hold mutex (start/done) for each processing thread */
1261
9.25k
        size = 2 * MAX_PROCESS_THREADS * ithread_get_mutex_lock_size();
1262
9.25k
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1263
9.25k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
1264
9.25k
        memset(pv_buf, 0, size);
1265
1266
83.2k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1267
74.0k
        {
1268
74.0k
            WORD32 ret;
1269
74.0k
            WORD32 mutex_size = ithread_get_mutex_lock_size();
1270
74.0k
            ps_codec->apv_proc_start_mutex[i] =
1271
74.0k
                            (UWORD8 *)pv_buf + (2 * i * mutex_size);
1272
74.0k
            ps_codec->apv_proc_done_mutex[i] =
1273
74.0k
                            (UWORD8 *)pv_buf + ((2 * i + 1) * mutex_size);
1274
1275
74.0k
            ret = ithread_mutex_init(ps_codec->apv_proc_start_mutex[i]);
1276
74.0k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1277
1278
74.0k
            ret = ithread_mutex_init(ps_codec->apv_proc_done_mutex[i]);
1279
74.0k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1280
74.0k
        }
1281
1282
9.25k
        size = 2 * MAX_PROCESS_THREADS * ithread_get_cond_struct_size();
1283
9.25k
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1284
9.25k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
1285
9.25k
        memset(pv_buf, 0, size);
1286
1287
83.2k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1288
74.0k
        {
1289
74.0k
            WORD32 ret;
1290
74.0k
            WORD32 cond_size = ithread_get_cond_struct_size();
1291
74.0k
            ps_codec->apv_proc_start_condition[i] =
1292
74.0k
                            (UWORD8 *)pv_buf + (2 * i * cond_size);
1293
74.0k
            ps_codec->apv_proc_done_condition[i] =
1294
74.0k
                            (UWORD8 *)pv_buf + ((2 * i + 1) * cond_size);
1295
1296
74.0k
            ret = ithread_cond_init(ps_codec->apv_proc_start_condition[i]);
1297
74.0k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1298
1299
74.0k
            ret = ithread_cond_init(ps_codec->apv_proc_done_condition[i]);
1300
74.0k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1301
74.0k
        }
1302
9.25k
    }
1303
1304
    /* Request memory for static bitstream buffer which holds bitstream after emulation prevention */
1305
9.25k
    size = MIN_BITSBUF_SIZE;
1306
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size + 16); //Alloc extra for parse optimization
1307
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1308
9.25k
    memset(pv_buf, 0, size + 16);
1309
9.25k
    ps_codec->pu1_bitsbuf_static = pv_buf;
1310
9.25k
    ps_codec->u4_bitsbuf_size_static = size;
1311
1312
    /* size for holding display manager context */
1313
9.25k
    size = sizeof(buf_mgr_t);
1314
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1315
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1316
9.25k
    memset(pv_buf, 0, size);
1317
9.25k
    ps_codec->pv_disp_buf_mgr = pv_buf;
1318
1319
    /* size for holding dpb manager context */
1320
9.25k
    size = sizeof(dpb_mgr_t);
1321
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1322
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1323
9.25k
    memset(pv_buf, 0, size);
1324
9.25k
    ps_codec->pv_dpb_mgr = pv_buf;
1325
1326
    /* size for holding buffer manager context */
1327
9.25k
    size = sizeof(buf_mgr_t);
1328
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1329
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1330
9.25k
    memset(pv_buf, 0, size);
1331
9.25k
    ps_codec->pv_pic_buf_mgr = pv_buf;
1332
1333
    /* size for holding mv buffer manager context */
1334
9.25k
    size = sizeof(buf_mgr_t);
1335
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1336
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1337
9.25k
    memset(pv_buf, 0, size);
1338
9.25k
    ps_codec->pv_mv_buf_mgr = pv_buf;
1339
1340
9.25k
    size = MAX_VPS_CNT * sizeof(vps_t);
1341
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1342
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1343
9.25k
    memset(pv_buf, 0, size);
1344
9.25k
    ps_codec->ps_vps_base = pv_buf;
1345
9.25k
    ps_codec->s_parse.ps_vps_base = ps_codec->ps_vps_base;
1346
1347
9.25k
    size = MAX_SPS_CNT * sizeof(sps_t);
1348
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1349
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1350
9.25k
    memset(pv_buf, 0, size);
1351
9.25k
    ps_codec->ps_sps_base = pv_buf;
1352
9.25k
    ps_codec->s_parse.ps_sps_base = ps_codec->ps_sps_base;
1353
1354
9.25k
    size = MAX_PPS_CNT * sizeof(pps_t);
1355
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1356
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1357
9.25k
    memset(pv_buf, 0, size);
1358
9.25k
    ps_codec->ps_pps_base = pv_buf;
1359
9.25k
    ps_codec->s_parse.ps_pps_base = ps_codec->ps_pps_base;
1360
1361
9.25k
    size = MAX_SLICE_HDR_CNT * sizeof(slice_header_t);
1362
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1363
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1364
9.25k
    memset(pv_buf, 0, size);
1365
9.25k
    ps_codec->ps_slice_hdr_base = (slice_header_t *)pv_buf;
1366
9.25k
    ps_codec->s_parse.ps_slice_hdr_base = ps_codec->ps_slice_hdr_base;
1367
1368
1369
9.25k
    SCALING_MAT_SIZE(size)
1370
9.25k
    size = (MAX_SPS_CNT + MAX_PPS_CNT) * size * sizeof(WORD16);
1371
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1372
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1373
9.25k
    memset(pv_buf, 0, size);
1374
9.25k
    ps_codec->pi2_scaling_mat = (WORD16 *)pv_buf;
1375
1376
1377
    /* Size for holding pic_buf_t for each reference picture
1378
     * Since this is only a structure allocation and not actual buffer allocation,
1379
     * it is allocated for BUF_MGR_MAX_CNT entries
1380
     */
1381
9.25k
    size = BUF_MGR_MAX_CNT * sizeof(pic_buf_t);
1382
9.25k
    pv_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1383
9.25k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1384
9.25k
    memset(pv_buf, 0, size);
1385
9.25k
    ps_codec->pv_pic_buf_base = (UWORD8 *)pv_buf;
1386
1387
    /* TO hold scratch buffers needed for each SAO context */
1388
9.25k
    size = 4 * MAX_CTB_SIZE * MAX_CTB_SIZE;
1389
1390
    /* 2 temporary buffers*/
1391
9.25k
    size *= 2;
1392
9.25k
    size *= MAX_PROCESS_THREADS;
1393
1394
9.25k
    pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1395
9.25k
    RETURN_IF((NULL == pu1_buf), IV_FAIL);
1396
9.25k
    memset(pu1_buf, 0, size);
1397
1398
83.2k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
1399
74.0k
    {
1400
74.0k
        ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_luma = (UWORD8 *)pu1_buf;
1401
74.0k
        pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1402
1403
74.0k
        ps_codec->as_process[i].s_sao_ctxt.pu1_tmp_buf_chroma = (UWORD8 *)pu1_buf;
1404
74.0k
        pu1_buf += 4 * MAX_CTB_SIZE * MAX_CTB_SIZE * sizeof(UWORD8);
1405
74.0k
    }
1406
1407
    /* Allocate intra pred modes buffer */
1408
    /* 8 bits per 4x4 */
1409
    /* 16 bytes each for top and left 64 pixels and 16 bytes for default mode */
1410
9.25k
    size =  3 * 16 * sizeof(UWORD8);
1411
9.25k
    pu1_buf = pf_aligned_alloc(pv_mem_ctxt, 128, size);
1412
9.25k
    RETURN_IF((NULL == pu1_buf), IV_FAIL);
1413
9.25k
    memset(pu1_buf, 0, size);
1414
9.25k
    ps_codec->s_parse.pu1_luma_intra_pred_mode_left = pu1_buf;
1415
9.25k
    ps_codec->s_parse.pu1_luma_intra_pred_mode_top  = pu1_buf + 16;
1416
1417
9.25k
    {
1418
9.25k
        WORD32 inter_pred_tmp_buf_size, ntaps_luma;
1419
9.25k
#ifdef ENABLE_MAIN_REXT_PROFILE
1420
9.25k
        WORD32 res_buf_size;
1421
9.25k
#endif
1422
9.25k
        WORD32 pic_pu_idx_map_size;
1423
1424
        /* Max inter pred size */
1425
9.25k
        ntaps_luma = 8;
1426
        // For yuv 4:4:4 chroma the inter pred buffer size for one CTB will be double of luma
1427
9.25k
        inter_pred_tmp_buf_size = sizeof(WORD16) * (MAX_CTB_SIZE + ntaps_luma) * MAX_CTB_SIZE * 2;
1428
1429
9.25k
        inter_pred_tmp_buf_size = ALIGN64(inter_pred_tmp_buf_size);
1430
1431
9.25k
#ifdef ENABLE_MAIN_REXT_PROFILE
1432
9.25k
        res_buf_size = sizeof(WORD16) * (MAX_TU_SIZE * MAX_TU_SIZE);
1433
9.25k
        res_buf_size = ALIGN64(res_buf_size);
1434
9.25k
#endif
1435
1436
        /* To hold pu_index w.r.t. frame level pu_t array for a CTB */
1437
9.25k
        pic_pu_idx_map_size = sizeof(WORD32) * (18 * 18);
1438
9.25k
        pic_pu_idx_map_size = ALIGN64(pic_pu_idx_map_size);
1439
1440
9.25k
        size =  inter_pred_tmp_buf_size * 2;
1441
9.25k
#ifdef ENABLE_MAIN_REXT_PROFILE
1442
9.25k
        size += (res_buf_size * 4);
1443
9.25k
#endif
1444
9.25k
        size += pic_pu_idx_map_size;
1445
9.25k
        size *= MAX_PROCESS_THREADS;
1446
1447
9.25k
        pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1448
9.25k
        RETURN_IF((NULL == pu1_buf), IV_FAIL);
1449
9.25k
        memset(pu1_buf, 0, size);
1450
1451
83.2k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1452
74.0k
        {
1453
74.0k
            ps_codec->as_process[i].pi2_inter_pred_tmp_buf1 = (WORD16 *)pu1_buf;
1454
74.0k
            pu1_buf += inter_pred_tmp_buf_size;
1455
1456
74.0k
            ps_codec->as_process[i].pi2_inter_pred_tmp_buf2 = (WORD16 *)pu1_buf;
1457
74.0k
            pu1_buf += inter_pred_tmp_buf_size;
1458
1459
74.0k
#ifdef ENABLE_MAIN_REXT_PROFILE
1460
74.0k
            ps_codec->as_process[i].pi2_res_luma_buf = (WORD16 *)pu1_buf;
1461
74.0k
            pu1_buf += res_buf_size;
1462
1463
74.0k
            ps_codec->as_process[i].pi2_res_chroma_buf = (WORD16 *)pu1_buf;
1464
74.0k
            pu1_buf += res_buf_size;
1465
1466
74.0k
            ps_codec->as_process[i].pi2_invscan_out_subtu = (WORD16 *)pu1_buf;
1467
74.0k
            pu1_buf += (res_buf_size * 2);
1468
74.0k
#endif
1469
1470
            /* Inverse transform intermediate and inverse scan output buffers reuse inter pred scratch buffers */
1471
74.0k
            ps_codec->as_process[i].pi2_itrans_intrmd_buf =
1472
74.0k
                            ps_codec->as_process[i].pi2_inter_pred_tmp_buf2;
1473
74.0k
            ps_codec->as_process[i].pi2_invscan_out =
1474
74.0k
                            ps_codec->as_process[i].pi2_inter_pred_tmp_buf1;
1475
1476
74.0k
            ps_codec->as_process[i].pu4_pic_pu_idx_map = (UWORD32 *)pu1_buf;
1477
74.0k
            ps_codec->as_process[i].s_bs_ctxt.pu4_pic_pu_idx_map =
1478
74.0k
                            (UWORD32 *)pu1_buf;
1479
74.0k
            pu1_buf += pic_pu_idx_map_size;
1480
1481
            //   ps_codec->as_process[i].pi2_inter_pred_tmp_buf3 = (WORD16 *)pu1_buf;
1482
            //   pu1_buf += inter_pred_tmp_buf_size;
1483
1484
74.0k
            ps_codec->as_process[i].i4_inter_pred_tmp_buf_strd = MAX_CTB_SIZE;
1485
1486
74.0k
        }
1487
9.25k
    }
1488
    /* Initialize pointers in PPS structures */
1489
0
    {
1490
9.25k
        sps_t *ps_sps = ps_codec->ps_sps_base;
1491
9.25k
        pps_t *ps_pps = ps_codec->ps_pps_base;
1492
9.25k
        WORD16 *pi2_scaling_mat =  ps_codec->pi2_scaling_mat;
1493
9.25k
        WORD32 scaling_mat_size;
1494
1495
9.25k
        SCALING_MAT_SIZE(scaling_mat_size);
1496
1497
166k
        for(i = 0; i < MAX_SPS_CNT; i++)
1498
157k
        {
1499
157k
            ps_sps->pi2_scaling_mat  = pi2_scaling_mat;
1500
157k
            pi2_scaling_mat += scaling_mat_size;
1501
157k
            ps_sps++;
1502
157k
        }
1503
1504
610k
        for(i = 0; i < MAX_PPS_CNT; i++)
1505
601k
        {
1506
601k
            ps_pps->pi2_scaling_mat  = pi2_scaling_mat;
1507
601k
            pi2_scaling_mat += scaling_mat_size;
1508
601k
            ps_pps++;
1509
601k
        }
1510
9.25k
    }
1511
1512
9.25k
    return (status);
1513
9.25k
}
1514
1515
WORD32 ihevcd_join_threads(codec_t *ps_codec)
1516
11.7k
{
1517
11.7k
    if(ps_codec->i4_threads_active)
1518
11.7k
    {
1519
11.7k
        int i;
1520
        /* Wait for threads */
1521
11.7k
        ps_codec->i4_break_threads = 1;
1522
1523
105k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1524
94.1k
        {
1525
94.1k
            WORD32 ret;
1526
94.1k
            if(ps_codec->ai4_process_thread_created[i])
1527
5.74k
            {
1528
5.74k
                ret = ithread_mutex_lock(ps_codec->apv_proc_start_mutex[i]);
1529
5.74k
                RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1530
1531
5.74k
                ps_codec->ai4_process_start[i] = 1;
1532
5.74k
                ret = ithread_cond_signal(ps_codec->apv_proc_start_condition[i]);
1533
5.74k
                RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1534
1535
5.74k
                ret = ithread_mutex_unlock(ps_codec->apv_proc_start_mutex[i]);
1536
5.74k
                RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1537
1538
5.74k
                ithread_join(ps_codec->apv_process_thread_handle[i], NULL);
1539
1540
5.74k
                ps_codec->ai4_process_thread_created[i] = 0;
1541
5.74k
            }
1542
94.1k
        }
1543
11.7k
    }
1544
11.7k
    return IV_SUCCESS;
1545
11.7k
}
1546
/**
1547
*******************************************************************************
1548
*
1549
* @brief
1550
*  Free static memory for the codec
1551
*
1552
* @par Description:
1553
*  Free static memory for the codec
1554
*
1555
* @param[in] ps_codec
1556
*  Pointer to codec context
1557
*
1558
* @returns  Status
1559
*
1560
* @remarks
1561
*
1562
*
1563
*******************************************************************************
1564
*/
1565
WORD32 ihevcd_free_static_bufs(iv_obj_t *ps_codec_obj)
1566
9.25k
{
1567
9.25k
    codec_t *ps_codec;
1568
1569
9.25k
    void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
1570
9.25k
    void *pv_mem_ctxt;
1571
1572
9.25k
    ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
1573
9.25k
    pf_aligned_free = ps_codec->pf_aligned_free;
1574
9.25k
    pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1575
1576
9.25k
    if(ps_codec->i4_threads_active)
1577
9.25k
    {
1578
        /* Wait for threads */
1579
9.25k
        ihevcd_join_threads(ps_codec);
1580
1581
83.2k
        for(int i = 0; i < MAX_PROCESS_THREADS; i++)
1582
74.0k
        {
1583
74.0k
            WORD32 ret;
1584
74.0k
            ret = ithread_cond_destroy(ps_codec->apv_proc_start_condition[i]);
1585
74.0k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1586
1587
74.0k
            ret = ithread_cond_destroy(ps_codec->apv_proc_done_condition[i]);
1588
74.0k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1589
1590
74.0k
            ret = ithread_mutex_destroy(ps_codec->apv_proc_start_mutex[i]);
1591
74.0k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1592
1593
74.0k
            ret = ithread_mutex_destroy(ps_codec->apv_proc_done_mutex[i]);
1594
74.0k
            RETURN_IF((ret != (IHEVCD_ERROR_T)IHEVCD_SUCCESS), ret);
1595
74.0k
        }
1596
9.25k
        ALIGNED_FREE(ps_codec, ps_codec->apv_proc_start_mutex[0]);
1597
9.25k
        ALIGNED_FREE(ps_codec, ps_codec->apv_proc_start_condition[0]);
1598
9.25k
    }
1599
1600
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->apv_process_thread_handle[0]);
1601
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_static);
1602
1603
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->pv_disp_buf_mgr);
1604
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->pv_dpb_mgr);
1605
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_mgr);
1606
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->pv_mv_buf_mgr);
1607
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->ps_vps_base);
1608
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->ps_sps_base);
1609
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->ps_pps_base);
1610
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->ps_slice_hdr_base);
1611
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->pi2_scaling_mat);
1612
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->pv_pic_buf_base);
1613
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu1_luma_intra_pred_mode_left);
1614
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_tmp_buf_luma);
1615
9.25k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pi2_inter_pred_tmp_buf1);
1616
9.25k
    ALIGNED_FREE(ps_codec, ps_codec_obj->pv_codec_handle);
1617
1618
9.25k
    if(ps_codec_obj)
1619
9.25k
    {
1620
9.25k
        pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
1621
9.25k
    }
1622
1623
9.25k
    return IV_SUCCESS;
1624
1625
9.25k
}
1626
1627
1628
/**
1629
*******************************************************************************
1630
*
1631
* @brief
1632
*  Allocate dynamic memory for the codec
1633
*
1634
* @par Description:
1635
*  Allocates dynamic memory for the codec
1636
*
1637
* @param[in] ps_codec
1638
*  Pointer to codec context
1639
*
1640
* @returns  Status
1641
*
1642
* @remarks
1643
*
1644
*
1645
*******************************************************************************
1646
*/
1647
WORD32 ihevcd_allocate_dynamic_bufs(codec_t *ps_codec)
1648
8.39k
{
1649
8.39k
    WORD32 max_tile_cols, max_tile_rows;
1650
8.39k
    WORD32 max_ctb_rows, max_ctb_cols;
1651
8.39k
    WORD32 max_num_cu_cols;
1652
8.39k
    WORD32 max_num_cu_rows;
1653
8.39k
    WORD32 max_num_4x4_cols;
1654
8.39k
    WORD32 max_ctb_cnt;
1655
8.39k
    WORD32 wd;
1656
8.39k
    WORD32 ht;
1657
8.39k
    WORD32 i;
1658
8.39k
    WORD32 max_dpb_size;
1659
8.39k
    void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
1660
8.39k
    void *pv_buf;
1661
8.39k
    UWORD8 *pu1_buf;
1662
8.39k
    WORD32 size;
1663
1664
8.39k
    wd = ALIGN64(ps_codec->i4_wd);
1665
8.39k
    ht = ALIGN64(ps_codec->i4_ht);
1666
1667
8.39k
    max_tile_cols = (wd + MIN_TILE_WD - 1) / MIN_TILE_WD;
1668
8.39k
    max_tile_rows = (ht + MIN_TILE_HT - 1) / MIN_TILE_HT;
1669
8.39k
    max_ctb_rows  = ht / MIN_CTB_SIZE;
1670
8.39k
    max_ctb_cols  = wd / MIN_CTB_SIZE;
1671
8.39k
    max_ctb_cnt   = max_ctb_rows * max_ctb_cols;
1672
8.39k
    max_num_cu_cols = wd / MIN_CU_SIZE;
1673
8.39k
    max_num_cu_rows = ht / MIN_CU_SIZE;
1674
8.39k
    max_num_4x4_cols = wd / 4;
1675
1676
    /* Allocate tile structures */
1677
8.39k
    size = max_tile_cols * max_tile_rows;
1678
8.39k
    size *= sizeof(tile_t);
1679
8.39k
    size *= MAX_PPS_CNT;
1680
1681
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1682
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1683
8.39k
    memset(pv_buf, 0, size);
1684
8.39k
    ps_codec->ps_tile = (tile_t *)pv_buf;
1685
1686
1687
    /* Allocate memory to hold entry point offsets */
1688
    /* One entry point per tile */
1689
8.39k
    size = max_tile_cols * max_tile_rows;
1690
1691
    /* One entry point per row of CTBs */
1692
    /*********************************************************************/
1693
    /* Only tiles or entropy sync is enabled at a time in main           */
1694
    /* profile, but since memory required does not increase too much,    */
1695
    /* this allocation is done to handle both cases                      */
1696
    /*********************************************************************/
1697
8.39k
    size  += max_ctb_rows;
1698
8.39k
    size *= sizeof(WORD32);
1699
1700
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1701
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1702
8.39k
    memset(pv_buf, 0, size);
1703
8.39k
    ps_codec->pi4_entry_ofst = (WORD32 *)pv_buf;
1704
1705
    /* Allocate parse skip flag buffer */
1706
    /* 1 bit per 8x8 */
1707
8.39k
    size = max_num_cu_cols / 8;
1708
8.39k
    size = ALIGN4(size);
1709
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1710
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1711
8.39k
    memset(pv_buf, 0, size);
1712
8.39k
    ps_codec->s_parse.pu4_skip_cu_top = (UWORD32 *)pv_buf;
1713
1714
    /* Allocate parse coding tree depth buffer */
1715
    /* 2 bits per 8x8 */
1716
8.39k
    size =  max_num_cu_cols / 4;
1717
8.39k
    size = ALIGN4(size);
1718
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1719
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1720
8.39k
    memset(pv_buf, 0, size);
1721
8.39k
    ps_codec->s_parse.pu4_ct_depth_top = (UWORD32 *)pv_buf;
1722
1723
    /* Allocate intra flag buffer */
1724
    /* 1 bit per 8x8 */
1725
8.39k
    size =  max_num_cu_cols * max_num_cu_rows / 8;
1726
8.39k
    size = ALIGN4(size);
1727
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1728
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1729
8.39k
    memset(pv_buf, 0, size);
1730
8.39k
    ps_codec->pu1_pic_intra_flag = (UWORD8 *)pv_buf;
1731
8.39k
    ps_codec->s_parse.pu1_pic_intra_flag = ps_codec->pu1_pic_intra_flag;
1732
1733
    /* Allocate transquant bypass flag buffer */
1734
    /* 1 bit per 8x8 */
1735
    /* Extra row and column are allocated for easy processing of top and left blocks while loop filtering */
1736
8.39k
    size =  ((max_num_cu_cols + 8) * (max_num_cu_rows + 8)) / 8;
1737
8.39k
    size = ALIGN4(size);
1738
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1739
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1740
8.39k
    memset(pv_buf, 1, size);
1741
8.39k
    {
1742
8.39k
        WORD32 loop_filter_strd = (wd + 63) >> 6;
1743
8.39k
        ps_codec->pu1_pic_no_loop_filter_flag_base = pv_buf;
1744
        /* The offset is added for easy processing of top and left blocks while loop filtering */
1745
8.39k
        ps_codec->pu1_pic_no_loop_filter_flag = (UWORD8 *)pv_buf + loop_filter_strd + 1;
1746
8.39k
        ps_codec->s_parse.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1747
8.39k
        ps_codec->s_parse.s_deblk_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1748
8.39k
        ps_codec->s_parse.s_sao_ctxt.pu1_pic_no_loop_filter_flag = ps_codec->pu1_pic_no_loop_filter_flag;
1749
8.39k
    }
1750
1751
    /* Initialize pointers in PPS structures */
1752
8.39k
    {
1753
8.39k
        pps_t *ps_pps = ps_codec->ps_pps_base;
1754
8.39k
        tile_t *ps_tile =  ps_codec->ps_tile;
1755
1756
553k
        for(i = 0; i < MAX_PPS_CNT; i++)
1757
545k
        {
1758
545k
            ps_pps->ps_tile = ps_tile;
1759
545k
            ps_tile += (max_tile_cols * max_tile_rows);
1760
545k
            ps_pps++;
1761
545k
        }
1762
1763
8.39k
    }
1764
1765
    /* Allocate memory for job queue */
1766
1767
    /* One job per row of CTBs */
1768
8.39k
    size  = max_ctb_rows;
1769
1770
    /* One each tile a row of CTBs, num_jobs has to incremented */
1771
8.39k
    size  *= max_tile_cols;
1772
1773
    /* One format convert/frame copy job per row of CTBs for non-shared mode*/
1774
8.39k
    size  += max_ctb_rows;
1775
1776
8.39k
    size *= sizeof(proc_job_t);
1777
1778
8.39k
    size += ihevcd_jobq_ctxt_size();
1779
8.39k
    size = ALIGN4(size);
1780
1781
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1782
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1783
8.39k
    memset(pv_buf, 0, size);
1784
8.39k
    ps_codec->pv_proc_jobq_buf = pv_buf;
1785
8.39k
    ps_codec->i4_proc_jobq_buf_size = size;
1786
1787
8.39k
    size =  max_ctb_cnt;
1788
8.39k
    size = ALIGN4(size);
1789
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1790
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1791
8.39k
    memset(pv_buf, 0, size);
1792
8.39k
    ps_codec->pu1_parse_map = (UWORD8 *)pv_buf;
1793
1794
8.39k
    size =  max_ctb_cnt;
1795
8.39k
    size = ALIGN4(size);
1796
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1797
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1798
8.39k
    memset(pv_buf, 0, size);
1799
8.39k
    ps_codec->pu1_proc_map = (UWORD8 *)pv_buf;
1800
1801
    /** Holds top and left neighbor's pu idx into picture level pu array */
1802
    /* Only one top row is enough but left has to be replicated for each process context */
1803
8.39k
    size =  (max_num_4x4_cols  /* left */ + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4)/* top */ + 1/* top right */) * sizeof(WORD32);
1804
8.39k
    size = ALIGN4(size);
1805
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1806
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
1807
8.39k
    memset(pv_buf, 0, size);
1808
1809
75.5k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
1810
67.1k
    {
1811
67.1k
        UWORD32 *pu4_buf = (UWORD32 *)pv_buf;
1812
67.1k
        ps_codec->as_process[i].pu4_pic_pu_idx_left = pu4_buf + i * (MAX_CTB_SIZE / 4);
1813
67.1k
        memset(ps_codec->as_process[i].pu4_pic_pu_idx_left, 0, sizeof(UWORD32) * MAX_CTB_SIZE / 4);
1814
67.1k
        ps_codec->as_process[i].pu4_pic_pu_idx_top = pu4_buf + MAX_PROCESS_THREADS * (MAX_CTB_SIZE / 4);
1815
67.1k
    }
1816
8.39k
    memset(ps_codec->as_process[0].pu4_pic_pu_idx_top, 0, sizeof(UWORD32) * (wd / 4 + 1));
1817
1818
8.39k
    {
1819
8.39k
        sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
1820
1821
        /* To hold SAO left buffer for luma */
1822
8.39k
        size  = sizeof(UWORD8) * (MAX(ht, wd));
1823
1824
        /* To hold SAO left buffer for chroma */
1825
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1826
8.39k
        {
1827
8.39k
            size += sizeof(UWORD8) * (MAX(ht, wd));
1828
8.39k
        }
1829
1830
        /* To hold SAO top buffer for luma */
1831
8.39k
        size += sizeof(UWORD8) * wd;
1832
1833
        /* To hold SAO top buffer for chroma */
1834
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1835
8.39k
        {
1836
8.39k
            size += sizeof(UWORD8) * wd;
1837
8.39k
        }
1838
1839
        /* To hold SAO top left luma pixel value for last output ctb in a row*/
1840
8.39k
        size += sizeof(UWORD8) * max_ctb_rows;
1841
1842
        /* To hold SAO top left chroma pixel value last output ctb in a row*/
1843
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1844
8.39k
        {
1845
8.39k
            size += sizeof(UWORD8) * max_ctb_rows * 2;
1846
8.39k
        }
1847
1848
        /* To hold SAO top left pixel luma for current ctb - column array*/
1849
8.39k
        size += sizeof(UWORD8) * max_ctb_rows;
1850
1851
        /* To hold SAO top left pixel chroma for current ctb-column array*/
1852
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1853
8.39k
        {
1854
8.39k
            size += sizeof(UWORD8) * max_ctb_rows * 2;
1855
8.39k
        }
1856
1857
        /* To hold SAO top right pixel luma pixel value last output ctb in a row*/
1858
8.39k
        size += sizeof(UWORD8) * max_ctb_cols;
1859
1860
        /* To hold SAO top right pixel chroma pixel value last output ctb in a row*/
1861
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1862
8.39k
        {
1863
8.39k
            size += sizeof(UWORD8) * max_ctb_cols * 2;
1864
8.39k
        }
1865
1866
        /*To hold SAO botton bottom left pixels for luma*/
1867
8.39k
        size += sizeof(UWORD8) * max_ctb_rows;
1868
1869
        /*To hold SAO botton bottom left pixels for chroma*/
1870
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1871
8.39k
        {
1872
8.39k
            size += sizeof(UWORD8) * max_ctb_rows * 2;
1873
8.39k
        }
1874
1875
8.39k
        size = ALIGN64(size);
1876
1877
8.39k
        pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
1878
8.39k
        RETURN_IF((NULL == pu1_buf), IV_FAIL);
1879
8.39k
        memset(pu1_buf, 0, size);
1880
1881
75.5k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1882
67.1k
        {
1883
67.1k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1884
67.1k
        }
1885
8.39k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_luma = (UWORD8 *)pu1_buf;
1886
8.39k
        pu1_buf += MAX(ht, wd);
1887
1888
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1889
8.39k
        {
1890
75.5k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1891
67.1k
            {
1892
67.1k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1893
67.1k
            }
1894
8.39k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_left_chroma = (UWORD8 *)pu1_buf;
1895
8.39k
            pu1_buf += MAX(ht, wd);
1896
8.39k
        }
1897
1898
75.5k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1899
67.1k
        {
1900
67.1k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1901
67.1k
        }
1902
8.39k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_luma = (UWORD8 *)pu1_buf;
1903
8.39k
        pu1_buf += wd;
1904
1905
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1906
8.39k
        {
1907
75.5k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1908
67.1k
            {
1909
67.1k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1910
67.1k
            }
1911
8.39k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_chroma = (UWORD8 *)pu1_buf;
1912
8.39k
            pu1_buf += wd;
1913
8.39k
        }
1914
1915
75.5k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1916
67.1k
        {
1917
67.1k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1918
67.1k
        }
1919
8.39k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_luma_top_left_ctb = (UWORD8 *)pu1_buf;
1920
8.39k
        pu1_buf += ht / MIN_CTB_SIZE;
1921
1922
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1923
8.39k
        {
1924
75.5k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1925
67.1k
            {
1926
67.1k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1927
67.1k
            }
1928
8.39k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_chroma_top_left_ctb = (UWORD8 *)pu1_buf;
1929
8.39k
            pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1930
8.39k
        }
1931
1932
75.5k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1933
67.1k
        {
1934
67.1k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1935
67.1k
        }
1936
8.39k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_curr_ctb = (UWORD8 *)pu1_buf;
1937
8.39k
        pu1_buf += ht / MIN_CTB_SIZE;
1938
1939
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1940
8.39k
        {
1941
75.5k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1942
67.1k
            {
1943
67.1k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1944
67.1k
            }
1945
8.39k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_curr_ctb = (UWORD8 *)pu1_buf;
1946
8.39k
            pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1947
8.39k
        }
1948
1949
75.5k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1950
67.1k
        {
1951
67.1k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1952
67.1k
        }
1953
8.39k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_top_right = (UWORD8 *)pu1_buf;
1954
8.39k
        pu1_buf += wd / MIN_CTB_SIZE;
1955
1956
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1957
8.39k
        {
1958
75.5k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1959
67.1k
            {
1960
67.1k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1961
67.1k
            }
1962
8.39k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_top_right = (UWORD8 *)pu1_buf;
1963
8.39k
            pu1_buf += (wd / MIN_CTB_SIZE) * 2;
1964
8.39k
        }
1965
1966
        /*Per CTB, Store 1 value for luma , 2 values for chroma*/
1967
75.5k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
1968
67.1k
        {
1969
67.1k
            ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1970
67.1k
        }
1971
8.39k
        ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_luma_bot_left = (UWORD8 *)pu1_buf;
1972
8.39k
        pu1_buf += (ht / MIN_CTB_SIZE);
1973
1974
8.39k
        if(ps_sps->i1_chroma_format_idc != CHROMA_FMT_IDC_MONOCHROME)
1975
8.39k
        {
1976
75.5k
            for(i = 0; i < MAX_PROCESS_THREADS; i++)
1977
67.1k
            {
1978
67.1k
                ps_codec->as_process[i].s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1979
67.1k
            }
1980
8.39k
            ps_codec->s_parse.s_sao_ctxt.pu1_sao_src_top_left_chroma_bot_left = (UWORD8 *)pu1_buf;
1981
8.39k
            pu1_buf += (ht / MIN_CTB_SIZE) * 2;
1982
8.39k
        }
1983
8.39k
    }
1984
1985
1986
0
    {
1987
8.39k
        UWORD8 *pu1_buf = (UWORD8 *)pv_buf;
1988
8.39k
        WORD32 vert_bs_size, horz_bs_size;
1989
8.39k
        WORD32 qp_const_flag_size;
1990
8.39k
        WORD32 qp_size;
1991
8.39k
        WORD32 num_8x8;
1992
1993
        /* Max Number of vertical edges */
1994
8.39k
        vert_bs_size = wd / 8 + 2 * MAX_CTB_SIZE / 8;
1995
1996
        /* Max Number of horizontal edges - extra MAX_CTB_SIZE / 8 to handle the last 4 rows separately(shifted CTB processing) */
1997
8.39k
        vert_bs_size *= (ht + MAX_CTB_SIZE) / MIN_TU_SIZE;
1998
1999
        /* Number of bytes */
2000
8.39k
        vert_bs_size /= 8;
2001
2002
        /* Two bits per edge */
2003
8.39k
        vert_bs_size *= 2;
2004
2005
        /* Max Number of horizontal edges */
2006
8.39k
        horz_bs_size = ht / 8 + MAX_CTB_SIZE / 8;
2007
2008
        /* Max Number of vertical edges - extra MAX_CTB_SIZE / 8 to handle the last 4 columns separately(shifted CTB processing) */
2009
8.39k
        horz_bs_size *= (wd + MAX_CTB_SIZE) / MIN_TU_SIZE;
2010
2011
        /* Number of bytes */
2012
8.39k
        horz_bs_size /= 8;
2013
2014
        /* Two bits per edge */
2015
8.39k
        horz_bs_size *= 2;
2016
2017
        /* Max CTBs in a row */
2018
8.39k
        qp_const_flag_size = wd / MIN_CTB_SIZE + 1 /* The last ctb row deblk is done in last ctb + 1 row.*/;
2019
2020
        /* Max CTBs in a column */
2021
8.39k
        qp_const_flag_size *= ht / MIN_CTB_SIZE;
2022
2023
        /* Number of bytes */
2024
8.39k
        qp_const_flag_size /= 8;
2025
2026
        /* QP changes at CU level - So store at 8x8 level */
2027
8.39k
        num_8x8 = (wd * ht) / (MIN_CU_SIZE * MIN_CU_SIZE);
2028
8.39k
        qp_size = num_8x8;
2029
2030
        /* To hold vertical boundary strength */
2031
8.39k
        size += vert_bs_size;
2032
2033
        /* To hold horizontal boundary strength */
2034
8.39k
        size += horz_bs_size;
2035
2036
        /* To hold QP */
2037
8.39k
        size += qp_size;
2038
2039
        /* To hold QP const in CTB flags */
2040
8.39k
        size += qp_const_flag_size;
2041
2042
8.39k
        pu1_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2043
8.39k
        RETURN_IF((NULL == pu1_buf), IV_FAIL);
2044
2045
8.39k
        memset(pu1_buf, 0, size);
2046
2047
75.5k
        for(i = 0; i < MAX_PROCESS_THREADS; i++)
2048
67.1k
        {
2049
67.1k
            ps_codec->as_process[i].s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
2050
67.1k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
2051
67.1k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
2052
67.1k
            pu1_buf += vert_bs_size;
2053
2054
67.1k
            ps_codec->as_process[i].s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
2055
67.1k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
2056
67.1k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
2057
67.1k
            pu1_buf += horz_bs_size;
2058
2059
67.1k
            ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
2060
67.1k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
2061
67.1k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
2062
67.1k
            pu1_buf += qp_size;
2063
2064
67.1k
            ps_codec->as_process[i].s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
2065
67.1k
            ps_codec->as_process[i].s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
2066
67.1k
            ps_codec->s_parse.s_deblk_ctxt.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
2067
67.1k
            pu1_buf += qp_const_flag_size;
2068
2069
67.1k
            pu1_buf -= (vert_bs_size + horz_bs_size + qp_size + qp_const_flag_size);
2070
67.1k
        }
2071
8.39k
        ps_codec->s_parse.s_bs_ctxt.pu4_pic_vert_bs = (UWORD32 *)pu1_buf;
2072
8.39k
        pu1_buf += vert_bs_size;
2073
2074
8.39k
        ps_codec->s_parse.s_bs_ctxt.pu4_pic_horz_bs = (UWORD32 *)pu1_buf;
2075
8.39k
        pu1_buf += horz_bs_size;
2076
2077
8.39k
        ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp = (UWORD8 *)pu1_buf;
2078
8.39k
        pu1_buf += qp_size;
2079
2080
8.39k
        ps_codec->s_parse.s_bs_ctxt.pu1_pic_qp_const_in_ctb = (UWORD8 *)pu1_buf;
2081
8.39k
        pu1_buf += qp_const_flag_size;
2082
2083
8.39k
    }
2084
2085
    /* Max CTBs in a row */
2086
8.39k
    size  = wd / MIN_CTB_SIZE;
2087
    /* Max CTBs in a column */
2088
8.39k
    size *= (ht / MIN_CTB_SIZE + 2) /* Top row and bottom row extra. This ensures accessing left,top in first row
2089
8.39k
                                              and right in last row will not result in invalid access*/;
2090
2091
8.39k
    size *= sizeof(UWORD16);
2092
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2093
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2094
8.39k
    memset(pv_buf, 0, size);
2095
2096
8.39k
    ps_codec->pu1_tile_idx_base = pv_buf;
2097
75.5k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
2098
67.1k
    {
2099
67.1k
        ps_codec->as_process[i].pu1_tile_idx = (UWORD16 *)pv_buf + wd / MIN_CTB_SIZE /* Offset 1 row */;
2100
67.1k
    }
2101
2102
    /* 4 bytes per color component per CTB */
2103
8.39k
    size = 3 * 4;
2104
2105
    /* MAX number of CTBs in a row */
2106
8.39k
    size *= wd / MIN_CTB_SIZE;
2107
2108
    /* MAX number of CTBs in a column */
2109
8.39k
    size *= ht / MIN_CTB_SIZE;
2110
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2111
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2112
8.39k
    memset(pv_buf, 0, size);
2113
2114
8.39k
    ps_codec->s_parse.ps_pic_sao = (sao_t *)pv_buf;
2115
8.39k
    ps_codec->s_parse.s_sao_ctxt.ps_pic_sao = (sao_t *)pv_buf;
2116
75.5k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
2117
67.1k
    {
2118
67.1k
        ps_codec->as_process[i].s_sao_ctxt.ps_pic_sao = ps_codec->s_parse.ps_pic_sao;
2119
67.1k
    }
2120
2121
    /* Only if (frame size * compression factor) is greater than MIN_BITSBUF_SIZE,
2122
    then allocate dynamic bistream buffer */
2123
8.39k
    ps_codec->pu1_bitsbuf_dynamic = NULL;
2124
8.39k
    {
2125
8.39k
        sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2126
2127
8.39k
        if(ps_sps->i1_chroma_format_idc == CHROMA_FMT_IDC_YUV444)
2128
0
        {
2129
0
            size = wd * ht * 3;
2130
0
        }
2131
8.39k
        else if(ps_sps->i1_chroma_format_idc == CHROMA_FMT_IDC_YUV422)
2132
0
        {
2133
0
            size = wd * ht * 2;
2134
0
        }
2135
8.39k
        else
2136
8.39k
        {
2137
8.39k
            size = wd * ht;
2138
8.39k
        }
2139
2140
8.39k
        if(size > MIN_BITSBUF_SIZE)
2141
837
        {
2142
            //Alloc extra for parse optimization
2143
837
            pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size + 16);
2144
837
            RETURN_IF((NULL == pv_buf), IV_FAIL);
2145
2146
837
            memset(pv_buf, 0, size + 16);
2147
837
            ps_codec->pu1_bitsbuf_dynamic = pv_buf;
2148
837
            ps_codec->u4_bitsbuf_size_dynamic = size;
2149
837
        }
2150
8.39k
    }
2151
2152
8.39k
    size = ihevcd_get_tu_data_size(ps_codec, wd * ht);
2153
8.39k
    pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2154
8.39k
    RETURN_IF((NULL == pv_buf), IV_FAIL);
2155
8.39k
    memset(pv_buf, 0, size);
2156
8.39k
    ps_codec->pv_tu_data = pv_buf;
2157
2158
    /* CU info map to store qp and CU type at 8x8 level */
2159
8.39k
    if(ps_codec->u1_enable_cu_info)
2160
0
    {
2161
0
        size = ((wd * ht) / (MIN_CU_SIZE * MIN_CU_SIZE)) * BUF_MGR_MAX_CNT;
2162
2163
0
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2164
0
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2165
0
        memset(pv_buf, 0, size);
2166
0
        ps_codec->pu1_qp_map_base = pv_buf;
2167
2168
0
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2169
0
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2170
0
        memset(pv_buf, 0, size);
2171
0
        ps_codec->pu1_cu_type_map_base = pv_buf;
2172
0
    }
2173
2174
8.39k
    {
2175
8.39k
        sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2176
2177
2178
        /* Allocate for pu_map, pu_t and pic_pu_idx for each MV bank */
2179
        /* Note: Number of luma samples is not max_wd * max_ht here, instead it is
2180
         * set to maximum number of luma samples allowed at the given level.
2181
         * This is done to ensure that any stream with width and height lesser
2182
         * than max_wd and max_ht is supported. Number of buffers required can be greater
2183
         * for lower width and heights at a given level and this increased number of buffers
2184
         * might require more memory than what max_wd and max_ht buffer would have required
2185
         * Also note one extra buffer is allocted to store current pictures MV bank
2186
         * In case of asynchronous parsing and processing, number of buffers should increase here
2187
         * based on when parsing and processing threads are synchronized
2188
         */
2189
8.39k
        max_dpb_size = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2190
        /* Size for holding mv_buf_t for each MV Bank
2191
         * One extra MV Bank is needed to hold current pics MV bank.
2192
         */
2193
8.39k
        size = (max_dpb_size + 1) * sizeof(mv_buf_t);
2194
2195
8.39k
        size += (max_dpb_size + 1) *
2196
8.39k
                        ihevcd_get_pic_mv_bank_size(wd * ht);
2197
2198
8.39k
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2199
8.39k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2200
8.39k
        memset(pv_buf, 0, size);
2201
2202
8.39k
        ps_codec->pv_mv_bank_buf_base = pv_buf;
2203
8.39k
        ps_codec->i4_total_mv_bank_size = size;
2204
2205
8.39k
    }
2206
2207
    /* In case of non-shared mode allocate for reference picture buffers */
2208
    /* In case of shared and 420p output, allocate for chroma samples */
2209
8.39k
    if(0 == ps_codec->i4_share_disp_buf)
2210
8.39k
    {
2211
        /* Number of buffers is doubled in order to return one frame at a time instead of sending
2212
         * multiple outputs during dpb full case.
2213
         * Also note one extra buffer is allocted to store current picture
2214
         * In case of asynchronous parsing and processing, number of buffers should increase here
2215
         * based on when parsing and processing threads are synchronized
2216
         */
2217
8.39k
        size = ihevcd_get_total_pic_buf_size(ps_codec, wd, ht);
2218
8.39k
        pv_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2219
8.39k
        RETURN_IF((NULL == pv_buf), IV_FAIL);
2220
8.39k
        memset(pv_buf, 0, size);
2221
2222
8.39k
        ps_codec->i4_total_pic_buf_size = size;
2223
8.39k
        ps_codec->pu1_ref_pic_buf_base = (UWORD8 *)pv_buf;
2224
8.39k
    }
2225
2226
8.39k
    ps_codec->pv_proc_jobq = ihevcd_jobq_init(ps_codec->pv_proc_jobq_buf, ps_codec->i4_proc_jobq_buf_size);
2227
8.39k
    RETURN_IF((ps_codec->pv_proc_jobq == NULL), IV_FAIL);
2228
2229
    /* Update the jobq context to all the threads */
2230
8.39k
    ps_codec->s_parse.pv_proc_jobq = ps_codec->pv_proc_jobq;
2231
75.5k
    for(i = 0; i < MAX_PROCESS_THREADS; i++)
2232
67.1k
    {
2233
67.1k
        ps_codec->as_process[i].pv_proc_jobq = ps_codec->pv_proc_jobq;
2234
67.1k
        ps_codec->as_process[i].i4_id = i;
2235
67.1k
        ps_codec->as_process[i].ps_codec = ps_codec;
2236
2237
        /* Set the following to zero assuming it is a single core solution
2238
         * When threads are launched these will be set appropriately
2239
         */
2240
67.1k
        ps_codec->as_process[i].i4_check_parse_status = 0;
2241
67.1k
        ps_codec->as_process[i].i4_check_proc_status = 0;
2242
67.1k
    }
2243
2244
8.39k
    ps_codec->u4_allocate_dynamic_done = 1;
2245
2246
8.39k
    return IV_SUCCESS;
2247
8.39k
}
2248
2249
/**
2250
*******************************************************************************
2251
*
2252
* @brief
2253
*  Free dynamic memory for the codec
2254
*
2255
* @par Description:
2256
*  Free dynamic memory for the codec
2257
*
2258
* @param[in] ps_codec
2259
*  Pointer to codec context
2260
*
2261
* @returns  Status
2262
*
2263
* @remarks
2264
*
2265
*
2266
*******************************************************************************
2267
*/
2268
WORD32 ihevcd_free_dynamic_bufs(codec_t *ps_codec)
2269
21.3k
{
2270
2271
21.3k
    if(ps_codec->pv_proc_jobq)
2272
8.39k
    {
2273
8.39k
        ihevcd_jobq_deinit(ps_codec->pv_proc_jobq);
2274
8.39k
        ps_codec->pv_proc_jobq = NULL;
2275
8.39k
    }
2276
2277
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->ps_tile);
2278
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pi4_entry_ofst);
2279
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_skip_cu_top);
2280
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.pu4_ct_depth_top);
2281
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_intra_flag);
2282
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_pic_no_loop_filter_flag_base);
2283
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pv_proc_jobq_buf);
2284
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_parse_map);
2285
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_proc_map);
2286
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].pu4_pic_pu_idx_left);
2287
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_sao_ctxt.pu1_sao_src_left_luma);
2288
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->as_process[0].s_bs_ctxt.pu4_pic_vert_bs);
2289
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_tile_idx_base);
2290
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->s_parse.ps_pic_sao);
2291
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_bitsbuf_dynamic);
2292
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pv_tu_data);
2293
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pv_mv_bank_buf_base);
2294
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_ref_pic_buf_base);
2295
21.3k
    ALIGNED_FREE(ps_codec, ps_codec->pu1_cur_chroma_ref_buf);
2296
21.3k
    if(ps_codec->u1_enable_cu_info)
2297
0
    {
2298
0
        ALIGNED_FREE(ps_codec, ps_codec->pu1_qp_map_base);
2299
0
        ALIGNED_FREE(ps_codec, ps_codec->pu1_cu_type_map_base);
2300
0
    }
2301
2302
21.3k
    ps_codec->u4_allocate_dynamic_done = 0;
2303
21.3k
    return IV_SUCCESS;
2304
21.3k
}
2305
2306
2307
/**
2308
*******************************************************************************
2309
*
2310
* @brief
2311
*  Initializes from mem records passed to the codec
2312
*
2313
* @par Description:
2314
*  Initializes pointers based on mem records passed
2315
*
2316
* @param[in] ps_codec_obj
2317
*  Pointer to codec object at API level
2318
*
2319
* @param[in] pv_api_ip
2320
*  Pointer to input argument structure
2321
*
2322
* @param[out] pv_api_op
2323
*  Pointer to output argument structure
2324
*
2325
* @returns  Status
2326
*
2327
* @remarks
2328
*
2329
*
2330
*******************************************************************************
2331
*/
2332
WORD32 ihevcd_create(iv_obj_t *ps_codec_obj,
2333
                           void *pv_api_ip,
2334
                           void *pv_api_op)
2335
9.25k
{
2336
9.25k
    ihevcd_cxa_create_ip_t *ps_create_ip;
2337
9.25k
    ihevcd_cxa_create_op_t *ps_create_op;
2338
2339
9.25k
    WORD32 ret;
2340
9.25k
    codec_t *ps_codec;
2341
9.25k
    ps_create_ip = (ihevcd_cxa_create_ip_t *)pv_api_ip;
2342
9.25k
    ps_create_op = (ihevcd_cxa_create_op_t *)pv_api_op;
2343
2344
9.25k
    ps_create_op->s_ivd_create_op_t.u4_error_code = 0;
2345
9.25k
    ps_codec_obj = NULL;
2346
9.25k
    ret = ihevcd_allocate_static_bufs(&ps_codec_obj, pv_api_ip, pv_api_op);
2347
2348
    /* If allocation of some buffer fails, then free buffers allocated till then */
2349
9.25k
    if(IV_FAIL == ret)
2350
0
    {
2351
0
        if(NULL != ps_codec_obj)
2352
0
        {
2353
0
            if(ps_codec_obj->pv_codec_handle)
2354
0
            {
2355
0
                ihevcd_free_static_bufs(ps_codec_obj);
2356
0
            }
2357
0
            else
2358
0
            {
2359
0
                void (*pf_aligned_free)(void *pv_mem_ctxt, void *pv_buf);
2360
0
                void *pv_mem_ctxt;
2361
2362
0
                pf_aligned_free = ps_create_ip->s_ivd_create_ip_t.pf_aligned_free;
2363
0
                pv_mem_ctxt  = ps_create_ip->s_ivd_create_ip_t.pv_mem_ctxt;
2364
0
                pf_aligned_free(pv_mem_ctxt, ps_codec_obj);
2365
0
            }
2366
0
        }
2367
0
        ps_create_op->s_ivd_create_op_t.u4_error_code = IVD_MEM_ALLOC_FAILED;
2368
0
        ps_create_op->s_ivd_create_op_t.u4_error_code |= 1 << IVD_FATALERROR;
2369
2370
0
        return IV_FAIL;
2371
0
    }
2372
9.25k
    ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
2373
9.25k
    if (ps_create_ip->u4_enable_yuv_formats == 0) {
2374
3.01k
        ps_create_ip->u4_enable_yuv_formats = 1 << CHROMA_FMT_IDC_YUV420;
2375
3.01k
    }
2376
9.25k
    ps_codec->u4_enable_yuv_formats = ps_create_ip->u4_enable_yuv_formats;
2377
9.25k
    ret = ihevcd_init(ps_codec);
2378
2379
9.25k
    TRACE_INIT(NULL);
2380
9.25k
    STATS_INIT();
2381
2382
9.25k
    return ret;
2383
9.25k
}
2384
/**
2385
*******************************************************************************
2386
*
2387
* @brief
2388
*  Delete codec
2389
*
2390
* @par Description:
2391
*  Delete codec
2392
*
2393
* @param[in] ps_codec_obj
2394
*  Pointer to codec object at API level
2395
*
2396
* @param[in] pv_api_ip
2397
*  Pointer to input argument structure
2398
*
2399
* @param[out] pv_api_op
2400
*  Pointer to output argument structure
2401
*
2402
* @returns  Status
2403
*
2404
* @remarks
2405
*
2406
*
2407
*******************************************************************************
2408
*/
2409
WORD32 ihevcd_delete(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
2410
9.25k
{
2411
9.25k
    codec_t *ps_dec;
2412
9.25k
    ihevcd_cxa_delete_ip_t *ps_ip = (ihevcd_cxa_delete_ip_t *)pv_api_ip;
2413
9.25k
    ihevcd_cxa_delete_op_t *ps_op = (ihevcd_cxa_delete_op_t *)pv_api_op;
2414
2415
9.25k
    ps_dec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2416
9.25k
    UNUSED(ps_ip);
2417
9.25k
    ps_op->s_ivd_delete_op_t.u4_error_code = 0;
2418
9.25k
    ihevcd_free_dynamic_bufs(ps_dec);
2419
9.25k
    ihevcd_free_static_bufs(ps_codec_obj);
2420
9.25k
    return IV_SUCCESS;
2421
9.25k
}
2422
2423
2424
/**
2425
*******************************************************************************
2426
*
2427
* @brief
2428
*  Passes display buffer from application to codec
2429
*
2430
* @par Description:
2431
*  Adds display buffer to the codec
2432
*
2433
* @param[in] ps_codec_obj
2434
*  Pointer to codec object at API level
2435
*
2436
* @param[in] pv_api_ip
2437
*  Pointer to input argument structure
2438
*
2439
* @param[out] pv_api_op
2440
*  Pointer to output argument structure
2441
*
2442
* @returns  Status
2443
*
2444
* @remarks
2445
*
2446
*
2447
*******************************************************************************
2448
*/
2449
WORD32 ihevcd_set_display_frame(iv_obj_t *ps_codec_obj,
2450
                                void *pv_api_ip,
2451
                                void *pv_api_op)
2452
0
{
2453
0
    WORD32 ret = IV_SUCCESS;
2454
2455
0
    ivd_set_display_frame_ip_t *ps_dec_disp_ip;
2456
0
    ivd_set_display_frame_op_t *ps_dec_disp_op;
2457
2458
0
    WORD32 i;
2459
2460
0
    codec_t *ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2461
2462
0
    ps_dec_disp_ip = (ivd_set_display_frame_ip_t *)pv_api_ip;
2463
0
    ps_dec_disp_op = (ivd_set_display_frame_op_t *)pv_api_op;
2464
2465
0
    ps_codec->i4_num_disp_bufs = 0;
2466
0
    if(ps_codec->i4_share_disp_buf)
2467
0
    {
2468
0
        UWORD32 num_bufs = ps_dec_disp_ip->num_disp_bufs;
2469
0
        pic_buf_t *ps_pic_buf;
2470
0
        UWORD8 *pu1_buf;
2471
0
        WORD32 buf_ret;
2472
2473
0
        UWORD8 *pu1_chroma_buf = NULL;
2474
0
        num_bufs = MIN(num_bufs, BUF_MGR_MAX_CNT);
2475
0
        ps_codec->i4_num_disp_bufs = num_bufs;
2476
2477
0
        ps_pic_buf = (pic_buf_t *)ps_codec->ps_pic_buf;
2478
2479
        /* If color format is 420P, then allocate chroma buffers to hold semiplanar
2480
         * chroma data */
2481
0
        if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2482
0
        {
2483
0
            WORD32 num_samples = ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2484
0
            WORD32 size = num_samples * num_bufs;
2485
0
            void *pv_mem_ctxt = ps_codec->pv_mem_ctxt;
2486
2487
0
            pu1_chroma_buf = ps_codec->pf_aligned_alloc(pv_mem_ctxt, 128, size);
2488
0
            RETURN_IF((NULL == pu1_chroma_buf), IV_FAIL);
2489
0
            memset(pu1_chroma_buf, 0, size);
2490
2491
0
            ps_codec->pu1_cur_chroma_ref_buf = pu1_chroma_buf;
2492
0
        }
2493
0
        for(i = 0; i < (WORD32)num_bufs; i++)
2494
0
        {
2495
            /* Stride is not available in some cases here.
2496
               So store base pointers to buffer manager now,
2497
               and update these pointers once header is decoded */
2498
0
            pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[0];
2499
0
            ps_pic_buf->pu1_luma = pu1_buf;
2500
2501
0
            if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2502
0
            {
2503
0
                pu1_buf = pu1_chroma_buf;
2504
0
                pu1_chroma_buf += ps_dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1] << 1;
2505
0
            }
2506
0
            else
2507
0
            {
2508
                /* For YUV 420SP case use display buffer itself as chroma ref buffer */
2509
0
                pu1_buf =  ps_dec_disp_ip->s_disp_buffer[i].pu1_bufs[1];
2510
0
            }
2511
2512
0
            ps_pic_buf->pu1_chroma = pu1_buf;
2513
2514
0
            buf_ret = ihevc_buf_mgr_add((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_pic_buf, i);
2515
2516
0
            if(0 != buf_ret)
2517
0
            {
2518
0
                ps_codec->i4_error_code = IHEVCD_BUF_MGR_ERROR;
2519
0
                return IHEVCD_BUF_MGR_ERROR;
2520
0
            }
2521
2522
            /* Mark pic buf as needed for display */
2523
            /* This ensures that till the buffer is explicitly passed to the codec,
2524
             * application owns the buffer. Decoder is allowed to use a buffer only
2525
             * when application sends it through fill this buffer call in OMX
2526
             */
2527
0
            ihevc_buf_mgr_set_status((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, i, BUF_MGR_DISP);
2528
2529
0
            ps_pic_buf++;
2530
2531
            /* Store display buffers in codec context. Needed for 420p output */
2532
0
            memcpy(&ps_codec->s_disp_buffer[ps_codec->i4_share_disp_buf_cnt],
2533
0
                   &ps_dec_disp_ip->s_disp_buffer[i],
2534
0
                   sizeof(ps_dec_disp_ip->s_disp_buffer[i]));
2535
2536
0
            ps_codec->i4_share_disp_buf_cnt++;
2537
2538
0
        }
2539
0
    }
2540
2541
0
    ps_dec_disp_op->u4_error_code = 0;
2542
0
    return ret;
2543
2544
0
}
2545
2546
/**
2547
*******************************************************************************
2548
*
2549
* @brief
2550
*  Sets the decoder in flush mode. Decoder will come out of  flush only
2551
* after returning all the buffers or at reset
2552
*
2553
* @par Description:
2554
*  Sets the decoder in flush mode
2555
*
2556
* @param[in] ps_codec_obj
2557
*  Pointer to codec object at API level
2558
*
2559
* @param[in] pv_api_ip
2560
*  Pointer to input argument structure
2561
*
2562
* @param[out] pv_api_op
2563
*  Pointer to output argument structure
2564
*
2565
* @returns  Status
2566
*
2567
* @remarks
2568
*
2569
*
2570
*******************************************************************************
2571
*/
2572
WORD32 ihevcd_set_flush_mode(iv_obj_t *ps_codec_obj,
2573
                             void *pv_api_ip,
2574
                             void *pv_api_op)
2575
0
{
2576
2577
0
    codec_t *ps_codec;
2578
0
    ivd_ctl_flush_op_t *ps_ctl_op = (ivd_ctl_flush_op_t *)pv_api_op;
2579
0
    UNUSED(pv_api_ip);
2580
0
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2581
0
    ihevcd_join_threads(ps_codec);
2582
2583
    /* Signal flush frame control call */
2584
0
    ps_codec->i4_flush_mode = 1;
2585
2586
0
    ps_ctl_op->u4_error_code = 0;
2587
2588
    /* Set pic count to zero, so that decoder starts buffering again */
2589
    /* once it comes out of flush mode */
2590
0
    ps_codec->u4_pic_cnt = 0;
2591
0
    ps_codec->u4_disp_cnt = 0;
2592
2593
    /* If the first slice NAL fed to decoder after flush is a CRA NAL, then */
2594
    /* it may have associated RASL nals that need to be skipped */
2595
0
    ps_codec->i4_cra_as_first_pic = 1;
2596
0
    return IV_SUCCESS;
2597
2598
2599
0
}
2600
2601
/**
2602
*******************************************************************************
2603
*
2604
* @brief
2605
*  Gets decoder status and buffer requirements
2606
*
2607
* @par Description:
2608
*  Gets the decoder status
2609
*
2610
* @param[in] ps_codec_obj
2611
*  Pointer to codec object at API level
2612
*
2613
* @param[in] pv_api_ip
2614
*  Pointer to input argument structure
2615
*
2616
* @param[out] pv_api_op
2617
*  Pointer to output argument structure
2618
*
2619
* @returns  Status
2620
*
2621
* @remarks
2622
*
2623
*
2624
*******************************************************************************
2625
*/
2626
2627
WORD32 ihevcd_get_status(iv_obj_t *ps_codec_obj,
2628
                         void *pv_api_ip,
2629
                         void *pv_api_op)
2630
0
{
2631
2632
0
    WORD32 i;
2633
0
    codec_t *ps_codec;
2634
0
    WORD32 wd, ht;
2635
0
    ivd_ctl_getstatus_op_t *ps_ctl_op = (ivd_ctl_getstatus_op_t *)pv_api_op;
2636
2637
0
    UNUSED(pv_api_ip);
2638
2639
0
    ps_ctl_op->u4_error_code = 0;
2640
2641
0
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2642
2643
0
    ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2644
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2645
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2646
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_444P)
2647
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_444;
2648
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422P)
2649
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422;
2650
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2651
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2652
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2653
0
    else if(ps_codec->e_chroma_fmt == IV_GRAY)
2654
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_GRAY;
2655
2656
0
    ps_ctl_op->u4_num_disp_bufs = 1;
2657
2658
0
    for(i = 0; i < (WORD32)ps_ctl_op->u4_min_num_in_bufs; i++)
2659
0
    {
2660
0
        wd = ALIGN64(ps_codec->i4_wd);
2661
0
        ht = ALIGN64(ps_codec->i4_ht);
2662
0
        ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2663
0
    }
2664
2665
0
    wd = ps_codec->i4_wd;
2666
0
    ht = ps_codec->i4_ht;
2667
2668
0
    if(ps_codec->i4_sps_done)
2669
0
    {
2670
0
        if(0 == ps_codec->i4_share_disp_buf)
2671
0
        {
2672
0
            wd = ps_codec->i4_disp_wd;
2673
0
            ht = ps_codec->i4_disp_ht;
2674
2675
0
        }
2676
0
        else
2677
0
        {
2678
0
            wd = ps_codec->i4_disp_strd;
2679
0
            ht = ps_codec->i4_ht + PAD_HT;
2680
0
        }
2681
0
    }
2682
2683
0
    if(ps_codec->i4_disp_strd > wd)
2684
0
        wd = ps_codec->i4_disp_strd;
2685
2686
0
    if(0 == ps_codec->i4_share_disp_buf)
2687
0
        ps_ctl_op->u4_num_disp_bufs = 1;
2688
0
    else
2689
0
    {
2690
0
        if(ps_codec->i4_sps_done)
2691
0
        {
2692
0
            sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2693
0
            WORD32 reorder_pic_cnt, ref_pic_cnt;
2694
0
            reorder_pic_cnt = 0;
2695
0
            if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2696
0
                reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2697
0
            ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2698
2699
0
            ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2700
2701
0
            ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2702
0
        }
2703
0
        else
2704
0
        {
2705
0
            ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2706
0
        }
2707
2708
0
        ps_ctl_op->u4_num_disp_bufs = MIN(
2709
0
                        ps_ctl_op->u4_num_disp_bufs, 32);
2710
0
    }
2711
2712
    /*!*/
2713
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2714
0
    {
2715
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2716
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2717
0
        ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2718
0
    }
2719
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_444P)
2720
0
    {
2721
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2722
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht);
2723
0
        ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht);
2724
0
    }
2725
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2726
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2727
0
    {
2728
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2729
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2730
0
        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2731
0
    }
2732
0
    else if(ps_codec->e_chroma_fmt == IV_GRAY)
2733
0
    {
2734
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2735
0
        ps_ctl_op->u4_min_out_buf_size[1] = 0;
2736
0
        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2737
0
    }
2738
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422P)
2739
0
    {
2740
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2741
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2742
0
        ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 1;
2743
0
    }
2744
0
    ps_ctl_op->u4_pic_ht = ht;
2745
0
    ps_ctl_op->u4_pic_wd = wd;
2746
0
    ps_ctl_op->u4_frame_rate = 30000;
2747
0
    ps_ctl_op->u4_bit_rate = 1000000;
2748
0
    ps_ctl_op->e_content_type = IV_PROGRESSIVE;
2749
0
    ps_ctl_op->e_output_chroma_format = ps_codec->e_chroma_fmt;
2750
0
    ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2751
2752
0
    if(ps_ctl_op->u4_size == sizeof(ihevcd_cxa_ctl_getstatus_op_t))
2753
0
    {
2754
0
        ihevcd_cxa_ctl_getstatus_op_t *ps_ext_ctl_op = (ihevcd_cxa_ctl_getstatus_op_t *)ps_ctl_op;
2755
0
        ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_wd;
2756
0
        ps_ext_ctl_op->u4_coded_pic_wd = ps_codec->i4_ht;
2757
0
    }
2758
0
    return IV_SUCCESS;
2759
0
}
2760
/**
2761
*******************************************************************************
2762
*
2763
* @brief
2764
*  Gets decoder buffer requirements
2765
*
2766
* @par Description:
2767
*  Gets the decoder buffer requirements. If called before  header decoder,
2768
* buffer requirements are based on max_wd  and max_ht else actual width and
2769
* height will be used
2770
*
2771
* @param[in] ps_codec_obj
2772
*  Pointer to codec object at API level
2773
*
2774
* @param[in] pv_api_ip
2775
*  Pointer to input argument structure
2776
*
2777
* @param[out] pv_api_op
2778
*  Pointer to output argument structure
2779
*
2780
* @returns  Status
2781
*
2782
* @remarks
2783
*
2784
*
2785
*******************************************************************************
2786
*/
2787
WORD32 ihevcd_get_buf_info(iv_obj_t *ps_codec_obj,
2788
                           void *pv_api_ip,
2789
                           void *pv_api_op)
2790
0
{
2791
2792
0
    codec_t *ps_codec;
2793
0
    UWORD32 i = 0;
2794
0
    WORD32 wd, ht;
2795
0
    ivd_ctl_getbufinfo_op_t *ps_ctl_op =
2796
0
                    (ivd_ctl_getbufinfo_op_t *)pv_api_op;
2797
2798
0
    UNUSED(pv_api_ip);
2799
0
    ps_ctl_op->u4_error_code = 0;
2800
2801
0
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2802
2803
0
    ps_ctl_op->u4_min_num_in_bufs = MIN_IN_BUFS;
2804
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2805
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420;
2806
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_444P)
2807
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_444;
2808
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422P)
2809
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_422;
2810
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2811
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2812
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_420SP;
2813
0
    else if(ps_codec->e_chroma_fmt == IV_GRAY)
2814
0
        ps_ctl_op->u4_min_num_out_bufs = MIN_OUT_BUFS_GRAY;
2815
2816
0
    ps_ctl_op->u4_num_disp_bufs = 1;
2817
2818
0
    for(i = 0; i < ps_ctl_op->u4_min_num_in_bufs; i++)
2819
0
    {
2820
0
        wd = ALIGN64(ps_codec->i4_wd);
2821
0
        ht = ALIGN64(ps_codec->i4_ht);
2822
2823
0
        if(ps_codec->i4_sps_done)
2824
0
        {
2825
0
            sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2826
2827
0
            if(ps_sps->i1_chroma_format_idc == CHROMA_FMT_IDC_YUV444)
2828
0
                ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht * 3), MIN_BITSBUF_SIZE);
2829
0
            if(ps_sps->i1_chroma_format_idc == CHROMA_FMT_IDC_YUV422)
2830
0
                ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht * 2), MIN_BITSBUF_SIZE);
2831
0
            else
2832
0
                ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2833
0
        }
2834
0
        else
2835
0
        {
2836
0
#ifdef ENABLE_MAIN_REXT_PROFILE
2837
0
            ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht * 3), MIN_BITSBUF_SIZE);
2838
#else
2839
            ps_ctl_op->u4_min_in_buf_size[i] = MAX((wd * ht), MIN_BITSBUF_SIZE);
2840
#endif
2841
0
        }
2842
0
    }
2843
2844
0
    wd = 0;
2845
0
    ht = 0;
2846
2847
0
    if(ps_codec->i4_sps_done)
2848
0
    {
2849
0
        if(0 == ps_codec->i4_share_disp_buf)
2850
0
        {
2851
0
            wd = ps_codec->i4_disp_wd;
2852
0
            ht = ps_codec->i4_disp_ht;
2853
2854
0
        }
2855
0
        else
2856
0
        {
2857
0
            wd = ps_codec->i4_disp_strd;
2858
0
            ht = ps_codec->i4_ht + PAD_HT;
2859
0
        }
2860
0
    }
2861
0
    else
2862
0
    {
2863
0
        if(1 == ps_codec->i4_share_disp_buf)
2864
0
        {
2865
0
            wd = ALIGN32(wd + PAD_WD);
2866
0
            ht += PAD_HT;
2867
0
        }
2868
0
    }
2869
2870
0
    if(ps_codec->i4_disp_strd > wd)
2871
0
        wd = ps_codec->i4_disp_strd;
2872
2873
0
    if(0 == ps_codec->i4_share_disp_buf)
2874
0
        ps_ctl_op->u4_num_disp_bufs = 1;
2875
0
    else
2876
0
    {
2877
0
        if(ps_codec->i4_sps_done)
2878
0
        {
2879
0
            sps_t *ps_sps = (ps_codec->s_parse.ps_sps_base + ps_codec->i4_sps_id);
2880
0
            WORD32 reorder_pic_cnt, ref_pic_cnt;
2881
0
            reorder_pic_cnt = 0;
2882
0
            if(ps_codec->e_frm_out_mode != IVD_DECODE_FRAME_OUT)
2883
0
                reorder_pic_cnt = ps_sps->ai1_sps_max_num_reorder_pics[ps_sps->i1_sps_max_sub_layers - 1];
2884
0
            ref_pic_cnt = ps_sps->ai1_sps_max_dec_pic_buffering[ps_sps->i1_sps_max_sub_layers - 1];
2885
2886
0
            ps_ctl_op->u4_num_disp_bufs = reorder_pic_cnt;
2887
2888
0
            ps_ctl_op->u4_num_disp_bufs += ref_pic_cnt + 1;
2889
0
        }
2890
0
        else
2891
0
        {
2892
0
            ps_ctl_op->u4_num_disp_bufs = MAX_REF_CNT;
2893
0
        }
2894
2895
0
        ps_ctl_op->u4_num_disp_bufs = MIN(
2896
0
                        ps_ctl_op->u4_num_disp_bufs, 32);
2897
2898
0
    }
2899
2900
    /*!*/
2901
0
    if(ps_codec->e_chroma_fmt == IV_YUV_420P)
2902
0
    {
2903
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2904
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 2;
2905
0
        ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 2;
2906
0
    }
2907
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_444P)
2908
0
    {
2909
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2910
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht);
2911
0
        ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht);
2912
0
    }
2913
0
    else if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
2914
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
2915
0
    {
2916
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2917
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2918
0
        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2919
0
    }
2920
0
    else if(ps_codec->e_chroma_fmt == IV_GRAY)
2921
0
    {
2922
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2923
0
        ps_ctl_op->u4_min_out_buf_size[1] =
2924
0
                        ps_ctl_op->u4_min_out_buf_size[2] = 0;
2925
0
    }
2926
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_422P)
2927
0
    {
2928
0
        ps_ctl_op->u4_min_out_buf_size[0] = (wd * ht);
2929
0
        ps_ctl_op->u4_min_out_buf_size[1] = (wd * ht) >> 1;
2930
0
        ps_ctl_op->u4_min_out_buf_size[2] = (wd * ht) >> 1;
2931
0
    }
2932
0
    ps_codec->i4_num_disp_bufs = ps_ctl_op->u4_num_disp_bufs;
2933
2934
0
    return IV_SUCCESS;
2935
0
}
2936
2937
2938
/**
2939
*******************************************************************************
2940
*
2941
* @brief
2942
*  Sets dynamic parameters
2943
*
2944
* @par Description:
2945
*  Sets dynamic parameters. Note Frame skip, decode header  mode are dynamic
2946
*  Dynamic change in stride is not  supported
2947
*
2948
* @param[in] ps_codec_obj
2949
*  Pointer to codec object at API level
2950
*
2951
* @param[in] pv_api_ip
2952
*  Pointer to input argument structure
2953
*
2954
* @param[out] pv_api_op
2955
*  Pointer to output argument structure
2956
*
2957
* @returns  Status
2958
*
2959
* @remarks
2960
*
2961
*
2962
*******************************************************************************
2963
*/
2964
WORD32 ihevcd_set_params(iv_obj_t *ps_codec_obj,
2965
                         void *pv_api_ip,
2966
                         void *pv_api_op)
2967
18.5k
{
2968
2969
18.5k
    codec_t *ps_codec;
2970
18.5k
    WORD32 ret = IV_SUCCESS;
2971
18.5k
    WORD32 strd;
2972
18.5k
    ivd_ctl_set_config_ip_t *s_ctl_dynparams_ip =
2973
18.5k
                    (ivd_ctl_set_config_ip_t *)pv_api_ip;
2974
18.5k
    ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
2975
18.5k
                    (ivd_ctl_set_config_op_t *)pv_api_op;
2976
2977
18.5k
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
2978
2979
18.5k
    s_ctl_dynparams_op->u4_error_code = 0;
2980
2981
18.5k
    ps_codec->e_pic_skip_mode = s_ctl_dynparams_ip->e_frm_skip_mode;
2982
2983
18.5k
    if(s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_NONE)
2984
0
    {
2985
2986
0
        if((s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_P) &&
2987
0
           (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_B) &&
2988
0
           (s_ctl_dynparams_ip->e_frm_skip_mode != IVD_SKIP_PB))
2989
0
        {
2990
0
            s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
2991
0
            ret = IV_FAIL;
2992
0
        }
2993
0
    }
2994
2995
18.5k
    strd = ps_codec->i4_disp_strd;
2996
18.5k
    if(1 == ps_codec->i4_share_disp_buf)
2997
0
    {
2998
0
        strd = ps_codec->i4_strd;
2999
0
    }
3000
3001
3002
18.5k
    {
3003
18.5k
        if((WORD32)s_ctl_dynparams_ip->u4_disp_wd >= ps_codec->i4_disp_wd)
3004
12.9k
        {
3005
12.9k
            strd = s_ctl_dynparams_ip->u4_disp_wd;
3006
12.9k
        }
3007
5.56k
        else if(0 == ps_codec->i4_sps_done)
3008
0
        {
3009
0
            strd = s_ctl_dynparams_ip->u4_disp_wd;
3010
0
        }
3011
5.56k
        else if(s_ctl_dynparams_ip->u4_disp_wd == 0)
3012
5.56k
        {
3013
5.56k
            strd = ps_codec->i4_disp_strd;
3014
5.56k
        }
3015
0
        else
3016
0
        {
3017
0
            strd = 0;
3018
0
            s_ctl_dynparams_op->u4_error_code |= (1 << IVD_UNSUPPORTEDPARAM);
3019
0
            s_ctl_dynparams_op->u4_error_code |= IHEVCD_INVALID_DISP_STRD;
3020
0
            ret = IV_FAIL;
3021
0
        }
3022
18.5k
    }
3023
3024
18.5k
    ps_codec->i4_disp_strd = strd;
3025
18.5k
    if(1 == ps_codec->i4_share_disp_buf)
3026
0
    {
3027
0
        ps_codec->i4_strd = strd;
3028
0
    }
3029
3030
18.5k
    if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_FRAME)
3031
9.25k
        ps_codec->i4_header_mode = 0;
3032
9.25k
    else if(s_ctl_dynparams_ip->e_vid_dec_mode == IVD_DECODE_HEADER)
3033
9.25k
        ps_codec->i4_header_mode = 1;
3034
0
    else
3035
0
    {
3036
3037
0
        s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
3038
0
        ps_codec->i4_header_mode = 1;
3039
0
        ret = IV_FAIL;
3040
0
    }
3041
3042
18.5k
    ps_codec->e_frm_out_mode = IVD_DISPLAY_FRAME_OUT;
3043
3044
18.5k
    if((s_ctl_dynparams_ip->e_frm_out_mode != IVD_DECODE_FRAME_OUT) &&
3045
18.5k
       (s_ctl_dynparams_ip->e_frm_out_mode != IVD_DISPLAY_FRAME_OUT))
3046
0
    {
3047
0
        s_ctl_dynparams_op->u4_error_code = (1 << IVD_UNSUPPORTEDPARAM);
3048
0
        ret = IV_FAIL;
3049
0
    }
3050
18.5k
    ps_codec->e_frm_out_mode = s_ctl_dynparams_ip->e_frm_out_mode;
3051
3052
18.5k
    return ret;
3053
3054
18.5k
}
3055
/**
3056
*******************************************************************************
3057
*
3058
* @brief
3059
*  Resets the decoder state
3060
*
3061
* @par Description:
3062
*  Resets the decoder state by calling ihevcd_init()
3063
*
3064
* @param[in] ps_codec_obj
3065
*  Pointer to codec object at API level
3066
*
3067
* @param[in] pv_api_ip
3068
*  Pointer to input argument structure
3069
*
3070
* @param[out] pv_api_op
3071
*  Pointer to output argument structure
3072
*
3073
* @returns  Status
3074
*
3075
* @remarks
3076
*
3077
*
3078
*******************************************************************************
3079
*/
3080
WORD32 ihevcd_reset(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
3081
2.51k
{
3082
2.51k
    codec_t *ps_codec;
3083
2.51k
    ivd_ctl_reset_op_t *s_ctl_reset_op = (ivd_ctl_reset_op_t *)pv_api_op;
3084
2.51k
    UNUSED(pv_api_ip);
3085
2.51k
    ps_codec = (codec_t *)(ps_codec_obj->pv_codec_handle);
3086
3087
2.51k
    if(ps_codec != NULL)
3088
2.51k
    {
3089
2.51k
        DEBUG("\nReset called \n");
3090
2.51k
        ihevcd_join_threads(ps_codec);
3091
3092
2.51k
        ihevcd_init(ps_codec);
3093
2.51k
    }
3094
0
    else
3095
0
    {
3096
0
        DEBUG("\nReset called without Initializing the decoder\n");
3097
0
        s_ctl_reset_op->u4_error_code = IHEVCD_INIT_NOT_DONE;
3098
0
    }
3099
3100
2.51k
    return IV_SUCCESS;
3101
2.51k
}
3102
3103
/**
3104
*******************************************************************************
3105
*
3106
* @brief
3107
*  Releases display buffer from application to codec  to signal to the codec
3108
* that it can write to this buffer  if required. Till release is called,
3109
* codec can not write  to this buffer
3110
*
3111
* @par Description:
3112
*  Marks the buffer as display done
3113
*
3114
* @param[in] ps_codec_obj
3115
*  Pointer to codec object at API level
3116
*
3117
* @param[in] pv_api_ip
3118
*  Pointer to input argument structure
3119
*
3120
* @param[out] pv_api_op
3121
*  Pointer to output argument structure
3122
*
3123
* @returns  Status
3124
*
3125
* @remarks
3126
*
3127
*
3128
*******************************************************************************
3129
*/
3130
3131
WORD32 ihevcd_rel_display_frame(iv_obj_t *ps_codec_obj,
3132
                                void *pv_api_ip,
3133
                                void *pv_api_op)
3134
0
{
3135
3136
0
    ivd_rel_display_frame_ip_t *ps_dec_rel_disp_ip;
3137
0
    ivd_rel_display_frame_op_t *ps_dec_rel_disp_op;
3138
3139
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3140
3141
0
    ps_dec_rel_disp_ip = (ivd_rel_display_frame_ip_t *)pv_api_ip;
3142
0
    ps_dec_rel_disp_op = (ivd_rel_display_frame_op_t *)pv_api_op;
3143
3144
0
    UNUSED(ps_dec_rel_disp_op);
3145
3146
0
    if(0 == ps_codec->i4_share_disp_buf)
3147
0
    {
3148
0
        return IV_SUCCESS;
3149
0
    }
3150
3151
0
    ihevc_buf_mgr_release((buf_mgr_t *)ps_codec->pv_pic_buf_mgr, ps_dec_rel_disp_ip->u4_disp_buf_id, BUF_MGR_DISP);
3152
3153
0
    return IV_SUCCESS;
3154
0
}
3155
/**
3156
*******************************************************************************
3157
*
3158
* @brief
3159
*  Sets degrade params
3160
*
3161
* @par Description:
3162
*  Sets degrade params.
3163
*  Refer to ihevcd_cxa_ctl_degrade_ip_t definition for details
3164
*
3165
* @param[in] ps_codec_obj
3166
*  Pointer to codec object at API level
3167
*
3168
* @param[in] pv_api_ip
3169
*  Pointer to input argument structure
3170
*
3171
* @param[out] pv_api_op
3172
*  Pointer to output argument structure
3173
*
3174
* @returns  Status
3175
*
3176
* @remarks
3177
*
3178
*
3179
*******************************************************************************
3180
*/
3181
3182
WORD32 ihevcd_set_degrade(iv_obj_t *ps_codec_obj,
3183
                          void *pv_api_ip,
3184
                          void *pv_api_op)
3185
0
{
3186
0
    ihevcd_cxa_ctl_degrade_ip_t *ps_ip;
3187
0
    ihevcd_cxa_ctl_degrade_op_t *ps_op;
3188
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3189
3190
0
    ps_ip = (ihevcd_cxa_ctl_degrade_ip_t *)pv_api_ip;
3191
0
    ps_op = (ihevcd_cxa_ctl_degrade_op_t *)pv_api_op;
3192
3193
0
    ps_codec->i4_degrade_type = ps_ip->i4_degrade_type;
3194
0
    ps_codec->i4_nondegrade_interval = ps_ip->i4_nondegrade_interval;
3195
0
    ps_codec->i4_degrade_pics = ps_ip->i4_degrade_pics;
3196
3197
0
    ps_op->u4_error_code = 0;
3198
0
    ps_codec->i4_degrade_pic_cnt = 0;
3199
3200
0
    return IV_SUCCESS;
3201
0
}
3202
3203
3204
/**
3205
*******************************************************************************
3206
*
3207
* @brief
3208
*  Gets frame dimensions/offsets
3209
*
3210
* @par Description:
3211
*  Gets frame buffer chararacteristics such a x & y offsets  display and
3212
* buffer dimensions
3213
*
3214
* @param[in] ps_codec_obj
3215
*  Pointer to codec object at API level
3216
*
3217
* @param[in] pv_api_ip
3218
*  Pointer to input argument structure
3219
*
3220
* @param[out] pv_api_op
3221
*  Pointer to output argument structure
3222
*
3223
* @returns  Status
3224
*
3225
* @remarks
3226
*
3227
*
3228
*******************************************************************************
3229
*/
3230
3231
WORD32 ihevcd_get_frame_dimensions(iv_obj_t *ps_codec_obj,
3232
                                   void *pv_api_ip,
3233
                                   void *pv_api_op)
3234
0
{
3235
0
    ihevcd_cxa_ctl_get_frame_dimensions_ip_t *ps_ip;
3236
0
    ihevcd_cxa_ctl_get_frame_dimensions_op_t *ps_op;
3237
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3238
0
    WORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset;
3239
0
    ps_ip = (ihevcd_cxa_ctl_get_frame_dimensions_ip_t *)pv_api_ip;
3240
0
    ps_op = (ihevcd_cxa_ctl_get_frame_dimensions_op_t *)pv_api_op;
3241
0
    UNUSED(ps_ip);
3242
0
    if(ps_codec->i4_sps_done)
3243
0
    {
3244
0
        disp_wd = ps_codec->i4_disp_wd;
3245
0
        disp_ht = ps_codec->i4_disp_ht;
3246
3247
0
        if(0 == ps_codec->i4_share_disp_buf)
3248
0
        {
3249
0
            buffer_wd = disp_wd;
3250
0
            buffer_ht = disp_ht;
3251
0
        }
3252
0
        else
3253
0
        {
3254
0
            buffer_wd = ps_codec->i4_strd;
3255
0
            buffer_ht = ps_codec->i4_ht + PAD_HT;
3256
0
        }
3257
0
    }
3258
0
    else
3259
0
    {
3260
3261
0
        disp_wd = 0;
3262
0
        disp_ht = 0;
3263
3264
0
        if(0 == ps_codec->i4_share_disp_buf)
3265
0
        {
3266
0
            buffer_wd = disp_wd;
3267
0
            buffer_ht = disp_ht;
3268
0
        }
3269
0
        else
3270
0
        {
3271
0
            buffer_wd = ALIGN16(disp_wd) + PAD_WD;
3272
0
            buffer_ht = ALIGN16(disp_ht) + PAD_HT;
3273
3274
0
        }
3275
0
    }
3276
0
    if(ps_codec->i4_strd > buffer_wd)
3277
0
        buffer_wd = ps_codec->i4_strd;
3278
3279
0
    if(0 == ps_codec->i4_share_disp_buf)
3280
0
    {
3281
0
        x_offset = 0;
3282
0
        y_offset = 0;
3283
0
    }
3284
0
    else
3285
0
    {
3286
0
        y_offset = PAD_TOP;
3287
0
        x_offset = PAD_LEFT;
3288
0
    }
3289
3290
0
    ps_op->u4_disp_wd[0] = disp_wd;
3291
0
    ps_op->u4_disp_ht[0] = disp_ht;
3292
0
    ps_op->u4_buffer_wd[0] = buffer_wd;
3293
0
    ps_op->u4_buffer_ht[0] = buffer_ht;
3294
0
    ps_op->u4_x_offset[0] = x_offset;
3295
0
    ps_op->u4_y_offset[0] = y_offset;
3296
3297
0
    ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1)
3298
0
                    >> 1);
3299
0
    ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1)
3300
0
                    >> 1);
3301
0
    ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0]
3302
0
                    >> 1);
3303
0
    ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0]
3304
0
                    >> 1);
3305
0
    ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = (ps_op->u4_x_offset[0]
3306
0
                    >> 1);
3307
0
    ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = (ps_op->u4_y_offset[0]
3308
0
                    >> 1);
3309
3310
0
    if((ps_codec->e_chroma_fmt == IV_YUV_420SP_UV)
3311
0
                    || (ps_codec->e_chroma_fmt == IV_YUV_420SP_VU))
3312
0
    {
3313
0
        ps_op->u4_disp_wd[2] = 0;
3314
0
        ps_op->u4_disp_ht[2] = 0;
3315
0
        ps_op->u4_buffer_wd[2] = 0;
3316
0
        ps_op->u4_buffer_ht[2] = 0;
3317
0
        ps_op->u4_x_offset[2] = 0;
3318
0
        ps_op->u4_y_offset[2] = 0;
3319
3320
0
        ps_op->u4_disp_wd[1] <<= 1;
3321
0
        ps_op->u4_buffer_wd[1] <<= 1;
3322
0
        ps_op->u4_x_offset[1] <<= 1;
3323
0
    }
3324
0
    else if(ps_codec->e_chroma_fmt == IV_YUV_444P)
3325
0
    {
3326
0
        ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ps_op->u4_disp_wd[0];
3327
0
        ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ps_op->u4_disp_ht[0];
3328
0
        ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = ps_op->u4_buffer_wd[0];
3329
0
        ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = ps_op->u4_buffer_ht[0];
3330
0
        ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = ps_op->u4_x_offset[0];
3331
0
        ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = ps_op->u4_y_offset[0];
3332
0
    }
3333
0
    else if(ps_codec->e_chroma_fmt == IV_GRAY)
3334
0
    {
3335
0
        ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = 0;
3336
0
        ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = 0;
3337
0
        ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = 0;
3338
0
        ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = 0;
3339
0
        ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = 0;
3340
0
        ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = 0;
3341
0
    }
3342
3343
0
    return IV_SUCCESS;
3344
3345
0
}
3346
3347
3348
/**
3349
*******************************************************************************
3350
*
3351
* @brief
3352
*  Gets vui parameters
3353
*
3354
* @par Description:
3355
*  Gets VUI parameters
3356
*
3357
* @param[in] ps_codec_obj
3358
*  Pointer to codec object at API level
3359
*
3360
* @param[in] pv_api_ip
3361
*  Pointer to input argument structure
3362
*
3363
* @param[out] pv_api_op
3364
*  Pointer to output argument structure
3365
*
3366
* @returns  Status
3367
*
3368
* @remarks
3369
*
3370
*
3371
*******************************************************************************
3372
*/
3373
WORD32 ihevcd_get_vui_params(iv_obj_t *ps_codec_obj,
3374
                             void *pv_api_ip,
3375
                             void *pv_api_op)
3376
0
{
3377
0
    ihevcd_cxa_ctl_get_vui_params_ip_t *ps_ip;
3378
0
    ihevcd_cxa_ctl_get_vui_params_op_t *ps_op;
3379
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3380
0
    sps_t *ps_sps;
3381
0
    vui_t *ps_vui;
3382
0
    WORD32 i;
3383
3384
0
    ps_ip = (ihevcd_cxa_ctl_get_vui_params_ip_t *)pv_api_ip;
3385
0
    ps_op = (ihevcd_cxa_ctl_get_vui_params_op_t *)pv_api_op;
3386
3387
0
    if(0 == ps_codec->i4_sps_done)
3388
0
    {
3389
0
        ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3390
0
        return IV_FAIL;
3391
0
    }
3392
3393
0
    ps_sps = ps_codec->s_parse.ps_sps;
3394
0
    if(0 == ps_sps->i1_sps_valid || 0 == ps_sps->i1_vui_parameters_present_flag)
3395
0
    {
3396
0
        WORD32 sps_idx = 0;
3397
0
        ps_sps = ps_codec->ps_sps_base;
3398
3399
0
        while((0 == ps_sps->i1_sps_valid) || (0 == ps_sps->i1_vui_parameters_present_flag))
3400
0
        {
3401
0
            sps_idx++;
3402
0
            ps_sps++;
3403
3404
0
            if(sps_idx == MAX_SPS_CNT - 1)
3405
0
            {
3406
0
                ps_op->u4_error_code = IHEVCD_VUI_PARAMS_NOT_FOUND;
3407
0
                return IV_FAIL;
3408
0
            }
3409
0
        }
3410
0
    }
3411
3412
0
    ps_vui = &ps_sps->s_vui_parameters;
3413
0
    UNUSED(ps_ip);
3414
3415
0
    ps_op->u1_aspect_ratio_info_present_flag         =  ps_vui->u1_aspect_ratio_info_present_flag;
3416
0
    ps_op->u1_aspect_ratio_idc                       =  ps_vui->u1_aspect_ratio_idc;
3417
0
    ps_op->u2_sar_width                              =  ps_vui->u2_sar_width;
3418
0
    ps_op->u2_sar_height                             =  ps_vui->u2_sar_height;
3419
0
    ps_op->u1_overscan_info_present_flag             =  ps_vui->u1_overscan_info_present_flag;
3420
0
    ps_op->u1_overscan_appropriate_flag              =  ps_vui->u1_overscan_appropriate_flag;
3421
0
    ps_op->u1_video_signal_type_present_flag         =  ps_vui->u1_video_signal_type_present_flag;
3422
0
    ps_op->u1_video_format                           =  ps_vui->u1_video_format;
3423
0
    ps_op->u1_video_full_range_flag                  =  ps_vui->u1_video_full_range_flag;
3424
0
    ps_op->u1_colour_description_present_flag        =  ps_vui->u1_colour_description_present_flag;
3425
0
    ps_op->u1_colour_primaries                       =  ps_vui->u1_colour_primaries;
3426
0
    ps_op->u1_transfer_characteristics               =  ps_vui->u1_transfer_characteristics;
3427
0
    ps_op->u1_matrix_coefficients                    =  ps_vui->u1_matrix_coefficients;
3428
0
    ps_op->u1_chroma_loc_info_present_flag           =  ps_vui->u1_chroma_loc_info_present_flag;
3429
0
    ps_op->u1_chroma_sample_loc_type_top_field       =  ps_vui->u1_chroma_sample_loc_type_top_field;
3430
0
    ps_op->u1_chroma_sample_loc_type_bottom_field    =  ps_vui->u1_chroma_sample_loc_type_bottom_field;
3431
0
    ps_op->u1_neutral_chroma_indication_flag         =  ps_vui->u1_neutral_chroma_indication_flag;
3432
0
    ps_op->u1_field_seq_flag                         =  ps_vui->u1_field_seq_flag;
3433
0
    ps_op->u1_frame_field_info_present_flag          =  ps_vui->u1_frame_field_info_present_flag;
3434
0
    ps_op->u1_default_display_window_flag            =  ps_vui->u1_default_display_window_flag;
3435
0
    ps_op->u4_def_disp_win_left_offset               =  ps_vui->u4_def_disp_win_left_offset;
3436
0
    ps_op->u4_def_disp_win_right_offset              =  ps_vui->u4_def_disp_win_right_offset;
3437
0
    ps_op->u4_def_disp_win_top_offset                =  ps_vui->u4_def_disp_win_top_offset;
3438
0
    ps_op->u4_def_disp_win_bottom_offset             =  ps_vui->u4_def_disp_win_bottom_offset;
3439
0
    ps_op->u1_vui_hrd_parameters_present_flag        =  ps_vui->u1_vui_hrd_parameters_present_flag;
3440
0
    ps_op->u1_vui_timing_info_present_flag           =  ps_vui->u1_vui_timing_info_present_flag;
3441
0
    ps_op->u4_vui_num_units_in_tick                  =  ps_vui->u4_vui_num_units_in_tick;
3442
0
    ps_op->u4_vui_time_scale                         =  ps_vui->u4_vui_time_scale;
3443
0
    ps_op->u1_poc_proportional_to_timing_flag        =  ps_vui->u1_poc_proportional_to_timing_flag;
3444
0
    ps_op->u4_num_ticks_poc_diff_one_minus1          =  ps_vui->u4_num_ticks_poc_diff_one_minus1;
3445
0
    ps_op->u1_bitstream_restriction_flag             =  ps_vui->u1_bitstream_restriction_flag;
3446
0
    ps_op->u1_tiles_fixed_structure_flag             =  ps_vui->u1_tiles_fixed_structure_flag;
3447
0
    ps_op->u1_motion_vectors_over_pic_boundaries_flag =  ps_vui->u1_motion_vectors_over_pic_boundaries_flag;
3448
0
    ps_op->u1_restricted_ref_pic_lists_flag          =  ps_vui->u1_restricted_ref_pic_lists_flag;
3449
0
    ps_op->u4_min_spatial_segmentation_idc           =  ps_vui->u4_min_spatial_segmentation_idc;
3450
0
    ps_op->u1_max_bytes_per_pic_denom                =  ps_vui->u1_max_bytes_per_pic_denom;
3451
0
    ps_op->u1_max_bits_per_mincu_denom               =  ps_vui->u1_max_bits_per_mincu_denom;
3452
0
    ps_op->u1_log2_max_mv_length_horizontal          =  ps_vui->u1_log2_max_mv_length_horizontal;
3453
0
    ps_op->u1_log2_max_mv_length_vertical            =  ps_vui->u1_log2_max_mv_length_vertical;
3454
3455
3456
    /* HRD parameters */
3457
0
    ps_op->u1_timing_info_present_flag                         =    ps_vui->s_vui_hrd_parameters.u1_timing_info_present_flag;
3458
0
    ps_op->u4_num_units_in_tick                                =    ps_vui->s_vui_hrd_parameters.u4_num_units_in_tick;
3459
0
    ps_op->u4_time_scale                                       =    ps_vui->s_vui_hrd_parameters.u4_time_scale;
3460
0
    ps_op->u1_nal_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_nal_hrd_parameters_present_flag;
3461
0
    ps_op->u1_vcl_hrd_parameters_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_vcl_hrd_parameters_present_flag;
3462
0
    ps_op->u1_cpbdpb_delays_present_flag                       =    ps_vui->s_vui_hrd_parameters.u1_cpbdpb_delays_present_flag;
3463
0
    ps_op->u1_sub_pic_cpb_params_present_flag                  =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_present_flag;
3464
0
    ps_op->u1_tick_divisor_minus2                              =    ps_vui->s_vui_hrd_parameters.u1_tick_divisor_minus2;
3465
0
    ps_op->u1_du_cpb_removal_delay_increment_length_minus1     =    ps_vui->s_vui_hrd_parameters.u1_du_cpb_removal_delay_increment_length_minus1;
3466
0
    ps_op->u1_sub_pic_cpb_params_in_pic_timing_sei_flag        =    ps_vui->s_vui_hrd_parameters.u1_sub_pic_cpb_params_in_pic_timing_sei_flag;
3467
0
    ps_op->u1_dpb_output_delay_du_length_minus1                =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_du_length_minus1;
3468
0
    ps_op->u4_bit_rate_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_bit_rate_scale;
3469
0
    ps_op->u4_cpb_size_scale                                   =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_scale;
3470
0
    ps_op->u4_cpb_size_du_scale                                =    ps_vui->s_vui_hrd_parameters.u4_cpb_size_du_scale;
3471
0
    ps_op->u1_initial_cpb_removal_delay_length_minus1          =    ps_vui->s_vui_hrd_parameters.u1_initial_cpb_removal_delay_length_minus1;
3472
0
    ps_op->u1_au_cpb_removal_delay_length_minus1               =    ps_vui->s_vui_hrd_parameters.u1_au_cpb_removal_delay_length_minus1;
3473
0
    ps_op->u1_dpb_output_delay_length_minus1                   =    ps_vui->s_vui_hrd_parameters.u1_dpb_output_delay_length_minus1;
3474
3475
0
    for(i = 0; i < 6; i++)
3476
0
    {
3477
0
        ps_op->au1_fixed_pic_rate_general_flag[i]                  =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_general_flag[i];
3478
0
        ps_op->au1_fixed_pic_rate_within_cvs_flag[i]               =    ps_vui->s_vui_hrd_parameters.au1_fixed_pic_rate_within_cvs_flag[i];
3479
0
        ps_op->au2_elemental_duration_in_tc_minus1[i]              =    ps_vui->s_vui_hrd_parameters.au2_elemental_duration_in_tc_minus1[i];
3480
0
        ps_op->au1_low_delay_hrd_flag[i]                           =    ps_vui->s_vui_hrd_parameters.au1_low_delay_hrd_flag[i];
3481
0
        ps_op->au1_cpb_cnt_minus1[i]                               =    ps_vui->s_vui_hrd_parameters.au1_cpb_cnt_minus1[i];
3482
0
    }
3483
3484
3485
0
    return IV_SUCCESS;
3486
0
}
3487
3488
#ifndef DISABLE_SEI
3489
/**
3490
*******************************************************************************
3491
*
3492
* @brief
3493
*  Gets SEI mastering display color volume parameters
3494
*
3495
* @par Description:
3496
*  Gets SEI mastering display color volume parameters
3497
*
3498
* @param[in] ps_codec_obj
3499
*  Pointer to codec object at API level
3500
*
3501
* @param[in] pv_api_ip
3502
*  Pointer to input argument structure
3503
*
3504
* @param[out] pv_api_op
3505
*  Pointer to output argument structure
3506
*
3507
* @returns  Status
3508
*
3509
* @remarks
3510
*
3511
*
3512
*******************************************************************************
3513
*/
3514
WORD32 ihevcd_get_sei_mastering_params(iv_obj_t *ps_codec_obj,
3515
                             void *pv_api_ip,
3516
                             void *pv_api_op)
3517
0
{
3518
0
    ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *ps_ip;
3519
0
    ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op;
3520
0
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3521
0
    sei_params_t *ps_sei;
3522
0
    mastering_dis_col_vol_sei_params_t *ps_mastering_dis_col_vol;
3523
0
    WORD32 i;
3524
3525
0
    ps_ip = (ihevcd_cxa_ctl_get_sei_mastering_params_ip_t *)pv_api_ip;
3526
0
    ps_op = (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
3527
0
    UNUSED(ps_ip);
3528
0
    if(NULL == ps_codec->ps_disp_buf)
3529
0
    {
3530
0
        ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3531
0
        return IV_FAIL;
3532
0
    }
3533
0
    ps_sei = &ps_codec->ps_disp_buf->s_sei_params;
3534
0
    if((0 == ps_sei->i4_sei_mastering_disp_colour_vol_params_present_flags)
3535
0
                    || (0 == ps_sei->i1_sei_parameters_present_flag))
3536
0
    {
3537
0
        ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3538
0
        return IV_FAIL;
3539
0
    }
3540
3541
0
    ps_mastering_dis_col_vol = &ps_sei->s_mastering_dis_col_vol_sei_params;
3542
3543
0
    for(i = 0; i < 3; i++)
3544
0
    {
3545
0
        ps_op->au2_display_primaries_x[i] =
3546
0
                    ps_mastering_dis_col_vol->au2_display_primaries_x[i];
3547
3548
0
        ps_op->au2_display_primaries_y[i] =
3549
0
                    ps_mastering_dis_col_vol->au2_display_primaries_y[i];
3550
0
    }
3551
3552
0
    ps_op->u2_white_point_x = ps_mastering_dis_col_vol->u2_white_point_x;
3553
3554
0
    ps_op->u2_white_point_y = ps_mastering_dis_col_vol->u2_white_point_y;
3555
3556
0
    ps_op->u4_max_display_mastering_luminance =
3557
0
                    ps_mastering_dis_col_vol->u4_max_display_mastering_luminance;
3558
3559
0
    ps_op->u4_min_display_mastering_luminance =
3560
0
                    ps_mastering_dis_col_vol->u4_min_display_mastering_luminance;
3561
3562
0
    return IV_SUCCESS;
3563
0
}
3564
#endif
3565
3566
/**
3567
*******************************************************************************
3568
*
3569
* @brief
3570
*  Sets Processor type
3571
*
3572
* @par Description:
3573
*  Sets Processor type
3574
*
3575
* @param[in] ps_codec_obj
3576
*  Pointer to codec object at API level
3577
*
3578
* @param[in] pv_api_ip
3579
*  Pointer to input argument structure
3580
*
3581
* @param[out] pv_api_op
3582
*  Pointer to output argument structure
3583
*
3584
* @returns  Status
3585
*
3586
* @remarks
3587
*
3588
*
3589
*******************************************************************************
3590
*/
3591
3592
WORD32 ihevcd_set_processor(iv_obj_t *ps_codec_obj,
3593
                            void *pv_api_ip,
3594
                            void *pv_api_op)
3595
9.25k
{
3596
9.25k
    ihevcd_cxa_ctl_set_processor_ip_t *ps_ip;
3597
9.25k
    ihevcd_cxa_ctl_set_processor_op_t *ps_op;
3598
9.25k
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3599
3600
9.25k
    ps_ip = (ihevcd_cxa_ctl_set_processor_ip_t *)pv_api_ip;
3601
9.25k
    ps_op = (ihevcd_cxa_ctl_set_processor_op_t *)pv_api_op;
3602
3603
9.25k
    ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch;
3604
9.25k
    ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc;
3605
3606
9.25k
    ihevcd_init_function_ptr(ps_codec);
3607
3608
9.25k
    ihevcd_update_function_ptr(ps_codec);
3609
3610
9.25k
    if(ps_codec->e_processor_soc && (ps_codec->e_processor_soc <= SOC_HISI_37X))
3611
0
    {
3612
        /* 8th bit indicates if format conversion is to be done ahead */
3613
0
        if(ps_codec->e_processor_soc & 0x80)
3614
0
            ps_codec->u4_enable_fmt_conv_ahead = 1;
3615
3616
        /* Lower 7 bit indicate NCTB - if non-zero */
3617
0
        ps_codec->e_processor_soc &= 0x7F;
3618
3619
0
        if(ps_codec->e_processor_soc)
3620
0
            ps_codec->u4_nctb = ps_codec->e_processor_soc;
3621
3622
3623
0
    }
3624
3625
9.25k
    if((ps_codec->e_processor_soc == SOC_HISI_37X) && (ps_codec->i4_num_cores == 2))
3626
0
    {
3627
0
        ps_codec->u4_nctb = 2;
3628
0
    }
3629
3630
3631
9.25k
    ps_op->u4_error_code = 0;
3632
9.25k
    return IV_SUCCESS;
3633
9.25k
}
3634
3635
/**
3636
*******************************************************************************
3637
*
3638
* @brief
3639
*  Sets Number of cores that can be used in the codec. Codec uses these many
3640
* threads for decoding
3641
*
3642
* @par Description:
3643
*  Sets number of cores
3644
*
3645
* @param[in] ps_codec_obj
3646
*  Pointer to codec object at API level
3647
*
3648
* @param[in] pv_api_ip
3649
*  Pointer to input argument structure
3650
*
3651
* @param[out] pv_api_op
3652
*  Pointer to output argument structure
3653
*
3654
* @returns  Status
3655
*
3656
* @remarks
3657
*
3658
*
3659
*******************************************************************************
3660
*/
3661
3662
WORD32 ihevcd_set_num_cores(iv_obj_t *ps_codec_obj,
3663
                            void *pv_api_ip,
3664
                            void *pv_api_op)
3665
9.25k
{
3666
9.25k
    ihevcd_cxa_ctl_set_num_cores_ip_t *ps_ip;
3667
9.25k
    ihevcd_cxa_ctl_set_num_cores_op_t *ps_op;
3668
9.25k
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3669
3670
9.25k
    ps_ip = (ihevcd_cxa_ctl_set_num_cores_ip_t *)pv_api_ip;
3671
9.25k
    ps_op = (ihevcd_cxa_ctl_set_num_cores_op_t *)pv_api_op;
3672
3673
9.25k
    ps_codec->i4_num_cores = ps_ip->u4_num_cores;
3674
9.25k
    ps_op->u4_error_code = 0;
3675
9.25k
    return IV_SUCCESS;
3676
9.25k
}
3677
/**
3678
*******************************************************************************
3679
*
3680
* @brief
3681
*  Codec control call
3682
*
3683
* @par Description:
3684
*  Codec control call which in turn calls appropriate calls  based on
3685
* subcommand
3686
*
3687
* @param[in] ps_codec_obj
3688
*  Pointer to codec object at API level
3689
*
3690
* @param[in] pv_api_ip
3691
*  Pointer to input argument structure
3692
*
3693
* @param[out] pv_api_op
3694
*  Pointer to output argument structure
3695
*
3696
* @returns  Status
3697
*
3698
* @remarks
3699
*
3700
*
3701
*******************************************************************************
3702
*/
3703
3704
WORD32 ihevcd_ctl(iv_obj_t *ps_codec_obj, void *pv_api_ip, void *pv_api_op)
3705
39.5k
{
3706
39.5k
    ivd_ctl_set_config_ip_t *ps_ctl_ip;
3707
39.5k
    ivd_ctl_set_config_op_t *ps_ctl_op;
3708
39.5k
    WORD32 ret = 0;
3709
39.5k
    WORD32 subcommand;
3710
39.5k
    codec_t *ps_codec = (codec_t *)ps_codec_obj->pv_codec_handle;
3711
3712
39.5k
    ps_ctl_ip = (ivd_ctl_set_config_ip_t *)pv_api_ip;
3713
39.5k
    ps_ctl_op = (ivd_ctl_set_config_op_t *)pv_api_op;
3714
3715
39.5k
    if(ps_codec->i4_init_done != 1)
3716
0
    {
3717
0
        ps_ctl_op->u4_error_code |= 1 << IVD_FATALERROR;
3718
0
        ps_ctl_op->u4_error_code |= IHEVCD_INIT_NOT_DONE;
3719
0
        return IV_FAIL;
3720
0
    }
3721
39.5k
    subcommand = ps_ctl_ip->e_sub_cmd;
3722
3723
39.5k
    switch(subcommand)
3724
39.5k
    {
3725
0
        case IVD_CMD_CTL_GETPARAMS:
3726
0
            ret = ihevcd_get_status(ps_codec_obj, (void *)pv_api_ip,
3727
0
                                    (void *)pv_api_op);
3728
0
            break;
3729
18.5k
        case IVD_CMD_CTL_SETPARAMS:
3730
18.5k
            ret = ihevcd_set_params(ps_codec_obj, (void *)pv_api_ip,
3731
18.5k
                                    (void *)pv_api_op);
3732
18.5k
            break;
3733
2.51k
        case IVD_CMD_CTL_RESET:
3734
2.51k
            ret = ihevcd_reset(ps_codec_obj, (void *)pv_api_ip,
3735
2.51k
                               (void *)pv_api_op);
3736
2.51k
            break;
3737
0
        case IVD_CMD_CTL_SETDEFAULT:
3738
0
        {
3739
0
            ivd_ctl_set_config_op_t *s_ctl_dynparams_op =
3740
0
                            (ivd_ctl_set_config_op_t *)pv_api_op;
3741
3742
0
            ret = ihevcd_set_default_params(ps_codec);
3743
0
            if(IV_SUCCESS == ret)
3744
0
                s_ctl_dynparams_op->u4_error_code = 0;
3745
0
            break;
3746
0
        }
3747
0
        case IVD_CMD_CTL_FLUSH:
3748
0
            ret = ihevcd_set_flush_mode(ps_codec_obj, (void *)pv_api_ip,
3749
0
                                        (void *)pv_api_op);
3750
0
            break;
3751
0
        case IVD_CMD_CTL_GETBUFINFO:
3752
0
            ret = ihevcd_get_buf_info(ps_codec_obj, (void *)pv_api_ip,
3753
0
                                      (void *)pv_api_op);
3754
0
            break;
3755
0
        case IVD_CMD_CTL_GETVERSION:
3756
0
        {
3757
0
            ivd_ctl_getversioninfo_ip_t *ps_ip;
3758
0
            ivd_ctl_getversioninfo_op_t *ps_op;
3759
0
            IV_API_CALL_STATUS_T ret;
3760
0
            ps_ip = (ivd_ctl_getversioninfo_ip_t *)pv_api_ip;
3761
0
            ps_op = (ivd_ctl_getversioninfo_op_t *)pv_api_op;
3762
3763
0
            ps_op->u4_error_code = IV_SUCCESS;
3764
3765
0
            if((WORD32)ps_ip->u4_version_buffer_size <= 0)
3766
0
            {
3767
0
                ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3768
0
                ret = IV_FAIL;
3769
0
            }
3770
0
            else
3771
0
            {
3772
0
                ret = ihevcd_get_version((CHAR *)ps_ip->pv_version_buffer,
3773
0
                                         ps_ip->u4_version_buffer_size);
3774
0
                if(ret != IV_SUCCESS)
3775
0
                {
3776
0
                    ps_op->u4_error_code = IHEVCD_CXA_VERS_BUF_INSUFFICIENT;
3777
0
                    ret = IV_FAIL;
3778
0
                }
3779
0
            }
3780
0
        }
3781
0
            break;
3782
0
        case IHEVCD_CXA_CMD_CTL_DEGRADE:
3783
0
            ret = ihevcd_set_degrade(ps_codec_obj, (void *)pv_api_ip,
3784
0
                            (void *)pv_api_op);
3785
0
            break;
3786
9.25k
        case IHEVCD_CXA_CMD_CTL_SET_NUM_CORES:
3787
9.25k
            ret = ihevcd_set_num_cores(ps_codec_obj, (void *)pv_api_ip,
3788
9.25k
                                       (void *)pv_api_op);
3789
9.25k
            break;
3790
0
        case IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS:
3791
0
            ret = ihevcd_get_frame_dimensions(ps_codec_obj, (void *)pv_api_ip,
3792
0
                                              (void *)pv_api_op);
3793
0
            break;
3794
0
        case IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS:
3795
0
            ret = ihevcd_get_vui_params(ps_codec_obj, (void *)pv_api_ip,
3796
0
                                        (void *)pv_api_op);
3797
0
            break;
3798
0
        case IHEVCD_CXA_CMD_CTL_GET_SEI_MASTERING_PARAMS:
3799
0
#ifndef DISABLE_SEI
3800
0
            ret = ihevcd_get_sei_mastering_params(ps_codec_obj, (void *)pv_api_ip,
3801
0
                                        (void *)pv_api_op);
3802
#else
3803
            {
3804
                ihevcd_cxa_ctl_get_sei_mastering_params_op_t *ps_op =
3805
                        (ihevcd_cxa_ctl_get_sei_mastering_params_op_t *)pv_api_op;
3806
                ps_op->u4_error_code = IHEVCD_SEI_MASTERING_PARAMS_NOT_FOUND;
3807
                return IV_FAIL;
3808
            }
3809
#endif
3810
0
            break;
3811
9.25k
        case IHEVCD_CXA_CMD_CTL_SET_PROCESSOR:
3812
9.25k
            ret = ihevcd_set_processor(ps_codec_obj, (void *)pv_api_ip,
3813
9.25k
                            (void *)pv_api_op);
3814
9.25k
            break;
3815
0
        default:
3816
0
            DEBUG("\nDo nothing\n");
3817
0
            break;
3818
39.5k
    }
3819
3820
39.5k
    return ret;
3821
39.5k
}
3822
3823
/**
3824
*******************************************************************************
3825
*
3826
* @brief
3827
*  Codecs entry point function. All the function calls to  the codec are
3828
* done using this function with different  values specified in command
3829
*
3830
* @par Description:
3831
*  Arguments are tested for validity and then based on the  command
3832
* appropriate function is called
3833
*
3834
* @param[in] ps_handle
3835
*  API level handle for codec
3836
*
3837
* @param[in] pv_api_ip
3838
*  Input argument structure
3839
*
3840
* @param[out] pv_api_op
3841
*  Output argument structure
3842
*
3843
* @returns  Status of the function corresponding to command
3844
*
3845
* @remarks
3846
*
3847
*
3848
*******************************************************************************
3849
*/
3850
IV_API_CALL_STATUS_T ihevcd_cxa_api_function(iv_obj_t *ps_handle,
3851
                                             void *pv_api_ip,
3852
                                             void *pv_api_op)
3853
337k
{
3854
337k
    WORD32 command;
3855
337k
    UWORD32 *pu4_ptr_cmd;
3856
337k
    WORD32 ret = 0;
3857
337k
    IV_API_CALL_STATUS_T e_status;
3858
337k
    e_status = api_check_struct_sanity(ps_handle, pv_api_ip, pv_api_op);
3859
3860
337k
    if(e_status != IV_SUCCESS)
3861
0
    {
3862
0
        DEBUG("error code = %d\n", *((UWORD32 *)pv_api_op + 1));
3863
0
        return IV_FAIL;
3864
0
    }
3865
3866
337k
    pu4_ptr_cmd = (UWORD32 *)pv_api_ip;
3867
337k
    pu4_ptr_cmd++;
3868
3869
337k
    command = *pu4_ptr_cmd;
3870
3871
337k
    switch(command)
3872
337k
    {
3873
9.25k
        case IVD_CMD_CREATE:
3874
9.25k
            ret = ihevcd_create(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3875
9.25k
            break;
3876
9.25k
        case IVD_CMD_DELETE:
3877
9.25k
            ret = ihevcd_delete(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3878
9.25k
            break;
3879
3880
279k
        case IVD_CMD_VIDEO_DECODE:
3881
279k
            ret = ihevcd_decode(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3882
279k
            break;
3883
3884
0
        case IVD_CMD_GET_DISPLAY_FRAME:
3885
            //ret = ihevcd_get_display_frame(ps_handle,(void *)pv_api_ip,(void *)pv_api_op);
3886
0
            break;
3887
3888
0
        case IVD_CMD_SET_DISPLAY_FRAME:
3889
0
            ret = ihevcd_set_display_frame(ps_handle, (void *)pv_api_ip,
3890
0
                                           (void *)pv_api_op);
3891
3892
0
            break;
3893
3894
0
        case IVD_CMD_REL_DISPLAY_FRAME:
3895
0
            ret = ihevcd_rel_display_frame(ps_handle, (void *)pv_api_ip,
3896
0
                                           (void *)pv_api_op);
3897
0
            break;
3898
3899
39.5k
        case IVD_CMD_VIDEO_CTL:
3900
39.5k
            ret = ihevcd_ctl(ps_handle, (void *)pv_api_ip, (void *)pv_api_op);
3901
39.5k
            break;
3902
0
        default:
3903
0
            ret = IV_FAIL;
3904
0
            break;
3905
337k
    }
3906
3907
337k
    return (IV_API_CALL_STATUS_T)ret;
3908
337k
}
3909