Coverage Report

Created: 2026-08-13 06:16

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/libhevc/encoder/ihevce_recur_bracketing.c
Line
Count
Source
1
/******************************************************************************
2
 *
3
 * Copyright (C) 2018 The Android Open Source Project
4
 *
5
 * Licensed under the Apache License, Version 2.0 (the "License");
6
 * you may not use this file except in compliance with the License.
7
 * You may obtain a copy of the License at:
8
 *
9
 * http://www.apache.org/licenses/LICENSE-2.0
10
 *
11
 * Unless required by applicable law or agreed to in writing, software
12
 * distributed under the License is distributed on an "AS IS" BASIS,
13
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
 * See the License for the specific language governing permissions and
15
 * limitations under the License.
16
 *
17
 *****************************************************************************
18
 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19
*/
20
21
/*!
22
******************************************************************************
23
* \file ihevce_recur_bracketing.c
24
*
25
* \brief
26
*    This file contains interface functions of recursive bracketing
27
*    module
28
* \date
29
*    12/02/2012
30
*
31
* \author
32
*    Ittiam
33
*
34
* List of Functions
35
*
36
*
37
******************************************************************************
38
*/
39
40
/*****************************************************************************/
41
/* File Includes                                                             */
42
/*****************************************************************************/
43
/* System include files */
44
#include <stdio.h>
45
#include <string.h>
46
#include <stdlib.h>
47
#include <assert.h>
48
#include <stdarg.h>
49
#include <math.h>
50
51
/* User include files */
52
#include "ihevc_typedefs.h"
53
#include "itt_video_api.h"
54
#include "ihevce_api.h"
55
56
#include "rc_cntrl_param.h"
57
#include "rc_frame_info_collector.h"
58
#include "rc_look_ahead_params.h"
59
60
#include "ihevc_defs.h"
61
#include "ihevc_structs.h"
62
#include "ihevc_platform_macros.h"
63
#include "ihevc_deblk.h"
64
#include "ihevc_itrans_recon.h"
65
#include "ihevc_chroma_itrans_recon.h"
66
#include "ihevc_chroma_intra_pred.h"
67
#include "ihevc_intra_pred.h"
68
#include "ihevc_inter_pred.h"
69
#include "ihevc_mem_fns.h"
70
#include "ihevc_padding.h"
71
#include "ihevc_weighted_pred.h"
72
#include "ihevc_sao.h"
73
#include "ihevc_resi_trans.h"
74
#include "ihevc_quant_iquant_ssd.h"
75
#include "ihevc_cabac_tables.h"
76
77
#include "ihevce_defs.h"
78
#include "ihevce_lap_enc_structs.h"
79
#include "ihevce_multi_thrd_structs.h"
80
#include "ihevce_me_common_defs.h"
81
#include "ihevce_had_satd.h"
82
#include "ihevce_error_codes.h"
83
#include "ihevce_bitstream.h"
84
#include "ihevce_cabac.h"
85
#include "ihevce_rdoq_macros.h"
86
#include "ihevce_function_selector.h"
87
#include "ihevce_enc_structs.h"
88
#include "ihevce_entropy_structs.h"
89
#include "ihevce_cmn_utils_instr_set_router.h"
90
#include "ihevce_enc_loop_structs.h"
91
#include "ihevce_ipe_instr_set_router.h"
92
#include "ihevce_ipe_structs.h"
93
#include "ihevce_ipe_pass.h"
94
#include "ihevce_recur_bracketing.h"
95
#include "ihevce_nbr_avail.h"
96
#include "ihevc_common_tables.h"
97
#include "ihevce_decomp_pre_intra_structs.h"
98
#include "ihevce_decomp_pre_intra_pass.h"
99
100
#include "cast_types.h"
101
#include "osal.h"
102
#include "osal_defaults.h"
103
104
/*****************************************************************************/
105
/* Constant Macros                                                           */
106
/*****************************************************************************/
107
#define IP_DBG_L1_l2 0
108
271k
#define CHILD_BIAS 12
109
110
/*****************************************************************************/
111
/* Globals                                                                   */
112
/*****************************************************************************/
113
extern pf_intra_pred g_apf_lum_ip[10];
114
115
extern WORD32 g_i4_ip_funcs[MAX_NUM_IP_MODES];
116
117
UWORD8 gau1_cu_pos_x[64] = { 0, 1, 0, 1, 2, 3, 2, 3, 0, 1, 0, 1, 2, 3, 2, 3, 4, 5, 4, 5, 6, 7,
118
                             6, 7, 4, 5, 4, 5, 6, 7, 6, 7, 0, 1, 0, 1, 2, 3, 2, 3, 0, 1, 0, 1,
119
                             2, 3, 2, 3, 4, 5, 4, 5, 6, 7, 6, 7, 4, 5, 4, 5, 6, 7, 6, 7 };
120
121
UWORD8 gau1_cu_pos_y[64] = { 0, 0, 1, 1, 0, 0, 1, 1, 2, 2, 3, 3, 2, 2, 3, 3, 0, 0, 1, 1, 0, 0,
122
                             1, 1, 2, 2, 3, 3, 2, 2, 3, 3, 4, 4, 5, 5, 4, 4, 5, 5, 6, 6, 7, 7,
123
                             6, 6, 7, 7, 4, 4, 5, 5, 4, 4, 5, 5, 6, 6, 7, 7, 6, 6, 7, 7 };
124
125
#define RESET_BIT(x, bit) (x = x & ~((WORD32)1 << bit))
126
127
/*****************************************************************************/
128
/* Function Definitions                                                      */
129
/*****************************************************************************/
130
131
/*!
132
******************************************************************************
133
* \if Function name : ihevce_update_cand_list \endif
134
*
135
* \brief
136
*    Final Candidate list population, nbr flag andd nbr mode update function
137
*
138
* \param[in] ps_row_cu : pointer to cu analyse struct
139
* \param[in] ps_cu_node : pointer to cu node info buffer
140
* \param[in] ps_ed_blk_l1 : pointer to level 1 and 2 decision buffer
141
* \param[in] pu1_cand_mode_list  : pointer to candidate list buffer
142
*
143
* \return
144
*    None
145
*
146
* \author
147
*  Ittiam
148
*
149
*****************************************************************************
150
*/
151
void ihevce_update_cand_list(
152
    ihevce_ipe_cu_tree_t *ps_cu_node, ihevce_ed_blk_t *ps_ed_blk_l1, ihevce_ipe_ctxt_t *ps_ctxt)
153
197k
{
154
197k
    WORD32 row, col, x, y, size;
155
156
    /* Candidate mode Update */
157
197k
    (void)ps_ed_blk_l1;
158
    /* Update CTB mode map for the finalised CU */
159
197k
    x = ((ps_cu_node->u2_x0 << 3) >> 2) + 1;
160
197k
    y = ((ps_cu_node->u2_y0 << 3) >> 2) + 1;
161
197k
    size = ps_cu_node->u1_cu_size >> 2;
162
789k
    for(row = y; row < (y + size); row++)
163
592k
    {
164
3.01M
        for(col = x; col < (x + size); col++)
165
2.41M
        {
166
2.41M
            ps_ctxt->au1_ctb_mode_map[row][col] = ps_cu_node->best_mode;
167
2.41M
        }
168
592k
    }
169
197k
    return;
170
197k
}
171
172
/*!
173
******************************************************************************
174
* \if Function name : ihevce_intra_populate_mode_bits_cost_bracketing \endif
175
*
176
* \brief
177
*    Mpm indx calc function based on left and top available modes
178
*
179
* \param[in] top_intra_mode : Top available intra mode
180
* \param[in] left_intra_mode : Left available intra mode
181
* \param[in] available_top : Top availability flag
182
* \param[in] available_left : Left availability flag
183
* \param[in] cu_pos_y : cu position wrt to CTB
184
* \param[in] mode_bits_cost : pointer to mode bits buffer
185
* \param[in] lambda : Lambda value (SAD/SATD)
186
* \param[in] cand_mode_list  : pointer to candidate list buffer
187
*
188
* \return
189
*    None
190
*
191
* \author
192
*  Ittiam
193
*
194
*****************************************************************************
195
*/
196
void ihevce_intra_populate_mode_bits_cost_bracketing(
197
    WORD32 top_intra_mode,
198
    WORD32 left_intra_mode,
199
    WORD32 available_top,
200
    WORD32 available_left,
201
    WORD32 cu_pos_y,
202
    UWORD16 *mode_bits_cost,
203
    UWORD16 *mode_bits,
204
    WORD32 lambda,
205
    WORD32 *cand_mode_list)
206
1.58M
{
207
    /* local variables */
208
1.58M
    WORD32 i;
209
1.58M
    WORD32 cand_intra_pred_mode_left, cand_intra_pred_mode_top;
210
211
1.58M
    UWORD16 one_bits_cost =
212
1.58M
        COMPUTE_RATE_COST_CLIP30(4, lambda, (LAMBDA_Q_SHIFT + 1));  //1.5 * lambda
213
1.58M
    UWORD16 two_bits_cost =
214
1.58M
        COMPUTE_RATE_COST_CLIP30(6, lambda, (LAMBDA_Q_SHIFT + 1));  //2.5 * lambda
215
1.58M
    UWORD16 five_bits_cost =
216
1.58M
        COMPUTE_RATE_COST_CLIP30(12, lambda, (LAMBDA_Q_SHIFT + 1));  //5.5 * lambda
217
218
57.0M
    for(i = 0; i < 35; i++)
219
55.4M
    {
220
55.4M
        mode_bits_cost[i] = five_bits_cost;
221
55.4M
        mode_bits[i] = 5;
222
55.4M
    }
223
224
    /* EIID: set availability flag to zero if modes are invalid.
225
       Required since some CU's might be skipped (though available)
226
       and their modes will be set to 255 (-1)*/
227
1.58M
    if(35 < top_intra_mode || 0 > top_intra_mode)
228
0
        available_top = 0;
229
1.58M
    if(35 < left_intra_mode || 0 > left_intra_mode)
230
0
        available_left = 0;
231
232
    /* Calculate cand_intra_pred_mode_N as per sec. 8.4.2 in JCTVC-J1003_d7 */
233
    /* N = top */
234
1.58M
    if(0 == available_top)
235
90.0k
    {
236
90.0k
        cand_intra_pred_mode_top = INTRA_DC;
237
90.0k
    }
238
    /* for neighbour != INTRA, setting DC is done outside */
239
1.49M
    else if(0 == cu_pos_y) /* It's on the CTB boundary */
240
213k
    {
241
213k
        cand_intra_pred_mode_top = INTRA_DC;
242
213k
    }
243
1.28M
    else
244
1.28M
    {
245
1.28M
        cand_intra_pred_mode_top = top_intra_mode;
246
1.28M
    }
247
248
    /* N = left */
249
1.58M
    if(0 == available_left)
250
95.2k
    {
251
95.2k
        cand_intra_pred_mode_left = INTRA_DC;
252
        //cand_intra_pred_mode_left = cand_intra_pred_mode_top;
253
95.2k
    }
254
    /* for neighbour != INTRA, setting DC is done outside */
255
1.48M
    else
256
1.48M
    {
257
1.48M
        cand_intra_pred_mode_left = left_intra_mode;
258
1.48M
    }
259
260
    /* Calculate cand_mode_list as per sec. 8.4.2 in JCTVC-J1003_d7 */
261
1.58M
    if(cand_intra_pred_mode_left == cand_intra_pred_mode_top)
262
481k
    {
263
481k
        if(cand_intra_pred_mode_left < 2)
264
269k
        {
265
269k
            cand_mode_list[0] = INTRA_PLANAR;
266
269k
            cand_mode_list[1] = INTRA_DC;
267
269k
            cand_mode_list[2] = INTRA_ANGULAR(26); /* angular 26 = Vertical */
268
269k
        }
269
211k
        else
270
211k
        {
271
211k
            cand_mode_list[0] = cand_intra_pred_mode_left;
272
211k
            cand_mode_list[1] = 2 + ((cand_intra_pred_mode_left + 29) % 32);
273
211k
            cand_mode_list[2] = 2 + ((cand_intra_pred_mode_left - 2 + 1) % 32);
274
211k
        }
275
481k
    }
276
1.10M
    else
277
1.10M
    {
278
1.10M
        if(0 == available_left)
279
61.0k
        {
280
61.0k
            cand_mode_list[0] = cand_intra_pred_mode_top;
281
61.0k
            cand_mode_list[1] = cand_intra_pred_mode_left;
282
61.0k
        }
283
1.04M
        else
284
1.04M
        {
285
1.04M
            cand_mode_list[0] = cand_intra_pred_mode_left;
286
1.04M
            cand_mode_list[1] = cand_intra_pred_mode_top;
287
1.04M
        }
288
1.10M
        if((cand_intra_pred_mode_left != INTRA_PLANAR) &&
289
903k
           (cand_intra_pred_mode_top != INTRA_PLANAR))
290
762k
        {
291
762k
            cand_mode_list[2] = INTRA_PLANAR;
292
762k
        }
293
341k
        else if((cand_intra_pred_mode_left != INTRA_DC) && (cand_intra_pred_mode_top != INTRA_DC))
294
178k
        {
295
178k
            cand_mode_list[2] = INTRA_DC;
296
178k
        }
297
162k
        else
298
162k
        {
299
162k
            cand_mode_list[2] = INTRA_ANGULAR(26);
300
162k
        }
301
1.10M
    }
302
1.58M
    mode_bits_cost[cand_mode_list[0]] = one_bits_cost;
303
1.58M
    mode_bits_cost[cand_mode_list[1]] = two_bits_cost;
304
1.58M
    mode_bits_cost[cand_mode_list[2]] = two_bits_cost;
305
306
1.58M
    mode_bits[cand_mode_list[0]] = 2;
307
1.58M
    mode_bits[cand_mode_list[1]] = 3;
308
1.58M
    mode_bits[cand_mode_list[2]] = 3;
309
1.58M
}
310
311
/*!
312
******************************************************************************
313
* \if Function name : ihevce_pu_calc_4x4_blk \endif
314
*
315
* \brief
316
*    4x4 pu (8x8 CU) mode decision using step 8421 method
317
*
318
* \param[in] ps_cu_node : pointer to cu node info buffer
319
* \param[in] pu1_src : pointer to src pixels
320
* \param[in] src_stride : frm source stride
321
* \param[in] ref : pointer to reference pixels for prediction
322
* \param[in] cand_mode_list  : pointer to candidate list buffer
323
* \param[in] best_costs_4x4  : pointer to 3 best cost buffer
324
* \param[in] best_modes_4x4  : pointer to 3 best mode buffer
325
*
326
* \return
327
*    None
328
*
329
* \author
330
*  Ittiam
331
*
332
*****************************************************************************
333
*/
334
void ihevce_pu_calc_4x4_blk(
335
    ihevce_ipe_ctxt_t *ps_ctxt,
336
    ihevce_ipe_cu_tree_t *ps_cu_node,
337
    UWORD8 *pu1_src,
338
    WORD32 src_stride,
339
    UWORD8 *ref,
340
    UWORD16 *mode_bits_cost,
341
    WORD32 *best_costs_4x4,
342
    UWORD8 *best_modes_4x4,
343
    func_selector_t *ps_func_selector)
344
832k
{
345
832k
    WORD16 *pi2_trans_tmp = ps_ctxt->pi2_trans_tmp;
346
832k
    WORD16 *pi2_trans_out = ps_ctxt->pi2_trans_out;
347
832k
    UWORD8 u1_use_satd = ps_ctxt->u1_use_satd;
348
832k
    UWORD8 u1_level_1_refine_on = ps_ctxt->u1_level_1_refine_on;
349
350
832k
    WORD32 i, j = 0, i_end;
351
832k
    UWORD8 mode, best_amode = 255;
352
832k
    UWORD8 pred[16];
353
354
832k
    UWORD16 sad;
355
832k
    WORD32 sad_cost = 0;
356
832k
    WORD32 best_asad_cost = 0xFFFFF;
357
832k
    WORD32 temp;
358
832k
    UWORD8 modes_to_eval[5];
359
832k
    WORD32 costs_4x4[5];
360
832k
    UWORD8 modes_4x4[5] = { 0, 1, 2, 3, 4 };
361
362
    /* LO resolution hence low resolution disable */
363
832k
    WORD32 u1_low_resol = 0;
364
832k
    UWORD8 au1_best_modes[1] = { 0 };
365
832k
    WORD32 ai4_best_sad_costs[1] = { 0 };
366
367
832k
    WORD16 *pi2_tmp = &pi2_trans_tmp[0];
368
369
832k
    ihevce_ipe_optimised_function_list_t *ps_ipe_optimised_function_list =
370
832k
        &ps_ctxt->s_ipe_optimised_function_list;
371
372
    //apf_resd_trns[0] = &ihevc_resi_trans_4x4_ttype1;
373
    //apf_resd_trns[0] = &ihevc_HAD_4x4_8bit;
374
375
4.99M
    for(i = 0; i < 5; i++)
376
4.16M
    {
377
4.16M
        costs_4x4[i] = MAX_INTRA_COST_IPE;
378
4.16M
    }
379
380
832k
    ps_ipe_optimised_function_list->pf_ed_4x4_find_best_modes(
381
832k
        pu1_src,
382
832k
        src_stride,
383
832k
        ref,
384
832k
        mode_bits_cost,
385
832k
        au1_best_modes,
386
832k
        ai4_best_sad_costs,
387
832k
        u1_low_resol,
388
832k
        ps_ipe_optimised_function_list->pf_4x4_sad_computer);
389
390
832k
    best_amode = au1_best_modes[0];
391
832k
    best_asad_cost = ai4_best_sad_costs[0];
392
393
832k
    ASSERT(best_amode != 255);
394
    /* Around best level 4 angular mode, search for best level 2 mode */
395
832k
    modes_to_eval[0] = best_amode - 2;
396
832k
    modes_to_eval[1] = best_amode + 2;
397
832k
    i = 0;
398
832k
    i_end = 2;
399
832k
    if(best_amode == 2)
400
68.1k
        i = 1;
401
764k
    else if(best_amode == 34)
402
30.6k
        i_end = 1;
403
2.39M
    for(; i < i_end; i++)
404
1.56M
    {
405
1.56M
        mode = modes_to_eval[i];
406
407
1.56M
        g_apf_lum_ip[g_i4_ip_funcs[mode]](&ref[0], 0, &pred[0], 4, 4, mode);
408
409
1.56M
        sad = ps_ipe_optimised_function_list->pf_4x4_sad_computer(pu1_src, &pred[0], src_stride, 4);
410
411
1.56M
        sad_cost = sad;
412
1.56M
        sad_cost += mode_bits_cost[mode];
413
414
1.56M
        if(sad_cost < best_asad_cost)
415
128k
        {
416
128k
            best_amode = mode;
417
128k
            best_asad_cost = sad_cost;
418
128k
        }
419
1.56M
    }
420
421
    /* Around best level 2 angular mode, search for best level 1 mode */
422
    /* Also evaluate for non-angular mode */
423
424
832k
    i = 0;
425
    /*Level 1 refinement is disabled for ES preset */
426
832k
    if(1 == u1_level_1_refine_on)
427
832k
    {
428
832k
        if(best_amode != 2)
429
770k
            modes_to_eval[i++] = best_amode - 1;
430
832k
        modes_to_eval[i++] = best_amode;
431
832k
    }
432
433
832k
    modes_to_eval[i++] = 0;
434
832k
    modes_to_eval[i++] = 1;
435
436
832k
    if(1 == u1_level_1_refine_on)
437
832k
    {
438
832k
        if(best_amode != 34)
439
805k
            modes_to_eval[i++] = best_amode + 1;
440
832k
    }
441
832k
    i_end = i;
442
832k
    i = 0;
443
444
4.90M
    for(; i < i_end; i++)
445
4.07M
    {
446
4.07M
        mode = modes_to_eval[i];
447
448
4.07M
        g_apf_lum_ip[g_i4_ip_funcs[mode]](&ref[0], 0, &pred[0], 4, 4, mode);
449
450
        /* Hard coding to use SATD */
451
4.07M
        if(u1_use_satd)
452
3.03M
        {
453
3.03M
            ps_func_selector->ihevc_resi_trans_4x4_ttype1_fptr(
454
3.03M
                pu1_src, &pred[0], (WORD32 *)pi2_tmp, pi2_trans_out, src_stride, 4, 4, NULL_PLANE);
455
456
3.03M
            sad = ihevce_ipe_pass_satd(pi2_trans_out, 4, 4);
457
3.03M
        }
458
1.04M
        else
459
1.04M
        {
460
1.04M
            sad = ps_ipe_optimised_function_list->pf_4x4_sad_computer(
461
1.04M
                pu1_src, &pred[0], src_stride, 4);
462
1.04M
        }
463
4.07M
        sad_cost = sad;
464
4.07M
        sad_cost += mode_bits_cost[mode];
465
466
4.07M
        costs_4x4[i] = sad_cost;
467
4.07M
    }
468
469
    /* Arrange the reference array in ascending order */
470
4.07M
    for(i = 0; i < (i_end - 1); i++)
471
3.23M
    {
472
11.2M
        for(j = i + 1; j < i_end; j++)
473
7.96M
        {
474
7.96M
            if(costs_4x4[i] > costs_4x4[j])
475
3.00M
            {
476
3.00M
                temp = costs_4x4[i];
477
3.00M
                costs_4x4[i] = costs_4x4[j];
478
3.00M
                costs_4x4[j] = temp;
479
480
3.00M
                temp = modes_4x4[i];
481
3.00M
                modes_4x4[i] = modes_4x4[j];
482
3.00M
                modes_4x4[j] = temp;
483
3.00M
            }
484
7.96M
        }
485
3.23M
    }
486
3.32M
    for(i = 0; i < 3; i++)
487
2.49M
    {
488
2.49M
        best_costs_4x4[i] = costs_4x4[i];
489
2.49M
        best_modes_4x4[i] = modes_to_eval[modes_4x4[i]];
490
2.49M
    }
491
492
832k
    {
493
832k
        ps_cu_node->best_mode = best_modes_4x4[0];
494
832k
        ps_cu_node->best_cost = best_costs_4x4[0];
495
832k
        ps_cu_node->best_satd = best_costs_4x4[0] - mode_bits_cost[ps_cu_node->best_mode];
496
832k
    }
497
832k
}
498
499
/*!
500
******************************************************************************
501
* \if Function name : ihevce_pu_calc_8x8_blk \endif
502
*
503
* \brief
504
*    4x4 pu (8x8 CU) mode decision loop using step 8421 method
505
*
506
* \param[in] ps_curr_src : pointer to src pixels struct
507
* \param[in] ps_ctxt : pointer to IPE context struct
508
* \param[in] ps_cu_node : pointer to cu node info buffer
509
*
510
* \return
511
*    None
512
*
513
* \author
514
*  Ittiam
515
*
516
*****************************************************************************
517
*/
518
void ihevce_pu_calc_8x8_blk(
519
    iv_enc_yuv_buf_t *ps_curr_src,
520
    ihevce_ipe_ctxt_t *ps_ctxt,
521
    ihevce_ipe_cu_tree_t *ps_cu_node,
522
    func_selector_t *ps_func_selector)
523
208k
{
524
208k
    WORD32 i, j;
525
208k
    WORD32 nbr_flags;
526
208k
    nbr_avail_flags_t s_nbr;
527
208k
    WORD32 trans_size = ps_cu_node->ps_parent->u1_cu_size >> 1;
528
529
208k
    UWORD8 *pu1_src_4x4;
530
208k
    WORD32 xA, xB, yA, yB;
531
    //WORD32 x, y, size;
532
208k
    WORD32 top_intra_mode;
533
208k
    WORD32 left_intra_mode;
534
    //    WORD8 *top_intra_mode_ptr;
535
    //  WORD8 *left_intra_mode_ptr;
536
208k
    UWORD8 *pu1_orig;
537
208k
    WORD32 src_strd = ps_curr_src->i4_y_strd;
538
539
208k
    WORD32 cu_pos_x = ps_cu_node->ps_parent->u2_x0 << 1;
540
208k
    WORD32 cu_pos_y = ps_cu_node->ps_parent->u2_y0 << 1;
541
208k
    ihevc_intra_pred_luma_ref_substitution_ft *ihevc_intra_pred_luma_ref_substitution_fptr;
542
543
208k
    ihevc_intra_pred_luma_ref_substitution_fptr =
544
208k
        ps_ctxt->ps_func_selector->ihevc_intra_pred_luma_ref_substitution_fptr;
545
546
208k
    pu1_orig = (UWORD8 *)(ps_curr_src->pv_y_buf) +
547
208k
               ((ps_cu_node->ps_parent->u2_y0 << 3) * src_strd) +
548
208k
               (ps_cu_node->ps_parent->u2_x0 << 3);
549
624k
    for(i = 0; i < 2; i++)
550
416k
    {
551
1.24M
        for(j = 0; j < 2; j++)
552
832k
        {
553
832k
            WORD32 cand_mode_list[3];
554
832k
            pu1_src_4x4 = pu1_orig + (i * trans_size * src_strd) + (j * trans_size);
555
            /* get the neighbour availability flags */
556
832k
            nbr_flags = ihevce_get_nbr_intra(
557
832k
                &s_nbr,
558
832k
                ps_ctxt->pu1_ctb_nbr_map,
559
832k
                ps_ctxt->i4_nbr_map_strd,
560
832k
                cu_pos_x + ((j) * (trans_size >> 2)),
561
832k
                cu_pos_y + ((i) * (trans_size >> 2)),
562
832k
                trans_size >> 2);
563
564
            /* call the function which populates sad cost for all the modes */
565
832k
            xA = ((ps_cu_node->ps_parent->u2_x0 << 3) >> 2) + j;
566
832k
            yA = ((ps_cu_node->ps_parent->u2_y0 << 3) >> 2) + 1 + i;
567
832k
            xB = xA + 1;
568
832k
            yB = yA - 1;
569
832k
            left_intra_mode = ps_ctxt->au1_ctb_mode_map[yA][xA];
570
832k
            top_intra_mode = ps_ctxt->au1_ctb_mode_map[yB][xB];
571
572
832k
            ihevce_intra_populate_mode_bits_cost_bracketing(
573
832k
                top_intra_mode,
574
832k
                left_intra_mode,
575
832k
                s_nbr.u1_top_avail,
576
832k
                s_nbr.u1_left_avail,
577
832k
                ps_cu_node->ps_parent->u2_y0,
578
832k
                &ps_ctxt->au2_mode_bits_cost_8x8pu[i * 2 + j][0],
579
832k
                &ps_ctxt->au2_mode_bits_8x8_pu[0],
580
832k
                ps_ctxt->i4_ol_sad_lambda,
581
832k
                cand_mode_list);
582
583
            /* call the function which populates ref data for intra predicion */
584
832k
            ihevc_intra_pred_luma_ref_substitution_fptr(
585
832k
                pu1_src_4x4 - src_strd - 1,
586
832k
                pu1_src_4x4 - src_strd,
587
832k
                pu1_src_4x4 - 1,
588
832k
                src_strd,
589
832k
                4,
590
832k
                nbr_flags,
591
832k
                &ps_ctxt->au1_ref_8x8pu[i * 2 + j][0],
592
832k
                0);
593
594
832k
            ihevce_pu_calc_4x4_blk(
595
832k
                ps_ctxt,
596
832k
                ps_cu_node->ps_sub_cu[(i * 2) + j],
597
832k
                pu1_src_4x4,
598
832k
                src_strd,
599
832k
                &ps_ctxt->au1_ref_8x8pu[i * 2 + j][0],
600
832k
                &ps_ctxt->au2_mode_bits_cost_8x8pu[i * 2 + j][0],
601
832k
                &ps_cu_node->ps_sub_cu[(i * 2) + j]->au4_best_cost_1tu[0],
602
832k
                &ps_cu_node->ps_sub_cu[(i * 2) + j]->au1_best_mode_1tu[0],
603
832k
                ps_func_selector);
604
605
            /*&au4_cost_4x4[i*2 + j][0],
606
                &au1_modes_4x4[i*2 + j][0]);*/ //TTODO : mode will change for the four partition
607
608
832k
            ihevce_set_nbr_map(
609
832k
                ps_ctxt->pu1_ctb_nbr_map,
610
832k
                ps_ctxt->i4_nbr_map_strd,
611
832k
                cu_pos_x + ((j) * (trans_size >> 2)),
612
832k
                cu_pos_y + ((i) * (trans_size >> 2)),
613
832k
                (trans_size >> 2),
614
832k
                1);
615
616
832k
            xA = ((ps_cu_node->ps_parent->u2_x0 << 3) >> 2) + 1 + j;
617
832k
            yA = ((ps_cu_node->ps_parent->u2_y0 << 3) >> 2) + 1 + i;
618
832k
            ps_ctxt->au1_ctb_mode_map[yA][xA] = ps_cu_node->ps_sub_cu[i * 2 + j]->best_mode;
619
832k
            ps_cu_node->ps_sub_cu[i * 2 + j]->u2_mode_bits_cost =
620
832k
                ps_ctxt->au2_mode_bits_8x8_pu[ps_cu_node->ps_sub_cu[i * 2 + j]->best_mode];
621
832k
        }
622
416k
    }
623
208k
}
624
625
/*!
626
******************************************************************************
627
* \if Function name : ihevce_bracketing_analysis \endif
628
*
629
* \brief
630
*    Interface function that evaluates MAX cu and MAX - 1 cu, with MAX cu size
631
*    info decided coarse resolution mode decision. Compares the SATD/SAD cost btwn
632
*    2 CUS and determines the actual CU size and best 3 modes to be given to rdopt
633
*
634
* \param[in] ps_ctxt : pointer to IPE context struct
635
* \param[in] ps_cu_node : pointer to cu node info buffer
636
* \param[in] ps_curr_src : pointer to src pixels struct
637
* \param[in] ps_ctb_out : pointer to ip ctb out struct
638
* \param[in] ps_row_cu : pointer to cu analyse struct
639
* \param[in] ps_ed_l1_ctb : pointer to level 1 early deci struct
640
* \param[in] ps_ed_l2_ctb : pointer to level 2 early deci struct
641
* \param[in] ps_l0_ipe_out_ctb : pointer to ipe_l0_ctb_analyse_for_me_t struct
642
*
643
* \return
644
*    None
645
*
646
* \author
647
*  Ittiam
648
*
649
*****************************************************************************
650
*/
651
void ihevce_bracketing_analysis(
652
    ihevce_ipe_ctxt_t *ps_ctxt,
653
    ihevce_ipe_cu_tree_t *ps_cu_node,
654
    iv_enc_yuv_buf_t *ps_curr_src,
655
    ctb_analyse_t *ps_ctb_out,
656
    //cu_analyse_t         *ps_row_cu,
657
    ihevce_ed_blk_t *ps_ed_l1_ctb,
658
    ihevce_ed_blk_t *ps_ed_l2_ctb,
659
    ihevce_ed_ctb_l1_t *ps_ed_ctb_l1,
660
    ipe_l0_ctb_analyse_for_me_t *ps_l0_ipe_out_ctb)
661
14.9k
{
662
14.9k
    WORD32 cu_pos_x = 0;
663
14.9k
    WORD32 cu_pos_y = 0;
664
665
14.9k
    UWORD8 u1_curr_ctb_wdt = ps_cu_node->u1_width;
666
14.9k
    UWORD8 u1_curr_ctb_hgt = ps_cu_node->u1_height;
667
14.9k
    WORD32 num_8x8_blks_x = (u1_curr_ctb_wdt >> 3);
668
14.9k
    WORD32 num_8x8_blks_y = (u1_curr_ctb_hgt >> 3);
669
670
14.9k
    ihevce_ed_blk_t *ps_ed_blk_l1 = ps_ed_l1_ctb;
671
14.9k
    ihevce_ed_blk_t *ps_ed_blk_l2 = ps_ed_l2_ctb;
672
673
14.9k
    WORD32 i;
674
14.9k
    WORD32 cand_mode_list[3];
675
    //cu_analyse_t *ps_curr_cu = ps_row_cu;
676
14.9k
    WORD32 blk_cnt = 0;
677
14.9k
    WORD32 j = 0;
678
14.9k
    WORD32 merge_32x32_l1, merge_32x32_l2;
679
680
14.9k
    WORD32 i4_skip_intra_eval_32x32_l1;
681
    //EIID: flag indicating number of 16x16 blocks to be skipped for intra evaluation within 32x32 block
682
683
14.9k
    WORD32 parent_cost = 0;
684
14.9k
    WORD32 child_cost[4] = { 0 };
685
14.9k
    WORD32 child_cost_least = 0;
686
14.9k
    WORD32 child_satd[4] = { 0 };
687
14.9k
    WORD32 x, y, size;
688
14.9k
    WORD32 merge_64x64 = 1;
689
14.9k
    UWORD8 au1_best_32x32_modes[4];
690
14.9k
    WORD32 au4_best_32x32_cost[4];
691
14.9k
    WORD32 parent_best_mode;
692
14.9k
    UWORD8 best_mode;
693
694
14.9k
    WORD32 i4_quality_preset = ps_ctxt->i4_quality_preset;
695
    /* flag to control 1CU-4TU modes based on quality preset                */
696
    /* if set 1CU-4TU are explicity evaluated else 1CU-1TU modes are copied */
697
14.9k
    WORD32 i4_enable_1cu_4tu = (i4_quality_preset == IHEVCE_QUALITY_P2) ||
698
13.7k
                               (i4_quality_preset == IHEVCE_QUALITY_P0);
699
700
    /* flag to control 4CU-16TU mode based on quality preset                */
701
    /* if set 4CU-16TU are explicity evaluated else 4CU-4TU modes are copied*/
702
14.9k
    WORD32 i4_enable_4cu_16tu = (i4_quality_preset == IHEVCE_QUALITY_P2) ||
703
13.7k
                                (i4_quality_preset == IHEVCE_QUALITY_P0);
704
705
14.9k
    WORD32 i4_mod_factor_num, i4_mod_factor_den = QP_MOD_FACTOR_DEN;  //2;
706
14.9k
    float f_strength;
707
    /* Accumalte satd */
708
14.9k
    LWORD64 i8_frame_acc_satd_cost = 0, i8_frame_acc_satd_by_modqp_q10 = 0;
709
14.9k
    WORD32 i4_ctb_acc_satd = 0;
710
711
    /* Accumalate Mode bits cost */
712
14.9k
    LWORD64 i8_frame_acc_mode_bits_cost = 0;
713
714
    /* Step2 is bypassed for parent, uses children modes*/
715
14.9k
    WORD32 step2_bypass = 1;
716
717
14.9k
    if(1 == ps_ctxt->u1_disable_child_cu_decide)
718
0
        step2_bypass = 0;
719
720
14.9k
    ps_cu_node->ps_parent = ps_ctxt->ps_ipe_cu_tree;
721
74.8k
    for(i = 0; i < 4; i++)
722
59.9k
    {
723
59.9k
        ps_cu_node->ps_sub_cu[i] = ps_ctxt->ps_ipe_cu_tree + 1 + i;
724
59.9k
    }
725
726
    /* Loop for all 8x8 block in a CTB */
727
14.9k
    ps_ctb_out->u4_cu_split_flags = 0x1;
728
729
    /* Initialize intra 64x64, 32x32 and 16x16 costs to max value */
730
74.8k
    for(i = 0; i < (MAX_CU_IN_CTB >> 4); i++)
731
59.9k
    {
732
59.9k
        ps_l0_ipe_out_ctb->ai4_best32x32_intra_cost[i] = MAX_INTRA_COST_IPE;
733
59.9k
    }
734
735
254k
    for(i = 0; i < (MAX_CU_IN_CTB >> 2); i++)
736
239k
    {
737
239k
        ps_l0_ipe_out_ctb->ai4_best16x16_intra_cost[i] = MAX_INTRA_COST_IPE;
738
239k
    }
739
740
973k
    for(i = 0; i < (MAX_CU_IN_CTB); i++)
741
958k
    {
742
958k
        ps_l0_ipe_out_ctb->ai4_best8x8_intra_cost[i] = MAX_INTRA_COST_IPE;
743
958k
    }
744
745
14.9k
    ps_l0_ipe_out_ctb->i4_best64x64_intra_cost = MAX_INTRA_COST_IPE;
746
747
    /* by default 64x64 modes are set to default values DC and Planar */
748
14.9k
    ps_l0_ipe_out_ctb->au1_best_modes_32x32_tu[0] = 0;
749
14.9k
    ps_l0_ipe_out_ctb->au1_best_modes_32x32_tu[1] = 1;
750
14.9k
    ps_l0_ipe_out_ctb->au1_best_modes_32x32_tu[2] = 255;
751
752
    /* by default 64x4 split is set to 1 */
753
14.9k
    ps_l0_ipe_out_ctb->u1_split_flag = 1;
754
755
    /* Modulation factor calculated based on spatial variance instead of hardcoded val*/
756
14.9k
    i4_mod_factor_num = ps_ctxt->ai4_mod_factor_derived_by_variance[1];  //16;
757
758
14.9k
    f_strength = ps_ctxt->f_strength;
759
760
    /* ------------------------------------------------ */
761
    /* populate the early decisions done by L1 analysis */
762
    /* ------------------------------------------------ */
763
254k
    for(i = 0; i < (MAX_CU_IN_CTB >> 2); i++)
764
239k
    {
765
239k
        ps_l0_ipe_out_ctb->ai4_best_sad_8x8_l1_ipe[i] = ps_ed_ctb_l1->i4_best_sad_8x8_l1_ipe[i];
766
239k
        ps_l0_ipe_out_ctb->ai4_best_sad_cost_8x8_l1_ipe[i] = ps_ed_ctb_l1->i4_best_sad_cost_8x8_l1_ipe[i];
767
239k
        ps_l0_ipe_out_ctb->ai4_best_sad_8x8_l1_me[i] = ps_ed_ctb_l1->i4_best_sad_8x8_l1_me[i];
768
239k
        ps_l0_ipe_out_ctb->ai4_best_sad_cost_8x8_l1_me[i] = ps_ed_ctb_l1->i4_best_sad_cost_8x8_l1_me[i];
769
239k
    }
770
771
    /* Init CTB level accumalated SATD and MPM bits */
772
14.9k
    ps_l0_ipe_out_ctb->i4_ctb_acc_satd = 0;
773
14.9k
    ps_l0_ipe_out_ctb->i4_ctb_acc_mpm_bits = 0;
774
775
    /* ------------------------------------------------ */
776
    /* Loop over all the blocks in current CTB          */
777
    /* ------------------------------------------------ */
778
14.9k
    {
779
        /* 64 8x8 blocks should be encountered for the do,while loop to exit */
780
14.9k
        do
781
319k
        {
782
319k
            intra32_analyse_t *ps_intra32_analyse;
783
319k
            intra16_analyse_t *ps_intra16_analyse;
784
319k
            WORD32 *pi4_intra_32_cost;
785
319k
            WORD32 *pi4_intra_16_cost;
786
319k
            WORD32 *pi4_intra_8_cost;
787
319k
            WORD32 merge_16x16_l1;
788
789
            /* Given the blk_cnt, get the CU's top-left 8x8 block's x and y positions within the CTB */
790
319k
            cu_pos_x = gau1_cu_pos_x[blk_cnt];
791
319k
            cu_pos_y = gau1_cu_pos_y[blk_cnt];
792
793
            /* default value for 32x32 best mode - blk_cnt increases by 16 for each 32x32 */
794
319k
            au1_best_32x32_modes[blk_cnt >> 4] = 255;
795
796
            /* get the corresponding intra 32 analyse pointer  use (blk_cnt / 16) */
797
            /* blk cnt is in terms of 8x8 units so a 32x32 will have 16 8x8 units */
798
319k
            ps_intra32_analyse = &ps_l0_ipe_out_ctb->as_intra32_analyse[blk_cnt >> 4];
799
800
            /* get the corresponding intra 16 analyse pointer use (blk_cnt & 0xF / 4)*/
801
            /* blk cnt is in terms of 8x8 units so a 16x16 will have 4 8x8 units */
802
319k
            ps_intra16_analyse = &ps_intra32_analyse->as_intra16_analyse[(blk_cnt & 0xF) >> 2];
803
804
            /* Line below assumes min_cu_size of 8 - checks whether CU starts are within picture */
805
319k
            if((cu_pos_x < num_8x8_blks_x) && (cu_pos_y < num_8x8_blks_y))
806
127k
            {
807
                /* Reset to zero for every cu decision */
808
127k
                merge_32x32_l1 = 0;
809
810
127k
                child_cost_least = 0;
811
812
                /* At L2, each 4x4 corresponds to 16x16 at L0. Every 4 16x16 stores a merge_success flag */
813
127k
                ps_ed_blk_l2 = ps_ed_l2_ctb + (blk_cnt >> 2);
814
815
127k
                pi4_intra_32_cost = &ps_l0_ipe_out_ctb->ai4_best32x32_intra_cost[blk_cnt >> 4];
816
817
                /* by default 32x32 modes are set to default values DC and Planar */
818
127k
                ps_intra32_analyse->au1_best_modes_32x32_tu[0] = 0;
819
127k
                ps_intra32_analyse->au1_best_modes_32x32_tu[1] = 1;
820
127k
                ps_intra32_analyse->au1_best_modes_32x32_tu[2] = 255;
821
822
                /* By default 32x32 split is set to 1 */
823
127k
                ps_intra32_analyse->b1_split_flag = 1;
824
825
127k
                ps_intra32_analyse->au1_best_modes_16x16_tu[0] = 0;
826
127k
                ps_intra32_analyse->au1_best_modes_16x16_tu[1] = 1;
827
127k
                ps_intra32_analyse->au1_best_modes_16x16_tu[2] = 255;
828
829
                /* 16x16 cost & 8x8 cost are stored in Raster scan order */
830
                /* stride of 16x16 buffer is MAX_CU_IN_CTB_ROW >> 1      */
831
                /* stride of 8x8 buffer is MAX_CU_IN_CTB_ROW             */
832
127k
                {
833
127k
                    WORD32 pos_x_8x8, pos_y_8x8;
834
835
127k
                    pos_x_8x8 = gau1_cu_pos_x[blk_cnt];
836
127k
                    pos_y_8x8 = gau1_cu_pos_y[blk_cnt];
837
838
127k
                    pi4_intra_16_cost = &ps_l0_ipe_out_ctb->ai4_best16x16_intra_cost[0];
839
840
127k
                    pi4_intra_16_cost +=
841
127k
                        ((pos_x_8x8 >> 1) + ((pos_y_8x8 >> 1) * (MAX_CU_IN_CTB_ROW >> 1)));
842
843
127k
                    pi4_intra_8_cost = &ps_l0_ipe_out_ctb->ai4_best8x8_intra_cost[0];
844
845
127k
                    pi4_intra_8_cost += (pos_x_8x8 + (pos_y_8x8 * MAX_CU_IN_CTB_ROW));
846
127k
                }
847
848
127k
                merge_32x32_l1 = 0;
849
127k
                merge_32x32_l2 = 0;
850
127k
                i4_skip_intra_eval_32x32_l1 = 0;
851
852
                /* Enable 16x16 merge iff sufficient 8x8 blocks remain in the current CTB */
853
127k
                merge_16x16_l1 = 0;
854
127k
                if(((num_8x8_blks_x - cu_pos_x) >= 2) && ((num_8x8_blks_y - cu_pos_y) >= 2))
855
116k
                {
856
116k
#if !ENABLE_UNIFORM_CU_SIZE_8x8
857
116k
                    merge_16x16_l1 = ps_ed_blk_l1->merge_success;
858
#else
859
                    merge_16x16_l1 = 0;
860
#endif
861
116k
                }
862
863
                /* Enable 32x32 merge iff sufficient 8x8 blocks remain in the current CTB */
864
127k
                if(((num_8x8_blks_x - cu_pos_x) >= 4) && ((num_8x8_blks_y - cu_pos_y) >= 4))
865
75.9k
                {
866
                    /* Check 4 flags of L1(8x8) say merge */
867
379k
                    for(i = 0; i < 4; i++)
868
303k
                    {
869
303k
                        merge_32x32_l1 += (ps_ed_blk_l1 + (i * 4))->merge_success;
870
871
                        //EIDD: num 16x16 blocks for which inter_intra flag says eval only inter, i.e. skip intra eval
872
303k
                        i4_skip_intra_eval_32x32_l1 +=
873
303k
                            ((ps_ed_blk_l1 + (i * 4))->intra_or_inter == 2) ? 1 : 0;
874
303k
                    }
875
876
75.9k
#if !ENABLE_UNIFORM_CU_SIZE_8x8
877
                    /* Check 1 flag from L2(16x16) say merge */
878
75.9k
                    merge_32x32_l2 = ps_ed_blk_l2->merge_success;
879
#else
880
                    merge_32x32_l1 = 0;
881
                    merge_32x32_l2 = 0;
882
#endif
883
75.9k
                }
884
885
127k
#if DISABLE_L2_IPE_IN_PB_L1_IN_B
886
127k
                if((i4_quality_preset == IHEVCE_QUALITY_P6) && (ps_ctxt->i4_slice_type != ISLICE))
887
4.17k
                {
888
4.17k
                    merge_32x32_l2 = 0;
889
4.17k
                    ps_ed_blk_l2->merge_success = 0;
890
4.17k
                }
891
127k
#endif
892
893
127k
                ps_intra32_analyse->b1_valid_cu = 1;
894
895
                /* If Merge success from all 4 L1 and L2, max CU size 32x32 is chosen */
896
                /* EIID: if all blocks to be skipped then skip entire 32x32 for intra eval,
897
                if no blocks to be skipped then eval entire 32x32,
898
                else break the merge and go to 16x16 level eval */
899
127k
                if((merge_32x32_l1 == 4) && merge_32x32_l2 &&
900
21.7k
                   ((i4_skip_intra_eval_32x32_l1 == 0) ||
901
1.12k
                    (i4_skip_intra_eval_32x32_l1 == 4))  //comment this line to disable break-merge
902
127k
                )
903
21.3k
                {
904
#if IP_DBG_L1_l2
905
                    /* Populate params for 32x32 block analysis */
906
                    ps_cu_node->ps_parent->best_cost = MAX_INTRA_COST_IPE;
907
908
                    ps_cu_node->ps_parent->u1_cu_size = 32;
909
                    ps_cu_node->ps_parent->u2_x0 = gau1_cu_pos_x[blk_cnt]; /* Populate properly */
910
                    ps_cu_node->ps_parent->u2_y0 = gau1_cu_pos_y[blk_cnt]; /* Populate properly */
911
                    ps_cu_node->ps_parent->best_mode = ps_ed_blk_l2->best_merge_mode;
912
                    /* CU size 32x32 and fill the final cu params */
913
914
                    ihevce_update_cand_list(ps_cu_node->ps_parent, ps_ed_blk_l1, ps_ctxt);
915
916
                    /* Increment pointers */
917
                    ps_ed_blk_l1 += 16;
918
                    blk_cnt += 16;
919
                    ps_row_cu++;
920
                    merge_64x64 &= 1;
921
#else
922
923
                    /* EIID: dont evaluate if all 4 blocks at L1 said inter is winning*/
924
21.3k
                    if(4 == i4_skip_intra_eval_32x32_l1 && (ps_ctxt->i4_slice_type != ISLICE))
925
659
                    {
926
659
                        WORD32 i4_local_ctr1, i4_local_ctr2;
927
928
659
                        ps_cu_node->ps_parent->best_cost = MAX_INTRA_COST_IPE;
929
930
659
                        ps_cu_node->ps_parent->u1_cu_size = 32;
931
659
                        ps_cu_node->ps_parent->u2_x0 =
932
659
                            gau1_cu_pos_x[blk_cnt]; /* Populate properly */
933
659
                        ps_cu_node->ps_parent->u2_y0 =
934
659
                            gau1_cu_pos_y[blk_cnt]; /* Populate properly */
935
659
                        ps_cu_node->ps_parent->best_mode =
936
659
                            INTRA_DC;  //ps_ed_blk_l2->best_merge_mode;
937
                        /* CU size 32x32 and fill the final cu params */
938
939
                        /* fill in the first modes as invalid */
940
659
                        ps_cu_node->ps_parent->au1_best_mode_1tu[0] = INTRA_DC;
941
659
                        ps_cu_node->ps_parent->au1_best_mode_1tu[1] =
942
659
                            INTRA_DC;  //for safery. Since update_cand_list will set num_modes as 3
943
659
                        ps_cu_node->ps_parent->au1_best_mode_1tu[2] = INTRA_DC;
944
945
659
                        ps_cu_node->ps_parent->au1_best_mode_4tu[0] = INTRA_DC;
946
659
                        ps_cu_node->ps_parent->au1_best_mode_4tu[1] = INTRA_DC;
947
659
                        ps_cu_node->ps_parent->au1_best_mode_4tu[2] = INTRA_DC;
948
949
659
                        ihevce_update_cand_list(ps_cu_node->ps_parent, ps_ed_blk_l1, ps_ctxt);
950
951
                        //ps_row_cu->s_cu_intra_cand.b6_num_intra_cands = 0;
952
                        //ps_row_cu->u1_num_intra_rdopt_cands = 0;
953
954
659
                        ps_intra32_analyse->b1_valid_cu = 0;
955
659
                        ps_intra32_analyse->b1_split_flag = 0;
956
659
                        ps_intra32_analyse->b1_merge_flag = 0;
957
                        /*memset (&ps_intra32_analyse->au1_best_modes_32x32_tu,
958
                        255,
959
                        NUM_BEST_MODES);
960
                        memset (&ps_intra32_analyse->au1_best_modes_16x16_tu,
961
                        255,
962
                        NUM_BEST_MODES);*/
963
                        //set only first mode since if it's 255. it wont go ahead
964
659
                        ps_intra32_analyse->au1_best_modes_32x32_tu[0] = 255;
965
659
                        ps_intra32_analyse->au1_best_modes_16x16_tu[0] = 255;
966
967
659
                        *pi4_intra_32_cost = MAX_INTRA_COST_IPE;
968
969
                        /*since ME will start evaluating from bottom up, set the lower
970
                        cu size data invalid */
971
3.29k
                        for(i4_local_ctr1 = 0; i4_local_ctr1 < 4; i4_local_ctr1++)
972
2.63k
                        {
973
2.63k
                            WORD32 *pi4_intra_8_cost_curr16;
974
975
2.63k
                            ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1]
976
2.63k
                                .au1_best_modes_16x16_tu[0] = 255;
977
2.63k
                            ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1]
978
2.63k
                                .au1_best_modes_8x8_tu[0] = 255;
979
2.63k
                            ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1].b1_merge_flag = 0;
980
2.63k
                            ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1].b1_valid_cu = 0;
981
2.63k
                            ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1].b1_split_flag = 0;
982
983
2.63k
                            pi4_intra_16_cost
984
2.63k
                                [(i4_local_ctr1 & 1) + ((MAX_CU_IN_CTB_ROW >> 1) *
985
2.63k
                                                        (i4_local_ctr1 >> 1))] = MAX_INTRA_COST_IPE;
986
987
2.63k
                            pi4_intra_8_cost_curr16 = pi4_intra_8_cost + ((i4_local_ctr1 & 1) << 1);
988
2.63k
                            pi4_intra_8_cost_curr16 +=
989
2.63k
                                ((i4_local_ctr1 >> 1) << 1) * MAX_CU_IN_CTB_ROW;
990
991
13.1k
                            for(i4_local_ctr2 = 0; i4_local_ctr2 < 4; i4_local_ctr2++)
992
10.5k
                            {
993
10.5k
                                ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1]
994
10.5k
                                    .as_intra8_analyse[i4_local_ctr2]
995
10.5k
                                    .au1_4x4_best_modes[0][0] = 255;
996
10.5k
                                ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1]
997
10.5k
                                    .as_intra8_analyse[i4_local_ctr2]
998
10.5k
                                    .au1_4x4_best_modes[1][0] = 255;
999
10.5k
                                ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1]
1000
10.5k
                                    .as_intra8_analyse[i4_local_ctr2]
1001
10.5k
                                    .au1_4x4_best_modes[2][0] = 255;
1002
10.5k
                                ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1]
1003
10.5k
                                    .as_intra8_analyse[i4_local_ctr2]
1004
10.5k
                                    .au1_4x4_best_modes[3][0] = 255;
1005
10.5k
                                ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1]
1006
10.5k
                                    .as_intra8_analyse[i4_local_ctr2]
1007
10.5k
                                    .au1_best_modes_8x8_tu[0] = 255;
1008
10.5k
                                ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1]
1009
10.5k
                                    .as_intra8_analyse[i4_local_ctr2]
1010
10.5k
                                    .au1_best_modes_4x4_tu[0] = 255;
1011
10.5k
                                ps_intra32_analyse->as_intra16_analyse[i4_local_ctr1]
1012
10.5k
                                    .as_intra8_analyse[i4_local_ctr2]
1013
10.5k
                                    .b1_valid_cu = 0;
1014
1015
10.5k
                                pi4_intra_8_cost_curr16
1016
10.5k
                                    [(i4_local_ctr2 & 1) +
1017
10.5k
                                     (MAX_CU_IN_CTB_ROW * (i4_local_ctr2 >> 1))] =
1018
10.5k
                                        MAX_INTRA_COST_IPE;
1019
10.5k
                            }
1020
2.63k
                        }
1021
1022
                        /* set neighbours even if intra is not evaluated, since source is always available. */
1023
659
                        ihevce_set_nbr_map(
1024
659
                            ps_ctxt->pu1_ctb_nbr_map,
1025
659
                            ps_ctxt->i4_nbr_map_strd,
1026
659
                            ps_cu_node->ps_parent->u2_x0 << 1,
1027
659
                            ps_cu_node->ps_parent->u2_y0 << 1,
1028
659
                            (ps_cu_node->ps_parent->u1_cu_size >> 2),
1029
659
                            1);
1030
1031
                        /* cost accumalation of best cu size candiate */
1032
                        /*i8_frame_acc_satd_cost += parent_cost;*/
1033
1034
                        /* Mode bits cost accumalation for best cu size and cu mode */
1035
                        /*i8_frame_acc_mode_bits_cost += ps_cu_node->ps_parent->u2_mode_bits_cost;*/
1036
1037
                        /*satd/mod_qp accumulation of best cu */
1038
                        /*i8_frame_acc_satd_by_modqp_q10 += ((LWORD64)ps_cu_node->ps_parent->best_satd << (SATD_BY_ACT_Q_FAC + QSCALE_Q_FAC_3))/i4_q_scale_q3_mod;*/
1039
1040
                        /* Increment pointers */
1041
659
                        ps_ed_blk_l1 += 16;
1042
659
                        blk_cnt += 16;
1043
                        //ps_row_cu++;
1044
659
                        merge_64x64 = 0;
1045
1046
                        /* increment for stat purpose only. Increment is valid only on single thread */
1047
659
                        ps_ctxt->u4_num_16x16_skips_at_L0_IPE += 4;
1048
659
                    }
1049
20.6k
                    else
1050
20.6k
                    {
1051
                        /* Revaluation of 4 16x16 blocks at 8x8 prediction level */
1052
                        //memcpy(ps_ctxt->ai1_ctb_mode_map_temp, ps_ctxt->ai1_ctb_mode_map, sizeof(ps_ctxt->ai1_ctb_mode_map));
1053
1054
20.6k
                        if((ps_ctxt->i4_quality_preset == IHEVCE_QUALITY_P6) &&
1055
72
                           (ps_ctxt->i4_slice_type == PSLICE))
1056
0
                        {
1057
0
                            ps_ctxt->u1_disable_child_cu_decide = 1;
1058
0
                            step2_bypass = 0;
1059
0
                        }
1060
1061
                        /* Based on the flag, Child modes decision can be disabled*/
1062
20.6k
                        if(0 == ps_ctxt->u1_disable_child_cu_decide)
1063
20.6k
                        {
1064
103k
                            for(j = 0; j < 4; j++)
1065
82.5k
                            {
1066
82.5k
                                ps_cu_node->ps_sub_cu[j]->u2_x0 =
1067
82.5k
                                    gau1_cu_pos_x[blk_cnt + (j * 4)]; /* Populate properly */
1068
82.5k
                                ps_cu_node->ps_sub_cu[j]->u2_y0 =
1069
82.5k
                                    gau1_cu_pos_y[blk_cnt + (j * 4)]; /* Populate properly */
1070
82.5k
                                ps_cu_node->ps_sub_cu[j]->u1_cu_size = 16;
1071
1072
82.5k
                                {
1073
82.5k
                                    WORD32 best_ang_mode =
1074
82.5k
                                        (ps_ed_blk_l1 + (j * 4))->best_merge_mode;
1075
1076
82.5k
                                    if(best_ang_mode < 2)
1077
73.4k
                                        best_ang_mode = 26;
1078
1079
82.5k
                                    ihevce_mode_eval_filtering(
1080
82.5k
                                        ps_cu_node->ps_sub_cu[j],
1081
82.5k
                                        ps_cu_node,
1082
82.5k
                                        ps_ctxt,
1083
82.5k
                                        ps_curr_src,
1084
82.5k
                                        best_ang_mode,
1085
82.5k
                                        &ps_cu_node->ps_sub_cu[j]->au4_best_cost_1tu[0],
1086
82.5k
                                        &ps_cu_node->ps_sub_cu[j]->au1_best_mode_1tu[0],
1087
82.5k
                                        !step2_bypass,
1088
82.5k
                                        1);
1089
1090
82.5k
                                    if(i4_enable_4cu_16tu)
1091
45.6k
                                    {
1092
45.6k
                                        ihevce_mode_eval_filtering(
1093
45.6k
                                            ps_cu_node->ps_sub_cu[j],
1094
45.6k
                                            ps_cu_node,
1095
45.6k
                                            ps_ctxt,
1096
45.6k
                                            ps_curr_src,
1097
45.6k
                                            best_ang_mode,
1098
45.6k
                                            &ps_cu_node->ps_sub_cu[j]->au4_best_cost_4tu[0],
1099
45.6k
                                            &ps_cu_node->ps_sub_cu[j]->au1_best_mode_4tu[0],
1100
45.6k
                                            !step2_bypass,
1101
45.6k
                                            0);
1102
45.6k
                                    }
1103
36.9k
                                    else
1104
36.9k
                                    {
1105
                                        /* 4TU not evaluated :  4tu modes set same as 1tu modes */
1106
36.9k
                                        memcpy(
1107
36.9k
                                            &ps_cu_node->ps_sub_cu[j]->au1_best_mode_4tu[0],
1108
36.9k
                                            &ps_cu_node->ps_sub_cu[j]->au1_best_mode_1tu[0],
1109
36.9k
                                            NUM_BEST_MODES);
1110
1111
                                        /* 4TU not evaluated : currently 4tu cost set same as 1tu cost */
1112
36.9k
                                        memcpy(
1113
36.9k
                                            &ps_cu_node->ps_sub_cu[j]->au4_best_cost_4tu[0],
1114
36.9k
                                            &ps_cu_node->ps_sub_cu[j]->au4_best_cost_1tu[0],
1115
36.9k
                                            NUM_BEST_MODES * sizeof(WORD32));
1116
36.9k
                                    }
1117
1118
82.5k
                                    child_cost[j] =
1119
82.5k
                                        MIN(ps_cu_node->ps_sub_cu[j]->au4_best_cost_4tu[0],
1120
82.5k
                                            ps_cu_node->ps_sub_cu[j]->au4_best_cost_1tu[0]);
1121
1122
                                    /* Child cost is sum of costs at 16x16 level  */
1123
82.5k
                                    child_cost_least += child_cost[j];
1124
1125
                                    /* Select the best mode to be populated as top and left nbr depending on the
1126
                                    4tu and 1tu cost */
1127
82.5k
                                    if(ps_cu_node->ps_sub_cu[j]->au4_best_cost_4tu[0] >
1128
82.5k
                                       ps_cu_node->ps_sub_cu[j]->au4_best_cost_1tu[0])
1129
2.45k
                                    {
1130
2.45k
                                        ps_cu_node->ps_sub_cu[j]->best_mode =
1131
2.45k
                                            ps_cu_node->ps_sub_cu[j]->au1_best_mode_1tu[0];
1132
2.45k
                                    }
1133
80.1k
                                    else
1134
80.1k
                                    {
1135
80.1k
                                        ps_cu_node->ps_sub_cu[j]->best_mode =
1136
80.1k
                                            ps_cu_node->ps_sub_cu[j]->au1_best_mode_4tu[0];
1137
80.1k
                                    }
1138
1139
82.5k
                                    { /* Update the CTB nodes only for MAX - 1 CU nodes */
1140
82.5k
                                        WORD32 xA, yA, row, col;
1141
82.5k
                                        xA = ((ps_cu_node->ps_sub_cu[j]->u2_x0 << 3) >> 2) + 1;
1142
82.5k
                                        yA = ((ps_cu_node->ps_sub_cu[j]->u2_y0 << 3) >> 2) + 1;
1143
82.5k
                                        size = ps_cu_node->ps_sub_cu[j]->u1_cu_size >> 2;
1144
412k
                                        for(row = yA; row < (yA + size); row++)
1145
330k
                                        {
1146
1.65M
                                            for(col = xA; col < (xA + size); col++)
1147
1.32M
                                            {
1148
1.32M
                                                ps_ctxt->au1_ctb_mode_map[row][col] =
1149
1.32M
                                                    ps_cu_node->ps_sub_cu[j]->best_mode;
1150
1.32M
                                            }
1151
330k
                                        }
1152
82.5k
                                    }
1153
82.5k
                                }
1154
1155
                                /*Child SATD cost*/
1156
82.5k
                                child_satd[j] = ps_cu_node->ps_sub_cu[j]->best_satd;
1157
1158
                                /* store the child 16x16 costs */
1159
82.5k
                                pi4_intra_16_cost[(j & 1) + ((MAX_CU_IN_CTB_ROW >> 1) * (j >> 1))] =
1160
82.5k
                                    child_cost[j];
1161
1162
                                /* set the CU valid flag */
1163
82.5k
                                ps_intra16_analyse[j].b1_valid_cu = 1;
1164
1165
                                /* All 16x16 merge is valid, if Cu 32x32 is chosen */
1166
                                /* To be reset, if CU 64x64 is chosen */
1167
82.5k
                                ps_intra16_analyse[j].b1_merge_flag = 1;
1168
1169
                                /* storing the modes to intra 16 analyse */
1170
                                /* store the best 16x16 modes 8x8 tu */
1171
82.5k
                                memcpy(
1172
82.5k
                                    &ps_intra16_analyse[j].au1_best_modes_8x8_tu[0],
1173
82.5k
                                    &ps_cu_node->ps_sub_cu[j]->au1_best_mode_4tu[0],
1174
82.5k
                                    sizeof(UWORD8) * (NUM_BEST_MODES));
1175
82.5k
                                ps_intra16_analyse[j].au1_best_modes_8x8_tu[NUM_BEST_MODES] = 255;
1176
1177
                                /* store the best 16x16 modes 16x16 tu */
1178
82.5k
                                memcpy(
1179
82.5k
                                    &ps_intra16_analyse[j].au1_best_modes_16x16_tu[0],
1180
82.5k
                                    &ps_cu_node->ps_sub_cu[j]->au1_best_mode_1tu[0],
1181
82.5k
                                    sizeof(UWORD8) * (NUM_BEST_MODES));
1182
82.5k
                                ps_intra16_analyse[j].au1_best_modes_16x16_tu[NUM_BEST_MODES] = 255;
1183
1184
                                /* divide the 16x16 costs (pro rating) to 4 8x8 costs */
1185
                                /* store the same 16x16 modes as 4 8x8 child modes    */
1186
82.5k
                                {
1187
82.5k
                                    WORD32 idx_8x8;
1188
82.5k
                                    WORD32 *pi4_intra_8_cost_curr16;
1189
82.5k
                                    intra8_analyse_t *ps_intra8_analyse;
1190
1191
82.5k
                                    pi4_intra_8_cost_curr16 = pi4_intra_8_cost + ((j & 1) << 1);
1192
82.5k
                                    pi4_intra_8_cost_curr16 += ((j >> 1) << 1) * MAX_CU_IN_CTB_ROW;
1193
1194
412k
                                    for(idx_8x8 = 0; idx_8x8 < 4; idx_8x8++)
1195
330k
                                    {
1196
330k
                                        pi4_intra_8_cost_curr16
1197
330k
                                            [(idx_8x8 & 1) + (MAX_CU_IN_CTB_ROW * (idx_8x8 >> 1))] =
1198
330k
                                                (child_cost[j] + 3) >> 2;
1199
1200
330k
                                        ps_intra8_analyse =
1201
330k
                                            &ps_intra16_analyse[j].as_intra8_analyse[idx_8x8];
1202
1203
330k
                                        ps_intra8_analyse->b1_enable_nxn = 0;
1204
330k
                                        ps_intra8_analyse->b1_valid_cu = 1;
1205
1206
                                        /* store the best 8x8 modes 8x8 tu */
1207
330k
                                        memcpy(
1208
330k
                                            &ps_intra8_analyse->au1_best_modes_8x8_tu[0],
1209
330k
                                            &ps_intra16_analyse[j].au1_best_modes_8x8_tu[0],
1210
330k
                                            sizeof(UWORD8) * (NUM_BEST_MODES + 1));
1211
1212
                                        /* store the best 8x8 modes 4x4 tu */
1213
330k
                                        memcpy(
1214
330k
                                            &ps_intra8_analyse->au1_best_modes_4x4_tu[0],
1215
330k
                                            &ps_intra16_analyse[j].au1_best_modes_8x8_tu[0],
1216
330k
                                            sizeof(UWORD8) * (NUM_BEST_MODES + 1));
1217
1218
                                        /* NXN modes not evaluated hence set to 0 */
1219
330k
                                        memset(
1220
330k
                                            &ps_intra8_analyse->au1_4x4_best_modes[0][0],
1221
330k
                                            255,
1222
330k
                                            sizeof(UWORD8) * 4 * (NUM_BEST_MODES + 1));
1223
330k
                                    }
1224
82.5k
                                }
1225
82.5k
                            }
1226
1227
20.6k
                            ihevce_set_nbr_map(
1228
20.6k
                                ps_ctxt->pu1_ctb_nbr_map,
1229
20.6k
                                ps_ctxt->i4_nbr_map_strd,
1230
20.6k
                                ps_cu_node->ps_sub_cu[0]->u2_x0 << 1,
1231
20.6k
                                ps_cu_node->ps_sub_cu[0]->u2_y0 << 1,
1232
20.6k
                                (ps_cu_node->ps_sub_cu[0]->u1_cu_size >> 1),
1233
20.6k
                                0);
1234
20.6k
                        }
1235
0
#if 1  //DISBLE_CHILD_CU_EVAL_L0_IPE //1
1236
0
                        else
1237
0
                        {
1238
0
                            for(j = 0; j < 4; j++)
1239
0
                            {
1240
0
                                WORD32 idx_8x8;
1241
0
                                intra8_analyse_t *ps_intra8_analyse;
1242
0
                                ps_intra16_analyse[j].au1_best_modes_8x8_tu[0] = 255;
1243
0
                                ps_intra16_analyse[j].au1_best_modes_16x16_tu[0] = 255;
1244
1245
0
                                ps_intra16_analyse[j].b1_valid_cu = 0;
1246
1247
0
                                for(idx_8x8 = 0; idx_8x8 < 4; idx_8x8++)
1248
0
                                {
1249
0
                                    ps_intra8_analyse =
1250
0
                                        &ps_intra16_analyse[j].as_intra8_analyse[idx_8x8];
1251
1252
0
                                    ps_intra8_analyse->au1_best_modes_8x8_tu[0] = 255;
1253
0
                                    ps_intra8_analyse->au1_best_modes_4x4_tu[0] = 255;
1254
1255
0
                                    ps_intra8_analyse->b1_enable_nxn = 0;
1256
0
                                    ps_intra8_analyse->b1_valid_cu = 0;
1257
1258
                                    /* NXN modes not evaluated hence set to 0 */
1259
0
                                    memset(
1260
0
                                        &ps_intra8_analyse->au1_4x4_best_modes[0][0],
1261
0
                                        255,
1262
0
                                        sizeof(UWORD8) * 4 * (NUM_BEST_MODES + 1));
1263
0
                                }
1264
0
                            }
1265
1266
0
                            child_cost_least = MAX_INTRA_COST_IPE;
1267
0
                        }
1268
20.6k
#endif
1269
1270
                        /* Populate params for 32x32 block analysis */
1271
1272
20.6k
                        ps_cu_node->ps_parent->u1_cu_size = 32;
1273
20.6k
                        ps_cu_node->ps_parent->u2_x0 =
1274
20.6k
                            gau1_cu_pos_x[blk_cnt]; /* Populate properly */
1275
20.6k
                        ps_cu_node->ps_parent->u2_y0 =
1276
20.6k
                            gau1_cu_pos_y[blk_cnt]; /* Populate properly */
1277
1278
                        /* Revaluation for 32x32 parent block at 16x16 prediction level */
1279
                        //memcpy(ps_ctxt->ai1_ctb_mode_map_temp, ps_ctxt->ai1_ctb_mode_map, sizeof(ps_ctxt->ai1_ctb_mode_map));
1280
1281
20.6k
                        {
1282
                            /* Eval for TUSize = CuSize */
1283
20.6k
                            ihevce_mode_eval_filtering(
1284
20.6k
                                ps_cu_node->ps_parent,
1285
20.6k
                                ps_cu_node,
1286
20.6k
                                ps_ctxt,
1287
20.6k
                                ps_curr_src,
1288
20.6k
                                26,
1289
20.6k
                                &ps_cu_node->ps_parent->au4_best_cost_1tu[0],
1290
20.6k
                                &ps_cu_node->ps_parent->au1_best_mode_1tu[0],
1291
20.6k
                                step2_bypass,
1292
20.6k
                                1);
1293
1294
20.6k
                            if(i4_enable_1cu_4tu)
1295
11.4k
                            {
1296
                                /* Eval for TUSize = CuSize/2 */
1297
11.4k
                                ihevce_mode_eval_filtering(
1298
11.4k
                                    ps_cu_node->ps_parent,
1299
11.4k
                                    ps_cu_node,
1300
11.4k
                                    ps_ctxt,
1301
11.4k
                                    ps_curr_src,
1302
11.4k
                                    26,
1303
11.4k
                                    &ps_cu_node->ps_parent->au4_best_cost_4tu[0],
1304
11.4k
                                    &ps_cu_node->ps_parent->au1_best_mode_4tu[0],
1305
11.4k
                                    step2_bypass,
1306
11.4k
                                    0);
1307
11.4k
                            }
1308
9.23k
                            else
1309
9.23k
                            {
1310
                                /* 4TU not evaluated :  4tu modes set same as 1tu modes */
1311
9.23k
                                memcpy(
1312
9.23k
                                    &ps_cu_node->ps_parent->au1_best_mode_4tu[0],
1313
9.23k
                                    &ps_cu_node->ps_parent->au1_best_mode_1tu[0],
1314
9.23k
                                    NUM_BEST_MODES);
1315
1316
                                /* 4TU not evaluated : currently 4tu cost set same as 1tu cost */
1317
9.23k
                                memcpy(
1318
9.23k
                                    &ps_cu_node->ps_parent->au4_best_cost_4tu[0],
1319
9.23k
                                    &ps_cu_node->ps_parent->au4_best_cost_1tu[0],
1320
9.23k
                                    NUM_BEST_MODES * sizeof(WORD32));
1321
9.23k
                            }
1322
20.6k
                        }
1323
1324
20.6k
                        ps_ctxt->u1_disable_child_cu_decide = 0;
1325
20.6k
                        step2_bypass = 1;
1326
1327
                        /* Update parent cost */
1328
20.6k
                        parent_cost =
1329
20.6k
                            MIN(ps_cu_node->ps_parent->au4_best_cost_4tu[0],
1330
20.6k
                                ps_cu_node->ps_parent->au4_best_cost_1tu[0]);
1331
1332
                        /* Select the best mode to be populated as top and left nbr depending on the
1333
                        4tu and 1tu cost */
1334
20.6k
                        if(ps_cu_node->ps_parent->au4_best_cost_4tu[0] >
1335
20.6k
                           ps_cu_node->ps_parent->au4_best_cost_1tu[0])
1336
759
                        {
1337
759
                            ps_cu_node->ps_parent->best_mode =
1338
759
                                ps_cu_node->ps_parent->au1_best_mode_1tu[0];
1339
759
                        }
1340
19.8k
                        else
1341
19.8k
                        {
1342
19.8k
                            ps_cu_node->ps_parent->best_mode =
1343
19.8k
                                ps_cu_node->ps_parent->au1_best_mode_4tu[0];
1344
19.8k
                        }
1345
1346
                        /* store the 32x32 cost */
1347
20.6k
                        *pi4_intra_32_cost = parent_cost;
1348
1349
                        /* set the CU valid flag */
1350
20.6k
                        ps_intra32_analyse->b1_valid_cu = 1;
1351
1352
20.6k
                        ps_intra32_analyse->b1_merge_flag = 1;
1353
1354
                        /* storing the modes to intra 32 analyse */
1355
20.6k
                        {
1356
                            /* store the best 32x32 modes 16x16 tu */
1357
20.6k
                            memcpy(
1358
20.6k
                                &ps_intra32_analyse->au1_best_modes_16x16_tu[0],
1359
20.6k
                                &ps_cu_node->ps_parent->au1_best_mode_4tu[0],
1360
20.6k
                                sizeof(UWORD8) * (NUM_BEST_MODES));
1361
20.6k
                            ps_intra32_analyse->au1_best_modes_16x16_tu[NUM_BEST_MODES] = 255;
1362
1363
                            /* store the best 32x32 modes 32x32 tu */
1364
20.6k
                            memcpy(
1365
20.6k
                                &ps_intra32_analyse->au1_best_modes_32x32_tu[0],
1366
20.6k
                                &ps_cu_node->ps_parent->au1_best_mode_1tu[0],
1367
20.6k
                                sizeof(UWORD8) * (NUM_BEST_MODES));
1368
20.6k
                            ps_intra32_analyse->au1_best_modes_32x32_tu[NUM_BEST_MODES] = 255;
1369
20.6k
                        }
1370
20.6k
                        parent_best_mode = ps_cu_node->ps_parent->best_mode;
1371
20.6k
                        if((parent_cost <=
1372
20.6k
                            child_cost_least + (ps_ctxt->i4_ol_satd_lambda * CHILD_BIAS >>
1373
20.6k
                                                LAMBDA_Q_SHIFT)))  //|| identical_modes)
1374
17.8k
                        {
1375
17.8k
                            WORD32 i4_q_scale_q3_mod;
1376
17.8k
                            UWORD8 u1_cu_possible_qp;
1377
17.8k
                            WORD32 i4_act_factor;
1378
1379
                            /* CU size 32x32 and fill the final cu params */
1380
1381
17.8k
                            ihevce_update_cand_list(ps_cu_node->ps_parent, ps_ed_blk_l1, ps_ctxt);
1382
1383
17.8k
                            if((IHEVCE_QUALITY_P3 > i4_quality_preset))
1384
10.1k
                            {
1385
50.5k
                                for(i = 0; i < 4; i++)
1386
40.4k
                                {
1387
40.4k
                                    intra8_analyse_t *ps_intra8_analyse;
1388
40.4k
                                    ps_intra8_analyse = &ps_intra16_analyse->as_intra8_analyse[i];
1389
202k
                                    for(j = 0; j < 4; j++)
1390
161k
                                    {
1391
                                        /* Populate best 3 nxn modes */
1392
161k
                                        ps_intra8_analyse->au1_4x4_best_modes[j][0] =
1393
161k
                                            ps_cu_node->ps_sub_cu[i]->au1_best_mode_4tu[0];
1394
161k
                                        ps_intra8_analyse->au1_4x4_best_modes[j][1] =
1395
161k
                                            ps_cu_node->ps_sub_cu[i]
1396
161k
                                                ->au1_best_mode_4tu[1];  //(ps_ed + 1)->best_mode;
1397
161k
                                        ps_intra8_analyse->au1_4x4_best_modes[j][2] =
1398
161k
                                            ps_cu_node->ps_sub_cu[i]
1399
161k
                                                ->au1_best_mode_4tu[2];  //(ps_ed + 2)->best_mode;
1400
161k
                                        ps_intra8_analyse->au1_4x4_best_modes[j][3] = 255;
1401
161k
                                    }
1402
40.4k
                                }
1403
10.1k
                            }
1404
                            /* store the 32x32 non split flag */
1405
17.8k
                            ps_intra32_analyse->b1_split_flag = 0;
1406
17.8k
                            ps_intra32_analyse->as_intra16_analyse[0].b1_split_flag = 0;
1407
17.8k
                            ps_intra32_analyse->as_intra16_analyse[1].b1_split_flag = 0;
1408
17.8k
                            ps_intra32_analyse->as_intra16_analyse[2].b1_split_flag = 0;
1409
17.8k
                            ps_intra32_analyse->as_intra16_analyse[3].b1_split_flag = 0;
1410
1411
17.8k
                            au1_best_32x32_modes[blk_cnt >> 4] =
1412
17.8k
                                ps_cu_node->ps_parent->au1_best_mode_1tu[0];
1413
1414
17.8k
                            au4_best_32x32_cost[blk_cnt >> 4] =
1415
17.8k
                                ps_cu_node->ps_parent->au4_best_cost_1tu[0];
1416
                            /*As 32*32 has won, pick L2 8x8 qp which maps
1417
                            to L0 32x32 Qp*/
1418
17.8k
                            ASSERT(((blk_cnt >> 4) & 3) == (blk_cnt >> 4));
1419
17.8k
                            ASSERT(ps_ed_ctb_l1->i4_16x16_satd[blk_cnt >> 4][0] != -2);
1420
17.8k
                            u1_cu_possible_qp = ihevce_cu_level_qp_mod(
1421
17.8k
                                ps_ctxt->i4_qscale,
1422
17.8k
                                ps_ed_ctb_l1->i4_16x16_satd[blk_cnt >> 4][0],
1423
17.8k
                                ps_ctxt->ld_curr_frame_16x16_log_avg[0],
1424
17.8k
                                f_strength,
1425
17.8k
                                &i4_act_factor,
1426
17.8k
                                &i4_q_scale_q3_mod,
1427
17.8k
                                ps_ctxt->ps_rc_quant_ctxt);
1428
                            /* cost accumalation of best cu size candiate */
1429
17.8k
                            i8_frame_acc_satd_cost += parent_cost;
1430
1431
                            /* satd and mpm bits accumalation of best cu size candiate */
1432
17.8k
                            i4_ctb_acc_satd += ps_cu_node->ps_parent->best_satd;
1433
1434
                            /* Mode bits cost accumalation for best cu size and cu mode */
1435
17.8k
                            i8_frame_acc_mode_bits_cost += ps_cu_node->ps_parent->u2_mode_bits_cost;
1436
1437
                            /*satd/mod_qp accumulation of best cu */
1438
17.8k
                            i8_frame_acc_satd_by_modqp_q10 +=
1439
17.8k
                                ((LWORD64)ps_cu_node->ps_parent->best_satd
1440
17.8k
                                 << (SATD_BY_ACT_Q_FAC + QSCALE_Q_FAC_3)) /
1441
17.8k
                                i4_q_scale_q3_mod;
1442
1443
                            /* Increment pointers */
1444
17.8k
                            ps_ed_blk_l1 += 16;
1445
17.8k
                            blk_cnt += 16;
1446
                            //ps_row_cu++;
1447
17.8k
                            merge_64x64 &= 1;
1448
17.8k
                        }
1449
2.81k
                        else
1450
2.81k
                        {
1451
                            /* store the 32x32 split flag */
1452
2.81k
                            ps_intra32_analyse->b1_split_flag = 1;
1453
1454
                            /* CU size 16x16 and fill the final cu params for all 4 blocks */
1455
14.0k
                            for(j = 0; j < 4; j++)
1456
11.2k
                            {
1457
11.2k
                                WORD32 i4_q_scale_q3_mod;
1458
11.2k
                                UWORD8 u1_cu_possible_qp;
1459
11.2k
                                WORD32 i4_act_factor;
1460
1461
                                /* Set CU split flag */
1462
11.2k
                                ASSERT(blk_cnt % 4 == 0);
1463
1464
11.2k
                                ihevce_update_cand_list(
1465
11.2k
                                    ps_cu_node->ps_sub_cu[j], ps_ed_blk_l1, ps_ctxt);
1466
1467
                                /* store the 16x16 non split flag  */
1468
11.2k
                                ps_intra16_analyse[j].b1_split_flag = 0;
1469
1470
11.2k
                                ASSERT(((blk_cnt >> 2) & 0xF) == (blk_cnt >> 2));
1471
11.2k
                                ASSERT(ps_ed_ctb_l1->i4_8x8_satd[blk_cnt >> 2][0] != -2);
1472
                                /*As 16*16 has won, pick L1 8x8 qp which maps
1473
                                to L0 16x16 Qp*/
1474
11.2k
                                u1_cu_possible_qp = ihevce_cu_level_qp_mod(
1475
11.2k
                                    ps_ctxt->i4_qscale,
1476
11.2k
                                    ps_ed_ctb_l1->i4_8x8_satd[blk_cnt >> 2][0],
1477
11.2k
                                    ps_ctxt->ld_curr_frame_8x8_log_avg[0],
1478
11.2k
                                    f_strength,
1479
11.2k
                                    &i4_act_factor,
1480
11.2k
                                    &i4_q_scale_q3_mod,
1481
11.2k
                                    ps_ctxt->ps_rc_quant_ctxt);
1482
1483
                                /*accum satd/qp for all child block*/
1484
11.2k
                                i8_frame_acc_satd_by_modqp_q10 +=
1485
11.2k
                                    ((LWORD64)child_satd[j]
1486
11.2k
                                     << (SATD_BY_ACT_Q_FAC + QSCALE_Q_FAC_3)) /
1487
11.2k
                                    i4_q_scale_q3_mod;
1488
1489
                                /* Accumalate mode bits for all child blocks */
1490
11.2k
                                i8_frame_acc_mode_bits_cost +=
1491
11.2k
                                    ps_cu_node->ps_sub_cu[j]->u2_mode_bits_cost;
1492
1493
                                /* satd and mpm bits accumalation of best cu size candiate */
1494
11.2k
                                i4_ctb_acc_satd += child_satd[j];
1495
1496
                                /* Increment pointers */
1497
                                //ps_row_cu++;
1498
11.2k
                                ps_ed_blk_l1 += 4;
1499
11.2k
                                blk_cnt += 4;
1500
11.2k
                            }
1501
1502
                            /* cost accumalation of best cu size candiate */
1503
2.81k
                            i8_frame_acc_satd_cost += child_cost_least;
1504
1505
                            /* 64x64 merge is not possible */
1506
2.81k
                            merge_64x64 = 0;
1507
2.81k
                        }
1508
1509
                        //ps_ed_blk_l2 += 4;
1510
1511
20.6k
                    }  //end of EIID's else
1512
21.3k
#endif
1513
21.3k
                }
1514
                /* If Merge success for L1 max CU size 16x16 is chosen */
1515
106k
                else if(merge_16x16_l1)
1516
45.1k
                {
1517
#if IP_DBG_L1_l2
1518
                    ps_cu_node->ps_parent->u1_cu_size = 16;
1519
                    ps_cu_node->ps_parent->u2_x0 = gau1_cu_pos_x[blk_cnt]; /* Populate properly */
1520
                    ps_cu_node->ps_parent->u2_y0 = gau1_cu_pos_y[blk_cnt]; /* Populate properly */
1521
                    ps_cu_node->ps_parent->best_mode = ps_ed_blk_l1->best_merge_mode;
1522
                    ihevce_update_cand_list(ps_cu_node->ps_parent, ps_ed_blk_l1, ps_ctxt);
1523
1524
                    blk_cnt += 4;
1525
                    ps_ed_blk_l1 += 4;
1526
                    ps_row_cu++;
1527
                    merge_64x64 = 0;
1528
#else
1529
1530
                    /*EIID: evaluate only if L1 early-inter-intra decision is not favouring inter*/
1531
                    /* enable this only in B pictures */
1532
45.1k
                    if(ps_ed_blk_l1->intra_or_inter == 2 && (ps_ctxt->i4_slice_type != ISLICE))
1533
2.38k
                    {
1534
2.38k
                        WORD32 i4_q_scale_q3_mod, i4_local_ctr;
1535
2.38k
                        WORD8 i1_cu_possible_qp;
1536
2.38k
                        WORD32 i4_act_factor;
1537
                        /* make cost infinity. */
1538
                        /* make modes invalid */
1539
                        /* update loop variables */
1540
                        /* set other output variales */
1541
                        /* dont set neighbour flag so that next blocks wont access this cu */
1542
                        /* what happens to ctb_mode_map?? */
1543
1544
2.38k
                        ps_cu_node->ps_parent->u1_cu_size = 16;
1545
2.38k
                        ps_cu_node->ps_parent->u2_x0 =
1546
2.38k
                            gau1_cu_pos_x[blk_cnt]; /* Populate properly */
1547
2.38k
                        ps_cu_node->ps_parent->u2_y0 =
1548
2.38k
                            gau1_cu_pos_y[blk_cnt]; /* Populate properly */
1549
2.38k
                        ps_cu_node->ps_parent->best_mode =
1550
2.38k
                            INTRA_DC;  //ps_ed_blk_l1->best_merge_mode;
1551
1552
                        /* fill in the first modes as invalid */
1553
1554
2.38k
                        ps_cu_node->ps_parent->au1_best_mode_1tu[0] = INTRA_DC;
1555
2.38k
                        ps_cu_node->ps_parent->au1_best_mode_1tu[1] =
1556
2.38k
                            INTRA_DC;  //for safery. Since update_cand_list will set num_modes as 3
1557
2.38k
                        ps_cu_node->ps_parent->au1_best_mode_1tu[2] = INTRA_DC;
1558
1559
2.38k
                        ps_cu_node->ps_parent->au1_best_mode_4tu[0] = INTRA_DC;
1560
2.38k
                        ps_cu_node->ps_parent->au1_best_mode_4tu[1] = INTRA_DC;
1561
2.38k
                        ps_cu_node->ps_parent->au1_best_mode_4tu[2] = INTRA_DC;
1562
1563
2.38k
                        ihevce_update_cand_list(ps_cu_node->ps_parent, ps_ed_blk_l1, ps_ctxt);
1564
1565
                        //ps_row_cu->s_cu_intra_cand.b6_num_intra_cands = 0;
1566
                        //ps_row_cu->u1_num_intra_rdopt_cands = 0;
1567
1568
2.38k
                        ps_intra32_analyse->b1_split_flag = 1;
1569
2.38k
                        ps_intra32_analyse->b1_merge_flag = 0;
1570
1571
2.38k
                        ps_intra16_analyse->b1_valid_cu = 0;
1572
2.38k
                        ps_intra16_analyse->b1_split_flag = 0;
1573
2.38k
                        ps_intra16_analyse->b1_merge_flag = 1;
1574
                        //memset (&ps_intra16_analyse->au1_best_modes_16x16_tu,
1575
                        //  255,
1576
                        //  NUM_BEST_MODES);
1577
                        //memset (&ps_intra16_analyse->au1_best_modes_8x8_tu,
1578
                        //  255,
1579
                        //  NUM_BEST_MODES);
1580
                        //set only first mode since if it's 255. it wont go ahead
1581
2.38k
                        ps_intra16_analyse->au1_best_modes_16x16_tu[0] = 255;
1582
2.38k
                        ps_intra16_analyse->au1_best_modes_8x8_tu[0] = 255;
1583
2.38k
                        *pi4_intra_16_cost = MAX_INTRA_COST_IPE;
1584
1585
                        /*since ME will start evaluating from bottom up, set the lower
1586
                        cu size data invalid */
1587
11.9k
                        for(i4_local_ctr = 0; i4_local_ctr < 4; i4_local_ctr++)
1588
9.53k
                        {
1589
9.53k
                            ps_intra16_analyse->as_intra8_analyse[i4_local_ctr]
1590
9.53k
                                .au1_4x4_best_modes[0][0] = 255;
1591
9.53k
                            ps_intra16_analyse->as_intra8_analyse[i4_local_ctr]
1592
9.53k
                                .au1_4x4_best_modes[1][0] = 255;
1593
9.53k
                            ps_intra16_analyse->as_intra8_analyse[i4_local_ctr]
1594
9.53k
                                .au1_4x4_best_modes[2][0] = 255;
1595
9.53k
                            ps_intra16_analyse->as_intra8_analyse[i4_local_ctr]
1596
9.53k
                                .au1_4x4_best_modes[3][0] = 255;
1597
9.53k
                            ps_intra16_analyse->as_intra8_analyse[i4_local_ctr]
1598
9.53k
                                .au1_best_modes_8x8_tu[0] = 255;
1599
9.53k
                            ps_intra16_analyse->as_intra8_analyse[i4_local_ctr]
1600
9.53k
                                .au1_best_modes_4x4_tu[0] = 255;
1601
1602
9.53k
                            pi4_intra_8_cost
1603
9.53k
                                [(i4_local_ctr & 1) + (MAX_CU_IN_CTB_ROW * (i4_local_ctr >> 1))] =
1604
9.53k
                                    MAX_INTRA_COST_IPE;
1605
9.53k
                        }
1606
1607
                        /* set neighbours even if intra is not evaluated, since source is always available. */
1608
2.38k
                        ihevce_set_nbr_map(
1609
2.38k
                            ps_ctxt->pu1_ctb_nbr_map,
1610
2.38k
                            ps_ctxt->i4_nbr_map_strd,
1611
2.38k
                            ps_cu_node->ps_parent->u2_x0 << 1,
1612
2.38k
                            ps_cu_node->ps_parent->u2_y0 << 1,
1613
2.38k
                            (ps_cu_node->ps_parent->u1_cu_size >> 2),
1614
2.38k
                            1);
1615
1616
                        //what happends to RC variables??
1617
                        /* run only constant Qp */
1618
2.38k
                        ASSERT(((blk_cnt >> 2) & 0xF) == (blk_cnt >> 2));
1619
2.38k
                        ASSERT(ps_ed_ctb_l1->i4_8x8_satd[blk_cnt >> 2][0] != -2);
1620
2.38k
                        i1_cu_possible_qp = ihevce_cu_level_qp_mod(
1621
2.38k
                            ps_ctxt->i4_qscale,
1622
2.38k
                            ps_ed_ctb_l1->i4_8x8_satd[blk_cnt >> 2][0],
1623
2.38k
                            ps_ctxt->ld_curr_frame_8x8_log_avg[0],
1624
2.38k
                            f_strength,
1625
2.38k
                            &i4_act_factor,
1626
2.38k
                            &i4_q_scale_q3_mod,
1627
2.38k
                            ps_ctxt->ps_rc_quant_ctxt);
1628
1629
                        /* cost accumalation of best cu size candiate */
1630
2.38k
                        i8_frame_acc_satd_cost += 0;  //parent_cost;  //incorrect accumulation
1631
1632
                        /*satd/mod_qp accumulation of best cu */
1633
2.38k
                        i8_frame_acc_satd_by_modqp_q10 += 0;  //incorrect accumulation
1634
                        //((LWORD64)ps_cu_node->ps_parent->best_satd << SATD_BY_ACT_Q_FAC)/i4_q_scale_q3_mod;
1635
1636
                        /* Accumalate mode bits for all child blocks */
1637
2.38k
                        i8_frame_acc_mode_bits_cost +=
1638
2.38k
                            0;  //ps_cu_node->ps_parent->u2_mode_bits_cost;
1639
                        //incoorect accumulation
1640
1641
2.38k
                        blk_cnt += 4;
1642
2.38k
                        ps_ed_blk_l1 += 4;
1643
                        //ps_row_cu++;
1644
2.38k
                        merge_64x64 = 0;
1645
1646
                        /* increment for stat purpose only. Increment is valid only on single thread */
1647
2.38k
                        ps_ctxt->u4_num_16x16_skips_at_L0_IPE += 1;
1648
2.38k
                    }
1649
42.7k
                    else
1650
42.7k
                    {
1651
                        /* 64x64 merge is not possible */
1652
42.7k
                        merge_64x64 = 0;
1653
1654
                        /* set the 32x32 split flag to 1 */
1655
42.7k
                        ps_intra32_analyse->b1_split_flag = 1;
1656
1657
42.7k
                        ps_intra32_analyse->b1_merge_flag = 0;
1658
1659
42.7k
                        ps_intra16_analyse->b1_merge_flag = 1;
1660
1661
42.7k
                        if((ps_ctxt->i4_quality_preset == IHEVCE_QUALITY_P6) &&
1662
2.18k
                           (ps_ctxt->i4_slice_type == PSLICE))
1663
2.08k
                        {
1664
2.08k
                            ps_ctxt->u1_disable_child_cu_decide = 1;
1665
2.08k
                            step2_bypass = 0;
1666
2.08k
                        }
1667
                        //memcpy(ps_ctxt->ai1_ctb_mode_map_temp, ps_ctxt->ai1_ctb_mode_map, sizeof(ps_ctxt->ai1_ctb_mode_map));
1668
                        /* Based on the flag, Child modes decision can be disabled*/
1669
42.7k
                        if(0 == ps_ctxt->u1_disable_child_cu_decide)
1670
40.6k
                        {
1671
203k
                            for(j = 0; j < 4; j++)
1672
162k
                            {
1673
162k
                                intra8_analyse_t *ps_intra8_analyse;
1674
162k
                                WORD32 best_ang_mode = (ps_ed_blk_l1 + j)->best_mode;
1675
1676
162k
                                if(best_ang_mode < 2)
1677
99.9k
                                    best_ang_mode = 26;
1678
1679
                                //ps_cu_node->ps_sub_cu[j]->best_cost = MAX_INTRA_COST_IPE;
1680
                                //ps_cu_node->ps_sub_cu[j]->best_mode = (ps_ed_blk_l1 + j)->best_mode;
1681
1682
162k
                                ps_cu_node->ps_sub_cu[j]->u2_x0 =
1683
162k
                                    gau1_cu_pos_x[blk_cnt + j]; /* Populate properly */
1684
162k
                                ps_cu_node->ps_sub_cu[j]->u2_y0 =
1685
162k
                                    gau1_cu_pos_y[blk_cnt + j]; /* Populate properly */
1686
162k
                                ps_cu_node->ps_sub_cu[j]->u1_cu_size = 8;
1687
1688
162k
                                ihevce_mode_eval_filtering(
1689
162k
                                    ps_cu_node->ps_sub_cu[j],
1690
162k
                                    ps_cu_node,
1691
162k
                                    ps_ctxt,
1692
162k
                                    ps_curr_src,
1693
162k
                                    best_ang_mode,
1694
162k
                                    &ps_cu_node->ps_sub_cu[j]->au4_best_cost_1tu[0],
1695
162k
                                    &ps_cu_node->ps_sub_cu[j]->au1_best_mode_1tu[0],
1696
162k
                                    !step2_bypass,
1697
162k
                                    1);
1698
1699
162k
                                if(i4_enable_4cu_16tu)
1700
59.9k
                                {
1701
59.9k
                                    ihevce_mode_eval_filtering(
1702
59.9k
                                        ps_cu_node->ps_sub_cu[j],
1703
59.9k
                                        ps_cu_node,
1704
59.9k
                                        ps_ctxt,
1705
59.9k
                                        ps_curr_src,
1706
59.9k
                                        best_ang_mode,
1707
59.9k
                                        &ps_cu_node->ps_sub_cu[j]->au4_best_cost_4tu[0],
1708
59.9k
                                        &ps_cu_node->ps_sub_cu[j]->au1_best_mode_4tu[0],
1709
59.9k
                                        !step2_bypass,
1710
59.9k
                                        0);
1711
59.9k
                                }
1712
102k
                                else
1713
102k
                                {
1714
                                    /* 4TU not evaluated :  4tu modes set same as 1tu modes */
1715
102k
                                    memcpy(
1716
102k
                                        &ps_cu_node->ps_sub_cu[j]->au1_best_mode_4tu[0],
1717
102k
                                        &ps_cu_node->ps_sub_cu[j]->au1_best_mode_1tu[0],
1718
102k
                                        NUM_BEST_MODES);
1719
1720
                                    /* 4TU not evaluated : currently 4tu cost set same as 1tu cost */
1721
102k
                                    memcpy(
1722
102k
                                        &ps_cu_node->ps_sub_cu[j]->au4_best_cost_4tu[0],
1723
102k
                                        &ps_cu_node->ps_sub_cu[j]->au4_best_cost_1tu[0],
1724
102k
                                        NUM_BEST_MODES * sizeof(WORD32));
1725
102k
                                }
1726
1727
162k
                                child_cost[j] =
1728
162k
                                    MIN(ps_cu_node->ps_sub_cu[j]->au4_best_cost_4tu[0],
1729
162k
                                        ps_cu_node->ps_sub_cu[j]->au4_best_cost_1tu[0]);
1730
1731
162k
                                child_cost_least += child_cost[j];
1732
1733
                                /* Select the best mode to be populated as top and left nbr depending on the
1734
                                4tu and 1tu cost */
1735
162k
                                if(ps_cu_node->ps_sub_cu[j]->au4_best_cost_4tu[0] >
1736
162k
                                   ps_cu_node->ps_sub_cu[j]->au4_best_cost_1tu[0])
1737
14.4k
                                {
1738
14.4k
                                    ps_cu_node->ps_sub_cu[j]->best_mode =
1739
14.4k
                                        ps_cu_node->ps_sub_cu[j]->au1_best_mode_1tu[0];
1740
14.4k
                                }
1741
148k
                                else
1742
148k
                                {
1743
148k
                                    ps_cu_node->ps_sub_cu[j]->best_mode =
1744
148k
                                        ps_cu_node->ps_sub_cu[j]->au1_best_mode_4tu[0];
1745
148k
                                }
1746
162k
                                { /* Update the CTB nodes only for MAX - 1 CU nodes */
1747
162k
                                    WORD32 xA, yA, row, col;
1748
162k
                                    xA = ((ps_cu_node->ps_sub_cu[j]->u2_x0 << 3) >> 2) + 1;
1749
162k
                                    yA = ((ps_cu_node->ps_sub_cu[j]->u2_y0 << 3) >> 2) + 1;
1750
162k
                                    size = ps_cu_node->ps_sub_cu[j]->u1_cu_size >> 2;
1751
487k
                                    for(row = yA; row < (yA + size); row++)
1752
325k
                                    {
1753
975k
                                        for(col = xA; col < (xA + size); col++)
1754
650k
                                        {
1755
650k
                                            ps_ctxt->au1_ctb_mode_map[row][col] =
1756
650k
                                                ps_cu_node->ps_sub_cu[j]->best_mode;
1757
650k
                                        }
1758
325k
                                    }
1759
162k
                                }
1760
1761
                                /*collect individual child satd for final SATD/qp accum*/
1762
162k
                                child_satd[j] = ps_cu_node->ps_sub_cu[j]->best_satd;
1763
1764
162k
                                ps_intra8_analyse = &ps_intra16_analyse->as_intra8_analyse[j];
1765
1766
                                /* store the child 8x8 costs */
1767
162k
                                pi4_intra_8_cost[(j & 1) + (MAX_CU_IN_CTB_ROW * (j >> 1))] =
1768
162k
                                    child_cost[j];
1769
1770
                                /* set the CU valid flag */
1771
162k
                                ps_intra8_analyse->b1_valid_cu = 1;
1772
162k
                                ps_intra8_analyse->b1_enable_nxn = 0;
1773
1774
                                /* storing the modes to intra8  analyse */
1775
1776
                                /* store the best 8x8 modes 8x8 tu */
1777
162k
                                memcpy(
1778
162k
                                    &ps_intra8_analyse->au1_best_modes_8x8_tu[0],
1779
162k
                                    &ps_cu_node->ps_sub_cu[j]->au1_best_mode_1tu[0],
1780
162k
                                    sizeof(UWORD8) * (NUM_BEST_MODES));
1781
162k
                                ps_intra8_analyse->au1_best_modes_8x8_tu[NUM_BEST_MODES] = 255;
1782
1783
                                /* store the best 8x8 modes 4x4 tu */
1784
162k
                                memcpy(
1785
162k
                                    &ps_intra8_analyse->au1_best_modes_4x4_tu[0],
1786
162k
                                    &ps_cu_node->ps_sub_cu[j]->au1_best_mode_4tu[0],
1787
162k
                                    sizeof(UWORD8) * (NUM_BEST_MODES));
1788
162k
                                ps_intra8_analyse->au1_best_modes_4x4_tu[NUM_BEST_MODES] = 255;
1789
1790
                                /* NXN modes not evaluated hence set to 255 */
1791
162k
                                memset(
1792
162k
                                    &ps_intra8_analyse->au1_4x4_best_modes[0][0],
1793
162k
                                    255,
1794
162k
                                    sizeof(UWORD8) * 4 * (NUM_BEST_MODES + 1));
1795
162k
                            }
1796
1797
40.6k
                            ihevce_set_nbr_map(
1798
40.6k
                                ps_ctxt->pu1_ctb_nbr_map,
1799
40.6k
                                ps_ctxt->i4_nbr_map_strd,
1800
40.6k
                                ps_cu_node->ps_sub_cu[0]->u2_x0 << 1,
1801
40.6k
                                ps_cu_node->ps_sub_cu[0]->u2_y0 << 1,
1802
40.6k
                                (ps_cu_node->ps_sub_cu[0]->u1_cu_size >> 1),
1803
40.6k
                                0);
1804
40.6k
                        }
1805
2.08k
#if 1  //DISBLE_CHILD_CU_EVAL_L0_IPE //1
1806
2.08k
                        else
1807
2.08k
                        {
1808
10.4k
                            for(j = 0; j < 4; j++)
1809
8.35k
                            {
1810
8.35k
                                intra8_analyse_t *ps_intra8_analyse;
1811
8.35k
                                ps_intra8_analyse = &ps_intra16_analyse->as_intra8_analyse[j];
1812
8.35k
                                ps_intra8_analyse->au1_best_modes_8x8_tu[0] = 255;
1813
8.35k
                                ps_intra8_analyse->au1_best_modes_4x4_tu[0] = 255;
1814
                                /* NXN modes not evaluated hence set to 255 */
1815
8.35k
                                memset(
1816
8.35k
                                    &ps_intra8_analyse->au1_4x4_best_modes[0][0],
1817
8.35k
                                    255,
1818
8.35k
                                    sizeof(UWORD8) * 4 * (NUM_BEST_MODES + 1));
1819
1820
8.35k
                                ps_intra8_analyse->b1_valid_cu = 0;
1821
8.35k
                                ps_intra8_analyse->b1_enable_nxn = 0;
1822
8.35k
                            }
1823
2.08k
                            child_cost_least = MAX_INTRA_COST_IPE;
1824
2.08k
                        }
1825
42.7k
#endif
1826
                        //ps_cu_node->ps_parent->best_mode = ps_ed_blk_l1->best_mode;
1827
                        //ps_cu_node->ps_parent->best_cost = MAX_INTRA_COST_IPE;
1828
1829
42.7k
                        ps_cu_node->ps_parent->u1_cu_size = 16;
1830
42.7k
                        ps_cu_node->ps_parent->u2_x0 =
1831
42.7k
                            gau1_cu_pos_x[blk_cnt]; /* Populate properly */
1832
42.7k
                        ps_cu_node->ps_parent->u2_y0 =
1833
42.7k
                            gau1_cu_pos_y[blk_cnt]; /* Populate properly */
1834
1835
                        //memcpy(ps_ctxt->ai1_ctb_mode_map_temp, ps_ctxt->ai1_ctb_mode_map, sizeof(ps_ctxt->ai1_ctb_mode_map));
1836
1837
                        /* Eval for TUSize = CuSize */
1838
42.7k
                        ihevce_mode_eval_filtering(
1839
42.7k
                            ps_cu_node->ps_parent,
1840
42.7k
                            ps_cu_node,
1841
42.7k
                            ps_ctxt,
1842
42.7k
                            ps_curr_src,
1843
42.7k
                            26,
1844
42.7k
                            &ps_cu_node->ps_parent->au4_best_cost_1tu[0],
1845
42.7k
                            &ps_cu_node->ps_parent->au1_best_mode_1tu[0],
1846
42.7k
                            step2_bypass,
1847
42.7k
                            1);
1848
1849
42.7k
                        if(i4_enable_1cu_4tu)
1850
14.9k
                        {
1851
                            /* Eval for TUSize = CuSize/2 */
1852
14.9k
                            ihevce_mode_eval_filtering(
1853
14.9k
                                ps_cu_node->ps_parent,
1854
14.9k
                                ps_cu_node,
1855
14.9k
                                ps_ctxt,
1856
14.9k
                                ps_curr_src,
1857
14.9k
                                26,
1858
14.9k
                                &ps_cu_node->ps_parent->au4_best_cost_4tu[0],
1859
14.9k
                                &ps_cu_node->ps_parent->au1_best_mode_4tu[0],
1860
14.9k
                                step2_bypass,
1861
14.9k
                                0);
1862
14.9k
                        }
1863
27.7k
                        else
1864
27.7k
                        {
1865
                            /* 4TU not evaluated :  4tu modes set same as 1tu modes */
1866
27.7k
                            memcpy(
1867
27.7k
                                &ps_cu_node->ps_parent->au1_best_mode_4tu[0],
1868
27.7k
                                &ps_cu_node->ps_parent->au1_best_mode_1tu[0],
1869
27.7k
                                NUM_BEST_MODES);
1870
1871
                            /* 4TU not evaluated : currently 4tu cost set same as 1tu cost */
1872
27.7k
                            memcpy(
1873
27.7k
                                &ps_cu_node->ps_parent->au4_best_cost_4tu[0],
1874
27.7k
                                &ps_cu_node->ps_parent->au4_best_cost_1tu[0],
1875
27.7k
                                NUM_BEST_MODES * sizeof(WORD32));
1876
27.7k
                        }
1877
1878
42.7k
                        ps_ctxt->u1_disable_child_cu_decide = 0;
1879
42.7k
                        step2_bypass = 1;
1880
1881
                        /* Update parent cost */
1882
42.7k
                        parent_cost =
1883
42.7k
                            MIN(ps_cu_node->ps_parent->au4_best_cost_4tu[0],
1884
42.7k
                                ps_cu_node->ps_parent->au4_best_cost_1tu[0]);
1885
1886
                        /* Select the best mode to be populated as top and left nbr depending on the
1887
                        4tu and 1tu cost */
1888
42.7k
                        if(ps_cu_node->ps_parent->au4_best_cost_4tu[0] >
1889
42.7k
                           ps_cu_node->ps_parent->au4_best_cost_1tu[0])
1890
4.09k
                        {
1891
4.09k
                            ps_cu_node->ps_parent->best_mode =
1892
4.09k
                                ps_cu_node->ps_parent->au1_best_mode_1tu[0];
1893
4.09k
                        }
1894
38.6k
                        else
1895
38.6k
                        {
1896
38.6k
                            ps_cu_node->ps_parent->best_mode =
1897
38.6k
                                ps_cu_node->ps_parent->au1_best_mode_4tu[0];
1898
38.6k
                        }
1899
1900
                        /* store the 16x16 cost */
1901
42.7k
                        *pi4_intra_16_cost = parent_cost;
1902
1903
                        /* accumulate the 32x32 cost */
1904
42.7k
                        if(MAX_INTRA_COST_IPE == *pi4_intra_32_cost)
1905
10.8k
                        {
1906
10.8k
                            *pi4_intra_32_cost = parent_cost;
1907
10.8k
                        }
1908
31.8k
                        else
1909
31.8k
                        {
1910
31.8k
                            *pi4_intra_32_cost += parent_cost;
1911
31.8k
                        }
1912
1913
                        /* set the CU valid flag */
1914
42.7k
                        ps_intra16_analyse->b1_valid_cu = 1;
1915
1916
                        /* storing the modes to intra 16 analyse */
1917
42.7k
                        {
1918
                            /* store the best 16x16 modes 16x16 tu */
1919
42.7k
                            memcpy(
1920
42.7k
                                &ps_intra16_analyse->au1_best_modes_16x16_tu[0],
1921
42.7k
                                &ps_cu_node->ps_parent->au1_best_mode_1tu[0],
1922
42.7k
                                sizeof(UWORD8) * NUM_BEST_MODES);
1923
42.7k
                            ps_intra16_analyse->au1_best_modes_16x16_tu[NUM_BEST_MODES] = 255;
1924
1925
                            /* store the best 16x16 modes 8x8 tu */
1926
42.7k
                            memcpy(
1927
42.7k
                                &ps_intra16_analyse->au1_best_modes_8x8_tu[0],
1928
42.7k
                                &ps_cu_node->ps_parent->au1_best_mode_4tu[0],
1929
42.7k
                                sizeof(UWORD8) * NUM_BEST_MODES);
1930
42.7k
                            ps_intra16_analyse->au1_best_modes_8x8_tu[NUM_BEST_MODES] = 255;
1931
42.7k
                        }
1932
1933
42.7k
                        parent_best_mode = ps_cu_node->ps_parent->best_mode;
1934
42.7k
                        if(parent_cost <=
1935
42.7k
                           child_cost_least + (ps_ctxt->i4_ol_satd_lambda * CHILD_BIAS >>
1936
42.7k
                                               LAMBDA_Q_SHIFT))  //|| identical_modes)
1937
29.5k
                        {
1938
29.5k
                            WORD32 i4_q_scale_q3_mod;
1939
29.5k
                            WORD8 i1_cu_possible_qp;
1940
29.5k
                            WORD32 i4_act_factor;
1941
                            //choose parent CU
1942
1943
29.5k
                            ihevce_update_cand_list(ps_cu_node->ps_parent, ps_ed_blk_l1, ps_ctxt);
1944
1945
                            /* set the 16x16 non split flag */
1946
29.5k
                            ps_intra16_analyse->b1_split_flag = 0;
1947
1948
                            /*As 16*16 has won, pick L1 8x8 qp which maps
1949
                            to L0 16x16 Qp*/
1950
29.5k
                            ASSERT(((blk_cnt >> 4) & 3) == (blk_cnt >> 4));
1951
29.5k
                            ASSERT(ps_ed_ctb_l1->i4_16x16_satd[blk_cnt >> 4][0] != -2);
1952
29.5k
                            i1_cu_possible_qp = ihevce_cu_level_qp_mod(
1953
29.5k
                                ps_ctxt->i4_qscale,
1954
29.5k
                                ps_ed_ctb_l1->i4_16x16_satd[blk_cnt >> 4][0],
1955
29.5k
                                ps_ctxt->ld_curr_frame_8x8_log_avg[0],
1956
29.5k
                                f_strength,
1957
29.5k
                                &i4_act_factor,
1958
29.5k
                                &i4_q_scale_q3_mod,
1959
29.5k
                                ps_ctxt->ps_rc_quant_ctxt);
1960
1961
                            /* cost accumalation of best cu size candiate */
1962
29.5k
                            i8_frame_acc_satd_cost += parent_cost;
1963
1964
                            /* satd and mpm bits accumalation of best cu size candiate */
1965
29.5k
                            i4_ctb_acc_satd += ps_cu_node->ps_parent->best_satd;
1966
1967
                            /*satd/mod_qp accumulation of best cu */
1968
29.5k
                            i8_frame_acc_satd_by_modqp_q10 +=
1969
29.5k
                                ((LWORD64)ps_cu_node->ps_parent->best_satd
1970
29.5k
                                 << (SATD_BY_ACT_Q_FAC + QSCALE_Q_FAC_3)) /
1971
29.5k
                                i4_q_scale_q3_mod;
1972
1973
                            /* Accumalate mode bits for all child blocks */
1974
29.5k
                            i8_frame_acc_mode_bits_cost += ps_cu_node->ps_parent->u2_mode_bits_cost;
1975
1976
29.5k
                            blk_cnt += 4;
1977
29.5k
                            ps_ed_blk_l1 += 4;
1978
                            //ps_row_cu++;
1979
29.5k
                        }
1980
13.1k
                        else
1981
13.1k
                        {
1982
                            //choose child CU
1983
13.1k
                            WORD8 i1_cu_possible_qp;
1984
13.1k
                            WORD32 i4_act_factor;
1985
13.1k
                            WORD32 i4_q_scale_q3_mod;
1986
1987
13.1k
                            ASSERT(((blk_cnt >> 2) & 0xF) == (blk_cnt >> 2));
1988
13.1k
                            ASSERT(ps_ed_ctb_l1->i4_8x8_satd[blk_cnt >> 2][1] != -2);
1989
13.1k
                            i1_cu_possible_qp = ihevce_cu_level_qp_mod(
1990
13.1k
                                ps_ctxt->i4_qscale,
1991
13.1k
                                ps_ed_ctb_l1->i4_8x8_satd[blk_cnt >> 2][1],
1992
13.1k
                                ps_ctxt->ld_curr_frame_8x8_log_avg[1],
1993
13.1k
                                f_strength,
1994
13.1k
                                &i4_act_factor,
1995
13.1k
                                &i4_q_scale_q3_mod,
1996
13.1k
                                ps_ctxt->ps_rc_quant_ctxt);
1997
1998
                            /* set the 16x16 split flag */
1999
13.1k
                            ps_intra16_analyse->b1_split_flag = 1;
2000
2001
65.9k
                            for(j = 0; j < 4; j++)
2002
52.7k
                            {
2003
52.7k
                                ihevce_update_cand_list(
2004
52.7k
                                    ps_cu_node->ps_sub_cu[j], ps_ed_blk_l1, ps_ctxt);
2005
2006
52.7k
                                if((IHEVCE_QUALITY_P3 > i4_quality_preset))
2007
24.6k
                                {
2008
24.6k
                                    WORD32 k;
2009
24.6k
                                    intra8_analyse_t *ps_intra8_analyse;
2010
24.6k
                                    ps_intra8_analyse = &ps_intra16_analyse->as_intra8_analyse[j];
2011
2012
123k
                                    for(k = 0; k < 4; k++)
2013
98.6k
                                    {
2014
                                        /* Populate best 3 nxn modes */
2015
98.6k
                                        ps_intra8_analyse->au1_4x4_best_modes[k][0] =
2016
98.6k
                                            ps_cu_node->ps_sub_cu[j]->au1_best_mode_4tu[0];
2017
98.6k
                                        ps_intra8_analyse->au1_4x4_best_modes[k][1] =
2018
98.6k
                                            ps_cu_node->ps_sub_cu[j]
2019
98.6k
                                                ->au1_best_mode_4tu[1];  //(ps_ed + 1)->best_mode;
2020
98.6k
                                        ps_intra8_analyse->au1_4x4_best_modes[k][2] =
2021
98.6k
                                            ps_cu_node->ps_sub_cu[j]
2022
98.6k
                                                ->au1_best_mode_4tu[2];  //(ps_ed + 2)->best_mode;
2023
98.6k
                                        ps_intra8_analyse->au1_4x4_best_modes[k][3] = 255;
2024
98.6k
                                    }
2025
24.6k
                                }
2026
                                /*accum satd/qp for all child block*/
2027
52.7k
                                i8_frame_acc_satd_by_modqp_q10 +=
2028
52.7k
                                    ((LWORD64)child_satd[j]
2029
52.7k
                                     << (SATD_BY_ACT_Q_FAC + QSCALE_Q_FAC_3)) /
2030
52.7k
                                    i4_q_scale_q3_mod;
2031
2032
                                /* Accumalate mode bits for all child blocks */
2033
52.7k
                                i8_frame_acc_mode_bits_cost +=
2034
52.7k
                                    ps_cu_node->ps_sub_cu[j]->u2_mode_bits_cost;
2035
2036
                                /* satd and mpm bits accumalation of best cu size candiate */
2037
52.7k
                                i4_ctb_acc_satd += child_satd[j];
2038
2039
52.7k
                                blk_cnt += 1;
2040
52.7k
                                ps_ed_blk_l1 += 1;
2041
                                //ps_row_cu++;
2042
52.7k
                            }
2043
2044
                            /* cost accumalation of best cu size candiate */
2045
13.1k
                            i8_frame_acc_satd_cost += child_cost_least;
2046
13.1k
                        }
2047
2048
42.7k
                    }  //else of EIID
2049
45.1k
#endif
2050
45.1k
                }  // if(merge_16x16_l1)
2051
                /* MAX CU SIZE 8x8 */
2052
61.3k
                else
2053
61.3k
                {
2054
#if IP_DBG_L1_l2
2055
                    for(i = 0; i < 4; i++)
2056
                    {
2057
                        ps_cu_node->ps_parent->u1_cu_size = 8;
2058
                        ps_cu_node->ps_parent->u2_x0 =
2059
                            gau1_cu_pos_x[blk_cnt]; /* Populate properly */
2060
                        ps_cu_node->ps_parent->u2_y0 =
2061
                            gau1_cu_pos_y[blk_cnt]; /* Populate properly */
2062
                        ps_cu_node->ps_parent->best_mode = ps_ed_blk_l1->best_mode;
2063
2064
                        ihevce_update_cand_list(ps_cu_node->ps_parent, ps_ed_blk_l1, ps_ctxt);
2065
                        blk_cnt++;
2066
                        ps_ed_blk_l1++;
2067
                        ps_row_cu++;
2068
                        merge_64x64 = 0;
2069
                    }
2070
#else
2071
2072
                    /* EIID: Skip all 4 8x8 block if L1 decisions says skip intra */
2073
61.3k
                    if(ps_ed_blk_l1->intra_or_inter == 2 && (ps_ctxt->i4_slice_type != ISLICE))
2074
3.47k
                    {
2075
3.47k
                        WORD32 i4_q_scale_q3_mod;
2076
3.47k
                        WORD8 i1_cu_possible_qp;
2077
3.47k
                        WORD32 i4_act_factor;
2078
2079
3.47k
                        merge_64x64 = 0;
2080
2081
3.47k
                        ps_intra32_analyse->b1_merge_flag = 0;
2082
2083
3.47k
                        ps_intra16_analyse->au1_best_modes_8x8_tu[0] = 255;
2084
3.47k
                        ps_intra16_analyse->au1_best_modes_8x8_tu[1] = 255;
2085
3.47k
                        ps_intra16_analyse->au1_best_modes_8x8_tu[2] = 255;
2086
2087
3.47k
                        ps_intra16_analyse->au1_best_modes_16x16_tu[0] = 255;
2088
3.47k
                        ps_intra16_analyse->au1_best_modes_16x16_tu[1] = 255;
2089
3.47k
                        ps_intra16_analyse->au1_best_modes_16x16_tu[2] = 255;
2090
3.47k
                        ps_intra16_analyse->b1_split_flag = 1;
2091
3.47k
                        ps_intra16_analyse->b1_valid_cu = 0;
2092
3.47k
                        ps_intra16_analyse->b1_merge_flag = 0;
2093
2094
17.3k
                        for(i = 0; i < 4; i++)
2095
13.8k
                        {
2096
13.8k
                            intra8_analyse_t *ps_intra8_analyse;
2097
13.8k
                            WORD32 ctr_sub_cu;
2098
2099
13.8k
                            cu_pos_x = gau1_cu_pos_x[blk_cnt];
2100
13.8k
                            cu_pos_y = gau1_cu_pos_y[blk_cnt];
2101
2102
13.8k
                            if((cu_pos_x < num_8x8_blks_x) && (cu_pos_y < num_8x8_blks_y))
2103
13.2k
                            {
2104
13.2k
                                ps_intra8_analyse = &ps_intra16_analyse->as_intra8_analyse[i];
2105
2106
13.2k
                                ps_intra8_analyse->b1_valid_cu = 0;
2107
13.2k
                                ps_intra8_analyse->b1_enable_nxn = 0;
2108
13.2k
                                ps_intra8_analyse->au1_4x4_best_modes[0][0] = 255;
2109
13.2k
                                ps_intra8_analyse->au1_4x4_best_modes[1][0] = 255;
2110
13.2k
                                ps_intra8_analyse->au1_4x4_best_modes[2][0] = 255;
2111
13.2k
                                ps_intra8_analyse->au1_4x4_best_modes[3][0] = 255;
2112
13.2k
                                ps_intra8_analyse->au1_best_modes_4x4_tu[0] = 255;
2113
13.2k
                                ps_intra8_analyse->au1_best_modes_8x8_tu[0] = 255;
2114
2115
13.2k
                                ps_cu_node->ps_parent->u1_cu_size = 8;
2116
13.2k
                                ps_cu_node->ps_parent->u2_x0 =
2117
13.2k
                                    gau1_cu_pos_x[blk_cnt]; /* Populate properly */
2118
13.2k
                                ps_cu_node->ps_parent->u2_y0 =
2119
13.2k
                                    gau1_cu_pos_y[blk_cnt]; /* Populate properly */
2120
13.2k
                                ps_cu_node->ps_parent->best_mode =
2121
13.2k
                                    INTRA_DC;  //ps_ed_blk_l1->best_mode;
2122
2123
                                /* fill in the first modes as invalid */
2124
2125
13.2k
                                ps_cu_node->ps_parent->au1_best_mode_1tu[0] = INTRA_DC;
2126
13.2k
                                ps_cu_node->ps_parent->au1_best_mode_1tu[1] =
2127
13.2k
                                    INTRA_DC;  //for safery. Since update_cand_list will set num_modes as 3
2128
13.2k
                                ps_cu_node->ps_parent->au1_best_mode_1tu[2] = INTRA_DC;
2129
2130
13.2k
                                ps_cu_node->ps_parent->au1_best_mode_4tu[0] = INTRA_DC;
2131
13.2k
                                ps_cu_node->ps_parent->au1_best_mode_4tu[1] = INTRA_DC;
2132
13.2k
                                ps_cu_node->ps_parent->au1_best_mode_4tu[2] = INTRA_DC;
2133
2134
13.2k
                                ihevce_update_cand_list(
2135
13.2k
                                    ps_cu_node->ps_parent, ps_ed_blk_l1, ps_ctxt);
2136
2137
                                //ps_row_cu->s_cu_intra_cand.b6_num_intra_cands = 0;
2138
                                //ps_row_cu->u1_num_intra_rdopt_cands = 0;
2139
2140
66.0k
                                for(ctr_sub_cu = 0; ctr_sub_cu < 4; ctr_sub_cu++)
2141
52.8k
                                {
2142
52.8k
                                    ps_cu_node->ps_sub_cu[ctr_sub_cu]->au1_best_mode_1tu[0] =
2143
52.8k
                                        INTRA_DC;
2144
52.8k
                                    ps_cu_node->ps_sub_cu[ctr_sub_cu]->au1_best_mode_4tu[0] =
2145
52.8k
                                        INTRA_DC;
2146
52.8k
                                    ps_cu_node->ps_sub_cu[ctr_sub_cu]->au4_best_cost_1tu[0] =
2147
52.8k
                                        MAX_INTRA_COST_IPE;
2148
2149
52.8k
                                    ps_cu_node->ps_sub_cu[ctr_sub_cu]->au4_best_cost_4tu[0] =
2150
52.8k
                                        MAX_INTRA_COST_IPE;
2151
52.8k
                                    ps_cu_node->ps_sub_cu[ctr_sub_cu]->best_cost =
2152
52.8k
                                        MAX_INTRA_COST_IPE;
2153
52.8k
                                }
2154
2155
13.2k
                                pi4_intra_8_cost[(i & 1) + (MAX_CU_IN_CTB_ROW * (i >> 1))] =
2156
13.2k
                                    MAX_INTRA_COST_IPE;
2157
2158
13.2k
                                ASSERT(((blk_cnt >> 2) & 0xF) == (blk_cnt >> 2));
2159
13.2k
                                ASSERT(ps_ed_ctb_l1->i4_8x8_satd[(blk_cnt >> 2)][1] != -2);
2160
13.2k
                                i1_cu_possible_qp = ihevce_cu_level_qp_mod(
2161
13.2k
                                    ps_ctxt->i4_qscale,
2162
13.2k
                                    ps_ed_ctb_l1->i4_8x8_satd[(blk_cnt >> 2)][1],
2163
13.2k
                                    ps_ctxt->ld_curr_frame_8x8_log_avg[1],
2164
13.2k
                                    f_strength,
2165
13.2k
                                    &i4_act_factor,
2166
13.2k
                                    &i4_q_scale_q3_mod,
2167
13.2k
                                    ps_ctxt->ps_rc_quant_ctxt);
2168
2169
                                /* set neighbours even if intra is not evaluated, since source is always available. */
2170
13.2k
                                ihevce_set_nbr_map(
2171
13.2k
                                    ps_ctxt->pu1_ctb_nbr_map,
2172
13.2k
                                    ps_ctxt->i4_nbr_map_strd,
2173
13.2k
                                    ps_cu_node->ps_parent->u2_x0 << 1,
2174
13.2k
                                    ps_cu_node->ps_parent->u2_y0 << 1,
2175
13.2k
                                    (ps_cu_node->ps_parent->u1_cu_size >> 2),
2176
13.2k
                                    1);
2177
2178
                                //ps_row_cu++;
2179
13.2k
                            }
2180
13.8k
                            blk_cnt++;
2181
13.8k
                            ps_ed_blk_l1++;
2182
13.8k
                        }
2183
3.47k
                    }
2184
57.8k
                    else
2185
57.8k
                    {
2186
                        //cu_intra_cand_t *ps_cu_intra_cand;
2187
57.8k
                        WORD8 i1_cu_possible_qp;
2188
57.8k
                        WORD32 i4_act_factor;
2189
57.8k
                        WORD32 i4_q_scale_q3_mod;
2190
2191
57.8k
                        ASSERT(((blk_cnt >> 2) & 0xF) == (blk_cnt >> 2));
2192
57.8k
                        ASSERT(ps_ed_ctb_l1->i4_8x8_satd[(blk_cnt >> 2)][1] != -2);
2193
57.8k
                        i1_cu_possible_qp = ihevce_cu_level_qp_mod(
2194
57.8k
                            ps_ctxt->i4_qscale,
2195
57.8k
                            ps_ed_ctb_l1->i4_8x8_satd[(blk_cnt >> 2)][1],
2196
57.8k
                            ps_ctxt->ld_curr_frame_8x8_log_avg[1],
2197
57.8k
                            f_strength,
2198
57.8k
                            &i4_act_factor,
2199
57.8k
                            &i4_q_scale_q3_mod,
2200
57.8k
                            ps_ctxt->ps_rc_quant_ctxt);
2201
2202
                        /* 64x64 merge is not possible */
2203
57.8k
                        merge_64x64 = 0;
2204
2205
57.8k
                        ps_intra32_analyse->b1_merge_flag = 0;
2206
2207
57.8k
                        ps_intra16_analyse->b1_merge_flag = 0;
2208
2209
                        /* by default 16x16 modes are set to default values DC and Planar */
2210
57.8k
                        ps_intra16_analyse->au1_best_modes_8x8_tu[0] = 0;
2211
57.8k
                        ps_intra16_analyse->au1_best_modes_8x8_tu[1] = 1;
2212
57.8k
                        ps_intra16_analyse->au1_best_modes_8x8_tu[2] = 255;
2213
2214
57.8k
                        ps_intra16_analyse->au1_best_modes_16x16_tu[0] = 0;
2215
57.8k
                        ps_intra16_analyse->au1_best_modes_16x16_tu[1] = 1;
2216
57.8k
                        ps_intra16_analyse->au1_best_modes_16x16_tu[2] = 255;
2217
57.8k
                        ps_intra16_analyse->b1_split_flag = 1;
2218
57.8k
                        ps_intra16_analyse->b1_valid_cu = 1;
2219
2220
289k
                        for(i = 0; i < 4; i++)
2221
231k
                        {
2222
231k
                            intra8_analyse_t *ps_intra8_analyse;
2223
231k
                            cu_pos_x = gau1_cu_pos_x[blk_cnt];
2224
231k
                            cu_pos_y = gau1_cu_pos_y[blk_cnt];
2225
231k
                            if((cu_pos_x < num_8x8_blks_x) && (cu_pos_y < num_8x8_blks_y))
2226
208k
                            {
2227
                                //ps_cu_intra_cand = &ps_row_cu->s_cu_intra_cand;
2228
                                //ps_cu_node->ps_parent->best_cost = MAX_INTRA_COST_IPE;
2229
2230
                                //ps_cu_node->ps_parent->best_mode = ps_ed_blk_l1->best_mode;
2231
2232
208k
                                child_cost_least = 0;
2233
2234
208k
                                ps_intra8_analyse = &ps_intra16_analyse->as_intra8_analyse[i];
2235
208k
                                ps_cu_node->ps_parent->u1_cu_size = 8;
2236
208k
                                ps_cu_node->ps_parent->u2_x0 =
2237
208k
                                    gau1_cu_pos_x[blk_cnt]; /* Populate properly */
2238
208k
                                ps_cu_node->ps_parent->u2_y0 =
2239
208k
                                    gau1_cu_pos_y[blk_cnt]; /* Populate properly */
2240
2241
                                //memcpy(ps_ctxt->ai1_ctb_mode_map_temp, ps_ctxt->ai1_ctb_mode_map, sizeof(ps_ctxt->ai1_ctb_mode_map));
2242
2243
                                /*EARLY DECISION 8x8 block */
2244
208k
                                ihevce_pu_calc_8x8_blk(
2245
208k
                                    ps_curr_src, ps_ctxt, ps_cu_node, ps_ctxt->ps_func_selector);
2246
1.04M
                                for(j = 0; j < 4; j++)
2247
832k
                                {
2248
832k
                                    child_cost_least += ps_cu_node->ps_sub_cu[j]->best_cost;
2249
832k
                                    child_satd[j] = ps_cu_node->ps_sub_cu[j]->best_satd;
2250
832k
                                }
2251
2252
                                /* Based on the flag, CU = 4TU modes decision can be disabled, CU = 4PU is retained */
2253
208k
                                if(0 == ps_ctxt->u1_disable_child_cu_decide)
2254
208k
                                {
2255
208k
                                    ihevce_set_nbr_map(
2256
208k
                                        ps_ctxt->pu1_ctb_nbr_map,
2257
208k
                                        ps_ctxt->i4_nbr_map_strd,
2258
208k
                                        ps_cu_node->ps_parent->u2_x0 << 1,
2259
208k
                                        ps_cu_node->ps_parent->u2_y0 << 1,
2260
208k
                                        (ps_cu_node->ps_parent->u1_cu_size >> 2),
2261
208k
                                        0);
2262
2263
                                    //memcpy(ps_ctxt->ai1_ctb_mode_map_temp, ps_ctxt->ai1_ctb_mode_map, sizeof(ps_ctxt->ai1_ctb_mode_map));
2264
2265
                                    /* Eval for TUSize = CuSize */
2266
208k
                                    ihevce_mode_eval_filtering(
2267
208k
                                        ps_cu_node->ps_parent,
2268
208k
                                        ps_cu_node,
2269
208k
                                        ps_ctxt,
2270
208k
                                        ps_curr_src,
2271
208k
                                        26,
2272
208k
                                        &ps_cu_node->ps_parent->au4_best_cost_1tu[0],
2273
208k
                                        &ps_cu_node->ps_parent->au1_best_mode_1tu[0],
2274
208k
                                        step2_bypass,
2275
208k
                                        1);
2276
2277
208k
                                    if(i4_enable_1cu_4tu)
2278
102k
                                    {
2279
                                        /* Eval for TUSize = CuSize/2 */
2280
102k
                                        ihevce_mode_eval_filtering(
2281
102k
                                            ps_cu_node->ps_parent,
2282
102k
                                            ps_cu_node,
2283
102k
                                            ps_ctxt,
2284
102k
                                            ps_curr_src,
2285
102k
                                            26,
2286
102k
                                            &ps_cu_node->ps_parent->au4_best_cost_4tu[0],
2287
102k
                                            &ps_cu_node->ps_parent->au1_best_mode_4tu[0],
2288
102k
                                            step2_bypass,
2289
102k
                                            0);
2290
102k
                                    }
2291
105k
                                    else
2292
105k
                                    {
2293
                                        /* 4TU not evaluated :  4tu modes set same as 1tu modes */
2294
105k
                                        memcpy(
2295
105k
                                            &ps_cu_node->ps_parent->au1_best_mode_4tu[0],
2296
105k
                                            &ps_cu_node->ps_parent->au1_best_mode_1tu[0],
2297
105k
                                            NUM_BEST_MODES);
2298
2299
                                        /* 4TU not evaluated : currently 4tu cost set same as 1tu cost */
2300
105k
                                        memcpy(
2301
105k
                                            &ps_cu_node->ps_parent->au4_best_cost_4tu[0],
2302
105k
                                            &ps_cu_node->ps_parent->au4_best_cost_1tu[0],
2303
105k
                                            NUM_BEST_MODES * sizeof(WORD32));
2304
105k
                                    }
2305
2306
                                    /* Update parent cost */
2307
208k
                                    parent_cost =
2308
208k
                                        MIN(ps_cu_node->ps_parent->au4_best_cost_4tu[0],
2309
208k
                                            ps_cu_node->ps_parent->au4_best_cost_1tu[0]);
2310
2311
                                    /* Select the best mode to be populated as top and left nbr depending on the
2312
                            4tu and 1tu cost */
2313
208k
                                    if(ps_cu_node->ps_parent->au4_best_cost_4tu[0] >
2314
208k
                                       ps_cu_node->ps_parent->au4_best_cost_1tu[0])
2315
30.3k
                                    {
2316
30.3k
                                        ps_cu_node->ps_parent->best_mode =
2317
30.3k
                                            ps_cu_node->ps_parent->au1_best_mode_1tu[0];
2318
30.3k
                                    }
2319
177k
                                    else
2320
177k
                                    {
2321
177k
                                        ps_cu_node->ps_parent->best_mode =
2322
177k
                                            ps_cu_node->ps_parent->au1_best_mode_4tu[0];
2323
177k
                                    }
2324
208k
                                }
2325
2326
                                /* set the CU valid flag */
2327
208k
                                ps_intra8_analyse->b1_valid_cu = 1;
2328
208k
                                ps_intra8_analyse->b1_enable_nxn = 0;
2329
2330
                                /* storing the modes to intra 8 analyse */
2331
2332
                                /* store the best 8x8 modes 8x8 tu */
2333
208k
                                memcpy(
2334
208k
                                    &ps_intra8_analyse->au1_best_modes_8x8_tu[0],
2335
208k
                                    &ps_cu_node->ps_parent->au1_best_mode_1tu[0],
2336
208k
                                    sizeof(UWORD8) * (NUM_BEST_MODES));
2337
208k
                                ps_intra8_analyse->au1_best_modes_8x8_tu[NUM_BEST_MODES] = 255;
2338
2339
                                /* store the best 8x8 modes 4x4 tu */
2340
208k
                                memcpy(
2341
208k
                                    &ps_intra8_analyse->au1_best_modes_4x4_tu[0],
2342
208k
                                    &ps_cu_node->ps_parent->au1_best_mode_4tu[0],
2343
208k
                                    sizeof(UWORD8) * (NUM_BEST_MODES));
2344
208k
                                ps_intra8_analyse->au1_best_modes_4x4_tu[NUM_BEST_MODES] = 255;
2345
2346
                                /*As 8*8 has won, pick L1 4x4 qp which is equal to
2347
                                L1 8x8 Qp*/
2348
                                //ps_row_cu->u1_cu_possible_qp[0] = u1_cu_possible_qp;
2349
                                //ps_row_cu->i4_act_factor[0][1] = i4_act_factor;
2350
2351
208k
                                parent_best_mode = ps_cu_node->ps_parent->best_mode;
2352
208k
                                if(parent_cost <=
2353
208k
                                   child_cost_least +
2354
208k
                                       (ps_ctxt->i4_ol_satd_lambda * CHILD_BIAS >> LAMBDA_Q_SHIFT))
2355
69.8k
                                {
2356
                                    /*CU = 4TU */
2357
69.8k
                                    ihevce_update_cand_list(
2358
69.8k
                                        ps_cu_node->ps_parent, ps_ed_blk_l1, ps_ctxt);
2359
2360
                                    /* store the child 8x8 costs */
2361
69.8k
                                    pi4_intra_8_cost[(i & 1) + (MAX_CU_IN_CTB_ROW * (i >> 1))] =
2362
69.8k
                                        parent_cost;
2363
2364
                                    /* cost accumalation of best cu size candiate */
2365
69.8k
                                    i8_frame_acc_satd_cost += parent_cost;
2366
2367
                                    /*satd/mod_qp accumulation of best cu */
2368
69.8k
                                    i8_frame_acc_satd_by_modqp_q10 +=
2369
69.8k
                                        ((LWORD64)ps_cu_node->ps_parent->best_satd
2370
69.8k
                                         << (SATD_BY_ACT_Q_FAC + QSCALE_Q_FAC_3)) /
2371
69.8k
                                        i4_q_scale_q3_mod;
2372
2373
                                    /* Accumalate mode bits for all child blocks */
2374
69.8k
                                    i8_frame_acc_mode_bits_cost +=
2375
69.8k
                                        ps_cu_node->ps_parent->u2_mode_bits_cost;
2376
2377
                                    /* satd and mpm bits accumalation of best cu size candiate */
2378
69.8k
                                    i4_ctb_acc_satd += ps_cu_node->ps_parent->best_satd;
2379
2380
                                    /* accumulate the 16x16 cost*/
2381
69.8k
                                    if(MAX_INTRA_COST_IPE == *pi4_intra_16_cost)
2382
18.8k
                                    {
2383
18.8k
                                        *pi4_intra_16_cost = parent_cost;
2384
18.8k
                                    }
2385
51.0k
                                    else
2386
51.0k
                                    {
2387
51.0k
                                        *pi4_intra_16_cost += parent_cost;
2388
51.0k
                                    }
2389
2390
                                    /* accumulate the 32x32 cost*/
2391
69.8k
                                    if(MAX_INTRA_COST_IPE == *pi4_intra_32_cost)
2392
6.50k
                                    {
2393
6.50k
                                        *pi4_intra_32_cost = parent_cost;
2394
6.50k
                                    }
2395
63.3k
                                    else
2396
63.3k
                                    {
2397
63.3k
                                        *pi4_intra_32_cost += parent_cost;
2398
63.3k
                                    }
2399
69.8k
                                }
2400
138k
                                else
2401
138k
                                {
2402
                                    /*CU = 4PU*/
2403
                                    //ps_row_cu->b3_cu_pos_x = (UWORD8) ps_cu_node->ps_parent->u2_x0;
2404
                                    //ps_row_cu->b3_cu_pos_y = (UWORD8) ps_cu_node->ps_parent->u2_y0;
2405
                                    //ps_row_cu->u1_cu_size  = ps_cu_node->ps_parent->u1_cu_size;
2406
2407
                                    /* store the child 8x8 costs woth 4x4 pu summed cost */
2408
138k
                                    pi4_intra_8_cost[(i & 1) + (MAX_CU_IN_CTB_ROW * (i >> 1))] =
2409
138k
                                        (child_cost_least);
2410
2411
                                    /* accumulate the 16x16 cost*/
2412
138k
                                    if(MAX_INTRA_COST_IPE == *pi4_intra_16_cost)
2413
39.0k
                                    {
2414
39.0k
                                        *pi4_intra_16_cost = child_cost_least;
2415
39.0k
                                    }
2416
99.1k
                                    else
2417
99.1k
                                    {
2418
99.1k
                                        *pi4_intra_16_cost += child_cost_least;
2419
99.1k
                                    }
2420
2421
                                    /* cost accumalation of best cu size candiate */
2422
138k
                                    i8_frame_acc_satd_cost += child_cost_least;
2423
2424
691k
                                    for(j = 0; j < 4; j++)
2425
552k
                                    {
2426
                                        /*satd/qp accumualtion*/
2427
552k
                                        i8_frame_acc_satd_by_modqp_q10 +=
2428
552k
                                            ((LWORD64)child_satd[j]
2429
552k
                                             << (SATD_BY_ACT_Q_FAC + QSCALE_Q_FAC_3)) /
2430
552k
                                            i4_q_scale_q3_mod;
2431
2432
                                        /* Accumalate mode bits for all child blocks */
2433
552k
                                        i8_frame_acc_mode_bits_cost +=
2434
552k
                                            ps_cu_node->ps_sub_cu[j]->u2_mode_bits_cost;
2435
2436
                                        /* satd and mpm bits accumalation of best cu size candiate */
2437
552k
                                        i4_ctb_acc_satd += child_satd[j];
2438
552k
                                    }
2439
2440
                                    /* accumulate the 32x32 cost*/
2441
138k
                                    if(MAX_INTRA_COST_IPE == *pi4_intra_32_cost)
2442
12.2k
                                    {
2443
12.2k
                                        *pi4_intra_32_cost = child_cost_least;
2444
12.2k
                                    }
2445
125k
                                    else
2446
125k
                                    {
2447
125k
                                        *pi4_intra_32_cost += child_cost_least;
2448
125k
                                    }
2449
2450
138k
                                    ps_intra8_analyse->b1_enable_nxn = 1;
2451
2452
                                    /* Insert the best 8x8 modes unconditionally */
2453
2454
138k
                                    x = ((ps_cu_node->u2_x0 << 3) >> 2) + 1;
2455
138k
                                    y = ((ps_cu_node->u2_y0 << 3) >> 2) + 1;
2456
138k
                                    size = ps_cu_node->u1_cu_size >> 2;
2457
2458
138k
                                    ps_ctxt->au1_ctb_mode_map[y][x] =
2459
138k
                                        ps_cu_node->ps_sub_cu[0]->best_mode;
2460
138k
                                    ps_ctxt->au1_ctb_mode_map[y][x + 1] =
2461
138k
                                        ps_cu_node->ps_sub_cu[1]->best_mode;
2462
138k
                                    ps_ctxt->au1_ctb_mode_map[y + 1][x] =
2463
138k
                                        ps_cu_node->ps_sub_cu[2]->best_mode;
2464
138k
                                    ps_ctxt->au1_ctb_mode_map[y + 1][x + 1] =
2465
138k
                                        ps_cu_node->ps_sub_cu[3]->best_mode;
2466
138k
                                }
2467
                                /* NXN mode population */
2468
1.04M
                                for(j = 0; j < 4; j++)
2469
832k
                                {
2470
832k
                                    cand_mode_list[0] =
2471
832k
                                        ps_cu_node->ps_sub_cu[j]->au1_best_mode_1tu[0];
2472
832k
                                    cand_mode_list[1] =
2473
832k
                                        ps_cu_node->ps_sub_cu[j]->au1_best_mode_1tu[1];
2474
832k
                                    cand_mode_list[2] =
2475
832k
                                        ps_cu_node->ps_sub_cu[j]->au1_best_mode_1tu[2];
2476
2477
832k
                                    if(1)
2478
832k
                                    {
2479
                                        /* Populate best 3 nxn modes */
2480
832k
                                        ps_intra8_analyse->au1_4x4_best_modes[j][0] =
2481
832k
                                            cand_mode_list[0];
2482
832k
                                        ps_intra8_analyse->au1_4x4_best_modes[j][1] =
2483
832k
                                            cand_mode_list[1];  //(ps_ed + 1)->best_mode;
2484
832k
                                        ps_intra8_analyse->au1_4x4_best_modes[j][2] =
2485
832k
                                            cand_mode_list[2];  //(ps_ed + 2)->best_mode;
2486
832k
                                        ps_intra8_analyse->au1_4x4_best_modes[j][3] = 255;
2487
2488
                                        //memcpy(ps_intra8_analyse->au1_4x4_best_modes[j], ps_row_cu->s_cu_intra_cand.au1_intra_luma_modes_nxn[j], 4);
2489
832k
                                    }
2490
                                    /* For HQ, all 35 modes to be used for RDOPT, removed from here for memory clean-up */
2491
2492
0
                                    else /* IHEVCE_QUALITY_P0 == i4_quality_preset */
2493
0
                                    {
2494
                                        /* To indicate to enc loop that NXN is enabled in HIGH QUALITY fior CU 8x8*/
2495
0
                                        ps_intra8_analyse->au1_4x4_best_modes[j][0] = 0;
2496
0
                                    }
2497
2498
832k
                                    ps_intra8_analyse
2499
832k
                                        ->au1_4x4_best_modes[j][MAX_INTRA_CU_CANDIDATES] = 255;
2500
832k
                                }
2501
2502
                                //ps_row_cu++;
2503
208k
                            }
2504
23.3k
                            else
2505
23.3k
                            {
2506
                                /* For Incomplete CTB, 16x16 is not valid */
2507
23.3k
                                ps_intra16_analyse->b1_valid_cu = 0;
2508
23.3k
                            }
2509
231k
                            blk_cnt++;
2510
231k
                            ps_ed_blk_l1++;
2511
231k
                        }
2512
                        //ps_ed_blk_l2 ++;
2513
57.8k
                    }  //else of EIID
2514
61.3k
#endif
2515
61.3k
                }
2516
127k
            }
2517
191k
            else
2518
191k
            {
2519
                /* For incomplete CTB, init valid CU to 0 */
2520
191k
                ps_ed_blk_l1++;
2521
191k
                ps_intra32_analyse->b1_valid_cu = 0;
2522
191k
                ps_intra16_analyse[0].b1_valid_cu = 0;
2523
191k
                blk_cnt++;
2524
191k
                merge_64x64 = 0;
2525
191k
            }
2526
319k
        } while(blk_cnt != MAX_CTB_SIZE);
2527
        /* if 64x64 merge is possible then check for 32x32 having same best modes */
2528
14.9k
        if(1 == merge_64x64)
2529
2.38k
        {
2530
2.38k
            WORD32 act_mode = au1_best_32x32_modes[0];
2531
2532
2.38k
            ps_ed_blk_l2 = ps_ed_l2_ctb;
2533
2.38k
            best_mode = ps_ed_blk_l2->best_mode;
2534
2.38k
            merge_64x64 =
2535
2.38k
                ((act_mode == au1_best_32x32_modes[0]) + (act_mode == au1_best_32x32_modes[1]) +
2536
2.38k
                     (act_mode == au1_best_32x32_modes[2]) +
2537
2.38k
                     (act_mode == au1_best_32x32_modes[3]) ==
2538
2.38k
                 4);
2539
2.38k
            if(merge_64x64 == 1)
2540
2.11k
                best_mode = au1_best_32x32_modes[0];
2541
271
            else
2542
271
                best_mode = ps_ed_blk_l2->best_mode;
2543
            /* All 32x32 costs are accumalated to 64x64 cost */
2544
2.38k
            ps_l0_ipe_out_ctb->i4_best64x64_intra_cost = 0;
2545
11.9k
            for(i = 0; i < 4; i++)
2546
9.53k
            {
2547
9.53k
                ps_l0_ipe_out_ctb->i4_best64x64_intra_cost +=
2548
9.53k
                    ps_l0_ipe_out_ctb->ai4_best32x32_intra_cost[i];
2549
9.53k
            }
2550
2551
            /* If all modes of 32x32 block is not same */
2552
2.38k
            if(0 == merge_64x64)
2553
271
            {
2554
                /*Compute CHILD cost for 32x32 */
2555
271
                WORD32 child_cost_64x64 = au4_best_32x32_cost[0] + au4_best_32x32_cost[1] +
2556
271
                                          au4_best_32x32_cost[2] + au4_best_32x32_cost[3];
2557
271
                WORD32 cost = MAX_INTRA_COST_IPE;
2558
2559
271
                WORD32 best_mode_temp = 0;
2560
                /*Compute 64x64 cost for each mode of 32x32*/
2561
1.35k
                for(i = 0; i < 4; i++)
2562
1.08k
                {
2563
1.08k
                    WORD32 mode = au1_best_32x32_modes[i];
2564
1.08k
                    if(mode < 2)
2565
580
                        mode = 26;
2566
1.08k
                    ps_cu_node->ps_parent->u1_cu_size = 64;
2567
1.08k
                    ps_cu_node->ps_parent->u2_x0 = gau1_cu_pos_x[0]; /* Populate properly */
2568
1.08k
                    ps_cu_node->ps_parent->u2_y0 = gau1_cu_pos_y[0]; /* Populate properly */
2569
2570
1.08k
                    ihevce_set_nbr_map(
2571
1.08k
                        ps_ctxt->pu1_ctb_nbr_map,
2572
1.08k
                        ps_ctxt->i4_nbr_map_strd,
2573
1.08k
                        (ps_cu_node->ps_parent->u2_x0 << 1),
2574
1.08k
                        (ps_cu_node->ps_parent->u2_y0 << 1),
2575
1.08k
                        (ps_cu_node->ps_parent->u1_cu_size >> 2),
2576
1.08k
                        0);
2577
2578
1.08k
                    ihevce_mode_eval_filtering(
2579
1.08k
                        ps_cu_node->ps_parent,
2580
1.08k
                        ps_cu_node,
2581
1.08k
                        ps_ctxt,
2582
1.08k
                        ps_curr_src,
2583
1.08k
                        mode,
2584
1.08k
                        &ps_cu_node->ps_parent->au4_best_cost_1tu[0],
2585
1.08k
                        &ps_cu_node->ps_parent->au1_best_mode_1tu[0],
2586
1.08k
                        !step2_bypass,
2587
1.08k
                        0);
2588
2589
1.08k
                    parent_cost = ps_cu_node->ps_parent->best_cost;
2590
1.08k
                    if(cost > parent_cost)
2591
273
                    {
2592
273
                        cost = parent_cost;
2593
273
                        best_mode_temp = ps_cu_node->ps_parent->best_mode;
2594
273
                    }
2595
1.08k
                }
2596
271
                if(cost < child_cost_64x64)
2597
147
                {
2598
147
                    merge_64x64 = 1;
2599
147
                    best_mode = best_mode_temp;
2600
2601
                    /* Update 64x64 cost if CU 64x64 is chosen  */
2602
147
                    ps_l0_ipe_out_ctb->i4_best64x64_intra_cost = cost;
2603
2604
                    /* Accumalate the least cost for CU 64x64 */
2605
147
                    i8_frame_acc_satd_cost = cost;
2606
147
                    i8_frame_acc_mode_bits_cost = ps_cu_node->ps_parent->u2_mode_bits_cost;
2607
2608
                    /* satd and mpm bits accumalation of best cu size candiate */
2609
147
                    i4_ctb_acc_satd = ps_cu_node->ps_parent->best_satd;
2610
147
                }
2611
271
            }
2612
2.38k
        }
2613
2614
14.9k
        if(merge_64x64)
2615
2.26k
        {
2616
2.26k
            WORD32 i, j;
2617
2.26k
            intra32_analyse_t *ps_intra32_analyse;
2618
2.26k
            intra16_analyse_t *ps_intra16_analyse;
2619
2.26k
            WORD32 row, col;
2620
2.26k
            WORD32 i4_q_scale_q3_mod;
2621
2.26k
            WORD8 i1_cu_possible_qp;
2622
2.26k
            WORD32 i4_act_factor;
2623
            //ps_row_cu = ps_curr_cu;
2624
2.26k
            ps_ctb_out->u4_cu_split_flags = 0x0;
2625
2.26k
            ps_ed_blk_l1 = ps_ed_l1_ctb;
2626
2.26k
            ps_ed_blk_l2 = ps_ed_l2_ctb;
2627
2628
2.26k
            ps_l0_ipe_out_ctb->u1_split_flag = 0;
2629
2630
            /* If CU size of 64x64 is chosen, disbale all the 16x16 flag*/
2631
11.3k
            for(i = 0; i < 4; i++)
2632
9.04k
            {
2633
                /* get the corresponding intra 32 analyse pointer  use (blk_cnt / 16) */
2634
                /* blk cnt is in terms of 8x8 units so a 32x32 will have 16 8x8 units */
2635
9.04k
                ps_intra32_analyse = &ps_l0_ipe_out_ctb->as_intra32_analyse[i];
2636
2637
45.2k
                for(j = 0; j < 4; j++)
2638
36.1k
                {
2639
                    /* get the corresponding intra 16 analyse pointer use (blk_cnt & 0xF / 4)*/
2640
                    /* blk cnt is in terms of 8x8 units so a 16x16 will have 4 8x8 units */
2641
36.1k
                    ps_intra16_analyse = &ps_intra32_analyse->as_intra16_analyse[j];
2642
36.1k
                    ps_intra16_analyse->b1_merge_flag = 0;
2643
36.1k
                }
2644
9.04k
            }
2645
2646
            /* CU size 64x64 and fill the final cu params */
2647
            //ps_row_cu->b3_cu_pos_x = gau1_cu_pos_x[0];
2648
            //ps_row_cu->b3_cu_pos_y = gau1_cu_pos_y[0];
2649
            //ps_row_cu->u1_cu_size  = 64;
2650
2651
            /* Candidate mode Update */
2652
2.26k
            cand_mode_list[0] = best_mode;
2653
2.26k
            if(cand_mode_list[0] > 1)
2654
523
            {
2655
523
                if(cand_mode_list[0] == 2)
2656
7
                {
2657
7
                    cand_mode_list[1] = 34;
2658
7
                    cand_mode_list[2] = 3;
2659
7
                }
2660
516
                else if(cand_mode_list[0] == 34)
2661
7
                {
2662
7
                    cand_mode_list[1] = 2;
2663
7
                    cand_mode_list[2] = 33;
2664
7
                }
2665
509
                else
2666
509
                {
2667
509
                    cand_mode_list[1] = cand_mode_list[0] - 1;
2668
509
                    cand_mode_list[2] = cand_mode_list[0] + 1;
2669
509
                }
2670
                //cand_mode_list[1] = ps_ed_blk_l1->nang_attr.best_mode;
2671
                //cand_mode_list[2] = ps_ed_blk_l1->ang_attr.best_mode;
2672
523
            }
2673
1.73k
            else
2674
1.73k
            {
2675
1.73k
                cand_mode_list[0] = 0;
2676
1.73k
                cand_mode_list[1] = 1;
2677
1.73k
                cand_mode_list[2] = 26;
2678
                //cand_mode_list[2] = ps_ed_blk_l1->nang_attr.best_mode;
2679
1.73k
            }
2680
2681
            /* All 32x32 costs are accumalated to 64x64 cost */
2682
2.26k
            ps_l0_ipe_out_ctb->i4_best64x64_intra_cost = 0;
2683
11.3k
            for(i = 0; i < 4; i++)
2684
9.04k
            {
2685
9.04k
                ps_l0_ipe_out_ctb->i4_best64x64_intra_cost +=
2686
9.04k
                    ps_l0_ipe_out_ctb->ai4_best32x32_intra_cost[i];
2687
9.04k
            }
2688
            /* by default 64x64 modes are set to default values DC and Planar */
2689
2.26k
            ps_l0_ipe_out_ctb->au1_best_modes_32x32_tu[0] = cand_mode_list[0];
2690
2.26k
            ps_l0_ipe_out_ctb->au1_best_modes_32x32_tu[1] = cand_mode_list[1];
2691
2.26k
            ps_l0_ipe_out_ctb->au1_best_modes_32x32_tu[2] = cand_mode_list[2];
2692
2.26k
            ps_l0_ipe_out_ctb->au1_best_modes_32x32_tu[3] = 255;
2693
2694
            /* Update CTB mode map for the finalised CU */
2695
2.26k
            x = ((ps_cu_node->u2_x0 << 3) >> 2) + 1;
2696
2.26k
            y = ((ps_cu_node->u2_y0 << 3) >> 2) + 1;
2697
2.26k
            size = ps_cu_node->u1_cu_size >> 2;
2698
2699
21.5k
            for(row = y; row < (y + size); row++)
2700
19.2k
            {
2701
192k
                for(col = x; col < (x + size); col++)
2702
172k
                {
2703
172k
                    ps_ctxt->au1_ctb_mode_map[row][col] = best_mode;
2704
172k
                }
2705
19.2k
            }
2706
2707
2.26k
            ihevce_set_nbr_map(
2708
2.26k
                ps_ctxt->pu1_ctb_nbr_map,
2709
2.26k
                ps_ctxt->i4_nbr_map_strd,
2710
2.26k
                (ps_cu_node->u2_x0 << 1),
2711
2.26k
                (ps_cu_node->u2_y0 << 1),
2712
2.26k
                (ps_cu_node->u1_cu_size >> 2),
2713
2.26k
                1);
2714
2715
            /*As 64*64 has won, pick L1 32x32 qp*/
2716
            //ASSERT(((blk_cnt>>6) & 0xF) == (blk_cnt>>6));
2717
            //ASSERT((blk_cnt>>6) == 0);
2718
2.26k
            ASSERT(ps_ed_ctb_l1->i4_32x32_satd[0][0] != -2);
2719
2.26k
            i1_cu_possible_qp = ihevce_cu_level_qp_mod(
2720
2.26k
                ps_ctxt->i4_qscale,
2721
2.26k
                ps_ed_ctb_l1->i4_32x32_satd[0][0],
2722
2.26k
                ps_ctxt->ld_curr_frame_32x32_log_avg[0],
2723
2.26k
                f_strength,
2724
2.26k
                &i4_act_factor,
2725
2.26k
                &i4_q_scale_q3_mod,
2726
2.26k
                ps_ctxt->ps_rc_quant_ctxt);
2727
2728
2.26k
            i8_frame_acc_satd_by_modqp_q10 =
2729
2.26k
                (i8_frame_acc_satd_cost << (SATD_BY_ACT_Q_FAC + QSCALE_Q_FAC_3)) /
2730
2.26k
                i4_q_scale_q3_mod;
2731
            /* Increment pointers */
2732
2.26k
            ps_ed_blk_l1 += 64;
2733
2.26k
            ps_ed_blk_l2 += 16;
2734
            //ps_row_cu++;
2735
2.26k
        }
2736
14.9k
    }
2737
2738
    //ps_ctb_out->u1_num_cus_in_ctb = (UWORD8)(ps_row_cu - ps_curr_cu);
2739
2740
14.9k
    {
2741
14.9k
        WORD32 i4_i, i4_j;
2742
14.9k
        WORD32 dummy;
2743
14.9k
        WORD8 i1_cu_qp;
2744
14.9k
        (void)i1_cu_qp;
2745
        /*MAM_VAR_L1*/
2746
44.9k
        for(i4_j = 0; i4_j < 2; i4_j++)
2747
29.9k
        {
2748
29.9k
            i4_mod_factor_num = ps_ctxt->ai4_mod_factor_derived_by_variance[i4_j];
2749
29.9k
            f_strength = ps_ctxt->f_strength;
2750
2751
            //i4_mod_factor_num = 4;
2752
2753
29.9k
            ps_ed_blk_l1 = ps_ed_l1_ctb;
2754
29.9k
            ps_ed_blk_l2 = ps_ed_l2_ctb;
2755
            //ps_row_cu = ps_curr_cu;
2756
2757
            /*Valid only for complete CTB */
2758
29.9k
            if((64 == u1_curr_ctb_wdt) && (64 == u1_curr_ctb_hgt))
2759
21.1k
            {
2760
21.1k
                ASSERT(ps_ed_ctb_l1->i4_32x32_satd[0][0] != -2);
2761
21.1k
                ASSERT(ps_ed_ctb_l1->i4_32x32_satd[0][1] != -2);
2762
21.1k
                ASSERT(ps_ed_ctb_l1->i4_32x32_satd[0][2] != -2);
2763
21.1k
                ASSERT(ps_ed_ctb_l1->i4_32x32_satd[0][3] != -2);
2764
2765
21.1k
                i1_cu_qp = ihevce_cu_level_qp_mod(
2766
21.1k
                    ps_ctxt->i4_qscale,
2767
21.1k
                    ps_ed_ctb_l1->i4_32x32_satd[0][0],
2768
21.1k
                    ps_ctxt->ld_curr_frame_32x32_log_avg[0],
2769
21.1k
                    f_strength,
2770
21.1k
                    &ps_l0_ipe_out_ctb->i4_64x64_act_factor[0][i4_j],
2771
21.1k
                    &dummy,
2772
21.1k
                    ps_ctxt->ps_rc_quant_ctxt);
2773
2774
21.1k
                i1_cu_qp = ihevce_cu_level_qp_mod(
2775
21.1k
                    ps_ctxt->i4_qscale,
2776
21.1k
                    ps_ed_ctb_l1->i4_32x32_satd[0][1],
2777
21.1k
                    ps_ctxt->ld_curr_frame_32x32_log_avg[1],
2778
21.1k
                    f_strength,
2779
21.1k
                    &ps_l0_ipe_out_ctb->i4_64x64_act_factor[1][i4_j],
2780
21.1k
                    &dummy,
2781
21.1k
                    ps_ctxt->ps_rc_quant_ctxt);
2782
21.1k
                i1_cu_qp = ihevce_cu_level_qp_mod(
2783
21.1k
                    ps_ctxt->i4_qscale,
2784
21.1k
                    ps_ed_ctb_l1->i4_32x32_satd[0][2],
2785
21.1k
                    ps_ctxt->ld_curr_frame_32x32_log_avg[2],
2786
21.1k
                    f_strength,
2787
21.1k
                    &ps_l0_ipe_out_ctb->i4_64x64_act_factor[2][i4_j],
2788
21.1k
                    &dummy,
2789
21.1k
                    ps_ctxt->ps_rc_quant_ctxt);
2790
2791
21.1k
                i1_cu_qp = ihevce_cu_level_qp_mod(
2792
21.1k
                    ps_ctxt->i4_qscale,
2793
21.1k
                    ps_ed_ctb_l1->i4_32x32_satd[0][3],
2794
21.1k
                    2.0 + ps_ctxt->ld_curr_frame_16x16_log_avg[0],
2795
21.1k
                    f_strength,
2796
21.1k
                    &ps_l0_ipe_out_ctb->i4_64x64_act_factor[3][i4_j],
2797
21.1k
                    &dummy,
2798
21.1k
                    ps_ctxt->ps_rc_quant_ctxt);
2799
2800
21.1k
                ASSERT(ps_l0_ipe_out_ctb->i4_64x64_act_factor[3][i4_j] > 0);
2801
21.1k
            }
2802
8.78k
            else
2803
8.78k
            {
2804
8.78k
                ps_l0_ipe_out_ctb->i4_64x64_act_factor[0][i4_j] = 1024;
2805
8.78k
                ps_l0_ipe_out_ctb->i4_64x64_act_factor[1][i4_j] = 1024;
2806
8.78k
                ps_l0_ipe_out_ctb->i4_64x64_act_factor[2][i4_j] = 1024;
2807
8.78k
                ps_l0_ipe_out_ctb->i4_64x64_act_factor[3][i4_j] = 1024;
2808
8.78k
            }
2809
2810
            /*Store the 8x8 Qps from L2 (in raster order) as output of intra prediction
2811
            for the usage by ME*/
2812
2813
29.9k
            {
2814
29.9k
                WORD32 pos_x_32, pos_y_32, pos;
2815
                //WORD32 i4_incomplete_ctb_val_8;
2816
29.9k
                pos_x_32 = u1_curr_ctb_wdt / 16;
2817
29.9k
                pos_y_32 = u1_curr_ctb_hgt / 16;
2818
2819
29.9k
                pos = (pos_x_32 < pos_y_32) ? pos_x_32 : pos_y_32;
2820
2821
149k
                for(i4_i = 0; i4_i < 4; i4_i++)
2822
119k
                {
2823
119k
                    if(i4_i < pos)
2824
90.1k
                    {
2825
90.1k
                        ASSERT(ps_ed_ctb_l1->i4_16x16_satd[i4_i][0] != -2);
2826
90.1k
                        ASSERT(ps_ed_ctb_l1->i4_16x16_satd[i4_i][1] != -2);
2827
90.1k
                        ASSERT(ps_ed_ctb_l1->i4_16x16_satd[i4_i][2] != -2);
2828
90.1k
                        i1_cu_qp = ihevce_cu_level_qp_mod(
2829
90.1k
                            ps_ctxt->i4_qscale,
2830
90.1k
                            ps_ed_ctb_l1->i4_16x16_satd[i4_i][0],
2831
90.1k
                            ps_ctxt->ld_curr_frame_16x16_log_avg[0],
2832
90.1k
                            f_strength,
2833
90.1k
                            &ps_l0_ipe_out_ctb->i4_32x32_act_factor[i4_i][0][i4_j],
2834
90.1k
                            &dummy,
2835
90.1k
                            ps_ctxt->ps_rc_quant_ctxt);
2836
90.1k
                        i1_cu_qp = ihevce_cu_level_qp_mod(
2837
90.1k
                            ps_ctxt->i4_qscale,
2838
90.1k
                            ps_ed_ctb_l1->i4_16x16_satd[i4_i][1],
2839
90.1k
                            ps_ctxt->ld_curr_frame_16x16_log_avg[1],
2840
90.1k
                            f_strength,
2841
90.1k
                            &ps_l0_ipe_out_ctb->i4_32x32_act_factor[i4_i][1][i4_j],
2842
90.1k
                            &dummy,
2843
90.1k
                            ps_ctxt->ps_rc_quant_ctxt);
2844
90.1k
                        i1_cu_qp = ihevce_cu_level_qp_mod(
2845
90.1k
                            ps_ctxt->i4_qscale,
2846
90.1k
                            ps_ed_ctb_l1->i4_16x16_satd[i4_i][2],
2847
90.1k
                            ps_ctxt->ld_curr_frame_16x16_log_avg[2],
2848
90.1k
                            f_strength,
2849
90.1k
                            &ps_l0_ipe_out_ctb->i4_32x32_act_factor[i4_i][2][i4_j],
2850
90.1k
                            &dummy,
2851
90.1k
                            ps_ctxt->ps_rc_quant_ctxt);
2852
90.1k
                    }
2853
29.6k
                    else
2854
29.6k
                    {
2855
                        /*For incomplete CTB */
2856
29.6k
                        ps_l0_ipe_out_ctb->i4_32x32_act_factor[i4_i][0][i4_j] = 1024;
2857
29.6k
                        ps_l0_ipe_out_ctb->i4_32x32_act_factor[i4_i][1][i4_j] = 1024;
2858
29.6k
                        ps_l0_ipe_out_ctb->i4_32x32_act_factor[i4_i][2][i4_j] = 1024;
2859
29.6k
                    }
2860
119k
                }
2861
29.9k
            }
2862
2863
            /*Store the 8x8 Qps from L1 (in raster order) as output of intra prediction
2864
            for the usage by ME*/
2865
29.9k
            {
2866
29.9k
                WORD32 pos_x_16, pos_y_16, pos;
2867
                //WORD32 i4_incomplete_ctb_val_8;
2868
29.9k
                pos_x_16 = u1_curr_ctb_wdt / 4;
2869
29.9k
                pos_y_16 = u1_curr_ctb_hgt / 4;
2870
2871
29.9k
                pos = (pos_x_16 < pos_y_16) ? pos_x_16 : pos_y_16;
2872
509k
                for(i4_i = 0; i4_i < 16; i4_i++)
2873
479k
                {
2874
479k
                    if(i4_i < pos)
2875
374k
                    {
2876
374k
                        ASSERT(ps_ed_ctb_l1->i4_8x8_satd[i4_i][0] != -2);
2877
374k
                        ASSERT(ps_ed_ctb_l1->i4_8x8_satd[i4_i][1] != -2);
2878
374k
                        i1_cu_qp = ihevce_cu_level_qp_mod(
2879
374k
                            ps_ctxt->i4_qscale,
2880
374k
                            ps_ed_ctb_l1->i4_8x8_satd[i4_i][0],
2881
374k
                            ps_ctxt->ld_curr_frame_8x8_log_avg[0],
2882
374k
                            f_strength,
2883
374k
                            &ps_l0_ipe_out_ctb->i4_16x16_act_factor[i4_i][0][i4_j],
2884
374k
                            &dummy,
2885
374k
                            ps_ctxt->ps_rc_quant_ctxt);
2886
374k
                        i1_cu_qp = ihevce_cu_level_qp_mod(
2887
374k
                            ps_ctxt->i4_qscale,
2888
374k
                            ps_ed_ctb_l1->i4_8x8_satd[i4_i][1],
2889
374k
                            ps_ctxt->ld_curr_frame_8x8_log_avg[1],
2890
374k
                            f_strength,
2891
374k
                            &ps_l0_ipe_out_ctb->i4_16x16_act_factor[i4_i][1][i4_j],
2892
374k
                            &dummy,
2893
374k
                            ps_ctxt->ps_rc_quant_ctxt);
2894
374k
                    }
2895
105k
                    else
2896
105k
                    {
2897
                        /*For incomplete CTB */
2898
105k
                        ps_l0_ipe_out_ctb->i4_16x16_act_factor[i4_i][0][i4_j] = 1024;
2899
105k
                        ps_l0_ipe_out_ctb->i4_16x16_act_factor[i4_i][1][i4_j] = 1024;
2900
105k
                    }
2901
479k
                }
2902
29.9k
            }
2903
29.9k
        }  //for loop
2904
2905
        /* Accumalate the cost of ctb to the total cost */
2906
14.9k
        ps_ctxt->i8_frame_acc_satd_cost += i8_frame_acc_satd_cost;
2907
14.9k
        ps_ctxt->i8_frame_acc_satd_by_modqp_q10 += i8_frame_acc_satd_by_modqp_q10;
2908
2909
14.9k
        ps_ctxt->i8_frame_acc_mode_bits_cost += i8_frame_acc_mode_bits_cost;
2910
2911
        /* satd and mpm bits accumalation of best cu size candiate for the ctb */
2912
14.9k
        ps_l0_ipe_out_ctb->i4_ctb_acc_satd = i4_ctb_acc_satd;
2913
14.9k
        ps_l0_ipe_out_ctb->i4_ctb_acc_mpm_bits = i8_frame_acc_mode_bits_cost;
2914
2915
14.9k
        ps_ctxt->i8_frame_acc_satd += i4_ctb_acc_satd;
2916
14.9k
    }
2917
2918
14.9k
    {
2919
14.9k
        WORD32 ctr_8x8;
2920
254k
        for(ctr_8x8 = 0; ctr_8x8 < (MAX_CU_IN_CTB >> 2); ctr_8x8++)
2921
239k
        {
2922
            /*Accumalate activity factor for Intra and Inter*/
2923
239k
            if(ps_l0_ipe_out_ctb->ai4_best_sad_cost_8x8_l1_ipe[ctr_8x8] <
2924
239k
               ps_ed_ctb_l1->i4_sad_me_for_ref[ctr_8x8])
2925
35.6k
            {
2926
35.6k
                ps_l0_ipe_out_ctb->ai4_8x8_act_factor[ctr_8x8] =
2927
35.6k
                    ps_l0_ipe_out_ctb->i4_16x16_act_factor[ctr_8x8][1][0];
2928
35.6k
            }
2929
203k
            else
2930
203k
            {
2931
203k
                ps_l0_ipe_out_ctb->ai4_8x8_act_factor[ctr_8x8] =
2932
203k
                    ps_l0_ipe_out_ctb->i4_16x16_act_factor[ctr_8x8][1][0];
2933
203k
            }
2934
2935
            /*Accumalate activity factor at frame level*/
2936
239k
            ps_ctxt->i8_frame_acc_act_factor += ps_l0_ipe_out_ctb->ai4_8x8_act_factor[ctr_8x8];
2937
239k
        }
2938
14.9k
    }
2939
14.9k
    return;
2940
14.9k
}
2941
2942
WORD32 ihevce_nxn_sad_computer(
2943
    UWORD8 *pu1_inp, WORD32 i4_inp_stride, UWORD8 *pu1_ref, WORD32 i4_ref_stride, WORD32 trans_size)
2944
321k
{
2945
321k
    WORD32 wd, ht, i, j;
2946
321k
    WORD32 sad = 0;
2947
2948
321k
    wd = trans_size;
2949
321k
    ht = trans_size;
2950
2951
3.52M
    for(i = 0; i < ht; i++)
2952
3.19M
    {
2953
41.6M
        for(j = 0; j < wd; j++)
2954
38.4M
        {
2955
38.4M
            sad += (ABS(((WORD32)pu1_inp[j] - (WORD32)pu1_ref[j])));
2956
38.4M
        }
2957
3.19M
        pu1_inp += i4_inp_stride;
2958
3.19M
        pu1_ref += i4_ref_stride;
2959
3.19M
    }
2960
2961
321k
    return sad;
2962
321k
}
2963
2964
/*!
2965
******************************************************************************
2966
* \if Function name : ihevce_mode_eval_filtering \endif
2967
*
2968
* \brief
2969
*    Evaluates best 3 modes for the given CU size with probable modes from,
2970
*    early decision structure, mpm candidates and dc, planar mode
2971
*
2972
* \param[in] ps_cu_node : pointer to MAX cu node info buffer
2973
* \param[in] ps_child_cu_node : pointer to (MAX - 1) cu node info buffer
2974
* \param[in] ps_ctxt : pointer to IPE context struct
2975
* \param[in] ps_curr_src : pointer to src pixels struct
2976
* \param[in] best_amode : best angular mode from l1 layer or
2977
                            from (MAX - 1) CU mode
2978
* \param[in] best_costs_4x4  : pointer to 3 best cost buffer
2979
* \param[in] best_modes_4x4  : pointer to 3 best mode buffer
2980
* \param[in] step2_bypass : if 0, (MAX - 1) CU is evaluated
2981
*                           if 1, (MAX CU) sugested is evaluated
2982
* \param[in] tu_eq_cu     : indicates if tu size is same as cu or cu/2
2983
*
2984
* \return
2985
*    None
2986
*
2987
* \author
2988
*  Ittiam
2989
*
2990
*****************************************************************************
2991
*/
2992
void ihevce_mode_eval_filtering(
2993
    ihevce_ipe_cu_tree_t *ps_cu_node,
2994
    ihevce_ipe_cu_tree_t *ps_child_cu_node,
2995
    ihevce_ipe_ctxt_t *ps_ctxt,
2996
    iv_enc_yuv_buf_t *ps_curr_src,
2997
    WORD32 best_amode,
2998
    WORD32 *best_costs_4x4,
2999
    UWORD8 *best_modes_4x4,
3000
    WORD32 step2_bypass,
3001
    WORD32 tu_eq_cu)
3002
752k
{
3003
752k
    UWORD8 *pu1_origin, *pu1_orig;
3004
752k
    WORD32 src_strd = ps_curr_src->i4_y_strd;
3005
752k
    WORD32 nbr_flags;
3006
752k
    nbr_avail_flags_t s_nbr;
3007
752k
    WORD32 trans_size = tu_eq_cu ? ps_cu_node->u1_cu_size : ps_cu_node->u1_cu_size >> 1;
3008
752k
    WORD32 num_tu_in_x = tu_eq_cu ? 1 : 2;
3009
752k
    WORD32 num_tu_in_y = tu_eq_cu ? 1 : 2;
3010
752k
    UWORD8 mode;
3011
3012
752k
    WORD32 cost_ang_mode = MAX_INTRA_COST_IPE;
3013
752k
    WORD32 filter_flag;
3014
752k
    WORD32 cost_amode_step2[7] = { 0 };
3015
    /*WORD32 best_sad[5];  // NOTE_A01: Not getting consumed at present */
3016
752k
    WORD32 sad = 0;
3017
752k
    WORD32 cu_pos_x, cu_pos_y;
3018
752k
    WORD32 temp;
3019
752k
    WORD32 i = 0, j, k, i_end, z;
3020
    //WORD32 row, col, size;
3021
752k
    UWORD8 *pu1_ref;
3022
752k
    WORD32 xA, yA, xB, yB;
3023
752k
    WORD32 top_intra_mode;
3024
752k
    WORD32 left_intra_mode;
3025
752k
    UWORD8 *pu1_ref_orig = &ps_ctxt->au1_ref_samples[0];
3026
752k
    UWORD8 *pu1_ref_filt = &ps_ctxt->au1_filt_ref_samples[0];
3027
3028
752k
    UWORD8 modes_4x4[5] = { 0, 1, 2, 3, 4 };
3029
752k
    WORD32 count;
3030
3031
752k
    pf_ipe_res_trans_had apf_resd_trns_had[4];
3032
3033
752k
    WORD32 cand_mode_satd_list[3];
3034
752k
    ihevc_intra_pred_luma_ref_substitution_ft *ihevc_intra_pred_luma_ref_substitution_fptr;
3035
3036
752k
    ihevc_intra_pred_luma_ref_substitution_fptr =
3037
752k
        ps_ctxt->ps_func_selector->ihevc_intra_pred_luma_ref_substitution_fptr;
3038
3039
752k
    apf_resd_trns_had[0] = ps_ctxt->s_cmn_opt_func.pf_HAD_4x4_8bit;
3040
752k
    apf_resd_trns_had[1] = ps_ctxt->s_cmn_opt_func.pf_HAD_8x8_8bit;
3041
752k
    apf_resd_trns_had[2] = ps_ctxt->s_cmn_opt_func.pf_HAD_16x16_8bit;
3042
752k
    apf_resd_trns_had[3] = ps_ctxt->s_cmn_opt_func.pf_HAD_32x32_8bit;
3043
3044
    /* initialize modes_to_eval as zero */
3045
752k
    memset(&ps_ctxt->au1_modes_to_eval, 0, MAX_NUM_IP_MODES);
3046
3047
    /* Compute the Parent Cost */
3048
3049
    /* Pointer to top-left of the CU - y0,x0 in 8x8 granularity */
3050
752k
    pu1_orig = (UWORD8 *)(ps_curr_src->pv_y_buf) + ((ps_cu_node->u2_y0 << 3) * src_strd) +
3051
752k
               (ps_cu_node->u2_x0 << 3);
3052
3053
    /* Get position of CU within CTB at 4x4 granularity */
3054
752k
    cu_pos_x = ps_cu_node->u2_x0 << 1;
3055
752k
    cu_pos_y = ps_cu_node->u2_y0 << 1;
3056
3057
    /* get the neighbour availability flags */
3058
752k
    ihevce_get_only_nbr_flag(
3059
752k
        &s_nbr,
3060
752k
        ps_ctxt->pu1_ctb_nbr_map,
3061
752k
        ps_ctxt->i4_nbr_map_strd,
3062
752k
        cu_pos_x,
3063
752k
        cu_pos_y,
3064
752k
        trans_size >> 2,
3065
752k
        trans_size >> 2);
3066
3067
    /* Traverse for all 4 child blocks in the parent block */
3068
752k
    xA = (ps_cu_node->u2_x0 << 3) >> 2;
3069
752k
    yA = ((ps_cu_node->u2_y0 << 3) >> 2) + 1;
3070
752k
    xB = xA + 1;
3071
752k
    yB = yA - 1;
3072
752k
    left_intra_mode = ps_ctxt->au1_ctb_mode_map[yA][xA];
3073
752k
    top_intra_mode = ps_ctxt->au1_ctb_mode_map[yB][xB];
3074
    /* call the function which populates sad cost for all the modes */
3075
3076
752k
    ihevce_intra_populate_mode_bits_cost_bracketing(
3077
752k
        top_intra_mode,
3078
752k
        left_intra_mode,
3079
752k
        s_nbr.u1_top_avail,
3080
752k
        s_nbr.u1_left_avail,
3081
752k
        ps_cu_node->u2_y0,
3082
752k
        &ps_ctxt->au2_mode_bits_satd_cost[0],
3083
752k
        &ps_ctxt->au2_mode_bits_satd[0],
3084
752k
        ps_ctxt->i4_ol_satd_lambda,
3085
752k
        cand_mode_satd_list);
3086
3087
1.74M
    for(k = 0; k < num_tu_in_y; k++)
3088
988k
    {
3089
2.44M
        for(j = 0; j < num_tu_in_x; j++)
3090
1.46M
        {
3091
            /* get the neighbour availability flags */
3092
1.46M
            nbr_flags = ihevce_get_nbr_intra(
3093
1.46M
                &s_nbr,
3094
1.46M
                ps_ctxt->pu1_ctb_nbr_map,
3095
1.46M
                ps_ctxt->i4_nbr_map_strd,
3096
1.46M
                cu_pos_x + ((j) * (trans_size >> 2)),
3097
1.46M
                cu_pos_y + ((k) * (trans_size >> 2)),
3098
1.46M
                trans_size >> 2);
3099
3100
1.46M
            pu1_origin = pu1_orig + (k * trans_size * src_strd) + (j * trans_size);
3101
3102
            /* Create reference samples array */
3103
1.46M
            ihevc_intra_pred_luma_ref_substitution_fptr(
3104
1.46M
                pu1_origin - src_strd - 1,
3105
1.46M
                pu1_origin - src_strd,
3106
1.46M
                pu1_origin - 1,
3107
1.46M
                src_strd,
3108
1.46M
                trans_size,
3109
1.46M
                nbr_flags,
3110
1.46M
                pu1_ref_orig,
3111
1.46M
                0);
3112
3113
            /* Perform reference samples filtering */
3114
1.46M
            ihevce_intra_pred_ref_filtering(pu1_ref_orig, trans_size, pu1_ref_filt);
3115
3116
1.46M
            ihevce_set_nbr_map(
3117
1.46M
                ps_ctxt->pu1_ctb_nbr_map,
3118
1.46M
                ps_ctxt->i4_nbr_map_strd,
3119
1.46M
                cu_pos_x + ((j) * (trans_size >> 2)),
3120
1.46M
                cu_pos_y + ((k) * (trans_size >> 2)),
3121
1.46M
                (trans_size >> 2),
3122
1.46M
                1);
3123
3124
1.46M
            pu1_ref_orig += (4 * MAX_CTB_SIZE + 1);
3125
1.46M
            pu1_ref_filt += (4 * MAX_CTB_SIZE + 1);
3126
1.46M
        }
3127
988k
    }
3128
3129
    /* Revaluation for angular mode */
3130
    //if(ps_ed_blk->ang_attr.mode_present == 1)
3131
    //if(((best_amode & 0x1) != 1))
3132
3133
752k
    {
3134
752k
        WORD32 u1_trans_idx = trans_size >> 3;
3135
752k
        if(trans_size == 32)
3136
21.7k
            u1_trans_idx = 3;
3137
        //best_amode = ps_ed_blk->ang_attr.best_mode;
3138
3139
752k
        i = 0;
3140
752k
        if(!step2_bypass)
3141
354k
        {
3142
            /* Around best level 4 angular mode, search for best level 2 mode */
3143
354k
            ASSERT((best_amode >= 2) && (best_amode <= 34));
3144
3145
354k
            if(ps_ctxt->i4_quality_preset <= IHEVCE_QUALITY_P3)
3146
259k
            {
3147
259k
                if(best_amode >= 4)
3148
253k
                    ps_ctxt->au1_modes_to_eval_temp[i++] = best_amode - 2;
3149
259k
            }
3150
3151
354k
            ps_ctxt->au1_modes_to_eval_temp[i++] = best_amode;
3152
3153
354k
            if(ps_ctxt->i4_quality_preset <= IHEVCE_QUALITY_P3)
3154
259k
            {
3155
259k
                if(best_amode <= 32)
3156
255k
                    ps_ctxt->au1_modes_to_eval_temp[i++] = best_amode + 2;
3157
259k
            }
3158
354k
        }
3159
398k
        else
3160
398k
        {
3161
398k
            ps_ctxt->au1_modes_to_eval_temp[i++] = ps_child_cu_node->ps_sub_cu[0]->best_mode;
3162
398k
            ps_ctxt->au1_modes_to_eval_temp[i++] = ps_child_cu_node->ps_sub_cu[1]->best_mode;
3163
398k
            ps_ctxt->au1_modes_to_eval_temp[i++] = ps_child_cu_node->ps_sub_cu[2]->best_mode;
3164
398k
            ps_ctxt->au1_modes_to_eval_temp[i++] = ps_child_cu_node->ps_sub_cu[3]->best_mode;
3165
398k
        }
3166
3167
        /* Add the left and top MPM modes for computation*/
3168
3169
752k
        ps_ctxt->au1_modes_to_eval_temp[i++] = cand_mode_satd_list[0];
3170
752k
        ps_ctxt->au1_modes_to_eval_temp[i++] = cand_mode_satd_list[1];
3171
3172
752k
        i_end = i;
3173
752k
        count = 0;
3174
3175
        /*Remove duplicate modes from modes_to_eval_temp[] */
3176
4.71M
        for(j = 0; j < i_end; j++)
3177
3.96M
        {
3178
8.39M
            for(k = 0; k < count; k++)
3179
5.07M
            {
3180
5.07M
                if(ps_ctxt->au1_modes_to_eval_temp[j] == ps_ctxt->au1_modes_to_eval[k])
3181
641k
                    break;
3182
5.07M
            }
3183
3.96M
            if((k == count) && (ps_ctxt->au1_modes_to_eval_temp[j] > 1))
3184
1.97M
            {
3185
1.97M
                ps_ctxt->au1_modes_to_eval[count] = ps_ctxt->au1_modes_to_eval_temp[j];
3186
1.97M
                count++;
3187
1.97M
            }
3188
3.96M
        }
3189
752k
        i_end = count;
3190
752k
        if(count == 0)
3191
48.8k
        {
3192
48.8k
            ps_ctxt->au1_modes_to_eval[0] = 26;
3193
48.8k
            i_end = 1;
3194
48.8k
        }
3195
3196
2.77M
        for(i = 0; i < i_end; i++)
3197
2.02M
        {
3198
2.02M
            pu1_ref_orig = &ps_ctxt->au1_ref_samples[0];
3199
2.02M
            pu1_ref_filt = &ps_ctxt->au1_filt_ref_samples[0];
3200
3201
2.02M
            mode = ps_ctxt->au1_modes_to_eval[i];
3202
2.02M
            ASSERT((mode >= 2) && (mode <= 34));
3203
2.02M
            cost_amode_step2[i] = ps_ctxt->au2_mode_bits_satd_cost[mode];
3204
2.02M
            filter_flag = gau1_intra_pred_ref_filter[mode] & (1 << (CTZ(trans_size) - 2));
3205
3206
4.75M
            for(k = 0; k < num_tu_in_y; k++)
3207
2.72M
            {
3208
6.86M
                for(j = 0; j < num_tu_in_x; j++)
3209
4.13M
                {
3210
4.13M
                    pu1_origin = pu1_orig + (k * trans_size * src_strd) + (j * trans_size);
3211
3212
4.13M
                    if(0 == filter_flag)
3213
3.88M
                        pu1_ref = pu1_ref_orig;
3214
244k
                    else
3215
244k
                        pu1_ref = pu1_ref_filt;
3216
3217
4.13M
                    g_apf_lum_ip[g_i4_ip_funcs[mode]](
3218
4.13M
                        pu1_ref, 0, &ps_ctxt->au1_pred_samples[0], trans_size, trans_size, mode);
3219
3220
4.13M
                    if(ps_ctxt->u1_use_satd)
3221
3.81M
                    {
3222
3.81M
                        sad = apf_resd_trns_had[u1_trans_idx](
3223
3.81M
                            pu1_origin,
3224
3.81M
                            ps_curr_src->i4_y_strd,
3225
3.81M
                            &ps_ctxt->au1_pred_samples[0],
3226
3.81M
                            trans_size,
3227
3.81M
                            NULL,
3228
3.81M
                            0
3229
3230
3.81M
                        );
3231
3.81M
                    }
3232
321k
                    else
3233
321k
                    {
3234
321k
                        sad = ps_ctxt->s_ipe_optimised_function_list.pf_nxn_sad_computer(
3235
321k
                            pu1_origin,
3236
321k
                            ps_curr_src->i4_y_strd,
3237
321k
                            &ps_ctxt->au1_pred_samples[0],
3238
321k
                            trans_size,
3239
321k
                            trans_size);
3240
321k
                    }
3241
3242
4.13M
                    cost_amode_step2[i] += sad;
3243
3244
4.13M
                    pu1_ref_orig += (4 * MAX_CTB_SIZE + 1);
3245
4.13M
                    pu1_ref_filt += (4 * MAX_CTB_SIZE + 1);
3246
4.13M
                }
3247
2.72M
            }
3248
2.02M
        }
3249
752k
        best_amode = ps_ctxt->au1_modes_to_eval[0];
3250
        /*Init cost indx */
3251
752k
        cost_ang_mode = MAX_INTRA_COST_IPE;  //cost_amode_step2[0];
3252
2.77M
        for(z = 0; z < i_end; z++)
3253
2.02M
        {
3254
            /* Least cost of all 3 angles are stored in cost_amode_step2[0] and corr. mode*/
3255
2.02M
            if(cost_ang_mode >= cost_amode_step2[z])
3256
1.29M
            {
3257
1.29M
                if(cost_ang_mode == cost_amode_step2[z])
3258
92.5k
                {
3259
92.5k
                    if(best_amode > ps_ctxt->au1_modes_to_eval[z])
3260
4.02k
                        best_amode = ps_ctxt->au1_modes_to_eval[z];
3261
92.5k
                }
3262
1.20M
                else
3263
1.20M
                {
3264
1.20M
                    best_amode = ps_ctxt->au1_modes_to_eval[z];
3265
1.20M
                }
3266
1.29M
                cost_ang_mode = cost_amode_step2[z];
3267
1.29M
            }
3268
2.02M
        }
3269
3270
        /*Modify mode bits for the angular modes */
3271
752k
    }
3272
3273
752k
    {
3274
        /* Step - I modification */
3275
752k
        ASSERT((best_amode >= 2) && (best_amode <= 34));
3276
752k
        i_end = 0;
3277
752k
        z = 0;
3278
3279
        /* Around best level 3 angular mode, search for best level 1 mode */
3280
752k
        ps_ctxt->au1_modes_to_eval[i_end++] = 0;
3281
752k
        ps_ctxt->au1_modes_to_eval[i_end++] = 1;
3282
3283
752k
        if(best_amode != 2)
3284
721k
            ps_ctxt->au1_modes_to_eval[i_end++] = best_amode - 1;
3285
3286
752k
        ps_ctxt->au1_modes_to_eval[i_end++] = best_amode;
3287
3288
752k
        if(best_amode != 34)
3289
741k
            ps_ctxt->au1_modes_to_eval[i_end++] = best_amode + 1;
3290
3291
        /* Inserting step_2's best mode at last to avoid
3292
        recalculation of it's SATD cost */
3293
3294
        //ps_ctxt->au1_modes_to_eval[i_end] = best_amode; //Bugfix: HSAD compared with SAD
3295
        //cost_amode_step2[i_end] = cost_ang_mode;
3296
3297
        /*best_sad[i_end] = cost_ang_mode
3298
                - mode_bits_satd_cost[best_amode]; //See NOTE_A01 above */
3299
3300
752k
        cost_ang_mode = MAX_INTRA_COST_IPE; /* Init cost */
3301
3302
4.47M
        for(i = 0; i < i_end; i++)
3303
3.72M
        {
3304
3.72M
            WORD32 u1_trans_idx = trans_size >> 3;
3305
3.72M
            if(trans_size == 32)
3306
108k
                u1_trans_idx = 3;
3307
3.72M
            pu1_ref_orig = &ps_ctxt->au1_ref_samples[0];
3308
3.72M
            pu1_ref_filt = &ps_ctxt->au1_filt_ref_samples[0];
3309
3310
            /*best_sad[i] = 0; //See NOTE_A01 above */
3311
3.72M
            mode = ps_ctxt->au1_modes_to_eval[i];
3312
3.72M
            cost_amode_step2[i] = ps_ctxt->au2_mode_bits_satd_cost[mode];
3313
3.72M
            filter_flag = gau1_intra_pred_ref_filter[mode] & (1 << (CTZ(trans_size) - 2));
3314
3315
8.61M
            for(k = 0; k < num_tu_in_y; k++)
3316
4.89M
            {
3317
12.1M
                for(j = 0; j < num_tu_in_x; j++)
3318
7.23M
                {
3319
7.23M
                    pu1_origin = pu1_orig + (k * trans_size * src_strd) + (j * trans_size);
3320
3321
7.23M
                    if(0 == filter_flag)
3322
6.25M
                        pu1_ref = pu1_ref_orig;
3323
978k
                    else
3324
978k
                        pu1_ref = pu1_ref_filt;
3325
3326
7.23M
                    g_apf_lum_ip[g_i4_ip_funcs[mode]](
3327
7.23M
                        pu1_ref, 0, &ps_ctxt->au1_pred_samples[0], trans_size, trans_size, mode);
3328
3329
                    //if(trans_size != 4)
3330
7.23M
                    {
3331
7.23M
                        sad = apf_resd_trns_had[u1_trans_idx](
3332
7.23M
                            pu1_origin,
3333
7.23M
                            ps_curr_src->i4_y_strd,
3334
7.23M
                            &ps_ctxt->au1_pred_samples[0],
3335
7.23M
                            trans_size,
3336
7.23M
                            NULL,
3337
7.23M
                            0);
3338
7.23M
                    }
3339
3340
                    /*accumualting SATD though name says it is sad*/
3341
7.23M
                    cost_amode_step2[i] += sad;
3342
                    /*best_sad[i] +=sad; //See NOTE_A01 above */
3343
7.23M
                    pu1_ref_orig += (4 * MAX_CTB_SIZE + 1);
3344
7.23M
                    pu1_ref_filt += (4 * MAX_CTB_SIZE + 1);
3345
7.23M
                }
3346
4.89M
            }
3347
3.72M
        }
3348
        /* Updating i_end for the step_2's inserted mode*/
3349
        //        i_end++;
3350
3351
        /* Arrange the reference array in ascending order */
3352
3353
3.72M
        for(i = 0; i < (i_end - 1); i++)
3354
2.96M
        {
3355
10.3M
            for(j = i + 1; j < i_end; j++)
3356
7.36M
            {
3357
7.36M
                if(cost_amode_step2[i] > cost_amode_step2[j])
3358
2.80M
                {
3359
2.80M
                    temp = cost_amode_step2[i];
3360
2.80M
                    cost_amode_step2[i] = cost_amode_step2[j];
3361
2.80M
                    cost_amode_step2[j] = temp;
3362
3363
2.80M
                    temp = modes_4x4[i];
3364
2.80M
                    modes_4x4[i] = modes_4x4[j];
3365
2.80M
                    modes_4x4[j] = temp;
3366
2.80M
                }
3367
7.36M
            }
3368
2.96M
        }
3369
3370
        /* Least cost of all 3 angles are stored in cost_amode_step2[0] and corr. mode*/
3371
752k
        best_amode = ps_ctxt->au1_modes_to_eval[modes_4x4[0]];
3372
752k
        cost_ang_mode = cost_amode_step2[0];
3373
752k
        ps_cu_node->best_satd = cost_ang_mode - ps_ctxt->au2_mode_bits_satd_cost[best_amode];
3374
752k
        ps_cu_node->best_cost = cost_amode_step2[0];
3375
752k
        ps_cu_node->best_mode = ps_ctxt->au1_modes_to_eval[modes_4x4[0]];
3376
752k
        ps_cu_node->best_satd =
3377
752k
            ps_cu_node->best_cost - ps_ctxt->au2_mode_bits_satd_cost[ps_cu_node->best_mode];
3378
3379
        /*Accumalate best mode bits cost for RC*/
3380
752k
        ps_cu_node->u2_mode_bits_cost = ps_ctxt->au2_mode_bits_satd[ps_cu_node->best_mode];
3381
3382
        /* Store the best three candidates */
3383
3.01M
        for(i = 0; i < 3; i++)
3384
2.25M
        {
3385
2.25M
            best_costs_4x4[i] = cost_amode_step2[i];
3386
2.25M
            best_modes_4x4[i] = ps_ctxt->au1_modes_to_eval[modes_4x4[i]];
3387
2.25M
        }
3388
752k
    }
3389
3390
752k
    return;
3391
752k
}