Coverage Report

Created: 2026-10-17 06:54

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/libhevc/encoder/ihevce_lap_interface.c
Line
Count
Source
1
/******************************************************************************
2
 *
3
 * Copyright (C) 2018 The Android Open Source Project
4
 *
5
 * Licensed under the Apache License, Version 2.0 (the "License");
6
 * you may not use this file except in compliance with the License.
7
 * You may obtain a copy of the License at:
8
 *
9
 * http://www.apache.org/licenses/LICENSE-2.0
10
 *
11
 * Unless required by applicable law or agreed to in writing, software
12
 * distributed under the License is distributed on an "AS IS" BASIS,
13
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
 * See the License for the specific language governing permissions and
15
 * limitations under the License.
16
 *
17
 *****************************************************************************
18
 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19
*/
20
21
/**
22
******************************************************************************
23
* @file
24
*  ihevce_lap_interface.c
25
*
26
* @brief
27
*  This file contains function definitions related to look-ahead processing
28
*
29
* @author
30
*  ittiam
31
*
32
* @par List of Functions:
33
*
34
******************************************************************************
35
*/
36
37
/*****************************************************************************/
38
/* File Includes                                                             */
39
/*****************************************************************************/
40
41
/* System Include Files */
42
#include <stdio.h>
43
#include <string.h>
44
#include <stdlib.h>
45
#include <assert.h>
46
47
/* User Include Files */
48
#include "ihevc_typedefs.h"
49
#include "itt_video_api.h"
50
#include "ihevce_api.h"
51
52
#include "rc_cntrl_param.h"
53
#include "rc_frame_info_collector.h"
54
#include "rc_look_ahead_params.h"
55
56
#include "ihevc_defs.h"
57
#include "ihevc_macros.h"
58
#include "ihevc_debug.h"
59
#include "ihevc_structs.h"
60
#include "ihevc_platform_macros.h"
61
#include "ihevc_deblk.h"
62
#include "ihevc_itrans_recon.h"
63
#include "ihevc_chroma_itrans_recon.h"
64
#include "ihevc_chroma_intra_pred.h"
65
#include "ihevc_intra_pred.h"
66
#include "ihevc_inter_pred.h"
67
#include "ihevc_mem_fns.h"
68
#include "ihevc_padding.h"
69
#include "ihevc_weighted_pred.h"
70
#include "ihevc_sao.h"
71
#include "ihevc_resi_trans.h"
72
#include "ihevc_quant_iquant_ssd.h"
73
#include "ihevc_cabac_tables.h"
74
75
#include "ihevce_defs.h"
76
#include "ihevce_api.h"
77
#include "ihevce_hle_interface.h"
78
#include "ihevce_hle_q_func.h"
79
#include "ihevce_lap_enc_structs.h"
80
#include "ihevce_lap_interface.h"
81
#include "ihevce_lap_structs.h"
82
#include "ihevce_multi_thrd_structs.h"
83
#include "ihevce_function_selector.h"
84
#include "ihevce_me_common_defs.h"
85
#include "ihevce_enc_structs.h"
86
#include "ihevce_rc_enc_structs.h"
87
#include "ihevce_rc_interface.h"
88
#include "ihevce_buffer_que_interface.h"
89
90
/*****************************************************************************/
91
/* Globals                                                                   */
92
/*****************************************************************************/
93
WORD32 gau1_order_insert_pic_type[MAX_TEMPORAL_LAYERS][8] = {
94
    { P_PIC, B_PIC, P_PIC, B_PIC, P_PIC, B_PIC, P_PIC, B_PIC },
95
    { P_PIC, B_PIC, B1_PIC, B1_PIC, P_PIC, B_PIC, B1_PIC, B1_PIC },
96
    { P_PIC, B_PIC, B1_PIC, B2_PIC, B2_PIC, B1_PIC, B2_PIC, B2_PIC },
97
};
98
99
UWORD8 gau1_use_by_cur_pic_flag[MAX_REF_PICS] = { 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 };
100
101
/*****************************************************************************/
102
/* Function Definitions                                                      */
103
/*****************************************************************************/
104
105
/*!
106
************************************************************************
107
* \brief
108
*    return number of records used by LAP
109
*
110
************************************************************************
111
*/
112
WORD32 ihevce_lap_get_num_mem_recs(void)
113
14.7k
{
114
14.7k
    return (NUM_LAP_MEM_RECS);
115
14.7k
}
116
117
/*!
118
************************************************************************
119
* @brief
120
*    return each record attributes of LAP
121
************************************************************************
122
*/
123
WORD32 ihevce_lap_get_mem_recs(iv_mem_rec_t *ps_mem_tab, WORD32 i4_mem_space)
124
7.38k
{
125
    /* number of NODE memory */
126
7.38k
    WORD32 max_nodes = MAX_SUB_GOP_SIZE - 1;
127
128
7.38k
    ps_mem_tab[LAP_CTXT].i4_mem_size = sizeof(lap_struct_t);
129
7.38k
    ps_mem_tab[LAP_CTXT].e_mem_type = (IV_MEM_TYPE_T)i4_mem_space;
130
7.38k
    ps_mem_tab[LAP_CTXT].i4_mem_alignment = 8;
131
132
    /* Node memory for 2 sub-gops*/
133
7.38k
    ps_mem_tab[LAP_NODE_MEM].i4_mem_size = (max_nodes * sizeof(ihevce_encode_node_t));
134
135
7.38k
    ps_mem_tab[LAP_NODE_MEM].e_mem_type = (IV_MEM_TYPE_T)i4_mem_space;
136
137
7.38k
    ps_mem_tab[LAP_NODE_MEM].i4_mem_alignment = 8;
138
139
7.38k
    return (NUM_LAP_MEM_RECS);
140
7.38k
}
141
142
/*!
143
************************************************************************
144
* @brief
145
*    Init LAP structure
146
************************************************************************
147
*/
148
void *ihevce_lap_init(
149
    iv_mem_rec_t *ps_mem_tab,
150
    ihevce_lap_static_params_t *ps_lap_params,
151
    ihevce_static_cfg_params_t *ps_static_cfg_prms)
152
7.38k
{
153
7.38k
    WORD32 i4_src_interlace_field;
154
7.38k
    WORD32 i4_max_temporal_layers;
155
7.38k
    ihevce_encode_node_t *ps_encode_node_struct;
156
7.38k
    lap_struct_t *ps_lap_struct = (lap_struct_t *)ps_mem_tab[LAP_CTXT].pv_base;
157
7.38k
    ihevce_lap_static_params_t *ps_lap_static_params = &ps_lap_struct->s_lap_static_params;
158
7.38k
    ps_lap_struct->aps_encode_node[0] = (ihevce_encode_node_t *)ps_mem_tab[LAP_NODE_MEM].pv_base;
159
160
7.38k
    memcpy(
161
7.38k
        &ps_lap_struct->s_static_cfg_params,
162
7.38k
        ps_static_cfg_prms,
163
7.38k
        sizeof(ihevce_static_cfg_params_t));
164
7.38k
    memmove(ps_lap_static_params, ps_lap_params, sizeof(ihevce_lap_static_params_t));
165
7.38k
    ps_lap_static_params->e_arch_type = ps_static_cfg_prms->e_arch_type;
166
167
    /* Set the array to zero */
168
7.38k
    memset(&ps_lap_struct->ai4_capture_order_poc[0], 0, MAX_NUM_ENC_NODES * sizeof(WORD32));
169
7.38k
    memset(&ps_lap_struct->ai4_encode_order_poc[0], 0, MAX_NUM_ENC_NODES * sizeof(WORD32));
170
7.38k
    memset(&ps_lap_struct->ref_poc_array[0], 0xFF, sizeof(ps_lap_struct->ref_poc_array));
171
7.38k
    memset(&ps_lap_struct->ai4_pic_type_to_be_removed, 0, NUM_LAP2_LOOK_AHEAD * sizeof(WORD32));
172
7.38k
    memset(&ps_lap_struct->ai4_num_buffer[0], 0, sizeof(ps_lap_struct->ai4_num_buffer));
173
174
7.38k
    ps_lap_struct->i4_curr_poc = 0;
175
7.38k
    ps_lap_struct->i4_cra_poc = 0;
176
177
7.38k
    i4_max_temporal_layers = ps_lap_static_params->i4_max_temporal_layers;
178
7.38k
    i4_src_interlace_field = ps_lap_static_params->i4_src_interlace_field;
179
7.38k
    ps_lap_struct->i4_max_idr_period =
180
7.38k
        ps_static_cfg_prms->s_coding_tools_prms.i4_max_closed_gop_period;
181
7.38k
    ps_lap_struct->i4_min_idr_period =
182
7.38k
        ps_static_cfg_prms->s_coding_tools_prms.i4_min_closed_gop_period;
183
7.38k
    ps_lap_struct->i4_max_cra_period =
184
7.38k
        ps_static_cfg_prms->s_coding_tools_prms.i4_max_cra_open_gop_period;
185
7.38k
    ps_lap_struct->i4_max_i_period =
186
7.38k
        ps_static_cfg_prms->s_coding_tools_prms.i4_max_i_open_gop_period;
187
7.38k
    ps_lap_struct->i4_idr_counter = 0;
188
7.38k
    ps_lap_struct->i4_cra_counter = 0;
189
7.38k
    ps_lap_struct->i4_i_counter = 0;
190
7.38k
    ps_lap_struct->i4_idr_gop_num = -1;
191
7.38k
    ps_lap_struct->i4_curr_ref_pics = 0;
192
7.38k
    ps_lap_struct->i4_display_num = 0;
193
7.38k
    ps_lap_struct->i4_num_frm_type_decided = 0;
194
7.38k
    ps_lap_struct->i4_next_start_ctr = 0;
195
7.38k
    ps_lap_struct->ai1_pic_type[0] = PIC_TYPE_IDR;
196
197
7.38k
    ps_lap_struct->i4_enable_logo = ps_lap_static_params->i4_enable_logo;
198
7.38k
    ps_lap_struct->i4_cra_i_pic_flag = 0;
199
7.38k
    ps_lap_struct->i4_force_end_flag = 0;
200
7.38k
    ps_lap_struct->i4_sub_gop_size = (1 << i4_max_temporal_layers);
201
7.38k
    ps_lap_struct->i4_sub_gop_size_idr =
202
7.38k
        ps_lap_struct->i4_sub_gop_size + (i4_max_temporal_layers > 0);
203
204
7.38k
    ps_lap_struct->i4_is_all_i_pic_in_seq = 0;
205
206
7.38k
    if(ps_lap_struct->i4_max_idr_period == 1 || ps_lap_struct->i4_max_cra_period == 1 ||
207
7.00k
       ps_lap_struct->i4_max_i_period == 1)
208
553
    {
209
553
        ps_lap_struct->i4_is_all_i_pic_in_seq = 1;
210
553
    }
211
212
7.38k
    if(1 == i4_src_interlace_field && (!ps_lap_struct->i4_is_all_i_pic_in_seq))
213
0
    {
214
0
        ps_lap_struct->i4_sub_gop_size <<= 1;
215
0
        ps_lap_struct->i4_sub_gop_size_idr <<= 1;
216
0
    }
217
218
7.38k
    ps_lap_struct->i4_fixed_open_gop_period = 1;
219
7.38k
    ps_lap_struct->i4_fixed_i_period = 1;
220
221
7.38k
    if(ps_static_cfg_prms->s_coding_tools_prms.i4_max_closed_gop_period <=
222
7.38k
       ps_lap_struct->i4_sub_gop_size)
223
2.66k
    {
224
2.66k
        ps_lap_struct->i4_min_idr_period =
225
2.66k
            ps_static_cfg_prms->s_coding_tools_prms.i4_max_closed_gop_period;
226
2.66k
    }
227
7.38k
    if(ps_lap_struct->i4_max_idr_period)
228
4.93k
    {
229
4.93k
        if(ps_lap_struct->i4_max_cra_period)
230
3.05k
        {
231
3.05k
            ps_lap_struct->i4_gop_period = ps_lap_struct->i4_max_cra_period;
232
3.05k
        }
233
1.87k
        else if(ps_lap_struct->i4_max_i_period)
234
768
        {
235
768
            ps_lap_struct->i4_gop_period = ps_lap_struct->i4_max_i_period;
236
768
        }
237
1.10k
        else
238
1.10k
        {
239
1.10k
            ps_lap_struct->i4_gop_period = ps_lap_struct->i4_max_idr_period;
240
1.10k
        }
241
4.93k
    }
242
2.45k
    else
243
2.45k
    {
244
2.45k
        if(ps_lap_struct->i4_max_i_period)
245
613
        {
246
613
            ps_lap_struct->i4_gop_period = ps_lap_struct->i4_max_i_period;
247
613
        }
248
1.84k
        else if(ps_lap_struct->i4_max_cra_period)
249
859
        {
250
859
            ps_lap_struct->i4_gop_period = ps_lap_struct->i4_max_cra_period;
251
859
        }
252
2.45k
    }
253
254
7.38k
    if(!ps_lap_struct->i4_max_i_period)
255
3.46k
    {
256
3.46k
        ps_lap_struct->i4_max_i_period =
257
3.46k
            2 * MAX(ps_lap_struct->i4_max_idr_period, ps_lap_struct->i4_max_cra_period);
258
3.46k
    }
259
260
7.38k
    ps_lap_struct->i4_no_back_to_back_i_avoidance = 0;
261
262
    /*Infinite GOP case*/
263
7.38k
    if(!ps_lap_struct->i4_gop_period)
264
981
    {
265
        /*max signed 32 bit value which will be ~ 414 days considering 60frames/fields per second*/
266
981
        ps_lap_struct->i4_max_i_period = 0x7fffffff;
267
981
        ps_lap_struct->i4_gop_period =
268
981
            (INFINITE_GOP_CDR_TIME_S * (ps_static_cfg_prms->s_src_prms.i4_frm_rate_num /
269
981
                                        ps_static_cfg_prms->s_src_prms.i4_frm_rate_denom));
270
981
    }
271
272
7.38k
    if(ps_lap_struct->i4_gop_period < (2 * ps_lap_struct->i4_sub_gop_size))
273
823
    {
274
823
        ps_lap_struct->i4_no_back_to_back_i_avoidance = 1;
275
823
    }
276
277
7.38k
    ps_lap_struct->i4_rc_lap_period =
278
7.38k
        ps_static_cfg_prms->s_lap_prms.i4_rc_look_ahead_pics + MIN_L1_L0_STAGGER_NON_SEQ;
279
7.38k
    ps_lap_struct->pv_prev_inp_buf = NULL;
280
7.38k
    ps_lap_struct->i4_buf_deq_idx = 0;
281
7.38k
    ps_lap_struct->i4_deq_idx = 0;
282
7.38k
    ps_lap_struct->i4_enq_idx = 0;
283
7.38k
    ps_lap_struct->i4_lap2_counter = 0;
284
7.38k
    ps_lap_struct->i4_dyn_sub_gop_size = ps_lap_struct->i4_sub_gop_size;
285
7.38k
    ps_lap_struct->i4_buf_enq_idx = 0;
286
7.38k
    ps_lap_struct->i4_lap_out_idx = 0;
287
7.38k
    ps_lap_struct->i4_capture_idx = 0;
288
7.38k
    ps_lap_struct->i4_idr_flag = 1;
289
7.38k
    ps_lap_struct->i4_num_bufs_encode_order = 0;
290
7.38k
    ps_lap_struct->end_flag = 0;
291
7.38k
    ps_lap_struct->i4_immediate_idr_case = 0;
292
7.38k
    ps_lap_struct->i4_max_buf_in_enc_order = 0;
293
7.38k
    ps_lap_struct->i4_end_flag_pic_idx = 0;
294
7.38k
    memset(
295
7.38k
        &ps_lap_struct->api4_encode_order_array[0],
296
7.38k
        0,
297
7.38k
        sizeof(ihevce_lap_enc_buf_t *) * MAX_NUM_ENC_NODES);
298
7.38k
    ps_lap_struct->i4_sub_gop_pic_idx = 0;
299
7.38k
    ps_lap_struct->i4_force_idr_pos = 0;
300
7.38k
    ps_lap_struct->i4_num_dummy_pic = 0;
301
7.38k
    ps_lap_struct->i4_lap_encode_idx = 0;
302
7.38k
    ps_lap_struct->i4_deq_lap_buf = 0;
303
7.38k
    ps_lap_struct->i4_sub_gop_end = 0;
304
305
7.38k
    {
306
7.38k
        WORD32 node_offset, curr_layer;
307
7.38k
        WORD32 i;
308
        /*intialization of aps_lap_inp_buf*/
309
583k
        for(i = 0; i < MAX_QUEUE_LENGTH; i++)
310
576k
        {
311
576k
            ps_lap_struct->aps_lap_inp_buf[i] = NULL;
312
576k
        }
313
314
        /* init capture order and encode order pointer */
315
7.38k
        ps_lap_struct->pi4_capture_poc_ptr = &ps_lap_struct->ai4_capture_order_poc[0];
316
7.38k
        ps_lap_struct->pi4_encode_poc_ptr = &ps_lap_struct->ai4_encode_order_poc[0];
317
318
        /* init all the buffer status to default values */
319
7.38k
        ps_encode_node_struct = ps_lap_struct->aps_encode_node[0];
320
321
7.38k
        ps_encode_node_struct->pv_left_node = NULL;
322
7.38k
        ps_encode_node_struct->pv_right_node = NULL;
323
324
        /* Initialise the tree */
325
7.38k
        node_offset = 1;
326
7.38k
        curr_layer = 0;
327
7.38k
        ihevce_populate_tree_nodes(
328
7.38k
            ps_encode_node_struct,
329
7.38k
            ps_encode_node_struct,
330
7.38k
            &node_offset,
331
7.38k
            curr_layer,
332
7.38k
            ps_lap_static_params->i4_max_temporal_layers);
333
7.38k
    }
334
335
7.38k
    ps_mem_tab += NUM_LAP_MEM_RECS;
336
337
7.38k
    return ((void *)ps_lap_struct);
338
7.38k
}
339
340
/*!
341
******************************************************************************
342
* \if Function name : ihevce_populate_tree_nodes \endif
343
*
344
* \brief
345
*    LAP populate nodes function
346
*
347
* \param[in] encode_parent_node_t node pointer to base
348
*            encode_node_t        node pointer to current buffer
349
*            loop_count                layer count
350
*            hier_layer           total layers
351
* \return
352
*    None
353
*
354
* \author
355
*  Ittiam
356
*
357
*****************************************************************************
358
*/
359
void ihevce_populate_tree_nodes(
360
    ihevce_encode_node_t *encode_parent_node_t,
361
    ihevce_encode_node_t *encode_node_t,
362
    WORD32 *loop_count,
363
    WORD32 layer,
364
    WORD32 hier_layer)
365
20.6k
{
366
    /* If only I/P pictures, return NULL from the child nodes*/
367
20.6k
    if(hier_layer == 0)
368
5.18k
    {
369
5.18k
        encode_node_t->pv_left_node = NULL;
370
5.18k
        encode_node_t->pv_right_node = NULL;
371
5.18k
        return;
372
5.18k
    }
373
15.4k
    if(layer == hier_layer)
374
8.81k
        return;
375
376
6.61k
    layer = layer + 1;
377
378
    /* If the layers are not exhausted */
379
6.61k
    if(layer < hier_layer)
380
2.20k
    {
381
2.20k
        encode_node_t->pv_left_node = encode_parent_node_t + (*loop_count);
382
2.20k
        encode_node_t->pv_right_node = encode_parent_node_t + (*loop_count + 1);
383
2.20k
        (*loop_count) = (*loop_count) + 2;
384
2.20k
    }
385
4.40k
    else
386
4.40k
    {
387
4.40k
        encode_node_t->pv_left_node = NULL;
388
4.40k
        encode_node_t->pv_right_node = NULL;
389
4.40k
    }
390
391
    /* Populate Left tree nodes */
392
6.61k
    ihevce_populate_tree_nodes(
393
6.61k
        encode_parent_node_t,
394
6.61k
        (ihevce_encode_node_t *)encode_node_t->pv_left_node,
395
6.61k
        loop_count,
396
6.61k
        layer,
397
6.61k
        hier_layer);
398
399
    /* Populate right tree nodes */
400
6.61k
    ihevce_populate_tree_nodes(
401
6.61k
        encode_parent_node_t,
402
6.61k
        (ihevce_encode_node_t *)encode_node_t->pv_right_node,
403
6.61k
        loop_count,
404
6.61k
        layer,
405
6.61k
        hier_layer);
406
6.61k
}
407
408
/*!
409
************************************************************************
410
* \brief
411
*    pad input when its dimensions are not aligned to LCU size
412
************************************************************************
413
*/
414
void ihevce_lap_pad_input_bufs(
415
    ihevce_lap_enc_buf_t *ps_curr_inp, WORD32 align_pic_wd, WORD32 align_pic_ht)
416
110k
{
417
    /* local variables */
418
110k
    WORD32 ctr_horz, ctr_vert;
419
420
    /* ------- Horizontal Right Padding ------ */
421
110k
    if(align_pic_wd != ps_curr_inp->s_lap_out.s_input_buf.i4_y_wd)
422
5.83k
    {
423
5.83k
        UWORD8 *pu1_inp;
424
5.83k
        UWORD16 *pu2_inp;
425
5.83k
        WORD32 pad_wd;
426
5.83k
        WORD32 pad_ht;
427
428
        /* ------------- LUMA ----------------------------- */
429
        /* derive the pointers and dimensions to be padded */
430
5.83k
        pad_ht = ps_curr_inp->s_lap_out.s_input_buf.i4_y_ht;
431
5.83k
        pad_wd = align_pic_wd - ps_curr_inp->s_lap_out.s_input_buf.i4_y_wd;
432
5.83k
        pu1_inp = (UWORD8 *)ps_curr_inp->s_lap_out.s_input_buf.pv_y_buf;
433
5.83k
        pu1_inp += ps_curr_inp->s_lap_out.s_input_buf.i4_y_wd;
434
435
        /* loops for padding the right region for entire pic */
436
551k
        for(ctr_vert = 0; ctr_vert < pad_ht; ctr_vert++)
437
545k
        {
438
2.61M
            for(ctr_horz = 0; ctr_horz < pad_wd; ctr_horz++)
439
2.06M
            {
440
                /* last pixel is replicated */
441
2.06M
                pu1_inp[ctr_horz] = pu1_inp[-1];
442
2.06M
            }
443
444
            /* row level increments */
445
545k
            pu1_inp += ps_curr_inp->s_lap_out.s_input_buf.i4_y_strd;
446
545k
        }
447
448
        /* ------------- CHROMA ---------------------------- */
449
        /* derive the pointers and dimensions to be padded */
450
5.83k
        pad_ht = ps_curr_inp->s_lap_out.s_input_buf.i4_uv_ht;
451
5.83k
        pad_wd = align_pic_wd - ps_curr_inp->s_lap_out.s_input_buf.i4_uv_wd;
452
5.83k
        pad_wd >>= 1;
453
5.83k
        pu1_inp = (UWORD8 *)ps_curr_inp->s_lap_out.s_input_buf.pv_u_buf;
454
5.83k
        pu2_inp = (UWORD16 *)(pu1_inp + ps_curr_inp->s_lap_out.s_input_buf.i4_uv_wd);
455
456
        /* loops for padding the right region for entire pic */
457
278k
        for(ctr_vert = 0; ctr_vert < pad_ht; ctr_vert++)
458
272k
        {
459
789k
            for(ctr_horz = 0; ctr_horz < pad_wd; ctr_horz++)
460
516k
            {
461
                /* last pixel is replicated, cb and cr pixel interleaved */
462
516k
                pu2_inp[ctr_horz] = pu2_inp[-1];
463
516k
            }
464
465
            /* row level increments */
466
272k
            pu2_inp += (ps_curr_inp->s_lap_out.s_input_buf.i4_uv_strd >> 1);
467
272k
        }
468
5.83k
    }
469
470
    /* ------- Vertical Bottom Padding ------ */
471
110k
    if(align_pic_ht != ps_curr_inp->s_lap_out.s_input_buf.i4_y_ht)
472
3.97k
    {
473
3.97k
        UWORD8 *pu1_inp, *pu1_src;
474
3.97k
        WORD32 pad_ht;
475
476
        /* ------------- LUMA ----------------------------- */
477
        /* derive the pointers and dimensions to be padded */
478
3.97k
        pad_ht = align_pic_ht - ps_curr_inp->s_lap_out.s_input_buf.i4_y_ht;
479
3.97k
        pu1_inp = (UWORD8 *)ps_curr_inp->s_lap_out.s_input_buf.pv_y_buf;
480
3.97k
        pu1_inp += ps_curr_inp->s_lap_out.s_input_buf.i4_y_ht *
481
3.97k
                   ps_curr_inp->s_lap_out.s_input_buf.i4_y_strd;
482
483
        /* get the pointer of last row */
484
3.97k
        pu1_src = pu1_inp - ps_curr_inp->s_lap_out.s_input_buf.i4_y_strd;
485
486
        /* loops for padding the bottom region for entire row */
487
22.4k
        for(ctr_vert = 0; ctr_vert < pad_ht; ctr_vert++)
488
18.4k
        {
489
            /* copy the eniter orw including horz padd region */
490
18.4k
            memcpy(pu1_inp, pu1_src, align_pic_wd);
491
492
            /* row level increments */
493
18.4k
            pu1_inp += ps_curr_inp->s_lap_out.s_input_buf.i4_y_strd;
494
18.4k
        }
495
496
        /* ------------- CHROMA ----------------------------- */
497
        /* derive the pointers and dimensions to be padded */
498
3.97k
        pad_ht = (align_pic_ht >> 1) - ps_curr_inp->s_lap_out.s_input_buf.i4_uv_ht;
499
3.97k
        pu1_inp = (UWORD8 *)ps_curr_inp->s_lap_out.s_input_buf.pv_u_buf;
500
3.97k
        pu1_inp += ps_curr_inp->s_lap_out.s_input_buf.i4_uv_ht *
501
3.97k
                   ps_curr_inp->s_lap_out.s_input_buf.i4_uv_strd;
502
503
        /* get the pointer of last row */
504
3.97k
        pu1_src = pu1_inp - ps_curr_inp->s_lap_out.s_input_buf.i4_uv_strd;
505
506
        /* loops for padding the bottom region for entire row */
507
13.2k
        for(ctr_vert = 0; ctr_vert < pad_ht; ctr_vert++)
508
9.23k
        {
509
            /* copy the eniter orw including horz padd region */
510
9.23k
            memcpy(pu1_inp, pu1_src, align_pic_wd);
511
512
            /* row level increments */
513
9.23k
            pu1_inp += ps_curr_inp->s_lap_out.s_input_buf.i4_uv_strd;
514
9.23k
        }
515
3.97k
    }
516
110k
    return;
517
110k
}
518
519
/*!
520
************************************************************************
521
* \brief
522
*    check for last inp buf
523
************************************************************************
524
*/
525
WORD32 ihevce_check_last_inp_buf(WORD32 *pi4_cmd_buf)
526
118k
{
527
118k
    WORD32 cmd = (*pi4_cmd_buf) & (IHEVCE_COMMANDS_TAG_MASK);
528
529
118k
    if(IHEVCE_SYNCH_API_FLUSH_TAG == cmd)
530
7.38k
        return 1;
531
110k
    return 0;
532
118k
}
533
534
/*!
535
************************************************************************
536
* \brief
537
*    lap parse sync commands
538
************************************************************************
539
*/
540
void ihevce_lap_parse_sync_cmd(
541
    ihevce_hle_ctxt_t *ps_hle_ctxt,
542
    ihevce_static_cfg_params_t *ps_static_cfg_prms,
543
    WORD32 *pi4_cmd_buf,
544
    ihevce_lap_enc_buf_t *ps_lap_inp_buf,
545
    WORD32 *pi4_flush_check,
546
    WORD32 *pi4_force_idr_check)
547
118k
{
548
118k
    WORD32 *pi4_tag_parse = pi4_cmd_buf;
549
118k
    WORD32 i4_cmd_size = ps_lap_inp_buf->s_input_buf.i4_cmd_buf_size;
550
118k
    WORD32 i4_buf_id = ps_lap_inp_buf->s_input_buf.i4_buf_id;
551
118k
#ifndef DISABLE_SEI
552
118k
    UWORD32 u4_num_sei = 0;
553
118k
#endif
554
118k
    WORD32 i4_end_flag = 0;
555
556
126k
    while(i4_cmd_size >= 4)
557
126k
    {
558
126k
        switch((*pi4_tag_parse) & (IHEVCE_COMMANDS_TAG_MASK))
559
126k
        {
560
7.38k
        case IHEVCE_SYNCH_API_FLUSH_TAG:
561
7.38k
            if(i4_cmd_size < 8 || pi4_tag_parse[1])
562
0
            {
563
0
                ps_hle_ctxt->ihevce_cmds_error_report(
564
0
                    ps_hle_ctxt->pv_cmd_err_cb_handle,
565
0
                    IHEVCE_SYNCH_ERR_LENGTH_NOT_ZERO,
566
0
                    1,
567
0
                    i4_buf_id);
568
0
                return;
569
0
            }
570
7.38k
            (*pi4_flush_check) = 1;
571
7.38k
            pi4_tag_parse += 2;
572
7.38k
            i4_cmd_size -= 8;
573
7.38k
#ifndef DISABLE_SEI
574
7.38k
            u4_num_sei++;
575
7.38k
#endif
576
7.38k
            break;
577
1.21k
        case IHEVCE_SYNCH_API_FORCE_IDR_TAG:
578
1.21k
            if(i4_cmd_size < 8 || pi4_tag_parse[1])
579
0
            {
580
0
                ps_hle_ctxt->ihevce_cmds_error_report(
581
0
                    ps_hle_ctxt->pv_cmd_err_cb_handle,
582
0
                    IHEVCE_SYNCH_ERR_LENGTH_NOT_ZERO,
583
0
                    1,
584
0
                    i4_buf_id);
585
0
                return;
586
0
            }
587
1.21k
            (*pi4_force_idr_check) = 1;
588
1.21k
            pi4_tag_parse += 2;
589
1.21k
            i4_cmd_size -= 8;
590
1.21k
#ifndef DISABLE_SEI
591
1.21k
            u4_num_sei++;
592
1.21k
#endif
593
1.21k
            break;
594
118k
        case IHEVCE_SYNCH_API_END_TAG:
595
118k
            i4_end_flag = 1;
596
118k
            i4_cmd_size -= 4;
597
118k
            break;
598
0
        default:
599
0
            ps_hle_ctxt->ihevce_cmds_error_report(
600
0
                ps_hle_ctxt->pv_cmd_err_cb_handle, IHEVCE_SYNCH_ERR_TLV_ERROR, 1, i4_buf_id);
601
0
            i4_end_flag = 1;
602
126k
        }
603
126k
        if(i4_end_flag)
604
118k
            break;
605
126k
    }
606
118k
#ifndef DISABLE_SEI
607
118k
    if(u4_num_sei > MAX_NUMBER_OF_SEI_PAYLOAD)  //Checking for max number of SEI messages.
608
0
        ps_hle_ctxt->ihevce_cmds_error_report(
609
0
            ps_hle_ctxt->pv_cmd_err_cb_handle, IHEVCE_SYNCH_ERR_TOO_MANY_SEI_MSG, 1, i4_buf_id);
610
118k
#endif
611
612
118k
    if(!i4_end_flag)
613
0
        ps_hle_ctxt->ihevce_cmds_error_report(
614
0
            ps_hle_ctxt->pv_cmd_err_cb_handle, IHEVCE_SYNCH_ERR_NO_END_TAG, 1, i4_buf_id);
615
118k
}
616
617
/*!
618
************************************************************************
619
* \brief
620
*    lap parse Async commands
621
************************************************************************
622
*/
623
void ihevce_lap_parse_async_cmd(
624
    ihevce_hle_ctxt_t *ps_hle_ctxt,
625
    WORD32 *pi4_cmd_buf,
626
    WORD32 i4_length,
627
    WORD32 i4_buf_id,
628
    WORD32 *pi4_num_set_bitrate_cmds,
629
    ihevce_dyn_config_prms_t *ps_dyn_br)
630
5.08k
{
631
5.08k
    WORD32 i4_end_flag = 0;
632
5.08k
    WORD32 *pi4_tag_parse = pi4_cmd_buf;
633
634
10.1k
    while(i4_length >= 4)
635
10.1k
    {
636
10.1k
        switch(*pi4_tag_parse)
637
10.1k
        {
638
5.08k
        case IHEVCE_ASYNCH_API_SETBITRATE_TAG:
639
5.08k
            if(i4_length < (8 + sizeof(ihevce_dyn_config_prms_t)) ||
640
5.08k
               pi4_tag_parse[1] != sizeof(ihevce_dyn_config_prms_t))
641
0
            {
642
0
                ps_hle_ctxt->ihevce_cmds_error_report(
643
0
                    ps_hle_ctxt->pv_cmd_err_cb_handle, IHEVCE_ASYNCH_ERR_BR_NOT_BYTE, 1, i4_buf_id);
644
0
                return;
645
0
            }
646
5.08k
            memcpy(
647
5.08k
                (void *)ps_dyn_br, (void *)(pi4_tag_parse + 2), sizeof(ihevce_dyn_config_prms_t));
648
5.08k
            pi4_tag_parse += (2 + (sizeof(ihevce_dyn_config_prms_t) >> 2));
649
5.08k
            i4_length -= (8 + sizeof(ihevce_dyn_config_prms_t));
650
5.08k
            *pi4_num_set_bitrate_cmds += 1;
651
5.08k
            ps_dyn_br++;
652
5.08k
            break;
653
5.08k
        case IHEVCE_ASYNCH_API_END_TAG:
654
5.08k
            i4_end_flag = 1;
655
5.08k
            i4_length -= 4;
656
5.08k
            break;
657
0
        default:
658
0
            ps_hle_ctxt->ihevce_cmds_error_report(
659
0
                ps_hle_ctxt->pv_cmd_err_cb_handle, IHEVCE_ASYNCH_ERR_TLV_ERROR, 1, i4_buf_id);
660
0
            i4_end_flag = 1;
661
10.1k
        }
662
10.1k
        if(i4_end_flag)
663
5.08k
            break;
664
10.1k
    }
665
5.08k
    if(!i4_end_flag)
666
0
        ps_hle_ctxt->ihevce_cmds_error_report(
667
0
            ps_hle_ctxt->pv_cmd_err_cb_handle, IHEVCE_ASYNCH_ERR_NO_END_TAG, 1, i4_buf_id);
668
5.08k
}
669
670
/*!
671
************************************************************************
672
* \brief
673
*    ref pics weight offset calculation
674
************************************************************************
675
*/
676
void ref_pics_weight_offset_calc(ihevce_lap_output_params_t *ps_lap_out, lap_struct_t *ps_lap_struct)
677
118k
{
678
118k
    WORD32 i, j;
679
118k
    WORD32 *ref_poc_array = ps_lap_struct->ref_poc_array;
680
118k
    WORD32 ai4_delta_poc[MAX_REF_PICS];
681
118k
    WORD32 ref_poc_arr_sort[MAX_REF_PICS];
682
683
    /* Default weighted pred parameters populated for  now */
684
118k
    ps_lap_out->i4_log2_luma_wght_denom = DENOM_DEFAULT;
685
118k
    ps_lap_out->i4_log2_chroma_wght_denom = DENOM_DEFAULT;
686
687
    /* sort the ref_poc_array based on delta as
688
     * in case weighted pred dup pics are inserted and it should consider
689
     * the neighbors first for prediction than farthest */
690
385k
    for(i = 0; i < ps_lap_struct->i4_curr_ref_pics; i++)
691
267k
    {
692
267k
        ai4_delta_poc[i] = ref_poc_array[i] - ps_lap_out->i4_poc;
693
267k
    }
694
695
385k
    for(i = 0; i < ps_lap_struct->i4_curr_ref_pics; i++)
696
267k
    {
697
267k
        WORD32 i4_min, temp;
698
267k
        i4_min = i;
699
866k
        for(j = i; j < ps_lap_struct->i4_curr_ref_pics; j++)
700
598k
        {
701
598k
            if(abs(ai4_delta_poc[j]) <= abs(ai4_delta_poc[i4_min]))
702
394k
            {
703
394k
                i4_min = j;
704
394k
            }
705
598k
        }
706
267k
        temp = ai4_delta_poc[i];
707
267k
        ai4_delta_poc[i] = ai4_delta_poc[i4_min];
708
267k
        ai4_delta_poc[i4_min] = temp;
709
267k
        ref_poc_arr_sort[i] = ai4_delta_poc[i] + ps_lap_out->i4_poc;
710
267k
    }
711
712
385k
    for(i = 0; i < ps_lap_struct->i4_curr_ref_pics; i++)
713
267k
    {
714
267k
        ps_lap_out->as_ref_pics[i].i4_ref_pic_delta_poc = ref_poc_arr_sort[i] - ps_lap_out->i4_poc;
715
267k
        ASSERT(ps_lap_out->as_ref_pics[i].i4_ref_pic_delta_poc);
716
717
        /* Enable flag for the reference pics to be used by curr pic */
718
267k
        ps_lap_out->as_ref_pics[i].i4_used_by_cur_pic_flag = gau1_use_by_cur_pic_flag[i];
719
720
        /* Currently no weighted prediction offset added */
721
267k
        ps_lap_out->as_ref_pics[i].i4_num_duplicate_entries_in_ref_list = 1;
722
267k
    }
723
118k
    return;
724
118k
}
725
726
/*!
727
************************************************************************
728
* \brief
729
*    ref b picture population
730
************************************************************************
731
*/
732
void ref_b_pic_population(
733
    WORD32 curr_layer, ihevce_lap_enc_buf_t *ps_lap_inp, lap_struct_t *ps_lap_struct)
734
18.7k
{
735
18.7k
    ihevce_lap_output_params_t *ps_lap_out = &ps_lap_inp->s_lap_out;
736
18.7k
    WORD32 *ref_poc_array = ps_lap_struct->ref_poc_array;
737
18.7k
    WORD32 *p_ref_poc_array = ref_poc_array;
738
18.7k
    WORD32 i4_interlace_field = ps_lap_struct->s_lap_static_params.i4_src_interlace_field;
739
18.7k
    WORD32 i4_max_ref_pics = ps_lap_struct->s_lap_static_params.i4_max_reference_frames;
740
18.7k
    WORD32 max_temporal_layers = ps_lap_struct->s_lap_static_params.i4_max_temporal_layers;
741
742
    /* LAP output structure */
743
18.7k
    ps_lap_out->i4_poc = ps_lap_struct->pi4_encode_poc_ptr[0];
744
18.7k
    ps_lap_out->i4_idr_gop_num = ps_lap_struct->i4_idr_gop_num;
745
18.7k
    ps_lap_out->i4_assoc_IRAP_poc = ps_lap_struct->i4_assoc_IRAP_poc;
746
18.7k
    ps_lap_out->i4_temporal_lyr_id = curr_layer;
747
18.7k
    ps_lap_out->i4_pic_type = IV_B_FRAME;
748
749
18.7k
    if((ps_lap_out->i4_poc > ps_lap_struct->i4_cra_poc) &&
750
15.1k
       (ref_poc_array[0] < ps_lap_struct->i4_cra_poc) && ps_lap_struct->i4_cra_i_pic_flag)
751
105
    {
752
105
        ref_poc_array[0] = ps_lap_struct->i4_cra_poc;
753
105
        ps_lap_struct->i4_curr_ref_pics = 1;
754
105
    }
755
756
18.7k
    ps_lap_out->i4_num_ref_pics = ps_lap_struct->i4_curr_ref_pics;
757
758
    /* Default: Cur pic is ref pic*/
759
18.7k
    ps_lap_out->i4_is_ref_pic = 1;
760
761
18.7k
    if(1 == i4_interlace_field)
762
0
    {
763
0
        WORD32 i4_bottom_field = ps_lap_inp->s_input_buf.i4_bottom_field;
764
0
        WORD32 first_field = (ps_lap_inp->s_input_buf.i4_topfield_first ^ i4_bottom_field);
765
766
        /*If current pic is top field B picture and is present in top hierarchical layer */
767
        /* Dereference the curr pic */
768
0
        if(ps_lap_out->i4_temporal_lyr_id == max_temporal_layers)
769
0
        {
770
0
            if(0 == first_field)
771
0
                ps_lap_out->i4_is_ref_pic = 0;
772
0
            else
773
0
                ps_lap_out->i4_is_ref_pic = 2;
774
0
        }
775
0
    }
776
18.7k
    else
777
18.7k
    {
778
        /*If progressive B picture and is present in top hierarchical layer */
779
18.7k
        if(ps_lap_out->i4_temporal_lyr_id >= max_temporal_layers)
780
13.0k
        {
781
13.0k
            ps_lap_out->i4_temporal_lyr_id = max_temporal_layers;
782
13.0k
            ps_lap_out->i4_is_ref_pic = 0;
783
13.0k
        }
784
18.7k
    }
785
786
18.7k
    ref_pics_weight_offset_calc(ps_lap_out, ps_lap_struct);
787
788
    /* Updating number of current reference Pictures for the Given Picture */
789
    /* If the current frame is n-layer B frame, donot increment*/
790
18.7k
    if(ps_lap_struct->i4_curr_ref_pics < i4_max_ref_pics)
791
10.3k
    {
792
10.3k
        if(ps_lap_out->i4_is_ref_pic)
793
3.05k
        {
794
3.05k
            ps_lap_struct->i4_curr_ref_pics++;
795
3.05k
        }
796
10.3k
    }
797
798
    /* Arrange the reference array in ascending order */
799
18.7k
    {
800
18.7k
        WORD32 i, j, temp;
801
61.1k
        for(i = 0; i < (ps_lap_struct->i4_curr_ref_pics - 1); i++)
802
42.3k
        {
803
117k
            for(j = i + 1; j < ps_lap_struct->i4_curr_ref_pics; j++)
804
75.2k
            {
805
75.2k
                if(ref_poc_array[i] > ref_poc_array[j])
806
25.1k
                {
807
25.1k
                    temp = ref_poc_array[i];
808
25.1k
                    ref_poc_array[i] = ref_poc_array[j];
809
25.1k
                    ref_poc_array[j] = temp;
810
25.1k
                }
811
75.2k
            }
812
42.3k
        }
813
18.7k
    }
814
815
18.7k
    {
816
18.7k
        WORD32 ref = ps_lap_out->i4_poc;
817
18.7k
        if(ps_lap_out->i4_is_ref_pic && ref > *p_ref_poc_array)
818
5.68k
        {
819
5.68k
            *p_ref_poc_array = ref;
820
5.68k
        }
821
18.7k
    }
822
823
18.7k
    return;
824
18.7k
}
825
826
/*!
827
************************************************************************
828
* \brief
829
*    ref i/p pic population
830
************************************************************************
831
*/
832
void ref_pic_population(ihevce_lap_enc_buf_t *ps_lap_inp, lap_struct_t *ps_lap_struct)
833
99.4k
{
834
99.4k
    ihevce_lap_output_params_t *ps_lap_out = &ps_lap_inp->s_lap_out;
835
99.4k
    WORD32 *ref_poc_array = ps_lap_struct->ref_poc_array;
836
99.4k
    WORD32 *p_ref_poc_array = ref_poc_array;
837
99.4k
    WORD32 i4_max_ref_pics = ps_lap_struct->s_lap_static_params.i4_max_reference_frames;
838
839
    /* Update the POC position */
840
99.4k
    ps_lap_out->i4_poc = ps_lap_struct->pi4_encode_poc_ptr[0];
841
842
    /* picture after CRA can't refer pic before CRA*/
843
99.4k
    if((ps_lap_out->i4_poc > ps_lap_struct->i4_cra_poc) &&
844
77.5k
       (ref_poc_array[0] <= ps_lap_struct->i4_cra_poc) && ps_lap_struct->i4_cra_i_pic_flag)
845
22.8k
    {
846
22.8k
        ref_poc_array[0] = ps_lap_struct->i4_cra_poc;
847
22.8k
        ps_lap_struct->i4_curr_ref_pics = 1;
848
22.8k
    }
849
850
    /* For every IDR period, set pic type as IDR frame and reset reference POC array to 0*/
851
99.4k
    if(IV_IDR_FRAME == ps_lap_out->i4_pic_type)
852
21.9k
    {
853
21.9k
        ps_lap_struct->i4_idr_gop_num++;
854
21.9k
        ps_lap_struct->i4_curr_ref_pics = 0;
855
21.9k
        ps_lap_out->i4_num_ref_pics = 0;
856
21.9k
        ps_lap_struct->i4_cra_i_pic_flag = 1;
857
21.9k
        ps_lap_struct->i4_cra_poc = ps_lap_out->i4_poc;
858
859
21.9k
        memset(ps_lap_struct->ref_poc_array, 0xFF, sizeof(WORD32) * MAX_REF_PICS);
860
21.9k
    }
861
77.5k
    else if(IV_I_FRAME == ps_lap_out->i4_pic_type)
862
13.8k
    {
863
        /* For the I-frames after CRA Frame, no pictures should be referenced */
864
13.8k
        if((1 == ps_lap_struct->i4_cra_i_pic_flag) && ps_lap_out->i4_is_cra_pic)
865
6.85k
        {
866
6.85k
            ps_lap_struct->i4_curr_ref_pics = 0;
867
6.85k
            ps_lap_out->i4_num_ref_pics = 0;
868
6.85k
        }
869
13.8k
        ps_lap_struct->i4_cra_poc = ps_lap_out->i4_poc;
870
13.8k
        ps_lap_struct->i4_cra_i_pic_flag = ps_lap_out->i4_is_cra_pic;
871
13.8k
    }
872
63.6k
    else if(IV_P_FRAME == ps_lap_out->i4_pic_type)
873
63.6k
    {
874
        /* If the current POC is the P POC after CRA I POC */
875
63.6k
        if(1 == ps_lap_struct->i4_cra_i_pic_flag)
876
14.7k
        {
877
14.7k
            ps_lap_struct->i4_curr_ref_pics = 1;
878
14.7k
            ps_lap_struct->i4_cra_i_pic_flag = 0;
879
14.7k
        }
880
63.6k
    }
881
882
99.4k
    if(ps_lap_out->i4_pic_type == IV_IDR_FRAME ||
883
77.5k
       (ps_lap_out->i4_pic_type == IV_I_FRAME && ps_lap_out->i4_is_cra_pic))
884
30.6k
    {
885
30.6k
        ps_lap_struct->i4_assoc_IRAP_poc = ps_lap_out->i4_poc;
886
30.6k
    }
887
888
    /*Update ps_lap_out*/
889
99.4k
    ps_lap_out->i4_idr_gop_num = ps_lap_struct->i4_idr_gop_num;
890
99.4k
    ps_lap_out->i4_is_ref_pic = 1;
891
99.4k
    ps_lap_out->i4_assoc_IRAP_poc = ps_lap_struct->i4_assoc_IRAP_poc;
892
893
    /* Reference POCS */
894
99.4k
    ps_lap_out->i4_num_ref_pics = ps_lap_struct->i4_curr_ref_pics;
895
896
    /* I and P frames are always mapped to layer zero*/
897
99.4k
    ps_lap_out->i4_temporal_lyr_id = 0;
898
899
99.4k
    ref_pics_weight_offset_calc(ps_lap_out, ps_lap_struct);
900
901
99.4k
    if(ps_lap_struct->i4_curr_ref_pics < i4_max_ref_pics)
902
61.4k
    {
903
61.4k
        if(ps_lap_out->i4_is_ref_pic)
904
61.4k
        {
905
61.4k
            ps_lap_struct->i4_curr_ref_pics++;
906
61.4k
        }
907
61.4k
    }
908
909
    /* Arrange the reference array in ascending order */
910
99.4k
    {
911
99.4k
        WORD32 i, j, temp;
912
271k
        for(i = 0; i < (ps_lap_struct->i4_curr_ref_pics - 1); i++)
913
171k
        {
914
490k
            for(j = i + 1; j < (ps_lap_struct->i4_curr_ref_pics); j++)
915
318k
            {
916
318k
                if(ref_poc_array[i] > ref_poc_array[j])
917
189k
                {
918
189k
                    temp = ref_poc_array[i];
919
189k
                    ref_poc_array[i] = ref_poc_array[j];
920
189k
                    ref_poc_array[j] = temp;
921
189k
                }
922
318k
            }
923
171k
        }
924
99.4k
    }
925
926
99.4k
    {
927
        /* add the current pictute at the start of the reference queue */
928
        /*For I and P pictures, all the previous frames are reference frames */
929
        /* If the current ref POC is greater than the least POC in reference array*/
930
        /* Then fill the reference array */
931
932
99.4k
        WORD32 ref = ps_lap_out->i4_poc;
933
934
99.4k
        if(ps_lap_out->i4_is_ref_pic && ref > *p_ref_poc_array)
935
99.4k
        {
936
99.4k
            *p_ref_poc_array = ref;
937
99.4k
        }
938
99.4k
    }
939
940
99.4k
    return;
941
99.4k
}
942
943
/*!
944
************************************************************************
945
* \brief
946
*    determine next sub-gop state
947
************************************************************************
948
*/
949
void ihevce_determine_next_sub_gop_state(lap_struct_t *ps_lap_struct)
950
100k
{
951
100k
    WORD32 i4_num_b_frames = -1;
952
100k
    WORD32 i4_sd = ps_lap_struct->i4_sub_gop_size;
953
100k
    WORD32 i4_sd_idr = ps_lap_struct->i4_sub_gop_size_idr;
954
100k
    WORD32 i4_Midr = ps_lap_struct->i4_max_idr_period;
955
100k
    WORD32 i4_midr = ps_lap_struct->i4_min_idr_period;
956
100k
    WORD32 i4_Mcra = ps_lap_struct->i4_max_cra_period;
957
100k
    WORD32 i4_Mi = ps_lap_struct->i4_max_i_period;
958
100k
    WORD32 i4_Cd = ps_lap_struct->i4_idr_counter;
959
100k
    WORD32 i4_Cc = ps_lap_struct->i4_cra_counter;
960
100k
    WORD32 i4_Ci = ps_lap_struct->i4_i_counter;
961
962
100k
    if(ps_lap_struct->i4_force_idr_pos)
963
583
    {
964
583
        ps_lap_struct->i4_num_frm_type_decided = 1;
965
583
        ps_lap_struct->ai1_pic_type[0] = PIC_TYPE_IDR;
966
583
        ps_lap_struct->i4_idr_counter = 0;
967
583
        ps_lap_struct->i4_cra_counter = 0;
968
583
        ps_lap_struct->i4_i_counter = 0;
969
583
        ps_lap_struct->i4_force_idr_pos = 0;
970
583
        ps_lap_struct->i4_sub_gop_pic_idx = 0;
971
583
    }
972
973
100k
    if(i4_Midr)
974
71.1k
        ASSERT(i4_Cd < i4_Midr);
975
976
100k
    if(i4_Mcra)
977
54.8k
        ASSERT(i4_Cc < i4_Mcra);
978
979
100k
    if(i4_Mi)
980
100k
        ASSERT(i4_Ci < i4_Mi);
981
982
    /*if all are i pictures */
983
100k
    if((i4_Midr == 1) || (i4_Mcra == 1) || (i4_Mi == 1))
984
16.7k
    {
985
16.7k
        ps_lap_struct->i4_num_frm_type_decided = 1;
986
16.7k
        if((i4_Midr == 1) || ((i4_Cd + i4_sd) == i4_Midr))
987
6.43k
        {
988
6.43k
            ps_lap_struct->ai1_pic_type[1] = PIC_TYPE_IDR;
989
6.43k
            ps_lap_struct->i4_idr_counter = 0;
990
6.43k
            ps_lap_struct->i4_cra_counter = 0;
991
6.43k
            ps_lap_struct->i4_i_counter = 0;
992
6.43k
        }
993
10.3k
        else if((i4_Mcra == 1) || ((i4_Cc + i4_sd) == i4_Mcra))
994
7.21k
        {
995
7.21k
            ps_lap_struct->ai1_pic_type[1] = PIC_TYPE_CRA;
996
7.21k
            ps_lap_struct->i4_idr_counter += 1;
997
7.21k
            ps_lap_struct->i4_cra_counter = 0;
998
7.21k
            ps_lap_struct->i4_i_counter = 0;
999
7.21k
        }
1000
3.10k
        else
1001
3.10k
        {
1002
3.10k
            ps_lap_struct->ai1_pic_type[1] = PIC_TYPE_I;
1003
3.10k
            ps_lap_struct->i4_idr_counter += 1;
1004
3.10k
            ps_lap_struct->i4_cra_counter += 1;
1005
3.10k
            ps_lap_struct->i4_i_counter = 0;
1006
3.10k
        }
1007
16.7k
        return;
1008
16.7k
    }
1009
1010
84.1k
    if((i4_Cd + i4_sd_idr >= i4_Midr) && i4_Midr)
1011
9.22k
    {
1012
        /*if idr falls already on sub-gop aligned w.r.t Midr or if strict idr use case*/
1013
9.22k
        if(i4_sd_idr != i4_sd)
1014
2.42k
        {
1015
2.42k
            i4_num_b_frames = i4_Midr - i4_Cd - 2;
1016
2.42k
            memset(&ps_lap_struct->ai1_pic_type[1], PIC_TYPE_B, i4_num_b_frames);
1017
2.42k
            ps_lap_struct->ai1_pic_type[i4_num_b_frames + 1] = PIC_TYPE_P;
1018
2.42k
            ps_lap_struct->ai1_pic_type[i4_num_b_frames + 2] = PIC_TYPE_IDR;
1019
2.42k
            ps_lap_struct->i4_num_frm_type_decided = i4_num_b_frames + 2;
1020
2.42k
            ps_lap_struct->i4_idr_counter = 0;
1021
2.42k
            ps_lap_struct->i4_cra_counter = 0;
1022
2.42k
            ps_lap_struct->i4_i_counter = 0;
1023
2.42k
        }
1024
6.79k
        else
1025
6.79k
        {
1026
6.79k
            i4_num_b_frames = 0;
1027
6.79k
            ps_lap_struct->ai1_pic_type[1] = PIC_TYPE_IDR;
1028
6.79k
            ps_lap_struct->i4_num_frm_type_decided = 1;
1029
6.79k
            ps_lap_struct->i4_idr_counter = 0;
1030
6.79k
            ps_lap_struct->i4_cra_counter = 0;
1031
6.79k
            ps_lap_struct->i4_i_counter = 0;
1032
6.79k
        }
1033
9.22k
    }
1034
    /*if next sub gop is going to have CRA as Cc reaches Mcra*/
1035
74.9k
    else if(((i4_Cc + i4_sd) >= i4_Mcra) && i4_Mcra)
1036
2.81k
    {
1037
2.81k
        if(((i4_Cc + i4_sd) == i4_Mcra) || (1 == ps_lap_struct->i4_fixed_open_gop_period))
1038
2.81k
        {
1039
2.81k
            i4_num_b_frames = i4_Mcra - i4_Cc - 1;
1040
2.81k
            memset(&ps_lap_struct->ai1_pic_type[1], PIC_TYPE_B, i4_num_b_frames);
1041
2.81k
            ps_lap_struct->ai1_pic_type[i4_num_b_frames + 1] = PIC_TYPE_CRA;
1042
2.81k
            ps_lap_struct->i4_num_frm_type_decided = i4_num_b_frames + 1;
1043
2.81k
            ps_lap_struct->i4_idr_counter += ps_lap_struct->i4_num_frm_type_decided;
1044
2.81k
            ps_lap_struct->i4_cra_counter = 0;
1045
2.81k
            ps_lap_struct->i4_i_counter = 0;
1046
2.81k
        }
1047
0
        else
1048
0
        {
1049
0
            ps_lap_struct->ai1_pic_type[0] = PIC_TYPE_CRA;
1050
0
            i4_num_b_frames = i4_sd - 1;
1051
0
            memset(&ps_lap_struct->ai1_pic_type[1], PIC_TYPE_B, i4_num_b_frames);
1052
0
            ps_lap_struct->ai1_pic_type[i4_num_b_frames + 1] = PIC_TYPE_P;
1053
0
            ps_lap_struct->i4_num_frm_type_decided = i4_num_b_frames + 1;
1054
0
            ps_lap_struct->i4_idr_counter += ps_lap_struct->i4_num_frm_type_decided;
1055
0
            ps_lap_struct->i4_cra_counter = ps_lap_struct->i4_num_frm_type_decided;
1056
0
            ps_lap_struct->i4_i_counter = ps_lap_struct->i4_num_frm_type_decided;
1057
0
        }
1058
2.81k
    }
1059
    /*if next sub gop is going to have I_slice as Ci reaches Mi*/
1060
72.1k
    else if((i4_Ci + i4_sd >= i4_Mi) && i4_Mi)
1061
2.51k
    {
1062
2.51k
        if(((i4_Ci + i4_sd) == i4_Mi) || (1 == ps_lap_struct->i4_fixed_i_period))
1063
2.51k
        {
1064
2.51k
            i4_num_b_frames = i4_Mi - i4_Ci - 1;
1065
2.51k
            memset(&ps_lap_struct->ai1_pic_type[1], PIC_TYPE_B, i4_num_b_frames);
1066
2.51k
            ps_lap_struct->ai1_pic_type[i4_num_b_frames + 1] = PIC_TYPE_I;
1067
2.51k
            ps_lap_struct->i4_num_frm_type_decided = i4_num_b_frames + 1;
1068
2.51k
            ps_lap_struct->i4_idr_counter += ps_lap_struct->i4_num_frm_type_decided;
1069
2.51k
            ps_lap_struct->i4_cra_counter += ps_lap_struct->i4_num_frm_type_decided;
1070
2.51k
            ps_lap_struct->i4_i_counter = 0;
1071
2.51k
        }
1072
0
        else
1073
0
        {
1074
0
            ps_lap_struct->ai1_pic_type[0] = PIC_TYPE_I;
1075
0
            i4_num_b_frames = i4_sd - 1;
1076
0
            memset(&ps_lap_struct->ai1_pic_type[1], PIC_TYPE_B, i4_num_b_frames);
1077
0
            ps_lap_struct->ai1_pic_type[i4_num_b_frames + 1] = PIC_TYPE_P;
1078
0
            ps_lap_struct->i4_num_frm_type_decided = i4_num_b_frames + 1;
1079
0
            ps_lap_struct->i4_idr_counter += ps_lap_struct->i4_num_frm_type_decided;
1080
0
            ps_lap_struct->i4_cra_counter += ps_lap_struct->i4_num_frm_type_decided;
1081
0
            ps_lap_struct->i4_i_counter = ps_lap_struct->i4_num_frm_type_decided;
1082
0
        }
1083
2.51k
    }
1084
    /* if next sub-gop is not going to be idr,cra,I*/
1085
69.6k
    else
1086
69.6k
    {
1087
69.6k
        i4_num_b_frames = i4_sd - 1;
1088
69.6k
        memset(&ps_lap_struct->ai1_pic_type[1], PIC_TYPE_B, i4_num_b_frames);
1089
69.6k
        ps_lap_struct->ai1_pic_type[i4_num_b_frames + 1] = PIC_TYPE_P;
1090
69.6k
        ps_lap_struct->i4_num_frm_type_decided = i4_num_b_frames + 1;
1091
69.6k
        ps_lap_struct->i4_idr_counter += ps_lap_struct->i4_num_frm_type_decided;
1092
69.6k
        ps_lap_struct->i4_cra_counter += ps_lap_struct->i4_num_frm_type_decided;
1093
69.6k
        ps_lap_struct->i4_i_counter += ps_lap_struct->i4_num_frm_type_decided;
1094
69.6k
    }
1095
84.1k
    ASSERT(i4_num_b_frames != -1);
1096
1097
84.1k
    return;
1098
100k
}
1099
1100
/*!
1101
************************************************************************
1102
* \brief
1103
*    assign pic type to input buf
1104
************************************************************************
1105
*/
1106
void ihevce_assign_pic_type(lap_struct_t *ps_lap_struct, ihevce_lap_enc_buf_t *ps_lap_inp_buf)
1107
118k
{
1108
118k
    WORD8 pic_type = ps_lap_struct->ai1_pic_type[ps_lap_struct->i4_next_start_ctr];
1109
1110
118k
    switch(pic_type)
1111
118k
    {
1112
5.09k
    case PIC_TYPE_I:
1113
5.09k
    {
1114
5.09k
        ps_lap_inp_buf->s_lap_out.i4_pic_type = IV_I_FRAME;
1115
5.09k
        ps_lap_inp_buf->s_lap_out.i4_is_cra_pic = 0;
1116
5.09k
        ps_lap_inp_buf->s_lap_out.i4_is_I_in_any_field = 1;
1117
5.09k
        break;
1118
0
    }
1119
62.7k
    case PIC_TYPE_P:
1120
62.7k
    {
1121
62.7k
        ps_lap_inp_buf->s_lap_out.i4_pic_type = IV_P_FRAME;
1122
62.7k
        ps_lap_inp_buf->s_lap_out.i4_is_cra_pic = 0;
1123
62.7k
        break;
1124
0
    }
1125
19.5k
    case PIC_TYPE_B:
1126
19.5k
    {
1127
19.5k
        ps_lap_inp_buf->s_lap_out.i4_pic_type = IV_B_FRAME;
1128
19.5k
        ps_lap_inp_buf->s_lap_out.i4_is_cra_pic = 0;
1129
19.5k
        break;
1130
0
    }
1131
21.9k
    case PIC_TYPE_IDR:
1132
21.9k
    {
1133
21.9k
        ps_lap_struct->i4_curr_poc = 0;
1134
21.9k
        ps_lap_inp_buf->s_lap_out.i4_pic_type = IV_IDR_FRAME;
1135
21.9k
        ps_lap_inp_buf->s_lap_out.i4_is_cra_pic = 0;
1136
21.9k
        break;
1137
0
    }
1138
8.83k
    case PIC_TYPE_CRA:
1139
8.83k
    {
1140
8.83k
        ps_lap_inp_buf->s_lap_out.i4_pic_type = IV_I_FRAME;
1141
8.83k
        ps_lap_inp_buf->s_lap_out.i4_is_I_in_any_field = 1;
1142
8.83k
        ps_lap_inp_buf->s_lap_out.i4_is_cra_pic = 1;
1143
8.83k
        break;
1144
0
    }
1145
0
    default:
1146
0
        ASSERT(0);
1147
118k
    }
1148
118k
    return;
1149
118k
}
1150
1151
/*!
1152
************************************************************************
1153
* \brief
1154
*    capture order traversal nodes
1155
************************************************************************
1156
*/
1157
void ihevce_encode_order_traversal_nodes(
1158
    ihevce_encode_node_t *encode_node_t,
1159
    ihevce_lap_enc_buf_t **encode_order,
1160
    WORD32 *loop_count,
1161
    WORD32 curr_layer,
1162
    lap_struct_t *ps_lap_struct)
1163
64.2k
{
1164
64.2k
    if(encode_node_t == NULL)
1165
36.7k
        return;
1166
1167
27.5k
    encode_order[*loop_count] = (ihevce_lap_enc_buf_t *)encode_node_t->ps_lap_top_buff;
1168
1169
27.5k
    if(encode_order[*loop_count] != NULL)
1170
18.7k
    {
1171
18.7k
        ihevce_lap_enc_buf_t *ps_lap_inp;
1172
1173
18.7k
        ps_lap_struct->pi4_encode_poc_ptr[0] = encode_node_t->data;
1174
18.7k
        ref_b_pic_population(curr_layer, encode_order[*loop_count], ps_lap_struct);
1175
1176
18.7k
        ps_lap_inp = (ihevce_lap_enc_buf_t *)encode_order[*loop_count];
1177
18.7k
        ihevce_rc_populate_common_params(&ps_lap_inp->s_lap_out, &ps_lap_inp->s_rc_lap_out);
1178
1179
18.7k
        ps_lap_struct->pi4_encode_poc_ptr++;
1180
18.7k
    }
1181
1182
27.5k
    (*loop_count) = (*loop_count) + 1;
1183
1184
    /* Pre-order Left-node traversal*/
1185
27.5k
    ihevce_encode_order_traversal_nodes(
1186
27.5k
        (ihevce_encode_node_t *)encode_node_t->pv_left_node,
1187
27.5k
        encode_order,
1188
27.5k
        loop_count,
1189
27.5k
        curr_layer + 1,
1190
27.5k
        ps_lap_struct);
1191
1192
    /* Pre-order Right-node traversal*/
1193
27.5k
    ihevce_encode_order_traversal_nodes(
1194
27.5k
        (ihevce_encode_node_t *)encode_node_t->pv_right_node,
1195
27.5k
        encode_order,
1196
27.5k
        loop_count,
1197
27.5k
        curr_layer + 1,
1198
27.5k
        ps_lap_struct);
1199
27.5k
}
1200
1201
/*!
1202
************************************************************************
1203
* \brief
1204
*    capture order traversal nodes
1205
************************************************************************
1206
*/
1207
void ihevce_capture_order_traversal_nodes(
1208
    ihevce_encode_node_t *encode_node_t,
1209
    ihevce_lap_enc_buf_t **api4_capture_order_array,
1210
    WORD32 *capture_order_poc_array,
1211
    WORD32 *loop_count,
1212
    WORD32 i4_interlace_field)
1213
64.2k
{
1214
64.2k
    if(encode_node_t == NULL)
1215
36.7k
        return;
1216
1217
    /* Inorder Insertion for the left-child node */
1218
27.5k
    ihevce_capture_order_traversal_nodes(
1219
27.5k
        (ihevce_encode_node_t *)encode_node_t->pv_left_node,
1220
27.5k
        api4_capture_order_array,
1221
27.5k
        capture_order_poc_array,
1222
27.5k
        loop_count,
1223
27.5k
        i4_interlace_field);
1224
1225
27.5k
    if(i4_interlace_field)
1226
0
    {
1227
0
        encode_node_t->ps_lap_top_buff =
1228
0
            (ihevce_lap_enc_buf_t *)api4_capture_order_array[*loop_count];
1229
0
        encode_node_t->data = capture_order_poc_array[*loop_count];
1230
0
        encode_node_t->ps_lap_bottom_buff =
1231
0
            (ihevce_lap_enc_buf_t *)api4_capture_order_array[*loop_count + 1];
1232
0
    }
1233
27.5k
    else
1234
27.5k
    {
1235
27.5k
        encode_node_t->ps_lap_top_buff =
1236
27.5k
            (ihevce_lap_enc_buf_t *)api4_capture_order_array[*loop_count];
1237
27.5k
        encode_node_t->data = capture_order_poc_array[*loop_count];
1238
27.5k
    }
1239
27.5k
    if(i4_interlace_field)
1240
0
        (*loop_count) = (*loop_count) + 2;
1241
27.5k
    else
1242
27.5k
        (*loop_count) = (*loop_count) + 1;
1243
1244
    /* Inorder Insertion for the right-child node */
1245
27.5k
    ihevce_capture_order_traversal_nodes(
1246
27.5k
        (ihevce_encode_node_t *)encode_node_t->pv_right_node,
1247
27.5k
        api4_capture_order_array,
1248
27.5k
        capture_order_poc_array,
1249
27.5k
        loop_count,
1250
27.5k
        i4_interlace_field);
1251
27.5k
}
1252
1253
/*!
1254
************************************************************************
1255
* \brief
1256
*    I/P pic population
1257
************************************************************************
1258
*/
1259
void ihevce_ip_pic_population(
1260
    ihevce_encode_node_t *ps_encode_node, lap_struct_t *ps_lap_struct, WORD32 i4_first_gop)
1261
102k
{
1262
102k
    ihevce_lap_enc_buf_t *ps_lap_inp = NULL;
1263
102k
    WORD32 hier_layer = ps_lap_struct->s_lap_static_params.i4_max_temporal_layers;
1264
102k
    WORD32 sub_gop_size = ps_lap_struct->i4_dyn_sub_gop_size;
1265
102k
    ihevce_lap_enc_buf_t **api4_capture_order_array = ps_lap_struct->api4_capture_order_array;
1266
102k
    ihevce_lap_enc_buf_t **api4_encode_order_array = ps_lap_struct->api4_encode_order_array;
1267
102k
    WORD32 *ai4_capture_order_poc = ps_lap_struct->pi4_capture_poc_ptr;
1268
1269
    /* Populate the encode order POC dependent on IDR frames and Interlace Field*/
1270
102k
    if(1 == ps_lap_struct->i4_idr_flag)
1271
21.9k
    {
1272
21.9k
        if(i4_first_gop)
1273
7.38k
        {
1274
7.38k
            api4_encode_order_array[0] = api4_capture_order_array[0];
1275
1276
7.38k
            if(api4_encode_order_array[0] != NULL)
1277
7.38k
            {
1278
7.38k
                ps_lap_struct->pi4_encode_poc_ptr[0] = ai4_capture_order_poc[0];
1279
7.38k
                ref_pic_population(api4_encode_order_array[0], ps_lap_struct);
1280
1281
7.38k
                ps_lap_inp = api4_encode_order_array[0];
1282
7.38k
                ihevce_rc_populate_common_params(&ps_lap_inp->s_lap_out, &ps_lap_inp->s_rc_lap_out);
1283
1284
7.38k
                ps_lap_struct->pi4_encode_poc_ptr++;
1285
7.38k
            }
1286
1287
7.38k
            if(ps_lap_struct->i4_immediate_idr_case != 1)
1288
0
            {
1289
0
                api4_encode_order_array[1] = api4_capture_order_array[sub_gop_size];
1290
1291
0
                if(api4_encode_order_array[1] != NULL)
1292
0
                {
1293
0
                    ps_lap_struct->pi4_encode_poc_ptr[0] = ai4_capture_order_poc[sub_gop_size];
1294
0
                    ref_pic_population(api4_encode_order_array[1], ps_lap_struct);
1295
1296
0
                    ps_lap_inp = api4_encode_order_array[1];
1297
0
                    ihevce_rc_populate_common_params(
1298
0
                        &ps_lap_inp->s_lap_out, &ps_lap_inp->s_rc_lap_out);
1299
1300
0
                    ps_lap_struct->pi4_encode_poc_ptr++;
1301
0
                }
1302
0
            }
1303
7.38k
        }
1304
14.5k
        else
1305
14.5k
        {
1306
14.5k
            api4_encode_order_array[0] = api4_capture_order_array[sub_gop_size - 1];
1307
1308
14.5k
            if(api4_encode_order_array[0] != NULL)
1309
14.5k
            {
1310
14.5k
                ps_lap_struct->pi4_encode_poc_ptr[0] = ai4_capture_order_poc[sub_gop_size - 1];
1311
14.5k
                ref_pic_population(api4_encode_order_array[0], ps_lap_struct);
1312
1313
14.5k
                ps_lap_inp = api4_encode_order_array[0];
1314
14.5k
                ihevce_rc_populate_common_params(&ps_lap_inp->s_lap_out, &ps_lap_inp->s_rc_lap_out);
1315
1316
14.5k
                ps_lap_struct->pi4_encode_poc_ptr++;
1317
14.5k
            }
1318
14.5k
        }
1319
21.9k
    }
1320
80.3k
    else
1321
80.3k
    {
1322
80.3k
        api4_encode_order_array[0] = api4_capture_order_array[sub_gop_size - 1];
1323
1324
80.3k
        if(api4_encode_order_array[0] != NULL)
1325
77.5k
        {
1326
77.5k
            ps_lap_struct->pi4_encode_poc_ptr[0] = ai4_capture_order_poc[sub_gop_size - 1];
1327
77.5k
            ref_pic_population(api4_encode_order_array[0], ps_lap_struct);
1328
1329
77.5k
            ps_lap_inp = api4_encode_order_array[0];
1330
77.5k
            ihevce_rc_populate_common_params(&ps_lap_inp->s_lap_out, &ps_lap_inp->s_rc_lap_out);
1331
1332
77.5k
            ps_lap_struct->pi4_encode_poc_ptr++;
1333
77.5k
        }
1334
80.3k
    }
1335
102k
    return;
1336
102k
}
1337
1338
/*!
1339
************************************************************************
1340
* \brief
1341
*    B pic population
1342
************************************************************************
1343
*/
1344
void ihevce_b_pic_population(ihevce_encode_node_t *ps_encode_node, lap_struct_t *ps_lap_struct)
1345
9.17k
{
1346
9.17k
    WORD32 interlace_field = ps_lap_struct->s_lap_static_params.i4_src_interlace_field;
1347
9.17k
    ihevce_lap_enc_buf_t **api4_encode_order_array = ps_lap_struct->api4_encode_order_array;
1348
9.17k
    WORD32 *capture_order_poc_array = ps_lap_struct->pi4_capture_poc_ptr;
1349
9.17k
    WORD32 loop_count = 0;
1350
1351
    /* encoder_order offset changed dependent on IDR and Interlace Field */
1352
9.17k
    if(ps_lap_struct->i4_idr_flag)
1353
0
        loop_count = 1 + interlace_field;
1354
1355
    /* Inorder Insertion of POC in tree, for capture order */
1356
9.17k
    ihevce_capture_order_traversal_nodes(
1357
9.17k
        ps_encode_node,
1358
9.17k
        &ps_lap_struct->api4_capture_order_array[0],
1359
9.17k
        capture_order_poc_array,
1360
9.17k
        &loop_count,
1361
9.17k
        interlace_field);
1362
1363
    /* encoder_order offset changed dependent on IDR and Interlace Field */
1364
    /* If the gop_size is multiple of CRA period , decrement loop count */
1365
9.17k
    if(ps_lap_struct->i4_idr_flag)
1366
0
        loop_count = 2 + (interlace_field * 2);
1367
9.17k
    else
1368
9.17k
        loop_count = 1 + interlace_field;
1369
1370
    /* Pre-order traversal of the tree to get encode-order POCs*/
1371
9.17k
    ihevce_encode_order_traversal_nodes(
1372
9.17k
        ps_encode_node, api4_encode_order_array, &loop_count, 1, ps_lap_struct);
1373
1374
9.17k
    return;
1375
9.17k
}
1376
1377
/*!
1378
************************************************************************
1379
* \brief
1380
*    rc_update_model_control_by_lap_for_modified_sub_gop
1381
************************************************************************
1382
*/
1383
void rc_update_model_control_by_lap_for_modified_sub_gop(
1384
    lap_struct_t *ps_lap_struct, ihevce_lap_enc_buf_t *ps_lap_out_buf)
1385
110k
{
1386
110k
    ihevce_lap_output_params_t *ps_lap_out = &ps_lap_out_buf->s_lap_out;
1387
1388
    /* model update flag for rc*/
1389
110k
    if(ps_lap_out->i4_pic_type == IV_P_FRAME)
1390
59.2k
    {
1391
59.2k
        WORD32 i4_loop = 0;
1392
59.2k
        WORD32 i4_min_delta_poc = 0x7FFFFFFF;
1393
1394
238k
        for(i4_loop = 0; i4_loop < ps_lap_out->i4_num_ref_pics; i4_loop++)
1395
178k
        {
1396
178k
            if(i4_min_delta_poc > ABS(ps_lap_out->as_ref_pics[i4_loop].i4_ref_pic_delta_poc))
1397
59.2k
            {
1398
59.2k
                i4_min_delta_poc = ABS(ps_lap_out->as_ref_pics[i4_loop].i4_ref_pic_delta_poc);
1399
59.2k
            }
1400
178k
        }
1401
59.2k
    }
1402
1403
110k
    if(ps_lap_out->i4_pic_type == IV_B_FRAME)
1404
16.6k
    {
1405
16.6k
        WORD32 i4_loop = 0;
1406
16.6k
        WORD32 i4_min_delta_poc = 0x7FFFFFFF;
1407
16.6k
        WORD32 i4_min_delta_poc_for_b =
1408
16.6k
            (1 << ps_lap_struct->s_lap_static_params.i4_max_temporal_layers) /
1409
16.6k
            (ps_lap_out->i4_temporal_lyr_id + 1);
1410
1411
69.6k
        for(i4_loop = 0; i4_loop < ps_lap_out->i4_num_ref_pics; i4_loop++)
1412
52.9k
        {
1413
52.9k
            if(i4_min_delta_poc > ABS(ps_lap_out->as_ref_pics[i4_loop].i4_ref_pic_delta_poc))
1414
16.6k
            {
1415
16.6k
                i4_min_delta_poc = ABS(ps_lap_out->as_ref_pics[i4_loop].i4_ref_pic_delta_poc);
1416
16.6k
            }
1417
52.9k
        }
1418
16.6k
    }
1419
110k
    return;
1420
110k
}
1421
1422
/*!
1423
************************************************************************
1424
* \brief
1425
*    Update num of pic type for rc
1426
************************************************************************
1427
*/
1428
void update_rc_num_pic_type(lap_struct_t *ps_lap_struct, ihevce_lap_enc_buf_t *ps_lap_out_buf)
1429
110k
{
1430
110k
    WORD32 i4_field_flag = ps_lap_struct->s_lap_static_params.i4_src_interlace_field;
1431
110k
    rc_lap_out_params_t *ps_rc_lap_out = &ps_lap_out_buf->s_rc_lap_out;
1432
1433
110k
    ps_lap_struct->i4_lap2_counter++;
1434
1435
110k
    if(ps_lap_out_buf->s_lap_out.i4_pic_type == IV_I_FRAME ||
1436
97.3k
       ps_lap_out_buf->s_lap_out.i4_pic_type == IV_IDR_FRAME)
1437
34.7k
    {
1438
34.7k
        ps_lap_struct->ai4_pic_type_to_be_removed[ps_lap_struct->i4_enq_idx] = I_PIC;
1439
34.7k
        GET_IDX_CIRCULAR_BUF(ps_lap_struct->i4_enq_idx, 1, NUM_LAP2_LOOK_AHEAD);
1440
34.7k
    }
1441
75.9k
    else if(ps_lap_out_buf->s_lap_out.i4_pic_type == IV_P_FRAME)
1442
59.2k
    {
1443
59.2k
        if(ps_lap_out_buf->s_lap_out.i4_first_field)
1444
59.2k
        {
1445
59.2k
            ps_lap_struct->ai4_pic_type_to_be_removed[ps_lap_struct->i4_enq_idx] = P_PIC;
1446
59.2k
        }
1447
0
        else
1448
0
        {
1449
0
            ps_lap_struct->ai4_pic_type_to_be_removed[ps_lap_struct->i4_enq_idx] = P1_PIC;
1450
0
        }
1451
59.2k
        GET_IDX_CIRCULAR_BUF(ps_lap_struct->i4_enq_idx, 1, NUM_LAP2_LOOK_AHEAD);
1452
59.2k
    }
1453
16.6k
    else if(ps_lap_out_buf->s_lap_out.i4_pic_type == IV_B_FRAME)
1454
16.6k
    {
1455
16.6k
        if(ps_lap_out_buf->s_lap_out.i4_temporal_lyr_id == 1)
1456
5.68k
        {
1457
5.68k
            if(ps_lap_out_buf->s_lap_out.i4_first_field)
1458
5.68k
            {
1459
5.68k
                ps_lap_struct->ai4_pic_type_to_be_removed[ps_lap_struct->i4_enq_idx] = B_PIC;
1460
5.68k
            }
1461
0
            else
1462
0
            {
1463
0
                ps_lap_struct->ai4_pic_type_to_be_removed[ps_lap_struct->i4_enq_idx] = BB_PIC;
1464
0
            }
1465
5.68k
            GET_IDX_CIRCULAR_BUF(ps_lap_struct->i4_enq_idx, 1, NUM_LAP2_LOOK_AHEAD);
1466
5.68k
        }
1467
10.9k
        else if(ps_lap_out_buf->s_lap_out.i4_temporal_lyr_id == 2)
1468
10.9k
        {
1469
10.9k
            if(ps_lap_out_buf->s_lap_out.i4_first_field)
1470
10.9k
            {
1471
10.9k
                ps_lap_struct->ai4_pic_type_to_be_removed[ps_lap_struct->i4_enq_idx] = B1_PIC;
1472
10.9k
            }
1473
0
            else
1474
0
            {
1475
0
                ps_lap_struct->ai4_pic_type_to_be_removed[ps_lap_struct->i4_enq_idx] = B11_PIC;
1476
0
            }
1477
10.9k
            GET_IDX_CIRCULAR_BUF(ps_lap_struct->i4_enq_idx, 1, NUM_LAP2_LOOK_AHEAD);
1478
10.9k
        }
1479
0
        else if(ps_lap_out_buf->s_lap_out.i4_temporal_lyr_id == 3)
1480
0
        {
1481
0
            if(ps_lap_out_buf->s_lap_out.i4_first_field)
1482
0
            {
1483
0
                ps_lap_struct->ai4_pic_type_to_be_removed[ps_lap_struct->i4_enq_idx] = B2_PIC;
1484
0
            }
1485
0
            else
1486
0
            {
1487
0
                ps_lap_struct->ai4_pic_type_to_be_removed[ps_lap_struct->i4_enq_idx] = B22_PIC;
1488
0
            }
1489
0
            GET_IDX_CIRCULAR_BUF(ps_lap_struct->i4_enq_idx, 1, NUM_LAP2_LOOK_AHEAD);
1490
0
        }
1491
0
        else
1492
0
        {
1493
0
            ASSERT(0);
1494
0
        }
1495
16.6k
    }
1496
0
    else
1497
0
    {
1498
0
        ASSERT(0);
1499
0
    }
1500
1501
110k
    if(!ps_lap_struct->i4_rc_lap_period)
1502
0
    {
1503
0
        if(ps_lap_struct->i4_rc_lap_period < ps_lap_struct->i4_gop_period)
1504
0
        {
1505
0
            WORD32 i4_loop;
1506
0
            WORD32 idx = 0;
1507
0
            WORD32 i4_max_temporal_layer =
1508
0
                ps_lap_struct->s_lap_static_params.i4_max_temporal_layers;
1509
1510
0
            for(i4_loop = 0;
1511
0
                i4_loop < (ps_lap_struct->i4_gop_period - ps_lap_struct->i4_rc_lap_period);
1512
0
                i4_loop++)
1513
0
            {
1514
0
                ps_rc_lap_out->i4_next_sc_i_in_rc_look_ahead++;
1515
1516
0
                if(i4_max_temporal_layer == 0)
1517
0
                {
1518
0
                    if(ps_lap_struct->i4_is_all_i_pic_in_seq)
1519
0
                    {
1520
0
                        ps_rc_lap_out->ai4_num_pic_type[I_PIC]++;
1521
0
                    }
1522
0
                    else
1523
0
                    {
1524
                        /*second field*/
1525
0
                        if((i4_loop & 1) && i4_field_flag)
1526
0
                        {
1527
0
                            ps_rc_lap_out->ai4_num_pic_type[P1_PIC]++;
1528
0
                        }
1529
0
                        else
1530
0
                        {
1531
0
                            ps_rc_lap_out->ai4_num_pic_type[P_PIC]++;
1532
0
                        }
1533
0
                    }
1534
0
                }
1535
0
                else
1536
0
                {
1537
0
                    ps_rc_lap_out->ai4_num_pic_type
1538
0
                        [gau1_order_insert_pic_type[i4_max_temporal_layer - 1][idx]]++;
1539
1540
0
                    GET_IDX_CIRCULAR_BUF(idx, 1, (8 << i4_field_flag));
1541
0
                }
1542
0
            }
1543
0
        }
1544
0
    }
1545
110k
    else
1546
110k
    {
1547
110k
        ASSERT(ps_lap_struct->i4_lap2_counter <= ps_lap_struct->i4_rc_lap_period);
1548
1549
110k
        if(ps_lap_struct->i4_lap2_counter == ps_lap_struct->i4_rc_lap_period)
1550
110k
        {
1551
110k
            WORD32 i4_loop, i4_period, i4_next_i_pic = 0;
1552
110k
            WORD32 i4_stop_count = 0;
1553
110k
            WORD32 i4_temp_deq = ps_lap_struct->i4_deq_idx;
1554
110k
            WORD32 i4_first_pic_type = ps_lap_struct->ai4_pic_type_to_be_removed[i4_temp_deq];
1555
1556
110k
            if(ps_lap_struct->i4_rc_lap_period >= ps_lap_struct->i4_gop_period)
1557
14.0k
            {
1558
14.0k
                i4_period = ps_lap_struct->i4_gop_period;
1559
14.0k
            }
1560
96.6k
            else
1561
96.6k
            {
1562
96.6k
                i4_period = ps_lap_struct->i4_rc_lap_period;
1563
96.6k
            }
1564
1565
221k
            for(i4_loop = 0; i4_loop < i4_period; i4_loop++)
1566
110k
            {
1567
110k
                if(ps_lap_struct->ai4_pic_type_to_be_removed[i4_temp_deq] == I_PIC && i4_loop &&
1568
0
                   i4_first_pic_type == I_PIC)
1569
0
                {
1570
0
                    i4_stop_count = 1;
1571
0
                }
1572
1573
110k
                if(!i4_stop_count)
1574
110k
                {
1575
110k
                    ps_rc_lap_out->i4_next_sc_i_in_rc_look_ahead++;
1576
110k
                }
1577
1578
110k
                ps_rc_lap_out
1579
110k
                    ->ai4_num_pic_type[ps_lap_struct->ai4_pic_type_to_be_removed[i4_temp_deq]]++;
1580
1581
110k
                GET_IDX_CIRCULAR_BUF(i4_temp_deq, 1, NUM_LAP2_LOOK_AHEAD);
1582
110k
            }
1583
110k
            if(ps_lap_struct->i4_rc_lap_period < ps_lap_struct->i4_gop_period)
1584
96.6k
            {
1585
96.6k
                WORD32 i4_loop;
1586
96.6k
                WORD32 idx = 0;
1587
96.6k
                WORD32 i4_max_temporal_layer =
1588
96.6k
                    ps_lap_struct->s_lap_static_params.i4_max_temporal_layers;
1589
1590
96.6k
                for(i4_loop = 0;
1591
2.11M
                    i4_loop < (ps_lap_struct->i4_gop_period - ps_lap_struct->i4_rc_lap_period) &&
1592
2.02M
                    (!i4_next_i_pic);
1593
2.02M
                    i4_loop++)
1594
2.02M
                {
1595
2.02M
                    if(!i4_stop_count)
1596
2.02M
                    {
1597
2.02M
                        ps_rc_lap_out->i4_next_sc_i_in_rc_look_ahead++;
1598
2.02M
                    }
1599
1600
2.02M
                    if(i4_max_temporal_layer == 0)
1601
1.76M
                    {
1602
1.76M
                        if(ps_lap_struct->i4_is_all_i_pic_in_seq)
1603
12.5k
                        {
1604
12.5k
                            ps_rc_lap_out->ai4_num_pic_type[I_PIC]++;
1605
12.5k
                        }
1606
1.75M
                        else
1607
1.75M
                        {
1608
                            /*second field*/
1609
1.75M
                            if((i4_loop & 1) && i4_field_flag)
1610
0
                            {
1611
0
                                ps_rc_lap_out->ai4_num_pic_type[P1_PIC]++;
1612
0
                            }
1613
1.75M
                            else
1614
1.75M
                            {
1615
1.75M
                                ps_rc_lap_out->ai4_num_pic_type[P_PIC]++;
1616
1.75M
                            }
1617
1.75M
                        }
1618
1.76M
                    }
1619
254k
                    else
1620
254k
                    {
1621
254k
                        ps_rc_lap_out->ai4_num_pic_type
1622
254k
                            [gau1_order_insert_pic_type[i4_max_temporal_layer - 1][idx]]++;
1623
254k
                        GET_IDX_CIRCULAR_BUF(idx, 1, (8 << i4_field_flag));
1624
254k
                    }
1625
2.02M
                }
1626
96.6k
            }
1627
            /*remove one pic type*/
1628
110k
            GET_IDX_CIRCULAR_BUF(ps_lap_struct->i4_deq_idx, 1, NUM_LAP2_LOOK_AHEAD);
1629
110k
            ps_lap_struct->i4_lap2_counter--;
1630
110k
        }
1631
110k
    }
1632
1633
110k
    {
1634
110k
        WORD32 i4_loop;
1635
110k
        WORD32 idx = 0;
1636
110k
        WORD32 i4_max_temporal_layer = ps_lap_struct->s_lap_static_params.i4_max_temporal_layers;
1637
110k
        WORD32 i4_num_pictype = 0;
1638
1639
1.10M
        for(i4_loop = 0; i4_loop < MAX_PIC_TYPE; i4_loop++)
1640
996k
        {
1641
996k
            i4_num_pictype += ps_rc_lap_out->ai4_num_pic_type[i4_loop];
1642
996k
        }
1643
1644
110k
        if(!i4_num_pictype)
1645
0
        {
1646
0
            ps_rc_lap_out->i4_next_sc_i_in_rc_look_ahead = ps_lap_struct->i4_gop_period;
1647
1648
0
            for(i4_loop = 0; i4_loop < (ps_lap_struct->i4_gop_period); i4_loop++)
1649
0
            {
1650
0
                if(i4_max_temporal_layer == 0)
1651
0
                {
1652
0
                    if(ps_lap_struct->i4_is_all_i_pic_in_seq)
1653
0
                    {
1654
0
                        ps_rc_lap_out->ai4_num_pic_type[I_PIC]++;
1655
0
                    }
1656
0
                    else
1657
0
                    {
1658
                        /*second field*/
1659
0
                        if((i4_loop & 1) && i4_field_flag)
1660
0
                        {
1661
0
                            ps_rc_lap_out->ai4_num_pic_type[P1_PIC]++;
1662
0
                        }
1663
0
                        else
1664
0
                        {
1665
0
                            ps_rc_lap_out->ai4_num_pic_type[P_PIC]++;
1666
0
                        }
1667
0
                    }
1668
0
                }
1669
0
                else
1670
0
                {
1671
0
                    ps_rc_lap_out->ai4_num_pic_type
1672
0
                        [gau1_order_insert_pic_type[i4_max_temporal_layer - 1][idx]]++;
1673
1674
0
                    GET_IDX_CIRCULAR_BUF(idx, 1, (8 << i4_field_flag));
1675
0
                }
1676
0
            }
1677
0
        }
1678
110k
    }
1679
    /*FOR RC : ensure  at least 1 I pic in the gop period at any case*/
1680
110k
    if(!ps_rc_lap_out->ai4_num_pic_type[I_PIC])
1681
75.9k
    {
1682
75.9k
        ASSERT(ps_rc_lap_out->ai4_num_pic_type[P_PIC]);
1683
75.9k
        ps_lap_out_buf->s_rc_lap_out.ai4_num_pic_type[P_PIC]--;
1684
75.9k
        ps_lap_out_buf->s_rc_lap_out.ai4_num_pic_type[I_PIC]++;
1685
75.9k
    }
1686
110k
    return;
1687
110k
}
1688
1689
/*!
1690
************************************************************************
1691
* \brief
1692
*    pre rel lap output update
1693
************************************************************************
1694
*/
1695
void ihevce_pre_rel_lapout_update(lap_struct_t *ps_lap_struct, ihevce_lap_enc_buf_t *ps_lap_out_buf)
1696
110k
{
1697
110k
    WORD32 i4_first_field = 1;
1698
110k
    WORD32 i4_field = ps_lap_struct->s_lap_static_params.i4_src_interlace_field;
1699
1700
110k
    if(i4_field)
1701
0
    {
1702
0
        i4_first_field = ps_lap_out_buf->s_lap_out.i4_first_field;
1703
0
    }
1704
1705
110k
    ps_lap_out_buf->s_lap_out.i4_used = 0;
1706
1707
110k
    rc_update_model_control_by_lap_for_modified_sub_gop(ps_lap_struct, ps_lap_out_buf);
1708
110k
    update_rc_num_pic_type(ps_lap_struct, ps_lap_out_buf);
1709
1710
    /* curr buf next is null, prev buf next is curr and prev buff equal to curr*/
1711
1712
110k
    ps_lap_out_buf->s_rc_lap_out.ps_rc_lap_out_next_encode = NULL;
1713
110k
    if(ps_lap_struct->pv_prev_inp_buf != NULL &&
1714
103k
       ps_lap_struct->s_lap_static_params.s_lap_params.i4_rc_look_ahead_pics)
1715
0
    {
1716
0
        ((ihevce_lap_enc_buf_t *)ps_lap_struct->pv_prev_inp_buf)
1717
0
            ->s_rc_lap_out.ps_rc_lap_out_next_encode = (void *)&ps_lap_out_buf->s_rc_lap_out;
1718
0
    }
1719
1720
110k
    ps_lap_struct->pv_prev_inp_buf = (void *)ps_lap_out_buf;
1721
110k
    ps_lap_out_buf->s_lap_out.i4_is_prev_pic_in_Tid0_same_scene = 1;
1722
1723
    /*with force idr below check is not valid*/
1724
#if(!FORCE_IDR_TEST)
1725
    if(ps_lap_struct->i4_max_idr_period == ps_lap_struct->i4_min_idr_period)
1726
    {
1727
        if(!ps_lap_out_buf->s_lap_out.i4_poc)
1728
        {
1729
            ASSERT(ps_lap_struct->i4_max_prev_poc == (ps_lap_struct->i4_max_idr_period - 1));
1730
            ps_lap_struct->i4_max_prev_poc = 0;
1731
        }
1732
    }
1733
#endif
1734
1735
    /*assert if num of reference frame is zero in case of P or B frame*/
1736
110k
    if(ps_lap_out_buf->s_lap_out.i4_pic_type == IV_P_FRAME ||
1737
51.4k
       ps_lap_out_buf->s_lap_out.i4_pic_type == IV_B_FRAME)
1738
75.9k
    {
1739
75.9k
        ASSERT(ps_lap_out_buf->s_lap_out.i4_num_ref_pics != 0);
1740
75.9k
    }
1741
1742
    /*assert if poc = 0 and pictype is not an idr*/
1743
110k
    if(ps_lap_out_buf->s_lap_out.i4_pic_type != IV_IDR_FRAME &&
1744
89.3k
       ps_lap_out_buf->s_lap_out.i4_poc == 0)
1745
0
    {
1746
0
        ASSERT(0);
1747
0
    }
1748
110k
    if(ps_lap_out_buf->s_lap_out.i4_pic_type == IV_IDR_FRAME &&
1749
21.3k
       ps_lap_out_buf->s_lap_out.i4_poc != 0)
1750
0
    {
1751
0
        ASSERT(0);
1752
0
    }
1753
110k
    if(ps_lap_out_buf->s_lap_out.i4_poc < 0)
1754
0
    {
1755
0
        ASSERT(0);
1756
0
    }
1757
1758
#if(!FORCE_IDR_TEST)
1759
    if((!ps_lap_struct->i4_max_idr_period) && ps_lap_out_buf->s_lap_out.i4_display_num != 0)
1760
    {
1761
        ASSERT(ps_lap_out_buf->s_lap_out.i4_pic_type != IV_IDR_FRAME);
1762
    }
1763
#endif
1764
110k
    if(!ps_lap_struct->i4_max_cra_period)
1765
49.2k
    {
1766
49.2k
        ASSERT(ps_lap_out_buf->s_lap_out.i4_is_cra_pic != 1);
1767
49.2k
    }
1768
1769
110k
    if(ps_lap_out_buf->s_lap_out.i4_force_idr_flag)
1770
1.21k
    {
1771
1.21k
        ASSERT(ps_lap_out_buf->s_lap_out.i4_pic_type == IV_IDR_FRAME);
1772
1.21k
    }
1773
110k
    ps_lap_out_buf->s_lap_out.i4_curr_frm_qp = -1;
1774
110k
}
1775
1776
/*!
1777
************************************************************************
1778
* \brief
1779
*    lap queue input
1780
************************************************************************
1781
*/
1782
void ihevce_lap_queue_input(
1783
    lap_struct_t *ps_lap_struct, ihevce_lap_enc_buf_t *ps_input_lap_enc_buf, WORD32 *pi4_tree_num)
1784
135k
{
1785
135k
    ihevce_encode_node_t *ps_encode_node =
1786
135k
        (ihevce_encode_node_t *)ps_lap_struct->aps_encode_node[*pi4_tree_num];
1787
1788
135k
    WORD32 i4_capture_idx = ps_lap_struct->i4_capture_idx;
1789
1790
    /* Static Lap parameters */
1791
135k
    ihevce_lap_static_params_t *ps_lap_static_params =
1792
135k
        (ihevce_lap_static_params_t *)&ps_lap_struct->s_lap_static_params;
1793
1794
135k
    WORD32 hier_layer = ps_lap_static_params->i4_max_temporal_layers;
1795
135k
    WORD32 sub_gop_size = ps_lap_struct->i4_dyn_sub_gop_size;
1796
1797
    /* queue the current input in capture array */
1798
135k
    {
1799
135k
        WORD32 first_gop_flag;
1800
1801
135k
        if(!i4_capture_idx)
1802
104k
        {
1803
104k
            memset(
1804
104k
                &ps_lap_struct->api4_capture_order_array[0],
1805
104k
                0,
1806
104k
                sizeof(ihevce_lap_enc_buf_t *) * MAX_NUM_ENC_NODES);
1807
104k
        }
1808
135k
        ps_lap_struct->api4_capture_order_array[i4_capture_idx] = ps_input_lap_enc_buf;
1809
1810
135k
        if(ps_input_lap_enc_buf != NULL)
1811
118k
        {
1812
118k
            if(ps_input_lap_enc_buf->s_lap_out.i4_end_flag == 1)
1813
7.38k
                ps_lap_struct->i4_end_flag_pic_idx = i4_capture_idx;
1814
118k
            ps_lap_struct->ai4_capture_order_poc[i4_capture_idx] = ps_lap_struct->i4_curr_poc++;
1815
118k
        }
1816
1817
135k
        if((1 == ps_lap_struct->i4_num_dummy_pic) && (ps_lap_struct->i4_sub_gop_end == 0))
1818
157
        {
1819
157
            ps_lap_struct->i4_sub_gop_end = i4_capture_idx - 1;
1820
157
        }
1821
135k
        i4_capture_idx++;
1822
1823
        /* to take care of buffering 1 extra picture at start or at IDR interval*/
1824
135k
        if(!ps_lap_struct->i4_is_all_i_pic_in_seq)
1825
119k
        {
1826
119k
            if(ps_lap_static_params->i4_src_interlace_field && sub_gop_size <= 2)
1827
0
            {
1828
0
                first_gop_flag = 0;
1829
0
            }
1830
119k
            else
1831
119k
            {
1832
119k
                first_gop_flag = ps_lap_struct->i4_idr_flag
1833
119k
                                 << ps_lap_static_params->i4_src_interlace_field;
1834
119k
            }
1835
119k
        }
1836
16.7k
        else
1837
16.7k
        {
1838
16.7k
            first_gop_flag = ps_lap_struct->i4_idr_flag;
1839
16.7k
        }
1840
1841
        /* For every IDR period, set idr_flag and reset POC value and gop_size to 0*/
1842
135k
        if(ps_input_lap_enc_buf != NULL)
1843
118k
        {
1844
118k
            if((!first_gop_flag) && (ps_input_lap_enc_buf->s_lap_out.i4_pic_type == IV_IDR_FRAME))
1845
14.5k
            {
1846
14.5k
                ps_lap_struct->pi4_encode_poc_ptr = &ps_lap_struct->ai4_encode_order_poc[0];
1847
14.5k
                ps_lap_struct->i4_idr_flag = 1;
1848
14.5k
                ps_lap_struct->i4_curr_poc = 0;
1849
14.5k
                ps_lap_struct->ai4_capture_order_poc[i4_capture_idx - 1] =
1850
14.5k
                    ps_lap_struct->i4_curr_poc++;
1851
14.5k
            }
1852
118k
        }
1853
1854
135k
        if(first_gop_flag &&
1855
7.38k
           (ps_lap_struct->i4_is_all_i_pic_in_seq || ps_lap_struct->i4_immediate_idr_case))
1856
7.38k
        {
1857
7.38k
            sub_gop_size = 0;
1858
7.38k
        }
1859
1860
135k
        if(!first_gop_flag && ps_lap_struct->i4_immediate_idr_case &&
1861
24.4k
           (i4_capture_idx != (sub_gop_size + first_gop_flag)))
1862
1.39k
        {
1863
1.39k
            sub_gop_size = 1 << ps_lap_static_params->i4_src_interlace_field;
1864
1.39k
            ps_lap_struct->i4_dyn_sub_gop_size = 1 << ps_lap_static_params->i4_src_interlace_field;
1865
1.39k
        }
1866
1867
        /* reset the queue idx end of every gop */
1868
135k
        if(i4_capture_idx == (sub_gop_size + first_gop_flag))
1869
102k
        {
1870
102k
            ps_lap_struct->pi4_encode_poc_ptr = &ps_lap_struct->ai4_encode_order_poc[0];
1871
1872
102k
            if(ps_lap_struct->i4_end_flag_pic_idx && (1 != sub_gop_size))
1873
1.13k
            {
1874
1.13k
                WORD32 i4_temp_poc = 0;
1875
1.13k
                ihevce_lap_enc_buf_t *ps_temp_lap_enc_buf = NULL;
1876
1877
                /*swap the lap enc buf and poc*/
1878
1.13k
                ps_temp_lap_enc_buf =
1879
1.13k
                    ps_lap_struct->api4_capture_order_array[ps_lap_struct->i4_end_flag_pic_idx - 1];
1880
1.13k
                ps_lap_struct->api4_capture_order_array[ps_lap_struct->i4_end_flag_pic_idx - 1] =
1881
1.13k
                    NULL;
1882
1.13k
                ps_lap_struct->api4_capture_order_array[i4_capture_idx - 2] =
1883
1.13k
                    ps_lap_struct->api4_capture_order_array[ps_lap_struct->i4_end_flag_pic_idx];
1884
1885
1.13k
                if((i4_capture_idx - 2) != ps_lap_struct->i4_end_flag_pic_idx)
1886
851
                    ps_lap_struct->api4_capture_order_array[ps_lap_struct->i4_end_flag_pic_idx] =
1887
851
                        NULL;
1888
1889
1.13k
                ps_temp_lap_enc_buf->s_lap_out.i4_pic_type = IV_P_FRAME;
1890
1.13k
                ps_lap_struct->api4_capture_order_array[i4_capture_idx - 1] = ps_temp_lap_enc_buf;
1891
1892
1.13k
                i4_temp_poc =
1893
1.13k
                    ps_lap_struct->ai4_capture_order_poc[ps_lap_struct->i4_end_flag_pic_idx - 1];
1894
1.13k
                ps_lap_struct->ai4_capture_order_poc[i4_capture_idx - 2] =
1895
1.13k
                    ps_lap_struct->ai4_capture_order_poc[ps_lap_struct->i4_end_flag_pic_idx];
1896
1897
1.13k
                ps_lap_struct->ai4_capture_order_poc[i4_capture_idx - 1] = i4_temp_poc;
1898
1.13k
            }
1899
1900
102k
            if(ps_lap_struct->i4_num_dummy_pic)
1901
157
            {
1902
157
                WORD32 pic_idx;
1903
157
                ihevce_lap_enc_buf_t *ps_temp_lap_enc_buf = NULL;
1904
157
                static const WORD32 subgop_temporal_layer3[8] = { 7, 3, 1, 0, 2, 5, 4, 6 };
1905
157
                static const WORD32 subgop_temporal_layer2[4] = { 3, 1, 0, 2 };
1906
157
                const WORD32 *subgop_pic_idx = (ps_lap_static_params->i4_max_temporal_layers == 2)
1907
157
                                                   ? &subgop_temporal_layer2[0]
1908
157
                                                   : &subgop_temporal_layer3[0];
1909
157
                WORD32 max_pic_count = ps_lap_struct->i4_sub_gop_end + 1;
1910
1911
484
                for(pic_idx = 0; pic_idx < max_pic_count; pic_idx++)
1912
327
                {
1913
327
                    WORD32 i4_temp_idx = ps_lap_static_params->i4_max_temporal_layers > 1
1914
327
                                             ? subgop_pic_idx[pic_idx]
1915
327
                                             : 1;
1916
1917
327
                    if(NULL == ps_lap_struct->api4_capture_order_array[i4_temp_idx])
1918
243
                    {
1919
243
                        ps_temp_lap_enc_buf =
1920
243
                            ps_lap_struct->api4_capture_order_array[ps_lap_struct->i4_sub_gop_end];
1921
243
                        if(pic_idx == 0)
1922
157
                        {
1923
157
                            ps_temp_lap_enc_buf->s_lap_out.i4_pic_type = IV_P_FRAME;
1924
157
                        }
1925
243
                        ps_lap_struct->api4_capture_order_array[i4_temp_idx] = ps_temp_lap_enc_buf;
1926
243
                        ps_lap_struct->api4_capture_order_array[ps_lap_struct->i4_sub_gop_end] =
1927
243
                            NULL;
1928
1929
243
                        ps_lap_struct->ai4_capture_order_poc[i4_temp_idx] =
1930
243
                            ps_lap_struct->ai4_capture_order_poc[ps_lap_struct->i4_sub_gop_end];
1931
243
                        ps_lap_struct->ai4_capture_order_poc[ps_lap_struct->i4_sub_gop_end] = 0;
1932
243
                        ps_lap_struct->i4_sub_gop_end--;
1933
243
                    }
1934
327
                }
1935
157
                ps_lap_struct->i4_sub_gop_end = 0;
1936
157
            }
1937
102k
            i4_capture_idx = 0;
1938
1939
            /* add the number of pics in sub gop to the gop counter */
1940
            /* Get reordered Buffer for encoder, wait till all sub-gop buffers are output */
1941
1942
            /* Popluate I/P pictures */
1943
102k
            ihevce_ip_pic_population(ps_encode_node, ps_lap_struct, first_gop_flag);
1944
1945
            /* For hierarchical layers, Populate B picture */
1946
102k
            if((hier_layer > 0) &&
1947
12.7k
               sub_gop_size > (1 << ps_lap_static_params->i4_src_interlace_field))
1948
9.17k
            {
1949
9.17k
                ihevce_b_pic_population(ps_encode_node, ps_lap_struct);
1950
9.17k
            }
1951
1952
102k
            ps_lap_struct->i4_num_bufs_encode_order = sub_gop_size + first_gop_flag;
1953
1954
            /* correction of encode order in case of multiple non reference B*/
1955
102k
            if(ps_lap_struct->i4_dyn_sub_gop_size > ps_lap_struct->i4_sub_gop_size)
1956
0
            {
1957
0
                WORD32 i4_loop;
1958
0
                ihevce_lap_enc_buf_t *ps_lap_enc_buf, *ps_lap_enc_buf_tmp[MAX_NUM_ENC_NODES];
1959
0
                WORD32 i4_enc_cnt, i4_cap_cnt;
1960
1961
0
                i4_cap_cnt = first_gop_flag;
1962
0
                i4_enc_cnt = 0;
1963
1964
0
                for(i4_loop = 0; i4_loop < ps_lap_struct->i4_num_bufs_encode_order; i4_loop++)
1965
0
                {
1966
0
                    ps_lap_enc_buf = ps_lap_struct->api4_encode_order_array[i4_loop];
1967
1968
0
                    if(ps_lap_enc_buf != NULL && !ps_lap_enc_buf->s_lap_out.i4_is_ref_pic &&
1969
0
                       (ps_lap_enc_buf->s_lap_out.i4_temporal_lyr_id ==
1970
0
                        ps_lap_struct->s_lap_static_params.i4_max_temporal_layers))
1971
0
                    {
1972
0
                        if(ps_lap_enc_buf != ps_lap_struct->api4_capture_order_array[i4_cap_cnt])
1973
0
                        {
1974
0
                            ps_lap_enc_buf_tmp[i4_enc_cnt] =
1975
0
                                ps_lap_struct->api4_capture_order_array[i4_cap_cnt];
1976
0
                            i4_enc_cnt++;
1977
0
                            i4_loop++;
1978
0
                        }
1979
0
                        i4_cap_cnt += 2;
1980
0
                        ps_lap_enc_buf_tmp[i4_enc_cnt] = ps_lap_enc_buf;
1981
0
                        i4_enc_cnt++;
1982
0
                        ps_lap_enc_buf_tmp[i4_enc_cnt] =
1983
0
                            ps_lap_struct->api4_capture_order_array[i4_cap_cnt];
1984
0
                        i4_enc_cnt++;
1985
0
                        i4_cap_cnt += 2;
1986
0
                        i4_loop++;
1987
0
                    }
1988
0
                    else
1989
0
                    {
1990
0
                        ps_lap_enc_buf_tmp[i4_enc_cnt] = ps_lap_enc_buf;
1991
0
                        i4_enc_cnt++;
1992
0
                    }
1993
0
                }
1994
0
                for(i4_loop = 0; i4_loop < ps_lap_struct->i4_num_bufs_encode_order; i4_loop++)
1995
0
                {
1996
0
                    ps_lap_struct->api4_encode_order_array[i4_loop] = ps_lap_enc_buf_tmp[i4_loop];
1997
0
                }
1998
0
            }
1999
2000
            /* reset the IDR flag */
2001
102k
            ps_lap_struct->i4_idr_flag = 0;
2002
102k
            ps_lap_struct->i4_dyn_sub_gop_size = ps_lap_struct->i4_sub_gop_size;
2003
2004
            /*Copy encode array to lap output buf*/
2005
102k
            memcpy(
2006
102k
                &ps_lap_struct->api4_lap_out_buf[ps_lap_struct->i4_lap_encode_idx],
2007
102k
                &ps_lap_struct->api4_encode_order_array[0],
2008
102k
                sizeof(ihevce_lap_enc_buf_t *) * ps_lap_struct->i4_num_bufs_encode_order);
2009
2010
102k
            memset(
2011
102k
                &ps_lap_struct->api4_encode_order_array[0],
2012
102k
                0,
2013
102k
                sizeof(ihevce_lap_enc_buf_t *) * ps_lap_struct->i4_num_bufs_encode_order);
2014
2015
102k
            ps_lap_struct->ai4_num_buffer[ps_lap_struct->i4_lap_encode_idx] =
2016
102k
                ps_lap_struct->i4_num_bufs_encode_order - ps_lap_struct->i4_num_dummy_pic;
2017
2018
102k
            ps_lap_struct->i4_lap_encode_idx++;
2019
102k
            ps_lap_struct->i4_lap_encode_idx &= (MAX_SUBGOP_IN_ENCODE_QUEUE - 1);
2020
102k
        }
2021
2022
        /* store the capture index */
2023
135k
        ps_lap_struct->i4_capture_idx = i4_capture_idx;
2024
135k
        ps_lap_struct->i4_immediate_idr_case = 0;
2025
135k
    }
2026
135k
    return;
2027
135k
}
2028
2029
/*!
2030
************************************************************************
2031
* \brief
2032
*    lap process
2033
************************************************************************
2034
*/
2035
ihevce_lap_enc_buf_t *ihevce_lap_process(void *pv_interface_ctxt, ihevce_lap_enc_buf_t *ps_curr_inp)
2036
135k
{
2037
135k
    lap_intface_t *ps_lap_interface = (lap_intface_t *)pv_interface_ctxt;
2038
135k
    lap_struct_t *ps_lap_struct = (lap_struct_t *)ps_lap_interface->pv_lap_module_ctxt;
2039
135k
    ihevce_hle_ctxt_t *ps_hle_ctxt = (ihevce_hle_ctxt_t *)ps_lap_interface->pv_hle_ctxt;
2040
135k
    ihevce_lap_enc_buf_t *ps_lap_inp_buf = ps_curr_inp;
2041
135k
    ihevce_tgt_params_t *ps_tgt_params =
2042
135k
        &ps_lap_struct->s_static_cfg_params.s_tgt_lyr_prms.as_tgt_params[0];
2043
135k
    WORD32 i4_field_flag = ps_lap_struct->s_lap_static_params.i4_src_interlace_field;
2044
135k
    WORD32 i4_flush_check = 0;
2045
135k
    WORD32 i4_force_idr_check = 0;
2046
135k
    WORD32 i4_tree_num = 0;
2047
135k
    iv_input_ctrl_buffs_t *ps_ctrl_buf = NULL;
2048
135k
    WORD32 buf_id = 0;
2049
135k
    WORD32 i4_lap_window_size = 1 << ps_lap_struct->s_lap_static_params.i4_max_temporal_layers;
2050
2051
135k
    ps_lap_interface->i4_ctrl_in_que_blocking_mode = BUFF_QUE_NON_BLOCKING_MODE;
2052
2053
    /* ----------- LAP processing ----------- */
2054
135k
    if(ps_lap_struct->end_flag != 1)
2055
118k
    {
2056
118k
        ASSERT(NULL != ps_curr_inp);
2057
2058
        /* ---------- get the filled control command buffer ------------ */
2059
118k
        ps_ctrl_buf = (iv_input_ctrl_buffs_t *)ihevce_q_get_filled_buff(
2060
118k
            ps_hle_ctxt->apv_enc_hdl[0],
2061
118k
            ps_lap_interface->i4_ctrl_in_que_id,
2062
118k
            &buf_id,
2063
118k
            ps_lap_interface->i4_ctrl_in_que_blocking_mode);
2064
2065
        /* ----------- check the command ---------------------- */
2066
118k
        if(NULL != ps_ctrl_buf)
2067
5.08k
        {
2068
            /* check for async errors */
2069
5.08k
            ihevce_dyn_config_prms_t as_dyn_br[MAX_NUM_DYN_BITRATE_CMDS];
2070
5.08k
            WORD32 i4_num_set_bitrate_cmds = 0;
2071
5.08k
            WORD32 bitrt_ctr = 0;
2072
2073
5.08k
            ihevce_lap_parse_async_cmd(
2074
5.08k
                ps_hle_ctxt,
2075
5.08k
                (WORD32 *)ps_ctrl_buf->pv_asynch_ctrl_bufs,
2076
5.08k
                ps_ctrl_buf->i4_cmd_buf_size,
2077
5.08k
                ps_ctrl_buf->i4_buf_id,
2078
5.08k
                &i4_num_set_bitrate_cmds,
2079
5.08k
                &as_dyn_br[0]);
2080
2081
            /* Call the call back function to register the new bitrate */
2082
10.1k
            for(bitrt_ctr = 0; bitrt_ctr < i4_num_set_bitrate_cmds; bitrt_ctr++)
2083
5.08k
            {
2084
5.08k
                ps_lap_interface->ihevce_dyn_bitrate_cb(
2085
5.08k
                    (void *)ps_hle_ctxt, (void *)&as_dyn_br[bitrt_ctr]);
2086
5.08k
            }
2087
2088
            /* release async ctrl buffer*/
2089
5.08k
            ihevce_q_rel_buf(
2090
5.08k
                ps_hle_ctxt->apv_enc_hdl[0], IHEVCE_INPUT_ASYNCH_CTRL_Q, ps_ctrl_buf->i4_buf_id);
2091
5.08k
        }
2092
2093
118k
        {
2094
118k
            WORD32 *pi4_cmd_buf = (WORD32 *)ps_lap_inp_buf->s_input_buf.pv_synch_ctrl_bufs;
2095
2096
            /* check for sync cmd buffer error */
2097
            /* check FLUSH comand and Force IDR in the complete buffer */
2098
118k
            i4_flush_check = 0;
2099
118k
            i4_force_idr_check = 0;
2100
118k
            ihevce_lap_parse_sync_cmd(
2101
118k
                ps_hle_ctxt,
2102
118k
                &ps_lap_struct->s_static_cfg_params,
2103
118k
                pi4_cmd_buf,
2104
118k
                ps_lap_inp_buf,
2105
118k
                &i4_flush_check,
2106
118k
                &i4_force_idr_check);
2107
2108
118k
            if(i4_flush_check)
2109
7.38k
                ps_lap_struct->end_flag = 1;
2110
2111
118k
            ps_lap_inp_buf->s_lap_out.i4_out_flush_flag = 0;
2112
118k
            ps_lap_inp_buf->s_lap_out.i4_end_flag = ps_lap_struct->end_flag;
2113
2114
            /* check if input buffer is a valid buffer */
2115
118k
            if(1 == ps_lap_inp_buf->s_input_buf.i4_inp_frm_data_valid_flag)
2116
110k
            {
2117
                /* Initialise laps input buffer descriptors */
2118
110k
                memset(&ps_lap_inp_buf->s_lap_out, 0, sizeof(ihevce_lap_output_params_t));
2119
110k
                memset(&ps_lap_inp_buf->s_rc_lap_out, 0, sizeof(rc_lap_out_params_t));
2120
                /* Default initialization of lapout parameters */
2121
110k
                ps_lap_inp_buf->s_lap_out.i4_scene_type = SCENE_TYPE_NORMAL;
2122
110k
                ps_lap_inp_buf->s_lap_out.u4_scene_num = 0;
2123
110k
                ps_lap_inp_buf->s_lap_out.i4_display_num = ps_lap_struct->i4_display_num;
2124
110k
                ps_lap_inp_buf->s_lap_out.i4_quality_preset = ps_tgt_params->i4_quality_preset;
2125
110k
                ps_lap_inp_buf->s_lap_out.i1_weighted_pred_flag = 0;
2126
110k
                ps_lap_inp_buf->s_lap_out.i1_weighted_bipred_flag = 0;
2127
110k
                ps_lap_inp_buf->s_lap_out.i4_log2_luma_wght_denom = DENOM_DEFAULT;
2128
110k
                ps_lap_inp_buf->s_lap_out.i4_log2_chroma_wght_denom = DENOM_DEFAULT;
2129
110k
                ps_lap_inp_buf->s_lap_out.as_ref_pics[0].i4_num_duplicate_entries_in_ref_list = 1;
2130
110k
                ps_lap_inp_buf->s_lap_out.as_ref_pics[0].i4_used_by_cur_pic_flag = 1;
2131
110k
                ps_lap_inp_buf->s_lap_out.as_ref_pics[0].as_wght_off[0].u1_luma_weight_enable_flag =
2132
110k
                    0;
2133
110k
                ps_lap_inp_buf->s_lap_out.as_ref_pics[0]
2134
110k
                    .as_wght_off[0]
2135
110k
                    .u1_chroma_weight_enable_flag = 0;
2136
110k
                ps_lap_inp_buf->s_lap_out.i4_first_field = 1;
2137
110k
                ps_lap_inp_buf->s_lap_out.i4_force_idr_flag = 0;
2138
110k
                ps_lap_inp_buf->s_lap_out.i4_curr_frm_qp = ps_tgt_params->ai4_frame_qp[0];
2139
110k
                ps_lap_inp_buf->s_lap_out.i4_used = 1;
2140
110k
                if(i4_force_idr_check)
2141
1.21k
                {
2142
1.21k
                    ps_lap_inp_buf->s_lap_out.i4_force_idr_flag = 1;
2143
1.21k
                }
2144
                /* Populate input params in lap out struct */
2145
110k
                ps_lap_inp_buf->s_lap_out.s_input_buf.pv_y_buf =
2146
110k
                    ps_lap_inp_buf->s_input_buf.s_input_buf.pv_y_buf;
2147
110k
                ps_lap_inp_buf->s_lap_out.s_input_buf.pv_u_buf =
2148
110k
                    ps_lap_inp_buf->s_input_buf.s_input_buf.pv_u_buf;
2149
110k
                ps_lap_inp_buf->s_lap_out.s_input_buf.pv_v_buf =
2150
110k
                    ps_lap_inp_buf->s_input_buf.s_input_buf.pv_v_buf;
2151
110k
                ps_lap_inp_buf->s_lap_out.s_input_buf.i4_y_wd =
2152
110k
                    ps_lap_inp_buf->s_input_buf.s_input_buf.i4_y_wd;
2153
110k
                ps_lap_inp_buf->s_lap_out.s_input_buf.i4_y_ht =
2154
110k
                    ps_lap_inp_buf->s_input_buf.s_input_buf.i4_y_ht;
2155
110k
                ps_lap_inp_buf->s_lap_out.s_input_buf.i4_y_strd =
2156
110k
                    ps_lap_inp_buf->s_input_buf.s_input_buf.i4_y_strd;
2157
110k
                ps_lap_inp_buf->s_lap_out.s_input_buf.i4_uv_wd =
2158
110k
                    ps_lap_inp_buf->s_input_buf.s_input_buf.i4_uv_wd;
2159
110k
                ps_lap_inp_buf->s_lap_out.s_input_buf.i4_uv_ht =
2160
110k
                    ps_lap_inp_buf->s_input_buf.s_input_buf.i4_uv_ht;
2161
110k
                ps_lap_inp_buf->s_lap_out.s_input_buf.i4_uv_strd =
2162
110k
                    ps_lap_inp_buf->s_input_buf.s_input_buf.i4_uv_strd;
2163
2164
110k
                ps_lap_struct->i4_display_num++;
2165
110k
                ps_lap_struct->aps_lap_inp_buf[ps_lap_struct->i4_buf_enq_idx] = ps_lap_inp_buf;
2166
                /* update first field flag */
2167
110k
                ps_lap_inp_buf->s_lap_out.i4_first_field = 1;
2168
110k
                if(i4_field_flag)
2169
0
                {
2170
0
                    ps_lap_inp_buf->s_lap_out.i4_first_field =
2171
0
                        (ps_lap_inp_buf->s_input_buf.i4_topfield_first ^
2172
0
                         ps_lap_inp_buf->s_input_buf.i4_bottom_field);
2173
0
                }
2174
2175
                /* force idr in case interlace input can be taken only for first field */
2176
110k
                if(!ps_lap_inp_buf->s_lap_out.i4_first_field)
2177
0
                {
2178
0
                    ps_lap_inp_buf->s_lap_out.i4_force_idr_flag = 0;
2179
0
                }
2180
2181
110k
                if((i4_lap_window_size > 1) &&
2182
26.5k
                   (ps_lap_struct->ai1_pic_type[ps_lap_struct->i4_next_start_ctr] != PIC_TYPE_IDR))
2183
23.2k
                {
2184
23.2k
                    ps_lap_struct->i4_sub_gop_pic_idx++;
2185
23.2k
                    if(ps_lap_struct->i4_sub_gop_pic_idx > i4_lap_window_size)
2186
4.66k
                    {
2187
4.66k
                        ps_lap_struct->i4_sub_gop_pic_idx =
2188
4.66k
                            ps_lap_struct->i4_sub_gop_pic_idx - i4_lap_window_size;
2189
4.66k
                    }
2190
23.2k
                }
2191
87.5k
                else if(1 == i4_lap_window_size)
2192
84.2k
                {
2193
84.2k
                    ps_lap_struct->i4_sub_gop_pic_idx = 1;
2194
84.2k
                }
2195
2196
110k
                if(i4_force_idr_check &&
2197
1.21k
                   (ps_lap_struct->ai1_pic_type[ps_lap_struct->i4_next_start_ctr] != PIC_TYPE_IDR))
2198
583
                {
2199
583
                    ps_lap_struct->i4_force_idr_pos = ps_lap_struct->i4_sub_gop_pic_idx;
2200
583
                }
2201
2202
                /* store pictype for next subgop */
2203
110k
                if((0 == ps_lap_struct->i4_num_frm_type_decided) &&
2204
91.5k
                   (ps_lap_struct->i4_force_idr_pos == 0))
2205
91.1k
                {
2206
91.1k
                    ps_lap_struct->ai1_pic_type[0] =
2207
91.1k
                        ps_lap_struct->ai1_pic_type[ps_lap_struct->i4_next_start_ctr];
2208
2209
91.1k
                    ihevce_determine_next_sub_gop_state(ps_lap_struct);
2210
2211
91.1k
                    ps_lap_struct->i4_next_start_ctr = 0;
2212
91.1k
                }
2213
19.6k
                else if(
2214
19.6k
                    i4_force_idr_check &&
2215
583
                    (ps_lap_struct->i4_force_idr_pos <= ps_lap_struct->i4_sub_gop_size))
2216
583
                {
2217
                    /*check force idr pos is 1st pic in sub-gop then don't add dummy pics*/
2218
583
                    if(ps_lap_struct->i4_force_idr_pos != 1)
2219
157
                    {
2220
157
                        WORD32 sub_gop_pos = ps_lap_struct->i4_force_idr_pos;
2221
458
                        while(sub_gop_pos <= ps_lap_struct->i4_sub_gop_size)
2222
301
                        {
2223
301
                            ps_lap_struct->i4_num_dummy_pic++;
2224
301
                            ihevce_lap_queue_input(ps_lap_struct, NULL, &i4_tree_num);
2225
301
                            sub_gop_pos++;
2226
301
                        }
2227
157
                        ps_lap_struct->i4_num_dummy_pic = 0;
2228
157
                    }
2229
583
                    ps_lap_struct->ai1_pic_type[0] =
2230
583
                        ps_lap_struct->ai1_pic_type[ps_lap_struct->i4_next_start_ctr];
2231
2232
583
                    ihevce_determine_next_sub_gop_state(ps_lap_struct);
2233
2234
583
                    ps_lap_struct->i4_next_start_ctr = 0;
2235
583
                }
2236
2237
110k
                if(/*ps_lap_struct->i4_init_delay_over &&*/ 0 !=
2238
110k
                   ps_lap_struct->i4_num_frm_type_decided)
2239
110k
                {
2240
110k
                    ihevce_assign_pic_type(
2241
110k
                        ps_lap_struct,
2242
110k
                        ps_lap_struct->aps_lap_inp_buf[ps_lap_struct->i4_buf_deq_idx]);
2243
2244
110k
                    ps_lap_struct->i4_num_frm_type_decided--;
2245
2246
110k
                    if(NULL != ps_lap_struct->aps_lap_inp_buf[ps_lap_struct->i4_buf_deq_idx])
2247
110k
                    {
2248
                        /*special case of two consequetive idr at the start of encode or due to force idr*/
2249
110k
                        ps_lap_struct->i4_immediate_idr_case =
2250
110k
                            ps_lap_struct->i4_is_all_i_pic_in_seq;
2251
110k
                        if(ps_lap_struct->aps_lap_inp_buf[ps_lap_struct->i4_buf_deq_idx]
2252
110k
                               ->s_lap_out.i4_pic_type == IV_IDR_FRAME)
2253
21.3k
                        {
2254
21.3k
                            ps_lap_struct->i4_immediate_idr_case = 1;
2255
21.3k
                        }
2256
89.4k
                        else
2257
89.4k
                        {
2258
89.4k
                            WORD32 i4_prev_idx = ps_lap_struct->i4_buf_deq_idx > 0
2259
89.4k
                                                     ? ps_lap_struct->i4_buf_deq_idx - 1
2260
89.4k
                                                     : ps_lap_struct->i4_buf_deq_idx;
2261
                            /*field case of single IDR field followed by P*/
2262
89.4k
                            if(NULL != ps_lap_struct->aps_lap_inp_buf[i4_prev_idx] &&
2263
89.4k
                               i4_field_flag &&
2264
0
                               ps_lap_struct->aps_lap_inp_buf[i4_prev_idx]->s_lap_out.i4_pic_type ==
2265
0
                                   IV_IDR_FRAME &&
2266
0
                               !ps_lap_struct->i4_num_frm_type_decided)
2267
0
                            {
2268
0
                                ps_lap_struct->i4_immediate_idr_case = 1;
2269
0
                            }
2270
89.4k
                        }
2271
110k
                    }
2272
2273
                    /* Queue in the current input Buffer to LAP que */
2274
110k
                    ihevce_lap_queue_input(
2275
110k
                        ps_lap_struct,
2276
110k
                        ps_lap_struct->aps_lap_inp_buf[ps_lap_struct->i4_buf_deq_idx],
2277
110k
                        &i4_tree_num);
2278
2279
110k
                    ps_lap_struct->i4_next_start_ctr++;
2280
110k
                    ps_lap_struct->i4_buf_deq_idx++;
2281
110k
                    if(ps_lap_struct->i4_buf_deq_idx >= MAX_QUEUE_LENGTH)
2282
540
                        ps_lap_struct->i4_buf_deq_idx = 0;
2283
110k
                }
2284
2285
110k
                ps_lap_struct->i4_buf_enq_idx++;
2286
110k
                if(ps_lap_struct->i4_buf_enq_idx >= MAX_QUEUE_LENGTH)
2287
540
                    ps_lap_struct->i4_buf_enq_idx = 0;
2288
110k
            } /* end if for valid input buffer check*/
2289
118k
        }
2290
2291
        /* source pixel padding if width/height is not aligned to 8 pixel */
2292
118k
        if(ps_lap_inp_buf->s_input_buf.i4_inp_frm_data_valid_flag)
2293
110k
        {
2294
110k
            ihevce_src_params_t *ps_src_prms = &ps_lap_struct->s_static_cfg_params.s_src_prms;
2295
110k
            WORD32 i4_align_wd = ps_src_prms->i4_width;
2296
110k
            WORD32 i4_align_ht = ps_src_prms->i4_height;
2297
110k
            WORD32 min_cu_size =
2298
110k
                (1 << ps_lap_struct->s_static_cfg_params.s_config_prms.i4_min_log2_cu_size);
2299
2300
110k
            i4_align_wd += SET_CTB_ALIGN(ps_src_prms->i4_width, min_cu_size);
2301
110k
            i4_align_ht += SET_CTB_ALIGN(ps_src_prms->i4_height, min_cu_size);
2302
2303
110k
            ihevce_lap_pad_input_bufs(ps_lap_inp_buf, i4_align_wd, i4_align_ht);
2304
110k
        }
2305
118k
        {
2306
118k
            ps_lap_inp_buf->s_lap_out.s_logo_ctxt.logo_width = 0;
2307
118k
            ps_lap_inp_buf->s_lap_out.s_logo_ctxt.logo_height = 0;
2308
118k
            ps_lap_inp_buf->s_lap_out.s_logo_ctxt.logo_x_offset = 0;
2309
118k
            ps_lap_inp_buf->s_lap_out.s_logo_ctxt.logo_y_offset = 0;
2310
118k
        }
2311
118k
    }
2312
2313
135k
    if(ps_lap_struct->end_flag == 1)
2314
24.7k
    {
2315
24.7k
        ps_lap_struct->aps_lap_inp_buf[ps_lap_struct->i4_buf_enq_idx] = ps_lap_inp_buf;
2316
2317
        /*to be filed*/
2318
24.7k
        if(0 == ps_lap_struct->i4_num_frm_type_decided)
2319
9.21k
        {
2320
9.21k
            ps_lap_struct->ai1_pic_type[0] =
2321
9.21k
                ps_lap_struct->ai1_pic_type[ps_lap_struct->i4_next_start_ctr];
2322
2323
9.21k
            ihevce_determine_next_sub_gop_state(ps_lap_struct);
2324
2325
9.21k
            ps_lap_struct->i4_next_start_ctr = 0;
2326
9.21k
        }
2327
2328
24.7k
        if(NULL != ps_lap_struct->aps_lap_inp_buf[ps_lap_struct->i4_buf_deq_idx])
2329
7.38k
        {
2330
7.38k
            ihevce_assign_pic_type(
2331
7.38k
                ps_lap_struct, ps_lap_struct->aps_lap_inp_buf[ps_lap_struct->i4_buf_deq_idx]);
2332
7.38k
        }
2333
2334
24.7k
        ps_lap_struct->i4_num_frm_type_decided--;
2335
2336
24.7k
        if(NULL != ps_lap_struct->aps_lap_inp_buf[ps_lap_struct->i4_buf_deq_idx])
2337
7.38k
        {
2338
            /*special case of two consequetive idr at the start of encode or due to force idr*/
2339
7.38k
            ps_lap_struct->i4_immediate_idr_case = ps_lap_struct->i4_is_all_i_pic_in_seq;
2340
2341
7.38k
            if(ps_lap_struct->aps_lap_inp_buf[ps_lap_struct->i4_buf_deq_idx]
2342
7.38k
                   ->s_lap_out.i4_pic_type == IV_IDR_FRAME)
2343
552
            {
2344
552
                ps_lap_struct->i4_immediate_idr_case = 1;
2345
552
            }
2346
6.83k
            else
2347
6.83k
            {
2348
6.83k
                WORD32 i4_prev_idx = ps_lap_struct->i4_buf_deq_idx > 0
2349
6.83k
                                         ? ps_lap_struct->i4_buf_deq_idx - 1
2350
6.83k
                                         : ps_lap_struct->i4_buf_deq_idx;
2351
                /*field case of single IDR field followed by P*/
2352
6.83k
                if(NULL != ps_lap_struct->aps_lap_inp_buf[i4_prev_idx] && i4_field_flag &&
2353
0
                   ps_lap_struct->aps_lap_inp_buf[i4_prev_idx]->s_lap_out.i4_pic_type ==
2354
0
                       IV_IDR_FRAME &&
2355
0
                   !ps_lap_struct->i4_num_frm_type_decided)
2356
0
                {
2357
0
                    ps_lap_struct->i4_immediate_idr_case = 1;
2358
0
                }
2359
6.83k
            }
2360
7.38k
        }
2361
        /* Queue in the current input Buffer to LAP que */
2362
24.7k
        ihevce_lap_queue_input(
2363
24.7k
            ps_lap_struct,
2364
24.7k
            ps_lap_struct->aps_lap_inp_buf[ps_lap_struct->i4_buf_deq_idx],
2365
24.7k
            &i4_tree_num);
2366
24.7k
        ps_lap_struct->i4_max_buf_in_enc_order =
2367
24.7k
            ps_lap_struct->ai4_num_buffer[ps_lap_struct->i4_deq_lap_buf];
2368
24.7k
        ps_lap_struct->i4_next_start_ctr++;
2369
24.7k
        ps_lap_struct->i4_buf_deq_idx++;
2370
2371
24.7k
        if(ps_lap_struct->i4_buf_deq_idx >= MAX_QUEUE_LENGTH)
2372
20
            ps_lap_struct->i4_buf_deq_idx = 0;
2373
2374
24.7k
        ps_lap_struct->i4_buf_enq_idx++;
2375
24.7k
        if(ps_lap_struct->i4_buf_enq_idx >= MAX_QUEUE_LENGTH)
2376
20
            ps_lap_struct->i4_buf_enq_idx = 0;
2377
24.7k
    }
2378
2379
135k
    if(1 == ps_lap_struct->i4_force_end_flag)
2380
0
    {
2381
0
        ihevce_force_end(ps_hle_ctxt);
2382
0
    }
2383
2384
    /*return encode order pic to pre enc*/
2385
135k
    ps_lap_inp_buf = NULL;
2386
2387
135k
    if(NULL !=
2388
135k
       ps_lap_struct->api4_lap_out_buf[ps_lap_struct->i4_deq_lap_buf][ps_lap_struct->i4_lap_out_idx])
2389
118k
    {
2390
118k
        ps_lap_inp_buf =
2391
118k
            ps_lap_struct
2392
118k
                ->api4_lap_out_buf[ps_lap_struct->i4_deq_lap_buf][ps_lap_struct->i4_lap_out_idx];
2393
118k
        ps_lap_struct
2394
118k
            ->api4_lap_out_buf[ps_lap_struct->i4_deq_lap_buf][ps_lap_struct->i4_lap_out_idx] = NULL;
2395
118k
        if(!ps_lap_inp_buf->s_lap_out.i4_end_flag)
2396
110k
            ihevce_pre_rel_lapout_update(ps_lap_struct, ps_lap_inp_buf);
2397
2398
118k
        ps_lap_struct->i4_max_buf_in_enc_order =
2399
118k
            ps_lap_struct->ai4_num_buffer[ps_lap_struct->i4_deq_lap_buf];
2400
118k
    }
2401
2402
135k
    ps_lap_struct->i4_lap_out_idx++;
2403
135k
    if(ps_lap_struct->i4_lap_out_idx == ps_lap_struct->i4_max_buf_in_enc_order)
2404
106k
    {
2405
106k
        if(ps_lap_struct->ai4_num_buffer[ps_lap_struct->i4_deq_lap_buf])
2406
101k
        {
2407
101k
            ps_lap_struct->ai4_num_buffer[ps_lap_struct->i4_deq_lap_buf] = 0;
2408
101k
            ps_lap_struct->i4_deq_lap_buf++;
2409
101k
            ps_lap_struct->i4_deq_lap_buf &= (MAX_SUBGOP_IN_ENCODE_QUEUE - 1);
2410
101k
        }
2411
2412
106k
        ps_lap_struct->i4_lap_out_idx = 0;
2413
106k
    }
2414
2415
135k
    return (ps_lap_inp_buf);
2416
135k
}
2417
2418
/*!
2419
************************************************************************
2420
* \brief
2421
*    lap get input buffer requirement count
2422
************************************************************************
2423
*/
2424
WORD32 ihevce_lap_get_num_ip_bufs(ihevce_lap_static_params_t *ps_lap_stat_prms)
2425
14.7k
{
2426
14.7k
    WORD32 i4_lap_window_size = 1;
2427
14.7k
    WORD32 gop_delay = 1 << ps_lap_stat_prms->i4_max_temporal_layers;
2428
2429
14.7k
    if(ps_lap_stat_prms->s_lap_params.i4_rc_look_ahead_pics != 0)
2430
0
    {
2431
0
        i4_lap_window_size = 1 + ps_lap_stat_prms->s_lap_params.i4_rc_look_ahead_pics;
2432
0
    }
2433
2434
14.7k
    gop_delay += (i4_lap_window_size);
2435
14.7k
    return gop_delay;
2436
14.7k
}