/src/libmpeg2/decoder/impeg2d_api_main.c
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1 | | /****************************************************************************** |
2 | | * |
3 | | * Copyright (C) 2015 The Android Open Source Project |
4 | | * |
5 | | * Licensed under the Apache License, Version 2.0 (the "License"); |
6 | | * you may not use this file except in compliance with the License. |
7 | | * You may obtain a copy of the License at: |
8 | | * |
9 | | * http://www.apache.org/licenses/LICENSE-2.0 |
10 | | * |
11 | | * Unless required by applicable law or agreed to in writing, software |
12 | | * distributed under the License is distributed on an "AS IS" BASIS, |
13 | | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
14 | | * See the License for the specific language governing permissions and |
15 | | * limitations under the License. |
16 | | * |
17 | | ***************************************************************************** |
18 | | * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore |
19 | | */ |
20 | | /*****************************************************************************/ |
21 | | /* */ |
22 | | /* File Name : decoder_api_main.c */ |
23 | | /* */ |
24 | | /* Description : Functions which recieve the API call from user */ |
25 | | /* */ |
26 | | /* List of Functions : <List the functions defined in this file> */ |
27 | | /* */ |
28 | | /* Issues / Problems : None */ |
29 | | /* */ |
30 | | /* Revision History : */ |
31 | | /* */ |
32 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
33 | | /* 30 05 2007 Rajneesh Creation */ |
34 | | /* */ |
35 | | /*****************************************************************************/ |
36 | | |
37 | | /*****************************************************************************/ |
38 | | /* File Includes */ |
39 | | /*****************************************************************************/ |
40 | | |
41 | | /* System include files */ |
42 | | #include <stdio.h> |
43 | | #include <stdlib.h> |
44 | | #include <stddef.h> |
45 | | #include <string.h> |
46 | | |
47 | | /* User include files */ |
48 | | #include "iv_datatypedef.h" |
49 | | #include "iv.h" |
50 | | #include "ivd.h" |
51 | | #include "ithread.h" |
52 | | |
53 | | #include "impeg2_job_queue.h" |
54 | | #include "impeg2_macros.h" |
55 | | #include "impeg2_buf_mgr.h" |
56 | | #include "impeg2_disp_mgr.h" |
57 | | #include "impeg2_defs.h" |
58 | | #include "impeg2_platform_macros.h" |
59 | | #include "impeg2_inter_pred.h" |
60 | | #include "impeg2_idct.h" |
61 | | #include "impeg2_format_conv.h" |
62 | | #include "impeg2_mem_func.h" |
63 | | |
64 | | #include "impeg2d.h" |
65 | | #include "impeg2d_api.h" |
66 | | #include "impeg2d_bitstream.h" |
67 | | #include "impeg2d_debug.h" |
68 | | #include "impeg2d_structs.h" |
69 | | #include "impeg2d_mc.h" |
70 | | #include "impeg2d_pic_proc.h" |
71 | | #include "impeg2d_deinterlace.h" |
72 | | |
73 | | #define NUM_FRAMES_LIMIT_ENABLED 0 |
74 | | |
75 | | #ifdef LOGO_EN |
76 | | #include "impeg2_ittiam_logo.h" |
77 | | #define INSERT_LOGO(buf_y, buf_u, buf_v, stride, x_pos, y_pos, yuv_fmt,disp_wd,disp_ht) impeg2_insert_logo(buf_y, buf_u, buf_v, stride, x_pos, y_pos, yuv_fmt,disp_wd,disp_ht); |
78 | | #else |
79 | | #define INSERT_LOGO(buf_y, buf_u, buf_v, stride, x_pos, y_pos, yuv_fmt,disp_wd,disp_ht) |
80 | | #endif |
81 | | |
82 | | #if NUM_FRAMES_LIMIT_ENABLED |
83 | | #define NUM_FRAMES_LIMIT 10000 |
84 | | #else |
85 | 53.7k | #define NUM_FRAMES_LIMIT 0x7FFFFFFF |
86 | | #endif |
87 | | |
88 | | #define CODEC_NAME "MPEG2VDEC" |
89 | | #define CODEC_RELEASE_TYPE "eval" |
90 | | #define CODEC_RELEASE_VER "01.00" |
91 | | #define CODEC_VENDOR "ITTIAM" |
92 | | |
93 | | #ifdef ANDROID |
94 | | #define VERSION(version_string, codec_name, codec_release_type, codec_release_ver, codec_vendor) \ |
95 | | strcpy(version_string,"@(#)Id:"); \ |
96 | | strcat(version_string,codec_name); \ |
97 | | strcat(version_string,"_"); \ |
98 | | strcat(version_string,codec_release_type); \ |
99 | | strcat(version_string," Ver:"); \ |
100 | | strcat(version_string,codec_release_ver); \ |
101 | | strcat(version_string," Released by "); \ |
102 | | strcat(version_string,codec_vendor); |
103 | | #else |
104 | | #define VERSION(version_string, codec_name, codec_release_type, codec_release_ver, codec_vendor) \ |
105 | 0 | strcpy(version_string,"@(#)Id:"); \ |
106 | 0 | strcat(version_string,codec_name); \ |
107 | 0 | strcat(version_string,"_"); \ |
108 | 0 | strcat(version_string,codec_release_type); \ |
109 | 0 | strcat(version_string," Ver:"); \ |
110 | 0 | strcat(version_string,codec_release_ver); \ |
111 | 0 | strcat(version_string," Released by "); \ |
112 | 0 | strcat(version_string,codec_vendor); \ |
113 | 0 | strcat(version_string," Build: "); \ |
114 | 0 | strcat(version_string,__DATE__); \ |
115 | 0 | strcat(version_string," @ "); \ |
116 | 0 | strcat(version_string,__TIME__); |
117 | | #endif |
118 | | |
119 | | |
120 | 15.8k | #define MIN_OUT_BUFS_420 3 |
121 | 0 | #define MIN_OUT_BUFS_422ILE 1 |
122 | 0 | #define MIN_OUT_BUFS_RGB565 1 |
123 | 19.7k | #define MIN_OUT_BUFS_420SP 2 |
124 | | |
125 | | |
126 | | void impeg2d_init_arch(void *pv_codec); |
127 | | void impeg2d_init_function_ptr(void *pv_codec); |
128 | | UWORD32 impeg2d_get_outbuf_size(WORD32 pic_wd,UWORD32 pic_ht, WORD32 u1_chroma_format,UWORD32 *p_buf_size); |
129 | | |
130 | | /*****************************************************************************/ |
131 | | /* */ |
132 | | /* Function Name : impeg2d_api_rel_display_frame */ |
133 | | /* */ |
134 | | /* Description : Release displ buffers that will be shared between decoder */ |
135 | | /* and application */ |
136 | | /* Inputs : Error message */ |
137 | | /* Globals : None */ |
138 | | /* Processing : Just prints error message to console */ |
139 | | /* Outputs : Error mesage to the console */ |
140 | | /* Returns : None */ |
141 | | /* */ |
142 | | /* Issues : <List any issues or problems with this function> */ |
143 | | /* */ |
144 | | /* Revision History: */ |
145 | | /* */ |
146 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
147 | | /* 27 05 2006 Sankar Creation */ |
148 | | /* */ |
149 | | /*****************************************************************************/ |
150 | | IV_API_CALL_STATUS_T impeg2d_api_rel_display_frame(iv_obj_t *ps_dechdl, |
151 | | void *pv_api_ip, |
152 | | void *pv_api_op) |
153 | 0 | { |
154 | |
|
155 | 0 | ivd_rel_display_frame_ip_t *dec_rel_disp_ip; |
156 | 0 | ivd_rel_display_frame_op_t *dec_rel_disp_op; |
157 | |
|
158 | 0 | dec_state_t *ps_dec_state; |
159 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
160 | | |
161 | |
|
162 | 0 | dec_rel_disp_ip = (ivd_rel_display_frame_ip_t *)pv_api_ip; |
163 | 0 | dec_rel_disp_op = (ivd_rel_display_frame_op_t *)pv_api_op; |
164 | |
|
165 | 0 | dec_rel_disp_op->u4_error_code = 0; |
166 | 0 | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
167 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
168 | | |
169 | | |
170 | | /* If not in shared disp buf mode, return */ |
171 | 0 | if(0 == ps_dec_state->u4_share_disp_buf) |
172 | 0 | return IV_SUCCESS; |
173 | | |
174 | 0 | if(NULL == ps_dec_state->pv_pic_buf_mg) |
175 | 0 | return IV_SUCCESS; |
176 | | |
177 | | |
178 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, dec_rel_disp_ip->u4_disp_buf_id, BUF_MGR_DISP); |
179 | |
|
180 | 0 | return IV_SUCCESS; |
181 | 0 | } |
182 | | |
183 | | /*****************************************************************************/ |
184 | | /* */ |
185 | | /* Function Name : impeg2d_api_set_display_frame */ |
186 | | /* */ |
187 | | /* Description : Sets display buffers that will be shared between decoder */ |
188 | | /* and application */ |
189 | | /* Inputs : Error message */ |
190 | | /* Globals : None */ |
191 | | /* Processing : Just prints error message to console */ |
192 | | /* Outputs : Error mesage to the console */ |
193 | | /* Returns : None */ |
194 | | /* */ |
195 | | /* Issues : <List any issues or problems with this function> */ |
196 | | /* */ |
197 | | /* Revision History: */ |
198 | | /* */ |
199 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
200 | | /* 27 05 2006 Sankar Creation */ |
201 | | /* */ |
202 | | /*****************************************************************************/ |
203 | | IV_API_CALL_STATUS_T impeg2d_api_set_display_frame(iv_obj_t *ps_dechdl, |
204 | | void *pv_api_ip, |
205 | | void *pv_api_op) |
206 | 0 | { |
207 | |
|
208 | 0 | ivd_set_display_frame_ip_t *dec_disp_ip; |
209 | 0 | ivd_set_display_frame_op_t *dec_disp_op; |
210 | |
|
211 | 0 | UWORD32 i; |
212 | 0 | dec_state_t *ps_dec_state; |
213 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
214 | 0 | UWORD32 u4_num_disp_bufs; |
215 | 0 | UWORD32 u4_disp_buf_size[3]; |
216 | 0 | UWORD32 num_bufs; |
217 | | |
218 | |
|
219 | 0 | dec_disp_ip = (ivd_set_display_frame_ip_t *)pv_api_ip; |
220 | 0 | dec_disp_op = (ivd_set_display_frame_op_t *)pv_api_op; |
221 | 0 | dec_disp_op->u4_error_code = 0; |
222 | |
|
223 | 0 | u4_num_disp_bufs = dec_disp_ip->num_disp_bufs; |
224 | 0 | if(u4_num_disp_bufs > BUF_MGR_MAX_CNT) |
225 | 0 | u4_num_disp_bufs = BUF_MGR_MAX_CNT; |
226 | |
|
227 | 0 | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
228 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
229 | |
|
230 | 0 | num_bufs = dec_disp_ip->s_disp_buffer[0].u4_num_bufs; |
231 | |
|
232 | 0 | if(ps_dec_state->u4_share_disp_buf) |
233 | 0 | { |
234 | 0 | pic_buf_t *ps_pic_buf; |
235 | 0 | ps_pic_buf = (pic_buf_t *)ps_dec_state->pv_pic_buf_base; |
236 | | |
237 | | /* Get the sizes of the first buffer structure. Compare this with the |
238 | | * rest to make sure all the buffers are of the same size. |
239 | | */ |
240 | 0 | u4_disp_buf_size[0] = |
241 | 0 | dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[0]; |
242 | 0 | u4_disp_buf_size[1] = |
243 | 0 | dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1]; |
244 | 0 | u4_disp_buf_size[2] = |
245 | 0 | dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[2]; |
246 | 0 | for(i = 0; i < u4_num_disp_bufs; i++) |
247 | 0 | { |
248 | | /* Verify all buffer structures have the same sized buffers as the |
249 | | * first buffer structure*/ |
250 | 0 | if ((dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[0] |
251 | 0 | != u4_disp_buf_size[0]) |
252 | 0 | || (dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[1] |
253 | 0 | != u4_disp_buf_size[1]) |
254 | 0 | || (dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[2] |
255 | 0 | != u4_disp_buf_size[2])) |
256 | 0 | { |
257 | 0 | return IV_FAIL; |
258 | 0 | } |
259 | | /* Verify all buffer structures have the same number of |
260 | | * buffers (e.g. y, u, v) */ |
261 | 0 | if (dec_disp_ip->s_disp_buffer[i].u4_num_bufs != num_bufs) |
262 | 0 | { |
263 | 0 | return IV_FAIL; |
264 | 0 | } |
265 | | |
266 | 0 | ps_pic_buf->pu1_y = dec_disp_ip->s_disp_buffer[i].pu1_bufs[0]; |
267 | 0 | if(IV_YUV_420P == ps_dec_state->i4_chromaFormat) |
268 | 0 | { |
269 | 0 | ps_pic_buf->pu1_u = dec_disp_ip->s_disp_buffer[i].pu1_bufs[1]; |
270 | 0 | ps_pic_buf->pu1_v = dec_disp_ip->s_disp_buffer[i].pu1_bufs[2]; |
271 | 0 | } |
272 | 0 | else |
273 | 0 | { |
274 | 0 | ps_pic_buf->pu1_u = ps_dec_state->pu1_chroma_ref_buf[i]; |
275 | 0 | ps_pic_buf->pu1_v = ps_dec_state->pu1_chroma_ref_buf[i] + |
276 | 0 | ((ps_dec_state->u2_create_max_width * ps_dec_state->u2_create_max_height) >> 2); |
277 | 0 | } |
278 | |
|
279 | 0 | ps_pic_buf->i4_buf_id = i; |
280 | |
|
281 | 0 | ps_pic_buf->u1_used_as_ref = 0; |
282 | |
|
283 | 0 | ps_pic_buf->u4_ts = 0; |
284 | |
|
285 | 0 | impeg2_buf_mgr_add(ps_dec_state->pv_pic_buf_mg, ps_pic_buf, i); |
286 | 0 | impeg2_buf_mgr_set_status(ps_dec_state->pv_pic_buf_mg, i, BUF_MGR_DISP); |
287 | 0 | ps_pic_buf++; |
288 | |
|
289 | 0 | } |
290 | 0 | } |
291 | 0 | memcpy(&(ps_dec_state->as_disp_buffers[0]), |
292 | 0 | &(dec_disp_ip->s_disp_buffer), |
293 | 0 | u4_num_disp_bufs * sizeof(ivd_out_bufdesc_t)); |
294 | |
|
295 | 0 | return IV_SUCCESS; |
296 | |
|
297 | 0 | } |
298 | | |
299 | | IV_API_CALL_STATUS_T impeg2d_api_set_num_cores(iv_obj_t *ps_dechdl, |
300 | | void *pv_api_ip, |
301 | | void *pv_api_op) |
302 | 6.21k | { |
303 | 6.21k | impeg2d_ctl_set_num_cores_ip_t *ps_ip; |
304 | 6.21k | impeg2d_ctl_set_num_cores_op_t *ps_op; |
305 | 6.21k | dec_state_t *ps_dec_state; |
306 | 6.21k | dec_state_multi_core_t *ps_dec_state_multi_core; |
307 | | |
308 | 6.21k | ps_ip = (impeg2d_ctl_set_num_cores_ip_t *)pv_api_ip; |
309 | 6.21k | ps_op = (impeg2d_ctl_set_num_cores_op_t *)pv_api_op; |
310 | | |
311 | 6.21k | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
312 | 6.21k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
313 | | |
314 | 6.21k | if(ps_ip->u4_num_cores > 0) |
315 | 6.21k | { |
316 | | |
317 | | |
318 | 6.21k | WORD32 i; |
319 | 31.0k | for(i = 0; i < MAX_THREADS; i++) |
320 | 24.8k | ps_dec_state_multi_core->ps_dec_state[i]->i4_num_cores = ps_ip->u4_num_cores; |
321 | 6.21k | } |
322 | 0 | else |
323 | 0 | { |
324 | 0 | ps_dec_state->i4_num_cores = 1; |
325 | 0 | } |
326 | 6.21k | ps_op->u4_error_code = IV_SUCCESS; |
327 | | |
328 | 6.21k | return IV_SUCCESS; |
329 | 6.21k | } |
330 | | |
331 | | IV_API_CALL_STATUS_T impeg2d_api_get_seq_info(iv_obj_t *ps_dechdl, |
332 | | void *pv_api_ip, |
333 | | void *pv_api_op) |
334 | 0 | { |
335 | 0 | impeg2d_ctl_get_seq_info_ip_t *ps_ip; |
336 | 0 | impeg2d_ctl_get_seq_info_op_t *ps_op; |
337 | 0 | dec_state_t *ps_codec; |
338 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
339 | |
|
340 | 0 | ps_ip = (impeg2d_ctl_get_seq_info_ip_t *)pv_api_ip; |
341 | 0 | ps_op = (impeg2d_ctl_get_seq_info_op_t *)pv_api_op; |
342 | |
|
343 | 0 | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
344 | 0 | ps_codec = ps_dec_state_multi_core->ps_dec_state[0]; |
345 | 0 | UNUSED(ps_ip); |
346 | 0 | if(ps_codec->u2_header_done == 1) |
347 | 0 | { |
348 | 0 | ps_op->u1_aspect_ratio_information = ps_codec->u2_aspect_ratio_info; |
349 | 0 | ps_op->u1_frame_rate_code = ps_codec->u2_frame_rate_code; |
350 | 0 | ps_op->u1_frame_rate_extension_n = ps_codec->u2_frame_rate_extension_n; |
351 | 0 | ps_op->u1_frame_rate_extension_d = ps_codec->u2_frame_rate_extension_d; |
352 | 0 | if(ps_codec->u1_seq_disp_extn_present == 1) |
353 | 0 | { |
354 | 0 | ps_op->u1_video_format = ps_codec->u1_video_format; |
355 | 0 | ps_op->u1_colour_primaries = ps_codec->u1_colour_primaries; |
356 | 0 | ps_op->u1_transfer_characteristics = ps_codec->u1_transfer_characteristics; |
357 | 0 | ps_op->u1_matrix_coefficients = ps_codec->u1_matrix_coefficients; |
358 | 0 | ps_op->u2_display_horizontal_size = ps_codec->u2_display_horizontal_size; |
359 | 0 | ps_op->u2_display_vertical_size = ps_codec->u2_display_vertical_size; |
360 | 0 | } |
361 | 0 | else |
362 | 0 | { |
363 | 0 | ps_op->u1_video_format = 5; |
364 | 0 | ps_op->u1_colour_primaries = 2; |
365 | 0 | ps_op->u1_transfer_characteristics = 2; |
366 | 0 | ps_op->u1_matrix_coefficients = 2; |
367 | 0 | ps_op->u2_display_horizontal_size = ps_codec->u2_horizontal_size; |
368 | 0 | ps_op->u2_display_vertical_size = ps_codec->u2_vertical_size; |
369 | 0 | } |
370 | 0 | ps_op->u4_error_code = IV_SUCCESS; |
371 | 0 | return IV_SUCCESS; |
372 | 0 | } |
373 | 0 | else |
374 | 0 | { |
375 | 0 | ps_op->u4_error_code = IV_FAIL; |
376 | 0 | return IV_FAIL; |
377 | 0 | } |
378 | 0 | } |
379 | | |
380 | | /** |
381 | | ******************************************************************************* |
382 | | * |
383 | | * @brief |
384 | | * Sets Processor type |
385 | | * |
386 | | * @par Description: |
387 | | * Sets Processor type |
388 | | * |
389 | | * @param[in] ps_codec_obj |
390 | | * Pointer to codec object at API level |
391 | | * |
392 | | * @param[in] pv_api_ip |
393 | | * Pointer to input argument structure |
394 | | * |
395 | | * @param[out] pv_api_op |
396 | | * Pointer to output argument structure |
397 | | * |
398 | | * @returns Status |
399 | | * |
400 | | * @remarks |
401 | | * |
402 | | * |
403 | | ******************************************************************************* |
404 | | */ |
405 | | |
406 | | IV_API_CALL_STATUS_T impeg2d_set_processor(iv_obj_t *ps_codec_obj, |
407 | | void *pv_api_ip, |
408 | | void *pv_api_op) |
409 | 6.21k | { |
410 | 6.21k | impeg2d_ctl_set_processor_ip_t *ps_ip; |
411 | 6.21k | impeg2d_ctl_set_processor_op_t *ps_op; |
412 | 6.21k | dec_state_t *ps_codec; |
413 | 6.21k | dec_state_multi_core_t *ps_dec_state_multi_core; |
414 | | |
415 | 6.21k | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_codec_obj->pv_codec_handle); |
416 | 6.21k | ps_codec = ps_dec_state_multi_core->ps_dec_state[0]; |
417 | | |
418 | 6.21k | ps_ip = (impeg2d_ctl_set_processor_ip_t *)pv_api_ip; |
419 | 6.21k | ps_op = (impeg2d_ctl_set_processor_op_t *)pv_api_op; |
420 | | |
421 | 6.21k | ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch; |
422 | 6.21k | ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc; |
423 | | |
424 | 6.21k | impeg2d_init_function_ptr(ps_codec); |
425 | | |
426 | | |
427 | 6.21k | ps_op->u4_error_code = 0; |
428 | 6.21k | return IV_SUCCESS; |
429 | 6.21k | } |
430 | | /*****************************************************************************/ |
431 | | /* */ |
432 | | /* Function Name : impeg2d_fill_mem_rec */ |
433 | | /* */ |
434 | | /* Description : */ |
435 | | /* Inputs : */ |
436 | | /* Globals : */ |
437 | | /* Processing : */ |
438 | | /* Outputs : */ |
439 | | /* Returns : */ |
440 | | /* */ |
441 | | /* Issues : */ |
442 | | /* */ |
443 | | /* Revision History: */ |
444 | | /* */ |
445 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
446 | | /* 17 09 2007 Rajendra C Y Draft */ |
447 | | /* */ |
448 | | /*****************************************************************************/ |
449 | | void impeg2d_fill_mem_rec(impeg2d_fill_mem_rec_ip_t *ps_ip, |
450 | | impeg2d_fill_mem_rec_op_t *ps_op) |
451 | 12.4k | { |
452 | 12.4k | UWORD32 u4_i; |
453 | | |
454 | 12.4k | UWORD8 u1_no_rec = 0; |
455 | 12.4k | UWORD32 max_frm_width,max_frm_height,max_frm_size; |
456 | 12.4k | iv_mem_rec_t *ps_mem_rec = ps_ip->s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location; |
457 | 12.4k | WORD32 i4_num_threads; |
458 | 12.4k | WORD32 i4_share_disp_buf, i4_chroma_format; |
459 | 12.4k | WORD32 i4_chroma_size; |
460 | 12.4k | UWORD32 u4_deinterlace; |
461 | 12.4k | UNUSED(u4_deinterlace); |
462 | 12.4k | max_frm_width = ALIGN16(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd); |
463 | | /* In error clips with field prediction, the mv may incorrectly refer to |
464 | | * the last MB row, causing an out of bounds read access. Allocating 8 extra |
465 | | * rows to handle this. Adding another extra row to handle half_y prediction. |
466 | | */ |
467 | 12.4k | max_frm_height = ALIGN32(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht) + 9; |
468 | | |
469 | 12.4k | max_frm_size = (max_frm_width * max_frm_height * 3) >> 1;/* 420 P */ |
470 | | |
471 | 12.4k | i4_chroma_size = max_frm_width * max_frm_height / 4; |
472 | | |
473 | 12.4k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size > offsetof(impeg2d_fill_mem_rec_ip_t, u4_share_disp_buf)) |
474 | 12.4k | { |
475 | 12.4k | #ifndef LOGO_EN |
476 | 12.4k | i4_share_disp_buf = ps_ip->u4_share_disp_buf; |
477 | | #else |
478 | | i4_share_disp_buf = 0; |
479 | | #endif |
480 | 12.4k | } |
481 | 0 | else |
482 | 0 | { |
483 | 0 | i4_share_disp_buf = 0; |
484 | 0 | } |
485 | 12.4k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size > offsetof(impeg2d_fill_mem_rec_ip_t, e_output_format)) |
486 | 12.4k | { |
487 | 12.4k | i4_chroma_format = ps_ip->e_output_format; |
488 | 12.4k | } |
489 | 0 | else |
490 | 0 | { |
491 | 0 | i4_chroma_format = -1; |
492 | 0 | } |
493 | | |
494 | 12.4k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size > offsetof(impeg2d_fill_mem_rec_ip_t, u4_deinterlace)) |
495 | 12.4k | { |
496 | 12.4k | u4_deinterlace = ps_ip->u4_deinterlace; |
497 | 12.4k | } |
498 | 0 | else |
499 | 0 | { |
500 | 0 | u4_deinterlace = 0; |
501 | 0 | } |
502 | | |
503 | | |
504 | 12.4k | if( (i4_chroma_format != IV_YUV_420P) && |
505 | 12.4k | (i4_chroma_format != IV_YUV_420SP_UV) && |
506 | 12.4k | (i4_chroma_format != IV_YUV_420SP_VU)) |
507 | 0 | { |
508 | 0 | i4_share_disp_buf = 0; |
509 | 0 | } |
510 | | |
511 | | /* Disable deinterlacer in shared mode */ |
512 | 12.4k | if(i4_share_disp_buf) |
513 | 0 | { |
514 | 0 | u4_deinterlace = 0; |
515 | 0 | } |
516 | | |
517 | | /*************************************************************************/ |
518 | | /* Fill the memory requirement XDM Handle */ |
519 | | /*************************************************************************/ |
520 | | /* ! */ |
521 | 12.4k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
522 | 12.4k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
523 | 12.4k | ps_mem_rec->u4_mem_size = sizeof(iv_obj_t); |
524 | | |
525 | 12.4k | ps_mem_rec++; |
526 | 12.4k | u1_no_rec++; |
527 | | |
528 | 12.4k | { |
529 | | /*************************************************************************/ |
530 | | /* Fill the memory requirement for threads context */ |
531 | | /*************************************************************************/ |
532 | | /* ! */ |
533 | 12.4k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
534 | 12.4k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
535 | 12.4k | ps_mem_rec->u4_mem_size = sizeof(dec_state_multi_core_t); |
536 | | |
537 | 12.4k | ps_mem_rec++; |
538 | 12.4k | u1_no_rec++; |
539 | 12.4k | } |
540 | | |
541 | 62.1k | for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++) |
542 | 49.7k | { |
543 | | /*************************************************************************/ |
544 | | /* Fill the memory requirement for MPEG2 Decoder Context */ |
545 | | /*************************************************************************/ |
546 | | /* ! */ |
547 | 49.7k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
548 | 49.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
549 | 49.7k | ps_mem_rec->u4_mem_size = sizeof(dec_state_t); |
550 | | |
551 | 49.7k | ps_mem_rec++; |
552 | 49.7k | u1_no_rec++; |
553 | | |
554 | | /* To store thread handle */ |
555 | 49.7k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
556 | 49.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
557 | 49.7k | ps_mem_rec->u4_mem_size = ithread_get_handle_size(); |
558 | | |
559 | 49.7k | ps_mem_rec++; |
560 | 49.7k | u1_no_rec++; |
561 | | |
562 | | /* To store start/done mutex */ |
563 | 49.7k | ps_mem_rec->u4_mem_alignment = 8 /* 8 byte alignment*/; |
564 | 49.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
565 | | /* Request memory to hold mutex (start/done) */ |
566 | 49.7k | WORD32 size = 2 * ithread_get_mutex_lock_size(); |
567 | 49.7k | ps_mem_rec->u4_mem_size = size; |
568 | | |
569 | 49.7k | ps_mem_rec++; |
570 | 49.7k | u1_no_rec++; |
571 | | |
572 | | /* To store start/done condition variables */ |
573 | 49.7k | ps_mem_rec->u4_mem_alignment = 8 /* 8 byte alignment*/; |
574 | 49.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
575 | | /* Request memory to hold condition variables */ |
576 | 49.7k | size = 2 * ithread_get_cond_struct_size(); |
577 | 49.7k | ps_mem_rec->u4_mem_size = size; |
578 | | |
579 | 49.7k | ps_mem_rec++; |
580 | 49.7k | u1_no_rec++; |
581 | | |
582 | | /*************************************************************************/ |
583 | | /* Fill the memory requirement for Motion Compensation Buffers */ |
584 | | /*************************************************************************/ |
585 | 49.7k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
586 | 49.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_SCRATCH_MEM; |
587 | | |
588 | | /* for mc_fw_buf.pu1_y */ |
589 | 49.7k | ps_mem_rec->u4_mem_size = MB_LUMA_MEM_SIZE; |
590 | | |
591 | | /* for mc_fw_buf.pu1_u */ |
592 | 49.7k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
593 | | |
594 | | /* for mc_fw_buf.pu1_v */ |
595 | 49.7k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
596 | | |
597 | | /* for mc_bk_buf.pu1_y */ |
598 | 49.7k | ps_mem_rec->u4_mem_size += MB_LUMA_MEM_SIZE; |
599 | | |
600 | | /* for mc_bk_buf.pu1_u */ |
601 | 49.7k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
602 | | |
603 | | /* for mc_bk_buf.pu1_v */ |
604 | 49.7k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
605 | | |
606 | | /* for mc_buf.pu1_y */ |
607 | 49.7k | ps_mem_rec->u4_mem_size += MB_LUMA_MEM_SIZE; |
608 | | |
609 | | /* for mc_buf.pu1_u */ |
610 | 49.7k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
611 | | |
612 | | /* for mc_buf.pu1_v */ |
613 | 49.7k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
614 | | |
615 | 49.7k | ps_mem_rec++; |
616 | 49.7k | u1_no_rec++; |
617 | | |
618 | | |
619 | | /*************************************************************************/ |
620 | | /* Fill the memory requirement Stack Context */ |
621 | | /*************************************************************************/ |
622 | | /* ! */ |
623 | 49.7k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
624 | 49.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
625 | 49.7k | ps_mem_rec->u4_mem_size = 392; |
626 | | |
627 | 49.7k | ps_mem_rec++; |
628 | 49.7k | u1_no_rec++; |
629 | 49.7k | } |
630 | | |
631 | | |
632 | | |
633 | 12.4k | { |
634 | | /*************************************************************************/ |
635 | | /* Fill the memory requirement for Picture Buffer Manager */ |
636 | | /*************************************************************************/ |
637 | | /* ! */ |
638 | 12.4k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
639 | 12.4k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
640 | 12.4k | ps_mem_rec->u4_mem_size = sizeof(buf_mgr_t) + sizeof(pic_buf_t) * BUF_MGR_MAX_CNT; |
641 | | |
642 | 12.4k | ps_mem_rec++; |
643 | 12.4k | u1_no_rec++; |
644 | 12.4k | } |
645 | | /*************************************************************************/ |
646 | | /* Internal Frame Buffers */ |
647 | | /*************************************************************************/ |
648 | | /* ! */ |
649 | | |
650 | 12.4k | { |
651 | 74.5k | for(u4_i = 0; u4_i < NUM_INT_FRAME_BUFFERS; u4_i++) |
652 | 62.1k | { |
653 | | /* ! */ |
654 | 62.1k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
655 | 62.1k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
656 | 62.1k | if(0 == i4_share_disp_buf) |
657 | 62.1k | ps_mem_rec->u4_mem_size = max_frm_size; |
658 | 0 | else if(IV_YUV_420P != i4_chroma_format) |
659 | 0 | { |
660 | | /* If color format is not 420P and it is shared, then allocate for chroma */ |
661 | 0 | ps_mem_rec->u4_mem_size = i4_chroma_size * 2; |
662 | 0 | } |
663 | 0 | else |
664 | 0 | ps_mem_rec->u4_mem_size = 64; |
665 | 62.1k | ps_mem_rec++; |
666 | 62.1k | u1_no_rec++; |
667 | 62.1k | } |
668 | 12.4k | } |
669 | | |
670 | 12.4k | ps_mem_rec->u4_mem_alignment = 128; |
671 | 12.4k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
672 | 12.4k | ps_mem_rec->u4_mem_size = MAX_BITSTREAM_BUFFER_SIZE + MIN_BUFFER_BYTES_AT_EOS; |
673 | 12.4k | ps_mem_rec++; |
674 | 12.4k | u1_no_rec++; |
675 | | |
676 | 12.4k | { |
677 | 12.4k | WORD32 i4_job_queue_size; |
678 | 12.4k | WORD32 i4_num_jobs; |
679 | | |
680 | | /* One job per row of MBs */ |
681 | 12.4k | i4_num_jobs = max_frm_height >> 4; |
682 | | |
683 | | /* One format convert/frame copy job per row of MBs for non-shared mode*/ |
684 | 12.4k | i4_num_jobs += max_frm_height >> 4; |
685 | | |
686 | | |
687 | 12.4k | i4_job_queue_size = impeg2_jobq_ctxt_size(); |
688 | 12.4k | i4_job_queue_size += i4_num_jobs * sizeof(job_t); |
689 | 12.4k | ps_mem_rec->u4_mem_size = i4_job_queue_size; |
690 | 12.4k | ps_mem_rec->u4_mem_alignment = 128; |
691 | 12.4k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
692 | | |
693 | 12.4k | ps_mem_rec++; |
694 | 12.4k | u1_no_rec++; |
695 | | |
696 | 12.4k | } |
697 | | |
698 | 12.4k | ps_mem_rec->u4_mem_alignment = 128; |
699 | 12.4k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
700 | 12.4k | ps_mem_rec->u4_mem_size = impeg2d_deint_ctxt_size(); |
701 | 12.4k | ps_mem_rec++; |
702 | 12.4k | u1_no_rec++; |
703 | | |
704 | 12.4k | ps_mem_rec->u4_mem_alignment = 128; |
705 | 12.4k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
706 | | |
707 | 12.4k | if(IV_YUV_420P != i4_chroma_format) |
708 | 7.47k | ps_mem_rec->u4_mem_size = max_frm_size; |
709 | 4.95k | else |
710 | 4.95k | ps_mem_rec->u4_mem_size = 64; |
711 | | |
712 | 12.4k | ps_mem_rec++; |
713 | 12.4k | u1_no_rec++; |
714 | | |
715 | 12.4k | ps_mem_rec->u4_mem_alignment = 128; |
716 | 12.4k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
717 | 12.4k | ps_mem_rec->u4_mem_size = sizeof(iv_mem_rec_t) * (NUM_MEM_RECORDS); |
718 | 12.4k | ps_mem_rec++; |
719 | 12.4k | u1_no_rec++; |
720 | | |
721 | 12.4k | ps_op->s_ivd_fill_mem_rec_op_t.u4_num_mem_rec_filled = u1_no_rec; |
722 | 12.4k | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code = 0; |
723 | 12.4k | } |
724 | | |
725 | | |
726 | | /*****************************************************************************/ |
727 | | /* */ |
728 | | /* Function Name : impeg2d_api_get_version */ |
729 | | /* */ |
730 | | /* Description : */ |
731 | | /* */ |
732 | | /* Inputs : */ |
733 | | /* Globals : <Does it use any global variables?> */ |
734 | | /* Outputs : */ |
735 | | /* Returns : void */ |
736 | | /* */ |
737 | | /* Issues : none */ |
738 | | /* */ |
739 | | /* Revision History: */ |
740 | | /* */ |
741 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
742 | | /* 22 10 2008 100356 Draft */ |
743 | | /* */ |
744 | | /*****************************************************************************/ |
745 | | IV_API_CALL_STATUS_T impeg2d_api_get_version(iv_obj_t *ps_dechdl, |
746 | | void *pv_api_ip, |
747 | | void *pv_api_op) |
748 | 0 | { |
749 | 0 | char au1_version_string[512]; |
750 | |
|
751 | 0 | impeg2d_ctl_getversioninfo_ip_t *ps_ip; |
752 | 0 | impeg2d_ctl_getversioninfo_op_t *ps_op; |
753 | |
|
754 | 0 | UNUSED(ps_dechdl); |
755 | |
|
756 | 0 | ps_ip = (impeg2d_ctl_getversioninfo_ip_t *)pv_api_ip; |
757 | 0 | ps_op = (impeg2d_ctl_getversioninfo_op_t *)pv_api_op; |
758 | |
|
759 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_SUCCESS; |
760 | |
|
761 | 0 | VERSION(au1_version_string, CODEC_NAME, CODEC_RELEASE_TYPE, CODEC_RELEASE_VER, |
762 | 0 | CODEC_VENDOR); |
763 | |
|
764 | 0 | if((WORD32)ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_version_buffer_size <= 0) |
765 | 0 | { |
766 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_FAIL; |
767 | 0 | return (IV_FAIL); |
768 | 0 | } |
769 | | |
770 | 0 | if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_version_buffer_size |
771 | 0 | >= (strlen(au1_version_string) + 1)) |
772 | 0 | { |
773 | 0 | memcpy(ps_ip->s_ivd_ctl_getversioninfo_ip_t.pv_version_buffer, |
774 | 0 | au1_version_string, (strlen(au1_version_string) + 1)); |
775 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_SUCCESS; |
776 | 0 | } |
777 | 0 | else |
778 | 0 | { |
779 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_FAIL; |
780 | 0 | } |
781 | |
|
782 | 0 | return (IV_SUCCESS); |
783 | 0 | } |
784 | | |
785 | | WORD32 impeg2d_join_threads(dec_state_multi_core_t *ps_dec_state_multi_core) |
786 | 14.4k | { |
787 | 14.4k | dec_state_t *ps_dec_thd, *ps_dec_state; |
788 | | |
789 | 14.4k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
790 | | |
791 | 14.4k | if(ps_dec_state->i4_threads_active) |
792 | 14.4k | { |
793 | 14.4k | int i; |
794 | 72.2k | for(i = 0; i < MAX_THREADS; i++) |
795 | 57.8k | { |
796 | 57.8k | WORD32 ret; |
797 | 57.8k | ps_dec_thd = ps_dec_state_multi_core->ps_dec_state[i]; |
798 | 57.8k | if(ps_dec_state_multi_core->au4_thread_launched[i]) |
799 | 11.5k | { |
800 | 11.5k | ret = ithread_mutex_lock(ps_dec_thd->pv_proc_start_mutex); |
801 | 11.5k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) return(IV_FAIL); |
802 | | |
803 | | // set process start for the threads waiting on the start condition |
804 | | // in the decode routine so as to break them |
805 | 11.5k | ps_dec_thd->ai4_process_start = 1; |
806 | 11.5k | ps_dec_state_multi_core->i4_break_threads = 1; |
807 | | |
808 | 11.5k | ret = ithread_cond_signal(ps_dec_thd->pv_proc_start_condition); |
809 | 11.5k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) return(IV_FAIL); |
810 | | |
811 | 11.5k | ret = ithread_mutex_unlock(ps_dec_thd->pv_proc_start_mutex); |
812 | 11.5k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) return(IV_FAIL); |
813 | | |
814 | 11.5k | ithread_join(ps_dec_thd->pv_codec_thread_handle, NULL); |
815 | 11.5k | ps_dec_state_multi_core->au4_thread_launched[i] = 0; |
816 | 11.5k | ps_dec_state_multi_core->i4_break_threads = 0; |
817 | 11.5k | } |
818 | 57.8k | } |
819 | 14.4k | } |
820 | | |
821 | 14.4k | return IV_SUCCESS; |
822 | 14.4k | } |
823 | | |
824 | | /*****************************************************************************/ |
825 | | /* */ |
826 | | /* Function Name : impeg2d_api_get_buf_info */ |
827 | | /* */ |
828 | | /* Description : */ |
829 | | /* */ |
830 | | /* Inputs : */ |
831 | | /* Globals : <Does it use any global variables?> */ |
832 | | /* Outputs : */ |
833 | | /* Returns : void */ |
834 | | /* */ |
835 | | /* Issues : none */ |
836 | | /* */ |
837 | | /* Revision History: */ |
838 | | /* */ |
839 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
840 | | /* 22 10 2008 100356 Draft */ |
841 | | /* */ |
842 | | /*****************************************************************************/ |
843 | | IV_API_CALL_STATUS_T impeg2d_api_get_buf_info(iv_obj_t *ps_dechdl, |
844 | | void *pv_api_ip, |
845 | | void *pv_api_op) |
846 | 0 | { |
847 | 0 | dec_state_t *ps_dec_state; |
848 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
849 | 0 | impeg2d_ctl_getbufinfo_ip_t *ps_ctl_bufinfo_ip = |
850 | 0 | (impeg2d_ctl_getbufinfo_ip_t *)pv_api_ip; |
851 | 0 | impeg2d_ctl_getbufinfo_op_t *ps_ctl_bufinfo_op = |
852 | 0 | (impeg2d_ctl_getbufinfo_op_t *)pv_api_op; |
853 | 0 | UWORD32 u4_i, u4_stride, u4_height; |
854 | 0 | UNUSED(ps_ctl_bufinfo_ip); |
855 | |
|
856 | 0 | ps_dec_state_multi_core = |
857 | 0 | (dec_state_multi_core_t *)(ps_dechdl->pv_codec_handle); |
858 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
859 | |
|
860 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_in_bufs = 1; |
861 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_out_bufs = 1; |
862 | |
|
863 | 0 | for(u4_i = 0; u4_i < IVD_VIDDEC_MAX_IO_BUFFERS; u4_i++) |
864 | 0 | { |
865 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_in_buf_size[u4_i] = |
866 | 0 | 0; |
867 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_out_buf_size[u4_i] = |
868 | 0 | 0; |
869 | 0 | } |
870 | |
|
871 | 0 | for(u4_i = 0; |
872 | 0 | u4_i < ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_in_bufs; |
873 | 0 | u4_i++) |
874 | 0 | { |
875 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_in_buf_size[u4_i] = |
876 | 0 | MAX_BITSTREAM_BUFFER_SIZE; |
877 | 0 | } |
878 | |
|
879 | 0 | if (0 == ps_dec_state->u4_frm_buf_stride) |
880 | 0 | { |
881 | 0 | if (1 == ps_dec_state->u2_header_done) |
882 | 0 | { |
883 | 0 | u4_stride = ps_dec_state->u2_horizontal_size; |
884 | 0 | } |
885 | 0 | else |
886 | 0 | { |
887 | 0 | u4_stride = ps_dec_state->u2_create_max_width; |
888 | 0 | } |
889 | 0 | } |
890 | 0 | else |
891 | 0 | { |
892 | 0 | u4_stride = ps_dec_state->u4_frm_buf_stride; |
893 | 0 | } |
894 | 0 | u4_stride = ALIGN16(u4_stride); |
895 | 0 | u4_height = ALIGN32(ps_dec_state->u2_frame_height) + 9; |
896 | |
|
897 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_out_bufs = |
898 | 0 | impeg2d_get_outbuf_size( |
899 | 0 | u4_stride, |
900 | 0 | u4_height, |
901 | 0 | ps_dec_state->i4_chromaFormat, |
902 | 0 | &ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_out_buf_size[0]); |
903 | |
|
904 | 0 | if (0 == ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_out_bufs) |
905 | 0 | { |
906 | | //Invalid chroma format; Error code may be updated, verify in testing if needed |
907 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code = |
908 | 0 | IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED; |
909 | 0 | return IV_FAIL; |
910 | 0 | } |
911 | | |
912 | | /* Adding initialization for 2 uninitialized values */ |
913 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_num_disp_bufs = 1; |
914 | 0 | if(ps_dec_state->u4_share_disp_buf) |
915 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_num_disp_bufs = |
916 | 0 | NUM_INT_FRAME_BUFFERS; |
917 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_size = MAX_FRM_SIZE; |
918 | |
|
919 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code = IV_SUCCESS; |
920 | |
|
921 | 0 | return (IV_SUCCESS); |
922 | 0 | } |
923 | | |
924 | | /*****************************************************************************/ |
925 | | /* */ |
926 | | /* Function Name : impeg2d_api_set_flush_mode */ |
927 | | /* */ |
928 | | /* Description : */ |
929 | | /* */ |
930 | | /* Inputs : */ |
931 | | /* Globals : <Does it use any global variables?> */ |
932 | | /* Outputs : */ |
933 | | /* Returns : void */ |
934 | | /* */ |
935 | | /* Issues : none */ |
936 | | /* */ |
937 | | /* Revision History: */ |
938 | | /* */ |
939 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
940 | | /* 08 06 2009 100356 RAVI */ |
941 | | /* */ |
942 | | /*****************************************************************************/ |
943 | | IV_API_CALL_STATUS_T impeg2d_api_set_flush_mode(iv_obj_t *ps_dechdl, |
944 | | void *pv_api_ip, |
945 | | void *pv_api_op) |
946 | 0 | { |
947 | 0 | dec_state_t *ps_dec_state; |
948 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
949 | 0 | impeg2d_ctl_flush_op_t *ps_ctl_dec_op = |
950 | 0 | (impeg2d_ctl_flush_op_t*)pv_api_op; |
951 | |
|
952 | 0 | UNUSED(pv_api_ip); |
953 | |
|
954 | 0 | ps_dec_state_multi_core = |
955 | 0 | (dec_state_multi_core_t *)(ps_dechdl->pv_codec_handle); |
956 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
957 | 0 | impeg2d_join_threads(ps_dec_state_multi_core); |
958 | |
|
959 | 0 | ps_dec_state->u1_flushfrm = 1; |
960 | |
|
961 | 0 | ps_ctl_dec_op->s_ivd_ctl_flush_op_t.u4_size = |
962 | 0 | sizeof(impeg2d_ctl_flush_op_t); |
963 | 0 | ps_ctl_dec_op->s_ivd_ctl_flush_op_t.u4_error_code = IV_SUCCESS; |
964 | |
|
965 | 0 | return (IV_SUCCESS); |
966 | 0 | } |
967 | | |
968 | | /*****************************************************************************/ |
969 | | /* */ |
970 | | /* Function Name : impeg2d_api_set_default */ |
971 | | /* */ |
972 | | /* Description : */ |
973 | | /* */ |
974 | | /* Inputs : */ |
975 | | /* Globals : <Does it use any global variables?> */ |
976 | | /* Outputs : */ |
977 | | /* Returns : void */ |
978 | | /* */ |
979 | | /* Issues : none */ |
980 | | /* */ |
981 | | /* Revision History: */ |
982 | | /* */ |
983 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
984 | | /* 08 06 2009 100356 RAVI */ |
985 | | /* */ |
986 | | /*****************************************************************************/ |
987 | | IV_API_CALL_STATUS_T impeg2d_api_set_default(iv_obj_t *ps_dechdl, |
988 | | void *pv_api_ip, |
989 | | void *pv_api_op) |
990 | 0 | { |
991 | 0 | dec_state_t *ps_dec_state; |
992 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
993 | 0 | impeg2d_ctl_set_config_op_t *ps_ctl_dec_op = |
994 | 0 | (impeg2d_ctl_set_config_op_t *)pv_api_op; |
995 | |
|
996 | 0 | UNUSED(pv_api_ip); |
997 | |
|
998 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_SUCCESS; |
999 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_size = |
1000 | 0 | sizeof(impeg2d_ctl_set_config_op_t); |
1001 | |
|
1002 | 0 | ps_dec_state_multi_core = |
1003 | 0 | (dec_state_multi_core_t *)(ps_dechdl->pv_codec_handle); |
1004 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1005 | |
|
1006 | 0 | ps_dec_state->u1_flushfrm = 0; |
1007 | 0 | ps_dec_state->u2_decode_header = 1; |
1008 | |
|
1009 | 0 | if (1 == ps_dec_state->u2_header_done) |
1010 | 0 | { |
1011 | 0 | ps_dec_state->u4_frm_buf_stride = ps_dec_state->u2_frame_width; |
1012 | 0 | } |
1013 | |
|
1014 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_SUCCESS; |
1015 | |
|
1016 | 0 | return (IV_SUCCESS); |
1017 | |
|
1018 | 0 | } |
1019 | | |
1020 | | |
1021 | | /*****************************************************************************/ |
1022 | | /* */ |
1023 | | /* Function Name : impeg2d_api_reset */ |
1024 | | /* */ |
1025 | | /* Description : */ |
1026 | | /* */ |
1027 | | /* Inputs : */ |
1028 | | /* Globals : <Does it use any global variables?> */ |
1029 | | /* Outputs : */ |
1030 | | /* Returns : void */ |
1031 | | /* */ |
1032 | | /* Issues : none */ |
1033 | | /* */ |
1034 | | /* Revision History: */ |
1035 | | /* */ |
1036 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1037 | | /* 08 06 2009 100356 RAVI */ |
1038 | | /* */ |
1039 | | /*****************************************************************************/ |
1040 | | IV_API_CALL_STATUS_T impeg2d_api_reset(iv_obj_t *ps_dechdl, |
1041 | | void *pv_api_ip, |
1042 | | void *pv_api_op) |
1043 | 8.24k | { |
1044 | 8.24k | dec_state_t *ps_dec_state; |
1045 | 8.24k | dec_state_multi_core_t *ps_dec_state_multi_core; |
1046 | 8.24k | UNUSED(pv_api_ip); |
1047 | 8.24k | impeg2d_ctl_reset_op_t *s_ctl_reset_op = (impeg2d_ctl_reset_op_t *)pv_api_op; |
1048 | | |
1049 | 8.24k | WORD32 i4_num_threads; |
1050 | | |
1051 | 8.24k | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
1052 | 8.24k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1053 | | |
1054 | 8.24k | if(ps_dec_state_multi_core != NULL) |
1055 | 8.24k | { |
1056 | 8.24k | impeg2d_join_threads(ps_dec_state_multi_core); |
1057 | 8.24k | impeg2_buf_mgr_reset(ps_dec_state->pv_pic_buf_mg); |
1058 | | /* Display buffer manager init behaves like a reset |
1059 | | * as it doesn't need to preserve picture buffer addresses |
1060 | | * like buffer manager */ |
1061 | 8.24k | impeg2_disp_mgr_init(&ps_dec_state->s_disp_mgr); |
1062 | | |
1063 | 41.2k | for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++) |
1064 | 32.9k | { |
1065 | 32.9k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[i4_num_threads]; |
1066 | | |
1067 | | |
1068 | | /* --------------------------------------------------------------------- */ |
1069 | | /* Initializations */ |
1070 | | |
1071 | 32.9k | ps_dec_state->u2_header_done = 0; /* Header decoding not done */ |
1072 | 32.9k | ps_dec_state->u4_frm_buf_stride = 0; |
1073 | 32.9k | ps_dec_state->i4_pic_count = 0; |
1074 | 32.9k | ps_dec_state->u2_is_mpeg2 = 0; |
1075 | 32.9k | ps_dec_state->aps_ref_pics[0] = NULL; |
1076 | 32.9k | ps_dec_state->aps_ref_pics[1] = NULL; |
1077 | 32.9k | ps_dec_state->ps_deint_pic = NULL; |
1078 | 32.9k | } |
1079 | 8.24k | } |
1080 | 0 | else |
1081 | 0 | { |
1082 | 0 | s_ctl_reset_op->s_ivd_ctl_reset_op_t.u4_error_code = |
1083 | 0 | IMPEG2D_INIT_NOT_DONE; |
1084 | 0 | } |
1085 | | |
1086 | 8.24k | return(IV_SUCCESS); |
1087 | 8.24k | } |
1088 | | |
1089 | | /*****************************************************************************/ |
1090 | | /* */ |
1091 | | /* Function Name : impeg2d_api_set_params */ |
1092 | | /* */ |
1093 | | /* Description : */ |
1094 | | /* */ |
1095 | | /* Inputs : */ |
1096 | | /* Globals : <Does it use any global variables?> */ |
1097 | | /* Outputs : */ |
1098 | | /* Returns : void */ |
1099 | | /* */ |
1100 | | /* Issues : none */ |
1101 | | /* */ |
1102 | | /* Revision History: */ |
1103 | | /* */ |
1104 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1105 | | /* 08 06 2009 100356 RAVI */ |
1106 | | /* */ |
1107 | | /*****************************************************************************/ |
1108 | | IV_API_CALL_STATUS_T impeg2d_api_set_params(iv_obj_t *ps_dechdl,void *pv_api_ip,void *pv_api_op) |
1109 | 12.4k | { |
1110 | 12.4k | dec_state_t *ps_dec_state; |
1111 | 12.4k | dec_state_multi_core_t *ps_dec_state_multi_core; |
1112 | 12.4k | impeg2d_ctl_set_config_ip_t *ps_ctl_dec_ip = (impeg2d_ctl_set_config_ip_t *)pv_api_ip; |
1113 | 12.4k | impeg2d_ctl_set_config_op_t *ps_ctl_dec_op = (impeg2d_ctl_set_config_op_t *)pv_api_op; |
1114 | | |
1115 | 12.4k | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
1116 | 12.4k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1117 | | |
1118 | 12.4k | if((ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode != IVD_DECODE_HEADER) && (ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode != IVD_DECODE_FRAME)) |
1119 | 0 | { |
1120 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL; |
1121 | 0 | return(IV_FAIL); |
1122 | 0 | } |
1123 | | |
1124 | 12.4k | if((ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_frm_out_mode != IVD_DISPLAY_FRAME_OUT) && (ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_frm_out_mode != IVD_DECODE_FRAME_OUT)) |
1125 | 0 | { |
1126 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL; |
1127 | 0 | return(IV_FAIL); |
1128 | 0 | } |
1129 | | |
1130 | 12.4k | if( (WORD32) ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_frm_skip_mode < IVD_SKIP_NONE) |
1131 | 0 | { |
1132 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL; |
1133 | 0 | return(IV_FAIL); |
1134 | 0 | } |
1135 | | |
1136 | 12.4k | if(ps_dec_state->u2_header_done == 1) |
1137 | 5.67k | { |
1138 | 5.67k | if(((WORD32)ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd < 0) || |
1139 | 5.67k | ((ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd != 0) && (ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd < ps_dec_state->u2_frame_width))) |
1140 | 0 | { |
1141 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL; |
1142 | 0 | return(IV_FAIL); |
1143 | 0 | } |
1144 | | |
1145 | 5.67k | } |
1146 | | |
1147 | | |
1148 | 12.4k | ps_dec_state->u2_decode_header = (UWORD8)ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode; |
1149 | | |
1150 | 12.4k | if(ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd != 0) |
1151 | 0 | { |
1152 | 0 | ps_dec_state->u4_frm_buf_stride = ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd; |
1153 | 0 | } |
1154 | 12.4k | else |
1155 | 12.4k | { |
1156 | | |
1157 | 12.4k | if(ps_dec_state->u2_header_done == 1) |
1158 | 5.67k | { |
1159 | 5.67k | ps_dec_state->u4_frm_buf_stride = ps_dec_state->u2_frame_width; |
1160 | 5.67k | } |
1161 | 6.75k | else |
1162 | 6.75k | { |
1163 | 6.75k | ps_dec_state->u4_frm_buf_stride = 0; |
1164 | 6.75k | } |
1165 | 12.4k | } |
1166 | | |
1167 | | |
1168 | 12.4k | if(ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode == IVD_DECODE_FRAME) |
1169 | 6.21k | { |
1170 | 6.21k | ps_dec_state->u1_flushfrm = 0; |
1171 | 6.21k | } |
1172 | | |
1173 | | |
1174 | 12.4k | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_SUCCESS; |
1175 | 12.4k | return(IV_SUCCESS); |
1176 | | |
1177 | 12.4k | } |
1178 | | |
1179 | | /*****************************************************************************/ |
1180 | | /* */ |
1181 | | /* Function Name : impeg2d_api_get_status */ |
1182 | | /* */ |
1183 | | /* Description : */ |
1184 | | /* */ |
1185 | | /* Inputs : */ |
1186 | | /* Globals : <Does it use any global variables?> */ |
1187 | | /* Outputs : */ |
1188 | | /* Returns : void */ |
1189 | | /* */ |
1190 | | /* Issues : none */ |
1191 | | /* */ |
1192 | | /* Revision History: */ |
1193 | | /* */ |
1194 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1195 | | /* 08 06 2009 100356 RAVI */ |
1196 | | /* */ |
1197 | | /*****************************************************************************/ |
1198 | | IV_API_CALL_STATUS_T impeg2d_api_get_status(iv_obj_t *ps_dechdl, |
1199 | | void *pv_api_ip, |
1200 | | void *pv_api_op) |
1201 | 0 | { |
1202 | 0 | dec_state_t *ps_dec_state; |
1203 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
1204 | 0 | UWORD32 u4_i,u4_stride,u4_height; |
1205 | 0 | impeg2d_ctl_getstatus_ip_t *ps_ctl_dec_ip = (impeg2d_ctl_getstatus_ip_t *)pv_api_ip; |
1206 | 0 | impeg2d_ctl_getstatus_op_t *ps_ctl_dec_op = (impeg2d_ctl_getstatus_op_t *)pv_api_op; |
1207 | 0 | UNUSED(ps_ctl_dec_ip); |
1208 | |
|
1209 | 0 | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
1210 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1211 | |
|
1212 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_size = sizeof(impeg2d_ctl_getstatus_op_t); |
1213 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_num_disp_bufs = 1; |
1214 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_pic_ht = ps_dec_state->u2_frame_height; |
1215 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_pic_wd = ps_dec_state->u2_frame_width; |
1216 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_frame_rate = ps_dec_state->u2_framePeriod; |
1217 | | |
1218 | |
|
1219 | 0 | if(ps_dec_state->u2_progressive_sequence == 1) |
1220 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.e_content_type = IV_PROGRESSIVE ; |
1221 | 0 | else |
1222 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.e_content_type = IV_INTERLACED; |
1223 | | |
1224 | |
|
1225 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.e_output_chroma_format = (IV_COLOR_FORMAT_T)ps_dec_state->i4_chromaFormat; |
1226 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_in_bufs = 1; |
1227 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs = 1; |
1228 | | |
1229 | |
|
1230 | 0 | if(ps_dec_state->i4_chromaFormat == IV_YUV_420P) |
1231 | 0 | { |
1232 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs = MIN_OUT_BUFS_420; |
1233 | 0 | } |
1234 | 0 | else if(ps_dec_state->i4_chromaFormat == IV_YUV_422ILE) |
1235 | 0 | { |
1236 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE; |
1237 | 0 | } |
1238 | 0 | else if(ps_dec_state->i4_chromaFormat == IV_RGB_565) |
1239 | 0 | { |
1240 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565; |
1241 | 0 | } |
1242 | 0 | else |
1243 | 0 | { |
1244 | | //Invalid chroma format; Error code may be updated, verify in testing if needed |
1245 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_error_code = IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED; |
1246 | 0 | return IV_FAIL; |
1247 | 0 | } |
1248 | | |
1249 | 0 | memset(&ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_in_buf_size[0],0,(sizeof(UWORD32)*IVD_VIDDEC_MAX_IO_BUFFERS)); |
1250 | 0 | memset(&ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0],0,(sizeof(UWORD32)*IVD_VIDDEC_MAX_IO_BUFFERS)); |
1251 | |
|
1252 | 0 | for(u4_i = 0; u4_i < ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_in_bufs; u4_i++) |
1253 | 0 | { |
1254 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_in_buf_size[u4_i] = MAX_BITSTREAM_BUFFER_SIZE; |
1255 | 0 | } |
1256 | |
|
1257 | 0 | u4_stride = ps_dec_state->u4_frm_buf_stride; |
1258 | 0 | u4_height = ((ps_dec_state->u2_frame_height + 15) >> 4) << 4; |
1259 | |
|
1260 | 0 | if(ps_dec_state->i4_chromaFormat == IV_YUV_420P) |
1261 | 0 | { |
1262 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0] = (u4_stride * u4_height); |
1263 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[1] = (u4_stride * u4_height)>>2 ; |
1264 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[2] = (u4_stride * u4_height)>>2; |
1265 | 0 | } |
1266 | 0 | else if((ps_dec_state->i4_chromaFormat == IV_YUV_420SP_UV) || (ps_dec_state->i4_chromaFormat == IV_YUV_420SP_VU)) |
1267 | 0 | { |
1268 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0] = (u4_stride * u4_height); |
1269 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[1] = (u4_stride * u4_height)>>1 ; |
1270 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[2] = 0; |
1271 | 0 | } |
1272 | 0 | else if(ps_dec_state->i4_chromaFormat == IV_YUV_422ILE) |
1273 | 0 | { |
1274 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0] = (u4_stride * u4_height)*2; |
1275 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[1] = ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[2] = 0; |
1276 | 0 | } |
1277 | |
|
1278 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_error_code = IV_SUCCESS; |
1279 | |
|
1280 | 0 | return(IV_SUCCESS); |
1281 | |
|
1282 | 0 | } |
1283 | | |
1284 | | /** |
1285 | | ******************************************************************************* |
1286 | | * |
1287 | | * @brief |
1288 | | * Gets frame dimensions/offsets |
1289 | | * |
1290 | | * @par Description: |
1291 | | * Gets frame buffer chararacteristics such a x & y offsets display and |
1292 | | * buffer dimensions |
1293 | | * |
1294 | | * @param[in] ps_codec_obj |
1295 | | * Pointer to codec object at API level |
1296 | | * |
1297 | | * @param[in] pv_api_ip |
1298 | | * Pointer to input argument structure |
1299 | | * |
1300 | | * @param[out] pv_api_op |
1301 | | * Pointer to output argument structure |
1302 | | * |
1303 | | * @returns Status |
1304 | | * |
1305 | | * @remarks |
1306 | | * |
1307 | | * |
1308 | | ******************************************************************************* |
1309 | | */ |
1310 | | IV_API_CALL_STATUS_T impeg2d_get_frame_dimensions(iv_obj_t *ps_codec_obj, |
1311 | | void *pv_api_ip, |
1312 | | void *pv_api_op) |
1313 | 0 | { |
1314 | 0 | impeg2d_ctl_get_frame_dimensions_ip_t *ps_ip; |
1315 | 0 | impeg2d_ctl_get_frame_dimensions_op_t *ps_op; |
1316 | 0 | WORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset; |
1317 | 0 | dec_state_t *ps_codec; |
1318 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
1319 | |
|
1320 | 0 | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_codec_obj->pv_codec_handle); |
1321 | 0 | ps_codec = ps_dec_state_multi_core->ps_dec_state[0]; |
1322 | | |
1323 | |
|
1324 | 0 | ps_ip = (impeg2d_ctl_get_frame_dimensions_ip_t *)pv_api_ip; |
1325 | 0 | ps_op = (impeg2d_ctl_get_frame_dimensions_op_t *)pv_api_op; |
1326 | 0 | UNUSED(ps_ip); |
1327 | 0 | if(ps_codec->u2_header_done) |
1328 | 0 | { |
1329 | 0 | disp_wd = ps_codec->u2_horizontal_size; |
1330 | 0 | disp_ht = ps_codec->u2_vertical_size; |
1331 | |
|
1332 | 0 | if(0 == ps_codec->u4_share_disp_buf) |
1333 | 0 | { |
1334 | 0 | buffer_wd = disp_wd; |
1335 | 0 | buffer_ht = disp_ht; |
1336 | 0 | } |
1337 | 0 | else |
1338 | 0 | { |
1339 | 0 | buffer_wd = ps_codec->u2_frame_width; |
1340 | 0 | buffer_ht = ps_codec->u2_frame_height; |
1341 | 0 | } |
1342 | 0 | } |
1343 | 0 | else |
1344 | 0 | { |
1345 | |
|
1346 | 0 | disp_wd = ps_codec->u2_create_max_width; |
1347 | 0 | disp_ht = ps_codec->u2_create_max_height; |
1348 | |
|
1349 | 0 | if(0 == ps_codec->u4_share_disp_buf) |
1350 | 0 | { |
1351 | 0 | buffer_wd = disp_wd; |
1352 | 0 | buffer_ht = disp_ht; |
1353 | 0 | } |
1354 | 0 | else |
1355 | 0 | { |
1356 | 0 | buffer_wd = ALIGN16(disp_wd); |
1357 | 0 | buffer_ht = ALIGN16(disp_ht); |
1358 | |
|
1359 | 0 | } |
1360 | 0 | } |
1361 | 0 | if(ps_codec->u2_frame_width > buffer_wd) |
1362 | 0 | buffer_wd = ps_codec->u2_frame_width; |
1363 | |
|
1364 | 0 | x_offset = 0; |
1365 | 0 | y_offset = 0; |
1366 | | |
1367 | |
|
1368 | 0 | ps_op->u4_disp_wd[0] = disp_wd; |
1369 | 0 | ps_op->u4_disp_ht[0] = disp_ht; |
1370 | 0 | ps_op->u4_buffer_wd[0] = buffer_wd; |
1371 | 0 | ps_op->u4_buffer_ht[0] = buffer_ht; |
1372 | 0 | ps_op->u4_x_offset[0] = x_offset; |
1373 | 0 | ps_op->u4_y_offset[0] = y_offset; |
1374 | |
|
1375 | 0 | ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1) |
1376 | 0 | >> 1); |
1377 | 0 | ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1) |
1378 | 0 | >> 1); |
1379 | 0 | ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0] |
1380 | 0 | >> 1); |
1381 | 0 | ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0] |
1382 | 0 | >> 1); |
1383 | 0 | ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = (ps_op->u4_x_offset[0] |
1384 | 0 | >> 1); |
1385 | 0 | ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = (ps_op->u4_y_offset[0] |
1386 | 0 | >> 1); |
1387 | |
|
1388 | 0 | if((ps_codec->i4_chromaFormat == IV_YUV_420SP_UV) |
1389 | 0 | || (ps_codec->i4_chromaFormat == IV_YUV_420SP_VU)) |
1390 | 0 | { |
1391 | 0 | ps_op->u4_disp_wd[2] = 0; |
1392 | 0 | ps_op->u4_disp_ht[2] = 0; |
1393 | 0 | ps_op->u4_buffer_wd[2] = 0; |
1394 | 0 | ps_op->u4_buffer_ht[2] = 0; |
1395 | 0 | ps_op->u4_x_offset[2] = 0; |
1396 | 0 | ps_op->u4_y_offset[2] = 0; |
1397 | |
|
1398 | 0 | ps_op->u4_disp_wd[1] <<= 1; |
1399 | 0 | ps_op->u4_buffer_wd[1] <<= 1; |
1400 | 0 | ps_op->u4_x_offset[1] <<= 1; |
1401 | 0 | } |
1402 | |
|
1403 | 0 | return IV_SUCCESS; |
1404 | |
|
1405 | 0 | } |
1406 | | |
1407 | | IV_API_CALL_STATUS_T impeg2d_api_function (iv_obj_t *ps_dechdl, void *pv_api_ip,void *pv_api_op) |
1408 | 124k | { |
1409 | 124k | WORD32 i4_cmd; |
1410 | 124k | IV_API_CALL_STATUS_T u4_error_code; |
1411 | 124k | UWORD32 *pu4_api_ip; |
1412 | | |
1413 | 124k | u4_error_code = impeg2d_api_check_struct_sanity(ps_dechdl,pv_api_ip,pv_api_op); |
1414 | 124k | if(IV_SUCCESS != u4_error_code) |
1415 | 0 | { |
1416 | 0 | return u4_error_code; |
1417 | 0 | } |
1418 | | |
1419 | | |
1420 | 124k | pu4_api_ip = (UWORD32 *)pv_api_ip; |
1421 | 124k | i4_cmd = *(pu4_api_ip + 1); |
1422 | | |
1423 | 124k | switch(i4_cmd) |
1424 | 124k | { |
1425 | | |
1426 | 12.4k | case IV_CMD_GET_NUM_MEM_REC: |
1427 | 12.4k | u4_error_code = impeg2d_api_num_mem_rec((void *)pv_api_ip,(void *)pv_api_op); |
1428 | 12.4k | break; |
1429 | | |
1430 | 12.4k | case IV_CMD_FILL_NUM_MEM_REC: |
1431 | 12.4k | u4_error_code = impeg2d_api_fill_mem_rec((void *)pv_api_ip,(void *)pv_api_op); |
1432 | 12.4k | break; |
1433 | | |
1434 | 6.21k | case IV_CMD_INIT: |
1435 | 6.21k | u4_error_code = impeg2d_api_init(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op); |
1436 | 6.21k | break; |
1437 | | |
1438 | 0 | case IVD_CMD_SET_DISPLAY_FRAME: |
1439 | 0 | u4_error_code = impeg2d_api_set_display_frame(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op); |
1440 | 0 | break; |
1441 | | |
1442 | 0 | case IVD_CMD_REL_DISPLAY_FRAME: |
1443 | 0 | u4_error_code = impeg2d_api_rel_display_frame(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op); |
1444 | 0 | break; |
1445 | | |
1446 | 53.7k | case IVD_CMD_VIDEO_DECODE: |
1447 | 53.7k | u4_error_code = impeg2d_api_entity(ps_dechdl, (void *)pv_api_ip,(void *)pv_api_op); |
1448 | 53.7k | break; |
1449 | | |
1450 | 6.21k | case IV_CMD_RETRIEVE_MEMREC: |
1451 | 6.21k | u4_error_code = impeg2d_api_retrieve_mem_rec(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op); |
1452 | 6.21k | break; |
1453 | | |
1454 | 33.1k | case IVD_CMD_VIDEO_CTL: |
1455 | 33.1k | u4_error_code = impeg2d_api_ctl(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op); |
1456 | 33.1k | break; |
1457 | | |
1458 | 0 | default: |
1459 | 0 | break; |
1460 | 124k | } |
1461 | | |
1462 | 124k | return(u4_error_code); |
1463 | | |
1464 | 124k | } |
1465 | | |
1466 | | /*****************************************************************************/ |
1467 | | /* */ |
1468 | | /* Function Name : impeg2d_api_num_mem_rec */ |
1469 | | /* */ |
1470 | | /* Description : The function get the number mem records library needs */ |
1471 | | /* Inputs : Error message */ |
1472 | | /* Globals : None */ |
1473 | | /* Processing : Just prints error message to console */ |
1474 | | /* Outputs : Error mesage to the console */ |
1475 | | /* Returns : None */ |
1476 | | /* */ |
1477 | | /* Issues : <List any issues or problems with this function> */ |
1478 | | /* */ |
1479 | | /* Revision History: */ |
1480 | | /* */ |
1481 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1482 | | /* 23 09 2010 Hamsalekha Creation */ |
1483 | | /* */ |
1484 | | /*****************************************************************************/ |
1485 | | |
1486 | | |
1487 | | IV_API_CALL_STATUS_T impeg2d_api_num_mem_rec(void *pv_api_ip,void *pv_api_op) |
1488 | 12.4k | { |
1489 | | /* To Query No of Memory Records */ |
1490 | 12.4k | impeg2d_num_mem_rec_ip_t *ps_query_mem_rec_ip; |
1491 | 12.4k | impeg2d_num_mem_rec_op_t *ps_query_mem_rec_op; |
1492 | | |
1493 | 12.4k | ps_query_mem_rec_ip = (impeg2d_num_mem_rec_ip_t *)pv_api_ip; |
1494 | 12.4k | ps_query_mem_rec_op = (impeg2d_num_mem_rec_op_t *)pv_api_op; |
1495 | | |
1496 | 12.4k | UNUSED(ps_query_mem_rec_ip); |
1497 | 12.4k | ps_query_mem_rec_op->s_ivd_num_mem_rec_op_t.u4_size = sizeof(impeg2d_num_mem_rec_op_t); |
1498 | | |
1499 | 12.4k | ps_query_mem_rec_op->s_ivd_num_mem_rec_op_t.u4_num_mem_rec = (UWORD32)NUM_MEM_RECORDS; |
1500 | | |
1501 | 12.4k | ps_query_mem_rec_op->s_ivd_num_mem_rec_op_t.u4_error_code = IV_SUCCESS; |
1502 | | |
1503 | | |
1504 | 12.4k | return(IV_SUCCESS); |
1505 | | |
1506 | 12.4k | } |
1507 | | |
1508 | | |
1509 | | /*****************************************************************************/ |
1510 | | /* */ |
1511 | | /* Function Name : impeg2d_api_fill_mem_rec */ |
1512 | | /* */ |
1513 | | /* Description : Thsi functions fills details of each mem record lib needs*/ |
1514 | | /* Inputs : Error message */ |
1515 | | /* Globals : None */ |
1516 | | /* Processing : Just prints error message to console */ |
1517 | | /* Outputs : Error mesage to the console */ |
1518 | | /* Returns : None */ |
1519 | | /* */ |
1520 | | /* Issues : <List any issues or problems with this function> */ |
1521 | | /* */ |
1522 | | /* Revision History: */ |
1523 | | /* */ |
1524 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1525 | | /* 23 09 2010 Hamsalekha Creation */ |
1526 | | /* */ |
1527 | | /*****************************************************************************/ |
1528 | | |
1529 | | |
1530 | | IV_API_CALL_STATUS_T impeg2d_api_fill_mem_rec(void *pv_api_ip,void *pv_api_op) |
1531 | 12.4k | { |
1532 | | |
1533 | 12.4k | impeg2d_fill_mem_rec_ip_t *ps_mem_q_ip; |
1534 | 12.4k | impeg2d_fill_mem_rec_op_t *ps_mem_q_op; |
1535 | | |
1536 | | |
1537 | 12.4k | ps_mem_q_ip = pv_api_ip; |
1538 | 12.4k | ps_mem_q_op = pv_api_op; |
1539 | | |
1540 | | |
1541 | 12.4k | impeg2d_fill_mem_rec((impeg2d_fill_mem_rec_ip_t *)ps_mem_q_ip, |
1542 | 12.4k | (impeg2d_fill_mem_rec_op_t *)ps_mem_q_op); |
1543 | | |
1544 | | |
1545 | 12.4k | return(IV_SUCCESS); |
1546 | | |
1547 | 12.4k | } |
1548 | | |
1549 | | UWORD32 impeg2d_get_outbuf_size(WORD32 pic_wd,UWORD32 pic_ht, WORD32 u1_chroma_format,UWORD32 *p_buf_size) |
1550 | 35.6k | { |
1551 | 35.6k | UWORD32 u4_min_num_out_bufs = 0; |
1552 | 35.6k | if(u1_chroma_format == IV_YUV_420P) |
1553 | 15.8k | u4_min_num_out_bufs = MIN_OUT_BUFS_420; |
1554 | 19.7k | else if(u1_chroma_format == IV_YUV_422ILE) |
1555 | 0 | u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE; |
1556 | 19.7k | else if(u1_chroma_format == IV_RGB_565) |
1557 | 0 | u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565; |
1558 | 19.7k | else if((u1_chroma_format == IV_YUV_420SP_UV) |
1559 | 19.7k | || (u1_chroma_format == IV_YUV_420SP_VU)) |
1560 | 19.7k | u4_min_num_out_bufs = MIN_OUT_BUFS_420SP; |
1561 | | |
1562 | 35.6k | if(u1_chroma_format == IV_YUV_420P) |
1563 | 15.8k | { |
1564 | 15.8k | p_buf_size[0] = (pic_wd * pic_ht); |
1565 | 15.8k | p_buf_size[1] = ((pic_wd + 1) >> 1) * ((pic_ht + 1) >> 1); |
1566 | 15.8k | p_buf_size[2] = ((pic_wd + 1) >> 1) * ((pic_ht + 1) >> 1); |
1567 | 15.8k | } |
1568 | 19.7k | else if(u1_chroma_format == IV_YUV_422ILE) |
1569 | 0 | { |
1570 | 0 | p_buf_size[0] = (pic_wd * pic_ht) |
1571 | 0 | * 2; |
1572 | 0 | p_buf_size[1] = |
1573 | 0 | p_buf_size[2] = 0; |
1574 | 0 | } |
1575 | 19.7k | else if(u1_chroma_format == IV_RGB_565) |
1576 | 0 | { |
1577 | 0 | p_buf_size[0] = (pic_wd * pic_ht) |
1578 | 0 | * 2; |
1579 | 0 | p_buf_size[1] = |
1580 | 0 | p_buf_size[2] = 0; |
1581 | 0 | } |
1582 | 19.7k | else if((u1_chroma_format == IV_YUV_420SP_UV) |
1583 | 19.7k | || (u1_chroma_format == IV_YUV_420SP_VU)) |
1584 | 19.7k | { |
1585 | 19.7k | p_buf_size[0] = (pic_wd * pic_ht); |
1586 | 19.7k | p_buf_size[1] = ((pic_wd + 1) >> 1) * ((pic_ht + 1) >> 1) * 2; |
1587 | 19.7k | p_buf_size[2] = 0; |
1588 | 19.7k | } |
1589 | 35.6k | return u4_min_num_out_bufs; |
1590 | 35.6k | } |
1591 | | |
1592 | | WORD32 check_app_out_buf_size(dec_state_t *ps_dec) |
1593 | 35.6k | { |
1594 | 35.6k | UWORD32 au4_min_out_buf_size[IVD_VIDDEC_MAX_IO_BUFFERS]; |
1595 | 35.6k | UWORD32 u4_min_num_out_bufs, i; |
1596 | 35.6k | UWORD32 pic_wd, pic_ht; |
1597 | | |
1598 | 35.6k | pic_wd = ps_dec->u2_horizontal_size; |
1599 | 35.6k | pic_ht = ps_dec->u2_vertical_size; |
1600 | | |
1601 | 35.6k | if(ps_dec->u4_frm_buf_stride > pic_wd) |
1602 | 698 | pic_wd = ps_dec->u4_frm_buf_stride; |
1603 | | |
1604 | 35.6k | u4_min_num_out_bufs = impeg2d_get_outbuf_size(pic_wd, pic_ht, ps_dec->i4_chromaFormat, &au4_min_out_buf_size[0]); |
1605 | | |
1606 | 35.6k | if (0 == ps_dec->u4_share_disp_buf) |
1607 | 35.6k | { |
1608 | 35.6k | if(ps_dec->ps_out_buf->u4_num_bufs < u4_min_num_out_bufs) |
1609 | 0 | { |
1610 | 0 | return IV_FAIL; |
1611 | 0 | } |
1612 | | |
1613 | 120k | for (i = 0 ; i < u4_min_num_out_bufs; i++) |
1614 | 85.8k | { |
1615 | 85.8k | if(ps_dec->ps_out_buf->u4_min_out_buf_size[i] < au4_min_out_buf_size[i]) |
1616 | 869 | return (IV_FAIL); |
1617 | 85.8k | } |
1618 | 35.6k | } |
1619 | 0 | else |
1620 | 0 | { |
1621 | 0 | if(ps_dec->as_disp_buffers[0].u4_num_bufs < u4_min_num_out_bufs) |
1622 | 0 | return IV_FAIL; |
1623 | | |
1624 | 0 | for (i = 0 ; i < u4_min_num_out_bufs; i++) |
1625 | 0 | { |
1626 | | /* We need to check only with the disp_buffer[0], because we have |
1627 | | * already ensured that all the buffers are of the same size in |
1628 | | * impeg2d_api_set_display_frame. |
1629 | | */ |
1630 | 0 | if(ps_dec->as_disp_buffers[0].u4_min_out_buf_size[i] < |
1631 | 0 | au4_min_out_buf_size[i]) |
1632 | 0 | return (IV_FAIL); |
1633 | 0 | } |
1634 | 0 | } |
1635 | | |
1636 | 34.7k | return(IV_SUCCESS); |
1637 | 35.6k | } |
1638 | | |
1639 | | |
1640 | | |
1641 | | /*****************************************************************************/ |
1642 | | /* */ |
1643 | | /* Function Name : impeg2d_api_init */ |
1644 | | /* */ |
1645 | | /* Description : */ |
1646 | | /* Inputs : */ |
1647 | | /* Globals : */ |
1648 | | /* Processing : */ |
1649 | | /* Outputs : */ |
1650 | | /* Returns : */ |
1651 | | /* */ |
1652 | | /* Issues : */ |
1653 | | /* */ |
1654 | | /* Revision History: */ |
1655 | | /* */ |
1656 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1657 | | /* 17 09 2007 Rajendra C Y Draft */ |
1658 | | /* */ |
1659 | | /*****************************************************************************/ |
1660 | | IV_API_CALL_STATUS_T impeg2d_api_init(iv_obj_t *ps_dechdl, |
1661 | | void *ps_ip, |
1662 | | void *ps_op) |
1663 | 6.21k | { |
1664 | 6.21k | UWORD32 i; |
1665 | | |
1666 | 6.21k | void *pv; |
1667 | 6.21k | UWORD32 u4_size; |
1668 | | |
1669 | 6.21k | dec_state_t *ps_dec_state; |
1670 | 6.21k | dec_state_multi_core_t *ps_dec_state_multi_core; |
1671 | 6.21k | UWORD32 u4_num_mem_rec; |
1672 | 6.21k | iv_mem_rec_t *ps_mem_rec ; |
1673 | 6.21k | iv_mem_rec_t *ps_frm_buf; |
1674 | 6.21k | iv_obj_t *ps_dec_handle; |
1675 | 6.21k | WORD32 i4_max_wd, i4_max_ht; |
1676 | | |
1677 | 6.21k | impeg2d_init_ip_t *ps_dec_init_ip; |
1678 | 6.21k | impeg2d_init_op_t *ps_dec_init_op; |
1679 | 6.21k | WORD32 i4_num_threads; |
1680 | 6.21k | UWORD32 u4_share_disp_buf, u4_chroma_format; |
1681 | 6.21k | UWORD32 u4_deinterlace; |
1682 | 6.21k | WORD32 i4_threads_active; |
1683 | | |
1684 | 6.21k | ps_dec_init_ip = (impeg2d_init_ip_t *)ps_ip; |
1685 | 6.21k | ps_dec_init_op = (impeg2d_init_op_t *)ps_op; |
1686 | | |
1687 | 6.21k | i4_max_wd = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_wd); |
1688 | 6.21k | i4_max_ht = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_ht); |
1689 | | |
1690 | 6.21k | if(ps_dec_init_ip->s_ivd_init_ip_t.u4_size > offsetof(impeg2d_init_ip_t, u4_share_disp_buf)) |
1691 | 6.21k | { |
1692 | 6.21k | #ifndef LOGO_EN |
1693 | 6.21k | u4_share_disp_buf = ps_dec_init_ip->u4_share_disp_buf; |
1694 | | #else |
1695 | | u4_share_disp_buf = 0; |
1696 | | #endif |
1697 | 6.21k | } |
1698 | 0 | else |
1699 | 0 | { |
1700 | 0 | u4_share_disp_buf = 0; |
1701 | 0 | } |
1702 | | |
1703 | 6.21k | u4_chroma_format = ps_dec_init_ip->s_ivd_init_ip_t.e_output_format; |
1704 | | |
1705 | 6.21k | if(ps_dec_init_ip->s_ivd_init_ip_t.u4_size > offsetof(impeg2d_init_ip_t, u4_deinterlace)) |
1706 | 6.21k | { |
1707 | 6.21k | u4_deinterlace = ps_dec_init_ip->u4_deinterlace; |
1708 | 6.21k | } |
1709 | 0 | else |
1710 | 0 | { |
1711 | 0 | u4_deinterlace = 0; |
1712 | 0 | } |
1713 | | |
1714 | 6.21k | if(ps_dec_init_ip->s_ivd_init_ip_t.u4_size > offsetof(impeg2d_init_ip_t, u4_keep_threads_active)) |
1715 | 6.21k | { |
1716 | 6.21k | i4_threads_active = ps_dec_init_ip->u4_keep_threads_active; |
1717 | 6.21k | } |
1718 | 0 | else |
1719 | 0 | { |
1720 | 0 | i4_threads_active = 0; |
1721 | 0 | } |
1722 | | |
1723 | 6.21k | if( (u4_chroma_format != IV_YUV_420P) && |
1724 | 6.21k | (u4_chroma_format != IV_YUV_420SP_UV) && |
1725 | 6.21k | (u4_chroma_format != IV_YUV_420SP_VU)) |
1726 | 0 | { |
1727 | 0 | u4_share_disp_buf = 0; |
1728 | 0 | } |
1729 | | |
1730 | | /* Disable deinterlacer in shared mode */ |
1731 | 6.21k | if(u4_share_disp_buf) |
1732 | 0 | { |
1733 | 0 | u4_deinterlace = 0; |
1734 | 0 | } |
1735 | | |
1736 | 6.21k | ps_mem_rec = ps_dec_init_ip->s_ivd_init_ip_t.pv_mem_rec_location; |
1737 | 6.21k | ps_mem_rec ++; |
1738 | | |
1739 | | |
1740 | 6.21k | ps_dec_init_op->s_ivd_init_op_t.u4_size = sizeof(impeg2d_init_op_t); |
1741 | | |
1742 | | |
1743 | | /* Except memTab[0], all other memTabs are initialized to zero */ |
1744 | 229k | for(i = 1; i < ps_dec_init_ip->s_ivd_init_ip_t.u4_num_mem_rec; i++) |
1745 | 223k | { |
1746 | 223k | memset(ps_mem_rec->pv_base,0,ps_mem_rec->u4_mem_size); |
1747 | 223k | ps_mem_rec++; |
1748 | 223k | } |
1749 | | |
1750 | | /* Reinitializing memTab[0] memory base address */ |
1751 | 6.21k | ps_mem_rec = ps_dec_init_ip->s_ivd_init_ip_t.pv_mem_rec_location; |
1752 | | |
1753 | | |
1754 | | /* memTab[0] is for codec Handle,redundant currently not being used */ |
1755 | 6.21k | ps_dec_handle = ps_mem_rec->pv_base; |
1756 | 6.21k | u4_num_mem_rec = 1; |
1757 | 6.21k | ps_mem_rec++; |
1758 | | |
1759 | | |
1760 | | |
1761 | | |
1762 | | |
1763 | | /* decoder handle */ |
1764 | 6.21k | ps_dec_state_multi_core = ps_mem_rec->pv_base; |
1765 | 6.21k | u4_num_mem_rec++; |
1766 | 6.21k | ps_mem_rec++; |
1767 | | |
1768 | | |
1769 | 6.21k | { |
1770 | 6.21k | ps_dec_handle->pv_codec_handle = (void *)ps_dec_state_multi_core; /* Initializing codec context */ |
1771 | | |
1772 | 6.21k | ps_dechdl->pv_codec_handle = (void *)ps_dec_state_multi_core; |
1773 | 6.21k | ps_dechdl->pv_fxns = (void *)impeg2d_api_function; |
1774 | 6.21k | } |
1775 | | |
1776 | | |
1777 | 31.0k | for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++) |
1778 | 24.8k | { |
1779 | 24.8k | WORD32 ret; |
1780 | 24.8k | UWORD8 *pv_buf; |
1781 | 24.8k | WORD32 mutex_size = ithread_get_mutex_lock_size(); |
1782 | 24.8k | WORD32 cond_size = ithread_get_cond_struct_size(); |
1783 | | /*************************************************************************/ |
1784 | | /* For MPEG2 Decoder Context */ |
1785 | | /*************************************************************************/ |
1786 | 24.8k | ps_dec_state = ps_mem_rec->pv_base; |
1787 | | |
1788 | 24.8k | ps_dec_state_multi_core->ps_dec_state[i4_num_threads] = ps_dec_state; |
1789 | | |
1790 | 24.8k | ps_dec_state->ps_dec_state_multi_core = ps_dec_state_multi_core; |
1791 | | |
1792 | 24.8k | ps_dec_state->i4_num_cores = 1; |
1793 | | /* @ */ /* Used for storing MemRecords */ |
1794 | 24.8k | u4_num_mem_rec++; |
1795 | 24.8k | ps_mem_rec++; |
1796 | | |
1797 | | /* Thread handle */ |
1798 | 24.8k | ps_dec_state->pv_codec_thread_handle = ps_mem_rec->pv_base; |
1799 | 24.8k | u4_num_mem_rec++; |
1800 | 24.8k | ps_mem_rec++; |
1801 | | |
1802 | 24.8k | pv_buf = ps_mem_rec->pv_base; |
1803 | 24.8k | if (ps_mem_rec->u4_mem_size < 2 * mutex_size) |
1804 | 0 | { |
1805 | 0 | ps_dec_init_op->s_ivd_init_op_t.u4_error_code = |
1806 | 0 | IMPEG2D_INIT_DEC_PER_MEM_INSUFFICIENT; |
1807 | 0 | return(IV_FAIL); |
1808 | 0 | } |
1809 | | |
1810 | 24.8k | ps_dec_state->pv_proc_start_mutex = (UWORD8 *)pv_buf; |
1811 | 24.8k | ps_dec_state->pv_proc_done_mutex = (UWORD8 *)pv_buf + mutex_size; |
1812 | | |
1813 | 24.8k | ret = ithread_mutex_init(ps_dec_state->pv_proc_start_mutex); |
1814 | 24.8k | RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret); |
1815 | | |
1816 | 24.8k | ret = ithread_mutex_init(ps_dec_state->pv_proc_done_mutex); |
1817 | 24.8k | RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret); |
1818 | | |
1819 | 24.8k | u4_num_mem_rec++; |
1820 | 24.8k | ps_mem_rec++; |
1821 | | |
1822 | 24.8k | pv_buf = ps_mem_rec->pv_base; |
1823 | 24.8k | if (ps_mem_rec->u4_mem_size < 2 * cond_size) |
1824 | 0 | { |
1825 | 0 | ps_dec_init_op->s_ivd_init_op_t.u4_error_code = |
1826 | 0 | IMPEG2D_INIT_DEC_PER_MEM_INSUFFICIENT; |
1827 | 0 | return(IV_FAIL); |
1828 | 0 | } |
1829 | 24.8k | ps_dec_state->pv_proc_start_condition = (UWORD8 *)pv_buf; |
1830 | 24.8k | ps_dec_state->pv_proc_done_condition = (UWORD8 *)pv_buf + cond_size; |
1831 | | |
1832 | 24.8k | ret = ithread_cond_init(ps_dec_state->pv_proc_start_condition); |
1833 | 24.8k | RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret); |
1834 | | |
1835 | 24.8k | ret = ithread_cond_init(ps_dec_state->pv_proc_done_condition); |
1836 | 24.8k | RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret); |
1837 | | |
1838 | 24.8k | u4_num_mem_rec++; |
1839 | 24.8k | ps_mem_rec++; |
1840 | | |
1841 | | /*************************************************************************/ |
1842 | | /* For Motion Compensation Buffers */ |
1843 | | /*************************************************************************/ |
1844 | 24.8k | pv = ps_mem_rec->pv_base; |
1845 | | |
1846 | | /* for mc_fw_buf.pu1_y */ |
1847 | | |
1848 | 24.8k | ps_dec_state->s_mc_fw_buf.pu1_y = pv; |
1849 | 24.8k | pv = (void *)((UWORD8 *)pv + MB_LUMA_MEM_SIZE); |
1850 | | |
1851 | 24.8k | u4_size = sizeof(UWORD8) * MB_LUMA_MEM_SIZE; |
1852 | | /* for mc_fw_buf.pu1_u */ |
1853 | | |
1854 | 24.8k | ps_dec_state->s_mc_fw_buf.pu1_u = pv; |
1855 | 24.8k | pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE); |
1856 | | |
1857 | 24.8k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1858 | | |
1859 | | /* for mc_fw_buf.pu1_v */ |
1860 | | |
1861 | 24.8k | ps_dec_state->s_mc_fw_buf.pu1_v = pv; |
1862 | 24.8k | pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE); |
1863 | | |
1864 | 24.8k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1865 | | |
1866 | | /* for mc_bk_buf.pu1_y */ |
1867 | | |
1868 | 24.8k | ps_dec_state->s_mc_bk_buf.pu1_y = pv; |
1869 | 24.8k | pv = (void *)((UWORD8 *)pv + MB_LUMA_MEM_SIZE); |
1870 | | |
1871 | 24.8k | u4_size += sizeof(UWORD8) * MB_LUMA_MEM_SIZE; |
1872 | | |
1873 | | /* for mc_bk_buf.pu1_u */ |
1874 | | |
1875 | 24.8k | ps_dec_state->s_mc_bk_buf.pu1_u = pv; |
1876 | 24.8k | pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE); |
1877 | | |
1878 | 24.8k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1879 | | |
1880 | | /* for mc_bk_buf.pu1_v */ |
1881 | | |
1882 | 24.8k | ps_dec_state->s_mc_bk_buf.pu1_v = pv; |
1883 | 24.8k | pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE); |
1884 | | |
1885 | 24.8k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1886 | | |
1887 | | /* for mc_buf.pu1_y */ |
1888 | | |
1889 | 24.8k | ps_dec_state->s_mc_buf.pu1_y = pv; |
1890 | 24.8k | pv = (void *)((UWORD8 *)pv + MB_LUMA_MEM_SIZE); |
1891 | | |
1892 | 24.8k | u4_size += sizeof(UWORD8) * MB_LUMA_MEM_SIZE; |
1893 | | |
1894 | | /* for mc_buf.pu1_u */ |
1895 | | |
1896 | 24.8k | ps_dec_state->s_mc_buf.pu1_u = pv; |
1897 | 24.8k | pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE); |
1898 | | |
1899 | 24.8k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1900 | | |
1901 | | /* for mc_buf.pu1_v */ |
1902 | | |
1903 | 24.8k | ps_dec_state->s_mc_buf.pu1_v = pv; |
1904 | | |
1905 | 24.8k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1906 | | |
1907 | 24.8k | u4_num_mem_rec++; |
1908 | 24.8k | ps_mem_rec++; |
1909 | | |
1910 | | |
1911 | | |
1912 | 24.8k | ps_dec_state->pv_pic_buf_mg = 0; |
1913 | | |
1914 | | /*************************************************************************/ |
1915 | | /* For saving stack context to support global error handling */ |
1916 | | /*************************************************************************/ |
1917 | 24.8k | ps_dec_state->pv_stack_cntxt = ps_mem_rec->pv_base; |
1918 | 24.8k | u4_num_mem_rec++; |
1919 | 24.8k | ps_mem_rec++; |
1920 | | |
1921 | 24.8k | } |
1922 | | |
1923 | | |
1924 | | |
1925 | | |
1926 | | |
1927 | | /*************************************************************************/ |
1928 | | /* For Picture Buffer Manager */ |
1929 | | /*************************************************************************/ |
1930 | 6.21k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1931 | | |
1932 | 6.21k | ps_dec_state->pv_pic_buf_mg = ps_mem_rec->pv_base; |
1933 | 6.21k | ps_dec_state->pv_pic_buf_base = (UWORD8 *)ps_mem_rec->pv_base + sizeof(buf_mgr_t); |
1934 | | |
1935 | 6.21k | u4_num_mem_rec++; |
1936 | 6.21k | ps_mem_rec++; |
1937 | | |
1938 | | |
1939 | | |
1940 | 31.0k | for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++) |
1941 | 24.8k | { |
1942 | | |
1943 | 24.8k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[i4_num_threads]; |
1944 | | |
1945 | | |
1946 | | /* --------------------------------------------------------------------- */ |
1947 | | /* Initializations */ |
1948 | | |
1949 | 24.8k | ps_dec_state->u2_header_done = 0; /* Header decoding not done */ |
1950 | | |
1951 | | |
1952 | 24.8k | { |
1953 | 24.8k | UWORD32 u4_max_frm_width,u4_max_frm_height; |
1954 | | |
1955 | 24.8k | u4_max_frm_width = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_wd); |
1956 | 24.8k | u4_max_frm_height = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_ht); |
1957 | | |
1958 | 24.8k | ps_dec_state->u2_create_max_width = u4_max_frm_width; |
1959 | 24.8k | ps_dec_state->u2_create_max_height = u4_max_frm_height; |
1960 | | |
1961 | 24.8k | ps_dec_state->i4_chromaFormat = ps_dec_init_ip->s_ivd_init_ip_t.e_output_format; |
1962 | 24.8k | ps_dec_state->u4_frm_buf_stride = 0 ; |
1963 | 24.8k | ps_dec_state->u2_frame_width = u4_max_frm_width; |
1964 | 24.8k | ps_dec_state->u2_picture_width = u4_max_frm_width; |
1965 | 24.8k | ps_dec_state->u2_horizontal_size = u4_max_frm_width; |
1966 | | |
1967 | 24.8k | ps_dec_state->u2_frame_height = u4_max_frm_height; |
1968 | 24.8k | ps_dec_state->u2_vertical_size = u4_max_frm_height; |
1969 | 24.8k | ps_dec_state->u4_share_disp_buf = u4_share_disp_buf; |
1970 | 24.8k | ps_dec_state->u4_deinterlace = u4_deinterlace; |
1971 | 24.8k | ps_dec_state->i4_threads_active = i4_threads_active; |
1972 | 24.8k | ps_dec_state->ps_deint_pic = NULL; |
1973 | 24.8k | } |
1974 | 24.8k | } |
1975 | | |
1976 | 6.21k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1977 | | |
1978 | 6.21k | if((ps_dec_state->i4_chromaFormat == IV_YUV_422ILE) |
1979 | 6.21k | &&((ps_dec_state->u2_vertical_size & 0x1) != 0)) |
1980 | 0 | { |
1981 | | //printf("Error! Height should be multiple of 2 if Chroma format is 422ILE\n"); |
1982 | 0 | ps_dec_init_op->s_ivd_init_op_t.u4_error_code = IMPEG2D_INIT_CHROMA_FORMAT_HEIGHT_ERROR; |
1983 | 0 | return(IV_FAIL); |
1984 | | |
1985 | |
|
1986 | 0 | } |
1987 | | |
1988 | | /* --------------------------------------------------------------------- */ |
1989 | | |
1990 | | |
1991 | | /* ! */ |
1992 | | // picture buffer manager initialization will be done only for first thread |
1993 | 6.21k | impeg2_disp_mgr_init(&ps_dec_state->s_disp_mgr); |
1994 | 6.21k | impeg2_buf_mgr_init((buf_mgr_t *)ps_dec_state->pv_pic_buf_mg); |
1995 | | |
1996 | | /*************************************************************************/ |
1997 | | /* Internal Frame Buffers */ |
1998 | | /*************************************************************************/ |
1999 | | |
2000 | | |
2001 | | /* Set first frame to grey */ |
2002 | 6.21k | { |
2003 | 6.21k | ps_frm_buf = ps_mem_rec; |
2004 | 6.21k | memset(ps_frm_buf->pv_base, 128, ps_frm_buf->u4_mem_size); |
2005 | 6.21k | ps_frm_buf++; |
2006 | 6.21k | } |
2007 | | |
2008 | 6.21k | if(0 == ps_dec_state->u4_share_disp_buf) |
2009 | 6.21k | { |
2010 | 6.21k | pic_buf_t *ps_pic_buf; |
2011 | 6.21k | ps_pic_buf = (pic_buf_t *)ps_dec_state->pv_pic_buf_base; |
2012 | 37.2k | for(i = 0; i < NUM_INT_FRAME_BUFFERS; i++) |
2013 | 31.0k | { |
2014 | 31.0k | UWORD8 *pu1_buf; |
2015 | 31.0k | pu1_buf = ps_mem_rec->pv_base; |
2016 | | |
2017 | 31.0k | ps_pic_buf->pu1_y = pu1_buf; |
2018 | 31.0k | pu1_buf += i4_max_ht * i4_max_wd; |
2019 | | |
2020 | 31.0k | ps_pic_buf->pu1_u = pu1_buf; |
2021 | 31.0k | pu1_buf += i4_max_ht * i4_max_wd >> 2; |
2022 | | |
2023 | 31.0k | ps_pic_buf->pu1_v = pu1_buf; |
2024 | 31.0k | pu1_buf += i4_max_ht * i4_max_wd >> 2; |
2025 | | |
2026 | 31.0k | ps_pic_buf->i4_buf_id = i; |
2027 | | |
2028 | 31.0k | ps_pic_buf->u1_used_as_ref = 0; |
2029 | | |
2030 | 31.0k | ps_pic_buf->u4_ts = 0; |
2031 | | |
2032 | 31.0k | impeg2_buf_mgr_add(ps_dec_state->pv_pic_buf_mg, ps_pic_buf, i); |
2033 | 31.0k | ps_mem_rec++; |
2034 | 31.0k | ps_pic_buf++; |
2035 | 31.0k | } |
2036 | 6.21k | u4_num_mem_rec += NUM_INT_FRAME_BUFFERS; |
2037 | 6.21k | } |
2038 | 0 | else if (ps_dec_state->i4_chromaFormat != IV_YUV_420P) |
2039 | 0 | { |
2040 | 0 | for(i = 0; i < NUM_INT_FRAME_BUFFERS; i++) |
2041 | 0 | { |
2042 | 0 | ps_dec_state->pu1_chroma_ref_buf[i] = ps_mem_rec->pv_base; |
2043 | 0 | ps_mem_rec++; |
2044 | 0 | } |
2045 | |
|
2046 | 0 | u4_num_mem_rec += NUM_INT_FRAME_BUFFERS; |
2047 | 0 | } |
2048 | 0 | else |
2049 | 0 | { |
2050 | 0 | ps_mem_rec+=NUM_INT_FRAME_BUFFERS; |
2051 | 0 | u4_num_mem_rec += NUM_INT_FRAME_BUFFERS; |
2052 | 0 | } |
2053 | | |
2054 | | |
2055 | 6.21k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
2056 | | |
2057 | 6.21k | ps_dec_state->pu1_input_buffer = ps_mem_rec->pv_base; |
2058 | 6.21k | u4_num_mem_rec++; |
2059 | 6.21k | ps_mem_rec++; |
2060 | | |
2061 | 6.21k | ps_dec_state->pv_jobq_buf = ps_mem_rec->pv_base; |
2062 | 6.21k | ps_dec_state->i4_jobq_buf_size = ps_mem_rec->u4_mem_size; |
2063 | 6.21k | u4_num_mem_rec++; |
2064 | 6.21k | ps_mem_rec++; |
2065 | | |
2066 | 6.21k | ps_dec_state->u1_flushfrm = 0; |
2067 | 6.21k | ps_dec_state->u1_flushcnt = 0; |
2068 | 6.21k | ps_dec_state->pv_jobq = impeg2_jobq_init(ps_dec_state->pv_jobq_buf, ps_dec_state->i4_jobq_buf_size); |
2069 | | |
2070 | | |
2071 | 6.21k | ps_dec_state->pv_deinterlacer_ctxt = ps_mem_rec->pv_base; |
2072 | 6.21k | u4_num_mem_rec++; |
2073 | 6.21k | ps_mem_rec++; |
2074 | | |
2075 | 6.21k | ps_dec_state->pu1_deint_fmt_buf = ps_mem_rec->pv_base; |
2076 | 6.21k | u4_num_mem_rec++; |
2077 | 6.21k | ps_mem_rec++; |
2078 | | |
2079 | | |
2080 | | /*************************************************************************/ |
2081 | | /* Last MemTab is used for storing TabRecords */ |
2082 | | /*************************************************************************/ |
2083 | 6.21k | ps_dec_state->pv_memTab = (void *)ps_mem_rec->pv_base; |
2084 | 6.21k | memcpy(ps_mem_rec->pv_base,ps_dec_init_ip->s_ivd_init_ip_t.pv_mem_rec_location, ps_mem_rec->u4_mem_size); |
2085 | | /* Updating in Decoder Context with memRecords */ |
2086 | 6.21k | u4_num_mem_rec++; |
2087 | 6.21k | ps_mem_rec++; |
2088 | 6.21k | ps_dec_state->u4_num_mem_records = u4_num_mem_rec; |
2089 | | |
2090 | 6.21k | if(u4_num_mem_rec != ps_dec_init_ip->s_ivd_init_ip_t.u4_num_mem_rec) |
2091 | 0 | { |
2092 | 0 | ps_dec_init_op->s_ivd_init_op_t.u4_error_code = IMPEG2D_INIT_NUM_MEM_REC_NOT_SUFFICIENT; |
2093 | 0 | return(IV_FAIL); |
2094 | 0 | } |
2095 | | |
2096 | 6.21k | ps_dec_state->u4_num_frames_decoded = 0; |
2097 | 6.21k | ps_dec_state->aps_ref_pics[0] = NULL; |
2098 | 6.21k | ps_dec_state->aps_ref_pics[1] = NULL; |
2099 | | |
2100 | 6.21k | ps_dec_init_op->s_ivd_init_op_t.u4_error_code = IV_SUCCESS; |
2101 | | |
2102 | 6.21k | impeg2d_init_arch(ps_dec_state); |
2103 | | |
2104 | 6.21k | impeg2d_init_function_ptr(ps_dec_state); |
2105 | | |
2106 | 6.21k | return(IV_SUCCESS); |
2107 | 6.21k | } |
2108 | | |
2109 | | /*****************************************************************************/ |
2110 | | /* */ |
2111 | | /* Function Name : impeg2d_api_retrieve_mem_rec */ |
2112 | | /* */ |
2113 | | /* Description : */ |
2114 | | /* */ |
2115 | | /* Inputs : */ |
2116 | | /* Globals : <Does it use any global variables?> */ |
2117 | | /* Outputs : */ |
2118 | | /* Returns : void */ |
2119 | | /* */ |
2120 | | /* Issues : none */ |
2121 | | /* */ |
2122 | | /* Revision History: */ |
2123 | | /* */ |
2124 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
2125 | | /* 22 10 2008 100356 Draft */ |
2126 | | /* */ |
2127 | | /*****************************************************************************/ |
2128 | | IV_API_CALL_STATUS_T impeg2d_api_retrieve_mem_rec(iv_obj_t *ps_dechdl, |
2129 | | void *pv_api_ip, |
2130 | | void *pv_api_op) |
2131 | 6.21k | { |
2132 | 6.21k | UWORD32 u4_i; |
2133 | 6.21k | dec_state_t *ps_dec_state; |
2134 | 6.21k | dec_state_multi_core_t *ps_dec_state_multi_core; |
2135 | 6.21k | iv_mem_rec_t *ps_mem_rec; |
2136 | 6.21k | iv_mem_rec_t *ps_temp_rec; |
2137 | 6.21k | IMPEG2D_ERROR_CODES_T ret; |
2138 | 6.21k | dec_state_t *ps_dec_thd; |
2139 | | |
2140 | | |
2141 | | |
2142 | 6.21k | impeg2d_retrieve_mem_rec_ip_t *ps_retr_mem_rec_ip; |
2143 | 6.21k | impeg2d_retrieve_mem_rec_op_t *ps_retr_mem_rec_op; |
2144 | | |
2145 | 6.21k | ps_retr_mem_rec_ip = (impeg2d_retrieve_mem_rec_ip_t *)pv_api_ip; |
2146 | 6.21k | ps_retr_mem_rec_op = (impeg2d_retrieve_mem_rec_op_t *)pv_api_op; |
2147 | | |
2148 | 6.21k | ps_mem_rec = ps_retr_mem_rec_ip->s_ivd_retrieve_mem_rec_ip_t.pv_mem_rec_location; |
2149 | 6.21k | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
2150 | 6.21k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
2151 | 6.21k | ps_temp_rec = ps_dec_state->pv_memTab; |
2152 | | |
2153 | 236k | for(u4_i = 0; u4_i < (ps_dec_state->u4_num_mem_records);u4_i++) |
2154 | 229k | { |
2155 | 229k | ps_mem_rec[u4_i].u4_mem_size = ps_temp_rec[u4_i].u4_mem_size; |
2156 | 229k | ps_mem_rec[u4_i].u4_mem_alignment = ps_temp_rec[u4_i].u4_mem_alignment; |
2157 | 229k | ps_mem_rec[u4_i].e_mem_type = ps_temp_rec[u4_i].e_mem_type; |
2158 | 229k | ps_mem_rec[u4_i].pv_base = ps_temp_rec[u4_i].pv_base; |
2159 | 229k | } |
2160 | | |
2161 | 6.21k | ps_retr_mem_rec_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code = IV_SUCCESS; |
2162 | 6.21k | ps_retr_mem_rec_op->s_ivd_retrieve_mem_rec_op_t.u4_num_mem_rec_filled = ps_dec_state->u4_num_mem_records; |
2163 | | |
2164 | 6.21k | if(ps_dec_state->i4_threads_active) |
2165 | 6.21k | { |
2166 | 6.21k | impeg2d_join_threads(ps_dec_state_multi_core); |
2167 | | |
2168 | 31.0k | for(u4_i = 0; u4_i < MAX_THREADS; u4_i++) |
2169 | 24.8k | { |
2170 | 24.8k | ps_dec_thd = ps_dec_state_multi_core->ps_dec_state[u4_i]; |
2171 | | |
2172 | 24.8k | ret = ithread_cond_destroy(ps_dec_thd->pv_proc_start_condition); |
2173 | 24.8k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) |
2174 | 0 | return(IV_FAIL); |
2175 | | |
2176 | 24.8k | ret = ithread_cond_destroy(ps_dec_thd->pv_proc_done_condition); |
2177 | 24.8k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) |
2178 | 0 | return(IV_FAIL); |
2179 | | |
2180 | 24.8k | ret = ithread_mutex_destroy(ps_dec_thd->pv_proc_start_mutex); |
2181 | 24.8k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) |
2182 | 0 | return(IV_FAIL); |
2183 | | |
2184 | 24.8k | ret = ithread_mutex_destroy(ps_dec_thd->pv_proc_done_mutex); |
2185 | 24.8k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) |
2186 | 0 | return(IV_FAIL); |
2187 | 24.8k | } |
2188 | 6.21k | } |
2189 | | |
2190 | 6.21k | impeg2_jobq_deinit(ps_dec_state->pv_jobq); |
2191 | 6.21k | IMPEG2D_PRINT_STATISTICS(); |
2192 | | |
2193 | | |
2194 | 6.21k | return(IV_SUCCESS); |
2195 | | |
2196 | 6.21k | } |
2197 | | |
2198 | | /*****************************************************************************/ |
2199 | | /* */ |
2200 | | /* Function Name : impeg2d_api_ctl */ |
2201 | | /* */ |
2202 | | /* Description : */ |
2203 | | /* */ |
2204 | | /* Inputs : */ |
2205 | | /* Globals : <Does it use any global variables?> */ |
2206 | | /* Outputs : */ |
2207 | | /* Returns : void */ |
2208 | | /* */ |
2209 | | /* Issues : none */ |
2210 | | /* */ |
2211 | | /* Revision History: */ |
2212 | | /* */ |
2213 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
2214 | | /* 22 10 2008 100356 Draft */ |
2215 | | /* */ |
2216 | | /*****************************************************************************/ |
2217 | | IV_API_CALL_STATUS_T impeg2d_api_ctl(iv_obj_t *ps_dechdl, |
2218 | | void *pv_api_ip, |
2219 | | void *pv_api_op) |
2220 | 33.1k | { |
2221 | 33.1k | WORD32 i4_sub_cmd; |
2222 | 33.1k | UWORD32 *pu4_api_ip; |
2223 | 33.1k | IV_API_CALL_STATUS_T u4_error_code; |
2224 | | |
2225 | 33.1k | pu4_api_ip = (UWORD32 *)pv_api_ip; |
2226 | 33.1k | i4_sub_cmd = *(pu4_api_ip + 2); |
2227 | | |
2228 | 33.1k | switch(i4_sub_cmd) |
2229 | 33.1k | { |
2230 | 0 | case IVD_CMD_CTL_GETPARAMS: |
2231 | 0 | u4_error_code = impeg2d_api_get_status(ps_dechdl, (void *)pv_api_ip, |
2232 | 0 | (void *)pv_api_op); |
2233 | 0 | break; |
2234 | | |
2235 | 12.4k | case IVD_CMD_CTL_SETPARAMS: |
2236 | 12.4k | u4_error_code = impeg2d_api_set_params(ps_dechdl, (void *)pv_api_ip, |
2237 | 12.4k | (void *)pv_api_op); |
2238 | 12.4k | break; |
2239 | | |
2240 | 8.24k | case IVD_CMD_CTL_RESET: |
2241 | 8.24k | u4_error_code = impeg2d_api_reset(ps_dechdl, (void *)pv_api_ip, |
2242 | 8.24k | (void *)pv_api_op); |
2243 | 8.24k | break; |
2244 | | |
2245 | 0 | case IVD_CMD_CTL_SETDEFAULT: |
2246 | 0 | u4_error_code = impeg2d_api_set_default(ps_dechdl, |
2247 | 0 | (void *)pv_api_ip, |
2248 | 0 | (void *)pv_api_op); |
2249 | 0 | break; |
2250 | | |
2251 | 0 | case IVD_CMD_CTL_FLUSH: |
2252 | 0 | u4_error_code = impeg2d_api_set_flush_mode(ps_dechdl, |
2253 | 0 | (void *)pv_api_ip, |
2254 | 0 | (void *)pv_api_op); |
2255 | 0 | break; |
2256 | | |
2257 | 0 | case IVD_CMD_CTL_GETBUFINFO: |
2258 | 0 | u4_error_code = impeg2d_api_get_buf_info(ps_dechdl, |
2259 | 0 | (void *)pv_api_ip, |
2260 | 0 | (void *)pv_api_op); |
2261 | 0 | break; |
2262 | | |
2263 | 0 | case IVD_CMD_CTL_GETVERSION: |
2264 | 0 | u4_error_code = impeg2d_api_get_version(ps_dechdl, (void *)pv_api_ip, |
2265 | 0 | (void *)pv_api_op); |
2266 | 0 | break; |
2267 | | |
2268 | 6.21k | case IMPEG2D_CMD_CTL_SET_NUM_CORES: |
2269 | 6.21k | u4_error_code = impeg2d_api_set_num_cores(ps_dechdl, |
2270 | 6.21k | (void *)pv_api_ip, |
2271 | 6.21k | (void *)pv_api_op); |
2272 | 6.21k | break; |
2273 | | |
2274 | 0 | case IMPEG2D_CMD_CTL_GET_BUFFER_DIMENSIONS: |
2275 | 0 | u4_error_code = impeg2d_get_frame_dimensions(ps_dechdl, |
2276 | 0 | (void *)pv_api_ip, |
2277 | 0 | (void *)pv_api_op); |
2278 | 0 | break; |
2279 | | |
2280 | 0 | case IMPEG2D_CMD_CTL_GET_SEQ_INFO: |
2281 | 0 | u4_error_code = impeg2d_api_get_seq_info(ps_dechdl, |
2282 | 0 | (void *)pv_api_ip, |
2283 | 0 | (void *)pv_api_op); |
2284 | 0 | break; |
2285 | | |
2286 | 6.21k | case IMPEG2D_CMD_CTL_SET_PROCESSOR: |
2287 | 6.21k | u4_error_code = impeg2d_set_processor(ps_dechdl, (void *)pv_api_ip, |
2288 | 6.21k | (void *)pv_api_op); |
2289 | 6.21k | break; |
2290 | | |
2291 | 0 | default: |
2292 | 0 | u4_error_code = IV_FAIL; |
2293 | 0 | break; |
2294 | 33.1k | } |
2295 | | |
2296 | 33.1k | return (u4_error_code); |
2297 | | |
2298 | 33.1k | } |
2299 | | |
2300 | | /*****************************************************************************/ |
2301 | | /* */ |
2302 | | /* Function Name : impeg2d_api_check_struct_sanity */ |
2303 | | /* */ |
2304 | | /* Description : */ |
2305 | | /* */ |
2306 | | /* Inputs : */ |
2307 | | /* Globals : <Does it use any global variables?> */ |
2308 | | /* Outputs : */ |
2309 | | /* Returns : void */ |
2310 | | /* */ |
2311 | | /* Issues : none */ |
2312 | | /* */ |
2313 | | /* Revision History: */ |
2314 | | /* */ |
2315 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
2316 | | /* 22 10 2008 100356 Draft */ |
2317 | | /* */ |
2318 | | /*****************************************************************************/ |
2319 | | IV_API_CALL_STATUS_T impeg2d_api_check_struct_sanity(iv_obj_t *ps_handle, |
2320 | | void *pv_api_ip, |
2321 | | void *pv_api_op) |
2322 | 124k | { |
2323 | 124k | WORD32 i4_cmd; |
2324 | 124k | UWORD32 *pu4_api_ip; |
2325 | 124k | UWORD32 *pu4_api_op; |
2326 | 124k | WORD32 i,j; |
2327 | | |
2328 | 124k | if(NULL == pv_api_op) |
2329 | 0 | return(IV_FAIL); |
2330 | | |
2331 | 124k | if(NULL == pv_api_ip) |
2332 | 0 | return(IV_FAIL); |
2333 | | |
2334 | 124k | pu4_api_ip = (UWORD32 *)pv_api_ip; |
2335 | 124k | pu4_api_op = (UWORD32 *)pv_api_op; |
2336 | 124k | i4_cmd = (IVD_API_COMMAND_TYPE_T)*(pu4_api_ip + 1); |
2337 | | |
2338 | | /* error checks on handle */ |
2339 | 124k | switch(i4_cmd) |
2340 | 124k | { |
2341 | 12.4k | case IV_CMD_GET_NUM_MEM_REC: |
2342 | 24.8k | case IV_CMD_FILL_NUM_MEM_REC: |
2343 | 24.8k | break; |
2344 | 6.21k | case IV_CMD_INIT: |
2345 | 6.21k | if(ps_handle == NULL) |
2346 | 0 | { |
2347 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2348 | 0 | *(pu4_api_op + 1) |= IVD_HANDLE_NULL; |
2349 | 0 | return IV_FAIL; |
2350 | 0 | } |
2351 | | |
2352 | 6.21k | if(ps_handle->u4_size != sizeof(iv_obj_t)) |
2353 | 0 | { |
2354 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2355 | 0 | *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT; |
2356 | 0 | return IV_FAIL; |
2357 | 0 | } |
2358 | 6.21k | break; |
2359 | 6.21k | case IVD_CMD_GET_DISPLAY_FRAME: |
2360 | 53.7k | case IVD_CMD_VIDEO_DECODE: |
2361 | 59.9k | case IV_CMD_RETRIEVE_MEMREC: |
2362 | 59.9k | case IVD_CMD_SET_DISPLAY_FRAME: |
2363 | 59.9k | case IVD_CMD_REL_DISPLAY_FRAME: |
2364 | 93.0k | case IVD_CMD_VIDEO_CTL: |
2365 | 93.0k | { |
2366 | 93.0k | if(ps_handle == NULL) |
2367 | 0 | { |
2368 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2369 | 0 | *(pu4_api_op + 1) |= IVD_HANDLE_NULL; |
2370 | 0 | return IV_FAIL; |
2371 | 0 | } |
2372 | | |
2373 | 93.0k | if(ps_handle->u4_size != sizeof(iv_obj_t)) |
2374 | 0 | { |
2375 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2376 | 0 | *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT; |
2377 | 0 | return IV_FAIL; |
2378 | 0 | } |
2379 | 93.0k | if(ps_handle->pv_fxns != impeg2d_api_function) |
2380 | 0 | { |
2381 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2382 | 0 | *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL; |
2383 | 0 | return IV_FAIL; |
2384 | 0 | } |
2385 | | |
2386 | 93.0k | if(ps_handle->pv_codec_handle == NULL) |
2387 | 0 | { |
2388 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2389 | 0 | *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL; |
2390 | 0 | return IV_FAIL; |
2391 | 0 | } |
2392 | 93.0k | } |
2393 | 93.0k | break; |
2394 | 93.0k | default: |
2395 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2396 | 0 | *(pu4_api_op + 1) |= IVD_INVALID_API_CMD; |
2397 | 0 | return IV_FAIL; |
2398 | 124k | } |
2399 | | |
2400 | 124k | switch(i4_cmd) |
2401 | 124k | { |
2402 | 12.4k | case IV_CMD_GET_NUM_MEM_REC: |
2403 | 12.4k | { |
2404 | 12.4k | impeg2d_num_mem_rec_ip_t *ps_ip = (impeg2d_num_mem_rec_ip_t *)pv_api_ip; |
2405 | 12.4k | impeg2d_num_mem_rec_op_t *ps_op = (impeg2d_num_mem_rec_op_t *)pv_api_op; |
2406 | 12.4k | ps_op->s_ivd_num_mem_rec_op_t.u4_error_code = 0; |
2407 | | |
2408 | 12.4k | if(ps_ip->s_ivd_num_mem_rec_ip_t.u4_size != sizeof(impeg2d_num_mem_rec_ip_t)) |
2409 | 0 | { |
2410 | 0 | ps_op->s_ivd_num_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2411 | 0 | ps_op->s_ivd_num_mem_rec_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2412 | 0 | return(IV_FAIL); |
2413 | 0 | } |
2414 | | |
2415 | 12.4k | if(ps_op->s_ivd_num_mem_rec_op_t.u4_size != sizeof(impeg2d_num_mem_rec_op_t)) |
2416 | 0 | { |
2417 | 0 | ps_op->s_ivd_num_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2418 | 0 | ps_op->s_ivd_num_mem_rec_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2419 | 0 | return(IV_FAIL); |
2420 | 0 | } |
2421 | 12.4k | } |
2422 | 12.4k | break; |
2423 | 12.4k | case IV_CMD_FILL_NUM_MEM_REC: |
2424 | 12.4k | { |
2425 | 12.4k | impeg2d_fill_mem_rec_ip_t *ps_ip = (impeg2d_fill_mem_rec_ip_t *)pv_api_ip; |
2426 | 12.4k | impeg2d_fill_mem_rec_op_t *ps_op = (impeg2d_fill_mem_rec_op_t *)pv_api_op; |
2427 | 12.4k | iv_mem_rec_t *ps_mem_rec; |
2428 | | |
2429 | 12.4k | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code = 0; |
2430 | | |
2431 | 12.4k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size != sizeof(impeg2d_fill_mem_rec_ip_t)) |
2432 | 0 | { |
2433 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2434 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2435 | 0 | return(IV_FAIL); |
2436 | 0 | } |
2437 | | |
2438 | 12.4k | if(ps_op->s_ivd_fill_mem_rec_op_t.u4_size != sizeof(impeg2d_fill_mem_rec_op_t)) |
2439 | 0 | { |
2440 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2441 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2442 | 0 | return(IV_FAIL); |
2443 | 0 | } |
2444 | | |
2445 | 12.4k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd < MIN_WIDTH) |
2446 | 0 | { |
2447 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2448 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_WIDTH_NOT_SUPPPORTED; |
2449 | 0 | return(IV_FAIL); |
2450 | 0 | } |
2451 | | |
2452 | 12.4k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd > MAX_WIDTH) |
2453 | 0 | { |
2454 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2455 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_WIDTH_NOT_SUPPPORTED; |
2456 | 0 | return(IV_FAIL); |
2457 | 0 | } |
2458 | | |
2459 | 12.4k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht < MIN_HEIGHT) |
2460 | 0 | { |
2461 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2462 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_HEIGHT_NOT_SUPPPORTED; |
2463 | 0 | return(IV_FAIL); |
2464 | 0 | } |
2465 | | |
2466 | 12.4k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht > MAX_HEIGHT) |
2467 | 0 | { |
2468 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2469 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_HEIGHT_NOT_SUPPPORTED; |
2470 | 0 | return(IV_FAIL); |
2471 | 0 | } |
2472 | | |
2473 | 12.4k | if(NULL == ps_ip->s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location) |
2474 | 0 | { |
2475 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2476 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_NUM_REC_NOT_SUFFICIENT; |
2477 | 0 | return(IV_FAIL); |
2478 | 0 | } |
2479 | | |
2480 | | /* check memrecords sizes are correct */ |
2481 | 12.4k | ps_mem_rec = ps_ip->s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location; |
2482 | 472k | for(i=0;i<NUM_MEM_RECORDS;i++) |
2483 | 459k | { |
2484 | 459k | if(ps_mem_rec[i].u4_size != sizeof(iv_mem_rec_t)) |
2485 | 0 | { |
2486 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2487 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_MEM_REC_STRUCT_SIZE_INCORRECT; |
2488 | 0 | return IV_FAIL; |
2489 | 0 | } |
2490 | 459k | } |
2491 | 12.4k | } |
2492 | 12.4k | break; |
2493 | | |
2494 | 12.4k | case IV_CMD_INIT: |
2495 | 6.21k | { |
2496 | 6.21k | impeg2d_init_ip_t *ps_ip = (impeg2d_init_ip_t *)pv_api_ip; |
2497 | 6.21k | impeg2d_init_op_t *ps_op = (impeg2d_init_op_t *)pv_api_op; |
2498 | 6.21k | iv_mem_rec_t *ps_mem_rec; |
2499 | 6.21k | UWORD32 u4_tot_num_mem_recs; |
2500 | | |
2501 | 6.21k | ps_op->s_ivd_init_op_t.u4_error_code = 0; |
2502 | | |
2503 | 6.21k | if(ps_ip->s_ivd_init_ip_t.u4_size != sizeof(impeg2d_init_ip_t)) |
2504 | 0 | { |
2505 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2506 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2507 | 0 | return(IV_FAIL); |
2508 | 0 | } |
2509 | | |
2510 | 6.21k | if(ps_op->s_ivd_init_op_t.u4_size != sizeof(impeg2d_init_op_t)) |
2511 | 0 | { |
2512 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2513 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2514 | 0 | return(IV_FAIL); |
2515 | 0 | } |
2516 | | |
2517 | 6.21k | u4_tot_num_mem_recs = NUM_MEM_RECORDS; |
2518 | | |
2519 | | |
2520 | | |
2521 | | |
2522 | 6.21k | if(ps_ip->s_ivd_init_ip_t.u4_num_mem_rec > u4_tot_num_mem_recs) |
2523 | 0 | { |
2524 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2525 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_NOT_SUFFICIENT; |
2526 | 0 | return(IV_FAIL); |
2527 | 0 | } |
2528 | | |
2529 | 6.21k | if(ps_ip->s_ivd_init_ip_t.u4_frm_max_wd < MIN_WIDTH) |
2530 | 0 | { |
2531 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2532 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_WIDTH_NOT_SUPPPORTED; |
2533 | 0 | return(IV_FAIL); |
2534 | 0 | } |
2535 | | |
2536 | 6.21k | if(ps_ip->s_ivd_init_ip_t.u4_frm_max_wd > MAX_WIDTH) |
2537 | 0 | { |
2538 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2539 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_WIDTH_NOT_SUPPPORTED; |
2540 | 0 | return(IV_FAIL); |
2541 | 0 | } |
2542 | | |
2543 | 6.21k | if(ps_ip->s_ivd_init_ip_t.u4_frm_max_ht < MIN_HEIGHT) |
2544 | 0 | { |
2545 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2546 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_HEIGHT_NOT_SUPPPORTED; |
2547 | 0 | return(IV_FAIL); |
2548 | 0 | } |
2549 | | |
2550 | 6.21k | if(ps_ip->s_ivd_init_ip_t.u4_frm_max_ht > MAX_HEIGHT) |
2551 | 0 | { |
2552 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2553 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_HEIGHT_NOT_SUPPPORTED; |
2554 | 0 | return(IV_FAIL); |
2555 | 0 | } |
2556 | | |
2557 | 6.21k | if(NULL == ps_ip->s_ivd_init_ip_t.pv_mem_rec_location) |
2558 | 0 | { |
2559 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2560 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_NUM_REC_NOT_SUFFICIENT; |
2561 | 0 | return(IV_FAIL); |
2562 | 0 | } |
2563 | | |
2564 | 6.21k | if((ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_420P) && |
2565 | 6.21k | (ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_422ILE)&&(ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_420SP_UV)&&(ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_420SP_VU)) |
2566 | 0 | { |
2567 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2568 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED; |
2569 | 0 | return(IV_FAIL); |
2570 | 0 | } |
2571 | | |
2572 | | /* verify number of mem records */ |
2573 | 6.21k | if(ps_ip->s_ivd_init_ip_t.u4_num_mem_rec < NUM_MEM_RECORDS) |
2574 | 0 | { |
2575 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2576 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_NOT_SUFFICIENT; |
2577 | 0 | return IV_FAIL; |
2578 | 0 | } |
2579 | | |
2580 | 6.21k | ps_mem_rec = ps_ip->s_ivd_init_ip_t.pv_mem_rec_location; |
2581 | | /* verify wether first memrecord is handle or not */ |
2582 | | /* |
2583 | | if(ps_mem_rec->pv_base != ps_handle) |
2584 | | { |
2585 | | // indicate the incorrect handle error |
2586 | | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2587 | | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INVALID_HANDLE; |
2588 | | return IV_FAIL; |
2589 | | } |
2590 | | */ |
2591 | | /* check memrecords sizes are correct */ |
2592 | 236k | for(i=0;i < (WORD32)ps_ip->s_ivd_init_ip_t.u4_num_mem_rec ; i++) |
2593 | 229k | { |
2594 | 229k | if(ps_mem_rec[i].u4_size != sizeof(iv_mem_rec_t)) |
2595 | 0 | { |
2596 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2597 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_MEM_REC_STRUCT_SIZE_INCORRECT; |
2598 | 0 | return IV_FAIL; |
2599 | 0 | } |
2600 | 229k | } |
2601 | | |
2602 | | /* verify memtabs for overlapping regions */ |
2603 | 6.21k | { |
2604 | 6.21k | UWORD8 *pau1_start[NUM_MEM_RECORDS]; |
2605 | 6.21k | UWORD8 *pau1_end[NUM_MEM_RECORDS]; |
2606 | | |
2607 | | |
2608 | 6.21k | pau1_start[0] = (UWORD8 *)(ps_mem_rec[0].pv_base); |
2609 | 6.21k | pau1_end[0] = (UWORD8 *)(ps_mem_rec[0].pv_base) + ps_mem_rec[0].u4_mem_size - 1; |
2610 | 229k | for(i = 1; i < (WORD32)ps_ip->s_ivd_init_ip_t.u4_num_mem_rec; i++) |
2611 | 223k | { |
2612 | | /* This array is populated to check memtab overlapp */ |
2613 | 223k | pau1_start[i] = (UWORD8 *)(ps_mem_rec[i].pv_base); |
2614 | 223k | pau1_end[i] = (UWORD8 *)(ps_mem_rec[i].pv_base) + ps_mem_rec[i].u4_mem_size - 1; |
2615 | | |
2616 | 4.36M | for(j = 0; j < i; j++) |
2617 | 4.13M | { |
2618 | 4.13M | if((pau1_start[i] >= pau1_start[j]) && (pau1_start[i] <= pau1_end[j])) |
2619 | 0 | { |
2620 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2621 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_OVERLAP_ERR; |
2622 | 0 | return IV_FAIL; |
2623 | 0 | } |
2624 | | |
2625 | 4.13M | if((pau1_end[i] >= pau1_start[j]) && (pau1_end[i] <= pau1_end[j])) |
2626 | 0 | { |
2627 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2628 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_OVERLAP_ERR; |
2629 | 0 | return IV_FAIL; |
2630 | 0 | } |
2631 | | |
2632 | 4.13M | if((pau1_start[i] < pau1_start[j]) && (pau1_end[i] > pau1_end[j])) |
2633 | 0 | { |
2634 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2635 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_OVERLAP_ERR; |
2636 | 0 | return IV_FAIL; |
2637 | 0 | } |
2638 | 4.13M | } |
2639 | 223k | } |
2640 | 6.21k | } |
2641 | | |
2642 | | |
2643 | | |
2644 | | |
2645 | 6.21k | { |
2646 | 6.21k | iv_mem_rec_t as_mem_rec_ittiam_api[NUM_MEM_RECORDS]; |
2647 | | |
2648 | 6.21k | impeg2d_fill_mem_rec_ip_t s_fill_mem_rec_ip; |
2649 | 6.21k | impeg2d_fill_mem_rec_op_t s_fill_mem_rec_op; |
2650 | 6.21k | IV_API_CALL_STATUS_T e_status; |
2651 | 6.21k | WORD32 i4_num_memrec; |
2652 | 6.21k | { |
2653 | | |
2654 | 6.21k | iv_num_mem_rec_ip_t s_no_of_mem_rec_query_ip; |
2655 | 6.21k | iv_num_mem_rec_op_t s_no_of_mem_rec_query_op; |
2656 | | |
2657 | | |
2658 | 6.21k | s_no_of_mem_rec_query_ip.u4_size = sizeof(iv_num_mem_rec_ip_t); |
2659 | 6.21k | s_no_of_mem_rec_query_op.u4_size = sizeof(iv_num_mem_rec_op_t); |
2660 | | |
2661 | 6.21k | s_no_of_mem_rec_query_ip.e_cmd = IV_CMD_GET_NUM_MEM_REC; |
2662 | 6.21k | impeg2d_api_function(NULL, |
2663 | 6.21k | (void *)&s_no_of_mem_rec_query_ip, |
2664 | 6.21k | (void *)&s_no_of_mem_rec_query_op); |
2665 | | |
2666 | 6.21k | i4_num_memrec = s_no_of_mem_rec_query_op.u4_num_mem_rec; |
2667 | | |
2668 | | |
2669 | | |
2670 | 6.21k | } |
2671 | | |
2672 | | |
2673 | | /* initialize mem records array with sizes */ |
2674 | 236k | for(i = 0; i < i4_num_memrec; i++) |
2675 | 229k | { |
2676 | 229k | as_mem_rec_ittiam_api[i].u4_size = sizeof(iv_mem_rec_t); |
2677 | 229k | } |
2678 | | |
2679 | 6.21k | s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.u4_size = sizeof(impeg2d_fill_mem_rec_ip_t); |
2680 | 6.21k | s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.e_cmd = IV_CMD_FILL_NUM_MEM_REC; |
2681 | 6.21k | s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd = ps_ip->s_ivd_init_ip_t.u4_frm_max_wd; |
2682 | 6.21k | s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht = ps_ip->s_ivd_init_ip_t.u4_frm_max_ht; |
2683 | 6.21k | s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location = as_mem_rec_ittiam_api; |
2684 | 6.21k | s_fill_mem_rec_ip.u4_share_disp_buf = ps_ip->u4_share_disp_buf; |
2685 | 6.21k | s_fill_mem_rec_ip.e_output_format = ps_ip->s_ivd_init_ip_t.e_output_format; |
2686 | 6.21k | s_fill_mem_rec_op.s_ivd_fill_mem_rec_op_t.u4_size = sizeof(impeg2d_fill_mem_rec_op_t); |
2687 | | |
2688 | | |
2689 | 6.21k | e_status = impeg2d_api_function(NULL, |
2690 | 6.21k | (void *)&s_fill_mem_rec_ip, |
2691 | 6.21k | (void *)&s_fill_mem_rec_op); |
2692 | 6.21k | if(IV_FAIL == e_status) |
2693 | 0 | { |
2694 | 0 | ps_op->s_ivd_init_op_t.u4_error_code = s_fill_mem_rec_op.s_ivd_fill_mem_rec_op_t.u4_error_code; |
2695 | 0 | return(IV_FAIL); |
2696 | 0 | } |
2697 | | |
2698 | | |
2699 | | |
2700 | 236k | for(i = 0; i < i4_num_memrec; i ++) |
2701 | 229k | { |
2702 | 229k | if(ps_mem_rec[i].pv_base == NULL) |
2703 | 0 | { |
2704 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2705 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_BASE_NULL; |
2706 | 0 | return IV_FAIL; |
2707 | 0 | } |
2708 | | #ifdef CHECK_ALIGN |
2709 | | |
2710 | | if((UWORD32)(ps_mem_rec[i].pv_base) & (ps_mem_rec[i].u4_mem_alignment - 1)) |
2711 | | { |
2712 | | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2713 | | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_ALIGNMENT_ERR; |
2714 | | return IV_FAIL; |
2715 | | } |
2716 | | #endif //CHECK_ALIGN |
2717 | 229k | if(ps_mem_rec[i].u4_mem_alignment != as_mem_rec_ittiam_api[i].u4_mem_alignment) |
2718 | 0 | { |
2719 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2720 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_ALIGNMENT_ERR; |
2721 | 0 | return IV_FAIL; |
2722 | 0 | } |
2723 | | |
2724 | 229k | if(ps_mem_rec[i].u4_mem_size < as_mem_rec_ittiam_api[i].u4_mem_size) |
2725 | 0 | { |
2726 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2727 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_INSUFFICIENT_SIZE; |
2728 | 0 | return IV_FAIL; |
2729 | 0 | } |
2730 | | |
2731 | 229k | if(ps_mem_rec[i].e_mem_type != as_mem_rec_ittiam_api[i].e_mem_type) |
2732 | 0 | { |
2733 | 0 | if (IV_EXTERNAL_CACHEABLE_SCRATCH_MEM == as_mem_rec_ittiam_api[i].e_mem_type) |
2734 | 0 | { |
2735 | 0 | if (IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM == ps_mem_rec[i].e_mem_type) |
2736 | 0 | { |
2737 | 0 | continue; |
2738 | 0 | } |
2739 | 0 | } |
2740 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2741 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_INCORRECT_TYPE; |
2742 | 0 | return IV_FAIL; |
2743 | 0 | } |
2744 | 229k | } |
2745 | 6.21k | } |
2746 | | |
2747 | | |
2748 | 6.21k | } |
2749 | 6.21k | break; |
2750 | | |
2751 | 6.21k | case IVD_CMD_GET_DISPLAY_FRAME: |
2752 | 0 | { |
2753 | 0 | impeg2d_get_display_frame_ip_t *ps_ip = (impeg2d_get_display_frame_ip_t *)pv_api_ip; |
2754 | 0 | impeg2d_get_display_frame_op_t *ps_op = (impeg2d_get_display_frame_op_t *)pv_api_op; |
2755 | |
|
2756 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0; |
2757 | |
|
2758 | 0 | if(ps_ip->s_ivd_get_display_frame_ip_t.u4_size != sizeof(impeg2d_get_display_frame_ip_t)) |
2759 | 0 | { |
2760 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2761 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2762 | 0 | return(IV_FAIL); |
2763 | 0 | } |
2764 | | |
2765 | 0 | if(ps_op->s_ivd_get_display_frame_op_t.u4_size != sizeof(impeg2d_get_display_frame_op_t)) |
2766 | 0 | { |
2767 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2768 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2769 | 0 | return(IV_FAIL); |
2770 | 0 | } |
2771 | | |
2772 | 0 | if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_num_bufs == 0) |
2773 | 0 | { |
2774 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2775 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUFS; |
2776 | 0 | return IV_FAIL; |
2777 | 0 | } |
2778 | | |
2779 | 0 | for(i = 0; i< (WORD32)ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_num_bufs;i++) |
2780 | 0 | { |
2781 | 0 | if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.pu1_bufs[i] == NULL) |
2782 | 0 | { |
2783 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2784 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_OP_BUF_NULL; |
2785 | 0 | return IV_FAIL; |
2786 | 0 | } |
2787 | | |
2788 | 0 | if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_min_out_buf_size[i] == 0) |
2789 | 0 | { |
2790 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2791 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUF_SIZE; |
2792 | 0 | return IV_FAIL; |
2793 | 0 | } |
2794 | | /* |
2795 | | if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_min_out_buf_size[i] == 0) |
2796 | | { |
2797 | | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2798 | | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUF_SIZE; |
2799 | | return IV_FAIL; |
2800 | | } |
2801 | | */ |
2802 | 0 | } |
2803 | 0 | } |
2804 | 0 | break; |
2805 | 0 | case IVD_CMD_REL_DISPLAY_FRAME: |
2806 | 0 | { |
2807 | 0 | impeg2d_rel_display_frame_ip_t *ps_ip = (impeg2d_rel_display_frame_ip_t *)pv_api_ip; |
2808 | 0 | impeg2d_rel_display_frame_op_t *ps_op = (impeg2d_rel_display_frame_op_t *)pv_api_op; |
2809 | |
|
2810 | 0 | ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0; |
2811 | |
|
2812 | 0 | if ((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size != sizeof(impeg2d_rel_display_frame_ip_t)) |
2813 | 0 | && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size != sizeof(ivd_rel_display_frame_ip_t))) |
2814 | 0 | { |
2815 | 0 | ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2816 | 0 | ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2817 | 0 | return(IV_FAIL); |
2818 | 0 | } |
2819 | | |
2820 | 0 | if((ps_op->s_ivd_rel_display_frame_op_t.u4_size != sizeof(impeg2d_rel_display_frame_op_t)) && |
2821 | 0 | (ps_op->s_ivd_rel_display_frame_op_t.u4_size != sizeof(ivd_rel_display_frame_op_t))) |
2822 | 0 | { |
2823 | 0 | ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2824 | 0 | ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2825 | 0 | return(IV_FAIL); |
2826 | 0 | } |
2827 | |
|
2828 | 0 | } |
2829 | 0 | break; |
2830 | | |
2831 | | |
2832 | 0 | case IVD_CMD_SET_DISPLAY_FRAME: |
2833 | 0 | { |
2834 | 0 | impeg2d_set_display_frame_ip_t *ps_ip = (impeg2d_set_display_frame_ip_t *)pv_api_ip; |
2835 | 0 | impeg2d_set_display_frame_op_t *ps_op = (impeg2d_set_display_frame_op_t *)pv_api_op; |
2836 | 0 | UWORD32 j, i; |
2837 | |
|
2838 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0; |
2839 | |
|
2840 | 0 | if ((ps_ip->s_ivd_set_display_frame_ip_t.u4_size != sizeof(impeg2d_set_display_frame_ip_t)) |
2841 | 0 | && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size != sizeof(ivd_set_display_frame_ip_t))) |
2842 | 0 | { |
2843 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2844 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2845 | 0 | return(IV_FAIL); |
2846 | 0 | } |
2847 | | |
2848 | 0 | if((ps_op->s_ivd_set_display_frame_op_t.u4_size != sizeof(impeg2d_set_display_frame_op_t)) && |
2849 | 0 | (ps_op->s_ivd_set_display_frame_op_t.u4_size != sizeof(ivd_set_display_frame_op_t))) |
2850 | 0 | { |
2851 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2852 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2853 | 0 | return(IV_FAIL); |
2854 | 0 | } |
2855 | | |
2856 | 0 | if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0) |
2857 | 0 | { |
2858 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2859 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUFS; |
2860 | 0 | return IV_FAIL; |
2861 | 0 | } |
2862 | | |
2863 | 0 | for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs; j++) |
2864 | 0 | { |
2865 | 0 | if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs == 0) |
2866 | 0 | { |
2867 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2868 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUFS; |
2869 | 0 | return IV_FAIL; |
2870 | 0 | } |
2871 | | |
2872 | 0 | for(i=0;i< ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;i++) |
2873 | 0 | { |
2874 | 0 | if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i] == NULL) |
2875 | 0 | { |
2876 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2877 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_OP_BUF_NULL; |
2878 | 0 | return IV_FAIL; |
2879 | 0 | } |
2880 | | |
2881 | 0 | if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i] == 0) |
2882 | 0 | { |
2883 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2884 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUF_SIZE; |
2885 | 0 | return IV_FAIL; |
2886 | 0 | } |
2887 | 0 | } |
2888 | 0 | } |
2889 | 0 | } |
2890 | 0 | break; |
2891 | | |
2892 | 53.7k | case IVD_CMD_VIDEO_DECODE: |
2893 | 53.7k | { |
2894 | 53.7k | impeg2d_video_decode_ip_t *ps_ip = (impeg2d_video_decode_ip_t *)pv_api_ip; |
2895 | 53.7k | impeg2d_video_decode_op_t *ps_op = (impeg2d_video_decode_op_t *)pv_api_op; |
2896 | | |
2897 | 53.7k | ps_op->s_ivd_video_decode_op_t.u4_error_code = 0; |
2898 | | |
2899 | 53.7k | if(ps_ip->s_ivd_video_decode_ip_t.u4_size != sizeof(impeg2d_video_decode_ip_t)) |
2900 | 0 | { |
2901 | 0 | ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2902 | 0 | ps_op->s_ivd_video_decode_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2903 | 0 | return(IV_FAIL); |
2904 | 0 | } |
2905 | | |
2906 | 53.7k | if(ps_op->s_ivd_video_decode_op_t.u4_size != sizeof(impeg2d_video_decode_op_t)) |
2907 | 0 | { |
2908 | 0 | ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2909 | 0 | ps_op->s_ivd_video_decode_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2910 | 0 | return(IV_FAIL); |
2911 | 0 | } |
2912 | | |
2913 | 53.7k | } |
2914 | 53.7k | break; |
2915 | | |
2916 | 53.7k | case IV_CMD_RETRIEVE_MEMREC: |
2917 | 6.21k | { |
2918 | 6.21k | impeg2d_retrieve_mem_rec_ip_t *ps_ip = (impeg2d_retrieve_mem_rec_ip_t *)pv_api_ip; |
2919 | 6.21k | impeg2d_retrieve_mem_rec_op_t *ps_op = (impeg2d_retrieve_mem_rec_op_t *)pv_api_op; |
2920 | 6.21k | iv_mem_rec_t *ps_mem_rec; |
2921 | | |
2922 | 6.21k | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code = 0; |
2923 | | |
2924 | 6.21k | if(ps_ip->s_ivd_retrieve_mem_rec_ip_t.u4_size != sizeof(impeg2d_retrieve_mem_rec_ip_t)) |
2925 | 0 | { |
2926 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2927 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2928 | 0 | return(IV_FAIL); |
2929 | 0 | } |
2930 | | |
2931 | 6.21k | if(ps_op->s_ivd_retrieve_mem_rec_op_t.u4_size != sizeof(impeg2d_retrieve_mem_rec_op_t)) |
2932 | 0 | { |
2933 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2934 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2935 | 0 | return(IV_FAIL); |
2936 | 0 | } |
2937 | | |
2938 | 6.21k | ps_mem_rec = ps_ip->s_ivd_retrieve_mem_rec_ip_t.pv_mem_rec_location; |
2939 | | /* check memrecords sizes are correct */ |
2940 | 236k | for(i=0;i < NUM_MEM_RECORDS ; i++) |
2941 | 229k | { |
2942 | 229k | if(ps_mem_rec[i].u4_size != sizeof(iv_mem_rec_t)) |
2943 | 0 | { |
2944 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2945 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= IVD_MEM_REC_STRUCT_SIZE_INCORRECT; |
2946 | 0 | return IV_FAIL; |
2947 | 0 | } |
2948 | 229k | } |
2949 | 6.21k | } |
2950 | 6.21k | break; |
2951 | | |
2952 | 33.1k | case IVD_CMD_VIDEO_CTL: |
2953 | 33.1k | { |
2954 | 33.1k | UWORD32 *pu4_ptr_cmd; |
2955 | 33.1k | UWORD32 u4_sub_command; |
2956 | | |
2957 | 33.1k | pu4_ptr_cmd = (UWORD32 *)pv_api_ip; |
2958 | 33.1k | pu4_ptr_cmd += 2; |
2959 | 33.1k | u4_sub_command = *pu4_ptr_cmd; |
2960 | | |
2961 | 33.1k | switch(u4_sub_command) |
2962 | 33.1k | { |
2963 | 12.4k | case IVD_CMD_CTL_SETPARAMS: |
2964 | 12.4k | { |
2965 | 12.4k | impeg2d_ctl_set_config_ip_t *ps_ip; |
2966 | 12.4k | impeg2d_ctl_set_config_op_t *ps_op; |
2967 | 12.4k | ps_ip = (impeg2d_ctl_set_config_ip_t *)pv_api_ip; |
2968 | 12.4k | ps_op = (impeg2d_ctl_set_config_op_t *)pv_api_op; |
2969 | | |
2970 | 12.4k | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code = 0; |
2971 | | |
2972 | 12.4k | if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size != sizeof(impeg2d_ctl_set_config_ip_t)) |
2973 | 0 | { |
2974 | 0 | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2975 | 0 | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2976 | 0 | return IV_FAIL; |
2977 | 0 | } |
2978 | 12.4k | } |
2979 | 12.4k | case IVD_CMD_CTL_SETDEFAULT: |
2980 | 12.4k | { |
2981 | 12.4k | impeg2d_ctl_set_config_op_t *ps_op; |
2982 | 12.4k | ps_op = (impeg2d_ctl_set_config_op_t *)pv_api_op; |
2983 | 12.4k | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code = 0; |
2984 | | |
2985 | 12.4k | if(ps_op->s_ivd_ctl_set_config_op_t.u4_size != sizeof(impeg2d_ctl_set_config_op_t)) |
2986 | 0 | { |
2987 | 0 | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2988 | 0 | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2989 | 0 | return IV_FAIL; |
2990 | 0 | } |
2991 | 12.4k | } |
2992 | 12.4k | break; |
2993 | | |
2994 | 12.4k | case IVD_CMD_CTL_GETPARAMS: |
2995 | 0 | { |
2996 | 0 | impeg2d_ctl_getstatus_ip_t *ps_ip; |
2997 | 0 | impeg2d_ctl_getstatus_op_t *ps_op; |
2998 | |
|
2999 | 0 | ps_ip = (impeg2d_ctl_getstatus_ip_t *)pv_api_ip; |
3000 | 0 | ps_op = (impeg2d_ctl_getstatus_op_t *)pv_api_op; |
3001 | |
|
3002 | 0 | ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code = 0; |
3003 | |
|
3004 | 0 | if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size != sizeof(impeg2d_ctl_getstatus_ip_t)) |
3005 | 0 | { |
3006 | 0 | ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3007 | 0 | ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3008 | 0 | return IV_FAIL; |
3009 | 0 | } |
3010 | 0 | if(ps_op->s_ivd_ctl_getstatus_op_t.u4_size != sizeof(impeg2d_ctl_getstatus_op_t)) |
3011 | 0 | { |
3012 | 0 | ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3013 | 0 | ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3014 | 0 | return IV_FAIL; |
3015 | 0 | } |
3016 | 0 | } |
3017 | 0 | break; |
3018 | | |
3019 | 0 | case IVD_CMD_CTL_GETBUFINFO: |
3020 | 0 | { |
3021 | 0 | impeg2d_ctl_getbufinfo_ip_t *ps_ip; |
3022 | 0 | impeg2d_ctl_getbufinfo_op_t *ps_op; |
3023 | 0 | ps_ip = (impeg2d_ctl_getbufinfo_ip_t *)pv_api_ip; |
3024 | 0 | ps_op = (impeg2d_ctl_getbufinfo_op_t *)pv_api_op; |
3025 | |
|
3026 | 0 | ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code = 0; |
3027 | |
|
3028 | 0 | if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size != sizeof(impeg2d_ctl_getbufinfo_ip_t)) |
3029 | 0 | { |
3030 | 0 | ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3031 | 0 | ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3032 | 0 | return IV_FAIL; |
3033 | 0 | } |
3034 | 0 | if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size != sizeof(impeg2d_ctl_getbufinfo_op_t)) |
3035 | 0 | { |
3036 | 0 | ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3037 | 0 | ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3038 | 0 | return IV_FAIL; |
3039 | 0 | } |
3040 | 0 | } |
3041 | 0 | break; |
3042 | | |
3043 | 0 | case IVD_CMD_CTL_GETVERSION: |
3044 | 0 | { |
3045 | 0 | impeg2d_ctl_getversioninfo_ip_t *ps_ip; |
3046 | 0 | impeg2d_ctl_getversioninfo_op_t *ps_op; |
3047 | 0 | ps_ip = (impeg2d_ctl_getversioninfo_ip_t *)pv_api_ip; |
3048 | 0 | ps_op = (impeg2d_ctl_getversioninfo_op_t *)pv_api_op; |
3049 | |
|
3050 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = 0; |
3051 | |
|
3052 | 0 | if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size != sizeof(impeg2d_ctl_getversioninfo_ip_t)) |
3053 | 0 | { |
3054 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3055 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3056 | 0 | return IV_FAIL; |
3057 | 0 | } |
3058 | 0 | if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size != sizeof(impeg2d_ctl_getversioninfo_op_t)) |
3059 | 0 | { |
3060 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3061 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3062 | 0 | return IV_FAIL; |
3063 | 0 | } |
3064 | 0 | } |
3065 | 0 | break; |
3066 | | |
3067 | 0 | case IVD_CMD_CTL_FLUSH: |
3068 | 0 | { |
3069 | 0 | impeg2d_ctl_flush_ip_t *ps_ip; |
3070 | 0 | impeg2d_ctl_flush_op_t *ps_op; |
3071 | 0 | ps_ip = (impeg2d_ctl_flush_ip_t *)pv_api_ip; |
3072 | 0 | ps_op = (impeg2d_ctl_flush_op_t *)pv_api_op; |
3073 | |
|
3074 | 0 | ps_op->s_ivd_ctl_flush_op_t.u4_error_code = 0; |
3075 | |
|
3076 | 0 | if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size != sizeof(impeg2d_ctl_flush_ip_t)) |
3077 | 0 | { |
3078 | 0 | ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3079 | 0 | ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3080 | 0 | return IV_FAIL; |
3081 | 0 | } |
3082 | 0 | if(ps_op->s_ivd_ctl_flush_op_t.u4_size != sizeof(impeg2d_ctl_flush_op_t)) |
3083 | 0 | { |
3084 | 0 | ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3085 | 0 | ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3086 | 0 | return IV_FAIL; |
3087 | 0 | } |
3088 | 0 | } |
3089 | 0 | break; |
3090 | | |
3091 | 8.24k | case IVD_CMD_CTL_RESET: |
3092 | 8.24k | { |
3093 | 8.24k | impeg2d_ctl_reset_ip_t *ps_ip; |
3094 | 8.24k | impeg2d_ctl_reset_op_t *ps_op; |
3095 | 8.24k | ps_ip = (impeg2d_ctl_reset_ip_t *)pv_api_ip; |
3096 | 8.24k | ps_op = (impeg2d_ctl_reset_op_t *)pv_api_op; |
3097 | | |
3098 | 8.24k | ps_op->s_ivd_ctl_reset_op_t.u4_error_code = 0; |
3099 | | |
3100 | 8.24k | if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size != sizeof(impeg2d_ctl_reset_ip_t)) |
3101 | 0 | { |
3102 | 0 | ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3103 | 0 | ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3104 | 0 | return IV_FAIL; |
3105 | 0 | } |
3106 | 8.24k | if(ps_op->s_ivd_ctl_reset_op_t.u4_size != sizeof(impeg2d_ctl_reset_op_t)) |
3107 | 0 | { |
3108 | 0 | ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3109 | 0 | ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3110 | 0 | return IV_FAIL; |
3111 | 0 | } |
3112 | 8.24k | } |
3113 | 8.24k | break; |
3114 | | |
3115 | 8.24k | case IMPEG2D_CMD_CTL_GET_BUFFER_DIMENSIONS: |
3116 | 0 | { |
3117 | 0 | impeg2d_ctl_get_frame_dimensions_ip_t *ps_ip; |
3118 | 0 | impeg2d_ctl_get_frame_dimensions_op_t *ps_op; |
3119 | |
|
3120 | 0 | ps_ip = |
3121 | 0 | (impeg2d_ctl_get_frame_dimensions_ip_t *)pv_api_ip; |
3122 | 0 | ps_op = |
3123 | 0 | (impeg2d_ctl_get_frame_dimensions_op_t *)pv_api_op; |
3124 | |
|
3125 | 0 | if(ps_ip->u4_size |
3126 | 0 | != sizeof(impeg2d_ctl_get_frame_dimensions_ip_t)) |
3127 | 0 | { |
3128 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3129 | 0 | ps_op->u4_error_code |= |
3130 | 0 | IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3131 | 0 | return IV_FAIL; |
3132 | 0 | } |
3133 | | |
3134 | 0 | if(ps_op->u4_size |
3135 | 0 | != sizeof(impeg2d_ctl_get_frame_dimensions_op_t)) |
3136 | 0 | { |
3137 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3138 | 0 | ps_op->u4_error_code |= |
3139 | 0 | IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3140 | 0 | return IV_FAIL; |
3141 | 0 | } |
3142 | | |
3143 | 0 | break; |
3144 | 0 | } |
3145 | 0 | case IMPEG2D_CMD_CTL_GET_SEQ_INFO: |
3146 | 0 | { |
3147 | 0 | impeg2d_ctl_get_seq_info_ip_t *ps_ip; |
3148 | 0 | impeg2d_ctl_get_seq_info_op_t *ps_op; |
3149 | |
|
3150 | 0 | ps_ip = |
3151 | 0 | (impeg2d_ctl_get_seq_info_ip_t *)pv_api_ip; |
3152 | 0 | ps_op = |
3153 | 0 | (impeg2d_ctl_get_seq_info_op_t *)pv_api_op; |
3154 | |
|
3155 | 0 | if(ps_ip->u4_size |
3156 | 0 | != sizeof(impeg2d_ctl_get_seq_info_ip_t)) |
3157 | 0 | { |
3158 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3159 | 0 | ps_op->u4_error_code |= |
3160 | 0 | IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3161 | 0 | return IV_FAIL; |
3162 | 0 | } |
3163 | | |
3164 | 0 | if(ps_op->u4_size |
3165 | 0 | != sizeof(impeg2d_ctl_get_seq_info_op_t)) |
3166 | 0 | { |
3167 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3168 | 0 | ps_op->u4_error_code |= |
3169 | 0 | IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3170 | 0 | return IV_FAIL; |
3171 | 0 | } |
3172 | | |
3173 | 0 | break; |
3174 | 0 | } |
3175 | 6.21k | case IMPEG2D_CMD_CTL_SET_NUM_CORES: |
3176 | 6.21k | { |
3177 | 6.21k | impeg2d_ctl_set_num_cores_ip_t *ps_ip; |
3178 | 6.21k | impeg2d_ctl_set_num_cores_op_t *ps_op; |
3179 | | |
3180 | 6.21k | ps_ip = (impeg2d_ctl_set_num_cores_ip_t *)pv_api_ip; |
3181 | 6.21k | ps_op = (impeg2d_ctl_set_num_cores_op_t *)pv_api_op; |
3182 | | |
3183 | 6.21k | if(ps_ip->u4_size |
3184 | 6.21k | != sizeof(impeg2d_ctl_set_num_cores_ip_t)) |
3185 | 0 | { |
3186 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3187 | 0 | ps_op->u4_error_code |= |
3188 | 0 | IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3189 | 0 | return IV_FAIL; |
3190 | 0 | } |
3191 | | |
3192 | 6.21k | if(ps_op->u4_size |
3193 | 6.21k | != sizeof(impeg2d_ctl_set_num_cores_op_t)) |
3194 | 0 | { |
3195 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3196 | 0 | ps_op->u4_error_code |= |
3197 | 0 | IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3198 | 0 | return IV_FAIL; |
3199 | 0 | } |
3200 | | |
3201 | 6.21k | #ifdef MULTICORE |
3202 | 6.21k | if((ps_ip->u4_num_cores < 1) || (ps_ip->u4_num_cores > MAX_THREADS)) |
3203 | | #else |
3204 | | if(ps_ip->u4_num_cores != 1) |
3205 | | #endif |
3206 | 0 | { |
3207 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3208 | 0 | return IV_FAIL; |
3209 | 0 | } |
3210 | 6.21k | break; |
3211 | 6.21k | } |
3212 | 6.21k | case IMPEG2D_CMD_CTL_SET_PROCESSOR: |
3213 | 6.21k | { |
3214 | 6.21k | impeg2d_ctl_set_processor_ip_t *ps_ip; |
3215 | 6.21k | impeg2d_ctl_set_processor_op_t *ps_op; |
3216 | | |
3217 | 6.21k | ps_ip = (impeg2d_ctl_set_processor_ip_t *)pv_api_ip; |
3218 | 6.21k | ps_op = (impeg2d_ctl_set_processor_op_t *)pv_api_op; |
3219 | | |
3220 | 6.21k | if(ps_ip->u4_size |
3221 | 6.21k | != sizeof(impeg2d_ctl_set_processor_ip_t)) |
3222 | 0 | { |
3223 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3224 | 0 | ps_op->u4_error_code |= |
3225 | 0 | IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3226 | 0 | return IV_FAIL; |
3227 | 0 | } |
3228 | | |
3229 | 6.21k | if(ps_op->u4_size |
3230 | 6.21k | != sizeof(impeg2d_ctl_set_processor_op_t)) |
3231 | 0 | { |
3232 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3233 | 0 | ps_op->u4_error_code |= |
3234 | 0 | IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3235 | 0 | return IV_FAIL; |
3236 | 0 | } |
3237 | | |
3238 | 6.21k | break; |
3239 | 6.21k | } |
3240 | 6.21k | default: |
3241 | 0 | break; |
3242 | | |
3243 | 33.1k | } |
3244 | 33.1k | } |
3245 | 33.1k | break; |
3246 | | |
3247 | 33.1k | default: |
3248 | 0 | { *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
3249 | 0 | *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD; |
3250 | 0 | return IV_FAIL; |
3251 | 33.1k | } |
3252 | | |
3253 | | |
3254 | 124k | } |
3255 | | |
3256 | 124k | return IV_SUCCESS; |
3257 | 124k | } |
3258 | | |
3259 | | /*****************************************************************************/ |
3260 | | /* */ |
3261 | | /* Function Name : impeg2d_api_entity */ |
3262 | | /* */ |
3263 | | /* Description : */ |
3264 | | /* */ |
3265 | | /* Inputs : */ |
3266 | | /* Globals : <Does it use any global variables?> */ |
3267 | | /* Outputs : */ |
3268 | | /* Returns : void */ |
3269 | | /* */ |
3270 | | /* Issues : none */ |
3271 | | /* */ |
3272 | | /* Revision History: */ |
3273 | | /* */ |
3274 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
3275 | | /* 22 10 2008 100356 Draft */ |
3276 | | /* */ |
3277 | | /*****************************************************************************/ |
3278 | | |
3279 | | |
3280 | | IV_API_CALL_STATUS_T impeg2d_api_entity(iv_obj_t *ps_dechdl, |
3281 | | void *pv_api_ip, |
3282 | | void *pv_api_op) |
3283 | 53.7k | { |
3284 | 53.7k | iv_obj_t *ps_dec_handle; |
3285 | 53.7k | dec_state_t *ps_dec_state; |
3286 | 53.7k | dec_state_multi_core_t *ps_dec_state_multi_core; |
3287 | | |
3288 | 53.7k | impeg2d_video_decode_ip_t *ps_dec_ip; |
3289 | | |
3290 | 53.7k | impeg2d_video_decode_op_t *ps_dec_op; |
3291 | 53.7k | WORD32 bytes_remaining; |
3292 | 53.7k | pic_buf_t *ps_disp_pic; |
3293 | | |
3294 | | |
3295 | | |
3296 | 53.7k | ps_dec_ip = (impeg2d_video_decode_ip_t *)pv_api_ip; |
3297 | 53.7k | ps_dec_op = (impeg2d_video_decode_op_t *)pv_api_op; |
3298 | | |
3299 | 53.7k | memset(ps_dec_op,0,sizeof(impeg2d_video_decode_op_t)); |
3300 | | |
3301 | 53.7k | ps_dec_op->s_ivd_video_decode_op_t.u4_size = sizeof(impeg2d_video_decode_op_t); |
3302 | 53.7k | ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 0; |
3303 | 53.7k | bytes_remaining = ps_dec_ip->s_ivd_video_decode_ip_t.u4_num_Bytes; |
3304 | | |
3305 | 53.7k | ps_dec_handle = (iv_obj_t *)ps_dechdl; |
3306 | | |
3307 | 53.7k | if(ps_dechdl == NULL) |
3308 | 0 | { |
3309 | 0 | return(IV_FAIL); |
3310 | 0 | } |
3311 | | |
3312 | | |
3313 | | |
3314 | 53.7k | ps_dec_state_multi_core = ps_dec_handle->pv_codec_handle; |
3315 | 53.7k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
3316 | | |
3317 | 53.7k | ps_dec_state->ps_disp_frm_buf = &(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf); |
3318 | 53.7k | if(0 == ps_dec_state->u4_share_disp_buf) |
3319 | 53.7k | { |
3320 | 53.7k | ps_dec_state->ps_disp_frm_buf->pv_y_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0]; |
3321 | 53.7k | ps_dec_state->ps_disp_frm_buf->pv_u_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1]; |
3322 | 53.7k | ps_dec_state->ps_disp_frm_buf->pv_v_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2]; |
3323 | 53.7k | } |
3324 | | |
3325 | 53.7k | ps_dec_state->ps_disp_pic = NULL; |
3326 | 53.7k | ps_dec_state->i4_frame_decoded = 0; |
3327 | | /*rest bytes consumed */ |
3328 | 53.7k | ps_dec_op->s_ivd_video_decode_op_t.u4_num_bytes_consumed = 0; |
3329 | | |
3330 | 53.7k | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code = IV_SUCCESS; |
3331 | | |
3332 | 53.7k | if((ps_dec_ip->s_ivd_video_decode_ip_t.pv_stream_buffer == NULL)&&(ps_dec_state->u1_flushfrm==0)) |
3333 | 0 | { |
3334 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3335 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code |= IVD_DEC_FRM_BS_BUF_NULL; |
3336 | 0 | return IV_FAIL; |
3337 | 0 | } |
3338 | | |
3339 | | |
3340 | 53.7k | if (ps_dec_state->u4_num_frames_decoded > NUM_FRAMES_LIMIT) |
3341 | 0 | { |
3342 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code = IMPEG2D_SAMPLE_VERSION_LIMIT_ERR; |
3343 | 0 | return(IV_FAIL); |
3344 | 0 | } |
3345 | | |
3346 | 53.7k | if(((0 == ps_dec_state->u2_header_done) || (ps_dec_state->u2_decode_header == 1)) && (ps_dec_state->u1_flushfrm == 0)) |
3347 | 20.2k | { |
3348 | 20.2k | impeg2d_dec_hdr(ps_dec_state,ps_dec_ip ,ps_dec_op); |
3349 | 20.2k | bytes_remaining -= ps_dec_op->s_ivd_video_decode_op_t.u4_num_bytes_consumed; |
3350 | 20.2k | } |
3351 | | |
3352 | 53.7k | if((1 != ps_dec_state->u2_decode_header) && |
3353 | 53.7k | (((bytes_remaining > 0) && (1 == ps_dec_state->u2_header_done)) || ps_dec_state->u1_flushfrm)) |
3354 | 35.8k | { |
3355 | 35.8k | if(ps_dec_state->u1_flushfrm) |
3356 | 0 | { |
3357 | 0 | if(ps_dec_state->aps_ref_pics[1] != NULL) |
3358 | 0 | { |
3359 | 0 | impeg2_disp_mgr_add(&ps_dec_state->s_disp_mgr, ps_dec_state->aps_ref_pics[1], ps_dec_state->aps_ref_pics[1]->i4_buf_id); |
3360 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->aps_ref_pics[1]->i4_buf_id, BUF_MGR_REF); |
3361 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->aps_ref_pics[0]->i4_buf_id, BUF_MGR_REF); |
3362 | |
|
3363 | 0 | ps_dec_state->aps_ref_pics[1] = NULL; |
3364 | 0 | ps_dec_state->aps_ref_pics[0] = NULL; |
3365 | |
|
3366 | 0 | } |
3367 | 0 | else if(ps_dec_state->aps_ref_pics[0] != NULL) |
3368 | 0 | { |
3369 | 0 | impeg2_disp_mgr_add(&ps_dec_state->s_disp_mgr, ps_dec_state->aps_ref_pics[0], ps_dec_state->aps_ref_pics[0]->i4_buf_id); |
3370 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->aps_ref_pics[0]->i4_buf_id, BUF_MGR_REF); |
3371 | |
|
3372 | 0 | ps_dec_state->aps_ref_pics[0] = NULL; |
3373 | 0 | } |
3374 | 0 | ps_dec_ip->s_ivd_video_decode_ip_t.u4_size = sizeof(impeg2d_video_decode_ip_t); |
3375 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_size = sizeof(impeg2d_video_decode_op_t); |
3376 | |
|
3377 | 0 | ps_disp_pic = impeg2_disp_mgr_get(&ps_dec_state->s_disp_mgr, &ps_dec_state->i4_disp_buf_id); |
3378 | |
|
3379 | 0 | ps_dec_state->ps_disp_pic = ps_disp_pic; |
3380 | 0 | if(ps_disp_pic == NULL) |
3381 | 0 | { |
3382 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 0; |
3383 | 0 | } |
3384 | 0 | else |
3385 | 0 | { |
3386 | 0 | WORD32 fmt_conv; |
3387 | 0 | if(0 == ps_dec_state->u4_share_disp_buf) |
3388 | 0 | { |
3389 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_y_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0]; |
3390 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_u_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1]; |
3391 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_v_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2]; |
3392 | 0 | fmt_conv = 1; |
3393 | 0 | } |
3394 | 0 | else |
3395 | 0 | { |
3396 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_y_buf = ps_disp_pic->pu1_y; |
3397 | 0 | if(IV_YUV_420P == ps_dec_state->i4_chromaFormat) |
3398 | 0 | { |
3399 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_u_buf = ps_disp_pic->pu1_u; |
3400 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_v_buf = ps_disp_pic->pu1_v; |
3401 | 0 | fmt_conv = 0; |
3402 | 0 | } |
3403 | 0 | else |
3404 | 0 | { |
3405 | 0 | UWORD8 *pu1_buf; |
3406 | |
|
3407 | 0 | pu1_buf = ps_dec_state->as_disp_buffers[ps_disp_pic->i4_buf_id].pu1_bufs[1]; |
3408 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_u_buf = pu1_buf; |
3409 | |
|
3410 | 0 | pu1_buf = ps_dec_state->as_disp_buffers[ps_disp_pic->i4_buf_id].pu1_bufs[2]; |
3411 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_v_buf = pu1_buf; |
3412 | 0 | fmt_conv = 1; |
3413 | 0 | } |
3414 | 0 | } |
3415 | |
|
3416 | 0 | if(fmt_conv == 1) |
3417 | 0 | { |
3418 | 0 | iv_yuv_buf_t *ps_dst; |
3419 | | |
3420 | |
|
3421 | 0 | ps_dst = &(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf); |
3422 | 0 | if(ps_dec_state->u4_deinterlace && (0 == ps_dec_state->u2_progressive_frame)) |
3423 | 0 | { |
3424 | 0 | impeg2d_deinterlace(ps_dec_state, |
3425 | 0 | ps_disp_pic, |
3426 | 0 | ps_dst, |
3427 | 0 | 0, |
3428 | 0 | ps_dec_state->u2_vertical_size); |
3429 | |
|
3430 | 0 | } |
3431 | 0 | else |
3432 | 0 | { |
3433 | 0 | impeg2d_format_convert(ps_dec_state, |
3434 | 0 | ps_disp_pic, |
3435 | 0 | ps_dst, |
3436 | 0 | 0, |
3437 | 0 | ps_dec_state->u2_vertical_size); |
3438 | 0 | } |
3439 | 0 | } |
3440 | |
|
3441 | 0 | if(ps_dec_state->u4_deinterlace) |
3442 | 0 | { |
3443 | 0 | if(ps_dec_state->ps_deint_pic) |
3444 | 0 | { |
3445 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, |
3446 | 0 | ps_dec_state->ps_deint_pic->i4_buf_id, |
3447 | 0 | MPEG2_BUF_MGR_DEINT); |
3448 | 0 | } |
3449 | 0 | ps_dec_state->ps_deint_pic = ps_disp_pic; |
3450 | 0 | } |
3451 | 0 | if(0 == ps_dec_state->u4_share_disp_buf) |
3452 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_disp_pic->i4_buf_id, BUF_MGR_DISP); |
3453 | |
|
3454 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_pic_ht = ps_dec_state->u2_vertical_size; |
3455 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_pic_wd = ps_dec_state->u2_horizontal_size; |
3456 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 1; |
3457 | |
|
3458 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_disp_buf_id = ps_disp_pic->i4_buf_id; |
3459 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_ts = ps_disp_pic->u4_ts; |
3460 | |
|
3461 | 0 | ps_dec_op->s_ivd_video_decode_op_t.e_output_format = (IV_COLOR_FORMAT_T)ps_dec_state->i4_chromaFormat; |
3462 | |
|
3463 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_is_ref_flag = (B_PIC != ps_dec_state->e_pic_type); |
3464 | |
|
3465 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_progressive_frame_flag = IV_PROGRESSIVE; |
3466 | |
|
3467 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_wd = ps_dec_state->u2_horizontal_size; |
3468 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_strd = ps_dec_state->u4_frm_buf_stride; |
3469 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_ht = ps_dec_state->u2_vertical_size; |
3470 | |
|
3471 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1; |
3472 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1; |
3473 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = (ps_dec_state->u2_vertical_size + 1) >> 1; |
3474 | |
|
3475 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1; |
3476 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1; |
3477 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = (ps_dec_state->u2_vertical_size + 1) >> 1; |
3478 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_size = sizeof(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf); |
3479 | |
|
3480 | 0 | switch(ps_dec_state->i4_chromaFormat) |
3481 | 0 | { |
3482 | 0 | case IV_YUV_420SP_UV: |
3483 | 0 | case IV_YUV_420SP_VU: |
3484 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (((ps_dec_state->u2_horizontal_size + 1) >> 1) << 1); |
3485 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = ps_dec_state->u4_frm_buf_stride; |
3486 | 0 | break; |
3487 | 0 | case IV_YUV_422ILE: |
3488 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = 0; |
3489 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = 0; |
3490 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = 0; |
3491 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = 0; |
3492 | 0 | break; |
3493 | 0 | default: |
3494 | 0 | break; |
3495 | 0 | } |
3496 | | |
3497 | |
|
3498 | 0 | } |
3499 | 0 | if(ps_dec_op->s_ivd_video_decode_op_t.u4_output_present) |
3500 | 0 | { |
3501 | 0 | if(1 == ps_dec_op->s_ivd_video_decode_op_t.u4_output_present) |
3502 | 0 | { |
3503 | 0 | INSERT_LOGO(ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0], |
3504 | 0 | ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1], |
3505 | 0 | ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2], |
3506 | 0 | ps_dec_state->u4_frm_buf_stride, |
3507 | 0 | ps_dec_state->u2_horizontal_size, |
3508 | 0 | ps_dec_state->u2_vertical_size, |
3509 | 0 | ps_dec_state->i4_chromaFormat, |
3510 | 0 | ps_dec_state->u2_horizontal_size, |
3511 | 0 | ps_dec_state->u2_vertical_size); |
3512 | 0 | } |
3513 | 0 | return(IV_SUCCESS); |
3514 | 0 | } |
3515 | 0 | else |
3516 | 0 | { |
3517 | 0 | ps_dec_state->u1_flushfrm = 0; |
3518 | |
|
3519 | 0 | return(IV_FAIL); |
3520 | 0 | } |
3521 | |
|
3522 | 0 | } |
3523 | 35.8k | else if(ps_dec_state->u1_flushfrm==0) |
3524 | 35.8k | { |
3525 | 35.8k | ps_dec_ip->s_ivd_video_decode_ip_t.u4_size = sizeof(impeg2d_video_decode_ip_t); |
3526 | 35.8k | ps_dec_op->s_ivd_video_decode_op_t.u4_size = sizeof(impeg2d_video_decode_op_t); |
3527 | 35.8k | if(ps_dec_ip->s_ivd_video_decode_ip_t.u4_num_Bytes < 4) |
3528 | 268 | { |
3529 | 268 | ps_dec_op->s_ivd_video_decode_op_t.u4_num_bytes_consumed = ps_dec_ip->s_ivd_video_decode_ip_t.u4_num_Bytes; |
3530 | 268 | return(IV_FAIL); |
3531 | 268 | } |
3532 | | |
3533 | 35.6k | if(1 == ps_dec_state->u4_share_disp_buf) |
3534 | 0 | { |
3535 | 0 | if(0 == impeg2_buf_mgr_check_free(ps_dec_state->pv_pic_buf_mg)) |
3536 | 0 | { |
3537 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code = |
3538 | 0 | (IMPEG2D_ERROR_CODES_T)IVD_DEC_REF_BUF_NULL; |
3539 | 0 | return IV_FAIL; |
3540 | 0 | } |
3541 | 0 | } |
3542 | | |
3543 | | |
3544 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.e_output_format = (IV_COLOR_FORMAT_T)ps_dec_state->i4_chromaFormat; |
3545 | | |
3546 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.u4_is_ref_flag = (B_PIC != ps_dec_state->e_pic_type); |
3547 | | |
3548 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.u4_progressive_frame_flag = IV_PROGRESSIVE; |
3549 | | |
3550 | 35.6k | if (0 == ps_dec_state->u4_frm_buf_stride) |
3551 | 0 | { |
3552 | 0 | ps_dec_state->u4_frm_buf_stride = (ps_dec_state->u2_horizontal_size); |
3553 | 0 | } |
3554 | | |
3555 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_wd = ps_dec_state->u2_horizontal_size; |
3556 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_strd = ps_dec_state->u4_frm_buf_stride; |
3557 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_ht = ps_dec_state->u2_vertical_size; |
3558 | | |
3559 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1; |
3560 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1; |
3561 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = (ps_dec_state->u2_vertical_size + 1) >> 1; |
3562 | | |
3563 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1; |
3564 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1; |
3565 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = (ps_dec_state->u2_vertical_size + 1) >> 1; |
3566 | 35.6k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_size = sizeof(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf); |
3567 | | |
3568 | 35.6k | switch(ps_dec_state->i4_chromaFormat) |
3569 | 35.6k | { |
3570 | 8.17k | case IV_YUV_420SP_UV: |
3571 | 19.7k | case IV_YUV_420SP_VU: |
3572 | 19.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (((ps_dec_state->u2_horizontal_size + 1) >> 1) << 1); |
3573 | 19.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = ps_dec_state->u4_frm_buf_stride; |
3574 | 19.7k | break; |
3575 | 0 | case IV_YUV_422ILE: |
3576 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = 0; |
3577 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = 0; |
3578 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = 0; |
3579 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = 0; |
3580 | 0 | break; |
3581 | 15.8k | default: |
3582 | 15.8k | break; |
3583 | 35.6k | } |
3584 | | |
3585 | 35.6k | if( ps_dec_state->u1_flushfrm == 0) |
3586 | 35.6k | { |
3587 | 35.6k | ps_dec_state->u1_flushcnt = 0; |
3588 | | |
3589 | 35.6k | ps_dec_state->ps_out_buf = &ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer; |
3590 | 35.6k | if (IV_SUCCESS != check_app_out_buf_size(ps_dec_state)) |
3591 | 869 | { |
3592 | 869 | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code = IVD_DISP_FRM_ZERO_OP_BUF_SIZE; |
3593 | 869 | return IV_FAIL; |
3594 | 869 | } |
3595 | | |
3596 | | /*************************************************************************/ |
3597 | | /* Frame Decode */ |
3598 | | /*************************************************************************/ |
3599 | 34.7k | ps_dec_state->u4_inp_ts = ps_dec_ip->s_ivd_video_decode_ip_t.u4_ts; |
3600 | | |
3601 | 34.7k | impeg2d_dec_frm(ps_dec_state,ps_dec_ip,ps_dec_op); |
3602 | | |
3603 | 34.7k | if (IVD_ERROR_NONE == |
3604 | 34.7k | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code) |
3605 | 22.7k | { |
3606 | 22.7k | if(ps_dec_state->u1_first_frame_done == 0) |
3607 | 4.78k | { |
3608 | 4.78k | ps_dec_state->u1_first_frame_done = 1; |
3609 | 4.78k | } |
3610 | | |
3611 | 22.7k | if(ps_dec_state->ps_disp_pic) |
3612 | 13.0k | { |
3613 | 13.0k | ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 1; |
3614 | 13.0k | switch(ps_dec_state->ps_disp_pic->e_pic_type) |
3615 | 13.0k | { |
3616 | 3.94k | case I_PIC : |
3617 | 3.94k | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_I_FRAME; |
3618 | 3.94k | break; |
3619 | | |
3620 | 1.84k | case P_PIC: |
3621 | 1.84k | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_P_FRAME; |
3622 | 1.84k | break; |
3623 | | |
3624 | 1.99k | case B_PIC: |
3625 | 1.99k | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_B_FRAME; |
3626 | 1.99k | break; |
3627 | | |
3628 | 5.25k | case D_PIC: |
3629 | 5.25k | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_I_FRAME; |
3630 | 5.25k | break; |
3631 | | |
3632 | 0 | default : |
3633 | 0 | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_FRAMETYPE_DEFAULT; |
3634 | 0 | break; |
3635 | 13.0k | } |
3636 | 13.0k | } |
3637 | 9.70k | else |
3638 | 9.70k | { |
3639 | 9.70k | ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 0; |
3640 | 9.70k | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_NA_FRAME; |
3641 | 9.70k | } |
3642 | | |
3643 | 22.7k | ps_dec_state->u4_num_frames_decoded++; |
3644 | 22.7k | } |
3645 | 34.7k | } |
3646 | 0 | else |
3647 | 0 | { |
3648 | 0 | ps_dec_state->u1_flushcnt++; |
3649 | 0 | } |
3650 | 35.6k | } |
3651 | 34.7k | if(ps_dec_state->ps_disp_pic) |
3652 | 13.0k | { |
3653 | 13.0k | ps_dec_op->s_ivd_video_decode_op_t.u4_disp_buf_id = ps_dec_state->ps_disp_pic->i4_buf_id; |
3654 | 13.0k | ps_dec_op->s_ivd_video_decode_op_t.u4_ts = ps_dec_state->ps_disp_pic->u4_ts; |
3655 | | |
3656 | 13.0k | if(0 == ps_dec_state->u4_share_disp_buf) |
3657 | 13.0k | { |
3658 | 13.0k | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->ps_disp_pic->i4_buf_id, BUF_MGR_DISP); |
3659 | 13.0k | } |
3660 | 13.0k | } |
3661 | | |
3662 | 34.7k | if(ps_dec_state->u4_deinterlace) |
3663 | 34.7k | { |
3664 | 34.7k | if(ps_dec_state->ps_deint_pic) |
3665 | 12.2k | { |
3666 | 12.2k | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, |
3667 | 12.2k | ps_dec_state->ps_deint_pic->i4_buf_id, |
3668 | 12.2k | MPEG2_BUF_MGR_DEINT); |
3669 | 12.2k | } |
3670 | 34.7k | ps_dec_state->ps_deint_pic = ps_dec_state->ps_disp_pic; |
3671 | 34.7k | } |
3672 | | |
3673 | 34.7k | if(1 == ps_dec_op->s_ivd_video_decode_op_t.u4_output_present) |
3674 | 13.0k | { |
3675 | 13.0k | INSERT_LOGO(ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0], |
3676 | 13.0k | ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1], |
3677 | 13.0k | ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2], |
3678 | 13.0k | ps_dec_state->u4_frm_buf_stride, |
3679 | 13.0k | ps_dec_state->u2_horizontal_size, |
3680 | 13.0k | ps_dec_state->u2_vertical_size, |
3681 | 13.0k | ps_dec_state->i4_chromaFormat, |
3682 | 13.0k | ps_dec_state->u2_horizontal_size, |
3683 | 13.0k | ps_dec_state->u2_vertical_size); |
3684 | 13.0k | } |
3685 | | |
3686 | 34.7k | } |
3687 | | |
3688 | 52.6k | ps_dec_op->s_ivd_video_decode_op_t.u4_progressive_frame_flag = 1; |
3689 | 52.6k | ps_dec_op->s_ivd_video_decode_op_t.e4_fld_type = ps_dec_state->s_disp_op.e4_fld_type; |
3690 | | |
3691 | | |
3692 | 52.6k | if(ps_dec_op->s_ivd_video_decode_op_t.u4_error_code) |
3693 | 23.4k | return IV_FAIL; |
3694 | 29.1k | else |
3695 | 29.1k | return IV_SUCCESS; |
3696 | 52.6k | } |