/src/libmpeg2/decoder/impeg2d_api_main.c
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1 | | /****************************************************************************** |
2 | | * |
3 | | * Copyright (C) 2015 The Android Open Source Project |
4 | | * |
5 | | * Licensed under the Apache License, Version 2.0 (the "License"); |
6 | | * you may not use this file except in compliance with the License. |
7 | | * You may obtain a copy of the License at: |
8 | | * |
9 | | * http://www.apache.org/licenses/LICENSE-2.0 |
10 | | * |
11 | | * Unless required by applicable law or agreed to in writing, software |
12 | | * distributed under the License is distributed on an "AS IS" BASIS, |
13 | | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
14 | | * See the License for the specific language governing permissions and |
15 | | * limitations under the License. |
16 | | * |
17 | | ***************************************************************************** |
18 | | * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore |
19 | | */ |
20 | | /*****************************************************************************/ |
21 | | /* */ |
22 | | /* File Name : decoder_api_main.c */ |
23 | | /* */ |
24 | | /* Description : Functions which recieve the API call from user */ |
25 | | /* */ |
26 | | /* List of Functions : <List the functions defined in this file> */ |
27 | | /* */ |
28 | | /* Issues / Problems : None */ |
29 | | /* */ |
30 | | /* Revision History : */ |
31 | | /* */ |
32 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
33 | | /* 30 05 2007 Rajneesh Creation */ |
34 | | /* */ |
35 | | /*****************************************************************************/ |
36 | | |
37 | | /*****************************************************************************/ |
38 | | /* File Includes */ |
39 | | /*****************************************************************************/ |
40 | | |
41 | | /* System include files */ |
42 | | #include <stdio.h> |
43 | | #include <stdlib.h> |
44 | | #include <stddef.h> |
45 | | #include <string.h> |
46 | | |
47 | | /* User include files */ |
48 | | #include "iv_datatypedef.h" |
49 | | #include "iv.h" |
50 | | #include "ivd.h" |
51 | | #include "ithread.h" |
52 | | |
53 | | #include "impeg2_job_queue.h" |
54 | | #include "impeg2_macros.h" |
55 | | #include "impeg2_buf_mgr.h" |
56 | | #include "impeg2_disp_mgr.h" |
57 | | #include "impeg2_defs.h" |
58 | | #include "impeg2_platform_macros.h" |
59 | | #include "impeg2_inter_pred.h" |
60 | | #include "impeg2_idct.h" |
61 | | #include "impeg2_format_conv.h" |
62 | | |
63 | | #include "impeg2d.h" |
64 | | #include "impeg2d_api.h" |
65 | | #include "impeg2d_bitstream.h" |
66 | | #include "impeg2d_debug.h" |
67 | | #include "impeg2d_structs.h" |
68 | | #include "impeg2d_mc.h" |
69 | | #include "impeg2d_pic_proc.h" |
70 | | #include "impeg2d_deinterlace.h" |
71 | | |
72 | | #define NUM_FRAMES_LIMIT_ENABLED 0 |
73 | | |
74 | | #ifdef LOGO_EN |
75 | | #include "impeg2_ittiam_logo.h" |
76 | | #define INSERT_LOGO(buf_y, buf_u, buf_v, stride, x_pos, y_pos, yuv_fmt,disp_wd,disp_ht) impeg2_insert_logo(buf_y, buf_u, buf_v, stride, x_pos, y_pos, yuv_fmt,disp_wd,disp_ht); |
77 | | #else |
78 | | #define INSERT_LOGO(buf_y, buf_u, buf_v, stride, x_pos, y_pos, yuv_fmt,disp_wd,disp_ht) |
79 | | #endif |
80 | | |
81 | | #if NUM_FRAMES_LIMIT_ENABLED |
82 | | #define NUM_FRAMES_LIMIT 10000 |
83 | | #else |
84 | 61.9k | #define NUM_FRAMES_LIMIT 0x7FFFFFFF |
85 | | #endif |
86 | | |
87 | | #define CODEC_NAME "MPEG2VDEC" |
88 | | #define CODEC_RELEASE_TYPE "eval" |
89 | | #define CODEC_RELEASE_VER "01.00" |
90 | | #define CODEC_VENDOR "ITTIAM" |
91 | | |
92 | | #ifdef ANDROID |
93 | | #define VERSION(version_string, codec_name, codec_release_type, codec_release_ver, codec_vendor) \ |
94 | | strcpy(version_string,"@(#)Id:"); \ |
95 | | strcat(version_string,codec_name); \ |
96 | | strcat(version_string,"_"); \ |
97 | | strcat(version_string,codec_release_type); \ |
98 | | strcat(version_string," Ver:"); \ |
99 | | strcat(version_string,codec_release_ver); \ |
100 | | strcat(version_string," Released by "); \ |
101 | | strcat(version_string,codec_vendor); |
102 | | #else |
103 | | #define VERSION(version_string, codec_name, codec_release_type, codec_release_ver, codec_vendor) \ |
104 | 0 | strcpy(version_string,"@(#)Id:"); \ |
105 | 0 | strcat(version_string,codec_name); \ |
106 | 0 | strcat(version_string,"_"); \ |
107 | 0 | strcat(version_string,codec_release_type); \ |
108 | 0 | strcat(version_string," Ver:"); \ |
109 | 0 | strcat(version_string,codec_release_ver); \ |
110 | 0 | strcat(version_string," Released by "); \ |
111 | 0 | strcat(version_string,codec_vendor); \ |
112 | 0 | strcat(version_string," Build: "); \ |
113 | 0 | strcat(version_string,__DATE__); \ |
114 | 0 | strcat(version_string," @ "); \ |
115 | 0 | strcat(version_string,__TIME__); |
116 | | #endif |
117 | | |
118 | | |
119 | 20.8k | #define MIN_OUT_BUFS_420 3 |
120 | 0 | #define MIN_OUT_BUFS_422ILE 1 |
121 | 0 | #define MIN_OUT_BUFS_RGB565 1 |
122 | 22.8k | #define MIN_OUT_BUFS_420SP 2 |
123 | | |
124 | | |
125 | | void impeg2d_init_arch(void *pv_codec); |
126 | | void impeg2d_init_function_ptr(void *pv_codec); |
127 | | UWORD32 impeg2d_get_outbuf_size(WORD32 pic_wd,UWORD32 pic_ht, WORD32 u1_chroma_format,UWORD32 *p_buf_size); |
128 | | |
129 | | /*****************************************************************************/ |
130 | | /* */ |
131 | | /* Function Name : impeg2d_api_rel_display_frame */ |
132 | | /* */ |
133 | | /* Description : Release displ buffers that will be shared between decoder */ |
134 | | /* and application */ |
135 | | /* Inputs : Error message */ |
136 | | /* Globals : None */ |
137 | | /* Processing : Just prints error message to console */ |
138 | | /* Outputs : Error mesage to the console */ |
139 | | /* Returns : None */ |
140 | | /* */ |
141 | | /* Issues : <List any issues or problems with this function> */ |
142 | | /* */ |
143 | | /* Revision History: */ |
144 | | /* */ |
145 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
146 | | /* 27 05 2006 Sankar Creation */ |
147 | | /* */ |
148 | | /*****************************************************************************/ |
149 | | IV_API_CALL_STATUS_T impeg2d_api_rel_display_frame(iv_obj_t *ps_dechdl, |
150 | | void *pv_api_ip, |
151 | | void *pv_api_op) |
152 | 0 | { |
153 | |
|
154 | 0 | ivd_rel_display_frame_ip_t *dec_rel_disp_ip; |
155 | 0 | ivd_rel_display_frame_op_t *dec_rel_disp_op; |
156 | |
|
157 | 0 | dec_state_t *ps_dec_state; |
158 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
159 | | |
160 | |
|
161 | 0 | dec_rel_disp_ip = (ivd_rel_display_frame_ip_t *)pv_api_ip; |
162 | 0 | dec_rel_disp_op = (ivd_rel_display_frame_op_t *)pv_api_op; |
163 | |
|
164 | 0 | dec_rel_disp_op->u4_error_code = 0; |
165 | 0 | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
166 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
167 | | |
168 | | |
169 | | /* If not in shared disp buf mode, return */ |
170 | 0 | if(0 == ps_dec_state->u4_share_disp_buf) |
171 | 0 | return IV_SUCCESS; |
172 | | |
173 | 0 | if(NULL == ps_dec_state->pv_pic_buf_mg) |
174 | 0 | return IV_SUCCESS; |
175 | | |
176 | | |
177 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, dec_rel_disp_ip->u4_disp_buf_id, BUF_MGR_DISP); |
178 | |
|
179 | 0 | return IV_SUCCESS; |
180 | 0 | } |
181 | | |
182 | | /*****************************************************************************/ |
183 | | /* */ |
184 | | /* Function Name : impeg2d_api_set_display_frame */ |
185 | | /* */ |
186 | | /* Description : Sets display buffers that will be shared between decoder */ |
187 | | /* and application */ |
188 | | /* Inputs : Error message */ |
189 | | /* Globals : None */ |
190 | | /* Processing : Just prints error message to console */ |
191 | | /* Outputs : Error mesage to the console */ |
192 | | /* Returns : None */ |
193 | | /* */ |
194 | | /* Issues : <List any issues or problems with this function> */ |
195 | | /* */ |
196 | | /* Revision History: */ |
197 | | /* */ |
198 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
199 | | /* 27 05 2006 Sankar Creation */ |
200 | | /* */ |
201 | | /*****************************************************************************/ |
202 | | IV_API_CALL_STATUS_T impeg2d_api_set_display_frame(iv_obj_t *ps_dechdl, |
203 | | void *pv_api_ip, |
204 | | void *pv_api_op) |
205 | 0 | { |
206 | |
|
207 | 0 | ivd_set_display_frame_ip_t *dec_disp_ip; |
208 | 0 | ivd_set_display_frame_op_t *dec_disp_op; |
209 | |
|
210 | 0 | UWORD32 i; |
211 | 0 | dec_state_t *ps_dec_state; |
212 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
213 | 0 | UWORD32 u4_num_disp_bufs; |
214 | 0 | UWORD32 u4_disp_buf_size[3]; |
215 | 0 | UWORD32 num_bufs; |
216 | | |
217 | |
|
218 | 0 | dec_disp_ip = (ivd_set_display_frame_ip_t *)pv_api_ip; |
219 | 0 | dec_disp_op = (ivd_set_display_frame_op_t *)pv_api_op; |
220 | 0 | dec_disp_op->u4_error_code = 0; |
221 | |
|
222 | 0 | u4_num_disp_bufs = dec_disp_ip->num_disp_bufs; |
223 | 0 | if(u4_num_disp_bufs > BUF_MGR_MAX_CNT) |
224 | 0 | u4_num_disp_bufs = BUF_MGR_MAX_CNT; |
225 | |
|
226 | 0 | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
227 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
228 | |
|
229 | 0 | num_bufs = dec_disp_ip->s_disp_buffer[0].u4_num_bufs; |
230 | |
|
231 | 0 | if(ps_dec_state->u4_share_disp_buf) |
232 | 0 | { |
233 | 0 | pic_buf_t *ps_pic_buf; |
234 | 0 | ps_pic_buf = (pic_buf_t *)ps_dec_state->pv_pic_buf_base; |
235 | | |
236 | | /* Get the sizes of the first buffer structure. Compare this with the |
237 | | * rest to make sure all the buffers are of the same size. |
238 | | */ |
239 | 0 | u4_disp_buf_size[0] = |
240 | 0 | dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[0]; |
241 | 0 | u4_disp_buf_size[1] = |
242 | 0 | dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[1]; |
243 | 0 | u4_disp_buf_size[2] = |
244 | 0 | dec_disp_ip->s_disp_buffer[0].u4_min_out_buf_size[2]; |
245 | 0 | for(i = 0; i < u4_num_disp_bufs; i++) |
246 | 0 | { |
247 | | /* Verify all buffer structures have the same sized buffers as the |
248 | | * first buffer structure*/ |
249 | 0 | if ((dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[0] |
250 | 0 | != u4_disp_buf_size[0]) |
251 | 0 | || (dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[1] |
252 | 0 | != u4_disp_buf_size[1]) |
253 | 0 | || (dec_disp_ip->s_disp_buffer[i].u4_min_out_buf_size[2] |
254 | 0 | != u4_disp_buf_size[2])) |
255 | 0 | { |
256 | 0 | return IV_FAIL; |
257 | 0 | } |
258 | | /* Verify all buffer structures have the same number of |
259 | | * buffers (e.g. y, u, v) */ |
260 | 0 | if (dec_disp_ip->s_disp_buffer[i].u4_num_bufs != num_bufs) |
261 | 0 | { |
262 | 0 | return IV_FAIL; |
263 | 0 | } |
264 | | |
265 | 0 | ps_pic_buf->pu1_y = dec_disp_ip->s_disp_buffer[i].pu1_bufs[0]; |
266 | 0 | if(IV_YUV_420P == ps_dec_state->i4_chromaFormat) |
267 | 0 | { |
268 | 0 | ps_pic_buf->pu1_u = dec_disp_ip->s_disp_buffer[i].pu1_bufs[1]; |
269 | 0 | ps_pic_buf->pu1_v = dec_disp_ip->s_disp_buffer[i].pu1_bufs[2]; |
270 | 0 | } |
271 | 0 | else |
272 | 0 | { |
273 | 0 | ps_pic_buf->pu1_u = ps_dec_state->pu1_chroma_ref_buf[i]; |
274 | 0 | ps_pic_buf->pu1_v = ps_dec_state->pu1_chroma_ref_buf[i] + |
275 | 0 | ((ps_dec_state->u2_create_max_width * ps_dec_state->u2_create_max_height) >> 2); |
276 | 0 | } |
277 | |
|
278 | 0 | ps_pic_buf->i4_buf_id = i; |
279 | |
|
280 | 0 | ps_pic_buf->u1_used_as_ref = 0; |
281 | |
|
282 | 0 | ps_pic_buf->u4_ts = 0; |
283 | |
|
284 | 0 | impeg2_buf_mgr_add(ps_dec_state->pv_pic_buf_mg, ps_pic_buf, i); |
285 | 0 | impeg2_buf_mgr_set_status(ps_dec_state->pv_pic_buf_mg, i, BUF_MGR_DISP); |
286 | 0 | ps_pic_buf++; |
287 | |
|
288 | 0 | } |
289 | 0 | } |
290 | 0 | memcpy(&(ps_dec_state->as_disp_buffers[0]), |
291 | 0 | &(dec_disp_ip->s_disp_buffer), |
292 | 0 | u4_num_disp_bufs * sizeof(ivd_out_bufdesc_t)); |
293 | |
|
294 | 0 | return IV_SUCCESS; |
295 | |
|
296 | 0 | } |
297 | | |
298 | | IV_API_CALL_STATUS_T impeg2d_api_set_num_cores(iv_obj_t *ps_dechdl, |
299 | | void *pv_api_ip, |
300 | | void *pv_api_op) |
301 | 5.88k | { |
302 | 5.88k | impeg2d_ctl_set_num_cores_ip_t *ps_ip; |
303 | 5.88k | impeg2d_ctl_set_num_cores_op_t *ps_op; |
304 | 5.88k | dec_state_t *ps_dec_state; |
305 | 5.88k | dec_state_multi_core_t *ps_dec_state_multi_core; |
306 | | |
307 | 5.88k | ps_ip = (impeg2d_ctl_set_num_cores_ip_t *)pv_api_ip; |
308 | 5.88k | ps_op = (impeg2d_ctl_set_num_cores_op_t *)pv_api_op; |
309 | | |
310 | 5.88k | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
311 | 5.88k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
312 | | |
313 | 5.88k | if(ps_ip->u4_num_cores > 0) |
314 | 5.88k | { |
315 | | |
316 | | |
317 | 5.88k | WORD32 i; |
318 | 29.4k | for(i = 0; i < MAX_THREADS; i++) |
319 | 23.5k | ps_dec_state_multi_core->ps_dec_state[i]->i4_num_cores = ps_ip->u4_num_cores; |
320 | 5.88k | } |
321 | 0 | else |
322 | 0 | { |
323 | 0 | ps_dec_state->i4_num_cores = 1; |
324 | 0 | } |
325 | 5.88k | ps_op->u4_error_code = IV_SUCCESS; |
326 | | |
327 | 5.88k | return IV_SUCCESS; |
328 | 5.88k | } |
329 | | |
330 | | IV_API_CALL_STATUS_T impeg2d_api_get_seq_info(iv_obj_t *ps_dechdl, |
331 | | void *pv_api_ip, |
332 | | void *pv_api_op) |
333 | 0 | { |
334 | 0 | impeg2d_ctl_get_seq_info_ip_t *ps_ip; |
335 | 0 | impeg2d_ctl_get_seq_info_op_t *ps_op; |
336 | 0 | dec_state_t *ps_codec; |
337 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
338 | |
|
339 | 0 | ps_ip = (impeg2d_ctl_get_seq_info_ip_t *)pv_api_ip; |
340 | 0 | ps_op = (impeg2d_ctl_get_seq_info_op_t *)pv_api_op; |
341 | |
|
342 | 0 | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
343 | 0 | ps_codec = ps_dec_state_multi_core->ps_dec_state[0]; |
344 | 0 | UNUSED(ps_ip); |
345 | 0 | if(ps_codec->u2_header_done == 1) |
346 | 0 | { |
347 | 0 | ps_op->u1_aspect_ratio_information = ps_codec->u2_aspect_ratio_info; |
348 | 0 | ps_op->u1_frame_rate_code = ps_codec->u2_frame_rate_code; |
349 | 0 | ps_op->u1_frame_rate_extension_n = ps_codec->u2_frame_rate_extension_n; |
350 | 0 | ps_op->u1_frame_rate_extension_d = ps_codec->u2_frame_rate_extension_d; |
351 | 0 | if(ps_codec->u1_seq_disp_extn_present == 1) |
352 | 0 | { |
353 | 0 | ps_op->u1_video_format = ps_codec->u1_video_format; |
354 | 0 | ps_op->u1_colour_primaries = ps_codec->u1_colour_primaries; |
355 | 0 | ps_op->u1_transfer_characteristics = ps_codec->u1_transfer_characteristics; |
356 | 0 | ps_op->u1_matrix_coefficients = ps_codec->u1_matrix_coefficients; |
357 | 0 | ps_op->u2_display_horizontal_size = ps_codec->u2_display_horizontal_size; |
358 | 0 | ps_op->u2_display_vertical_size = ps_codec->u2_display_vertical_size; |
359 | 0 | } |
360 | 0 | else |
361 | 0 | { |
362 | 0 | ps_op->u1_video_format = 5; |
363 | 0 | ps_op->u1_colour_primaries = 2; |
364 | 0 | ps_op->u1_transfer_characteristics = 2; |
365 | 0 | ps_op->u1_matrix_coefficients = 2; |
366 | 0 | ps_op->u2_display_horizontal_size = ps_codec->u2_horizontal_size; |
367 | 0 | ps_op->u2_display_vertical_size = ps_codec->u2_vertical_size; |
368 | 0 | } |
369 | 0 | ps_op->u4_error_code = IV_SUCCESS; |
370 | 0 | return IV_SUCCESS; |
371 | 0 | } |
372 | 0 | else |
373 | 0 | { |
374 | 0 | ps_op->u4_error_code = IV_FAIL; |
375 | 0 | return IV_FAIL; |
376 | 0 | } |
377 | 0 | } |
378 | | |
379 | | /** |
380 | | ******************************************************************************* |
381 | | * |
382 | | * @brief |
383 | | * Sets Processor type |
384 | | * |
385 | | * @par Description: |
386 | | * Sets Processor type |
387 | | * |
388 | | * @param[in] ps_codec_obj |
389 | | * Pointer to codec object at API level |
390 | | * |
391 | | * @param[in] pv_api_ip |
392 | | * Pointer to input argument structure |
393 | | * |
394 | | * @param[out] pv_api_op |
395 | | * Pointer to output argument structure |
396 | | * |
397 | | * @returns Status |
398 | | * |
399 | | * @remarks |
400 | | * |
401 | | * |
402 | | ******************************************************************************* |
403 | | */ |
404 | | |
405 | | IV_API_CALL_STATUS_T impeg2d_set_processor(iv_obj_t *ps_codec_obj, |
406 | | void *pv_api_ip, |
407 | | void *pv_api_op) |
408 | 5.88k | { |
409 | 5.88k | impeg2d_ctl_set_processor_ip_t *ps_ip; |
410 | 5.88k | impeg2d_ctl_set_processor_op_t *ps_op; |
411 | 5.88k | dec_state_t *ps_codec; |
412 | 5.88k | dec_state_multi_core_t *ps_dec_state_multi_core; |
413 | | |
414 | 5.88k | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_codec_obj->pv_codec_handle); |
415 | 5.88k | ps_codec = ps_dec_state_multi_core->ps_dec_state[0]; |
416 | | |
417 | 5.88k | ps_ip = (impeg2d_ctl_set_processor_ip_t *)pv_api_ip; |
418 | 5.88k | ps_op = (impeg2d_ctl_set_processor_op_t *)pv_api_op; |
419 | | |
420 | 5.88k | ps_codec->e_processor_arch = (IVD_ARCH_T)ps_ip->u4_arch; |
421 | 5.88k | ps_codec->e_processor_soc = (IVD_SOC_T)ps_ip->u4_soc; |
422 | | |
423 | 5.88k | impeg2d_init_function_ptr(ps_codec); |
424 | | |
425 | | |
426 | 5.88k | ps_op->u4_error_code = 0; |
427 | 5.88k | return IV_SUCCESS; |
428 | 5.88k | } |
429 | | /*****************************************************************************/ |
430 | | /* */ |
431 | | /* Function Name : impeg2d_fill_mem_rec */ |
432 | | /* */ |
433 | | /* Description : */ |
434 | | /* Inputs : */ |
435 | | /* Globals : */ |
436 | | /* Processing : */ |
437 | | /* Outputs : */ |
438 | | /* Returns : */ |
439 | | /* */ |
440 | | /* Issues : */ |
441 | | /* */ |
442 | | /* Revision History: */ |
443 | | /* */ |
444 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
445 | | /* 17 09 2007 Rajendra C Y Draft */ |
446 | | /* */ |
447 | | /*****************************************************************************/ |
448 | | void impeg2d_fill_mem_rec(impeg2d_fill_mem_rec_ip_t *ps_ip, |
449 | | impeg2d_fill_mem_rec_op_t *ps_op) |
450 | 11.7k | { |
451 | 11.7k | UWORD32 u4_i; |
452 | | |
453 | 11.7k | UWORD8 u1_no_rec = 0; |
454 | 11.7k | UWORD32 max_frm_width,max_frm_height,max_frm_size; |
455 | 11.7k | iv_mem_rec_t *ps_mem_rec = ps_ip->s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location; |
456 | 11.7k | WORD32 i4_num_threads; |
457 | 11.7k | WORD32 i4_share_disp_buf, i4_chroma_format; |
458 | 11.7k | WORD32 i4_chroma_size; |
459 | 11.7k | UWORD32 u4_deinterlace; |
460 | 11.7k | UNUSED(u4_deinterlace); |
461 | 11.7k | max_frm_width = ALIGN16(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd); |
462 | | /* In error clips with field prediction, the mv may incorrectly refer to |
463 | | * the last MB row, causing an out of bounds read access. Allocating 8 extra |
464 | | * rows to handle this. Adding another extra row to handle half_y prediction. |
465 | | */ |
466 | 11.7k | max_frm_height = ALIGN32(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht) + 9; |
467 | | |
468 | 11.7k | max_frm_size = (max_frm_width * max_frm_height * 3) >> 1;/* 420 P */ |
469 | | |
470 | 11.7k | i4_chroma_size = max_frm_width * max_frm_height / 4; |
471 | | |
472 | 11.7k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size > offsetof(impeg2d_fill_mem_rec_ip_t, u4_share_disp_buf)) |
473 | 11.7k | { |
474 | 11.7k | #ifndef LOGO_EN |
475 | 11.7k | i4_share_disp_buf = ps_ip->u4_share_disp_buf; |
476 | | #else |
477 | | i4_share_disp_buf = 0; |
478 | | #endif |
479 | 11.7k | } |
480 | 0 | else |
481 | 0 | { |
482 | 0 | i4_share_disp_buf = 0; |
483 | 0 | } |
484 | 11.7k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size > offsetof(impeg2d_fill_mem_rec_ip_t, e_output_format)) |
485 | 11.7k | { |
486 | 11.7k | i4_chroma_format = ps_ip->e_output_format; |
487 | 11.7k | } |
488 | 0 | else |
489 | 0 | { |
490 | 0 | i4_chroma_format = -1; |
491 | 0 | } |
492 | | |
493 | 11.7k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size > offsetof(impeg2d_fill_mem_rec_ip_t, u4_deinterlace)) |
494 | 11.7k | { |
495 | 11.7k | u4_deinterlace = ps_ip->u4_deinterlace; |
496 | 11.7k | } |
497 | 0 | else |
498 | 0 | { |
499 | 0 | u4_deinterlace = 0; |
500 | 0 | } |
501 | | |
502 | | |
503 | 11.7k | if( (i4_chroma_format != IV_YUV_420P) && |
504 | 6.54k | (i4_chroma_format != IV_YUV_420SP_UV) && |
505 | 3.32k | (i4_chroma_format != IV_YUV_420SP_VU)) |
506 | 0 | { |
507 | 0 | i4_share_disp_buf = 0; |
508 | 0 | } |
509 | | |
510 | | /* Disable deinterlacer in shared mode */ |
511 | 11.7k | if(i4_share_disp_buf) |
512 | 0 | { |
513 | 0 | u4_deinterlace = 0; |
514 | 0 | } |
515 | | |
516 | | /*************************************************************************/ |
517 | | /* Fill the memory requirement XDM Handle */ |
518 | | /*************************************************************************/ |
519 | | /* ! */ |
520 | 11.7k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
521 | 11.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
522 | 11.7k | ps_mem_rec->u4_mem_size = sizeof(iv_obj_t); |
523 | | |
524 | 11.7k | ps_mem_rec++; |
525 | 11.7k | u1_no_rec++; |
526 | | |
527 | 11.7k | { |
528 | | /*************************************************************************/ |
529 | | /* Fill the memory requirement for threads context */ |
530 | | /*************************************************************************/ |
531 | | /* ! */ |
532 | 11.7k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
533 | 11.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
534 | 11.7k | ps_mem_rec->u4_mem_size = sizeof(dec_state_multi_core_t); |
535 | | |
536 | 11.7k | ps_mem_rec++; |
537 | 11.7k | u1_no_rec++; |
538 | 11.7k | } |
539 | | |
540 | 58.8k | for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++) |
541 | 47.0k | { |
542 | | /*************************************************************************/ |
543 | | /* Fill the memory requirement for MPEG2 Decoder Context */ |
544 | | /*************************************************************************/ |
545 | | /* ! */ |
546 | 47.0k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
547 | 47.0k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
548 | 47.0k | ps_mem_rec->u4_mem_size = sizeof(dec_state_t); |
549 | | |
550 | 47.0k | ps_mem_rec++; |
551 | 47.0k | u1_no_rec++; |
552 | | |
553 | | /* To store thread handle */ |
554 | 47.0k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
555 | 47.0k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
556 | 47.0k | ps_mem_rec->u4_mem_size = ithread_get_handle_size(); |
557 | | |
558 | 47.0k | ps_mem_rec++; |
559 | 47.0k | u1_no_rec++; |
560 | | |
561 | | /* To store start/done mutex */ |
562 | 47.0k | ps_mem_rec->u4_mem_alignment = 8 /* 8 byte alignment*/; |
563 | 47.0k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
564 | | /* Request memory to hold mutex (start/done) */ |
565 | 47.0k | WORD32 size = 2 * ithread_get_mutex_lock_size(); |
566 | 47.0k | ps_mem_rec->u4_mem_size = size; |
567 | | |
568 | 47.0k | ps_mem_rec++; |
569 | 47.0k | u1_no_rec++; |
570 | | |
571 | | /* To store start/done condition variables */ |
572 | 47.0k | ps_mem_rec->u4_mem_alignment = 8 /* 8 byte alignment*/; |
573 | 47.0k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
574 | | /* Request memory to hold condition variables */ |
575 | 47.0k | size = 2 * ithread_get_cond_struct_size(); |
576 | 47.0k | ps_mem_rec->u4_mem_size = size; |
577 | | |
578 | 47.0k | ps_mem_rec++; |
579 | 47.0k | u1_no_rec++; |
580 | | |
581 | | /*************************************************************************/ |
582 | | /* Fill the memory requirement for Motion Compensation Buffers */ |
583 | | /*************************************************************************/ |
584 | 47.0k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
585 | 47.0k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_SCRATCH_MEM; |
586 | | |
587 | | /* for mc_fw_buf.pu1_y */ |
588 | 47.0k | ps_mem_rec->u4_mem_size = MB_LUMA_MEM_SIZE; |
589 | | |
590 | | /* for mc_fw_buf.pu1_u */ |
591 | 47.0k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
592 | | |
593 | | /* for mc_fw_buf.pu1_v */ |
594 | 47.0k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
595 | | |
596 | | /* for mc_bk_buf.pu1_y */ |
597 | 47.0k | ps_mem_rec->u4_mem_size += MB_LUMA_MEM_SIZE; |
598 | | |
599 | | /* for mc_bk_buf.pu1_u */ |
600 | 47.0k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
601 | | |
602 | | /* for mc_bk_buf.pu1_v */ |
603 | 47.0k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
604 | | |
605 | | /* for mc_buf.pu1_y */ |
606 | 47.0k | ps_mem_rec->u4_mem_size += MB_LUMA_MEM_SIZE; |
607 | | |
608 | | /* for mc_buf.pu1_u */ |
609 | 47.0k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
610 | | |
611 | | /* for mc_buf.pu1_v */ |
612 | 47.0k | ps_mem_rec->u4_mem_size += MB_CHROMA_MEM_SIZE; |
613 | | |
614 | 47.0k | ps_mem_rec++; |
615 | 47.0k | u1_no_rec++; |
616 | | |
617 | | |
618 | | /*************************************************************************/ |
619 | | /* Fill the memory requirement Stack Context */ |
620 | | /*************************************************************************/ |
621 | | /* ! */ |
622 | 47.0k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
623 | 47.0k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
624 | 47.0k | ps_mem_rec->u4_mem_size = 392; |
625 | | |
626 | 47.0k | ps_mem_rec++; |
627 | 47.0k | u1_no_rec++; |
628 | 47.0k | } |
629 | | |
630 | | |
631 | | |
632 | 11.7k | { |
633 | | /*************************************************************************/ |
634 | | /* Fill the memory requirement for Picture Buffer Manager */ |
635 | | /*************************************************************************/ |
636 | | /* ! */ |
637 | 11.7k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
638 | 11.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
639 | 11.7k | ps_mem_rec->u4_mem_size = sizeof(buf_mgr_t) + sizeof(pic_buf_t) * BUF_MGR_MAX_CNT; |
640 | | |
641 | 11.7k | ps_mem_rec++; |
642 | 11.7k | u1_no_rec++; |
643 | 11.7k | } |
644 | | /*************************************************************************/ |
645 | | /* Internal Frame Buffers */ |
646 | | /*************************************************************************/ |
647 | | /* ! */ |
648 | | |
649 | 11.7k | { |
650 | 70.6k | for(u4_i = 0; u4_i < NUM_INT_FRAME_BUFFERS; u4_i++) |
651 | 58.8k | { |
652 | | /* ! */ |
653 | 58.8k | ps_mem_rec->u4_mem_alignment = 128 /* 128 byte alignment*/; |
654 | 58.8k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
655 | 58.8k | if(0 == i4_share_disp_buf) |
656 | 58.8k | ps_mem_rec->u4_mem_size = max_frm_size; |
657 | 0 | else if(IV_YUV_420P != i4_chroma_format) |
658 | 0 | { |
659 | | /* If color format is not 420P and it is shared, then allocate for chroma */ |
660 | 0 | ps_mem_rec->u4_mem_size = i4_chroma_size * 2; |
661 | 0 | } |
662 | 0 | else |
663 | 0 | ps_mem_rec->u4_mem_size = 64; |
664 | 58.8k | ps_mem_rec++; |
665 | 58.8k | u1_no_rec++; |
666 | 58.8k | } |
667 | 11.7k | } |
668 | | |
669 | 11.7k | ps_mem_rec->u4_mem_alignment = 128; |
670 | 11.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
671 | 11.7k | ps_mem_rec->u4_mem_size = MAX_BITSTREAM_BUFFER_SIZE + MIN_BUFFER_BYTES_AT_EOS; |
672 | 11.7k | ps_mem_rec++; |
673 | 11.7k | u1_no_rec++; |
674 | | |
675 | 11.7k | { |
676 | 11.7k | WORD32 i4_job_queue_size; |
677 | 11.7k | WORD32 i4_num_jobs; |
678 | | |
679 | | /* One job per row of MBs */ |
680 | 11.7k | i4_num_jobs = max_frm_height >> 4; |
681 | | |
682 | | /* One format convert/frame copy job per row of MBs for non-shared mode*/ |
683 | 11.7k | i4_num_jobs += max_frm_height >> 4; |
684 | | |
685 | | |
686 | 11.7k | i4_job_queue_size = impeg2_jobq_ctxt_size(); |
687 | 11.7k | i4_job_queue_size += i4_num_jobs * sizeof(job_t); |
688 | 11.7k | ps_mem_rec->u4_mem_size = i4_job_queue_size; |
689 | 11.7k | ps_mem_rec->u4_mem_alignment = 128; |
690 | 11.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
691 | | |
692 | 11.7k | ps_mem_rec++; |
693 | 11.7k | u1_no_rec++; |
694 | | |
695 | 11.7k | } |
696 | | |
697 | 11.7k | ps_mem_rec->u4_mem_alignment = 128; |
698 | 11.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
699 | 11.7k | ps_mem_rec->u4_mem_size = impeg2d_deint_ctxt_size(); |
700 | 11.7k | ps_mem_rec++; |
701 | 11.7k | u1_no_rec++; |
702 | | |
703 | 11.7k | ps_mem_rec->u4_mem_alignment = 128; |
704 | 11.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
705 | | |
706 | 11.7k | if(IV_YUV_420P != i4_chroma_format) |
707 | 6.54k | ps_mem_rec->u4_mem_size = max_frm_size; |
708 | 5.22k | else |
709 | 5.22k | ps_mem_rec->u4_mem_size = 64; |
710 | | |
711 | 11.7k | ps_mem_rec++; |
712 | 11.7k | u1_no_rec++; |
713 | | |
714 | 11.7k | ps_mem_rec->u4_mem_alignment = 128; |
715 | 11.7k | ps_mem_rec->e_mem_type = IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM; |
716 | 11.7k | ps_mem_rec->u4_mem_size = sizeof(iv_mem_rec_t) * (NUM_MEM_RECORDS); |
717 | 11.7k | ps_mem_rec++; |
718 | 11.7k | u1_no_rec++; |
719 | | |
720 | 11.7k | ps_op->s_ivd_fill_mem_rec_op_t.u4_num_mem_rec_filled = u1_no_rec; |
721 | 11.7k | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code = 0; |
722 | 11.7k | } |
723 | | |
724 | | |
725 | | /*****************************************************************************/ |
726 | | /* */ |
727 | | /* Function Name : impeg2d_api_get_version */ |
728 | | /* */ |
729 | | /* Description : */ |
730 | | /* */ |
731 | | /* Inputs : */ |
732 | | /* Globals : <Does it use any global variables?> */ |
733 | | /* Outputs : */ |
734 | | /* Returns : void */ |
735 | | /* */ |
736 | | /* Issues : none */ |
737 | | /* */ |
738 | | /* Revision History: */ |
739 | | /* */ |
740 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
741 | | /* 22 10 2008 100356 Draft */ |
742 | | /* */ |
743 | | /*****************************************************************************/ |
744 | | IV_API_CALL_STATUS_T impeg2d_api_get_version(iv_obj_t *ps_dechdl, |
745 | | void *pv_api_ip, |
746 | | void *pv_api_op) |
747 | 0 | { |
748 | 0 | char au1_version_string[512]; |
749 | |
|
750 | 0 | impeg2d_ctl_getversioninfo_ip_t *ps_ip; |
751 | 0 | impeg2d_ctl_getversioninfo_op_t *ps_op; |
752 | |
|
753 | 0 | UNUSED(ps_dechdl); |
754 | |
|
755 | 0 | ps_ip = (impeg2d_ctl_getversioninfo_ip_t *)pv_api_ip; |
756 | 0 | ps_op = (impeg2d_ctl_getversioninfo_op_t *)pv_api_op; |
757 | |
|
758 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_SUCCESS; |
759 | |
|
760 | 0 | VERSION(au1_version_string, CODEC_NAME, CODEC_RELEASE_TYPE, CODEC_RELEASE_VER, |
761 | 0 | CODEC_VENDOR); |
762 | |
|
763 | 0 | if((WORD32)ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_version_buffer_size <= 0) |
764 | 0 | { |
765 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_FAIL; |
766 | 0 | return (IV_FAIL); |
767 | 0 | } |
768 | | |
769 | 0 | if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_version_buffer_size |
770 | 0 | >= (strlen(au1_version_string) + 1)) |
771 | 0 | { |
772 | 0 | memcpy(ps_ip->s_ivd_ctl_getversioninfo_ip_t.pv_version_buffer, |
773 | 0 | au1_version_string, (strlen(au1_version_string) + 1)); |
774 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_SUCCESS; |
775 | 0 | } |
776 | 0 | else |
777 | 0 | { |
778 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = IV_FAIL; |
779 | 0 | } |
780 | |
|
781 | 0 | return (IV_SUCCESS); |
782 | 0 | } |
783 | | |
784 | | WORD32 impeg2d_join_threads(dec_state_multi_core_t *ps_dec_state_multi_core) |
785 | 15.4k | { |
786 | 15.4k | dec_state_t *ps_dec_thd, *ps_dec_state; |
787 | | |
788 | 15.4k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
789 | | |
790 | 15.4k | if(ps_dec_state->i4_threads_active) |
791 | 15.4k | { |
792 | 15.4k | int i; |
793 | 77.3k | for(i = 0; i < MAX_THREADS; i++) |
794 | 61.8k | { |
795 | 61.8k | WORD32 ret; |
796 | 61.8k | ps_dec_thd = ps_dec_state_multi_core->ps_dec_state[i]; |
797 | 61.8k | if(ps_dec_state_multi_core->au4_thread_launched[i]) |
798 | 13.8k | { |
799 | 13.8k | ret = ithread_mutex_lock(ps_dec_thd->pv_proc_start_mutex); |
800 | 13.8k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) return(IV_FAIL); |
801 | | |
802 | | // set process start for the threads waiting on the start condition |
803 | | // in the decode routine so as to break them |
804 | 13.8k | ps_dec_thd->ai4_process_start = 1; |
805 | 13.8k | ps_dec_state_multi_core->i4_break_threads = 1; |
806 | | |
807 | 13.8k | ret = ithread_cond_signal(ps_dec_thd->pv_proc_start_condition); |
808 | 13.8k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) return(IV_FAIL); |
809 | | |
810 | 13.8k | ret = ithread_mutex_unlock(ps_dec_thd->pv_proc_start_mutex); |
811 | 13.8k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) return(IV_FAIL); |
812 | | |
813 | 13.8k | ithread_join(ps_dec_thd->pv_codec_thread_handle, NULL); |
814 | 13.8k | ps_dec_state_multi_core->au4_thread_launched[i] = 0; |
815 | 13.8k | ps_dec_state_multi_core->i4_break_threads = 0; |
816 | 13.8k | } |
817 | 61.8k | } |
818 | 15.4k | } |
819 | | |
820 | 15.4k | return IV_SUCCESS; |
821 | 15.4k | } |
822 | | |
823 | | /*****************************************************************************/ |
824 | | /* */ |
825 | | /* Function Name : impeg2d_api_get_buf_info */ |
826 | | /* */ |
827 | | /* Description : */ |
828 | | /* */ |
829 | | /* Inputs : */ |
830 | | /* Globals : <Does it use any global variables?> */ |
831 | | /* Outputs : */ |
832 | | /* Returns : void */ |
833 | | /* */ |
834 | | /* Issues : none */ |
835 | | /* */ |
836 | | /* Revision History: */ |
837 | | /* */ |
838 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
839 | | /* 22 10 2008 100356 Draft */ |
840 | | /* */ |
841 | | /*****************************************************************************/ |
842 | | IV_API_CALL_STATUS_T impeg2d_api_get_buf_info(iv_obj_t *ps_dechdl, |
843 | | void *pv_api_ip, |
844 | | void *pv_api_op) |
845 | 0 | { |
846 | 0 | dec_state_t *ps_dec_state; |
847 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
848 | 0 | impeg2d_ctl_getbufinfo_ip_t *ps_ctl_bufinfo_ip = |
849 | 0 | (impeg2d_ctl_getbufinfo_ip_t *)pv_api_ip; |
850 | 0 | impeg2d_ctl_getbufinfo_op_t *ps_ctl_bufinfo_op = |
851 | 0 | (impeg2d_ctl_getbufinfo_op_t *)pv_api_op; |
852 | 0 | UWORD32 u4_i, u4_stride, u4_height; |
853 | 0 | UNUSED(ps_ctl_bufinfo_ip); |
854 | |
|
855 | 0 | ps_dec_state_multi_core = |
856 | 0 | (dec_state_multi_core_t *)(ps_dechdl->pv_codec_handle); |
857 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
858 | |
|
859 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_in_bufs = 1; |
860 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_out_bufs = 1; |
861 | |
|
862 | 0 | for(u4_i = 0; u4_i < IVD_VIDDEC_MAX_IO_BUFFERS; u4_i++) |
863 | 0 | { |
864 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_in_buf_size[u4_i] = |
865 | 0 | 0; |
866 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_out_buf_size[u4_i] = |
867 | 0 | 0; |
868 | 0 | } |
869 | |
|
870 | 0 | for(u4_i = 0; |
871 | 0 | u4_i < ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_in_bufs; |
872 | 0 | u4_i++) |
873 | 0 | { |
874 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_in_buf_size[u4_i] = |
875 | 0 | MAX_BITSTREAM_BUFFER_SIZE; |
876 | 0 | } |
877 | |
|
878 | 0 | if (0 == ps_dec_state->u4_frm_buf_stride) |
879 | 0 | { |
880 | 0 | if (1 == ps_dec_state->u2_header_done) |
881 | 0 | { |
882 | 0 | u4_stride = ps_dec_state->u2_horizontal_size; |
883 | 0 | } |
884 | 0 | else |
885 | 0 | { |
886 | 0 | u4_stride = ps_dec_state->u2_create_max_width; |
887 | 0 | } |
888 | 0 | } |
889 | 0 | else |
890 | 0 | { |
891 | 0 | u4_stride = ps_dec_state->u4_frm_buf_stride; |
892 | 0 | } |
893 | 0 | u4_stride = ALIGN16(u4_stride); |
894 | 0 | u4_height = ALIGN32(ps_dec_state->u2_frame_height) + 9; |
895 | |
|
896 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_out_bufs = |
897 | 0 | impeg2d_get_outbuf_size( |
898 | 0 | u4_stride, |
899 | 0 | u4_height, |
900 | 0 | ps_dec_state->i4_chromaFormat, |
901 | 0 | &ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_out_buf_size[0]); |
902 | |
|
903 | 0 | if (0 == ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_min_num_out_bufs) |
904 | 0 | { |
905 | | //Invalid chroma format; Error code may be updated, verify in testing if needed |
906 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code = |
907 | 0 | IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED; |
908 | 0 | return IV_FAIL; |
909 | 0 | } |
910 | | |
911 | | /* Adding initialization for 2 uninitialized values */ |
912 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_num_disp_bufs = 1; |
913 | 0 | if(ps_dec_state->u4_share_disp_buf) |
914 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_num_disp_bufs = |
915 | 0 | NUM_INT_FRAME_BUFFERS; |
916 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_size = MAX_FRM_SIZE; |
917 | |
|
918 | 0 | ps_ctl_bufinfo_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code = IV_SUCCESS; |
919 | |
|
920 | 0 | return (IV_SUCCESS); |
921 | 0 | } |
922 | | |
923 | | /*****************************************************************************/ |
924 | | /* */ |
925 | | /* Function Name : impeg2d_api_set_flush_mode */ |
926 | | /* */ |
927 | | /* Description : */ |
928 | | /* */ |
929 | | /* Inputs : */ |
930 | | /* Globals : <Does it use any global variables?> */ |
931 | | /* Outputs : */ |
932 | | /* Returns : void */ |
933 | | /* */ |
934 | | /* Issues : none */ |
935 | | /* */ |
936 | | /* Revision History: */ |
937 | | /* */ |
938 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
939 | | /* 08 06 2009 100356 RAVI */ |
940 | | /* */ |
941 | | /*****************************************************************************/ |
942 | | IV_API_CALL_STATUS_T impeg2d_api_set_flush_mode(iv_obj_t *ps_dechdl, |
943 | | void *pv_api_ip, |
944 | | void *pv_api_op) |
945 | 0 | { |
946 | 0 | dec_state_t *ps_dec_state; |
947 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
948 | 0 | impeg2d_ctl_flush_op_t *ps_ctl_dec_op = |
949 | 0 | (impeg2d_ctl_flush_op_t*)pv_api_op; |
950 | |
|
951 | 0 | UNUSED(pv_api_ip); |
952 | |
|
953 | 0 | ps_dec_state_multi_core = |
954 | 0 | (dec_state_multi_core_t *)(ps_dechdl->pv_codec_handle); |
955 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
956 | 0 | impeg2d_join_threads(ps_dec_state_multi_core); |
957 | |
|
958 | 0 | ps_dec_state->u1_flushfrm = 1; |
959 | |
|
960 | 0 | ps_ctl_dec_op->s_ivd_ctl_flush_op_t.u4_size = |
961 | 0 | sizeof(impeg2d_ctl_flush_op_t); |
962 | 0 | ps_ctl_dec_op->s_ivd_ctl_flush_op_t.u4_error_code = IV_SUCCESS; |
963 | |
|
964 | 0 | return (IV_SUCCESS); |
965 | 0 | } |
966 | | |
967 | | /*****************************************************************************/ |
968 | | /* */ |
969 | | /* Function Name : impeg2d_api_set_default */ |
970 | | /* */ |
971 | | /* Description : */ |
972 | | /* */ |
973 | | /* Inputs : */ |
974 | | /* Globals : <Does it use any global variables?> */ |
975 | | /* Outputs : */ |
976 | | /* Returns : void */ |
977 | | /* */ |
978 | | /* Issues : none */ |
979 | | /* */ |
980 | | /* Revision History: */ |
981 | | /* */ |
982 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
983 | | /* 08 06 2009 100356 RAVI */ |
984 | | /* */ |
985 | | /*****************************************************************************/ |
986 | | IV_API_CALL_STATUS_T impeg2d_api_set_default(iv_obj_t *ps_dechdl, |
987 | | void *pv_api_ip, |
988 | | void *pv_api_op) |
989 | 0 | { |
990 | 0 | dec_state_t *ps_dec_state; |
991 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
992 | 0 | impeg2d_ctl_set_config_op_t *ps_ctl_dec_op = |
993 | 0 | (impeg2d_ctl_set_config_op_t *)pv_api_op; |
994 | |
|
995 | 0 | UNUSED(pv_api_ip); |
996 | |
|
997 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_SUCCESS; |
998 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_size = |
999 | 0 | sizeof(impeg2d_ctl_set_config_op_t); |
1000 | |
|
1001 | 0 | ps_dec_state_multi_core = |
1002 | 0 | (dec_state_multi_core_t *)(ps_dechdl->pv_codec_handle); |
1003 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1004 | |
|
1005 | 0 | ps_dec_state->u1_flushfrm = 0; |
1006 | 0 | ps_dec_state->u2_decode_header = 1; |
1007 | |
|
1008 | 0 | if (1 == ps_dec_state->u2_header_done) |
1009 | 0 | { |
1010 | 0 | ps_dec_state->u4_frm_buf_stride = ps_dec_state->u2_frame_width; |
1011 | 0 | } |
1012 | |
|
1013 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_SUCCESS; |
1014 | |
|
1015 | 0 | return (IV_SUCCESS); |
1016 | |
|
1017 | 0 | } |
1018 | | |
1019 | | |
1020 | | /*****************************************************************************/ |
1021 | | /* */ |
1022 | | /* Function Name : impeg2d_api_reset */ |
1023 | | /* */ |
1024 | | /* Description : */ |
1025 | | /* */ |
1026 | | /* Inputs : */ |
1027 | | /* Globals : <Does it use any global variables?> */ |
1028 | | /* Outputs : */ |
1029 | | /* Returns : void */ |
1030 | | /* */ |
1031 | | /* Issues : none */ |
1032 | | /* */ |
1033 | | /* Revision History: */ |
1034 | | /* */ |
1035 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1036 | | /* 08 06 2009 100356 RAVI */ |
1037 | | /* */ |
1038 | | /*****************************************************************************/ |
1039 | | IV_API_CALL_STATUS_T impeg2d_api_reset(iv_obj_t *ps_dechdl, |
1040 | | void *pv_api_ip, |
1041 | | void *pv_api_op) |
1042 | 9.57k | { |
1043 | 9.57k | dec_state_t *ps_dec_state; |
1044 | 9.57k | dec_state_multi_core_t *ps_dec_state_multi_core; |
1045 | 9.57k | UNUSED(pv_api_ip); |
1046 | 9.57k | impeg2d_ctl_reset_op_t *s_ctl_reset_op = (impeg2d_ctl_reset_op_t *)pv_api_op; |
1047 | | |
1048 | 9.57k | WORD32 i4_num_threads; |
1049 | | |
1050 | 9.57k | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
1051 | 9.57k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1052 | | |
1053 | 9.57k | if(ps_dec_state_multi_core != NULL) |
1054 | 9.57k | { |
1055 | 9.57k | impeg2d_join_threads(ps_dec_state_multi_core); |
1056 | 9.57k | impeg2_buf_mgr_reset(ps_dec_state->pv_pic_buf_mg); |
1057 | | /* Display buffer manager init behaves like a reset |
1058 | | * as it doesn't need to preserve picture buffer addresses |
1059 | | * like buffer manager */ |
1060 | 9.57k | impeg2_disp_mgr_init(&ps_dec_state->s_disp_mgr); |
1061 | | |
1062 | 47.8k | for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++) |
1063 | 38.3k | { |
1064 | 38.3k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[i4_num_threads]; |
1065 | | |
1066 | | |
1067 | | /* --------------------------------------------------------------------- */ |
1068 | | /* Initializations */ |
1069 | | |
1070 | 38.3k | ps_dec_state->u2_header_done = 0; /* Header decoding not done */ |
1071 | 38.3k | ps_dec_state->u4_frm_buf_stride = 0; |
1072 | 38.3k | ps_dec_state->i4_pic_count = 0; |
1073 | 38.3k | ps_dec_state->u2_is_mpeg2 = 0; |
1074 | 38.3k | ps_dec_state->aps_ref_pics[0] = NULL; |
1075 | 38.3k | ps_dec_state->aps_ref_pics[1] = NULL; |
1076 | 38.3k | ps_dec_state->ps_deint_pic = NULL; |
1077 | 38.3k | } |
1078 | 9.57k | } |
1079 | 0 | else |
1080 | 0 | { |
1081 | 0 | s_ctl_reset_op->s_ivd_ctl_reset_op_t.u4_error_code = |
1082 | 0 | IMPEG2D_INIT_NOT_DONE; |
1083 | 0 | } |
1084 | | |
1085 | 9.57k | return(IV_SUCCESS); |
1086 | 9.57k | } |
1087 | | |
1088 | | /*****************************************************************************/ |
1089 | | /* */ |
1090 | | /* Function Name : impeg2d_api_set_params */ |
1091 | | /* */ |
1092 | | /* Description : */ |
1093 | | /* */ |
1094 | | /* Inputs : */ |
1095 | | /* Globals : <Does it use any global variables?> */ |
1096 | | /* Outputs : */ |
1097 | | /* Returns : void */ |
1098 | | /* */ |
1099 | | /* Issues : none */ |
1100 | | /* */ |
1101 | | /* Revision History: */ |
1102 | | /* */ |
1103 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1104 | | /* 08 06 2009 100356 RAVI */ |
1105 | | /* */ |
1106 | | /*****************************************************************************/ |
1107 | | IV_API_CALL_STATUS_T impeg2d_api_set_params(iv_obj_t *ps_dechdl,void *pv_api_ip,void *pv_api_op) |
1108 | 11.7k | { |
1109 | 11.7k | dec_state_t *ps_dec_state; |
1110 | 11.7k | dec_state_multi_core_t *ps_dec_state_multi_core; |
1111 | 11.7k | impeg2d_ctl_set_config_ip_t *ps_ctl_dec_ip = (impeg2d_ctl_set_config_ip_t *)pv_api_ip; |
1112 | 11.7k | impeg2d_ctl_set_config_op_t *ps_ctl_dec_op = (impeg2d_ctl_set_config_op_t *)pv_api_op; |
1113 | | |
1114 | 11.7k | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
1115 | 11.7k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1116 | | |
1117 | 11.7k | if((ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode != IVD_DECODE_HEADER) && (ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode != IVD_DECODE_FRAME)) |
1118 | 0 | { |
1119 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL; |
1120 | 0 | return(IV_FAIL); |
1121 | 0 | } |
1122 | | |
1123 | 11.7k | if((ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_frm_out_mode != IVD_DISPLAY_FRAME_OUT) && (ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_frm_out_mode != IVD_DECODE_FRAME_OUT)) |
1124 | 0 | { |
1125 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL; |
1126 | 0 | return(IV_FAIL); |
1127 | 0 | } |
1128 | | |
1129 | 11.7k | if( (WORD32) ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_frm_skip_mode < IVD_SKIP_NONE) |
1130 | 0 | { |
1131 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL; |
1132 | 0 | return(IV_FAIL); |
1133 | 0 | } |
1134 | | |
1135 | 11.7k | if(ps_dec_state->u2_header_done == 1) |
1136 | 5.41k | { |
1137 | 5.41k | if(((WORD32)ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd < 0) || |
1138 | 5.41k | ((ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd != 0) && (ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd < ps_dec_state->u2_frame_width))) |
1139 | 0 | { |
1140 | 0 | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_FAIL; |
1141 | 0 | return(IV_FAIL); |
1142 | 0 | } |
1143 | | |
1144 | 5.41k | } |
1145 | | |
1146 | | |
1147 | 11.7k | ps_dec_state->u2_decode_header = (UWORD8)ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode; |
1148 | | |
1149 | 11.7k | if(ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd != 0) |
1150 | 0 | { |
1151 | 0 | ps_dec_state->u4_frm_buf_stride = ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.u4_disp_wd; |
1152 | 0 | } |
1153 | 11.7k | else |
1154 | 11.7k | { |
1155 | | |
1156 | 11.7k | if(ps_dec_state->u2_header_done == 1) |
1157 | 5.41k | { |
1158 | 5.41k | ps_dec_state->u4_frm_buf_stride = ps_dec_state->u2_frame_width; |
1159 | 5.41k | } |
1160 | 6.35k | else |
1161 | 6.35k | { |
1162 | 6.35k | ps_dec_state->u4_frm_buf_stride = 0; |
1163 | 6.35k | } |
1164 | 11.7k | } |
1165 | | |
1166 | | |
1167 | 11.7k | if(ps_ctl_dec_ip->s_ivd_ctl_set_config_ip_t.e_vid_dec_mode == IVD_DECODE_FRAME) |
1168 | 5.88k | { |
1169 | 5.88k | ps_dec_state->u1_flushfrm = 0; |
1170 | 5.88k | } |
1171 | | |
1172 | | |
1173 | 11.7k | ps_ctl_dec_op->s_ivd_ctl_set_config_op_t.u4_error_code = IV_SUCCESS; |
1174 | 11.7k | return(IV_SUCCESS); |
1175 | | |
1176 | 11.7k | } |
1177 | | |
1178 | | /*****************************************************************************/ |
1179 | | /* */ |
1180 | | /* Function Name : impeg2d_api_get_status */ |
1181 | | /* */ |
1182 | | /* Description : */ |
1183 | | /* */ |
1184 | | /* Inputs : */ |
1185 | | /* Globals : <Does it use any global variables?> */ |
1186 | | /* Outputs : */ |
1187 | | /* Returns : void */ |
1188 | | /* */ |
1189 | | /* Issues : none */ |
1190 | | /* */ |
1191 | | /* Revision History: */ |
1192 | | /* */ |
1193 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1194 | | /* 08 06 2009 100356 RAVI */ |
1195 | | /* */ |
1196 | | /*****************************************************************************/ |
1197 | | IV_API_CALL_STATUS_T impeg2d_api_get_status(iv_obj_t *ps_dechdl, |
1198 | | void *pv_api_ip, |
1199 | | void *pv_api_op) |
1200 | 0 | { |
1201 | 0 | dec_state_t *ps_dec_state; |
1202 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
1203 | 0 | UWORD32 u4_i,u4_stride,u4_height; |
1204 | 0 | impeg2d_ctl_getstatus_ip_t *ps_ctl_dec_ip = (impeg2d_ctl_getstatus_ip_t *)pv_api_ip; |
1205 | 0 | impeg2d_ctl_getstatus_op_t *ps_ctl_dec_op = (impeg2d_ctl_getstatus_op_t *)pv_api_op; |
1206 | 0 | UNUSED(ps_ctl_dec_ip); |
1207 | |
|
1208 | 0 | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
1209 | 0 | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1210 | |
|
1211 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_size = sizeof(impeg2d_ctl_getstatus_op_t); |
1212 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_num_disp_bufs = 1; |
1213 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_pic_ht = ps_dec_state->u2_frame_height; |
1214 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_pic_wd = ps_dec_state->u2_frame_width; |
1215 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_frame_rate = ps_dec_state->u2_framePeriod; |
1216 | | |
1217 | |
|
1218 | 0 | if(ps_dec_state->u2_progressive_sequence == 1) |
1219 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.e_content_type = IV_PROGRESSIVE ; |
1220 | 0 | else |
1221 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.e_content_type = IV_INTERLACED; |
1222 | | |
1223 | |
|
1224 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.e_output_chroma_format = (IV_COLOR_FORMAT_T)ps_dec_state->i4_chromaFormat; |
1225 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_in_bufs = 1; |
1226 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs = 1; |
1227 | | |
1228 | |
|
1229 | 0 | if(ps_dec_state->i4_chromaFormat == IV_YUV_420P) |
1230 | 0 | { |
1231 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs = MIN_OUT_BUFS_420; |
1232 | 0 | } |
1233 | 0 | else if(ps_dec_state->i4_chromaFormat == IV_YUV_422ILE) |
1234 | 0 | { |
1235 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE; |
1236 | 0 | } |
1237 | 0 | else if(ps_dec_state->i4_chromaFormat == IV_RGB_565) |
1238 | 0 | { |
1239 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565; |
1240 | 0 | } |
1241 | 0 | else |
1242 | 0 | { |
1243 | | //Invalid chroma format; Error code may be updated, verify in testing if needed |
1244 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_error_code = IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED; |
1245 | 0 | return IV_FAIL; |
1246 | 0 | } |
1247 | | |
1248 | 0 | memset(&ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_in_buf_size[0],0,(sizeof(UWORD32)*IVD_VIDDEC_MAX_IO_BUFFERS)); |
1249 | 0 | memset(&ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0],0,(sizeof(UWORD32)*IVD_VIDDEC_MAX_IO_BUFFERS)); |
1250 | |
|
1251 | 0 | for(u4_i = 0; u4_i < ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_num_in_bufs; u4_i++) |
1252 | 0 | { |
1253 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_in_buf_size[u4_i] = MAX_BITSTREAM_BUFFER_SIZE; |
1254 | 0 | } |
1255 | |
|
1256 | 0 | u4_stride = ps_dec_state->u4_frm_buf_stride; |
1257 | 0 | u4_height = ((ps_dec_state->u2_frame_height + 15) >> 4) << 4; |
1258 | |
|
1259 | 0 | if(ps_dec_state->i4_chromaFormat == IV_YUV_420P) |
1260 | 0 | { |
1261 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0] = (u4_stride * u4_height); |
1262 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[1] = (u4_stride * u4_height)>>2 ; |
1263 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[2] = (u4_stride * u4_height)>>2; |
1264 | 0 | } |
1265 | 0 | else if((ps_dec_state->i4_chromaFormat == IV_YUV_420SP_UV) || (ps_dec_state->i4_chromaFormat == IV_YUV_420SP_VU)) |
1266 | 0 | { |
1267 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0] = (u4_stride * u4_height); |
1268 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[1] = (u4_stride * u4_height)>>1 ; |
1269 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[2] = 0; |
1270 | 0 | } |
1271 | 0 | else if(ps_dec_state->i4_chromaFormat == IV_YUV_422ILE) |
1272 | 0 | { |
1273 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[0] = (u4_stride * u4_height)*2; |
1274 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[1] = ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_min_out_buf_size[2] = 0; |
1275 | 0 | } |
1276 | |
|
1277 | 0 | ps_ctl_dec_op->s_ivd_ctl_getstatus_op_t.u4_error_code = IV_SUCCESS; |
1278 | |
|
1279 | 0 | return(IV_SUCCESS); |
1280 | |
|
1281 | 0 | } |
1282 | | |
1283 | | /** |
1284 | | ******************************************************************************* |
1285 | | * |
1286 | | * @brief |
1287 | | * Gets frame dimensions/offsets |
1288 | | * |
1289 | | * @par Description: |
1290 | | * Gets frame buffer chararacteristics such a x & y offsets display and |
1291 | | * buffer dimensions |
1292 | | * |
1293 | | * @param[in] ps_codec_obj |
1294 | | * Pointer to codec object at API level |
1295 | | * |
1296 | | * @param[in] pv_api_ip |
1297 | | * Pointer to input argument structure |
1298 | | * |
1299 | | * @param[out] pv_api_op |
1300 | | * Pointer to output argument structure |
1301 | | * |
1302 | | * @returns Status |
1303 | | * |
1304 | | * @remarks |
1305 | | * |
1306 | | * |
1307 | | ******************************************************************************* |
1308 | | */ |
1309 | | IV_API_CALL_STATUS_T impeg2d_get_frame_dimensions(iv_obj_t *ps_codec_obj, |
1310 | | void *pv_api_ip, |
1311 | | void *pv_api_op) |
1312 | 0 | { |
1313 | 0 | impeg2d_ctl_get_frame_dimensions_ip_t *ps_ip; |
1314 | 0 | impeg2d_ctl_get_frame_dimensions_op_t *ps_op; |
1315 | 0 | WORD32 disp_wd, disp_ht, buffer_wd, buffer_ht, x_offset, y_offset; |
1316 | 0 | dec_state_t *ps_codec; |
1317 | 0 | dec_state_multi_core_t *ps_dec_state_multi_core; |
1318 | |
|
1319 | 0 | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_codec_obj->pv_codec_handle); |
1320 | 0 | ps_codec = ps_dec_state_multi_core->ps_dec_state[0]; |
1321 | | |
1322 | |
|
1323 | 0 | ps_ip = (impeg2d_ctl_get_frame_dimensions_ip_t *)pv_api_ip; |
1324 | 0 | ps_op = (impeg2d_ctl_get_frame_dimensions_op_t *)pv_api_op; |
1325 | 0 | UNUSED(ps_ip); |
1326 | 0 | if(ps_codec->u2_header_done) |
1327 | 0 | { |
1328 | 0 | disp_wd = ps_codec->u2_horizontal_size; |
1329 | 0 | disp_ht = ps_codec->u2_vertical_size; |
1330 | |
|
1331 | 0 | if(0 == ps_codec->u4_share_disp_buf) |
1332 | 0 | { |
1333 | 0 | buffer_wd = disp_wd; |
1334 | 0 | buffer_ht = disp_ht; |
1335 | 0 | } |
1336 | 0 | else |
1337 | 0 | { |
1338 | 0 | buffer_wd = ps_codec->u2_frame_width; |
1339 | 0 | buffer_ht = ps_codec->u2_frame_height; |
1340 | 0 | } |
1341 | 0 | } |
1342 | 0 | else |
1343 | 0 | { |
1344 | |
|
1345 | 0 | disp_wd = ps_codec->u2_create_max_width; |
1346 | 0 | disp_ht = ps_codec->u2_create_max_height; |
1347 | |
|
1348 | 0 | if(0 == ps_codec->u4_share_disp_buf) |
1349 | 0 | { |
1350 | 0 | buffer_wd = disp_wd; |
1351 | 0 | buffer_ht = disp_ht; |
1352 | 0 | } |
1353 | 0 | else |
1354 | 0 | { |
1355 | 0 | buffer_wd = ALIGN16(disp_wd); |
1356 | 0 | buffer_ht = ALIGN16(disp_ht); |
1357 | |
|
1358 | 0 | } |
1359 | 0 | } |
1360 | 0 | if(ps_codec->u2_frame_width > buffer_wd) |
1361 | 0 | buffer_wd = ps_codec->u2_frame_width; |
1362 | |
|
1363 | 0 | x_offset = 0; |
1364 | 0 | y_offset = 0; |
1365 | | |
1366 | |
|
1367 | 0 | ps_op->u4_disp_wd[0] = disp_wd; |
1368 | 0 | ps_op->u4_disp_ht[0] = disp_ht; |
1369 | 0 | ps_op->u4_buffer_wd[0] = buffer_wd; |
1370 | 0 | ps_op->u4_buffer_ht[0] = buffer_ht; |
1371 | 0 | ps_op->u4_x_offset[0] = x_offset; |
1372 | 0 | ps_op->u4_y_offset[0] = y_offset; |
1373 | |
|
1374 | 0 | ps_op->u4_disp_wd[1] = ps_op->u4_disp_wd[2] = ((ps_op->u4_disp_wd[0] + 1) |
1375 | 0 | >> 1); |
1376 | 0 | ps_op->u4_disp_ht[1] = ps_op->u4_disp_ht[2] = ((ps_op->u4_disp_ht[0] + 1) |
1377 | 0 | >> 1); |
1378 | 0 | ps_op->u4_buffer_wd[1] = ps_op->u4_buffer_wd[2] = (ps_op->u4_buffer_wd[0] |
1379 | 0 | >> 1); |
1380 | 0 | ps_op->u4_buffer_ht[1] = ps_op->u4_buffer_ht[2] = (ps_op->u4_buffer_ht[0] |
1381 | 0 | >> 1); |
1382 | 0 | ps_op->u4_x_offset[1] = ps_op->u4_x_offset[2] = (ps_op->u4_x_offset[0] |
1383 | 0 | >> 1); |
1384 | 0 | ps_op->u4_y_offset[1] = ps_op->u4_y_offset[2] = (ps_op->u4_y_offset[0] |
1385 | 0 | >> 1); |
1386 | |
|
1387 | 0 | if((ps_codec->i4_chromaFormat == IV_YUV_420SP_UV) |
1388 | 0 | || (ps_codec->i4_chromaFormat == IV_YUV_420SP_VU)) |
1389 | 0 | { |
1390 | 0 | ps_op->u4_disp_wd[2] = 0; |
1391 | 0 | ps_op->u4_disp_ht[2] = 0; |
1392 | 0 | ps_op->u4_buffer_wd[2] = 0; |
1393 | 0 | ps_op->u4_buffer_ht[2] = 0; |
1394 | 0 | ps_op->u4_x_offset[2] = 0; |
1395 | 0 | ps_op->u4_y_offset[2] = 0; |
1396 | |
|
1397 | 0 | ps_op->u4_disp_wd[1] <<= 1; |
1398 | 0 | ps_op->u4_buffer_wd[1] <<= 1; |
1399 | 0 | ps_op->u4_x_offset[1] <<= 1; |
1400 | 0 | } |
1401 | |
|
1402 | 0 | return IV_SUCCESS; |
1403 | |
|
1404 | 0 | } |
1405 | | |
1406 | | IV_API_CALL_STATUS_T impeg2d_api_function (iv_obj_t *ps_dechdl, void *pv_api_ip,void *pv_api_op) |
1407 | 130k | { |
1408 | 130k | WORD32 i4_cmd; |
1409 | 130k | IV_API_CALL_STATUS_T u4_error_code; |
1410 | 130k | UWORD32 *pu4_api_ip; |
1411 | | |
1412 | 130k | u4_error_code = impeg2d_api_check_struct_sanity(ps_dechdl,pv_api_ip,pv_api_op); |
1413 | 130k | if(IV_SUCCESS != u4_error_code) |
1414 | 0 | { |
1415 | 0 | return u4_error_code; |
1416 | 0 | } |
1417 | | |
1418 | | |
1419 | 130k | pu4_api_ip = (UWORD32 *)pv_api_ip; |
1420 | 130k | i4_cmd = *(pu4_api_ip + 1); |
1421 | | |
1422 | 130k | switch(i4_cmd) |
1423 | 130k | { |
1424 | | |
1425 | 11.7k | case IV_CMD_GET_NUM_MEM_REC: |
1426 | 11.7k | u4_error_code = impeg2d_api_num_mem_rec((void *)pv_api_ip,(void *)pv_api_op); |
1427 | 11.7k | break; |
1428 | | |
1429 | 11.7k | case IV_CMD_FILL_NUM_MEM_REC: |
1430 | 11.7k | u4_error_code = impeg2d_api_fill_mem_rec((void *)pv_api_ip,(void *)pv_api_op); |
1431 | 11.7k | break; |
1432 | | |
1433 | 5.88k | case IV_CMD_INIT: |
1434 | 5.88k | u4_error_code = impeg2d_api_init(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op); |
1435 | 5.88k | break; |
1436 | | |
1437 | 0 | case IVD_CMD_SET_DISPLAY_FRAME: |
1438 | 0 | u4_error_code = impeg2d_api_set_display_frame(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op); |
1439 | 0 | break; |
1440 | | |
1441 | 0 | case IVD_CMD_REL_DISPLAY_FRAME: |
1442 | 0 | u4_error_code = impeg2d_api_rel_display_frame(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op); |
1443 | 0 | break; |
1444 | | |
1445 | 61.9k | case IVD_CMD_VIDEO_DECODE: |
1446 | 61.9k | u4_error_code = impeg2d_api_entity(ps_dechdl, (void *)pv_api_ip,(void *)pv_api_op); |
1447 | 61.9k | break; |
1448 | | |
1449 | 5.88k | case IV_CMD_RETRIEVE_MEMREC: |
1450 | 5.88k | u4_error_code = impeg2d_api_retrieve_mem_rec(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op); |
1451 | 5.88k | break; |
1452 | | |
1453 | 33.1k | case IVD_CMD_VIDEO_CTL: |
1454 | 33.1k | u4_error_code = impeg2d_api_ctl(ps_dechdl,(void *)pv_api_ip,(void *)pv_api_op); |
1455 | 33.1k | break; |
1456 | | |
1457 | 0 | default: |
1458 | 0 | break; |
1459 | 130k | } |
1460 | | |
1461 | 130k | return(u4_error_code); |
1462 | | |
1463 | 130k | } |
1464 | | |
1465 | | /*****************************************************************************/ |
1466 | | /* */ |
1467 | | /* Function Name : impeg2d_api_num_mem_rec */ |
1468 | | /* */ |
1469 | | /* Description : The function get the number mem records library needs */ |
1470 | | /* Inputs : Error message */ |
1471 | | /* Globals : None */ |
1472 | | /* Processing : Just prints error message to console */ |
1473 | | /* Outputs : Error mesage to the console */ |
1474 | | /* Returns : None */ |
1475 | | /* */ |
1476 | | /* Issues : <List any issues or problems with this function> */ |
1477 | | /* */ |
1478 | | /* Revision History: */ |
1479 | | /* */ |
1480 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1481 | | /* 23 09 2010 Hamsalekha Creation */ |
1482 | | /* */ |
1483 | | /*****************************************************************************/ |
1484 | | |
1485 | | |
1486 | | IV_API_CALL_STATUS_T impeg2d_api_num_mem_rec(void *pv_api_ip,void *pv_api_op) |
1487 | 11.7k | { |
1488 | | /* To Query No of Memory Records */ |
1489 | 11.7k | impeg2d_num_mem_rec_ip_t *ps_query_mem_rec_ip; |
1490 | 11.7k | impeg2d_num_mem_rec_op_t *ps_query_mem_rec_op; |
1491 | | |
1492 | 11.7k | ps_query_mem_rec_ip = (impeg2d_num_mem_rec_ip_t *)pv_api_ip; |
1493 | 11.7k | ps_query_mem_rec_op = (impeg2d_num_mem_rec_op_t *)pv_api_op; |
1494 | | |
1495 | 11.7k | UNUSED(ps_query_mem_rec_ip); |
1496 | 11.7k | ps_query_mem_rec_op->s_ivd_num_mem_rec_op_t.u4_size = sizeof(impeg2d_num_mem_rec_op_t); |
1497 | | |
1498 | 11.7k | ps_query_mem_rec_op->s_ivd_num_mem_rec_op_t.u4_num_mem_rec = (UWORD32)NUM_MEM_RECORDS; |
1499 | | |
1500 | 11.7k | ps_query_mem_rec_op->s_ivd_num_mem_rec_op_t.u4_error_code = IV_SUCCESS; |
1501 | | |
1502 | | |
1503 | 11.7k | return(IV_SUCCESS); |
1504 | | |
1505 | 11.7k | } |
1506 | | |
1507 | | |
1508 | | /*****************************************************************************/ |
1509 | | /* */ |
1510 | | /* Function Name : impeg2d_api_fill_mem_rec */ |
1511 | | /* */ |
1512 | | /* Description : Thsi functions fills details of each mem record lib needs*/ |
1513 | | /* Inputs : Error message */ |
1514 | | /* Globals : None */ |
1515 | | /* Processing : Just prints error message to console */ |
1516 | | /* Outputs : Error mesage to the console */ |
1517 | | /* Returns : None */ |
1518 | | /* */ |
1519 | | /* Issues : <List any issues or problems with this function> */ |
1520 | | /* */ |
1521 | | /* Revision History: */ |
1522 | | /* */ |
1523 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1524 | | /* 23 09 2010 Hamsalekha Creation */ |
1525 | | /* */ |
1526 | | /*****************************************************************************/ |
1527 | | |
1528 | | |
1529 | | IV_API_CALL_STATUS_T impeg2d_api_fill_mem_rec(void *pv_api_ip,void *pv_api_op) |
1530 | 11.7k | { |
1531 | | |
1532 | 11.7k | impeg2d_fill_mem_rec_ip_t *ps_mem_q_ip; |
1533 | 11.7k | impeg2d_fill_mem_rec_op_t *ps_mem_q_op; |
1534 | | |
1535 | | |
1536 | 11.7k | ps_mem_q_ip = pv_api_ip; |
1537 | 11.7k | ps_mem_q_op = pv_api_op; |
1538 | | |
1539 | | |
1540 | 11.7k | impeg2d_fill_mem_rec((impeg2d_fill_mem_rec_ip_t *)ps_mem_q_ip, |
1541 | 11.7k | (impeg2d_fill_mem_rec_op_t *)ps_mem_q_op); |
1542 | | |
1543 | | |
1544 | 11.7k | return(IV_SUCCESS); |
1545 | | |
1546 | 11.7k | } |
1547 | | |
1548 | | UWORD32 impeg2d_get_outbuf_size(WORD32 pic_wd,UWORD32 pic_ht, WORD32 u1_chroma_format,UWORD32 *p_buf_size) |
1549 | 43.7k | { |
1550 | 43.7k | UWORD32 u4_min_num_out_bufs = 0; |
1551 | 43.7k | if(u1_chroma_format == IV_YUV_420P) |
1552 | 20.8k | u4_min_num_out_bufs = MIN_OUT_BUFS_420; |
1553 | 22.8k | else if(u1_chroma_format == IV_YUV_422ILE) |
1554 | 0 | u4_min_num_out_bufs = MIN_OUT_BUFS_422ILE; |
1555 | 22.8k | else if(u1_chroma_format == IV_RGB_565) |
1556 | 0 | u4_min_num_out_bufs = MIN_OUT_BUFS_RGB565; |
1557 | 22.8k | else if((u1_chroma_format == IV_YUV_420SP_UV) |
1558 | 12.7k | || (u1_chroma_format == IV_YUV_420SP_VU)) |
1559 | 22.8k | u4_min_num_out_bufs = MIN_OUT_BUFS_420SP; |
1560 | | |
1561 | 43.7k | if(u1_chroma_format == IV_YUV_420P) |
1562 | 20.8k | { |
1563 | 20.8k | p_buf_size[0] = (pic_wd * pic_ht); |
1564 | 20.8k | p_buf_size[1] = ((pic_wd + 1) >> 1) * ((pic_ht + 1) >> 1); |
1565 | 20.8k | p_buf_size[2] = ((pic_wd + 1) >> 1) * ((pic_ht + 1) >> 1); |
1566 | 20.8k | } |
1567 | 22.8k | else if(u1_chroma_format == IV_YUV_422ILE) |
1568 | 0 | { |
1569 | 0 | p_buf_size[0] = (pic_wd * pic_ht) |
1570 | 0 | * 2; |
1571 | 0 | p_buf_size[1] = |
1572 | 0 | p_buf_size[2] = 0; |
1573 | 0 | } |
1574 | 22.8k | else if(u1_chroma_format == IV_RGB_565) |
1575 | 0 | { |
1576 | 0 | p_buf_size[0] = (pic_wd * pic_ht) |
1577 | 0 | * 2; |
1578 | 0 | p_buf_size[1] = |
1579 | 0 | p_buf_size[2] = 0; |
1580 | 0 | } |
1581 | 22.8k | else if((u1_chroma_format == IV_YUV_420SP_UV) |
1582 | 12.7k | || (u1_chroma_format == IV_YUV_420SP_VU)) |
1583 | 22.8k | { |
1584 | 22.8k | p_buf_size[0] = (pic_wd * pic_ht); |
1585 | 22.8k | p_buf_size[1] = ((pic_wd + 1) >> 1) * ((pic_ht + 1) >> 1) * 2; |
1586 | 22.8k | p_buf_size[2] = 0; |
1587 | 22.8k | } |
1588 | 43.7k | return u4_min_num_out_bufs; |
1589 | 43.7k | } |
1590 | | |
1591 | | WORD32 check_app_out_buf_size(dec_state_t *ps_dec) |
1592 | 43.7k | { |
1593 | 43.7k | UWORD32 au4_min_out_buf_size[IVD_VIDDEC_MAX_IO_BUFFERS]; |
1594 | 43.7k | UWORD32 u4_min_num_out_bufs, i; |
1595 | 43.7k | UWORD32 pic_wd, pic_ht; |
1596 | | |
1597 | 43.7k | pic_wd = ps_dec->u2_horizontal_size; |
1598 | 43.7k | pic_ht = ps_dec->u2_vertical_size; |
1599 | | |
1600 | 43.7k | if(ps_dec->u4_frm_buf_stride > pic_wd) |
1601 | 563 | pic_wd = ps_dec->u4_frm_buf_stride; |
1602 | | |
1603 | 43.7k | u4_min_num_out_bufs = impeg2d_get_outbuf_size(pic_wd, pic_ht, ps_dec->i4_chromaFormat, &au4_min_out_buf_size[0]); |
1604 | | |
1605 | 43.7k | if (0 == ps_dec->u4_share_disp_buf) |
1606 | 43.7k | { |
1607 | 43.7k | if(ps_dec->ps_out_buf->u4_num_bufs < u4_min_num_out_bufs) |
1608 | 0 | { |
1609 | 0 | return IV_FAIL; |
1610 | 0 | } |
1611 | | |
1612 | 149k | for (i = 0 ; i < u4_min_num_out_bufs; i++) |
1613 | 107k | { |
1614 | 107k | if(ps_dec->ps_out_buf->u4_min_out_buf_size[i] < au4_min_out_buf_size[i]) |
1615 | 928 | return (IV_FAIL); |
1616 | 107k | } |
1617 | 43.7k | } |
1618 | 0 | else |
1619 | 0 | { |
1620 | 0 | if(ps_dec->as_disp_buffers[0].u4_num_bufs < u4_min_num_out_bufs) |
1621 | 0 | return IV_FAIL; |
1622 | | |
1623 | 0 | for (i = 0 ; i < u4_min_num_out_bufs; i++) |
1624 | 0 | { |
1625 | | /* We need to check only with the disp_buffer[0], because we have |
1626 | | * already ensured that all the buffers are of the same size in |
1627 | | * impeg2d_api_set_display_frame. |
1628 | | */ |
1629 | 0 | if(ps_dec->as_disp_buffers[0].u4_min_out_buf_size[i] < |
1630 | 0 | au4_min_out_buf_size[i]) |
1631 | 0 | return (IV_FAIL); |
1632 | 0 | } |
1633 | 0 | } |
1634 | | |
1635 | 42.8k | return(IV_SUCCESS); |
1636 | 43.7k | } |
1637 | | |
1638 | | |
1639 | | |
1640 | | /*****************************************************************************/ |
1641 | | /* */ |
1642 | | /* Function Name : impeg2d_api_init */ |
1643 | | /* */ |
1644 | | /* Description : */ |
1645 | | /* Inputs : */ |
1646 | | /* Globals : */ |
1647 | | /* Processing : */ |
1648 | | /* Outputs : */ |
1649 | | /* Returns : */ |
1650 | | /* */ |
1651 | | /* Issues : */ |
1652 | | /* */ |
1653 | | /* Revision History: */ |
1654 | | /* */ |
1655 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
1656 | | /* 17 09 2007 Rajendra C Y Draft */ |
1657 | | /* */ |
1658 | | /*****************************************************************************/ |
1659 | | IV_API_CALL_STATUS_T impeg2d_api_init(iv_obj_t *ps_dechdl, |
1660 | | void *ps_ip, |
1661 | | void *ps_op) |
1662 | 5.88k | { |
1663 | 5.88k | UWORD32 i; |
1664 | | |
1665 | 5.88k | void *pv; |
1666 | 5.88k | UWORD32 u4_size; |
1667 | | |
1668 | 5.88k | dec_state_t *ps_dec_state; |
1669 | 5.88k | dec_state_multi_core_t *ps_dec_state_multi_core; |
1670 | 5.88k | UWORD32 u4_num_mem_rec; |
1671 | 5.88k | iv_mem_rec_t *ps_mem_rec ; |
1672 | 5.88k | iv_mem_rec_t *ps_frm_buf; |
1673 | 5.88k | iv_obj_t *ps_dec_handle; |
1674 | 5.88k | WORD32 i4_max_wd, i4_max_ht; |
1675 | | |
1676 | 5.88k | impeg2d_init_ip_t *ps_dec_init_ip; |
1677 | 5.88k | impeg2d_init_op_t *ps_dec_init_op; |
1678 | 5.88k | WORD32 i4_num_threads; |
1679 | 5.88k | UWORD32 u4_share_disp_buf, u4_chroma_format; |
1680 | 5.88k | UWORD32 u4_deinterlace; |
1681 | 5.88k | WORD32 i4_threads_active; |
1682 | | |
1683 | 5.88k | ps_dec_init_ip = (impeg2d_init_ip_t *)ps_ip; |
1684 | 5.88k | ps_dec_init_op = (impeg2d_init_op_t *)ps_op; |
1685 | | |
1686 | 5.88k | i4_max_wd = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_wd); |
1687 | 5.88k | i4_max_ht = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_ht); |
1688 | | |
1689 | 5.88k | if(ps_dec_init_ip->s_ivd_init_ip_t.u4_size > offsetof(impeg2d_init_ip_t, u4_share_disp_buf)) |
1690 | 5.88k | { |
1691 | 5.88k | #ifndef LOGO_EN |
1692 | 5.88k | u4_share_disp_buf = ps_dec_init_ip->u4_share_disp_buf; |
1693 | | #else |
1694 | | u4_share_disp_buf = 0; |
1695 | | #endif |
1696 | 5.88k | } |
1697 | 0 | else |
1698 | 0 | { |
1699 | 0 | u4_share_disp_buf = 0; |
1700 | 0 | } |
1701 | | |
1702 | 5.88k | u4_chroma_format = ps_dec_init_ip->s_ivd_init_ip_t.e_output_format; |
1703 | | |
1704 | 5.88k | if(ps_dec_init_ip->s_ivd_init_ip_t.u4_size > offsetof(impeg2d_init_ip_t, u4_deinterlace)) |
1705 | 5.88k | { |
1706 | 5.88k | u4_deinterlace = ps_dec_init_ip->u4_deinterlace; |
1707 | 5.88k | } |
1708 | 0 | else |
1709 | 0 | { |
1710 | 0 | u4_deinterlace = 0; |
1711 | 0 | } |
1712 | | |
1713 | 5.88k | if(ps_dec_init_ip->s_ivd_init_ip_t.u4_size > offsetof(impeg2d_init_ip_t, u4_keep_threads_active)) |
1714 | 5.88k | { |
1715 | 5.88k | i4_threads_active = ps_dec_init_ip->u4_keep_threads_active; |
1716 | 5.88k | } |
1717 | 0 | else |
1718 | 0 | { |
1719 | 0 | i4_threads_active = 0; |
1720 | 0 | } |
1721 | | |
1722 | 5.88k | if( (u4_chroma_format != IV_YUV_420P) && |
1723 | 3.27k | (u4_chroma_format != IV_YUV_420SP_UV) && |
1724 | 1.66k | (u4_chroma_format != IV_YUV_420SP_VU)) |
1725 | 0 | { |
1726 | 0 | u4_share_disp_buf = 0; |
1727 | 0 | } |
1728 | | |
1729 | | /* Disable deinterlacer in shared mode */ |
1730 | 5.88k | if(u4_share_disp_buf) |
1731 | 0 | { |
1732 | 0 | u4_deinterlace = 0; |
1733 | 0 | } |
1734 | | |
1735 | 5.88k | ps_mem_rec = ps_dec_init_ip->s_ivd_init_ip_t.pv_mem_rec_location; |
1736 | 5.88k | ps_mem_rec ++; |
1737 | | |
1738 | | |
1739 | 5.88k | ps_dec_init_op->s_ivd_init_op_t.u4_size = sizeof(impeg2d_init_op_t); |
1740 | | |
1741 | | |
1742 | | /* Except memTab[0], all other memTabs are initialized to zero */ |
1743 | 217k | for(i = 1; i < ps_dec_init_ip->s_ivd_init_ip_t.u4_num_mem_rec; i++) |
1744 | 211k | { |
1745 | 211k | memset(ps_mem_rec->pv_base,0,ps_mem_rec->u4_mem_size); |
1746 | 211k | ps_mem_rec++; |
1747 | 211k | } |
1748 | | |
1749 | | /* Reinitializing memTab[0] memory base address */ |
1750 | 5.88k | ps_mem_rec = ps_dec_init_ip->s_ivd_init_ip_t.pv_mem_rec_location; |
1751 | | |
1752 | | |
1753 | | /* memTab[0] is for codec Handle,redundant currently not being used */ |
1754 | 5.88k | ps_dec_handle = ps_mem_rec->pv_base; |
1755 | 5.88k | u4_num_mem_rec = 1; |
1756 | 5.88k | ps_mem_rec++; |
1757 | | |
1758 | | |
1759 | | |
1760 | | |
1761 | | |
1762 | | /* decoder handle */ |
1763 | 5.88k | ps_dec_state_multi_core = ps_mem_rec->pv_base; |
1764 | 5.88k | u4_num_mem_rec++; |
1765 | 5.88k | ps_mem_rec++; |
1766 | | |
1767 | | |
1768 | 5.88k | { |
1769 | 5.88k | ps_dec_handle->pv_codec_handle = (void *)ps_dec_state_multi_core; /* Initializing codec context */ |
1770 | | |
1771 | 5.88k | ps_dechdl->pv_codec_handle = (void *)ps_dec_state_multi_core; |
1772 | 5.88k | ps_dechdl->pv_fxns = (void *)impeg2d_api_function; |
1773 | 5.88k | } |
1774 | | |
1775 | | |
1776 | 29.4k | for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++) |
1777 | 23.5k | { |
1778 | 23.5k | WORD32 ret; |
1779 | 23.5k | UWORD8 *pv_buf; |
1780 | 23.5k | WORD32 mutex_size = ithread_get_mutex_lock_size(); |
1781 | 23.5k | WORD32 cond_size = ithread_get_cond_struct_size(); |
1782 | | /*************************************************************************/ |
1783 | | /* For MPEG2 Decoder Context */ |
1784 | | /*************************************************************************/ |
1785 | 23.5k | ps_dec_state = ps_mem_rec->pv_base; |
1786 | | |
1787 | 23.5k | ps_dec_state_multi_core->ps_dec_state[i4_num_threads] = ps_dec_state; |
1788 | | |
1789 | 23.5k | ps_dec_state->ps_dec_state_multi_core = ps_dec_state_multi_core; |
1790 | | |
1791 | 23.5k | ps_dec_state->i4_num_cores = 1; |
1792 | | /* @ */ /* Used for storing MemRecords */ |
1793 | 23.5k | u4_num_mem_rec++; |
1794 | 23.5k | ps_mem_rec++; |
1795 | | |
1796 | | /* Thread handle */ |
1797 | 23.5k | ps_dec_state->pv_codec_thread_handle = ps_mem_rec->pv_base; |
1798 | 23.5k | u4_num_mem_rec++; |
1799 | 23.5k | ps_mem_rec++; |
1800 | | |
1801 | 23.5k | pv_buf = ps_mem_rec->pv_base; |
1802 | 23.5k | if (ps_mem_rec->u4_mem_size < 2 * mutex_size) |
1803 | 0 | { |
1804 | 0 | ps_dec_init_op->s_ivd_init_op_t.u4_error_code = |
1805 | 0 | IMPEG2D_INIT_DEC_PER_MEM_INSUFFICIENT; |
1806 | 0 | return(IV_FAIL); |
1807 | 0 | } |
1808 | | |
1809 | 23.5k | ps_dec_state->pv_proc_start_mutex = (UWORD8 *)pv_buf; |
1810 | 23.5k | ps_dec_state->pv_proc_done_mutex = (UWORD8 *)pv_buf + mutex_size; |
1811 | | |
1812 | 23.5k | ret = ithread_mutex_init(ps_dec_state->pv_proc_start_mutex); |
1813 | 23.5k | RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret); |
1814 | | |
1815 | 23.5k | ret = ithread_mutex_init(ps_dec_state->pv_proc_done_mutex); |
1816 | 23.5k | RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret); |
1817 | | |
1818 | 23.5k | u4_num_mem_rec++; |
1819 | 23.5k | ps_mem_rec++; |
1820 | | |
1821 | 23.5k | pv_buf = ps_mem_rec->pv_base; |
1822 | 23.5k | if (ps_mem_rec->u4_mem_size < 2 * cond_size) |
1823 | 0 | { |
1824 | 0 | ps_dec_init_op->s_ivd_init_op_t.u4_error_code = |
1825 | 0 | IMPEG2D_INIT_DEC_PER_MEM_INSUFFICIENT; |
1826 | 0 | return(IV_FAIL); |
1827 | 0 | } |
1828 | 23.5k | ps_dec_state->pv_proc_start_condition = (UWORD8 *)pv_buf; |
1829 | 23.5k | ps_dec_state->pv_proc_done_condition = (UWORD8 *)pv_buf + cond_size; |
1830 | | |
1831 | 23.5k | ret = ithread_cond_init(ps_dec_state->pv_proc_start_condition); |
1832 | 23.5k | RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret); |
1833 | | |
1834 | 23.5k | ret = ithread_cond_init(ps_dec_state->pv_proc_done_condition); |
1835 | 23.5k | RETURN_IF((ret != (IMPEG2D_ERROR_CODES_T)IV_SUCCESS), ret); |
1836 | | |
1837 | 23.5k | u4_num_mem_rec++; |
1838 | 23.5k | ps_mem_rec++; |
1839 | | |
1840 | | /*************************************************************************/ |
1841 | | /* For Motion Compensation Buffers */ |
1842 | | /*************************************************************************/ |
1843 | 23.5k | pv = ps_mem_rec->pv_base; |
1844 | | |
1845 | | /* for mc_fw_buf.pu1_y */ |
1846 | | |
1847 | 23.5k | ps_dec_state->s_mc_fw_buf.pu1_y = pv; |
1848 | 23.5k | pv = (void *)((UWORD8 *)pv + MB_LUMA_MEM_SIZE); |
1849 | | |
1850 | 23.5k | u4_size = sizeof(UWORD8) * MB_LUMA_MEM_SIZE; |
1851 | | /* for mc_fw_buf.pu1_u */ |
1852 | | |
1853 | 23.5k | ps_dec_state->s_mc_fw_buf.pu1_u = pv; |
1854 | 23.5k | pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE); |
1855 | | |
1856 | 23.5k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1857 | | |
1858 | | /* for mc_fw_buf.pu1_v */ |
1859 | | |
1860 | 23.5k | ps_dec_state->s_mc_fw_buf.pu1_v = pv; |
1861 | 23.5k | pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE); |
1862 | | |
1863 | 23.5k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1864 | | |
1865 | | /* for mc_bk_buf.pu1_y */ |
1866 | | |
1867 | 23.5k | ps_dec_state->s_mc_bk_buf.pu1_y = pv; |
1868 | 23.5k | pv = (void *)((UWORD8 *)pv + MB_LUMA_MEM_SIZE); |
1869 | | |
1870 | 23.5k | u4_size += sizeof(UWORD8) * MB_LUMA_MEM_SIZE; |
1871 | | |
1872 | | /* for mc_bk_buf.pu1_u */ |
1873 | | |
1874 | 23.5k | ps_dec_state->s_mc_bk_buf.pu1_u = pv; |
1875 | 23.5k | pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE); |
1876 | | |
1877 | 23.5k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1878 | | |
1879 | | /* for mc_bk_buf.pu1_v */ |
1880 | | |
1881 | 23.5k | ps_dec_state->s_mc_bk_buf.pu1_v = pv; |
1882 | 23.5k | pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE); |
1883 | | |
1884 | 23.5k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1885 | | |
1886 | | /* for mc_buf.pu1_y */ |
1887 | | |
1888 | 23.5k | ps_dec_state->s_mc_buf.pu1_y = pv; |
1889 | 23.5k | pv = (void *)((UWORD8 *)pv + MB_LUMA_MEM_SIZE); |
1890 | | |
1891 | 23.5k | u4_size += sizeof(UWORD8) * MB_LUMA_MEM_SIZE; |
1892 | | |
1893 | | /* for mc_buf.pu1_u */ |
1894 | | |
1895 | 23.5k | ps_dec_state->s_mc_buf.pu1_u = pv; |
1896 | 23.5k | pv = (void *)((UWORD8 *)pv + MB_CHROMA_MEM_SIZE); |
1897 | | |
1898 | 23.5k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1899 | | |
1900 | | /* for mc_buf.pu1_v */ |
1901 | | |
1902 | 23.5k | ps_dec_state->s_mc_buf.pu1_v = pv; |
1903 | | |
1904 | 23.5k | u4_size += sizeof(UWORD8) * MB_CHROMA_MEM_SIZE; |
1905 | | |
1906 | 23.5k | u4_num_mem_rec++; |
1907 | 23.5k | ps_mem_rec++; |
1908 | | |
1909 | | |
1910 | | |
1911 | 23.5k | ps_dec_state->pv_pic_buf_mg = 0; |
1912 | | |
1913 | | /*************************************************************************/ |
1914 | | /* For saving stack context to support global error handling */ |
1915 | | /*************************************************************************/ |
1916 | 23.5k | ps_dec_state->pv_stack_cntxt = ps_mem_rec->pv_base; |
1917 | 23.5k | u4_num_mem_rec++; |
1918 | 23.5k | ps_mem_rec++; |
1919 | | |
1920 | 23.5k | } |
1921 | | |
1922 | | |
1923 | | |
1924 | | |
1925 | | |
1926 | | /*************************************************************************/ |
1927 | | /* For Picture Buffer Manager */ |
1928 | | /*************************************************************************/ |
1929 | 5.88k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1930 | | |
1931 | 5.88k | ps_dec_state->pv_pic_buf_mg = ps_mem_rec->pv_base; |
1932 | 5.88k | ps_dec_state->pv_pic_buf_base = (UWORD8 *)ps_mem_rec->pv_base + sizeof(buf_mgr_t); |
1933 | | |
1934 | 5.88k | u4_num_mem_rec++; |
1935 | 5.88k | ps_mem_rec++; |
1936 | | |
1937 | | |
1938 | | |
1939 | 29.4k | for(i4_num_threads = 0; i4_num_threads < MAX_THREADS; i4_num_threads++) |
1940 | 23.5k | { |
1941 | | |
1942 | 23.5k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[i4_num_threads]; |
1943 | | |
1944 | | |
1945 | | /* --------------------------------------------------------------------- */ |
1946 | | /* Initializations */ |
1947 | | |
1948 | 23.5k | ps_dec_state->u2_header_done = 0; /* Header decoding not done */ |
1949 | | |
1950 | | |
1951 | 23.5k | { |
1952 | 23.5k | UWORD32 u4_max_frm_width,u4_max_frm_height; |
1953 | | |
1954 | 23.5k | u4_max_frm_width = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_wd); |
1955 | 23.5k | u4_max_frm_height = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_ht); |
1956 | | |
1957 | 23.5k | ps_dec_state->u2_create_max_width = u4_max_frm_width; |
1958 | 23.5k | ps_dec_state->u2_create_max_height = u4_max_frm_height; |
1959 | | |
1960 | 23.5k | ps_dec_state->i4_chromaFormat = ps_dec_init_ip->s_ivd_init_ip_t.e_output_format; |
1961 | 23.5k | ps_dec_state->u4_frm_buf_stride = 0 ; |
1962 | 23.5k | ps_dec_state->u2_frame_width = u4_max_frm_width; |
1963 | 23.5k | ps_dec_state->u2_picture_width = u4_max_frm_width; |
1964 | 23.5k | ps_dec_state->u2_horizontal_size = u4_max_frm_width; |
1965 | | |
1966 | 23.5k | ps_dec_state->u2_frame_height = u4_max_frm_height; |
1967 | 23.5k | ps_dec_state->u2_vertical_size = u4_max_frm_height; |
1968 | 23.5k | ps_dec_state->u4_share_disp_buf = u4_share_disp_buf; |
1969 | 23.5k | ps_dec_state->u4_deinterlace = u4_deinterlace; |
1970 | 23.5k | ps_dec_state->i4_threads_active = i4_threads_active; |
1971 | 23.5k | ps_dec_state->ps_deint_pic = NULL; |
1972 | 23.5k | } |
1973 | 23.5k | } |
1974 | | |
1975 | 5.88k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
1976 | | |
1977 | 5.88k | if((ps_dec_state->i4_chromaFormat == IV_YUV_422ILE) |
1978 | 0 | &&((ps_dec_state->u2_vertical_size & 0x1) != 0)) |
1979 | 0 | { |
1980 | | //printf("Error! Height should be multiple of 2 if Chroma format is 422ILE\n"); |
1981 | 0 | ps_dec_init_op->s_ivd_init_op_t.u4_error_code = IMPEG2D_INIT_CHROMA_FORMAT_HEIGHT_ERROR; |
1982 | 0 | return(IV_FAIL); |
1983 | | |
1984 | |
|
1985 | 0 | } |
1986 | | |
1987 | | /* --------------------------------------------------------------------- */ |
1988 | | |
1989 | | |
1990 | | /* ! */ |
1991 | | // picture buffer manager initialization will be done only for first thread |
1992 | 5.88k | impeg2_disp_mgr_init(&ps_dec_state->s_disp_mgr); |
1993 | 5.88k | impeg2_buf_mgr_init((buf_mgr_t *)ps_dec_state->pv_pic_buf_mg); |
1994 | | |
1995 | | /*************************************************************************/ |
1996 | | /* Internal Frame Buffers */ |
1997 | | /*************************************************************************/ |
1998 | | |
1999 | | |
2000 | | /* Set first frame to grey */ |
2001 | 5.88k | { |
2002 | 5.88k | ps_frm_buf = ps_mem_rec; |
2003 | 5.88k | memset(ps_frm_buf->pv_base, 128, ps_frm_buf->u4_mem_size); |
2004 | 5.88k | ps_frm_buf++; |
2005 | 5.88k | } |
2006 | | |
2007 | 5.88k | if(0 == ps_dec_state->u4_share_disp_buf) |
2008 | 5.88k | { |
2009 | 5.88k | pic_buf_t *ps_pic_buf; |
2010 | 5.88k | ps_pic_buf = (pic_buf_t *)ps_dec_state->pv_pic_buf_base; |
2011 | 35.3k | for(i = 0; i < NUM_INT_FRAME_BUFFERS; i++) |
2012 | 29.4k | { |
2013 | 29.4k | UWORD8 *pu1_buf; |
2014 | 29.4k | pu1_buf = ps_mem_rec->pv_base; |
2015 | | |
2016 | 29.4k | ps_pic_buf->pu1_y = pu1_buf; |
2017 | 29.4k | pu1_buf += i4_max_ht * i4_max_wd; |
2018 | | |
2019 | 29.4k | ps_pic_buf->pu1_u = pu1_buf; |
2020 | 29.4k | pu1_buf += i4_max_ht * i4_max_wd >> 2; |
2021 | | |
2022 | 29.4k | ps_pic_buf->pu1_v = pu1_buf; |
2023 | 29.4k | pu1_buf += i4_max_ht * i4_max_wd >> 2; |
2024 | | |
2025 | 29.4k | ps_pic_buf->i4_buf_id = i; |
2026 | | |
2027 | 29.4k | ps_pic_buf->u1_used_as_ref = 0; |
2028 | | |
2029 | 29.4k | ps_pic_buf->u4_ts = 0; |
2030 | | |
2031 | 29.4k | impeg2_buf_mgr_add(ps_dec_state->pv_pic_buf_mg, ps_pic_buf, i); |
2032 | 29.4k | ps_mem_rec++; |
2033 | 29.4k | ps_pic_buf++; |
2034 | 29.4k | } |
2035 | 5.88k | u4_num_mem_rec += NUM_INT_FRAME_BUFFERS; |
2036 | 5.88k | } |
2037 | 0 | else if (ps_dec_state->i4_chromaFormat != IV_YUV_420P) |
2038 | 0 | { |
2039 | 0 | for(i = 0; i < NUM_INT_FRAME_BUFFERS; i++) |
2040 | 0 | { |
2041 | 0 | ps_dec_state->pu1_chroma_ref_buf[i] = ps_mem_rec->pv_base; |
2042 | 0 | ps_mem_rec++; |
2043 | 0 | } |
2044 | |
|
2045 | 0 | u4_num_mem_rec += NUM_INT_FRAME_BUFFERS; |
2046 | 0 | } |
2047 | 0 | else |
2048 | 0 | { |
2049 | 0 | ps_mem_rec+=NUM_INT_FRAME_BUFFERS; |
2050 | 0 | u4_num_mem_rec += NUM_INT_FRAME_BUFFERS; |
2051 | 0 | } |
2052 | | |
2053 | | |
2054 | 5.88k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
2055 | | |
2056 | 5.88k | ps_dec_state->pu1_input_buffer = ps_mem_rec->pv_base; |
2057 | 5.88k | u4_num_mem_rec++; |
2058 | 5.88k | ps_mem_rec++; |
2059 | | |
2060 | 5.88k | ps_dec_state->pv_jobq_buf = ps_mem_rec->pv_base; |
2061 | 5.88k | ps_dec_state->i4_jobq_buf_size = ps_mem_rec->u4_mem_size; |
2062 | 5.88k | u4_num_mem_rec++; |
2063 | 5.88k | ps_mem_rec++; |
2064 | | |
2065 | 5.88k | ps_dec_state->u1_flushfrm = 0; |
2066 | 5.88k | ps_dec_state->u1_flushcnt = 0; |
2067 | 5.88k | ps_dec_state->pv_jobq = impeg2_jobq_init(ps_dec_state->pv_jobq_buf, ps_dec_state->i4_jobq_buf_size); |
2068 | | |
2069 | | |
2070 | 5.88k | ps_dec_state->pv_deinterlacer_ctxt = ps_mem_rec->pv_base; |
2071 | 5.88k | u4_num_mem_rec++; |
2072 | 5.88k | ps_mem_rec++; |
2073 | | |
2074 | 5.88k | ps_dec_state->pu1_deint_fmt_buf = ps_mem_rec->pv_base; |
2075 | 5.88k | u4_num_mem_rec++; |
2076 | 5.88k | ps_mem_rec++; |
2077 | | |
2078 | | |
2079 | | /*************************************************************************/ |
2080 | | /* Last MemTab is used for storing TabRecords */ |
2081 | | /*************************************************************************/ |
2082 | 5.88k | ps_dec_state->pv_memTab = (void *)ps_mem_rec->pv_base; |
2083 | 5.88k | memcpy(ps_mem_rec->pv_base,ps_dec_init_ip->s_ivd_init_ip_t.pv_mem_rec_location, ps_mem_rec->u4_mem_size); |
2084 | | /* Updating in Decoder Context with memRecords */ |
2085 | 5.88k | u4_num_mem_rec++; |
2086 | 5.88k | ps_mem_rec++; |
2087 | 5.88k | ps_dec_state->u4_num_mem_records = u4_num_mem_rec; |
2088 | | |
2089 | 5.88k | if(u4_num_mem_rec != ps_dec_init_ip->s_ivd_init_ip_t.u4_num_mem_rec) |
2090 | 0 | { |
2091 | 0 | ps_dec_init_op->s_ivd_init_op_t.u4_error_code = IMPEG2D_INIT_NUM_MEM_REC_NOT_SUFFICIENT; |
2092 | 0 | return(IV_FAIL); |
2093 | 0 | } |
2094 | | |
2095 | 5.88k | ps_dec_state->u4_num_frames_decoded = 0; |
2096 | 5.88k | ps_dec_state->aps_ref_pics[0] = NULL; |
2097 | 5.88k | ps_dec_state->aps_ref_pics[1] = NULL; |
2098 | | |
2099 | 5.88k | ps_dec_init_op->s_ivd_init_op_t.u4_error_code = IV_SUCCESS; |
2100 | | |
2101 | 5.88k | impeg2d_init_arch(ps_dec_state); |
2102 | | |
2103 | 5.88k | impeg2d_init_function_ptr(ps_dec_state); |
2104 | | |
2105 | 5.88k | return(IV_SUCCESS); |
2106 | 5.88k | } |
2107 | | |
2108 | | /*****************************************************************************/ |
2109 | | /* */ |
2110 | | /* Function Name : impeg2d_api_retrieve_mem_rec */ |
2111 | | /* */ |
2112 | | /* Description : */ |
2113 | | /* */ |
2114 | | /* Inputs : */ |
2115 | | /* Globals : <Does it use any global variables?> */ |
2116 | | /* Outputs : */ |
2117 | | /* Returns : void */ |
2118 | | /* */ |
2119 | | /* Issues : none */ |
2120 | | /* */ |
2121 | | /* Revision History: */ |
2122 | | /* */ |
2123 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
2124 | | /* 22 10 2008 100356 Draft */ |
2125 | | /* */ |
2126 | | /*****************************************************************************/ |
2127 | | IV_API_CALL_STATUS_T impeg2d_api_retrieve_mem_rec(iv_obj_t *ps_dechdl, |
2128 | | void *pv_api_ip, |
2129 | | void *pv_api_op) |
2130 | 5.88k | { |
2131 | 5.88k | UWORD32 u4_i; |
2132 | 5.88k | dec_state_t *ps_dec_state; |
2133 | 5.88k | dec_state_multi_core_t *ps_dec_state_multi_core; |
2134 | 5.88k | iv_mem_rec_t *ps_mem_rec; |
2135 | 5.88k | iv_mem_rec_t *ps_temp_rec; |
2136 | 5.88k | IMPEG2D_ERROR_CODES_T ret; |
2137 | 5.88k | dec_state_t *ps_dec_thd; |
2138 | | |
2139 | | |
2140 | | |
2141 | 5.88k | impeg2d_retrieve_mem_rec_ip_t *ps_retr_mem_rec_ip; |
2142 | 5.88k | impeg2d_retrieve_mem_rec_op_t *ps_retr_mem_rec_op; |
2143 | | |
2144 | 5.88k | ps_retr_mem_rec_ip = (impeg2d_retrieve_mem_rec_ip_t *)pv_api_ip; |
2145 | 5.88k | ps_retr_mem_rec_op = (impeg2d_retrieve_mem_rec_op_t *)pv_api_op; |
2146 | | |
2147 | 5.88k | ps_mem_rec = ps_retr_mem_rec_ip->s_ivd_retrieve_mem_rec_ip_t.pv_mem_rec_location; |
2148 | 5.88k | ps_dec_state_multi_core = (dec_state_multi_core_t *) (ps_dechdl->pv_codec_handle); |
2149 | 5.88k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
2150 | 5.88k | ps_temp_rec = ps_dec_state->pv_memTab; |
2151 | | |
2152 | 223k | for(u4_i = 0; u4_i < (ps_dec_state->u4_num_mem_records);u4_i++) |
2153 | 217k | { |
2154 | 217k | ps_mem_rec[u4_i].u4_mem_size = ps_temp_rec[u4_i].u4_mem_size; |
2155 | 217k | ps_mem_rec[u4_i].u4_mem_alignment = ps_temp_rec[u4_i].u4_mem_alignment; |
2156 | 217k | ps_mem_rec[u4_i].e_mem_type = ps_temp_rec[u4_i].e_mem_type; |
2157 | 217k | ps_mem_rec[u4_i].pv_base = ps_temp_rec[u4_i].pv_base; |
2158 | 217k | } |
2159 | | |
2160 | 5.88k | ps_retr_mem_rec_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code = IV_SUCCESS; |
2161 | 5.88k | ps_retr_mem_rec_op->s_ivd_retrieve_mem_rec_op_t.u4_num_mem_rec_filled = ps_dec_state->u4_num_mem_records; |
2162 | | |
2163 | 5.88k | if(ps_dec_state->i4_threads_active) |
2164 | 5.88k | { |
2165 | 5.88k | impeg2d_join_threads(ps_dec_state_multi_core); |
2166 | | |
2167 | 29.4k | for(u4_i = 0; u4_i < MAX_THREADS; u4_i++) |
2168 | 23.5k | { |
2169 | 23.5k | ps_dec_thd = ps_dec_state_multi_core->ps_dec_state[u4_i]; |
2170 | | |
2171 | 23.5k | ret = ithread_cond_destroy(ps_dec_thd->pv_proc_start_condition); |
2172 | 23.5k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) |
2173 | 0 | return(IV_FAIL); |
2174 | | |
2175 | 23.5k | ret = ithread_cond_destroy(ps_dec_thd->pv_proc_done_condition); |
2176 | 23.5k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) |
2177 | 0 | return(IV_FAIL); |
2178 | | |
2179 | 23.5k | ret = ithread_mutex_destroy(ps_dec_thd->pv_proc_start_mutex); |
2180 | 23.5k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) |
2181 | 0 | return(IV_FAIL); |
2182 | | |
2183 | 23.5k | ret = ithread_mutex_destroy(ps_dec_thd->pv_proc_done_mutex); |
2184 | 23.5k | if((IMPEG2D_ERROR_CODES_T)IV_SUCCESS != ret) |
2185 | 0 | return(IV_FAIL); |
2186 | 23.5k | } |
2187 | 5.88k | } |
2188 | | |
2189 | 5.88k | impeg2_jobq_deinit(ps_dec_state->pv_jobq); |
2190 | 5.88k | IMPEG2D_PRINT_STATISTICS(); |
2191 | | |
2192 | | |
2193 | 5.88k | return(IV_SUCCESS); |
2194 | | |
2195 | 5.88k | } |
2196 | | |
2197 | | /*****************************************************************************/ |
2198 | | /* */ |
2199 | | /* Function Name : impeg2d_api_ctl */ |
2200 | | /* */ |
2201 | | /* Description : */ |
2202 | | /* */ |
2203 | | /* Inputs : */ |
2204 | | /* Globals : <Does it use any global variables?> */ |
2205 | | /* Outputs : */ |
2206 | | /* Returns : void */ |
2207 | | /* */ |
2208 | | /* Issues : none */ |
2209 | | /* */ |
2210 | | /* Revision History: */ |
2211 | | /* */ |
2212 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
2213 | | /* 22 10 2008 100356 Draft */ |
2214 | | /* */ |
2215 | | /*****************************************************************************/ |
2216 | | IV_API_CALL_STATUS_T impeg2d_api_ctl(iv_obj_t *ps_dechdl, |
2217 | | void *pv_api_ip, |
2218 | | void *pv_api_op) |
2219 | 33.1k | { |
2220 | 33.1k | WORD32 i4_sub_cmd; |
2221 | 33.1k | UWORD32 *pu4_api_ip; |
2222 | 33.1k | IV_API_CALL_STATUS_T u4_error_code; |
2223 | | |
2224 | 33.1k | pu4_api_ip = (UWORD32 *)pv_api_ip; |
2225 | 33.1k | i4_sub_cmd = *(pu4_api_ip + 2); |
2226 | | |
2227 | 33.1k | switch(i4_sub_cmd) |
2228 | 33.1k | { |
2229 | 0 | case IVD_CMD_CTL_GETPARAMS: |
2230 | 0 | u4_error_code = impeg2d_api_get_status(ps_dechdl, (void *)pv_api_ip, |
2231 | 0 | (void *)pv_api_op); |
2232 | 0 | break; |
2233 | | |
2234 | 11.7k | case IVD_CMD_CTL_SETPARAMS: |
2235 | 11.7k | u4_error_code = impeg2d_api_set_params(ps_dechdl, (void *)pv_api_ip, |
2236 | 11.7k | (void *)pv_api_op); |
2237 | 11.7k | break; |
2238 | | |
2239 | 9.57k | case IVD_CMD_CTL_RESET: |
2240 | 9.57k | u4_error_code = impeg2d_api_reset(ps_dechdl, (void *)pv_api_ip, |
2241 | 9.57k | (void *)pv_api_op); |
2242 | 9.57k | break; |
2243 | | |
2244 | 0 | case IVD_CMD_CTL_SETDEFAULT: |
2245 | 0 | u4_error_code = impeg2d_api_set_default(ps_dechdl, |
2246 | 0 | (void *)pv_api_ip, |
2247 | 0 | (void *)pv_api_op); |
2248 | 0 | break; |
2249 | | |
2250 | 0 | case IVD_CMD_CTL_FLUSH: |
2251 | 0 | u4_error_code = impeg2d_api_set_flush_mode(ps_dechdl, |
2252 | 0 | (void *)pv_api_ip, |
2253 | 0 | (void *)pv_api_op); |
2254 | 0 | break; |
2255 | | |
2256 | 0 | case IVD_CMD_CTL_GETBUFINFO: |
2257 | 0 | u4_error_code = impeg2d_api_get_buf_info(ps_dechdl, |
2258 | 0 | (void *)pv_api_ip, |
2259 | 0 | (void *)pv_api_op); |
2260 | 0 | break; |
2261 | | |
2262 | 0 | case IVD_CMD_CTL_GETVERSION: |
2263 | 0 | u4_error_code = impeg2d_api_get_version(ps_dechdl, (void *)pv_api_ip, |
2264 | 0 | (void *)pv_api_op); |
2265 | 0 | break; |
2266 | | |
2267 | 5.88k | case IMPEG2D_CMD_CTL_SET_NUM_CORES: |
2268 | 5.88k | u4_error_code = impeg2d_api_set_num_cores(ps_dechdl, |
2269 | 5.88k | (void *)pv_api_ip, |
2270 | 5.88k | (void *)pv_api_op); |
2271 | 5.88k | break; |
2272 | | |
2273 | 0 | case IMPEG2D_CMD_CTL_GET_BUFFER_DIMENSIONS: |
2274 | 0 | u4_error_code = impeg2d_get_frame_dimensions(ps_dechdl, |
2275 | 0 | (void *)pv_api_ip, |
2276 | 0 | (void *)pv_api_op); |
2277 | 0 | break; |
2278 | | |
2279 | 0 | case IMPEG2D_CMD_CTL_GET_SEQ_INFO: |
2280 | 0 | u4_error_code = impeg2d_api_get_seq_info(ps_dechdl, |
2281 | 0 | (void *)pv_api_ip, |
2282 | 0 | (void *)pv_api_op); |
2283 | 0 | break; |
2284 | | |
2285 | 5.88k | case IMPEG2D_CMD_CTL_SET_PROCESSOR: |
2286 | 5.88k | u4_error_code = impeg2d_set_processor(ps_dechdl, (void *)pv_api_ip, |
2287 | 5.88k | (void *)pv_api_op); |
2288 | 5.88k | break; |
2289 | | |
2290 | 0 | default: |
2291 | 0 | u4_error_code = IV_FAIL; |
2292 | 0 | break; |
2293 | 33.1k | } |
2294 | | |
2295 | 33.1k | return (u4_error_code); |
2296 | | |
2297 | 33.1k | } |
2298 | | |
2299 | | /*****************************************************************************/ |
2300 | | /* */ |
2301 | | /* Function Name : impeg2d_api_check_struct_sanity */ |
2302 | | /* */ |
2303 | | /* Description : */ |
2304 | | /* */ |
2305 | | /* Inputs : */ |
2306 | | /* Globals : <Does it use any global variables?> */ |
2307 | | /* Outputs : */ |
2308 | | /* Returns : void */ |
2309 | | /* */ |
2310 | | /* Issues : none */ |
2311 | | /* */ |
2312 | | /* Revision History: */ |
2313 | | /* */ |
2314 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
2315 | | /* 22 10 2008 100356 Draft */ |
2316 | | /* */ |
2317 | | /*****************************************************************************/ |
2318 | | IV_API_CALL_STATUS_T impeg2d_api_check_struct_sanity(iv_obj_t *ps_handle, |
2319 | | void *pv_api_ip, |
2320 | | void *pv_api_op) |
2321 | 130k | { |
2322 | 130k | WORD32 i4_cmd; |
2323 | 130k | UWORD32 *pu4_api_ip; |
2324 | 130k | UWORD32 *pu4_api_op; |
2325 | 130k | WORD32 i,j; |
2326 | | |
2327 | 130k | if(NULL == pv_api_op) |
2328 | 0 | return(IV_FAIL); |
2329 | | |
2330 | 130k | if(NULL == pv_api_ip) |
2331 | 0 | return(IV_FAIL); |
2332 | | |
2333 | 130k | pu4_api_ip = (UWORD32 *)pv_api_ip; |
2334 | 130k | pu4_api_op = (UWORD32 *)pv_api_op; |
2335 | 130k | i4_cmd = (IVD_API_COMMAND_TYPE_T)*(pu4_api_ip + 1); |
2336 | | |
2337 | | /* error checks on handle */ |
2338 | 130k | switch(i4_cmd) |
2339 | 130k | { |
2340 | 11.7k | case IV_CMD_GET_NUM_MEM_REC: |
2341 | 23.5k | case IV_CMD_FILL_NUM_MEM_REC: |
2342 | 23.5k | break; |
2343 | 5.88k | case IV_CMD_INIT: |
2344 | 5.88k | if(ps_handle == NULL) |
2345 | 0 | { |
2346 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2347 | 0 | *(pu4_api_op + 1) |= IVD_HANDLE_NULL; |
2348 | 0 | return IV_FAIL; |
2349 | 0 | } |
2350 | | |
2351 | 5.88k | if(ps_handle->u4_size != sizeof(iv_obj_t)) |
2352 | 0 | { |
2353 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2354 | 0 | *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT; |
2355 | 0 | return IV_FAIL; |
2356 | 0 | } |
2357 | 5.88k | break; |
2358 | 5.88k | case IVD_CMD_GET_DISPLAY_FRAME: |
2359 | 61.9k | case IVD_CMD_VIDEO_DECODE: |
2360 | 67.8k | case IV_CMD_RETRIEVE_MEMREC: |
2361 | 67.8k | case IVD_CMD_SET_DISPLAY_FRAME: |
2362 | 67.8k | case IVD_CMD_REL_DISPLAY_FRAME: |
2363 | 100k | case IVD_CMD_VIDEO_CTL: |
2364 | 100k | { |
2365 | 100k | if(ps_handle == NULL) |
2366 | 0 | { |
2367 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2368 | 0 | *(pu4_api_op + 1) |= IVD_HANDLE_NULL; |
2369 | 0 | return IV_FAIL; |
2370 | 0 | } |
2371 | | |
2372 | 100k | if(ps_handle->u4_size != sizeof(iv_obj_t)) |
2373 | 0 | { |
2374 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2375 | 0 | *(pu4_api_op + 1) |= IVD_HANDLE_STRUCT_SIZE_INCORRECT; |
2376 | 0 | return IV_FAIL; |
2377 | 0 | } |
2378 | 100k | if(ps_handle->pv_fxns != impeg2d_api_function) |
2379 | 0 | { |
2380 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2381 | 0 | *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL; |
2382 | 0 | return IV_FAIL; |
2383 | 0 | } |
2384 | | |
2385 | 100k | if(ps_handle->pv_codec_handle == NULL) |
2386 | 0 | { |
2387 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2388 | 0 | *(pu4_api_op + 1) |= IVD_INVALID_HANDLE_NULL; |
2389 | 0 | return IV_FAIL; |
2390 | 0 | } |
2391 | 100k | } |
2392 | 100k | break; |
2393 | 100k | default: |
2394 | 0 | *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
2395 | 0 | *(pu4_api_op + 1) |= IVD_INVALID_API_CMD; |
2396 | 0 | return IV_FAIL; |
2397 | 130k | } |
2398 | | |
2399 | 130k | switch(i4_cmd) |
2400 | 130k | { |
2401 | 11.7k | case IV_CMD_GET_NUM_MEM_REC: |
2402 | 11.7k | { |
2403 | 11.7k | impeg2d_num_mem_rec_ip_t *ps_ip = (impeg2d_num_mem_rec_ip_t *)pv_api_ip; |
2404 | 11.7k | impeg2d_num_mem_rec_op_t *ps_op = (impeg2d_num_mem_rec_op_t *)pv_api_op; |
2405 | 11.7k | ps_op->s_ivd_num_mem_rec_op_t.u4_error_code = 0; |
2406 | | |
2407 | 11.7k | if(ps_ip->s_ivd_num_mem_rec_ip_t.u4_size != sizeof(impeg2d_num_mem_rec_ip_t)) |
2408 | 0 | { |
2409 | 0 | ps_op->s_ivd_num_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2410 | 0 | ps_op->s_ivd_num_mem_rec_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2411 | 0 | return(IV_FAIL); |
2412 | 0 | } |
2413 | | |
2414 | 11.7k | if(ps_op->s_ivd_num_mem_rec_op_t.u4_size != sizeof(impeg2d_num_mem_rec_op_t)) |
2415 | 0 | { |
2416 | 0 | ps_op->s_ivd_num_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2417 | 0 | ps_op->s_ivd_num_mem_rec_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2418 | 0 | return(IV_FAIL); |
2419 | 0 | } |
2420 | 11.7k | } |
2421 | 11.7k | break; |
2422 | 11.7k | case IV_CMD_FILL_NUM_MEM_REC: |
2423 | 11.7k | { |
2424 | 11.7k | impeg2d_fill_mem_rec_ip_t *ps_ip = (impeg2d_fill_mem_rec_ip_t *)pv_api_ip; |
2425 | 11.7k | impeg2d_fill_mem_rec_op_t *ps_op = (impeg2d_fill_mem_rec_op_t *)pv_api_op; |
2426 | 11.7k | iv_mem_rec_t *ps_mem_rec; |
2427 | | |
2428 | 11.7k | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code = 0; |
2429 | | |
2430 | 11.7k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_size != sizeof(impeg2d_fill_mem_rec_ip_t)) |
2431 | 0 | { |
2432 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2433 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2434 | 0 | return(IV_FAIL); |
2435 | 0 | } |
2436 | | |
2437 | 11.7k | if(ps_op->s_ivd_fill_mem_rec_op_t.u4_size != sizeof(impeg2d_fill_mem_rec_op_t)) |
2438 | 0 | { |
2439 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2440 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2441 | 0 | return(IV_FAIL); |
2442 | 0 | } |
2443 | | |
2444 | 11.7k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd < MIN_WIDTH) |
2445 | 0 | { |
2446 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2447 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_WIDTH_NOT_SUPPPORTED; |
2448 | 0 | return(IV_FAIL); |
2449 | 0 | } |
2450 | | |
2451 | 11.7k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd > MAX_WIDTH) |
2452 | 0 | { |
2453 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2454 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_WIDTH_NOT_SUPPPORTED; |
2455 | 0 | return(IV_FAIL); |
2456 | 0 | } |
2457 | | |
2458 | 11.7k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht < MIN_HEIGHT) |
2459 | 0 | { |
2460 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2461 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_HEIGHT_NOT_SUPPPORTED; |
2462 | 0 | return(IV_FAIL); |
2463 | 0 | } |
2464 | | |
2465 | 11.7k | if(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht > MAX_HEIGHT) |
2466 | 0 | { |
2467 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2468 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_REQUESTED_HEIGHT_NOT_SUPPPORTED; |
2469 | 0 | return(IV_FAIL); |
2470 | 0 | } |
2471 | | |
2472 | 11.7k | if(NULL == ps_ip->s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location) |
2473 | 0 | { |
2474 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2475 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_NUM_REC_NOT_SUFFICIENT; |
2476 | 0 | return(IV_FAIL); |
2477 | 0 | } |
2478 | | |
2479 | | /* check memrecords sizes are correct */ |
2480 | 11.7k | ps_mem_rec = ps_ip->s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location; |
2481 | 447k | for(i=0;i<NUM_MEM_RECORDS;i++) |
2482 | 435k | { |
2483 | 435k | if(ps_mem_rec[i].u4_size != sizeof(iv_mem_rec_t)) |
2484 | 0 | { |
2485 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2486 | 0 | ps_op->s_ivd_fill_mem_rec_op_t.u4_error_code |= IVD_MEM_REC_STRUCT_SIZE_INCORRECT; |
2487 | 0 | return IV_FAIL; |
2488 | 0 | } |
2489 | 435k | } |
2490 | 11.7k | } |
2491 | 11.7k | break; |
2492 | | |
2493 | 11.7k | case IV_CMD_INIT: |
2494 | 5.88k | { |
2495 | 5.88k | impeg2d_init_ip_t *ps_ip = (impeg2d_init_ip_t *)pv_api_ip; |
2496 | 5.88k | impeg2d_init_op_t *ps_op = (impeg2d_init_op_t *)pv_api_op; |
2497 | 5.88k | iv_mem_rec_t *ps_mem_rec; |
2498 | 5.88k | UWORD32 u4_tot_num_mem_recs; |
2499 | | |
2500 | 5.88k | ps_op->s_ivd_init_op_t.u4_error_code = 0; |
2501 | | |
2502 | 5.88k | if(ps_ip->s_ivd_init_ip_t.u4_size != sizeof(impeg2d_init_ip_t)) |
2503 | 0 | { |
2504 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2505 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2506 | 0 | return(IV_FAIL); |
2507 | 0 | } |
2508 | | |
2509 | 5.88k | if(ps_op->s_ivd_init_op_t.u4_size != sizeof(impeg2d_init_op_t)) |
2510 | 0 | { |
2511 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2512 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2513 | 0 | return(IV_FAIL); |
2514 | 0 | } |
2515 | | |
2516 | 5.88k | u4_tot_num_mem_recs = NUM_MEM_RECORDS; |
2517 | | |
2518 | | |
2519 | | |
2520 | | |
2521 | 5.88k | if(ps_ip->s_ivd_init_ip_t.u4_num_mem_rec > u4_tot_num_mem_recs) |
2522 | 0 | { |
2523 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2524 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_NOT_SUFFICIENT; |
2525 | 0 | return(IV_FAIL); |
2526 | 0 | } |
2527 | | |
2528 | 5.88k | if(ps_ip->s_ivd_init_ip_t.u4_frm_max_wd < MIN_WIDTH) |
2529 | 0 | { |
2530 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2531 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_WIDTH_NOT_SUPPPORTED; |
2532 | 0 | return(IV_FAIL); |
2533 | 0 | } |
2534 | | |
2535 | 5.88k | if(ps_ip->s_ivd_init_ip_t.u4_frm_max_wd > MAX_WIDTH) |
2536 | 0 | { |
2537 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2538 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_WIDTH_NOT_SUPPPORTED; |
2539 | 0 | return(IV_FAIL); |
2540 | 0 | } |
2541 | | |
2542 | 5.88k | if(ps_ip->s_ivd_init_ip_t.u4_frm_max_ht < MIN_HEIGHT) |
2543 | 0 | { |
2544 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2545 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_HEIGHT_NOT_SUPPPORTED; |
2546 | 0 | return(IV_FAIL); |
2547 | 0 | } |
2548 | | |
2549 | 5.88k | if(ps_ip->s_ivd_init_ip_t.u4_frm_max_ht > MAX_HEIGHT) |
2550 | 0 | { |
2551 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2552 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_HEIGHT_NOT_SUPPPORTED; |
2553 | 0 | return(IV_FAIL); |
2554 | 0 | } |
2555 | | |
2556 | 5.88k | if(NULL == ps_ip->s_ivd_init_ip_t.pv_mem_rec_location) |
2557 | 0 | { |
2558 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2559 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_NUM_REC_NOT_SUFFICIENT; |
2560 | 0 | return(IV_FAIL); |
2561 | 0 | } |
2562 | | |
2563 | 5.88k | if((ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_420P) && |
2564 | 3.27k | (ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_422ILE)&&(ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_420SP_UV)&&(ps_ip->s_ivd_init_ip_t.e_output_format != IV_YUV_420SP_VU)) |
2565 | 0 | { |
2566 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2567 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_COL_FMT_NOT_SUPPORTED; |
2568 | 0 | return(IV_FAIL); |
2569 | 0 | } |
2570 | | |
2571 | | /* verify number of mem records */ |
2572 | 5.88k | if(ps_ip->s_ivd_init_ip_t.u4_num_mem_rec < NUM_MEM_RECORDS) |
2573 | 0 | { |
2574 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2575 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_NOT_SUFFICIENT; |
2576 | 0 | return IV_FAIL; |
2577 | 0 | } |
2578 | | |
2579 | 5.88k | ps_mem_rec = ps_ip->s_ivd_init_ip_t.pv_mem_rec_location; |
2580 | | /* verify wether first memrecord is handle or not */ |
2581 | | /* |
2582 | | if(ps_mem_rec->pv_base != ps_handle) |
2583 | | { |
2584 | | // indicate the incorrect handle error |
2585 | | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2586 | | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INVALID_HANDLE; |
2587 | | return IV_FAIL; |
2588 | | } |
2589 | | */ |
2590 | | /* check memrecords sizes are correct */ |
2591 | 223k | for(i=0;i < (WORD32)ps_ip->s_ivd_init_ip_t.u4_num_mem_rec ; i++) |
2592 | 217k | { |
2593 | 217k | if(ps_mem_rec[i].u4_size != sizeof(iv_mem_rec_t)) |
2594 | 0 | { |
2595 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2596 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_MEM_REC_STRUCT_SIZE_INCORRECT; |
2597 | 0 | return IV_FAIL; |
2598 | 0 | } |
2599 | 217k | } |
2600 | | |
2601 | | /* verify memtabs for overlapping regions */ |
2602 | 5.88k | { |
2603 | 5.88k | UWORD8 *pau1_start[NUM_MEM_RECORDS]; |
2604 | 5.88k | UWORD8 *pau1_end[NUM_MEM_RECORDS]; |
2605 | | |
2606 | | |
2607 | 5.88k | pau1_start[0] = (UWORD8 *)(ps_mem_rec[0].pv_base); |
2608 | 5.88k | pau1_end[0] = (UWORD8 *)(ps_mem_rec[0].pv_base) + ps_mem_rec[0].u4_mem_size - 1; |
2609 | 217k | for(i = 1; i < (WORD32)ps_ip->s_ivd_init_ip_t.u4_num_mem_rec; i++) |
2610 | 211k | { |
2611 | | /* This array is populated to check memtab overlapp */ |
2612 | 211k | pau1_start[i] = (UWORD8 *)(ps_mem_rec[i].pv_base); |
2613 | 211k | pau1_end[i] = (UWORD8 *)(ps_mem_rec[i].pv_base) + ps_mem_rec[i].u4_mem_size - 1; |
2614 | | |
2615 | 4.13M | for(j = 0; j < i; j++) |
2616 | 3.91M | { |
2617 | 3.91M | if((pau1_start[i] >= pau1_start[j]) && (pau1_start[i] <= pau1_end[j])) |
2618 | 0 | { |
2619 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2620 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_OVERLAP_ERR; |
2621 | 0 | return IV_FAIL; |
2622 | 0 | } |
2623 | | |
2624 | 3.91M | if((pau1_end[i] >= pau1_start[j]) && (pau1_end[i] <= pau1_end[j])) |
2625 | 0 | { |
2626 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2627 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_OVERLAP_ERR; |
2628 | 0 | return IV_FAIL; |
2629 | 0 | } |
2630 | | |
2631 | 3.91M | if((pau1_start[i] < pau1_start[j]) && (pau1_end[i] > pau1_end[j])) |
2632 | 0 | { |
2633 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2634 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_OVERLAP_ERR; |
2635 | 0 | return IV_FAIL; |
2636 | 0 | } |
2637 | 3.91M | } |
2638 | 211k | } |
2639 | 5.88k | } |
2640 | | |
2641 | | |
2642 | | |
2643 | | |
2644 | 5.88k | { |
2645 | 5.88k | iv_mem_rec_t as_mem_rec_ittiam_api[NUM_MEM_RECORDS]; |
2646 | | |
2647 | 5.88k | impeg2d_fill_mem_rec_ip_t s_fill_mem_rec_ip; |
2648 | 5.88k | impeg2d_fill_mem_rec_op_t s_fill_mem_rec_op; |
2649 | 5.88k | IV_API_CALL_STATUS_T e_status; |
2650 | 5.88k | WORD32 i4_num_memrec; |
2651 | 5.88k | { |
2652 | | |
2653 | 5.88k | iv_num_mem_rec_ip_t s_no_of_mem_rec_query_ip; |
2654 | 5.88k | iv_num_mem_rec_op_t s_no_of_mem_rec_query_op; |
2655 | | |
2656 | | |
2657 | 5.88k | s_no_of_mem_rec_query_ip.u4_size = sizeof(iv_num_mem_rec_ip_t); |
2658 | 5.88k | s_no_of_mem_rec_query_op.u4_size = sizeof(iv_num_mem_rec_op_t); |
2659 | | |
2660 | 5.88k | s_no_of_mem_rec_query_ip.e_cmd = IV_CMD_GET_NUM_MEM_REC; |
2661 | 5.88k | impeg2d_api_function(NULL, |
2662 | 5.88k | (void *)&s_no_of_mem_rec_query_ip, |
2663 | 5.88k | (void *)&s_no_of_mem_rec_query_op); |
2664 | | |
2665 | 5.88k | i4_num_memrec = s_no_of_mem_rec_query_op.u4_num_mem_rec; |
2666 | | |
2667 | | |
2668 | | |
2669 | 5.88k | } |
2670 | | |
2671 | | |
2672 | | /* initialize mem records array with sizes */ |
2673 | 223k | for(i = 0; i < i4_num_memrec; i++) |
2674 | 217k | { |
2675 | 217k | as_mem_rec_ittiam_api[i].u4_size = sizeof(iv_mem_rec_t); |
2676 | 217k | } |
2677 | | |
2678 | 5.88k | s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.u4_size = sizeof(impeg2d_fill_mem_rec_ip_t); |
2679 | 5.88k | s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.e_cmd = IV_CMD_FILL_NUM_MEM_REC; |
2680 | 5.88k | s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd = ps_ip->s_ivd_init_ip_t.u4_frm_max_wd; |
2681 | 5.88k | s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.u4_max_frm_ht = ps_ip->s_ivd_init_ip_t.u4_frm_max_ht; |
2682 | 5.88k | s_fill_mem_rec_ip.s_ivd_fill_mem_rec_ip_t.pv_mem_rec_location = as_mem_rec_ittiam_api; |
2683 | 5.88k | s_fill_mem_rec_ip.u4_share_disp_buf = ps_ip->u4_share_disp_buf; |
2684 | 5.88k | s_fill_mem_rec_ip.e_output_format = ps_ip->s_ivd_init_ip_t.e_output_format; |
2685 | 5.88k | s_fill_mem_rec_op.s_ivd_fill_mem_rec_op_t.u4_size = sizeof(impeg2d_fill_mem_rec_op_t); |
2686 | | |
2687 | | |
2688 | 5.88k | e_status = impeg2d_api_function(NULL, |
2689 | 5.88k | (void *)&s_fill_mem_rec_ip, |
2690 | 5.88k | (void *)&s_fill_mem_rec_op); |
2691 | 5.88k | if(IV_FAIL == e_status) |
2692 | 0 | { |
2693 | 0 | ps_op->s_ivd_init_op_t.u4_error_code = s_fill_mem_rec_op.s_ivd_fill_mem_rec_op_t.u4_error_code; |
2694 | 0 | return(IV_FAIL); |
2695 | 0 | } |
2696 | | |
2697 | | |
2698 | | |
2699 | 223k | for(i = 0; i < i4_num_memrec; i ++) |
2700 | 217k | { |
2701 | 217k | if(ps_mem_rec[i].pv_base == NULL) |
2702 | 0 | { |
2703 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2704 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_BASE_NULL; |
2705 | 0 | return IV_FAIL; |
2706 | 0 | } |
2707 | | #ifdef CHECK_ALIGN |
2708 | | |
2709 | | if((UWORD32)(ps_mem_rec[i].pv_base) & (ps_mem_rec[i].u4_mem_alignment - 1)) |
2710 | | { |
2711 | | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2712 | | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_ALIGNMENT_ERR; |
2713 | | return IV_FAIL; |
2714 | | } |
2715 | | #endif //CHECK_ALIGN |
2716 | 217k | if(ps_mem_rec[i].u4_mem_alignment != as_mem_rec_ittiam_api[i].u4_mem_alignment) |
2717 | 0 | { |
2718 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2719 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_ALIGNMENT_ERR; |
2720 | 0 | return IV_FAIL; |
2721 | 0 | } |
2722 | | |
2723 | 217k | if(ps_mem_rec[i].u4_mem_size < as_mem_rec_ittiam_api[i].u4_mem_size) |
2724 | 0 | { |
2725 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2726 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_INSUFFICIENT_SIZE; |
2727 | 0 | return IV_FAIL; |
2728 | 0 | } |
2729 | | |
2730 | 217k | if(ps_mem_rec[i].e_mem_type != as_mem_rec_ittiam_api[i].e_mem_type) |
2731 | 0 | { |
2732 | 0 | if (IV_EXTERNAL_CACHEABLE_SCRATCH_MEM == as_mem_rec_ittiam_api[i].e_mem_type) |
2733 | 0 | { |
2734 | 0 | if (IV_EXTERNAL_CACHEABLE_PERSISTENT_MEM == ps_mem_rec[i].e_mem_type) |
2735 | 0 | { |
2736 | 0 | continue; |
2737 | 0 | } |
2738 | 0 | } |
2739 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2740 | 0 | ps_op->s_ivd_init_op_t.u4_error_code |= IVD_INIT_DEC_MEM_REC_INCORRECT_TYPE; |
2741 | 0 | return IV_FAIL; |
2742 | 0 | } |
2743 | 217k | } |
2744 | 5.88k | } |
2745 | | |
2746 | | |
2747 | 5.88k | } |
2748 | 5.88k | break; |
2749 | | |
2750 | 5.88k | case IVD_CMD_GET_DISPLAY_FRAME: |
2751 | 0 | { |
2752 | 0 | impeg2d_get_display_frame_ip_t *ps_ip = (impeg2d_get_display_frame_ip_t *)pv_api_ip; |
2753 | 0 | impeg2d_get_display_frame_op_t *ps_op = (impeg2d_get_display_frame_op_t *)pv_api_op; |
2754 | |
|
2755 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code = 0; |
2756 | |
|
2757 | 0 | if(ps_ip->s_ivd_get_display_frame_ip_t.u4_size != sizeof(impeg2d_get_display_frame_ip_t)) |
2758 | 0 | { |
2759 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2760 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2761 | 0 | return(IV_FAIL); |
2762 | 0 | } |
2763 | | |
2764 | 0 | if(ps_op->s_ivd_get_display_frame_op_t.u4_size != sizeof(impeg2d_get_display_frame_op_t)) |
2765 | 0 | { |
2766 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2767 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2768 | 0 | return(IV_FAIL); |
2769 | 0 | } |
2770 | | |
2771 | 0 | if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_num_bufs == 0) |
2772 | 0 | { |
2773 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2774 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUFS; |
2775 | 0 | return IV_FAIL; |
2776 | 0 | } |
2777 | | |
2778 | 0 | for(i = 0; i< (WORD32)ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_num_bufs;i++) |
2779 | 0 | { |
2780 | 0 | if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.pu1_bufs[i] == NULL) |
2781 | 0 | { |
2782 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2783 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_OP_BUF_NULL; |
2784 | 0 | return IV_FAIL; |
2785 | 0 | } |
2786 | | |
2787 | 0 | if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_min_out_buf_size[i] == 0) |
2788 | 0 | { |
2789 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2790 | 0 | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUF_SIZE; |
2791 | 0 | return IV_FAIL; |
2792 | 0 | } |
2793 | | /* |
2794 | | if(ps_ip->s_ivd_get_display_frame_ip_t.s_out_buffer.u4_min_out_buf_size[i] == 0) |
2795 | | { |
2796 | | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2797 | | ps_op->s_ivd_get_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUF_SIZE; |
2798 | | return IV_FAIL; |
2799 | | } |
2800 | | */ |
2801 | 0 | } |
2802 | 0 | } |
2803 | 0 | break; |
2804 | 0 | case IVD_CMD_REL_DISPLAY_FRAME: |
2805 | 0 | { |
2806 | 0 | impeg2d_rel_display_frame_ip_t *ps_ip = (impeg2d_rel_display_frame_ip_t *)pv_api_ip; |
2807 | 0 | impeg2d_rel_display_frame_op_t *ps_op = (impeg2d_rel_display_frame_op_t *)pv_api_op; |
2808 | |
|
2809 | 0 | ps_op->s_ivd_rel_display_frame_op_t.u4_error_code = 0; |
2810 | |
|
2811 | 0 | if ((ps_ip->s_ivd_rel_display_frame_ip_t.u4_size != sizeof(impeg2d_rel_display_frame_ip_t)) |
2812 | 0 | && (ps_ip->s_ivd_rel_display_frame_ip_t.u4_size != sizeof(ivd_rel_display_frame_ip_t))) |
2813 | 0 | { |
2814 | 0 | ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2815 | 0 | ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2816 | 0 | return(IV_FAIL); |
2817 | 0 | } |
2818 | | |
2819 | 0 | if((ps_op->s_ivd_rel_display_frame_op_t.u4_size != sizeof(impeg2d_rel_display_frame_op_t)) && |
2820 | 0 | (ps_op->s_ivd_rel_display_frame_op_t.u4_size != sizeof(ivd_rel_display_frame_op_t))) |
2821 | 0 | { |
2822 | 0 | ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2823 | 0 | ps_op->s_ivd_rel_display_frame_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2824 | 0 | return(IV_FAIL); |
2825 | 0 | } |
2826 | |
|
2827 | 0 | } |
2828 | 0 | break; |
2829 | | |
2830 | | |
2831 | 0 | case IVD_CMD_SET_DISPLAY_FRAME: |
2832 | 0 | { |
2833 | 0 | impeg2d_set_display_frame_ip_t *ps_ip = (impeg2d_set_display_frame_ip_t *)pv_api_ip; |
2834 | 0 | impeg2d_set_display_frame_op_t *ps_op = (impeg2d_set_display_frame_op_t *)pv_api_op; |
2835 | 0 | UWORD32 j, i; |
2836 | |
|
2837 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code = 0; |
2838 | |
|
2839 | 0 | if ((ps_ip->s_ivd_set_display_frame_ip_t.u4_size != sizeof(impeg2d_set_display_frame_ip_t)) |
2840 | 0 | && (ps_ip->s_ivd_set_display_frame_ip_t.u4_size != sizeof(ivd_set_display_frame_ip_t))) |
2841 | 0 | { |
2842 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2843 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2844 | 0 | return(IV_FAIL); |
2845 | 0 | } |
2846 | | |
2847 | 0 | if((ps_op->s_ivd_set_display_frame_op_t.u4_size != sizeof(impeg2d_set_display_frame_op_t)) && |
2848 | 0 | (ps_op->s_ivd_set_display_frame_op_t.u4_size != sizeof(ivd_set_display_frame_op_t))) |
2849 | 0 | { |
2850 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2851 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2852 | 0 | return(IV_FAIL); |
2853 | 0 | } |
2854 | | |
2855 | 0 | if(ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs == 0) |
2856 | 0 | { |
2857 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2858 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUFS; |
2859 | 0 | return IV_FAIL; |
2860 | 0 | } |
2861 | | |
2862 | 0 | for(j = 0; j < ps_ip->s_ivd_set_display_frame_ip_t.num_disp_bufs; j++) |
2863 | 0 | { |
2864 | 0 | if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs == 0) |
2865 | 0 | { |
2866 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2867 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUFS; |
2868 | 0 | return IV_FAIL; |
2869 | 0 | } |
2870 | | |
2871 | 0 | for(i=0;i< ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_num_bufs;i++) |
2872 | 0 | { |
2873 | 0 | if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].pu1_bufs[i] == NULL) |
2874 | 0 | { |
2875 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2876 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_OP_BUF_NULL; |
2877 | 0 | return IV_FAIL; |
2878 | 0 | } |
2879 | | |
2880 | 0 | if(ps_ip->s_ivd_set_display_frame_ip_t.s_disp_buffer[j].u4_min_out_buf_size[i] == 0) |
2881 | 0 | { |
2882 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2883 | 0 | ps_op->s_ivd_set_display_frame_op_t.u4_error_code |= IVD_DISP_FRM_ZERO_OP_BUF_SIZE; |
2884 | 0 | return IV_FAIL; |
2885 | 0 | } |
2886 | 0 | } |
2887 | 0 | } |
2888 | 0 | } |
2889 | 0 | break; |
2890 | | |
2891 | 61.9k | case IVD_CMD_VIDEO_DECODE: |
2892 | 61.9k | { |
2893 | 61.9k | impeg2d_video_decode_ip_t *ps_ip = (impeg2d_video_decode_ip_t *)pv_api_ip; |
2894 | 61.9k | impeg2d_video_decode_op_t *ps_op = (impeg2d_video_decode_op_t *)pv_api_op; |
2895 | | |
2896 | 61.9k | ps_op->s_ivd_video_decode_op_t.u4_error_code = 0; |
2897 | | |
2898 | 61.9k | if(ps_ip->s_ivd_video_decode_ip_t.u4_size != sizeof(impeg2d_video_decode_ip_t)) |
2899 | 0 | { |
2900 | 0 | ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2901 | 0 | ps_op->s_ivd_video_decode_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2902 | 0 | return(IV_FAIL); |
2903 | 0 | } |
2904 | | |
2905 | 61.9k | if(ps_op->s_ivd_video_decode_op_t.u4_size != sizeof(impeg2d_video_decode_op_t)) |
2906 | 0 | { |
2907 | 0 | ps_op->s_ivd_video_decode_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2908 | 0 | ps_op->s_ivd_video_decode_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2909 | 0 | return(IV_FAIL); |
2910 | 0 | } |
2911 | | |
2912 | 61.9k | } |
2913 | 61.9k | break; |
2914 | | |
2915 | 61.9k | case IV_CMD_RETRIEVE_MEMREC: |
2916 | 5.88k | { |
2917 | 5.88k | impeg2d_retrieve_mem_rec_ip_t *ps_ip = (impeg2d_retrieve_mem_rec_ip_t *)pv_api_ip; |
2918 | 5.88k | impeg2d_retrieve_mem_rec_op_t *ps_op = (impeg2d_retrieve_mem_rec_op_t *)pv_api_op; |
2919 | 5.88k | iv_mem_rec_t *ps_mem_rec; |
2920 | | |
2921 | 5.88k | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code = 0; |
2922 | | |
2923 | 5.88k | if(ps_ip->s_ivd_retrieve_mem_rec_ip_t.u4_size != sizeof(impeg2d_retrieve_mem_rec_ip_t)) |
2924 | 0 | { |
2925 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2926 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2927 | 0 | return(IV_FAIL); |
2928 | 0 | } |
2929 | | |
2930 | 5.88k | if(ps_op->s_ivd_retrieve_mem_rec_op_t.u4_size != sizeof(impeg2d_retrieve_mem_rec_op_t)) |
2931 | 0 | { |
2932 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2933 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2934 | 0 | return(IV_FAIL); |
2935 | 0 | } |
2936 | | |
2937 | 5.88k | ps_mem_rec = ps_ip->s_ivd_retrieve_mem_rec_ip_t.pv_mem_rec_location; |
2938 | | /* check memrecords sizes are correct */ |
2939 | 223k | for(i=0;i < NUM_MEM_RECORDS ; i++) |
2940 | 217k | { |
2941 | 217k | if(ps_mem_rec[i].u4_size != sizeof(iv_mem_rec_t)) |
2942 | 0 | { |
2943 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2944 | 0 | ps_op->s_ivd_retrieve_mem_rec_op_t.u4_error_code |= IVD_MEM_REC_STRUCT_SIZE_INCORRECT; |
2945 | 0 | return IV_FAIL; |
2946 | 0 | } |
2947 | 217k | } |
2948 | 5.88k | } |
2949 | 5.88k | break; |
2950 | | |
2951 | 33.1k | case IVD_CMD_VIDEO_CTL: |
2952 | 33.1k | { |
2953 | 33.1k | UWORD32 *pu4_ptr_cmd; |
2954 | 33.1k | UWORD32 u4_sub_command; |
2955 | | |
2956 | 33.1k | pu4_ptr_cmd = (UWORD32 *)pv_api_ip; |
2957 | 33.1k | pu4_ptr_cmd += 2; |
2958 | 33.1k | u4_sub_command = *pu4_ptr_cmd; |
2959 | | |
2960 | 33.1k | switch(u4_sub_command) |
2961 | 33.1k | { |
2962 | 11.7k | case IVD_CMD_CTL_SETPARAMS: |
2963 | 11.7k | { |
2964 | 11.7k | impeg2d_ctl_set_config_ip_t *ps_ip; |
2965 | 11.7k | impeg2d_ctl_set_config_op_t *ps_op; |
2966 | 11.7k | ps_ip = (impeg2d_ctl_set_config_ip_t *)pv_api_ip; |
2967 | 11.7k | ps_op = (impeg2d_ctl_set_config_op_t *)pv_api_op; |
2968 | | |
2969 | 11.7k | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code = 0; |
2970 | | |
2971 | 11.7k | if(ps_ip->s_ivd_ctl_set_config_ip_t.u4_size != sizeof(impeg2d_ctl_set_config_ip_t)) |
2972 | 0 | { |
2973 | 0 | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2974 | 0 | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
2975 | 0 | return IV_FAIL; |
2976 | 0 | } |
2977 | 11.7k | } |
2978 | 11.7k | case IVD_CMD_CTL_SETDEFAULT: |
2979 | 11.7k | { |
2980 | 11.7k | impeg2d_ctl_set_config_op_t *ps_op; |
2981 | 11.7k | ps_op = (impeg2d_ctl_set_config_op_t *)pv_api_op; |
2982 | 11.7k | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code = 0; |
2983 | | |
2984 | 11.7k | if(ps_op->s_ivd_ctl_set_config_op_t.u4_size != sizeof(impeg2d_ctl_set_config_op_t)) |
2985 | 0 | { |
2986 | 0 | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
2987 | 0 | ps_op->s_ivd_ctl_set_config_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
2988 | 0 | return IV_FAIL; |
2989 | 0 | } |
2990 | 11.7k | } |
2991 | 11.7k | break; |
2992 | | |
2993 | 11.7k | case IVD_CMD_CTL_GETPARAMS: |
2994 | 0 | { |
2995 | 0 | impeg2d_ctl_getstatus_ip_t *ps_ip; |
2996 | 0 | impeg2d_ctl_getstatus_op_t *ps_op; |
2997 | |
|
2998 | 0 | ps_ip = (impeg2d_ctl_getstatus_ip_t *)pv_api_ip; |
2999 | 0 | ps_op = (impeg2d_ctl_getstatus_op_t *)pv_api_op; |
3000 | |
|
3001 | 0 | ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code = 0; |
3002 | |
|
3003 | 0 | if(ps_ip->s_ivd_ctl_getstatus_ip_t.u4_size != sizeof(impeg2d_ctl_getstatus_ip_t)) |
3004 | 0 | { |
3005 | 0 | ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3006 | 0 | ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3007 | 0 | return IV_FAIL; |
3008 | 0 | } |
3009 | 0 | if(ps_op->s_ivd_ctl_getstatus_op_t.u4_size != sizeof(impeg2d_ctl_getstatus_op_t)) |
3010 | 0 | { |
3011 | 0 | ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3012 | 0 | ps_op->s_ivd_ctl_getstatus_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3013 | 0 | return IV_FAIL; |
3014 | 0 | } |
3015 | 0 | } |
3016 | 0 | break; |
3017 | | |
3018 | 0 | case IVD_CMD_CTL_GETBUFINFO: |
3019 | 0 | { |
3020 | 0 | impeg2d_ctl_getbufinfo_ip_t *ps_ip; |
3021 | 0 | impeg2d_ctl_getbufinfo_op_t *ps_op; |
3022 | 0 | ps_ip = (impeg2d_ctl_getbufinfo_ip_t *)pv_api_ip; |
3023 | 0 | ps_op = (impeg2d_ctl_getbufinfo_op_t *)pv_api_op; |
3024 | |
|
3025 | 0 | ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code = 0; |
3026 | |
|
3027 | 0 | if(ps_ip->s_ivd_ctl_getbufinfo_ip_t.u4_size != sizeof(impeg2d_ctl_getbufinfo_ip_t)) |
3028 | 0 | { |
3029 | 0 | ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3030 | 0 | ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3031 | 0 | return IV_FAIL; |
3032 | 0 | } |
3033 | 0 | if(ps_op->s_ivd_ctl_getbufinfo_op_t.u4_size != sizeof(impeg2d_ctl_getbufinfo_op_t)) |
3034 | 0 | { |
3035 | 0 | ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3036 | 0 | ps_op->s_ivd_ctl_getbufinfo_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3037 | 0 | return IV_FAIL; |
3038 | 0 | } |
3039 | 0 | } |
3040 | 0 | break; |
3041 | | |
3042 | 0 | case IVD_CMD_CTL_GETVERSION: |
3043 | 0 | { |
3044 | 0 | impeg2d_ctl_getversioninfo_ip_t *ps_ip; |
3045 | 0 | impeg2d_ctl_getversioninfo_op_t *ps_op; |
3046 | 0 | ps_ip = (impeg2d_ctl_getversioninfo_ip_t *)pv_api_ip; |
3047 | 0 | ps_op = (impeg2d_ctl_getversioninfo_op_t *)pv_api_op; |
3048 | |
|
3049 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code = 0; |
3050 | |
|
3051 | 0 | if(ps_ip->s_ivd_ctl_getversioninfo_ip_t.u4_size != sizeof(impeg2d_ctl_getversioninfo_ip_t)) |
3052 | 0 | { |
3053 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3054 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3055 | 0 | return IV_FAIL; |
3056 | 0 | } |
3057 | 0 | if(ps_op->s_ivd_ctl_getversioninfo_op_t.u4_size != sizeof(impeg2d_ctl_getversioninfo_op_t)) |
3058 | 0 | { |
3059 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3060 | 0 | ps_op->s_ivd_ctl_getversioninfo_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3061 | 0 | return IV_FAIL; |
3062 | 0 | } |
3063 | 0 | } |
3064 | 0 | break; |
3065 | | |
3066 | 0 | case IVD_CMD_CTL_FLUSH: |
3067 | 0 | { |
3068 | 0 | impeg2d_ctl_flush_ip_t *ps_ip; |
3069 | 0 | impeg2d_ctl_flush_op_t *ps_op; |
3070 | 0 | ps_ip = (impeg2d_ctl_flush_ip_t *)pv_api_ip; |
3071 | 0 | ps_op = (impeg2d_ctl_flush_op_t *)pv_api_op; |
3072 | |
|
3073 | 0 | ps_op->s_ivd_ctl_flush_op_t.u4_error_code = 0; |
3074 | |
|
3075 | 0 | if(ps_ip->s_ivd_ctl_flush_ip_t.u4_size != sizeof(impeg2d_ctl_flush_ip_t)) |
3076 | 0 | { |
3077 | 0 | ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3078 | 0 | ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3079 | 0 | return IV_FAIL; |
3080 | 0 | } |
3081 | 0 | if(ps_op->s_ivd_ctl_flush_op_t.u4_size != sizeof(impeg2d_ctl_flush_op_t)) |
3082 | 0 | { |
3083 | 0 | ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3084 | 0 | ps_op->s_ivd_ctl_flush_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3085 | 0 | return IV_FAIL; |
3086 | 0 | } |
3087 | 0 | } |
3088 | 0 | break; |
3089 | | |
3090 | 9.57k | case IVD_CMD_CTL_RESET: |
3091 | 9.57k | { |
3092 | 9.57k | impeg2d_ctl_reset_ip_t *ps_ip; |
3093 | 9.57k | impeg2d_ctl_reset_op_t *ps_op; |
3094 | 9.57k | ps_ip = (impeg2d_ctl_reset_ip_t *)pv_api_ip; |
3095 | 9.57k | ps_op = (impeg2d_ctl_reset_op_t *)pv_api_op; |
3096 | | |
3097 | 9.57k | ps_op->s_ivd_ctl_reset_op_t.u4_error_code = 0; |
3098 | | |
3099 | 9.57k | if(ps_ip->s_ivd_ctl_reset_ip_t.u4_size != sizeof(impeg2d_ctl_reset_ip_t)) |
3100 | 0 | { |
3101 | 0 | ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3102 | 0 | ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3103 | 0 | return IV_FAIL; |
3104 | 0 | } |
3105 | 9.57k | if(ps_op->s_ivd_ctl_reset_op_t.u4_size != sizeof(impeg2d_ctl_reset_op_t)) |
3106 | 0 | { |
3107 | 0 | ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3108 | 0 | ps_op->s_ivd_ctl_reset_op_t.u4_error_code |= IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3109 | 0 | return IV_FAIL; |
3110 | 0 | } |
3111 | 9.57k | } |
3112 | 9.57k | break; |
3113 | | |
3114 | 9.57k | case IMPEG2D_CMD_CTL_GET_BUFFER_DIMENSIONS: |
3115 | 0 | { |
3116 | 0 | impeg2d_ctl_get_frame_dimensions_ip_t *ps_ip; |
3117 | 0 | impeg2d_ctl_get_frame_dimensions_op_t *ps_op; |
3118 | |
|
3119 | 0 | ps_ip = |
3120 | 0 | (impeg2d_ctl_get_frame_dimensions_ip_t *)pv_api_ip; |
3121 | 0 | ps_op = |
3122 | 0 | (impeg2d_ctl_get_frame_dimensions_op_t *)pv_api_op; |
3123 | |
|
3124 | 0 | if(ps_ip->u4_size |
3125 | 0 | != sizeof(impeg2d_ctl_get_frame_dimensions_ip_t)) |
3126 | 0 | { |
3127 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3128 | 0 | ps_op->u4_error_code |= |
3129 | 0 | IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3130 | 0 | return IV_FAIL; |
3131 | 0 | } |
3132 | | |
3133 | 0 | if(ps_op->u4_size |
3134 | 0 | != sizeof(impeg2d_ctl_get_frame_dimensions_op_t)) |
3135 | 0 | { |
3136 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3137 | 0 | ps_op->u4_error_code |= |
3138 | 0 | IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3139 | 0 | return IV_FAIL; |
3140 | 0 | } |
3141 | | |
3142 | 0 | break; |
3143 | 0 | } |
3144 | 0 | case IMPEG2D_CMD_CTL_GET_SEQ_INFO: |
3145 | 0 | { |
3146 | 0 | impeg2d_ctl_get_seq_info_ip_t *ps_ip; |
3147 | 0 | impeg2d_ctl_get_seq_info_op_t *ps_op; |
3148 | |
|
3149 | 0 | ps_ip = |
3150 | 0 | (impeg2d_ctl_get_seq_info_ip_t *)pv_api_ip; |
3151 | 0 | ps_op = |
3152 | 0 | (impeg2d_ctl_get_seq_info_op_t *)pv_api_op; |
3153 | |
|
3154 | 0 | if(ps_ip->u4_size |
3155 | 0 | != sizeof(impeg2d_ctl_get_seq_info_ip_t)) |
3156 | 0 | { |
3157 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3158 | 0 | ps_op->u4_error_code |= |
3159 | 0 | IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3160 | 0 | return IV_FAIL; |
3161 | 0 | } |
3162 | | |
3163 | 0 | if(ps_op->u4_size |
3164 | 0 | != sizeof(impeg2d_ctl_get_seq_info_op_t)) |
3165 | 0 | { |
3166 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3167 | 0 | ps_op->u4_error_code |= |
3168 | 0 | IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3169 | 0 | return IV_FAIL; |
3170 | 0 | } |
3171 | | |
3172 | 0 | break; |
3173 | 0 | } |
3174 | 5.88k | case IMPEG2D_CMD_CTL_SET_NUM_CORES: |
3175 | 5.88k | { |
3176 | 5.88k | impeg2d_ctl_set_num_cores_ip_t *ps_ip; |
3177 | 5.88k | impeg2d_ctl_set_num_cores_op_t *ps_op; |
3178 | | |
3179 | 5.88k | ps_ip = (impeg2d_ctl_set_num_cores_ip_t *)pv_api_ip; |
3180 | 5.88k | ps_op = (impeg2d_ctl_set_num_cores_op_t *)pv_api_op; |
3181 | | |
3182 | 5.88k | if(ps_ip->u4_size |
3183 | 5.88k | != sizeof(impeg2d_ctl_set_num_cores_ip_t)) |
3184 | 0 | { |
3185 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3186 | 0 | ps_op->u4_error_code |= |
3187 | 0 | IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3188 | 0 | return IV_FAIL; |
3189 | 0 | } |
3190 | | |
3191 | 5.88k | if(ps_op->u4_size |
3192 | 5.88k | != sizeof(impeg2d_ctl_set_num_cores_op_t)) |
3193 | 0 | { |
3194 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3195 | 0 | ps_op->u4_error_code |= |
3196 | 0 | IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3197 | 0 | return IV_FAIL; |
3198 | 0 | } |
3199 | | |
3200 | 5.88k | #ifdef MULTICORE |
3201 | 5.88k | if((ps_ip->u4_num_cores < 1) || (ps_ip->u4_num_cores > MAX_THREADS)) |
3202 | | #else |
3203 | | if(ps_ip->u4_num_cores != 1) |
3204 | | #endif |
3205 | 0 | { |
3206 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3207 | 0 | return IV_FAIL; |
3208 | 0 | } |
3209 | 5.88k | break; |
3210 | 5.88k | } |
3211 | 5.88k | case IMPEG2D_CMD_CTL_SET_PROCESSOR: |
3212 | 5.88k | { |
3213 | 5.88k | impeg2d_ctl_set_processor_ip_t *ps_ip; |
3214 | 5.88k | impeg2d_ctl_set_processor_op_t *ps_op; |
3215 | | |
3216 | 5.88k | ps_ip = (impeg2d_ctl_set_processor_ip_t *)pv_api_ip; |
3217 | 5.88k | ps_op = (impeg2d_ctl_set_processor_op_t *)pv_api_op; |
3218 | | |
3219 | 5.88k | if(ps_ip->u4_size |
3220 | 5.88k | != sizeof(impeg2d_ctl_set_processor_ip_t)) |
3221 | 0 | { |
3222 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3223 | 0 | ps_op->u4_error_code |= |
3224 | 0 | IVD_IP_API_STRUCT_SIZE_INCORRECT; |
3225 | 0 | return IV_FAIL; |
3226 | 0 | } |
3227 | | |
3228 | 5.88k | if(ps_op->u4_size |
3229 | 5.88k | != sizeof(impeg2d_ctl_set_processor_op_t)) |
3230 | 0 | { |
3231 | 0 | ps_op->u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3232 | 0 | ps_op->u4_error_code |= |
3233 | 0 | IVD_OP_API_STRUCT_SIZE_INCORRECT; |
3234 | 0 | return IV_FAIL; |
3235 | 0 | } |
3236 | | |
3237 | 5.88k | break; |
3238 | 5.88k | } |
3239 | 5.88k | default: |
3240 | 0 | break; |
3241 | | |
3242 | 33.1k | } |
3243 | 33.1k | } |
3244 | 33.1k | break; |
3245 | | |
3246 | 33.1k | default: |
3247 | 0 | { *(pu4_api_op + 1) |= 1 << IVD_UNSUPPORTEDPARAM; |
3248 | 0 | *(pu4_api_op + 1) |= IVD_UNSUPPORTED_API_CMD; |
3249 | 0 | return IV_FAIL; |
3250 | 33.1k | } |
3251 | | |
3252 | | |
3253 | 130k | } |
3254 | | |
3255 | 130k | return IV_SUCCESS; |
3256 | 130k | } |
3257 | | |
3258 | | /*****************************************************************************/ |
3259 | | /* */ |
3260 | | /* Function Name : impeg2d_api_entity */ |
3261 | | /* */ |
3262 | | /* Description : */ |
3263 | | /* */ |
3264 | | /* Inputs : */ |
3265 | | /* Globals : <Does it use any global variables?> */ |
3266 | | /* Outputs : */ |
3267 | | /* Returns : void */ |
3268 | | /* */ |
3269 | | /* Issues : none */ |
3270 | | /* */ |
3271 | | /* Revision History: */ |
3272 | | /* */ |
3273 | | /* DD MM YYYY Author(s) Changes (Describe the changes made) */ |
3274 | | /* 22 10 2008 100356 Draft */ |
3275 | | /* */ |
3276 | | /*****************************************************************************/ |
3277 | | |
3278 | | |
3279 | | IV_API_CALL_STATUS_T impeg2d_api_entity(iv_obj_t *ps_dechdl, |
3280 | | void *pv_api_ip, |
3281 | | void *pv_api_op) |
3282 | 61.9k | { |
3283 | 61.9k | iv_obj_t *ps_dec_handle; |
3284 | 61.9k | dec_state_t *ps_dec_state; |
3285 | 61.9k | dec_state_multi_core_t *ps_dec_state_multi_core; |
3286 | | |
3287 | 61.9k | impeg2d_video_decode_ip_t *ps_dec_ip; |
3288 | | |
3289 | 61.9k | impeg2d_video_decode_op_t *ps_dec_op; |
3290 | 61.9k | WORD32 bytes_remaining; |
3291 | 61.9k | pic_buf_t *ps_disp_pic; |
3292 | | |
3293 | | |
3294 | | |
3295 | 61.9k | ps_dec_ip = (impeg2d_video_decode_ip_t *)pv_api_ip; |
3296 | 61.9k | ps_dec_op = (impeg2d_video_decode_op_t *)pv_api_op; |
3297 | | |
3298 | 61.9k | memset(ps_dec_op,0,sizeof(impeg2d_video_decode_op_t)); |
3299 | | |
3300 | 61.9k | ps_dec_op->s_ivd_video_decode_op_t.u4_size = sizeof(impeg2d_video_decode_op_t); |
3301 | 61.9k | ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 0; |
3302 | 61.9k | bytes_remaining = ps_dec_ip->s_ivd_video_decode_ip_t.u4_num_Bytes; |
3303 | | |
3304 | 61.9k | ps_dec_handle = (iv_obj_t *)ps_dechdl; |
3305 | | |
3306 | 61.9k | if(ps_dechdl == NULL) |
3307 | 0 | { |
3308 | 0 | return(IV_FAIL); |
3309 | 0 | } |
3310 | | |
3311 | | |
3312 | | |
3313 | 61.9k | ps_dec_state_multi_core = ps_dec_handle->pv_codec_handle; |
3314 | 61.9k | ps_dec_state = ps_dec_state_multi_core->ps_dec_state[0]; |
3315 | | |
3316 | 61.9k | ps_dec_state->ps_disp_frm_buf = &(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf); |
3317 | 61.9k | if(0 == ps_dec_state->u4_share_disp_buf) |
3318 | 61.9k | { |
3319 | 61.9k | ps_dec_state->ps_disp_frm_buf->pv_y_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0]; |
3320 | 61.9k | ps_dec_state->ps_disp_frm_buf->pv_u_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1]; |
3321 | 61.9k | ps_dec_state->ps_disp_frm_buf->pv_v_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2]; |
3322 | 61.9k | } |
3323 | | |
3324 | 61.9k | ps_dec_state->ps_disp_pic = NULL; |
3325 | 61.9k | ps_dec_state->i4_frame_decoded = 0; |
3326 | | /*rest bytes consumed */ |
3327 | 61.9k | ps_dec_op->s_ivd_video_decode_op_t.u4_num_bytes_consumed = 0; |
3328 | | |
3329 | 61.9k | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code = IV_SUCCESS; |
3330 | | |
3331 | 61.9k | if((ps_dec_ip->s_ivd_video_decode_ip_t.pv_stream_buffer == NULL)&&(ps_dec_state->u1_flushfrm==0)) |
3332 | 0 | { |
3333 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code |= 1 << IVD_UNSUPPORTEDPARAM; |
3334 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code |= IVD_DEC_FRM_BS_BUF_NULL; |
3335 | 0 | return IV_FAIL; |
3336 | 0 | } |
3337 | | |
3338 | | |
3339 | 61.9k | if (ps_dec_state->u4_num_frames_decoded > NUM_FRAMES_LIMIT) |
3340 | 0 | { |
3341 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code = IMPEG2D_SAMPLE_VERSION_LIMIT_ERR; |
3342 | 0 | return(IV_FAIL); |
3343 | 0 | } |
3344 | | |
3345 | 61.9k | if(((0 == ps_dec_state->u2_header_done) || (ps_dec_state->u2_decode_header == 1)) && (ps_dec_state->u1_flushfrm == 0)) |
3346 | 21.3k | { |
3347 | 21.3k | impeg2d_dec_hdr(ps_dec_state,ps_dec_ip ,ps_dec_op); |
3348 | 21.3k | bytes_remaining -= ps_dec_op->s_ivd_video_decode_op_t.u4_num_bytes_consumed; |
3349 | 21.3k | } |
3350 | | |
3351 | 61.9k | if((1 != ps_dec_state->u2_decode_header) && |
3352 | 51.5k | (((bytes_remaining > 0) && (1 == ps_dec_state->u2_header_done)) || ps_dec_state->u1_flushfrm)) |
3353 | 43.9k | { |
3354 | 43.9k | if(ps_dec_state->u1_flushfrm) |
3355 | 0 | { |
3356 | 0 | if(ps_dec_state->aps_ref_pics[1] != NULL) |
3357 | 0 | { |
3358 | 0 | impeg2_disp_mgr_add(&ps_dec_state->s_disp_mgr, ps_dec_state->aps_ref_pics[1], ps_dec_state->aps_ref_pics[1]->i4_buf_id); |
3359 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->aps_ref_pics[1]->i4_buf_id, BUF_MGR_REF); |
3360 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->aps_ref_pics[0]->i4_buf_id, BUF_MGR_REF); |
3361 | |
|
3362 | 0 | ps_dec_state->aps_ref_pics[1] = NULL; |
3363 | 0 | ps_dec_state->aps_ref_pics[0] = NULL; |
3364 | |
|
3365 | 0 | } |
3366 | 0 | else if(ps_dec_state->aps_ref_pics[0] != NULL) |
3367 | 0 | { |
3368 | 0 | impeg2_disp_mgr_add(&ps_dec_state->s_disp_mgr, ps_dec_state->aps_ref_pics[0], ps_dec_state->aps_ref_pics[0]->i4_buf_id); |
3369 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->aps_ref_pics[0]->i4_buf_id, BUF_MGR_REF); |
3370 | |
|
3371 | 0 | ps_dec_state->aps_ref_pics[0] = NULL; |
3372 | 0 | } |
3373 | 0 | ps_dec_ip->s_ivd_video_decode_ip_t.u4_size = sizeof(impeg2d_video_decode_ip_t); |
3374 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_size = sizeof(impeg2d_video_decode_op_t); |
3375 | |
|
3376 | 0 | ps_disp_pic = impeg2_disp_mgr_get(&ps_dec_state->s_disp_mgr, &ps_dec_state->i4_disp_buf_id); |
3377 | |
|
3378 | 0 | ps_dec_state->ps_disp_pic = ps_disp_pic; |
3379 | 0 | if(ps_disp_pic == NULL) |
3380 | 0 | { |
3381 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 0; |
3382 | 0 | } |
3383 | 0 | else |
3384 | 0 | { |
3385 | 0 | WORD32 fmt_conv; |
3386 | 0 | if(0 == ps_dec_state->u4_share_disp_buf) |
3387 | 0 | { |
3388 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_y_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0]; |
3389 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_u_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1]; |
3390 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_v_buf = ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2]; |
3391 | 0 | fmt_conv = 1; |
3392 | 0 | } |
3393 | 0 | else |
3394 | 0 | { |
3395 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_y_buf = ps_disp_pic->pu1_y; |
3396 | 0 | if(IV_YUV_420P == ps_dec_state->i4_chromaFormat) |
3397 | 0 | { |
3398 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_u_buf = ps_disp_pic->pu1_u; |
3399 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_v_buf = ps_disp_pic->pu1_v; |
3400 | 0 | fmt_conv = 0; |
3401 | 0 | } |
3402 | 0 | else |
3403 | 0 | { |
3404 | 0 | UWORD8 *pu1_buf; |
3405 | |
|
3406 | 0 | pu1_buf = ps_dec_state->as_disp_buffers[ps_disp_pic->i4_buf_id].pu1_bufs[1]; |
3407 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_u_buf = pu1_buf; |
3408 | |
|
3409 | 0 | pu1_buf = ps_dec_state->as_disp_buffers[ps_disp_pic->i4_buf_id].pu1_bufs[2]; |
3410 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.pv_v_buf = pu1_buf; |
3411 | 0 | fmt_conv = 1; |
3412 | 0 | } |
3413 | 0 | } |
3414 | |
|
3415 | 0 | if(fmt_conv == 1) |
3416 | 0 | { |
3417 | 0 | iv_yuv_buf_t *ps_dst; |
3418 | | |
3419 | |
|
3420 | 0 | ps_dst = &(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf); |
3421 | 0 | if(ps_dec_state->u4_deinterlace && (0 == ps_dec_state->u2_progressive_frame)) |
3422 | 0 | { |
3423 | 0 | impeg2d_deinterlace(ps_dec_state, |
3424 | 0 | ps_disp_pic, |
3425 | 0 | ps_dst, |
3426 | 0 | 0, |
3427 | 0 | ps_dec_state->u2_vertical_size); |
3428 | |
|
3429 | 0 | } |
3430 | 0 | else |
3431 | 0 | { |
3432 | 0 | impeg2d_format_convert(ps_dec_state, |
3433 | 0 | ps_disp_pic, |
3434 | 0 | ps_dst, |
3435 | 0 | 0, |
3436 | 0 | ps_dec_state->u2_vertical_size); |
3437 | 0 | } |
3438 | 0 | } |
3439 | |
|
3440 | 0 | if(ps_dec_state->u4_deinterlace) |
3441 | 0 | { |
3442 | 0 | if(ps_dec_state->ps_deint_pic) |
3443 | 0 | { |
3444 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, |
3445 | 0 | ps_dec_state->ps_deint_pic->i4_buf_id, |
3446 | 0 | MPEG2_BUF_MGR_DEINT); |
3447 | 0 | } |
3448 | 0 | ps_dec_state->ps_deint_pic = ps_disp_pic; |
3449 | 0 | } |
3450 | 0 | if(0 == ps_dec_state->u4_share_disp_buf) |
3451 | 0 | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_disp_pic->i4_buf_id, BUF_MGR_DISP); |
3452 | |
|
3453 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_pic_ht = ps_dec_state->u2_vertical_size; |
3454 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_pic_wd = ps_dec_state->u2_horizontal_size; |
3455 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 1; |
3456 | |
|
3457 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_disp_buf_id = ps_disp_pic->i4_buf_id; |
3458 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_ts = ps_disp_pic->u4_ts; |
3459 | |
|
3460 | 0 | ps_dec_op->s_ivd_video_decode_op_t.e_output_format = (IV_COLOR_FORMAT_T)ps_dec_state->i4_chromaFormat; |
3461 | |
|
3462 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_is_ref_flag = (B_PIC != ps_dec_state->e_pic_type); |
3463 | |
|
3464 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_progressive_frame_flag = IV_PROGRESSIVE; |
3465 | |
|
3466 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_wd = ps_dec_state->u2_horizontal_size; |
3467 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_strd = ps_dec_state->u4_frm_buf_stride; |
3468 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_ht = ps_dec_state->u2_vertical_size; |
3469 | |
|
3470 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1; |
3471 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1; |
3472 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = (ps_dec_state->u2_vertical_size + 1) >> 1; |
3473 | |
|
3474 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1; |
3475 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1; |
3476 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = (ps_dec_state->u2_vertical_size + 1) >> 1; |
3477 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_size = sizeof(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf); |
3478 | |
|
3479 | 0 | switch(ps_dec_state->i4_chromaFormat) |
3480 | 0 | { |
3481 | 0 | case IV_YUV_420SP_UV: |
3482 | 0 | case IV_YUV_420SP_VU: |
3483 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (((ps_dec_state->u2_horizontal_size + 1) >> 1) << 1); |
3484 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = ps_dec_state->u4_frm_buf_stride; |
3485 | 0 | break; |
3486 | 0 | case IV_YUV_422ILE: |
3487 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = 0; |
3488 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = 0; |
3489 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = 0; |
3490 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = 0; |
3491 | 0 | break; |
3492 | 0 | default: |
3493 | 0 | break; |
3494 | 0 | } |
3495 | | |
3496 | |
|
3497 | 0 | } |
3498 | 0 | if(ps_dec_op->s_ivd_video_decode_op_t.u4_output_present) |
3499 | 0 | { |
3500 | 0 | if(1 == ps_dec_op->s_ivd_video_decode_op_t.u4_output_present) |
3501 | 0 | { |
3502 | 0 | INSERT_LOGO(ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0], |
3503 | 0 | ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1], |
3504 | 0 | ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2], |
3505 | 0 | ps_dec_state->u4_frm_buf_stride, |
3506 | 0 | ps_dec_state->u2_horizontal_size, |
3507 | 0 | ps_dec_state->u2_vertical_size, |
3508 | 0 | ps_dec_state->i4_chromaFormat, |
3509 | 0 | ps_dec_state->u2_horizontal_size, |
3510 | 0 | ps_dec_state->u2_vertical_size); |
3511 | 0 | } |
3512 | 0 | return(IV_SUCCESS); |
3513 | 0 | } |
3514 | 0 | else |
3515 | 0 | { |
3516 | 0 | ps_dec_state->u1_flushfrm = 0; |
3517 | |
|
3518 | 0 | return(IV_FAIL); |
3519 | 0 | } |
3520 | |
|
3521 | 0 | } |
3522 | 43.9k | else if(ps_dec_state->u1_flushfrm==0) |
3523 | 43.9k | { |
3524 | 43.9k | ps_dec_ip->s_ivd_video_decode_ip_t.u4_size = sizeof(impeg2d_video_decode_ip_t); |
3525 | 43.9k | ps_dec_op->s_ivd_video_decode_op_t.u4_size = sizeof(impeg2d_video_decode_op_t); |
3526 | 43.9k | if(ps_dec_ip->s_ivd_video_decode_ip_t.u4_num_Bytes < 4) |
3527 | 223 | { |
3528 | 223 | ps_dec_op->s_ivd_video_decode_op_t.u4_num_bytes_consumed = ps_dec_ip->s_ivd_video_decode_ip_t.u4_num_Bytes; |
3529 | 223 | return(IV_FAIL); |
3530 | 223 | } |
3531 | | |
3532 | 43.7k | if(1 == ps_dec_state->u4_share_disp_buf) |
3533 | 0 | { |
3534 | 0 | if(0 == impeg2_buf_mgr_check_free(ps_dec_state->pv_pic_buf_mg)) |
3535 | 0 | { |
3536 | 0 | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code = |
3537 | 0 | (IMPEG2D_ERROR_CODES_T)IVD_DEC_REF_BUF_NULL; |
3538 | 0 | return IV_FAIL; |
3539 | 0 | } |
3540 | 0 | } |
3541 | | |
3542 | | |
3543 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.e_output_format = (IV_COLOR_FORMAT_T)ps_dec_state->i4_chromaFormat; |
3544 | | |
3545 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.u4_is_ref_flag = (B_PIC != ps_dec_state->e_pic_type); |
3546 | | |
3547 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.u4_progressive_frame_flag = IV_PROGRESSIVE; |
3548 | | |
3549 | 43.7k | if (0 == ps_dec_state->u4_frm_buf_stride) |
3550 | 0 | { |
3551 | 0 | ps_dec_state->u4_frm_buf_stride = (ps_dec_state->u2_horizontal_size); |
3552 | 0 | } |
3553 | | |
3554 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_wd = ps_dec_state->u2_horizontal_size; |
3555 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_strd = ps_dec_state->u4_frm_buf_stride; |
3556 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_y_ht = ps_dec_state->u2_vertical_size; |
3557 | | |
3558 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1; |
3559 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1; |
3560 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = (ps_dec_state->u2_vertical_size + 1) >> 1; |
3561 | | |
3562 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = (ps_dec_state->u2_horizontal_size + 1) >> 1; |
3563 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_strd = (ps_dec_state->u4_frm_buf_stride + 1) >> 1; |
3564 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = (ps_dec_state->u2_vertical_size + 1) >> 1; |
3565 | 43.7k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_size = sizeof(ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf); |
3566 | | |
3567 | 43.7k | switch(ps_dec_state->i4_chromaFormat) |
3568 | 43.7k | { |
3569 | 10.0k | case IV_YUV_420SP_UV: |
3570 | 22.8k | case IV_YUV_420SP_VU: |
3571 | 22.8k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = (((ps_dec_state->u2_horizontal_size + 1) >> 1) << 1); |
3572 | 22.8k | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_strd = ps_dec_state->u4_frm_buf_stride; |
3573 | 22.8k | break; |
3574 | 0 | case IV_YUV_422ILE: |
3575 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_wd = 0; |
3576 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_u_ht = 0; |
3577 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_wd = 0; |
3578 | 0 | ps_dec_op->s_ivd_video_decode_op_t.s_disp_frm_buf.u4_v_ht = 0; |
3579 | 0 | break; |
3580 | 20.8k | default: |
3581 | 20.8k | break; |
3582 | 43.7k | } |
3583 | | |
3584 | 43.7k | if( ps_dec_state->u1_flushfrm == 0) |
3585 | 43.7k | { |
3586 | 43.7k | ps_dec_state->u1_flushcnt = 0; |
3587 | | |
3588 | 43.7k | ps_dec_state->ps_out_buf = &ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer; |
3589 | 43.7k | if (IV_SUCCESS != check_app_out_buf_size(ps_dec_state)) |
3590 | 928 | { |
3591 | 928 | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code = IVD_DISP_FRM_ZERO_OP_BUF_SIZE; |
3592 | 928 | return IV_FAIL; |
3593 | 928 | } |
3594 | | |
3595 | | /*************************************************************************/ |
3596 | | /* Frame Decode */ |
3597 | | /*************************************************************************/ |
3598 | 42.8k | ps_dec_state->u4_inp_ts = ps_dec_ip->s_ivd_video_decode_ip_t.u4_ts; |
3599 | | |
3600 | 42.8k | impeg2d_dec_frm(ps_dec_state,ps_dec_ip,ps_dec_op); |
3601 | | |
3602 | 42.8k | if (IVD_ERROR_NONE == |
3603 | 42.8k | ps_dec_op->s_ivd_video_decode_op_t.u4_error_code) |
3604 | 27.9k | { |
3605 | 27.9k | if(ps_dec_state->u1_first_frame_done == 0) |
3606 | 4.65k | { |
3607 | 4.65k | ps_dec_state->u1_first_frame_done = 1; |
3608 | 4.65k | } |
3609 | | |
3610 | 27.9k | if(ps_dec_state->ps_disp_pic) |
3611 | 16.6k | { |
3612 | 16.6k | ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 1; |
3613 | 16.6k | switch(ps_dec_state->ps_disp_pic->e_pic_type) |
3614 | 16.6k | { |
3615 | 3.45k | case I_PIC : |
3616 | 3.45k | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_I_FRAME; |
3617 | 3.45k | break; |
3618 | | |
3619 | 3.57k | case P_PIC: |
3620 | 3.57k | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_P_FRAME; |
3621 | 3.57k | break; |
3622 | | |
3623 | 3.42k | case B_PIC: |
3624 | 3.42k | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_B_FRAME; |
3625 | 3.42k | break; |
3626 | | |
3627 | 6.17k | case D_PIC: |
3628 | 6.17k | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_I_FRAME; |
3629 | 6.17k | break; |
3630 | | |
3631 | 0 | default : |
3632 | 0 | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_FRAMETYPE_DEFAULT; |
3633 | 0 | break; |
3634 | 16.6k | } |
3635 | 16.6k | } |
3636 | 11.2k | else |
3637 | 11.2k | { |
3638 | 11.2k | ps_dec_op->s_ivd_video_decode_op_t.u4_output_present = 0; |
3639 | 11.2k | ps_dec_op->s_ivd_video_decode_op_t.e_pic_type = IV_NA_FRAME; |
3640 | 11.2k | } |
3641 | | |
3642 | 27.9k | ps_dec_state->u4_num_frames_decoded++; |
3643 | 27.9k | } |
3644 | 42.8k | } |
3645 | 0 | else |
3646 | 0 | { |
3647 | 0 | ps_dec_state->u1_flushcnt++; |
3648 | 0 | } |
3649 | 43.7k | } |
3650 | 42.8k | if(ps_dec_state->ps_disp_pic) |
3651 | 16.6k | { |
3652 | 16.6k | ps_dec_op->s_ivd_video_decode_op_t.u4_disp_buf_id = ps_dec_state->ps_disp_pic->i4_buf_id; |
3653 | 16.6k | ps_dec_op->s_ivd_video_decode_op_t.u4_ts = ps_dec_state->ps_disp_pic->u4_ts; |
3654 | | |
3655 | 16.6k | if(0 == ps_dec_state->u4_share_disp_buf) |
3656 | 16.6k | { |
3657 | 16.6k | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, ps_dec_state->ps_disp_pic->i4_buf_id, BUF_MGR_DISP); |
3658 | 16.6k | } |
3659 | 16.6k | } |
3660 | | |
3661 | 42.8k | if(ps_dec_state->u4_deinterlace) |
3662 | 42.8k | { |
3663 | 42.8k | if(ps_dec_state->ps_deint_pic) |
3664 | 15.7k | { |
3665 | 15.7k | impeg2_buf_mgr_release(ps_dec_state->pv_pic_buf_mg, |
3666 | 15.7k | ps_dec_state->ps_deint_pic->i4_buf_id, |
3667 | 15.7k | MPEG2_BUF_MGR_DEINT); |
3668 | 15.7k | } |
3669 | 42.8k | ps_dec_state->ps_deint_pic = ps_dec_state->ps_disp_pic; |
3670 | 42.8k | } |
3671 | | |
3672 | 42.8k | if(1 == ps_dec_op->s_ivd_video_decode_op_t.u4_output_present) |
3673 | 16.6k | { |
3674 | 16.6k | INSERT_LOGO(ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[0], |
3675 | 16.6k | ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[1], |
3676 | 16.6k | ps_dec_ip->s_ivd_video_decode_ip_t.s_out_buffer.pu1_bufs[2], |
3677 | 16.6k | ps_dec_state->u4_frm_buf_stride, |
3678 | 16.6k | ps_dec_state->u2_horizontal_size, |
3679 | 16.6k | ps_dec_state->u2_vertical_size, |
3680 | 16.6k | ps_dec_state->i4_chromaFormat, |
3681 | 16.6k | ps_dec_state->u2_horizontal_size, |
3682 | 16.6k | ps_dec_state->u2_vertical_size); |
3683 | 16.6k | } |
3684 | | |
3685 | 42.8k | } |
3686 | | |
3687 | 60.8k | ps_dec_op->s_ivd_video_decode_op_t.u4_progressive_frame_flag = 1; |
3688 | 60.8k | ps_dec_op->s_ivd_video_decode_op_t.e4_fld_type = ps_dec_state->s_disp_op.e4_fld_type; |
3689 | | |
3690 | | |
3691 | 60.8k | if(ps_dec_op->s_ivd_video_decode_op_t.u4_error_code) |
3692 | 26.8k | return IV_FAIL; |
3693 | 33.9k | else |
3694 | 33.9k | return IV_SUCCESS; |
3695 | 60.8k | } |