Coverage Report

Created: 2025-07-11 06:38

/src/libxaac/decoder/ixheaacd_adts_crc_check.c
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/******************************************************************************
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 *                                                                            *
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 * Copyright (C) 2018 The Android Open Source Project
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 *
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 * Licensed under the Apache License, Version 2.0 (the "License");
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 * you may not use this file except in compliance with the License.
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 * You may obtain a copy of the License at:
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 *
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 * http://www.apache.org/licenses/LICENSE-2.0
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 *
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 * Unless required by applicable law or agreed to in writing, software
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 * distributed under the License is distributed on an "AS IS" BASIS,
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 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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 * See the License for the specific language governing permissions and
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 * limitations under the License.
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 *
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 *****************************************************************************
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 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
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*/
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#include "ixheaac_type_def.h"
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#include "ixheaac_constants.h"
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#include "ixheaacd_memory_standards.h"
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#include "ixheaacd_mps_struct_def.h"
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#include "ixheaacd_mps_res_rom.h"
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#include "ixheaacd_defines.h"
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#include "ixheaacd_mps_aac_struct.h"
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#include "ixheaacd_sbr_common.h"
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#include "ixheaacd_bitbuffer.h"
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#include "ixheaacd_defines.h"
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#include "ixheaacd_aac_rom.h"
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#include "ixheaacd_sbrdecsettings.h"
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#include "ixheaacd_sbr_scale.h"
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#include "ixheaacd_env_extr_part.h"
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#include "ixheaacd_sbr_rom.h"
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#include "ixheaacd_common_rom.h"
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#include "ixheaacd_pulsedata.h"
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#include "ixheaacd_pns.h"
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#include "ixheaacd_drc_data_struct.h"
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#include "ixheaacd_lt_predict.h"
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#include "ixheaacd_cnst.h"
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#include "ixheaacd_ec_defines.h"
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#include "ixheaacd_ec_struct_def.h"
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#include "ixheaacd_channelinfo.h"
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#include "ixheaacd_drc_dec.h"
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#include "ixheaacd_sbrdecoder.h"
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#include "ixheaacd_channel.h"
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#include "ixheaacd_audioobjtypes.h"
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#include "ixheaacd_memory_standards.h"
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#include "ixheaacd_adts.h"
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#include "ixheaacd_audioobjtypes.h"
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#include "ixheaacd_latmdemux.h"
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#include "ixheaacd_aacdec.h"
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#include "ixheaacd_hybrid.h"
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#include "ixheaacd_ps_dec.h"
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#include "ixheaacd_mps_polyphase.h"
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#include "ixheaacd_config.h"
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#include "ixheaacd_qmf_dec.h"
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#include "ixheaacd_mps_dec.h"
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#include "ixheaacd_struct_def.h"
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#include "ixheaacd_error_codes.h"
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#include "ixheaacd_adts_crc_check.h"
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2.25M
VOID ixheaacd_adts_crc_open(ia_adts_crc_info_struct *ptr_adts_crc_info) {
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2.25M
  WORD32 i, j;
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2.25M
  UWORD16 val;
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2.25M
  ptr_adts_crc_info->no_reg = 0;
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2.25M
  ptr_adts_crc_info->crc_active = 0;
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580M
  for (i = 0; i <= 255; ++i) {
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5.20G
    for (val = i << 8, j = 8; --j >= 0;) {
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4.62G
      val = (val & 0x8000) ? (val << 1) ^ 0x8005 : val << 1;
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4.62G
    }
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577M
    ptr_adts_crc_info->crc_lookup[i] = val;
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577M
  }
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2.25M
}
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VOID ixheaacd_copy_bit_buf_state(
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    ia_bit_buf_struct *it_bit_buff_src,
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172k
    ia_crc_bit_buf_struct_handle it_crc_bit_buff_dst) {
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172k
  it_crc_bit_buff_dst->ptr_bit_buf_base = it_bit_buff_src->ptr_bit_buf_base;
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172k
  it_crc_bit_buff_dst->ptr_bit_buf_end = it_bit_buff_src->ptr_bit_buf_end;
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172k
  it_crc_bit_buff_dst->ptr_read_next = it_bit_buff_src->ptr_read_next;
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172k
  it_crc_bit_buff_dst->bit_pos = it_bit_buff_src->bit_pos;
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172k
  it_crc_bit_buff_dst->cnt_bits = it_bit_buff_src->cnt_bits;
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172k
  it_crc_bit_buff_dst->size = it_bit_buff_src->size;
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172k
}
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WORD32 ixheaacd_adts_crc_start_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
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                                   ia_bit_buf_struct *it_bit_buff_src,
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172k
                                   WORD32 no_bits) {
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172k
  UWORD32 no_bytes;
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172k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].bit_cnt = 0;
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172k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].max_bits =
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172k
      no_bits;
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172k
  if (no_bits < 0) {
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0
    no_bits = -no_bits;
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0
  }
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172k
  if (no_bits == 0) {
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111
    no_bits = 16 << 3;
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  }
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172k
  no_bytes = no_bits >> 3;
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172k
  if (no_bytes << 3 < (UWORD32)no_bits) {
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0
    no_bytes++;
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0
  }
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172k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].buf_size =
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172k
      no_bytes;
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172k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].active = 1;
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172k
  ixheaacd_copy_bit_buf_state(
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172k
      it_bit_buff_src,
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172k
      &(ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg]
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172k
            .str_bit_buf));
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172k
  ptr_adts_crc_info->no_reg += 1;
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172k
  return (ptr_adts_crc_info->no_reg - 1);
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172k
}
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VOID ixheaacd_adts_crc_end_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
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80.3k
                               ia_bit_buf_struct *it_bit_buff_src, WORD32 reg) {
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80.3k
  ptr_adts_crc_info->str_crc_reg_data[reg].active = 0;
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80.3k
  ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt =
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80.3k
      ptr_adts_crc_info->str_crc_reg_data[reg].str_bit_buf.cnt_bits -
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80.3k
      it_bit_buff_src->cnt_bits;
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80.3k
}
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VOID ixheaacd_adts_crc_fast_crc(ia_adts_crc_info_struct *ptr_adts_crc_info,
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5.82k
                                UWORD16 *crc_reg, UWORD8 feed) {
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5.82k
  *crc_reg =
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5.82k
      (*crc_reg << 8) ^ ptr_adts_crc_info->crc_lookup[(*crc_reg >> 8) ^ feed];
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5.82k
}
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VOID ixheaacd_adts_crc_slow_crc(UWORD16 *crc_reg, UWORD8 feed,
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461
                                UWORD32 no_bits) {
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461
  UWORD32 i;
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461
  UWORD16 tmp;
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1.62k
  for (i = 0; i < no_bits; i++) {
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1.16k
    tmp = (feed & (1 << (7 - i))) >> (7 - i);
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1.16k
    tmp ^= (*crc_reg & (1 << 15)) >> 15;
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1.16k
    tmp *= 32773;
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1.16k
    *crc_reg <<= 1;
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1.16k
    *crc_reg ^= tmp;
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1.16k
  }
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461
}
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WORD32 ixheaacd_adts_crc_check_crc(ia_adts_crc_info_struct *ptr_adts_crc_info) {
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124
  WORD32 error_code = AAC_DEC_OK;
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  UWORD16 crc = 65535;
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  WORD32 reg;
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  ia_crc_reg_data_struct *ptr_reg_data;
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440
  for (reg = 0; reg < ptr_adts_crc_info->no_reg; reg++) {
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316
    UWORD8 bits;
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316
    WORD32 bits_remaining;
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316
    ptr_reg_data = &ptr_adts_crc_info->str_crc_reg_data[reg];
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316
    if (ptr_reg_data->max_bits > 0) {
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298
      if (ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt >
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          ptr_reg_data->max_bits)
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34
        bits_remaining = ptr_reg_data->max_bits;
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264
      else
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        bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
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298
    } else {
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18
      bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
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18
    }
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3.94k
    while (bits_remaining >= 8) {
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3.63k
      if (ptr_reg_data->str_bit_buf.cnt_bits < 8) {
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0
        return IA_XHEAAC_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES;
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0
      }
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3.63k
      bits = (UWORD8)ixheaacd_read_bits_buf(
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3.63k
          (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
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3.63k
                                     .str_bit_buf),
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3.63k
          8);
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3.63k
      ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, bits);
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3.63k
      bits_remaining -= 8;
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3.63k
    }
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200
316
    if (ptr_reg_data->str_bit_buf.cnt_bits < bits_remaining) {
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0
      return IA_XHEAAC_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES;
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0
    }
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316
    bits = (UWORD8)ixheaacd_read_bits_buf(
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316
        (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
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316
                                   .str_bit_buf),
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316
        bits_remaining);
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316
    ixheaacd_adts_crc_slow_crc(&crc, (UWORD8)(bits << (8 - bits_remaining)),
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316
                               bits_remaining);
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316
    if (ptr_reg_data->max_bits >
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316
        ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt) {
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145
      bits_remaining = ptr_reg_data->max_bits -
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145
                       ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
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2.33k
      for (; bits_remaining >= 8; bits_remaining -= 8) {
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2.19k
        ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, 0);
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2.19k
      }
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145
      ixheaacd_adts_crc_slow_crc(&crc, 0, bits_remaining);
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145
    }
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316
  }
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  ptr_adts_crc_info->no_reg = 0;
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  if (crc != ptr_adts_crc_info->file_value) {
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123
    return (IA_XHEAAC_DEC_EXE_NONFATAL_ADTS_HDR_CRC_FAIL);
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123
  }
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1
  return (error_code);
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}