Coverage Report

Created: 2025-12-08 06:50

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/libxaac/decoder/ixheaacd_adts_crc_check.c
Line
Count
Source
1
/******************************************************************************
2
 *                                                                            *
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 * Copyright (C) 2018 The Android Open Source Project
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 *
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 * Licensed under the Apache License, Version 2.0 (the "License");
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 * you may not use this file except in compliance with the License.
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 * You may obtain a copy of the License at:
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 *
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 * http://www.apache.org/licenses/LICENSE-2.0
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 *
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 * Unless required by applicable law or agreed to in writing, software
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 * distributed under the License is distributed on an "AS IS" BASIS,
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 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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 * See the License for the specific language governing permissions and
15
 * limitations under the License.
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 *
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 *****************************************************************************
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 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
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*/
20
#include "ixheaac_type_def.h"
21
#include "ixheaac_constants.h"
22
#include "ixheaacd_memory_standards.h"
23
#include "ixheaacd_mps_struct_def.h"
24
#include "ixheaacd_mps_res_rom.h"
25
#include "ixheaacd_defines.h"
26
#include "ixheaacd_mps_aac_struct.h"
27
28
#include "ixheaacd_sbr_common.h"
29
#include "ixheaacd_bitbuffer.h"
30
#include "ixheaacd_defines.h"
31
#include "ixheaacd_aac_rom.h"
32
33
#include "ixheaacd_sbrdecsettings.h"
34
#include "ixheaacd_sbr_scale.h"
35
#include "ixheaacd_env_extr_part.h"
36
#include "ixheaacd_sbr_rom.h"
37
38
#include "ixheaacd_common_rom.h"
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#include "ixheaacd_pulsedata.h"
40
41
#include "ixheaacd_pns.h"
42
#include "ixheaacd_drc_data_struct.h"
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44
#include "ixheaacd_lt_predict.h"
45
#include "ixheaacd_cnst.h"
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#include "ixheaacd_ec_defines.h"
47
#include "ixheaacd_ec_struct_def.h"
48
49
#include "ixheaacd_channelinfo.h"
50
#include "ixheaacd_drc_dec.h"
51
#include "ixheaacd_sbrdecoder.h"
52
53
#include "ixheaacd_channel.h"
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55
#include "ixheaacd_audioobjtypes.h"
56
#include "ixheaacd_memory_standards.h"
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#include "ixheaacd_adts.h"
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#include "ixheaacd_audioobjtypes.h"
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#include "ixheaacd_latmdemux.h"
60
#include "ixheaacd_aacdec.h"
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#include "ixheaacd_hybrid.h"
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#include "ixheaacd_ps_dec.h"
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#include "ixheaacd_mps_polyphase.h"
66
#include "ixheaacd_config.h"
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#include "ixheaacd_qmf_dec.h"
68
#include "ixheaacd_mps_dec.h"
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#include "ixheaacd_struct_def.h"
71
#include "ixheaacd_error_codes.h"
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73
#include "ixheaacd_adts_crc_check.h"
74
75
2.00M
VOID ixheaacd_adts_crc_open(ia_adts_crc_info_struct *ptr_adts_crc_info) {
76
2.00M
  WORD32 i, j;
77
2.00M
  UWORD16 val;
78
79
2.00M
  ptr_adts_crc_info->no_reg = 0;
80
2.00M
  ptr_adts_crc_info->crc_active = 0;
81
82
514M
  for (i = 0; i <= 255; ++i) {
83
4.60G
    for (val = i << 8, j = 8; --j >= 0;) {
84
4.09G
      val = (val & 0x8000) ? (val << 1) ^ 0x8005 : val << 1;
85
4.09G
    }
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87
512M
    ptr_adts_crc_info->crc_lookup[i] = val;
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512M
  }
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2.00M
}
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91
VOID ixheaacd_copy_bit_buf_state(
92
    ia_bit_buf_struct *it_bit_buff_src,
93
152k
    ia_crc_bit_buf_struct_handle it_crc_bit_buff_dst) {
94
152k
  it_crc_bit_buff_dst->ptr_bit_buf_base = it_bit_buff_src->ptr_bit_buf_base;
95
152k
  it_crc_bit_buff_dst->ptr_bit_buf_end = it_bit_buff_src->ptr_bit_buf_end;
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152k
  it_crc_bit_buff_dst->ptr_read_next = it_bit_buff_src->ptr_read_next;
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152k
  it_crc_bit_buff_dst->bit_pos = it_bit_buff_src->bit_pos;
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152k
  it_crc_bit_buff_dst->cnt_bits = it_bit_buff_src->cnt_bits;
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152k
  it_crc_bit_buff_dst->size = it_bit_buff_src->size;
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152k
}
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102
WORD32 ixheaacd_adts_crc_start_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
103
                                   ia_bit_buf_struct *it_bit_buff_src,
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152k
                                   WORD32 no_bits) {
105
152k
  UWORD32 no_bytes;
106
107
152k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].bit_cnt = 0;
108
152k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].max_bits =
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152k
      no_bits;
110
111
152k
  if (no_bits < 0) {
112
0
    no_bits = -no_bits;
113
0
  }
114
115
152k
  if (no_bits == 0) {
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68
    no_bits = 16 << 3;
117
68
  }
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119
152k
  no_bytes = no_bits >> 3;
120
121
152k
  if (no_bytes << 3 < (UWORD32)no_bits) {
122
0
    no_bytes++;
123
0
  }
124
125
152k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].buf_size =
126
152k
      no_bytes;
127
152k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].active = 1;
128
129
152k
  ixheaacd_copy_bit_buf_state(
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152k
      it_bit_buff_src,
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152k
      &(ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg]
132
152k
            .str_bit_buf));
133
134
152k
  ptr_adts_crc_info->no_reg += 1;
135
136
152k
  return (ptr_adts_crc_info->no_reg - 1);
137
152k
}
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139
VOID ixheaacd_adts_crc_end_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
140
74.7k
                               ia_bit_buf_struct *it_bit_buff_src, WORD32 reg) {
141
74.7k
  ptr_adts_crc_info->str_crc_reg_data[reg].active = 0;
142
74.7k
  ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt =
143
74.7k
      ptr_adts_crc_info->str_crc_reg_data[reg].str_bit_buf.cnt_bits -
144
74.7k
      it_bit_buff_src->cnt_bits;
145
74.7k
}
146
147
VOID ixheaacd_adts_crc_fast_crc(ia_adts_crc_info_struct *ptr_adts_crc_info,
148
2.81k
                                UWORD16 *crc_reg, UWORD8 feed) {
149
2.81k
  *crc_reg =
150
2.81k
      (*crc_reg << 8) ^ ptr_adts_crc_info->crc_lookup[(*crc_reg >> 8) ^ feed];
151
2.81k
}
152
153
VOID ixheaacd_adts_crc_slow_crc(UWORD16 *crc_reg, UWORD8 feed,
154
232
                                UWORD32 no_bits) {
155
232
  UWORD32 i;
156
232
  UWORD16 tmp;
157
834
  for (i = 0; i < no_bits; i++) {
158
602
    tmp = (feed & (1 << (7 - i))) >> (7 - i);
159
602
    tmp ^= (*crc_reg & (1 << 15)) >> 15;
160
602
    tmp *= 32773;
161
602
    *crc_reg <<= 1;
162
602
    *crc_reg ^= tmp;
163
602
  }
164
232
}
165
166
61
WORD32 ixheaacd_adts_crc_check_crc(ia_adts_crc_info_struct *ptr_adts_crc_info) {
167
61
  WORD32 error_code = AAC_DEC_OK;
168
61
  UWORD16 crc = 65535;
169
61
  WORD32 reg;
170
61
  ia_crc_reg_data_struct *ptr_reg_data;
171
172
222
  for (reg = 0; reg < ptr_adts_crc_info->no_reg; reg++) {
173
161
    UWORD8 bits;
174
161
    WORD32 bits_remaining;
175
176
161
    ptr_reg_data = &ptr_adts_crc_info->str_crc_reg_data[reg];
177
178
161
    if (ptr_reg_data->max_bits > 0) {
179
141
      if (ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt >
180
141
          ptr_reg_data->max_bits)
181
10
        bits_remaining = ptr_reg_data->max_bits;
182
131
      else
183
131
        bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
184
141
    } else {
185
20
      bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
186
20
    }
187
188
1.88k
    while (bits_remaining >= 8) {
189
1.72k
      if (ptr_reg_data->str_bit_buf.cnt_bits < 8) {
190
0
        return IA_XHEAAC_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES;
191
0
      }
192
1.72k
      bits = (UWORD8)ixheaacd_read_bits_buf(
193
1.72k
          (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
194
1.72k
                                     .str_bit_buf),
195
1.72k
          8);
196
1.72k
      ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, bits);
197
1.72k
      bits_remaining -= 8;
198
1.72k
    }
199
200
161
    if (ptr_reg_data->str_bit_buf.cnt_bits < bits_remaining) {
201
0
      return IA_XHEAAC_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES;
202
0
    }
203
161
    bits = (UWORD8)ixheaacd_read_bits_buf(
204
161
        (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
205
161
                                   .str_bit_buf),
206
161
        bits_remaining);
207
161
    ixheaacd_adts_crc_slow_crc(&crc, (UWORD8)(bits << (8 - bits_remaining)),
208
161
                               bits_remaining);
209
210
161
    if (ptr_reg_data->max_bits >
211
161
        ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt) {
212
71
      bits_remaining = ptr_reg_data->max_bits -
213
71
                       ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
214
215
1.17k
      for (; bits_remaining >= 8; bits_remaining -= 8) {
216
1.09k
        ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, 0);
217
1.09k
      }
218
219
71
      ixheaacd_adts_crc_slow_crc(&crc, 0, bits_remaining);
220
71
    }
221
161
  }
222
223
61
  ptr_adts_crc_info->no_reg = 0;
224
225
61
  if (crc != ptr_adts_crc_info->file_value) {
226
61
    return (IA_XHEAAC_DEC_EXE_NONFATAL_ADTS_HDR_CRC_FAIL);
227
61
  }
228
229
0
  return (error_code);
230
61
}