/src/libxaac/encoder/ixheaace_fd_enc.c
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1 | | /****************************************************************************** |
2 | | * * |
3 | | * Copyright (C) 2023 The Android Open Source Project |
4 | | * |
5 | | * Licensed under the Apache License, Version 2.0 (the "License"); |
6 | | * you may not use this file except in compliance with the License. |
7 | | * You may obtain a copy of the License at: |
8 | | * |
9 | | * http://www.apache.org/licenses/LICENSE-2.0 |
10 | | * |
11 | | * Unless required by applicable law or agreed to in writing, software |
12 | | * distributed under the License is distributed on an "AS IS" BASIS, |
13 | | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
14 | | * See the License for the specific language governing permissions and |
15 | | * limitations under the License. |
16 | | * |
17 | | ***************************************************************************** |
18 | | * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore |
19 | | */ |
20 | | |
21 | | #include <string.h> |
22 | | #include "iusace_type_def.h" |
23 | | #include "iusace_bitbuffer.h" |
24 | | #include "iusace_cnst.h" |
25 | | #include "impd_drc_common_enc.h" |
26 | | #include "impd_drc_uni_drc.h" |
27 | | #include "impd_drc_api.h" |
28 | | #include "impd_drc_uni_drc_eq.h" |
29 | | #include "impd_drc_uni_drc_filter_bank.h" |
30 | | #include "impd_drc_gain_enc.h" |
31 | | #include "impd_drc_struct_def.h" |
32 | | |
33 | | #include "ixheaace_memory_standards.h" |
34 | | #include "iusace_tns_usac.h" |
35 | | #include "iusace_psy_mod.h" |
36 | | #include "iusace_config.h" |
37 | | #include "ixheaace_adjust_threshold_data.h" |
38 | | #include "iusace_fd_qc_util.h" |
39 | | #include "iusace_config.h" |
40 | | #include "iusace_arith_enc.h" |
41 | | #include "iusace_fd_quant.h" |
42 | | #include "iusace_ms.h" |
43 | | #include "iusace_signal_classifier.h" |
44 | | #include "iusace_block_switch_const.h" |
45 | | #include "iusace_block_switch_struct_def.h" |
46 | | #include "ixheaace_sbr_header.h" |
47 | | #include "ixheaace_config.h" |
48 | | #include "ixheaace_asc_write.h" |
49 | | #include "iusace_main.h" |
50 | | #include "iusace_write_bitstream.h" |
51 | | #include "iusace_lpd.h" |
52 | | #include "ixheaace_cplx_pred.h" |
53 | | #include "iusace_func_prototypes.h" |
54 | | |
55 | | IA_ERRORCODE iusace_fd_encode(ia_sfb_params_struct *pstr_sfb_prms, WORD32 usac_independancy_flag, |
56 | | ia_usac_data_struct *pstr_usac_data, |
57 | | ia_usac_encoder_config_struct *pstr_usac_config, |
58 | | ia_bit_buf_struct *pstr_it_bit_buff, WORD32 nr_core_coder_ch, |
59 | | WORD32 chn, WORD32 ele_id, WORD32 *bit_written, |
60 | 199k | WORD32 *is_quant_spec_zero, WORD32 *is_gain_limited) { |
61 | 199k | iusace_scratch_mem *pstr_scratch = &pstr_usac_data->str_scratch; |
62 | 199k | IA_ERRORCODE err_code = 0; |
63 | 199k | WORD32 i_ch, idx = 0; |
64 | 199k | WORD32 *ptr_num_fac_bits = pstr_scratch->ptr_num_fac_bits; |
65 | 199k | WORD32 tns_data_present[2] = {0}; |
66 | 199k | WORD32 *ptr_core_mode_next = pstr_usac_data->core_mode_next; |
67 | 199k | WORD32 *ptr_core_mode_prev = pstr_usac_data->core_mode_prev; |
68 | 199k | *bit_written = 0; |
69 | 199k | memset(pstr_scratch->ptr_num_fac_bits, 0, |
70 | 199k | MAX_TIME_CHANNELS * sizeof(pstr_scratch->ptr_num_fac_bits[0])); |
71 | 557k | for (i_ch = chn; i_ch < chn + nr_core_coder_ch; i_ch++) { |
72 | 357k | tns_data_present[idx] = pstr_usac_data->pstr_tns_info[i_ch] != NULL; |
73 | | |
74 | 357k | if (tns_data_present[idx]) { |
75 | 153k | tns_data_present[idx] = pstr_usac_data->pstr_tns_info[i_ch]->tns_data_present; |
76 | 153k | } |
77 | 357k | idx++; |
78 | 357k | } |
79 | | |
80 | 199k | idx = 0; |
81 | 557k | for (i_ch = chn; i_ch < chn + nr_core_coder_ch; i_ch++) { |
82 | 357k | memset(pstr_scratch->p_reconstructed_time_signal[idx], 0, 4096 * sizeof(FLOAT64)); |
83 | 357k | err_code = iusace_fd_fac( |
84 | 357k | pstr_sfb_prms->grouped_sfb_offset[i_ch], pstr_sfb_prms->max_sfb[i_ch], |
85 | 357k | pstr_usac_data->ptr_2frame_time_data[i_ch], pstr_sfb_prms->window_sequence[i_ch], |
86 | 357k | pstr_scratch->p_reconstructed_time_signal[idx], pstr_usac_data->td_encoder[i_ch], |
87 | 357k | ((pstr_usac_data->td_encoder[i_ch]->prev_mode == 0) && ptr_core_mode_prev[i_ch]) == |
88 | 357k | CORE_MODE_TD, |
89 | 357k | ptr_core_mode_next[i_ch] == CORE_MODE_TD, pstr_usac_data->fac_out_stream[i_ch], |
90 | 357k | &ptr_num_fac_bits[i_ch], pstr_scratch); |
91 | 357k | if (err_code) { |
92 | 0 | return err_code; |
93 | 0 | } |
94 | 357k | idx++; |
95 | 357k | } |
96 | | |
97 | 199k | err_code = iusace_quantize_spec(pstr_sfb_prms, usac_independancy_flag, nr_core_coder_ch, |
98 | 199k | pstr_usac_data, pstr_usac_config, chn, ele_id, |
99 | 199k | is_quant_spec_zero, is_gain_limited); |
100 | 199k | if (err_code) return err_code; |
101 | | |
102 | 544k | for (i_ch = chn; i_ch < chn + nr_core_coder_ch; i_ch++) { |
103 | 349k | pstr_sfb_prms->window_shape[i_ch] = |
104 | 349k | pstr_usac_data->str_psy_mod.str_psy_out_data[i_ch].window_shape; |
105 | 349k | } |
106 | | |
107 | 195k | if (nr_core_coder_ch == 1) { |
108 | 41.2k | iusace_write_bits_buf(pstr_it_bit_buff, tns_data_present[0], 1); |
109 | 41.2k | *bit_written = *bit_written + 1; |
110 | 41.2k | } |
111 | 195k | if (nr_core_coder_ch == 2) { |
112 | 153k | *bit_written = *bit_written + iusace_write_cpe(pstr_sfb_prms, pstr_it_bit_buff, |
113 | 153k | tns_data_present, usac_independancy_flag, |
114 | 153k | pstr_usac_config, pstr_usac_data, chn); |
115 | 153k | } |
116 | | |
117 | 195k | idx = 0; |
118 | 544k | for (i_ch = chn; i_ch < chn + nr_core_coder_ch; i_ch++) { |
119 | 349k | *bit_written = |
120 | 349k | *bit_written + iusace_write_fd_data(pstr_it_bit_buff, pstr_sfb_prms, |
121 | 349k | ptr_num_fac_bits[i_ch], usac_independancy_flag, |
122 | 349k | pstr_usac_data, pstr_usac_config, i_ch, ele_id, idx); |
123 | 349k | idx++; |
124 | 349k | } |
125 | | |
126 | 195k | return err_code; |
127 | 199k | } |