Coverage Report

Created: 2026-03-31 06:52

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/libxaac/decoder/ixheaacd_adts_crc_check.c
Line
Count
Source
1
/******************************************************************************
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 *                                                                            *
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 * Copyright (C) 2018 The Android Open Source Project
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 *
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 * Licensed under the Apache License, Version 2.0 (the "License");
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 * you may not use this file except in compliance with the License.
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 * You may obtain a copy of the License at:
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 *
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 * http://www.apache.org/licenses/LICENSE-2.0
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 *
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 * Unless required by applicable law or agreed to in writing, software
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 * distributed under the License is distributed on an "AS IS" BASIS,
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 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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 * See the License for the specific language governing permissions and
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 * limitations under the License.
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 *
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 *****************************************************************************
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 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
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*/
20
#include "ixheaac_type_def.h"
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#include "ixheaac_constants.h"
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#include "ixheaacd_memory_standards.h"
23
#include "ixheaacd_mps_struct_def.h"
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#include "ixheaacd_mps_res_rom.h"
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#include "ixheaacd_defines.h"
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#include "ixheaacd_mps_aac_struct.h"
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#include "ixheaacd_sbr_common.h"
29
#include "ixheaacd_bitbuffer.h"
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#include "ixheaacd_defines.h"
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#include "ixheaacd_aac_rom.h"
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33
#include "ixheaacd_sbrdecsettings.h"
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#include "ixheaacd_sbr_scale.h"
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#include "ixheaacd_env_extr_part.h"
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#include "ixheaacd_sbr_rom.h"
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38
#include "ixheaacd_common_rom.h"
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#include "ixheaacd_pulsedata.h"
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41
#include "ixheaacd_pns.h"
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#include "ixheaacd_drc_data_struct.h"
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#include "ixheaacd_lt_predict.h"
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#include "ixheaacd_cnst.h"
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#include "ixheaacd_ec_defines.h"
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#include "ixheaacd_ec_struct_def.h"
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49
#include "ixheaacd_channelinfo.h"
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#include "ixheaacd_drc_dec.h"
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#include "ixheaacd_sbrdecoder.h"
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53
#include "ixheaacd_channel.h"
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55
#include "ixheaacd_audioobjtypes.h"
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#include "ixheaacd_memory_standards.h"
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#include "ixheaacd_adts.h"
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#include "ixheaacd_audioobjtypes.h"
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#include "ixheaacd_latmdemux.h"
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#include "ixheaacd_aacdec.h"
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#include "ixheaacd_hybrid.h"
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#include "ixheaacd_ps_dec.h"
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#include "ixheaacd_mps_polyphase.h"
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#include "ixheaacd_config.h"
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#include "ixheaacd_qmf_dec.h"
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#include "ixheaacd_mps_dec.h"
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#include "ixheaacd_struct_def.h"
71
#include "ixheaacd_error_codes.h"
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73
#include "ixheaacd_adts_crc_check.h"
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75
1.71M
VOID ixheaacd_adts_crc_open(ia_adts_crc_info_struct *ptr_adts_crc_info) {
76
1.71M
  WORD32 i, j;
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1.71M
  UWORD16 val;
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79
1.71M
  ptr_adts_crc_info->no_reg = 0;
80
1.71M
  ptr_adts_crc_info->crc_active = 0;
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82
439M
  for (i = 0; i <= 255; ++i) {
83
3.94G
    for (val = i << 8, j = 8; --j >= 0;) {
84
3.50G
      val = (val & 0x8000) ? (val << 1) ^ 0x8005 : val << 1;
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3.50G
    }
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87
438M
    ptr_adts_crc_info->crc_lookup[i] = val;
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438M
  }
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1.71M
}
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91
VOID ixheaacd_copy_bit_buf_state(
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    ia_bit_buf_struct *it_bit_buff_src,
93
137k
    ia_crc_bit_buf_struct_handle it_crc_bit_buff_dst) {
94
137k
  it_crc_bit_buff_dst->ptr_bit_buf_base = it_bit_buff_src->ptr_bit_buf_base;
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137k
  it_crc_bit_buff_dst->ptr_bit_buf_end = it_bit_buff_src->ptr_bit_buf_end;
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137k
  it_crc_bit_buff_dst->ptr_read_next = it_bit_buff_src->ptr_read_next;
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137k
  it_crc_bit_buff_dst->bit_pos = it_bit_buff_src->bit_pos;
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137k
  it_crc_bit_buff_dst->cnt_bits = it_bit_buff_src->cnt_bits;
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137k
  it_crc_bit_buff_dst->size = it_bit_buff_src->size;
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137k
}
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102
WORD32 ixheaacd_adts_crc_start_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
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                                   ia_bit_buf_struct *it_bit_buff_src,
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137k
                                   WORD32 no_bits) {
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137k
  UWORD32 no_bytes;
106
107
137k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].bit_cnt = 0;
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137k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].max_bits =
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137k
      no_bits;
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111
137k
  if (no_bits < 0) {
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0
    no_bits = -no_bits;
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0
  }
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115
137k
  if (no_bits == 0) {
116
56
    no_bits = 16 << 3;
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56
  }
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137k
  no_bytes = no_bits >> 3;
120
121
137k
  if (no_bytes << 3 < (UWORD32)no_bits) {
122
0
    no_bytes++;
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0
  }
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137k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].buf_size =
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137k
      no_bytes;
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137k
  ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].active = 1;
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129
137k
  ixheaacd_copy_bit_buf_state(
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137k
      it_bit_buff_src,
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137k
      &(ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg]
132
137k
            .str_bit_buf));
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134
137k
  ptr_adts_crc_info->no_reg += 1;
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136
137k
  return (ptr_adts_crc_info->no_reg - 1);
137
137k
}
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139
VOID ixheaacd_adts_crc_end_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
140
65.6k
                               ia_bit_buf_struct *it_bit_buff_src, WORD32 reg) {
141
65.6k
  ptr_adts_crc_info->str_crc_reg_data[reg].active = 0;
142
65.6k
  ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt =
143
65.6k
      ptr_adts_crc_info->str_crc_reg_data[reg].str_bit_buf.cnt_bits -
144
65.6k
      it_bit_buff_src->cnt_bits;
145
65.6k
}
146
147
VOID ixheaacd_adts_crc_fast_crc(ia_adts_crc_info_struct *ptr_adts_crc_info,
148
3.99k
                                UWORD16 *crc_reg, UWORD8 feed) {
149
3.99k
  *crc_reg =
150
3.99k
      (*crc_reg << 8) ^ ptr_adts_crc_info->crc_lookup[(*crc_reg >> 8) ^ feed];
151
3.99k
}
152
153
VOID ixheaacd_adts_crc_slow_crc(UWORD16 *crc_reg, UWORD8 feed,
154
220
                                UWORD32 no_bits) {
155
220
  UWORD32 i;
156
220
  UWORD16 tmp;
157
788
  for (i = 0; i < no_bits; i++) {
158
568
    tmp = (feed & (1 << (7 - i))) >> (7 - i);
159
568
    tmp ^= (*crc_reg & (1 << 15)) >> 15;
160
568
    tmp *= 32773;
161
568
    *crc_reg <<= 1;
162
568
    *crc_reg ^= tmp;
163
568
  }
164
220
}
165
166
54
WORD32 ixheaacd_adts_crc_check_crc(ia_adts_crc_info_struct *ptr_adts_crc_info) {
167
54
  WORD32 error_code = AAC_DEC_OK;
168
54
  UWORD16 crc = 65535;
169
54
  WORD32 reg;
170
54
  ia_crc_reg_data_struct *ptr_reg_data;
171
172
211
  for (reg = 0; reg < ptr_adts_crc_info->no_reg; reg++) {
173
157
    UWORD8 bits;
174
157
    WORD32 bits_remaining;
175
176
157
    ptr_reg_data = &ptr_adts_crc_info->str_crc_reg_data[reg];
177
178
157
    if (ptr_reg_data->max_bits > 0) {
179
137
      if (ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt >
180
137
          ptr_reg_data->max_bits)
181
22
        bits_remaining = ptr_reg_data->max_bits;
182
115
      else
183
115
        bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
184
137
    } else {
185
20
      bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
186
20
    }
187
188
3.12k
    while (bits_remaining >= 8) {
189
2.96k
      if (ptr_reg_data->str_bit_buf.cnt_bits < 8) {
190
0
        return IA_XHEAAC_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES;
191
0
      }
192
2.96k
      bits = (UWORD8)ixheaacd_read_bits_buf(
193
2.96k
          (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
194
2.96k
                                     .str_bit_buf),
195
2.96k
          8);
196
2.96k
      ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, bits);
197
2.96k
      bits_remaining -= 8;
198
2.96k
    }
199
200
157
    if (ptr_reg_data->str_bit_buf.cnt_bits < bits_remaining) {
201
0
      return IA_XHEAAC_DEC_EXE_NONFATAL_INSUFFICIENT_INPUT_BYTES;
202
0
    }
203
157
    bits = (UWORD8)ixheaacd_read_bits_buf(
204
157
        (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
205
157
                                   .str_bit_buf),
206
157
        bits_remaining);
207
157
    ixheaacd_adts_crc_slow_crc(&crc, (UWORD8)(bits << (8 - bits_remaining)),
208
157
                               bits_remaining);
209
210
157
    if (ptr_reg_data->max_bits >
211
157
        ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt) {
212
63
      bits_remaining = ptr_reg_data->max_bits -
213
63
                       ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
214
215
1.09k
      for (; bits_remaining >= 8; bits_remaining -= 8) {
216
1.03k
        ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, 0);
217
1.03k
      }
218
219
63
      ixheaacd_adts_crc_slow_crc(&crc, 0, bits_remaining);
220
63
    }
221
157
  }
222
223
54
  ptr_adts_crc_info->no_reg = 0;
224
225
54
  if (crc != ptr_adts_crc_info->file_value) {
226
54
    return (IA_XHEAAC_DEC_EXE_NONFATAL_ADTS_HDR_CRC_FAIL);
227
54
  }
228
229
0
  return (error_code);
230
54
}