Coverage Report

Created: 2026-05-30 06:39

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/libxaac/decoder/ixheaacd_ld_mps_config.c
Line
Count
Source
1
/******************************************************************************
2
*                                                                            *
3
* Copyright (C) 2018 The Android Open Source Project
4
*
5
* Licensed under the Apache License, Version 2.0 (the "License");
6
* you may not use this file except in compliance with the License.
7
* You may obtain a copy of the License at:
8
*
9
* http://www.apache.org/licenses/LICENSE-2.0
10
*
11
* Unless required by applicable law or agreed to in writing, software
12
* distributed under the License is distributed on an "AS IS" BASIS,
13
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
* See the License for the specific language governing permissions and
15
* limitations under the License.
16
*
17
*****************************************************************************
18
* Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19
*/
20
#include "ixheaac_type_def.h"
21
#include "ixheaac_constants.h"
22
#include "ixheaac_error_standards.h"
23
24
#include "ixheaacd_bitbuffer.h"
25
#include "ixheaacd_config.h"
26
27
#include <assert.h>
28
29
#ifndef sign
30
#define sign(a) (((a) > 0) ? 1 : ((a) < 0) ? -1 : 0)
31
#endif
32
33
typedef struct {
34
  WORD32 num_input_chan;
35
  WORD32 num_output_chan;
36
  WORD32 num_ott_boxes;
37
  WORD32 num_ttt_boxes;
38
  WORD32 ott_mode_lfe[MAX_NUM_OTT];
39
} ia_ld_mps_dec_tree_properties_struct;
40
41
static WORD32 ixheaacd_freq_res_table[] = {0, 23, 15, 12, 9, 7, 5, 4};
42
43
static WORD32 ixheaacd_hrtf_freq_res_table[][8] = {{0, 28, 20, 14, 10, 7, 5, 4},
44
                                          {0, 13, 13, 8, 7, 4, 3, 3}};
45
46
static ia_ld_mps_dec_tree_properties_struct ixheaacd_tree_property_table[] = {
47
    {1, 6, 5, 0, {0, 0, 0, 0, 1}}, {1, 6, 5, 0, {0, 0, 1, 0, 0}}, {2, 6, 3, 1, {1, 0, 0, 0, 0}},
48
    {2, 8, 5, 1, {1, 0, 0, 0, 0}}, {2, 8, 5, 1, {1, 0, 0, 0, 0}}, {6, 8, 2, 0, {0, 0, 0, 0, 0}},
49
    {6, 8, 2, 0, {0, 0, 0, 0, 0}}, {1, 2, 1, 0, {0, 0, 0, 0, 0}}};
50
51
static IA_ERRORCODE ixheaacd_ld_spatial_extension_config(
52
    ia_bit_buf_struct *it_bit_buff, ia_usac_dec_mps_config_struct *config,
53
1.18k
    WORD32 bits_available) {
54
1.18k
  WORD32 j, ch, idx, tmp, tmp_open, sac_ext_len, bits_read, n_fill_bits;
55
1.18k
  UWORD32 i;
56
1.18k
  WORD32 ba = bits_available;
57
58
1.18k
  config->sac_ext_cnt = 0;
59
60
1.18k
  tmp = it_bit_buff->cnt_bits;
61
62
1.18k
  WORD32 num_slots = config->bs_frame_length + 1;
63
64
8.21k
  while (ba >= 8) {
65
7.07k
    if (config->sac_ext_cnt >= MAX_NUM_EXT_TYPES) return IA_FATAL_ERROR;
66
67
7.06k
    config->bs_sac_ext_type[config->sac_ext_cnt] =
68
7.06k
        ixheaacd_read_bits_buf(it_bit_buff, 4);
69
7.06k
    ba -= 4;
70
71
7.06k
    sac_ext_len = ixheaacd_read_bits_buf(it_bit_buff, 4);
72
7.06k
    ba -= 4;
73
74
7.06k
    if ((ba >= 6) && (sac_ext_len > 0)) {
75
4.12k
      if (sac_ext_len == 15) {
76
2.23k
        sac_ext_len += ixheaacd_read_bits_buf(it_bit_buff, 8);
77
2.23k
        ba -= 8;
78
2.23k
        if (sac_ext_len == 15 + 255) {
79
792
          sac_ext_len += ixheaacd_read_bits_buf(it_bit_buff, 16);
80
792
          ba -= 16;
81
792
        }
82
2.23k
      }
83
84
4.12k
      switch (config->bs_sac_ext_type[config->sac_ext_cnt]) {
85
32
        case 0:
86
32
          config->bs_residual_coding = 1;
87
88
32
          config->bs_residual_sampling_freq_index =
89
32
              ixheaacd_read_bits_buf(it_bit_buff, 4);
90
32
          if (config->bs_residual_sampling_freq_index > MAX_RES_SAMP_FREQ_IDX) {
91
1
            return IA_FATAL_ERROR;
92
1
          }
93
31
          config->bs_residual_frames_per_spatial_frame =
94
31
              ixheaacd_read_bits_buf(it_bit_buff, 2);
95
96
31
          if (!ixheaacd_validate_res_frames_per_spatial_frame(
97
31
                  num_slots, config->bs_residual_frames_per_spatial_frame)) {
98
4
            return IA_FATAL_ERROR;
99
4
          }
100
101
27
          if ((config->num_ott_boxes + config->num_ttt_boxes) >
102
27
              MAX_RESIDUAL_CHANNELS)
103
1
            return IA_FATAL_ERROR;
104
70
          for (j = 0; j < config->num_ott_boxes + config->num_ttt_boxes; j++) {
105
45
            config->bs_residual_present[j] =
106
45
                ixheaacd_read_bits_buf(it_bit_buff, 1);
107
45
            if (config->bs_residual_present[j]) {
108
13
              config->bs_residual_bands_ld_mps[j] =
109
13
                  ixheaacd_read_bits_buf(it_bit_buff, 5);
110
13
              if (config->bs_residual_bands_ld_mps[j] > MAX_PARAMETER_BANDS)
111
1
              {
112
1
                return IA_FATAL_ERROR;
113
1
              }
114
13
            }
115
45
          }
116
25
          break;
117
118
25
        case 1:
119
15
          config->bs_arbitrary_downmix = 2;
120
121
15
          config->bs_arbitrary_downmix_residual_sampling_freq_index =
122
15
              ixheaacd_read_bits_buf(it_bit_buff, 4);
123
15
          if (config->bs_arbitrary_downmix_residual_sampling_freq_index > MAX_RES_SAMP_FREQ_IDX) {
124
2
            return IA_FATAL_ERROR;
125
2
          }
126
13
          config->bs_arbitrary_downmix_residual_frames_per_spatial_frame =
127
13
              ixheaacd_read_bits_buf(it_bit_buff, 2);
128
129
13
          if (!ixheaacd_validate_res_frames_per_spatial_frame(
130
13
                  num_slots, config->bs_arbitrary_downmix_residual_frames_per_spatial_frame)) {
131
2
            return IA_FATAL_ERROR;
132
2
          }
133
134
11
          config->bs_arbitrary_downmix_residual_bands =
135
11
              ixheaacd_read_bits_buf(it_bit_buff, 5);
136
11
          if (config->bs_arbitrary_downmix_residual_bands >=
137
11
              ixheaacd_freq_res_table[config->bs_freq_res]) {
138
1
            return IA_FATAL_ERROR;
139
1
          }
140
141
10
          break;
142
143
200
        case 2:
144
200
          config->num_out_chan_AT = 0;
145
200
          config->num_ott_boxes_AT = 0;
146
200
          if (config->num_output_channels > MAX_OUTPUT_CHANNELS)
147
1
            return IA_FATAL_ERROR;
148
1.31k
          for (ch = 0; ch < config->num_output_channels; ch++) {
149
1.11k
            tmp_open = 1;
150
1.11k
            idx = 0;
151
4.64k
            while ((tmp_open > 0) && (idx < MAX_ARBITRARY_TREE_INDEX)) {
152
3.52k
              config->bs_ott_box_present_AT[ch][idx] =
153
3.52k
                  ixheaacd_read_bits_buf(it_bit_buff, 1);
154
3.52k
              if (config->bs_ott_box_present_AT[ch][idx]) {
155
2.41k
                config->num_ott_boxes_AT++;
156
2.41k
                tmp_open++;
157
2.41k
              } else {
158
1.11k
                config->num_out_chan_AT++;
159
1.11k
                tmp_open--;
160
1.11k
              }
161
3.52k
              idx++;
162
3.52k
            }
163
1.11k
          }
164
165
2.54k
          for (i = 0; i < config->num_ott_boxes_AT; i++) {
166
2.34k
            config->bs_ott_default_cld_AT[i] =
167
2.34k
                ixheaacd_read_bits_buf(it_bit_buff, 1);
168
2.34k
            config->bs_ott_mode_lfe_AT[i] =
169
2.34k
                ixheaacd_read_bits_buf(it_bit_buff, 1);
170
2.34k
            if (config->bs_ott_mode_lfe_AT[i]) {
171
1.03k
              config->bs_ott_bands_AT[i] =
172
1.03k
                  ixheaacd_read_bits_buf(it_bit_buff, 5);
173
1.31k
            } else {
174
1.31k
              config->bs_ott_bands_AT[i] = ixheaacd_freq_res_table[config->bs_freq_res];
175
1.31k
            }
176
2.34k
          }
177
178
1.23k
          for (i = 0; i < config->num_out_chan_AT; i++) {
179
1.03k
            config->bs_output_channel_pos_AT[i] =
180
1.03k
                ixheaacd_read_bits_buf(it_bit_buff, 5);
181
1.03k
          }
182
183
199
          break;
184
185
3.87k
        default:;
186
4.12k
      }
187
4.12k
    }
188
189
7.03k
    bits_read = tmp - it_bit_buff->cnt_bits;
190
7.03k
    n_fill_bits = 8 * sac_ext_len - bits_read;
191
192
1.32M
    while (n_fill_bits > 7) {
193
1.31M
      ixheaacd_read_bits_buf(it_bit_buff, 8);
194
1.31M
      n_fill_bits -= 8;
195
1.31M
    }
196
7.03k
    if (n_fill_bits > 0) {
197
164
      ixheaacd_read_bits_buf(it_bit_buff, n_fill_bits);
198
164
    }
199
200
7.03k
    ba -= 8 * sac_ext_len;
201
7.03k
    config->sac_ext_cnt++;
202
7.03k
  }
203
1.14k
  return IA_NO_ERROR;
204
1.18k
}
205
206
IA_ERRORCODE ixheaacd_ld_spatial_specific_config(
207
1.22k
    ia_usac_dec_mps_config_struct *config, ia_bit_buf_struct *it_bit_buff) {
208
1.22k
  WORD32 i, num_header_bits;
209
1.22k
  UWORD32 hc, hb;
210
1.22k
  WORD32 sac_header_len;
211
1.22k
  WORD32 bits_available;
212
1.22k
  WORD32 tmp = it_bit_buff->cnt_bits;
213
1.22k
  WORD32 err = 0;
214
215
1.22k
  sac_header_len = tmp;
216
217
1.22k
  bits_available = sac_header_len;
218
1.22k
  config->bs_sampling_freq_index = ixheaacd_read_bits_buf(it_bit_buff, 4);
219
1.22k
  if (config->bs_sampling_freq_index == 15) {
220
12
    config->bs_fampling_frequency = ixheaacd_read_bits_buf(it_bit_buff, 24);
221
12
  }
222
223
1.22k
  config->bs_frame_length = ixheaacd_read_bits_buf(it_bit_buff, 5);
224
1.22k
  config->bs_freq_res = ixheaacd_read_bits_buf(it_bit_buff, 3);
225
1.22k
  config->bs_tree_config = ixheaacd_read_bits_buf(it_bit_buff, 4);
226
227
1.22k
  if (config->bs_tree_config > 7) return IA_FATAL_ERROR;
228
229
1.22k
  if (config->bs_tree_config != 15) {
230
1.21k
    config->num_ott_boxes =
231
1.21k
        ixheaacd_tree_property_table[config->bs_tree_config].num_ott_boxes;
232
1.21k
    config->num_ttt_boxes =
233
1.21k
        ixheaacd_tree_property_table[config->bs_tree_config].num_ttt_boxes;
234
1.21k
    config->num_input_channels =
235
1.21k
        ixheaacd_tree_property_table[config->bs_tree_config].num_input_chan;
236
1.21k
    config->num_output_channels =
237
1.21k
        ixheaacd_tree_property_table[config->bs_tree_config].num_output_chan;
238
7.31k
    for (i = 0; i < MAX_NUM_OTT; i++) {
239
6.09k
      config->ott_mode_lfe[i] =
240
6.09k
          ixheaacd_tree_property_table[config->bs_tree_config].ott_mode_lfe[i];
241
6.09k
    }
242
1.21k
  }
243
1.22k
  config->bs_quant_mode = ixheaacd_read_bits_buf(it_bit_buff, 2);
244
1.22k
  if (config->bs_tree_config != 7) {
245
1.03k
    config->bs_one_icc = ixheaacd_read_bits_buf(it_bit_buff, 1);
246
1.03k
  }
247
1.22k
  config->bs_arbitrary_downmix = ixheaacd_read_bits_buf(it_bit_buff, 1);
248
1.22k
  if (config->bs_tree_config != 7) {
249
1.03k
    config->bs_fixed_gain_sur = ixheaacd_read_bits_buf(it_bit_buff, 3);
250
1.03k
    config->bs_fixed_gain_LFE = ixheaacd_read_bits_buf(it_bit_buff, 3);
251
1.03k
  }
252
1.22k
  config->bs_fixed_gain_dmx = ixheaacd_read_bits_buf(it_bit_buff, 3);
253
1.22k
  if (config->bs_tree_config != 7) {
254
1.03k
    config->bs_matrix_mode = ixheaacd_read_bits_buf(it_bit_buff, 1);
255
1.03k
  }
256
1.22k
  config->bs_temp_shape_config = ixheaacd_read_bits_buf(it_bit_buff, 2);
257
1.22k
  config->bs_decorr_config = ixheaacd_read_bits_buf(it_bit_buff, 2);
258
1.22k
  if (config->bs_tree_config != 7) {
259
1.03k
    config->bs_3D_audio_mode = ixheaacd_read_bits_buf(it_bit_buff, 1);
260
1.03k
  } else {
261
186
    config->bs_3D_audio_mode = 0;
262
186
  }
263
264
  // ott_config
265
5.46k
  for (i = 0; i < config->num_ott_boxes; i++) {
266
4.23k
    if (config->ott_mode_lfe[i]) {
267
762
      config->bs_ott_bands[i] = ixheaacd_read_bits_buf(it_bit_buff, 5);
268
3.47k
    } else {
269
3.47k
      config->bs_ott_bands[i] = ixheaacd_freq_res_table[config->bs_freq_res];
270
3.47k
    }
271
4.23k
  }
272
273
  // ttt_config
274
1.39k
  for (i = 0; i < config->num_ttt_boxes; i++) {
275
170
    config->bs_ttt_dual_mode[i] = ixheaacd_read_bits_buf(it_bit_buff, 1);
276
170
    config->bs_ttt_mode_low[i] = ixheaacd_read_bits_buf(it_bit_buff, 3);
277
170
    if (config->bs_ttt_dual_mode[i]) {
278
15
      config->bs_ttt_mode_high[i] = ixheaacd_read_bits_buf(it_bit_buff, 3);
279
15
      config->bs_ttt_bands_low[i] = ixheaacd_read_bits_buf(it_bit_buff, 5);
280
15
      config->bs_ttt_bands_high[i] = ixheaacd_freq_res_table[config->bs_freq_res];
281
155
    } else {
282
155
      config->bs_ttt_bands_low[i] = ixheaacd_freq_res_table[config->bs_freq_res];
283
155
    }
284
170
  }
285
286
1.22k
  if (config->bs_temp_shape_config == 2) {
287
312
    config->bs_env_quant_mode = ixheaacd_read_bits_buf(it_bit_buff, 1);
288
312
  }
289
290
1.22k
  if (config->bs_3D_audio_mode) {
291
204
    config->bs_3D_audio_HRTF_set = ixheaacd_read_bits_buf(it_bit_buff, 2);
292
    // param_HRTF_set
293
204
    if (config->bs_3D_audio_HRTF_set == 0) {
294
62
      config->bs_HRTF_freq_res = ixheaacd_read_bits_buf(it_bit_buff, 3);
295
62
      config->bs_HRTF_num_chan = 5;
296
62
      config->bs_HRTF_asymmetric = ixheaacd_read_bits_buf(it_bit_buff, 1);
297
298
62
      config->HRTF_num_band = ixheaacd_hrtf_freq_res_table[0][config->bs_HRTF_freq_res];
299
62
      config->HRTF_num_phase = ixheaacd_hrtf_freq_res_table[1][config->bs_HRTF_freq_res];
300
301
281
      for (hc = 0; hc < config->bs_HRTF_num_chan; hc++) {
302
1.71k
        for (hb = 0; hb < config->HRTF_num_band; hb++) {
303
1.49k
          config->bs_HRTF_level_left[hc][hb] =
304
1.49k
              ixheaacd_read_bits_buf(it_bit_buff, 6);
305
1.49k
        }
306
1.67k
        for (hb = 0; hb < config->HRTF_num_band; hb++) {
307
1.45k
          config->bs_HRTF_level_right[hc][hb] =
308
1.45k
              config->bs_HRTF_asymmetric
309
1.45k
                  ? ixheaacd_read_bits_buf(it_bit_buff, 6)
310
1.45k
                  : config->bs_HRTF_level_left[hc][hb];
311
1.45k
        }
312
219
        config->bs_HRTF_phase[hc] = ixheaacd_read_bits_buf(it_bit_buff, 1);
313
1.06k
        for (hb = 0; hb < config->HRTF_num_phase; hb++) {
314
846
          config->bs_HRTF_phase_LR[hc][hb] =
315
846
              config->bs_HRTF_phase[hc] ? ixheaacd_read_bits_buf(it_bit_buff, 6)
316
846
                                        : 0;
317
846
        }
318
219
        config->bs_HRTF_icc[hc] = ixheaacd_read_bits_buf(it_bit_buff, 1);
319
219
        if (config->bs_HRTF_icc[hc]) {
320
629
          for (hb = 0; hb < config->HRTF_num_band; hb++)
321
555
            config->bs_HRTF_icc_LR[hc][hb] =
322
555
                ixheaacd_read_bits_buf(it_bit_buff, 3);
323
74
        }
324
219
      }
325
62
    }
326
204
  }
327
328
  // byte_align
329
1.22k
  i = (it_bit_buff->cnt_bits & 0x7);
330
1.22k
  ixheaacd_read_bits_buf(it_bit_buff, i);
331
332
1.22k
  num_header_bits = tmp - (it_bit_buff->cnt_bits);
333
1.22k
  bits_available -= num_header_bits;
334
335
1.22k
  err =
336
1.22k
      ixheaacd_ld_spatial_extension_config(it_bit_buff, config, bits_available);
337
1.22k
  return err;
338
1.22k
}