Coverage Report

Created: 2026-08-14 06:54

next uncovered line (L), next uncovered region (R), next uncovered branch (B)
/src/libxaac/decoder/ixheaacd_mps_m1m2_common.c
Line
Count
Source
1
/******************************************************************************
2
 *
3
 * Copyright (C) 2023 The Android Open Source Project
4
 *
5
 * Licensed under the Apache License, Version 2.0 (the "License");
6
 * you may not use this file except in compliance with the License.
7
 * You may obtain a copy of the License at:
8
 *
9
 * http://www.apache.org/licenses/LICENSE-2.0
10
 *
11
 * Unless required by applicable law or agreed to in writing, software
12
 * distributed under the License is distributed on an "AS IS" BASIS,
13
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14
 * See the License for the specific language governing permissions and
15
 * limitations under the License.
16
 *
17
 *****************************************************************************
18
 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19
*/
20
#include "ixheaac_type_def.h"
21
#include "ixheaacd_mps_struct_def.h"
22
#include "ixheaacd_error_codes.h"
23
#include "ixheaacd_mps_res_rom.h"
24
#include "ixheaacd_mps_aac_struct.h"
25
#include "ixheaac_constants.h"
26
#include "ixheaac_basic_ops32.h"
27
#include "ixheaac_basic_ops40.h"
28
#include "ixheaacd_bitbuffer.h"
29
#include "ixheaacd_common_rom.h"
30
#include "ixheaacd_sbrdecsettings.h"
31
#include "ixheaacd_sbr_scale.h"
32
#include "ixheaacd_env_extr_part.h"
33
#include "ixheaacd_sbr_rom.h"
34
#include "ixheaacd_hybrid.h"
35
#include "ixheaacd_ps_dec.h"
36
#include "ixheaac_error_standards.h"
37
#include "ixheaacd_mps_polyphase.h"
38
#include "ixheaacd_config.h"
39
#include "ixheaacd_qmf_dec.h"
40
#include "ixheaacd_mps_dec.h"
41
#include "ixheaacd_mps_macro_def.h"
42
#include "ixheaacd_mps_bitdec.h"
43
#include "ixheaacd_mps_calc_m1m2_tree_config.h"
44
45
18.4k
VOID ixheaacd_buffer_m1(ia_heaac_mps_state_struct *pstr_mps_state) {
46
18.4k
  ia_mps_dec_m1_param_struct *m1_param = pstr_mps_state->array_struct->m1_param;
47
18.4k
  WORD32 pb, row, col;
48
49
18.4k
  ia_mps_persistent_mem *persistent_mem = &pstr_mps_state->mps_persistent_mem;
50
18.4k
  WORD32 *m1_param_real_prev = persistent_mem->m1_param_real_prev;
51
18.4k
  WORD32 *m1_param_imag_prev = persistent_mem->m1_param_imag_prev;
52
53
18.4k
  WORD32 *m1_param_real, *m1_param_imag;
54
55
18.4k
  WORD32 *p_m1_param_real, *p_m1_param_re;
56
57
18.4k
  WORD32 num_parameter_bands = pstr_mps_state->num_parameter_bands;
58
18.4k
  WORD32 num_v_channels = pstr_mps_state->num_v_channels;
59
18.4k
  WORD32 num_x_channels = pstr_mps_state->num_x_channels;
60
18.4k
  WORD32 m1_param_imag_present = pstr_mps_state->m1_param_imag_present;
61
62
18.4k
  WORD32 num_parameter_sets_prev;
63
64
18.4k
  pstr_mps_state->num_parameter_sets_prev = pstr_mps_state->num_parameter_sets;
65
18.4k
  num_parameter_sets_prev = pstr_mps_state->num_parameter_sets_prev;
66
67
18.4k
  if (m1_param_imag_present) {
68
14.6k
    WORD32 *p_m1_param_imag = &m1_param->m1_param_imag[0][0][0][0];
69
14.6k
    p_m1_param_real = &m1_param->m1_param_real[0][0][0][0];
70
130k
    for (row = 0; row < num_v_channels; row++) {
71
115k
      WORD32 *p_m1_param_im = p_m1_param_imag;
72
115k
      p_m1_param_re = p_m1_param_real;
73
74
782k
      for (col = 0; col < num_x_channels; col++) {
75
667k
        m1_param_real = p_m1_param_re + (num_parameter_sets_prev - 1) * MAX_PARAMETER_BANDS;
76
667k
        m1_param_imag = p_m1_param_im + (num_parameter_sets_prev - 1) * MAX_PARAMETER_BANDS;
77
78
13.7M
        for (pb = 0; pb < num_parameter_bands; pb++) {
79
13.1M
          *m1_param_real_prev++ = *m1_param_real++;
80
13.1M
          *m1_param_imag_prev++ = *m1_param_imag++;
81
13.1M
        }
82
667k
        p_m1_param_re += PBXPS;
83
667k
        p_m1_param_im += PBXPS;
84
667k
      }
85
115k
      p_m1_param_real += MAX_INPUT_CHANNELS_MPS * PBXPS;
86
115k
      p_m1_param_imag += MAX_INPUT_CHANNELS_MPS * PBXPS;
87
115k
    }
88
14.6k
  } else {
89
3.83k
    p_m1_param_real = &m1_param->m1_param_real[0][0][0][0];
90
28.1k
    for (row = 0; row < num_v_channels; row++) {
91
24.3k
      p_m1_param_re = p_m1_param_real;
92
113k
      for (col = 0; col < num_x_channels; col++) {
93
88.8k
        m1_param_real = p_m1_param_re + (num_parameter_sets_prev - 1) * MAX_PARAMETER_BANDS;
94
1.61M
        for (pb = 0; pb < num_parameter_bands; pb++) *m1_param_real_prev++ = *m1_param_real++;
95
96
88.8k
        p_m1_param_re += PBXPS;
97
88.8k
      }
98
24.3k
      p_m1_param_real += MAX_INPUT_CHANNELS_MPS * PBXPS;
99
24.3k
    }
100
3.83k
  }
101
18.4k
}
102
103
18.4k
VOID ixheaacd_buffer_m2(ia_heaac_mps_state_struct *pstr_mps_state) {
104
18.4k
  WORD32 num_direct_signals = pstr_mps_state->num_direct_signals;
105
18.4k
  WORD32 pb, row, col, col_counter = num_direct_signals + pstr_mps_state->num_decor_signals;
106
107
18.4k
  ia_mps_persistent_mem *persistent_mem = &pstr_mps_state->mps_persistent_mem;
108
18.4k
  ia_mps_dec_m2_param_struct *m2_param = pstr_mps_state->aux_struct->m2_param;
109
110
18.4k
  WORD32 *m2_decor_real_prev = persistent_mem->m2_decor_real_prev;
111
18.4k
  WORD32 *m2_decor_imag_prev = persistent_mem->m2_decor_imag_prev;
112
113
18.4k
  WORD32 *m2_resid_real_prev = persistent_mem->m2_resid_real_prev;
114
18.4k
  WORD32 *m2_resid_imag_prev = persistent_mem->m2_resid_imag_prev;
115
116
18.4k
  WORD32 *m2_decor_real, *m2_decor_imag, *m2_resid_real, *m2_resid_imag;
117
18.4k
  WORD32 idx = -1;
118
119
18.4k
  WORD32 resid_col_counter;
120
121
18.4k
  WORD32 num_parameter_bands = pstr_mps_state->num_parameter_bands;
122
18.4k
  WORD32 num_output_channels = pstr_mps_state->num_output_channels;
123
18.4k
  WORD32 num_parameter_sets_prev = pstr_mps_state->num_parameter_sets_prev;
124
125
18.4k
  if (pstr_mps_state->residual_coding)
126
511
    resid_col_counter = col_counter;
127
17.9k
  else
128
17.9k
    resid_col_counter = num_direct_signals;
129
130
18.4k
  if (pstr_mps_state->m2_param_imag_present) {
131
0
    for (row = 0; row < num_output_channels; row++) {
132
0
      for (col = num_direct_signals; col < col_counter; col++) {
133
0
        if (pstr_mps_state->m2_param_present[row][col] & 1) {
134
0
          idx++;
135
0
          m2_decor_real = &m2_param->m2_decor_real[idx][num_parameter_sets_prev - 1][0];
136
137
0
          for (pb = 0; pb < num_parameter_bands; pb++) *m2_decor_real_prev++ = *m2_decor_real++;
138
139
0
          m2_decor_imag = &m2_param->m2_decor_imag[idx][num_parameter_sets_prev - 1][0];
140
141
0
          for (pb = 0; pb < num_parameter_bands; pb++) *m2_decor_imag_prev++ = *m2_decor_imag++;
142
0
        }
143
0
      }
144
0
    }
145
146
0
    idx = -1;
147
0
    for (row = 0; row < num_output_channels; row++) {
148
0
      for (col = 0; col < resid_col_counter; col++) {
149
0
        if (pstr_mps_state->m2_param_present[row][col] & 2) {
150
0
          idx++;
151
0
          m2_resid_real = &m2_param->m2_resid_real[idx][num_parameter_sets_prev - 1][0];
152
153
0
          for (pb = 0; pb < num_parameter_bands; pb++) *m2_resid_real_prev++ = *m2_resid_real++;
154
0
          m2_resid_imag = &m2_param->m2_resid_imag[idx][num_parameter_sets_prev - 1][0];
155
0
          for (pb = 0; pb < num_parameter_bands; pb++) *m2_resid_imag_prev++ = *m2_resid_imag++;
156
0
        }
157
0
      }
158
0
    }
159
18.4k
  } else {
160
161k
    for (row = 0; row < num_output_channels; row++) {
161
465k
      for (col = num_direct_signals; col < col_counter; col++) {
162
321k
        if (pstr_mps_state->m2_param_present[row][col] & 1) {
163
89.5k
          idx++;
164
89.5k
          m2_decor_real = &m2_param->m2_decor_real[idx][num_parameter_sets_prev - 1][0];
165
166
1.64M
          for (pb = 0; pb < num_parameter_bands; pb++) *m2_decor_real_prev++ = *m2_decor_real++;
167
89.5k
        }
168
321k
      }
169
143k
    }
170
171
18.4k
    idx = -1;
172
161k
    for (row = 0; row < num_output_channels; row++) {
173
928k
      for (col = 0; col < resid_col_counter; col++) {
174
785k
        if (pstr_mps_state->m2_param_present[row][col] & 2) {
175
146k
          idx++;
176
146k
          m2_resid_real = &m2_param->m2_resid_real[idx][num_parameter_sets_prev - 1][0];
177
178
2.85M
          for (pb = 0; pb < num_parameter_bands; pb++) *m2_resid_real_prev++ = *m2_resid_real++;
179
146k
        }
180
785k
      }
181
143k
    }
182
18.4k
  }
183
18.4k
}
184
185
1.39k
static VOID ixheaacd_update_alpha(ia_heaac_mps_state_struct *pstr_mps_state) {
186
1.39k
  WORD32 alpha;
187
188
1.39k
  WORD32 *arbdmx_alpha_prev = pstr_mps_state->mps_persistent_mem.arbdmx_alpha_prev;
189
1.39k
  ia_mps_dec_auxilary_struct *p_aux_struct = pstr_mps_state->aux_struct;
190
1.39k
  WORD32 *arbdmx_alpha = p_aux_struct->arbdmx_alpha;
191
192
1.39k
  WORD32 n_ch_in = pstr_mps_state->num_input_channels;
193
1.39k
  WORD32 ch;
194
195
3.46k
  for (ch = 0; ch < n_ch_in; ch++) {
196
2.07k
    *arbdmx_alpha_prev++ = arbdmx_alpha[ch];
197
198
2.07k
    if (pstr_mps_state->arbitrary_downmix == 2) {
199
301
      alpha = arbdmx_alpha[ch];
200
201
301
      if (p_aux_struct->arbdmx_residual_abs[ch]) {
202
164
        alpha -= POINT_THREE_THREE_Q15;
203
204
164
        if (alpha < 0) alpha = 0;
205
164
      } else {
206
137
        alpha += POINT_THREE_THREE_Q15;
207
208
137
        if (alpha > ONE_IN_Q15) alpha = ONE_IN_Q15;
209
137
      }
210
1.77k
    } else {
211
1.77k
      alpha = ONE_IN_Q15;
212
1.77k
    }
213
214
2.07k
    arbdmx_alpha[ch] = alpha;
215
2.07k
  }
216
1.39k
}
217
218
18.4k
VOID ixheaacd_calc_m1m2(ia_heaac_mps_state_struct *pstr_mps_state) {
219
18.4k
  WORD32 up_mix_type = pstr_mps_state->up_mix_type;
220
18.4k
  WORD32 binaural_quality = pstr_mps_state->binaural_quality;
221
222
18.4k
  if (pstr_mps_state->arbitrary_downmix != 0) {
223
1.39k
    ixheaacd_update_alpha(pstr_mps_state);
224
1.39k
  }
225
226
18.4k
  switch (pstr_mps_state->tree_config) {
227
456
    case TREE_5151: {
228
456
      if (up_mix_type == 3) {
229
0
        ixheaacd_calc_m1m2_51s1(pstr_mps_state);
230
456
      } else {
231
456
        ixheaacd_calc_m1m2_5151(pstr_mps_state);
232
456
      }
233
456
    } break;
234
491
    case TREE_5152: {
235
491
      if (up_mix_type == 3) {
236
0
        ixheaacd_calc_m1m2_51s2(pstr_mps_state);
237
491
      } else {
238
491
        ixheaacd_calc_m1m2_5152(pstr_mps_state);
239
491
      }
240
491
    } break;
241
1.30k
    case TREE_525:
242
1.30k
      if (up_mix_type == 1) {
243
0
        ixheaacd_calc_m1m2_emm(pstr_mps_state);
244
1.30k
      } else if (up_mix_type == 2) {
245
0
        if (binaural_quality == 1) {
246
0
          ixheaacd_calc_m1m2_5227(pstr_mps_state);
247
0
        }
248
1.30k
      } else {
249
1.30k
        ixheaacd_calc_m1m2_5251(pstr_mps_state);
250
1.30k
      }
251
1.30k
      break;
252
1.03k
    case TREE_7271:
253
1.03k
      if (up_mix_type == 0) {
254
1.03k
        ixheaacd_calc_m1m2_7271(pstr_mps_state);
255
1.03k
      } else if (up_mix_type == 2) {
256
0
        if (binaural_quality == 1) {
257
0
          ixheaacd_calc_m1m2_5227(pstr_mps_state);
258
0
        }
259
0
      }
260
1.03k
      break;
261
286
    case TREE_7272:
262
286
      if (up_mix_type == 0) {
263
286
        ixheaacd_calc_m1m2_7272(pstr_mps_state);
264
286
      } else if (up_mix_type == 2) {
265
0
        if (binaural_quality == 1) {
266
0
          ixheaacd_calc_m1m2_5227(pstr_mps_state);
267
0
        }
268
0
      }
269
286
      break;
270
1.92k
    case TREE_7571:
271
1.92k
      ixheaacd_calc_m1m2_7571(pstr_mps_state);
272
1.92k
      break;
273
12.9k
    case TREE_7572:
274
12.9k
      ixheaacd_calc_m1m2_7572(pstr_mps_state);
275
12.9k
      break;
276
0
    default:
277
0
      break;
278
18.4k
  };
279
280
18.4k
  return;
281
18.4k
}