Coverage Report

Created: 2024-01-17 10:31

/src/build/lib/Target/AArch64/AArch64GenPostLegalizeGILowering.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* AArch64PostLegalizerLoweringImpl Combiner Match Table                      *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
#ifdef GET_GICOMBINER_DEPS
10
#include "llvm/ADT/SparseBitVector.h"
11
namespace llvm {
12
extern cl::OptionCategory GICombinerOptionCategory;
13
} // end namespace llvm
14
#endif // ifdef GET_GICOMBINER_DEPS
15
16
#ifdef GET_GICOMBINER_TYPES
17
struct AArch64PostLegalizerLoweringImplRuleConfig {
18
  SparseBitVector<> DisabledRules;
19
20
  bool isRuleEnabled(unsigned RuleID) const;
21
  bool parseCommandLineOption();
22
  bool setRuleEnabled(StringRef RuleIdentifier);
23
  bool setRuleDisabled(StringRef RuleIdentifier);
24
};
25
26
0
static std::optional<uint64_t> getRuleIdxForIdentifier(StringRef RuleIdentifier) {
27
0
  uint64_t I;
28
  // getAtInteger(...) returns false on success
29
0
  bool Parsed = !RuleIdentifier.getAsInteger(0, I);
30
0
  if (Parsed)
31
0
    return I;
32
33
0
#ifndef NDEBUG
34
0
  switch (RuleIdentifier.size()) {
35
0
  default: break;
36
0
  case 3:  // 6 strings to match.
37
0
    switch (RuleIdentifier[0]) {
38
0
    default: break;
39
0
    case 'd':  // 1 string to match.
40
0
      if (memcmp(RuleIdentifier.data()+1, "up", 2) != 0)
41
0
        break;
42
0
      return 0;  // "dup"
43
0
    case 'e':  // 1 string to match.
44
0
      if (memcmp(RuleIdentifier.data()+1, "xt", 2) != 0)
45
0
        break;
46
0
      return 2;  // "ext"
47
0
    case 'r':  // 1 string to match.
48
0
      if (memcmp(RuleIdentifier.data()+1, "ev", 2) != 0)
49
0
        break;
50
0
      return 1;  // "rev"
51
0
    case 't':  // 1 string to match.
52
0
      if (memcmp(RuleIdentifier.data()+1, "rn", 2) != 0)
53
0
        break;
54
0
      return 5;  // "trn"
55
0
    case 'u':  // 1 string to match.
56
0
      if (memcmp(RuleIdentifier.data()+1, "zp", 2) != 0)
57
0
        break;
58
0
      return 4;  // "uzp"
59
0
    case 'z':  // 1 string to match.
60
0
      if (memcmp(RuleIdentifier.data()+1, "ip", 2) != 0)
61
0
        break;
62
0
      return 3;  // "zip"
63
0
    }
64
0
    break;
65
0
  case 10:   // 1 string to match.
66
0
    if (memcmp(RuleIdentifier.data()+0, "lower_mull", 10) != 0)
67
0
      break;
68
0
    return 16;  // "lower_mull"
69
0
  case 11:   // 1 string to match.
70
0
    if (memcmp(RuleIdentifier.data()+0, "shuf_to_ins", 11) != 0)
71
0
      break;
72
0
    return 7;  // "shuf_to_ins"
73
0
  case 12:   // 1 string to match.
74
0
    if (memcmp(RuleIdentifier.data()+0, "form_duplane", 12) != 0)
75
0
      break;
76
0
    return 6;  // "form_duplane"
77
0
  case 15:   // 3 strings to match.
78
0
    switch (RuleIdentifier[0]) {
79
0
    default: break;
80
0
    case 'a':  // 1 string to match.
81
0
      if (memcmp(RuleIdentifier.data()+1, "djust_icmp_imm", 14) != 0)
82
0
        break;
83
0
      return 9;  // "adjust_icmp_imm"
84
0
    case 'f':  // 1 string to match.
85
0
      if (memcmp(RuleIdentifier.data()+1, "orm_truncstore", 14) != 0)
86
0
        break;
87
0
      return 13;  // "form_truncstore"
88
0
    case 'v':  // 1 string to match.
89
0
      if (memcmp(RuleIdentifier.data()+1, "ashr_vlshr_imm", 14) != 0)
90
0
        break;
91
0
      return 8;  // "vashr_vlshr_imm"
92
0
    }
93
0
    break;
94
0
  case 17:   // 1 string to match.
95
0
    if (memcmp(RuleIdentifier.data()+0, "lower_vector_fcmp", 17) != 0)
96
0
      break;
97
0
    return 12;  // "lower_vector_fcmp"
98
0
  case 18:   // 1 string to match.
99
0
    if (memcmp(RuleIdentifier.data()+0, "swap_icmp_operands", 18) != 0)
100
0
      break;
101
0
    return 10;  // "swap_icmp_operands"
102
0
  case 19:   // 1 string to match.
103
0
    if (memcmp(RuleIdentifier.data()+0, "build_vector_to_dup", 19) != 0)
104
0
      break;
105
0
    return 11;  // "build_vector_to_dup"
106
0
  case 22:   // 1 string to match.
107
0
    if (memcmp(RuleIdentifier.data()+0, "unmerge_ext_to_unmerge", 22) != 0)
108
0
      break;
109
0
    return 15;  // "unmerge_ext_to_unmerge"
110
0
  case 23:   // 1 string to match.
111
0
    if (memcmp(RuleIdentifier.data()+0, "vector_unmerge_lowering", 23) != 0)
112
0
      break;
113
0
    return 17;  // "vector_unmerge_lowering"
114
0
  case 26:   // 1 string to match.
115
0
    if (memcmp(RuleIdentifier.data()+0, "vector_sext_inreg_to_shift", 26) != 0)
116
0
      break;
117
0
    return 14;  // "vector_sext_inreg_to_shift"
118
0
  }
119
0
#endif // ifndef NDEBUG
120
121
0
  return std::nullopt;
122
0
}
123
0
static std::optional<std::pair<uint64_t, uint64_t>> getRuleRangeForIdentifier(StringRef RuleIdentifier) {
124
0
  std::pair<StringRef, StringRef> RangePair = RuleIdentifier.split('-');
125
0
  if (!RangePair.second.empty()) {
126
0
    const auto First = getRuleIdxForIdentifier(RangePair.first);
127
0
    const auto Last = getRuleIdxForIdentifier(RangePair.second);
128
0
    if (!First || !Last)
129
0
      return std::nullopt;
130
0
    if (First >= Last)
131
0
      report_fatal_error("Beginning of range should be before end of range");
132
0
    return {{*First, *Last + 1}};
133
0
  }
134
0
  if (RangePair.first == "*") {
135
0
    return {{0, 18}};
136
0
  }
137
0
  const auto I = getRuleIdxForIdentifier(RangePair.first);
138
0
  if (!I)
139
0
    return std::nullopt;
140
0
  return {{*I, *I + 1}};
141
0
}
142
143
0
bool AArch64PostLegalizerLoweringImplRuleConfig::setRuleEnabled(StringRef RuleIdentifier) {
144
0
  auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier);
145
0
  if (!MaybeRange)
146
0
    return false;
147
0
  for (auto I = MaybeRange->first; I < MaybeRange->second; ++I)
148
0
    DisabledRules.reset(I);
149
0
  return true;
150
0
}
151
152
0
bool AArch64PostLegalizerLoweringImplRuleConfig::setRuleDisabled(StringRef RuleIdentifier) {
153
0
  auto MaybeRange = getRuleRangeForIdentifier(RuleIdentifier);
154
0
  if (!MaybeRange)
155
0
    return false;
156
0
  for (auto I = MaybeRange->first; I < MaybeRange->second; ++I)
157
0
    DisabledRules.set(I);
158
0
  return true;
159
0
}
160
161
static std::vector<std::string> AArch64PostLegalizerLoweringOption;
162
static cl::list<std::string> AArch64PostLegalizerLoweringDisableOption(
163
    "aarch64postlegalizerlowering-disable-rule",
164
    cl::desc("Disable one or more combiner rules temporarily in the AArch64PostLegalizerLowering pass"),
165
    cl::CommaSeparated,
166
    cl::Hidden,
167
    cl::cat(GICombinerOptionCategory),
168
0
    cl::callback([](const std::string &Str) {
169
0
      AArch64PostLegalizerLoweringOption.push_back(Str);
170
0
    }));
171
static cl::list<std::string> AArch64PostLegalizerLoweringOnlyEnableOption(
172
    "aarch64postlegalizerlowering-only-enable-rule",
173
    cl::desc("Disable all rules in the AArch64PostLegalizerLowering pass then re-enable the specified ones"),
174
    cl::Hidden,
175
    cl::cat(GICombinerOptionCategory),
176
0
    cl::callback([](const std::string &CommaSeparatedArg) {
177
0
      StringRef Str = CommaSeparatedArg;
178
0
      AArch64PostLegalizerLoweringOption.push_back("*");
179
0
      do {
180
0
        auto X = Str.split(",");
181
0
        AArch64PostLegalizerLoweringOption.push_back(("!" + X.first).str());
182
0
        Str = X.second;
183
0
      } while (!Str.empty());
184
0
    }));
185
186
187
89.8k
bool AArch64PostLegalizerLoweringImplRuleConfig::isRuleEnabled(unsigned RuleID) const {
188
89.8k
    return  !DisabledRules.test(RuleID);
189
89.8k
}
190
381
bool AArch64PostLegalizerLoweringImplRuleConfig::parseCommandLineOption() {
191
381
  for (StringRef Identifier : AArch64PostLegalizerLoweringOption) {
192
0
    bool Enabled = Identifier.consume_front("!");
193
0
    if (Enabled && !setRuleEnabled(Identifier))
194
0
      return false;
195
0
    if (!Enabled && !setRuleDisabled(Identifier))
196
0
      return false;
197
0
  }
198
381
  return true;
199
381
}
200
201
#endif // ifdef GET_GICOMBINER_TYPES
202
203
#ifdef GET_GICOMBINER_TYPES
204
const unsigned MAX_SUBTARGET_PREDICATES = 0;
205
using PredicateBitset = llvm::Bitset<MAX_SUBTARGET_PREDICATES>;
206
#endif // ifdef GET_GICOMBINER_TYPES
207
208
#ifdef GET_GICOMBINER_CLASS_MEMBERS
209
PredicateBitset AvailableModuleFeatures;
210
mutable PredicateBitset AvailableFunctionFeatures;
211
392k
PredicateBitset getAvailableFeatures() const {
212
392k
  return AvailableModuleFeatures | AvailableFunctionFeatures;
213
392k
}
214
PredicateBitset
215
computeAvailableModuleFeatures(const AArch64Subtarget *Subtarget) const;
216
PredicateBitset
217
computeAvailableFunctionFeatures(const AArch64Subtarget *Subtarget,
218
                                 const MachineFunction *MF) const;
219
void setupGeneratedPerFunctionState(MachineFunction &MF) override;
220
#endif // ifdef GET_GICOMBINER_CLASS_MEMBERS
221
#ifdef GET_GICOMBINER_CLASS_MEMBERS
222
  mutable MatcherState State;
223
  typedef ComplexRendererFns(AArch64PostLegalizerLoweringImpl::*ComplexMatcherMemFn)(MachineOperand &) const;
224
  typedef void(AArch64PostLegalizerLoweringImpl::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr &, int) const;
225
  const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ExecInfo;
226
  static AArch64PostLegalizerLoweringImpl::ComplexMatcherMemFn ComplexPredicateFns[];
227
  static AArch64PostLegalizerLoweringImpl::CustomRendererFn CustomRenderers[];
228
  bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
229
  bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
230
  bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
231
  const uint8_t *getMatchTable() const override;
232
  bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI, const MatcherState &State) const override;
233
  bool testSimplePredicate(unsigned PredicateID) const override;
234
  void runCustomAction(unsigned FnID, const MatcherState &State, NewMIVector &OutMIs) const override;
235
  struct MatchInfosTy {
236
    std::pair<unsigned, int> MDInfo1;
237
    Register MDInfo5;
238
    ShuffleVectorPseudo MDInfo0;
239
    std::tuple<Register, int, Register, int> MDInfo2;
240
    int64_t MDInfo3;
241
    std::pair<uint64_t, CmpInst::Predicate> MDInfo4;
242
  };
243
  mutable MatchInfosTy MatchInfos;
244
245
#endif // ifdef GET_GICOMBINER_CLASS_MEMBERS
246
247
#ifdef GET_GICOMBINER_IMPL
248
// LLT Objects.
249
enum {
250
  GILLT_s1,
251
};
252
const static size_t NumTypeObjects = 1;
253
const static LLT TypeObjects[] = {
254
  LLT::scalar(1),
255
};
256
257
// Bits for subtarget features that participate in instruction matching.
258
enum SubtargetFeatureBits : uint8_t {
259
};
260
261
PredicateBitset AArch64PostLegalizerLoweringImpl::
262
13.7k
computeAvailableModuleFeatures(const AArch64Subtarget *Subtarget) const {
263
13.7k
  PredicateBitset Features;
264
13.7k
  return Features;
265
13.7k
}
266
267
13.7k
void AArch64PostLegalizerLoweringImpl::setupGeneratedPerFunctionState(MachineFunction &MF) {
268
13.7k
  AvailableFunctionFeatures = computeAvailableFunctionFeatures((const AArch64Subtarget *)&MF.getSubtarget(), &MF);
269
13.7k
}
270
PredicateBitset AArch64PostLegalizerLoweringImpl::
271
13.7k
computeAvailableFunctionFeatures(const AArch64Subtarget *Subtarget, const MachineFunction *MF) const {
272
13.7k
  PredicateBitset Features;
273
13.7k
  return Features;
274
13.7k
}
275
276
// Feature bitsets.
277
enum {
278
  GIFBS_Invalid,
279
};
280
constexpr static PredicateBitset FeatureBitsets[] {
281
  {}, // GIFBS_Invalid
282
};
283
284
// ComplexPattern predicates.
285
enum {
286
  GICP_Invalid,
287
};
288
// See constructor for table contents
289
290
AArch64PostLegalizerLoweringImpl::ComplexMatcherMemFn
291
AArch64PostLegalizerLoweringImpl::ComplexPredicateFns[] = {
292
  nullptr, // GICP_Invalid
293
};
294
295
enum {
296
  GICXXPred_MI_Predicate_GICombiner0 = GICXXPred_Invalid + 1,
297
  GICXXPred_MI_Predicate_GICombiner1,
298
  GICXXPred_MI_Predicate_GICombiner2,
299
  GICXXPred_MI_Predicate_GICombiner3,
300
  GICXXPred_MI_Predicate_GICombiner4,
301
  GICXXPred_MI_Predicate_GICombiner5,
302
  GICXXPred_MI_Predicate_GICombiner6,
303
  GICXXPred_MI_Predicate_GICombiner7,
304
  GICXXPred_MI_Predicate_GICombiner8,
305
  GICXXPred_MI_Predicate_GICombiner9,
306
  GICXXPred_MI_Predicate_GICombiner10,
307
  GICXXPred_MI_Predicate_GICombiner11,
308
  GICXXPred_MI_Predicate_GICombiner12,
309
  GICXXPred_MI_Predicate_GICombiner13,
310
  GICXXPred_MI_Predicate_GICombiner14,
311
  GICXXPred_MI_Predicate_GICombiner15,
312
  GICXXPred_MI_Predicate_GICombiner16,
313
  GICXXPred_MI_Predicate_GICombiner17,
314
};
315
89.8k
bool AArch64PostLegalizerLoweringImpl::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI, const MatcherState &State) const {
316
89.8k
  switch (PredicateID) {
317
757
  case GICXXPred_MI_Predicate_GICombiner0: {
318
757
    return matchDup(*State.MIs[0], MRI, MatchInfos.MDInfo0);
319
0
  }
320
733
  case GICXXPred_MI_Predicate_GICombiner1: {
321
733
    return matchREV(*State.MIs[0], MRI, MatchInfos.MDInfo0);
322
0
  }
323
620
  case GICXXPred_MI_Predicate_GICombiner2: {
324
620
    return matchEXT(*State.MIs[0], MRI, MatchInfos.MDInfo0);
325
0
  }
326
538
  case GICXXPred_MI_Predicate_GICombiner3: {
327
538
    return matchZip(*State.MIs[0], MRI, MatchInfos.MDInfo0);
328
0
  }
329
532
  case GICXXPred_MI_Predicate_GICombiner4: {
330
532
    return matchUZP(*State.MIs[0], MRI, MatchInfos.MDInfo0);
331
0
  }
332
532
  case GICXXPred_MI_Predicate_GICombiner5: {
333
532
    return matchTRN(*State.MIs[0], MRI, MatchInfos.MDInfo0);
334
0
  }
335
531
  case GICXXPred_MI_Predicate_GICombiner6: {
336
531
    return matchDupLane(*State.MIs[0], MRI, MatchInfos.MDInfo1);
337
0
  }
338
463
  case GICXXPred_MI_Predicate_GICombiner7: {
339
463
    return matchINS(*State.MIs[0], MRI, MatchInfos.MDInfo2);
340
0
  }
341
1.77k
  case GICXXPred_MI_Predicate_GICombiner8: {
342
1.77k
    return matchVAshrLshrImm(*State.MIs[0], MRI, MatchInfos.MDInfo3);
343
0
  }
344
10.3k
  case GICXXPred_MI_Predicate_GICombiner9: {
345
10.3k
    return matchAdjustICmpImmAndPred(*State.MIs[0], MRI, MatchInfos.MDInfo4);
346
0
  }
347
10.1k
  case GICXXPred_MI_Predicate_GICombiner10: {
348
10.1k
    return trySwapICmpOperands(*State.MIs[0], MRI);
349
0
  }
350
7.01k
  case GICXXPred_MI_Predicate_GICombiner11: {
351
7.01k
    return matchBuildVectorToDup(*State.MIs[0], MRI);
352
0
  }
353
3.71k
  case GICXXPred_MI_Predicate_GICombiner12: {
354
3.71k
    return matchLowerVectorFCMP(*State.MIs[0], MRI, B);
355
0
  }
356
39.3k
  case GICXXPred_MI_Predicate_GICombiner13: {
357
39.3k
    return matchFormTruncstore(*State.MIs[0], MRI, MatchInfos.MDInfo5);
358
0
  }
359
9.30k
  case GICXXPred_MI_Predicate_GICombiner14: {
360
9.30k
    return matchVectorSextInReg(*State.MIs[0], MRI);
361
0
  }
362
554
  case GICXXPred_MI_Predicate_GICombiner15: {
363
554
    return matchUnmergeExtToUnmerge(*State.MIs[0], MRI, MatchInfos.MDInfo5);
364
0
  }
365
2.49k
  case GICXXPred_MI_Predicate_GICombiner16: {
366
2.49k
    return matchExtMulToMULL(*State.MIs[0], MRI);
367
0
  }
368
554
  case GICXXPred_MI_Predicate_GICombiner17: {
369
554
    return matchScalarizeVectorUnmerge(*State.MIs[0], MRI);
370
0
  }
371
89.8k
  }
372
0
  llvm_unreachable("Unknown predicate");
373
0
  return false;
374
89.8k
}
375
0
bool AArch64PostLegalizerLoweringImpl::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
376
0
  llvm_unreachable("Unknown predicate");
377
0
  return false;
378
0
}
379
0
bool AArch64PostLegalizerLoweringImpl::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
380
0
  llvm_unreachable("Unknown predicate");
381
0
  return false;
382
0
}
383
0
bool AArch64PostLegalizerLoweringImpl::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
384
0
  llvm_unreachable("Unknown predicate");
385
0
  return false;
386
0
}
387
enum {
388
  GICXXPred_Simple_IsRule0Enabled = GICXXPred_Invalid + 1,
389
  GICXXPred_Simple_IsRule1Enabled,
390
  GICXXPred_Simple_IsRule2Enabled,
391
  GICXXPred_Simple_IsRule3Enabled,
392
  GICXXPred_Simple_IsRule4Enabled,
393
  GICXXPred_Simple_IsRule5Enabled,
394
  GICXXPred_Simple_IsRule6Enabled,
395
  GICXXPred_Simple_IsRule7Enabled,
396
  GICXXPred_Simple_IsRule8Enabled,
397
  GICXXPred_Simple_IsRule9Enabled,
398
  GICXXPred_Simple_IsRule10Enabled,
399
  GICXXPred_Simple_IsRule11Enabled,
400
  GICXXPred_Simple_IsRule12Enabled,
401
  GICXXPred_Simple_IsRule13Enabled,
402
  GICXXPred_Simple_IsRule14Enabled,
403
  GICXXPred_Simple_IsRule15Enabled,
404
  GICXXPred_Simple_IsRule16Enabled,
405
  GICXXPred_Simple_IsRule17Enabled,
406
};
407
408
89.8k
bool AArch64PostLegalizerLoweringImpl::testSimplePredicate(unsigned Predicate) const {
409
89.8k
    return RuleConfig.isRuleEnabled(Predicate - GICXXPred_Invalid - 1);
410
89.8k
}
411
// Custom renderers.
412
enum {
413
  GICR_Invalid,
414
};
415
AArch64PostLegalizerLoweringImpl::CustomRendererFn
416
AArch64PostLegalizerLoweringImpl::CustomRenderers[] = {
417
  nullptr, // GICR_Invalid
418
};
419
420
392k
bool AArch64PostLegalizerLoweringImpl::tryCombineAll(MachineInstr &I) const {
421
392k
  const TargetSubtargetInfo &ST = MF.getSubtarget();
422
392k
  const PredicateBitset AvailableFeatures = getAvailableFeatures();
423
392k
  B.setInstrAndDebugLoc(I);
424
392k
  State.MIs.clear();
425
392k
  State.MIs.push_back(&I);
426
392k
  MatchInfos = MatchInfosTy();
427
428
392k
  if (executeMatchTable(*this, State, ExecInfo, B, getMatchTable(), *ST.getInstrInfo(), MRI, *MRI.getTargetRegisterInfo(), *ST.getRegBankInfo(), AvailableFeatures, /*CoverageInfo*/ nullptr)) {
429
10.5k
    return true;
430
10.5k
  }
431
432
381k
  return false;
433
392k
}
434
435
enum {
436
  GICXXCustomAction_CombineApplyGICombiner0 = GICXXCustomAction_Invalid + 1,
437
  GICXXCustomAction_CombineApplyGICombiner1,
438
  GICXXCustomAction_CombineApplyGICombiner2,
439
  GICXXCustomAction_CombineApplyGICombiner3,
440
  GICXXCustomAction_CombineApplyGICombiner4,
441
  GICXXCustomAction_CombineApplyGICombiner5,
442
  GICXXCustomAction_CombineApplyGICombiner6,
443
  GICXXCustomAction_CombineApplyGICombiner7,
444
  GICXXCustomAction_CombineApplyGICombiner8,
445
  GICXXCustomAction_CombineApplyGICombiner9,
446
  GICXXCustomAction_CombineApplyGICombiner10,
447
  GICXXCustomAction_CombineApplyGICombiner11,
448
  GICXXCustomAction_CombineApplyGICombiner12,
449
  GICXXCustomAction_CombineApplyGICombiner13,
450
};
451
10.5k
void AArch64PostLegalizerLoweringImpl::runCustomAction(unsigned ApplyID, const MatcherState &State, NewMIVector &OutMIs) const {
452
10.5k
  switch(ApplyID) {
453
144
  case GICXXCustomAction_CombineApplyGICombiner0:{
454
144
    applyShuffleVectorPseudo(*State.MIs[0], MatchInfos.MDInfo0);
455
144
    return;
456
0
  }
457
82
  case GICXXCustomAction_CombineApplyGICombiner1:{
458
82
    applyEXT(*State.MIs[0], MatchInfos.MDInfo0);
459
82
    return;
460
0
  }
461
68
  case GICXXCustomAction_CombineApplyGICombiner2:{
462
68
    applyDupLane(*State.MIs[0], MRI, B, MatchInfos.MDInfo1);
463
68
    return;
464
0
  }
465
163
  case GICXXCustomAction_CombineApplyGICombiner3:{
466
163
    applyINS(*State.MIs[0], MRI, B, MatchInfos.MDInfo2);
467
163
    return;
468
0
  }
469
164
  case GICXXCustomAction_CombineApplyGICombiner4:{
470
164
    applyVAshrLshrImm(*State.MIs[0], MRI, MatchInfos.MDInfo3);
471
164
    return;
472
0
  }
473
183
  case GICXXCustomAction_CombineApplyGICombiner5:{
474
183
    applyAdjustICmpImmAndPred(*State.MIs[0], MatchInfos.MDInfo4, B, Observer);
475
183
    return;
476
0
  }
477
45
  case GICXXCustomAction_CombineApplyGICombiner6:{
478
45
    applySwapICmpOperands(*State.MIs[0], Observer);
479
45
    return;
480
0
  }
481
4.32k
  case GICXXCustomAction_CombineApplyGICombiner7:{
482
4.32k
    applyBuildVectorToDup(*State.MIs[0], MRI, B);
483
4.32k
    return;
484
0
  }
485
35
  case GICXXCustomAction_CombineApplyGICombiner8:{
486
35
    applyLowerVectorFCMP(*State.MIs[0], MRI, B);
487
35
    return;
488
0
  }
489
4.76k
  case GICXXCustomAction_CombineApplyGICombiner9:{
490
4.76k
    applyFormTruncstore(*State.MIs[0], MRI, B, Observer, MatchInfos.MDInfo5);
491
4.76k
    return;
492
0
  }
493
122
  case GICXXCustomAction_CombineApplyGICombiner10:{
494
122
    applyVectorSextInReg(*State.MIs[0], MRI, B, Observer);
495
122
    return;
496
0
  }
497
0
  case GICXXCustomAction_CombineApplyGICombiner11:{
498
0
    applyUnmergeExtToUnmerge(*State.MIs[0], MRI, B, Observer, MatchInfos.MDInfo5);
499
0
    return;
500
0
  }
501
37
  case GICXXCustomAction_CombineApplyGICombiner12:{
502
37
    applyExtMulToMULL(*State.MIs[0], MRI, B, Observer);
503
37
    return;
504
0
  }
505
436
  case GICXXCustomAction_CombineApplyGICombiner13:{
506
436
    applyScalarizeVectorUnmerge(*State.MIs[0], MRI, B);
507
436
    return;
508
0
  }
509
10.5k
}
510
0
  llvm_unreachable("Unknown Apply Action");
511
0
}
512
#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
513
23.1M
#define GIMT_Encode2(Val) uint8_t(Val), uint8_t((uint16_t)Val >> 8)
514
73.7M
#define GIMT_Encode4(Val) uint8_t(Val), uint8_t((uint32_t)Val >> 8), uint8_t((uint32_t)Val >> 16), uint8_t((uint32_t)Val >> 24)
515
#define GIMT_Encode8(Val) uint8_t(Val), uint8_t((uint64_t)Val >> 8), uint8_t((uint64_t)Val >> 16), uint8_t((uint64_t)Val >> 24),  uint8_t((uint64_t)Val >> 32), uint8_t((uint64_t)Val >> 40), uint8_t((uint64_t)Val >> 48), uint8_t((uint64_t)Val >> 56)
516
#else
517
#define GIMT_Encode2(Val) uint8_t((uint16_t)Val >> 8), uint8_t(Val)
518
#define GIMT_Encode4(Val) uint8_t((uint32_t)Val >> 24), uint8_t((uint32_t)Val >> 16), uint8_t((uint32_t)Val >> 8), uint8_t(Val)
519
#define GIMT_Encode8(Val) uint8_t((uint64_t)Val >> 56), uint8_t((uint64_t)Val >> 48), uint8_t((uint64_t)Val >> 40), uint8_t((uint64_t)Val >> 32),  uint8_t((uint64_t)Val >> 24), uint8_t((uint64_t)Val >> 16), uint8_t((uint64_t)Val >> 8), uint8_t(Val)
520
#endif
521
392k
const uint8_t *AArch64PostLegalizerLoweringImpl::getMatchTable() const {
522
392k
  constexpr static uint8_t MatchTable0[] = {
523
392k
    GIM_SwitchOpcode, /*MI*/0, /*[*/GIMT_Encode2(49), GIMT_Encode2(217), /*)*//*default:*//*Label 10*/ GIMT_Encode4(996),
524
392k
    /*TargetOpcode::G_MUL*//*Label 0*/ GIMT_Encode4(682), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
525
392k
    /*TargetOpcode::G_UNMERGE_VALUES*//*Label 1*/ GIMT_Encode4(699), GIMT_Encode4(0), GIMT_Encode4(0),
526
392k
    /*TargetOpcode::G_BUILD_VECTOR*//*Label 2*/ GIMT_Encode4(732), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
527
392k
    /*TargetOpcode::G_STORE*//*Label 3*/ GIMT_Encode4(749), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
528
392k
    /*TargetOpcode::G_SEXT_INREG*//*Label 4*/ GIMT_Encode4(766), GIMT_Encode4(0), GIMT_Encode4(0),
529
392k
    /*TargetOpcode::G_LSHR*//*Label 5*/ GIMT_Encode4(783),
530
392k
    /*TargetOpcode::G_ASHR*//*Label 6*/ GIMT_Encode4(800), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
531
392k
    /*TargetOpcode::G_ICMP*//*Label 7*/ GIMT_Encode4(817),
532
392k
    /*TargetOpcode::G_FCMP*//*Label 8*/ GIMT_Encode4(850), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0), GIMT_Encode4(0),
533
392k
    /*TargetOpcode::G_SHUFFLE_VECTOR*//*Label 9*/ GIMT_Encode4(867),
534
    // Label 0: @682
535
392k
    GIM_Try, /*On fail goto*//*Label 11*/ GIMT_Encode4(698), // Rule ID 17 //
536
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule16Enabled),
537
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner16),
538
      // Combiner Rule #16: lower_mull; wip_match_opcode 'G_MUL'
539
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner12),
540
392k
      GIR_Done,
541
    // Label 11: @698
542
392k
    GIM_Reject,
543
    // Label 1: @699
544
392k
    GIM_Try, /*On fail goto*//*Label 12*/ GIMT_Encode4(715), // Rule ID 16 //
545
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule15Enabled),
546
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner15),
547
      // Combiner Rule #15: unmerge_ext_to_unmerge; wip_match_opcode 'G_UNMERGE_VALUES'
548
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner11),
549
392k
      GIR_Done,
550
    // Label 12: @715
551
392k
    GIM_Try, /*On fail goto*//*Label 13*/ GIMT_Encode4(731), // Rule ID 18 //
552
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule17Enabled),
553
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner17),
554
      // Combiner Rule #17: vector_unmerge_lowering; wip_match_opcode 'G_UNMERGE_VALUES'
555
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner13),
556
392k
      GIR_Done,
557
    // Label 13: @731
558
392k
    GIM_Reject,
559
    // Label 2: @732
560
392k
    GIM_Try, /*On fail goto*//*Label 14*/ GIMT_Encode4(748), // Rule ID 12 //
561
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule11Enabled),
562
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner11),
563
      // Combiner Rule #11: build_vector_to_dup; wip_match_opcode 'G_BUILD_VECTOR'
564
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner7),
565
392k
      GIR_Done,
566
    // Label 14: @748
567
392k
    GIM_Reject,
568
    // Label 3: @749
569
392k
    GIM_Try, /*On fail goto*//*Label 15*/ GIMT_Encode4(765), // Rule ID 14 //
570
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule13Enabled),
571
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner13),
572
      // Combiner Rule #13: form_truncstore; wip_match_opcode 'G_STORE'
573
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner9),
574
392k
      GIR_Done,
575
    // Label 15: @765
576
392k
    GIM_Reject,
577
    // Label 4: @766
578
392k
    GIM_Try, /*On fail goto*//*Label 16*/ GIMT_Encode4(782), // Rule ID 15 //
579
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule14Enabled),
580
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner14),
581
      // Combiner Rule #14: vector_sext_inreg_to_shift; wip_match_opcode 'G_SEXT_INREG'
582
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner10),
583
392k
      GIR_Done,
584
    // Label 16: @782
585
392k
    GIM_Reject,
586
    // Label 5: @783
587
392k
    GIM_Try, /*On fail goto*//*Label 17*/ GIMT_Encode4(799), // Rule ID 9 //
588
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule8Enabled),
589
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner8),
590
      // Combiner Rule #8: vashr_vlshr_imm; wip_match_opcode 'G_LSHR'
591
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner4),
592
392k
      GIR_Done,
593
    // Label 17: @799
594
392k
    GIM_Reject,
595
    // Label 6: @800
596
392k
    GIM_Try, /*On fail goto*//*Label 18*/ GIMT_Encode4(816), // Rule ID 8 //
597
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule8Enabled),
598
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner8),
599
      // Combiner Rule #8: vashr_vlshr_imm; wip_match_opcode 'G_ASHR'
600
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner4),
601
392k
      GIR_Done,
602
    // Label 18: @816
603
392k
    GIM_Reject,
604
    // Label 7: @817
605
392k
    GIM_Try, /*On fail goto*//*Label 19*/ GIMT_Encode4(833), // Rule ID 10 //
606
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule9Enabled),
607
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner9),
608
      // Combiner Rule #9: adjust_icmp_imm; wip_match_opcode 'G_ICMP'
609
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner5),
610
392k
      GIR_Done,
611
    // Label 19: @833
612
392k
    GIM_Try, /*On fail goto*//*Label 20*/ GIMT_Encode4(849), // Rule ID 11 //
613
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule10Enabled),
614
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner10),
615
      // Combiner Rule #10: swap_icmp_operands; wip_match_opcode 'G_ICMP'
616
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner6),
617
392k
      GIR_Done,
618
    // Label 20: @849
619
392k
    GIM_Reject,
620
    // Label 8: @850
621
392k
    GIM_Try, /*On fail goto*//*Label 21*/ GIMT_Encode4(866), // Rule ID 13 //
622
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule12Enabled),
623
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner12),
624
      // Combiner Rule #12: lower_vector_fcmp; wip_match_opcode 'G_FCMP'
625
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner8),
626
392k
      GIR_Done,
627
    // Label 21: @866
628
392k
    GIM_Reject,
629
    // Label 9: @867
630
392k
    GIM_Try, /*On fail goto*//*Label 22*/ GIMT_Encode4(883), // Rule ID 0 //
631
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule0Enabled),
632
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner0),
633
      // Combiner Rule #0: dup; wip_match_opcode 'G_SHUFFLE_VECTOR'
634
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
635
392k
      GIR_Done,
636
    // Label 22: @883
637
392k
    GIM_Try, /*On fail goto*//*Label 23*/ GIMT_Encode4(899), // Rule ID 1 //
638
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule1Enabled),
639
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner1),
640
      // Combiner Rule #1: rev; wip_match_opcode 'G_SHUFFLE_VECTOR'
641
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
642
392k
      GIR_Done,
643
    // Label 23: @899
644
392k
    GIM_Try, /*On fail goto*//*Label 24*/ GIMT_Encode4(915), // Rule ID 2 //
645
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule2Enabled),
646
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner2),
647
      // Combiner Rule #2: ext; wip_match_opcode 'G_SHUFFLE_VECTOR'
648
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner1),
649
392k
      GIR_Done,
650
    // Label 24: @915
651
392k
    GIM_Try, /*On fail goto*//*Label 25*/ GIMT_Encode4(931), // Rule ID 3 //
652
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule3Enabled),
653
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner3),
654
      // Combiner Rule #3: zip; wip_match_opcode 'G_SHUFFLE_VECTOR'
655
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
656
392k
      GIR_Done,
657
    // Label 25: @931
658
392k
    GIM_Try, /*On fail goto*//*Label 26*/ GIMT_Encode4(947), // Rule ID 4 //
659
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule4Enabled),
660
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner4),
661
      // Combiner Rule #4: uzp; wip_match_opcode 'G_SHUFFLE_VECTOR'
662
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
663
392k
      GIR_Done,
664
    // Label 26: @947
665
392k
    GIM_Try, /*On fail goto*//*Label 27*/ GIMT_Encode4(963), // Rule ID 5 //
666
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule5Enabled),
667
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner5),
668
      // Combiner Rule #5: trn; wip_match_opcode 'G_SHUFFLE_VECTOR'
669
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner0),
670
392k
      GIR_Done,
671
    // Label 27: @963
672
392k
    GIM_Try, /*On fail goto*//*Label 28*/ GIMT_Encode4(979), // Rule ID 6 //
673
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule6Enabled),
674
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner6),
675
      // Combiner Rule #6: form_duplane; wip_match_opcode 'G_SHUFFLE_VECTOR'
676
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner2),
677
392k
      GIR_Done,
678
    // Label 28: @979
679
392k
    GIM_Try, /*On fail goto*//*Label 29*/ GIMT_Encode4(995), // Rule ID 7 //
680
392k
      GIM_CheckSimplePredicate, GIMT_Encode2(GICXXPred_Simple_IsRule7Enabled),
681
392k
      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIMT_Encode2(GICXXPred_MI_Predicate_GICombiner7),
682
      // Combiner Rule #7: shuf_to_ins; wip_match_opcode 'G_SHUFFLE_VECTOR'
683
392k
      GIR_CustomAction, GIMT_Encode2(GICXXCustomAction_CombineApplyGICombiner3),
684
392k
      GIR_Done,
685
    // Label 29: @995
686
392k
    GIM_Reject,
687
    // Label 10: @996
688
392k
    GIM_Reject,
689
392k
    }; // Size: 997 bytes
690
392k
  return MatchTable0;
691
392k
}
692
#undef GIMT_Encode2
693
#undef GIMT_Encode4
694
#undef GIMT_Encode8
695
696
#endif // ifdef GET_GICOMBINER_IMPL
697
698
#ifdef GET_GICOMBINER_CONSTRUCTOR_INITS
699
AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)),
700
AvailableFunctionFeatures()
701
#endif // ifdef GET_GICOMBINER_CONSTRUCTOR_INITS
702
#ifdef GET_GICOMBINER_CONSTRUCTOR_INITS
703
, State(0),
704
ExecInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
705
#endif // ifdef GET_GICOMBINER_CONSTRUCTOR_INITS
706