Coverage Report

Created: 2024-01-17 10:31

/src/build/lib/Target/AMDGPU/AMDGPUGenCallingConv.inc
Line
Count
Source (jump to first uncovered line)
1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Calling Convention Implementation Fragment                                 *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
#ifndef GET_CC_REGISTER_LISTS
10
11
static bool CC_AMDGPU(unsigned ValNo, MVT ValVT,
12
                      MVT LocVT, CCValAssign::LocInfo LocInfo,
13
                      ISD::ArgFlagsTy ArgFlags, CCState &State);
14
static bool CC_AMDGPU_CS_CHAIN(unsigned ValNo, MVT ValVT,
15
                               MVT LocVT, CCValAssign::LocInfo LocInfo,
16
                               ISD::ArgFlagsTy ArgFlags, CCState &State);
17
static bool CC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
18
                           MVT LocVT, CCValAssign::LocInfo LocInfo,
19
                           ISD::ArgFlagsTy ArgFlags, CCState &State);
20
static bool CC_SI_Gfx(unsigned ValNo, MVT ValVT,
21
                      MVT LocVT, CCValAssign::LocInfo LocInfo,
22
                      ISD::ArgFlagsTy ArgFlags, CCState &State);
23
static bool CC_SI_SHADER(unsigned ValNo, MVT ValVT,
24
                         MVT LocVT, CCValAssign::LocInfo LocInfo,
25
                         ISD::ArgFlagsTy ArgFlags, CCState &State);
26
static bool RetCC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
27
                              MVT LocVT, CCValAssign::LocInfo LocInfo,
28
                              ISD::ArgFlagsTy ArgFlags, CCState &State);
29
static bool RetCC_SI_Gfx(unsigned ValNo, MVT ValVT,
30
                         MVT LocVT, CCValAssign::LocInfo LocInfo,
31
                         ISD::ArgFlagsTy ArgFlags, CCState &State);
32
static bool RetCC_SI_Shader(unsigned ValNo, MVT ValVT,
33
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
34
                            ISD::ArgFlagsTy ArgFlags, CCState &State);
35
36
37
static bool CC_AMDGPU(unsigned ValNo, MVT ValVT,
38
                      MVT LocVT, CCValAssign::LocInfo LocInfo,
39
0
                      ISD::ArgFlagsTy ArgFlags, CCState &State) {
40
41
0
  if (static_cast<const GCNSubtarget&>(State.getMachineFunction().getSubtarget()).getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
42
0
    if (!CC_SI_SHADER(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
43
0
      return false;
44
0
  }
45
46
0
  if (static_cast<const GCNSubtarget&>(State.getMachineFunction().getSubtarget()).getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS && State.getCallingConv() == CallingConv::C) {
47
0
    if (!CC_AMDGPU_Func(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
48
0
      return false;
49
0
  }
50
51
0
  return true; // CC didn't match.
52
0
}
53
54
55
static bool CC_AMDGPU_CS_CHAIN(unsigned ValNo, MVT ValVT,
56
                               MVT LocVT, CCValAssign::LocInfo LocInfo,
57
0
                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
58
59
0
  if (ArgFlags.isInReg()) {
60
0
    if (LocVT == MVT::f32 ||
61
0
        LocVT == MVT::i32 ||
62
0
        LocVT == MVT::f16 ||
63
0
        LocVT == MVT::i16 ||
64
0
        LocVT == MVT::v2i16 ||
65
0
        LocVT == MVT::v2f16 ||
66
0
        LocVT == MVT::bf16 ||
67
0
        LocVT == MVT::v2bf16) {
68
0
      static const MCPhysReg RegList1[] = {
69
0
        AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR44, AMDGPU::SGPR45, AMDGPU::SGPR46, AMDGPU::SGPR47, AMDGPU::SGPR48, AMDGPU::SGPR49, AMDGPU::SGPR50, AMDGPU::SGPR51, AMDGPU::SGPR52, AMDGPU::SGPR53, AMDGPU::SGPR54, AMDGPU::SGPR55, AMDGPU::SGPR56, AMDGPU::SGPR57, AMDGPU::SGPR58, AMDGPU::SGPR59, AMDGPU::SGPR60, AMDGPU::SGPR61, AMDGPU::SGPR62, AMDGPU::SGPR63, AMDGPU::SGPR64, AMDGPU::SGPR65, AMDGPU::SGPR66, AMDGPU::SGPR67, AMDGPU::SGPR68, AMDGPU::SGPR69, AMDGPU::SGPR70, AMDGPU::SGPR71, AMDGPU::SGPR72, AMDGPU::SGPR73, AMDGPU::SGPR74, AMDGPU::SGPR75, AMDGPU::SGPR76, AMDGPU::SGPR77, AMDGPU::SGPR78, AMDGPU::SGPR79, AMDGPU::SGPR80, AMDGPU::SGPR81, AMDGPU::SGPR82, AMDGPU::SGPR83, AMDGPU::SGPR84, AMDGPU::SGPR85, AMDGPU::SGPR86, AMDGPU::SGPR87, AMDGPU::SGPR88, AMDGPU::SGPR89, AMDGPU::SGPR90, AMDGPU::SGPR91, AMDGPU::SGPR92, AMDGPU::SGPR93, AMDGPU::SGPR94, AMDGPU::SGPR95, AMDGPU::SGPR96, AMDGPU::SGPR97, AMDGPU::SGPR98, AMDGPU::SGPR99, AMDGPU::SGPR100, AMDGPU::SGPR101, AMDGPU::SGPR102, AMDGPU::SGPR103, AMDGPU::SGPR104
70
0
      };
71
0
      if (unsigned Reg = State.AllocateReg(RegList1)) {
72
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
73
0
        return false;
74
0
      }
75
0
    }
76
0
  }
77
78
0
  if (!ArgFlags.isInReg()) {
79
0
    if (LocVT == MVT::f32 ||
80
0
        LocVT == MVT::i32 ||
81
0
        LocVT == MVT::f16 ||
82
0
        LocVT == MVT::i16 ||
83
0
        LocVT == MVT::v2i16 ||
84
0
        LocVT == MVT::v2f16 ||
85
0
        LocVT == MVT::bf16 ||
86
0
        LocVT == MVT::v2bf16) {
87
0
      static const MCPhysReg RegList2[] = {
88
0
        AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR136, AMDGPU::VGPR137, AMDGPU::VGPR138, AMDGPU::VGPR139, AMDGPU::VGPR140, AMDGPU::VGPR141, AMDGPU::VGPR142, AMDGPU::VGPR143, AMDGPU::VGPR144, AMDGPU::VGPR145, AMDGPU::VGPR146, AMDGPU::VGPR147, AMDGPU::VGPR148, AMDGPU::VGPR149, AMDGPU::VGPR150, AMDGPU::VGPR151, AMDGPU::VGPR152, AMDGPU::VGPR153, AMDGPU::VGPR154, AMDGPU::VGPR155, AMDGPU::VGPR156, AMDGPU::VGPR157, AMDGPU::VGPR158, AMDGPU::VGPR159, AMDGPU::VGPR160, AMDGPU::VGPR161, AMDGPU::VGPR162, AMDGPU::VGPR163, AMDGPU::VGPR164, AMDGPU::VGPR165, AMDGPU::VGPR166, AMDGPU::VGPR167, AMDGPU::VGPR168, AMDGPU::VGPR169, AMDGPU::VGPR170, AMDGPU::VGPR171, AMDGPU::VGPR172, AMDGPU::VGPR173, AMDGPU::VGPR174, AMDGPU::VGPR175, AMDGPU::VGPR176, AMDGPU::VGPR177, AMDGPU::VGPR178, AMDGPU::VGPR179, AMDGPU::VGPR180, AMDGPU::VGPR181, AMDGPU::VGPR182, AMDGPU::VGPR183, AMDGPU::VGPR184, AMDGPU::VGPR185, AMDGPU::VGPR186, AMDGPU::VGPR187, AMDGPU::VGPR188, AMDGPU::VGPR189, AMDGPU::VGPR190, AMDGPU::VGPR191, AMDGPU::VGPR192, AMDGPU::VGPR193, AMDGPU::VGPR194, AMDGPU::VGPR195, AMDGPU::VGPR196, AMDGPU::VGPR197, AMDGPU::VGPR198, AMDGPU::VGPR199, AMDGPU::VGPR200, AMDGPU::VGPR201, AMDGPU::VGPR202, AMDGPU::VGPR203, AMDGPU::VGPR204, AMDGPU::VGPR205, AMDGPU::VGPR206, AMDGPU::VGPR207, AMDGPU::VGPR208, AMDGPU::VGPR209, AMDGPU::VGPR210, AMDGPU::VGPR211, AMDGPU::VGPR212, AMDGPU::VGPR213, AMDGPU::VGPR214, AMDGPU::VGPR215, AMDGPU::VGPR216, AMDGPU::VGPR217, AMDGPU::VGPR218, AMDGPU::VGPR219, AMDGPU::VGPR220, AMDGPU::VGPR221, AMDGPU::VGPR222, AMDGPU::VGPR223, AMDGPU::VGPR224, AMDGPU::VGPR225, AMDGPU::VGPR226, AMDGPU::VGPR227, AMDGPU::VGPR228, AMDGPU::VGPR229, AMDGPU::VGPR230, AMDGPU::VGPR231, AMDGPU::VGPR232, AMDGPU::VGPR233, AMDGPU::VGPR234, AMDGPU::VGPR235, AMDGPU::VGPR236, AMDGPU::VGPR237, AMDGPU::VGPR238, AMDGPU::VGPR239, AMDGPU::VGPR240, AMDGPU::VGPR241, AMDGPU::VGPR242, AMDGPU::VGPR243, AMDGPU::VGPR244, AMDGPU::VGPR245, AMDGPU::VGPR246, AMDGPU::VGPR247, AMDGPU::VGPR248, AMDGPU::VGPR249, AMDGPU::VGPR250, AMDGPU::VGPR251, AMDGPU::VGPR252, AMDGPU::VGPR253, AMDGPU::VGPR254
89
0
      };
90
0
      if (unsigned Reg = State.AllocateReg(RegList2)) {
91
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
92
0
        return false;
93
0
      }
94
0
    }
95
0
  }
96
97
0
  return true; // CC didn't match.
98
0
}
99
100
101
static bool CC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
102
                           MVT LocVT, CCValAssign::LocInfo LocInfo,
103
0
                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
104
105
0
  if (ArgFlags.isByVal()) {
106
0
    State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, Align(4), ArgFlags);
107
0
    return false;
108
0
  }
109
110
0
  if (LocVT == MVT::i1) {
111
0
    LocVT = MVT::i32;
112
0
    if (ArgFlags.isSExt())
113
0
      LocInfo = CCValAssign::SExt;
114
0
    else if (ArgFlags.isZExt())
115
0
      LocInfo = CCValAssign::ZExt;
116
0
    else
117
0
      LocInfo = CCValAssign::AExt;
118
0
  }
119
120
0
  if (LocVT == MVT::i8 ||
121
0
      LocVT == MVT::i16) {
122
0
    if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
123
0
      LocVT = MVT::i32;
124
0
      if (ArgFlags.isSExt())
125
0
        LocInfo = CCValAssign::SExt;
126
0
      else if (ArgFlags.isZExt())
127
0
        LocInfo = CCValAssign::ZExt;
128
0
      else
129
0
        LocInfo = CCValAssign::AExt;
130
0
    }
131
0
  }
132
133
0
  if (ArgFlags.isInReg()) {
134
0
    if (LocVT == MVT::f32 ||
135
0
        LocVT == MVT::i32 ||
136
0
        LocVT == MVT::f16 ||
137
0
        LocVT == MVT::i16 ||
138
0
        LocVT == MVT::v2i16 ||
139
0
        LocVT == MVT::v2f16 ||
140
0
        LocVT == MVT::bf16 ||
141
0
        LocVT == MVT::v2bf16) {
142
0
      static const MCPhysReg RegList1[] = {
143
0
        AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29
144
0
      };
145
0
      if (unsigned Reg = State.AllocateReg(RegList1)) {
146
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
147
0
        return false;
148
0
      }
149
0
    }
150
0
  }
151
152
0
  if (LocVT == MVT::i32 ||
153
0
      LocVT == MVT::f32 ||
154
0
      LocVT == MVT::i16 ||
155
0
      LocVT == MVT::f16 ||
156
0
      LocVT == MVT::v2i16 ||
157
0
      LocVT == MVT::v2f16 ||
158
0
      LocVT == MVT::i1 ||
159
0
      LocVT == MVT::bf16 ||
160
0
      LocVT == MVT::v2bf16) {
161
0
    static const MCPhysReg RegList2[] = {
162
0
      AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
163
0
    };
164
0
    if (unsigned Reg = State.AllocateReg(RegList2)) {
165
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
166
0
      return false;
167
0
    }
168
0
  }
169
170
0
  if (LocVT == MVT::i32 ||
171
0
      LocVT == MVT::f32 ||
172
0
      LocVT == MVT::v2i16 ||
173
0
      LocVT == MVT::v2f16 ||
174
0
      LocVT == MVT::i16 ||
175
0
      LocVT == MVT::f16 ||
176
0
      LocVT == MVT::i1 ||
177
0
      LocVT == MVT::bf16 ||
178
0
      LocVT == MVT::v2bf16) {
179
0
    int64_t Offset3 = State.AllocateStack(4, Align(4));
180
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
181
0
    return false;
182
0
  }
183
184
0
  return true; // CC didn't match.
185
0
}
186
187
188
static bool CC_SI_Gfx(unsigned ValNo, MVT ValVT,
189
                      MVT LocVT, CCValAssign::LocInfo LocInfo,
190
0
                      ISD::ArgFlagsTy ArgFlags, CCState &State) {
191
192
0
  if (ArgFlags.isInReg()) {
193
0
    if (LocVT == MVT::f32 ||
194
0
        LocVT == MVT::i32 ||
195
0
        LocVT == MVT::f16 ||
196
0
        LocVT == MVT::i16 ||
197
0
        LocVT == MVT::v2i16 ||
198
0
        LocVT == MVT::v2f16 ||
199
0
        LocVT == MVT::bf16 ||
200
0
        LocVT == MVT::v2bf16) {
201
0
      static const MCPhysReg RegList1[] = {
202
0
        AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29
203
0
      };
204
0
      if (unsigned Reg = State.AllocateReg(RegList1)) {
205
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
206
0
        return false;
207
0
      }
208
0
    }
209
0
  }
210
211
0
  if (!ArgFlags.isInReg()) {
212
0
    if (LocVT == MVT::f32 ||
213
0
        LocVT == MVT::i32 ||
214
0
        LocVT == MVT::f16 ||
215
0
        LocVT == MVT::i16 ||
216
0
        LocVT == MVT::v2i16 ||
217
0
        LocVT == MVT::v2f16 ||
218
0
        LocVT == MVT::bf16 ||
219
0
        LocVT == MVT::v2bf16) {
220
0
      static const MCPhysReg RegList2[] = {
221
0
        AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
222
0
      };
223
0
      if (unsigned Reg = State.AllocateReg(RegList2)) {
224
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
225
0
        return false;
226
0
      }
227
0
    }
228
0
  }
229
230
0
  if (LocVT == MVT::i32 ||
231
0
      LocVT == MVT::f32 ||
232
0
      LocVT == MVT::v2i16 ||
233
0
      LocVT == MVT::v2f16 ||
234
0
      LocVT == MVT::i16 ||
235
0
      LocVT == MVT::f16 ||
236
0
      LocVT == MVT::i1 ||
237
0
      LocVT == MVT::bf16 ||
238
0
      LocVT == MVT::v2bf16) {
239
0
    int64_t Offset3 = State.AllocateStack(4, Align(4));
240
0
    State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
241
0
    return false;
242
0
  }
243
244
0
  return true; // CC didn't match.
245
0
}
246
247
248
static bool CC_SI_SHADER(unsigned ValNo, MVT ValVT,
249
                         MVT LocVT, CCValAssign::LocInfo LocInfo,
250
0
                         ISD::ArgFlagsTy ArgFlags, CCState &State) {
251
252
0
  if (ArgFlags.isInReg()) {
253
0
    if (LocVT == MVT::f32 ||
254
0
        LocVT == MVT::i32 ||
255
0
        LocVT == MVT::f16 ||
256
0
        LocVT == MVT::i16 ||
257
0
        LocVT == MVT::v2i16 ||
258
0
        LocVT == MVT::v2f16 ||
259
0
        LocVT == MVT::bf16 ||
260
0
        LocVT == MVT::v2bf16) {
261
0
      static const MCPhysReg RegList1[] = {
262
0
        AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43
263
0
      };
264
0
      if (unsigned Reg = State.AllocateReg(RegList1)) {
265
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
266
0
        return false;
267
0
      }
268
0
    }
269
0
  }
270
271
0
  if (!ArgFlags.isInReg()) {
272
0
    if (LocVT == MVT::f32 ||
273
0
        LocVT == MVT::i32 ||
274
0
        LocVT == MVT::f16 ||
275
0
        LocVT == MVT::i16 ||
276
0
        LocVT == MVT::v2i16 ||
277
0
        LocVT == MVT::v2f16 ||
278
0
        LocVT == MVT::bf16 ||
279
0
        LocVT == MVT::v2bf16) {
280
0
      static const MCPhysReg RegList2[] = {
281
0
        AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
282
0
      };
283
0
      if (unsigned Reg = State.AllocateReg(RegList2)) {
284
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
285
0
        return false;
286
0
      }
287
0
    }
288
0
  }
289
290
0
  return true; // CC didn't match.
291
0
}
292
293
294
static bool RetCC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
295
                              MVT LocVT, CCValAssign::LocInfo LocInfo,
296
0
                              ISD::ArgFlagsTy ArgFlags, CCState &State) {
297
298
0
  if (LocVT == MVT::i1) {
299
0
    LocVT = MVT::i32;
300
0
    if (ArgFlags.isSExt())
301
0
      LocInfo = CCValAssign::SExt;
302
0
    else if (ArgFlags.isZExt())
303
0
      LocInfo = CCValAssign::ZExt;
304
0
    else
305
0
      LocInfo = CCValAssign::AExt;
306
0
  }
307
308
0
  if (LocVT == MVT::i1 ||
309
0
      LocVT == MVT::i16) {
310
0
    if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
311
0
      LocVT = MVT::i32;
312
0
      if (ArgFlags.isSExt())
313
0
        LocInfo = CCValAssign::SExt;
314
0
      else if (ArgFlags.isZExt())
315
0
        LocInfo = CCValAssign::ZExt;
316
0
      else
317
0
        LocInfo = CCValAssign::AExt;
318
0
    }
319
0
  }
320
321
0
  if (LocVT == MVT::i32 ||
322
0
      LocVT == MVT::f32 ||
323
0
      LocVT == MVT::i16 ||
324
0
      LocVT == MVT::f16 ||
325
0
      LocVT == MVT::v2i16 ||
326
0
      LocVT == MVT::v2f16 ||
327
0
      LocVT == MVT::bf16 ||
328
0
      LocVT == MVT::v2bf16) {
329
0
    static const MCPhysReg RegList1[] = {
330
0
      AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
331
0
    };
332
0
    if (unsigned Reg = State.AllocateReg(RegList1)) {
333
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
334
0
      return false;
335
0
    }
336
0
  }
337
338
0
  return true; // CC didn't match.
339
0
}
340
341
342
static bool RetCC_SI_Gfx(unsigned ValNo, MVT ValVT,
343
                         MVT LocVT, CCValAssign::LocInfo LocInfo,
344
0
                         ISD::ArgFlagsTy ArgFlags, CCState &State) {
345
346
0
  if (LocVT == MVT::i1) {
347
0
    LocVT = MVT::i32;
348
0
    if (ArgFlags.isSExt())
349
0
      LocInfo = CCValAssign::SExt;
350
0
    else if (ArgFlags.isZExt())
351
0
      LocInfo = CCValAssign::ZExt;
352
0
    else
353
0
      LocInfo = CCValAssign::AExt;
354
0
  }
355
356
0
  if (LocVT == MVT::i1 ||
357
0
      LocVT == MVT::i16) {
358
0
    if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
359
0
      LocVT = MVT::i32;
360
0
      if (ArgFlags.isSExt())
361
0
        LocInfo = CCValAssign::SExt;
362
0
      else if (ArgFlags.isZExt())
363
0
        LocInfo = CCValAssign::ZExt;
364
0
      else
365
0
        LocInfo = CCValAssign::AExt;
366
0
    }
367
0
  }
368
369
0
  if (!ArgFlags.isInReg()) {
370
0
    if (LocVT == MVT::f32 ||
371
0
        LocVT == MVT::i32 ||
372
0
        LocVT == MVT::f16 ||
373
0
        LocVT == MVT::i16 ||
374
0
        LocVT == MVT::v2i16 ||
375
0
        LocVT == MVT::v2f16 ||
376
0
        LocVT == MVT::bf16 ||
377
0
        LocVT == MVT::v2bf16) {
378
0
      static const MCPhysReg RegList1[] = {
379
0
        AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
380
0
      };
381
0
      if (unsigned Reg = State.AllocateReg(RegList1)) {
382
0
        State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
383
0
        return false;
384
0
      }
385
0
    }
386
0
  }
387
388
0
  return true; // CC didn't match.
389
0
}
390
391
392
static bool RetCC_SI_Shader(unsigned ValNo, MVT ValVT,
393
                            MVT LocVT, CCValAssign::LocInfo LocInfo,
394
0
                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
395
396
0
  if (LocVT == MVT::i1 ||
397
0
      LocVT == MVT::i16) {
398
0
    if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
399
0
      LocVT = MVT::i32;
400
0
      if (ArgFlags.isSExt())
401
0
        LocInfo = CCValAssign::SExt;
402
0
      else if (ArgFlags.isZExt())
403
0
        LocInfo = CCValAssign::ZExt;
404
0
      else
405
0
        LocInfo = CCValAssign::AExt;
406
0
    }
407
0
  }
408
409
0
  if (LocVT == MVT::i32 ||
410
0
      LocVT == MVT::i16 ||
411
0
      LocVT == MVT::v2i16) {
412
0
    static const MCPhysReg RegList1[] = {
413
0
      AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43
414
0
    };
415
0
    if (unsigned Reg = State.AllocateReg(RegList1)) {
416
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
417
0
      return false;
418
0
    }
419
0
  }
420
421
0
  if (LocVT == MVT::f32 ||
422
0
      LocVT == MVT::f16 ||
423
0
      LocVT == MVT::v2f16 ||
424
0
      LocVT == MVT::bf16 ||
425
0
      LocVT == MVT::v2bf16) {
426
0
    static const MCPhysReg RegList2[] = {
427
0
      AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
428
0
    };
429
0
    if (unsigned Reg = State.AllocateReg(RegList2)) {
430
0
      State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
431
0
      return false;
432
0
    }
433
0
  }
434
435
0
  return true; // CC didn't match.
436
0
}
437
438
#else
439
440
const MCRegister CC_AMDGPU_ArgRegs[] = { 0 };
441
const MCRegister CC_AMDGPU_CS_CHAIN_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR100, AMDGPU::SGPR101, AMDGPU::SGPR102, AMDGPU::SGPR103, AMDGPU::SGPR104, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR44, AMDGPU::SGPR45, AMDGPU::SGPR46, AMDGPU::SGPR47, AMDGPU::SGPR48, AMDGPU::SGPR49, AMDGPU::SGPR5, AMDGPU::SGPR50, AMDGPU::SGPR51, AMDGPU::SGPR52, AMDGPU::SGPR53, AMDGPU::SGPR54, AMDGPU::SGPR55, AMDGPU::SGPR56, AMDGPU::SGPR57, AMDGPU::SGPR58, AMDGPU::SGPR59, AMDGPU::SGPR6, AMDGPU::SGPR60, AMDGPU::SGPR61, AMDGPU::SGPR62, AMDGPU::SGPR63, AMDGPU::SGPR64, AMDGPU::SGPR65, AMDGPU::SGPR66, AMDGPU::SGPR67, AMDGPU::SGPR68, AMDGPU::SGPR69, AMDGPU::SGPR7, AMDGPU::SGPR70, AMDGPU::SGPR71, AMDGPU::SGPR72, AMDGPU::SGPR73, AMDGPU::SGPR74, AMDGPU::SGPR75, AMDGPU::SGPR76, AMDGPU::SGPR77, AMDGPU::SGPR78, AMDGPU::SGPR79, AMDGPU::SGPR8, AMDGPU::SGPR80, AMDGPU::SGPR81, AMDGPU::SGPR82, AMDGPU::SGPR83, AMDGPU::SGPR84, AMDGPU::SGPR85, AMDGPU::SGPR86, AMDGPU::SGPR87, AMDGPU::SGPR88, AMDGPU::SGPR89, AMDGPU::SGPR9, AMDGPU::SGPR90, AMDGPU::SGPR91, AMDGPU::SGPR92, AMDGPU::SGPR93, AMDGPU::SGPR94, AMDGPU::SGPR95, AMDGPU::SGPR96, AMDGPU::SGPR97, AMDGPU::SGPR98, AMDGPU::SGPR99, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR136, AMDGPU::VGPR137, AMDGPU::VGPR138, AMDGPU::VGPR139, AMDGPU::VGPR14, AMDGPU::VGPR140, AMDGPU::VGPR141, AMDGPU::VGPR142, AMDGPU::VGPR143, AMDGPU::VGPR144, AMDGPU::VGPR145, AMDGPU::VGPR146, AMDGPU::VGPR147, AMDGPU::VGPR148, AMDGPU::VGPR149, AMDGPU::VGPR15, AMDGPU::VGPR150, AMDGPU::VGPR151, AMDGPU::VGPR152, AMDGPU::VGPR153, AMDGPU::VGPR154, AMDGPU::VGPR155, AMDGPU::VGPR156, AMDGPU::VGPR157, AMDGPU::VGPR158, AMDGPU::VGPR159, AMDGPU::VGPR16, AMDGPU::VGPR160, AMDGPU::VGPR161, AMDGPU::VGPR162, AMDGPU::VGPR163, AMDGPU::VGPR164, AMDGPU::VGPR165, AMDGPU::VGPR166, AMDGPU::VGPR167, AMDGPU::VGPR168, AMDGPU::VGPR169, AMDGPU::VGPR17, AMDGPU::VGPR170, AMDGPU::VGPR171, AMDGPU::VGPR172, AMDGPU::VGPR173, AMDGPU::VGPR174, AMDGPU::VGPR175, AMDGPU::VGPR176, AMDGPU::VGPR177, AMDGPU::VGPR178, AMDGPU::VGPR179, AMDGPU::VGPR18, AMDGPU::VGPR180, AMDGPU::VGPR181, AMDGPU::VGPR182, AMDGPU::VGPR183, AMDGPU::VGPR184, AMDGPU::VGPR185, AMDGPU::VGPR186, AMDGPU::VGPR187, AMDGPU::VGPR188, AMDGPU::VGPR189, AMDGPU::VGPR19, AMDGPU::VGPR190, AMDGPU::VGPR191, AMDGPU::VGPR192, AMDGPU::VGPR193, AMDGPU::VGPR194, AMDGPU::VGPR195, AMDGPU::VGPR196, AMDGPU::VGPR197, AMDGPU::VGPR198, AMDGPU::VGPR199, AMDGPU::VGPR20, AMDGPU::VGPR200, AMDGPU::VGPR201, AMDGPU::VGPR202, AMDGPU::VGPR203, AMDGPU::VGPR204, AMDGPU::VGPR205, AMDGPU::VGPR206, AMDGPU::VGPR207, AMDGPU::VGPR208, AMDGPU::VGPR209, AMDGPU::VGPR21, AMDGPU::VGPR210, AMDGPU::VGPR211, AMDGPU::VGPR212, AMDGPU::VGPR213, AMDGPU::VGPR214, AMDGPU::VGPR215, AMDGPU::VGPR216, AMDGPU::VGPR217, AMDGPU::VGPR218, AMDGPU::VGPR219, AMDGPU::VGPR22, AMDGPU::VGPR220, AMDGPU::VGPR221, AMDGPU::VGPR222, AMDGPU::VGPR223, AMDGPU::VGPR224, AMDGPU::VGPR225, AMDGPU::VGPR226, AMDGPU::VGPR227, AMDGPU::VGPR228, AMDGPU::VGPR229, AMDGPU::VGPR23, AMDGPU::VGPR230, AMDGPU::VGPR231, AMDGPU::VGPR232, AMDGPU::VGPR233, AMDGPU::VGPR234, AMDGPU::VGPR235, AMDGPU::VGPR236, AMDGPU::VGPR237, AMDGPU::VGPR238, AMDGPU::VGPR239, AMDGPU::VGPR24, AMDGPU::VGPR240, AMDGPU::VGPR241, AMDGPU::VGPR242, AMDGPU::VGPR243, AMDGPU::VGPR244, AMDGPU::VGPR245, AMDGPU::VGPR246, AMDGPU::VGPR247, AMDGPU::VGPR248, AMDGPU::VGPR249, AMDGPU::VGPR25, AMDGPU::VGPR250, AMDGPU::VGPR251, AMDGPU::VGPR252, AMDGPU::VGPR253, AMDGPU::VGPR254, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
442
const MCRegister CC_AMDGPU_Func_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
443
const MCRegister CC_SI_Gfx_ArgRegs[] = { AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
444
const MCRegister CC_SI_SHADER_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
445
const MCRegister RetCC_AMDGPU_Func_ArgRegs[] = { AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
446
const MCRegister RetCC_SI_Gfx_ArgRegs[] = { AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
447
const MCRegister RetCC_SI_Shader_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
448
449
#endif // CC_REGISTER_LIST