/src/build/lib/Target/AMDGPU/AMDGPUGenMCPseudoLowering.inc
Line | Count | Source (jump to first uncovered line) |
1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* Pseudo-instruction MC lowering Source Fragment *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* *| |
7 | | \*===----------------------------------------------------------------------===*/ |
8 | | |
9 | | bool AMDGPUAsmPrinter:: |
10 | | emitPseudoExpansionLowering(MCStreamer &OutStreamer, |
11 | 0 | const MachineInstr *MI) { |
12 | 0 | switch (MI->getOpcode()) { |
13 | 0 | default: return false; |
14 | 0 | case AMDGPU::V_MOV_B32_indirect_read: { |
15 | 0 | MCInst TmpInst; |
16 | 0 | MCOperand MCOp; |
17 | 0 | TmpInst.setOpcode(AMDGPU::V_MOV_B32_e32_vi); |
18 | | // Operand: vdst |
19 | 0 | lowerOperand(MI->getOperand(0), MCOp); |
20 | 0 | TmpInst.addOperand(MCOp); |
21 | | // Operand: src0 |
22 | 0 | lowerOperand(MI->getOperand(1), MCOp); |
23 | 0 | TmpInst.addOperand(MCOp); |
24 | 0 | EmitToStreamer(OutStreamer, TmpInst); |
25 | 0 | break; |
26 | 0 | } |
27 | 0 | case AMDGPU::V_MOV_B32_indirect_write: { |
28 | 0 | MCInst TmpInst; |
29 | 0 | MCOperand MCOp; |
30 | 0 | TmpInst.setOpcode(AMDGPU::V_MOV_B32_e32_vi); |
31 | | // Operand: vdst |
32 | 0 | lowerOperand(MI->getOperand(0), MCOp); |
33 | 0 | TmpInst.addOperand(MCOp); |
34 | | // Operand: src0 |
35 | 0 | lowerOperand(MI->getOperand(1), MCOp); |
36 | 0 | TmpInst.addOperand(MCOp); |
37 | 0 | EmitToStreamer(OutStreamer, TmpInst); |
38 | 0 | break; |
39 | 0 | } |
40 | 0 | } |
41 | 0 | return true; |
42 | 0 | } |
43 | | |