/src/build/lib/Target/ARM/ARMGenSystemRegister.inc
Line | Count | Source (jump to first uncovered line) |
1 | | #ifdef GET_BANKEDREG_DECL |
2 | | enum BankedRegValues { |
3 | | elr_hyp = 0, |
4 | | lr_abt = 1, |
5 | | lr_fiq = 2, |
6 | | lr_irq = 3, |
7 | | lr_mon = 4, |
8 | | lr_svc = 5, |
9 | | lr_und = 6, |
10 | | lr_usr = 7, |
11 | | r10_fiq = 8, |
12 | | r10_usr = 9, |
13 | | r11_fiq = 10, |
14 | | r11_usr = 11, |
15 | | r12_fiq = 12, |
16 | | r12_usr = 13, |
17 | | r8_fiq = 14, |
18 | | r8_usr = 15, |
19 | | r9_fiq = 16, |
20 | | r9_usr = 17, |
21 | | sp_abt = 18, |
22 | | sp_fiq = 19, |
23 | | sp_hyp = 20, |
24 | | sp_irq = 21, |
25 | | sp_mon = 22, |
26 | | sp_svc = 23, |
27 | | sp_und = 24, |
28 | | sp_usr = 25, |
29 | | spsr_abt = 26, |
30 | | spsr_fiq = 27, |
31 | | spsr_hyp = 28, |
32 | | spsr_irq = 29, |
33 | | spsr_mon = 30, |
34 | | spsr_svc = 31, |
35 | | spsr_und = 32, |
36 | | }; |
37 | | #endif |
38 | | |
39 | | #ifdef GET_MCLASSSYSREG_DECL |
40 | | enum MClassSysRegValues { |
41 | | apsr_g = 1024, |
42 | | apsr_nzcvqg = 3072, |
43 | | iapsr_g = 1025, |
44 | | iapsr_nzcvqg = 3073, |
45 | | eapsr_g = 1026, |
46 | | eapsr_nzcvqg = 3074, |
47 | | xpsr_g = 1027, |
48 | | xpsr_nzcvqg = 3075, |
49 | | apsr = 2048, |
50 | | apsr_nzcvq = 2048, |
51 | | iapsr = 2049, |
52 | | iapsr_nzcvq = 2049, |
53 | | eapsr = 2050, |
54 | | eapsr_nzcvq = 2050, |
55 | | xpsr = 2051, |
56 | | xpsr_nzcvq = 2051, |
57 | | ipsr = 2053, |
58 | | epsr = 2054, |
59 | | iepsr = 2055, |
60 | | msp = 2056, |
61 | | psp = 2057, |
62 | | msplim = 2058, |
63 | | psplim = 2059, |
64 | | primask = 2064, |
65 | | basepri = 2065, |
66 | | basepri_max = 2066, |
67 | | faultmask = 2067, |
68 | | control = 2068, |
69 | | msp_ns = 2184, |
70 | | psp_ns = 2185, |
71 | | msplim_ns = 2186, |
72 | | psplim_ns = 2187, |
73 | | primask_ns = 2192, |
74 | | basepri_ns = 2193, |
75 | | faultmask_ns = 2195, |
76 | | control_ns = 2196, |
77 | | sp_ns = 2200, |
78 | | pac_key_p_0 = 2080, |
79 | | pac_key_p_1 = 2081, |
80 | | pac_key_p_2 = 2082, |
81 | | pac_key_p_3 = 2083, |
82 | | pac_key_u_0 = 2084, |
83 | | pac_key_u_1 = 2085, |
84 | | pac_key_u_2 = 2086, |
85 | | pac_key_u_3 = 2087, |
86 | | pac_key_p_0_ns = 2208, |
87 | | pac_key_p_1_ns = 2209, |
88 | | pac_key_p_2_ns = 2210, |
89 | | pac_key_p_3_ns = 2211, |
90 | | pac_key_u_0_ns = 2212, |
91 | | pac_key_u_1_ns = 2213, |
92 | | pac_key_u_2_ns = 2214, |
93 | | pac_key_u_3_ns = 2215, |
94 | | }; |
95 | | #endif |
96 | | |
97 | | #ifdef GET_BANKEDREG_DECL |
98 | | const BankedReg *lookupBankedRegByName(StringRef Name); |
99 | | const BankedReg *lookupBankedRegByEncoding(uint8_t Encoding); |
100 | | #endif |
101 | | |
102 | | #ifdef GET_BANKEDREG_IMPL |
103 | | constexpr BankedReg BankedRegsList[] = { |
104 | | { "elr_hyp", 0x1E }, // 0 |
105 | | { "lr_abt", 0x14 }, // 1 |
106 | | { "lr_fiq", 0xE }, // 2 |
107 | | { "lr_irq", 0x10 }, // 3 |
108 | | { "lr_mon", 0x1C }, // 4 |
109 | | { "lr_svc", 0x12 }, // 5 |
110 | | { "lr_und", 0x16 }, // 6 |
111 | | { "lr_usr", 0x6 }, // 7 |
112 | | { "r10_fiq", 0xA }, // 8 |
113 | | { "r10_usr", 0x2 }, // 9 |
114 | | { "r11_fiq", 0xB }, // 10 |
115 | | { "r11_usr", 0x3 }, // 11 |
116 | | { "r12_fiq", 0xC }, // 12 |
117 | | { "r12_usr", 0x4 }, // 13 |
118 | | { "r8_fiq", 0x8 }, // 14 |
119 | | { "r8_usr", 0x0 }, // 15 |
120 | | { "r9_fiq", 0x9 }, // 16 |
121 | | { "r9_usr", 0x1 }, // 17 |
122 | | { "spsr_abt", 0x34 }, // 18 |
123 | | { "spsr_fiq", 0x2E }, // 19 |
124 | | { "spsr_hyp", 0x3E }, // 20 |
125 | | { "spsr_irq", 0x30 }, // 21 |
126 | | { "spsr_mon", 0x3C }, // 22 |
127 | | { "spsr_svc", 0x32 }, // 23 |
128 | | { "spsr_und", 0x36 }, // 24 |
129 | | { "sp_abt", 0x15 }, // 25 |
130 | | { "sp_fiq", 0xD }, // 26 |
131 | | { "sp_hyp", 0x1F }, // 27 |
132 | | { "sp_irq", 0x11 }, // 28 |
133 | | { "sp_mon", 0x1D }, // 29 |
134 | | { "sp_svc", 0x13 }, // 30 |
135 | | { "sp_und", 0x17 }, // 31 |
136 | | { "sp_usr", 0x5 }, // 32 |
137 | | }; |
138 | | |
139 | 0 | const BankedReg *lookupBankedRegByName(StringRef Name) { |
140 | 0 | struct IndexType { |
141 | 0 | const char * Name; |
142 | 0 | unsigned _index; |
143 | 0 | }; |
144 | 0 | static const struct IndexType Index[] = { |
145 | 0 | { "ELR_HYP", 0 }, |
146 | 0 | { "LR_ABT", 1 }, |
147 | 0 | { "LR_FIQ", 2 }, |
148 | 0 | { "LR_IRQ", 3 }, |
149 | 0 | { "LR_MON", 4 }, |
150 | 0 | { "LR_SVC", 5 }, |
151 | 0 | { "LR_UND", 6 }, |
152 | 0 | { "LR_USR", 7 }, |
153 | 0 | { "R10_FIQ", 8 }, |
154 | 0 | { "R10_USR", 9 }, |
155 | 0 | { "R11_FIQ", 10 }, |
156 | 0 | { "R11_USR", 11 }, |
157 | 0 | { "R12_FIQ", 12 }, |
158 | 0 | { "R12_USR", 13 }, |
159 | 0 | { "R8_FIQ", 14 }, |
160 | 0 | { "R8_USR", 15 }, |
161 | 0 | { "R9_FIQ", 16 }, |
162 | 0 | { "R9_USR", 17 }, |
163 | 0 | { "SPSR_ABT", 18 }, |
164 | 0 | { "SPSR_FIQ", 19 }, |
165 | 0 | { "SPSR_HYP", 20 }, |
166 | 0 | { "SPSR_IRQ", 21 }, |
167 | 0 | { "SPSR_MON", 22 }, |
168 | 0 | { "SPSR_SVC", 23 }, |
169 | 0 | { "SPSR_UND", 24 }, |
170 | 0 | { "SP_ABT", 25 }, |
171 | 0 | { "SP_FIQ", 26 }, |
172 | 0 | { "SP_HYP", 27 }, |
173 | 0 | { "SP_IRQ", 28 }, |
174 | 0 | { "SP_MON", 29 }, |
175 | 0 | { "SP_SVC", 30 }, |
176 | 0 | { "SP_UND", 31 }, |
177 | 0 | { "SP_USR", 32 }, |
178 | 0 | }; |
179 | |
|
180 | 0 | struct KeyType { |
181 | 0 | std::string Name; |
182 | 0 | }; |
183 | 0 | KeyType Key = {Name.upper()}; |
184 | 0 | auto Table = ArrayRef(Index); |
185 | 0 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, |
186 | 0 | [](const IndexType &LHS, const KeyType &RHS) { |
187 | 0 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
188 | 0 | if (CmpName < 0) return true; |
189 | 0 | if (CmpName > 0) return false; |
190 | 0 | return false; |
191 | 0 | }); |
192 | |
|
193 | 0 | if (Idx == Table.end() || |
194 | 0 | Key.Name != Idx->Name) |
195 | 0 | return nullptr; |
196 | 0 | return &BankedRegsList[Idx->_index]; |
197 | 0 | } |
198 | | |
199 | 0 | const BankedReg *lookupBankedRegByEncoding(uint8_t Encoding) { |
200 | 0 | struct IndexType { |
201 | 0 | uint8_t Encoding; |
202 | 0 | unsigned _index; |
203 | 0 | }; |
204 | 0 | static const struct IndexType Index[] = { |
205 | 0 | { 0x0, 15 }, |
206 | 0 | { 0x1, 17 }, |
207 | 0 | { 0x2, 9 }, |
208 | 0 | { 0x3, 11 }, |
209 | 0 | { 0x4, 13 }, |
210 | 0 | { 0x5, 32 }, |
211 | 0 | { 0x6, 7 }, |
212 | 0 | { 0x8, 14 }, |
213 | 0 | { 0x9, 16 }, |
214 | 0 | { 0xA, 8 }, |
215 | 0 | { 0xB, 10 }, |
216 | 0 | { 0xC, 12 }, |
217 | 0 | { 0xD, 26 }, |
218 | 0 | { 0xE, 2 }, |
219 | 0 | { 0x10, 3 }, |
220 | 0 | { 0x11, 28 }, |
221 | 0 | { 0x12, 5 }, |
222 | 0 | { 0x13, 30 }, |
223 | 0 | { 0x14, 1 }, |
224 | 0 | { 0x15, 25 }, |
225 | 0 | { 0x16, 6 }, |
226 | 0 | { 0x17, 31 }, |
227 | 0 | { 0x1C, 4 }, |
228 | 0 | { 0x1D, 29 }, |
229 | 0 | { 0x1E, 0 }, |
230 | 0 | { 0x1F, 27 }, |
231 | 0 | { 0x2E, 19 }, |
232 | 0 | { 0x30, 21 }, |
233 | 0 | { 0x32, 23 }, |
234 | 0 | { 0x34, 18 }, |
235 | 0 | { 0x36, 24 }, |
236 | 0 | { 0x3C, 22 }, |
237 | 0 | { 0x3E, 20 }, |
238 | 0 | }; |
239 | |
|
240 | 0 | struct KeyType { |
241 | 0 | uint8_t Encoding; |
242 | 0 | }; |
243 | 0 | KeyType Key = {Encoding}; |
244 | 0 | auto Table = ArrayRef(Index); |
245 | 0 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, |
246 | 0 | [](const IndexType &LHS, const KeyType &RHS) { |
247 | 0 | if (LHS.Encoding < RHS.Encoding) |
248 | 0 | return true; |
249 | 0 | if (LHS.Encoding > RHS.Encoding) |
250 | 0 | return false; |
251 | 0 | return false; |
252 | 0 | }); |
253 | |
|
254 | 0 | if (Idx == Table.end() || |
255 | 0 | Key.Encoding != Idx->Encoding) |
256 | 0 | return nullptr; |
257 | 0 | return &BankedRegsList[Idx->_index]; |
258 | 0 | } |
259 | | #endif |
260 | | |
261 | | #ifdef GET_MCLASSSYSREG_DECL |
262 | | const MClassSysReg *lookupMClassSysRegByName(StringRef Name); |
263 | | const MClassSysReg *lookupMClassSysRegByM1Encoding12(uint16_t M1Encoding12); |
264 | | const MClassSysReg *lookupMClassSysRegByM2M3Encoding8(uint16_t M2M3Encoding8); |
265 | | const MClassSysReg *lookupMClassSysRegByEncoding(uint16_t Encoding); |
266 | | #endif |
267 | | |
268 | | #ifdef GET_MCLASSSYSREG_IMPL |
269 | | constexpr MClassSysReg MClassSysRegsList[] = { |
270 | | { "apsr", 0x800, 0x100, 0x800, {} }, // 0 |
271 | | { "apsr_g", 0x400, 0x0, 0x400, {ARM::FeatureDSP} }, // 1 |
272 | | { "apsr_nzcvq", 0x1800, 0x200, 0x800, {} }, // 2 |
273 | | { "apsr_nzcvqg", 0xC00, 0x300, 0xC00, {ARM::FeatureDSP} }, // 3 |
274 | | { "basepri", 0x811, 0x111, 0x811, {ARM::HasV7Ops} }, // 4 |
275 | | { "basepri_max", 0x812, 0x112, 0x812, {ARM::HasV7Ops} }, // 5 |
276 | | { "basepri_ns", 0x891, 0x191, 0x891, {ARM::Feature8MSecExt, ARM::HasV7Ops} }, // 6 |
277 | | { "control", 0x814, 0x114, 0x814, {} }, // 7 |
278 | | { "control_ns", 0x894, 0x194, 0x894, {ARM::Feature8MSecExt} }, // 8 |
279 | | { "eapsr", 0x802, 0x102, 0x802, {} }, // 9 |
280 | | { "eapsr_g", 0x402, 0x2, 0x402, {ARM::FeatureDSP} }, // 10 |
281 | | { "eapsr_nzcvq", 0x1802, 0x202, 0x802, {} }, // 11 |
282 | | { "eapsr_nzcvqg", 0xC02, 0x302, 0xC02, {ARM::FeatureDSP} }, // 12 |
283 | | { "epsr", 0x806, 0x106, 0x806, {} }, // 13 |
284 | | { "faultmask", 0x813, 0x113, 0x813, {ARM::HasV7Ops} }, // 14 |
285 | | { "faultmask_ns", 0x893, 0x193, 0x893, {ARM::Feature8MSecExt, ARM::HasV7Ops} }, // 15 |
286 | | { "iapsr", 0x801, 0x101, 0x801, {} }, // 16 |
287 | | { "iapsr_g", 0x401, 0x1, 0x401, {ARM::FeatureDSP} }, // 17 |
288 | | { "iapsr_nzcvq", 0x1801, 0x201, 0x801, {} }, // 18 |
289 | | { "iapsr_nzcvqg", 0xC01, 0x301, 0xC01, {ARM::FeatureDSP} }, // 19 |
290 | | { "iepsr", 0x807, 0x107, 0x807, {} }, // 20 |
291 | | { "ipsr", 0x805, 0x105, 0x805, {} }, // 21 |
292 | | { "msp", 0x808, 0x108, 0x808, {} }, // 22 |
293 | | { "msplim", 0x80A, 0x10A, 0x80A, {ARM::HasV8MBaselineOps} }, // 23 |
294 | | { "msplim_ns", 0x88A, 0x18A, 0x88A, {ARM::Feature8MSecExt, ARM::HasV8MBaselineOps} }, // 24 |
295 | | { "msp_ns", 0x888, 0x188, 0x888, {ARM::Feature8MSecExt} }, // 25 |
296 | | { "pac_key_p_0", 0x820, 0x120, 0x820, {ARM::FeaturePACBTI} }, // 26 |
297 | | { "pac_key_p_0_ns", 0x8A0, 0x1A0, 0x8A0, {ARM::FeaturePACBTI} }, // 27 |
298 | | { "pac_key_p_1", 0x821, 0x121, 0x821, {ARM::FeaturePACBTI} }, // 28 |
299 | | { "pac_key_p_1_ns", 0x8A1, 0x1A1, 0x8A1, {ARM::FeaturePACBTI} }, // 29 |
300 | | { "pac_key_p_2", 0x822, 0x122, 0x822, {ARM::FeaturePACBTI} }, // 30 |
301 | | { "pac_key_p_2_ns", 0x8A2, 0x1A2, 0x8A2, {ARM::FeaturePACBTI} }, // 31 |
302 | | { "pac_key_p_3", 0x823, 0x123, 0x823, {ARM::FeaturePACBTI} }, // 32 |
303 | | { "pac_key_p_3_ns", 0x8A3, 0x1A3, 0x8A3, {ARM::FeaturePACBTI} }, // 33 |
304 | | { "pac_key_u_0", 0x824, 0x124, 0x824, {ARM::FeaturePACBTI} }, // 34 |
305 | | { "pac_key_u_0_ns", 0x8A4, 0x1A4, 0x8A4, {ARM::FeaturePACBTI} }, // 35 |
306 | | { "pac_key_u_1", 0x825, 0x125, 0x825, {ARM::FeaturePACBTI} }, // 36 |
307 | | { "pac_key_u_1_ns", 0x8A5, 0x1A5, 0x8A5, {ARM::FeaturePACBTI} }, // 37 |
308 | | { "pac_key_u_2", 0x826, 0x126, 0x826, {ARM::FeaturePACBTI} }, // 38 |
309 | | { "pac_key_u_2_ns", 0x8A6, 0x1A6, 0x8A6, {ARM::FeaturePACBTI} }, // 39 |
310 | | { "pac_key_u_3", 0x827, 0x127, 0x827, {ARM::FeaturePACBTI} }, // 40 |
311 | | { "pac_key_u_3_ns", 0x8A7, 0x1A7, 0x8A7, {ARM::FeaturePACBTI} }, // 41 |
312 | | { "primask", 0x810, 0x110, 0x810, {} }, // 42 |
313 | | { "primask_ns", 0x890, 0x190, 0x890, {} }, // 43 |
314 | | { "psp", 0x809, 0x109, 0x809, {} }, // 44 |
315 | | { "psplim", 0x80B, 0x10B, 0x80B, {ARM::HasV8MBaselineOps} }, // 45 |
316 | | { "psplim_ns", 0x88B, 0x18B, 0x88B, {ARM::Feature8MSecExt, ARM::HasV8MBaselineOps} }, // 46 |
317 | | { "psp_ns", 0x889, 0x189, 0x889, {ARM::Feature8MSecExt} }, // 47 |
318 | | { "sp_ns", 0x898, 0x198, 0x898, {ARM::Feature8MSecExt} }, // 48 |
319 | | { "xpsr", 0x803, 0x103, 0x803, {} }, // 49 |
320 | | { "xpsr_g", 0x403, 0x3, 0x403, {ARM::FeatureDSP} }, // 50 |
321 | | { "xpsr_nzcvq", 0x1803, 0x203, 0x803, {} }, // 51 |
322 | | { "xpsr_nzcvqg", 0xC03, 0x303, 0xC03, {ARM::FeatureDSP} }, // 52 |
323 | | }; |
324 | | |
325 | 0 | const MClassSysReg *lookupMClassSysRegByName(StringRef Name) { |
326 | 0 | struct IndexType { |
327 | 0 | const char * Name; |
328 | 0 | unsigned _index; |
329 | 0 | }; |
330 | 0 | static const struct IndexType Index[] = { |
331 | 0 | { "APSR", 0 }, |
332 | 0 | { "APSR_G", 1 }, |
333 | 0 | { "APSR_NZCVQ", 2 }, |
334 | 0 | { "APSR_NZCVQG", 3 }, |
335 | 0 | { "BASEPRI", 4 }, |
336 | 0 | { "BASEPRI_MAX", 5 }, |
337 | 0 | { "BASEPRI_NS", 6 }, |
338 | 0 | { "CONTROL", 7 }, |
339 | 0 | { "CONTROL_NS", 8 }, |
340 | 0 | { "EAPSR", 9 }, |
341 | 0 | { "EAPSR_G", 10 }, |
342 | 0 | { "EAPSR_NZCVQ", 11 }, |
343 | 0 | { "EAPSR_NZCVQG", 12 }, |
344 | 0 | { "EPSR", 13 }, |
345 | 0 | { "FAULTMASK", 14 }, |
346 | 0 | { "FAULTMASK_NS", 15 }, |
347 | 0 | { "IAPSR", 16 }, |
348 | 0 | { "IAPSR_G", 17 }, |
349 | 0 | { "IAPSR_NZCVQ", 18 }, |
350 | 0 | { "IAPSR_NZCVQG", 19 }, |
351 | 0 | { "IEPSR", 20 }, |
352 | 0 | { "IPSR", 21 }, |
353 | 0 | { "MSP", 22 }, |
354 | 0 | { "MSPLIM", 23 }, |
355 | 0 | { "MSPLIM_NS", 24 }, |
356 | 0 | { "MSP_NS", 25 }, |
357 | 0 | { "PAC_KEY_P_0", 26 }, |
358 | 0 | { "PAC_KEY_P_0_NS", 27 }, |
359 | 0 | { "PAC_KEY_P_1", 28 }, |
360 | 0 | { "PAC_KEY_P_1_NS", 29 }, |
361 | 0 | { "PAC_KEY_P_2", 30 }, |
362 | 0 | { "PAC_KEY_P_2_NS", 31 }, |
363 | 0 | { "PAC_KEY_P_3", 32 }, |
364 | 0 | { "PAC_KEY_P_3_NS", 33 }, |
365 | 0 | { "PAC_KEY_U_0", 34 }, |
366 | 0 | { "PAC_KEY_U_0_NS", 35 }, |
367 | 0 | { "PAC_KEY_U_1", 36 }, |
368 | 0 | { "PAC_KEY_U_1_NS", 37 }, |
369 | 0 | { "PAC_KEY_U_2", 38 }, |
370 | 0 | { "PAC_KEY_U_2_NS", 39 }, |
371 | 0 | { "PAC_KEY_U_3", 40 }, |
372 | 0 | { "PAC_KEY_U_3_NS", 41 }, |
373 | 0 | { "PRIMASK", 42 }, |
374 | 0 | { "PRIMASK_NS", 43 }, |
375 | 0 | { "PSP", 44 }, |
376 | 0 | { "PSPLIM", 45 }, |
377 | 0 | { "PSPLIM_NS", 46 }, |
378 | 0 | { "PSP_NS", 47 }, |
379 | 0 | { "SP_NS", 48 }, |
380 | 0 | { "XPSR", 49 }, |
381 | 0 | { "XPSR_G", 50 }, |
382 | 0 | { "XPSR_NZCVQ", 51 }, |
383 | 0 | { "XPSR_NZCVQG", 52 }, |
384 | 0 | }; |
385 | |
|
386 | 0 | struct KeyType { |
387 | 0 | std::string Name; |
388 | 0 | }; |
389 | 0 | KeyType Key = {Name.upper()}; |
390 | 0 | auto Table = ArrayRef(Index); |
391 | 0 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, |
392 | 0 | [](const IndexType &LHS, const KeyType &RHS) { |
393 | 0 | int CmpName = StringRef(LHS.Name).compare(RHS.Name); |
394 | 0 | if (CmpName < 0) return true; |
395 | 0 | if (CmpName > 0) return false; |
396 | 0 | return false; |
397 | 0 | }); |
398 | |
|
399 | 0 | if (Idx == Table.end() || |
400 | 0 | Key.Name != Idx->Name) |
401 | 0 | return nullptr; |
402 | 0 | return &MClassSysRegsList[Idx->_index]; |
403 | 0 | } |
404 | | |
405 | 0 | const MClassSysReg *lookupMClassSysRegByM1Encoding12(uint16_t M1Encoding12) { |
406 | 0 | struct IndexType { |
407 | 0 | uint16_t M1Encoding12; |
408 | 0 | unsigned _index; |
409 | 0 | }; |
410 | 0 | static const struct IndexType Index[] = { |
411 | 0 | { 0x400, 1 }, |
412 | 0 | { 0x401, 17 }, |
413 | 0 | { 0x402, 10 }, |
414 | 0 | { 0x403, 50 }, |
415 | 0 | { 0x800, 0 }, |
416 | 0 | { 0x801, 16 }, |
417 | 0 | { 0x802, 9 }, |
418 | 0 | { 0x803, 49 }, |
419 | 0 | { 0x805, 21 }, |
420 | 0 | { 0x806, 13 }, |
421 | 0 | { 0x807, 20 }, |
422 | 0 | { 0x808, 22 }, |
423 | 0 | { 0x809, 44 }, |
424 | 0 | { 0x80A, 23 }, |
425 | 0 | { 0x80B, 45 }, |
426 | 0 | { 0x810, 42 }, |
427 | 0 | { 0x811, 4 }, |
428 | 0 | { 0x812, 5 }, |
429 | 0 | { 0x813, 14 }, |
430 | 0 | { 0x814, 7 }, |
431 | 0 | { 0x820, 26 }, |
432 | 0 | { 0x821, 28 }, |
433 | 0 | { 0x822, 30 }, |
434 | 0 | { 0x823, 32 }, |
435 | 0 | { 0x824, 34 }, |
436 | 0 | { 0x825, 36 }, |
437 | 0 | { 0x826, 38 }, |
438 | 0 | { 0x827, 40 }, |
439 | 0 | { 0x888, 25 }, |
440 | 0 | { 0x889, 47 }, |
441 | 0 | { 0x88A, 24 }, |
442 | 0 | { 0x88B, 46 }, |
443 | 0 | { 0x890, 43 }, |
444 | 0 | { 0x891, 6 }, |
445 | 0 | { 0x893, 15 }, |
446 | 0 | { 0x894, 8 }, |
447 | 0 | { 0x898, 48 }, |
448 | 0 | { 0x8A0, 27 }, |
449 | 0 | { 0x8A1, 29 }, |
450 | 0 | { 0x8A2, 31 }, |
451 | 0 | { 0x8A3, 33 }, |
452 | 0 | { 0x8A4, 35 }, |
453 | 0 | { 0x8A5, 37 }, |
454 | 0 | { 0x8A6, 39 }, |
455 | 0 | { 0x8A7, 41 }, |
456 | 0 | { 0xC00, 3 }, |
457 | 0 | { 0xC01, 19 }, |
458 | 0 | { 0xC02, 12 }, |
459 | 0 | { 0xC03, 52 }, |
460 | 0 | { 0x1800, 2 }, |
461 | 0 | { 0x1801, 18 }, |
462 | 0 | { 0x1802, 11 }, |
463 | 0 | { 0x1803, 51 }, |
464 | 0 | }; |
465 | |
|
466 | 0 | struct KeyType { |
467 | 0 | uint16_t M1Encoding12; |
468 | 0 | }; |
469 | 0 | KeyType Key = {M1Encoding12}; |
470 | 0 | auto Table = ArrayRef(Index); |
471 | 0 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, |
472 | 0 | [](const IndexType &LHS, const KeyType &RHS) { |
473 | 0 | if (LHS.M1Encoding12 < RHS.M1Encoding12) |
474 | 0 | return true; |
475 | 0 | if (LHS.M1Encoding12 > RHS.M1Encoding12) |
476 | 0 | return false; |
477 | 0 | return false; |
478 | 0 | }); |
479 | |
|
480 | 0 | if (Idx == Table.end() || |
481 | 0 | Key.M1Encoding12 != Idx->M1Encoding12) |
482 | 0 | return nullptr; |
483 | 0 | return &MClassSysRegsList[Idx->_index]; |
484 | 0 | } |
485 | | |
486 | 0 | const MClassSysReg *lookupMClassSysRegByM2M3Encoding8(uint16_t M2M3Encoding8) { |
487 | 0 | struct IndexType { |
488 | 0 | uint16_t M2M3Encoding8; |
489 | 0 | unsigned _index; |
490 | 0 | }; |
491 | 0 | static const struct IndexType Index[] = { |
492 | 0 | { 0x0, 1 }, |
493 | 0 | { 0x1, 17 }, |
494 | 0 | { 0x2, 10 }, |
495 | 0 | { 0x3, 50 }, |
496 | 0 | { 0x100, 0 }, |
497 | 0 | { 0x101, 16 }, |
498 | 0 | { 0x102, 9 }, |
499 | 0 | { 0x103, 49 }, |
500 | 0 | { 0x105, 21 }, |
501 | 0 | { 0x106, 13 }, |
502 | 0 | { 0x107, 20 }, |
503 | 0 | { 0x108, 22 }, |
504 | 0 | { 0x109, 44 }, |
505 | 0 | { 0x10A, 23 }, |
506 | 0 | { 0x10B, 45 }, |
507 | 0 | { 0x110, 42 }, |
508 | 0 | { 0x111, 4 }, |
509 | 0 | { 0x112, 5 }, |
510 | 0 | { 0x113, 14 }, |
511 | 0 | { 0x114, 7 }, |
512 | 0 | { 0x120, 26 }, |
513 | 0 | { 0x121, 28 }, |
514 | 0 | { 0x122, 30 }, |
515 | 0 | { 0x123, 32 }, |
516 | 0 | { 0x124, 34 }, |
517 | 0 | { 0x125, 36 }, |
518 | 0 | { 0x126, 38 }, |
519 | 0 | { 0x127, 40 }, |
520 | 0 | { 0x188, 25 }, |
521 | 0 | { 0x189, 47 }, |
522 | 0 | { 0x18A, 24 }, |
523 | 0 | { 0x18B, 46 }, |
524 | 0 | { 0x190, 43 }, |
525 | 0 | { 0x191, 6 }, |
526 | 0 | { 0x193, 15 }, |
527 | 0 | { 0x194, 8 }, |
528 | 0 | { 0x198, 48 }, |
529 | 0 | { 0x1A0, 27 }, |
530 | 0 | { 0x1A1, 29 }, |
531 | 0 | { 0x1A2, 31 }, |
532 | 0 | { 0x1A3, 33 }, |
533 | 0 | { 0x1A4, 35 }, |
534 | 0 | { 0x1A5, 37 }, |
535 | 0 | { 0x1A6, 39 }, |
536 | 0 | { 0x1A7, 41 }, |
537 | 0 | { 0x200, 2 }, |
538 | 0 | { 0x201, 18 }, |
539 | 0 | { 0x202, 11 }, |
540 | 0 | { 0x203, 51 }, |
541 | 0 | { 0x300, 3 }, |
542 | 0 | { 0x301, 19 }, |
543 | 0 | { 0x302, 12 }, |
544 | 0 | { 0x303, 52 }, |
545 | 0 | }; |
546 | |
|
547 | 0 | struct KeyType { |
548 | 0 | uint16_t M2M3Encoding8; |
549 | 0 | }; |
550 | 0 | KeyType Key = {M2M3Encoding8}; |
551 | 0 | auto Table = ArrayRef(Index); |
552 | 0 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, |
553 | 0 | [](const IndexType &LHS, const KeyType &RHS) { |
554 | 0 | if (LHS.M2M3Encoding8 < RHS.M2M3Encoding8) |
555 | 0 | return true; |
556 | 0 | if (LHS.M2M3Encoding8 > RHS.M2M3Encoding8) |
557 | 0 | return false; |
558 | 0 | return false; |
559 | 0 | }); |
560 | |
|
561 | 0 | if (Idx == Table.end() || |
562 | 0 | Key.M2M3Encoding8 != Idx->M2M3Encoding8) |
563 | 0 | return nullptr; |
564 | 0 | return &MClassSysRegsList[Idx->_index]; |
565 | 0 | } |
566 | | |
567 | 0 | const MClassSysReg *lookupMClassSysRegByEncoding(uint16_t Encoding) { |
568 | 0 | struct IndexType { |
569 | 0 | uint16_t Encoding; |
570 | 0 | unsigned _index; |
571 | 0 | }; |
572 | 0 | static const struct IndexType Index[] = { |
573 | 0 | { 0x400, 1 }, |
574 | 0 | { 0x401, 17 }, |
575 | 0 | { 0x402, 10 }, |
576 | 0 | { 0x403, 50 }, |
577 | 0 | { 0x800, 0 }, |
578 | 0 | { 0x800, 2 }, |
579 | 0 | { 0x801, 16 }, |
580 | 0 | { 0x801, 18 }, |
581 | 0 | { 0x802, 9 }, |
582 | 0 | { 0x802, 11 }, |
583 | 0 | { 0x803, 49 }, |
584 | 0 | { 0x803, 51 }, |
585 | 0 | { 0x805, 21 }, |
586 | 0 | { 0x806, 13 }, |
587 | 0 | { 0x807, 20 }, |
588 | 0 | { 0x808, 22 }, |
589 | 0 | { 0x809, 44 }, |
590 | 0 | { 0x80A, 23 }, |
591 | 0 | { 0x80B, 45 }, |
592 | 0 | { 0x810, 42 }, |
593 | 0 | { 0x811, 4 }, |
594 | 0 | { 0x812, 5 }, |
595 | 0 | { 0x813, 14 }, |
596 | 0 | { 0x814, 7 }, |
597 | 0 | { 0x820, 26 }, |
598 | 0 | { 0x821, 28 }, |
599 | 0 | { 0x822, 30 }, |
600 | 0 | { 0x823, 32 }, |
601 | 0 | { 0x824, 34 }, |
602 | 0 | { 0x825, 36 }, |
603 | 0 | { 0x826, 38 }, |
604 | 0 | { 0x827, 40 }, |
605 | 0 | { 0x888, 25 }, |
606 | 0 | { 0x889, 47 }, |
607 | 0 | { 0x88A, 24 }, |
608 | 0 | { 0x88B, 46 }, |
609 | 0 | { 0x890, 43 }, |
610 | 0 | { 0x891, 6 }, |
611 | 0 | { 0x893, 15 }, |
612 | 0 | { 0x894, 8 }, |
613 | 0 | { 0x898, 48 }, |
614 | 0 | { 0x8A0, 27 }, |
615 | 0 | { 0x8A1, 29 }, |
616 | 0 | { 0x8A2, 31 }, |
617 | 0 | { 0x8A3, 33 }, |
618 | 0 | { 0x8A4, 35 }, |
619 | 0 | { 0x8A5, 37 }, |
620 | 0 | { 0x8A6, 39 }, |
621 | 0 | { 0x8A7, 41 }, |
622 | 0 | { 0xC00, 3 }, |
623 | 0 | { 0xC01, 19 }, |
624 | 0 | { 0xC02, 12 }, |
625 | 0 | { 0xC03, 52 }, |
626 | 0 | }; |
627 | |
|
628 | 0 | struct KeyType { |
629 | 0 | uint16_t Encoding; |
630 | 0 | }; |
631 | 0 | KeyType Key = {Encoding}; |
632 | 0 | auto Table = ArrayRef(Index); |
633 | 0 | auto Idx = std::lower_bound(Table.begin(), Table.end(), Key, |
634 | 0 | [](const IndexType &LHS, const KeyType &RHS) { |
635 | 0 | if (LHS.Encoding < RHS.Encoding) |
636 | 0 | return true; |
637 | 0 | if (LHS.Encoding > RHS.Encoding) |
638 | 0 | return false; |
639 | 0 | return false; |
640 | 0 | }); |
641 | |
|
642 | 0 | if (Idx == Table.end() || |
643 | 0 | Key.Encoding != Idx->Encoding) |
644 | 0 | return nullptr; |
645 | 0 | return &MClassSysRegsList[Idx->_index]; |
646 | 0 | } |
647 | | #endif |
648 | | |
649 | | #undef GET_BANKEDREG_DECL |
650 | | #undef GET_BANKEDREG_IMPL |
651 | | #undef GET_MCLASSSYSREG_DECL |
652 | | #undef GET_MCLASSSYSREG_IMPL |