/src/build/lib/Target/AVR/AVRGenCallingConv.inc
Line | Count | Source (jump to first uncovered line) |
1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* Calling Convention Implementation Fragment *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* *| |
7 | | \*===----------------------------------------------------------------------===*/ |
8 | | |
9 | | #ifndef GET_CC_REGISTER_LISTS |
10 | | |
11 | | static bool ArgCC_AVR_Vararg(unsigned ValNo, MVT ValVT, |
12 | | MVT LocVT, CCValAssign::LocInfo LocInfo, |
13 | | ISD::ArgFlagsTy ArgFlags, CCState &State); |
14 | | static bool RetCC_AVR_BUILTIN(unsigned ValNo, MVT ValVT, |
15 | | MVT LocVT, CCValAssign::LocInfo LocInfo, |
16 | | ISD::ArgFlagsTy ArgFlags, CCState &State); |
17 | | |
18 | | |
19 | | static bool ArgCC_AVR_Vararg(unsigned ValNo, MVT ValVT, |
20 | | MVT LocVT, CCValAssign::LocInfo LocInfo, |
21 | 0 | ISD::ArgFlagsTy ArgFlags, CCState &State) { |
22 | |
|
23 | 0 | if (LocVT == MVT::i8) { |
24 | 0 | int64_t Offset1 = State.AllocateStack(1, Align(1)); |
25 | 0 | State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo)); |
26 | 0 | return false; |
27 | 0 | } |
28 | | |
29 | 0 | int64_t Offset2 = State.AllocateStack(2, Align(1)); |
30 | 0 | State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo)); |
31 | 0 | return false; |
32 | | |
33 | 0 | return true; // CC didn't match. |
34 | 0 | } |
35 | | |
36 | | |
37 | | static bool RetCC_AVR_BUILTIN(unsigned ValNo, MVT ValVT, |
38 | | MVT LocVT, CCValAssign::LocInfo LocInfo, |
39 | 0 | ISD::ArgFlagsTy ArgFlags, CCState &State) { |
40 | |
|
41 | 0 | if (LocVT == MVT::i8) { |
42 | 0 | static const MCPhysReg RegList1[] = { |
43 | 0 | AVR::R24, AVR::R25 |
44 | 0 | }; |
45 | 0 | if (unsigned Reg = State.AllocateReg(RegList1)) { |
46 | 0 | State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); |
47 | 0 | return false; |
48 | 0 | } |
49 | 0 | } |
50 | | |
51 | 0 | if (LocVT == MVT::i16) { |
52 | 0 | static const MCPhysReg RegList2[] = { |
53 | 0 | AVR::R23R22, AVR::R25R24 |
54 | 0 | }; |
55 | 0 | if (unsigned Reg = State.AllocateReg(RegList2)) { |
56 | 0 | State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); |
57 | 0 | return false; |
58 | 0 | } |
59 | 0 | } |
60 | | |
61 | 0 | return true; // CC didn't match. |
62 | 0 | } |
63 | | |
64 | | #else |
65 | | |
66 | | const MCRegister ArgCC_AVR_Vararg_ArgRegs[] = { 0 }; |
67 | | const MCRegister RetCC_AVR_BUILTIN_ArgRegs[] = { AVR::R23R22, AVR::R24, AVR::R25, AVR::R25R24 }; |
68 | | |
69 | | #endif // CC_REGISTER_LIST |