/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\

|*                                                                            *|

|* Subtarget Enumeration Source Fragment                                      *|

|*                                                                            *|

|* Automatically generated file, do not edit!                                 *|

|*                                                                            *|

\*===----------------------------------------------------------------------===*/

#ifdef GET_SUBTARGETINFO_ENUM

#undef GET_SUBTARGETINFO_ENUM

namespace llvm {

namespace AVR {

enum {

  ELFArchAVR1 = 0,

  ELFArchAVR2 = 1,

  ELFArchAVR3 = 2,

  ELFArchAVR4 = 3,

  ELFArchAVR5 = 4,

  ELFArchAVR6 = 5,

  ELFArchAVR25 = 6,

  ELFArchAVR31 = 7,

  ELFArchAVR35 = 8,

  ELFArchAVR51 = 9,

  ELFArchTiny = 10,

  ELFArchXMEGA1 = 11,

  ELFArchXMEGA2 = 12,

  ELFArchXMEGA3 = 13,

  ELFArchXMEGA4 = 14,

  ELFArchXMEGA5 = 15,

  ELFArchXMEGA6 = 16,

  ELFArchXMEGA7 = 17,

  FamilyAVR0 = 18,

  FamilyAVR1 = 19,

  FamilyAVR2 = 20,

  FamilyAVR3 = 21,

  FamilyAVR4 = 22,

  FamilyAVR5 = 23,

  FamilyAVR6 = 24,

  FamilyAVR25 = 25,

  FamilyAVR31 = 26,

  FamilyAVR35 = 27,

  FamilyAVR51 = 28,

  FamilyTiny = 29,

  FamilyXMEGA = 30,

  FamilyXMEGA3 = 31,

  FamilyXMEGAU = 32,

  FeatureADDSUBIW = 33,

  FeatureBREAK = 34,

  FeatureDES = 35,

  FeatureEIJMPCALL = 36,

  FeatureELPM = 37,

  FeatureELPMX = 38,

  FeatureIJMPCALL = 39,

  FeatureJMPCALL = 40,

  FeatureLPM = 41,

  FeatureLPMX = 42,

  FeatureLowByteFirst = 43,

  FeatureMMR = 44,

  FeatureMOVW = 45,

  FeatureMultiplication = 46,

  FeatureRMW = 47,

  FeatureSPM = 48,

  FeatureSPMX = 49,

  FeatureSRAM = 50,

  FeatureSetSpecial = 51,

  FeatureSmallStack = 52,

  FeatureTinyEncoding = 53,

  NumSubtargetFeatures = 54

};

} // end namespace AVR

} // end namespace llvm

#endif // GET_SUBTARGETINFO_ENUM

#ifdef GET_SUBTARGETINFO_MACRO

GET_SUBTARGETINFO_MACRO(HasADDSUBIW, false, hasADDSUBIW)

GET_SUBTARGETINFO_MACRO(HasBREAK, false, hasBREAK)

GET_SUBTARGETINFO_MACRO(HasDES, false, hasDES)

GET_SUBTARGETINFO_MACRO(HasEIJMPCALL, false, hasEIJMPCALL)

GET_SUBTARGETINFO_MACRO(HasELPM, false, hasELPM)

GET_SUBTARGETINFO_MACRO(HasELPMX, false, hasELPMX)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR0, false, hasFeatureSetFamilyAVR0)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR1, false, hasFeatureSetFamilyAVR1)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR2, false, hasFeatureSetFamilyAVR2)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR25, false, hasFeatureSetFamilyAVR25)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR3, false, hasFeatureSetFamilyAVR3)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR31, false, hasFeatureSetFamilyAVR31)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR35, false, hasFeatureSetFamilyAVR35)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR4, false, hasFeatureSetFamilyAVR4)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR5, false, hasFeatureSetFamilyAVR5)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR51, false, hasFeatureSetFamilyAVR51)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyAVR6, false, hasFeatureSetFamilyAVR6)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyTiny, false, hasFeatureSetFamilyTiny)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyXMEGA, false, hasFeatureSetFamilyXMEGA)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyXMEGA3, false, hasFeatureSetFamilyXMEGA3)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFamilyXMEGAU, false, hasFeatureSetFamilyXMEGAU)

GET_SUBTARGETINFO_MACRO(HasFeatureSetFeatureSetSpecial, false, hasFeatureSetFeatureSetSpecial)

GET_SUBTARGETINFO_MACRO(HasJMPCALL, false, hasJMPCALL)

GET_SUBTARGETINFO_MACRO(HasLPM, false, hasLPM)

GET_SUBTARGETINFO_MACRO(HasLPMX, false, hasLPMX)

GET_SUBTARGETINFO_MACRO(HasLowByteFirst, false, hasLowByteFirst)

GET_SUBTARGETINFO_MACRO(HasMOVW, false, hasMOVW)

GET_SUBTARGETINFO_MACRO(HasMemMappedGPR, false, hasMemMappedGPR)

GET_SUBTARGETINFO_MACRO(HasSPM, false, hasSPM)

GET_SUBTARGETINFO_MACRO(HasSPMX, false, hasSPMX)

GET_SUBTARGETINFO_MACRO(HasSRAM, false, hasSRAM)

GET_SUBTARGETINFO_MACRO(HasSRAMIJMPCALL, false, hasSRAMIJMPCALL)

GET_SUBTARGETINFO_MACRO(HasSmallStack, false, hasSmallStack)

GET_SUBTARGETINFO_MACRO(HasTinyEncoding, false, hasTinyEncoding)

GET_SUBTARGETINFO_MACRO(SupportsMultiplication, false, supportsMultiplication)

GET_SUBTARGETINFO_MACRO(SupportsRMW, false, supportsRMW)

#undef GET_SUBTARGETINFO_MACRO

#endif // GET_SUBTARGETINFO_MACRO

#ifdef GET_SUBTARGETINFO_MC_DESC

#undef GET_SUBTARGETINFO_MC_DESC

namespace llvm {

// Sorted (by key) array of values for CPU features.

extern const llvm::SubtargetFeatureKV AVRFeatureKV[] = {

  { "addsubiw", "Enable 16-bit register-immediate addition and subtraction instructions", AVR::FeatureADDSUBIW, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avr0", "The device is a part of the avr0 family", AVR::FamilyAVR0, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avr1", "The device is a part of the avr1 family", AVR::FamilyAVR1, { { { 0x120000040000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avr2", "The device is a part of the avr2 family", AVR::FamilyAVR2, { { { 0x4008200080000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avr25", "The device is a part of the avr25 family", AVR::FamilyAVR25, { { { 0x1240400100000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avr3", "The device is a part of the avr3 family", AVR::FamilyAVR3, { { { 0x10000100000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avr31", "The device is a part of the avr31 family", AVR::FamilyAVR31, { { { 0x2000200000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avr35", "The device is a part of the avr35 family", AVR::FamilyAVR35, { { { 0x1240400200000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avr4", "The device is a part of the avr4 family", AVR::FamilyAVR4, { { { 0x1640400100000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avr5", "The device is a part of the avr5 family", AVR::FamilyAVR5, { { { 0x1640400200000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avr51", "The device is a part of the avr51 family", AVR::FamilyAVR51, { { { 0x6000800000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avr6", "The device is a part of the avr6 family", AVR::FamilyAVR6, { { { 0x1010000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "avrtiny", "The device is a part of the avrtiny family", AVR::FamilyTiny, { { { 0x34000400040000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "break", "The device supports the `BREAK` debugging instruction", AVR::FeatureBREAK, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "des", "The device supports the `DES k` encryption instruction", AVR::FeatureDES, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "eijmpcall", "The device supports the `EIJMP`/`EICALL` instructions", AVR::FeatureEIJMPCALL, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "elpm", "The device supports the ELPM instruction", AVR::FeatureELPM, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "elpmx", "The device supports the `ELPM Rd, Z[+]` instructions", AVR::FeatureELPMX, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "ijmpcall", "The device supports `IJMP`/`ICALL`instructions", AVR::FeatureIJMPCALL, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "jmpcall", "The device supports the `JMP` and `CALL` instructions", AVR::FeatureJMPCALL, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "lowbytefirst", "Do the low byte first when writing a 16-bit port or storing a 16-bit word", AVR::FeatureLowByteFirst, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "lpm", "The device supports the `LPM` instruction", AVR::FeatureLPM, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "lpmx", "The device supports the `LPM Rd, Z[+]` instruction", AVR::FeatureLPMX, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "memmappedregs", "The device has CPU registers mapped in data address space", AVR::FeatureMMR, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "movw", "The device supports the 16-bit MOVW instruction", AVR::FeatureMOVW, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "mul", "The device supports the multiplication instructions", AVR::FeatureMultiplication, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "rmw", "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", AVR::FeatureRMW, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "smallstack", "The device has an 8-bit stack pointer", AVR::FeatureSmallStack, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "special", "Enable use of the entire instruction set - used for debugging", AVR::FeatureSetSpecial, { { { 0x7f7fe00000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "spm", "The device supports the `SPM` instruction", AVR::FeatureSPM, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "spmx", "The device supports the `SPM Z+` instruction", AVR::FeatureSPMX, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "sram", "The device has random access memory", AVR::FeatureSRAM, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "tinyencoding", "The device has Tiny core specific instruction encodings", AVR::FeatureTinyEncoding, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "xmega", "The device is a part of the xmega family", AVR::FamilyXMEGA, { { { 0x76ffe00040000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "xmega3", "The device is a part of the xmega3 family", AVR::FamilyXMEGA3, { { { 0x46f8600040000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

  { "xmegau", "The device is a part of the xmegau family", AVR::FamilyXMEGAU, { { { 0x800040000000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } } },

};

#ifdef DBGFIELD

#error "<target>GenSubtargetInfo.inc requires a DBGFIELD macro"

#endif

#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)

#define DBGFIELD(x) x,

#else

#define DBGFIELD(x)

#endif

// ===============================================================

// Data tables for the new per-operand machine model.

// {ProcResourceIdx, ReleaseAtCycle, AcquireAtCycle}

extern const llvm::MCWriteProcResEntry AVRWriteProcResTable[] = {

  { 0,  0,  0 }, // Invalid

}; // AVRWriteProcResTable

// {Cycles, WriteResourceID}

extern const llvm::MCWriteLatencyEntry AVRWriteLatencyTable[] = {

  { 0,  0}, // Invalid

}; // AVRWriteLatencyTable

// {UseIdx, WriteResourceID, Cycles}

extern const llvm::MCReadAdvanceEntry AVRReadAdvanceTable[] = {

  {0,  0,  0}, // Invalid

}; // AVRReadAdvanceTable

#undef DBGFIELD

static const llvm::MCSchedModel NoSchedModel = {

  MCSchedModel::DefaultIssueWidth,

  MCSchedModel::DefaultMicroOpBufferSize,

  MCSchedModel::DefaultLoopMicroOpBufferSize,

  MCSchedModel::DefaultLoadLatency,

  MCSchedModel::DefaultHighLatency,

  MCSchedModel::DefaultMispredictPenalty,

  false, // PostRAScheduler

  false, // CompleteModel

  false, // EnableIntervals

  0, // Processor ID

  nullptr, nullptr, 0, 0, // No instruction-level machine model.

  nullptr, // No Itinerary

  nullptr // No extra processor descriptor

};

// Sorted (by key) array of values for CPU subtype.

extern const llvm::SubtargetSubTypeKV AVRSubTypeKV[] = {

 { "at43usb320", { { { 0x4000080ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at43usb355", { { { 0x200004ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at76c711", { { { 0x200004ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at86rf401", { { { 0x240000100040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90c8534", { { { 0x100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90can128", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90can32", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90can64", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90pwm1", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90pwm161", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90pwm2", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90pwm216", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90pwm2b", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90pwm3", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90pwm316", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90pwm3b", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90pwm81", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90s1200", { { { 0x10000000040001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90s2313", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90s2323", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90s2333", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90s2343", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90s4414", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90s4433", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90s4434", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90s8515", { { { 0x100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90s8535", { { { 0x100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90scr100", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90usb1286", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90usb1287", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90usb162", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90usb646", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90usb647", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at90usb82", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "at94k", { { { 0x640000200010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata5272", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata5505", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata5702m322", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata5782", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata5790", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata5790n", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata5791", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata5795", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata5831", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata6285", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata6286", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata6289", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata6612c", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata6613c", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata6614q", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata6616c", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata6617c", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata664251", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata8210", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "ata8510", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega103", { { { 0x4000080ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega128", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega1280", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega1281", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega1284", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega1284p", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega1284rfr2", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega128a", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega128rfa1", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega128rfr2", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega16", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega1608", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega1609", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega161", { { { 0x1640000200010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega162", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega163", { { { 0x1640000200010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega164a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega164p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega164pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega165", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega165a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega165p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega165pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega168", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega168a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega168p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega168pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega168pb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega169", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega169a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega169p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega169pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega16a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega16hva", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega16hva2", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega16hvb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega16hvbrevb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega16m1", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega16u2", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega16u4", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega2560", { { { 0x1000020ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega2561", { { { 0x1000020ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega2564rfr2", { { { 0x1000020ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega256rfr2", { { { 0x1000020ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega32", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega3208", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega3209", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega323", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega324a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega324p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega324pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega324pb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega325", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega3250", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega3250a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega3250p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega3250pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega325a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega325p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega325pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega328", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega328p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega328pb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega329", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega3290", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega3290a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega3290p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega3290pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega329a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega329p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega329pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega32a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega32c1", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega32hvb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega32hvbrevb", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega32m1", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega32u2", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega32u4", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega32u6", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega406", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega48", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega4808", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega4809", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega48a", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega48p", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega48pa", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega48pb", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega64", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega640", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega644", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega644a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega644p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega644pa", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega644rfr2", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega645", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega6450", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega6450a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega6450p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega645a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega645p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega649", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega6490", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega6490a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega6490p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega649a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega649p", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega64a", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega64c1", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega64hve", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega64hve2", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega64m1", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega64rfr2", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega8", { { { 0x1640000100008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega808", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega809", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega8515", { { { 0x1640000100008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega8535", { { { 0x1640000100008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega88", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega88a", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega88p", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega88pa", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega88pb", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega8a", { { { 0x1640000100008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega8hva", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atmega8u2", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny10", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny102", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny104", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny11", { { { 0x10000000080001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny12", { { { 0x10000000080001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny13", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny13a", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny15", { { { 0x10000000080001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny1604", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny1606", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny1607", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny1614", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny1616", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny1617", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny1624", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny1626", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny1627", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny1634", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny167", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny20", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny202", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny204", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny212", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny214", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny22", { { { 0x10000000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny2313", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny2313a", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny24", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny24a", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny25", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny26", { { { 0x10040000100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny261", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny261a", { { { 0x10000002000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny28", { { { 0x10000000080001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny3216", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny3217", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny4", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny40", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny402", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny404", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny406", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny412", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny414", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny416", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny417", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny4313", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny43u", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny44", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny441", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny44a", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny45", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny461", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny461a", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny48", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny5", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny804", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny806", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny807", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny814", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny816", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny817", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny828", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny84", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny841", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny84a", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny85", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny861", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny861a", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny87", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny88", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "attiny9", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega128a1", { { { 0x40020000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega128a1u", { { { 0x100020000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega128a3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega128a3u", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega128a4u", { { { 0x100020000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega128b1", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega128b3", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega128c3", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega128d3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega128d4", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega16a4", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega16a4u", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega16c4", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega16d4", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega16e5", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega192a3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega192a3u", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega192c3", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega192d3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega256a3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega256a3b", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega256a3bu", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega256a3u", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega256c3", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega256d3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega32a4", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega32a4u", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega32c3", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega32c4", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega32d3", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega32d4", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega32e5", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega384c3", { { { 0x100010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega384d3", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega64a1", { { { 0x40008000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega64a1u", { { { 0x100008000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega64a3", { { { 0x40004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega64a3u", { { { 0x100004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega64a4u", { { { 0x100004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega64b1", { { { 0x100004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega64b3", { { { 0x100004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega64c3", { { { 0x100004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega64d3", { { { 0x40004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega64d4", { { { 0x40004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "atxmega8e5", { { { 0x100001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avr1", { { { 0x80001ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avr2", { { { 0x100002ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avr25", { { { 0x2000040ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avr3", { { { 0x200004ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avr31", { { { 0x4000080ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avr35", { { { 0x8000100ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avr4", { { { 0x400008ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avr5", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avr51", { { { 0x10000200ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avr6", { { { 0x1000020ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avrtiny", { { { 0x20000400ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avrxmega1", { { { 0x40000800ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avrxmega2", { { { 0x40001000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avrxmega3", { { { 0x80002000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avrxmega4", { { { 0x40004000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avrxmega5", { { { 0x40008000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avrxmega6", { { { 0x40010000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "avrxmega7", { { { 0x40020000ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

 { "m3000", { { { 0x800010ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, { { { 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, 0x0ULL, } } }, &NoSchedModel },

};

namespace AVR_MC {

unsigned resolveVariantSchedClassImpl(unsigned SchedClass,

    const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) {

  // Don't know how to resolve this scheduling class.

  return 0;

}

} // end namespace AVR_MC

struct AVRGenMCSubtargetInfo : public MCSubtargetInfo {

  AVRGenMCSubtargetInfo(const Triple &TT,

    StringRef CPU, StringRef TuneCPU, StringRef FS,

    ArrayRef<SubtargetFeatureKV> PF,

    ArrayRef<SubtargetSubTypeKV> PD,

    const MCWriteProcResEntry *WPR,

    const MCWriteLatencyEntry *WL,

    const MCReadAdvanceEntry *RA, const InstrStage *IS,

    const unsigned *OC, const unsigned *FP) :

      MCSubtargetInfo(TT, CPU, TuneCPU, FS, PF, PD,

                      WPR, WL, RA, IS, OC, FP) { }

  unsigned resolveVariantSchedClass(unsigned SchedClass,

      const MCInst *MI, const MCInstrInfo *MCII,

      unsigned CPUID) const override {

    return AVR_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, CPUID);

  }

};

static inline MCSubtargetInfo *createAVRMCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS) {

  return new AVRGenMCSubtargetInfo(TT, CPU, TuneCPU, FS, AVRFeatureKV, AVRSubTypeKV, 

                      AVRWriteProcResTable, AVRWriteLatencyTable, AVRReadAdvanceTable, 

                      nullptr, nullptr, nullptr);

}

} // end namespace llvm

#endif // GET_SUBTARGETINFO_MC_DESC

#ifdef GET_SUBTARGETINFO_TARGET_DESC

#undef GET_SUBTARGETINFO_TARGET_DESC

#include "llvm/Support/Debug.h"

#include "llvm/Support/raw_ostream.h"

// ParseSubtargetFeatures - Parses features string setting specified

// subtarget options.

void llvm::AVRSubtarget::ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS) {

  LLVM_DEBUG(dbgs() << "\nFeatures:" << FS);

  LLVM_DEBUG(dbgs() << "\nCPU:" << CPU);

  LLVM_DEBUG(dbgs() << "\nTuneCPU:" << TuneCPU << "\n\n");

  InitMCProcessorInfo(CPU, TuneCPU, FS);

  const FeatureBitset &Bits = getFeatureBits();

  if (Bits[AVR::ELFArchAVR1] && ELFArch < ELF::EF_AVR_ARCH_AVR1) ELFArch = ELF::EF_AVR_ARCH_AVR1;

  if (Bits[AVR::ELFArchAVR2] && ELFArch < ELF::EF_AVR_ARCH_AVR2) ELFArch = ELF::EF_AVR_ARCH_AVR2;

  if (Bits[AVR::ELFArchAVR3] && ELFArch < ELF::EF_AVR_ARCH_AVR3) ELFArch = ELF::EF_AVR_ARCH_AVR3;

  if (Bits[AVR::ELFArchAVR4] && ELFArch < ELF::EF_AVR_ARCH_AVR4) ELFArch = ELF::EF_AVR_ARCH_AVR4;

  if (Bits[AVR::ELFArchAVR5] && ELFArch < ELF::EF_AVR_ARCH_AVR5) ELFArch = ELF::EF_AVR_ARCH_AVR5;

  if (Bits[AVR::ELFArchAVR6] && ELFArch < ELF::EF_AVR_ARCH_AVR6) ELFArch = ELF::EF_AVR_ARCH_AVR6;

  if (Bits[AVR::ELFArchAVR25] && ELFArch < ELF::EF_AVR_ARCH_AVR25) ELFArch = ELF::EF_AVR_ARCH_AVR25;

  if (Bits[AVR::ELFArchAVR31] && ELFArch < ELF::EF_AVR_ARCH_AVR31) ELFArch = ELF::EF_AVR_ARCH_AVR31;

  if (Bits[AVR::ELFArchAVR35] && ELFArch < ELF::EF_AVR_ARCH_AVR35) ELFArch = ELF::EF_AVR_ARCH_AVR35;

  if (Bits[AVR::ELFArchAVR51] && ELFArch < ELF::EF_AVR_ARCH_AVR51) ELFArch = ELF::EF_AVR_ARCH_AVR51;

  if (Bits[AVR::ELFArchTiny] && ELFArch < ELF::EF_AVR_ARCH_AVRTINY) ELFArch = ELF::EF_AVR_ARCH_AVRTINY;

  if (Bits[AVR::ELFArchXMEGA1] && ELFArch < ELF::EF_AVR_ARCH_XMEGA1) ELFArch = ELF::EF_AVR_ARCH_XMEGA1;

  if (Bits[AVR::ELFArchXMEGA2] && ELFArch < ELF::EF_AVR_ARCH_XMEGA2) ELFArch = ELF::EF_AVR_ARCH_XMEGA2;

  if (Bits[AVR::ELFArchXMEGA3] && ELFArch < ELF::EF_AVR_ARCH_XMEGA3) ELFArch = ELF::EF_AVR_ARCH_XMEGA3;

  if (Bits[AVR::ELFArchXMEGA4] && ELFArch < ELF::EF_AVR_ARCH_XMEGA4) ELFArch = ELF::EF_AVR_ARCH_XMEGA4;

  if (Bits[AVR::ELFArchXMEGA5] && ELFArch < ELF::EF_AVR_ARCH_XMEGA5) ELFArch = ELF::EF_AVR_ARCH_XMEGA5;

  if (Bits[AVR::ELFArchXMEGA6] && ELFArch < ELF::EF_AVR_ARCH_XMEGA6) ELFArch = ELF::EF_AVR_ARCH_XMEGA6;

  if (Bits[AVR::ELFArchXMEGA7] && ELFArch < ELF::EF_AVR_ARCH_XMEGA7) ELFArch = ELF::EF_AVR_ARCH_XMEGA7;

  if (Bits[AVR::FamilyAVR0]) HasFeatureSetFamilyAVR0 = true;

  if (Bits[AVR::FamilyAVR1]) HasFeatureSetFamilyAVR1 = true;

  if (Bits[AVR::FamilyAVR2]) HasFeatureSetFamilyAVR2 = true;

  if (Bits[AVR::FamilyAVR3]) HasFeatureSetFamilyAVR3 = true;

  if (Bits[AVR::FamilyAVR4]) HasFeatureSetFamilyAVR4 = true;

  if (Bits[AVR::FamilyAVR5]) HasFeatureSetFamilyAVR5 = true;

  if (Bits[AVR::FamilyAVR6]) HasFeatureSetFamilyAVR6 = true;

  if (Bits[AVR::FamilyAVR25]) HasFeatureSetFamilyAVR25 = true;

  if (Bits[AVR::FamilyAVR31]) HasFeatureSetFamilyAVR31 = true;

  if (Bits[AVR::FamilyAVR35]) HasFeatureSetFamilyAVR35 = true;

  if (Bits[AVR::FamilyAVR51]) HasFeatureSetFamilyAVR51 = true;

  if (Bits[AVR::FamilyTiny]) HasFeatureSetFamilyTiny = true;

  if (Bits[AVR::FamilyXMEGA]) HasFeatureSetFamilyXMEGA = true;

  if (Bits[AVR::FamilyXMEGA3]) HasFeatureSetFamilyXMEGA3 = true;

  if (Bits[AVR::FamilyXMEGAU]) HasFeatureSetFamilyXMEGAU = true;

  if (Bits[AVR::FeatureADDSUBIW]) HasADDSUBIW = true;

  if (Bits[AVR::FeatureBREAK]) HasBREAK = true;

  if (Bits[AVR::FeatureDES]) HasDES = true;

  if (Bits[AVR::FeatureEIJMPCALL]) HasEIJMPCALL = true;

  if (Bits[AVR::FeatureELPM]) HasELPM = true;

  if (Bits[AVR::FeatureELPMX]) HasELPMX = true;

  if (Bits[AVR::FeatureIJMPCALL]) HasSRAMIJMPCALL = true;

  if (Bits[AVR::FeatureJMPCALL]) HasJMPCALL = true;

  if (Bits[AVR::FeatureLPM]) HasLPM = true;

  if (Bits[AVR::FeatureLPMX]) HasLPMX = true;

  if (Bits[AVR::FeatureLowByteFirst]) HasLowByteFirst = true;

  if (Bits[AVR::FeatureMMR]) HasMemMappedGPR = true;

  if (Bits[AVR::FeatureMOVW]) HasMOVW = true;

  if (Bits[AVR::FeatureMultiplication]) SupportsMultiplication = true;

  if (Bits[AVR::FeatureRMW]) SupportsRMW = true;

  if (Bits[AVR::FeatureSPM]) HasSPM = true;

  if (Bits[AVR::FeatureSPMX]) HasSPMX = true;

  if (Bits[AVR::FeatureSRAM]) HasSRAM = true;

  if (Bits[AVR::FeatureSetSpecial]) HasFeatureSetFeatureSetSpecial = true;

  if (Bits[AVR::FeatureSmallStack]) HasSmallStack = true;

  if (Bits[AVR::FeatureTinyEncoding]) HasTinyEncoding = true;

}

#endif // GET_SUBTARGETINFO_TARGET_DESC

#ifdef GET_SUBTARGETINFO_HEADER

#undef GET_SUBTARGETINFO_HEADER

namespace llvm {

class DFAPacketizer;

namespace AVR_MC {

unsigned resolveVariantSchedClassImpl(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID);

} // end namespace AVR_MC

struct AVRGenSubtargetInfo : public TargetSubtargetInfo {

  explicit AVRGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS);

public:

  unsigned resolveSchedClass(unsigned SchedClass,  const MachineInstr *DefMI, const TargetSchedModel *SchedModel) const override;

  unsigned resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const override;

  DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;

};

} // end namespace llvm

#endif // GET_SUBTARGETINFO_HEADER

#ifdef GET_SUBTARGETINFO_CTOR

#undef GET_SUBTARGETINFO_CTOR

#include "llvm/CodeGen/TargetSchedule.h"

namespace llvm {

extern const llvm::SubtargetFeatureKV AVRFeatureKV[];

extern const llvm::SubtargetSubTypeKV AVRSubTypeKV[];

extern const llvm::MCWriteProcResEntry AVRWriteProcResTable[];

extern const llvm::MCWriteLatencyEntry AVRWriteLatencyTable[];

extern const llvm::MCReadAdvanceEntry AVRReadAdvanceTable[];

AVRGenSubtargetInfo::AVRGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef TuneCPU, StringRef FS)

  : TargetSubtargetInfo(TT, CPU, TuneCPU, FS, ArrayRef(AVRFeatureKV, 36), ArrayRef(AVRSubTypeKV, 315), 

                        AVRWriteProcResTable, AVRWriteLatencyTable, AVRReadAdvanceTable, 

                        nullptr, nullptr, nullptr) {}

unsigned AVRGenSubtargetInfo

::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {

  report_fatal_error("Expected a variant SchedClass");

} // AVRGenSubtargetInfo::resolveSchedClass

unsigned AVRGenSubtargetInfo

::resolveVariantSchedClass(unsigned SchedClass, const MCInst *MI, const MCInstrInfo *MCII, unsigned CPUID) const {

  return AVR_MC::resolveVariantSchedClassImpl(SchedClass, MI, MCII, CPUID);

} // AVRGenSubtargetInfo::resolveVariantSchedClass

} // end namespace llvm

#endif // GET_SUBTARGETINFO_CTOR

#ifdef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS

#undef GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS

#endif // GET_STIPREDICATE_DECLS_FOR_MC_ANALYSIS

#ifdef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS

#undef GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS

#endif // GET_STIPREDICATE_DEFS_FOR_MC_ANALYSIS