/src/build/lib/Target/Hexagon/HexagonGenAsmMatcher.inc
Line | Count | Source (jump to first uncovered line) |
1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* Assembly Matcher Source Fragment *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* From: Hexagon.td *| |
7 | | |* *| |
8 | | \*===----------------------------------------------------------------------===*/ |
9 | | |
10 | | |
11 | | #ifdef GET_ASSEMBLER_HEADER |
12 | | #undef GET_ASSEMBLER_HEADER |
13 | | // This should be included into the middle of the declaration of |
14 | | // your subclasses implementation of MCTargetAsmParser. |
15 | | FeatureBitset ComputeAvailableFeatures(const FeatureBitset &FB) const; |
16 | | void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
17 | | const OperandVector &Operands); |
18 | | void convertToMapAndConstraints(unsigned Kind, |
19 | | const OperandVector &Operands) override; |
20 | | unsigned MatchInstructionImpl(const OperandVector &Operands, |
21 | | MCInst &Inst, |
22 | | uint64_t &ErrorInfo, |
23 | | FeatureBitset &MissingFeatures, |
24 | | bool matchingInlineAsm, |
25 | | unsigned VariantID = 0); |
26 | | unsigned MatchInstructionImpl(const OperandVector &Operands, |
27 | | MCInst &Inst, |
28 | | uint64_t &ErrorInfo, |
29 | | bool matchingInlineAsm, |
30 | 0 | unsigned VariantID = 0) { |
31 | 0 | FeatureBitset MissingFeatures; |
32 | 0 | return MatchInstructionImpl(Operands, Inst, ErrorInfo, MissingFeatures, |
33 | 0 | matchingInlineAsm, VariantID); |
34 | 0 | } |
35 | | |
36 | | #endif // GET_ASSEMBLER_HEADER |
37 | | |
38 | | |
39 | | #ifdef GET_OPERAND_DIAGNOSTIC_TYPES |
40 | | #undef GET_OPERAND_DIAGNOSTIC_TYPES |
41 | | |
42 | | #endif // GET_OPERAND_DIAGNOSTIC_TYPES |
43 | | |
44 | | |
45 | | #ifdef GET_REGISTER_MATCHER |
46 | | #undef GET_REGISTER_MATCHER |
47 | | |
48 | | // Bits for subtarget features that participate in instruction matching. |
49 | | enum SubtargetFeatureBits : uint8_t { |
50 | | Feature_HasV5Bit = 2, |
51 | | Feature_HasV55Bit = 3, |
52 | | Feature_HasV60Bit = 4, |
53 | | Feature_HasV62Bit = 5, |
54 | | Feature_HasV65Bit = 6, |
55 | | Feature_HasV66Bit = 7, |
56 | | Feature_HasV67Bit = 8, |
57 | | Feature_HasV68Bit = 9, |
58 | | Feature_HasV69Bit = 10, |
59 | | Feature_HasV71Bit = 11, |
60 | | Feature_HasV73Bit = 12, |
61 | | Feature_UseHVX64BBit = 16, |
62 | | Feature_UseHVX128BBit = 17, |
63 | | Feature_UseHVXBit = 15, |
64 | | Feature_UseHVXV60Bit = 20, |
65 | | Feature_UseHVXV62Bit = 21, |
66 | | Feature_UseHVXV65Bit = 22, |
67 | | Feature_UseHVXV66Bit = 23, |
68 | | Feature_UseHVXV67Bit = 24, |
69 | | Feature_UseHVXV68Bit = 25, |
70 | | Feature_UseHVXV69Bit = 26, |
71 | | Feature_UseHVXV71Bit = 27, |
72 | | Feature_UseHVXV73Bit = 28, |
73 | | Feature_UseAudioBit = 13, |
74 | | Feature_UseZRegBit = 29, |
75 | | Feature_HasPreV65Bit = 1, |
76 | | Feature_UseHVXIEEEFPBit = 18, |
77 | | Feature_UseHVXQFloatBit = 19, |
78 | | Feature_HasMemNoShufBit = 0, |
79 | | Feature_UseCabacBit = 14, |
80 | | }; |
81 | | |
82 | 0 | static unsigned MatchRegisterName(StringRef Name) { |
83 | 0 | switch (Name.size()) { |
84 | 0 | default: break; |
85 | 0 | case 2: // 40 strings to match. |
86 | 0 | switch (Name[0]) { |
87 | 0 | default: break; |
88 | 0 | case 'c': // 2 strings to match. |
89 | 0 | switch (Name[1]) { |
90 | 0 | default: break; |
91 | 0 | case '5': // 1 string to match. |
92 | 0 | return 53; // "c5" |
93 | 0 | case '8': // 1 string to match. |
94 | 0 | return 54; // "c8" |
95 | 0 | } |
96 | 0 | break; |
97 | 0 | case 'g': // 7 strings to match. |
98 | 0 | switch (Name[1]) { |
99 | 0 | default: break; |
100 | 0 | case '4': // 1 string to match. |
101 | 0 | return 74; // "g4" |
102 | 0 | case '5': // 1 string to match. |
103 | 0 | return 75; // "g5" |
104 | 0 | case '6': // 1 string to match. |
105 | 0 | return 76; // "g6" |
106 | 0 | case '7': // 1 string to match. |
107 | 0 | return 77; // "g7" |
108 | 0 | case '8': // 1 string to match. |
109 | 0 | return 78; // "g8" |
110 | 0 | case '9': // 1 string to match. |
111 | 0 | return 79; // "g9" |
112 | 0 | case 'p': // 1 string to match. |
113 | 0 | return 12; // "gp" |
114 | 0 | } |
115 | 0 | break; |
116 | 0 | case 'm': // 2 strings to match. |
117 | 0 | switch (Name[1]) { |
118 | 0 | default: break; |
119 | 0 | case '0': // 1 string to match. |
120 | 0 | return 104; // "m0" |
121 | 0 | case '1': // 1 string to match. |
122 | 0 | return 105; // "m1" |
123 | 0 | } |
124 | 0 | break; |
125 | 0 | case 'p': // 5 strings to match. |
126 | 0 | switch (Name[1]) { |
127 | 0 | default: break; |
128 | 0 | case '0': // 1 string to match. |
129 | 0 | return 106; // "p0" |
130 | 0 | case '1': // 1 string to match. |
131 | 0 | return 107; // "p1" |
132 | 0 | case '2': // 1 string to match. |
133 | 0 | return 108; // "p2" |
134 | 0 | case '3': // 1 string to match. |
135 | 0 | return 109; // "p3" |
136 | 0 | case 'c': // 1 string to match. |
137 | 0 | return 24; // "pc" |
138 | 0 | } |
139 | 0 | break; |
140 | 0 | case 'q': // 4 strings to match. |
141 | 0 | switch (Name[1]) { |
142 | 0 | default: break; |
143 | 0 | case '0': // 1 string to match. |
144 | 0 | return 114; // "q0" |
145 | 0 | case '1': // 1 string to match. |
146 | 0 | return 115; // "q1" |
147 | 0 | case '2': // 1 string to match. |
148 | 0 | return 116; // "q2" |
149 | 0 | case '3': // 1 string to match. |
150 | 0 | return 117; // "q3" |
151 | 0 | } |
152 | 0 | break; |
153 | 0 | case 'r': // 10 strings to match. |
154 | 0 | switch (Name[1]) { |
155 | 0 | default: break; |
156 | 0 | case '0': // 1 string to match. |
157 | 0 | return 118; // "r0" |
158 | 0 | case '1': // 1 string to match. |
159 | 0 | return 119; // "r1" |
160 | 0 | case '2': // 1 string to match. |
161 | 0 | return 120; // "r2" |
162 | 0 | case '3': // 1 string to match. |
163 | 0 | return 121; // "r3" |
164 | 0 | case '4': // 1 string to match. |
165 | 0 | return 122; // "r4" |
166 | 0 | case '5': // 1 string to match. |
167 | 0 | return 123; // "r5" |
168 | 0 | case '6': // 1 string to match. |
169 | 0 | return 124; // "r6" |
170 | 0 | case '7': // 1 string to match. |
171 | 0 | return 125; // "r7" |
172 | 0 | case '8': // 1 string to match. |
173 | 0 | return 126; // "r8" |
174 | 0 | case '9': // 1 string to match. |
175 | 0 | return 127; // "r9" |
176 | 0 | } |
177 | 0 | break; |
178 | 0 | case 'v': // 10 strings to match. |
179 | 0 | switch (Name[1]) { |
180 | 0 | default: break; |
181 | 0 | case '0': // 1 string to match. |
182 | 0 | return 198; // "v0" |
183 | 0 | case '1': // 1 string to match. |
184 | 0 | return 199; // "v1" |
185 | 0 | case '2': // 1 string to match. |
186 | 0 | return 200; // "v2" |
187 | 0 | case '3': // 1 string to match. |
188 | 0 | return 201; // "v3" |
189 | 0 | case '4': // 1 string to match. |
190 | 0 | return 202; // "v4" |
191 | 0 | case '5': // 1 string to match. |
192 | 0 | return 203; // "v5" |
193 | 0 | case '6': // 1 string to match. |
194 | 0 | return 204; // "v6" |
195 | 0 | case '7': // 1 string to match. |
196 | 0 | return 205; // "v7" |
197 | 0 | case '8': // 1 string to match. |
198 | 0 | return 206; // "v8" |
199 | 0 | case '9': // 1 string to match. |
200 | 0 | return 207; // "v9" |
201 | 0 | } |
202 | 0 | break; |
203 | 0 | } |
204 | 0 | break; |
205 | 0 | case 3: // 115 strings to match. |
206 | 0 | switch (Name[0]) { |
207 | 0 | default: break; |
208 | 0 | case 'c': // 3 strings to match. |
209 | 0 | switch (Name[1]) { |
210 | 0 | default: break; |
211 | 0 | case 'c': // 1 string to match. |
212 | 0 | if (Name[2] != 'r') |
213 | 0 | break; |
214 | 0 | return 2; // "ccr" |
215 | 0 | case 's': // 2 strings to match. |
216 | 0 | switch (Name[2]) { |
217 | 0 | default: break; |
218 | 0 | case '0': // 1 string to match. |
219 | 0 | return 55; // "cs0" |
220 | 0 | case '1': // 1 string to match. |
221 | 0 | return 56; // "cs1" |
222 | 0 | } |
223 | 0 | break; |
224 | 0 | } |
225 | 0 | break; |
226 | 0 | case 'e': // 2 strings to match. |
227 | 0 | switch (Name[1]) { |
228 | 0 | default: break; |
229 | 0 | case 'l': // 1 string to match. |
230 | 0 | if (Name[2] != 'r') |
231 | 0 | break; |
232 | 0 | return 6; // "elr" |
233 | 0 | case 'v': // 1 string to match. |
234 | 0 | if (Name[2] != 'b') |
235 | 0 | break; |
236 | 0 | return 7; // "evb" |
237 | 0 | } |
238 | 0 | break; |
239 | 0 | case 'g': // 13 strings to match. |
240 | 0 | switch (Name[1]) { |
241 | 0 | default: break; |
242 | 0 | case '1': // 6 strings to match. |
243 | 0 | switch (Name[2]) { |
244 | 0 | default: break; |
245 | 0 | case '0': // 1 string to match. |
246 | 0 | return 80; // "g10" |
247 | 0 | case '1': // 1 string to match. |
248 | 0 | return 81; // "g11" |
249 | 0 | case '2': // 1 string to match. |
250 | 0 | return 82; // "g12" |
251 | 0 | case '3': // 1 string to match. |
252 | 0 | return 83; // "g13" |
253 | 0 | case '4': // 1 string to match. |
254 | 0 | return 84; // "g14" |
255 | 0 | case '5': // 1 string to match. |
256 | 0 | return 85; // "g15" |
257 | 0 | } |
258 | 0 | break; |
259 | 0 | case '2': // 4 strings to match. |
260 | 0 | switch (Name[2]) { |
261 | 0 | default: break; |
262 | 0 | case '0': // 1 string to match. |
263 | 0 | return 86; // "g20" |
264 | 0 | case '1': // 1 string to match. |
265 | 0 | return 87; // "g21" |
266 | 0 | case '2': // 1 string to match. |
267 | 0 | return 88; // "g22" |
268 | 0 | case '3': // 1 string to match. |
269 | 0 | return 89; // "g23" |
270 | 0 | } |
271 | 0 | break; |
272 | 0 | case '3': // 2 strings to match. |
273 | 0 | switch (Name[2]) { |
274 | 0 | default: break; |
275 | 0 | case '0': // 1 string to match. |
276 | 0 | return 90; // "g30" |
277 | 0 | case '1': // 1 string to match. |
278 | 0 | return 91; // "g31" |
279 | 0 | } |
280 | 0 | break; |
281 | 0 | case 's': // 1 string to match. |
282 | 0 | if (Name[2] != 'r') |
283 | 0 | break; |
284 | 0 | return 15; // "gsr" |
285 | 0 | } |
286 | 0 | break; |
287 | 0 | case 'l': // 2 strings to match. |
288 | 0 | if (Name[1] != 'c') |
289 | 0 | break; |
290 | 0 | switch (Name[2]) { |
291 | 0 | default: break; |
292 | 0 | case '0': // 1 string to match. |
293 | 0 | return 102; // "lc0" |
294 | 0 | case '1': // 1 string to match. |
295 | 0 | return 103; // "lc1" |
296 | 0 | } |
297 | 0 | break; |
298 | 0 | case 'r': // 23 strings to match. |
299 | 0 | switch (Name[1]) { |
300 | 0 | default: break; |
301 | 0 | case '1': // 10 strings to match. |
302 | 0 | switch (Name[2]) { |
303 | 0 | default: break; |
304 | 0 | case '0': // 1 string to match. |
305 | 0 | return 128; // "r10" |
306 | 0 | case '1': // 1 string to match. |
307 | 0 | return 129; // "r11" |
308 | 0 | case '2': // 1 string to match. |
309 | 0 | return 130; // "r12" |
310 | 0 | case '3': // 1 string to match. |
311 | 0 | return 131; // "r13" |
312 | 0 | case '4': // 1 string to match. |
313 | 0 | return 132; // "r14" |
314 | 0 | case '5': // 1 string to match. |
315 | 0 | return 133; // "r15" |
316 | 0 | case '6': // 1 string to match. |
317 | 0 | return 134; // "r16" |
318 | 0 | case '7': // 1 string to match. |
319 | 0 | return 135; // "r17" |
320 | 0 | case '8': // 1 string to match. |
321 | 0 | return 136; // "r18" |
322 | 0 | case '9': // 1 string to match. |
323 | 0 | return 137; // "r19" |
324 | 0 | } |
325 | 0 | break; |
326 | 0 | case '2': // 10 strings to match. |
327 | 0 | switch (Name[2]) { |
328 | 0 | default: break; |
329 | 0 | case '0': // 1 string to match. |
330 | 0 | return 138; // "r20" |
331 | 0 | case '1': // 1 string to match. |
332 | 0 | return 139; // "r21" |
333 | 0 | case '2': // 1 string to match. |
334 | 0 | return 140; // "r22" |
335 | 0 | case '3': // 1 string to match. |
336 | 0 | return 141; // "r23" |
337 | 0 | case '4': // 1 string to match. |
338 | 0 | return 142; // "r24" |
339 | 0 | case '5': // 1 string to match. |
340 | 0 | return 143; // "r25" |
341 | 0 | case '6': // 1 string to match. |
342 | 0 | return 144; // "r26" |
343 | 0 | case '7': // 1 string to match. |
344 | 0 | return 145; // "r27" |
345 | 0 | case '8': // 1 string to match. |
346 | 0 | return 146; // "r28" |
347 | 0 | case '9': // 1 string to match. |
348 | 0 | return 147; // "r29" |
349 | 0 | } |
350 | 0 | break; |
351 | 0 | case '3': // 2 strings to match. |
352 | 0 | switch (Name[2]) { |
353 | 0 | default: break; |
354 | 0 | case '0': // 1 string to match. |
355 | 0 | return 148; // "r30" |
356 | 0 | case '1': // 1 string to match. |
357 | 0 | return 149; // "r31" |
358 | 0 | } |
359 | 0 | break; |
360 | 0 | case 'e': // 1 string to match. |
361 | 0 | if (Name[2] != 'v') |
362 | 0 | break; |
363 | 0 | return 32; // "rev" |
364 | 0 | } |
365 | 0 | break; |
366 | 0 | case 's': // 47 strings to match. |
367 | 0 | switch (Name[1]) { |
368 | 0 | default: break; |
369 | 0 | case '1': // 6 strings to match. |
370 | 0 | switch (Name[2]) { |
371 | 0 | default: break; |
372 | 0 | case '1': // 1 string to match. |
373 | 0 | return 150; // "s11" |
374 | 0 | case '2': // 1 string to match. |
375 | 0 | return 151; // "s12" |
376 | 0 | case '3': // 1 string to match. |
377 | 0 | return 152; // "s13" |
378 | 0 | case '4': // 1 string to match. |
379 | 0 | return 153; // "s14" |
380 | 0 | case '5': // 1 string to match. |
381 | 0 | return 154; // "s15" |
382 | 0 | case '9': // 1 string to match. |
383 | 0 | return 155; // "s19" |
384 | 0 | } |
385 | 0 | break; |
386 | 0 | case '2': // 6 strings to match. |
387 | 0 | switch (Name[2]) { |
388 | 0 | default: break; |
389 | 0 | case '0': // 1 string to match. |
390 | 0 | return 156; // "s20" |
391 | 0 | case '2': // 1 string to match. |
392 | 0 | return 157; // "s22" |
393 | 0 | case '3': // 1 string to match. |
394 | 0 | return 158; // "s23" |
395 | 0 | case '4': // 1 string to match. |
396 | 0 | return 159; // "s24" |
397 | 0 | case '5': // 1 string to match. |
398 | 0 | return 160; // "s25" |
399 | 0 | case '6': // 1 string to match. |
400 | 0 | return 161; // "s26" |
401 | 0 | } |
402 | 0 | break; |
403 | 0 | case '3': // 1 string to match. |
404 | 0 | if (Name[2] != '5') |
405 | 0 | break; |
406 | 0 | return 162; // "s35" |
407 | 0 | case '4': // 4 strings to match. |
408 | 0 | switch (Name[2]) { |
409 | 0 | default: break; |
410 | 0 | case '4': // 1 string to match. |
411 | 0 | return 163; // "s44" |
412 | 0 | case '5': // 1 string to match. |
413 | 0 | return 164; // "s45" |
414 | 0 | case '6': // 1 string to match. |
415 | 0 | return 165; // "s46" |
416 | 0 | case '7': // 1 string to match. |
417 | 0 | return 166; // "s47" |
418 | 0 | } |
419 | 0 | break; |
420 | 0 | case '5': // 6 strings to match. |
421 | 0 | switch (Name[2]) { |
422 | 0 | default: break; |
423 | 0 | case '4': // 1 string to match. |
424 | 0 | return 167; // "s54" |
425 | 0 | case '5': // 1 string to match. |
426 | 0 | return 168; // "s55" |
427 | 0 | case '6': // 1 string to match. |
428 | 0 | return 169; // "s56" |
429 | 0 | case '7': // 1 string to match. |
430 | 0 | return 170; // "s57" |
431 | 0 | case '8': // 1 string to match. |
432 | 0 | return 171; // "s58" |
433 | 0 | case '9': // 1 string to match. |
434 | 0 | return 172; // "s59" |
435 | 0 | } |
436 | 0 | break; |
437 | 0 | case '6': // 10 strings to match. |
438 | 0 | switch (Name[2]) { |
439 | 0 | default: break; |
440 | 0 | case '0': // 1 string to match. |
441 | 0 | return 173; // "s60" |
442 | 0 | case '1': // 1 string to match. |
443 | 0 | return 174; // "s61" |
444 | 0 | case '2': // 1 string to match. |
445 | 0 | return 175; // "s62" |
446 | 0 | case '3': // 1 string to match. |
447 | 0 | return 176; // "s63" |
448 | 0 | case '4': // 1 string to match. |
449 | 0 | return 177; // "s64" |
450 | 0 | case '5': // 1 string to match. |
451 | 0 | return 178; // "s65" |
452 | 0 | case '6': // 1 string to match. |
453 | 0 | return 179; // "s66" |
454 | 0 | case '7': // 1 string to match. |
455 | 0 | return 180; // "s67" |
456 | 0 | case '8': // 1 string to match. |
457 | 0 | return 181; // "s68" |
458 | 0 | case '9': // 1 string to match. |
459 | 0 | return 182; // "s69" |
460 | 0 | } |
461 | 0 | break; |
462 | 0 | case '7': // 10 strings to match. |
463 | 0 | switch (Name[2]) { |
464 | 0 | default: break; |
465 | 0 | case '0': // 1 string to match. |
466 | 0 | return 183; // "s70" |
467 | 0 | case '1': // 1 string to match. |
468 | 0 | return 184; // "s71" |
469 | 0 | case '2': // 1 string to match. |
470 | 0 | return 185; // "s72" |
471 | 0 | case '3': // 1 string to match. |
472 | 0 | return 186; // "s73" |
473 | 0 | case '4': // 1 string to match. |
474 | 0 | return 187; // "s74" |
475 | 0 | case '5': // 1 string to match. |
476 | 0 | return 188; // "s75" |
477 | 0 | case '6': // 1 string to match. |
478 | 0 | return 189; // "s76" |
479 | 0 | case '7': // 1 string to match. |
480 | 0 | return 190; // "s77" |
481 | 0 | case '8': // 1 string to match. |
482 | 0 | return 191; // "s78" |
483 | 0 | case '9': // 1 string to match. |
484 | 0 | return 192; // "s79" |
485 | 0 | } |
486 | 0 | break; |
487 | 0 | case '8': // 1 string to match. |
488 | 0 | if (Name[2] != '0') |
489 | 0 | break; |
490 | 0 | return 193; // "s80" |
491 | 0 | case 'a': // 2 strings to match. |
492 | 0 | switch (Name[2]) { |
493 | 0 | default: break; |
494 | 0 | case '0': // 1 string to match. |
495 | 0 | return 194; // "sa0" |
496 | 0 | case '1': // 1 string to match. |
497 | 0 | return 195; // "sa1" |
498 | 0 | } |
499 | 0 | break; |
500 | 0 | case 's': // 1 string to match. |
501 | 0 | if (Name[2] != 'r') |
502 | 0 | break; |
503 | 0 | return 33; // "ssr" |
504 | 0 | } |
505 | 0 | break; |
506 | 0 | case 'u': // 2 strings to match. |
507 | 0 | switch (Name[1]) { |
508 | 0 | default: break; |
509 | 0 | case 'g': // 1 string to match. |
510 | 0 | if (Name[2] != 'p') |
511 | 0 | break; |
512 | 0 | return 36; // "ugp" |
513 | 0 | case 's': // 1 string to match. |
514 | 0 | if (Name[2] != 'r') |
515 | 0 | break; |
516 | 0 | return 40; // "usr" |
517 | 0 | } |
518 | 0 | break; |
519 | 0 | case 'v': // 23 strings to match. |
520 | 0 | switch (Name[1]) { |
521 | 0 | default: break; |
522 | 0 | case '1': // 10 strings to match. |
523 | 0 | switch (Name[2]) { |
524 | 0 | default: break; |
525 | 0 | case '0': // 1 string to match. |
526 | 0 | return 208; // "v10" |
527 | 0 | case '1': // 1 string to match. |
528 | 0 | return 209; // "v11" |
529 | 0 | case '2': // 1 string to match. |
530 | 0 | return 210; // "v12" |
531 | 0 | case '3': // 1 string to match. |
532 | 0 | return 211; // "v13" |
533 | 0 | case '4': // 1 string to match. |
534 | 0 | return 212; // "v14" |
535 | 0 | case '5': // 1 string to match. |
536 | 0 | return 213; // "v15" |
537 | 0 | case '6': // 1 string to match. |
538 | 0 | return 214; // "v16" |
539 | 0 | case '7': // 1 string to match. |
540 | 0 | return 215; // "v17" |
541 | 0 | case '8': // 1 string to match. |
542 | 0 | return 216; // "v18" |
543 | 0 | case '9': // 1 string to match. |
544 | 0 | return 217; // "v19" |
545 | 0 | } |
546 | 0 | break; |
547 | 0 | case '2': // 10 strings to match. |
548 | 0 | switch (Name[2]) { |
549 | 0 | default: break; |
550 | 0 | case '0': // 1 string to match. |
551 | 0 | return 218; // "v20" |
552 | 0 | case '1': // 1 string to match. |
553 | 0 | return 219; // "v21" |
554 | 0 | case '2': // 1 string to match. |
555 | 0 | return 220; // "v22" |
556 | 0 | case '3': // 1 string to match. |
557 | 0 | return 221; // "v23" |
558 | 0 | case '4': // 1 string to match. |
559 | 0 | return 222; // "v24" |
560 | 0 | case '5': // 1 string to match. |
561 | 0 | return 223; // "v25" |
562 | 0 | case '6': // 1 string to match. |
563 | 0 | return 224; // "v26" |
564 | 0 | case '7': // 1 string to match. |
565 | 0 | return 225; // "v27" |
566 | 0 | case '8': // 1 string to match. |
567 | 0 | return 226; // "v28" |
568 | 0 | case '9': // 1 string to match. |
569 | 0 | return 227; // "v29" |
570 | 0 | } |
571 | 0 | break; |
572 | 0 | case '3': // 2 strings to match. |
573 | 0 | switch (Name[2]) { |
574 | 0 | default: break; |
575 | 0 | case '0': // 1 string to match. |
576 | 0 | return 228; // "v30" |
577 | 0 | case '1': // 1 string to match. |
578 | 0 | return 229; // "v31" |
579 | 0 | } |
580 | 0 | break; |
581 | 0 | case 'i': // 1 string to match. |
582 | 0 | if (Name[2] != 'd') |
583 | 0 | break; |
584 | 0 | return 45; // "vid" |
585 | 0 | } |
586 | 0 | break; |
587 | 0 | } |
588 | 0 | break; |
589 | 0 | case 4: // 41 strings to match. |
590 | 0 | switch (Name[0]) { |
591 | 0 | default: break; |
592 | 0 | case 'c': // 5 strings to match. |
593 | 0 | switch (Name[1]) { |
594 | 0 | default: break; |
595 | 0 | case '1': // 1 string to match. |
596 | 0 | if (memcmp(Name.data()+2, ":0", 2) != 0) |
597 | 0 | break; |
598 | 0 | return 334; // "c1:0" |
599 | 0 | case '3': // 1 string to match. |
600 | 0 | if (memcmp(Name.data()+2, ":2", 2) != 0) |
601 | 0 | break; |
602 | 0 | return 335; // "c3:2" |
603 | 0 | case '5': // 1 string to match. |
604 | 0 | if (memcmp(Name.data()+2, ":4", 2) != 0) |
605 | 0 | break; |
606 | 0 | return 336; // "c5:4" |
607 | 0 | case '7': // 1 string to match. |
608 | 0 | if (memcmp(Name.data()+2, ":6", 2) != 0) |
609 | 0 | break; |
610 | 0 | return 337; // "c7:6" |
611 | 0 | case '9': // 1 string to match. |
612 | 0 | if (memcmp(Name.data()+2, ":8", 2) != 0) |
613 | 0 | break; |
614 | 0 | return 338; // "c9:8" |
615 | 0 | } |
616 | 0 | break; |
617 | 0 | case 'd': // 1 string to match. |
618 | 0 | if (memcmp(Name.data()+1, "iag", 3) != 0) |
619 | 0 | break; |
620 | 0 | return 5; // "diag" |
621 | 0 | case 'g': // 7 strings to match. |
622 | 0 | switch (Name[1]) { |
623 | 0 | default: break; |
624 | 0 | case '1': // 1 string to match. |
625 | 0 | if (memcmp(Name.data()+2, ":0", 2) != 0) |
626 | 0 | break; |
627 | 0 | return 341; // "g1:0" |
628 | 0 | case '3': // 1 string to match. |
629 | 0 | if (memcmp(Name.data()+2, ":2", 2) != 0) |
630 | 0 | break; |
631 | 0 | return 342; // "g3:2" |
632 | 0 | case '5': // 1 string to match. |
633 | 0 | if (memcmp(Name.data()+2, ":4", 2) != 0) |
634 | 0 | break; |
635 | 0 | return 343; // "g5:4" |
636 | 0 | case '7': // 1 string to match. |
637 | 0 | if (memcmp(Name.data()+2, ":6", 2) != 0) |
638 | 0 | break; |
639 | 0 | return 344; // "g7:6" |
640 | 0 | case '9': // 1 string to match. |
641 | 0 | if (memcmp(Name.data()+2, ":8", 2) != 0) |
642 | 0 | break; |
643 | 0 | return 345; // "g9:8" |
644 | 0 | case 'e': // 1 string to match. |
645 | 0 | if (memcmp(Name.data()+2, "lr", 2) != 0) |
646 | 0 | break; |
647 | 0 | return 10; // "gelr" |
648 | 0 | case 'o': // 1 string to match. |
649 | 0 | if (memcmp(Name.data()+2, "sp", 2) != 0) |
650 | 0 | break; |
651 | 0 | return 11; // "gosp" |
652 | 0 | } |
653 | 0 | break; |
654 | 0 | case 'h': // 1 string to match. |
655 | 0 | if (memcmp(Name.data()+1, "tid", 3) != 0) |
656 | 0 | break; |
657 | 0 | return 16; // "htid" |
658 | 0 | case 'p': // 1 string to match. |
659 | 0 | if (memcmp(Name.data()+1, "3:0", 3) != 0) |
660 | 0 | break; |
661 | 0 | return 357; // "p3:0" |
662 | 0 | case 'r': // 5 strings to match. |
663 | 0 | switch (Name[1]) { |
664 | 0 | default: break; |
665 | 0 | case '1': // 1 string to match. |
666 | 0 | if (memcmp(Name.data()+2, ":0", 2) != 0) |
667 | 0 | break; |
668 | 0 | return 57; // "r1:0" |
669 | 0 | case '3': // 1 string to match. |
670 | 0 | if (memcmp(Name.data()+2, ":2", 2) != 0) |
671 | 0 | break; |
672 | 0 | return 58; // "r3:2" |
673 | 0 | case '5': // 1 string to match. |
674 | 0 | if (memcmp(Name.data()+2, ":4", 2) != 0) |
675 | 0 | break; |
676 | 0 | return 59; // "r5:4" |
677 | 0 | case '7': // 1 string to match. |
678 | 0 | if (memcmp(Name.data()+2, ":6", 2) != 0) |
679 | 0 | break; |
680 | 0 | return 60; // "r7:6" |
681 | 0 | case '9': // 1 string to match. |
682 | 0 | if (memcmp(Name.data()+2, ":8", 2) != 0) |
683 | 0 | break; |
684 | 0 | return 61; // "r9:8" |
685 | 0 | } |
686 | 0 | break; |
687 | 0 | case 's': // 8 strings to match. |
688 | 0 | switch (Name[1]) { |
689 | 0 | default: break; |
690 | 0 | case '1': // 1 string to match. |
691 | 0 | if (memcmp(Name.data()+2, ":0", 2) != 0) |
692 | 0 | break; |
693 | 0 | return 397; // "s1:0" |
694 | 0 | case '3': // 1 string to match. |
695 | 0 | if (memcmp(Name.data()+2, ":2", 2) != 0) |
696 | 0 | break; |
697 | 0 | return 358; // "s3:2" |
698 | 0 | case '5': // 1 string to match. |
699 | 0 | if (memcmp(Name.data()+2, ":4", 2) != 0) |
700 | 0 | break; |
701 | 0 | return 359; // "s5:4" |
702 | 0 | case '7': // 1 string to match. |
703 | 0 | if (memcmp(Name.data()+2, ":6", 2) != 0) |
704 | 0 | break; |
705 | 0 | return 360; // "s7:6" |
706 | 0 | case '9': // 1 string to match. |
707 | 0 | if (memcmp(Name.data()+2, ":8", 2) != 0) |
708 | 0 | break; |
709 | 0 | return 361; // "s9:8" |
710 | 0 | case 'g': // 2 strings to match. |
711 | 0 | if (Name[2] != 'p') |
712 | 0 | break; |
713 | 0 | switch (Name[3]) { |
714 | 0 | default: break; |
715 | 0 | case '0': // 1 string to match. |
716 | 0 | return 196; // "sgp0" |
717 | 0 | case '1': // 1 string to match. |
718 | 0 | return 197; // "sgp1" |
719 | 0 | } |
720 | 0 | break; |
721 | 0 | case 't': // 1 string to match. |
722 | 0 | if (memcmp(Name.data()+2, "id", 2) != 0) |
723 | 0 | break; |
724 | 0 | return 34; // "stid" |
725 | 0 | } |
726 | 0 | break; |
727 | 0 | case 'v': // 13 strings to match. |
728 | 0 | switch (Name[1]) { |
729 | 0 | default: break; |
730 | 0 | case '0': // 1 string to match. |
731 | 0 | if (memcmp(Name.data()+2, ":1", 2) != 0) |
732 | 0 | break; |
733 | 0 | return 318; // "v0:1" |
734 | 0 | case '1': // 1 string to match. |
735 | 0 | if (memcmp(Name.data()+2, ":0", 2) != 0) |
736 | 0 | break; |
737 | 0 | return 302; // "v1:0" |
738 | 0 | case '2': // 1 string to match. |
739 | 0 | if (memcmp(Name.data()+2, ":3", 2) != 0) |
740 | 0 | break; |
741 | 0 | return 319; // "v2:3" |
742 | 0 | case '3': // 2 strings to match. |
743 | 0 | if (Name[2] != ':') |
744 | 0 | break; |
745 | 0 | switch (Name[3]) { |
746 | 0 | default: break; |
747 | 0 | case '0': // 1 string to match. |
748 | 0 | return 294; // "v3:0" |
749 | 0 | case '2': // 1 string to match. |
750 | 0 | return 303; // "v3:2" |
751 | 0 | } |
752 | 0 | break; |
753 | 0 | case '4': // 1 string to match. |
754 | 0 | if (memcmp(Name.data()+2, ":5", 2) != 0) |
755 | 0 | break; |
756 | 0 | return 320; // "v4:5" |
757 | 0 | case '5': // 1 string to match. |
758 | 0 | if (memcmp(Name.data()+2, ":4", 2) != 0) |
759 | 0 | break; |
760 | 0 | return 304; // "v5:4" |
761 | 0 | case '6': // 1 string to match. |
762 | 0 | if (memcmp(Name.data()+2, ":7", 2) != 0) |
763 | 0 | break; |
764 | 0 | return 321; // "v6:7" |
765 | 0 | case '7': // 2 strings to match. |
766 | 0 | if (Name[2] != ':') |
767 | 0 | break; |
768 | 0 | switch (Name[3]) { |
769 | 0 | default: break; |
770 | 0 | case '4': // 1 string to match. |
771 | 0 | return 295; // "v7:4" |
772 | 0 | case '6': // 1 string to match. |
773 | 0 | return 305; // "v7:6" |
774 | 0 | } |
775 | 0 | break; |
776 | 0 | case '8': // 1 string to match. |
777 | 0 | if (memcmp(Name.data()+2, ":9", 2) != 0) |
778 | 0 | break; |
779 | 0 | return 322; // "v8:9" |
780 | 0 | case '9': // 1 string to match. |
781 | 0 | if (memcmp(Name.data()+2, ":8", 2) != 0) |
782 | 0 | break; |
783 | 0 | return 306; // "v9:8" |
784 | 0 | case 't': // 1 string to match. |
785 | 0 | if (memcmp(Name.data()+2, "mp", 2) != 0) |
786 | 0 | break; |
787 | 0 | return 46; // "vtmp" |
788 | 0 | } |
789 | 0 | break; |
790 | 0 | } |
791 | 0 | break; |
792 | 0 | case 5: // 3 strings to match. |
793 | 0 | switch (Name[0]) { |
794 | 0 | default: break; |
795 | 0 | case 'b': // 1 string to match. |
796 | 0 | if (memcmp(Name.data()+1, "adva", 4) != 0) |
797 | 0 | break; |
798 | 0 | return 1; // "badva" |
799 | 0 | case 'i': // 1 string to match. |
800 | 0 | if (memcmp(Name.data()+1, "mask", 4) != 0) |
801 | 0 | break; |
802 | 0 | return 17; // "imask" |
803 | 0 | case 'v': // 1 string to match. |
804 | 0 | if (memcmp(Name.data()+1, "11:8", 4) != 0) |
805 | 0 | break; |
806 | 0 | return 296; // "v11:8" |
807 | 0 | } |
808 | 0 | break; |
809 | 0 | case 6: // 97 strings to match. |
810 | 0 | switch (Name[0]) { |
811 | 0 | default: break; |
812 | 0 | case 'b': // 2 strings to match. |
813 | 0 | if (memcmp(Name.data()+1, "adva", 4) != 0) |
814 | 0 | break; |
815 | 0 | switch (Name[5]) { |
816 | 0 | default: break; |
817 | 0 | case '0': // 1 string to match. |
818 | 0 | return 47; // "badva0" |
819 | 0 | case '1': // 1 string to match. |
820 | 0 | return 48; // "badva1" |
821 | 0 | } |
822 | 0 | break; |
823 | 0 | case 'c': // 6 strings to match. |
824 | 0 | switch (Name[1]) { |
825 | 0 | default: break; |
826 | 0 | case '1': // 5 strings to match. |
827 | 0 | switch (Name[2]) { |
828 | 0 | default: break; |
829 | 0 | case '1': // 1 string to match. |
830 | 0 | if (memcmp(Name.data()+3, ":10", 3) != 0) |
831 | 0 | break; |
832 | 0 | return 339; // "c11:10" |
833 | 0 | case '3': // 1 string to match. |
834 | 0 | if (memcmp(Name.data()+3, ":12", 3) != 0) |
835 | 0 | break; |
836 | 0 | return 4; // "c13:12" |
837 | 0 | case '5': // 1 string to match. |
838 | 0 | if (memcmp(Name.data()+3, ":14", 3) != 0) |
839 | 0 | break; |
840 | 0 | return 37; // "c15:14" |
841 | 0 | case '7': // 1 string to match. |
842 | 0 | if (memcmp(Name.data()+3, ":16", 3) != 0) |
843 | 0 | break; |
844 | 0 | return 340; // "c17:16" |
845 | 0 | case '9': // 1 string to match. |
846 | 0 | if (memcmp(Name.data()+3, ":18", 3) != 0) |
847 | 0 | break; |
848 | 0 | return 27; // "c19:18" |
849 | 0 | } |
850 | 0 | break; |
851 | 0 | case '3': // 1 string to match. |
852 | 0 | if (memcmp(Name.data()+2, "1:30", 4) != 0) |
853 | 0 | break; |
854 | 0 | return 42; // "c31:30" |
855 | 0 | } |
856 | 0 | break; |
857 | 0 | case 'g': // 12 strings to match. |
858 | 0 | switch (Name[1]) { |
859 | 0 | default: break; |
860 | 0 | case '1': // 5 strings to match. |
861 | 0 | switch (Name[2]) { |
862 | 0 | default: break; |
863 | 0 | case '1': // 1 string to match. |
864 | 0 | if (memcmp(Name.data()+3, ":10", 3) != 0) |
865 | 0 | break; |
866 | 0 | return 346; // "g11:10" |
867 | 0 | case '3': // 1 string to match. |
868 | 0 | if (memcmp(Name.data()+3, ":12", 3) != 0) |
869 | 0 | break; |
870 | 0 | return 347; // "g13:12" |
871 | 0 | case '5': // 1 string to match. |
872 | 0 | if (memcmp(Name.data()+3, ":14", 3) != 0) |
873 | 0 | break; |
874 | 0 | return 348; // "g15:14" |
875 | 0 | case '7': // 1 string to match. |
876 | 0 | if (memcmp(Name.data()+3, ":16", 3) != 0) |
877 | 0 | break; |
878 | 0 | return 349; // "g17:16" |
879 | 0 | case '9': // 1 string to match. |
880 | 0 | if (memcmp(Name.data()+3, ":18", 3) != 0) |
881 | 0 | break; |
882 | 0 | return 350; // "g19:18" |
883 | 0 | } |
884 | 0 | break; |
885 | 0 | case '2': // 5 strings to match. |
886 | 0 | switch (Name[2]) { |
887 | 0 | default: break; |
888 | 0 | case '1': // 1 string to match. |
889 | 0 | if (memcmp(Name.data()+3, ":20", 3) != 0) |
890 | 0 | break; |
891 | 0 | return 351; // "g21:20" |
892 | 0 | case '3': // 1 string to match. |
893 | 0 | if (memcmp(Name.data()+3, ":22", 3) != 0) |
894 | 0 | break; |
895 | 0 | return 352; // "g23:22" |
896 | 0 | case '5': // 1 string to match. |
897 | 0 | if (memcmp(Name.data()+3, ":24", 3) != 0) |
898 | 0 | break; |
899 | 0 | return 353; // "g25:24" |
900 | 0 | case '7': // 1 string to match. |
901 | 0 | if (memcmp(Name.data()+3, ":26", 3) != 0) |
902 | 0 | break; |
903 | 0 | return 354; // "g27:26" |
904 | 0 | case '9': // 1 string to match. |
905 | 0 | if (memcmp(Name.data()+3, ":28", 3) != 0) |
906 | 0 | break; |
907 | 0 | return 355; // "g29:28" |
908 | 0 | } |
909 | 0 | break; |
910 | 0 | case '3': // 1 string to match. |
911 | 0 | if (memcmp(Name.data()+2, "1:30", 4) != 0) |
912 | 0 | break; |
913 | 0 | return 356; // "g31:30" |
914 | 0 | case 'b': // 1 string to match. |
915 | 0 | if (memcmp(Name.data()+2, "adva", 4) != 0) |
916 | 0 | break; |
917 | 0 | return 73; // "gbadva" |
918 | 0 | } |
919 | 0 | break; |
920 | 0 | case 'i': // 2 strings to match. |
921 | 0 | if (memcmp(Name.data()+1, "sdb", 3) != 0) |
922 | 0 | break; |
923 | 0 | switch (Name[4]) { |
924 | 0 | default: break; |
925 | 0 | case 'e': // 1 string to match. |
926 | 0 | if (Name[5] != 'n') |
927 | 0 | break; |
928 | 0 | return 18; // "isdben" |
929 | 0 | case 's': // 1 string to match. |
930 | 0 | if (Name[5] != 't') |
931 | 0 | break; |
932 | 0 | return 22; // "isdbst" |
933 | 0 | } |
934 | 0 | break; |
935 | 0 | case 'p': // 1 string to match. |
936 | 0 | if (memcmp(Name.data()+1, "mucfg", 5) != 0) |
937 | 0 | break; |
938 | 0 | return 30; // "pmucfg" |
939 | 0 | case 'r': // 11 strings to match. |
940 | 0 | switch (Name[1]) { |
941 | 0 | default: break; |
942 | 0 | case '1': // 5 strings to match. |
943 | 0 | switch (Name[2]) { |
944 | 0 | default: break; |
945 | 0 | case '1': // 1 string to match. |
946 | 0 | if (memcmp(Name.data()+3, ":10", 3) != 0) |
947 | 0 | break; |
948 | 0 | return 62; // "r11:10" |
949 | 0 | case '3': // 1 string to match. |
950 | 0 | if (memcmp(Name.data()+3, ":12", 3) != 0) |
951 | 0 | break; |
952 | 0 | return 63; // "r13:12" |
953 | 0 | case '5': // 1 string to match. |
954 | 0 | if (memcmp(Name.data()+3, ":14", 3) != 0) |
955 | 0 | break; |
956 | 0 | return 64; // "r15:14" |
957 | 0 | case '7': // 1 string to match. |
958 | 0 | if (memcmp(Name.data()+3, ":16", 3) != 0) |
959 | 0 | break; |
960 | 0 | return 65; // "r17:16" |
961 | 0 | case '9': // 1 string to match. |
962 | 0 | if (memcmp(Name.data()+3, ":18", 3) != 0) |
963 | 0 | break; |
964 | 0 | return 66; // "r19:18" |
965 | 0 | } |
966 | 0 | break; |
967 | 0 | case '2': // 5 strings to match. |
968 | 0 | switch (Name[2]) { |
969 | 0 | default: break; |
970 | 0 | case '1': // 1 string to match. |
971 | 0 | if (memcmp(Name.data()+3, ":20", 3) != 0) |
972 | 0 | break; |
973 | 0 | return 67; // "r21:20" |
974 | 0 | case '3': // 1 string to match. |
975 | 0 | if (memcmp(Name.data()+3, ":22", 3) != 0) |
976 | 0 | break; |
977 | 0 | return 68; // "r23:22" |
978 | 0 | case '5': // 1 string to match. |
979 | 0 | if (memcmp(Name.data()+3, ":24", 3) != 0) |
980 | 0 | break; |
981 | 0 | return 69; // "r25:24" |
982 | 0 | case '7': // 1 string to match. |
983 | 0 | if (memcmp(Name.data()+3, ":26", 3) != 0) |
984 | 0 | break; |
985 | 0 | return 70; // "r27:26" |
986 | 0 | case '9': // 1 string to match. |
987 | 0 | if (memcmp(Name.data()+3, ":28", 3) != 0) |
988 | 0 | break; |
989 | 0 | return 71; // "r29:28" |
990 | 0 | } |
991 | 0 | break; |
992 | 0 | case '3': // 1 string to match. |
993 | 0 | if (memcmp(Name.data()+2, "1:30", 4) != 0) |
994 | 0 | break; |
995 | 0 | return 72; // "r31:30" |
996 | 0 | } |
997 | 0 | break; |
998 | 0 | case 's': // 36 strings to match. |
999 | 0 | switch (Name[1]) { |
1000 | 0 | default: break; |
1001 | 0 | case '1': // 5 strings to match. |
1002 | 0 | switch (Name[2]) { |
1003 | 0 | default: break; |
1004 | 0 | case '1': // 1 string to match. |
1005 | 0 | if (memcmp(Name.data()+3, ":10", 3) != 0) |
1006 | 0 | break; |
1007 | 0 | return 362; // "s11:10" |
1008 | 0 | case '3': // 1 string to match. |
1009 | 0 | if (memcmp(Name.data()+3, ":12", 3) != 0) |
1010 | 0 | break; |
1011 | 0 | return 363; // "s13:12" |
1012 | 0 | case '5': // 1 string to match. |
1013 | 0 | if (memcmp(Name.data()+3, ":14", 3) != 0) |
1014 | 0 | break; |
1015 | 0 | return 364; // "s15:14" |
1016 | 0 | case '7': // 1 string to match. |
1017 | 0 | if (memcmp(Name.data()+3, ":16", 3) != 0) |
1018 | 0 | break; |
1019 | 0 | return 365; // "s17:16" |
1020 | 0 | case '9': // 1 string to match. |
1021 | 0 | if (memcmp(Name.data()+3, ":18", 3) != 0) |
1022 | 0 | break; |
1023 | 0 | return 366; // "s19:18" |
1024 | 0 | } |
1025 | 0 | break; |
1026 | 0 | case '2': // 5 strings to match. |
1027 | 0 | switch (Name[2]) { |
1028 | 0 | default: break; |
1029 | 0 | case '1': // 1 string to match. |
1030 | 0 | if (memcmp(Name.data()+3, ":20", 3) != 0) |
1031 | 0 | break; |
1032 | 0 | return 367; // "s21:20" |
1033 | 0 | case '3': // 1 string to match. |
1034 | 0 | if (memcmp(Name.data()+3, ":22", 3) != 0) |
1035 | 0 | break; |
1036 | 0 | return 368; // "s23:22" |
1037 | 0 | case '5': // 1 string to match. |
1038 | 0 | if (memcmp(Name.data()+3, ":24", 3) != 0) |
1039 | 0 | break; |
1040 | 0 | return 369; // "s25:24" |
1041 | 0 | case '7': // 1 string to match. |
1042 | 0 | if (memcmp(Name.data()+3, ":26", 3) != 0) |
1043 | 0 | break; |
1044 | 0 | return 370; // "s27:26" |
1045 | 0 | case '9': // 1 string to match. |
1046 | 0 | if (memcmp(Name.data()+3, ":28", 3) != 0) |
1047 | 0 | break; |
1048 | 0 | return 371; // "s29:28" |
1049 | 0 | } |
1050 | 0 | break; |
1051 | 0 | case '3': // 5 strings to match. |
1052 | 0 | switch (Name[2]) { |
1053 | 0 | default: break; |
1054 | 0 | case '1': // 1 string to match. |
1055 | 0 | if (memcmp(Name.data()+3, ":30", 3) != 0) |
1056 | 0 | break; |
1057 | 0 | return 372; // "s31:30" |
1058 | 0 | case '3': // 1 string to match. |
1059 | 0 | if (memcmp(Name.data()+3, ":32", 3) != 0) |
1060 | 0 | break; |
1061 | 0 | return 373; // "s33:32" |
1062 | 0 | case '5': // 1 string to match. |
1063 | 0 | if (memcmp(Name.data()+3, ":34", 3) != 0) |
1064 | 0 | break; |
1065 | 0 | return 374; // "s35:34" |
1066 | 0 | case '7': // 1 string to match. |
1067 | 0 | if (memcmp(Name.data()+3, ":36", 3) != 0) |
1068 | 0 | break; |
1069 | 0 | return 375; // "s37:36" |
1070 | 0 | case '9': // 1 string to match. |
1071 | 0 | if (memcmp(Name.data()+3, ":38", 3) != 0) |
1072 | 0 | break; |
1073 | 0 | return 376; // "s39:38" |
1074 | 0 | } |
1075 | 0 | break; |
1076 | 0 | case '4': // 5 strings to match. |
1077 | 0 | switch (Name[2]) { |
1078 | 0 | default: break; |
1079 | 0 | case '1': // 1 string to match. |
1080 | 0 | if (memcmp(Name.data()+3, ":40", 3) != 0) |
1081 | 0 | break; |
1082 | 0 | return 377; // "s41:40" |
1083 | 0 | case '3': // 1 string to match. |
1084 | 0 | if (memcmp(Name.data()+3, ":42", 3) != 0) |
1085 | 0 | break; |
1086 | 0 | return 378; // "s43:42" |
1087 | 0 | case '5': // 1 string to match. |
1088 | 0 | if (memcmp(Name.data()+3, ":44", 3) != 0) |
1089 | 0 | break; |
1090 | 0 | return 379; // "s45:44" |
1091 | 0 | case '7': // 1 string to match. |
1092 | 0 | if (memcmp(Name.data()+3, ":46", 3) != 0) |
1093 | 0 | break; |
1094 | 0 | return 380; // "s47:46" |
1095 | 0 | case '9': // 1 string to match. |
1096 | 0 | if (memcmp(Name.data()+3, ":48", 3) != 0) |
1097 | 0 | break; |
1098 | 0 | return 381; // "s49:48" |
1099 | 0 | } |
1100 | 0 | break; |
1101 | 0 | case '5': // 5 strings to match. |
1102 | 0 | switch (Name[2]) { |
1103 | 0 | default: break; |
1104 | 0 | case '1': // 1 string to match. |
1105 | 0 | if (memcmp(Name.data()+3, ":50", 3) != 0) |
1106 | 0 | break; |
1107 | 0 | return 382; // "s51:50" |
1108 | 0 | case '3': // 1 string to match. |
1109 | 0 | if (memcmp(Name.data()+3, ":52", 3) != 0) |
1110 | 0 | break; |
1111 | 0 | return 383; // "s53:52" |
1112 | 0 | case '5': // 1 string to match. |
1113 | 0 | if (memcmp(Name.data()+3, ":54", 3) != 0) |
1114 | 0 | break; |
1115 | 0 | return 384; // "s55:54" |
1116 | 0 | case '7': // 1 string to match. |
1117 | 0 | if (memcmp(Name.data()+3, ":56", 3) != 0) |
1118 | 0 | break; |
1119 | 0 | return 385; // "s57:56" |
1120 | 0 | case '9': // 1 string to match. |
1121 | 0 | if (memcmp(Name.data()+3, ":58", 3) != 0) |
1122 | 0 | break; |
1123 | 0 | return 386; // "s59:58" |
1124 | 0 | } |
1125 | 0 | break; |
1126 | 0 | case '6': // 5 strings to match. |
1127 | 0 | switch (Name[2]) { |
1128 | 0 | default: break; |
1129 | 0 | case '1': // 1 string to match. |
1130 | 0 | if (memcmp(Name.data()+3, ":60", 3) != 0) |
1131 | 0 | break; |
1132 | 0 | return 387; // "s61:60" |
1133 | 0 | case '3': // 1 string to match. |
1134 | 0 | if (memcmp(Name.data()+3, ":62", 3) != 0) |
1135 | 0 | break; |
1136 | 0 | return 388; // "s63:62" |
1137 | 0 | case '5': // 1 string to match. |
1138 | 0 | if (memcmp(Name.data()+3, ":64", 3) != 0) |
1139 | 0 | break; |
1140 | 0 | return 389; // "s65:64" |
1141 | 0 | case '7': // 1 string to match. |
1142 | 0 | if (memcmp(Name.data()+3, ":66", 3) != 0) |
1143 | 0 | break; |
1144 | 0 | return 390; // "s67:66" |
1145 | 0 | case '9': // 1 string to match. |
1146 | 0 | if (memcmp(Name.data()+3, ":68", 3) != 0) |
1147 | 0 | break; |
1148 | 0 | return 391; // "s69:68" |
1149 | 0 | } |
1150 | 0 | break; |
1151 | 0 | case '7': // 5 strings to match. |
1152 | 0 | switch (Name[2]) { |
1153 | 0 | default: break; |
1154 | 0 | case '1': // 1 string to match. |
1155 | 0 | if (memcmp(Name.data()+3, ":70", 3) != 0) |
1156 | 0 | break; |
1157 | 0 | return 392; // "s71:70" |
1158 | 0 | case '3': // 1 string to match. |
1159 | 0 | if (memcmp(Name.data()+3, ":72", 3) != 0) |
1160 | 0 | break; |
1161 | 0 | return 393; // "s73:72" |
1162 | 0 | case '5': // 1 string to match. |
1163 | 0 | if (memcmp(Name.data()+3, ":74", 3) != 0) |
1164 | 0 | break; |
1165 | 0 | return 394; // "s75:74" |
1166 | 0 | case '7': // 1 string to match. |
1167 | 0 | if (memcmp(Name.data()+3, ":76", 3) != 0) |
1168 | 0 | break; |
1169 | 0 | return 395; // "s77:76" |
1170 | 0 | case '9': // 1 string to match. |
1171 | 0 | if (memcmp(Name.data()+3, ":78", 3) != 0) |
1172 | 0 | break; |
1173 | 0 | return 396; // "s79:78" |
1174 | 0 | } |
1175 | 0 | break; |
1176 | 0 | case 'y': // 1 string to match. |
1177 | 0 | if (memcmp(Name.data()+2, "scfg", 4) != 0) |
1178 | 0 | break; |
1179 | 0 | return 35; // "syscfg" |
1180 | 0 | } |
1181 | 0 | break; |
1182 | 0 | case 'v': // 27 strings to match. |
1183 | 0 | switch (Name[1]) { |
1184 | 0 | default: break; |
1185 | 0 | case '1': // 12 strings to match. |
1186 | 0 | switch (Name[2]) { |
1187 | 0 | default: break; |
1188 | 0 | case '0': // 1 string to match. |
1189 | 0 | if (memcmp(Name.data()+3, ":11", 3) != 0) |
1190 | 0 | break; |
1191 | 0 | return 323; // "v10:11" |
1192 | 0 | case '1': // 1 string to match. |
1193 | 0 | if (memcmp(Name.data()+3, ":10", 3) != 0) |
1194 | 0 | break; |
1195 | 0 | return 307; // "v11:10" |
1196 | 0 | case '2': // 1 string to match. |
1197 | 0 | if (memcmp(Name.data()+3, ":13", 3) != 0) |
1198 | 0 | break; |
1199 | 0 | return 324; // "v12:13" |
1200 | 0 | case '3': // 1 string to match. |
1201 | 0 | if (memcmp(Name.data()+3, ":12", 3) != 0) |
1202 | 0 | break; |
1203 | 0 | return 308; // "v13:12" |
1204 | 0 | case '4': // 1 string to match. |
1205 | 0 | if (memcmp(Name.data()+3, ":15", 3) != 0) |
1206 | 0 | break; |
1207 | 0 | return 325; // "v14:15" |
1208 | 0 | case '5': // 2 strings to match. |
1209 | 0 | if (memcmp(Name.data()+3, ":1", 2) != 0) |
1210 | 0 | break; |
1211 | 0 | switch (Name[5]) { |
1212 | 0 | default: break; |
1213 | 0 | case '2': // 1 string to match. |
1214 | 0 | return 297; // "v15:12" |
1215 | 0 | case '4': // 1 string to match. |
1216 | 0 | return 309; // "v15:14" |
1217 | 0 | } |
1218 | 0 | break; |
1219 | 0 | case '6': // 1 string to match. |
1220 | 0 | if (memcmp(Name.data()+3, ":17", 3) != 0) |
1221 | 0 | break; |
1222 | 0 | return 326; // "v16:17" |
1223 | 0 | case '7': // 1 string to match. |
1224 | 0 | if (memcmp(Name.data()+3, ":16", 3) != 0) |
1225 | 0 | break; |
1226 | 0 | return 310; // "v17:16" |
1227 | 0 | case '8': // 1 string to match. |
1228 | 0 | if (memcmp(Name.data()+3, ":19", 3) != 0) |
1229 | 0 | break; |
1230 | 0 | return 327; // "v18:19" |
1231 | 0 | case '9': // 2 strings to match. |
1232 | 0 | if (memcmp(Name.data()+3, ":1", 2) != 0) |
1233 | 0 | break; |
1234 | 0 | switch (Name[5]) { |
1235 | 0 | default: break; |
1236 | 0 | case '6': // 1 string to match. |
1237 | 0 | return 298; // "v19:16" |
1238 | 0 | case '8': // 1 string to match. |
1239 | 0 | return 311; // "v19:18" |
1240 | 0 | } |
1241 | 0 | break; |
1242 | 0 | } |
1243 | 0 | break; |
1244 | 0 | case '2': // 12 strings to match. |
1245 | 0 | switch (Name[2]) { |
1246 | 0 | default: break; |
1247 | 0 | case '0': // 1 string to match. |
1248 | 0 | if (memcmp(Name.data()+3, ":21", 3) != 0) |
1249 | 0 | break; |
1250 | 0 | return 328; // "v20:21" |
1251 | 0 | case '1': // 1 string to match. |
1252 | 0 | if (memcmp(Name.data()+3, ":20", 3) != 0) |
1253 | 0 | break; |
1254 | 0 | return 312; // "v21:20" |
1255 | 0 | case '2': // 1 string to match. |
1256 | 0 | if (memcmp(Name.data()+3, ":23", 3) != 0) |
1257 | 0 | break; |
1258 | 0 | return 329; // "v22:23" |
1259 | 0 | case '3': // 2 strings to match. |
1260 | 0 | if (memcmp(Name.data()+3, ":2", 2) != 0) |
1261 | 0 | break; |
1262 | 0 | switch (Name[5]) { |
1263 | 0 | default: break; |
1264 | 0 | case '0': // 1 string to match. |
1265 | 0 | return 299; // "v23:20" |
1266 | 0 | case '2': // 1 string to match. |
1267 | 0 | return 313; // "v23:22" |
1268 | 0 | } |
1269 | 0 | break; |
1270 | 0 | case '4': // 1 string to match. |
1271 | 0 | if (memcmp(Name.data()+3, ":25", 3) != 0) |
1272 | 0 | break; |
1273 | 0 | return 330; // "v24:25" |
1274 | 0 | case '5': // 1 string to match. |
1275 | 0 | if (memcmp(Name.data()+3, ":24", 3) != 0) |
1276 | 0 | break; |
1277 | 0 | return 314; // "v25:24" |
1278 | 0 | case '6': // 1 string to match. |
1279 | 0 | if (memcmp(Name.data()+3, ":27", 3) != 0) |
1280 | 0 | break; |
1281 | 0 | return 331; // "v26:27" |
1282 | 0 | case '7': // 2 strings to match. |
1283 | 0 | if (memcmp(Name.data()+3, ":2", 2) != 0) |
1284 | 0 | break; |
1285 | 0 | switch (Name[5]) { |
1286 | 0 | default: break; |
1287 | 0 | case '4': // 1 string to match. |
1288 | 0 | return 300; // "v27:24" |
1289 | 0 | case '6': // 1 string to match. |
1290 | 0 | return 315; // "v27:26" |
1291 | 0 | } |
1292 | 0 | break; |
1293 | 0 | case '8': // 1 string to match. |
1294 | 0 | if (memcmp(Name.data()+3, ":29", 3) != 0) |
1295 | 0 | break; |
1296 | 0 | return 332; // "v28:29" |
1297 | 0 | case '9': // 1 string to match. |
1298 | 0 | if (memcmp(Name.data()+3, ":28", 3) != 0) |
1299 | 0 | break; |
1300 | 0 | return 316; // "v29:28" |
1301 | 0 | } |
1302 | 0 | break; |
1303 | 0 | case '3': // 3 strings to match. |
1304 | 0 | switch (Name[2]) { |
1305 | 0 | default: break; |
1306 | 0 | case '0': // 1 string to match. |
1307 | 0 | if (memcmp(Name.data()+3, ":31", 3) != 0) |
1308 | 0 | break; |
1309 | 0 | return 333; // "v30:31" |
1310 | 0 | case '1': // 2 strings to match. |
1311 | 0 | if (Name[3] != ':') |
1312 | 0 | break; |
1313 | 0 | switch (Name[4]) { |
1314 | 0 | default: break; |
1315 | 0 | case '2': // 1 string to match. |
1316 | 0 | if (Name[5] != '8') |
1317 | 0 | break; |
1318 | 0 | return 301; // "v31:28" |
1319 | 0 | case '3': // 1 string to match. |
1320 | 0 | if (Name[5] != '0') |
1321 | 0 | break; |
1322 | 0 | return 317; // "v31:30" |
1323 | 0 | } |
1324 | 0 | break; |
1325 | 0 | } |
1326 | 0 | break; |
1327 | 0 | } |
1328 | 0 | break; |
1329 | 0 | } |
1330 | 0 | break; |
1331 | 0 | case 7: // 8 strings to match. |
1332 | 0 | switch (Name[0]) { |
1333 | 0 | default: break; |
1334 | 0 | case 'c': // 1 string to match. |
1335 | 0 | if (memcmp(Name.data()+1, "fgbase", 6) != 0) |
1336 | 0 | break; |
1337 | 0 | return 3; // "cfgbase" |
1338 | 0 | case 'i': // 1 string to match. |
1339 | 0 | if (memcmp(Name.data()+1, "sdbgpr", 6) != 0) |
1340 | 0 | break; |
1341 | 0 | return 19; // "isdbgpr" |
1342 | 0 | case 'm': // 1 string to match. |
1343 | 0 | if (memcmp(Name.data()+1, "odectl", 6) != 0) |
1344 | 0 | break; |
1345 | 0 | return 23; // "modectl" |
1346 | 0 | case 'p': // 4 strings to match. |
1347 | 0 | if (memcmp(Name.data()+1, "mucnt", 5) != 0) |
1348 | 0 | break; |
1349 | 0 | switch (Name[6]) { |
1350 | 0 | default: break; |
1351 | 0 | case '0': // 1 string to match. |
1352 | 0 | return 110; // "pmucnt0" |
1353 | 0 | case '1': // 1 string to match. |
1354 | 0 | return 111; // "pmucnt1" |
1355 | 0 | case '2': // 1 string to match. |
1356 | 0 | return 112; // "pmucnt2" |
1357 | 0 | case '3': // 1 string to match. |
1358 | 0 | return 113; // "pmucnt3" |
1359 | 0 | } |
1360 | 0 | break; |
1361 | 0 | case 'u': // 1 string to match. |
1362 | 0 | if (memcmp(Name.data()+1, "sr.ovf", 6) != 0) |
1363 | 0 | break; |
1364 | 0 | return 41; // "usr.ovf" |
1365 | 0 | } |
1366 | 0 | break; |
1367 | 0 | case 8: // 18 strings to match. |
1368 | 0 | switch (Name[0]) { |
1369 | 0 | default: break; |
1370 | 0 | case '_': // 1 string to match. |
1371 | 0 | if (memcmp(Name.data()+1, "_999999", 7) != 0) |
1372 | 0 | break; |
1373 | 0 | return 230; // "__999999" |
1374 | 0 | case 'b': // 2 strings to match. |
1375 | 0 | if (memcmp(Name.data()+1, "rkptpc", 6) != 0) |
1376 | 0 | break; |
1377 | 0 | switch (Name[7]) { |
1378 | 0 | default: break; |
1379 | 0 | case '0': // 1 string to match. |
1380 | 0 | return 51; // "brkptpc0" |
1381 | 0 | case '1': // 1 string to match. |
1382 | 0 | return 52; // "brkptpc1" |
1383 | 0 | } |
1384 | 0 | break; |
1385 | 0 | case 'f': // 1 string to match. |
1386 | 0 | if (memcmp(Name.data()+1, "ramekey", 7) != 0) |
1387 | 0 | break; |
1388 | 0 | return 8; // "framekey" |
1389 | 0 | case 'g': // 8 strings to match. |
1390 | 0 | if (memcmp(Name.data()+1, "pmucnt", 6) != 0) |
1391 | 0 | break; |
1392 | 0 | switch (Name[7]) { |
1393 | 0 | default: break; |
1394 | 0 | case '0': // 1 string to match. |
1395 | 0 | return 92; // "gpmucnt0" |
1396 | 0 | case '1': // 1 string to match. |
1397 | 0 | return 93; // "gpmucnt1" |
1398 | 0 | case '2': // 1 string to match. |
1399 | 0 | return 94; // "gpmucnt2" |
1400 | 0 | case '3': // 1 string to match. |
1401 | 0 | return 95; // "gpmucnt3" |
1402 | 0 | case '4': // 1 string to match. |
1403 | 0 | return 96; // "gpmucnt4" |
1404 | 0 | case '5': // 1 string to match. |
1405 | 0 | return 97; // "gpmucnt5" |
1406 | 0 | case '6': // 1 string to match. |
1407 | 0 | return 98; // "gpmucnt6" |
1408 | 0 | case '7': // 1 string to match. |
1409 | 0 | return 99; // "gpmucnt7" |
1410 | 0 | } |
1411 | 0 | break; |
1412 | 0 | case 'i': // 2 strings to match. |
1413 | 0 | if (memcmp(Name.data()+1, "sdbcfg", 6) != 0) |
1414 | 0 | break; |
1415 | 0 | switch (Name[7]) { |
1416 | 0 | default: break; |
1417 | 0 | case '0': // 1 string to match. |
1418 | 0 | return 100; // "isdbcfg0" |
1419 | 0 | case '1': // 1 string to match. |
1420 | 0 | return 101; // "isdbcfg1" |
1421 | 0 | } |
1422 | 0 | break; |
1423 | 0 | case 'p': // 2 strings to match. |
1424 | 0 | if (memcmp(Name.data()+1, "cycle", 5) != 0) |
1425 | 0 | break; |
1426 | 0 | switch (Name[6]) { |
1427 | 0 | default: break; |
1428 | 0 | case 'h': // 1 string to match. |
1429 | 0 | if (Name[7] != 'i') |
1430 | 0 | break; |
1431 | 0 | return 25; // "pcyclehi" |
1432 | 0 | case 'l': // 1 string to match. |
1433 | 0 | if (Name[7] != 'o') |
1434 | 0 | break; |
1435 | 0 | return 26; // "pcyclelo" |
1436 | 0 | } |
1437 | 0 | break; |
1438 | 0 | case 'u': // 2 strings to match. |
1439 | 0 | if (memcmp(Name.data()+1, "timer", 5) != 0) |
1440 | 0 | break; |
1441 | 0 | switch (Name[6]) { |
1442 | 0 | default: break; |
1443 | 0 | case 'h': // 1 string to match. |
1444 | 0 | if (Name[7] != 'i') |
1445 | 0 | break; |
1446 | 0 | return 43; // "utimerhi" |
1447 | 0 | case 'l': // 1 string to match. |
1448 | 0 | if (Name[7] != 'o') |
1449 | 0 | break; |
1450 | 0 | return 44; // "utimerlo" |
1451 | 0 | } |
1452 | 0 | break; |
1453 | 0 | } |
1454 | 0 | break; |
1455 | 0 | case 9: // 40 strings to match. |
1456 | 0 | switch (Name[0]) { |
1457 | 0 | default: break; |
1458 | 0 | case '_': // 32 strings to match. |
1459 | 0 | if (Name[1] != '_') |
1460 | 0 | break; |
1461 | 0 | switch (Name[2]) { |
1462 | 0 | default: break; |
1463 | 0 | case '1': // 31 strings to match. |
1464 | 0 | if (memcmp(Name.data()+3, "0000", 4) != 0) |
1465 | 0 | break; |
1466 | 0 | switch (Name[7]) { |
1467 | 0 | default: break; |
1468 | 0 | case '0': // 10 strings to match. |
1469 | 0 | switch (Name[8]) { |
1470 | 0 | default: break; |
1471 | 0 | case '0': // 1 string to match. |
1472 | 0 | return 231; // "__1000000" |
1473 | 0 | case '1': // 1 string to match. |
1474 | 0 | return 232; // "__1000001" |
1475 | 0 | case '2': // 1 string to match. |
1476 | 0 | return 233; // "__1000002" |
1477 | 0 | case '3': // 1 string to match. |
1478 | 0 | return 234; // "__1000003" |
1479 | 0 | case '4': // 1 string to match. |
1480 | 0 | return 235; // "__1000004" |
1481 | 0 | case '5': // 1 string to match. |
1482 | 0 | return 236; // "__1000005" |
1483 | 0 | case '6': // 1 string to match. |
1484 | 0 | return 237; // "__1000006" |
1485 | 0 | case '7': // 1 string to match. |
1486 | 0 | return 238; // "__1000007" |
1487 | 0 | case '8': // 1 string to match. |
1488 | 0 | return 239; // "__1000008" |
1489 | 0 | case '9': // 1 string to match. |
1490 | 0 | return 240; // "__1000009" |
1491 | 0 | } |
1492 | 0 | break; |
1493 | 0 | case '1': // 10 strings to match. |
1494 | 0 | switch (Name[8]) { |
1495 | 0 | default: break; |
1496 | 0 | case '0': // 1 string to match. |
1497 | 0 | return 241; // "__1000010" |
1498 | 0 | case '1': // 1 string to match. |
1499 | 0 | return 242; // "__1000011" |
1500 | 0 | case '2': // 1 string to match. |
1501 | 0 | return 243; // "__1000012" |
1502 | 0 | case '3': // 1 string to match. |
1503 | 0 | return 244; // "__1000013" |
1504 | 0 | case '4': // 1 string to match. |
1505 | 0 | return 245; // "__1000014" |
1506 | 0 | case '5': // 1 string to match. |
1507 | 0 | return 246; // "__1000015" |
1508 | 0 | case '6': // 1 string to match. |
1509 | 0 | return 247; // "__1000016" |
1510 | 0 | case '7': // 1 string to match. |
1511 | 0 | return 248; // "__1000017" |
1512 | 0 | case '8': // 1 string to match. |
1513 | 0 | return 249; // "__1000018" |
1514 | 0 | case '9': // 1 string to match. |
1515 | 0 | return 250; // "__1000019" |
1516 | 0 | } |
1517 | 0 | break; |
1518 | 0 | case '2': // 10 strings to match. |
1519 | 0 | switch (Name[8]) { |
1520 | 0 | default: break; |
1521 | 0 | case '0': // 1 string to match. |
1522 | 0 | return 251; // "__1000020" |
1523 | 0 | case '1': // 1 string to match. |
1524 | 0 | return 252; // "__1000021" |
1525 | 0 | case '2': // 1 string to match. |
1526 | 0 | return 253; // "__1000022" |
1527 | 0 | case '3': // 1 string to match. |
1528 | 0 | return 254; // "__1000023" |
1529 | 0 | case '4': // 1 string to match. |
1530 | 0 | return 255; // "__1000024" |
1531 | 0 | case '5': // 1 string to match. |
1532 | 0 | return 256; // "__1000025" |
1533 | 0 | case '6': // 1 string to match. |
1534 | 0 | return 257; // "__1000026" |
1535 | 0 | case '7': // 1 string to match. |
1536 | 0 | return 258; // "__1000027" |
1537 | 0 | case '8': // 1 string to match. |
1538 | 0 | return 259; // "__1000028" |
1539 | 0 | case '9': // 1 string to match. |
1540 | 0 | return 260; // "__1000029" |
1541 | 0 | } |
1542 | 0 | break; |
1543 | 0 | case '3': // 1 string to match. |
1544 | 0 | if (Name[8] != '0') |
1545 | 0 | break; |
1546 | 0 | return 261; // "__1000030" |
1547 | 0 | } |
1548 | 0 | break; |
1549 | 0 | case '9': // 1 string to match. |
1550 | 0 | if (memcmp(Name.data()+3, "999999", 6) != 0) |
1551 | 0 | break; |
1552 | 0 | return 262; // "__9999999" |
1553 | 0 | } |
1554 | 0 | break; |
1555 | 0 | case 'b': // 2 strings to match. |
1556 | 0 | if (memcmp(Name.data()+1, "rkptcfg", 7) != 0) |
1557 | 0 | break; |
1558 | 0 | switch (Name[8]) { |
1559 | 0 | default: break; |
1560 | 0 | case '0': // 1 string to match. |
1561 | 0 | return 49; // "brkptcfg0" |
1562 | 0 | case '1': // 1 string to match. |
1563 | 0 | return 50; // "brkptcfg1" |
1564 | 0 | } |
1565 | 0 | break; |
1566 | 0 | case 'g': // 2 strings to match. |
1567 | 0 | if (memcmp(Name.data()+1, "pcycle", 6) != 0) |
1568 | 0 | break; |
1569 | 0 | switch (Name[7]) { |
1570 | 0 | default: break; |
1571 | 0 | case 'h': // 1 string to match. |
1572 | 0 | if (Name[8] != 'i') |
1573 | 0 | break; |
1574 | 0 | return 13; // "gpcyclehi" |
1575 | 0 | case 'l': // 1 string to match. |
1576 | 0 | if (Name[8] != 'o') |
1577 | 0 | break; |
1578 | 0 | return 14; // "gpcyclelo" |
1579 | 0 | } |
1580 | 0 | break; |
1581 | 0 | case 'i': // 1 string to match. |
1582 | 0 | if (memcmp(Name.data()+1, "sdbmbxin", 8) != 0) |
1583 | 0 | break; |
1584 | 0 | return 20; // "isdbmbxin" |
1585 | 0 | case 'p': // 1 string to match. |
1586 | 0 | if (memcmp(Name.data()+1, "muevtcfg", 8) != 0) |
1587 | 0 | break; |
1588 | 0 | return 31; // "pmuevtcfg" |
1589 | 0 | case 'u': // 2 strings to match. |
1590 | 0 | if (memcmp(Name.data()+1, "pcycle", 6) != 0) |
1591 | 0 | break; |
1592 | 0 | switch (Name[7]) { |
1593 | 0 | default: break; |
1594 | 0 | case 'h': // 1 string to match. |
1595 | 0 | if (Name[8] != 'i') |
1596 | 0 | break; |
1597 | 0 | return 38; // "upcyclehi" |
1598 | 0 | case 'l': // 1 string to match. |
1599 | 0 | if (Name[8] != 'o') |
1600 | 0 | break; |
1601 | 0 | return 39; // "upcyclelo" |
1602 | 0 | } |
1603 | 0 | break; |
1604 | 0 | } |
1605 | 0 | break; |
1606 | 0 | case 10: // 35 strings to match. |
1607 | 0 | switch (Name[0]) { |
1608 | 0 | default: break; |
1609 | 0 | case '_': // 31 strings to match. |
1610 | 0 | if (memcmp(Name.data()+1, "_100000", 7) != 0) |
1611 | 0 | break; |
1612 | 0 | switch (Name[8]) { |
1613 | 0 | default: break; |
1614 | 0 | case '0': // 10 strings to match. |
1615 | 0 | switch (Name[9]) { |
1616 | 0 | default: break; |
1617 | 0 | case '0': // 1 string to match. |
1618 | 0 | return 263; // "__10000000" |
1619 | 0 | case '1': // 1 string to match. |
1620 | 0 | return 264; // "__10000001" |
1621 | 0 | case '2': // 1 string to match. |
1622 | 0 | return 265; // "__10000002" |
1623 | 0 | case '3': // 1 string to match. |
1624 | 0 | return 266; // "__10000003" |
1625 | 0 | case '4': // 1 string to match. |
1626 | 0 | return 267; // "__10000004" |
1627 | 0 | case '5': // 1 string to match. |
1628 | 0 | return 268; // "__10000005" |
1629 | 0 | case '6': // 1 string to match. |
1630 | 0 | return 269; // "__10000006" |
1631 | 0 | case '7': // 1 string to match. |
1632 | 0 | return 270; // "__10000007" |
1633 | 0 | case '8': // 1 string to match. |
1634 | 0 | return 271; // "__10000008" |
1635 | 0 | case '9': // 1 string to match. |
1636 | 0 | return 272; // "__10000009" |
1637 | 0 | } |
1638 | 0 | break; |
1639 | 0 | case '1': // 10 strings to match. |
1640 | 0 | switch (Name[9]) { |
1641 | 0 | default: break; |
1642 | 0 | case '0': // 1 string to match. |
1643 | 0 | return 273; // "__10000010" |
1644 | 0 | case '1': // 1 string to match. |
1645 | 0 | return 274; // "__10000011" |
1646 | 0 | case '2': // 1 string to match. |
1647 | 0 | return 275; // "__10000012" |
1648 | 0 | case '3': // 1 string to match. |
1649 | 0 | return 276; // "__10000013" |
1650 | 0 | case '4': // 1 string to match. |
1651 | 0 | return 277; // "__10000014" |
1652 | 0 | case '5': // 1 string to match. |
1653 | 0 | return 278; // "__10000015" |
1654 | 0 | case '6': // 1 string to match. |
1655 | 0 | return 279; // "__10000016" |
1656 | 0 | case '7': // 1 string to match. |
1657 | 0 | return 280; // "__10000017" |
1658 | 0 | case '8': // 1 string to match. |
1659 | 0 | return 281; // "__10000018" |
1660 | 0 | case '9': // 1 string to match. |
1661 | 0 | return 282; // "__10000019" |
1662 | 0 | } |
1663 | 0 | break; |
1664 | 0 | case '2': // 10 strings to match. |
1665 | 0 | switch (Name[9]) { |
1666 | 0 | default: break; |
1667 | 0 | case '0': // 1 string to match. |
1668 | 0 | return 283; // "__10000020" |
1669 | 0 | case '1': // 1 string to match. |
1670 | 0 | return 284; // "__10000021" |
1671 | 0 | case '2': // 1 string to match. |
1672 | 0 | return 285; // "__10000022" |
1673 | 0 | case '3': // 1 string to match. |
1674 | 0 | return 286; // "__10000023" |
1675 | 0 | case '4': // 1 string to match. |
1676 | 0 | return 287; // "__10000024" |
1677 | 0 | case '5': // 1 string to match. |
1678 | 0 | return 288; // "__10000025" |
1679 | 0 | case '6': // 1 string to match. |
1680 | 0 | return 289; // "__10000026" |
1681 | 0 | case '7': // 1 string to match. |
1682 | 0 | return 290; // "__10000027" |
1683 | 0 | case '8': // 1 string to match. |
1684 | 0 | return 291; // "__10000028" |
1685 | 0 | case '9': // 1 string to match. |
1686 | 0 | return 292; // "__10000029" |
1687 | 0 | } |
1688 | 0 | break; |
1689 | 0 | case '3': // 1 string to match. |
1690 | 0 | if (Name[9] != '0') |
1691 | 0 | break; |
1692 | 0 | return 293; // "__10000030" |
1693 | 0 | } |
1694 | 0 | break; |
1695 | 0 | case 'f': // 1 string to match. |
1696 | 0 | if (memcmp(Name.data()+1, "ramelimit", 9) != 0) |
1697 | 0 | break; |
1698 | 0 | return 9; // "framelimit" |
1699 | 0 | case 'i': // 1 string to match. |
1700 | 0 | if (memcmp(Name.data()+1, "sdbmbxout", 9) != 0) |
1701 | 0 | break; |
1702 | 0 | return 21; // "isdbmbxout" |
1703 | 0 | case 'p': // 2 strings to match. |
1704 | 0 | if (memcmp(Name.data()+1, "ktcount", 7) != 0) |
1705 | 0 | break; |
1706 | 0 | switch (Name[8]) { |
1707 | 0 | default: break; |
1708 | 0 | case 'h': // 1 string to match. |
1709 | 0 | if (Name[9] != 'i') |
1710 | 0 | break; |
1711 | 0 | return 28; // "pktcounthi" |
1712 | 0 | case 'l': // 1 string to match. |
1713 | 0 | if (Name[9] != 'o') |
1714 | 0 | break; |
1715 | 0 | return 29; // "pktcountlo" |
1716 | 0 | } |
1717 | 0 | break; |
1718 | 0 | } |
1719 | 0 | break; |
1720 | 0 | } |
1721 | 0 | return 0; |
1722 | 0 | } |
1723 | | |
1724 | 0 | static unsigned MatchRegisterAltName(StringRef Name) { |
1725 | 0 | switch (Name.size()) { |
1726 | 0 | default: break; |
1727 | 0 | case 2: // 27 strings to match. |
1728 | 0 | switch (Name[0]) { |
1729 | 0 | default: break; |
1730 | 0 | case 'c': // 10 strings to match. |
1731 | 0 | switch (Name[1]) { |
1732 | 0 | default: break; |
1733 | 0 | case '0': // 1 string to match. |
1734 | 0 | return 194; // "c0" |
1735 | 0 | case '1': // 1 string to match. |
1736 | 0 | return 102; // "c1" |
1737 | 0 | case '2': // 1 string to match. |
1738 | 0 | return 195; // "c2" |
1739 | 0 | case '3': // 1 string to match. |
1740 | 0 | return 103; // "c3" |
1741 | 0 | case '4': // 1 string to match. |
1742 | 0 | return 357; // "c4" |
1743 | 0 | case '5': // 1 string to match. |
1744 | 0 | return 53; // "c5" |
1745 | 0 | case '6': // 1 string to match. |
1746 | 0 | return 104; // "c6" |
1747 | 0 | case '7': // 1 string to match. |
1748 | 0 | return 105; // "c7" |
1749 | 0 | case '8': // 1 string to match. |
1750 | 0 | return 40; // "c8" |
1751 | 0 | case '9': // 1 string to match. |
1752 | 0 | return 24; // "c9" |
1753 | 0 | } |
1754 | 0 | break; |
1755 | 0 | case 'f': // 1 string to match. |
1756 | 0 | if (Name[1] != 'p') |
1757 | 0 | break; |
1758 | 0 | return 148; // "fp" |
1759 | 0 | case 'g': // 4 strings to match. |
1760 | 0 | switch (Name[1]) { |
1761 | 0 | default: break; |
1762 | 0 | case '0': // 1 string to match. |
1763 | 0 | return 10; // "g0" |
1764 | 0 | case '1': // 1 string to match. |
1765 | 0 | return 15; // "g1" |
1766 | 0 | case '2': // 1 string to match. |
1767 | 0 | return 11; // "g2" |
1768 | 0 | case '3': // 1 string to match. |
1769 | 0 | return 73; // "g3" |
1770 | 0 | } |
1771 | 0 | break; |
1772 | 0 | case 'l': // 1 string to match. |
1773 | 0 | if (Name[1] != 'r') |
1774 | 0 | break; |
1775 | 0 | return 149; // "lr" |
1776 | 0 | case 's': // 11 strings to match. |
1777 | 0 | switch (Name[1]) { |
1778 | 0 | default: break; |
1779 | 0 | case '0': // 1 string to match. |
1780 | 0 | return 196; // "s0" |
1781 | 0 | case '1': // 1 string to match. |
1782 | 0 | return 197; // "s1" |
1783 | 0 | case '2': // 1 string to match. |
1784 | 0 | return 34; // "s2" |
1785 | 0 | case '3': // 1 string to match. |
1786 | 0 | return 6; // "s3" |
1787 | 0 | case '4': // 1 string to match. |
1788 | 0 | return 47; // "s4" |
1789 | 0 | case '5': // 1 string to match. |
1790 | 0 | return 48; // "s5" |
1791 | 0 | case '6': // 1 string to match. |
1792 | 0 | return 33; // "s6" |
1793 | 0 | case '7': // 1 string to match. |
1794 | 0 | return 2; // "s7" |
1795 | 0 | case '8': // 1 string to match. |
1796 | 0 | return 16; // "s8" |
1797 | 0 | case '9': // 1 string to match. |
1798 | 0 | return 1; // "s9" |
1799 | 0 | case 'p': // 1 string to match. |
1800 | 0 | return 147; // "sp" |
1801 | 0 | } |
1802 | 0 | break; |
1803 | 0 | } |
1804 | 0 | break; |
1805 | 0 | case 3: // 52 strings to match. |
1806 | 0 | switch (Name[0]) { |
1807 | 0 | default: break; |
1808 | 0 | case 'c': // 12 strings to match. |
1809 | 0 | switch (Name[1]) { |
1810 | 0 | default: break; |
1811 | 0 | case '1': // 10 strings to match. |
1812 | 0 | switch (Name[2]) { |
1813 | 0 | default: break; |
1814 | 0 | case '0': // 1 string to match. |
1815 | 0 | return 36; // "c10" |
1816 | 0 | case '1': // 1 string to match. |
1817 | 0 | return 12; // "c11" |
1818 | 0 | case '2': // 1 string to match. |
1819 | 0 | return 55; // "c12" |
1820 | 0 | case '3': // 1 string to match. |
1821 | 0 | return 56; // "c13" |
1822 | 0 | case '4': // 1 string to match. |
1823 | 0 | return 39; // "c14" |
1824 | 0 | case '5': // 1 string to match. |
1825 | 0 | return 38; // "c15" |
1826 | 0 | case '6': // 1 string to match. |
1827 | 0 | return 9; // "c16" |
1828 | 0 | case '7': // 1 string to match. |
1829 | 0 | return 8; // "c17" |
1830 | 0 | case '8': // 1 string to match. |
1831 | 0 | return 29; // "c18" |
1832 | 0 | case '9': // 1 string to match. |
1833 | 0 | return 28; // "c19" |
1834 | 0 | } |
1835 | 0 | break; |
1836 | 0 | case '3': // 2 strings to match. |
1837 | 0 | switch (Name[2]) { |
1838 | 0 | default: break; |
1839 | 0 | case '0': // 1 string to match. |
1840 | 0 | return 44; // "c30" |
1841 | 0 | case '1': // 1 string to match. |
1842 | 0 | return 43; // "c31" |
1843 | 0 | } |
1844 | 0 | break; |
1845 | 0 | } |
1846 | 0 | break; |
1847 | 0 | case 'g': // 10 strings to match. |
1848 | 0 | switch (Name[1]) { |
1849 | 0 | default: break; |
1850 | 0 | case '1': // 4 strings to match. |
1851 | 0 | switch (Name[2]) { |
1852 | 0 | default: break; |
1853 | 0 | case '6': // 1 string to match. |
1854 | 0 | return 96; // "g16" |
1855 | 0 | case '7': // 1 string to match. |
1856 | 0 | return 97; // "g17" |
1857 | 0 | case '8': // 1 string to match. |
1858 | 0 | return 98; // "g18" |
1859 | 0 | case '9': // 1 string to match. |
1860 | 0 | return 99; // "g19" |
1861 | 0 | } |
1862 | 0 | break; |
1863 | 0 | case '2': // 6 strings to match. |
1864 | 0 | switch (Name[2]) { |
1865 | 0 | default: break; |
1866 | 0 | case '4': // 1 string to match. |
1867 | 0 | return 14; // "g24" |
1868 | 0 | case '5': // 1 string to match. |
1869 | 0 | return 13; // "g25" |
1870 | 0 | case '6': // 1 string to match. |
1871 | 0 | return 92; // "g26" |
1872 | 0 | case '7': // 1 string to match. |
1873 | 0 | return 93; // "g27" |
1874 | 0 | case '8': // 1 string to match. |
1875 | 0 | return 94; // "g28" |
1876 | 0 | case '9': // 1 string to match. |
1877 | 0 | return 95; // "g29" |
1878 | 0 | } |
1879 | 0 | break; |
1880 | 0 | } |
1881 | 0 | break; |
1882 | 0 | case 's': // 30 strings to match. |
1883 | 0 | switch (Name[1]) { |
1884 | 0 | default: break; |
1885 | 0 | case '1': // 5 strings to match. |
1886 | 0 | switch (Name[2]) { |
1887 | 0 | default: break; |
1888 | 0 | case '0': // 1 string to match. |
1889 | 0 | return 17; // "s10" |
1890 | 0 | case '6': // 1 string to match. |
1891 | 0 | return 7; // "s16" |
1892 | 0 | case '7': // 1 string to match. |
1893 | 0 | return 23; // "s17" |
1894 | 0 | case '8': // 1 string to match. |
1895 | 0 | return 35; // "s18" |
1896 | 0 | case '9': // 1 string to match. |
1897 | 0 | return 155; // "s19" |
1898 | 0 | } |
1899 | 0 | break; |
1900 | 0 | case '2': // 6 strings to match. |
1901 | 0 | switch (Name[2]) { |
1902 | 0 | default: break; |
1903 | 0 | case '0': // 1 string to match. |
1904 | 0 | return 156; // "s20" |
1905 | 0 | case '1': // 1 string to match. |
1906 | 0 | return 45; // "s21" |
1907 | 0 | case '2': // 1 string to match. |
1908 | 0 | return 157; // "s22" |
1909 | 0 | case '7': // 1 string to match. |
1910 | 0 | return 3; // "s27" |
1911 | 0 | case '8': // 1 string to match. |
1912 | 0 | return 5; // "s28" |
1913 | 0 | case '9': // 1 string to match. |
1914 | 0 | return 32; // "s29" |
1915 | 0 | } |
1916 | 0 | break; |
1917 | 0 | case '3': // 9 strings to match. |
1918 | 0 | switch (Name[2]) { |
1919 | 0 | default: break; |
1920 | 0 | case '0': // 1 string to match. |
1921 | 0 | return 26; // "s30" |
1922 | 0 | case '1': // 1 string to match. |
1923 | 0 | return 25; // "s31" |
1924 | 0 | case '2': // 1 string to match. |
1925 | 0 | return 22; // "s32" |
1926 | 0 | case '3': // 1 string to match. |
1927 | 0 | return 100; // "s33" |
1928 | 0 | case '4': // 1 string to match. |
1929 | 0 | return 101; // "s34" |
1930 | 0 | case '6': // 1 string to match. |
1931 | 0 | return 51; // "s36" |
1932 | 0 | case '7': // 1 string to match. |
1933 | 0 | return 49; // "s37" |
1934 | 0 | case '8': // 1 string to match. |
1935 | 0 | return 52; // "s38" |
1936 | 0 | case '9': // 1 string to match. |
1937 | 0 | return 50; // "s39" |
1938 | 0 | } |
1939 | 0 | break; |
1940 | 0 | case '4': // 6 strings to match. |
1941 | 0 | switch (Name[2]) { |
1942 | 0 | default: break; |
1943 | 0 | case '0': // 1 string to match. |
1944 | 0 | return 20; // "s40" |
1945 | 0 | case '1': // 1 string to match. |
1946 | 0 | return 21; // "s41" |
1947 | 0 | case '2': // 1 string to match. |
1948 | 0 | return 18; // "s42" |
1949 | 0 | case '3': // 1 string to match. |
1950 | 0 | return 19; // "s43" |
1951 | 0 | case '8': // 1 string to match. |
1952 | 0 | return 110; // "s48" |
1953 | 0 | case '9': // 1 string to match. |
1954 | 0 | return 111; // "s49" |
1955 | 0 | } |
1956 | 0 | break; |
1957 | 0 | case '5': // 4 strings to match. |
1958 | 0 | switch (Name[2]) { |
1959 | 0 | default: break; |
1960 | 0 | case '0': // 1 string to match. |
1961 | 0 | return 112; // "s50" |
1962 | 0 | case '1': // 1 string to match. |
1963 | 0 | return 113; // "s51" |
1964 | 0 | case '2': // 1 string to match. |
1965 | 0 | return 31; // "s52" |
1966 | 0 | case '3': // 1 string to match. |
1967 | 0 | return 30; // "s53" |
1968 | 0 | } |
1969 | 0 | break; |
1970 | 0 | } |
1971 | 0 | break; |
1972 | 0 | } |
1973 | 0 | break; |
1974 | 0 | case 4: // 1 string to match. |
1975 | 0 | if (memcmp(Name.data()+0, "m1:0", 4) != 0) |
1976 | 0 | break; |
1977 | 0 | return 337; // "m1:0" |
1978 | 0 | case 5: // 2 strings to match. |
1979 | 0 | switch (Name[0]) { |
1980 | 0 | default: break; |
1981 | 0 | case 'c': // 1 string to match. |
1982 | 0 | if (memcmp(Name.data()+1, "s1:0", 4) != 0) |
1983 | 0 | break; |
1984 | 0 | return 4; // "cs1:0" |
1985 | 0 | case 'l': // 1 string to match. |
1986 | 0 | if (memcmp(Name.data()+1, "r:fp", 4) != 0) |
1987 | 0 | break; |
1988 | 0 | return 72; // "lr:fp" |
1989 | 0 | } |
1990 | 0 | break; |
1991 | 0 | case 6: // 3 strings to match. |
1992 | 0 | switch (Name[0]) { |
1993 | 0 | default: break; |
1994 | 0 | case 'p': // 1 string to match. |
1995 | 0 | if (memcmp(Name.data()+1, "cycle", 5) != 0) |
1996 | 0 | break; |
1997 | 0 | return 372; // "pcycle" |
1998 | 0 | case 's': // 1 string to match. |
1999 | 0 | if (memcmp(Name.data()+1, "gp1:0", 5) != 0) |
2000 | 0 | break; |
2001 | 0 | return 397; // "sgp1:0" |
2002 | 0 | case 'u': // 1 string to match. |
2003 | 0 | if (memcmp(Name.data()+1, "timer", 5) != 0) |
2004 | 0 | break; |
2005 | 0 | return 42; // "utimer" |
2006 | 0 | } |
2007 | 0 | break; |
2008 | 0 | case 7: // 4 strings to match. |
2009 | 0 | switch (Name[0]) { |
2010 | 0 | default: break; |
2011 | 0 | case 'c': // 1 string to match. |
2012 | 0 | if (memcmp(Name.data()+1, "cr:ssr", 6) != 0) |
2013 | 0 | break; |
2014 | 0 | return 360; // "ccr:ssr" |
2015 | 0 | case 'l': // 2 strings to match. |
2016 | 0 | if (Name[1] != 'c') |
2017 | 0 | break; |
2018 | 0 | switch (Name[2]) { |
2019 | 0 | default: break; |
2020 | 0 | case '0': // 1 string to match. |
2021 | 0 | if (memcmp(Name.data()+3, ":sa0", 4) != 0) |
2022 | 0 | break; |
2023 | 0 | return 334; // "lc0:sa0" |
2024 | 0 | case '1': // 1 string to match. |
2025 | 0 | if (memcmp(Name.data()+3, ":sa1", 4) != 0) |
2026 | 0 | break; |
2027 | 0 | return 335; // "lc1:sa1" |
2028 | 0 | } |
2029 | 0 | break; |
2030 | 0 | case 'u': // 1 string to match. |
2031 | 0 | if (memcmp(Name.data()+1, "pcycle", 6) != 0) |
2032 | 0 | break; |
2033 | 0 | return 37; // "upcycle" |
2034 | 0 | } |
2035 | 0 | break; |
2036 | 0 | case 8: // 2 strings to match. |
2037 | 0 | switch (Name[0]) { |
2038 | 0 | default: break; |
2039 | 0 | case 'b': // 1 string to match. |
2040 | 0 | if (memcmp(Name.data()+1, "adva1:0", 7) != 0) |
2041 | 0 | break; |
2042 | 0 | return 359; // "badva1:0" |
2043 | 0 | case 'p': // 1 string to match. |
2044 | 0 | if (memcmp(Name.data()+1, "ktcount", 7) != 0) |
2045 | 0 | break; |
2046 | 0 | return 27; // "pktcount" |
2047 | 0 | } |
2048 | 0 | break; |
2049 | 0 | } |
2050 | 0 | return 0; |
2051 | 0 | } |
2052 | | |
2053 | | #endif // GET_REGISTER_MATCHER |
2054 | | |
2055 | | |
2056 | | #ifdef GET_SUBTARGET_FEATURE_NAME |
2057 | | #undef GET_SUBTARGET_FEATURE_NAME |
2058 | | |
2059 | | // User-level names for subtarget features that participate in |
2060 | | // instruction matching. |
2061 | | static const char *getSubtargetFeatureName(uint64_t Val) { |
2062 | | switch(Val) { |
2063 | | case Feature_HasV5Bit: return ""; |
2064 | | case Feature_HasV55Bit: return ""; |
2065 | | case Feature_HasV60Bit: return ""; |
2066 | | case Feature_HasV62Bit: return ""; |
2067 | | case Feature_HasV65Bit: return ""; |
2068 | | case Feature_HasV66Bit: return ""; |
2069 | | case Feature_HasV67Bit: return ""; |
2070 | | case Feature_HasV68Bit: return ""; |
2071 | | case Feature_HasV69Bit: return ""; |
2072 | | case Feature_HasV71Bit: return ""; |
2073 | | case Feature_HasV73Bit: return ""; |
2074 | | case Feature_UseHVX64BBit: return ""; |
2075 | | case Feature_UseHVX128BBit: return ""; |
2076 | | case Feature_UseHVXBit: return ""; |
2077 | | case Feature_UseHVXV60Bit: return ""; |
2078 | | case Feature_UseHVXV62Bit: return ""; |
2079 | | case Feature_UseHVXV65Bit: return ""; |
2080 | | case Feature_UseHVXV66Bit: return ""; |
2081 | | case Feature_UseHVXV67Bit: return ""; |
2082 | | case Feature_UseHVXV68Bit: return ""; |
2083 | | case Feature_UseHVXV69Bit: return ""; |
2084 | | case Feature_UseHVXV71Bit: return ""; |
2085 | | case Feature_UseHVXV73Bit: return ""; |
2086 | | case Feature_UseAudioBit: return ""; |
2087 | | case Feature_UseZRegBit: return ""; |
2088 | | case Feature_HasPreV65Bit: return ""; |
2089 | | case Feature_UseHVXIEEEFPBit: return ""; |
2090 | | case Feature_UseHVXQFloatBit: return ""; |
2091 | | case Feature_HasMemNoShufBit: return ""; |
2092 | | case Feature_UseCabacBit: return ""; |
2093 | | default: return "(unknown)"; |
2094 | | } |
2095 | | } |
2096 | | |
2097 | | #endif // GET_SUBTARGET_FEATURE_NAME |
2098 | | |
2099 | | |
2100 | | #ifdef GET_MATCHER_IMPLEMENTATION |
2101 | | #undef GET_MATCHER_IMPLEMENTATION |
2102 | | |
2103 | | enum { |
2104 | | Tie0_0_0, |
2105 | | Tie0_0_6, |
2106 | | Tie0_0_7, |
2107 | | Tie0_0_8, |
2108 | | Tie0_2_2, |
2109 | | Tie0_6_6, |
2110 | | Tie0_7_7, |
2111 | | Tie1_0_0, |
2112 | | Tie1_3_3, |
2113 | | Tie1_9_9, |
2114 | | Tie1_10_10, |
2115 | | Tie1_11_11, |
2116 | | }; |
2117 | | |
2118 | | static const uint8_t TiedAsmOperandTable[][3] = { |
2119 | | /* Tie0_0_0 */ { 0, 0, 0 }, |
2120 | | /* Tie0_0_6 */ { 0, 0, 6 }, |
2121 | | /* Tie0_0_7 */ { 0, 0, 7 }, |
2122 | | /* Tie0_0_8 */ { 0, 0, 8 }, |
2123 | | /* Tie0_2_2 */ { 0, 2, 2 }, |
2124 | | /* Tie0_6_6 */ { 0, 6, 6 }, |
2125 | | /* Tie0_7_7 */ { 0, 7, 7 }, |
2126 | | /* Tie1_0_0 */ { 1, 0, 0 }, |
2127 | | /* Tie1_3_3 */ { 1, 3, 3 }, |
2128 | | /* Tie1_9_9 */ { 1, 9, 9 }, |
2129 | | /* Tie1_10_10 */ { 1, 10, 10 }, |
2130 | | /* Tie1_11_11 */ { 1, 11, 11 }, |
2131 | | }; |
2132 | | |
2133 | | namespace { |
2134 | | enum OperatorConversionKind { |
2135 | | CVT_Done, |
2136 | | CVT_Reg, |
2137 | | CVT_Tied, |
2138 | | CVT_95_Reg, |
2139 | | CVT_95_addSignedImmOperands, |
2140 | | CVT_95_addImmOperands, |
2141 | | CVT_regW15, |
2142 | | CVT_imm_95_0, |
2143 | | CVT_imm_95__MINUS_1, |
2144 | | CVT_imm_95_255, |
2145 | | CVT_regR29, |
2146 | | CVT_95_addsgp10ConstOperands, |
2147 | | CVT_regD15, |
2148 | | CVT_regR30, |
2149 | | CVT_95_addn1ConstOperands, |
2150 | | CVT_regR0, |
2151 | | CVT_NUM_CONVERTERS |
2152 | | }; |
2153 | | |
2154 | | enum InstructionConversionKind { |
2155 | | Convert__Reg1_0__Reg1_2__Reg1_2, |
2156 | | Convert__Reg1_0__Reg1_2, |
2157 | | Convert__Reg1_0, |
2158 | | Convert__Reg1_0__s8_0Imm1_3, |
2159 | | Convert__Reg1_0__u64_0Imm1_3, |
2160 | | Convert__Reg1_0__regW15__regW15, |
2161 | | Convert__Reg1_0__s32_0Imm1_3, |
2162 | | Convert__Reg1_0__Reg1_0__Reg1_0, |
2163 | | Convert__Reg1_0__Reg1_4, |
2164 | | Convert__Reg1_0__Tie0_0_0__Reg1_4__imm_95_0, |
2165 | | Convert__Reg1_0__Reg1_4__imm_95_0, |
2166 | | Convert__Reg1_0__Reg1_2__b30_2Imm1_5, |
2167 | | Convert__Reg1_0__Tie0_0_0__u16_0Imm1_5, |
2168 | | Convert__Reg1_0__u16_0Imm1_5, |
2169 | | Convert__Reg1_0__imm_95_0__Reg1_4, |
2170 | | Convert__Reg1_0__imm_95__MINUS_1__Reg1_4, |
2171 | | Convert__Reg1_0__Reg1_4__imm_95_255, |
2172 | | Convert__Reg1_0__Reg1_4__Reg1_5, |
2173 | | Convert__Reg1_0__Imm1_5, |
2174 | | Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, |
2175 | | Convert__Reg1_0__u29_3Imm1_5, |
2176 | | Convert__Reg1_0__u6_0Imm1_3__b30_2Imm1_6, |
2177 | | Convert__Reg1_0__Tie0_0_0__Reg1_5, |
2178 | | Convert__Reg1_0__s27_2Imm1_5, |
2179 | | Convert__Reg1_0__u32_0Imm1_5, |
2180 | | Convert__Reg1_0__u31_1Imm1_5, |
2181 | | Convert__Reg1_0__u30_2Imm1_5, |
2182 | | Convert__Reg1_0__Reg1_1__Reg1_5, |
2183 | | Convert__Reg1_0__Reg1_4__Reg1_6, |
2184 | | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, |
2185 | | Convert__Reg1_0__Reg1_5__Reg1_6, |
2186 | | Convert__Reg1_0__Reg1_4__u6_0Imm1_6, |
2187 | | Convert__Reg1_0__Reg1_4__u5_0Imm1_6, |
2188 | | Convert__Reg1_0__s32_0Imm1_5__Reg1_6, |
2189 | | Convert__Reg1_0__Reg1_4__s32_0Imm1_6, |
2190 | | Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, |
2191 | | Convert__Reg1_0__Reg1_4__u4_0Imm1_6, |
2192 | | Convert__Reg1_0__Reg1_1__Tie0_0_0__Reg1_5__Reg1_6, |
2193 | | Convert__Reg1_0__Reg1_1__Reg1_5__Reg1_6, |
2194 | | Convert__Reg1_0__u32_0Imm1_6, |
2195 | | Convert__Reg1_0__s6_0Imm1_5__Reg1_6, |
2196 | | Convert__Reg1_0__Reg1_4__m32_0Imm1_6, |
2197 | | Convert__Reg1_0__Reg1_6, |
2198 | | Convert__Reg1_0__Tie0_0_0__Reg1_6, |
2199 | | Convert__Reg1_0__Reg1_5__u6_0Imm1_7, |
2200 | | Convert__Reg1_0__Reg1_5__u5_0Imm1_7, |
2201 | | Convert__Reg1_0__Reg1_6__Reg1_7, |
2202 | | Convert__Reg1_0__Reg1_7__Reg1_6, |
2203 | | Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, |
2204 | | Convert__Reg1_0__s32_0Imm1_5__s8_0Imm1_7, |
2205 | | Convert__Reg1_0__s8_0Imm1_5__u32_0Imm1_7, |
2206 | | Convert__Reg1_0__u10_0Imm1_5, |
2207 | | Convert__Reg1_0__Tie0_0_0__Reg1_4__s32_0Imm1_7, |
2208 | | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, |
2209 | | Convert__Reg1_0__Reg1_4__Tie0_0_0__u32_0Imm1_7, |
2210 | | Convert__Reg1_0__Reg1_4__s30_2Imm1_7, |
2211 | | Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, |
2212 | | Convert__Reg1_0__Reg1_4__u32_0Imm1_7, |
2213 | | Convert__Reg1_0__u29_3Imm1_7, |
2214 | | Convert__Reg1_0__Reg1_4__s29_3Imm1_7, |
2215 | | Convert__Reg1_0__Tie0_0_0__Reg1_4__s31_1Imm1_7, |
2216 | | Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, |
2217 | | Convert__Reg1_0__Reg1_4__Reg1_5__u2_0Imm1_7, |
2218 | | Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7, |
2219 | | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_7, |
2220 | | Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, |
2221 | | Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, |
2222 | | Convert__Reg1_0__Tie0_0_0__Reg1_5__u32_0Imm1_7, |
2223 | | Convert__Reg1_0__Reg1_5__u32_0Imm1_7, |
2224 | | Convert__Reg1_0__Reg1_5__u8_0Imm1_7, |
2225 | | Convert__Reg1_0__u5_0Imm1_5__u5_0Imm1_7, |
2226 | | Convert__Reg1_0__u32_0Imm1_7, |
2227 | | Convert__Reg1_0__Reg1_4__s32_0Imm1_7, |
2228 | | Convert__Reg1_0__Reg1_4__s31_1Imm1_7, |
2229 | | Convert__Reg1_0__u31_1Imm1_7, |
2230 | | Convert__Reg1_0__u30_2Imm1_7, |
2231 | | Convert__Reg1_0__Reg1_4__s32_0Imm1_6__Reg1_7, |
2232 | | Convert__Reg1_0__Reg1_4__Reg1_5__s32_0Imm1_7, |
2233 | | Convert__Reg1_0__Reg1_4__s4_0Imm1_7, |
2234 | | Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_7, |
2235 | | Convert__Reg1_0__Reg1_7__Reg1_8, |
2236 | | Convert__Reg1_0__Reg1_6__s32_0Imm1_8, |
2237 | | Convert__Reg1_0__Reg1_6__s8_0Imm1_8, |
2238 | | Convert__Reg1_0__Reg1_6__u8_0Imm1_8, |
2239 | | Convert__Reg1_0__Reg1_6__u32_0Imm1_8, |
2240 | | Convert__Reg1_0__Reg1_6__u7_0Imm1_8, |
2241 | | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u2_0Imm1_8, |
2242 | | Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1_0_0, |
2243 | | Convert__Reg1_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8, |
2244 | | Convert__Reg1_0__Tie0_0_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8, |
2245 | | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8, |
2246 | | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8, |
2247 | | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8, |
2248 | | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8, |
2249 | | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8, |
2250 | | Convert__Reg1_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8, |
2251 | | Convert__Reg1_0__Tie0_0_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8, |
2252 | | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8, |
2253 | | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8, |
2254 | | Convert__Reg1_0__Reg1_4__s32_0Imm1_6__s8_0Imm1_8, |
2255 | | Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, |
2256 | | Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8, |
2257 | | Convert__Reg1_0__Reg1_7__s32_0Imm1_9, |
2258 | | Convert__Reg1_0__Reg1_7__u32_0Imm1_9, |
2259 | | Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, |
2260 | | Convert__Reg1_0__Reg1_4__Reg1_7, |
2261 | | Convert__Reg1_0__Tie0_0_0__Reg1_7, |
2262 | | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__Reg1_7, |
2263 | | Convert__Reg1_0__Reg1_6__s6_0Imm1_9, |
2264 | | Convert__Reg1_0__Reg1_4__Tie0_0_7__Reg1_8, |
2265 | | Convert__Reg1_0__Reg1_6__s4_0Imm1_9, |
2266 | | Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9, |
2267 | | Convert__Reg1_0__Reg1_6__Reg1_9, |
2268 | | Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, |
2269 | | Convert__Reg1_0__Reg1_8__Reg1_9, |
2270 | | Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, |
2271 | | Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, |
2272 | | Convert__Reg1_0__u32_0Imm1_5__Reg1_8__Reg1_9, |
2273 | | Convert__Reg1_0__Reg1_4__Reg1_7__s32_0Imm1_9, |
2274 | | Convert__Reg1_0__Reg1_4__u6_2Imm1_8__Reg1_9, |
2275 | | Convert__Reg1_0__Reg1_4__Reg1_7__u32_0Imm1_9, |
2276 | | Convert__Reg1_0__Reg1_4__s32_0Imm1_8__Reg1_9, |
2277 | | Convert__Reg1_0__Reg1_4__Tie0_0_7__s32_0Imm1_9, |
2278 | | Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, |
2279 | | Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, |
2280 | | Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, |
2281 | | Convert__Reg1_0__Reg1_9__Reg1_10, |
2282 | | Convert__Reg1_0__Tie0_0_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, |
2283 | | Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, |
2284 | | Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_9, |
2285 | | Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, |
2286 | | Convert__Reg1_0__u32_0Imm1_5__Reg1_8__u6_0Imm1_10, |
2287 | | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_11, |
2288 | | Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, |
2289 | | Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, |
2290 | | Convert__Reg1_0__Reg1_7__Reg1_10, |
2291 | | Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, |
2292 | | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8__Reg1_12, |
2293 | | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8__Reg1_12, |
2294 | | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8__Reg1_12, |
2295 | | Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8__Reg1_12, |
2296 | | Convert__Reg1_0__Reg1_6__Reg1_9__u3_0Imm1_13, |
2297 | | Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__Reg1_13, |
2298 | | Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, |
2299 | | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8__Reg1_12, |
2300 | | Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12, |
2301 | | Convert__Reg1_0__Tie0_0_0__Reg1_8__Reg1_11, |
2302 | | Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, |
2303 | | Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u3_0Imm1_14, |
2304 | | Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, |
2305 | | Convert__Reg1_0__Reg1_8__Reg1_12, |
2306 | | Convert__Reg1_0__Reg1_12__Reg1_6__Reg1_9__Tie1_0_0, |
2307 | | Convert__Reg1_0__Reg1_3__Reg1_7__Reg1_10, |
2308 | | Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13, |
2309 | | Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u2_0Imm1_14, |
2310 | | Convert__Reg1_0__Tie0_0_6__Reg1_9__Reg1_12, |
2311 | | Convert__regR29__Tie0_0_0__u11_3Imm1_3, |
2312 | | Convert__Reg1_2__Tie0_0_0__u11_3Imm1_4, |
2313 | | Convert_NoOperands, |
2314 | | Convert__a30_2Imm1_1, |
2315 | | Convert__Reg1_1, |
2316 | | Convert__Reg1_2, |
2317 | | Convert__Reg1_2__Tie0_0_0__sgp10Const1_3, |
2318 | | Convert__Reg1_2__Tie0_2_2, |
2319 | | Convert__Reg1_2__Tie0_0_0, |
2320 | | Convert__Reg1_2__imm_95_0, |
2321 | | Convert__Reg1_2__u11_3Imm1_5, |
2322 | | Convert__Reg1_2__Reg1_3, |
2323 | | Convert__regD15__regR30, |
2324 | | Convert__imm_95_0, |
2325 | | Convert__regD15__Reg1_2__regR30, |
2326 | | Convert__regD15__Reg1_3__regR30, |
2327 | | Convert__Reg1_2__a30_2Imm1_5, |
2328 | | Convert__Reg1_2__Reg1_5, |
2329 | | Convert__Reg1_2__b30_2Imm1_5, |
2330 | | Convert__Reg1_3__a30_2Imm1_6, |
2331 | | Convert__Reg1_3__Reg1_6, |
2332 | | Convert__Reg1_3__b30_2Imm1_6, |
2333 | | Convert__Reg1_4__Reg1_2__Reg1_6, |
2334 | | Convert__Reg1_4__Reg1_2__Reg1_6__imm_95_0, |
2335 | | Convert__Reg1_5__Reg1_3__Reg1_7, |
2336 | | Convert__Reg1_5__Reg1_3__Reg1_7__imm_95_0, |
2337 | | Convert__Reg1_2__b30_2Imm1_7, |
2338 | | Convert__Reg1_2__Reg1_7, |
2339 | | Convert__Reg1_4__Reg1_2__s32_0Imm1_7, |
2340 | | Convert__Reg1_3__b30_2Imm1_8, |
2341 | | Convert__Reg1_3__Reg1_8, |
2342 | | Convert__Reg1_5__Reg1_3__s32_0Imm1_8, |
2343 | | Convert__Reg1_6__Reg1_2__Reg1_8, |
2344 | | Convert__Reg1_6__Reg1_2__Reg1_8__imm_95_0, |
2345 | | Convert__Reg1_7__Reg1_3__Reg1_9, |
2346 | | Convert__Reg1_7__Reg1_3__Reg1_9__imm_95_0, |
2347 | | Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, |
2348 | | Convert__Reg1_2__Reg1_8__imm_95_0, |
2349 | | Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, |
2350 | | Convert__Reg1_4__Reg1_2__Reg1_8, |
2351 | | Convert__Reg1_2__b30_2Imm1_9, |
2352 | | Convert__Reg1_2__Reg1_9, |
2353 | | Convert__Reg1_6__Reg1_2__s32_0Imm1_9, |
2354 | | Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, |
2355 | | Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, |
2356 | | Convert__Reg1_5__Reg1_3__Reg1_9, |
2357 | | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_9_9__imm_95_0, |
2358 | | Convert__Reg1_3__b30_2Imm1_10, |
2359 | | Convert__Reg1_3__Reg1_10, |
2360 | | Convert__Reg1_7__Reg1_3__s32_0Imm1_10, |
2361 | | Convert__Reg1_2__u32_0Imm1_7__Reg1_10, |
2362 | | Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10, |
2363 | | Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, |
2364 | | Convert__Reg1_4__Reg1_2__u32_0Imm1_9, |
2365 | | Convert__Reg1_3__u32_0Imm1_8__Reg1_11, |
2366 | | Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11, |
2367 | | Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, |
2368 | | Convert__Reg1_5__Reg1_3__u32_0Imm1_10, |
2369 | | Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_11, |
2370 | | Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, |
2371 | | Convert__Reg1_4__Reg1_2__Reg1_8__s32_0Imm1_10, |
2372 | | Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_10_10__imm_95_0, |
2373 | | Convert__Reg1_4__Reg1_2__Reg1_10__imm_95_0, |
2374 | | Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, |
2375 | | Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, |
2376 | | Convert__Reg1_6__Reg1_2__Reg1_10, |
2377 | | Convert__Reg1_2__b13_2Imm1_11, |
2378 | | Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_12, |
2379 | | Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, |
2380 | | Convert__Reg1_5__Reg1_3__Reg1_9__s32_0Imm1_11, |
2381 | | Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_11_11__imm_95_0, |
2382 | | Convert__Reg1_5__Reg1_3__Reg1_11__imm_95_0, |
2383 | | Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, |
2384 | | Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, |
2385 | | Convert__Reg1_7__Reg1_3__Reg1_11, |
2386 | | Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, |
2387 | | Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12, |
2388 | | Convert__Reg1_2__Reg1_6__u32_0Imm1_9__Reg1_12, |
2389 | | Convert__Reg1_2__Reg1_6__u29_3Imm1_9__Reg1_12, |
2390 | | Convert__Reg1_2__Reg1_6__u31_1Imm1_9__Reg1_12, |
2391 | | Convert__Reg1_2__Reg1_6__u30_2Imm1_9__Reg1_12, |
2392 | | Convert__Reg1_2__Reg1_8__s4_0Imm1_11, |
2393 | | Convert__Reg1_8__Reg1_2__Tie0_0_0__Reg1_11, |
2394 | | Convert__Reg1_4__Reg1_2__Reg1_8__u29_3Imm1_11, |
2395 | | Convert__Reg1_4__Reg1_2__Reg1_8__u32_0Imm1_11, |
2396 | | Convert__Reg1_4__Reg1_2__Reg1_8__u31_1Imm1_11, |
2397 | | Convert__Reg1_4__Reg1_2__Reg1_8__u30_2Imm1_11, |
2398 | | Convert__Reg1_4__Reg1_2__Reg1_8__s4_0Imm1_11, |
2399 | | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__Reg1_11, |
2400 | | Convert__Reg1_2__u32_0Imm1_9__Reg1_12, |
2401 | | Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12, |
2402 | | Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, |
2403 | | Convert__Reg1_6__Reg1_2__u32_0Imm1_11, |
2404 | | Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, |
2405 | | Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13, |
2406 | | Convert__Reg1_3__Reg1_7__u32_0Imm1_10__Reg1_13, |
2407 | | Convert__Reg1_3__Reg1_7__u29_3Imm1_10__Reg1_13, |
2408 | | Convert__Reg1_3__Reg1_7__u31_1Imm1_10__Reg1_13, |
2409 | | Convert__Reg1_3__Reg1_7__u30_2Imm1_10__Reg1_13, |
2410 | | Convert__Reg1_5__Reg1_3__Reg1_9__u29_3Imm1_12, |
2411 | | Convert__Reg1_5__Reg1_3__Reg1_9__u32_0Imm1_12, |
2412 | | Convert__Reg1_5__Reg1_3__Reg1_9__u31_1Imm1_12, |
2413 | | Convert__Reg1_5__Reg1_3__Reg1_9__u30_2Imm1_12, |
2414 | | Convert__Reg1_5__Reg1_3__Reg1_9__s4_0Imm1_12, |
2415 | | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__Reg1_12, |
2416 | | Convert__Reg1_3__u32_0Imm1_10__Reg1_13, |
2417 | | Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13, |
2418 | | Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, |
2419 | | Convert__Reg1_7__Reg1_3__u32_0Imm1_12, |
2420 | | Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, |
2421 | | Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, |
2422 | | Convert__Reg1_2__Reg1_6__u6_0Imm1_9__s32_0Imm1_13, |
2423 | | Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_0Imm1_10__Reg1_13, |
2424 | | Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_3Imm1_10__Reg1_13, |
2425 | | Convert__Reg1_2__Reg1_6__u6_1Imm1_9__s32_0Imm1_13, |
2426 | | Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_1Imm1_10__Reg1_13, |
2427 | | Convert__Reg1_2__Reg1_6__u6_2Imm1_9__s32_0Imm1_13, |
2428 | | Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_2Imm1_10__Reg1_13, |
2429 | | Convert__Reg1_8__Reg1_2__Tie0_0_0__s3_0Imm1_12, |
2430 | | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_3Imm1_12, |
2431 | | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_0Imm1_12, |
2432 | | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_1Imm1_12, |
2433 | | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_2Imm1_12, |
2434 | | Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s3_0Imm1_12, |
2435 | | Convert__Reg1_6__Reg1_2__Reg1_10__s32_0Imm1_12, |
2436 | | Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, |
2437 | | Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, |
2438 | | Convert__Reg1_3__Reg1_7__u6_0Imm1_10__s32_0Imm1_14, |
2439 | | Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_0Imm1_11__Reg1_14, |
2440 | | Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_3Imm1_11__Reg1_14, |
2441 | | Convert__Reg1_3__Reg1_7__u6_1Imm1_10__s32_0Imm1_14, |
2442 | | Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_1Imm1_11__Reg1_14, |
2443 | | Convert__Reg1_3__Reg1_7__u6_2Imm1_10__s32_0Imm1_14, |
2444 | | Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_2Imm1_11__Reg1_14, |
2445 | | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_3Imm1_13, |
2446 | | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_0Imm1_13, |
2447 | | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_1Imm1_13, |
2448 | | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_2Imm1_13, |
2449 | | Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s3_0Imm1_13, |
2450 | | Convert__Reg1_7__Reg1_3__Reg1_11__s32_0Imm1_13, |
2451 | | Convert__Reg1_4__b30_2Imm1_14, |
2452 | | Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14, |
2453 | | Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_14, |
2454 | | Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, |
2455 | | Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13, |
2456 | | Convert__Reg1_2__Reg1_8__u32_0Imm1_11__Reg1_14, |
2457 | | Convert__Reg1_2__Reg1_8__u29_3Imm1_11__Reg1_14, |
2458 | | Convert__Reg1_2__Reg1_8__u31_1Imm1_11__Reg1_14, |
2459 | | Convert__Reg1_2__Reg1_8__u30_2Imm1_11__Reg1_14, |
2460 | | Convert__Reg1_6__Reg1_2__Reg1_10__u29_3Imm1_13, |
2461 | | Convert__Reg1_6__Reg1_2__Reg1_10__u32_0Imm1_13, |
2462 | | Convert__Reg1_6__Reg1_2__Reg1_10__u31_1Imm1_13, |
2463 | | Convert__Reg1_6__Reg1_2__Reg1_10__u30_2Imm1_13, |
2464 | | Convert__Reg1_5__b30_2Imm1_15, |
2465 | | Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15, |
2466 | | Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_15, |
2467 | | Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, |
2468 | | Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14, |
2469 | | Convert__Reg1_3__Reg1_9__u32_0Imm1_12__Reg1_15, |
2470 | | Convert__Reg1_3__Reg1_9__u29_3Imm1_12__Reg1_15, |
2471 | | Convert__Reg1_3__Reg1_9__u31_1Imm1_12__Reg1_15, |
2472 | | Convert__Reg1_3__Reg1_9__u30_2Imm1_12__Reg1_15, |
2473 | | Convert__Reg1_7__Reg1_3__Reg1_11__u29_3Imm1_14, |
2474 | | Convert__Reg1_7__Reg1_3__Reg1_11__u32_0Imm1_14, |
2475 | | Convert__Reg1_7__Reg1_3__Reg1_11__u31_1Imm1_14, |
2476 | | Convert__Reg1_7__Reg1_3__Reg1_11__u30_2Imm1_14, |
2477 | | Convert__Reg1_6__Reg1_9__b30_2Imm1_15, |
2478 | | Convert__Reg1_6__Reg1_7__b30_2Imm1_15, |
2479 | | Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15, |
2480 | | Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_15, |
2481 | | Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_13, |
2482 | | Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, |
2483 | | Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, |
2484 | | Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, |
2485 | | Convert__Reg1_2__Reg1_8__u6_0Imm1_11__s32_0Imm1_15, |
2486 | | Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_0Imm1_12__Reg1_15, |
2487 | | Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_3Imm1_12__Reg1_15, |
2488 | | Convert__Reg1_2__Reg1_8__u6_1Imm1_11__s32_0Imm1_15, |
2489 | | Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_1Imm1_12__Reg1_15, |
2490 | | Convert__Reg1_2__Reg1_8__u6_2Imm1_11__s32_0Imm1_15, |
2491 | | Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_2Imm1_12__Reg1_15, |
2492 | | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_3Imm1_14, |
2493 | | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_0Imm1_14, |
2494 | | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_1Imm1_14, |
2495 | | Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_2Imm1_14, |
2496 | | Convert__Reg1_7__Reg1_10__b30_2Imm1_16, |
2497 | | Convert__Reg1_7__Reg1_8__b30_2Imm1_16, |
2498 | | Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16, |
2499 | | Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, |
2500 | | Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, |
2501 | | Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, |
2502 | | Convert__Reg1_3__Reg1_9__u6_0Imm1_12__s32_0Imm1_16, |
2503 | | Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_0Imm1_13__Reg1_16, |
2504 | | Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_3Imm1_13__Reg1_16, |
2505 | | Convert__Reg1_3__Reg1_9__u6_1Imm1_12__s32_0Imm1_16, |
2506 | | Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_1Imm1_13__Reg1_16, |
2507 | | Convert__Reg1_3__Reg1_9__u6_2Imm1_12__s32_0Imm1_16, |
2508 | | Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_2Imm1_13__Reg1_16, |
2509 | | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_3Imm1_15, |
2510 | | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_0Imm1_15, |
2511 | | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_1Imm1_15, |
2512 | | Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_2Imm1_15, |
2513 | | Convert__Reg1_6__n1Const1_10__b30_2Imm1_16, |
2514 | | Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, |
2515 | | Convert__Reg1_7__n1Const1_11__b30_2Imm1_17, |
2516 | | Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, |
2517 | | Convert__Reg1_2__Reg1_10__Reg1_11__Reg1_12, |
2518 | | Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, |
2519 | | Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, |
2520 | | Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, |
2521 | | Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, |
2522 | | Convert__u26_6Imm1_3, |
2523 | | Convert__b30_2Imm1_1, |
2524 | | Convert__b30_2Imm1_2__Reg1_3, |
2525 | | Convert__b30_2Imm1_2__u10_0Imm1_4, |
2526 | | Convert__Reg1_2__imm_95_0__Reg1_5, |
2527 | | Convert__u32_0Imm1_3__Reg1_6, |
2528 | | Convert__Reg1_2__imm_95_0__Reg1_6, |
2529 | | Convert__Reg1_2__imm_95_0__s32_0Imm1_6, |
2530 | | Convert__Reg1_2__imm_95_0__u5_0Imm1_7, |
2531 | | Convert__u32_0Imm1_5__Reg1_8, |
2532 | | Convert__Reg1_2__s32_0Imm1_5__Reg1_8, |
2533 | | Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, |
2534 | | Convert__Reg1_2__u32_0Imm1_5__Reg1_8, |
2535 | | Convert__Reg1_2__imm_95_0__u5_0Imm1_8, |
2536 | | Convert__Reg1_2__u32_0Imm1_5__Reg1_9, |
2537 | | Convert__Reg1_2__u6_0Imm1_5__s32_0Imm1_9, |
2538 | | Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_9, |
2539 | | Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_10, |
2540 | | Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, |
2541 | | Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, |
2542 | | Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_11, |
2543 | | Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, |
2544 | | Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, |
2545 | | Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_10__Reg1_14, |
2546 | | Convert__Reg1_2__Reg1_3__Reg1_4, |
2547 | | Convert__u29_3Imm1_3__Reg1_6, |
2548 | | Convert__u29_3Imm1_5__Reg1_8, |
2549 | | Convert__Reg1_2__s29_3Imm1_5__Reg1_8, |
2550 | | Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_9, |
2551 | | Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_10__Reg1_14, |
2552 | | Convert__Reg1_3__Reg1_2__Reg1_6, |
2553 | | Convert__u31_1Imm1_3__Reg1_6, |
2554 | | Convert__u31_1Imm1_5__Reg1_8, |
2555 | | Convert__Reg1_2__s31_1Imm1_5__Reg1_8, |
2556 | | Convert__Reg1_2__u31_1Imm1_5__Reg1_9, |
2557 | | Convert__Reg1_2__u6_1Imm1_5__s32_0Imm1_9, |
2558 | | Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_9, |
2559 | | Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_10, |
2560 | | Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_11, |
2561 | | Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_10__Reg1_14, |
2562 | | Convert__u30_2Imm1_3__Reg1_6, |
2563 | | Convert__u30_2Imm1_5__Reg1_8, |
2564 | | Convert__Reg1_2__s30_2Imm1_5__Reg1_8, |
2565 | | Convert__Reg1_2__u30_2Imm1_5__Reg1_9, |
2566 | | Convert__Reg1_2__u6_2Imm1_5__s32_0Imm1_9, |
2567 | | Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_9, |
2568 | | Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_10, |
2569 | | Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_11, |
2570 | | Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_10__Reg1_14, |
2571 | | Convert__Reg1_4__b30_2Imm1_18, |
2572 | | Convert__Reg1_6__Reg1_7__b30_2Imm1_19, |
2573 | | Convert__Reg1_4__b30_2Imm1_19, |
2574 | | Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, |
2575 | | Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, |
2576 | | Convert__Reg1_6__Reg1_7__b30_2Imm1_20, |
2577 | | Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, |
2578 | | Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, |
2579 | | Convert__b30_2Imm1_4__Reg1_5, |
2580 | | Convert__b30_2Imm1_4__u10_0Imm1_6, |
2581 | | Convert__u10_0Imm1_3, |
2582 | | Convert__u8_0Imm1_3, |
2583 | | Convert__regR0__Tie0_0_0__u8_0Imm1_3, |
2584 | | Convert__Reg1_2__Tie0_0_0__u8_0Imm1_4, |
2585 | | Convert__Reg1_2__Reg1_3__Tie0_0_0__Tie1_0_0__Reg1_4, |
2586 | | Convert__Reg1_2__imm_95_0__Reg1_7, |
2587 | | Convert__Reg1_2__s4_0Imm1_5, |
2588 | | Convert__Reg1_2__s4_0Imm1_5__Reg1_8, |
2589 | | Convert__Reg1_2__Tie0_0_0__Reg1_5, |
2590 | | Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6, |
2591 | | Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9, |
2592 | | Convert__Reg1_2__s4_0Imm1_5__Reg1_10, |
2593 | | Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_11, |
2594 | | Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_11, |
2595 | | Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_9, |
2596 | | Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_10, |
2597 | | Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_12, |
2598 | | Convert__Reg1_6__Reg1_7__Reg1_8, |
2599 | | Convert__Reg1_2__Reg1_3__Tie0_2_2__Tie1_3_3__Reg1_4, |
2600 | | Convert__u1_0Imm1_3, |
2601 | | Convert__Reg1_2__u1_0Imm1_4, |
2602 | | Convert__Reg1_4__imm_95_0, |
2603 | | Convert__Reg1_4__s4_0Imm1_7, |
2604 | | Convert__Reg1_4__Tie0_0_0__Reg1_7, |
2605 | | Convert__Reg1_4__Tie0_0_0__s3_0Imm1_8, |
2606 | | CVT_NUM_SIGNATURES |
2607 | | }; |
2608 | | |
2609 | | } // end anonymous namespace |
2610 | | |
2611 | | static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = { |
2612 | | // Convert__Reg1_0__Reg1_2__Reg1_2 |
2613 | | { CVT_95_Reg, 0, CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_Done }, |
2614 | | // Convert__Reg1_0__Reg1_2 |
2615 | | { CVT_95_Reg, 0, CVT_95_Reg, 2, CVT_Done }, |
2616 | | // Convert__Reg1_0 |
2617 | | { CVT_95_Reg, 0, CVT_Done }, |
2618 | | // Convert__Reg1_0__s8_0Imm1_3 |
2619 | | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 3, CVT_Done }, |
2620 | | // Convert__Reg1_0__u64_0Imm1_3 |
2621 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 3, CVT_Done }, |
2622 | | // Convert__Reg1_0__regW15__regW15 |
2623 | | { CVT_95_Reg, 0, CVT_regW15, 0, CVT_regW15, 0, CVT_Done }, |
2624 | | // Convert__Reg1_0__s32_0Imm1_3 |
2625 | | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 3, CVT_Done }, |
2626 | | // Convert__Reg1_0__Reg1_0__Reg1_0 |
2627 | | { CVT_95_Reg, 0, CVT_95_Reg, 0, CVT_95_Reg, 0, CVT_Done }, |
2628 | | // Convert__Reg1_0__Reg1_4 |
2629 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Done }, |
2630 | | // Convert__Reg1_0__Tie0_0_0__Reg1_4__imm_95_0 |
2631 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done }, |
2632 | | // Convert__Reg1_0__Reg1_4__imm_95_0 |
2633 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done }, |
2634 | | // Convert__Reg1_0__Reg1_2__b30_2Imm1_5 |
2635 | | { CVT_95_Reg, 0, CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_Done }, |
2636 | | // Convert__Reg1_0__Tie0_0_0__u16_0Imm1_5 |
2637 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 5, CVT_Done }, |
2638 | | // Convert__Reg1_0__u16_0Imm1_5 |
2639 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
2640 | | // Convert__Reg1_0__imm_95_0__Reg1_4 |
2641 | | { CVT_95_Reg, 0, CVT_imm_95_0, 0, CVT_95_Reg, 4, CVT_Done }, |
2642 | | // Convert__Reg1_0__imm_95__MINUS_1__Reg1_4 |
2643 | | { CVT_95_Reg, 0, CVT_imm_95__MINUS_1, 0, CVT_95_Reg, 4, CVT_Done }, |
2644 | | // Convert__Reg1_0__Reg1_4__imm_95_255 |
2645 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_imm_95_255, 0, CVT_Done }, |
2646 | | // Convert__Reg1_0__Reg1_4__Reg1_5 |
2647 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done }, |
2648 | | // Convert__Reg1_0__Imm1_5 |
2649 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
2650 | | // Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5 |
2651 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Done }, |
2652 | | // Convert__Reg1_0__u29_3Imm1_5 |
2653 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
2654 | | // Convert__Reg1_0__u6_0Imm1_3__b30_2Imm1_6 |
2655 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 3, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
2656 | | // Convert__Reg1_0__Tie0_0_0__Reg1_5 |
2657 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_Done }, |
2658 | | // Convert__Reg1_0__s27_2Imm1_5 |
2659 | | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 5, CVT_Done }, |
2660 | | // Convert__Reg1_0__u32_0Imm1_5 |
2661 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
2662 | | // Convert__Reg1_0__u31_1Imm1_5 |
2663 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
2664 | | // Convert__Reg1_0__u30_2Imm1_5 |
2665 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
2666 | | // Convert__Reg1_0__Reg1_1__Reg1_5 |
2667 | | { CVT_95_Reg, 0, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_Done }, |
2668 | | // Convert__Reg1_0__Reg1_4__Reg1_6 |
2669 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_Done }, |
2670 | | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6 |
2671 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
2672 | | // Convert__Reg1_0__Reg1_5__Reg1_6 |
2673 | | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
2674 | | // Convert__Reg1_0__Reg1_4__u6_0Imm1_6 |
2675 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
2676 | | // Convert__Reg1_0__Reg1_4__u5_0Imm1_6 |
2677 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
2678 | | // Convert__Reg1_0__s32_0Imm1_5__Reg1_6 |
2679 | | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 6, CVT_Done }, |
2680 | | // Convert__Reg1_0__Reg1_4__s32_0Imm1_6 |
2681 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
2682 | | // Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6 |
2683 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
2684 | | // Convert__Reg1_0__Reg1_4__u4_0Imm1_6 |
2685 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
2686 | | // Convert__Reg1_0__Reg1_1__Tie0_0_0__Reg1_5__Reg1_6 |
2687 | | { CVT_95_Reg, 0, CVT_95_Reg, 1, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
2688 | | // Convert__Reg1_0__Reg1_1__Reg1_5__Reg1_6 |
2689 | | { CVT_95_Reg, 0, CVT_95_Reg, 1, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done }, |
2690 | | // Convert__Reg1_0__u32_0Imm1_6 |
2691 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 6, CVT_Done }, |
2692 | | // Convert__Reg1_0__s6_0Imm1_5__Reg1_6 |
2693 | | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 6, CVT_Done }, |
2694 | | // Convert__Reg1_0__Reg1_4__m32_0Imm1_6 |
2695 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
2696 | | // Convert__Reg1_0__Reg1_6 |
2697 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_Done }, |
2698 | | // Convert__Reg1_0__Tie0_0_0__Reg1_6 |
2699 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 6, CVT_Done }, |
2700 | | // Convert__Reg1_0__Reg1_5__u6_0Imm1_7 |
2701 | | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2702 | | // Convert__Reg1_0__Reg1_5__u5_0Imm1_7 |
2703 | | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2704 | | // Convert__Reg1_0__Reg1_6__Reg1_7 |
2705 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done }, |
2706 | | // Convert__Reg1_0__Reg1_7__Reg1_6 |
2707 | | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_Reg, 6, CVT_Done }, |
2708 | | // Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7 |
2709 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2710 | | // Convert__Reg1_0__s32_0Imm1_5__s8_0Imm1_7 |
2711 | | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 5, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2712 | | // Convert__Reg1_0__s8_0Imm1_5__u32_0Imm1_7 |
2713 | | { CVT_95_Reg, 0, CVT_95_addSignedImmOperands, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2714 | | // Convert__Reg1_0__u10_0Imm1_5 |
2715 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Done }, |
2716 | | // Convert__Reg1_0__Tie0_0_0__Reg1_4__s32_0Imm1_7 |
2717 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2718 | | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7 |
2719 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_Reg, 7, CVT_Done }, |
2720 | | // Convert__Reg1_0__Reg1_4__Tie0_0_0__u32_0Imm1_7 |
2721 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 7, CVT_Done }, |
2722 | | // Convert__Reg1_0__Reg1_4__s30_2Imm1_7 |
2723 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2724 | | // Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7 |
2725 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_Reg, 7, CVT_Done }, |
2726 | | // Convert__Reg1_0__Reg1_4__u32_0Imm1_7 |
2727 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 7, CVT_Done }, |
2728 | | // Convert__Reg1_0__u29_3Imm1_7 |
2729 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 7, CVT_Done }, |
2730 | | // Convert__Reg1_0__Reg1_4__s29_3Imm1_7 |
2731 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2732 | | // Convert__Reg1_0__Tie0_0_0__Reg1_4__s31_1Imm1_7 |
2733 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2734 | | // Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7 |
2735 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2736 | | // Convert__Reg1_0__Reg1_4__Reg1_5__u2_0Imm1_7 |
2737 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2738 | | // Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7 |
2739 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2740 | | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_7 |
2741 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_Done }, |
2742 | | // Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7 |
2743 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2744 | | // Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7 |
2745 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2746 | | // Convert__Reg1_0__Tie0_0_0__Reg1_5__u32_0Imm1_7 |
2747 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2748 | | // Convert__Reg1_0__Reg1_5__u32_0Imm1_7 |
2749 | | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2750 | | // Convert__Reg1_0__Reg1_5__u8_0Imm1_7 |
2751 | | { CVT_95_Reg, 0, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2752 | | // Convert__Reg1_0__u5_0Imm1_5__u5_0Imm1_7 |
2753 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 7, CVT_Done }, |
2754 | | // Convert__Reg1_0__u32_0Imm1_7 |
2755 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 7, CVT_Done }, |
2756 | | // Convert__Reg1_0__Reg1_4__s32_0Imm1_7 |
2757 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2758 | | // Convert__Reg1_0__Reg1_4__s31_1Imm1_7 |
2759 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2760 | | // Convert__Reg1_0__u31_1Imm1_7 |
2761 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 7, CVT_Done }, |
2762 | | // Convert__Reg1_0__u30_2Imm1_7 |
2763 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 7, CVT_Done }, |
2764 | | // Convert__Reg1_0__Reg1_4__s32_0Imm1_6__Reg1_7 |
2765 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 7, CVT_Done }, |
2766 | | // Convert__Reg1_0__Reg1_4__Reg1_5__s32_0Imm1_7 |
2767 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2768 | | // Convert__Reg1_0__Reg1_4__s4_0Imm1_7 |
2769 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2770 | | // Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_7 |
2771 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done }, |
2772 | | // Convert__Reg1_0__Reg1_7__Reg1_8 |
2773 | | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_Done }, |
2774 | | // Convert__Reg1_0__Reg1_6__s32_0Imm1_8 |
2775 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2776 | | // Convert__Reg1_0__Reg1_6__s8_0Imm1_8 |
2777 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2778 | | // Convert__Reg1_0__Reg1_6__u8_0Imm1_8 |
2779 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
2780 | | // Convert__Reg1_0__Reg1_6__u32_0Imm1_8 |
2781 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
2782 | | // Convert__Reg1_0__Reg1_6__u7_0Imm1_8 |
2783 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
2784 | | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u2_0Imm1_8 |
2785 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
2786 | | // Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1_0_0 |
2787 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_Tied, Tie1_0_0, CVT_Done }, |
2788 | | // Convert__Reg1_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8 |
2789 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
2790 | | // Convert__Reg1_0__Tie0_0_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8 |
2791 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
2792 | | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8 |
2793 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2794 | | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8 |
2795 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2796 | | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8 |
2797 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2798 | | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8 |
2799 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2800 | | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8 |
2801 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
2802 | | // Convert__Reg1_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8 |
2803 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
2804 | | // Convert__Reg1_0__Tie0_0_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8 |
2805 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
2806 | | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8 |
2807 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2808 | | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8 |
2809 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2810 | | // Convert__Reg1_0__Reg1_4__s32_0Imm1_6__s8_0Imm1_8 |
2811 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 6, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2812 | | // Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8 |
2813 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 8, CVT_Done }, |
2814 | | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8 |
2815 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2816 | | // Convert__Reg1_0__Reg1_7__s32_0Imm1_9 |
2817 | | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
2818 | | // Convert__Reg1_0__Reg1_7__u32_0Imm1_9 |
2819 | | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done }, |
2820 | | // Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8 |
2821 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_Done }, |
2822 | | // Convert__Reg1_0__Reg1_4__Reg1_7 |
2823 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_Done }, |
2824 | | // Convert__Reg1_0__Tie0_0_0__Reg1_7 |
2825 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_Done }, |
2826 | | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__Reg1_7 |
2827 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done }, |
2828 | | // Convert__Reg1_0__Reg1_6__s6_0Imm1_9 |
2829 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
2830 | | // Convert__Reg1_0__Reg1_4__Tie0_0_7__Reg1_8 |
2831 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_7, CVT_95_Reg, 8, CVT_Done }, |
2832 | | // Convert__Reg1_0__Reg1_6__s4_0Imm1_9 |
2833 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
2834 | | // Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9 |
2835 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_Tied, Tie1_0_0, CVT_95_Reg, 9, CVT_Done }, |
2836 | | // Convert__Reg1_0__Reg1_6__Reg1_9 |
2837 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_Done }, |
2838 | | // Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9 |
2839 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_Reg, 9, CVT_Done }, |
2840 | | // Convert__Reg1_0__Reg1_8__Reg1_9 |
2841 | | { CVT_95_Reg, 0, CVT_95_Reg, 8, CVT_95_Reg, 9, CVT_Done }, |
2842 | | // Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8 |
2843 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 8, CVT_Done }, |
2844 | | // Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10 |
2845 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addImmOperands, 10, CVT_Done }, |
2846 | | // Convert__Reg1_0__u32_0Imm1_5__Reg1_8__Reg1_9 |
2847 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_95_Reg, 9, CVT_Done }, |
2848 | | // Convert__Reg1_0__Reg1_4__Reg1_7__s32_0Imm1_9 |
2849 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
2850 | | // Convert__Reg1_0__Reg1_4__u6_2Imm1_8__Reg1_9 |
2851 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 8, CVT_95_Reg, 9, CVT_Done }, |
2852 | | // Convert__Reg1_0__Reg1_4__Reg1_7__u32_0Imm1_9 |
2853 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done }, |
2854 | | // Convert__Reg1_0__Reg1_4__s32_0Imm1_8__Reg1_9 |
2855 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 9, CVT_Done }, |
2856 | | // Convert__Reg1_0__Reg1_4__Tie0_0_7__s32_0Imm1_9 |
2857 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_7, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
2858 | | // Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8 |
2859 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addImmOperands, 6, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2860 | | // Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10 |
2861 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 10, CVT_Done }, |
2862 | | // Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10 |
2863 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_Done }, |
2864 | | // Convert__Reg1_0__Reg1_9__Reg1_10 |
2865 | | { CVT_95_Reg, 0, CVT_95_Reg, 9, CVT_95_Reg, 10, CVT_Done }, |
2866 | | // Convert__Reg1_0__Tie0_0_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11 |
2867 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 4, CVT_95_addImmOperands, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
2868 | | // Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11 |
2869 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
2870 | | // Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_9 |
2871 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_Done }, |
2872 | | // Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10 |
2873 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_Tied, Tie0_0_8, CVT_95_addImmOperands, 10, CVT_Done }, |
2874 | | // Convert__Reg1_0__u32_0Imm1_5__Reg1_8__u6_0Imm1_10 |
2875 | | { CVT_95_Reg, 0, CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_95_addImmOperands, 10, CVT_Done }, |
2876 | | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_11 |
2877 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_Reg, 11, CVT_Done }, |
2878 | | // Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11 |
2879 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_Reg, 11, CVT_Done }, |
2880 | | // Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12 |
2881 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_Reg, 12, CVT_Done }, |
2882 | | // Convert__Reg1_0__Reg1_7__Reg1_10 |
2883 | | { CVT_95_Reg, 0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_Done }, |
2884 | | // Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0 |
2885 | | { CVT_95_Reg, 0, CVT_95_Reg, 9, CVT_95_Reg, 6, CVT_Tied, Tie1_0_0, CVT_Done }, |
2886 | | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8__Reg1_12 |
2887 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
2888 | | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8__Reg1_12 |
2889 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
2890 | | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8__Reg1_12 |
2891 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
2892 | | // Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8__Reg1_12 |
2893 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
2894 | | // Convert__Reg1_0__Reg1_6__Reg1_9__u3_0Imm1_13 |
2895 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_addImmOperands, 13, CVT_Done }, |
2896 | | // Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__Reg1_13 |
2897 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_Reg, 13, CVT_Done }, |
2898 | | // Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13 |
2899 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_addImmOperands, 13, CVT_Done }, |
2900 | | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8__Reg1_12 |
2901 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
2902 | | // Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12 |
2903 | | { CVT_95_Reg, 0, CVT_95_Reg, 4, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 8, CVT_95_Reg, 12, CVT_Done }, |
2904 | | // Convert__Reg1_0__Tie0_0_0__Reg1_8__Reg1_11 |
2905 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 8, CVT_95_Reg, 11, CVT_Done }, |
2906 | | // Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0 |
2907 | | { CVT_95_Reg, 0, CVT_95_Reg, 10, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_Tied, Tie1_0_0, CVT_Done }, |
2908 | | // Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u3_0Imm1_14 |
2909 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_addImmOperands, 14, CVT_Done }, |
2910 | | // Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14 |
2911 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_addImmOperands, 14, CVT_Done }, |
2912 | | // Convert__Reg1_0__Reg1_8__Reg1_12 |
2913 | | { CVT_95_Reg, 0, CVT_95_Reg, 8, CVT_95_Reg, 12, CVT_Done }, |
2914 | | // Convert__Reg1_0__Reg1_12__Reg1_6__Reg1_9__Tie1_0_0 |
2915 | | { CVT_95_Reg, 0, CVT_95_Reg, 12, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_Tied, Tie1_0_0, CVT_Done }, |
2916 | | // Convert__Reg1_0__Reg1_3__Reg1_7__Reg1_10 |
2917 | | { CVT_95_Reg, 0, CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_Done }, |
2918 | | // Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13 |
2919 | | { CVT_95_Reg, 0, CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_addImmOperands, 13, CVT_Done }, |
2920 | | // Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u2_0Imm1_14 |
2921 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_addImmOperands, 14, CVT_Done }, |
2922 | | // Convert__Reg1_0__Tie0_0_6__Reg1_9__Reg1_12 |
2923 | | { CVT_95_Reg, 0, CVT_Tied, Tie0_0_6, CVT_95_Reg, 9, CVT_95_Reg, 12, CVT_Done }, |
2924 | | // Convert__regR29__Tie0_0_0__u11_3Imm1_3 |
2925 | | { CVT_regR29, 0, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 3, CVT_Done }, |
2926 | | // Convert__Reg1_2__Tie0_0_0__u11_3Imm1_4 |
2927 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 4, CVT_Done }, |
2928 | | // Convert_NoOperands |
2929 | | { CVT_Done }, |
2930 | | // Convert__a30_2Imm1_1 |
2931 | | { CVT_95_addSignedImmOperands, 1, CVT_Done }, |
2932 | | // Convert__Reg1_1 |
2933 | | { CVT_95_Reg, 1, CVT_Done }, |
2934 | | // Convert__Reg1_2 |
2935 | | { CVT_95_Reg, 2, CVT_Done }, |
2936 | | // Convert__Reg1_2__Tie0_0_0__sgp10Const1_3 |
2937 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addsgp10ConstOperands, 3, CVT_Done }, |
2938 | | // Convert__Reg1_2__Tie0_2_2 |
2939 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_Done }, |
2940 | | // Convert__Reg1_2__Tie0_0_0 |
2941 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_Done }, |
2942 | | // Convert__Reg1_2__imm_95_0 |
2943 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done }, |
2944 | | // Convert__Reg1_2__u11_3Imm1_5 |
2945 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_Done }, |
2946 | | // Convert__Reg1_2__Reg1_3 |
2947 | | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done }, |
2948 | | // Convert__regD15__regR30 |
2949 | | { CVT_regD15, 0, CVT_regR30, 0, CVT_Done }, |
2950 | | // Convert__imm_95_0 |
2951 | | { CVT_imm_95_0, 0, CVT_Done }, |
2952 | | // Convert__regD15__Reg1_2__regR30 |
2953 | | { CVT_regD15, 0, CVT_95_Reg, 2, CVT_regR30, 0, CVT_Done }, |
2954 | | // Convert__regD15__Reg1_3__regR30 |
2955 | | { CVT_regD15, 0, CVT_95_Reg, 3, CVT_regR30, 0, CVT_Done }, |
2956 | | // Convert__Reg1_2__a30_2Imm1_5 |
2957 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_Done }, |
2958 | | // Convert__Reg1_2__Reg1_5 |
2959 | | { CVT_95_Reg, 2, CVT_95_Reg, 5, CVT_Done }, |
2960 | | // Convert__Reg1_2__b30_2Imm1_5 |
2961 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_Done }, |
2962 | | // Convert__Reg1_3__a30_2Imm1_6 |
2963 | | { CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
2964 | | // Convert__Reg1_3__Reg1_6 |
2965 | | { CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_Done }, |
2966 | | // Convert__Reg1_3__b30_2Imm1_6 |
2967 | | { CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
2968 | | // Convert__Reg1_4__Reg1_2__Reg1_6 |
2969 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_Done }, |
2970 | | // Convert__Reg1_4__Reg1_2__Reg1_6__imm_95_0 |
2971 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_imm_95_0, 0, CVT_Done }, |
2972 | | // Convert__Reg1_5__Reg1_3__Reg1_7 |
2973 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_Done }, |
2974 | | // Convert__Reg1_5__Reg1_3__Reg1_7__imm_95_0 |
2975 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_imm_95_0, 0, CVT_Done }, |
2976 | | // Convert__Reg1_2__b30_2Imm1_7 |
2977 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2978 | | // Convert__Reg1_2__Reg1_7 |
2979 | | { CVT_95_Reg, 2, CVT_95_Reg, 7, CVT_Done }, |
2980 | | // Convert__Reg1_4__Reg1_2__s32_0Imm1_7 |
2981 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
2982 | | // Convert__Reg1_3__b30_2Imm1_8 |
2983 | | { CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2984 | | // Convert__Reg1_3__Reg1_8 |
2985 | | { CVT_95_Reg, 3, CVT_95_Reg, 8, CVT_Done }, |
2986 | | // Convert__Reg1_5__Reg1_3__s32_0Imm1_8 |
2987 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
2988 | | // Convert__Reg1_6__Reg1_2__Reg1_8 |
2989 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_Done }, |
2990 | | // Convert__Reg1_6__Reg1_2__Reg1_8__imm_95_0 |
2991 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_Done }, |
2992 | | // Convert__Reg1_7__Reg1_3__Reg1_9 |
2993 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_Done }, |
2994 | | // Convert__Reg1_7__Reg1_3__Reg1_9__imm_95_0 |
2995 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_imm_95_0, 0, CVT_Done }, |
2996 | | // Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9 |
2997 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_imm_95_0, 0, CVT_95_Reg, 9, CVT_Done }, |
2998 | | // Convert__Reg1_2__Reg1_8__imm_95_0 |
2999 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_Done }, |
3000 | | // Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0 |
3001 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_Done }, |
3002 | | // Convert__Reg1_4__Reg1_2__Reg1_8 |
3003 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_Done }, |
3004 | | // Convert__Reg1_2__b30_2Imm1_9 |
3005 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
3006 | | // Convert__Reg1_2__Reg1_9 |
3007 | | { CVT_95_Reg, 2, CVT_95_Reg, 9, CVT_Done }, |
3008 | | // Convert__Reg1_6__Reg1_2__s32_0Imm1_9 |
3009 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
3010 | | // Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10 |
3011 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_imm_95_0, 0, CVT_95_Reg, 10, CVT_Done }, |
3012 | | // Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0 |
3013 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_imm_95_0, 0, CVT_Done }, |
3014 | | // Convert__Reg1_5__Reg1_3__Reg1_9 |
3015 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_Done }, |
3016 | | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_9_9__imm_95_0 |
3017 | | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_9_9, CVT_imm_95_0, 0, CVT_Done }, |
3018 | | // Convert__Reg1_3__b30_2Imm1_10 |
3019 | | { CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 10, CVT_Done }, |
3020 | | // Convert__Reg1_3__Reg1_10 |
3021 | | { CVT_95_Reg, 3, CVT_95_Reg, 10, CVT_Done }, |
3022 | | // Convert__Reg1_7__Reg1_3__s32_0Imm1_10 |
3023 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_addSignedImmOperands, 10, CVT_Done }, |
3024 | | // Convert__Reg1_2__u32_0Imm1_7__Reg1_10 |
3025 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 7, CVT_95_Reg, 10, CVT_Done }, |
3026 | | // Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10 |
3027 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_imm_95_0, 0, CVT_95_addSignedImmOperands, 10, CVT_Done }, |
3028 | | // Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9 |
3029 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_Reg, 9, CVT_Done }, |
3030 | | // Convert__Reg1_4__Reg1_2__u32_0Imm1_9 |
3031 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_addImmOperands, 9, CVT_Done }, |
3032 | | // Convert__Reg1_3__u32_0Imm1_8__Reg1_11 |
3033 | | { CVT_95_Reg, 3, CVT_95_addImmOperands, 8, CVT_95_Reg, 11, CVT_Done }, |
3034 | | // Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11 |
3035 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_imm_95_0, 0, CVT_95_addSignedImmOperands, 11, CVT_Done }, |
3036 | | // Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10 |
3037 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_Reg, 10, CVT_Done }, |
3038 | | // Convert__Reg1_5__Reg1_3__u32_0Imm1_10 |
3039 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_addImmOperands, 10, CVT_Done }, |
3040 | | // Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_11 |
3041 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_imm_95_0, 0, CVT_95_Reg, 11, CVT_Done }, |
3042 | | // Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9 |
3043 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 9, CVT_Done }, |
3044 | | // Convert__Reg1_4__Reg1_2__Reg1_8__s32_0Imm1_10 |
3045 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addSignedImmOperands, 10, CVT_Done }, |
3046 | | // Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_10_10__imm_95_0 |
3047 | | { CVT_95_Reg, 4, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_10_10, CVT_imm_95_0, 0, CVT_Done }, |
3048 | | // Convert__Reg1_4__Reg1_2__Reg1_10__imm_95_0 |
3049 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_imm_95_0, 0, CVT_Done }, |
3050 | | // Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11 |
3051 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_95_Reg, 11, CVT_Done }, |
3052 | | // Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0 |
3053 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_imm_95_0, 0, CVT_Done }, |
3054 | | // Convert__Reg1_6__Reg1_2__Reg1_10 |
3055 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_Done }, |
3056 | | // Convert__Reg1_2__b13_2Imm1_11 |
3057 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 11, CVT_Done }, |
3058 | | // Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_12 |
3059 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_imm_95_0, 0, CVT_95_Reg, 12, CVT_Done }, |
3060 | | // Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10 |
3061 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_Reg, 10, CVT_Done }, |
3062 | | // Convert__Reg1_5__Reg1_3__Reg1_9__s32_0Imm1_11 |
3063 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addSignedImmOperands, 11, CVT_Done }, |
3064 | | // Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_11_11__imm_95_0 |
3065 | | { CVT_95_Reg, 5, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_11_11, CVT_imm_95_0, 0, CVT_Done }, |
3066 | | // Convert__Reg1_5__Reg1_3__Reg1_11__imm_95_0 |
3067 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_imm_95_0, 0, CVT_Done }, |
3068 | | // Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12 |
3069 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_imm_95_0, 0, CVT_95_Reg, 12, CVT_Done }, |
3070 | | // Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0 |
3071 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_imm_95_0, 0, CVT_Done }, |
3072 | | // Convert__Reg1_7__Reg1_3__Reg1_11 |
3073 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_Done }, |
3074 | | // Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12 |
3075 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
3076 | | // Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12 |
3077 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 9, CVT_95_Reg, 12, CVT_Done }, |
3078 | | // Convert__Reg1_2__Reg1_6__u32_0Imm1_9__Reg1_12 |
3079 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
3080 | | // Convert__Reg1_2__Reg1_6__u29_3Imm1_9__Reg1_12 |
3081 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
3082 | | // Convert__Reg1_2__Reg1_6__u31_1Imm1_9__Reg1_12 |
3083 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
3084 | | // Convert__Reg1_2__Reg1_6__u30_2Imm1_9__Reg1_12 |
3085 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
3086 | | // Convert__Reg1_2__Reg1_8__s4_0Imm1_11 |
3087 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addSignedImmOperands, 11, CVT_Done }, |
3088 | | // Convert__Reg1_8__Reg1_2__Tie0_0_0__Reg1_11 |
3089 | | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 11, CVT_Done }, |
3090 | | // Convert__Reg1_4__Reg1_2__Reg1_8__u29_3Imm1_11 |
3091 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
3092 | | // Convert__Reg1_4__Reg1_2__Reg1_8__u32_0Imm1_11 |
3093 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
3094 | | // Convert__Reg1_4__Reg1_2__Reg1_8__u31_1Imm1_11 |
3095 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
3096 | | // Convert__Reg1_4__Reg1_2__Reg1_8__u30_2Imm1_11 |
3097 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_Done }, |
3098 | | // Convert__Reg1_4__Reg1_2__Reg1_8__s4_0Imm1_11 |
3099 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addSignedImmOperands, 11, CVT_Done }, |
3100 | | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__Reg1_11 |
3101 | | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_Reg, 11, CVT_Done }, |
3102 | | // Convert__Reg1_2__u32_0Imm1_9__Reg1_12 |
3103 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
3104 | | // Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12 |
3105 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_imm_95_0, 0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
3106 | | // Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11 |
3107 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_Reg, 11, CVT_Done }, |
3108 | | // Convert__Reg1_6__Reg1_2__u32_0Imm1_11 |
3109 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_addImmOperands, 11, CVT_Done }, |
3110 | | // Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13 |
3111 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
3112 | | // Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13 |
3113 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_Reg, 10, CVT_95_Reg, 13, CVT_Done }, |
3114 | | // Convert__Reg1_3__Reg1_7__u32_0Imm1_10__Reg1_13 |
3115 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
3116 | | // Convert__Reg1_3__Reg1_7__u29_3Imm1_10__Reg1_13 |
3117 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
3118 | | // Convert__Reg1_3__Reg1_7__u31_1Imm1_10__Reg1_13 |
3119 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
3120 | | // Convert__Reg1_3__Reg1_7__u30_2Imm1_10__Reg1_13 |
3121 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
3122 | | // Convert__Reg1_5__Reg1_3__Reg1_9__u29_3Imm1_12 |
3123 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_Done }, |
3124 | | // Convert__Reg1_5__Reg1_3__Reg1_9__u32_0Imm1_12 |
3125 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_Done }, |
3126 | | // Convert__Reg1_5__Reg1_3__Reg1_9__u31_1Imm1_12 |
3127 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_Done }, |
3128 | | // Convert__Reg1_5__Reg1_3__Reg1_9__u30_2Imm1_12 |
3129 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_Done }, |
3130 | | // Convert__Reg1_5__Reg1_3__Reg1_9__s4_0Imm1_12 |
3131 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
3132 | | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__Reg1_12 |
3133 | | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_Reg, 12, CVT_Done }, |
3134 | | // Convert__Reg1_3__u32_0Imm1_10__Reg1_13 |
3135 | | { CVT_95_Reg, 3, CVT_95_addImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
3136 | | // Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13 |
3137 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_imm_95_0, 0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
3138 | | // Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12 |
3139 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_Reg, 12, CVT_Done }, |
3140 | | // Convert__Reg1_7__Reg1_3__u32_0Imm1_12 |
3141 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_addImmOperands, 12, CVT_Done }, |
3142 | | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13 |
3143 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
3144 | | // Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11 |
3145 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_6_6, CVT_95_Reg, 11, CVT_Done }, |
3146 | | // Convert__Reg1_2__Reg1_6__u6_0Imm1_9__s32_0Imm1_13 |
3147 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
3148 | | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_0Imm1_10__Reg1_13 |
3149 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
3150 | | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_3Imm1_10__Reg1_13 |
3151 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
3152 | | // Convert__Reg1_2__Reg1_6__u6_1Imm1_9__s32_0Imm1_13 |
3153 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
3154 | | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_1Imm1_10__Reg1_13 |
3155 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
3156 | | // Convert__Reg1_2__Reg1_6__u6_2Imm1_9__s32_0Imm1_13 |
3157 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addImmOperands, 9, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
3158 | | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_2Imm1_10__Reg1_13 |
3159 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 13, CVT_Done }, |
3160 | | // Convert__Reg1_8__Reg1_2__Tie0_0_0__s3_0Imm1_12 |
3161 | | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
3162 | | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_3Imm1_12 |
3163 | | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
3164 | | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_0Imm1_12 |
3165 | | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
3166 | | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_1Imm1_12 |
3167 | | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
3168 | | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_2Imm1_12 |
3169 | | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
3170 | | // Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s3_0Imm1_12 |
3171 | | { CVT_95_Reg, 4, CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
3172 | | // Convert__Reg1_6__Reg1_2__Reg1_10__s32_0Imm1_12 |
3173 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addSignedImmOperands, 12, CVT_Done }, |
3174 | | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14 |
3175 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
3176 | | // Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12 |
3177 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_7_7, CVT_95_Reg, 12, CVT_Done }, |
3178 | | // Convert__Reg1_3__Reg1_7__u6_0Imm1_10__s32_0Imm1_14 |
3179 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
3180 | | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_0Imm1_11__Reg1_14 |
3181 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
3182 | | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_3Imm1_11__Reg1_14 |
3183 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
3184 | | // Convert__Reg1_3__Reg1_7__u6_1Imm1_10__s32_0Imm1_14 |
3185 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
3186 | | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_1Imm1_11__Reg1_14 |
3187 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
3188 | | // Convert__Reg1_3__Reg1_7__u6_2Imm1_10__s32_0Imm1_14 |
3189 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addImmOperands, 10, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
3190 | | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_2Imm1_11__Reg1_14 |
3191 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
3192 | | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_3Imm1_13 |
3193 | | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
3194 | | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_0Imm1_13 |
3195 | | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
3196 | | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_1Imm1_13 |
3197 | | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
3198 | | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_2Imm1_13 |
3199 | | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
3200 | | // Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s3_0Imm1_13 |
3201 | | { CVT_95_Reg, 5, CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
3202 | | // Convert__Reg1_7__Reg1_3__Reg1_11__s32_0Imm1_13 |
3203 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
3204 | | // Convert__Reg1_4__b30_2Imm1_14 |
3205 | | { CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
3206 | | // Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14 |
3207 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_addSignedImmOperands, 9, CVT_95_Reg, 14, CVT_Done }, |
3208 | | // Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_14 |
3209 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 9, CVT_95_Reg, 14, CVT_Done }, |
3210 | | // Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13 |
3211 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addSignedImmOperands, 13, CVT_Done }, |
3212 | | // Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13 |
3213 | | { CVT_95_Reg, 4, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_Reg, 13, CVT_Done }, |
3214 | | // Convert__Reg1_2__Reg1_8__u32_0Imm1_11__Reg1_14 |
3215 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
3216 | | // Convert__Reg1_2__Reg1_8__u29_3Imm1_11__Reg1_14 |
3217 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
3218 | | // Convert__Reg1_2__Reg1_8__u31_1Imm1_11__Reg1_14 |
3219 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
3220 | | // Convert__Reg1_2__Reg1_8__u30_2Imm1_11__Reg1_14 |
3221 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_Reg, 14, CVT_Done }, |
3222 | | // Convert__Reg1_6__Reg1_2__Reg1_10__u29_3Imm1_13 |
3223 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addImmOperands, 13, CVT_Done }, |
3224 | | // Convert__Reg1_6__Reg1_2__Reg1_10__u32_0Imm1_13 |
3225 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addImmOperands, 13, CVT_Done }, |
3226 | | // Convert__Reg1_6__Reg1_2__Reg1_10__u31_1Imm1_13 |
3227 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addImmOperands, 13, CVT_Done }, |
3228 | | // Convert__Reg1_6__Reg1_2__Reg1_10__u30_2Imm1_13 |
3229 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_addImmOperands, 13, CVT_Done }, |
3230 | | // Convert__Reg1_5__b30_2Imm1_15 |
3231 | | { CVT_95_Reg, 5, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
3232 | | // Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15 |
3233 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 15, CVT_Done }, |
3234 | | // Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_15 |
3235 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_Reg, 10, CVT_95_Reg, 15, CVT_Done }, |
3236 | | // Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14 |
3237 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
3238 | | // Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14 |
3239 | | { CVT_95_Reg, 5, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_Reg, 14, CVT_Done }, |
3240 | | // Convert__Reg1_3__Reg1_9__u32_0Imm1_12__Reg1_15 |
3241 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
3242 | | // Convert__Reg1_3__Reg1_9__u29_3Imm1_12__Reg1_15 |
3243 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
3244 | | // Convert__Reg1_3__Reg1_9__u31_1Imm1_12__Reg1_15 |
3245 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
3246 | | // Convert__Reg1_3__Reg1_9__u30_2Imm1_12__Reg1_15 |
3247 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
3248 | | // Convert__Reg1_7__Reg1_3__Reg1_11__u29_3Imm1_14 |
3249 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addImmOperands, 14, CVT_Done }, |
3250 | | // Convert__Reg1_7__Reg1_3__Reg1_11__u32_0Imm1_14 |
3251 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addImmOperands, 14, CVT_Done }, |
3252 | | // Convert__Reg1_7__Reg1_3__Reg1_11__u31_1Imm1_14 |
3253 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addImmOperands, 14, CVT_Done }, |
3254 | | // Convert__Reg1_7__Reg1_3__Reg1_11__u30_2Imm1_14 |
3255 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_addImmOperands, 14, CVT_Done }, |
3256 | | // Convert__Reg1_6__Reg1_9__b30_2Imm1_15 |
3257 | | { CVT_95_Reg, 6, CVT_95_Reg, 9, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
3258 | | // Convert__Reg1_6__Reg1_7__b30_2Imm1_15 |
3259 | | { CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
3260 | | // Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15 |
3261 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 10, CVT_95_Reg, 15, CVT_Done }, |
3262 | | // Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_15 |
3263 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_Reg, 15, CVT_Done }, |
3264 | | // Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_13 |
3265 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_Reg, 13, CVT_Done }, |
3266 | | // Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15 |
3267 | | { CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_addImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
3268 | | // Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14 |
3269 | | { CVT_95_Reg, 4, CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_Reg, 10, CVT_95_addImmOperands, 14, CVT_Done }, |
3270 | | // Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14 |
3271 | | { CVT_95_Reg, 4, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
3272 | | // Convert__Reg1_2__Reg1_8__u6_0Imm1_11__s32_0Imm1_15 |
3273 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
3274 | | // Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_0Imm1_12__Reg1_15 |
3275 | | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
3276 | | // Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_3Imm1_12__Reg1_15 |
3277 | | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
3278 | | // Convert__Reg1_2__Reg1_8__u6_1Imm1_11__s32_0Imm1_15 |
3279 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
3280 | | // Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_1Imm1_12__Reg1_15 |
3281 | | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
3282 | | // Convert__Reg1_2__Reg1_8__u6_2Imm1_11__s32_0Imm1_15 |
3283 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_addImmOperands, 11, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
3284 | | // Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_2Imm1_12__Reg1_15 |
3285 | | { CVT_95_Reg, 8, CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 12, CVT_95_Reg, 15, CVT_Done }, |
3286 | | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_3Imm1_14 |
3287 | | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
3288 | | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_0Imm1_14 |
3289 | | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
3290 | | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_1Imm1_14 |
3291 | | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
3292 | | // Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_2Imm1_14 |
3293 | | { CVT_95_Reg, 6, CVT_95_Reg, 10, CVT_95_Reg, 2, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 14, CVT_Done }, |
3294 | | // Convert__Reg1_7__Reg1_10__b30_2Imm1_16 |
3295 | | { CVT_95_Reg, 7, CVT_95_Reg, 10, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
3296 | | // Convert__Reg1_7__Reg1_8__b30_2Imm1_16 |
3297 | | { CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
3298 | | // Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16 |
3299 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 11, CVT_95_Reg, 16, CVT_Done }, |
3300 | | // Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16 |
3301 | | { CVT_95_Reg, 3, CVT_95_Reg, 7, CVT_95_Reg, 9, CVT_95_addImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
3302 | | // Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15 |
3303 | | { CVT_95_Reg, 5, CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_Reg, 11, CVT_95_addImmOperands, 15, CVT_Done }, |
3304 | | // Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15 |
3305 | | { CVT_95_Reg, 5, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
3306 | | // Convert__Reg1_3__Reg1_9__u6_0Imm1_12__s32_0Imm1_16 |
3307 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
3308 | | // Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_0Imm1_13__Reg1_16 |
3309 | | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
3310 | | // Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_3Imm1_13__Reg1_16 |
3311 | | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
3312 | | // Convert__Reg1_3__Reg1_9__u6_1Imm1_12__s32_0Imm1_16 |
3313 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
3314 | | // Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_1Imm1_13__Reg1_16 |
3315 | | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
3316 | | // Convert__Reg1_3__Reg1_9__u6_2Imm1_12__s32_0Imm1_16 |
3317 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_addImmOperands, 12, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
3318 | | // Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_2Imm1_13__Reg1_16 |
3319 | | { CVT_95_Reg, 9, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 13, CVT_95_Reg, 16, CVT_Done }, |
3320 | | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_3Imm1_15 |
3321 | | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
3322 | | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_0Imm1_15 |
3323 | | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
3324 | | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_1Imm1_15 |
3325 | | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
3326 | | // Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_2Imm1_15 |
3327 | | { CVT_95_Reg, 7, CVT_95_Reg, 11, CVT_95_Reg, 3, CVT_Tied, Tie1_0_0, CVT_95_addSignedImmOperands, 15, CVT_Done }, |
3328 | | // Convert__Reg1_6__n1Const1_10__b30_2Imm1_16 |
3329 | | { CVT_95_Reg, 6, CVT_95_addn1ConstOperands, 10, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
3330 | | // Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16 |
3331 | | { CVT_95_Reg, 6, CVT_95_addImmOperands, 10, CVT_95_addSignedImmOperands, 16, CVT_Done }, |
3332 | | // Convert__Reg1_7__n1Const1_11__b30_2Imm1_17 |
3333 | | { CVT_95_Reg, 7, CVT_95_addn1ConstOperands, 11, CVT_95_addSignedImmOperands, 17, CVT_Done }, |
3334 | | // Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17 |
3335 | | { CVT_95_Reg, 7, CVT_95_addImmOperands, 11, CVT_95_addSignedImmOperands, 17, CVT_Done }, |
3336 | | // Convert__Reg1_2__Reg1_10__Reg1_11__Reg1_12 |
3337 | | { CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_Reg, 11, CVT_95_Reg, 12, CVT_Done }, |
3338 | | // Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17 |
3339 | | { CVT_95_Reg, 2, CVT_95_Reg, 8, CVT_95_Reg, 10, CVT_95_addImmOperands, 14, CVT_95_Reg, 17, CVT_Done }, |
3340 | | // Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16 |
3341 | | { CVT_95_Reg, 6, CVT_95_Reg, 2, CVT_95_Reg, 10, CVT_95_Reg, 12, CVT_95_addImmOperands, 16, CVT_Done }, |
3342 | | // Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18 |
3343 | | { CVT_95_Reg, 3, CVT_95_Reg, 9, CVT_95_Reg, 11, CVT_95_addImmOperands, 15, CVT_95_Reg, 18, CVT_Done }, |
3344 | | // Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17 |
3345 | | { CVT_95_Reg, 7, CVT_95_Reg, 3, CVT_95_Reg, 11, CVT_95_Reg, 13, CVT_95_addImmOperands, 17, CVT_Done }, |
3346 | | // Convert__u26_6Imm1_3 |
3347 | | { CVT_95_addImmOperands, 3, CVT_Done }, |
3348 | | // Convert__b30_2Imm1_1 |
3349 | | { CVT_95_addSignedImmOperands, 1, CVT_Done }, |
3350 | | // Convert__b30_2Imm1_2__Reg1_3 |
3351 | | { CVT_95_addSignedImmOperands, 2, CVT_95_Reg, 3, CVT_Done }, |
3352 | | // Convert__b30_2Imm1_2__u10_0Imm1_4 |
3353 | | { CVT_95_addSignedImmOperands, 2, CVT_95_addImmOperands, 4, CVT_Done }, |
3354 | | // Convert__Reg1_2__imm_95_0__Reg1_5 |
3355 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_Reg, 5, CVT_Done }, |
3356 | | // Convert__u32_0Imm1_3__Reg1_6 |
3357 | | { CVT_95_addImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
3358 | | // Convert__Reg1_2__imm_95_0__Reg1_6 |
3359 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_Reg, 6, CVT_Done }, |
3360 | | // Convert__Reg1_2__imm_95_0__s32_0Imm1_6 |
3361 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
3362 | | // Convert__Reg1_2__imm_95_0__u5_0Imm1_7 |
3363 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 7, CVT_Done }, |
3364 | | // Convert__u32_0Imm1_5__Reg1_8 |
3365 | | { CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
3366 | | // Convert__Reg1_2__s32_0Imm1_5__Reg1_8 |
3367 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
3368 | | // Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8 |
3369 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 8, CVT_Done }, |
3370 | | // Convert__Reg1_2__u32_0Imm1_5__Reg1_8 |
3371 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
3372 | | // Convert__Reg1_2__imm_95_0__u5_0Imm1_8 |
3373 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_addImmOperands, 8, CVT_Done }, |
3374 | | // Convert__Reg1_2__u32_0Imm1_5__Reg1_9 |
3375 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_Reg, 9, CVT_Done }, |
3376 | | // Convert__Reg1_2__u6_0Imm1_5__s32_0Imm1_9 |
3377 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
3378 | | // Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_9 |
3379 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
3380 | | // Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_10 |
3381 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 10, CVT_Done }, |
3382 | | // Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10 |
3383 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_95_Reg, 10, CVT_Done }, |
3384 | | // Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11 |
3385 | | { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addImmOperands, 8, CVT_95_Reg, 11, CVT_Done }, |
3386 | | // Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_11 |
3387 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 11, CVT_Done }, |
3388 | | // Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12 |
3389 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 6, CVT_95_addImmOperands, 9, CVT_95_Reg, 12, CVT_Done }, |
3390 | | // Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13 |
3391 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 9, CVT_95_Reg, 13, CVT_Done }, |
3392 | | // Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_10__Reg1_14 |
3393 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
3394 | | // Convert__Reg1_2__Reg1_3__Reg1_4 |
3395 | | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done }, |
3396 | | // Convert__u29_3Imm1_3__Reg1_6 |
3397 | | { CVT_95_addImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
3398 | | // Convert__u29_3Imm1_5__Reg1_8 |
3399 | | { CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
3400 | | // Convert__Reg1_2__s29_3Imm1_5__Reg1_8 |
3401 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
3402 | | // Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_9 |
3403 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
3404 | | // Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_10__Reg1_14 |
3405 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
3406 | | // Convert__Reg1_3__Reg1_2__Reg1_6 |
3407 | | { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 6, CVT_Done }, |
3408 | | // Convert__u31_1Imm1_3__Reg1_6 |
3409 | | { CVT_95_addImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
3410 | | // Convert__u31_1Imm1_5__Reg1_8 |
3411 | | { CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
3412 | | // Convert__Reg1_2__s31_1Imm1_5__Reg1_8 |
3413 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
3414 | | // Convert__Reg1_2__u31_1Imm1_5__Reg1_9 |
3415 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_Reg, 9, CVT_Done }, |
3416 | | // Convert__Reg1_2__u6_1Imm1_5__s32_0Imm1_9 |
3417 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
3418 | | // Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_9 |
3419 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
3420 | | // Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_10 |
3421 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 10, CVT_Done }, |
3422 | | // Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_11 |
3423 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 11, CVT_Done }, |
3424 | | // Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_10__Reg1_14 |
3425 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
3426 | | // Convert__u30_2Imm1_3__Reg1_6 |
3427 | | { CVT_95_addImmOperands, 3, CVT_95_Reg, 6, CVT_Done }, |
3428 | | // Convert__u30_2Imm1_5__Reg1_8 |
3429 | | { CVT_95_addImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
3430 | | // Convert__Reg1_2__s30_2Imm1_5__Reg1_8 |
3431 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
3432 | | // Convert__Reg1_2__u30_2Imm1_5__Reg1_9 |
3433 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_Reg, 9, CVT_Done }, |
3434 | | // Convert__Reg1_2__u6_2Imm1_5__s32_0Imm1_9 |
3435 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addSignedImmOperands, 9, CVT_Done }, |
3436 | | // Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_9 |
3437 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
3438 | | // Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_10 |
3439 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 10, CVT_Done }, |
3440 | | // Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_11 |
3441 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 5, CVT_95_addImmOperands, 11, CVT_Done }, |
3442 | | // Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_10__Reg1_14 |
3443 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 10, CVT_95_Reg, 14, CVT_Done }, |
3444 | | // Convert__Reg1_4__b30_2Imm1_18 |
3445 | | { CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 18, CVT_Done }, |
3446 | | // Convert__Reg1_6__Reg1_7__b30_2Imm1_19 |
3447 | | { CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 19, CVT_Done }, |
3448 | | // Convert__Reg1_4__b30_2Imm1_19 |
3449 | | { CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 19, CVT_Done }, |
3450 | | // Convert__Reg1_6__n1Const1_8__b30_2Imm1_20 |
3451 | | { CVT_95_Reg, 6, CVT_95_addn1ConstOperands, 8, CVT_95_addSignedImmOperands, 20, CVT_Done }, |
3452 | | // Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20 |
3453 | | { CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_95_addSignedImmOperands, 20, CVT_Done }, |
3454 | | // Convert__Reg1_6__Reg1_7__b30_2Imm1_20 |
3455 | | { CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addSignedImmOperands, 20, CVT_Done }, |
3456 | | // Convert__Reg1_6__n1Const1_8__b30_2Imm1_21 |
3457 | | { CVT_95_Reg, 6, CVT_95_addn1ConstOperands, 8, CVT_95_addSignedImmOperands, 21, CVT_Done }, |
3458 | | // Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21 |
3459 | | { CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_95_addSignedImmOperands, 21, CVT_Done }, |
3460 | | // Convert__b30_2Imm1_4__Reg1_5 |
3461 | | { CVT_95_addSignedImmOperands, 4, CVT_95_Reg, 5, CVT_Done }, |
3462 | | // Convert__b30_2Imm1_4__u10_0Imm1_6 |
3463 | | { CVT_95_addSignedImmOperands, 4, CVT_95_addImmOperands, 6, CVT_Done }, |
3464 | | // Convert__u10_0Imm1_3 |
3465 | | { CVT_95_addImmOperands, 3, CVT_Done }, |
3466 | | // Convert__u8_0Imm1_3 |
3467 | | { CVT_95_addImmOperands, 3, CVT_Done }, |
3468 | | // Convert__regR0__Tie0_0_0__u8_0Imm1_3 |
3469 | | { CVT_regR0, 0, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 3, CVT_Done }, |
3470 | | // Convert__Reg1_2__Tie0_0_0__u8_0Imm1_4 |
3471 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addImmOperands, 4, CVT_Done }, |
3472 | | // Convert__Reg1_2__Reg1_3__Tie0_0_0__Tie1_0_0__Reg1_4 |
3473 | | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_0_0, CVT_Tied, Tie1_0_0, CVT_95_Reg, 4, CVT_Done }, |
3474 | | // Convert__Reg1_2__imm_95_0__Reg1_7 |
3475 | | { CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_95_Reg, 7, CVT_Done }, |
3476 | | // Convert__Reg1_2__s4_0Imm1_5 |
3477 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_Done }, |
3478 | | // Convert__Reg1_2__s4_0Imm1_5__Reg1_8 |
3479 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 8, CVT_Done }, |
3480 | | // Convert__Reg1_2__Tie0_0_0__Reg1_5 |
3481 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_Reg, 5, CVT_Done }, |
3482 | | // Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6 |
3483 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_Done }, |
3484 | | // Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9 |
3485 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 9, CVT_Done }, |
3486 | | // Convert__Reg1_2__s4_0Imm1_5__Reg1_10 |
3487 | | { CVT_95_Reg, 2, CVT_95_addSignedImmOperands, 5, CVT_95_Reg, 10, CVT_Done }, |
3488 | | // Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_11 |
3489 | | { CVT_95_Reg, 2, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 6, CVT_95_Reg, 11, CVT_Done }, |
3490 | | // Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_11 |
3491 | | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 11, CVT_Done }, |
3492 | | // Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_9 |
3493 | | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 9, CVT_Done }, |
3494 | | // Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_10 |
3495 | | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 10, CVT_Done }, |
3496 | | // Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_12 |
3497 | | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 12, CVT_Done }, |
3498 | | // Convert__Reg1_6__Reg1_7__Reg1_8 |
3499 | | { CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_Done }, |
3500 | | // Convert__Reg1_2__Reg1_3__Tie0_2_2__Tie1_3_3__Reg1_4 |
3501 | | { CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Tied, Tie0_2_2, CVT_Tied, Tie1_3_3, CVT_95_Reg, 4, CVT_Done }, |
3502 | | // Convert__u1_0Imm1_3 |
3503 | | { CVT_95_addImmOperands, 3, CVT_Done }, |
3504 | | // Convert__Reg1_2__u1_0Imm1_4 |
3505 | | { CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done }, |
3506 | | // Convert__Reg1_4__imm_95_0 |
3507 | | { CVT_95_Reg, 4, CVT_imm_95_0, 0, CVT_Done }, |
3508 | | // Convert__Reg1_4__s4_0Imm1_7 |
3509 | | { CVT_95_Reg, 4, CVT_95_addSignedImmOperands, 7, CVT_Done }, |
3510 | | // Convert__Reg1_4__Tie0_0_0__Reg1_7 |
3511 | | { CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_95_Reg, 7, CVT_Done }, |
3512 | | // Convert__Reg1_4__Tie0_0_0__s3_0Imm1_8 |
3513 | | { CVT_95_Reg, 4, CVT_Tied, Tie0_0_0, CVT_95_addSignedImmOperands, 8, CVT_Done }, |
3514 | | }; |
3515 | | |
3516 | | void HexagonAsmParser:: |
3517 | | convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode, |
3518 | 0 | const OperandVector &Operands) { |
3519 | 0 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
3520 | 0 | const uint8_t *Converter = ConversionTable[Kind]; |
3521 | 0 | unsigned OpIdx; |
3522 | 0 | Inst.setOpcode(Opcode); |
3523 | 0 | for (const uint8_t *p = Converter; *p; p += 2) { |
3524 | 0 | OpIdx = *(p + 1); |
3525 | 0 | switch (*p) { |
3526 | 0 | default: llvm_unreachable("invalid conversion entry!"); |
3527 | 0 | case CVT_Reg: |
3528 | 0 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); |
3529 | 0 | break; |
3530 | 0 | case CVT_Tied: { |
3531 | 0 | assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - |
3532 | 0 | std::begin(TiedAsmOperandTable)) && |
3533 | 0 | "Tied operand not found"); |
3534 | 0 | unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0]; |
3535 | 0 | if (TiedResOpnd != (uint8_t)-1) |
3536 | 0 | Inst.addOperand(Inst.getOperand(TiedResOpnd)); |
3537 | 0 | break; |
3538 | 0 | } |
3539 | 0 | case CVT_95_Reg: |
3540 | 0 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addRegOperands(Inst, 1); |
3541 | 0 | break; |
3542 | 0 | case CVT_95_addSignedImmOperands: |
3543 | 0 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addSignedImmOperands(Inst, 1); |
3544 | 0 | break; |
3545 | 0 | case CVT_95_addImmOperands: |
3546 | 0 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addImmOperands(Inst, 1); |
3547 | 0 | break; |
3548 | 0 | case CVT_regW15: |
3549 | 0 | Inst.addOperand(MCOperand::createReg(Hexagon::W15)); |
3550 | 0 | break; |
3551 | 0 | case CVT_imm_95_0: |
3552 | 0 | Inst.addOperand(MCOperand::createImm(0)); |
3553 | 0 | break; |
3554 | 0 | case CVT_imm_95__MINUS_1: |
3555 | 0 | Inst.addOperand(MCOperand::createImm(-1)); |
3556 | 0 | break; |
3557 | 0 | case CVT_imm_95_255: |
3558 | 0 | Inst.addOperand(MCOperand::createImm(255)); |
3559 | 0 | break; |
3560 | 0 | case CVT_regR29: |
3561 | 0 | Inst.addOperand(MCOperand::createReg(Hexagon::R29)); |
3562 | 0 | break; |
3563 | 0 | case CVT_95_addsgp10ConstOperands: |
3564 | 0 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addsgp10ConstOperands(Inst, 1); |
3565 | 0 | break; |
3566 | 0 | case CVT_regD15: |
3567 | 0 | Inst.addOperand(MCOperand::createReg(Hexagon::D15)); |
3568 | 0 | break; |
3569 | 0 | case CVT_regR30: |
3570 | 0 | Inst.addOperand(MCOperand::createReg(Hexagon::R30)); |
3571 | 0 | break; |
3572 | 0 | case CVT_95_addn1ConstOperands: |
3573 | 0 | static_cast<HexagonOperand &>(*Operands[OpIdx]).addn1ConstOperands(Inst, 1); |
3574 | 0 | break; |
3575 | 0 | case CVT_regR0: |
3576 | 0 | Inst.addOperand(MCOperand::createReg(Hexagon::R0)); |
3577 | 0 | break; |
3578 | 0 | } |
3579 | 0 | } |
3580 | 0 | } |
3581 | | |
3582 | | void HexagonAsmParser:: |
3583 | | convertToMapAndConstraints(unsigned Kind, |
3584 | 0 | const OperandVector &Operands) { |
3585 | 0 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
3586 | 0 | unsigned NumMCOperands = 0; |
3587 | 0 | const uint8_t *Converter = ConversionTable[Kind]; |
3588 | 0 | for (const uint8_t *p = Converter; *p; p += 2) { |
3589 | 0 | switch (*p) { |
3590 | 0 | default: llvm_unreachable("invalid conversion entry!"); |
3591 | 0 | case CVT_Reg: |
3592 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3593 | 0 | Operands[*(p + 1)]->setConstraint("r"); |
3594 | 0 | ++NumMCOperands; |
3595 | 0 | break; |
3596 | 0 | case CVT_Tied: |
3597 | 0 | ++NumMCOperands; |
3598 | 0 | break; |
3599 | 0 | case CVT_95_Reg: |
3600 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3601 | 0 | Operands[*(p + 1)]->setConstraint("r"); |
3602 | 0 | NumMCOperands += 1; |
3603 | 0 | break; |
3604 | 0 | case CVT_95_addSignedImmOperands: |
3605 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3606 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3607 | 0 | NumMCOperands += 1; |
3608 | 0 | break; |
3609 | 0 | case CVT_95_addImmOperands: |
3610 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3611 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3612 | 0 | NumMCOperands += 1; |
3613 | 0 | break; |
3614 | 0 | case CVT_regW15: |
3615 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3616 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3617 | 0 | ++NumMCOperands; |
3618 | 0 | break; |
3619 | 0 | case CVT_imm_95_0: |
3620 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3621 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3622 | 0 | ++NumMCOperands; |
3623 | 0 | break; |
3624 | 0 | case CVT_imm_95__MINUS_1: |
3625 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3626 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3627 | 0 | ++NumMCOperands; |
3628 | 0 | break; |
3629 | 0 | case CVT_imm_95_255: |
3630 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3631 | 0 | Operands[*(p + 1)]->setConstraint(""); |
3632 | 0 | ++NumMCOperands; |
3633 | 0 | break; |
3634 | 0 | case CVT_regR29: |
3635 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3636 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3637 | 0 | ++NumMCOperands; |
3638 | 0 | break; |
3639 | 0 | case CVT_95_addsgp10ConstOperands: |
3640 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3641 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3642 | 0 | NumMCOperands += 1; |
3643 | 0 | break; |
3644 | 0 | case CVT_regD15: |
3645 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3646 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3647 | 0 | ++NumMCOperands; |
3648 | 0 | break; |
3649 | 0 | case CVT_regR30: |
3650 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3651 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3652 | 0 | ++NumMCOperands; |
3653 | 0 | break; |
3654 | 0 | case CVT_95_addn1ConstOperands: |
3655 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3656 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3657 | 0 | NumMCOperands += 1; |
3658 | 0 | break; |
3659 | 0 | case CVT_regR0: |
3660 | 0 | Operands[*(p + 1)]->setMCOperandNum(NumMCOperands); |
3661 | 0 | Operands[*(p + 1)]->setConstraint("m"); |
3662 | 0 | ++NumMCOperands; |
3663 | 0 | break; |
3664 | 0 | } |
3665 | 0 | } |
3666 | 0 | } |
3667 | | |
3668 | | namespace { |
3669 | | |
3670 | | /// MatchClassKind - The kinds of classes which participate in |
3671 | | /// instruction matching. |
3672 | | enum MatchClassKind { |
3673 | | InvalidMatchClass = 0, |
3674 | | OptionalMatchClass = 1, |
3675 | | MCK__EXCLAIM_, // '!' |
3676 | | MCK__HASH_, // '#' |
3677 | | MCK__38_, // '&' |
3678 | | MCK__40_, // '(' |
3679 | | MCK__41_, // ')' |
3680 | | MCK__STAR_, // '*' |
3681 | | MCK__43_, // '+' |
3682 | | MCK__MINUS_, // '-' |
3683 | | MCK__DOT_, // '.' |
3684 | | MCK_0, // '0' |
3685 | | MCK_1, // '1' |
3686 | | MCK_16, // '16' |
3687 | | MCK__COLON_, // ':' |
3688 | | MCK__59_, // ';' |
3689 | | MCK__LT_, // '<' |
3690 | | MCK__61_, // '=' |
3691 | | MCK__GT_, // '>' |
3692 | | MCK_CONST32, // 'CONST32' |
3693 | | MCK_CONST64, // 'CONST64' |
3694 | | MCK_DUPLEX, // 'DUPLEX' |
3695 | | MCK_I, // 'I' |
3696 | | MCK__94_, // '^' |
3697 | | MCK_abs, // 'abs' |
3698 | | MCK_add, // 'add' |
3699 | | MCK_addasl, // 'addasl' |
3700 | | MCK_all8, // 'all8' |
3701 | | MCK_allocframe, // 'allocframe' |
3702 | | MCK_and, // 'and' |
3703 | | MCK_any8, // 'any8' |
3704 | | MCK_asl, // 'asl' |
3705 | | MCK_aslh, // 'aslh' |
3706 | | MCK_asr, // 'asr' |
3707 | | MCK_asrh, // 'asrh' |
3708 | | MCK_asrrnd, // 'asrrnd' |
3709 | | MCK_at, // 'at' |
3710 | | MCK_b, // 'b' |
3711 | | MCK_b10, // 'b10' |
3712 | | MCK_barrier, // 'barrier' |
3713 | | MCK_bf, // 'bf' |
3714 | | MCK_bitsclr, // 'bitsclr' |
3715 | | MCK_bitsplit, // 'bitsplit' |
3716 | | MCK_bitsset, // 'bitsset' |
3717 | | MCK_boundscheck, // 'boundscheck' |
3718 | | MCK_brev, // 'brev' |
3719 | | MCK_brkpt, // 'brkpt' |
3720 | | MCK_c, // 'c' |
3721 | | MCK_call, // 'call' |
3722 | | MCK_callr, // 'callr' |
3723 | | MCK_callrh, // 'callrh' |
3724 | | MCK_carry, // 'carry' |
3725 | | MCK_chop, // 'chop' |
3726 | | MCK_ciad, // 'ciad' |
3727 | | MCK_circ, // 'circ' |
3728 | | MCK_cl0, // 'cl0' |
3729 | | MCK_cl1, // 'cl1' |
3730 | | MCK_clb, // 'clb' |
3731 | | MCK_clip, // 'clip' |
3732 | | MCK_clrbit, // 'clrbit' |
3733 | | MCK_cmp, // 'cmp' |
3734 | | MCK_cmpb, // 'cmpb' |
3735 | | MCK_cmph, // 'cmph' |
3736 | | MCK_cmpy, // 'cmpy' |
3737 | | MCK_cmpyi, // 'cmpyi' |
3738 | | MCK_cmpyiw, // 'cmpyiw' |
3739 | | MCK_cmpyiwh, // 'cmpyiwh' |
3740 | | MCK_cmpyr, // 'cmpyr' |
3741 | | MCK_cmpyrw, // 'cmpyrw' |
3742 | | MCK_cmpyrwh, // 'cmpyrwh' |
3743 | | MCK_combine, // 'combine' |
3744 | | MCK_convert_95_d2df, // 'convert_d2df' |
3745 | | MCK_convert_95_d2sf, // 'convert_d2sf' |
3746 | | MCK_convert_95_df2d, // 'convert_df2d' |
3747 | | MCK_convert_95_df2sf, // 'convert_df2sf' |
3748 | | MCK_convert_95_df2ud, // 'convert_df2ud' |
3749 | | MCK_convert_95_df2uw, // 'convert_df2uw' |
3750 | | MCK_convert_95_df2w, // 'convert_df2w' |
3751 | | MCK_convert_95_sf2d, // 'convert_sf2d' |
3752 | | MCK_convert_95_sf2df, // 'convert_sf2df' |
3753 | | MCK_convert_95_sf2ud, // 'convert_sf2ud' |
3754 | | MCK_convert_95_sf2uw, // 'convert_sf2uw' |
3755 | | MCK_convert_95_sf2w, // 'convert_sf2w' |
3756 | | MCK_convert_95_ud2df, // 'convert_ud2df' |
3757 | | MCK_convert_95_ud2sf, // 'convert_ud2sf' |
3758 | | MCK_convert_95_uw2df, // 'convert_uw2df' |
3759 | | MCK_convert_95_uw2sf, // 'convert_uw2sf' |
3760 | | MCK_convert_95_w2df, // 'convert_w2df' |
3761 | | MCK_convert_95_w2sf, // 'convert_w2sf' |
3762 | | MCK_crnd, // 'crnd' |
3763 | | MCK_cround, // 'cround' |
3764 | | MCK_crswap, // 'crswap' |
3765 | | MCK_cswi, // 'cswi' |
3766 | | MCK_ct0, // 'ct0' |
3767 | | MCK_ct1, // 'ct1' |
3768 | | MCK_ctlbw, // 'ctlbw' |
3769 | | MCK_cur, // 'cur' |
3770 | | MCK_dccleana, // 'dccleana' |
3771 | | MCK_dccleanidx, // 'dccleanidx' |
3772 | | MCK_dccleaninva, // 'dccleaninva' |
3773 | | MCK_dccleaninvidx, // 'dccleaninvidx' |
3774 | | MCK_dcfetch, // 'dcfetch' |
3775 | | MCK_dcinva, // 'dcinva' |
3776 | | MCK_dcinvidx, // 'dcinvidx' |
3777 | | MCK_dckill, // 'dckill' |
3778 | | MCK_dctagr, // 'dctagr' |
3779 | | MCK_dctagw, // 'dctagw' |
3780 | | MCK_dczeroa, // 'dczeroa' |
3781 | | MCK_dealloc_95_return, // 'dealloc_return' |
3782 | | MCK_deallocframe, // 'deallocframe' |
3783 | | MCK_decbin, // 'decbin' |
3784 | | MCK_deinterleave, // 'deinterleave' |
3785 | | MCK_deprecated, // 'deprecated' |
3786 | | MCK_dfadd, // 'dfadd' |
3787 | | MCK_dfclass, // 'dfclass' |
3788 | | MCK_dfcmp, // 'dfcmp' |
3789 | | MCK_dfmake, // 'dfmake' |
3790 | | MCK_dfmax, // 'dfmax' |
3791 | | MCK_dfmin, // 'dfmin' |
3792 | | MCK_dfmpyfix, // 'dfmpyfix' |
3793 | | MCK_dfmpyhh, // 'dfmpyhh' |
3794 | | MCK_dfmpylh, // 'dfmpylh' |
3795 | | MCK_dfmpyll, // 'dfmpyll' |
3796 | | MCK_dfsub, // 'dfsub' |
3797 | | MCK_diag0, // 'diag0' |
3798 | | MCK_diag1, // 'diag1' |
3799 | | MCK_dmlink, // 'dmlink' |
3800 | | MCK_dmpause, // 'dmpause' |
3801 | | MCK_dmpoll, // 'dmpoll' |
3802 | | MCK_dmresume, // 'dmresume' |
3803 | | MCK_dmstart, // 'dmstart' |
3804 | | MCK_dmwait, // 'dmwait' |
3805 | | MCK_endloop0, // 'endloop0' |
3806 | | MCK_endloop01, // 'endloop01' |
3807 | | MCK_endloop1, // 'endloop1' |
3808 | | MCK_eq, // 'eq' |
3809 | | MCK_extract, // 'extract' |
3810 | | MCK_extractu, // 'extractu' |
3811 | | MCK_fastcorner9, // 'fastcorner9' |
3812 | | MCK_ge, // 'ge' |
3813 | | MCK_getimask, // 'getimask' |
3814 | | MCK_geu, // 'geu' |
3815 | | MCK_gt, // 'gt' |
3816 | | MCK_gtu, // 'gtu' |
3817 | | MCK_h, // 'h' |
3818 | | MCK_hf, // 'hf' |
3819 | | MCK_hi, // 'hi' |
3820 | | MCK_hintjr, // 'hintjr' |
3821 | | MCK_iassignr, // 'iassignr' |
3822 | | MCK_iassignw, // 'iassignw' |
3823 | | MCK_icdatar, // 'icdatar' |
3824 | | MCK_icdataw, // 'icdataw' |
3825 | | MCK_icinva, // 'icinva' |
3826 | | MCK_icinvidx, // 'icinvidx' |
3827 | | MCK_ickill, // 'ickill' |
3828 | | MCK_iconst, // 'iconst' |
3829 | | MCK_ictagr, // 'ictagr' |
3830 | | MCK_ictagw, // 'ictagw' |
3831 | | MCK_if, // 'if' |
3832 | | MCK_immext, // 'immext' |
3833 | | MCK_insert, // 'insert' |
3834 | | MCK_interleave, // 'interleave' |
3835 | | MCK_isync, // 'isync' |
3836 | | MCK_jump, // 'jump' |
3837 | | MCK_jumpr, // 'jumpr' |
3838 | | MCK_jumprh, // 'jumprh' |
3839 | | MCK_k0lock, // 'k0lock' |
3840 | | MCK_k0unlock, // 'k0unlock' |
3841 | | MCK_l, // 'l' |
3842 | | MCK_l2cleanidx, // 'l2cleanidx' |
3843 | | MCK_l2cleaninvidx, // 'l2cleaninvidx' |
3844 | | MCK_l2fetch, // 'l2fetch' |
3845 | | MCK_l2gclean, // 'l2gclean' |
3846 | | MCK_l2gcleaninv, // 'l2gcleaninv' |
3847 | | MCK_l2gunlock, // 'l2gunlock' |
3848 | | MCK_l2invidx, // 'l2invidx' |
3849 | | MCK_l2kill, // 'l2kill' |
3850 | | MCK_l2locka, // 'l2locka' |
3851 | | MCK_l2tagr, // 'l2tagr' |
3852 | | MCK_l2tagw, // 'l2tagw' |
3853 | | MCK_l2unlocka, // 'l2unlocka' |
3854 | | MCK_lfs, // 'lfs' |
3855 | | MCK_lib, // 'lib' |
3856 | | MCK_lo, // 'lo' |
3857 | | MCK_loop0, // 'loop0' |
3858 | | MCK_loop1, // 'loop1' |
3859 | | MCK_lsl, // 'lsl' |
3860 | | MCK_lsr, // 'lsr' |
3861 | | MCK_lt, // 'lt' |
3862 | | MCK_ltu, // 'ltu' |
3863 | | MCK_mask, // 'mask' |
3864 | | MCK_max, // 'max' |
3865 | | MCK_maxu, // 'maxu' |
3866 | | MCK_memb, // 'memb' |
3867 | | MCK_memb_95_fifo, // 'memb_fifo' |
3868 | | MCK_membh, // 'membh' |
3869 | | MCK_memcpy, // 'memcpy' |
3870 | | MCK_memd, // 'memd' |
3871 | | MCK_memd_95_aq, // 'memd_aq' |
3872 | | MCK_memd_95_locked, // 'memd_locked' |
3873 | | MCK_memd_95_rl, // 'memd_rl' |
3874 | | MCK_memh, // 'memh' |
3875 | | MCK_memh_95_fifo, // 'memh_fifo' |
3876 | | MCK_memub, // 'memub' |
3877 | | MCK_memubh, // 'memubh' |
3878 | | MCK_memuh, // 'memuh' |
3879 | | MCK_memw, // 'memw' |
3880 | | MCK_memw_95_aq, // 'memw_aq' |
3881 | | MCK_memw_95_locked, // 'memw_locked' |
3882 | | MCK_memw_95_phys, // 'memw_phys' |
3883 | | MCK_memw_95_rl, // 'memw_rl' |
3884 | | MCK_min, // 'min' |
3885 | | MCK_minu, // 'minu' |
3886 | | MCK_modwrap, // 'modwrap' |
3887 | | MCK_mpy, // 'mpy' |
3888 | | MCK_mpyi, // 'mpyi' |
3889 | | MCK_mpysu, // 'mpysu' |
3890 | | MCK_mpyu, // 'mpyu' |
3891 | | MCK_mpyui, // 'mpyui' |
3892 | | MCK_mux, // 'mux' |
3893 | | MCK_n, // 'n' |
3894 | | MCK_neg, // 'neg' |
3895 | | MCK_new, // 'new' |
3896 | | MCK_nmi, // 'nmi' |
3897 | | MCK_nomatch, // 'nomatch' |
3898 | | MCK_nop, // 'nop' |
3899 | | MCK_normamt, // 'normamt' |
3900 | | MCK_not, // 'not' |
3901 | | MCK_nt, // 'nt' |
3902 | | MCK_or, // 'or' |
3903 | | MCK_packhl, // 'packhl' |
3904 | | MCK_parity, // 'parity' |
3905 | | MCK_pause, // 'pause' |
3906 | | MCK_pmpyw, // 'pmpyw' |
3907 | | MCK_popcount, // 'popcount' |
3908 | | MCK_pos, // 'pos' |
3909 | | MCK_prefixsum, // 'prefixsum' |
3910 | | MCK_qf16, // 'qf16' |
3911 | | MCK_qf32, // 'qf32' |
3912 | | MCK_raw, // 'raw' |
3913 | | MCK_release, // 'release' |
3914 | | MCK_resume, // 'resume' |
3915 | | MCK_rnd, // 'rnd' |
3916 | | MCK_rol, // 'rol' |
3917 | | MCK_round, // 'round' |
3918 | | MCK_rte, // 'rte' |
3919 | | MCK_sat, // 'sat' |
3920 | | MCK_satb, // 'satb' |
3921 | | MCK_sath, // 'sath' |
3922 | | MCK_satub, // 'satub' |
3923 | | MCK_satuh, // 'satuh' |
3924 | | MCK_scale, // 'scale' |
3925 | | MCK_scatter_95_release, // 'scatter_release' |
3926 | | MCK_setbit, // 'setbit' |
3927 | | MCK_setimask, // 'setimask' |
3928 | | MCK_setprio, // 'setprio' |
3929 | | MCK_sf, // 'sf' |
3930 | | MCK_sfadd, // 'sfadd' |
3931 | | MCK_sfclass, // 'sfclass' |
3932 | | MCK_sfcmp, // 'sfcmp' |
3933 | | MCK_sffixupd, // 'sffixupd' |
3934 | | MCK_sffixupn, // 'sffixupn' |
3935 | | MCK_sffixupr, // 'sffixupr' |
3936 | | MCK_sfinvsqrta, // 'sfinvsqrta' |
3937 | | MCK_sfmake, // 'sfmake' |
3938 | | MCK_sfmax, // 'sfmax' |
3939 | | MCK_sfmin, // 'sfmin' |
3940 | | MCK_sfmpy, // 'sfmpy' |
3941 | | MCK_sfrecipa, // 'sfrecipa' |
3942 | | MCK_sfsub, // 'sfsub' |
3943 | | MCK_sgp, // 'sgp' |
3944 | | MCK_shift, // 'shift' |
3945 | | MCK_shuffeb, // 'shuffeb' |
3946 | | MCK_shuffeh, // 'shuffeh' |
3947 | | MCK_shuffob, // 'shuffob' |
3948 | | MCK_shuffoh, // 'shuffoh' |
3949 | | MCK_siad, // 'siad' |
3950 | | MCK_sp1loop0, // 'sp1loop0' |
3951 | | MCK_sp2loop0, // 'sp2loop0' |
3952 | | MCK_sp3loop0, // 'sp3loop0' |
3953 | | MCK_st, // 'st' |
3954 | | MCK_start, // 'start' |
3955 | | MCK_stop, // 'stop' |
3956 | | MCK_sub, // 'sub' |
3957 | | MCK_swi, // 'swi' |
3958 | | MCK_swiz, // 'swiz' |
3959 | | MCK_sxtb, // 'sxtb' |
3960 | | MCK_sxth, // 'sxth' |
3961 | | MCK_sxtw, // 'sxtw' |
3962 | | MCK_syncht, // 'syncht' |
3963 | | MCK_t, // 't' |
3964 | | MCK_tableidxb, // 'tableidxb' |
3965 | | MCK_tableidxd, // 'tableidxd' |
3966 | | MCK_tableidxh, // 'tableidxh' |
3967 | | MCK_tableidxw, // 'tableidxw' |
3968 | | MCK_tlbinvasid, // 'tlbinvasid' |
3969 | | MCK_tlblock, // 'tlblock' |
3970 | | MCK_tlbmatch, // 'tlbmatch' |
3971 | | MCK_tlboc, // 'tlboc' |
3972 | | MCK_tlbp, // 'tlbp' |
3973 | | MCK_tlbr, // 'tlbr' |
3974 | | MCK_tlbunlock, // 'tlbunlock' |
3975 | | MCK_tlbw, // 'tlbw' |
3976 | | MCK_tmp, // 'tmp' |
3977 | | MCK_togglebit, // 'togglebit' |
3978 | | MCK_trace, // 'trace' |
3979 | | MCK_trap0, // 'trap0' |
3980 | | MCK_trap1, // 'trap1' |
3981 | | MCK_tstbit, // 'tstbit' |
3982 | | MCK_ub, // 'ub' |
3983 | | MCK_uh, // 'uh' |
3984 | | MCK_unpause, // 'unpause' |
3985 | | MCK_uo, // 'uo' |
3986 | | MCK_uw, // 'uw' |
3987 | | MCK_v, // 'v' |
3988 | | MCK_v10mpy, // 'v10mpy' |
3989 | | MCK_v6mpy, // 'v6mpy' |
3990 | | MCK_vabs, // 'vabs' |
3991 | | MCK_vabsb, // 'vabsb' |
3992 | | MCK_vabsdiff, // 'vabsdiff' |
3993 | | MCK_vabsdiffb, // 'vabsdiffb' |
3994 | | MCK_vabsdiffh, // 'vabsdiffh' |
3995 | | MCK_vabsdiffub, // 'vabsdiffub' |
3996 | | MCK_vabsdiffuh, // 'vabsdiffuh' |
3997 | | MCK_vabsdiffw, // 'vabsdiffw' |
3998 | | MCK_vabsh, // 'vabsh' |
3999 | | MCK_vabsw, // 'vabsw' |
4000 | | MCK_vacsh, // 'vacsh' |
4001 | | MCK_vadd, // 'vadd' |
4002 | | MCK_vaddb, // 'vaddb' |
4003 | | MCK_vaddh, // 'vaddh' |
4004 | | MCK_vaddhub, // 'vaddhub' |
4005 | | MCK_vaddub, // 'vaddub' |
4006 | | MCK_vadduh, // 'vadduh' |
4007 | | MCK_vadduw, // 'vadduw' |
4008 | | MCK_vaddw, // 'vaddw' |
4009 | | MCK_valign, // 'valign' |
4010 | | MCK_valignb, // 'valignb' |
4011 | | MCK_vand, // 'vand' |
4012 | | MCK_vasl, // 'vasl' |
4013 | | MCK_vaslh, // 'vaslh' |
4014 | | MCK_vaslw, // 'vaslw' |
4015 | | MCK_vasr, // 'vasr' |
4016 | | MCK_vasrh, // 'vasrh' |
4017 | | MCK_vasrhub, // 'vasrhub' |
4018 | | MCK_vasrinto, // 'vasrinto' |
4019 | | MCK_vasrw, // 'vasrw' |
4020 | | MCK_vavg, // 'vavg' |
4021 | | MCK_vavgb, // 'vavgb' |
4022 | | MCK_vavgh, // 'vavgh' |
4023 | | MCK_vavgub, // 'vavgub' |
4024 | | MCK_vavguh, // 'vavguh' |
4025 | | MCK_vavguw, // 'vavguw' |
4026 | | MCK_vavgw, // 'vavgw' |
4027 | | MCK_vcl0, // 'vcl0' |
4028 | | MCK_vcl0h, // 'vcl0h' |
4029 | | MCK_vcl0w, // 'vcl0w' |
4030 | | MCK_vclb, // 'vclb' |
4031 | | MCK_vclip, // 'vclip' |
4032 | | MCK_vcmp, // 'vcmp' |
4033 | | MCK_vcmpb, // 'vcmpb' |
4034 | | MCK_vcmph, // 'vcmph' |
4035 | | MCK_vcmpw, // 'vcmpw' |
4036 | | MCK_vcmpyi, // 'vcmpyi' |
4037 | | MCK_vcmpyr, // 'vcmpyr' |
4038 | | MCK_vcnegh, // 'vcnegh' |
4039 | | MCK_vcombine, // 'vcombine' |
4040 | | MCK_vconj, // 'vconj' |
4041 | | MCK_vcrotate, // 'vcrotate' |
4042 | | MCK_vcvt, // 'vcvt' |
4043 | | MCK_vdeal, // 'vdeal' |
4044 | | MCK_vdealb, // 'vdealb' |
4045 | | MCK_vdealb4w, // 'vdealb4w' |
4046 | | MCK_vdeale, // 'vdeale' |
4047 | | MCK_vdealh, // 'vdealh' |
4048 | | MCK_vdelta, // 'vdelta' |
4049 | | MCK_vdmpy, // 'vdmpy' |
4050 | | MCK_vdmpybsu, // 'vdmpybsu' |
4051 | | MCK_vdmpybus, // 'vdmpybus' |
4052 | | MCK_vdmpyh, // 'vdmpyh' |
4053 | | MCK_vdmpyhb, // 'vdmpyhb' |
4054 | | MCK_vdmpyhsu, // 'vdmpyhsu' |
4055 | | MCK_vdmpyw, // 'vdmpyw' |
4056 | | MCK_vdsad, // 'vdsad' |
4057 | | MCK_vdsaduh, // 'vdsaduh' |
4058 | | MCK_vextract, // 'vextract' |
4059 | | MCK_vfmax, // 'vfmax' |
4060 | | MCK_vfmin, // 'vfmin' |
4061 | | MCK_vfmv, // 'vfmv' |
4062 | | MCK_vfneg, // 'vfneg' |
4063 | | MCK_vgather, // 'vgather' |
4064 | | MCK_vhist, // 'vhist' |
4065 | | MCK_vinsert, // 'vinsert' |
4066 | | MCK_vitpack, // 'vitpack' |
4067 | | MCK_vlalign, // 'vlalign' |
4068 | | MCK_vlslh, // 'vlslh' |
4069 | | MCK_vlslw, // 'vlslw' |
4070 | | MCK_vlsr, // 'vlsr' |
4071 | | MCK_vlsrh, // 'vlsrh' |
4072 | | MCK_vlsrw, // 'vlsrw' |
4073 | | MCK_vlut16, // 'vlut16' |
4074 | | MCK_vlut32, // 'vlut32' |
4075 | | MCK_vlut4, // 'vlut4' |
4076 | | MCK_vmax, // 'vmax' |
4077 | | MCK_vmaxb, // 'vmaxb' |
4078 | | MCK_vmaxh, // 'vmaxh' |
4079 | | MCK_vmaxub, // 'vmaxub' |
4080 | | MCK_vmaxuh, // 'vmaxuh' |
4081 | | MCK_vmaxuw, // 'vmaxuw' |
4082 | | MCK_vmaxw, // 'vmaxw' |
4083 | | MCK_vmem, // 'vmem' |
4084 | | MCK_vmemu, // 'vmemu' |
4085 | | MCK_vmin, // 'vmin' |
4086 | | MCK_vminb, // 'vminb' |
4087 | | MCK_vminh, // 'vminh' |
4088 | | MCK_vminub, // 'vminub' |
4089 | | MCK_vminuh, // 'vminuh' |
4090 | | MCK_vminuw, // 'vminuw' |
4091 | | MCK_vminw, // 'vminw' |
4092 | | MCK_vmpa, // 'vmpa' |
4093 | | MCK_vmpabus, // 'vmpabus' |
4094 | | MCK_vmpabuu, // 'vmpabuu' |
4095 | | MCK_vmpahb, // 'vmpahb' |
4096 | | MCK_vmpauhb, // 'vmpauhb' |
4097 | | MCK_vmps, // 'vmps' |
4098 | | MCK_vmpy, // 'vmpy' |
4099 | | MCK_vmpyb, // 'vmpyb' |
4100 | | MCK_vmpybsu, // 'vmpybsu' |
4101 | | MCK_vmpybu, // 'vmpybu' |
4102 | | MCK_vmpybus, // 'vmpybus' |
4103 | | MCK_vmpye, // 'vmpye' |
4104 | | MCK_vmpyeh, // 'vmpyeh' |
4105 | | MCK_vmpyewuh, // 'vmpyewuh' |
4106 | | MCK_vmpyh, // 'vmpyh' |
4107 | | MCK_vmpyhsu, // 'vmpyhsu' |
4108 | | MCK_vmpyhus, // 'vmpyhus' |
4109 | | MCK_vmpyi, // 'vmpyi' |
4110 | | MCK_vmpyie, // 'vmpyie' |
4111 | | MCK_vmpyieo, // 'vmpyieo' |
4112 | | MCK_vmpyiewh, // 'vmpyiewh' |
4113 | | MCK_vmpyiewuh, // 'vmpyiewuh' |
4114 | | MCK_vmpyih, // 'vmpyih' |
4115 | | MCK_vmpyihb, // 'vmpyihb' |
4116 | | MCK_vmpyio, // 'vmpyio' |
4117 | | MCK_vmpyiowh, // 'vmpyiowh' |
4118 | | MCK_vmpyiwb, // 'vmpyiwb' |
4119 | | MCK_vmpyiwh, // 'vmpyiwh' |
4120 | | MCK_vmpyiwub, // 'vmpyiwub' |
4121 | | MCK_vmpyo, // 'vmpyo' |
4122 | | MCK_vmpyowh, // 'vmpyowh' |
4123 | | MCK_vmpyub, // 'vmpyub' |
4124 | | MCK_vmpyuh, // 'vmpyuh' |
4125 | | MCK_vmpyweh, // 'vmpyweh' |
4126 | | MCK_vmpyweuh, // 'vmpyweuh' |
4127 | | MCK_vmpywoh, // 'vmpywoh' |
4128 | | MCK_vmpywouh, // 'vmpywouh' |
4129 | | MCK_vmux, // 'vmux' |
4130 | | MCK_vnavg, // 'vnavg' |
4131 | | MCK_vnavgb, // 'vnavgb' |
4132 | | MCK_vnavgh, // 'vnavgh' |
4133 | | MCK_vnavgub, // 'vnavgub' |
4134 | | MCK_vnavgw, // 'vnavgw' |
4135 | | MCK_vnormamt, // 'vnormamt' |
4136 | | MCK_vnormamth, // 'vnormamth' |
4137 | | MCK_vnormamtw, // 'vnormamtw' |
4138 | | MCK_vnot, // 'vnot' |
4139 | | MCK_vor, // 'vor' |
4140 | | MCK_vpack, // 'vpack' |
4141 | | MCK_vpacke, // 'vpacke' |
4142 | | MCK_vpackeb, // 'vpackeb' |
4143 | | MCK_vpackeh, // 'vpackeh' |
4144 | | MCK_vpackhb, // 'vpackhb' |
4145 | | MCK_vpackhub, // 'vpackhub' |
4146 | | MCK_vpacko, // 'vpacko' |
4147 | | MCK_vpackob, // 'vpackob' |
4148 | | MCK_vpackoh, // 'vpackoh' |
4149 | | MCK_vpackwh, // 'vpackwh' |
4150 | | MCK_vpackwuh, // 'vpackwuh' |
4151 | | MCK_vpmpyh, // 'vpmpyh' |
4152 | | MCK_vpopcount, // 'vpopcount' |
4153 | | MCK_vpopcounth, // 'vpopcounth' |
4154 | | MCK_vr16mpyz, // 'vr16mpyz' |
4155 | | MCK_vr16mpyzs, // 'vr16mpyzs' |
4156 | | MCK_vr8mpyz, // 'vr8mpyz' |
4157 | | MCK_vraddh, // 'vraddh' |
4158 | | MCK_vraddub, // 'vraddub' |
4159 | | MCK_vradduh, // 'vradduh' |
4160 | | MCK_vrcmpyi, // 'vrcmpyi' |
4161 | | MCK_vrcmpyr, // 'vrcmpyr' |
4162 | | MCK_vrcmpys, // 'vrcmpys' |
4163 | | MCK_vrcnegh, // 'vrcnegh' |
4164 | | MCK_vrcrotate, // 'vrcrotate' |
4165 | | MCK_vrdelta, // 'vrdelta' |
4166 | | MCK_vrmaxh, // 'vrmaxh' |
4167 | | MCK_vrmaxuh, // 'vrmaxuh' |
4168 | | MCK_vrmaxuw, // 'vrmaxuw' |
4169 | | MCK_vrmaxw, // 'vrmaxw' |
4170 | | MCK_vrminh, // 'vrminh' |
4171 | | MCK_vrminuh, // 'vrminuh' |
4172 | | MCK_vrminuw, // 'vrminuw' |
4173 | | MCK_vrminw, // 'vrminw' |
4174 | | MCK_vrmpy, // 'vrmpy' |
4175 | | MCK_vrmpyb, // 'vrmpyb' |
4176 | | MCK_vrmpybsu, // 'vrmpybsu' |
4177 | | MCK_vrmpybu, // 'vrmpybu' |
4178 | | MCK_vrmpybus, // 'vrmpybus' |
4179 | | MCK_vrmpyh, // 'vrmpyh' |
4180 | | MCK_vrmpyub, // 'vrmpyub' |
4181 | | MCK_vrmpyweh, // 'vrmpyweh' |
4182 | | MCK_vrmpywoh, // 'vrmpywoh' |
4183 | | MCK_vrmpyz, // 'vrmpyz' |
4184 | | MCK_vrndwh, // 'vrndwh' |
4185 | | MCK_vror, // 'vror' |
4186 | | MCK_vrotr, // 'vrotr' |
4187 | | MCK_vround, // 'vround' |
4188 | | MCK_vroundhb, // 'vroundhb' |
4189 | | MCK_vroundhub, // 'vroundhub' |
4190 | | MCK_vrounduhub, // 'vrounduhub' |
4191 | | MCK_vrounduwuh, // 'vrounduwuh' |
4192 | | MCK_vroundwh, // 'vroundwh' |
4193 | | MCK_vroundwuh, // 'vroundwuh' |
4194 | | MCK_vrsad, // 'vrsad' |
4195 | | MCK_vrsadub, // 'vrsadub' |
4196 | | MCK_vsat, // 'vsat' |
4197 | | MCK_vsatdw, // 'vsatdw' |
4198 | | MCK_vsathb, // 'vsathb' |
4199 | | MCK_vsathub, // 'vsathub' |
4200 | | MCK_vsatuwuh, // 'vsatuwuh' |
4201 | | MCK_vsatwh, // 'vsatwh' |
4202 | | MCK_vsatwuh, // 'vsatwuh' |
4203 | | MCK_vscatter, // 'vscatter' |
4204 | | MCK_vsetq, // 'vsetq' |
4205 | | MCK_vsetq2, // 'vsetq2' |
4206 | | MCK_vshuff, // 'vshuff' |
4207 | | MCK_vshuffb, // 'vshuffb' |
4208 | | MCK_vshuffe, // 'vshuffe' |
4209 | | MCK_vshuffeb, // 'vshuffeb' |
4210 | | MCK_vshuffeh, // 'vshuffeh' |
4211 | | MCK_vshuffh, // 'vshuffh' |
4212 | | MCK_vshuffo, // 'vshuffo' |
4213 | | MCK_vshuffob, // 'vshuffob' |
4214 | | MCK_vshuffoe, // 'vshuffoe' |
4215 | | MCK_vshuffoeb, // 'vshuffoeb' |
4216 | | MCK_vshuffoeh, // 'vshuffoeh' |
4217 | | MCK_vshuffoh, // 'vshuffoh' |
4218 | | MCK_vsplat, // 'vsplat' |
4219 | | MCK_vsplatb, // 'vsplatb' |
4220 | | MCK_vsplath, // 'vsplath' |
4221 | | MCK_vspliceb, // 'vspliceb' |
4222 | | MCK_vsub, // 'vsub' |
4223 | | MCK_vsubb, // 'vsubb' |
4224 | | MCK_vsubh, // 'vsubh' |
4225 | | MCK_vsubub, // 'vsubub' |
4226 | | MCK_vsubuh, // 'vsubuh' |
4227 | | MCK_vsubuw, // 'vsubuw' |
4228 | | MCK_vsubw, // 'vsubw' |
4229 | | MCK_vswap, // 'vswap' |
4230 | | MCK_vsxt, // 'vsxt' |
4231 | | MCK_vsxtb, // 'vsxtb' |
4232 | | MCK_vsxtbh, // 'vsxtbh' |
4233 | | MCK_vsxth, // 'vsxth' |
4234 | | MCK_vsxthw, // 'vsxthw' |
4235 | | MCK_vtmpy, // 'vtmpy' |
4236 | | MCK_vtmpyb, // 'vtmpyb' |
4237 | | MCK_vtmpybus, // 'vtmpybus' |
4238 | | MCK_vtmpyhb, // 'vtmpyhb' |
4239 | | MCK_vtrans2x2, // 'vtrans2x2' |
4240 | | MCK_vtrunehb, // 'vtrunehb' |
4241 | | MCK_vtrunewh, // 'vtrunewh' |
4242 | | MCK_vtrunohb, // 'vtrunohb' |
4243 | | MCK_vtrunowh, // 'vtrunowh' |
4244 | | MCK_vunpack, // 'vunpack' |
4245 | | MCK_vunpackb, // 'vunpackb' |
4246 | | MCK_vunpackh, // 'vunpackh' |
4247 | | MCK_vunpacko, // 'vunpacko' |
4248 | | MCK_vunpackob, // 'vunpackob' |
4249 | | MCK_vunpackoh, // 'vunpackoh' |
4250 | | MCK_vunpackub, // 'vunpackub' |
4251 | | MCK_vunpackuh, // 'vunpackuh' |
4252 | | MCK_vwhist128, // 'vwhist128' |
4253 | | MCK_vwhist256, // 'vwhist256' |
4254 | | MCK_vxaddsubh, // 'vxaddsubh' |
4255 | | MCK_vxaddsubw, // 'vxaddsubw' |
4256 | | MCK_vxor, // 'vxor' |
4257 | | MCK_vxsubaddh, // 'vxsubaddh' |
4258 | | MCK_vxsubaddw, // 'vxsubaddw' |
4259 | | MCK_vzxt, // 'vzxt' |
4260 | | MCK_vzxtb, // 'vzxtb' |
4261 | | MCK_vzxtbh, // 'vzxtbh' |
4262 | | MCK_vzxth, // 'vzxth' |
4263 | | MCK_vzxthw, // 'vzxthw' |
4264 | | MCK_w, // 'w' |
4265 | | MCK_wait, // 'wait' |
4266 | | MCK_xor, // 'xor' |
4267 | | MCK_z, // 'z' |
4268 | | MCK_zextract, // 'zextract' |
4269 | | MCK_zxtb, // 'zxtb' |
4270 | | MCK_zxth, // 'zxth' |
4271 | | MCK__124_, // '|' |
4272 | | MCK__126_, // '~' |
4273 | | MCK_LAST_TOKEN = MCK__126_, |
4274 | | MCK_Reg19, // derived register class |
4275 | | MCK_Reg11, // derived register class |
4276 | | MCK_DIAG, // register class 'DIAG' |
4277 | | MCK_GP, // register class 'GP' |
4278 | | MCK_P0, // register class 'P0' |
4279 | | MCK_P1, // register class 'P1' |
4280 | | MCK_P3, // register class 'P3' |
4281 | | MCK_PC, // register class 'PC' |
4282 | | MCK_SGP0, // register class 'SGP0' |
4283 | | MCK_SGP1, // register class 'SGP1' |
4284 | | MCK_UsrBits, // register class 'UsrBits' |
4285 | | MCK_V65Regs, // register class 'V65Regs,VTMP' |
4286 | | MCK_ModRegs, // register class 'ModRegs' |
4287 | | MCK_Reg20, // derived register class |
4288 | | MCK_Reg3, // derived register class |
4289 | | MCK_HvxQR, // register class 'HvxQR' |
4290 | | MCK_PredRegs, // register class 'PredRegs' |
4291 | | MCK_Reg16, // derived register class |
4292 | | MCK_GeneralDoubleLow8Regs, // register class 'GeneralDoubleLow8Regs' |
4293 | | MCK_HvxVQR, // register class 'HvxVQR' |
4294 | | MCK_IntRegsLow8, // register class 'IntRegsLow8' |
4295 | | MCK_V62Regs, // register class 'V62Regs' |
4296 | | MCK_CtrRegs64, // register class 'CtrRegs64' |
4297 | | MCK_DoubleRegs, // register class 'DoubleRegs' |
4298 | | MCK_GeneralSubRegs, // register class 'GeneralSubRegs' |
4299 | | MCK_GuestRegs64, // register class 'GuestRegs64' |
4300 | | MCK_VectRegRev, // register class 'VectRegRev' |
4301 | | MCK_CtrRegs, // register class 'CtrRegs' |
4302 | | MCK_GuestRegs, // register class 'GuestRegs' |
4303 | | MCK_HvxWR, // register class 'HvxWR' |
4304 | | MCK_IntRegs, // register class 'IntRegs' |
4305 | | MCK_HvxVR, // register class 'HvxVR' |
4306 | | MCK_SysRegs64, // register class 'SysRegs64' |
4307 | | MCK_SysRegs, // register class 'SysRegs' |
4308 | | MCK_LAST_REGISTER = MCK_SysRegs, |
4309 | | MCK_Imm, // user defined class 'ImmAsmOperand' |
4310 | | MCK_a30_2Imm, // user defined class 'a30_2ImmOperand' |
4311 | | MCK_b13_2Imm, // user defined class 'b13_2ImmOperand' |
4312 | | MCK_b15_2Imm, // user defined class 'b15_2ImmOperand' |
4313 | | MCK_b30_2Imm, // user defined class 'b30_2ImmOperand' |
4314 | | MCK_f32Imm, // user defined class 'f32ImmOperand' |
4315 | | MCK_f64Imm, // user defined class 'f64ImmOperand' |
4316 | | MCK_m32_0Imm, // user defined class 'm32_0ImmOperand' |
4317 | | MCK_n1Const, // user defined class 'n1ConstOperand' |
4318 | | MCK_s27_2Imm, // user defined class 's27_2ImmOperand' |
4319 | | MCK_s29_3Imm, // user defined class 's29_3ImmOperand' |
4320 | | MCK_s30_2Imm, // user defined class 's30_2ImmOperand' |
4321 | | MCK_s31_1Imm, // user defined class 's31_1ImmOperand' |
4322 | | MCK_s32_0Imm, // user defined class 's32_0ImmOperand' |
4323 | | MCK_s3_0Imm, // user defined class 's3_0ImmOperand' |
4324 | | MCK_s4_0Imm, // user defined class 's4_0ImmOperand' |
4325 | | MCK_s4_1Imm, // user defined class 's4_1ImmOperand' |
4326 | | MCK_s4_2Imm, // user defined class 's4_2ImmOperand' |
4327 | | MCK_s4_3Imm, // user defined class 's4_3ImmOperand' |
4328 | | MCK_s6_0Imm, // user defined class 's6_0ImmOperand' |
4329 | | MCK_s6_3Imm, // user defined class 's6_3ImmOperand' |
4330 | | MCK_s8_0Imm, // user defined class 's8_0ImmOperand' |
4331 | | MCK_s9_0Imm, // user defined class 's9_0ImmOperand' |
4332 | | MCK_sgp10Const, // user defined class 'sgp10ConstOperand' |
4333 | | MCK_u10_0Imm, // user defined class 'u10_0ImmOperand' |
4334 | | MCK_u11_3Imm, // user defined class 'u11_3ImmOperand' |
4335 | | MCK_u16_0Imm, // user defined class 'u16_0ImmOperand' |
4336 | | MCK_u1_0Imm, // user defined class 'u1_0ImmOperand' |
4337 | | MCK_u26_6Imm, // user defined class 'u26_6ImmOperand' |
4338 | | MCK_u29_3Imm, // user defined class 'u29_3ImmOperand' |
4339 | | MCK_u2_0Imm, // user defined class 'u2_0ImmOperand' |
4340 | | MCK_u30_2Imm, // user defined class 'u30_2ImmOperand' |
4341 | | MCK_u31_1Imm, // user defined class 'u31_1ImmOperand' |
4342 | | MCK_u32_0Imm, // user defined class 'u32_0ImmOperand' |
4343 | | MCK_u3_0Imm, // user defined class 'u3_0ImmOperand' |
4344 | | MCK_u3_1Imm, // user defined class 'u3_1ImmOperand' |
4345 | | MCK_u4_0Imm, // user defined class 'u4_0ImmOperand' |
4346 | | MCK_u4_2Imm, // user defined class 'u4_2ImmOperand' |
4347 | | MCK_u5_0Imm, // user defined class 'u5_0ImmOperand' |
4348 | | MCK_u5_2Imm, // user defined class 'u5_2ImmOperand' |
4349 | | MCK_u5_3Imm, // user defined class 'u5_3ImmOperand' |
4350 | | MCK_u64_0Imm, // user defined class 'u64_0ImmOperand' |
4351 | | MCK_u6_0Imm, // user defined class 'u6_0ImmOperand' |
4352 | | MCK_u6_1Imm, // user defined class 'u6_1ImmOperand' |
4353 | | MCK_u6_2Imm, // user defined class 'u6_2ImmOperand' |
4354 | | MCK_u7_0Imm, // user defined class 'u7_0ImmOperand' |
4355 | | MCK_u8_0Imm, // user defined class 'u8_0ImmOperand' |
4356 | | NumMatchClassKinds |
4357 | | }; |
4358 | | |
4359 | | } // end anonymous namespace |
4360 | | |
4361 | 0 | static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) { |
4362 | 0 | return MCTargetAsmParser::Match_InvalidOperand; |
4363 | 0 | } |
4364 | | |
4365 | 0 | static MatchClassKind matchTokenString(StringRef Name) { |
4366 | 0 | switch (Name.size()) { |
4367 | 0 | default: break; |
4368 | 0 | case 1: // 29 strings to match. |
4369 | 0 | switch (Name[0]) { |
4370 | 0 | default: break; |
4371 | 0 | case '!': // 1 string to match. |
4372 | 0 | return MCK__EXCLAIM_; // "!" |
4373 | 0 | case '#': // 1 string to match. |
4374 | 0 | return MCK__HASH_; // "#" |
4375 | 0 | case '&': // 1 string to match. |
4376 | 0 | return MCK__38_; // "&" |
4377 | 0 | case '(': // 1 string to match. |
4378 | 0 | return MCK__40_; // "(" |
4379 | 0 | case ')': // 1 string to match. |
4380 | 0 | return MCK__41_; // ")" |
4381 | 0 | case '*': // 1 string to match. |
4382 | 0 | return MCK__STAR_; // "*" |
4383 | 0 | case '+': // 1 string to match. |
4384 | 0 | return MCK__43_; // "+" |
4385 | 0 | case '-': // 1 string to match. |
4386 | 0 | return MCK__MINUS_; // "-" |
4387 | 0 | case '.': // 1 string to match. |
4388 | 0 | return MCK__DOT_; // "." |
4389 | 0 | case '0': // 1 string to match. |
4390 | 0 | return MCK_0; // "0" |
4391 | 0 | case '1': // 1 string to match. |
4392 | 0 | return MCK_1; // "1" |
4393 | 0 | case ':': // 1 string to match. |
4394 | 0 | return MCK__COLON_; // ":" |
4395 | 0 | case ';': // 1 string to match. |
4396 | 0 | return MCK__59_; // ";" |
4397 | 0 | case '<': // 1 string to match. |
4398 | 0 | return MCK__LT_; // "<" |
4399 | 0 | case '=': // 1 string to match. |
4400 | 0 | return MCK__61_; // "=" |
4401 | 0 | case '>': // 1 string to match. |
4402 | 0 | return MCK__GT_; // ">" |
4403 | 0 | case 'I': // 1 string to match. |
4404 | 0 | return MCK_I; // "I" |
4405 | 0 | case '^': // 1 string to match. |
4406 | 0 | return MCK__94_; // "^" |
4407 | 0 | case 'b': // 1 string to match. |
4408 | 0 | return MCK_b; // "b" |
4409 | 0 | case 'c': // 1 string to match. |
4410 | 0 | return MCK_c; // "c" |
4411 | 0 | case 'h': // 1 string to match. |
4412 | 0 | return MCK_h; // "h" |
4413 | 0 | case 'l': // 1 string to match. |
4414 | 0 | return MCK_l; // "l" |
4415 | 0 | case 'n': // 1 string to match. |
4416 | 0 | return MCK_n; // "n" |
4417 | 0 | case 't': // 1 string to match. |
4418 | 0 | return MCK_t; // "t" |
4419 | 0 | case 'v': // 1 string to match. |
4420 | 0 | return MCK_v; // "v" |
4421 | 0 | case 'w': // 1 string to match. |
4422 | 0 | return MCK_w; // "w" |
4423 | 0 | case 'z': // 1 string to match. |
4424 | 0 | return MCK_z; // "z" |
4425 | 0 | case '|': // 1 string to match. |
4426 | 0 | return MCK__124_; // "|" |
4427 | 0 | case '~': // 1 string to match. |
4428 | 0 | return MCK__126_; // "~" |
4429 | 0 | } |
4430 | 0 | break; |
4431 | 0 | case 2: // 19 strings to match. |
4432 | 0 | switch (Name[0]) { |
4433 | 0 | default: break; |
4434 | 0 | case '1': // 1 string to match. |
4435 | 0 | if (Name[1] != '6') |
4436 | 0 | break; |
4437 | 0 | return MCK_16; // "16" |
4438 | 0 | case 'a': // 1 string to match. |
4439 | 0 | if (Name[1] != 't') |
4440 | 0 | break; |
4441 | 0 | return MCK_at; // "at" |
4442 | 0 | case 'b': // 1 string to match. |
4443 | 0 | if (Name[1] != 'f') |
4444 | 0 | break; |
4445 | 0 | return MCK_bf; // "bf" |
4446 | 0 | case 'e': // 1 string to match. |
4447 | 0 | if (Name[1] != 'q') |
4448 | 0 | break; |
4449 | 0 | return MCK_eq; // "eq" |
4450 | 0 | case 'g': // 2 strings to match. |
4451 | 0 | switch (Name[1]) { |
4452 | 0 | default: break; |
4453 | 0 | case 'e': // 1 string to match. |
4454 | 0 | return MCK_ge; // "ge" |
4455 | 0 | case 't': // 1 string to match. |
4456 | 0 | return MCK_gt; // "gt" |
4457 | 0 | } |
4458 | 0 | break; |
4459 | 0 | case 'h': // 2 strings to match. |
4460 | 0 | switch (Name[1]) { |
4461 | 0 | default: break; |
4462 | 0 | case 'f': // 1 string to match. |
4463 | 0 | return MCK_hf; // "hf" |
4464 | 0 | case 'i': // 1 string to match. |
4465 | 0 | return MCK_hi; // "hi" |
4466 | 0 | } |
4467 | 0 | break; |
4468 | 0 | case 'i': // 1 string to match. |
4469 | 0 | if (Name[1] != 'f') |
4470 | 0 | break; |
4471 | 0 | return MCK_if; // "if" |
4472 | 0 | case 'l': // 2 strings to match. |
4473 | 0 | switch (Name[1]) { |
4474 | 0 | default: break; |
4475 | 0 | case 'o': // 1 string to match. |
4476 | 0 | return MCK_lo; // "lo" |
4477 | 0 | case 't': // 1 string to match. |
4478 | 0 | return MCK_lt; // "lt" |
4479 | 0 | } |
4480 | 0 | break; |
4481 | 0 | case 'n': // 1 string to match. |
4482 | 0 | if (Name[1] != 't') |
4483 | 0 | break; |
4484 | 0 | return MCK_nt; // "nt" |
4485 | 0 | case 'o': // 1 string to match. |
4486 | 0 | if (Name[1] != 'r') |
4487 | 0 | break; |
4488 | 0 | return MCK_or; // "or" |
4489 | 0 | case 's': // 2 strings to match. |
4490 | 0 | switch (Name[1]) { |
4491 | 0 | default: break; |
4492 | 0 | case 'f': // 1 string to match. |
4493 | 0 | return MCK_sf; // "sf" |
4494 | 0 | case 't': // 1 string to match. |
4495 | 0 | return MCK_st; // "st" |
4496 | 0 | } |
4497 | 0 | break; |
4498 | 0 | case 'u': // 4 strings to match. |
4499 | 0 | switch (Name[1]) { |
4500 | 0 | default: break; |
4501 | 0 | case 'b': // 1 string to match. |
4502 | 0 | return MCK_ub; // "ub" |
4503 | 0 | case 'h': // 1 string to match. |
4504 | 0 | return MCK_uh; // "uh" |
4505 | 0 | case 'o': // 1 string to match. |
4506 | 0 | return MCK_uo; // "uo" |
4507 | 0 | case 'w': // 1 string to match. |
4508 | 0 | return MCK_uw; // "uw" |
4509 | 0 | } |
4510 | 0 | break; |
4511 | 0 | } |
4512 | 0 | break; |
4513 | 0 | case 3: // 41 strings to match. |
4514 | 0 | switch (Name[0]) { |
4515 | 0 | default: break; |
4516 | 0 | case 'a': // 5 strings to match. |
4517 | 0 | switch (Name[1]) { |
4518 | 0 | default: break; |
4519 | 0 | case 'b': // 1 string to match. |
4520 | 0 | if (Name[2] != 's') |
4521 | 0 | break; |
4522 | 0 | return MCK_abs; // "abs" |
4523 | 0 | case 'd': // 1 string to match. |
4524 | 0 | if (Name[2] != 'd') |
4525 | 0 | break; |
4526 | 0 | return MCK_add; // "add" |
4527 | 0 | case 'n': // 1 string to match. |
4528 | 0 | if (Name[2] != 'd') |
4529 | 0 | break; |
4530 | 0 | return MCK_and; // "and" |
4531 | 0 | case 's': // 2 strings to match. |
4532 | 0 | switch (Name[2]) { |
4533 | 0 | default: break; |
4534 | 0 | case 'l': // 1 string to match. |
4535 | 0 | return MCK_asl; // "asl" |
4536 | 0 | case 'r': // 1 string to match. |
4537 | 0 | return MCK_asr; // "asr" |
4538 | 0 | } |
4539 | 0 | break; |
4540 | 0 | } |
4541 | 0 | break; |
4542 | 0 | case 'b': // 1 string to match. |
4543 | 0 | if (memcmp(Name.data()+1, "10", 2) != 0) |
4544 | 0 | break; |
4545 | 0 | return MCK_b10; // "b10" |
4546 | 0 | case 'c': // 7 strings to match. |
4547 | 0 | switch (Name[1]) { |
4548 | 0 | default: break; |
4549 | 0 | case 'l': // 3 strings to match. |
4550 | 0 | switch (Name[2]) { |
4551 | 0 | default: break; |
4552 | 0 | case '0': // 1 string to match. |
4553 | 0 | return MCK_cl0; // "cl0" |
4554 | 0 | case '1': // 1 string to match. |
4555 | 0 | return MCK_cl1; // "cl1" |
4556 | 0 | case 'b': // 1 string to match. |
4557 | 0 | return MCK_clb; // "clb" |
4558 | 0 | } |
4559 | 0 | break; |
4560 | 0 | case 'm': // 1 string to match. |
4561 | 0 | if (Name[2] != 'p') |
4562 | 0 | break; |
4563 | 0 | return MCK_cmp; // "cmp" |
4564 | 0 | case 't': // 2 strings to match. |
4565 | 0 | switch (Name[2]) { |
4566 | 0 | default: break; |
4567 | 0 | case '0': // 1 string to match. |
4568 | 0 | return MCK_ct0; // "ct0" |
4569 | 0 | case '1': // 1 string to match. |
4570 | 0 | return MCK_ct1; // "ct1" |
4571 | 0 | } |
4572 | 0 | break; |
4573 | 0 | case 'u': // 1 string to match. |
4574 | 0 | if (Name[2] != 'r') |
4575 | 0 | break; |
4576 | 0 | return MCK_cur; // "cur" |
4577 | 0 | } |
4578 | 0 | break; |
4579 | 0 | case 'g': // 2 strings to match. |
4580 | 0 | switch (Name[1]) { |
4581 | 0 | default: break; |
4582 | 0 | case 'e': // 1 string to match. |
4583 | 0 | if (Name[2] != 'u') |
4584 | 0 | break; |
4585 | 0 | return MCK_geu; // "geu" |
4586 | 0 | case 't': // 1 string to match. |
4587 | 0 | if (Name[2] != 'u') |
4588 | 0 | break; |
4589 | 0 | return MCK_gtu; // "gtu" |
4590 | 0 | } |
4591 | 0 | break; |
4592 | 0 | case 'l': // 5 strings to match. |
4593 | 0 | switch (Name[1]) { |
4594 | 0 | default: break; |
4595 | 0 | case 'f': // 1 string to match. |
4596 | 0 | if (Name[2] != 's') |
4597 | 0 | break; |
4598 | 0 | return MCK_lfs; // "lfs" |
4599 | 0 | case 'i': // 1 string to match. |
4600 | 0 | if (Name[2] != 'b') |
4601 | 0 | break; |
4602 | 0 | return MCK_lib; // "lib" |
4603 | 0 | case 's': // 2 strings to match. |
4604 | 0 | switch (Name[2]) { |
4605 | 0 | default: break; |
4606 | 0 | case 'l': // 1 string to match. |
4607 | 0 | return MCK_lsl; // "lsl" |
4608 | 0 | case 'r': // 1 string to match. |
4609 | 0 | return MCK_lsr; // "lsr" |
4610 | 0 | } |
4611 | 0 | break; |
4612 | 0 | case 't': // 1 string to match. |
4613 | 0 | if (Name[2] != 'u') |
4614 | 0 | break; |
4615 | 0 | return MCK_ltu; // "ltu" |
4616 | 0 | } |
4617 | 0 | break; |
4618 | 0 | case 'm': // 4 strings to match. |
4619 | 0 | switch (Name[1]) { |
4620 | 0 | default: break; |
4621 | 0 | case 'a': // 1 string to match. |
4622 | 0 | if (Name[2] != 'x') |
4623 | 0 | break; |
4624 | 0 | return MCK_max; // "max" |
4625 | 0 | case 'i': // 1 string to match. |
4626 | 0 | if (Name[2] != 'n') |
4627 | 0 | break; |
4628 | 0 | return MCK_min; // "min" |
4629 | 0 | case 'p': // 1 string to match. |
4630 | 0 | if (Name[2] != 'y') |
4631 | 0 | break; |
4632 | 0 | return MCK_mpy; // "mpy" |
4633 | 0 | case 'u': // 1 string to match. |
4634 | 0 | if (Name[2] != 'x') |
4635 | 0 | break; |
4636 | 0 | return MCK_mux; // "mux" |
4637 | 0 | } |
4638 | 0 | break; |
4639 | 0 | case 'n': // 5 strings to match. |
4640 | 0 | switch (Name[1]) { |
4641 | 0 | default: break; |
4642 | 0 | case 'e': // 2 strings to match. |
4643 | 0 | switch (Name[2]) { |
4644 | 0 | default: break; |
4645 | 0 | case 'g': // 1 string to match. |
4646 | 0 | return MCK_neg; // "neg" |
4647 | 0 | case 'w': // 1 string to match. |
4648 | 0 | return MCK_new; // "new" |
4649 | 0 | } |
4650 | 0 | break; |
4651 | 0 | case 'm': // 1 string to match. |
4652 | 0 | if (Name[2] != 'i') |
4653 | 0 | break; |
4654 | 0 | return MCK_nmi; // "nmi" |
4655 | 0 | case 'o': // 2 strings to match. |
4656 | 0 | switch (Name[2]) { |
4657 | 0 | default: break; |
4658 | 0 | case 'p': // 1 string to match. |
4659 | 0 | return MCK_nop; // "nop" |
4660 | 0 | case 't': // 1 string to match. |
4661 | 0 | return MCK_not; // "not" |
4662 | 0 | } |
4663 | 0 | break; |
4664 | 0 | } |
4665 | 0 | break; |
4666 | 0 | case 'p': // 1 string to match. |
4667 | 0 | if (memcmp(Name.data()+1, "os", 2) != 0) |
4668 | 0 | break; |
4669 | 0 | return MCK_pos; // "pos" |
4670 | 0 | case 'r': // 4 strings to match. |
4671 | 0 | switch (Name[1]) { |
4672 | 0 | default: break; |
4673 | 0 | case 'a': // 1 string to match. |
4674 | 0 | if (Name[2] != 'w') |
4675 | 0 | break; |
4676 | 0 | return MCK_raw; // "raw" |
4677 | 0 | case 'n': // 1 string to match. |
4678 | 0 | if (Name[2] != 'd') |
4679 | 0 | break; |
4680 | 0 | return MCK_rnd; // "rnd" |
4681 | 0 | case 'o': // 1 string to match. |
4682 | 0 | if (Name[2] != 'l') |
4683 | 0 | break; |
4684 | 0 | return MCK_rol; // "rol" |
4685 | 0 | case 't': // 1 string to match. |
4686 | 0 | if (Name[2] != 'e') |
4687 | 0 | break; |
4688 | 0 | return MCK_rte; // "rte" |
4689 | 0 | } |
4690 | 0 | break; |
4691 | 0 | case 's': // 4 strings to match. |
4692 | 0 | switch (Name[1]) { |
4693 | 0 | default: break; |
4694 | 0 | case 'a': // 1 string to match. |
4695 | 0 | if (Name[2] != 't') |
4696 | 0 | break; |
4697 | 0 | return MCK_sat; // "sat" |
4698 | 0 | case 'g': // 1 string to match. |
4699 | 0 | if (Name[2] != 'p') |
4700 | 0 | break; |
4701 | 0 | return MCK_sgp; // "sgp" |
4702 | 0 | case 'u': // 1 string to match. |
4703 | 0 | if (Name[2] != 'b') |
4704 | 0 | break; |
4705 | 0 | return MCK_sub; // "sub" |
4706 | 0 | case 'w': // 1 string to match. |
4707 | 0 | if (Name[2] != 'i') |
4708 | 0 | break; |
4709 | 0 | return MCK_swi; // "swi" |
4710 | 0 | } |
4711 | 0 | break; |
4712 | 0 | case 't': // 1 string to match. |
4713 | 0 | if (memcmp(Name.data()+1, "mp", 2) != 0) |
4714 | 0 | break; |
4715 | 0 | return MCK_tmp; // "tmp" |
4716 | 0 | case 'v': // 1 string to match. |
4717 | 0 | if (memcmp(Name.data()+1, "or", 2) != 0) |
4718 | 0 | break; |
4719 | 0 | return MCK_vor; // "vor" |
4720 | 0 | case 'x': // 1 string to match. |
4721 | 0 | if (memcmp(Name.data()+1, "or", 2) != 0) |
4722 | 0 | break; |
4723 | 0 | return MCK_xor; // "xor" |
4724 | 0 | } |
4725 | 0 | break; |
4726 | 0 | case 4: // 67 strings to match. |
4727 | 0 | switch (Name[0]) { |
4728 | 0 | default: break; |
4729 | 0 | case 'a': // 4 strings to match. |
4730 | 0 | switch (Name[1]) { |
4731 | 0 | default: break; |
4732 | 0 | case 'l': // 1 string to match. |
4733 | 0 | if (memcmp(Name.data()+2, "l8", 2) != 0) |
4734 | 0 | break; |
4735 | 0 | return MCK_all8; // "all8" |
4736 | 0 | case 'n': // 1 string to match. |
4737 | 0 | if (memcmp(Name.data()+2, "y8", 2) != 0) |
4738 | 0 | break; |
4739 | 0 | return MCK_any8; // "any8" |
4740 | 0 | case 's': // 2 strings to match. |
4741 | 0 | switch (Name[2]) { |
4742 | 0 | default: break; |
4743 | 0 | case 'l': // 1 string to match. |
4744 | 0 | if (Name[3] != 'h') |
4745 | 0 | break; |
4746 | 0 | return MCK_aslh; // "aslh" |
4747 | 0 | case 'r': // 1 string to match. |
4748 | 0 | if (Name[3] != 'h') |
4749 | 0 | break; |
4750 | 0 | return MCK_asrh; // "asrh" |
4751 | 0 | } |
4752 | 0 | break; |
4753 | 0 | } |
4754 | 0 | break; |
4755 | 0 | case 'b': // 1 string to match. |
4756 | 0 | if (memcmp(Name.data()+1, "rev", 3) != 0) |
4757 | 0 | break; |
4758 | 0 | return MCK_brev; // "brev" |
4759 | 0 | case 'c': // 10 strings to match. |
4760 | 0 | switch (Name[1]) { |
4761 | 0 | default: break; |
4762 | 0 | case 'a': // 1 string to match. |
4763 | 0 | if (memcmp(Name.data()+2, "ll", 2) != 0) |
4764 | 0 | break; |
4765 | 0 | return MCK_call; // "call" |
4766 | 0 | case 'h': // 1 string to match. |
4767 | 0 | if (memcmp(Name.data()+2, "op", 2) != 0) |
4768 | 0 | break; |
4769 | 0 | return MCK_chop; // "chop" |
4770 | 0 | case 'i': // 2 strings to match. |
4771 | 0 | switch (Name[2]) { |
4772 | 0 | default: break; |
4773 | 0 | case 'a': // 1 string to match. |
4774 | 0 | if (Name[3] != 'd') |
4775 | 0 | break; |
4776 | 0 | return MCK_ciad; // "ciad" |
4777 | 0 | case 'r': // 1 string to match. |
4778 | 0 | if (Name[3] != 'c') |
4779 | 0 | break; |
4780 | 0 | return MCK_circ; // "circ" |
4781 | 0 | } |
4782 | 0 | break; |
4783 | 0 | case 'l': // 1 string to match. |
4784 | 0 | if (memcmp(Name.data()+2, "ip", 2) != 0) |
4785 | 0 | break; |
4786 | 0 | return MCK_clip; // "clip" |
4787 | 0 | case 'm': // 3 strings to match. |
4788 | 0 | if (Name[2] != 'p') |
4789 | 0 | break; |
4790 | 0 | switch (Name[3]) { |
4791 | 0 | default: break; |
4792 | 0 | case 'b': // 1 string to match. |
4793 | 0 | return MCK_cmpb; // "cmpb" |
4794 | 0 | case 'h': // 1 string to match. |
4795 | 0 | return MCK_cmph; // "cmph" |
4796 | 0 | case 'y': // 1 string to match. |
4797 | 0 | return MCK_cmpy; // "cmpy" |
4798 | 0 | } |
4799 | 0 | break; |
4800 | 0 | case 'r': // 1 string to match. |
4801 | 0 | if (memcmp(Name.data()+2, "nd", 2) != 0) |
4802 | 0 | break; |
4803 | 0 | return MCK_crnd; // "crnd" |
4804 | 0 | case 's': // 1 string to match. |
4805 | 0 | if (memcmp(Name.data()+2, "wi", 2) != 0) |
4806 | 0 | break; |
4807 | 0 | return MCK_cswi; // "cswi" |
4808 | 0 | } |
4809 | 0 | break; |
4810 | 0 | case 'j': // 1 string to match. |
4811 | 0 | if (memcmp(Name.data()+1, "ump", 3) != 0) |
4812 | 0 | break; |
4813 | 0 | return MCK_jump; // "jump" |
4814 | 0 | case 'm': // 9 strings to match. |
4815 | 0 | switch (Name[1]) { |
4816 | 0 | default: break; |
4817 | 0 | case 'a': // 2 strings to match. |
4818 | 0 | switch (Name[2]) { |
4819 | 0 | default: break; |
4820 | 0 | case 's': // 1 string to match. |
4821 | 0 | if (Name[3] != 'k') |
4822 | 0 | break; |
4823 | 0 | return MCK_mask; // "mask" |
4824 | 0 | case 'x': // 1 string to match. |
4825 | 0 | if (Name[3] != 'u') |
4826 | 0 | break; |
4827 | 0 | return MCK_maxu; // "maxu" |
4828 | 0 | } |
4829 | 0 | break; |
4830 | 0 | case 'e': // 4 strings to match. |
4831 | 0 | if (Name[2] != 'm') |
4832 | 0 | break; |
4833 | 0 | switch (Name[3]) { |
4834 | 0 | default: break; |
4835 | 0 | case 'b': // 1 string to match. |
4836 | 0 | return MCK_memb; // "memb" |
4837 | 0 | case 'd': // 1 string to match. |
4838 | 0 | return MCK_memd; // "memd" |
4839 | 0 | case 'h': // 1 string to match. |
4840 | 0 | return MCK_memh; // "memh" |
4841 | 0 | case 'w': // 1 string to match. |
4842 | 0 | return MCK_memw; // "memw" |
4843 | 0 | } |
4844 | 0 | break; |
4845 | 0 | case 'i': // 1 string to match. |
4846 | 0 | if (memcmp(Name.data()+2, "nu", 2) != 0) |
4847 | 0 | break; |
4848 | 0 | return MCK_minu; // "minu" |
4849 | 0 | case 'p': // 2 strings to match. |
4850 | 0 | if (Name[2] != 'y') |
4851 | 0 | break; |
4852 | 0 | switch (Name[3]) { |
4853 | 0 | default: break; |
4854 | 0 | case 'i': // 1 string to match. |
4855 | 0 | return MCK_mpyi; // "mpyi" |
4856 | 0 | case 'u': // 1 string to match. |
4857 | 0 | return MCK_mpyu; // "mpyu" |
4858 | 0 | } |
4859 | 0 | break; |
4860 | 0 | } |
4861 | 0 | break; |
4862 | 0 | case 'q': // 2 strings to match. |
4863 | 0 | if (Name[1] != 'f') |
4864 | 0 | break; |
4865 | 0 | switch (Name[2]) { |
4866 | 0 | default: break; |
4867 | 0 | case '1': // 1 string to match. |
4868 | 0 | if (Name[3] != '6') |
4869 | 0 | break; |
4870 | 0 | return MCK_qf16; // "qf16" |
4871 | 0 | case '3': // 1 string to match. |
4872 | 0 | if (Name[3] != '2') |
4873 | 0 | break; |
4874 | 0 | return MCK_qf32; // "qf32" |
4875 | 0 | } |
4876 | 0 | break; |
4877 | 0 | case 's': // 8 strings to match. |
4878 | 0 | switch (Name[1]) { |
4879 | 0 | default: break; |
4880 | 0 | case 'a': // 2 strings to match. |
4881 | 0 | if (Name[2] != 't') |
4882 | 0 | break; |
4883 | 0 | switch (Name[3]) { |
4884 | 0 | default: break; |
4885 | 0 | case 'b': // 1 string to match. |
4886 | 0 | return MCK_satb; // "satb" |
4887 | 0 | case 'h': // 1 string to match. |
4888 | 0 | return MCK_sath; // "sath" |
4889 | 0 | } |
4890 | 0 | break; |
4891 | 0 | case 'i': // 1 string to match. |
4892 | 0 | if (memcmp(Name.data()+2, "ad", 2) != 0) |
4893 | 0 | break; |
4894 | 0 | return MCK_siad; // "siad" |
4895 | 0 | case 't': // 1 string to match. |
4896 | 0 | if (memcmp(Name.data()+2, "op", 2) != 0) |
4897 | 0 | break; |
4898 | 0 | return MCK_stop; // "stop" |
4899 | 0 | case 'w': // 1 string to match. |
4900 | 0 | if (memcmp(Name.data()+2, "iz", 2) != 0) |
4901 | 0 | break; |
4902 | 0 | return MCK_swiz; // "swiz" |
4903 | 0 | case 'x': // 3 strings to match. |
4904 | 0 | if (Name[2] != 't') |
4905 | 0 | break; |
4906 | 0 | switch (Name[3]) { |
4907 | 0 | default: break; |
4908 | 0 | case 'b': // 1 string to match. |
4909 | 0 | return MCK_sxtb; // "sxtb" |
4910 | 0 | case 'h': // 1 string to match. |
4911 | 0 | return MCK_sxth; // "sxth" |
4912 | 0 | case 'w': // 1 string to match. |
4913 | 0 | return MCK_sxtw; // "sxtw" |
4914 | 0 | } |
4915 | 0 | break; |
4916 | 0 | } |
4917 | 0 | break; |
4918 | 0 | case 't': // 3 strings to match. |
4919 | 0 | if (memcmp(Name.data()+1, "lb", 2) != 0) |
4920 | 0 | break; |
4921 | 0 | switch (Name[3]) { |
4922 | 0 | default: break; |
4923 | 0 | case 'p': // 1 string to match. |
4924 | 0 | return MCK_tlbp; // "tlbp" |
4925 | 0 | case 'r': // 1 string to match. |
4926 | 0 | return MCK_tlbr; // "tlbr" |
4927 | 0 | case 'w': // 1 string to match. |
4928 | 0 | return MCK_tlbw; // "tlbw" |
4929 | 0 | } |
4930 | 0 | break; |
4931 | 0 | case 'v': // 26 strings to match. |
4932 | 0 | switch (Name[1]) { |
4933 | 0 | default: break; |
4934 | 0 | case 'a': // 6 strings to match. |
4935 | 0 | switch (Name[2]) { |
4936 | 0 | default: break; |
4937 | 0 | case 'b': // 1 string to match. |
4938 | 0 | if (Name[3] != 's') |
4939 | 0 | break; |
4940 | 0 | return MCK_vabs; // "vabs" |
4941 | 0 | case 'd': // 1 string to match. |
4942 | 0 | if (Name[3] != 'd') |
4943 | 0 | break; |
4944 | 0 | return MCK_vadd; // "vadd" |
4945 | 0 | case 'n': // 1 string to match. |
4946 | 0 | if (Name[3] != 'd') |
4947 | 0 | break; |
4948 | 0 | return MCK_vand; // "vand" |
4949 | 0 | case 's': // 2 strings to match. |
4950 | 0 | switch (Name[3]) { |
4951 | 0 | default: break; |
4952 | 0 | case 'l': // 1 string to match. |
4953 | 0 | return MCK_vasl; // "vasl" |
4954 | 0 | case 'r': // 1 string to match. |
4955 | 0 | return MCK_vasr; // "vasr" |
4956 | 0 | } |
4957 | 0 | break; |
4958 | 0 | case 'v': // 1 string to match. |
4959 | 0 | if (Name[3] != 'g') |
4960 | 0 | break; |
4961 | 0 | return MCK_vavg; // "vavg" |
4962 | 0 | } |
4963 | 0 | break; |
4964 | 0 | case 'c': // 4 strings to match. |
4965 | 0 | switch (Name[2]) { |
4966 | 0 | default: break; |
4967 | 0 | case 'l': // 2 strings to match. |
4968 | 0 | switch (Name[3]) { |
4969 | 0 | default: break; |
4970 | 0 | case '0': // 1 string to match. |
4971 | 0 | return MCK_vcl0; // "vcl0" |
4972 | 0 | case 'b': // 1 string to match. |
4973 | 0 | return MCK_vclb; // "vclb" |
4974 | 0 | } |
4975 | 0 | break; |
4976 | 0 | case 'm': // 1 string to match. |
4977 | 0 | if (Name[3] != 'p') |
4978 | 0 | break; |
4979 | 0 | return MCK_vcmp; // "vcmp" |
4980 | 0 | case 'v': // 1 string to match. |
4981 | 0 | if (Name[3] != 't') |
4982 | 0 | break; |
4983 | 0 | return MCK_vcvt; // "vcvt" |
4984 | 0 | } |
4985 | 0 | break; |
4986 | 0 | case 'f': // 1 string to match. |
4987 | 0 | if (memcmp(Name.data()+2, "mv", 2) != 0) |
4988 | 0 | break; |
4989 | 0 | return MCK_vfmv; // "vfmv" |
4990 | 0 | case 'l': // 1 string to match. |
4991 | 0 | if (memcmp(Name.data()+2, "sr", 2) != 0) |
4992 | 0 | break; |
4993 | 0 | return MCK_vlsr; // "vlsr" |
4994 | 0 | case 'm': // 7 strings to match. |
4995 | 0 | switch (Name[2]) { |
4996 | 0 | default: break; |
4997 | 0 | case 'a': // 1 string to match. |
4998 | 0 | if (Name[3] != 'x') |
4999 | 0 | break; |
5000 | 0 | return MCK_vmax; // "vmax" |
5001 | 0 | case 'e': // 1 string to match. |
5002 | 0 | if (Name[3] != 'm') |
5003 | 0 | break; |
5004 | 0 | return MCK_vmem; // "vmem" |
5005 | 0 | case 'i': // 1 string to match. |
5006 | 0 | if (Name[3] != 'n') |
5007 | 0 | break; |
5008 | 0 | return MCK_vmin; // "vmin" |
5009 | 0 | case 'p': // 3 strings to match. |
5010 | 0 | switch (Name[3]) { |
5011 | 0 | default: break; |
5012 | 0 | case 'a': // 1 string to match. |
5013 | 0 | return MCK_vmpa; // "vmpa" |
5014 | 0 | case 's': // 1 string to match. |
5015 | 0 | return MCK_vmps; // "vmps" |
5016 | 0 | case 'y': // 1 string to match. |
5017 | 0 | return MCK_vmpy; // "vmpy" |
5018 | 0 | } |
5019 | 0 | break; |
5020 | 0 | case 'u': // 1 string to match. |
5021 | 0 | if (Name[3] != 'x') |
5022 | 0 | break; |
5023 | 0 | return MCK_vmux; // "vmux" |
5024 | 0 | } |
5025 | 0 | break; |
5026 | 0 | case 'n': // 1 string to match. |
5027 | 0 | if (memcmp(Name.data()+2, "ot", 2) != 0) |
5028 | 0 | break; |
5029 | 0 | return MCK_vnot; // "vnot" |
5030 | 0 | case 'r': // 1 string to match. |
5031 | 0 | if (memcmp(Name.data()+2, "or", 2) != 0) |
5032 | 0 | break; |
5033 | 0 | return MCK_vror; // "vror" |
5034 | 0 | case 's': // 3 strings to match. |
5035 | 0 | switch (Name[2]) { |
5036 | 0 | default: break; |
5037 | 0 | case 'a': // 1 string to match. |
5038 | 0 | if (Name[3] != 't') |
5039 | 0 | break; |
5040 | 0 | return MCK_vsat; // "vsat" |
5041 | 0 | case 'u': // 1 string to match. |
5042 | 0 | if (Name[3] != 'b') |
5043 | 0 | break; |
5044 | 0 | return MCK_vsub; // "vsub" |
5045 | 0 | case 'x': // 1 string to match. |
5046 | 0 | if (Name[3] != 't') |
5047 | 0 | break; |
5048 | 0 | return MCK_vsxt; // "vsxt" |
5049 | 0 | } |
5050 | 0 | break; |
5051 | 0 | case 'x': // 1 string to match. |
5052 | 0 | if (memcmp(Name.data()+2, "or", 2) != 0) |
5053 | 0 | break; |
5054 | 0 | return MCK_vxor; // "vxor" |
5055 | 0 | case 'z': // 1 string to match. |
5056 | 0 | if (memcmp(Name.data()+2, "xt", 2) != 0) |
5057 | 0 | break; |
5058 | 0 | return MCK_vzxt; // "vzxt" |
5059 | 0 | } |
5060 | 0 | break; |
5061 | 0 | case 'w': // 1 string to match. |
5062 | 0 | if (memcmp(Name.data()+1, "ait", 3) != 0) |
5063 | 0 | break; |
5064 | 0 | return MCK_wait; // "wait" |
5065 | 0 | case 'z': // 2 strings to match. |
5066 | 0 | if (memcmp(Name.data()+1, "xt", 2) != 0) |
5067 | 0 | break; |
5068 | 0 | switch (Name[3]) { |
5069 | 0 | default: break; |
5070 | 0 | case 'b': // 1 string to match. |
5071 | 0 | return MCK_zxtb; // "zxtb" |
5072 | 0 | case 'h': // 1 string to match. |
5073 | 0 | return MCK_zxth; // "zxth" |
5074 | 0 | } |
5075 | 0 | break; |
5076 | 0 | } |
5077 | 0 | break; |
5078 | 0 | case 5: // 101 strings to match. |
5079 | 0 | switch (Name[0]) { |
5080 | 0 | default: break; |
5081 | 0 | case 'b': // 1 string to match. |
5082 | 0 | if (memcmp(Name.data()+1, "rkpt", 4) != 0) |
5083 | 0 | break; |
5084 | 0 | return MCK_brkpt; // "brkpt" |
5085 | 0 | case 'c': // 5 strings to match. |
5086 | 0 | switch (Name[1]) { |
5087 | 0 | default: break; |
5088 | 0 | case 'a': // 2 strings to match. |
5089 | 0 | switch (Name[2]) { |
5090 | 0 | default: break; |
5091 | 0 | case 'l': // 1 string to match. |
5092 | 0 | if (memcmp(Name.data()+3, "lr", 2) != 0) |
5093 | 0 | break; |
5094 | 0 | return MCK_callr; // "callr" |
5095 | 0 | case 'r': // 1 string to match. |
5096 | 0 | if (memcmp(Name.data()+3, "ry", 2) != 0) |
5097 | 0 | break; |
5098 | 0 | return MCK_carry; // "carry" |
5099 | 0 | } |
5100 | 0 | break; |
5101 | 0 | case 'm': // 2 strings to match. |
5102 | 0 | if (memcmp(Name.data()+2, "py", 2) != 0) |
5103 | 0 | break; |
5104 | 0 | switch (Name[4]) { |
5105 | 0 | default: break; |
5106 | 0 | case 'i': // 1 string to match. |
5107 | 0 | return MCK_cmpyi; // "cmpyi" |
5108 | 0 | case 'r': // 1 string to match. |
5109 | 0 | return MCK_cmpyr; // "cmpyr" |
5110 | 0 | } |
5111 | 0 | break; |
5112 | 0 | case 't': // 1 string to match. |
5113 | 0 | if (memcmp(Name.data()+2, "lbw", 3) != 0) |
5114 | 0 | break; |
5115 | 0 | return MCK_ctlbw; // "ctlbw" |
5116 | 0 | } |
5117 | 0 | break; |
5118 | 0 | case 'd': // 7 strings to match. |
5119 | 0 | switch (Name[1]) { |
5120 | 0 | default: break; |
5121 | 0 | case 'f': // 5 strings to match. |
5122 | 0 | switch (Name[2]) { |
5123 | 0 | default: break; |
5124 | 0 | case 'a': // 1 string to match. |
5125 | 0 | if (memcmp(Name.data()+3, "dd", 2) != 0) |
5126 | 0 | break; |
5127 | 0 | return MCK_dfadd; // "dfadd" |
5128 | 0 | case 'c': // 1 string to match. |
5129 | 0 | if (memcmp(Name.data()+3, "mp", 2) != 0) |
5130 | 0 | break; |
5131 | 0 | return MCK_dfcmp; // "dfcmp" |
5132 | 0 | case 'm': // 2 strings to match. |
5133 | 0 | switch (Name[3]) { |
5134 | 0 | default: break; |
5135 | 0 | case 'a': // 1 string to match. |
5136 | 0 | if (Name[4] != 'x') |
5137 | 0 | break; |
5138 | 0 | return MCK_dfmax; // "dfmax" |
5139 | 0 | case 'i': // 1 string to match. |
5140 | 0 | if (Name[4] != 'n') |
5141 | 0 | break; |
5142 | 0 | return MCK_dfmin; // "dfmin" |
5143 | 0 | } |
5144 | 0 | break; |
5145 | 0 | case 's': // 1 string to match. |
5146 | 0 | if (memcmp(Name.data()+3, "ub", 2) != 0) |
5147 | 0 | break; |
5148 | 0 | return MCK_dfsub; // "dfsub" |
5149 | 0 | } |
5150 | 0 | break; |
5151 | 0 | case 'i': // 2 strings to match. |
5152 | 0 | if (memcmp(Name.data()+2, "ag", 2) != 0) |
5153 | 0 | break; |
5154 | 0 | switch (Name[4]) { |
5155 | 0 | default: break; |
5156 | 0 | case '0': // 1 string to match. |
5157 | 0 | return MCK_diag0; // "diag0" |
5158 | 0 | case '1': // 1 string to match. |
5159 | 0 | return MCK_diag1; // "diag1" |
5160 | 0 | } |
5161 | 0 | break; |
5162 | 0 | } |
5163 | 0 | break; |
5164 | 0 | case 'i': // 1 string to match. |
5165 | 0 | if (memcmp(Name.data()+1, "sync", 4) != 0) |
5166 | 0 | break; |
5167 | 0 | return MCK_isync; // "isync" |
5168 | 0 | case 'j': // 1 string to match. |
5169 | 0 | if (memcmp(Name.data()+1, "umpr", 4) != 0) |
5170 | 0 | break; |
5171 | 0 | return MCK_jumpr; // "jumpr" |
5172 | 0 | case 'l': // 2 strings to match. |
5173 | 0 | if (memcmp(Name.data()+1, "oop", 3) != 0) |
5174 | 0 | break; |
5175 | 0 | switch (Name[4]) { |
5176 | 0 | default: break; |
5177 | 0 | case '0': // 1 string to match. |
5178 | 0 | return MCK_loop0; // "loop0" |
5179 | 0 | case '1': // 1 string to match. |
5180 | 0 | return MCK_loop1; // "loop1" |
5181 | 0 | } |
5182 | 0 | break; |
5183 | 0 | case 'm': // 5 strings to match. |
5184 | 0 | switch (Name[1]) { |
5185 | 0 | default: break; |
5186 | 0 | case 'e': // 3 strings to match. |
5187 | 0 | if (Name[2] != 'm') |
5188 | 0 | break; |
5189 | 0 | switch (Name[3]) { |
5190 | 0 | default: break; |
5191 | 0 | case 'b': // 1 string to match. |
5192 | 0 | if (Name[4] != 'h') |
5193 | 0 | break; |
5194 | 0 | return MCK_membh; // "membh" |
5195 | 0 | case 'u': // 2 strings to match. |
5196 | 0 | switch (Name[4]) { |
5197 | 0 | default: break; |
5198 | 0 | case 'b': // 1 string to match. |
5199 | 0 | return MCK_memub; // "memub" |
5200 | 0 | case 'h': // 1 string to match. |
5201 | 0 | return MCK_memuh; // "memuh" |
5202 | 0 | } |
5203 | 0 | break; |
5204 | 0 | } |
5205 | 0 | break; |
5206 | 0 | case 'p': // 2 strings to match. |
5207 | 0 | if (Name[2] != 'y') |
5208 | 0 | break; |
5209 | 0 | switch (Name[3]) { |
5210 | 0 | default: break; |
5211 | 0 | case 's': // 1 string to match. |
5212 | 0 | if (Name[4] != 'u') |
5213 | 0 | break; |
5214 | 0 | return MCK_mpysu; // "mpysu" |
5215 | 0 | case 'u': // 1 string to match. |
5216 | 0 | if (Name[4] != 'i') |
5217 | 0 | break; |
5218 | 0 | return MCK_mpyui; // "mpyui" |
5219 | 0 | } |
5220 | 0 | break; |
5221 | 0 | } |
5222 | 0 | break; |
5223 | 0 | case 'p': // 2 strings to match. |
5224 | 0 | switch (Name[1]) { |
5225 | 0 | default: break; |
5226 | 0 | case 'a': // 1 string to match. |
5227 | 0 | if (memcmp(Name.data()+2, "use", 3) != 0) |
5228 | 0 | break; |
5229 | 0 | return MCK_pause; // "pause" |
5230 | 0 | case 'm': // 1 string to match. |
5231 | 0 | if (memcmp(Name.data()+2, "pyw", 3) != 0) |
5232 | 0 | break; |
5233 | 0 | return MCK_pmpyw; // "pmpyw" |
5234 | 0 | } |
5235 | 0 | break; |
5236 | 0 | case 'r': // 1 string to match. |
5237 | 0 | if (memcmp(Name.data()+1, "ound", 4) != 0) |
5238 | 0 | break; |
5239 | 0 | return MCK_round; // "round" |
5240 | 0 | case 's': // 11 strings to match. |
5241 | 0 | switch (Name[1]) { |
5242 | 0 | default: break; |
5243 | 0 | case 'a': // 2 strings to match. |
5244 | 0 | if (memcmp(Name.data()+2, "tu", 2) != 0) |
5245 | 0 | break; |
5246 | 0 | switch (Name[4]) { |
5247 | 0 | default: break; |
5248 | 0 | case 'b': // 1 string to match. |
5249 | 0 | return MCK_satub; // "satub" |
5250 | 0 | case 'h': // 1 string to match. |
5251 | 0 | return MCK_satuh; // "satuh" |
5252 | 0 | } |
5253 | 0 | break; |
5254 | 0 | case 'c': // 1 string to match. |
5255 | 0 | if (memcmp(Name.data()+2, "ale", 3) != 0) |
5256 | 0 | break; |
5257 | 0 | return MCK_scale; // "scale" |
5258 | 0 | case 'f': // 6 strings to match. |
5259 | 0 | switch (Name[2]) { |
5260 | 0 | default: break; |
5261 | 0 | case 'a': // 1 string to match. |
5262 | 0 | if (memcmp(Name.data()+3, "dd", 2) != 0) |
5263 | 0 | break; |
5264 | 0 | return MCK_sfadd; // "sfadd" |
5265 | 0 | case 'c': // 1 string to match. |
5266 | 0 | if (memcmp(Name.data()+3, "mp", 2) != 0) |
5267 | 0 | break; |
5268 | 0 | return MCK_sfcmp; // "sfcmp" |
5269 | 0 | case 'm': // 3 strings to match. |
5270 | 0 | switch (Name[3]) { |
5271 | 0 | default: break; |
5272 | 0 | case 'a': // 1 string to match. |
5273 | 0 | if (Name[4] != 'x') |
5274 | 0 | break; |
5275 | 0 | return MCK_sfmax; // "sfmax" |
5276 | 0 | case 'i': // 1 string to match. |
5277 | 0 | if (Name[4] != 'n') |
5278 | 0 | break; |
5279 | 0 | return MCK_sfmin; // "sfmin" |
5280 | 0 | case 'p': // 1 string to match. |
5281 | 0 | if (Name[4] != 'y') |
5282 | 0 | break; |
5283 | 0 | return MCK_sfmpy; // "sfmpy" |
5284 | 0 | } |
5285 | 0 | break; |
5286 | 0 | case 's': // 1 string to match. |
5287 | 0 | if (memcmp(Name.data()+3, "ub", 2) != 0) |
5288 | 0 | break; |
5289 | 0 | return MCK_sfsub; // "sfsub" |
5290 | 0 | } |
5291 | 0 | break; |
5292 | 0 | case 'h': // 1 string to match. |
5293 | 0 | if (memcmp(Name.data()+2, "ift", 3) != 0) |
5294 | 0 | break; |
5295 | 0 | return MCK_shift; // "shift" |
5296 | 0 | case 't': // 1 string to match. |
5297 | 0 | if (memcmp(Name.data()+2, "art", 3) != 0) |
5298 | 0 | break; |
5299 | 0 | return MCK_start; // "start" |
5300 | 0 | } |
5301 | 0 | break; |
5302 | 0 | case 't': // 4 strings to match. |
5303 | 0 | switch (Name[1]) { |
5304 | 0 | default: break; |
5305 | 0 | case 'l': // 1 string to match. |
5306 | 0 | if (memcmp(Name.data()+2, "boc", 3) != 0) |
5307 | 0 | break; |
5308 | 0 | return MCK_tlboc; // "tlboc" |
5309 | 0 | case 'r': // 3 strings to match. |
5310 | 0 | if (Name[2] != 'a') |
5311 | 0 | break; |
5312 | 0 | switch (Name[3]) { |
5313 | 0 | default: break; |
5314 | 0 | case 'c': // 1 string to match. |
5315 | 0 | if (Name[4] != 'e') |
5316 | 0 | break; |
5317 | 0 | return MCK_trace; // "trace" |
5318 | 0 | case 'p': // 2 strings to match. |
5319 | 0 | switch (Name[4]) { |
5320 | 0 | default: break; |
5321 | 0 | case '0': // 1 string to match. |
5322 | 0 | return MCK_trap0; // "trap0" |
5323 | 0 | case '1': // 1 string to match. |
5324 | 0 | return MCK_trap1; // "trap1" |
5325 | 0 | } |
5326 | 0 | break; |
5327 | 0 | } |
5328 | 0 | break; |
5329 | 0 | } |
5330 | 0 | break; |
5331 | 0 | case 'v': // 61 strings to match. |
5332 | 0 | switch (Name[1]) { |
5333 | 0 | default: break; |
5334 | 0 | case '6': // 1 string to match. |
5335 | 0 | if (memcmp(Name.data()+2, "mpy", 3) != 0) |
5336 | 0 | break; |
5337 | 0 | return MCK_v6mpy; // "v6mpy" |
5338 | 0 | case 'a': // 14 strings to match. |
5339 | 0 | switch (Name[2]) { |
5340 | 0 | default: break; |
5341 | 0 | case 'b': // 3 strings to match. |
5342 | 0 | if (Name[3] != 's') |
5343 | 0 | break; |
5344 | 0 | switch (Name[4]) { |
5345 | 0 | default: break; |
5346 | 0 | case 'b': // 1 string to match. |
5347 | 0 | return MCK_vabsb; // "vabsb" |
5348 | 0 | case 'h': // 1 string to match. |
5349 | 0 | return MCK_vabsh; // "vabsh" |
5350 | 0 | case 'w': // 1 string to match. |
5351 | 0 | return MCK_vabsw; // "vabsw" |
5352 | 0 | } |
5353 | 0 | break; |
5354 | 0 | case 'c': // 1 string to match. |
5355 | 0 | if (memcmp(Name.data()+3, "sh", 2) != 0) |
5356 | 0 | break; |
5357 | 0 | return MCK_vacsh; // "vacsh" |
5358 | 0 | case 'd': // 3 strings to match. |
5359 | 0 | if (Name[3] != 'd') |
5360 | 0 | break; |
5361 | 0 | switch (Name[4]) { |
5362 | 0 | default: break; |
5363 | 0 | case 'b': // 1 string to match. |
5364 | 0 | return MCK_vaddb; // "vaddb" |
5365 | 0 | case 'h': // 1 string to match. |
5366 | 0 | return MCK_vaddh; // "vaddh" |
5367 | 0 | case 'w': // 1 string to match. |
5368 | 0 | return MCK_vaddw; // "vaddw" |
5369 | 0 | } |
5370 | 0 | break; |
5371 | 0 | case 's': // 4 strings to match. |
5372 | 0 | switch (Name[3]) { |
5373 | 0 | default: break; |
5374 | 0 | case 'l': // 2 strings to match. |
5375 | 0 | switch (Name[4]) { |
5376 | 0 | default: break; |
5377 | 0 | case 'h': // 1 string to match. |
5378 | 0 | return MCK_vaslh; // "vaslh" |
5379 | 0 | case 'w': // 1 string to match. |
5380 | 0 | return MCK_vaslw; // "vaslw" |
5381 | 0 | } |
5382 | 0 | break; |
5383 | 0 | case 'r': // 2 strings to match. |
5384 | 0 | switch (Name[4]) { |
5385 | 0 | default: break; |
5386 | 0 | case 'h': // 1 string to match. |
5387 | 0 | return MCK_vasrh; // "vasrh" |
5388 | 0 | case 'w': // 1 string to match. |
5389 | 0 | return MCK_vasrw; // "vasrw" |
5390 | 0 | } |
5391 | 0 | break; |
5392 | 0 | } |
5393 | 0 | break; |
5394 | 0 | case 'v': // 3 strings to match. |
5395 | 0 | if (Name[3] != 'g') |
5396 | 0 | break; |
5397 | 0 | switch (Name[4]) { |
5398 | 0 | default: break; |
5399 | 0 | case 'b': // 1 string to match. |
5400 | 0 | return MCK_vavgb; // "vavgb" |
5401 | 0 | case 'h': // 1 string to match. |
5402 | 0 | return MCK_vavgh; // "vavgh" |
5403 | 0 | case 'w': // 1 string to match. |
5404 | 0 | return MCK_vavgw; // "vavgw" |
5405 | 0 | } |
5406 | 0 | break; |
5407 | 0 | } |
5408 | 0 | break; |
5409 | 0 | case 'c': // 7 strings to match. |
5410 | 0 | switch (Name[2]) { |
5411 | 0 | default: break; |
5412 | 0 | case 'l': // 3 strings to match. |
5413 | 0 | switch (Name[3]) { |
5414 | 0 | default: break; |
5415 | 0 | case '0': // 2 strings to match. |
5416 | 0 | switch (Name[4]) { |
5417 | 0 | default: break; |
5418 | 0 | case 'h': // 1 string to match. |
5419 | 0 | return MCK_vcl0h; // "vcl0h" |
5420 | 0 | case 'w': // 1 string to match. |
5421 | 0 | return MCK_vcl0w; // "vcl0w" |
5422 | 0 | } |
5423 | 0 | break; |
5424 | 0 | case 'i': // 1 string to match. |
5425 | 0 | if (Name[4] != 'p') |
5426 | 0 | break; |
5427 | 0 | return MCK_vclip; // "vclip" |
5428 | 0 | } |
5429 | 0 | break; |
5430 | 0 | case 'm': // 3 strings to match. |
5431 | 0 | if (Name[3] != 'p') |
5432 | 0 | break; |
5433 | 0 | switch (Name[4]) { |
5434 | 0 | default: break; |
5435 | 0 | case 'b': // 1 string to match. |
5436 | 0 | return MCK_vcmpb; // "vcmpb" |
5437 | 0 | case 'h': // 1 string to match. |
5438 | 0 | return MCK_vcmph; // "vcmph" |
5439 | 0 | case 'w': // 1 string to match. |
5440 | 0 | return MCK_vcmpw; // "vcmpw" |
5441 | 0 | } |
5442 | 0 | break; |
5443 | 0 | case 'o': // 1 string to match. |
5444 | 0 | if (memcmp(Name.data()+3, "nj", 2) != 0) |
5445 | 0 | break; |
5446 | 0 | return MCK_vconj; // "vconj" |
5447 | 0 | } |
5448 | 0 | break; |
5449 | 0 | case 'd': // 3 strings to match. |
5450 | 0 | switch (Name[2]) { |
5451 | 0 | default: break; |
5452 | 0 | case 'e': // 1 string to match. |
5453 | 0 | if (memcmp(Name.data()+3, "al", 2) != 0) |
5454 | 0 | break; |
5455 | 0 | return MCK_vdeal; // "vdeal" |
5456 | 0 | case 'm': // 1 string to match. |
5457 | 0 | if (memcmp(Name.data()+3, "py", 2) != 0) |
5458 | 0 | break; |
5459 | 0 | return MCK_vdmpy; // "vdmpy" |
5460 | 0 | case 's': // 1 string to match. |
5461 | 0 | if (memcmp(Name.data()+3, "ad", 2) != 0) |
5462 | 0 | break; |
5463 | 0 | return MCK_vdsad; // "vdsad" |
5464 | 0 | } |
5465 | 0 | break; |
5466 | 0 | case 'f': // 3 strings to match. |
5467 | 0 | switch (Name[2]) { |
5468 | 0 | default: break; |
5469 | 0 | case 'm': // 2 strings to match. |
5470 | 0 | switch (Name[3]) { |
5471 | 0 | default: break; |
5472 | 0 | case 'a': // 1 string to match. |
5473 | 0 | if (Name[4] != 'x') |
5474 | 0 | break; |
5475 | 0 | return MCK_vfmax; // "vfmax" |
5476 | 0 | case 'i': // 1 string to match. |
5477 | 0 | if (Name[4] != 'n') |
5478 | 0 | break; |
5479 | 0 | return MCK_vfmin; // "vfmin" |
5480 | 0 | } |
5481 | 0 | break; |
5482 | 0 | case 'n': // 1 string to match. |
5483 | 0 | if (memcmp(Name.data()+3, "eg", 2) != 0) |
5484 | 0 | break; |
5485 | 0 | return MCK_vfneg; // "vfneg" |
5486 | 0 | } |
5487 | 0 | break; |
5488 | 0 | case 'h': // 1 string to match. |
5489 | 0 | if (memcmp(Name.data()+2, "ist", 3) != 0) |
5490 | 0 | break; |
5491 | 0 | return MCK_vhist; // "vhist" |
5492 | 0 | case 'l': // 5 strings to match. |
5493 | 0 | switch (Name[2]) { |
5494 | 0 | default: break; |
5495 | 0 | case 's': // 4 strings to match. |
5496 | 0 | switch (Name[3]) { |
5497 | 0 | default: break; |
5498 | 0 | case 'l': // 2 strings to match. |
5499 | 0 | switch (Name[4]) { |
5500 | 0 | default: break; |
5501 | 0 | case 'h': // 1 string to match. |
5502 | 0 | return MCK_vlslh; // "vlslh" |
5503 | 0 | case 'w': // 1 string to match. |
5504 | 0 | return MCK_vlslw; // "vlslw" |
5505 | 0 | } |
5506 | 0 | break; |
5507 | 0 | case 'r': // 2 strings to match. |
5508 | 0 | switch (Name[4]) { |
5509 | 0 | default: break; |
5510 | 0 | case 'h': // 1 string to match. |
5511 | 0 | return MCK_vlsrh; // "vlsrh" |
5512 | 0 | case 'w': // 1 string to match. |
5513 | 0 | return MCK_vlsrw; // "vlsrw" |
5514 | 0 | } |
5515 | 0 | break; |
5516 | 0 | } |
5517 | 0 | break; |
5518 | 0 | case 'u': // 1 string to match. |
5519 | 0 | if (memcmp(Name.data()+3, "t4", 2) != 0) |
5520 | 0 | break; |
5521 | 0 | return MCK_vlut4; // "vlut4" |
5522 | 0 | } |
5523 | 0 | break; |
5524 | 0 | case 'm': // 12 strings to match. |
5525 | 0 | switch (Name[2]) { |
5526 | 0 | default: break; |
5527 | 0 | case 'a': // 3 strings to match. |
5528 | 0 | if (Name[3] != 'x') |
5529 | 0 | break; |
5530 | 0 | switch (Name[4]) { |
5531 | 0 | default: break; |
5532 | 0 | case 'b': // 1 string to match. |
5533 | 0 | return MCK_vmaxb; // "vmaxb" |
5534 | 0 | case 'h': // 1 string to match. |
5535 | 0 | return MCK_vmaxh; // "vmaxh" |
5536 | 0 | case 'w': // 1 string to match. |
5537 | 0 | return MCK_vmaxw; // "vmaxw" |
5538 | 0 | } |
5539 | 0 | break; |
5540 | 0 | case 'e': // 1 string to match. |
5541 | 0 | if (memcmp(Name.data()+3, "mu", 2) != 0) |
5542 | 0 | break; |
5543 | 0 | return MCK_vmemu; // "vmemu" |
5544 | 0 | case 'i': // 3 strings to match. |
5545 | 0 | if (Name[3] != 'n') |
5546 | 0 | break; |
5547 | 0 | switch (Name[4]) { |
5548 | 0 | default: break; |
5549 | 0 | case 'b': // 1 string to match. |
5550 | 0 | return MCK_vminb; // "vminb" |
5551 | 0 | case 'h': // 1 string to match. |
5552 | 0 | return MCK_vminh; // "vminh" |
5553 | 0 | case 'w': // 1 string to match. |
5554 | 0 | return MCK_vminw; // "vminw" |
5555 | 0 | } |
5556 | 0 | break; |
5557 | 0 | case 'p': // 5 strings to match. |
5558 | 0 | if (Name[3] != 'y') |
5559 | 0 | break; |
5560 | 0 | switch (Name[4]) { |
5561 | 0 | default: break; |
5562 | 0 | case 'b': // 1 string to match. |
5563 | 0 | return MCK_vmpyb; // "vmpyb" |
5564 | 0 | case 'e': // 1 string to match. |
5565 | 0 | return MCK_vmpye; // "vmpye" |
5566 | 0 | case 'h': // 1 string to match. |
5567 | 0 | return MCK_vmpyh; // "vmpyh" |
5568 | 0 | case 'i': // 1 string to match. |
5569 | 0 | return MCK_vmpyi; // "vmpyi" |
5570 | 0 | case 'o': // 1 string to match. |
5571 | 0 | return MCK_vmpyo; // "vmpyo" |
5572 | 0 | } |
5573 | 0 | break; |
5574 | 0 | } |
5575 | 0 | break; |
5576 | 0 | case 'n': // 1 string to match. |
5577 | 0 | if (memcmp(Name.data()+2, "avg", 3) != 0) |
5578 | 0 | break; |
5579 | 0 | return MCK_vnavg; // "vnavg" |
5580 | 0 | case 'p': // 1 string to match. |
5581 | 0 | if (memcmp(Name.data()+2, "ack", 3) != 0) |
5582 | 0 | break; |
5583 | 0 | return MCK_vpack; // "vpack" |
5584 | 0 | case 'r': // 3 strings to match. |
5585 | 0 | switch (Name[2]) { |
5586 | 0 | default: break; |
5587 | 0 | case 'm': // 1 string to match. |
5588 | 0 | if (memcmp(Name.data()+3, "py", 2) != 0) |
5589 | 0 | break; |
5590 | 0 | return MCK_vrmpy; // "vrmpy" |
5591 | 0 | case 'o': // 1 string to match. |
5592 | 0 | if (memcmp(Name.data()+3, "tr", 2) != 0) |
5593 | 0 | break; |
5594 | 0 | return MCK_vrotr; // "vrotr" |
5595 | 0 | case 's': // 1 string to match. |
5596 | 0 | if (memcmp(Name.data()+3, "ad", 2) != 0) |
5597 | 0 | break; |
5598 | 0 | return MCK_vrsad; // "vrsad" |
5599 | 0 | } |
5600 | 0 | break; |
5601 | 0 | case 's': // 7 strings to match. |
5602 | 0 | switch (Name[2]) { |
5603 | 0 | default: break; |
5604 | 0 | case 'e': // 1 string to match. |
5605 | 0 | if (memcmp(Name.data()+3, "tq", 2) != 0) |
5606 | 0 | break; |
5607 | 0 | return MCK_vsetq; // "vsetq" |
5608 | 0 | case 'u': // 3 strings to match. |
5609 | 0 | if (Name[3] != 'b') |
5610 | 0 | break; |
5611 | 0 | switch (Name[4]) { |
5612 | 0 | default: break; |
5613 | 0 | case 'b': // 1 string to match. |
5614 | 0 | return MCK_vsubb; // "vsubb" |
5615 | 0 | case 'h': // 1 string to match. |
5616 | 0 | return MCK_vsubh; // "vsubh" |
5617 | 0 | case 'w': // 1 string to match. |
5618 | 0 | return MCK_vsubw; // "vsubw" |
5619 | 0 | } |
5620 | 0 | break; |
5621 | 0 | case 'w': // 1 string to match. |
5622 | 0 | if (memcmp(Name.data()+3, "ap", 2) != 0) |
5623 | 0 | break; |
5624 | 0 | return MCK_vswap; // "vswap" |
5625 | 0 | case 'x': // 2 strings to match. |
5626 | 0 | if (Name[3] != 't') |
5627 | 0 | break; |
5628 | 0 | switch (Name[4]) { |
5629 | 0 | default: break; |
5630 | 0 | case 'b': // 1 string to match. |
5631 | 0 | return MCK_vsxtb; // "vsxtb" |
5632 | 0 | case 'h': // 1 string to match. |
5633 | 0 | return MCK_vsxth; // "vsxth" |
5634 | 0 | } |
5635 | 0 | break; |
5636 | 0 | } |
5637 | 0 | break; |
5638 | 0 | case 't': // 1 string to match. |
5639 | 0 | if (memcmp(Name.data()+2, "mpy", 3) != 0) |
5640 | 0 | break; |
5641 | 0 | return MCK_vtmpy; // "vtmpy" |
5642 | 0 | case 'z': // 2 strings to match. |
5643 | 0 | if (memcmp(Name.data()+2, "xt", 2) != 0) |
5644 | 0 | break; |
5645 | 0 | switch (Name[4]) { |
5646 | 0 | default: break; |
5647 | 0 | case 'b': // 1 string to match. |
5648 | 0 | return MCK_vzxtb; // "vzxtb" |
5649 | 0 | case 'h': // 1 string to match. |
5650 | 0 | return MCK_vzxth; // "vzxth" |
5651 | 0 | } |
5652 | 0 | break; |
5653 | 0 | } |
5654 | 0 | break; |
5655 | 0 | } |
5656 | 0 | break; |
5657 | 0 | case 6: // 103 strings to match. |
5658 | 0 | switch (Name[0]) { |
5659 | 0 | default: break; |
5660 | 0 | case 'D': // 1 string to match. |
5661 | 0 | if (memcmp(Name.data()+1, "UPLEX", 5) != 0) |
5662 | 0 | break; |
5663 | 0 | return MCK_DUPLEX; // "DUPLEX" |
5664 | 0 | case 'a': // 2 strings to match. |
5665 | 0 | switch (Name[1]) { |
5666 | 0 | default: break; |
5667 | 0 | case 'd': // 1 string to match. |
5668 | 0 | if (memcmp(Name.data()+2, "dasl", 4) != 0) |
5669 | 0 | break; |
5670 | 0 | return MCK_addasl; // "addasl" |
5671 | 0 | case 's': // 1 string to match. |
5672 | 0 | if (memcmp(Name.data()+2, "rrnd", 4) != 0) |
5673 | 0 | break; |
5674 | 0 | return MCK_asrrnd; // "asrrnd" |
5675 | 0 | } |
5676 | 0 | break; |
5677 | 0 | case 'c': // 6 strings to match. |
5678 | 0 | switch (Name[1]) { |
5679 | 0 | default: break; |
5680 | 0 | case 'a': // 1 string to match. |
5681 | 0 | if (memcmp(Name.data()+2, "llrh", 4) != 0) |
5682 | 0 | break; |
5683 | 0 | return MCK_callrh; // "callrh" |
5684 | 0 | case 'l': // 1 string to match. |
5685 | 0 | if (memcmp(Name.data()+2, "rbit", 4) != 0) |
5686 | 0 | break; |
5687 | 0 | return MCK_clrbit; // "clrbit" |
5688 | 0 | case 'm': // 2 strings to match. |
5689 | 0 | if (memcmp(Name.data()+2, "py", 2) != 0) |
5690 | 0 | break; |
5691 | 0 | switch (Name[4]) { |
5692 | 0 | default: break; |
5693 | 0 | case 'i': // 1 string to match. |
5694 | 0 | if (Name[5] != 'w') |
5695 | 0 | break; |
5696 | 0 | return MCK_cmpyiw; // "cmpyiw" |
5697 | 0 | case 'r': // 1 string to match. |
5698 | 0 | if (Name[5] != 'w') |
5699 | 0 | break; |
5700 | 0 | return MCK_cmpyrw; // "cmpyrw" |
5701 | 0 | } |
5702 | 0 | break; |
5703 | 0 | case 'r': // 2 strings to match. |
5704 | 0 | switch (Name[2]) { |
5705 | 0 | default: break; |
5706 | 0 | case 'o': // 1 string to match. |
5707 | 0 | if (memcmp(Name.data()+3, "und", 3) != 0) |
5708 | 0 | break; |
5709 | 0 | return MCK_cround; // "cround" |
5710 | 0 | case 's': // 1 string to match. |
5711 | 0 | if (memcmp(Name.data()+3, "wap", 3) != 0) |
5712 | 0 | break; |
5713 | 0 | return MCK_crswap; // "crswap" |
5714 | 0 | } |
5715 | 0 | break; |
5716 | 0 | } |
5717 | 0 | break; |
5718 | 0 | case 'd': // 9 strings to match. |
5719 | 0 | switch (Name[1]) { |
5720 | 0 | default: break; |
5721 | 0 | case 'c': // 4 strings to match. |
5722 | 0 | switch (Name[2]) { |
5723 | 0 | default: break; |
5724 | 0 | case 'i': // 1 string to match. |
5725 | 0 | if (memcmp(Name.data()+3, "nva", 3) != 0) |
5726 | 0 | break; |
5727 | 0 | return MCK_dcinva; // "dcinva" |
5728 | 0 | case 'k': // 1 string to match. |
5729 | 0 | if (memcmp(Name.data()+3, "ill", 3) != 0) |
5730 | 0 | break; |
5731 | 0 | return MCK_dckill; // "dckill" |
5732 | 0 | case 't': // 2 strings to match. |
5733 | 0 | if (memcmp(Name.data()+3, "ag", 2) != 0) |
5734 | 0 | break; |
5735 | 0 | switch (Name[5]) { |
5736 | 0 | default: break; |
5737 | 0 | case 'r': // 1 string to match. |
5738 | 0 | return MCK_dctagr; // "dctagr" |
5739 | 0 | case 'w': // 1 string to match. |
5740 | 0 | return MCK_dctagw; // "dctagw" |
5741 | 0 | } |
5742 | 0 | break; |
5743 | 0 | } |
5744 | 0 | break; |
5745 | 0 | case 'e': // 1 string to match. |
5746 | 0 | if (memcmp(Name.data()+2, "cbin", 4) != 0) |
5747 | 0 | break; |
5748 | 0 | return MCK_decbin; // "decbin" |
5749 | 0 | case 'f': // 1 string to match. |
5750 | 0 | if (memcmp(Name.data()+2, "make", 4) != 0) |
5751 | 0 | break; |
5752 | 0 | return MCK_dfmake; // "dfmake" |
5753 | 0 | case 'm': // 3 strings to match. |
5754 | 0 | switch (Name[2]) { |
5755 | 0 | default: break; |
5756 | 0 | case 'l': // 1 string to match. |
5757 | 0 | if (memcmp(Name.data()+3, "ink", 3) != 0) |
5758 | 0 | break; |
5759 | 0 | return MCK_dmlink; // "dmlink" |
5760 | 0 | case 'p': // 1 string to match. |
5761 | 0 | if (memcmp(Name.data()+3, "oll", 3) != 0) |
5762 | 0 | break; |
5763 | 0 | return MCK_dmpoll; // "dmpoll" |
5764 | 0 | case 'w': // 1 string to match. |
5765 | 0 | if (memcmp(Name.data()+3, "ait", 3) != 0) |
5766 | 0 | break; |
5767 | 0 | return MCK_dmwait; // "dmwait" |
5768 | 0 | } |
5769 | 0 | break; |
5770 | 0 | } |
5771 | 0 | break; |
5772 | 0 | case 'h': // 1 string to match. |
5773 | 0 | if (memcmp(Name.data()+1, "intjr", 5) != 0) |
5774 | 0 | break; |
5775 | 0 | return MCK_hintjr; // "hintjr" |
5776 | 0 | case 'i': // 7 strings to match. |
5777 | 0 | switch (Name[1]) { |
5778 | 0 | default: break; |
5779 | 0 | case 'c': // 5 strings to match. |
5780 | 0 | switch (Name[2]) { |
5781 | 0 | default: break; |
5782 | 0 | case 'i': // 1 string to match. |
5783 | 0 | if (memcmp(Name.data()+3, "nva", 3) != 0) |
5784 | 0 | break; |
5785 | 0 | return MCK_icinva; // "icinva" |
5786 | 0 | case 'k': // 1 string to match. |
5787 | 0 | if (memcmp(Name.data()+3, "ill", 3) != 0) |
5788 | 0 | break; |
5789 | 0 | return MCK_ickill; // "ickill" |
5790 | 0 | case 'o': // 1 string to match. |
5791 | 0 | if (memcmp(Name.data()+3, "nst", 3) != 0) |
5792 | 0 | break; |
5793 | 0 | return MCK_iconst; // "iconst" |
5794 | 0 | case 't': // 2 strings to match. |
5795 | 0 | if (memcmp(Name.data()+3, "ag", 2) != 0) |
5796 | 0 | break; |
5797 | 0 | switch (Name[5]) { |
5798 | 0 | default: break; |
5799 | 0 | case 'r': // 1 string to match. |
5800 | 0 | return MCK_ictagr; // "ictagr" |
5801 | 0 | case 'w': // 1 string to match. |
5802 | 0 | return MCK_ictagw; // "ictagw" |
5803 | 0 | } |
5804 | 0 | break; |
5805 | 0 | } |
5806 | 0 | break; |
5807 | 0 | case 'm': // 1 string to match. |
5808 | 0 | if (memcmp(Name.data()+2, "mext", 4) != 0) |
5809 | 0 | break; |
5810 | 0 | return MCK_immext; // "immext" |
5811 | 0 | case 'n': // 1 string to match. |
5812 | 0 | if (memcmp(Name.data()+2, "sert", 4) != 0) |
5813 | 0 | break; |
5814 | 0 | return MCK_insert; // "insert" |
5815 | 0 | } |
5816 | 0 | break; |
5817 | 0 | case 'j': // 1 string to match. |
5818 | 0 | if (memcmp(Name.data()+1, "umprh", 5) != 0) |
5819 | 0 | break; |
5820 | 0 | return MCK_jumprh; // "jumprh" |
5821 | 0 | case 'k': // 1 string to match. |
5822 | 0 | if (memcmp(Name.data()+1, "0lock", 5) != 0) |
5823 | 0 | break; |
5824 | 0 | return MCK_k0lock; // "k0lock" |
5825 | 0 | case 'l': // 3 strings to match. |
5826 | 0 | if (Name[1] != '2') |
5827 | 0 | break; |
5828 | 0 | switch (Name[2]) { |
5829 | 0 | default: break; |
5830 | 0 | case 'k': // 1 string to match. |
5831 | 0 | if (memcmp(Name.data()+3, "ill", 3) != 0) |
5832 | 0 | break; |
5833 | 0 | return MCK_l2kill; // "l2kill" |
5834 | 0 | case 't': // 2 strings to match. |
5835 | 0 | if (memcmp(Name.data()+3, "ag", 2) != 0) |
5836 | 0 | break; |
5837 | 0 | switch (Name[5]) { |
5838 | 0 | default: break; |
5839 | 0 | case 'r': // 1 string to match. |
5840 | 0 | return MCK_l2tagr; // "l2tagr" |
5841 | 0 | case 'w': // 1 string to match. |
5842 | 0 | return MCK_l2tagw; // "l2tagw" |
5843 | 0 | } |
5844 | 0 | break; |
5845 | 0 | } |
5846 | 0 | break; |
5847 | 0 | case 'm': // 2 strings to match. |
5848 | 0 | if (memcmp(Name.data()+1, "em", 2) != 0) |
5849 | 0 | break; |
5850 | 0 | switch (Name[3]) { |
5851 | 0 | default: break; |
5852 | 0 | case 'c': // 1 string to match. |
5853 | 0 | if (memcmp(Name.data()+4, "py", 2) != 0) |
5854 | 0 | break; |
5855 | 0 | return MCK_memcpy; // "memcpy" |
5856 | 0 | case 'u': // 1 string to match. |
5857 | 0 | if (memcmp(Name.data()+4, "bh", 2) != 0) |
5858 | 0 | break; |
5859 | 0 | return MCK_memubh; // "memubh" |
5860 | 0 | } |
5861 | 0 | break; |
5862 | 0 | case 'p': // 2 strings to match. |
5863 | 0 | if (Name[1] != 'a') |
5864 | 0 | break; |
5865 | 0 | switch (Name[2]) { |
5866 | 0 | default: break; |
5867 | 0 | case 'c': // 1 string to match. |
5868 | 0 | if (memcmp(Name.data()+3, "khl", 3) != 0) |
5869 | 0 | break; |
5870 | 0 | return MCK_packhl; // "packhl" |
5871 | 0 | case 'r': // 1 string to match. |
5872 | 0 | if (memcmp(Name.data()+3, "ity", 3) != 0) |
5873 | 0 | break; |
5874 | 0 | return MCK_parity; // "parity" |
5875 | 0 | } |
5876 | 0 | break; |
5877 | 0 | case 'r': // 1 string to match. |
5878 | 0 | if (memcmp(Name.data()+1, "esume", 5) != 0) |
5879 | 0 | break; |
5880 | 0 | return MCK_resume; // "resume" |
5881 | 0 | case 's': // 3 strings to match. |
5882 | 0 | switch (Name[1]) { |
5883 | 0 | default: break; |
5884 | 0 | case 'e': // 1 string to match. |
5885 | 0 | if (memcmp(Name.data()+2, "tbit", 4) != 0) |
5886 | 0 | break; |
5887 | 0 | return MCK_setbit; // "setbit" |
5888 | 0 | case 'f': // 1 string to match. |
5889 | 0 | if (memcmp(Name.data()+2, "make", 4) != 0) |
5890 | 0 | break; |
5891 | 0 | return MCK_sfmake; // "sfmake" |
5892 | 0 | case 'y': // 1 string to match. |
5893 | 0 | if (memcmp(Name.data()+2, "ncht", 4) != 0) |
5894 | 0 | break; |
5895 | 0 | return MCK_syncht; // "syncht" |
5896 | 0 | } |
5897 | 0 | break; |
5898 | 0 | case 't': // 1 string to match. |
5899 | 0 | if (memcmp(Name.data()+1, "stbit", 5) != 0) |
5900 | 0 | break; |
5901 | 0 | return MCK_tstbit; // "tstbit" |
5902 | 0 | case 'v': // 63 strings to match. |
5903 | 0 | switch (Name[1]) { |
5904 | 0 | default: break; |
5905 | 0 | case '1': // 1 string to match. |
5906 | 0 | if (memcmp(Name.data()+2, "0mpy", 4) != 0) |
5907 | 0 | break; |
5908 | 0 | return MCK_v10mpy; // "v10mpy" |
5909 | 0 | case 'a': // 7 strings to match. |
5910 | 0 | switch (Name[2]) { |
5911 | 0 | default: break; |
5912 | 0 | case 'd': // 3 strings to match. |
5913 | 0 | if (memcmp(Name.data()+3, "du", 2) != 0) |
5914 | 0 | break; |
5915 | 0 | switch (Name[5]) { |
5916 | 0 | default: break; |
5917 | 0 | case 'b': // 1 string to match. |
5918 | 0 | return MCK_vaddub; // "vaddub" |
5919 | 0 | case 'h': // 1 string to match. |
5920 | 0 | return MCK_vadduh; // "vadduh" |
5921 | 0 | case 'w': // 1 string to match. |
5922 | 0 | return MCK_vadduw; // "vadduw" |
5923 | 0 | } |
5924 | 0 | break; |
5925 | 0 | case 'l': // 1 string to match. |
5926 | 0 | if (memcmp(Name.data()+3, "ign", 3) != 0) |
5927 | 0 | break; |
5928 | 0 | return MCK_valign; // "valign" |
5929 | 0 | case 'v': // 3 strings to match. |
5930 | 0 | if (memcmp(Name.data()+3, "gu", 2) != 0) |
5931 | 0 | break; |
5932 | 0 | switch (Name[5]) { |
5933 | 0 | default: break; |
5934 | 0 | case 'b': // 1 string to match. |
5935 | 0 | return MCK_vavgub; // "vavgub" |
5936 | 0 | case 'h': // 1 string to match. |
5937 | 0 | return MCK_vavguh; // "vavguh" |
5938 | 0 | case 'w': // 1 string to match. |
5939 | 0 | return MCK_vavguw; // "vavguw" |
5940 | 0 | } |
5941 | 0 | break; |
5942 | 0 | } |
5943 | 0 | break; |
5944 | 0 | case 'c': // 3 strings to match. |
5945 | 0 | switch (Name[2]) { |
5946 | 0 | default: break; |
5947 | 0 | case 'm': // 2 strings to match. |
5948 | 0 | if (memcmp(Name.data()+3, "py", 2) != 0) |
5949 | 0 | break; |
5950 | 0 | switch (Name[5]) { |
5951 | 0 | default: break; |
5952 | 0 | case 'i': // 1 string to match. |
5953 | 0 | return MCK_vcmpyi; // "vcmpyi" |
5954 | 0 | case 'r': // 1 string to match. |
5955 | 0 | return MCK_vcmpyr; // "vcmpyr" |
5956 | 0 | } |
5957 | 0 | break; |
5958 | 0 | case 'n': // 1 string to match. |
5959 | 0 | if (memcmp(Name.data()+3, "egh", 3) != 0) |
5960 | 0 | break; |
5961 | 0 | return MCK_vcnegh; // "vcnegh" |
5962 | 0 | } |
5963 | 0 | break; |
5964 | 0 | case 'd': // 6 strings to match. |
5965 | 0 | switch (Name[2]) { |
5966 | 0 | default: break; |
5967 | 0 | case 'e': // 4 strings to match. |
5968 | 0 | switch (Name[3]) { |
5969 | 0 | default: break; |
5970 | 0 | case 'a': // 3 strings to match. |
5971 | 0 | if (Name[4] != 'l') |
5972 | 0 | break; |
5973 | 0 | switch (Name[5]) { |
5974 | 0 | default: break; |
5975 | 0 | case 'b': // 1 string to match. |
5976 | 0 | return MCK_vdealb; // "vdealb" |
5977 | 0 | case 'e': // 1 string to match. |
5978 | 0 | return MCK_vdeale; // "vdeale" |
5979 | 0 | case 'h': // 1 string to match. |
5980 | 0 | return MCK_vdealh; // "vdealh" |
5981 | 0 | } |
5982 | 0 | break; |
5983 | 0 | case 'l': // 1 string to match. |
5984 | 0 | if (memcmp(Name.data()+4, "ta", 2) != 0) |
5985 | 0 | break; |
5986 | 0 | return MCK_vdelta; // "vdelta" |
5987 | 0 | } |
5988 | 0 | break; |
5989 | 0 | case 'm': // 2 strings to match. |
5990 | 0 | if (memcmp(Name.data()+3, "py", 2) != 0) |
5991 | 0 | break; |
5992 | 0 | switch (Name[5]) { |
5993 | 0 | default: break; |
5994 | 0 | case 'h': // 1 string to match. |
5995 | 0 | return MCK_vdmpyh; // "vdmpyh" |
5996 | 0 | case 'w': // 1 string to match. |
5997 | 0 | return MCK_vdmpyw; // "vdmpyw" |
5998 | 0 | } |
5999 | 0 | break; |
6000 | 0 | } |
6001 | 0 | break; |
6002 | 0 | case 'l': // 2 strings to match. |
6003 | 0 | if (memcmp(Name.data()+2, "ut", 2) != 0) |
6004 | 0 | break; |
6005 | 0 | switch (Name[4]) { |
6006 | 0 | default: break; |
6007 | 0 | case '1': // 1 string to match. |
6008 | 0 | if (Name[5] != '6') |
6009 | 0 | break; |
6010 | 0 | return MCK_vlut16; // "vlut16" |
6011 | 0 | case '3': // 1 string to match. |
6012 | 0 | if (Name[5] != '2') |
6013 | 0 | break; |
6014 | 0 | return MCK_vlut32; // "vlut32" |
6015 | 0 | } |
6016 | 0 | break; |
6017 | 0 | case 'm': // 14 strings to match. |
6018 | 0 | switch (Name[2]) { |
6019 | 0 | default: break; |
6020 | 0 | case 'a': // 3 strings to match. |
6021 | 0 | if (memcmp(Name.data()+3, "xu", 2) != 0) |
6022 | 0 | break; |
6023 | 0 | switch (Name[5]) { |
6024 | 0 | default: break; |
6025 | 0 | case 'b': // 1 string to match. |
6026 | 0 | return MCK_vmaxub; // "vmaxub" |
6027 | 0 | case 'h': // 1 string to match. |
6028 | 0 | return MCK_vmaxuh; // "vmaxuh" |
6029 | 0 | case 'w': // 1 string to match. |
6030 | 0 | return MCK_vmaxuw; // "vmaxuw" |
6031 | 0 | } |
6032 | 0 | break; |
6033 | 0 | case 'i': // 3 strings to match. |
6034 | 0 | if (memcmp(Name.data()+3, "nu", 2) != 0) |
6035 | 0 | break; |
6036 | 0 | switch (Name[5]) { |
6037 | 0 | default: break; |
6038 | 0 | case 'b': // 1 string to match. |
6039 | 0 | return MCK_vminub; // "vminub" |
6040 | 0 | case 'h': // 1 string to match. |
6041 | 0 | return MCK_vminuh; // "vminuh" |
6042 | 0 | case 'w': // 1 string to match. |
6043 | 0 | return MCK_vminuw; // "vminuw" |
6044 | 0 | } |
6045 | 0 | break; |
6046 | 0 | case 'p': // 8 strings to match. |
6047 | 0 | switch (Name[3]) { |
6048 | 0 | default: break; |
6049 | 0 | case 'a': // 1 string to match. |
6050 | 0 | if (memcmp(Name.data()+4, "hb", 2) != 0) |
6051 | 0 | break; |
6052 | 0 | return MCK_vmpahb; // "vmpahb" |
6053 | 0 | case 'y': // 7 strings to match. |
6054 | 0 | switch (Name[4]) { |
6055 | 0 | default: break; |
6056 | 0 | case 'b': // 1 string to match. |
6057 | 0 | if (Name[5] != 'u') |
6058 | 0 | break; |
6059 | 0 | return MCK_vmpybu; // "vmpybu" |
6060 | 0 | case 'e': // 1 string to match. |
6061 | 0 | if (Name[5] != 'h') |
6062 | 0 | break; |
6063 | 0 | return MCK_vmpyeh; // "vmpyeh" |
6064 | 0 | case 'i': // 3 strings to match. |
6065 | 0 | switch (Name[5]) { |
6066 | 0 | default: break; |
6067 | 0 | case 'e': // 1 string to match. |
6068 | 0 | return MCK_vmpyie; // "vmpyie" |
6069 | 0 | case 'h': // 1 string to match. |
6070 | 0 | return MCK_vmpyih; // "vmpyih" |
6071 | 0 | case 'o': // 1 string to match. |
6072 | 0 | return MCK_vmpyio; // "vmpyio" |
6073 | 0 | } |
6074 | 0 | break; |
6075 | 0 | case 'u': // 2 strings to match. |
6076 | 0 | switch (Name[5]) { |
6077 | 0 | default: break; |
6078 | 0 | case 'b': // 1 string to match. |
6079 | 0 | return MCK_vmpyub; // "vmpyub" |
6080 | 0 | case 'h': // 1 string to match. |
6081 | 0 | return MCK_vmpyuh; // "vmpyuh" |
6082 | 0 | } |
6083 | 0 | break; |
6084 | 0 | } |
6085 | 0 | break; |
6086 | 0 | } |
6087 | 0 | break; |
6088 | 0 | } |
6089 | 0 | break; |
6090 | 0 | case 'n': // 3 strings to match. |
6091 | 0 | if (memcmp(Name.data()+2, "avg", 3) != 0) |
6092 | 0 | break; |
6093 | 0 | switch (Name[5]) { |
6094 | 0 | default: break; |
6095 | 0 | case 'b': // 1 string to match. |
6096 | 0 | return MCK_vnavgb; // "vnavgb" |
6097 | 0 | case 'h': // 1 string to match. |
6098 | 0 | return MCK_vnavgh; // "vnavgh" |
6099 | 0 | case 'w': // 1 string to match. |
6100 | 0 | return MCK_vnavgw; // "vnavgw" |
6101 | 0 | } |
6102 | 0 | break; |
6103 | 0 | case 'p': // 3 strings to match. |
6104 | 0 | switch (Name[2]) { |
6105 | 0 | default: break; |
6106 | 0 | case 'a': // 2 strings to match. |
6107 | 0 | if (memcmp(Name.data()+3, "ck", 2) != 0) |
6108 | 0 | break; |
6109 | 0 | switch (Name[5]) { |
6110 | 0 | default: break; |
6111 | 0 | case 'e': // 1 string to match. |
6112 | 0 | return MCK_vpacke; // "vpacke" |
6113 | 0 | case 'o': // 1 string to match. |
6114 | 0 | return MCK_vpacko; // "vpacko" |
6115 | 0 | } |
6116 | 0 | break; |
6117 | 0 | case 'm': // 1 string to match. |
6118 | 0 | if (memcmp(Name.data()+3, "pyh", 3) != 0) |
6119 | 0 | break; |
6120 | 0 | return MCK_vpmpyh; // "vpmpyh" |
6121 | 0 | } |
6122 | 0 | break; |
6123 | 0 | case 'r': // 10 strings to match. |
6124 | 0 | switch (Name[2]) { |
6125 | 0 | default: break; |
6126 | 0 | case 'a': // 1 string to match. |
6127 | 0 | if (memcmp(Name.data()+3, "ddh", 3) != 0) |
6128 | 0 | break; |
6129 | 0 | return MCK_vraddh; // "vraddh" |
6130 | 0 | case 'm': // 7 strings to match. |
6131 | 0 | switch (Name[3]) { |
6132 | 0 | default: break; |
6133 | 0 | case 'a': // 2 strings to match. |
6134 | 0 | if (Name[4] != 'x') |
6135 | 0 | break; |
6136 | 0 | switch (Name[5]) { |
6137 | 0 | default: break; |
6138 | 0 | case 'h': // 1 string to match. |
6139 | 0 | return MCK_vrmaxh; // "vrmaxh" |
6140 | 0 | case 'w': // 1 string to match. |
6141 | 0 | return MCK_vrmaxw; // "vrmaxw" |
6142 | 0 | } |
6143 | 0 | break; |
6144 | 0 | case 'i': // 2 strings to match. |
6145 | 0 | if (Name[4] != 'n') |
6146 | 0 | break; |
6147 | 0 | switch (Name[5]) { |
6148 | 0 | default: break; |
6149 | 0 | case 'h': // 1 string to match. |
6150 | 0 | return MCK_vrminh; // "vrminh" |
6151 | 0 | case 'w': // 1 string to match. |
6152 | 0 | return MCK_vrminw; // "vrminw" |
6153 | 0 | } |
6154 | 0 | break; |
6155 | 0 | case 'p': // 3 strings to match. |
6156 | 0 | if (Name[4] != 'y') |
6157 | 0 | break; |
6158 | 0 | switch (Name[5]) { |
6159 | 0 | default: break; |
6160 | 0 | case 'b': // 1 string to match. |
6161 | 0 | return MCK_vrmpyb; // "vrmpyb" |
6162 | 0 | case 'h': // 1 string to match. |
6163 | 0 | return MCK_vrmpyh; // "vrmpyh" |
6164 | 0 | case 'z': // 1 string to match. |
6165 | 0 | return MCK_vrmpyz; // "vrmpyz" |
6166 | 0 | } |
6167 | 0 | break; |
6168 | 0 | } |
6169 | 0 | break; |
6170 | 0 | case 'n': // 1 string to match. |
6171 | 0 | if (memcmp(Name.data()+3, "dwh", 3) != 0) |
6172 | 0 | break; |
6173 | 0 | return MCK_vrndwh; // "vrndwh" |
6174 | 0 | case 'o': // 1 string to match. |
6175 | 0 | if (memcmp(Name.data()+3, "und", 3) != 0) |
6176 | 0 | break; |
6177 | 0 | return MCK_vround; // "vround" |
6178 | 0 | } |
6179 | 0 | break; |
6180 | 0 | case 's': // 11 strings to match. |
6181 | 0 | switch (Name[2]) { |
6182 | 0 | default: break; |
6183 | 0 | case 'a': // 3 strings to match. |
6184 | 0 | if (Name[3] != 't') |
6185 | 0 | break; |
6186 | 0 | switch (Name[4]) { |
6187 | 0 | default: break; |
6188 | 0 | case 'd': // 1 string to match. |
6189 | 0 | if (Name[5] != 'w') |
6190 | 0 | break; |
6191 | 0 | return MCK_vsatdw; // "vsatdw" |
6192 | 0 | case 'h': // 1 string to match. |
6193 | 0 | if (Name[5] != 'b') |
6194 | 0 | break; |
6195 | 0 | return MCK_vsathb; // "vsathb" |
6196 | 0 | case 'w': // 1 string to match. |
6197 | 0 | if (Name[5] != 'h') |
6198 | 0 | break; |
6199 | 0 | return MCK_vsatwh; // "vsatwh" |
6200 | 0 | } |
6201 | 0 | break; |
6202 | 0 | case 'e': // 1 string to match. |
6203 | 0 | if (memcmp(Name.data()+3, "tq2", 3) != 0) |
6204 | 0 | break; |
6205 | 0 | return MCK_vsetq2; // "vsetq2" |
6206 | 0 | case 'h': // 1 string to match. |
6207 | 0 | if (memcmp(Name.data()+3, "uff", 3) != 0) |
6208 | 0 | break; |
6209 | 0 | return MCK_vshuff; // "vshuff" |
6210 | 0 | case 'p': // 1 string to match. |
6211 | 0 | if (memcmp(Name.data()+3, "lat", 3) != 0) |
6212 | 0 | break; |
6213 | 0 | return MCK_vsplat; // "vsplat" |
6214 | 0 | case 'u': // 3 strings to match. |
6215 | 0 | if (memcmp(Name.data()+3, "bu", 2) != 0) |
6216 | 0 | break; |
6217 | 0 | switch (Name[5]) { |
6218 | 0 | default: break; |
6219 | 0 | case 'b': // 1 string to match. |
6220 | 0 | return MCK_vsubub; // "vsubub" |
6221 | 0 | case 'h': // 1 string to match. |
6222 | 0 | return MCK_vsubuh; // "vsubuh" |
6223 | 0 | case 'w': // 1 string to match. |
6224 | 0 | return MCK_vsubuw; // "vsubuw" |
6225 | 0 | } |
6226 | 0 | break; |
6227 | 0 | case 'x': // 2 strings to match. |
6228 | 0 | if (Name[3] != 't') |
6229 | 0 | break; |
6230 | 0 | switch (Name[4]) { |
6231 | 0 | default: break; |
6232 | 0 | case 'b': // 1 string to match. |
6233 | 0 | if (Name[5] != 'h') |
6234 | 0 | break; |
6235 | 0 | return MCK_vsxtbh; // "vsxtbh" |
6236 | 0 | case 'h': // 1 string to match. |
6237 | 0 | if (Name[5] != 'w') |
6238 | 0 | break; |
6239 | 0 | return MCK_vsxthw; // "vsxthw" |
6240 | 0 | } |
6241 | 0 | break; |
6242 | 0 | } |
6243 | 0 | break; |
6244 | 0 | case 't': // 1 string to match. |
6245 | 0 | if (memcmp(Name.data()+2, "mpyb", 4) != 0) |
6246 | 0 | break; |
6247 | 0 | return MCK_vtmpyb; // "vtmpyb" |
6248 | 0 | case 'z': // 2 strings to match. |
6249 | 0 | if (memcmp(Name.data()+2, "xt", 2) != 0) |
6250 | 0 | break; |
6251 | 0 | switch (Name[4]) { |
6252 | 0 | default: break; |
6253 | 0 | case 'b': // 1 string to match. |
6254 | 0 | if (Name[5] != 'h') |
6255 | 0 | break; |
6256 | 0 | return MCK_vzxtbh; // "vzxtbh" |
6257 | 0 | case 'h': // 1 string to match. |
6258 | 0 | if (Name[5] != 'w') |
6259 | 0 | break; |
6260 | 0 | return MCK_vzxthw; // "vzxthw" |
6261 | 0 | } |
6262 | 0 | break; |
6263 | 0 | } |
6264 | 0 | break; |
6265 | 0 | } |
6266 | 0 | break; |
6267 | 0 | case 7: // 92 strings to match. |
6268 | 0 | switch (Name[0]) { |
6269 | 0 | default: break; |
6270 | 0 | case 'C': // 2 strings to match. |
6271 | 0 | if (memcmp(Name.data()+1, "ONST", 4) != 0) |
6272 | 0 | break; |
6273 | 0 | switch (Name[5]) { |
6274 | 0 | default: break; |
6275 | 0 | case '3': // 1 string to match. |
6276 | 0 | if (Name[6] != '2') |
6277 | 0 | break; |
6278 | 0 | return MCK_CONST32; // "CONST32" |
6279 | 0 | case '6': // 1 string to match. |
6280 | 0 | if (Name[6] != '4') |
6281 | 0 | break; |
6282 | 0 | return MCK_CONST64; // "CONST64" |
6283 | 0 | } |
6284 | 0 | break; |
6285 | 0 | case 'b': // 3 strings to match. |
6286 | 0 | switch (Name[1]) { |
6287 | 0 | default: break; |
6288 | 0 | case 'a': // 1 string to match. |
6289 | 0 | if (memcmp(Name.data()+2, "rrier", 5) != 0) |
6290 | 0 | break; |
6291 | 0 | return MCK_barrier; // "barrier" |
6292 | 0 | case 'i': // 2 strings to match. |
6293 | 0 | if (memcmp(Name.data()+2, "ts", 2) != 0) |
6294 | 0 | break; |
6295 | 0 | switch (Name[4]) { |
6296 | 0 | default: break; |
6297 | 0 | case 'c': // 1 string to match. |
6298 | 0 | if (memcmp(Name.data()+5, "lr", 2) != 0) |
6299 | 0 | break; |
6300 | 0 | return MCK_bitsclr; // "bitsclr" |
6301 | 0 | case 's': // 1 string to match. |
6302 | 0 | if (memcmp(Name.data()+5, "et", 2) != 0) |
6303 | 0 | break; |
6304 | 0 | return MCK_bitsset; // "bitsset" |
6305 | 0 | } |
6306 | 0 | break; |
6307 | 0 | } |
6308 | 0 | break; |
6309 | 0 | case 'c': // 3 strings to match. |
6310 | 0 | switch (Name[1]) { |
6311 | 0 | default: break; |
6312 | 0 | case 'm': // 2 strings to match. |
6313 | 0 | if (memcmp(Name.data()+2, "py", 2) != 0) |
6314 | 0 | break; |
6315 | 0 | switch (Name[4]) { |
6316 | 0 | default: break; |
6317 | 0 | case 'i': // 1 string to match. |
6318 | 0 | if (memcmp(Name.data()+5, "wh", 2) != 0) |
6319 | 0 | break; |
6320 | 0 | return MCK_cmpyiwh; // "cmpyiwh" |
6321 | 0 | case 'r': // 1 string to match. |
6322 | 0 | if (memcmp(Name.data()+5, "wh", 2) != 0) |
6323 | 0 | break; |
6324 | 0 | return MCK_cmpyrwh; // "cmpyrwh" |
6325 | 0 | } |
6326 | 0 | break; |
6327 | 0 | case 'o': // 1 string to match. |
6328 | 0 | if (memcmp(Name.data()+2, "mbine", 5) != 0) |
6329 | 0 | break; |
6330 | 0 | return MCK_combine; // "combine" |
6331 | 0 | } |
6332 | 0 | break; |
6333 | 0 | case 'd': // 8 strings to match. |
6334 | 0 | switch (Name[1]) { |
6335 | 0 | default: break; |
6336 | 0 | case 'c': // 2 strings to match. |
6337 | 0 | switch (Name[2]) { |
6338 | 0 | default: break; |
6339 | 0 | case 'f': // 1 string to match. |
6340 | 0 | if (memcmp(Name.data()+3, "etch", 4) != 0) |
6341 | 0 | break; |
6342 | 0 | return MCK_dcfetch; // "dcfetch" |
6343 | 0 | case 'z': // 1 string to match. |
6344 | 0 | if (memcmp(Name.data()+3, "eroa", 4) != 0) |
6345 | 0 | break; |
6346 | 0 | return MCK_dczeroa; // "dczeroa" |
6347 | 0 | } |
6348 | 0 | break; |
6349 | 0 | case 'f': // 4 strings to match. |
6350 | 0 | switch (Name[2]) { |
6351 | 0 | default: break; |
6352 | 0 | case 'c': // 1 string to match. |
6353 | 0 | if (memcmp(Name.data()+3, "lass", 4) != 0) |
6354 | 0 | break; |
6355 | 0 | return MCK_dfclass; // "dfclass" |
6356 | 0 | case 'm': // 3 strings to match. |
6357 | 0 | if (memcmp(Name.data()+3, "py", 2) != 0) |
6358 | 0 | break; |
6359 | 0 | switch (Name[5]) { |
6360 | 0 | default: break; |
6361 | 0 | case 'h': // 1 string to match. |
6362 | 0 | if (Name[6] != 'h') |
6363 | 0 | break; |
6364 | 0 | return MCK_dfmpyhh; // "dfmpyhh" |
6365 | 0 | case 'l': // 2 strings to match. |
6366 | 0 | switch (Name[6]) { |
6367 | 0 | default: break; |
6368 | 0 | case 'h': // 1 string to match. |
6369 | 0 | return MCK_dfmpylh; // "dfmpylh" |
6370 | 0 | case 'l': // 1 string to match. |
6371 | 0 | return MCK_dfmpyll; // "dfmpyll" |
6372 | 0 | } |
6373 | 0 | break; |
6374 | 0 | } |
6375 | 0 | break; |
6376 | 0 | } |
6377 | 0 | break; |
6378 | 0 | case 'm': // 2 strings to match. |
6379 | 0 | switch (Name[2]) { |
6380 | 0 | default: break; |
6381 | 0 | case 'p': // 1 string to match. |
6382 | 0 | if (memcmp(Name.data()+3, "ause", 4) != 0) |
6383 | 0 | break; |
6384 | 0 | return MCK_dmpause; // "dmpause" |
6385 | 0 | case 's': // 1 string to match. |
6386 | 0 | if (memcmp(Name.data()+3, "tart", 4) != 0) |
6387 | 0 | break; |
6388 | 0 | return MCK_dmstart; // "dmstart" |
6389 | 0 | } |
6390 | 0 | break; |
6391 | 0 | } |
6392 | 0 | break; |
6393 | 0 | case 'e': // 1 string to match. |
6394 | 0 | if (memcmp(Name.data()+1, "xtract", 6) != 0) |
6395 | 0 | break; |
6396 | 0 | return MCK_extract; // "extract" |
6397 | 0 | case 'i': // 2 strings to match. |
6398 | 0 | if (memcmp(Name.data()+1, "cdata", 5) != 0) |
6399 | 0 | break; |
6400 | 0 | switch (Name[6]) { |
6401 | 0 | default: break; |
6402 | 0 | case 'r': // 1 string to match. |
6403 | 0 | return MCK_icdatar; // "icdatar" |
6404 | 0 | case 'w': // 1 string to match. |
6405 | 0 | return MCK_icdataw; // "icdataw" |
6406 | 0 | } |
6407 | 0 | break; |
6408 | 0 | case 'l': // 2 strings to match. |
6409 | 0 | if (Name[1] != '2') |
6410 | 0 | break; |
6411 | 0 | switch (Name[2]) { |
6412 | 0 | default: break; |
6413 | 0 | case 'f': // 1 string to match. |
6414 | 0 | if (memcmp(Name.data()+3, "etch", 4) != 0) |
6415 | 0 | break; |
6416 | 0 | return MCK_l2fetch; // "l2fetch" |
6417 | 0 | case 'l': // 1 string to match. |
6418 | 0 | if (memcmp(Name.data()+3, "ocka", 4) != 0) |
6419 | 0 | break; |
6420 | 0 | return MCK_l2locka; // "l2locka" |
6421 | 0 | } |
6422 | 0 | break; |
6423 | 0 | case 'm': // 5 strings to match. |
6424 | 0 | switch (Name[1]) { |
6425 | 0 | default: break; |
6426 | 0 | case 'e': // 4 strings to match. |
6427 | 0 | if (Name[2] != 'm') |
6428 | 0 | break; |
6429 | 0 | switch (Name[3]) { |
6430 | 0 | default: break; |
6431 | 0 | case 'd': // 2 strings to match. |
6432 | 0 | if (Name[4] != '_') |
6433 | 0 | break; |
6434 | 0 | switch (Name[5]) { |
6435 | 0 | default: break; |
6436 | 0 | case 'a': // 1 string to match. |
6437 | 0 | if (Name[6] != 'q') |
6438 | 0 | break; |
6439 | 0 | return MCK_memd_95_aq; // "memd_aq" |
6440 | 0 | case 'r': // 1 string to match. |
6441 | 0 | if (Name[6] != 'l') |
6442 | 0 | break; |
6443 | 0 | return MCK_memd_95_rl; // "memd_rl" |
6444 | 0 | } |
6445 | 0 | break; |
6446 | 0 | case 'w': // 2 strings to match. |
6447 | 0 | if (Name[4] != '_') |
6448 | 0 | break; |
6449 | 0 | switch (Name[5]) { |
6450 | 0 | default: break; |
6451 | 0 | case 'a': // 1 string to match. |
6452 | 0 | if (Name[6] != 'q') |
6453 | 0 | break; |
6454 | 0 | return MCK_memw_95_aq; // "memw_aq" |
6455 | 0 | case 'r': // 1 string to match. |
6456 | 0 | if (Name[6] != 'l') |
6457 | 0 | break; |
6458 | 0 | return MCK_memw_95_rl; // "memw_rl" |
6459 | 0 | } |
6460 | 0 | break; |
6461 | 0 | } |
6462 | 0 | break; |
6463 | 0 | case 'o': // 1 string to match. |
6464 | 0 | if (memcmp(Name.data()+2, "dwrap", 5) != 0) |
6465 | 0 | break; |
6466 | 0 | return MCK_modwrap; // "modwrap" |
6467 | 0 | } |
6468 | 0 | break; |
6469 | 0 | case 'n': // 2 strings to match. |
6470 | 0 | if (Name[1] != 'o') |
6471 | 0 | break; |
6472 | 0 | switch (Name[2]) { |
6473 | 0 | default: break; |
6474 | 0 | case 'm': // 1 string to match. |
6475 | 0 | if (memcmp(Name.data()+3, "atch", 4) != 0) |
6476 | 0 | break; |
6477 | 0 | return MCK_nomatch; // "nomatch" |
6478 | 0 | case 'r': // 1 string to match. |
6479 | 0 | if (memcmp(Name.data()+3, "mamt", 4) != 0) |
6480 | 0 | break; |
6481 | 0 | return MCK_normamt; // "normamt" |
6482 | 0 | } |
6483 | 0 | break; |
6484 | 0 | case 'r': // 1 string to match. |
6485 | 0 | if (memcmp(Name.data()+1, "elease", 6) != 0) |
6486 | 0 | break; |
6487 | 0 | return MCK_release; // "release" |
6488 | 0 | case 's': // 6 strings to match. |
6489 | 0 | switch (Name[1]) { |
6490 | 0 | default: break; |
6491 | 0 | case 'e': // 1 string to match. |
6492 | 0 | if (memcmp(Name.data()+2, "tprio", 5) != 0) |
6493 | 0 | break; |
6494 | 0 | return MCK_setprio; // "setprio" |
6495 | 0 | case 'f': // 1 string to match. |
6496 | 0 | if (memcmp(Name.data()+2, "class", 5) != 0) |
6497 | 0 | break; |
6498 | 0 | return MCK_sfclass; // "sfclass" |
6499 | 0 | case 'h': // 4 strings to match. |
6500 | 0 | if (memcmp(Name.data()+2, "uff", 3) != 0) |
6501 | 0 | break; |
6502 | 0 | switch (Name[5]) { |
6503 | 0 | default: break; |
6504 | 0 | case 'e': // 2 strings to match. |
6505 | 0 | switch (Name[6]) { |
6506 | 0 | default: break; |
6507 | 0 | case 'b': // 1 string to match. |
6508 | 0 | return MCK_shuffeb; // "shuffeb" |
6509 | 0 | case 'h': // 1 string to match. |
6510 | 0 | return MCK_shuffeh; // "shuffeh" |
6511 | 0 | } |
6512 | 0 | break; |
6513 | 0 | case 'o': // 2 strings to match. |
6514 | 0 | switch (Name[6]) { |
6515 | 0 | default: break; |
6516 | 0 | case 'b': // 1 string to match. |
6517 | 0 | return MCK_shuffob; // "shuffob" |
6518 | 0 | case 'h': // 1 string to match. |
6519 | 0 | return MCK_shuffoh; // "shuffoh" |
6520 | 0 | } |
6521 | 0 | break; |
6522 | 0 | } |
6523 | 0 | break; |
6524 | 0 | } |
6525 | 0 | break; |
6526 | 0 | case 't': // 1 string to match. |
6527 | 0 | if (memcmp(Name.data()+1, "lblock", 6) != 0) |
6528 | 0 | break; |
6529 | 0 | return MCK_tlblock; // "tlblock" |
6530 | 0 | case 'u': // 1 string to match. |
6531 | 0 | if (memcmp(Name.data()+1, "npause", 6) != 0) |
6532 | 0 | break; |
6533 | 0 | return MCK_unpause; // "unpause" |
6534 | 0 | case 'v': // 55 strings to match. |
6535 | 0 | switch (Name[1]) { |
6536 | 0 | default: break; |
6537 | 0 | case 'a': // 3 strings to match. |
6538 | 0 | switch (Name[2]) { |
6539 | 0 | default: break; |
6540 | 0 | case 'd': // 1 string to match. |
6541 | 0 | if (memcmp(Name.data()+3, "dhub", 4) != 0) |
6542 | 0 | break; |
6543 | 0 | return MCK_vaddhub; // "vaddhub" |
6544 | 0 | case 'l': // 1 string to match. |
6545 | 0 | if (memcmp(Name.data()+3, "ignb", 4) != 0) |
6546 | 0 | break; |
6547 | 0 | return MCK_valignb; // "valignb" |
6548 | 0 | case 's': // 1 string to match. |
6549 | 0 | if (memcmp(Name.data()+3, "rhub", 4) != 0) |
6550 | 0 | break; |
6551 | 0 | return MCK_vasrhub; // "vasrhub" |
6552 | 0 | } |
6553 | 0 | break; |
6554 | 0 | case 'd': // 2 strings to match. |
6555 | 0 | switch (Name[2]) { |
6556 | 0 | default: break; |
6557 | 0 | case 'm': // 1 string to match. |
6558 | 0 | if (memcmp(Name.data()+3, "pyhb", 4) != 0) |
6559 | 0 | break; |
6560 | 0 | return MCK_vdmpyhb; // "vdmpyhb" |
6561 | 0 | case 's': // 1 string to match. |
6562 | 0 | if (memcmp(Name.data()+3, "aduh", 4) != 0) |
6563 | 0 | break; |
6564 | 0 | return MCK_vdsaduh; // "vdsaduh" |
6565 | 0 | } |
6566 | 0 | break; |
6567 | 0 | case 'g': // 1 string to match. |
6568 | 0 | if (memcmp(Name.data()+2, "ather", 5) != 0) |
6569 | 0 | break; |
6570 | 0 | return MCK_vgather; // "vgather" |
6571 | 0 | case 'i': // 2 strings to match. |
6572 | 0 | switch (Name[2]) { |
6573 | 0 | default: break; |
6574 | 0 | case 'n': // 1 string to match. |
6575 | 0 | if (memcmp(Name.data()+3, "sert", 4) != 0) |
6576 | 0 | break; |
6577 | 0 | return MCK_vinsert; // "vinsert" |
6578 | 0 | case 't': // 1 string to match. |
6579 | 0 | if (memcmp(Name.data()+3, "pack", 4) != 0) |
6580 | 0 | break; |
6581 | 0 | return MCK_vitpack; // "vitpack" |
6582 | 0 | } |
6583 | 0 | break; |
6584 | 0 | case 'l': // 1 string to match. |
6585 | 0 | if (memcmp(Name.data()+2, "align", 5) != 0) |
6586 | 0 | break; |
6587 | 0 | return MCK_vlalign; // "vlalign" |
6588 | 0 | case 'm': // 14 strings to match. |
6589 | 0 | if (Name[2] != 'p') |
6590 | 0 | break; |
6591 | 0 | switch (Name[3]) { |
6592 | 0 | default: break; |
6593 | 0 | case 'a': // 3 strings to match. |
6594 | 0 | switch (Name[4]) { |
6595 | 0 | default: break; |
6596 | 0 | case 'b': // 2 strings to match. |
6597 | 0 | if (Name[5] != 'u') |
6598 | 0 | break; |
6599 | 0 | switch (Name[6]) { |
6600 | 0 | default: break; |
6601 | 0 | case 's': // 1 string to match. |
6602 | 0 | return MCK_vmpabus; // "vmpabus" |
6603 | 0 | case 'u': // 1 string to match. |
6604 | 0 | return MCK_vmpabuu; // "vmpabuu" |
6605 | 0 | } |
6606 | 0 | break; |
6607 | 0 | case 'u': // 1 string to match. |
6608 | 0 | if (memcmp(Name.data()+5, "hb", 2) != 0) |
6609 | 0 | break; |
6610 | 0 | return MCK_vmpauhb; // "vmpauhb" |
6611 | 0 | } |
6612 | 0 | break; |
6613 | 0 | case 'y': // 11 strings to match. |
6614 | 0 | switch (Name[4]) { |
6615 | 0 | default: break; |
6616 | 0 | case 'b': // 2 strings to match. |
6617 | 0 | switch (Name[5]) { |
6618 | 0 | default: break; |
6619 | 0 | case 's': // 1 string to match. |
6620 | 0 | if (Name[6] != 'u') |
6621 | 0 | break; |
6622 | 0 | return MCK_vmpybsu; // "vmpybsu" |
6623 | 0 | case 'u': // 1 string to match. |
6624 | 0 | if (Name[6] != 's') |
6625 | 0 | break; |
6626 | 0 | return MCK_vmpybus; // "vmpybus" |
6627 | 0 | } |
6628 | 0 | break; |
6629 | 0 | case 'h': // 2 strings to match. |
6630 | 0 | switch (Name[5]) { |
6631 | 0 | default: break; |
6632 | 0 | case 's': // 1 string to match. |
6633 | 0 | if (Name[6] != 'u') |
6634 | 0 | break; |
6635 | 0 | return MCK_vmpyhsu; // "vmpyhsu" |
6636 | 0 | case 'u': // 1 string to match. |
6637 | 0 | if (Name[6] != 's') |
6638 | 0 | break; |
6639 | 0 | return MCK_vmpyhus; // "vmpyhus" |
6640 | 0 | } |
6641 | 0 | break; |
6642 | 0 | case 'i': // 4 strings to match. |
6643 | 0 | switch (Name[5]) { |
6644 | 0 | default: break; |
6645 | 0 | case 'e': // 1 string to match. |
6646 | 0 | if (Name[6] != 'o') |
6647 | 0 | break; |
6648 | 0 | return MCK_vmpyieo; // "vmpyieo" |
6649 | 0 | case 'h': // 1 string to match. |
6650 | 0 | if (Name[6] != 'b') |
6651 | 0 | break; |
6652 | 0 | return MCK_vmpyihb; // "vmpyihb" |
6653 | 0 | case 'w': // 2 strings to match. |
6654 | 0 | switch (Name[6]) { |
6655 | 0 | default: break; |
6656 | 0 | case 'b': // 1 string to match. |
6657 | 0 | return MCK_vmpyiwb; // "vmpyiwb" |
6658 | 0 | case 'h': // 1 string to match. |
6659 | 0 | return MCK_vmpyiwh; // "vmpyiwh" |
6660 | 0 | } |
6661 | 0 | break; |
6662 | 0 | } |
6663 | 0 | break; |
6664 | 0 | case 'o': // 1 string to match. |
6665 | 0 | if (memcmp(Name.data()+5, "wh", 2) != 0) |
6666 | 0 | break; |
6667 | 0 | return MCK_vmpyowh; // "vmpyowh" |
6668 | 0 | case 'w': // 2 strings to match. |
6669 | 0 | switch (Name[5]) { |
6670 | 0 | default: break; |
6671 | 0 | case 'e': // 1 string to match. |
6672 | 0 | if (Name[6] != 'h') |
6673 | 0 | break; |
6674 | 0 | return MCK_vmpyweh; // "vmpyweh" |
6675 | 0 | case 'o': // 1 string to match. |
6676 | 0 | if (Name[6] != 'h') |
6677 | 0 | break; |
6678 | 0 | return MCK_vmpywoh; // "vmpywoh" |
6679 | 0 | } |
6680 | 0 | break; |
6681 | 0 | } |
6682 | 0 | break; |
6683 | 0 | } |
6684 | 0 | break; |
6685 | 0 | case 'n': // 1 string to match. |
6686 | 0 | if (memcmp(Name.data()+2, "avgub", 5) != 0) |
6687 | 0 | break; |
6688 | 0 | return MCK_vnavgub; // "vnavgub" |
6689 | 0 | case 'p': // 6 strings to match. |
6690 | 0 | if (memcmp(Name.data()+2, "ack", 3) != 0) |
6691 | 0 | break; |
6692 | 0 | switch (Name[5]) { |
6693 | 0 | default: break; |
6694 | 0 | case 'e': // 2 strings to match. |
6695 | 0 | switch (Name[6]) { |
6696 | 0 | default: break; |
6697 | 0 | case 'b': // 1 string to match. |
6698 | 0 | return MCK_vpackeb; // "vpackeb" |
6699 | 0 | case 'h': // 1 string to match. |
6700 | 0 | return MCK_vpackeh; // "vpackeh" |
6701 | 0 | } |
6702 | 0 | break; |
6703 | 0 | case 'h': // 1 string to match. |
6704 | 0 | if (Name[6] != 'b') |
6705 | 0 | break; |
6706 | 0 | return MCK_vpackhb; // "vpackhb" |
6707 | 0 | case 'o': // 2 strings to match. |
6708 | 0 | switch (Name[6]) { |
6709 | 0 | default: break; |
6710 | 0 | case 'b': // 1 string to match. |
6711 | 0 | return MCK_vpackob; // "vpackob" |
6712 | 0 | case 'h': // 1 string to match. |
6713 | 0 | return MCK_vpackoh; // "vpackoh" |
6714 | 0 | } |
6715 | 0 | break; |
6716 | 0 | case 'w': // 1 string to match. |
6717 | 0 | if (Name[6] != 'h') |
6718 | 0 | break; |
6719 | 0 | return MCK_vpackwh; // "vpackwh" |
6720 | 0 | } |
6721 | 0 | break; |
6722 | 0 | case 'r': // 15 strings to match. |
6723 | 0 | switch (Name[2]) { |
6724 | 0 | default: break; |
6725 | 0 | case '8': // 1 string to match. |
6726 | 0 | if (memcmp(Name.data()+3, "mpyz", 4) != 0) |
6727 | 0 | break; |
6728 | 0 | return MCK_vr8mpyz; // "vr8mpyz" |
6729 | 0 | case 'a': // 2 strings to match. |
6730 | 0 | if (memcmp(Name.data()+3, "ddu", 3) != 0) |
6731 | 0 | break; |
6732 | 0 | switch (Name[6]) { |
6733 | 0 | default: break; |
6734 | 0 | case 'b': // 1 string to match. |
6735 | 0 | return MCK_vraddub; // "vraddub" |
6736 | 0 | case 'h': // 1 string to match. |
6737 | 0 | return MCK_vradduh; // "vradduh" |
6738 | 0 | } |
6739 | 0 | break; |
6740 | 0 | case 'c': // 4 strings to match. |
6741 | 0 | switch (Name[3]) { |
6742 | 0 | default: break; |
6743 | 0 | case 'm': // 3 strings to match. |
6744 | 0 | if (memcmp(Name.data()+4, "py", 2) != 0) |
6745 | 0 | break; |
6746 | 0 | switch (Name[6]) { |
6747 | 0 | default: break; |
6748 | 0 | case 'i': // 1 string to match. |
6749 | 0 | return MCK_vrcmpyi; // "vrcmpyi" |
6750 | 0 | case 'r': // 1 string to match. |
6751 | 0 | return MCK_vrcmpyr; // "vrcmpyr" |
6752 | 0 | case 's': // 1 string to match. |
6753 | 0 | return MCK_vrcmpys; // "vrcmpys" |
6754 | 0 | } |
6755 | 0 | break; |
6756 | 0 | case 'n': // 1 string to match. |
6757 | 0 | if (memcmp(Name.data()+4, "egh", 3) != 0) |
6758 | 0 | break; |
6759 | 0 | return MCK_vrcnegh; // "vrcnegh" |
6760 | 0 | } |
6761 | 0 | break; |
6762 | 0 | case 'd': // 1 string to match. |
6763 | 0 | if (memcmp(Name.data()+3, "elta", 4) != 0) |
6764 | 0 | break; |
6765 | 0 | return MCK_vrdelta; // "vrdelta" |
6766 | 0 | case 'm': // 6 strings to match. |
6767 | 0 | switch (Name[3]) { |
6768 | 0 | default: break; |
6769 | 0 | case 'a': // 2 strings to match. |
6770 | 0 | if (memcmp(Name.data()+4, "xu", 2) != 0) |
6771 | 0 | break; |
6772 | 0 | switch (Name[6]) { |
6773 | 0 | default: break; |
6774 | 0 | case 'h': // 1 string to match. |
6775 | 0 | return MCK_vrmaxuh; // "vrmaxuh" |
6776 | 0 | case 'w': // 1 string to match. |
6777 | 0 | return MCK_vrmaxuw; // "vrmaxuw" |
6778 | 0 | } |
6779 | 0 | break; |
6780 | 0 | case 'i': // 2 strings to match. |
6781 | 0 | if (memcmp(Name.data()+4, "nu", 2) != 0) |
6782 | 0 | break; |
6783 | 0 | switch (Name[6]) { |
6784 | 0 | default: break; |
6785 | 0 | case 'h': // 1 string to match. |
6786 | 0 | return MCK_vrminuh; // "vrminuh" |
6787 | 0 | case 'w': // 1 string to match. |
6788 | 0 | return MCK_vrminuw; // "vrminuw" |
6789 | 0 | } |
6790 | 0 | break; |
6791 | 0 | case 'p': // 2 strings to match. |
6792 | 0 | if (Name[4] != 'y') |
6793 | 0 | break; |
6794 | 0 | switch (Name[5]) { |
6795 | 0 | default: break; |
6796 | 0 | case 'b': // 1 string to match. |
6797 | 0 | if (Name[6] != 'u') |
6798 | 0 | break; |
6799 | 0 | return MCK_vrmpybu; // "vrmpybu" |
6800 | 0 | case 'u': // 1 string to match. |
6801 | 0 | if (Name[6] != 'b') |
6802 | 0 | break; |
6803 | 0 | return MCK_vrmpyub; // "vrmpyub" |
6804 | 0 | } |
6805 | 0 | break; |
6806 | 0 | } |
6807 | 0 | break; |
6808 | 0 | case 's': // 1 string to match. |
6809 | 0 | if (memcmp(Name.data()+3, "adub", 4) != 0) |
6810 | 0 | break; |
6811 | 0 | return MCK_vrsadub; // "vrsadub" |
6812 | 0 | } |
6813 | 0 | break; |
6814 | 0 | case 's': // 8 strings to match. |
6815 | 0 | switch (Name[2]) { |
6816 | 0 | default: break; |
6817 | 0 | case 'a': // 2 strings to match. |
6818 | 0 | if (Name[3] != 't') |
6819 | 0 | break; |
6820 | 0 | switch (Name[4]) { |
6821 | 0 | default: break; |
6822 | 0 | case 'h': // 1 string to match. |
6823 | 0 | if (memcmp(Name.data()+5, "ub", 2) != 0) |
6824 | 0 | break; |
6825 | 0 | return MCK_vsathub; // "vsathub" |
6826 | 0 | case 'w': // 1 string to match. |
6827 | 0 | if (memcmp(Name.data()+5, "uh", 2) != 0) |
6828 | 0 | break; |
6829 | 0 | return MCK_vsatwuh; // "vsatwuh" |
6830 | 0 | } |
6831 | 0 | break; |
6832 | 0 | case 'h': // 4 strings to match. |
6833 | 0 | if (memcmp(Name.data()+3, "uff", 3) != 0) |
6834 | 0 | break; |
6835 | 0 | switch (Name[6]) { |
6836 | 0 | default: break; |
6837 | 0 | case 'b': // 1 string to match. |
6838 | 0 | return MCK_vshuffb; // "vshuffb" |
6839 | 0 | case 'e': // 1 string to match. |
6840 | 0 | return MCK_vshuffe; // "vshuffe" |
6841 | 0 | case 'h': // 1 string to match. |
6842 | 0 | return MCK_vshuffh; // "vshuffh" |
6843 | 0 | case 'o': // 1 string to match. |
6844 | 0 | return MCK_vshuffo; // "vshuffo" |
6845 | 0 | } |
6846 | 0 | break; |
6847 | 0 | case 'p': // 2 strings to match. |
6848 | 0 | if (memcmp(Name.data()+3, "lat", 3) != 0) |
6849 | 0 | break; |
6850 | 0 | switch (Name[6]) { |
6851 | 0 | default: break; |
6852 | 0 | case 'b': // 1 string to match. |
6853 | 0 | return MCK_vsplatb; // "vsplatb" |
6854 | 0 | case 'h': // 1 string to match. |
6855 | 0 | return MCK_vsplath; // "vsplath" |
6856 | 0 | } |
6857 | 0 | break; |
6858 | 0 | } |
6859 | 0 | break; |
6860 | 0 | case 't': // 1 string to match. |
6861 | 0 | if (memcmp(Name.data()+2, "mpyhb", 5) != 0) |
6862 | 0 | break; |
6863 | 0 | return MCK_vtmpyhb; // "vtmpyhb" |
6864 | 0 | case 'u': // 1 string to match. |
6865 | 0 | if (memcmp(Name.data()+2, "npack", 5) != 0) |
6866 | 0 | break; |
6867 | 0 | return MCK_vunpack; // "vunpack" |
6868 | 0 | } |
6869 | 0 | break; |
6870 | 0 | } |
6871 | 0 | break; |
6872 | 0 | case 8: // 67 strings to match. |
6873 | 0 | switch (Name[0]) { |
6874 | 0 | default: break; |
6875 | 0 | case 'b': // 1 string to match. |
6876 | 0 | if (memcmp(Name.data()+1, "itsplit", 7) != 0) |
6877 | 0 | break; |
6878 | 0 | return MCK_bitsplit; // "bitsplit" |
6879 | 0 | case 'd': // 4 strings to match. |
6880 | 0 | switch (Name[1]) { |
6881 | 0 | default: break; |
6882 | 0 | case 'c': // 2 strings to match. |
6883 | 0 | switch (Name[2]) { |
6884 | 0 | default: break; |
6885 | 0 | case 'c': // 1 string to match. |
6886 | 0 | if (memcmp(Name.data()+3, "leana", 5) != 0) |
6887 | 0 | break; |
6888 | 0 | return MCK_dccleana; // "dccleana" |
6889 | 0 | case 'i': // 1 string to match. |
6890 | 0 | if (memcmp(Name.data()+3, "nvidx", 5) != 0) |
6891 | 0 | break; |
6892 | 0 | return MCK_dcinvidx; // "dcinvidx" |
6893 | 0 | } |
6894 | 0 | break; |
6895 | 0 | case 'f': // 1 string to match. |
6896 | 0 | if (memcmp(Name.data()+2, "mpyfix", 6) != 0) |
6897 | 0 | break; |
6898 | 0 | return MCK_dfmpyfix; // "dfmpyfix" |
6899 | 0 | case 'm': // 1 string to match. |
6900 | 0 | if (memcmp(Name.data()+2, "resume", 6) != 0) |
6901 | 0 | break; |
6902 | 0 | return MCK_dmresume; // "dmresume" |
6903 | 0 | } |
6904 | 0 | break; |
6905 | 0 | case 'e': // 3 strings to match. |
6906 | 0 | switch (Name[1]) { |
6907 | 0 | default: break; |
6908 | 0 | case 'n': // 2 strings to match. |
6909 | 0 | if (memcmp(Name.data()+2, "dloop", 5) != 0) |
6910 | 0 | break; |
6911 | 0 | switch (Name[7]) { |
6912 | 0 | default: break; |
6913 | 0 | case '0': // 1 string to match. |
6914 | 0 | return MCK_endloop0; // "endloop0" |
6915 | 0 | case '1': // 1 string to match. |
6916 | 0 | return MCK_endloop1; // "endloop1" |
6917 | 0 | } |
6918 | 0 | break; |
6919 | 0 | case 'x': // 1 string to match. |
6920 | 0 | if (memcmp(Name.data()+2, "tractu", 6) != 0) |
6921 | 0 | break; |
6922 | 0 | return MCK_extractu; // "extractu" |
6923 | 0 | } |
6924 | 0 | break; |
6925 | 0 | case 'g': // 1 string to match. |
6926 | 0 | if (memcmp(Name.data()+1, "etimask", 7) != 0) |
6927 | 0 | break; |
6928 | 0 | return MCK_getimask; // "getimask" |
6929 | 0 | case 'i': // 3 strings to match. |
6930 | 0 | switch (Name[1]) { |
6931 | 0 | default: break; |
6932 | 0 | case 'a': // 2 strings to match. |
6933 | 0 | if (memcmp(Name.data()+2, "ssign", 5) != 0) |
6934 | 0 | break; |
6935 | 0 | switch (Name[7]) { |
6936 | 0 | default: break; |
6937 | 0 | case 'r': // 1 string to match. |
6938 | 0 | return MCK_iassignr; // "iassignr" |
6939 | 0 | case 'w': // 1 string to match. |
6940 | 0 | return MCK_iassignw; // "iassignw" |
6941 | 0 | } |
6942 | 0 | break; |
6943 | 0 | case 'c': // 1 string to match. |
6944 | 0 | if (memcmp(Name.data()+2, "invidx", 6) != 0) |
6945 | 0 | break; |
6946 | 0 | return MCK_icinvidx; // "icinvidx" |
6947 | 0 | } |
6948 | 0 | break; |
6949 | 0 | case 'k': // 1 string to match. |
6950 | 0 | if (memcmp(Name.data()+1, "0unlock", 7) != 0) |
6951 | 0 | break; |
6952 | 0 | return MCK_k0unlock; // "k0unlock" |
6953 | 0 | case 'l': // 2 strings to match. |
6954 | 0 | if (Name[1] != '2') |
6955 | 0 | break; |
6956 | 0 | switch (Name[2]) { |
6957 | 0 | default: break; |
6958 | 0 | case 'g': // 1 string to match. |
6959 | 0 | if (memcmp(Name.data()+3, "clean", 5) != 0) |
6960 | 0 | break; |
6961 | 0 | return MCK_l2gclean; // "l2gclean" |
6962 | 0 | case 'i': // 1 string to match. |
6963 | 0 | if (memcmp(Name.data()+3, "nvidx", 5) != 0) |
6964 | 0 | break; |
6965 | 0 | return MCK_l2invidx; // "l2invidx" |
6966 | 0 | } |
6967 | 0 | break; |
6968 | 0 | case 'p': // 1 string to match. |
6969 | 0 | if (memcmp(Name.data()+1, "opcount", 7) != 0) |
6970 | 0 | break; |
6971 | 0 | return MCK_popcount; // "popcount" |
6972 | 0 | case 's': // 8 strings to match. |
6973 | 0 | switch (Name[1]) { |
6974 | 0 | default: break; |
6975 | 0 | case 'e': // 1 string to match. |
6976 | 0 | if (memcmp(Name.data()+2, "timask", 6) != 0) |
6977 | 0 | break; |
6978 | 0 | return MCK_setimask; // "setimask" |
6979 | 0 | case 'f': // 4 strings to match. |
6980 | 0 | switch (Name[2]) { |
6981 | 0 | default: break; |
6982 | 0 | case 'f': // 3 strings to match. |
6983 | 0 | if (memcmp(Name.data()+3, "ixup", 4) != 0) |
6984 | 0 | break; |
6985 | 0 | switch (Name[7]) { |
6986 | 0 | default: break; |
6987 | 0 | case 'd': // 1 string to match. |
6988 | 0 | return MCK_sffixupd; // "sffixupd" |
6989 | 0 | case 'n': // 1 string to match. |
6990 | 0 | return MCK_sffixupn; // "sffixupn" |
6991 | 0 | case 'r': // 1 string to match. |
6992 | 0 | return MCK_sffixupr; // "sffixupr" |
6993 | 0 | } |
6994 | 0 | break; |
6995 | 0 | case 'r': // 1 string to match. |
6996 | 0 | if (memcmp(Name.data()+3, "ecipa", 5) != 0) |
6997 | 0 | break; |
6998 | 0 | return MCK_sfrecipa; // "sfrecipa" |
6999 | 0 | } |
7000 | 0 | break; |
7001 | 0 | case 'p': // 3 strings to match. |
7002 | 0 | switch (Name[2]) { |
7003 | 0 | default: break; |
7004 | 0 | case '1': // 1 string to match. |
7005 | 0 | if (memcmp(Name.data()+3, "loop0", 5) != 0) |
7006 | 0 | break; |
7007 | 0 | return MCK_sp1loop0; // "sp1loop0" |
7008 | 0 | case '2': // 1 string to match. |
7009 | 0 | if (memcmp(Name.data()+3, "loop0", 5) != 0) |
7010 | 0 | break; |
7011 | 0 | return MCK_sp2loop0; // "sp2loop0" |
7012 | 0 | case '3': // 1 string to match. |
7013 | 0 | if (memcmp(Name.data()+3, "loop0", 5) != 0) |
7014 | 0 | break; |
7015 | 0 | return MCK_sp3loop0; // "sp3loop0" |
7016 | 0 | } |
7017 | 0 | break; |
7018 | 0 | } |
7019 | 0 | break; |
7020 | 0 | case 't': // 1 string to match. |
7021 | 0 | if (memcmp(Name.data()+1, "lbmatch", 7) != 0) |
7022 | 0 | break; |
7023 | 0 | return MCK_tlbmatch; // "tlbmatch" |
7024 | 0 | case 'v': // 41 strings to match. |
7025 | 0 | switch (Name[1]) { |
7026 | 0 | default: break; |
7027 | 0 | case 'a': // 2 strings to match. |
7028 | 0 | switch (Name[2]) { |
7029 | 0 | default: break; |
7030 | 0 | case 'b': // 1 string to match. |
7031 | 0 | if (memcmp(Name.data()+3, "sdiff", 5) != 0) |
7032 | 0 | break; |
7033 | 0 | return MCK_vabsdiff; // "vabsdiff" |
7034 | 0 | case 's': // 1 string to match. |
7035 | 0 | if (memcmp(Name.data()+3, "rinto", 5) != 0) |
7036 | 0 | break; |
7037 | 0 | return MCK_vasrinto; // "vasrinto" |
7038 | 0 | } |
7039 | 0 | break; |
7040 | 0 | case 'c': // 2 strings to match. |
7041 | 0 | switch (Name[2]) { |
7042 | 0 | default: break; |
7043 | 0 | case 'o': // 1 string to match. |
7044 | 0 | if (memcmp(Name.data()+3, "mbine", 5) != 0) |
7045 | 0 | break; |
7046 | 0 | return MCK_vcombine; // "vcombine" |
7047 | 0 | case 'r': // 1 string to match. |
7048 | 0 | if (memcmp(Name.data()+3, "otate", 5) != 0) |
7049 | 0 | break; |
7050 | 0 | return MCK_vcrotate; // "vcrotate" |
7051 | 0 | } |
7052 | 0 | break; |
7053 | 0 | case 'd': // 4 strings to match. |
7054 | 0 | switch (Name[2]) { |
7055 | 0 | default: break; |
7056 | 0 | case 'e': // 1 string to match. |
7057 | 0 | if (memcmp(Name.data()+3, "alb4w", 5) != 0) |
7058 | 0 | break; |
7059 | 0 | return MCK_vdealb4w; // "vdealb4w" |
7060 | 0 | case 'm': // 3 strings to match. |
7061 | 0 | if (memcmp(Name.data()+3, "py", 2) != 0) |
7062 | 0 | break; |
7063 | 0 | switch (Name[5]) { |
7064 | 0 | default: break; |
7065 | 0 | case 'b': // 2 strings to match. |
7066 | 0 | switch (Name[6]) { |
7067 | 0 | default: break; |
7068 | 0 | case 's': // 1 string to match. |
7069 | 0 | if (Name[7] != 'u') |
7070 | 0 | break; |
7071 | 0 | return MCK_vdmpybsu; // "vdmpybsu" |
7072 | 0 | case 'u': // 1 string to match. |
7073 | 0 | if (Name[7] != 's') |
7074 | 0 | break; |
7075 | 0 | return MCK_vdmpybus; // "vdmpybus" |
7076 | 0 | } |
7077 | 0 | break; |
7078 | 0 | case 'h': // 1 string to match. |
7079 | 0 | if (memcmp(Name.data()+6, "su", 2) != 0) |
7080 | 0 | break; |
7081 | 0 | return MCK_vdmpyhsu; // "vdmpyhsu" |
7082 | 0 | } |
7083 | 0 | break; |
7084 | 0 | } |
7085 | 0 | break; |
7086 | 0 | case 'e': // 1 string to match. |
7087 | 0 | if (memcmp(Name.data()+2, "xtract", 6) != 0) |
7088 | 0 | break; |
7089 | 0 | return MCK_vextract; // "vextract" |
7090 | 0 | case 'm': // 6 strings to match. |
7091 | 0 | if (memcmp(Name.data()+2, "py", 2) != 0) |
7092 | 0 | break; |
7093 | 0 | switch (Name[4]) { |
7094 | 0 | default: break; |
7095 | 0 | case 'e': // 1 string to match. |
7096 | 0 | if (memcmp(Name.data()+5, "wuh", 3) != 0) |
7097 | 0 | break; |
7098 | 0 | return MCK_vmpyewuh; // "vmpyewuh" |
7099 | 0 | case 'i': // 3 strings to match. |
7100 | 0 | switch (Name[5]) { |
7101 | 0 | default: break; |
7102 | 0 | case 'e': // 1 string to match. |
7103 | 0 | if (memcmp(Name.data()+6, "wh", 2) != 0) |
7104 | 0 | break; |
7105 | 0 | return MCK_vmpyiewh; // "vmpyiewh" |
7106 | 0 | case 'o': // 1 string to match. |
7107 | 0 | if (memcmp(Name.data()+6, "wh", 2) != 0) |
7108 | 0 | break; |
7109 | 0 | return MCK_vmpyiowh; // "vmpyiowh" |
7110 | 0 | case 'w': // 1 string to match. |
7111 | 0 | if (memcmp(Name.data()+6, "ub", 2) != 0) |
7112 | 0 | break; |
7113 | 0 | return MCK_vmpyiwub; // "vmpyiwub" |
7114 | 0 | } |
7115 | 0 | break; |
7116 | 0 | case 'w': // 2 strings to match. |
7117 | 0 | switch (Name[5]) { |
7118 | 0 | default: break; |
7119 | 0 | case 'e': // 1 string to match. |
7120 | 0 | if (memcmp(Name.data()+6, "uh", 2) != 0) |
7121 | 0 | break; |
7122 | 0 | return MCK_vmpyweuh; // "vmpyweuh" |
7123 | 0 | case 'o': // 1 string to match. |
7124 | 0 | if (memcmp(Name.data()+6, "uh", 2) != 0) |
7125 | 0 | break; |
7126 | 0 | return MCK_vmpywouh; // "vmpywouh" |
7127 | 0 | } |
7128 | 0 | break; |
7129 | 0 | } |
7130 | 0 | break; |
7131 | 0 | case 'n': // 1 string to match. |
7132 | 0 | if (memcmp(Name.data()+2, "ormamt", 6) != 0) |
7133 | 0 | break; |
7134 | 0 | return MCK_vnormamt; // "vnormamt" |
7135 | 0 | case 'p': // 2 strings to match. |
7136 | 0 | if (memcmp(Name.data()+2, "ack", 3) != 0) |
7137 | 0 | break; |
7138 | 0 | switch (Name[5]) { |
7139 | 0 | default: break; |
7140 | 0 | case 'h': // 1 string to match. |
7141 | 0 | if (memcmp(Name.data()+6, "ub", 2) != 0) |
7142 | 0 | break; |
7143 | 0 | return MCK_vpackhub; // "vpackhub" |
7144 | 0 | case 'w': // 1 string to match. |
7145 | 0 | if (memcmp(Name.data()+6, "uh", 2) != 0) |
7146 | 0 | break; |
7147 | 0 | return MCK_vpackwuh; // "vpackwuh" |
7148 | 0 | } |
7149 | 0 | break; |
7150 | 0 | case 'r': // 7 strings to match. |
7151 | 0 | switch (Name[2]) { |
7152 | 0 | default: break; |
7153 | 0 | case '1': // 1 string to match. |
7154 | 0 | if (memcmp(Name.data()+3, "6mpyz", 5) != 0) |
7155 | 0 | break; |
7156 | 0 | return MCK_vr16mpyz; // "vr16mpyz" |
7157 | 0 | case 'm': // 4 strings to match. |
7158 | 0 | if (memcmp(Name.data()+3, "py", 2) != 0) |
7159 | 0 | break; |
7160 | 0 | switch (Name[5]) { |
7161 | 0 | default: break; |
7162 | 0 | case 'b': // 2 strings to match. |
7163 | 0 | switch (Name[6]) { |
7164 | 0 | default: break; |
7165 | 0 | case 's': // 1 string to match. |
7166 | 0 | if (Name[7] != 'u') |
7167 | 0 | break; |
7168 | 0 | return MCK_vrmpybsu; // "vrmpybsu" |
7169 | 0 | case 'u': // 1 string to match. |
7170 | 0 | if (Name[7] != 's') |
7171 | 0 | break; |
7172 | 0 | return MCK_vrmpybus; // "vrmpybus" |
7173 | 0 | } |
7174 | 0 | break; |
7175 | 0 | case 'w': // 2 strings to match. |
7176 | 0 | switch (Name[6]) { |
7177 | 0 | default: break; |
7178 | 0 | case 'e': // 1 string to match. |
7179 | 0 | if (Name[7] != 'h') |
7180 | 0 | break; |
7181 | 0 | return MCK_vrmpyweh; // "vrmpyweh" |
7182 | 0 | case 'o': // 1 string to match. |
7183 | 0 | if (Name[7] != 'h') |
7184 | 0 | break; |
7185 | 0 | return MCK_vrmpywoh; // "vrmpywoh" |
7186 | 0 | } |
7187 | 0 | break; |
7188 | 0 | } |
7189 | 0 | break; |
7190 | 0 | case 'o': // 2 strings to match. |
7191 | 0 | if (memcmp(Name.data()+3, "und", 3) != 0) |
7192 | 0 | break; |
7193 | 0 | switch (Name[6]) { |
7194 | 0 | default: break; |
7195 | 0 | case 'h': // 1 string to match. |
7196 | 0 | if (Name[7] != 'b') |
7197 | 0 | break; |
7198 | 0 | return MCK_vroundhb; // "vroundhb" |
7199 | 0 | case 'w': // 1 string to match. |
7200 | 0 | if (Name[7] != 'h') |
7201 | 0 | break; |
7202 | 0 | return MCK_vroundwh; // "vroundwh" |
7203 | 0 | } |
7204 | 0 | break; |
7205 | 0 | } |
7206 | 0 | break; |
7207 | 0 | case 's': // 8 strings to match. |
7208 | 0 | switch (Name[2]) { |
7209 | 0 | default: break; |
7210 | 0 | case 'a': // 1 string to match. |
7211 | 0 | if (memcmp(Name.data()+3, "tuwuh", 5) != 0) |
7212 | 0 | break; |
7213 | 0 | return MCK_vsatuwuh; // "vsatuwuh" |
7214 | 0 | case 'c': // 1 string to match. |
7215 | 0 | if (memcmp(Name.data()+3, "atter", 5) != 0) |
7216 | 0 | break; |
7217 | 0 | return MCK_vscatter; // "vscatter" |
7218 | 0 | case 'h': // 5 strings to match. |
7219 | 0 | if (memcmp(Name.data()+3, "uff", 3) != 0) |
7220 | 0 | break; |
7221 | 0 | switch (Name[6]) { |
7222 | 0 | default: break; |
7223 | 0 | case 'e': // 2 strings to match. |
7224 | 0 | switch (Name[7]) { |
7225 | 0 | default: break; |
7226 | 0 | case 'b': // 1 string to match. |
7227 | 0 | return MCK_vshuffeb; // "vshuffeb" |
7228 | 0 | case 'h': // 1 string to match. |
7229 | 0 | return MCK_vshuffeh; // "vshuffeh" |
7230 | 0 | } |
7231 | 0 | break; |
7232 | 0 | case 'o': // 3 strings to match. |
7233 | 0 | switch (Name[7]) { |
7234 | 0 | default: break; |
7235 | 0 | case 'b': // 1 string to match. |
7236 | 0 | return MCK_vshuffob; // "vshuffob" |
7237 | 0 | case 'e': // 1 string to match. |
7238 | 0 | return MCK_vshuffoe; // "vshuffoe" |
7239 | 0 | case 'h': // 1 string to match. |
7240 | 0 | return MCK_vshuffoh; // "vshuffoh" |
7241 | 0 | } |
7242 | 0 | break; |
7243 | 0 | } |
7244 | 0 | break; |
7245 | 0 | case 'p': // 1 string to match. |
7246 | 0 | if (memcmp(Name.data()+3, "liceb", 5) != 0) |
7247 | 0 | break; |
7248 | 0 | return MCK_vspliceb; // "vspliceb" |
7249 | 0 | } |
7250 | 0 | break; |
7251 | 0 | case 't': // 5 strings to match. |
7252 | 0 | switch (Name[2]) { |
7253 | 0 | default: break; |
7254 | 0 | case 'm': // 1 string to match. |
7255 | 0 | if (memcmp(Name.data()+3, "pybus", 5) != 0) |
7256 | 0 | break; |
7257 | 0 | return MCK_vtmpybus; // "vtmpybus" |
7258 | 0 | case 'r': // 4 strings to match. |
7259 | 0 | if (memcmp(Name.data()+3, "un", 2) != 0) |
7260 | 0 | break; |
7261 | 0 | switch (Name[5]) { |
7262 | 0 | default: break; |
7263 | 0 | case 'e': // 2 strings to match. |
7264 | 0 | switch (Name[6]) { |
7265 | 0 | default: break; |
7266 | 0 | case 'h': // 1 string to match. |
7267 | 0 | if (Name[7] != 'b') |
7268 | 0 | break; |
7269 | 0 | return MCK_vtrunehb; // "vtrunehb" |
7270 | 0 | case 'w': // 1 string to match. |
7271 | 0 | if (Name[7] != 'h') |
7272 | 0 | break; |
7273 | 0 | return MCK_vtrunewh; // "vtrunewh" |
7274 | 0 | } |
7275 | 0 | break; |
7276 | 0 | case 'o': // 2 strings to match. |
7277 | 0 | switch (Name[6]) { |
7278 | 0 | default: break; |
7279 | 0 | case 'h': // 1 string to match. |
7280 | 0 | if (Name[7] != 'b') |
7281 | 0 | break; |
7282 | 0 | return MCK_vtrunohb; // "vtrunohb" |
7283 | 0 | case 'w': // 1 string to match. |
7284 | 0 | if (Name[7] != 'h') |
7285 | 0 | break; |
7286 | 0 | return MCK_vtrunowh; // "vtrunowh" |
7287 | 0 | } |
7288 | 0 | break; |
7289 | 0 | } |
7290 | 0 | break; |
7291 | 0 | } |
7292 | 0 | break; |
7293 | 0 | case 'u': // 3 strings to match. |
7294 | 0 | if (memcmp(Name.data()+2, "npack", 5) != 0) |
7295 | 0 | break; |
7296 | 0 | switch (Name[7]) { |
7297 | 0 | default: break; |
7298 | 0 | case 'b': // 1 string to match. |
7299 | 0 | return MCK_vunpackb; // "vunpackb" |
7300 | 0 | case 'h': // 1 string to match. |
7301 | 0 | return MCK_vunpackh; // "vunpackh" |
7302 | 0 | case 'o': // 1 string to match. |
7303 | 0 | return MCK_vunpacko; // "vunpacko" |
7304 | 0 | } |
7305 | 0 | break; |
7306 | 0 | } |
7307 | 0 | break; |
7308 | 0 | case 'z': // 1 string to match. |
7309 | 0 | if (memcmp(Name.data()+1, "extract", 7) != 0) |
7310 | 0 | break; |
7311 | 0 | return MCK_zextract; // "zextract" |
7312 | 0 | } |
7313 | 0 | break; |
7314 | 0 | case 9: // 37 strings to match. |
7315 | 0 | switch (Name[0]) { |
7316 | 0 | default: break; |
7317 | 0 | case 'e': // 1 string to match. |
7318 | 0 | if (memcmp(Name.data()+1, "ndloop01", 8) != 0) |
7319 | 0 | break; |
7320 | 0 | return MCK_endloop01; // "endloop01" |
7321 | 0 | case 'l': // 2 strings to match. |
7322 | 0 | if (Name[1] != '2') |
7323 | 0 | break; |
7324 | 0 | switch (Name[2]) { |
7325 | 0 | default: break; |
7326 | 0 | case 'g': // 1 string to match. |
7327 | 0 | if (memcmp(Name.data()+3, "unlock", 6) != 0) |
7328 | 0 | break; |
7329 | 0 | return MCK_l2gunlock; // "l2gunlock" |
7330 | 0 | case 'u': // 1 string to match. |
7331 | 0 | if (memcmp(Name.data()+3, "nlocka", 6) != 0) |
7332 | 0 | break; |
7333 | 0 | return MCK_l2unlocka; // "l2unlocka" |
7334 | 0 | } |
7335 | 0 | break; |
7336 | 0 | case 'm': // 3 strings to match. |
7337 | 0 | if (memcmp(Name.data()+1, "em", 2) != 0) |
7338 | 0 | break; |
7339 | 0 | switch (Name[3]) { |
7340 | 0 | default: break; |
7341 | 0 | case 'b': // 1 string to match. |
7342 | 0 | if (memcmp(Name.data()+4, "_fifo", 5) != 0) |
7343 | 0 | break; |
7344 | 0 | return MCK_memb_95_fifo; // "memb_fifo" |
7345 | 0 | case 'h': // 1 string to match. |
7346 | 0 | if (memcmp(Name.data()+4, "_fifo", 5) != 0) |
7347 | 0 | break; |
7348 | 0 | return MCK_memh_95_fifo; // "memh_fifo" |
7349 | 0 | case 'w': // 1 string to match. |
7350 | 0 | if (memcmp(Name.data()+4, "_phys", 5) != 0) |
7351 | 0 | break; |
7352 | 0 | return MCK_memw_95_phys; // "memw_phys" |
7353 | 0 | } |
7354 | 0 | break; |
7355 | 0 | case 'p': // 1 string to match. |
7356 | 0 | if (memcmp(Name.data()+1, "refixsum", 8) != 0) |
7357 | 0 | break; |
7358 | 0 | return MCK_prefixsum; // "prefixsum" |
7359 | 0 | case 't': // 6 strings to match. |
7360 | 0 | switch (Name[1]) { |
7361 | 0 | default: break; |
7362 | 0 | case 'a': // 4 strings to match. |
7363 | 0 | if (memcmp(Name.data()+2, "bleidx", 6) != 0) |
7364 | 0 | break; |
7365 | 0 | switch (Name[8]) { |
7366 | 0 | default: break; |
7367 | 0 | case 'b': // 1 string to match. |
7368 | 0 | return MCK_tableidxb; // "tableidxb" |
7369 | 0 | case 'd': // 1 string to match. |
7370 | 0 | return MCK_tableidxd; // "tableidxd" |
7371 | 0 | case 'h': // 1 string to match. |
7372 | 0 | return MCK_tableidxh; // "tableidxh" |
7373 | 0 | case 'w': // 1 string to match. |
7374 | 0 | return MCK_tableidxw; // "tableidxw" |
7375 | 0 | } |
7376 | 0 | break; |
7377 | 0 | case 'l': // 1 string to match. |
7378 | 0 | if (memcmp(Name.data()+2, "bunlock", 7) != 0) |
7379 | 0 | break; |
7380 | 0 | return MCK_tlbunlock; // "tlbunlock" |
7381 | 0 | case 'o': // 1 string to match. |
7382 | 0 | if (memcmp(Name.data()+2, "gglebit", 7) != 0) |
7383 | 0 | break; |
7384 | 0 | return MCK_togglebit; // "togglebit" |
7385 | 0 | } |
7386 | 0 | break; |
7387 | 0 | case 'v': // 24 strings to match. |
7388 | 0 | switch (Name[1]) { |
7389 | 0 | default: break; |
7390 | 0 | case 'a': // 3 strings to match. |
7391 | 0 | if (memcmp(Name.data()+2, "bsdiff", 6) != 0) |
7392 | 0 | break; |
7393 | 0 | switch (Name[8]) { |
7394 | 0 | default: break; |
7395 | 0 | case 'b': // 1 string to match. |
7396 | 0 | return MCK_vabsdiffb; // "vabsdiffb" |
7397 | 0 | case 'h': // 1 string to match. |
7398 | 0 | return MCK_vabsdiffh; // "vabsdiffh" |
7399 | 0 | case 'w': // 1 string to match. |
7400 | 0 | return MCK_vabsdiffw; // "vabsdiffw" |
7401 | 0 | } |
7402 | 0 | break; |
7403 | 0 | case 'm': // 1 string to match. |
7404 | 0 | if (memcmp(Name.data()+2, "pyiewuh", 7) != 0) |
7405 | 0 | break; |
7406 | 0 | return MCK_vmpyiewuh; // "vmpyiewuh" |
7407 | 0 | case 'n': // 2 strings to match. |
7408 | 0 | if (memcmp(Name.data()+2, "ormamt", 6) != 0) |
7409 | 0 | break; |
7410 | 0 | switch (Name[8]) { |
7411 | 0 | default: break; |
7412 | 0 | case 'h': // 1 string to match. |
7413 | 0 | return MCK_vnormamth; // "vnormamth" |
7414 | 0 | case 'w': // 1 string to match. |
7415 | 0 | return MCK_vnormamtw; // "vnormamtw" |
7416 | 0 | } |
7417 | 0 | break; |
7418 | 0 | case 'p': // 1 string to match. |
7419 | 0 | if (memcmp(Name.data()+2, "opcount", 7) != 0) |
7420 | 0 | break; |
7421 | 0 | return MCK_vpopcount; // "vpopcount" |
7422 | 0 | case 'r': // 4 strings to match. |
7423 | 0 | switch (Name[2]) { |
7424 | 0 | default: break; |
7425 | 0 | case '1': // 1 string to match. |
7426 | 0 | if (memcmp(Name.data()+3, "6mpyzs", 6) != 0) |
7427 | 0 | break; |
7428 | 0 | return MCK_vr16mpyzs; // "vr16mpyzs" |
7429 | 0 | case 'c': // 1 string to match. |
7430 | 0 | if (memcmp(Name.data()+3, "rotate", 6) != 0) |
7431 | 0 | break; |
7432 | 0 | return MCK_vrcrotate; // "vrcrotate" |
7433 | 0 | case 'o': // 2 strings to match. |
7434 | 0 | if (memcmp(Name.data()+3, "und", 3) != 0) |
7435 | 0 | break; |
7436 | 0 | switch (Name[6]) { |
7437 | 0 | default: break; |
7438 | 0 | case 'h': // 1 string to match. |
7439 | 0 | if (memcmp(Name.data()+7, "ub", 2) != 0) |
7440 | 0 | break; |
7441 | 0 | return MCK_vroundhub; // "vroundhub" |
7442 | 0 | case 'w': // 1 string to match. |
7443 | 0 | if (memcmp(Name.data()+7, "uh", 2) != 0) |
7444 | 0 | break; |
7445 | 0 | return MCK_vroundwuh; // "vroundwuh" |
7446 | 0 | } |
7447 | 0 | break; |
7448 | 0 | } |
7449 | 0 | break; |
7450 | 0 | case 's': // 2 strings to match. |
7451 | 0 | if (memcmp(Name.data()+2, "huffoe", 6) != 0) |
7452 | 0 | break; |
7453 | 0 | switch (Name[8]) { |
7454 | 0 | default: break; |
7455 | 0 | case 'b': // 1 string to match. |
7456 | 0 | return MCK_vshuffoeb; // "vshuffoeb" |
7457 | 0 | case 'h': // 1 string to match. |
7458 | 0 | return MCK_vshuffoeh; // "vshuffoeh" |
7459 | 0 | } |
7460 | 0 | break; |
7461 | 0 | case 't': // 1 string to match. |
7462 | 0 | if (memcmp(Name.data()+2, "rans2x2", 7) != 0) |
7463 | 0 | break; |
7464 | 0 | return MCK_vtrans2x2; // "vtrans2x2" |
7465 | 0 | case 'u': // 4 strings to match. |
7466 | 0 | if (memcmp(Name.data()+2, "npack", 5) != 0) |
7467 | 0 | break; |
7468 | 0 | switch (Name[7]) { |
7469 | 0 | default: break; |
7470 | 0 | case 'o': // 2 strings to match. |
7471 | 0 | switch (Name[8]) { |
7472 | 0 | default: break; |
7473 | 0 | case 'b': // 1 string to match. |
7474 | 0 | return MCK_vunpackob; // "vunpackob" |
7475 | 0 | case 'h': // 1 string to match. |
7476 | 0 | return MCK_vunpackoh; // "vunpackoh" |
7477 | 0 | } |
7478 | 0 | break; |
7479 | 0 | case 'u': // 2 strings to match. |
7480 | 0 | switch (Name[8]) { |
7481 | 0 | default: break; |
7482 | 0 | case 'b': // 1 string to match. |
7483 | 0 | return MCK_vunpackub; // "vunpackub" |
7484 | 0 | case 'h': // 1 string to match. |
7485 | 0 | return MCK_vunpackuh; // "vunpackuh" |
7486 | 0 | } |
7487 | 0 | break; |
7488 | 0 | } |
7489 | 0 | break; |
7490 | 0 | case 'w': // 2 strings to match. |
7491 | 0 | if (memcmp(Name.data()+2, "hist", 4) != 0) |
7492 | 0 | break; |
7493 | 0 | switch (Name[6]) { |
7494 | 0 | default: break; |
7495 | 0 | case '1': // 1 string to match. |
7496 | 0 | if (memcmp(Name.data()+7, "28", 2) != 0) |
7497 | 0 | break; |
7498 | 0 | return MCK_vwhist128; // "vwhist128" |
7499 | 0 | case '2': // 1 string to match. |
7500 | 0 | if (memcmp(Name.data()+7, "56", 2) != 0) |
7501 | 0 | break; |
7502 | 0 | return MCK_vwhist256; // "vwhist256" |
7503 | 0 | } |
7504 | 0 | break; |
7505 | 0 | case 'x': // 4 strings to match. |
7506 | 0 | switch (Name[2]) { |
7507 | 0 | default: break; |
7508 | 0 | case 'a': // 2 strings to match. |
7509 | 0 | if (memcmp(Name.data()+3, "ddsub", 5) != 0) |
7510 | 0 | break; |
7511 | 0 | switch (Name[8]) { |
7512 | 0 | default: break; |
7513 | 0 | case 'h': // 1 string to match. |
7514 | 0 | return MCK_vxaddsubh; // "vxaddsubh" |
7515 | 0 | case 'w': // 1 string to match. |
7516 | 0 | return MCK_vxaddsubw; // "vxaddsubw" |
7517 | 0 | } |
7518 | 0 | break; |
7519 | 0 | case 's': // 2 strings to match. |
7520 | 0 | if (memcmp(Name.data()+3, "ubadd", 5) != 0) |
7521 | 0 | break; |
7522 | 0 | switch (Name[8]) { |
7523 | 0 | default: break; |
7524 | 0 | case 'h': // 1 string to match. |
7525 | 0 | return MCK_vxsubaddh; // "vxsubaddh" |
7526 | 0 | case 'w': // 1 string to match. |
7527 | 0 | return MCK_vxsubaddw; // "vxsubaddw" |
7528 | 0 | } |
7529 | 0 | break; |
7530 | 0 | } |
7531 | 0 | break; |
7532 | 0 | } |
7533 | 0 | break; |
7534 | 0 | } |
7535 | 0 | break; |
7536 | 0 | case 10: // 12 strings to match. |
7537 | 0 | switch (Name[0]) { |
7538 | 0 | default: break; |
7539 | 0 | case 'a': // 1 string to match. |
7540 | 0 | if (memcmp(Name.data()+1, "llocframe", 9) != 0) |
7541 | 0 | break; |
7542 | 0 | return MCK_allocframe; // "allocframe" |
7543 | 0 | case 'd': // 2 strings to match. |
7544 | 0 | switch (Name[1]) { |
7545 | 0 | default: break; |
7546 | 0 | case 'c': // 1 string to match. |
7547 | 0 | if (memcmp(Name.data()+2, "cleanidx", 8) != 0) |
7548 | 0 | break; |
7549 | 0 | return MCK_dccleanidx; // "dccleanidx" |
7550 | 0 | case 'e': // 1 string to match. |
7551 | 0 | if (memcmp(Name.data()+2, "precated", 8) != 0) |
7552 | 0 | break; |
7553 | 0 | return MCK_deprecated; // "deprecated" |
7554 | 0 | } |
7555 | 0 | break; |
7556 | 0 | case 'i': // 1 string to match. |
7557 | 0 | if (memcmp(Name.data()+1, "nterleave", 9) != 0) |
7558 | 0 | break; |
7559 | 0 | return MCK_interleave; // "interleave" |
7560 | 0 | case 'l': // 1 string to match. |
7561 | 0 | if (memcmp(Name.data()+1, "2cleanidx", 9) != 0) |
7562 | 0 | break; |
7563 | 0 | return MCK_l2cleanidx; // "l2cleanidx" |
7564 | 0 | case 's': // 1 string to match. |
7565 | 0 | if (memcmp(Name.data()+1, "finvsqrta", 9) != 0) |
7566 | 0 | break; |
7567 | 0 | return MCK_sfinvsqrta; // "sfinvsqrta" |
7568 | 0 | case 't': // 1 string to match. |
7569 | 0 | if (memcmp(Name.data()+1, "lbinvasid", 9) != 0) |
7570 | 0 | break; |
7571 | 0 | return MCK_tlbinvasid; // "tlbinvasid" |
7572 | 0 | case 'v': // 5 strings to match. |
7573 | 0 | switch (Name[1]) { |
7574 | 0 | default: break; |
7575 | 0 | case 'a': // 2 strings to match. |
7576 | 0 | if (memcmp(Name.data()+2, "bsdiffu", 7) != 0) |
7577 | 0 | break; |
7578 | 0 | switch (Name[9]) { |
7579 | 0 | default: break; |
7580 | 0 | case 'b': // 1 string to match. |
7581 | 0 | return MCK_vabsdiffub; // "vabsdiffub" |
7582 | 0 | case 'h': // 1 string to match. |
7583 | 0 | return MCK_vabsdiffuh; // "vabsdiffuh" |
7584 | 0 | } |
7585 | 0 | break; |
7586 | 0 | case 'p': // 1 string to match. |
7587 | 0 | if (memcmp(Name.data()+2, "opcounth", 8) != 0) |
7588 | 0 | break; |
7589 | 0 | return MCK_vpopcounth; // "vpopcounth" |
7590 | 0 | case 'r': // 2 strings to match. |
7591 | 0 | if (memcmp(Name.data()+2, "oundu", 5) != 0) |
7592 | 0 | break; |
7593 | 0 | switch (Name[7]) { |
7594 | 0 | default: break; |
7595 | 0 | case 'h': // 1 string to match. |
7596 | 0 | if (memcmp(Name.data()+8, "ub", 2) != 0) |
7597 | 0 | break; |
7598 | 0 | return MCK_vrounduhub; // "vrounduhub" |
7599 | 0 | case 'w': // 1 string to match. |
7600 | 0 | if (memcmp(Name.data()+8, "uh", 2) != 0) |
7601 | 0 | break; |
7602 | 0 | return MCK_vrounduwuh; // "vrounduwuh" |
7603 | 0 | } |
7604 | 0 | break; |
7605 | 0 | } |
7606 | 0 | break; |
7607 | 0 | } |
7608 | 0 | break; |
7609 | 0 | case 11: // 6 strings to match. |
7610 | 0 | switch (Name[0]) { |
7611 | 0 | default: break; |
7612 | 0 | case 'b': // 1 string to match. |
7613 | 0 | if (memcmp(Name.data()+1, "oundscheck", 10) != 0) |
7614 | 0 | break; |
7615 | 0 | return MCK_boundscheck; // "boundscheck" |
7616 | 0 | case 'd': // 1 string to match. |
7617 | 0 | if (memcmp(Name.data()+1, "ccleaninva", 10) != 0) |
7618 | 0 | break; |
7619 | 0 | return MCK_dccleaninva; // "dccleaninva" |
7620 | 0 | case 'f': // 1 string to match. |
7621 | 0 | if (memcmp(Name.data()+1, "astcorner9", 10) != 0) |
7622 | 0 | break; |
7623 | 0 | return MCK_fastcorner9; // "fastcorner9" |
7624 | 0 | case 'l': // 1 string to match. |
7625 | 0 | if (memcmp(Name.data()+1, "2gcleaninv", 10) != 0) |
7626 | 0 | break; |
7627 | 0 | return MCK_l2gcleaninv; // "l2gcleaninv" |
7628 | 0 | case 'm': // 2 strings to match. |
7629 | 0 | if (memcmp(Name.data()+1, "em", 2) != 0) |
7630 | 0 | break; |
7631 | 0 | switch (Name[3]) { |
7632 | 0 | default: break; |
7633 | 0 | case 'd': // 1 string to match. |
7634 | 0 | if (memcmp(Name.data()+4, "_locked", 7) != 0) |
7635 | 0 | break; |
7636 | 0 | return MCK_memd_95_locked; // "memd_locked" |
7637 | 0 | case 'w': // 1 string to match. |
7638 | 0 | if (memcmp(Name.data()+4, "_locked", 7) != 0) |
7639 | 0 | break; |
7640 | 0 | return MCK_memw_95_locked; // "memw_locked" |
7641 | 0 | } |
7642 | 0 | break; |
7643 | 0 | } |
7644 | 0 | break; |
7645 | 0 | case 12: // 10 strings to match. |
7646 | 0 | switch (Name[0]) { |
7647 | 0 | default: break; |
7648 | 0 | case 'c': // 8 strings to match. |
7649 | 0 | if (memcmp(Name.data()+1, "onvert_", 7) != 0) |
7650 | 0 | break; |
7651 | 0 | switch (Name[8]) { |
7652 | 0 | default: break; |
7653 | 0 | case 'd': // 4 strings to match. |
7654 | 0 | switch (Name[9]) { |
7655 | 0 | default: break; |
7656 | 0 | case '2': // 2 strings to match. |
7657 | 0 | switch (Name[10]) { |
7658 | 0 | default: break; |
7659 | 0 | case 'd': // 1 string to match. |
7660 | 0 | if (Name[11] != 'f') |
7661 | 0 | break; |
7662 | 0 | return MCK_convert_95_d2df; // "convert_d2df" |
7663 | 0 | case 's': // 1 string to match. |
7664 | 0 | if (Name[11] != 'f') |
7665 | 0 | break; |
7666 | 0 | return MCK_convert_95_d2sf; // "convert_d2sf" |
7667 | 0 | } |
7668 | 0 | break; |
7669 | 0 | case 'f': // 2 strings to match. |
7670 | 0 | if (Name[10] != '2') |
7671 | 0 | break; |
7672 | 0 | switch (Name[11]) { |
7673 | 0 | default: break; |
7674 | 0 | case 'd': // 1 string to match. |
7675 | 0 | return MCK_convert_95_df2d; // "convert_df2d" |
7676 | 0 | case 'w': // 1 string to match. |
7677 | 0 | return MCK_convert_95_df2w; // "convert_df2w" |
7678 | 0 | } |
7679 | 0 | break; |
7680 | 0 | } |
7681 | 0 | break; |
7682 | 0 | case 's': // 2 strings to match. |
7683 | 0 | if (memcmp(Name.data()+9, "f2", 2) != 0) |
7684 | 0 | break; |
7685 | 0 | switch (Name[11]) { |
7686 | 0 | default: break; |
7687 | 0 | case 'd': // 1 string to match. |
7688 | 0 | return MCK_convert_95_sf2d; // "convert_sf2d" |
7689 | 0 | case 'w': // 1 string to match. |
7690 | 0 | return MCK_convert_95_sf2w; // "convert_sf2w" |
7691 | 0 | } |
7692 | 0 | break; |
7693 | 0 | case 'w': // 2 strings to match. |
7694 | 0 | if (Name[9] != '2') |
7695 | 0 | break; |
7696 | 0 | switch (Name[10]) { |
7697 | 0 | default: break; |
7698 | 0 | case 'd': // 1 string to match. |
7699 | 0 | if (Name[11] != 'f') |
7700 | 0 | break; |
7701 | 0 | return MCK_convert_95_w2df; // "convert_w2df" |
7702 | 0 | case 's': // 1 string to match. |
7703 | 0 | if (Name[11] != 'f') |
7704 | 0 | break; |
7705 | 0 | return MCK_convert_95_w2sf; // "convert_w2sf" |
7706 | 0 | } |
7707 | 0 | break; |
7708 | 0 | } |
7709 | 0 | break; |
7710 | 0 | case 'd': // 2 strings to match. |
7711 | 0 | if (Name[1] != 'e') |
7712 | 0 | break; |
7713 | 0 | switch (Name[2]) { |
7714 | 0 | default: break; |
7715 | 0 | case 'a': // 1 string to match. |
7716 | 0 | if (memcmp(Name.data()+3, "llocframe", 9) != 0) |
7717 | 0 | break; |
7718 | 0 | return MCK_deallocframe; // "deallocframe" |
7719 | 0 | case 'i': // 1 string to match. |
7720 | 0 | if (memcmp(Name.data()+3, "nterleave", 9) != 0) |
7721 | 0 | break; |
7722 | 0 | return MCK_deinterleave; // "deinterleave" |
7723 | 0 | } |
7724 | 0 | break; |
7725 | 0 | } |
7726 | 0 | break; |
7727 | 0 | case 13: // 12 strings to match. |
7728 | 0 | switch (Name[0]) { |
7729 | 0 | default: break; |
7730 | 0 | case 'c': // 10 strings to match. |
7731 | 0 | if (memcmp(Name.data()+1, "onvert_", 7) != 0) |
7732 | 0 | break; |
7733 | 0 | switch (Name[8]) { |
7734 | 0 | default: break; |
7735 | 0 | case 'd': // 3 strings to match. |
7736 | 0 | if (memcmp(Name.data()+9, "f2", 2) != 0) |
7737 | 0 | break; |
7738 | 0 | switch (Name[11]) { |
7739 | 0 | default: break; |
7740 | 0 | case 's': // 1 string to match. |
7741 | 0 | if (Name[12] != 'f') |
7742 | 0 | break; |
7743 | 0 | return MCK_convert_95_df2sf; // "convert_df2sf" |
7744 | 0 | case 'u': // 2 strings to match. |
7745 | 0 | switch (Name[12]) { |
7746 | 0 | default: break; |
7747 | 0 | case 'd': // 1 string to match. |
7748 | 0 | return MCK_convert_95_df2ud; // "convert_df2ud" |
7749 | 0 | case 'w': // 1 string to match. |
7750 | 0 | return MCK_convert_95_df2uw; // "convert_df2uw" |
7751 | 0 | } |
7752 | 0 | break; |
7753 | 0 | } |
7754 | 0 | break; |
7755 | 0 | case 's': // 3 strings to match. |
7756 | 0 | if (memcmp(Name.data()+9, "f2", 2) != 0) |
7757 | 0 | break; |
7758 | 0 | switch (Name[11]) { |
7759 | 0 | default: break; |
7760 | 0 | case 'd': // 1 string to match. |
7761 | 0 | if (Name[12] != 'f') |
7762 | 0 | break; |
7763 | 0 | return MCK_convert_95_sf2df; // "convert_sf2df" |
7764 | 0 | case 'u': // 2 strings to match. |
7765 | 0 | switch (Name[12]) { |
7766 | 0 | default: break; |
7767 | 0 | case 'd': // 1 string to match. |
7768 | 0 | return MCK_convert_95_sf2ud; // "convert_sf2ud" |
7769 | 0 | case 'w': // 1 string to match. |
7770 | 0 | return MCK_convert_95_sf2uw; // "convert_sf2uw" |
7771 | 0 | } |
7772 | 0 | break; |
7773 | 0 | } |
7774 | 0 | break; |
7775 | 0 | case 'u': // 4 strings to match. |
7776 | 0 | switch (Name[9]) { |
7777 | 0 | default: break; |
7778 | 0 | case 'd': // 2 strings to match. |
7779 | 0 | if (Name[10] != '2') |
7780 | 0 | break; |
7781 | 0 | switch (Name[11]) { |
7782 | 0 | default: break; |
7783 | 0 | case 'd': // 1 string to match. |
7784 | 0 | if (Name[12] != 'f') |
7785 | 0 | break; |
7786 | 0 | return MCK_convert_95_ud2df; // "convert_ud2df" |
7787 | 0 | case 's': // 1 string to match. |
7788 | 0 | if (Name[12] != 'f') |
7789 | 0 | break; |
7790 | 0 | return MCK_convert_95_ud2sf; // "convert_ud2sf" |
7791 | 0 | } |
7792 | 0 | break; |
7793 | 0 | case 'w': // 2 strings to match. |
7794 | 0 | if (Name[10] != '2') |
7795 | 0 | break; |
7796 | 0 | switch (Name[11]) { |
7797 | 0 | default: break; |
7798 | 0 | case 'd': // 1 string to match. |
7799 | 0 | if (Name[12] != 'f') |
7800 | 0 | break; |
7801 | 0 | return MCK_convert_95_uw2df; // "convert_uw2df" |
7802 | 0 | case 's': // 1 string to match. |
7803 | 0 | if (Name[12] != 'f') |
7804 | 0 | break; |
7805 | 0 | return MCK_convert_95_uw2sf; // "convert_uw2sf" |
7806 | 0 | } |
7807 | 0 | break; |
7808 | 0 | } |
7809 | 0 | break; |
7810 | 0 | } |
7811 | 0 | break; |
7812 | 0 | case 'd': // 1 string to match. |
7813 | 0 | if (memcmp(Name.data()+1, "ccleaninvidx", 12) != 0) |
7814 | 0 | break; |
7815 | 0 | return MCK_dccleaninvidx; // "dccleaninvidx" |
7816 | 0 | case 'l': // 1 string to match. |
7817 | 0 | if (memcmp(Name.data()+1, "2cleaninvidx", 12) != 0) |
7818 | 0 | break; |
7819 | 0 | return MCK_l2cleaninvidx; // "l2cleaninvidx" |
7820 | 0 | } |
7821 | 0 | break; |
7822 | 0 | case 14: // 1 string to match. |
7823 | 0 | if (memcmp(Name.data()+0, "dealloc_return", 14) != 0) |
7824 | 0 | break; |
7825 | 0 | return MCK_dealloc_95_return; // "dealloc_return" |
7826 | 0 | case 15: // 1 string to match. |
7827 | 0 | if (memcmp(Name.data()+0, "scatter_release", 15) != 0) |
7828 | 0 | break; |
7829 | 0 | return MCK_scatter_95_release; // "scatter_release" |
7830 | 0 | } |
7831 | 0 | return InvalidMatchClass; |
7832 | 0 | } |
7833 | | |
7834 | | /// isSubclass - Compute whether \p A is a subclass of \p B. |
7835 | 0 | static bool isSubclass(MatchClassKind A, MatchClassKind B) { |
7836 | 0 | if (A == B) |
7837 | 0 | return true; |
7838 | | |
7839 | 0 | switch (A) { |
7840 | 0 | default: |
7841 | 0 | return false; |
7842 | | |
7843 | 0 | case MCK_Reg19: |
7844 | 0 | return B == MCK_CtrRegs64; |
7845 | | |
7846 | 0 | case MCK_Reg11: |
7847 | 0 | return B == MCK_CtrRegs; |
7848 | | |
7849 | 0 | case MCK_DIAG: |
7850 | 0 | return B == MCK_SysRegs; |
7851 | | |
7852 | 0 | case MCK_GP: |
7853 | 0 | return B == MCK_CtrRegs; |
7854 | | |
7855 | 0 | case MCK_P0: |
7856 | 0 | return B == MCK_PredRegs; |
7857 | | |
7858 | 0 | case MCK_P1: |
7859 | 0 | return B == MCK_PredRegs; |
7860 | | |
7861 | 0 | case MCK_P3: |
7862 | 0 | return B == MCK_PredRegs; |
7863 | | |
7864 | 0 | case MCK_PC: |
7865 | 0 | return B == MCK_CtrRegs; |
7866 | | |
7867 | 0 | case MCK_SGP0: |
7868 | 0 | return B == MCK_SysRegs; |
7869 | | |
7870 | 0 | case MCK_SGP1: |
7871 | 0 | return B == MCK_SysRegs; |
7872 | | |
7873 | 0 | case MCK_V65Regs: |
7874 | 0 | return B == MCK_HvxVR; |
7875 | | |
7876 | 0 | case MCK_ModRegs: |
7877 | 0 | return B == MCK_CtrRegs; |
7878 | | |
7879 | 0 | case MCK_Reg20: |
7880 | 0 | switch (B) { |
7881 | 0 | default: return false; |
7882 | 0 | case MCK_V62Regs: return true; |
7883 | 0 | case MCK_CtrRegs64: return true; |
7884 | 0 | } |
7885 | | |
7886 | 0 | case MCK_Reg3: |
7887 | 0 | switch (B) { |
7888 | 0 | default: return false; |
7889 | 0 | case MCK_GeneralDoubleLow8Regs: return true; |
7890 | 0 | case MCK_DoubleRegs: return true; |
7891 | 0 | } |
7892 | | |
7893 | 0 | case MCK_Reg16: |
7894 | 0 | switch (B) { |
7895 | 0 | default: return false; |
7896 | 0 | case MCK_V62Regs: return true; |
7897 | 0 | case MCK_CtrRegs: return true; |
7898 | 0 | } |
7899 | | |
7900 | 0 | case MCK_GeneralDoubleLow8Regs: |
7901 | 0 | return B == MCK_DoubleRegs; |
7902 | | |
7903 | 0 | case MCK_IntRegsLow8: |
7904 | 0 | switch (B) { |
7905 | 0 | default: return false; |
7906 | 0 | case MCK_GeneralSubRegs: return true; |
7907 | 0 | case MCK_IntRegs: return true; |
7908 | 0 | } |
7909 | | |
7910 | 0 | case MCK_GeneralSubRegs: |
7911 | 0 | return B == MCK_IntRegs; |
7912 | | |
7913 | 0 | case MCK_VectRegRev: |
7914 | 0 | return B == MCK_HvxWR; |
7915 | 0 | } |
7916 | 0 | } |
7917 | | |
7918 | 0 | static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) { |
7919 | 0 | HexagonOperand &Operand = (HexagonOperand &)GOp; |
7920 | 0 | if (Kind == InvalidMatchClass) |
7921 | 0 | return MCTargetAsmParser::Match_InvalidOperand; |
7922 | | |
7923 | 0 | if (Operand.isToken() && Kind <= MCK_LAST_TOKEN) |
7924 | 0 | return isSubclass(matchTokenString(Operand.getToken()), Kind) ? |
7925 | 0 | MCTargetAsmParser::Match_Success : |
7926 | 0 | MCTargetAsmParser::Match_InvalidOperand; |
7927 | | |
7928 | 0 | switch (Kind) { |
7929 | 0 | default: break; |
7930 | | // 'Imm' class |
7931 | 0 | case MCK_Imm: { |
7932 | 0 | DiagnosticPredicate DP(Operand.isImm()); |
7933 | 0 | if (DP.isMatch()) |
7934 | 0 | return MCTargetAsmParser::Match_Success; |
7935 | 0 | break; |
7936 | 0 | } |
7937 | | // 'a30_2Imm' class |
7938 | 0 | case MCK_a30_2Imm: { |
7939 | 0 | DiagnosticPredicate DP(Operand.isa30_2Imm()); |
7940 | 0 | if (DP.isMatch()) |
7941 | 0 | return MCTargetAsmParser::Match_Success; |
7942 | 0 | break; |
7943 | 0 | } |
7944 | | // 'b13_2Imm' class |
7945 | 0 | case MCK_b13_2Imm: { |
7946 | 0 | DiagnosticPredicate DP(Operand.isb13_2Imm()); |
7947 | 0 | if (DP.isMatch()) |
7948 | 0 | return MCTargetAsmParser::Match_Success; |
7949 | 0 | break; |
7950 | 0 | } |
7951 | | // 'b15_2Imm' class |
7952 | 0 | case MCK_b15_2Imm: { |
7953 | 0 | DiagnosticPredicate DP(Operand.isb15_2Imm()); |
7954 | 0 | if (DP.isMatch()) |
7955 | 0 | return MCTargetAsmParser::Match_Success; |
7956 | 0 | break; |
7957 | 0 | } |
7958 | | // 'b30_2Imm' class |
7959 | 0 | case MCK_b30_2Imm: { |
7960 | 0 | DiagnosticPredicate DP(Operand.isb30_2Imm()); |
7961 | 0 | if (DP.isMatch()) |
7962 | 0 | return MCTargetAsmParser::Match_Success; |
7963 | 0 | break; |
7964 | 0 | } |
7965 | | // 'f32Imm' class |
7966 | 0 | case MCK_f32Imm: { |
7967 | 0 | DiagnosticPredicate DP(Operand.isf32Imm()); |
7968 | 0 | if (DP.isMatch()) |
7969 | 0 | return MCTargetAsmParser::Match_Success; |
7970 | 0 | break; |
7971 | 0 | } |
7972 | | // 'f64Imm' class |
7973 | 0 | case MCK_f64Imm: { |
7974 | 0 | DiagnosticPredicate DP(Operand.isf64Imm()); |
7975 | 0 | if (DP.isMatch()) |
7976 | 0 | return MCTargetAsmParser::Match_Success; |
7977 | 0 | break; |
7978 | 0 | } |
7979 | | // 'm32_0Imm' class |
7980 | 0 | case MCK_m32_0Imm: { |
7981 | 0 | DiagnosticPredicate DP(Operand.ism32_0Imm()); |
7982 | 0 | if (DP.isMatch()) |
7983 | 0 | return MCTargetAsmParser::Match_Success; |
7984 | 0 | break; |
7985 | 0 | } |
7986 | | // 'n1Const' class |
7987 | 0 | case MCK_n1Const: { |
7988 | 0 | DiagnosticPredicate DP(Operand.isn1Const()); |
7989 | 0 | if (DP.isMatch()) |
7990 | 0 | return MCTargetAsmParser::Match_Success; |
7991 | 0 | break; |
7992 | 0 | } |
7993 | | // 's27_2Imm' class |
7994 | 0 | case MCK_s27_2Imm: { |
7995 | 0 | DiagnosticPredicate DP(Operand.iss27_2Imm()); |
7996 | 0 | if (DP.isMatch()) |
7997 | 0 | return MCTargetAsmParser::Match_Success; |
7998 | 0 | break; |
7999 | 0 | } |
8000 | | // 's29_3Imm' class |
8001 | 0 | case MCK_s29_3Imm: { |
8002 | 0 | DiagnosticPredicate DP(Operand.iss29_3Imm()); |
8003 | 0 | if (DP.isMatch()) |
8004 | 0 | return MCTargetAsmParser::Match_Success; |
8005 | 0 | break; |
8006 | 0 | } |
8007 | | // 's30_2Imm' class |
8008 | 0 | case MCK_s30_2Imm: { |
8009 | 0 | DiagnosticPredicate DP(Operand.iss30_2Imm()); |
8010 | 0 | if (DP.isMatch()) |
8011 | 0 | return MCTargetAsmParser::Match_Success; |
8012 | 0 | break; |
8013 | 0 | } |
8014 | | // 's31_1Imm' class |
8015 | 0 | case MCK_s31_1Imm: { |
8016 | 0 | DiagnosticPredicate DP(Operand.iss31_1Imm()); |
8017 | 0 | if (DP.isMatch()) |
8018 | 0 | return MCTargetAsmParser::Match_Success; |
8019 | 0 | break; |
8020 | 0 | } |
8021 | | // 's32_0Imm' class |
8022 | 0 | case MCK_s32_0Imm: { |
8023 | 0 | DiagnosticPredicate DP(Operand.iss32_0Imm()); |
8024 | 0 | if (DP.isMatch()) |
8025 | 0 | return MCTargetAsmParser::Match_Success; |
8026 | 0 | break; |
8027 | 0 | } |
8028 | | // 's3_0Imm' class |
8029 | 0 | case MCK_s3_0Imm: { |
8030 | 0 | DiagnosticPredicate DP(Operand.iss3_0Imm()); |
8031 | 0 | if (DP.isMatch()) |
8032 | 0 | return MCTargetAsmParser::Match_Success; |
8033 | 0 | break; |
8034 | 0 | } |
8035 | | // 's4_0Imm' class |
8036 | 0 | case MCK_s4_0Imm: { |
8037 | 0 | DiagnosticPredicate DP(Operand.iss4_0Imm()); |
8038 | 0 | if (DP.isMatch()) |
8039 | 0 | return MCTargetAsmParser::Match_Success; |
8040 | 0 | break; |
8041 | 0 | } |
8042 | | // 's4_1Imm' class |
8043 | 0 | case MCK_s4_1Imm: { |
8044 | 0 | DiagnosticPredicate DP(Operand.iss4_1Imm()); |
8045 | 0 | if (DP.isMatch()) |
8046 | 0 | return MCTargetAsmParser::Match_Success; |
8047 | 0 | break; |
8048 | 0 | } |
8049 | | // 's4_2Imm' class |
8050 | 0 | case MCK_s4_2Imm: { |
8051 | 0 | DiagnosticPredicate DP(Operand.iss4_2Imm()); |
8052 | 0 | if (DP.isMatch()) |
8053 | 0 | return MCTargetAsmParser::Match_Success; |
8054 | 0 | break; |
8055 | 0 | } |
8056 | | // 's4_3Imm' class |
8057 | 0 | case MCK_s4_3Imm: { |
8058 | 0 | DiagnosticPredicate DP(Operand.iss4_3Imm()); |
8059 | 0 | if (DP.isMatch()) |
8060 | 0 | return MCTargetAsmParser::Match_Success; |
8061 | 0 | break; |
8062 | 0 | } |
8063 | | // 's6_0Imm' class |
8064 | 0 | case MCK_s6_0Imm: { |
8065 | 0 | DiagnosticPredicate DP(Operand.iss6_0Imm()); |
8066 | 0 | if (DP.isMatch()) |
8067 | 0 | return MCTargetAsmParser::Match_Success; |
8068 | 0 | break; |
8069 | 0 | } |
8070 | | // 's6_3Imm' class |
8071 | 0 | case MCK_s6_3Imm: { |
8072 | 0 | DiagnosticPredicate DP(Operand.iss6_3Imm()); |
8073 | 0 | if (DP.isMatch()) |
8074 | 0 | return MCTargetAsmParser::Match_Success; |
8075 | 0 | break; |
8076 | 0 | } |
8077 | | // 's8_0Imm' class |
8078 | 0 | case MCK_s8_0Imm: { |
8079 | 0 | DiagnosticPredicate DP(Operand.iss8_0Imm()); |
8080 | 0 | if (DP.isMatch()) |
8081 | 0 | return MCTargetAsmParser::Match_Success; |
8082 | 0 | break; |
8083 | 0 | } |
8084 | | // 's9_0Imm' class |
8085 | 0 | case MCK_s9_0Imm: { |
8086 | 0 | DiagnosticPredicate DP(Operand.iss9_0Imm()); |
8087 | 0 | if (DP.isMatch()) |
8088 | 0 | return MCTargetAsmParser::Match_Success; |
8089 | 0 | break; |
8090 | 0 | } |
8091 | | // 'sgp10Const' class |
8092 | 0 | case MCK_sgp10Const: { |
8093 | 0 | DiagnosticPredicate DP(Operand.issgp10Const()); |
8094 | 0 | if (DP.isMatch()) |
8095 | 0 | return MCTargetAsmParser::Match_Success; |
8096 | 0 | break; |
8097 | 0 | } |
8098 | | // 'u10_0Imm' class |
8099 | 0 | case MCK_u10_0Imm: { |
8100 | 0 | DiagnosticPredicate DP(Operand.isu10_0Imm()); |
8101 | 0 | if (DP.isMatch()) |
8102 | 0 | return MCTargetAsmParser::Match_Success; |
8103 | 0 | break; |
8104 | 0 | } |
8105 | | // 'u11_3Imm' class |
8106 | 0 | case MCK_u11_3Imm: { |
8107 | 0 | DiagnosticPredicate DP(Operand.isu11_3Imm()); |
8108 | 0 | if (DP.isMatch()) |
8109 | 0 | return MCTargetAsmParser::Match_Success; |
8110 | 0 | break; |
8111 | 0 | } |
8112 | | // 'u16_0Imm' class |
8113 | 0 | case MCK_u16_0Imm: { |
8114 | 0 | DiagnosticPredicate DP(Operand.isu16_0Imm()); |
8115 | 0 | if (DP.isMatch()) |
8116 | 0 | return MCTargetAsmParser::Match_Success; |
8117 | 0 | break; |
8118 | 0 | } |
8119 | | // 'u1_0Imm' class |
8120 | 0 | case MCK_u1_0Imm: { |
8121 | 0 | DiagnosticPredicate DP(Operand.isu1_0Imm()); |
8122 | 0 | if (DP.isMatch()) |
8123 | 0 | return MCTargetAsmParser::Match_Success; |
8124 | 0 | break; |
8125 | 0 | } |
8126 | | // 'u26_6Imm' class |
8127 | 0 | case MCK_u26_6Imm: { |
8128 | 0 | DiagnosticPredicate DP(Operand.isu26_6Imm()); |
8129 | 0 | if (DP.isMatch()) |
8130 | 0 | return MCTargetAsmParser::Match_Success; |
8131 | 0 | break; |
8132 | 0 | } |
8133 | | // 'u29_3Imm' class |
8134 | 0 | case MCK_u29_3Imm: { |
8135 | 0 | DiagnosticPredicate DP(Operand.isu29_3Imm()); |
8136 | 0 | if (DP.isMatch()) |
8137 | 0 | return MCTargetAsmParser::Match_Success; |
8138 | 0 | break; |
8139 | 0 | } |
8140 | | // 'u2_0Imm' class |
8141 | 0 | case MCK_u2_0Imm: { |
8142 | 0 | DiagnosticPredicate DP(Operand.isu2_0Imm()); |
8143 | 0 | if (DP.isMatch()) |
8144 | 0 | return MCTargetAsmParser::Match_Success; |
8145 | 0 | break; |
8146 | 0 | } |
8147 | | // 'u30_2Imm' class |
8148 | 0 | case MCK_u30_2Imm: { |
8149 | 0 | DiagnosticPredicate DP(Operand.isu30_2Imm()); |
8150 | 0 | if (DP.isMatch()) |
8151 | 0 | return MCTargetAsmParser::Match_Success; |
8152 | 0 | break; |
8153 | 0 | } |
8154 | | // 'u31_1Imm' class |
8155 | 0 | case MCK_u31_1Imm: { |
8156 | 0 | DiagnosticPredicate DP(Operand.isu31_1Imm()); |
8157 | 0 | if (DP.isMatch()) |
8158 | 0 | return MCTargetAsmParser::Match_Success; |
8159 | 0 | break; |
8160 | 0 | } |
8161 | | // 'u32_0Imm' class |
8162 | 0 | case MCK_u32_0Imm: { |
8163 | 0 | DiagnosticPredicate DP(Operand.isu32_0Imm()); |
8164 | 0 | if (DP.isMatch()) |
8165 | 0 | return MCTargetAsmParser::Match_Success; |
8166 | 0 | break; |
8167 | 0 | } |
8168 | | // 'u3_0Imm' class |
8169 | 0 | case MCK_u3_0Imm: { |
8170 | 0 | DiagnosticPredicate DP(Operand.isu3_0Imm()); |
8171 | 0 | if (DP.isMatch()) |
8172 | 0 | return MCTargetAsmParser::Match_Success; |
8173 | 0 | break; |
8174 | 0 | } |
8175 | | // 'u3_1Imm' class |
8176 | 0 | case MCK_u3_1Imm: { |
8177 | 0 | DiagnosticPredicate DP(Operand.isu3_1Imm()); |
8178 | 0 | if (DP.isMatch()) |
8179 | 0 | return MCTargetAsmParser::Match_Success; |
8180 | 0 | break; |
8181 | 0 | } |
8182 | | // 'u4_0Imm' class |
8183 | 0 | case MCK_u4_0Imm: { |
8184 | 0 | DiagnosticPredicate DP(Operand.isu4_0Imm()); |
8185 | 0 | if (DP.isMatch()) |
8186 | 0 | return MCTargetAsmParser::Match_Success; |
8187 | 0 | break; |
8188 | 0 | } |
8189 | | // 'u4_2Imm' class |
8190 | 0 | case MCK_u4_2Imm: { |
8191 | 0 | DiagnosticPredicate DP(Operand.isu4_2Imm()); |
8192 | 0 | if (DP.isMatch()) |
8193 | 0 | return MCTargetAsmParser::Match_Success; |
8194 | 0 | break; |
8195 | 0 | } |
8196 | | // 'u5_0Imm' class |
8197 | 0 | case MCK_u5_0Imm: { |
8198 | 0 | DiagnosticPredicate DP(Operand.isu5_0Imm()); |
8199 | 0 | if (DP.isMatch()) |
8200 | 0 | return MCTargetAsmParser::Match_Success; |
8201 | 0 | break; |
8202 | 0 | } |
8203 | | // 'u5_2Imm' class |
8204 | 0 | case MCK_u5_2Imm: { |
8205 | 0 | DiagnosticPredicate DP(Operand.isu5_2Imm()); |
8206 | 0 | if (DP.isMatch()) |
8207 | 0 | return MCTargetAsmParser::Match_Success; |
8208 | 0 | break; |
8209 | 0 | } |
8210 | | // 'u5_3Imm' class |
8211 | 0 | case MCK_u5_3Imm: { |
8212 | 0 | DiagnosticPredicate DP(Operand.isu5_3Imm()); |
8213 | 0 | if (DP.isMatch()) |
8214 | 0 | return MCTargetAsmParser::Match_Success; |
8215 | 0 | break; |
8216 | 0 | } |
8217 | | // 'u64_0Imm' class |
8218 | 0 | case MCK_u64_0Imm: { |
8219 | 0 | DiagnosticPredicate DP(Operand.isu64_0Imm()); |
8220 | 0 | if (DP.isMatch()) |
8221 | 0 | return MCTargetAsmParser::Match_Success; |
8222 | 0 | break; |
8223 | 0 | } |
8224 | | // 'u6_0Imm' class |
8225 | 0 | case MCK_u6_0Imm: { |
8226 | 0 | DiagnosticPredicate DP(Operand.isu6_0Imm()); |
8227 | 0 | if (DP.isMatch()) |
8228 | 0 | return MCTargetAsmParser::Match_Success; |
8229 | 0 | break; |
8230 | 0 | } |
8231 | | // 'u6_1Imm' class |
8232 | 0 | case MCK_u6_1Imm: { |
8233 | 0 | DiagnosticPredicate DP(Operand.isu6_1Imm()); |
8234 | 0 | if (DP.isMatch()) |
8235 | 0 | return MCTargetAsmParser::Match_Success; |
8236 | 0 | break; |
8237 | 0 | } |
8238 | | // 'u6_2Imm' class |
8239 | 0 | case MCK_u6_2Imm: { |
8240 | 0 | DiagnosticPredicate DP(Operand.isu6_2Imm()); |
8241 | 0 | if (DP.isMatch()) |
8242 | 0 | return MCTargetAsmParser::Match_Success; |
8243 | 0 | break; |
8244 | 0 | } |
8245 | | // 'u7_0Imm' class |
8246 | 0 | case MCK_u7_0Imm: { |
8247 | 0 | DiagnosticPredicate DP(Operand.isu7_0Imm()); |
8248 | 0 | if (DP.isMatch()) |
8249 | 0 | return MCTargetAsmParser::Match_Success; |
8250 | 0 | break; |
8251 | 0 | } |
8252 | | // 'u8_0Imm' class |
8253 | 0 | case MCK_u8_0Imm: { |
8254 | 0 | DiagnosticPredicate DP(Operand.isu8_0Imm()); |
8255 | 0 | if (DP.isMatch()) |
8256 | 0 | return MCTargetAsmParser::Match_Success; |
8257 | 0 | break; |
8258 | 0 | } |
8259 | 0 | } // end switch (Kind) |
8260 | | |
8261 | 0 | if (Operand.isReg()) { |
8262 | 0 | MatchClassKind OpKind; |
8263 | 0 | switch (Operand.getReg()) { |
8264 | 0 | default: OpKind = InvalidMatchClass; break; |
8265 | 0 | case Hexagon::R0: OpKind = MCK_IntRegsLow8; break; |
8266 | 0 | case Hexagon::R1: OpKind = MCK_IntRegsLow8; break; |
8267 | 0 | case Hexagon::R2: OpKind = MCK_IntRegsLow8; break; |
8268 | 0 | case Hexagon::R3: OpKind = MCK_IntRegsLow8; break; |
8269 | 0 | case Hexagon::R4: OpKind = MCK_IntRegsLow8; break; |
8270 | 0 | case Hexagon::R5: OpKind = MCK_IntRegsLow8; break; |
8271 | 0 | case Hexagon::R6: OpKind = MCK_IntRegsLow8; break; |
8272 | 0 | case Hexagon::R7: OpKind = MCK_IntRegsLow8; break; |
8273 | 0 | case Hexagon::R8: OpKind = MCK_IntRegs; break; |
8274 | 0 | case Hexagon::R9: OpKind = MCK_IntRegs; break; |
8275 | 0 | case Hexagon::R10: OpKind = MCK_IntRegs; break; |
8276 | 0 | case Hexagon::R11: OpKind = MCK_IntRegs; break; |
8277 | 0 | case Hexagon::R12: OpKind = MCK_IntRegs; break; |
8278 | 0 | case Hexagon::R13: OpKind = MCK_IntRegs; break; |
8279 | 0 | case Hexagon::R14: OpKind = MCK_IntRegs; break; |
8280 | 0 | case Hexagon::R15: OpKind = MCK_IntRegs; break; |
8281 | 0 | case Hexagon::R16: OpKind = MCK_GeneralSubRegs; break; |
8282 | 0 | case Hexagon::R17: OpKind = MCK_GeneralSubRegs; break; |
8283 | 0 | case Hexagon::R18: OpKind = MCK_GeneralSubRegs; break; |
8284 | 0 | case Hexagon::R19: OpKind = MCK_GeneralSubRegs; break; |
8285 | 0 | case Hexagon::R20: OpKind = MCK_GeneralSubRegs; break; |
8286 | 0 | case Hexagon::R21: OpKind = MCK_GeneralSubRegs; break; |
8287 | 0 | case Hexagon::R22: OpKind = MCK_GeneralSubRegs; break; |
8288 | 0 | case Hexagon::R23: OpKind = MCK_GeneralSubRegs; break; |
8289 | 0 | case Hexagon::R24: OpKind = MCK_IntRegs; break; |
8290 | 0 | case Hexagon::R25: OpKind = MCK_IntRegs; break; |
8291 | 0 | case Hexagon::R26: OpKind = MCK_IntRegs; break; |
8292 | 0 | case Hexagon::R27: OpKind = MCK_IntRegs; break; |
8293 | 0 | case Hexagon::R28: OpKind = MCK_IntRegs; break; |
8294 | 0 | case Hexagon::R29: OpKind = MCK_IntRegs; break; |
8295 | 0 | case Hexagon::R30: OpKind = MCK_IntRegs; break; |
8296 | 0 | case Hexagon::R31: OpKind = MCK_IntRegs; break; |
8297 | 0 | case Hexagon::D0: OpKind = MCK_Reg3; break; |
8298 | 0 | case Hexagon::D1: OpKind = MCK_Reg3; break; |
8299 | 0 | case Hexagon::D2: OpKind = MCK_Reg3; break; |
8300 | 0 | case Hexagon::D3: OpKind = MCK_Reg3; break; |
8301 | 0 | case Hexagon::D4: OpKind = MCK_DoubleRegs; break; |
8302 | 0 | case Hexagon::D5: OpKind = MCK_DoubleRegs; break; |
8303 | 0 | case Hexagon::D6: OpKind = MCK_DoubleRegs; break; |
8304 | 0 | case Hexagon::D7: OpKind = MCK_DoubleRegs; break; |
8305 | 0 | case Hexagon::D8: OpKind = MCK_GeneralDoubleLow8Regs; break; |
8306 | 0 | case Hexagon::D9: OpKind = MCK_GeneralDoubleLow8Regs; break; |
8307 | 0 | case Hexagon::D10: OpKind = MCK_GeneralDoubleLow8Regs; break; |
8308 | 0 | case Hexagon::D11: OpKind = MCK_GeneralDoubleLow8Regs; break; |
8309 | 0 | case Hexagon::D12: OpKind = MCK_DoubleRegs; break; |
8310 | 0 | case Hexagon::D13: OpKind = MCK_DoubleRegs; break; |
8311 | 0 | case Hexagon::D14: OpKind = MCK_DoubleRegs; break; |
8312 | 0 | case Hexagon::D15: OpKind = MCK_DoubleRegs; break; |
8313 | 0 | case Hexagon::P0: OpKind = MCK_P0; break; |
8314 | 0 | case Hexagon::P1: OpKind = MCK_P1; break; |
8315 | 0 | case Hexagon::P2: OpKind = MCK_PredRegs; break; |
8316 | 0 | case Hexagon::P3: OpKind = MCK_P3; break; |
8317 | 0 | case Hexagon::USR_OVF: OpKind = MCK_UsrBits; break; |
8318 | 0 | case Hexagon::USR: OpKind = MCK_Reg11; break; |
8319 | 0 | case Hexagon::SA0: OpKind = MCK_CtrRegs; break; |
8320 | 0 | case Hexagon::LC0: OpKind = MCK_CtrRegs; break; |
8321 | 0 | case Hexagon::SA1: OpKind = MCK_CtrRegs; break; |
8322 | 0 | case Hexagon::LC1: OpKind = MCK_CtrRegs; break; |
8323 | 0 | case Hexagon::P3_0: OpKind = MCK_CtrRegs; break; |
8324 | 0 | case Hexagon::C5: OpKind = MCK_CtrRegs; break; |
8325 | 0 | case Hexagon::M0: OpKind = MCK_ModRegs; break; |
8326 | 0 | case Hexagon::M1: OpKind = MCK_ModRegs; break; |
8327 | 0 | case Hexagon::C8: OpKind = MCK_CtrRegs; break; |
8328 | 0 | case Hexagon::PC: OpKind = MCK_PC; break; |
8329 | 0 | case Hexagon::UGP: OpKind = MCK_CtrRegs; break; |
8330 | 0 | case Hexagon::GP: OpKind = MCK_GP; break; |
8331 | 0 | case Hexagon::CS0: OpKind = MCK_CtrRegs; break; |
8332 | 0 | case Hexagon::CS1: OpKind = MCK_CtrRegs; break; |
8333 | 0 | case Hexagon::UPCYCLELO: OpKind = MCK_CtrRegs; break; |
8334 | 0 | case Hexagon::UPCYCLEHI: OpKind = MCK_CtrRegs; break; |
8335 | 0 | case Hexagon::FRAMELIMIT: OpKind = MCK_Reg16; break; |
8336 | 0 | case Hexagon::FRAMEKEY: OpKind = MCK_Reg16; break; |
8337 | 0 | case Hexagon::PKTCOUNTLO: OpKind = MCK_Reg16; break; |
8338 | 0 | case Hexagon::PKTCOUNTHI: OpKind = MCK_Reg16; break; |
8339 | 0 | case Hexagon::UTIMERLO: OpKind = MCK_Reg16; break; |
8340 | 0 | case Hexagon::UTIMERHI: OpKind = MCK_Reg16; break; |
8341 | 0 | case Hexagon::C1_0: OpKind = MCK_CtrRegs64; break; |
8342 | 0 | case Hexagon::C3_2: OpKind = MCK_CtrRegs64; break; |
8343 | 0 | case Hexagon::C5_4: OpKind = MCK_CtrRegs64; break; |
8344 | 0 | case Hexagon::C7_6: OpKind = MCK_Reg19; break; |
8345 | 0 | case Hexagon::C9_8: OpKind = MCK_CtrRegs64; break; |
8346 | 0 | case Hexagon::C11_10: OpKind = MCK_CtrRegs64; break; |
8347 | 0 | case Hexagon::CS: OpKind = MCK_CtrRegs64; break; |
8348 | 0 | case Hexagon::UPCYCLE: OpKind = MCK_CtrRegs64; break; |
8349 | 0 | case Hexagon::C17_16: OpKind = MCK_Reg20; break; |
8350 | 0 | case Hexagon::PKTCOUNT: OpKind = MCK_Reg20; break; |
8351 | 0 | case Hexagon::UTIMER: OpKind = MCK_Reg20; break; |
8352 | 0 | case Hexagon::V0: OpKind = MCK_HvxVR; break; |
8353 | 0 | case Hexagon::V1: OpKind = MCK_HvxVR; break; |
8354 | 0 | case Hexagon::V2: OpKind = MCK_HvxVR; break; |
8355 | 0 | case Hexagon::V3: OpKind = MCK_HvxVR; break; |
8356 | 0 | case Hexagon::V4: OpKind = MCK_HvxVR; break; |
8357 | 0 | case Hexagon::V5: OpKind = MCK_HvxVR; break; |
8358 | 0 | case Hexagon::V6: OpKind = MCK_HvxVR; break; |
8359 | 0 | case Hexagon::V7: OpKind = MCK_HvxVR; break; |
8360 | 0 | case Hexagon::V8: OpKind = MCK_HvxVR; break; |
8361 | 0 | case Hexagon::V9: OpKind = MCK_HvxVR; break; |
8362 | 0 | case Hexagon::V10: OpKind = MCK_HvxVR; break; |
8363 | 0 | case Hexagon::V11: OpKind = MCK_HvxVR; break; |
8364 | 0 | case Hexagon::V12: OpKind = MCK_HvxVR; break; |
8365 | 0 | case Hexagon::V13: OpKind = MCK_HvxVR; break; |
8366 | 0 | case Hexagon::V14: OpKind = MCK_HvxVR; break; |
8367 | 0 | case Hexagon::V15: OpKind = MCK_HvxVR; break; |
8368 | 0 | case Hexagon::V16: OpKind = MCK_HvxVR; break; |
8369 | 0 | case Hexagon::V17: OpKind = MCK_HvxVR; break; |
8370 | 0 | case Hexagon::V18: OpKind = MCK_HvxVR; break; |
8371 | 0 | case Hexagon::V19: OpKind = MCK_HvxVR; break; |
8372 | 0 | case Hexagon::V20: OpKind = MCK_HvxVR; break; |
8373 | 0 | case Hexagon::V21: OpKind = MCK_HvxVR; break; |
8374 | 0 | case Hexagon::V22: OpKind = MCK_HvxVR; break; |
8375 | 0 | case Hexagon::V23: OpKind = MCK_HvxVR; break; |
8376 | 0 | case Hexagon::V24: OpKind = MCK_HvxVR; break; |
8377 | 0 | case Hexagon::V25: OpKind = MCK_HvxVR; break; |
8378 | 0 | case Hexagon::V26: OpKind = MCK_HvxVR; break; |
8379 | 0 | case Hexagon::V27: OpKind = MCK_HvxVR; break; |
8380 | 0 | case Hexagon::V28: OpKind = MCK_HvxVR; break; |
8381 | 0 | case Hexagon::V29: OpKind = MCK_HvxVR; break; |
8382 | 0 | case Hexagon::V30: OpKind = MCK_HvxVR; break; |
8383 | 0 | case Hexagon::V31: OpKind = MCK_HvxVR; break; |
8384 | 0 | case Hexagon::VTMP: OpKind = MCK_V65Regs; break; |
8385 | 0 | case Hexagon::W0: OpKind = MCK_HvxWR; break; |
8386 | 0 | case Hexagon::W1: OpKind = MCK_HvxWR; break; |
8387 | 0 | case Hexagon::W2: OpKind = MCK_HvxWR; break; |
8388 | 0 | case Hexagon::W3: OpKind = MCK_HvxWR; break; |
8389 | 0 | case Hexagon::W4: OpKind = MCK_HvxWR; break; |
8390 | 0 | case Hexagon::W5: OpKind = MCK_HvxWR; break; |
8391 | 0 | case Hexagon::W6: OpKind = MCK_HvxWR; break; |
8392 | 0 | case Hexagon::W7: OpKind = MCK_HvxWR; break; |
8393 | 0 | case Hexagon::W8: OpKind = MCK_HvxWR; break; |
8394 | 0 | case Hexagon::W9: OpKind = MCK_HvxWR; break; |
8395 | 0 | case Hexagon::W10: OpKind = MCK_HvxWR; break; |
8396 | 0 | case Hexagon::W11: OpKind = MCK_HvxWR; break; |
8397 | 0 | case Hexagon::W12: OpKind = MCK_HvxWR; break; |
8398 | 0 | case Hexagon::W13: OpKind = MCK_HvxWR; break; |
8399 | 0 | case Hexagon::W14: OpKind = MCK_HvxWR; break; |
8400 | 0 | case Hexagon::W15: OpKind = MCK_HvxWR; break; |
8401 | 0 | case Hexagon::WR0: OpKind = MCK_VectRegRev; break; |
8402 | 0 | case Hexagon::WR1: OpKind = MCK_VectRegRev; break; |
8403 | 0 | case Hexagon::WR2: OpKind = MCK_VectRegRev; break; |
8404 | 0 | case Hexagon::WR3: OpKind = MCK_VectRegRev; break; |
8405 | 0 | case Hexagon::WR4: OpKind = MCK_VectRegRev; break; |
8406 | 0 | case Hexagon::WR5: OpKind = MCK_VectRegRev; break; |
8407 | 0 | case Hexagon::WR6: OpKind = MCK_VectRegRev; break; |
8408 | 0 | case Hexagon::WR7: OpKind = MCK_VectRegRev; break; |
8409 | 0 | case Hexagon::WR8: OpKind = MCK_VectRegRev; break; |
8410 | 0 | case Hexagon::WR9: OpKind = MCK_VectRegRev; break; |
8411 | 0 | case Hexagon::WR10: OpKind = MCK_VectRegRev; break; |
8412 | 0 | case Hexagon::WR11: OpKind = MCK_VectRegRev; break; |
8413 | 0 | case Hexagon::WR12: OpKind = MCK_VectRegRev; break; |
8414 | 0 | case Hexagon::WR13: OpKind = MCK_VectRegRev; break; |
8415 | 0 | case Hexagon::WR14: OpKind = MCK_VectRegRev; break; |
8416 | 0 | case Hexagon::WR15: OpKind = MCK_VectRegRev; break; |
8417 | 0 | case Hexagon::VQ0: OpKind = MCK_HvxVQR; break; |
8418 | 0 | case Hexagon::VQ1: OpKind = MCK_HvxVQR; break; |
8419 | 0 | case Hexagon::VQ2: OpKind = MCK_HvxVQR; break; |
8420 | 0 | case Hexagon::VQ3: OpKind = MCK_HvxVQR; break; |
8421 | 0 | case Hexagon::VQ4: OpKind = MCK_HvxVQR; break; |
8422 | 0 | case Hexagon::VQ5: OpKind = MCK_HvxVQR; break; |
8423 | 0 | case Hexagon::VQ6: OpKind = MCK_HvxVQR; break; |
8424 | 0 | case Hexagon::VQ7: OpKind = MCK_HvxVQR; break; |
8425 | 0 | case Hexagon::Q0: OpKind = MCK_HvxQR; break; |
8426 | 0 | case Hexagon::Q1: OpKind = MCK_HvxQR; break; |
8427 | 0 | case Hexagon::Q2: OpKind = MCK_HvxQR; break; |
8428 | 0 | case Hexagon::Q3: OpKind = MCK_HvxQR; break; |
8429 | 0 | case Hexagon::SGP0: OpKind = MCK_SGP0; break; |
8430 | 0 | case Hexagon::SGP1: OpKind = MCK_SGP1; break; |
8431 | 0 | case Hexagon::STID: OpKind = MCK_SysRegs; break; |
8432 | 0 | case Hexagon::ELR: OpKind = MCK_SysRegs; break; |
8433 | 0 | case Hexagon::BADVA0: OpKind = MCK_SysRegs; break; |
8434 | 0 | case Hexagon::BADVA1: OpKind = MCK_SysRegs; break; |
8435 | 0 | case Hexagon::SSR: OpKind = MCK_SysRegs; break; |
8436 | 0 | case Hexagon::CCR: OpKind = MCK_SysRegs; break; |
8437 | 0 | case Hexagon::HTID: OpKind = MCK_SysRegs; break; |
8438 | 0 | case Hexagon::BADVA: OpKind = MCK_SysRegs; break; |
8439 | 0 | case Hexagon::IMASK: OpKind = MCK_SysRegs; break; |
8440 | 0 | case Hexagon::S11: OpKind = MCK_SysRegs; break; |
8441 | 0 | case Hexagon::S12: OpKind = MCK_SysRegs; break; |
8442 | 0 | case Hexagon::S13: OpKind = MCK_SysRegs; break; |
8443 | 0 | case Hexagon::S14: OpKind = MCK_SysRegs; break; |
8444 | 0 | case Hexagon::S15: OpKind = MCK_SysRegs; break; |
8445 | 0 | case Hexagon::EVB: OpKind = MCK_SysRegs; break; |
8446 | 0 | case Hexagon::MODECTL: OpKind = MCK_SysRegs; break; |
8447 | 0 | case Hexagon::SYSCFG: OpKind = MCK_SysRegs; break; |
8448 | 0 | case Hexagon::S19: OpKind = MCK_SysRegs; break; |
8449 | 0 | case Hexagon::S20: OpKind = MCK_SysRegs; break; |
8450 | 0 | case Hexagon::VID: OpKind = MCK_SysRegs; break; |
8451 | 0 | case Hexagon::S22: OpKind = MCK_SysRegs; break; |
8452 | 0 | case Hexagon::S23: OpKind = MCK_SysRegs; break; |
8453 | 0 | case Hexagon::S24: OpKind = MCK_SysRegs; break; |
8454 | 0 | case Hexagon::S25: OpKind = MCK_SysRegs; break; |
8455 | 0 | case Hexagon::S26: OpKind = MCK_SysRegs; break; |
8456 | 0 | case Hexagon::CFGBASE: OpKind = MCK_SysRegs; break; |
8457 | 0 | case Hexagon::DIAG: OpKind = MCK_DIAG; break; |
8458 | 0 | case Hexagon::REV: OpKind = MCK_SysRegs; break; |
8459 | 0 | case Hexagon::PCYCLELO: OpKind = MCK_SysRegs; break; |
8460 | 0 | case Hexagon::PCYCLEHI: OpKind = MCK_SysRegs; break; |
8461 | 0 | case Hexagon::ISDBST: OpKind = MCK_SysRegs; break; |
8462 | 0 | case Hexagon::ISDBCFG0: OpKind = MCK_SysRegs; break; |
8463 | 0 | case Hexagon::ISDBCFG1: OpKind = MCK_SysRegs; break; |
8464 | 0 | case Hexagon::S35: OpKind = MCK_SysRegs; break; |
8465 | 0 | case Hexagon::BRKPTPC0: OpKind = MCK_SysRegs; break; |
8466 | 0 | case Hexagon::BRKPTCFG0: OpKind = MCK_SysRegs; break; |
8467 | 0 | case Hexagon::BRKPTPC1: OpKind = MCK_SysRegs; break; |
8468 | 0 | case Hexagon::BRKPTCFG1: OpKind = MCK_SysRegs; break; |
8469 | 0 | case Hexagon::ISDBMBXIN: OpKind = MCK_SysRegs; break; |
8470 | 0 | case Hexagon::ISDBMBXOUT: OpKind = MCK_SysRegs; break; |
8471 | 0 | case Hexagon::ISDBEN: OpKind = MCK_SysRegs; break; |
8472 | 0 | case Hexagon::ISDBGPR: OpKind = MCK_SysRegs; break; |
8473 | 0 | case Hexagon::S44: OpKind = MCK_SysRegs; break; |
8474 | 0 | case Hexagon::S45: OpKind = MCK_SysRegs; break; |
8475 | 0 | case Hexagon::S46: OpKind = MCK_SysRegs; break; |
8476 | 0 | case Hexagon::S47: OpKind = MCK_SysRegs; break; |
8477 | 0 | case Hexagon::PMUCNT0: OpKind = MCK_SysRegs; break; |
8478 | 0 | case Hexagon::PMUCNT1: OpKind = MCK_SysRegs; break; |
8479 | 0 | case Hexagon::PMUCNT2: OpKind = MCK_SysRegs; break; |
8480 | 0 | case Hexagon::PMUCNT3: OpKind = MCK_SysRegs; break; |
8481 | 0 | case Hexagon::PMUEVTCFG: OpKind = MCK_SysRegs; break; |
8482 | 0 | case Hexagon::PMUCFG: OpKind = MCK_SysRegs; break; |
8483 | 0 | case Hexagon::S54: OpKind = MCK_SysRegs; break; |
8484 | 0 | case Hexagon::S55: OpKind = MCK_SysRegs; break; |
8485 | 0 | case Hexagon::S56: OpKind = MCK_SysRegs; break; |
8486 | 0 | case Hexagon::S57: OpKind = MCK_SysRegs; break; |
8487 | 0 | case Hexagon::S58: OpKind = MCK_SysRegs; break; |
8488 | 0 | case Hexagon::S59: OpKind = MCK_SysRegs; break; |
8489 | 0 | case Hexagon::S60: OpKind = MCK_SysRegs; break; |
8490 | 0 | case Hexagon::S61: OpKind = MCK_SysRegs; break; |
8491 | 0 | case Hexagon::S62: OpKind = MCK_SysRegs; break; |
8492 | 0 | case Hexagon::S63: OpKind = MCK_SysRegs; break; |
8493 | 0 | case Hexagon::S64: OpKind = MCK_SysRegs; break; |
8494 | 0 | case Hexagon::S65: OpKind = MCK_SysRegs; break; |
8495 | 0 | case Hexagon::S66: OpKind = MCK_SysRegs; break; |
8496 | 0 | case Hexagon::S67: OpKind = MCK_SysRegs; break; |
8497 | 0 | case Hexagon::S68: OpKind = MCK_SysRegs; break; |
8498 | 0 | case Hexagon::S69: OpKind = MCK_SysRegs; break; |
8499 | 0 | case Hexagon::S70: OpKind = MCK_SysRegs; break; |
8500 | 0 | case Hexagon::S71: OpKind = MCK_SysRegs; break; |
8501 | 0 | case Hexagon::S72: OpKind = MCK_SysRegs; break; |
8502 | 0 | case Hexagon::S73: OpKind = MCK_SysRegs; break; |
8503 | 0 | case Hexagon::S74: OpKind = MCK_SysRegs; break; |
8504 | 0 | case Hexagon::S75: OpKind = MCK_SysRegs; break; |
8505 | 0 | case Hexagon::S76: OpKind = MCK_SysRegs; break; |
8506 | 0 | case Hexagon::S77: OpKind = MCK_SysRegs; break; |
8507 | 0 | case Hexagon::S78: OpKind = MCK_SysRegs; break; |
8508 | 0 | case Hexagon::S79: OpKind = MCK_SysRegs; break; |
8509 | 0 | case Hexagon::S80: OpKind = MCK_SysRegs; break; |
8510 | 0 | case Hexagon::SGP1_0: OpKind = MCK_SysRegs64; break; |
8511 | 0 | case Hexagon::S3_2: OpKind = MCK_SysRegs64; break; |
8512 | 0 | case Hexagon::S5_4: OpKind = MCK_SysRegs64; break; |
8513 | 0 | case Hexagon::S7_6: OpKind = MCK_SysRegs64; break; |
8514 | 0 | case Hexagon::S9_8: OpKind = MCK_SysRegs64; break; |
8515 | 0 | case Hexagon::S11_10: OpKind = MCK_SysRegs64; break; |
8516 | 0 | case Hexagon::S13_12: OpKind = MCK_SysRegs64; break; |
8517 | 0 | case Hexagon::S15_14: OpKind = MCK_SysRegs64; break; |
8518 | 0 | case Hexagon::S17_16: OpKind = MCK_SysRegs64; break; |
8519 | 0 | case Hexagon::S19_18: OpKind = MCK_SysRegs64; break; |
8520 | 0 | case Hexagon::S21_20: OpKind = MCK_SysRegs64; break; |
8521 | 0 | case Hexagon::S23_22: OpKind = MCK_SysRegs64; break; |
8522 | 0 | case Hexagon::S25_24: OpKind = MCK_SysRegs64; break; |
8523 | 0 | case Hexagon::S27_26: OpKind = MCK_SysRegs64; break; |
8524 | 0 | case Hexagon::S29_28: OpKind = MCK_SysRegs64; break; |
8525 | 0 | case Hexagon::S31_30: OpKind = MCK_SysRegs64; break; |
8526 | 0 | case Hexagon::S33_32: OpKind = MCK_SysRegs64; break; |
8527 | 0 | case Hexagon::S35_34: OpKind = MCK_SysRegs64; break; |
8528 | 0 | case Hexagon::S37_36: OpKind = MCK_SysRegs64; break; |
8529 | 0 | case Hexagon::S39_38: OpKind = MCK_SysRegs64; break; |
8530 | 0 | case Hexagon::S41_40: OpKind = MCK_SysRegs64; break; |
8531 | 0 | case Hexagon::S43_42: OpKind = MCK_SysRegs64; break; |
8532 | 0 | case Hexagon::S45_44: OpKind = MCK_SysRegs64; break; |
8533 | 0 | case Hexagon::S47_46: OpKind = MCK_SysRegs64; break; |
8534 | 0 | case Hexagon::S49_48: OpKind = MCK_SysRegs64; break; |
8535 | 0 | case Hexagon::S51_50: OpKind = MCK_SysRegs64; break; |
8536 | 0 | case Hexagon::S53_52: OpKind = MCK_SysRegs64; break; |
8537 | 0 | case Hexagon::S55_54: OpKind = MCK_SysRegs64; break; |
8538 | 0 | case Hexagon::S57_56: OpKind = MCK_SysRegs64; break; |
8539 | 0 | case Hexagon::S59_58: OpKind = MCK_SysRegs64; break; |
8540 | 0 | case Hexagon::S61_60: OpKind = MCK_SysRegs64; break; |
8541 | 0 | case Hexagon::S63_62: OpKind = MCK_SysRegs64; break; |
8542 | 0 | case Hexagon::S65_64: OpKind = MCK_SysRegs64; break; |
8543 | 0 | case Hexagon::S67_66: OpKind = MCK_SysRegs64; break; |
8544 | 0 | case Hexagon::S69_68: OpKind = MCK_SysRegs64; break; |
8545 | 0 | case Hexagon::S71_70: OpKind = MCK_SysRegs64; break; |
8546 | 0 | case Hexagon::S73_72: OpKind = MCK_SysRegs64; break; |
8547 | 0 | case Hexagon::S75_74: OpKind = MCK_SysRegs64; break; |
8548 | 0 | case Hexagon::S77_76: OpKind = MCK_SysRegs64; break; |
8549 | 0 | case Hexagon::S79_78: OpKind = MCK_SysRegs64; break; |
8550 | 0 | case Hexagon::GELR: OpKind = MCK_GuestRegs; break; |
8551 | 0 | case Hexagon::GSR: OpKind = MCK_GuestRegs; break; |
8552 | 0 | case Hexagon::GOSP: OpKind = MCK_GuestRegs; break; |
8553 | 0 | case Hexagon::G3: OpKind = MCK_GuestRegs; break; |
8554 | 0 | case Hexagon::G4: OpKind = MCK_GuestRegs; break; |
8555 | 0 | case Hexagon::G5: OpKind = MCK_GuestRegs; break; |
8556 | 0 | case Hexagon::G6: OpKind = MCK_GuestRegs; break; |
8557 | 0 | case Hexagon::G7: OpKind = MCK_GuestRegs; break; |
8558 | 0 | case Hexagon::G8: OpKind = MCK_GuestRegs; break; |
8559 | 0 | case Hexagon::G9: OpKind = MCK_GuestRegs; break; |
8560 | 0 | case Hexagon::G10: OpKind = MCK_GuestRegs; break; |
8561 | 0 | case Hexagon::G11: OpKind = MCK_GuestRegs; break; |
8562 | 0 | case Hexagon::G12: OpKind = MCK_GuestRegs; break; |
8563 | 0 | case Hexagon::G13: OpKind = MCK_GuestRegs; break; |
8564 | 0 | case Hexagon::G14: OpKind = MCK_GuestRegs; break; |
8565 | 0 | case Hexagon::G15: OpKind = MCK_GuestRegs; break; |
8566 | 0 | case Hexagon::GPMUCNT4: OpKind = MCK_GuestRegs; break; |
8567 | 0 | case Hexagon::GPMUCNT5: OpKind = MCK_GuestRegs; break; |
8568 | 0 | case Hexagon::GPMUCNT6: OpKind = MCK_GuestRegs; break; |
8569 | 0 | case Hexagon::GPMUCNT7: OpKind = MCK_GuestRegs; break; |
8570 | 0 | case Hexagon::G20: OpKind = MCK_GuestRegs; break; |
8571 | 0 | case Hexagon::G21: OpKind = MCK_GuestRegs; break; |
8572 | 0 | case Hexagon::G22: OpKind = MCK_GuestRegs; break; |
8573 | 0 | case Hexagon::G23: OpKind = MCK_GuestRegs; break; |
8574 | 0 | case Hexagon::GPCYCLELO: OpKind = MCK_GuestRegs; break; |
8575 | 0 | case Hexagon::GPCYCLEHI: OpKind = MCK_GuestRegs; break; |
8576 | 0 | case Hexagon::GPMUCNT0: OpKind = MCK_GuestRegs; break; |
8577 | 0 | case Hexagon::GPMUCNT1: OpKind = MCK_GuestRegs; break; |
8578 | 0 | case Hexagon::GPMUCNT2: OpKind = MCK_GuestRegs; break; |
8579 | 0 | case Hexagon::GPMUCNT3: OpKind = MCK_GuestRegs; break; |
8580 | 0 | case Hexagon::G30: OpKind = MCK_GuestRegs; break; |
8581 | 0 | case Hexagon::G31: OpKind = MCK_GuestRegs; break; |
8582 | 0 | case Hexagon::G1_0: OpKind = MCK_GuestRegs64; break; |
8583 | 0 | case Hexagon::G3_2: OpKind = MCK_GuestRegs64; break; |
8584 | 0 | case Hexagon::G5_4: OpKind = MCK_GuestRegs64; break; |
8585 | 0 | case Hexagon::G7_6: OpKind = MCK_GuestRegs64; break; |
8586 | 0 | case Hexagon::G9_8: OpKind = MCK_GuestRegs64; break; |
8587 | 0 | case Hexagon::G11_10: OpKind = MCK_GuestRegs64; break; |
8588 | 0 | case Hexagon::G13_12: OpKind = MCK_GuestRegs64; break; |
8589 | 0 | case Hexagon::G15_14: OpKind = MCK_GuestRegs64; break; |
8590 | 0 | case Hexagon::G17_16: OpKind = MCK_GuestRegs64; break; |
8591 | 0 | case Hexagon::G19_18: OpKind = MCK_GuestRegs64; break; |
8592 | 0 | case Hexagon::G21_20: OpKind = MCK_GuestRegs64; break; |
8593 | 0 | case Hexagon::G23_22: OpKind = MCK_GuestRegs64; break; |
8594 | 0 | case Hexagon::G25_24: OpKind = MCK_GuestRegs64; break; |
8595 | 0 | case Hexagon::G27_26: OpKind = MCK_GuestRegs64; break; |
8596 | 0 | case Hexagon::G29_28: OpKind = MCK_GuestRegs64; break; |
8597 | 0 | case Hexagon::G31_30: OpKind = MCK_GuestRegs64; break; |
8598 | 0 | } |
8599 | 0 | return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success : |
8600 | 0 | getDiagKindFromRegisterClass(Kind); |
8601 | 0 | } |
8602 | | |
8603 | 0 | if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER) |
8604 | 0 | return getDiagKindFromRegisterClass(Kind); |
8605 | | |
8606 | 0 | return MCTargetAsmParser::Match_InvalidOperand; |
8607 | 0 | } |
8608 | | |
8609 | | #ifndef NDEBUG |
8610 | 0 | const char *getMatchClassName(MatchClassKind Kind) { |
8611 | 0 | switch (Kind) { |
8612 | 0 | case InvalidMatchClass: return "InvalidMatchClass"; |
8613 | 0 | case OptionalMatchClass: return "OptionalMatchClass"; |
8614 | 0 | case MCK__EXCLAIM_: return "MCK__EXCLAIM_"; |
8615 | 0 | case MCK__HASH_: return "MCK__HASH_"; |
8616 | 0 | case MCK__38_: return "MCK__38_"; |
8617 | 0 | case MCK__40_: return "MCK__40_"; |
8618 | 0 | case MCK__41_: return "MCK__41_"; |
8619 | 0 | case MCK__STAR_: return "MCK__STAR_"; |
8620 | 0 | case MCK__43_: return "MCK__43_"; |
8621 | 0 | case MCK__MINUS_: return "MCK__MINUS_"; |
8622 | 0 | case MCK__DOT_: return "MCK__DOT_"; |
8623 | 0 | case MCK_0: return "MCK_0"; |
8624 | 0 | case MCK_1: return "MCK_1"; |
8625 | 0 | case MCK_16: return "MCK_16"; |
8626 | 0 | case MCK__COLON_: return "MCK__COLON_"; |
8627 | 0 | case MCK__59_: return "MCK__59_"; |
8628 | 0 | case MCK__LT_: return "MCK__LT_"; |
8629 | 0 | case MCK__61_: return "MCK__61_"; |
8630 | 0 | case MCK__GT_: return "MCK__GT_"; |
8631 | 0 | case MCK_CONST32: return "MCK_CONST32"; |
8632 | 0 | case MCK_CONST64: return "MCK_CONST64"; |
8633 | 0 | case MCK_DUPLEX: return "MCK_DUPLEX"; |
8634 | 0 | case MCK_I: return "MCK_I"; |
8635 | 0 | case MCK__94_: return "MCK__94_"; |
8636 | 0 | case MCK_abs: return "MCK_abs"; |
8637 | 0 | case MCK_add: return "MCK_add"; |
8638 | 0 | case MCK_addasl: return "MCK_addasl"; |
8639 | 0 | case MCK_all8: return "MCK_all8"; |
8640 | 0 | case MCK_allocframe: return "MCK_allocframe"; |
8641 | 0 | case MCK_and: return "MCK_and"; |
8642 | 0 | case MCK_any8: return "MCK_any8"; |
8643 | 0 | case MCK_asl: return "MCK_asl"; |
8644 | 0 | case MCK_aslh: return "MCK_aslh"; |
8645 | 0 | case MCK_asr: return "MCK_asr"; |
8646 | 0 | case MCK_asrh: return "MCK_asrh"; |
8647 | 0 | case MCK_asrrnd: return "MCK_asrrnd"; |
8648 | 0 | case MCK_at: return "MCK_at"; |
8649 | 0 | case MCK_b: return "MCK_b"; |
8650 | 0 | case MCK_b10: return "MCK_b10"; |
8651 | 0 | case MCK_barrier: return "MCK_barrier"; |
8652 | 0 | case MCK_bf: return "MCK_bf"; |
8653 | 0 | case MCK_bitsclr: return "MCK_bitsclr"; |
8654 | 0 | case MCK_bitsplit: return "MCK_bitsplit"; |
8655 | 0 | case MCK_bitsset: return "MCK_bitsset"; |
8656 | 0 | case MCK_boundscheck: return "MCK_boundscheck"; |
8657 | 0 | case MCK_brev: return "MCK_brev"; |
8658 | 0 | case MCK_brkpt: return "MCK_brkpt"; |
8659 | 0 | case MCK_c: return "MCK_c"; |
8660 | 0 | case MCK_call: return "MCK_call"; |
8661 | 0 | case MCK_callr: return "MCK_callr"; |
8662 | 0 | case MCK_callrh: return "MCK_callrh"; |
8663 | 0 | case MCK_carry: return "MCK_carry"; |
8664 | 0 | case MCK_chop: return "MCK_chop"; |
8665 | 0 | case MCK_ciad: return "MCK_ciad"; |
8666 | 0 | case MCK_circ: return "MCK_circ"; |
8667 | 0 | case MCK_cl0: return "MCK_cl0"; |
8668 | 0 | case MCK_cl1: return "MCK_cl1"; |
8669 | 0 | case MCK_clb: return "MCK_clb"; |
8670 | 0 | case MCK_clip: return "MCK_clip"; |
8671 | 0 | case MCK_clrbit: return "MCK_clrbit"; |
8672 | 0 | case MCK_cmp: return "MCK_cmp"; |
8673 | 0 | case MCK_cmpb: return "MCK_cmpb"; |
8674 | 0 | case MCK_cmph: return "MCK_cmph"; |
8675 | 0 | case MCK_cmpy: return "MCK_cmpy"; |
8676 | 0 | case MCK_cmpyi: return "MCK_cmpyi"; |
8677 | 0 | case MCK_cmpyiw: return "MCK_cmpyiw"; |
8678 | 0 | case MCK_cmpyiwh: return "MCK_cmpyiwh"; |
8679 | 0 | case MCK_cmpyr: return "MCK_cmpyr"; |
8680 | 0 | case MCK_cmpyrw: return "MCK_cmpyrw"; |
8681 | 0 | case MCK_cmpyrwh: return "MCK_cmpyrwh"; |
8682 | 0 | case MCK_combine: return "MCK_combine"; |
8683 | 0 | case MCK_convert_95_d2df: return "MCK_convert_95_d2df"; |
8684 | 0 | case MCK_convert_95_d2sf: return "MCK_convert_95_d2sf"; |
8685 | 0 | case MCK_convert_95_df2d: return "MCK_convert_95_df2d"; |
8686 | 0 | case MCK_convert_95_df2sf: return "MCK_convert_95_df2sf"; |
8687 | 0 | case MCK_convert_95_df2ud: return "MCK_convert_95_df2ud"; |
8688 | 0 | case MCK_convert_95_df2uw: return "MCK_convert_95_df2uw"; |
8689 | 0 | case MCK_convert_95_df2w: return "MCK_convert_95_df2w"; |
8690 | 0 | case MCK_convert_95_sf2d: return "MCK_convert_95_sf2d"; |
8691 | 0 | case MCK_convert_95_sf2df: return "MCK_convert_95_sf2df"; |
8692 | 0 | case MCK_convert_95_sf2ud: return "MCK_convert_95_sf2ud"; |
8693 | 0 | case MCK_convert_95_sf2uw: return "MCK_convert_95_sf2uw"; |
8694 | 0 | case MCK_convert_95_sf2w: return "MCK_convert_95_sf2w"; |
8695 | 0 | case MCK_convert_95_ud2df: return "MCK_convert_95_ud2df"; |
8696 | 0 | case MCK_convert_95_ud2sf: return "MCK_convert_95_ud2sf"; |
8697 | 0 | case MCK_convert_95_uw2df: return "MCK_convert_95_uw2df"; |
8698 | 0 | case MCK_convert_95_uw2sf: return "MCK_convert_95_uw2sf"; |
8699 | 0 | case MCK_convert_95_w2df: return "MCK_convert_95_w2df"; |
8700 | 0 | case MCK_convert_95_w2sf: return "MCK_convert_95_w2sf"; |
8701 | 0 | case MCK_crnd: return "MCK_crnd"; |
8702 | 0 | case MCK_cround: return "MCK_cround"; |
8703 | 0 | case MCK_crswap: return "MCK_crswap"; |
8704 | 0 | case MCK_cswi: return "MCK_cswi"; |
8705 | 0 | case MCK_ct0: return "MCK_ct0"; |
8706 | 0 | case MCK_ct1: return "MCK_ct1"; |
8707 | 0 | case MCK_ctlbw: return "MCK_ctlbw"; |
8708 | 0 | case MCK_cur: return "MCK_cur"; |
8709 | 0 | case MCK_dccleana: return "MCK_dccleana"; |
8710 | 0 | case MCK_dccleanidx: return "MCK_dccleanidx"; |
8711 | 0 | case MCK_dccleaninva: return "MCK_dccleaninva"; |
8712 | 0 | case MCK_dccleaninvidx: return "MCK_dccleaninvidx"; |
8713 | 0 | case MCK_dcfetch: return "MCK_dcfetch"; |
8714 | 0 | case MCK_dcinva: return "MCK_dcinva"; |
8715 | 0 | case MCK_dcinvidx: return "MCK_dcinvidx"; |
8716 | 0 | case MCK_dckill: return "MCK_dckill"; |
8717 | 0 | case MCK_dctagr: return "MCK_dctagr"; |
8718 | 0 | case MCK_dctagw: return "MCK_dctagw"; |
8719 | 0 | case MCK_dczeroa: return "MCK_dczeroa"; |
8720 | 0 | case MCK_dealloc_95_return: return "MCK_dealloc_95_return"; |
8721 | 0 | case MCK_deallocframe: return "MCK_deallocframe"; |
8722 | 0 | case MCK_decbin: return "MCK_decbin"; |
8723 | 0 | case MCK_deinterleave: return "MCK_deinterleave"; |
8724 | 0 | case MCK_deprecated: return "MCK_deprecated"; |
8725 | 0 | case MCK_dfadd: return "MCK_dfadd"; |
8726 | 0 | case MCK_dfclass: return "MCK_dfclass"; |
8727 | 0 | case MCK_dfcmp: return "MCK_dfcmp"; |
8728 | 0 | case MCK_dfmake: return "MCK_dfmake"; |
8729 | 0 | case MCK_dfmax: return "MCK_dfmax"; |
8730 | 0 | case MCK_dfmin: return "MCK_dfmin"; |
8731 | 0 | case MCK_dfmpyfix: return "MCK_dfmpyfix"; |
8732 | 0 | case MCK_dfmpyhh: return "MCK_dfmpyhh"; |
8733 | 0 | case MCK_dfmpylh: return "MCK_dfmpylh"; |
8734 | 0 | case MCK_dfmpyll: return "MCK_dfmpyll"; |
8735 | 0 | case MCK_dfsub: return "MCK_dfsub"; |
8736 | 0 | case MCK_diag0: return "MCK_diag0"; |
8737 | 0 | case MCK_diag1: return "MCK_diag1"; |
8738 | 0 | case MCK_dmlink: return "MCK_dmlink"; |
8739 | 0 | case MCK_dmpause: return "MCK_dmpause"; |
8740 | 0 | case MCK_dmpoll: return "MCK_dmpoll"; |
8741 | 0 | case MCK_dmresume: return "MCK_dmresume"; |
8742 | 0 | case MCK_dmstart: return "MCK_dmstart"; |
8743 | 0 | case MCK_dmwait: return "MCK_dmwait"; |
8744 | 0 | case MCK_endloop0: return "MCK_endloop0"; |
8745 | 0 | case MCK_endloop01: return "MCK_endloop01"; |
8746 | 0 | case MCK_endloop1: return "MCK_endloop1"; |
8747 | 0 | case MCK_eq: return "MCK_eq"; |
8748 | 0 | case MCK_extract: return "MCK_extract"; |
8749 | 0 | case MCK_extractu: return "MCK_extractu"; |
8750 | 0 | case MCK_fastcorner9: return "MCK_fastcorner9"; |
8751 | 0 | case MCK_ge: return "MCK_ge"; |
8752 | 0 | case MCK_getimask: return "MCK_getimask"; |
8753 | 0 | case MCK_geu: return "MCK_geu"; |
8754 | 0 | case MCK_gt: return "MCK_gt"; |
8755 | 0 | case MCK_gtu: return "MCK_gtu"; |
8756 | 0 | case MCK_h: return "MCK_h"; |
8757 | 0 | case MCK_hf: return "MCK_hf"; |
8758 | 0 | case MCK_hi: return "MCK_hi"; |
8759 | 0 | case MCK_hintjr: return "MCK_hintjr"; |
8760 | 0 | case MCK_iassignr: return "MCK_iassignr"; |
8761 | 0 | case MCK_iassignw: return "MCK_iassignw"; |
8762 | 0 | case MCK_icdatar: return "MCK_icdatar"; |
8763 | 0 | case MCK_icdataw: return "MCK_icdataw"; |
8764 | 0 | case MCK_icinva: return "MCK_icinva"; |
8765 | 0 | case MCK_icinvidx: return "MCK_icinvidx"; |
8766 | 0 | case MCK_ickill: return "MCK_ickill"; |
8767 | 0 | case MCK_iconst: return "MCK_iconst"; |
8768 | 0 | case MCK_ictagr: return "MCK_ictagr"; |
8769 | 0 | case MCK_ictagw: return "MCK_ictagw"; |
8770 | 0 | case MCK_if: return "MCK_if"; |
8771 | 0 | case MCK_immext: return "MCK_immext"; |
8772 | 0 | case MCK_insert: return "MCK_insert"; |
8773 | 0 | case MCK_interleave: return "MCK_interleave"; |
8774 | 0 | case MCK_isync: return "MCK_isync"; |
8775 | 0 | case MCK_jump: return "MCK_jump"; |
8776 | 0 | case MCK_jumpr: return "MCK_jumpr"; |
8777 | 0 | case MCK_jumprh: return "MCK_jumprh"; |
8778 | 0 | case MCK_k0lock: return "MCK_k0lock"; |
8779 | 0 | case MCK_k0unlock: return "MCK_k0unlock"; |
8780 | 0 | case MCK_l: return "MCK_l"; |
8781 | 0 | case MCK_l2cleanidx: return "MCK_l2cleanidx"; |
8782 | 0 | case MCK_l2cleaninvidx: return "MCK_l2cleaninvidx"; |
8783 | 0 | case MCK_l2fetch: return "MCK_l2fetch"; |
8784 | 0 | case MCK_l2gclean: return "MCK_l2gclean"; |
8785 | 0 | case MCK_l2gcleaninv: return "MCK_l2gcleaninv"; |
8786 | 0 | case MCK_l2gunlock: return "MCK_l2gunlock"; |
8787 | 0 | case MCK_l2invidx: return "MCK_l2invidx"; |
8788 | 0 | case MCK_l2kill: return "MCK_l2kill"; |
8789 | 0 | case MCK_l2locka: return "MCK_l2locka"; |
8790 | 0 | case MCK_l2tagr: return "MCK_l2tagr"; |
8791 | 0 | case MCK_l2tagw: return "MCK_l2tagw"; |
8792 | 0 | case MCK_l2unlocka: return "MCK_l2unlocka"; |
8793 | 0 | case MCK_lfs: return "MCK_lfs"; |
8794 | 0 | case MCK_lib: return "MCK_lib"; |
8795 | 0 | case MCK_lo: return "MCK_lo"; |
8796 | 0 | case MCK_loop0: return "MCK_loop0"; |
8797 | 0 | case MCK_loop1: return "MCK_loop1"; |
8798 | 0 | case MCK_lsl: return "MCK_lsl"; |
8799 | 0 | case MCK_lsr: return "MCK_lsr"; |
8800 | 0 | case MCK_lt: return "MCK_lt"; |
8801 | 0 | case MCK_ltu: return "MCK_ltu"; |
8802 | 0 | case MCK_mask: return "MCK_mask"; |
8803 | 0 | case MCK_max: return "MCK_max"; |
8804 | 0 | case MCK_maxu: return "MCK_maxu"; |
8805 | 0 | case MCK_memb: return "MCK_memb"; |
8806 | 0 | case MCK_memb_95_fifo: return "MCK_memb_95_fifo"; |
8807 | 0 | case MCK_membh: return "MCK_membh"; |
8808 | 0 | case MCK_memcpy: return "MCK_memcpy"; |
8809 | 0 | case MCK_memd: return "MCK_memd"; |
8810 | 0 | case MCK_memd_95_aq: return "MCK_memd_95_aq"; |
8811 | 0 | case MCK_memd_95_locked: return "MCK_memd_95_locked"; |
8812 | 0 | case MCK_memd_95_rl: return "MCK_memd_95_rl"; |
8813 | 0 | case MCK_memh: return "MCK_memh"; |
8814 | 0 | case MCK_memh_95_fifo: return "MCK_memh_95_fifo"; |
8815 | 0 | case MCK_memub: return "MCK_memub"; |
8816 | 0 | case MCK_memubh: return "MCK_memubh"; |
8817 | 0 | case MCK_memuh: return "MCK_memuh"; |
8818 | 0 | case MCK_memw: return "MCK_memw"; |
8819 | 0 | case MCK_memw_95_aq: return "MCK_memw_95_aq"; |
8820 | 0 | case MCK_memw_95_locked: return "MCK_memw_95_locked"; |
8821 | 0 | case MCK_memw_95_phys: return "MCK_memw_95_phys"; |
8822 | 0 | case MCK_memw_95_rl: return "MCK_memw_95_rl"; |
8823 | 0 | case MCK_min: return "MCK_min"; |
8824 | 0 | case MCK_minu: return "MCK_minu"; |
8825 | 0 | case MCK_modwrap: return "MCK_modwrap"; |
8826 | 0 | case MCK_mpy: return "MCK_mpy"; |
8827 | 0 | case MCK_mpyi: return "MCK_mpyi"; |
8828 | 0 | case MCK_mpysu: return "MCK_mpysu"; |
8829 | 0 | case MCK_mpyu: return "MCK_mpyu"; |
8830 | 0 | case MCK_mpyui: return "MCK_mpyui"; |
8831 | 0 | case MCK_mux: return "MCK_mux"; |
8832 | 0 | case MCK_n: return "MCK_n"; |
8833 | 0 | case MCK_neg: return "MCK_neg"; |
8834 | 0 | case MCK_new: return "MCK_new"; |
8835 | 0 | case MCK_nmi: return "MCK_nmi"; |
8836 | 0 | case MCK_nomatch: return "MCK_nomatch"; |
8837 | 0 | case MCK_nop: return "MCK_nop"; |
8838 | 0 | case MCK_normamt: return "MCK_normamt"; |
8839 | 0 | case MCK_not: return "MCK_not"; |
8840 | 0 | case MCK_nt: return "MCK_nt"; |
8841 | 0 | case MCK_or: return "MCK_or"; |
8842 | 0 | case MCK_packhl: return "MCK_packhl"; |
8843 | 0 | case MCK_parity: return "MCK_parity"; |
8844 | 0 | case MCK_pause: return "MCK_pause"; |
8845 | 0 | case MCK_pmpyw: return "MCK_pmpyw"; |
8846 | 0 | case MCK_popcount: return "MCK_popcount"; |
8847 | 0 | case MCK_pos: return "MCK_pos"; |
8848 | 0 | case MCK_prefixsum: return "MCK_prefixsum"; |
8849 | 0 | case MCK_qf16: return "MCK_qf16"; |
8850 | 0 | case MCK_qf32: return "MCK_qf32"; |
8851 | 0 | case MCK_raw: return "MCK_raw"; |
8852 | 0 | case MCK_release: return "MCK_release"; |
8853 | 0 | case MCK_resume: return "MCK_resume"; |
8854 | 0 | case MCK_rnd: return "MCK_rnd"; |
8855 | 0 | case MCK_rol: return "MCK_rol"; |
8856 | 0 | case MCK_round: return "MCK_round"; |
8857 | 0 | case MCK_rte: return "MCK_rte"; |
8858 | 0 | case MCK_sat: return "MCK_sat"; |
8859 | 0 | case MCK_satb: return "MCK_satb"; |
8860 | 0 | case MCK_sath: return "MCK_sath"; |
8861 | 0 | case MCK_satub: return "MCK_satub"; |
8862 | 0 | case MCK_satuh: return "MCK_satuh"; |
8863 | 0 | case MCK_scale: return "MCK_scale"; |
8864 | 0 | case MCK_scatter_95_release: return "MCK_scatter_95_release"; |
8865 | 0 | case MCK_setbit: return "MCK_setbit"; |
8866 | 0 | case MCK_setimask: return "MCK_setimask"; |
8867 | 0 | case MCK_setprio: return "MCK_setprio"; |
8868 | 0 | case MCK_sf: return "MCK_sf"; |
8869 | 0 | case MCK_sfadd: return "MCK_sfadd"; |
8870 | 0 | case MCK_sfclass: return "MCK_sfclass"; |
8871 | 0 | case MCK_sfcmp: return "MCK_sfcmp"; |
8872 | 0 | case MCK_sffixupd: return "MCK_sffixupd"; |
8873 | 0 | case MCK_sffixupn: return "MCK_sffixupn"; |
8874 | 0 | case MCK_sffixupr: return "MCK_sffixupr"; |
8875 | 0 | case MCK_sfinvsqrta: return "MCK_sfinvsqrta"; |
8876 | 0 | case MCK_sfmake: return "MCK_sfmake"; |
8877 | 0 | case MCK_sfmax: return "MCK_sfmax"; |
8878 | 0 | case MCK_sfmin: return "MCK_sfmin"; |
8879 | 0 | case MCK_sfmpy: return "MCK_sfmpy"; |
8880 | 0 | case MCK_sfrecipa: return "MCK_sfrecipa"; |
8881 | 0 | case MCK_sfsub: return "MCK_sfsub"; |
8882 | 0 | case MCK_sgp: return "MCK_sgp"; |
8883 | 0 | case MCK_shift: return "MCK_shift"; |
8884 | 0 | case MCK_shuffeb: return "MCK_shuffeb"; |
8885 | 0 | case MCK_shuffeh: return "MCK_shuffeh"; |
8886 | 0 | case MCK_shuffob: return "MCK_shuffob"; |
8887 | 0 | case MCK_shuffoh: return "MCK_shuffoh"; |
8888 | 0 | case MCK_siad: return "MCK_siad"; |
8889 | 0 | case MCK_sp1loop0: return "MCK_sp1loop0"; |
8890 | 0 | case MCK_sp2loop0: return "MCK_sp2loop0"; |
8891 | 0 | case MCK_sp3loop0: return "MCK_sp3loop0"; |
8892 | 0 | case MCK_st: return "MCK_st"; |
8893 | 0 | case MCK_start: return "MCK_start"; |
8894 | 0 | case MCK_stop: return "MCK_stop"; |
8895 | 0 | case MCK_sub: return "MCK_sub"; |
8896 | 0 | case MCK_swi: return "MCK_swi"; |
8897 | 0 | case MCK_swiz: return "MCK_swiz"; |
8898 | 0 | case MCK_sxtb: return "MCK_sxtb"; |
8899 | 0 | case MCK_sxth: return "MCK_sxth"; |
8900 | 0 | case MCK_sxtw: return "MCK_sxtw"; |
8901 | 0 | case MCK_syncht: return "MCK_syncht"; |
8902 | 0 | case MCK_t: return "MCK_t"; |
8903 | 0 | case MCK_tableidxb: return "MCK_tableidxb"; |
8904 | 0 | case MCK_tableidxd: return "MCK_tableidxd"; |
8905 | 0 | case MCK_tableidxh: return "MCK_tableidxh"; |
8906 | 0 | case MCK_tableidxw: return "MCK_tableidxw"; |
8907 | 0 | case MCK_tlbinvasid: return "MCK_tlbinvasid"; |
8908 | 0 | case MCK_tlblock: return "MCK_tlblock"; |
8909 | 0 | case MCK_tlbmatch: return "MCK_tlbmatch"; |
8910 | 0 | case MCK_tlboc: return "MCK_tlboc"; |
8911 | 0 | case MCK_tlbp: return "MCK_tlbp"; |
8912 | 0 | case MCK_tlbr: return "MCK_tlbr"; |
8913 | 0 | case MCK_tlbunlock: return "MCK_tlbunlock"; |
8914 | 0 | case MCK_tlbw: return "MCK_tlbw"; |
8915 | 0 | case MCK_tmp: return "MCK_tmp"; |
8916 | 0 | case MCK_togglebit: return "MCK_togglebit"; |
8917 | 0 | case MCK_trace: return "MCK_trace"; |
8918 | 0 | case MCK_trap0: return "MCK_trap0"; |
8919 | 0 | case MCK_trap1: return "MCK_trap1"; |
8920 | 0 | case MCK_tstbit: return "MCK_tstbit"; |
8921 | 0 | case MCK_ub: return "MCK_ub"; |
8922 | 0 | case MCK_uh: return "MCK_uh"; |
8923 | 0 | case MCK_unpause: return "MCK_unpause"; |
8924 | 0 | case MCK_uo: return "MCK_uo"; |
8925 | 0 | case MCK_uw: return "MCK_uw"; |
8926 | 0 | case MCK_v: return "MCK_v"; |
8927 | 0 | case MCK_v10mpy: return "MCK_v10mpy"; |
8928 | 0 | case MCK_v6mpy: return "MCK_v6mpy"; |
8929 | 0 | case MCK_vabs: return "MCK_vabs"; |
8930 | 0 | case MCK_vabsb: return "MCK_vabsb"; |
8931 | 0 | case MCK_vabsdiff: return "MCK_vabsdiff"; |
8932 | 0 | case MCK_vabsdiffb: return "MCK_vabsdiffb"; |
8933 | 0 | case MCK_vabsdiffh: return "MCK_vabsdiffh"; |
8934 | 0 | case MCK_vabsdiffub: return "MCK_vabsdiffub"; |
8935 | 0 | case MCK_vabsdiffuh: return "MCK_vabsdiffuh"; |
8936 | 0 | case MCK_vabsdiffw: return "MCK_vabsdiffw"; |
8937 | 0 | case MCK_vabsh: return "MCK_vabsh"; |
8938 | 0 | case MCK_vabsw: return "MCK_vabsw"; |
8939 | 0 | case MCK_vacsh: return "MCK_vacsh"; |
8940 | 0 | case MCK_vadd: return "MCK_vadd"; |
8941 | 0 | case MCK_vaddb: return "MCK_vaddb"; |
8942 | 0 | case MCK_vaddh: return "MCK_vaddh"; |
8943 | 0 | case MCK_vaddhub: return "MCK_vaddhub"; |
8944 | 0 | case MCK_vaddub: return "MCK_vaddub"; |
8945 | 0 | case MCK_vadduh: return "MCK_vadduh"; |
8946 | 0 | case MCK_vadduw: return "MCK_vadduw"; |
8947 | 0 | case MCK_vaddw: return "MCK_vaddw"; |
8948 | 0 | case MCK_valign: return "MCK_valign"; |
8949 | 0 | case MCK_valignb: return "MCK_valignb"; |
8950 | 0 | case MCK_vand: return "MCK_vand"; |
8951 | 0 | case MCK_vasl: return "MCK_vasl"; |
8952 | 0 | case MCK_vaslh: return "MCK_vaslh"; |
8953 | 0 | case MCK_vaslw: return "MCK_vaslw"; |
8954 | 0 | case MCK_vasr: return "MCK_vasr"; |
8955 | 0 | case MCK_vasrh: return "MCK_vasrh"; |
8956 | 0 | case MCK_vasrhub: return "MCK_vasrhub"; |
8957 | 0 | case MCK_vasrinto: return "MCK_vasrinto"; |
8958 | 0 | case MCK_vasrw: return "MCK_vasrw"; |
8959 | 0 | case MCK_vavg: return "MCK_vavg"; |
8960 | 0 | case MCK_vavgb: return "MCK_vavgb"; |
8961 | 0 | case MCK_vavgh: return "MCK_vavgh"; |
8962 | 0 | case MCK_vavgub: return "MCK_vavgub"; |
8963 | 0 | case MCK_vavguh: return "MCK_vavguh"; |
8964 | 0 | case MCK_vavguw: return "MCK_vavguw"; |
8965 | 0 | case MCK_vavgw: return "MCK_vavgw"; |
8966 | 0 | case MCK_vcl0: return "MCK_vcl0"; |
8967 | 0 | case MCK_vcl0h: return "MCK_vcl0h"; |
8968 | 0 | case MCK_vcl0w: return "MCK_vcl0w"; |
8969 | 0 | case MCK_vclb: return "MCK_vclb"; |
8970 | 0 | case MCK_vclip: return "MCK_vclip"; |
8971 | 0 | case MCK_vcmp: return "MCK_vcmp"; |
8972 | 0 | case MCK_vcmpb: return "MCK_vcmpb"; |
8973 | 0 | case MCK_vcmph: return "MCK_vcmph"; |
8974 | 0 | case MCK_vcmpw: return "MCK_vcmpw"; |
8975 | 0 | case MCK_vcmpyi: return "MCK_vcmpyi"; |
8976 | 0 | case MCK_vcmpyr: return "MCK_vcmpyr"; |
8977 | 0 | case MCK_vcnegh: return "MCK_vcnegh"; |
8978 | 0 | case MCK_vcombine: return "MCK_vcombine"; |
8979 | 0 | case MCK_vconj: return "MCK_vconj"; |
8980 | 0 | case MCK_vcrotate: return "MCK_vcrotate"; |
8981 | 0 | case MCK_vcvt: return "MCK_vcvt"; |
8982 | 0 | case MCK_vdeal: return "MCK_vdeal"; |
8983 | 0 | case MCK_vdealb: return "MCK_vdealb"; |
8984 | 0 | case MCK_vdealb4w: return "MCK_vdealb4w"; |
8985 | 0 | case MCK_vdeale: return "MCK_vdeale"; |
8986 | 0 | case MCK_vdealh: return "MCK_vdealh"; |
8987 | 0 | case MCK_vdelta: return "MCK_vdelta"; |
8988 | 0 | case MCK_vdmpy: return "MCK_vdmpy"; |
8989 | 0 | case MCK_vdmpybsu: return "MCK_vdmpybsu"; |
8990 | 0 | case MCK_vdmpybus: return "MCK_vdmpybus"; |
8991 | 0 | case MCK_vdmpyh: return "MCK_vdmpyh"; |
8992 | 0 | case MCK_vdmpyhb: return "MCK_vdmpyhb"; |
8993 | 0 | case MCK_vdmpyhsu: return "MCK_vdmpyhsu"; |
8994 | 0 | case MCK_vdmpyw: return "MCK_vdmpyw"; |
8995 | 0 | case MCK_vdsad: return "MCK_vdsad"; |
8996 | 0 | case MCK_vdsaduh: return "MCK_vdsaduh"; |
8997 | 0 | case MCK_vextract: return "MCK_vextract"; |
8998 | 0 | case MCK_vfmax: return "MCK_vfmax"; |
8999 | 0 | case MCK_vfmin: return "MCK_vfmin"; |
9000 | 0 | case MCK_vfmv: return "MCK_vfmv"; |
9001 | 0 | case MCK_vfneg: return "MCK_vfneg"; |
9002 | 0 | case MCK_vgather: return "MCK_vgather"; |
9003 | 0 | case MCK_vhist: return "MCK_vhist"; |
9004 | 0 | case MCK_vinsert: return "MCK_vinsert"; |
9005 | 0 | case MCK_vitpack: return "MCK_vitpack"; |
9006 | 0 | case MCK_vlalign: return "MCK_vlalign"; |
9007 | 0 | case MCK_vlslh: return "MCK_vlslh"; |
9008 | 0 | case MCK_vlslw: return "MCK_vlslw"; |
9009 | 0 | case MCK_vlsr: return "MCK_vlsr"; |
9010 | 0 | case MCK_vlsrh: return "MCK_vlsrh"; |
9011 | 0 | case MCK_vlsrw: return "MCK_vlsrw"; |
9012 | 0 | case MCK_vlut16: return "MCK_vlut16"; |
9013 | 0 | case MCK_vlut32: return "MCK_vlut32"; |
9014 | 0 | case MCK_vlut4: return "MCK_vlut4"; |
9015 | 0 | case MCK_vmax: return "MCK_vmax"; |
9016 | 0 | case MCK_vmaxb: return "MCK_vmaxb"; |
9017 | 0 | case MCK_vmaxh: return "MCK_vmaxh"; |
9018 | 0 | case MCK_vmaxub: return "MCK_vmaxub"; |
9019 | 0 | case MCK_vmaxuh: return "MCK_vmaxuh"; |
9020 | 0 | case MCK_vmaxuw: return "MCK_vmaxuw"; |
9021 | 0 | case MCK_vmaxw: return "MCK_vmaxw"; |
9022 | 0 | case MCK_vmem: return "MCK_vmem"; |
9023 | 0 | case MCK_vmemu: return "MCK_vmemu"; |
9024 | 0 | case MCK_vmin: return "MCK_vmin"; |
9025 | 0 | case MCK_vminb: return "MCK_vminb"; |
9026 | 0 | case MCK_vminh: return "MCK_vminh"; |
9027 | 0 | case MCK_vminub: return "MCK_vminub"; |
9028 | 0 | case MCK_vminuh: return "MCK_vminuh"; |
9029 | 0 | case MCK_vminuw: return "MCK_vminuw"; |
9030 | 0 | case MCK_vminw: return "MCK_vminw"; |
9031 | 0 | case MCK_vmpa: return "MCK_vmpa"; |
9032 | 0 | case MCK_vmpabus: return "MCK_vmpabus"; |
9033 | 0 | case MCK_vmpabuu: return "MCK_vmpabuu"; |
9034 | 0 | case MCK_vmpahb: return "MCK_vmpahb"; |
9035 | 0 | case MCK_vmpauhb: return "MCK_vmpauhb"; |
9036 | 0 | case MCK_vmps: return "MCK_vmps"; |
9037 | 0 | case MCK_vmpy: return "MCK_vmpy"; |
9038 | 0 | case MCK_vmpyb: return "MCK_vmpyb"; |
9039 | 0 | case MCK_vmpybsu: return "MCK_vmpybsu"; |
9040 | 0 | case MCK_vmpybu: return "MCK_vmpybu"; |
9041 | 0 | case MCK_vmpybus: return "MCK_vmpybus"; |
9042 | 0 | case MCK_vmpye: return "MCK_vmpye"; |
9043 | 0 | case MCK_vmpyeh: return "MCK_vmpyeh"; |
9044 | 0 | case MCK_vmpyewuh: return "MCK_vmpyewuh"; |
9045 | 0 | case MCK_vmpyh: return "MCK_vmpyh"; |
9046 | 0 | case MCK_vmpyhsu: return "MCK_vmpyhsu"; |
9047 | 0 | case MCK_vmpyhus: return "MCK_vmpyhus"; |
9048 | 0 | case MCK_vmpyi: return "MCK_vmpyi"; |
9049 | 0 | case MCK_vmpyie: return "MCK_vmpyie"; |
9050 | 0 | case MCK_vmpyieo: return "MCK_vmpyieo"; |
9051 | 0 | case MCK_vmpyiewh: return "MCK_vmpyiewh"; |
9052 | 0 | case MCK_vmpyiewuh: return "MCK_vmpyiewuh"; |
9053 | 0 | case MCK_vmpyih: return "MCK_vmpyih"; |
9054 | 0 | case MCK_vmpyihb: return "MCK_vmpyihb"; |
9055 | 0 | case MCK_vmpyio: return "MCK_vmpyio"; |
9056 | 0 | case MCK_vmpyiowh: return "MCK_vmpyiowh"; |
9057 | 0 | case MCK_vmpyiwb: return "MCK_vmpyiwb"; |
9058 | 0 | case MCK_vmpyiwh: return "MCK_vmpyiwh"; |
9059 | 0 | case MCK_vmpyiwub: return "MCK_vmpyiwub"; |
9060 | 0 | case MCK_vmpyo: return "MCK_vmpyo"; |
9061 | 0 | case MCK_vmpyowh: return "MCK_vmpyowh"; |
9062 | 0 | case MCK_vmpyub: return "MCK_vmpyub"; |
9063 | 0 | case MCK_vmpyuh: return "MCK_vmpyuh"; |
9064 | 0 | case MCK_vmpyweh: return "MCK_vmpyweh"; |
9065 | 0 | case MCK_vmpyweuh: return "MCK_vmpyweuh"; |
9066 | 0 | case MCK_vmpywoh: return "MCK_vmpywoh"; |
9067 | 0 | case MCK_vmpywouh: return "MCK_vmpywouh"; |
9068 | 0 | case MCK_vmux: return "MCK_vmux"; |
9069 | 0 | case MCK_vnavg: return "MCK_vnavg"; |
9070 | 0 | case MCK_vnavgb: return "MCK_vnavgb"; |
9071 | 0 | case MCK_vnavgh: return "MCK_vnavgh"; |
9072 | 0 | case MCK_vnavgub: return "MCK_vnavgub"; |
9073 | 0 | case MCK_vnavgw: return "MCK_vnavgw"; |
9074 | 0 | case MCK_vnormamt: return "MCK_vnormamt"; |
9075 | 0 | case MCK_vnormamth: return "MCK_vnormamth"; |
9076 | 0 | case MCK_vnormamtw: return "MCK_vnormamtw"; |
9077 | 0 | case MCK_vnot: return "MCK_vnot"; |
9078 | 0 | case MCK_vor: return "MCK_vor"; |
9079 | 0 | case MCK_vpack: return "MCK_vpack"; |
9080 | 0 | case MCK_vpacke: return "MCK_vpacke"; |
9081 | 0 | case MCK_vpackeb: return "MCK_vpackeb"; |
9082 | 0 | case MCK_vpackeh: return "MCK_vpackeh"; |
9083 | 0 | case MCK_vpackhb: return "MCK_vpackhb"; |
9084 | 0 | case MCK_vpackhub: return "MCK_vpackhub"; |
9085 | 0 | case MCK_vpacko: return "MCK_vpacko"; |
9086 | 0 | case MCK_vpackob: return "MCK_vpackob"; |
9087 | 0 | case MCK_vpackoh: return "MCK_vpackoh"; |
9088 | 0 | case MCK_vpackwh: return "MCK_vpackwh"; |
9089 | 0 | case MCK_vpackwuh: return "MCK_vpackwuh"; |
9090 | 0 | case MCK_vpmpyh: return "MCK_vpmpyh"; |
9091 | 0 | case MCK_vpopcount: return "MCK_vpopcount"; |
9092 | 0 | case MCK_vpopcounth: return "MCK_vpopcounth"; |
9093 | 0 | case MCK_vr16mpyz: return "MCK_vr16mpyz"; |
9094 | 0 | case MCK_vr16mpyzs: return "MCK_vr16mpyzs"; |
9095 | 0 | case MCK_vr8mpyz: return "MCK_vr8mpyz"; |
9096 | 0 | case MCK_vraddh: return "MCK_vraddh"; |
9097 | 0 | case MCK_vraddub: return "MCK_vraddub"; |
9098 | 0 | case MCK_vradduh: return "MCK_vradduh"; |
9099 | 0 | case MCK_vrcmpyi: return "MCK_vrcmpyi"; |
9100 | 0 | case MCK_vrcmpyr: return "MCK_vrcmpyr"; |
9101 | 0 | case MCK_vrcmpys: return "MCK_vrcmpys"; |
9102 | 0 | case MCK_vrcnegh: return "MCK_vrcnegh"; |
9103 | 0 | case MCK_vrcrotate: return "MCK_vrcrotate"; |
9104 | 0 | case MCK_vrdelta: return "MCK_vrdelta"; |
9105 | 0 | case MCK_vrmaxh: return "MCK_vrmaxh"; |
9106 | 0 | case MCK_vrmaxuh: return "MCK_vrmaxuh"; |
9107 | 0 | case MCK_vrmaxuw: return "MCK_vrmaxuw"; |
9108 | 0 | case MCK_vrmaxw: return "MCK_vrmaxw"; |
9109 | 0 | case MCK_vrminh: return "MCK_vrminh"; |
9110 | 0 | case MCK_vrminuh: return "MCK_vrminuh"; |
9111 | 0 | case MCK_vrminuw: return "MCK_vrminuw"; |
9112 | 0 | case MCK_vrminw: return "MCK_vrminw"; |
9113 | 0 | case MCK_vrmpy: return "MCK_vrmpy"; |
9114 | 0 | case MCK_vrmpyb: return "MCK_vrmpyb"; |
9115 | 0 | case MCK_vrmpybsu: return "MCK_vrmpybsu"; |
9116 | 0 | case MCK_vrmpybu: return "MCK_vrmpybu"; |
9117 | 0 | case MCK_vrmpybus: return "MCK_vrmpybus"; |
9118 | 0 | case MCK_vrmpyh: return "MCK_vrmpyh"; |
9119 | 0 | case MCK_vrmpyub: return "MCK_vrmpyub"; |
9120 | 0 | case MCK_vrmpyweh: return "MCK_vrmpyweh"; |
9121 | 0 | case MCK_vrmpywoh: return "MCK_vrmpywoh"; |
9122 | 0 | case MCK_vrmpyz: return "MCK_vrmpyz"; |
9123 | 0 | case MCK_vrndwh: return "MCK_vrndwh"; |
9124 | 0 | case MCK_vror: return "MCK_vror"; |
9125 | 0 | case MCK_vrotr: return "MCK_vrotr"; |
9126 | 0 | case MCK_vround: return "MCK_vround"; |
9127 | 0 | case MCK_vroundhb: return "MCK_vroundhb"; |
9128 | 0 | case MCK_vroundhub: return "MCK_vroundhub"; |
9129 | 0 | case MCK_vrounduhub: return "MCK_vrounduhub"; |
9130 | 0 | case MCK_vrounduwuh: return "MCK_vrounduwuh"; |
9131 | 0 | case MCK_vroundwh: return "MCK_vroundwh"; |
9132 | 0 | case MCK_vroundwuh: return "MCK_vroundwuh"; |
9133 | 0 | case MCK_vrsad: return "MCK_vrsad"; |
9134 | 0 | case MCK_vrsadub: return "MCK_vrsadub"; |
9135 | 0 | case MCK_vsat: return "MCK_vsat"; |
9136 | 0 | case MCK_vsatdw: return "MCK_vsatdw"; |
9137 | 0 | case MCK_vsathb: return "MCK_vsathb"; |
9138 | 0 | case MCK_vsathub: return "MCK_vsathub"; |
9139 | 0 | case MCK_vsatuwuh: return "MCK_vsatuwuh"; |
9140 | 0 | case MCK_vsatwh: return "MCK_vsatwh"; |
9141 | 0 | case MCK_vsatwuh: return "MCK_vsatwuh"; |
9142 | 0 | case MCK_vscatter: return "MCK_vscatter"; |
9143 | 0 | case MCK_vsetq: return "MCK_vsetq"; |
9144 | 0 | case MCK_vsetq2: return "MCK_vsetq2"; |
9145 | 0 | case MCK_vshuff: return "MCK_vshuff"; |
9146 | 0 | case MCK_vshuffb: return "MCK_vshuffb"; |
9147 | 0 | case MCK_vshuffe: return "MCK_vshuffe"; |
9148 | 0 | case MCK_vshuffeb: return "MCK_vshuffeb"; |
9149 | 0 | case MCK_vshuffeh: return "MCK_vshuffeh"; |
9150 | 0 | case MCK_vshuffh: return "MCK_vshuffh"; |
9151 | 0 | case MCK_vshuffo: return "MCK_vshuffo"; |
9152 | 0 | case MCK_vshuffob: return "MCK_vshuffob"; |
9153 | 0 | case MCK_vshuffoe: return "MCK_vshuffoe"; |
9154 | 0 | case MCK_vshuffoeb: return "MCK_vshuffoeb"; |
9155 | 0 | case MCK_vshuffoeh: return "MCK_vshuffoeh"; |
9156 | 0 | case MCK_vshuffoh: return "MCK_vshuffoh"; |
9157 | 0 | case MCK_vsplat: return "MCK_vsplat"; |
9158 | 0 | case MCK_vsplatb: return "MCK_vsplatb"; |
9159 | 0 | case MCK_vsplath: return "MCK_vsplath"; |
9160 | 0 | case MCK_vspliceb: return "MCK_vspliceb"; |
9161 | 0 | case MCK_vsub: return "MCK_vsub"; |
9162 | 0 | case MCK_vsubb: return "MCK_vsubb"; |
9163 | 0 | case MCK_vsubh: return "MCK_vsubh"; |
9164 | 0 | case MCK_vsubub: return "MCK_vsubub"; |
9165 | 0 | case MCK_vsubuh: return "MCK_vsubuh"; |
9166 | 0 | case MCK_vsubuw: return "MCK_vsubuw"; |
9167 | 0 | case MCK_vsubw: return "MCK_vsubw"; |
9168 | 0 | case MCK_vswap: return "MCK_vswap"; |
9169 | 0 | case MCK_vsxt: return "MCK_vsxt"; |
9170 | 0 | case MCK_vsxtb: return "MCK_vsxtb"; |
9171 | 0 | case MCK_vsxtbh: return "MCK_vsxtbh"; |
9172 | 0 | case MCK_vsxth: return "MCK_vsxth"; |
9173 | 0 | case MCK_vsxthw: return "MCK_vsxthw"; |
9174 | 0 | case MCK_vtmpy: return "MCK_vtmpy"; |
9175 | 0 | case MCK_vtmpyb: return "MCK_vtmpyb"; |
9176 | 0 | case MCK_vtmpybus: return "MCK_vtmpybus"; |
9177 | 0 | case MCK_vtmpyhb: return "MCK_vtmpyhb"; |
9178 | 0 | case MCK_vtrans2x2: return "MCK_vtrans2x2"; |
9179 | 0 | case MCK_vtrunehb: return "MCK_vtrunehb"; |
9180 | 0 | case MCK_vtrunewh: return "MCK_vtrunewh"; |
9181 | 0 | case MCK_vtrunohb: return "MCK_vtrunohb"; |
9182 | 0 | case MCK_vtrunowh: return "MCK_vtrunowh"; |
9183 | 0 | case MCK_vunpack: return "MCK_vunpack"; |
9184 | 0 | case MCK_vunpackb: return "MCK_vunpackb"; |
9185 | 0 | case MCK_vunpackh: return "MCK_vunpackh"; |
9186 | 0 | case MCK_vunpacko: return "MCK_vunpacko"; |
9187 | 0 | case MCK_vunpackob: return "MCK_vunpackob"; |
9188 | 0 | case MCK_vunpackoh: return "MCK_vunpackoh"; |
9189 | 0 | case MCK_vunpackub: return "MCK_vunpackub"; |
9190 | 0 | case MCK_vunpackuh: return "MCK_vunpackuh"; |
9191 | 0 | case MCK_vwhist128: return "MCK_vwhist128"; |
9192 | 0 | case MCK_vwhist256: return "MCK_vwhist256"; |
9193 | 0 | case MCK_vxaddsubh: return "MCK_vxaddsubh"; |
9194 | 0 | case MCK_vxaddsubw: return "MCK_vxaddsubw"; |
9195 | 0 | case MCK_vxor: return "MCK_vxor"; |
9196 | 0 | case MCK_vxsubaddh: return "MCK_vxsubaddh"; |
9197 | 0 | case MCK_vxsubaddw: return "MCK_vxsubaddw"; |
9198 | 0 | case MCK_vzxt: return "MCK_vzxt"; |
9199 | 0 | case MCK_vzxtb: return "MCK_vzxtb"; |
9200 | 0 | case MCK_vzxtbh: return "MCK_vzxtbh"; |
9201 | 0 | case MCK_vzxth: return "MCK_vzxth"; |
9202 | 0 | case MCK_vzxthw: return "MCK_vzxthw"; |
9203 | 0 | case MCK_w: return "MCK_w"; |
9204 | 0 | case MCK_wait: return "MCK_wait"; |
9205 | 0 | case MCK_xor: return "MCK_xor"; |
9206 | 0 | case MCK_z: return "MCK_z"; |
9207 | 0 | case MCK_zextract: return "MCK_zextract"; |
9208 | 0 | case MCK_zxtb: return "MCK_zxtb"; |
9209 | 0 | case MCK_zxth: return "MCK_zxth"; |
9210 | 0 | case MCK__124_: return "MCK__124_"; |
9211 | 0 | case MCK__126_: return "MCK__126_"; |
9212 | 0 | case MCK_Reg19: return "MCK_Reg19"; |
9213 | 0 | case MCK_Reg11: return "MCK_Reg11"; |
9214 | 0 | case MCK_DIAG: return "MCK_DIAG"; |
9215 | 0 | case MCK_GP: return "MCK_GP"; |
9216 | 0 | case MCK_P0: return "MCK_P0"; |
9217 | 0 | case MCK_P1: return "MCK_P1"; |
9218 | 0 | case MCK_P3: return "MCK_P3"; |
9219 | 0 | case MCK_PC: return "MCK_PC"; |
9220 | 0 | case MCK_SGP0: return "MCK_SGP0"; |
9221 | 0 | case MCK_SGP1: return "MCK_SGP1"; |
9222 | 0 | case MCK_UsrBits: return "MCK_UsrBits"; |
9223 | 0 | case MCK_V65Regs: return "MCK_V65Regs"; |
9224 | 0 | case MCK_ModRegs: return "MCK_ModRegs"; |
9225 | 0 | case MCK_Reg20: return "MCK_Reg20"; |
9226 | 0 | case MCK_Reg3: return "MCK_Reg3"; |
9227 | 0 | case MCK_HvxQR: return "MCK_HvxQR"; |
9228 | 0 | case MCK_PredRegs: return "MCK_PredRegs"; |
9229 | 0 | case MCK_Reg16: return "MCK_Reg16"; |
9230 | 0 | case MCK_GeneralDoubleLow8Regs: return "MCK_GeneralDoubleLow8Regs"; |
9231 | 0 | case MCK_HvxVQR: return "MCK_HvxVQR"; |
9232 | 0 | case MCK_IntRegsLow8: return "MCK_IntRegsLow8"; |
9233 | 0 | case MCK_V62Regs: return "MCK_V62Regs"; |
9234 | 0 | case MCK_CtrRegs64: return "MCK_CtrRegs64"; |
9235 | 0 | case MCK_DoubleRegs: return "MCK_DoubleRegs"; |
9236 | 0 | case MCK_GeneralSubRegs: return "MCK_GeneralSubRegs"; |
9237 | 0 | case MCK_GuestRegs64: return "MCK_GuestRegs64"; |
9238 | 0 | case MCK_VectRegRev: return "MCK_VectRegRev"; |
9239 | 0 | case MCK_CtrRegs: return "MCK_CtrRegs"; |
9240 | 0 | case MCK_GuestRegs: return "MCK_GuestRegs"; |
9241 | 0 | case MCK_HvxWR: return "MCK_HvxWR"; |
9242 | 0 | case MCK_IntRegs: return "MCK_IntRegs"; |
9243 | 0 | case MCK_HvxVR: return "MCK_HvxVR"; |
9244 | 0 | case MCK_SysRegs64: return "MCK_SysRegs64"; |
9245 | 0 | case MCK_SysRegs: return "MCK_SysRegs"; |
9246 | 0 | case MCK_Imm: return "MCK_Imm"; |
9247 | 0 | case MCK_a30_2Imm: return "MCK_a30_2Imm"; |
9248 | 0 | case MCK_b13_2Imm: return "MCK_b13_2Imm"; |
9249 | 0 | case MCK_b15_2Imm: return "MCK_b15_2Imm"; |
9250 | 0 | case MCK_b30_2Imm: return "MCK_b30_2Imm"; |
9251 | 0 | case MCK_f32Imm: return "MCK_f32Imm"; |
9252 | 0 | case MCK_f64Imm: return "MCK_f64Imm"; |
9253 | 0 | case MCK_m32_0Imm: return "MCK_m32_0Imm"; |
9254 | 0 | case MCK_n1Const: return "MCK_n1Const"; |
9255 | 0 | case MCK_s27_2Imm: return "MCK_s27_2Imm"; |
9256 | 0 | case MCK_s29_3Imm: return "MCK_s29_3Imm"; |
9257 | 0 | case MCK_s30_2Imm: return "MCK_s30_2Imm"; |
9258 | 0 | case MCK_s31_1Imm: return "MCK_s31_1Imm"; |
9259 | 0 | case MCK_s32_0Imm: return "MCK_s32_0Imm"; |
9260 | 0 | case MCK_s3_0Imm: return "MCK_s3_0Imm"; |
9261 | 0 | case MCK_s4_0Imm: return "MCK_s4_0Imm"; |
9262 | 0 | case MCK_s4_1Imm: return "MCK_s4_1Imm"; |
9263 | 0 | case MCK_s4_2Imm: return "MCK_s4_2Imm"; |
9264 | 0 | case MCK_s4_3Imm: return "MCK_s4_3Imm"; |
9265 | 0 | case MCK_s6_0Imm: return "MCK_s6_0Imm"; |
9266 | 0 | case MCK_s6_3Imm: return "MCK_s6_3Imm"; |
9267 | 0 | case MCK_s8_0Imm: return "MCK_s8_0Imm"; |
9268 | 0 | case MCK_s9_0Imm: return "MCK_s9_0Imm"; |
9269 | 0 | case MCK_sgp10Const: return "MCK_sgp10Const"; |
9270 | 0 | case MCK_u10_0Imm: return "MCK_u10_0Imm"; |
9271 | 0 | case MCK_u11_3Imm: return "MCK_u11_3Imm"; |
9272 | 0 | case MCK_u16_0Imm: return "MCK_u16_0Imm"; |
9273 | 0 | case MCK_u1_0Imm: return "MCK_u1_0Imm"; |
9274 | 0 | case MCK_u26_6Imm: return "MCK_u26_6Imm"; |
9275 | 0 | case MCK_u29_3Imm: return "MCK_u29_3Imm"; |
9276 | 0 | case MCK_u2_0Imm: return "MCK_u2_0Imm"; |
9277 | 0 | case MCK_u30_2Imm: return "MCK_u30_2Imm"; |
9278 | 0 | case MCK_u31_1Imm: return "MCK_u31_1Imm"; |
9279 | 0 | case MCK_u32_0Imm: return "MCK_u32_0Imm"; |
9280 | 0 | case MCK_u3_0Imm: return "MCK_u3_0Imm"; |
9281 | 0 | case MCK_u3_1Imm: return "MCK_u3_1Imm"; |
9282 | 0 | case MCK_u4_0Imm: return "MCK_u4_0Imm"; |
9283 | 0 | case MCK_u4_2Imm: return "MCK_u4_2Imm"; |
9284 | 0 | case MCK_u5_0Imm: return "MCK_u5_0Imm"; |
9285 | 0 | case MCK_u5_2Imm: return "MCK_u5_2Imm"; |
9286 | 0 | case MCK_u5_3Imm: return "MCK_u5_3Imm"; |
9287 | 0 | case MCK_u64_0Imm: return "MCK_u64_0Imm"; |
9288 | 0 | case MCK_u6_0Imm: return "MCK_u6_0Imm"; |
9289 | 0 | case MCK_u6_1Imm: return "MCK_u6_1Imm"; |
9290 | 0 | case MCK_u6_2Imm: return "MCK_u6_2Imm"; |
9291 | 0 | case MCK_u7_0Imm: return "MCK_u7_0Imm"; |
9292 | 0 | case MCK_u8_0Imm: return "MCK_u8_0Imm"; |
9293 | 0 | case NumMatchClassKinds: return "NumMatchClassKinds"; |
9294 | 0 | } |
9295 | 0 | llvm_unreachable("unhandled MatchClassKind!"); |
9296 | 0 | } |
9297 | | |
9298 | | #endif // NDEBUG |
9299 | | FeatureBitset HexagonAsmParser:: |
9300 | 0 | ComputeAvailableFeatures(const FeatureBitset &FB) const { |
9301 | 0 | FeatureBitset Features; |
9302 | 0 | if (FB[Hexagon::ArchV5]) |
9303 | 0 | Features.set(Feature_HasV5Bit); |
9304 | 0 | if (FB[Hexagon::ArchV55]) |
9305 | 0 | Features.set(Feature_HasV55Bit); |
9306 | 0 | if (FB[Hexagon::ArchV60]) |
9307 | 0 | Features.set(Feature_HasV60Bit); |
9308 | 0 | if (FB[Hexagon::ArchV62]) |
9309 | 0 | Features.set(Feature_HasV62Bit); |
9310 | 0 | if (FB[Hexagon::ArchV65]) |
9311 | 0 | Features.set(Feature_HasV65Bit); |
9312 | 0 | if (FB[Hexagon::ArchV66]) |
9313 | 0 | Features.set(Feature_HasV66Bit); |
9314 | 0 | if (FB[Hexagon::ArchV67]) |
9315 | 0 | Features.set(Feature_HasV67Bit); |
9316 | 0 | if (FB[Hexagon::ArchV68]) |
9317 | 0 | Features.set(Feature_HasV68Bit); |
9318 | 0 | if (FB[Hexagon::ArchV69]) |
9319 | 0 | Features.set(Feature_HasV69Bit); |
9320 | 0 | if (FB[Hexagon::ArchV71]) |
9321 | 0 | Features.set(Feature_HasV71Bit); |
9322 | 0 | if (FB[Hexagon::ArchV73]) |
9323 | 0 | Features.set(Feature_HasV73Bit); |
9324 | 0 | if (FB[Hexagon::ExtensionHVX64B]) |
9325 | 0 | Features.set(Feature_UseHVX64BBit); |
9326 | 0 | if (FB[Hexagon::ExtensionHVX128B]) |
9327 | 0 | Features.set(Feature_UseHVX128BBit); |
9328 | 0 | if (FB[Hexagon::ExtensionHVXV60]) |
9329 | 0 | Features.set(Feature_UseHVXBit); |
9330 | 0 | if (FB[Hexagon::ExtensionHVXV60]) |
9331 | 0 | Features.set(Feature_UseHVXV60Bit); |
9332 | 0 | if (FB[Hexagon::ExtensionHVXV62]) |
9333 | 0 | Features.set(Feature_UseHVXV62Bit); |
9334 | 0 | if (FB[Hexagon::ExtensionHVXV65]) |
9335 | 0 | Features.set(Feature_UseHVXV65Bit); |
9336 | 0 | if (FB[Hexagon::ExtensionHVXV66]) |
9337 | 0 | Features.set(Feature_UseHVXV66Bit); |
9338 | 0 | if (FB[Hexagon::ExtensionHVXV67]) |
9339 | 0 | Features.set(Feature_UseHVXV67Bit); |
9340 | 0 | if (FB[Hexagon::ExtensionHVXV68]) |
9341 | 0 | Features.set(Feature_UseHVXV68Bit); |
9342 | 0 | if (FB[Hexagon::ExtensionHVXV69]) |
9343 | 0 | Features.set(Feature_UseHVXV69Bit); |
9344 | 0 | if (FB[Hexagon::ExtensionHVXV71]) |
9345 | 0 | Features.set(Feature_UseHVXV71Bit); |
9346 | 0 | if (FB[Hexagon::ExtensionHVXV73]) |
9347 | 0 | Features.set(Feature_UseHVXV73Bit); |
9348 | 0 | if (FB[Hexagon::ExtensionAudio]) |
9349 | 0 | Features.set(Feature_UseAudioBit); |
9350 | 0 | if (FB[Hexagon::ExtensionZReg]) |
9351 | 0 | Features.set(Feature_UseZRegBit); |
9352 | 0 | if (FB[Hexagon::FeaturePreV65]) |
9353 | 0 | Features.set(Feature_HasPreV65Bit); |
9354 | 0 | if (FB[Hexagon::ExtensionHVXIEEEFP]) |
9355 | 0 | Features.set(Feature_UseHVXIEEEFPBit); |
9356 | 0 | if (FB[Hexagon::ExtensionHVXQFloat]) |
9357 | 0 | Features.set(Feature_UseHVXQFloatBit); |
9358 | 0 | if (FB[Hexagon::FeatureMemNoShuf]) |
9359 | 0 | Features.set(Feature_HasMemNoShufBit); |
9360 | 0 | if (FB[Hexagon::FeatureCabac]) |
9361 | 0 | Features.set(Feature_UseCabacBit); |
9362 | 0 | return Features; |
9363 | 0 | } |
9364 | | |
9365 | | static bool checkAsmTiedOperandConstraints(const HexagonAsmParser&AsmParser, |
9366 | | unsigned Kind, |
9367 | | const OperandVector &Operands, |
9368 | 0 | uint64_t &ErrorInfo) { |
9369 | 0 | assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!"); |
9370 | 0 | const uint8_t *Converter = ConversionTable[Kind]; |
9371 | 0 | for (const uint8_t *p = Converter; *p; p += 2) { |
9372 | 0 | switch (*p) { |
9373 | 0 | case CVT_Tied: { |
9374 | 0 | unsigned OpIdx = *(p + 1); |
9375 | 0 | assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) - |
9376 | 0 | std::begin(TiedAsmOperandTable)) && |
9377 | 0 | "Tied operand not found"); |
9378 | 0 | unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1]; |
9379 | 0 | unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2]; |
9380 | 0 | if (OpndNum1 != OpndNum2) { |
9381 | 0 | auto &SrcOp1 = Operands[OpndNum1]; |
9382 | 0 | auto &SrcOp2 = Operands[OpndNum2]; |
9383 | 0 | if (!AsmParser.areEqualRegs(*SrcOp1, *SrcOp2)) { |
9384 | 0 | ErrorInfo = OpndNum2; |
9385 | 0 | return false; |
9386 | 0 | } |
9387 | 0 | } |
9388 | 0 | break; |
9389 | 0 | } |
9390 | 0 | default: |
9391 | 0 | break; |
9392 | 0 | } |
9393 | 0 | } |
9394 | 0 | return true; |
9395 | 0 | } |
9396 | | |
9397 | | static const char MnemonicTable[] = |
9398 | | "\000\nallocframe\007barrier\005brkpt\004call\005callr\006callrh\004ciad" |
9399 | | "\006crswap\004cswi\010dccleana\ndccleanidx\013dccleaninva\015dccleaninv" |
9400 | | "idx\007dcfetch\006dcinva\010dcinvidx\006dckill\006dctagw\007dczeroa\016" |
9401 | | "dealloc_return\014deallocframe\004diag\005diag0\005diag1\006dmlink\010d" |
9402 | | "mresume\007dmstart\006duplex\010endloop0\tendloop01\010endloop1\006hint" |
9403 | | "jr\010iassignw\007icdataw\006icinva\010icinvidx\006ickill\006ictagw\002" |
9404 | | "if\006immext\005isync\004jump\005jumpr\006jumprh\006k0lock\010k0unlock\n" |
9405 | | "l2cleanidx\015l2cleaninvidx\007l2fetch\010l2gclean\013l2gcleaninv\tl2gu" |
9406 | | "nlock\010l2invidx\006l2kill\006l2tagw\tl2unlocka\005loop0\005loop1\004m" |
9407 | | "emb\006memcpy\004memd\013memd_locked\007memd_rl\004memh\004memw\013memw" |
9408 | | "_locked\007memw_rl\003nmi\003nop\002p0\002p1\002p3\005pause\007release\006" |
9409 | | "resume\003rte\010setimask\007setprio\004siad\005start\004stop\003swi\006" |
9410 | | "syncht\ntlbinvasid\007tlblock\ttlbunlock\004tlbw\005trace\005trap0\005t" |
9411 | | "rap1\007unpause\005vdeal\005vhist\004vmem\005vmemu\010vscatter\006vshuf" |
9412 | | "f\004vtmp\tvtrans2x2\tvwhist128\tvwhist256\004wait\001z"; |
9413 | | |
9414 | | // Feature bitsets. |
9415 | | enum : uint8_t { |
9416 | | AMFBS_None, |
9417 | | AMFBS_HasPreV65, |
9418 | | AMFBS_HasV55, |
9419 | | AMFBS_HasV60, |
9420 | | AMFBS_HasV62, |
9421 | | AMFBS_HasV65, |
9422 | | AMFBS_HasV66, |
9423 | | AMFBS_HasV67, |
9424 | | AMFBS_HasV68, |
9425 | | AMFBS_HasV73, |
9426 | | AMFBS_UseCabac, |
9427 | | AMFBS_UseHVX, |
9428 | | AMFBS_UseHVXV60, |
9429 | | AMFBS_UseHVXV62, |
9430 | | AMFBS_UseHVXV65, |
9431 | | AMFBS_UseHVXV66, |
9432 | | AMFBS_UseHVXV68, |
9433 | | AMFBS_UseHVXV69, |
9434 | | AMFBS_UseHVXV73, |
9435 | | AMFBS_HasV67_UseAudio, |
9436 | | AMFBS_UseHVXV66_UseZReg, |
9437 | | AMFBS_UseHVXV68_UseHVXIEEEFP, |
9438 | | AMFBS_UseHVXV68_UseHVXQFloat, |
9439 | | AMFBS_UseHVXV73_UseHVXIEEEFP, |
9440 | | AMFBS_UseHVXV73_UseHVXQFloat, |
9441 | | }; |
9442 | | |
9443 | | static constexpr FeatureBitset FeatureBitsets[] = { |
9444 | | {}, // AMFBS_None |
9445 | | {Feature_HasPreV65Bit, }, |
9446 | | {Feature_HasV55Bit, }, |
9447 | | {Feature_HasV60Bit, }, |
9448 | | {Feature_HasV62Bit, }, |
9449 | | {Feature_HasV65Bit, }, |
9450 | | {Feature_HasV66Bit, }, |
9451 | | {Feature_HasV67Bit, }, |
9452 | | {Feature_HasV68Bit, }, |
9453 | | {Feature_HasV73Bit, }, |
9454 | | {Feature_UseCabacBit, }, |
9455 | | {Feature_UseHVXBit, }, |
9456 | | {Feature_UseHVXV60Bit, }, |
9457 | | {Feature_UseHVXV62Bit, }, |
9458 | | {Feature_UseHVXV65Bit, }, |
9459 | | {Feature_UseHVXV66Bit, }, |
9460 | | {Feature_UseHVXV68Bit, }, |
9461 | | {Feature_UseHVXV69Bit, }, |
9462 | | {Feature_UseHVXV73Bit, }, |
9463 | | {Feature_HasV67Bit, Feature_UseAudioBit, }, |
9464 | | {Feature_UseHVXV66Bit, Feature_UseZRegBit, }, |
9465 | | {Feature_UseHVXV68Bit, Feature_UseHVXIEEEFPBit, }, |
9466 | | {Feature_UseHVXV68Bit, Feature_UseHVXQFloatBit, }, |
9467 | | {Feature_UseHVXV73Bit, Feature_UseHVXIEEEFPBit, }, |
9468 | | {Feature_UseHVXV73Bit, Feature_UseHVXQFloatBit, }, |
9469 | | }; |
9470 | | |
9471 | | namespace { |
9472 | | struct MatchEntry { |
9473 | | uint16_t Mnemonic; |
9474 | | uint16_t Opcode; |
9475 | | uint16_t ConvertFn; |
9476 | | uint8_t RequiredFeaturesIdx; |
9477 | | uint16_t Classes[24]; |
9478 | 0 | StringRef getMnemonic() const { |
9479 | 0 | return StringRef(MnemonicTable + Mnemonic + 1, |
9480 | 0 | MnemonicTable[Mnemonic]); |
9481 | 0 | } |
9482 | | }; |
9483 | | |
9484 | | // Predicate for searching for an opcode. |
9485 | | struct LessOpcode { |
9486 | 0 | bool operator()(const MatchEntry &LHS, StringRef RHS) { |
9487 | 0 | return LHS.getMnemonic() < RHS; |
9488 | 0 | } |
9489 | 0 | bool operator()(StringRef LHS, const MatchEntry &RHS) { |
9490 | 0 | return LHS < RHS.getMnemonic(); |
9491 | 0 | } |
9492 | 0 | bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) { |
9493 | 0 | return LHS.getMnemonic() < RHS.getMnemonic(); |
9494 | 0 | } |
9495 | | }; |
9496 | | } // end anonymous namespace |
9497 | | |
9498 | | static const MatchEntry MatchTable0[] = { |
9499 | | { 0 /* */, Hexagon::C2_or, Convert__Reg1_0__Reg1_2__Reg1_2, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_PredRegs }, }, |
9500 | | { 0 /* */, Hexagon::C2_tfrrp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_IntRegs }, }, |
9501 | | { 0 /* */, Hexagon::A4_tfrpcp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_CtrRegs64, MCK__61_, MCK_DoubleRegs }, }, |
9502 | | { 0 /* */, Hexagon::A4_tfrcpp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_CtrRegs64 }, }, |
9503 | | { 0 /* */, Hexagon::A2_tfrp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
9504 | | { 0 /* */, Hexagon::G4_tfrgcpp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_GuestRegs64 }, }, |
9505 | | { 0 /* */, Hexagon::Y4_tfrscpp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_SysRegs64 }, }, |
9506 | | { 0 /* */, Hexagon::G4_tfrgpcp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_GuestRegs64, MCK__61_, MCK_DoubleRegs }, }, |
9507 | | { 0 /* */, Hexagon::A2_tfrrcr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_CtrRegs, MCK__61_, MCK_IntRegs }, }, |
9508 | | { 0 /* */, Hexagon::G4_tfrgrcr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_GuestRegs, MCK__61_, MCK_IntRegs }, }, |
9509 | | { 0 /* */, Hexagon::V6_vassignp, Convert__Reg1_0__Reg1_2, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__61_, MCK_HvxWR }, }, |
9510 | | { 0 /* */, Hexagon::Y6_dmpause, Convert__Reg1_0, AMFBS_HasV68, { MCK_IntRegs, MCK__61_, MCK_dmpause }, }, |
9511 | | { 0 /* */, Hexagon::Y6_dmpoll, Convert__Reg1_0, AMFBS_HasV68, { MCK_IntRegs, MCK__61_, MCK_dmpoll }, }, |
9512 | | { 0 /* */, Hexagon::Y6_dmwait, Convert__Reg1_0, AMFBS_HasV68, { MCK_IntRegs, MCK__61_, MCK_dmwait }, }, |
9513 | | { 0 /* */, Hexagon::C2_tfrpr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_PredRegs }, }, |
9514 | | { 0 /* */, Hexagon::A2_tfrcrr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_CtrRegs }, }, |
9515 | | { 0 /* */, Hexagon::G4_tfrgcrr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_GuestRegs }, }, |
9516 | | { 0 /* */, Hexagon::A2_tfr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
9517 | | { 0 /* */, Hexagon::Y2_tfrscrr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_SysRegs }, }, |
9518 | | { 0 /* */, Hexagon::V6_vassign, Convert__Reg1_0__Reg1_2, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_HvxVR }, }, |
9519 | | { 0 /* */, Hexagon::Y4_tfrspcp, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_SysRegs64, MCK__61_, MCK_DoubleRegs }, }, |
9520 | | { 0 /* */, Hexagon::Y2_tfrsrcr, Convert__Reg1_0__Reg1_2, AMFBS_None, { MCK_SysRegs, MCK__61_, MCK_IntRegs }, }, |
9521 | | { 0 /* */, Hexagon::A2_tfrpi, Convert__Reg1_0__s8_0Imm1_3, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK__HASH_, MCK_s8_0Imm }, }, |
9522 | | { 0 /* */, Hexagon::TFRI64_V4, Convert__Reg1_0__u64_0Imm1_3, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK__HASH_, MCK_u64_0Imm }, }, |
9523 | | { 0 /* */, Hexagon::V6_vsubw_dv, Convert__Reg1_0__regW15__regW15, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK__HASH_, MCK_0 }, }, |
9524 | | { 0 /* */, Hexagon::A2_tfrsi, Convert__Reg1_0__s32_0Imm1_3, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
9525 | | { 0 /* */, Hexagon::V6_vxor, Convert__Reg1_0__Reg1_0__Reg1_0, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK__HASH_, MCK_0 }, }, |
9526 | | { 0 /* */, Hexagon::V6_vassign_tmp, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_HvxVR }, }, |
9527 | | { 0 /* */, Hexagon::V6_pred_not, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_not, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
9528 | | { 0 /* */, Hexagon::V6_pred_scalar2, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vsetq, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9529 | | { 0 /* */, Hexagon::V6_pred_scalar2v2, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV62, { MCK_HvxQR, MCK__61_, MCK_vsetq2, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9530 | | { 0 /* */, Hexagon::C2_all8, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_all8, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
9531 | | { 0 /* */, Hexagon::C2_any8, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_any8, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
9532 | | { 0 /* */, Hexagon::Y5_l2locka, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_l2locka, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9533 | | { 0 /* */, Hexagon::C2_not, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_not, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
9534 | | { 0 /* */, Hexagon::A2_absp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_abs, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9535 | | { 0 /* */, Hexagon::S2_brevp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_brev, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9536 | | { 0 /* */, Hexagon::F2_conv_d2df, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_d2df, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9537 | | { 0 /* */, Hexagon::F2_conv_df2d, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2d, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9538 | | { 0 /* */, Hexagon::F2_conv_df2ud, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2ud, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9539 | | { 0 /* */, Hexagon::F2_conv_sf2d, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2d, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9540 | | { 0 /* */, Hexagon::F2_conv_sf2df, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2df, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9541 | | { 0 /* */, Hexagon::F2_conv_sf2ud, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2ud, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9542 | | { 0 /* */, Hexagon::F2_conv_ud2df, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_ud2df, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9543 | | { 0 /* */, Hexagon::F2_conv_uw2df, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_uw2df, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9544 | | { 0 /* */, Hexagon::F2_conv_w2df, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_w2df, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9545 | | { 0 /* */, Hexagon::S2_deinterleave, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_deinterleave, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9546 | | { 0 /* */, Hexagon::S2_interleave, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_interleave, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9547 | | { 0 /* */, Hexagon::C2_mask, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mask, MCK__40_, MCK_PredRegs, MCK__41_ }, }, |
9548 | | { 0 /* */, Hexagon::L2_loadalignb_io, Convert__Reg1_0__Tie0_0_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9549 | | { 0 /* */, Hexagon::L2_loadbsw4_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9550 | | { 0 /* */, Hexagon::L2_loadrd_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9551 | | { 0 /* */, Hexagon::L4_loadd_aq, Convert__Reg1_0__Reg1_4, AMFBS_HasV68, { MCK_DoubleRegs, MCK__61_, MCK_memd_95_aq, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9552 | | { 0 /* */, Hexagon::L4_loadd_locked, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd_95_locked, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9553 | | { 0 /* */, Hexagon::L2_loadalignh_io, Convert__Reg1_0__Tie0_0_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9554 | | { 0 /* */, Hexagon::L2_loadbzw4_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9555 | | { 0 /* */, Hexagon::A2_negp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_neg, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9556 | | { 0 /* */, Hexagon::A2_notp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_not, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9557 | | { 0 /* */, Hexagon::A2_sxtw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_sxtw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9558 | | { 0 /* */, Hexagon::Y2_tlbr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_tlbr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9559 | | { 0 /* */, Hexagon::A2_vabsh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9560 | | { 0 /* */, Hexagon::A2_vabsw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsw, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9561 | | { 0 /* */, Hexagon::S2_vsathb_nopack, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsathb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9562 | | { 0 /* */, Hexagon::S2_vsathub_nopack, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsathub, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9563 | | { 0 /* */, Hexagon::S2_vsatwh_nopack, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsatwh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9564 | | { 0 /* */, Hexagon::S2_vsatwuh_nopack, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsatwuh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9565 | | { 0 /* */, Hexagon::S6_vsplatrbp, Convert__Reg1_0__Reg1_4, AMFBS_HasV62, { MCK_DoubleRegs, MCK__61_, MCK_vsplatb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9566 | | { 0 /* */, Hexagon::S2_vsplatrh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsplath, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9567 | | { 0 /* */, Hexagon::S2_vsxtbh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsxtbh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9568 | | { 0 /* */, Hexagon::S2_vsxthw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsxthw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9569 | | { 0 /* */, Hexagon::S2_vzxtbh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vzxtbh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9570 | | { 0 /* */, Hexagon::S2_vzxthw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vzxthw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9571 | | { 0 /* */, Hexagon::J4_jumpsetr, Convert__Reg1_0__Reg1_2__b30_2Imm1_5, AMFBS_None, { MCK_GeneralSubRegs, MCK__61_, MCK_GeneralSubRegs, MCK__59_, MCK_jump, MCK_b30_2Imm }, }, |
9572 | | { 0 /* */, Hexagon::V6_vsb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsxtb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9573 | | { 0 /* */, Hexagon::V6_vsh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsxth, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9574 | | { 0 /* */, Hexagon::V6_vunpackb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vunpackb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9575 | | { 0 /* */, Hexagon::V6_vunpackh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vunpackh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9576 | | { 0 /* */, Hexagon::V6_vunpackub, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vunpackub, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9577 | | { 0 /* */, Hexagon::V6_vunpackuh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vunpackuh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9578 | | { 0 /* */, Hexagon::V6_vzb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vzxtb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9579 | | { 0 /* */, Hexagon::V6_vzh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vzxth, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9580 | | { 0 /* */, Hexagon::A2_tfrih, Convert__Reg1_0__Tie0_0_0__u16_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__DOT_, MCK_h, MCK__61_, MCK__HASH_, MCK_u16_0Imm }, }, |
9581 | | { 0 /* */, Hexagon::HI, Convert__Reg1_0__u16_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__DOT_, MCK_h, MCK__61_, MCK__HASH_, MCK_u16_0Imm }, }, |
9582 | | { 0 /* */, Hexagon::A2_tfril, Convert__Reg1_0__Tie0_0_0__u16_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__DOT_, MCK_l, MCK__61_, MCK__HASH_, MCK_u16_0Imm }, }, |
9583 | | { 0 /* */, Hexagon::LO, Convert__Reg1_0__u16_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__DOT_, MCK_l, MCK__61_, MCK__HASH_, MCK_u16_0Imm }, }, |
9584 | | { 0 /* */, Hexagon::A2_abs, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_abs, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9585 | | { 0 /* */, Hexagon::A2_aslh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9586 | | { 0 /* */, Hexagon::A2_asrh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9587 | | { 0 /* */, Hexagon::S2_brev, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_brev, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9588 | | { 0 /* */, Hexagon::S2_cl0p, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cl0, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9589 | | { 0 /* */, Hexagon::S2_cl0, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cl0, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9590 | | { 0 /* */, Hexagon::S2_cl1p, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cl1, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9591 | | { 0 /* */, Hexagon::S2_cl1, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cl1, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9592 | | { 0 /* */, Hexagon::S2_clbp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_clb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9593 | | { 0 /* */, Hexagon::S2_clb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_clb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9594 | | { 0 /* */, Hexagon::F2_conv_d2sf, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_d2sf, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9595 | | { 0 /* */, Hexagon::F2_conv_df2sf, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2sf, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9596 | | { 0 /* */, Hexagon::F2_conv_df2uw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2uw, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9597 | | { 0 /* */, Hexagon::F2_conv_df2w, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2w, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9598 | | { 0 /* */, Hexagon::F2_conv_sf2uw, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2uw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9599 | | { 0 /* */, Hexagon::F2_conv_sf2w, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2w, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9600 | | { 0 /* */, Hexagon::F2_conv_ud2sf, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_ud2sf, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9601 | | { 0 /* */, Hexagon::F2_conv_uw2sf, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_uw2sf, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9602 | | { 0 /* */, Hexagon::F2_conv_w2sf, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_w2sf, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9603 | | { 0 /* */, Hexagon::S2_ct0p, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ct0, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9604 | | { 0 /* */, Hexagon::S2_ct0, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ct0, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9605 | | { 0 /* */, Hexagon::S2_ct1p, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ct1, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9606 | | { 0 /* */, Hexagon::S2_ct1, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ct1, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9607 | | { 0 /* */, Hexagon::Y2_dctagr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_dctagr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9608 | | { 0 /* */, Hexagon::Y2_getimask, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_getimask, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9609 | | { 0 /* */, Hexagon::Y2_iassignr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_iassignr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9610 | | { 0 /* */, Hexagon::Y2_icdatar, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_icdatar, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9611 | | { 0 /* */, Hexagon::Y2_ictagr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ictagr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9612 | | { 0 /* */, Hexagon::Y4_l2tagr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_l2tagr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9613 | | { 0 /* */, Hexagon::L2_loadrb_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9614 | | { 0 /* */, Hexagon::L2_loadbsw2_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9615 | | { 0 /* */, Hexagon::L2_loadrh_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9616 | | { 0 /* */, Hexagon::L2_loadrub_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9617 | | { 0 /* */, Hexagon::L2_loadbzw2_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9618 | | { 0 /* */, Hexagon::L2_loadruh_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9619 | | { 0 /* */, Hexagon::L2_loadri_io, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9620 | | { 0 /* */, Hexagon::L2_loadw_aq, Convert__Reg1_0__Reg1_4, AMFBS_HasV68, { MCK_IntRegs, MCK__61_, MCK_memw_95_aq, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9621 | | { 0 /* */, Hexagon::L2_loadw_locked, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw_95_locked, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9622 | | { 0 /* */, Hexagon::A2_subri, Convert__Reg1_0__imm_95_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_neg, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9623 | | { 0 /* */, Hexagon::S4_clbpnorm, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_normamt, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9624 | | { 0 /* */, Hexagon::S2_clbnorm, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_normamt, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9625 | | { 0 /* */, Hexagon::A2_subri, Convert__Reg1_0__imm_95__MINUS_1__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_not, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9626 | | { 0 /* */, Hexagon::S5_popcountp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_popcount, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9627 | | { 0 /* */, Hexagon::A2_sat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sat, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9628 | | { 0 /* */, Hexagon::A2_satb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_satb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9629 | | { 0 /* */, Hexagon::A2_sath, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sath, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9630 | | { 0 /* */, Hexagon::A2_satub, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_satub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9631 | | { 0 /* */, Hexagon::A2_satuh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_satuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9632 | | { 0 /* */, Hexagon::F2_sffixupr, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sffixupr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9633 | | { 0 /* */, Hexagon::A2_swiz, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_swiz, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9634 | | { 0 /* */, Hexagon::A2_sxtb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9635 | | { 0 /* */, Hexagon::A2_sxth, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9636 | | { 0 /* */, Hexagon::Y5_tlboc, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tlboc, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9637 | | { 0 /* */, Hexagon::Y2_tlbp, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tlbp, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9638 | | { 0 /* */, Hexagon::S2_vrndpackwh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vrndwh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9639 | | { 0 /* */, Hexagon::S2_vsathb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsathb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9640 | | { 0 /* */, Hexagon::S2_svsathb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsathb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9641 | | { 0 /* */, Hexagon::S2_vsathub, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsathub, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9642 | | { 0 /* */, Hexagon::S2_svsathub, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsathub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9643 | | { 0 /* */, Hexagon::S2_vsatwh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsatwh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9644 | | { 0 /* */, Hexagon::S2_vsatwuh, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsatwuh, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9645 | | { 0 /* */, Hexagon::S2_vsplatrb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsplatb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9646 | | { 0 /* */, Hexagon::S2_vtrunehb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vtrunehb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9647 | | { 0 /* */, Hexagon::S2_vtrunohb, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vtrunohb, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
9648 | | { 0 /* */, Hexagon::A2_andir, Convert__Reg1_0__Reg1_4__imm_95_255, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9649 | | { 0 /* */, Hexagon::A2_zxth, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9650 | | { 0 /* */, Hexagon::V6_hi, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_hi, MCK__40_, MCK_HvxWR, MCK__41_ }, }, |
9651 | | { 0 /* */, Hexagon::V6_lo, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_lo, MCK__40_, MCK_HvxWR, MCK__41_ }, }, |
9652 | | { 0 /* */, Hexagon::V6_vabsb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9653 | | { 0 /* */, Hexagon::V6_vabsh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9654 | | { 0 /* */, Hexagon::V6_vabsw, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsw, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9655 | | { 0 /* */, Hexagon::V6_vcl0h, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vcl0h, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9656 | | { 0 /* */, Hexagon::V6_vcl0w, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vcl0w, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9657 | | { 0 /* */, Hexagon::V6_vdealb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdealb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9658 | | { 0 /* */, Hexagon::V6_vdealh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdealh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9659 | | { 0 /* */, Hexagon::V6_vL32b_ai, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9660 | | { 0 /* */, Hexagon::V6_vL32Ub_ai, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9661 | | { 0 /* */, Hexagon::V6_vnormamth, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnormamth, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9662 | | { 0 /* */, Hexagon::V6_vnormamtw, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnormamtw, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9663 | | { 0 /* */, Hexagon::V6_vnot, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vnot, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9664 | | { 0 /* */, Hexagon::V6_vpopcounth, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpopcounth, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9665 | | { 0 /* */, Hexagon::V6_vshuffb, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffb, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9666 | | { 0 /* */, Hexagon::V6_vshuffh, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9667 | | { 0 /* */, Hexagon::V6_lvsplatw, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vsplat, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9668 | | { 0 /* */, Hexagon::V6_zextract, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVR, MCK__61_, MCK_zextract, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9669 | | { 0 /* */, Hexagon::V6_pred_and, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_and, MCK__40_, MCK_HvxQR, MCK_HvxQR, MCK__41_ }, }, |
9670 | | { 0 /* */, Hexagon::V6_pred_or, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_or, MCK__40_, MCK_HvxQR, MCK_HvxQR, MCK__41_ }, }, |
9671 | | { 0 /* */, Hexagon::V6_vandvrt, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vand, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9672 | | { 0 /* */, Hexagon::V6_pred_xor, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_xor, MCK__40_, MCK_HvxQR, MCK_HvxQR, MCK__41_ }, }, |
9673 | | { 0 /* */, Hexagon::C2_and, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
9674 | | { 0 /* */, Hexagon::C2_bitsclr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9675 | | { 0 /* */, Hexagon::C2_bitsset, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_bitsset, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9676 | | { 0 /* */, Hexagon::A4_boundscheck, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_boundscheck, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9677 | | { 0 /* */, Hexagon::C4_fastcorner9, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_fastcorner9, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
9678 | | { 0 /* */, Hexagon::C2_or, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
9679 | | { 0 /* */, Hexagon::A4_tlbmatch, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_tlbmatch, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9680 | | { 0 /* */, Hexagon::S2_tstbit_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9681 | | { 0 /* */, Hexagon::C2_xor, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_xor, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
9682 | | { 0 /* */, Hexagon::CONST64, Convert__Reg1_0__Imm1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_CONST64, MCK__40_, MCK__HASH_, MCK_Imm, MCK__41_ }, }, |
9683 | | { 0 /* */, Hexagon::A2_addp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9684 | | { 0 /* */, Hexagon::A2_addsp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9685 | | { 0 /* */, Hexagon::A2_andp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_and, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9686 | | { 0 /* */, Hexagon::S2_asl_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9687 | | { 0 /* */, Hexagon::S2_asr_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9688 | | { 0 /* */, Hexagon::A4_bitsplit, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_bitsplit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9689 | | { 0 /* */, Hexagon::M2_cmpyi_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9690 | | { 0 /* */, Hexagon::M7_dcmpyiw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9691 | | { 0 /* */, Hexagon::M2_cmpyr_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpyr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9692 | | { 0 /* */, Hexagon::M7_dcmpyrw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9693 | | { 0 /* */, Hexagon::A2_combinew, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9694 | | { 0 /* */, Hexagon::A7_croundd_rr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cround, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9695 | | { 0 /* */, Hexagon::S2_cabacdecbin, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseCabac, { MCK_DoubleRegs, MCK__61_, MCK_decbin, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9696 | | { 0 /* */, Hexagon::F2_dfadd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV66, { MCK_DoubleRegs, MCK__61_, MCK_dfadd, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9697 | | { 0 /* */, Hexagon::F2_dfmax, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67, { MCK_DoubleRegs, MCK__61_, MCK_dfmax, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9698 | | { 0 /* */, Hexagon::F2_dfmin, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67, { MCK_DoubleRegs, MCK__61_, MCK_dfmin, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9699 | | { 0 /* */, Hexagon::F2_dfmpyfix, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67, { MCK_DoubleRegs, MCK__61_, MCK_dfmpyfix, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9700 | | { 0 /* */, Hexagon::F2_dfmpyll, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67, { MCK_DoubleRegs, MCK__61_, MCK_dfmpyll, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9701 | | { 0 /* */, Hexagon::F2_dfsub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV66, { MCK_DoubleRegs, MCK__61_, MCK_dfsub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9702 | | { 0 /* */, Hexagon::S4_extractp_rp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_extract, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9703 | | { 0 /* */, Hexagon::S2_extractup_rp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9704 | | { 0 /* */, Hexagon::S2_insertp_rp, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_insert, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9705 | | { 0 /* */, Hexagon::S2_lfsp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_lfs, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9706 | | { 0 /* */, Hexagon::S2_lsl_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9707 | | { 0 /* */, Hexagon::S2_lsr_r_p, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9708 | | { 0 /* */, Hexagon::A2_maxp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_max, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9709 | | { 0 /* */, Hexagon::A2_maxup, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_maxu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9710 | | { 0 /* */, Hexagon::PS_loadrdabs, Convert__Reg1_0__u29_3Imm1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
9711 | | { 0 /* */, Hexagon::A2_minp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_min, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9712 | | { 0 /* */, Hexagon::A2_minup, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_minu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9713 | | { 0 /* */, Hexagon::M2_dpmpyss_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9714 | | { 0 /* */, Hexagon::M2_dpmpyuu_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9715 | | { 0 /* */, Hexagon::A2_orp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_or, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9716 | | { 0 /* */, Hexagon::S2_packhl, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_packhl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9717 | | { 0 /* */, Hexagon::M4_pmpyw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_pmpyw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9718 | | { 0 /* */, Hexagon::S2_shuffeb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_shuffeb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9719 | | { 0 /* */, Hexagon::S2_shuffeh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_shuffeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9720 | | { 0 /* */, Hexagon::S2_shuffob, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_shuffob, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9721 | | { 0 /* */, Hexagon::S2_shuffoh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_shuffoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9722 | | { 0 /* */, Hexagon::A2_subp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_sub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9723 | | { 0 /* */, Hexagon::M6_vabsdiffb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV62, { MCK_DoubleRegs, MCK__61_, MCK_vabsdiffb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9724 | | { 0 /* */, Hexagon::M2_vabsdiffh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsdiffh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9725 | | { 0 /* */, Hexagon::M6_vabsdiffub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV62, { MCK_DoubleRegs, MCK__61_, MCK_vabsdiffub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9726 | | { 0 /* */, Hexagon::M2_vabsdiffw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsdiffw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9727 | | { 0 /* */, Hexagon::A2_vaddub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9728 | | { 0 /* */, Hexagon::A2_vaddh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9729 | | { 0 /* */, Hexagon::A2_vaddub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9730 | | { 0 /* */, Hexagon::A2_vaddw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9731 | | { 0 /* */, Hexagon::S2_asl_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaslh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9732 | | { 0 /* */, Hexagon::S2_asl_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaslw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9733 | | { 0 /* */, Hexagon::S2_asr_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9734 | | { 0 /* */, Hexagon::S2_asr_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9735 | | { 0 /* */, Hexagon::A2_vavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9736 | | { 0 /* */, Hexagon::A2_vavgub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9737 | | { 0 /* */, Hexagon::A2_vavguh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavguh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9738 | | { 0 /* */, Hexagon::A2_vavguw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavguw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9739 | | { 0 /* */, Hexagon::A2_vavgw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9740 | | { 0 /* */, Hexagon::S2_vcnegh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcnegh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9741 | | { 0 /* */, Hexagon::S2_vcrotate, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcrotate, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9742 | | { 0 /* */, Hexagon::M7_dcmpyrwc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vdmpyw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9743 | | { 0 /* */, Hexagon::S2_lsl_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlslh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9744 | | { 0 /* */, Hexagon::S2_lsl_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlslw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9745 | | { 0 /* */, Hexagon::S2_lsr_r_vh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlsrh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9746 | | { 0 /* */, Hexagon::S2_lsr_r_vw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlsrw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9747 | | { 0 /* */, Hexagon::A2_vmaxb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9748 | | { 0 /* */, Hexagon::A2_vmaxh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9749 | | { 0 /* */, Hexagon::A2_vmaxub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9750 | | { 0 /* */, Hexagon::A2_vmaxuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9751 | | { 0 /* */, Hexagon::A2_vmaxuw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxuw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9752 | | { 0 /* */, Hexagon::A2_vmaxw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmaxw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9753 | | { 0 /* */, Hexagon::A2_vminb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9754 | | { 0 /* */, Hexagon::A2_vminh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9755 | | { 0 /* */, Hexagon::A2_vminub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9756 | | { 0 /* */, Hexagon::A2_vminuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9757 | | { 0 /* */, Hexagon::A2_vminuw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminuw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9758 | | { 0 /* */, Hexagon::A2_vminw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vminw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9759 | | { 0 /* */, Hexagon::M5_vmpybsu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpybsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9760 | | { 0 /* */, Hexagon::M5_vmpybuu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpybu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9761 | | { 0 /* */, Hexagon::A2_vnavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9762 | | { 0 /* */, Hexagon::A2_vnavgw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9763 | | { 0 /* */, Hexagon::M4_vpmpyh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vpmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9764 | | { 0 /* */, Hexagon::A2_vraddub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vraddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9765 | | { 0 /* */, Hexagon::M2_vrcmpyi_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9766 | | { 0 /* */, Hexagon::M2_vrcmpyr_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9767 | | { 0 /* */, Hexagon::A4_vrmaxh, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9768 | | { 0 /* */, Hexagon::A4_vrmaxuh, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxuh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9769 | | { 0 /* */, Hexagon::A4_vrmaxuw, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxuw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9770 | | { 0 /* */, Hexagon::A4_vrmaxw, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmaxw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9771 | | { 0 /* */, Hexagon::A4_vrminh, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrminh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9772 | | { 0 /* */, Hexagon::A4_vrminuh, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrminuh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9773 | | { 0 /* */, Hexagon::A4_vrminuw, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrminuw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9774 | | { 0 /* */, Hexagon::A4_vrminw, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrminw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9775 | | { 0 /* */, Hexagon::M5_vrmpybsu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9776 | | { 0 /* */, Hexagon::M5_vrmpybuu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpybu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9777 | | { 0 /* */, Hexagon::M2_vrmpy_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpyh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9778 | | { 0 /* */, Hexagon::M4_vrmpyeh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9779 | | { 0 /* */, Hexagon::M4_vrmpyoh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9780 | | { 0 /* */, Hexagon::A2_vrsadub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrsadub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9781 | | { 0 /* */, Hexagon::A2_vsubub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9782 | | { 0 /* */, Hexagon::A2_vsubh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9783 | | { 0 /* */, Hexagon::A2_vsubub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9784 | | { 0 /* */, Hexagon::A2_vsubw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9785 | | { 0 /* */, Hexagon::S6_vtrunehb_ppp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV62, { MCK_DoubleRegs, MCK__61_, MCK_vtrunehb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9786 | | { 0 /* */, Hexagon::S2_vtrunewh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vtrunewh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9787 | | { 0 /* */, Hexagon::S6_vtrunohb_ppp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV62, { MCK_DoubleRegs, MCK__61_, MCK_vtrunohb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9788 | | { 0 /* */, Hexagon::S2_vtrunowh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vtrunowh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9789 | | { 0 /* */, Hexagon::A2_xorp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_xor, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9790 | | { 0 /* */, Hexagon::J4_jumpseti, Convert__Reg1_0__u6_0Imm1_3__b30_2Imm1_6, AMFBS_None, { MCK_GeneralSubRegs, MCK__61_, MCK__HASH_, MCK_u6_0Imm, MCK__59_, MCK_jump, MCK_b30_2Imm }, }, |
9791 | | { 0 /* */, Hexagon::V6_vaddb_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddb, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
9792 | | { 0 /* */, Hexagon::V6_vaddh_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
9793 | | { 0 /* */, Hexagon::V6_vaddhw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9794 | | { 0 /* */, Hexagon::V6_vaddubh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9795 | | { 0 /* */, Hexagon::V6_vadduhw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vadduh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9796 | | { 0 /* */, Hexagon::V6_vaddw_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
9797 | | { 0 /* */, Hexagon::V6_vasr_into, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vasrinto, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9798 | | { 0 /* */, Hexagon::V6_vcombine, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__61_, MCK_vcombine, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9799 | | { 0 /* */, Hexagon::V6_vdmpybus_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vdmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
9800 | | { 0 /* */, Hexagon::V6_vdmpyhb_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vdmpyhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
9801 | | { 0 /* */, Hexagon::V6_vdsaduh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vdsaduh, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
9802 | | { 0 /* */, Hexagon::V6_vmpabusv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpabus, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
9803 | | { 0 /* */, Hexagon::V6_vmpabus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpabus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
9804 | | { 0 /* */, Hexagon::V6_vmpabuuv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpabuu, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
9805 | | { 0 /* */, Hexagon::V6_vmpabuu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpabuu, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
9806 | | { 0 /* */, Hexagon::V6_vmpahb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpahb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
9807 | | { 0 /* */, Hexagon::V6_vmpauhb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpauhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
9808 | | { 0 /* */, Hexagon::V6_vmpybv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9809 | | { 0 /* */, Hexagon::V6_vmpybus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9810 | | { 0 /* */, Hexagon::V6_vmpybusv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpybus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9811 | | { 0 /* */, Hexagon::V6_vmpyh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9812 | | { 0 /* */, Hexagon::V6_vmpyhv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9813 | | { 0 /* */, Hexagon::V6_vmpyhus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyhus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9814 | | { 0 /* */, Hexagon::V6_vmpyub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9815 | | { 0 /* */, Hexagon::V6_vmpyubv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9816 | | { 0 /* */, Hexagon::V6_vmpyuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyuh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9817 | | { 0 /* */, Hexagon::V6_vmpyuhv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vmpyuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9818 | | { 0 /* */, Hexagon::V6_vshufoeb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vshuffoeb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9819 | | { 0 /* */, Hexagon::V6_vshufoeh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vshuffoeh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9820 | | { 0 /* */, Hexagon::V6_vsubb_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubb, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
9821 | | { 0 /* */, Hexagon::V6_vsubh_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
9822 | | { 0 /* */, Hexagon::V6_vsubhw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9823 | | { 0 /* */, Hexagon::V6_vsububh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9824 | | { 0 /* */, Hexagon::V6_vsubuhw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9825 | | { 0 /* */, Hexagon::V6_vsubw_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_ }, }, |
9826 | | { 0 /* */, Hexagon::V6_vtmpyb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vtmpyb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
9827 | | { 0 /* */, Hexagon::V6_vtmpybus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vtmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
9828 | | { 0 /* */, Hexagon::V6_vtmpyhb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vtmpyhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
9829 | | { 0 /* */, Hexagon::V6_vunpackob_alt, Convert__Reg1_0__Tie0_0_0__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__124_, MCK__61_, MCK_vunpackob, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9830 | | { 0 /* */, Hexagon::V6_vunpackoh, Convert__Reg1_0__Tie0_0_0__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__124_, MCK__61_, MCK_vunpackoh, MCK__40_, MCK_HvxVR, MCK__41_ }, }, |
9831 | | { 0 /* */, Hexagon::CONST32, Convert__Reg1_0__Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_CONST32, MCK__40_, MCK__HASH_, MCK_Imm, MCK__41_ }, }, |
9832 | | { 0 /* */, Hexagon::A2_add, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9833 | | { 0 /* */, Hexagon::A2_and, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9834 | | { 0 /* */, Hexagon::S2_asl_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9835 | | { 0 /* */, Hexagon::S2_asr_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9836 | | { 0 /* */, Hexagon::S2_clrbit_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_clrbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9837 | | { 0 /* */, Hexagon::A4_cround_rr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cround, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9838 | | { 0 /* */, Hexagon::Y5_ctlbw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_ctlbw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9839 | | { 0 /* */, Hexagon::S4_extract_rp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_extract, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9840 | | { 0 /* */, Hexagon::S2_extractu_rp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9841 | | { 0 /* */, Hexagon::A2_iconst, Convert__Reg1_0__s27_2Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_iconst, MCK__40_, MCK__HASH_, MCK_s27_2Imm, MCK__41_ }, }, |
9842 | | { 0 /* */, Hexagon::S2_insert_rp, Convert__Reg1_0__Tie0_0_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_insert, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9843 | | { 0 /* */, Hexagon::S2_lsl_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9844 | | { 0 /* */, Hexagon::S2_lsr_r_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9845 | | { 0 /* */, Hexagon::A2_max, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_max, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9846 | | { 0 /* */, Hexagon::A2_maxu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_maxu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9847 | | { 0 /* */, Hexagon::PS_loadrbabs, Convert__Reg1_0__u32_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
9848 | | { 0 /* */, Hexagon::PS_loadrhabs, Convert__Reg1_0__u31_1Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
9849 | | { 0 /* */, Hexagon::PS_loadrubabs, Convert__Reg1_0__u32_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
9850 | | { 0 /* */, Hexagon::PS_loadruhabs, Convert__Reg1_0__u31_1Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
9851 | | { 0 /* */, Hexagon::PS_loadriabs, Convert__Reg1_0__u30_2Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
9852 | | { 0 /* */, Hexagon::L4_loadw_phys, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw_95_phys, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9853 | | { 0 /* */, Hexagon::A2_min, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_min, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9854 | | { 0 /* */, Hexagon::A2_minu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_minu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9855 | | { 0 /* */, Hexagon::A4_modwrapu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_modwrap, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9856 | | { 0 /* */, Hexagon::M2_mpy_up, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9857 | | { 0 /* */, Hexagon::M2_mpyi, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9858 | | { 0 /* */, Hexagon::M2_mpysu_up, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpysu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9859 | | { 0 /* */, Hexagon::M2_mpyu_up, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9860 | | { 0 /* */, Hexagon::M2_mpyi, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyui, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9861 | | { 0 /* */, Hexagon::A2_or, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9862 | | { 0 /* */, Hexagon::S2_parityp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_parity, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9863 | | { 0 /* */, Hexagon::S4_parity, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_parity, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9864 | | { 0 /* */, Hexagon::A4_round_rr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9865 | | { 0 /* */, Hexagon::S2_setbit_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_setbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9866 | | { 0 /* */, Hexagon::F2_sfadd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfadd, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9867 | | { 0 /* */, Hexagon::F2_sffixupd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sffixupd, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9868 | | { 0 /* */, Hexagon::F2_sffixupn, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sffixupn, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9869 | | { 0 /* */, Hexagon::F2_sfmax, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfmax, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9870 | | { 0 /* */, Hexagon::F2_sfmin, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfmin, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9871 | | { 0 /* */, Hexagon::F2_sfmpy, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9872 | | { 0 /* */, Hexagon::F2_sfsub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfsub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9873 | | { 0 /* */, Hexagon::A2_sub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9874 | | { 0 /* */, Hexagon::S2_togglebit_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_togglebit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9875 | | { 0 /* */, Hexagon::A2_svaddh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9876 | | { 0 /* */, Hexagon::S2_asr_r_svw_trun, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9877 | | { 0 /* */, Hexagon::A2_svavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9878 | | { 0 /* */, Hexagon::V6_extractw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_IntRegs, MCK__61_, MCK_vextract, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9879 | | { 0 /* */, Hexagon::C2_vitpack, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vitpack, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
9880 | | { 0 /* */, Hexagon::A2_svnavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9881 | | { 0 /* */, Hexagon::M2_vraddh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vraddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9882 | | { 0 /* */, Hexagon::M2_vradduh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vradduh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9883 | | { 0 /* */, Hexagon::A2_svsubh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9884 | | { 0 /* */, Hexagon::A2_xor, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9885 | | { 0 /* */, Hexagon::F2_sfinvsqrta, Convert__Reg1_0__Reg1_1__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK_PredRegs, MCK__61_, MCK_sfinvsqrta, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
9886 | | { 0 /* */, Hexagon::V6_vconv_h_hf, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV73, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_hf }, }, |
9887 | | { 0 /* */, Hexagon::V6_vconv_hf_qf32, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_HvxWR, MCK__DOT_, MCK_qf32 }, }, |
9888 | | { 0 /* */, Hexagon::V6_vconv_hf_h, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV73, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
9889 | | { 0 /* */, Hexagon::V6_vconv_hf_qf16, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_qf16 }, }, |
9890 | | { 0 /* */, Hexagon::V6_vconv_sf_qf32, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_qf32 }, }, |
9891 | | { 0 /* */, Hexagon::V6_vconv_sf_w, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV73, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
9892 | | { 0 /* */, Hexagon::V6_vconv_w_sf, Convert__Reg1_0__Reg1_4, AMFBS_UseHVXV73, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_sf }, }, |
9893 | | { 0 /* */, Hexagon::V6_vabsdiffh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsdiffh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9894 | | { 0 /* */, Hexagon::V6_vabsdiffub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsdiffub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9895 | | { 0 /* */, Hexagon::V6_vabsdiffuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsdiffuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9896 | | { 0 /* */, Hexagon::V6_vabsdiffw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsdiffw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9897 | | { 0 /* */, Hexagon::V6_vaddb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9898 | | { 0 /* */, Hexagon::V6_vaddh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9899 | | { 0 /* */, Hexagon::V6_vaddw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9900 | | { 0 /* */, Hexagon::V6_vandqrt, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vand, MCK__40_, MCK_HvxQR, MCK_IntRegs, MCK__41_ }, }, |
9901 | | { 0 /* */, Hexagon::V6_vandvqv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__61_, MCK_vand, MCK__40_, MCK_HvxQR, MCK_HvxVR, MCK__41_ }, }, |
9902 | | { 0 /* */, Hexagon::V6_vand, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vand, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9903 | | { 0 /* */, Hexagon::V6_vaslh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaslh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9904 | | { 0 /* */, Hexagon::V6_vaslhv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaslh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9905 | | { 0 /* */, Hexagon::V6_vaslw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaslw, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9906 | | { 0 /* */, Hexagon::V6_vaslwv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaslw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9907 | | { 0 /* */, Hexagon::V6_vasrh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vasrh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9908 | | { 0 /* */, Hexagon::V6_vasrhv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vasrh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9909 | | { 0 /* */, Hexagon::V6_vasrw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vasrw, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9910 | | { 0 /* */, Hexagon::V6_vasrwv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vasrw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9911 | | { 0 /* */, Hexagon::V6_vavgb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9912 | | { 0 /* */, Hexagon::V6_vavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9913 | | { 0 /* */, Hexagon::V6_vavgub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9914 | | { 0 /* */, Hexagon::V6_vavguh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavguh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9915 | | { 0 /* */, Hexagon::V6_vavguw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavguw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9916 | | { 0 /* */, Hexagon::V6_vavgw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9917 | | { 0 /* */, Hexagon::V6_vdealb4w, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdealb4w, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9918 | | { 0 /* */, Hexagon::V6_vdelta, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vdelta, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9919 | | { 0 /* */, Hexagon::V6_vdmpybus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9920 | | { 0 /* */, Hexagon::V6_vdmpyhb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyhb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9921 | | { 0 /* */, Hexagon::V6_vlsrh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vlsrh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9922 | | { 0 /* */, Hexagon::V6_vlsrhv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vlsrh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9923 | | { 0 /* */, Hexagon::V6_vlsrw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vlsrw, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9924 | | { 0 /* */, Hexagon::V6_vlsrwv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vlsrw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9925 | | { 0 /* */, Hexagon::V6_vmaxb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmaxb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9926 | | { 0 /* */, Hexagon::V6_vmaxh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmaxh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9927 | | { 0 /* */, Hexagon::V6_vmaxub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmaxub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9928 | | { 0 /* */, Hexagon::V6_vmaxuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmaxuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9929 | | { 0 /* */, Hexagon::V6_vmaxw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmaxw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9930 | | { 0 /* */, Hexagon::V6_vminb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vminb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9931 | | { 0 /* */, Hexagon::V6_vminh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vminh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9932 | | { 0 /* */, Hexagon::V6_vminub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vminub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9933 | | { 0 /* */, Hexagon::V6_vminuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vminuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9934 | | { 0 /* */, Hexagon::V6_vminw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vminw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9935 | | { 0 /* */, Hexagon::V6_vmpyewuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyewuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9936 | | { 0 /* */, Hexagon::V6_vmpyiewuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyiewuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9937 | | { 0 /* */, Hexagon::V6_vmpyih, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyih, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9938 | | { 0 /* */, Hexagon::V6_vmpyihb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyihb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9939 | | { 0 /* */, Hexagon::V6_vmpyiowh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyiowh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9940 | | { 0 /* */, Hexagon::V6_vmpyiwb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyiwb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9941 | | { 0 /* */, Hexagon::V6_vmpyiwh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyiwh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9942 | | { 0 /* */, Hexagon::V6_vmpyiwub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyiwub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9943 | | { 0 /* */, Hexagon::V6_vnavgb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnavgb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9944 | | { 0 /* */, Hexagon::V6_vnavgh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnavgh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9945 | | { 0 /* */, Hexagon::V6_vnavgub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnavgub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9946 | | { 0 /* */, Hexagon::V6_vnavgw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vnavgw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9947 | | { 0 /* */, Hexagon::V6_vor, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vor, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9948 | | { 0 /* */, Hexagon::V6_vpackeb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackeb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9949 | | { 0 /* */, Hexagon::V6_vpackeh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackeh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9950 | | { 0 /* */, Hexagon::V6_vpackob, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackob, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9951 | | { 0 /* */, Hexagon::V6_vpackoh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackoh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9952 | | { 0 /* */, Hexagon::V6_vrdelta, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vrdelta, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9953 | | { 0 /* */, Hexagon::V6_vrmpybv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrmpyb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9954 | | { 0 /* */, Hexagon::V6_vrmpybus, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9955 | | { 0 /* */, Hexagon::V6_vrmpybusv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9956 | | { 0 /* */, Hexagon::V6_vrmpyub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9957 | | { 0 /* */, Hexagon::V6_vrmpyubv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9958 | | { 0 /* */, Hexagon::V6_vror, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vror, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9959 | | { 0 /* */, Hexagon::V6_vrotr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrotr, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9960 | | { 0 /* */, Hexagon::V6_vsathub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsathub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9961 | | { 0 /* */, Hexagon::V6_vsatuwuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsatuwuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9962 | | { 0 /* */, Hexagon::V6_vsatwh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsatwh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9963 | | { 0 /* */, Hexagon::V6_vshuffeb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffeb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9964 | | { 0 /* */, Hexagon::V6_vshufeh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffeh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9965 | | { 0 /* */, Hexagon::V6_vshuffob, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffob, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9966 | | { 0 /* */, Hexagon::V6_vshufoh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vshuffoh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9967 | | { 0 /* */, Hexagon::V6_vsubb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9968 | | { 0 /* */, Hexagon::V6_vsubh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9969 | | { 0 /* */, Hexagon::V6_vsubw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9970 | | { 0 /* */, Hexagon::V6_vxor, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vxor, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
9971 | | { 0 /* */, Hexagon::V6_pred_and_n, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_and, MCK__40_, MCK_HvxQR, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_ }, }, |
9972 | | { 0 /* */, Hexagon::V6_pred_or_n, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_or, MCK__40_, MCK_HvxQR, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_ }, }, |
9973 | | { 0 /* */, Hexagon::V6_vandvrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
9974 | | { 0 /* */, Hexagon::C4_nbitsclr, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9975 | | { 0 /* */, Hexagon::C4_nbitsset, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_bitsset, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9976 | | { 0 /* */, Hexagon::C4_fastcorner9_not, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_fastcorner9, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_ }, }, |
9977 | | { 0 /* */, Hexagon::S4_ntstbit_r, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9978 | | { 0 /* */, Hexagon::C2_andn, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_ }, }, |
9979 | | { 0 /* */, Hexagon::C2_bitsclri, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
9980 | | { 0 /* */, Hexagon::F2_dfclass, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_dfclass, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
9981 | | { 0 /* */, Hexagon::C2_orn, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_ }, }, |
9982 | | { 0 /* */, Hexagon::F2_sfclass, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_sfclass, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
9983 | | { 0 /* */, Hexagon::S2_tstbit_i, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
9984 | | { 0 /* */, Hexagon::S2_asl_r_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9985 | | { 0 /* */, Hexagon::S2_asr_r_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9986 | | { 0 /* */, Hexagon::S2_lsl_r_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9987 | | { 0 /* */, Hexagon::S2_lsr_r_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9988 | | { 0 /* */, Hexagon::S2_asl_r_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9989 | | { 0 /* */, Hexagon::S2_asr_r_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9990 | | { 0 /* */, Hexagon::M2_cmaci_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9991 | | { 0 /* */, Hexagon::M7_dcmpyiw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9992 | | { 0 /* */, Hexagon::M2_cmacr_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9993 | | { 0 /* */, Hexagon::M7_dcmpyrw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9994 | | { 0 /* */, Hexagon::F2_dfmpyhh, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_dfmpyhh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9995 | | { 0 /* */, Hexagon::F2_dfmpylh, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_dfmpylh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
9996 | | { 0 /* */, Hexagon::S2_lsl_r_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9997 | | { 0 /* */, Hexagon::S2_lsr_r_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
9998 | | { 0 /* */, Hexagon::M2_dpmpyss_acc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
9999 | | { 0 /* */, Hexagon::M2_dpmpyuu_acc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10000 | | { 0 /* */, Hexagon::M7_dcmpyrwc_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vdmpyw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10001 | | { 0 /* */, Hexagon::M5_vmacbsu, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpybsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10002 | | { 0 /* */, Hexagon::M5_vmacbuu, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpybu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10003 | | { 0 /* */, Hexagon::M2_vmac2es, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10004 | | { 0 /* */, Hexagon::M2_vmac2, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10005 | | { 0 /* */, Hexagon::A2_vraddub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vraddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10006 | | { 0 /* */, Hexagon::M2_vrcmaci_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10007 | | { 0 /* */, Hexagon::M2_vrcmacr_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10008 | | { 0 /* */, Hexagon::S2_vrcnegh, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcnegh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10009 | | { 0 /* */, Hexagon::M5_vrmacbsu, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10010 | | { 0 /* */, Hexagon::M5_vrmacbuu, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpybu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10011 | | { 0 /* */, Hexagon::M2_vrmac_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpyh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10012 | | { 0 /* */, Hexagon::M4_vrmpyeh_acc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10013 | | { 0 /* */, Hexagon::M4_vrmpyoh_acc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10014 | | { 0 /* */, Hexagon::A2_vrsadub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrsadub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10015 | | { 0 /* */, Hexagon::S2_asl_r_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10016 | | { 0 /* */, Hexagon::S2_asr_r_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10017 | | { 0 /* */, Hexagon::S2_lsl_r_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10018 | | { 0 /* */, Hexagon::S2_lsr_r_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10019 | | { 0 /* */, Hexagon::M2_dpmpyss_nac_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10020 | | { 0 /* */, Hexagon::M2_dpmpyuu_nac_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10021 | | { 0 /* */, Hexagon::A4_andnp, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_and, MCK__40_, MCK_DoubleRegs, MCK__126_, MCK_DoubleRegs, MCK__41_ }, }, |
10022 | | { 0 /* */, Hexagon::S2_asl_i_p, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10023 | | { 0 /* */, Hexagon::S2_asr_i_p, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10024 | | { 0 /* */, Hexagon::S2_asr_i_p_rnd_goodsyntax, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asrrnd, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10025 | | { 0 /* */, Hexagon::A4_bitspliti, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_bitsplit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10026 | | { 0 /* */, Hexagon::M7_dcmpyiwc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
10027 | | { 0 /* */, Hexagon::M7_dcmpyrwc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
10028 | | { 0 /* */, Hexagon::A4_combineir, Convert__Reg1_0__s32_0Imm1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_ }, }, |
10029 | | { 0 /* */, Hexagon::A4_combineri, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10030 | | { 0 /* */, Hexagon::F2_conv_df2d_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2d, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
10031 | | { 0 /* */, Hexagon::F2_conv_df2ud_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_df2ud, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
10032 | | { 0 /* */, Hexagon::F2_conv_sf2d_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2d, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
10033 | | { 0 /* */, Hexagon::F2_conv_sf2ud_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_convert_95_sf2ud, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
10034 | | { 0 /* */, Hexagon::A7_croundd_ri, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_cround, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10035 | | { 0 /* */, Hexagon::L4_return, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_raw }, }, |
10036 | | { 0 /* */, Hexagon::L2_deallocframe, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_deallocframe, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_raw }, }, |
10037 | | { 0 /* */, Hexagon::S2_lsr_i_p, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10038 | | { 0 /* */, Hexagon::A4_ornp, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_or, MCK__40_, MCK_DoubleRegs, MCK__126_, MCK_DoubleRegs, MCK__41_ }, }, |
10039 | | { 0 /* */, Hexagon::S6_rol_i_p, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_HasV60, { MCK_DoubleRegs, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10040 | | { 0 /* */, Hexagon::A2_vabshsat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsh, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10041 | | { 0 /* */, Hexagon::A2_vabswsat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vabsw, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10042 | | { 0 /* */, Hexagon::S2_valignrb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_valignb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_ }, }, |
10043 | | { 0 /* */, Hexagon::S2_asl_i_vh, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaslh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_ }, }, |
10044 | | { 0 /* */, Hexagon::S2_asl_i_vw, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaslw, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10045 | | { 0 /* */, Hexagon::S2_asr_i_vh, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_ }, }, |
10046 | | { 0 /* */, Hexagon::S2_asr_i_vw, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10047 | | { 0 /* */, Hexagon::A7_vclip, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__61_, MCK_vclip, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10048 | | { 0 /* */, Hexagon::A2_vconj, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vconj, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10049 | | { 0 /* */, Hexagon::S2_lsr_i_vh, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlsrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_ }, }, |
10050 | | { 0 /* */, Hexagon::S2_lsr_i_vw, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vlsrw, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10051 | | { 0 /* */, Hexagon::C2_vmux, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmux, MCK__40_, MCK_PredRegs, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10052 | | { 0 /* */, Hexagon::M2_vrcmpyi_s0c, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
10053 | | { 0 /* */, Hexagon::M2_vrcmpyr_s0c, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
10054 | | { 0 /* */, Hexagon::S2_vsplicerb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vspliceb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_ }, }, |
10055 | | { 0 /* */, Hexagon::S2_asl_r_p_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10056 | | { 0 /* */, Hexagon::S2_asr_r_p_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10057 | | { 0 /* */, Hexagon::S2_lsl_r_p_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10058 | | { 0 /* */, Hexagon::S2_lsr_r_p_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10059 | | { 0 /* */, Hexagon::M4_pmpyw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_pmpyw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10060 | | { 0 /* */, Hexagon::M4_vpmpyh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_vpmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10061 | | { 0 /* */, Hexagon::M4_xor_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_xor, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10062 | | { 0 /* */, Hexagon::S2_asl_r_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10063 | | { 0 /* */, Hexagon::S2_asr_r_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10064 | | { 0 /* */, Hexagon::S2_lsl_r_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_lsl, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10065 | | { 0 /* */, Hexagon::S2_lsr_r_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
10066 | | { 0 /* */, Hexagon::A5_ACS, Convert__Reg1_0__Reg1_1__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV55, { MCK_DoubleRegs, MCK_PredRegs, MCK__61_, MCK_vacsh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10067 | | { 0 /* */, Hexagon::A6_vminub_RdP, Convert__Reg1_0__Reg1_1__Reg1_5__Reg1_6, AMFBS_HasV62, { MCK_DoubleRegs, MCK_PredRegs, MCK__61_, MCK_vminub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10068 | | { 0 /* */, Hexagon::V6_vaddhw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10069 | | { 0 /* */, Hexagon::V6_vaddubh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vaddub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10070 | | { 0 /* */, Hexagon::V6_vadduhw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vadduh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10071 | | { 0 /* */, Hexagon::V6_vdmpybus_dv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vdmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
10072 | | { 0 /* */, Hexagon::V6_vdmpyhb_dv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vdmpyhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
10073 | | { 0 /* */, Hexagon::V6_vdsaduh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vdsaduh, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
10074 | | { 0 /* */, Hexagon::V6_vmpabus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpabus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
10075 | | { 0 /* */, Hexagon::V6_vmpabuu_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpabuu, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
10076 | | { 0 /* */, Hexagon::V6_vmpahb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpahb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
10077 | | { 0 /* */, Hexagon::V6_vmpauhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpauhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
10078 | | { 0 /* */, Hexagon::V6_vmpybv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10079 | | { 0 /* */, Hexagon::V6_vmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10080 | | { 0 /* */, Hexagon::V6_vmpybusv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpybus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10081 | | { 0 /* */, Hexagon::V6_vmpyh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10082 | | { 0 /* */, Hexagon::V6_vmpyhv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10083 | | { 0 /* */, Hexagon::V6_vmpyhus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyhus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10084 | | { 0 /* */, Hexagon::V6_vmpyub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10085 | | { 0 /* */, Hexagon::V6_vmpyubv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10086 | | { 0 /* */, Hexagon::V6_vmpyuh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyuh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10087 | | { 0 /* */, Hexagon::V6_vmpyuhv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10088 | | { 0 /* */, Hexagon::V6_vtmpyb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vtmpyb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
10089 | | { 0 /* */, Hexagon::V6_vtmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vtmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
10090 | | { 0 /* */, Hexagon::V6_vtmpyhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vtmpyhb, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_ }, }, |
10091 | | { 0 /* */, Hexagon::V6_vdealvdd, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__61_, MCK_vdeal, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegsLow8, MCK__41_ }, }, |
10092 | | { 0 /* */, Hexagon::V6_vshuffvdd, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__61_, MCK_vshuff, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegsLow8, MCK__41_ }, }, |
10093 | | { 0 /* */, Hexagon::V6_vswap, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__61_, MCK_vswap, MCK__40_, MCK_HvxQR, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10094 | | { 0 /* */, Hexagon::M4_and_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10095 | | { 0 /* */, Hexagon::S2_asl_r_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10096 | | { 0 /* */, Hexagon::S2_asr_r_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10097 | | { 0 /* */, Hexagon::S2_lsl_r_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10098 | | { 0 /* */, Hexagon::S2_lsr_r_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10099 | | { 0 /* */, Hexagon::M4_and_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10100 | | { 0 /* */, Hexagon::M4_and_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10101 | | { 0 /* */, Hexagon::M2_acci, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10102 | | { 0 /* */, Hexagon::S2_asl_r_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10103 | | { 0 /* */, Hexagon::S2_asr_r_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10104 | | { 0 /* */, Hexagon::S2_lsl_r_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10105 | | { 0 /* */, Hexagon::S2_lsr_r_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10106 | | { 0 /* */, Hexagon::M2_maci, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10107 | | { 0 /* */, Hexagon::F2_sffma, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10108 | | { 0 /* */, Hexagon::M2_subacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10109 | | { 0 /* */, Hexagon::M2_nacci, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10110 | | { 0 /* */, Hexagon::S2_asl_r_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10111 | | { 0 /* */, Hexagon::S2_asr_r_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10112 | | { 0 /* */, Hexagon::S2_lsl_r_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10113 | | { 0 /* */, Hexagon::S2_lsr_r_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10114 | | { 0 /* */, Hexagon::M2_mnaci, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV66, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10115 | | { 0 /* */, Hexagon::F2_sffms, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10116 | | { 0 /* */, Hexagon::A2_abssat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_abs, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10117 | | { 0 /* */, Hexagon::C4_addipc, Convert__Reg1_0__u32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_PC, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10118 | | { 0 /* */, Hexagon::A2_addi, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10119 | | { 0 /* */, Hexagon::A2_andir, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10120 | | { 0 /* */, Hexagon::A4_andn, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
10121 | | { 0 /* */, Hexagon::S2_asl_i_r, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10122 | | { 0 /* */, Hexagon::S2_asr_i_r, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10123 | | { 0 /* */, Hexagon::S2_asr_i_r_rnd_goodsyntax, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asrrnd, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10124 | | { 0 /* */, Hexagon::A7_clip, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_clip, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10125 | | { 0 /* */, Hexagon::S2_clrbit_i, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_clrbit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10126 | | { 0 /* */, Hexagon::F2_conv_df2uw_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2uw, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
10127 | | { 0 /* */, Hexagon::F2_conv_df2w_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_df2w, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
10128 | | { 0 /* */, Hexagon::F2_conv_sf2uw_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2uw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
10129 | | { 0 /* */, Hexagon::F2_conv_sf2w_chop, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_convert_95_sf2w, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_chop }, }, |
10130 | | { 0 /* */, Hexagon::A4_cround_ri, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cround, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10131 | | { 0 /* */, Hexagon::S4_lsli, Convert__Reg1_0__s6_0Imm1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_lsl, MCK__40_, MCK__HASH_, MCK_s6_0Imm, MCK_IntRegs, MCK__41_ }, }, |
10132 | | { 0 /* */, Hexagon::S2_lsr_i_r, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10133 | | { 0 /* */, Hexagon::M2_mpysmi, Convert__Reg1_0__Reg1_4__m32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_m32_0Imm, MCK__41_ }, }, |
10134 | | { 0 /* */, Hexagon::C2_mux, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10135 | | { 0 /* */, Hexagon::A2_negsat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_neg, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10136 | | { 0 /* */, Hexagon::A2_orir, Convert__Reg1_0__Reg1_4__s32_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10137 | | { 0 /* */, Hexagon::A4_orn, Convert__Reg1_0__Reg1_4__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
10138 | | { 0 /* */, Hexagon::S6_rol_i_r, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_HasV60, { MCK_IntRegs, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10139 | | { 0 /* */, Hexagon::A2_roundsat, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10140 | | { 0 /* */, Hexagon::A4_round_ri, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10141 | | { 0 /* */, Hexagon::S2_setbit_i, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_setbit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10142 | | { 0 /* */, Hexagon::A2_subri, Convert__Reg1_0__s32_0Imm1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_ }, }, |
10143 | | { 0 /* */, Hexagon::S2_togglebit_i, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_togglebit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10144 | | { 0 /* */, Hexagon::S2_asr_i_svw_trun, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrw, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10145 | | { 0 /* */, Hexagon::S2_vrndpackwhs, Convert__Reg1_0__Reg1_4, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vrndwh, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10146 | | { 0 /* */, Hexagon::M4_xor_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10147 | | { 0 /* */, Hexagon::M4_xor_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10148 | | { 0 /* */, Hexagon::M2_xor_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10149 | | { 0 /* */, Hexagon::M4_or_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10150 | | { 0 /* */, Hexagon::S2_asl_r_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10151 | | { 0 /* */, Hexagon::S2_asr_r_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10152 | | { 0 /* */, Hexagon::S2_lsl_r_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_lsl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10153 | | { 0 /* */, Hexagon::S2_lsr_r_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10154 | | { 0 /* */, Hexagon::M4_or_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10155 | | { 0 /* */, Hexagon::M4_or_xor, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10156 | | { 0 /* */, Hexagon::F2_sfrecipa, Convert__Reg1_0__Reg1_1__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK_PredRegs, MCK__61_, MCK_sfrecipa, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10157 | | { 0 /* */, Hexagon::V6_vaslh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vaslh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10158 | | { 0 /* */, Hexagon::V6_vaslw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vaslw, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10159 | | { 0 /* */, Hexagon::V6_vasrh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vasrh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10160 | | { 0 /* */, Hexagon::V6_vasrw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vasrw, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10161 | | { 0 /* */, Hexagon::V6_vdmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10162 | | { 0 /* */, Hexagon::V6_vdmpyhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyhb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10163 | | { 0 /* */, Hexagon::V6_vmpyiewh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyiewh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10164 | | { 0 /* */, Hexagon::V6_vmpyiewuh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyiewuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10165 | | { 0 /* */, Hexagon::V6_vmpyih_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyih, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10166 | | { 0 /* */, Hexagon::V6_vmpyihb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyihb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10167 | | { 0 /* */, Hexagon::V6_vmpyiwb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyiwb, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10168 | | { 0 /* */, Hexagon::V6_vmpyiwh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyiwh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10169 | | { 0 /* */, Hexagon::V6_vmpyiwub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyiwub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10170 | | { 0 /* */, Hexagon::V6_vrmpybv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vrmpyb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10171 | | { 0 /* */, Hexagon::V6_vrmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10172 | | { 0 /* */, Hexagon::V6_vrmpybusv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10173 | | { 0 /* */, Hexagon::V6_vrmpyub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10174 | | { 0 /* */, Hexagon::V6_vrmpyubv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10175 | | { 0 /* */, Hexagon::V6_vprefixqb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_prefixsum, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
10176 | | { 0 /* */, Hexagon::V6_lvsplatb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vsplat, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
10177 | | { 0 /* */, Hexagon::V6_vprefixqh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_prefixsum, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
10178 | | { 0 /* */, Hexagon::V6_lvsplath, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsplat, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
10179 | | { 0 /* */, Hexagon::V6_vprefixqw, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_prefixsum, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
10180 | | { 0 /* */, Hexagon::V6_vinsertwr, Convert__Reg1_0__Tie0_0_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vinsert, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
10181 | | { 0 /* */, Hexagon::V6_vabsb_sat, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsb, MCK__40_, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10182 | | { 0 /* */, Hexagon::V6_vabsh_sat, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsh, MCK__40_, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10183 | | { 0 /* */, Hexagon::V6_vabsw_sat, Convert__Reg1_0__Reg1_4, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vabsw, MCK__40_, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10184 | | { 0 /* */, Hexagon::V6_valignb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_valign, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegsLow8, MCK__41_ }, }, |
10185 | | { 0 /* */, Hexagon::V6_vandnqrt, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__61_, MCK_vand, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK_IntRegs, MCK__41_ }, }, |
10186 | | { 0 /* */, Hexagon::V6_vandvnqv, Convert__Reg1_0__Reg1_5__Reg1_6, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__61_, MCK_vand, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK_HvxVR, MCK__41_ }, }, |
10187 | | { 0 /* */, Hexagon::V6_vlalignb, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vlalign, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegsLow8, MCK__41_ }, }, |
10188 | | { 0 /* */, Hexagon::V6_vL32b_nt_ai, Convert__Reg1_0__Reg1_4__imm_95_0, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
10189 | | { 0 /* */, Hexagon::V6_vmux, Convert__Reg1_0__Reg1_4__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmux, MCK__40_, MCK_HvxQR, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10190 | | { 0 /* */, Hexagon::V6_vandqrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK_HvxQR, MCK_IntRegs, MCK__41_ }, }, |
10191 | | { 0 /* */, Hexagon::C4_nbitsclri, Convert__Reg1_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_bitsclr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10192 | | { 0 /* */, Hexagon::S4_ntstbit_i, Convert__Reg1_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10193 | | { 0 /* */, Hexagon::C2_cmpeqp, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10194 | | { 0 /* */, Hexagon::C2_cmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10195 | | { 0 /* */, Hexagon::C2_cmpgtp, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10196 | | { 0 /* */, Hexagon::C2_cmpgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10197 | | { 0 /* */, Hexagon::C2_cmpgtup, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10198 | | { 0 /* */, Hexagon::C2_cmpgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10199 | | { 0 /* */, Hexagon::C2_cmpgt, Convert__Reg1_0__Reg1_7__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_lt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10200 | | { 0 /* */, Hexagon::C2_cmpgtu, Convert__Reg1_0__Reg1_7__Reg1_6, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_ltu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10201 | | { 0 /* */, Hexagon::A4_cmpbeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10202 | | { 0 /* */, Hexagon::A4_cmpbgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10203 | | { 0 /* */, Hexagon::A4_cmpbgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10204 | | { 0 /* */, Hexagon::A4_cmpheq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10205 | | { 0 /* */, Hexagon::A4_cmphgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10206 | | { 0 /* */, Hexagon::A4_cmphgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10207 | | { 0 /* */, Hexagon::F2_dfcmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10208 | | { 0 /* */, Hexagon::F2_dfcmpge, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_ge, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10209 | | { 0 /* */, Hexagon::F2_dfcmpgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10210 | | { 0 /* */, Hexagon::F2_dfcmpuo, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_dfcmp, MCK__DOT_, MCK_uo, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10211 | | { 0 /* */, Hexagon::F2_sfcmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10212 | | { 0 /* */, Hexagon::F2_sfcmpge, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_ge, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10213 | | { 0 /* */, Hexagon::F2_sfcmpgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10214 | | { 0 /* */, Hexagon::F2_sfcmpuo, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_sfcmp, MCK__DOT_, MCK_uo, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10215 | | { 0 /* */, Hexagon::A2_vcmpbeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10216 | | { 0 /* */, Hexagon::A4_vcmpbgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10217 | | { 0 /* */, Hexagon::A2_vcmpbgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10218 | | { 0 /* */, Hexagon::A2_vcmpheq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10219 | | { 0 /* */, Hexagon::A2_vcmphgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10220 | | { 0 /* */, Hexagon::A2_vcmphgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10221 | | { 0 /* */, Hexagon::A2_vcmpweq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10222 | | { 0 /* */, Hexagon::A2_vcmpwgt, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10223 | | { 0 /* */, Hexagon::A2_vcmpwgtu, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
10224 | | { 0 /* */, Hexagon::S2_asl_i_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10225 | | { 0 /* */, Hexagon::S2_asr_i_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10226 | | { 0 /* */, Hexagon::S2_lsr_i_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10227 | | { 0 /* */, Hexagon::S6_rol_i_p_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_HasV60, { MCK_DoubleRegs, MCK__38_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10228 | | { 0 /* */, Hexagon::S2_asl_i_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10229 | | { 0 /* */, Hexagon::S2_asr_i_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10230 | | { 0 /* */, Hexagon::M7_dcmpyiwc_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
10231 | | { 0 /* */, Hexagon::M7_dcmpyrwc_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_HasV67_UseAudio, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
10232 | | { 0 /* */, Hexagon::S2_lsr_i_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10233 | | { 0 /* */, Hexagon::S6_rol_i_p_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_HasV60, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10234 | | { 0 /* */, Hexagon::M2_vrcmaci_s0c, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
10235 | | { 0 /* */, Hexagon::M2_vrcmacr_s0c, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_ }, }, |
10236 | | { 0 /* */, Hexagon::S2_asl_i_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10237 | | { 0 /* */, Hexagon::S2_asr_i_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10238 | | { 0 /* */, Hexagon::S2_lsr_i_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10239 | | { 0 /* */, Hexagon::S6_rol_i_p_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_HasV60, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10240 | | { 0 /* */, Hexagon::A2_addpsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10241 | | { 0 /* */, Hexagon::M2_cmpys_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10242 | | { 0 /* */, Hexagon::A2_combineii, Convert__Reg1_0__s32_0Imm1_5__s8_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
10243 | | { 0 /* */, Hexagon::TFRI64_V2_ext, Convert__Reg1_0__s32_0Imm1_5__s8_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
10244 | | { 0 /* */, Hexagon::A4_combineii, Convert__Reg1_0__s8_0Imm1_5__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK__HASH_, MCK_s8_0Imm, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10245 | | { 0 /* */, Hexagon::F2_dfimm_n, Convert__Reg1_0__u10_0Imm1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_dfmake, MCK__40_, MCK__HASH_, MCK_u10_0Imm, MCK__41_, MCK__COLON_, MCK_neg }, }, |
10246 | | { 0 /* */, Hexagon::F2_dfimm_p, Convert__Reg1_0__u10_0Imm1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_dfmake, MCK__40_, MCK__HASH_, MCK_u10_0Imm, MCK__41_, MCK__COLON_, MCK_pos }, }, |
10247 | | { 0 /* */, Hexagon::L2_loadalignb_io, Convert__Reg1_0__Tie0_0_0__Reg1_4__s32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10248 | | { 0 /* */, Hexagon::L2_loadalignb_pr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10249 | | { 0 /* */, Hexagon::L4_loadalignb_ap, Convert__Reg1_0__Reg1_4__Tie0_0_0__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10250 | | { 0 /* */, Hexagon::L2_loadbsw4_io, Convert__Reg1_0__Reg1_4__s30_2Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s30_2Imm, MCK__41_ }, }, |
10251 | | { 0 /* */, Hexagon::L2_loadbsw4_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10252 | | { 0 /* */, Hexagon::L4_loadbsw4_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10253 | | { 0 /* */, Hexagon::L2_loadrdgp, Convert__Reg1_0__u29_3Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
10254 | | { 0 /* */, Hexagon::L2_loadrd_io, Convert__Reg1_0__Reg1_4__s29_3Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s29_3Imm, MCK__41_ }, }, |
10255 | | { 0 /* */, Hexagon::L2_loadrd_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10256 | | { 0 /* */, Hexagon::L4_loadrd_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10257 | | { 0 /* */, Hexagon::L2_loadalignh_io, Convert__Reg1_0__Tie0_0_0__Reg1_4__s31_1Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_ }, }, |
10258 | | { 0 /* */, Hexagon::L2_loadalignh_pr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10259 | | { 0 /* */, Hexagon::L4_loadalignh_ap, Convert__Reg1_0__Reg1_4__Tie0_0_0__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10260 | | { 0 /* */, Hexagon::L2_loadbzw4_io, Convert__Reg1_0__Reg1_4__s30_2Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s30_2Imm, MCK__41_ }, }, |
10261 | | { 0 /* */, Hexagon::L2_loadbzw4_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10262 | | { 0 /* */, Hexagon::L4_loadbzw4_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10263 | | { 0 /* */, Hexagon::dep_S2_packhl, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_packhl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_deprecated }, }, |
10264 | | { 0 /* */, Hexagon::A2_vaddhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10265 | | { 0 /* */, Hexagon::A2_vaddubs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10266 | | { 0 /* */, Hexagon::A2_vadduhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vadduh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10267 | | { 0 /* */, Hexagon::A2_vaddws, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vaddw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10268 | | { 0 /* */, Hexagon::S2_valignib, Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_valignb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
10269 | | { 0 /* */, Hexagon::A2_vavghcr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd }, }, |
10270 | | { 0 /* */, Hexagon::A2_vavghr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10271 | | { 0 /* */, Hexagon::A2_vavgubr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10272 | | { 0 /* */, Hexagon::A2_vavguhr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavguh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10273 | | { 0 /* */, Hexagon::A2_vavguwr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavguw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10274 | | { 0 /* */, Hexagon::A2_vavgwcr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd }, }, |
10275 | | { 0 /* */, Hexagon::A2_vavgwr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10276 | | { 0 /* */, Hexagon::M2_vcmpy_s0_sat_i, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10277 | | { 0 /* */, Hexagon::M2_vcmpy_s0_sat_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10278 | | { 0 /* */, Hexagon::M2_vdmpys_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10279 | | { 0 /* */, Hexagon::M5_vdmpybsu, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vdmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10280 | | { 0 /* */, Hexagon::M2_vmpy2es_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10281 | | { 0 /* */, Hexagon::M2_vmpy2s_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10282 | | { 0 /* */, Hexagon::M2_vmpy2su_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10283 | | { 0 /* */, Hexagon::M2_mmpyl_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10284 | | { 0 /* */, Hexagon::M2_mmpyul_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10285 | | { 0 /* */, Hexagon::M2_mmpyh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10286 | | { 0 /* */, Hexagon::M2_mmpyuh_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10287 | | { 0 /* */, Hexagon::S4_vrcrotate, Convert__Reg1_0__Reg1_4__Reg1_5__u2_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcrotate, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
10288 | | { 0 /* */, Hexagon::S2_vspliceib, Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vspliceb, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
10289 | | { 0 /* */, Hexagon::A2_vsubhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10290 | | { 0 /* */, Hexagon::A2_vsububs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10291 | | { 0 /* */, Hexagon::A2_vsubuhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10292 | | { 0 /* */, Hexagon::A2_vsubws, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vsubw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10293 | | { 0 /* */, Hexagon::S4_vxaddsubh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxaddsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10294 | | { 0 /* */, Hexagon::S4_vxaddsubw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxaddsubw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10295 | | { 0 /* */, Hexagon::S4_vxsubaddh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxsubaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10296 | | { 0 /* */, Hexagon::S4_vxsubaddw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxsubaddw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10297 | | { 0 /* */, Hexagon::S2_asl_i_p_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10298 | | { 0 /* */, Hexagon::S2_lsr_i_p_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10299 | | { 0 /* */, Hexagon::S6_rol_i_p_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_HasV60, { MCK_DoubleRegs, MCK__94_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10300 | | { 0 /* */, Hexagon::S2_asl_i_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10301 | | { 0 /* */, Hexagon::S2_asr_i_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10302 | | { 0 /* */, Hexagon::S2_lsr_i_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_None, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10303 | | { 0 /* */, Hexagon::S6_rol_i_p_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u6_0Imm1_7, AMFBS_HasV60, { MCK_DoubleRegs, MCK__124_, MCK__61_, MCK_rol, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10304 | | { 0 /* */, Hexagon::V6_vcombine_tmp, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_UseHVXV69, { MCK_HvxWR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vcombine, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
10305 | | { 0 /* */, Hexagon::V6_vaddbsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddb, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10306 | | { 0 /* */, Hexagon::V6_vaddhsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10307 | | { 0 /* */, Hexagon::V6_vaddubsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddub, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10308 | | { 0 /* */, Hexagon::V6_vadduhsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vadduh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10309 | | { 0 /* */, Hexagon::V6_vadduwsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vadduw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10310 | | { 0 /* */, Hexagon::V6_vaddwsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vaddw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10311 | | { 0 /* */, Hexagon::V6_vrmpybusi, Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
10312 | | { 0 /* */, Hexagon::V6_vrmpyubi, Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
10313 | | { 0 /* */, Hexagon::V6_vrsadubi, Convert__Reg1_0__Reg1_4__Reg1_5__u1_0Imm1_7, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vrsadub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
10314 | | { 0 /* */, Hexagon::V6_vsubbsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubb, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10315 | | { 0 /* */, Hexagon::V6_vsubhsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10316 | | { 0 /* */, Hexagon::V6_vsububsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubub, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10317 | | { 0 /* */, Hexagon::V6_vsubuhsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubuh, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10318 | | { 0 /* */, Hexagon::V6_vsubuwsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubuw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10319 | | { 0 /* */, Hexagon::V6_vsubwsat_dv, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxWR, MCK__61_, MCK_vsubw, MCK__40_, MCK_HvxWR, MCK_HvxWR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10320 | | { 0 /* */, Hexagon::M4_and_andn, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
10321 | | { 0 /* */, Hexagon::S2_asl_i_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10322 | | { 0 /* */, Hexagon::S2_asr_i_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10323 | | { 0 /* */, Hexagon::S2_lsr_i_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10324 | | { 0 /* */, Hexagon::S6_rol_i_r_and, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_HasV60, { MCK_IntRegs, MCK__38_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10325 | | { 0 /* */, Hexagon::M2_accii, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10326 | | { 0 /* */, Hexagon::S2_asl_i_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10327 | | { 0 /* */, Hexagon::S2_asr_i_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10328 | | { 0 /* */, Hexagon::S2_lsr_i_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10329 | | { 0 /* */, Hexagon::M2_macsip, Convert__Reg1_0__Tie0_0_0__Reg1_5__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10330 | | { 0 /* */, Hexagon::S6_rol_i_r_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_HasV60, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10331 | | { 0 /* */, Hexagon::M2_naccii, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10332 | | { 0 /* */, Hexagon::S2_asl_i_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10333 | | { 0 /* */, Hexagon::S2_asr_i_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10334 | | { 0 /* */, Hexagon::S2_lsr_i_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10335 | | { 0 /* */, Hexagon::M2_macsin, Convert__Reg1_0__Tie0_0_0__Reg1_5__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10336 | | { 0 /* */, Hexagon::S6_rol_i_r_nac, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_HasV60, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10337 | | { 0 /* */, Hexagon::V6_extractw, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_UseHVX, { MCK_IntRegs, MCK__DOT_, MCK_w, MCK__61_, MCK_vextract, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
10338 | | { 0 /* */, Hexagon::M2_mpysip, Convert__Reg1_0__Reg1_5__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__43_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10339 | | { 0 /* */, Hexagon::M2_mpysin, Convert__Reg1_0__Reg1_5__u8_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__MINUS_, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
10340 | | { 0 /* */, Hexagon::A2_addsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10341 | | { 0 /* */, Hexagon::S2_addasl_rrri, Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_addasl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
10342 | | { 0 /* */, Hexagon::S2_asl_r_r_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10343 | | { 0 /* */, Hexagon::S2_asr_r_r_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10344 | | { 0 /* */, Hexagon::A4_rcmpeq, Convert__Reg1_0__Reg1_6__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10345 | | { 0 /* */, Hexagon::S2_mask, Convert__Reg1_0__u5_0Imm1_5__u5_0Imm1_7, AMFBS_HasV66, { MCK_IntRegs, MCK__61_, MCK_mask, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10346 | | { 0 /* */, Hexagon::L2_loadrbgp, Convert__Reg1_0__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10347 | | { 0 /* */, Hexagon::L2_loadrb_io, Convert__Reg1_0__Reg1_4__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10348 | | { 0 /* */, Hexagon::L2_loadrb_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10349 | | { 0 /* */, Hexagon::L4_loadrb_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10350 | | { 0 /* */, Hexagon::L2_loadbsw2_io, Convert__Reg1_0__Reg1_4__s31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_ }, }, |
10351 | | { 0 /* */, Hexagon::L2_loadbsw2_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10352 | | { 0 /* */, Hexagon::L4_loadbsw2_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10353 | | { 0 /* */, Hexagon::L2_loadrhgp, Convert__Reg1_0__u31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
10354 | | { 0 /* */, Hexagon::L2_loadrh_io, Convert__Reg1_0__Reg1_4__s31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_ }, }, |
10355 | | { 0 /* */, Hexagon::L2_loadrh_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10356 | | { 0 /* */, Hexagon::L4_loadrh_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10357 | | { 0 /* */, Hexagon::L2_loadrubgp, Convert__Reg1_0__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10358 | | { 0 /* */, Hexagon::L2_loadrub_io, Convert__Reg1_0__Reg1_4__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10359 | | { 0 /* */, Hexagon::L2_loadrub_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10360 | | { 0 /* */, Hexagon::L4_loadrub_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10361 | | { 0 /* */, Hexagon::L2_loadbzw2_io, Convert__Reg1_0__Reg1_4__s31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_ }, }, |
10362 | | { 0 /* */, Hexagon::L2_loadbzw2_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10363 | | { 0 /* */, Hexagon::L4_loadbzw2_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10364 | | { 0 /* */, Hexagon::L2_loadruhgp, Convert__Reg1_0__u31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
10365 | | { 0 /* */, Hexagon::L2_loadruh_io, Convert__Reg1_0__Reg1_4__s31_1Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_ }, }, |
10366 | | { 0 /* */, Hexagon::L2_loadruh_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10367 | | { 0 /* */, Hexagon::L4_loadruh_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10368 | | { 0 /* */, Hexagon::L2_loadrigp, Convert__Reg1_0__u30_2Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
10369 | | { 0 /* */, Hexagon::L2_loadri_io, Convert__Reg1_0__Reg1_4__s30_2Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s30_2Imm, MCK__41_ }, }, |
10370 | | { 0 /* */, Hexagon::L2_loadri_pr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10371 | | { 0 /* */, Hexagon::L4_loadri_ap, Convert__Reg1_0__Reg1_4__u32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10372 | | { 0 /* */, Hexagon::M2_dpmpyss_rnd_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10373 | | { 0 /* */, Hexagon::C2_muxri, Convert__Reg1_0__Reg1_4__s32_0Imm1_6__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_ }, }, |
10374 | | { 0 /* */, Hexagon::C2_muxir, Convert__Reg1_0__Reg1_4__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10375 | | { 0 /* */, Hexagon::A4_round_rr_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10376 | | { 0 /* */, Hexagon::F2_sfimm_n, Convert__Reg1_0__u10_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfmake, MCK__40_, MCK__HASH_, MCK_u10_0Imm, MCK__41_, MCK__COLON_, MCK_neg }, }, |
10377 | | { 0 /* */, Hexagon::F2_sfimm_p, Convert__Reg1_0__u10_0Imm1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sfmake, MCK__40_, MCK__HASH_, MCK_u10_0Imm, MCK__41_, MCK__COLON_, MCK_pos }, }, |
10378 | | { 0 /* */, Hexagon::A2_subsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10379 | | { 0 /* */, Hexagon::A2_svaddhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vaddh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10380 | | { 0 /* */, Hexagon::A5_vaddhubs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vaddhub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10381 | | { 0 /* */, Hexagon::A2_svadduhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vadduh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10382 | | { 0 /* */, Hexagon::A2_svavghs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vavgh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10383 | | { 0 /* */, Hexagon::A2_svsubhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsubh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10384 | | { 0 /* */, Hexagon::A2_svsubuhs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vsubuh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10385 | | { 0 /* */, Hexagon::M4_xor_andn, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
10386 | | { 0 /* */, Hexagon::S2_asl_i_r_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10387 | | { 0 /* */, Hexagon::S2_lsr_i_r_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10388 | | { 0 /* */, Hexagon::S6_rol_i_r_xacc, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_HasV60, { MCK_IntRegs, MCK__94_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10389 | | { 0 /* */, Hexagon::S4_or_andi, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10390 | | { 0 /* */, Hexagon::M4_or_andn, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK__126_, MCK_IntRegs, MCK__41_ }, }, |
10391 | | { 0 /* */, Hexagon::S2_asl_i_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10392 | | { 0 /* */, Hexagon::S2_asr_i_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10393 | | { 0 /* */, Hexagon::S2_lsr_i_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10394 | | { 0 /* */, Hexagon::S4_or_ori, Convert__Reg1_0__Tie0_0_0__Reg1_5__s32_0Imm1_7, AMFBS_None, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10395 | | { 0 /* */, Hexagon::S6_rol_i_r_or, Convert__Reg1_0__Tie0_0_0__Reg1_5__u5_0Imm1_7, AMFBS_HasV60, { MCK_IntRegs, MCK__124_, MCK__61_, MCK_rol, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10396 | | { 0 /* */, Hexagon::V6_vaddbsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10397 | | { 0 /* */, Hexagon::V6_vaddhsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10398 | | { 0 /* */, Hexagon::V6_vaddubsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10399 | | { 0 /* */, Hexagon::V6_vadduhsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vadduh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10400 | | { 0 /* */, Hexagon::V6_vadduwsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vadduw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10401 | | { 0 /* */, Hexagon::V6_vaddwsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vaddw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10402 | | { 0 /* */, Hexagon::V6_valignbi, Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_valign, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
10403 | | { 0 /* */, Hexagon::V6_vavgbrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10404 | | { 0 /* */, Hexagon::V6_vavghrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10405 | | { 0 /* */, Hexagon::V6_vavgubrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10406 | | { 0 /* */, Hexagon::V6_vavguhrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavguh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10407 | | { 0 /* */, Hexagon::V6_vavguwrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavguw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10408 | | { 0 /* */, Hexagon::V6_vavgwrnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vavgw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10409 | | { 0 /* */, Hexagon::V6_vdmpyhisat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10410 | | { 0 /* */, Hexagon::V6_vdmpyhsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10411 | | { 0 /* */, Hexagon::V6_vdmpyhvsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10412 | | { 0 /* */, Hexagon::V6_vdmpyhsusat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyhsu, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10413 | | { 0 /* */, Hexagon::V6_vlalignbi, Convert__Reg1_0__Reg1_4__Reg1_5__u3_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vlalign, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
10414 | | { 0 /* */, Hexagon::V6_vL32b_ai, Convert__Reg1_0__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
10415 | | { 0 /* */, Hexagon::V6_vL32b_ppu, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10416 | | { 0 /* */, Hexagon::V6_vL32Ub_ai, Convert__Reg1_0__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
10417 | | { 0 /* */, Hexagon::V6_vL32Ub_ppu, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10418 | | { 0 /* */, Hexagon::V6_vpackhb_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackhb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10419 | | { 0 /* */, Hexagon::V6_vpackhub_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackhub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10420 | | { 0 /* */, Hexagon::V6_vpackwh_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackwh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10421 | | { 0 /* */, Hexagon::V6_vpackwuh_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vpackwuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10422 | | { 0 /* */, Hexagon::V6_vroundhb, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vroundhb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10423 | | { 0 /* */, Hexagon::V6_vroundhub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vroundhub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10424 | | { 0 /* */, Hexagon::V6_vrounduhub, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrounduhub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10425 | | { 0 /* */, Hexagon::V6_vrounduwuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vrounduwuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10426 | | { 0 /* */, Hexagon::V6_vroundwh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vroundwh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10427 | | { 0 /* */, Hexagon::V6_vroundwuh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vroundwuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10428 | | { 0 /* */, Hexagon::V6_vsubbsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubb, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10429 | | { 0 /* */, Hexagon::V6_vsubhsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10430 | | { 0 /* */, Hexagon::V6_vsububsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubub, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10431 | | { 0 /* */, Hexagon::V6_vsubuhsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubuh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10432 | | { 0 /* */, Hexagon::V6_vsubuwsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubuw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10433 | | { 0 /* */, Hexagon::V6_vsubwsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vsubw, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10434 | | { 0 /* */, Hexagon::V6_vandnqrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_7, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK_IntRegs, MCK__41_ }, }, |
10435 | | { 0 /* */, Hexagon::C4_cmpneq, Convert__Reg1_0__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10436 | | { 0 /* */, Hexagon::C4_cmplte, Convert__Reg1_0__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10437 | | { 0 /* */, Hexagon::C4_cmplteu, Convert__Reg1_0__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10438 | | { 0 /* */, Hexagon::C2_cmpeqi, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10439 | | { 0 /* */, Hexagon::C2_cmpgei, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_ge, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
10440 | | { 0 /* */, Hexagon::C2_cmpgeui, Convert__Reg1_0__Reg1_6__u8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_geu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
10441 | | { 0 /* */, Hexagon::C2_cmpgti, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10442 | | { 0 /* */, Hexagon::C2_cmpgtui, Convert__Reg1_0__Reg1_6__u32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10443 | | { 0 /* */, Hexagon::A4_cmpbeqi, Convert__Reg1_0__Reg1_6__u8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
10444 | | { 0 /* */, Hexagon::A4_cmpbgti, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
10445 | | { 0 /* */, Hexagon::A4_cmpbgtui, Convert__Reg1_0__Reg1_6__u32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10446 | | { 0 /* */, Hexagon::A4_cmpheqi, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10447 | | { 0 /* */, Hexagon::A4_cmphgti, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10448 | | { 0 /* */, Hexagon::A4_cmphgtui, Convert__Reg1_0__Reg1_6__u32_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_cmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10449 | | { 0 /* */, Hexagon::A4_vcmpbeqi, Convert__Reg1_0__Reg1_6__u8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
10450 | | { 0 /* */, Hexagon::A4_vcmpbgti, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
10451 | | { 0 /* */, Hexagon::A4_vcmpbgtui, Convert__Reg1_0__Reg1_6__u7_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpb, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u7_0Imm, MCK__41_ }, }, |
10452 | | { 0 /* */, Hexagon::A4_vcmpheqi, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
10453 | | { 0 /* */, Hexagon::A4_vcmphgti, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
10454 | | { 0 /* */, Hexagon::A4_vcmphgtui, Convert__Reg1_0__Reg1_6__u7_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmph, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u7_0Imm, MCK__41_ }, }, |
10455 | | { 0 /* */, Hexagon::A4_vcmpweqi, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
10456 | | { 0 /* */, Hexagon::A4_vcmpwgti, Convert__Reg1_0__Reg1_6__s8_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gt, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
10457 | | { 0 /* */, Hexagon::A4_vcmpwgtui, Convert__Reg1_0__Reg1_6__u7_0Imm1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_vcmpw, MCK__DOT_, MCK_gtu, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u7_0Imm, MCK__41_ }, }, |
10458 | | { 0 /* */, Hexagon::M2_cmacs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10459 | | { 0 /* */, Hexagon::M2_vcmac_s0_sat_i, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10460 | | { 0 /* */, Hexagon::M2_vcmac_s0_sat_r, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10461 | | { 0 /* */, Hexagon::M2_vdmacs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10462 | | { 0 /* */, Hexagon::M5_vdmacbsu, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vdmpybsu, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10463 | | { 0 /* */, Hexagon::M2_vmac2es_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10464 | | { 0 /* */, Hexagon::M2_vmac2s_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10465 | | { 0 /* */, Hexagon::M2_vmac2su_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10466 | | { 0 /* */, Hexagon::M2_mmacls_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10467 | | { 0 /* */, Hexagon::M2_mmaculs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10468 | | { 0 /* */, Hexagon::M2_mmachs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10469 | | { 0 /* */, Hexagon::M2_mmacuhs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10470 | | { 0 /* */, Hexagon::S4_vrcrotate_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u2_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcrotate, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
10471 | | { 0 /* */, Hexagon::M2_cnacs_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10472 | | { 0 /* */, Hexagon::A4_addp_c, Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1_0_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_, MCK__COLON_, MCK_carry }, }, |
10473 | | { 0 /* */, Hexagon::S2_asr_i_p_rnd, Convert__Reg1_0__Reg1_4__u6_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_asr, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10474 | | { 0 /* */, Hexagon::M2_cmpysc_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10475 | | { 0 /* */, Hexagon::S4_extractp, Convert__Reg1_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_extract, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10476 | | { 0 /* */, Hexagon::S2_extractup, Convert__Reg1_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10477 | | { 0 /* */, Hexagon::S2_insertp, Convert__Reg1_0__Tie0_0_0__Reg1_4__u6_0Imm1_6__u6_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_insert, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u6_0Imm, MCK__HASH_, MCK_u6_0Imm, MCK__41_ }, }, |
10478 | | { 0 /* */, Hexagon::L2_loadalignb_pi, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
10479 | | { 0 /* */, Hexagon::L2_loadbsw4_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
10480 | | { 0 /* */, Hexagon::L2_loadrd_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, }, |
10481 | | { 0 /* */, Hexagon::L2_loadalignh_pi, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
10482 | | { 0 /* */, Hexagon::L2_loadbzw4_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
10483 | | { 0 /* */, Hexagon::A4_subp_c, Convert__Reg1_0__Reg1_6__Reg1_4__Reg1_5__Tie1_0_0, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_sub, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK_PredRegs, MCK__41_, MCK__COLON_, MCK_carry }, }, |
10484 | | { 0 /* */, Hexagon::S5_vasrhrnd, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
10485 | | { 0 /* */, Hexagon::S5_vasrhrnd_goodsyntax, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vasrh, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10486 | | { 0 /* */, Hexagon::V6_vmpyhsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10487 | | { 0 /* */, Hexagon::V6_vrmpybusi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vrmpybus, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
10488 | | { 0 /* */, Hexagon::V6_vrmpyubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vrmpyub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
10489 | | { 0 /* */, Hexagon::V6_vrsadubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__u1_0Imm1_8, AMFBS_UseHVX, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vrsadub, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
10490 | | { 0 /* */, Hexagon::V6_vsb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsxt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10491 | | { 0 /* */, Hexagon::V6_vunpackb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vunpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10492 | | { 0 /* */, Hexagon::V6_vcvt_hf_b, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10493 | | { 0 /* */, Hexagon::V6_vcvt_hf_ub, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10494 | | { 0 /* */, Hexagon::V6_vcvt_sf_hf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10495 | | { 0 /* */, Hexagon::V6_vunpackub, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vunpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10496 | | { 0 /* */, Hexagon::V6_vzb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vzxt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10497 | | { 0 /* */, Hexagon::V6_vunpackuh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vunpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10498 | | { 0 /* */, Hexagon::V6_vzh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vzxt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10499 | | { 0 /* */, Hexagon::V6_vsh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsxt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10500 | | { 0 /* */, Hexagon::V6_vunpackh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vunpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10501 | | { 0 /* */, Hexagon::F2_sffma_lib, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_lib }, }, |
10502 | | { 0 /* */, Hexagon::F2_sffms_lib, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_lib }, }, |
10503 | | { 0 /* */, Hexagon::A4_rcmpneq, Convert__Reg1_0__Reg1_7__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
10504 | | { 0 /* */, Hexagon::S2_asl_i_r_sat, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10505 | | { 0 /* */, Hexagon::S2_asr_i_r_rnd, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_asr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10506 | | { 0 /* */, Hexagon::A4_rcmpeqi, Convert__Reg1_0__Reg1_6__s32_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10507 | | { 0 /* */, Hexagon::S4_extract, Convert__Reg1_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_extract, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10508 | | { 0 /* */, Hexagon::S2_extractu, Convert__Reg1_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_extractu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10509 | | { 0 /* */, Hexagon::S2_insert, Convert__Reg1_0__Tie0_0_0__Reg1_4__u5_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_insert, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10510 | | { 0 /* */, Hexagon::L2_loadrb_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
10511 | | { 0 /* */, Hexagon::L2_loadbsw2_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
10512 | | { 0 /* */, Hexagon::L2_loadrh_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
10513 | | { 0 /* */, Hexagon::L2_loadrub_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
10514 | | { 0 /* */, Hexagon::L2_loadbzw2_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
10515 | | { 0 /* */, Hexagon::L2_loadruh_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
10516 | | { 0 /* */, Hexagon::L2_loadri_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
10517 | | { 0 /* */, Hexagon::C2_muxii, Convert__Reg1_0__Reg1_4__s32_0Imm1_6__s8_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mux, MCK__40_, MCK_PredRegs, MCK__HASH_, MCK_s32_0Imm, MCK__HASH_, MCK_s8_0Imm, MCK__41_ }, }, |
10518 | | { 0 /* */, Hexagon::A4_round_ri_sat, Convert__Reg1_0__Reg1_4__u5_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_round, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10519 | | { 0 /* */, Hexagon::S2_tableidxb, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxb, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10520 | | { 0 /* */, Hexagon::S2_tableidxd_goodsyntax, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxd, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10521 | | { 0 /* */, Hexagon::S2_tableidxh_goodsyntax, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxh, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10522 | | { 0 /* */, Hexagon::S2_tableidxw_goodsyntax, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__u5_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxw, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
10523 | | { 0 /* */, Hexagon::S5_asrhub_rnd_sat, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
10524 | | { 0 /* */, Hexagon::S5_asrhub_sat, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10525 | | { 0 /* */, Hexagon::V6_vdmpyhisat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10526 | | { 0 /* */, Hexagon::V6_vdmpyhsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10527 | | { 0 /* */, Hexagon::V6_vdmpyhvsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10528 | | { 0 /* */, Hexagon::V6_vdmpyhsusat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyhsu, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10529 | | { 0 /* */, Hexagon::V6_vabsb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10530 | | { 0 /* */, Hexagon::V6_vdealb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vdeal, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10531 | | { 0 /* */, Hexagon::V6_vshuffb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10532 | | { 0 /* */, Hexagon::V6_vabsh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10533 | | { 0 /* */, Hexagon::V6_vcvt_h_hf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10534 | | { 0 /* */, Hexagon::V6_vdealh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vdeal, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10535 | | { 0 /* */, Hexagon::V6_vnormamth, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vnormamt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10536 | | { 0 /* */, Hexagon::V6_vpopcounth, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vpopcount, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10537 | | { 0 /* */, Hexagon::V6_vshuffh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10538 | | { 0 /* */, Hexagon::V6_vabs_hf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10539 | | { 0 /* */, Hexagon::V6_vcvt_hf_h, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10540 | | { 0 /* */, Hexagon::V6_vcvt_hf_uh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10541 | | { 0 /* */, Hexagon::V6_vfneg_hf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vfneg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10542 | | { 0 /* */, Hexagon::V6_vabs_sf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10543 | | { 0 /* */, Hexagon::V6_vfneg_sf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vfneg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10544 | | { 0 /* */, Hexagon::V6_vabsb, Convert__Reg1_0__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10545 | | { 0 /* */, Hexagon::V6_vabsh, Convert__Reg1_0__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10546 | | { 0 /* */, Hexagon::V6_vcl0h, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vcl0, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10547 | | { 0 /* */, Hexagon::V6_vcvt_uh_hf, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10548 | | { 0 /* */, Hexagon::V6_vabsw, Convert__Reg1_0__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10549 | | { 0 /* */, Hexagon::V6_vcl0w, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vcl0, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10550 | | { 0 /* */, Hexagon::V6_vabsw, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10551 | | { 0 /* */, Hexagon::V6_vassign_fp, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vfmv, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10552 | | { 0 /* */, Hexagon::V6_vnormamtw, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vnormamt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10553 | | { 0 /* */, Hexagon::V6_vL32b_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
10554 | | { 0 /* */, Hexagon::V6_vL32Ub_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
10555 | | { 0 /* */, Hexagon::C4_cmpneqi, Convert__Reg1_0__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10556 | | { 0 /* */, Hexagon::C4_cmpltei, Convert__Reg1_0__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10557 | | { 0 /* */, Hexagon::C4_cmplteui, Convert__Reg1_0__Reg1_7__u32_0Imm1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10558 | | { 0 /* */, Hexagon::C4_and_and, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
10559 | | { 0 /* */, Hexagon::C4_and_or, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
10560 | | { 0 /* */, Hexagon::A4_boundscheck_hi, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_boundscheck, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
10561 | | { 0 /* */, Hexagon::A4_boundscheck_lo, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_boundscheck, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
10562 | | { 0 /* */, Hexagon::C4_or_and, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
10563 | | { 0 /* */, Hexagon::C4_or_or, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_8, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
10564 | | { 0 /* */, Hexagon::M2_cmacsc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10565 | | { 0 /* */, Hexagon::M2_cnacsc_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10566 | | { 0 /* */, Hexagon::A2_addsph, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
10567 | | { 0 /* */, Hexagon::A2_addspl, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_add, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
10568 | | { 0 /* */, Hexagon::L2_loadalignb_pbr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10569 | | { 0 /* */, Hexagon::L2_loadbsw4_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10570 | | { 0 /* */, Hexagon::L2_loadrd_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10571 | | { 0 /* */, Hexagon::L2_loadalignh_pbr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10572 | | { 0 /* */, Hexagon::L2_loadbzw4_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10573 | | { 0 /* */, Hexagon::M2_mpyd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10574 | | { 0 /* */, Hexagon::M2_mpyd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10575 | | { 0 /* */, Hexagon::M2_mpyd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10576 | | { 0 /* */, Hexagon::M2_mpyd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10577 | | { 0 /* */, Hexagon::M2_mpyud_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10578 | | { 0 /* */, Hexagon::M2_mpyud_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10579 | | { 0 /* */, Hexagon::M2_mpyud_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10580 | | { 0 /* */, Hexagon::M2_mpyud_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10581 | | { 0 /* */, Hexagon::M2_mmpyl_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10582 | | { 0 /* */, Hexagon::M2_mmpyul_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10583 | | { 0 /* */, Hexagon::M2_mmpyh_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10584 | | { 0 /* */, Hexagon::M2_mmpyuh_rs0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10585 | | { 0 /* */, Hexagon::A2_vnavghcr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd, MCK__COLON_, MCK_sat }, }, |
10586 | | { 0 /* */, Hexagon::A2_vnavghr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10587 | | { 0 /* */, Hexagon::A2_vnavgwcr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_crnd, MCK__COLON_, MCK_sat }, }, |
10588 | | { 0 /* */, Hexagon::A2_vnavgwr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vnavgw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10589 | | { 0 /* */, Hexagon::M4_vrmpyeh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
10590 | | { 0 /* */, Hexagon::M4_vrmpyoh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
10591 | | { 0 /* */, Hexagon::V6_vunpackob, Convert__Reg1_0__Tie0_0_0__Reg1_7, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__124_, MCK__61_, MCK_vunpacko, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10592 | | { 0 /* */, Hexagon::V6_vunpackoh, Convert__Reg1_0__Tie0_0_0__Reg1_7, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__124_, MCK__61_, MCK_vunpacko, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10593 | | { 0 /* */, Hexagon::V6_vmpyewuh_64, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__61_, MCK_vmpye, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10594 | | { 0 /* */, Hexagon::F2_sffma_sc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_sfmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK_PredRegs, MCK__41_, MCK__COLON_, MCK_scale }, }, |
10595 | | { 0 /* */, Hexagon::A4_rcmpneqi, Convert__Reg1_0__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
10596 | | { 0 /* */, Hexagon::S4_clbpaddi, Convert__Reg1_0__Reg1_6__s6_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_clb, MCK__40_, MCK_DoubleRegs, MCK__41_, MCK__HASH_, MCK_s6_0Imm, MCK__41_ }, }, |
10597 | | { 0 /* */, Hexagon::S4_clbaddi, Convert__Reg1_0__Reg1_6__s6_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_clb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__HASH_, MCK_s6_0Imm, MCK__41_ }, }, |
10598 | | { 0 /* */, Hexagon::A2_addh_l16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10599 | | { 0 /* */, Hexagon::A2_addh_l16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10600 | | { 0 /* */, Hexagon::M4_mpyrr_addr, Convert__Reg1_0__Reg1_4__Tie0_0_7__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
10601 | | { 0 /* */, Hexagon::dep_A2_addsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_deprecated }, }, |
10602 | | { 0 /* */, Hexagon::M2_cmpyrs_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10603 | | { 0 /* */, Hexagon::A2_combine_hh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10604 | | { 0 /* */, Hexagon::A2_combine_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10605 | | { 0 /* */, Hexagon::A2_combine_lh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10606 | | { 0 /* */, Hexagon::A2_combine_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10607 | | { 0 /* */, Hexagon::L2_loadrb_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10608 | | { 0 /* */, Hexagon::L2_loadbsw2_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10609 | | { 0 /* */, Hexagon::L2_loadrh_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10610 | | { 0 /* */, Hexagon::L2_loadrub_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10611 | | { 0 /* */, Hexagon::L2_loadbzw2_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10612 | | { 0 /* */, Hexagon::L2_loadruh_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10613 | | { 0 /* */, Hexagon::L2_loadri_pbr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_ }, }, |
10614 | | { 0 /* */, Hexagon::M2_mpy_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10615 | | { 0 /* */, Hexagon::M2_mpy_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10616 | | { 0 /* */, Hexagon::M2_mpy_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10617 | | { 0 /* */, Hexagon::M2_mpy_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10618 | | { 0 /* */, Hexagon::M2_mpy_up_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
10619 | | { 0 /* */, Hexagon::M2_mpyu_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10620 | | { 0 /* */, Hexagon::M2_mpyu_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10621 | | { 0 /* */, Hexagon::M2_mpyu_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10622 | | { 0 /* */, Hexagon::M2_mpyu_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10623 | | { 0 /* */, Hexagon::A2_subh_l16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10624 | | { 0 /* */, Hexagon::A2_subh_l16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10625 | | { 0 /* */, Hexagon::dep_A2_subsat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_deprecated }, }, |
10626 | | { 0 /* */, Hexagon::M2_vdmpyrs_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10627 | | { 0 /* */, Hexagon::M2_vmpy2s_s0pack, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10628 | | { 0 /* */, Hexagon::V6_vL32b_cur_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
10629 | | { 0 /* */, Hexagon::V6_vL32b_cur_ppu, Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10630 | | { 0 /* */, Hexagon::V6_vaslh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__41_ }, }, |
10631 | | { 0 /* */, Hexagon::V6_vasrh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__41_ }, }, |
10632 | | { 0 /* */, Hexagon::V6_vL32b_tmp_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
10633 | | { 0 /* */, Hexagon::V6_vL32b_tmp_ppu, Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
10634 | | { 0 /* */, Hexagon::V6_vlsrb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vlsr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__41_ }, }, |
10635 | | { 0 /* */, Hexagon::V6_vlsrh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vlsr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__41_ }, }, |
10636 | | { 0 /* */, Hexagon::V6_vlsrw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vlsr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_IntRegs, MCK__41_ }, }, |
10637 | | { 0 /* */, Hexagon::V6_vaslw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
10638 | | { 0 /* */, Hexagon::V6_vasrw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
10639 | | { 0 /* */, Hexagon::V6_vdmpyhsuisat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vdmpyhsu, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_1, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10640 | | { 0 /* */, Hexagon::V6_vL32b_nt_ai, Convert__Reg1_0__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
10641 | | { 0 /* */, Hexagon::V6_vL32b_nt_ppu, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_7, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
10642 | | { 0 /* */, Hexagon::C4_and_andn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
10643 | | { 0 /* */, Hexagon::C4_and_orn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_and, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
10644 | | { 0 /* */, Hexagon::A4_vcmpbeq_any, Convert__Reg1_0__Reg1_8__Reg1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_any8, MCK__40_, MCK_vcmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__41_ }, }, |
10645 | | { 0 /* */, Hexagon::C4_or_andn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_and, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
10646 | | { 0 /* */, Hexagon::C4_or_orn, Convert__Reg1_0__Reg1_4__Reg1_7__Reg1_9, AMFBS_None, { MCK_PredRegs, MCK__61_, MCK_or, MCK__40_, MCK_PredRegs, MCK_or, MCK__40_, MCK_PredRegs, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK__41_ }, }, |
10647 | | { 0 /* */, Hexagon::M2_mpyd_acc_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10648 | | { 0 /* */, Hexagon::M2_mpyd_acc_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10649 | | { 0 /* */, Hexagon::M2_mpyd_acc_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10650 | | { 0 /* */, Hexagon::M2_mpyd_acc_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10651 | | { 0 /* */, Hexagon::M2_mpyud_acc_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10652 | | { 0 /* */, Hexagon::M2_mpyud_acc_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10653 | | { 0 /* */, Hexagon::M2_mpyud_acc_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10654 | | { 0 /* */, Hexagon::M2_mpyud_acc_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10655 | | { 0 /* */, Hexagon::M2_mmacls_rs0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10656 | | { 0 /* */, Hexagon::M2_mmaculs_rs0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10657 | | { 0 /* */, Hexagon::M2_mmachs_rs0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10658 | | { 0 /* */, Hexagon::M2_mmacuhs_rs0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10659 | | { 0 /* */, Hexagon::M4_vrmpyeh_acc_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
10660 | | { 0 /* */, Hexagon::M4_vrmpyoh_acc_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
10661 | | { 0 /* */, Hexagon::M2_mpyd_nac_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10662 | | { 0 /* */, Hexagon::M2_mpyd_nac_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10663 | | { 0 /* */, Hexagon::M2_mpyd_nac_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10664 | | { 0 /* */, Hexagon::M2_mpyd_nac_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10665 | | { 0 /* */, Hexagon::M2_mpyud_nac_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10666 | | { 0 /* */, Hexagon::M2_mpyud_nac_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10667 | | { 0 /* */, Hexagon::M2_mpyud_nac_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10668 | | { 0 /* */, Hexagon::M2_mpyud_nac_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10669 | | { 0 /* */, Hexagon::L4_loadrd_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
10670 | | { 0 /* */, Hexagon::V6_vmpyowh_64_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__43_, MCK__61_, MCK_vmpyo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10671 | | { 0 /* */, Hexagon::M2_mpy_acc_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10672 | | { 0 /* */, Hexagon::M2_mpy_acc_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10673 | | { 0 /* */, Hexagon::M2_mpy_acc_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10674 | | { 0 /* */, Hexagon::M2_mpy_acc_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10675 | | { 0 /* */, Hexagon::M2_mpyu_acc_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10676 | | { 0 /* */, Hexagon::M2_mpyu_acc_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10677 | | { 0 /* */, Hexagon::M2_mpyu_acc_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10678 | | { 0 /* */, Hexagon::M2_mpyu_acc_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10679 | | { 0 /* */, Hexagon::M2_mpy_nac_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10680 | | { 0 /* */, Hexagon::M2_mpy_nac_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10681 | | { 0 /* */, Hexagon::M2_mpy_nac_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10682 | | { 0 /* */, Hexagon::M2_mpy_nac_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10683 | | { 0 /* */, Hexagon::M2_mpyu_nac_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10684 | | { 0 /* */, Hexagon::M2_mpyu_nac_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10685 | | { 0 /* */, Hexagon::M2_mpyu_nac_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10686 | | { 0 /* */, Hexagon::M2_mpyu_nac_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_ }, }, |
10687 | | { 0 /* */, Hexagon::M4_mpyrr_addi, Convert__Reg1_0__u32_0Imm1_5__Reg1_8__Reg1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
10688 | | { 0 /* */, Hexagon::S4_addaddi, Convert__Reg1_0__Reg1_4__Reg1_7__s32_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__41_ }, }, |
10689 | | { 0 /* */, Hexagon::M4_mpyri_addr_u2, Convert__Reg1_0__Reg1_4__u6_2Imm1_8__Reg1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_mpyi, MCK__40_, MCK__HASH_, MCK_u6_2Imm, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
10690 | | { 0 /* */, Hexagon::M4_mpyri_addr, Convert__Reg1_0__Reg1_4__Reg1_7__u32_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__41_ }, }, |
10691 | | { 0 /* */, Hexagon::S4_subaddi, Convert__Reg1_0__Reg1_4__s32_0Imm1_8__Reg1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_sub, MCK__40_, MCK__HASH_, MCK_s32_0Imm, MCK_IntRegs, MCK__41_, MCK__41_ }, }, |
10692 | | { 0 /* */, Hexagon::M2_cmpyrsc_s0, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10693 | | { 0 /* */, Hexagon::L4_loadrb_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
10694 | | { 0 /* */, Hexagon::L4_loadrh_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
10695 | | { 0 /* */, Hexagon::L4_loadrub_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
10696 | | { 0 /* */, Hexagon::L4_loadruh_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
10697 | | { 0 /* */, Hexagon::L4_loadri_rr, Convert__Reg1_0__Reg1_4__Reg1_6__u2_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
10698 | | { 0 /* */, Hexagon::S4_or_andix, Convert__Reg1_0__Reg1_4__Tie0_0_7__s32_0Imm1_9, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_and, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__41_ }, }, |
10699 | | { 0 /* */, Hexagon::S2_tableidxb, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxb, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
10700 | | { 0 /* */, Hexagon::S2_tableidxd, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxd, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
10701 | | { 0 /* */, Hexagon::S2_tableidxh, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxh, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
10702 | | { 0 /* */, Hexagon::S2_tableidxw, Convert__Reg1_0__Tie0_0_0__Reg1_4__u4_0Imm1_6__s6_0Imm1_8, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_tableidxw, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u4_0Imm, MCK__HASH_, MCK_s6_0Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
10703 | | { 0 /* */, Hexagon::S5_asrhub_rnd_sat_goodsyntax, Convert__Reg1_0__Reg1_4__u4_0Imm1_6, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vasrhub, MCK__40_, MCK_DoubleRegs, MCK__HASH_, MCK_u4_0Imm, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
10704 | | { 0 /* */, Hexagon::V6_vdmpyhsuisat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVX, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vdmpyhsu, MCK__40_, MCK_HvxWR, MCK_IntRegs, MCK__HASH_, MCK_1, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10705 | | { 0 /* */, Hexagon::V6_vabsb_sat, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10706 | | { 0 /* */, Hexagon::V6_vL32b_cur_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
10707 | | { 0 /* */, Hexagon::V6_vaslh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__41_ }, }, |
10708 | | { 0 /* */, Hexagon::V6_vasrh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__41_ }, }, |
10709 | | { 0 /* */, Hexagon::V6_vabsh_sat, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10710 | | { 0 /* */, Hexagon::V6_vL32b_tmp_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
10711 | | { 0 /* */, Hexagon::V6_vaslw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
10712 | | { 0 /* */, Hexagon::V6_vasrw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__41_ }, }, |
10713 | | { 0 /* */, Hexagon::V6_vabsw_sat, Convert__Reg1_0__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vabs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10714 | | { 0 /* */, Hexagon::V6_vL32b_nt_pi, Convert__Reg1_0__Reg1_4__Tie1_0_0__s3_0Imm1_8, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
10715 | | { 0 /* */, Hexagon::V6_shuffeqh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxQR, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuffe, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_h, MCK_HvxQR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10716 | | { 0 /* */, Hexagon::V6_shuffeqw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxQR, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuffe, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10717 | | { 0 /* */, Hexagon::V6_vandvrt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxQR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vand, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10718 | | { 0 /* */, Hexagon::V6_veqb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10719 | | { 0 /* */, Hexagon::V6_veqh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10720 | | { 0 /* */, Hexagon::V6_veqb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10721 | | { 0 /* */, Hexagon::V6_veqh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10722 | | { 0 /* */, Hexagon::V6_veqw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10723 | | { 0 /* */, Hexagon::V6_veqw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10724 | | { 0 /* */, Hexagon::V6_vgtb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10725 | | { 0 /* */, Hexagon::V6_vgtbf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXQFloat, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
10726 | | { 0 /* */, Hexagon::V6_vgth, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10727 | | { 0 /* */, Hexagon::V6_vgthf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10728 | | { 0 /* */, Hexagon::V6_vgtsf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10729 | | { 0 /* */, Hexagon::V6_vgtub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10730 | | { 0 /* */, Hexagon::V6_vgtuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10731 | | { 0 /* */, Hexagon::V6_vgtuw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10732 | | { 0 /* */, Hexagon::V6_vgtw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10733 | | { 0 /* */, Hexagon::A6_vcmpbeq_notany, Convert__Reg1_0__Reg1_9__Reg1_10, AMFBS_HasV65, { MCK_PredRegs, MCK__61_, MCK__EXCLAIM_, MCK_any8, MCK__40_, MCK_vcmpb, MCK__DOT_, MCK_eq, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__41_ }, }, |
10734 | | { 0 /* */, Hexagon::V6_vrmpyzcb_rt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr16mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10735 | | { 0 /* */, Hexagon::V6_vrmpyzcbs_rt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr16mpyzs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10736 | | { 0 /* */, Hexagon::V6_vrmpyznb_rt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr8mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_n, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10737 | | { 0 /* */, Hexagon::V6_vrmpyzbb_rt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10738 | | { 0 /* */, Hexagon::V6_vrmpyzbub_rt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10739 | | { 0 /* */, Hexagon::M2_cmpys_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10740 | | { 0 /* */, Hexagon::L4_loadalignb_ur, Convert__Reg1_0__Tie0_0_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10741 | | { 0 /* */, Hexagon::L4_loadbsw4_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10742 | | { 0 /* */, Hexagon::L4_loadrd_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10743 | | { 0 /* */, Hexagon::L4_loadalignh_ur, Convert__Reg1_0__Tie0_0_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10744 | | { 0 /* */, Hexagon::L4_loadbzw4_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10745 | | { 0 /* */, Hexagon::M2_mpyd_rnd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10746 | | { 0 /* */, Hexagon::M2_mpyd_rnd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10747 | | { 0 /* */, Hexagon::M2_mpyd_rnd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10748 | | { 0 /* */, Hexagon::M2_mpyd_rnd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10749 | | { 0 /* */, Hexagon::M2_vcmpy_s1_sat_i, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyi, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10750 | | { 0 /* */, Hexagon::M2_vcmpy_s1_sat_r, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vcmpyr, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10751 | | { 0 /* */, Hexagon::M2_vdmpys_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10752 | | { 0 /* */, Hexagon::M2_vmpy2es_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10753 | | { 0 /* */, Hexagon::M2_vmpy2s_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10754 | | { 0 /* */, Hexagon::M2_vmpy2su_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10755 | | { 0 /* */, Hexagon::M2_mmpyl_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10756 | | { 0 /* */, Hexagon::M2_mmpyul_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10757 | | { 0 /* */, Hexagon::M2_mmpyh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10758 | | { 0 /* */, Hexagon::M2_mmpyuh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10759 | | { 0 /* */, Hexagon::M2_vrcmpys_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10760 | | { 0 /* */, Hexagon::V6_vaddb_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_b, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10761 | | { 0 /* */, Hexagon::V6_vshufoeb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuffoe, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10762 | | { 0 /* */, Hexagon::V6_vsubb_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_b, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10763 | | { 0 /* */, Hexagon::V6_vaddh_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_HvxWR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10764 | | { 0 /* */, Hexagon::V6_vaddubh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10765 | | { 0 /* */, Hexagon::V6_vdmpybus_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10766 | | { 0 /* */, Hexagon::V6_vmpabusv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10767 | | { 0 /* */, Hexagon::V6_vmpabuuv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10768 | | { 0 /* */, Hexagon::V6_vmpabus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10769 | | { 0 /* */, Hexagon::V6_vmpabuu, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10770 | | { 0 /* */, Hexagon::V6_vmpybv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10771 | | { 0 /* */, Hexagon::V6_vmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10772 | | { 0 /* */, Hexagon::V6_vmpybusv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10773 | | { 0 /* */, Hexagon::V6_vshufoeh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuffoe, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10774 | | { 0 /* */, Hexagon::V6_vsubh_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_HvxWR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10775 | | { 0 /* */, Hexagon::V6_vsububh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10776 | | { 0 /* */, Hexagon::V6_vtmpyb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10777 | | { 0 /* */, Hexagon::V6_vtmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10778 | | { 0 /* */, Hexagon::V6_vmpy_qf32_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxWR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10779 | | { 0 /* */, Hexagon::V6_vmpy_qf32_mix_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxWR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10780 | | { 0 /* */, Hexagon::V6_vmpy_qf32_qf16, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxWR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__41_ }, }, |
10781 | | { 0 /* */, Hexagon::V6_vadd_sf_bf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
10782 | | { 0 /* */, Hexagon::V6_vadd_sf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10783 | | { 0 /* */, Hexagon::V6_vmpy_sf_bf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
10784 | | { 0 /* */, Hexagon::V6_vmpy_sf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10785 | | { 0 /* */, Hexagon::V6_vsub_sf_bf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
10786 | | { 0 /* */, Hexagon::V6_vsub_sf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10787 | | { 0 /* */, Hexagon::V6_vmpyub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10788 | | { 0 /* */, Hexagon::V6_vmpyubv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10789 | | { 0 /* */, Hexagon::V6_vdsaduh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vdsad, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10790 | | { 0 /* */, Hexagon::V6_vmpyuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10791 | | { 0 /* */, Hexagon::V6_vmpyuhv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10792 | | { 0 /* */, Hexagon::V6_vrmpyub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10793 | | { 0 /* */, Hexagon::V6_vrmpyub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10794 | | { 0 /* */, Hexagon::V6_vaddw_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10795 | | { 0 /* */, Hexagon::V6_vaddhw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10796 | | { 0 /* */, Hexagon::V6_vadduhw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10797 | | { 0 /* */, Hexagon::V6_vasr_into, Convert__Reg1_0__Tie0_0_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vasrinto, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10798 | | { 0 /* */, Hexagon::V6_vdmpyhb_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10799 | | { 0 /* */, Hexagon::V6_vmpahb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10800 | | { 0 /* */, Hexagon::V6_vmpauhb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10801 | | { 0 /* */, Hexagon::V6_vmpyh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10802 | | { 0 /* */, Hexagon::V6_vmpyhv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10803 | | { 0 /* */, Hexagon::V6_vmpyhus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10804 | | { 0 /* */, Hexagon::V6_vrmpybub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10805 | | { 0 /* */, Hexagon::V6_vrmpybub_rtt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10806 | | { 0 /* */, Hexagon::V6_vsubw_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10807 | | { 0 /* */, Hexagon::V6_vsubhw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10808 | | { 0 /* */, Hexagon::V6_vsubuhw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10809 | | { 0 /* */, Hexagon::V6_vtmpyhb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10810 | | { 0 /* */, Hexagon::S4_addi_asl_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
10811 | | { 0 /* */, Hexagon::S4_addi_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
10812 | | { 0 /* */, Hexagon::M4_mpyri_addi, Convert__Reg1_0__u32_0Imm1_5__Reg1_8__u6_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_mpyi, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__41_ }, }, |
10813 | | { 0 /* */, Hexagon::A2_addh_l16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10814 | | { 0 /* */, Hexagon::A2_addh_l16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10815 | | { 0 /* */, Hexagon::S4_andi_asl_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
10816 | | { 0 /* */, Hexagon::S4_andi_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
10817 | | { 0 /* */, Hexagon::M7_wcmpyiw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10818 | | { 0 /* */, Hexagon::M7_wcmpyrw, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10819 | | { 0 /* */, Hexagon::L4_loadrb_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10820 | | { 0 /* */, Hexagon::L4_loadbsw2_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10821 | | { 0 /* */, Hexagon::L4_loadrh_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10822 | | { 0 /* */, Hexagon::L4_loadrub_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10823 | | { 0 /* */, Hexagon::L4_loadbzw2_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10824 | | { 0 /* */, Hexagon::L4_loadruh_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10825 | | { 0 /* */, Hexagon::L4_loadri_ur, Convert__Reg1_0__Reg1_4__u2_0Imm1_8__u32_0Imm1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
10826 | | { 0 /* */, Hexagon::M2_mpy_rnd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10827 | | { 0 /* */, Hexagon::M2_mpy_sat_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10828 | | { 0 /* */, Hexagon::M2_mpy_rnd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10829 | | { 0 /* */, Hexagon::M2_mpy_sat_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10830 | | { 0 /* */, Hexagon::M2_mpy_rnd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10831 | | { 0 /* */, Hexagon::M2_mpy_sat_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10832 | | { 0 /* */, Hexagon::M2_mpy_rnd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
10833 | | { 0 /* */, Hexagon::M2_mpy_sat_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10834 | | { 0 /* */, Hexagon::M2_mpy_up_s1_sat, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10835 | | { 0 /* */, Hexagon::S4_ori_asl_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
10836 | | { 0 /* */, Hexagon::S4_ori_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
10837 | | { 0 /* */, Hexagon::S4_subi_asl_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_asl, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
10838 | | { 0 /* */, Hexagon::S4_subi_lsr_ri, Convert__Reg1_0__u32_0Imm1_5__Tie0_0_8__u5_0Imm1_10, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK_lsr, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_ }, }, |
10839 | | { 0 /* */, Hexagon::A2_subh_l16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10840 | | { 0 /* */, Hexagon::A2_subh_l16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
10841 | | { 0 /* */, Hexagon::V6_vaddb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10842 | | { 0 /* */, Hexagon::V6_vavgb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10843 | | { 0 /* */, Hexagon::V6_vcvt_b_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10844 | | { 0 /* */, Hexagon::V6_vdealb4w, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vdeale, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10845 | | { 0 /* */, Hexagon::V6_vmaxb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10846 | | { 0 /* */, Hexagon::V6_vminb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10847 | | { 0 /* */, Hexagon::V6_vnavgb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vnavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10848 | | { 0 /* */, Hexagon::V6_vnavgub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vnavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10849 | | { 0 /* */, Hexagon::V6_vpackeb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vpacke, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10850 | | { 0 /* */, Hexagon::V6_vpackob, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vpacko, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10851 | | { 0 /* */, Hexagon::V6_vshuffeb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuffe, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10852 | | { 0 /* */, Hexagon::V6_vshuffob, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vshuffo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10853 | | { 0 /* */, Hexagon::V6_vsubb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10854 | | { 0 /* */, Hexagon::V6_vcvt_bf_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10855 | | { 0 /* */, Hexagon::V6_vmax_bf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
10856 | | { 0 /* */, Hexagon::V6_vmin_bf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
10857 | | { 0 /* */, Hexagon::V6_vL32b_nt_cur_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
10858 | | { 0 /* */, Hexagon::V6_vL32b_nt_cur_ppu, Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
10859 | | { 0 /* */, Hexagon::V6_vaddh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10860 | | { 0 /* */, Hexagon::V6_vaslhv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10861 | | { 0 /* */, Hexagon::V6_vasrhv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10862 | | { 0 /* */, Hexagon::V6_vavgh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10863 | | { 0 /* */, Hexagon::V6_vdmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10864 | | { 0 /* */, Hexagon::V6_vlsrhv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vlsr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10865 | | { 0 /* */, Hexagon::V6_vlut4, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vlut4, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_DoubleRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10866 | | { 0 /* */, Hexagon::V6_vmaxh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10867 | | { 0 /* */, Hexagon::V6_vminh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10868 | | { 0 /* */, Hexagon::V6_vmpyihb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10869 | | { 0 /* */, Hexagon::V6_vmpyih, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10870 | | { 0 /* */, Hexagon::V6_vnavgh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vnavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10871 | | { 0 /* */, Hexagon::V6_vpackeh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vpacke, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10872 | | { 0 /* */, Hexagon::V6_vpackoh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vpacko, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10873 | | { 0 /* */, Hexagon::V6_vsatwh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsat, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10874 | | { 0 /* */, Hexagon::V6_vshufeh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuffe, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10875 | | { 0 /* */, Hexagon::V6_vshufoh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vshuffo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10876 | | { 0 /* */, Hexagon::V6_vsubh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10877 | | { 0 /* */, Hexagon::V6_vadd_hf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10878 | | { 0 /* */, Hexagon::V6_vcvt_hf_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10879 | | { 0 /* */, Hexagon::V6_vfmax_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vfmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10880 | | { 0 /* */, Hexagon::V6_vfmin_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vfmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10881 | | { 0 /* */, Hexagon::V6_vmax_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10882 | | { 0 /* */, Hexagon::V6_vmin_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10883 | | { 0 /* */, Hexagon::V6_vmpy_hf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10884 | | { 0 /* */, Hexagon::V6_vsub_hf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10885 | | { 0 /* */, Hexagon::V6_vadd_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10886 | | { 0 /* */, Hexagon::V6_vadd_qf16_mix, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10887 | | { 0 /* */, Hexagon::V6_vadd_qf16, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__41_ }, }, |
10888 | | { 0 /* */, Hexagon::V6_vmpy_qf16_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10889 | | { 0 /* */, Hexagon::V6_vmpy_qf16_mix_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10890 | | { 0 /* */, Hexagon::V6_vmpy_qf16, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__41_ }, }, |
10891 | | { 0 /* */, Hexagon::V6_vsub_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10892 | | { 0 /* */, Hexagon::V6_vsub_qf16_mix, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10893 | | { 0 /* */, Hexagon::V6_vsub_qf16, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK_HvxVR, MCK__DOT_, MCK_qf16, MCK__41_ }, }, |
10894 | | { 0 /* */, Hexagon::V6_vadd_qf32, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__41_ }, }, |
10895 | | { 0 /* */, Hexagon::V6_vadd_qf32_mix, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10896 | | { 0 /* */, Hexagon::V6_vadd_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10897 | | { 0 /* */, Hexagon::V6_vmpy_qf32, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__41_ }, }, |
10898 | | { 0 /* */, Hexagon::V6_vmpy_qf32_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10899 | | { 0 /* */, Hexagon::V6_vsub_qf32, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__41_ }, }, |
10900 | | { 0 /* */, Hexagon::V6_vsub_qf32_mix, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10901 | | { 0 /* */, Hexagon::V6_vsub_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_qf32, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10902 | | { 0 /* */, Hexagon::V6_vadd_sf_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10903 | | { 0 /* */, Hexagon::V6_vdmpy_sf_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10904 | | { 0 /* */, Hexagon::V6_vfmax_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vfmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10905 | | { 0 /* */, Hexagon::V6_vfmin_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vfmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10906 | | { 0 /* */, Hexagon::V6_vmax_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10907 | | { 0 /* */, Hexagon::V6_vmin_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXQFloat, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10908 | | { 0 /* */, Hexagon::V6_vmpy_sf_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10909 | | { 0 /* */, Hexagon::V6_vsub_sf_sf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10910 | | { 0 /* */, Hexagon::V6_vL32b_nt_tmp_ai, Convert__Reg1_0__Reg1_6__s4_0Imm1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
10911 | | { 0 /* */, Hexagon::V6_vL32b_nt_tmp_ppu, Convert__Reg1_0__Reg1_6__Tie1_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
10912 | | { 0 /* */, Hexagon::V6_vabsdiffub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10913 | | { 0 /* */, Hexagon::V6_vandqrt, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vand, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10914 | | { 0 /* */, Hexagon::V6_vavgub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10915 | | { 0 /* */, Hexagon::V6_vcvt_ub_hf, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vcvt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10916 | | { 0 /* */, Hexagon::V6_vmaxub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10917 | | { 0 /* */, Hexagon::V6_vminub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10918 | | { 0 /* */, Hexagon::V6_vsathub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vsat, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10919 | | { 0 /* */, Hexagon::V6_vabsdiffh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10920 | | { 0 /* */, Hexagon::V6_vabsdiffuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10921 | | { 0 /* */, Hexagon::V6_vavguh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10922 | | { 0 /* */, Hexagon::V6_vmaxuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10923 | | { 0 /* */, Hexagon::V6_vminuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10924 | | { 0 /* */, Hexagon::V6_vsatuwuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vsat, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10925 | | { 0 /* */, Hexagon::V6_vabsdiffw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vabsdiff, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10926 | | { 0 /* */, Hexagon::V6_vavguw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10927 | | { 0 /* */, Hexagon::V6_vmpyuhe, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vmpye, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10928 | | { 0 /* */, Hexagon::V6_vrmpyub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10929 | | { 0 /* */, Hexagon::V6_vrmpyubv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10930 | | { 0 /* */, Hexagon::V6_vrotr, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrotr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10931 | | { 0 /* */, Hexagon::V6_vaddw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10932 | | { 0 /* */, Hexagon::V6_vaslwv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vasl, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10933 | | { 0 /* */, Hexagon::V6_vasrwv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10934 | | { 0 /* */, Hexagon::V6_vavgw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10935 | | { 0 /* */, Hexagon::V6_vdmpyhb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10936 | | { 0 /* */, Hexagon::V6_vlsrwv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vlsr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10937 | | { 0 /* */, Hexagon::V6_vmaxw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmax, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10938 | | { 0 /* */, Hexagon::V6_vminw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmin, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10939 | | { 0 /* */, Hexagon::V6_vmpyewuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpye, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10940 | | { 0 /* */, Hexagon::V6_vmpyiwb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10941 | | { 0 /* */, Hexagon::V6_vmpyiwh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10942 | | { 0 /* */, Hexagon::V6_vmpyiwub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10943 | | { 0 /* */, Hexagon::V6_vmpyiewuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyie, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10944 | | { 0 /* */, Hexagon::V6_vmpyieoh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyieo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10945 | | { 0 /* */, Hexagon::V6_vmpyiowh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyio, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10946 | | { 0 /* */, Hexagon::V6_vnavgw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vnavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10947 | | { 0 /* */, Hexagon::V6_vrmpybv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10948 | | { 0 /* */, Hexagon::V6_vrmpybus, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10949 | | { 0 /* */, Hexagon::V6_vrmpybusv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10950 | | { 0 /* */, Hexagon::V6_vsatdw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV66, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsatdw, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10951 | | { 0 /* */, Hexagon::V6_vsubw, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10952 | | { 0 /* */, Hexagon::V6_vmpyhss, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10953 | | { 0 /* */, Hexagon::V6_vmpyowh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyowh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
10954 | | { 0 /* */, Hexagon::V6_veqb_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10955 | | { 0 /* */, Hexagon::V6_veqh_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10956 | | { 0 /* */, Hexagon::V6_veqb_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10957 | | { 0 /* */, Hexagon::V6_veqh_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10958 | | { 0 /* */, Hexagon::V6_veqw_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10959 | | { 0 /* */, Hexagon::V6_veqw_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10960 | | { 0 /* */, Hexagon::V6_vgtb_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10961 | | { 0 /* */, Hexagon::V6_vgtbf_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV73_UseHVXQFloat, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
10962 | | { 0 /* */, Hexagon::V6_vgth_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10963 | | { 0 /* */, Hexagon::V6_vgthf_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10964 | | { 0 /* */, Hexagon::V6_vgtsf_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10965 | | { 0 /* */, Hexagon::V6_vgtub_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10966 | | { 0 /* */, Hexagon::V6_vgtuh_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10967 | | { 0 /* */, Hexagon::V6_vgtuw_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10968 | | { 0 /* */, Hexagon::V6_vgtw_and, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__38_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10969 | | { 0 /* */, Hexagon::V6_vandvrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__DOT_, MCK_ub, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10970 | | { 0 /* */, Hexagon::V6_veqb_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10971 | | { 0 /* */, Hexagon::V6_veqh_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10972 | | { 0 /* */, Hexagon::V6_veqb_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10973 | | { 0 /* */, Hexagon::V6_veqh_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10974 | | { 0 /* */, Hexagon::V6_veqw_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10975 | | { 0 /* */, Hexagon::V6_veqw_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10976 | | { 0 /* */, Hexagon::V6_vgtb_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10977 | | { 0 /* */, Hexagon::V6_vgtbf_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV73_UseHVXQFloat, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
10978 | | { 0 /* */, Hexagon::V6_vgth_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10979 | | { 0 /* */, Hexagon::V6_vgthf_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10980 | | { 0 /* */, Hexagon::V6_vgtsf_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10981 | | { 0 /* */, Hexagon::V6_vgtub_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10982 | | { 0 /* */, Hexagon::V6_vgtuh_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10983 | | { 0 /* */, Hexagon::V6_vgtuw_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10984 | | { 0 /* */, Hexagon::V6_vgtw_xor, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__94_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10985 | | { 0 /* */, Hexagon::V6_veqb_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10986 | | { 0 /* */, Hexagon::V6_veqh_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10987 | | { 0 /* */, Hexagon::V6_veqb_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10988 | | { 0 /* */, Hexagon::V6_veqh_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10989 | | { 0 /* */, Hexagon::V6_veqw_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10990 | | { 0 /* */, Hexagon::V6_veqw_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
10991 | | { 0 /* */, Hexagon::V6_vgtb_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
10992 | | { 0 /* */, Hexagon::V6_vgtbf_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV73_UseHVXQFloat, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
10993 | | { 0 /* */, Hexagon::V6_vgth_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
10994 | | { 0 /* */, Hexagon::V6_vgthf_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
10995 | | { 0 /* */, Hexagon::V6_vgtsf_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__41_ }, }, |
10996 | | { 0 /* */, Hexagon::V6_vgtub_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
10997 | | { 0 /* */, Hexagon::V6_vgtuh_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
10998 | | { 0 /* */, Hexagon::V6_vgtuw_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_ }, }, |
10999 | | { 0 /* */, Hexagon::V6_vgtw_or, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxQR, MCK__124_, MCK__61_, MCK_vcmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
11000 | | { 0 /* */, Hexagon::V6_vrmpyzcb_rt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr16mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11001 | | { 0 /* */, Hexagon::V6_vrmpyzcbs_rt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr16mpyzs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11002 | | { 0 /* */, Hexagon::V6_vrmpyznb_rt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr8mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_n, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11003 | | { 0 /* */, Hexagon::V6_vrmpyzbb_rt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11004 | | { 0 /* */, Hexagon::V6_vrmpyzbub_rt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11005 | | { 0 /* */, Hexagon::M2_cmacs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11006 | | { 0 /* */, Hexagon::M2_vdmacs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11007 | | { 0 /* */, Hexagon::M2_vmac2es_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyeh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11008 | | { 0 /* */, Hexagon::M2_vmac2s_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11009 | | { 0 /* */, Hexagon::M2_vmac2su_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyhsu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11010 | | { 0 /* */, Hexagon::M2_mmacls_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11011 | | { 0 /* */, Hexagon::M2_mmaculs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11012 | | { 0 /* */, Hexagon::M2_mmachs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11013 | | { 0 /* */, Hexagon::M2_mmacuhs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11014 | | { 0 /* */, Hexagon::M2_vrcmpys_acc_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11015 | | { 0 /* */, Hexagon::M2_cnacs_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11016 | | { 0 /* */, Hexagon::M2_cmpysc_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11017 | | { 0 /* */, Hexagon::L2_loadalignb_pcr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11018 | | { 0 /* */, Hexagon::L2_loadbsw4_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11019 | | { 0 /* */, Hexagon::L2_loadrd_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11020 | | { 0 /* */, Hexagon::L2_loadalignh_pcr, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11021 | | { 0 /* */, Hexagon::L2_loadbzw4_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11022 | | { 0 /* */, Hexagon::V6_vaddubh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11023 | | { 0 /* */, Hexagon::V6_vdmpybus_dv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11024 | | { 0 /* */, Hexagon::V6_vmpabus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11025 | | { 0 /* */, Hexagon::V6_vmpabuu_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11026 | | { 0 /* */, Hexagon::V6_vmpybv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11027 | | { 0 /* */, Hexagon::V6_vmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11028 | | { 0 /* */, Hexagon::V6_vmpybusv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11029 | | { 0 /* */, Hexagon::V6_vtmpyb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11030 | | { 0 /* */, Hexagon::V6_vtmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11031 | | { 0 /* */, Hexagon::V6_vlutvwh, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vlut16, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_ }, }, |
11032 | | { 0 /* */, Hexagon::V6_vmpy_sf_bf_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV73_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK_HvxVR, MCK__DOT_, MCK_bf, MCK__41_ }, }, |
11033 | | { 0 /* */, Hexagon::V6_vmpy_sf_hf_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxWR, MCK__DOT_, MCK_sf, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
11034 | | { 0 /* */, Hexagon::V6_vmpyub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11035 | | { 0 /* */, Hexagon::V6_vmpyubv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11036 | | { 0 /* */, Hexagon::V6_vdsaduh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vdsad, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
11037 | | { 0 /* */, Hexagon::V6_vmpyuh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
11038 | | { 0 /* */, Hexagon::V6_vmpyuhv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
11039 | | { 0 /* */, Hexagon::V6_vrmpyub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11040 | | { 0 /* */, Hexagon::V6_vrmpyub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11041 | | { 0 /* */, Hexagon::V6_vaddhw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
11042 | | { 0 /* */, Hexagon::V6_vadduhw_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
11043 | | { 0 /* */, Hexagon::V6_vdmpyhb_dv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11044 | | { 0 /* */, Hexagon::V6_vmpahb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11045 | | { 0 /* */, Hexagon::V6_vmpauhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11046 | | { 0 /* */, Hexagon::V6_vmpyh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
11047 | | { 0 /* */, Hexagon::V6_vmpyhv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
11048 | | { 0 /* */, Hexagon::V6_vmpyhus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
11049 | | { 0 /* */, Hexagon::V6_vrmpybub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11050 | | { 0 /* */, Hexagon::V6_vrmpybub_rtt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_DoubleRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11051 | | { 0 /* */, Hexagon::V6_vtmpyhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vtmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11052 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11053 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11054 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11055 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11056 | | { 0 /* */, Hexagon::M4_mac_up_s1_sat, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11057 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_hh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11058 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_hl_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11059 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_lh_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11060 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_ll_s0, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11061 | | { 0 /* */, Hexagon::M4_nac_up_s1_sat, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11062 | | { 0 /* */, Hexagon::M7_wcmpyiwc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11063 | | { 0 /* */, Hexagon::M7_wcmpyrwc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11064 | | { 0 /* */, Hexagon::L2_loadrb_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11065 | | { 0 /* */, Hexagon::L2_loadbsw2_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11066 | | { 0 /* */, Hexagon::L2_loadrh_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11067 | | { 0 /* */, Hexagon::L2_loadrub_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11068 | | { 0 /* */, Hexagon::L2_loadbzw2_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11069 | | { 0 /* */, Hexagon::L2_loadruh_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11070 | | { 0 /* */, Hexagon::L2_loadri_pcr, Convert__Reg1_0__Reg1_4__Tie1_0_0__Reg1_11, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11071 | | { 0 /* */, Hexagon::V6_vlutvvb, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vlut32, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__41_ }, }, |
11072 | | { 0 /* */, Hexagon::V6_vL32b_nt_cur_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11073 | | { 0 /* */, Hexagon::V6_vdmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11074 | | { 0 /* */, Hexagon::V6_vmpyihb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11075 | | { 0 /* */, Hexagon::V6_vmpyih_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
11076 | | { 0 /* */, Hexagon::V6_vasrwh, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_ }, }, |
11077 | | { 0 /* */, Hexagon::V6_vmpy_hf_hf_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
11078 | | { 0 /* */, Hexagon::V6_vdmpy_sf_hf_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV68_UseHVXIEEEFP, { MCK_HvxVR, MCK__DOT_, MCK_sf, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK_HvxVR, MCK__DOT_, MCK_hf, MCK__41_ }, }, |
11079 | | { 0 /* */, Hexagon::V6_vL32b_nt_tmp_pi, Convert__Reg1_0__Reg1_6__Tie1_0_0__s3_0Imm1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11080 | | { 0 /* */, Hexagon::V6_vandnqrt, Convert__Reg1_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vand, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11081 | | { 0 /* */, Hexagon::V6_vandqrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11082 | | { 0 /* */, Hexagon::V6_vmpyuhe_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vmpye, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
11083 | | { 0 /* */, Hexagon::V6_vrmpyub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11084 | | { 0 /* */, Hexagon::V6_vrmpyubv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11085 | | { 0 /* */, Hexagon::V6_vdmpyhb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11086 | | { 0 /* */, Hexagon::V6_vmpyiwb_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11087 | | { 0 /* */, Hexagon::V6_vmpyiwh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_ }, }, |
11088 | | { 0 /* */, Hexagon::V6_vmpyiwub_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyi, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11089 | | { 0 /* */, Hexagon::V6_vmpyiewh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyie, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
11090 | | { 0 /* */, Hexagon::V6_vmpyiewuh_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyie, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_ }, }, |
11091 | | { 0 /* */, Hexagon::V6_vrmpybv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11092 | | { 0 /* */, Hexagon::V6_vrmpybus_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11093 | | { 0 /* */, Hexagon::V6_vrmpybusv_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_ }, }, |
11094 | | { 0 /* */, Hexagon::V6_vrmpyzcb_rx, Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr16mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
11095 | | { 0 /* */, Hexagon::V6_vrmpyzcbs_rx, Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr16mpyzs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
11096 | | { 0 /* */, Hexagon::V6_vrmpyznb_rx, Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vr8mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_n, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
11097 | | { 0 /* */, Hexagon::V6_vrmpyzbb_rx, Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
11098 | | { 0 /* */, Hexagon::V6_vrmpyzbub_rx, Convert__Reg1_0__Reg1_9__Reg1_6__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_ub, MCK__43_, MCK__43_, MCK__41_ }, }, |
11099 | | { 0 /* */, Hexagon::M2_cmacsc_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11100 | | { 0 /* */, Hexagon::M2_cnacsc_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11101 | | { 0 /* */, Hexagon::L2_loadalignb_pci, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_0Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memb_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11102 | | { 0 /* */, Hexagon::L2_loadbsw4_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11103 | | { 0 /* */, Hexagon::L2_loadrd_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_3Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11104 | | { 0 /* */, Hexagon::L2_loadalignh_pci, Convert__Reg1_0__Reg1_4__Tie0_0_0__Tie1_0_0__s4_1Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memh_95_fifo, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11105 | | { 0 /* */, Hexagon::L2_loadbzw4_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8__Reg1_12, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11106 | | { 0 /* */, Hexagon::M2_mpyd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11107 | | { 0 /* */, Hexagon::M2_mpyd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11108 | | { 0 /* */, Hexagon::M2_mpyd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11109 | | { 0 /* */, Hexagon::M2_mpyd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11110 | | { 0 /* */, Hexagon::M2_mpyud_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11111 | | { 0 /* */, Hexagon::M2_mpyud_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11112 | | { 0 /* */, Hexagon::M2_mpyud_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11113 | | { 0 /* */, Hexagon::M2_mpyud_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11114 | | { 0 /* */, Hexagon::M2_mmpyl_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11115 | | { 0 /* */, Hexagon::M2_mmpyul_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11116 | | { 0 /* */, Hexagon::M2_mmpyh_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11117 | | { 0 /* */, Hexagon::M2_mmpyuh_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11118 | | { 0 /* */, Hexagon::S4_vxaddsubhr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxaddsubh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK__GT_, MCK__GT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11119 | | { 0 /* */, Hexagon::S4_vxsubaddhr, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vxsubaddh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK__GT_, MCK__GT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11120 | | { 0 /* */, Hexagon::V6_vaddbsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_b, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11121 | | { 0 /* */, Hexagon::V6_vsubbsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_b, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_b, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11122 | | { 0 /* */, Hexagon::V6_vaddhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_HvxWR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11123 | | { 0 /* */, Hexagon::V6_vlutvwhi, Convert__Reg1_0__Reg1_6__Reg1_9__u3_0Imm1_13, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vlut16, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
11124 | | { 0 /* */, Hexagon::V6_vsubhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_HvxWR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11125 | | { 0 /* */, Hexagon::V6_vlutvwh_oracc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__124_, MCK__61_, MCK_vlut16, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_ }, }, |
11126 | | { 0 /* */, Hexagon::V6_vaddubsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11127 | | { 0 /* */, Hexagon::V6_vsububsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11128 | | { 0 /* */, Hexagon::V6_vadduhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11129 | | { 0 /* */, Hexagon::V6_vsubuhsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11130 | | { 0 /* */, Hexagon::V6_vadduwsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uw, MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11131 | | { 0 /* */, Hexagon::V6_vrmpyubi, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
11132 | | { 0 /* */, Hexagon::V6_vrsadubi, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vrsad, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
11133 | | { 0 /* */, Hexagon::V6_vsubuwsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uw, MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11134 | | { 0 /* */, Hexagon::V6_v10mpyubs10, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV69, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_v10mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
11135 | | { 0 /* */, Hexagon::V6_vaddwsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11136 | | { 0 /* */, Hexagon::V6_vrmpybusi, Convert__Reg1_0__Reg1_6__Reg1_9__u1_0Imm1_13, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
11137 | | { 0 /* */, Hexagon::V6_vsubwsat_dv, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11138 | | { 0 /* */, Hexagon::A2_addh_h16_hh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11139 | | { 0 /* */, Hexagon::A2_addh_h16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11140 | | { 0 /* */, Hexagon::A2_addh_h16_lh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11141 | | { 0 /* */, Hexagon::A2_addh_h16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11142 | | { 0 /* */, Hexagon::M2_cmpyrs_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11143 | | { 0 /* */, Hexagon::M7_wcmpyiw_rnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11144 | | { 0 /* */, Hexagon::M4_cmpyi_wh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpyiwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11145 | | { 0 /* */, Hexagon::M7_wcmpyrw_rnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11146 | | { 0 /* */, Hexagon::M4_cmpyr_wh, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpyrwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11147 | | { 0 /* */, Hexagon::L2_loadrb_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11148 | | { 0 /* */, Hexagon::L2_loadbsw2_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_membh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11149 | | { 0 /* */, Hexagon::L2_loadrh_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11150 | | { 0 /* */, Hexagon::L2_loadrub_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_0Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11151 | | { 0 /* */, Hexagon::L2_loadbzw2_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memubh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11152 | | { 0 /* */, Hexagon::L2_loadruh_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_1Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11153 | | { 0 /* */, Hexagon::L2_loadri_pci, Convert__Reg1_0__Reg1_4__Tie1_0_0__s4_2Imm1_8__Reg1_12, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_ }, }, |
11154 | | { 0 /* */, Hexagon::M2_mpy_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11155 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_hh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11156 | | { 0 /* */, Hexagon::M2_mpy_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11157 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_hl_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11158 | | { 0 /* */, Hexagon::M2_mpy_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11159 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_lh_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11160 | | { 0 /* */, Hexagon::M2_mpy_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11161 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_ll_s0, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11162 | | { 0 /* */, Hexagon::M2_hmmpyh_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11163 | | { 0 /* */, Hexagon::M2_hmmpyl_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11164 | | { 0 /* */, Hexagon::M2_mpyu_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11165 | | { 0 /* */, Hexagon::M2_mpyu_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11166 | | { 0 /* */, Hexagon::M2_mpyu_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11167 | | { 0 /* */, Hexagon::M2_mpyu_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11168 | | { 0 /* */, Hexagon::A2_subh_h16_hh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11169 | | { 0 /* */, Hexagon::A2_subh_h16_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11170 | | { 0 /* */, Hexagon::A2_subh_h16_lh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11171 | | { 0 /* */, Hexagon::A2_subh_h16_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11172 | | { 0 /* */, Hexagon::M2_vdmpyrs_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vdmpy, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11173 | | { 0 /* */, Hexagon::M2_vmpy2s_s1pack, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vmpyh, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11174 | | { 0 /* */, Hexagon::M2_vrcmpys_s1rp, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11175 | | { 0 /* */, Hexagon::V6_vaddbsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11176 | | { 0 /* */, Hexagon::V6_vavgbrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
11177 | | { 0 /* */, Hexagon::V6_vlutvvbi, Convert__Reg1_0__Reg1_6__Reg1_9__u3_0Imm1_13, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vlut32, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
11178 | | { 0 /* */, Hexagon::V6_vpackhb_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11179 | | { 0 /* */, Hexagon::V6_vroundhb, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11180 | | { 0 /* */, Hexagon::V6_vsubbsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11181 | | { 0 /* */, Hexagon::V6_vlutvvb_oracc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__124_, MCK__61_, MCK_vlut32, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__41_ }, }, |
11182 | | { 0 /* */, Hexagon::V6_vaddhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11183 | | { 0 /* */, Hexagon::V6_vavghrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
11184 | | { 0 /* */, Hexagon::V6_vpackwh_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11185 | | { 0 /* */, Hexagon::V6_vroundwh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11186 | | { 0 /* */, Hexagon::V6_vsubhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11187 | | { 0 /* */, Hexagon::V6_vaddububb_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11188 | | { 0 /* */, Hexagon::V6_vaddubsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11189 | | { 0 /* */, Hexagon::V6_vasrvuhubsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11190 | | { 0 /* */, Hexagon::V6_vavgubrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
11191 | | { 0 /* */, Hexagon::V6_vpackhub_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11192 | | { 0 /* */, Hexagon::V6_vroundhub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11193 | | { 0 /* */, Hexagon::V6_vrounduhub, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11194 | | { 0 /* */, Hexagon::V6_vsubububb_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11195 | | { 0 /* */, Hexagon::V6_vsububsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11196 | | { 0 /* */, Hexagon::V6_vandnqrt_acc, Convert__Reg1_0__Tie0_0_0__Reg1_8__Reg1_11, AMFBS_UseHVX, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__124_, MCK__61_, MCK_vand, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__41_ }, }, |
11197 | | { 0 /* */, Hexagon::V6_vadduhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11198 | | { 0 /* */, Hexagon::V6_vasrvwuhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11199 | | { 0 /* */, Hexagon::V6_vavguhrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
11200 | | { 0 /* */, Hexagon::V6_vpackwuh_sat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vpack, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11201 | | { 0 /* */, Hexagon::V6_vrounduwuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11202 | | { 0 /* */, Hexagon::V6_vroundwuh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vround, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11203 | | { 0 /* */, Hexagon::V6_vsubuhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11204 | | { 0 /* */, Hexagon::V6_vadduwsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11205 | | { 0 /* */, Hexagon::V6_vavguwrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
11206 | | { 0 /* */, Hexagon::V6_vsubuwsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11207 | | { 0 /* */, Hexagon::V6_vaddwsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11208 | | { 0 /* */, Hexagon::V6_vavgwrnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vavg, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_rnd }, }, |
11209 | | { 0 /* */, Hexagon::V6_vdmpyhisat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11210 | | { 0 /* */, Hexagon::V6_vdmpyhsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11211 | | { 0 /* */, Hexagon::V6_vdmpyhsusat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11212 | | { 0 /* */, Hexagon::V6_vdmpyhvsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11213 | | { 0 /* */, Hexagon::V6_vsubwsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11214 | | { 0 /* */, Hexagon::V6_vmpyhsrs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11215 | | { 0 /* */, Hexagon::V6_vmpyhvsrs, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11216 | | { 0 /* */, Hexagon::V6_vmpyowh_rnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_UseHVX, { MCK_HvxVR, MCK__61_, MCK_vmpyowh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11217 | | { 0 /* */, Hexagon::V6_vrmpyzcb_rx_acc, Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr16mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
11218 | | { 0 /* */, Hexagon::V6_vrmpyzcbs_rx_acc, Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr16mpyzs, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_c, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
11219 | | { 0 /* */, Hexagon::V6_vrmpyznb_rx_acc, Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vr8mpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_n, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
11220 | | { 0 /* */, Hexagon::V6_vrmpyzbb_rx_acc, Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_b, MCK__43_, MCK__43_, MCK__41_ }, }, |
11221 | | { 0 /* */, Hexagon::V6_vrmpyzbub_rx_acc, Convert__Reg1_0__Reg1_10__Tie0_0_0__Reg1_7__Tie1_0_0, AMFBS_UseHVXV66_UseZReg, { MCK_HvxVQR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpyz, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__DOT_, MCK_ub, MCK__43_, MCK__43_, MCK__41_ }, }, |
11222 | | { 0 /* */, Hexagon::M2_mpyd_acc_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11223 | | { 0 /* */, Hexagon::M2_mpyd_acc_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11224 | | { 0 /* */, Hexagon::M2_mpyd_acc_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11225 | | { 0 /* */, Hexagon::M2_mpyd_acc_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11226 | | { 0 /* */, Hexagon::M2_mpyud_acc_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11227 | | { 0 /* */, Hexagon::M2_mpyud_acc_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11228 | | { 0 /* */, Hexagon::M2_mpyud_acc_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11229 | | { 0 /* */, Hexagon::M2_mpyud_acc_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11230 | | { 0 /* */, Hexagon::M2_mmacls_rs1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11231 | | { 0 /* */, Hexagon::M2_mmaculs_rs1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpyweuh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11232 | | { 0 /* */, Hexagon::M2_mmachs_rs1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywoh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11233 | | { 0 /* */, Hexagon::M2_mmacuhs_rs1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vmpywouh, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11234 | | { 0 /* */, Hexagon::M2_mpyd_nac_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11235 | | { 0 /* */, Hexagon::M2_mpyd_nac_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11236 | | { 0 /* */, Hexagon::M2_mpyd_nac_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11237 | | { 0 /* */, Hexagon::M2_mpyd_nac_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11238 | | { 0 /* */, Hexagon::M2_mpyud_nac_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11239 | | { 0 /* */, Hexagon::M2_mpyud_nac_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11240 | | { 0 /* */, Hexagon::M2_mpyud_nac_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11241 | | { 0 /* */, Hexagon::M2_mpyud_nac_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_DoubleRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11242 | | { 0 /* */, Hexagon::V6_vlutvwh_nm, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__61_, MCK_vlut16, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_nomatch }, }, |
11243 | | { 0 /* */, Hexagon::V6_vlutvwh_oracci, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u3_0Imm1_14, AMFBS_UseHVXV62, { MCK_HvxWR, MCK__DOT_, MCK_h, MCK__124_, MCK__61_, MCK_vlut16, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
11244 | | { 0 /* */, Hexagon::V6_vrmpyubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
11245 | | { 0 /* */, Hexagon::V6_vrsadubi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_uw, MCK__43_, MCK__61_, MCK_vrsad, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_ub, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
11246 | | { 0 /* */, Hexagon::V6_v10mpyubs10_vxx, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV69, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_v10mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
11247 | | { 0 /* */, Hexagon::V6_vmpyhsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11248 | | { 0 /* */, Hexagon::V6_vrmpybusi_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u1_0Imm1_14, AMFBS_UseHVXV60, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vrmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_IntRegs, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
11249 | | { 0 /* */, Hexagon::M2_mpy_acc_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11250 | | { 0 /* */, Hexagon::M2_mpy_acc_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11251 | | { 0 /* */, Hexagon::M2_mpy_acc_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11252 | | { 0 /* */, Hexagon::M2_mpy_acc_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11253 | | { 0 /* */, Hexagon::M2_mpyu_acc_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11254 | | { 0 /* */, Hexagon::M2_mpyu_acc_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11255 | | { 0 /* */, Hexagon::M2_mpyu_acc_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11256 | | { 0 /* */, Hexagon::M2_mpyu_acc_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11257 | | { 0 /* */, Hexagon::M2_mpy_nac_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11258 | | { 0 /* */, Hexagon::M2_mpy_nac_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11259 | | { 0 /* */, Hexagon::M2_mpy_nac_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11260 | | { 0 /* */, Hexagon::M2_mpy_nac_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11261 | | { 0 /* */, Hexagon::M2_mpyu_nac_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11262 | | { 0 /* */, Hexagon::M2_mpyu_nac_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11263 | | { 0 /* */, Hexagon::M2_mpyu_nac_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11264 | | { 0 /* */, Hexagon::M2_mpyu_nac_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpyu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1 }, }, |
11265 | | { 0 /* */, Hexagon::M2_cmpyrsc_s1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11266 | | { 0 /* */, Hexagon::M7_wcmpyiwc_rnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyiw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11267 | | { 0 /* */, Hexagon::M4_cmpyi_whc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpyiwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11268 | | { 0 /* */, Hexagon::M7_wcmpyrwc_rnd, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_HasV67_UseAudio, { MCK_IntRegs, MCK__61_, MCK_cmpyrw, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11269 | | { 0 /* */, Hexagon::M4_cmpyr_whc, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_cmpyrwh, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__STAR_, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11270 | | { 0 /* */, Hexagon::V6_vmpyowh_sacc_alt, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyowh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_shift }, }, |
11271 | | { 0 /* */, Hexagon::V6_vasrhbsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11272 | | { 0 /* */, Hexagon::V6_vlutvvb_nm, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vlut32, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_nomatch }, }, |
11273 | | { 0 /* */, Hexagon::V6_vlutvvb_oracci, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u3_0Imm1_14, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__124_, MCK__61_, MCK_vlut32, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u3_0Imm, MCK__41_ }, }, |
11274 | | { 0 /* */, Hexagon::V6_vaddclbh, Convert__Reg1_0__Reg1_8__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vadd, MCK__40_, MCK_vclb, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_ }, }, |
11275 | | { 0 /* */, Hexagon::V6_vasrwhsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11276 | | { 0 /* */, Hexagon::V6_vasrhubsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11277 | | { 0 /* */, Hexagon::V6_vasruhubsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11278 | | { 0 /* */, Hexagon::V6_vasruwuhsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11279 | | { 0 /* */, Hexagon::V6_vasrwuhsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11280 | | { 0 /* */, Hexagon::V6_vdmpyhisat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11281 | | { 0 /* */, Hexagon::V6_vdmpyhsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11282 | | { 0 /* */, Hexagon::V6_vdmpyhsusat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11283 | | { 0 /* */, Hexagon::V6_vdmpyhvsat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11284 | | { 0 /* */, Hexagon::V6_vaddclbw, Convert__Reg1_0__Reg1_8__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_vclb, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_ }, }, |
11285 | | { 0 /* */, Hexagon::V6_vaddcarry, Convert__Reg1_0__Reg1_12__Reg1_6__Reg1_9__Tie1_0_0, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__41_, MCK__COLON_, MCK_carry }, }, |
11286 | | { 0 /* */, Hexagon::V6_vsubcarry, Convert__Reg1_0__Reg1_12__Reg1_6__Reg1_9__Tie1_0_0, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__41_, MCK__COLON_, MCK_carry }, }, |
11287 | | { 0 /* */, Hexagon::V6_vaddcarryo, Convert__Reg1_0__Reg1_3__Reg1_7__Reg1_10, AMFBS_UseHVXV66, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_carry }, }, |
11288 | | { 0 /* */, Hexagon::V6_vsubcarryo, Convert__Reg1_0__Reg1_3__Reg1_7__Reg1_10, AMFBS_UseHVXV66, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__61_, MCK_vsub, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__COLON_, MCK_carry }, }, |
11289 | | { 0 /* */, Hexagon::M2_mpyd_rnd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
11290 | | { 0 /* */, Hexagon::M2_mpyd_rnd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
11291 | | { 0 /* */, Hexagon::M2_mpyd_rnd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
11292 | | { 0 /* */, Hexagon::M2_mpyd_rnd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
11293 | | { 0 /* */, Hexagon::M2_vrcmpys_s1_h, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
11294 | | { 0 /* */, Hexagon::M2_vrcmpys_s1_l, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_DoubleRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
11295 | | { 0 /* */, Hexagon::V6_v6mpyhubs10, Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13, AMFBS_UseHVXV68, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_h }, }, |
11296 | | { 0 /* */, Hexagon::V6_v6mpyvubs10, Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13, AMFBS_UseHVXV68, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_v }, }, |
11297 | | { 0 /* */, Hexagon::V6_v6mpyhubs10, Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b10, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_h }, }, |
11298 | | { 0 /* */, Hexagon::V6_v6mpyvubs10, Convert__Reg1_0__Reg1_6__Reg1_9__u2_0Imm1_13, AMFBS_UseHVX, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b10, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_v }, }, |
11299 | | { 0 /* */, Hexagon::A2_addh_h16_sat_hh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11300 | | { 0 /* */, Hexagon::A2_addh_h16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11301 | | { 0 /* */, Hexagon::A2_addh_h16_sat_lh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11302 | | { 0 /* */, Hexagon::A2_addh_h16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11303 | | { 0 /* */, Hexagon::M2_mpy_rnd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
11304 | | { 0 /* */, Hexagon::M2_mpy_sat_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11305 | | { 0 /* */, Hexagon::M2_mpy_rnd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
11306 | | { 0 /* */, Hexagon::M2_mpy_sat_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11307 | | { 0 /* */, Hexagon::M2_mpy_rnd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
11308 | | { 0 /* */, Hexagon::M2_mpy_sat_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11309 | | { 0 /* */, Hexagon::M2_mpy_rnd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd }, }, |
11310 | | { 0 /* */, Hexagon::M2_mpy_sat_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11311 | | { 0 /* */, Hexagon::M2_hmmpyh_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11312 | | { 0 /* */, Hexagon::M2_hmmpyl_rs1, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11313 | | { 0 /* */, Hexagon::A2_subh_h16_sat_hh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11314 | | { 0 /* */, Hexagon::A2_subh_h16_sat_hl, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11315 | | { 0 /* */, Hexagon::A2_subh_h16_sat_lh, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11316 | | { 0 /* */, Hexagon::A2_subh_h16_sat_ll, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK_sat, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_16 }, }, |
11317 | | { 0 /* */, Hexagon::V6_vasrvuhubrndsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11318 | | { 0 /* */, Hexagon::V6_vasrvwuhrndsat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11319 | | { 0 /* */, Hexagon::V6_vmpyuhvs, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV69, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK__GT_, MCK__GT_, MCK_16 }, }, |
11320 | | { 0 /* */, Hexagon::V6_vdmpyhsuisat, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__HASH_, MCK_1, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11321 | | { 0 /* */, Hexagon::M2_vrcmpys_acc_s1_h, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
11322 | | { 0 /* */, Hexagon::M2_vrcmpys_acc_s1_l, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_None, { MCK_DoubleRegs, MCK__43_, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
11323 | | { 0 /* */, Hexagon::V6_v6mpyhubs10_vxx, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u2_0Imm1_14, AMFBS_UseHVXV68, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_h }, }, |
11324 | | { 0 /* */, Hexagon::V6_v6mpyvubs10_vxx, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10__u2_0Imm1_14, AMFBS_UseHVXV68, { MCK_HvxWR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_v6mpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_ub, MCK_HvxWR, MCK__DOT_, MCK_b, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__COLON_, MCK_v }, }, |
11325 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11326 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11327 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11328 | | { 0 /* */, Hexagon::M2_mpy_acc_sat_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__43_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11329 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_hh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11330 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_hl_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11331 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_lh_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11332 | | { 0 /* */, Hexagon::M2_mpy_nac_sat_ll_s1, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_IntRegs, MCK__MINUS_, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11333 | | { 0 /* */, Hexagon::V6_vmpyowh_rnd_sacc_alt, Convert__Reg1_0__Tie0_0_0__Reg1_5__Reg1_6, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__43_, MCK__61_, MCK_vmpyowh, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_shift }, }, |
11334 | | { 0 /* */, Hexagon::V6_vasrhbrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_b, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11335 | | { 0 /* */, Hexagon::V6_vasrwhrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11336 | | { 0 /* */, Hexagon::V6_vmpahhsat, Convert__Reg1_0__Tie0_0_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_DoubleRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11337 | | { 0 /* */, Hexagon::V6_vmpauhuhsat, Convert__Reg1_0__Tie0_0_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpa, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_DoubleRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11338 | | { 0 /* */, Hexagon::V6_vmpsuhuhsat, Convert__Reg1_0__Tie0_0_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmps, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_DoubleRegs, MCK__DOT_, MCK_uh, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11339 | | { 0 /* */, Hexagon::V6_vasrhubrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11340 | | { 0 /* */, Hexagon::V6_vasruhubrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV65, { MCK_HvxVR, MCK__DOT_, MCK_ub, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_HvxVR, MCK__DOT_, MCK_uh, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11341 | | { 0 /* */, Hexagon::V6_vasruwuhrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_HvxVR, MCK__DOT_, MCK_uw, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11342 | | { 0 /* */, Hexagon::V6_vasrwuhrndsat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV62, { MCK_HvxVR, MCK__DOT_, MCK_uh, MCK__61_, MCK_vasr, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_IntRegsLow8, MCK__41_, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11343 | | { 0 /* */, Hexagon::V6_vdmpyhsuisat_acc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vdmpy, MCK__40_, MCK_HvxWR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_uh, MCK__HASH_, MCK_1, MCK__41_, MCK__COLON_, MCK_sat }, }, |
11344 | | { 0 /* */, Hexagon::V6_vaddcarrysat, Convert__Reg1_0__Reg1_6__Reg1_9__Reg1_12, AMFBS_UseHVXV66, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vadd, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxQR, MCK__41_, MCK__COLON_, MCK_carry, MCK__COLON_, MCK_sat }, }, |
11345 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_hh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11346 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_hl_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11347 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_lh_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11348 | | { 0 /* */, Hexagon::M2_mpy_sat_rnd_ll_s1, Convert__Reg1_0__Reg1_4__Reg1_7, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_mpy, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_l, MCK_IntRegs, MCK__DOT_, MCK_l, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11349 | | { 0 /* */, Hexagon::M2_vrcmpys_s1rp_h, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_hi }, }, |
11350 | | { 0 /* */, Hexagon::M2_vrcmpys_s1rp_l, Convert__Reg1_0__Reg1_4__Reg1_5, AMFBS_None, { MCK_IntRegs, MCK__61_, MCK_vrcmpys, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_raw, MCK__COLON_, MCK_lo }, }, |
11351 | | { 0 /* */, Hexagon::V6_vmpyhss, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11352 | | { 0 /* */, Hexagon::V6_vmpyowh, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat }, }, |
11353 | | { 0 /* */, Hexagon::V6_vmpyhsrs, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_IntRegs, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11354 | | { 0 /* */, Hexagon::V6_vmpyhvsrs, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_h, MCK__61_, MCK_vmpy, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11355 | | { 0 /* */, Hexagon::V6_vmpyowh_rnd, Convert__Reg1_0__Reg1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__61_, MCK_vmpyo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat }, }, |
11356 | | { 0 /* */, Hexagon::V6_vmpyowh_sacc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_shift }, }, |
11357 | | { 0 /* */, Hexagon::V6_vmpyowh_rnd_sacc, Convert__Reg1_0__Tie0_0_0__Reg1_7__Reg1_10, AMFBS_UseHVXV60, { MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_vmpyo, MCK__40_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__COLON_, MCK__LT_, MCK__LT_, MCK_1, MCK__COLON_, MCK_rnd, MCK__COLON_, MCK_sat, MCK__COLON_, MCK_shift }, }, |
11358 | | { 1 /* allocframe */, Hexagon::S2_allocframe, Convert__regR29__Tie0_0_0__u11_3Imm1_3, AMFBS_None, { MCK_allocframe, MCK__40_, MCK__HASH_, MCK_u11_3Imm, MCK__41_ }, }, |
11359 | | { 1 /* allocframe */, Hexagon::S2_allocframe, Convert__Reg1_2__Tie0_0_0__u11_3Imm1_4, AMFBS_None, { MCK_allocframe, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u11_3Imm, MCK__41_, MCK__COLON_, MCK_raw }, }, |
11360 | | { 12 /* barrier */, Hexagon::Y2_barrier, Convert_NoOperands, AMFBS_None, { MCK_barrier }, }, |
11361 | | { 20 /* brkpt */, Hexagon::Y2_break, Convert_NoOperands, AMFBS_None, { MCK_brkpt }, }, |
11362 | | { 26 /* call */, Hexagon::J2_call, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11363 | | { 26 /* call */, Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11364 | | { 26 /* call */, Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11365 | | { 26 /* call */, Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11366 | | { 26 /* call */, Hexagon::RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11367 | | { 26 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11368 | | { 26 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4STK, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11369 | | { 26 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4STK_EXT, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11370 | | { 26 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4STK_EXT_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11371 | | { 26 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4STK_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11372 | | { 26 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4_EXT, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11373 | | { 26 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4_EXT_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11374 | | { 26 /* call */, Hexagon::SAVE_REGISTERS_CALL_V4_PIC, Convert__a30_2Imm1_1, AMFBS_None, { MCK_call, MCK_a30_2Imm }, }, |
11375 | | { 31 /* callr */, Hexagon::J2_callr, Convert__Reg1_1, AMFBS_None, { MCK_callr, MCK_IntRegs }, }, |
11376 | | { 37 /* callrh */, Hexagon::J2_callrh, Convert__Reg1_1, AMFBS_HasV73, { MCK_callrh, MCK_IntRegs }, }, |
11377 | | { 44 /* ciad */, Hexagon::Y2_ciad, Convert__Reg1_2, AMFBS_None, { MCK_ciad, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11378 | | { 49 /* crswap */, Hexagon::Y4_crswap10, Convert__Reg1_2__Tie0_0_0__sgp10Const1_3, AMFBS_None, { MCK_crswap, MCK__40_, MCK_DoubleRegs, MCK_sgp10Const, MCK__41_ }, }, |
11379 | | { 49 /* crswap */, Hexagon::Y2_crswap0, Convert__Reg1_2__Tie0_2_2, AMFBS_None, { MCK_crswap, MCK__40_, MCK_IntRegs, MCK_sgp, MCK__41_ }, }, |
11380 | | { 49 /* crswap */, Hexagon::Y2_crswap0, Convert__Reg1_2__Tie0_0_0, AMFBS_None, { MCK_crswap, MCK__40_, MCK_IntRegs, MCK_SGP0, MCK__41_ }, }, |
11381 | | { 49 /* crswap */, Hexagon::Y4_crswap1, Convert__Reg1_2__Tie0_0_0, AMFBS_None, { MCK_crswap, MCK__40_, MCK_IntRegs, MCK_SGP1, MCK__41_ }, }, |
11382 | | { 56 /* cswi */, Hexagon::Y2_cswi, Convert__Reg1_2, AMFBS_None, { MCK_cswi, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11383 | | { 61 /* dccleana */, Hexagon::Y2_dccleana, Convert__Reg1_2, AMFBS_None, { MCK_dccleana, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11384 | | { 70 /* dccleanidx */, Hexagon::Y2_dccleanidx, Convert__Reg1_2, AMFBS_None, { MCK_dccleanidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11385 | | { 81 /* dccleaninva */, Hexagon::Y2_dccleaninva, Convert__Reg1_2, AMFBS_None, { MCK_dccleaninva, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11386 | | { 93 /* dccleaninvidx */, Hexagon::Y2_dccleaninvidx, Convert__Reg1_2, AMFBS_None, { MCK_dccleaninvidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11387 | | { 107 /* dcfetch */, Hexagon::Y2_dcfetchbo, Convert__Reg1_2__imm_95_0, AMFBS_None, { MCK_dcfetch, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11388 | | { 107 /* dcfetch */, Hexagon::Y2_dcfetchbo, Convert__Reg1_2__u11_3Imm1_5, AMFBS_None, { MCK_dcfetch, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u11_3Imm, MCK__41_ }, }, |
11389 | | { 115 /* dcinva */, Hexagon::Y2_dcinva, Convert__Reg1_2, AMFBS_None, { MCK_dcinva, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11390 | | { 122 /* dcinvidx */, Hexagon::Y2_dcinvidx, Convert__Reg1_2, AMFBS_None, { MCK_dcinvidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11391 | | { 131 /* dckill */, Hexagon::Y2_dckill, Convert_NoOperands, AMFBS_None, { MCK_dckill }, }, |
11392 | | { 138 /* dctagw */, Hexagon::Y2_dctagw, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_dctagw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11393 | | { 145 /* dczeroa */, Hexagon::Y2_dczeroa, Convert__Reg1_2, AMFBS_None, { MCK_dczeroa, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11394 | | { 153 /* dealloc_return */, Hexagon::L4_return, Convert__regD15__regR30, AMFBS_None, { MCK_dealloc_95_return }, }, |
11395 | | { 168 /* deallocframe */, Hexagon::L2_deallocframe, Convert__regD15__regR30, AMFBS_None, { MCK_deallocframe }, }, |
11396 | | { 181 /* diag */, Hexagon::Y6_diag, Convert__Reg1_2, AMFBS_HasV67, { MCK_DIAG, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11397 | | { 186 /* diag0 */, Hexagon::Y6_diag0, Convert__Reg1_2__Reg1_3, AMFBS_HasV67, { MCK_diag0, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
11398 | | { 192 /* diag1 */, Hexagon::Y6_diag1, Convert__Reg1_2__Reg1_3, AMFBS_HasV67, { MCK_diag1, MCK__40_, MCK_DoubleRegs, MCK_DoubleRegs, MCK__41_ }, }, |
11399 | | { 198 /* dmlink */, Hexagon::Y6_dmlink, Convert__Reg1_2__Reg1_3, AMFBS_HasV68, { MCK_dmlink, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11400 | | { 205 /* dmresume */, Hexagon::Y6_dmresume, Convert__Reg1_2, AMFBS_HasV68, { MCK_dmresume, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11401 | | { 214 /* dmstart */, Hexagon::Y6_dmstart, Convert__Reg1_2, AMFBS_HasV68, { MCK_dmstart, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11402 | | { 222 /* DUPLEX */, Hexagon::DUPLEX_Pseudo, Convert__imm_95_0, AMFBS_None, { MCK_DUPLEX }, }, |
11403 | | { 229 /* endloop0 */, Hexagon::J2_endloop0, Convert_NoOperands, AMFBS_None, { MCK_endloop0 }, }, |
11404 | | { 238 /* endloop01 */, Hexagon::J2_endloop01, Convert_NoOperands, AMFBS_None, { MCK_endloop01 }, }, |
11405 | | { 248 /* endloop1 */, Hexagon::J2_endloop1, Convert_NoOperands, AMFBS_None, { MCK_endloop1 }, }, |
11406 | | { 257 /* hintjr */, Hexagon::J4_hintjumpr, Convert__Reg1_2, AMFBS_None, { MCK_hintjr, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11407 | | { 264 /* iassignw */, Hexagon::Y2_iassignw, Convert__Reg1_2, AMFBS_None, { MCK_iassignw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11408 | | { 273 /* icdataw */, Hexagon::Y2_icdataw, Convert__Reg1_2__Reg1_3, AMFBS_HasV66, { MCK_icdataw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11409 | | { 281 /* icinva */, Hexagon::Y2_icinva, Convert__Reg1_2, AMFBS_None, { MCK_icinva, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11410 | | { 288 /* icinvidx */, Hexagon::Y2_icinvidx, Convert__Reg1_2, AMFBS_None, { MCK_icinvidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11411 | | { 297 /* ickill */, Hexagon::Y2_ickill, Convert_NoOperands, AMFBS_None, { MCK_ickill }, }, |
11412 | | { 304 /* ictagw */, Hexagon::Y2_ictagw, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_ictagw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11413 | | { 311 /* if */, Hexagon::L4_return_t, Convert__regD15__Reg1_2__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_dealloc_95_return }, }, |
11414 | | { 311 /* if */, Hexagon::L4_return_f, Convert__regD15__Reg1_3__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_dealloc_95_return }, }, |
11415 | | { 311 /* if */, Hexagon::J2_callt, Convert__Reg1_2__a30_2Imm1_5, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_call, MCK_a30_2Imm }, }, |
11416 | | { 311 /* if */, Hexagon::J2_callrt, Convert__Reg1_2__Reg1_5, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_callr, MCK_IntRegs }, }, |
11417 | | { 311 /* if */, Hexagon::J2_jumpt, Convert__Reg1_2__b30_2Imm1_5, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jump, MCK_b30_2Imm }, }, |
11418 | | { 311 /* if */, Hexagon::J2_jumprt, Convert__Reg1_2__Reg1_5, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK_IntRegs }, }, |
11419 | | { 311 /* if */, Hexagon::J2_callf, Convert__Reg1_3__a30_2Imm1_6, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_call, MCK_a30_2Imm }, }, |
11420 | | { 311 /* if */, Hexagon::J2_callrf, Convert__Reg1_3__Reg1_6, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_callr, MCK_IntRegs }, }, |
11421 | | { 311 /* if */, Hexagon::J2_jumpf, Convert__Reg1_3__b30_2Imm1_6, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jump, MCK_b30_2Imm }, }, |
11422 | | { 311 /* if */, Hexagon::J2_jumprf, Convert__Reg1_3__Reg1_6, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK_IntRegs }, }, |
11423 | | { 311 /* if */, Hexagon::A2_tfrpt, Convert__Reg1_4__Reg1_2__Reg1_6, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
11424 | | { 311 /* if */, Hexagon::A2_paddit, Convert__Reg1_4__Reg1_2__Reg1_6__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
11425 | | { 311 /* if */, Hexagon::V6_vcmov, Convert__Reg1_4__Reg1_2__Reg1_6, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_HvxVR }, }, |
11426 | | { 311 /* if */, Hexagon::A2_tfrpf, Convert__Reg1_5__Reg1_3__Reg1_7, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
11427 | | { 311 /* if */, Hexagon::A2_paddif, Convert__Reg1_5__Reg1_3__Reg1_7__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
11428 | | { 311 /* if */, Hexagon::V6_vncmov, Convert__Reg1_5__Reg1_3__Reg1_7, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_HvxVR }, }, |
11429 | | { 311 /* if */, Hexagon::J2_jumpt, Convert__Reg1_2__b30_2Imm1_7, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11430 | | { 311 /* if */, Hexagon::J2_jumptpt, Convert__Reg1_2__b30_2Imm1_7, AMFBS_HasV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11431 | | { 311 /* if */, Hexagon::J2_jumprt, Convert__Reg1_2__Reg1_7, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_nt, MCK_IntRegs }, }, |
11432 | | { 311 /* if */, Hexagon::J2_jumprtpt, Convert__Reg1_2__Reg1_7, AMFBS_HasV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_t, MCK_IntRegs }, }, |
11433 | | { 311 /* if */, Hexagon::C2_cmoveit, Convert__Reg1_4__Reg1_2__s32_0Imm1_7, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11434 | | { 311 /* if */, Hexagon::J2_jumpf, Convert__Reg1_3__b30_2Imm1_8, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11435 | | { 311 /* if */, Hexagon::J2_jumpfpt, Convert__Reg1_3__b30_2Imm1_8, AMFBS_HasV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11436 | | { 311 /* if */, Hexagon::J2_jumprf, Convert__Reg1_3__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_nt, MCK_IntRegs }, }, |
11437 | | { 311 /* if */, Hexagon::J2_jumprfpt, Convert__Reg1_3__Reg1_8, AMFBS_HasV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_t, MCK_IntRegs }, }, |
11438 | | { 311 /* if */, Hexagon::C2_cmoveif, Convert__Reg1_5__Reg1_3__s32_0Imm1_8, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11439 | | { 311 /* if */, Hexagon::L4_return_tnew_pnt, Convert__regD15__Reg1_2__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_nt }, }, |
11440 | | { 311 /* if */, Hexagon::L4_return_tnew_pt, Convert__regD15__Reg1_2__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_t }, }, |
11441 | | { 311 /* if */, Hexagon::A2_tfrptnew, Convert__Reg1_6__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
11442 | | { 311 /* if */, Hexagon::A2_padditnew, Convert__Reg1_6__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
11443 | | { 311 /* if */, Hexagon::L4_return_fnew_pnt, Convert__regD15__Reg1_3__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_nt }, }, |
11444 | | { 311 /* if */, Hexagon::L4_return_fnew_pt, Convert__regD15__Reg1_3__regR30, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_dealloc_95_return, MCK__COLON_, MCK_t }, }, |
11445 | | { 311 /* if */, Hexagon::A2_tfrpfnew, Convert__Reg1_7__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_DoubleRegs }, }, |
11446 | | { 311 /* if */, Hexagon::A2_paddifnew, Convert__Reg1_7__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_IntRegs }, }, |
11447 | | { 311 /* if */, Hexagon::V6_vS32b_qpred_ai, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11448 | | { 311 /* if */, Hexagon::S2_pstorerbt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11449 | | { 311 /* if */, Hexagon::S2_pstorerdt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11450 | | { 311 /* if */, Hexagon::S2_pstorerht_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11451 | | { 311 /* if */, Hexagon::S2_pstorerit_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11452 | | { 311 /* if */, Hexagon::V6_vS32b_pred_ai, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11453 | | { 311 /* if */, Hexagon::V6_vS32Ub_pred_ai, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11454 | | { 311 /* if */, Hexagon::V6_zLd_pred_ai, Convert__Reg1_2__Reg1_8__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11455 | | { 311 /* if */, Hexagon::L2_ploadrdt_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11456 | | { 311 /* if */, Hexagon::A4_paslht, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11457 | | { 311 /* if */, Hexagon::A4_pasrht, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11458 | | { 311 /* if */, Hexagon::L2_ploadrbt_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11459 | | { 311 /* if */, Hexagon::L2_ploadrht_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11460 | | { 311 /* if */, Hexagon::L2_ploadrubt_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11461 | | { 311 /* if */, Hexagon::L2_ploadruht_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11462 | | { 311 /* if */, Hexagon::L2_ploadrit_io, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11463 | | { 311 /* if */, Hexagon::A4_psxtbt, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11464 | | { 311 /* if */, Hexagon::A4_psxtht, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11465 | | { 311 /* if */, Hexagon::A4_pzxtbt, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11466 | | { 311 /* if */, Hexagon::A4_pzxtht, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11467 | | { 311 /* if */, Hexagon::V6_vL32b_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11468 | | { 311 /* if */, Hexagon::J2_jumptnew, Convert__Reg1_2__b30_2Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11469 | | { 311 /* if */, Hexagon::J2_jumptnewpt, Convert__Reg1_2__b30_2Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11470 | | { 311 /* if */, Hexagon::J2_jumprtnew, Convert__Reg1_2__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_nt, MCK_IntRegs }, }, |
11471 | | { 311 /* if */, Hexagon::J2_jumprtnewpt, Convert__Reg1_2__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_t, MCK_IntRegs }, }, |
11472 | | { 311 /* if */, Hexagon::C2_cmovenewit, Convert__Reg1_6__Reg1_2__s32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11473 | | { 311 /* if */, Hexagon::V6_vS32b_nqpred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11474 | | { 311 /* if */, Hexagon::S2_pstorerbf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11475 | | { 311 /* if */, Hexagon::S2_pstorerdf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11476 | | { 311 /* if */, Hexagon::S2_pstorerhf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11477 | | { 311 /* if */, Hexagon::S2_pstorerif_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11478 | | { 311 /* if */, Hexagon::V6_vS32b_npred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11479 | | { 311 /* if */, Hexagon::V6_vS32Ub_npred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11480 | | { 311 /* if */, Hexagon::L2_ploadrdf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11481 | | { 311 /* if */, Hexagon::A4_paslhf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11482 | | { 311 /* if */, Hexagon::A4_pasrhf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11483 | | { 311 /* if */, Hexagon::L2_ploadrbf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11484 | | { 311 /* if */, Hexagon::L2_ploadrhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11485 | | { 311 /* if */, Hexagon::L2_ploadrubf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11486 | | { 311 /* if */, Hexagon::L2_ploadruhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11487 | | { 311 /* if */, Hexagon::L2_ploadrif_io, Convert__Reg1_5__Reg1_3__Reg1_9__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11488 | | { 311 /* if */, Hexagon::A4_psxtbf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11489 | | { 311 /* if */, Hexagon::A4_psxthf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11490 | | { 311 /* if */, Hexagon::A4_pzxtbf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11491 | | { 311 /* if */, Hexagon::A4_pzxthf, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11492 | | { 311 /* if */, Hexagon::V6_vL32b_npred_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_9_9__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11493 | | { 311 /* if */, Hexagon::J2_jumpfnew, Convert__Reg1_3__b30_2Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11494 | | { 311 /* if */, Hexagon::J2_jumpfnewpt, Convert__Reg1_3__b30_2Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11495 | | { 311 /* if */, Hexagon::J2_jumprfnew, Convert__Reg1_3__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_nt, MCK_IntRegs }, }, |
11496 | | { 311 /* if */, Hexagon::J2_jumprfnewpt, Convert__Reg1_3__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_jumpr, MCK__COLON_, MCK_t, MCK_IntRegs }, }, |
11497 | | { 311 /* if */, Hexagon::C2_cmovenewif, Convert__Reg1_7__Reg1_3__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11498 | | { 311 /* if */, Hexagon::S4_pstorerbt_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11499 | | { 311 /* if */, Hexagon::S4_storeirbt_io, Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11500 | | { 311 /* if */, Hexagon::S4_pstorerdt_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11501 | | { 311 /* if */, Hexagon::S4_pstorerht_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11502 | | { 311 /* if */, Hexagon::S4_storeirht_io, Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11503 | | { 311 /* if */, Hexagon::S4_pstorerit_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11504 | | { 311 /* if */, Hexagon::S4_storeirit_io, Convert__Reg1_2__Reg1_6__imm_95_0__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11505 | | { 311 /* if */, Hexagon::C2_ccombinewt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11506 | | { 311 /* if */, Hexagon::L4_ploadrdt_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11507 | | { 311 /* if */, Hexagon::V6_vccombine, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxWR, MCK__61_, MCK_vcombine, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
11508 | | { 311 /* if */, Hexagon::A2_paddt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11509 | | { 311 /* if */, Hexagon::A2_pandt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11510 | | { 311 /* if */, Hexagon::L4_ploadrbt_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11511 | | { 311 /* if */, Hexagon::L4_ploadrht_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11512 | | { 311 /* if */, Hexagon::L4_ploadrubt_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11513 | | { 311 /* if */, Hexagon::L4_ploadruht_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11514 | | { 311 /* if */, Hexagon::L4_ploadrit_abs, Convert__Reg1_4__Reg1_2__u32_0Imm1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11515 | | { 311 /* if */, Hexagon::A2_port, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11516 | | { 311 /* if */, Hexagon::A2_psubt, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11517 | | { 311 /* if */, Hexagon::A2_pxort, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11518 | | { 311 /* if */, Hexagon::S4_pstorerbf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11519 | | { 311 /* if */, Hexagon::S4_storeirbf_io, Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11520 | | { 311 /* if */, Hexagon::S4_pstorerdf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11521 | | { 311 /* if */, Hexagon::S4_pstorerhf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11522 | | { 311 /* if */, Hexagon::S4_storeirhf_io, Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11523 | | { 311 /* if */, Hexagon::S4_pstorerif_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11524 | | { 311 /* if */, Hexagon::S4_storeirif_io, Convert__Reg1_3__Reg1_7__imm_95_0__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11525 | | { 311 /* if */, Hexagon::C2_ccombinewf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11526 | | { 311 /* if */, Hexagon::L4_ploadrdf_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11527 | | { 311 /* if */, Hexagon::V6_vnccombine, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxWR, MCK__61_, MCK_vcombine, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK__41_ }, }, |
11528 | | { 311 /* if */, Hexagon::A2_paddf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11529 | | { 311 /* if */, Hexagon::A2_pandf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11530 | | { 311 /* if */, Hexagon::L4_ploadrbf_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11531 | | { 311 /* if */, Hexagon::L4_ploadrhf_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11532 | | { 311 /* if */, Hexagon::L4_ploadrubf_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11533 | | { 311 /* if */, Hexagon::L4_ploadruhf_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11534 | | { 311 /* if */, Hexagon::L4_ploadrif_abs, Convert__Reg1_5__Reg1_3__u32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11535 | | { 311 /* if */, Hexagon::A2_porf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11536 | | { 311 /* if */, Hexagon::A2_psubf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11537 | | { 311 /* if */, Hexagon::A2_pxorf, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11538 | | { 311 /* if */, Hexagon::V6_vS32b_nt_qpred_ai, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11539 | | { 311 /* if */, Hexagon::V6_vaddbq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
11540 | | { 311 /* if */, Hexagon::V6_vsubbq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
11541 | | { 311 /* if */, Hexagon::V6_vaddhq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
11542 | | { 311 /* if */, Hexagon::V6_vsubhq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
11543 | | { 311 /* if */, Hexagon::V6_vaddwq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
11544 | | { 311 /* if */, Hexagon::V6_vsubwq, Convert__Reg1_4__Reg1_2__Tie0_0_0__Reg1_9, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
11545 | | { 311 /* if */, Hexagon::S2_pstorerbnewt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11546 | | { 311 /* if */, Hexagon::S2_pstorerft_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11547 | | { 311 /* if */, Hexagon::S2_pstorerhnewt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11548 | | { 311 /* if */, Hexagon::S2_pstorerinewt_io, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11549 | | { 311 /* if */, Hexagon::V6_vS32b_nt_pred_ai, Convert__Reg1_2__Reg1_6__imm_95_0__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11550 | | { 311 /* if */, Hexagon::L4_return_t, Convert__Reg1_4__Reg1_2__Reg1_8, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_raw }, }, |
11551 | | { 311 /* if */, Hexagon::A2_paddit, Convert__Reg1_4__Reg1_2__Reg1_8__s32_0Imm1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
11552 | | { 311 /* if */, Hexagon::V6_vL32b_cur_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_10_10__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11553 | | { 311 /* if */, Hexagon::V6_vL32b_tmp_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11554 | | { 311 /* if */, Hexagon::V6_vL32b_nt_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_8__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11555 | | { 311 /* if */, Hexagon::S4_pstorerbtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11556 | | { 311 /* if */, Hexagon::S4_pstorerdtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11557 | | { 311 /* if */, Hexagon::S4_pstorerhtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11558 | | { 311 /* if */, Hexagon::S4_pstoreritnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11559 | | { 311 /* if */, Hexagon::L2_ploadrdtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11560 | | { 311 /* if */, Hexagon::A4_paslhtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11561 | | { 311 /* if */, Hexagon::A4_pasrhtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11562 | | { 311 /* if */, Hexagon::L2_ploadrbtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11563 | | { 311 /* if */, Hexagon::L2_ploadrhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11564 | | { 311 /* if */, Hexagon::L2_ploadrubtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11565 | | { 311 /* if */, Hexagon::L2_ploadruhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11566 | | { 311 /* if */, Hexagon::L2_ploadritnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11567 | | { 311 /* if */, Hexagon::A4_psxtbtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11568 | | { 311 /* if */, Hexagon::A4_psxthtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11569 | | { 311 /* if */, Hexagon::A4_pzxtbtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11570 | | { 311 /* if */, Hexagon::A4_pzxthtnew, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11571 | | { 311 /* if */, Hexagon::J2_jumprz, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__EXCLAIM_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b13_2Imm }, }, |
11572 | | { 311 /* if */, Hexagon::J2_jumprzpt, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__EXCLAIM_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b13_2Imm }, }, |
11573 | | { 311 /* if */, Hexagon::J2_jumprltez, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b13_2Imm }, }, |
11574 | | { 311 /* if */, Hexagon::J2_jumprltezpt, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b13_2Imm }, }, |
11575 | | { 311 /* if */, Hexagon::J2_jumprnz, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__61_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b13_2Imm }, }, |
11576 | | { 311 /* if */, Hexagon::J2_jumprnzpt, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__61_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b13_2Imm }, }, |
11577 | | { 311 /* if */, Hexagon::J2_jumprgtez, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__GT_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b13_2Imm }, }, |
11578 | | { 311 /* if */, Hexagon::J2_jumprgtezpt, Convert__Reg1_2__b13_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_IntRegs, MCK__GT_, MCK__61_, MCK__HASH_, MCK_0, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b13_2Imm }, }, |
11579 | | { 311 /* if */, Hexagon::V6_vS32b_nt_nqpred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11580 | | { 311 /* if */, Hexagon::V6_vaddbnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
11581 | | { 311 /* if */, Hexagon::V6_vsubbnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
11582 | | { 311 /* if */, Hexagon::V6_vaddhnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
11583 | | { 311 /* if */, Hexagon::V6_vsubhnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
11584 | | { 311 /* if */, Hexagon::V6_vaddwnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
11585 | | { 311 /* if */, Hexagon::V6_vsubwnq, Convert__Reg1_5__Reg1_3__Tie0_0_0__Reg1_10, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
11586 | | { 311 /* if */, Hexagon::S2_pstorerbnewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11587 | | { 311 /* if */, Hexagon::S2_pstorerff_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11588 | | { 311 /* if */, Hexagon::S2_pstorerhnewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11589 | | { 311 /* if */, Hexagon::S2_pstorerinewf_io, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11590 | | { 311 /* if */, Hexagon::V6_vS32b_nt_npred_ai, Convert__Reg1_3__Reg1_7__imm_95_0__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11591 | | { 311 /* if */, Hexagon::L4_return_f, Convert__Reg1_5__Reg1_3__Reg1_9, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_raw }, }, |
11592 | | { 311 /* if */, Hexagon::A2_paddif, Convert__Reg1_5__Reg1_3__Reg1_9__s32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
11593 | | { 311 /* if */, Hexagon::V6_vL32b_cur_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_11_11__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11594 | | { 311 /* if */, Hexagon::V6_vL32b_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11595 | | { 311 /* if */, Hexagon::V6_vL32b_nt_npred_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_9_9__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11596 | | { 311 /* if */, Hexagon::S4_pstorerbfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11597 | | { 311 /* if */, Hexagon::S4_pstorerdfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11598 | | { 311 /* if */, Hexagon::S4_pstorerhfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11599 | | { 311 /* if */, Hexagon::S4_pstorerifnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11600 | | { 311 /* if */, Hexagon::L2_ploadrdfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11601 | | { 311 /* if */, Hexagon::A4_paslhfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_aslh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11602 | | { 311 /* if */, Hexagon::A4_pasrhfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_asrh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11603 | | { 311 /* if */, Hexagon::L2_ploadrbfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11604 | | { 311 /* if */, Hexagon::L2_ploadrhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11605 | | { 311 /* if */, Hexagon::L2_ploadrubfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11606 | | { 311 /* if */, Hexagon::L2_ploadruhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11607 | | { 311 /* if */, Hexagon::L2_ploadrifnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__imm_95_0, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11608 | | { 311 /* if */, Hexagon::A4_psxtbfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11609 | | { 311 /* if */, Hexagon::A4_psxthfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11610 | | { 311 /* if */, Hexagon::A4_pzxtbfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxtb, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11611 | | { 311 /* if */, Hexagon::A4_pzxthfnew, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_zxth, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
11612 | | { 311 /* if */, Hexagon::V6_vS32b_qpred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11613 | | { 311 /* if */, Hexagon::V6_vS32b_qpred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11614 | | { 311 /* if */, Hexagon::S4_pstorerbnewt_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11615 | | { 311 /* if */, Hexagon::S2_pstorerbt_io, Convert__Reg1_2__Reg1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11616 | | { 311 /* if */, Hexagon::S2_pstorerdt_io, Convert__Reg1_2__Reg1_6__u29_3Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11617 | | { 311 /* if */, Hexagon::S4_pstorerft_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11618 | | { 311 /* if */, Hexagon::S4_pstorerhnewt_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11619 | | { 311 /* if */, Hexagon::S2_pstorerht_io, Convert__Reg1_2__Reg1_6__u31_1Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11620 | | { 311 /* if */, Hexagon::S4_pstorerinewt_abs, Convert__Reg1_2__u32_0Imm1_7__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11621 | | { 311 /* if */, Hexagon::S2_pstorerit_io, Convert__Reg1_2__Reg1_6__u30_2Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11622 | | { 311 /* if */, Hexagon::V6_vS32b_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11623 | | { 311 /* if */, Hexagon::V6_vS32b_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11624 | | { 311 /* if */, Hexagon::V6_vS32Ub_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11625 | | { 311 /* if */, Hexagon::V6_vS32Ub_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11626 | | { 311 /* if */, Hexagon::V6_zLd_pred_ai, Convert__Reg1_2__Reg1_8__s4_0Imm1_11, AMFBS_UseHVXV66_UseZReg, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11627 | | { 311 /* if */, Hexagon::V6_zLd_pred_ppu, Convert__Reg1_8__Reg1_2__Tie0_0_0__Reg1_11, AMFBS_UseHVXV66_UseZReg, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
11628 | | { 311 /* if */, Hexagon::L2_ploadrdt_io, Convert__Reg1_4__Reg1_2__Reg1_8__u29_3Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
11629 | | { 311 /* if */, Hexagon::L2_ploadrbt_io, Convert__Reg1_4__Reg1_2__Reg1_8__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11630 | | { 311 /* if */, Hexagon::L2_ploadrht_io, Convert__Reg1_4__Reg1_2__Reg1_8__u31_1Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
11631 | | { 311 /* if */, Hexagon::L2_ploadrubt_io, Convert__Reg1_4__Reg1_2__Reg1_8__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11632 | | { 311 /* if */, Hexagon::L2_ploadruht_io, Convert__Reg1_4__Reg1_2__Reg1_8__u31_1Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
11633 | | { 311 /* if */, Hexagon::L2_ploadrit_io, Convert__Reg1_4__Reg1_2__Reg1_8__u30_2Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
11634 | | { 311 /* if */, Hexagon::V6_vL32b_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_8__s4_0Imm1_11, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11635 | | { 311 /* if */, Hexagon::V6_vL32b_pred_ppu, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__Reg1_11, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
11636 | | { 311 /* if */, Hexagon::S4_pstorerbtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11637 | | { 311 /* if */, Hexagon::S4_storeirbtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11638 | | { 311 /* if */, Hexagon::S4_pstorerdtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11639 | | { 311 /* if */, Hexagon::S4_pstorerhtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11640 | | { 311 /* if */, Hexagon::S4_storeirhtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11641 | | { 311 /* if */, Hexagon::S4_pstoreritnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11642 | | { 311 /* if */, Hexagon::S4_storeiritnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11643 | | { 311 /* if */, Hexagon::C2_ccombinewnewt, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11644 | | { 311 /* if */, Hexagon::L4_ploadrdtnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11645 | | { 311 /* if */, Hexagon::A2_paddtnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11646 | | { 311 /* if */, Hexagon::A2_pandtnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11647 | | { 311 /* if */, Hexagon::L4_ploadrbtnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11648 | | { 311 /* if */, Hexagon::L4_ploadrhtnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11649 | | { 311 /* if */, Hexagon::L4_ploadrubtnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11650 | | { 311 /* if */, Hexagon::L4_ploadruhtnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11651 | | { 311 /* if */, Hexagon::L4_ploadritnew_abs, Convert__Reg1_6__Reg1_2__u32_0Imm1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11652 | | { 311 /* if */, Hexagon::A2_portnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11653 | | { 311 /* if */, Hexagon::A2_psubtnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11654 | | { 311 /* if */, Hexagon::A2_pxortnew, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11655 | | { 311 /* if */, Hexagon::V6_vS32b_nqpred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11656 | | { 311 /* if */, Hexagon::V6_vS32b_nqpred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11657 | | { 311 /* if */, Hexagon::S4_pstorerbnewf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11658 | | { 311 /* if */, Hexagon::S2_pstorerbf_io, Convert__Reg1_3__Reg1_7__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11659 | | { 311 /* if */, Hexagon::S2_pstorerdf_io, Convert__Reg1_3__Reg1_7__u29_3Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11660 | | { 311 /* if */, Hexagon::S4_pstorerff_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11661 | | { 311 /* if */, Hexagon::S4_pstorerhnewf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11662 | | { 311 /* if */, Hexagon::S2_pstorerhf_io, Convert__Reg1_3__Reg1_7__u31_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11663 | | { 311 /* if */, Hexagon::S4_pstorerinewf_abs, Convert__Reg1_3__u32_0Imm1_8__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11664 | | { 311 /* if */, Hexagon::S2_pstorerif_io, Convert__Reg1_3__Reg1_7__u30_2Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11665 | | { 311 /* if */, Hexagon::V6_vS32b_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11666 | | { 311 /* if */, Hexagon::V6_vS32b_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11667 | | { 311 /* if */, Hexagon::V6_vS32Ub_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11668 | | { 311 /* if */, Hexagon::V6_vS32Ub_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11669 | | { 311 /* if */, Hexagon::L2_ploadrdf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u29_3Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
11670 | | { 311 /* if */, Hexagon::L2_ploadrbf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11671 | | { 311 /* if */, Hexagon::L2_ploadrhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u31_1Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
11672 | | { 311 /* if */, Hexagon::L2_ploadrubf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11673 | | { 311 /* if */, Hexagon::L2_ploadruhf_io, Convert__Reg1_5__Reg1_3__Reg1_9__u31_1Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
11674 | | { 311 /* if */, Hexagon::L2_ploadrif_io, Convert__Reg1_5__Reg1_3__Reg1_9__u30_2Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
11675 | | { 311 /* if */, Hexagon::V6_vL32b_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_9__s4_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11676 | | { 311 /* if */, Hexagon::V6_vL32b_npred_ppu, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__Reg1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
11677 | | { 311 /* if */, Hexagon::S4_pstorerbfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11678 | | { 311 /* if */, Hexagon::S4_storeirbfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11679 | | { 311 /* if */, Hexagon::S4_pstorerdfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11680 | | { 311 /* if */, Hexagon::S4_pstorerhfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11681 | | { 311 /* if */, Hexagon::S4_storeirhfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11682 | | { 311 /* if */, Hexagon::S4_pstorerifnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11683 | | { 311 /* if */, Hexagon::S4_storeirifnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11684 | | { 311 /* if */, Hexagon::C2_ccombinewnewf, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_combine, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11685 | | { 311 /* if */, Hexagon::L4_ploadrdfnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11686 | | { 311 /* if */, Hexagon::A2_paddfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11687 | | { 311 /* if */, Hexagon::A2_pandfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_and, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11688 | | { 311 /* if */, Hexagon::L4_ploadrbfnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11689 | | { 311 /* if */, Hexagon::L4_ploadrhfnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11690 | | { 311 /* if */, Hexagon::L4_ploadrubfnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11691 | | { 311 /* if */, Hexagon::L4_ploadruhfnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11692 | | { 311 /* if */, Hexagon::L4_ploadrifnew_abs, Convert__Reg1_7__Reg1_3__u32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11693 | | { 311 /* if */, Hexagon::A2_porfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_or, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11694 | | { 311 /* if */, Hexagon::A2_psubfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_sub, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11695 | | { 311 /* if */, Hexagon::A2_pxorfnew, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_xor, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
11696 | | { 311 /* if */, Hexagon::V6_vS32b_qpred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11697 | | { 311 /* if */, Hexagon::V6_vaddbq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_b, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
11698 | | { 311 /* if */, Hexagon::V6_vsubbq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_b, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
11699 | | { 311 /* if */, Hexagon::V6_vaddhq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_h, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
11700 | | { 311 /* if */, Hexagon::V6_vsubhq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_h, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
11701 | | { 311 /* if */, Hexagon::V6_vaddwq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_w, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
11702 | | { 311 /* if */, Hexagon::V6_vsubwq, Convert__Reg1_6__Reg1_2__Tie0_6_6__Reg1_11, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__DOT_, MCK_w, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
11703 | | { 311 /* if */, Hexagon::S4_storeirbt_io, Convert__Reg1_2__Reg1_6__u6_0Imm1_9__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11704 | | { 311 /* if */, Hexagon::S2_pstorerbt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11705 | | { 311 /* if */, Hexagon::S2_pstorerdt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_3Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11706 | | { 311 /* if */, Hexagon::S4_storeirht_io, Convert__Reg1_2__Reg1_6__u6_1Imm1_9__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11707 | | { 311 /* if */, Hexagon::S2_pstorerht_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11708 | | { 311 /* if */, Hexagon::S4_storeirit_io, Convert__Reg1_2__Reg1_6__u6_2Imm1_9__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11709 | | { 311 /* if */, Hexagon::S2_pstorerit_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_2Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11710 | | { 311 /* if */, Hexagon::V6_vS32b_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11711 | | { 311 /* if */, Hexagon::V6_vS32Ub_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11712 | | { 311 /* if */, Hexagon::V6_zLd_pred_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s3_0Imm1_12, AMFBS_UseHVXV66_UseZReg, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
11713 | | { 311 /* if */, Hexagon::L2_ploadrdt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_3Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, }, |
11714 | | { 311 /* if */, Hexagon::L2_ploadrbt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11715 | | { 311 /* if */, Hexagon::L2_ploadrht_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_1Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
11716 | | { 311 /* if */, Hexagon::L2_ploadrubt_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11717 | | { 311 /* if */, Hexagon::L2_ploadruht_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_1Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
11718 | | { 311 /* if */, Hexagon::L2_ploadrit_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s4_2Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
11719 | | { 311 /* if */, Hexagon::V6_vL32b_nt_cur_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_10_10__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11720 | | { 311 /* if */, Hexagon::V6_vL32b_nt_tmp_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11721 | | { 311 /* if */, Hexagon::V6_vL32b_pred_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s3_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
11722 | | { 311 /* if */, Hexagon::S4_pstorerbnewtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11723 | | { 311 /* if */, Hexagon::S4_pstorerftnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11724 | | { 311 /* if */, Hexagon::S4_pstorerhnewtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11725 | | { 311 /* if */, Hexagon::S4_pstorerinewtnew_io, Convert__Reg1_2__Reg1_8__imm_95_0__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11726 | | { 311 /* if */, Hexagon::A2_padditnew, Convert__Reg1_6__Reg1_2__Reg1_10__s32_0Imm1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
11727 | | { 311 /* if */, Hexagon::V6_vS32b_nqpred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11728 | | { 311 /* if */, Hexagon::V6_vaddbnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_b, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
11729 | | { 311 /* if */, Hexagon::V6_vsubbnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_b, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_b, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_b }, }, |
11730 | | { 311 /* if */, Hexagon::V6_vaddhnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_h, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
11731 | | { 311 /* if */, Hexagon::V6_vsubhnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_h, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
11732 | | { 311 /* if */, Hexagon::V6_vaddwnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_w, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
11733 | | { 311 /* if */, Hexagon::V6_vsubwnq, Convert__Reg1_7__Reg1_3__Tie0_7_7__Reg1_12, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__DOT_, MCK_w, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__MINUS_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
11734 | | { 311 /* if */, Hexagon::S4_storeirbf_io, Convert__Reg1_3__Reg1_7__u6_0Imm1_10__s32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11735 | | { 311 /* if */, Hexagon::S2_pstorerbf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_0Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11736 | | { 311 /* if */, Hexagon::S2_pstorerdf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_3Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11737 | | { 311 /* if */, Hexagon::S4_storeirhf_io, Convert__Reg1_3__Reg1_7__u6_1Imm1_10__s32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11738 | | { 311 /* if */, Hexagon::S2_pstorerhf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11739 | | { 311 /* if */, Hexagon::S4_storeirif_io, Convert__Reg1_3__Reg1_7__u6_2Imm1_10__s32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11740 | | { 311 /* if */, Hexagon::S2_pstorerif_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_2Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11741 | | { 311 /* if */, Hexagon::V6_vS32b_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11742 | | { 311 /* if */, Hexagon::V6_vS32Ub_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
11743 | | { 311 /* if */, Hexagon::L2_ploadrdf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_3Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, }, |
11744 | | { 311 /* if */, Hexagon::L2_ploadrbf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11745 | | { 311 /* if */, Hexagon::L2_ploadrhf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_1Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
11746 | | { 311 /* if */, Hexagon::L2_ploadrubf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11747 | | { 311 /* if */, Hexagon::L2_ploadruhf_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_1Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
11748 | | { 311 /* if */, Hexagon::L2_ploadrif_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s4_2Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
11749 | | { 311 /* if */, Hexagon::V6_vL32b_nt_cur_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_11_11__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11750 | | { 311 /* if */, Hexagon::V6_vL32b_nt_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__imm_95_0, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11751 | | { 311 /* if */, Hexagon::V6_vL32b_npred_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s3_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
11752 | | { 311 /* if */, Hexagon::S4_pstorerbnewfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11753 | | { 311 /* if */, Hexagon::S4_pstorerffnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11754 | | { 311 /* if */, Hexagon::S4_pstorerhnewfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11755 | | { 311 /* if */, Hexagon::S4_pstorerinewfnew_io, Convert__Reg1_3__Reg1_9__imm_95_0__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11756 | | { 311 /* if */, Hexagon::A2_paddifnew, Convert__Reg1_7__Reg1_3__Reg1_11__s32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_add, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_s32_0Imm, MCK__41_ }, }, |
11757 | | { 311 /* if */, Hexagon::J4_tstbit0_t_jumpnv_nt, Convert__Reg1_4__b30_2Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11758 | | { 311 /* if */, Hexagon::J4_tstbit0_t_jumpnv_t, Convert__Reg1_4__b30_2Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11759 | | { 311 /* if */, Hexagon::V6_vS32b_nt_qpred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11760 | | { 311 /* if */, Hexagon::V6_vS32b_nt_qpred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11761 | | { 311 /* if */, Hexagon::S2_pstorerbnewt_io, Convert__Reg1_2__Reg1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11762 | | { 311 /* if */, Hexagon::S2_pstorerft_io, Convert__Reg1_2__Reg1_6__u31_1Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11763 | | { 311 /* if */, Hexagon::S2_pstorerhnewt_io, Convert__Reg1_2__Reg1_6__u31_1Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11764 | | { 311 /* if */, Hexagon::S2_pstorerinewt_io, Convert__Reg1_2__Reg1_6__u30_2Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11765 | | { 311 /* if */, Hexagon::V6_vS32b_nt_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11766 | | { 311 /* if */, Hexagon::V6_vS32b_new_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11767 | | { 311 /* if */, Hexagon::V6_vS32b_nt_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11768 | | { 311 /* if */, Hexagon::V6_vS32b_new_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_12, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11769 | | { 311 /* if */, Hexagon::V6_vL32b_cur_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11770 | | { 311 /* if */, Hexagon::V6_vL32b_cur_pred_ppu, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
11771 | | { 311 /* if */, Hexagon::V6_vL32b_tmp_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11772 | | { 311 /* if */, Hexagon::V6_vL32b_tmp_pred_ppu, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
11773 | | { 311 /* if */, Hexagon::V6_vL32b_nt_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_8__s4_0Imm1_11, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11774 | | { 311 /* if */, Hexagon::V6_vL32b_nt_pred_ppu, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__Reg1_11, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11775 | | { 311 /* if */, Hexagon::S4_pstorerbnewtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11776 | | { 311 /* if */, Hexagon::S4_pstorerbtnew_io, Convert__Reg1_2__Reg1_8__u32_0Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11777 | | { 311 /* if */, Hexagon::S4_pstorerdtnew_io, Convert__Reg1_2__Reg1_8__u29_3Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11778 | | { 311 /* if */, Hexagon::S4_pstorerftnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11779 | | { 311 /* if */, Hexagon::S4_pstorerhnewtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11780 | | { 311 /* if */, Hexagon::S4_pstorerhtnew_io, Convert__Reg1_2__Reg1_8__u31_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11781 | | { 311 /* if */, Hexagon::S4_pstorerinewtnew_abs, Convert__Reg1_2__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11782 | | { 311 /* if */, Hexagon::S4_pstoreritnew_io, Convert__Reg1_2__Reg1_8__u30_2Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11783 | | { 311 /* if */, Hexagon::L2_ploadrdtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u29_3Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
11784 | | { 311 /* if */, Hexagon::L2_ploadrbtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11785 | | { 311 /* if */, Hexagon::L2_ploadrhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u31_1Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
11786 | | { 311 /* if */, Hexagon::L2_ploadrubtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u32_0Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11787 | | { 311 /* if */, Hexagon::L2_ploadruhtnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u31_1Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
11788 | | { 311 /* if */, Hexagon::L2_ploadritnew_io, Convert__Reg1_6__Reg1_2__Reg1_10__u30_2Imm1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
11789 | | { 311 /* if */, Hexagon::J4_tstbit0_f_jumpnv_nt, Convert__Reg1_5__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11790 | | { 311 /* if */, Hexagon::J4_tstbit0_f_jumpnv_t, Convert__Reg1_5__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_tstbit, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_0, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11791 | | { 311 /* if */, Hexagon::V6_vS32b_nt_nqpred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11792 | | { 311 /* if */, Hexagon::V6_vS32b_nt_nqpred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11793 | | { 311 /* if */, Hexagon::S2_pstorerbnewf_io, Convert__Reg1_3__Reg1_7__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11794 | | { 311 /* if */, Hexagon::S2_pstorerff_io, Convert__Reg1_3__Reg1_7__u31_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11795 | | { 311 /* if */, Hexagon::S2_pstorerhnewf_io, Convert__Reg1_3__Reg1_7__u31_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11796 | | { 311 /* if */, Hexagon::S2_pstorerinewf_io, Convert__Reg1_3__Reg1_7__u30_2Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11797 | | { 311 /* if */, Hexagon::V6_vS32b_nt_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11798 | | { 311 /* if */, Hexagon::V6_vS32b_new_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11799 | | { 311 /* if */, Hexagon::V6_vS32b_nt_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11800 | | { 311 /* if */, Hexagon::V6_vS32b_new_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11801 | | { 311 /* if */, Hexagon::V6_vL32b_cur_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11802 | | { 311 /* if */, Hexagon::V6_vL32b_cur_npred_ppu, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
11803 | | { 311 /* if */, Hexagon::V6_vL32b_tmp_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11804 | | { 311 /* if */, Hexagon::V6_vL32b_tmp_npred_ppu, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
11805 | | { 311 /* if */, Hexagon::V6_vL32b_nt_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_9__s4_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11806 | | { 311 /* if */, Hexagon::V6_vL32b_nt_npred_ppu, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__Reg1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11807 | | { 311 /* if */, Hexagon::S4_pstorerbnewfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11808 | | { 311 /* if */, Hexagon::S4_pstorerbfnew_io, Convert__Reg1_3__Reg1_9__u32_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11809 | | { 311 /* if */, Hexagon::S4_pstorerdfnew_io, Convert__Reg1_3__Reg1_9__u29_3Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11810 | | { 311 /* if */, Hexagon::S4_pstorerffnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11811 | | { 311 /* if */, Hexagon::S4_pstorerhnewfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11812 | | { 311 /* if */, Hexagon::S4_pstorerhfnew_io, Convert__Reg1_3__Reg1_9__u31_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11813 | | { 311 /* if */, Hexagon::S4_pstorerinewfnew_abs, Convert__Reg1_3__u32_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11814 | | { 311 /* if */, Hexagon::S4_pstorerifnew_io, Convert__Reg1_3__Reg1_9__u30_2Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11815 | | { 311 /* if */, Hexagon::L2_ploadrdfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u29_3Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_ }, }, |
11816 | | { 311 /* if */, Hexagon::L2_ploadrbfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11817 | | { 311 /* if */, Hexagon::L2_ploadrhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u31_1Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
11818 | | { 311 /* if */, Hexagon::L2_ploadrubfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u32_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_ }, }, |
11819 | | { 311 /* if */, Hexagon::L2_ploadruhfnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u31_1Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_ }, }, |
11820 | | { 311 /* if */, Hexagon::L2_ploadrifnew_io, Convert__Reg1_7__Reg1_3__Reg1_11__u30_2Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_ }, }, |
11821 | | { 311 /* if */, Hexagon::J4_cmpeq_t_jumpnv_nt, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11822 | | { 311 /* if */, Hexagon::J4_cmpeq_t_jumpnv_t, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11823 | | { 311 /* if */, Hexagon::J4_cmpgt_t_jumpnv_nt, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11824 | | { 311 /* if */, Hexagon::J4_cmpgt_t_jumpnv_t, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11825 | | { 311 /* if */, Hexagon::J4_cmplt_t_jumpnv_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11826 | | { 311 /* if */, Hexagon::J4_cmplt_t_jumpnv_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11827 | | { 311 /* if */, Hexagon::J4_cmpgtu_t_jumpnv_nt, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11828 | | { 311 /* if */, Hexagon::J4_cmpgtu_t_jumpnv_t, Convert__Reg1_6__Reg1_9__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11829 | | { 311 /* if */, Hexagon::J4_cmpltu_t_jumpnv_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11830 | | { 311 /* if */, Hexagon::J4_cmpltu_t_jumpnv_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11831 | | { 311 /* if */, Hexagon::V6_vS32b_nt_qpred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11832 | | { 311 /* if */, Hexagon::V6_vscattermhwq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_15, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_h, MCK__61_, MCK_HvxVR }, }, |
11833 | | { 311 /* if */, Hexagon::V6_vscattermhwq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_13, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
11834 | | { 311 /* if */, Hexagon::V6_vscattermhq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_15, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__DOT_, MCK_h, MCK__61_, MCK_HvxVR }, }, |
11835 | | { 311 /* if */, Hexagon::V6_vscattermhq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_13, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
11836 | | { 311 /* if */, Hexagon::V6_vscattermwq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_15, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_w, MCK__61_, MCK_HvxVR }, }, |
11837 | | { 311 /* if */, Hexagon::V6_vscattermwq, Convert__Reg1_2__Reg1_6__Reg1_7__Reg1_8__Reg1_13, AMFBS_UseHVX, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
11838 | | { 311 /* if */, Hexagon::S2_pstorerbnewt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_0Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11839 | | { 311 /* if */, Hexagon::S4_pstorerbt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11840 | | { 311 /* if */, Hexagon::S4_pstorerdt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11841 | | { 311 /* if */, Hexagon::S2_pstorerft_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11842 | | { 311 /* if */, Hexagon::S2_pstorerhnewt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_1Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11843 | | { 311 /* if */, Hexagon::S4_pstorerht_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11844 | | { 311 /* if */, Hexagon::S2_pstorerinewt_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s4_2Imm1_10__Reg1_13, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11845 | | { 311 /* if */, Hexagon::S4_pstorerit_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11846 | | { 311 /* if */, Hexagon::V6_vS32b_nt_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11847 | | { 311 /* if */, Hexagon::V6_vS32b_new_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_13, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11848 | | { 311 /* if */, Hexagon::L4_ploadrdt_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11849 | | { 311 /* if */, Hexagon::L4_ploadrbt_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11850 | | { 311 /* if */, Hexagon::L4_ploadrht_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11851 | | { 311 /* if */, Hexagon::L4_ploadrubt_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11852 | | { 311 /* if */, Hexagon::L4_ploadruht_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11853 | | { 311 /* if */, Hexagon::L4_ploadrit_rr, Convert__Reg1_4__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11854 | | { 311 /* if */, Hexagon::V6_vL32b_cur_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
11855 | | { 311 /* if */, Hexagon::V6_vL32b_tmp_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
11856 | | { 311 /* if */, Hexagon::V6_vL32b_nt_pred_pi, Convert__Reg1_4__Reg1_8__Reg1_2__Tie1_0_0__s3_0Imm1_12, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11857 | | { 311 /* if */, Hexagon::S4_storeirbtnew_io, Convert__Reg1_2__Reg1_8__u6_0Imm1_11__s32_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11858 | | { 311 /* if */, Hexagon::S2_pstorerbtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11859 | | { 311 /* if */, Hexagon::S2_pstorerdtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_3Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11860 | | { 311 /* if */, Hexagon::S4_storeirhtnew_io, Convert__Reg1_2__Reg1_8__u6_1Imm1_11__s32_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11861 | | { 311 /* if */, Hexagon::S2_pstorerhtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11862 | | { 311 /* if */, Hexagon::S4_storeiritnew_io, Convert__Reg1_2__Reg1_8__u6_2Imm1_11__s32_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11863 | | { 311 /* if */, Hexagon::S2_pstoreritnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_2Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11864 | | { 311 /* if */, Hexagon::L4_return_tnew_pnt, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__COLON_, MCK_raw }, }, |
11865 | | { 311 /* if */, Hexagon::L4_return_tnew_pt, Convert__Reg1_6__Reg1_2__Reg1_10, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_t, MCK__COLON_, MCK_raw }, }, |
11866 | | { 311 /* if */, Hexagon::L2_ploadrdtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_3Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, }, |
11867 | | { 311 /* if */, Hexagon::L2_ploadrbtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11868 | | { 311 /* if */, Hexagon::L2_ploadrhtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_1Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
11869 | | { 311 /* if */, Hexagon::L2_ploadrubtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_0Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11870 | | { 311 /* if */, Hexagon::L2_ploadruhtnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_1Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
11871 | | { 311 /* if */, Hexagon::L2_ploadritnew_pi, Convert__Reg1_6__Reg1_10__Reg1_2__Tie1_0_0__s4_2Imm1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
11872 | | { 311 /* if */, Hexagon::J4_cmpeq_f_jumpnv_nt, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11873 | | { 311 /* if */, Hexagon::J4_cmpeq_f_jumpnv_t, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11874 | | { 311 /* if */, Hexagon::J4_cmpgt_f_jumpnv_nt, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11875 | | { 311 /* if */, Hexagon::J4_cmpgt_f_jumpnv_t, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11876 | | { 311 /* if */, Hexagon::J4_cmplt_f_jumpnv_nt, Convert__Reg1_7__Reg1_8__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11877 | | { 311 /* if */, Hexagon::J4_cmplt_f_jumpnv_t, Convert__Reg1_7__Reg1_8__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11878 | | { 311 /* if */, Hexagon::J4_cmpgtu_f_jumpnv_nt, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11879 | | { 311 /* if */, Hexagon::J4_cmpgtu_f_jumpnv_t, Convert__Reg1_7__Reg1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK_IntRegs, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11880 | | { 311 /* if */, Hexagon::J4_cmpltu_f_jumpnv_nt, Convert__Reg1_7__Reg1_8__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11881 | | { 311 /* if */, Hexagon::J4_cmpltu_f_jumpnv_t, Convert__Reg1_7__Reg1_8__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11882 | | { 311 /* if */, Hexagon::V6_vS32b_nt_nqpred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_HvxQR, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11883 | | { 311 /* if */, Hexagon::S2_pstorerbnewf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_0Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11884 | | { 311 /* if */, Hexagon::S4_pstorerbf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11885 | | { 311 /* if */, Hexagon::S4_pstorerdf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11886 | | { 311 /* if */, Hexagon::S2_pstorerff_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11887 | | { 311 /* if */, Hexagon::S2_pstorerhnewf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11888 | | { 311 /* if */, Hexagon::S4_pstorerhf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11889 | | { 311 /* if */, Hexagon::S2_pstorerinewf_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s4_2Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11890 | | { 311 /* if */, Hexagon::S4_pstorerif_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11891 | | { 311 /* if */, Hexagon::V6_vS32b_nt_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
11892 | | { 311 /* if */, Hexagon::V6_vS32b_new_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11893 | | { 311 /* if */, Hexagon::L4_ploadrdf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11894 | | { 311 /* if */, Hexagon::L4_ploadrbf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11895 | | { 311 /* if */, Hexagon::L4_ploadrhf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11896 | | { 311 /* if */, Hexagon::L4_ploadrubf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11897 | | { 311 /* if */, Hexagon::L4_ploadruhf_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11898 | | { 311 /* if */, Hexagon::L4_ploadrif_rr, Convert__Reg1_5__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11899 | | { 311 /* if */, Hexagon::V6_vL32b_cur_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
11900 | | { 311 /* if */, Hexagon::V6_vL32b_tmp_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
11901 | | { 311 /* if */, Hexagon::V6_vL32b_nt_npred_pi, Convert__Reg1_5__Reg1_9__Reg1_3__Tie1_0_0__s3_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11902 | | { 311 /* if */, Hexagon::S4_storeirbfnew_io, Convert__Reg1_3__Reg1_9__u6_0Imm1_12__s32_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11903 | | { 311 /* if */, Hexagon::S2_pstorerbfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11904 | | { 311 /* if */, Hexagon::S2_pstorerdfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_3Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11905 | | { 311 /* if */, Hexagon::S4_storeirhfnew_io, Convert__Reg1_3__Reg1_9__u6_1Imm1_12__s32_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11906 | | { 311 /* if */, Hexagon::S2_pstorerhfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_1Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11907 | | { 311 /* if */, Hexagon::S4_storeirifnew_io, Convert__Reg1_3__Reg1_9__u6_2Imm1_12__s32_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
11908 | | { 311 /* if */, Hexagon::S2_pstorerifnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_2Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11909 | | { 311 /* if */, Hexagon::L4_return_fnew_pnt, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__COLON_, MCK_raw }, }, |
11910 | | { 311 /* if */, Hexagon::L4_return_fnew_pt, Convert__Reg1_7__Reg1_3__Reg1_11, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_dealloc_95_return, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_t, MCK__COLON_, MCK_raw }, }, |
11911 | | { 311 /* if */, Hexagon::L2_ploadrdfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_3Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_ }, }, |
11912 | | { 311 /* if */, Hexagon::L2_ploadrbfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11913 | | { 311 /* if */, Hexagon::L2_ploadrhfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_1Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
11914 | | { 311 /* if */, Hexagon::L2_ploadrubfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_0Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
11915 | | { 311 /* if */, Hexagon::L2_ploadruhfnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_1Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_ }, }, |
11916 | | { 311 /* if */, Hexagon::L2_ploadrifnew_pi, Convert__Reg1_7__Reg1_11__Reg1_3__Tie1_0_0__s4_2Imm1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_ }, }, |
11917 | | { 311 /* if */, Hexagon::J4_cmpeqn1_t_jumpnv_nt, Convert__Reg1_6__n1Const1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11918 | | { 311 /* if */, Hexagon::J4_cmpeqn1_t_jumpnv_t, Convert__Reg1_6__n1Const1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11919 | | { 311 /* if */, Hexagon::J4_cmpeqi_t_jumpnv_nt, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11920 | | { 311 /* if */, Hexagon::J4_cmpeqi_t_jumpnv_t, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11921 | | { 311 /* if */, Hexagon::J4_cmpgtn1_t_jumpnv_nt, Convert__Reg1_6__n1Const1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11922 | | { 311 /* if */, Hexagon::J4_cmpgtn1_t_jumpnv_t, Convert__Reg1_6__n1Const1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11923 | | { 311 /* if */, Hexagon::J4_cmpgti_t_jumpnv_nt, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11924 | | { 311 /* if */, Hexagon::J4_cmpgti_t_jumpnv_t, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11925 | | { 311 /* if */, Hexagon::J4_cmpgtui_t_jumpnv_nt, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11926 | | { 311 /* if */, Hexagon::J4_cmpgtui_t_jumpnv_t, Convert__Reg1_6__u5_0Imm1_10__b30_2Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11927 | | { 311 /* if */, Hexagon::V6_vS32b_nt_new_pred_ai, Convert__Reg1_2__Reg1_6__s4_0Imm1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11928 | | { 311 /* if */, Hexagon::V6_vS32b_nt_new_pred_ppu, Convert__Reg1_6__Reg1_2__Tie0_0_0__Reg1_9__Reg1_14, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11929 | | { 311 /* if */, Hexagon::V6_vL32b_nt_cur_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11930 | | { 311 /* if */, Hexagon::V6_vL32b_nt_cur_pred_ppu, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11931 | | { 311 /* if */, Hexagon::V6_vL32b_nt_tmp_pred_ai, Convert__Reg1_4__Reg1_2__Reg1_10__s4_0Imm1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11932 | | { 311 /* if */, Hexagon::V6_vL32b_nt_tmp_pred_ppu, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__Reg1_13, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11933 | | { 311 /* if */, Hexagon::S4_pstorerbnewtnew_io, Convert__Reg1_2__Reg1_8__u32_0Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11934 | | { 311 /* if */, Hexagon::S4_pstorerftnew_io, Convert__Reg1_2__Reg1_8__u31_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11935 | | { 311 /* if */, Hexagon::S4_pstorerhnewtnew_io, Convert__Reg1_2__Reg1_8__u31_1Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11936 | | { 311 /* if */, Hexagon::S4_pstorerinewtnew_io, Convert__Reg1_2__Reg1_8__u30_2Imm1_11__Reg1_14, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11937 | | { 311 /* if */, Hexagon::J4_cmpeqn1_f_jumpnv_nt, Convert__Reg1_7__n1Const1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11938 | | { 311 /* if */, Hexagon::J4_cmpeqn1_f_jumpnv_t, Convert__Reg1_7__n1Const1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11939 | | { 311 /* if */, Hexagon::J4_cmpeqi_f_jumpnv_nt, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11940 | | { 311 /* if */, Hexagon::J4_cmpeqi_f_jumpnv_t, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11941 | | { 311 /* if */, Hexagon::J4_cmpgtn1_f_jumpnv_nt, Convert__Reg1_7__n1Const1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11942 | | { 311 /* if */, Hexagon::J4_cmpgtn1_f_jumpnv_t, Convert__Reg1_7__n1Const1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11943 | | { 311 /* if */, Hexagon::J4_cmpgti_f_jumpnv_nt, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11944 | | { 311 /* if */, Hexagon::J4_cmpgti_f_jumpnv_t, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11945 | | { 311 /* if */, Hexagon::J4_cmpgtui_f_jumpnv_nt, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
11946 | | { 311 /* if */, Hexagon::J4_cmpgtui_f_jumpnv_t, Convert__Reg1_7__u5_0Imm1_11__b30_2Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_IntRegs, MCK__DOT_, MCK_new, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
11947 | | { 311 /* if */, Hexagon::V6_vS32b_nt_new_npred_ai, Convert__Reg1_3__Reg1_7__s4_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11948 | | { 311 /* if */, Hexagon::V6_vS32b_nt_new_npred_ppu, Convert__Reg1_7__Reg1_3__Tie0_0_0__Reg1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11949 | | { 311 /* if */, Hexagon::V6_vL32b_nt_cur_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11950 | | { 311 /* if */, Hexagon::V6_vL32b_nt_cur_npred_ppu, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11951 | | { 311 /* if */, Hexagon::V6_vL32b_nt_tmp_npred_ai, Convert__Reg1_5__Reg1_3__Reg1_11__s4_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11952 | | { 311 /* if */, Hexagon::V6_vL32b_nt_tmp_npred_ppu, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__Reg1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11953 | | { 311 /* if */, Hexagon::S4_pstorerbnewfnew_io, Convert__Reg1_3__Reg1_9__u32_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11954 | | { 311 /* if */, Hexagon::S4_pstorerffnew_io, Convert__Reg1_3__Reg1_9__u31_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11955 | | { 311 /* if */, Hexagon::S4_pstorerhnewfnew_io, Convert__Reg1_3__Reg1_9__u31_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11956 | | { 311 /* if */, Hexagon::S4_pstorerinewfnew_io, Convert__Reg1_3__Reg1_9__u30_2Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11957 | | { 311 /* if */, Hexagon::V6_vgathermhwq, Convert__Reg1_2__Reg1_10__Reg1_11__Reg1_12, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_V65Regs, MCK__DOT_, MCK_h, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_h }, }, |
11958 | | { 311 /* if */, Hexagon::V6_vgathermhq, Convert__Reg1_2__Reg1_10__Reg1_11__Reg1_12, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_V65Regs, MCK__DOT_, MCK_h, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__DOT_, MCK_h }, }, |
11959 | | { 311 /* if */, Hexagon::V6_vgathermwq, Convert__Reg1_2__Reg1_10__Reg1_11__Reg1_12, AMFBS_UseHVXV65, { MCK_if, MCK__40_, MCK_HvxQR, MCK__41_, MCK_V65Regs, MCK__DOT_, MCK_w, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_w }, }, |
11960 | | { 311 /* if */, Hexagon::S4_pstorerbnewt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11961 | | { 311 /* if */, Hexagon::S4_pstorerft_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11962 | | { 311 /* if */, Hexagon::S4_pstorerhnewt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11963 | | { 311 /* if */, Hexagon::S4_pstorerinewt_rr, Convert__Reg1_2__Reg1_6__Reg1_8__u2_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11964 | | { 311 /* if */, Hexagon::V6_vS32b_nt_new_pred_pi, Convert__Reg1_6__Reg1_2__Tie0_0_0__s3_0Imm1_10__Reg1_15, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11965 | | { 311 /* if */, Hexagon::V6_vL32b_nt_cur_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11966 | | { 311 /* if */, Hexagon::V6_vL32b_nt_tmp_pred_pi, Convert__Reg1_4__Reg1_10__Reg1_2__Tie1_0_0__s3_0Imm1_14, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11967 | | { 311 /* if */, Hexagon::S2_pstorerbnewtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_0Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11968 | | { 311 /* if */, Hexagon::S4_pstorerbtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11969 | | { 311 /* if */, Hexagon::S4_pstorerdtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11970 | | { 311 /* if */, Hexagon::S2_pstorerftnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11971 | | { 311 /* if */, Hexagon::S2_pstorerhnewtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_1Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11972 | | { 311 /* if */, Hexagon::S4_pstorerhtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11973 | | { 311 /* if */, Hexagon::S2_pstorerinewtnew_pi, Convert__Reg1_8__Reg1_2__Tie0_0_0__s4_2Imm1_12__Reg1_15, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11974 | | { 311 /* if */, Hexagon::S4_pstoreritnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11975 | | { 311 /* if */, Hexagon::L4_ploadrdtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11976 | | { 311 /* if */, Hexagon::L4_ploadrbtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11977 | | { 311 /* if */, Hexagon::L4_ploadrhtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11978 | | { 311 /* if */, Hexagon::L4_ploadrubtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11979 | | { 311 /* if */, Hexagon::L4_ploadruhtnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11980 | | { 311 /* if */, Hexagon::L4_ploadritnew_rr, Convert__Reg1_6__Reg1_2__Reg1_10__Reg1_12__u2_0Imm1_16, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11981 | | { 311 /* if */, Hexagon::S4_pstorerbnewf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11982 | | { 311 /* if */, Hexagon::S4_pstorerff_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11983 | | { 311 /* if */, Hexagon::S4_pstorerhnewf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11984 | | { 311 /* if */, Hexagon::S4_pstorerinewf_rr, Convert__Reg1_3__Reg1_7__Reg1_9__u2_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11985 | | { 311 /* if */, Hexagon::V6_vS32b_nt_new_npred_pi, Convert__Reg1_7__Reg1_3__Tie0_0_0__s3_0Imm1_11__Reg1_16, AMFBS_UseHVXV60, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
11986 | | { 311 /* if */, Hexagon::V6_vL32b_nt_cur_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_cur, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11987 | | { 311 /* if */, Hexagon::V6_vL32b_nt_tmp_npred_pi, Convert__Reg1_5__Reg1_11__Reg1_3__Tie1_0_0__s3_0Imm1_15, AMFBS_UseHVXV62, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__41_, MCK_HvxVR, MCK__DOT_, MCK_tmp, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt }, }, |
11988 | | { 311 /* if */, Hexagon::S2_pstorerbnewfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_0Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11989 | | { 311 /* if */, Hexagon::S4_pstorerbfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11990 | | { 311 /* if */, Hexagon::S4_pstorerdfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
11991 | | { 311 /* if */, Hexagon::S2_pstorerffnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_1Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
11992 | | { 311 /* if */, Hexagon::S2_pstorerhnewfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_1Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11993 | | { 311 /* if */, Hexagon::S4_pstorerhfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11994 | | { 311 /* if */, Hexagon::S2_pstorerinewfnew_pi, Convert__Reg1_9__Reg1_3__Tie0_0_0__s4_2Imm1_13__Reg1_16, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
11995 | | { 311 /* if */, Hexagon::S4_pstorerifnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
11996 | | { 311 /* if */, Hexagon::L4_ploadrdfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_DoubleRegs, MCK__61_, MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11997 | | { 311 /* if */, Hexagon::L4_ploadrbfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11998 | | { 311 /* if */, Hexagon::L4_ploadrhfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
11999 | | { 311 /* if */, Hexagon::L4_ploadrubfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memub, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
12000 | | { 311 /* if */, Hexagon::L4_ploadruhfnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memuh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
12001 | | { 311 /* if */, Hexagon::L4_ploadrifnew_rr, Convert__Reg1_7__Reg1_3__Reg1_11__Reg1_13__u2_0Imm1_17, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_IntRegs, MCK__61_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_ }, }, |
12002 | | { 311 /* if */, Hexagon::S4_pstorerbnewtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12003 | | { 311 /* if */, Hexagon::S4_pstorerftnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12004 | | { 311 /* if */, Hexagon::S4_pstorerhnewtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12005 | | { 311 /* if */, Hexagon::S4_pstorerinewtnew_rr, Convert__Reg1_2__Reg1_8__Reg1_10__u2_0Imm1_14__Reg1_17, AMFBS_None, { MCK_if, MCK__40_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12006 | | { 311 /* if */, Hexagon::S4_pstorerbnewfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12007 | | { 311 /* if */, Hexagon::S4_pstorerffnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12008 | | { 311 /* if */, Hexagon::S4_pstorerhnewfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12009 | | { 311 /* if */, Hexagon::S4_pstorerinewfnew_rr, Convert__Reg1_3__Reg1_9__Reg1_11__u2_0Imm1_15__Reg1_18, AMFBS_None, { MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_PredRegs, MCK__DOT_, MCK_new, MCK__41_, MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12010 | | { 314 /* immext */, Hexagon::A4_ext, Convert__u26_6Imm1_3, AMFBS_None, { MCK_immext, MCK__40_, MCK__HASH_, MCK_u26_6Imm, MCK__41_ }, }, |
12011 | | { 321 /* isync */, Hexagon::Y2_isync, Convert_NoOperands, AMFBS_None, { MCK_isync }, }, |
12012 | | { 327 /* jump */, Hexagon::J2_jump, Convert__b30_2Imm1_1, AMFBS_None, { MCK_jump, MCK_b30_2Imm }, }, |
12013 | | { 327 /* jump */, Hexagon::RESTORE_DEALLOC_RET_JMP_V4, Convert__b30_2Imm1_1, AMFBS_None, { MCK_jump, MCK_b30_2Imm }, }, |
12014 | | { 327 /* jump */, Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT, Convert__b30_2Imm1_1, AMFBS_None, { MCK_jump, MCK_b30_2Imm }, }, |
12015 | | { 327 /* jump */, Hexagon::RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC, Convert__b30_2Imm1_1, AMFBS_None, { MCK_jump, MCK_b30_2Imm }, }, |
12016 | | { 327 /* jump */, Hexagon::RESTORE_DEALLOC_RET_JMP_V4_PIC, Convert__b30_2Imm1_1, AMFBS_None, { MCK_jump, MCK_b30_2Imm }, }, |
12017 | | { 332 /* jumpr */, Hexagon::J2_jumpr, Convert__Reg1_1, AMFBS_None, { MCK_jumpr, MCK_IntRegs }, }, |
12018 | | { 338 /* jumprh */, Hexagon::J2_jumprh, Convert__Reg1_1, AMFBS_HasV73, { MCK_jumprh, MCK_IntRegs }, }, |
12019 | | { 345 /* k0lock */, Hexagon::Y2_k0lock, Convert_NoOperands, AMFBS_None, { MCK_k0lock }, }, |
12020 | | { 352 /* k0unlock */, Hexagon::Y2_k0unlock, Convert_NoOperands, AMFBS_None, { MCK_k0unlock }, }, |
12021 | | { 361 /* l2cleanidx */, Hexagon::Y5_l2cleanidx, Convert__Reg1_2, AMFBS_None, { MCK_l2cleanidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12022 | | { 372 /* l2cleaninvidx */, Hexagon::Y2_l2cleaninvidx, Convert__Reg1_2, AMFBS_None, { MCK_l2cleaninvidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12023 | | { 386 /* l2fetch */, Hexagon::Y5_l2fetch, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_l2fetch, MCK__40_, MCK_IntRegs, MCK_DoubleRegs, MCK__41_ }, }, |
12024 | | { 386 /* l2fetch */, Hexagon::Y4_l2fetch, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_l2fetch, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
12025 | | { 394 /* l2gclean */, Hexagon::Y5_l2gclean, Convert_NoOperands, AMFBS_None, { MCK_l2gclean }, }, |
12026 | | { 394 /* l2gclean */, Hexagon::Y6_l2gcleanpa, Convert__Reg1_2, AMFBS_None, { MCK_l2gclean, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
12027 | | { 403 /* l2gcleaninv */, Hexagon::Y5_l2gcleaninv, Convert_NoOperands, AMFBS_None, { MCK_l2gcleaninv }, }, |
12028 | | { 403 /* l2gcleaninv */, Hexagon::Y6_l2gcleaninvpa, Convert__Reg1_2, AMFBS_None, { MCK_l2gcleaninv, MCK__40_, MCK_DoubleRegs, MCK__41_ }, }, |
12029 | | { 415 /* l2gunlock */, Hexagon::Y5_l2gunlock, Convert_NoOperands, AMFBS_None, { MCK_l2gunlock }, }, |
12030 | | { 425 /* l2invidx */, Hexagon::Y5_l2invidx, Convert__Reg1_2, AMFBS_None, { MCK_l2invidx, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12031 | | { 434 /* l2kill */, Hexagon::Y2_l2kill, Convert_NoOperands, AMFBS_None, { MCK_l2kill }, }, |
12032 | | { 441 /* l2tagw */, Hexagon::Y4_l2tagw, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_l2tagw, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK__41_ }, }, |
12033 | | { 448 /* l2unlocka */, Hexagon::Y5_l2unlocka, Convert__Reg1_2, AMFBS_None, { MCK_l2unlocka, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12034 | | { 458 /* loop0 */, Hexagon::J2_loop0r, Convert__b30_2Imm1_2__Reg1_3, AMFBS_None, { MCK_loop0, MCK__40_, MCK_b30_2Imm, MCK_IntRegs, MCK__41_ }, }, |
12035 | | { 458 /* loop0 */, Hexagon::J2_loop0i, Convert__b30_2Imm1_2__u10_0Imm1_4, AMFBS_None, { MCK_loop0, MCK__40_, MCK_b30_2Imm, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
12036 | | { 464 /* loop1 */, Hexagon::J2_loop1r, Convert__b30_2Imm1_2__Reg1_3, AMFBS_None, { MCK_loop1, MCK__40_, MCK_b30_2Imm, MCK_IntRegs, MCK__41_ }, }, |
12037 | | { 464 /* loop1 */, Hexagon::J2_loop1i, Convert__b30_2Imm1_2__u10_0Imm1_4, AMFBS_None, { MCK_loop1, MCK__40_, MCK_b30_2Imm, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
12038 | | { 470 /* memb */, Hexagon::S2_storerb_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12039 | | { 470 /* memb */, Hexagon::PS_storerbabs, Convert__u32_0Imm1_3__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12040 | | { 470 /* memb */, Hexagon::L4_and_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
12041 | | { 470 /* memb */, Hexagon::L4_add_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
12042 | | { 470 /* memb */, Hexagon::L4_sub_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
12043 | | { 470 /* memb */, Hexagon::S4_storeirb_io, Convert__Reg1_2__imm_95_0__s32_0Imm1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
12044 | | { 470 /* memb */, Hexagon::L4_or_memopb_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
12045 | | { 470 /* memb */, Hexagon::L4_iadd_memopb_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12046 | | { 470 /* memb */, Hexagon::L4_isub_memopb_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12047 | | { 470 /* memb */, Hexagon::S2_storerbnew_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12048 | | { 470 /* memb */, Hexagon::PS_storerbnewabs, Convert__u32_0Imm1_3__Reg1_6, AMFBS_None, { MCK_memb, MCK__40_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12049 | | { 470 /* memb */, Hexagon::S2_storerbgp, Convert__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12050 | | { 470 /* memb */, Hexagon::S2_storerb_io, Convert__Reg1_2__s32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12051 | | { 470 /* memb */, Hexagon::S2_storerb_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12052 | | { 470 /* memb */, Hexagon::S4_storerb_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12053 | | { 470 /* memb */, Hexagon::L4_iand_memopb_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12054 | | { 470 /* memb */, Hexagon::L4_ior_memopb_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12055 | | { 470 /* memb */, Hexagon::L4_and_memopb_io, Convert__Reg1_2__u32_0Imm1_5__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
12056 | | { 470 /* memb */, Hexagon::L4_add_memopb_io, Convert__Reg1_2__u32_0Imm1_5__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
12057 | | { 470 /* memb */, Hexagon::L4_sub_memopb_io, Convert__Reg1_2__u32_0Imm1_5__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
12058 | | { 470 /* memb */, Hexagon::L4_or_memopb_io, Convert__Reg1_2__u32_0Imm1_5__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
12059 | | { 470 /* memb */, Hexagon::S4_storeirb_io, Convert__Reg1_2__u6_0Imm1_5__s32_0Imm1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_0Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
12060 | | { 470 /* memb */, Hexagon::S2_storerb_pi, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12061 | | { 470 /* memb */, Hexagon::S2_storerbnewgp, Convert__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12062 | | { 470 /* memb */, Hexagon::S2_storerbnew_io, Convert__Reg1_2__s32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12063 | | { 470 /* memb */, Hexagon::L4_iadd_memopb_io, Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12064 | | { 470 /* memb */, Hexagon::L4_isub_memopb_io, Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12065 | | { 470 /* memb */, Hexagon::S2_storerbnew_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12066 | | { 470 /* memb */, Hexagon::S2_storerb_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12067 | | { 470 /* memb */, Hexagon::S4_storerbnew_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12068 | | { 470 /* memb */, Hexagon::S2_storerbnew_pi, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_9, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12069 | | { 470 /* memb */, Hexagon::S4_storerb_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12070 | | { 470 /* memb */, Hexagon::L4_iand_memopb_io, Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12071 | | { 470 /* memb */, Hexagon::L4_ior_memopb_io, Convert__Reg1_2__u32_0Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12072 | | { 470 /* memb */, Hexagon::S2_storerbnew_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12073 | | { 470 /* memb */, Hexagon::S4_storerb_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12074 | | { 470 /* memb */, Hexagon::S2_storerb_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12075 | | { 470 /* memb */, Hexagon::S4_storerbnew_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12076 | | { 470 /* memb */, Hexagon::S2_storerb_pci, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12077 | | { 470 /* memb */, Hexagon::S4_storerbnew_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12078 | | { 470 /* memb */, Hexagon::S2_storerbnew_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12079 | | { 470 /* memb */, Hexagon::S2_storerbnew_pci, Convert__Reg1_2__Tie0_0_0__s4_0Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memb, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12080 | | { 475 /* memcpy */, Hexagon::L6_memcpy, Convert__Reg1_2__Reg1_3__Reg1_4, AMFBS_HasV66, { MCK_memcpy, MCK__40_, MCK_IntRegs, MCK_IntRegs, MCK_ModRegs, MCK__41_ }, }, |
12081 | | { 482 /* memd */, Hexagon::S2_storerd_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12082 | | { 482 /* memd */, Hexagon::PS_storerdabs, Convert__u29_3Imm1_3__Reg1_6, AMFBS_None, { MCK_memd, MCK__40_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12083 | | { 482 /* memd */, Hexagon::S2_storerdgp, Convert__u29_3Imm1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12084 | | { 482 /* memd */, Hexagon::S2_storerd_io, Convert__Reg1_2__s29_3Imm1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s29_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12085 | | { 482 /* memd */, Hexagon::S2_storerd_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12086 | | { 482 /* memd */, Hexagon::S4_storerd_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12087 | | { 482 /* memd */, Hexagon::S2_storerd_pi, Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_9, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12088 | | { 482 /* memd */, Hexagon::S2_storerd_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12089 | | { 482 /* memd */, Hexagon::S4_storerd_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12090 | | { 482 /* memd */, Hexagon::S4_storerd_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12091 | | { 482 /* memd */, Hexagon::S2_storerd_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12092 | | { 482 /* memd */, Hexagon::S2_storerd_pci, Convert__Reg1_2__Tie0_0_0__s4_3Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memd, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_3Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12093 | | { 487 /* memd_locked */, Hexagon::S4_stored_locked, Convert__Reg1_3__Reg1_2__Reg1_6, AMFBS_None, { MCK_memd_95_locked, MCK__40_, MCK_IntRegs, MCK_PredRegs, MCK__41_, MCK__61_, MCK_DoubleRegs }, }, |
12094 | | { 499 /* memd_rl */, Hexagon::S4_stored_rl_at_vi, Convert__Reg1_2__Reg1_7, AMFBS_HasV68, { MCK_memd_95_rl, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_at, MCK__61_, MCK_DoubleRegs }, }, |
12095 | | { 499 /* memd_rl */, Hexagon::S4_stored_rl_st_vi, Convert__Reg1_2__Reg1_7, AMFBS_HasV68, { MCK_memd_95_rl, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_st, MCK__61_, MCK_DoubleRegs }, }, |
12096 | | { 507 /* memh */, Hexagon::S2_storerh_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12097 | | { 507 /* memh */, Hexagon::PS_storerhabs, Convert__u31_1Imm1_3__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12098 | | { 507 /* memh */, Hexagon::L4_and_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
12099 | | { 507 /* memh */, Hexagon::L4_add_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
12100 | | { 507 /* memh */, Hexagon::L4_sub_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
12101 | | { 507 /* memh */, Hexagon::S4_storeirh_io, Convert__Reg1_2__imm_95_0__s32_0Imm1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
12102 | | { 507 /* memh */, Hexagon::L4_or_memoph_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
12103 | | { 507 /* memh */, Hexagon::L4_iadd_memoph_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12104 | | { 507 /* memh */, Hexagon::L4_isub_memoph_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12105 | | { 507 /* memh */, Hexagon::S2_storerf_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12106 | | { 507 /* memh */, Hexagon::S2_storerhnew_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12107 | | { 507 /* memh */, Hexagon::PS_storerfabs, Convert__u31_1Imm1_3__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12108 | | { 507 /* memh */, Hexagon::PS_storerhnewabs, Convert__u31_1Imm1_3__Reg1_6, AMFBS_None, { MCK_memh, MCK__40_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12109 | | { 507 /* memh */, Hexagon::S2_storerhgp, Convert__u31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12110 | | { 507 /* memh */, Hexagon::S2_storerh_io, Convert__Reg1_2__s31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12111 | | { 507 /* memh */, Hexagon::S2_storerh_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12112 | | { 507 /* memh */, Hexagon::S4_storerh_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12113 | | { 507 /* memh */, Hexagon::L4_iand_memoph_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12114 | | { 507 /* memh */, Hexagon::L4_ior_memoph_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12115 | | { 507 /* memh */, Hexagon::L4_and_memoph_io, Convert__Reg1_2__u31_1Imm1_5__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
12116 | | { 507 /* memh */, Hexagon::L4_add_memoph_io, Convert__Reg1_2__u31_1Imm1_5__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
12117 | | { 507 /* memh */, Hexagon::L4_sub_memoph_io, Convert__Reg1_2__u31_1Imm1_5__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
12118 | | { 507 /* memh */, Hexagon::L4_or_memoph_io, Convert__Reg1_2__u31_1Imm1_5__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
12119 | | { 507 /* memh */, Hexagon::S4_storeirh_io, Convert__Reg1_2__u6_1Imm1_5__s32_0Imm1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_1Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
12120 | | { 507 /* memh */, Hexagon::S2_storerh_pi, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12121 | | { 507 /* memh */, Hexagon::S2_storerfgp, Convert__u31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12122 | | { 507 /* memh */, Hexagon::S2_storerhnewgp, Convert__u31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12123 | | { 507 /* memh */, Hexagon::S2_storerf_io, Convert__Reg1_2__s31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12124 | | { 507 /* memh */, Hexagon::S2_storerhnew_io, Convert__Reg1_2__s31_1Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s31_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12125 | | { 507 /* memh */, Hexagon::L4_iadd_memoph_io, Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12126 | | { 507 /* memh */, Hexagon::L4_isub_memoph_io, Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12127 | | { 507 /* memh */, Hexagon::S2_storerf_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12128 | | { 507 /* memh */, Hexagon::S2_storerhnew_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12129 | | { 507 /* memh */, Hexagon::S2_storerh_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12130 | | { 507 /* memh */, Hexagon::S4_storerf_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12131 | | { 507 /* memh */, Hexagon::S4_storerhnew_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12132 | | { 507 /* memh */, Hexagon::S2_storerf_pi, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12133 | | { 507 /* memh */, Hexagon::S2_storerhnew_pi, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_9, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12134 | | { 507 /* memh */, Hexagon::S4_storerh_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12135 | | { 507 /* memh */, Hexagon::L4_iand_memoph_io, Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12136 | | { 507 /* memh */, Hexagon::L4_ior_memoph_io, Convert__Reg1_2__u31_1Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u31_1Imm, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12137 | | { 507 /* memh */, Hexagon::S2_storerf_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12138 | | { 507 /* memh */, Hexagon::S2_storerhnew_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12139 | | { 507 /* memh */, Hexagon::S4_storerh_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12140 | | { 507 /* memh */, Hexagon::S2_storerh_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12141 | | { 507 /* memh */, Hexagon::S4_storerf_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12142 | | { 507 /* memh */, Hexagon::S4_storerhnew_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12143 | | { 507 /* memh */, Hexagon::S2_storerh_pci, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12144 | | { 507 /* memh */, Hexagon::S4_storerf_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12145 | | { 507 /* memh */, Hexagon::S4_storerhnew_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12146 | | { 507 /* memh */, Hexagon::S2_storerf_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12147 | | { 507 /* memh */, Hexagon::S2_storerhnew_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12148 | | { 507 /* memh */, Hexagon::S2_storerf_pci, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_h }, }, |
12149 | | { 507 /* memh */, Hexagon::S2_storerhnew_pci, Convert__Reg1_2__Tie0_0_0__s4_1Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memh, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_1Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12150 | | { 512 /* memw */, Hexagon::S2_storeri_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12151 | | { 512 /* memw */, Hexagon::PS_storeriabs, Convert__u30_2Imm1_3__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12152 | | { 512 /* memw */, Hexagon::L4_and_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
12153 | | { 512 /* memw */, Hexagon::L4_add_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
12154 | | { 512 /* memw */, Hexagon::L4_sub_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
12155 | | { 512 /* memw */, Hexagon::S4_storeiri_io, Convert__Reg1_2__imm_95_0__s32_0Imm1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
12156 | | { 512 /* memw */, Hexagon::L4_or_memopw_io, Convert__Reg1_2__imm_95_0__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
12157 | | { 512 /* memw */, Hexagon::L4_iadd_memopw_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12158 | | { 512 /* memw */, Hexagon::L4_isub_memopw_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_7, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12159 | | { 512 /* memw */, Hexagon::S2_storerinew_io, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12160 | | { 512 /* memw */, Hexagon::PS_storerinewabs, Convert__u30_2Imm1_3__Reg1_6, AMFBS_None, { MCK_memw, MCK__40_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12161 | | { 512 /* memw */, Hexagon::S2_storerigp, Convert__u30_2Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12162 | | { 512 /* memw */, Hexagon::S2_storeri_io, Convert__Reg1_2__s30_2Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12163 | | { 512 /* memw */, Hexagon::S2_storeri_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12164 | | { 512 /* memw */, Hexagon::S4_storeri_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12165 | | { 512 /* memw */, Hexagon::L4_iand_memopw_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12166 | | { 512 /* memw */, Hexagon::L4_ior_memopw_io, Convert__Reg1_2__imm_95_0__u5_0Imm1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12167 | | { 512 /* memw */, Hexagon::L4_and_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__38_, MCK__61_, MCK_IntRegs }, }, |
12168 | | { 512 /* memw */, Hexagon::L4_add_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__43_, MCK__61_, MCK_IntRegs }, }, |
12169 | | { 512 /* memw */, Hexagon::L4_sub_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK_IntRegs }, }, |
12170 | | { 512 /* memw */, Hexagon::L4_or_memopw_io, Convert__Reg1_2__u30_2Imm1_5__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__124_, MCK__61_, MCK_IntRegs }, }, |
12171 | | { 512 /* memw */, Hexagon::S4_storeiri_io, Convert__Reg1_2__u6_2Imm1_5__s32_0Imm1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u6_2Imm, MCK__41_, MCK__61_, MCK__HASH_, MCK_s32_0Imm }, }, |
12172 | | { 512 /* memw */, Hexagon::S2_storeri_pi, Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12173 | | { 512 /* memw */, Hexagon::S2_storerinewgp, Convert__u30_2Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_GP, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12174 | | { 512 /* memw */, Hexagon::S2_storerinew_io, Convert__Reg1_2__s30_2Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s30_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12175 | | { 512 /* memw */, Hexagon::L4_iadd_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__43_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12176 | | { 512 /* memw */, Hexagon::L4_isub_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_10, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__MINUS_, MCK__61_, MCK__HASH_, MCK_u5_0Imm }, }, |
12177 | | { 512 /* memw */, Hexagon::S2_storerinew_pr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12178 | | { 512 /* memw */, Hexagon::S2_storeri_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12179 | | { 512 /* memw */, Hexagon::S4_storerinew_ap, Convert__Reg1_2__u32_0Imm1_5__Reg1_8, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__61_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12180 | | { 512 /* memw */, Hexagon::S2_storerinew_pi, Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_9, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12181 | | { 512 /* memw */, Hexagon::S4_storeri_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12182 | | { 512 /* memw */, Hexagon::L4_iand_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_clrbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12183 | | { 512 /* memw */, Hexagon::L4_ior_memopw_io, Convert__Reg1_2__u30_2Imm1_5__u5_0Imm1_11, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_u30_2Imm, MCK__41_, MCK__61_, MCK_setbit, MCK__40_, MCK__HASH_, MCK_u5_0Imm, MCK__41_ }, }, |
12184 | | { 512 /* memw */, Hexagon::S2_storerinew_pbr, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__COLON_, MCK_brev, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12185 | | { 512 /* memw */, Hexagon::S4_storeri_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12186 | | { 512 /* memw */, Hexagon::S2_storeri_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12187 | | { 512 /* memw */, Hexagon::S4_storerinew_rr, Convert__Reg1_2__Reg1_4__u2_0Imm1_8__Reg1_11, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12188 | | { 512 /* memw */, Hexagon::S2_storeri_pci, Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12189 | | { 512 /* memw */, Hexagon::S4_storerinew_ur, Convert__Reg1_2__u2_0Imm1_6__u32_0Imm1_9__Reg1_12, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__LT_, MCK__LT_, MCK__HASH_, MCK_u2_0Imm, MCK__43_, MCK__HASH_, MCK_u32_0Imm, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12190 | | { 512 /* memw */, Hexagon::S2_storerinew_pcr, Convert__Reg1_2__Tie0_0_0__Reg1_9__Reg1_13, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_I, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12191 | | { 512 /* memw */, Hexagon::S2_storerinew_pci, Convert__Reg1_2__Tie0_0_0__s4_2Imm1_6__Reg1_10__Reg1_14, AMFBS_None, { MCK_memw, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s4_2Imm, MCK__COLON_, MCK_circ, MCK__40_, MCK_ModRegs, MCK__41_, MCK__41_, MCK__61_, MCK_IntRegs, MCK__DOT_, MCK_new }, }, |
12192 | | { 517 /* memw_locked */, Hexagon::S2_storew_locked, Convert__Reg1_3__Reg1_2__Reg1_6, AMFBS_None, { MCK_memw_95_locked, MCK__40_, MCK_IntRegs, MCK_PredRegs, MCK__41_, MCK__61_, MCK_IntRegs }, }, |
12193 | | { 529 /* memw_rl */, Hexagon::S2_storew_rl_at_vi, Convert__Reg1_2__Reg1_7, AMFBS_HasV68, { MCK_memw_95_rl, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_at, MCK__61_, MCK_IntRegs }, }, |
12194 | | { 529 /* memw_rl */, Hexagon::S2_storew_rl_st_vi, Convert__Reg1_2__Reg1_7, AMFBS_HasV68, { MCK_memw_95_rl, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_st, MCK__61_, MCK_IntRegs }, }, |
12195 | | { 537 /* nmi */, Hexagon::Y4_nmi, Convert__Reg1_2, AMFBS_None, { MCK_nmi, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12196 | | { 541 /* nop */, Hexagon::A2_nop, Convert_NoOperands, AMFBS_None, { MCK_nop }, }, |
12197 | | { 545 /* p0 */, Hexagon::J4_tstbit0_tp0_jump_nt, Convert__Reg1_4__b30_2Imm1_18, AMFBS_None, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12198 | | { 545 /* p0 */, Hexagon::J4_tstbit0_tp0_jump_t, Convert__Reg1_4__b30_2Imm1_18, AMFBS_None, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12199 | | { 545 /* p0 */, Hexagon::J4_cmpeq_tp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12200 | | { 545 /* p0 */, Hexagon::J4_cmpeq_tp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12201 | | { 545 /* p0 */, Hexagon::J4_cmpgt_tp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12202 | | { 545 /* p0 */, Hexagon::J4_cmpgt_tp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12203 | | { 545 /* p0 */, Hexagon::J4_cmpgtu_tp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12204 | | { 545 /* p0 */, Hexagon::J4_cmpgtu_tp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12205 | | { 545 /* p0 */, Hexagon::J4_tstbit0_fp0_jump_nt, Convert__Reg1_4__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12206 | | { 545 /* p0 */, Hexagon::J4_tstbit0_fp0_jump_t, Convert__Reg1_4__b30_2Imm1_19, AMFBS_None, { MCK_P0, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12207 | | { 545 /* p0 */, Hexagon::J4_cmpeqn1_tp0_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12208 | | { 545 /* p0 */, Hexagon::J4_cmpeqn1_tp0_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12209 | | { 545 /* p0 */, Hexagon::J4_cmpeqi_tp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12210 | | { 545 /* p0 */, Hexagon::J4_cmpeqi_tp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12211 | | { 545 /* p0 */, Hexagon::J4_cmpeq_fp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12212 | | { 545 /* p0 */, Hexagon::J4_cmpeq_fp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12213 | | { 545 /* p0 */, Hexagon::J4_cmpgtn1_tp0_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12214 | | { 545 /* p0 */, Hexagon::J4_cmpgtn1_tp0_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12215 | | { 545 /* p0 */, Hexagon::J4_cmpgti_tp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12216 | | { 545 /* p0 */, Hexagon::J4_cmpgti_tp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12217 | | { 545 /* p0 */, Hexagon::J4_cmpgt_fp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12218 | | { 545 /* p0 */, Hexagon::J4_cmpgt_fp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12219 | | { 545 /* p0 */, Hexagon::J4_cmpgtui_tp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12220 | | { 545 /* p0 */, Hexagon::J4_cmpgtui_tp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12221 | | { 545 /* p0 */, Hexagon::J4_cmpgtu_fp0_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12222 | | { 545 /* p0 */, Hexagon::J4_cmpgtu_fp0_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12223 | | { 545 /* p0 */, Hexagon::J4_cmpeqn1_fp0_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12224 | | { 545 /* p0 */, Hexagon::J4_cmpeqn1_fp0_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12225 | | { 545 /* p0 */, Hexagon::J4_cmpeqi_fp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12226 | | { 545 /* p0 */, Hexagon::J4_cmpeqi_fp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12227 | | { 545 /* p0 */, Hexagon::J4_cmpgtn1_fp0_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12228 | | { 545 /* p0 */, Hexagon::J4_cmpgtn1_fp0_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12229 | | { 545 /* p0 */, Hexagon::J4_cmpgti_fp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12230 | | { 545 /* p0 */, Hexagon::J4_cmpgti_fp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12231 | | { 545 /* p0 */, Hexagon::J4_cmpgtui_fp0_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12232 | | { 545 /* p0 */, Hexagon::J4_cmpgtui_fp0_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P0, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P0, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12233 | | { 548 /* p1 */, Hexagon::J4_tstbit0_tp1_jump_nt, Convert__Reg1_4__b30_2Imm1_18, AMFBS_None, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12234 | | { 548 /* p1 */, Hexagon::J4_tstbit0_tp1_jump_t, Convert__Reg1_4__b30_2Imm1_18, AMFBS_None, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12235 | | { 548 /* p1 */, Hexagon::J4_cmpeq_tp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12236 | | { 548 /* p1 */, Hexagon::J4_cmpeq_tp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12237 | | { 548 /* p1 */, Hexagon::J4_cmpgt_tp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12238 | | { 548 /* p1 */, Hexagon::J4_cmpgt_tp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12239 | | { 548 /* p1 */, Hexagon::J4_cmpgtu_tp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12240 | | { 548 /* p1 */, Hexagon::J4_cmpgtu_tp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12241 | | { 548 /* p1 */, Hexagon::J4_tstbit0_fp1_jump_nt, Convert__Reg1_4__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12242 | | { 548 /* p1 */, Hexagon::J4_tstbit0_fp1_jump_t, Convert__Reg1_4__b30_2Imm1_19, AMFBS_None, { MCK_P1, MCK__61_, MCK_tstbit, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_0, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12243 | | { 548 /* p1 */, Hexagon::J4_cmpeqn1_tp1_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12244 | | { 548 /* p1 */, Hexagon::J4_cmpeqn1_tp1_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12245 | | { 548 /* p1 */, Hexagon::J4_cmpeqi_tp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12246 | | { 548 /* p1 */, Hexagon::J4_cmpeqi_tp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12247 | | { 548 /* p1 */, Hexagon::J4_cmpeq_fp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12248 | | { 548 /* p1 */, Hexagon::J4_cmpeq_fp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12249 | | { 548 /* p1 */, Hexagon::J4_cmpgtn1_tp1_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12250 | | { 548 /* p1 */, Hexagon::J4_cmpgtn1_tp1_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12251 | | { 548 /* p1 */, Hexagon::J4_cmpgti_tp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12252 | | { 548 /* p1 */, Hexagon::J4_cmpgti_tp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12253 | | { 548 /* p1 */, Hexagon::J4_cmpgt_fp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12254 | | { 548 /* p1 */, Hexagon::J4_cmpgt_fp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12255 | | { 548 /* p1 */, Hexagon::J4_cmpgtui_tp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12256 | | { 548 /* p1 */, Hexagon::J4_cmpgtui_tp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12257 | | { 548 /* p1 */, Hexagon::J4_cmpgtu_fp1_jump_nt, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12258 | | { 548 /* p1 */, Hexagon::J4_cmpgtu_fp1_jump_t, Convert__Reg1_6__Reg1_7__b30_2Imm1_20, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK_GeneralSubRegs, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12259 | | { 548 /* p1 */, Hexagon::J4_cmpeqn1_fp1_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12260 | | { 548 /* p1 */, Hexagon::J4_cmpeqn1_fp1_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12261 | | { 548 /* p1 */, Hexagon::J4_cmpeqi_fp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12262 | | { 548 /* p1 */, Hexagon::J4_cmpeqi_fp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_eq, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12263 | | { 548 /* p1 */, Hexagon::J4_cmpgtn1_fp1_jump_nt, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12264 | | { 548 /* p1 */, Hexagon::J4_cmpgtn1_fp1_jump_t, Convert__Reg1_6__n1Const1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_n1Const, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12265 | | { 548 /* p1 */, Hexagon::J4_cmpgti_fp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12266 | | { 548 /* p1 */, Hexagon::J4_cmpgti_fp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gt, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12267 | | { 548 /* p1 */, Hexagon::J4_cmpgtui_fp1_jump_nt, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_nt, MCK_b30_2Imm }, }, |
12268 | | { 548 /* p1 */, Hexagon::J4_cmpgtui_fp1_jump_t, Convert__Reg1_6__u5_0Imm1_8__b30_2Imm1_21, AMFBS_None, { MCK_P1, MCK__61_, MCK_cmp, MCK__DOT_, MCK_gtu, MCK__40_, MCK_GeneralSubRegs, MCK__HASH_, MCK_u5_0Imm, MCK__41_, MCK__59_, MCK_if, MCK__40_, MCK__EXCLAIM_, MCK_P1, MCK__DOT_, MCK_new, MCK__41_, MCK_jump, MCK__COLON_, MCK_t, MCK_b30_2Imm }, }, |
12269 | | { 551 /* p3 */, Hexagon::J2_ploop1sr, Convert__b30_2Imm1_4__Reg1_5, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp1loop0, MCK__40_, MCK_b30_2Imm, MCK_IntRegs, MCK__41_ }, }, |
12270 | | { 551 /* p3 */, Hexagon::J2_ploop2sr, Convert__b30_2Imm1_4__Reg1_5, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp2loop0, MCK__40_, MCK_b30_2Imm, MCK_IntRegs, MCK__41_ }, }, |
12271 | | { 551 /* p3 */, Hexagon::J2_ploop3sr, Convert__b30_2Imm1_4__Reg1_5, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp3loop0, MCK__40_, MCK_b30_2Imm, MCK_IntRegs, MCK__41_ }, }, |
12272 | | { 551 /* p3 */, Hexagon::J2_ploop1si, Convert__b30_2Imm1_4__u10_0Imm1_6, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp1loop0, MCK__40_, MCK_b30_2Imm, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
12273 | | { 551 /* p3 */, Hexagon::J2_ploop2si, Convert__b30_2Imm1_4__u10_0Imm1_6, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp2loop0, MCK__40_, MCK_b30_2Imm, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
12274 | | { 551 /* p3 */, Hexagon::J2_ploop3si, Convert__b30_2Imm1_4__u10_0Imm1_6, AMFBS_None, { MCK_P3, MCK__61_, MCK_sp3loop0, MCK__40_, MCK_b30_2Imm, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
12275 | | { 554 /* pause */, Hexagon::J2_pause, Convert__u10_0Imm1_3, AMFBS_None, { MCK_pause, MCK__40_, MCK__HASH_, MCK_u10_0Imm, MCK__41_ }, }, |
12276 | | { 560 /* release */, Hexagon::R6_release_at_vi, Convert__Reg1_2, AMFBS_HasV68, { MCK_release, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_at }, }, |
12277 | | { 560 /* release */, Hexagon::R6_release_st_vi, Convert__Reg1_2, AMFBS_HasV68, { MCK_release, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_st }, }, |
12278 | | { 568 /* resume */, Hexagon::Y2_resume, Convert__Reg1_2, AMFBS_None, { MCK_resume, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12279 | | { 575 /* rte */, Hexagon::J2_rte, Convert_NoOperands, AMFBS_None, { MCK_rte }, }, |
12280 | | { 579 /* setimask */, Hexagon::Y2_setimask, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_setimask, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK__41_ }, }, |
12281 | | { 588 /* setprio */, Hexagon::Y2_setprio, Convert__Reg1_2__Reg1_3, AMFBS_HasV66, { MCK_setprio, MCK__40_, MCK_PredRegs, MCK_IntRegs, MCK__41_ }, }, |
12282 | | { 596 /* siad */, Hexagon::Y4_siad, Convert__Reg1_2, AMFBS_None, { MCK_siad, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12283 | | { 601 /* start */, Hexagon::Y2_start, Convert__Reg1_2, AMFBS_None, { MCK_start, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12284 | | { 607 /* stop */, Hexagon::Y2_stop, Convert__Reg1_2, AMFBS_None, { MCK_stop, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12285 | | { 612 /* swi */, Hexagon::Y2_swi, Convert__Reg1_2, AMFBS_None, { MCK_swi, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12286 | | { 616 /* syncht */, Hexagon::Y2_syncht, Convert_NoOperands, AMFBS_None, { MCK_syncht }, }, |
12287 | | { 623 /* tlbinvasid */, Hexagon::Y5_tlbasidi, Convert__Reg1_2, AMFBS_None, { MCK_tlbinvasid, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12288 | | { 634 /* tlblock */, Hexagon::Y2_tlblock, Convert_NoOperands, AMFBS_None, { MCK_tlblock }, }, |
12289 | | { 642 /* tlbunlock */, Hexagon::Y2_tlbunlock, Convert_NoOperands, AMFBS_None, { MCK_tlbunlock }, }, |
12290 | | { 652 /* tlbw */, Hexagon::Y2_tlbw, Convert__Reg1_2__Reg1_3, AMFBS_None, { MCK_tlbw, MCK__40_, MCK_DoubleRegs, MCK_IntRegs, MCK__41_ }, }, |
12291 | | { 657 /* trace */, Hexagon::Y4_trace, Convert__Reg1_2, AMFBS_None, { MCK_trace, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12292 | | { 663 /* trap0 */, Hexagon::J2_trap0, Convert__u8_0Imm1_3, AMFBS_None, { MCK_trap0, MCK__40_, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
12293 | | { 669 /* trap1 */, Hexagon::PS_trap1, Convert__u8_0Imm1_3, AMFBS_HasPreV65, { MCK_trap1, MCK__40_, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
12294 | | { 669 /* trap1 */, Hexagon::J2_trap1, Convert__regR0__Tie0_0_0__u8_0Imm1_3, AMFBS_None, { MCK_trap1, MCK__40_, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
12295 | | { 669 /* trap1 */, Hexagon::J2_trap1, Convert__Reg1_2__Tie0_0_0__u8_0Imm1_4, AMFBS_HasV65, { MCK_trap1, MCK__40_, MCK_IntRegs, MCK__HASH_, MCK_u8_0Imm, MCK__41_ }, }, |
12296 | | { 675 /* unpause */, Hexagon::J2_unpause, Convert_NoOperands, AMFBS_HasV73, { MCK_unpause }, }, |
12297 | | { 683 /* vdeal */, Hexagon::V6_vdeal, Convert__Reg1_2__Reg1_3__Tie0_0_0__Tie1_0_0__Reg1_4, AMFBS_UseHVXV60, { MCK_vdeal, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
12298 | | { 689 /* vhist */, Hexagon::V6_vhist, Convert_NoOperands, AMFBS_UseHVXV60, { MCK_vhist }, }, |
12299 | | { 689 /* vhist */, Hexagon::V6_vhistq, Convert__Reg1_2, AMFBS_UseHVXV60, { MCK_vhist, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
12300 | | { 695 /* vmem */, Hexagon::V6_vS32b_ai, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
12301 | | { 695 /* vmem */, Hexagon::V6_vS32b_nt_ai, Convert__Reg1_2__imm_95_0__Reg1_7, AMFBS_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
12302 | | { 695 /* vmem */, Hexagon::V6_vS32b_new_ai, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
12303 | | { 695 /* vmem */, Hexagon::V6_vS32b_srls_ai, Convert__Reg1_2__s4_0Imm1_5, AMFBS_UseHVXV65, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_scatter_95_release }, }, |
12304 | | { 695 /* vmem */, Hexagon::V6_vS32b_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
12305 | | { 695 /* vmem */, Hexagon::V6_vS32b_srls_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5, AMFBS_UseHVXV65, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_scatter_95_release }, }, |
12306 | | { 695 /* vmem */, Hexagon::V6_vS32b_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
12307 | | { 695 /* vmem */, Hexagon::V6_vS32b_nt_new_ai, Convert__Reg1_2__imm_95_0__Reg1_7, AMFBS_UseHVX, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
12308 | | { 695 /* vmem */, Hexagon::V6_vS32b_srls_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6, AMFBS_UseHVXV65, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_scatter_95_release }, }, |
12309 | | { 695 /* vmem */, Hexagon::V6_vS32b_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
12310 | | { 695 /* vmem */, Hexagon::V6_vS32b_nt_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_10, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
12311 | | { 695 /* vmem */, Hexagon::V6_vS32b_new_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
12312 | | { 695 /* vmem */, Hexagon::V6_vS32b_nt_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
12313 | | { 695 /* vmem */, Hexagon::V6_vS32b_new_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
12314 | | { 695 /* vmem */, Hexagon::V6_vS32b_nt_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_11, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR }, }, |
12315 | | { 695 /* vmem */, Hexagon::V6_vS32b_new_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
12316 | | { 695 /* vmem */, Hexagon::V6_vS32b_nt_new_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_10, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
12317 | | { 695 /* vmem */, Hexagon::V6_vS32b_nt_new_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_10, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
12318 | | { 695 /* vmem */, Hexagon::V6_vS32b_nt_new_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_11, AMFBS_UseHVXV60, { MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__COLON_, MCK_nt, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_new }, }, |
12319 | | { 700 /* vmemu */, Hexagon::V6_vS32Ub_ai, Convert__Reg1_2__imm_95_0__Reg1_5, AMFBS_UseHVX, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
12320 | | { 700 /* vmemu */, Hexagon::V6_vS32Ub_ai, Convert__Reg1_2__s4_0Imm1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
12321 | | { 700 /* vmemu */, Hexagon::V6_vS32Ub_ppu, Convert__Reg1_2__Tie0_0_0__Reg1_5__Reg1_8, AMFBS_UseHVXV60, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
12322 | | { 700 /* vmemu */, Hexagon::V6_vS32Ub_pi, Convert__Reg1_2__Tie0_0_0__s3_0Imm1_6__Reg1_9, AMFBS_UseHVXV60, { MCK_vmemu, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_, MCK__61_, MCK_HvxVR }, }, |
12323 | | { 706 /* vscatter */, Hexagon::V6_vscattermhw, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_11, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_h, MCK__61_, MCK_HvxVR }, }, |
12324 | | { 706 /* vscatter */, Hexagon::V6_vscattermhw, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_9, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
12325 | | { 706 /* vscatter */, Hexagon::V6_vscattermh, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_11, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__DOT_, MCK_h, MCK__61_, MCK_HvxVR }, }, |
12326 | | { 706 /* vscatter */, Hexagon::V6_vscattermh, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_9, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
12327 | | { 706 /* vscatter */, Hexagon::V6_vscattermw, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_11, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_w, MCK__61_, MCK_HvxVR }, }, |
12328 | | { 706 /* vscatter */, Hexagon::V6_vscattermw, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_9, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
12329 | | { 706 /* vscatter */, Hexagon::V6_vscattermhw_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_10, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
12330 | | { 706 /* vscatter */, Hexagon::V6_vscattermhw_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_12, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR }, }, |
12331 | | { 706 /* vscatter */, Hexagon::V6_vscattermh_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_10, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_h }, }, |
12332 | | { 706 /* vscatter */, Hexagon::V6_vscattermh_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_12, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__DOT_, MCK_h, MCK__43_, MCK__61_, MCK_HvxVR }, }, |
12333 | | { 706 /* vscatter */, Hexagon::V6_vscattermw_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_10, AMFBS_UseHVX, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__43_, MCK__61_, MCK_HvxVR, MCK__DOT_, MCK_w }, }, |
12334 | | { 706 /* vscatter */, Hexagon::V6_vscattermw_add, Convert__Reg1_2__Reg1_3__Reg1_4__Reg1_12, AMFBS_UseHVXV65, { MCK_vscatter, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_w, MCK__43_, MCK__61_, MCK_HvxVR }, }, |
12335 | | { 715 /* vshuff */, Hexagon::V6_vshuff, Convert__Reg1_2__Reg1_3__Tie0_0_0__Tie1_0_0__Reg1_4, AMFBS_UseHVXV60, { MCK_vshuff, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
12336 | | { 722 /* vtmp */, Hexagon::V6_vgathermhw, Convert__Reg1_6__Reg1_7__Reg1_8, AMFBS_UseHVXV65, { MCK_V65Regs, MCK__DOT_, MCK_h, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxWR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_h }, }, |
12337 | | { 722 /* vtmp */, Hexagon::V6_vgathermh, Convert__Reg1_6__Reg1_7__Reg1_8, AMFBS_UseHVXV65, { MCK_V65Regs, MCK__DOT_, MCK_h, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_h, MCK__41_, MCK__DOT_, MCK_h }, }, |
12338 | | { 722 /* vtmp */, Hexagon::V6_vgathermw, Convert__Reg1_6__Reg1_7__Reg1_8, AMFBS_UseHVXV65, { MCK_V65Regs, MCK__DOT_, MCK_w, MCK__61_, MCK_vgather, MCK__40_, MCK_IntRegs, MCK_ModRegs, MCK_HvxVR, MCK__DOT_, MCK_w, MCK__41_, MCK__DOT_, MCK_w }, }, |
12339 | | { 727 /* vtrans2x2 */, Hexagon::V6_vshuff, Convert__Reg1_2__Reg1_3__Tie0_2_2__Tie1_3_3__Reg1_4, AMFBS_UseHVX, { MCK_vtrans2x2, MCK__40_, MCK_HvxVR, MCK_HvxVR, MCK_IntRegs, MCK__41_ }, }, |
12340 | | { 737 /* vwhist128 */, Hexagon::V6_vwhist128, Convert_NoOperands, AMFBS_UseHVXV62, { MCK_vwhist128 }, }, |
12341 | | { 737 /* vwhist128 */, Hexagon::V6_vwhist128q, Convert__Reg1_2, AMFBS_UseHVXV62, { MCK_vwhist128, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
12342 | | { 737 /* vwhist128 */, Hexagon::V6_vwhist128m, Convert__u1_0Imm1_3, AMFBS_UseHVXV62, { MCK_vwhist128, MCK__40_, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
12343 | | { 737 /* vwhist128 */, Hexagon::V6_vwhist128qm, Convert__Reg1_2__u1_0Imm1_4, AMFBS_UseHVXV62, { MCK_vwhist128, MCK__40_, MCK_HvxQR, MCK__HASH_, MCK_u1_0Imm, MCK__41_ }, }, |
12344 | | { 747 /* vwhist256 */, Hexagon::V6_vwhist256, Convert_NoOperands, AMFBS_UseHVXV62, { MCK_vwhist256 }, }, |
12345 | | { 747 /* vwhist256 */, Hexagon::V6_vwhist256_sat, Convert_NoOperands, AMFBS_UseHVXV62, { MCK_vwhist256, MCK__COLON_, MCK_sat }, }, |
12346 | | { 747 /* vwhist256 */, Hexagon::V6_vwhist256q, Convert__Reg1_2, AMFBS_UseHVXV62, { MCK_vwhist256, MCK__40_, MCK_HvxQR, MCK__41_ }, }, |
12347 | | { 747 /* vwhist256 */, Hexagon::V6_vwhist256q_sat, Convert__Reg1_2, AMFBS_UseHVXV62, { MCK_vwhist256, MCK__40_, MCK_HvxQR, MCK__41_, MCK__COLON_, MCK_sat }, }, |
12348 | | { 757 /* wait */, Hexagon::Y2_wait, Convert__Reg1_2, AMFBS_HasV65, { MCK_wait, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12349 | | { 762 /* z */, Hexagon::V6_zLd_ai, Convert__Reg1_4__imm_95_0, AMFBS_UseHVX, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__41_ }, }, |
12350 | | { 762 /* z */, Hexagon::V6_zLd_ai, Convert__Reg1_4__s4_0Imm1_7, AMFBS_UseHVXV66_UseZReg, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__HASH_, MCK_s4_0Imm, MCK__41_ }, }, |
12351 | | { 762 /* z */, Hexagon::V6_zLd_ppu, Convert__Reg1_4__Tie0_0_0__Reg1_7, AMFBS_UseHVXV66_UseZReg, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK_ModRegs, MCK__41_ }, }, |
12352 | | { 762 /* z */, Hexagon::V6_zLd_pi, Convert__Reg1_4__Tie0_0_0__s3_0Imm1_8, AMFBS_UseHVXV66_UseZReg, { MCK_z, MCK__61_, MCK_vmem, MCK__40_, MCK_IntRegs, MCK__43_, MCK__43_, MCK__HASH_, MCK_s3_0Imm, MCK__41_ }, }, |
12353 | | }; |
12354 | | |
12355 | | #include "llvm/Support/Debug.h" |
12356 | | #include "llvm/Support/Format.h" |
12357 | | |
12358 | | unsigned HexagonAsmParser:: |
12359 | | MatchInstructionImpl(const OperandVector &Operands, |
12360 | | MCInst &Inst, |
12361 | | uint64_t &ErrorInfo, |
12362 | | FeatureBitset &MissingFeatures, |
12363 | 0 | bool matchingInlineAsm, unsigned VariantID) { |
12364 | | // Eliminate obvious mismatches. |
12365 | 0 | if (Operands.size() > 24) { |
12366 | 0 | ErrorInfo = 24; |
12367 | 0 | return Match_InvalidOperand; |
12368 | 0 | } |
12369 | | |
12370 | | // Get the current feature set. |
12371 | 0 | const FeatureBitset &AvailableFeatures = getAvailableFeatures(); |
12372 | | |
12373 | | // Get the instruction mnemonic, which is the first token. |
12374 | 0 | StringRef Mnemonic; |
12375 | 0 | if (Operands[0]->isToken()) |
12376 | 0 | Mnemonic = ((HexagonOperand &)*Operands[0]).getToken(); |
12377 | | |
12378 | | // Some state to try to produce better error messages. |
12379 | 0 | bool HadMatchOtherThanFeatures = false; |
12380 | 0 | bool HadMatchOtherThanPredicate = false; |
12381 | 0 | unsigned RetCode = Match_InvalidOperand; |
12382 | 0 | MissingFeatures.set(); |
12383 | | // Set ErrorInfo to the operand that mismatches if it is |
12384 | | // wrong for all instances of the instruction. |
12385 | 0 | ErrorInfo = ~0ULL; |
12386 | | // Find the appropriate table for this asm variant. |
12387 | 0 | const MatchEntry *Start, *End; |
12388 | 0 | switch (VariantID) { |
12389 | 0 | default: llvm_unreachable("invalid variant!"); |
12390 | 0 | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
12391 | 0 | } |
12392 | | // Search the table. |
12393 | 0 | auto MnemonicRange = std::make_pair(Start, End); |
12394 | 0 | unsigned SIndex = Mnemonic.empty() ? 0 : 1; |
12395 | 0 | if (!Mnemonic.empty()) |
12396 | 0 | MnemonicRange = std::equal_range(Start, End, Mnemonic.lower(), LessOpcode()); |
12397 | |
|
12398 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " << |
12399 | 0 | std::distance(MnemonicRange.first, MnemonicRange.second) << |
12400 | 0 | " encodings with mnemonic '" << Mnemonic << "'\n"); |
12401 | | |
12402 | | // Return a more specific error code if no mnemonics match. |
12403 | 0 | if (MnemonicRange.first == MnemonicRange.second) |
12404 | 0 | return Match_MnemonicFail; |
12405 | | |
12406 | 0 | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
12407 | 0 | it != ie; ++it) { |
12408 | 0 | const FeatureBitset &RequiredFeatures = FeatureBitsets[it->RequiredFeaturesIdx]; |
12409 | 0 | bool HasRequiredFeatures = |
12410 | 0 | (AvailableFeatures & RequiredFeatures) == RequiredFeatures; |
12411 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode " |
12412 | 0 | << MII.getName(it->Opcode) << "\n"); |
12413 | 0 | bool OperandsValid = true; |
12414 | 0 | for (unsigned FormalIdx = SIndex, ActualIdx = SIndex; FormalIdx != 24; ++FormalIdx) { |
12415 | 0 | auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]); |
12416 | 0 | DEBUG_WITH_TYPE("asm-matcher", |
12417 | 0 | dbgs() << " Matching formal operand class " << getMatchClassName(Formal) |
12418 | 0 | << " against actual operand at index " << ActualIdx); |
12419 | 0 | if (ActualIdx < Operands.size()) |
12420 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << " ("; |
12421 | 0 | Operands[ActualIdx]->print(dbgs()); dbgs() << "): "); |
12422 | 0 | else |
12423 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": "); |
12424 | 0 | if (ActualIdx >= Operands.size()) { |
12425 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range\n"); |
12426 | 0 | if (Formal == InvalidMatchClass) { |
12427 | 0 | break; |
12428 | 0 | } |
12429 | 0 | if (isSubclass(Formal, OptionalMatchClass)) { |
12430 | 0 | continue; |
12431 | 0 | } |
12432 | 0 | OperandsValid = false; |
12433 | 0 | ErrorInfo = ActualIdx; |
12434 | 0 | break; |
12435 | 0 | } |
12436 | 0 | MCParsedAsmOperand &Actual = *Operands[ActualIdx]; |
12437 | 0 | unsigned Diag = validateOperandClass(Actual, Formal); |
12438 | 0 | if (Diag == Match_Success) { |
12439 | 0 | DEBUG_WITH_TYPE("asm-matcher", |
12440 | 0 | dbgs() << "match success using generic matcher\n"); |
12441 | 0 | ++ActualIdx; |
12442 | 0 | continue; |
12443 | 0 | } |
12444 | | // If the generic handler indicates an invalid operand |
12445 | | // failure, check for a special case. |
12446 | 0 | if (Diag != Match_Success) { |
12447 | 0 | unsigned TargetDiag = validateTargetOperandClass(Actual, Formal); |
12448 | 0 | if (TargetDiag == Match_Success) { |
12449 | 0 | DEBUG_WITH_TYPE("asm-matcher", |
12450 | 0 | dbgs() << "match success using target matcher\n"); |
12451 | 0 | ++ActualIdx; |
12452 | 0 | continue; |
12453 | 0 | } |
12454 | | // If the target matcher returned a specific error code use |
12455 | | // that, else use the one from the generic matcher. |
12456 | 0 | if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures) |
12457 | 0 | Diag = TargetDiag; |
12458 | 0 | } |
12459 | | // If current formal operand wasn't matched and it is optional |
12460 | | // then try to match next formal operand |
12461 | 0 | if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) { |
12462 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n"); |
12463 | 0 | continue; |
12464 | 0 | } |
12465 | | // If this operand is broken for all of the instances of this |
12466 | | // mnemonic, keep track of it so we can report loc info. |
12467 | | // If we already had a match that only failed due to a |
12468 | | // target predicate, that diagnostic is preferred. |
12469 | 0 | if (!HadMatchOtherThanPredicate && |
12470 | 0 | (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) { |
12471 | 0 | if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand)) |
12472 | 0 | RetCode = Diag; |
12473 | 0 | ErrorInfo = ActualIdx; |
12474 | 0 | } |
12475 | | // Otherwise, just reject this instance of the mnemonic. |
12476 | 0 | OperandsValid = false; |
12477 | 0 | break; |
12478 | 0 | } |
12479 | |
|
12480 | 0 | if (!OperandsValid) { |
12481 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple " |
12482 | 0 | "operand mismatches, ignoring " |
12483 | 0 | "this opcode\n"); |
12484 | 0 | continue; |
12485 | 0 | } |
12486 | 0 | if (!HasRequiredFeatures) { |
12487 | 0 | HadMatchOtherThanFeatures = true; |
12488 | 0 | FeatureBitset NewMissingFeatures = RequiredFeatures & ~AvailableFeatures; |
12489 | 0 | DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features:"; |
12490 | 0 | for (unsigned I = 0, E = NewMissingFeatures.size(); I != E; ++I) |
12491 | 0 | if (NewMissingFeatures[I]) |
12492 | 0 | dbgs() << ' ' << I; |
12493 | 0 | dbgs() << "\n"); |
12494 | 0 | if (NewMissingFeatures.count() <= |
12495 | 0 | MissingFeatures.count()) |
12496 | 0 | MissingFeatures = NewMissingFeatures; |
12497 | 0 | continue; |
12498 | 0 | } |
12499 | | |
12500 | 0 | Inst.clear(); |
12501 | |
|
12502 | 0 | Inst.setOpcode(it->Opcode); |
12503 | | // We have a potential match but have not rendered the operands. |
12504 | | // Check the target predicate to handle any context sensitive |
12505 | | // constraints. |
12506 | | // For example, Ties that are referenced multiple times must be |
12507 | | // checked here to ensure the input is the same for each match |
12508 | | // constraints. If we leave it any later the ties will have been |
12509 | | // canonicalized |
12510 | 0 | unsigned MatchResult; |
12511 | 0 | if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) { |
12512 | 0 | Inst.clear(); |
12513 | 0 | DEBUG_WITH_TYPE( |
12514 | 0 | "asm-matcher", |
12515 | 0 | dbgs() << "Early target match predicate failed with diag code " |
12516 | 0 | << MatchResult << "\n"); |
12517 | 0 | RetCode = MatchResult; |
12518 | 0 | HadMatchOtherThanPredicate = true; |
12519 | 0 | continue; |
12520 | 0 | } |
12521 | | |
12522 | 0 | if (matchingInlineAsm) { |
12523 | 0 | convertToMapAndConstraints(it->ConvertFn, Operands); |
12524 | 0 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo)) |
12525 | 0 | return Match_InvalidTiedOperand; |
12526 | | |
12527 | 0 | return Match_Success; |
12528 | 0 | } |
12529 | | |
12530 | | // We have selected a definite instruction, convert the parsed |
12531 | | // operands into the appropriate MCInst. |
12532 | 0 | convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands); |
12533 | | |
12534 | | // We have a potential match. Check the target predicate to |
12535 | | // handle any context sensitive constraints. |
12536 | 0 | if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) { |
12537 | 0 | DEBUG_WITH_TYPE("asm-matcher", |
12538 | 0 | dbgs() << "Target match predicate failed with diag code " |
12539 | 0 | << MatchResult << "\n"); |
12540 | 0 | Inst.clear(); |
12541 | 0 | RetCode = MatchResult; |
12542 | 0 | HadMatchOtherThanPredicate = true; |
12543 | 0 | continue; |
12544 | 0 | } |
12545 | | |
12546 | 0 | if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo)) |
12547 | 0 | return Match_InvalidTiedOperand; |
12548 | | |
12549 | 0 | DEBUG_WITH_TYPE( |
12550 | 0 | "asm-matcher", |
12551 | 0 | dbgs() << "Opcode result: complete match, selecting this opcode\n"); |
12552 | 0 | return Match_Success; |
12553 | 0 | } |
12554 | | |
12555 | | // Okay, we had no match. Try to return a useful error code. |
12556 | 0 | if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures) |
12557 | 0 | return RetCode; |
12558 | | |
12559 | 0 | ErrorInfo = 0; |
12560 | 0 | return Match_MissingFeature; |
12561 | 0 | } |
12562 | | |
12563 | | #endif // GET_MATCHER_IMPLEMENTATION |
12564 | | |
12565 | | |
12566 | | #ifdef GET_MNEMONIC_SPELL_CHECKER |
12567 | | #undef GET_MNEMONIC_SPELL_CHECKER |
12568 | | |
12569 | | static std::string HexagonMnemonicSpellCheck(StringRef S, const FeatureBitset &FBS, unsigned VariantID) { |
12570 | | const unsigned MaxEditDist = 2; |
12571 | | std::vector<StringRef> Candidates; |
12572 | | StringRef Prev = ""; |
12573 | | |
12574 | | // Find the appropriate table for this asm variant. |
12575 | | const MatchEntry *Start, *End; |
12576 | | switch (VariantID) { |
12577 | | default: llvm_unreachable("invalid variant!"); |
12578 | | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
12579 | | } |
12580 | | |
12581 | | for (auto I = Start; I < End; I++) { |
12582 | | // Ignore unsupported instructions. |
12583 | | const FeatureBitset &RequiredFeatures = FeatureBitsets[I->RequiredFeaturesIdx]; |
12584 | | if ((FBS & RequiredFeatures) != RequiredFeatures) |
12585 | | continue; |
12586 | | |
12587 | | StringRef T = I->getMnemonic(); |
12588 | | // Avoid recomputing the edit distance for the same string. |
12589 | | if (T.equals(Prev)) |
12590 | | continue; |
12591 | | |
12592 | | Prev = T; |
12593 | | unsigned Dist = S.edit_distance(T, false, MaxEditDist); |
12594 | | if (Dist <= MaxEditDist) |
12595 | | Candidates.push_back(T); |
12596 | | } |
12597 | | |
12598 | | if (Candidates.empty()) |
12599 | | return ""; |
12600 | | |
12601 | | std::string Res = ", did you mean: "; |
12602 | | unsigned i = 0; |
12603 | | for (; i < Candidates.size() - 1; i++) |
12604 | | Res += Candidates[i].str() + ", "; |
12605 | | return Res + Candidates[i].str() + "?"; |
12606 | | } |
12607 | | |
12608 | | #endif // GET_MNEMONIC_SPELL_CHECKER |
12609 | | |
12610 | | |
12611 | | #ifdef GET_MNEMONIC_CHECKER |
12612 | | #undef GET_MNEMONIC_CHECKER |
12613 | | |
12614 | | static bool HexagonCheckMnemonic(StringRef Mnemonic, |
12615 | | const FeatureBitset &AvailableFeatures, |
12616 | | unsigned VariantID) { |
12617 | | // Find the appropriate table for this asm variant. |
12618 | | const MatchEntry *Start, *End; |
12619 | | switch (VariantID) { |
12620 | | default: llvm_unreachable("invalid variant!"); |
12621 | | case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break; |
12622 | | } |
12623 | | |
12624 | | // Search the table. |
12625 | | auto MnemonicRange = std::make_pair(Start, End); |
12626 | | unsigned SIndex = Mnemonic.empty() ? 0 : 1; |
12627 | | if (!Mnemonic.empty()) |
12628 | | MnemonicRange = std::equal_range(Start, End, Mnemonic.lower(), LessOpcode()); |
12629 | | |
12630 | | if (MnemonicRange.first == MnemonicRange.second) |
12631 | | return false; |
12632 | | |
12633 | | for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second; |
12634 | | it != ie; ++it) { |
12635 | | const FeatureBitset &RequiredFeatures = |
12636 | | FeatureBitsets[it->RequiredFeaturesIdx]; |
12637 | | if ((AvailableFeatures & RequiredFeatures) == RequiredFeatures) |
12638 | | return true; |
12639 | | } |
12640 | | return false; |
12641 | | } |
12642 | | |
12643 | | #endif // GET_MNEMONIC_CHECKER |
12644 | | |