Coverage Report

Created: 2024-01-17 10:31

/src/build/lib/Target/Hexagon/HexagonGenInstrInfo.inc
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1
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2
|*                                                                            *|
3
|* Target Instruction Enum Values and Descriptors                             *|
4
|*                                                                            *|
5
|* Automatically generated file, do not edit!                                 *|
6
|*                                                                            *|
7
\*===----------------------------------------------------------------------===*/
8
9
#ifdef GET_INSTRINFO_ENUM
10
#undef GET_INSTRINFO_ENUM
11
namespace llvm {
12
13
namespace Hexagon {
14
  enum {
15
    PHI = 0,
16
    INLINEASM = 1,
17
    INLINEASM_BR  = 2,
18
    CFI_INSTRUCTION = 3,
19
    EH_LABEL  = 4,
20
    GC_LABEL  = 5,
21
    ANNOTATION_LABEL  = 6,
22
    KILL  = 7,
23
    EXTRACT_SUBREG  = 8,
24
    INSERT_SUBREG = 9,
25
    IMPLICIT_DEF  = 10,
26
    SUBREG_TO_REG = 11,
27
    COPY_TO_REGCLASS  = 12,
28
    DBG_VALUE = 13,
29
    DBG_VALUE_LIST  = 14,
30
    DBG_INSTR_REF = 15,
31
    DBG_PHI = 16,
32
    DBG_LABEL = 17,
33
    REG_SEQUENCE  = 18,
34
    COPY  = 19,
35
    BUNDLE  = 20,
36
    LIFETIME_START  = 21,
37
    LIFETIME_END  = 22,
38
    PSEUDO_PROBE  = 23,
39
    ARITH_FENCE = 24,
40
    STACKMAP  = 25,
41
    FENTRY_CALL = 26,
42
    PATCHPOINT  = 27,
43
    LOAD_STACK_GUARD  = 28,
44
    PREALLOCATED_SETUP  = 29,
45
    PREALLOCATED_ARG  = 30,
46
    STATEPOINT  = 31,
47
    LOCAL_ESCAPE  = 32,
48
    FAULTING_OP = 33,
49
    PATCHABLE_OP  = 34,
50
    PATCHABLE_FUNCTION_ENTER  = 35,
51
    PATCHABLE_RET = 36,
52
    PATCHABLE_FUNCTION_EXIT = 37,
53
    PATCHABLE_TAIL_CALL = 38,
54
    PATCHABLE_EVENT_CALL  = 39,
55
    PATCHABLE_TYPED_EVENT_CALL  = 40,
56
    ICALL_BRANCH_FUNNEL = 41,
57
    MEMBARRIER  = 42,
58
    JUMP_TABLE_DEBUG_INFO = 43,
59
    G_ASSERT_SEXT = 44,
60
    G_ASSERT_ZEXT = 45,
61
    G_ASSERT_ALIGN  = 46,
62
    G_ADD = 47,
63
    G_SUB = 48,
64
    G_MUL = 49,
65
    G_SDIV  = 50,
66
    G_UDIV  = 51,
67
    G_SREM  = 52,
68
    G_UREM  = 53,
69
    G_SDIVREM = 54,
70
    G_UDIVREM = 55,
71
    G_AND = 56,
72
    G_OR  = 57,
73
    G_XOR = 58,
74
    G_IMPLICIT_DEF  = 59,
75
    G_PHI = 60,
76
    G_FRAME_INDEX = 61,
77
    G_GLOBAL_VALUE  = 62,
78
    G_CONSTANT_POOL = 63,
79
    G_EXTRACT = 64,
80
    G_UNMERGE_VALUES  = 65,
81
    G_INSERT  = 66,
82
    G_MERGE_VALUES  = 67,
83
    G_BUILD_VECTOR  = 68,
84
    G_BUILD_VECTOR_TRUNC  = 69,
85
    G_CONCAT_VECTORS  = 70,
86
    G_PTRTOINT  = 71,
87
    G_INTTOPTR  = 72,
88
    G_BITCAST = 73,
89
    G_FREEZE  = 74,
90
    G_CONSTANT_FOLD_BARRIER = 75,
91
    G_INTRINSIC_FPTRUNC_ROUND = 76,
92
    G_INTRINSIC_TRUNC = 77,
93
    G_INTRINSIC_ROUND = 78,
94
    G_INTRINSIC_LRINT = 79,
95
    G_INTRINSIC_ROUNDEVEN = 80,
96
    G_READCYCLECOUNTER  = 81,
97
    G_LOAD  = 82,
98
    G_SEXTLOAD  = 83,
99
    G_ZEXTLOAD  = 84,
100
    G_INDEXED_LOAD  = 85,
101
    G_INDEXED_SEXTLOAD  = 86,
102
    G_INDEXED_ZEXTLOAD  = 87,
103
    G_STORE = 88,
104
    G_INDEXED_STORE = 89,
105
    G_ATOMIC_CMPXCHG_WITH_SUCCESS = 90,
106
    G_ATOMIC_CMPXCHG  = 91,
107
    G_ATOMICRMW_XCHG  = 92,
108
    G_ATOMICRMW_ADD = 93,
109
    G_ATOMICRMW_SUB = 94,
110
    G_ATOMICRMW_AND = 95,
111
    G_ATOMICRMW_NAND  = 96,
112
    G_ATOMICRMW_OR  = 97,
113
    G_ATOMICRMW_XOR = 98,
114
    G_ATOMICRMW_MAX = 99,
115
    G_ATOMICRMW_MIN = 100,
116
    G_ATOMICRMW_UMAX  = 101,
117
    G_ATOMICRMW_UMIN  = 102,
118
    G_ATOMICRMW_FADD  = 103,
119
    G_ATOMICRMW_FSUB  = 104,
120
    G_ATOMICRMW_FMAX  = 105,
121
    G_ATOMICRMW_FMIN  = 106,
122
    G_ATOMICRMW_UINC_WRAP = 107,
123
    G_ATOMICRMW_UDEC_WRAP = 108,
124
    G_FENCE = 109,
125
    G_PREFETCH  = 110,
126
    G_BRCOND  = 111,
127
    G_BRINDIRECT  = 112,
128
    G_INVOKE_REGION_START = 113,
129
    G_INTRINSIC = 114,
130
    G_INTRINSIC_W_SIDE_EFFECTS  = 115,
131
    G_INTRINSIC_CONVERGENT  = 116,
132
    G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 117,
133
    G_ANYEXT  = 118,
134
    G_TRUNC = 119,
135
    G_CONSTANT  = 120,
136
    G_FCONSTANT = 121,
137
    G_VASTART = 122,
138
    G_VAARG = 123,
139
    G_SEXT  = 124,
140
    G_SEXT_INREG  = 125,
141
    G_ZEXT  = 126,
142
    G_SHL = 127,
143
    G_LSHR  = 128,
144
    G_ASHR  = 129,
145
    G_FSHL  = 130,
146
    G_FSHR  = 131,
147
    G_ROTR  = 132,
148
    G_ROTL  = 133,
149
    G_ICMP  = 134,
150
    G_FCMP  = 135,
151
    G_SELECT  = 136,
152
    G_UADDO = 137,
153
    G_UADDE = 138,
154
    G_USUBO = 139,
155
    G_USUBE = 140,
156
    G_SADDO = 141,
157
    G_SADDE = 142,
158
    G_SSUBO = 143,
159
    G_SSUBE = 144,
160
    G_UMULO = 145,
161
    G_SMULO = 146,
162
    G_UMULH = 147,
163
    G_SMULH = 148,
164
    G_UADDSAT = 149,
165
    G_SADDSAT = 150,
166
    G_USUBSAT = 151,
167
    G_SSUBSAT = 152,
168
    G_USHLSAT = 153,
169
    G_SSHLSAT = 154,
170
    G_SMULFIX = 155,
171
    G_UMULFIX = 156,
172
    G_SMULFIXSAT  = 157,
173
    G_UMULFIXSAT  = 158,
174
    G_SDIVFIX = 159,
175
    G_UDIVFIX = 160,
176
    G_SDIVFIXSAT  = 161,
177
    G_UDIVFIXSAT  = 162,
178
    G_FADD  = 163,
179
    G_FSUB  = 164,
180
    G_FMUL  = 165,
181
    G_FMA = 166,
182
    G_FMAD  = 167,
183
    G_FDIV  = 168,
184
    G_FREM  = 169,
185
    G_FPOW  = 170,
186
    G_FPOWI = 171,
187
    G_FEXP  = 172,
188
    G_FEXP2 = 173,
189
    G_FEXP10  = 174,
190
    G_FLOG  = 175,
191
    G_FLOG2 = 176,
192
    G_FLOG10  = 177,
193
    G_FLDEXP  = 178,
194
    G_FFREXP  = 179,
195
    G_FNEG  = 180,
196
    G_FPEXT = 181,
197
    G_FPTRUNC = 182,
198
    G_FPTOSI  = 183,
199
    G_FPTOUI  = 184,
200
    G_SITOFP  = 185,
201
    G_UITOFP  = 186,
202
    G_FABS  = 187,
203
    G_FCOPYSIGN = 188,
204
    G_IS_FPCLASS  = 189,
205
    G_FCANONICALIZE = 190,
206
    G_FMINNUM = 191,
207
    G_FMAXNUM = 192,
208
    G_FMINNUM_IEEE  = 193,
209
    G_FMAXNUM_IEEE  = 194,
210
    G_FMINIMUM  = 195,
211
    G_FMAXIMUM  = 196,
212
    G_GET_FPENV = 197,
213
    G_SET_FPENV = 198,
214
    G_RESET_FPENV = 199,
215
    G_GET_FPMODE  = 200,
216
    G_SET_FPMODE  = 201,
217
    G_RESET_FPMODE  = 202,
218
    G_PTR_ADD = 203,
219
    G_PTRMASK = 204,
220
    G_SMIN  = 205,
221
    G_SMAX  = 206,
222
    G_UMIN  = 207,
223
    G_UMAX  = 208,
224
    G_ABS = 209,
225
    G_LROUND  = 210,
226
    G_LLROUND = 211,
227
    G_BR  = 212,
228
    G_BRJT  = 213,
229
    G_INSERT_VECTOR_ELT = 214,
230
    G_EXTRACT_VECTOR_ELT  = 215,
231
    G_SHUFFLE_VECTOR  = 216,
232
    G_CTTZ  = 217,
233
    G_CTTZ_ZERO_UNDEF = 218,
234
    G_CTLZ  = 219,
235
    G_CTLZ_ZERO_UNDEF = 220,
236
    G_CTPOP = 221,
237
    G_BSWAP = 222,
238
    G_BITREVERSE  = 223,
239
    G_FCEIL = 224,
240
    G_FCOS  = 225,
241
    G_FSIN  = 226,
242
    G_FSQRT = 227,
243
    G_FFLOOR  = 228,
244
    G_FRINT = 229,
245
    G_FNEARBYINT  = 230,
246
    G_ADDRSPACE_CAST  = 231,
247
    G_BLOCK_ADDR  = 232,
248
    G_JUMP_TABLE  = 233,
249
    G_DYN_STACKALLOC  = 234,
250
    G_STACKSAVE = 235,
251
    G_STACKRESTORE  = 236,
252
    G_STRICT_FADD = 237,
253
    G_STRICT_FSUB = 238,
254
    G_STRICT_FMUL = 239,
255
    G_STRICT_FDIV = 240,
256
    G_STRICT_FREM = 241,
257
    G_STRICT_FMA  = 242,
258
    G_STRICT_FSQRT  = 243,
259
    G_STRICT_FLDEXP = 244,
260
    G_READ_REGISTER = 245,
261
    G_WRITE_REGISTER  = 246,
262
    G_MEMCPY  = 247,
263
    G_MEMCPY_INLINE = 248,
264
    G_MEMMOVE = 249,
265
    G_MEMSET  = 250,
266
    G_BZERO = 251,
267
    G_VECREDUCE_SEQ_FADD  = 252,
268
    G_VECREDUCE_SEQ_FMUL  = 253,
269
    G_VECREDUCE_FADD  = 254,
270
    G_VECREDUCE_FMUL  = 255,
271
    G_VECREDUCE_FMAX  = 256,
272
    G_VECREDUCE_FMIN  = 257,
273
    G_VECREDUCE_FMAXIMUM  = 258,
274
    G_VECREDUCE_FMINIMUM  = 259,
275
    G_VECREDUCE_ADD = 260,
276
    G_VECREDUCE_MUL = 261,
277
    G_VECREDUCE_AND = 262,
278
    G_VECREDUCE_OR  = 263,
279
    G_VECREDUCE_XOR = 264,
280
    G_VECREDUCE_SMAX  = 265,
281
    G_VECREDUCE_SMIN  = 266,
282
    G_VECREDUCE_UMAX  = 267,
283
    G_VECREDUCE_UMIN  = 268,
284
    G_SBFX  = 269,
285
    G_UBFX  = 270,
286
    A2_addsp  = 271,
287
    A2_iconst = 272,
288
    A2_neg  = 273,
289
    A2_not  = 274,
290
    A2_tfrf = 275,
291
    A2_tfrfnew  = 276,
292
    A2_tfrp = 277,
293
    A2_tfrpf  = 278,
294
    A2_tfrpfnew = 279,
295
    A2_tfrpi  = 280,
296
    A2_tfrpt  = 281,
297
    A2_tfrptnew = 282,
298
    A2_tfrt = 283,
299
    A2_tfrtnew  = 284,
300
    A2_vaddb_map  = 285,
301
    A2_vsubb_map  = 286,
302
    A2_zxtb = 287,
303
    A4_boundscheck  = 288,
304
    ADJCALLSTACKDOWN  = 289,
305
    ADJCALLSTACKUP  = 290,
306
    C2_cmpgei = 291,
307
    C2_cmpgeui  = 292,
308
    C2_cmplt  = 293,
309
    C2_cmpltu = 294,
310
    C2_pxfer_map  = 295,
311
    DUPLEX_Pseudo = 296,
312
    ENDLOOP0  = 297,
313
    ENDLOOP01 = 298,
314
    ENDLOOP1  = 299,
315
    J2_endloop0 = 300,
316
    J2_endloop01  = 301,
317
    J2_endloop1 = 302,
318
    J2_jumpf_nopred_map = 303,
319
    J2_jumprf_nopred_map  = 304,
320
    J2_jumprt_nopred_map  = 305,
321
    J2_jumpt_nopred_map = 306,
322
    J2_trap1_noregmap = 307,
323
    L2_loadalignb_zomap = 308,
324
    L2_loadalignh_zomap = 309,
325
    L2_loadbsw2_zomap = 310,
326
    L2_loadbsw4_zomap = 311,
327
    L2_loadbzw2_zomap = 312,
328
    L2_loadbzw4_zomap = 313,
329
    L2_loadrb_zomap = 314,
330
    L2_loadrd_zomap = 315,
331
    L2_loadrh_zomap = 316,
332
    L2_loadri_zomap = 317,
333
    L2_loadrub_zomap  = 318,
334
    L2_loadruh_zomap  = 319,
335
    L2_ploadrbf_zomap = 320,
336
    L2_ploadrbfnew_zomap  = 321,
337
    L2_ploadrbt_zomap = 322,
338
    L2_ploadrbtnew_zomap  = 323,
339
    L2_ploadrdf_zomap = 324,
340
    L2_ploadrdfnew_zomap  = 325,
341
    L2_ploadrdt_zomap = 326,
342
    L2_ploadrdtnew_zomap  = 327,
343
    L2_ploadrhf_zomap = 328,
344
    L2_ploadrhfnew_zomap  = 329,
345
    L2_ploadrht_zomap = 330,
346
    L2_ploadrhtnew_zomap  = 331,
347
    L2_ploadrif_zomap = 332,
348
    L2_ploadrifnew_zomap  = 333,
349
    L2_ploadrit_zomap = 334,
350
    L2_ploadritnew_zomap  = 335,
351
    L2_ploadrubf_zomap  = 336,
352
    L2_ploadrubfnew_zomap = 337,
353
    L2_ploadrubt_zomap  = 338,
354
    L2_ploadrubtnew_zomap = 339,
355
    L2_ploadruhf_zomap  = 340,
356
    L2_ploadruhfnew_zomap = 341,
357
    L2_ploadruht_zomap  = 342,
358
    L2_ploadruhtnew_zomap = 343,
359
    L4_add_memopb_zomap = 344,
360
    L4_add_memoph_zomap = 345,
361
    L4_add_memopw_zomap = 346,
362
    L4_and_memopb_zomap = 347,
363
    L4_and_memoph_zomap = 348,
364
    L4_and_memopw_zomap = 349,
365
    L4_iadd_memopb_zomap  = 350,
366
    L4_iadd_memoph_zomap  = 351,
367
    L4_iadd_memopw_zomap  = 352,
368
    L4_iand_memopb_zomap  = 353,
369
    L4_iand_memoph_zomap  = 354,
370
    L4_iand_memopw_zomap  = 355,
371
    L4_ior_memopb_zomap = 356,
372
    L4_ior_memoph_zomap = 357,
373
    L4_ior_memopw_zomap = 358,
374
    L4_isub_memopb_zomap  = 359,
375
    L4_isub_memoph_zomap  = 360,
376
    L4_isub_memopw_zomap  = 361,
377
    L4_or_memopb_zomap  = 362,
378
    L4_or_memoph_zomap  = 363,
379
    L4_or_memopw_zomap  = 364,
380
    L4_return_map_to_raw_f  = 365,
381
    L4_return_map_to_raw_fnew_pnt = 366,
382
    L4_return_map_to_raw_fnew_pt  = 367,
383
    L4_return_map_to_raw_t  = 368,
384
    L4_return_map_to_raw_tnew_pnt = 369,
385
    L4_return_map_to_raw_tnew_pt  = 370,
386
    L4_sub_memopb_zomap = 371,
387
    L4_sub_memoph_zomap = 372,
388
    L4_sub_memopw_zomap = 373,
389
    L6_deallocframe_map_to_raw  = 374,
390
    L6_return_map_to_raw  = 375,
391
    LDriw_ctr = 376,
392
    LDriw_pred  = 377,
393
    M2_mpysmi = 378,
394
    M2_mpyui  = 379,
395
    M2_vrcmpys_acc_s1 = 380,
396
    M2_vrcmpys_s1 = 381,
397
    M2_vrcmpys_s1rp = 382,
398
    M7_vdmpy  = 383,
399
    M7_vdmpy_acc  = 384,
400
    PS_aligna = 385,
401
    PS_alloca = 386,
402
    PS_call_instrprof_custom  = 387,
403
    PS_call_nr  = 388,
404
    PS_crash  = 389,
405
    PS_false  = 390,
406
    PS_fi = 391,
407
    PS_fia  = 392,
408
    PS_loadrb_pci = 393,
409
    PS_loadrb_pcr = 394,
410
    PS_loadrd_pci = 395,
411
    PS_loadrd_pcr = 396,
412
    PS_loadrh_pci = 397,
413
    PS_loadrh_pcr = 398,
414
    PS_loadri_pci = 399,
415
    PS_loadri_pcr = 400,
416
    PS_loadrub_pci  = 401,
417
    PS_loadrub_pcr  = 402,
418
    PS_loadruh_pci  = 403,
419
    PS_loadruh_pcr  = 404,
420
    PS_pselect  = 405,
421
    PS_qfalse = 406,
422
    PS_qtrue  = 407,
423
    PS_storerb_pci  = 408,
424
    PS_storerb_pcr  = 409,
425
    PS_storerd_pci  = 410,
426
    PS_storerd_pcr  = 411,
427
    PS_storerf_pci  = 412,
428
    PS_storerf_pcr  = 413,
429
    PS_storerh_pci  = 414,
430
    PS_storerh_pcr  = 415,
431
    PS_storeri_pci  = 416,
432
    PS_storeri_pcr  = 417,
433
    PS_tailcall_i = 418,
434
    PS_tailcall_r = 419,
435
    PS_true = 420,
436
    PS_vdd0 = 421,
437
    PS_vloadrq_ai = 422,
438
    PS_vloadrv_ai = 423,
439
    PS_vloadrv_nt_ai  = 424,
440
    PS_vloadrw_ai = 425,
441
    PS_vloadrw_nt_ai  = 426,
442
    PS_vmulw  = 427,
443
    PS_vmulw_acc  = 428,
444
    PS_vselect  = 429,
445
    PS_vsplatib = 430,
446
    PS_vsplatih = 431,
447
    PS_vsplatiw = 432,
448
    PS_vsplatrb = 433,
449
    PS_vsplatrh = 434,
450
    PS_vsplatrw = 435,
451
    PS_vstorerq_ai  = 436,
452
    PS_vstorerv_ai  = 437,
453
    PS_vstorerv_nt_ai = 438,
454
    PS_vstorerw_ai  = 439,
455
    PS_vstorerw_nt_ai = 440,
456
    PS_wselect  = 441,
457
    S2_asr_i_p_rnd_goodsyntax = 442,
458
    S2_asr_i_r_rnd_goodsyntax = 443,
459
    S2_pstorerbf_zomap  = 444,
460
    S2_pstorerbnewf_zomap = 445,
461
    S2_pstorerbnewt_zomap = 446,
462
    S2_pstorerbt_zomap  = 447,
463
    S2_pstorerdf_zomap  = 448,
464
    S2_pstorerdt_zomap  = 449,
465
    S2_pstorerff_zomap  = 450,
466
    S2_pstorerft_zomap  = 451,
467
    S2_pstorerhf_zomap  = 452,
468
    S2_pstorerhnewf_zomap = 453,
469
    S2_pstorerhnewt_zomap = 454,
470
    S2_pstorerht_zomap  = 455,
471
    S2_pstorerif_zomap  = 456,
472
    S2_pstorerinewf_zomap = 457,
473
    S2_pstorerinewt_zomap = 458,
474
    S2_pstorerit_zomap  = 459,
475
    S2_storerb_zomap  = 460,
476
    S2_storerbnew_zomap = 461,
477
    S2_storerd_zomap  = 462,
478
    S2_storerf_zomap  = 463,
479
    S2_storerh_zomap  = 464,
480
    S2_storerhnew_zomap = 465,
481
    S2_storeri_zomap  = 466,
482
    S2_storerinew_zomap = 467,
483
    S2_tableidxb_goodsyntax = 468,
484
    S2_tableidxd_goodsyntax = 469,
485
    S2_tableidxh_goodsyntax = 470,
486
    S2_tableidxw_goodsyntax = 471,
487
    S4_pstorerbfnew_zomap = 472,
488
    S4_pstorerbnewfnew_zomap  = 473,
489
    S4_pstorerbnewtnew_zomap  = 474,
490
    S4_pstorerbtnew_zomap = 475,
491
    S4_pstorerdfnew_zomap = 476,
492
    S4_pstorerdtnew_zomap = 477,
493
    S4_pstorerffnew_zomap = 478,
494
    S4_pstorerftnew_zomap = 479,
495
    S4_pstorerhfnew_zomap = 480,
496
    S4_pstorerhnewfnew_zomap  = 481,
497
    S4_pstorerhnewtnew_zomap  = 482,
498
    S4_pstorerhtnew_zomap = 483,
499
    S4_pstorerifnew_zomap = 484,
500
    S4_pstorerinewfnew_zomap  = 485,
501
    S4_pstorerinewtnew_zomap  = 486,
502
    S4_pstoreritnew_zomap = 487,
503
    S4_storeirb_zomap = 488,
504
    S4_storeirbf_zomap  = 489,
505
    S4_storeirbfnew_zomap = 490,
506
    S4_storeirbt_zomap  = 491,
507
    S4_storeirbtnew_zomap = 492,
508
    S4_storeirh_zomap = 493,
509
    S4_storeirhf_zomap  = 494,
510
    S4_storeirhfnew_zomap = 495,
511
    S4_storeirht_zomap  = 496,
512
    S4_storeirhtnew_zomap = 497,
513
    S4_storeiri_zomap = 498,
514
    S4_storeirif_zomap  = 499,
515
    S4_storeirifnew_zomap = 500,
516
    S4_storeirit_zomap  = 501,
517
    S4_storeiritnew_zomap = 502,
518
    S5_asrhub_rnd_sat_goodsyntax  = 503,
519
    S5_vasrhrnd_goodsyntax  = 504,
520
    S6_allocframe_to_raw  = 505,
521
    STriw_ctr = 506,
522
    STriw_pred  = 507,
523
    V6_MAP_equb = 508,
524
    V6_MAP_equb_and = 509,
525
    V6_MAP_equb_ior = 510,
526
    V6_MAP_equb_xor = 511,
527
    V6_MAP_equh = 512,
528
    V6_MAP_equh_and = 513,
529
    V6_MAP_equh_ior = 514,
530
    V6_MAP_equh_xor = 515,
531
    V6_MAP_equw = 516,
532
    V6_MAP_equw_and = 517,
533
    V6_MAP_equw_ior = 518,
534
    V6_MAP_equw_xor = 519,
535
    V6_dbl_ld0  = 520,
536
    V6_dbl_st0  = 521,
537
    V6_extractw_alt = 522,
538
    V6_hi = 523,
539
    V6_ld0  = 524,
540
    V6_ldcnp0 = 525,
541
    V6_ldcnpnt0 = 526,
542
    V6_ldcp0  = 527,
543
    V6_ldcpnt0  = 528,
544
    V6_ldnp0  = 529,
545
    V6_ldnpnt0  = 530,
546
    V6_ldnt0  = 531,
547
    V6_ldp0 = 532,
548
    V6_ldpnt0 = 533,
549
    V6_ldtnp0 = 534,
550
    V6_ldtnpnt0 = 535,
551
    V6_ldtp0  = 536,
552
    V6_ldtpnt0  = 537,
553
    V6_ldu0 = 538,
554
    V6_lo = 539,
555
    V6_st0  = 540,
556
    V6_stn0 = 541,
557
    V6_stnnt0 = 542,
558
    V6_stnp0  = 543,
559
    V6_stnpnt0  = 544,
560
    V6_stnq0  = 545,
561
    V6_stnqnt0  = 546,
562
    V6_stnt0  = 547,
563
    V6_stp0 = 548,
564
    V6_stpnt0 = 549,
565
    V6_stq0 = 550,
566
    V6_stqnt0 = 551,
567
    V6_stu0 = 552,
568
    V6_stunp0 = 553,
569
    V6_stup0  = 554,
570
    V6_v10mpyubs10  = 555,
571
    V6_v10mpyubs10_vxx  = 556,
572
    V6_v6mpyhubs10_alt  = 557,
573
    V6_v6mpyvubs10_alt  = 558,
574
    V6_vabsb_alt  = 559,
575
    V6_vabsb_sat_alt  = 560,
576
    V6_vabsdiffh_alt  = 561,
577
    V6_vabsdiffub_alt = 562,
578
    V6_vabsdiffuh_alt = 563,
579
    V6_vabsdiffw_alt  = 564,
580
    V6_vabsh_alt  = 565,
581
    V6_vabsh_sat_alt  = 566,
582
    V6_vabsub_alt = 567,
583
    V6_vabsuh_alt = 568,
584
    V6_vabsuw_alt = 569,
585
    V6_vabsw_alt  = 570,
586
    V6_vabsw_sat_alt  = 571,
587
    V6_vaddb_alt  = 572,
588
    V6_vaddb_dv_alt = 573,
589
    V6_vaddbnq_alt  = 574,
590
    V6_vaddbq_alt = 575,
591
    V6_vaddbsat_alt = 576,
592
    V6_vaddbsat_dv_alt  = 577,
593
    V6_vaddh_alt  = 578,
594
    V6_vaddh_dv_alt = 579,
595
    V6_vaddhnq_alt  = 580,
596
    V6_vaddhq_alt = 581,
597
    V6_vaddhsat_alt = 582,
598
    V6_vaddhsat_dv_alt  = 583,
599
    V6_vaddhw_acc_alt = 584,
600
    V6_vaddhw_alt = 585,
601
    V6_vaddubh_acc_alt  = 586,
602
    V6_vaddubh_alt  = 587,
603
    V6_vaddubsat_alt  = 588,
604
    V6_vaddubsat_dv_alt = 589,
605
    V6_vadduhsat_alt  = 590,
606
    V6_vadduhsat_dv_alt = 591,
607
    V6_vadduhw_acc_alt  = 592,
608
    V6_vadduhw_alt  = 593,
609
    V6_vadduwsat_alt  = 594,
610
    V6_vadduwsat_dv_alt = 595,
611
    V6_vaddw_alt  = 596,
612
    V6_vaddw_dv_alt = 597,
613
    V6_vaddwnq_alt  = 598,
614
    V6_vaddwq_alt = 599,
615
    V6_vaddwsat_alt = 600,
616
    V6_vaddwsat_dv_alt  = 601,
617
    V6_vandnqrt_acc_alt = 602,
618
    V6_vandnqrt_alt = 603,
619
    V6_vandqrt_acc_alt  = 604,
620
    V6_vandqrt_alt  = 605,
621
    V6_vandvrt_acc_alt  = 606,
622
    V6_vandvrt_alt  = 607,
623
    V6_vaslh_acc_alt  = 608,
624
    V6_vaslh_alt  = 609,
625
    V6_vaslhv_alt = 610,
626
    V6_vaslw_acc_alt  = 611,
627
    V6_vaslw_alt  = 612,
628
    V6_vaslwv_alt = 613,
629
    V6_vasr_into_alt  = 614,
630
    V6_vasrh_acc_alt  = 615,
631
    V6_vasrh_alt  = 616,
632
    V6_vasrhv_alt = 617,
633
    V6_vasrw_acc_alt  = 618,
634
    V6_vasrw_alt  = 619,
635
    V6_vasrwv_alt = 620,
636
    V6_vassignp = 621,
637
    V6_vavgb_alt  = 622,
638
    V6_vavgbrnd_alt = 623,
639
    V6_vavgh_alt  = 624,
640
    V6_vavghrnd_alt = 625,
641
    V6_vavgub_alt = 626,
642
    V6_vavgubrnd_alt  = 627,
643
    V6_vavguh_alt = 628,
644
    V6_vavguhrnd_alt  = 629,
645
    V6_vavguw_alt = 630,
646
    V6_vavguwrnd_alt  = 631,
647
    V6_vavgw_alt  = 632,
648
    V6_vavgwrnd_alt = 633,
649
    V6_vcl0h_alt  = 634,
650
    V6_vcl0w_alt  = 635,
651
    V6_vd0  = 636,
652
    V6_vdd0 = 637,
653
    V6_vdealb4w_alt = 638,
654
    V6_vdealb_alt = 639,
655
    V6_vdealh_alt = 640,
656
    V6_vdmpybus_acc_alt = 641,
657
    V6_vdmpybus_alt = 642,
658
    V6_vdmpybus_dv_acc_alt  = 643,
659
    V6_vdmpybus_dv_alt  = 644,
660
    V6_vdmpyhb_acc_alt  = 645,
661
    V6_vdmpyhb_alt  = 646,
662
    V6_vdmpyhb_dv_acc_alt = 647,
663
    V6_vdmpyhb_dv_alt = 648,
664
    V6_vdmpyhisat_acc_alt = 649,
665
    V6_vdmpyhisat_alt = 650,
666
    V6_vdmpyhsat_acc_alt  = 651,
667
    V6_vdmpyhsat_alt  = 652,
668
    V6_vdmpyhsuisat_acc_alt = 653,
669
    V6_vdmpyhsuisat_alt = 654,
670
    V6_vdmpyhsusat_acc_alt  = 655,
671
    V6_vdmpyhsusat_alt  = 656,
672
    V6_vdmpyhvsat_acc_alt = 657,
673
    V6_vdmpyhvsat_alt = 658,
674
    V6_vdsaduh_acc_alt  = 659,
675
    V6_vdsaduh_alt  = 660,
676
    V6_vgathermh_pseudo = 661,
677
    V6_vgathermhq_pseudo  = 662,
678
    V6_vgathermhw_pseudo  = 663,
679
    V6_vgathermhwq_pseudo = 664,
680
    V6_vgathermw_pseudo = 665,
681
    V6_vgathermwq_pseudo  = 666,
682
    V6_vlsrh_alt  = 667,
683
    V6_vlsrhv_alt = 668,
684
    V6_vlsrw_alt  = 669,
685
    V6_vlsrwv_alt = 670,
686
    V6_vmaxb_alt  = 671,
687
    V6_vmaxh_alt  = 672,
688
    V6_vmaxub_alt = 673,
689
    V6_vmaxuh_alt = 674,
690
    V6_vmaxw_alt  = 675,
691
    V6_vminb_alt  = 676,
692
    V6_vminh_alt  = 677,
693
    V6_vminub_alt = 678,
694
    V6_vminuh_alt = 679,
695
    V6_vminw_alt  = 680,
696
    V6_vmpabus_acc_alt  = 681,
697
    V6_vmpabus_alt  = 682,
698
    V6_vmpabusv_alt = 683,
699
    V6_vmpabuu_acc_alt  = 684,
700
    V6_vmpabuu_alt  = 685,
701
    V6_vmpabuuv_alt = 686,
702
    V6_vmpahb_acc_alt = 687,
703
    V6_vmpahb_alt = 688,
704
    V6_vmpauhb_acc_alt  = 689,
705
    V6_vmpauhb_alt  = 690,
706
    V6_vmpybus_acc_alt  = 691,
707
    V6_vmpybus_alt  = 692,
708
    V6_vmpybusv_acc_alt = 693,
709
    V6_vmpybusv_alt = 694,
710
    V6_vmpybv_acc_alt = 695,
711
    V6_vmpybv_alt = 696,
712
    V6_vmpyewuh_alt = 697,
713
    V6_vmpyh_acc_alt  = 698,
714
    V6_vmpyh_alt  = 699,
715
    V6_vmpyhsat_acc_alt = 700,
716
    V6_vmpyhsrs_alt = 701,
717
    V6_vmpyhss_alt  = 702,
718
    V6_vmpyhus_acc_alt  = 703,
719
    V6_vmpyhus_alt  = 704,
720
    V6_vmpyhv_acc_alt = 705,
721
    V6_vmpyhv_alt = 706,
722
    V6_vmpyhvsrs_alt  = 707,
723
    V6_vmpyiewh_acc_alt = 708,
724
    V6_vmpyiewuh_acc_alt  = 709,
725
    V6_vmpyiewuh_alt  = 710,
726
    V6_vmpyih_acc_alt = 711,
727
    V6_vmpyih_alt = 712,
728
    V6_vmpyihb_acc_alt  = 713,
729
    V6_vmpyihb_alt  = 714,
730
    V6_vmpyiowh_alt = 715,
731
    V6_vmpyiwb_acc_alt  = 716,
732
    V6_vmpyiwb_alt  = 717,
733
    V6_vmpyiwh_acc_alt  = 718,
734
    V6_vmpyiwh_alt  = 719,
735
    V6_vmpyiwub_acc_alt = 720,
736
    V6_vmpyiwub_alt = 721,
737
    V6_vmpyowh_alt  = 722,
738
    V6_vmpyowh_rnd_alt  = 723,
739
    V6_vmpyowh_rnd_sacc_alt = 724,
740
    V6_vmpyowh_sacc_alt = 725,
741
    V6_vmpyub_acc_alt = 726,
742
    V6_vmpyub_alt = 727,
743
    V6_vmpyubv_acc_alt  = 728,
744
    V6_vmpyubv_alt  = 729,
745
    V6_vmpyuh_acc_alt = 730,
746
    V6_vmpyuh_alt = 731,
747
    V6_vmpyuhv_acc_alt  = 732,
748
    V6_vmpyuhv_alt  = 733,
749
    V6_vnavgb_alt = 734,
750
    V6_vnavgh_alt = 735,
751
    V6_vnavgub_alt  = 736,
752
    V6_vnavgw_alt = 737,
753
    V6_vnormamth_alt  = 738,
754
    V6_vnormamtw_alt  = 739,
755
    V6_vpackeb_alt  = 740,
756
    V6_vpackeh_alt  = 741,
757
    V6_vpackhb_sat_alt  = 742,
758
    V6_vpackhub_sat_alt = 743,
759
    V6_vpackob_alt  = 744,
760
    V6_vpackoh_alt  = 745,
761
    V6_vpackwh_sat_alt  = 746,
762
    V6_vpackwuh_sat_alt = 747,
763
    V6_vpopcounth_alt = 748,
764
    V6_vrmpybub_rtt_acc_alt = 749,
765
    V6_vrmpybub_rtt_alt = 750,
766
    V6_vrmpybus_acc_alt = 751,
767
    V6_vrmpybus_alt = 752,
768
    V6_vrmpybusi_acc_alt  = 753,
769
    V6_vrmpybusi_alt  = 754,
770
    V6_vrmpybusv_acc_alt  = 755,
771
    V6_vrmpybusv_alt  = 756,
772
    V6_vrmpybv_acc_alt  = 757,
773
    V6_vrmpybv_alt  = 758,
774
    V6_vrmpyub_acc_alt  = 759,
775
    V6_vrmpyub_alt  = 760,
776
    V6_vrmpyub_rtt_acc_alt  = 761,
777
    V6_vrmpyub_rtt_alt  = 762,
778
    V6_vrmpyubi_acc_alt = 763,
779
    V6_vrmpyubi_alt = 764,
780
    V6_vrmpyubv_acc_alt = 765,
781
    V6_vrmpyubv_alt = 766,
782
    V6_vrotr_alt  = 767,
783
    V6_vroundhb_alt = 768,
784
    V6_vroundhub_alt  = 769,
785
    V6_vrounduhub_alt = 770,
786
    V6_vrounduwuh_alt = 771,
787
    V6_vroundwh_alt = 772,
788
    V6_vroundwuh_alt  = 773,
789
    V6_vrsadubi_acc_alt = 774,
790
    V6_vrsadubi_alt = 775,
791
    V6_vsathub_alt  = 776,
792
    V6_vsatuwuh_alt = 777,
793
    V6_vsatwh_alt = 778,
794
    V6_vsb_alt  = 779,
795
    V6_vscattermh_add_alt = 780,
796
    V6_vscattermh_alt = 781,
797
    V6_vscattermhq_alt  = 782,
798
    V6_vscattermw_add_alt = 783,
799
    V6_vscattermw_alt = 784,
800
    V6_vscattermwh_add_alt  = 785,
801
    V6_vscattermwh_alt  = 786,
802
    V6_vscattermwhq_alt = 787,
803
    V6_vscattermwq_alt  = 788,
804
    V6_vsh_alt  = 789,
805
    V6_vshufeh_alt  = 790,
806
    V6_vshuffb_alt  = 791,
807
    V6_vshuffeb_alt = 792,
808
    V6_vshuffh_alt  = 793,
809
    V6_vshuffob_alt = 794,
810
    V6_vshufoeb_alt = 795,
811
    V6_vshufoeh_alt = 796,
812
    V6_vshufoh_alt  = 797,
813
    V6_vsubb_alt  = 798,
814
    V6_vsubb_dv_alt = 799,
815
    V6_vsubbnq_alt  = 800,
816
    V6_vsubbq_alt = 801,
817
    V6_vsubbsat_alt = 802,
818
    V6_vsubbsat_dv_alt  = 803,
819
    V6_vsubh_alt  = 804,
820
    V6_vsubh_dv_alt = 805,
821
    V6_vsubhnq_alt  = 806,
822
    V6_vsubhq_alt = 807,
823
    V6_vsubhsat_alt = 808,
824
    V6_vsubhsat_dv_alt  = 809,
825
    V6_vsubhw_alt = 810,
826
    V6_vsububh_alt  = 811,
827
    V6_vsububsat_alt  = 812,
828
    V6_vsububsat_dv_alt = 813,
829
    V6_vsubuhsat_alt  = 814,
830
    V6_vsubuhsat_dv_alt = 815,
831
    V6_vsubuhw_alt  = 816,
832
    V6_vsubuwsat_alt  = 817,
833
    V6_vsubuwsat_dv_alt = 818,
834
    V6_vsubw_alt  = 819,
835
    V6_vsubw_dv_alt = 820,
836
    V6_vsubwnq_alt  = 821,
837
    V6_vsubwq_alt = 822,
838
    V6_vsubwsat_alt = 823,
839
    V6_vsubwsat_dv_alt  = 824,
840
    V6_vtmpyb_acc_alt = 825,
841
    V6_vtmpyb_alt = 826,
842
    V6_vtmpybus_acc_alt = 827,
843
    V6_vtmpybus_alt = 828,
844
    V6_vtmpyhb_acc_alt  = 829,
845
    V6_vtmpyhb_alt  = 830,
846
    V6_vtran2x2_map = 831,
847
    V6_vunpackb_alt = 832,
848
    V6_vunpackh_alt = 833,
849
    V6_vunpackob_alt  = 834,
850
    V6_vunpackoh_alt  = 835,
851
    V6_vunpackub_alt  = 836,
852
    V6_vunpackuh_alt  = 837,
853
    V6_vzb_alt  = 838,
854
    V6_vzh_alt  = 839,
855
    V6_zld0 = 840,
856
    V6_zldp0  = 841,
857
    Y2_crswap_old = 842,
858
    Y2_dcfetch  = 843,
859
    Y2_k1lock_map = 844,
860
    Y2_k1unlock_map = 845,
861
    dup_A2_add  = 846,
862
    dup_A2_addi = 847,
863
    dup_A2_andir  = 848,
864
    dup_A2_combineii  = 849,
865
    dup_A2_sxtb = 850,
866
    dup_A2_sxth = 851,
867
    dup_A2_tfr  = 852,
868
    dup_A2_tfrsi  = 853,
869
    dup_A2_zxtb = 854,
870
    dup_A2_zxth = 855,
871
    dup_A4_combineii  = 856,
872
    dup_A4_combineir  = 857,
873
    dup_A4_combineri  = 858,
874
    dup_C2_cmoveif  = 859,
875
    dup_C2_cmoveit  = 860,
876
    dup_C2_cmovenewif = 861,
877
    dup_C2_cmovenewit = 862,
878
    dup_C2_cmpeqi = 863,
879
    dup_L2_deallocframe = 864,
880
    dup_L2_loadrb_io  = 865,
881
    dup_L2_loadrd_io  = 866,
882
    dup_L2_loadrh_io  = 867,
883
    dup_L2_loadri_io  = 868,
884
    dup_L2_loadrub_io = 869,
885
    dup_L2_loadruh_io = 870,
886
    dup_S2_allocframe = 871,
887
    dup_S2_storerb_io = 872,
888
    dup_S2_storerd_io = 873,
889
    dup_S2_storerh_io = 874,
890
    dup_S2_storeri_io = 875,
891
    dup_S4_storeirb_io  = 876,
892
    dup_S4_storeiri_io  = 877,
893
    A2_abs  = 878,
894
    A2_absp = 879,
895
    A2_abssat = 880,
896
    A2_add  = 881,
897
    A2_addh_h16_hh  = 882,
898
    A2_addh_h16_hl  = 883,
899
    A2_addh_h16_lh  = 884,
900
    A2_addh_h16_ll  = 885,
901
    A2_addh_h16_sat_hh  = 886,
902
    A2_addh_h16_sat_hl  = 887,
903
    A2_addh_h16_sat_lh  = 888,
904
    A2_addh_h16_sat_ll  = 889,
905
    A2_addh_l16_hl  = 890,
906
    A2_addh_l16_ll  = 891,
907
    A2_addh_l16_sat_hl  = 892,
908
    A2_addh_l16_sat_ll  = 893,
909
    A2_addi = 894,
910
    A2_addp = 895,
911
    A2_addpsat  = 896,
912
    A2_addsat = 897,
913
    A2_addsph = 898,
914
    A2_addspl = 899,
915
    A2_and  = 900,
916
    A2_andir  = 901,
917
    A2_andp = 902,
918
    A2_aslh = 903,
919
    A2_asrh = 904,
920
    A2_combine_hh = 905,
921
    A2_combine_hl = 906,
922
    A2_combine_lh = 907,
923
    A2_combine_ll = 908,
924
    A2_combineii  = 909,
925
    A2_combinew = 910,
926
    A2_max  = 911,
927
    A2_maxp = 912,
928
    A2_maxu = 913,
929
    A2_maxup  = 914,
930
    A2_min  = 915,
931
    A2_minp = 916,
932
    A2_minu = 917,
933
    A2_minup  = 918,
934
    A2_negp = 919,
935
    A2_negsat = 920,
936
    A2_nop  = 921,
937
    A2_notp = 922,
938
    A2_or = 923,
939
    A2_orir = 924,
940
    A2_orp  = 925,
941
    A2_paddf  = 926,
942
    A2_paddfnew = 927,
943
    A2_paddif = 928,
944
    A2_paddifnew  = 929,
945
    A2_paddit = 930,
946
    A2_padditnew  = 931,
947
    A2_paddt  = 932,
948
    A2_paddtnew = 933,
949
    A2_pandf  = 934,
950
    A2_pandfnew = 935,
951
    A2_pandt  = 936,
952
    A2_pandtnew = 937,
953
    A2_porf = 938,
954
    A2_porfnew  = 939,
955
    A2_port = 940,
956
    A2_portnew  = 941,
957
    A2_psubf  = 942,
958
    A2_psubfnew = 943,
959
    A2_psubt  = 944,
960
    A2_psubtnew = 945,
961
    A2_pxorf  = 946,
962
    A2_pxorfnew = 947,
963
    A2_pxort  = 948,
964
    A2_pxortnew = 949,
965
    A2_roundsat = 950,
966
    A2_sat  = 951,
967
    A2_satb = 952,
968
    A2_sath = 953,
969
    A2_satub  = 954,
970
    A2_satuh  = 955,
971
    A2_sub  = 956,
972
    A2_subh_h16_hh  = 957,
973
    A2_subh_h16_hl  = 958,
974
    A2_subh_h16_lh  = 959,
975
    A2_subh_h16_ll  = 960,
976
    A2_subh_h16_sat_hh  = 961,
977
    A2_subh_h16_sat_hl  = 962,
978
    A2_subh_h16_sat_lh  = 963,
979
    A2_subh_h16_sat_ll  = 964,
980
    A2_subh_l16_hl  = 965,
981
    A2_subh_l16_ll  = 966,
982
    A2_subh_l16_sat_hl  = 967,
983
    A2_subh_l16_sat_ll  = 968,
984
    A2_subp = 969,
985
    A2_subri  = 970,
986
    A2_subsat = 971,
987
    A2_svaddh = 972,
988
    A2_svaddhs  = 973,
989
    A2_svadduhs = 974,
990
    A2_svavgh = 975,
991
    A2_svavghs  = 976,
992
    A2_svnavgh  = 977,
993
    A2_svsubh = 978,
994
    A2_svsubhs  = 979,
995
    A2_svsubuhs = 980,
996
    A2_swiz = 981,
997
    A2_sxtb = 982,
998
    A2_sxth = 983,
999
    A2_sxtw = 984,
1000
    A2_tfr  = 985,
1001
    A2_tfrcrr = 986,
1002
    A2_tfrih  = 987,
1003
    A2_tfril  = 988,
1004
    A2_tfrrcr = 989,
1005
    A2_tfrsi  = 990,
1006
    A2_vabsh  = 991,
1007
    A2_vabshsat = 992,
1008
    A2_vabsw  = 993,
1009
    A2_vabswsat = 994,
1010
    A2_vaddh  = 995,
1011
    A2_vaddhs = 996,
1012
    A2_vaddub = 997,
1013
    A2_vaddubs  = 998,
1014
    A2_vadduhs  = 999,
1015
    A2_vaddw  = 1000,
1016
    A2_vaddws = 1001,
1017
    A2_vavgh  = 1002,
1018
    A2_vavghcr  = 1003,
1019
    A2_vavghr = 1004,
1020
    A2_vavgub = 1005,
1021
    A2_vavgubr  = 1006,
1022
    A2_vavguh = 1007,
1023
    A2_vavguhr  = 1008,
1024
    A2_vavguw = 1009,
1025
    A2_vavguwr  = 1010,
1026
    A2_vavgw  = 1011,
1027
    A2_vavgwcr  = 1012,
1028
    A2_vavgwr = 1013,
1029
    A2_vcmpbeq  = 1014,
1030
    A2_vcmpbgtu = 1015,
1031
    A2_vcmpheq  = 1016,
1032
    A2_vcmphgt  = 1017,
1033
    A2_vcmphgtu = 1018,
1034
    A2_vcmpweq  = 1019,
1035
    A2_vcmpwgt  = 1020,
1036
    A2_vcmpwgtu = 1021,
1037
    A2_vconj  = 1022,
1038
    A2_vmaxb  = 1023,
1039
    A2_vmaxh  = 1024,
1040
    A2_vmaxub = 1025,
1041
    A2_vmaxuh = 1026,
1042
    A2_vmaxuw = 1027,
1043
    A2_vmaxw  = 1028,
1044
    A2_vminb  = 1029,
1045
    A2_vminh  = 1030,
1046
    A2_vminub = 1031,
1047
    A2_vminuh = 1032,
1048
    A2_vminuw = 1033,
1049
    A2_vminw  = 1034,
1050
    A2_vnavgh = 1035,
1051
    A2_vnavghcr = 1036,
1052
    A2_vnavghr  = 1037,
1053
    A2_vnavgw = 1038,
1054
    A2_vnavgwcr = 1039,
1055
    A2_vnavgwr  = 1040,
1056
    A2_vraddub  = 1041,
1057
    A2_vraddub_acc  = 1042,
1058
    A2_vrsadub  = 1043,
1059
    A2_vrsadub_acc  = 1044,
1060
    A2_vsubh  = 1045,
1061
    A2_vsubhs = 1046,
1062
    A2_vsubub = 1047,
1063
    A2_vsububs  = 1048,
1064
    A2_vsubuhs  = 1049,
1065
    A2_vsubw  = 1050,
1066
    A2_vsubws = 1051,
1067
    A2_xor  = 1052,
1068
    A2_xorp = 1053,
1069
    A2_zxth = 1054,
1070
    A4_addp_c = 1055,
1071
    A4_andn = 1056,
1072
    A4_andnp  = 1057,
1073
    A4_bitsplit = 1058,
1074
    A4_bitspliti  = 1059,
1075
    A4_boundscheck_hi = 1060,
1076
    A4_boundscheck_lo = 1061,
1077
    A4_cmpbeq = 1062,
1078
    A4_cmpbeqi  = 1063,
1079
    A4_cmpbgt = 1064,
1080
    A4_cmpbgti  = 1065,
1081
    A4_cmpbgtu  = 1066,
1082
    A4_cmpbgtui = 1067,
1083
    A4_cmpheq = 1068,
1084
    A4_cmpheqi  = 1069,
1085
    A4_cmphgt = 1070,
1086
    A4_cmphgti  = 1071,
1087
    A4_cmphgtu  = 1072,
1088
    A4_cmphgtui = 1073,
1089
    A4_combineii  = 1074,
1090
    A4_combineir  = 1075,
1091
    A4_combineri  = 1076,
1092
    A4_cround_ri  = 1077,
1093
    A4_cround_rr  = 1078,
1094
    A4_ext  = 1079,
1095
    A4_modwrapu = 1080,
1096
    A4_orn  = 1081,
1097
    A4_ornp = 1082,
1098
    A4_paslhf = 1083,
1099
    A4_paslhfnew  = 1084,
1100
    A4_paslht = 1085,
1101
    A4_paslhtnew  = 1086,
1102
    A4_pasrhf = 1087,
1103
    A4_pasrhfnew  = 1088,
1104
    A4_pasrht = 1089,
1105
    A4_pasrhtnew  = 1090,
1106
    A4_psxtbf = 1091,
1107
    A4_psxtbfnew  = 1092,
1108
    A4_psxtbt = 1093,
1109
    A4_psxtbtnew  = 1094,
1110
    A4_psxthf = 1095,
1111
    A4_psxthfnew  = 1096,
1112
    A4_psxtht = 1097,
1113
    A4_psxthtnew  = 1098,
1114
    A4_pzxtbf = 1099,
1115
    A4_pzxtbfnew  = 1100,
1116
    A4_pzxtbt = 1101,
1117
    A4_pzxtbtnew  = 1102,
1118
    A4_pzxthf = 1103,
1119
    A4_pzxthfnew  = 1104,
1120
    A4_pzxtht = 1105,
1121
    A4_pzxthtnew  = 1106,
1122
    A4_rcmpeq = 1107,
1123
    A4_rcmpeqi  = 1108,
1124
    A4_rcmpneq  = 1109,
1125
    A4_rcmpneqi = 1110,
1126
    A4_round_ri = 1111,
1127
    A4_round_ri_sat = 1112,
1128
    A4_round_rr = 1113,
1129
    A4_round_rr_sat = 1114,
1130
    A4_subp_c = 1115,
1131
    A4_tfrcpp = 1116,
1132
    A4_tfrpcp = 1117,
1133
    A4_tlbmatch = 1118,
1134
    A4_vcmpbeq_any  = 1119,
1135
    A4_vcmpbeqi = 1120,
1136
    A4_vcmpbgt  = 1121,
1137
    A4_vcmpbgti = 1122,
1138
    A4_vcmpbgtui  = 1123,
1139
    A4_vcmpheqi = 1124,
1140
    A4_vcmphgti = 1125,
1141
    A4_vcmphgtui  = 1126,
1142
    A4_vcmpweqi = 1127,
1143
    A4_vcmpwgti = 1128,
1144
    A4_vcmpwgtui  = 1129,
1145
    A4_vrmaxh = 1130,
1146
    A4_vrmaxuh  = 1131,
1147
    A4_vrmaxuw  = 1132,
1148
    A4_vrmaxw = 1133,
1149
    A4_vrminh = 1134,
1150
    A4_vrminuh  = 1135,
1151
    A4_vrminuw  = 1136,
1152
    A4_vrminw = 1137,
1153
    A5_ACS  = 1138,
1154
    A5_vaddhubs = 1139,
1155
    A6_vcmpbeq_notany = 1140,
1156
    A6_vminub_RdP = 1141,
1157
    A7_clip = 1142,
1158
    A7_croundd_ri = 1143,
1159
    A7_croundd_rr = 1144,
1160
    A7_vclip  = 1145,
1161
    C2_all8 = 1146,
1162
    C2_and  = 1147,
1163
    C2_andn = 1148,
1164
    C2_any8 = 1149,
1165
    C2_bitsclr  = 1150,
1166
    C2_bitsclri = 1151,
1167
    C2_bitsset  = 1152,
1168
    C2_ccombinewf = 1153,
1169
    C2_ccombinewnewf  = 1154,
1170
    C2_ccombinewnewt  = 1155,
1171
    C2_ccombinewt = 1156,
1172
    C2_cmoveif  = 1157,
1173
    C2_cmoveit  = 1158,
1174
    C2_cmovenewif = 1159,
1175
    C2_cmovenewit = 1160,
1176
    C2_cmpeq  = 1161,
1177
    C2_cmpeqi = 1162,
1178
    C2_cmpeqp = 1163,
1179
    C2_cmpgt  = 1164,
1180
    C2_cmpgti = 1165,
1181
    C2_cmpgtp = 1166,
1182
    C2_cmpgtu = 1167,
1183
    C2_cmpgtui  = 1168,
1184
    C2_cmpgtup  = 1169,
1185
    C2_mask = 1170,
1186
    C2_mux  = 1171,
1187
    C2_muxii  = 1172,
1188
    C2_muxir  = 1173,
1189
    C2_muxri  = 1174,
1190
    C2_not  = 1175,
1191
    C2_or = 1176,
1192
    C2_orn  = 1177,
1193
    C2_tfrpr  = 1178,
1194
    C2_tfrrp  = 1179,
1195
    C2_vitpack  = 1180,
1196
    C2_vmux = 1181,
1197
    C2_xor  = 1182,
1198
    C4_addipc = 1183,
1199
    C4_and_and  = 1184,
1200
    C4_and_andn = 1185,
1201
    C4_and_or = 1186,
1202
    C4_and_orn  = 1187,
1203
    C4_cmplte = 1188,
1204
    C4_cmpltei  = 1189,
1205
    C4_cmplteu  = 1190,
1206
    C4_cmplteui = 1191,
1207
    C4_cmpneq = 1192,
1208
    C4_cmpneqi  = 1193,
1209
    C4_fastcorner9  = 1194,
1210
    C4_fastcorner9_not  = 1195,
1211
    C4_nbitsclr = 1196,
1212
    C4_nbitsclri  = 1197,
1213
    C4_nbitsset = 1198,
1214
    C4_or_and = 1199,
1215
    C4_or_andn  = 1200,
1216
    C4_or_or  = 1201,
1217
    C4_or_orn = 1202,
1218
    CALLProfile = 1203,
1219
    CONST32 = 1204,
1220
    CONST64 = 1205,
1221
    DuplexIClass0 = 1206,
1222
    DuplexIClass1 = 1207,
1223
    DuplexIClass2 = 1208,
1224
    DuplexIClass3 = 1209,
1225
    DuplexIClass4 = 1210,
1226
    DuplexIClass5 = 1211,
1227
    DuplexIClass6 = 1212,
1228
    DuplexIClass7 = 1213,
1229
    DuplexIClass8 = 1214,
1230
    DuplexIClass9 = 1215,
1231
    DuplexIClassA = 1216,
1232
    DuplexIClassB = 1217,
1233
    DuplexIClassC = 1218,
1234
    DuplexIClassD = 1219,
1235
    DuplexIClassE = 1220,
1236
    DuplexIClassF = 1221,
1237
    EH_RETURN_JMPR  = 1222,
1238
    F2_conv_d2df  = 1223,
1239
    F2_conv_d2sf  = 1224,
1240
    F2_conv_df2d  = 1225,
1241
    F2_conv_df2d_chop = 1226,
1242
    F2_conv_df2sf = 1227,
1243
    F2_conv_df2ud = 1228,
1244
    F2_conv_df2ud_chop  = 1229,
1245
    F2_conv_df2uw = 1230,
1246
    F2_conv_df2uw_chop  = 1231,
1247
    F2_conv_df2w  = 1232,
1248
    F2_conv_df2w_chop = 1233,
1249
    F2_conv_sf2d  = 1234,
1250
    F2_conv_sf2d_chop = 1235,
1251
    F2_conv_sf2df = 1236,
1252
    F2_conv_sf2ud = 1237,
1253
    F2_conv_sf2ud_chop  = 1238,
1254
    F2_conv_sf2uw = 1239,
1255
    F2_conv_sf2uw_chop  = 1240,
1256
    F2_conv_sf2w  = 1241,
1257
    F2_conv_sf2w_chop = 1242,
1258
    F2_conv_ud2df = 1243,
1259
    F2_conv_ud2sf = 1244,
1260
    F2_conv_uw2df = 1245,
1261
    F2_conv_uw2sf = 1246,
1262
    F2_conv_w2df  = 1247,
1263
    F2_conv_w2sf  = 1248,
1264
    F2_dfadd  = 1249,
1265
    F2_dfclass  = 1250,
1266
    F2_dfcmpeq  = 1251,
1267
    F2_dfcmpge  = 1252,
1268
    F2_dfcmpgt  = 1253,
1269
    F2_dfcmpuo  = 1254,
1270
    F2_dfimm_n  = 1255,
1271
    F2_dfimm_p  = 1256,
1272
    F2_dfmax  = 1257,
1273
    F2_dfmin  = 1258,
1274
    F2_dfmpyfix = 1259,
1275
    F2_dfmpyhh  = 1260,
1276
    F2_dfmpylh  = 1261,
1277
    F2_dfmpyll  = 1262,
1278
    F2_dfsub  = 1263,
1279
    F2_sfadd  = 1264,
1280
    F2_sfclass  = 1265,
1281
    F2_sfcmpeq  = 1266,
1282
    F2_sfcmpge  = 1267,
1283
    F2_sfcmpgt  = 1268,
1284
    F2_sfcmpuo  = 1269,
1285
    F2_sffixupd = 1270,
1286
    F2_sffixupn = 1271,
1287
    F2_sffixupr = 1272,
1288
    F2_sffma  = 1273,
1289
    F2_sffma_lib  = 1274,
1290
    F2_sffma_sc = 1275,
1291
    F2_sffms  = 1276,
1292
    F2_sffms_lib  = 1277,
1293
    F2_sfimm_n  = 1278,
1294
    F2_sfimm_p  = 1279,
1295
    F2_sfinvsqrta = 1280,
1296
    F2_sfmax  = 1281,
1297
    F2_sfmin  = 1282,
1298
    F2_sfmpy  = 1283,
1299
    F2_sfrecipa = 1284,
1300
    F2_sfsub  = 1285,
1301
    G4_tfrgcpp  = 1286,
1302
    G4_tfrgcrr  = 1287,
1303
    G4_tfrgpcp  = 1288,
1304
    G4_tfrgrcr  = 1289,
1305
    HI  = 1290,
1306
    J2_call = 1291,
1307
    J2_callf  = 1292,
1308
    J2_callr  = 1293,
1309
    J2_callrf = 1294,
1310
    J2_callrh = 1295,
1311
    J2_callrt = 1296,
1312
    J2_callt  = 1297,
1313
    J2_jump = 1298,
1314
    J2_jumpf  = 1299,
1315
    J2_jumpfnew = 1300,
1316
    J2_jumpfnewpt = 1301,
1317
    J2_jumpfpt  = 1302,
1318
    J2_jumpr  = 1303,
1319
    J2_jumprf = 1304,
1320
    J2_jumprfnew  = 1305,
1321
    J2_jumprfnewpt  = 1306,
1322
    J2_jumprfpt = 1307,
1323
    J2_jumprgtez  = 1308,
1324
    J2_jumprgtezpt  = 1309,
1325
    J2_jumprh = 1310,
1326
    J2_jumprltez  = 1311,
1327
    J2_jumprltezpt  = 1312,
1328
    J2_jumprnz  = 1313,
1329
    J2_jumprnzpt  = 1314,
1330
    J2_jumprt = 1315,
1331
    J2_jumprtnew  = 1316,
1332
    J2_jumprtnewpt  = 1317,
1333
    J2_jumprtpt = 1318,
1334
    J2_jumprz = 1319,
1335
    J2_jumprzpt = 1320,
1336
    J2_jumpt  = 1321,
1337
    J2_jumptnew = 1322,
1338
    J2_jumptnewpt = 1323,
1339
    J2_jumptpt  = 1324,
1340
    J2_loop0i = 1325,
1341
    J2_loop0iext  = 1326,
1342
    J2_loop0r = 1327,
1343
    J2_loop0rext  = 1328,
1344
    J2_loop1i = 1329,
1345
    J2_loop1iext  = 1330,
1346
    J2_loop1r = 1331,
1347
    J2_loop1rext  = 1332,
1348
    J2_pause  = 1333,
1349
    J2_ploop1si = 1334,
1350
    J2_ploop1sr = 1335,
1351
    J2_ploop2si = 1336,
1352
    J2_ploop2sr = 1337,
1353
    J2_ploop3si = 1338,
1354
    J2_ploop3sr = 1339,
1355
    J2_rte  = 1340,
1356
    J2_trap0  = 1341,
1357
    J2_trap1  = 1342,
1358
    J2_unpause  = 1343,
1359
    J4_cmpeq_f_jumpnv_nt  = 1344,
1360
    J4_cmpeq_f_jumpnv_t = 1345,
1361
    J4_cmpeq_fp0_jump_nt  = 1346,
1362
    J4_cmpeq_fp0_jump_t = 1347,
1363
    J4_cmpeq_fp1_jump_nt  = 1348,
1364
    J4_cmpeq_fp1_jump_t = 1349,
1365
    J4_cmpeq_t_jumpnv_nt  = 1350,
1366
    J4_cmpeq_t_jumpnv_t = 1351,
1367
    J4_cmpeq_tp0_jump_nt  = 1352,
1368
    J4_cmpeq_tp0_jump_t = 1353,
1369
    J4_cmpeq_tp1_jump_nt  = 1354,
1370
    J4_cmpeq_tp1_jump_t = 1355,
1371
    J4_cmpeqi_f_jumpnv_nt = 1356,
1372
    J4_cmpeqi_f_jumpnv_t  = 1357,
1373
    J4_cmpeqi_fp0_jump_nt = 1358,
1374
    J4_cmpeqi_fp0_jump_t  = 1359,
1375
    J4_cmpeqi_fp1_jump_nt = 1360,
1376
    J4_cmpeqi_fp1_jump_t  = 1361,
1377
    J4_cmpeqi_t_jumpnv_nt = 1362,
1378
    J4_cmpeqi_t_jumpnv_t  = 1363,
1379
    J4_cmpeqi_tp0_jump_nt = 1364,
1380
    J4_cmpeqi_tp0_jump_t  = 1365,
1381
    J4_cmpeqi_tp1_jump_nt = 1366,
1382
    J4_cmpeqi_tp1_jump_t  = 1367,
1383
    J4_cmpeqn1_f_jumpnv_nt  = 1368,
1384
    J4_cmpeqn1_f_jumpnv_t = 1369,
1385
    J4_cmpeqn1_fp0_jump_nt  = 1370,
1386
    J4_cmpeqn1_fp0_jump_t = 1371,
1387
    J4_cmpeqn1_fp1_jump_nt  = 1372,
1388
    J4_cmpeqn1_fp1_jump_t = 1373,
1389
    J4_cmpeqn1_t_jumpnv_nt  = 1374,
1390
    J4_cmpeqn1_t_jumpnv_t = 1375,
1391
    J4_cmpeqn1_tp0_jump_nt  = 1376,
1392
    J4_cmpeqn1_tp0_jump_t = 1377,
1393
    J4_cmpeqn1_tp1_jump_nt  = 1378,
1394
    J4_cmpeqn1_tp1_jump_t = 1379,
1395
    J4_cmpgt_f_jumpnv_nt  = 1380,
1396
    J4_cmpgt_f_jumpnv_t = 1381,
1397
    J4_cmpgt_fp0_jump_nt  = 1382,
1398
    J4_cmpgt_fp0_jump_t = 1383,
1399
    J4_cmpgt_fp1_jump_nt  = 1384,
1400
    J4_cmpgt_fp1_jump_t = 1385,
1401
    J4_cmpgt_t_jumpnv_nt  = 1386,
1402
    J4_cmpgt_t_jumpnv_t = 1387,
1403
    J4_cmpgt_tp0_jump_nt  = 1388,
1404
    J4_cmpgt_tp0_jump_t = 1389,
1405
    J4_cmpgt_tp1_jump_nt  = 1390,
1406
    J4_cmpgt_tp1_jump_t = 1391,
1407
    J4_cmpgti_f_jumpnv_nt = 1392,
1408
    J4_cmpgti_f_jumpnv_t  = 1393,
1409
    J4_cmpgti_fp0_jump_nt = 1394,
1410
    J4_cmpgti_fp0_jump_t  = 1395,
1411
    J4_cmpgti_fp1_jump_nt = 1396,
1412
    J4_cmpgti_fp1_jump_t  = 1397,
1413
    J4_cmpgti_t_jumpnv_nt = 1398,
1414
    J4_cmpgti_t_jumpnv_t  = 1399,
1415
    J4_cmpgti_tp0_jump_nt = 1400,
1416
    J4_cmpgti_tp0_jump_t  = 1401,
1417
    J4_cmpgti_tp1_jump_nt = 1402,
1418
    J4_cmpgti_tp1_jump_t  = 1403,
1419
    J4_cmpgtn1_f_jumpnv_nt  = 1404,
1420
    J4_cmpgtn1_f_jumpnv_t = 1405,
1421
    J4_cmpgtn1_fp0_jump_nt  = 1406,
1422
    J4_cmpgtn1_fp0_jump_t = 1407,
1423
    J4_cmpgtn1_fp1_jump_nt  = 1408,
1424
    J4_cmpgtn1_fp1_jump_t = 1409,
1425
    J4_cmpgtn1_t_jumpnv_nt  = 1410,
1426
    J4_cmpgtn1_t_jumpnv_t = 1411,
1427
    J4_cmpgtn1_tp0_jump_nt  = 1412,
1428
    J4_cmpgtn1_tp0_jump_t = 1413,
1429
    J4_cmpgtn1_tp1_jump_nt  = 1414,
1430
    J4_cmpgtn1_tp1_jump_t = 1415,
1431
    J4_cmpgtu_f_jumpnv_nt = 1416,
1432
    J4_cmpgtu_f_jumpnv_t  = 1417,
1433
    J4_cmpgtu_fp0_jump_nt = 1418,
1434
    J4_cmpgtu_fp0_jump_t  = 1419,
1435
    J4_cmpgtu_fp1_jump_nt = 1420,
1436
    J4_cmpgtu_fp1_jump_t  = 1421,
1437
    J4_cmpgtu_t_jumpnv_nt = 1422,
1438
    J4_cmpgtu_t_jumpnv_t  = 1423,
1439
    J4_cmpgtu_tp0_jump_nt = 1424,
1440
    J4_cmpgtu_tp0_jump_t  = 1425,
1441
    J4_cmpgtu_tp1_jump_nt = 1426,
1442
    J4_cmpgtu_tp1_jump_t  = 1427,
1443
    J4_cmpgtui_f_jumpnv_nt  = 1428,
1444
    J4_cmpgtui_f_jumpnv_t = 1429,
1445
    J4_cmpgtui_fp0_jump_nt  = 1430,
1446
    J4_cmpgtui_fp0_jump_t = 1431,
1447
    J4_cmpgtui_fp1_jump_nt  = 1432,
1448
    J4_cmpgtui_fp1_jump_t = 1433,
1449
    J4_cmpgtui_t_jumpnv_nt  = 1434,
1450
    J4_cmpgtui_t_jumpnv_t = 1435,
1451
    J4_cmpgtui_tp0_jump_nt  = 1436,
1452
    J4_cmpgtui_tp0_jump_t = 1437,
1453
    J4_cmpgtui_tp1_jump_nt  = 1438,
1454
    J4_cmpgtui_tp1_jump_t = 1439,
1455
    J4_cmplt_f_jumpnv_nt  = 1440,
1456
    J4_cmplt_f_jumpnv_t = 1441,
1457
    J4_cmplt_t_jumpnv_nt  = 1442,
1458
    J4_cmplt_t_jumpnv_t = 1443,
1459
    J4_cmpltu_f_jumpnv_nt = 1444,
1460
    J4_cmpltu_f_jumpnv_t  = 1445,
1461
    J4_cmpltu_t_jumpnv_nt = 1446,
1462
    J4_cmpltu_t_jumpnv_t  = 1447,
1463
    J4_hintjumpr  = 1448,
1464
    J4_jumpseti = 1449,
1465
    J4_jumpsetr = 1450,
1466
    J4_tstbit0_f_jumpnv_nt  = 1451,
1467
    J4_tstbit0_f_jumpnv_t = 1452,
1468
    J4_tstbit0_fp0_jump_nt  = 1453,
1469
    J4_tstbit0_fp0_jump_t = 1454,
1470
    J4_tstbit0_fp1_jump_nt  = 1455,
1471
    J4_tstbit0_fp1_jump_t = 1456,
1472
    J4_tstbit0_t_jumpnv_nt  = 1457,
1473
    J4_tstbit0_t_jumpnv_t = 1458,
1474
    J4_tstbit0_tp0_jump_nt  = 1459,
1475
    J4_tstbit0_tp0_jump_t = 1460,
1476
    J4_tstbit0_tp1_jump_nt  = 1461,
1477
    J4_tstbit0_tp1_jump_t = 1462,
1478
    L2_deallocframe = 1463,
1479
    L2_loadalignb_io  = 1464,
1480
    L2_loadalignb_pbr = 1465,
1481
    L2_loadalignb_pci = 1466,
1482
    L2_loadalignb_pcr = 1467,
1483
    L2_loadalignb_pi  = 1468,
1484
    L2_loadalignb_pr  = 1469,
1485
    L2_loadalignh_io  = 1470,
1486
    L2_loadalignh_pbr = 1471,
1487
    L2_loadalignh_pci = 1472,
1488
    L2_loadalignh_pcr = 1473,
1489
    L2_loadalignh_pi  = 1474,
1490
    L2_loadalignh_pr  = 1475,
1491
    L2_loadbsw2_io  = 1476,
1492
    L2_loadbsw2_pbr = 1477,
1493
    L2_loadbsw2_pci = 1478,
1494
    L2_loadbsw2_pcr = 1479,
1495
    L2_loadbsw2_pi  = 1480,
1496
    L2_loadbsw2_pr  = 1481,
1497
    L2_loadbsw4_io  = 1482,
1498
    L2_loadbsw4_pbr = 1483,
1499
    L2_loadbsw4_pci = 1484,
1500
    L2_loadbsw4_pcr = 1485,
1501
    L2_loadbsw4_pi  = 1486,
1502
    L2_loadbsw4_pr  = 1487,
1503
    L2_loadbzw2_io  = 1488,
1504
    L2_loadbzw2_pbr = 1489,
1505
    L2_loadbzw2_pci = 1490,
1506
    L2_loadbzw2_pcr = 1491,
1507
    L2_loadbzw2_pi  = 1492,
1508
    L2_loadbzw2_pr  = 1493,
1509
    L2_loadbzw4_io  = 1494,
1510
    L2_loadbzw4_pbr = 1495,
1511
    L2_loadbzw4_pci = 1496,
1512
    L2_loadbzw4_pcr = 1497,
1513
    L2_loadbzw4_pi  = 1498,
1514
    L2_loadbzw4_pr  = 1499,
1515
    L2_loadrb_io  = 1500,
1516
    L2_loadrb_pbr = 1501,
1517
    L2_loadrb_pci = 1502,
1518
    L2_loadrb_pcr = 1503,
1519
    L2_loadrb_pi  = 1504,
1520
    L2_loadrb_pr  = 1505,
1521
    L2_loadrbgp = 1506,
1522
    L2_loadrd_io  = 1507,
1523
    L2_loadrd_pbr = 1508,
1524
    L2_loadrd_pci = 1509,
1525
    L2_loadrd_pcr = 1510,
1526
    L2_loadrd_pi  = 1511,
1527
    L2_loadrd_pr  = 1512,
1528
    L2_loadrdgp = 1513,
1529
    L2_loadrh_io  = 1514,
1530
    L2_loadrh_pbr = 1515,
1531
    L2_loadrh_pci = 1516,
1532
    L2_loadrh_pcr = 1517,
1533
    L2_loadrh_pi  = 1518,
1534
    L2_loadrh_pr  = 1519,
1535
    L2_loadrhgp = 1520,
1536
    L2_loadri_io  = 1521,
1537
    L2_loadri_pbr = 1522,
1538
    L2_loadri_pci = 1523,
1539
    L2_loadri_pcr = 1524,
1540
    L2_loadri_pi  = 1525,
1541
    L2_loadri_pr  = 1526,
1542
    L2_loadrigp = 1527,
1543
    L2_loadrub_io = 1528,
1544
    L2_loadrub_pbr  = 1529,
1545
    L2_loadrub_pci  = 1530,
1546
    L2_loadrub_pcr  = 1531,
1547
    L2_loadrub_pi = 1532,
1548
    L2_loadrub_pr = 1533,
1549
    L2_loadrubgp  = 1534,
1550
    L2_loadruh_io = 1535,
1551
    L2_loadruh_pbr  = 1536,
1552
    L2_loadruh_pci  = 1537,
1553
    L2_loadruh_pcr  = 1538,
1554
    L2_loadruh_pi = 1539,
1555
    L2_loadruh_pr = 1540,
1556
    L2_loadruhgp  = 1541,
1557
    L2_loadw_aq = 1542,
1558
    L2_loadw_locked = 1543,
1559
    L2_ploadrbf_io  = 1544,
1560
    L2_ploadrbf_pi  = 1545,
1561
    L2_ploadrbfnew_io = 1546,
1562
    L2_ploadrbfnew_pi = 1547,
1563
    L2_ploadrbt_io  = 1548,
1564
    L2_ploadrbt_pi  = 1549,
1565
    L2_ploadrbtnew_io = 1550,
1566
    L2_ploadrbtnew_pi = 1551,
1567
    L2_ploadrdf_io  = 1552,
1568
    L2_ploadrdf_pi  = 1553,
1569
    L2_ploadrdfnew_io = 1554,
1570
    L2_ploadrdfnew_pi = 1555,
1571
    L2_ploadrdt_io  = 1556,
1572
    L2_ploadrdt_pi  = 1557,
1573
    L2_ploadrdtnew_io = 1558,
1574
    L2_ploadrdtnew_pi = 1559,
1575
    L2_ploadrhf_io  = 1560,
1576
    L2_ploadrhf_pi  = 1561,
1577
    L2_ploadrhfnew_io = 1562,
1578
    L2_ploadrhfnew_pi = 1563,
1579
    L2_ploadrht_io  = 1564,
1580
    L2_ploadrht_pi  = 1565,
1581
    L2_ploadrhtnew_io = 1566,
1582
    L2_ploadrhtnew_pi = 1567,
1583
    L2_ploadrif_io  = 1568,
1584
    L2_ploadrif_pi  = 1569,
1585
    L2_ploadrifnew_io = 1570,
1586
    L2_ploadrifnew_pi = 1571,
1587
    L2_ploadrit_io  = 1572,
1588
    L2_ploadrit_pi  = 1573,
1589
    L2_ploadritnew_io = 1574,
1590
    L2_ploadritnew_pi = 1575,
1591
    L2_ploadrubf_io = 1576,
1592
    L2_ploadrubf_pi = 1577,
1593
    L2_ploadrubfnew_io  = 1578,
1594
    L2_ploadrubfnew_pi  = 1579,
1595
    L2_ploadrubt_io = 1580,
1596
    L2_ploadrubt_pi = 1581,
1597
    L2_ploadrubtnew_io  = 1582,
1598
    L2_ploadrubtnew_pi  = 1583,
1599
    L2_ploadruhf_io = 1584,
1600
    L2_ploadruhf_pi = 1585,
1601
    L2_ploadruhfnew_io  = 1586,
1602
    L2_ploadruhfnew_pi  = 1587,
1603
    L2_ploadruht_io = 1588,
1604
    L2_ploadruht_pi = 1589,
1605
    L2_ploadruhtnew_io  = 1590,
1606
    L2_ploadruhtnew_pi  = 1591,
1607
    L4_add_memopb_io  = 1592,
1608
    L4_add_memoph_io  = 1593,
1609
    L4_add_memopw_io  = 1594,
1610
    L4_and_memopb_io  = 1595,
1611
    L4_and_memoph_io  = 1596,
1612
    L4_and_memopw_io  = 1597,
1613
    L4_iadd_memopb_io = 1598,
1614
    L4_iadd_memoph_io = 1599,
1615
    L4_iadd_memopw_io = 1600,
1616
    L4_iand_memopb_io = 1601,
1617
    L4_iand_memoph_io = 1602,
1618
    L4_iand_memopw_io = 1603,
1619
    L4_ior_memopb_io  = 1604,
1620
    L4_ior_memoph_io  = 1605,
1621
    L4_ior_memopw_io  = 1606,
1622
    L4_isub_memopb_io = 1607,
1623
    L4_isub_memoph_io = 1608,
1624
    L4_isub_memopw_io = 1609,
1625
    L4_loadalignb_ap  = 1610,
1626
    L4_loadalignb_ur  = 1611,
1627
    L4_loadalignh_ap  = 1612,
1628
    L4_loadalignh_ur  = 1613,
1629
    L4_loadbsw2_ap  = 1614,
1630
    L4_loadbsw2_ur  = 1615,
1631
    L4_loadbsw4_ap  = 1616,
1632
    L4_loadbsw4_ur  = 1617,
1633
    L4_loadbzw2_ap  = 1618,
1634
    L4_loadbzw2_ur  = 1619,
1635
    L4_loadbzw4_ap  = 1620,
1636
    L4_loadbzw4_ur  = 1621,
1637
    L4_loadd_aq = 1622,
1638
    L4_loadd_locked = 1623,
1639
    L4_loadrb_ap  = 1624,
1640
    L4_loadrb_rr  = 1625,
1641
    L4_loadrb_ur  = 1626,
1642
    L4_loadrd_ap  = 1627,
1643
    L4_loadrd_rr  = 1628,
1644
    L4_loadrd_ur  = 1629,
1645
    L4_loadrh_ap  = 1630,
1646
    L4_loadrh_rr  = 1631,
1647
    L4_loadrh_ur  = 1632,
1648
    L4_loadri_ap  = 1633,
1649
    L4_loadri_rr  = 1634,
1650
    L4_loadri_ur  = 1635,
1651
    L4_loadrub_ap = 1636,
1652
    L4_loadrub_rr = 1637,
1653
    L4_loadrub_ur = 1638,
1654
    L4_loadruh_ap = 1639,
1655
    L4_loadruh_rr = 1640,
1656
    L4_loadruh_ur = 1641,
1657
    L4_loadw_phys = 1642,
1658
    L4_or_memopb_io = 1643,
1659
    L4_or_memoph_io = 1644,
1660
    L4_or_memopw_io = 1645,
1661
    L4_ploadrbf_abs = 1646,
1662
    L4_ploadrbf_rr  = 1647,
1663
    L4_ploadrbfnew_abs  = 1648,
1664
    L4_ploadrbfnew_rr = 1649,
1665
    L4_ploadrbt_abs = 1650,
1666
    L4_ploadrbt_rr  = 1651,
1667
    L4_ploadrbtnew_abs  = 1652,
1668
    L4_ploadrbtnew_rr = 1653,
1669
    L4_ploadrdf_abs = 1654,
1670
    L4_ploadrdf_rr  = 1655,
1671
    L4_ploadrdfnew_abs  = 1656,
1672
    L4_ploadrdfnew_rr = 1657,
1673
    L4_ploadrdt_abs = 1658,
1674
    L4_ploadrdt_rr  = 1659,
1675
    L4_ploadrdtnew_abs  = 1660,
1676
    L4_ploadrdtnew_rr = 1661,
1677
    L4_ploadrhf_abs = 1662,
1678
    L4_ploadrhf_rr  = 1663,
1679
    L4_ploadrhfnew_abs  = 1664,
1680
    L4_ploadrhfnew_rr = 1665,
1681
    L4_ploadrht_abs = 1666,
1682
    L4_ploadrht_rr  = 1667,
1683
    L4_ploadrhtnew_abs  = 1668,
1684
    L4_ploadrhtnew_rr = 1669,
1685
    L4_ploadrif_abs = 1670,
1686
    L4_ploadrif_rr  = 1671,
1687
    L4_ploadrifnew_abs  = 1672,
1688
    L4_ploadrifnew_rr = 1673,
1689
    L4_ploadrit_abs = 1674,
1690
    L4_ploadrit_rr  = 1675,
1691
    L4_ploadritnew_abs  = 1676,
1692
    L4_ploadritnew_rr = 1677,
1693
    L4_ploadrubf_abs  = 1678,
1694
    L4_ploadrubf_rr = 1679,
1695
    L4_ploadrubfnew_abs = 1680,
1696
    L4_ploadrubfnew_rr  = 1681,
1697
    L4_ploadrubt_abs  = 1682,
1698
    L4_ploadrubt_rr = 1683,
1699
    L4_ploadrubtnew_abs = 1684,
1700
    L4_ploadrubtnew_rr  = 1685,
1701
    L4_ploadruhf_abs  = 1686,
1702
    L4_ploadruhf_rr = 1687,
1703
    L4_ploadruhfnew_abs = 1688,
1704
    L4_ploadruhfnew_rr  = 1689,
1705
    L4_ploadruht_abs  = 1690,
1706
    L4_ploadruht_rr = 1691,
1707
    L4_ploadruhtnew_abs = 1692,
1708
    L4_ploadruhtnew_rr  = 1693,
1709
    L4_return = 1694,
1710
    L4_return_f = 1695,
1711
    L4_return_fnew_pnt  = 1696,
1712
    L4_return_fnew_pt = 1697,
1713
    L4_return_t = 1698,
1714
    L4_return_tnew_pnt  = 1699,
1715
    L4_return_tnew_pt = 1700,
1716
    L4_sub_memopb_io  = 1701,
1717
    L4_sub_memoph_io  = 1702,
1718
    L4_sub_memopw_io  = 1703,
1719
    L6_memcpy = 1704,
1720
    LO  = 1705,
1721
    M2_acci = 1706,
1722
    M2_accii  = 1707,
1723
    M2_cmaci_s0 = 1708,
1724
    M2_cmacr_s0 = 1709,
1725
    M2_cmacs_s0 = 1710,
1726
    M2_cmacs_s1 = 1711,
1727
    M2_cmacsc_s0  = 1712,
1728
    M2_cmacsc_s1  = 1713,
1729
    M2_cmpyi_s0 = 1714,
1730
    M2_cmpyr_s0 = 1715,
1731
    M2_cmpyrs_s0  = 1716,
1732
    M2_cmpyrs_s1  = 1717,
1733
    M2_cmpyrsc_s0 = 1718,
1734
    M2_cmpyrsc_s1 = 1719,
1735
    M2_cmpys_s0 = 1720,
1736
    M2_cmpys_s1 = 1721,
1737
    M2_cmpysc_s0  = 1722,
1738
    M2_cmpysc_s1  = 1723,
1739
    M2_cnacs_s0 = 1724,
1740
    M2_cnacs_s1 = 1725,
1741
    M2_cnacsc_s0  = 1726,
1742
    M2_cnacsc_s1  = 1727,
1743
    M2_dpmpyss_acc_s0 = 1728,
1744
    M2_dpmpyss_nac_s0 = 1729,
1745
    M2_dpmpyss_rnd_s0 = 1730,
1746
    M2_dpmpyss_s0 = 1731,
1747
    M2_dpmpyuu_acc_s0 = 1732,
1748
    M2_dpmpyuu_nac_s0 = 1733,
1749
    M2_dpmpyuu_s0 = 1734,
1750
    M2_hmmpyh_rs1 = 1735,
1751
    M2_hmmpyh_s1  = 1736,
1752
    M2_hmmpyl_rs1 = 1737,
1753
    M2_hmmpyl_s1  = 1738,
1754
    M2_maci = 1739,
1755
    M2_macsin = 1740,
1756
    M2_macsip = 1741,
1757
    M2_mmachs_rs0 = 1742,
1758
    M2_mmachs_rs1 = 1743,
1759
    M2_mmachs_s0  = 1744,
1760
    M2_mmachs_s1  = 1745,
1761
    M2_mmacls_rs0 = 1746,
1762
    M2_mmacls_rs1 = 1747,
1763
    M2_mmacls_s0  = 1748,
1764
    M2_mmacls_s1  = 1749,
1765
    M2_mmacuhs_rs0  = 1750,
1766
    M2_mmacuhs_rs1  = 1751,
1767
    M2_mmacuhs_s0 = 1752,
1768
    M2_mmacuhs_s1 = 1753,
1769
    M2_mmaculs_rs0  = 1754,
1770
    M2_mmaculs_rs1  = 1755,
1771
    M2_mmaculs_s0 = 1756,
1772
    M2_mmaculs_s1 = 1757,
1773
    M2_mmpyh_rs0  = 1758,
1774
    M2_mmpyh_rs1  = 1759,
1775
    M2_mmpyh_s0 = 1760,
1776
    M2_mmpyh_s1 = 1761,
1777
    M2_mmpyl_rs0  = 1762,
1778
    M2_mmpyl_rs1  = 1763,
1779
    M2_mmpyl_s0 = 1764,
1780
    M2_mmpyl_s1 = 1765,
1781
    M2_mmpyuh_rs0 = 1766,
1782
    M2_mmpyuh_rs1 = 1767,
1783
    M2_mmpyuh_s0  = 1768,
1784
    M2_mmpyuh_s1  = 1769,
1785
    M2_mmpyul_rs0 = 1770,
1786
    M2_mmpyul_rs1 = 1771,
1787
    M2_mmpyul_s0  = 1772,
1788
    M2_mmpyul_s1  = 1773,
1789
    M2_mnaci  = 1774,
1790
    M2_mpy_acc_hh_s0  = 1775,
1791
    M2_mpy_acc_hh_s1  = 1776,
1792
    M2_mpy_acc_hl_s0  = 1777,
1793
    M2_mpy_acc_hl_s1  = 1778,
1794
    M2_mpy_acc_lh_s0  = 1779,
1795
    M2_mpy_acc_lh_s1  = 1780,
1796
    M2_mpy_acc_ll_s0  = 1781,
1797
    M2_mpy_acc_ll_s1  = 1782,
1798
    M2_mpy_acc_sat_hh_s0  = 1783,
1799
    M2_mpy_acc_sat_hh_s1  = 1784,
1800
    M2_mpy_acc_sat_hl_s0  = 1785,
1801
    M2_mpy_acc_sat_hl_s1  = 1786,
1802
    M2_mpy_acc_sat_lh_s0  = 1787,
1803
    M2_mpy_acc_sat_lh_s1  = 1788,
1804
    M2_mpy_acc_sat_ll_s0  = 1789,
1805
    M2_mpy_acc_sat_ll_s1  = 1790,
1806
    M2_mpy_hh_s0  = 1791,
1807
    M2_mpy_hh_s1  = 1792,
1808
    M2_mpy_hl_s0  = 1793,
1809
    M2_mpy_hl_s1  = 1794,
1810
    M2_mpy_lh_s0  = 1795,
1811
    M2_mpy_lh_s1  = 1796,
1812
    M2_mpy_ll_s0  = 1797,
1813
    M2_mpy_ll_s1  = 1798,
1814
    M2_mpy_nac_hh_s0  = 1799,
1815
    M2_mpy_nac_hh_s1  = 1800,
1816
    M2_mpy_nac_hl_s0  = 1801,
1817
    M2_mpy_nac_hl_s1  = 1802,
1818
    M2_mpy_nac_lh_s0  = 1803,
1819
    M2_mpy_nac_lh_s1  = 1804,
1820
    M2_mpy_nac_ll_s0  = 1805,
1821
    M2_mpy_nac_ll_s1  = 1806,
1822
    M2_mpy_nac_sat_hh_s0  = 1807,
1823
    M2_mpy_nac_sat_hh_s1  = 1808,
1824
    M2_mpy_nac_sat_hl_s0  = 1809,
1825
    M2_mpy_nac_sat_hl_s1  = 1810,
1826
    M2_mpy_nac_sat_lh_s0  = 1811,
1827
    M2_mpy_nac_sat_lh_s1  = 1812,
1828
    M2_mpy_nac_sat_ll_s0  = 1813,
1829
    M2_mpy_nac_sat_ll_s1  = 1814,
1830
    M2_mpy_rnd_hh_s0  = 1815,
1831
    M2_mpy_rnd_hh_s1  = 1816,
1832
    M2_mpy_rnd_hl_s0  = 1817,
1833
    M2_mpy_rnd_hl_s1  = 1818,
1834
    M2_mpy_rnd_lh_s0  = 1819,
1835
    M2_mpy_rnd_lh_s1  = 1820,
1836
    M2_mpy_rnd_ll_s0  = 1821,
1837
    M2_mpy_rnd_ll_s1  = 1822,
1838
    M2_mpy_sat_hh_s0  = 1823,
1839
    M2_mpy_sat_hh_s1  = 1824,
1840
    M2_mpy_sat_hl_s0  = 1825,
1841
    M2_mpy_sat_hl_s1  = 1826,
1842
    M2_mpy_sat_lh_s0  = 1827,
1843
    M2_mpy_sat_lh_s1  = 1828,
1844
    M2_mpy_sat_ll_s0  = 1829,
1845
    M2_mpy_sat_ll_s1  = 1830,
1846
    M2_mpy_sat_rnd_hh_s0  = 1831,
1847
    M2_mpy_sat_rnd_hh_s1  = 1832,
1848
    M2_mpy_sat_rnd_hl_s0  = 1833,
1849
    M2_mpy_sat_rnd_hl_s1  = 1834,
1850
    M2_mpy_sat_rnd_lh_s0  = 1835,
1851
    M2_mpy_sat_rnd_lh_s1  = 1836,
1852
    M2_mpy_sat_rnd_ll_s0  = 1837,
1853
    M2_mpy_sat_rnd_ll_s1  = 1838,
1854
    M2_mpy_up = 1839,
1855
    M2_mpy_up_s1  = 1840,
1856
    M2_mpy_up_s1_sat  = 1841,
1857
    M2_mpyd_acc_hh_s0 = 1842,
1858
    M2_mpyd_acc_hh_s1 = 1843,
1859
    M2_mpyd_acc_hl_s0 = 1844,
1860
    M2_mpyd_acc_hl_s1 = 1845,
1861
    M2_mpyd_acc_lh_s0 = 1846,
1862
    M2_mpyd_acc_lh_s1 = 1847,
1863
    M2_mpyd_acc_ll_s0 = 1848,
1864
    M2_mpyd_acc_ll_s1 = 1849,
1865
    M2_mpyd_hh_s0 = 1850,
1866
    M2_mpyd_hh_s1 = 1851,
1867
    M2_mpyd_hl_s0 = 1852,
1868
    M2_mpyd_hl_s1 = 1853,
1869
    M2_mpyd_lh_s0 = 1854,
1870
    M2_mpyd_lh_s1 = 1855,
1871
    M2_mpyd_ll_s0 = 1856,
1872
    M2_mpyd_ll_s1 = 1857,
1873
    M2_mpyd_nac_hh_s0 = 1858,
1874
    M2_mpyd_nac_hh_s1 = 1859,
1875
    M2_mpyd_nac_hl_s0 = 1860,
1876
    M2_mpyd_nac_hl_s1 = 1861,
1877
    M2_mpyd_nac_lh_s0 = 1862,
1878
    M2_mpyd_nac_lh_s1 = 1863,
1879
    M2_mpyd_nac_ll_s0 = 1864,
1880
    M2_mpyd_nac_ll_s1 = 1865,
1881
    M2_mpyd_rnd_hh_s0 = 1866,
1882
    M2_mpyd_rnd_hh_s1 = 1867,
1883
    M2_mpyd_rnd_hl_s0 = 1868,
1884
    M2_mpyd_rnd_hl_s1 = 1869,
1885
    M2_mpyd_rnd_lh_s0 = 1870,
1886
    M2_mpyd_rnd_lh_s1 = 1871,
1887
    M2_mpyd_rnd_ll_s0 = 1872,
1888
    M2_mpyd_rnd_ll_s1 = 1873,
1889
    M2_mpyi = 1874,
1890
    M2_mpysin = 1875,
1891
    M2_mpysip = 1876,
1892
    M2_mpysu_up = 1877,
1893
    M2_mpyu_acc_hh_s0 = 1878,
1894
    M2_mpyu_acc_hh_s1 = 1879,
1895
    M2_mpyu_acc_hl_s0 = 1880,
1896
    M2_mpyu_acc_hl_s1 = 1881,
1897
    M2_mpyu_acc_lh_s0 = 1882,
1898
    M2_mpyu_acc_lh_s1 = 1883,
1899
    M2_mpyu_acc_ll_s0 = 1884,
1900
    M2_mpyu_acc_ll_s1 = 1885,
1901
    M2_mpyu_hh_s0 = 1886,
1902
    M2_mpyu_hh_s1 = 1887,
1903
    M2_mpyu_hl_s0 = 1888,
1904
    M2_mpyu_hl_s1 = 1889,
1905
    M2_mpyu_lh_s0 = 1890,
1906
    M2_mpyu_lh_s1 = 1891,
1907
    M2_mpyu_ll_s0 = 1892,
1908
    M2_mpyu_ll_s1 = 1893,
1909
    M2_mpyu_nac_hh_s0 = 1894,
1910
    M2_mpyu_nac_hh_s1 = 1895,
1911
    M2_mpyu_nac_hl_s0 = 1896,
1912
    M2_mpyu_nac_hl_s1 = 1897,
1913
    M2_mpyu_nac_lh_s0 = 1898,
1914
    M2_mpyu_nac_lh_s1 = 1899,
1915
    M2_mpyu_nac_ll_s0 = 1900,
1916
    M2_mpyu_nac_ll_s1 = 1901,
1917
    M2_mpyu_up  = 1902,
1918
    M2_mpyud_acc_hh_s0  = 1903,
1919
    M2_mpyud_acc_hh_s1  = 1904,
1920
    M2_mpyud_acc_hl_s0  = 1905,
1921
    M2_mpyud_acc_hl_s1  = 1906,
1922
    M2_mpyud_acc_lh_s0  = 1907,
1923
    M2_mpyud_acc_lh_s1  = 1908,
1924
    M2_mpyud_acc_ll_s0  = 1909,
1925
    M2_mpyud_acc_ll_s1  = 1910,
1926
    M2_mpyud_hh_s0  = 1911,
1927
    M2_mpyud_hh_s1  = 1912,
1928
    M2_mpyud_hl_s0  = 1913,
1929
    M2_mpyud_hl_s1  = 1914,
1930
    M2_mpyud_lh_s0  = 1915,
1931
    M2_mpyud_lh_s1  = 1916,
1932
    M2_mpyud_ll_s0  = 1917,
1933
    M2_mpyud_ll_s1  = 1918,
1934
    M2_mpyud_nac_hh_s0  = 1919,
1935
    M2_mpyud_nac_hh_s1  = 1920,
1936
    M2_mpyud_nac_hl_s0  = 1921,
1937
    M2_mpyud_nac_hl_s1  = 1922,
1938
    M2_mpyud_nac_lh_s0  = 1923,
1939
    M2_mpyud_nac_lh_s1  = 1924,
1940
    M2_mpyud_nac_ll_s0  = 1925,
1941
    M2_mpyud_nac_ll_s1  = 1926,
1942
    M2_nacci  = 1927,
1943
    M2_naccii = 1928,
1944
    M2_subacc = 1929,
1945
    M2_vabsdiffh  = 1930,
1946
    M2_vabsdiffw  = 1931,
1947
    M2_vcmac_s0_sat_i = 1932,
1948
    M2_vcmac_s0_sat_r = 1933,
1949
    M2_vcmpy_s0_sat_i = 1934,
1950
    M2_vcmpy_s0_sat_r = 1935,
1951
    M2_vcmpy_s1_sat_i = 1936,
1952
    M2_vcmpy_s1_sat_r = 1937,
1953
    M2_vdmacs_s0  = 1938,
1954
    M2_vdmacs_s1  = 1939,
1955
    M2_vdmpyrs_s0 = 1940,
1956
    M2_vdmpyrs_s1 = 1941,
1957
    M2_vdmpys_s0  = 1942,
1958
    M2_vdmpys_s1  = 1943,
1959
    M2_vmac2  = 1944,
1960
    M2_vmac2es  = 1945,
1961
    M2_vmac2es_s0 = 1946,
1962
    M2_vmac2es_s1 = 1947,
1963
    M2_vmac2s_s0  = 1948,
1964
    M2_vmac2s_s1  = 1949,
1965
    M2_vmac2su_s0 = 1950,
1966
    M2_vmac2su_s1 = 1951,
1967
    M2_vmpy2es_s0 = 1952,
1968
    M2_vmpy2es_s1 = 1953,
1969
    M2_vmpy2s_s0  = 1954,
1970
    M2_vmpy2s_s0pack  = 1955,
1971
    M2_vmpy2s_s1  = 1956,
1972
    M2_vmpy2s_s1pack  = 1957,
1973
    M2_vmpy2su_s0 = 1958,
1974
    M2_vmpy2su_s1 = 1959,
1975
    M2_vraddh = 1960,
1976
    M2_vradduh  = 1961,
1977
    M2_vrcmaci_s0 = 1962,
1978
    M2_vrcmaci_s0c  = 1963,
1979
    M2_vrcmacr_s0 = 1964,
1980
    M2_vrcmacr_s0c  = 1965,
1981
    M2_vrcmpyi_s0 = 1966,
1982
    M2_vrcmpyi_s0c  = 1967,
1983
    M2_vrcmpyr_s0 = 1968,
1984
    M2_vrcmpyr_s0c  = 1969,
1985
    M2_vrcmpys_acc_s1_h = 1970,
1986
    M2_vrcmpys_acc_s1_l = 1971,
1987
    M2_vrcmpys_s1_h = 1972,
1988
    M2_vrcmpys_s1_l = 1973,
1989
    M2_vrcmpys_s1rp_h = 1974,
1990
    M2_vrcmpys_s1rp_l = 1975,
1991
    M2_vrmac_s0 = 1976,
1992
    M2_vrmpy_s0 = 1977,
1993
    M2_xor_xacc = 1978,
1994
    M4_and_and  = 1979,
1995
    M4_and_andn = 1980,
1996
    M4_and_or = 1981,
1997
    M4_and_xor  = 1982,
1998
    M4_cmpyi_wh = 1983,
1999
    M4_cmpyi_whc  = 1984,
2000
    M4_cmpyr_wh = 1985,
2001
    M4_cmpyr_whc  = 1986,
2002
    M4_mac_up_s1_sat  = 1987,
2003
    M4_mpyri_addi = 1988,
2004
    M4_mpyri_addr = 1989,
2005
    M4_mpyri_addr_u2  = 1990,
2006
    M4_mpyrr_addi = 1991,
2007
    M4_mpyrr_addr = 1992,
2008
    M4_nac_up_s1_sat  = 1993,
2009
    M4_or_and = 1994,
2010
    M4_or_andn  = 1995,
2011
    M4_or_or  = 1996,
2012
    M4_or_xor = 1997,
2013
    M4_pmpyw  = 1998,
2014
    M4_pmpyw_acc  = 1999,
2015
    M4_vpmpyh = 2000,
2016
    M4_vpmpyh_acc = 2001,
2017
    M4_vrmpyeh_acc_s0 = 2002,
2018
    M4_vrmpyeh_acc_s1 = 2003,
2019
    M4_vrmpyeh_s0 = 2004,
2020
    M4_vrmpyeh_s1 = 2005,
2021
    M4_vrmpyoh_acc_s0 = 2006,
2022
    M4_vrmpyoh_acc_s1 = 2007,
2023
    M4_vrmpyoh_s0 = 2008,
2024
    M4_vrmpyoh_s1 = 2009,
2025
    M4_xor_and  = 2010,
2026
    M4_xor_andn = 2011,
2027
    M4_xor_or = 2012,
2028
    M4_xor_xacc = 2013,
2029
    M5_vdmacbsu = 2014,
2030
    M5_vdmpybsu = 2015,
2031
    M5_vmacbsu  = 2016,
2032
    M5_vmacbuu  = 2017,
2033
    M5_vmpybsu  = 2018,
2034
    M5_vmpybuu  = 2019,
2035
    M5_vrmacbsu = 2020,
2036
    M5_vrmacbuu = 2021,
2037
    M5_vrmpybsu = 2022,
2038
    M5_vrmpybuu = 2023,
2039
    M6_vabsdiffb  = 2024,
2040
    M6_vabsdiffub = 2025,
2041
    M7_dcmpyiw  = 2026,
2042
    M7_dcmpyiw_acc  = 2027,
2043
    M7_dcmpyiwc = 2028,
2044
    M7_dcmpyiwc_acc = 2029,
2045
    M7_dcmpyrw  = 2030,
2046
    M7_dcmpyrw_acc  = 2031,
2047
    M7_dcmpyrwc = 2032,
2048
    M7_dcmpyrwc_acc = 2033,
2049
    M7_wcmpyiw  = 2034,
2050
    M7_wcmpyiw_rnd  = 2035,
2051
    M7_wcmpyiwc = 2036,
2052
    M7_wcmpyiwc_rnd = 2037,
2053
    M7_wcmpyrw  = 2038,
2054
    M7_wcmpyrw_rnd  = 2039,
2055
    M7_wcmpyrwc = 2040,
2056
    M7_wcmpyrwc_rnd = 2041,
2057
    PS_call_stk = 2042,
2058
    PS_callr_nr = 2043,
2059
    PS_jmpret = 2044,
2060
    PS_jmpretf  = 2045,
2061
    PS_jmpretfnew = 2046,
2062
    PS_jmpretfnewpt = 2047,
2063
    PS_jmprett  = 2048,
2064
    PS_jmprettnew = 2049,
2065
    PS_jmprettnewpt = 2050,
2066
    PS_loadrbabs  = 2051,
2067
    PS_loadrdabs  = 2052,
2068
    PS_loadrhabs  = 2053,
2069
    PS_loadriabs  = 2054,
2070
    PS_loadrubabs = 2055,
2071
    PS_loadruhabs = 2056,
2072
    PS_storerbabs = 2057,
2073
    PS_storerbnewabs  = 2058,
2074
    PS_storerdabs = 2059,
2075
    PS_storerfabs = 2060,
2076
    PS_storerhabs = 2061,
2077
    PS_storerhnewabs  = 2062,
2078
    PS_storeriabs = 2063,
2079
    PS_storerinewabs  = 2064,
2080
    PS_trap1  = 2065,
2081
    R6_release_at_vi  = 2066,
2082
    R6_release_st_vi  = 2067,
2083
    RESTORE_DEALLOC_BEFORE_TAILCALL_V4  = 2068,
2084
    RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT  = 2069,
2085
    RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC  = 2070,
2086
    RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC  = 2071,
2087
    RESTORE_DEALLOC_RET_JMP_V4  = 2072,
2088
    RESTORE_DEALLOC_RET_JMP_V4_EXT  = 2073,
2089
    RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC  = 2074,
2090
    RESTORE_DEALLOC_RET_JMP_V4_PIC  = 2075,
2091
    S2_addasl_rrri  = 2076,
2092
    S2_allocframe = 2077,
2093
    S2_asl_i_p  = 2078,
2094
    S2_asl_i_p_acc  = 2079,
2095
    S2_asl_i_p_and  = 2080,
2096
    S2_asl_i_p_nac  = 2081,
2097
    S2_asl_i_p_or = 2082,
2098
    S2_asl_i_p_xacc = 2083,
2099
    S2_asl_i_r  = 2084,
2100
    S2_asl_i_r_acc  = 2085,
2101
    S2_asl_i_r_and  = 2086,
2102
    S2_asl_i_r_nac  = 2087,
2103
    S2_asl_i_r_or = 2088,
2104
    S2_asl_i_r_sat  = 2089,
2105
    S2_asl_i_r_xacc = 2090,
2106
    S2_asl_i_vh = 2091,
2107
    S2_asl_i_vw = 2092,
2108
    S2_asl_r_p  = 2093,
2109
    S2_asl_r_p_acc  = 2094,
2110
    S2_asl_r_p_and  = 2095,
2111
    S2_asl_r_p_nac  = 2096,
2112
    S2_asl_r_p_or = 2097,
2113
    S2_asl_r_p_xor  = 2098,
2114
    S2_asl_r_r  = 2099,
2115
    S2_asl_r_r_acc  = 2100,
2116
    S2_asl_r_r_and  = 2101,
2117
    S2_asl_r_r_nac  = 2102,
2118
    S2_asl_r_r_or = 2103,
2119
    S2_asl_r_r_sat  = 2104,
2120
    S2_asl_r_vh = 2105,
2121
    S2_asl_r_vw = 2106,
2122
    S2_asr_i_p  = 2107,
2123
    S2_asr_i_p_acc  = 2108,
2124
    S2_asr_i_p_and  = 2109,
2125
    S2_asr_i_p_nac  = 2110,
2126
    S2_asr_i_p_or = 2111,
2127
    S2_asr_i_p_rnd  = 2112,
2128
    S2_asr_i_r  = 2113,
2129
    S2_asr_i_r_acc  = 2114,
2130
    S2_asr_i_r_and  = 2115,
2131
    S2_asr_i_r_nac  = 2116,
2132
    S2_asr_i_r_or = 2117,
2133
    S2_asr_i_r_rnd  = 2118,
2134
    S2_asr_i_svw_trun = 2119,
2135
    S2_asr_i_vh = 2120,
2136
    S2_asr_i_vw = 2121,
2137
    S2_asr_r_p  = 2122,
2138
    S2_asr_r_p_acc  = 2123,
2139
    S2_asr_r_p_and  = 2124,
2140
    S2_asr_r_p_nac  = 2125,
2141
    S2_asr_r_p_or = 2126,
2142
    S2_asr_r_p_xor  = 2127,
2143
    S2_asr_r_r  = 2128,
2144
    S2_asr_r_r_acc  = 2129,
2145
    S2_asr_r_r_and  = 2130,
2146
    S2_asr_r_r_nac  = 2131,
2147
    S2_asr_r_r_or = 2132,
2148
    S2_asr_r_r_sat  = 2133,
2149
    S2_asr_r_svw_trun = 2134,
2150
    S2_asr_r_vh = 2135,
2151
    S2_asr_r_vw = 2136,
2152
    S2_brev = 2137,
2153
    S2_brevp  = 2138,
2154
    S2_cabacdecbin  = 2139,
2155
    S2_cl0  = 2140,
2156
    S2_cl0p = 2141,
2157
    S2_cl1  = 2142,
2158
    S2_cl1p = 2143,
2159
    S2_clb  = 2144,
2160
    S2_clbnorm  = 2145,
2161
    S2_clbp = 2146,
2162
    S2_clrbit_i = 2147,
2163
    S2_clrbit_r = 2148,
2164
    S2_ct0  = 2149,
2165
    S2_ct0p = 2150,
2166
    S2_ct1  = 2151,
2167
    S2_ct1p = 2152,
2168
    S2_deinterleave = 2153,
2169
    S2_extractu = 2154,
2170
    S2_extractu_rp  = 2155,
2171
    S2_extractup  = 2156,
2172
    S2_extractup_rp = 2157,
2173
    S2_insert = 2158,
2174
    S2_insert_rp  = 2159,
2175
    S2_insertp  = 2160,
2176
    S2_insertp_rp = 2161,
2177
    S2_interleave = 2162,
2178
    S2_lfsp = 2163,
2179
    S2_lsl_r_p  = 2164,
2180
    S2_lsl_r_p_acc  = 2165,
2181
    S2_lsl_r_p_and  = 2166,
2182
    S2_lsl_r_p_nac  = 2167,
2183
    S2_lsl_r_p_or = 2168,
2184
    S2_lsl_r_p_xor  = 2169,
2185
    S2_lsl_r_r  = 2170,
2186
    S2_lsl_r_r_acc  = 2171,
2187
    S2_lsl_r_r_and  = 2172,
2188
    S2_lsl_r_r_nac  = 2173,
2189
    S2_lsl_r_r_or = 2174,
2190
    S2_lsl_r_vh = 2175,
2191
    S2_lsl_r_vw = 2176,
2192
    S2_lsr_i_p  = 2177,
2193
    S2_lsr_i_p_acc  = 2178,
2194
    S2_lsr_i_p_and  = 2179,
2195
    S2_lsr_i_p_nac  = 2180,
2196
    S2_lsr_i_p_or = 2181,
2197
    S2_lsr_i_p_xacc = 2182,
2198
    S2_lsr_i_r  = 2183,
2199
    S2_lsr_i_r_acc  = 2184,
2200
    S2_lsr_i_r_and  = 2185,
2201
    S2_lsr_i_r_nac  = 2186,
2202
    S2_lsr_i_r_or = 2187,
2203
    S2_lsr_i_r_xacc = 2188,
2204
    S2_lsr_i_vh = 2189,
2205
    S2_lsr_i_vw = 2190,
2206
    S2_lsr_r_p  = 2191,
2207
    S2_lsr_r_p_acc  = 2192,
2208
    S2_lsr_r_p_and  = 2193,
2209
    S2_lsr_r_p_nac  = 2194,
2210
    S2_lsr_r_p_or = 2195,
2211
    S2_lsr_r_p_xor  = 2196,
2212
    S2_lsr_r_r  = 2197,
2213
    S2_lsr_r_r_acc  = 2198,
2214
    S2_lsr_r_r_and  = 2199,
2215
    S2_lsr_r_r_nac  = 2200,
2216
    S2_lsr_r_r_or = 2201,
2217
    S2_lsr_r_vh = 2202,
2218
    S2_lsr_r_vw = 2203,
2219
    S2_mask = 2204,
2220
    S2_packhl = 2205,
2221
    S2_parityp  = 2206,
2222
    S2_pstorerbf_io = 2207,
2223
    S2_pstorerbf_pi = 2208,
2224
    S2_pstorerbfnew_pi  = 2209,
2225
    S2_pstorerbnewf_io  = 2210,
2226
    S2_pstorerbnewf_pi  = 2211,
2227
    S2_pstorerbnewfnew_pi = 2212,
2228
    S2_pstorerbnewt_io  = 2213,
2229
    S2_pstorerbnewt_pi  = 2214,
2230
    S2_pstorerbnewtnew_pi = 2215,
2231
    S2_pstorerbt_io = 2216,
2232
    S2_pstorerbt_pi = 2217,
2233
    S2_pstorerbtnew_pi  = 2218,
2234
    S2_pstorerdf_io = 2219,
2235
    S2_pstorerdf_pi = 2220,
2236
    S2_pstorerdfnew_pi  = 2221,
2237
    S2_pstorerdt_io = 2222,
2238
    S2_pstorerdt_pi = 2223,
2239
    S2_pstorerdtnew_pi  = 2224,
2240
    S2_pstorerff_io = 2225,
2241
    S2_pstorerff_pi = 2226,
2242
    S2_pstorerffnew_pi  = 2227,
2243
    S2_pstorerft_io = 2228,
2244
    S2_pstorerft_pi = 2229,
2245
    S2_pstorerftnew_pi  = 2230,
2246
    S2_pstorerhf_io = 2231,
2247
    S2_pstorerhf_pi = 2232,
2248
    S2_pstorerhfnew_pi  = 2233,
2249
    S2_pstorerhnewf_io  = 2234,
2250
    S2_pstorerhnewf_pi  = 2235,
2251
    S2_pstorerhnewfnew_pi = 2236,
2252
    S2_pstorerhnewt_io  = 2237,
2253
    S2_pstorerhnewt_pi  = 2238,
2254
    S2_pstorerhnewtnew_pi = 2239,
2255
    S2_pstorerht_io = 2240,
2256
    S2_pstorerht_pi = 2241,
2257
    S2_pstorerhtnew_pi  = 2242,
2258
    S2_pstorerif_io = 2243,
2259
    S2_pstorerif_pi = 2244,
2260
    S2_pstorerifnew_pi  = 2245,
2261
    S2_pstorerinewf_io  = 2246,
2262
    S2_pstorerinewf_pi  = 2247,
2263
    S2_pstorerinewfnew_pi = 2248,
2264
    S2_pstorerinewt_io  = 2249,
2265
    S2_pstorerinewt_pi  = 2250,
2266
    S2_pstorerinewtnew_pi = 2251,
2267
    S2_pstorerit_io = 2252,
2268
    S2_pstorerit_pi = 2253,
2269
    S2_pstoreritnew_pi  = 2254,
2270
    S2_setbit_i = 2255,
2271
    S2_setbit_r = 2256,
2272
    S2_shuffeb  = 2257,
2273
    S2_shuffeh  = 2258,
2274
    S2_shuffob  = 2259,
2275
    S2_shuffoh  = 2260,
2276
    S2_storerb_io = 2261,
2277
    S2_storerb_pbr  = 2262,
2278
    S2_storerb_pci  = 2263,
2279
    S2_storerb_pcr  = 2264,
2280
    S2_storerb_pi = 2265,
2281
    S2_storerb_pr = 2266,
2282
    S2_storerbgp  = 2267,
2283
    S2_storerbnew_io  = 2268,
2284
    S2_storerbnew_pbr = 2269,
2285
    S2_storerbnew_pci = 2270,
2286
    S2_storerbnew_pcr = 2271,
2287
    S2_storerbnew_pi  = 2272,
2288
    S2_storerbnew_pr  = 2273,
2289
    S2_storerbnewgp = 2274,
2290
    S2_storerd_io = 2275,
2291
    S2_storerd_pbr  = 2276,
2292
    S2_storerd_pci  = 2277,
2293
    S2_storerd_pcr  = 2278,
2294
    S2_storerd_pi = 2279,
2295
    S2_storerd_pr = 2280,
2296
    S2_storerdgp  = 2281,
2297
    S2_storerf_io = 2282,
2298
    S2_storerf_pbr  = 2283,
2299
    S2_storerf_pci  = 2284,
2300
    S2_storerf_pcr  = 2285,
2301
    S2_storerf_pi = 2286,
2302
    S2_storerf_pr = 2287,
2303
    S2_storerfgp  = 2288,
2304
    S2_storerh_io = 2289,
2305
    S2_storerh_pbr  = 2290,
2306
    S2_storerh_pci  = 2291,
2307
    S2_storerh_pcr  = 2292,
2308
    S2_storerh_pi = 2293,
2309
    S2_storerh_pr = 2294,
2310
    S2_storerhgp  = 2295,
2311
    S2_storerhnew_io  = 2296,
2312
    S2_storerhnew_pbr = 2297,
2313
    S2_storerhnew_pci = 2298,
2314
    S2_storerhnew_pcr = 2299,
2315
    S2_storerhnew_pi  = 2300,
2316
    S2_storerhnew_pr  = 2301,
2317
    S2_storerhnewgp = 2302,
2318
    S2_storeri_io = 2303,
2319
    S2_storeri_pbr  = 2304,
2320
    S2_storeri_pci  = 2305,
2321
    S2_storeri_pcr  = 2306,
2322
    S2_storeri_pi = 2307,
2323
    S2_storeri_pr = 2308,
2324
    S2_storerigp  = 2309,
2325
    S2_storerinew_io  = 2310,
2326
    S2_storerinew_pbr = 2311,
2327
    S2_storerinew_pci = 2312,
2328
    S2_storerinew_pcr = 2313,
2329
    S2_storerinew_pi  = 2314,
2330
    S2_storerinew_pr  = 2315,
2331
    S2_storerinewgp = 2316,
2332
    S2_storew_locked  = 2317,
2333
    S2_storew_rl_at_vi  = 2318,
2334
    S2_storew_rl_st_vi  = 2319,
2335
    S2_svsathb  = 2320,
2336
    S2_svsathub = 2321,
2337
    S2_tableidxb  = 2322,
2338
    S2_tableidxd  = 2323,
2339
    S2_tableidxh  = 2324,
2340
    S2_tableidxw  = 2325,
2341
    S2_togglebit_i  = 2326,
2342
    S2_togglebit_r  = 2327,
2343
    S2_tstbit_i = 2328,
2344
    S2_tstbit_r = 2329,
2345
    S2_valignib = 2330,
2346
    S2_valignrb = 2331,
2347
    S2_vcnegh = 2332,
2348
    S2_vcrotate = 2333,
2349
    S2_vrcnegh  = 2334,
2350
    S2_vrndpackwh = 2335,
2351
    S2_vrndpackwhs  = 2336,
2352
    S2_vsathb = 2337,
2353
    S2_vsathb_nopack  = 2338,
2354
    S2_vsathub  = 2339,
2355
    S2_vsathub_nopack = 2340,
2356
    S2_vsatwh = 2341,
2357
    S2_vsatwh_nopack  = 2342,
2358
    S2_vsatwuh  = 2343,
2359
    S2_vsatwuh_nopack = 2344,
2360
    S2_vsplatrb = 2345,
2361
    S2_vsplatrh = 2346,
2362
    S2_vspliceib  = 2347,
2363
    S2_vsplicerb  = 2348,
2364
    S2_vsxtbh = 2349,
2365
    S2_vsxthw = 2350,
2366
    S2_vtrunehb = 2351,
2367
    S2_vtrunewh = 2352,
2368
    S2_vtrunohb = 2353,
2369
    S2_vtrunowh = 2354,
2370
    S2_vzxtbh = 2355,
2371
    S2_vzxthw = 2356,
2372
    S4_addaddi  = 2357,
2373
    S4_addi_asl_ri  = 2358,
2374
    S4_addi_lsr_ri  = 2359,
2375
    S4_andi_asl_ri  = 2360,
2376
    S4_andi_lsr_ri  = 2361,
2377
    S4_clbaddi  = 2362,
2378
    S4_clbpaddi = 2363,
2379
    S4_clbpnorm = 2364,
2380
    S4_extract  = 2365,
2381
    S4_extract_rp = 2366,
2382
    S4_extractp = 2367,
2383
    S4_extractp_rp  = 2368,
2384
    S4_lsli = 2369,
2385
    S4_ntstbit_i  = 2370,
2386
    S4_ntstbit_r  = 2371,
2387
    S4_or_andi  = 2372,
2388
    S4_or_andix = 2373,
2389
    S4_or_ori = 2374,
2390
    S4_ori_asl_ri = 2375,
2391
    S4_ori_lsr_ri = 2376,
2392
    S4_parity = 2377,
2393
    S4_pstorerbf_abs  = 2378,
2394
    S4_pstorerbf_rr = 2379,
2395
    S4_pstorerbfnew_abs = 2380,
2396
    S4_pstorerbfnew_io  = 2381,
2397
    S4_pstorerbfnew_rr  = 2382,
2398
    S4_pstorerbnewf_abs = 2383,
2399
    S4_pstorerbnewf_rr  = 2384,
2400
    S4_pstorerbnewfnew_abs  = 2385,
2401
    S4_pstorerbnewfnew_io = 2386,
2402
    S4_pstorerbnewfnew_rr = 2387,
2403
    S4_pstorerbnewt_abs = 2388,
2404
    S4_pstorerbnewt_rr  = 2389,
2405
    S4_pstorerbnewtnew_abs  = 2390,
2406
    S4_pstorerbnewtnew_io = 2391,
2407
    S4_pstorerbnewtnew_rr = 2392,
2408
    S4_pstorerbt_abs  = 2393,
2409
    S4_pstorerbt_rr = 2394,
2410
    S4_pstorerbtnew_abs = 2395,
2411
    S4_pstorerbtnew_io  = 2396,
2412
    S4_pstorerbtnew_rr  = 2397,
2413
    S4_pstorerdf_abs  = 2398,
2414
    S4_pstorerdf_rr = 2399,
2415
    S4_pstorerdfnew_abs = 2400,
2416
    S4_pstorerdfnew_io  = 2401,
2417
    S4_pstorerdfnew_rr  = 2402,
2418
    S4_pstorerdt_abs  = 2403,
2419
    S4_pstorerdt_rr = 2404,
2420
    S4_pstorerdtnew_abs = 2405,
2421
    S4_pstorerdtnew_io  = 2406,
2422
    S4_pstorerdtnew_rr  = 2407,
2423
    S4_pstorerff_abs  = 2408,
2424
    S4_pstorerff_rr = 2409,
2425
    S4_pstorerffnew_abs = 2410,
2426
    S4_pstorerffnew_io  = 2411,
2427
    S4_pstorerffnew_rr  = 2412,
2428
    S4_pstorerft_abs  = 2413,
2429
    S4_pstorerft_rr = 2414,
2430
    S4_pstorerftnew_abs = 2415,
2431
    S4_pstorerftnew_io  = 2416,
2432
    S4_pstorerftnew_rr  = 2417,
2433
    S4_pstorerhf_abs  = 2418,
2434
    S4_pstorerhf_rr = 2419,
2435
    S4_pstorerhfnew_abs = 2420,
2436
    S4_pstorerhfnew_io  = 2421,
2437
    S4_pstorerhfnew_rr  = 2422,
2438
    S4_pstorerhnewf_abs = 2423,
2439
    S4_pstorerhnewf_rr  = 2424,
2440
    S4_pstorerhnewfnew_abs  = 2425,
2441
    S4_pstorerhnewfnew_io = 2426,
2442
    S4_pstorerhnewfnew_rr = 2427,
2443
    S4_pstorerhnewt_abs = 2428,
2444
    S4_pstorerhnewt_rr  = 2429,
2445
    S4_pstorerhnewtnew_abs  = 2430,
2446
    S4_pstorerhnewtnew_io = 2431,
2447
    S4_pstorerhnewtnew_rr = 2432,
2448
    S4_pstorerht_abs  = 2433,
2449
    S4_pstorerht_rr = 2434,
2450
    S4_pstorerhtnew_abs = 2435,
2451
    S4_pstorerhtnew_io  = 2436,
2452
    S4_pstorerhtnew_rr  = 2437,
2453
    S4_pstorerif_abs  = 2438,
2454
    S4_pstorerif_rr = 2439,
2455
    S4_pstorerifnew_abs = 2440,
2456
    S4_pstorerifnew_io  = 2441,
2457
    S4_pstorerifnew_rr  = 2442,
2458
    S4_pstorerinewf_abs = 2443,
2459
    S4_pstorerinewf_rr  = 2444,
2460
    S4_pstorerinewfnew_abs  = 2445,
2461
    S4_pstorerinewfnew_io = 2446,
2462
    S4_pstorerinewfnew_rr = 2447,
2463
    S4_pstorerinewt_abs = 2448,
2464
    S4_pstorerinewt_rr  = 2449,
2465
    S4_pstorerinewtnew_abs  = 2450,
2466
    S4_pstorerinewtnew_io = 2451,
2467
    S4_pstorerinewtnew_rr = 2452,
2468
    S4_pstorerit_abs  = 2453,
2469
    S4_pstorerit_rr = 2454,
2470
    S4_pstoreritnew_abs = 2455,
2471
    S4_pstoreritnew_io  = 2456,
2472
    S4_pstoreritnew_rr  = 2457,
2473
    S4_stored_locked  = 2458,
2474
    S4_stored_rl_at_vi  = 2459,
2475
    S4_stored_rl_st_vi  = 2460,
2476
    S4_storeirb_io  = 2461,
2477
    S4_storeirbf_io = 2462,
2478
    S4_storeirbfnew_io  = 2463,
2479
    S4_storeirbt_io = 2464,
2480
    S4_storeirbtnew_io  = 2465,
2481
    S4_storeirh_io  = 2466,
2482
    S4_storeirhf_io = 2467,
2483
    S4_storeirhfnew_io  = 2468,
2484
    S4_storeirht_io = 2469,
2485
    S4_storeirhtnew_io  = 2470,
2486
    S4_storeiri_io  = 2471,
2487
    S4_storeirif_io = 2472,
2488
    S4_storeirifnew_io  = 2473,
2489
    S4_storeirit_io = 2474,
2490
    S4_storeiritnew_io  = 2475,
2491
    S4_storerb_ap = 2476,
2492
    S4_storerb_rr = 2477,
2493
    S4_storerb_ur = 2478,
2494
    S4_storerbnew_ap  = 2479,
2495
    S4_storerbnew_rr  = 2480,
2496
    S4_storerbnew_ur  = 2481,
2497
    S4_storerd_ap = 2482,
2498
    S4_storerd_rr = 2483,
2499
    S4_storerd_ur = 2484,
2500
    S4_storerf_ap = 2485,
2501
    S4_storerf_rr = 2486,
2502
    S4_storerf_ur = 2487,
2503
    S4_storerh_ap = 2488,
2504
    S4_storerh_rr = 2489,
2505
    S4_storerh_ur = 2490,
2506
    S4_storerhnew_ap  = 2491,
2507
    S4_storerhnew_rr  = 2492,
2508
    S4_storerhnew_ur  = 2493,
2509
    S4_storeri_ap = 2494,
2510
    S4_storeri_rr = 2495,
2511
    S4_storeri_ur = 2496,
2512
    S4_storerinew_ap  = 2497,
2513
    S4_storerinew_rr  = 2498,
2514
    S4_storerinew_ur  = 2499,
2515
    S4_subaddi  = 2500,
2516
    S4_subi_asl_ri  = 2501,
2517
    S4_subi_lsr_ri  = 2502,
2518
    S4_vrcrotate  = 2503,
2519
    S4_vrcrotate_acc  = 2504,
2520
    S4_vxaddsubh  = 2505,
2521
    S4_vxaddsubhr = 2506,
2522
    S4_vxaddsubw  = 2507,
2523
    S4_vxsubaddh  = 2508,
2524
    S4_vxsubaddhr = 2509,
2525
    S4_vxsubaddw  = 2510,
2526
    S5_asrhub_rnd_sat = 2511,
2527
    S5_asrhub_sat = 2512,
2528
    S5_popcountp  = 2513,
2529
    S5_vasrhrnd = 2514,
2530
    S6_rol_i_p  = 2515,
2531
    S6_rol_i_p_acc  = 2516,
2532
    S6_rol_i_p_and  = 2517,
2533
    S6_rol_i_p_nac  = 2518,
2534
    S6_rol_i_p_or = 2519,
2535
    S6_rol_i_p_xacc = 2520,
2536
    S6_rol_i_r  = 2521,
2537
    S6_rol_i_r_acc  = 2522,
2538
    S6_rol_i_r_and  = 2523,
2539
    S6_rol_i_r_nac  = 2524,
2540
    S6_rol_i_r_or = 2525,
2541
    S6_rol_i_r_xacc = 2526,
2542
    S6_vsplatrbp  = 2527,
2543
    S6_vtrunehb_ppp = 2528,
2544
    S6_vtrunohb_ppp = 2529,
2545
    SA1_addi  = 2530,
2546
    SA1_addrx = 2531,
2547
    SA1_addsp = 2532,
2548
    SA1_and1  = 2533,
2549
    SA1_clrf  = 2534,
2550
    SA1_clrfnew = 2535,
2551
    SA1_clrt  = 2536,
2552
    SA1_clrtnew = 2537,
2553
    SA1_cmpeqi  = 2538,
2554
    SA1_combine0i = 2539,
2555
    SA1_combine1i = 2540,
2556
    SA1_combine2i = 2541,
2557
    SA1_combine3i = 2542,
2558
    SA1_combinerz = 2543,
2559
    SA1_combinezr = 2544,
2560
    SA1_dec = 2545,
2561
    SA1_inc = 2546,
2562
    SA1_seti  = 2547,
2563
    SA1_setin1  = 2548,
2564
    SA1_sxtb  = 2549,
2565
    SA1_sxth  = 2550,
2566
    SA1_tfr = 2551,
2567
    SA1_zxtb  = 2552,
2568
    SA1_zxth  = 2553,
2569
    SAVE_REGISTERS_CALL_V4  = 2554,
2570
    SAVE_REGISTERS_CALL_V4STK = 2555,
2571
    SAVE_REGISTERS_CALL_V4STK_EXT = 2556,
2572
    SAVE_REGISTERS_CALL_V4STK_EXT_PIC = 2557,
2573
    SAVE_REGISTERS_CALL_V4STK_PIC = 2558,
2574
    SAVE_REGISTERS_CALL_V4_EXT  = 2559,
2575
    SAVE_REGISTERS_CALL_V4_EXT_PIC  = 2560,
2576
    SAVE_REGISTERS_CALL_V4_PIC  = 2561,
2577
    SL1_loadri_io = 2562,
2578
    SL1_loadrub_io  = 2563,
2579
    SL2_deallocframe  = 2564,
2580
    SL2_jumpr31 = 2565,
2581
    SL2_jumpr31_f = 2566,
2582
    SL2_jumpr31_fnew  = 2567,
2583
    SL2_jumpr31_t = 2568,
2584
    SL2_jumpr31_tnew  = 2569,
2585
    SL2_loadrb_io = 2570,
2586
    SL2_loadrd_sp = 2571,
2587
    SL2_loadrh_io = 2572,
2588
    SL2_loadri_sp = 2573,
2589
    SL2_loadruh_io  = 2574,
2590
    SL2_return  = 2575,
2591
    SL2_return_f  = 2576,
2592
    SL2_return_fnew = 2577,
2593
    SL2_return_t  = 2578,
2594
    SL2_return_tnew = 2579,
2595
    SS1_storeb_io = 2580,
2596
    SS1_storew_io = 2581,
2597
    SS2_allocframe  = 2582,
2598
    SS2_storebi0  = 2583,
2599
    SS2_storebi1  = 2584,
2600
    SS2_stored_sp = 2585,
2601
    SS2_storeh_io = 2586,
2602
    SS2_storew_sp = 2587,
2603
    SS2_storewi0  = 2588,
2604
    SS2_storewi1  = 2589,
2605
    TFRI64_V2_ext = 2590,
2606
    TFRI64_V4 = 2591,
2607
    V6_extractw = 2592,
2608
    V6_lvsplatb = 2593,
2609
    V6_lvsplath = 2594,
2610
    V6_lvsplatw = 2595,
2611
    V6_pred_and = 2596,
2612
    V6_pred_and_n = 2597,
2613
    V6_pred_not = 2598,
2614
    V6_pred_or  = 2599,
2615
    V6_pred_or_n  = 2600,
2616
    V6_pred_scalar2 = 2601,
2617
    V6_pred_scalar2v2 = 2602,
2618
    V6_pred_xor = 2603,
2619
    V6_shuffeqh = 2604,
2620
    V6_shuffeqw = 2605,
2621
    V6_v6mpyhubs10  = 2606,
2622
    V6_v6mpyhubs10_vxx  = 2607,
2623
    V6_v6mpyvubs10  = 2608,
2624
    V6_v6mpyvubs10_vxx  = 2609,
2625
    V6_vL32Ub_ai  = 2610,
2626
    V6_vL32Ub_pi  = 2611,
2627
    V6_vL32Ub_ppu = 2612,
2628
    V6_vL32b_ai = 2613,
2629
    V6_vL32b_cur_ai = 2614,
2630
    V6_vL32b_cur_npred_ai = 2615,
2631
    V6_vL32b_cur_npred_pi = 2616,
2632
    V6_vL32b_cur_npred_ppu  = 2617,
2633
    V6_vL32b_cur_pi = 2618,
2634
    V6_vL32b_cur_ppu  = 2619,
2635
    V6_vL32b_cur_pred_ai  = 2620,
2636
    V6_vL32b_cur_pred_pi  = 2621,
2637
    V6_vL32b_cur_pred_ppu = 2622,
2638
    V6_vL32b_npred_ai = 2623,
2639
    V6_vL32b_npred_pi = 2624,
2640
    V6_vL32b_npred_ppu  = 2625,
2641
    V6_vL32b_nt_ai  = 2626,
2642
    V6_vL32b_nt_cur_ai  = 2627,
2643
    V6_vL32b_nt_cur_npred_ai  = 2628,
2644
    V6_vL32b_nt_cur_npred_pi  = 2629,
2645
    V6_vL32b_nt_cur_npred_ppu = 2630,
2646
    V6_vL32b_nt_cur_pi  = 2631,
2647
    V6_vL32b_nt_cur_ppu = 2632,
2648
    V6_vL32b_nt_cur_pred_ai = 2633,
2649
    V6_vL32b_nt_cur_pred_pi = 2634,
2650
    V6_vL32b_nt_cur_pred_ppu  = 2635,
2651
    V6_vL32b_nt_npred_ai  = 2636,
2652
    V6_vL32b_nt_npred_pi  = 2637,
2653
    V6_vL32b_nt_npred_ppu = 2638,
2654
    V6_vL32b_nt_pi  = 2639,
2655
    V6_vL32b_nt_ppu = 2640,
2656
    V6_vL32b_nt_pred_ai = 2641,
2657
    V6_vL32b_nt_pred_pi = 2642,
2658
    V6_vL32b_nt_pred_ppu  = 2643,
2659
    V6_vL32b_nt_tmp_ai  = 2644,
2660
    V6_vL32b_nt_tmp_npred_ai  = 2645,
2661
    V6_vL32b_nt_tmp_npred_pi  = 2646,
2662
    V6_vL32b_nt_tmp_npred_ppu = 2647,
2663
    V6_vL32b_nt_tmp_pi  = 2648,
2664
    V6_vL32b_nt_tmp_ppu = 2649,
2665
    V6_vL32b_nt_tmp_pred_ai = 2650,
2666
    V6_vL32b_nt_tmp_pred_pi = 2651,
2667
    V6_vL32b_nt_tmp_pred_ppu  = 2652,
2668
    V6_vL32b_pi = 2653,
2669
    V6_vL32b_ppu  = 2654,
2670
    V6_vL32b_pred_ai  = 2655,
2671
    V6_vL32b_pred_pi  = 2656,
2672
    V6_vL32b_pred_ppu = 2657,
2673
    V6_vL32b_tmp_ai = 2658,
2674
    V6_vL32b_tmp_npred_ai = 2659,
2675
    V6_vL32b_tmp_npred_pi = 2660,
2676
    V6_vL32b_tmp_npred_ppu  = 2661,
2677
    V6_vL32b_tmp_pi = 2662,
2678
    V6_vL32b_tmp_ppu  = 2663,
2679
    V6_vL32b_tmp_pred_ai  = 2664,
2680
    V6_vL32b_tmp_pred_pi  = 2665,
2681
    V6_vL32b_tmp_pred_ppu = 2666,
2682
    V6_vS32Ub_ai  = 2667,
2683
    V6_vS32Ub_npred_ai  = 2668,
2684
    V6_vS32Ub_npred_pi  = 2669,
2685
    V6_vS32Ub_npred_ppu = 2670,
2686
    V6_vS32Ub_pi  = 2671,
2687
    V6_vS32Ub_ppu = 2672,
2688
    V6_vS32Ub_pred_ai = 2673,
2689
    V6_vS32Ub_pred_pi = 2674,
2690
    V6_vS32Ub_pred_ppu  = 2675,
2691
    V6_vS32b_ai = 2676,
2692
    V6_vS32b_new_ai = 2677,
2693
    V6_vS32b_new_npred_ai = 2678,
2694
    V6_vS32b_new_npred_pi = 2679,
2695
    V6_vS32b_new_npred_ppu  = 2680,
2696
    V6_vS32b_new_pi = 2681,
2697
    V6_vS32b_new_ppu  = 2682,
2698
    V6_vS32b_new_pred_ai  = 2683,
2699
    V6_vS32b_new_pred_pi  = 2684,
2700
    V6_vS32b_new_pred_ppu = 2685,
2701
    V6_vS32b_npred_ai = 2686,
2702
    V6_vS32b_npred_pi = 2687,
2703
    V6_vS32b_npred_ppu  = 2688,
2704
    V6_vS32b_nqpred_ai  = 2689,
2705
    V6_vS32b_nqpred_pi  = 2690,
2706
    V6_vS32b_nqpred_ppu = 2691,
2707
    V6_vS32b_nt_ai  = 2692,
2708
    V6_vS32b_nt_new_ai  = 2693,
2709
    V6_vS32b_nt_new_npred_ai  = 2694,
2710
    V6_vS32b_nt_new_npred_pi  = 2695,
2711
    V6_vS32b_nt_new_npred_ppu = 2696,
2712
    V6_vS32b_nt_new_pi  = 2697,
2713
    V6_vS32b_nt_new_ppu = 2698,
2714
    V6_vS32b_nt_new_pred_ai = 2699,
2715
    V6_vS32b_nt_new_pred_pi = 2700,
2716
    V6_vS32b_nt_new_pred_ppu  = 2701,
2717
    V6_vS32b_nt_npred_ai  = 2702,
2718
    V6_vS32b_nt_npred_pi  = 2703,
2719
    V6_vS32b_nt_npred_ppu = 2704,
2720
    V6_vS32b_nt_nqpred_ai = 2705,
2721
    V6_vS32b_nt_nqpred_pi = 2706,
2722
    V6_vS32b_nt_nqpred_ppu  = 2707,
2723
    V6_vS32b_nt_pi  = 2708,
2724
    V6_vS32b_nt_ppu = 2709,
2725
    V6_vS32b_nt_pred_ai = 2710,
2726
    V6_vS32b_nt_pred_pi = 2711,
2727
    V6_vS32b_nt_pred_ppu  = 2712,
2728
    V6_vS32b_nt_qpred_ai  = 2713,
2729
    V6_vS32b_nt_qpred_pi  = 2714,
2730
    V6_vS32b_nt_qpred_ppu = 2715,
2731
    V6_vS32b_pi = 2716,
2732
    V6_vS32b_ppu  = 2717,
2733
    V6_vS32b_pred_ai  = 2718,
2734
    V6_vS32b_pred_pi  = 2719,
2735
    V6_vS32b_pred_ppu = 2720,
2736
    V6_vS32b_qpred_ai = 2721,
2737
    V6_vS32b_qpred_pi = 2722,
2738
    V6_vS32b_qpred_ppu  = 2723,
2739
    V6_vS32b_srls_ai  = 2724,
2740
    V6_vS32b_srls_pi  = 2725,
2741
    V6_vS32b_srls_ppu = 2726,
2742
    V6_vabs_hf  = 2727,
2743
    V6_vabs_sf  = 2728,
2744
    V6_vabsb  = 2729,
2745
    V6_vabsb_sat  = 2730,
2746
    V6_vabsdiffh  = 2731,
2747
    V6_vabsdiffub = 2732,
2748
    V6_vabsdiffuh = 2733,
2749
    V6_vabsdiffw  = 2734,
2750
    V6_vabsh  = 2735,
2751
    V6_vabsh_sat  = 2736,
2752
    V6_vabsw  = 2737,
2753
    V6_vabsw_sat  = 2738,
2754
    V6_vadd_hf  = 2739,
2755
    V6_vadd_hf_hf = 2740,
2756
    V6_vadd_qf16  = 2741,
2757
    V6_vadd_qf16_mix  = 2742,
2758
    V6_vadd_qf32  = 2743,
2759
    V6_vadd_qf32_mix  = 2744,
2760
    V6_vadd_sf  = 2745,
2761
    V6_vadd_sf_bf = 2746,
2762
    V6_vadd_sf_hf = 2747,
2763
    V6_vadd_sf_sf = 2748,
2764
    V6_vaddb  = 2749,
2765
    V6_vaddb_dv = 2750,
2766
    V6_vaddbnq  = 2751,
2767
    V6_vaddbq = 2752,
2768
    V6_vaddbsat = 2753,
2769
    V6_vaddbsat_dv  = 2754,
2770
    V6_vaddcarry  = 2755,
2771
    V6_vaddcarryo = 2756,
2772
    V6_vaddcarrysat = 2757,
2773
    V6_vaddclbh = 2758,
2774
    V6_vaddclbw = 2759,
2775
    V6_vaddh  = 2760,
2776
    V6_vaddh_dv = 2761,
2777
    V6_vaddhnq  = 2762,
2778
    V6_vaddhq = 2763,
2779
    V6_vaddhsat = 2764,
2780
    V6_vaddhsat_dv  = 2765,
2781
    V6_vaddhw = 2766,
2782
    V6_vaddhw_acc = 2767,
2783
    V6_vaddubh  = 2768,
2784
    V6_vaddubh_acc  = 2769,
2785
    V6_vaddubsat  = 2770,
2786
    V6_vaddubsat_dv = 2771,
2787
    V6_vaddububb_sat  = 2772,
2788
    V6_vadduhsat  = 2773,
2789
    V6_vadduhsat_dv = 2774,
2790
    V6_vadduhw  = 2775,
2791
    V6_vadduhw_acc  = 2776,
2792
    V6_vadduwsat  = 2777,
2793
    V6_vadduwsat_dv = 2778,
2794
    V6_vaddw  = 2779,
2795
    V6_vaddw_dv = 2780,
2796
    V6_vaddwnq  = 2781,
2797
    V6_vaddwq = 2782,
2798
    V6_vaddwsat = 2783,
2799
    V6_vaddwsat_dv  = 2784,
2800
    V6_valignb  = 2785,
2801
    V6_valignbi = 2786,
2802
    V6_vand = 2787,
2803
    V6_vandnqrt = 2788,
2804
    V6_vandnqrt_acc = 2789,
2805
    V6_vandqrt  = 2790,
2806
    V6_vandqrt_acc  = 2791,
2807
    V6_vandvnqv = 2792,
2808
    V6_vandvqv  = 2793,
2809
    V6_vandvrt  = 2794,
2810
    V6_vandvrt_acc  = 2795,
2811
    V6_vaslh  = 2796,
2812
    V6_vaslh_acc  = 2797,
2813
    V6_vaslhv = 2798,
2814
    V6_vaslw  = 2799,
2815
    V6_vaslw_acc  = 2800,
2816
    V6_vaslwv = 2801,
2817
    V6_vasr_into  = 2802,
2818
    V6_vasrh  = 2803,
2819
    V6_vasrh_acc  = 2804,
2820
    V6_vasrhbrndsat = 2805,
2821
    V6_vasrhbsat  = 2806,
2822
    V6_vasrhubrndsat  = 2807,
2823
    V6_vasrhubsat = 2808,
2824
    V6_vasrhv = 2809,
2825
    V6_vasruhubrndsat = 2810,
2826
    V6_vasruhubsat  = 2811,
2827
    V6_vasruwuhrndsat = 2812,
2828
    V6_vasruwuhsat  = 2813,
2829
    V6_vasrvuhubrndsat  = 2814,
2830
    V6_vasrvuhubsat = 2815,
2831
    V6_vasrvwuhrndsat = 2816,
2832
    V6_vasrvwuhsat  = 2817,
2833
    V6_vasrw  = 2818,
2834
    V6_vasrw_acc  = 2819,
2835
    V6_vasrwh = 2820,
2836
    V6_vasrwhrndsat = 2821,
2837
    V6_vasrwhsat  = 2822,
2838
    V6_vasrwuhrndsat  = 2823,
2839
    V6_vasrwuhsat = 2824,
2840
    V6_vasrwv = 2825,
2841
    V6_vassign  = 2826,
2842
    V6_vassign_fp = 2827,
2843
    V6_vassign_tmp  = 2828,
2844
    V6_vavgb  = 2829,
2845
    V6_vavgbrnd = 2830,
2846
    V6_vavgh  = 2831,
2847
    V6_vavghrnd = 2832,
2848
    V6_vavgub = 2833,
2849
    V6_vavgubrnd  = 2834,
2850
    V6_vavguh = 2835,
2851
    V6_vavguhrnd  = 2836,
2852
    V6_vavguw = 2837,
2853
    V6_vavguwrnd  = 2838,
2854
    V6_vavgw  = 2839,
2855
    V6_vavgwrnd = 2840,
2856
    V6_vccombine  = 2841,
2857
    V6_vcl0h  = 2842,
2858
    V6_vcl0w  = 2843,
2859
    V6_vcmov  = 2844,
2860
    V6_vcombine = 2845,
2861
    V6_vcombine_tmp = 2846,
2862
    V6_vconv_h_hf = 2847,
2863
    V6_vconv_hf_h = 2848,
2864
    V6_vconv_hf_qf16  = 2849,
2865
    V6_vconv_hf_qf32  = 2850,
2866
    V6_vconv_sf_qf32  = 2851,
2867
    V6_vconv_sf_w = 2852,
2868
    V6_vconv_w_sf = 2853,
2869
    V6_vcvt_b_hf  = 2854,
2870
    V6_vcvt_bf_sf = 2855,
2871
    V6_vcvt_h_hf  = 2856,
2872
    V6_vcvt_hf_b  = 2857,
2873
    V6_vcvt_hf_h  = 2858,
2874
    V6_vcvt_hf_sf = 2859,
2875
    V6_vcvt_hf_ub = 2860,
2876
    V6_vcvt_hf_uh = 2861,
2877
    V6_vcvt_sf_hf = 2862,
2878
    V6_vcvt_ub_hf = 2863,
2879
    V6_vcvt_uh_hf = 2864,
2880
    V6_vdeal  = 2865,
2881
    V6_vdealb = 2866,
2882
    V6_vdealb4w = 2867,
2883
    V6_vdealh = 2868,
2884
    V6_vdealvdd = 2869,
2885
    V6_vdelta = 2870,
2886
    V6_vdmpy_sf_hf  = 2871,
2887
    V6_vdmpy_sf_hf_acc  = 2872,
2888
    V6_vdmpybus = 2873,
2889
    V6_vdmpybus_acc = 2874,
2890
    V6_vdmpybus_dv  = 2875,
2891
    V6_vdmpybus_dv_acc  = 2876,
2892
    V6_vdmpyhb  = 2877,
2893
    V6_vdmpyhb_acc  = 2878,
2894
    V6_vdmpyhb_dv = 2879,
2895
    V6_vdmpyhb_dv_acc = 2880,
2896
    V6_vdmpyhisat = 2881,
2897
    V6_vdmpyhisat_acc = 2882,
2898
    V6_vdmpyhsat  = 2883,
2899
    V6_vdmpyhsat_acc  = 2884,
2900
    V6_vdmpyhsuisat = 2885,
2901
    V6_vdmpyhsuisat_acc = 2886,
2902
    V6_vdmpyhsusat  = 2887,
2903
    V6_vdmpyhsusat_acc  = 2888,
2904
    V6_vdmpyhvsat = 2889,
2905
    V6_vdmpyhvsat_acc = 2890,
2906
    V6_vdsaduh  = 2891,
2907
    V6_vdsaduh_acc  = 2892,
2908
    V6_veqb = 2893,
2909
    V6_veqb_and = 2894,
2910
    V6_veqb_or  = 2895,
2911
    V6_veqb_xor = 2896,
2912
    V6_veqh = 2897,
2913
    V6_veqh_and = 2898,
2914
    V6_veqh_or  = 2899,
2915
    V6_veqh_xor = 2900,
2916
    V6_veqw = 2901,
2917
    V6_veqw_and = 2902,
2918
    V6_veqw_or  = 2903,
2919
    V6_veqw_xor = 2904,
2920
    V6_vfmax_hf = 2905,
2921
    V6_vfmax_sf = 2906,
2922
    V6_vfmin_hf = 2907,
2923
    V6_vfmin_sf = 2908,
2924
    V6_vfneg_hf = 2909,
2925
    V6_vfneg_sf = 2910,
2926
    V6_vgathermh  = 2911,
2927
    V6_vgathermhq = 2912,
2928
    V6_vgathermhw = 2913,
2929
    V6_vgathermhwq  = 2914,
2930
    V6_vgathermw  = 2915,
2931
    V6_vgathermwq = 2916,
2932
    V6_vgtb = 2917,
2933
    V6_vgtb_and = 2918,
2934
    V6_vgtb_or  = 2919,
2935
    V6_vgtb_xor = 2920,
2936
    V6_vgtbf  = 2921,
2937
    V6_vgtbf_and  = 2922,
2938
    V6_vgtbf_or = 2923,
2939
    V6_vgtbf_xor  = 2924,
2940
    V6_vgth = 2925,
2941
    V6_vgth_and = 2926,
2942
    V6_vgth_or  = 2927,
2943
    V6_vgth_xor = 2928,
2944
    V6_vgthf  = 2929,
2945
    V6_vgthf_and  = 2930,
2946
    V6_vgthf_or = 2931,
2947
    V6_vgthf_xor  = 2932,
2948
    V6_vgtsf  = 2933,
2949
    V6_vgtsf_and  = 2934,
2950
    V6_vgtsf_or = 2935,
2951
    V6_vgtsf_xor  = 2936,
2952
    V6_vgtub  = 2937,
2953
    V6_vgtub_and  = 2938,
2954
    V6_vgtub_or = 2939,
2955
    V6_vgtub_xor  = 2940,
2956
    V6_vgtuh  = 2941,
2957
    V6_vgtuh_and  = 2942,
2958
    V6_vgtuh_or = 2943,
2959
    V6_vgtuh_xor  = 2944,
2960
    V6_vgtuw  = 2945,
2961
    V6_vgtuw_and  = 2946,
2962
    V6_vgtuw_or = 2947,
2963
    V6_vgtuw_xor  = 2948,
2964
    V6_vgtw = 2949,
2965
    V6_vgtw_and = 2950,
2966
    V6_vgtw_or  = 2951,
2967
    V6_vgtw_xor = 2952,
2968
    V6_vhist  = 2953,
2969
    V6_vhistq = 2954,
2970
    V6_vinsertwr  = 2955,
2971
    V6_vlalignb = 2956,
2972
    V6_vlalignbi  = 2957,
2973
    V6_vlsrb  = 2958,
2974
    V6_vlsrh  = 2959,
2975
    V6_vlsrhv = 2960,
2976
    V6_vlsrw  = 2961,
2977
    V6_vlsrwv = 2962,
2978
    V6_vlut4  = 2963,
2979
    V6_vlutvvb  = 2964,
2980
    V6_vlutvvb_nm = 2965,
2981
    V6_vlutvvb_oracc  = 2966,
2982
    V6_vlutvvb_oracci = 2967,
2983
    V6_vlutvvbi = 2968,
2984
    V6_vlutvwh  = 2969,
2985
    V6_vlutvwh_nm = 2970,
2986
    V6_vlutvwh_oracc  = 2971,
2987
    V6_vlutvwh_oracci = 2972,
2988
    V6_vlutvwhi = 2973,
2989
    V6_vmax_bf  = 2974,
2990
    V6_vmax_hf  = 2975,
2991
    V6_vmax_sf  = 2976,
2992
    V6_vmaxb  = 2977,
2993
    V6_vmaxh  = 2978,
2994
    V6_vmaxub = 2979,
2995
    V6_vmaxuh = 2980,
2996
    V6_vmaxw  = 2981,
2997
    V6_vmin_bf  = 2982,
2998
    V6_vmin_hf  = 2983,
2999
    V6_vmin_sf  = 2984,
3000
    V6_vminb  = 2985,
3001
    V6_vminh  = 2986,
3002
    V6_vminub = 2987,
3003
    V6_vminuh = 2988,
3004
    V6_vminw  = 2989,
3005
    V6_vmpabus  = 2990,
3006
    V6_vmpabus_acc  = 2991,
3007
    V6_vmpabusv = 2992,
3008
    V6_vmpabuu  = 2993,
3009
    V6_vmpabuu_acc  = 2994,
3010
    V6_vmpabuuv = 2995,
3011
    V6_vmpahb = 2996,
3012
    V6_vmpahb_acc = 2997,
3013
    V6_vmpahhsat  = 2998,
3014
    V6_vmpauhb  = 2999,
3015
    V6_vmpauhb_acc  = 3000,
3016
    V6_vmpauhuhsat  = 3001,
3017
    V6_vmpsuhuhsat  = 3002,
3018
    V6_vmpy_hf_hf = 3003,
3019
    V6_vmpy_hf_hf_acc = 3004,
3020
    V6_vmpy_qf16  = 3005,
3021
    V6_vmpy_qf16_hf = 3006,
3022
    V6_vmpy_qf16_mix_hf = 3007,
3023
    V6_vmpy_qf32  = 3008,
3024
    V6_vmpy_qf32_hf = 3009,
3025
    V6_vmpy_qf32_mix_hf = 3010,
3026
    V6_vmpy_qf32_qf16 = 3011,
3027
    V6_vmpy_qf32_sf = 3012,
3028
    V6_vmpy_sf_bf = 3013,
3029
    V6_vmpy_sf_bf_acc = 3014,
3030
    V6_vmpy_sf_hf = 3015,
3031
    V6_vmpy_sf_hf_acc = 3016,
3032
    V6_vmpy_sf_sf = 3017,
3033
    V6_vmpybus  = 3018,
3034
    V6_vmpybus_acc  = 3019,
3035
    V6_vmpybusv = 3020,
3036
    V6_vmpybusv_acc = 3021,
3037
    V6_vmpybv = 3022,
3038
    V6_vmpybv_acc = 3023,
3039
    V6_vmpyewuh = 3024,
3040
    V6_vmpyewuh_64  = 3025,
3041
    V6_vmpyh  = 3026,
3042
    V6_vmpyh_acc  = 3027,
3043
    V6_vmpyhsat_acc = 3028,
3044
    V6_vmpyhsrs = 3029,
3045
    V6_vmpyhss  = 3030,
3046
    V6_vmpyhus  = 3031,
3047
    V6_vmpyhus_acc  = 3032,
3048
    V6_vmpyhv = 3033,
3049
    V6_vmpyhv_acc = 3034,
3050
    V6_vmpyhvsrs  = 3035,
3051
    V6_vmpyieoh = 3036,
3052
    V6_vmpyiewh_acc = 3037,
3053
    V6_vmpyiewuh  = 3038,
3054
    V6_vmpyiewuh_acc  = 3039,
3055
    V6_vmpyih = 3040,
3056
    V6_vmpyih_acc = 3041,
3057
    V6_vmpyihb  = 3042,
3058
    V6_vmpyihb_acc  = 3043,
3059
    V6_vmpyiowh = 3044,
3060
    V6_vmpyiwb  = 3045,
3061
    V6_vmpyiwb_acc  = 3046,
3062
    V6_vmpyiwh  = 3047,
3063
    V6_vmpyiwh_acc  = 3048,
3064
    V6_vmpyiwub = 3049,
3065
    V6_vmpyiwub_acc = 3050,
3066
    V6_vmpyowh  = 3051,
3067
    V6_vmpyowh_64_acc = 3052,
3068
    V6_vmpyowh_rnd  = 3053,
3069
    V6_vmpyowh_rnd_sacc = 3054,
3070
    V6_vmpyowh_sacc = 3055,
3071
    V6_vmpyub = 3056,
3072
    V6_vmpyub_acc = 3057,
3073
    V6_vmpyubv  = 3058,
3074
    V6_vmpyubv_acc  = 3059,
3075
    V6_vmpyuh = 3060,
3076
    V6_vmpyuh_acc = 3061,
3077
    V6_vmpyuhe  = 3062,
3078
    V6_vmpyuhe_acc  = 3063,
3079
    V6_vmpyuhv  = 3064,
3080
    V6_vmpyuhv_acc  = 3065,
3081
    V6_vmpyuhvs = 3066,
3082
    V6_vmux = 3067,
3083
    V6_vnavgb = 3068,
3084
    V6_vnavgh = 3069,
3085
    V6_vnavgub  = 3070,
3086
    V6_vnavgw = 3071,
3087
    V6_vnccombine = 3072,
3088
    V6_vncmov = 3073,
3089
    V6_vnormamth  = 3074,
3090
    V6_vnormamtw  = 3075,
3091
    V6_vnot = 3076,
3092
    V6_vor  = 3077,
3093
    V6_vpackeb  = 3078,
3094
    V6_vpackeh  = 3079,
3095
    V6_vpackhb_sat  = 3080,
3096
    V6_vpackhub_sat = 3081,
3097
    V6_vpackob  = 3082,
3098
    V6_vpackoh  = 3083,
3099
    V6_vpackwh_sat  = 3084,
3100
    V6_vpackwuh_sat = 3085,
3101
    V6_vpopcounth = 3086,
3102
    V6_vprefixqb  = 3087,
3103
    V6_vprefixqh  = 3088,
3104
    V6_vprefixqw  = 3089,
3105
    V6_vrdelta  = 3090,
3106
    V6_vrmpybub_rtt = 3091,
3107
    V6_vrmpybub_rtt_acc = 3092,
3108
    V6_vrmpybus = 3093,
3109
    V6_vrmpybus_acc = 3094,
3110
    V6_vrmpybusi  = 3095,
3111
    V6_vrmpybusi_acc  = 3096,
3112
    V6_vrmpybusv  = 3097,
3113
    V6_vrmpybusv_acc  = 3098,
3114
    V6_vrmpybv  = 3099,
3115
    V6_vrmpybv_acc  = 3100,
3116
    V6_vrmpyub  = 3101,
3117
    V6_vrmpyub_acc  = 3102,
3118
    V6_vrmpyub_rtt  = 3103,
3119
    V6_vrmpyub_rtt_acc  = 3104,
3120
    V6_vrmpyubi = 3105,
3121
    V6_vrmpyubi_acc = 3106,
3122
    V6_vrmpyubv = 3107,
3123
    V6_vrmpyubv_acc = 3108,
3124
    V6_vrmpyzbb_rt  = 3109,
3125
    V6_vrmpyzbb_rt_acc  = 3110,
3126
    V6_vrmpyzbb_rx  = 3111,
3127
    V6_vrmpyzbb_rx_acc  = 3112,
3128
    V6_vrmpyzbub_rt = 3113,
3129
    V6_vrmpyzbub_rt_acc = 3114,
3130
    V6_vrmpyzbub_rx = 3115,
3131
    V6_vrmpyzbub_rx_acc = 3116,
3132
    V6_vrmpyzcb_rt  = 3117,
3133
    V6_vrmpyzcb_rt_acc  = 3118,
3134
    V6_vrmpyzcb_rx  = 3119,
3135
    V6_vrmpyzcb_rx_acc  = 3120,
3136
    V6_vrmpyzcbs_rt = 3121,
3137
    V6_vrmpyzcbs_rt_acc = 3122,
3138
    V6_vrmpyzcbs_rx = 3123,
3139
    V6_vrmpyzcbs_rx_acc = 3124,
3140
    V6_vrmpyznb_rt  = 3125,
3141
    V6_vrmpyznb_rt_acc  = 3126,
3142
    V6_vrmpyznb_rx  = 3127,
3143
    V6_vrmpyznb_rx_acc  = 3128,
3144
    V6_vror = 3129,
3145
    V6_vrotr  = 3130,
3146
    V6_vroundhb = 3131,
3147
    V6_vroundhub  = 3132,
3148
    V6_vrounduhub = 3133,
3149
    V6_vrounduwuh = 3134,
3150
    V6_vroundwh = 3135,
3151
    V6_vroundwuh  = 3136,
3152
    V6_vrsadubi = 3137,
3153
    V6_vrsadubi_acc = 3138,
3154
    V6_vsatdw = 3139,
3155
    V6_vsathub  = 3140,
3156
    V6_vsatuwuh = 3141,
3157
    V6_vsatwh = 3142,
3158
    V6_vsb  = 3143,
3159
    V6_vscattermh = 3144,
3160
    V6_vscattermh_add = 3145,
3161
    V6_vscattermhq  = 3146,
3162
    V6_vscattermhw  = 3147,
3163
    V6_vscattermhw_add  = 3148,
3164
    V6_vscattermhwq = 3149,
3165
    V6_vscattermw = 3150,
3166
    V6_vscattermw_add = 3151,
3167
    V6_vscattermwq  = 3152,
3168
    V6_vsh  = 3153,
3169
    V6_vshufeh  = 3154,
3170
    V6_vshuff = 3155,
3171
    V6_vshuffb  = 3156,
3172
    V6_vshuffeb = 3157,
3173
    V6_vshuffh  = 3158,
3174
    V6_vshuffob = 3159,
3175
    V6_vshuffvdd  = 3160,
3176
    V6_vshufoeb = 3161,
3177
    V6_vshufoeh = 3162,
3178
    V6_vshufoh  = 3163,
3179
    V6_vsub_hf  = 3164,
3180
    V6_vsub_hf_hf = 3165,
3181
    V6_vsub_qf16  = 3166,
3182
    V6_vsub_qf16_mix  = 3167,
3183
    V6_vsub_qf32  = 3168,
3184
    V6_vsub_qf32_mix  = 3169,
3185
    V6_vsub_sf  = 3170,
3186
    V6_vsub_sf_bf = 3171,
3187
    V6_vsub_sf_hf = 3172,
3188
    V6_vsub_sf_sf = 3173,
3189
    V6_vsubb  = 3174,
3190
    V6_vsubb_dv = 3175,
3191
    V6_vsubbnq  = 3176,
3192
    V6_vsubbq = 3177,
3193
    V6_vsubbsat = 3178,
3194
    V6_vsubbsat_dv  = 3179,
3195
    V6_vsubcarry  = 3180,
3196
    V6_vsubcarryo = 3181,
3197
    V6_vsubh  = 3182,
3198
    V6_vsubh_dv = 3183,
3199
    V6_vsubhnq  = 3184,
3200
    V6_vsubhq = 3185,
3201
    V6_vsubhsat = 3186,
3202
    V6_vsubhsat_dv  = 3187,
3203
    V6_vsubhw = 3188,
3204
    V6_vsububh  = 3189,
3205
    V6_vsububsat  = 3190,
3206
    V6_vsububsat_dv = 3191,
3207
    V6_vsubububb_sat  = 3192,
3208
    V6_vsubuhsat  = 3193,
3209
    V6_vsubuhsat_dv = 3194,
3210
    V6_vsubuhw  = 3195,
3211
    V6_vsubuwsat  = 3196,
3212
    V6_vsubuwsat_dv = 3197,
3213
    V6_vsubw  = 3198,
3214
    V6_vsubw_dv = 3199,
3215
    V6_vsubwnq  = 3200,
3216
    V6_vsubwq = 3201,
3217
    V6_vsubwsat = 3202,
3218
    V6_vsubwsat_dv  = 3203,
3219
    V6_vswap  = 3204,
3220
    V6_vtmpyb = 3205,
3221
    V6_vtmpyb_acc = 3206,
3222
    V6_vtmpybus = 3207,
3223
    V6_vtmpybus_acc = 3208,
3224
    V6_vtmpyhb  = 3209,
3225
    V6_vtmpyhb_acc  = 3210,
3226
    V6_vunpackb = 3211,
3227
    V6_vunpackh = 3212,
3228
    V6_vunpackob  = 3213,
3229
    V6_vunpackoh  = 3214,
3230
    V6_vunpackub  = 3215,
3231
    V6_vunpackuh  = 3216,
3232
    V6_vwhist128  = 3217,
3233
    V6_vwhist128m = 3218,
3234
    V6_vwhist128q = 3219,
3235
    V6_vwhist128qm  = 3220,
3236
    V6_vwhist256  = 3221,
3237
    V6_vwhist256_sat  = 3222,
3238
    V6_vwhist256q = 3223,
3239
    V6_vwhist256q_sat = 3224,
3240
    V6_vxor = 3225,
3241
    V6_vzb  = 3226,
3242
    V6_vzh  = 3227,
3243
    V6_zLd_ai = 3228,
3244
    V6_zLd_pi = 3229,
3245
    V6_zLd_ppu  = 3230,
3246
    V6_zLd_pred_ai  = 3231,
3247
    V6_zLd_pred_pi  = 3232,
3248
    V6_zLd_pred_ppu = 3233,
3249
    V6_zextract = 3234,
3250
    Y2_barrier  = 3235,
3251
    Y2_break  = 3236,
3252
    Y2_ciad = 3237,
3253
    Y2_crswap0  = 3238,
3254
    Y2_cswi = 3239,
3255
    Y2_dccleana = 3240,
3256
    Y2_dccleanidx = 3241,
3257
    Y2_dccleaninva  = 3242,
3258
    Y2_dccleaninvidx  = 3243,
3259
    Y2_dcfetchbo  = 3244,
3260
    Y2_dcinva = 3245,
3261
    Y2_dcinvidx = 3246,
3262
    Y2_dckill = 3247,
3263
    Y2_dctagr = 3248,
3264
    Y2_dctagw = 3249,
3265
    Y2_dczeroa  = 3250,
3266
    Y2_getimask = 3251,
3267
    Y2_iassignr = 3252,
3268
    Y2_iassignw = 3253,
3269
    Y2_icdatar  = 3254,
3270
    Y2_icdataw  = 3255,
3271
    Y2_icinva = 3256,
3272
    Y2_icinvidx = 3257,
3273
    Y2_ickill = 3258,
3274
    Y2_ictagr = 3259,
3275
    Y2_ictagw = 3260,
3276
    Y2_isync  = 3261,
3277
    Y2_k0lock = 3262,
3278
    Y2_k0unlock = 3263,
3279
    Y2_l2cleaninvidx  = 3264,
3280
    Y2_l2kill = 3265,
3281
    Y2_resume = 3266,
3282
    Y2_setimask = 3267,
3283
    Y2_setprio  = 3268,
3284
    Y2_start  = 3269,
3285
    Y2_stop = 3270,
3286
    Y2_swi  = 3271,
3287
    Y2_syncht = 3272,
3288
    Y2_tfrscrr  = 3273,
3289
    Y2_tfrsrcr  = 3274,
3290
    Y2_tlblock  = 3275,
3291
    Y2_tlbp = 3276,
3292
    Y2_tlbr = 3277,
3293
    Y2_tlbunlock  = 3278,
3294
    Y2_tlbw = 3279,
3295
    Y2_wait = 3280,
3296
    Y4_crswap1  = 3281,
3297
    Y4_crswap10 = 3282,
3298
    Y4_l2fetch  = 3283,
3299
    Y4_l2tagr = 3284,
3300
    Y4_l2tagw = 3285,
3301
    Y4_nmi  = 3286,
3302
    Y4_siad = 3287,
3303
    Y4_tfrscpp  = 3288,
3304
    Y4_tfrspcp  = 3289,
3305
    Y4_trace  = 3290,
3306
    Y5_ctlbw  = 3291,
3307
    Y5_l2cleanidx = 3292,
3308
    Y5_l2fetch  = 3293,
3309
    Y5_l2gclean = 3294,
3310
    Y5_l2gcleaninv  = 3295,
3311
    Y5_l2gunlock  = 3296,
3312
    Y5_l2invidx = 3297,
3313
    Y5_l2locka  = 3298,
3314
    Y5_l2unlocka  = 3299,
3315
    Y5_tlbasidi = 3300,
3316
    Y5_tlboc  = 3301,
3317
    Y6_diag = 3302,
3318
    Y6_diag0  = 3303,
3319
    Y6_diag1  = 3304,
3320
    Y6_dmlink = 3305,
3321
    Y6_dmpause  = 3306,
3322
    Y6_dmpoll = 3307,
3323
    Y6_dmresume = 3308,
3324
    Y6_dmstart  = 3309,
3325
    Y6_dmwait = 3310,
3326
    Y6_l2gcleaninvpa  = 3311,
3327
    Y6_l2gcleanpa = 3312,
3328
    dep_A2_addsat = 3313,
3329
    dep_A2_subsat = 3314,
3330
    dep_S2_packhl = 3315,
3331
    invalid_decode  = 3316,
3332
    INSTRUCTION_LIST_END = 3317
3333
  };
3334
3335
} // end namespace Hexagon
3336
} // end namespace llvm
3337
#endif // GET_INSTRINFO_ENUM
3338
3339
#ifdef GET_INSTRINFO_SCHED_ENUM
3340
#undef GET_INSTRINFO_SCHED_ENUM
3341
namespace llvm {
3342
3343
namespace Hexagon {
3344
namespace Sched {
3345
  enum {
3346
    NoInstrModel  = 0,
3347
    tc_01d44cb2 = 1,
3348
    PSEUDO  = 2,
3349
    tc_c57d9f39 = 3,
3350
    tc_1c2c7a4a = 4,
3351
    tc_442395f3 = 5,
3352
    tc_713b66bf = 6,
3353
    tc_86173609 = 7,
3354
    tc_5da50c4b = 8,
3355
    tc_4a55d03c = 9,
3356
    tc_d33e5eee = 10,
3357
    tc_651cbe02 = 11,
3358
    DUPLEX  = 12,
3359
    tc_ENDLOOP  = 13,
3360
    tc_23708a21 = 14,
3361
    tc_56a124a7 = 15,
3362
    tc_2f573607 = 16,
3363
    tc_53c851ab = 17,
3364
    tc_fedb7e19 = 18,
3365
    tc_4222e6bf = 19,
3366
    tc_075c8dd8 = 20,
3367
    tc_9bcfb2ee = 21,
3368
    tc_158aa3f7 = 22,
3369
    tc_df5d53f9 = 23,
3370
    tc_14ab4f41 = 24,
3371
    tc_f38f92e1 = 25,
3372
    tc_1981450d = 26,
3373
    tc_e9170fb7 = 27,
3374
    tc_40d64c94 = 28,
3375
    LD_tc_ld_SLOT01 = 29,
3376
    tc_38382228 = 30,
3377
    tc_c21d7447 = 31,
3378
    tc_7f8ae742 = 32,
3379
    tc_5a4b5e58 = 33,
3380
    tc_197dce51 = 34,
3381
    tc_44fffc58 = 35,
3382
    tc_5ceb2f9e = 36,
3383
    tc_56c4f9fe = 37,
3384
    tc_b4dc7630 = 38,
3385
    tc_a2b365d2 = 39,
3386
    tc_60e324ff = 40,
3387
    tc_db5555f3 = 41,
3388
    tc_c0749f3c = 42,
3389
    PSEUDOM = 43,
3390
    tc_3aacf4a8 = 44,
3391
    tc_c4edf264 = 45,
3392
    tc_c5dba46e = 46,
3393
    tc_af25efd9 = 47,
3394
    tc_0dfac0a7 = 48,
3395
    tc_8035e91f = 49,
3396
    tc_011e0e9d = 50,
3397
    tc_ae5babd7 = 51,
3398
    tc_5deb5e47 = 52,
3399
    tc_bb831a7c = 53,
3400
    tc_92240447 = 54,
3401
    tc_7c31e19a = 55,
3402
    tc_d03278fd = 56,
3403
    tc_65cbd974 = 57,
3404
    tc_934753bb = 58,
3405
    ST_tc_st_SLOT01 = 59,
3406
    CVI_VA  = 60,
3407
    tc_f175e046 = 61,
3408
    tc_4942646a = 62,
3409
    tc_0ec46cf9 = 63,
3410
    tc_718b5c53 = 64,
3411
    CVI_GATHER_PSEUDO = 65,
3412
    tc_7dc63b5c = 66,
3413
    tc_d45ba9cd = 67,
3414
    tc_388f9897 = 68,
3415
    tc_9124c04f = 69,
3416
    tc_4ac61d92 = 70,
3417
    tc_aee6250c = 71,
3418
    tc_eed07714 = 72,
3419
    tc_74a42bda = 73,
3420
    tc_a9edeffa = 74,
3421
    tc_838c4d7a = 75,
3422
    tc_d61dfdc3 = 76,
3423
    tc_8a825db2 = 77,
3424
    tc_f34c1c21 = 78,
3425
    tc_95a33176 = 79,
3426
    tc_9f6cd987 = 80,
3427
    tc_b837298f = 81,
3428
    tc_8b5bd4f5 = 82,
3429
    tc_84a7500d = 83,
3430
    tc_7476d766 = 84,
3431
    tc_49fdfd4b = 85,
3432
    tc_f098b237 = 86,
3433
    tc_20131976 = 87,
3434
    tc_1d41f8b7 = 88,
3435
    tc_a1297125 = 89,
3436
    tc_112d30d6 = 90,
3437
    tc_d68dca5c = 91,
3438
    tc_788b1d09 = 92,
3439
    tc_38e0bae9 = 93,
3440
    tc_407e96f9 = 94,
3441
    tc_7401744f = 95,
3442
    tc_9b3c0462 = 96,
3443
    tc_151bf368 = 97,
3444
    tc_9c52f549 = 98,
3445
    tc_55b33fda = 99,
3446
    tc_6fc5dbea = 100,
3447
    tc_3edca78f = 101,
3448
    tc_a7a13fac = 102,
3449
    tc_9783714b = 103,
3450
    tc_f0e8e832 = 104,
3451
    tc_65279839 = 105,
3452
    tc_0a195f2c = 106,
3453
    tc_01e1be3b = 107,
3454
    tc_556f6577 = 108,
3455
    tc_02fe1c65 = 109,
3456
    tc_9e72dc89 = 110,
3457
    tc_9edb7c77 = 111,
3458
    tc_7f7f45f5 = 112,
3459
    tc_c20701f0 = 113,
3460
    tc_f7569068 = 114,
3461
    tc_fae9dfa5 = 115,
3462
    tc_6ae3426b = 116,
3463
    tc_69bfb303 = 117,
3464
    tc_362b0be2 = 118,
3465
    tc_dc51281d = 119,
3466
    tc_95f43c5e = 120,
3467
    tc_decdde8a = 121,
3468
    tc_eeda4109 = 122,
3469
    tc_711c805f = 123,
3470
    tc_ed03645c = 124,
3471
    tc_42ff66ba = 125,
3472
    tc_57a55b54 = 126,
3473
    tc_f97707c1 = 127,
3474
    tc_1248597c = 128,
3475
    tc_9406230a = 129,
3476
    tc_d57d649c = 130,
3477
    tc_4abdbdc6 = 131,
3478
    tc_6d861a95 = 132,
3479
    tc_b9bec29e = 133,
3480
    tc_45f9d1be = 134,
3481
    tc_33e7e673 = 135,
3482
    tc_24e109c7 = 136,
3483
    tc_9e27f2f9 = 137,
3484
    tc_f6e2aff9 = 138,
3485
    tc_24f426ab = 139,
3486
    tc_975a4e54 = 140,
3487
    tc_e60def48 = 141,
3488
    tc_5502c366 = 142,
3489
    tc_7b9187d3 = 143,
3490
    tc_f999c66e = 144,
3491
    tc_1c7522a8 = 145,
3492
    tc_76bb5435 = 146,
3493
    tc_8a6d0d94 = 147,
3494
    tc_2471c1c8 = 148,
3495
    tc_64b00d8a = 149,
3496
    tc_5f2afaf7 = 150,
3497
    tc_ac65613f = 151,
3498
    tc_a32e03e7 = 152,
3499
    tc_822c3c68 = 153,
3500
    tc_abfd9a6d = 154,
3501
    tc_bf2ffc0f = 155,
3502
    tc_ed3f8d2a = 156,
3503
    tc_7c6d32e4 = 157,
3504
    tc_45791fb8 = 158,
3505
    tc_b7c4062a = 159,
3506
    tc_5944960d = 160,
3507
    tc_2c13e7f5 = 161,
3508
    tc_a154b476 = 162,
3509
    tc_a4e22bbd = 163,
3510
    tc_503ce0f3 = 164,
3511
    tc_0655b949 = 165,
3512
    tc_6e20402a = 166,
3513
    tc_db96aa6b = 167,
3514
    tc_a7bdb22c = 168,
3515
    tc_db596beb = 169,
3516
    tc_a08b630b = 170,
3517
    tc_1fcb8495 = 171,
3518
    tc_9edefe01 = 172,
3519
    tc_449acf79 = 173,
3520
    tc_ce59038e = 174,
3521
    tc_f529831b = 175,
3522
    tc_addc37a8 = 176,
3523
    tc_6f42bc60 = 177,
3524
    tc_7af3a37e = 178,
3525
    tc_e3d699e3 = 179,
3526
    tc_ba9255a6 = 180,
3527
    tc_1fe4ab69 = 181,
3528
    tc_bb07f2c5 = 182,
3529
    tc_8e82e8ca = 183,
3530
    tc_cfa0e29b = 184,
3531
    tc_0a6c20ae = 185,
3532
    tc_0fac1eb8 = 186,
3533
    tc_829d8a86 = 187,
3534
    tc_280f7fe1 = 188,
3535
    tc_887d1bb7 = 189,
3536
    tc_96ef76ef = 190,
3537
    tc_55a9a350 = 191,
3538
    tc_f0cdeccf = 192,
3539
    tc_a38c45dc = 193,
3540
    tc_d3632d88 = 194,
3541
    tc_5e4cf0e8 = 195,
3542
    tc_ef921005 = 196,
3543
    tc_5b347363 = 197,
3544
    tc_3d14a17b = 198,
3545
    tc_3fbf1042 = 199,
3546
    tc_63567288 = 200,
3547
    tc_59a7822c = 201,
3548
    tc_937dd41c = 202,
3549
    tc_a4ee89db = 203,
3550
    tc_c818ff7f = 204,
3551
    tc_1242dc2a = 205,
3552
    tc_44d5a428 = 206,
3553
    tc_540c3da3 = 207,
3554
    tc_5bf8afbb = 208,
3555
    tc_2b4c548e = 209,
3556
    tc_bb599486 = 210,
3557
    tc_a7e6707d = 211,
3558
    tc_3c56e5ce = 212,
3559
    tc_abe8c3b2 = 213,
3560
    tc_453fe68d = 214,
3561
    tc_1ba8a0cd = 215,
3562
    tc_52447ecc = 216,
3563
    tc_3904b926 = 217,
3564
    tc_b9db8205 = 218,
3565
    tc_663c80a7 = 219,
3566
    tc_f21e8abb = 220,
3567
    tc_131f1c81 = 221,
3568
    tc_c7039829 = 222,
3569
    tc_e2d2e9e5 = 223,
3570
    tc_ab23f776 = 224,
3571
    tc_7177e272 = 225,
3572
    tc_e99d4c2e = 226,
3573
    tc_6942b6e0 = 227,
3574
    tc_a02a10a8 = 228,
3575
    tc_54a0dc47 = 229,
3576
    tc_447d9895 = 230,
3577
    tc_191381c1 = 231,
3578
    tc_3e2aaafc = 232,
3579
    tc_3ce09744 = 233,
3580
    tc_20a4bbec = 234,
3581
    tc_5cdf8c84 = 235,
3582
    tc_c127de3a = 236,
3583
    tc_05ca8cfd = 237,
3584
    tc_d8287c14 = 238,
3585
    tc_257f6f7c = 239,
3586
    tc_7e6a3e89 = 240,
3587
    tc_e35c1e93 = 241,
3588
    tc_08a4f1b6 = 242,
3589
    tc_56e64202 = 243,
3590
    tc_ac4046bc = 244,
3591
    tc_2e8f5f6e = 245,
3592
    tc_7417e785 = 246,
3593
    tc_309dbb4f = 247,
3594
    tc_df80eeb0 = 248,
3595
    tc_16ff9ef8 = 249,
3596
    tc_e2fdd6e6 = 250,
3597
    tc_51d0ecc3 = 251,
3598
    tc_531b383c = 252,
3599
    tc_3c8c15d0 = 253,
3600
    tc_0afc8be9 = 254,
3601
    tc_561aaa58 = 255,
3602
    tc_946013d8 = 256,
3603
    tc_46d6c3e0 = 257,
3604
    tc_87adc037 = 258,
3605
    tc_a19b9305 = 259,
3606
    tc_649072c2 = 260,
3607
    tc_b091f1c6 = 261,
3608
    tc_0b04c6c7 = 262,
3609
    tc_660769f1 = 263,
3610
    tc_dcca380f = 264,
3611
    tc_72e2b393 = 265,
3612
    tc_73efe966 = 266,
3613
    tc_cda936da = 267,
3614
    tc_a28f32b5 = 268,
3615
    tc_7d68d5c2 = 269,
3616
    tc_7095ecba = 270,
3617
    tc_a69eeee1 = 271,
3618
    tc_1381a97c = 272,
3619
    tc_e3f68a46 = 273,
3620
    tc_f1de44ef = 274,
3621
    tc_9d1dc972 = 275,
3622
    tc_90bcc1db = 276,
3623
    tc_cd94bfe0 = 277,
3624
    tc_15fdf750 = 278,
3625
    tc_1ad8a370 = 279,
3626
    tc_e675c45a = 280,
3627
    tc_37820f4c = 281,
3628
    tc_61bf7c03 = 282,
3629
    tc_933f2b39 = 283,
3630
    tc_26a377fe = 284,
3631
    tc_2d4051cd = 285,
3632
    tc_6e7fa133 = 286,
3633
    tc_8772086c = 287,
3634
    tc_b4416217 = 288,
3635
    tc_9f363d21 = 289,
3636
    tc_8e420e4d = 290,
3637
    tc_7273323b = 291,
3638
    tc_58d21193 = 292,
3639
    tc_71646d06 = 293,
3640
    tc_04da405a = 294,
3641
    tc_2c745bb8 = 295,
3642
    tc_b28e51aa = 296,
3643
    tc_767c4e9d = 297,
3644
    tc_e699ae41 = 298,
3645
    tc_a0dbea28 = 299,
3646
    tc_dd5b0695 = 300,
3647
    tc_3ad719fb = 301,
3648
    tc_77f94a5e = 302,
3649
    tc_55255f2b = 303,
3650
    tc_0a43be35 = 304,
3651
    tc_b1ae5f67 = 305,
3652
    tc_d234b61a = 306,
3653
    tc_2237d952 = 307,
3654
    tc_78f87ed3 = 308,
3655
    tc_a724463d = 309,
3656
    tc_6fb52018 = 310,
3657
    tc_46c18ecf = 311,
3658
    tc_9b20a062 = 312,
3659
    tc_5a222e89 = 313,
3660
    tc_0ba0d5da = 314,
3661
    tc_7d6a2568 = 315,
3662
    tc_759e57be = 316,
3663
    tc_139ef484 = 317,
3664
    tc_9b34f5e0 = 318,
3665
    tc_7f58404a = 319,
3666
    tc_b3d46584 = 320,
3667
    tc_d71ea8fa = 321,
3668
    tc_6aa823ab = 322,
3669
    tc_b2196a3f = 323,
3670
    tc_2c3e17fc = 324,
3671
    tc_27106296 = 325,
3672
    tc_a3070909 = 326,
3673
    tc_512b1653 = 327,
3674
    tc_d7718fbe = 328,
3675
    tc_bb78483e = 329,
3676
    tc_54f0cee2 = 330,
3677
    tc_28e55c6f = 331,
3678
    tc_4bf903b0 = 332,
3679
    tc_7c28bd7e = 333,
3680
    tc_invalid  = 334,
3681
    SCHED_LIST_END = 335
3682
  };
3683
} // end namespace Sched
3684
} // end namespace Hexagon
3685
} // end namespace llvm
3686
#endif // GET_INSTRINFO_SCHED_ENUM
3687
3688
#if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
3689
namespace llvm {
3690
3691
struct HexagonInstrTable {
3692
  MCInstrDesc Insts[3317];
3693
  static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo");
3694
  MCOperandInfo OperandInfo[1067];
3695
  static_assert(alignof(MCOperandInfo) >= alignof(MCPhysReg), "Unwanted padding between OperandInfo and ImplicitOps");
3696
  MCPhysReg ImplicitOps[177];
3697
};
3698
3699
} // end namespace llvm
3700
#endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
3701
3702
#ifdef GET_INSTRINFO_MC_DESC
3703
#undef GET_INSTRINFO_MC_DESC
3704
namespace llvm {
3705
3706
static_assert(sizeof(MCOperandInfo) % sizeof(MCPhysReg) == 0);
3707
static constexpr unsigned HexagonImpOpBase = sizeof HexagonInstrTable::OperandInfo / (sizeof(MCPhysReg));
3708
3709
extern const HexagonInstrTable HexagonDescs = {
3710
  {
3711
    { 3316, 0,  0,  4,  334,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0x0ULL },  // Inst #3316 = invalid_decode
3712
    { 3315, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 507,  0, 0x3ULL },  // Inst #3315 = dep_S2_packhl
3713
    { 3314, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #3314 = dep_A2_subsat
3714
    { 3313, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #3313 = dep_A2_addsat
3715
    { 3312, 1,  0,  4,  333,  0,  0,  HexagonImpOpBase + 0, 1066, 0, 0xa9ULL },  // Inst #3312 = Y6_l2gcleanpa
3716
    { 3311, 1,  0,  4,  333,  0,  0,  HexagonImpOpBase + 0, 1066, 0, 0xa9ULL },  // Inst #3311 = Y6_l2gcleaninvpa
3717
    { 3310, 1,  1,  4,  332,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80a9ULL },  // Inst #3310 = Y6_dmwait
3718
    { 3309, 1,  0,  4,  167,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xa9ULL },  // Inst #3309 = Y6_dmstart
3719
    { 3308, 1,  0,  4,  167,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xa9ULL },  // Inst #3308 = Y6_dmresume
3720
    { 3307, 1,  1,  4,  332,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80a9ULL },  // Inst #3307 = Y6_dmpoll
3721
    { 3306, 1,  1,  4,  332,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80a9ULL },  // Inst #3306 = Y6_dmpause
3722
    { 3305, 2,  0,  4,  178,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xa9ULL },  // Inst #3305 = Y6_dmlink
3723
    { 3304, 2,  0,  4,  331,  0,  0,  HexagonImpOpBase + 0, 150,  0, 0x5ULL },  // Inst #3304 = Y6_diag1
3724
    { 3303, 2,  0,  4,  331,  0,  0,  HexagonImpOpBase + 0, 150,  0, 0x5ULL },  // Inst #3303 = Y6_diag0
3725
    { 3302, 1,  0,  4,  324,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x5ULL },  // Inst #3302 = Y6_diag
3726
    { 3301, 2,  1,  4,  322,  0,  0,  HexagonImpOpBase + 0, 295,  0, 0x8085ULL },  // Inst #3301 = Y5_tlboc
3727
    { 3300, 1,  0,  4,  330,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x85ULL },  // Inst #3300 = Y5_tlbasidi
3728
    { 3299, 1,  0,  4,  306,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x129ULL },  // Inst #3299 = Y5_l2unlocka
3729
    { 3298, 2,  1,  4,  309,  0,  0,  HexagonImpOpBase + 0, 173,  0, 0x2129ULL },  // Inst #3298 = Y5_l2locka
3730
    { 3297, 1,  0,  4,  306,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x129ULL },  // Inst #3297 = Y5_l2invidx
3731
    { 3296, 0,  0,  4,  320,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0xa9ULL },  // Inst #3296 = Y5_l2gunlock
3732
    { 3295, 0,  0,  4,  320,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0xa9ULL },  // Inst #3295 = Y5_l2gcleaninv
3733
    { 3294, 0,  0,  4,  320,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0xa9ULL },  // Inst #3294 = Y5_l2gclean
3734
    { 3293, 2,  0,  4,  326,  0,  0,  HexagonImpOpBase + 0, 295,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x129ULL },  // Inst #3293 = Y5_l2fetch
3735
    { 3292, 1,  0,  4,  306,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x129ULL },  // Inst #3292 = Y5_l2cleanidx
3736
    { 3291, 3,  1,  4,  329,  0,  0,  HexagonImpOpBase + 0, 200,  0, 0x8085ULL },  // Inst #3291 = Y5_ctlbw
3737
    { 3290, 1,  0,  4,  328,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x105ULL },  // Inst #3290 = Y4_trace
3738
    { 3289, 2,  1,  4,  116,  0,  0,  HexagonImpOpBase + 0, 1064, 0, 0x8005ULL },  // Inst #3289 = Y4_tfrspcp
3739
    { 3288, 2,  1,  4,  115,  0,  0,  HexagonImpOpBase + 0, 1062, 0, 0x5ULL },  // Inst #3288 = Y4_tfrscpp
3740
    { 3287, 1,  0,  4,  304,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x105ULL },  // Inst #3287 = Y4_siad
3741
    { 3286, 1,  0,  4,  304,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x85ULL },  // Inst #3286 = Y4_nmi
3742
    { 3285, 2,  0,  4,  327,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0xa9ULL },  // Inst #3285 = Y4_l2tagw
3743
    { 3284, 2,  1,  4,  309,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8129ULL },  // Inst #3284 = Y4_l2tagr
3744
    { 3283, 2,  0,  4,  326,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x129ULL },  // Inst #3283 = Y4_l2fetch
3745
    { 3282, 3,  1,  4,  325,  2,  2,  HexagonImpOpBase + 173, 1059, 0, 0x5ULL },  // Inst #3282 = Y4_crswap10
3746
    { 3281, 2,  1,  4,  66, 1,  1,  HexagonImpOpBase + 171, 481,  0, 0x8005ULL },  // Inst #3281 = Y4_crswap1
3747
    { 3280, 1,  0,  4,  324,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x85ULL },  // Inst #3280 = Y2_wait
3748
    { 3279, 2,  0,  4,  323,  0,  0,  HexagonImpOpBase + 0, 178,  0, 0x85ULL },  // Inst #3279 = Y2_tlbw
3749
    { 3278, 0,  0,  4,  319,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0x85ULL },  // Inst #3278 = Y2_tlbunlock
3750
    { 3277, 2,  1,  4,  322,  0,  0,  HexagonImpOpBase + 0, 178,  0, 0x85ULL },  // Inst #3277 = Y2_tlbr
3751
    { 3276, 2,  1,  4,  322,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8085ULL },  // Inst #3276 = Y2_tlbp
3752
    { 3275, 0,  0,  4,  319,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0x85ULL },  // Inst #3275 = Y2_tlblock
3753
    { 3274, 2,  1,  4,  116,  0,  0,  HexagonImpOpBase + 0, 1057, 0, 0x8005ULL },  // Inst #3274 = Y2_tfrsrcr
3754
    { 3273, 2,  1,  4,  115,  0,  0,  HexagonImpOpBase + 0, 1055, 0, 0x8005ULL },  // Inst #3273 = Y2_tfrscrr
3755
    { 3272, 0,  0,  4,  302,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0xa9ULL },  // Inst #3272 = Y2_syncht
3756
    { 3271, 1,  0,  4,  304,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x105ULL },  // Inst #3271 = Y2_swi
3757
    { 3270, 1,  0,  4,  304,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x85ULL },  // Inst #3270 = Y2_stop
3758
    { 3269, 1,  0,  4,  304,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x85ULL },  // Inst #3269 = Y2_start
3759
    { 3268, 2,  0,  4,  321,  0,  0,  HexagonImpOpBase + 0, 173,  0, 0x5ULL },  // Inst #3268 = Y2_setprio
3760
    { 3267, 2,  0,  4,  321,  0,  0,  HexagonImpOpBase + 0, 173,  0, 0x105ULL },  // Inst #3267 = Y2_setimask
3761
    { 3266, 1,  0,  4,  304,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x85ULL },  // Inst #3266 = Y2_resume
3762
    { 3265, 0,  0,  4,  320,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0xa9ULL },  // Inst #3265 = Y2_l2kill
3763
    { 3264, 1,  0,  4,  306,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x129ULL },  // Inst #3264 = Y2_l2cleaninvidx
3764
    { 3263, 0,  0,  4,  319,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0x85ULL },  // Inst #3263 = Y2_k0unlock
3765
    { 3262, 0,  0,  4,  319,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0x85ULL },  // Inst #3262 = Y2_k0lock
3766
    { 3261, 0,  0,  4,  318,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0xa3ULL },  // Inst #3261 = Y2_isync
3767
    { 3260, 2,  0,  4,  317,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0xa3ULL },  // Inst #3260 = Y2_ictagw
3768
    { 3259, 2,  1,  4,  316,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x80a3ULL },  // Inst #3259 = Y2_ictagr
3769
    { 3258, 0,  0,  4,  133,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0xa3ULL },  // Inst #3258 = Y2_ickill
3770
    { 3257, 1,  0,  4,  315,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0xa3ULL },  // Inst #3257 = Y2_icinvidx
3771
    { 3256, 1,  0,  4,  314,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0xa3ULL },  // Inst #3256 = Y2_icinva
3772
    { 3255, 2,  0,  4,  313,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0xa3ULL },  // Inst #3255 = Y2_icdataw
3773
    { 3254, 2,  1,  4,  312,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x80a3ULL },  // Inst #3254 = Y2_icdatar
3774
    { 3253, 1,  0,  4,  304,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x105ULL },  // Inst #3253 = Y2_iassignw
3775
    { 3252, 2,  1,  4,  311,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8105ULL },  // Inst #3252 = Y2_iassignr
3776
    { 3251, 2,  1,  4,  311,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8105ULL },  // Inst #3251 = Y2_getimask
3777
    { 3250, 1,  0,  4,  305,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x229ULL },  // Inst #3250 = Y2_dczeroa
3778
    { 3249, 2,  0,  4,  310,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0xa9ULL },  // Inst #3249 = Y2_dctagw
3779
    { 3248, 2,  1,  4,  309,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8129ULL },  // Inst #3248 = Y2_dctagr
3780
    { 3247, 0,  0,  4,  308,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0xa9ULL },  // Inst #3247 = Y2_dckill
3781
    { 3246, 1,  0,  4,  306,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x129ULL },  // Inst #3246 = Y2_dcinvidx
3782
    { 3245, 1,  0,  4,  305,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x229ULL },  // Inst #3245 = Y2_dcinva
3783
    { 3244, 2,  0,  4,  307,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x38000000024ULL },  // Inst #3244 = Y2_dcfetchbo
3784
    { 3243, 1,  0,  4,  306,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x129ULL },  // Inst #3243 = Y2_dccleaninvidx
3785
    { 3242, 1,  0,  4,  305,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x229ULL },  // Inst #3242 = Y2_dccleaninva
3786
    { 3241, 1,  0,  4,  306,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x129ULL },  // Inst #3241 = Y2_dccleanidx
3787
    { 3240, 1,  0,  4,  305,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x229ULL },  // Inst #3240 = Y2_dccleana
3788
    { 3239, 1,  0,  4,  304,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x105ULL },  // Inst #3239 = Y2_cswi
3789
    { 3238, 2,  1,  4,  66, 1,  1,  HexagonImpOpBase + 169, 481,  0, 0x8005ULL },  // Inst #3238 = Y2_crswap0
3790
    { 3237, 1,  0,  4,  304,  0,  0,  HexagonImpOpBase + 0, 260,  0, 0x105ULL },  // Inst #3237 = Y2_ciad
3791
    { 3236, 0,  0,  4,  303,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0x85ULL },  // Inst #3236 = Y2_break
3792
    { 3235, 0,  0,  4,  302,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x129ULL },  // Inst #3235 = Y2_barrier
3793
    { 3234, 2,  1,  4,  208,  0,  0,  HexagonImpOpBase + 0, 277,  0, 0x800000000008018ULL },  // Inst #3234 = V6_zextract
3794
    { 3233, 4,  1,  4,  301,  0,  0,  HexagonImpOpBase + 0, 1051, 0|(1ULL<<MCID::MayLoad), 0x80006800000041fULL },  // Inst #3233 = V6_zLd_pred_ppu
3795
    { 3232, 4,  1,  4,  301,  0,  0,  HexagonImpOpBase + 0, 1047, 0|(1ULL<<MCID::MayLoad), 0x80006800000041fULL },  // Inst #3232 = V6_zLd_pred_pi
3796
    { 3231, 3,  0,  4,  300,  0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::MayLoad), 0x80003800000041fULL },  // Inst #3231 = V6_zLd_pred_ai
3797
    { 3230, 3,  1,  4,  299,  0,  0,  HexagonImpOpBase + 0, 934,  0|(1ULL<<MCID::MayLoad), 0x80006800000001fULL },  // Inst #3230 = V6_zLd_ppu
3798
    { 3229, 3,  1,  4,  299,  0,  0,  HexagonImpOpBase + 0, 495,  0|(1ULL<<MCID::MayLoad), 0x80006800000001fULL },  // Inst #3229 = V6_zLd_pi
3799
    { 3228, 2,  0,  4,  298,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::MayLoad), 0x80003800000001fULL },  // Inst #3228 = V6_zLd_ai
3800
    { 3227, 2,  1,  4,  288,  0,  0,  HexagonImpOpBase + 0, 453,  0, 0x800000000008011ULL },  // Inst #3227 = V6_vzh
3801
    { 3226, 2,  1,  4,  288,  0,  0,  HexagonImpOpBase + 0, 453,  0, 0x800000000008011ULL },  // Inst #3226 = V6_vzb
3802
    { 3225, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3225 = V6_vxor
3803
    { 3224, 1,  0,  4,  273,  0,  0,  HexagonImpOpBase + 0, 237,  0, 0x80000000000000aULL },  // Inst #3224 = V6_vwhist256q_sat
3804
    { 3223, 1,  0,  4,  273,  0,  0,  HexagonImpOpBase + 0, 237,  0, 0x80000000000000aULL },  // Inst #3223 = V6_vwhist256q
3805
    { 3222, 0,  0,  4,  272,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0x80000000000000aULL },  // Inst #3222 = V6_vwhist256_sat
3806
    { 3221, 0,  0,  4,  272,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0x80000000000000aULL },  // Inst #3221 = V6_vwhist256
3807
    { 3220, 2,  0,  4,  297,  0,  0,  HexagonImpOpBase + 0, 1045, 0, 0x80000000000000aULL },  // Inst #3220 = V6_vwhist128qm
3808
    { 3219, 1,  0,  4,  273,  0,  0,  HexagonImpOpBase + 0, 237,  0, 0x80000000000000aULL },  // Inst #3219 = V6_vwhist128q
3809
    { 3218, 1,  0,  4,  296,  0,  0,  HexagonImpOpBase + 0, 0,  0, 0x80000000000000aULL },  // Inst #3218 = V6_vwhist128m
3810
    { 3217, 0,  0,  4,  272,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0x80000000000000aULL },  // Inst #3217 = V6_vwhist128
3811
    { 3216, 2,  1,  4,  294,  0,  0,  HexagonImpOpBase + 0, 453,  0, 0x800000000008019ULL },  // Inst #3216 = V6_vunpackuh
3812
    { 3215, 2,  1,  4,  294,  0,  0,  HexagonImpOpBase + 0, 453,  0, 0x800000000008019ULL },  // Inst #3215 = V6_vunpackub
3813
    { 3214, 3,  1,  4,  295,  0,  0,  HexagonImpOpBase + 0, 478,  0, 0x840000000008019ULL },  // Inst #3214 = V6_vunpackoh
3814
    { 3213, 3,  1,  4,  295,  0,  0,  HexagonImpOpBase + 0, 478,  0, 0x840000000008019ULL },  // Inst #3213 = V6_vunpackob
3815
    { 3212, 2,  1,  4,  294,  0,  0,  HexagonImpOpBase + 0, 453,  0, 0x800000000008019ULL },  // Inst #3212 = V6_vunpackh
3816
    { 3211, 2,  1,  4,  294,  0,  0,  HexagonImpOpBase + 0, 453,  0, 0x800000000008019ULL },  // Inst #3211 = V6_vunpackb
3817
    { 3210, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 390,  0, 0x84000000000801dULL },  // Inst #3210 = V6_vtmpyhb_acc
3818
    { 3209, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 394,  0, 0x80000000000801dULL },  // Inst #3209 = V6_vtmpyhb
3819
    { 3208, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 390,  0, 0x84000000000801dULL },  // Inst #3208 = V6_vtmpybus_acc
3820
    { 3207, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 394,  0, 0x80000000000801dULL },  // Inst #3207 = V6_vtmpybus
3821
    { 3206, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 390,  0, 0x84000000000801dULL },  // Inst #3206 = V6_vtmpyb_acc
3822
    { 3205, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 394,  0, 0x80000000000801dULL },  // Inst #3205 = V6_vtmpyb
3823
    { 3204, 4,  1,  4,  293,  0,  0,  HexagonImpOpBase + 0, 1041, 0, 0x800000000008011ULL },  // Inst #3204 = V6_vswap
3824
    { 3203, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #3203 = V6_vsubwsat_dv
3825
    { 3202, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3202 = V6_vsubwsat
3826
    { 3201, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3800000000008010ULL },  // Inst #3201 = V6_vsubwq
3827
    { 3200, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3800000000008010ULL },  // Inst #3200 = V6_vsubwnq
3828
    { 3199, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #3199 = V6_vsubw_dv
3829
    { 3198, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3198 = V6_vsubw
3830
    { 3197, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #3197 = V6_vsubuwsat_dv
3831
    { 3196, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3196 = V6_vsubuwsat
3832
    { 3195, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3195 = V6_vsubuhw
3833
    { 3194, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #3194 = V6_vsubuhsat_dv
3834
    { 3193, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3193 = V6_vsubuhsat
3835
    { 3192, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3192 = V6_vsubububb_sat
3836
    { 3191, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #3191 = V6_vsububsat_dv
3837
    { 3190, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3190 = V6_vsububsat
3838
    { 3189, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3189 = V6_vsububh
3839
    { 3188, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3188 = V6_vsubhw
3840
    { 3187, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #3187 = V6_vsubhsat_dv
3841
    { 3186, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3186 = V6_vsubhsat
3842
    { 3185, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3800000000008010ULL },  // Inst #3185 = V6_vsubhq
3843
    { 3184, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3800000000008010ULL },  // Inst #3184 = V6_vsubhnq
3844
    { 3183, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #3183 = V6_vsubh_dv
3845
    { 3182, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3182 = V6_vsubh
3846
    { 3181, 4,  2,  4,  241,  0,  0,  HexagonImpOpBase + 0, 942,  0, 0x3800000000008010ULL },  // Inst #3181 = V6_vsubcarryo
3847
    { 3180, 5,  2,  4,  240,  0,  0,  HexagonImpOpBase + 0, 937,  0, 0x3800000000008010ULL },  // Inst #3180 = V6_vsubcarry
3848
    { 3179, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #3179 = V6_vsubbsat_dv
3849
    { 3178, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3178 = V6_vsubbsat
3850
    { 3177, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3800000000008010ULL },  // Inst #3177 = V6_vsubbq
3851
    { 3176, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3800000000008010ULL },  // Inst #3176 = V6_vsubbnq
3852
    { 3175, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #3175 = V6_vsubb_dv
3853
    { 3174, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3174 = V6_vsubb
3854
    { 3173, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #3173 = V6_vsub_sf_sf
3855
    { 3172, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3172 = V6_vsub_sf_hf
3856
    { 3171, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3171 = V6_vsub_sf_bf
3857
    { 3170, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3170 = V6_vsub_sf
3858
    { 3169, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3169 = V6_vsub_qf32_mix
3859
    { 3168, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3168 = V6_vsub_qf32
3860
    { 3167, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3167 = V6_vsub_qf16_mix
3861
    { 3166, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3166 = V6_vsub_qf16
3862
    { 3165, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #3165 = V6_vsub_hf_hf
3863
    { 3164, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3164 = V6_vsub_hf
3864
    { 3163, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3163 = V6_vshufoh
3865
    { 3162, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 363,  0, 0x800000000008011ULL },  // Inst #3162 = V6_vshufoeh
3866
    { 3161, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 363,  0, 0x800000000008011ULL },  // Inst #3161 = V6_vshufoeb
3867
    { 3160, 4,  1,  4,  258,  0,  0,  HexagonImpOpBase + 0, 971,  0, 0x800000000008019ULL },  // Inst #3160 = V6_vshuffvdd
3868
    { 3159, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3159 = V6_vshuffob
3869
    { 3158, 2,  1,  4,  256,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x800000000008018ULL },  // Inst #3158 = V6_vshuffh
3870
    { 3157, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3157 = V6_vshuffeb
3871
    { 3156, 2,  1,  4,  256,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x800000000008018ULL },  // Inst #3156 = V6_vshuffb
3872
    { 3155, 5,  2,  4,  255,  0,  0,  HexagonImpOpBase + 0, 473,  0, 0x80c000000008019ULL },  // Inst #3155 = V6_vshuff
3873
    { 3154, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3154 = V6_vshufeh
3874
    { 3153, 2,  1,  4,  288,  0,  0,  HexagonImpOpBase + 0, 453,  0, 0x800000000008011ULL },  // Inst #3153 = V6_vsh
3875
    { 3152, 5,  0,  4,  290,  0,  0,  HexagonImpOpBase + 0, 459,  0|(1ULL<<MCID::MayStore), 0x380018000000000bULL },  // Inst #3152 = V6_vscattermwq
3876
    { 3151, 4,  0,  4,  289,  0,  0,  HexagonImpOpBase + 0, 455,  0|(1ULL<<MCID::MayStore), 0x384018000000000bULL },  // Inst #3151 = V6_vscattermw_add
3877
    { 3150, 4,  0,  4,  289,  0,  0,  HexagonImpOpBase + 0, 455,  0|(1ULL<<MCID::MayStore), 0x380018000000000bULL },  // Inst #3150 = V6_vscattermw
3878
    { 3149, 5,  0,  4,  292,  0,  0,  HexagonImpOpBase + 0, 468,  0|(1ULL<<MCID::MayStore), 0x80010000000000cULL },  // Inst #3149 = V6_vscattermhwq
3879
    { 3148, 4,  0,  4,  291,  0,  0,  HexagonImpOpBase + 0, 464,  0|(1ULL<<MCID::MayStore), 0x84010000000000cULL },  // Inst #3148 = V6_vscattermhw_add
3880
    { 3147, 4,  0,  4,  291,  0,  0,  HexagonImpOpBase + 0, 464,  0|(1ULL<<MCID::MayStore), 0x80010000000000cULL },  // Inst #3147 = V6_vscattermhw
3881
    { 3146, 5,  0,  4,  290,  0,  0,  HexagonImpOpBase + 0, 459,  0|(1ULL<<MCID::MayStore), 0x380010000000000bULL },  // Inst #3146 = V6_vscattermhq
3882
    { 3145, 4,  0,  4,  289,  0,  0,  HexagonImpOpBase + 0, 455,  0|(1ULL<<MCID::MayStore), 0x384010000000000bULL },  // Inst #3145 = V6_vscattermh_add
3883
    { 3144, 4,  0,  4,  289,  0,  0,  HexagonImpOpBase + 0, 455,  0|(1ULL<<MCID::MayStore), 0x380010000000000bULL },  // Inst #3144 = V6_vscattermh
3884
    { 3143, 2,  1,  4,  288,  0,  0,  HexagonImpOpBase + 0, 453,  0, 0x800000000008011ULL },  // Inst #3143 = V6_vsb
3885
    { 3142, 3,  1,  4,  287,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3142 = V6_vsatwh
3886
    { 3141, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3141 = V6_vsatuwuh
3887
    { 3140, 3,  1,  4,  287,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3140 = V6_vsathub
3888
    { 3139, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3139 = V6_vsatdw
3889
    { 3138, 5,  1,  4,  280,  0,  0,  HexagonImpOpBase + 0, 444,  0, 0x84000000000801dULL },  // Inst #3138 = V6_vrsadubi_acc
3890
    { 3137, 4,  1,  4,  279,  0,  0,  HexagonImpOpBase + 0, 449,  0, 0x80000000000801dULL },  // Inst #3137 = V6_vrsadubi
3891
    { 3136, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3136 = V6_vroundwuh
3892
    { 3135, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3135 = V6_vroundwh
3893
    { 3134, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3134 = V6_vrounduwuh
3894
    { 3133, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3133 = V6_vrounduhub
3895
    { 3132, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3132 = V6_vroundhub
3896
    { 3131, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3131 = V6_vroundhb
3897
    { 3130, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #3130 = V6_vrotr
3898
    { 3129, 3,  1,  4,  286,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x800000000008018ULL },  // Inst #3129 = V6_vror
3899
    { 3128, 5,  2,  4,  285,  0,  0,  HexagonImpOpBase + 0, 1036, 0, 0x840000000008006ULL },  // Inst #3128 = V6_vrmpyznb_rx_acc
3900
    { 3127, 4,  2,  4,  284,  0,  0,  HexagonImpOpBase + 0, 1032, 0, 0x800000000008006ULL },  // Inst #3127 = V6_vrmpyznb_rx
3901
    { 3126, 4,  1,  4,  283,  0,  0,  HexagonImpOpBase + 0, 1028, 0, 0x840000000008006ULL },  // Inst #3126 = V6_vrmpyznb_rt_acc
3902
    { 3125, 3,  1,  4,  282,  0,  0,  HexagonImpOpBase + 0, 1025, 0, 0x800000000008006ULL },  // Inst #3125 = V6_vrmpyznb_rt
3903
    { 3124, 5,  2,  4,  285,  0,  0,  HexagonImpOpBase + 0, 1036, 0, 0x840000000008006ULL },  // Inst #3124 = V6_vrmpyzcbs_rx_acc
3904
    { 3123, 4,  2,  4,  284,  0,  0,  HexagonImpOpBase + 0, 1032, 0, 0x800000000008006ULL },  // Inst #3123 = V6_vrmpyzcbs_rx
3905
    { 3122, 4,  1,  4,  283,  0,  0,  HexagonImpOpBase + 0, 1028, 0, 0x840000000008006ULL },  // Inst #3122 = V6_vrmpyzcbs_rt_acc
3906
    { 3121, 3,  1,  4,  282,  0,  0,  HexagonImpOpBase + 0, 1025, 0, 0x800000000008006ULL },  // Inst #3121 = V6_vrmpyzcbs_rt
3907
    { 3120, 5,  2,  4,  285,  0,  0,  HexagonImpOpBase + 0, 1036, 0, 0x840000000008006ULL },  // Inst #3120 = V6_vrmpyzcb_rx_acc
3908
    { 3119, 4,  2,  4,  284,  0,  0,  HexagonImpOpBase + 0, 1032, 0, 0x800000000008006ULL },  // Inst #3119 = V6_vrmpyzcb_rx
3909
    { 3118, 4,  1,  4,  283,  0,  0,  HexagonImpOpBase + 0, 1028, 0, 0x840000000008006ULL },  // Inst #3118 = V6_vrmpyzcb_rt_acc
3910
    { 3117, 3,  1,  4,  282,  0,  0,  HexagonImpOpBase + 0, 1025, 0, 0x800000000008006ULL },  // Inst #3117 = V6_vrmpyzcb_rt
3911
    { 3116, 5,  2,  4,  285,  0,  0,  HexagonImpOpBase + 0, 1036, 0, 0x840000000008006ULL },  // Inst #3116 = V6_vrmpyzbub_rx_acc
3912
    { 3115, 4,  2,  4,  284,  0,  0,  HexagonImpOpBase + 0, 1032, 0, 0x800000000008006ULL },  // Inst #3115 = V6_vrmpyzbub_rx
3913
    { 3114, 4,  1,  4,  283,  0,  0,  HexagonImpOpBase + 0, 1028, 0, 0x840000000008006ULL },  // Inst #3114 = V6_vrmpyzbub_rt_acc
3914
    { 3113, 3,  1,  4,  282,  0,  0,  HexagonImpOpBase + 0, 1025, 0, 0x800000000008006ULL },  // Inst #3113 = V6_vrmpyzbub_rt
3915
    { 3112, 5,  2,  4,  285,  0,  0,  HexagonImpOpBase + 0, 1036, 0, 0x840000000008006ULL },  // Inst #3112 = V6_vrmpyzbb_rx_acc
3916
    { 3111, 4,  2,  4,  284,  0,  0,  HexagonImpOpBase + 0, 1032, 0, 0x800000000008006ULL },  // Inst #3111 = V6_vrmpyzbb_rx
3917
    { 3110, 4,  1,  4,  283,  0,  0,  HexagonImpOpBase + 0, 1028, 0, 0x840000000008006ULL },  // Inst #3110 = V6_vrmpyzbb_rt_acc
3918
    { 3109, 3,  1,  4,  282,  0,  0,  HexagonImpOpBase + 0, 1025, 0, 0x800000000008006ULL },  // Inst #3109 = V6_vrmpyzbb_rt
3919
    { 3108, 4,  1,  4,  281,  0,  0,  HexagonImpOpBase + 0, 404,  0, 0x84000000000801cULL },  // Inst #3108 = V6_vrmpyubv_acc
3920
    { 3107, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #3107 = V6_vrmpyubv
3921
    { 3106, 5,  1,  4,  280,  0,  0,  HexagonImpOpBase + 0, 444,  0, 0x84000000000801dULL },  // Inst #3106 = V6_vrmpyubi_acc
3922
    { 3105, 4,  1,  4,  279,  0,  0,  HexagonImpOpBase + 0, 449,  0, 0x80000000000801dULL },  // Inst #3105 = V6_vrmpyubi
3923
    { 3104, 4,  1,  4,  278,  0,  0,  HexagonImpOpBase + 0, 437,  0, 0x84000000000801bULL },  // Inst #3104 = V6_vrmpyub_rtt_acc
3924
    { 3103, 3,  1,  4,  277,  0,  0,  HexagonImpOpBase + 0, 441,  0, 0x80000000000801bULL },  // Inst #3103 = V6_vrmpyub_rtt
3925
    { 3102, 4,  1,  4,  261,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801cULL },  // Inst #3102 = V6_vrmpyub_acc
3926
    { 3101, 3,  1,  4,  260,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #3101 = V6_vrmpyub
3927
    { 3100, 4,  1,  4,  281,  0,  0,  HexagonImpOpBase + 0, 404,  0, 0x84000000000801cULL },  // Inst #3100 = V6_vrmpybv_acc
3928
    { 3099, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #3099 = V6_vrmpybv
3929
    { 3098, 4,  1,  4,  281,  0,  0,  HexagonImpOpBase + 0, 404,  0, 0x84000000000801cULL },  // Inst #3098 = V6_vrmpybusv_acc
3930
    { 3097, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #3097 = V6_vrmpybusv
3931
    { 3096, 5,  1,  4,  280,  0,  0,  HexagonImpOpBase + 0, 444,  0, 0x84000000000801dULL },  // Inst #3096 = V6_vrmpybusi_acc
3932
    { 3095, 4,  1,  4,  279,  0,  0,  HexagonImpOpBase + 0, 449,  0, 0x80000000000801dULL },  // Inst #3095 = V6_vrmpybusi
3933
    { 3094, 4,  1,  4,  261,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801cULL },  // Inst #3094 = V6_vrmpybus_acc
3934
    { 3093, 3,  1,  4,  260,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #3093 = V6_vrmpybus
3935
    { 3092, 4,  1,  4,  278,  0,  0,  HexagonImpOpBase + 0, 437,  0, 0x84000000000801bULL },  // Inst #3092 = V6_vrmpybub_rtt_acc
3936
    { 3091, 3,  1,  4,  277,  0,  0,  HexagonImpOpBase + 0, 441,  0, 0x80000000000801bULL },  // Inst #3091 = V6_vrmpybub_rtt
3937
    { 3090, 3,  1,  4,  257,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x800000000008018ULL },  // Inst #3090 = V6_vrdelta
3938
    { 3089, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 1023, 0, 0x80000000000801aULL },  // Inst #3089 = V6_vprefixqw
3939
    { 3088, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 1023, 0, 0x80000000000801aULL },  // Inst #3088 = V6_vprefixqh
3940
    { 3087, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 1023, 0, 0x80000000000801aULL },  // Inst #3087 = V6_vprefixqb
3941
    { 3086, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801aULL },  // Inst #3086 = V6_vpopcounth
3942
    { 3085, 3,  1,  4,  257,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x800000000008018ULL },  // Inst #3085 = V6_vpackwuh_sat
3943
    { 3084, 3,  1,  4,  257,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x800000000008018ULL },  // Inst #3084 = V6_vpackwh_sat
3944
    { 3083, 3,  1,  4,  257,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x800000000008018ULL },  // Inst #3083 = V6_vpackoh
3945
    { 3082, 3,  1,  4,  257,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x800000000008018ULL },  // Inst #3082 = V6_vpackob
3946
    { 3081, 3,  1,  4,  257,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x800000000008018ULL },  // Inst #3081 = V6_vpackhub_sat
3947
    { 3080, 3,  1,  4,  257,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x800000000008018ULL },  // Inst #3080 = V6_vpackhb_sat
3948
    { 3079, 3,  1,  4,  257,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x800000000008018ULL },  // Inst #3079 = V6_vpackeh
3949
    { 3078, 3,  1,  4,  257,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x800000000008018ULL },  // Inst #3078 = V6_vpackeb
3950
    { 3077, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3077 = V6_vor
3951
    { 3076, 2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 347,  0, 0x3800000000008010ULL },  // Inst #3076 = V6_vnot
3952
    { 3075, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801aULL },  // Inst #3075 = V6_vnormamtw
3953
    { 3074, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801aULL },  // Inst #3074 = V6_vnormamth
3954
    { 3073, 3,  1,  4,  44, 0,  0,  HexagonImpOpBase + 0, 968,  0, 0x1800000000008c10ULL },  // Inst #3073 = V6_vncmov
3955
    { 3072, 4,  1,  4,  47, 0,  0,  HexagonImpOpBase + 0, 964,  0, 0x800000000008c11ULL },  // Inst #3072 = V6_vnccombine
3956
    { 3071, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3071 = V6_vnavgw
3957
    { 3070, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3070 = V6_vnavgub
3958
    { 3069, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3069 = V6_vnavgh
3959
    { 3068, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #3068 = V6_vnavgb
3960
    { 3067, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 942,  0, 0x3800000000008010ULL },  // Inst #3067 = V6_vmux
3961
    { 3066, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #3066 = V6_vmpyuhvs
3962
    { 3065, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #3065 = V6_vmpyuhv_acc
3963
    { 3064, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3064 = V6_vmpyuhv
3964
    { 3063, 4,  1,  4,  261,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801cULL },  // Inst #3063 = V6_vmpyuhe_acc
3965
    { 3062, 3,  1,  4,  260,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #3062 = V6_vmpyuhe
3966
    { 3061, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 430,  0, 0x84000000000801dULL },  // Inst #3061 = V6_vmpyuh_acc
3967
    { 3060, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 434,  0, 0x80000000000801dULL },  // Inst #3060 = V6_vmpyuh
3968
    { 3059, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #3059 = V6_vmpyubv_acc
3969
    { 3058, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3058 = V6_vmpyubv
3970
    { 3057, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 430,  0, 0x84000000000801dULL },  // Inst #3057 = V6_vmpyub_acc
3971
    { 3056, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 434,  0, 0x80000000000801dULL },  // Inst #3056 = V6_vmpyub
3972
    { 3055, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 404,  0, 0x84000000000801dULL },  // Inst #3055 = V6_vmpyowh_sacc
3973
    { 3054, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 404,  0, 0x84000000000801dULL },  // Inst #3054 = V6_vmpyowh_rnd_sacc
3974
    { 3053, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3053 = V6_vmpyowh_rnd
3975
    { 3052, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #3052 = V6_vmpyowh_64_acc
3976
    { 3051, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3051 = V6_vmpyowh
3977
    { 3050, 4,  1,  4,  261,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801cULL },  // Inst #3050 = V6_vmpyiwub_acc
3978
    { 3049, 3,  1,  4,  260,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #3049 = V6_vmpyiwub
3979
    { 3048, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801dULL },  // Inst #3048 = V6_vmpyiwh_acc
3980
    { 3047, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801dULL },  // Inst #3047 = V6_vmpyiwh
3981
    { 3046, 4,  1,  4,  261,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801cULL },  // Inst #3046 = V6_vmpyiwb_acc
3982
    { 3045, 3,  1,  4,  260,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #3045 = V6_vmpyiwb
3983
    { 3044, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3044 = V6_vmpyiowh
3984
    { 3043, 4,  1,  4,  261,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801cULL },  // Inst #3043 = V6_vmpyihb_acc
3985
    { 3042, 3,  1,  4,  260,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #3042 = V6_vmpyihb
3986
    { 3041, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 404,  0, 0x84000000000801dULL },  // Inst #3041 = V6_vmpyih_acc
3987
    { 3040, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3040 = V6_vmpyih
3988
    { 3039, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 404,  0, 0x84000000000801dULL },  // Inst #3039 = V6_vmpyiewuh_acc
3989
    { 3038, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3038 = V6_vmpyiewuh
3990
    { 3037, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 404,  0, 0x84000000000801dULL },  // Inst #3037 = V6_vmpyiewh_acc
3991
    { 3036, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #3036 = V6_vmpyieoh
3992
    { 3035, 3,  1,  4,  266,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #3035 = V6_vmpyhvsrs
3993
    { 3034, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #3034 = V6_vmpyhv_acc
3994
    { 3033, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3033 = V6_vmpyhv
3995
    { 3032, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #3032 = V6_vmpyhus_acc
3996
    { 3031, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3031 = V6_vmpyhus
3997
    { 3030, 3,  1,  4,  264,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #3030 = V6_vmpyhss
3998
    { 3029, 3,  1,  4,  264,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #3029 = V6_vmpyhsrs
3999
    { 3028, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 430,  0, 0x84000000000801dULL },  // Inst #3028 = V6_vmpyhsat_acc
4000
    { 3027, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 430,  0, 0x84000000000801dULL },  // Inst #3027 = V6_vmpyh_acc
4001
    { 3026, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 434,  0, 0x80000000000801dULL },  // Inst #3026 = V6_vmpyh
4002
    { 3025, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3025 = V6_vmpyewuh_64
4003
    { 3024, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3024 = V6_vmpyewuh
4004
    { 3023, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #3023 = V6_vmpybv_acc
4005
    { 3022, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3022 = V6_vmpybv
4006
    { 3021, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #3021 = V6_vmpybusv_acc
4007
    { 3020, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3020 = V6_vmpybusv
4008
    { 3019, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 430,  0, 0x84000000000801dULL },  // Inst #3019 = V6_vmpybus_acc
4009
    { 3018, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 434,  0, 0x80000000000801dULL },  // Inst #3018 = V6_vmpybus
4010
    { 3017, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3017 = V6_vmpy_sf_sf
4011
    { 3016, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #3016 = V6_vmpy_sf_hf_acc
4012
    { 3015, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3015 = V6_vmpy_sf_hf
4013
    { 3014, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #3014 = V6_vmpy_sf_bf_acc
4014
    { 3013, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3013 = V6_vmpy_sf_bf
4015
    { 3012, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3012 = V6_vmpy_qf32_sf
4016
    { 3011, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3011 = V6_vmpy_qf32_qf16
4017
    { 3010, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3010 = V6_vmpy_qf32_mix_hf
4018
    { 3009, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #3009 = V6_vmpy_qf32_hf
4019
    { 3008, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3008 = V6_vmpy_qf32
4020
    { 3007, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3007 = V6_vmpy_qf16_mix_hf
4021
    { 3006, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3006 = V6_vmpy_qf16_hf
4022
    { 3005, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801dULL },  // Inst #3005 = V6_vmpy_qf16
4023
    { 3004, 4,  1,  4,  259,  0,  0,  HexagonImpOpBase + 0, 404,  0, 0x84000000000801cULL },  // Inst #3004 = V6_vmpy_hf_hf_acc
4024
    { 3003, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #3003 = V6_vmpy_hf_hf
4025
    { 3002, 4,  1,  4,  276,  0,  0,  HexagonImpOpBase + 0, 1019, 0, 0x80000000000801dULL },  // Inst #3002 = V6_vmpsuhuhsat
4026
    { 3001, 4,  1,  4,  276,  0,  0,  HexagonImpOpBase + 0, 1019, 0, 0x80000000000801dULL },  // Inst #3001 = V6_vmpauhuhsat
4027
    { 3000, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 390,  0, 0x84000000000801dULL },  // Inst #3000 = V6_vmpauhb_acc
4028
    { 2999, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 394,  0, 0x80000000000801dULL },  // Inst #2999 = V6_vmpauhb
4029
    { 2998, 4,  1,  4,  276,  0,  0,  HexagonImpOpBase + 0, 1019, 0, 0x80000000000801dULL },  // Inst #2998 = V6_vmpahhsat
4030
    { 2997, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 390,  0, 0x84000000000801dULL },  // Inst #2997 = V6_vmpahb_acc
4031
    { 2996, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 394,  0, 0x80000000000801dULL },  // Inst #2996 = V6_vmpahb
4032
    { 2995, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 352,  0, 0x80000000000801dULL },  // Inst #2995 = V6_vmpabuuv
4033
    { 2994, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 390,  0, 0x84000000000801dULL },  // Inst #2994 = V6_vmpabuu_acc
4034
    { 2993, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 394,  0, 0x80000000000801dULL },  // Inst #2993 = V6_vmpabuu
4035
    { 2992, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 352,  0, 0x80000000000801dULL },  // Inst #2992 = V6_vmpabusv
4036
    { 2991, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 390,  0, 0x84000000000801dULL },  // Inst #2991 = V6_vmpabus_acc
4037
    { 2990, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 394,  0, 0x80000000000801dULL },  // Inst #2990 = V6_vmpabus
4038
    { 2989, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2989 = V6_vminw
4039
    { 2988, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2988 = V6_vminuh
4040
    { 2987, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2987 = V6_vminub
4041
    { 2986, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2986 = V6_vminh
4042
    { 2985, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2985 = V6_vminb
4043
    { 2984, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2984 = V6_vmin_sf
4044
    { 2983, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2983 = V6_vmin_hf
4045
    { 2982, 3,  1,  4,  267,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801eULL },  // Inst #2982 = V6_vmin_bf
4046
    { 2981, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2981 = V6_vmaxw
4047
    { 2980, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2980 = V6_vmaxuh
4048
    { 2979, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2979 = V6_vmaxub
4049
    { 2978, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2978 = V6_vmaxh
4050
    { 2977, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2977 = V6_vmaxb
4051
    { 2976, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2976 = V6_vmax_sf
4052
    { 2975, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2975 = V6_vmax_hf
4053
    { 2974, 3,  1,  4,  267,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801eULL },  // Inst #2974 = V6_vmax_bf
4054
    { 2973, 4,  1,  4,  258,  0,  0,  HexagonImpOpBase + 0, 1015, 0, 0x800000000008019ULL },  // Inst #2973 = V6_vlutvwhi
4055
    { 2972, 5,  1,  4,  275,  0,  0,  HexagonImpOpBase + 0, 1010, 0, 0x840000000008019ULL },  // Inst #2972 = V6_vlutvwh_oracci
4056
    { 2971, 5,  1,  4,  275,  0,  0,  HexagonImpOpBase + 0, 1005, 0, 0x840000000008019ULL },  // Inst #2971 = V6_vlutvwh_oracc
4057
    { 2970, 4,  1,  4,  258,  0,  0,  HexagonImpOpBase + 0, 971,  0, 0x800000000008019ULL },  // Inst #2970 = V6_vlutvwh_nm
4058
    { 2969, 4,  1,  4,  258,  0,  0,  HexagonImpOpBase + 0, 971,  0, 0x800000000008019ULL },  // Inst #2969 = V6_vlutvwh
4059
    { 2968, 4,  1,  4,  243,  0,  0,  HexagonImpOpBase + 0, 954,  0, 0x800000000008018ULL },  // Inst #2968 = V6_vlutvvbi
4060
    { 2967, 5,  1,  4,  275,  0,  0,  HexagonImpOpBase + 0, 1000, 0, 0x840000000008019ULL },  // Inst #2967 = V6_vlutvvb_oracci
4061
    { 2966, 5,  1,  4,  275,  0,  0,  HexagonImpOpBase + 0, 995,  0, 0x840000000008019ULL },  // Inst #2966 = V6_vlutvvb_oracc
4062
    { 2965, 4,  1,  4,  243,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x800000000008018ULL },  // Inst #2965 = V6_vlutvvb_nm
4063
    { 2964, 4,  1,  4,  243,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x800000000008018ULL },  // Inst #2964 = V6_vlutvvb
4064
    { 2963, 3,  1,  4,  274,  0,  0,  HexagonImpOpBase + 0, 992,  0, 0x80000000000801dULL },  // Inst #2963 = V6_vlut4
4065
    { 2962, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2962 = V6_vlsrwv
4066
    { 2961, 3,  1,  4,  246,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801aULL },  // Inst #2961 = V6_vlsrw
4067
    { 2960, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2960 = V6_vlsrhv
4068
    { 2959, 3,  1,  4,  246,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801aULL },  // Inst #2959 = V6_vlsrh
4069
    { 2958, 3,  1,  4,  246,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801aULL },  // Inst #2958 = V6_vlsrb
4070
    { 2957, 4,  1,  4,  243,  0,  0,  HexagonImpOpBase + 0, 954,  0, 0x800000000008018ULL },  // Inst #2957 = V6_vlalignbi
4071
    { 2956, 4,  1,  4,  243,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x800000000008018ULL },  // Inst #2956 = V6_vlalignb
4072
    { 2955, 3,  1,  4,  244,  0,  0,  HexagonImpOpBase + 0, 989,  0, 0x80000000000801eULL },  // Inst #2955 = V6_vinsertwr
4073
    { 2954, 1,  0,  4,  273,  0,  0,  HexagonImpOpBase + 0, 237,  0, 0x80000000000000aULL },  // Inst #2954 = V6_vhistq
4074
    { 2953, 0,  0,  4,  272,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0x80000000000000aULL },  // Inst #2953 = V6_vhist
4075
    { 2952, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2952 = V6_vgtw_xor
4076
    { 2951, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2951 = V6_vgtw_or
4077
    { 2950, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2950 = V6_vgtw_and
4078
    { 2949, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2949 = V6_vgtw
4079
    { 2948, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2948 = V6_vgtuw_xor
4080
    { 2947, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2947 = V6_vgtuw_or
4081
    { 2946, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2946 = V6_vgtuw_and
4082
    { 2945, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2945 = V6_vgtuw
4083
    { 2944, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2944 = V6_vgtuh_xor
4084
    { 2943, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2943 = V6_vgtuh_or
4085
    { 2942, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2942 = V6_vgtuh_and
4086
    { 2941, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2941 = V6_vgtuh
4087
    { 2940, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2940 = V6_vgtub_xor
4088
    { 2939, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2939 = V6_vgtub_or
4089
    { 2938, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2938 = V6_vgtub_and
4090
    { 2937, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2937 = V6_vgtub
4091
    { 2936, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2936 = V6_vgtsf_xor
4092
    { 2935, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2935 = V6_vgtsf_or
4093
    { 2934, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2934 = V6_vgtsf_and
4094
    { 2933, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2933 = V6_vgtsf
4095
    { 2932, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2932 = V6_vgthf_xor
4096
    { 2931, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2931 = V6_vgthf_or
4097
    { 2930, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2930 = V6_vgthf_and
4098
    { 2929, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2929 = V6_vgthf
4099
    { 2928, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2928 = V6_vgth_xor
4100
    { 2927, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2927 = V6_vgth_or
4101
    { 2926, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2926 = V6_vgth_and
4102
    { 2925, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2925 = V6_vgth
4103
    { 2924, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2924 = V6_vgtbf_xor
4104
    { 2923, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2923 = V6_vgtbf_or
4105
    { 2922, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2922 = V6_vgtbf_and
4106
    { 2921, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2921 = V6_vgtbf
4107
    { 2920, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2920 = V6_vgtb_xor
4108
    { 2919, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2919 = V6_vgtb_or
4109
    { 2918, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2918 = V6_vgtb_and
4110
    { 2917, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2917 = V6_vgtb
4111
    { 2916, 4,  0,  4,  269,  0,  1,  HexagonImpOpBase + 168, 978,  0|(1ULL<<MCID::MayLoad), 0x1800180000408007ULL },  // Inst #2916 = V6_vgathermwq
4112
    { 2915, 3,  0,  4,  268,  0,  1,  HexagonImpOpBase + 168, 975,  0|(1ULL<<MCID::MayLoad), 0x1800180000408007ULL },  // Inst #2915 = V6_vgathermw
4113
    { 2914, 4,  0,  4,  271,  0,  1,  HexagonImpOpBase + 168, 985,  0|(1ULL<<MCID::MayLoad), 0x800100000408008ULL },  // Inst #2914 = V6_vgathermhwq
4114
    { 2913, 3,  0,  4,  270,  0,  1,  HexagonImpOpBase + 168, 982,  0|(1ULL<<MCID::MayLoad), 0x800100000408008ULL },  // Inst #2913 = V6_vgathermhw
4115
    { 2912, 4,  0,  4,  269,  0,  1,  HexagonImpOpBase + 168, 978,  0|(1ULL<<MCID::MayLoad), 0x1800100000408007ULL },  // Inst #2912 = V6_vgathermhq
4116
    { 2911, 3,  0,  4,  268,  0,  1,  HexagonImpOpBase + 168, 975,  0|(1ULL<<MCID::MayLoad), 0x1800100000408007ULL },  // Inst #2911 = V6_vgathermh
4117
    { 2910, 2,  1,  4,  235,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801eULL },  // Inst #2910 = V6_vfneg_sf
4118
    { 2909, 2,  1,  4,  235,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801eULL },  // Inst #2909 = V6_vfneg_hf
4119
    { 2908, 3,  1,  4,  267,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801eULL },  // Inst #2908 = V6_vfmin_sf
4120
    { 2907, 3,  1,  4,  267,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801eULL },  // Inst #2907 = V6_vfmin_hf
4121
    { 2906, 3,  1,  4,  267,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801eULL },  // Inst #2906 = V6_vfmax_sf
4122
    { 2905, 3,  1,  4,  267,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801eULL },  // Inst #2905 = V6_vfmax_hf
4123
    { 2904, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2904 = V6_veqw_xor
4124
    { 2903, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2903 = V6_veqw_or
4125
    { 2902, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2902 = V6_veqw_and
4126
    { 2901, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2901 = V6_veqw
4127
    { 2900, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2900 = V6_veqh_xor
4128
    { 2899, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2899 = V6_veqh_or
4129
    { 2898, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2898 = V6_veqh_and
4130
    { 2897, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2897 = V6_veqh
4131
    { 2896, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2896 = V6_veqb_xor
4132
    { 2895, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3840000000000010ULL },  // Inst #2895 = V6_veqb_or
4133
    { 2894, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 314,  0, 0x3800000000000010ULL },  // Inst #2894 = V6_veqb_and
4134
    { 2893, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 311,  0, 0x3800000000008010ULL },  // Inst #2893 = V6_veqb
4135
    { 2892, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 390,  0, 0x84000000000801dULL },  // Inst #2892 = V6_vdsaduh_acc
4136
    { 2891, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 394,  0, 0x80000000000801dULL },  // Inst #2891 = V6_vdsaduh
4137
    { 2890, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 404,  0, 0x84000000000801dULL },  // Inst #2890 = V6_vdmpyhvsat_acc
4138
    { 2889, 3,  1,  4,  266,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2889 = V6_vdmpyhvsat
4139
    { 2888, 4,  1,  4,  265,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801cULL },  // Inst #2888 = V6_vdmpyhsusat_acc
4140
    { 2887, 3,  1,  4,  264,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #2887 = V6_vdmpyhsusat
4141
    { 2886, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 397,  0, 0x84000000000801dULL },  // Inst #2886 = V6_vdmpyhsuisat_acc
4142
    { 2885, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 401,  0, 0x80000000000801dULL },  // Inst #2885 = V6_vdmpyhsuisat
4143
    { 2884, 4,  1,  4,  265,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801cULL },  // Inst #2884 = V6_vdmpyhsat_acc
4144
    { 2883, 3,  1,  4,  264,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #2883 = V6_vdmpyhsat
4145
    { 2882, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 397,  0, 0x84000000000801dULL },  // Inst #2882 = V6_vdmpyhisat_acc
4146
    { 2881, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 401,  0, 0x80000000000801dULL },  // Inst #2881 = V6_vdmpyhisat
4147
    { 2880, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 390,  0, 0x84000000000801dULL },  // Inst #2880 = V6_vdmpyhb_dv_acc
4148
    { 2879, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 394,  0, 0x80000000000801dULL },  // Inst #2879 = V6_vdmpyhb_dv
4149
    { 2878, 4,  1,  4,  261,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801cULL },  // Inst #2878 = V6_vdmpyhb_acc
4150
    { 2877, 3,  1,  4,  260,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #2877 = V6_vdmpyhb
4151
    { 2876, 4,  1,  4,  263,  0,  0,  HexagonImpOpBase + 0, 390,  0, 0x84000000000801dULL },  // Inst #2876 = V6_vdmpybus_dv_acc
4152
    { 2875, 3,  1,  4,  262,  0,  0,  HexagonImpOpBase + 0, 394,  0, 0x80000000000801dULL },  // Inst #2875 = V6_vdmpybus_dv
4153
    { 2874, 4,  1,  4,  261,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801cULL },  // Inst #2874 = V6_vdmpybus_acc
4154
    { 2873, 3,  1,  4,  260,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801cULL },  // Inst #2873 = V6_vdmpybus
4155
    { 2872, 4,  1,  4,  259,  0,  0,  HexagonImpOpBase + 0, 404,  0, 0x84000000000801cULL },  // Inst #2872 = V6_vdmpy_sf_hf_acc
4156
    { 2871, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2871 = V6_vdmpy_sf_hf
4157
    { 2870, 3,  1,  4,  257,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x800000000008018ULL },  // Inst #2870 = V6_vdelta
4158
    { 2869, 4,  1,  4,  258,  0,  0,  HexagonImpOpBase + 0, 971,  0, 0x800000000008019ULL },  // Inst #2869 = V6_vdealvdd
4159
    { 2868, 2,  1,  4,  256,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x800000000008018ULL },  // Inst #2868 = V6_vdealh
4160
    { 2867, 3,  1,  4,  257,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x800000000008018ULL },  // Inst #2867 = V6_vdealb4w
4161
    { 2866, 2,  1,  4,  256,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x800000000008018ULL },  // Inst #2866 = V6_vdealb
4162
    { 2865, 5,  2,  4,  255,  0,  0,  HexagonImpOpBase + 0, 473,  0, 0x80c000000008019ULL },  // Inst #2865 = V6_vdeal
4163
    { 2864, 2,  1,  4,  253,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801cULL },  // Inst #2864 = V6_vcvt_uh_hf
4164
    { 2863, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2863 = V6_vcvt_ub_hf
4165
    { 2862, 2,  1,  4,  254,  0,  0,  HexagonImpOpBase + 0, 453,  0, 0x80000000000801dULL },  // Inst #2862 = V6_vcvt_sf_hf
4166
    { 2861, 2,  1,  4,  253,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801cULL },  // Inst #2861 = V6_vcvt_hf_uh
4167
    { 2860, 2,  1,  4,  254,  0,  0,  HexagonImpOpBase + 0, 453,  0, 0x80000000000801dULL },  // Inst #2860 = V6_vcvt_hf_ub
4168
    { 2859, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2859 = V6_vcvt_hf_sf
4169
    { 2858, 2,  1,  4,  253,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801cULL },  // Inst #2858 = V6_vcvt_hf_h
4170
    { 2857, 2,  1,  4,  254,  0,  0,  HexagonImpOpBase + 0, 453,  0, 0x80000000000801dULL },  // Inst #2857 = V6_vcvt_hf_b
4171
    { 2856, 2,  1,  4,  253,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801cULL },  // Inst #2856 = V6_vcvt_h_hf
4172
    { 2855, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2855 = V6_vcvt_bf_sf
4173
    { 2854, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2854 = V6_vcvt_b_hf
4174
    { 2853, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801aULL },  // Inst #2853 = V6_vconv_w_sf
4175
    { 2852, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801aULL },  // Inst #2852 = V6_vconv_sf_w
4176
    { 2851, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801aULL },  // Inst #2851 = V6_vconv_sf_qf32
4177
    { 2850, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 325,  0, 0x80000000000801aULL },  // Inst #2850 = V6_vconv_hf_qf32
4178
    { 2849, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801aULL },  // Inst #2849 = V6_vconv_hf_qf16
4179
    { 2848, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801aULL },  // Inst #2848 = V6_vconv_hf_h
4180
    { 2847, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801aULL },  // Inst #2847 = V6_vconv_h_hf
4181
    { 2846, 3,  1,  4,  252,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x90000000000801cULL },  // Inst #2846 = V6_vcombine_tmp
4182
    { 2845, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::RegSequence), 0x800000000008011ULL },  // Inst #2845 = V6_vcombine
4183
    { 2844, 3,  1,  4,  44, 0,  0,  HexagonImpOpBase + 0, 968,  0, 0x1800000000008410ULL },  // Inst #2844 = V6_vcmov
4184
    { 2843, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801aULL },  // Inst #2843 = V6_vcl0w
4185
    { 2842, 2,  1,  4,  251,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801aULL },  // Inst #2842 = V6_vcl0h
4186
    { 2841, 4,  1,  4,  47, 0,  0,  HexagonImpOpBase + 0, 964,  0, 0x800000000008411ULL },  // Inst #2841 = V6_vccombine
4187
    { 2840, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2840 = V6_vavgwrnd
4188
    { 2839, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2839 = V6_vavgw
4189
    { 2838, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2838 = V6_vavguwrnd
4190
    { 2837, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2837 = V6_vavguw
4191
    { 2836, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2836 = V6_vavguhrnd
4192
    { 2835, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2835 = V6_vavguh
4193
    { 2834, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2834 = V6_vavgubrnd
4194
    { 2833, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2833 = V6_vavgub
4195
    { 2832, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2832 = V6_vavghrnd
4196
    { 2831, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2831 = V6_vavgh
4197
    { 2830, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2830 = V6_vavgbrnd
4198
    { 2829, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2829 = V6_vavgb
4199
    { 2828, 2,  1,  4,  250,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x90000000000801cULL },  // Inst #2828 = V6_vassign_tmp
4200
    { 2827, 2,  1,  4,  235,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801eULL },  // Inst #2827 = V6_vassign_fp
4201
    { 2826, 2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 347,  0, 0x1800000000008010ULL },  // Inst #2826 = V6_vassign
4202
    { 2825, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2825 = V6_vasrwv
4203
    { 2824, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2824 = V6_vasrwuhsat
4204
    { 2823, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2823 = V6_vasrwuhrndsat
4205
    { 2822, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2822 = V6_vasrwhsat
4206
    { 2821, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2821 = V6_vasrwhrndsat
4207
    { 2820, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2820 = V6_vasrwh
4208
    { 2819, 4,  1,  4,  247,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801aULL },  // Inst #2819 = V6_vasrw_acc
4209
    { 2818, 3,  1,  4,  246,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801aULL },  // Inst #2818 = V6_vasrw
4210
    { 2817, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 961,  0, 0x480000000000801aULL },  // Inst #2817 = V6_vasrvwuhsat
4211
    { 2816, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 961,  0, 0x480000000000801aULL },  // Inst #2816 = V6_vasrvwuhrndsat
4212
    { 2815, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 961,  0, 0x480000000000801aULL },  // Inst #2815 = V6_vasrvuhubsat
4213
    { 2814, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 961,  0, 0x480000000000801aULL },  // Inst #2814 = V6_vasrvuhubrndsat
4214
    { 2813, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2813 = V6_vasruwuhsat
4215
    { 2812, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2812 = V6_vasruwuhrndsat
4216
    { 2811, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2811 = V6_vasruhubsat
4217
    { 2810, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2810 = V6_vasruhubrndsat
4218
    { 2809, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2809 = V6_vasrhv
4219
    { 2808, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2808 = V6_vasrhubsat
4220
    { 2807, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2807 = V6_vasrhubrndsat
4221
    { 2806, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2806 = V6_vasrhbsat
4222
    { 2805, 4,  1,  4,  249,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x80000000000801aULL },  // Inst #2805 = V6_vasrhbrndsat
4223
    { 2804, 4,  1,  4,  247,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801aULL },  // Inst #2804 = V6_vasrh_acc
4224
    { 2803, 3,  1,  4,  246,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801aULL },  // Inst #2803 = V6_vasrh
4225
    { 2802, 4,  1,  4,  248,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x800000000008019ULL },  // Inst #2802 = V6_vasr_into
4226
    { 2801, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2801 = V6_vaslwv
4227
    { 2800, 4,  1,  4,  247,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801aULL },  // Inst #2800 = V6_vaslw_acc
4228
    { 2799, 3,  1,  4,  246,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801aULL },  // Inst #2799 = V6_vaslw
4229
    { 2798, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2798 = V6_vaslhv
4230
    { 2797, 4,  1,  4,  247,  0,  0,  HexagonImpOpBase + 0, 380,  0, 0x84000000000801aULL },  // Inst #2797 = V6_vaslh_acc
4231
    { 2796, 3,  1,  4,  246,  0,  0,  HexagonImpOpBase + 0, 384,  0, 0x80000000000801aULL },  // Inst #2796 = V6_vaslh
4232
    { 2795, 4,  1,  4,  245,  0,  0,  HexagonImpOpBase + 0, 373,  0, 0x84000000000001eULL },  // Inst #2795 = V6_vandvrt_acc
4233
    { 2794, 3,  1,  4,  244,  0,  0,  HexagonImpOpBase + 0, 377,  0, 0x80000000000801eULL },  // Inst #2794 = V6_vandvrt
4234
    { 2793, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 958,  0, 0x3800000000008010ULL },  // Inst #2793 = V6_vandvqv
4235
    { 2792, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 958,  0, 0x3800000000008010ULL },  // Inst #2792 = V6_vandvnqv
4236
    { 2791, 4,  1,  4,  245,  0,  0,  HexagonImpOpBase + 0, 366,  0, 0x84000000000801eULL },  // Inst #2791 = V6_vandqrt_acc
4237
    { 2790, 3,  1,  4,  244,  0,  0,  HexagonImpOpBase + 0, 370,  0, 0x80000000000801eULL },  // Inst #2790 = V6_vandqrt
4238
    { 2789, 4,  1,  4,  245,  0,  0,  HexagonImpOpBase + 0, 366,  0, 0x84000000000801eULL },  // Inst #2789 = V6_vandnqrt_acc
4239
    { 2788, 3,  1,  4,  244,  0,  0,  HexagonImpOpBase + 0, 370,  0, 0x80000000000801eULL },  // Inst #2788 = V6_vandnqrt
4240
    { 2787, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2787 = V6_vand
4241
    { 2786, 4,  1,  4,  243,  0,  0,  HexagonImpOpBase + 0, 954,  0, 0x800000000008018ULL },  // Inst #2786 = V6_valignbi
4242
    { 2785, 4,  1,  4,  243,  0,  0,  HexagonImpOpBase + 0, 950,  0, 0x800000000008018ULL },  // Inst #2785 = V6_valignb
4243
    { 2784, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #2784 = V6_vaddwsat_dv
4244
    { 2783, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2783 = V6_vaddwsat
4245
    { 2782, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3840000000008010ULL },  // Inst #2782 = V6_vaddwq
4246
    { 2781, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3840000000008010ULL },  // Inst #2781 = V6_vaddwnq
4247
    { 2780, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #2780 = V6_vaddw_dv
4248
    { 2779, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2779 = V6_vaddw
4249
    { 2778, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #2778 = V6_vadduwsat_dv
4250
    { 2777, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2777 = V6_vadduwsat
4251
    { 2776, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #2776 = V6_vadduhw_acc
4252
    { 2775, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #2775 = V6_vadduhw
4253
    { 2774, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #2774 = V6_vadduhsat_dv
4254
    { 2773, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2773 = V6_vadduhsat
4255
    { 2772, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2772 = V6_vaddububb_sat
4256
    { 2771, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #2771 = V6_vaddubsat_dv
4257
    { 2770, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2770 = V6_vaddubsat
4258
    { 2769, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #2769 = V6_vaddubh_acc
4259
    { 2768, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #2768 = V6_vaddubh
4260
    { 2767, 4,  1,  4,  242,  0,  0,  HexagonImpOpBase + 0, 359,  0, 0x84000000000801dULL },  // Inst #2767 = V6_vaddhw_acc
4261
    { 2766, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #2766 = V6_vaddhw
4262
    { 2765, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #2765 = V6_vaddhsat_dv
4263
    { 2764, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2764 = V6_vaddhsat
4264
    { 2763, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3840000000008010ULL },  // Inst #2763 = V6_vaddhq
4265
    { 2762, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3840000000008010ULL },  // Inst #2762 = V6_vaddhnq
4266
    { 2761, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #2761 = V6_vaddh_dv
4267
    { 2760, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2760 = V6_vaddh
4268
    { 2759, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2759 = V6_vaddclbw
4269
    { 2758, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2758 = V6_vaddclbh
4270
    { 2757, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 946,  0, 0x3800000000008010ULL },  // Inst #2757 = V6_vaddcarrysat
4271
    { 2756, 4,  2,  4,  241,  0,  0,  HexagonImpOpBase + 0, 942,  0, 0x3800000000008010ULL },  // Inst #2756 = V6_vaddcarryo
4272
    { 2755, 5,  2,  4,  240,  0,  0,  HexagonImpOpBase + 0, 937,  0, 0x3800000000008010ULL },  // Inst #2755 = V6_vaddcarry
4273
    { 2754, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #2754 = V6_vaddbsat_dv
4274
    { 2753, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2753 = V6_vaddbsat
4275
    { 2752, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3840000000008010ULL },  // Inst #2752 = V6_vaddbq
4276
    { 2751, 4,  1,  4,  239,  0,  0,  HexagonImpOpBase + 0, 355,  0, 0x3840000000008010ULL },  // Inst #2751 = V6_vaddbnq
4277
    { 2750, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 352,  0, 0x800000000008011ULL },  // Inst #2750 = V6_vaddb_dv
4278
    { 2749, 3,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 349,  0, 0x3800000000008010ULL },  // Inst #2749 = V6_vaddb
4279
    { 2748, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2748 = V6_vadd_sf_sf
4280
    { 2747, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #2747 = V6_vadd_sf_hf
4281
    { 2746, 3,  1,  4,  238,  0,  0,  HexagonImpOpBase + 0, 363,  0, 0x80000000000801dULL },  // Inst #2746 = V6_vadd_sf_bf
4282
    { 2745, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2745 = V6_vadd_sf
4283
    { 2744, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2744 = V6_vadd_qf32_mix
4284
    { 2743, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2743 = V6_vadd_qf32
4285
    { 2742, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2742 = V6_vadd_qf16_mix
4286
    { 2741, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2741 = V6_vadd_qf16
4287
    { 2740, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2740 = V6_vadd_hf_hf
4288
    { 2739, 3,  1,  4,  237,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801aULL },  // Inst #2739 = V6_vadd_hf
4289
    { 2738, 2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 347,  0, 0x3800000000008010ULL },  // Inst #2738 = V6_vabsw_sat
4290
    { 2737, 2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 347,  0, 0x3800000000008010ULL },  // Inst #2737 = V6_vabsw
4291
    { 2736, 2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 347,  0, 0x3800000000008010ULL },  // Inst #2736 = V6_vabsh_sat
4292
    { 2735, 2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 347,  0, 0x3800000000008010ULL },  // Inst #2735 = V6_vabsh
4293
    { 2734, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2734 = V6_vabsdiffw
4294
    { 2733, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2733 = V6_vabsdiffuh
4295
    { 2732, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2732 = V6_vabsdiffub
4296
    { 2731, 3,  1,  4,  236,  0,  0,  HexagonImpOpBase + 0, 349,  0, 0x80000000000801cULL },  // Inst #2731 = V6_vabsdiffh
4297
    { 2730, 2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 347,  0, 0x3800000000008010ULL },  // Inst #2730 = V6_vabsb_sat
4298
    { 2729, 2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 347,  0, 0x3800000000008010ULL },  // Inst #2729 = V6_vabsb
4299
    { 2728, 2,  1,  4,  235,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801eULL },  // Inst #2728 = V6_vabs_sf
4300
    { 2727, 2,  1,  4,  235,  0,  0,  HexagonImpOpBase + 0, 347,  0, 0x80000000000801eULL },  // Inst #2727 = V6_vabs_hf
4301
    { 2726, 3,  1,  4,  234,  0,  0,  HexagonImpOpBase + 0, 934,  0|(1ULL<<MCID::MayStore), 0xc002e000000000dULL },  // Inst #2726 = V6_vS32b_srls_ppu
4302
    { 2725, 3,  1,  4,  234,  0,  0,  HexagonImpOpBase + 0, 495,  0|(1ULL<<MCID::MayStore), 0xc002e000000000dULL },  // Inst #2725 = V6_vS32b_srls_pi
4303
    { 2724, 2,  0,  4,  233,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::MayStore), 0xc002b000000000dULL },  // Inst #2724 = V6_vS32b_srls_ai
4304
    { 2723, 5,  1,  4,  231,  0,  0,  HexagonImpOpBase + 0, 929,  0|(1ULL<<MCID::MayStore), 0x18002e0000000014ULL },  // Inst #2723 = V6_vS32b_qpred_ppu
4305
    { 2722, 5,  1,  4,  231,  0,  0,  HexagonImpOpBase + 0, 924,  0|(1ULL<<MCID::MayStore), 0x18002e0000000014ULL },  // Inst #2722 = V6_vS32b_qpred_pi
4306
    { 2721, 4,  0,  4,  230,  0,  0,  HexagonImpOpBase + 0, 920,  0|(1ULL<<MCID::MayStore), 0x18002b0000000014ULL },  // Inst #2721 = V6_vS32b_qpred_ai
4307
    { 2720, 5,  1,  4,  229,  0,  0,  HexagonImpOpBase + 0, 907,  0|(1ULL<<MCID::MayStore), 0x18002e0000080414ULL },  // Inst #2720 = V6_vS32b_pred_ppu
4308
    { 2719, 5,  1,  4,  229,  0,  0,  HexagonImpOpBase + 0, 902,  0|(1ULL<<MCID::MayStore), 0x18002e0000080414ULL },  // Inst #2719 = V6_vS32b_pred_pi
4309
    { 2718, 4,  0,  4,  228,  0,  0,  HexagonImpOpBase + 0, 898,  0|(1ULL<<MCID::MayStore), 0x18002b0000080414ULL },  // Inst #2718 = V6_vS32b_pred_ai
4310
    { 2717, 4,  1,  4,  232,  0,  0,  HexagonImpOpBase + 0, 916,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x18002e0000080014ULL },  // Inst #2717 = V6_vS32b_ppu
4311
    { 2716, 4,  1,  4,  232,  0,  0,  HexagonImpOpBase + 0, 912,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x18002e0000080014ULL },  // Inst #2716 = V6_vS32b_pi
4312
    { 2715, 5,  1,  4,  231,  0,  0,  HexagonImpOpBase + 0, 929,  0|(1ULL<<MCID::MayStore), 0x18002e0000000014ULL },  // Inst #2715 = V6_vS32b_nt_qpred_ppu
4313
    { 2714, 5,  1,  4,  231,  0,  0,  HexagonImpOpBase + 0, 924,  0|(1ULL<<MCID::MayStore), 0x18002e0000000014ULL },  // Inst #2714 = V6_vS32b_nt_qpred_pi
4314
    { 2713, 4,  0,  4,  230,  0,  0,  HexagonImpOpBase + 0, 920,  0|(1ULL<<MCID::MayStore), 0x18002b0000000014ULL },  // Inst #2713 = V6_vS32b_nt_qpred_ai
4315
    { 2712, 5,  1,  4,  229,  0,  0,  HexagonImpOpBase + 0, 907,  0|(1ULL<<MCID::MayStore), 0x18002e0000080414ULL },  // Inst #2712 = V6_vS32b_nt_pred_ppu
4316
    { 2711, 5,  1,  4,  229,  0,  0,  HexagonImpOpBase + 0, 902,  0|(1ULL<<MCID::MayStore), 0x18002e0000080414ULL },  // Inst #2711 = V6_vS32b_nt_pred_pi
4317
    { 2710, 4,  0,  4,  228,  0,  0,  HexagonImpOpBase + 0, 898,  0|(1ULL<<MCID::MayStore), 0x18002b0000080414ULL },  // Inst #2710 = V6_vS32b_nt_pred_ai
4318
    { 2709, 4,  1,  4,  232,  0,  0,  HexagonImpOpBase + 0, 916,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x18002e0000080014ULL },  // Inst #2709 = V6_vS32b_nt_ppu
4319
    { 2708, 4,  1,  4,  232,  0,  0,  HexagonImpOpBase + 0, 912,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x18002e0000080014ULL },  // Inst #2708 = V6_vS32b_nt_pi
4320
    { 2707, 5,  1,  4,  231,  0,  0,  HexagonImpOpBase + 0, 929,  0|(1ULL<<MCID::MayStore), 0x18002e0000000014ULL },  // Inst #2707 = V6_vS32b_nt_nqpred_ppu
4321
    { 2706, 5,  1,  4,  231,  0,  0,  HexagonImpOpBase + 0, 924,  0|(1ULL<<MCID::MayStore), 0x18002e0000000014ULL },  // Inst #2706 = V6_vS32b_nt_nqpred_pi
4322
    { 2705, 4,  0,  4,  230,  0,  0,  HexagonImpOpBase + 0, 920,  0|(1ULL<<MCID::MayStore), 0x18002b0000000014ULL },  // Inst #2705 = V6_vS32b_nt_nqpred_ai
4323
    { 2704, 5,  1,  4,  229,  0,  0,  HexagonImpOpBase + 0, 907,  0|(1ULL<<MCID::MayStore), 0x18002e0000080c14ULL },  // Inst #2704 = V6_vS32b_nt_npred_ppu
4324
    { 2703, 5,  1,  4,  229,  0,  0,  HexagonImpOpBase + 0, 902,  0|(1ULL<<MCID::MayStore), 0x18002e0000080c14ULL },  // Inst #2703 = V6_vS32b_nt_npred_pi
4325
    { 2702, 4,  0,  4,  228,  0,  0,  HexagonImpOpBase + 0, 898,  0|(1ULL<<MCID::MayStore), 0x18002b0000080c14ULL },  // Inst #2702 = V6_vS32b_nt_npred_ai
4326
    { 2701, 5,  1,  4,  226,  0,  0,  HexagonImpOpBase + 0, 907,  0|(1ULL<<MCID::MayStore), 0xc002e0000144413ULL },  // Inst #2701 = V6_vS32b_nt_new_pred_ppu
4327
    { 2700, 5,  1,  4,  226,  0,  0,  HexagonImpOpBase + 0, 902,  0|(1ULL<<MCID::MayStore), 0xc002e0000144413ULL },  // Inst #2700 = V6_vS32b_nt_new_pred_pi
4328
    { 2699, 4,  0,  4,  225,  0,  0,  HexagonImpOpBase + 0, 898,  0|(1ULL<<MCID::MayStore), 0xc002b0000134413ULL },  // Inst #2699 = V6_vS32b_nt_new_pred_ai
4329
    { 2698, 4,  1,  4,  227,  0,  0,  HexagonImpOpBase + 0, 916,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xc002e0000134013ULL },  // Inst #2698 = V6_vS32b_nt_new_ppu
4330
    { 2697, 4,  1,  4,  227,  0,  0,  HexagonImpOpBase + 0, 912,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xc002e0000134013ULL },  // Inst #2697 = V6_vS32b_nt_new_pi
4331
    { 2696, 5,  1,  4,  226,  0,  0,  HexagonImpOpBase + 0, 907,  0|(1ULL<<MCID::MayStore), 0xc002e0000144c13ULL },  // Inst #2696 = V6_vS32b_nt_new_npred_ppu
4332
    { 2695, 5,  1,  4,  226,  0,  0,  HexagonImpOpBase + 0, 902,  0|(1ULL<<MCID::MayStore), 0xc002e0000144c13ULL },  // Inst #2695 = V6_vS32b_nt_new_npred_pi
4333
    { 2694, 4,  0,  4,  225,  0,  0,  HexagonImpOpBase + 0, 898,  0|(1ULL<<MCID::MayStore), 0xc002b0000134c13ULL },  // Inst #2694 = V6_vS32b_nt_new_npred_ai
4334
    { 2693, 3,  0,  4,  224,  0,  0,  HexagonImpOpBase + 0, 282,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xc002b0000124013ULL },  // Inst #2693 = V6_vS32b_nt_new_ai
4335
    { 2692, 3,  0,  4,  46, 0,  0,  HexagonImpOpBase + 0, 282,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x18002b0000080014ULL },  // Inst #2692 = V6_vS32b_nt_ai
4336
    { 2691, 5,  1,  4,  231,  0,  0,  HexagonImpOpBase + 0, 929,  0|(1ULL<<MCID::MayStore), 0x18002e0000000014ULL },  // Inst #2691 = V6_vS32b_nqpred_ppu
4337
    { 2690, 5,  1,  4,  231,  0,  0,  HexagonImpOpBase + 0, 924,  0|(1ULL<<MCID::MayStore), 0x18002e0000000014ULL },  // Inst #2690 = V6_vS32b_nqpred_pi
4338
    { 2689, 4,  0,  4,  230,  0,  0,  HexagonImpOpBase + 0, 920,  0|(1ULL<<MCID::MayStore), 0x18002b0000000014ULL },  // Inst #2689 = V6_vS32b_nqpred_ai
4339
    { 2688, 5,  1,  4,  229,  0,  0,  HexagonImpOpBase + 0, 907,  0|(1ULL<<MCID::MayStore), 0x18002e0000080c14ULL },  // Inst #2688 = V6_vS32b_npred_ppu
4340
    { 2687, 5,  1,  4,  229,  0,  0,  HexagonImpOpBase + 0, 902,  0|(1ULL<<MCID::MayStore), 0x18002e0000080c14ULL },  // Inst #2687 = V6_vS32b_npred_pi
4341
    { 2686, 4,  0,  4,  228,  0,  0,  HexagonImpOpBase + 0, 898,  0|(1ULL<<MCID::MayStore), 0x18002b0000080c14ULL },  // Inst #2686 = V6_vS32b_npred_ai
4342
    { 2685, 5,  1,  4,  226,  0,  0,  HexagonImpOpBase + 0, 907,  0|(1ULL<<MCID::MayStore), 0xc002e0000144413ULL },  // Inst #2685 = V6_vS32b_new_pred_ppu
4343
    { 2684, 5,  1,  4,  226,  0,  0,  HexagonImpOpBase + 0, 902,  0|(1ULL<<MCID::MayStore), 0xc002e0000144413ULL },  // Inst #2684 = V6_vS32b_new_pred_pi
4344
    { 2683, 4,  0,  4,  225,  0,  0,  HexagonImpOpBase + 0, 898,  0|(1ULL<<MCID::MayStore), 0xc002b0000134413ULL },  // Inst #2683 = V6_vS32b_new_pred_ai
4345
    { 2682, 4,  1,  4,  227,  0,  0,  HexagonImpOpBase + 0, 916,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xc002e0000134013ULL },  // Inst #2682 = V6_vS32b_new_ppu
4346
    { 2681, 4,  1,  4,  227,  0,  0,  HexagonImpOpBase + 0, 912,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xc002e0000134013ULL },  // Inst #2681 = V6_vS32b_new_pi
4347
    { 2680, 5,  1,  4,  226,  0,  0,  HexagonImpOpBase + 0, 907,  0|(1ULL<<MCID::MayStore), 0xc002e0000144c13ULL },  // Inst #2680 = V6_vS32b_new_npred_ppu
4348
    { 2679, 5,  1,  4,  226,  0,  0,  HexagonImpOpBase + 0, 902,  0|(1ULL<<MCID::MayStore), 0xc002e0000144c13ULL },  // Inst #2679 = V6_vS32b_new_npred_pi
4349
    { 2678, 4,  0,  4,  225,  0,  0,  HexagonImpOpBase + 0, 898,  0|(1ULL<<MCID::MayStore), 0xc002b0000134c13ULL },  // Inst #2678 = V6_vS32b_new_npred_ai
4350
    { 2677, 3,  0,  4,  224,  0,  0,  HexagonImpOpBase + 0, 282,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xc002b0000124013ULL },  // Inst #2677 = V6_vS32b_new_ai
4351
    { 2676, 3,  0,  4,  46, 0,  0,  HexagonImpOpBase + 0, 282,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x18002b0000080014ULL },  // Inst #2676 = V6_vS32b_ai
4352
    { 2675, 5,  1,  4,  222,  0,  0,  HexagonImpOpBase + 0, 907,  0|(1ULL<<MCID::MayStore), 0x8002e0000000415ULL },  // Inst #2675 = V6_vS32Ub_pred_ppu
4353
    { 2674, 5,  1,  4,  222,  0,  0,  HexagonImpOpBase + 0, 902,  0|(1ULL<<MCID::MayStore), 0x8002e0000000415ULL },  // Inst #2674 = V6_vS32Ub_pred_pi
4354
    { 2673, 4,  0,  4,  221,  0,  0,  HexagonImpOpBase + 0, 898,  0|(1ULL<<MCID::MayStore), 0x8002b0000000415ULL },  // Inst #2673 = V6_vS32Ub_pred_ai
4355
    { 2672, 4,  1,  4,  223,  0,  0,  HexagonImpOpBase + 0, 916,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x8002e0000000015ULL },  // Inst #2672 = V6_vS32Ub_ppu
4356
    { 2671, 4,  1,  4,  223,  0,  0,  HexagonImpOpBase + 0, 912,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x8002e0000000015ULL },  // Inst #2671 = V6_vS32Ub_pi
4357
    { 2670, 5,  1,  4,  222,  0,  0,  HexagonImpOpBase + 0, 907,  0|(1ULL<<MCID::MayStore), 0x8002e0000000c15ULL },  // Inst #2670 = V6_vS32Ub_npred_ppu
4358
    { 2669, 5,  1,  4,  222,  0,  0,  HexagonImpOpBase + 0, 902,  0|(1ULL<<MCID::MayStore), 0x8002e0000000c15ULL },  // Inst #2669 = V6_vS32Ub_npred_pi
4359
    { 2668, 4,  0,  4,  221,  0,  0,  HexagonImpOpBase + 0, 898,  0|(1ULL<<MCID::MayStore), 0x8002b0000000c15ULL },  // Inst #2668 = V6_vS32Ub_npred_ai
4360
    { 2667, 3,  0,  4,  220,  0,  0,  HexagonImpOpBase + 0, 282,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x8002b0000000015ULL },  // Inst #2667 = V6_vS32Ub_ai
4361
    { 2666, 5,  2,  4,  218,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x9002e8000408416ULL },  // Inst #2666 = V6_vL32b_tmp_pred_ppu
4362
    { 2665, 5,  2,  4,  218,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x9002e8000408416ULL },  // Inst #2665 = V6_vL32b_tmp_pred_pi
4363
    { 2664, 4,  1,  4,  217,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x9002b8000408416ULL },  // Inst #2664 = V6_vL32b_tmp_pred_ai
4364
    { 2663, 4,  2,  4,  219,  0,  0,  HexagonImpOpBase + 0, 880,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x9002e8000408016ULL },  // Inst #2663 = V6_vL32b_tmp_ppu
4365
    { 2662, 4,  2,  4,  219,  0,  0,  HexagonImpOpBase + 0, 876,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x9002e8000408016ULL },  // Inst #2662 = V6_vL32b_tmp_pi
4366
    { 2661, 5,  2,  4,  218,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x9002e8000408c16ULL },  // Inst #2661 = V6_vL32b_tmp_npred_ppu
4367
    { 2660, 5,  2,  4,  218,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x9002e8000408c16ULL },  // Inst #2660 = V6_vL32b_tmp_npred_pi
4368
    { 2659, 4,  1,  4,  217,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x9002b8000408c16ULL },  // Inst #2659 = V6_vL32b_tmp_npred_ai
4369
    { 2658, 3,  1,  4,  216,  0,  0,  HexagonImpOpBase + 0, 265,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x9002b8000408016ULL },  // Inst #2658 = V6_vL32b_tmp_ai
4370
    { 2657, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x18002e8000408412ULL },  // Inst #2657 = V6_vL32b_pred_ppu
4371
    { 2656, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x18002e8000408412ULL },  // Inst #2656 = V6_vL32b_pred_pi
4372
    { 2655, 4,  1,  4,  213,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x18002b8000408412ULL },  // Inst #2655 = V6_vL32b_pred_ai
4373
    { 2654, 4,  2,  4,  215,  0,  0,  HexagonImpOpBase + 0, 880,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x18002e8000608012ULL },  // Inst #2654 = V6_vL32b_ppu
4374
    { 2653, 4,  2,  4,  215,  0,  0,  HexagonImpOpBase + 0, 876,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x18002e8000608012ULL },  // Inst #2653 = V6_vL32b_pi
4375
    { 2652, 5,  2,  4,  218,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x9002e8000408416ULL },  // Inst #2652 = V6_vL32b_nt_tmp_pred_ppu
4376
    { 2651, 5,  2,  4,  218,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x9002e8000408416ULL },  // Inst #2651 = V6_vL32b_nt_tmp_pred_pi
4377
    { 2650, 4,  1,  4,  217,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x9002b8000408416ULL },  // Inst #2650 = V6_vL32b_nt_tmp_pred_ai
4378
    { 2649, 4,  2,  4,  219,  0,  0,  HexagonImpOpBase + 0, 880,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x9002e8000408016ULL },  // Inst #2649 = V6_vL32b_nt_tmp_ppu
4379
    { 2648, 4,  2,  4,  219,  0,  0,  HexagonImpOpBase + 0, 876,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x9002e8000408016ULL },  // Inst #2648 = V6_vL32b_nt_tmp_pi
4380
    { 2647, 5,  2,  4,  218,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x9002e8000408c16ULL },  // Inst #2647 = V6_vL32b_nt_tmp_npred_ppu
4381
    { 2646, 5,  2,  4,  218,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x9002e8000408c16ULL },  // Inst #2646 = V6_vL32b_nt_tmp_npred_pi
4382
    { 2645, 4,  1,  4,  217,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x9002b8000408c16ULL },  // Inst #2645 = V6_vL32b_nt_tmp_npred_ai
4383
    { 2644, 3,  1,  4,  216,  0,  0,  HexagonImpOpBase + 0, 265,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x9002b8000408016ULL },  // Inst #2644 = V6_vL32b_nt_tmp_ai
4384
    { 2643, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x18002e8000408412ULL },  // Inst #2643 = V6_vL32b_nt_pred_ppu
4385
    { 2642, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x18002e8000408412ULL },  // Inst #2642 = V6_vL32b_nt_pred_pi
4386
    { 2641, 4,  1,  4,  213,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x18002b8000408412ULL },  // Inst #2641 = V6_vL32b_nt_pred_ai
4387
    { 2640, 4,  2,  4,  215,  0,  0,  HexagonImpOpBase + 0, 880,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x18002e8000608012ULL },  // Inst #2640 = V6_vL32b_nt_ppu
4388
    { 2639, 4,  2,  4,  215,  0,  0,  HexagonImpOpBase + 0, 876,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x18002e8000608012ULL },  // Inst #2639 = V6_vL32b_nt_pi
4389
    { 2638, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x18002e8000408c12ULL },  // Inst #2638 = V6_vL32b_nt_npred_ppu
4390
    { 2637, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x18002e8000408c12ULL },  // Inst #2637 = V6_vL32b_nt_npred_pi
4391
    { 2636, 4,  1,  4,  213,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x18002b8000408c12ULL },  // Inst #2636 = V6_vL32b_nt_npred_ai
4392
    { 2635, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x1c002e8000408412ULL },  // Inst #2635 = V6_vL32b_nt_cur_pred_ppu
4393
    { 2634, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x1c002e8000408412ULL },  // Inst #2634 = V6_vL32b_nt_cur_pred_pi
4394
    { 2633, 4,  1,  4,  213,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x1c002b8000408412ULL },  // Inst #2633 = V6_vL32b_nt_cur_pred_ai
4395
    { 2632, 4,  2,  4,  215,  0,  0,  HexagonImpOpBase + 0, 880,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x1c002e8000408012ULL },  // Inst #2632 = V6_vL32b_nt_cur_ppu
4396
    { 2631, 4,  2,  4,  215,  0,  0,  HexagonImpOpBase + 0, 876,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x1c002e8000408012ULL },  // Inst #2631 = V6_vL32b_nt_cur_pi
4397
    { 2630, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x1c002e8000408c12ULL },  // Inst #2630 = V6_vL32b_nt_cur_npred_ppu
4398
    { 2629, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x1c002e8000408c12ULL },  // Inst #2629 = V6_vL32b_nt_cur_npred_pi
4399
    { 2628, 4,  1,  4,  213,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x1c002b8000408c12ULL },  // Inst #2628 = V6_vL32b_nt_cur_npred_ai
4400
    { 2627, 3,  1,  4,  42, 0,  0,  HexagonImpOpBase + 0, 265,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x1c002b8000408012ULL },  // Inst #2627 = V6_vL32b_nt_cur_ai
4401
    { 2626, 3,  1,  4,  42, 0,  0,  HexagonImpOpBase + 0, 265,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x18002b8000608012ULL },  // Inst #2626 = V6_vL32b_nt_ai
4402
    { 2625, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x18002e8000408c12ULL },  // Inst #2625 = V6_vL32b_npred_ppu
4403
    { 2624, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x18002e8000408c12ULL },  // Inst #2624 = V6_vL32b_npred_pi
4404
    { 2623, 4,  1,  4,  213,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x18002b8000408c12ULL },  // Inst #2623 = V6_vL32b_npred_ai
4405
    { 2622, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x1c002e8000408412ULL },  // Inst #2622 = V6_vL32b_cur_pred_ppu
4406
    { 2621, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x1c002e8000408412ULL },  // Inst #2621 = V6_vL32b_cur_pred_pi
4407
    { 2620, 4,  1,  4,  213,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x1c002b8000408412ULL },  // Inst #2620 = V6_vL32b_cur_pred_ai
4408
    { 2619, 4,  2,  4,  215,  0,  0,  HexagonImpOpBase + 0, 880,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x1c002e8000408012ULL },  // Inst #2619 = V6_vL32b_cur_ppu
4409
    { 2618, 4,  2,  4,  215,  0,  0,  HexagonImpOpBase + 0, 876,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x1c002e8000408012ULL },  // Inst #2618 = V6_vL32b_cur_pi
4410
    { 2617, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 893,  0|(1ULL<<MCID::MayLoad), 0x1c002e8000408c12ULL },  // Inst #2617 = V6_vL32b_cur_npred_ppu
4411
    { 2616, 5,  2,  4,  214,  0,  0,  HexagonImpOpBase + 0, 888,  0|(1ULL<<MCID::MayLoad), 0x1c002e8000408c12ULL },  // Inst #2616 = V6_vL32b_cur_npred_pi
4412
    { 2615, 4,  1,  4,  213,  0,  0,  HexagonImpOpBase + 0, 884,  0|(1ULL<<MCID::MayLoad), 0x1c002b8000408c12ULL },  // Inst #2615 = V6_vL32b_cur_npred_ai
4413
    { 2614, 3,  1,  4,  42, 0,  0,  HexagonImpOpBase + 0, 265,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x1c002b8000408012ULL },  // Inst #2614 = V6_vL32b_cur_ai
4414
    { 2613, 3,  1,  4,  42, 0,  0,  HexagonImpOpBase + 0, 265,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x18002b8000608012ULL },  // Inst #2613 = V6_vL32b_ai
4415
    { 2612, 4,  2,  4,  212,  0,  0,  HexagonImpOpBase + 0, 880,  0|(1ULL<<MCID::MayLoad), 0x8002e8000408017ULL },  // Inst #2612 = V6_vL32Ub_ppu
4416
    { 2611, 4,  2,  4,  212,  0,  0,  HexagonImpOpBase + 0, 876,  0|(1ULL<<MCID::MayLoad), 0x8002e8000408017ULL },  // Inst #2611 = V6_vL32Ub_pi
4417
    { 2610, 3,  1,  4,  211,  0,  0,  HexagonImpOpBase + 0, 265,  0|(1ULL<<MCID::MayLoad), 0x8002b8000408017ULL },  // Inst #2610 = V6_vL32Ub_ai
4418
    { 2609, 5,  1,  4,  210,  0,  0,  HexagonImpOpBase + 0, 342,  0, 0x84000000000801dULL },  // Inst #2609 = V6_v6mpyvubs10_vxx
4419
    { 2608, 4,  1,  4,  209,  0,  0,  HexagonImpOpBase + 0, 338,  0, 0x80000000000801dULL },  // Inst #2608 = V6_v6mpyvubs10
4420
    { 2607, 5,  1,  4,  210,  0,  0,  HexagonImpOpBase + 0, 342,  0, 0x84000000000801dULL },  // Inst #2607 = V6_v6mpyhubs10_vxx
4421
    { 2606, 4,  1,  4,  209,  0,  0,  HexagonImpOpBase + 0, 338,  0, 0x80000000000801dULL },  // Inst #2606 = V6_v6mpyhubs10
4422
    { 2605, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 869,  0, 0x800000000008011ULL },  // Inst #2605 = V6_shuffeqw
4423
    { 2604, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 869,  0, 0x800000000008011ULL },  // Inst #2604 = V6_shuffeqh
4424
    { 2603, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 869,  0, 0x800000000008011ULL },  // Inst #2603 = V6_pred_xor
4425
    { 2602, 2,  1,  4,  208,  0,  0,  HexagonImpOpBase + 0, 874,  0, 0x800000000008018ULL },  // Inst #2602 = V6_pred_scalar2v2
4426
    { 2601, 2,  1,  4,  208,  0,  0,  HexagonImpOpBase + 0, 874,  0, 0x800000000008018ULL },  // Inst #2601 = V6_pred_scalar2
4427
    { 2600, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 869,  0, 0x800000000008011ULL },  // Inst #2600 = V6_pred_or_n
4428
    { 2599, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 869,  0, 0x800000000008011ULL },  // Inst #2599 = V6_pred_or
4429
    { 2598, 2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 872,  0, 0x3800000000008010ULL },  // Inst #2598 = V6_pred_not
4430
    { 2597, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 869,  0, 0x800000000008011ULL },  // Inst #2597 = V6_pred_and_n
4431
    { 2596, 3,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 869,  0, 0x800000000008011ULL },  // Inst #2596 = V6_pred_and
4432
    { 2595, 2,  1,  4,  45, 0,  0,  HexagonImpOpBase + 0, 277,  0, 0x80000000000801eULL },  // Inst #2595 = V6_lvsplatw
4433
    { 2594, 2,  1,  4,  45, 0,  0,  HexagonImpOpBase + 0, 277,  0, 0x80000000000801eULL },  // Inst #2594 = V6_lvsplath
4434
    { 2593, 2,  1,  4,  45, 0,  0,  HexagonImpOpBase + 0, 277,  0, 0x80000000000801eULL },  // Inst #2593 = V6_lvsplatb
4435
    { 2592, 3,  1,  4,  207,  0,  0,  HexagonImpOpBase + 0, 322,  0|(1ULL<<MCID::MayLoad), 0x38000000000080a4ULL },  // Inst #2592 = V6_extractw
4436
    { 2591, 2,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 155,  0, 0xc2800000ULL },  // Inst #2591 = TFRI64_V4
4437
    { 2590, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 483,  0, 0xc2800000ULL },  // Inst #2590 = TFRI64_V2_ext
4438
    { 2589, 2,  0,  4,  206,  0,  0,  HexagonImpOpBase + 0, 603,  0|(1ULL<<MCID::MayStore), 0x1b000000002aULL },  // Inst #2589 = SS2_storewi1
4439
    { 2588, 2,  0,  4,  206,  0,  0,  HexagonImpOpBase + 0, 603,  0|(1ULL<<MCID::MayStore), 0x1b000000002aULL },  // Inst #2588 = SS2_storewi0
4440
    { 2587, 2,  0,  4,  165,  1,  0,  HexagonImpOpBase + 44,  867,  0|(1ULL<<MCID::MayStore), 0x1b000000002aULL },  // Inst #2587 = SS2_storew_sp
4441
    { 2586, 3,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 862,  0|(1ULL<<MCID::MayStore), 0x13000000002aULL },  // Inst #2586 = SS2_storeh_io
4442
    { 2585, 2,  0,  4,  165,  1,  0,  HexagonImpOpBase + 44,  865,  0|(1ULL<<MCID::MayStore), 0x23000000002aULL },  // Inst #2585 = SS2_stored_sp
4443
    { 2584, 2,  0,  4,  206,  0,  0,  HexagonImpOpBase + 0, 603,  0|(1ULL<<MCID::MayStore), 0xb000000002aULL },  // Inst #2584 = SS2_storebi1
4444
    { 2583, 2,  0,  4,  206,  0,  0,  HexagonImpOpBase + 0, 603,  0|(1ULL<<MCID::MayStore), 0xb000000002aULL },  // Inst #2583 = SS2_storebi0
4445
    { 2582, 1,  0,  4,  205,  5,  2,  HexagonImpOpBase + 161, 0,  0|(1ULL<<MCID::MayStore), 0x23000000002aULL },  // Inst #2582 = SS2_allocframe
4446
    { 2581, 3,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 862,  0|(1ULL<<MCID::MayStore), 0x1b000000002aULL },  // Inst #2581 = SS1_storew_io
4447
    { 2580, 3,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 862,  0|(1ULL<<MCID::MayStore), 0xb000000002aULL },  // Inst #2580 = SS1_storeb_io
4448
    { 2579, 0,  0,  4,  204,  3,  4,  HexagonImpOpBase + 154, 1,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x20900000142aULL },  // Inst #2579 = SL2_return_tnew
4449
    { 2578, 0,  0,  4,  204,  3,  4,  HexagonImpOpBase + 154, 1,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x20900000042aULL },  // Inst #2578 = SL2_return_t
4450
    { 2577, 0,  0,  4,  204,  3,  4,  HexagonImpOpBase + 154, 1,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x209000001c2aULL },  // Inst #2577 = SL2_return_fnew
4451
    { 2576, 0,  0,  4,  204,  3,  4,  HexagonImpOpBase + 154, 1,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x209000000c2aULL },  // Inst #2576 = SL2_return_f
4452
    { 2575, 0,  0,  4,  204,  2,  4,  HexagonImpOpBase + 148, 1,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x20900000002aULL },  // Inst #2575 = SL2_return
4453
    { 2574, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 597,  0|(1ULL<<MCID::MayLoad), 0x13000000802aULL },  // Inst #2574 = SL2_loadruh_io
4454
    { 2573, 2,  1,  4,  147,  1,  0,  HexagonImpOpBase + 44,  603,  0|(1ULL<<MCID::MayLoad), 0x1b000000802aULL },  // Inst #2573 = SL2_loadri_sp
4455
    { 2572, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 597,  0|(1ULL<<MCID::MayLoad), 0x13000000802aULL },  // Inst #2572 = SL2_loadrh_io
4456
    { 2571, 2,  1,  4,  147,  1,  0,  HexagonImpOpBase + 44,  858,  0|(1ULL<<MCID::MayLoad), 0x23000000802aULL },  // Inst #2571 = SL2_loadrd_sp
4457
    { 2570, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 597,  0|(1ULL<<MCID::MayLoad), 0xb000000802aULL },  // Inst #2570 = SL2_loadrb_io
4458
    { 2569, 0,  0,  4,  203,  2,  1,  HexagonImpOpBase + 145, 1,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x100000142aULL },  // Inst #2569 = SL2_jumpr31_tnew
4459
    { 2568, 0,  0,  4,  203,  2,  1,  HexagonImpOpBase + 145, 1,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x100000042aULL },  // Inst #2568 = SL2_jumpr31_t
4460
    { 2567, 0,  0,  4,  203,  2,  1,  HexagonImpOpBase + 145, 1,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x1000001c2aULL },  // Inst #2567 = SL2_jumpr31_fnew
4461
    { 2566, 0,  0,  4,  203,  2,  1,  HexagonImpOpBase + 145, 1,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x1000000c2aULL },  // Inst #2566 = SL2_jumpr31_f
4462
    { 2565, 0,  0,  4,  203,  1,  1,  HexagonImpOpBase + 143, 1,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x100000002aULL },  // Inst #2565 = SL2_jumpr31
4463
    { 2564, 0,  0,  4,  202,  2,  3,  HexagonImpOpBase + 138, 1,  0|(1ULL<<MCID::MayLoad), 0x20000000002aULL },  // Inst #2564 = SL2_deallocframe
4464
    { 2563, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 597,  0|(1ULL<<MCID::MayLoad), 0xb000000802aULL },  // Inst #2563 = SL1_loadrub_io
4465
    { 2562, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 597,  0|(1ULL<<MCID::MayLoad), 0x1b000000802aULL },  // Inst #2562 = SL1_loadri_io
4466
    { 2561, 1,  0,  4,  35, 2,  3,  HexagonImpOpBase + 133, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb10800023ULL },  // Inst #2561 = SAVE_REGISTERS_CALL_V4_PIC
4467
    { 2560, 1,  0,  4,  35, 2,  3,  HexagonImpOpBase + 133, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb11800023ULL },  // Inst #2560 = SAVE_REGISTERS_CALL_V4_EXT_PIC
4468
    { 2559, 1,  0,  4,  35, 2,  0,  HexagonImpOpBase + 122, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb11800023ULL },  // Inst #2559 = SAVE_REGISTERS_CALL_V4_EXT
4469
    { 2558, 1,  0,  4,  35, 2,  4,  HexagonImpOpBase + 127, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb10800023ULL },  // Inst #2558 = SAVE_REGISTERS_CALL_V4STK_PIC
4470
    { 2557, 1,  0,  4,  35, 2,  4,  HexagonImpOpBase + 127, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb11800023ULL },  // Inst #2557 = SAVE_REGISTERS_CALL_V4STK_EXT_PIC
4471
    { 2556, 1,  0,  4,  35, 2,  1,  HexagonImpOpBase + 124, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb11800023ULL },  // Inst #2556 = SAVE_REGISTERS_CALL_V4STK_EXT
4472
    { 2555, 1,  0,  4,  35, 2,  1,  HexagonImpOpBase + 124, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb10800023ULL },  // Inst #2555 = SAVE_REGISTERS_CALL_V4STK
4473
    { 2554, 1,  0,  4,  35, 2,  0,  HexagonImpOpBase + 122, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb10800023ULL },  // Inst #2554 = SAVE_REGISTERS_CALL_V4
4474
    { 2553, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 855,  0, 0x802aULL },  // Inst #2553 = SA1_zxth
4475
    { 2552, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 855,  0, 0x802aULL },  // Inst #2552 = SA1_zxtb
4476
    { 2551, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 855,  0, 0x802aULL },  // Inst #2551 = SA1_tfr
4477
    { 2550, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 855,  0, 0x802aULL },  // Inst #2550 = SA1_sxth
4478
    { 2549, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 855,  0, 0x802aULL },  // Inst #2549 = SA1_sxtb
4479
    { 2548, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 603,  0, 0x802aULL },  // Inst #2548 = SA1_setin1
4480
    { 2547, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 603,  0, 0xc280802aULL },  // Inst #2547 = SA1_seti
4481
    { 2546, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 855,  0, 0x802aULL },  // Inst #2546 = SA1_inc
4482
    { 2545, 3,  1,  4,  197,  0,  0,  HexagonImpOpBase + 0, 597,  0, 0x802aULL },  // Inst #2545 = SA1_dec
4483
    { 2544, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 860,  0, 0x802aULL },  // Inst #2544 = SA1_combinezr
4484
    { 2543, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 860,  0, 0x802aULL },  // Inst #2543 = SA1_combinerz
4485
    { 2542, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 858,  0, 0x802aULL },  // Inst #2542 = SA1_combine3i
4486
    { 2541, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 858,  0, 0x802aULL },  // Inst #2541 = SA1_combine2i
4487
    { 2540, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 858,  0, 0x802aULL },  // Inst #2540 = SA1_combine1i
4488
    { 2539, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 858,  0, 0x802aULL },  // Inst #2539 = SA1_combine0i
4489
    { 2538, 2,  0,  4,  201,  0,  1,  HexagonImpOpBase + 121, 603,  0, 0x2aULL },  // Inst #2538 = SA1_cmpeqi
4490
    { 2537, 1,  1,  4,  200,  1,  0,  HexagonImpOpBase + 121, 857,  0, 0x942aULL },  // Inst #2537 = SA1_clrtnew
4491
    { 2536, 1,  1,  4,  199,  1,  0,  HexagonImpOpBase + 121, 857,  0, 0x842aULL },  // Inst #2536 = SA1_clrt
4492
    { 2535, 1,  1,  4,  200,  1,  0,  HexagonImpOpBase + 121, 857,  0, 0x9c2aULL },  // Inst #2535 = SA1_clrfnew
4493
    { 2534, 1,  1,  4,  199,  1,  0,  HexagonImpOpBase + 121, 857,  0, 0x8c2aULL },  // Inst #2534 = SA1_clrf
4494
    { 2533, 2,  1,  4,  198,  0,  0,  HexagonImpOpBase + 0, 855,  0, 0x802aULL },  // Inst #2533 = SA1_and1
4495
    { 2532, 2,  1,  4,  198,  1,  0,  HexagonImpOpBase + 44,  603,  0, 0x802aULL },  // Inst #2532 = SA1_addsp
4496
    { 2531, 3,  1,  4,  197,  0,  0,  HexagonImpOpBase + 0, 852,  0, 0x802aULL },  // Inst #2531 = SA1_addrx
4497
    { 2530, 3,  1,  4,  197,  0,  0,  HexagonImpOpBase + 0, 849,  0, 0xf480802aULL },  // Inst #2530 = SA1_addi
4498
    { 2529, 3,  1,  4,  94, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x2cULL },  // Inst #2529 = S6_vtrunohb_ppp
4499
    { 2528, 3,  1,  4,  94, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x2cULL },  // Inst #2528 = S6_vtrunehb_ppp
4500
    { 2527, 2,  1,  4,  196,  0,  0,  HexagonImpOpBase + 0, 178,  0, 0x2bULL },  // Inst #2527 = S6_vsplatrbp
4501
    { 2526, 4,  1,  4,  195,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2526 = S6_rol_i_r_xacc
4502
    { 2525, 4,  1,  4,  195,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2525 = S6_rol_i_r_or
4503
    { 2524, 4,  1,  4,  195,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2524 = S6_rol_i_r_nac
4504
    { 2523, 4,  1,  4,  195,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2523 = S6_rol_i_r_and
4505
    { 2522, 4,  1,  4,  195,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2522 = S6_rol_i_r_acc
4506
    { 2521, 3,  1,  4,  94, 0,  0,  HexagonImpOpBase + 0, 187,  0, 0x802bULL },  // Inst #2521 = S6_rol_i_r
4507
    { 2520, 4,  1,  4,  195,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2520 = S6_rol_i_p_xacc
4508
    { 2519, 4,  1,  4,  195,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2519 = S6_rol_i_p_or
4509
    { 2518, 4,  1,  4,  195,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2518 = S6_rol_i_p_nac
4510
    { 2517, 4,  1,  4,  195,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2517 = S6_rol_i_p_and
4511
    { 2516, 4,  1,  4,  195,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2516 = S6_rol_i_p_acc
4512
    { 2515, 3,  1,  4,  94, 0,  0,  HexagonImpOpBase + 0, 292,  0, 0x2bULL },  // Inst #2515 = S6_rol_i_p
4513
    { 2514, 3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 292,  0, 0x8000000000002bULL },  // Inst #2514 = S5_vasrhrnd
4514
    { 2513, 2,  1,  4,  194,  0,  0,  HexagonImpOpBase + 0, 295,  0, 0x8000000000802bULL },  // Inst #2513 = S5_popcountp
4515
    { 2512, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  302,  0, 0x8000000000802bULL },  // Inst #2512 = S5_asrhub_sat
4516
    { 2511, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  302,  0, 0x8000000000802bULL },  // Inst #2511 = S5_asrhub_rnd_sat
4517
    { 2510, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x8000000000002cULL },  // Inst #2510 = S4_vxsubaddw
4518
    { 2509, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x8000000000002cULL },  // Inst #2509 = S4_vxsubaddhr
4519
    { 2508, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x8000000000002cULL },  // Inst #2508 = S4_vxsubaddh
4520
    { 2507, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x8000000000002cULL },  // Inst #2507 = S4_vxaddsubw
4521
    { 2506, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x8000000000002cULL },  // Inst #2506 = S4_vxaddsubhr
4522
    { 2505, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x8000000000002cULL },  // Inst #2505 = S4_vxaddsubh
4523
    { 2504, 5,  1,  4,  193,  0,  0,  HexagonImpOpBase + 0, 844,  0, 0x8000000000002cULL },  // Inst #2504 = S4_vrcrotate_acc
4524
    { 2503, 4,  1,  4,  192,  0,  0,  HexagonImpOpBase + 0, 840,  0, 0x8000000000002cULL },  // Inst #2503 = S4_vrcrotate
4525
    { 2502, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 800,  0, 0x80000102808003ULL },  // Inst #2502 = S4_subi_lsr_ri
4526
    { 2501, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 800,  0, 0x80000102808003ULL },  // Inst #2501 = S4_subi_asl_ri
4527
    { 2500, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 714,  0, 0x800000d4808003ULL },  // Inst #2500 = S4_subaddi
4528
    { 2499, 4,  0,  4,  191,  0,  0,  HexagonImpOpBase + 0, 828,  0|(1ULL<<MCID::MayStore), 0x1c80c5934029ULL },  // Inst #2499 = S4_storerinew_ur
4529
    { 2498, 4,  0,  4,  190,  0,  0,  HexagonImpOpBase + 0, 714,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x1d8000134029ULL },  // Inst #2498 = S4_storerinew_rr
4530
    { 2497, 3,  1,  4,  186,  0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore), 0x1a80c3924029ULL },  // Inst #2497 = S4_storerinew_ap
4531
    { 2496, 4,  0,  4,  189,  0,  0,  HexagonImpOpBase + 0, 828,  0|(1ULL<<MCID::MayStore), 0x1c00c5880029ULL },  // Inst #2496 = S4_storeri_ur
4532
    { 2495, 4,  0,  4,  188,  0,  0,  HexagonImpOpBase + 0, 714,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x1d0000080029ULL },  // Inst #2495 = S4_storeri_rr
4533
    { 2494, 3,  1,  4,  182,  0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore), 0x1a00c3880029ULL },  // Inst #2494 = S4_storeri_ap
4534
    { 2493, 4,  0,  4,  191,  0,  0,  HexagonImpOpBase + 0, 828,  0|(1ULL<<MCID::MayStore), 0x1480c5934029ULL },  // Inst #2493 = S4_storerhnew_ur
4535
    { 2492, 4,  0,  4,  190,  0,  0,  HexagonImpOpBase + 0, 714,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x158000134029ULL },  // Inst #2492 = S4_storerhnew_rr
4536
    { 2491, 3,  1,  4,  186,  0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore), 0x1280c3924029ULL },  // Inst #2491 = S4_storerhnew_ap
4537
    { 2490, 4,  0,  4,  189,  0,  0,  HexagonImpOpBase + 0, 828,  0|(1ULL<<MCID::MayStore), 0x1400c5880029ULL },  // Inst #2490 = S4_storerh_ur
4538
    { 2489, 4,  0,  4,  188,  0,  0,  HexagonImpOpBase + 0, 714,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x150000080029ULL },  // Inst #2489 = S4_storerh_rr
4539
    { 2488, 3,  1,  4,  182,  0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore), 0x1200c3880029ULL },  // Inst #2488 = S4_storerh_ap
4540
    { 2487, 4,  0,  4,  189,  0,  0,  HexagonImpOpBase + 0, 828,  0|(1ULL<<MCID::MayStore), 0x1400c5800029ULL },  // Inst #2487 = S4_storerf_ur
4541
    { 2486, 4,  0,  4,  188,  0,  0,  HexagonImpOpBase + 0, 714,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x150000000029ULL },  // Inst #2486 = S4_storerf_rr
4542
    { 2485, 3,  1,  4,  182,  0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore), 0x1200c3800029ULL },  // Inst #2485 = S4_storerf_ap
4543
    { 2484, 4,  0,  4,  189,  0,  0,  HexagonImpOpBase + 0, 836,  0|(1ULL<<MCID::MayStore), 0x2400c5800029ULL },  // Inst #2484 = S4_storerd_ur
4544
    { 2483, 4,  0,  4,  188,  0,  0,  HexagonImpOpBase + 0, 832,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x250000000029ULL },  // Inst #2483 = S4_storerd_rr
4545
    { 2482, 3,  1,  4,  182,  0,  0,  HexagonImpOpBase + 0, 501,  0|(1ULL<<MCID::MayStore), 0x2200c3800029ULL },  // Inst #2482 = S4_storerd_ap
4546
    { 2481, 4,  0,  4,  191,  0,  0,  HexagonImpOpBase + 0, 828,  0|(1ULL<<MCID::MayStore), 0xc80c5934029ULL },  // Inst #2481 = S4_storerbnew_ur
4547
    { 2480, 4,  0,  4,  190,  0,  0,  HexagonImpOpBase + 0, 714,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xd8000134029ULL },  // Inst #2480 = S4_storerbnew_rr
4548
    { 2479, 3,  1,  4,  186,  0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore), 0xa80c3924029ULL },  // Inst #2479 = S4_storerbnew_ap
4549
    { 2478, 4,  0,  4,  189,  0,  0,  HexagonImpOpBase + 0, 828,  0|(1ULL<<MCID::MayStore), 0xc00c5880029ULL },  // Inst #2478 = S4_storerb_ur
4550
    { 2477, 4,  0,  4,  188,  0,  0,  HexagonImpOpBase + 0, 714,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xd0000080029ULL },  // Inst #2477 = S4_storerb_rr
4551
    { 2476, 3,  1,  4,  182,  0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore), 0xa00c3880029ULL },  // Inst #2476 = S4_storerb_ap
4552
    { 2475, 4,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0x1b00d6801429ULL },  // Inst #2475 = S4_storeiritnew_io
4553
    { 2474, 4,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0x1b00d6800429ULL },  // Inst #2474 = S4_storeirit_io
4554
    { 2473, 4,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0x1b00d6801c29ULL },  // Inst #2473 = S4_storeirifnew_io
4555
    { 2472, 4,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0x1b00d6800c29ULL },  // Inst #2472 = S4_storeirif_io
4556
    { 2471, 3,  0,  4,  55, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x1b0114800029ULL },  // Inst #2471 = S4_storeiri_io
4557
    { 2470, 4,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0x1300d6801429ULL },  // Inst #2470 = S4_storeirhtnew_io
4558
    { 2469, 4,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0x1300d6800429ULL },  // Inst #2469 = S4_storeirht_io
4559
    { 2468, 4,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0x1300d6801c29ULL },  // Inst #2468 = S4_storeirhfnew_io
4560
    { 2467, 4,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0x1300d6800c29ULL },  // Inst #2467 = S4_storeirhf_io
4561
    { 2466, 3,  0,  4,  55, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x130114800029ULL },  // Inst #2466 = S4_storeirh_io
4562
    { 2465, 4,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0xb00d6801429ULL },  // Inst #2465 = S4_storeirbtnew_io
4563
    { 2464, 4,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0xb00d6800429ULL },  // Inst #2464 = S4_storeirbt_io
4564
    { 2463, 4,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0xb00d6801c29ULL },  // Inst #2463 = S4_storeirbfnew_io
4565
    { 2462, 4,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 824,  0|(1ULL<<MCID::MayStore), 0xb00d6800c29ULL },  // Inst #2462 = S4_storeirbf_io
4566
    { 2461, 3,  0,  4,  55, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xb0114800029ULL },  // Inst #2461 = S4_storeirb_io
4567
    { 2460, 2,  0,  4,  178,  0,  0,  HexagonImpOpBase + 0, 295,  0|(1ULL<<MCID::MayStore), 0x2000000000a9ULL },  // Inst #2460 = S4_stored_rl_st_vi
4568
    { 2459, 2,  0,  4,  178,  0,  0,  HexagonImpOpBase + 0, 295,  0|(1ULL<<MCID::MayStore), 0x2000000000a9ULL },  // Inst #2459 = S4_stored_rl_at_vi
4569
    { 2458, 3,  1,  4,  177,  0,  0,  HexagonImpOpBase + 0, 160,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200000002129ULL },  // Inst #2458 = S4_stored_locked
4570
    { 2457, 5,  0,  4,  183,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x1d0000081429ULL },  // Inst #2457 = S4_pstoreritnew_rr
4571
    { 2456, 4,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1b090488142fULL },  // Inst #2456 = S4_pstoreritnew_io
4572
    { 2455, 3,  0,  4,  182,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1900c3881429ULL },  // Inst #2455 = S4_pstoreritnew_abs
4573
    { 2454, 5,  0,  4,  181,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x1d0000080429ULL },  // Inst #2454 = S4_pstorerit_rr
4574
    { 2453, 3,  0,  4,  180,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1900c3880429ULL },  // Inst #2453 = S4_pstorerit_abs
4575
    { 2452, 5,  0,  4,  187,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x1d8000145429ULL },  // Inst #2452 = S4_pstorerinewtnew_rr
4576
    { 2451, 4,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1b890493542fULL },  // Inst #2451 = S4_pstorerinewtnew_io
4577
    { 2450, 3,  0,  4,  186,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1980c3925429ULL },  // Inst #2450 = S4_pstorerinewtnew_abs
4578
    { 2449, 5,  0,  4,  185,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x1d8000144429ULL },  // Inst #2449 = S4_pstorerinewt_rr
4579
    { 2448, 3,  0,  4,  184,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1980c3924429ULL },  // Inst #2448 = S4_pstorerinewt_abs
4580
    { 2447, 5,  0,  4,  187,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x1d8000145c29ULL },  // Inst #2447 = S4_pstorerinewfnew_rr
4581
    { 2446, 4,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1b8904935c2fULL },  // Inst #2446 = S4_pstorerinewfnew_io
4582
    { 2445, 3,  0,  4,  186,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1980c3925c29ULL },  // Inst #2445 = S4_pstorerinewfnew_abs
4583
    { 2444, 5,  0,  4,  185,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x1d8000144c29ULL },  // Inst #2444 = S4_pstorerinewf_rr
4584
    { 2443, 3,  0,  4,  184,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1980c3924c29ULL },  // Inst #2443 = S4_pstorerinewf_abs
4585
    { 2442, 5,  0,  4,  183,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x1d0000081c29ULL },  // Inst #2442 = S4_pstorerifnew_rr
4586
    { 2441, 4,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1b0904881c2fULL },  // Inst #2441 = S4_pstorerifnew_io
4587
    { 2440, 3,  0,  4,  182,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1900c3881c29ULL },  // Inst #2440 = S4_pstorerifnew_abs
4588
    { 2439, 5,  0,  4,  181,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x1d0000080c29ULL },  // Inst #2439 = S4_pstorerif_rr
4589
    { 2438, 3,  0,  4,  180,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1900c3880c29ULL },  // Inst #2438 = S4_pstorerif_abs
4590
    { 2437, 5,  0,  4,  183,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x150000081429ULL },  // Inst #2437 = S4_pstorerhtnew_rr
4591
    { 2436, 4,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1304e488142fULL },  // Inst #2436 = S4_pstorerhtnew_io
4592
    { 2435, 3,  0,  4,  182,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1100c3881429ULL },  // Inst #2435 = S4_pstorerhtnew_abs
4593
    { 2434, 5,  0,  4,  181,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x150000080429ULL },  // Inst #2434 = S4_pstorerht_rr
4594
    { 2433, 3,  0,  4,  180,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1100c3880429ULL },  // Inst #2433 = S4_pstorerht_abs
4595
    { 2432, 5,  0,  4,  187,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x158000145429ULL },  // Inst #2432 = S4_pstorerhnewtnew_rr
4596
    { 2431, 4,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1384e493542fULL },  // Inst #2431 = S4_pstorerhnewtnew_io
4597
    { 2430, 3,  0,  4,  186,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1180c3925429ULL },  // Inst #2430 = S4_pstorerhnewtnew_abs
4598
    { 2429, 5,  0,  4,  185,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x158000144429ULL },  // Inst #2429 = S4_pstorerhnewt_rr
4599
    { 2428, 3,  0,  4,  184,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1180c3924429ULL },  // Inst #2428 = S4_pstorerhnewt_abs
4600
    { 2427, 5,  0,  4,  187,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x158000145c29ULL },  // Inst #2427 = S4_pstorerhnewfnew_rr
4601
    { 2426, 4,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1384e4935c2fULL },  // Inst #2426 = S4_pstorerhnewfnew_io
4602
    { 2425, 3,  0,  4,  186,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1180c3925c29ULL },  // Inst #2425 = S4_pstorerhnewfnew_abs
4603
    { 2424, 5,  0,  4,  185,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x158000144c29ULL },  // Inst #2424 = S4_pstorerhnewf_rr
4604
    { 2423, 3,  0,  4,  184,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1180c3924c29ULL },  // Inst #2423 = S4_pstorerhnewf_abs
4605
    { 2422, 5,  0,  4,  183,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x150000081c29ULL },  // Inst #2422 = S4_pstorerhfnew_rr
4606
    { 2421, 4,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1304e4881c2fULL },  // Inst #2421 = S4_pstorerhfnew_io
4607
    { 2420, 3,  0,  4,  182,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1100c3881c29ULL },  // Inst #2420 = S4_pstorerhfnew_abs
4608
    { 2419, 5,  0,  4,  181,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x150000080c29ULL },  // Inst #2419 = S4_pstorerhf_rr
4609
    { 2418, 3,  0,  4,  180,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1100c3880c29ULL },  // Inst #2418 = S4_pstorerhf_abs
4610
    { 2417, 5,  0,  4,  183,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x150000001429ULL },  // Inst #2417 = S4_pstorerftnew_rr
4611
    { 2416, 4,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1304e480142fULL },  // Inst #2416 = S4_pstorerftnew_io
4612
    { 2415, 3,  0,  4,  182,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1100c3801429ULL },  // Inst #2415 = S4_pstorerftnew_abs
4613
    { 2414, 5,  0,  4,  181,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x150000000429ULL },  // Inst #2414 = S4_pstorerft_rr
4614
    { 2413, 3,  0,  4,  180,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1100c3800429ULL },  // Inst #2413 = S4_pstorerft_abs
4615
    { 2412, 5,  0,  4,  183,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x150000001c29ULL },  // Inst #2412 = S4_pstorerffnew_rr
4616
    { 2411, 4,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1304e4801c2fULL },  // Inst #2411 = S4_pstorerffnew_io
4617
    { 2410, 3,  0,  4,  182,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1100c3801c29ULL },  // Inst #2410 = S4_pstorerffnew_abs
4618
    { 2409, 5,  0,  4,  181,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0x150000000c29ULL },  // Inst #2409 = S4_pstorerff_rr
4619
    { 2408, 3,  0,  4,  180,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x1100c3800c29ULL },  // Inst #2408 = S4_pstorerff_abs
4620
    { 2407, 5,  0,  4,  183,  0,  0,  HexagonImpOpBase + 0, 819,  0|(1ULL<<MCID::MayStore), 0x250000001429ULL },  // Inst #2407 = S4_pstorerdtnew_rr
4621
    { 2406, 4,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 757,  0|(1ULL<<MCID::MayStore), 0x230d2480142fULL },  // Inst #2406 = S4_pstorerdtnew_io
4622
    { 2405, 3,  0,  4,  182,  0,  0,  HexagonImpOpBase + 0, 816,  0|(1ULL<<MCID::MayStore), 0x2100c3801429ULL },  // Inst #2405 = S4_pstorerdtnew_abs
4623
    { 2404, 5,  0,  4,  181,  0,  0,  HexagonImpOpBase + 0, 819,  0|(1ULL<<MCID::MayStore), 0x250000000429ULL },  // Inst #2404 = S4_pstorerdt_rr
4624
    { 2403, 3,  0,  4,  180,  0,  0,  HexagonImpOpBase + 0, 816,  0|(1ULL<<MCID::MayStore), 0x2100c3800429ULL },  // Inst #2403 = S4_pstorerdt_abs
4625
    { 2402, 5,  0,  4,  183,  0,  0,  HexagonImpOpBase + 0, 819,  0|(1ULL<<MCID::MayStore), 0x250000001c29ULL },  // Inst #2402 = S4_pstorerdfnew_rr
4626
    { 2401, 4,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 757,  0|(1ULL<<MCID::MayStore), 0x230d24801c2fULL },  // Inst #2401 = S4_pstorerdfnew_io
4627
    { 2400, 3,  0,  4,  182,  0,  0,  HexagonImpOpBase + 0, 816,  0|(1ULL<<MCID::MayStore), 0x2100c3801c29ULL },  // Inst #2400 = S4_pstorerdfnew_abs
4628
    { 2399, 5,  0,  4,  181,  0,  0,  HexagonImpOpBase + 0, 819,  0|(1ULL<<MCID::MayStore), 0x250000000c29ULL },  // Inst #2399 = S4_pstorerdf_rr
4629
    { 2398, 3,  0,  4,  180,  0,  0,  HexagonImpOpBase + 0, 816,  0|(1ULL<<MCID::MayStore), 0x2100c3800c29ULL },  // Inst #2398 = S4_pstorerdf_abs
4630
    { 2397, 5,  0,  4,  183,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0xd0000081429ULL },  // Inst #2397 = S4_pstorerbtnew_rr
4631
    { 2396, 4,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0xb00c488142fULL },  // Inst #2396 = S4_pstorerbtnew_io
4632
    { 2395, 3,  0,  4,  182,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x900c3881429ULL },  // Inst #2395 = S4_pstorerbtnew_abs
4633
    { 2394, 5,  0,  4,  181,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0xd0000080429ULL },  // Inst #2394 = S4_pstorerbt_rr
4634
    { 2393, 3,  0,  4,  180,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x900c3880429ULL },  // Inst #2393 = S4_pstorerbt_abs
4635
    { 2392, 5,  0,  4,  187,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0xd8000145429ULL },  // Inst #2392 = S4_pstorerbnewtnew_rr
4636
    { 2391, 4,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0xb80c493542fULL },  // Inst #2391 = S4_pstorerbnewtnew_io
4637
    { 2390, 3,  0,  4,  186,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x980c3925429ULL },  // Inst #2390 = S4_pstorerbnewtnew_abs
4638
    { 2389, 5,  0,  4,  185,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0xd8000144429ULL },  // Inst #2389 = S4_pstorerbnewt_rr
4639
    { 2388, 3,  0,  4,  184,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x980c3924429ULL },  // Inst #2388 = S4_pstorerbnewt_abs
4640
    { 2387, 5,  0,  4,  187,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0xd8000145c29ULL },  // Inst #2387 = S4_pstorerbnewfnew_rr
4641
    { 2386, 4,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0xb80c4935c2fULL },  // Inst #2386 = S4_pstorerbnewfnew_io
4642
    { 2385, 3,  0,  4,  186,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x980c3925c29ULL },  // Inst #2385 = S4_pstorerbnewfnew_abs
4643
    { 2384, 5,  0,  4,  185,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0xd8000144c29ULL },  // Inst #2384 = S4_pstorerbnewf_rr
4644
    { 2383, 3,  0,  4,  184,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x980c3924c29ULL },  // Inst #2383 = S4_pstorerbnewf_abs
4645
    { 2382, 5,  0,  4,  183,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0xd0000081c29ULL },  // Inst #2382 = S4_pstorerbfnew_rr
4646
    { 2381, 4,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0xb00c4881c2fULL },  // Inst #2381 = S4_pstorerbfnew_io
4647
    { 2380, 3,  0,  4,  182,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x900c3881c29ULL },  // Inst #2380 = S4_pstorerbfnew_abs
4648
    { 2379, 5,  0,  4,  181,  0,  0,  HexagonImpOpBase + 0, 811,  0|(1ULL<<MCID::MayStore), 0xd0000080c29ULL },  // Inst #2379 = S4_pstorerbf_rr
4649
    { 2378, 3,  0,  4,  180,  0,  0,  HexagonImpOpBase + 0, 808,  0|(1ULL<<MCID::MayStore), 0x900c3880c29ULL },  // Inst #2378 = S4_pstorerbf_abs
4650
    { 2377, 3,  1,  4,  170,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #2377 = S4_parity
4651
    { 2376, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 800,  0, 0x80000102808003ULL },  // Inst #2376 = S4_ori_lsr_ri
4652
    { 2375, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 800,  0, 0x80000102808003ULL },  // Inst #2375 = S4_ori_asl_ri
4653
    { 2374, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x80000156808003ULL },  // Inst #2374 = S4_or_ori
4654
    { 2373, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 804,  0, 0x80000156808003ULL },  // Inst #2373 = S4_or_andix
4655
    { 2372, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x80000156808003ULL },  // Inst #2372 = S4_or_andi
4656
    { 2371, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0, 0x2cULL },  // Inst #2371 = S4_ntstbit_r
4657
    { 2370, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 163,  0, 0x2bULL },  // Inst #2370 = S4_ntstbit_i
4658
    { 2369, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 498,  0, 0x802cULL },  // Inst #2369 = S4_lsli
4659
    { 2368, 3,  1,  4,  170,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x8000000000002cULL },  // Inst #2368 = S4_extractp_rp
4660
    { 2367, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 735,  0, 0x8000000000002bULL },  // Inst #2367 = S4_extractp
4661
    { 2366, 3,  1,  4,  170,  0,  0,  HexagonImpOpBase + 0, 732,  0, 0x8000000000802cULL },  // Inst #2366 = S4_extract_rp
4662
    { 2365, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 674,  0, 0x8000000000802bULL },  // Inst #2365 = S4_extract
4663
    { 2364, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 295,  0, 0x8000000000802bULL },  // Inst #2364 = S4_clbpnorm
4664
    { 2363, 3,  1,  4,  170,  0,  0,  HexagonImpOpBase + 0, 302,  0, 0x8000000000802bULL },  // Inst #2363 = S4_clbpaddi
4665
    { 2362, 3,  1,  4,  170,  0,  0,  HexagonImpOpBase + 0, 187,  0, 0x8000000000802bULL },  // Inst #2362 = S4_clbaddi
4666
    { 2361, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 800,  0, 0x80000102808003ULL },  // Inst #2361 = S4_andi_lsr_ri
4667
    { 2360, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 800,  0, 0x80000102808003ULL },  // Inst #2360 = S4_andi_asl_ri
4668
    { 2359, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 800,  0, 0x80000102808003ULL },  // Inst #2359 = S4_addi_lsr_ri
4669
    { 2358, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 800,  0, 0x80000102808003ULL },  // Inst #2358 = S4_addi_asl_ri
4670
    { 2357, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 207,  0, 0x800000d6808003ULL },  // Inst #2357 = S4_addaddi
4671
    { 2356, 2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 178,  0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x2bULL },  // Inst #2356 = S2_vzxthw
4672
    { 2355, 2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 178,  0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x2bULL },  // Inst #2355 = S2_vzxtbh
4673
    { 2354, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x2cULL },  // Inst #2354 = S2_vtrunowh
4674
    { 2353, 2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 295,  0, 0x802bULL },  // Inst #2353 = S2_vtrunohb
4675
    { 2352, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x2cULL },  // Inst #2352 = S2_vtrunewh
4676
    { 2351, 2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 295,  0, 0x802bULL },  // Inst #2351 = S2_vtrunehb
4677
    { 2350, 2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 178,  0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x2bULL },  // Inst #2350 = S2_vsxthw
4678
    { 2349, 2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 178,  0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x2bULL },  // Inst #2349 = S2_vsxtbh
4679
    { 2348, 4,  1,  4,  100,  0,  0,  HexagonImpOpBase + 0, 796,  0, 0x2cULL },  // Inst #2348 = S2_vsplicerb
4680
    { 2347, 4,  1,  4,  100,  0,  0,  HexagonImpOpBase + 0, 792,  0, 0x2cULL },  // Inst #2347 = S2_vspliceib
4681
    { 2346, 2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 178,  0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x2bULL },  // Inst #2346 = S2_vsplatrh
4682
    { 2345, 2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x802bULL },  // Inst #2345 = S2_vsplatrb
4683
    { 2344, 2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  150,  0, 0x2bULL },  // Inst #2344 = S2_vsatwuh_nopack
4684
    { 2343, 2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  295,  0, 0x802bULL },  // Inst #2343 = S2_vsatwuh
4685
    { 2342, 2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  150,  0, 0x2bULL },  // Inst #2342 = S2_vsatwh_nopack
4686
    { 2341, 2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  295,  0, 0x802bULL },  // Inst #2341 = S2_vsatwh
4687
    { 2340, 2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  150,  0, 0x2bULL },  // Inst #2340 = S2_vsathub_nopack
4688
    { 2339, 2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  295,  0, 0x802bULL },  // Inst #2339 = S2_vsathub
4689
    { 2338, 2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  150,  0, 0x2bULL },  // Inst #2338 = S2_vsathb_nopack
4690
    { 2337, 2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  295,  0, 0x802bULL },  // Inst #2337 = S2_vsathb
4691
    { 2336, 2,  1,  4,  76, 0,  1,  HexagonImpOpBase + 63,  295,  0, 0x8000000000802bULL },  // Inst #2336 = S2_vrndpackwhs
4692
    { 2335, 2,  1,  4,  179,  0,  0,  HexagonImpOpBase + 0, 295,  0, 0x8000000000802bULL },  // Inst #2335 = S2_vrndpackwh
4693
    { 2334, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2334 = S2_vrcnegh
4694
    { 2333, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  197,  0, 0x8000000000002cULL },  // Inst #2333 = S2_vcrotate
4695
    { 2332, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  197,  0, 0x8000000000002cULL },  // Inst #2332 = S2_vcnegh
4696
    { 2331, 4,  1,  4,  100,  0,  0,  HexagonImpOpBase + 0, 796,  0, 0x2cULL },  // Inst #2331 = S2_valignrb
4697
    { 2330, 4,  1,  4,  100,  0,  0,  HexagonImpOpBase + 0, 792,  0, 0x2cULL },  // Inst #2330 = S2_valignib
4698
    { 2329, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0, 0x2cULL },  // Inst #2329 = S2_tstbit_r
4699
    { 2328, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 163,  0, 0x2bULL },  // Inst #2328 = S2_tstbit_i
4700
    { 2327, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x802cULL },  // Inst #2327 = S2_togglebit_r
4701
    { 2326, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 187,  0, 0x802bULL },  // Inst #2326 = S2_togglebit_i
4702
    { 2325, 5,  1,  4,  53, 0,  0,  HexagonImpOpBase + 0, 297,  0, 0x8000000000802bULL },  // Inst #2325 = S2_tableidxw
4703
    { 2324, 5,  1,  4,  53, 0,  0,  HexagonImpOpBase + 0, 297,  0, 0x8000000000802bULL },  // Inst #2324 = S2_tableidxh
4704
    { 2323, 5,  1,  4,  53, 0,  0,  HexagonImpOpBase + 0, 297,  0, 0x8000000000802bULL },  // Inst #2323 = S2_tableidxd
4705
    { 2322, 5,  1,  4,  53, 0,  0,  HexagonImpOpBase + 0, 297,  0, 0x8000000000802bULL },  // Inst #2322 = S2_tableidxb
4706
    { 2321, 2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  145,  0, 0x802bULL },  // Inst #2321 = S2_svsathub
4707
    { 2320, 2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  145,  0, 0x802bULL },  // Inst #2320 = S2_svsathb
4708
    { 2319, 2,  0,  4,  178,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::MayStore), 0x1800000000a9ULL },  // Inst #2319 = S2_storew_rl_st_vi
4709
    { 2318, 2,  0,  4,  178,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::MayStore), 0x1800000000a9ULL },  // Inst #2318 = S2_storew_rl_at_vi
4710
    { 2317, 3,  1,  4,  177,  0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x180000002129ULL },  // Inst #2317 = S2_storew_locked
4711
    { 2316, 2,  0,  4,  166,  1,  0,  HexagonImpOpBase + 101, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x188a4011402fULL },  // Inst #2316 = S2_storerinewgp
4712
    { 2315, 4,  1,  4,  54, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0x1e8000134029ULL },  // Inst #2315 = S2_storerinew_pr
4713
    { 2314, 4,  1,  4,  54, 0,  0,  HexagonImpOpBase + 0, 775,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x1e8000134029ULL },  // Inst #2314 = S2_storerinew_pi
4714
    { 2313, 4,  1,  4,  54, 1,  0,  HexagonImpOpBase + 100, 766,  0|(1ULL<<MCID::MayStore), 0x1e8000134029ULL },  // Inst #2313 = S2_storerinew_pcr
4715
    { 2312, 5,  1,  4,  176,  1,  0,  HexagonImpOpBase + 100, 770,  0|(1ULL<<MCID::MayStore), 0x1e8000144029ULL },  // Inst #2312 = S2_storerinew_pci
4716
    { 2311, 4,  1,  4,  54, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0x1e8000134029ULL },  // Inst #2311 = S2_storerinew_pbr
4717
    { 2310, 3,  0,  4,  52, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x1b89b2924029ULL },  // Inst #2310 = S2_storerinew_io
4718
    { 2309, 2,  0,  4,  165,  1,  0,  HexagonImpOpBase + 101, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x180a4008002fULL },  // Inst #2309 = S2_storerigp
4719
    { 2308, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0x1e0000080029ULL },  // Inst #2308 = S2_storeri_pr
4720
    { 2307, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 775,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x1e0000080029ULL },  // Inst #2307 = S2_storeri_pi
4721
    { 2306, 4,  1,  4,  39, 1,  0,  HexagonImpOpBase + 100, 766,  0|(1ULL<<MCID::MayStore), 0x1e0000080029ULL },  // Inst #2306 = S2_storeri_pcr
4722
    { 2305, 5,  1,  4,  38, 1,  0,  HexagonImpOpBase + 100, 770,  0|(1ULL<<MCID::MayStore), 0x1e0000080029ULL },  // Inst #2305 = S2_storeri_pci
4723
    { 2304, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0x1e0000080029ULL },  // Inst #2304 = S2_storeri_pbr
4724
    { 2303, 3,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x1b09b2880029ULL },  // Inst #2303 = S2_storeri_io
4725
    { 2302, 2,  0,  4,  166,  1,  0,  HexagonImpOpBase + 101, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x10862011402fULL },  // Inst #2302 = S2_storerhnewgp
4726
    { 2301, 4,  1,  4,  54, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0x168000134029ULL },  // Inst #2301 = S2_storerhnew_pr
4727
    { 2300, 4,  1,  4,  54, 0,  0,  HexagonImpOpBase + 0, 775,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x1680001b4029ULL },  // Inst #2300 = S2_storerhnew_pi
4728
    { 2299, 4,  1,  4,  54, 1,  0,  HexagonImpOpBase + 100, 766,  0|(1ULL<<MCID::MayStore), 0x168000134029ULL },  // Inst #2299 = S2_storerhnew_pcr
4729
    { 2298, 5,  1,  4,  176,  1,  0,  HexagonImpOpBase + 100, 770,  0|(1ULL<<MCID::MayStore), 0x168000144029ULL },  // Inst #2298 = S2_storerhnew_pci
4730
    { 2297, 4,  1,  4,  54, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0x168000134029ULL },  // Inst #2297 = S2_storerhnew_pbr
4731
    { 2296, 3,  0,  4,  52, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x138592924029ULL },  // Inst #2296 = S2_storerhnew_io
4732
    { 2295, 2,  0,  4,  165,  1,  0,  HexagonImpOpBase + 101, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x10062008002fULL },  // Inst #2295 = S2_storerhgp
4733
    { 2294, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0x160000080029ULL },  // Inst #2294 = S2_storerh_pr
4734
    { 2293, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 775,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x160000080029ULL },  // Inst #2293 = S2_storerh_pi
4735
    { 2292, 4,  1,  4,  39, 1,  0,  HexagonImpOpBase + 100, 766,  0|(1ULL<<MCID::MayStore), 0x160000080029ULL },  // Inst #2292 = S2_storerh_pcr
4736
    { 2291, 5,  1,  4,  38, 1,  0,  HexagonImpOpBase + 100, 770,  0|(1ULL<<MCID::MayStore), 0x160000080029ULL },  // Inst #2291 = S2_storerh_pci
4737
    { 2290, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0x160000080029ULL },  // Inst #2290 = S2_storerh_pbr
4738
    { 2289, 3,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x130592880029ULL },  // Inst #2289 = S2_storerh_io
4739
    { 2288, 2,  0,  4,  165,  1,  0,  HexagonImpOpBase + 101, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x10062000002fULL },  // Inst #2288 = S2_storerfgp
4740
    { 2287, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0x160000000029ULL },  // Inst #2287 = S2_storerf_pr
4741
    { 2286, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 775,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x160000000029ULL },  // Inst #2286 = S2_storerf_pi
4742
    { 2285, 4,  1,  4,  39, 1,  0,  HexagonImpOpBase + 100, 766,  0|(1ULL<<MCID::MayStore), 0x160000000029ULL },  // Inst #2285 = S2_storerf_pcr
4743
    { 2284, 5,  1,  4,  38, 1,  0,  HexagonImpOpBase + 100, 770,  0|(1ULL<<MCID::MayStore), 0x160000000029ULL },  // Inst #2284 = S2_storerf_pci
4744
    { 2283, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0x160000000029ULL },  // Inst #2283 = S2_storerf_pbr
4745
    { 2282, 3,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x130592800029ULL },  // Inst #2282 = S2_storerf_io
4746
    { 2281, 2,  0,  4,  165,  1,  0,  HexagonImpOpBase + 101, 726,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x200e6000002fULL },  // Inst #2281 = S2_storerdgp
4747
    { 2280, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 779,  0|(1ULL<<MCID::MayStore), 0x260000000029ULL },  // Inst #2280 = S2_storerd_pr
4748
    { 2279, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 788,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x260000000029ULL },  // Inst #2279 = S2_storerd_pi
4749
    { 2278, 4,  1,  4,  39, 1,  0,  HexagonImpOpBase + 100, 779,  0|(1ULL<<MCID::MayStore), 0x260000000029ULL },  // Inst #2278 = S2_storerd_pcr
4750
    { 2277, 5,  1,  4,  38, 1,  0,  HexagonImpOpBase + 100, 783,  0|(1ULL<<MCID::MayStore), 0x260000000029ULL },  // Inst #2277 = S2_storerd_pci
4751
    { 2276, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 779,  0|(1ULL<<MCID::MayStore), 0x260000000029ULL },  // Inst #2276 = S2_storerd_pbr
4752
    { 2275, 3,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 501,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x230dd2800029ULL },  // Inst #2275 = S2_storerd_io
4753
    { 2274, 2,  0,  4,  166,  1,  0,  HexagonImpOpBase + 101, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x8820011402fULL },  // Inst #2274 = S2_storerbnewgp
4754
    { 2273, 4,  1,  4,  54, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0xe8000134029ULL },  // Inst #2273 = S2_storerbnew_pr
4755
    { 2272, 4,  1,  4,  54, 0,  0,  HexagonImpOpBase + 0, 775,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xe80001b4029ULL },  // Inst #2272 = S2_storerbnew_pi
4756
    { 2271, 4,  1,  4,  54, 1,  0,  HexagonImpOpBase + 100, 766,  0|(1ULL<<MCID::MayStore), 0xe8000134029ULL },  // Inst #2271 = S2_storerbnew_pcr
4757
    { 2270, 5,  1,  4,  176,  1,  0,  HexagonImpOpBase + 100, 770,  0|(1ULL<<MCID::MayStore), 0xe8000144029ULL },  // Inst #2270 = S2_storerbnew_pci
4758
    { 2269, 4,  1,  4,  54, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0xe8000134029ULL },  // Inst #2269 = S2_storerbnew_pbr
4759
    { 2268, 3,  0,  4,  52, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xb8172924029ULL },  // Inst #2268 = S2_storerbnew_io
4760
    { 2267, 2,  0,  4,  165,  1,  0,  HexagonImpOpBase + 101, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x8020008002fULL },  // Inst #2267 = S2_storerbgp
4761
    { 2266, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0xe0000080029ULL },  // Inst #2266 = S2_storerb_pr
4762
    { 2265, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 775,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xe0000080029ULL },  // Inst #2265 = S2_storerb_pi
4763
    { 2264, 4,  1,  4,  39, 1,  0,  HexagonImpOpBase + 100, 766,  0|(1ULL<<MCID::MayStore), 0xe0000080029ULL },  // Inst #2264 = S2_storerb_pcr
4764
    { 2263, 5,  1,  4,  38, 1,  0,  HexagonImpOpBase + 100, 770,  0|(1ULL<<MCID::MayStore), 0xe0000080029ULL },  // Inst #2263 = S2_storerb_pci
4765
    { 2262, 4,  1,  4,  39, 0,  0,  HexagonImpOpBase + 0, 766,  0|(1ULL<<MCID::MayStore), 0xe0000080029ULL },  // Inst #2262 = S2_storerb_pbr
4766
    { 2261, 3,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0xb0172880029ULL },  // Inst #2261 = S2_storerb_io
4767
    { 2260, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x2cULL },  // Inst #2260 = S2_shuffoh
4768
    { 2259, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x2cULL },  // Inst #2259 = S2_shuffob
4769
    { 2258, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x2cULL },  // Inst #2258 = S2_shuffeh
4770
    { 2257, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x2cULL },  // Inst #2257 = S2_shuffeb
4771
    { 2256, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x802cULL },  // Inst #2256 = S2_setbit_r
4772
    { 2255, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 187,  0, 0x802bULL },  // Inst #2255 = S2_setbit_i
4773
    { 2254, 5,  1,  4,  173,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x1e0000081429ULL },  // Inst #2254 = S2_pstoreritnew_pi
4774
    { 2253, 5,  1,  4,  172,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x1e0000080429ULL },  // Inst #2253 = S2_pstorerit_pi
4775
    { 2252, 4,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1b090488042fULL },  // Inst #2252 = S2_pstorerit_io
4776
    { 2251, 5,  1,  4,  175,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x1e8000145429ULL },  // Inst #2251 = S2_pstorerinewtnew_pi
4777
    { 2250, 5,  1,  4,  174,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x1e8000144429ULL },  // Inst #2250 = S2_pstorerinewt_pi
4778
    { 2249, 4,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1b890493442fULL },  // Inst #2249 = S2_pstorerinewt_io
4779
    { 2248, 5,  1,  4,  175,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x1e8000145c29ULL },  // Inst #2248 = S2_pstorerinewfnew_pi
4780
    { 2247, 5,  1,  4,  174,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x1e8000144c29ULL },  // Inst #2247 = S2_pstorerinewf_pi
4781
    { 2246, 4,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1b8904934c2fULL },  // Inst #2246 = S2_pstorerinewf_io
4782
    { 2245, 5,  1,  4,  173,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x1e0000081c29ULL },  // Inst #2245 = S2_pstorerifnew_pi
4783
    { 2244, 5,  1,  4,  172,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x1e0000080c29ULL },  // Inst #2244 = S2_pstorerif_pi
4784
    { 2243, 4,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1b0904880c2fULL },  // Inst #2243 = S2_pstorerif_io
4785
    { 2242, 5,  1,  4,  173,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x160000081429ULL },  // Inst #2242 = S2_pstorerhtnew_pi
4786
    { 2241, 5,  1,  4,  172,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x160000080429ULL },  // Inst #2241 = S2_pstorerht_pi
4787
    { 2240, 4,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1304e488042fULL },  // Inst #2240 = S2_pstorerht_io
4788
    { 2239, 5,  1,  4,  175,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x168000145429ULL },  // Inst #2239 = S2_pstorerhnewtnew_pi
4789
    { 2238, 5,  1,  4,  174,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x168000144429ULL },  // Inst #2238 = S2_pstorerhnewt_pi
4790
    { 2237, 4,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1384e493442fULL },  // Inst #2237 = S2_pstorerhnewt_io
4791
    { 2236, 5,  1,  4,  175,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x168000145c29ULL },  // Inst #2236 = S2_pstorerhnewfnew_pi
4792
    { 2235, 5,  1,  4,  174,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x168000144c29ULL },  // Inst #2235 = S2_pstorerhnewf_pi
4793
    { 2234, 4,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1384e4934c2fULL },  // Inst #2234 = S2_pstorerhnewf_io
4794
    { 2233, 5,  1,  4,  173,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x160000081c29ULL },  // Inst #2233 = S2_pstorerhfnew_pi
4795
    { 2232, 5,  1,  4,  172,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x160000080c29ULL },  // Inst #2232 = S2_pstorerhf_pi
4796
    { 2231, 4,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1304e4880c2fULL },  // Inst #2231 = S2_pstorerhf_io
4797
    { 2230, 5,  1,  4,  173,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x160000001429ULL },  // Inst #2230 = S2_pstorerftnew_pi
4798
    { 2229, 5,  1,  4,  172,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x160000000429ULL },  // Inst #2229 = S2_pstorerft_pi
4799
    { 2228, 4,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1304e480042fULL },  // Inst #2228 = S2_pstorerft_io
4800
    { 2227, 5,  1,  4,  173,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x160000001c29ULL },  // Inst #2227 = S2_pstorerffnew_pi
4801
    { 2226, 5,  1,  4,  172,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0x160000000c29ULL },  // Inst #2226 = S2_pstorerff_pi
4802
    { 2225, 4,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0x1304e4800c2fULL },  // Inst #2225 = S2_pstorerff_io
4803
    { 2224, 5,  1,  4,  173,  0,  0,  HexagonImpOpBase + 0, 761,  0|(1ULL<<MCID::MayStore), 0x260000001429ULL },  // Inst #2224 = S2_pstorerdtnew_pi
4804
    { 2223, 5,  1,  4,  172,  0,  0,  HexagonImpOpBase + 0, 761,  0|(1ULL<<MCID::MayStore), 0x260000000429ULL },  // Inst #2223 = S2_pstorerdt_pi
4805
    { 2222, 4,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 757,  0|(1ULL<<MCID::MayStore), 0x230d2480042fULL },  // Inst #2222 = S2_pstorerdt_io
4806
    { 2221, 5,  1,  4,  173,  0,  0,  HexagonImpOpBase + 0, 761,  0|(1ULL<<MCID::MayStore), 0x260000001c29ULL },  // Inst #2221 = S2_pstorerdfnew_pi
4807
    { 2220, 5,  1,  4,  172,  0,  0,  HexagonImpOpBase + 0, 761,  0|(1ULL<<MCID::MayStore), 0x260000000c29ULL },  // Inst #2220 = S2_pstorerdf_pi
4808
    { 2219, 4,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 757,  0|(1ULL<<MCID::MayStore), 0x230d24800c2fULL },  // Inst #2219 = S2_pstorerdf_io
4809
    { 2218, 5,  1,  4,  173,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0xe0000081429ULL },  // Inst #2218 = S2_pstorerbtnew_pi
4810
    { 2217, 5,  1,  4,  172,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0xe0000080429ULL },  // Inst #2217 = S2_pstorerbt_pi
4811
    { 2216, 4,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0xb00c488042fULL },  // Inst #2216 = S2_pstorerbt_io
4812
    { 2215, 5,  1,  4,  175,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0xe8000145429ULL },  // Inst #2215 = S2_pstorerbnewtnew_pi
4813
    { 2214, 5,  1,  4,  174,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0xe8000144429ULL },  // Inst #2214 = S2_pstorerbnewt_pi
4814
    { 2213, 4,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0xb80c493442fULL },  // Inst #2213 = S2_pstorerbnewt_io
4815
    { 2212, 5,  1,  4,  175,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0xe8000145c29ULL },  // Inst #2212 = S2_pstorerbnewfnew_pi
4816
    { 2211, 5,  1,  4,  174,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0xe8000144c29ULL },  // Inst #2211 = S2_pstorerbnewf_pi
4817
    { 2210, 4,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0xb80c4934c2fULL },  // Inst #2210 = S2_pstorerbnewf_io
4818
    { 2209, 5,  1,  4,  173,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0xe0000081c29ULL },  // Inst #2209 = S2_pstorerbfnew_pi
4819
    { 2208, 5,  1,  4,  172,  0,  0,  HexagonImpOpBase + 0, 752,  0|(1ULL<<MCID::MayStore), 0xe0000080c29ULL },  // Inst #2208 = S2_pstorerbf_pi
4820
    { 2207, 4,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 748,  0|(1ULL<<MCID::MayStore), 0xb00c4880c2fULL },  // Inst #2207 = S2_pstorerbf_io
4821
    { 2206, 3,  1,  4,  170,  0,  0,  HexagonImpOpBase + 0, 545,  0, 0x80000000008003ULL },  // Inst #2206 = S2_parityp
4822
    { 2205, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 507,  0, 0x1ULL },  // Inst #2205 = S2_packhl
4823
    { 2204, 3,  1,  4,  171,  0,  0,  HexagonImpOpBase + 0, 504,  0, 0x8000000000802bULL },  // Inst #2204 = S2_mask
4824
    { 2203, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2203 = S2_lsr_r_vw
4825
    { 2202, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2202 = S2_lsr_r_vh
4826
    { 2201, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2201 = S2_lsr_r_r_or
4827
    { 2200, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2200 = S2_lsr_r_r_nac
4828
    { 2199, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2199 = S2_lsr_r_r_and
4829
    { 2198, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2198 = S2_lsr_r_r_acc
4830
    { 2197, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x802cULL },  // Inst #2197 = S2_lsr_r_r
4831
    { 2196, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2196 = S2_lsr_r_p_xor
4832
    { 2195, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2195 = S2_lsr_r_p_or
4833
    { 2194, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2194 = S2_lsr_r_p_nac
4834
    { 2193, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2193 = S2_lsr_r_p_and
4835
    { 2192, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2192 = S2_lsr_r_p_acc
4836
    { 2191, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2191 = S2_lsr_r_p
4837
    { 2190, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 292,  0, 0x2bULL },  // Inst #2190 = S2_lsr_i_vw
4838
    { 2189, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 292,  0, 0x2bULL },  // Inst #2189 = S2_lsr_i_vh
4839
    { 2188, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2188 = S2_lsr_i_r_xacc
4840
    { 2187, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2187 = S2_lsr_i_r_or
4841
    { 2186, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2186 = S2_lsr_i_r_nac
4842
    { 2185, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2185 = S2_lsr_i_r_and
4843
    { 2184, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2184 = S2_lsr_i_r_acc
4844
    { 2183, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 187,  0, 0x802bULL },  // Inst #2183 = S2_lsr_i_r
4845
    { 2182, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2182 = S2_lsr_i_p_xacc
4846
    { 2181, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2181 = S2_lsr_i_p_or
4847
    { 2180, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2180 = S2_lsr_i_p_nac
4848
    { 2179, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2179 = S2_lsr_i_p_and
4849
    { 2178, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2178 = S2_lsr_i_p_acc
4850
    { 2177, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 292,  0, 0x2bULL },  // Inst #2177 = S2_lsr_i_p
4851
    { 2176, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2176 = S2_lsl_r_vw
4852
    { 2175, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2175 = S2_lsl_r_vh
4853
    { 2174, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2174 = S2_lsl_r_r_or
4854
    { 2173, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2173 = S2_lsl_r_r_nac
4855
    { 2172, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2172 = S2_lsl_r_r_and
4856
    { 2171, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2171 = S2_lsl_r_r_acc
4857
    { 2170, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x802cULL },  // Inst #2170 = S2_lsl_r_r
4858
    { 2169, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2169 = S2_lsl_r_p_xor
4859
    { 2168, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2168 = S2_lsl_r_p_or
4860
    { 2167, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2167 = S2_lsl_r_p_nac
4861
    { 2166, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2166 = S2_lsl_r_p_and
4862
    { 2165, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2165 = S2_lsl_r_p_acc
4863
    { 2164, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2164 = S2_lsl_r_p
4864
    { 2163, 3,  1,  4,  170,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x8000000000002cULL },  // Inst #2163 = S2_lfsp
4865
    { 2162, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 150,  0, 0x8000000000002bULL },  // Inst #2162 = S2_interleave
4866
    { 2161, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 203,  0, 0x8000000000002cULL },  // Inst #2161 = S2_insertp_rp
4867
    { 2160, 5,  1,  4,  53, 0,  0,  HexagonImpOpBase + 0, 743,  0, 0x8000000000002bULL },  // Inst #2160 = S2_insertp
4868
    { 2159, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 739,  0, 0x8000000000802cULL },  // Inst #2159 = S2_insert_rp
4869
    { 2158, 5,  1,  4,  53, 0,  0,  HexagonImpOpBase + 0, 297,  0, 0x8000000000802bULL },  // Inst #2158 = S2_insert
4870
    { 2157, 3,  1,  4,  170,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x8000000000002cULL },  // Inst #2157 = S2_extractup_rp
4871
    { 2156, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 735,  0, 0x8000000000002bULL },  // Inst #2156 = S2_extractup
4872
    { 2155, 3,  1,  4,  170,  0,  0,  HexagonImpOpBase + 0, 732,  0, 0x8000000000802cULL },  // Inst #2155 = S2_extractu_rp
4873
    { 2154, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 674,  0, 0x8000000000802bULL },  // Inst #2154 = S2_extractu
4874
    { 2153, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 150,  0, 0x8000000000002bULL },  // Inst #2153 = S2_deinterleave
4875
    { 2152, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 295,  0, 0x8000000000802bULL },  // Inst #2152 = S2_ct1p
4876
    { 2151, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8000000000802bULL },  // Inst #2151 = S2_ct1
4877
    { 2150, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 295,  0, 0x8000000000802bULL },  // Inst #2150 = S2_ct0p
4878
    { 2149, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8000000000802bULL },  // Inst #2149 = S2_ct0
4879
    { 2148, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x802cULL },  // Inst #2148 = S2_clrbit_r
4880
    { 2147, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 187,  0, 0x802bULL },  // Inst #2147 = S2_clrbit_i
4881
    { 2146, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 295,  0, 0x8000000000802bULL },  // Inst #2146 = S2_clbp
4882
    { 2145, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8000000000802bULL },  // Inst #2145 = S2_clbnorm
4883
    { 2144, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8000000000802bULL },  // Inst #2144 = S2_clb
4884
    { 2143, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 295,  0, 0x8000000000802bULL },  // Inst #2143 = S2_cl1p
4885
    { 2142, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8000000000802bULL },  // Inst #2142 = S2_cl1
4886
    { 2141, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 295,  0, 0x8000000000802bULL },  // Inst #2141 = S2_cl0p
4887
    { 2140, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8000000000802bULL },  // Inst #2140 = S2_cl0
4888
    { 2139, 3,  1,  4,  169,  0,  1,  HexagonImpOpBase + 121, 157,  0, 0x8000000000202cULL },  // Inst #2139 = S2_cabacdecbin
4889
    { 2138, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 150,  0, 0x8000000000002bULL },  // Inst #2138 = S2_brevp
4890
    { 2137, 2,  1,  4,  168,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8000000000802bULL },  // Inst #2137 = S2_brev
4891
    { 2136, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2136 = S2_asr_r_vw
4892
    { 2135, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2135 = S2_asr_r_vh
4893
    { 2134, 3,  1,  4,  78, 0,  0,  HexagonImpOpBase + 0, 200,  0, 0x8000000000802cULL },  // Inst #2134 = S2_asr_r_svw_trun
4894
    { 2133, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x8000000000802cULL },  // Inst #2133 = S2_asr_r_r_sat
4895
    { 2132, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2132 = S2_asr_r_r_or
4896
    { 2131, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2131 = S2_asr_r_r_nac
4897
    { 2130, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2130 = S2_asr_r_r_and
4898
    { 2129, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2129 = S2_asr_r_r_acc
4899
    { 2128, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x802cULL },  // Inst #2128 = S2_asr_r_r
4900
    { 2127, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2127 = S2_asr_r_p_xor
4901
    { 2126, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2126 = S2_asr_r_p_or
4902
    { 2125, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2125 = S2_asr_r_p_nac
4903
    { 2124, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2124 = S2_asr_r_p_and
4904
    { 2123, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2123 = S2_asr_r_p_acc
4905
    { 2122, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2122 = S2_asr_r_p
4906
    { 2121, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 292,  0, 0x2bULL },  // Inst #2121 = S2_asr_i_vw
4907
    { 2120, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 292,  0, 0x2bULL },  // Inst #2120 = S2_asr_i_vh
4908
    { 2119, 3,  1,  4,  78, 0,  0,  HexagonImpOpBase + 0, 302,  0, 0x8000000000802bULL },  // Inst #2119 = S2_asr_i_svw_trun
4909
    { 2118, 3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 187,  0, 0x8000000000802bULL },  // Inst #2118 = S2_asr_i_r_rnd
4910
    { 2117, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2117 = S2_asr_i_r_or
4911
    { 2116, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2116 = S2_asr_i_r_nac
4912
    { 2115, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2115 = S2_asr_i_r_and
4913
    { 2114, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2114 = S2_asr_i_r_acc
4914
    { 2113, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 187,  0, 0x802bULL },  // Inst #2113 = S2_asr_i_r
4915
    { 2112, 3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 292,  0, 0x8000000000002bULL },  // Inst #2112 = S2_asr_i_p_rnd
4916
    { 2111, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2111 = S2_asr_i_p_or
4917
    { 2110, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2110 = S2_asr_i_p_nac
4918
    { 2109, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2109 = S2_asr_i_p_and
4919
    { 2108, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2108 = S2_asr_i_p_acc
4920
    { 2107, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 292,  0, 0x2bULL },  // Inst #2107 = S2_asr_i_p
4921
    { 2106, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2106 = S2_asl_r_vw
4922
    { 2105, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2105 = S2_asl_r_vh
4923
    { 2104, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x8000000000802cULL },  // Inst #2104 = S2_asl_r_r_sat
4924
    { 2103, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2103 = S2_asl_r_r_or
4925
    { 2102, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2102 = S2_asl_r_r_nac
4926
    { 2101, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2101 = S2_asl_r_r_and
4927
    { 2100, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x8000000000802cULL },  // Inst #2100 = S2_asl_r_r_acc
4928
    { 2099, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x802cULL },  // Inst #2099 = S2_asl_r_r
4929
    { 2098, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2098 = S2_asl_r_p_xor
4930
    { 2097, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2097 = S2_asl_r_p_or
4931
    { 2096, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2096 = S2_asl_r_p_nac
4932
    { 2095, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2095 = S2_asl_r_p_and
4933
    { 2094, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #2094 = S2_asl_r_p_acc
4934
    { 2093, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 197,  0, 0x2cULL },  // Inst #2093 = S2_asl_r_p
4935
    { 2092, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 292,  0, 0x2bULL },  // Inst #2092 = S2_asl_i_vw
4936
    { 2091, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 292,  0, 0x2bULL },  // Inst #2091 = S2_asl_i_vh
4937
    { 2090, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2090 = S2_asl_i_r_xacc
4938
    { 2089, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  187,  0, 0x8000000000802bULL },  // Inst #2089 = S2_asl_i_r_sat
4939
    { 2088, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2088 = S2_asl_i_r_or
4940
    { 2087, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2087 = S2_asl_i_r_nac
4941
    { 2086, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2086 = S2_asl_i_r_and
4942
    { 2085, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x8000000000802bULL },  // Inst #2085 = S2_asl_i_r_acc
4943
    { 2084, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 187,  0, 0x802bULL },  // Inst #2084 = S2_asl_i_r
4944
    { 2083, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2083 = S2_asl_i_p_xacc
4945
    { 2082, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2082 = S2_asl_i_p_or
4946
    { 2081, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2081 = S2_asl_i_p_nac
4947
    { 2080, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2080 = S2_asl_i_p_and
4948
    { 2079, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 728,  0, 0x8000000000002bULL },  // Inst #2079 = S2_asl_i_p_acc
4949
    { 2078, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 292,  0, 0x2bULL },  // Inst #2078 = S2_asl_i_p
4950
    { 2077, 3,  1,  4,  58, 4,  1,  HexagonImpOpBase + 58,  495,  0|(1ULL<<MCID::MayStore), 0x230000008029ULL },  // Inst #2077 = S2_allocframe
4951
    { 2076, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 207,  0, 0x8000000000802cULL },  // Inst #2076 = S2_addasl_rrri
4952
    { 2075, 1,  0,  4,  121,  0,  7,  HexagonImpOpBase + 114, 0,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0xb10800023ULL },  // Inst #2075 = RESTORE_DEALLOC_RET_JMP_V4_PIC
4953
    { 2074, 1,  0,  4,  121,  0,  7,  HexagonImpOpBase + 114, 0,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0xb11800023ULL },  // Inst #2074 = RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC
4954
    { 2073, 1,  0,  4,  121,  0,  4,  HexagonImpOpBase + 110, 0,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0xb11800023ULL },  // Inst #2073 = RESTORE_DEALLOC_RET_JMP_V4_EXT
4955
    { 2072, 1,  0,  4,  121,  0,  4,  HexagonImpOpBase + 110, 0,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0xb10800023ULL },  // Inst #2072 = RESTORE_DEALLOC_RET_JMP_V4
4956
    { 2071, 1,  0,  4,  35, 0,  7,  HexagonImpOpBase + 114, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb10800023ULL },  // Inst #2071 = RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC
4957
    { 2070, 1,  0,  4,  35, 0,  7,  HexagonImpOpBase + 114, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb11800023ULL },  // Inst #2070 = RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC
4958
    { 2069, 1,  0,  4,  35, 0,  4,  HexagonImpOpBase + 110, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb11800023ULL },  // Inst #2069 = RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT
4959
    { 2068, 1,  0,  4,  35, 0,  4,  HexagonImpOpBase + 110, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb10800023ULL },  // Inst #2068 = RESTORE_DEALLOC_BEFORE_TAILCALL_V4
4960
    { 2067, 1,  0,  4,  167,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::MayStore), 0xa9ULL },  // Inst #2067 = R6_release_st_vi
4961
    { 2066, 1,  0,  4,  167,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::MayStore), 0xa9ULL },  // Inst #2066 = R6_release_at_vi
4962
    { 2065, 1,  0,  4,  17, 0,  0,  HexagonImpOpBase + 0, 0,  0, 0x23ULL },  // Inst #2065 = PS_trap1
4963
    { 2064, 2,  0,  4,  166,  0,  0,  HexagonImpOpBase + 0, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x198a4111402fULL },  // Inst #2064 = PS_storerinewabs
4964
    { 2063, 2,  0,  4,  165,  0,  0,  HexagonImpOpBase + 0, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x190a4108002fULL },  // Inst #2063 = PS_storeriabs
4965
    { 2062, 2,  0,  4,  166,  0,  0,  HexagonImpOpBase + 0, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x11862111402fULL },  // Inst #2062 = PS_storerhnewabs
4966
    { 2061, 2,  0,  4,  165,  0,  0,  HexagonImpOpBase + 0, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x11062108002fULL },  // Inst #2061 = PS_storerhabs
4967
    { 2060, 2,  0,  4,  165,  0,  0,  HexagonImpOpBase + 0, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x11062100002fULL },  // Inst #2060 = PS_storerfabs
4968
    { 2059, 2,  0,  4,  165,  0,  0,  HexagonImpOpBase + 0, 726,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x210e6100002fULL },  // Inst #2059 = PS_storerdabs
4969
    { 2058, 2,  0,  4,  166,  0,  0,  HexagonImpOpBase + 0, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x9820111402fULL },  // Inst #2058 = PS_storerbnewabs
4970
    { 2057, 2,  0,  4,  165,  0,  0,  HexagonImpOpBase + 0, 595,  0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Predicable), 0x9020108002fULL },  // Inst #2057 = PS_storerbabs
4971
    { 2056, 2,  1,  4,  147,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x11062300802fULL },  // Inst #2056 = PS_loadruhabs
4972
    { 2055, 2,  1,  4,  147,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x9020300802fULL },  // Inst #2055 = PS_loadrubabs
4973
    { 2054, 2,  1,  4,  147,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x190a4300802fULL },  // Inst #2054 = PS_loadriabs
4974
    { 2053, 2,  1,  4,  147,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x11062300802fULL },  // Inst #2053 = PS_loadrhabs
4975
    { 2052, 2,  1,  4,  147,  0,  0,  HexagonImpOpBase + 0, 155,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x210e6300002fULL },  // Inst #2052 = PS_loadrdabs
4976
    { 2051, 2,  1,  4,  147,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x9020300802fULL },  // Inst #2051 = PS_loadrbabs
4977
    { 2050, 2,  0,  4,  124,  0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x801000001423ULL },  // Inst #2050 = PS_jmprettnewpt
4978
    { 2049, 2,  0,  4,  124,  0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x1000001423ULL },  // Inst #2049 = PS_jmprettnew
4979
    { 2048, 2,  0,  4,  16, 0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x1000000423ULL },  // Inst #2048 = PS_jmprett
4980
    { 2047, 2,  0,  4,  124,  0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x801000001c23ULL },  // Inst #2047 = PS_jmpretfnewpt
4981
    { 2046, 2,  0,  4,  124,  0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x1000001c23ULL },  // Inst #2046 = PS_jmpretfnew
4982
    { 2045, 2,  0,  4,  16, 0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x1000000c23ULL },  // Inst #2045 = PS_jmpretf
4983
    { 2044, 1,  0,  4,  40, 0,  1,  HexagonImpOpBase + 55,  260,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x1000000023ULL },  // Inst #2044 = PS_jmpret
4984
    { 2043, 1,  0,  4,  118,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x1000000823ULL },  // Inst #2043 = PS_callr_nr
4985
    { 2042, 1,  0,  4,  35, 0,  5,  HexagonImpOpBase + 105, 0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb10800023ULL },  // Inst #2042 = PS_call_stk
4986
    { 2041, 3,  1,  4,  33, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #2041 = M7_wcmpyrwc_rnd
4987
    { 2040, 3,  1,  4,  33, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #2040 = M7_wcmpyrwc
4988
    { 2039, 3,  1,  4,  33, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #2039 = M7_wcmpyrw_rnd
4989
    { 2038, 3,  1,  4,  33, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #2038 = M7_wcmpyrw
4990
    { 2037, 3,  1,  4,  33, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #2037 = M7_wcmpyiwc_rnd
4991
    { 2036, 3,  1,  4,  33, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #2036 = M7_wcmpyiwc
4992
    { 2035, 3,  1,  4,  33, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #2035 = M7_wcmpyiw_rnd
4993
    { 2034, 3,  1,  4,  33, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #2034 = M7_wcmpyiw
4994
    { 2033, 4,  1,  4,  34, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #2033 = M7_dcmpyrwc_acc
4995
    { 2032, 3,  1,  4,  33, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2032 = M7_dcmpyrwc
4996
    { 2031, 4,  1,  4,  34, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #2031 = M7_dcmpyrw_acc
4997
    { 2030, 3,  1,  4,  33, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2030 = M7_dcmpyrw
4998
    { 2029, 4,  1,  4,  34, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #2029 = M7_dcmpyiwc_acc
4999
    { 2028, 3,  1,  4,  33, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2028 = M7_dcmpyiwc
5000
    { 2027, 4,  1,  4,  34, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #2027 = M7_dcmpyiw_acc
5001
    { 2026, 3,  1,  4,  33, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2026 = M7_dcmpyiw
5002
    { 2025, 3,  1,  4,  96, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2025 = M6_vabsdiffub
5003
    { 2024, 3,  1,  4,  96, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2024 = M6_vabsdiffb
5004
    { 2023, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2023 = M5_vrmpybuu
5005
    { 2022, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2022 = M5_vrmpybsu
5006
    { 2021, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #2021 = M5_vrmacbuu
5007
    { 2020, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #2020 = M5_vrmacbsu
5008
    { 2019, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #2019 = M5_vmpybuu
5009
    { 2018, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #2018 = M5_vmpybsu
5010
    { 2017, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #2017 = M5_vmacbuu
5011
    { 2016, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #2016 = M5_vmacbsu
5012
    { 2015, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #2015 = M5_vdmpybsu
5013
    { 2014, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #2014 = M5_vdmacbsu
5014
    { 2013, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 203,  0, 0x8000000000002cULL },  // Inst #2013 = M4_xor_xacc
5015
    { 2012, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #2012 = M4_xor_or
5016
    { 2011, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #2011 = M4_xor_andn
5017
    { 2010, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #2010 = M4_xor_and
5018
    { 2009, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2009 = M4_vrmpyoh_s1
5019
    { 2008, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2008 = M4_vrmpyoh_s0
5020
    { 2007, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #2007 = M4_vrmpyoh_acc_s1
5021
    { 2006, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #2006 = M4_vrmpyoh_acc_s0
5022
    { 2005, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2005 = M4_vrmpyeh_s1
5023
    { 2004, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #2004 = M4_vrmpyeh_s0
5024
    { 2003, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #2003 = M4_vrmpyeh_acc_s1
5025
    { 2002, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #2002 = M4_vrmpyeh_acc_s0
5026
    { 2001, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #2001 = M4_vpmpyh_acc
5027
    { 2000, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #2000 = M4_vpmpyh
5028
    { 1999, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1999 = M4_pmpyw_acc
5029
    { 1998, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1998 = M4_pmpyw
5030
    { 1997, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1997 = M4_or_xor
5031
    { 1996, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1996 = M4_or_or
5032
    { 1995, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1995 = M4_or_andn
5033
    { 1994, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1994 = M4_or_and
5034
    { 1993, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1993 = M4_nac_up_s1_sat
5035
    { 1992, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 722,  0, 0x80000000008025ULL },  // Inst #1992 = M4_mpyrr_addr
5036
    { 1991, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 718,  0, 0x800000c2808003ULL },  // Inst #1991 = M4_mpyrr_addi
5037
    { 1990, 4,  1,  4,  164,  0,  0,  HexagonImpOpBase + 0, 714,  0, 0x80000000008003ULL },  // Inst #1990 = M4_mpyri_addr_u2
5038
    { 1989, 4,  1,  4,  162,  0,  0,  HexagonImpOpBase + 0, 207,  0, 0x800000c6808003ULL },  // Inst #1989 = M4_mpyri_addr
5039
    { 1988, 4,  1,  4,  162,  0,  0,  HexagonImpOpBase + 0, 710,  0, 0x800000c2808003ULL },  // Inst #1988 = M4_mpyri_addi
5040
    { 1987, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1987 = M4_mac_up_s1_sat
5041
    { 1986, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  200,  0, 0x8000000000802cULL },  // Inst #1986 = M4_cmpyr_whc
5042
    { 1985, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  200,  0, 0x8000000000802cULL },  // Inst #1985 = M4_cmpyr_wh
5043
    { 1984, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  200,  0, 0x8000000000802cULL },  // Inst #1984 = M4_cmpyi_whc
5044
    { 1983, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  200,  0, 0x8000000000802cULL },  // Inst #1983 = M4_cmpyi_wh
5045
    { 1982, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1982 = M4_and_xor
5046
    { 1981, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1981 = M4_and_or
5047
    { 1980, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1980 = M4_and_andn
5048
    { 1979, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1979 = M4_and_and
5049
    { 1978, 4,  1,  4,  163,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1978 = M2_xor_xacc
5050
    { 1977, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #1977 = M2_vrmpy_s0
5051
    { 1976, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #1976 = M2_vrmac_s0
5052
    { 1975, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #1975 = M2_vrcmpys_s1rp_l
5053
    { 1974, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #1974 = M2_vrcmpys_s1rp_h
5054
    { 1973, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1973 = M2_vrcmpys_s1_l
5055
    { 1972, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1972 = M2_vrcmpys_s1_h
5056
    { 1971, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1971 = M2_vrcmpys_acc_s1_l
5057
    { 1970, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1970 = M2_vrcmpys_acc_s1_h
5058
    { 1969, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #1969 = M2_vrcmpyr_s0c
5059
    { 1968, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #1968 = M2_vrcmpyr_s0
5060
    { 1967, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #1967 = M2_vrcmpyi_s0c
5061
    { 1966, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #1966 = M2_vrcmpyi_s0
5062
    { 1965, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #1965 = M2_vrcmacr_s0c
5063
    { 1964, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #1964 = M2_vrcmacr_s0
5064
    { 1963, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #1963 = M2_vrcmaci_s0c
5065
    { 1962, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #1962 = M2_vrcmaci_s0
5066
    { 1961, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 545,  0, 0x80000000008025ULL },  // Inst #1961 = M2_vradduh
5067
    { 1960, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 545,  0, 0x80000000008025ULL },  // Inst #1960 = M2_vraddh
5068
    { 1959, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  507,  0, 0x80000000000025ULL },  // Inst #1959 = M2_vmpy2su_s1
5069
    { 1958, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  507,  0, 0x80000000000025ULL },  // Inst #1958 = M2_vmpy2su_s0
5070
    { 1957, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1957 = M2_vmpy2s_s1pack
5071
    { 1956, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  507,  0, 0x80000000000025ULL },  // Inst #1956 = M2_vmpy2s_s1
5072
    { 1955, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1955 = M2_vmpy2s_s0pack
5073
    { 1954, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  507,  0, 0x80000000000025ULL },  // Inst #1954 = M2_vmpy2s_s0
5074
    { 1953, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1953 = M2_vmpy2es_s1
5075
    { 1952, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1952 = M2_vmpy2es_s0
5076
    { 1951, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1951 = M2_vmac2su_s1
5077
    { 1950, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1950 = M2_vmac2su_s0
5078
    { 1949, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1949 = M2_vmac2s_s1
5079
    { 1948, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1948 = M2_vmac2s_s0
5080
    { 1947, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1947 = M2_vmac2es_s1
5081
    { 1946, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1946 = M2_vmac2es_s0
5082
    { 1945, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #1945 = M2_vmac2es
5083
    { 1944, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1944 = M2_vmac2
5084
    { 1943, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1943 = M2_vdmpys_s1
5085
    { 1942, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1942 = M2_vdmpys_s0
5086
    { 1941, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #1941 = M2_vdmpyrs_s1
5087
    { 1940, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x80000000008025ULL },  // Inst #1940 = M2_vdmpyrs_s0
5088
    { 1939, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1939 = M2_vdmacs_s1
5089
    { 1938, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1938 = M2_vdmacs_s0
5090
    { 1937, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1937 = M2_vcmpy_s1_sat_r
5091
    { 1936, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1936 = M2_vcmpy_s1_sat_i
5092
    { 1935, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1935 = M2_vcmpy_s0_sat_r
5093
    { 1934, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1934 = M2_vcmpy_s0_sat_i
5094
    { 1933, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1933 = M2_vcmac_s0_sat_r
5095
    { 1932, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1932 = M2_vcmac_s0_sat_i
5096
    { 1931, 3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #1931 = M2_vabsdiffw
5097
    { 1930, 3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #1930 = M2_vabsdiffh
5098
    { 1929, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1929 = M2_subacc
5099
    { 1928, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x80000116808025ULL },  // Inst #1928 = M2_naccii
5100
    { 1927, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1927 = M2_nacci
5101
    { 1926, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1926 = M2_mpyud_nac_ll_s1
5102
    { 1925, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1925 = M2_mpyud_nac_ll_s0
5103
    { 1924, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1924 = M2_mpyud_nac_lh_s1
5104
    { 1923, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1923 = M2_mpyud_nac_lh_s0
5105
    { 1922, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1922 = M2_mpyud_nac_hl_s1
5106
    { 1921, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1921 = M2_mpyud_nac_hl_s0
5107
    { 1920, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1920 = M2_mpyud_nac_hh_s1
5108
    { 1919, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1919 = M2_mpyud_nac_hh_s0
5109
    { 1918, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1918 = M2_mpyud_ll_s1
5110
    { 1917, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1917 = M2_mpyud_ll_s0
5111
    { 1916, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1916 = M2_mpyud_lh_s1
5112
    { 1915, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1915 = M2_mpyud_lh_s0
5113
    { 1914, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1914 = M2_mpyud_hl_s1
5114
    { 1913, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1913 = M2_mpyud_hl_s0
5115
    { 1912, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1912 = M2_mpyud_hh_s1
5116
    { 1911, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1911 = M2_mpyud_hh_s0
5117
    { 1910, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1910 = M2_mpyud_acc_ll_s1
5118
    { 1909, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1909 = M2_mpyud_acc_ll_s0
5119
    { 1908, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1908 = M2_mpyud_acc_lh_s1
5120
    { 1907, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1907 = M2_mpyud_acc_lh_s0
5121
    { 1906, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1906 = M2_mpyud_acc_hl_s1
5122
    { 1905, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1905 = M2_mpyud_acc_hl_s0
5123
    { 1904, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1904 = M2_mpyud_acc_hh_s1
5124
    { 1903, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1903 = M2_mpyud_acc_hh_s0
5125
    { 1902, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1902 = M2_mpyu_up
5126
    { 1901, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1901 = M2_mpyu_nac_ll_s1
5127
    { 1900, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1900 = M2_mpyu_nac_ll_s0
5128
    { 1899, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1899 = M2_mpyu_nac_lh_s1
5129
    { 1898, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1898 = M2_mpyu_nac_lh_s0
5130
    { 1897, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1897 = M2_mpyu_nac_hl_s1
5131
    { 1896, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1896 = M2_mpyu_nac_hl_s0
5132
    { 1895, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1895 = M2_mpyu_nac_hh_s1
5133
    { 1894, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1894 = M2_mpyu_nac_hh_s0
5134
    { 1893, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1893 = M2_mpyu_ll_s1
5135
    { 1892, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1892 = M2_mpyu_ll_s0
5136
    { 1891, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1891 = M2_mpyu_lh_s1
5137
    { 1890, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1890 = M2_mpyu_lh_s0
5138
    { 1889, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1889 = M2_mpyu_hl_s1
5139
    { 1888, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1888 = M2_mpyu_hl_s0
5140
    { 1887, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1887 = M2_mpyu_hh_s1
5141
    { 1886, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1886 = M2_mpyu_hh_s0
5142
    { 1885, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1885 = M2_mpyu_acc_ll_s1
5143
    { 1884, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1884 = M2_mpyu_acc_ll_s0
5144
    { 1883, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1883 = M2_mpyu_acc_lh_s1
5145
    { 1882, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1882 = M2_mpyu_acc_lh_s0
5146
    { 1881, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1881 = M2_mpyu_acc_hl_s1
5147
    { 1880, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1880 = M2_mpyu_acc_hl_s0
5148
    { 1879, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1879 = M2_mpyu_acc_hh_s1
5149
    { 1878, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1878 = M2_mpyu_acc_hh_s0
5150
    { 1877, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1877 = M2_mpysu_up
5151
    { 1876, 3,  1,  4,  30, 0,  0,  HexagonImpOpBase + 0, 187,  0, 0x80000104808025ULL },  // Inst #1876 = M2_mpysip
5152
    { 1875, 3,  1,  4,  30, 0,  0,  HexagonImpOpBase + 0, 187,  0, 0x80000000008025ULL },  // Inst #1875 = M2_mpysin
5153
    { 1874, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1874 = M2_mpyi
5154
    { 1873, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1873 = M2_mpyd_rnd_ll_s1
5155
    { 1872, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1872 = M2_mpyd_rnd_ll_s0
5156
    { 1871, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1871 = M2_mpyd_rnd_lh_s1
5157
    { 1870, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1870 = M2_mpyd_rnd_lh_s0
5158
    { 1869, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1869 = M2_mpyd_rnd_hl_s1
5159
    { 1868, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1868 = M2_mpyd_rnd_hl_s0
5160
    { 1867, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1867 = M2_mpyd_rnd_hh_s1
5161
    { 1866, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1866 = M2_mpyd_rnd_hh_s0
5162
    { 1865, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1865 = M2_mpyd_nac_ll_s1
5163
    { 1864, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1864 = M2_mpyd_nac_ll_s0
5164
    { 1863, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1863 = M2_mpyd_nac_lh_s1
5165
    { 1862, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1862 = M2_mpyd_nac_lh_s0
5166
    { 1861, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1861 = M2_mpyd_nac_hl_s1
5167
    { 1860, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1860 = M2_mpyd_nac_hl_s0
5168
    { 1859, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1859 = M2_mpyd_nac_hh_s1
5169
    { 1858, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1858 = M2_mpyd_nac_hh_s0
5170
    { 1857, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1857 = M2_mpyd_ll_s1
5171
    { 1856, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1856 = M2_mpyd_ll_s0
5172
    { 1855, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1855 = M2_mpyd_lh_s1
5173
    { 1854, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1854 = M2_mpyd_lh_s0
5174
    { 1853, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1853 = M2_mpyd_hl_s1
5175
    { 1852, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1852 = M2_mpyd_hl_s0
5176
    { 1851, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1851 = M2_mpyd_hh_s1
5177
    { 1850, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1850 = M2_mpyd_hh_s0
5178
    { 1849, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1849 = M2_mpyd_acc_ll_s1
5179
    { 1848, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1848 = M2_mpyd_acc_ll_s0
5180
    { 1847, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1847 = M2_mpyd_acc_lh_s1
5181
    { 1846, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1846 = M2_mpyd_acc_lh_s0
5182
    { 1845, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1845 = M2_mpyd_acc_hl_s1
5183
    { 1844, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1844 = M2_mpyd_acc_hl_s0
5184
    { 1843, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1843 = M2_mpyd_acc_hh_s1
5185
    { 1842, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1842 = M2_mpyd_acc_hh_s0
5186
    { 1841, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1841 = M2_mpy_up_s1_sat
5187
    { 1840, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1840 = M2_mpy_up_s1
5188
    { 1839, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1839 = M2_mpy_up
5189
    { 1838, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1838 = M2_mpy_sat_rnd_ll_s1
5190
    { 1837, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1837 = M2_mpy_sat_rnd_ll_s0
5191
    { 1836, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1836 = M2_mpy_sat_rnd_lh_s1
5192
    { 1835, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1835 = M2_mpy_sat_rnd_lh_s0
5193
    { 1834, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1834 = M2_mpy_sat_rnd_hl_s1
5194
    { 1833, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1833 = M2_mpy_sat_rnd_hl_s0
5195
    { 1832, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1832 = M2_mpy_sat_rnd_hh_s1
5196
    { 1831, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1831 = M2_mpy_sat_rnd_hh_s0
5197
    { 1830, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1830 = M2_mpy_sat_ll_s1
5198
    { 1829, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1829 = M2_mpy_sat_ll_s0
5199
    { 1828, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1828 = M2_mpy_sat_lh_s1
5200
    { 1827, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1827 = M2_mpy_sat_lh_s0
5201
    { 1826, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1826 = M2_mpy_sat_hl_s1
5202
    { 1825, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1825 = M2_mpy_sat_hl_s0
5203
    { 1824, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1824 = M2_mpy_sat_hh_s1
5204
    { 1823, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1823 = M2_mpy_sat_hh_s0
5205
    { 1822, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1822 = M2_mpy_rnd_ll_s1
5206
    { 1821, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1821 = M2_mpy_rnd_ll_s0
5207
    { 1820, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1820 = M2_mpy_rnd_lh_s1
5208
    { 1819, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1819 = M2_mpy_rnd_lh_s0
5209
    { 1818, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1818 = M2_mpy_rnd_hl_s1
5210
    { 1817, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1817 = M2_mpy_rnd_hl_s0
5211
    { 1816, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1816 = M2_mpy_rnd_hh_s1
5212
    { 1815, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1815 = M2_mpy_rnd_hh_s0
5213
    { 1814, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1814 = M2_mpy_nac_sat_ll_s1
5214
    { 1813, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1813 = M2_mpy_nac_sat_ll_s0
5215
    { 1812, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1812 = M2_mpy_nac_sat_lh_s1
5216
    { 1811, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1811 = M2_mpy_nac_sat_lh_s0
5217
    { 1810, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1810 = M2_mpy_nac_sat_hl_s1
5218
    { 1809, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1809 = M2_mpy_nac_sat_hl_s0
5219
    { 1808, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1808 = M2_mpy_nac_sat_hh_s1
5220
    { 1807, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1807 = M2_mpy_nac_sat_hh_s0
5221
    { 1806, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1806 = M2_mpy_nac_ll_s1
5222
    { 1805, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1805 = M2_mpy_nac_ll_s0
5223
    { 1804, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1804 = M2_mpy_nac_lh_s1
5224
    { 1803, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1803 = M2_mpy_nac_lh_s0
5225
    { 1802, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1802 = M2_mpy_nac_hl_s1
5226
    { 1801, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1801 = M2_mpy_nac_hl_s0
5227
    { 1800, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1800 = M2_mpy_nac_hh_s1
5228
    { 1799, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1799 = M2_mpy_nac_hh_s0
5229
    { 1798, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1798 = M2_mpy_ll_s1
5230
    { 1797, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1797 = M2_mpy_ll_s0
5231
    { 1796, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1796 = M2_mpy_lh_s1
5232
    { 1795, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1795 = M2_mpy_lh_s0
5233
    { 1794, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1794 = M2_mpy_hl_s1
5234
    { 1793, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1793 = M2_mpy_hl_s0
5235
    { 1792, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1792 = M2_mpy_hh_s1
5236
    { 1791, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1791 = M2_mpy_hh_s0
5237
    { 1790, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1790 = M2_mpy_acc_sat_ll_s1
5238
    { 1789, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1789 = M2_mpy_acc_sat_ll_s0
5239
    { 1788, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1788 = M2_mpy_acc_sat_lh_s1
5240
    { 1787, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1787 = M2_mpy_acc_sat_lh_s0
5241
    { 1786, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1786 = M2_mpy_acc_sat_hl_s1
5242
    { 1785, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1785 = M2_mpy_acc_sat_hl_s0
5243
    { 1784, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1784 = M2_mpy_acc_sat_hh_s1
5244
    { 1783, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  578,  0, 0x80000000008025ULL },  // Inst #1783 = M2_mpy_acc_sat_hh_s0
5245
    { 1782, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1782 = M2_mpy_acc_ll_s1
5246
    { 1781, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1781 = M2_mpy_acc_ll_s0
5247
    { 1780, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1780 = M2_mpy_acc_lh_s1
5248
    { 1779, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1779 = M2_mpy_acc_lh_s0
5249
    { 1778, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1778 = M2_mpy_acc_hl_s1
5250
    { 1777, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1777 = M2_mpy_acc_hl_s0
5251
    { 1776, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1776 = M2_mpy_acc_hh_s1
5252
    { 1775, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1775 = M2_mpy_acc_hh_s0
5253
    { 1774, 4,  1,  4,  107,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1774 = M2_mnaci
5254
    { 1773, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1773 = M2_mmpyul_s1
5255
    { 1772, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1772 = M2_mmpyul_s0
5256
    { 1771, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1771 = M2_mmpyul_rs1
5257
    { 1770, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1770 = M2_mmpyul_rs0
5258
    { 1769, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1769 = M2_mmpyuh_s1
5259
    { 1768, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1768 = M2_mmpyuh_s0
5260
    { 1767, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1767 = M2_mmpyuh_rs1
5261
    { 1766, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1766 = M2_mmpyuh_rs0
5262
    { 1765, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1765 = M2_mmpyl_s1
5263
    { 1764, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1764 = M2_mmpyl_s0
5264
    { 1763, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1763 = M2_mmpyl_rs1
5265
    { 1762, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1762 = M2_mmpyl_rs0
5266
    { 1761, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1761 = M2_mmpyh_s1
5267
    { 1760, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1760 = M2_mmpyh_s0
5268
    { 1759, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1759 = M2_mmpyh_rs1
5269
    { 1758, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000025ULL },  // Inst #1758 = M2_mmpyh_rs0
5270
    { 1757, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1757 = M2_mmaculs_s1
5271
    { 1756, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1756 = M2_mmaculs_s0
5272
    { 1755, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1755 = M2_mmaculs_rs1
5273
    { 1754, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1754 = M2_mmaculs_rs0
5274
    { 1753, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1753 = M2_mmacuhs_s1
5275
    { 1752, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1752 = M2_mmacuhs_s0
5276
    { 1751, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1751 = M2_mmacuhs_rs1
5277
    { 1750, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1750 = M2_mmacuhs_rs0
5278
    { 1749, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1749 = M2_mmacls_s1
5279
    { 1748, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1748 = M2_mmacls_s0
5280
    { 1747, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1747 = M2_mmacls_rs1
5281
    { 1746, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1746 = M2_mmacls_rs0
5282
    { 1745, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1745 = M2_mmachs_s1
5283
    { 1744, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1744 = M2_mmachs_s0
5284
    { 1743, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1743 = M2_mmachs_rs1
5285
    { 1742, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  203,  0, 0x80000000000025ULL },  // Inst #1742 = M2_mmachs_rs0
5286
    { 1741, 4,  1,  4,  162,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x80000106808025ULL },  // Inst #1741 = M2_macsip
5287
    { 1740, 4,  1,  4,  162,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x80000106808025ULL },  // Inst #1740 = M2_macsin
5288
    { 1739, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1739 = M2_maci
5289
    { 1738, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1738 = M2_hmmpyl_s1
5290
    { 1737, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1737 = M2_hmmpyl_rs1
5291
    { 1736, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1736 = M2_hmmpyh_s1
5292
    { 1735, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1735 = M2_hmmpyh_rs1
5293
    { 1734, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1734 = M2_dpmpyuu_s0
5294
    { 1733, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1733 = M2_dpmpyuu_nac_s0
5295
    { 1732, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1732 = M2_dpmpyuu_acc_s0
5296
    { 1731, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1731 = M2_dpmpyss_s0
5297
    { 1730, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008025ULL },  // Inst #1730 = M2_dpmpyss_rnd_s0
5298
    { 1729, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1729 = M2_dpmpyss_nac_s0
5299
    { 1728, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1728 = M2_dpmpyss_acc_s0
5300
    { 1727, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1727 = M2_cnacsc_s1
5301
    { 1726, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1726 = M2_cnacsc_s0
5302
    { 1725, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1725 = M2_cnacs_s1
5303
    { 1724, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1724 = M2_cnacs_s0
5304
    { 1723, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  507,  0, 0x80000000000025ULL },  // Inst #1723 = M2_cmpysc_s1
5305
    { 1722, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  507,  0, 0x80000000000025ULL },  // Inst #1722 = M2_cmpysc_s0
5306
    { 1721, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  507,  0, 0x80000000000025ULL },  // Inst #1721 = M2_cmpys_s1
5307
    { 1720, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  507,  0, 0x80000000000025ULL },  // Inst #1720 = M2_cmpys_s0
5308
    { 1719, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1719 = M2_cmpyrsc_s1
5309
    { 1718, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1718 = M2_cmpyrsc_s0
5310
    { 1717, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1717 = M2_cmpyrs_s1
5311
    { 1716, 3,  1,  4,  31, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008025ULL },  // Inst #1716 = M2_cmpyrs_s0
5312
    { 1715, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1715 = M2_cmpyr_s0
5313
    { 1714, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000025ULL },  // Inst #1714 = M2_cmpyi_s0
5314
    { 1713, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1713 = M2_cmacsc_s1
5315
    { 1712, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1712 = M2_cmacsc_s0
5316
    { 1711, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1711 = M2_cmacs_s1
5317
    { 1710, 4,  1,  4,  32, 0,  1,  HexagonImpOpBase + 63,  706,  0, 0x80000000000025ULL },  // Inst #1710 = M2_cmacs_s0
5318
    { 1709, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1709 = M2_cmacr_s0
5319
    { 1708, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 706,  0, 0x80000000000025ULL },  // Inst #1708 = M2_cmaci_s0
5320
    { 1707, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 702,  0, 0x80000116808025ULL },  // Inst #1707 = M2_accii
5321
    { 1706, 4,  1,  4,  161,  0,  0,  HexagonImpOpBase + 0, 578,  0, 0x80000000008025ULL },  // Inst #1706 = M2_acci
5322
    { 1705, 2,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable), 0x8000ULL },  // Inst #1705 = LO
5323
    { 1704, 3,  0,  4,  160,  0,  0,  HexagonImpOpBase + 0, 699,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xa4ULL },  // Inst #1704 = L6_memcpy
5324
    { 1703, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1b8902800030ULL },  // Inst #1703 = L4_sub_memopw_io
5325
    { 1702, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1384e2800030ULL },  // Inst #1702 = L4_sub_memoph_io
5326
    { 1701, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xb80c2800030ULL },  // Inst #1701 = L4_sub_memopb_io
5327
    { 1700, 3,  1,  4,  24, 1,  2,  HexagonImpOpBase + 102, 180,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xa09000001424ULL },  // Inst #1700 = L4_return_tnew_pt
5328
    { 1699, 3,  1,  4,  24, 1,  2,  HexagonImpOpBase + 102, 180,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x209000001424ULL },  // Inst #1699 = L4_return_tnew_pnt
5329
    { 1698, 3,  1,  4,  23, 1,  2,  HexagonImpOpBase + 102, 180,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xa09000000424ULL },  // Inst #1698 = L4_return_t
5330
    { 1697, 3,  1,  4,  24, 1,  2,  HexagonImpOpBase + 102, 180,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xa09000001c24ULL },  // Inst #1697 = L4_return_fnew_pt
5331
    { 1696, 3,  1,  4,  24, 1,  2,  HexagonImpOpBase + 102, 180,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x209000001c24ULL },  // Inst #1696 = L4_return_fnew_pnt
5332
    { 1695, 3,  1,  4,  23, 1,  2,  HexagonImpOpBase + 102, 180,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0xa09000000c24ULL },  // Inst #1695 = L4_return_f
5333
    { 1694, 2,  1,  4,  28, 1,  2,  HexagonImpOpBase + 102, 178,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0xa09000000024ULL },  // Inst #1694 = L4_return
5334
    { 1693, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x150000009424ULL },  // Inst #1693 = L4_ploadruhtnew_rr
5335
    { 1692, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1100c5809424ULL },  // Inst #1692 = L4_ploadruhtnew_abs
5336
    { 1691, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x150000008424ULL },  // Inst #1691 = L4_ploadruht_rr
5337
    { 1690, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1100c5808424ULL },  // Inst #1690 = L4_ploadruht_abs
5338
    { 1689, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x150000009c24ULL },  // Inst #1689 = L4_ploadruhfnew_rr
5339
    { 1688, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1100c5809c24ULL },  // Inst #1688 = L4_ploadruhfnew_abs
5340
    { 1687, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x150000008c24ULL },  // Inst #1687 = L4_ploadruhf_rr
5341
    { 1686, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1100c5808c24ULL },  // Inst #1686 = L4_ploadruhf_abs
5342
    { 1685, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0xd0000009424ULL },  // Inst #1685 = L4_ploadrubtnew_rr
5343
    { 1684, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x900c5809424ULL },  // Inst #1684 = L4_ploadrubtnew_abs
5344
    { 1683, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0xd0000008424ULL },  // Inst #1683 = L4_ploadrubt_rr
5345
    { 1682, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x900c5808424ULL },  // Inst #1682 = L4_ploadrubt_abs
5346
    { 1681, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0xd0000009c24ULL },  // Inst #1681 = L4_ploadrubfnew_rr
5347
    { 1680, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x900c5809c24ULL },  // Inst #1680 = L4_ploadrubfnew_abs
5348
    { 1679, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0xd0000008c24ULL },  // Inst #1679 = L4_ploadrubf_rr
5349
    { 1678, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x900c5808c24ULL },  // Inst #1678 = L4_ploadrubf_abs
5350
    { 1677, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x1d0000009424ULL },  // Inst #1677 = L4_ploadritnew_rr
5351
    { 1676, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1900c5809424ULL },  // Inst #1676 = L4_ploadritnew_abs
5352
    { 1675, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x1d0000008424ULL },  // Inst #1675 = L4_ploadrit_rr
5353
    { 1674, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1900c5808424ULL },  // Inst #1674 = L4_ploadrit_abs
5354
    { 1673, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x1d0000009c24ULL },  // Inst #1673 = L4_ploadrifnew_rr
5355
    { 1672, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1900c5809c24ULL },  // Inst #1672 = L4_ploadrifnew_abs
5356
    { 1671, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x1d0000008c24ULL },  // Inst #1671 = L4_ploadrif_rr
5357
    { 1670, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1900c5808c24ULL },  // Inst #1670 = L4_ploadrif_abs
5358
    { 1669, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x150000009424ULL },  // Inst #1669 = L4_ploadrhtnew_rr
5359
    { 1668, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1100c5809424ULL },  // Inst #1668 = L4_ploadrhtnew_abs
5360
    { 1667, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x150000008424ULL },  // Inst #1667 = L4_ploadrht_rr
5361
    { 1666, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1100c5808424ULL },  // Inst #1666 = L4_ploadrht_abs
5362
    { 1665, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x150000009c24ULL },  // Inst #1665 = L4_ploadrhfnew_rr
5363
    { 1664, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1100c5809c24ULL },  // Inst #1664 = L4_ploadrhfnew_abs
5364
    { 1663, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0x150000008c24ULL },  // Inst #1663 = L4_ploadrhf_rr
5365
    { 1662, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x1100c5808c24ULL },  // Inst #1662 = L4_ploadrhf_abs
5366
    { 1661, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 694,  0|(1ULL<<MCID::MayLoad), 0x250000001424ULL },  // Inst #1661 = L4_ploadrdtnew_rr
5367
    { 1660, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 691,  0|(1ULL<<MCID::MayLoad), 0x2100c5801424ULL },  // Inst #1660 = L4_ploadrdtnew_abs
5368
    { 1659, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 694,  0|(1ULL<<MCID::MayLoad), 0x250000000424ULL },  // Inst #1659 = L4_ploadrdt_rr
5369
    { 1658, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 691,  0|(1ULL<<MCID::MayLoad), 0x2100c5800424ULL },  // Inst #1658 = L4_ploadrdt_abs
5370
    { 1657, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 694,  0|(1ULL<<MCID::MayLoad), 0x250000001c24ULL },  // Inst #1657 = L4_ploadrdfnew_rr
5371
    { 1656, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 691,  0|(1ULL<<MCID::MayLoad), 0x2100c5801c24ULL },  // Inst #1656 = L4_ploadrdfnew_abs
5372
    { 1655, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 694,  0|(1ULL<<MCID::MayLoad), 0x250000000c24ULL },  // Inst #1655 = L4_ploadrdf_rr
5373
    { 1654, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 691,  0|(1ULL<<MCID::MayLoad), 0x2100c5800c24ULL },  // Inst #1654 = L4_ploadrdf_abs
5374
    { 1653, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0xd0000009424ULL },  // Inst #1653 = L4_ploadrbtnew_rr
5375
    { 1652, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x900c5809424ULL },  // Inst #1652 = L4_ploadrbtnew_abs
5376
    { 1651, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0xd0000008424ULL },  // Inst #1651 = L4_ploadrbt_rr
5377
    { 1650, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x900c5808424ULL },  // Inst #1650 = L4_ploadrbt_abs
5378
    { 1649, 5,  1,  4,  159,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0xd0000009c24ULL },  // Inst #1649 = L4_ploadrbfnew_rr
5379
    { 1648, 3,  1,  4,  153,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x900c5809c24ULL },  // Inst #1648 = L4_ploadrbfnew_abs
5380
    { 1647, 5,  1,  4,  158,  0,  0,  HexagonImpOpBase + 0, 686,  0|(1ULL<<MCID::MayLoad), 0xd0000008c24ULL },  // Inst #1647 = L4_ploadrbf_rr
5381
    { 1646, 3,  1,  4,  157,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MayLoad), 0x900c5808c24ULL },  // Inst #1646 = L4_ploadrbf_abs
5382
    { 1645, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1b8902800030ULL },  // Inst #1645 = L4_or_memopw_io
5383
    { 1644, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1384e2800030ULL },  // Inst #1644 = L4_or_memoph_io
5384
    { 1643, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xb80c2800030ULL },  // Inst #1643 = L4_or_memopb_io
5385
    { 1642, 3,  1,  4,  156,  0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::MayLoad), 0x1800000080a4ULL },  // Inst #1642 = L4_loadw_phys
5386
    { 1641, 4,  1,  4,  154,  0,  0,  HexagonImpOpBase + 0, 674,  0|(1ULL<<MCID::MayLoad), 0x1400c7808024ULL },  // Inst #1641 = L4_loadruh_ur
5387
    { 1640, 4,  1,  4,  155,  0,  0,  HexagonImpOpBase + 0, 207,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x150000008024ULL },  // Inst #1640 = L4_loadruh_rr
5388
    { 1639, 3,  2,  4,  153,  0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad), 0x1200c5808024ULL },  // Inst #1639 = L4_loadruh_ap
5389
    { 1638, 4,  1,  4,  154,  0,  0,  HexagonImpOpBase + 0, 674,  0|(1ULL<<MCID::MayLoad), 0xc00c7808024ULL },  // Inst #1638 = L4_loadrub_ur
5390
    { 1637, 4,  1,  4,  155,  0,  0,  HexagonImpOpBase + 0, 207,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0xd0000008024ULL },  // Inst #1637 = L4_loadrub_rr
5391
    { 1636, 3,  2,  4,  153,  0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad), 0xa00c5808024ULL },  // Inst #1636 = L4_loadrub_ap
5392
    { 1635, 4,  1,  4,  154,  0,  0,  HexagonImpOpBase + 0, 674,  0|(1ULL<<MCID::MayLoad), 0x1c00c7808024ULL },  // Inst #1635 = L4_loadri_ur
5393
    { 1634, 4,  1,  4,  155,  0,  0,  HexagonImpOpBase + 0, 207,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x1d0000008024ULL },  // Inst #1634 = L4_loadri_rr
5394
    { 1633, 3,  2,  4,  153,  0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad), 0x1a00c5808024ULL },  // Inst #1633 = L4_loadri_ap
5395
    { 1632, 4,  1,  4,  154,  0,  0,  HexagonImpOpBase + 0, 674,  0|(1ULL<<MCID::MayLoad), 0x1400c7808024ULL },  // Inst #1632 = L4_loadrh_ur
5396
    { 1631, 4,  1,  4,  155,  0,  0,  HexagonImpOpBase + 0, 207,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x150000008024ULL },  // Inst #1631 = L4_loadrh_rr
5397
    { 1630, 3,  2,  4,  153,  0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad), 0x1200c5808024ULL },  // Inst #1630 = L4_loadrh_ap
5398
    { 1629, 4,  1,  4,  154,  0,  0,  HexagonImpOpBase + 0, 678,  0|(1ULL<<MCID::MayLoad), 0x2400c7800024ULL },  // Inst #1629 = L4_loadrd_ur
5399
    { 1628, 4,  1,  4,  155,  0,  0,  HexagonImpOpBase + 0, 682,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x250000000024ULL },  // Inst #1628 = L4_loadrd_rr
5400
    { 1627, 3,  2,  4,  153,  0,  0,  HexagonImpOpBase + 0, 489,  0|(1ULL<<MCID::MayLoad), 0x2200c5800024ULL },  // Inst #1627 = L4_loadrd_ap
5401
    { 1626, 4,  1,  4,  154,  0,  0,  HexagonImpOpBase + 0, 674,  0|(1ULL<<MCID::MayLoad), 0xc00c7808024ULL },  // Inst #1626 = L4_loadrb_ur
5402
    { 1625, 4,  1,  4,  155,  0,  0,  HexagonImpOpBase + 0, 207,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0xd0000008024ULL },  // Inst #1625 = L4_loadrb_rr
5403
    { 1624, 3,  2,  4,  153,  0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad), 0xa00c5808024ULL },  // Inst #1624 = L4_loadrb_ap
5404
    { 1623, 2,  1,  4,  149,  0,  0,  HexagonImpOpBase + 0, 178,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200000000124ULL },  // Inst #1623 = L4_loadd_locked
5405
    { 1622, 2,  1,  4,  148,  0,  0,  HexagonImpOpBase + 0, 178,  0|(1ULL<<MCID::MayLoad), 0x200000000024ULL },  // Inst #1622 = L4_loadd_aq
5406
    { 1621, 4,  1,  4,  154,  0,  0,  HexagonImpOpBase + 0, 678,  0|(1ULL<<MCID::MayLoad), 0x1c00c7800024ULL },  // Inst #1621 = L4_loadbzw4_ur
5407
    { 1620, 3,  2,  4,  153,  0,  0,  HexagonImpOpBase + 0, 489,  0|(1ULL<<MCID::MayLoad), 0x1a00c5800024ULL },  // Inst #1620 = L4_loadbzw4_ap
5408
    { 1619, 4,  1,  4,  154,  0,  0,  HexagonImpOpBase + 0, 674,  0|(1ULL<<MCID::MayLoad), 0x1400c7808024ULL },  // Inst #1619 = L4_loadbzw2_ur
5409
    { 1618, 3,  2,  4,  153,  0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad), 0x1200c5808024ULL },  // Inst #1618 = L4_loadbzw2_ap
5410
    { 1617, 4,  1,  4,  154,  0,  0,  HexagonImpOpBase + 0, 678,  0|(1ULL<<MCID::MayLoad), 0x1c00c7800024ULL },  // Inst #1617 = L4_loadbsw4_ur
5411
    { 1616, 3,  2,  4,  153,  0,  0,  HexagonImpOpBase + 0, 489,  0|(1ULL<<MCID::MayLoad), 0x1a00c5800024ULL },  // Inst #1616 = L4_loadbsw4_ap
5412
    { 1615, 4,  1,  4,  154,  0,  0,  HexagonImpOpBase + 0, 674,  0|(1ULL<<MCID::MayLoad), 0x1400c7808024ULL },  // Inst #1615 = L4_loadbsw2_ur
5413
    { 1614, 3,  2,  4,  153,  0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad), 0x1200c5808024ULL },  // Inst #1614 = L4_loadbsw2_ap
5414
    { 1613, 5,  1,  4,  152,  0,  0,  HexagonImpOpBase + 0, 669,  0|(1ULL<<MCID::MayLoad), 0x1400c9800024ULL },  // Inst #1613 = L4_loadalignh_ur
5415
    { 1612, 4,  2,  4,  151,  0,  0,  HexagonImpOpBase + 0, 665,  0|(1ULL<<MCID::MayLoad), 0x1200c7800024ULL },  // Inst #1612 = L4_loadalignh_ap
5416
    { 1611, 5,  1,  4,  152,  0,  0,  HexagonImpOpBase + 0, 669,  0|(1ULL<<MCID::MayLoad), 0xc00c9800024ULL },  // Inst #1611 = L4_loadalignb_ur
5417
    { 1610, 4,  2,  4,  151,  0,  0,  HexagonImpOpBase + 0, 665,  0|(1ULL<<MCID::MayLoad), 0xa00c7800024ULL },  // Inst #1610 = L4_loadalignb_ap
5418
    { 1609, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1b8902800030ULL },  // Inst #1609 = L4_isub_memopw_io
5419
    { 1608, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1384e2800030ULL },  // Inst #1608 = L4_isub_memoph_io
5420
    { 1607, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xb80c2800030ULL },  // Inst #1607 = L4_isub_memopb_io
5421
    { 1606, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1b8902800030ULL },  // Inst #1606 = L4_ior_memopw_io
5422
    { 1605, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1384e2800030ULL },  // Inst #1605 = L4_ior_memoph_io
5423
    { 1604, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xb80c2800030ULL },  // Inst #1604 = L4_ior_memopb_io
5424
    { 1603, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1b8902800030ULL },  // Inst #1603 = L4_iand_memopw_io
5425
    { 1602, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1384e2800030ULL },  // Inst #1602 = L4_iand_memoph_io
5426
    { 1601, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xb80c2800030ULL },  // Inst #1601 = L4_iand_memopb_io
5427
    { 1600, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1b8902800030ULL },  // Inst #1600 = L4_iadd_memopw_io
5428
    { 1599, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1384e2800030ULL },  // Inst #1599 = L4_iadd_memoph_io
5429
    { 1598, 3,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xb80c2800030ULL },  // Inst #1598 = L4_iadd_memopb_io
5430
    { 1597, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1b8902800030ULL },  // Inst #1597 = L4_and_memopw_io
5431
    { 1596, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1384e2800030ULL },  // Inst #1596 = L4_and_memoph_io
5432
    { 1595, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xb80c2800030ULL },  // Inst #1595 = L4_and_memopb_io
5433
    { 1594, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1b8902800030ULL },  // Inst #1594 = L4_add_memopw_io
5434
    { 1593, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1384e2800030ULL },  // Inst #1593 = L4_add_memoph_io
5435
    { 1592, 3,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xb80c2800030ULL },  // Inst #1592 = L4_add_memopb_io
5436
    { 1591, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x160000009424ULL },  // Inst #1591 = L2_ploadruhtnew_pi
5437
    { 1590, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1304e680942fULL },  // Inst #1590 = L2_ploadruhtnew_io
5438
    { 1589, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x160000008424ULL },  // Inst #1589 = L2_ploadruht_pi
5439
    { 1588, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1304e680842fULL },  // Inst #1588 = L2_ploadruht_io
5440
    { 1587, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x160000009c24ULL },  // Inst #1587 = L2_ploadruhfnew_pi
5441
    { 1586, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1304e6809c2fULL },  // Inst #1586 = L2_ploadruhfnew_io
5442
    { 1585, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x160000008c24ULL },  // Inst #1585 = L2_ploadruhf_pi
5443
    { 1584, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1304e6808c2fULL },  // Inst #1584 = L2_ploadruhf_io
5444
    { 1583, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0xe0000009424ULL },  // Inst #1583 = L2_ploadrubtnew_pi
5445
    { 1582, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0xb00c680942fULL },  // Inst #1582 = L2_ploadrubtnew_io
5446
    { 1581, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0xe0000008424ULL },  // Inst #1581 = L2_ploadrubt_pi
5447
    { 1580, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0xb00c680842fULL },  // Inst #1580 = L2_ploadrubt_io
5448
    { 1579, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0xe0000009c24ULL },  // Inst #1579 = L2_ploadrubfnew_pi
5449
    { 1578, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0xb00c6809c2fULL },  // Inst #1578 = L2_ploadrubfnew_io
5450
    { 1577, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0xe0000008c24ULL },  // Inst #1577 = L2_ploadrubf_pi
5451
    { 1576, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0xb00c6808c2fULL },  // Inst #1576 = L2_ploadrubf_io
5452
    { 1575, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x1e0000009424ULL },  // Inst #1575 = L2_ploadritnew_pi
5453
    { 1574, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1b090680942fULL },  // Inst #1574 = L2_ploadritnew_io
5454
    { 1573, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x1e0000008424ULL },  // Inst #1573 = L2_ploadrit_pi
5455
    { 1572, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1b090680842fULL },  // Inst #1572 = L2_ploadrit_io
5456
    { 1571, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x1e0000009c24ULL },  // Inst #1571 = L2_ploadrifnew_pi
5457
    { 1570, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1b0906809c2fULL },  // Inst #1570 = L2_ploadrifnew_io
5458
    { 1569, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x1e0000008c24ULL },  // Inst #1569 = L2_ploadrif_pi
5459
    { 1568, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1b0906808c2fULL },  // Inst #1568 = L2_ploadrif_io
5460
    { 1567, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x160000009424ULL },  // Inst #1567 = L2_ploadrhtnew_pi
5461
    { 1566, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1304e680942fULL },  // Inst #1566 = L2_ploadrhtnew_io
5462
    { 1565, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x160000008424ULL },  // Inst #1565 = L2_ploadrht_pi
5463
    { 1564, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1304e680842fULL },  // Inst #1564 = L2_ploadrht_io
5464
    { 1563, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x160000009c24ULL },  // Inst #1563 = L2_ploadrhfnew_pi
5465
    { 1562, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1304e6809c2fULL },  // Inst #1562 = L2_ploadrhfnew_io
5466
    { 1561, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0x160000008c24ULL },  // Inst #1561 = L2_ploadrhf_pi
5467
    { 1560, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0x1304e6808c2fULL },  // Inst #1560 = L2_ploadrhf_io
5468
    { 1559, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 660,  0|(1ULL<<MCID::MayLoad), 0x260000001424ULL },  // Inst #1559 = L2_ploadrdtnew_pi
5469
    { 1558, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 656,  0|(1ULL<<MCID::MayLoad), 0x230d2680142fULL },  // Inst #1558 = L2_ploadrdtnew_io
5470
    { 1557, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 660,  0|(1ULL<<MCID::MayLoad), 0x260000000424ULL },  // Inst #1557 = L2_ploadrdt_pi
5471
    { 1556, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 656,  0|(1ULL<<MCID::MayLoad), 0x230d2680042fULL },  // Inst #1556 = L2_ploadrdt_io
5472
    { 1555, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 660,  0|(1ULL<<MCID::MayLoad), 0x260000001c24ULL },  // Inst #1555 = L2_ploadrdfnew_pi
5473
    { 1554, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 656,  0|(1ULL<<MCID::MayLoad), 0x230d26801c2fULL },  // Inst #1554 = L2_ploadrdfnew_io
5474
    { 1553, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 660,  0|(1ULL<<MCID::MayLoad), 0x260000000c24ULL },  // Inst #1553 = L2_ploadrdf_pi
5475
    { 1552, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 656,  0|(1ULL<<MCID::MayLoad), 0x230d26800c2fULL },  // Inst #1552 = L2_ploadrdf_io
5476
    { 1551, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0xe0000009424ULL },  // Inst #1551 = L2_ploadrbtnew_pi
5477
    { 1550, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0xb00c680942fULL },  // Inst #1550 = L2_ploadrbtnew_io
5478
    { 1549, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0xe0000008424ULL },  // Inst #1549 = L2_ploadrbt_pi
5479
    { 1548, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0xb00c680842fULL },  // Inst #1548 = L2_ploadrbt_io
5480
    { 1547, 5,  2,  4,  150,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0xe0000009c24ULL },  // Inst #1547 = L2_ploadrbfnew_pi
5481
    { 1546, 4,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0xb00c6809c2fULL },  // Inst #1546 = L2_ploadrbfnew_io
5482
    { 1545, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 651,  0|(1ULL<<MCID::MayLoad), 0xe0000008c24ULL },  // Inst #1545 = L2_ploadrbf_pi
5483
    { 1544, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 514,  0|(1ULL<<MCID::MayLoad), 0xb00c6808c2fULL },  // Inst #1544 = L2_ploadrbf_io
5484
    { 1543, 2,  1,  4,  149,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x180000008124ULL },  // Inst #1543 = L2_loadw_locked
5485
    { 1542, 2,  1,  4,  148,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::MayLoad), 0x180000008024ULL },  // Inst #1542 = L2_loadw_aq
5486
    { 1541, 2,  1,  4,  147,  1,  0,  HexagonImpOpBase + 101, 143,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x10062200802fULL },  // Inst #1541 = L2_loadruhgp
5487
    { 1540, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1540 = L2_loadruh_pr
5488
    { 1539, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 634,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x160000008024ULL },  // Inst #1539 = L2_loadruh_pi
5489
    { 1538, 4,  2,  4,  20, 1,  0,  HexagonImpOpBase + 100, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1538 = L2_loadruh_pcr
5490
    { 1537, 5,  2,  4,  36, 1,  0,  HexagonImpOpBase + 100, 629,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1537 = L2_loadruh_pci
5491
    { 1536, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1536 = L2_loadruh_pbr
5492
    { 1535, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x130594808024ULL },  // Inst #1535 = L2_loadruh_io
5493
    { 1534, 2,  1,  4,  147,  1,  0,  HexagonImpOpBase + 101, 143,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x8020200802fULL },  // Inst #1534 = L2_loadrubgp
5494
    { 1533, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0xe0000008024ULL },  // Inst #1533 = L2_loadrub_pr
5495
    { 1532, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 634,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0xe0000008024ULL },  // Inst #1532 = L2_loadrub_pi
5496
    { 1531, 4,  2,  4,  20, 1,  0,  HexagonImpOpBase + 100, 625,  0|(1ULL<<MCID::MayLoad), 0xe0000008024ULL },  // Inst #1531 = L2_loadrub_pcr
5497
    { 1530, 5,  2,  4,  36, 1,  0,  HexagonImpOpBase + 100, 629,  0|(1ULL<<MCID::MayLoad), 0xe0000008024ULL },  // Inst #1530 = L2_loadrub_pci
5498
    { 1529, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0xe0000008024ULL },  // Inst #1529 = L2_loadrub_pbr
5499
    { 1528, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0xb0174808024ULL },  // Inst #1528 = L2_loadrub_io
5500
    { 1527, 2,  1,  4,  147,  1,  0,  HexagonImpOpBase + 101, 143,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x180a4200802fULL },  // Inst #1527 = L2_loadrigp
5501
    { 1526, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0x1e0000008024ULL },  // Inst #1526 = L2_loadri_pr
5502
    { 1525, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 634,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x1e0000008024ULL },  // Inst #1525 = L2_loadri_pi
5503
    { 1524, 4,  2,  4,  20, 1,  0,  HexagonImpOpBase + 100, 625,  0|(1ULL<<MCID::MayLoad), 0x1e0000008024ULL },  // Inst #1524 = L2_loadri_pcr
5504
    { 1523, 5,  2,  4,  36, 1,  0,  HexagonImpOpBase + 100, 629,  0|(1ULL<<MCID::MayLoad), 0x1e0000008024ULL },  // Inst #1523 = L2_loadri_pci
5505
    { 1522, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0x1e0000008024ULL },  // Inst #1522 = L2_loadri_pbr
5506
    { 1521, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x1b09b4808024ULL },  // Inst #1521 = L2_loadri_io
5507
    { 1520, 2,  1,  4,  147,  1,  0,  HexagonImpOpBase + 101, 143,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x10062200802fULL },  // Inst #1520 = L2_loadrhgp
5508
    { 1519, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1519 = L2_loadrh_pr
5509
    { 1518, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 634,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x160000008024ULL },  // Inst #1518 = L2_loadrh_pi
5510
    { 1517, 4,  2,  4,  20, 1,  0,  HexagonImpOpBase + 100, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1517 = L2_loadrh_pcr
5511
    { 1516, 5,  2,  4,  36, 1,  0,  HexagonImpOpBase + 100, 629,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1516 = L2_loadrh_pci
5512
    { 1515, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1515 = L2_loadrh_pbr
5513
    { 1514, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x130594808024ULL },  // Inst #1514 = L2_loadrh_io
5514
    { 1513, 2,  1,  4,  147,  1,  0,  HexagonImpOpBase + 101, 155,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x200e6200002fULL },  // Inst #1513 = L2_loadrdgp
5515
    { 1512, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 638,  0|(1ULL<<MCID::MayLoad), 0x260000000024ULL },  // Inst #1512 = L2_loadrd_pr
5516
    { 1511, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 647,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x260000000024ULL },  // Inst #1511 = L2_loadrd_pi
5517
    { 1510, 4,  2,  4,  20, 1,  0,  HexagonImpOpBase + 100, 638,  0|(1ULL<<MCID::MayLoad), 0x260000000024ULL },  // Inst #1510 = L2_loadrd_pcr
5518
    { 1509, 5,  2,  4,  36, 1,  0,  HexagonImpOpBase + 100, 642,  0|(1ULL<<MCID::MayLoad), 0x260000000024ULL },  // Inst #1509 = L2_loadrd_pci
5519
    { 1508, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 638,  0|(1ULL<<MCID::MayLoad), 0x260000000024ULL },  // Inst #1508 = L2_loadrd_pbr
5520
    { 1507, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 489,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x230dd4800024ULL },  // Inst #1507 = L2_loadrd_io
5521
    { 1506, 2,  1,  4,  147,  1,  0,  HexagonImpOpBase + 101, 143,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0x8020200802fULL },  // Inst #1506 = L2_loadrbgp
5522
    { 1505, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0xe0000008024ULL },  // Inst #1505 = L2_loadrb_pr
5523
    { 1504, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 634,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0xe0000008024ULL },  // Inst #1504 = L2_loadrb_pi
5524
    { 1503, 4,  2,  4,  20, 1,  0,  HexagonImpOpBase + 100, 625,  0|(1ULL<<MCID::MayLoad), 0xe0000008024ULL },  // Inst #1503 = L2_loadrb_pcr
5525
    { 1502, 5,  2,  4,  36, 1,  0,  HexagonImpOpBase + 100, 629,  0|(1ULL<<MCID::MayLoad), 0xe0000008024ULL },  // Inst #1502 = L2_loadrb_pci
5526
    { 1501, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0xe0000008024ULL },  // Inst #1501 = L2_loadrb_pbr
5527
    { 1500, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Predicable), 0xb0174808024ULL },  // Inst #1500 = L2_loadrb_io
5528
    { 1499, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 638,  0|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #1499 = L2_loadbzw4_pr
5529
    { 1498, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 647,  0|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #1498 = L2_loadbzw4_pi
5530
    { 1497, 4,  2,  4,  20, 1,  0,  HexagonImpOpBase + 100, 638,  0|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #1497 = L2_loadbzw4_pcr
5531
    { 1496, 5,  2,  4,  36, 1,  0,  HexagonImpOpBase + 100, 642,  0|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #1496 = L2_loadbzw4_pci
5532
    { 1495, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 638,  0|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #1495 = L2_loadbzw4_pbr
5533
    { 1494, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 489,  0|(1ULL<<MCID::MayLoad), 0x1b09b4800024ULL },  // Inst #1494 = L2_loadbzw4_io
5534
    { 1493, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1493 = L2_loadbzw2_pr
5535
    { 1492, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 634,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1492 = L2_loadbzw2_pi
5536
    { 1491, 4,  2,  4,  20, 1,  0,  HexagonImpOpBase + 100, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1491 = L2_loadbzw2_pcr
5537
    { 1490, 5,  2,  4,  36, 1,  0,  HexagonImpOpBase + 100, 629,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1490 = L2_loadbzw2_pci
5538
    { 1489, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1489 = L2_loadbzw2_pbr
5539
    { 1488, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad), 0x130594808024ULL },  // Inst #1488 = L2_loadbzw2_io
5540
    { 1487, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 638,  0|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #1487 = L2_loadbsw4_pr
5541
    { 1486, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 647,  0|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #1486 = L2_loadbsw4_pi
5542
    { 1485, 4,  2,  4,  20, 1,  0,  HexagonImpOpBase + 100, 638,  0|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #1485 = L2_loadbsw4_pcr
5543
    { 1484, 5,  2,  4,  36, 1,  0,  HexagonImpOpBase + 100, 642,  0|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #1484 = L2_loadbsw4_pci
5544
    { 1483, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 638,  0|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #1483 = L2_loadbsw4_pbr
5545
    { 1482, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 489,  0|(1ULL<<MCID::MayLoad), 0x1b09b4800024ULL },  // Inst #1482 = L2_loadbsw4_io
5546
    { 1481, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1481 = L2_loadbsw2_pr
5547
    { 1480, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 634,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1480 = L2_loadbsw2_pi
5548
    { 1479, 4,  2,  4,  20, 1,  0,  HexagonImpOpBase + 100, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1479 = L2_loadbsw2_pcr
5549
    { 1478, 5,  2,  4,  36, 1,  0,  HexagonImpOpBase + 100, 629,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1478 = L2_loadbsw2_pci
5550
    { 1477, 4,  2,  4,  20, 0,  0,  HexagonImpOpBase + 0, 625,  0|(1ULL<<MCID::MayLoad), 0x160000008024ULL },  // Inst #1477 = L2_loadbsw2_pbr
5551
    { 1476, 3,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::MayLoad), 0x130594808024ULL },  // Inst #1476 = L2_loadbsw2_io
5552
    { 1475, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 609,  0|(1ULL<<MCID::MayLoad), 0x160000000024ULL },  // Inst #1475 = L2_loadalignh_pr
5553
    { 1474, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 620,  0|(1ULL<<MCID::MayLoad), 0x160000000024ULL },  // Inst #1474 = L2_loadalignh_pi
5554
    { 1473, 5,  2,  4,  145,  1,  0,  HexagonImpOpBase + 100, 609,  0|(1ULL<<MCID::MayLoad), 0x160000000024ULL },  // Inst #1473 = L2_loadalignh_pcr
5555
    { 1472, 6,  2,  4,  146,  1,  0,  HexagonImpOpBase + 100, 614,  0|(1ULL<<MCID::MayLoad), 0x160000000024ULL },  // Inst #1472 = L2_loadalignh_pci
5556
    { 1471, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 609,  0|(1ULL<<MCID::MayLoad), 0x160000000024ULL },  // Inst #1471 = L2_loadalignh_pbr
5557
    { 1470, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 605,  0|(1ULL<<MCID::MayLoad), 0x130596800024ULL },  // Inst #1470 = L2_loadalignh_io
5558
    { 1469, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 609,  0|(1ULL<<MCID::MayLoad), 0xe0000000024ULL },  // Inst #1469 = L2_loadalignb_pr
5559
    { 1468, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 620,  0|(1ULL<<MCID::MayLoad), 0xe0000000024ULL },  // Inst #1468 = L2_loadalignb_pi
5560
    { 1467, 5,  2,  4,  145,  1,  0,  HexagonImpOpBase + 100, 609,  0|(1ULL<<MCID::MayLoad), 0xe0000000024ULL },  // Inst #1467 = L2_loadalignb_pcr
5561
    { 1466, 6,  2,  4,  146,  1,  0,  HexagonImpOpBase + 100, 614,  0|(1ULL<<MCID::MayLoad), 0xe0000000024ULL },  // Inst #1466 = L2_loadalignb_pci
5562
    { 1465, 5,  2,  4,  145,  0,  0,  HexagonImpOpBase + 0, 609,  0|(1ULL<<MCID::MayLoad), 0xe0000000024ULL },  // Inst #1465 = L2_loadalignb_pbr
5563
    { 1464, 4,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 605,  0|(1ULL<<MCID::MayLoad), 0xb0176800024ULL },  // Inst #1464 = L2_loadalignb_io
5564
    { 1463, 2,  1,  4,  27, 1,  1,  HexagonImpOpBase + 56,  178,  0|(1ULL<<MCID::MayLoad), 0x200000000024ULL },  // Inst #1463 = L2_deallocframe
5565
    { 1462, 2,  0,  4,  144,  1,  2,  HexagonImpOpBase + 97,  603,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807972801404ULL },  // Inst #1462 = J4_tstbit0_tp1_jump_t
5566
    { 1461, 2,  0,  4,  144,  1,  2,  HexagonImpOpBase + 97,  603,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7972801404ULL },  // Inst #1461 = J4_tstbit0_tp1_jump_nt
5567
    { 1460, 2,  0,  4,  144,  1,  2,  HexagonImpOpBase + 94,  603,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807972801404ULL },  // Inst #1460 = J4_tstbit0_tp0_jump_t
5568
    { 1459, 2,  0,  4,  144,  1,  2,  HexagonImpOpBase + 94,  603,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7972801404ULL },  // Inst #1459 = J4_tstbit0_tp0_jump_nt
5569
    { 1458, 2,  0,  4,  143,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809972804427ULL },  // Inst #1458 = J4_tstbit0_t_jumpnv_t
5570
    { 1457, 2,  0,  4,  143,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9972804427ULL },  // Inst #1457 = J4_tstbit0_t_jumpnv_nt
5571
    { 1456, 2,  0,  4,  144,  1,  2,  HexagonImpOpBase + 97,  603,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807972801c04ULL },  // Inst #1456 = J4_tstbit0_fp1_jump_t
5572
    { 1455, 2,  0,  4,  144,  1,  2,  HexagonImpOpBase + 97,  603,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7972801c04ULL },  // Inst #1455 = J4_tstbit0_fp1_jump_nt
5573
    { 1454, 2,  0,  4,  144,  1,  2,  HexagonImpOpBase + 94,  603,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807972801c04ULL },  // Inst #1454 = J4_tstbit0_fp0_jump_t
5574
    { 1453, 2,  0,  4,  144,  1,  2,  HexagonImpOpBase + 94,  603,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7972801c04ULL },  // Inst #1453 = J4_tstbit0_fp0_jump_nt
5575
    { 1452, 2,  0,  4,  143,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809972804c27ULL },  // Inst #1452 = J4_tstbit0_f_jumpnv_t
5576
    { 1451, 2,  0,  4,  143,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9972804c27ULL },  // Inst #1451 = J4_tstbit0_f_jumpnv_nt
5577
    { 1450, 3,  1,  4,  142,  0,  1,  HexagonImpOpBase + 55,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x5974808004ULL },  // Inst #1450 = J4_jumpsetr
5578
    { 1449, 3,  1,  4,  142,  0,  1,  HexagonImpOpBase + 55,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x5974808004ULL },  // Inst #1449 = J4_jumpseti
5579
    { 1448, 1,  0,  4,  141,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x7000000023ULL },  // Inst #1448 = J4_hintjumpr
5580
    { 1447, 3,  0,  4,  140,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974814427ULL },  // Inst #1447 = J4_cmpltu_t_jumpnv_t
5581
    { 1446, 3,  0,  4,  140,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974814427ULL },  // Inst #1446 = J4_cmpltu_t_jumpnv_nt
5582
    { 1445, 3,  0,  4,  140,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974814c27ULL },  // Inst #1445 = J4_cmpltu_f_jumpnv_t
5583
    { 1444, 3,  0,  4,  140,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974814c27ULL },  // Inst #1444 = J4_cmpltu_f_jumpnv_nt
5584
    { 1443, 3,  0,  4,  140,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974814427ULL },  // Inst #1443 = J4_cmplt_t_jumpnv_t
5585
    { 1442, 3,  0,  4,  140,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974814427ULL },  // Inst #1442 = J4_cmplt_t_jumpnv_nt
5586
    { 1441, 3,  0,  4,  140,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974814c27ULL },  // Inst #1441 = J4_cmplt_f_jumpnv_t
5587
    { 1440, 3,  0,  4,  140,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974814c27ULL },  // Inst #1440 = J4_cmplt_f_jumpnv_nt
5588
    { 1439, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1439 = J4_cmpgtui_tp1_jump_t
5589
    { 1438, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1438 = J4_cmpgtui_tp1_jump_nt
5590
    { 1437, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1437 = J4_cmpgtui_tp0_jump_t
5591
    { 1436, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1436 = J4_cmpgtui_tp0_jump_nt
5592
    { 1435, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804427ULL },  // Inst #1435 = J4_cmpgtui_t_jumpnv_t
5593
    { 1434, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804427ULL },  // Inst #1434 = J4_cmpgtui_t_jumpnv_nt
5594
    { 1433, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1433 = J4_cmpgtui_fp1_jump_t
5595
    { 1432, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1432 = J4_cmpgtui_fp1_jump_nt
5596
    { 1431, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1431 = J4_cmpgtui_fp0_jump_t
5597
    { 1430, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1430 = J4_cmpgtui_fp0_jump_nt
5598
    { 1429, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804c27ULL },  // Inst #1429 = J4_cmpgtui_f_jumpnv_t
5599
    { 1428, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804c27ULL },  // Inst #1428 = J4_cmpgtui_f_jumpnv_nt
5600
    { 1427, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1427 = J4_cmpgtu_tp1_jump_t
5601
    { 1426, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1426 = J4_cmpgtu_tp1_jump_nt
5602
    { 1425, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1425 = J4_cmpgtu_tp0_jump_t
5603
    { 1424, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1424 = J4_cmpgtu_tp0_jump_nt
5604
    { 1423, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804427ULL },  // Inst #1423 = J4_cmpgtu_t_jumpnv_t
5605
    { 1422, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804427ULL },  // Inst #1422 = J4_cmpgtu_t_jumpnv_nt
5606
    { 1421, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1421 = J4_cmpgtu_fp1_jump_t
5607
    { 1420, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1420 = J4_cmpgtu_fp1_jump_nt
5608
    { 1419, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1419 = J4_cmpgtu_fp0_jump_t
5609
    { 1418, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1418 = J4_cmpgtu_fp0_jump_nt
5610
    { 1417, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804c27ULL },  // Inst #1417 = J4_cmpgtu_f_jumpnv_t
5611
    { 1416, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804c27ULL },  // Inst #1416 = J4_cmpgtu_f_jumpnv_nt
5612
    { 1415, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1415 = J4_cmpgtn1_tp1_jump_t
5613
    { 1414, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1414 = J4_cmpgtn1_tp1_jump_nt
5614
    { 1413, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1413 = J4_cmpgtn1_tp0_jump_t
5615
    { 1412, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1412 = J4_cmpgtn1_tp0_jump_nt
5616
    { 1411, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804427ULL },  // Inst #1411 = J4_cmpgtn1_t_jumpnv_t
5617
    { 1410, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804427ULL },  // Inst #1410 = J4_cmpgtn1_t_jumpnv_nt
5618
    { 1409, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1409 = J4_cmpgtn1_fp1_jump_t
5619
    { 1408, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1408 = J4_cmpgtn1_fp1_jump_nt
5620
    { 1407, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1407 = J4_cmpgtn1_fp0_jump_t
5621
    { 1406, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1406 = J4_cmpgtn1_fp0_jump_nt
5622
    { 1405, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804c27ULL },  // Inst #1405 = J4_cmpgtn1_f_jumpnv_t
5623
    { 1404, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804c27ULL },  // Inst #1404 = J4_cmpgtn1_f_jumpnv_nt
5624
    { 1403, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1403 = J4_cmpgti_tp1_jump_t
5625
    { 1402, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1402 = J4_cmpgti_tp1_jump_nt
5626
    { 1401, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1401 = J4_cmpgti_tp0_jump_t
5627
    { 1400, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1400 = J4_cmpgti_tp0_jump_nt
5628
    { 1399, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804427ULL },  // Inst #1399 = J4_cmpgti_t_jumpnv_t
5629
    { 1398, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804427ULL },  // Inst #1398 = J4_cmpgti_t_jumpnv_nt
5630
    { 1397, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1397 = J4_cmpgti_fp1_jump_t
5631
    { 1396, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1396 = J4_cmpgti_fp1_jump_nt
5632
    { 1395, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1395 = J4_cmpgti_fp0_jump_t
5633
    { 1394, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1394 = J4_cmpgti_fp0_jump_nt
5634
    { 1393, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804c27ULL },  // Inst #1393 = J4_cmpgti_f_jumpnv_t
5635
    { 1392, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804c27ULL },  // Inst #1392 = J4_cmpgti_f_jumpnv_nt
5636
    { 1391, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1391 = J4_cmpgt_tp1_jump_t
5637
    { 1390, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1390 = J4_cmpgt_tp1_jump_nt
5638
    { 1389, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1389 = J4_cmpgt_tp0_jump_t
5639
    { 1388, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1388 = J4_cmpgt_tp0_jump_nt
5640
    { 1387, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804427ULL },  // Inst #1387 = J4_cmpgt_t_jumpnv_t
5641
    { 1386, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804427ULL },  // Inst #1386 = J4_cmpgt_t_jumpnv_nt
5642
    { 1385, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1385 = J4_cmpgt_fp1_jump_t
5643
    { 1384, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1384 = J4_cmpgt_fp1_jump_nt
5644
    { 1383, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1383 = J4_cmpgt_fp0_jump_t
5645
    { 1382, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1382 = J4_cmpgt_fp0_jump_nt
5646
    { 1381, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804c27ULL },  // Inst #1381 = J4_cmpgt_f_jumpnv_t
5647
    { 1380, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804c27ULL },  // Inst #1380 = J4_cmpgt_f_jumpnv_nt
5648
    { 1379, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1379 = J4_cmpeqn1_tp1_jump_t
5649
    { 1378, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1378 = J4_cmpeqn1_tp1_jump_nt
5650
    { 1377, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1377 = J4_cmpeqn1_tp0_jump_t
5651
    { 1376, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1376 = J4_cmpeqn1_tp0_jump_nt
5652
    { 1375, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804427ULL },  // Inst #1375 = J4_cmpeqn1_t_jumpnv_t
5653
    { 1374, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804427ULL },  // Inst #1374 = J4_cmpeqn1_t_jumpnv_nt
5654
    { 1373, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1373 = J4_cmpeqn1_fp1_jump_t
5655
    { 1372, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1372 = J4_cmpeqn1_fp1_jump_nt
5656
    { 1371, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1371 = J4_cmpeqn1_fp0_jump_t
5657
    { 1370, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1370 = J4_cmpeqn1_fp0_jump_nt
5658
    { 1369, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804c27ULL },  // Inst #1369 = J4_cmpeqn1_f_jumpnv_t
5659
    { 1368, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804c27ULL },  // Inst #1368 = J4_cmpeqn1_f_jumpnv_nt
5660
    { 1367, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1367 = J4_cmpeqi_tp1_jump_t
5661
    { 1366, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1366 = J4_cmpeqi_tp1_jump_nt
5662
    { 1365, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1365 = J4_cmpeqi_tp0_jump_t
5663
    { 1364, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1364 = J4_cmpeqi_tp0_jump_nt
5664
    { 1363, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804427ULL },  // Inst #1363 = J4_cmpeqi_t_jumpnv_t
5665
    { 1362, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804427ULL },  // Inst #1362 = J4_cmpeqi_t_jumpnv_nt
5666
    { 1361, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1361 = J4_cmpeqi_fp1_jump_t
5667
    { 1360, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 97,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1360 = J4_cmpeqi_fp1_jump_nt
5668
    { 1359, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1359 = J4_cmpeqi_fp0_jump_t
5669
    { 1358, 3,  0,  4,  139,  1,  2,  HexagonImpOpBase + 94,  600,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1358 = J4_cmpeqi_fp0_jump_nt
5670
    { 1357, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804c27ULL },  // Inst #1357 = J4_cmpeqi_f_jumpnv_t
5671
    { 1356, 3,  0,  4,  138,  0,  1,  HexagonImpOpBase + 55,  504,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804c27ULL },  // Inst #1356 = J4_cmpeqi_f_jumpnv_nt
5672
    { 1355, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1355 = J4_cmpeq_tp1_jump_t
5673
    { 1354, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1354 = J4_cmpeq_tp1_jump_nt
5674
    { 1353, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801404ULL },  // Inst #1353 = J4_cmpeq_tp0_jump_t
5675
    { 1352, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801404ULL },  // Inst #1352 = J4_cmpeq_tp0_jump_nt
5676
    { 1351, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804427ULL },  // Inst #1351 = J4_cmpeq_t_jumpnv_t
5677
    { 1350, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804427ULL },  // Inst #1350 = J4_cmpeq_t_jumpnv_nt
5678
    { 1349, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1349 = J4_cmpeq_fp1_jump_t
5679
    { 1348, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 97,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1348 = J4_cmpeq_fp1_jump_nt
5680
    { 1347, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807974801c04ULL },  // Inst #1347 = J4_cmpeq_fp0_jump_t
5681
    { 1346, 3,  0,  4,  137,  1,  2,  HexagonImpOpBase + 94,  597,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7974801c04ULL },  // Inst #1346 = J4_cmpeq_fp0_jump_nt
5682
    { 1345, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x809974804c27ULL },  // Inst #1345 = J4_cmpeq_f_jumpnv_t
5683
    { 1344, 3,  0,  4,  136,  0,  1,  HexagonImpOpBase + 55,  187,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x9974804c27ULL },  // Inst #1344 = J4_cmpeq_f_jumpnv_nt
5684
    { 1343, 0,  0,  4,  135,  0,  0,  HexagonImpOpBase + 0, 1,  0, 0xa3ULL },  // Inst #1343 = J2_unpause
5685
    { 1342, 3,  1,  4,  17, 2,  3,  HexagonImpOpBase + 89,  495,  0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a3ULL },  // Inst #1342 = J2_trap1
5686
    { 1341, 1,  0,  4,  134,  0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::UnmodeledSideEffects), 0xa3ULL },  // Inst #1341 = J2_trap0
5687
    { 1340, 0,  0,  4,  133,  1,  1,  HexagonImpOpBase + 87,  1,  0, 0x23ULL },  // Inst #1340 = J2_rte
5688
    { 1339, 2,  0,  4,  132,  0,  4,  HexagonImpOpBase + 83,  595,  0, 0x6930802005ULL },  // Inst #1339 = J2_ploop3sr
5689
    { 1338, 2,  0,  4,  131,  0,  4,  HexagonImpOpBase + 83,  13, 0, 0x6930802005ULL },  // Inst #1338 = J2_ploop3si
5690
    { 1337, 2,  0,  4,  132,  0,  4,  HexagonImpOpBase + 83,  595,  0, 0x6930802005ULL },  // Inst #1337 = J2_ploop2sr
5691
    { 1336, 2,  0,  4,  131,  0,  4,  HexagonImpOpBase + 83,  13, 0, 0x6930802005ULL },  // Inst #1336 = J2_ploop2si
5692
    { 1335, 2,  0,  4,  132,  0,  4,  HexagonImpOpBase + 83,  595,  0, 0x6930802005ULL },  // Inst #1335 = J2_ploop1sr
5693
    { 1334, 2,  0,  4,  131,  0,  4,  HexagonImpOpBase + 83,  13, 0, 0x6930802005ULL },  // Inst #1334 = J2_ploop1si
5694
    { 1333, 1,  0,  4,  130,  0,  0,  HexagonImpOpBase + 0, 0,  0, 0xa3ULL },  // Inst #1333 = J2_pause
5695
    { 1332, 2,  0,  4,  129,  0,  2,  HexagonImpOpBase + 79,  595,  0, 0x931800005ULL },  // Inst #1332 = J2_loop1rext
5696
    { 1331, 2,  0,  4,  129,  0,  2,  HexagonImpOpBase + 81,  595,  0, 0x6930800005ULL },  // Inst #1331 = J2_loop1r
5697
    { 1330, 2,  0,  4,  128,  0,  3,  HexagonImpOpBase + 76,  13, 0, 0x931800005ULL },  // Inst #1330 = J2_loop1iext
5698
    { 1329, 2,  0,  4,  128,  0,  2,  HexagonImpOpBase + 81,  13, 0, 0x6930800005ULL },  // Inst #1329 = J2_loop1i
5699
    { 1328, 2,  0,  4,  129,  0,  2,  HexagonImpOpBase + 79,  595,  0, 0x931800005ULL },  // Inst #1328 = J2_loop0rext
5700
    { 1327, 2,  0,  4,  129,  0,  3,  HexagonImpOpBase + 73,  595,  0, 0x6930800005ULL },  // Inst #1327 = J2_loop0r
5701
    { 1326, 2,  0,  4,  128,  0,  3,  HexagonImpOpBase + 76,  13, 0, 0x931800005ULL },  // Inst #1326 = J2_loop0iext
5702
    { 1325, 2,  0,  4,  128,  0,  3,  HexagonImpOpBase + 73,  13, 0, 0x6930800005ULL },  // Inst #1325 = J2_loop0i
5703
    { 1324, 2,  0,  4,  123,  0,  1,  HexagonImpOpBase + 55,  171,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807a32800423ULL },  // Inst #1324 = J2_jumptpt
5704
    { 1323, 2,  0,  4,  122,  0,  1,  HexagonImpOpBase + 55,  171,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807a32801423ULL },  // Inst #1323 = J2_jumptnewpt
5705
    { 1322, 2,  0,  4,  122,  0,  1,  HexagonImpOpBase + 55,  171,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7a32801423ULL },  // Inst #1322 = J2_jumptnew
5706
    { 1321, 2,  0,  4,  15, 0,  1,  HexagonImpOpBase + 55,  171,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7a32800423ULL },  // Inst #1321 = J2_jumpt
5707
    { 1320, 2,  0,  4,  126,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807000001405ULL },  // Inst #1320 = J2_jumprzpt
5708
    { 1319, 2,  0,  4,  126,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7000001405ULL },  // Inst #1319 = J2_jumprz
5709
    { 1318, 2,  0,  4,  125,  0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x801000000423ULL },  // Inst #1318 = J2_jumprtpt
5710
    { 1317, 2,  0,  4,  124,  0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x801000001423ULL },  // Inst #1317 = J2_jumprtnewpt
5711
    { 1316, 2,  0,  4,  124,  0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x1000001423ULL },  // Inst #1316 = J2_jumprtnew
5712
    { 1315, 2,  0,  4,  16, 0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x1000000423ULL },  // Inst #1315 = J2_jumprt
5713
    { 1314, 2,  0,  4,  126,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807000001405ULL },  // Inst #1314 = J2_jumprnzpt
5714
    { 1313, 2,  0,  4,  126,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7000001405ULL },  // Inst #1313 = J2_jumprnz
5715
    { 1312, 2,  0,  4,  126,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807000001405ULL },  // Inst #1312 = J2_jumprltezpt
5716
    { 1311, 2,  0,  4,  126,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7000001405ULL },  // Inst #1311 = J2_jumprltez
5717
    { 1310, 1,  0,  4,  127,  0,  1,  HexagonImpOpBase + 55,  260,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x1000000023ULL },  // Inst #1310 = J2_jumprh
5718
    { 1309, 2,  0,  4,  126,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807000001405ULL },  // Inst #1309 = J2_jumprgtezpt
5719
    { 1308, 2,  0,  4,  126,  0,  1,  HexagonImpOpBase + 55,  143,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7000001405ULL },  // Inst #1308 = J2_jumprgtez
5720
    { 1307, 2,  0,  4,  125,  0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x801000000c23ULL },  // Inst #1307 = J2_jumprfpt
5721
    { 1306, 2,  0,  4,  124,  0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x801000001c23ULL },  // Inst #1306 = J2_jumprfnewpt
5722
    { 1305, 2,  0,  4,  124,  0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x1000001c23ULL },  // Inst #1305 = J2_jumprfnew
5723
    { 1304, 2,  0,  4,  16, 0,  1,  HexagonImpOpBase + 55,  173,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Terminator), 0x1000000c23ULL },  // Inst #1304 = J2_jumprf
5724
    { 1303, 1,  0,  4,  40, 0,  1,  HexagonImpOpBase + 55,  260,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x1000000023ULL },  // Inst #1303 = J2_jumpr
5725
    { 1302, 2,  0,  4,  123,  0,  1,  HexagonImpOpBase + 55,  171,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807a32800c23ULL },  // Inst #1302 = J2_jumpfpt
5726
    { 1301, 2,  0,  4,  122,  0,  1,  HexagonImpOpBase + 55,  171,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x807a32801c23ULL },  // Inst #1301 = J2_jumpfnewpt
5727
    { 1300, 2,  0,  4,  122,  0,  1,  HexagonImpOpBase + 55,  171,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7a32801c23ULL },  // Inst #1300 = J2_jumpfnew
5728
    { 1299, 2,  0,  4,  15, 0,  1,  HexagonImpOpBase + 55,  171,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7a32800c23ULL },  // Inst #1299 = J2_jumpf
5729
    { 1298, 1,  0,  4,  121,  0,  1,  HexagonImpOpBase + 55,  0,  0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Terminator), 0x5b10800023ULL },  // Inst #1298 = J2_jump
5730
    { 1297, 2,  0,  4,  117,  1,  2,  HexagonImpOpBase + 68,  171,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x80007a32800423ULL },  // Inst #1297 = J2_callt
5731
    { 1296, 2,  0,  4,  119,  1,  2,  HexagonImpOpBase + 68,  173,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x80001000000423ULL },  // Inst #1296 = J2_callrt
5732
    { 1295, 1,  0,  4,  120,  0,  2,  HexagonImpOpBase + 71,  260,  0|(1ULL<<MCID::Call), 0x80001000000023ULL },  // Inst #1295 = J2_callrh
5733
    { 1294, 2,  0,  4,  119,  1,  2,  HexagonImpOpBase + 68,  173,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x80001000000c23ULL },  // Inst #1294 = J2_callrf
5734
    { 1293, 1,  0,  4,  118,  1,  2,  HexagonImpOpBase + 68,  260,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x80001000000023ULL },  // Inst #1293 = J2_callr
5735
    { 1292, 2,  0,  4,  117,  1,  2,  HexagonImpOpBase + 68,  171,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x80007a32800c23ULL },  // Inst #1292 = J2_callf
5736
    { 1291, 1,  0,  4,  35, 1,  2,  HexagonImpOpBase + 68,  0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x80005b10800023ULL },  // Inst #1291 = J2_call
5737
    { 1290, 2,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable), 0x8000ULL },  // Inst #1290 = HI
5738
    { 1289, 2,  1,  4,  116,  0,  0,  HexagonImpOpBase + 0, 593,  0, 0x8005ULL },  // Inst #1289 = G4_tfrgrcr
5739
    { 1288, 2,  1,  4,  116,  0,  0,  HexagonImpOpBase + 0, 591,  0, 0x8005ULL },  // Inst #1288 = G4_tfrgpcp
5740
    { 1287, 2,  1,  4,  115,  0,  0,  HexagonImpOpBase + 0, 589,  0, 0x8005ULL },  // Inst #1287 = G4_tfrgcrr
5741
    { 1286, 2,  1,  4,  115,  0,  0,  HexagonImpOpBase + 0, 587,  0, 0x5ULL },  // Inst #1286 = G4_tfrgcpp
5742
    { 1285, 3,  1,  4,  109,  1,  0,  HexagonImpOpBase + 67,  190,  0, 0x1000000008025ULL },  // Inst #1285 = F2_sfsub
5743
    { 1284, 4,  2,  4,  114,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x100000000a025ULL },  // Inst #1284 = F2_sfrecipa
5744
    { 1283, 3,  1,  4,  109,  1,  0,  HexagonImpOpBase + 67,  190,  0|(1ULL<<MCID::Commutable), 0x1000000008025ULL },  // Inst #1283 = F2_sfmpy
5745
    { 1282, 3,  1,  4,  113,  1,  0,  HexagonImpOpBase + 67,  190,  0, 0x81000000008025ULL },  // Inst #1282 = F2_sfmin
5746
    { 1281, 3,  1,  4,  113,  1,  0,  HexagonImpOpBase + 67,  190,  0, 0x81000000008025ULL },  // Inst #1281 = F2_sfmax
5747
    { 1280, 3,  2,  4,  112,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x100000000a02bULL },  // Inst #1280 = F2_sfinvsqrta
5748
    { 1279, 2,  1,  4,  105,  0,  0,  HexagonImpOpBase + 0, 143,  0, 0x80000000008003ULL },  // Inst #1279 = F2_sfimm_p
5749
    { 1278, 2,  1,  4,  105,  0,  0,  HexagonImpOpBase + 0, 143,  0, 0x80000000008003ULL },  // Inst #1278 = F2_sfimm_n
5750
    { 1277, 4,  1,  4,  110,  1,  0,  HexagonImpOpBase + 67,  578,  0, 0x1000000008025ULL },  // Inst #1277 = F2_sffms_lib
5751
    { 1276, 4,  1,  4,  110,  1,  0,  HexagonImpOpBase + 67,  578,  0, 0x1000000008025ULL },  // Inst #1276 = F2_sffms
5752
    { 1275, 5,  1,  4,  111,  1,  0,  HexagonImpOpBase + 67,  582,  0, 0x1000000008025ULL },  // Inst #1275 = F2_sffma_sc
5753
    { 1274, 4,  1,  4,  110,  1,  0,  HexagonImpOpBase + 67,  578,  0, 0x1000000008025ULL },  // Inst #1274 = F2_sffma_lib
5754
    { 1273, 4,  1,  4,  110,  1,  0,  HexagonImpOpBase + 67,  578,  0, 0x1000000008025ULL },  // Inst #1273 = F2_sffma
5755
    { 1272, 2,  1,  4,  103,  0,  0,  HexagonImpOpBase + 0, 145,  0, 0x100000000802bULL },  // Inst #1272 = F2_sffixupr
5756
    { 1271, 3,  1,  4,  109,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x1000000008025ULL },  // Inst #1271 = F2_sffixupn
5757
    { 1270, 3,  1,  4,  109,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x1000000008025ULL },  // Inst #1270 = F2_sffixupd
5758
    { 1269, 3,  1,  4,  9,  1,  0,  HexagonImpOpBase + 67,  166,  0|(1ULL<<MCID::Compare), 0x100000000002cULL },  // Inst #1269 = F2_sfcmpuo
5759
    { 1268, 3,  1,  4,  9,  1,  0,  HexagonImpOpBase + 67,  166,  0|(1ULL<<MCID::Compare), 0x100000000002cULL },  // Inst #1268 = F2_sfcmpgt
5760
    { 1267, 3,  1,  4,  9,  1,  0,  HexagonImpOpBase + 67,  166,  0|(1ULL<<MCID::Compare), 0x100000000002cULL },  // Inst #1267 = F2_sfcmpge
5761
    { 1266, 3,  1,  4,  9,  1,  0,  HexagonImpOpBase + 67,  166,  0|(1ULL<<MCID::Compare), 0x100000000002cULL },  // Inst #1266 = F2_sfcmpeq
5762
    { 1265, 3,  1,  4,  89, 1,  0,  HexagonImpOpBase + 67,  163,  0, 0x100000000002bULL },  // Inst #1265 = F2_sfclass
5763
    { 1264, 3,  1,  4,  109,  1,  0,  HexagonImpOpBase + 67,  190,  0|(1ULL<<MCID::Commutable), 0x1000000008025ULL },  // Inst #1264 = F2_sfadd
5764
    { 1263, 3,  1,  4,  104,  1,  0,  HexagonImpOpBase + 67,  157,  0, 0x1000000000025ULL },  // Inst #1263 = F2_dfsub
5765
    { 1262, 3,  1,  4,  108,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #1262 = F2_dfmpyll
5766
    { 1261, 4,  1,  4,  107,  0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #1261 = F2_dfmpylh
5767
    { 1260, 4,  1,  4,  106,  1,  0,  HexagonImpOpBase + 67,  203,  0, 0x1000000000025ULL },  // Inst #1260 = F2_dfmpyhh
5768
    { 1259, 3,  1,  4,  104,  1,  0,  HexagonImpOpBase + 67,  157,  0, 0x1000000000025ULL },  // Inst #1259 = F2_dfmpyfix
5769
    { 1258, 3,  1,  4,  96, 1,  0,  HexagonImpOpBase + 67,  157,  0, 0x81000000000025ULL },  // Inst #1258 = F2_dfmin
5770
    { 1257, 3,  1,  4,  96, 1,  0,  HexagonImpOpBase + 67,  157,  0, 0x81000000000025ULL },  // Inst #1257 = F2_dfmax
5771
    { 1256, 2,  1,  4,  105,  0,  0,  HexagonImpOpBase + 0, 155,  0, 0x80000000000003ULL },  // Inst #1256 = F2_dfimm_p
5772
    { 1255, 2,  1,  4,  105,  0,  0,  HexagonImpOpBase + 0, 155,  0, 0x80000000000003ULL },  // Inst #1255 = F2_dfimm_n
5773
    { 1254, 3,  1,  4,  9,  1,  0,  HexagonImpOpBase + 67,  522,  0|(1ULL<<MCID::Compare), 0x1000000000003ULL },  // Inst #1254 = F2_dfcmpuo
5774
    { 1253, 3,  1,  4,  9,  1,  0,  HexagonImpOpBase + 67,  522,  0|(1ULL<<MCID::Compare), 0x1000000000003ULL },  // Inst #1253 = F2_dfcmpgt
5775
    { 1252, 3,  1,  4,  9,  1,  0,  HexagonImpOpBase + 67,  522,  0|(1ULL<<MCID::Compare), 0x1000000000003ULL },  // Inst #1252 = F2_dfcmpge
5776
    { 1251, 3,  1,  4,  9,  1,  0,  HexagonImpOpBase + 67,  522,  0|(1ULL<<MCID::Compare), 0x1000000000003ULL },  // Inst #1251 = F2_dfcmpeq
5777
    { 1250, 3,  1,  4,  89, 1,  0,  HexagonImpOpBase + 67,  537,  0, 0x1000000000003ULL },  // Inst #1250 = F2_dfclass
5778
    { 1249, 3,  1,  4,  104,  1,  0,  HexagonImpOpBase + 67,  157,  0, 0x1000000000025ULL },  // Inst #1249 = F2_dfadd
5779
    { 1248, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  145,  0, 0x100000000802bULL },  // Inst #1248 = F2_conv_w2sf
5780
    { 1247, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  178,  0, 0x100000000002bULL },  // Inst #1247 = F2_conv_w2df
5781
    { 1246, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  145,  0, 0x100000000802bULL },  // Inst #1246 = F2_conv_uw2sf
5782
    { 1245, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  178,  0, 0x100000000002bULL },  // Inst #1245 = F2_conv_uw2df
5783
    { 1244, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  295,  0, 0x100000000802bULL },  // Inst #1244 = F2_conv_ud2sf
5784
    { 1243, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  150,  0, 0x100000000002bULL },  // Inst #1243 = F2_conv_ud2df
5785
    { 1242, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  145,  0, 0x100000000802bULL },  // Inst #1242 = F2_conv_sf2w_chop
5786
    { 1241, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  145,  0, 0x100000000802bULL },  // Inst #1241 = F2_conv_sf2w
5787
    { 1240, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  145,  0, 0x100000000802bULL },  // Inst #1240 = F2_conv_sf2uw_chop
5788
    { 1239, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  145,  0, 0x100000000802bULL },  // Inst #1239 = F2_conv_sf2uw
5789
    { 1238, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  178,  0, 0x100000000002bULL },  // Inst #1238 = F2_conv_sf2ud_chop
5790
    { 1237, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  178,  0, 0x100000000002bULL },  // Inst #1237 = F2_conv_sf2ud
5791
    { 1236, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  178,  0, 0x100000000002bULL },  // Inst #1236 = F2_conv_sf2df
5792
    { 1235, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  178,  0, 0x100000000002bULL },  // Inst #1235 = F2_conv_sf2d_chop
5793
    { 1234, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  178,  0, 0x100000000002bULL },  // Inst #1234 = F2_conv_sf2d
5794
    { 1233, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  295,  0, 0x100000000802bULL },  // Inst #1233 = F2_conv_df2w_chop
5795
    { 1232, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  295,  0, 0x100000000802bULL },  // Inst #1232 = F2_conv_df2w
5796
    { 1231, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  295,  0, 0x100000000802bULL },  // Inst #1231 = F2_conv_df2uw_chop
5797
    { 1230, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  295,  0, 0x100000000802bULL },  // Inst #1230 = F2_conv_df2uw
5798
    { 1229, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  150,  0, 0x100000000002bULL },  // Inst #1229 = F2_conv_df2ud_chop
5799
    { 1228, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  150,  0, 0x100000000002bULL },  // Inst #1228 = F2_conv_df2ud
5800
    { 1227, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  295,  0, 0x100000000802bULL },  // Inst #1227 = F2_conv_df2sf
5801
    { 1226, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  150,  0, 0x100000000002bULL },  // Inst #1226 = F2_conv_df2d_chop
5802
    { 1225, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  150,  0, 0x100000000002bULL },  // Inst #1225 = F2_conv_df2d
5803
    { 1224, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  295,  0, 0x100000000802bULL },  // Inst #1224 = F2_conv_d2sf
5804
    { 1223, 2,  1,  4,  103,  1,  0,  HexagonImpOpBase + 67,  150,  0, 0x100000000002bULL },  // Inst #1223 = F2_conv_d2df
5805
    { 1222, 1,  0,  4,  40, 1,  1,  HexagonImpOpBase + 65,  260,  0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x1000000023ULL },  // Inst #1222 = EH_RETURN_JMPR
5806
    { 1221, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20ULL },  // Inst #1221 = DuplexIClassF
5807
    { 1220, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20ULL },  // Inst #1220 = DuplexIClassE
5808
    { 1219, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20ULL },  // Inst #1219 = DuplexIClassD
5809
    { 1218, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20ULL },  // Inst #1218 = DuplexIClassC
5810
    { 1217, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20ULL },  // Inst #1217 = DuplexIClassB
5811
    { 1216, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20ULL },  // Inst #1216 = DuplexIClassA
5812
    { 1215, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20ULL },  // Inst #1215 = DuplexIClass9
5813
    { 1214, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20ULL },  // Inst #1214 = DuplexIClass8
5814
    { 1213, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20020ULL },  // Inst #1213 = DuplexIClass7
5815
    { 1212, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20020ULL },  // Inst #1212 = DuplexIClass6
5816
    { 1211, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20020ULL },  // Inst #1211 = DuplexIClass5
5817
    { 1210, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20020ULL },  // Inst #1210 = DuplexIClass4
5818
    { 1209, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20020ULL },  // Inst #1209 = DuplexIClass3
5819
    { 1208, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20ULL },  // Inst #1208 = DuplexIClass2
5820
    { 1207, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20ULL },  // Inst #1207 = DuplexIClass1
5821
    { 1206, 0,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x20ULL },  // Inst #1206 = DuplexIClass0
5822
    { 1205, 2,  1,  4,  29, 0,  0,  HexagonImpOpBase + 0, 576,  0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable), 0x24ULL },  // Inst #1205 = CONST64
5823
    { 1204, 2,  1,  4,  29, 0,  0,  HexagonImpOpBase + 0, 574,  0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable), 0x24ULL },  // Inst #1204 = CONST32
5824
    { 1203, 1,  0,  4,  35, 0,  1,  HexagonImpOpBase + 64,  0,  0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb10800023ULL },  // Inst #1203 = CALLProfile
5825
    { 1202, 4,  1,  4,  102,  0,  0,  HexagonImpOpBase + 0, 570,  0, 0x5ULL },  // Inst #1202 = C4_or_orn
5826
    { 1201, 4,  1,  4,  102,  0,  0,  HexagonImpOpBase + 0, 570,  0, 0x5ULL },  // Inst #1201 = C4_or_or
5827
    { 1200, 4,  1,  4,  102,  0,  0,  HexagonImpOpBase + 0, 570,  0, 0x5ULL },  // Inst #1200 = C4_or_andn
5828
    { 1199, 4,  1,  4,  102,  0,  0,  HexagonImpOpBase + 0, 570,  0, 0x5ULL },  // Inst #1199 = C4_or_and
5829
    { 1198, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0, 0x2cULL },  // Inst #1198 = C4_nbitsset
5830
    { 1197, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 163,  0, 0x2bULL },  // Inst #1197 = C4_nbitsclri
5831
    { 1196, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0, 0x2cULL },  // Inst #1196 = C4_nbitsclr
5832
    { 1195, 3,  1,  4,  11, 0,  0,  HexagonImpOpBase + 0, 548,  0, 0x5ULL },  // Inst #1195 = C4_fastcorner9_not
5833
    { 1194, 3,  1,  4,  11, 0,  0,  HexagonImpOpBase + 0, 548,  0, 0x5ULL },  // Inst #1194 = C4_fastcorner9
5834
    { 1193, 3,  1,  4,  10, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare), 0x154800000ULL },  // Inst #1193 = C4_cmpneqi
5835
    { 1192, 3,  1,  4,  98, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x1ULL },  // Inst #1192 = C4_cmpneq
5836
    { 1191, 3,  1,  4,  10, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare), 0x124800000ULL },  // Inst #1191 = C4_cmplteui
5837
    { 1190, 3,  1,  4,  98, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare), 0x1ULL },  // Inst #1190 = C4_cmplteu
5838
    { 1189, 3,  1,  4,  10, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare), 0x154800000ULL },  // Inst #1189 = C4_cmpltei
5839
    { 1188, 3,  1,  4,  98, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare), 0x1ULL },  // Inst #1188 = C4_cmplte
5840
    { 1187, 4,  1,  4,  102,  0,  0,  HexagonImpOpBase + 0, 570,  0, 0x5ULL },  // Inst #1187 = C4_and_orn
5841
    { 1186, 4,  1,  4,  102,  0,  0,  HexagonImpOpBase + 0, 570,  0, 0x5ULL },  // Inst #1186 = C4_and_or
5842
    { 1185, 4,  1,  4,  102,  0,  0,  HexagonImpOpBase + 0, 570,  0, 0x5ULL },  // Inst #1185 = C4_and_andn
5843
    { 1184, 4,  1,  4,  102,  0,  0,  HexagonImpOpBase + 0, 570,  0, 0x5ULL },  // Inst #1184 = C4_and_and
5844
    { 1183, 2,  1,  4,  101,  0,  0,  HexagonImpOpBase + 0, 143,  0, 0xc2808005ULL },  // Inst #1183 = C4_addipc
5845
    { 1182, 3,  1,  4,  11, 0,  0,  HexagonImpOpBase + 0, 548,  0, 0x5ULL },  // Inst #1182 = C2_xor
5846
    { 1181, 4,  1,  4,  100,  0,  0,  HexagonImpOpBase + 0, 233,  0, 0x3ULL },  // Inst #1181 = C2_vmux
5847
    { 1180, 3,  1,  4,  78, 0,  0,  HexagonImpOpBase + 0, 567,  0, 0x8000000000802bULL },  // Inst #1180 = C2_vitpack
5848
    { 1179, 2,  1,  4,  99, 0,  0,  HexagonImpOpBase + 0, 173,  0, 0x2bULL },  // Inst #1179 = C2_tfrrp
5849
    { 1178, 2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 565,  0, 0x802bULL },  // Inst #1178 = C2_tfrpr
5850
    { 1177, 3,  1,  4,  11, 0,  0,  HexagonImpOpBase + 0, 548,  0, 0x5ULL },  // Inst #1177 = C2_orn
5851
    { 1176, 3,  1,  4,  11, 0,  0,  HexagonImpOpBase + 0, 548,  0, 0x5ULL },  // Inst #1176 = C2_or
5852
    { 1175, 2,  1,  4,  97, 0,  0,  HexagonImpOpBase + 0, 169,  0, 0x5ULL },  // Inst #1175 = C2_not
5853
    { 1174, 4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 561,  0, 0x114808000ULL },  // Inst #1174 = C2_muxri
5854
    { 1173, 4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 514,  0, 0x116808000ULL },  // Inst #1173 = C2_muxir
5855
    { 1172, 4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 557,  0, 0x114808000ULL },  // Inst #1172 = C2_muxii
5856
    { 1171, 4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x8001ULL },  // Inst #1171 = C2_mux
5857
    { 1170, 2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 555,  0, 0x2bULL },  // Inst #1170 = C2_mask
5858
    { 1169, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0|(1ULL<<MCID::Compare), 0x3ULL },  // Inst #1169 = C2_cmpgtup
5859
    { 1168, 3,  1,  4,  10, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare), 0x124800000ULL },  // Inst #1168 = C2_cmpgtui
5860
    { 1167, 3,  1,  4,  98, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare), 0x1ULL },  // Inst #1167 = C2_cmpgtu
5861
    { 1166, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0|(1ULL<<MCID::Compare), 0x3ULL },  // Inst #1166 = C2_cmpgtp
5862
    { 1165, 3,  1,  4,  10, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare), 0x154800000ULL },  // Inst #1165 = C2_cmpgti
5863
    { 1164, 3,  1,  4,  98, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare), 0x1ULL },  // Inst #1164 = C2_cmpgt
5864
    { 1163, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x3ULL },  // Inst #1163 = C2_cmpeqp
5865
    { 1162, 3,  1,  4,  10, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare), 0x154800000ULL },  // Inst #1162 = C2_cmpeqi
5866
    { 1161, 3,  1,  4,  98, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x1ULL },  // Inst #1161 = C2_cmpeq
5867
    { 1160, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MoveImm), 0x194809400ULL },  // Inst #1160 = C2_cmovenewit
5868
    { 1159, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MoveImm), 0x194809c00ULL },  // Inst #1159 = C2_cmovenewif
5869
    { 1158, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MoveImm), 0x194808400ULL },  // Inst #1158 = C2_cmoveit
5870
    { 1157, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::MoveImm), 0x194808c00ULL },  // Inst #1157 = C2_cmoveif
5871
    { 1156, 4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 551,  0, 0x401ULL },  // Inst #1156 = C2_ccombinewt
5872
    { 1155, 4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 551,  0, 0x1401ULL },  // Inst #1155 = C2_ccombinewnewt
5873
    { 1154, 4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 551,  0, 0x1c01ULL },  // Inst #1154 = C2_ccombinewnewf
5874
    { 1153, 4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 551,  0, 0xc01ULL },  // Inst #1153 = C2_ccombinewf
5875
    { 1152, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0, 0x2cULL },  // Inst #1152 = C2_bitsset
5876
    { 1151, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 163,  0, 0x2bULL },  // Inst #1151 = C2_bitsclri
5877
    { 1150, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0, 0x2cULL },  // Inst #1150 = C2_bitsclr
5878
    { 1149, 2,  1,  4,  97, 0,  0,  HexagonImpOpBase + 0, 169,  0, 0x5ULL },  // Inst #1149 = C2_any8
5879
    { 1148, 3,  1,  4,  11, 0,  0,  HexagonImpOpBase + 0, 548,  0, 0x5ULL },  // Inst #1148 = C2_andn
5880
    { 1147, 3,  1,  4,  11, 0,  0,  HexagonImpOpBase + 0, 548,  0, 0x5ULL },  // Inst #1147 = C2_and
5881
    { 1146, 2,  1,  4,  97, 0,  0,  HexagonImpOpBase + 0, 169,  0, 0x5ULL },  // Inst #1146 = C2_all8
5882
    { 1145, 3,  1,  4,  94, 0,  0,  HexagonImpOpBase + 0, 292,  0, 0x2bULL },  // Inst #1145 = A7_vclip
5883
    { 1144, 3,  1,  4,  96, 0,  0,  HexagonImpOpBase + 0, 197,  0, 0x8000000000002cULL },  // Inst #1144 = A7_croundd_rr
5884
    { 1143, 3,  1,  4,  96, 0,  0,  HexagonImpOpBase + 0, 292,  0, 0x8000000000002bULL },  // Inst #1143 = A7_croundd_ri
5885
    { 1142, 3,  1,  4,  94, 0,  0,  HexagonImpOpBase + 0, 187,  0, 0x802bULL },  // Inst #1142 = A7_clip
5886
    { 1141, 4,  2,  4,  95, 0,  0,  HexagonImpOpBase + 0, 233,  0, 0x80000000002025ULL },  // Inst #1141 = A6_vminub_RdP
5887
    { 1140, 3,  1,  4,  94, 0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1140 = A6_vcmpbeq_notany
5888
    { 1139, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  545,  0, 0x8000000000802cULL },  // Inst #1139 = A5_vaddhubs
5889
    { 1138, 5,  2,  4,  93, 0,  1,  HexagonImpOpBase + 63,  540,  0, 0x80000000002025ULL },  // Inst #1138 = A5_ACS
5890
    { 1137, 4,  1,  4,  92, 0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #1137 = A4_vrminw
5891
    { 1136, 4,  1,  4,  92, 0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #1136 = A4_vrminuw
5892
    { 1135, 4,  1,  4,  92, 0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #1135 = A4_vrminuh
5893
    { 1134, 4,  1,  4,  92, 0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #1134 = A4_vrminh
5894
    { 1133, 4,  1,  4,  92, 0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #1133 = A4_vrmaxw
5895
    { 1132, 4,  1,  4,  92, 0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #1132 = A4_vrmaxuw
5896
    { 1131, 4,  1,  4,  92, 0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #1131 = A4_vrmaxuh
5897
    { 1130, 4,  1,  4,  92, 0,  0,  HexagonImpOpBase + 0, 193,  0, 0x8000000000002cULL },  // Inst #1130 = A4_vrmaxh
5898
    { 1129, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 537,  0, 0x3ULL },  // Inst #1129 = A4_vcmpwgtui
5899
    { 1128, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 537,  0, 0x3ULL },  // Inst #1128 = A4_vcmpwgti
5900
    { 1127, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 537,  0, 0x3ULL },  // Inst #1127 = A4_vcmpweqi
5901
    { 1126, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 537,  0, 0x3ULL },  // Inst #1126 = A4_vcmphgtui
5902
    { 1125, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 537,  0, 0x3ULL },  // Inst #1125 = A4_vcmphgti
5903
    { 1124, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 537,  0, 0x3ULL },  // Inst #1124 = A4_vcmpheqi
5904
    { 1123, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 537,  0, 0x3ULL },  // Inst #1123 = A4_vcmpbgtui
5905
    { 1122, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 537,  0, 0x3ULL },  // Inst #1122 = A4_vcmpbgti
5906
    { 1121, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1121 = A4_vcmpbgt
5907
    { 1120, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 537,  0, 0x3ULL },  // Inst #1120 = A4_vcmpbeqi
5908
    { 1119, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1119 = A4_vcmpbeq_any
5909
    { 1118, 3,  1,  4,  91, 0,  0,  HexagonImpOpBase + 0, 534,  0, 0x2003ULL },  // Inst #1118 = A4_tlbmatch
5910
    { 1117, 2,  1,  4,  85, 0,  0,  HexagonImpOpBase + 0, 532,  0, 0x5ULL },  // Inst #1117 = A4_tfrpcp
5911
    { 1116, 2,  1,  4,  84, 0,  0,  HexagonImpOpBase + 0, 530,  0, 0x5ULL },  // Inst #1116 = A4_tfrcpp
5912
    { 1115, 5,  2,  4,  88, 0,  0,  HexagonImpOpBase + 0, 525,  0, 0x202cULL },  // Inst #1115 = A4_subp_c
5913
    { 1114, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x8000000000802cULL },  // Inst #1114 = A4_round_rr_sat
5914
    { 1113, 3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x8000000000802cULL },  // Inst #1113 = A4_round_rr
5915
    { 1112, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  187,  0, 0x8000000000802bULL },  // Inst #1112 = A4_round_ri_sat
5916
    { 1111, 3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 187,  0, 0x8000000000802bULL },  // Inst #1111 = A4_round_ri
5917
    { 1110, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 187,  0, 0x114808000ULL },  // Inst #1110 = A4_rcmpneqi
5918
    { 1109, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Commutable), 0x8001ULL },  // Inst #1109 = A4_rcmpneq
5919
    { 1108, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 187,  0, 0x114808000ULL },  // Inst #1108 = A4_rcmpeqi
5920
    { 1107, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Commutable), 0x8001ULL },  // Inst #1107 = A4_rcmpeq
5921
    { 1106, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9400ULL },  // Inst #1106 = A4_pzxthtnew
5922
    { 1105, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8400ULL },  // Inst #1105 = A4_pzxtht
5923
    { 1104, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9c00ULL },  // Inst #1104 = A4_pzxthfnew
5924
    { 1103, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8c00ULL },  // Inst #1103 = A4_pzxthf
5925
    { 1102, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9400ULL },  // Inst #1102 = A4_pzxtbtnew
5926
    { 1101, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8400ULL },  // Inst #1101 = A4_pzxtbt
5927
    { 1100, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9c00ULL },  // Inst #1100 = A4_pzxtbfnew
5928
    { 1099, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8c00ULL },  // Inst #1099 = A4_pzxtbf
5929
    { 1098, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9400ULL },  // Inst #1098 = A4_psxthtnew
5930
    { 1097, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8400ULL },  // Inst #1097 = A4_psxtht
5931
    { 1096, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9c00ULL },  // Inst #1096 = A4_psxthfnew
5932
    { 1095, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8c00ULL },  // Inst #1095 = A4_psxthf
5933
    { 1094, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9400ULL },  // Inst #1094 = A4_psxtbtnew
5934
    { 1093, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8400ULL },  // Inst #1093 = A4_psxtbt
5935
    { 1092, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9c00ULL },  // Inst #1092 = A4_psxtbfnew
5936
    { 1091, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8c00ULL },  // Inst #1091 = A4_psxtbf
5937
    { 1090, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9400ULL },  // Inst #1090 = A4_pasrhtnew
5938
    { 1089, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8400ULL },  // Inst #1089 = A4_pasrht
5939
    { 1088, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9c00ULL },  // Inst #1088 = A4_pasrhfnew
5940
    { 1087, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8c00ULL },  // Inst #1087 = A4_pasrhf
5941
    { 1086, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9400ULL },  // Inst #1086 = A4_paslhtnew
5942
    { 1085, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8400ULL },  // Inst #1085 = A4_paslht
5943
    { 1084, 3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x9c00ULL },  // Inst #1084 = A4_paslhfnew
5944
    { 1083, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 147,  0, 0x8c00ULL },  // Inst #1083 = A4_paslhf
5945
    { 1082, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x3ULL },  // Inst #1082 = A4_ornp
5946
    { 1081, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x8001ULL },  // Inst #1081 = A4_orn
5947
    { 1080, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #1080 = A4_modwrapu
5948
    { 1079, 1,  0,  4,  90, 0,  0,  HexagonImpOpBase + 0, 0,  0, 0x22ULL },  // Inst #1079 = A4_ext
5949
    { 1078, 3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x8000000000802cULL },  // Inst #1078 = A4_cround_rr
5950
    { 1077, 3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 187,  0, 0x8000000000802bULL },  // Inst #1077 = A4_cround_ri
5951
    { 1076, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 489,  0, 0x114800000ULL },  // Inst #1076 = A4_combineri
5952
    { 1075, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 486,  0, 0x112800000ULL },  // Inst #1075 = A4_combineir
5953
    { 1074, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 483,  0, 0xc4800000ULL },  // Inst #1074 = A4_combineii
5954
    { 1073, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare), 0xe4800003ULL },  // Inst #1073 = A4_cmphgtui
5955
    { 1072, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare), 0x2cULL },  // Inst #1072 = A4_cmphgtu
5956
    { 1071, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare), 0x114800003ULL },  // Inst #1071 = A4_cmphgti
5957
    { 1070, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare), 0x2cULL },  // Inst #1070 = A4_cmphgt
5958
    { 1069, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x114800003ULL },  // Inst #1069 = A4_cmpheqi
5959
    { 1068, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x2cULL },  // Inst #1068 = A4_cmpheq
5960
    { 1067, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare), 0xe4800003ULL },  // Inst #1067 = A4_cmpbgtui
5961
    { 1066, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare), 0x2cULL },  // Inst #1066 = A4_cmpbgtu
5962
    { 1065, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare), 0x3ULL },  // Inst #1065 = A4_cmpbgti
5963
    { 1064, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare), 0x2cULL },  // Inst #1064 = A4_cmpbgt
5964
    { 1063, 3,  1,  4,  89, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x3ULL },  // Inst #1063 = A4_cmpbeqi
5965
    { 1062, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x2cULL },  // Inst #1062 = A4_cmpbeq
5966
    { 1061, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1061 = A4_boundscheck_lo
5967
    { 1060, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1060 = A4_boundscheck_hi
5968
    { 1059, 3,  1,  4,  78, 0,  0,  HexagonImpOpBase + 0, 489,  0, 0x8000000000002bULL },  // Inst #1059 = A4_bitspliti
5969
    { 1058, 3,  1,  4,  78, 0,  0,  HexagonImpOpBase + 0, 507,  0, 0x80000000000003ULL },  // Inst #1058 = A4_bitsplit
5970
    { 1057, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x3ULL },  // Inst #1057 = A4_andnp
5971
    { 1056, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x8001ULL },  // Inst #1056 = A4_andn
5972
    { 1055, 5,  2,  4,  88, 0,  0,  HexagonImpOpBase + 0, 525,  0, 0x202cULL },  // Inst #1055 = A4_addp_c
5973
    { 1054, 2,  1,  4,  3,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Predicable), 0x8000ULL },  // Inst #1054 = A2_zxth
5974
    { 1053, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0|(1ULL<<MCID::Commutable), 0x3ULL },  // Inst #1053 = A2_xorp
5975
    { 1052, 3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x8001ULL },  // Inst #1052 = A2_xor
5976
    { 1051, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #1051 = A2_vsubws
5977
    { 1050, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x3ULL },  // Inst #1050 = A2_vsubw
5978
    { 1049, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #1049 = A2_vsubuhs
5979
    { 1048, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #1048 = A2_vsububs
5980
    { 1047, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x3ULL },  // Inst #1047 = A2_vsubub
5981
    { 1046, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #1046 = A2_vsubhs
5982
    { 1045, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x3ULL },  // Inst #1045 = A2_vsubh
5983
    { 1044, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #1044 = A2_vrsadub_acc
5984
    { 1043, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #1043 = A2_vrsadub
5985
    { 1042, 4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 203,  0, 0x80000000000025ULL },  // Inst #1042 = A2_vraddub_acc
5986
    { 1041, 3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000025ULL },  // Inst #1041 = A2_vraddub
5987
    { 1040, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #1040 = A2_vnavgwr
5988
    { 1039, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #1039 = A2_vnavgwcr
5989
    { 1038, 3,  1,  4,  86, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1038 = A2_vnavgw
5990
    { 1037, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #1037 = A2_vnavghr
5991
    { 1036, 3,  1,  4,  48, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #1036 = A2_vnavghcr
5992
    { 1035, 3,  1,  4,  86, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1035 = A2_vnavgh
5993
    { 1034, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1034 = A2_vminw
5994
    { 1033, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1033 = A2_vminuw
5995
    { 1032, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1032 = A2_vminuh
5996
    { 1031, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1031 = A2_vminub
5997
    { 1030, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1030 = A2_vminh
5998
    { 1029, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1029 = A2_vminb
5999
    { 1028, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1028 = A2_vmaxw
6000
    { 1027, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1027 = A2_vmaxuw
6001
    { 1026, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1026 = A2_vmaxuh
6002
    { 1025, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1025 = A2_vmaxub
6003
    { 1024, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1024 = A2_vmaxh
6004
    { 1023, 3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1023 = A2_vmaxb
6005
    { 1022, 2,  1,  4,  76, 0,  1,  HexagonImpOpBase + 63,  150,  0, 0x8000000000002bULL },  // Inst #1022 = A2_vconj
6006
    { 1021, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1021 = A2_vcmpwgtu
6007
    { 1020, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1020 = A2_vcmpwgt
6008
    { 1019, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1019 = A2_vcmpweq
6009
    { 1018, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1018 = A2_vcmphgtu
6010
    { 1017, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1017 = A2_vcmphgt
6011
    { 1016, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1016 = A2_vcmpheq
6012
    { 1015, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1015 = A2_vcmpbgtu
6013
    { 1014, 3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 522,  0, 0x3ULL },  // Inst #1014 = A2_vcmpbeq
6014
    { 1013, 3,  1,  4,  87, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1013 = A2_vavgwr
6015
    { 1012, 3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1012 = A2_vavgwcr
6016
    { 1011, 3,  1,  4,  86, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1011 = A2_vavgw
6017
    { 1010, 3,  1,  4,  87, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1010 = A2_vavguwr
6018
    { 1009, 3,  1,  4,  86, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1009 = A2_vavguw
6019
    { 1008, 3,  1,  4,  87, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1008 = A2_vavguhr
6020
    { 1007, 3,  1,  4,  86, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1007 = A2_vavguh
6021
    { 1006, 3,  1,  4,  87, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1006 = A2_vavgubr
6022
    { 1005, 3,  1,  4,  86, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1005 = A2_vavgub
6023
    { 1004, 3,  1,  4,  87, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1004 = A2_vavghr
6024
    { 1003, 3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1003 = A2_vavghcr
6025
    { 1002, 3,  1,  4,  86, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #1002 = A2_vavgh
6026
    { 1001, 3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #1001 = A2_vaddws
6027
    { 1000, 3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x3ULL },  // Inst #1000 = A2_vaddw
6028
    { 999,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #999 = A2_vadduhs
6029
    { 998,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #998 = A2_vaddubs
6030
    { 997,  3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x3ULL },  // Inst #997 = A2_vaddub
6031
    { 996,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0, 0x80000000000003ULL },  // Inst #996 = A2_vaddhs
6032
    { 995,  3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x3ULL },  // Inst #995 = A2_vaddh
6033
    { 994,  2,  1,  4,  76, 0,  1,  HexagonImpOpBase + 63,  150,  0, 0x8000000000002bULL },  // Inst #994 = A2_vabswsat
6034
    { 993,  2,  1,  4,  76, 0,  0,  HexagonImpOpBase + 0, 150,  0, 0x8000000000002bULL },  // Inst #993 = A2_vabsw
6035
    { 992,  2,  1,  4,  76, 0,  1,  HexagonImpOpBase + 63,  150,  0, 0x8000000000002bULL },  // Inst #992 = A2_vabshsat
6036
    { 991,  2,  1,  4,  76, 0,  0,  HexagonImpOpBase + 0, 150,  0, 0x8000000000002bULL },  // Inst #991 = A2_vabsh
6037
    { 990,  2,  1,  4,  3,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x212808000ULL },  // Inst #990 = A2_tfrsi
6038
    { 989,  2,  1,  4,  85, 0,  0,  HexagonImpOpBase + 0, 520,  0, 0x8005ULL },  // Inst #989 = A2_tfrrcr
6039
    { 988,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 495,  0, 0x8000ULL },  // Inst #988 = A2_tfril
6040
    { 987,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 495,  0, 0x8000ULL },  // Inst #987 = A2_tfrih
6041
    { 986,  2,  1,  4,  84, 0,  0,  HexagonImpOpBase + 0, 518,  0, 0x8005ULL },  // Inst #986 = A2_tfrcrr
6042
    { 985,  2,  1,  4,  3,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Predicable), 0x8000ULL },  // Inst #985 = A2_tfr
6043
    { 984,  2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 178,  0, 0x2bULL },  // Inst #984 = A2_sxtw
6044
    { 983,  2,  1,  4,  3,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Predicable), 0x8000ULL },  // Inst #983 = A2_sxth
6045
    { 982,  2,  1,  4,  3,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Predicable), 0x8000ULL },  // Inst #982 = A2_sxtb
6046
    { 981,  2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 145,  0, 0x802bULL },  // Inst #981 = A2_swiz
6047
    { 980,  3,  1,  4,  79, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008001ULL },  // Inst #980 = A2_svsubuhs
6048
    { 979,  3,  1,  4,  79, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008001ULL },  // Inst #979 = A2_svsubhs
6049
    { 978,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x8001ULL },  // Inst #978 = A2_svsubh
6050
    { 977,  3,  1,  4,  82, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008001ULL },  // Inst #977 = A2_svnavgh
6051
    { 976,  3,  1,  4,  83, 0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Commutable), 0x80000000008001ULL },  // Inst #976 = A2_svavghs
6052
    { 975,  3,  1,  4,  82, 0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Commutable), 0x80000000008001ULL },  // Inst #975 = A2_svavgh
6053
    { 974,  3,  1,  4,  79, 0,  1,  HexagonImpOpBase + 63,  190,  0|(1ULL<<MCID::Commutable), 0x80000000008001ULL },  // Inst #974 = A2_svadduhs
6054
    { 973,  3,  1,  4,  79, 0,  1,  HexagonImpOpBase + 63,  190,  0|(1ULL<<MCID::Commutable), 0x80000000008001ULL },  // Inst #973 = A2_svaddhs
6055
    { 972,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Commutable), 0x8001ULL },  // Inst #972 = A2_svaddh
6056
    { 971,  3,  1,  4,  79, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008001ULL },  // Inst #971 = A2_subsat
6057
    { 970,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 498,  0, 0x152808000ULL },  // Inst #970 = A2_subri
6058
    { 969,  3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x3ULL },  // Inst #969 = A2_subp
6059
    { 968,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #968 = A2_subh_l16_sat_ll
6060
    { 967,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #967 = A2_subh_l16_sat_hl
6061
    { 966,  3,  1,  4,  78, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #966 = A2_subh_l16_ll
6062
    { 965,  3,  1,  4,  78, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #965 = A2_subh_l16_hl
6063
    { 964,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #964 = A2_subh_h16_sat_ll
6064
    { 963,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #963 = A2_subh_h16_sat_lh
6065
    { 962,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #962 = A2_subh_h16_sat_hl
6066
    { 961,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #961 = A2_subh_h16_sat_hh
6067
    { 960,  3,  1,  4,  1,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #960 = A2_subh_h16_ll
6068
    { 959,  3,  1,  4,  1,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #959 = A2_subh_h16_lh
6069
    { 958,  3,  1,  4,  1,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #958 = A2_subh_h16_hl
6070
    { 957,  3,  1,  4,  1,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #957 = A2_subh_h16_hh
6071
    { 956,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Predicable), 0x8001ULL },  // Inst #956 = A2_sub
6072
    { 955,  2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  145,  0, 0x802bULL },  // Inst #955 = A2_satuh
6073
    { 954,  2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  145,  0, 0x802bULL },  // Inst #954 = A2_satub
6074
    { 953,  2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  145,  0, 0x802bULL },  // Inst #953 = A2_sath
6075
    { 952,  2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  145,  0, 0x802bULL },  // Inst #952 = A2_satb
6076
    { 951,  2,  1,  4,  80, 0,  1,  HexagonImpOpBase + 63,  295,  0, 0x802bULL },  // Inst #951 = A2_sat
6077
    { 950,  2,  1,  4,  76, 0,  1,  HexagonImpOpBase + 63,  295,  0, 0x8000000000802bULL },  // Inst #950 = A2_roundsat
6078
    { 949,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x9401ULL },  // Inst #949 = A2_pxortnew
6079
    { 948,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x8401ULL },  // Inst #948 = A2_pxort
6080
    { 947,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x9c01ULL },  // Inst #947 = A2_pxorfnew
6081
    { 946,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x8c01ULL },  // Inst #946 = A2_pxorf
6082
    { 945,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x9401ULL },  // Inst #945 = A2_psubtnew
6083
    { 944,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x8401ULL },  // Inst #944 = A2_psubt
6084
    { 943,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x9c01ULL },  // Inst #943 = A2_psubfnew
6085
    { 942,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x8c01ULL },  // Inst #942 = A2_psubf
6086
    { 941,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x9401ULL },  // Inst #941 = A2_portnew
6087
    { 940,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x8401ULL },  // Inst #940 = A2_port
6088
    { 939,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x9c01ULL },  // Inst #939 = A2_porfnew
6089
    { 938,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x8c01ULL },  // Inst #938 = A2_porf
6090
    { 937,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x9401ULL },  // Inst #937 = A2_pandtnew
6091
    { 936,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x8401ULL },  // Inst #936 = A2_pandt
6092
    { 935,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x9c01ULL },  // Inst #935 = A2_pandfnew
6093
    { 934,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x8c01ULL },  // Inst #934 = A2_pandf
6094
    { 933,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x9401ULL },  // Inst #933 = A2_paddtnew
6095
    { 932,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x8401ULL },  // Inst #932 = A2_paddt
6096
    { 931,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 514,  0, 0x116809400ULL },  // Inst #931 = A2_padditnew
6097
    { 930,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 514,  0, 0x116808400ULL },  // Inst #930 = A2_paddit
6098
    { 929,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 514,  0, 0x116809c00ULL },  // Inst #929 = A2_paddifnew
6099
    { 928,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 514,  0, 0x116808c00ULL },  // Inst #928 = A2_paddif
6100
    { 927,  4,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x9c01ULL },  // Inst #927 = A2_paddfnew
6101
    { 926,  4,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 510,  0, 0x8c01ULL },  // Inst #926 = A2_paddf
6102
    { 925,  3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0|(1ULL<<MCID::Commutable), 0x3ULL },  // Inst #925 = A2_orp
6103
    { 924,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 187,  0, 0x154808000ULL },  // Inst #924 = A2_orir
6104
    { 923,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x8001ULL },  // Inst #923 = A2_or
6105
    { 922,  2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 150,  0, 0x2bULL },  // Inst #922 = A2_notp
6106
    { 921,  0,  0,  4,  81, 0,  0,  HexagonImpOpBase + 0, 1,  0, 0x0ULL },  // Inst #921 = A2_nop
6107
    { 920,  2,  1,  4,  76, 0,  1,  HexagonImpOpBase + 63,  145,  0, 0x8000000000802bULL },  // Inst #920 = A2_negsat
6108
    { 919,  2,  1,  4,  80, 0,  0,  HexagonImpOpBase + 0, 150,  0, 0x2bULL },  // Inst #919 = A2_negp
6109
    { 918,  3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #918 = A2_minup
6110
    { 917,  3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #917 = A2_minu
6111
    { 916,  3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #916 = A2_minp
6112
    { 915,  3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #915 = A2_min
6113
    { 914,  3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #914 = A2_maxup
6114
    { 913,  3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #913 = A2_maxu
6115
    { 912,  3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #912 = A2_maxp
6116
    { 911,  3,  1,  4,  77, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #911 = A2_max
6117
    { 910,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 507,  0|(1ULL<<MCID::Predicable), 0x1ULL },  // Inst #910 = A2_combinew
6118
    { 909,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 483,  0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x112800000ULL },  // Inst #909 = A2_combineii
6119
    { 908,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x8001ULL },  // Inst #908 = A2_combine_ll
6120
    { 907,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x8001ULL },  // Inst #907 = A2_combine_lh
6121
    { 906,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x8001ULL },  // Inst #906 = A2_combine_hl
6122
    { 905,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x8001ULL },  // Inst #905 = A2_combine_hh
6123
    { 904,  2,  1,  4,  3,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Predicable), 0x8000ULL },  // Inst #904 = A2_asrh
6124
    { 903,  2,  1,  4,  3,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Predicable), 0x8000ULL },  // Inst #903 = A2_aslh
6125
    { 902,  3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0|(1ULL<<MCID::Commutable), 0x3ULL },  // Inst #902 = A2_andp
6126
    { 901,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 187,  0, 0x154808000ULL },  // Inst #901 = A2_andir
6127
    { 900,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x8001ULL },  // Inst #900 = A2_and
6128
    { 899,  3,  1,  4,  1,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #899 = A2_addspl
6129
    { 898,  3,  1,  4,  1,  0,  0,  HexagonImpOpBase + 0, 157,  0, 0x80000000000003ULL },  // Inst #898 = A2_addsph
6130
    { 897,  3,  1,  4,  79, 0,  1,  HexagonImpOpBase + 63,  190,  0|(1ULL<<MCID::Commutable), 0x80000000008001ULL },  // Inst #897 = A2_addsat
6131
    { 896,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  157,  0|(1ULL<<MCID::Commutable), 0x80000000000003ULL },  // Inst #896 = A2_addpsat
6132
    { 895,  3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0|(1ULL<<MCID::Add)|(1ULL<<MCID::Commutable), 0x3ULL },  // Inst #895 = A2_addp
6133
    { 894,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::Add)|(1ULL<<MCID::Predicable), 0x214808002ULL },  // Inst #894 = A2_addi
6134
    { 893,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #893 = A2_addh_l16_sat_ll
6135
    { 892,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #892 = A2_addh_l16_sat_hl
6136
    { 891,  3,  1,  4,  78, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #891 = A2_addh_l16_ll
6137
    { 890,  3,  1,  4,  78, 0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #890 = A2_addh_l16_hl
6138
    { 889,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #889 = A2_addh_h16_sat_ll
6139
    { 888,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #888 = A2_addh_h16_sat_lh
6140
    { 887,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #887 = A2_addh_h16_sat_hl
6141
    { 886,  3,  1,  4,  77, 0,  1,  HexagonImpOpBase + 63,  190,  0, 0x80000000008003ULL },  // Inst #886 = A2_addh_h16_sat_hh
6142
    { 885,  3,  1,  4,  1,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #885 = A2_addh_h16_ll
6143
    { 884,  3,  1,  4,  1,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #884 = A2_addh_h16_lh
6144
    { 883,  3,  1,  4,  1,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #883 = A2_addh_h16_hl
6145
    { 882,  3,  1,  4,  1,  0,  0,  HexagonImpOpBase + 0, 190,  0, 0x80000000008003ULL },  // Inst #882 = A2_addh_h16_hh
6146
    { 881,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Predicable)|(1ULL<<MCID::Commutable), 0x8001ULL },  // Inst #881 = A2_add
6147
    { 880,  2,  1,  4,  76, 0,  1,  HexagonImpOpBase + 63,  145,  0, 0x8000000000802bULL },  // Inst #880 = A2_abssat
6148
    { 879,  2,  1,  4,  76, 0,  0,  HexagonImpOpBase + 0, 150,  0, 0x8000000000002bULL },  // Inst #879 = A2_absp
6149
    { 878,  2,  1,  4,  76, 0,  0,  HexagonImpOpBase + 0, 145,  0, 0x8000000000802bULL },  // Inst #878 = A2_abs
6150
    { 877,  3,  0,  4,  75, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1b0114800030ULL },  // Inst #877 = dup_S4_storeiri_io
6151
    { 876,  3,  0,  4,  75, 0,  0,  HexagonImpOpBase + 0, 504,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0xb0114800030ULL },  // Inst #876 = dup_S4_storeirb_io
6152
    { 875,  3,  0,  4,  74, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1b09b2800029ULL },  // Inst #875 = dup_S2_storeri_io
6153
    { 874,  3,  0,  4,  74, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x130592800029ULL },  // Inst #874 = dup_S2_storerh_io
6154
    { 873,  3,  0,  4,  74, 0,  0,  HexagonImpOpBase + 0, 501,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x230dd2800029ULL },  // Inst #873 = dup_S2_storerd_io
6155
    { 872,  3,  0,  4,  74, 0,  0,  HexagonImpOpBase + 0, 498,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0xb0172800029ULL },  // Inst #872 = dup_S2_storerb_io
6156
    { 871,  3,  1,  4,  73, 4,  1,  HexagonImpOpBase + 58,  495,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x230000008029ULL },  // Inst #871 = dup_S2_allocframe
6157
    { 870,  3,  1,  4,  72, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x130594808024ULL },  // Inst #870 = dup_L2_loadruh_io
6158
    { 869,  3,  1,  4,  72, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0xb0174808024ULL },  // Inst #869 = dup_L2_loadrub_io
6159
    { 868,  3,  1,  4,  72, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x1b09b4808024ULL },  // Inst #868 = dup_L2_loadri_io
6160
    { 867,  3,  1,  4,  72, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x130594808024ULL },  // Inst #867 = dup_L2_loadrh_io
6161
    { 866,  3,  1,  4,  72, 0,  0,  HexagonImpOpBase + 0, 489,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x230dd4800024ULL },  // Inst #866 = dup_L2_loadrd_io
6162
    { 865,  3,  1,  4,  72, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0xb0174808024ULL },  // Inst #865 = dup_L2_loadrb_io
6163
    { 864,  2,  1,  4,  71, 1,  1,  HexagonImpOpBase + 56,  178,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x200000000024ULL },  // Inst #864 = dup_L2_deallocframe
6164
    { 863,  3,  1,  4,  68, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x154800000ULL },  // Inst #863 = dup_C2_cmpeqi
6165
    { 862,  3,  1,  4,  70, 0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::Pseudo), 0x194809400ULL },  // Inst #862 = dup_C2_cmovenewit
6166
    { 861,  3,  1,  4,  70, 0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::Pseudo), 0x194809c00ULL },  // Inst #861 = dup_C2_cmovenewif
6167
    { 860,  3,  1,  4,  68, 0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::Pseudo), 0x194808400ULL },  // Inst #860 = dup_C2_cmoveit
6168
    { 859,  3,  1,  4,  68, 0,  0,  HexagonImpOpBase + 0, 492,  0|(1ULL<<MCID::Pseudo), 0x194808c00ULL },  // Inst #859 = dup_C2_cmoveif
6169
    { 858,  3,  1,  4,  68, 0,  0,  HexagonImpOpBase + 0, 489,  0|(1ULL<<MCID::Pseudo), 0x114800000ULL },  // Inst #858 = dup_A4_combineri
6170
    { 857,  3,  1,  4,  68, 0,  0,  HexagonImpOpBase + 0, 486,  0|(1ULL<<MCID::Pseudo), 0x112800000ULL },  // Inst #857 = dup_A4_combineir
6171
    { 856,  3,  1,  4,  68, 0,  0,  HexagonImpOpBase + 0, 483,  0|(1ULL<<MCID::Pseudo), 0xc4800000ULL },  // Inst #856 = dup_A4_combineii
6172
    { 855,  2,  1,  4,  69, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8000ULL },  // Inst #855 = dup_A2_zxth
6173
    { 854,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #854 = dup_A2_zxtb
6174
    { 853,  2,  1,  4,  69, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x212808000ULL },  // Inst #853 = dup_A2_tfrsi
6175
    { 852,  2,  1,  4,  69, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8000ULL },  // Inst #852 = dup_A2_tfr
6176
    { 851,  2,  1,  4,  69, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8000ULL },  // Inst #851 = dup_A2_sxth
6177
    { 850,  2,  1,  4,  69, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8000ULL },  // Inst #850 = dup_A2_sxtb
6178
    { 849,  3,  1,  4,  68, 0,  0,  HexagonImpOpBase + 0, 483,  0|(1ULL<<MCID::Pseudo), 0x112800000ULL },  // Inst #849 = dup_A2_combineii
6179
    { 848,  3,  1,  4,  68, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::Pseudo), 0x154808000ULL },  // Inst #848 = dup_A2_andir
6180
    { 847,  3,  1,  4,  68, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::Pseudo), 0x214808002ULL },  // Inst #847 = dup_A2_addi
6181
    { 846,  3,  1,  4,  68, 0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Pseudo), 0x8001ULL },  // Inst #846 = dup_A2_add
6182
    { 845,  0,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #845 = Y2_k1unlock_map
6183
    { 844,  0,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #844 = Y2_k1lock_map
6184
    { 843,  1,  0,  4,  67, 0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x26ULL },  // Inst #843 = Y2_dcfetch
6185
    { 842,  2,  1,  4,  66, 0,  0,  HexagonImpOpBase + 0, 481,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #842 = Y2_crswap_old
6186
    { 841,  2,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 173,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #841 = V6_zldp0
6187
    { 840,  1,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 260,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #840 = V6_zld0
6188
    { 839,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 453,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #839 = V6_vzh_alt
6189
    { 838,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 453,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #838 = V6_vzb_alt
6190
    { 837,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 453,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #837 = V6_vunpackuh_alt
6191
    { 836,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 453,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #836 = V6_vunpackub_alt
6192
    { 835,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 478,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #835 = V6_vunpackoh_alt
6193
    { 834,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 478,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #834 = V6_vunpackob_alt
6194
    { 833,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 453,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #833 = V6_vunpackh_alt
6195
    { 832,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 453,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #832 = V6_vunpackb_alt
6196
    { 831,  5,  2,  4,  2,  0,  0,  HexagonImpOpBase + 0, 473,  0|(1ULL<<MCID::Pseudo), 0x80c000000008026ULL },  // Inst #831 = V6_vtran2x2_map
6197
    { 830,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 394,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #830 = V6_vtmpyhb_alt
6198
    { 829,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 390,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #829 = V6_vtmpyhb_acc_alt
6199
    { 828,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 394,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #828 = V6_vtmpybus_alt
6200
    { 827,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 390,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #827 = V6_vtmpybus_acc_alt
6201
    { 826,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 394,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #826 = V6_vtmpyb_alt
6202
    { 825,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 390,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #825 = V6_vtmpyb_acc_alt
6203
    { 824,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #824 = V6_vsubwsat_dv_alt
6204
    { 823,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #823 = V6_vsubwsat_alt
6205
    { 822,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #822 = V6_vsubwq_alt
6206
    { 821,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #821 = V6_vsubwnq_alt
6207
    { 820,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #820 = V6_vsubw_dv_alt
6208
    { 819,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #819 = V6_vsubw_alt
6209
    { 818,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #818 = V6_vsubuwsat_dv_alt
6210
    { 817,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #817 = V6_vsubuwsat_alt
6211
    { 816,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #816 = V6_vsubuhw_alt
6212
    { 815,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #815 = V6_vsubuhsat_dv_alt
6213
    { 814,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #814 = V6_vsubuhsat_alt
6214
    { 813,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #813 = V6_vsububsat_dv_alt
6215
    { 812,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #812 = V6_vsububsat_alt
6216
    { 811,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #811 = V6_vsububh_alt
6217
    { 810,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #810 = V6_vsubhw_alt
6218
    { 809,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #809 = V6_vsubhsat_dv_alt
6219
    { 808,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #808 = V6_vsubhsat_alt
6220
    { 807,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #807 = V6_vsubhq_alt
6221
    { 806,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #806 = V6_vsubhnq_alt
6222
    { 805,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #805 = V6_vsubh_dv_alt
6223
    { 804,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #804 = V6_vsubh_alt
6224
    { 803,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #803 = V6_vsubbsat_dv_alt
6225
    { 802,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #802 = V6_vsubbsat_alt
6226
    { 801,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #801 = V6_vsubbq_alt
6227
    { 800,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #800 = V6_vsubbnq_alt
6228
    { 799,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #799 = V6_vsubb_dv_alt
6229
    { 798,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #798 = V6_vsubb_alt
6230
    { 797,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #797 = V6_vshufoh_alt
6231
    { 796,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #796 = V6_vshufoeh_alt
6232
    { 795,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #795 = V6_vshufoeb_alt
6233
    { 794,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #794 = V6_vshuffob_alt
6234
    { 793,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #793 = V6_vshuffh_alt
6235
    { 792,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #792 = V6_vshuffeb_alt
6236
    { 791,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #791 = V6_vshuffb_alt
6237
    { 790,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #790 = V6_vshufeh_alt
6238
    { 789,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 453,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #789 = V6_vsh_alt
6239
    { 788,  5,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 459,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #788 = V6_vscattermwq_alt
6240
    { 787,  5,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 468,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #787 = V6_vscattermwhq_alt
6241
    { 786,  4,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 464,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #786 = V6_vscattermwh_alt
6242
    { 785,  4,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 464,  0|(1ULL<<MCID::Pseudo), 0x840000000000026ULL },  // Inst #785 = V6_vscattermwh_add_alt
6243
    { 784,  4,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 455,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #784 = V6_vscattermw_alt
6244
    { 783,  4,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 455,  0|(1ULL<<MCID::Pseudo), 0x840000000000026ULL },  // Inst #783 = V6_vscattermw_add_alt
6245
    { 782,  5,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 459,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #782 = V6_vscattermhq_alt
6246
    { 781,  4,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 455,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #781 = V6_vscattermh_alt
6247
    { 780,  4,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 455,  0|(1ULL<<MCID::Pseudo), 0x840000000000026ULL },  // Inst #780 = V6_vscattermh_add_alt
6248
    { 779,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 453,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #779 = V6_vsb_alt
6249
    { 778,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #778 = V6_vsatwh_alt
6250
    { 777,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #777 = V6_vsatuwuh_alt
6251
    { 776,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #776 = V6_vsathub_alt
6252
    { 775,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 449,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #775 = V6_vrsadubi_alt
6253
    { 774,  5,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 444,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #774 = V6_vrsadubi_acc_alt
6254
    { 773,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #773 = V6_vroundwuh_alt
6255
    { 772,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #772 = V6_vroundwh_alt
6256
    { 771,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #771 = V6_vrounduwuh_alt
6257
    { 770,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #770 = V6_vrounduhub_alt
6258
    { 769,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #769 = V6_vroundhub_alt
6259
    { 768,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #768 = V6_vroundhb_alt
6260
    { 767,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #767 = V6_vrotr_alt
6261
    { 766,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #766 = V6_vrmpyubv_alt
6262
    { 765,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 404,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #765 = V6_vrmpyubv_acc_alt
6263
    { 764,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 449,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #764 = V6_vrmpyubi_alt
6264
    { 763,  5,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 444,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #763 = V6_vrmpyubi_acc_alt
6265
    { 762,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 441,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #762 = V6_vrmpyub_rtt_alt
6266
    { 761,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 437,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #761 = V6_vrmpyub_rtt_acc_alt
6267
    { 760,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #760 = V6_vrmpyub_alt
6268
    { 759,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #759 = V6_vrmpyub_acc_alt
6269
    { 758,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #758 = V6_vrmpybv_alt
6270
    { 757,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 404,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #757 = V6_vrmpybv_acc_alt
6271
    { 756,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #756 = V6_vrmpybusv_alt
6272
    { 755,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 404,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #755 = V6_vrmpybusv_acc_alt
6273
    { 754,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 449,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #754 = V6_vrmpybusi_alt
6274
    { 753,  5,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 444,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #753 = V6_vrmpybusi_acc_alt
6275
    { 752,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #752 = V6_vrmpybus_alt
6276
    { 751,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #751 = V6_vrmpybus_acc_alt
6277
    { 750,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 441,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #750 = V6_vrmpybub_rtt_alt
6278
    { 749,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 437,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #749 = V6_vrmpybub_rtt_acc_alt
6279
    { 748,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #748 = V6_vpopcounth_alt
6280
    { 747,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #747 = V6_vpackwuh_sat_alt
6281
    { 746,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #746 = V6_vpackwh_sat_alt
6282
    { 745,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #745 = V6_vpackoh_alt
6283
    { 744,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #744 = V6_vpackob_alt
6284
    { 743,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #743 = V6_vpackhub_sat_alt
6285
    { 742,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #742 = V6_vpackhb_sat_alt
6286
    { 741,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #741 = V6_vpackeh_alt
6287
    { 740,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #740 = V6_vpackeb_alt
6288
    { 739,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #739 = V6_vnormamtw_alt
6289
    { 738,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #738 = V6_vnormamth_alt
6290
    { 737,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #737 = V6_vnavgw_alt
6291
    { 736,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #736 = V6_vnavgub_alt
6292
    { 735,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #735 = V6_vnavgh_alt
6293
    { 734,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #734 = V6_vnavgb_alt
6294
    { 733,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #733 = V6_vmpyuhv_alt
6295
    { 732,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 359,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #732 = V6_vmpyuhv_acc_alt
6296
    { 731,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 434,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #731 = V6_vmpyuh_alt
6297
    { 730,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 430,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #730 = V6_vmpyuh_acc_alt
6298
    { 729,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #729 = V6_vmpyubv_alt
6299
    { 728,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 359,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #728 = V6_vmpyubv_acc_alt
6300
    { 727,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 434,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #727 = V6_vmpyub_alt
6301
    { 726,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 430,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #726 = V6_vmpyub_acc_alt
6302
    { 725,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 404,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #725 = V6_vmpyowh_sacc_alt
6303
    { 724,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 404,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #724 = V6_vmpyowh_rnd_sacc_alt
6304
    { 723,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #723 = V6_vmpyowh_rnd_alt
6305
    { 722,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #722 = V6_vmpyowh_alt
6306
    { 721,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #721 = V6_vmpyiwub_alt
6307
    { 720,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #720 = V6_vmpyiwub_acc_alt
6308
    { 719,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #719 = V6_vmpyiwh_alt
6309
    { 718,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #718 = V6_vmpyiwh_acc_alt
6310
    { 717,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #717 = V6_vmpyiwb_alt
6311
    { 716,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #716 = V6_vmpyiwb_acc_alt
6312
    { 715,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #715 = V6_vmpyiowh_alt
6313
    { 714,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #714 = V6_vmpyihb_alt
6314
    { 713,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #713 = V6_vmpyihb_acc_alt
6315
    { 712,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #712 = V6_vmpyih_alt
6316
    { 711,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 404,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #711 = V6_vmpyih_acc_alt
6317
    { 710,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #710 = V6_vmpyiewuh_alt
6318
    { 709,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 404,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #709 = V6_vmpyiewuh_acc_alt
6319
    { 708,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 404,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #708 = V6_vmpyiewh_acc_alt
6320
    { 707,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #707 = V6_vmpyhvsrs_alt
6321
    { 706,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #706 = V6_vmpyhv_alt
6322
    { 705,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 359,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #705 = V6_vmpyhv_acc_alt
6323
    { 704,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #704 = V6_vmpyhus_alt
6324
    { 703,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 359,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #703 = V6_vmpyhus_acc_alt
6325
    { 702,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #702 = V6_vmpyhss_alt
6326
    { 701,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #701 = V6_vmpyhsrs_alt
6327
    { 700,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 430,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #700 = V6_vmpyhsat_acc_alt
6328
    { 699,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 434,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #699 = V6_vmpyh_alt
6329
    { 698,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 430,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #698 = V6_vmpyh_acc_alt
6330
    { 697,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #697 = V6_vmpyewuh_alt
6331
    { 696,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #696 = V6_vmpybv_alt
6332
    { 695,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 359,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #695 = V6_vmpybv_acc_alt
6333
    { 694,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #694 = V6_vmpybusv_alt
6334
    { 693,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 359,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #693 = V6_vmpybusv_acc_alt
6335
    { 692,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 434,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #692 = V6_vmpybus_alt
6336
    { 691,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 430,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #691 = V6_vmpybus_acc_alt
6337
    { 690,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 394,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #690 = V6_vmpauhb_alt
6338
    { 689,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 390,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #689 = V6_vmpauhb_acc_alt
6339
    { 688,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 394,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #688 = V6_vmpahb_alt
6340
    { 687,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 390,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #687 = V6_vmpahb_acc_alt
6341
    { 686,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #686 = V6_vmpabuuv_alt
6342
    { 685,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 394,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #685 = V6_vmpabuu_alt
6343
    { 684,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 390,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #684 = V6_vmpabuu_acc_alt
6344
    { 683,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #683 = V6_vmpabusv_alt
6345
    { 682,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 394,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #682 = V6_vmpabus_alt
6346
    { 681,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 390,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #681 = V6_vmpabus_acc_alt
6347
    { 680,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #680 = V6_vminw_alt
6348
    { 679,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #679 = V6_vminuh_alt
6349
    { 678,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #678 = V6_vminub_alt
6350
    { 677,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #677 = V6_vminh_alt
6351
    { 676,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #676 = V6_vminb_alt
6352
    { 675,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #675 = V6_vmaxw_alt
6353
    { 674,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #674 = V6_vmaxuh_alt
6354
    { 673,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #673 = V6_vmaxub_alt
6355
    { 672,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #672 = V6_vmaxh_alt
6356
    { 671,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #671 = V6_vmaxb_alt
6357
    { 670,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #670 = V6_vlsrwv_alt
6358
    { 669,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #669 = V6_vlsrw_alt
6359
    { 668,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #668 = V6_vlsrhv_alt
6360
    { 667,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #667 = V6_vlsrh_alt
6361
    { 666,  6,  0,  4,  65, 0,  0,  HexagonImpOpBase + 0, 413,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1b0000000007ULL },  // Inst #666 = V6_vgathermwq_pseudo
6362
    { 665,  5,  0,  4,  65, 0,  0,  HexagonImpOpBase + 0, 408,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1b0000000007ULL },  // Inst #665 = V6_vgathermw_pseudo
6363
    { 664,  6,  0,  4,  65, 0,  0,  HexagonImpOpBase + 0, 424,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x130000000007ULL },  // Inst #664 = V6_vgathermhwq_pseudo
6364
    { 663,  5,  0,  4,  65, 0,  0,  HexagonImpOpBase + 0, 419,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x130000000007ULL },  // Inst #663 = V6_vgathermhw_pseudo
6365
    { 662,  6,  0,  4,  65, 0,  0,  HexagonImpOpBase + 0, 413,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x130000000007ULL },  // Inst #662 = V6_vgathermhq_pseudo
6366
    { 661,  5,  0,  4,  65, 0,  0,  HexagonImpOpBase + 0, 408,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x130000000007ULL },  // Inst #661 = V6_vgathermh_pseudo
6367
    { 660,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 394,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #660 = V6_vdsaduh_alt
6368
    { 659,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 390,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #659 = V6_vdsaduh_acc_alt
6369
    { 658,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #658 = V6_vdmpyhvsat_alt
6370
    { 657,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 404,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #657 = V6_vdmpyhvsat_acc_alt
6371
    { 656,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #656 = V6_vdmpyhsusat_alt
6372
    { 655,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #655 = V6_vdmpyhsusat_acc_alt
6373
    { 654,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 401,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #654 = V6_vdmpyhsuisat_alt
6374
    { 653,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 397,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #653 = V6_vdmpyhsuisat_acc_alt
6375
    { 652,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #652 = V6_vdmpyhsat_alt
6376
    { 651,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #651 = V6_vdmpyhsat_acc_alt
6377
    { 650,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 401,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #650 = V6_vdmpyhisat_alt
6378
    { 649,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 397,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #649 = V6_vdmpyhisat_acc_alt
6379
    { 648,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 394,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #648 = V6_vdmpyhb_dv_alt
6380
    { 647,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 390,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #647 = V6_vdmpyhb_dv_acc_alt
6381
    { 646,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #646 = V6_vdmpyhb_alt
6382
    { 645,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #645 = V6_vdmpyhb_acc_alt
6383
    { 644,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 394,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #644 = V6_vdmpybus_dv_alt
6384
    { 643,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 390,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #643 = V6_vdmpybus_dv_acc_alt
6385
    { 642,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #642 = V6_vdmpybus_alt
6386
    { 641,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #641 = V6_vdmpybus_acc_alt
6387
    { 640,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #640 = V6_vdealh_alt
6388
    { 639,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #639 = V6_vdealb_alt
6389
    { 638,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #638 = V6_vdealb4w_alt
6390
    { 637,  1,  1,  4,  64, 0,  0,  HexagonImpOpBase + 0, 261,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #637 = V6_vdd0
6391
    { 636,  1,  1,  4,  60, 0,  0,  HexagonImpOpBase + 0, 389,  0|(1ULL<<MCID::Pseudo), 0x800000000008010ULL },  // Inst #636 = V6_vd0
6392
    { 635,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #635 = V6_vcl0w_alt
6393
    { 634,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #634 = V6_vcl0h_alt
6394
    { 633,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #633 = V6_vavgwrnd_alt
6395
    { 632,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #632 = V6_vavgw_alt
6396
    { 631,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #631 = V6_vavguwrnd_alt
6397
    { 630,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #630 = V6_vavguw_alt
6398
    { 629,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #629 = V6_vavguhrnd_alt
6399
    { 628,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #628 = V6_vavguh_alt
6400
    { 627,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #627 = V6_vavgubrnd_alt
6401
    { 626,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #626 = V6_vavgub_alt
6402
    { 625,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #625 = V6_vavghrnd_alt
6403
    { 624,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #624 = V6_vavgh_alt
6404
    { 623,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #623 = V6_vavgbrnd_alt
6405
    { 622,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #622 = V6_vavgb_alt
6406
    { 621,  2,  1,  4,  60, 0,  0,  HexagonImpOpBase + 0, 387,  0|(1ULL<<MCID::Pseudo), 0x800000000008011ULL },  // Inst #621 = V6_vassignp
6407
    { 620,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #620 = V6_vasrwv_alt
6408
    { 619,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #619 = V6_vasrw_alt
6409
    { 618,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #618 = V6_vasrw_acc_alt
6410
    { 617,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #617 = V6_vasrhv_alt
6411
    { 616,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #616 = V6_vasrh_alt
6412
    { 615,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #615 = V6_vasrh_acc_alt
6413
    { 614,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 359,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #614 = V6_vasr_into_alt
6414
    { 613,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #613 = V6_vaslwv_alt
6415
    { 612,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #612 = V6_vaslw_alt
6416
    { 611,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #611 = V6_vaslw_acc_alt
6417
    { 610,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #610 = V6_vaslhv_alt
6418
    { 609,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 384,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #609 = V6_vaslh_alt
6419
    { 608,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 380,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #608 = V6_vaslh_acc_alt
6420
    { 607,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 377,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #607 = V6_vandvrt_alt
6421
    { 606,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 373,  0|(1ULL<<MCID::Pseudo), 0x840000000000026ULL },  // Inst #606 = V6_vandvrt_acc_alt
6422
    { 605,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 370,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #605 = V6_vandqrt_alt
6423
    { 604,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 366,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #604 = V6_vandqrt_acc_alt
6424
    { 603,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 370,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #603 = V6_vandnqrt_alt
6425
    { 602,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 366,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #602 = V6_vandnqrt_acc_alt
6426
    { 601,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #601 = V6_vaddwsat_dv_alt
6427
    { 600,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #600 = V6_vaddwsat_alt
6428
    { 599,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #599 = V6_vaddwq_alt
6429
    { 598,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #598 = V6_vaddwnq_alt
6430
    { 597,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #597 = V6_vaddw_dv_alt
6431
    { 596,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #596 = V6_vaddw_alt
6432
    { 595,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #595 = V6_vadduwsat_dv_alt
6433
    { 594,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #594 = V6_vadduwsat_alt
6434
    { 593,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #593 = V6_vadduhw_alt
6435
    { 592,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 359,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #592 = V6_vadduhw_acc_alt
6436
    { 591,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #591 = V6_vadduhsat_dv_alt
6437
    { 590,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #590 = V6_vadduhsat_alt
6438
    { 589,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #589 = V6_vaddubsat_dv_alt
6439
    { 588,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #588 = V6_vaddubsat_alt
6440
    { 587,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #587 = V6_vaddubh_alt
6441
    { 586,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 359,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #586 = V6_vaddubh_acc_alt
6442
    { 585,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 363,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #585 = V6_vaddhw_alt
6443
    { 584,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 359,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #584 = V6_vaddhw_acc_alt
6444
    { 583,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #583 = V6_vaddhsat_dv_alt
6445
    { 582,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #582 = V6_vaddhsat_alt
6446
    { 581,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #581 = V6_vaddhq_alt
6447
    { 580,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #580 = V6_vaddhnq_alt
6448
    { 579,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #579 = V6_vaddh_dv_alt
6449
    { 578,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #578 = V6_vaddh_alt
6450
    { 577,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #577 = V6_vaddbsat_dv_alt
6451
    { 576,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #576 = V6_vaddbsat_alt
6452
    { 575,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #575 = V6_vaddbq_alt
6453
    { 574,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 355,  0|(1ULL<<MCID::Pseudo), 0x840000000008026ULL },  // Inst #574 = V6_vaddbnq_alt
6454
    { 573,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 352,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #573 = V6_vaddb_dv_alt
6455
    { 572,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #572 = V6_vaddb_alt
6456
    { 571,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #571 = V6_vabsw_sat_alt
6457
    { 570,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #570 = V6_vabsw_alt
6458
    { 569,  2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #569 = V6_vabsuw_alt
6459
    { 568,  2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #568 = V6_vabsuh_alt
6460
    { 567,  2,  1,  4,  63, 0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #567 = V6_vabsub_alt
6461
    { 566,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #566 = V6_vabsh_sat_alt
6462
    { 565,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #565 = V6_vabsh_alt
6463
    { 564,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #564 = V6_vabsdiffw_alt
6464
    { 563,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #563 = V6_vabsdiffuh_alt
6465
    { 562,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #562 = V6_vabsdiffub_alt
6466
    { 561,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 349,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #561 = V6_vabsdiffh_alt
6467
    { 560,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #560 = V6_vabsb_sat_alt
6468
    { 559,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 347,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #559 = V6_vabsb_alt
6469
    { 558,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 338,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #558 = V6_v6mpyvubs10_alt
6470
    { 557,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 338,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #557 = V6_v6mpyhubs10_alt
6471
    { 556,  5,  1,  4,  62, 0,  0,  HexagonImpOpBase + 0, 342,  0|(1ULL<<MCID::Pseudo), 0x84000000000801cULL },  // Inst #556 = V6_v10mpyubs10_vxx
6472
    { 555,  4,  1,  4,  61, 0,  0,  HexagonImpOpBase + 0, 338,  0|(1ULL<<MCID::Pseudo), 0x80000000000801cULL },  // Inst #555 = V6_v10mpyubs10
6473
    { 554,  3,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 332,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #554 = V6_stup0
6474
    { 553,  3,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 332,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #553 = V6_stunp0
6475
    { 552,  2,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 330,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #552 = V6_stu0
6476
    { 551,  3,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 335,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #551 = V6_stqnt0
6477
    { 550,  3,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 335,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #550 = V6_stq0
6478
    { 549,  3,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 332,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #549 = V6_stpnt0
6479
    { 548,  3,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 332,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #548 = V6_stp0
6480
    { 547,  2,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 330,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #547 = V6_stnt0
6481
    { 546,  3,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 335,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #546 = V6_stnqnt0
6482
    { 545,  3,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 335,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #545 = V6_stnq0
6483
    { 544,  3,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 332,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #544 = V6_stnpnt0
6484
    { 543,  3,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 332,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #543 = V6_stnp0
6485
    { 542,  2,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 330,  0|(1ULL<<MCID::Pseudo), 0x800000000010014ULL },  // Inst #542 = V6_stnnt0
6486
    { 541,  2,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 330,  0|(1ULL<<MCID::Pseudo), 0x800000000010014ULL },  // Inst #541 = V6_stn0
6487
    { 540,  2,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 330,  0|(1ULL<<MCID::Pseudo), 0x800000000000014ULL },  // Inst #540 = V6_st0
6488
    { 539,  2,  1,  4,  60, 0,  0,  HexagonImpOpBase + 0, 325,  0|(1ULL<<MCID::Pseudo), 0x800000000008010ULL },  // Inst #539 = V6_lo
6489
    { 538,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 277,  0|(1ULL<<MCID::Pseudo), 0x800000000008012ULL },  // Inst #538 = V6_ldu0
6490
    { 537,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #537 = V6_ldtpnt0
6491
    { 536,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #536 = V6_ldtp0
6492
    { 535,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #535 = V6_ldtnpnt0
6493
    { 534,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #534 = V6_ldtnp0
6494
    { 533,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #533 = V6_ldpnt0
6495
    { 532,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #532 = V6_ldp0
6496
    { 531,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 277,  0|(1ULL<<MCID::Pseudo), 0x800000000008012ULL },  // Inst #531 = V6_ldnt0
6497
    { 530,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #530 = V6_ldnpnt0
6498
    { 529,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #529 = V6_ldnp0
6499
    { 528,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #528 = V6_ldcpnt0
6500
    { 527,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #527 = V6_ldcp0
6501
    { 526,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #526 = V6_ldcnpnt0
6502
    { 525,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 327,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #525 = V6_ldcnp0
6503
    { 524,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 277,  0|(1ULL<<MCID::Pseudo), 0x800000000008012ULL },  // Inst #524 = V6_ld0
6504
    { 523,  2,  1,  4,  60, 0,  0,  HexagonImpOpBase + 0, 325,  0|(1ULL<<MCID::Pseudo), 0x800000000008010ULL },  // Inst #523 = V6_hi
6505
    { 522,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 322,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #522 = V6_extractw_alt
6506
    { 521,  2,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 320,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x800000000000026ULL },  // Inst #521 = V6_dbl_st0
6507
    { 520,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 318,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x800000000408026ULL },  // Inst #520 = V6_dbl_ld0
6508
    { 519,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 314,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #519 = V6_MAP_equw_xor
6509
    { 518,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 314,  0|(1ULL<<MCID::Pseudo), 0x840000000000026ULL },  // Inst #518 = V6_MAP_equw_ior
6510
    { 517,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 314,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #517 = V6_MAP_equw_and
6511
    { 516,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 311,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #516 = V6_MAP_equw
6512
    { 515,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 314,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #515 = V6_MAP_equh_xor
6513
    { 514,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 314,  0|(1ULL<<MCID::Pseudo), 0x840000000000026ULL },  // Inst #514 = V6_MAP_equh_ior
6514
    { 513,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 314,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #513 = V6_MAP_equh_and
6515
    { 512,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 311,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #512 = V6_MAP_equh
6516
    { 511,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 314,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #511 = V6_MAP_equb_xor
6517
    { 510,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 314,  0|(1ULL<<MCID::Pseudo), 0x840000000000026ULL },  // Inst #510 = V6_MAP_equb_ior
6518
    { 509,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 314,  0|(1ULL<<MCID::Pseudo), 0x800000000000026ULL },  // Inst #509 = V6_MAP_equb_and
6519
    { 508,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 311,  0|(1ULL<<MCID::Pseudo), 0x800000000008026ULL },  // Inst #508 = V6_MAP_equb
6520
    { 507,  3,  0,  4,  59, 0,  0,  HexagonImpOpBase + 0, 308,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1b2800029ULL },  // Inst #507 = STriw_pred
6521
    { 506,  3,  0,  4,  59, 0,  0,  HexagonImpOpBase + 0, 305,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1b2800029ULL },  // Inst #506 = STriw_ctr
6522
    { 505,  1,  0,  4,  58, 0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #505 = S6_allocframe_to_raw
6523
    { 504,  3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 292,  0|(1ULL<<MCID::Pseudo), 0x2bULL },  // Inst #504 = S5_vasrhrnd_goodsyntax
6524
    { 503,  3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 302,  0|(1ULL<<MCID::Pseudo), 0x802bULL },  // Inst #503 = S5_asrhub_rnd_sat_goodsyntax
6525
    { 502,  3,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #502 = S4_storeiritnew_zomap
6526
    { 501,  3,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #501 = S4_storeirit_zomap
6527
    { 500,  3,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #500 = S4_storeirifnew_zomap
6528
    { 499,  3,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #499 = S4_storeirif_zomap
6529
    { 498,  2,  0,  4,  55, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #498 = S4_storeiri_zomap
6530
    { 497,  3,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #497 = S4_storeirhtnew_zomap
6531
    { 496,  3,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #496 = S4_storeirht_zomap
6532
    { 495,  3,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #495 = S4_storeirhfnew_zomap
6533
    { 494,  3,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #494 = S4_storeirhf_zomap
6534
    { 493,  2,  0,  4,  55, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #493 = S4_storeirh_zomap
6535
    { 492,  3,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #492 = S4_storeirbtnew_zomap
6536
    { 491,  3,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #491 = S4_storeirbt_zomap
6537
    { 490,  3,  0,  4,  57, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #490 = S4_storeirbfnew_zomap
6538
    { 489,  3,  0,  4,  56, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #489 = S4_storeirbf_zomap
6539
    { 488,  2,  0,  4,  55, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #488 = S4_storeirb_zomap
6540
    { 487,  3,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #487 = S4_pstoreritnew_zomap
6541
    { 486,  3,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #486 = S4_pstorerinewtnew_zomap
6542
    { 485,  3,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #485 = S4_pstorerinewfnew_zomap
6543
    { 484,  3,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #484 = S4_pstorerifnew_zomap
6544
    { 483,  3,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #483 = S4_pstorerhtnew_zomap
6545
    { 482,  3,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #482 = S4_pstorerhnewtnew_zomap
6546
    { 481,  3,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #481 = S4_pstorerhnewfnew_zomap
6547
    { 480,  3,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #480 = S4_pstorerhfnew_zomap
6548
    { 479,  3,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #479 = S4_pstorerftnew_zomap
6549
    { 478,  3,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #478 = S4_pstorerffnew_zomap
6550
    { 477,  3,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 160,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #477 = S4_pstorerdtnew_zomap
6551
    { 476,  3,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 160,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #476 = S4_pstorerdfnew_zomap
6552
    { 475,  3,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #475 = S4_pstorerbtnew_zomap
6553
    { 474,  3,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #474 = S4_pstorerbnewtnew_zomap
6554
    { 473,  3,  0,  4,  54, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #473 = S4_pstorerbnewfnew_zomap
6555
    { 472,  3,  0,  4,  39, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #472 = S4_pstorerbfnew_zomap
6556
    { 471,  5,  1,  4,  53, 0,  0,  HexagonImpOpBase + 0, 297,  0|(1ULL<<MCID::Pseudo), 0x802bULL },  // Inst #471 = S2_tableidxw_goodsyntax
6557
    { 470,  5,  1,  4,  53, 0,  0,  HexagonImpOpBase + 0, 297,  0|(1ULL<<MCID::Pseudo), 0x802bULL },  // Inst #470 = S2_tableidxh_goodsyntax
6558
    { 469,  5,  1,  4,  53, 0,  0,  HexagonImpOpBase + 0, 297,  0|(1ULL<<MCID::Pseudo), 0x802bULL },  // Inst #469 = S2_tableidxd_goodsyntax
6559
    { 468,  5,  1,  4,  53, 0,  0,  HexagonImpOpBase + 0, 297,  0|(1ULL<<MCID::Pseudo), 0x802bULL },  // Inst #468 = S2_tableidxb_goodsyntax
6560
    { 467,  2,  0,  4,  52, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x10026ULL },  // Inst #467 = S2_storerinew_zomap
6561
    { 466,  2,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #466 = S2_storeri_zomap
6562
    { 465,  2,  0,  4,  52, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x10026ULL },  // Inst #465 = S2_storerhnew_zomap
6563
    { 464,  2,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #464 = S2_storerh_zomap
6564
    { 463,  2,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #463 = S2_storerf_zomap
6565
    { 462,  2,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 295,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #462 = S2_storerd_zomap
6566
    { 461,  2,  0,  4,  52, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x10026ULL },  // Inst #461 = S2_storerbnew_zomap
6567
    { 460,  2,  0,  4,  51, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #460 = S2_storerb_zomap
6568
    { 459,  3,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #459 = S2_pstorerit_zomap
6569
    { 458,  3,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #458 = S2_pstorerinewt_zomap
6570
    { 457,  3,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #457 = S2_pstorerinewf_zomap
6571
    { 456,  3,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #456 = S2_pstorerif_zomap
6572
    { 455,  3,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #455 = S2_pstorerht_zomap
6573
    { 454,  3,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #454 = S2_pstorerhnewt_zomap
6574
    { 453,  3,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #453 = S2_pstorerhnewf_zomap
6575
    { 452,  3,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #452 = S2_pstorerhf_zomap
6576
    { 451,  3,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #451 = S2_pstorerft_zomap
6577
    { 450,  3,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #450 = S2_pstorerff_zomap
6578
    { 449,  3,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 160,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #449 = S2_pstorerdt_zomap
6579
    { 448,  3,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 160,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #448 = S2_pstorerdf_zomap
6580
    { 447,  3,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #447 = S2_pstorerbt_zomap
6581
    { 446,  3,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #446 = S2_pstorerbnewt_zomap
6582
    { 445,  3,  0,  4,  50, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x20026ULL },  // Inst #445 = S2_pstorerbnewf_zomap
6583
    { 444,  3,  0,  4,  49, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #444 = S2_pstorerbf_zomap
6584
    { 443,  3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::Pseudo), 0x802bULL },  // Inst #443 = S2_asr_i_r_rnd_goodsyntax
6585
    { 442,  3,  1,  4,  48, 0,  0,  HexagonImpOpBase + 0, 292,  0|(1ULL<<MCID::Pseudo), 0x2bULL },  // Inst #442 = S2_asr_i_p_rnd_goodsyntax
6586
    { 441,  4,  1,  4,  47, 0,  0,  HexagonImpOpBase + 0, 288,  0|(1ULL<<MCID::Pseudo), 0x11ULL },  // Inst #441 = PS_wselect
6587
    { 440,  3,  0,  4,  46, 0,  0,  HexagonImpOpBase + 0, 285,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x280000000014ULL },  // Inst #440 = PS_vstorerw_nt_ai
6588
    { 439,  3,  0,  4,  46, 0,  0,  HexagonImpOpBase + 0, 285,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x280000000014ULL },  // Inst #439 = PS_vstorerw_ai
6589
    { 438,  3,  0,  4,  46, 0,  0,  HexagonImpOpBase + 0, 282,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x280000000014ULL },  // Inst #438 = PS_vstorerv_nt_ai
6590
    { 437,  3,  0,  4,  46, 0,  0,  HexagonImpOpBase + 0, 282,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x280000000014ULL },  // Inst #437 = PS_vstorerv_ai
6591
    { 436,  3,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 279,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x28ULL },  // Inst #436 = PS_vstorerq_ai
6592
    { 435,  2,  1,  4,  45, 0,  0,  HexagonImpOpBase + 0, 277,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook), 0x1eULL },  // Inst #435 = PS_vsplatrw
6593
    { 434,  2,  1,  4,  45, 0,  0,  HexagonImpOpBase + 0, 277,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook), 0x1eULL },  // Inst #434 = PS_vsplatrh
6594
    { 433,  2,  1,  4,  45, 0,  0,  HexagonImpOpBase + 0, 277,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook), 0x1eULL },  // Inst #433 = PS_vsplatrb
6595
    { 432,  2,  1,  4,  45, 0,  0,  HexagonImpOpBase + 0, 275,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook), 0x1eULL },  // Inst #432 = PS_vsplatiw
6596
    { 431,  2,  1,  4,  45, 0,  0,  HexagonImpOpBase + 0, 275,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook), 0x1eULL },  // Inst #431 = PS_vsplatih
6597
    { 430,  2,  1,  4,  45, 0,  0,  HexagonImpOpBase + 0, 275,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook), 0x1eULL },  // Inst #430 = PS_vsplatib
6598
    { 429,  4,  1,  4,  44, 0,  0,  HexagonImpOpBase + 0, 271,  0|(1ULL<<MCID::Pseudo), 0x10ULL },  // Inst #429 = PS_vselect
6599
    { 428,  4,  1,  4,  43, 0,  0,  HexagonImpOpBase + 0, 203,  0|(1ULL<<MCID::Pseudo), 0x28ULL },  // Inst #428 = PS_vmulw_acc
6600
    { 427,  3,  1,  4,  43, 0,  0,  HexagonImpOpBase + 0, 157,  0|(1ULL<<MCID::Pseudo), 0x28ULL },  // Inst #427 = PS_vmulw
6601
    { 426,  3,  1,  4,  42, 0,  0,  HexagonImpOpBase + 0, 268,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x280000000012ULL },  // Inst #426 = PS_vloadrw_nt_ai
6602
    { 425,  3,  1,  4,  42, 0,  0,  HexagonImpOpBase + 0, 268,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x280000000012ULL },  // Inst #425 = PS_vloadrw_ai
6603
    { 424,  3,  1,  4,  42, 0,  0,  HexagonImpOpBase + 0, 265,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x280000000012ULL },  // Inst #424 = PS_vloadrv_nt_ai
6604
    { 423,  3,  1,  4,  42, 0,  0,  HexagonImpOpBase + 0, 265,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x280000000012ULL },  // Inst #423 = PS_vloadrv_ai
6605
    { 422,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 262,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x28ULL },  // Inst #422 = PS_vloadrq_ai
6606
    { 421,  1,  1,  4,  41, 0,  0,  HexagonImpOpBase + 0, 261,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x11ULL },  // Inst #421 = PS_vdd0
6607
    { 420,  1,  1,  4,  11, 0,  0,  HexagonImpOpBase + 0, 183,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x5ULL },  // Inst #420 = PS_true
6608
    { 419,  1,  0,  4,  40, 0,  1,  HexagonImpOpBase + 55,  260,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x1000000023ULL },  // Inst #419 = PS_tailcall_r
6609
    { 418,  1,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x28ULL },  // Inst #418 = PS_tailcall_i
6610
    { 417,  5,  1,  4,  39, 1,  1,  HexagonImpOpBase + 53,  244,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1e0000000029ULL },  // Inst #417 = PS_storeri_pcr
6611
    { 416,  6,  1,  4,  38, 1,  1,  HexagonImpOpBase + 53,  238,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1e0000000029ULL },  // Inst #416 = PS_storeri_pci
6612
    { 415,  5,  1,  4,  39, 1,  1,  HexagonImpOpBase + 53,  244,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x160000000029ULL },  // Inst #415 = PS_storerh_pcr
6613
    { 414,  6,  1,  4,  38, 1,  1,  HexagonImpOpBase + 53,  238,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x160000000029ULL },  // Inst #414 = PS_storerh_pci
6614
    { 413,  5,  1,  4,  39, 1,  1,  HexagonImpOpBase + 53,  244,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x160000000029ULL },  // Inst #413 = PS_storerf_pcr
6615
    { 412,  6,  1,  4,  38, 1,  1,  HexagonImpOpBase + 53,  238,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x160000000029ULL },  // Inst #412 = PS_storerf_pci
6616
    { 411,  5,  1,  4,  39, 1,  1,  HexagonImpOpBase + 53,  255,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1e0000000029ULL },  // Inst #411 = PS_storerd_pcr
6617
    { 410,  6,  1,  4,  38, 1,  1,  HexagonImpOpBase + 53,  249,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x1e0000000029ULL },  // Inst #410 = PS_storerd_pci
6618
    { 409,  5,  1,  4,  39, 1,  1,  HexagonImpOpBase + 53,  244,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0xe0000000029ULL },  // Inst #409 = PS_storerb_pcr
6619
    { 408,  6,  1,  4,  38, 1,  1,  HexagonImpOpBase + 53,  238,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0xe0000000029ULL },  // Inst #408 = PS_storerb_pci
6620
    { 407,  1,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 237,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x10ULL },  // Inst #407 = PS_qtrue
6621
    { 406,  1,  1,  4,  37, 0,  0,  HexagonImpOpBase + 0, 237,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x10ULL },  // Inst #406 = PS_qfalse
6622
    { 405,  4,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 233,  0|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #405 = PS_pselect
6623
    { 404,  5,  2,  4,  20, 1,  1,  HexagonImpOpBase + 53,  217,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x160000000024ULL },  // Inst #404 = PS_loadruh_pcr
6624
    { 403,  6,  2,  4,  36, 1,  1,  HexagonImpOpBase + 53,  211,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x160000000024ULL },  // Inst #403 = PS_loadruh_pci
6625
    { 402,  5,  2,  4,  20, 1,  1,  HexagonImpOpBase + 53,  217,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0xe0000000024ULL },  // Inst #402 = PS_loadrub_pcr
6626
    { 401,  6,  2,  4,  36, 1,  1,  HexagonImpOpBase + 53,  211,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0xe0000000024ULL },  // Inst #401 = PS_loadrub_pci
6627
    { 400,  5,  2,  4,  20, 1,  1,  HexagonImpOpBase + 53,  217,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #400 = PS_loadri_pcr
6628
    { 399,  6,  2,  4,  36, 1,  1,  HexagonImpOpBase + 53,  211,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x1e0000000024ULL },  // Inst #399 = PS_loadri_pci
6629
    { 398,  5,  2,  4,  20, 1,  1,  HexagonImpOpBase + 53,  217,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x160000000024ULL },  // Inst #398 = PS_loadrh_pcr
6630
    { 397,  6,  2,  4,  36, 1,  1,  HexagonImpOpBase + 53,  211,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x160000000024ULL },  // Inst #397 = PS_loadrh_pci
6631
    { 396,  5,  2,  4,  20, 1,  1,  HexagonImpOpBase + 53,  228,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x260000000024ULL },  // Inst #396 = PS_loadrd_pcr
6632
    { 395,  6,  2,  4,  36, 1,  1,  HexagonImpOpBase + 53,  222,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x260000000024ULL },  // Inst #395 = PS_loadrd_pci
6633
    { 394,  5,  2,  4,  20, 1,  1,  HexagonImpOpBase + 53,  217,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0xe0000000024ULL },  // Inst #394 = PS_loadrb_pcr
6634
    { 393,  6,  2,  4,  36, 1,  1,  HexagonImpOpBase + 53,  211,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0xe0000000024ULL },  // Inst #393 = PS_loadrb_pci
6635
    { 392,  4,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 207,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x216800028ULL },  // Inst #392 = PS_fia
6636
    { 391,  3,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x214800028ULL },  // Inst #391 = PS_fi
6637
    { 390,  1,  1,  4,  11, 0,  0,  HexagonImpOpBase + 0, 183,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x5ULL },  // Inst #390 = PS_false
6638
    { 389,  0,  0,  4,  2,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0xa8ULL },  // Inst #389 = PS_crash
6639
    { 388,  1,  0,  4,  35, 0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0xb10800028ULL },  // Inst #388 = PS_call_nr
6640
    { 387,  2,  0,  4,  2,  0,  8,  HexagonImpOpBase + 45,  13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL },  // Inst #387 = PS_call_instrprof_custom
6641
    { 386,  3,  1,  4,  2,  0,  1,  HexagonImpOpBase + 44,  187,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x28ULL },  // Inst #386 = PS_alloca
6642
    { 385,  2,  1,  4,  2,  1,  0,  HexagonImpOpBase + 43,  143,  0|(1ULL<<MCID::Pseudo), 0x28ULL },  // Inst #385 = PS_aligna
6643
    { 384,  4,  1,  4,  34, 0,  0,  HexagonImpOpBase + 0, 203,  0|(1ULL<<MCID::Pseudo), 0x25ULL },  // Inst #384 = M7_vdmpy_acc
6644
    { 383,  3,  1,  4,  33, 0,  0,  HexagonImpOpBase + 0, 157,  0|(1ULL<<MCID::Pseudo), 0x25ULL },  // Inst #383 = M7_vdmpy
6645
    { 382,  3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 200,  0|(1ULL<<MCID::Pseudo), 0x8025ULL },  // Inst #382 = M2_vrcmpys_s1rp
6646
    { 381,  3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 197,  0|(1ULL<<MCID::Pseudo), 0x25ULL },  // Inst #381 = M2_vrcmpys_s1
6647
    { 380,  4,  1,  4,  32, 0,  0,  HexagonImpOpBase + 0, 193,  0|(1ULL<<MCID::Pseudo), 0x25ULL },  // Inst #380 = M2_vrcmpys_acc_s1
6648
    { 379,  3,  1,  4,  31, 0,  0,  HexagonImpOpBase + 0, 190,  0|(1ULL<<MCID::Pseudo), 0x8025ULL },  // Inst #379 = M2_mpyui
6649
    { 378,  3,  1,  4,  30, 0,  0,  HexagonImpOpBase + 0, 187,  0|(1ULL<<MCID::Pseudo), 0x134808025ULL },  // Inst #378 = M2_mpysmi
6650
    { 377,  3,  1,  4,  29, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x1b4800024ULL },  // Inst #377 = LDriw_pred
6651
    { 376,  3,  1,  4,  29, 0,  0,  HexagonImpOpBase + 0, 184,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x1b4800024ULL },  // Inst #376 = LDriw_ctr
6652
    { 375,  0,  0,  4,  28, 0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #375 = L6_return_map_to_raw
6653
    { 374,  0,  0,  4,  27, 0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #374 = L6_deallocframe_map_to_raw
6654
    { 373,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #373 = L4_sub_memopw_zomap
6655
    { 372,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #372 = L4_sub_memoph_zomap
6656
    { 371,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #371 = L4_sub_memopb_zomap
6657
    { 370,  1,  0,  4,  26, 0,  0,  HexagonImpOpBase + 0, 183,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #370 = L4_return_map_to_raw_tnew_pt
6658
    { 369,  1,  0,  4,  26, 0,  0,  HexagonImpOpBase + 0, 183,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #369 = L4_return_map_to_raw_tnew_pnt
6659
    { 368,  1,  0,  4,  25, 0,  0,  HexagonImpOpBase + 0, 183,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #368 = L4_return_map_to_raw_t
6660
    { 367,  1,  0,  4,  24, 0,  0,  HexagonImpOpBase + 0, 183,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #367 = L4_return_map_to_raw_fnew_pt
6661
    { 366,  1,  0,  4,  24, 0,  0,  HexagonImpOpBase + 0, 183,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #366 = L4_return_map_to_raw_fnew_pnt
6662
    { 365,  1,  0,  4,  23, 0,  0,  HexagonImpOpBase + 0, 183,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #365 = L4_return_map_to_raw_f
6663
    { 364,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #364 = L4_or_memopw_zomap
6664
    { 363,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #363 = L4_or_memoph_zomap
6665
    { 362,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #362 = L4_or_memopb_zomap
6666
    { 361,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #361 = L4_isub_memopw_zomap
6667
    { 360,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #360 = L4_isub_memoph_zomap
6668
    { 359,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #359 = L4_isub_memopb_zomap
6669
    { 358,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #358 = L4_ior_memopw_zomap
6670
    { 357,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #357 = L4_ior_memoph_zomap
6671
    { 356,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #356 = L4_ior_memopb_zomap
6672
    { 355,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #355 = L4_iand_memopw_zomap
6673
    { 354,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #354 = L4_iand_memoph_zomap
6674
    { 353,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #353 = L4_iand_memopb_zomap
6675
    { 352,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #352 = L4_iadd_memopw_zomap
6676
    { 351,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #351 = L4_iadd_memoph_zomap
6677
    { 350,  2,  0,  4,  22, 0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #350 = L4_iadd_memopb_zomap
6678
    { 349,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #349 = L4_and_memopw_zomap
6679
    { 348,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #348 = L4_and_memoph_zomap
6680
    { 347,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #347 = L4_and_memopb_zomap
6681
    { 346,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #346 = L4_add_memopw_zomap
6682
    { 345,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #345 = L4_add_memoph_zomap
6683
    { 344,  2,  0,  4,  21, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #344 = L4_add_memopb_zomap
6684
    { 343,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #343 = L2_ploadruhtnew_zomap
6685
    { 342,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #342 = L2_ploadruht_zomap
6686
    { 341,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #341 = L2_ploadruhfnew_zomap
6687
    { 340,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #340 = L2_ploadruhf_zomap
6688
    { 339,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #339 = L2_ploadrubtnew_zomap
6689
    { 338,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #338 = L2_ploadrubt_zomap
6690
    { 337,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #337 = L2_ploadrubfnew_zomap
6691
    { 336,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #336 = L2_ploadrubf_zomap
6692
    { 335,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #335 = L2_ploadritnew_zomap
6693
    { 334,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #334 = L2_ploadrit_zomap
6694
    { 333,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #333 = L2_ploadrifnew_zomap
6695
    { 332,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #332 = L2_ploadrif_zomap
6696
    { 331,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #331 = L2_ploadrhtnew_zomap
6697
    { 330,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #330 = L2_ploadrht_zomap
6698
    { 329,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #329 = L2_ploadrhfnew_zomap
6699
    { 328,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #328 = L2_ploadrhf_zomap
6700
    { 327,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 180,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #327 = L2_ploadrdtnew_zomap
6701
    { 326,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 180,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #326 = L2_ploadrdt_zomap
6702
    { 325,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 180,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #325 = L2_ploadrdfnew_zomap
6703
    { 324,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 180,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #324 = L2_ploadrdf_zomap
6704
    { 323,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #323 = L2_ploadrbtnew_zomap
6705
    { 322,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #322 = L2_ploadrbt_zomap
6706
    { 321,  3,  1,  4,  20, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #321 = L2_ploadrbfnew_zomap
6707
    { 320,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #320 = L2_ploadrbf_zomap
6708
    { 319,  2,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #319 = L2_loadruh_zomap
6709
    { 318,  2,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #318 = L2_loadrub_zomap
6710
    { 317,  2,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #317 = L2_loadri_zomap
6711
    { 316,  2,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #316 = L2_loadrh_zomap
6712
    { 315,  2,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 178,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #315 = L2_loadrd_zomap
6713
    { 314,  2,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #314 = L2_loadrb_zomap
6714
    { 313,  2,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 178,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #313 = L2_loadbzw4_zomap
6715
    { 312,  2,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #312 = L2_loadbzw2_zomap
6716
    { 311,  2,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 178,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #311 = L2_loadbsw4_zomap
6717
    { 310,  2,  1,  4,  19, 0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8026ULL },  // Inst #310 = L2_loadbsw2_zomap
6718
    { 309,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 175,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #309 = L2_loadalignh_zomap
6719
    { 308,  3,  1,  4,  18, 0,  0,  HexagonImpOpBase + 0, 175,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #308 = L2_loadalignb_zomap
6720
    { 307,  1,  0,  4,  17, 0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x26ULL },  // Inst #307 = J2_trap1_noregmap
6721
    { 306,  2,  0,  4,  15, 0,  0,  HexagonImpOpBase + 0, 171,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #306 = J2_jumpt_nopred_map
6722
    { 305,  2,  0,  4,  16, 0,  0,  HexagonImpOpBase + 0, 173,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #305 = J2_jumprt_nopred_map
6723
    { 304,  2,  0,  4,  16, 0,  0,  HexagonImpOpBase + 0, 173,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #304 = J2_jumprf_nopred_map
6724
    { 303,  2,  0,  4,  15, 0,  0,  HexagonImpOpBase + 0, 171,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #303 = J2_jumpf_nopred_map
6725
    { 302,  0,  0,  4,  14, 2,  2,  HexagonImpOpBase + 39,  1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x23ULL },  // Inst #302 = J2_endloop1
6726
    { 301,  0,  0,  4,  14, 4,  5,  HexagonImpOpBase + 30,  1,  0|(1ULL<<MCID::Pseudo), 0x23ULL },  // Inst #301 = J2_endloop01
6727
    { 300,  0,  0,  4,  14, 2,  4,  HexagonImpOpBase + 24,  1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x23ULL },  // Inst #300 = J2_endloop0
6728
    { 299,  1,  0,  4,  13, 2,  2,  HexagonImpOpBase + 20,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x21ULL },  // Inst #299 = ENDLOOP1
6729
    { 298,  1,  0,  4,  13, 4,  3,  HexagonImpOpBase + 13,  0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x21ULL },  // Inst #298 = ENDLOOP01
6730
    { 297,  1,  0,  4,  13, 2,  2,  HexagonImpOpBase + 9, 0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x21ULL },  // Inst #297 = ENDLOOP0
6731
    { 296,  1,  0,  4,  12, 0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::Pseudo), 0x28ULL },  // Inst #296 = DUPLEX_Pseudo
6732
    { 295,  2,  1,  4,  11, 0,  0,  HexagonImpOpBase + 0, 169,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #295 = C2_pxfer_map
6733
    { 294,  3,  1,  4,  10, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x1ULL },  // Inst #294 = C2_cmpltu
6734
    { 293,  3,  1,  4,  10, 0,  0,  HexagonImpOpBase + 0, 166,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x1ULL },  // Inst #293 = C2_cmplt
6735
    { 292,  3,  1,  4,  10, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL },  // Inst #292 = C2_cmpgeui
6736
    { 291,  3,  1,  4,  10, 0,  0,  HexagonImpOpBase + 0, 163,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL },  // Inst #291 = C2_cmpgei
6737
    { 290,  2,  0,  4,  2,  1,  3,  HexagonImpOpBase + 5, 21, 0|(1ULL<<MCID::Pseudo), 0x28ULL },  // Inst #290 = ADJCALLSTACKUP
6738
    { 289,  2,  0,  4,  2,  3,  2,  HexagonImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo), 0x28ULL },  // Inst #289 = ADJCALLSTACKDOWN
6739
    { 288,  3,  1,  4,  9,  0,  0,  HexagonImpOpBase + 0, 160,  0|(1ULL<<MCID::Pseudo), 0x3ULL },  // Inst #288 = A4_boundscheck
6740
    { 287,  2,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Predicable), 0x8000ULL },  // Inst #287 = A2_zxtb
6741
    { 286,  3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #286 = A2_vsubb_map
6742
    { 285,  3,  1,  4,  8,  0,  0,  HexagonImpOpBase + 0, 157,  0|(1ULL<<MCID::Pseudo), 0x26ULL },  // Inst #285 = A2_vaddb_map
6743
    { 284,  3,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x9400ULL },  // Inst #284 = A2_tfrtnew
6744
    { 283,  3,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8400ULL },  // Inst #283 = A2_tfrt
6745
    { 282,  3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 152,  0|(1ULL<<MCID::Pseudo), 0x1400ULL },  // Inst #282 = A2_tfrptnew
6746
    { 281,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 152,  0|(1ULL<<MCID::Pseudo), 0x400ULL },  // Inst #281 = A2_tfrpt
6747
    { 280,  2,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 155,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x3ULL },  // Inst #280 = A2_tfrpi
6748
    { 279,  3,  1,  4,  7,  0,  0,  HexagonImpOpBase + 0, 152,  0|(1ULL<<MCID::Pseudo), 0x1c00ULL },  // Inst #279 = A2_tfrpfnew
6749
    { 278,  3,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 152,  0|(1ULL<<MCID::Pseudo), 0xc00ULL },  // Inst #278 = A2_tfrpf
6750
    { 277,  2,  1,  4,  6,  0,  0,  HexagonImpOpBase + 0, 150,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Predicable), 0x0ULL },  // Inst #277 = A2_tfrp
6751
    { 276,  3,  1,  4,  5,  0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x9c00ULL },  // Inst #276 = A2_tfrfnew
6752
    { 275,  3,  1,  4,  4,  0,  0,  HexagonImpOpBase + 0, 147,  0|(1ULL<<MCID::Pseudo), 0x8c00ULL },  // Inst #275 = A2_tfrf
6753
    { 274,  2,  1,  4,  3,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8000ULL },  // Inst #274 = A2_not
6754
    { 273,  2,  1,  4,  3,  0,  0,  HexagonImpOpBase + 0, 145,  0|(1ULL<<MCID::Pseudo), 0x8000ULL },  // Inst #273 = A2_neg
6755
    { 272,  2,  1,  4,  2,  0,  0,  HexagonImpOpBase + 0, 143,  0|(1ULL<<MCID::Pseudo), 0x28ULL },  // Inst #272 = A2_iconst
6756
    { 271,  3,  1,  4,  1,  0,  0,  HexagonImpOpBase + 0, 140,  0|(1ULL<<MCID::Pseudo), 0x3ULL },  // Inst #271 = A2_addsp
6757
    { 270,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 136,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #270 = G_UBFX
6758
    { 269,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 136,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #269 = G_SBFX
6759
    { 268,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #268 = G_VECREDUCE_UMIN
6760
    { 267,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #267 = G_VECREDUCE_UMAX
6761
    { 266,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #266 = G_VECREDUCE_SMIN
6762
    { 265,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #265 = G_VECREDUCE_SMAX
6763
    { 264,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #264 = G_VECREDUCE_XOR
6764
    { 263,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #263 = G_VECREDUCE_OR
6765
    { 262,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #262 = G_VECREDUCE_AND
6766
    { 261,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #261 = G_VECREDUCE_MUL
6767
    { 260,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #260 = G_VECREDUCE_ADD
6768
    { 259,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #259 = G_VECREDUCE_FMINIMUM
6769
    { 258,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #258 = G_VECREDUCE_FMAXIMUM
6770
    { 257,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #257 = G_VECREDUCE_FMIN
6771
    { 256,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #256 = G_VECREDUCE_FMAX
6772
    { 255,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #255 = G_VECREDUCE_FMUL
6773
    { 254,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #254 = G_VECREDUCE_FADD
6774
    { 253,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 123,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #253 = G_VECREDUCE_SEQ_FMUL
6775
    { 252,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 123,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #252 = G_VECREDUCE_SEQ_FADD
6776
    { 251,  3,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 53, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #251 = G_BZERO
6777
    { 250,  4,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 132,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #250 = G_MEMSET
6778
    { 249,  4,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 132,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #249 = G_MEMMOVE
6779
    { 248,  3,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 123,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #248 = G_MEMCPY_INLINE
6780
    { 247,  4,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 132,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #247 = G_MEMCPY
6781
    { 246,  2,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 130,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL },  // Inst #246 = G_WRITE_REGISTER
6782
    { 245,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL },  // Inst #245 = G_READ_REGISTER
6783
    { 244,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #244 = G_STRICT_FLDEXP
6784
    { 243,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #243 = G_STRICT_FSQRT
6785
    { 242,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #242 = G_STRICT_FMA
6786
    { 241,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #241 = G_STRICT_FREM
6787
    { 240,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #240 = G_STRICT_FDIV
6788
    { 239,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #239 = G_STRICT_FMUL
6789
    { 238,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #238 = G_STRICT_FSUB
6790
    { 237,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #237 = G_STRICT_FADD
6791
    { 236,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #236 = G_STACKRESTORE
6792
    { 235,  1,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #235 = G_STACKSAVE
6793
    { 234,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 64, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #234 = G_DYN_STACKALLOC
6794
    { 233,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #233 = G_JUMP_TABLE
6795
    { 232,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #232 = G_BLOCK_ADDR
6796
    { 231,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #231 = G_ADDRSPACE_CAST
6797
    { 230,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #230 = G_FNEARBYINT
6798
    { 229,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #229 = G_FRINT
6799
    { 228,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #228 = G_FFLOOR
6800
    { 227,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #227 = G_FSQRT
6801
    { 226,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #226 = G_FSIN
6802
    { 225,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #225 = G_FCOS
6803
    { 224,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #224 = G_FCEIL
6804
    { 223,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #223 = G_BITREVERSE
6805
    { 222,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #222 = G_BSWAP
6806
    { 221,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #221 = G_CTPOP
6807
    { 220,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #220 = G_CTLZ_ZERO_UNDEF
6808
    { 219,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #219 = G_CTLZ
6809
    { 218,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #218 = G_CTTZ_ZERO_UNDEF
6810
    { 217,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #217 = G_CTTZ
6811
    { 216,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 126,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #216 = G_SHUFFLE_VECTOR
6812
    { 215,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 123,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #215 = G_EXTRACT_VECTOR_ELT
6813
    { 214,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 119,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #214 = G_INSERT_VECTOR_ELT
6814
    { 213,  3,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 116,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL },  // Inst #213 = G_BRJT
6815
    { 212,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL },  // Inst #212 = G_BR
6816
    { 211,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #211 = G_LLROUND
6817
    { 210,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #210 = G_LROUND
6818
    { 209,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #209 = G_ABS
6819
    { 208,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #208 = G_UMAX
6820
    { 207,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #207 = G_UMIN
6821
    { 206,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #206 = G_SMAX
6822
    { 205,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #205 = G_SMIN
6823
    { 204,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #204 = G_PTRMASK
6824
    { 203,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #203 = G_PTR_ADD
6825
    { 202,  0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #202 = G_RESET_FPMODE
6826
    { 201,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #201 = G_SET_FPMODE
6827
    { 200,  1,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #200 = G_GET_FPMODE
6828
    { 199,  0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #199 = G_RESET_FPENV
6829
    { 198,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #198 = G_SET_FPENV
6830
    { 197,  1,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #197 = G_GET_FPENV
6831
    { 196,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #196 = G_FMAXIMUM
6832
    { 195,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #195 = G_FMINIMUM
6833
    { 194,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #194 = G_FMAXNUM_IEEE
6834
    { 193,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #193 = G_FMINNUM_IEEE
6835
    { 192,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #192 = G_FMAXNUM
6836
    { 191,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #191 = G_FMINNUM
6837
    { 190,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #190 = G_FCANONICALIZE
6838
    { 189,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 93, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #189 = G_IS_FPCLASS
6839
    { 188,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #188 = G_FCOPYSIGN
6840
    { 187,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #187 = G_FABS
6841
    { 186,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #186 = G_UITOFP
6842
    { 185,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #185 = G_SITOFP
6843
    { 184,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #184 = G_FPTOUI
6844
    { 183,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #183 = G_FPTOSI
6845
    { 182,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #182 = G_FPTRUNC
6846
    { 181,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #181 = G_FPEXT
6847
    { 180,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #180 = G_FNEG
6848
    { 179,  3,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #179 = G_FFREXP
6849
    { 178,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #178 = G_FLDEXP
6850
    { 177,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #177 = G_FLOG10
6851
    { 176,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #176 = G_FLOG2
6852
    { 175,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #175 = G_FLOG
6853
    { 174,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #174 = G_FEXP10
6854
    { 173,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #173 = G_FEXP2
6855
    { 172,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #172 = G_FEXP
6856
    { 171,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #171 = G_FPOWI
6857
    { 170,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #170 = G_FPOW
6858
    { 169,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #169 = G_FREM
6859
    { 168,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #168 = G_FDIV
6860
    { 167,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #167 = G_FMAD
6861
    { 166,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #166 = G_FMA
6862
    { 165,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #165 = G_FMUL
6863
    { 164,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #164 = G_FSUB
6864
    { 163,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #163 = G_FADD
6865
    { 162,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 112,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #162 = G_UDIVFIXSAT
6866
    { 161,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 112,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #161 = G_SDIVFIXSAT
6867
    { 160,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 112,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #160 = G_UDIVFIX
6868
    { 159,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 112,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #159 = G_SDIVFIX
6869
    { 158,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 112,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #158 = G_UMULFIXSAT
6870
    { 157,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 112,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #157 = G_SMULFIXSAT
6871
    { 156,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 112,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #156 = G_UMULFIX
6872
    { 155,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 112,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #155 = G_SMULFIX
6873
    { 154,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #154 = G_SSHLSAT
6874
    { 153,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #153 = G_USHLSAT
6875
    { 152,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #152 = G_SSUBSAT
6876
    { 151,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #151 = G_USUBSAT
6877
    { 150,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #150 = G_SADDSAT
6878
    { 149,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #149 = G_UADDSAT
6879
    { 148,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #148 = G_SMULH
6880
    { 147,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #147 = G_UMULH
6881
    { 146,  4,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #146 = G_SMULO
6882
    { 145,  4,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #145 = G_UMULO
6883
    { 144,  5,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 107,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #144 = G_SSUBE
6884
    { 143,  4,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #143 = G_SSUBO
6885
    { 142,  5,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 107,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #142 = G_SADDE
6886
    { 141,  4,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #141 = G_SADDO
6887
    { 140,  5,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 107,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #140 = G_USUBE
6888
    { 139,  4,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #139 = G_USUBO
6889
    { 138,  5,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 107,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #138 = G_UADDE
6890
    { 137,  4,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #137 = G_UADDO
6891
    { 136,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #136 = G_SELECT
6892
    { 135,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 103,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #135 = G_FCMP
6893
    { 134,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 103,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #134 = G_ICMP
6894
    { 133,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #133 = G_ROTL
6895
    { 132,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #132 = G_ROTR
6896
    { 131,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 99, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #131 = G_FSHR
6897
    { 130,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 99, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #130 = G_FSHL
6898
    { 129,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #129 = G_ASHR
6899
    { 128,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #128 = G_LSHR
6900
    { 127,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 96, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #127 = G_SHL
6901
    { 126,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #126 = G_ZEXT
6902
    { 125,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #125 = G_SEXT_INREG
6903
    { 124,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #124 = G_SEXT
6904
    { 123,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 93, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #123 = G_VAARG
6905
    { 122,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #122 = G_VASTART
6906
    { 121,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #121 = G_FCONSTANT
6907
    { 120,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #120 = G_CONSTANT
6908
    { 119,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #119 = G_TRUNC
6909
    { 118,  2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #118 = G_ANYEXT
6910
    { 117,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL },  // Inst #117 = G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS
6911
    { 116,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL },  // Inst #116 = G_INTRINSIC_CONVERGENT
6912
    { 115,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #115 = G_INTRINSIC_W_SIDE_EFFECTS
6913
    { 114,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #114 = G_INTRINSIC
6914
    { 113,  0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL },  // Inst #113 = G_INVOKE_REGION_START
6915
    { 112,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL },  // Inst #112 = G_BRINDIRECT
6916
    { 111,  2,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL },  // Inst #111 = G_BRCOND
6917
    { 110,  4,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 89, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #110 = G_PREFETCH
6918
    { 109,  2,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 21, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #109 = G_FENCE
6919
    { 108,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #108 = G_ATOMICRMW_UDEC_WRAP
6920
    { 107,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #107 = G_ATOMICRMW_UINC_WRAP
6921
    { 106,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #106 = G_ATOMICRMW_FMIN
6922
    { 105,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #105 = G_ATOMICRMW_FMAX
6923
    { 104,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #104 = G_ATOMICRMW_FSUB
6924
    { 103,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #103 = G_ATOMICRMW_FADD
6925
    { 102,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #102 = G_ATOMICRMW_UMIN
6926
    { 101,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #101 = G_ATOMICRMW_UMAX
6927
    { 100,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #100 = G_ATOMICRMW_MIN
6928
    { 99, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #99 = G_ATOMICRMW_MAX
6929
    { 98, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #98 = G_ATOMICRMW_XOR
6930
    { 97, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #97 = G_ATOMICRMW_OR
6931
    { 96, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #96 = G_ATOMICRMW_NAND
6932
    { 95, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #95 = G_ATOMICRMW_AND
6933
    { 94, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #94 = G_ATOMICRMW_SUB
6934
    { 93, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #93 = G_ATOMICRMW_ADD
6935
    { 92, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 86, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #92 = G_ATOMICRMW_XCHG
6936
    { 91, 4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #91 = G_ATOMIC_CMPXCHG
6937
    { 90, 5,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 77, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #90 = G_ATOMIC_CMPXCHG_WITH_SUCCESS
6938
    { 89, 5,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #89 = G_INDEXED_STORE
6939
    { 88, 2,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL },  // Inst #88 = G_STORE
6940
    { 87, 5,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL },  // Inst #87 = G_INDEXED_ZEXTLOAD
6941
    { 86, 5,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL },  // Inst #86 = G_INDEXED_SEXTLOAD
6942
    { 85, 5,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL },  // Inst #85 = G_INDEXED_LOAD
6943
    { 84, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL },  // Inst #84 = G_ZEXTLOAD
6944
    { 83, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL },  // Inst #83 = G_SEXTLOAD
6945
    { 82, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL },  // Inst #82 = G_LOAD
6946
    { 81, 1,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #81 = G_READCYCLECOUNTER
6947
    { 80, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #80 = G_INTRINSIC_ROUNDEVEN
6948
    { 79, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #79 = G_INTRINSIC_LRINT
6949
    { 78, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #78 = G_INTRINSIC_ROUND
6950
    { 77, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #77 = G_INTRINSIC_TRUNC
6951
    { 76, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 64, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #76 = G_INTRINSIC_FPTRUNC_ROUND
6952
    { 75, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #75 = G_CONSTANT_FOLD_BARRIER
6953
    { 74, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 62, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #74 = G_FREEZE
6954
    { 73, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #73 = G_BITCAST
6955
    { 72, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #72 = G_INTTOPTR
6956
    { 71, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #71 = G_PTRTOINT
6957
    { 70, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #70 = G_CONCAT_VECTORS
6958
    { 69, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #69 = G_BUILD_VECTOR_TRUNC
6959
    { 68, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #68 = G_BUILD_VECTOR
6960
    { 67, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #67 = G_MERGE_VALUES
6961
    { 66, 4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 58, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #66 = G_INSERT
6962
    { 65, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 56, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #65 = G_UNMERGE_VALUES
6963
    { 64, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 53, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #64 = G_EXTRACT
6964
    { 63, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #63 = G_CONSTANT_POOL
6965
    { 62, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #62 = G_GLOBAL_VALUE
6966
    { 61, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #61 = G_FRAME_INDEX
6967
    { 60, 1,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #60 = G_PHI
6968
    { 59, 1,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #59 = G_IMPLICIT_DEF
6969
    { 58, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #58 = G_XOR
6970
    { 57, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #57 = G_OR
6971
    { 56, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #56 = G_AND
6972
    { 55, 4,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #55 = G_UDIVREM
6973
    { 54, 4,  2,  0,  0,  0,  0,  HexagonImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #54 = G_SDIVREM
6974
    { 53, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #53 = G_UREM
6975
    { 52, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #52 = G_SREM
6976
    { 51, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #51 = G_UDIV
6977
    { 50, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #50 = G_SDIV
6978
    { 49, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #49 = G_MUL
6979
    { 48, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #48 = G_SUB
6980
    { 47, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL },  // Inst #47 = G_ADD
6981
    { 46, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #46 = G_ASSERT_ALIGN
6982
    { 45, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #45 = G_ASSERT_ZEXT
6983
    { 44, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #44 = G_ASSERT_SEXT
6984
    { 43, 1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL },  // Inst #43 = JUMP_TABLE_DEBUG_INFO
6985
    { 42, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #42 = MEMBARRIER
6986
    { 41, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #41 = ICALL_BRANCH_FUNNEL
6987
    { 40, 3,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 37, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #40 = PATCHABLE_TYPED_EVENT_CALL
6988
    { 39, 2,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 35, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #39 = PATCHABLE_EVENT_CALL
6989
    { 38, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #38 = PATCHABLE_TAIL_CALL
6990
    { 37, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #37 = PATCHABLE_FUNCTION_EXIT
6991
    { 36, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #36 = PATCHABLE_RET
6992
    { 35, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #35 = PATCHABLE_FUNCTION_ENTER
6993
    { 34, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #34 = PATCHABLE_OP
6994
    { 33, 1,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #33 = FAULTING_OP
6995
    { 32, 2,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 33, 0|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #32 = LOCAL_ESCAPE
6996
    { 31, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #31 = STATEPOINT
6997
    { 30, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 30, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #30 = PREALLOCATED_ARG
6998
    { 29, 1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #29 = PREALLOCATED_SETUP
6999
    { 28, 1,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 29, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL },  // Inst #28 = LOAD_STACK_GUARD
7000
    { 27, 6,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 23, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #27 = PATCHPOINT
7001
    { 26, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #26 = FENTRY_CALL
7002
    { 25, 2,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #25 = STACKMAP
7003
    { 24, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 19, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL },  // Inst #24 = ARITH_FENCE
7004
    { 23, 4,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 15, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #23 = PSEUDO_PROBE
7005
    { 22, 1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL },  // Inst #22 = LIFETIME_END
7006
    { 21, 1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL },  // Inst #21 = LIFETIME_START
7007
    { 20, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #20 = BUNDLE
7008
    { 19, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL },  // Inst #19 = COPY
7009
    { 18, 2,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL },  // Inst #18 = REG_SEQUENCE
7010
    { 17, 1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL },  // Inst #17 = DBG_LABEL
7011
    { 16, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #16 = DBG_PHI
7012
    { 15, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #15 = DBG_INSTR_REF
7013
    { 14, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #14 = DBG_VALUE_LIST
7014
    { 13, 0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #13 = DBG_VALUE
7015
    { 12, 3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 2,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL },  // Inst #12 = COPY_TO_REGCLASS
7016
    { 11, 4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 9,  0|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #11 = SUBREG_TO_REG
7017
    { 10, 1,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL },  // Inst #10 = IMPLICIT_DEF
7018
    { 9,  4,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 5,  0|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #9 = INSERT_SUBREG
7019
    { 8,  3,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 2,  0|(1ULL<<MCID::Pseudo), 0x0ULL },  // Inst #8 = EXTRACT_SUBREG
7020
    { 7,  0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #7 = KILL
7021
    { 6,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL },  // Inst #6 = ANNOTATION_LABEL
7022
    { 5,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL },  // Inst #5 = GC_LABEL
7023
    { 4,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL },  // Inst #4 = EH_LABEL
7024
    { 3,  1,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL },  // Inst #3 = CFI_INSTRUCTION
7025
    { 2,  0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL },  // Inst #2 = INLINEASM_BR
7026
    { 1,  0,  0,  0,  0,  0,  0,  HexagonImpOpBase + 0, 1,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #1 = INLINEASM
7027
    { 0,  1,  1,  0,  0,  0,  0,  HexagonImpOpBase + 0, 0,  0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL },  // Inst #0 = PHI
7028
  }, {
7029
    /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7030
    /* 1 */
7031
    /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7032
    /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7033
    /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7034
    /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7035
    /* 13 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7036
    /* 15 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7037
    /* 19 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) },
7038
    /* 21 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7039
    /* 23 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7040
    /* 29 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 },
7041
    /* 30 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7042
    /* 33 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7043
    /* 35 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7044
    /* 37 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7045
    /* 40 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7046
    /* 43 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7047
    /* 46 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7048
    /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7049
    /* 51 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7050
    /* 53 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7051
    /* 56 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7052
    /* 58 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7053
    /* 62 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7054
    /* 64 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7055
    /* 67 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7056
    /* 72 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7057
    /* 77 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7058
    /* 82 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7059
    /* 86 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7060
    /* 89 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7061
    /* 93 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7062
    /* 96 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7063
    /* 99 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7064
    /* 103 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7065
    /* 107 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7066
    /* 112 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7067
    /* 116 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7068
    /* 119 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
7069
    /* 123 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 },
7070
    /* 126 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7071
    /* 130 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 },
7072
    /* 132 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 },
7073
    /* 136 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 },
7074
    /* 140 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7075
    /* 143 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7076
    /* 145 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7077
    /* 147 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7078
    /* 150 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7079
    /* 152 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7080
    /* 155 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7081
    /* 157 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7082
    /* 160 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7083
    /* 163 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7084
    /* 166 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7085
    /* 169 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7086
    /* 171 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7087
    /* 173 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7088
    /* 175 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7089
    /* 178 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7090
    /* 180 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7091
    /* 183 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7092
    /* 184 */ { Hexagon::CtrRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7093
    /* 187 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7094
    /* 190 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7095
    /* 193 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7096
    /* 197 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7097
    /* 200 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7098
    /* 203 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7099
    /* 207 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7100
    /* 211 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7101
    /* 217 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7102
    /* 222 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7103
    /* 228 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7104
    /* 233 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7105
    /* 237 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7106
    /* 238 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7107
    /* 244 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7108
    /* 249 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7109
    /* 255 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7110
    /* 260 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7111
    /* 261 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7112
    /* 262 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7113
    /* 265 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7114
    /* 268 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7115
    /* 271 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7116
    /* 275 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7117
    /* 277 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7118
    /* 279 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7119
    /* 282 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7120
    /* 285 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7121
    /* 288 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7122
    /* 292 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7123
    /* 295 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7124
    /* 297 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7125
    /* 302 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7126
    /* 305 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::CtrRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7127
    /* 308 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7128
    /* 311 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7129
    /* 314 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7130
    /* 318 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7131
    /* 320 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7132
    /* 322 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7133
    /* 325 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7134
    /* 327 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7135
    /* 330 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7136
    /* 332 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7137
    /* 335 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7138
    /* 338 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7139
    /* 342 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7140
    /* 347 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7141
    /* 349 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7142
    /* 352 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7143
    /* 355 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7144
    /* 359 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7145
    /* 363 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7146
    /* 366 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7147
    /* 370 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7148
    /* 373 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7149
    /* 377 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7150
    /* 380 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7151
    /* 384 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7152
    /* 387 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7153
    /* 389 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7154
    /* 390 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7155
    /* 394 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7156
    /* 397 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7157
    /* 401 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7158
    /* 404 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7159
    /* 408 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7160
    /* 413 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7161
    /* 419 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7162
    /* 424 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7163
    /* 430 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7164
    /* 434 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7165
    /* 437 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7166
    /* 441 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7167
    /* 444 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7168
    /* 449 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7169
    /* 453 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7170
    /* 455 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7171
    /* 459 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7172
    /* 464 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7173
    /* 468 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7174
    /* 473 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7175
    /* 478 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7176
    /* 481 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) },
7177
    /* 483 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7178
    /* 486 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7179
    /* 489 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7180
    /* 492 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7181
    /* 495 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7182
    /* 498 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7183
    /* 501 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7184
    /* 504 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7185
    /* 507 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7186
    /* 510 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7187
    /* 514 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7188
    /* 518 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::CtrRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7189
    /* 520 */ { Hexagon::CtrRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7190
    /* 522 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7191
    /* 525 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7192
    /* 530 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::CtrRegs64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7193
    /* 532 */ { Hexagon::CtrRegs64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7194
    /* 534 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7195
    /* 537 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7196
    /* 540 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7197
    /* 545 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7198
    /* 548 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7199
    /* 551 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7200
    /* 555 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7201
    /* 557 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7202
    /* 561 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7203
    /* 565 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7204
    /* 567 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7205
    /* 570 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7206
    /* 574 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7207
    /* 576 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 },
7208
    /* 578 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7209
    /* 582 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7210
    /* 587 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::GuestRegs64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7211
    /* 589 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::GuestRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7212
    /* 591 */ { Hexagon::GuestRegs64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7213
    /* 593 */ { Hexagon::GuestRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7214
    /* 595 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7215
    /* 597 */ { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7216
    /* 600 */ { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7217
    /* 603 */ { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7218
    /* 605 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7219
    /* 609 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7220
    /* 614 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7221
    /* 620 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7222
    /* 625 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7223
    /* 629 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7224
    /* 634 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7225
    /* 638 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7226
    /* 642 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7227
    /* 647 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7228
    /* 651 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7229
    /* 656 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7230
    /* 660 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7231
    /* 665 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7232
    /* 669 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7233
    /* 674 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7234
    /* 678 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7235
    /* 682 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7236
    /* 686 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7237
    /* 691 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7238
    /* 694 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7239
    /* 699 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7240
    /* 702 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7241
    /* 706 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7242
    /* 710 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7243
    /* 714 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7244
    /* 718 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7245
    /* 722 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7246
    /* 726 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7247
    /* 728 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7248
    /* 732 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7249
    /* 735 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7250
    /* 739 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7251
    /* 743 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7252
    /* 748 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7253
    /* 752 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7254
    /* 757 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7255
    /* 761 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7256
    /* 766 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7257
    /* 770 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7258
    /* 775 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7259
    /* 779 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7260
    /* 783 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7261
    /* 788 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7262
    /* 792 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7263
    /* 796 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7264
    /* 800 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7265
    /* 804 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7266
    /* 808 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7267
    /* 811 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7268
    /* 816 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7269
    /* 819 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7270
    /* 824 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7271
    /* 828 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7272
    /* 832 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7273
    /* 836 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7274
    /* 840 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7275
    /* 844 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7276
    /* 849 */ { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7277
    /* 852 */ { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7278
    /* 855 */ { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7279
    /* 857 */ { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7280
    /* 858 */ { Hexagon::GeneralDoubleLow8RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7281
    /* 860 */ { Hexagon::GeneralDoubleLow8RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7282
    /* 862 */ { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7283
    /* 865 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::GeneralDoubleLow8RegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7284
    /* 867 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::GeneralSubRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7285
    /* 869 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7286
    /* 872 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7287
    /* 874 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7288
    /* 876 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7289
    /* 880 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7290
    /* 884 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7291
    /* 888 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7292
    /* 893 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7293
    /* 898 */ { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7294
    /* 902 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7295
    /* 907 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7296
    /* 912 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7297
    /* 916 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7298
    /* 920 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7299
    /* 924 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7300
    /* 929 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7301
    /* 934 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7302
    /* 937 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7303
    /* 942 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7304
    /* 946 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7305
    /* 950 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsLow8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7306
    /* 954 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7307
    /* 958 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7308
    /* 961 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7309
    /* 964 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7310
    /* 968 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7311
    /* 971 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsLow8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7312
    /* 975 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7313
    /* 978 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7314
    /* 982 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7315
    /* 985 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7316
    /* 989 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7317
    /* 992 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7318
    /* 995 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsLow8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7319
    /* 1000 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7320
    /* 1005 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsLow8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7321
    /* 1010 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7322
    /* 1015 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7323
    /* 1019 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7324
    /* 1023 */ { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7325
    /* 1025 */ { Hexagon::HvxVQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsLow8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7326
    /* 1028 */ { Hexagon::HvxVQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVQRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsLow8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7327
    /* 1032 */ { Hexagon::HvxVQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsLow8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsLow8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7328
    /* 1036 */ { Hexagon::HvxVQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsLow8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVQRRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsLow8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) },
7329
    /* 1041 */ { Hexagon::HvxWRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::HvxVRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7330
    /* 1045 */ { Hexagon::HvxQRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7331
    /* 1047 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7332
    /* 1051 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::PredRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { Hexagon::ModRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7333
    /* 1055 */ { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::SysRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7334
    /* 1057 */ { Hexagon::SysRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::IntRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7335
    /* 1059 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 },
7336
    /* 1062 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::SysRegs64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7337
    /* 1064 */ { Hexagon::SysRegs64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7338
    /* 1066 */ { Hexagon::DoubleRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
7339
  }, {
7340
    /* 0 */
7341
    /* 0 */ Hexagon::R31, Hexagon::R30, Hexagon::R29, Hexagon::R29, Hexagon::R30,
7342
    /* 5 */ Hexagon::R29, Hexagon::R29, Hexagon::R30, Hexagon::R31,
7343
    /* 9 */ Hexagon::SA0, Hexagon::LC0, Hexagon::PC, Hexagon::LC0,
7344
    /* 13 */ Hexagon::SA0, Hexagon::SA1, Hexagon::LC0, Hexagon::LC1, Hexagon::PC, Hexagon::LC0, Hexagon::LC1,
7345
    /* 20 */ Hexagon::SA1, Hexagon::LC1, Hexagon::PC, Hexagon::LC1,
7346
    /* 24 */ Hexagon::LC0, Hexagon::SA0, Hexagon::LC0, Hexagon::P3, Hexagon::PC, Hexagon::USR,
7347
    /* 30 */ Hexagon::LC0, Hexagon::LC1, Hexagon::SA0, Hexagon::SA1, Hexagon::LC0, Hexagon::LC1, Hexagon::P3, Hexagon::PC, Hexagon::USR,
7348
    /* 39 */ Hexagon::LC1, Hexagon::SA1, Hexagon::LC1, Hexagon::PC,
7349
    /* 43 */ Hexagon::R30,
7350
    /* 44 */ Hexagon::R29,
7351
    /* 45 */ Hexagon::R0, Hexagon::R14, Hexagon::R15, Hexagon::R28, Hexagon::R29, Hexagon::R30, Hexagon::R31, Hexagon::PC,
7352
    /* 53 */ Hexagon::CS, Hexagon::CS,
7353
    /* 55 */ Hexagon::PC,
7354
    /* 56 */ Hexagon::FRAMEKEY, Hexagon::R29,
7355
    /* 58 */ Hexagon::FRAMEKEY, Hexagon::FRAMELIMIT, Hexagon::R30, Hexagon::R31, Hexagon::R30,
7356
    /* 63 */ Hexagon::USR_OVF,
7357
    /* 64 */ Hexagon::R16,
7358
    /* 65 */ Hexagon::R28, Hexagon::PC,
7359
    /* 67 */ Hexagon::USR,
7360
    /* 68 */ Hexagon::R29, Hexagon::PC, Hexagon::R31,
7361
    /* 71 */ Hexagon::PC, Hexagon::R31,
7362
    /* 73 */ Hexagon::LC0, Hexagon::SA0, Hexagon::USR,
7363
    /* 76 */ Hexagon::SA0, Hexagon::LC0, Hexagon::USR,
7364
    /* 79 */ Hexagon::SA1, Hexagon::LC1,
7365
    /* 81 */ Hexagon::LC1, Hexagon::SA1,
7366
    /* 83 */ Hexagon::LC0, Hexagon::P3, Hexagon::SA0, Hexagon::USR,
7367
    /* 87 */ Hexagon::ELR, Hexagon::PC,
7368
    /* 89 */ Hexagon::CCR, Hexagon::GOSP, Hexagon::CCR, Hexagon::GOSP, Hexagon::PC,
7369
    /* 94 */ Hexagon::P0, Hexagon::P0, Hexagon::PC,
7370
    /* 97 */ Hexagon::P1, Hexagon::P1, Hexagon::PC,
7371
    /* 100 */ Hexagon::CS,
7372
    /* 101 */ Hexagon::GP,
7373
    /* 102 */ Hexagon::FRAMEKEY, Hexagon::PC, Hexagon::R29,
7374
    /* 105 */ Hexagon::PC, Hexagon::R31, Hexagon::R6, Hexagon::R7, Hexagon::P0,
7375
    /* 110 */ Hexagon::R29, Hexagon::R30, Hexagon::R31, Hexagon::PC,
7376
    /* 114 */ Hexagon::R14, Hexagon::R15, Hexagon::R28, Hexagon::R29, Hexagon::R30, Hexagon::R31, Hexagon::PC,
7377
    /* 121 */ Hexagon::P0,
7378
    /* 122 */ Hexagon::R29, Hexagon::R31,
7379
    /* 124 */ Hexagon::R29, Hexagon::R31, Hexagon::P0,
7380
    /* 127 */ Hexagon::R29, Hexagon::R31, Hexagon::R14, Hexagon::R15, Hexagon::R28, Hexagon::P0,
7381
    /* 133 */ Hexagon::R29, Hexagon::R31, Hexagon::R14, Hexagon::R15, Hexagon::R28,
7382
    /* 138 */ Hexagon::FRAMEKEY, Hexagon::R30, Hexagon::R29, Hexagon::R30, Hexagon::R31,
7383
    /* 143 */ Hexagon::R31, Hexagon::PC,
7384
    /* 145 */ Hexagon::P0, Hexagon::R31, Hexagon::PC,
7385
    /* 148 */ Hexagon::FRAMEKEY, Hexagon::R30, Hexagon::PC, Hexagon::R29, Hexagon::R30, Hexagon::R31,
7386
    /* 154 */ Hexagon::FRAMEKEY, Hexagon::P0, Hexagon::R30, Hexagon::PC, Hexagon::R29, Hexagon::R30, Hexagon::R31,
7387
    /* 161 */ Hexagon::FRAMEKEY, Hexagon::FRAMELIMIT, Hexagon::R29, Hexagon::R30, Hexagon::R31, Hexagon::R29, Hexagon::R30,
7388
    /* 168 */ Hexagon::VTMP,
7389
    /* 169 */ Hexagon::SGP0, Hexagon::SGP0,
7390
    /* 171 */ Hexagon::SGP1, Hexagon::SGP1,
7391
    /* 173 */ Hexagon::SGP0, Hexagon::SGP1, Hexagon::SGP0, Hexagon::SGP1,
7392
  }
7393
};
7394
7395
7396
#ifdef __GNUC__
7397
#pragma GCC diagnostic push
7398
#pragma GCC diagnostic ignored "-Woverlength-strings"
7399
#endif
7400
extern const char HexagonInstrNameData[] = {
7401
  /* 0 */ "G_FLOG10\0"
7402
  /* 9 */ "G_FEXP10\0"
7403
  /* 18 */ "Y4_crswap10\0"
7404
  /* 30 */ "V6_v6mpyhubs10\0"
7405
  /* 45 */ "V6_v6mpyvubs10\0"
7406
  /* 60 */ "V6_v10mpyubs10\0"
7407
  /* 75 */ "ENDLOOP0\0"
7408
  /* 84 */ "V6_vdd0\0"
7409
  /* 92 */ "PS_vdd0\0"
7410
  /* 100 */ "V6_ld0\0"
7411
  /* 107 */ "V6_dbl_ld0\0"
7412
  /* 118 */ "V6_zld0\0"
7413
  /* 126 */ "V6_vd0\0"
7414
  /* 133 */ "Y6_diag0\0"
7415
  /* 142 */ "SS2_storebi0\0"
7416
  /* 155 */ "SS2_storewi0\0"
7417
  /* 168 */ "S2_cl0\0"
7418
  /* 175 */ "V6_stn0\0"
7419
  /* 183 */ "J2_trap0\0"
7420
  /* 192 */ "Y2_crswap0\0"
7421
  /* 203 */ "V6_ldcp0\0"
7422
  /* 212 */ "V6_ldp0\0"
7423
  /* 220 */ "V6_zldp0\0"
7424
  /* 229 */ "V6_ldcnp0\0"
7425
  /* 239 */ "V6_ldnp0\0"
7426
  /* 248 */ "V6_ldtnp0\0"
7427
  /* 258 */ "V6_stnp0\0"
7428
  /* 267 */ "V6_stunp0\0"
7429
  /* 277 */ "J2_endloop0\0"
7430
  /* 289 */ "V6_ldtp0\0"
7431
  /* 298 */ "V6_stp0\0"
7432
  /* 306 */ "V6_stup0\0"
7433
  /* 315 */ "V6_stnq0\0"
7434
  /* 324 */ "V6_stq0\0"
7435
  /* 332 */ "M2_vrmac_s0\0"
7436
  /* 344 */ "M2_dpmpyss_nac_s0\0"
7437
  /* 362 */ "M2_dpmpyuu_nac_s0\0"
7438
  /* 380 */ "M4_vrmpyeh_acc_s0\0"
7439
  /* 398 */ "M4_vrmpyoh_acc_s0\0"
7440
  /* 416 */ "M2_dpmpyss_acc_s0\0"
7441
  /* 434 */ "M2_dpmpyuu_acc_s0\0"
7442
  /* 452 */ "M2_cmacsc_s0\0"
7443
  /* 465 */ "M2_cnacsc_s0\0"
7444
  /* 478 */ "M2_cmpyrsc_s0\0"
7445
  /* 492 */ "M2_cmpysc_s0\0"
7446
  /* 505 */ "M2_dpmpyss_rnd_s0\0"
7447
  /* 523 */ "M4_vrmpyeh_s0\0"
7448
  /* 537 */ "M2_mpyud_nac_hh_s0\0"
7449
  /* 556 */ "M2_mpyd_nac_hh_s0\0"
7450
  /* 574 */ "M2_mpyu_nac_hh_s0\0"
7451
  /* 592 */ "M2_mpy_nac_hh_s0\0"
7452
  /* 609 */ "M2_mpyud_acc_hh_s0\0"
7453
  /* 628 */ "M2_mpyd_acc_hh_s0\0"
7454
  /* 646 */ "M2_mpyu_acc_hh_s0\0"
7455
  /* 664 */ "M2_mpy_acc_hh_s0\0"
7456
  /* 681 */ "M2_mpyd_rnd_hh_s0\0"
7457
  /* 699 */ "M2_mpy_sat_rnd_hh_s0\0"
7458
  /* 720 */ "M2_mpy_rnd_hh_s0\0"
7459
  /* 737 */ "M2_mpyud_hh_s0\0"
7460
  /* 752 */ "M2_mpyd_hh_s0\0"
7461
  /* 766 */ "M2_mpy_nac_sat_hh_s0\0"
7462
  /* 787 */ "M2_mpy_acc_sat_hh_s0\0"
7463
  /* 808 */ "M2_mpy_sat_hh_s0\0"
7464
  /* 825 */ "M2_mpyu_hh_s0\0"
7465
  /* 839 */ "M2_mpy_hh_s0\0"
7466
  /* 852 */ "M2_mpyud_nac_lh_s0\0"
7467
  /* 871 */ "M2_mpyd_nac_lh_s0\0"
7468
  /* 889 */ "M2_mpyu_nac_lh_s0\0"
7469
  /* 907 */ "M2_mpy_nac_lh_s0\0"
7470
  /* 924 */ "M2_mpyud_acc_lh_s0\0"
7471
  /* 943 */ "M2_mpyd_acc_lh_s0\0"
7472
  /* 961 */ "M2_mpyu_acc_lh_s0\0"
7473
  /* 979 */ "M2_mpy_acc_lh_s0\0"
7474
  /* 996 */ "M2_mpyd_rnd_lh_s0\0"
7475
  /* 1014 */ "M2_mpy_sat_rnd_lh_s0\0"
7476
  /* 1035 */ "M2_mpy_rnd_lh_s0\0"
7477
  /* 1052 */ "M2_mpyud_lh_s0\0"
7478
  /* 1067 */ "M2_mpyd_lh_s0\0"
7479
  /* 1081 */ "M2_mpy_nac_sat_lh_s0\0"
7480
  /* 1102 */ "M2_mpy_acc_sat_lh_s0\0"
7481
  /* 1123 */ "M2_mpy_sat_lh_s0\0"
7482
  /* 1140 */ "M2_mpyu_lh_s0\0"
7483
  /* 1154 */ "M2_mpy_lh_s0\0"
7484
  /* 1167 */ "M4_vrmpyoh_s0\0"
7485
  /* 1181 */ "M2_mmpyuh_s0\0"
7486
  /* 1194 */ "M2_mmpyh_s0\0"
7487
  /* 1206 */ "M2_cmaci_s0\0"
7488
  /* 1218 */ "M2_vrcmaci_s0\0"
7489
  /* 1232 */ "M2_cmpyi_s0\0"
7490
  /* 1244 */ "M2_vrcmpyi_s0\0"
7491
  /* 1258 */ "M2_mpyud_nac_hl_s0\0"
7492
  /* 1277 */ "M2_mpyd_nac_hl_s0\0"
7493
  /* 1295 */ "M2_mpyu_nac_hl_s0\0"
7494
  /* 1313 */ "M2_mpy_nac_hl_s0\0"
7495
  /* 1330 */ "M2_mpyud_acc_hl_s0\0"
7496
  /* 1349 */ "M2_mpyd_acc_hl_s0\0"
7497
  /* 1367 */ "M2_mpyu_acc_hl_s0\0"
7498
  /* 1385 */ "M2_mpy_acc_hl_s0\0"
7499
  /* 1402 */ "M2_mpyd_rnd_hl_s0\0"
7500
  /* 1420 */ "M2_mpy_sat_rnd_hl_s0\0"
7501
  /* 1441 */ "M2_mpy_rnd_hl_s0\0"
7502
  /* 1458 */ "M2_mpyud_hl_s0\0"
7503
  /* 1473 */ "M2_mpyd_hl_s0\0"
7504
  /* 1487 */ "M2_mpy_nac_sat_hl_s0\0"
7505
  /* 1508 */ "M2_mpy_acc_sat_hl_s0\0"
7506
  /* 1529 */ "M2_mpy_sat_hl_s0\0"
7507
  /* 1546 */ "M2_mpyu_hl_s0\0"
7508
  /* 1560 */ "M2_mpy_hl_s0\0"
7509
  /* 1573 */ "M2_mpyud_nac_ll_s0\0"
7510
  /* 1592 */ "M2_mpyd_nac_ll_s0\0"
7511
  /* 1610 */ "M2_mpyu_nac_ll_s0\0"
7512
  /* 1628 */ "M2_mpy_nac_ll_s0\0"
7513
  /* 1645 */ "M2_mpyud_acc_ll_s0\0"
7514
  /* 1664 */ "M2_mpyd_acc_ll_s0\0"
7515
  /* 1682 */ "M2_mpyu_acc_ll_s0\0"
7516
  /* 1700 */ "M2_mpy_acc_ll_s0\0"
7517
  /* 1717 */ "M2_mpyd_rnd_ll_s0\0"
7518
  /* 1735 */ "M2_mpy_sat_rnd_ll_s0\0"
7519
  /* 1756 */ "M2_mpy_rnd_ll_s0\0"
7520
  /* 1773 */ "M2_mpyud_ll_s0\0"
7521
  /* 1788 */ "M2_mpyd_ll_s0\0"
7522
  /* 1802 */ "M2_mpy_nac_sat_ll_s0\0"
7523
  /* 1823 */ "M2_mpy_acc_sat_ll_s0\0"
7524
  /* 1844 */ "M2_mpy_sat_ll_s0\0"
7525
  /* 1861 */ "M2_mpyu_ll_s0\0"
7526
  /* 1875 */ "M2_mpy_ll_s0\0"
7527
  /* 1888 */ "M2_mmpyul_s0\0"
7528
  /* 1901 */ "M2_mmpyl_s0\0"
7529
  /* 1913 */ "M2_cmacr_s0\0"
7530
  /* 1925 */ "M2_vrcmacr_s0\0"
7531
  /* 1939 */ "M2_cmpyr_s0\0"
7532
  /* 1951 */ "M2_vrcmpyr_s0\0"
7533
  /* 1965 */ "M2_vmac2s_s0\0"
7534
  /* 1978 */ "M2_vmpy2s_s0\0"
7535
  /* 1991 */ "M2_cmacs_s0\0"
7536
  /* 2003 */ "M2_vdmacs_s0\0"
7537
  /* 2016 */ "M2_cnacs_s0\0"
7538
  /* 2028 */ "M2_vmac2es_s0\0"
7539
  /* 2042 */ "M2_vmpy2es_s0\0"
7540
  /* 2056 */ "M2_mmachs_s0\0"
7541
  /* 2069 */ "M2_mmacuhs_s0\0"
7542
  /* 2083 */ "M2_mmacls_s0\0"
7543
  /* 2096 */ "M2_mmaculs_s0\0"
7544
  /* 2110 */ "M2_cmpyrs_s0\0"
7545
  /* 2123 */ "M2_vdmpyrs_s0\0"
7546
  /* 2137 */ "M2_dpmpyss_s0\0"
7547
  /* 2151 */ "M2_cmpys_s0\0"
7548
  /* 2163 */ "M2_vdmpys_s0\0"
7549
  /* 2176 */ "M2_vmac2su_s0\0"
7550
  /* 2190 */ "M2_vmpy2su_s0\0"
7551
  /* 2204 */ "M2_dpmpyuu_s0\0"
7552
  /* 2218 */ "M2_vrmpy_s0\0"
7553
  /* 2230 */ "M2_mmpyuh_rs0\0"
7554
  /* 2244 */ "M2_mmpyh_rs0\0"
7555
  /* 2257 */ "M2_mmpyul_rs0\0"
7556
  /* 2271 */ "M2_mmpyl_rs0\0"
7557
  /* 2284 */ "M2_mmachs_rs0\0"
7558
  /* 2298 */ "M2_mmacuhs_rs0\0"
7559
  /* 2313 */ "M2_mmacls_rs0\0"
7560
  /* 2327 */ "M2_mmaculs_rs0\0"
7561
  /* 2342 */ "DuplexIClass0\0"
7562
  /* 2356 */ "S2_ct0\0"
7563
  /* 2363 */ "V6_ldnt0\0"
7564
  /* 2372 */ "V6_stnnt0\0"
7565
  /* 2382 */ "V6_ldcpnt0\0"
7566
  /* 2393 */ "V6_ldpnt0\0"
7567
  /* 2403 */ "V6_ldcnpnt0\0"
7568
  /* 2415 */ "V6_ldnpnt0\0"
7569
  /* 2426 */ "V6_ldtnpnt0\0"
7570
  /* 2438 */ "V6_stnpnt0\0"
7571
  /* 2449 */ "V6_ldtpnt0\0"
7572
  /* 2460 */ "V6_stpnt0\0"
7573
  /* 2470 */ "V6_stnqnt0\0"
7574
  /* 2481 */ "V6_stqnt0\0"
7575
  /* 2491 */ "V6_stnt0\0"
7576
  /* 2500 */ "V6_st0\0"
7577
  /* 2507 */ "V6_dbl_st0\0"
7578
  /* 2518 */ "V6_ldu0\0"
7579
  /* 2526 */ "V6_stu0\0"
7580
  /* 2534 */ "ENDLOOP01\0"
7581
  /* 2544 */ "J2_endloop01\0"
7582
  /* 2557 */ "SL2_jumpr31\0"
7583
  /* 2569 */ "ENDLOOP1\0"
7584
  /* 2578 */ "SA1_and1\0"
7585
  /* 2587 */ "Y6_diag1\0"
7586
  /* 2596 */ "SS2_storebi1\0"
7587
  /* 2609 */ "SS2_storewi1\0"
7588
  /* 2622 */ "S2_cl1\0"
7589
  /* 2629 */ "SA1_setin1\0"
7590
  /* 2640 */ "J2_trap1\0"
7591
  /* 2649 */ "PS_trap1\0"
7592
  /* 2658 */ "Y4_crswap1\0"
7593
  /* 2669 */ "J2_endloop1\0"
7594
  /* 2681 */ "M4_vrmpyeh_acc_s1\0"
7595
  /* 2699 */ "M4_vrmpyoh_acc_s1\0"
7596
  /* 2717 */ "M2_vrcmpys_acc_s1\0"
7597
  /* 2735 */ "M2_cmacsc_s1\0"
7598
  /* 2748 */ "M2_cnacsc_s1\0"
7599
  /* 2761 */ "M2_cmpyrsc_s1\0"
7600
  /* 2775 */ "M2_cmpysc_s1\0"
7601
  /* 2788 */ "M4_vrmpyeh_s1\0"
7602
  /* 2802 */ "M2_mpyud_nac_hh_s1\0"
7603
  /* 2821 */ "M2_mpyd_nac_hh_s1\0"
7604
  /* 2839 */ "M2_mpyu_nac_hh_s1\0"
7605
  /* 2857 */ "M2_mpy_nac_hh_s1\0"
7606
  /* 2874 */ "M2_mpyud_acc_hh_s1\0"
7607
  /* 2893 */ "M2_mpyd_acc_hh_s1\0"
7608
  /* 2911 */ "M2_mpyu_acc_hh_s1\0"
7609
  /* 2929 */ "M2_mpy_acc_hh_s1\0"
7610
  /* 2946 */ "M2_mpyd_rnd_hh_s1\0"
7611
  /* 2964 */ "M2_mpy_sat_rnd_hh_s1\0"
7612
  /* 2985 */ "M2_mpy_rnd_hh_s1\0"
7613
  /* 3002 */ "M2_mpyud_hh_s1\0"
7614
  /* 3017 */ "M2_mpyd_hh_s1\0"
7615
  /* 3031 */ "M2_mpy_nac_sat_hh_s1\0"
7616
  /* 3052 */ "M2_mpy_acc_sat_hh_s1\0"
7617
  /* 3073 */ "M2_mpy_sat_hh_s1\0"
7618
  /* 3090 */ "M2_mpyu_hh_s1\0"
7619
  /* 3104 */ "M2_mpy_hh_s1\0"
7620
  /* 3117 */ "M2_mpyud_nac_lh_s1\0"
7621
  /* 3136 */ "M2_mpyd_nac_lh_s1\0"
7622
  /* 3154 */ "M2_mpyu_nac_lh_s1\0"
7623
  /* 3172 */ "M2_mpy_nac_lh_s1\0"
7624
  /* 3189 */ "M2_mpyud_acc_lh_s1\0"
7625
  /* 3208 */ "M2_mpyd_acc_lh_s1\0"
7626
  /* 3226 */ "M2_mpyu_acc_lh_s1\0"
7627
  /* 3244 */ "M2_mpy_acc_lh_s1\0"
7628
  /* 3261 */ "M2_mpyd_rnd_lh_s1\0"
7629
  /* 3279 */ "M2_mpy_sat_rnd_lh_s1\0"
7630
  /* 3300 */ "M2_mpy_rnd_lh_s1\0"
7631
  /* 3317 */ "M2_mpyud_lh_s1\0"
7632
  /* 3332 */ "M2_mpyd_lh_s1\0"
7633
  /* 3346 */ "M2_mpy_nac_sat_lh_s1\0"
7634
  /* 3367 */ "M2_mpy_acc_sat_lh_s1\0"
7635
  /* 3388 */ "M2_mpy_sat_lh_s1\0"
7636
  /* 3405 */ "M2_mpyu_lh_s1\0"
7637
  /* 3419 */ "M2_mpy_lh_s1\0"
7638
  /* 3432 */ "M4_vrmpyoh_s1\0"
7639
  /* 3446 */ "M2_mmpyuh_s1\0"
7640
  /* 3459 */ "M2_mmpyh_s1\0"
7641
  /* 3471 */ "M2_hmmpyh_s1\0"
7642
  /* 3484 */ "M2_mpyud_nac_hl_s1\0"
7643
  /* 3503 */ "M2_mpyd_nac_hl_s1\0"
7644
  /* 3521 */ "M2_mpyu_nac_hl_s1\0"
7645
  /* 3539 */ "M2_mpy_nac_hl_s1\0"
7646
  /* 3556 */ "M2_mpyud_acc_hl_s1\0"
7647
  /* 3575 */ "M2_mpyd_acc_hl_s1\0"
7648
  /* 3593 */ "M2_mpyu_acc_hl_s1\0"
7649
  /* 3611 */ "M2_mpy_acc_hl_s1\0"
7650
  /* 3628 */ "M2_mpyd_rnd_hl_s1\0"
7651
  /* 3646 */ "M2_mpy_sat_rnd_hl_s1\0"
7652
  /* 3667 */ "M2_mpy_rnd_hl_s1\0"
7653
  /* 3684 */ "M2_mpyud_hl_s1\0"
7654
  /* 3699 */ "M2_mpyd_hl_s1\0"
7655
  /* 3713 */ "M2_mpy_nac_sat_hl_s1\0"
7656
  /* 3734 */ "M2_mpy_acc_sat_hl_s1\0"
7657
  /* 3755 */ "M2_mpy_sat_hl_s1\0"
7658
  /* 3772 */ "M2_mpyu_hl_s1\0"
7659
  /* 3786 */ "M2_mpy_hl_s1\0"
7660
  /* 3799 */ "M2_mpyud_nac_ll_s1\0"
7661
  /* 3818 */ "M2_mpyd_nac_ll_s1\0"
7662
  /* 3836 */ "M2_mpyu_nac_ll_s1\0"
7663
  /* 3854 */ "M2_mpy_nac_ll_s1\0"
7664
  /* 3871 */ "M2_mpyud_acc_ll_s1\0"
7665
  /* 3890 */ "M2_mpyd_acc_ll_s1\0"
7666
  /* 3908 */ "M2_mpyu_acc_ll_s1\0"
7667
  /* 3926 */ "M2_mpy_acc_ll_s1\0"
7668
  /* 3943 */ "M2_mpyd_rnd_ll_s1\0"
7669
  /* 3961 */ "M2_mpy_sat_rnd_ll_s1\0"
7670
  /* 3982 */ "M2_mpy_rnd_ll_s1\0"
7671
  /* 3999 */ "M2_mpyud_ll_s1\0"
7672
  /* 4014 */ "M2_mpyd_ll_s1\0"
7673
  /* 4028 */ "M2_mpy_nac_sat_ll_s1\0"
7674
  /* 4049 */ "M2_mpy_acc_sat_ll_s1\0"
7675
  /* 4070 */ "M2_mpy_sat_ll_s1\0"
7676
  /* 4087 */ "M2_mpyu_ll_s1\0"
7677
  /* 4101 */ "M2_mpy_ll_s1\0"
7678
  /* 4114 */ "M2_mmpyul_s1\0"
7679
  /* 4127 */ "M2_mmpyl_s1\0"
7680
  /* 4139 */ "M2_hmmpyl_s1\0"
7681
  /* 4152 */ "M2_mpy_up_s1\0"
7682
  /* 4165 */ "M2_vmac2s_s1\0"
7683
  /* 4178 */ "M2_vmpy2s_s1\0"
7684
  /* 4191 */ "M2_cmacs_s1\0"
7685
  /* 4203 */ "M2_vdmacs_s1\0"
7686
  /* 4216 */ "M2_cnacs_s1\0"
7687
  /* 4228 */ "M2_vmac2es_s1\0"
7688
  /* 4242 */ "M2_vmpy2es_s1\0"
7689
  /* 4256 */ "M2_mmachs_s1\0"
7690
  /* 4269 */ "M2_mmacuhs_s1\0"
7691
  /* 4283 */ "M2_mmacls_s1\0"
7692
  /* 4296 */ "M2_mmaculs_s1\0"
7693
  /* 4310 */ "M2_cmpyrs_s1\0"
7694
  /* 4323 */ "M2_vdmpyrs_s1\0"
7695
  /* 4337 */ "M2_cmpys_s1\0"
7696
  /* 4349 */ "M2_vrcmpys_s1\0"
7697
  /* 4363 */ "M2_vdmpys_s1\0"
7698
  /* 4376 */ "M2_vmac2su_s1\0"
7699
  /* 4390 */ "M2_vmpy2su_s1\0"
7700
  /* 4404 */ "M2_mmpyuh_rs1\0"
7701
  /* 4418 */ "M2_mmpyh_rs1\0"
7702
  /* 4431 */ "M2_hmmpyh_rs1\0"
7703
  /* 4445 */ "M2_mmpyul_rs1\0"
7704
  /* 4459 */ "M2_mmpyl_rs1\0"
7705
  /* 4472 */ "M2_hmmpyl_rs1\0"
7706
  /* 4486 */ "M2_mmachs_rs1\0"
7707
  /* 4500 */ "M2_mmacuhs_rs1\0"
7708
  /* 4515 */ "M2_mmacls_rs1\0"
7709
  /* 4529 */ "M2_mmaculs_rs1\0"
7710
  /* 4544 */ "DuplexIClass1\0"
7711
  /* 4558 */ "S2_ct1\0"
7712
  /* 4565 */ "CONST32\0"
7713
  /* 4573 */ "V6_vsub_qf32\0"
7714
  /* 4586 */ "V6_vadd_qf32\0"
7715
  /* 4599 */ "V6_vconv_hf_qf32\0"
7716
  /* 4616 */ "V6_vconv_sf_qf32\0"
7717
  /* 4633 */ "V6_vmpy_qf32\0"
7718
  /* 4646 */ "G_FLOG2\0"
7719
  /* 4654 */ "G_FEXP2\0"
7720
  /* 4662 */ "M2_vmac2\0"
7721
  /* 4671 */ "V6_pred_scalar2\0"
7722
  /* 4687 */ "DuplexIClass2\0"
7723
  /* 4701 */ "M4_mpyri_addr_u2\0"
7724
  /* 4718 */ "V6_pred_scalar2v2\0"
7725
  /* 4736 */ "DuplexIClass3\0"
7726
  /* 4750 */ "CONST64\0"
7727
  /* 4758 */ "V6_vmpyewuh_64\0"
7728
  /* 4773 */ "TFRI64_V4\0"
7729
  /* 4783 */ "RESTORE_DEALLOC_BEFORE_TAILCALL_V4\0"
7730
  /* 4818 */ "SAVE_REGISTERS_CALL_V4\0"
7731
  /* 4841 */ "RESTORE_DEALLOC_RET_JMP_V4\0"
7732
  /* 4868 */ "DuplexIClass4\0"
7733
  /* 4882 */ "V6_vlut4\0"
7734
  /* 4891 */ "DuplexIClass5\0"
7735
  /* 4905 */ "V6_vmpy_qf32_qf16\0"
7736
  /* 4923 */ "V6_vsub_qf16\0"
7737
  /* 4936 */ "V6_vadd_qf16\0"
7738
  /* 4949 */ "V6_vconv_hf_qf16\0"
7739
  /* 4966 */ "V6_vmpy_qf16\0"
7740
  /* 4979 */ "V6_vwhist256\0"
7741
  /* 4992 */ "DuplexIClass6\0"
7742
  /* 5006 */ "DuplexIClass7\0"
7743
  /* 5020 */ "V6_vwhist128\0"
7744
  /* 5033 */ "C2_all8\0"
7745
  /* 5041 */ "DuplexIClass8\0"
7746
  /* 5055 */ "C2_any8\0"
7747
  /* 5063 */ "C4_fastcorner9\0"
7748
  /* 5078 */ "DuplexIClass9\0"
7749
  /* 5092 */ "G_FMA\0"
7750
  /* 5098 */ "G_STRICT_FMA\0"
7751
  /* 5111 */ "DuplexIClassA\0"
7752
  /* 5125 */ "G_FSUB\0"
7753
  /* 5132 */ "G_STRICT_FSUB\0"
7754
  /* 5146 */ "G_ATOMICRMW_FSUB\0"
7755
  /* 5163 */ "G_SUB\0"
7756
  /* 5169 */ "G_ATOMICRMW_SUB\0"
7757
  /* 5185 */ "DuplexIClassB\0"
7758
  /* 5199 */ "RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC\0"
7759
  /* 5238 */ "SAVE_REGISTERS_CALL_V4_PIC\0"
7760
  /* 5265 */ "RESTORE_DEALLOC_RET_JMP_V4_PIC\0"
7761
  /* 5296 */ "SAVE_REGISTERS_CALL_V4STK_PIC\0"
7762
  /* 5326 */ "RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC\0"
7763
  /* 5369 */ "SAVE_REGISTERS_CALL_V4_EXT_PIC\0"
7764
  /* 5400 */ "RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC\0"
7765
  /* 5435 */ "SAVE_REGISTERS_CALL_V4STK_EXT_PIC\0"
7766
  /* 5469 */ "G_INTRINSIC\0"
7767
  /* 5481 */ "G_FPTRUNC\0"
7768
  /* 5491 */ "G_INTRINSIC_TRUNC\0"
7769
  /* 5509 */ "G_TRUNC\0"
7770
  /* 5517 */ "G_BUILD_VECTOR_TRUNC\0"
7771
  /* 5538 */ "G_DYN_STACKALLOC\0"
7772
  /* 5555 */ "DuplexIClassC\0"
7773
  /* 5569 */ "G_FMAD\0"
7774
  /* 5576 */ "G_INDEXED_SEXTLOAD\0"
7775
  /* 5595 */ "G_SEXTLOAD\0"
7776
  /* 5606 */ "G_INDEXED_ZEXTLOAD\0"
7777
  /* 5625 */ "G_ZEXTLOAD\0"
7778
  /* 5636 */ "G_INDEXED_LOAD\0"
7779
  /* 5651 */ "G_LOAD\0"
7780
  /* 5658 */ "G_VECREDUCE_FADD\0"
7781
  /* 5675 */ "G_FADD\0"
7782
  /* 5682 */ "G_VECREDUCE_SEQ_FADD\0"
7783
  /* 5703 */ "G_STRICT_FADD\0"
7784
  /* 5717 */ "G_ATOMICRMW_FADD\0"
7785
  /* 5734 */ "G_VECREDUCE_ADD\0"
7786
  /* 5750 */ "G_ADD\0"
7787
  /* 5756 */ "G_PTR_ADD\0"
7788
  /* 5766 */ "G_ATOMICRMW_ADD\0"
7789
  /* 5782 */ "G_ATOMICRMW_NAND\0"
7790
  /* 5799 */ "G_VECREDUCE_AND\0"
7791
  /* 5815 */ "G_AND\0"
7792
  /* 5821 */ "G_ATOMICRMW_AND\0"
7793
  /* 5837 */ "LIFETIME_END\0"
7794
  /* 5850 */ "G_BRCOND\0"
7795
  /* 5859 */ "G_LLROUND\0"
7796
  /* 5869 */ "G_LROUND\0"
7797
  /* 5878 */ "G_INTRINSIC_ROUND\0"
7798
  /* 5896 */ "G_INTRINSIC_FPTRUNC_ROUND\0"
7799
  /* 5922 */ "LOAD_STACK_GUARD\0"
7800
  /* 5939 */ "DuplexIClassD\0"
7801
  /* 5953 */ "PSEUDO_PROBE\0"
7802
  /* 5966 */ "G_SSUBE\0"
7803
  /* 5974 */ "G_USUBE\0"
7804
  /* 5982 */ "G_FENCE\0"
7805
  /* 5990 */ "ARITH_FENCE\0"
7806
  /* 6002 */ "REG_SEQUENCE\0"
7807
  /* 6015 */ "G_SADDE\0"
7808
  /* 6023 */ "G_UADDE\0"
7809
  /* 6031 */ "G_GET_FPMODE\0"
7810
  /* 6044 */ "G_RESET_FPMODE\0"
7811
  /* 6059 */ "G_SET_FPMODE\0"
7812
  /* 6072 */ "G_FMINNUM_IEEE\0"
7813
  /* 6087 */ "G_FMAXNUM_IEEE\0"
7814
  /* 6102 */ "G_JUMP_TABLE\0"
7815
  /* 6115 */ "BUNDLE\0"
7816
  /* 6122 */ "G_MEMCPY_INLINE\0"
7817
  /* 6138 */ "LOCAL_ESCAPE\0"
7818
  /* 6151 */ "G_STACKRESTORE\0"
7819
  /* 6166 */ "G_INDEXED_STORE\0"
7820
  /* 6182 */ "G_STORE\0"
7821
  /* 6190 */ "G_BITREVERSE\0"
7822
  /* 6203 */ "DBG_VALUE\0"
7823
  /* 6213 */ "G_GLOBAL_VALUE\0"
7824
  /* 6228 */ "G_STACKSAVE\0"
7825
  /* 6240 */ "G_MEMMOVE\0"
7826
  /* 6250 */ "G_FREEZE\0"
7827
  /* 6259 */ "G_FCANONICALIZE\0"
7828
  /* 6275 */ "DuplexIClassE\0"
7829
  /* 6289 */ "G_CTLZ_ZERO_UNDEF\0"
7830
  /* 6307 */ "G_CTTZ_ZERO_UNDEF\0"
7831
  /* 6325 */ "G_IMPLICIT_DEF\0"
7832
  /* 6340 */ "DBG_INSTR_REF\0"
7833
  /* 6354 */ "DuplexIClassF\0"
7834
  /* 6368 */ "G_FNEG\0"
7835
  /* 6375 */ "EXTRACT_SUBREG\0"
7836
  /* 6390 */ "INSERT_SUBREG\0"
7837
  /* 6404 */ "G_SEXT_INREG\0"
7838
  /* 6417 */ "SUBREG_TO_REG\0"
7839
  /* 6431 */ "G_ATOMIC_CMPXCHG\0"
7840
  /* 6448 */ "G_ATOMICRMW_XCHG\0"
7841
  /* 6465 */ "G_FLOG\0"
7842
  /* 6472 */ "G_VAARG\0"
7843
  /* 6480 */ "PREALLOCATED_ARG\0"
7844
  /* 6497 */ "G_PREFETCH\0"
7845
  /* 6508 */ "G_SMULH\0"
7846
  /* 6516 */ "G_UMULH\0"
7847
  /* 6524 */ "DBG_PHI\0"
7848
  /* 6532 */ "G_FPTOSI\0"
7849
  /* 6541 */ "G_FPTOUI\0"
7850
  /* 6550 */ "G_FPOWI\0"
7851
  /* 6558 */ "G_PTRMASK\0"
7852
  /* 6568 */ "SAVE_REGISTERS_CALL_V4STK\0"
7853
  /* 6594 */ "GC_LABEL\0"
7854
  /* 6603 */ "DBG_LABEL\0"
7855
  /* 6613 */ "EH_LABEL\0"
7856
  /* 6622 */ "ANNOTATION_LABEL\0"
7857
  /* 6639 */ "ICALL_BRANCH_FUNNEL\0"
7858
  /* 6659 */ "G_FSHL\0"
7859
  /* 6666 */ "G_SHL\0"
7860
  /* 6672 */ "G_FCEIL\0"
7861
  /* 6680 */ "PATCHABLE_TAIL_CALL\0"
7862
  /* 6700 */ "PATCHABLE_TYPED_EVENT_CALL\0"
7863
  /* 6727 */ "PATCHABLE_EVENT_CALL\0"
7864
  /* 6748 */ "FENTRY_CALL\0"
7865
  /* 6760 */ "KILL\0"
7866
  /* 6765 */ "G_CONSTANT_POOL\0"
7867
  /* 6781 */ "G_ROTL\0"
7868
  /* 6788 */ "G_VECREDUCE_FMUL\0"
7869
  /* 6805 */ "G_FMUL\0"
7870
  /* 6812 */ "G_VECREDUCE_SEQ_FMUL\0"
7871
  /* 6833 */ "G_STRICT_FMUL\0"
7872
  /* 6847 */ "G_VECREDUCE_MUL\0"
7873
  /* 6863 */ "G_MUL\0"
7874
  /* 6869 */ "G_FREM\0"
7875
  /* 6876 */ "G_STRICT_FREM\0"
7876
  /* 6890 */ "G_SREM\0"
7877
  /* 6897 */ "G_UREM\0"
7878
  /* 6904 */ "G_SDIVREM\0"
7879
  /* 6914 */ "G_UDIVREM\0"
7880
  /* 6924 */ "INLINEASM\0"
7881
  /* 6934 */ "G_VECREDUCE_FMINIMUM\0"
7882
  /* 6955 */ "G_FMINIMUM\0"
7883
  /* 6966 */ "G_VECREDUCE_FMAXIMUM\0"
7884
  /* 6987 */ "G_FMAXIMUM\0"
7885
  /* 6998 */ "G_FMINNUM\0"
7886
  /* 7008 */ "G_FMAXNUM\0"
7887
  /* 7018 */ "G_INTRINSIC_ROUNDEVEN\0"
7888
  /* 7040 */ "G_ASSERT_ALIGN\0"
7889
  /* 7055 */ "G_FCOPYSIGN\0"
7890
  /* 7067 */ "G_VECREDUCE_FMIN\0"
7891
  /* 7084 */ "G_ATOMICRMW_FMIN\0"
7892
  /* 7101 */ "G_VECREDUCE_SMIN\0"
7893
  /* 7118 */ "G_SMIN\0"
7894
  /* 7125 */ "G_VECREDUCE_UMIN\0"
7895
  /* 7142 */ "G_UMIN\0"
7896
  /* 7149 */ "G_ATOMICRMW_UMIN\0"
7897
  /* 7166 */ "G_ATOMICRMW_MIN\0"
7898
  /* 7182 */ "G_FSIN\0"
7899
  /* 7189 */ "CFI_INSTRUCTION\0"
7900
  /* 7205 */ "ADJCALLSTACKDOWN\0"
7901
  /* 7222 */ "G_SSUBO\0"
7902
  /* 7230 */ "G_USUBO\0"
7903
  /* 7238 */ "G_SADDO\0"
7904
  /* 7246 */ "G_UADDO\0"
7905
  /* 7254 */ "JUMP_TABLE_DEBUG_INFO\0"
7906
  /* 7276 */ "G_SMULO\0"
7907
  /* 7284 */ "G_UMULO\0"
7908
  /* 7292 */ "G_BZERO\0"
7909
  /* 7300 */ "STACKMAP\0"
7910
  /* 7309 */ "G_ATOMICRMW_UDEC_WRAP\0"
7911
  /* 7331 */ "G_ATOMICRMW_UINC_WRAP\0"
7912
  /* 7353 */ "G_BSWAP\0"
7913
  /* 7361 */ "G_SITOFP\0"
7914
  /* 7370 */ "G_UITOFP\0"
7915
  /* 7379 */ "G_FCMP\0"
7916
  /* 7386 */ "G_ICMP\0"
7917
  /* 7393 */ "G_CTPOP\0"
7918
  /* 7401 */ "PATCHABLE_OP\0"
7919
  /* 7414 */ "FAULTING_OP\0"
7920
  /* 7426 */ "ADJCALLSTACKUP\0"
7921
  /* 7441 */ "PREALLOCATED_SETUP\0"
7922
  /* 7460 */ "G_FLDEXP\0"
7923
  /* 7469 */ "G_STRICT_FLDEXP\0"
7924
  /* 7485 */ "G_FEXP\0"
7925
  /* 7492 */ "G_FFREXP\0"
7926
  /* 7501 */ "A6_vminub_RdP\0"
7927
  /* 7515 */ "G_BR\0"
7928
  /* 7520 */ "INLINEASM_BR\0"
7929
  /* 7533 */ "G_BLOCK_ADDR\0"
7930
  /* 7546 */ "MEMBARRIER\0"
7931
  /* 7557 */ "G_CONSTANT_FOLD_BARRIER\0"
7932
  /* 7581 */ "PATCHABLE_FUNCTION_ENTER\0"
7933
  /* 7606 */ "G_READCYCLECOUNTER\0"
7934
  /* 7625 */ "G_READ_REGISTER\0"
7935
  /* 7641 */ "G_WRITE_REGISTER\0"
7936
  /* 7658 */ "G_ASHR\0"
7937
  /* 7665 */ "G_FSHR\0"
7938
  /* 7672 */ "G_LSHR\0"
7939
  /* 7679 */ "G_FFLOOR\0"
7940
  /* 7688 */ "G_BUILD_VECTOR\0"
7941
  /* 7703 */ "G_SHUFFLE_VECTOR\0"
7942
  /* 7720 */ "G_VECREDUCE_XOR\0"
7943
  /* 7736 */ "G_XOR\0"
7944
  /* 7742 */ "G_ATOMICRMW_XOR\0"
7945
  /* 7758 */ "G_VECREDUCE_OR\0"
7946
  /* 7773 */ "G_OR\0"
7947
  /* 7778 */ "G_ATOMICRMW_OR\0"
7948
  /* 7793 */ "EH_RETURN_JMPR\0"
7949
  /* 7808 */ "G_ROTR\0"
7950
  /* 7815 */ "G_INTTOPTR\0"
7951
  /* 7826 */ "G_FABS\0"
7952
  /* 7833 */ "G_ABS\0"
7953
  /* 7839 */ "A5_ACS\0"
7954
  /* 7846 */ "G_UNMERGE_VALUES\0"
7955
  /* 7863 */ "G_MERGE_VALUES\0"
7956
  /* 7878 */ "G_FCOS\0"
7957
  /* 7885 */ "G_CONCAT_VECTORS\0"
7958
  /* 7902 */ "COPY_TO_REGCLASS\0"
7959
  /* 7919 */ "G_IS_FPCLASS\0"
7960
  /* 7932 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\0"
7961
  /* 7962 */ "G_INTRINSIC_W_SIDE_EFFECTS\0"
7962
  /* 7989 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\0"
7963
  /* 8027 */ "G_SSUBSAT\0"
7964
  /* 8037 */ "G_USUBSAT\0"
7965
  /* 8047 */ "G_SADDSAT\0"
7966
  /* 8057 */ "G_UADDSAT\0"
7967
  /* 8067 */ "G_SSHLSAT\0"
7968
  /* 8077 */ "G_USHLSAT\0"
7969
  /* 8087 */ "G_SMULFIXSAT\0"
7970
  /* 8100 */ "G_UMULFIXSAT\0"
7971
  /* 8113 */ "G_SDIVFIXSAT\0"
7972
  /* 8126 */ "G_UDIVFIXSAT\0"
7973
  /* 8139 */ "G_EXTRACT\0"
7974
  /* 8149 */ "G_SELECT\0"
7975
  /* 8158 */ "G_BRINDIRECT\0"
7976
  /* 8171 */ "PATCHABLE_RET\0"
7977
  /* 8185 */ "G_MEMSET\0"
7978
  /* 8194 */ "PATCHABLE_FUNCTION_EXIT\0"
7979
  /* 8218 */ "G_BRJT\0"
7980
  /* 8225 */ "G_EXTRACT_VECTOR_ELT\0"
7981
  /* 8246 */ "G_INSERT_VECTOR_ELT\0"
7982
  /* 8266 */ "G_FCONSTANT\0"
7983
  /* 8278 */ "G_CONSTANT\0"
7984
  /* 8289 */ "G_INTRINSIC_CONVERGENT\0"
7985
  /* 8312 */ "STATEPOINT\0"
7986
  /* 8323 */ "PATCHPOINT\0"
7987
  /* 8334 */ "G_PTRTOINT\0"
7988
  /* 8345 */ "G_FRINT\0"
7989
  /* 8353 */ "G_INTRINSIC_LRINT\0"
7990
  /* 8371 */ "G_FNEARBYINT\0"
7991
  /* 8384 */ "G_VASTART\0"
7992
  /* 8394 */ "LIFETIME_START\0"
7993
  /* 8409 */ "G_INVOKE_REGION_START\0"
7994
  /* 8431 */ "G_INSERT\0"
7995
  /* 8440 */ "G_FSQRT\0"
7996
  /* 8448 */ "G_STRICT_FSQRT\0"
7997
  /* 8463 */ "G_BITCAST\0"
7998
  /* 8473 */ "G_ADDRSPACE_CAST\0"
7999
  /* 8490 */ "DBG_VALUE_LIST\0"
8000
  /* 8505 */ "G_FPEXT\0"
8001
  /* 8513 */ "G_SEXT\0"
8002
  /* 8520 */ "G_ASSERT_SEXT\0"
8003
  /* 8534 */ "G_ANYEXT\0"
8004
  /* 8543 */ "G_ZEXT\0"
8005
  /* 8550 */ "G_ASSERT_ZEXT\0"
8006
  /* 8564 */ "RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT\0"
8007
  /* 8603 */ "SAVE_REGISTERS_CALL_V4_EXT\0"
8008
  /* 8630 */ "RESTORE_DEALLOC_RET_JMP_V4_EXT\0"
8009
  /* 8661 */ "SAVE_REGISTERS_CALL_V4STK_EXT\0"
8010
  /* 8691 */ "G_FDIV\0"
8011
  /* 8698 */ "G_STRICT_FDIV\0"
8012
  /* 8712 */ "G_SDIV\0"
8013
  /* 8719 */ "G_UDIV\0"
8014
  /* 8726 */ "G_GET_FPENV\0"
8015
  /* 8738 */ "G_RESET_FPENV\0"
8016
  /* 8752 */ "G_SET_FPENV\0"
8017
  /* 8764 */ "G_FPOW\0"
8018
  /* 8771 */ "G_VECREDUCE_FMAX\0"
8019
  /* 8788 */ "G_ATOMICRMW_FMAX\0"
8020
  /* 8805 */ "G_VECREDUCE_SMAX\0"
8021
  /* 8822 */ "G_SMAX\0"
8022
  /* 8829 */ "G_VECREDUCE_UMAX\0"
8023
  /* 8846 */ "G_UMAX\0"
8024
  /* 8853 */ "G_ATOMICRMW_UMAX\0"
8025
  /* 8870 */ "G_ATOMICRMW_MAX\0"
8026
  /* 8886 */ "G_FRAME_INDEX\0"
8027
  /* 8900 */ "G_SBFX\0"
8028
  /* 8907 */ "G_UBFX\0"
8029
  /* 8914 */ "G_SMULFIX\0"
8030
  /* 8924 */ "G_UMULFIX\0"
8031
  /* 8934 */ "G_SDIVFIX\0"
8032
  /* 8944 */ "G_UDIVFIX\0"
8033
  /* 8954 */ "G_MEMCPY\0"
8034
  /* 8963 */ "COPY\0"
8035
  /* 8968 */ "G_CTLZ\0"
8036
  /* 8975 */ "G_CTTZ\0"
8037
  /* 8982 */ "PS_alloca\0"
8038
  /* 8992 */ "PS_fia\0"
8039
  /* 8999 */ "Y5_l2locka\0"
8040
  /* 9010 */ "Y5_l2unlocka\0"
8041
  /* 9023 */ "F2_sffma\0"
8042
  /* 9032 */ "Y2_dccleana\0"
8043
  /* 9044 */ "PS_aligna\0"
8044
  /* 9054 */ "Y2_dczeroa\0"
8045
  /* 9065 */ "F2_sfrecipa\0"
8046
  /* 9077 */ "Y6_l2gcleanpa\0"
8047
  /* 9091 */ "Y6_l2gcleaninvpa\0"
8048
  /* 9108 */ "V6_vrdelta\0"
8049
  /* 9119 */ "V6_vdelta\0"
8050
  /* 9129 */ "F2_sfinvsqrta\0"
8051
  /* 9143 */ "Y2_dcinva\0"
8052
  /* 9153 */ "Y2_icinva\0"
8053
  /* 9163 */ "Y2_dccleaninva\0"
8054
  /* 9178 */ "V6_vcvt_hf_b\0"
8055
  /* 9191 */ "V6_vsubb\0"
8056
  /* 9200 */ "V6_vaddb\0"
8057
  /* 9209 */ "S2_shuffeb\0"
8058
  /* 9220 */ "V6_vshuffeb\0"
8059
  /* 9232 */ "V6_vpackeb\0"
8060
  /* 9243 */ "V6_vshufoeb\0"
8061
  /* 9255 */ "M6_vabsdiffb\0"
8062
  /* 9268 */ "V6_vshuffb\0"
8063
  /* 9279 */ "V6_vnavgb\0"
8064
  /* 9289 */ "V6_vavgb\0"
8065
  /* 9298 */ "V6_vmpahb\0"
8066
  /* 9308 */ "V6_vroundhb\0"
8067
  /* 9320 */ "S2_vtrunehb\0"
8068
  /* 9332 */ "V6_vmpyihb\0"
8069
  /* 9343 */ "S2_vtrunohb\0"
8070
  /* 9355 */ "S2_vsathb\0"
8071
  /* 9365 */ "S2_svsathb\0"
8072
  /* 9376 */ "V6_vmpauhb\0"
8073
  /* 9387 */ "V6_vdmpyhb\0"
8074
  /* 9398 */ "V6_vtmpyhb\0"
8075
  /* 9409 */ "S2_vspliceib\0"
8076
  /* 9422 */ "F2_sffma_lib\0"
8077
  /* 9435 */ "F2_sffms_lib\0"
8078
  /* 9448 */ "S2_valignib\0"
8079
  /* 9460 */ "PS_vsplatib\0"
8080
  /* 9472 */ "V6_vunpackb\0"
8081
  /* 9484 */ "V6_vdealb\0"
8082
  /* 9494 */ "S2_clb\0"
8083
  /* 9501 */ "V6_vlalignb\0"
8084
  /* 9513 */ "V6_valignb\0"
8085
  /* 9524 */ "A2_vminb\0"
8086
  /* 9533 */ "V6_vminb\0"
8087
  /* 9542 */ "S2_shuffob\0"
8088
  /* 9553 */ "V6_vshuffob\0"
8089
  /* 9565 */ "V6_vunpackob\0"
8090
  /* 9578 */ "V6_vpackob\0"
8091
  /* 9589 */ "V6_veqb\0"
8092
  /* 9597 */ "V6_vprefixqb\0"
8093
  /* 9610 */ "S2_vsplicerb\0"
8094
  /* 9623 */ "S2_valignrb\0"
8095
  /* 9635 */ "V6_vlsrb\0"
8096
  /* 9644 */ "S2_vsplatrb\0"
8097
  /* 9656 */ "PS_vsplatrb\0"
8098
  /* 9668 */ "V6_vabsb\0"
8099
  /* 9677 */ "V6_vsb\0"
8100
  /* 9684 */ "V6_lvsplatb\0"
8101
  /* 9696 */ "A2_satb\0"
8102
  /* 9704 */ "V6_vgtb\0"
8103
  /* 9712 */ "SA1_sxtb\0"
8104
  /* 9721 */ "dup_A2_sxtb\0"
8105
  /* 9733 */ "SA1_zxtb\0"
8106
  /* 9742 */ "dup_A2_zxtb\0"
8107
  /* 9754 */ "V6_vcvt_hf_ub\0"
8108
  /* 9768 */ "A2_vsubub\0"
8109
  /* 9778 */ "A2_vrsadub\0"
8110
  /* 9789 */ "A2_vraddub\0"
8111
  /* 9800 */ "A2_vaddub\0"
8112
  /* 9810 */ "M6_vabsdiffub\0"
8113
  /* 9824 */ "V6_vabsdiffub\0"
8114
  /* 9838 */ "V6_vnavgub\0"
8115
  /* 9849 */ "A2_vavgub\0"
8116
  /* 9859 */ "V6_vavgub\0"
8117
  /* 9869 */ "V6_vroundhub\0"
8118
  /* 9882 */ "S2_vsathub\0"
8119
  /* 9893 */ "V6_vsathub\0"
8120
  /* 9904 */ "S2_svsathub\0"
8121
  /* 9916 */ "V6_vrounduhub\0"
8122
  /* 9930 */ "V6_vunpackub\0"
8123
  /* 9943 */ "A2_vminub\0"
8124
  /* 9953 */ "V6_vminub\0"
8125
  /* 9963 */ "V6_MAP_equb\0"
8126
  /* 9975 */ "A2_sub\0"
8127
  /* 9982 */ "F2_dfsub\0"
8128
  /* 9991 */ "F2_sfsub\0"
8129
  /* 10000 */ "A2_satub\0"
8130
  /* 10009 */ "V6_vgtub\0"
8131
  /* 10018 */ "V6_vmpyiwub\0"
8132
  /* 10030 */ "A2_vmaxub\0"
8133
  /* 10040 */ "V6_vmaxub\0"
8134
  /* 10050 */ "V6_vrmpyub\0"
8135
  /* 10061 */ "V6_vmpyub\0"
8136
  /* 10071 */ "V6_vlutvvb\0"
8137
  /* 10082 */ "V6_vmpyiwb\0"
8138
  /* 10093 */ "A2_vmaxb\0"
8139
  /* 10102 */ "V6_vmaxb\0"
8140
  /* 10111 */ "S2_tableidxb\0"
8141
  /* 10124 */ "V6_vtmpyb\0"
8142
  /* 10134 */ "V6_vzb\0"
8143
  /* 10141 */ "M2_vrcmaci_s0c\0"
8144
  /* 10156 */ "M2_vrcmpyi_s0c\0"
8145
  /* 10171 */ "M2_vrcmacr_s0c\0"
8146
  /* 10186 */ "M2_vrcmpyr_s0c\0"
8147
  /* 10201 */ "A4_subp_c\0"
8148
  /* 10211 */ "A4_addp_c\0"
8149
  /* 10221 */ "S6_rol_i_p_nac\0"
8150
  /* 10236 */ "S2_asl_i_p_nac\0"
8151
  /* 10251 */ "S2_asr_i_p_nac\0"
8152
  /* 10266 */ "S2_lsr_i_p_nac\0"
8153
  /* 10281 */ "S2_asl_r_p_nac\0"
8154
  /* 10296 */ "S2_lsl_r_p_nac\0"
8155
  /* 10311 */ "S2_asr_r_p_nac\0"
8156
  /* 10326 */ "S2_lsr_r_p_nac\0"
8157
  /* 10341 */ "S6_rol_i_r_nac\0"
8158
  /* 10356 */ "S2_asl_i_r_nac\0"
8159
  /* 10371 */ "S2_asr_i_r_nac\0"
8160
  /* 10386 */ "S2_lsr_i_r_nac\0"
8161
  /* 10401 */ "S2_asl_r_r_nac\0"
8162
  /* 10416 */ "S2_lsl_r_r_nac\0"
8163
  /* 10431 */ "S2_asr_r_r_nac\0"
8164
  /* 10446 */ "S2_lsr_r_r_nac\0"
8165
  /* 10461 */ "V6_vmpyowh_64_acc\0"
8166
  /* 10479 */ "V6_vmpahb_acc\0"
8167
  /* 10493 */ "V6_vmpyihb_acc\0"
8168
  /* 10508 */ "V6_vmpauhb_acc\0"
8169
  /* 10523 */ "V6_vdmpyhb_acc\0"
8170
  /* 10538 */ "V6_vtmpyhb_acc\0"
8171
  /* 10553 */ "A2_vrsadub_acc\0"
8172
  /* 10568 */ "A2_vraddub_acc\0"
8173
  /* 10583 */ "V6_vmpyiwub_acc\0"
8174
  /* 10599 */ "V6_vrmpyub_acc\0"
8175
  /* 10614 */ "V6_vmpyub_acc\0"
8176
  /* 10628 */ "V6_vmpyiwb_acc\0"
8177
  /* 10643 */ "V6_vtmpyb_acc\0"
8178
  /* 10657 */ "M7_dcmpyiwc_acc\0"
8179
  /* 10673 */ "M7_dcmpyrwc_acc\0"
8180
  /* 10689 */ "V6_vmpyuhe_acc\0"
8181
  /* 10704 */ "S4_vrcrotate_acc\0"
8182
  /* 10721 */ "V6_vmpy_sf_bf_acc\0"
8183
  /* 10739 */ "V6_vmpy_hf_hf_acc\0"
8184
  /* 10757 */ "V6_vdmpy_sf_hf_acc\0"
8185
  /* 10776 */ "V6_vmpy_sf_hf_acc\0"
8186
  /* 10794 */ "V6_vaddubh_acc\0"
8187
  /* 10809 */ "V6_vmpyih_acc\0"
8188
  /* 10823 */ "V6_vaslh_acc\0"
8189
  /* 10836 */ "V6_vasrh_acc\0"
8190
  /* 10849 */ "V6_vdsaduh_acc\0"
8191
  /* 10864 */ "V6_vmpyiewuh_acc\0"
8192
  /* 10881 */ "V6_vmpyuh_acc\0"
8193
  /* 10895 */ "V6_vmpyiewh_acc\0"
8194
  /* 10911 */ "V6_vmpyiwh_acc\0"
8195
  /* 10926 */ "M4_vpmpyh_acc\0"
8196
  /* 10940 */ "V6_vmpyh_acc\0"
8197
  /* 10953 */ "V6_vrsadubi_acc\0"
8198
  /* 10969 */ "V6_vrmpyubi_acc\0"
8199
  /* 10985 */ "V6_vrmpybusi_acc\0"
8200
  /* 11002 */ "S6_rol_i_p_acc\0"
8201
  /* 11017 */ "S2_asl_i_p_acc\0"
8202
  /* 11032 */ "S2_asr_i_p_acc\0"
8203
  /* 11047 */ "S2_lsr_i_p_acc\0"
8204
  /* 11062 */ "S2_asl_r_p_acc\0"
8205
  /* 11077 */ "S2_lsl_r_p_acc\0"
8206
  /* 11092 */ "S2_asr_r_p_acc\0"
8207
  /* 11107 */ "S2_lsr_r_p_acc\0"
8208
  /* 11122 */ "S6_rol_i_r_acc\0"
8209
  /* 11137 */ "S2_asl_i_r_acc\0"
8210
  /* 11152 */ "S2_asr_i_r_acc\0"
8211
  /* 11167 */ "S2_lsr_i_r_acc\0"
8212
  /* 11182 */ "S2_asl_r_r_acc\0"
8213
  /* 11197 */ "S2_lsl_r_r_acc\0"
8214
  /* 11212 */ "S2_asr_r_r_acc\0"
8215
  /* 11227 */ "S2_lsr_r_r_acc\0"
8216
  /* 11242 */ "V6_vmpabus_acc\0"
8217
  /* 11257 */ "V6_vdmpybus_acc\0"
8218
  /* 11273 */ "V6_vrmpybus_acc\0"
8219
  /* 11289 */ "V6_vtmpybus_acc\0"
8220
  /* 11305 */ "V6_vmpybus_acc\0"
8221
  /* 11320 */ "V6_vmpyhus_acc\0"
8222
  /* 11335 */ "V6_vdmpyhsat_acc\0"
8223
  /* 11352 */ "V6_vmpyhsat_acc\0"
8224
  /* 11368 */ "V6_vdmpyhisat_acc\0"
8225
  /* 11386 */ "V6_vdmpyhsuisat_acc\0"
8226
  /* 11406 */ "V6_vdmpyhsusat_acc\0"
8227
  /* 11425 */ "V6_vdmpyhvsat_acc\0"
8228
  /* 11443 */ "V6_vrmpyzbb_rt_acc\0"
8229
  /* 11462 */ "V6_vrmpyzcb_rt_acc\0"
8230
  /* 11481 */ "V6_vrmpyznb_rt_acc\0"
8231
  /* 11500 */ "V6_vrmpyzbub_rt_acc\0"
8232
  /* 11520 */ "V6_vrmpyzcbs_rt_acc\0"
8233
  /* 11540 */ "V6_vandqrt_acc\0"
8234
  /* 11555 */ "V6_vandnqrt_acc\0"
8235
  /* 11571 */ "V6_vandvrt_acc\0"
8236
  /* 11586 */ "V6_vrmpybub_rtt_acc\0"
8237
  /* 11606 */ "V6_vrmpyub_rtt_acc\0"
8238
  /* 11625 */ "V6_vmpabuu_acc\0"
8239
  /* 11640 */ "V6_vrmpyubv_acc\0"
8240
  /* 11656 */ "V6_vmpyubv_acc\0"
8241
  /* 11671 */ "V6_vrmpybv_acc\0"
8242
  /* 11686 */ "V6_vmpybv_acc\0"
8243
  /* 11700 */ "V6_vdmpyhb_dv_acc\0"
8244
  /* 11718 */ "V6_vdmpybus_dv_acc\0"
8245
  /* 11737 */ "V6_vmpyuhv_acc\0"
8246
  /* 11752 */ "V6_vmpyhv_acc\0"
8247
  /* 11766 */ "V6_vrmpybusv_acc\0"
8248
  /* 11783 */ "V6_vmpybusv_acc\0"
8249
  /* 11799 */ "V6_vaddhw_acc\0"
8250
  /* 11813 */ "V6_vadduhw_acc\0"
8251
  /* 11828 */ "M7_dcmpyiw_acc\0"
8252
  /* 11843 */ "V6_vaslw_acc\0"
8253
  /* 11856 */ "PS_vmulw_acc\0"
8254
  /* 11869 */ "V6_vasrw_acc\0"
8255
  /* 11882 */ "M7_dcmpyrw_acc\0"
8256
  /* 11897 */ "M4_pmpyw_acc\0"
8257
  /* 11910 */ "V6_vrmpyzbb_rx_acc\0"
8258
  /* 11929 */ "V6_vrmpyzcb_rx_acc\0"
8259
  /* 11948 */ "V6_vrmpyznb_rx_acc\0"
8260
  /* 11967 */ "V6_vrmpyzbub_rx_acc\0"
8261
  /* 11987 */ "V6_vrmpyzcbs_rx_acc\0"
8262
  /* 12007 */ "M7_vdmpy_acc\0"
8263
  /* 12020 */ "M2_subacc\0"
8264
  /* 12030 */ "V6_vlutvvb_oracc\0"
8265
  /* 12047 */ "V6_vlutvwh_oracc\0"
8266
  /* 12064 */ "V6_vmpyowh_rnd_sacc\0"
8267
  /* 12084 */ "V6_vmpyowh_sacc\0"
8268
  /* 12100 */ "S6_rol_i_p_xacc\0"
8269
  /* 12116 */ "S2_asl_i_p_xacc\0"
8270
  /* 12132 */ "S2_lsr_i_p_xacc\0"
8271
  /* 12148 */ "S6_rol_i_r_xacc\0"
8272
  /* 12164 */ "S2_asl_i_r_xacc\0"
8273
  /* 12180 */ "S2_lsr_i_r_xacc\0"
8274
  /* 12196 */ "M2_xor_xacc\0"
8275
  /* 12208 */ "M4_xor_xacc\0"
8276
  /* 12220 */ "SA1_dec\0"
8277
  /* 12228 */ "M4_cmpyi_whc\0"
8278
  /* 12241 */ "M4_cmpyr_whc\0"
8279
  /* 12254 */ "SA1_inc\0"
8280
  /* 12262 */ "Y2_isync\0"
8281
  /* 12271 */ "Y5_tlboc\0"
8282
  /* 12280 */ "C4_addipc\0"
8283
  /* 12290 */ "F2_sffma_sc\0"
8284
  /* 12302 */ "M7_dcmpyiwc\0"
8285
  /* 12314 */ "M7_wcmpyiwc\0"
8286
  /* 12326 */ "M7_dcmpyrwc\0"
8287
  /* 12338 */ "M7_wcmpyrwc\0"
8288
  /* 12350 */ "F2_conv_df2d\0"
8289
  /* 12363 */ "F2_conv_sf2d\0"
8290
  /* 12376 */ "Y2_ciad\0"
8291
  /* 12384 */ "Y4_siad\0"
8292
  /* 12392 */ "dup_A2_add\0"
8293
  /* 12403 */ "V6_vscattermh_add\0"
8294
  /* 12421 */ "V6_vscattermhw_add\0"
8295
  /* 12440 */ "V6_vscattermw_add\0"
8296
  /* 12458 */ "F2_dfadd\0"
8297
  /* 12467 */ "F2_sfadd\0"
8298
  /* 12476 */ "V6_vshuffvdd\0"
8299
  /* 12489 */ "V6_vdealvdd\0"
8300
  /* 12501 */ "L4_loadd_locked\0"
8301
  /* 12517 */ "S4_stored_locked\0"
8302
  /* 12534 */ "L2_loadw_locked\0"
8303
  /* 12550 */ "S2_storew_locked\0"
8304
  /* 12567 */ "LDriw_pred\0"
8305
  /* 12578 */ "STriw_pred\0"
8306
  /* 12589 */ "Y2_crswap_old\0"
8307
  /* 12603 */ "A2_and\0"
8308
  /* 12610 */ "C2_and\0"
8309
  /* 12617 */ "V6_veqb_and\0"
8310
  /* 12629 */ "V6_vgtb_and\0"
8311
  /* 12641 */ "V6_MAP_equb_and\0"
8312
  /* 12657 */ "V6_vgtub_and\0"
8313
  /* 12670 */ "V6_pred_and\0"
8314
  /* 12682 */ "C4_and_and\0"
8315
  /* 12693 */ "M4_and_and\0"
8316
  /* 12704 */ "V6_vgtbf_and\0"
8317
  /* 12717 */ "V6_vgthf_and\0"
8318
  /* 12730 */ "V6_vgtsf_and\0"
8319
  /* 12743 */ "V6_veqh_and\0"
8320
  /* 12755 */ "V6_vgth_and\0"
8321
  /* 12767 */ "V6_MAP_equh_and\0"
8322
  /* 12783 */ "V6_vgtuh_and\0"
8323
  /* 12796 */ "S6_rol_i_p_and\0"
8324
  /* 12811 */ "S2_asl_i_p_and\0"
8325
  /* 12826 */ "S2_asr_i_p_and\0"
8326
  /* 12841 */ "S2_lsr_i_p_and\0"
8327
  /* 12856 */ "S2_asl_r_p_and\0"
8328
  /* 12871 */ "S2_lsl_r_p_and\0"
8329
  /* 12886 */ "S2_asr_r_p_and\0"
8330
  /* 12901 */ "S2_lsr_r_p_and\0"
8331
  /* 12916 */ "S6_rol_i_r_and\0"
8332
  /* 12931 */ "S2_asl_i_r_and\0"
8333
  /* 12946 */ "S2_asr_i_r_and\0"
8334
  /* 12961 */ "S2_lsr_i_r_and\0"
8335
  /* 12976 */ "S2_asl_r_r_and\0"
8336
  /* 12991 */ "S2_lsl_r_r_and\0"
8337
  /* 13006 */ "S2_asr_r_r_and\0"
8338
  /* 13021 */ "S2_lsr_r_r_and\0"
8339
  /* 13036 */ "C4_or_and\0"
8340
  /* 13046 */ "M4_or_and\0"
8341
  /* 13056 */ "M4_xor_and\0"
8342
  /* 13067 */ "V6_veqw_and\0"
8343
  /* 13079 */ "V6_vgtw_and\0"
8344
  /* 13091 */ "V6_MAP_equw_and\0"
8345
  /* 13107 */ "V6_vgtuw_and\0"
8346
  /* 13120 */ "V6_vand\0"
8347
  /* 13128 */ "M7_wcmpyiwc_rnd\0"
8348
  /* 13144 */ "M7_wcmpyrwc_rnd\0"
8349
  /* 13160 */ "V6_vmpyowh_rnd\0"
8350
  /* 13175 */ "S2_asr_i_p_rnd\0"
8351
  /* 13190 */ "S2_asr_i_r_rnd\0"
8352
  /* 13205 */ "M7_wcmpyiw_rnd\0"
8353
  /* 13220 */ "M7_wcmpyrw_rnd\0"
8354
  /* 13235 */ "V6_vavgbrnd\0"
8355
  /* 13247 */ "V6_vavgubrnd\0"
8356
  /* 13260 */ "V6_vavghrnd\0"
8357
  /* 13272 */ "S5_vasrhrnd\0"
8358
  /* 13284 */ "V6_vavguhrnd\0"
8359
  /* 13297 */ "V6_vavgwrnd\0"
8360
  /* 13309 */ "V6_vavguwrnd\0"
8361
  /* 13322 */ "F2_sffixupd\0"
8362
  /* 13334 */ "F2_conv_df2ud\0"
8363
  /* 13348 */ "F2_conv_sf2ud\0"
8364
  /* 13362 */ "S2_tableidxd\0"
8365
  /* 13375 */ "Y4_trace\0"
8366
  /* 13384 */ "invalid_decode\0"
8367
  /* 13399 */ "F2_dfcmpge\0"
8368
  /* 13410 */ "F2_sfcmpge\0"
8369
  /* 13421 */ "V6_vmpyuhe\0"
8370
  /* 13432 */ "CALLProfile\0"
8371
  /* 13444 */ "SS2_allocframe\0"
8372
  /* 13459 */ "dup_S2_allocframe\0"
8373
  /* 13477 */ "SL2_deallocframe\0"
8374
  /* 13494 */ "dup_L2_deallocframe\0"
8375
  /* 13514 */ "Y2_resume\0"
8376
  /* 13524 */ "Y6_dmresume\0"
8377
  /* 13536 */ "V6_vnccombine\0"
8378
  /* 13550 */ "V6_vccombine\0"
8379
  /* 13563 */ "V6_vcombine\0"
8380
  /* 13575 */ "PS_false\0"
8381
  /* 13584 */ "PS_qfalse\0"
8382
  /* 13594 */ "J2_pause\0"
8383
  /* 13603 */ "Y6_dmpause\0"
8384
  /* 13614 */ "J2_unpause\0"
8385
  /* 13625 */ "S4_vrcrotate\0"
8386
  /* 13638 */ "S2_vcrotate\0"
8387
  /* 13650 */ "C4_cmplte\0"
8388
  /* 13660 */ "J2_rte\0"
8389
  /* 13667 */ "PS_true\0"
8390
  /* 13675 */ "PS_qtrue\0"
8391
  /* 13684 */ "S2_interleave\0"
8392
  /* 13698 */ "S2_deinterleave\0"
8393
  /* 13714 */ "SL2_jumpr31_f\0"
8394
  /* 13728 */ "SL2_return_f\0"
8395
  /* 13741 */ "L4_return_f\0"
8396
  /* 13753 */ "L4_return_map_to_raw_f\0"
8397
  /* 13776 */ "V6_vsub_sf_bf\0"
8398
  /* 13790 */ "V6_vadd_sf_bf\0"
8399
  /* 13804 */ "V6_vmpy_sf_bf\0"
8400
  /* 13818 */ "V6_vmin_bf\0"
8401
  /* 13829 */ "V6_vmax_bf\0"
8402
  /* 13840 */ "V6_vgtbf\0"
8403
  /* 13849 */ "A4_psxtbf\0"
8404
  /* 13859 */ "A4_pzxtbf\0"
8405
  /* 13869 */ "A2_psubf\0"
8406
  /* 13878 */ "F2_conv_d2df\0"
8407
  /* 13891 */ "F2_conv_ud2df\0"
8408
  /* 13905 */ "F2_conv_sf2df\0"
8409
  /* 13919 */ "F2_conv_w2df\0"
8410
  /* 13932 */ "F2_conv_uw2df\0"
8411
  /* 13946 */ "A2_paddf\0"
8412
  /* 13955 */ "A2_pandf\0"
8413
  /* 13964 */ "V6_vshuff\0"
8414
  /* 13974 */ "V6_vmpy_qf32_hf\0"
8415
  /* 13990 */ "V6_vmpy_qf16_hf\0"
8416
  /* 14006 */ "V6_vcvt_b_hf\0"
8417
  /* 14019 */ "V6_vcvt_ub_hf\0"
8418
  /* 14033 */ "V6_vsub_hf\0"
8419
  /* 14044 */ "V6_vadd_hf\0"
8420
  /* 14055 */ "V6_vsub_hf_hf\0"
8421
  /* 14069 */ "V6_vadd_hf_hf\0"
8422
  /* 14083 */ "V6_vmpy_hf_hf\0"
8423
  /* 14097 */ "V6_vsub_sf_hf\0"
8424
  /* 14111 */ "V6_vadd_sf_hf\0"
8425
  /* 14125 */ "V6_vcvt_sf_hf\0"
8426
  /* 14139 */ "V6_vdmpy_sf_hf\0"
8427
  /* 14154 */ "V6_vmpy_sf_hf\0"
8428
  /* 14168 */ "V6_vfneg_hf\0"
8429
  /* 14180 */ "V6_vcvt_h_hf\0"
8430
  /* 14193 */ "V6_vconv_h_hf\0"
8431
  /* 14207 */ "V6_vcvt_uh_hf\0"
8432
  /* 14221 */ "V6_vfmin_hf\0"
8433
  /* 14233 */ "V6_vmin_hf\0"
8434
  /* 14244 */ "V6_vabs_hf\0"
8435
  /* 14255 */ "V6_vfmax_hf\0"
8436
  /* 14267 */ "V6_vmax_hf\0"
8437
  /* 14278 */ "V6_vmpy_qf32_mix_hf\0"
8438
  /* 14298 */ "V6_vmpy_qf16_mix_hf\0"
8439
  /* 14318 */ "A4_paslhf\0"
8440
  /* 14328 */ "A4_pasrhf\0"
8441
  /* 14338 */ "V6_vgthf\0"
8442
  /* 14347 */ "A4_psxthf\0"
8443
  /* 14357 */ "A4_pzxthf\0"
8444
  /* 14367 */ "A2_paddif\0"
8445
  /* 14377 */ "dup_C2_cmoveif\0"
8446
  /* 14392 */ "dup_C2_cmovenewif\0"
8447
  /* 14410 */ "J2_callf\0"
8448
  /* 14419 */ "J2_jumpf\0"
8449
  /* 14428 */ "A2_tfrpf\0"
8450
  /* 14437 */ "A2_tfrf\0"
8451
  /* 14445 */ "SA1_clrf\0"
8452
  /* 14454 */ "J2_callrf\0"
8453
  /* 14464 */ "A2_porf\0"
8454
  /* 14472 */ "A2_pxorf\0"
8455
  /* 14481 */ "J2_jumprf\0"
8456
  /* 14491 */ "F2_conv_d2sf\0"
8457
  /* 14504 */ "F2_conv_ud2sf\0"
8458
  /* 14518 */ "F2_conv_df2sf\0"
8459
  /* 14532 */ "F2_conv_w2sf\0"
8460
  /* 14545 */ "F2_conv_uw2sf\0"
8461
  /* 14559 */ "V6_vmpy_qf32_sf\0"
8462
  /* 14575 */ "V6_vsub_sf\0"
8463
  /* 14586 */ "V6_vadd_sf\0"
8464
  /* 14597 */ "V6_vcvt_bf_sf\0"
8465
  /* 14611 */ "V6_vcvt_hf_sf\0"
8466
  /* 14625 */ "V6_vsub_sf_sf\0"
8467
  /* 14639 */ "V6_vadd_sf_sf\0"
8468
  /* 14653 */ "V6_vmpy_sf_sf\0"
8469
  /* 14667 */ "V6_vfneg_sf\0"
8470
  /* 14679 */ "V6_vfmin_sf\0"
8471
  /* 14691 */ "V6_vmin_sf\0"
8472
  /* 14702 */ "V6_vabs_sf\0"
8473
  /* 14713 */ "V6_vconv_w_sf\0"
8474
  /* 14727 */ "V6_vfmax_sf\0"
8475
  /* 14739 */ "V6_vmax_sf\0"
8476
  /* 14750 */ "V6_vgtsf\0"
8477
  /* 14759 */ "PS_jmpretf\0"
8478
  /* 14770 */ "C2_ccombinewf\0"
8479
  /* 14784 */ "C2_ccombinewnewf\0"
8480
  /* 14801 */ "Y6_diag\0"
8481
  /* 14809 */ "A2_neg\0"
8482
  /* 14816 */ "V6_vcl0h\0"
8483
  /* 14825 */ "M2_vrcmpys_acc_s1_h\0"
8484
  /* 14845 */ "M2_vrcmpys_s1_h\0"
8485
  /* 14861 */ "V6_vcvt_hf_h\0"
8486
  /* 14874 */ "V6_vconv_hf_h\0"
8487
  /* 14888 */ "M2_vrcmpys_s1rp_h\0"
8488
  /* 14906 */ "V6_vaddclbh\0"
8489
  /* 14918 */ "S2_vsxtbh\0"
8490
  /* 14928 */ "S2_vzxtbh\0"
8491
  /* 14938 */ "V6_vsububh\0"
8492
  /* 14949 */ "V6_vaddubh\0"
8493
  /* 14960 */ "S4_vxaddsubh\0"
8494
  /* 14973 */ "A2_vsubh\0"
8495
  /* 14982 */ "V6_vsubh\0"
8496
  /* 14991 */ "A2_svsubh\0"
8497
  /* 15001 */ "A4_tlbmatch\0"
8498
  /* 15013 */ "Y4_l2fetch\0"
8499
  /* 15024 */ "Y5_l2fetch\0"
8500
  /* 15035 */ "Y2_dcfetch\0"
8501
  /* 15046 */ "S4_vxsubaddh\0"
8502
  /* 15059 */ "M2_vraddh\0"
8503
  /* 15069 */ "A2_vaddh\0"
8504
  /* 15078 */ "V6_vaddh\0"
8505
  /* 15087 */ "A2_svaddh\0"
8506
  /* 15097 */ "S2_shuffeh\0"
8507
  /* 15108 */ "V6_vshufeh\0"
8508
  /* 15119 */ "V6_vpackeh\0"
8509
  /* 15130 */ "V6_vshufoeh\0"
8510
  /* 15142 */ "M2_vabsdiffh\0"
8511
  /* 15155 */ "V6_vabsdiffh\0"
8512
  /* 15168 */ "V6_vshuffh\0"
8513
  /* 15179 */ "S2_vrcnegh\0"
8514
  /* 15190 */ "S2_vcnegh\0"
8515
  /* 15200 */ "A2_vnavgh\0"
8516
  /* 15210 */ "V6_vnavgh\0"
8517
  /* 15220 */ "A2_svnavgh\0"
8518
  /* 15231 */ "A2_vavgh\0"
8519
  /* 15240 */ "V6_vavgh\0"
8520
  /* 15249 */ "A2_svavgh\0"
8521
  /* 15259 */ "A2_subh_h16_hh\0"
8522
  /* 15274 */ "A2_addh_h16_hh\0"
8523
  /* 15289 */ "A2_combine_hh\0"
8524
  /* 15303 */ "A2_subh_h16_sat_hh\0"
8525
  /* 15322 */ "A2_addh_h16_sat_hh\0"
8526
  /* 15341 */ "F2_dfmpyhh\0"
8527
  /* 15352 */ "A2_tfrih\0"
8528
  /* 15361 */ "PS_vsplatih\0"
8529
  /* 15373 */ "V6_vmpyih\0"
8530
  /* 15383 */ "V6_vunpackh\0"
8531
  /* 15395 */ "A2_subh_h16_lh\0"
8532
  /* 15410 */ "A2_addh_h16_lh\0"
8533
  /* 15425 */ "A2_combine_lh\0"
8534
  /* 15439 */ "A2_subh_h16_sat_lh\0"
8535
  /* 15458 */ "A2_addh_h16_sat_lh\0"
8536
  /* 15477 */ "V6_vdealh\0"
8537
  /* 15487 */ "A2_aslh\0"
8538
  /* 15495 */ "V6_vaslh\0"
8539
  /* 15504 */ "F2_dfmpylh\0"
8540
  /* 15515 */ "V6_vgathermh\0"
8541
  /* 15528 */ "V6_vscattermh\0"
8542
  /* 15542 */ "A4_vrminh\0"
8543
  /* 15552 */ "A2_vminh\0"
8544
  /* 15561 */ "V6_vminh\0"
8545
  /* 15570 */ "V6_vmpyieoh\0"
8546
  /* 15582 */ "S2_shuffoh\0"
8547
  /* 15593 */ "V6_vshufoh\0"
8548
  /* 15604 */ "V6_vunpackoh\0"
8549
  /* 15617 */ "V6_vpackoh\0"
8550
  /* 15628 */ "A2_addsph\0"
8551
  /* 15638 */ "V6_shuffeqh\0"
8552
  /* 15650 */ "V6_veqh\0"
8553
  /* 15658 */ "V6_vprefixqh\0"
8554
  /* 15671 */ "J2_callrh\0"
8555
  /* 15681 */ "J2_jumprh\0"
8556
  /* 15691 */ "A2_asrh\0"
8557
  /* 15699 */ "V6_vasrh\0"
8558
  /* 15708 */ "V6_vlsrh\0"
8559
  /* 15717 */ "S2_vsplatrh\0"
8560
  /* 15729 */ "PS_vsplatrh\0"
8561
  /* 15741 */ "PS_crash\0"
8562
  /* 15750 */ "A2_vabsh\0"
8563
  /* 15759 */ "V6_vabsh\0"
8564
  /* 15768 */ "V6_vsh\0"
8565
  /* 15775 */ "V6_lvsplath\0"
8566
  /* 15787 */ "A2_sath\0"
8567
  /* 15795 */ "V6_vgth\0"
8568
  /* 15803 */ "V6_vnormamth\0"
8569
  /* 15816 */ "V6_vpopcounth\0"
8570
  /* 15830 */ "SA1_sxth\0"
8571
  /* 15839 */ "dup_A2_sxth\0"
8572
  /* 15851 */ "SA1_zxth\0"
8573
  /* 15860 */ "dup_A2_zxth\0"
8574
  /* 15872 */ "V6_vcvt_hf_uh\0"
8575
  /* 15886 */ "V6_vdsaduh\0"
8576
  /* 15897 */ "M2_vradduh\0"
8577
  /* 15908 */ "V6_vabsdiffuh\0"
8578
  /* 15922 */ "A2_vavguh\0"
8579
  /* 15932 */ "V6_vavguh\0"
8580
  /* 15942 */ "V6_vunpackuh\0"
8581
  /* 15955 */ "A4_vrminuh\0"
8582
  /* 15966 */ "A2_vminuh\0"
8583
  /* 15976 */ "V6_vminuh\0"
8584
  /* 15986 */ "V6_MAP_equh\0"
8585
  /* 15998 */ "A2_satuh\0"
8586
  /* 16007 */ "V6_vgtuh\0"
8587
  /* 16016 */ "V6_vroundwuh\0"
8588
  /* 16029 */ "V6_vmpyiewuh\0"
8589
  /* 16042 */ "V6_vmpyewuh\0"
8590
  /* 16054 */ "S2_vsatwuh\0"
8591
  /* 16065 */ "V6_vrounduwuh\0"
8592
  /* 16079 */ "V6_vsatuwuh\0"
8593
  /* 16091 */ "A4_vrmaxuh\0"
8594
  /* 16102 */ "A2_vmaxuh\0"
8595
  /* 16112 */ "V6_vmaxuh\0"
8596
  /* 16122 */ "V6_vmpyuh\0"
8597
  /* 16132 */ "S2_asl_i_vh\0"
8598
  /* 16144 */ "S2_asr_i_vh\0"
8599
  /* 16156 */ "S2_lsr_i_vh\0"
8600
  /* 16168 */ "S2_asl_r_vh\0"
8601
  /* 16180 */ "S2_lsl_r_vh\0"
8602
  /* 16192 */ "S2_asr_r_vh\0"
8603
  /* 16204 */ "S2_lsr_r_vh\0"
8604
  /* 16216 */ "M4_cmpyi_wh\0"
8605
  /* 16228 */ "M4_cmpyr_wh\0"
8606
  /* 16240 */ "V6_vroundwh\0"
8607
  /* 16252 */ "S2_vtrunewh\0"
8608
  /* 16264 */ "V6_vmpyiwh\0"
8609
  /* 16275 */ "S2_vrndpackwh\0"
8610
  /* 16289 */ "V6_vmpyiowh\0"
8611
  /* 16301 */ "S2_vtrunowh\0"
8612
  /* 16313 */ "V6_vmpyowh\0"
8613
  /* 16324 */ "V6_vasrwh\0"
8614
  /* 16334 */ "S2_vsatwh\0"
8615
  /* 16344 */ "V6_vsatwh\0"
8616
  /* 16354 */ "V6_vlutvwh\0"
8617
  /* 16365 */ "A4_vrmaxh\0"
8618
  /* 16375 */ "A2_vmaxh\0"
8619
  /* 16384 */ "V6_vmaxh\0"
8620
  /* 16393 */ "S2_tableidxh\0"
8621
  /* 16406 */ "M4_vpmpyh\0"
8622
  /* 16416 */ "V6_vmpyh\0"
8623
  /* 16425 */ "V6_vzh\0"
8624
  /* 16432 */ "SA1_combine0i\0"
8625
  /* 16446 */ "J2_loop0i\0"
8626
  /* 16456 */ "SA1_combine1i\0"
8627
  /* 16470 */ "J2_loop1i\0"
8628
  /* 16480 */ "SA1_combine2i\0"
8629
  /* 16494 */ "SA1_combine3i\0"
8630
  /* 16508 */ "PS_tailcall_i\0"
8631
  /* 16522 */ "M2_vcmac_s0_sat_i\0"
8632
  /* 16540 */ "M2_vcmpy_s0_sat_i\0"
8633
  /* 16558 */ "M2_vcmpy_s1_sat_i\0"
8634
  /* 16576 */ "S2_togglebit_i\0"
8635
  /* 16591 */ "S2_clrbit_i\0"
8636
  /* 16603 */ "S2_setbit_i\0"
8637
  /* 16615 */ "S2_tstbit_i\0"
8638
  /* 16627 */ "S4_ntstbit_i\0"
8639
  /* 16640 */ "V6_vL32b_ai\0"
8640
  /* 16652 */ "V6_vS32b_ai\0"
8641
  /* 16664 */ "V6_vL32Ub_ai\0"
8642
  /* 16677 */ "V6_vS32Ub_ai\0"
8643
  /* 16690 */ "V6_zLd_ai\0"
8644
  /* 16700 */ "V6_vL32b_pred_ai\0"
8645
  /* 16717 */ "V6_vS32b_pred_ai\0"
8646
  /* 16734 */ "V6_vS32Ub_pred_ai\0"
8647
  /* 16752 */ "V6_zLd_pred_ai\0"
8648
  /* 16767 */ "V6_vL32b_tmp_pred_ai\0"
8649
  /* 16788 */ "V6_vL32b_nt_tmp_pred_ai\0"
8650
  /* 16812 */ "V6_vL32b_cur_pred_ai\0"
8651
  /* 16833 */ "V6_vL32b_nt_cur_pred_ai\0"
8652
  /* 16857 */ "V6_vL32b_nt_pred_ai\0"
8653
  /* 16877 */ "V6_vS32b_nt_pred_ai\0"
8654
  /* 16897 */ "V6_vS32b_new_pred_ai\0"
8655
  /* 16918 */ "V6_vS32b_nt_new_pred_ai\0"
8656
  /* 16942 */ "V6_vL32b_npred_ai\0"
8657
  /* 16960 */ "V6_vS32b_npred_ai\0"
8658
  /* 16978 */ "V6_vS32Ub_npred_ai\0"
8659
  /* 16997 */ "V6_vL32b_tmp_npred_ai\0"
8660
  /* 17019 */ "V6_vL32b_nt_tmp_npred_ai\0"
8661
  /* 17044 */ "V6_vL32b_cur_npred_ai\0"
8662
  /* 17066 */ "V6_vL32b_nt_cur_npred_ai\0"
8663
  /* 17091 */ "V6_vL32b_nt_npred_ai\0"
8664
  /* 17112 */ "V6_vS32b_nt_npred_ai\0"
8665
  /* 17133 */ "V6_vS32b_new_npred_ai\0"
8666
  /* 17155 */ "V6_vS32b_nt_new_npred_ai\0"
8667
  /* 17180 */ "V6_vS32b_qpred_ai\0"
8668
  /* 17198 */ "V6_vS32b_nt_qpred_ai\0"
8669
  /* 17219 */ "V6_vS32b_nqpred_ai\0"
8670
  /* 17238 */ "V6_vS32b_nt_nqpred_ai\0"
8671
  /* 17260 */ "V6_vL32b_tmp_ai\0"
8672
  /* 17276 */ "V6_vL32b_nt_tmp_ai\0"
8673
  /* 17295 */ "PS_vloadrq_ai\0"
8674
  /* 17309 */ "PS_vstorerq_ai\0"
8675
  /* 17324 */ "V6_vL32b_cur_ai\0"
8676
  /* 17340 */ "V6_vL32b_nt_cur_ai\0"
8677
  /* 17359 */ "V6_vS32b_srls_ai\0"
8678
  /* 17376 */ "V6_vL32b_nt_ai\0"
8679
  /* 17391 */ "V6_vS32b_nt_ai\0"
8680
  /* 17406 */ "PS_vloadrv_nt_ai\0"
8681
  /* 17423 */ "PS_vstorerv_nt_ai\0"
8682
  /* 17441 */ "PS_vloadrw_nt_ai\0"
8683
  /* 17458 */ "PS_vstorerw_nt_ai\0"
8684
  /* 17476 */ "PS_vloadrv_ai\0"
8685
  /* 17490 */ "PS_vstorerv_ai\0"
8686
  /* 17505 */ "V6_vS32b_new_ai\0"
8687
  /* 17521 */ "V6_vS32b_nt_new_ai\0"
8688
  /* 17540 */ "PS_vloadrw_ai\0"
8689
  /* 17554 */ "PS_vstorerw_ai\0"
8690
  /* 17569 */ "V6_vlalignbi\0"
8691
  /* 17582 */ "V6_valignbi\0"
8692
  /* 17594 */ "V6_vrsadubi\0"
8693
  /* 17606 */ "V6_vrmpyubi\0"
8694
  /* 17618 */ "V6_vlutvvbi\0"
8695
  /* 17630 */ "M2_maci\0"
8696
  /* 17638 */ "M2_mnaci\0"
8697
  /* 17647 */ "M2_acci\0"
8698
  /* 17655 */ "M2_nacci\0"
8699
  /* 17664 */ "V6_vlutvvb_oracci\0"
8700
  /* 17682 */ "V6_vlutvwh_oracci\0"
8701
  /* 17700 */ "L2_loadbsw2_pci\0"
8702
  /* 17716 */ "L2_loadbzw2_pci\0"
8703
  /* 17732 */ "L2_loadbsw4_pci\0"
8704
  /* 17748 */ "L2_loadbzw4_pci\0"
8705
  /* 17764 */ "L2_loadalignb_pci\0"
8706
  /* 17782 */ "L2_loadrb_pci\0"
8707
  /* 17796 */ "PS_loadrb_pci\0"
8708
  /* 17810 */ "S2_storerb_pci\0"
8709
  /* 17825 */ "PS_storerb_pci\0"
8710
  /* 17840 */ "L2_loadrub_pci\0"
8711
  /* 17855 */ "PS_loadrub_pci\0"
8712
  /* 17870 */ "L2_loadrd_pci\0"
8713
  /* 17884 */ "PS_loadrd_pci\0"
8714
  /* 17898 */ "S2_storerd_pci\0"
8715
  /* 17913 */ "PS_storerd_pci\0"
8716
  /* 17928 */ "S2_storerf_pci\0"
8717
  /* 17943 */ "PS_storerf_pci\0"
8718
  /* 17958 */ "L2_loadalignh_pci\0"
8719
  /* 17976 */ "L2_loadrh_pci\0"
8720
  /* 17990 */ "PS_loadrh_pci\0"
8721
  /* 18004 */ "S2_storerh_pci\0"
8722
  /* 18019 */ "PS_storerh_pci\0"
8723
  /* 18034 */ "L2_loadruh_pci\0"
8724
  /* 18049 */ "PS_loadruh_pci\0"
8725
  /* 18064 */ "L2_loadri_pci\0"
8726
  /* 18078 */ "PS_loadri_pci\0"
8727
  /* 18092 */ "S2_storeri_pci\0"
8728
  /* 18107 */ "PS_storeri_pci\0"
8729
  /* 18122 */ "S2_storerbnew_pci\0"
8730
  /* 18140 */ "S2_storerhnew_pci\0"
8731
  /* 18158 */ "S2_storerinew_pci\0"
8732
  /* 18176 */ "SA1_addi\0"
8733
  /* 18185 */ "dup_A2_addi\0"
8734
  /* 18197 */ "M4_mpyri_addi\0"
8735
  /* 18211 */ "M4_mpyrr_addi\0"
8736
  /* 18225 */ "S4_clbaddi\0"
8737
  /* 18236 */ "S4_subaddi\0"
8738
  /* 18247 */ "S4_addaddi\0"
8739
  /* 18258 */ "S4_clbpaddi\0"
8740
  /* 18270 */ "Y5_tlbasidi\0"
8741
  /* 18282 */ "S4_or_andi\0"
8742
  /* 18293 */ "C2_cmpgei\0"
8743
  /* 18303 */ "C4_cmpltei\0"
8744
  /* 18314 */ "PS_fi\0"
8745
  /* 18320 */ "V6_hi\0"
8746
  /* 18326 */ "A4_boundscheck_hi\0"
8747
  /* 18344 */ "V6_vlutvwhi\0"
8748
  /* 18356 */ "M2_accii\0"
8749
  /* 18365 */ "M2_naccii\0"
8750
  /* 18375 */ "dup_A2_combineii\0"
8751
  /* 18392 */ "dup_A4_combineii\0"
8752
  /* 18409 */ "C2_muxii\0"
8753
  /* 18418 */ "S4_lsli\0"
8754
  /* 18426 */ "Y4_nmi\0"
8755
  /* 18433 */ "M2_mpysmi\0"
8756
  /* 18443 */ "L2_loadbsw2_pi\0"
8757
  /* 18458 */ "L2_loadbzw2_pi\0"
8758
  /* 18473 */ "L2_loadbsw4_pi\0"
8759
  /* 18488 */ "L2_loadbzw4_pi\0"
8760
  /* 18503 */ "V6_vL32b_pi\0"
8761
  /* 18515 */ "V6_vS32b_pi\0"
8762
  /* 18527 */ "V6_vL32Ub_pi\0"
8763
  /* 18540 */ "V6_vS32Ub_pi\0"
8764
  /* 18553 */ "L2_loadalignb_pi\0"
8765
  /* 18570 */ "L2_loadrb_pi\0"
8766
  /* 18583 */ "S2_storerb_pi\0"
8767
  /* 18597 */ "L2_loadrub_pi\0"
8768
  /* 18611 */ "V6_zLd_pi\0"
8769
  /* 18621 */ "V6_vL32b_pred_pi\0"
8770
  /* 18638 */ "V6_vS32b_pred_pi\0"
8771
  /* 18655 */ "V6_vS32Ub_pred_pi\0"
8772
  /* 18673 */ "V6_zLd_pred_pi\0"
8773
  /* 18688 */ "V6_vL32b_tmp_pred_pi\0"
8774
  /* 18709 */ "V6_vL32b_nt_tmp_pred_pi\0"
8775
  /* 18733 */ "V6_vL32b_cur_pred_pi\0"
8776
  /* 18754 */ "V6_vL32b_nt_cur_pred_pi\0"
8777
  /* 18778 */ "V6_vL32b_nt_pred_pi\0"
8778
  /* 18798 */ "V6_vS32b_nt_pred_pi\0"
8779
  /* 18818 */ "V6_vS32b_new_pred_pi\0"
8780
  /* 18839 */ "V6_vS32b_nt_new_pred_pi\0"
8781
  /* 18863 */ "V6_vL32b_npred_pi\0"
8782
  /* 18881 */ "V6_vS32b_npred_pi\0"
8783
  /* 18899 */ "V6_vS32Ub_npred_pi\0"
8784
  /* 18918 */ "V6_vL32b_tmp_npred_pi\0"
8785
  /* 18940 */ "V6_vL32b_nt_tmp_npred_pi\0"
8786
  /* 18965 */ "V6_vL32b_cur_npred_pi\0"
8787
  /* 18987 */ "V6_vL32b_nt_cur_npred_pi\0"
8788
  /* 19012 */ "V6_vL32b_nt_npred_pi\0"
8789
  /* 19033 */ "V6_vS32b_nt_npred_pi\0"
8790
  /* 19054 */ "V6_vS32b_new_npred_pi\0"
8791
  /* 19076 */ "V6_vS32b_nt_new_npred_pi\0"
8792
  /* 19101 */ "V6_vS32b_qpred_pi\0"
8793
  /* 19119 */ "V6_vS32b_nt_qpred_pi\0"
8794
  /* 19140 */ "V6_vS32b_nqpred_pi\0"
8795
  /* 19159 */ "V6_vS32b_nt_nqpred_pi\0"
8796
  /* 19181 */ "L2_loadrd_pi\0"
8797
  /* 19194 */ "S2_storerd_pi\0"
8798
  /* 19208 */ "L2_ploadrbf_pi\0"
8799
  /* 19223 */ "S2_pstorerbf_pi\0"
8800
  /* 19239 */ "L2_ploadrubf_pi\0"
8801
  /* 19255 */ "L2_ploadrdf_pi\0"
8802
  /* 19270 */ "S2_pstorerdf_pi\0"
8803
  /* 19286 */ "S2_pstorerff_pi\0"
8804
  /* 19302 */ "L2_ploadrhf_pi\0"
8805
  /* 19317 */ "S2_pstorerhf_pi\0"
8806
  /* 19333 */ "L2_ploadruhf_pi\0"
8807
  /* 19349 */ "L2_ploadrif_pi\0"
8808
  /* 19364 */ "S2_pstorerif_pi\0"
8809
  /* 19380 */ "S2_storerf_pi\0"
8810
  /* 19394 */ "S2_pstorerbnewf_pi\0"
8811
  /* 19413 */ "S2_pstorerhnewf_pi\0"
8812
  /* 19432 */ "S2_pstorerinewf_pi\0"
8813
  /* 19451 */ "L2_loadalignh_pi\0"
8814
  /* 19468 */ "L2_loadrh_pi\0"
8815
  /* 19481 */ "S2_storerh_pi\0"
8816
  /* 19495 */ "L2_loadruh_pi\0"
8817
  /* 19509 */ "L2_loadri_pi\0"
8818
  /* 19522 */ "S2_storeri_pi\0"
8819
  /* 19536 */ "V6_vL32b_tmp_pi\0"
8820
  /* 19552 */ "V6_vL32b_nt_tmp_pi\0"
8821
  /* 19571 */ "V6_vL32b_cur_pi\0"
8822
  /* 19587 */ "V6_vL32b_nt_cur_pi\0"
8823
  /* 19606 */ "V6_vS32b_srls_pi\0"
8824
  /* 19623 */ "L2_ploadrbt_pi\0"
8825
  /* 19638 */ "S2_pstorerbt_pi\0"
8826
  /* 19654 */ "L2_ploadrubt_pi\0"
8827
  /* 19670 */ "L2_ploadrdt_pi\0"
8828
  /* 19685 */ "S2_pstorerdt_pi\0"
8829
  /* 19701 */ "S2_pstorerft_pi\0"
8830
  /* 19717 */ "L2_ploadrht_pi\0"
8831
  /* 19732 */ "S2_pstorerht_pi\0"
8832
  /* 19748 */ "L2_ploadruht_pi\0"
8833
  /* 19764 */ "L2_ploadrit_pi\0"
8834
  /* 19779 */ "S2_pstorerit_pi\0"
8835
  /* 19795 */ "V6_vL32b_nt_pi\0"
8836
  /* 19810 */ "V6_vS32b_nt_pi\0"
8837
  /* 19825 */ "S2_pstorerbnewt_pi\0"
8838
  /* 19844 */ "S2_pstorerhnewt_pi\0"
8839
  /* 19863 */ "S2_pstorerinewt_pi\0"
8840
  /* 19882 */ "V6_vS32b_new_pi\0"
8841
  /* 19898 */ "V6_vS32b_nt_new_pi\0"
8842
  /* 19917 */ "S2_storerbnew_pi\0"
8843
  /* 19934 */ "L2_ploadrbfnew_pi\0"
8844
  /* 19952 */ "S2_pstorerbfnew_pi\0"
8845
  /* 19971 */ "L2_ploadrubfnew_pi\0"
8846
  /* 19990 */ "L2_ploadrdfnew_pi\0"
8847
  /* 20008 */ "S2_pstorerdfnew_pi\0"
8848
  /* 20027 */ "S2_pstorerffnew_pi\0"
8849
  /* 20046 */ "L2_ploadrhfnew_pi\0"
8850
  /* 20064 */ "S2_pstorerhfnew_pi\0"
8851
  /* 20083 */ "L2_ploadruhfnew_pi\0"
8852
  /* 20102 */ "L2_ploadrifnew_pi\0"
8853
  /* 20120 */ "S2_pstorerifnew_pi\0"
8854
  /* 20139 */ "S2_pstorerbnewfnew_pi\0"
8855
  /* 20161 */ "S2_pstorerhnewfnew_pi\0"
8856
  /* 20183 */ "S2_pstorerinewfnew_pi\0"
8857
  /* 20205 */ "S2_storerhnew_pi\0"
8858
  /* 20222 */ "S2_storerinew_pi\0"
8859
  /* 20239 */ "L2_ploadrbtnew_pi\0"
8860
  /* 20257 */ "S2_pstorerbtnew_pi\0"
8861
  /* 20276 */ "L2_ploadrubtnew_pi\0"
8862
  /* 20295 */ "L2_ploadrdtnew_pi\0"
8863
  /* 20313 */ "S2_pstorerdtnew_pi\0"
8864
  /* 20332 */ "S2_pstorerftnew_pi\0"
8865
  /* 20351 */ "L2_ploadrhtnew_pi\0"
8866
  /* 20369 */ "S2_pstorerhtnew_pi\0"
8867
  /* 20388 */ "L2_ploadruhtnew_pi\0"
8868
  /* 20407 */ "L2_ploadritnew_pi\0"
8869
  /* 20425 */ "S2_pstoreritnew_pi\0"
8870
  /* 20444 */ "S2_pstorerbnewtnew_pi\0"
8871
  /* 20466 */ "S2_pstorerhnewtnew_pi\0"
8872
  /* 20488 */ "S2_pstorerinewtnew_pi\0"
8873
  /* 20510 */ "A2_tfrpi\0"
8874
  /* 20519 */ "A4_cmpbeqi\0"
8875
  /* 20530 */ "A4_vcmpbeqi\0"
8876
  /* 20542 */ "A4_cmpheqi\0"
8877
  /* 20553 */ "A4_vcmpheqi\0"
8878
  /* 20565 */ "C4_cmpneqi\0"
8879
  /* 20576 */ "A4_rcmpneqi\0"
8880
  /* 20588 */ "SA1_cmpeqi\0"
8881
  /* 20599 */ "dup_C2_cmpeqi\0"
8882
  /* 20613 */ "A4_rcmpeqi\0"
8883
  /* 20624 */ "A4_vcmpweqi\0"
8884
  /* 20636 */ "A7_croundd_ri\0"
8885
  /* 20650 */ "A4_round_ri\0"
8886
  /* 20662 */ "A4_cround_ri\0"
8887
  /* 20675 */ "S4_subi_asl_ri\0"
8888
  /* 20690 */ "S4_addi_asl_ri\0"
8889
  /* 20705 */ "S4_andi_asl_ri\0"
8890
  /* 20720 */ "S4_ori_asl_ri\0"
8891
  /* 20734 */ "S4_subi_lsr_ri\0"
8892
  /* 20749 */ "S4_addi_lsr_ri\0"
8893
  /* 20764 */ "S4_andi_lsr_ri\0"
8894
  /* 20779 */ "S4_ori_lsr_ri\0"
8895
  /* 20793 */ "A2_subri\0"
8896
  /* 20802 */ "dup_A4_combineri\0"
8897
  /* 20819 */ "C2_bitsclri\0"
8898
  /* 20831 */ "C4_nbitsclri\0"
8899
  /* 20844 */ "S4_or_ori\0"
8900
  /* 20854 */ "S2_addasl_rrri\0"
8901
  /* 20869 */ "C2_muxri\0"
8902
  /* 20878 */ "J2_ploop1si\0"
8903
  /* 20890 */ "J2_ploop2si\0"
8904
  /* 20902 */ "J2_ploop3si\0"
8905
  /* 20914 */ "dup_A2_tfrsi\0"
8906
  /* 20927 */ "V6_vrmpybusi\0"
8907
  /* 20940 */ "SA1_seti\0"
8908
  /* 20949 */ "J4_jumpseti\0"
8909
  /* 20961 */ "A4_cmpbgti\0"
8910
  /* 20972 */ "A4_vcmpbgti\0"
8911
  /* 20984 */ "A4_cmphgti\0"
8912
  /* 20995 */ "A4_vcmphgti\0"
8913
  /* 21007 */ "C2_cmpgti\0"
8914
  /* 21017 */ "A4_vcmpwgti\0"
8915
  /* 21029 */ "A4_bitspliti\0"
8916
  /* 21042 */ "C2_cmpgeui\0"
8917
  /* 21053 */ "C4_cmplteui\0"
8918
  /* 21065 */ "A4_cmpbgtui\0"
8919
  /* 21077 */ "A4_vcmpbgtui\0"
8920
  /* 21090 */ "A4_cmphgtui\0"
8921
  /* 21102 */ "A4_vcmphgtui\0"
8922
  /* 21115 */ "C2_cmpgtui\0"
8923
  /* 21126 */ "A4_vcmpwgtui\0"
8924
  /* 21139 */ "M2_mpyui\0"
8925
  /* 21148 */ "R6_release_at_vi\0"
8926
  /* 21165 */ "S4_stored_rl_at_vi\0"
8927
  /* 21184 */ "S2_storew_rl_at_vi\0"
8928
  /* 21203 */ "R6_release_st_vi\0"
8929
  /* 21220 */ "S4_stored_rl_st_vi\0"
8930
  /* 21239 */ "S2_storew_rl_st_vi\0"
8931
  /* 21258 */ "Y2_swi\0"
8932
  /* 21265 */ "Y2_cswi\0"
8933
  /* 21273 */ "M2_mpyi\0"
8934
  /* 21281 */ "A2_vconj\0"
8935
  /* 21290 */ "Y2_break\0"
8936
  /* 21299 */ "M2_vmpy2s_s0pack\0"
8937
  /* 21316 */ "M2_vmpy2s_s1pack\0"
8938
  /* 21333 */ "S2_vsathb_nopack\0"
8939
  /* 21350 */ "S2_vsathub_nopack\0"
8940
  /* 21368 */ "S2_vsatwuh_nopack\0"
8941
  /* 21386 */ "S2_vsatwh_nopack\0"
8942
  /* 21403 */ "C2_vitpack\0"
8943
  /* 21414 */ "A4_boundscheck\0"
8944
  /* 21429 */ "Y2_k0lock\0"
8945
  /* 21439 */ "Y2_tlblock\0"
8946
  /* 21450 */ "Y2_k0unlock\0"
8947
  /* 21462 */ "Y2_tlbunlock\0"
8948
  /* 21475 */ "Y5_l2gunlock\0"
8949
  /* 21488 */ "Y6_dmlink\0"
8950
  /* 21498 */ "C2_mask\0"
8951
  /* 21506 */ "S2_mask\0"
8952
  /* 21514 */ "Y2_getimask\0"
8953
  /* 21526 */ "Y2_setimask\0"
8954
  /* 21538 */ "PS_call_stk\0"
8955
  /* 21550 */ "M2_vrcmpys_acc_s1_l\0"
8956
  /* 21570 */ "M2_vrcmpys_s1_l\0"
8957
  /* 21586 */ "M2_vrcmpys_s1rp_l\0"
8958
  /* 21604 */ "V6_vdeal\0"
8959
  /* 21613 */ "A2_subh_h16_hl\0"
8960
  /* 21628 */ "A2_addh_h16_hl\0"
8961
  /* 21643 */ "A2_subh_l16_hl\0"
8962
  /* 21658 */ "A2_addh_l16_hl\0"
8963
  /* 21673 */ "A2_combine_hl\0"
8964
  /* 21687 */ "A2_subh_h16_sat_hl\0"
8965
  /* 21706 */ "A2_addh_h16_sat_hl\0"
8966
  /* 21725 */ "A2_subh_l16_sat_hl\0"
8967
  /* 21744 */ "A2_addh_l16_sat_hl\0"
8968
  /* 21763 */ "dep_S2_packhl\0"
8969
  /* 21777 */ "A2_tfril\0"
8970
  /* 21786 */ "A2_subh_h16_ll\0"
8971
  /* 21801 */ "A2_addh_h16_ll\0"
8972
  /* 21816 */ "A2_subh_l16_ll\0"
8973
  /* 21831 */ "A2_addh_l16_ll\0"
8974
  /* 21846 */ "A2_combine_ll\0"
8975
  /* 21860 */ "A2_subh_h16_sat_ll\0"
8976
  /* 21879 */ "A2_addh_h16_sat_ll\0"
8977
  /* 21898 */ "A2_subh_l16_sat_ll\0"
8978
  /* 21917 */ "A2_addh_l16_sat_ll\0"
8979
  /* 21936 */ "J2_call\0"
8980
  /* 21944 */ "Y2_l2kill\0"
8981
  /* 21954 */ "Y2_dckill\0"
8982
  /* 21964 */ "Y2_ickill\0"
8983
  /* 21974 */ "Y6_dmpoll\0"
8984
  /* 21984 */ "F2_dfmpyll\0"
8985
  /* 21995 */ "A2_addspl\0"
8986
  /* 22005 */ "V6_vwhist128m\0"
8987
  /* 22019 */ "V6_vlutvvb_nm\0"
8988
  /* 22033 */ "V6_vlutvwh_nm\0"
8989
  /* 22047 */ "PS_call_instrprof_custom\0"
8990
  /* 22072 */ "V6_vwhist128qm\0"
8991
  /* 22087 */ "S2_clbnorm\0"
8992
  /* 22098 */ "S4_clbpnorm\0"
8993
  /* 22110 */ "V6_pred_and_n\0"
8994
  /* 22124 */ "F2_dfimm_n\0"
8995
  /* 22135 */ "F2_sfimm_n\0"
8996
  /* 22146 */ "V6_pred_or_n\0"
8997
  /* 22159 */ "Y5_l2gclean\0"
8998
  /* 22171 */ "C2_andn\0"
8999
  /* 22179 */ "A4_andn\0"
9000
  /* 22187 */ "C4_and_andn\0"
9001
  /* 22199 */ "M4_and_andn\0"
9002
  /* 22211 */ "C4_or_andn\0"
9003
  /* 22222 */ "M4_or_andn\0"
9004
  /* 22233 */ "M4_xor_andn\0"
9005
  /* 22245 */ "V6_vassign\0"
9006
  /* 22256 */ "S2_cabacdecbin\0"
9007
  /* 22271 */ "A2_min\0"
9008
  /* 22278 */ "F2_dfmin\0"
9009
  /* 22287 */ "F2_sfmin\0"
9010
  /* 22296 */ "M2_macsin\0"
9011
  /* 22306 */ "M2_mpysin\0"
9012
  /* 22316 */ "F2_sffixupn\0"
9013
  /* 22328 */ "C2_orn\0"
9014
  /* 22335 */ "A4_orn\0"
9015
  /* 22342 */ "C4_and_orn\0"
9016
  /* 22353 */ "C4_or_orn\0"
9017
  /* 22363 */ "SL2_return\0"
9018
  /* 22374 */ "L4_return\0"
9019
  /* 22384 */ "S2_asr_i_svw_trun\0"
9020
  /* 22402 */ "S2_asr_r_svw_trun\0"
9021
  /* 22420 */ "Y2_dcfetchbo\0"
9022
  /* 22433 */ "DUPLEX_Pseudo\0"
9023
  /* 22447 */ "V6_vgathermh_pseudo\0"
9024
  /* 22467 */ "V6_vgathermhq_pseudo\0"
9025
  /* 22488 */ "V6_vgathermhwq_pseudo\0"
9026
  /* 22510 */ "V6_vgathermwq_pseudo\0"
9027
  /* 22531 */ "V6_vgathermhw_pseudo\0"
9028
  /* 22552 */ "V6_vgathermw_pseudo\0"
9029
  /* 22572 */ "L2_loadbsw2_io\0"
9030
  /* 22587 */ "L2_loadbzw2_io\0"
9031
  /* 22602 */ "L2_loadbsw4_io\0"
9032
  /* 22617 */ "L2_loadbzw4_io\0"
9033
  /* 22632 */ "SS1_storeb_io\0"
9034
  /* 22646 */ "L2_loadalignb_io\0"
9035
  /* 22663 */ "L4_sub_memopb_io\0"
9036
  /* 22680 */ "L4_isub_memopb_io\0"
9037
  /* 22698 */ "L4_add_memopb_io\0"
9038
  /* 22715 */ "L4_iadd_memopb_io\0"
9039
  /* 22733 */ "L4_and_memopb_io\0"
9040
  /* 22750 */ "L4_iand_memopb_io\0"
9041
  /* 22768 */ "L4_or_memopb_io\0"
9042
  /* 22784 */ "L4_ior_memopb_io\0"
9043
  /* 22801 */ "SL2_loadrb_io\0"
9044
  /* 22815 */ "dup_L2_loadrb_io\0"
9045
  /* 22832 */ "dup_S2_storerb_io\0"
9046
  /* 22850 */ "dup_S4_storeirb_io\0"
9047
  /* 22869 */ "SL1_loadrub_io\0"
9048
  /* 22884 */ "dup_L2_loadrub_io\0"
9049
  /* 22902 */ "dup_L2_loadrd_io\0"
9050
  /* 22919 */ "dup_S2_storerd_io\0"
9051
  /* 22937 */ "L2_ploadrbf_io\0"
9052
  /* 22952 */ "S2_pstorerbf_io\0"
9053
  /* 22968 */ "S4_storeirbf_io\0"
9054
  /* 22984 */ "L2_ploadrubf_io\0"
9055
  /* 23000 */ "L2_ploadrdf_io\0"
9056
  /* 23015 */ "S2_pstorerdf_io\0"
9057
  /* 23031 */ "S2_pstorerff_io\0"
9058
  /* 23047 */ "L2_ploadrhf_io\0"
9059
  /* 23062 */ "S2_pstorerhf_io\0"
9060
  /* 23078 */ "S4_storeirhf_io\0"
9061
  /* 23094 */ "L2_ploadruhf_io\0"
9062
  /* 23110 */ "L2_ploadrif_io\0"
9063
  /* 23125 */ "S2_pstorerif_io\0"
9064
  /* 23141 */ "S4_storeirif_io\0"
9065
  /* 23157 */ "S2_storerf_io\0"
9066
  /* 23171 */ "S2_pstorerbnewf_io\0"
9067
  /* 23190 */ "S2_pstorerhnewf_io\0"
9068
  /* 23209 */ "S2_pstorerinewf_io\0"
9069
  /* 23228 */ "SS2_storeh_io\0"
9070
  /* 23242 */ "L2_loadalignh_io\0"
9071
  /* 23259 */ "L4_sub_memoph_io\0"
9072
  /* 23276 */ "L4_isub_memoph_io\0"
9073
  /* 23294 */ "L4_add_memoph_io\0"
9074
  /* 23311 */ "L4_iadd_memoph_io\0"
9075
  /* 23329 */ "L4_and_memoph_io\0"
9076
  /* 23346 */ "L4_iand_memoph_io\0"
9077
  /* 23364 */ "L4_or_memoph_io\0"
9078
  /* 23380 */ "L4_ior_memoph_io\0"
9079
  /* 23397 */ "SL2_loadrh_io\0"
9080
  /* 23411 */ "dup_L2_loadrh_io\0"
9081
  /* 23428 */ "dup_S2_storerh_io\0"
9082
  /* 23446 */ "S4_storeirh_io\0"
9083
  /* 23461 */ "SL2_loadruh_io\0"
9084
  /* 23476 */ "dup_L2_loadruh_io\0"
9085
  /* 23494 */ "SL1_loadri_io\0"
9086
  /* 23508 */ "dup_L2_loadri_io\0"
9087
  /* 23525 */ "dup_S2_storeri_io\0"
9088
  /* 23543 */ "dup_S4_storeiri_io\0"
9089
  /* 23562 */ "L2_ploadrbt_io\0"
9090
  /* 23577 */ "S2_pstorerbt_io\0"
9091
  /* 23593 */ "S4_storeirbt_io\0"
9092
  /* 23609 */ "L2_ploadrubt_io\0"
9093
  /* 23625 */ "L2_ploadrdt_io\0"
9094
  /* 23640 */ "S2_pstorerdt_io\0"
9095
  /* 23656 */ "S2_pstorerft_io\0"
9096
  /* 23672 */ "L2_ploadrht_io\0"
9097
  /* 23687 */ "S2_pstorerht_io\0"
9098
  /* 23703 */ "S4_storeirht_io\0"
9099
  /* 23719 */ "L2_ploadruht_io\0"
9100
  /* 23735 */ "L2_ploadrit_io\0"
9101
  /* 23750 */ "S2_pstorerit_io\0"
9102
  /* 23766 */ "S4_storeirit_io\0"
9103
  /* 23782 */ "S2_pstorerbnewt_io\0"
9104
  /* 23801 */ "S2_pstorerhnewt_io\0"
9105
  /* 23820 */ "S2_pstorerinewt_io\0"
9106
  /* 23839 */ "S2_storerbnew_io\0"
9107
  /* 23856 */ "L2_ploadrbfnew_io\0"
9108
  /* 23874 */ "S4_pstorerbfnew_io\0"
9109
  /* 23893 */ "S4_storeirbfnew_io\0"
9110
  /* 23912 */ "L2_ploadrubfnew_io\0"
9111
  /* 23931 */ "L2_ploadrdfnew_io\0"
9112
  /* 23949 */ "S4_pstorerdfnew_io\0"
9113
  /* 23968 */ "S4_pstorerffnew_io\0"
9114
  /* 23987 */ "L2_ploadrhfnew_io\0"
9115
  /* 24005 */ "S4_pstorerhfnew_io\0"
9116
  /* 24024 */ "S4_storeirhfnew_io\0"
9117
  /* 24043 */ "L2_ploadruhfnew_io\0"
9118
  /* 24062 */ "L2_ploadrifnew_io\0"
9119
  /* 24080 */ "S4_pstorerifnew_io\0"
9120
  /* 24099 */ "S4_storeirifnew_io\0"
9121
  /* 24118 */ "S4_pstorerbnewfnew_io\0"
9122
  /* 24140 */ "S4_pstorerhnewfnew_io\0"
9123
  /* 24162 */ "S4_pstorerinewfnew_io\0"
9124
  /* 24184 */ "S2_storerhnew_io\0"
9125
  /* 24201 */ "S2_storerinew_io\0"
9126
  /* 24218 */ "L2_ploadrbtnew_io\0"
9127
  /* 24236 */ "S4_pstorerbtnew_io\0"
9128
  /* 24255 */ "S4_storeirbtnew_io\0"
9129
  /* 24274 */ "L2_ploadrubtnew_io\0"
9130
  /* 24293 */ "L2_ploadrdtnew_io\0"
9131
  /* 24311 */ "S4_pstorerdtnew_io\0"
9132
  /* 24330 */ "S4_pstorerftnew_io\0"
9133
  /* 24349 */ "L2_ploadrhtnew_io\0"
9134
  /* 24367 */ "S4_pstorerhtnew_io\0"
9135
  /* 24386 */ "S4_storeirhtnew_io\0"
9136
  /* 24405 */ "L2_ploadruhtnew_io\0"
9137
  /* 24424 */ "L2_ploadritnew_io\0"
9138
  /* 24442 */ "S4_pstoreritnew_io\0"
9139
  /* 24461 */ "S4_storeiritnew_io\0"
9140
  /* 24480 */ "S4_pstorerbnewtnew_io\0"
9141
  /* 24502 */ "S4_pstorerhnewtnew_io\0"
9142
  /* 24524 */ "S4_pstorerinewtnew_io\0"
9143
  /* 24546 */ "SS1_storew_io\0"
9144
  /* 24560 */ "L4_sub_memopw_io\0"
9145
  /* 24577 */ "L4_isub_memopw_io\0"
9146
  /* 24595 */ "L4_add_memopw_io\0"
9147
  /* 24612 */ "L4_iadd_memopw_io\0"
9148
  /* 24630 */ "L4_and_memopw_io\0"
9149
  /* 24647 */ "L4_iand_memopw_io\0"
9150
  /* 24665 */ "L4_or_memopw_io\0"
9151
  /* 24681 */ "L4_ior_memopw_io\0"
9152
  /* 24698 */ "Y2_setprio\0"
9153
  /* 24709 */ "V6_lo\0"
9154
  /* 24715 */ "A4_boundscheck_lo\0"
9155
  /* 24733 */ "V6_vasr_into\0"
9156
  /* 24746 */ "F2_dfcmpuo\0"
9157
  /* 24757 */ "F2_sfcmpuo\0"
9158
  /* 24768 */ "V6_vsubcarryo\0"
9159
  /* 24782 */ "V6_vaddcarryo\0"
9160
  /* 24796 */ "S2_cl0p\0"
9161
  /* 24804 */ "S2_ct0p\0"
9162
  /* 24812 */ "S2_cl1p\0"
9163
  /* 24820 */ "S2_ct1p\0"
9164
  /* 24828 */ "S6_rol_i_p\0"
9165
  /* 24839 */ "S2_asl_i_p\0"
9166
  /* 24850 */ "S2_asr_i_p\0"
9167
  /* 24861 */ "S2_lsr_i_p\0"
9168
  /* 24872 */ "F2_dfimm_p\0"
9169
  /* 24883 */ "F2_sfimm_p\0"
9170
  /* 24894 */ "S2_asl_r_p\0"
9171
  /* 24905 */ "S2_lsl_r_p\0"
9172
  /* 24916 */ "S2_asr_r_p\0"
9173
  /* 24927 */ "S2_lsr_r_p\0"
9174
  /* 24938 */ "L4_loadbsw2_ap\0"
9175
  /* 24953 */ "L4_loadbzw2_ap\0"
9176
  /* 24968 */ "L4_loadbsw4_ap\0"
9177
  /* 24983 */ "L4_loadbzw4_ap\0"
9178
  /* 24998 */ "L4_loadalignb_ap\0"
9179
  /* 25015 */ "L4_loadrb_ap\0"
9180
  /* 25028 */ "S4_storerb_ap\0"
9181
  /* 25042 */ "L4_loadrub_ap\0"
9182
  /* 25056 */ "L4_loadrd_ap\0"
9183
  /* 25069 */ "S4_storerd_ap\0"
9184
  /* 25083 */ "S4_storerf_ap\0"
9185
  /* 25097 */ "L4_loadalignh_ap\0"
9186
  /* 25114 */ "L4_loadrh_ap\0"
9187
  /* 25127 */ "S4_storerh_ap\0"
9188
  /* 25141 */ "L4_loadruh_ap\0"
9189
  /* 25155 */ "L4_loadri_ap\0"
9190
  /* 25168 */ "S4_storeri_ap\0"
9191
  /* 25182 */ "S4_storerbnew_ap\0"
9192
  /* 25199 */ "S4_storerhnew_ap\0"
9193
  /* 25216 */ "S4_storerinew_ap\0"
9194
  /* 25233 */ "V6_vtran2x2_map\0"
9195
  /* 25249 */ "A2_vsubb_map\0"
9196
  /* 25262 */ "A2_vaddb_map\0"
9197
  /* 25275 */ "J2_jumpf_nopred_map\0"
9198
  /* 25295 */ "J2_jumprf_nopred_map\0"
9199
  /* 25316 */ "J2_jumpt_nopred_map\0"
9200
  /* 25336 */ "J2_jumprt_nopred_map\0"
9201
  /* 25357 */ "Y2_k1lock_map\0"
9202
  /* 25371 */ "Y2_k1unlock_map\0"
9203
  /* 25387 */ "C2_pxfer_map\0"
9204
  /* 25400 */ "J2_trap1_noregmap\0"
9205
  /* 25418 */ "L2_loadbsw2_zomap\0"
9206
  /* 25436 */ "L2_loadbzw2_zomap\0"
9207
  /* 25454 */ "L2_loadbsw4_zomap\0"
9208
  /* 25472 */ "L2_loadbzw4_zomap\0"
9209
  /* 25490 */ "L2_loadalignb_zomap\0"
9210
  /* 25510 */ "L4_sub_memopb_zomap\0"
9211
  /* 25530 */ "L4_isub_memopb_zomap\0"
9212
  /* 25551 */ "L4_add_memopb_zomap\0"
9213
  /* 25571 */ "L4_iadd_memopb_zomap\0"
9214
  /* 25592 */ "L4_and_memopb_zomap\0"
9215
  /* 25612 */ "L4_iand_memopb_zomap\0"
9216
  /* 25633 */ "L4_or_memopb_zomap\0"
9217
  /* 25652 */ "L4_ior_memopb_zomap\0"
9218
  /* 25672 */ "L2_loadrb_zomap\0"
9219
  /* 25688 */ "S2_storerb_zomap\0"
9220
  /* 25705 */ "S4_storeirb_zomap\0"
9221
  /* 25723 */ "L2_loadrub_zomap\0"
9222
  /* 25740 */ "L2_loadrd_zomap\0"
9223
  /* 25756 */ "S2_storerd_zomap\0"
9224
  /* 25773 */ "L2_ploadrbf_zomap\0"
9225
  /* 25791 */ "S2_pstorerbf_zomap\0"
9226
  /* 25810 */ "S4_storeirbf_zomap\0"
9227
  /* 25829 */ "L2_ploadrubf_zomap\0"
9228
  /* 25848 */ "L2_ploadrdf_zomap\0"
9229
  /* 25866 */ "S2_pstorerdf_zomap\0"
9230
  /* 25885 */ "S2_pstorerff_zomap\0"
9231
  /* 25904 */ "L2_ploadrhf_zomap\0"
9232
  /* 25922 */ "S2_pstorerhf_zomap\0"
9233
  /* 25941 */ "S4_storeirhf_zomap\0"
9234
  /* 25960 */ "L2_ploadruhf_zomap\0"
9235
  /* 25979 */ "L2_ploadrif_zomap\0"
9236
  /* 25997 */ "S2_pstorerif_zomap\0"
9237
  /* 26016 */ "S4_storeirif_zomap\0"
9238
  /* 26035 */ "S2_storerf_zomap\0"
9239
  /* 26052 */ "S2_pstorerbnewf_zomap\0"
9240
  /* 26074 */ "S2_pstorerhnewf_zomap\0"
9241
  /* 26096 */ "S2_pstorerinewf_zomap\0"
9242
  /* 26118 */ "L2_loadalignh_zomap\0"
9243
  /* 26138 */ "L4_sub_memoph_zomap\0"
9244
  /* 26158 */ "L4_isub_memoph_zomap\0"
9245
  /* 26179 */ "L4_add_memoph_zomap\0"
9246
  /* 26199 */ "L4_iadd_memoph_zomap\0"
9247
  /* 26220 */ "L4_and_memoph_zomap\0"
9248
  /* 26240 */ "L4_iand_memoph_zomap\0"
9249
  /* 26261 */ "L4_or_memoph_zomap\0"
9250
  /* 26280 */ "L4_ior_memoph_zomap\0"
9251
  /* 26300 */ "L2_loadrh_zomap\0"
9252
  /* 26316 */ "S2_storerh_zomap\0"
9253
  /* 26333 */ "S4_storeirh_zomap\0"
9254
  /* 26351 */ "L2_loadruh_zomap\0"
9255
  /* 26368 */ "L2_loadri_zomap\0"
9256
  /* 26384 */ "S2_storeri_zomap\0"
9257
  /* 26401 */ "S4_storeiri_zomap\0"
9258
  /* 26419 */ "L2_ploadrbt_zomap\0"
9259
  /* 26437 */ "S2_pstorerbt_zomap\0"
9260
  /* 26456 */ "S4_storeirbt_zomap\0"
9261
  /* 26475 */ "L2_ploadrubt_zomap\0"
9262
  /* 26494 */ "L2_ploadrdt_zomap\0"
9263
  /* 26512 */ "S2_pstorerdt_zomap\0"
9264
  /* 26531 */ "S2_pstorerft_zomap\0"
9265
  /* 26550 */ "L2_ploadrht_zomap\0"
9266
  /* 26568 */ "S2_pstorerht_zomap\0"
9267
  /* 26587 */ "S4_storeirht_zomap\0"
9268
  /* 26606 */ "L2_ploadruht_zomap\0"
9269
  /* 26625 */ "L2_ploadrit_zomap\0"
9270
  /* 26643 */ "S2_pstorerit_zomap\0"
9271
  /* 26662 */ "S4_storeirit_zomap\0"
9272
  /* 26681 */ "S2_pstorerbnewt_zomap\0"
9273
  /* 26703 */ "S2_pstorerhnewt_zomap\0"
9274
  /* 26725 */ "S2_pstorerinewt_zomap\0"
9275
  /* 26747 */ "S2_storerbnew_zomap\0"
9276
  /* 26767 */ "L2_ploadrbfnew_zomap\0"
9277
  /* 26788 */ "S4_pstorerbfnew_zomap\0"
9278
  /* 26810 */ "S4_storeirbfnew_zomap\0"
9279
  /* 26832 */ "L2_ploadrubfnew_zomap\0"
9280
  /* 26854 */ "L2_ploadrdfnew_zomap\0"
9281
  /* 26875 */ "S4_pstorerdfnew_zomap\0"
9282
  /* 26897 */ "S4_pstorerffnew_zomap\0"
9283
  /* 26919 */ "L2_ploadrhfnew_zomap\0"
9284
  /* 26940 */ "S4_pstorerhfnew_zomap\0"
9285
  /* 26962 */ "S4_storeirhfnew_zomap\0"
9286
  /* 26984 */ "L2_ploadruhfnew_zomap\0"
9287
  /* 27006 */ "L2_ploadrifnew_zomap\0"
9288
  /* 27027 */ "S4_pstorerifnew_zomap\0"
9289
  /* 27049 */ "S4_storeirifnew_zomap\0"
9290
  /* 27071 */ "S4_pstorerbnewfnew_zomap\0"
9291
  /* 27096 */ "S4_pstorerhnewfnew_zomap\0"
9292
  /* 27121 */ "S4_pstorerinewfnew_zomap\0"
9293
  /* 27146 */ "S2_storerhnew_zomap\0"
9294
  /* 27166 */ "S2_storerinew_zomap\0"
9295
  /* 27186 */ "L2_ploadrbtnew_zomap\0"
9296
  /* 27207 */ "S4_pstorerbtnew_zomap\0"
9297
  /* 27229 */ "S4_storeirbtnew_zomap\0"
9298
  /* 27251 */ "L2_ploadrubtnew_zomap\0"
9299
  /* 27273 */ "L2_ploadrdtnew_zomap\0"
9300
  /* 27294 */ "S4_pstorerdtnew_zomap\0"
9301
  /* 27316 */ "S4_pstorerftnew_zomap\0"
9302
  /* 27338 */ "L2_ploadrhtnew_zomap\0"
9303
  /* 27359 */ "S4_pstorerhtnew_zomap\0"
9304
  /* 27381 */ "S4_storeirhtnew_zomap\0"
9305
  /* 27403 */ "L2_ploadruhtnew_zomap\0"
9306
  /* 27425 */ "L2_ploadritnew_zomap\0"
9307
  /* 27446 */ "S4_pstoreritnew_zomap\0"
9308
  /* 27468 */ "S4_storeiritnew_zomap\0"
9309
  /* 27490 */ "S4_pstorerbnewtnew_zomap\0"
9310
  /* 27515 */ "S4_pstorerhnewtnew_zomap\0"
9311
  /* 27540 */ "S4_pstorerinewtnew_zomap\0"
9312
  /* 27565 */ "L4_sub_memopw_zomap\0"
9313
  /* 27585 */ "L4_isub_memopw_zomap\0"
9314
  /* 27606 */ "L4_add_memopw_zomap\0"
9315
  /* 27626 */ "L4_iadd_memopw_zomap\0"
9316
  /* 27647 */ "L4_and_memopw_zomap\0"
9317
  /* 27667 */ "L4_iand_memopw_zomap\0"
9318
  /* 27688 */ "L4_or_memopw_zomap\0"
9319
  /* 27707 */ "L4_ior_memopw_zomap\0"
9320
  /* 27727 */ "V6_vswap\0"
9321
  /* 27736 */ "S2_clbp\0"
9322
  /* 27744 */ "Y2_tlbp\0"
9323
  /* 27752 */ "S6_vsplatrbp\0"
9324
  /* 27765 */ "A2_subp\0"
9325
  /* 27773 */ "G4_tfrgpcp\0"
9326
  /* 27784 */ "A4_tfrpcp\0"
9327
  /* 27794 */ "Y4_tfrspcp\0"
9328
  /* 27805 */ "A2_addp\0"
9329
  /* 27813 */ "A2_andp\0"
9330
  /* 27821 */ "V6_vassign_fp\0"
9331
  /* 27835 */ "L2_loadrbgp\0"
9332
  /* 27847 */ "S2_storerbgp\0"
9333
  /* 27860 */ "L2_loadrubgp\0"
9334
  /* 27873 */ "L2_loadrdgp\0"
9335
  /* 27885 */ "S2_storerdgp\0"
9336
  /* 27898 */ "A2_negp\0"
9337
  /* 27906 */ "S2_storerfgp\0"
9338
  /* 27919 */ "L2_loadrhgp\0"
9339
  /* 27931 */ "S2_storerhgp\0"
9340
  /* 27944 */ "L2_loadruhgp\0"
9341
  /* 27957 */ "L2_loadrigp\0"
9342
  /* 27969 */ "S2_storerigp\0"
9343
  /* 27982 */ "S2_storerbnewgp\0"
9344
  /* 27998 */ "S2_storerhnewgp\0"
9345
  /* 28014 */ "S2_storerinewgp\0"
9346
  /* 28030 */ "A7_clip\0"
9347
  /* 28038 */ "A7_vclip\0"
9348
  /* 28047 */ "M2_macsip\0"
9349
  /* 28057 */ "M2_mpysip\0"
9350
  /* 28067 */ "V6_vcombine_tmp\0"
9351
  /* 28083 */ "V6_vassign_tmp\0"
9352
  /* 28098 */ "J2_jump\0"
9353
  /* 28106 */ "A4_andnp\0"
9354
  /* 28115 */ "V6_vassignp\0"
9355
  /* 28127 */ "A2_minp\0"
9356
  /* 28135 */ "A4_ornp\0"
9357
  /* 28143 */ "F2_conv_df2d_chop\0"
9358
  /* 28161 */ "F2_conv_sf2d_chop\0"
9359
  /* 28179 */ "F2_conv_df2ud_chop\0"
9360
  /* 28198 */ "F2_conv_sf2ud_chop\0"
9361
  /* 28217 */ "F2_conv_df2w_chop\0"
9362
  /* 28235 */ "F2_conv_sf2w_chop\0"
9363
  /* 28253 */ "F2_conv_df2uw_chop\0"
9364
  /* 28272 */ "F2_conv_sf2uw_chop\0"
9365
  /* 28291 */ "A2_nop\0"
9366
  /* 28298 */ "Y2_stop\0"
9367
  /* 28306 */ "G4_tfrgcpp\0"
9368
  /* 28317 */ "A4_tfrcpp\0"
9369
  /* 28327 */ "Y4_tfrscpp\0"
9370
  /* 28338 */ "S6_vtrunehb_ppp\0"
9371
  /* 28354 */ "S6_vtrunohb_ppp\0"
9372
  /* 28370 */ "C2_cmpeqp\0"
9373
  /* 28380 */ "M2_vrcmpys_s1rp\0"
9374
  /* 28396 */ "S4_extractp_rp\0"
9375
  /* 28411 */ "S2_insertp_rp\0"
9376
  /* 28425 */ "S2_extractup_rp\0"
9377
  /* 28441 */ "S4_extract_rp\0"
9378
  /* 28455 */ "S2_insert_rp\0"
9379
  /* 28468 */ "S2_extractu_rp\0"
9380
  /* 28483 */ "A2_tfrp\0"
9381
  /* 28491 */ "A2_orp\0"
9382
  /* 28498 */ "A2_xorp\0"
9383
  /* 28506 */ "C2_tfrrp\0"
9384
  /* 28515 */ "SS2_stored_sp\0"
9385
  /* 28529 */ "SL2_loadrd_sp\0"
9386
  /* 28543 */ "SL2_loadri_sp\0"
9387
  /* 28557 */ "SS2_storew_sp\0"
9388
  /* 28571 */ "A2_absp\0"
9389
  /* 28579 */ "SA1_addsp\0"
9390
  /* 28589 */ "A2_addsp\0"
9391
  /* 28598 */ "S2_lfsp\0"
9392
  /* 28606 */ "S4_extractp\0"
9393
  /* 28618 */ "C2_cmpgtp\0"
9394
  /* 28628 */ "S5_popcountp\0"
9395
  /* 28641 */ "A2_notp\0"
9396
  /* 28649 */ "S2_insertp\0"
9397
  /* 28660 */ "M2_mpysu_up\0"
9398
  /* 28672 */ "M2_mpyu_up\0"
9399
  /* 28683 */ "M2_mpy_up\0"
9400
  /* 28693 */ "A2_minup\0"
9401
  /* 28702 */ "S2_extractup\0"
9402
  /* 28715 */ "C2_cmpgtup\0"
9403
  /* 28726 */ "A2_maxup\0"
9404
  /* 28735 */ "S2_brevp\0"
9405
  /* 28744 */ "A2_maxp\0"
9406
  /* 28752 */ "S2_parityp\0"
9407
  /* 28763 */ "V6_vwhist256q\0"
9408
  /* 28777 */ "V6_vwhist128q\0"
9409
  /* 28791 */ "L4_loadd_aq\0"
9410
  /* 28803 */ "L2_loadw_aq\0"
9411
  /* 28815 */ "V6_vsubbq\0"
9412
  /* 28825 */ "V6_vaddbq\0"
9413
  /* 28835 */ "A4_cmpbeq\0"
9414
  /* 28845 */ "A2_vcmpbeq\0"
9415
  /* 28856 */ "A4_cmpheq\0"
9416
  /* 28866 */ "A2_vcmpheq\0"
9417
  /* 28877 */ "C4_cmpneq\0"
9418
  /* 28887 */ "A4_rcmpneq\0"
9419
  /* 28898 */ "C2_cmpeq\0"
9420
  /* 28907 */ "F2_dfcmpeq\0"
9421
  /* 28918 */ "F2_sfcmpeq\0"
9422
  /* 28929 */ "A4_rcmpeq\0"
9423
  /* 28939 */ "A2_vcmpweq\0"
9424
  /* 28950 */ "V6_vsubhq\0"
9425
  /* 28960 */ "V6_vaddhq\0"
9426
  /* 28970 */ "V6_vgathermhq\0"
9427
  /* 28984 */ "V6_vscattermhq\0"
9428
  /* 28999 */ "V6_vsubbnq\0"
9429
  /* 29010 */ "V6_vaddbnq\0"
9430
  /* 29021 */ "V6_vsubhnq\0"
9431
  /* 29032 */ "V6_vaddhnq\0"
9432
  /* 29043 */ "V6_vsubwnq\0"
9433
  /* 29054 */ "V6_vaddwnq\0"
9434
  /* 29065 */ "V6_vhistq\0"
9435
  /* 29075 */ "V6_vsubwq\0"
9436
  /* 29085 */ "V6_vaddwq\0"
9437
  /* 29095 */ "V6_vgathermhwq\0"
9438
  /* 29110 */ "V6_vscattermhwq\0"
9439
  /* 29126 */ "V6_vgathermwq\0"
9440
  /* 29140 */ "V6_vscattermwq\0"
9441
  /* 29155 */ "J2_loop0r\0"
9442
  /* 29165 */ "J2_loop1r\0"
9443
  /* 29175 */ "S6_rol_i_r\0"
9444
  /* 29186 */ "S2_asl_i_r\0"
9445
  /* 29197 */ "S2_asr_i_r\0"
9446
  /* 29208 */ "S2_lsr_i_r\0"
9447
  /* 29219 */ "PS_tailcall_r\0"
9448
  /* 29233 */ "S2_asl_r_r\0"
9449
  /* 29244 */ "S2_lsl_r_r\0"
9450
  /* 29255 */ "S2_asr_r_r\0"
9451
  /* 29266 */ "S2_lsr_r_r\0"
9452
  /* 29277 */ "M2_vcmac_s0_sat_r\0"
9453
  /* 29295 */ "M2_vcmpy_s0_sat_r\0"
9454
  /* 29313 */ "M2_vcmpy_s1_sat_r\0"
9455
  /* 29331 */ "S2_togglebit_r\0"
9456
  /* 29346 */ "S2_clrbit_r\0"
9457
  /* 29358 */ "S2_setbit_r\0"
9458
  /* 29370 */ "S2_tstbit_r\0"
9459
  /* 29382 */ "S4_ntstbit_r\0"
9460
  /* 29395 */ "Y2_icdatar\0"
9461
  /* 29406 */ "Y2_tlbr\0"
9462
  /* 29414 */ "L2_loadbsw2_pbr\0"
9463
  /* 29430 */ "L2_loadbzw2_pbr\0"
9464
  /* 29446 */ "L2_loadbsw4_pbr\0"
9465
  /* 29462 */ "L2_loadbzw4_pbr\0"
9466
  /* 29478 */ "L2_loadalignb_pbr\0"
9467
  /* 29496 */ "L2_loadrb_pbr\0"
9468
  /* 29510 */ "S2_storerb_pbr\0"
9469
  /* 29525 */ "L2_loadrub_pbr\0"
9470
  /* 29540 */ "L2_loadrd_pbr\0"
9471
  /* 29554 */ "S2_storerd_pbr\0"
9472
  /* 29569 */ "S2_storerf_pbr\0"
9473
  /* 29584 */ "L2_loadalignh_pbr\0"
9474
  /* 29602 */ "L2_loadrh_pbr\0"
9475
  /* 29616 */ "S2_storerh_pbr\0"
9476
  /* 29631 */ "L2_loadruh_pbr\0"
9477
  /* 29646 */ "L2_loadri_pbr\0"
9478
  /* 29660 */ "S2_storeri_pbr\0"
9479
  /* 29675 */ "S2_storerbnew_pbr\0"
9480
  /* 29693 */ "S2_storerhnew_pbr\0"
9481
  /* 29711 */ "S2_storerinew_pbr\0"
9482
  /* 29729 */ "A2_vavgubr\0"
9483
  /* 29740 */ "A2_vnavghcr\0"
9484
  /* 29752 */ "A2_vavghcr\0"
9485
  /* 29763 */ "L2_loadbsw2_pcr\0"
9486
  /* 29779 */ "L2_loadbzw2_pcr\0"
9487
  /* 29795 */ "L2_loadbsw4_pcr\0"
9488
  /* 29811 */ "L2_loadbzw4_pcr\0"
9489
  /* 29827 */ "L2_loadalignb_pcr\0"
9490
  /* 29845 */ "L2_loadrb_pcr\0"
9491
  /* 29859 */ "PS_loadrb_pcr\0"
9492
  /* 29873 */ "S2_storerb_pcr\0"
9493
  /* 29888 */ "PS_storerb_pcr\0"
9494
  /* 29903 */ "L2_loadrub_pcr\0"
9495
  /* 29918 */ "PS_loadrub_pcr\0"
9496
  /* 29933 */ "L2_loadrd_pcr\0"
9497
  /* 29947 */ "PS_loadrd_pcr\0"
9498
  /* 29961 */ "S2_storerd_pcr\0"
9499
  /* 29976 */ "PS_storerd_pcr\0"
9500
  /* 29991 */ "S2_storerf_pcr\0"
9501
  /* 30006 */ "PS_storerf_pcr\0"
9502
  /* 30021 */ "L2_loadalignh_pcr\0"
9503
  /* 30039 */ "L2_loadrh_pcr\0"
9504
  /* 30053 */ "PS_loadrh_pcr\0"
9505
  /* 30067 */ "S2_storerh_pcr\0"
9506
  /* 30082 */ "PS_storerh_pcr\0"
9507
  /* 30097 */ "L2_loadruh_pcr\0"
9508
  /* 30112 */ "PS_loadruh_pcr\0"
9509
  /* 30127 */ "L2_loadri_pcr\0"
9510
  /* 30141 */ "PS_loadri_pcr\0"
9511
  /* 30155 */ "S2_storeri_pcr\0"
9512
  /* 30170 */ "PS_storeri_pcr\0"
9513
  /* 30185 */ "S2_storerbnew_pcr\0"
9514
  /* 30203 */ "S2_storerhnew_pcr\0"
9515
  /* 30221 */ "S2_storerinew_pcr\0"
9516
  /* 30239 */ "G4_tfrgrcr\0"
9517
  /* 30250 */ "A2_tfrrcr\0"
9518
  /* 30260 */ "Y2_tfrsrcr\0"
9519
  /* 30271 */ "A2_vnavgwcr\0"
9520
  /* 30283 */ "A2_vavgwcr\0"
9521
  /* 30294 */ "M4_mpyri_addr\0"
9522
  /* 30308 */ "M4_mpyrr_addr\0"
9523
  /* 30322 */ "Y2_barrier\0"
9524
  /* 30333 */ "SA1_tfr\0"
9525
  /* 30341 */ "dup_A2_tfr\0"
9526
  /* 30352 */ "Y4_l2tagr\0"
9527
  /* 30362 */ "Y2_dctagr\0"
9528
  /* 30372 */ "Y2_ictagr\0"
9529
  /* 30382 */ "S4_vxaddsubhr\0"
9530
  /* 30396 */ "S4_vxsubaddhr\0"
9531
  /* 30410 */ "A2_vnavghr\0"
9532
  /* 30421 */ "A2_vavghr\0"
9533
  /* 30431 */ "A2_vavguhr\0"
9534
  /* 30442 */ "dup_A2_andir\0"
9535
  /* 30455 */ "dup_A4_combineir\0"
9536
  /* 30472 */ "A2_orir\0"
9537
  /* 30480 */ "C2_muxir\0"
9538
  /* 30489 */ "C2_bitsclr\0"
9539
  /* 30500 */ "C4_nbitsclr\0"
9540
  /* 30512 */ "J2_callr\0"
9541
  /* 30521 */ "PS_call_nr\0"
9542
  /* 30532 */ "PS_callr_nr\0"
9543
  /* 30544 */ "Y2_iassignr\0"
9544
  /* 30556 */ "A2_or\0"
9545
  /* 30562 */ "C2_or\0"
9546
  /* 30568 */ "V6_veqb_or\0"
9547
  /* 30579 */ "V6_vgtb_or\0"
9548
  /* 30590 */ "V6_vgtub_or\0"
9549
  /* 30602 */ "V6_pred_or\0"
9550
  /* 30613 */ "C4_and_or\0"
9551
  /* 30623 */ "M4_and_or\0"
9552
  /* 30633 */ "V6_vgtbf_or\0"
9553
  /* 30645 */ "V6_vgthf_or\0"
9554
  /* 30657 */ "V6_vgtsf_or\0"
9555
  /* 30669 */ "V6_veqh_or\0"
9556
  /* 30680 */ "V6_vgth_or\0"
9557
  /* 30691 */ "V6_vgtuh_or\0"
9558
  /* 30703 */ "S6_rol_i_p_or\0"
9559
  /* 30717 */ "S2_asl_i_p_or\0"
9560
  /* 30731 */ "S2_asr_i_p_or\0"
9561
  /* 30745 */ "S2_lsr_i_p_or\0"
9562
  /* 30759 */ "S2_asl_r_p_or\0"
9563
  /* 30773 */ "S2_lsl_r_p_or\0"
9564
  /* 30787 */ "S2_asr_r_p_or\0"
9565
  /* 30801 */ "S2_lsr_r_p_or\0"
9566
  /* 30815 */ "S6_rol_i_r_or\0"
9567
  /* 30829 */ "S2_asl_i_r_or\0"
9568
  /* 30843 */ "S2_asr_i_r_or\0"
9569
  /* 30857 */ "S2_lsr_i_r_or\0"
9570
  /* 30871 */ "S2_asl_r_r_or\0"
9571
  /* 30885 */ "S2_lsl_r_r_or\0"
9572
  /* 30899 */ "S2_asr_r_r_or\0"
9573
  /* 30913 */ "S2_lsr_r_r_or\0"
9574
  /* 30927 */ "C4_or_or\0"
9575
  /* 30936 */ "M4_or_or\0"
9576
  /* 30945 */ "M4_xor_or\0"
9577
  /* 30955 */ "V6_veqw_or\0"
9578
  /* 30966 */ "V6_vgtw_or\0"
9579
  /* 30977 */ "V6_vgtuw_or\0"
9580
  /* 30989 */ "V6_MAP_equb_ior\0"
9581
  /* 31005 */ "V6_MAP_equh_ior\0"
9582
  /* 31021 */ "V6_MAP_equw_ior\0"
9583
  /* 31037 */ "V6_vror\0"
9584
  /* 31045 */ "V6_vor\0"
9585
  /* 31052 */ "A2_xor\0"
9586
  /* 31059 */ "C2_xor\0"
9587
  /* 31066 */ "V6_veqb_xor\0"
9588
  /* 31078 */ "V6_vgtb_xor\0"
9589
  /* 31090 */ "V6_MAP_equb_xor\0"
9590
  /* 31106 */ "V6_vgtub_xor\0"
9591
  /* 31119 */ "V6_pred_xor\0"
9592
  /* 31131 */ "M4_and_xor\0"
9593
  /* 31142 */ "V6_vgtbf_xor\0"
9594
  /* 31155 */ "V6_vgthf_xor\0"
9595
  /* 31168 */ "V6_vgtsf_xor\0"
9596
  /* 31181 */ "V6_veqh_xor\0"
9597
  /* 31193 */ "V6_vgth_xor\0"
9598
  /* 31205 */ "V6_MAP_equh_xor\0"
9599
  /* 31221 */ "V6_vgtuh_xor\0"
9600
  /* 31234 */ "S2_asl_r_p_xor\0"
9601
  /* 31249 */ "S2_lsl_r_p_xor\0"
9602
  /* 31264 */ "S2_asr_r_p_xor\0"
9603
  /* 31279 */ "S2_lsr_r_p_xor\0"
9604
  /* 31294 */ "M4_or_xor\0"
9605
  /* 31304 */ "V6_veqw_xor\0"
9606
  /* 31316 */ "V6_vgtw_xor\0"
9607
  /* 31328 */ "V6_MAP_equw_xor\0"
9608
  /* 31344 */ "V6_vgtuw_xor\0"
9609
  /* 31357 */ "V6_vxor\0"
9610
  /* 31365 */ "L2_loadbsw2_pr\0"
9611
  /* 31380 */ "L2_loadbzw2_pr\0"
9612
  /* 31395 */ "L2_loadbsw4_pr\0"
9613
  /* 31410 */ "L2_loadbzw4_pr\0"
9614
  /* 31425 */ "L2_loadalignb_pr\0"
9615
  /* 31442 */ "L2_loadrb_pr\0"
9616
  /* 31455 */ "S2_storerb_pr\0"
9617
  /* 31469 */ "L2_loadrub_pr\0"
9618
  /* 31483 */ "L2_loadrd_pr\0"
9619
  /* 31496 */ "S2_storerd_pr\0"
9620
  /* 31510 */ "S2_storerf_pr\0"
9621
  /* 31524 */ "L2_loadalignh_pr\0"
9622
  /* 31541 */ "L2_loadrh_pr\0"
9623
  /* 31554 */ "S2_storerh_pr\0"
9624
  /* 31568 */ "L2_loadruh_pr\0"
9625
  /* 31582 */ "L2_loadri_pr\0"
9626
  /* 31595 */ "S2_storeri_pr\0"
9627
  /* 31609 */ "S2_storerbnew_pr\0"
9628
  /* 31626 */ "S2_storerhnew_pr\0"
9629
  /* 31643 */ "S2_storerinew_pr\0"
9630
  /* 31660 */ "J2_jumpr\0"
9631
  /* 31669 */ "J4_hintjumpr\0"
9632
  /* 31682 */ "C2_tfrpr\0"
9633
  /* 31691 */ "F2_sffixupr\0"
9634
  /* 31703 */ "L4_loadrb_rr\0"
9635
  /* 31716 */ "S4_storerb_rr\0"
9636
  /* 31730 */ "L4_loadrub_rr\0"
9637
  /* 31744 */ "A7_croundd_rr\0"
9638
  /* 31758 */ "A4_round_rr\0"
9639
  /* 31770 */ "A4_cround_rr\0"
9640
  /* 31783 */ "L4_loadrd_rr\0"
9641
  /* 31796 */ "S4_storerd_rr\0"
9642
  /* 31810 */ "L4_ploadrbf_rr\0"
9643
  /* 31825 */ "S4_pstorerbf_rr\0"
9644
  /* 31841 */ "L4_ploadrubf_rr\0"
9645
  /* 31857 */ "L4_ploadrdf_rr\0"
9646
  /* 31872 */ "S4_pstorerdf_rr\0"
9647
  /* 31888 */ "S4_pstorerff_rr\0"
9648
  /* 31904 */ "L4_ploadrhf_rr\0"
9649
  /* 31919 */ "S4_pstorerhf_rr\0"
9650
  /* 31935 */ "L4_ploadruhf_rr\0"
9651
  /* 31951 */ "L4_ploadrif_rr\0"
9652
  /* 31966 */ "S4_pstorerif_rr\0"
9653
  /* 31982 */ "S4_storerf_rr\0"
9654
  /* 31996 */ "S4_pstorerbnewf_rr\0"
9655
  /* 32015 */ "S4_pstorerhnewf_rr\0"
9656
  /* 32034 */ "S4_pstorerinewf_rr\0"
9657
  /* 32053 */ "L4_loadrh_rr\0"
9658
  /* 32066 */ "S4_storerh_rr\0"
9659
  /* 32080 */ "L4_loadruh_rr\0"
9660
  /* 32094 */ "L4_loadri_rr\0"
9661
  /* 32107 */ "S4_storeri_rr\0"
9662
  /* 32121 */ "L4_ploadrbt_rr\0"
9663
  /* 32136 */ "S4_pstorerbt_rr\0"
9664
  /* 32152 */ "L4_ploadrubt_rr\0"
9665
  /* 32168 */ "L4_ploadrdt_rr\0"
9666
  /* 32183 */ "S4_pstorerdt_rr\0"
9667
  /* 32199 */ "S4_pstorerft_rr\0"
9668
  /* 32215 */ "L4_ploadrht_rr\0"
9669
  /* 32230 */ "S4_pstorerht_rr\0"
9670
  /* 32246 */ "L4_ploadruht_rr\0"
9671
  /* 32262 */ "L4_ploadrit_rr\0"
9672
  /* 32277 */ "S4_pstorerit_rr\0"
9673
  /* 32293 */ "S4_pstorerbnewt_rr\0"
9674
  /* 32312 */ "S4_pstorerhnewt_rr\0"
9675
  /* 32331 */ "S4_pstorerinewt_rr\0"
9676
  /* 32350 */ "S4_storerbnew_rr\0"
9677
  /* 32367 */ "L4_ploadrbfnew_rr\0"
9678
  /* 32385 */ "S4_pstorerbfnew_rr\0"
9679
  /* 32404 */ "L4_ploadrubfnew_rr\0"
9680
  /* 32423 */ "L4_ploadrdfnew_rr\0"
9681
  /* 32441 */ "S4_pstorerdfnew_rr\0"
9682
  /* 32460 */ "S4_pstorerffnew_rr\0"
9683
  /* 32479 */ "L4_ploadrhfnew_rr\0"
9684
  /* 32497 */ "S4_pstorerhfnew_rr\0"
9685
  /* 32516 */ "L4_ploadruhfnew_rr\0"
9686
  /* 32535 */ "L4_ploadrifnew_rr\0"
9687
  /* 32553 */ "S4_pstorerifnew_rr\0"
9688
  /* 32572 */ "S4_pstorerbnewfnew_rr\0"
9689
  /* 32594 */ "S4_pstorerhnewfnew_rr\0"
9690
  /* 32616 */ "S4_pstorerinewfnew_rr\0"
9691
  /* 32638 */ "S4_storerhnew_rr\0"
9692
  /* 32655 */ "S4_storerinew_rr\0"
9693
  /* 32672 */ "L4_ploadrbtnew_rr\0"
9694
  /* 32690 */ "S4_pstorerbtnew_rr\0"
9695
  /* 32709 */ "L4_ploadrubtnew_rr\0"
9696
  /* 32728 */ "L4_ploadrdtnew_rr\0"
9697
  /* 32746 */ "S4_pstorerdtnew_rr\0"
9698
  /* 32765 */ "S4_pstorerftnew_rr\0"
9699
  /* 32784 */ "L4_ploadrhtnew_rr\0"
9700
  /* 32802 */ "S4_pstorerhtnew_rr\0"
9701
  /* 32821 */ "L4_ploadruhtnew_rr\0"
9702
  /* 32840 */ "L4_ploadritnew_rr\0"
9703
  /* 32858 */ "S4_pstoreritnew_rr\0"
9704
  /* 32877 */ "S4_pstorerbnewtnew_rr\0"
9705
  /* 32899 */ "S4_pstorerhnewtnew_rr\0"
9706
  /* 32921 */ "S4_pstorerinewtnew_rr\0"
9707
  /* 32943 */ "G4_tfrgcrr\0"
9708
  /* 32954 */ "A2_tfrcrr\0"
9709
  /* 32964 */ "Y2_tfrscrr\0"
9710
  /* 32975 */ "J2_ploop1sr\0"
9711
  /* 32987 */ "J2_ploop2sr\0"
9712
  /* 32999 */ "J2_ploop3sr\0"
9713
  /* 33011 */ "LDriw_ctr\0"
9714
  /* 33021 */ "STriw_ctr\0"
9715
  /* 33031 */ "J4_jumpsetr\0"
9716
  /* 33043 */ "V6_vrotr\0"
9717
  /* 33052 */ "L4_loadbsw2_ur\0"
9718
  /* 33067 */ "L4_loadbzw2_ur\0"
9719
  /* 33082 */ "L4_loadbsw4_ur\0"
9720
  /* 33097 */ "L4_loadbzw4_ur\0"
9721
  /* 33112 */ "L4_loadalignb_ur\0"
9722
  /* 33129 */ "L4_loadrb_ur\0"
9723
  /* 33142 */ "S4_storerb_ur\0"
9724
  /* 33156 */ "L4_loadrub_ur\0"
9725
  /* 33170 */ "L4_loadrd_ur\0"
9726
  /* 33183 */ "S4_storerd_ur\0"
9727
  /* 33197 */ "S4_storerf_ur\0"
9728
  /* 33211 */ "L4_loadalignh_ur\0"
9729
  /* 33228 */ "L4_loadrh_ur\0"
9730
  /* 33241 */ "S4_storerh_ur\0"
9731
  /* 33255 */ "L4_loadruh_ur\0"
9732
  /* 33269 */ "L4_loadri_ur\0"
9733
  /* 33282 */ "S4_storeri_ur\0"
9734
  /* 33296 */ "S4_storerbnew_ur\0"
9735
  /* 33313 */ "S4_storerhnew_ur\0"
9736
  /* 33330 */ "S4_storerinew_ur\0"
9737
  /* 33347 */ "A2_vnavgwr\0"
9738
  /* 33358 */ "A2_vavgwr\0"
9739
  /* 33368 */ "V6_vinsertwr\0"
9740
  /* 33381 */ "A2_vavguwr\0"
9741
  /* 33392 */ "SA1_combinezr\0"
9742
  /* 33406 */ "A2_abs\0"
9743
  /* 33413 */ "L4_ploadrbf_abs\0"
9744
  /* 33429 */ "S4_pstorerbf_abs\0"
9745
  /* 33446 */ "L4_ploadrubf_abs\0"
9746
  /* 33463 */ "L4_ploadrdf_abs\0"
9747
  /* 33479 */ "S4_pstorerdf_abs\0"
9748
  /* 33496 */ "S4_pstorerff_abs\0"
9749
  /* 33513 */ "L4_ploadrhf_abs\0"
9750
  /* 33529 */ "S4_pstorerhf_abs\0"
9751
  /* 33546 */ "L4_ploadruhf_abs\0"
9752
  /* 33563 */ "L4_ploadrif_abs\0"
9753
  /* 33579 */ "S4_pstorerif_abs\0"
9754
  /* 33596 */ "S4_pstorerbnewf_abs\0"
9755
  /* 33616 */ "S4_pstorerhnewf_abs\0"
9756
  /* 33636 */ "S4_pstorerinewf_abs\0"
9757
  /* 33656 */ "L4_ploadrbt_abs\0"
9758
  /* 33672 */ "S4_pstorerbt_abs\0"
9759
  /* 33689 */ "L4_ploadrubt_abs\0"
9760
  /* 33706 */ "L4_ploadrdt_abs\0"
9761
  /* 33722 */ "S4_pstorerdt_abs\0"
9762
  /* 33739 */ "S4_pstorerft_abs\0"
9763
  /* 33756 */ "L4_ploadrht_abs\0"
9764
  /* 33772 */ "S4_pstorerht_abs\0"
9765
  /* 33789 */ "L4_ploadruht_abs\0"
9766
  /* 33806 */ "L4_ploadrit_abs\0"
9767
  /* 33822 */ "S4_pstorerit_abs\0"
9768
  /* 33839 */ "S4_pstorerbnewt_abs\0"
9769
  /* 33859 */ "S4_pstorerhnewt_abs\0"
9770
  /* 33879 */ "S4_pstorerinewt_abs\0"
9771
  /* 33899 */ "L4_ploadrbfnew_abs\0"
9772
  /* 33918 */ "S4_pstorerbfnew_abs\0"
9773
  /* 33938 */ "L4_ploadrubfnew_abs\0"
9774
  /* 33958 */ "L4_ploadrdfnew_abs\0"
9775
  /* 33977 */ "S4_pstorerdfnew_abs\0"
9776
  /* 33997 */ "S4_pstorerffnew_abs\0"
9777
  /* 34017 */ "L4_ploadrhfnew_abs\0"
9778
  /* 34036 */ "S4_pstorerhfnew_abs\0"
9779
  /* 34056 */ "L4_ploadruhfnew_abs\0"
9780
  /* 34076 */ "L4_ploadrifnew_abs\0"
9781
  /* 34095 */ "S4_pstorerifnew_abs\0"
9782
  /* 34115 */ "S4_pstorerbnewfnew_abs\0"
9783
  /* 34138 */ "S4_pstorerhnewfnew_abs\0"
9784
  /* 34161 */ "S4_pstorerinewfnew_abs\0"
9785
  /* 34184 */ "L4_ploadrbtnew_abs\0"
9786
  /* 34203 */ "S4_pstorerbtnew_abs\0"
9787
  /* 34223 */ "L4_ploadrubtnew_abs\0"
9788
  /* 34243 */ "L4_ploadrdtnew_abs\0"
9789
  /* 34262 */ "S4_pstorerdtnew_abs\0"
9790
  /* 34282 */ "S4_pstorerftnew_abs\0"
9791
  /* 34302 */ "L4_ploadrhtnew_abs\0"
9792
  /* 34321 */ "S4_pstorerhtnew_abs\0"
9793
  /* 34341 */ "L4_ploadruhtnew_abs\0"
9794
  /* 34361 */ "L4_ploadritnew_abs\0"
9795
  /* 34380 */ "S4_pstoreritnew_abs\0"
9796
  /* 34400 */ "S4_pstorerbnewtnew_abs\0"
9797
  /* 34423 */ "S4_pstorerhnewtnew_abs\0"
9798
  /* 34446 */ "S4_pstorerinewtnew_abs\0"
9799
  /* 34469 */ "PS_loadrbabs\0"
9800
  /* 34482 */ "PS_storerbabs\0"
9801
  /* 34496 */ "PS_loadrubabs\0"
9802
  /* 34510 */ "PS_loadrdabs\0"
9803
  /* 34523 */ "PS_storerdabs\0"
9804
  /* 34537 */ "PS_storerfabs\0"
9805
  /* 34551 */ "PS_loadrhabs\0"
9806
  /* 34564 */ "PS_storerhabs\0"
9807
  /* 34578 */ "PS_loadruhabs\0"
9808
  /* 34592 */ "PS_loadriabs\0"
9809
  /* 34605 */ "PS_storeriabs\0"
9810
  /* 34619 */ "PS_storerbnewabs\0"
9811
  /* 34636 */ "PS_storerhnewabs\0"
9812
  /* 34653 */ "PS_storerinewabs\0"
9813
  /* 34670 */ "A2_vsububs\0"
9814
  /* 34681 */ "A2_vaddubs\0"
9815
  /* 34692 */ "A5_vaddhubs\0"
9816
  /* 34704 */ "M2_vmac2es\0"
9817
  /* 34715 */ "A2_vsubhs\0"
9818
  /* 34725 */ "A2_svsubhs\0"
9819
  /* 34736 */ "A2_vaddhs\0"
9820
  /* 34746 */ "A2_svaddhs\0"
9821
  /* 34757 */ "A2_svavghs\0"
9822
  /* 34768 */ "A2_vsubuhs\0"
9823
  /* 34779 */ "A2_svsubuhs\0"
9824
  /* 34791 */ "A2_vadduhs\0"
9825
  /* 34802 */ "A2_svadduhs\0"
9826
  /* 34814 */ "S2_vrndpackwhs\0"
9827
  /* 34829 */ "F2_sffms\0"
9828
  /* 34838 */ "V6_vmpyhsrs\0"
9829
  /* 34850 */ "V6_vmpyhvsrs\0"
9830
  /* 34863 */ "F2_dfclass\0"
9831
  /* 34874 */ "F2_sfclass\0"
9832
  /* 34885 */ "V6_vmpyhss\0"
9833
  /* 34896 */ "V6_vmpabus\0"
9834
  /* 34907 */ "V6_vdmpybus\0"
9835
  /* 34919 */ "V6_vrmpybus\0"
9836
  /* 34931 */ "V6_vtmpybus\0"
9837
  /* 34943 */ "V6_vmpybus\0"
9838
  /* 34954 */ "V6_vmpyhus\0"
9839
  /* 34965 */ "V6_vmpyuhvs\0"
9840
  /* 34977 */ "A2_vsubws\0"
9841
  /* 34987 */ "A2_vaddws\0"
9842
  /* 34997 */ "L4_loadw_phys\0"
9843
  /* 35011 */ "SL2_jumpr31_t\0"
9844
  /* 35025 */ "SL2_return_t\0"
9845
  /* 35038 */ "L4_return_t\0"
9846
  /* 35050 */ "J4_tstbit0_fp0_jump_t\0"
9847
  /* 35072 */ "J4_cmpeqn1_fp0_jump_t\0"
9848
  /* 35094 */ "J4_cmpgtn1_fp0_jump_t\0"
9849
  /* 35116 */ "J4_cmpeqi_fp0_jump_t\0"
9850
  /* 35137 */ "J4_cmpgti_fp0_jump_t\0"
9851
  /* 35158 */ "J4_cmpgtui_fp0_jump_t\0"
9852
  /* 35180 */ "J4_cmpeq_fp0_jump_t\0"
9853
  /* 35200 */ "J4_cmpgt_fp0_jump_t\0"
9854
  /* 35220 */ "J4_cmpgtu_fp0_jump_t\0"
9855
  /* 35241 */ "J4_tstbit0_tp0_jump_t\0"
9856
  /* 35263 */ "J4_cmpeqn1_tp0_jump_t\0"
9857
  /* 35285 */ "J4_cmpgtn1_tp0_jump_t\0"
9858
  /* 35307 */ "J4_cmpeqi_tp0_jump_t\0"
9859
  /* 35328 */ "J4_cmpgti_tp0_jump_t\0"
9860
  /* 35349 */ "J4_cmpgtui_tp0_jump_t\0"
9861
  /* 35371 */ "J4_cmpeq_tp0_jump_t\0"
9862
  /* 35391 */ "J4_cmpgt_tp0_jump_t\0"
9863
  /* 35411 */ "J4_cmpgtu_tp0_jump_t\0"
9864
  /* 35432 */ "J4_tstbit0_fp1_jump_t\0"
9865
  /* 35454 */ "J4_cmpeqn1_fp1_jump_t\0"
9866
  /* 35476 */ "J4_cmpgtn1_fp1_jump_t\0"
9867
  /* 35498 */ "J4_cmpeqi_fp1_jump_t\0"
9868
  /* 35519 */ "J4_cmpgti_fp1_jump_t\0"
9869
  /* 35540 */ "J4_cmpgtui_fp1_jump_t\0"
9870
  /* 35562 */ "J4_cmpeq_fp1_jump_t\0"
9871
  /* 35582 */ "J4_cmpgt_fp1_jump_t\0"
9872
  /* 35602 */ "J4_cmpgtu_fp1_jump_t\0"
9873
  /* 35623 */ "J4_tstbit0_tp1_jump_t\0"
9874
  /* 35645 */ "J4_cmpeqn1_tp1_jump_t\0"
9875
  /* 35667 */ "J4_cmpgtn1_tp1_jump_t\0"
9876
  /* 35689 */ "J4_cmpeqi_tp1_jump_t\0"
9877
  /* 35710 */ "J4_cmpgti_tp1_jump_t\0"
9878
  /* 35731 */ "J4_cmpgtui_tp1_jump_t\0"
9879
  /* 35753 */ "J4_cmpeq_tp1_jump_t\0"
9880
  /* 35773 */ "J4_cmpgt_tp1_jump_t\0"
9881
  /* 35793 */ "J4_cmpgtu_tp1_jump_t\0"
9882
  /* 35814 */ "J4_tstbit0_f_jumpnv_t\0"
9883
  /* 35836 */ "J4_cmpeqn1_f_jumpnv_t\0"
9884
  /* 35858 */ "J4_cmpgtn1_f_jumpnv_t\0"
9885
  /* 35880 */ "J4_cmpeqi_f_jumpnv_t\0"
9886
  /* 35901 */ "J4_cmpgti_f_jumpnv_t\0"
9887
  /* 35922 */ "J4_cmpgtui_f_jumpnv_t\0"
9888
  /* 35944 */ "J4_cmpeq_f_jumpnv_t\0"
9889
  /* 35964 */ "J4_cmpgt_f_jumpnv_t\0"
9890
  /* 35984 */ "J4_cmplt_f_jumpnv_t\0"
9891
  /* 36004 */ "J4_cmpgtu_f_jumpnv_t\0"
9892
  /* 36025 */ "J4_cmpltu_f_jumpnv_t\0"
9893
  /* 36046 */ "J4_tstbit0_t_jumpnv_t\0"
9894
  /* 36068 */ "J4_cmpeqn1_t_jumpnv_t\0"
9895
  /* 36090 */ "J4_cmpgtn1_t_jumpnv_t\0"
9896
  /* 36112 */ "J4_cmpeqi_t_jumpnv_t\0"
9897
  /* 36133 */ "J4_cmpgti_t_jumpnv_t\0"
9898
  /* 36154 */ "J4_cmpgtui_t_jumpnv_t\0"
9899
  /* 36176 */ "J4_cmpeq_t_jumpnv_t\0"
9900
  /* 36196 */ "J4_cmpgt_t_jumpnv_t\0"
9901
  /* 36216 */ "J4_cmplt_t_jumpnv_t\0"
9902
  /* 36236 */ "J4_cmpgtu_t_jumpnv_t\0"
9903
  /* 36257 */ "J4_cmpltu_t_jumpnv_t\0"
9904
  /* 36278 */ "L4_return_map_to_raw_t\0"
9905
  /* 36301 */ "M4_mac_up_s1_sat\0"
9906
  /* 36318 */ "M4_nac_up_s1_sat\0"
9907
  /* 36335 */ "M2_mpy_up_s1_sat\0"
9908
  /* 36352 */ "A2_sat\0"
9909
  /* 36359 */ "V6_vwhist256_sat\0"
9910
  /* 36376 */ "V6_vsubububb_sat\0"
9911
  /* 36393 */ "V6_vaddububb_sat\0"
9912
  /* 36410 */ "V6_vpackhb_sat\0"
9913
  /* 36425 */ "V6_vabsb_sat\0"
9914
  /* 36438 */ "V6_vpackhub_sat\0"
9915
  /* 36454 */ "S5_asrhub_sat\0"
9916
  /* 36468 */ "S5_asrhub_rnd_sat\0"
9917
  /* 36486 */ "V6_vabsh_sat\0"
9918
  /* 36499 */ "V6_vpackwuh_sat\0"
9919
  /* 36515 */ "V6_vpackwh_sat\0"
9920
  /* 36530 */ "A4_round_ri_sat\0"
9921
  /* 36546 */ "V6_vwhist256q_sat\0"
9922
  /* 36564 */ "S2_asl_i_r_sat\0"
9923
  /* 36579 */ "S2_asl_r_r_sat\0"
9924
  /* 36594 */ "S2_asr_r_r_sat\0"
9925
  /* 36609 */ "A4_round_rr_sat\0"
9926
  /* 36625 */ "V6_vabsw_sat\0"
9927
  /* 36638 */ "V6_vsubbsat\0"
9928
  /* 36650 */ "V6_vaddbsat\0"
9929
  /* 36662 */ "V6_vasrhbsat\0"
9930
  /* 36675 */ "V6_vsububsat\0"
9931
  /* 36688 */ "V6_vaddubsat\0"
9932
  /* 36701 */ "V6_vasrhubsat\0"
9933
  /* 36715 */ "V6_vasruhubsat\0"
9934
  /* 36730 */ "V6_vasrvuhubsat\0"
9935
  /* 36746 */ "dep_A2_subsat\0"
9936
  /* 36760 */ "dep_A2_addsat\0"
9937
  /* 36774 */ "V6_vasrhbrndsat\0"
9938
  /* 36790 */ "V6_vasrhubrndsat\0"
9939
  /* 36807 */ "V6_vasruhubrndsat\0"
9940
  /* 36825 */ "V6_vasrvuhubrndsat\0"
9941
  /* 36844 */ "V6_vasrwuhrndsat\0"
9942
  /* 36861 */ "V6_vasruwuhrndsat\0"
9943
  /* 36879 */ "V6_vasrvwuhrndsat\0"
9944
  /* 36897 */ "V6_vasrwhrndsat\0"
9945
  /* 36913 */ "A2_roundsat\0"
9946
  /* 36925 */ "A2_negsat\0"
9947
  /* 36935 */ "V6_vsubhsat\0"
9948
  /* 36947 */ "V6_vaddhsat\0"
9949
  /* 36959 */ "V6_vmpahhsat\0"
9950
  /* 36972 */ "A2_vabshsat\0"
9951
  /* 36984 */ "V6_vsubuhsat\0"
9952
  /* 36997 */ "V6_vadduhsat\0"
9953
  /* 37010 */ "V6_vmpauhuhsat\0"
9954
  /* 37025 */ "V6_vmpsuhuhsat\0"
9955
  /* 37040 */ "V6_vasrwuhsat\0"
9956
  /* 37054 */ "V6_vasruwuhsat\0"
9957
  /* 37069 */ "V6_vasrvwuhsat\0"
9958
  /* 37084 */ "V6_vasrwhsat\0"
9959
  /* 37097 */ "V6_vdmpyhsat\0"
9960
  /* 37110 */ "V6_vdmpyhisat\0"
9961
  /* 37124 */ "V6_vdmpyhsuisat\0"
9962
  /* 37140 */ "A2_addpsat\0"
9963
  /* 37151 */ "A2_abssat\0"
9964
  /* 37161 */ "V6_vdmpyhsusat\0"
9965
  /* 37176 */ "V6_vdmpyhvsat\0"
9966
  /* 37190 */ "V6_vsubwsat\0"
9967
  /* 37202 */ "V6_vaddwsat\0"
9968
  /* 37214 */ "A2_vabswsat\0"
9969
  /* 37226 */ "V6_vsubuwsat\0"
9970
  /* 37239 */ "V6_vadduwsat\0"
9971
  /* 37252 */ "V6_vaddcarrysat\0"
9972
  /* 37268 */ "A4_psxtbt\0"
9973
  /* 37278 */ "A4_pzxtbt\0"
9974
  /* 37288 */ "A2_psubt\0"
9975
  /* 37297 */ "S4_extract\0"
9976
  /* 37308 */ "V6_zextract\0"
9977
  /* 37320 */ "PS_pselect\0"
9978
  /* 37331 */ "PS_vselect\0"
9979
  /* 37342 */ "PS_wselect\0"
9980
  /* 37353 */ "A2_paddt\0"
9981
  /* 37362 */ "A2_pandt\0"
9982
  /* 37371 */ "PS_jmpret\0"
9983
  /* 37381 */ "C2_bitsset\0"
9984
  /* 37392 */ "C4_nbitsset\0"
9985
  /* 37404 */ "A4_cmpbgt\0"
9986
  /* 37414 */ "A4_vcmpbgt\0"
9987
  /* 37425 */ "A4_cmphgt\0"
9988
  /* 37435 */ "A2_vcmphgt\0"
9989
  /* 37446 */ "C2_cmpgt\0"
9990
  /* 37455 */ "F2_dfcmpgt\0"
9991
  /* 37466 */ "F2_sfcmpgt\0"
9992
  /* 37477 */ "A2_vcmpwgt\0"
9993
  /* 37488 */ "Y2_syncht\0"
9994
  /* 37498 */ "A4_paslht\0"
9995
  /* 37508 */ "A4_pasrht\0"
9996
  /* 37518 */ "A4_psxtht\0"
9997
  /* 37528 */ "A4_pzxtht\0"
9998
  /* 37538 */ "Y2_wait\0"
9999
  /* 37546 */ "Y6_dmwait\0"
10000
  /* 37556 */ "A2_paddit\0"
10001
  /* 37566 */ "dup_C2_cmoveit\0"
10002
  /* 37581 */ "A4_bitsplit\0"
10003
  /* 37593 */ "dup_C2_cmovenewit\0"
10004
  /* 37611 */ "V6_v6mpyhubs10_alt\0"
10005
  /* 37630 */ "V6_v6mpyvubs10_alt\0"
10006
  /* 37649 */ "V6_vsubb_alt\0"
10007
  /* 37662 */ "V6_vaddb_alt\0"
10008
  /* 37675 */ "V6_vshuffeb_alt\0"
10009
  /* 37691 */ "V6_vpackeb_alt\0"
10010
  /* 37706 */ "V6_vshufoeb_alt\0"
10011
  /* 37722 */ "V6_vshuffb_alt\0"
10012
  /* 37737 */ "V6_vnavgb_alt\0"
10013
  /* 37751 */ "V6_vavgb_alt\0"
10014
  /* 37764 */ "V6_vmpahb_alt\0"
10015
  /* 37778 */ "V6_vroundhb_alt\0"
10016
  /* 37794 */ "V6_vmpyihb_alt\0"
10017
  /* 37809 */ "V6_vmpauhb_alt\0"
10018
  /* 37824 */ "V6_vdmpyhb_alt\0"
10019
  /* 37839 */ "V6_vtmpyhb_alt\0"
10020
  /* 37854 */ "V6_vunpackb_alt\0"
10021
  /* 37870 */ "V6_vdealb_alt\0"
10022
  /* 37884 */ "V6_vminb_alt\0"
10023
  /* 37897 */ "V6_vshuffob_alt\0"
10024
  /* 37913 */ "V6_vunpackob_alt\0"
10025
  /* 37930 */ "V6_vpackob_alt\0"
10026
  /* 37945 */ "V6_vabsb_alt\0"
10027
  /* 37958 */ "V6_vsb_alt\0"
10028
  /* 37969 */ "V6_vabsdiffub_alt\0"
10029
  /* 37987 */ "V6_vnavgub_alt\0"
10030
  /* 38002 */ "V6_vavgub_alt\0"
10031
  /* 38016 */ "V6_vroundhub_alt\0"
10032
  /* 38033 */ "V6_vsathub_alt\0"
10033
  /* 38048 */ "V6_vrounduhub_alt\0"
10034
  /* 38066 */ "V6_vunpackub_alt\0"
10035
  /* 38083 */ "V6_vminub_alt\0"
10036
  /* 38097 */ "V6_vabsub_alt\0"
10037
  /* 38111 */ "V6_vmpyiwub_alt\0"
10038
  /* 38127 */ "V6_vmaxub_alt\0"
10039
  /* 38141 */ "V6_vrmpyub_alt\0"
10040
  /* 38156 */ "V6_vmpyub_alt\0"
10041
  /* 38170 */ "V6_vmpyiwb_alt\0"
10042
  /* 38185 */ "V6_vmaxb_alt\0"
10043
  /* 38198 */ "V6_vtmpyb_alt\0"
10044
  /* 38212 */ "V6_vzb_alt\0"
10045
  /* 38223 */ "V6_vmpahb_acc_alt\0"
10046
  /* 38241 */ "V6_vmpyihb_acc_alt\0"
10047
  /* 38260 */ "V6_vmpauhb_acc_alt\0"
10048
  /* 38279 */ "V6_vdmpyhb_acc_alt\0"
10049
  /* 38298 */ "V6_vtmpyhb_acc_alt\0"
10050
  /* 38317 */ "V6_vmpyiwub_acc_alt\0"
10051
  /* 38337 */ "V6_vrmpyub_acc_alt\0"
10052
  /* 38356 */ "V6_vmpyub_acc_alt\0"
10053
  /* 38374 */ "V6_vmpyiwb_acc_alt\0"
10054
  /* 38393 */ "V6_vtmpyb_acc_alt\0"
10055
  /* 38411 */ "V6_vaddubh_acc_alt\0"
10056
  /* 38430 */ "V6_vmpyih_acc_alt\0"
10057
  /* 38448 */ "V6_vaslh_acc_alt\0"
10058
  /* 38465 */ "V6_vasrh_acc_alt\0"
10059
  /* 38482 */ "V6_vdsaduh_acc_alt\0"
10060
  /* 38501 */ "V6_vmpyiewuh_acc_alt\0"
10061
  /* 38522 */ "V6_vmpyuh_acc_alt\0"
10062
  /* 38540 */ "V6_vmpyiewh_acc_alt\0"
10063
  /* 38560 */ "V6_vmpyiwh_acc_alt\0"
10064
  /* 38579 */ "V6_vmpyh_acc_alt\0"
10065
  /* 38596 */ "V6_vrsadubi_acc_alt\0"
10066
  /* 38616 */ "V6_vrmpyubi_acc_alt\0"
10067
  /* 38636 */ "V6_vrmpybusi_acc_alt\0"
10068
  /* 38657 */ "V6_vmpabus_acc_alt\0"
10069
  /* 38676 */ "V6_vdmpybus_acc_alt\0"
10070
  /* 38696 */ "V6_vrmpybus_acc_alt\0"
10071
  /* 38716 */ "V6_vtmpybus_acc_alt\0"
10072
  /* 38736 */ "V6_vmpybus_acc_alt\0"
10073
  /* 38755 */ "V6_vmpyhus_acc_alt\0"
10074
  /* 38774 */ "V6_vdmpyhsat_acc_alt\0"
10075
  /* 38795 */ "V6_vmpyhsat_acc_alt\0"
10076
  /* 38815 */ "V6_vdmpyhisat_acc_alt\0"
10077
  /* 38837 */ "V6_vdmpyhsuisat_acc_alt\0"
10078
  /* 38861 */ "V6_vdmpyhsusat_acc_alt\0"
10079
  /* 38884 */ "V6_vdmpyhvsat_acc_alt\0"
10080
  /* 38906 */ "V6_vandqrt_acc_alt\0"
10081
  /* 38925 */ "V6_vandnqrt_acc_alt\0"
10082
  /* 38945 */ "V6_vandvrt_acc_alt\0"
10083
  /* 38964 */ "V6_vrmpybub_rtt_acc_alt\0"
10084
  /* 38988 */ "V6_vrmpyub_rtt_acc_alt\0"
10085
  /* 39011 */ "V6_vmpabuu_acc_alt\0"
10086
  /* 39030 */ "V6_vrmpyubv_acc_alt\0"
10087
  /* 39050 */ "V6_vmpyubv_acc_alt\0"
10088
  /* 39069 */ "V6_vrmpybv_acc_alt\0"
10089
  /* 39088 */ "V6_vmpybv_acc_alt\0"
10090
  /* 39106 */ "V6_vdmpyhb_dv_acc_alt\0"
10091
  /* 39128 */ "V6_vdmpybus_dv_acc_alt\0"
10092
  /* 39151 */ "V6_vmpyuhv_acc_alt\0"
10093
  /* 39170 */ "V6_vmpyhv_acc_alt\0"
10094
  /* 39188 */ "V6_vrmpybusv_acc_alt\0"
10095
  /* 39209 */ "V6_vmpybusv_acc_alt\0"
10096
  /* 39229 */ "V6_vaddhw_acc_alt\0"
10097
  /* 39247 */ "V6_vadduhw_acc_alt\0"
10098
  /* 39266 */ "V6_vaslw_acc_alt\0"
10099
  /* 39283 */ "V6_vasrw_acc_alt\0"
10100
  /* 39300 */ "V6_vmpyowh_rnd_sacc_alt\0"
10101
  /* 39324 */ "V6_vmpyowh_sacc_alt\0"
10102
  /* 39344 */ "V6_vscattermh_add_alt\0"
10103
  /* 39366 */ "V6_vscattermwh_add_alt\0"
10104
  /* 39389 */ "V6_vscattermw_add_alt\0"
10105
  /* 39411 */ "V6_vmpyowh_rnd_alt\0"
10106
  /* 39430 */ "V6_vavgbrnd_alt\0"
10107
  /* 39446 */ "V6_vavgubrnd_alt\0"
10108
  /* 39463 */ "V6_vavghrnd_alt\0"
10109
  /* 39479 */ "V6_vavguhrnd_alt\0"
10110
  /* 39496 */ "V6_vavgwrnd_alt\0"
10111
  /* 39512 */ "V6_vavguwrnd_alt\0"
10112
  /* 39529 */ "V6_vcl0h_alt\0"
10113
  /* 39542 */ "V6_vsububh_alt\0"
10114
  /* 39557 */ "V6_vaddubh_alt\0"
10115
  /* 39572 */ "V6_vsubh_alt\0"
10116
  /* 39585 */ "V6_vaddh_alt\0"
10117
  /* 39598 */ "V6_vshufeh_alt\0"
10118
  /* 39613 */ "V6_vpackeh_alt\0"
10119
  /* 39628 */ "V6_vshufoeh_alt\0"
10120
  /* 39644 */ "V6_vabsdiffh_alt\0"
10121
  /* 39661 */ "V6_vshuffh_alt\0"
10122
  /* 39676 */ "V6_vnavgh_alt\0"
10123
  /* 39690 */ "V6_vavgh_alt\0"
10124
  /* 39703 */ "V6_vmpyih_alt\0"
10125
  /* 39717 */ "V6_vunpackh_alt\0"
10126
  /* 39733 */ "V6_vdealh_alt\0"
10127
  /* 39747 */ "V6_vaslh_alt\0"
10128
  /* 39760 */ "V6_vscattermh_alt\0"
10129
  /* 39778 */ "V6_vminh_alt\0"
10130
  /* 39791 */ "V6_vshufoh_alt\0"
10131
  /* 39806 */ "V6_vunpackoh_alt\0"
10132
  /* 39823 */ "V6_vpackoh_alt\0"
10133
  /* 39838 */ "V6_vasrh_alt\0"
10134
  /* 39851 */ "V6_vlsrh_alt\0"
10135
  /* 39864 */ "V6_vabsh_alt\0"
10136
  /* 39877 */ "V6_vsh_alt\0"
10137
  /* 39888 */ "V6_vnormamth_alt\0"
10138
  /* 39905 */ "V6_vpopcounth_alt\0"
10139
  /* 39923 */ "V6_vdsaduh_alt\0"
10140
  /* 39938 */ "V6_vabsdiffuh_alt\0"
10141
  /* 39956 */ "V6_vavguh_alt\0"
10142
  /* 39970 */ "V6_vunpackuh_alt\0"
10143
  /* 39987 */ "V6_vminuh_alt\0"
10144
  /* 40001 */ "V6_vabsuh_alt\0"
10145
  /* 40015 */ "V6_vroundwuh_alt\0"
10146
  /* 40032 */ "V6_vmpyiewuh_alt\0"
10147
  /* 40049 */ "V6_vmpyewuh_alt\0"
10148
  /* 40065 */ "V6_vrounduwuh_alt\0"
10149
  /* 40083 */ "V6_vsatuwuh_alt\0"
10150
  /* 40099 */ "V6_vmaxuh_alt\0"
10151
  /* 40113 */ "V6_vmpyuh_alt\0"
10152
  /* 40127 */ "V6_vroundwh_alt\0"
10153
  /* 40143 */ "V6_vmpyiwh_alt\0"
10154
  /* 40158 */ "V6_vscattermwh_alt\0"
10155
  /* 40177 */ "V6_vmpyiowh_alt\0"
10156
  /* 40193 */ "V6_vmpyowh_alt\0"
10157
  /* 40208 */ "V6_vsatwh_alt\0"
10158
  /* 40222 */ "V6_vmaxh_alt\0"
10159
  /* 40235 */ "V6_vmpyh_alt\0"
10160
  /* 40248 */ "V6_vzh_alt\0"
10161
  /* 40259 */ "V6_vrsadubi_alt\0"
10162
  /* 40275 */ "V6_vrmpyubi_alt\0"
10163
  /* 40291 */ "V6_vrmpybusi_alt\0"
10164
  /* 40308 */ "V6_vasr_into_alt\0"
10165
  /* 40325 */ "V6_vsubbq_alt\0"
10166
  /* 40339 */ "V6_vaddbq_alt\0"
10167
  /* 40353 */ "V6_vsubhq_alt\0"
10168
  /* 40367 */ "V6_vaddhq_alt\0"
10169
  /* 40381 */ "V6_vscattermhq_alt\0"
10170
  /* 40400 */ "V6_vscattermwhq_alt\0"
10171
  /* 40420 */ "V6_vsubbnq_alt\0"
10172
  /* 40435 */ "V6_vaddbnq_alt\0"
10173
  /* 40450 */ "V6_vsubhnq_alt\0"
10174
  /* 40465 */ "V6_vaddhnq_alt\0"
10175
  /* 40480 */ "V6_vsubwnq_alt\0"
10176
  /* 40495 */ "V6_vaddwnq_alt\0"
10177
  /* 40510 */ "V6_vsubwq_alt\0"
10178
  /* 40524 */ "V6_vaddwq_alt\0"
10179
  /* 40538 */ "V6_vscattermwq_alt\0"
10180
  /* 40557 */ "V6_vrotr_alt\0"
10181
  /* 40570 */ "V6_vmpyhsrs_alt\0"
10182
  /* 40586 */ "V6_vmpyhvsrs_alt\0"
10183
  /* 40603 */ "V6_vmpyhss_alt\0"
10184
  /* 40618 */ "V6_vmpabus_alt\0"
10185
  /* 40633 */ "V6_vdmpybus_alt\0"
10186
  /* 40649 */ "V6_vrmpybus_alt\0"
10187
  /* 40665 */ "V6_vtmpybus_alt\0"
10188
  /* 40681 */ "V6_vmpybus_alt\0"
10189
  /* 40696 */ "V6_vmpyhus_alt\0"
10190
  /* 40711 */ "V6_vpackhb_sat_alt\0"
10191
  /* 40730 */ "V6_vabsb_sat_alt\0"
10192
  /* 40747 */ "V6_vpackhub_sat_alt\0"
10193
  /* 40767 */ "V6_vabsh_sat_alt\0"
10194
  /* 40784 */ "V6_vpackwuh_sat_alt\0"
10195
  /* 40804 */ "V6_vpackwh_sat_alt\0"
10196
  /* 40823 */ "V6_vabsw_sat_alt\0"
10197
  /* 40840 */ "V6_vsubbsat_alt\0"
10198
  /* 40856 */ "V6_vaddbsat_alt\0"
10199
  /* 40872 */ "V6_vsububsat_alt\0"
10200
  /* 40889 */ "V6_vaddubsat_alt\0"
10201
  /* 40906 */ "V6_vsubhsat_alt\0"
10202
  /* 40922 */ "V6_vaddhsat_alt\0"
10203
  /* 40938 */ "V6_vsubuhsat_alt\0"
10204
  /* 40955 */ "V6_vadduhsat_alt\0"
10205
  /* 40972 */ "V6_vdmpyhsat_alt\0"
10206
  /* 40989 */ "V6_vdmpyhisat_alt\0"
10207
  /* 41007 */ "V6_vdmpyhsuisat_alt\0"
10208
  /* 41027 */ "V6_vdmpyhsusat_alt\0"
10209
  /* 41046 */ "V6_vdmpyhvsat_alt\0"
10210
  /* 41064 */ "V6_vsubwsat_alt\0"
10211
  /* 41080 */ "V6_vaddwsat_alt\0"
10212
  /* 41096 */ "V6_vsubuwsat_alt\0"
10213
  /* 41113 */ "V6_vadduwsat_alt\0"
10214
  /* 41130 */ "V6_vandqrt_alt\0"
10215
  /* 41145 */ "V6_vandnqrt_alt\0"
10216
  /* 41161 */ "V6_vandvrt_alt\0"
10217
  /* 41176 */ "V6_vrmpybub_rtt_alt\0"
10218
  /* 41196 */ "V6_vrmpyub_rtt_alt\0"
10219
  /* 41215 */ "V6_vmpabuu_alt\0"
10220
  /* 41230 */ "V6_vrmpyubv_alt\0"
10221
  /* 41246 */ "V6_vmpyubv_alt\0"
10222
  /* 41261 */ "V6_vrmpybv_alt\0"
10223
  /* 41276 */ "V6_vmpybv_alt\0"
10224
  /* 41290 */ "V6_vsubb_dv_alt\0"
10225
  /* 41306 */ "V6_vaddb_dv_alt\0"
10226
  /* 41322 */ "V6_vdmpyhb_dv_alt\0"
10227
  /* 41340 */ "V6_vsubh_dv_alt\0"
10228
  /* 41356 */ "V6_vaddh_dv_alt\0"
10229
  /* 41372 */ "V6_vdmpybus_dv_alt\0"
10230
  /* 41391 */ "V6_vsubbsat_dv_alt\0"
10231
  /* 41410 */ "V6_vaddbsat_dv_alt\0"
10232
  /* 41429 */ "V6_vsububsat_dv_alt\0"
10233
  /* 41449 */ "V6_vaddubsat_dv_alt\0"
10234
  /* 41469 */ "V6_vsubhsat_dv_alt\0"
10235
  /* 41488 */ "V6_vaddhsat_dv_alt\0"
10236
  /* 41507 */ "V6_vsubuhsat_dv_alt\0"
10237
  /* 41527 */ "V6_vadduhsat_dv_alt\0"
10238
  /* 41547 */ "V6_vsubwsat_dv_alt\0"
10239
  /* 41566 */ "V6_vaddwsat_dv_alt\0"
10240
  /* 41585 */ "V6_vsubuwsat_dv_alt\0"
10241
  /* 41605 */ "V6_vadduwsat_dv_alt\0"
10242
  /* 41625 */ "V6_vsubw_dv_alt\0"
10243
  /* 41641 */ "V6_vaddw_dv_alt\0"
10244
  /* 41657 */ "V6_vaslhv_alt\0"
10245
  /* 41671 */ "V6_vasrhv_alt\0"
10246
  /* 41685 */ "V6_vlsrhv_alt\0"
10247
  /* 41699 */ "V6_vmpyuhv_alt\0"
10248
  /* 41714 */ "V6_vmpyhv_alt\0"
10249
  /* 41728 */ "V6_vmpabusv_alt\0"
10250
  /* 41744 */ "V6_vrmpybusv_alt\0"
10251
  /* 41761 */ "V6_vmpybusv_alt\0"
10252
  /* 41777 */ "V6_vmpabuuv_alt\0"
10253
  /* 41793 */ "V6_vaslwv_alt\0"
10254
  /* 41807 */ "V6_vasrwv_alt\0"
10255
  /* 41821 */ "V6_vlsrwv_alt\0"
10256
  /* 41835 */ "V6_vcl0w_alt\0"
10257
  /* 41848 */ "V6_vdealb4w_alt\0"
10258
  /* 41864 */ "V6_vsubw_alt\0"
10259
  /* 41877 */ "V6_vaddw_alt\0"
10260
  /* 41890 */ "V6_vabsdiffw_alt\0"
10261
  /* 41907 */ "V6_vnavgw_alt\0"
10262
  /* 41921 */ "V6_vavgw_alt\0"
10263
  /* 41934 */ "V6_vsubhw_alt\0"
10264
  /* 41948 */ "V6_vaddhw_alt\0"
10265
  /* 41962 */ "V6_vsubuhw_alt\0"
10266
  /* 41977 */ "V6_vadduhw_alt\0"
10267
  /* 41992 */ "V6_vaslw_alt\0"
10268
  /* 42005 */ "V6_vscattermw_alt\0"
10269
  /* 42023 */ "V6_vminw_alt\0"
10270
  /* 42036 */ "V6_vasrw_alt\0"
10271
  /* 42049 */ "V6_vlsrw_alt\0"
10272
  /* 42062 */ "V6_vabsw_alt\0"
10273
  /* 42075 */ "V6_extractw_alt\0"
10274
  /* 42091 */ "V6_vnormamtw_alt\0"
10275
  /* 42108 */ "V6_vavguw_alt\0"
10276
  /* 42122 */ "V6_vabsuw_alt\0"
10277
  /* 42136 */ "V6_vmaxw_alt\0"
10278
  /* 42149 */ "J2_callt\0"
10279
  /* 42158 */ "C2_cmplt\0"
10280
  /* 42167 */ "J4_tstbit0_fp0_jump_nt\0"
10281
  /* 42190 */ "J4_cmpeqn1_fp0_jump_nt\0"
10282
  /* 42213 */ "J4_cmpgtn1_fp0_jump_nt\0"
10283
  /* 42236 */ "J4_cmpeqi_fp0_jump_nt\0"
10284
  /* 42258 */ "J4_cmpgti_fp0_jump_nt\0"
10285
  /* 42280 */ "J4_cmpgtui_fp0_jump_nt\0"
10286
  /* 42303 */ "J4_cmpeq_fp0_jump_nt\0"
10287
  /* 42324 */ "J4_cmpgt_fp0_jump_nt\0"
10288
  /* 42345 */ "J4_cmpgtu_fp0_jump_nt\0"
10289
  /* 42367 */ "J4_tstbit0_tp0_jump_nt\0"
10290
  /* 42390 */ "J4_cmpeqn1_tp0_jump_nt\0"
10291
  /* 42413 */ "J4_cmpgtn1_tp0_jump_nt\0"
10292
  /* 42436 */ "J4_cmpeqi_tp0_jump_nt\0"
10293
  /* 42458 */ "J4_cmpgti_tp0_jump_nt\0"
10294
  /* 42480 */ "J4_cmpgtui_tp0_jump_nt\0"
10295
  /* 42503 */ "J4_cmpeq_tp0_jump_nt\0"
10296
  /* 42524 */ "J4_cmpgt_tp0_jump_nt\0"
10297
  /* 42545 */ "J4_cmpgtu_tp0_jump_nt\0"
10298
  /* 42567 */ "J4_tstbit0_fp1_jump_nt\0"
10299
  /* 42590 */ "J4_cmpeqn1_fp1_jump_nt\0"
10300
  /* 42613 */ "J4_cmpgtn1_fp1_jump_nt\0"
10301
  /* 42636 */ "J4_cmpeqi_fp1_jump_nt\0"
10302
  /* 42658 */ "J4_cmpgti_fp1_jump_nt\0"
10303
  /* 42680 */ "J4_cmpgtui_fp1_jump_nt\0"
10304
  /* 42703 */ "J4_cmpeq_fp1_jump_nt\0"
10305
  /* 42724 */ "J4_cmpgt_fp1_jump_nt\0"
10306
  /* 42745 */ "J4_cmpgtu_fp1_jump_nt\0"
10307
  /* 42767 */ "J4_tstbit0_tp1_jump_nt\0"
10308
  /* 42790 */ "J4_cmpeqn1_tp1_jump_nt\0"
10309
  /* 42813 */ "J4_cmpgtn1_tp1_jump_nt\0"
10310
  /* 42836 */ "J4_cmpeqi_tp1_jump_nt\0"
10311
  /* 42858 */ "J4_cmpgti_tp1_jump_nt\0"
10312
  /* 42880 */ "J4_cmpgtui_tp1_jump_nt\0"
10313
  /* 42903 */ "J4_cmpeq_tp1_jump_nt\0"
10314
  /* 42924 */ "J4_cmpgt_tp1_jump_nt\0"
10315
  /* 42945 */ "J4_cmpgtu_tp1_jump_nt\0"
10316
  /* 42967 */ "J4_tstbit0_f_jumpnv_nt\0"
10317
  /* 42990 */ "J4_cmpeqn1_f_jumpnv_nt\0"
10318
  /* 43013 */ "J4_cmpgtn1_f_jumpnv_nt\0"
10319
  /* 43036 */ "J4_cmpeqi_f_jumpnv_nt\0"
10320
  /* 43058 */ "J4_cmpgti_f_jumpnv_nt\0"
10321
  /* 43080 */ "J4_cmpgtui_f_jumpnv_nt\0"
10322
  /* 43103 */ "J4_cmpeq_f_jumpnv_nt\0"
10323
  /* 43124 */ "J4_cmpgt_f_jumpnv_nt\0"
10324
  /* 43145 */ "J4_cmplt_f_jumpnv_nt\0"
10325
  /* 43166 */ "J4_cmpgtu_f_jumpnv_nt\0"
10326
  /* 43188 */ "J4_cmpltu_f_jumpnv_nt\0"
10327
  /* 43210 */ "J4_tstbit0_t_jumpnv_nt\0"
10328
  /* 43233 */ "J4_cmpeqn1_t_jumpnv_nt\0"
10329
  /* 43256 */ "J4_cmpgtn1_t_jumpnv_nt\0"
10330
  /* 43279 */ "J4_cmpeqi_t_jumpnv_nt\0"
10331
  /* 43301 */ "J4_cmpgti_t_jumpnv_nt\0"
10332
  /* 43323 */ "J4_cmpgtui_t_jumpnv_nt\0"
10333
  /* 43346 */ "J4_cmpeq_t_jumpnv_nt\0"
10334
  /* 43367 */ "J4_cmpgt_t_jumpnv_nt\0"
10335
  /* 43388 */ "J4_cmplt_t_jumpnv_nt\0"
10336
  /* 43409 */ "J4_cmpgtu_t_jumpnv_nt\0"
10337
  /* 43431 */ "J4_cmpltu_t_jumpnv_nt\0"
10338
  /* 43453 */ "L4_return_fnew_pnt\0"
10339
  /* 43472 */ "L4_return_map_to_raw_fnew_pnt\0"
10340
  /* 43502 */ "L4_return_tnew_pnt\0"
10341
  /* 43521 */ "L4_return_map_to_raw_tnew_pnt\0"
10342
  /* 43551 */ "A2_not\0"
10343
  /* 43558 */ "C2_not\0"
10344
  /* 43565 */ "C4_fastcorner9_not\0"
10345
  /* 43584 */ "V6_pred_not\0"
10346
  /* 43596 */ "V6_vnot\0"
10347
  /* 43604 */ "L4_return_fnew_pt\0"
10348
  /* 43622 */ "L4_return_map_to_raw_fnew_pt\0"
10349
  /* 43651 */ "L4_return_tnew_pt\0"
10350
  /* 43669 */ "L4_return_map_to_raw_tnew_pt\0"
10351
  /* 43698 */ "J2_jumpfpt\0"
10352
  /* 43709 */ "J2_jumprfpt\0"
10353
  /* 43721 */ "J2_jumpt\0"
10354
  /* 43730 */ "A2_tfrpt\0"
10355
  /* 43739 */ "J2_jumptpt\0"
10356
  /* 43750 */ "J2_jumprtpt\0"
10357
  /* 43762 */ "J2_jumpfnewpt\0"
10358
  /* 43776 */ "J2_jumprfnewpt\0"
10359
  /* 43791 */ "PS_jmpretfnewpt\0"
10360
  /* 43807 */ "J2_jumptnewpt\0"
10361
  /* 43821 */ "J2_jumprtnewpt\0"
10362
  /* 43836 */ "PS_jmprettnewpt\0"
10363
  /* 43852 */ "J2_jumprgtezpt\0"
10364
  /* 43867 */ "J2_jumprltezpt\0"
10365
  /* 43882 */ "J2_jumprnzpt\0"
10366
  /* 43895 */ "J2_jumprzpt\0"
10367
  /* 43907 */ "V6_vrmpyzbb_rt\0"
10368
  /* 43922 */ "V6_vrmpyzcb_rt\0"
10369
  /* 43937 */ "V6_vrmpyznb_rt\0"
10370
  /* 43952 */ "V6_vrmpyzbub_rt\0"
10371
  /* 43968 */ "V6_vrmpyzcbs_rt\0"
10372
  /* 43984 */ "Y2_start\0"
10373
  /* 43993 */ "Y6_dmstart\0"
10374
  /* 44004 */ "S2_insert\0"
10375
  /* 44014 */ "A2_tfrt\0"
10376
  /* 44022 */ "SA1_clrt\0"
10377
  /* 44031 */ "J2_callrt\0"
10378
  /* 44041 */ "A2_port\0"
10379
  /* 44049 */ "A2_pxort\0"
10380
  /* 44058 */ "J2_jumprt\0"
10381
  /* 44068 */ "V6_vandqrt\0"
10382
  /* 44079 */ "V6_vandnqrt\0"
10383
  /* 44091 */ "V6_vandvrt\0"
10384
  /* 44102 */ "V6_vhist\0"
10385
  /* 44111 */ "A2_iconst\0"
10386
  /* 44121 */ "PS_jmprett\0"
10387
  /* 44132 */ "V6_vrmpybub_rtt\0"
10388
  /* 44148 */ "V6_vrmpyub_rtt\0"
10389
  /* 44163 */ "C2_ccombinewt\0"
10390
  /* 44177 */ "C2_ccombinewnewt\0"
10391
  /* 44194 */ "TFRI64_V2_ext\0"
10392
  /* 44208 */ "A4_ext\0"
10393
  /* 44215 */ "J2_loop0iext\0"
10394
  /* 44228 */ "J2_loop1iext\0"
10395
  /* 44241 */ "J2_loop0rext\0"
10396
  /* 44254 */ "J2_loop1rext\0"
10397
  /* 44267 */ "C4_cmplteu\0"
10398
  /* 44278 */ "A2_minu\0"
10399
  /* 44286 */ "A4_modwrapu\0"
10400
  /* 44298 */ "V6_vL32b_ppu\0"
10401
  /* 44311 */ "V6_vS32b_ppu\0"
10402
  /* 44324 */ "V6_vL32Ub_ppu\0"
10403
  /* 44338 */ "V6_vS32Ub_ppu\0"
10404
  /* 44352 */ "V6_zLd_ppu\0"
10405
  /* 44363 */ "V6_vL32b_pred_ppu\0"
10406
  /* 44381 */ "V6_vS32b_pred_ppu\0"
10407
  /* 44399 */ "V6_vS32Ub_pred_ppu\0"
10408
  /* 44418 */ "V6_zLd_pred_ppu\0"
10409
  /* 44434 */ "V6_vL32b_tmp_pred_ppu\0"
10410
  /* 44456 */ "V6_vL32b_nt_tmp_pred_ppu\0"
10411
  /* 44481 */ "V6_vL32b_cur_pred_ppu\0"
10412
  /* 44503 */ "V6_vL32b_nt_cur_pred_ppu\0"
10413
  /* 44528 */ "V6_vL32b_nt_pred_ppu\0"
10414
  /* 44549 */ "V6_vS32b_nt_pred_ppu\0"
10415
  /* 44570 */ "V6_vS32b_new_pred_ppu\0"
10416
  /* 44592 */ "V6_vS32b_nt_new_pred_ppu\0"
10417
  /* 44617 */ "V6_vL32b_npred_ppu\0"
10418
  /* 44636 */ "V6_vS32b_npred_ppu\0"
10419
  /* 44655 */ "V6_vS32Ub_npred_ppu\0"
10420
  /* 44675 */ "V6_vL32b_tmp_npred_ppu\0"
10421
  /* 44698 */ "V6_vL32b_nt_tmp_npred_ppu\0"
10422
  /* 44724 */ "V6_vL32b_cur_npred_ppu\0"
10423
  /* 44747 */ "V6_vL32b_nt_cur_npred_ppu\0"
10424
  /* 44773 */ "V6_vL32b_nt_npred_ppu\0"
10425
  /* 44795 */ "V6_vS32b_nt_npred_ppu\0"
10426
  /* 44817 */ "V6_vS32b_new_npred_ppu\0"
10427
  /* 44840 */ "V6_vS32b_nt_new_npred_ppu\0"
10428
  /* 44866 */ "V6_vS32b_qpred_ppu\0"
10429
  /* 44885 */ "V6_vS32b_nt_qpred_ppu\0"
10430
  /* 44907 */ "V6_vS32b_nqpred_ppu\0"
10431
  /* 44927 */ "V6_vS32b_nt_nqpred_ppu\0"
10432
  /* 44950 */ "V6_vL32b_tmp_ppu\0"
10433
  /* 44967 */ "V6_vL32b_nt_tmp_ppu\0"
10434
  /* 44987 */ "V6_vL32b_cur_ppu\0"
10435
  /* 45004 */ "V6_vL32b_nt_cur_ppu\0"
10436
  /* 45024 */ "V6_vS32b_srls_ppu\0"
10437
  /* 45042 */ "V6_vL32b_nt_ppu\0"
10438
  /* 45058 */ "V6_vS32b_nt_ppu\0"
10439
  /* 45074 */ "V6_vS32b_new_ppu\0"
10440
  /* 45091 */ "V6_vS32b_nt_new_ppu\0"
10441
  /* 45111 */ "M5_vdmacbsu\0"
10442
  /* 45123 */ "M5_vrmacbsu\0"
10443
  /* 45135 */ "M5_vmacbsu\0"
10444
  /* 45146 */ "M5_vdmpybsu\0"
10445
  /* 45158 */ "M5_vrmpybsu\0"
10446
  /* 45170 */ "M5_vmpybsu\0"
10447
  /* 45181 */ "S2_extractu\0"
10448
  /* 45193 */ "A4_cmpbgtu\0"
10449
  /* 45204 */ "A2_vcmpbgtu\0"
10450
  /* 45216 */ "A4_cmphgtu\0"
10451
  /* 45227 */ "A2_vcmphgtu\0"
10452
  /* 45239 */ "C2_cmpgtu\0"
10453
  /* 45249 */ "A2_vcmpwgtu\0"
10454
  /* 45261 */ "C2_cmpltu\0"
10455
  /* 45271 */ "V6_vmpabuu\0"
10456
  /* 45282 */ "M5_vrmacbuu\0"
10457
  /* 45294 */ "M5_vmacbuu\0"
10458
  /* 45305 */ "M5_vrmpybuu\0"
10459
  /* 45317 */ "M5_vmpybuu\0"
10460
  /* 45328 */ "A2_maxu\0"
10461
  /* 45336 */ "V6_vrmpyubv\0"
10462
  /* 45348 */ "V6_vmpyubv\0"
10463
  /* 45359 */ "V6_vrmpybv\0"
10464
  /* 45370 */ "V6_vmpybv\0"
10465
  /* 45380 */ "V6_vsubb_dv\0"
10466
  /* 45392 */ "V6_vaddb_dv\0"
10467
  /* 45404 */ "V6_vdmpyhb_dv\0"
10468
  /* 45418 */ "V6_vsubh_dv\0"
10469
  /* 45430 */ "V6_vaddh_dv\0"
10470
  /* 45442 */ "V6_vdmpybus_dv\0"
10471
  /* 45457 */ "V6_vsubbsat_dv\0"
10472
  /* 45472 */ "V6_vaddbsat_dv\0"
10473
  /* 45487 */ "V6_vsububsat_dv\0"
10474
  /* 45503 */ "V6_vaddubsat_dv\0"
10475
  /* 45519 */ "V6_vsubhsat_dv\0"
10476
  /* 45534 */ "V6_vaddhsat_dv\0"
10477
  /* 45549 */ "V6_vsubuhsat_dv\0"
10478
  /* 45565 */ "V6_vadduhsat_dv\0"
10479
  /* 45581 */ "V6_vsubwsat_dv\0"
10480
  /* 45596 */ "V6_vaddwsat_dv\0"
10481
  /* 45611 */ "V6_vsubuwsat_dv\0"
10482
  /* 45627 */ "V6_vadduwsat_dv\0"
10483
  /* 45643 */ "V6_vsubw_dv\0"
10484
  /* 45655 */ "V6_vaddw_dv\0"
10485
  /* 45667 */ "S2_brev\0"
10486
  /* 45675 */ "V6_vaslhv\0"
10487
  /* 45685 */ "V6_vasrhv\0"
10488
  /* 45695 */ "V6_vlsrhv\0"
10489
  /* 45705 */ "V6_vmpyuhv\0"
10490
  /* 45716 */ "V6_vmpyhv\0"
10491
  /* 45726 */ "Y5_l2gcleaninv\0"
10492
  /* 45741 */ "V6_vncmov\0"
10493
  /* 45751 */ "V6_vcmov\0"
10494
  /* 45760 */ "V6_vandvnqv\0"
10495
  /* 45772 */ "V6_vandvqv\0"
10496
  /* 45783 */ "V6_vmpabusv\0"
10497
  /* 45795 */ "V6_vrmpybusv\0"
10498
  /* 45808 */ "V6_vmpybusv\0"
10499
  /* 45820 */ "V6_vmpabuuv\0"
10500
  /* 45832 */ "V6_vaslwv\0"
10501
  /* 45842 */ "V6_vasrwv\0"
10502
  /* 45852 */ "V6_vlsrwv\0"
10503
  /* 45862 */ "V6_vcl0w\0"
10504
  /* 45871 */ "F2_conv_df2w\0"
10505
  /* 45884 */ "F2_conv_sf2w\0"
10506
  /* 45897 */ "V6_vdealb4w\0"
10507
  /* 45909 */ "V6_vconv_sf_w\0"
10508
  /* 45923 */ "S6_allocframe_to_raw\0"
10509
  /* 45944 */ "L6_deallocframe_map_to_raw\0"
10510
  /* 45971 */ "L6_return_map_to_raw\0"
10511
  /* 45992 */ "Y2_icdataw\0"
10512
  /* 46003 */ "V6_vaddclbw\0"
10513
  /* 46015 */ "Y2_tlbw\0"
10514
  /* 46023 */ "Y5_ctlbw\0"
10515
  /* 46032 */ "S4_vxaddsubw\0"
10516
  /* 46045 */ "A2_vsubw\0"
10517
  /* 46054 */ "V6_vsubw\0"
10518
  /* 46063 */ "S4_vxsubaddw\0"
10519
  /* 46076 */ "A2_vaddw\0"
10520
  /* 46085 */ "V6_vaddw\0"
10521
  /* 46094 */ "V6_vsatdw\0"
10522
  /* 46104 */ "SL2_jumpr31_fnew\0"
10523
  /* 46121 */ "SL2_return_fnew\0"
10524
  /* 46137 */ "A4_psxtbfnew\0"
10525
  /* 46150 */ "A4_pzxtbfnew\0"
10526
  /* 46163 */ "A2_psubfnew\0"
10527
  /* 46175 */ "A2_paddfnew\0"
10528
  /* 46187 */ "A2_pandfnew\0"
10529
  /* 46199 */ "A4_paslhfnew\0"
10530
  /* 46212 */ "A4_pasrhfnew\0"
10531
  /* 46225 */ "A4_psxthfnew\0"
10532
  /* 46238 */ "A4_pzxthfnew\0"
10533
  /* 46251 */ "A2_paddifnew\0"
10534
  /* 46264 */ "J2_jumpfnew\0"
10535
  /* 46276 */ "A2_tfrpfnew\0"
10536
  /* 46288 */ "A2_tfrfnew\0"
10537
  /* 46299 */ "SA1_clrfnew\0"
10538
  /* 46311 */ "A2_porfnew\0"
10539
  /* 46322 */ "A2_pxorfnew\0"
10540
  /* 46334 */ "J2_jumprfnew\0"
10541
  /* 46347 */ "PS_jmpretfnew\0"
10542
  /* 46361 */ "A2_combinew\0"
10543
  /* 46373 */ "SL2_jumpr31_tnew\0"
10544
  /* 46390 */ "SL2_return_tnew\0"
10545
  /* 46406 */ "A4_psxtbtnew\0"
10546
  /* 46419 */ "A4_pzxtbtnew\0"
10547
  /* 46432 */ "A2_psubtnew\0"
10548
  /* 46444 */ "A2_paddtnew\0"
10549
  /* 46456 */ "A2_pandtnew\0"
10550
  /* 46468 */ "A4_paslhtnew\0"
10551
  /* 46481 */ "A4_pasrhtnew\0"
10552
  /* 46494 */ "A4_psxthtnew\0"
10553
  /* 46507 */ "A4_pzxthtnew\0"
10554
  /* 46520 */ "A2_padditnew\0"
10555
  /* 46533 */ "J2_jumptnew\0"
10556
  /* 46545 */ "A2_tfrptnew\0"
10557
  /* 46557 */ "A2_tfrtnew\0"
10558
  /* 46568 */ "SA1_clrtnew\0"
10559
  /* 46580 */ "A2_portnew\0"
10560
  /* 46591 */ "A2_pxortnew\0"
10561
  /* 46603 */ "J2_jumprtnew\0"
10562
  /* 46616 */ "PS_jmprettnew\0"
10563
  /* 46630 */ "M2_vabsdiffw\0"
10564
  /* 46643 */ "V6_vabsdiffw\0"
10565
  /* 46656 */ "Y4_l2tagw\0"
10566
  /* 46666 */ "Y2_dctagw\0"
10567
  /* 46676 */ "Y2_ictagw\0"
10568
  /* 46686 */ "A2_vnavgw\0"
10569
  /* 46696 */ "V6_vnavgw\0"
10570
  /* 46706 */ "A2_vavgw\0"
10571
  /* 46715 */ "V6_vavgw\0"
10572
  /* 46724 */ "V6_vsubhw\0"
10573
  /* 46734 */ "V6_vaddhw\0"
10574
  /* 46744 */ "V6_vgathermhw\0"
10575
  /* 46758 */ "V6_vscattermhw\0"
10576
  /* 46773 */ "S2_vsxthw\0"
10577
  /* 46783 */ "S2_vzxthw\0"
10578
  /* 46793 */ "V6_vsubuhw\0"
10579
  /* 46804 */ "V6_vadduhw\0"
10580
  /* 46815 */ "PS_vsplatiw\0"
10581
  /* 46827 */ "M7_dcmpyiw\0"
10582
  /* 46838 */ "M7_wcmpyiw\0"
10583
  /* 46849 */ "V6_vaslw\0"
10584
  /* 46858 */ "PS_vmulw\0"
10585
  /* 46867 */ "V6_vgathermw\0"
10586
  /* 46880 */ "V6_vscattermw\0"
10587
  /* 46894 */ "Y2_iassignw\0"
10588
  /* 46906 */ "A4_vrminw\0"
10589
  /* 46916 */ "A2_vminw\0"
10590
  /* 46925 */ "V6_vminw\0"
10591
  /* 46934 */ "V6_shuffeqw\0"
10592
  /* 46946 */ "V6_veqw\0"
10593
  /* 46954 */ "V6_vprefixqw\0"
10594
  /* 46967 */ "V6_vasrw\0"
10595
  /* 46976 */ "V6_vlsrw\0"
10596
  /* 46985 */ "PS_vsplatrw\0"
10597
  /* 46997 */ "M7_dcmpyrw\0"
10598
  /* 47008 */ "M7_wcmpyrw\0"
10599
  /* 47019 */ "A2_vabsw\0"
10600
  /* 47028 */ "V6_vabsw\0"
10601
  /* 47037 */ "V6_lvsplatw\0"
10602
  /* 47049 */ "V6_extractw\0"
10603
  /* 47061 */ "V6_vgtw\0"
10604
  /* 47069 */ "V6_vnormamtw\0"
10605
  /* 47082 */ "A2_sxtw\0"
10606
  /* 47090 */ "F2_conv_df2uw\0"
10607
  /* 47104 */ "F2_conv_sf2uw\0"
10608
  /* 47118 */ "A2_vavguw\0"
10609
  /* 47128 */ "V6_vavguw\0"
10610
  /* 47138 */ "A4_vrminuw\0"
10611
  /* 47149 */ "A2_vminuw\0"
10612
  /* 47159 */ "V6_MAP_equw\0"
10613
  /* 47171 */ "V6_vgtuw\0"
10614
  /* 47180 */ "A4_vrmaxuw\0"
10615
  /* 47191 */ "A2_vmaxuw\0"
10616
  /* 47201 */ "S2_asl_i_vw\0"
10617
  /* 47213 */ "S2_asr_i_vw\0"
10618
  /* 47225 */ "S2_lsr_i_vw\0"
10619
  /* 47237 */ "S2_asl_r_vw\0"
10620
  /* 47249 */ "S2_lsl_r_vw\0"
10621
  /* 47261 */ "S2_asr_r_vw\0"
10622
  /* 47273 */ "S2_lsr_r_vw\0"
10623
  /* 47285 */ "A4_vrmaxw\0"
10624
  /* 47295 */ "A2_vmaxw\0"
10625
  /* 47304 */ "V6_vmaxw\0"
10626
  /* 47313 */ "S2_tableidxw\0"
10627
  /* 47326 */ "M4_pmpyw\0"
10628
  /* 47335 */ "A2_max\0"
10629
  /* 47342 */ "F2_dfmax\0"
10630
  /* 47351 */ "F2_sfmax\0"
10631
  /* 47360 */ "S2_tableidxb_goodsyntax\0"
10632
  /* 47384 */ "S2_asr_i_p_rnd_goodsyntax\0"
10633
  /* 47410 */ "S2_asr_i_r_rnd_goodsyntax\0"
10634
  /* 47436 */ "S5_vasrhrnd_goodsyntax\0"
10635
  /* 47459 */ "S2_tableidxd_goodsyntax\0"
10636
  /* 47483 */ "S2_tableidxh_goodsyntax\0"
10637
  /* 47507 */ "S5_asrhub_rnd_sat_goodsyntax\0"
10638
  /* 47536 */ "S2_tableidxw_goodsyntax\0"
10639
  /* 47560 */ "Y5_l2cleanidx\0"
10640
  /* 47574 */ "Y2_dccleanidx\0"
10641
  /* 47588 */ "Y5_l2invidx\0"
10642
  /* 47600 */ "Y2_dcinvidx\0"
10643
  /* 47612 */ "Y2_icinvidx\0"
10644
  /* 47624 */ "Y2_l2cleaninvidx\0"
10645
  /* 47641 */ "Y2_dccleaninvidx\0"
10646
  /* 47658 */ "S4_or_andix\0"
10647
  /* 47670 */ "F2_dfmpyfix\0"
10648
  /* 47682 */ "V6_vsub_qf32_mix\0"
10649
  /* 47699 */ "V6_vadd_qf32_mix\0"
10650
  /* 47716 */ "V6_vsub_qf16_mix\0"
10651
  /* 47733 */ "V6_vadd_qf16_mix\0"
10652
  /* 47750 */ "V6_vrmpyzbb_rx\0"
10653
  /* 47765 */ "V6_vrmpyzcb_rx\0"
10654
  /* 47780 */ "V6_vrmpyznb_rx\0"
10655
  /* 47795 */ "V6_vrmpyzbub_rx\0"
10656
  /* 47811 */ "V6_vrmpyzcbs_rx\0"
10657
  /* 47827 */ "SA1_addrx\0"
10658
  /* 47837 */ "C2_mux\0"
10659
  /* 47844 */ "C2_vmux\0"
10660
  /* 47852 */ "V6_vmux\0"
10661
  /* 47860 */ "V6_v6mpyhubs10_vxx\0"
10662
  /* 47879 */ "V6_v6mpyvubs10_vxx\0"
10663
  /* 47898 */ "V6_v10mpyubs10_vxx\0"
10664
  /* 47917 */ "A4_vcmpbeq_any\0"
10665
  /* 47932 */ "A6_vcmpbeq_notany\0"
10666
  /* 47950 */ "L6_memcpy\0"
10667
  /* 47960 */ "M7_vdmpy\0"
10668
  /* 47969 */ "F2_sfmpy\0"
10669
  /* 47978 */ "V6_vsubcarry\0"
10670
  /* 47991 */ "V6_vaddcarry\0"
10671
  /* 48004 */ "S4_parity\0"
10672
  /* 48014 */ "J2_jumprgtez\0"
10673
  /* 48027 */ "J2_jumprltez\0"
10674
  /* 48040 */ "A2_swiz\0"
10675
  /* 48048 */ "J2_jumprnz\0"
10676
  /* 48059 */ "SA1_combinerz\0"
10677
  /* 48073 */ "J2_jumprz\0"
10678
};
10679
#ifdef __GNUC__
10680
#pragma GCC diagnostic pop
10681
#endif
10682
10683
extern const unsigned HexagonInstrNameIndices[] = {
10684
    6528U, 6924U, 7520U, 7189U, 6613U, 6594U, 6622U, 6760U, 
10685
    6375U, 6390U, 6327U, 6417U, 7902U, 6203U, 8490U, 6340U, 
10686
    6524U, 6603U, 6002U, 8963U, 6115U, 8394U, 5837U, 5953U, 
10687
    5990U, 7300U, 6748U, 8323U, 5922U, 7441U, 6480U, 8312U, 
10688
    6138U, 7414U, 7401U, 7581U, 8171U, 8194U, 6680U, 6727U, 
10689
    6700U, 6639U, 7546U, 7254U, 8520U, 8550U, 7040U, 5750U, 
10690
    5163U, 6863U, 8712U, 8719U, 6890U, 6897U, 6904U, 6914U, 
10691
    5815U, 7773U, 7736U, 6325U, 6526U, 8886U, 6213U, 6765U, 
10692
    8139U, 7846U, 8431U, 7863U, 7688U, 5517U, 7885U, 8334U, 
10693
    7815U, 8463U, 6250U, 7557U, 5896U, 5491U, 5878U, 8353U, 
10694
    7018U, 7606U, 5651U, 5595U, 5625U, 5636U, 5576U, 5606U, 
10695
    6182U, 6166U, 7932U, 6431U, 6448U, 5766U, 5169U, 5821U, 
10696
    5782U, 7778U, 7742U, 8870U, 7166U, 8853U, 7149U, 5717U, 
10697
    5146U, 8788U, 7084U, 7331U, 7309U, 5982U, 6497U, 5850U, 
10698
    8158U, 8409U, 5469U, 7962U, 8289U, 7989U, 8534U, 5509U, 
10699
    8278U, 8266U, 8384U, 6472U, 8513U, 6404U, 8543U, 6666U, 
10700
    7672U, 7658U, 6659U, 7665U, 7808U, 6781U, 7386U, 7379U, 
10701
    8149U, 7246U, 6023U, 7230U, 5974U, 7238U, 6015U, 7222U, 
10702
    5966U, 7284U, 7276U, 6516U, 6508U, 8057U, 8047U, 8037U, 
10703
    8027U, 8077U, 8067U, 8914U, 8924U, 8087U, 8100U, 8934U, 
10704
    8944U, 8113U, 8126U, 5675U, 5125U, 6805U, 5092U, 5569U, 
10705
    8691U, 6869U, 8764U, 6550U, 7485U, 4654U, 9U, 6465U, 
10706
    4646U, 0U, 7460U, 7492U, 6368U, 8505U, 5481U, 6532U, 
10707
    6541U, 7361U, 7370U, 7826U, 7055U, 7919U, 6259U, 6998U, 
10708
    7008U, 6072U, 6087U, 6955U, 6987U, 8726U, 8752U, 8738U, 
10709
    6031U, 6059U, 6044U, 5756U, 6558U, 7118U, 8822U, 7142U, 
10710
    8846U, 7833U, 5869U, 5859U, 7515U, 8218U, 8246U, 8225U, 
10711
    7703U, 8975U, 6307U, 8968U, 6289U, 7393U, 7353U, 6190U, 
10712
    6672U, 7878U, 7182U, 8440U, 7679U, 8345U, 8371U, 8473U, 
10713
    7533U, 6102U, 5538U, 6228U, 6151U, 5703U, 5132U, 6833U, 
10714
    8698U, 6876U, 5098U, 8448U, 7469U, 7625U, 7641U, 8954U, 
10715
    6122U, 6240U, 8185U, 7292U, 5682U, 6812U, 5658U, 6788U, 
10716
    8771U, 7067U, 6966U, 6934U, 5734U, 6847U, 5799U, 7758U, 
10717
    7720U, 8805U, 7101U, 8829U, 7125U, 8900U, 8907U, 28589U, 
10718
    44111U, 14809U, 43551U, 14437U, 46288U, 28483U, 14428U, 46276U, 
10719
    20510U, 43730U, 46545U, 44014U, 46557U, 25262U, 25249U, 9746U, 
10720
    21414U, 7205U, 7426U, 18293U, 21042U, 42158U, 45261U, 25387U, 
10721
    22433U, 75U, 2534U, 2569U, 277U, 2544U, 2669U, 25275U, 
10722
    25295U, 25336U, 25316U, 25400U, 25490U, 26118U, 25418U, 25454U, 
10723
    25436U, 25472U, 25672U, 25740U, 26300U, 26368U, 25723U, 26351U, 
10724
    25773U, 26767U, 26419U, 27186U, 25848U, 26854U, 26494U, 27273U, 
10725
    25904U, 26919U, 26550U, 27338U, 25979U, 27006U, 26625U, 27425U, 
10726
    25829U, 26832U, 26475U, 27251U, 25960U, 26984U, 26606U, 27403U, 
10727
    25551U, 26179U, 27606U, 25592U, 26220U, 27647U, 25571U, 26199U, 
10728
    27626U, 25612U, 26240U, 27667U, 25652U, 26280U, 27707U, 25530U, 
10729
    26158U, 27585U, 25633U, 26261U, 27688U, 13753U, 43472U, 43622U, 
10730
    36278U, 43521U, 43669U, 25510U, 26138U, 27565U, 45944U, 45971U, 
10731
    33011U, 12567U, 18433U, 21139U, 2717U, 4349U, 28380U, 47960U, 
10732
    12007U, 9044U, 8982U, 22047U, 30521U, 15741U, 13575U, 18314U, 
10733
    8992U, 17796U, 29859U, 17884U, 29947U, 17990U, 30053U, 18078U, 
10734
    30141U, 17855U, 29918U, 18049U, 30112U, 37320U, 13584U, 13675U, 
10735
    17825U, 29888U, 17913U, 29976U, 17943U, 30006U, 18019U, 30082U, 
10736
    18107U, 30170U, 16508U, 29219U, 13667U, 92U, 17295U, 17476U, 
10737
    17406U, 17540U, 17441U, 46858U, 11856U, 37331U, 9460U, 15361U, 
10738
    46815U, 9656U, 15729U, 46985U, 17309U, 17490U, 17423U, 17554U, 
10739
    17458U, 37342U, 47384U, 47410U, 25791U, 26052U, 26681U, 26437U, 
10740
    25866U, 26512U, 25885U, 26531U, 25922U, 26074U, 26703U, 26568U, 
10741
    25997U, 26096U, 26725U, 26643U, 25688U, 26747U, 25756U, 26035U, 
10742
    26316U, 27146U, 26384U, 27166U, 47360U, 47459U, 47483U, 47536U, 
10743
    26788U, 27071U, 27490U, 27207U, 26875U, 27294U, 26897U, 27316U, 
10744
    26940U, 27096U, 27515U, 27359U, 27027U, 27121U, 27540U, 27446U, 
10745
    25705U, 25810U, 26810U, 26456U, 27229U, 26333U, 25941U, 26962U, 
10746
    26587U, 27381U, 26401U, 26016U, 27049U, 26662U, 27468U, 47507U, 
10747
    47436U, 45923U, 33021U, 12578U, 9963U, 12641U, 30989U, 31090U, 
10748
    15986U, 12767U, 31005U, 31205U, 47159U, 13091U, 31021U, 31328U, 
10749
    107U, 2507U, 42075U, 18320U, 100U, 229U, 2403U, 203U, 
10750
    2382U, 239U, 2415U, 2363U, 212U, 2393U, 248U, 2426U, 
10751
    289U, 2449U, 2518U, 24709U, 2500U, 175U, 2372U, 258U, 
10752
    2438U, 315U, 2470U, 2491U, 298U, 2460U, 324U, 2481U, 
10753
    2526U, 267U, 306U, 60U, 47898U, 37611U, 37630U, 37945U, 
10754
    40730U, 39644U, 37969U, 39938U, 41890U, 39864U, 40767U, 38097U, 
10755
    40001U, 42122U, 42062U, 40823U, 37662U, 41306U, 40435U, 40339U, 
10756
    40856U, 41410U, 39585U, 41356U, 40465U, 40367U, 40922U, 41488U, 
10757
    39229U, 41948U, 38411U, 39557U, 40889U, 41449U, 40955U, 41527U, 
10758
    39247U, 41977U, 41113U, 41605U, 41877U, 41641U, 40495U, 40524U, 
10759
    41080U, 41566U, 38925U, 41145U, 38906U, 41130U, 38945U, 41161U, 
10760
    38448U, 39747U, 41657U, 39266U, 41992U, 41793U, 40308U, 38465U, 
10761
    39838U, 41671U, 39283U, 42036U, 41807U, 28115U, 37751U, 39430U, 
10762
    39690U, 39463U, 38002U, 39446U, 39956U, 39479U, 42108U, 39512U, 
10763
    41921U, 39496U, 39529U, 41835U, 126U, 84U, 41848U, 37870U, 
10764
    39733U, 38676U, 40633U, 39128U, 41372U, 38279U, 37824U, 39106U, 
10765
    41322U, 38815U, 40989U, 38774U, 40972U, 38837U, 41007U, 38861U, 
10766
    41027U, 38884U, 41046U, 38482U, 39923U, 22447U, 22467U, 22531U, 
10767
    22488U, 22552U, 22510U, 39851U, 41685U, 42049U, 41821U, 38185U, 
10768
    40222U, 38127U, 40099U, 42136U, 37884U, 39778U, 38083U, 39987U, 
10769
    42023U, 38657U, 40618U, 41728U, 39011U, 41215U, 41777U, 38223U, 
10770
    37764U, 38260U, 37809U, 38736U, 40681U, 39209U, 41761U, 39088U, 
10771
    41276U, 40049U, 38579U, 40235U, 38795U, 40570U, 40603U, 38755U, 
10772
    40696U, 39170U, 41714U, 40586U, 38540U, 38501U, 40032U, 38430U, 
10773
    39703U, 38241U, 37794U, 40177U, 38374U, 38170U, 38560U, 40143U, 
10774
    38317U, 38111U, 40193U, 39411U, 39300U, 39324U, 38356U, 38156U, 
10775
    39050U, 41246U, 38522U, 40113U, 39151U, 41699U, 37737U, 39676U, 
10776
    37987U, 41907U, 39888U, 42091U, 37691U, 39613U, 40711U, 40747U, 
10777
    37930U, 39823U, 40804U, 40784U, 39905U, 38964U, 41176U, 38696U, 
10778
    40649U, 38636U, 40291U, 39188U, 41744U, 39069U, 41261U, 38337U, 
10779
    38141U, 38988U, 41196U, 38616U, 40275U, 39030U, 41230U, 40557U, 
10780
    37778U, 38016U, 38048U, 40065U, 40127U, 40015U, 38596U, 40259U, 
10781
    38033U, 40083U, 40208U, 37958U, 39344U, 39760U, 40381U, 39389U, 
10782
    42005U, 39366U, 40158U, 40400U, 40538U, 39877U, 39598U, 37722U, 
10783
    37675U, 39661U, 37897U, 37706U, 39628U, 39791U, 37649U, 41290U, 
10784
    40420U, 40325U, 40840U, 41391U, 39572U, 41340U, 40450U, 40353U, 
10785
    40906U, 41469U, 41934U, 39542U, 40872U, 41429U, 40938U, 41507U, 
10786
    41962U, 41096U, 41585U, 41864U, 41625U, 40480U, 40510U, 41064U, 
10787
    41547U, 38393U, 38198U, 38716U, 40665U, 38298U, 37839U, 25233U, 
10788
    37854U, 39717U, 37913U, 39806U, 38066U, 39970U, 38212U, 40248U, 
10789
    118U, 220U, 12589U, 15035U, 25357U, 25371U, 12392U, 18185U, 
10790
    30442U, 18375U, 9721U, 15839U, 30341U, 20914U, 9742U, 15860U, 
10791
    18392U, 30455U, 20802U, 14377U, 37566U, 14392U, 37593U, 20599U, 
10792
    13494U, 22815U, 22902U, 23411U, 23508U, 22884U, 23476U, 13459U, 
10793
    22832U, 22919U, 23428U, 23525U, 22850U, 23543U, 33406U, 28571U, 
10794
    37151U, 12396U, 15274U, 21628U, 15410U, 21801U, 15322U, 21706U, 
10795
    15458U, 21879U, 21658U, 21831U, 21744U, 21917U, 18189U, 27805U, 
10796
    37140U, 36764U, 15628U, 21995U, 12603U, 30446U, 27813U, 15487U, 
10797
    15691U, 15289U, 21673U, 15425U, 21846U, 18379U, 46361U, 47335U, 
10798
    28744U, 45328U, 28726U, 22271U, 28127U, 44278U, 28693U, 27898U, 
10799
    36925U, 28291U, 28641U, 30556U, 30472U, 28491U, 13946U, 46175U, 
10800
    14367U, 46251U, 37556U, 46520U, 37353U, 46444U, 13955U, 46187U, 
10801
    37362U, 46456U, 14464U, 46311U, 44041U, 46580U, 13869U, 46163U, 
10802
    37288U, 46432U, 14472U, 46322U, 44049U, 46591U, 36913U, 36352U, 
10803
    9696U, 15787U, 10000U, 15998U, 9975U, 15259U, 21613U, 15395U, 
10804
    21786U, 15303U, 21687U, 15439U, 21860U, 21643U, 21816U, 21725U, 
10805
    21898U, 27765U, 20793U, 36750U, 15087U, 34746U, 34802U, 15249U, 
10806
    34757U, 15220U, 14991U, 34725U, 34779U, 48040U, 9725U, 15843U, 
10807
    47082U, 30345U, 32954U, 15352U, 21777U, 30250U, 20918U, 15750U, 
10808
    36972U, 47019U, 37214U, 15069U, 34736U, 9800U, 34681U, 34791U, 
10809
    46076U, 34987U, 15231U, 29752U, 30421U, 9849U, 29729U, 15922U, 
10810
    30431U, 47118U, 33381U, 46706U, 30283U, 33358U, 28845U, 45204U, 
10811
    28866U, 37435U, 45227U, 28939U, 37477U, 45249U, 21281U, 10093U, 
10812
    16375U, 10030U, 16102U, 47191U, 47295U, 9524U, 15552U, 9943U, 
10813
    15966U, 47149U, 46916U, 15200U, 29740U, 30410U, 46686U, 30271U, 
10814
    33347U, 9789U, 10568U, 9778U, 10553U, 14973U, 34715U, 9768U, 
10815
    34670U, 34768U, 46045U, 34977U, 31052U, 28498U, 15864U, 10211U, 
10816
    22179U, 28106U, 37581U, 21029U, 18326U, 24715U, 28835U, 20519U, 
10817
    37404U, 20961U, 45193U, 21065U, 28856U, 20542U, 37425U, 20984U, 
10818
    45216U, 21090U, 18396U, 30459U, 20806U, 20662U, 31770U, 44208U, 
10819
    44286U, 22335U, 28135U, 14318U, 46199U, 37498U, 46468U, 14328U, 
10820
    46212U, 37508U, 46481U, 13849U, 46137U, 37268U, 46406U, 14347U, 
10821
    46225U, 37518U, 46494U, 13859U, 46150U, 37278U, 46419U, 14357U, 
10822
    46238U, 37528U, 46507U, 28929U, 20613U, 28887U, 20576U, 20650U, 
10823
    36530U, 31758U, 36609U, 10201U, 28317U, 27784U, 15001U, 47917U, 
10824
    20530U, 37414U, 20972U, 21077U, 20553U, 20995U, 21102U, 20624U, 
10825
    21017U, 21126U, 16365U, 16091U, 47180U, 47285U, 15542U, 15955U, 
10826
    47138U, 46906U, 7839U, 34692U, 47932U, 7501U, 28030U, 20636U, 
10827
    31744U, 28038U, 5033U, 12610U, 22171U, 5055U, 30489U, 20819U, 
10828
    37381U, 14770U, 14784U, 44177U, 44163U, 14381U, 37570U, 14396U, 
10829
    37597U, 28898U, 20603U, 28370U, 37446U, 21007U, 28618U, 45239U, 
10830
    21115U, 28715U, 21498U, 47837U, 18409U, 30480U, 20869U, 43558U, 
10831
    30562U, 22328U, 31682U, 28506U, 21403U, 47844U, 31059U, 12280U, 
10832
    12682U, 22187U, 30613U, 22342U, 13650U, 18303U, 44267U, 21053U, 
10833
    28877U, 20565U, 5063U, 43565U, 30500U, 20831U, 37392U, 13036U, 
10834
    22211U, 30927U, 22353U, 13432U, 4565U, 4750U, 2342U, 4544U, 
10835
    4687U, 4736U, 4868U, 4891U, 4992U, 5006U, 5041U, 5078U, 
10836
    5111U, 5185U, 5555U, 5939U, 6275U, 6354U, 7793U, 13878U, 
10837
    14491U, 12350U, 28143U, 14518U, 13334U, 28179U, 47090U, 28253U, 
10838
    45871U, 28217U, 12363U, 28161U, 13905U, 13348U, 28198U, 47104U, 
10839
    28272U, 45884U, 28235U, 13891U, 14504U, 13932U, 14545U, 13919U, 
10840
    14532U, 12458U, 34863U, 28907U, 13399U, 37455U, 24746U, 22124U, 
10841
    24872U, 47342U, 22278U, 47670U, 15341U, 15504U, 21984U, 9982U, 
10842
    12467U, 34874U, 28918U, 13410U, 37466U, 24757U, 13322U, 22316U, 
10843
    31691U, 9023U, 9422U, 12290U, 34829U, 9435U, 22135U, 24883U, 
10844
    9129U, 47351U, 22287U, 47969U, 9065U, 9991U, 28306U, 32943U, 
10845
    27773U, 30239U, 6529U, 21936U, 14410U, 30512U, 14454U, 15671U, 
10846
    44031U, 42149U, 28098U, 14419U, 46264U, 43762U, 43698U, 31660U, 
10847
    14481U, 46334U, 43776U, 43709U, 48014U, 43852U, 15681U, 48027U, 
10848
    43867U, 48048U, 43882U, 44058U, 46603U, 43821U, 43750U, 48073U, 
10849
    43895U, 43721U, 46533U, 43807U, 43739U, 16446U, 44215U, 29155U, 
10850
    44241U, 16470U, 44228U, 29165U, 44254U, 13594U, 20878U, 32975U, 
10851
    20890U, 32987U, 20902U, 32999U, 13660U, 183U, 2640U, 13614U, 
10852
    43103U, 35944U, 42303U, 35180U, 42703U, 35562U, 43346U, 36176U, 
10853
    42503U, 35371U, 42903U, 35753U, 43036U, 35880U, 42236U, 35116U, 
10854
    42636U, 35498U, 43279U, 36112U, 42436U, 35307U, 42836U, 35689U, 
10855
    42990U, 35836U, 42190U, 35072U, 42590U, 35454U, 43233U, 36068U, 
10856
    42390U, 35263U, 42790U, 35645U, 43124U, 35964U, 42324U, 35200U, 
10857
    42724U, 35582U, 43367U, 36196U, 42524U, 35391U, 42924U, 35773U, 
10858
    43058U, 35901U, 42258U, 35137U, 42658U, 35519U, 43301U, 36133U, 
10859
    42458U, 35328U, 42858U, 35710U, 43013U, 35858U, 42213U, 35094U, 
10860
    42613U, 35476U, 43256U, 36090U, 42413U, 35285U, 42813U, 35667U, 
10861
    43166U, 36004U, 42345U, 35220U, 42745U, 35602U, 43409U, 36236U, 
10862
    42545U, 35411U, 42945U, 35793U, 43080U, 35922U, 42280U, 35158U, 
10863
    42680U, 35540U, 43323U, 36154U, 42480U, 35349U, 42880U, 35731U, 
10864
    43145U, 35984U, 43388U, 36216U, 43188U, 36025U, 43431U, 36257U, 
10865
    31669U, 20949U, 33031U, 42967U, 35814U, 42167U, 35050U, 42567U, 
10866
    35432U, 43210U, 36046U, 42367U, 35241U, 42767U, 35623U, 13478U, 
10867
    22646U, 29478U, 17764U, 29827U, 18553U, 31425U, 23242U, 29584U, 
10868
    17958U, 30021U, 19451U, 31524U, 22572U, 29414U, 17700U, 29763U, 
10869
    18443U, 31365U, 22602U, 29446U, 17732U, 29795U, 18473U, 31395U, 
10870
    22587U, 29430U, 17716U, 29779U, 18458U, 31380U, 22617U, 29462U, 
10871
    17748U, 29811U, 18488U, 31410U, 22802U, 29496U, 17782U, 29845U, 
10872
    18570U, 31442U, 27835U, 22906U, 29540U, 17870U, 29933U, 19181U, 
10873
    31483U, 27873U, 23398U, 29602U, 17976U, 30039U, 19468U, 31541U, 
10874
    27919U, 23512U, 29646U, 18064U, 30127U, 19509U, 31582U, 27957U, 
10875
    22888U, 29525U, 17840U, 29903U, 18597U, 31469U, 27860U, 23462U, 
10876
    29631U, 18034U, 30097U, 19495U, 31568U, 27944U, 28803U, 12534U, 
10877
    22937U, 19208U, 23856U, 19934U, 23562U, 19623U, 24218U, 20239U, 
10878
    23000U, 19255U, 23931U, 19990U, 23625U, 19670U, 24293U, 20295U, 
10879
    23047U, 19302U, 23987U, 20046U, 23672U, 19717U, 24349U, 20351U, 
10880
    23110U, 19349U, 24062U, 20102U, 23735U, 19764U, 24424U, 20407U, 
10881
    22984U, 19239U, 23912U, 19971U, 23609U, 19654U, 24274U, 20276U, 
10882
    23094U, 19333U, 24043U, 20083U, 23719U, 19748U, 24405U, 20388U, 
10883
    22698U, 23294U, 24595U, 22733U, 23329U, 24630U, 22715U, 23311U, 
10884
    24612U, 22750U, 23346U, 24647U, 22784U, 23380U, 24681U, 22680U, 
10885
    23276U, 24577U, 24998U, 33112U, 25097U, 33211U, 24938U, 33052U, 
10886
    24968U, 33082U, 24953U, 33067U, 24983U, 33097U, 28791U, 12501U, 
10887
    25015U, 31703U, 33129U, 25056U, 31783U, 33170U, 25114U, 32053U, 
10888
    33228U, 25155U, 32094U, 33269U, 25042U, 31730U, 33156U, 25141U, 
10889
    32080U, 33255U, 34997U, 22768U, 23364U, 24665U, 33413U, 31810U, 
10890
    33899U, 32367U, 33656U, 32121U, 34184U, 32672U, 33463U, 31857U, 
10891
    33958U, 32423U, 33706U, 32168U, 34243U, 32728U, 33513U, 31904U, 
10892
    34017U, 32479U, 33756U, 32215U, 34302U, 32784U, 33563U, 31951U, 
10893
    34076U, 32535U, 33806U, 32262U, 34361U, 32840U, 33446U, 31841U, 
10894
    33938U, 32404U, 33689U, 32152U, 34223U, 32709U, 33546U, 31935U, 
10895
    34056U, 32516U, 33789U, 32246U, 34341U, 32821U, 22374U, 13741U, 
10896
    43453U, 43604U, 35038U, 43502U, 43651U, 22663U, 23259U, 24560U, 
10897
    47950U, 7281U, 17647U, 18356U, 1206U, 1913U, 1991U, 4191U, 
10898
    452U, 2735U, 1232U, 1939U, 2110U, 4310U, 478U, 2761U, 
10899
    2151U, 4337U, 492U, 2775U, 2016U, 4216U, 465U, 2748U, 
10900
    416U, 344U, 505U, 2137U, 434U, 362U, 2204U, 4431U, 
10901
    3471U, 4472U, 4139U, 17630U, 22296U, 28047U, 2284U, 4486U, 
10902
    2056U, 4256U, 2313U, 4515U, 2083U, 4283U, 2298U, 4500U, 
10903
    2069U, 4269U, 2327U, 4529U, 2096U, 4296U, 2244U, 4418U, 
10904
    1194U, 3459U, 2271U, 4459U, 1901U, 4127U, 2230U, 4404U, 
10905
    1181U, 3446U, 2257U, 4445U, 1888U, 4114U, 17638U, 664U, 
10906
    2929U, 1385U, 3611U, 979U, 3244U, 1700U, 3926U, 787U, 
10907
    3052U, 1508U, 3734U, 1102U, 3367U, 1823U, 4049U, 839U, 
10908
    3104U, 1560U, 3786U, 1154U, 3419U, 1875U, 4101U, 592U, 
10909
    2857U, 1313U, 3539U, 907U, 3172U, 1628U, 3854U, 766U, 
10910
    3031U, 1487U, 3713U, 1081U, 3346U, 1802U, 4028U, 720U, 
10911
    2985U, 1441U, 3667U, 1035U, 3300U, 1756U, 3982U, 808U, 
10912
    3073U, 1529U, 3755U, 1123U, 3388U, 1844U, 4070U, 699U, 
10913
    2964U, 1420U, 3646U, 1014U, 3279U, 1735U, 3961U, 28683U, 
10914
    4152U, 36335U, 628U, 2893U, 1349U, 3575U, 943U, 3208U, 
10915
    1664U, 3890U, 752U, 3017U, 1473U, 3699U, 1067U, 3332U, 
10916
    1788U, 4014U, 556U, 2821U, 1277U, 3503U, 871U, 3136U, 
10917
    1592U, 3818U, 681U, 2946U, 1402U, 3628U, 996U, 3261U, 
10918
    1717U, 3943U, 21273U, 22306U, 28057U, 28660U, 646U, 2911U, 
10919
    1367U, 3593U, 961U, 3226U, 1682U, 3908U, 825U, 3090U, 
10920
    1546U, 3772U, 1140U, 3405U, 1861U, 4087U, 574U, 2839U, 
10921
    1295U, 3521U, 889U, 3154U, 1610U, 3836U, 28672U, 609U, 
10922
    2874U, 1330U, 3556U, 924U, 3189U, 1645U, 3871U, 737U, 
10923
    3002U, 1458U, 3684U, 1052U, 3317U, 1773U, 3999U, 537U, 
10924
    2802U, 1258U, 3484U, 852U, 3117U, 1573U, 3799U, 17655U, 
10925
    18365U, 12020U, 15142U, 46630U, 16522U, 29277U, 16540U, 29295U, 
10926
    16558U, 29313U, 2003U, 4203U, 2123U, 4323U, 2163U, 4363U, 
10927
    4662U, 34704U, 2028U, 4228U, 1965U, 4165U, 2176U, 4376U, 
10928
    2042U, 4242U, 1978U, 21299U, 4178U, 21316U, 2190U, 4390U, 
10929
    15059U, 15897U, 1218U, 10141U, 1925U, 10171U, 1244U, 10156U, 
10930
    1951U, 10186U, 14825U, 21550U, 14845U, 21570U, 14888U, 21586U, 
10931
    332U, 2218U, 12196U, 12693U, 22199U, 30623U, 31131U, 16216U, 
10932
    12228U, 16228U, 12241U, 36301U, 18197U, 30294U, 4701U, 18211U, 
10933
    30308U, 36318U, 13046U, 22222U, 30936U, 31294U, 47326U, 11897U, 
10934
    16406U, 10926U, 380U, 2681U, 523U, 2788U, 398U, 2699U, 
10935
    1167U, 3432U, 13056U, 22233U, 30945U, 12208U, 45111U, 45146U, 
10936
    45135U, 45294U, 45170U, 45317U, 45123U, 45282U, 45158U, 45305U, 
10937
    9255U, 9810U, 46827U, 11828U, 12302U, 10657U, 46997U, 11882U, 
10938
    12326U, 10673U, 46838U, 13205U, 12314U, 13128U, 47008U, 13220U, 
10939
    12338U, 13144U, 21538U, 30532U, 37371U, 14759U, 46347U, 43791U, 
10940
    44121U, 46616U, 43836U, 34469U, 34510U, 34551U, 34592U, 34496U, 
10941
    34578U, 34482U, 34619U, 34523U, 34537U, 34564U, 34636U, 34605U, 
10942
    34653U, 2649U, 21148U, 21203U, 4783U, 8564U, 5326U, 5199U, 
10943
    4841U, 8630U, 5400U, 5265U, 20854U, 13445U, 24839U, 11017U, 
10944
    12811U, 10236U, 30717U, 12116U, 29186U, 11137U, 12931U, 10356U, 
10945
    30829U, 36564U, 12164U, 16132U, 47201U, 24894U, 11062U, 12856U, 
10946
    10281U, 30759U, 31234U, 29233U, 11182U, 12976U, 10401U, 30871U, 
10947
    36579U, 16168U, 47237U, 24850U, 11032U, 12826U, 10251U, 30731U, 
10948
    13175U, 29197U, 11152U, 12946U, 10371U, 30843U, 13190U, 22384U, 
10949
    16144U, 47213U, 24916U, 11092U, 12886U, 10311U, 30787U, 31264U, 
10950
    29255U, 11212U, 13006U, 10431U, 30899U, 36594U, 22402U, 16192U, 
10951
    47261U, 45667U, 28735U, 22256U, 168U, 24796U, 2622U, 24812U, 
10952
    9494U, 22087U, 27736U, 16591U, 29346U, 2356U, 24804U, 4558U, 
10953
    24820U, 13698U, 45181U, 28468U, 28702U, 28425U, 44004U, 28455U, 
10954
    28649U, 28411U, 13684U, 28598U, 24905U, 11077U, 12871U, 10296U, 
10955
    30773U, 31249U, 29244U, 11197U, 12991U, 10416U, 30885U, 16180U, 
10956
    47249U, 24861U, 11047U, 12841U, 10266U, 30745U, 12132U, 29208U, 
10957
    11167U, 12961U, 10386U, 30857U, 12180U, 16156U, 47225U, 24927U, 
10958
    11107U, 12901U, 10326U, 30801U, 31279U, 29266U, 11227U, 13021U, 
10959
    10446U, 30913U, 16204U, 47273U, 21506U, 21767U, 28752U, 22952U, 
10960
    19223U, 19952U, 23171U, 19394U, 20139U, 23782U, 19825U, 20444U, 
10961
    23577U, 19638U, 20257U, 23015U, 19270U, 20008U, 23640U, 19685U, 
10962
    20313U, 23031U, 19286U, 20027U, 23656U, 19701U, 20332U, 23062U, 
10963
    19317U, 20064U, 23190U, 19413U, 20161U, 23801U, 19844U, 20466U, 
10964
    23687U, 19732U, 20369U, 23125U, 19364U, 20120U, 23209U, 19432U, 
10965
    20183U, 23820U, 19863U, 20488U, 23750U, 19779U, 20425U, 16603U, 
10966
    29358U, 9209U, 15097U, 9542U, 15582U, 22836U, 29510U, 17810U, 
10967
    29873U, 18583U, 31455U, 27847U, 23839U, 29675U, 18122U, 30185U, 
10968
    19917U, 31609U, 27982U, 22923U, 29554U, 17898U, 29961U, 19194U, 
10969
    31496U, 27885U, 23157U, 29569U, 17928U, 29991U, 19380U, 31510U, 
10970
    27906U, 23432U, 29616U, 18004U, 30067U, 19481U, 31554U, 27931U, 
10971
    24184U, 29693U, 18140U, 30203U, 20205U, 31626U, 27998U, 23529U, 
10972
    29660U, 18092U, 30155U, 19522U, 31595U, 27969U, 24201U, 29711U, 
10973
    18158U, 30221U, 20222U, 31643U, 28014U, 12550U, 21184U, 21239U, 
10974
    9365U, 9904U, 10111U, 13362U, 16393U, 47313U, 16576U, 29331U, 
10975
    16615U, 29370U, 9448U, 9623U, 15190U, 13638U, 15179U, 16275U, 
10976
    34814U, 9355U, 21333U, 9882U, 21350U, 16334U, 21386U, 16054U, 
10977
    21368U, 9644U, 15717U, 9409U, 9610U, 14918U, 46773U, 9320U, 
10978
    16252U, 9343U, 16301U, 14928U, 46783U, 18247U, 20690U, 20749U, 
10979
    20705U, 20764U, 18225U, 18258U, 22098U, 37297U, 28441U, 28606U, 
10980
    28396U, 18418U, 16627U, 29382U, 18282U, 47658U, 20844U, 20720U, 
10981
    20779U, 48004U, 33429U, 31825U, 33918U, 23874U, 32385U, 33596U, 
10982
    31996U, 34115U, 24118U, 32572U, 33839U, 32293U, 34400U, 24480U, 
10983
    32877U, 33672U, 32136U, 34203U, 24236U, 32690U, 33479U, 31872U, 
10984
    33977U, 23949U, 32441U, 33722U, 32183U, 34262U, 24311U, 32746U, 
10985
    33496U, 31888U, 33997U, 23968U, 32460U, 33739U, 32199U, 34282U, 
10986
    24330U, 32765U, 33529U, 31919U, 34036U, 24005U, 32497U, 33616U, 
10987
    32015U, 34138U, 24140U, 32594U, 33859U, 32312U, 34423U, 24502U, 
10988
    32899U, 33772U, 32230U, 34321U, 24367U, 32802U, 33579U, 31966U, 
10989
    34095U, 24080U, 32553U, 33636U, 32034U, 34161U, 24162U, 32616U, 
10990
    33879U, 32331U, 34446U, 24524U, 32921U, 33822U, 32277U, 34380U, 
10991
    24442U, 32858U, 12517U, 21165U, 21220U, 22854U, 22968U, 23893U, 
10992
    23593U, 24255U, 23446U, 23078U, 24024U, 23703U, 24386U, 23547U, 
10993
    23141U, 24099U, 23766U, 24461U, 25028U, 31716U, 33142U, 25182U, 
10994
    32350U, 33296U, 25069U, 31796U, 33183U, 25083U, 31982U, 33197U, 
10995
    25127U, 32066U, 33241U, 25199U, 32638U, 33313U, 25168U, 32107U, 
10996
    33282U, 25216U, 32655U, 33330U, 18236U, 20675U, 20734U, 13625U, 
10997
    10704U, 14960U, 30382U, 46032U, 15046U, 30396U, 46063U, 36468U, 
10998
    36454U, 28628U, 13272U, 24828U, 11002U, 12796U, 10221U, 30703U, 
10999
    12100U, 29175U, 11122U, 12916U, 10341U, 30815U, 12148U, 27752U, 
11000
    28338U, 28354U, 18176U, 47827U, 28579U, 2578U, 14445U, 46299U, 
11001
    44022U, 46568U, 20588U, 16432U, 16456U, 16480U, 16494U, 48059U, 
11002
    33392U, 12220U, 12254U, 20940U, 2629U, 9712U, 15830U, 30333U, 
11003
    9733U, 15851U, 4818U, 6568U, 8661U, 5435U, 5296U, 8603U, 
11004
    5369U, 5238U, 23494U, 22869U, 13477U, 2557U, 13714U, 46104U, 
11005
    35011U, 46373U, 22801U, 28529U, 23397U, 28543U, 23461U, 22363U, 
11006
    13728U, 46121U, 35025U, 46390U, 22632U, 24546U, 13444U, 142U, 
11007
    2596U, 28515U, 23228U, 28557U, 155U, 2609U, 44194U, 4773U, 
11008
    47049U, 9684U, 15775U, 47037U, 12670U, 22110U, 43584U, 30602U, 
11009
    22146U, 4671U, 4718U, 31119U, 15638U, 46934U, 30U, 47860U, 
11010
    45U, 47879U, 16664U, 18527U, 44324U, 16640U, 17324U, 17044U, 
11011
    18965U, 44724U, 19571U, 44987U, 16812U, 18733U, 44481U, 16942U, 
11012
    18863U, 44617U, 17376U, 17340U, 17066U, 18987U, 44747U, 19587U, 
11013
    45004U, 16833U, 18754U, 44503U, 17091U, 19012U, 44773U, 19795U, 
11014
    45042U, 16857U, 18778U, 44528U, 17276U, 17019U, 18940U, 44698U, 
11015
    19552U, 44967U, 16788U, 18709U, 44456U, 18503U, 44298U, 16700U, 
11016
    18621U, 44363U, 17260U, 16997U, 18918U, 44675U, 19536U, 44950U, 
11017
    16767U, 18688U, 44434U, 16677U, 16978U, 18899U, 44655U, 18540U, 
11018
    44338U, 16734U, 18655U, 44399U, 16652U, 17505U, 17133U, 19054U, 
11019
    44817U, 19882U, 45074U, 16897U, 18818U, 44570U, 16960U, 18881U, 
11020
    44636U, 17219U, 19140U, 44907U, 17391U, 17521U, 17155U, 19076U, 
11021
    44840U, 19898U, 45091U, 16918U, 18839U, 44592U, 17112U, 19033U, 
11022
    44795U, 17238U, 19159U, 44927U, 19810U, 45058U, 16877U, 18798U, 
11023
    44549U, 17198U, 19119U, 44885U, 18515U, 44311U, 16717U, 18638U, 
11024
    44381U, 17180U, 19101U, 44866U, 17359U, 19606U, 45024U, 14244U, 
11025
    14702U, 9668U, 36425U, 15155U, 9824U, 15908U, 46643U, 15759U, 
11026
    36486U, 47028U, 36625U, 14044U, 14069U, 4936U, 47733U, 4586U, 
11027
    47699U, 14586U, 13790U, 14111U, 14639U, 9200U, 45392U, 29010U, 
11028
    28825U, 36650U, 45472U, 47991U, 24782U, 37252U, 14906U, 46003U, 
11029
    15078U, 45430U, 29032U, 28960U, 36947U, 45534U, 46734U, 11799U, 
11030
    14949U, 10794U, 36688U, 45503U, 36393U, 36997U, 45565U, 46804U, 
11031
    11813U, 37239U, 45627U, 46085U, 45655U, 29054U, 29085U, 37202U, 
11032
    45596U, 9513U, 17582U, 13120U, 44079U, 11555U, 44068U, 11540U, 
11033
    45760U, 45772U, 44091U, 11571U, 15495U, 10823U, 45675U, 46849U, 
11034
    11843U, 45832U, 24733U, 15699U, 10836U, 36774U, 36662U, 36790U, 
11035
    36701U, 45685U, 36807U, 36715U, 36861U, 37054U, 36825U, 36730U, 
11036
    36879U, 37069U, 46967U, 11869U, 16324U, 36897U, 37084U, 36844U, 
11037
    37040U, 45842U, 22245U, 27821U, 28083U, 9289U, 13235U, 15240U, 
11038
    13260U, 9859U, 13247U, 15932U, 13284U, 47128U, 13309U, 46715U, 
11039
    13297U, 13550U, 14816U, 45862U, 45751U, 13563U, 28067U, 14193U, 
11040
    14874U, 4949U, 4599U, 4616U, 45909U, 14713U, 14006U, 14597U, 
11041
    14180U, 9178U, 14861U, 14611U, 9754U, 15872U, 14125U, 14019U, 
11042
    14207U, 21604U, 9484U, 45897U, 15477U, 12489U, 9119U, 14139U, 
11043
    10757U, 34907U, 11257U, 45442U, 11718U, 9387U, 10523U, 45404U, 
11044
    11700U, 37110U, 11368U, 37097U, 11335U, 37124U, 11386U, 37161U, 
11045
    11406U, 37176U, 11425U, 15886U, 10849U, 9589U, 12617U, 30568U, 
11046
    31066U, 15650U, 12743U, 30669U, 31181U, 46946U, 13067U, 30955U, 
11047
    31304U, 14255U, 14727U, 14221U, 14679U, 14168U, 14667U, 15515U, 
11048
    28970U, 46744U, 29095U, 46867U, 29126U, 9704U, 12629U, 30579U, 
11049
    31078U, 13840U, 12704U, 30633U, 31142U, 15795U, 12755U, 30680U, 
11050
    31193U, 14338U, 12717U, 30645U, 31155U, 14750U, 12730U, 30657U, 
11051
    31168U, 10009U, 12657U, 30590U, 31106U, 16007U, 12783U, 30691U, 
11052
    31221U, 47171U, 13107U, 30977U, 31344U, 47061U, 13079U, 30966U, 
11053
    31316U, 44102U, 29065U, 33368U, 9501U, 17569U, 9635U, 15708U, 
11054
    45695U, 46976U, 45852U, 4882U, 10071U, 22019U, 12030U, 17664U, 
11055
    17618U, 16354U, 22033U, 12047U, 17682U, 18344U, 13829U, 14267U, 
11056
    14739U, 10102U, 16384U, 10040U, 16112U, 47304U, 13818U, 14233U, 
11057
    14691U, 9533U, 15561U, 9953U, 15976U, 46925U, 34896U, 11242U, 
11058
    45783U, 45271U, 11625U, 45820U, 9298U, 10479U, 36959U, 9376U, 
11059
    10508U, 37010U, 37025U, 14083U, 10739U, 4966U, 13990U, 14298U, 
11060
    4633U, 13974U, 14278U, 4905U, 14559U, 13804U, 10721U, 14154U, 
11061
    10776U, 14653U, 34943U, 11305U, 45808U, 11783U, 45370U, 11686U, 
11062
    16042U, 4758U, 16416U, 10940U, 11352U, 34838U, 34885U, 34954U, 
11063
    11320U, 45716U, 11752U, 34850U, 15570U, 10895U, 16029U, 10864U, 
11064
    15373U, 10809U, 9332U, 10493U, 16289U, 10082U, 10628U, 16264U, 
11065
    10911U, 10018U, 10583U, 16313U, 10461U, 13160U, 12064U, 12084U, 
11066
    10061U, 10614U, 45348U, 11656U, 16122U, 10881U, 13421U, 10689U, 
11067
    45705U, 11737U, 34965U, 47852U, 9279U, 15210U, 9838U, 46696U, 
11068
    13536U, 45741U, 15803U, 47069U, 43596U, 31045U, 9232U, 15119U, 
11069
    36410U, 36438U, 9578U, 15617U, 36515U, 36499U, 15816U, 9597U, 
11070
    15658U, 46954U, 9108U, 44132U, 11586U, 34919U, 11273U, 20927U, 
11071
    10985U, 45795U, 11766U, 45359U, 11671U, 10050U, 10599U, 44148U, 
11072
    11606U, 17606U, 10969U, 45336U, 11640U, 43907U, 11443U, 47750U, 
11073
    11910U, 43952U, 11500U, 47795U, 11967U, 43922U, 11462U, 47765U, 
11074
    11929U, 43968U, 11520U, 47811U, 11987U, 43937U, 11481U, 47780U, 
11075
    11948U, 31037U, 33043U, 9308U, 9869U, 9916U, 16065U, 16240U, 
11076
    16016U, 17594U, 10953U, 46094U, 9893U, 16079U, 16344U, 9677U, 
11077
    15528U, 12403U, 28984U, 46758U, 12421U, 29110U, 46880U, 12440U, 
11078
    29140U, 15768U, 15108U, 13964U, 9268U, 9220U, 15168U, 9553U, 
11079
    12476U, 9243U, 15130U, 15593U, 14033U, 14055U, 4923U, 47716U, 
11080
    4573U, 47682U, 14575U, 13776U, 14097U, 14625U, 9191U, 45380U, 
11081
    28999U, 28815U, 36638U, 45457U, 47978U, 24768U, 14982U, 45418U, 
11082
    29021U, 28950U, 36935U, 45519U, 46724U, 14938U, 36675U, 45487U, 
11083
    36376U, 36984U, 45549U, 46793U, 37226U, 45611U, 46054U, 45643U, 
11084
    29043U, 29075U, 37190U, 45581U, 27727U, 10124U, 10643U, 34931U, 
11085
    11289U, 9398U, 10538U, 9472U, 15383U, 9565U, 15604U, 9930U, 
11086
    15942U, 5020U, 22005U, 28777U, 22072U, 4979U, 36359U, 28763U, 
11087
    36546U, 31357U, 10134U, 16425U, 16690U, 18611U, 44352U, 16752U, 
11088
    18673U, 44418U, 37308U, 30322U, 21290U, 12376U, 192U, 21265U, 
11089
    9032U, 47574U, 9163U, 47641U, 22420U, 9143U, 47600U, 21954U, 
11090
    30362U, 46666U, 9054U, 21514U, 30544U, 46894U, 29395U, 45992U, 
11091
    9153U, 47612U, 21964U, 30372U, 46676U, 12262U, 21429U, 21450U, 
11092
    47624U, 21944U, 13514U, 21526U, 24698U, 43984U, 28298U, 21258U, 
11093
    37488U, 32964U, 30260U, 21439U, 27744U, 29406U, 21462U, 46015U, 
11094
    37538U, 2658U, 18U, 15013U, 30352U, 46656U, 18426U, 12384U, 
11095
    28327U, 27794U, 13375U, 46023U, 47560U, 15024U, 22159U, 45726U, 
11096
    21475U, 47588U, 8999U, 9010U, 18270U, 12271U, 14801U, 133U, 
11097
    2587U, 21488U, 13603U, 21974U, 13524U, 43993U, 37546U, 9091U, 
11098
    9077U, 36760U, 36746U, 21763U, 13384U, 
11099
};
11100
11101
2
static inline void InitHexagonMCInstrInfo(MCInstrInfo *II) {
11102
2
  II->InitMCInstrInfo(HexagonDescs.Insts, HexagonInstrNameIndices, HexagonInstrNameData, nullptr, nullptr, 3317);
11103
2
}
11104
11105
} // end namespace llvm
11106
#endif // GET_INSTRINFO_MC_DESC
11107
11108
#ifdef GET_INSTRINFO_HEADER
11109
#undef GET_INSTRINFO_HEADER
11110
namespace llvm {
11111
struct HexagonGenInstrInfo : public TargetInstrInfo {
11112
  explicit HexagonGenInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u);
11113
  ~HexagonGenInstrInfo() override = default;
11114
11115
};
11116
} // end namespace llvm
11117
#endif // GET_INSTRINFO_HEADER
11118
11119
#ifdef GET_INSTRINFO_HELPER_DECLS
11120
#undef GET_INSTRINFO_HELPER_DECLS
11121
11122
11123
#endif // GET_INSTRINFO_HELPER_DECLS
11124
11125
#ifdef GET_INSTRINFO_HELPERS
11126
#undef GET_INSTRINFO_HELPERS
11127
11128
#endif // GET_INSTRINFO_HELPERS
11129
11130
#ifdef GET_INSTRINFO_CTOR_DTOR
11131
#undef GET_INSTRINFO_CTOR_DTOR
11132
namespace llvm {
11133
extern const HexagonInstrTable HexagonDescs;
11134
extern const unsigned HexagonInstrNameIndices[];
11135
extern const char HexagonInstrNameData[];
11136
HexagonGenInstrInfo::HexagonGenInstrInfo(unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode)
11137
1
  : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) {
11138
1
  InitMCInstrInfo(HexagonDescs.Insts, HexagonInstrNameIndices, HexagonInstrNameData, nullptr, nullptr, 3317);
11139
1
}
11140
} // end namespace llvm
11141
#endif // GET_INSTRINFO_CTOR_DTOR
11142
11143
#ifdef GET_INSTRINFO_OPERAND_ENUM
11144
#undef GET_INSTRINFO_OPERAND_ENUM
11145
namespace llvm {
11146
namespace Hexagon {
11147
namespace OpName {
11148
enum {
11149
  OPERAND_LAST
11150
};
11151
} // end namespace OpName
11152
} // end namespace Hexagon
11153
} // end namespace llvm
11154
#endif //GET_INSTRINFO_OPERAND_ENUM
11155
11156
#ifdef GET_INSTRINFO_NAMED_OPS
11157
#undef GET_INSTRINFO_NAMED_OPS
11158
namespace llvm {
11159
namespace Hexagon {
11160
LLVM_READONLY
11161
int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) {
11162
  return -1;
11163
}
11164
} // end namespace Hexagon
11165
} // end namespace llvm
11166
#endif //GET_INSTRINFO_NAMED_OPS
11167
11168
#ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM
11169
#undef GET_INSTRINFO_OPERAND_TYPES_ENUM
11170
namespace llvm {
11171
namespace Hexagon {
11172
namespace OpTypes {
11173
enum OperandType {
11174
  a30_2Imm = 0,
11175
  b13_2Imm = 1,
11176
  b15_2Imm = 2,
11177
  b30_2Imm = 3,
11178
  bblabel = 4,
11179
  f32Imm = 5,
11180
  f32imm = 6,
11181
  f64Imm = 7,
11182
  f64imm = 8,
11183
  globaladdress = 9,
11184
  globaladdressExt = 10,
11185
  i1imm = 11,
11186
  i8imm = 12,
11187
  i16imm = 13,
11188
  i32imm = 14,
11189
  i64imm = 15,
11190
  m32_0Imm = 16,
11191
  n1Const = 17,
11192
  ptype0 = 18,
11193
  ptype1 = 19,
11194
  ptype2 = 20,
11195
  ptype3 = 21,
11196
  ptype4 = 22,
11197
  ptype5 = 23,
11198
  s3_0Imm = 24,
11199
  s4_0Imm = 25,
11200
  s4_1Imm = 26,
11201
  s4_2Imm = 27,
11202
  s4_3Imm = 28,
11203
  s6_0Imm = 29,
11204
  s6_3Imm = 30,
11205
  s8_0Imm = 31,
11206
  s9_0Imm = 32,
11207
  s27_2Imm = 33,
11208
  s29_3Imm = 34,
11209
  s30_2Imm = 35,
11210
  s31_1Imm = 36,
11211
  s32_0Imm = 37,
11212
  sgp10Const = 38,
11213
  type0 = 39,
11214
  type1 = 40,
11215
  type2 = 41,
11216
  type3 = 42,
11217
  type4 = 43,
11218
  type5 = 44,
11219
  u1_0Imm = 45,
11220
  u2_0Imm = 46,
11221
  u3_0Imm = 47,
11222
  u3_1Imm = 48,
11223
  u4_0Imm = 49,
11224
  u4_2Imm = 50,
11225
  u5_0Imm = 51,
11226
  u5_2Imm = 52,
11227
  u5_3Imm = 53,
11228
  u6_0Imm = 54,
11229
  u6_1Imm = 55,
11230
  u6_2Imm = 56,
11231
  u7_0Imm = 57,
11232
  u8_0Imm = 58,
11233
  u10_0Imm = 59,
11234
  u11_3Imm = 60,
11235
  u16_0Imm = 61,
11236
  u26_6Imm = 62,
11237
  u29_3Imm = 63,
11238
  u30_2Imm = 64,
11239
  u31_1Imm = 65,
11240
  u32_0Imm = 66,
11241
  u64_0Imm = 67,
11242
  untyped_imm_0 = 68,
11243
  CtrRegs = 69,
11244
  CtrRegs64 = 70,
11245
  DoubleRegs = 71,
11246
  GeneralDoubleLow8Regs = 72,
11247
  GeneralSubRegs = 73,
11248
  GuestRegs = 74,
11249
  GuestRegs64 = 75,
11250
  HvxQR = 76,
11251
  HvxVQR = 77,
11252
  HvxVR = 78,
11253
  HvxWR = 79,
11254
  IntRegs = 80,
11255
  IntRegsLow8 = 81,
11256
  ModRegs = 82,
11257
  PredRegs = 83,
11258
  SysRegs = 84,
11259
  SysRegs64 = 85,
11260
  UsrBits = 86,
11261
  V62Regs = 87,
11262
  V65Regs = 88,
11263
  VectRegRev = 89,
11264
  OPERAND_TYPE_LIST_END
11265
};
11266
} // end namespace OpTypes
11267
} // end namespace Hexagon
11268
} // end namespace llvm
11269
#endif // GET_INSTRINFO_OPERAND_TYPES_ENUM
11270
11271
#ifdef GET_INSTRINFO_OPERAND_TYPE
11272
#undef GET_INSTRINFO_OPERAND_TYPE
11273
namespace llvm {
11274
namespace Hexagon {
11275
LLVM_READONLY
11276
static int getOperandType(uint16_t Opcode, uint16_t OpIdx) {
11277
  static const uint16_t Offsets[] = {
11278
    /* PHI */
11279
    0,
11280
    /* INLINEASM */
11281
    1,
11282
    /* INLINEASM_BR */
11283
    1,
11284
    /* CFI_INSTRUCTION */
11285
    1,
11286
    /* EH_LABEL */
11287
    2,
11288
    /* GC_LABEL */
11289
    3,
11290
    /* ANNOTATION_LABEL */
11291
    4,
11292
    /* KILL */
11293
    5,
11294
    /* EXTRACT_SUBREG */
11295
    5,
11296
    /* INSERT_SUBREG */
11297
    8,
11298
    /* IMPLICIT_DEF */
11299
    12,
11300
    /* SUBREG_TO_REG */
11301
    13,
11302
    /* COPY_TO_REGCLASS */
11303
    17,
11304
    /* DBG_VALUE */
11305
    20,
11306
    /* DBG_VALUE_LIST */
11307
    20,
11308
    /* DBG_INSTR_REF */
11309
    20,
11310
    /* DBG_PHI */
11311
    20,
11312
    /* DBG_LABEL */
11313
    20,
11314
    /* REG_SEQUENCE */
11315
    21,
11316
    /* COPY */
11317
    23,
11318
    /* BUNDLE */
11319
    25,
11320
    /* LIFETIME_START */
11321
    25,
11322
    /* LIFETIME_END */
11323
    26,
11324
    /* PSEUDO_PROBE */
11325
    27,
11326
    /* ARITH_FENCE */
11327
    31,
11328
    /* STACKMAP */
11329
    33,
11330
    /* FENTRY_CALL */
11331
    35,
11332
    /* PATCHPOINT */
11333
    35,
11334
    /* LOAD_STACK_GUARD */
11335
    41,
11336
    /* PREALLOCATED_SETUP */
11337
    42,
11338
    /* PREALLOCATED_ARG */
11339
    43,
11340
    /* STATEPOINT */
11341
    46,
11342
    /* LOCAL_ESCAPE */
11343
    46,
11344
    /* FAULTING_OP */
11345
    48,
11346
    /* PATCHABLE_OP */
11347
    49,
11348
    /* PATCHABLE_FUNCTION_ENTER */
11349
    49,
11350
    /* PATCHABLE_RET */
11351
    49,
11352
    /* PATCHABLE_FUNCTION_EXIT */
11353
    49,
11354
    /* PATCHABLE_TAIL_CALL */
11355
    49,
11356
    /* PATCHABLE_EVENT_CALL */
11357
    49,
11358
    /* PATCHABLE_TYPED_EVENT_CALL */
11359
    51,
11360
    /* ICALL_BRANCH_FUNNEL */
11361
    54,
11362
    /* MEMBARRIER */
11363
    54,
11364
    /* JUMP_TABLE_DEBUG_INFO */
11365
    54,
11366
    /* G_ASSERT_SEXT */
11367
    55,
11368
    /* G_ASSERT_ZEXT */
11369
    58,
11370
    /* G_ASSERT_ALIGN */
11371
    61,
11372
    /* G_ADD */
11373
    64,
11374
    /* G_SUB */
11375
    67,
11376
    /* G_MUL */
11377
    70,
11378
    /* G_SDIV */
11379
    73,
11380
    /* G_UDIV */
11381
    76,
11382
    /* G_SREM */
11383
    79,
11384
    /* G_UREM */
11385
    82,
11386
    /* G_SDIVREM */
11387
    85,
11388
    /* G_UDIVREM */
11389
    89,
11390
    /* G_AND */
11391
    93,
11392
    /* G_OR */
11393
    96,
11394
    /* G_XOR */
11395
    99,
11396
    /* G_IMPLICIT_DEF */
11397
    102,
11398
    /* G_PHI */
11399
    103,
11400
    /* G_FRAME_INDEX */
11401
    104,
11402
    /* G_GLOBAL_VALUE */
11403
    106,
11404
    /* G_CONSTANT_POOL */
11405
    108,
11406
    /* G_EXTRACT */
11407
    110,
11408
    /* G_UNMERGE_VALUES */
11409
    113,
11410
    /* G_INSERT */
11411
    115,
11412
    /* G_MERGE_VALUES */
11413
    119,
11414
    /* G_BUILD_VECTOR */
11415
    121,
11416
    /* G_BUILD_VECTOR_TRUNC */
11417
    123,
11418
    /* G_CONCAT_VECTORS */
11419
    125,
11420
    /* G_PTRTOINT */
11421
    127,
11422
    /* G_INTTOPTR */
11423
    129,
11424
    /* G_BITCAST */
11425
    131,
11426
    /* G_FREEZE */
11427
    133,
11428
    /* G_CONSTANT_FOLD_BARRIER */
11429
    135,
11430
    /* G_INTRINSIC_FPTRUNC_ROUND */
11431
    137,
11432
    /* G_INTRINSIC_TRUNC */
11433
    140,
11434
    /* G_INTRINSIC_ROUND */
11435
    142,
11436
    /* G_INTRINSIC_LRINT */
11437
    144,
11438
    /* G_INTRINSIC_ROUNDEVEN */
11439
    146,
11440
    /* G_READCYCLECOUNTER */
11441
    148,
11442
    /* G_LOAD */
11443
    149,
11444
    /* G_SEXTLOAD */
11445
    151,
11446
    /* G_ZEXTLOAD */
11447
    153,
11448
    /* G_INDEXED_LOAD */
11449
    155,
11450
    /* G_INDEXED_SEXTLOAD */
11451
    160,
11452
    /* G_INDEXED_ZEXTLOAD */
11453
    165,
11454
    /* G_STORE */
11455
    170,
11456
    /* G_INDEXED_STORE */
11457
    172,
11458
    /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */
11459
    177,
11460
    /* G_ATOMIC_CMPXCHG */
11461
    182,
11462
    /* G_ATOMICRMW_XCHG */
11463
    186,
11464
    /* G_ATOMICRMW_ADD */
11465
    189,
11466
    /* G_ATOMICRMW_SUB */
11467
    192,
11468
    /* G_ATOMICRMW_AND */
11469
    195,
11470
    /* G_ATOMICRMW_NAND */
11471
    198,
11472
    /* G_ATOMICRMW_OR */
11473
    201,
11474
    /* G_ATOMICRMW_XOR */
11475
    204,
11476
    /* G_ATOMICRMW_MAX */
11477
    207,
11478
    /* G_ATOMICRMW_MIN */
11479
    210,
11480
    /* G_ATOMICRMW_UMAX */
11481
    213,
11482
    /* G_ATOMICRMW_UMIN */
11483
    216,
11484
    /* G_ATOMICRMW_FADD */
11485
    219,
11486
    /* G_ATOMICRMW_FSUB */
11487
    222,
11488
    /* G_ATOMICRMW_FMAX */
11489
    225,
11490
    /* G_ATOMICRMW_FMIN */
11491
    228,
11492
    /* G_ATOMICRMW_UINC_WRAP */
11493
    231,
11494
    /* G_ATOMICRMW_UDEC_WRAP */
11495
    234,
11496
    /* G_FENCE */
11497
    237,
11498
    /* G_PREFETCH */
11499
    239,
11500
    /* G_BRCOND */
11501
    243,
11502
    /* G_BRINDIRECT */
11503
    245,
11504
    /* G_INVOKE_REGION_START */
11505
    246,
11506
    /* G_INTRINSIC */
11507
    246,
11508
    /* G_INTRINSIC_W_SIDE_EFFECTS */
11509
    247,
11510
    /* G_INTRINSIC_CONVERGENT */
11511
    248,
11512
    /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */
11513
    249,
11514
    /* G_ANYEXT */
11515
    250,
11516
    /* G_TRUNC */
11517
    252,
11518
    /* G_CONSTANT */
11519
    254,
11520
    /* G_FCONSTANT */
11521
    256,
11522
    /* G_VASTART */
11523
    258,
11524
    /* G_VAARG */
11525
    259,
11526
    /* G_SEXT */
11527
    262,
11528
    /* G_SEXT_INREG */
11529
    264,
11530
    /* G_ZEXT */
11531
    267,
11532
    /* G_SHL */
11533
    269,
11534
    /* G_LSHR */
11535
    272,
11536
    /* G_ASHR */
11537
    275,
11538
    /* G_FSHL */
11539
    278,
11540
    /* G_FSHR */
11541
    282,
11542
    /* G_ROTR */
11543
    286,
11544
    /* G_ROTL */
11545
    289,
11546
    /* G_ICMP */
11547
    292,
11548
    /* G_FCMP */
11549
    296,
11550
    /* G_SELECT */
11551
    300,
11552
    /* G_UADDO */
11553
    304,
11554
    /* G_UADDE */
11555
    308,
11556
    /* G_USUBO */
11557
    313,
11558
    /* G_USUBE */
11559
    317,
11560
    /* G_SADDO */
11561
    322,
11562
    /* G_SADDE */
11563
    326,
11564
    /* G_SSUBO */
11565
    331,
11566
    /* G_SSUBE */
11567
    335,
11568
    /* G_UMULO */
11569
    340,
11570
    /* G_SMULO */
11571
    344,
11572
    /* G_UMULH */
11573
    348,
11574
    /* G_SMULH */
11575
    351,
11576
    /* G_UADDSAT */
11577
    354,
11578
    /* G_SADDSAT */
11579
    357,
11580
    /* G_USUBSAT */
11581
    360,
11582
    /* G_SSUBSAT */
11583
    363,
11584
    /* G_USHLSAT */
11585
    366,
11586
    /* G_SSHLSAT */
11587
    369,
11588
    /* G_SMULFIX */
11589
    372,
11590
    /* G_UMULFIX */
11591
    376,
11592
    /* G_SMULFIXSAT */
11593
    380,
11594
    /* G_UMULFIXSAT */
11595
    384,
11596
    /* G_SDIVFIX */
11597
    388,
11598
    /* G_UDIVFIX */
11599
    392,
11600
    /* G_SDIVFIXSAT */
11601
    396,
11602
    /* G_UDIVFIXSAT */
11603
    400,
11604
    /* G_FADD */
11605
    404,
11606
    /* G_FSUB */
11607
    407,
11608
    /* G_FMUL */
11609
    410,
11610
    /* G_FMA */
11611
    413,
11612
    /* G_FMAD */
11613
    417,
11614
    /* G_FDIV */
11615
    421,
11616
    /* G_FREM */
11617
    424,
11618
    /* G_FPOW */
11619
    427,
11620
    /* G_FPOWI */
11621
    430,
11622
    /* G_FEXP */
11623
    433,
11624
    /* G_FEXP2 */
11625
    435,
11626
    /* G_FEXP10 */
11627
    437,
11628
    /* G_FLOG */
11629
    439,
11630
    /* G_FLOG2 */
11631
    441,
11632
    /* G_FLOG10 */
11633
    443,
11634
    /* G_FLDEXP */
11635
    445,
11636
    /* G_FFREXP */
11637
    448,
11638
    /* G_FNEG */
11639
    451,
11640
    /* G_FPEXT */
11641
    453,
11642
    /* G_FPTRUNC */
11643
    455,
11644
    /* G_FPTOSI */
11645
    457,
11646
    /* G_FPTOUI */
11647
    459,
11648
    /* G_SITOFP */
11649
    461,
11650
    /* G_UITOFP */
11651
    463,
11652
    /* G_FABS */
11653
    465,
11654
    /* G_FCOPYSIGN */
11655
    467,
11656
    /* G_IS_FPCLASS */
11657
    470,
11658
    /* G_FCANONICALIZE */
11659
    473,
11660
    /* G_FMINNUM */
11661
    475,
11662
    /* G_FMAXNUM */
11663
    478,
11664
    /* G_FMINNUM_IEEE */
11665
    481,
11666
    /* G_FMAXNUM_IEEE */
11667
    484,
11668
    /* G_FMINIMUM */
11669
    487,
11670
    /* G_FMAXIMUM */
11671
    490,
11672
    /* G_GET_FPENV */
11673
    493,
11674
    /* G_SET_FPENV */
11675
    494,
11676
    /* G_RESET_FPENV */
11677
    495,
11678
    /* G_GET_FPMODE */
11679
    495,
11680
    /* G_SET_FPMODE */
11681
    496,
11682
    /* G_RESET_FPMODE */
11683
    497,
11684
    /* G_PTR_ADD */
11685
    497,
11686
    /* G_PTRMASK */
11687
    500,
11688
    /* G_SMIN */
11689
    503,
11690
    /* G_SMAX */
11691
    506,
11692
    /* G_UMIN */
11693
    509,
11694
    /* G_UMAX */
11695
    512,
11696
    /* G_ABS */
11697
    515,
11698
    /* G_LROUND */
11699
    517,
11700
    /* G_LLROUND */
11701
    519,
11702
    /* G_BR */
11703
    521,
11704
    /* G_BRJT */
11705
    522,
11706
    /* G_INSERT_VECTOR_ELT */
11707
    525,
11708
    /* G_EXTRACT_VECTOR_ELT */
11709
    529,
11710
    /* G_SHUFFLE_VECTOR */
11711
    532,
11712
    /* G_CTTZ */
11713
    536,
11714
    /* G_CTTZ_ZERO_UNDEF */
11715
    538,
11716
    /* G_CTLZ */
11717
    540,
11718
    /* G_CTLZ_ZERO_UNDEF */
11719
    542,
11720
    /* G_CTPOP */
11721
    544,
11722
    /* G_BSWAP */
11723
    546,
11724
    /* G_BITREVERSE */
11725
    548,
11726
    /* G_FCEIL */
11727
    550,
11728
    /* G_FCOS */
11729
    552,
11730
    /* G_FSIN */
11731
    554,
11732
    /* G_FSQRT */
11733
    556,
11734
    /* G_FFLOOR */
11735
    558,
11736
    /* G_FRINT */
11737
    560,
11738
    /* G_FNEARBYINT */
11739
    562,
11740
    /* G_ADDRSPACE_CAST */
11741
    564,
11742
    /* G_BLOCK_ADDR */
11743
    566,
11744
    /* G_JUMP_TABLE */
11745
    568,
11746
    /* G_DYN_STACKALLOC */
11747
    570,
11748
    /* G_STACKSAVE */
11749
    573,
11750
    /* G_STACKRESTORE */
11751
    574,
11752
    /* G_STRICT_FADD */
11753
    575,
11754
    /* G_STRICT_FSUB */
11755
    578,
11756
    /* G_STRICT_FMUL */
11757
    581,
11758
    /* G_STRICT_FDIV */
11759
    584,
11760
    /* G_STRICT_FREM */
11761
    587,
11762
    /* G_STRICT_FMA */
11763
    590,
11764
    /* G_STRICT_FSQRT */
11765
    594,
11766
    /* G_STRICT_FLDEXP */
11767
    596,
11768
    /* G_READ_REGISTER */
11769
    599,
11770
    /* G_WRITE_REGISTER */
11771
    601,
11772
    /* G_MEMCPY */
11773
    603,
11774
    /* G_MEMCPY_INLINE */
11775
    607,
11776
    /* G_MEMMOVE */
11777
    610,
11778
    /* G_MEMSET */
11779
    614,
11780
    /* G_BZERO */
11781
    618,
11782
    /* G_VECREDUCE_SEQ_FADD */
11783
    621,
11784
    /* G_VECREDUCE_SEQ_FMUL */
11785
    624,
11786
    /* G_VECREDUCE_FADD */
11787
    627,
11788
    /* G_VECREDUCE_FMUL */
11789
    629,
11790
    /* G_VECREDUCE_FMAX */
11791
    631,
11792
    /* G_VECREDUCE_FMIN */
11793
    633,
11794
    /* G_VECREDUCE_FMAXIMUM */
11795
    635,
11796
    /* G_VECREDUCE_FMINIMUM */
11797
    637,
11798
    /* G_VECREDUCE_ADD */
11799
    639,
11800
    /* G_VECREDUCE_MUL */
11801
    641,
11802
    /* G_VECREDUCE_AND */
11803
    643,
11804
    /* G_VECREDUCE_OR */
11805
    645,
11806
    /* G_VECREDUCE_XOR */
11807
    647,
11808
    /* G_VECREDUCE_SMAX */
11809
    649,
11810
    /* G_VECREDUCE_SMIN */
11811
    651,
11812
    /* G_VECREDUCE_UMAX */
11813
    653,
11814
    /* G_VECREDUCE_UMIN */
11815
    655,
11816
    /* G_SBFX */
11817
    657,
11818
    /* G_UBFX */
11819
    661,
11820
    /* A2_addsp */
11821
    665,
11822
    /* A2_iconst */
11823
    668,
11824
    /* A2_neg */
11825
    670,
11826
    /* A2_not */
11827
    672,
11828
    /* A2_tfrf */
11829
    674,
11830
    /* A2_tfrfnew */
11831
    677,
11832
    /* A2_tfrp */
11833
    680,
11834
    /* A2_tfrpf */
11835
    682,
11836
    /* A2_tfrpfnew */
11837
    685,
11838
    /* A2_tfrpi */
11839
    688,
11840
    /* A2_tfrpt */
11841
    690,
11842
    /* A2_tfrptnew */
11843
    693,
11844
    /* A2_tfrt */
11845
    696,
11846
    /* A2_tfrtnew */
11847
    699,
11848
    /* A2_vaddb_map */
11849
    702,
11850
    /* A2_vsubb_map */
11851
    705,
11852
    /* A2_zxtb */
11853
    708,
11854
    /* A4_boundscheck */
11855
    710,
11856
    /* ADJCALLSTACKDOWN */
11857
    713,
11858
    /* ADJCALLSTACKUP */
11859
    715,
11860
    /* C2_cmpgei */
11861
    717,
11862
    /* C2_cmpgeui */
11863
    720,
11864
    /* C2_cmplt */
11865
    723,
11866
    /* C2_cmpltu */
11867
    726,
11868
    /* C2_pxfer_map */
11869
    729,
11870
    /* DUPLEX_Pseudo */
11871
    731,
11872
    /* ENDLOOP0 */
11873
    732,
11874
    /* ENDLOOP01 */
11875
    733,
11876
    /* ENDLOOP1 */
11877
    734,
11878
    /* J2_endloop0 */
11879
    735,
11880
    /* J2_endloop01 */
11881
    735,
11882
    /* J2_endloop1 */
11883
    735,
11884
    /* J2_jumpf_nopred_map */
11885
    735,
11886
    /* J2_jumprf_nopred_map */
11887
    737,
11888
    /* J2_jumprt_nopred_map */
11889
    739,
11890
    /* J2_jumpt_nopred_map */
11891
    741,
11892
    /* J2_trap1_noregmap */
11893
    743,
11894
    /* L2_loadalignb_zomap */
11895
    744,
11896
    /* L2_loadalignh_zomap */
11897
    747,
11898
    /* L2_loadbsw2_zomap */
11899
    750,
11900
    /* L2_loadbsw4_zomap */
11901
    752,
11902
    /* L2_loadbzw2_zomap */
11903
    754,
11904
    /* L2_loadbzw4_zomap */
11905
    756,
11906
    /* L2_loadrb_zomap */
11907
    758,
11908
    /* L2_loadrd_zomap */
11909
    760,
11910
    /* L2_loadrh_zomap */
11911
    762,
11912
    /* L2_loadri_zomap */
11913
    764,
11914
    /* L2_loadrub_zomap */
11915
    766,
11916
    /* L2_loadruh_zomap */
11917
    768,
11918
    /* L2_ploadrbf_zomap */
11919
    770,
11920
    /* L2_ploadrbfnew_zomap */
11921
    773,
11922
    /* L2_ploadrbt_zomap */
11923
    776,
11924
    /* L2_ploadrbtnew_zomap */
11925
    779,
11926
    /* L2_ploadrdf_zomap */
11927
    782,
11928
    /* L2_ploadrdfnew_zomap */
11929
    785,
11930
    /* L2_ploadrdt_zomap */
11931
    788,
11932
    /* L2_ploadrdtnew_zomap */
11933
    791,
11934
    /* L2_ploadrhf_zomap */
11935
    794,
11936
    /* L2_ploadrhfnew_zomap */
11937
    797,
11938
    /* L2_ploadrht_zomap */
11939
    800,
11940
    /* L2_ploadrhtnew_zomap */
11941
    803,
11942
    /* L2_ploadrif_zomap */
11943
    806,
11944
    /* L2_ploadrifnew_zomap */
11945
    809,
11946
    /* L2_ploadrit_zomap */
11947
    812,
11948
    /* L2_ploadritnew_zomap */
11949
    815,
11950
    /* L2_ploadrubf_zomap */
11951
    818,
11952
    /* L2_ploadrubfnew_zomap */
11953
    821,
11954
    /* L2_ploadrubt_zomap */
11955
    824,
11956
    /* L2_ploadrubtnew_zomap */
11957
    827,
11958
    /* L2_ploadruhf_zomap */
11959
    830,
11960
    /* L2_ploadruhfnew_zomap */
11961
    833,
11962
    /* L2_ploadruht_zomap */
11963
    836,
11964
    /* L2_ploadruhtnew_zomap */
11965
    839,
11966
    /* L4_add_memopb_zomap */
11967
    842,
11968
    /* L4_add_memoph_zomap */
11969
    844,
11970
    /* L4_add_memopw_zomap */
11971
    846,
11972
    /* L4_and_memopb_zomap */
11973
    848,
11974
    /* L4_and_memoph_zomap */
11975
    850,
11976
    /* L4_and_memopw_zomap */
11977
    852,
11978
    /* L4_iadd_memopb_zomap */
11979
    854,
11980
    /* L4_iadd_memoph_zomap */
11981
    856,
11982
    /* L4_iadd_memopw_zomap */
11983
    858,
11984
    /* L4_iand_memopb_zomap */
11985
    860,
11986
    /* L4_iand_memoph_zomap */
11987
    862,
11988
    /* L4_iand_memopw_zomap */
11989
    864,
11990
    /* L4_ior_memopb_zomap */
11991
    866,
11992
    /* L4_ior_memoph_zomap */
11993
    868,
11994
    /* L4_ior_memopw_zomap */
11995
    870,
11996
    /* L4_isub_memopb_zomap */
11997
    872,
11998
    /* L4_isub_memoph_zomap */
11999
    874,
12000
    /* L4_isub_memopw_zomap */
12001
    876,
12002
    /* L4_or_memopb_zomap */
12003
    878,
12004
    /* L4_or_memoph_zomap */
12005
    880,
12006
    /* L4_or_memopw_zomap */
12007
    882,
12008
    /* L4_return_map_to_raw_f */
12009
    884,
12010
    /* L4_return_map_to_raw_fnew_pnt */
12011
    885,
12012
    /* L4_return_map_to_raw_fnew_pt */
12013
    886,
12014
    /* L4_return_map_to_raw_t */
12015
    887,
12016
    /* L4_return_map_to_raw_tnew_pnt */
12017
    888,
12018
    /* L4_return_map_to_raw_tnew_pt */
12019
    889,
12020
    /* L4_sub_memopb_zomap */
12021
    890,
12022
    /* L4_sub_memoph_zomap */
12023
    892,
12024
    /* L4_sub_memopw_zomap */
12025
    894,
12026
    /* L6_deallocframe_map_to_raw */
12027
    896,
12028
    /* L6_return_map_to_raw */
12029
    896,
12030
    /* LDriw_ctr */
12031
    896,
12032
    /* LDriw_pred */
12033
    899,
12034
    /* M2_mpysmi */
12035
    902,
12036
    /* M2_mpyui */
12037
    905,
12038
    /* M2_vrcmpys_acc_s1 */
12039
    908,
12040
    /* M2_vrcmpys_s1 */
12041
    912,
12042
    /* M2_vrcmpys_s1rp */
12043
    915,
12044
    /* M7_vdmpy */
12045
    918,
12046
    /* M7_vdmpy_acc */
12047
    921,
12048
    /* PS_aligna */
12049
    925,
12050
    /* PS_alloca */
12051
    927,
12052
    /* PS_call_instrprof_custom */
12053
    930,
12054
    /* PS_call_nr */
12055
    932,
12056
    /* PS_crash */
12057
    933,
12058
    /* PS_false */
12059
    933,
12060
    /* PS_fi */
12061
    934,
12062
    /* PS_fia */
12063
    937,
12064
    /* PS_loadrb_pci */
12065
    941,
12066
    /* PS_loadrb_pcr */
12067
    947,
12068
    /* PS_loadrd_pci */
12069
    952,
12070
    /* PS_loadrd_pcr */
12071
    958,
12072
    /* PS_loadrh_pci */
12073
    963,
12074
    /* PS_loadrh_pcr */
12075
    969,
12076
    /* PS_loadri_pci */
12077
    974,
12078
    /* PS_loadri_pcr */
12079
    980,
12080
    /* PS_loadrub_pci */
12081
    985,
12082
    /* PS_loadrub_pcr */
12083
    991,
12084
    /* PS_loadruh_pci */
12085
    996,
12086
    /* PS_loadruh_pcr */
12087
    1002,
12088
    /* PS_pselect */
12089
    1007,
12090
    /* PS_qfalse */
12091
    1011,
12092
    /* PS_qtrue */
12093
    1012,
12094
    /* PS_storerb_pci */
12095
    1013,
12096
    /* PS_storerb_pcr */
12097
    1019,
12098
    /* PS_storerd_pci */
12099
    1024,
12100
    /* PS_storerd_pcr */
12101
    1030,
12102
    /* PS_storerf_pci */
12103
    1035,
12104
    /* PS_storerf_pcr */
12105
    1041,
12106
    /* PS_storerh_pci */
12107
    1046,
12108
    /* PS_storerh_pcr */
12109
    1052,
12110
    /* PS_storeri_pci */
12111
    1057,
12112
    /* PS_storeri_pcr */
12113
    1063,
12114
    /* PS_tailcall_i */
12115
    1068,
12116
    /* PS_tailcall_r */
12117
    1069,
12118
    /* PS_true */
12119
    1070,
12120
    /* PS_vdd0 */
12121
    1071,
12122
    /* PS_vloadrq_ai */
12123
    1072,
12124
    /* PS_vloadrv_ai */
12125
    1075,
12126
    /* PS_vloadrv_nt_ai */
12127
    1078,
12128
    /* PS_vloadrw_ai */
12129
    1081,
12130
    /* PS_vloadrw_nt_ai */
12131
    1084,
12132
    /* PS_vmulw */
12133
    1087,
12134
    /* PS_vmulw_acc */
12135
    1090,
12136
    /* PS_vselect */
12137
    1094,
12138
    /* PS_vsplatib */
12139
    1098,
12140
    /* PS_vsplatih */
12141
    1100,
12142
    /* PS_vsplatiw */
12143
    1102,
12144
    /* PS_vsplatrb */
12145
    1104,
12146
    /* PS_vsplatrh */
12147
    1106,
12148
    /* PS_vsplatrw */
12149
    1108,
12150
    /* PS_vstorerq_ai */
12151
    1110,
12152
    /* PS_vstorerv_ai */
12153
    1113,
12154
    /* PS_vstorerv_nt_ai */
12155
    1116,
12156
    /* PS_vstorerw_ai */
12157
    1119,
12158
    /* PS_vstorerw_nt_ai */
12159
    1122,
12160
    /* PS_wselect */
12161
    1125,
12162
    /* S2_asr_i_p_rnd_goodsyntax */
12163
    1129,
12164
    /* S2_asr_i_r_rnd_goodsyntax */
12165
    1132,
12166
    /* S2_pstorerbf_zomap */
12167
    1135,
12168
    /* S2_pstorerbnewf_zomap */
12169
    1138,
12170
    /* S2_pstorerbnewt_zomap */
12171
    1141,
12172
    /* S2_pstorerbt_zomap */
12173
    1144,
12174
    /* S2_pstorerdf_zomap */
12175
    1147,
12176
    /* S2_pstorerdt_zomap */
12177
    1150,
12178
    /* S2_pstorerff_zomap */
12179
    1153,
12180
    /* S2_pstorerft_zomap */
12181
    1156,
12182
    /* S2_pstorerhf_zomap */
12183
    1159,
12184
    /* S2_pstorerhnewf_zomap */
12185
    1162,
12186
    /* S2_pstorerhnewt_zomap */
12187
    1165,
12188
    /* S2_pstorerht_zomap */
12189
    1168,
12190
    /* S2_pstorerif_zomap */
12191
    1171,
12192
    /* S2_pstorerinewf_zomap */
12193
    1174,
12194
    /* S2_pstorerinewt_zomap */
12195
    1177,
12196
    /* S2_pstorerit_zomap */
12197
    1180,
12198
    /* S2_storerb_zomap */
12199
    1183,
12200
    /* S2_storerbnew_zomap */
12201
    1185,
12202
    /* S2_storerd_zomap */
12203
    1187,
12204
    /* S2_storerf_zomap */
12205
    1189,
12206
    /* S2_storerh_zomap */
12207
    1191,
12208
    /* S2_storerhnew_zomap */
12209
    1193,
12210
    /* S2_storeri_zomap */
12211
    1195,
12212
    /* S2_storerinew_zomap */
12213
    1197,
12214
    /* S2_tableidxb_goodsyntax */
12215
    1199,
12216
    /* S2_tableidxd_goodsyntax */
12217
    1204,
12218
    /* S2_tableidxh_goodsyntax */
12219
    1209,
12220
    /* S2_tableidxw_goodsyntax */
12221
    1214,
12222
    /* S4_pstorerbfnew_zomap */
12223
    1219,
12224
    /* S4_pstorerbnewfnew_zomap */
12225
    1222,
12226
    /* S4_pstorerbnewtnew_zomap */
12227
    1225,
12228
    /* S4_pstorerbtnew_zomap */
12229
    1228,
12230
    /* S4_pstorerdfnew_zomap */
12231
    1231,
12232
    /* S4_pstorerdtnew_zomap */
12233
    1234,
12234
    /* S4_pstorerffnew_zomap */
12235
    1237,
12236
    /* S4_pstorerftnew_zomap */
12237
    1240,
12238
    /* S4_pstorerhfnew_zomap */
12239
    1243,
12240
    /* S4_pstorerhnewfnew_zomap */
12241
    1246,
12242
    /* S4_pstorerhnewtnew_zomap */
12243
    1249,
12244
    /* S4_pstorerhtnew_zomap */
12245
    1252,
12246
    /* S4_pstorerifnew_zomap */
12247
    1255,
12248
    /* S4_pstorerinewfnew_zomap */
12249
    1258,
12250
    /* S4_pstorerinewtnew_zomap */
12251
    1261,
12252
    /* S4_pstoreritnew_zomap */
12253
    1264,
12254
    /* S4_storeirb_zomap */
12255
    1267,
12256
    /* S4_storeirbf_zomap */
12257
    1269,
12258
    /* S4_storeirbfnew_zomap */
12259
    1272,
12260
    /* S4_storeirbt_zomap */
12261
    1275,
12262
    /* S4_storeirbtnew_zomap */
12263
    1278,
12264
    /* S4_storeirh_zomap */
12265
    1281,
12266
    /* S4_storeirhf_zomap */
12267
    1283,
12268
    /* S4_storeirhfnew_zomap */
12269
    1286,
12270
    /* S4_storeirht_zomap */
12271
    1289,
12272
    /* S4_storeirhtnew_zomap */
12273
    1292,
12274
    /* S4_storeiri_zomap */
12275
    1295,
12276
    /* S4_storeirif_zomap */
12277
    1297,
12278
    /* S4_storeirifnew_zomap */
12279
    1300,
12280
    /* S4_storeirit_zomap */
12281
    1303,
12282
    /* S4_storeiritnew_zomap */
12283
    1306,
12284
    /* S5_asrhub_rnd_sat_goodsyntax */
12285
    1309,
12286
    /* S5_vasrhrnd_goodsyntax */
12287
    1312,
12288
    /* S6_allocframe_to_raw */
12289
    1315,
12290
    /* STriw_ctr */
12291
    1316,
12292
    /* STriw_pred */
12293
    1319,
12294
    /* V6_MAP_equb */
12295
    1322,
12296
    /* V6_MAP_equb_and */
12297
    1325,
12298
    /* V6_MAP_equb_ior */
12299
    1329,
12300
    /* V6_MAP_equb_xor */
12301
    1333,
12302
    /* V6_MAP_equh */
12303
    1337,
12304
    /* V6_MAP_equh_and */
12305
    1340,
12306
    /* V6_MAP_equh_ior */
12307
    1344,
12308
    /* V6_MAP_equh_xor */
12309
    1348,
12310
    /* V6_MAP_equw */
12311
    1352,
12312
    /* V6_MAP_equw_and */
12313
    1355,
12314
    /* V6_MAP_equw_ior */
12315
    1359,
12316
    /* V6_MAP_equw_xor */
12317
    1363,
12318
    /* V6_dbl_ld0 */
12319
    1367,
12320
    /* V6_dbl_st0 */
12321
    1369,
12322
    /* V6_extractw_alt */
12323
    1371,
12324
    /* V6_hi */
12325
    1374,
12326
    /* V6_ld0 */
12327
    1376,
12328
    /* V6_ldcnp0 */
12329
    1378,
12330
    /* V6_ldcnpnt0 */
12331
    1381,
12332
    /* V6_ldcp0 */
12333
    1384,
12334
    /* V6_ldcpnt0 */
12335
    1387,
12336
    /* V6_ldnp0 */
12337
    1390,
12338
    /* V6_ldnpnt0 */
12339
    1393,
12340
    /* V6_ldnt0 */
12341
    1396,
12342
    /* V6_ldp0 */
12343
    1398,
12344
    /* V6_ldpnt0 */
12345
    1401,
12346
    /* V6_ldtnp0 */
12347
    1404,
12348
    /* V6_ldtnpnt0 */
12349
    1407,
12350
    /* V6_ldtp0 */
12351
    1410,
12352
    /* V6_ldtpnt0 */
12353
    1413,
12354
    /* V6_ldu0 */
12355
    1416,
12356
    /* V6_lo */
12357
    1418,
12358
    /* V6_st0 */
12359
    1420,
12360
    /* V6_stn0 */
12361
    1422,
12362
    /* V6_stnnt0 */
12363
    1424,
12364
    /* V6_stnp0 */
12365
    1426,
12366
    /* V6_stnpnt0 */
12367
    1429,
12368
    /* V6_stnq0 */
12369
    1432,
12370
    /* V6_stnqnt0 */
12371
    1435,
12372
    /* V6_stnt0 */
12373
    1438,
12374
    /* V6_stp0 */
12375
    1440,
12376
    /* V6_stpnt0 */
12377
    1443,
12378
    /* V6_stq0 */
12379
    1446,
12380
    /* V6_stqnt0 */
12381
    1449,
12382
    /* V6_stu0 */
12383
    1452,
12384
    /* V6_stunp0 */
12385
    1454,
12386
    /* V6_stup0 */
12387
    1457,
12388
    /* V6_v10mpyubs10 */
12389
    1460,
12390
    /* V6_v10mpyubs10_vxx */
12391
    1464,
12392
    /* V6_v6mpyhubs10_alt */
12393
    1469,
12394
    /* V6_v6mpyvubs10_alt */
12395
    1473,
12396
    /* V6_vabsb_alt */
12397
    1477,
12398
    /* V6_vabsb_sat_alt */
12399
    1479,
12400
    /* V6_vabsdiffh_alt */
12401
    1481,
12402
    /* V6_vabsdiffub_alt */
12403
    1484,
12404
    /* V6_vabsdiffuh_alt */
12405
    1487,
12406
    /* V6_vabsdiffw_alt */
12407
    1490,
12408
    /* V6_vabsh_alt */
12409
    1493,
12410
    /* V6_vabsh_sat_alt */
12411
    1495,
12412
    /* V6_vabsub_alt */
12413
    1497,
12414
    /* V6_vabsuh_alt */
12415
    1499,
12416
    /* V6_vabsuw_alt */
12417
    1501,
12418
    /* V6_vabsw_alt */
12419
    1503,
12420
    /* V6_vabsw_sat_alt */
12421
    1505,
12422
    /* V6_vaddb_alt */
12423
    1507,
12424
    /* V6_vaddb_dv_alt */
12425
    1510,
12426
    /* V6_vaddbnq_alt */
12427
    1513,
12428
    /* V6_vaddbq_alt */
12429
    1517,
12430
    /* V6_vaddbsat_alt */
12431
    1521,
12432
    /* V6_vaddbsat_dv_alt */
12433
    1524,
12434
    /* V6_vaddh_alt */
12435
    1527,
12436
    /* V6_vaddh_dv_alt */
12437
    1530,
12438
    /* V6_vaddhnq_alt */
12439
    1533,
12440
    /* V6_vaddhq_alt */
12441
    1537,
12442
    /* V6_vaddhsat_alt */
12443
    1541,
12444
    /* V6_vaddhsat_dv_alt */
12445
    1544,
12446
    /* V6_vaddhw_acc_alt */
12447
    1547,
12448
    /* V6_vaddhw_alt */
12449
    1551,
12450
    /* V6_vaddubh_acc_alt */
12451
    1554,
12452
    /* V6_vaddubh_alt */
12453
    1558,
12454
    /* V6_vaddubsat_alt */
12455
    1561,
12456
    /* V6_vaddubsat_dv_alt */
12457
    1564,
12458
    /* V6_vadduhsat_alt */
12459
    1567,
12460
    /* V6_vadduhsat_dv_alt */
12461
    1570,
12462
    /* V6_vadduhw_acc_alt */
12463
    1573,
12464
    /* V6_vadduhw_alt */
12465
    1577,
12466
    /* V6_vadduwsat_alt */
12467
    1580,
12468
    /* V6_vadduwsat_dv_alt */
12469
    1583,
12470
    /* V6_vaddw_alt */
12471
    1586,
12472
    /* V6_vaddw_dv_alt */
12473
    1589,
12474
    /* V6_vaddwnq_alt */
12475
    1592,
12476
    /* V6_vaddwq_alt */
12477
    1596,
12478
    /* V6_vaddwsat_alt */
12479
    1600,
12480
    /* V6_vaddwsat_dv_alt */
12481
    1603,
12482
    /* V6_vandnqrt_acc_alt */
12483
    1606,
12484
    /* V6_vandnqrt_alt */
12485
    1610,
12486
    /* V6_vandqrt_acc_alt */
12487
    1613,
12488
    /* V6_vandqrt_alt */
12489
    1617,
12490
    /* V6_vandvrt_acc_alt */
12491
    1620,
12492
    /* V6_vandvrt_alt */
12493
    1624,
12494
    /* V6_vaslh_acc_alt */
12495
    1627,
12496
    /* V6_vaslh_alt */
12497
    1631,
12498
    /* V6_vaslhv_alt */
12499
    1634,
12500
    /* V6_vaslw_acc_alt */
12501
    1637,
12502
    /* V6_vaslw_alt */
12503
    1641,
12504
    /* V6_vaslwv_alt */
12505
    1644,
12506
    /* V6_vasr_into_alt */
12507
    1647,
12508
    /* V6_vasrh_acc_alt */
12509
    1651,
12510
    /* V6_vasrh_alt */
12511
    1655,
12512
    /* V6_vasrhv_alt */
12513
    1658,
12514
    /* V6_vasrw_acc_alt */
12515
    1661,
12516
    /* V6_vasrw_alt */
12517
    1665,
12518
    /* V6_vasrwv_alt */
12519
    1668,
12520
    /* V6_vassignp */
12521
    1671,
12522
    /* V6_vavgb_alt */
12523
    1673,
12524
    /* V6_vavgbrnd_alt */
12525
    1676,
12526
    /* V6_vavgh_alt */
12527
    1679,
12528
    /* V6_vavghrnd_alt */
12529
    1682,
12530
    /* V6_vavgub_alt */
12531
    1685,
12532
    /* V6_vavgubrnd_alt */
12533
    1688,
12534
    /* V6_vavguh_alt */
12535
    1691,
12536
    /* V6_vavguhrnd_alt */
12537
    1694,
12538
    /* V6_vavguw_alt */
12539
    1697,
12540
    /* V6_vavguwrnd_alt */
12541
    1700,
12542
    /* V6_vavgw_alt */
12543
    1703,
12544
    /* V6_vavgwrnd_alt */
12545
    1706,
12546
    /* V6_vcl0h_alt */
12547
    1709,
12548
    /* V6_vcl0w_alt */
12549
    1711,
12550
    /* V6_vd0 */
12551
    1713,
12552
    /* V6_vdd0 */
12553
    1714,
12554
    /* V6_vdealb4w_alt */
12555
    1715,
12556
    /* V6_vdealb_alt */
12557
    1718,
12558
    /* V6_vdealh_alt */
12559
    1720,
12560
    /* V6_vdmpybus_acc_alt */
12561
    1722,
12562
    /* V6_vdmpybus_alt */
12563
    1726,
12564
    /* V6_vdmpybus_dv_acc_alt */
12565
    1729,
12566
    /* V6_vdmpybus_dv_alt */
12567
    1733,
12568
    /* V6_vdmpyhb_acc_alt */
12569
    1736,
12570
    /* V6_vdmpyhb_alt */
12571
    1740,
12572
    /* V6_vdmpyhb_dv_acc_alt */
12573
    1743,
12574
    /* V6_vdmpyhb_dv_alt */
12575
    1747,
12576
    /* V6_vdmpyhisat_acc_alt */
12577
    1750,
12578
    /* V6_vdmpyhisat_alt */
12579
    1754,
12580
    /* V6_vdmpyhsat_acc_alt */
12581
    1757,
12582
    /* V6_vdmpyhsat_alt */
12583
    1761,
12584
    /* V6_vdmpyhsuisat_acc_alt */
12585
    1764,
12586
    /* V6_vdmpyhsuisat_alt */
12587
    1768,
12588
    /* V6_vdmpyhsusat_acc_alt */
12589
    1771,
12590
    /* V6_vdmpyhsusat_alt */
12591
    1775,
12592
    /* V6_vdmpyhvsat_acc_alt */
12593
    1778,
12594
    /* V6_vdmpyhvsat_alt */
12595
    1782,
12596
    /* V6_vdsaduh_acc_alt */
12597
    1785,
12598
    /* V6_vdsaduh_alt */
12599
    1789,
12600
    /* V6_vgathermh_pseudo */
12601
    1792,
12602
    /* V6_vgathermhq_pseudo */
12603
    1797,
12604
    /* V6_vgathermhw_pseudo */
12605
    1803,
12606
    /* V6_vgathermhwq_pseudo */
12607
    1808,
12608
    /* V6_vgathermw_pseudo */
12609
    1814,
12610
    /* V6_vgathermwq_pseudo */
12611
    1819,
12612
    /* V6_vlsrh_alt */
12613
    1825,
12614
    /* V6_vlsrhv_alt */
12615
    1828,
12616
    /* V6_vlsrw_alt */
12617
    1831,
12618
    /* V6_vlsrwv_alt */
12619
    1834,
12620
    /* V6_vmaxb_alt */
12621
    1837,
12622
    /* V6_vmaxh_alt */
12623
    1840,
12624
    /* V6_vmaxub_alt */
12625
    1843,
12626
    /* V6_vmaxuh_alt */
12627
    1846,
12628
    /* V6_vmaxw_alt */
12629
    1849,
12630
    /* V6_vminb_alt */
12631
    1852,
12632
    /* V6_vminh_alt */
12633
    1855,
12634
    /* V6_vminub_alt */
12635
    1858,
12636
    /* V6_vminuh_alt */
12637
    1861,
12638
    /* V6_vminw_alt */
12639
    1864,
12640
    /* V6_vmpabus_acc_alt */
12641
    1867,
12642
    /* V6_vmpabus_alt */
12643
    1871,
12644
    /* V6_vmpabusv_alt */
12645
    1874,
12646
    /* V6_vmpabuu_acc_alt */
12647
    1877,
12648
    /* V6_vmpabuu_alt */
12649
    1881,
12650
    /* V6_vmpabuuv_alt */
12651
    1884,
12652
    /* V6_vmpahb_acc_alt */
12653
    1887,
12654
    /* V6_vmpahb_alt */
12655
    1891,
12656
    /* V6_vmpauhb_acc_alt */
12657
    1894,
12658
    /* V6_vmpauhb_alt */
12659
    1898,
12660
    /* V6_vmpybus_acc_alt */
12661
    1901,
12662
    /* V6_vmpybus_alt */
12663
    1905,
12664
    /* V6_vmpybusv_acc_alt */
12665
    1908,
12666
    /* V6_vmpybusv_alt */
12667
    1912,
12668
    /* V6_vmpybv_acc_alt */
12669
    1915,
12670
    /* V6_vmpybv_alt */
12671
    1919,
12672
    /* V6_vmpyewuh_alt */
12673
    1922,
12674
    /* V6_vmpyh_acc_alt */
12675
    1925,
12676
    /* V6_vmpyh_alt */
12677
    1929,
12678
    /* V6_vmpyhsat_acc_alt */
12679
    1932,
12680
    /* V6_vmpyhsrs_alt */
12681
    1936,
12682
    /* V6_vmpyhss_alt */
12683
    1939,
12684
    /* V6_vmpyhus_acc_alt */
12685
    1942,
12686
    /* V6_vmpyhus_alt */
12687
    1946,
12688
    /* V6_vmpyhv_acc_alt */
12689
    1949,
12690
    /* V6_vmpyhv_alt */
12691
    1953,
12692
    /* V6_vmpyhvsrs_alt */
12693
    1956,
12694
    /* V6_vmpyiewh_acc_alt */
12695
    1959,
12696
    /* V6_vmpyiewuh_acc_alt */
12697
    1963,
12698
    /* V6_vmpyiewuh_alt */
12699
    1967,
12700
    /* V6_vmpyih_acc_alt */
12701
    1970,
12702
    /* V6_vmpyih_alt */
12703
    1974,
12704
    /* V6_vmpyihb_acc_alt */
12705
    1977,
12706
    /* V6_vmpyihb_alt */
12707
    1981,
12708
    /* V6_vmpyiowh_alt */
12709
    1984,
12710
    /* V6_vmpyiwb_acc_alt */
12711
    1987,
12712
    /* V6_vmpyiwb_alt */
12713
    1991,
12714
    /* V6_vmpyiwh_acc_alt */
12715
    1994,
12716
    /* V6_vmpyiwh_alt */
12717
    1998,
12718
    /* V6_vmpyiwub_acc_alt */
12719
    2001,
12720
    /* V6_vmpyiwub_alt */
12721
    2005,
12722
    /* V6_vmpyowh_alt */
12723
    2008,
12724
    /* V6_vmpyowh_rnd_alt */
12725
    2011,
12726
    /* V6_vmpyowh_rnd_sacc_alt */
12727
    2014,
12728
    /* V6_vmpyowh_sacc_alt */
12729
    2018,
12730
    /* V6_vmpyub_acc_alt */
12731
    2022,
12732
    /* V6_vmpyub_alt */
12733
    2026,
12734
    /* V6_vmpyubv_acc_alt */
12735
    2029,
12736
    /* V6_vmpyubv_alt */
12737
    2033,
12738
    /* V6_vmpyuh_acc_alt */
12739
    2036,
12740
    /* V6_vmpyuh_alt */
12741
    2040,
12742
    /* V6_vmpyuhv_acc_alt */
12743
    2043,
12744
    /* V6_vmpyuhv_alt */
12745
    2047,
12746
    /* V6_vnavgb_alt */
12747
    2050,
12748
    /* V6_vnavgh_alt */
12749
    2053,
12750
    /* V6_vnavgub_alt */
12751
    2056,
12752
    /* V6_vnavgw_alt */
12753
    2059,
12754
    /* V6_vnormamth_alt */
12755
    2062,
12756
    /* V6_vnormamtw_alt */
12757
    2064,
12758
    /* V6_vpackeb_alt */
12759
    2066,
12760
    /* V6_vpackeh_alt */
12761
    2069,
12762
    /* V6_vpackhb_sat_alt */
12763
    2072,
12764
    /* V6_vpackhub_sat_alt */
12765
    2075,
12766
    /* V6_vpackob_alt */
12767
    2078,
12768
    /* V6_vpackoh_alt */
12769
    2081,
12770
    /* V6_vpackwh_sat_alt */
12771
    2084,
12772
    /* V6_vpackwuh_sat_alt */
12773
    2087,
12774
    /* V6_vpopcounth_alt */
12775
    2090,
12776
    /* V6_vrmpybub_rtt_acc_alt */
12777
    2092,
12778
    /* V6_vrmpybub_rtt_alt */
12779
    2096,
12780
    /* V6_vrmpybus_acc_alt */
12781
    2099,
12782
    /* V6_vrmpybus_alt */
12783
    2103,
12784
    /* V6_vrmpybusi_acc_alt */
12785
    2106,
12786
    /* V6_vrmpybusi_alt */
12787
    2111,
12788
    /* V6_vrmpybusv_acc_alt */
12789
    2115,
12790
    /* V6_vrmpybusv_alt */
12791
    2119,
12792
    /* V6_vrmpybv_acc_alt */
12793
    2122,
12794
    /* V6_vrmpybv_alt */
12795
    2126,
12796
    /* V6_vrmpyub_acc_alt */
12797
    2129,
12798
    /* V6_vrmpyub_alt */
12799
    2133,
12800
    /* V6_vrmpyub_rtt_acc_alt */
12801
    2136,
12802
    /* V6_vrmpyub_rtt_alt */
12803
    2140,
12804
    /* V6_vrmpyubi_acc_alt */
12805
    2143,
12806
    /* V6_vrmpyubi_alt */
12807
    2148,
12808
    /* V6_vrmpyubv_acc_alt */
12809
    2152,
12810
    /* V6_vrmpyubv_alt */
12811
    2156,
12812
    /* V6_vrotr_alt */
12813
    2159,
12814
    /* V6_vroundhb_alt */
12815
    2162,
12816
    /* V6_vroundhub_alt */
12817
    2165,
12818
    /* V6_vrounduhub_alt */
12819
    2168,
12820
    /* V6_vrounduwuh_alt */
12821
    2171,
12822
    /* V6_vroundwh_alt */
12823
    2174,
12824
    /* V6_vroundwuh_alt */
12825
    2177,
12826
    /* V6_vrsadubi_acc_alt */
12827
    2180,
12828
    /* V6_vrsadubi_alt */
12829
    2185,
12830
    /* V6_vsathub_alt */
12831
    2189,
12832
    /* V6_vsatuwuh_alt */
12833
    2192,
12834
    /* V6_vsatwh_alt */
12835
    2195,
12836
    /* V6_vsb_alt */
12837
    2198,
12838
    /* V6_vscattermh_add_alt */
12839
    2200,
12840
    /* V6_vscattermh_alt */
12841
    2204,
12842
    /* V6_vscattermhq_alt */
12843
    2208,
12844
    /* V6_vscattermw_add_alt */
12845
    2213,
12846
    /* V6_vscattermw_alt */
12847
    2217,
12848
    /* V6_vscattermwh_add_alt */
12849
    2221,
12850
    /* V6_vscattermwh_alt */
12851
    2225,
12852
    /* V6_vscattermwhq_alt */
12853
    2229,
12854
    /* V6_vscattermwq_alt */
12855
    2234,
12856
    /* V6_vsh_alt */
12857
    2239,
12858
    /* V6_vshufeh_alt */
12859
    2241,
12860
    /* V6_vshuffb_alt */
12861
    2244,
12862
    /* V6_vshuffeb_alt */
12863
    2246,
12864
    /* V6_vshuffh_alt */
12865
    2249,
12866
    /* V6_vshuffob_alt */
12867
    2251,
12868
    /* V6_vshufoeb_alt */
12869
    2254,
12870
    /* V6_vshufoeh_alt */
12871
    2257,
12872
    /* V6_vshufoh_alt */
12873
    2260,
12874
    /* V6_vsubb_alt */
12875
    2263,
12876
    /* V6_vsubb_dv_alt */
12877
    2266,
12878
    /* V6_vsubbnq_alt */
12879
    2269,
12880
    /* V6_vsubbq_alt */
12881
    2273,
12882
    /* V6_vsubbsat_alt */
12883
    2277,
12884
    /* V6_vsubbsat_dv_alt */
12885
    2280,
12886
    /* V6_vsubh_alt */
12887
    2283,
12888
    /* V6_vsubh_dv_alt */
12889
    2286,
12890
    /* V6_vsubhnq_alt */
12891
    2289,
12892
    /* V6_vsubhq_alt */
12893
    2293,
12894
    /* V6_vsubhsat_alt */
12895
    2297,
12896
    /* V6_vsubhsat_dv_alt */
12897
    2300,
12898
    /* V6_vsubhw_alt */
12899
    2303,
12900
    /* V6_vsububh_alt */
12901
    2306,
12902
    /* V6_vsububsat_alt */
12903
    2309,
12904
    /* V6_vsububsat_dv_alt */
12905
    2312,
12906
    /* V6_vsubuhsat_alt */
12907
    2315,
12908
    /* V6_vsubuhsat_dv_alt */
12909
    2318,
12910
    /* V6_vsubuhw_alt */
12911
    2321,
12912
    /* V6_vsubuwsat_alt */
12913
    2324,
12914
    /* V6_vsubuwsat_dv_alt */
12915
    2327,
12916
    /* V6_vsubw_alt */
12917
    2330,
12918
    /* V6_vsubw_dv_alt */
12919
    2333,
12920
    /* V6_vsubwnq_alt */
12921
    2336,
12922
    /* V6_vsubwq_alt */
12923
    2340,
12924
    /* V6_vsubwsat_alt */
12925
    2344,
12926
    /* V6_vsubwsat_dv_alt */
12927
    2347,
12928
    /* V6_vtmpyb_acc_alt */
12929
    2350,
12930
    /* V6_vtmpyb_alt */
12931
    2354,
12932
    /* V6_vtmpybus_acc_alt */
12933
    2357,
12934
    /* V6_vtmpybus_alt */
12935
    2361,
12936
    /* V6_vtmpyhb_acc_alt */
12937
    2364,
12938
    /* V6_vtmpyhb_alt */
12939
    2368,
12940
    /* V6_vtran2x2_map */
12941
    2371,
12942
    /* V6_vunpackb_alt */
12943
    2376,
12944
    /* V6_vunpackh_alt */
12945
    2378,
12946
    /* V6_vunpackob_alt */
12947
    2380,
12948
    /* V6_vunpackoh_alt */
12949
    2383,
12950
    /* V6_vunpackub_alt */
12951
    2386,
12952
    /* V6_vunpackuh_alt */
12953
    2388,
12954
    /* V6_vzb_alt */
12955
    2390,
12956
    /* V6_vzh_alt */
12957
    2392,
12958
    /* V6_zld0 */
12959
    2394,
12960
    /* V6_zldp0 */
12961
    2395,
12962
    /* Y2_crswap_old */
12963
    2397,
12964
    /* Y2_dcfetch */
12965
    2399,
12966
    /* Y2_k1lock_map */
12967
    2400,
12968
    /* Y2_k1unlock_map */
12969
    2400,
12970
    /* dup_A2_add */
12971
    2400,
12972
    /* dup_A2_addi */
12973
    2403,
12974
    /* dup_A2_andir */
12975
    2406,
12976
    /* dup_A2_combineii */
12977
    2409,
12978
    /* dup_A2_sxtb */
12979
    2412,
12980
    /* dup_A2_sxth */
12981
    2414,
12982
    /* dup_A2_tfr */
12983
    2416,
12984
    /* dup_A2_tfrsi */
12985
    2418,
12986
    /* dup_A2_zxtb */
12987
    2420,
12988
    /* dup_A2_zxth */
12989
    2422,
12990
    /* dup_A4_combineii */
12991
    2424,
12992
    /* dup_A4_combineir */
12993
    2427,
12994
    /* dup_A4_combineri */
12995
    2430,
12996
    /* dup_C2_cmoveif */
12997
    2433,
12998
    /* dup_C2_cmoveit */
12999
    2436,
13000
    /* dup_C2_cmovenewif */
13001
    2439,
13002
    /* dup_C2_cmovenewit */
13003
    2442,
13004
    /* dup_C2_cmpeqi */
13005
    2445,
13006
    /* dup_L2_deallocframe */
13007
    2448,
13008
    /* dup_L2_loadrb_io */
13009
    2450,
13010
    /* dup_L2_loadrd_io */
13011
    2453,
13012
    /* dup_L2_loadrh_io */
13013
    2456,
13014
    /* dup_L2_loadri_io */
13015
    2459,
13016
    /* dup_L2_loadrub_io */
13017
    2462,
13018
    /* dup_L2_loadruh_io */
13019
    2465,
13020
    /* dup_S2_allocframe */
13021
    2468,
13022
    /* dup_S2_storerb_io */
13023
    2471,
13024
    /* dup_S2_storerd_io */
13025
    2474,
13026
    /* dup_S2_storerh_io */
13027
    2477,
13028
    /* dup_S2_storeri_io */
13029
    2480,
13030
    /* dup_S4_storeirb_io */
13031
    2483,
13032
    /* dup_S4_storeiri_io */
13033
    2486,
13034
    /* A2_abs */
13035
    2489,
13036
    /* A2_absp */
13037
    2491,
13038
    /* A2_abssat */
13039
    2493,
13040
    /* A2_add */
13041
    2495,
13042
    /* A2_addh_h16_hh */
13043
    2498,
13044
    /* A2_addh_h16_hl */
13045
    2501,
13046
    /* A2_addh_h16_lh */
13047
    2504,
13048
    /* A2_addh_h16_ll */
13049
    2507,
13050
    /* A2_addh_h16_sat_hh */
13051
    2510,
13052
    /* A2_addh_h16_sat_hl */
13053
    2513,
13054
    /* A2_addh_h16_sat_lh */
13055
    2516,
13056
    /* A2_addh_h16_sat_ll */
13057
    2519,
13058
    /* A2_addh_l16_hl */
13059
    2522,
13060
    /* A2_addh_l16_ll */
13061
    2525,
13062
    /* A2_addh_l16_sat_hl */
13063
    2528,
13064
    /* A2_addh_l16_sat_ll */
13065
    2531,
13066
    /* A2_addi */
13067
    2534,
13068
    /* A2_addp */
13069
    2537,
13070
    /* A2_addpsat */
13071
    2540,
13072
    /* A2_addsat */
13073
    2543,
13074
    /* A2_addsph */
13075
    2546,
13076
    /* A2_addspl */
13077
    2549,
13078
    /* A2_and */
13079
    2552,
13080
    /* A2_andir */
13081
    2555,
13082
    /* A2_andp */
13083
    2558,
13084
    /* A2_aslh */
13085
    2561,
13086
    /* A2_asrh */
13087
    2563,
13088
    /* A2_combine_hh */
13089
    2565,
13090
    /* A2_combine_hl */
13091
    2568,
13092
    /* A2_combine_lh */
13093
    2571,
13094
    /* A2_combine_ll */
13095
    2574,
13096
    /* A2_combineii */
13097
    2577,
13098
    /* A2_combinew */
13099
    2580,
13100
    /* A2_max */
13101
    2583,
13102
    /* A2_maxp */
13103
    2586,
13104
    /* A2_maxu */
13105
    2589,
13106
    /* A2_maxup */
13107
    2592,
13108
    /* A2_min */
13109
    2595,
13110
    /* A2_minp */
13111
    2598,
13112
    /* A2_minu */
13113
    2601,
13114
    /* A2_minup */
13115
    2604,
13116
    /* A2_negp */
13117
    2607,
13118
    /* A2_negsat */
13119
    2609,
13120
    /* A2_nop */
13121
    2611,
13122
    /* A2_notp */
13123
    2611,
13124
    /* A2_or */
13125
    2613,
13126
    /* A2_orir */
13127
    2616,
13128
    /* A2_orp */
13129
    2619,
13130
    /* A2_paddf */
13131
    2622,
13132
    /* A2_paddfnew */
13133
    2626,
13134
    /* A2_paddif */
13135
    2630,
13136
    /* A2_paddifnew */
13137
    2634,
13138
    /* A2_paddit */
13139
    2638,
13140
    /* A2_padditnew */
13141
    2642,
13142
    /* A2_paddt */
13143
    2646,
13144
    /* A2_paddtnew */
13145
    2650,
13146
    /* A2_pandf */
13147
    2654,
13148
    /* A2_pandfnew */
13149
    2658,
13150
    /* A2_pandt */
13151
    2662,
13152
    /* A2_pandtnew */
13153
    2666,
13154
    /* A2_porf */
13155
    2670,
13156
    /* A2_porfnew */
13157
    2674,
13158
    /* A2_port */
13159
    2678,
13160
    /* A2_portnew */
13161
    2682,
13162
    /* A2_psubf */
13163
    2686,
13164
    /* A2_psubfnew */
13165
    2690,
13166
    /* A2_psubt */
13167
    2694,
13168
    /* A2_psubtnew */
13169
    2698,
13170
    /* A2_pxorf */
13171
    2702,
13172
    /* A2_pxorfnew */
13173
    2706,
13174
    /* A2_pxort */
13175
    2710,
13176
    /* A2_pxortnew */
13177
    2714,
13178
    /* A2_roundsat */
13179
    2718,
13180
    /* A2_sat */
13181
    2720,
13182
    /* A2_satb */
13183
    2722,
13184
    /* A2_sath */
13185
    2724,
13186
    /* A2_satub */
13187
    2726,
13188
    /* A2_satuh */
13189
    2728,
13190
    /* A2_sub */
13191
    2730,
13192
    /* A2_subh_h16_hh */
13193
    2733,
13194
    /* A2_subh_h16_hl */
13195
    2736,
13196
    /* A2_subh_h16_lh */
13197
    2739,
13198
    /* A2_subh_h16_ll */
13199
    2742,
13200
    /* A2_subh_h16_sat_hh */
13201
    2745,
13202
    /* A2_subh_h16_sat_hl */
13203
    2748,
13204
    /* A2_subh_h16_sat_lh */
13205
    2751,
13206
    /* A2_subh_h16_sat_ll */
13207
    2754,
13208
    /* A2_subh_l16_hl */
13209
    2757,
13210
    /* A2_subh_l16_ll */
13211
    2760,
13212
    /* A2_subh_l16_sat_hl */
13213
    2763,
13214
    /* A2_subh_l16_sat_ll */
13215
    2766,
13216
    /* A2_subp */
13217
    2769,
13218
    /* A2_subri */
13219
    2772,
13220
    /* A2_subsat */
13221
    2775,
13222
    /* A2_svaddh */
13223
    2778,
13224
    /* A2_svaddhs */
13225
    2781,
13226
    /* A2_svadduhs */
13227
    2784,
13228
    /* A2_svavgh */
13229
    2787,
13230
    /* A2_svavghs */
13231
    2790,
13232
    /* A2_svnavgh */
13233
    2793,
13234
    /* A2_svsubh */
13235
    2796,
13236
    /* A2_svsubhs */
13237
    2799,
13238
    /* A2_svsubuhs */
13239
    2802,
13240
    /* A2_swiz */
13241
    2805,
13242
    /* A2_sxtb */
13243
    2807,
13244
    /* A2_sxth */
13245
    2809,
13246
    /* A2_sxtw */
13247
    2811,
13248
    /* A2_tfr */
13249
    2813,
13250
    /* A2_tfrcrr */
13251
    2815,
13252
    /* A2_tfrih */
13253
    2817,
13254
    /* A2_tfril */
13255
    2820,
13256
    /* A2_tfrrcr */
13257
    2823,
13258
    /* A2_tfrsi */
13259
    2825,
13260
    /* A2_vabsh */
13261
    2827,
13262
    /* A2_vabshsat */
13263
    2829,
13264
    /* A2_vabsw */
13265
    2831,
13266
    /* A2_vabswsat */
13267
    2833,
13268
    /* A2_vaddh */
13269
    2835,
13270
    /* A2_vaddhs */
13271
    2838,
13272
    /* A2_vaddub */
13273
    2841,
13274
    /* A2_vaddubs */
13275
    2844,
13276
    /* A2_vadduhs */
13277
    2847,
13278
    /* A2_vaddw */
13279
    2850,
13280
    /* A2_vaddws */
13281
    2853,
13282
    /* A2_vavgh */
13283
    2856,
13284
    /* A2_vavghcr */
13285
    2859,
13286
    /* A2_vavghr */
13287
    2862,
13288
    /* A2_vavgub */
13289
    2865,
13290
    /* A2_vavgubr */
13291
    2868,
13292
    /* A2_vavguh */
13293
    2871,
13294
    /* A2_vavguhr */
13295
    2874,
13296
    /* A2_vavguw */
13297
    2877,
13298
    /* A2_vavguwr */
13299
    2880,
13300
    /* A2_vavgw */
13301
    2883,
13302
    /* A2_vavgwcr */
13303
    2886,
13304
    /* A2_vavgwr */
13305
    2889,
13306
    /* A2_vcmpbeq */
13307
    2892,
13308
    /* A2_vcmpbgtu */
13309
    2895,
13310
    /* A2_vcmpheq */
13311
    2898,
13312
    /* A2_vcmphgt */
13313
    2901,
13314
    /* A2_vcmphgtu */
13315
    2904,
13316
    /* A2_vcmpweq */
13317
    2907,
13318
    /* A2_vcmpwgt */
13319
    2910,
13320
    /* A2_vcmpwgtu */
13321
    2913,
13322
    /* A2_vconj */
13323
    2916,
13324
    /* A2_vmaxb */
13325
    2918,
13326
    /* A2_vmaxh */
13327
    2921,
13328
    /* A2_vmaxub */
13329
    2924,
13330
    /* A2_vmaxuh */
13331
    2927,
13332
    /* A2_vmaxuw */
13333
    2930,
13334
    /* A2_vmaxw */
13335
    2933,
13336
    /* A2_vminb */
13337
    2936,
13338
    /* A2_vminh */
13339
    2939,
13340
    /* A2_vminub */
13341
    2942,
13342
    /* A2_vminuh */
13343
    2945,
13344
    /* A2_vminuw */
13345
    2948,
13346
    /* A2_vminw */
13347
    2951,
13348
    /* A2_vnavgh */
13349
    2954,
13350
    /* A2_vnavghcr */
13351
    2957,
13352
    /* A2_vnavghr */
13353
    2960,
13354
    /* A2_vnavgw */
13355
    2963,
13356
    /* A2_vnavgwcr */
13357
    2966,
13358
    /* A2_vnavgwr */
13359
    2969,
13360
    /* A2_vraddub */
13361
    2972,
13362
    /* A2_vraddub_acc */
13363
    2975,
13364
    /* A2_vrsadub */
13365
    2979,
13366
    /* A2_vrsadub_acc */
13367
    2982,
13368
    /* A2_vsubh */
13369
    2986,
13370
    /* A2_vsubhs */
13371
    2989,
13372
    /* A2_vsubub */
13373
    2992,
13374
    /* A2_vsububs */
13375
    2995,
13376
    /* A2_vsubuhs */
13377
    2998,
13378
    /* A2_vsubw */
13379
    3001,
13380
    /* A2_vsubws */
13381
    3004,
13382
    /* A2_xor */
13383
    3007,
13384
    /* A2_xorp */
13385
    3010,
13386
    /* A2_zxth */
13387
    3013,
13388
    /* A4_addp_c */
13389
    3015,
13390
    /* A4_andn */
13391
    3020,
13392
    /* A4_andnp */
13393
    3023,
13394
    /* A4_bitsplit */
13395
    3026,
13396
    /* A4_bitspliti */
13397
    3029,
13398
    /* A4_boundscheck_hi */
13399
    3032,
13400
    /* A4_boundscheck_lo */
13401
    3035,
13402
    /* A4_cmpbeq */
13403
    3038,
13404
    /* A4_cmpbeqi */
13405
    3041,
13406
    /* A4_cmpbgt */
13407
    3044,
13408
    /* A4_cmpbgti */
13409
    3047,
13410
    /* A4_cmpbgtu */
13411
    3050,
13412
    /* A4_cmpbgtui */
13413
    3053,
13414
    /* A4_cmpheq */
13415
    3056,
13416
    /* A4_cmpheqi */
13417
    3059,
13418
    /* A4_cmphgt */
13419
    3062,
13420
    /* A4_cmphgti */
13421
    3065,
13422
    /* A4_cmphgtu */
13423
    3068,
13424
    /* A4_cmphgtui */
13425
    3071,
13426
    /* A4_combineii */
13427
    3074,
13428
    /* A4_combineir */
13429
    3077,
13430
    /* A4_combineri */
13431
    3080,
13432
    /* A4_cround_ri */
13433
    3083,
13434
    /* A4_cround_rr */
13435
    3086,
13436
    /* A4_ext */
13437
    3089,
13438
    /* A4_modwrapu */
13439
    3090,
13440
    /* A4_orn */
13441
    3093,
13442
    /* A4_ornp */
13443
    3096,
13444
    /* A4_paslhf */
13445
    3099,
13446
    /* A4_paslhfnew */
13447
    3102,
13448
    /* A4_paslht */
13449
    3105,
13450
    /* A4_paslhtnew */
13451
    3108,
13452
    /* A4_pasrhf */
13453
    3111,
13454
    /* A4_pasrhfnew */
13455
    3114,
13456
    /* A4_pasrht */
13457
    3117,
13458
    /* A4_pasrhtnew */
13459
    3120,
13460
    /* A4_psxtbf */
13461
    3123,
13462
    /* A4_psxtbfnew */
13463
    3126,
13464
    /* A4_psxtbt */
13465
    3129,
13466
    /* A4_psxtbtnew */
13467
    3132,
13468
    /* A4_psxthf */
13469
    3135,
13470
    /* A4_psxthfnew */
13471
    3138,
13472
    /* A4_psxtht */
13473
    3141,
13474
    /* A4_psxthtnew */
13475
    3144,
13476
    /* A4_pzxtbf */
13477
    3147,
13478
    /* A4_pzxtbfnew */
13479
    3150,
13480
    /* A4_pzxtbt */
13481
    3153,
13482
    /* A4_pzxtbtnew */
13483
    3156,
13484
    /* A4_pzxthf */
13485
    3159,
13486
    /* A4_pzxthfnew */
13487
    3162,
13488
    /* A4_pzxtht */
13489
    3165,
13490
    /* A4_pzxthtnew */
13491
    3168,
13492
    /* A4_rcmpeq */
13493
    3171,
13494
    /* A4_rcmpeqi */
13495
    3174,
13496
    /* A4_rcmpneq */
13497
    3177,
13498
    /* A4_rcmpneqi */
13499
    3180,
13500
    /* A4_round_ri */
13501
    3183,
13502
    /* A4_round_ri_sat */
13503
    3186,
13504
    /* A4_round_rr */
13505
    3189,
13506
    /* A4_round_rr_sat */
13507
    3192,
13508
    /* A4_subp_c */
13509
    3195,
13510
    /* A4_tfrcpp */
13511
    3200,
13512
    /* A4_tfrpcp */
13513
    3202,
13514
    /* A4_tlbmatch */
13515
    3204,
13516
    /* A4_vcmpbeq_any */
13517
    3207,
13518
    /* A4_vcmpbeqi */
13519
    3210,
13520
    /* A4_vcmpbgt */
13521
    3213,
13522
    /* A4_vcmpbgti */
13523
    3216,
13524
    /* A4_vcmpbgtui */
13525
    3219,
13526
    /* A4_vcmpheqi */
13527
    3222,
13528
    /* A4_vcmphgti */
13529
    3225,
13530
    /* A4_vcmphgtui */
13531
    3228,
13532
    /* A4_vcmpweqi */
13533
    3231,
13534
    /* A4_vcmpwgti */
13535
    3234,
13536
    /* A4_vcmpwgtui */
13537
    3237,
13538
    /* A4_vrmaxh */
13539
    3240,
13540
    /* A4_vrmaxuh */
13541
    3244,
13542
    /* A4_vrmaxuw */
13543
    3248,
13544
    /* A4_vrmaxw */
13545
    3252,
13546
    /* A4_vrminh */
13547
    3256,
13548
    /* A4_vrminuh */
13549
    3260,
13550
    /* A4_vrminuw */
13551
    3264,
13552
    /* A4_vrminw */
13553
    3268,
13554
    /* A5_ACS */
13555
    3272,
13556
    /* A5_vaddhubs */
13557
    3277,
13558
    /* A6_vcmpbeq_notany */
13559
    3280,
13560
    /* A6_vminub_RdP */
13561
    3283,
13562
    /* A7_clip */
13563
    3287,
13564
    /* A7_croundd_ri */
13565
    3290,
13566
    /* A7_croundd_rr */
13567
    3293,
13568
    /* A7_vclip */
13569
    3296,
13570
    /* C2_all8 */
13571
    3299,
13572
    /* C2_and */
13573
    3301,
13574
    /* C2_andn */
13575
    3304,
13576
    /* C2_any8 */
13577
    3307,
13578
    /* C2_bitsclr */
13579
    3309,
13580
    /* C2_bitsclri */
13581
    3312,
13582
    /* C2_bitsset */
13583
    3315,
13584
    /* C2_ccombinewf */
13585
    3318,
13586
    /* C2_ccombinewnewf */
13587
    3322,
13588
    /* C2_ccombinewnewt */
13589
    3326,
13590
    /* C2_ccombinewt */
13591
    3330,
13592
    /* C2_cmoveif */
13593
    3334,
13594
    /* C2_cmoveit */
13595
    3337,
13596
    /* C2_cmovenewif */
13597
    3340,
13598
    /* C2_cmovenewit */
13599
    3343,
13600
    /* C2_cmpeq */
13601
    3346,
13602
    /* C2_cmpeqi */
13603
    3349,
13604
    /* C2_cmpeqp */
13605
    3352,
13606
    /* C2_cmpgt */
13607
    3355,
13608
    /* C2_cmpgti */
13609
    3358,
13610
    /* C2_cmpgtp */
13611
    3361,
13612
    /* C2_cmpgtu */
13613
    3364,
13614
    /* C2_cmpgtui */
13615
    3367,
13616
    /* C2_cmpgtup */
13617
    3370,
13618
    /* C2_mask */
13619
    3373,
13620
    /* C2_mux */
13621
    3375,
13622
    /* C2_muxii */
13623
    3379,
13624
    /* C2_muxir */
13625
    3383,
13626
    /* C2_muxri */
13627
    3387,
13628
    /* C2_not */
13629
    3391,
13630
    /* C2_or */
13631
    3393,
13632
    /* C2_orn */
13633
    3396,
13634
    /* C2_tfrpr */
13635
    3399,
13636
    /* C2_tfrrp */
13637
    3401,
13638
    /* C2_vitpack */
13639
    3403,
13640
    /* C2_vmux */
13641
    3406,
13642
    /* C2_xor */
13643
    3410,
13644
    /* C4_addipc */
13645
    3413,
13646
    /* C4_and_and */
13647
    3415,
13648
    /* C4_and_andn */
13649
    3419,
13650
    /* C4_and_or */
13651
    3423,
13652
    /* C4_and_orn */
13653
    3427,
13654
    /* C4_cmplte */
13655
    3431,
13656
    /* C4_cmpltei */
13657
    3434,
13658
    /* C4_cmplteu */
13659
    3437,
13660
    /* C4_cmplteui */
13661
    3440,
13662
    /* C4_cmpneq */
13663
    3443,
13664
    /* C4_cmpneqi */
13665
    3446,
13666
    /* C4_fastcorner9 */
13667
    3449,
13668
    /* C4_fastcorner9_not */
13669
    3452,
13670
    /* C4_nbitsclr */
13671
    3455,
13672
    /* C4_nbitsclri */
13673
    3458,
13674
    /* C4_nbitsset */
13675
    3461,
13676
    /* C4_or_and */
13677
    3464,
13678
    /* C4_or_andn */
13679
    3468,
13680
    /* C4_or_or */
13681
    3472,
13682
    /* C4_or_orn */
13683
    3476,
13684
    /* CALLProfile */
13685
    3480,
13686
    /* CONST32 */
13687
    3481,
13688
    /* CONST64 */
13689
    3483,
13690
    /* DuplexIClass0 */
13691
    3485,
13692
    /* DuplexIClass1 */
13693
    3485,
13694
    /* DuplexIClass2 */
13695
    3485,
13696
    /* DuplexIClass3 */
13697
    3485,
13698
    /* DuplexIClass4 */
13699
    3485,
13700
    /* DuplexIClass5 */
13701
    3485,
13702
    /* DuplexIClass6 */
13703
    3485,
13704
    /* DuplexIClass7 */
13705
    3485,
13706
    /* DuplexIClass8 */
13707
    3485,
13708
    /* DuplexIClass9 */
13709
    3485,
13710
    /* DuplexIClassA */
13711
    3485,
13712
    /* DuplexIClassB */
13713
    3485,
13714
    /* DuplexIClassC */
13715
    3485,
13716
    /* DuplexIClassD */
13717
    3485,
13718
    /* DuplexIClassE */
13719
    3485,
13720
    /* DuplexIClassF */
13721
    3485,
13722
    /* EH_RETURN_JMPR */
13723
    3485,
13724
    /* F2_conv_d2df */
13725
    3486,
13726
    /* F2_conv_d2sf */
13727
    3488,
13728
    /* F2_conv_df2d */
13729
    3490,
13730
    /* F2_conv_df2d_chop */
13731
    3492,
13732
    /* F2_conv_df2sf */
13733
    3494,
13734
    /* F2_conv_df2ud */
13735
    3496,
13736
    /* F2_conv_df2ud_chop */
13737
    3498,
13738
    /* F2_conv_df2uw */
13739
    3500,
13740
    /* F2_conv_df2uw_chop */
13741
    3502,
13742
    /* F2_conv_df2w */
13743
    3504,
13744
    /* F2_conv_df2w_chop */
13745
    3506,
13746
    /* F2_conv_sf2d */
13747
    3508,
13748
    /* F2_conv_sf2d_chop */
13749
    3510,
13750
    /* F2_conv_sf2df */
13751
    3512,
13752
    /* F2_conv_sf2ud */
13753
    3514,
13754
    /* F2_conv_sf2ud_chop */
13755
    3516,
13756
    /* F2_conv_sf2uw */
13757
    3518,
13758
    /* F2_conv_sf2uw_chop */
13759
    3520,
13760
    /* F2_conv_sf2w */
13761
    3522,
13762
    /* F2_conv_sf2w_chop */
13763
    3524,
13764
    /* F2_conv_ud2df */
13765
    3526,
13766
    /* F2_conv_ud2sf */
13767
    3528,
13768
    /* F2_conv_uw2df */
13769
    3530,
13770
    /* F2_conv_uw2sf */
13771
    3532,
13772
    /* F2_conv_w2df */
13773
    3534,
13774
    /* F2_conv_w2sf */
13775
    3536,
13776
    /* F2_dfadd */
13777
    3538,
13778
    /* F2_dfclass */
13779
    3541,
13780
    /* F2_dfcmpeq */
13781
    3544,
13782
    /* F2_dfcmpge */
13783
    3547,
13784
    /* F2_dfcmpgt */
13785
    3550,
13786
    /* F2_dfcmpuo */
13787
    3553,
13788
    /* F2_dfimm_n */
13789
    3556,
13790
    /* F2_dfimm_p */
13791
    3558,
13792
    /* F2_dfmax */
13793
    3560,
13794
    /* F2_dfmin */
13795
    3563,
13796
    /* F2_dfmpyfix */
13797
    3566,
13798
    /* F2_dfmpyhh */
13799
    3569,
13800
    /* F2_dfmpylh */
13801
    3573,
13802
    /* F2_dfmpyll */
13803
    3577,
13804
    /* F2_dfsub */
13805
    3580,
13806
    /* F2_sfadd */
13807
    3583,
13808
    /* F2_sfclass */
13809
    3586,
13810
    /* F2_sfcmpeq */
13811
    3589,
13812
    /* F2_sfcmpge */
13813
    3592,
13814
    /* F2_sfcmpgt */
13815
    3595,
13816
    /* F2_sfcmpuo */
13817
    3598,
13818
    /* F2_sffixupd */
13819
    3601,
13820
    /* F2_sffixupn */
13821
    3604,
13822
    /* F2_sffixupr */
13823
    3607,
13824
    /* F2_sffma */
13825
    3609,
13826
    /* F2_sffma_lib */
13827
    3613,
13828
    /* F2_sffma_sc */
13829
    3617,
13830
    /* F2_sffms */
13831
    3622,
13832
    /* F2_sffms_lib */
13833
    3626,
13834
    /* F2_sfimm_n */
13835
    3630,
13836
    /* F2_sfimm_p */
13837
    3632,
13838
    /* F2_sfinvsqrta */
13839
    3634,
13840
    /* F2_sfmax */
13841
    3637,
13842
    /* F2_sfmin */
13843
    3640,
13844
    /* F2_sfmpy */
13845
    3643,
13846
    /* F2_sfrecipa */
13847
    3646,
13848
    /* F2_sfsub */
13849
    3650,
13850
    /* G4_tfrgcpp */
13851
    3653,
13852
    /* G4_tfrgcrr */
13853
    3655,
13854
    /* G4_tfrgpcp */
13855
    3657,
13856
    /* G4_tfrgrcr */
13857
    3659,
13858
    /* HI */
13859
    3661,
13860
    /* J2_call */
13861
    3663,
13862
    /* J2_callf */
13863
    3664,
13864
    /* J2_callr */
13865
    3666,
13866
    /* J2_callrf */
13867
    3667,
13868
    /* J2_callrh */
13869
    3669,
13870
    /* J2_callrt */
13871
    3670,
13872
    /* J2_callt */
13873
    3672,
13874
    /* J2_jump */
13875
    3674,
13876
    /* J2_jumpf */
13877
    3675,
13878
    /* J2_jumpfnew */
13879
    3677,
13880
    /* J2_jumpfnewpt */
13881
    3679,
13882
    /* J2_jumpfpt */
13883
    3681,
13884
    /* J2_jumpr */
13885
    3683,
13886
    /* J2_jumprf */
13887
    3684,
13888
    /* J2_jumprfnew */
13889
    3686,
13890
    /* J2_jumprfnewpt */
13891
    3688,
13892
    /* J2_jumprfpt */
13893
    3690,
13894
    /* J2_jumprgtez */
13895
    3692,
13896
    /* J2_jumprgtezpt */
13897
    3694,
13898
    /* J2_jumprh */
13899
    3696,
13900
    /* J2_jumprltez */
13901
    3697,
13902
    /* J2_jumprltezpt */
13903
    3699,
13904
    /* J2_jumprnz */
13905
    3701,
13906
    /* J2_jumprnzpt */
13907
    3703,
13908
    /* J2_jumprt */
13909
    3705,
13910
    /* J2_jumprtnew */
13911
    3707,
13912
    /* J2_jumprtnewpt */
13913
    3709,
13914
    /* J2_jumprtpt */
13915
    3711,
13916
    /* J2_jumprz */
13917
    3713,
13918
    /* J2_jumprzpt */
13919
    3715,
13920
    /* J2_jumpt */
13921
    3717,
13922
    /* J2_jumptnew */
13923
    3719,
13924
    /* J2_jumptnewpt */
13925
    3721,
13926
    /* J2_jumptpt */
13927
    3723,
13928
    /* J2_loop0i */
13929
    3725,
13930
    /* J2_loop0iext */
13931
    3727,
13932
    /* J2_loop0r */
13933
    3729,
13934
    /* J2_loop0rext */
13935
    3731,
13936
    /* J2_loop1i */
13937
    3733,
13938
    /* J2_loop1iext */
13939
    3735,
13940
    /* J2_loop1r */
13941
    3737,
13942
    /* J2_loop1rext */
13943
    3739,
13944
    /* J2_pause */
13945
    3741,
13946
    /* J2_ploop1si */
13947
    3742,
13948
    /* J2_ploop1sr */
13949
    3744,
13950
    /* J2_ploop2si */
13951
    3746,
13952
    /* J2_ploop2sr */
13953
    3748,
13954
    /* J2_ploop3si */
13955
    3750,
13956
    /* J2_ploop3sr */
13957
    3752,
13958
    /* J2_rte */
13959
    3754,
13960
    /* J2_trap0 */
13961
    3754,
13962
    /* J2_trap1 */
13963
    3755,
13964
    /* J2_unpause */
13965
    3758,
13966
    /* J4_cmpeq_f_jumpnv_nt */
13967
    3758,
13968
    /* J4_cmpeq_f_jumpnv_t */
13969
    3761,
13970
    /* J4_cmpeq_fp0_jump_nt */
13971
    3764,
13972
    /* J4_cmpeq_fp0_jump_t */
13973
    3767,
13974
    /* J4_cmpeq_fp1_jump_nt */
13975
    3770,
13976
    /* J4_cmpeq_fp1_jump_t */
13977
    3773,
13978
    /* J4_cmpeq_t_jumpnv_nt */
13979
    3776,
13980
    /* J4_cmpeq_t_jumpnv_t */
13981
    3779,
13982
    /* J4_cmpeq_tp0_jump_nt */
13983
    3782,
13984
    /* J4_cmpeq_tp0_jump_t */
13985
    3785,
13986
    /* J4_cmpeq_tp1_jump_nt */
13987
    3788,
13988
    /* J4_cmpeq_tp1_jump_t */
13989
    3791,
13990
    /* J4_cmpeqi_f_jumpnv_nt */
13991
    3794,
13992
    /* J4_cmpeqi_f_jumpnv_t */
13993
    3797,
13994
    /* J4_cmpeqi_fp0_jump_nt */
13995
    3800,
13996
    /* J4_cmpeqi_fp0_jump_t */
13997
    3803,
13998
    /* J4_cmpeqi_fp1_jump_nt */
13999
    3806,
14000
    /* J4_cmpeqi_fp1_jump_t */
14001
    3809,
14002
    /* J4_cmpeqi_t_jumpnv_nt */
14003
    3812,
14004
    /* J4_cmpeqi_t_jumpnv_t */
14005
    3815,
14006
    /* J4_cmpeqi_tp0_jump_nt */
14007
    3818,
14008
    /* J4_cmpeqi_tp0_jump_t */
14009
    3821,
14010
    /* J4_cmpeqi_tp1_jump_nt */
14011
    3824,
14012
    /* J4_cmpeqi_tp1_jump_t */
14013
    3827,
14014
    /* J4_cmpeqn1_f_jumpnv_nt */
14015
    3830,
14016
    /* J4_cmpeqn1_f_jumpnv_t */
14017
    3833,
14018
    /* J4_cmpeqn1_fp0_jump_nt */
14019
    3836,
14020
    /* J4_cmpeqn1_fp0_jump_t */
14021
    3839,
14022
    /* J4_cmpeqn1_fp1_jump_nt */
14023
    3842,
14024
    /* J4_cmpeqn1_fp1_jump_t */
14025
    3845,
14026
    /* J4_cmpeqn1_t_jumpnv_nt */
14027
    3848,
14028
    /* J4_cmpeqn1_t_jumpnv_t */
14029
    3851,
14030
    /* J4_cmpeqn1_tp0_jump_nt */
14031
    3854,
14032
    /* J4_cmpeqn1_tp0_jump_t */
14033
    3857,
14034
    /* J4_cmpeqn1_tp1_jump_nt */
14035
    3860,
14036
    /* J4_cmpeqn1_tp1_jump_t */
14037
    3863,
14038
    /* J4_cmpgt_f_jumpnv_nt */
14039
    3866,
14040
    /* J4_cmpgt_f_jumpnv_t */
14041
    3869,
14042
    /* J4_cmpgt_fp0_jump_nt */
14043
    3872,
14044
    /* J4_cmpgt_fp0_jump_t */
14045
    3875,
14046
    /* J4_cmpgt_fp1_jump_nt */
14047
    3878,
14048
    /* J4_cmpgt_fp1_jump_t */
14049
    3881,
14050
    /* J4_cmpgt_t_jumpnv_nt */
14051
    3884,
14052
    /* J4_cmpgt_t_jumpnv_t */
14053
    3887,
14054
    /* J4_cmpgt_tp0_jump_nt */
14055
    3890,
14056
    /* J4_cmpgt_tp0_jump_t */
14057
    3893,
14058
    /* J4_cmpgt_tp1_jump_nt */
14059
    3896,
14060
    /* J4_cmpgt_tp1_jump_t */
14061
    3899,
14062
    /* J4_cmpgti_f_jumpnv_nt */
14063
    3902,
14064
    /* J4_cmpgti_f_jumpnv_t */
14065
    3905,
14066
    /* J4_cmpgti_fp0_jump_nt */
14067
    3908,
14068
    /* J4_cmpgti_fp0_jump_t */
14069
    3911,
14070
    /* J4_cmpgti_fp1_jump_nt */
14071
    3914,
14072
    /* J4_cmpgti_fp1_jump_t */
14073
    3917,
14074
    /* J4_cmpgti_t_jumpnv_nt */
14075
    3920,
14076
    /* J4_cmpgti_t_jumpnv_t */
14077
    3923,
14078
    /* J4_cmpgti_tp0_jump_nt */
14079
    3926,
14080
    /* J4_cmpgti_tp0_jump_t */
14081
    3929,
14082
    /* J4_cmpgti_tp1_jump_nt */
14083
    3932,
14084
    /* J4_cmpgti_tp1_jump_t */
14085
    3935,
14086
    /* J4_cmpgtn1_f_jumpnv_nt */
14087
    3938,
14088
    /* J4_cmpgtn1_f_jumpnv_t */
14089
    3941,
14090
    /* J4_cmpgtn1_fp0_jump_nt */
14091
    3944,
14092
    /* J4_cmpgtn1_fp0_jump_t */
14093
    3947,
14094
    /* J4_cmpgtn1_fp1_jump_nt */
14095
    3950,
14096
    /* J4_cmpgtn1_fp1_jump_t */
14097
    3953,
14098
    /* J4_cmpgtn1_t_jumpnv_nt */
14099
    3956,
14100
    /* J4_cmpgtn1_t_jumpnv_t */
14101
    3959,
14102
    /* J4_cmpgtn1_tp0_jump_nt */
14103
    3962,
14104
    /* J4_cmpgtn1_tp0_jump_t */
14105
    3965,
14106
    /* J4_cmpgtn1_tp1_jump_nt */
14107
    3968,
14108
    /* J4_cmpgtn1_tp1_jump_t */
14109
    3971,
14110
    /* J4_cmpgtu_f_jumpnv_nt */
14111
    3974,
14112
    /* J4_cmpgtu_f_jumpnv_t */
14113
    3977,
14114
    /* J4_cmpgtu_fp0_jump_nt */
14115
    3980,
14116
    /* J4_cmpgtu_fp0_jump_t */
14117
    3983,
14118
    /* J4_cmpgtu_fp1_jump_nt */
14119
    3986,
14120
    /* J4_cmpgtu_fp1_jump_t */
14121
    3989,
14122
    /* J4_cmpgtu_t_jumpnv_nt */
14123
    3992,
14124
    /* J4_cmpgtu_t_jumpnv_t */
14125
    3995,
14126
    /* J4_cmpgtu_tp0_jump_nt */
14127
    3998,
14128
    /* J4_cmpgtu_tp0_jump_t */
14129
    4001,
14130
    /* J4_cmpgtu_tp1_jump_nt */
14131
    4004,
14132
    /* J4_cmpgtu_tp1_jump_t */
14133
    4007,
14134
    /* J4_cmpgtui_f_jumpnv_nt */
14135
    4010,
14136
    /* J4_cmpgtui_f_jumpnv_t */
14137
    4013,
14138
    /* J4_cmpgtui_fp0_jump_nt */
14139
    4016,
14140
    /* J4_cmpgtui_fp0_jump_t */
14141
    4019,
14142
    /* J4_cmpgtui_fp1_jump_nt */
14143
    4022,
14144
    /* J4_cmpgtui_fp1_jump_t */
14145
    4025,
14146
    /* J4_cmpgtui_t_jumpnv_nt */
14147
    4028,
14148
    /* J4_cmpgtui_t_jumpnv_t */
14149
    4031,
14150
    /* J4_cmpgtui_tp0_jump_nt */
14151
    4034,
14152
    /* J4_cmpgtui_tp0_jump_t */
14153
    4037,
14154
    /* J4_cmpgtui_tp1_jump_nt */
14155
    4040,
14156
    /* J4_cmpgtui_tp1_jump_t */
14157
    4043,
14158
    /* J4_cmplt_f_jumpnv_nt */
14159
    4046,
14160
    /* J4_cmplt_f_jumpnv_t */
14161
    4049,
14162
    /* J4_cmplt_t_jumpnv_nt */
14163
    4052,
14164
    /* J4_cmplt_t_jumpnv_t */
14165
    4055,
14166
    /* J4_cmpltu_f_jumpnv_nt */
14167
    4058,
14168
    /* J4_cmpltu_f_jumpnv_t */
14169
    4061,
14170
    /* J4_cmpltu_t_jumpnv_nt */
14171
    4064,
14172
    /* J4_cmpltu_t_jumpnv_t */
14173
    4067,
14174
    /* J4_hintjumpr */
14175
    4070,
14176
    /* J4_jumpseti */
14177
    4071,
14178
    /* J4_jumpsetr */
14179
    4074,
14180
    /* J4_tstbit0_f_jumpnv_nt */
14181
    4077,
14182
    /* J4_tstbit0_f_jumpnv_t */
14183
    4079,
14184
    /* J4_tstbit0_fp0_jump_nt */
14185
    4081,
14186
    /* J4_tstbit0_fp0_jump_t */
14187
    4083,
14188
    /* J4_tstbit0_fp1_jump_nt */
14189
    4085,
14190
    /* J4_tstbit0_fp1_jump_t */
14191
    4087,
14192
    /* J4_tstbit0_t_jumpnv_nt */
14193
    4089,
14194
    /* J4_tstbit0_t_jumpnv_t */
14195
    4091,
14196
    /* J4_tstbit0_tp0_jump_nt */
14197
    4093,
14198
    /* J4_tstbit0_tp0_jump_t */
14199
    4095,
14200
    /* J4_tstbit0_tp1_jump_nt */
14201
    4097,
14202
    /* J4_tstbit0_tp1_jump_t */
14203
    4099,
14204
    /* L2_deallocframe */
14205
    4101,
14206
    /* L2_loadalignb_io */
14207
    4103,
14208
    /* L2_loadalignb_pbr */
14209
    4107,
14210
    /* L2_loadalignb_pci */
14211
    4112,
14212
    /* L2_loadalignb_pcr */
14213
    4118,
14214
    /* L2_loadalignb_pi */
14215
    4123,
14216
    /* L2_loadalignb_pr */
14217
    4128,
14218
    /* L2_loadalignh_io */
14219
    4133,
14220
    /* L2_loadalignh_pbr */
14221
    4137,
14222
    /* L2_loadalignh_pci */
14223
    4142,
14224
    /* L2_loadalignh_pcr */
14225
    4148,
14226
    /* L2_loadalignh_pi */
14227
    4153,
14228
    /* L2_loadalignh_pr */
14229
    4158,
14230
    /* L2_loadbsw2_io */
14231
    4163,
14232
    /* L2_loadbsw2_pbr */
14233
    4166,
14234
    /* L2_loadbsw2_pci */
14235
    4170,
14236
    /* L2_loadbsw2_pcr */
14237
    4175,
14238
    /* L2_loadbsw2_pi */
14239
    4179,
14240
    /* L2_loadbsw2_pr */
14241
    4183,
14242
    /* L2_loadbsw4_io */
14243
    4187,
14244
    /* L2_loadbsw4_pbr */
14245
    4190,
14246
    /* L2_loadbsw4_pci */
14247
    4194,
14248
    /* L2_loadbsw4_pcr */
14249
    4199,
14250
    /* L2_loadbsw4_pi */
14251
    4203,
14252
    /* L2_loadbsw4_pr */
14253
    4207,
14254
    /* L2_loadbzw2_io */
14255
    4211,
14256
    /* L2_loadbzw2_pbr */
14257
    4214,
14258
    /* L2_loadbzw2_pci */
14259
    4218,
14260
    /* L2_loadbzw2_pcr */
14261
    4223,
14262
    /* L2_loadbzw2_pi */
14263
    4227,
14264
    /* L2_loadbzw2_pr */
14265
    4231,
14266
    /* L2_loadbzw4_io */
14267
    4235,
14268
    /* L2_loadbzw4_pbr */
14269
    4238,
14270
    /* L2_loadbzw4_pci */
14271
    4242,
14272
    /* L2_loadbzw4_pcr */
14273
    4247,
14274
    /* L2_loadbzw4_pi */
14275
    4251,
14276
    /* L2_loadbzw4_pr */
14277
    4255,
14278
    /* L2_loadrb_io */
14279
    4259,
14280
    /* L2_loadrb_pbr */
14281
    4262,
14282
    /* L2_loadrb_pci */
14283
    4266,
14284
    /* L2_loadrb_pcr */
14285
    4271,
14286
    /* L2_loadrb_pi */
14287
    4275,
14288
    /* L2_loadrb_pr */
14289
    4279,
14290
    /* L2_loadrbgp */
14291
    4283,
14292
    /* L2_loadrd_io */
14293
    4285,
14294
    /* L2_loadrd_pbr */
14295
    4288,
14296
    /* L2_loadrd_pci */
14297
    4292,
14298
    /* L2_loadrd_pcr */
14299
    4297,
14300
    /* L2_loadrd_pi */
14301
    4301,
14302
    /* L2_loadrd_pr */
14303
    4305,
14304
    /* L2_loadrdgp */
14305
    4309,
14306
    /* L2_loadrh_io */
14307
    4311,
14308
    /* L2_loadrh_pbr */
14309
    4314,
14310
    /* L2_loadrh_pci */
14311
    4318,
14312
    /* L2_loadrh_pcr */
14313
    4323,
14314
    /* L2_loadrh_pi */
14315
    4327,
14316
    /* L2_loadrh_pr */
14317
    4331,
14318
    /* L2_loadrhgp */
14319
    4335,
14320
    /* L2_loadri_io */
14321
    4337,
14322
    /* L2_loadri_pbr */
14323
    4340,
14324
    /* L2_loadri_pci */
14325
    4344,
14326
    /* L2_loadri_pcr */
14327
    4349,
14328
    /* L2_loadri_pi */
14329
    4353,
14330
    /* L2_loadri_pr */
14331
    4357,
14332
    /* L2_loadrigp */
14333
    4361,
14334
    /* L2_loadrub_io */
14335
    4363,
14336
    /* L2_loadrub_pbr */
14337
    4366,
14338
    /* L2_loadrub_pci */
14339
    4370,
14340
    /* L2_loadrub_pcr */
14341
    4375,
14342
    /* L2_loadrub_pi */
14343
    4379,
14344
    /* L2_loadrub_pr */
14345
    4383,
14346
    /* L2_loadrubgp */
14347
    4387,
14348
    /* L2_loadruh_io */
14349
    4389,
14350
    /* L2_loadruh_pbr */
14351
    4392,
14352
    /* L2_loadruh_pci */
14353
    4396,
14354
    /* L2_loadruh_pcr */
14355
    4401,
14356
    /* L2_loadruh_pi */
14357
    4405,
14358
    /* L2_loadruh_pr */
14359
    4409,
14360
    /* L2_loadruhgp */
14361
    4413,
14362
    /* L2_loadw_aq */
14363
    4415,
14364
    /* L2_loadw_locked */
14365
    4417,
14366
    /* L2_ploadrbf_io */
14367
    4419,
14368
    /* L2_ploadrbf_pi */
14369
    4423,
14370
    /* L2_ploadrbfnew_io */
14371
    4428,
14372
    /* L2_ploadrbfnew_pi */
14373
    4432,
14374
    /* L2_ploadrbt_io */
14375
    4437,
14376
    /* L2_ploadrbt_pi */
14377
    4441,
14378
    /* L2_ploadrbtnew_io */
14379
    4446,
14380
    /* L2_ploadrbtnew_pi */
14381
    4450,
14382
    /* L2_ploadrdf_io */
14383
    4455,
14384
    /* L2_ploadrdf_pi */
14385
    4459,
14386
    /* L2_ploadrdfnew_io */
14387
    4464,
14388
    /* L2_ploadrdfnew_pi */
14389
    4468,
14390
    /* L2_ploadrdt_io */
14391
    4473,
14392
    /* L2_ploadrdt_pi */
14393
    4477,
14394
    /* L2_ploadrdtnew_io */
14395
    4482,
14396
    /* L2_ploadrdtnew_pi */
14397
    4486,
14398
    /* L2_ploadrhf_io */
14399
    4491,
14400
    /* L2_ploadrhf_pi */
14401
    4495,
14402
    /* L2_ploadrhfnew_io */
14403
    4500,
14404
    /* L2_ploadrhfnew_pi */
14405
    4504,
14406
    /* L2_ploadrht_io */
14407
    4509,
14408
    /* L2_ploadrht_pi */
14409
    4513,
14410
    /* L2_ploadrhtnew_io */
14411
    4518,
14412
    /* L2_ploadrhtnew_pi */
14413
    4522,
14414
    /* L2_ploadrif_io */
14415
    4527,
14416
    /* L2_ploadrif_pi */
14417
    4531,
14418
    /* L2_ploadrifnew_io */
14419
    4536,
14420
    /* L2_ploadrifnew_pi */
14421
    4540,
14422
    /* L2_ploadrit_io */
14423
    4545,
14424
    /* L2_ploadrit_pi */
14425
    4549,
14426
    /* L2_ploadritnew_io */
14427
    4554,
14428
    /* L2_ploadritnew_pi */
14429
    4558,
14430
    /* L2_ploadrubf_io */
14431
    4563,
14432
    /* L2_ploadrubf_pi */
14433
    4567,
14434
    /* L2_ploadrubfnew_io */
14435
    4572,
14436
    /* L2_ploadrubfnew_pi */
14437
    4576,
14438
    /* L2_ploadrubt_io */
14439
    4581,
14440
    /* L2_ploadrubt_pi */
14441
    4585,
14442
    /* L2_ploadrubtnew_io */
14443
    4590,
14444
    /* L2_ploadrubtnew_pi */
14445
    4594,
14446
    /* L2_ploadruhf_io */
14447
    4599,
14448
    /* L2_ploadruhf_pi */
14449
    4603,
14450
    /* L2_ploadruhfnew_io */
14451
    4608,
14452
    /* L2_ploadruhfnew_pi */
14453
    4612,
14454
    /* L2_ploadruht_io */
14455
    4617,
14456
    /* L2_ploadruht_pi */
14457
    4621,
14458
    /* L2_ploadruhtnew_io */
14459
    4626,
14460
    /* L2_ploadruhtnew_pi */
14461
    4630,
14462
    /* L4_add_memopb_io */
14463
    4635,
14464
    /* L4_add_memoph_io */
14465
    4638,
14466
    /* L4_add_memopw_io */
14467
    4641,
14468
    /* L4_and_memopb_io */
14469
    4644,
14470
    /* L4_and_memoph_io */
14471
    4647,
14472
    /* L4_and_memopw_io */
14473
    4650,
14474
    /* L4_iadd_memopb_io */
14475
    4653,
14476
    /* L4_iadd_memoph_io */
14477
    4656,
14478
    /* L4_iadd_memopw_io */
14479
    4659,
14480
    /* L4_iand_memopb_io */
14481
    4662,
14482
    /* L4_iand_memoph_io */
14483
    4665,
14484
    /* L4_iand_memopw_io */
14485
    4668,
14486
    /* L4_ior_memopb_io */
14487
    4671,
14488
    /* L4_ior_memoph_io */
14489
    4674,
14490
    /* L4_ior_memopw_io */
14491
    4677,
14492
    /* L4_isub_memopb_io */
14493
    4680,
14494
    /* L4_isub_memoph_io */
14495
    4683,
14496
    /* L4_isub_memopw_io */
14497
    4686,
14498
    /* L4_loadalignb_ap */
14499
    4689,
14500
    /* L4_loadalignb_ur */
14501
    4693,
14502
    /* L4_loadalignh_ap */
14503
    4698,
14504
    /* L4_loadalignh_ur */
14505
    4702,
14506
    /* L4_loadbsw2_ap */
14507
    4707,
14508
    /* L4_loadbsw2_ur */
14509
    4710,
14510
    /* L4_loadbsw4_ap */
14511
    4714,
14512
    /* L4_loadbsw4_ur */
14513
    4717,
14514
    /* L4_loadbzw2_ap */
14515
    4721,
14516
    /* L4_loadbzw2_ur */
14517
    4724,
14518
    /* L4_loadbzw4_ap */
14519
    4728,
14520
    /* L4_loadbzw4_ur */
14521
    4731,
14522
    /* L4_loadd_aq */
14523
    4735,
14524
    /* L4_loadd_locked */
14525
    4737,
14526
    /* L4_loadrb_ap */
14527
    4739,
14528
    /* L4_loadrb_rr */
14529
    4742,
14530
    /* L4_loadrb_ur */
14531
    4746,
14532
    /* L4_loadrd_ap */
14533
    4750,
14534
    /* L4_loadrd_rr */
14535
    4753,
14536
    /* L4_loadrd_ur */
14537
    4757,
14538
    /* L4_loadrh_ap */
14539
    4761,
14540
    /* L4_loadrh_rr */
14541
    4764,
14542
    /* L4_loadrh_ur */
14543
    4768,
14544
    /* L4_loadri_ap */
14545
    4772,
14546
    /* L4_loadri_rr */
14547
    4775,
14548
    /* L4_loadri_ur */
14549
    4779,
14550
    /* L4_loadrub_ap */
14551
    4783,
14552
    /* L4_loadrub_rr */
14553
    4786,
14554
    /* L4_loadrub_ur */
14555
    4790,
14556
    /* L4_loadruh_ap */
14557
    4794,
14558
    /* L4_loadruh_rr */
14559
    4797,
14560
    /* L4_loadruh_ur */
14561
    4801,
14562
    /* L4_loadw_phys */
14563
    4805,
14564
    /* L4_or_memopb_io */
14565
    4808,
14566
    /* L4_or_memoph_io */
14567
    4811,
14568
    /* L4_or_memopw_io */
14569
    4814,
14570
    /* L4_ploadrbf_abs */
14571
    4817,
14572
    /* L4_ploadrbf_rr */
14573
    4820,
14574
    /* L4_ploadrbfnew_abs */
14575
    4825,
14576
    /* L4_ploadrbfnew_rr */
14577
    4828,
14578
    /* L4_ploadrbt_abs */
14579
    4833,
14580
    /* L4_ploadrbt_rr */
14581
    4836,
14582
    /* L4_ploadrbtnew_abs */
14583
    4841,
14584
    /* L4_ploadrbtnew_rr */
14585
    4844,
14586
    /* L4_ploadrdf_abs */
14587
    4849,
14588
    /* L4_ploadrdf_rr */
14589
    4852,
14590
    /* L4_ploadrdfnew_abs */
14591
    4857,
14592
    /* L4_ploadrdfnew_rr */
14593
    4860,
14594
    /* L4_ploadrdt_abs */
14595
    4865,
14596
    /* L4_ploadrdt_rr */
14597
    4868,
14598
    /* L4_ploadrdtnew_abs */
14599
    4873,
14600
    /* L4_ploadrdtnew_rr */
14601
    4876,
14602
    /* L4_ploadrhf_abs */
14603
    4881,
14604
    /* L4_ploadrhf_rr */
14605
    4884,
14606
    /* L4_ploadrhfnew_abs */
14607
    4889,
14608
    /* L4_ploadrhfnew_rr */
14609
    4892,
14610
    /* L4_ploadrht_abs */
14611
    4897,
14612
    /* L4_ploadrht_rr */
14613
    4900,
14614
    /* L4_ploadrhtnew_abs */
14615
    4905,
14616
    /* L4_ploadrhtnew_rr */
14617
    4908,
14618
    /* L4_ploadrif_abs */
14619
    4913,
14620
    /* L4_ploadrif_rr */
14621
    4916,
14622
    /* L4_ploadrifnew_abs */
14623
    4921,
14624
    /* L4_ploadrifnew_rr */
14625
    4924,
14626
    /* L4_ploadrit_abs */
14627
    4929,
14628
    /* L4_ploadrit_rr */
14629
    4932,
14630
    /* L4_ploadritnew_abs */
14631
    4937,
14632
    /* L4_ploadritnew_rr */
14633
    4940,
14634
    /* L4_ploadrubf_abs */
14635
    4945,
14636
    /* L4_ploadrubf_rr */
14637
    4948,
14638
    /* L4_ploadrubfnew_abs */
14639
    4953,
14640
    /* L4_ploadrubfnew_rr */
14641
    4956,
14642
    /* L4_ploadrubt_abs */
14643
    4961,
14644
    /* L4_ploadrubt_rr */
14645
    4964,
14646
    /* L4_ploadrubtnew_abs */
14647
    4969,
14648
    /* L4_ploadrubtnew_rr */
14649
    4972,
14650
    /* L4_ploadruhf_abs */
14651
    4977,
14652
    /* L4_ploadruhf_rr */
14653
    4980,
14654
    /* L4_ploadruhfnew_abs */
14655
    4985,
14656
    /* L4_ploadruhfnew_rr */
14657
    4988,
14658
    /* L4_ploadruht_abs */
14659
    4993,
14660
    /* L4_ploadruht_rr */
14661
    4996,
14662
    /* L4_ploadruhtnew_abs */
14663
    5001,
14664
    /* L4_ploadruhtnew_rr */
14665
    5004,
14666
    /* L4_return */
14667
    5009,
14668
    /* L4_return_f */
14669
    5011,
14670
    /* L4_return_fnew_pnt */
14671
    5014,
14672
    /* L4_return_fnew_pt */
14673
    5017,
14674
    /* L4_return_t */
14675
    5020,
14676
    /* L4_return_tnew_pnt */
14677
    5023,
14678
    /* L4_return_tnew_pt */
14679
    5026,
14680
    /* L4_sub_memopb_io */
14681
    5029,
14682
    /* L4_sub_memoph_io */
14683
    5032,
14684
    /* L4_sub_memopw_io */
14685
    5035,
14686
    /* L6_memcpy */
14687
    5038,
14688
    /* LO */
14689
    5041,
14690
    /* M2_acci */
14691
    5043,
14692
    /* M2_accii */
14693
    5047,
14694
    /* M2_cmaci_s0 */
14695
    5051,
14696
    /* M2_cmacr_s0 */
14697
    5055,
14698
    /* M2_cmacs_s0 */
14699
    5059,
14700
    /* M2_cmacs_s1 */
14701
    5063,
14702
    /* M2_cmacsc_s0 */
14703
    5067,
14704
    /* M2_cmacsc_s1 */
14705
    5071,
14706
    /* M2_cmpyi_s0 */
14707
    5075,
14708
    /* M2_cmpyr_s0 */
14709
    5078,
14710
    /* M2_cmpyrs_s0 */
14711
    5081,
14712
    /* M2_cmpyrs_s1 */
14713
    5084,
14714
    /* M2_cmpyrsc_s0 */
14715
    5087,
14716
    /* M2_cmpyrsc_s1 */
14717
    5090,
14718
    /* M2_cmpys_s0 */
14719
    5093,
14720
    /* M2_cmpys_s1 */
14721
    5096,
14722
    /* M2_cmpysc_s0 */
14723
    5099,
14724
    /* M2_cmpysc_s1 */
14725
    5102,
14726
    /* M2_cnacs_s0 */
14727
    5105,
14728
    /* M2_cnacs_s1 */
14729
    5109,
14730
    /* M2_cnacsc_s0 */
14731
    5113,
14732
    /* M2_cnacsc_s1 */
14733
    5117,
14734
    /* M2_dpmpyss_acc_s0 */
14735
    5121,
14736
    /* M2_dpmpyss_nac_s0 */
14737
    5125,
14738
    /* M2_dpmpyss_rnd_s0 */
14739
    5129,
14740
    /* M2_dpmpyss_s0 */
14741
    5132,
14742
    /* M2_dpmpyuu_acc_s0 */
14743
    5135,
14744
    /* M2_dpmpyuu_nac_s0 */
14745
    5139,
14746
    /* M2_dpmpyuu_s0 */
14747
    5143,
14748
    /* M2_hmmpyh_rs1 */
14749
    5146,
14750
    /* M2_hmmpyh_s1 */
14751
    5149,
14752
    /* M2_hmmpyl_rs1 */
14753
    5152,
14754
    /* M2_hmmpyl_s1 */
14755
    5155,
14756
    /* M2_maci */
14757
    5158,
14758
    /* M2_macsin */
14759
    5162,
14760
    /* M2_macsip */
14761
    5166,
14762
    /* M2_mmachs_rs0 */
14763
    5170,
14764
    /* M2_mmachs_rs1 */
14765
    5174,
14766
    /* M2_mmachs_s0 */
14767
    5178,
14768
    /* M2_mmachs_s1 */
14769
    5182,
14770
    /* M2_mmacls_rs0 */
14771
    5186,
14772
    /* M2_mmacls_rs1 */
14773
    5190,
14774
    /* M2_mmacls_s0 */
14775
    5194,
14776
    /* M2_mmacls_s1 */
14777
    5198,
14778
    /* M2_mmacuhs_rs0 */
14779
    5202,
14780
    /* M2_mmacuhs_rs1 */
14781
    5206,
14782
    /* M2_mmacuhs_s0 */
14783
    5210,
14784
    /* M2_mmacuhs_s1 */
14785
    5214,
14786
    /* M2_mmaculs_rs0 */
14787
    5218,
14788
    /* M2_mmaculs_rs1 */
14789
    5222,
14790
    /* M2_mmaculs_s0 */
14791
    5226,
14792
    /* M2_mmaculs_s1 */
14793
    5230,
14794
    /* M2_mmpyh_rs0 */
14795
    5234,
14796
    /* M2_mmpyh_rs1 */
14797
    5237,
14798
    /* M2_mmpyh_s0 */
14799
    5240,
14800
    /* M2_mmpyh_s1 */
14801
    5243,
14802
    /* M2_mmpyl_rs0 */
14803
    5246,
14804
    /* M2_mmpyl_rs1 */
14805
    5249,
14806
    /* M2_mmpyl_s0 */
14807
    5252,
14808
    /* M2_mmpyl_s1 */
14809
    5255,
14810
    /* M2_mmpyuh_rs0 */
14811
    5258,
14812
    /* M2_mmpyuh_rs1 */
14813
    5261,
14814
    /* M2_mmpyuh_s0 */
14815
    5264,
14816
    /* M2_mmpyuh_s1 */
14817
    5267,
14818
    /* M2_mmpyul_rs0 */
14819
    5270,
14820
    /* M2_mmpyul_rs1 */
14821
    5273,
14822
    /* M2_mmpyul_s0 */
14823
    5276,
14824
    /* M2_mmpyul_s1 */
14825
    5279,
14826
    /* M2_mnaci */
14827
    5282,
14828
    /* M2_mpy_acc_hh_s0 */
14829
    5286,
14830
    /* M2_mpy_acc_hh_s1 */
14831
    5290,
14832
    /* M2_mpy_acc_hl_s0 */
14833
    5294,
14834
    /* M2_mpy_acc_hl_s1 */
14835
    5298,
14836
    /* M2_mpy_acc_lh_s0 */
14837
    5302,
14838
    /* M2_mpy_acc_lh_s1 */
14839
    5306,
14840
    /* M2_mpy_acc_ll_s0 */
14841
    5310,
14842
    /* M2_mpy_acc_ll_s1 */
14843
    5314,
14844
    /* M2_mpy_acc_sat_hh_s0 */
14845
    5318,
14846
    /* M2_mpy_acc_sat_hh_s1 */
14847
    5322,
14848
    /* M2_mpy_acc_sat_hl_s0 */
14849
    5326,
14850
    /* M2_mpy_acc_sat_hl_s1 */
14851
    5330,
14852
    /* M2_mpy_acc_sat_lh_s0 */
14853
    5334,
14854
    /* M2_mpy_acc_sat_lh_s1 */
14855
    5338,
14856
    /* M2_mpy_acc_sat_ll_s0 */
14857
    5342,
14858
    /* M2_mpy_acc_sat_ll_s1 */
14859
    5346,
14860
    /* M2_mpy_hh_s0 */
14861
    5350,
14862
    /* M2_mpy_hh_s1 */
14863
    5353,
14864
    /* M2_mpy_hl_s0 */
14865
    5356,
14866
    /* M2_mpy_hl_s1 */
14867
    5359,
14868
    /* M2_mpy_lh_s0 */
14869
    5362,
14870
    /* M2_mpy_lh_s1 */
14871
    5365,
14872
    /* M2_mpy_ll_s0 */
14873
    5368,
14874
    /* M2_mpy_ll_s1 */
14875
    5371,
14876
    /* M2_mpy_nac_hh_s0 */
14877
    5374,
14878
    /* M2_mpy_nac_hh_s1 */
14879
    5378,
14880
    /* M2_mpy_nac_hl_s0 */
14881
    5382,
14882
    /* M2_mpy_nac_hl_s1 */
14883
    5386,
14884
    /* M2_mpy_nac_lh_s0 */
14885
    5390,
14886
    /* M2_mpy_nac_lh_s1 */
14887
    5394,
14888
    /* M2_mpy_nac_ll_s0 */
14889
    5398,
14890
    /* M2_mpy_nac_ll_s1 */
14891
    5402,
14892
    /* M2_mpy_nac_sat_hh_s0 */
14893
    5406,
14894
    /* M2_mpy_nac_sat_hh_s1 */
14895
    5410,
14896
    /* M2_mpy_nac_sat_hl_s0 */
14897
    5414,
14898
    /* M2_mpy_nac_sat_hl_s1 */
14899
    5418,
14900
    /* M2_mpy_nac_sat_lh_s0 */
14901
    5422,
14902
    /* M2_mpy_nac_sat_lh_s1 */
14903
    5426,
14904
    /* M2_mpy_nac_sat_ll_s0 */
14905
    5430,
14906
    /* M2_mpy_nac_sat_ll_s1 */
14907
    5434,
14908
    /* M2_mpy_rnd_hh_s0 */
14909
    5438,
14910
    /* M2_mpy_rnd_hh_s1 */
14911
    5441,
14912
    /* M2_mpy_rnd_hl_s0 */
14913
    5444,
14914
    /* M2_mpy_rnd_hl_s1 */
14915
    5447,
14916
    /* M2_mpy_rnd_lh_s0 */
14917
    5450,
14918
    /* M2_mpy_rnd_lh_s1 */
14919
    5453,
14920
    /* M2_mpy_rnd_ll_s0 */
14921
    5456,
14922
    /* M2_mpy_rnd_ll_s1 */
14923
    5459,
14924
    /* M2_mpy_sat_hh_s0 */
14925
    5462,
14926
    /* M2_mpy_sat_hh_s1 */
14927
    5465,
14928
    /* M2_mpy_sat_hl_s0 */
14929
    5468,
14930
    /* M2_mpy_sat_hl_s1 */
14931
    5471,
14932
    /* M2_mpy_sat_lh_s0 */
14933
    5474,
14934
    /* M2_mpy_sat_lh_s1 */
14935
    5477,
14936
    /* M2_mpy_sat_ll_s0 */
14937
    5480,
14938
    /* M2_mpy_sat_ll_s1 */
14939
    5483,
14940
    /* M2_mpy_sat_rnd_hh_s0 */
14941
    5486,
14942
    /* M2_mpy_sat_rnd_hh_s1 */
14943
    5489,
14944
    /* M2_mpy_sat_rnd_hl_s0 */
14945
    5492,
14946
    /* M2_mpy_sat_rnd_hl_s1 */
14947
    5495,
14948
    /* M2_mpy_sat_rnd_lh_s0 */
14949
    5498,
14950
    /* M2_mpy_sat_rnd_lh_s1 */
14951
    5501,
14952
    /* M2_mpy_sat_rnd_ll_s0 */
14953
    5504,
14954
    /* M2_mpy_sat_rnd_ll_s1 */
14955
    5507,
14956
    /* M2_mpy_up */
14957
    5510,
14958
    /* M2_mpy_up_s1 */
14959
    5513,
14960
    /* M2_mpy_up_s1_sat */
14961
    5516,
14962
    /* M2_mpyd_acc_hh_s0 */
14963
    5519,
14964
    /* M2_mpyd_acc_hh_s1 */
14965
    5523,
14966
    /* M2_mpyd_acc_hl_s0 */
14967
    5527,
14968
    /* M2_mpyd_acc_hl_s1 */
14969
    5531,
14970
    /* M2_mpyd_acc_lh_s0 */
14971
    5535,
14972
    /* M2_mpyd_acc_lh_s1 */
14973
    5539,
14974
    /* M2_mpyd_acc_ll_s0 */
14975
    5543,
14976
    /* M2_mpyd_acc_ll_s1 */
14977
    5547,
14978
    /* M2_mpyd_hh_s0 */
14979
    5551,
14980
    /* M2_mpyd_hh_s1 */
14981
    5554,
14982
    /* M2_mpyd_hl_s0 */
14983
    5557,
14984
    /* M2_mpyd_hl_s1 */
14985
    5560,
14986
    /* M2_mpyd_lh_s0 */
14987
    5563,
14988
    /* M2_mpyd_lh_s1 */
14989
    5566,
14990
    /* M2_mpyd_ll_s0 */
14991
    5569,
14992
    /* M2_mpyd_ll_s1 */
14993
    5572,
14994
    /* M2_mpyd_nac_hh_s0 */
14995
    5575,
14996
    /* M2_mpyd_nac_hh_s1 */
14997
    5579,
14998
    /* M2_mpyd_nac_hl_s0 */
14999
    5583,
15000
    /* M2_mpyd_nac_hl_s1 */
15001
    5587,
15002
    /* M2_mpyd_nac_lh_s0 */
15003
    5591,
15004
    /* M2_mpyd_nac_lh_s1 */
15005
    5595,
15006
    /* M2_mpyd_nac_ll_s0 */
15007
    5599,
15008
    /* M2_mpyd_nac_ll_s1 */
15009
    5603,
15010
    /* M2_mpyd_rnd_hh_s0 */
15011
    5607,
15012
    /* M2_mpyd_rnd_hh_s1 */
15013
    5610,
15014
    /* M2_mpyd_rnd_hl_s0 */
15015
    5613,
15016
    /* M2_mpyd_rnd_hl_s1 */
15017
    5616,
15018
    /* M2_mpyd_rnd_lh_s0 */
15019
    5619,
15020
    /* M2_mpyd_rnd_lh_s1 */
15021
    5622,
15022
    /* M2_mpyd_rnd_ll_s0 */
15023
    5625,
15024
    /* M2_mpyd_rnd_ll_s1 */
15025
    5628,
15026
    /* M2_mpyi */
15027
    5631,
15028
    /* M2_mpysin */
15029
    5634,
15030
    /* M2_mpysip */
15031
    5637,
15032
    /* M2_mpysu_up */
15033
    5640,
15034
    /* M2_mpyu_acc_hh_s0 */
15035
    5643,
15036
    /* M2_mpyu_acc_hh_s1 */
15037
    5647,
15038
    /* M2_mpyu_acc_hl_s0 */
15039
    5651,
15040
    /* M2_mpyu_acc_hl_s1 */
15041
    5655,
15042
    /* M2_mpyu_acc_lh_s0 */
15043
    5659,
15044
    /* M2_mpyu_acc_lh_s1 */
15045
    5663,
15046
    /* M2_mpyu_acc_ll_s0 */
15047
    5667,
15048
    /* M2_mpyu_acc_ll_s1 */
15049
    5671,
15050
    /* M2_mpyu_hh_s0 */
15051
    5675,
15052
    /* M2_mpyu_hh_s1 */
15053
    5678,
15054
    /* M2_mpyu_hl_s0 */
15055
    5681,
15056
    /* M2_mpyu_hl_s1 */
15057
    5684,
15058
    /* M2_mpyu_lh_s0 */
15059
    5687,
15060
    /* M2_mpyu_lh_s1 */
15061
    5690,
15062
    /* M2_mpyu_ll_s0 */
15063
    5693,
15064
    /* M2_mpyu_ll_s1 */
15065
    5696,
15066
    /* M2_mpyu_nac_hh_s0 */
15067
    5699,
15068
    /* M2_mpyu_nac_hh_s1 */
15069
    5703,
15070
    /* M2_mpyu_nac_hl_s0 */
15071
    5707,
15072
    /* M2_mpyu_nac_hl_s1 */
15073
    5711,
15074
    /* M2_mpyu_nac_lh_s0 */
15075
    5715,
15076
    /* M2_mpyu_nac_lh_s1 */
15077
    5719,
15078
    /* M2_mpyu_nac_ll_s0 */
15079
    5723,
15080
    /* M2_mpyu_nac_ll_s1 */
15081
    5727,
15082
    /* M2_mpyu_up */
15083
    5731,
15084
    /* M2_mpyud_acc_hh_s0 */
15085
    5734,
15086
    /* M2_mpyud_acc_hh_s1 */
15087
    5738,
15088
    /* M2_mpyud_acc_hl_s0 */
15089
    5742,
15090
    /* M2_mpyud_acc_hl_s1 */
15091
    5746,
15092
    /* M2_mpyud_acc_lh_s0 */
15093
    5750,
15094
    /* M2_mpyud_acc_lh_s1 */
15095
    5754,
15096
    /* M2_mpyud_acc_ll_s0 */
15097
    5758,
15098
    /* M2_mpyud_acc_ll_s1 */
15099
    5762,
15100
    /* M2_mpyud_hh_s0 */
15101
    5766,
15102
    /* M2_mpyud_hh_s1 */
15103
    5769,
15104
    /* M2_mpyud_hl_s0 */
15105
    5772,
15106
    /* M2_mpyud_hl_s1 */
15107
    5775,
15108
    /* M2_mpyud_lh_s0 */
15109
    5778,
15110
    /* M2_mpyud_lh_s1 */
15111
    5781,
15112
    /* M2_mpyud_ll_s0 */
15113
    5784,
15114
    /* M2_mpyud_ll_s1 */
15115
    5787,
15116
    /* M2_mpyud_nac_hh_s0 */
15117
    5790,
15118
    /* M2_mpyud_nac_hh_s1 */
15119
    5794,
15120
    /* M2_mpyud_nac_hl_s0 */
15121
    5798,
15122
    /* M2_mpyud_nac_hl_s1 */
15123
    5802,
15124
    /* M2_mpyud_nac_lh_s0 */
15125
    5806,
15126
    /* M2_mpyud_nac_lh_s1 */
15127
    5810,
15128
    /* M2_mpyud_nac_ll_s0 */
15129
    5814,
15130
    /* M2_mpyud_nac_ll_s1 */
15131
    5818,
15132
    /* M2_nacci */
15133
    5822,
15134
    /* M2_naccii */
15135
    5826,
15136
    /* M2_subacc */
15137
    5830,
15138
    /* M2_vabsdiffh */
15139
    5834,
15140
    /* M2_vabsdiffw */
15141
    5837,
15142
    /* M2_vcmac_s0_sat_i */
15143
    5840,
15144
    /* M2_vcmac_s0_sat_r */
15145
    5844,
15146
    /* M2_vcmpy_s0_sat_i */
15147
    5848,
15148
    /* M2_vcmpy_s0_sat_r */
15149
    5851,
15150
    /* M2_vcmpy_s1_sat_i */
15151
    5854,
15152
    /* M2_vcmpy_s1_sat_r */
15153
    5857,
15154
    /* M2_vdmacs_s0 */
15155
    5860,
15156
    /* M2_vdmacs_s1 */
15157
    5864,
15158
    /* M2_vdmpyrs_s0 */
15159
    5868,
15160
    /* M2_vdmpyrs_s1 */
15161
    5871,
15162
    /* M2_vdmpys_s0 */
15163
    5874,
15164
    /* M2_vdmpys_s1 */
15165
    5877,
15166
    /* M2_vmac2 */
15167
    5880,
15168
    /* M2_vmac2es */
15169
    5884,
15170
    /* M2_vmac2es_s0 */
15171
    5888,
15172
    /* M2_vmac2es_s1 */
15173
    5892,
15174
    /* M2_vmac2s_s0 */
15175
    5896,
15176
    /* M2_vmac2s_s1 */
15177
    5900,
15178
    /* M2_vmac2su_s0 */
15179
    5904,
15180
    /* M2_vmac2su_s1 */
15181
    5908,
15182
    /* M2_vmpy2es_s0 */
15183
    5912,
15184
    /* M2_vmpy2es_s1 */
15185
    5915,
15186
    /* M2_vmpy2s_s0 */
15187
    5918,
15188
    /* M2_vmpy2s_s0pack */
15189
    5921,
15190
    /* M2_vmpy2s_s1 */
15191
    5924,
15192
    /* M2_vmpy2s_s1pack */
15193
    5927,
15194
    /* M2_vmpy2su_s0 */
15195
    5930,
15196
    /* M2_vmpy2su_s1 */
15197
    5933,
15198
    /* M2_vraddh */
15199
    5936,
15200
    /* M2_vradduh */
15201
    5939,
15202
    /* M2_vrcmaci_s0 */
15203
    5942,
15204
    /* M2_vrcmaci_s0c */
15205
    5946,
15206
    /* M2_vrcmacr_s0 */
15207
    5950,
15208
    /* M2_vrcmacr_s0c */
15209
    5954,
15210
    /* M2_vrcmpyi_s0 */
15211
    5958,
15212
    /* M2_vrcmpyi_s0c */
15213
    5961,
15214
    /* M2_vrcmpyr_s0 */
15215
    5964,
15216
    /* M2_vrcmpyr_s0c */
15217
    5967,
15218
    /* M2_vrcmpys_acc_s1_h */
15219
    5970,
15220
    /* M2_vrcmpys_acc_s1_l */
15221
    5974,
15222
    /* M2_vrcmpys_s1_h */
15223
    5978,
15224
    /* M2_vrcmpys_s1_l */
15225
    5981,
15226
    /* M2_vrcmpys_s1rp_h */
15227
    5984,
15228
    /* M2_vrcmpys_s1rp_l */
15229
    5987,
15230
    /* M2_vrmac_s0 */
15231
    5990,
15232
    /* M2_vrmpy_s0 */
15233
    5994,
15234
    /* M2_xor_xacc */
15235
    5997,
15236
    /* M4_and_and */
15237
    6001,
15238
    /* M4_and_andn */
15239
    6005,
15240
    /* M4_and_or */
15241
    6009,
15242
    /* M4_and_xor */
15243
    6013,
15244
    /* M4_cmpyi_wh */
15245
    6017,
15246
    /* M4_cmpyi_whc */
15247
    6020,
15248
    /* M4_cmpyr_wh */
15249
    6023,
15250
    /* M4_cmpyr_whc */
15251
    6026,
15252
    /* M4_mac_up_s1_sat */
15253
    6029,
15254
    /* M4_mpyri_addi */
15255
    6033,
15256
    /* M4_mpyri_addr */
15257
    6037,
15258
    /* M4_mpyri_addr_u2 */
15259
    6041,
15260
    /* M4_mpyrr_addi */
15261
    6045,
15262
    /* M4_mpyrr_addr */
15263
    6049,
15264
    /* M4_nac_up_s1_sat */
15265
    6053,
15266
    /* M4_or_and */
15267
    6057,
15268
    /* M4_or_andn */
15269
    6061,
15270
    /* M4_or_or */
15271
    6065,
15272
    /* M4_or_xor */
15273
    6069,
15274
    /* M4_pmpyw */
15275
    6073,
15276
    /* M4_pmpyw_acc */
15277
    6076,
15278
    /* M4_vpmpyh */
15279
    6080,
15280
    /* M4_vpmpyh_acc */
15281
    6083,
15282
    /* M4_vrmpyeh_acc_s0 */
15283
    6087,
15284
    /* M4_vrmpyeh_acc_s1 */
15285
    6091,
15286
    /* M4_vrmpyeh_s0 */
15287
    6095,
15288
    /* M4_vrmpyeh_s1 */
15289
    6098,
15290
    /* M4_vrmpyoh_acc_s0 */
15291
    6101,
15292
    /* M4_vrmpyoh_acc_s1 */
15293
    6105,
15294
    /* M4_vrmpyoh_s0 */
15295
    6109,
15296
    /* M4_vrmpyoh_s1 */
15297
    6112,
15298
    /* M4_xor_and */
15299
    6115,
15300
    /* M4_xor_andn */
15301
    6119,
15302
    /* M4_xor_or */
15303
    6123,
15304
    /* M4_xor_xacc */
15305
    6127,
15306
    /* M5_vdmacbsu */
15307
    6131,
15308
    /* M5_vdmpybsu */
15309
    6135,
15310
    /* M5_vmacbsu */
15311
    6138,
15312
    /* M5_vmacbuu */
15313
    6142,
15314
    /* M5_vmpybsu */
15315
    6146,
15316
    /* M5_vmpybuu */
15317
    6149,
15318
    /* M5_vrmacbsu */
15319
    6152,
15320
    /* M5_vrmacbuu */
15321
    6156,
15322
    /* M5_vrmpybsu */
15323
    6160,
15324
    /* M5_vrmpybuu */
15325
    6163,
15326
    /* M6_vabsdiffb */
15327
    6166,
15328
    /* M6_vabsdiffub */
15329
    6169,
15330
    /* M7_dcmpyiw */
15331
    6172,
15332
    /* M7_dcmpyiw_acc */
15333
    6175,
15334
    /* M7_dcmpyiwc */
15335
    6179,
15336
    /* M7_dcmpyiwc_acc */
15337
    6182,
15338
    /* M7_dcmpyrw */
15339
    6186,
15340
    /* M7_dcmpyrw_acc */
15341
    6189,
15342
    /* M7_dcmpyrwc */
15343
    6193,
15344
    /* M7_dcmpyrwc_acc */
15345
    6196,
15346
    /* M7_wcmpyiw */
15347
    6200,
15348
    /* M7_wcmpyiw_rnd */
15349
    6203,
15350
    /* M7_wcmpyiwc */
15351
    6206,
15352
    /* M7_wcmpyiwc_rnd */
15353
    6209,
15354
    /* M7_wcmpyrw */
15355
    6212,
15356
    /* M7_wcmpyrw_rnd */
15357
    6215,
15358
    /* M7_wcmpyrwc */
15359
    6218,
15360
    /* M7_wcmpyrwc_rnd */
15361
    6221,
15362
    /* PS_call_stk */
15363
    6224,
15364
    /* PS_callr_nr */
15365
    6225,
15366
    /* PS_jmpret */
15367
    6226,
15368
    /* PS_jmpretf */
15369
    6227,
15370
    /* PS_jmpretfnew */
15371
    6229,
15372
    /* PS_jmpretfnewpt */
15373
    6231,
15374
    /* PS_jmprett */
15375
    6233,
15376
    /* PS_jmprettnew */
15377
    6235,
15378
    /* PS_jmprettnewpt */
15379
    6237,
15380
    /* PS_loadrbabs */
15381
    6239,
15382
    /* PS_loadrdabs */
15383
    6241,
15384
    /* PS_loadrhabs */
15385
    6243,
15386
    /* PS_loadriabs */
15387
    6245,
15388
    /* PS_loadrubabs */
15389
    6247,
15390
    /* PS_loadruhabs */
15391
    6249,
15392
    /* PS_storerbabs */
15393
    6251,
15394
    /* PS_storerbnewabs */
15395
    6253,
15396
    /* PS_storerdabs */
15397
    6255,
15398
    /* PS_storerfabs */
15399
    6257,
15400
    /* PS_storerhabs */
15401
    6259,
15402
    /* PS_storerhnewabs */
15403
    6261,
15404
    /* PS_storeriabs */
15405
    6263,
15406
    /* PS_storerinewabs */
15407
    6265,
15408
    /* PS_trap1 */
15409
    6267,
15410
    /* R6_release_at_vi */
15411
    6268,
15412
    /* R6_release_st_vi */
15413
    6269,
15414
    /* RESTORE_DEALLOC_BEFORE_TAILCALL_V4 */
15415
    6270,
15416
    /* RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT */
15417
    6271,
15418
    /* RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC */
15419
    6272,
15420
    /* RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC */
15421
    6273,
15422
    /* RESTORE_DEALLOC_RET_JMP_V4 */
15423
    6274,
15424
    /* RESTORE_DEALLOC_RET_JMP_V4_EXT */
15425
    6275,
15426
    /* RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC */
15427
    6276,
15428
    /* RESTORE_DEALLOC_RET_JMP_V4_PIC */
15429
    6277,
15430
    /* S2_addasl_rrri */
15431
    6278,
15432
    /* S2_allocframe */
15433
    6282,
15434
    /* S2_asl_i_p */
15435
    6285,
15436
    /* S2_asl_i_p_acc */
15437
    6288,
15438
    /* S2_asl_i_p_and */
15439
    6292,
15440
    /* S2_asl_i_p_nac */
15441
    6296,
15442
    /* S2_asl_i_p_or */
15443
    6300,
15444
    /* S2_asl_i_p_xacc */
15445
    6304,
15446
    /* S2_asl_i_r */
15447
    6308,
15448
    /* S2_asl_i_r_acc */
15449
    6311,
15450
    /* S2_asl_i_r_and */
15451
    6315,
15452
    /* S2_asl_i_r_nac */
15453
    6319,
15454
    /* S2_asl_i_r_or */
15455
    6323,
15456
    /* S2_asl_i_r_sat */
15457
    6327,
15458
    /* S2_asl_i_r_xacc */
15459
    6330,
15460
    /* S2_asl_i_vh */
15461
    6334,
15462
    /* S2_asl_i_vw */
15463
    6337,
15464
    /* S2_asl_r_p */
15465
    6340,
15466
    /* S2_asl_r_p_acc */
15467
    6343,
15468
    /* S2_asl_r_p_and */
15469
    6347,
15470
    /* S2_asl_r_p_nac */
15471
    6351,
15472
    /* S2_asl_r_p_or */
15473
    6355,
15474
    /* S2_asl_r_p_xor */
15475
    6359,
15476
    /* S2_asl_r_r */
15477
    6363,
15478
    /* S2_asl_r_r_acc */
15479
    6366,
15480
    /* S2_asl_r_r_and */
15481
    6370,
15482
    /* S2_asl_r_r_nac */
15483
    6374,
15484
    /* S2_asl_r_r_or */
15485
    6378,
15486
    /* S2_asl_r_r_sat */
15487
    6382,
15488
    /* S2_asl_r_vh */
15489
    6385,
15490
    /* S2_asl_r_vw */
15491
    6388,
15492
    /* S2_asr_i_p */
15493
    6391,
15494
    /* S2_asr_i_p_acc */
15495
    6394,
15496
    /* S2_asr_i_p_and */
15497
    6398,
15498
    /* S2_asr_i_p_nac */
15499
    6402,
15500
    /* S2_asr_i_p_or */
15501
    6406,
15502
    /* S2_asr_i_p_rnd */
15503
    6410,
15504
    /* S2_asr_i_r */
15505
    6413,
15506
    /* S2_asr_i_r_acc */
15507
    6416,
15508
    /* S2_asr_i_r_and */
15509
    6420,
15510
    /* S2_asr_i_r_nac */
15511
    6424,
15512
    /* S2_asr_i_r_or */
15513
    6428,
15514
    /* S2_asr_i_r_rnd */
15515
    6432,
15516
    /* S2_asr_i_svw_trun */
15517
    6435,
15518
    /* S2_asr_i_vh */
15519
    6438,
15520
    /* S2_asr_i_vw */
15521
    6441,
15522
    /* S2_asr_r_p */
15523
    6444,
15524
    /* S2_asr_r_p_acc */
15525
    6447,
15526
    /* S2_asr_r_p_and */
15527
    6451,
15528
    /* S2_asr_r_p_nac */
15529
    6455,
15530
    /* S2_asr_r_p_or */
15531
    6459,
15532
    /* S2_asr_r_p_xor */
15533
    6463,
15534
    /* S2_asr_r_r */
15535
    6467,
15536
    /* S2_asr_r_r_acc */
15537
    6470,
15538
    /* S2_asr_r_r_and */
15539
    6474,
15540
    /* S2_asr_r_r_nac */
15541
    6478,
15542
    /* S2_asr_r_r_or */
15543
    6482,
15544
    /* S2_asr_r_r_sat */
15545
    6486,
15546
    /* S2_asr_r_svw_trun */
15547
    6489,
15548
    /* S2_asr_r_vh */
15549
    6492,
15550
    /* S2_asr_r_vw */
15551
    6495,
15552
    /* S2_brev */
15553
    6498,
15554
    /* S2_brevp */
15555
    6500,
15556
    /* S2_cabacdecbin */
15557
    6502,
15558
    /* S2_cl0 */
15559
    6505,
15560
    /* S2_cl0p */
15561
    6507,
15562
    /* S2_cl1 */
15563
    6509,
15564
    /* S2_cl1p */
15565
    6511,
15566
    /* S2_clb */
15567
    6513,
15568
    /* S2_clbnorm */
15569
    6515,
15570
    /* S2_clbp */
15571
    6517,
15572
    /* S2_clrbit_i */
15573
    6519,
15574
    /* S2_clrbit_r */
15575
    6522,
15576
    /* S2_ct0 */
15577
    6525,
15578
    /* S2_ct0p */
15579
    6527,
15580
    /* S2_ct1 */
15581
    6529,
15582
    /* S2_ct1p */
15583
    6531,
15584
    /* S2_deinterleave */
15585
    6533,
15586
    /* S2_extractu */
15587
    6535,
15588
    /* S2_extractu_rp */
15589
    6539,
15590
    /* S2_extractup */
15591
    6542,
15592
    /* S2_extractup_rp */
15593
    6546,
15594
    /* S2_insert */
15595
    6549,
15596
    /* S2_insert_rp */
15597
    6554,
15598
    /* S2_insertp */
15599
    6558,
15600
    /* S2_insertp_rp */
15601
    6563,
15602
    /* S2_interleave */
15603
    6567,
15604
    /* S2_lfsp */
15605
    6569,
15606
    /* S2_lsl_r_p */
15607
    6572,
15608
    /* S2_lsl_r_p_acc */
15609
    6575,
15610
    /* S2_lsl_r_p_and */
15611
    6579,
15612
    /* S2_lsl_r_p_nac */
15613
    6583,
15614
    /* S2_lsl_r_p_or */
15615
    6587,
15616
    /* S2_lsl_r_p_xor */
15617
    6591,
15618
    /* S2_lsl_r_r */
15619
    6595,
15620
    /* S2_lsl_r_r_acc */
15621
    6598,
15622
    /* S2_lsl_r_r_and */
15623
    6602,
15624
    /* S2_lsl_r_r_nac */
15625
    6606,
15626
    /* S2_lsl_r_r_or */
15627
    6610,
15628
    /* S2_lsl_r_vh */
15629
    6614,
15630
    /* S2_lsl_r_vw */
15631
    6617,
15632
    /* S2_lsr_i_p */
15633
    6620,
15634
    /* S2_lsr_i_p_acc */
15635
    6623,
15636
    /* S2_lsr_i_p_and */
15637
    6627,
15638
    /* S2_lsr_i_p_nac */
15639
    6631,
15640
    /* S2_lsr_i_p_or */
15641
    6635,
15642
    /* S2_lsr_i_p_xacc */
15643
    6639,
15644
    /* S2_lsr_i_r */
15645
    6643,
15646
    /* S2_lsr_i_r_acc */
15647
    6646,
15648
    /* S2_lsr_i_r_and */
15649
    6650,
15650
    /* S2_lsr_i_r_nac */
15651
    6654,
15652
    /* S2_lsr_i_r_or */
15653
    6658,
15654
    /* S2_lsr_i_r_xacc */
15655
    6662,
15656
    /* S2_lsr_i_vh */
15657
    6666,
15658
    /* S2_lsr_i_vw */
15659
    6669,
15660
    /* S2_lsr_r_p */
15661
    6672,
15662
    /* S2_lsr_r_p_acc */
15663
    6675,
15664
    /* S2_lsr_r_p_and */
15665
    6679,
15666
    /* S2_lsr_r_p_nac */
15667
    6683,
15668
    /* S2_lsr_r_p_or */
15669
    6687,
15670
    /* S2_lsr_r_p_xor */
15671
    6691,
15672
    /* S2_lsr_r_r */
15673
    6695,
15674
    /* S2_lsr_r_r_acc */
15675
    6698,
15676
    /* S2_lsr_r_r_and */
15677
    6702,
15678
    /* S2_lsr_r_r_nac */
15679
    6706,
15680
    /* S2_lsr_r_r_or */
15681
    6710,
15682
    /* S2_lsr_r_vh */
15683
    6714,
15684
    /* S2_lsr_r_vw */
15685
    6717,
15686
    /* S2_mask */
15687
    6720,
15688
    /* S2_packhl */
15689
    6723,
15690
    /* S2_parityp */
15691
    6726,
15692
    /* S2_pstorerbf_io */
15693
    6729,
15694
    /* S2_pstorerbf_pi */
15695
    6733,
15696
    /* S2_pstorerbfnew_pi */
15697
    6738,
15698
    /* S2_pstorerbnewf_io */
15699
    6743,
15700
    /* S2_pstorerbnewf_pi */
15701
    6747,
15702
    /* S2_pstorerbnewfnew_pi */
15703
    6752,
15704
    /* S2_pstorerbnewt_io */
15705
    6757,
15706
    /* S2_pstorerbnewt_pi */
15707
    6761,
15708
    /* S2_pstorerbnewtnew_pi */
15709
    6766,
15710
    /* S2_pstorerbt_io */
15711
    6771,
15712
    /* S2_pstorerbt_pi */
15713
    6775,
15714
    /* S2_pstorerbtnew_pi */
15715
    6780,
15716
    /* S2_pstorerdf_io */
15717
    6785,
15718
    /* S2_pstorerdf_pi */
15719
    6789,
15720
    /* S2_pstorerdfnew_pi */
15721
    6794,
15722
    /* S2_pstorerdt_io */
15723
    6799,
15724
    /* S2_pstorerdt_pi */
15725
    6803,
15726
    /* S2_pstorerdtnew_pi */
15727
    6808,
15728
    /* S2_pstorerff_io */
15729
    6813,
15730
    /* S2_pstorerff_pi */
15731
    6817,
15732
    /* S2_pstorerffnew_pi */
15733
    6822,
15734
    /* S2_pstorerft_io */
15735
    6827,
15736
    /* S2_pstorerft_pi */
15737
    6831,
15738
    /* S2_pstorerftnew_pi */
15739
    6836,
15740
    /* S2_pstorerhf_io */
15741
    6841,
15742
    /* S2_pstorerhf_pi */
15743
    6845,
15744
    /* S2_pstorerhfnew_pi */
15745
    6850,
15746
    /* S2_pstorerhnewf_io */
15747
    6855,
15748
    /* S2_pstorerhnewf_pi */
15749
    6859,
15750
    /* S2_pstorerhnewfnew_pi */
15751
    6864,
15752
    /* S2_pstorerhnewt_io */
15753
    6869,
15754
    /* S2_pstorerhnewt_pi */
15755
    6873,
15756
    /* S2_pstorerhnewtnew_pi */
15757
    6878,
15758
    /* S2_pstorerht_io */
15759
    6883,
15760
    /* S2_pstorerht_pi */
15761
    6887,
15762
    /* S2_pstorerhtnew_pi */
15763
    6892,
15764
    /* S2_pstorerif_io */
15765
    6897,
15766
    /* S2_pstorerif_pi */
15767
    6901,
15768
    /* S2_pstorerifnew_pi */
15769
    6906,
15770
    /* S2_pstorerinewf_io */
15771
    6911,
15772
    /* S2_pstorerinewf_pi */
15773
    6915,
15774
    /* S2_pstorerinewfnew_pi */
15775
    6920,
15776
    /* S2_pstorerinewt_io */
15777
    6925,
15778
    /* S2_pstorerinewt_pi */
15779
    6929,
15780
    /* S2_pstorerinewtnew_pi */
15781
    6934,
15782
    /* S2_pstorerit_io */
15783
    6939,
15784
    /* S2_pstorerit_pi */
15785
    6943,
15786
    /* S2_pstoreritnew_pi */
15787
    6948,
15788
    /* S2_setbit_i */
15789
    6953,
15790
    /* S2_setbit_r */
15791
    6956,
15792
    /* S2_shuffeb */
15793
    6959,
15794
    /* S2_shuffeh */
15795
    6962,
15796
    /* S2_shuffob */
15797
    6965,
15798
    /* S2_shuffoh */
15799
    6968,
15800
    /* S2_storerb_io */
15801
    6971,
15802
    /* S2_storerb_pbr */
15803
    6974,
15804
    /* S2_storerb_pci */
15805
    6978,
15806
    /* S2_storerb_pcr */
15807
    6983,
15808
    /* S2_storerb_pi */
15809
    6987,
15810
    /* S2_storerb_pr */
15811
    6991,
15812
    /* S2_storerbgp */
15813
    6995,
15814
    /* S2_storerbnew_io */
15815
    6997,
15816
    /* S2_storerbnew_pbr */
15817
    7000,
15818
    /* S2_storerbnew_pci */
15819
    7004,
15820
    /* S2_storerbnew_pcr */
15821
    7009,
15822
    /* S2_storerbnew_pi */
15823
    7013,
15824
    /* S2_storerbnew_pr */
15825
    7017,
15826
    /* S2_storerbnewgp */
15827
    7021,
15828
    /* S2_storerd_io */
15829
    7023,
15830
    /* S2_storerd_pbr */
15831
    7026,
15832
    /* S2_storerd_pci */
15833
    7030,
15834
    /* S2_storerd_pcr */
15835
    7035,
15836
    /* S2_storerd_pi */
15837
    7039,
15838
    /* S2_storerd_pr */
15839
    7043,
15840
    /* S2_storerdgp */
15841
    7047,
15842
    /* S2_storerf_io */
15843
    7049,
15844
    /* S2_storerf_pbr */
15845
    7052,
15846
    /* S2_storerf_pci */
15847
    7056,
15848
    /* S2_storerf_pcr */
15849
    7061,
15850
    /* S2_storerf_pi */
15851
    7065,
15852
    /* S2_storerf_pr */
15853
    7069,
15854
    /* S2_storerfgp */
15855
    7073,
15856
    /* S2_storerh_io */
15857
    7075,
15858
    /* S2_storerh_pbr */
15859
    7078,
15860
    /* S2_storerh_pci */
15861
    7082,
15862
    /* S2_storerh_pcr */
15863
    7087,
15864
    /* S2_storerh_pi */
15865
    7091,
15866
    /* S2_storerh_pr */
15867
    7095,
15868
    /* S2_storerhgp */
15869
    7099,
15870
    /* S2_storerhnew_io */
15871
    7101,
15872
    /* S2_storerhnew_pbr */
15873
    7104,
15874
    /* S2_storerhnew_pci */
15875
    7108,
15876
    /* S2_storerhnew_pcr */
15877
    7113,
15878
    /* S2_storerhnew_pi */
15879
    7117,
15880
    /* S2_storerhnew_pr */
15881
    7121,
15882
    /* S2_storerhnewgp */
15883
    7125,
15884
    /* S2_storeri_io */
15885
    7127,
15886
    /* S2_storeri_pbr */
15887
    7130,
15888
    /* S2_storeri_pci */
15889
    7134,
15890
    /* S2_storeri_pcr */
15891
    7139,
15892
    /* S2_storeri_pi */
15893
    7143,
15894
    /* S2_storeri_pr */
15895
    7147,
15896
    /* S2_storerigp */
15897
    7151,
15898
    /* S2_storerinew_io */
15899
    7153,
15900
    /* S2_storerinew_pbr */
15901
    7156,
15902
    /* S2_storerinew_pci */
15903
    7160,
15904
    /* S2_storerinew_pcr */
15905
    7165,
15906
    /* S2_storerinew_pi */
15907
    7169,
15908
    /* S2_storerinew_pr */
15909
    7173,
15910
    /* S2_storerinewgp */
15911
    7177,
15912
    /* S2_storew_locked */
15913
    7179,
15914
    /* S2_storew_rl_at_vi */
15915
    7182,
15916
    /* S2_storew_rl_st_vi */
15917
    7184,
15918
    /* S2_svsathb */
15919
    7186,
15920
    /* S2_svsathub */
15921
    7188,
15922
    /* S2_tableidxb */
15923
    7190,
15924
    /* S2_tableidxd */
15925
    7195,
15926
    /* S2_tableidxh */
15927
    7200,
15928
    /* S2_tableidxw */
15929
    7205,
15930
    /* S2_togglebit_i */
15931
    7210,
15932
    /* S2_togglebit_r */
15933
    7213,
15934
    /* S2_tstbit_i */
15935
    7216,
15936
    /* S2_tstbit_r */
15937
    7219,
15938
    /* S2_valignib */
15939
    7222,
15940
    /* S2_valignrb */
15941
    7226,
15942
    /* S2_vcnegh */
15943
    7230,
15944
    /* S2_vcrotate */
15945
    7233,
15946
    /* S2_vrcnegh */
15947
    7236,
15948
    /* S2_vrndpackwh */
15949
    7240,
15950
    /* S2_vrndpackwhs */
15951
    7242,
15952
    /* S2_vsathb */
15953
    7244,
15954
    /* S2_vsathb_nopack */
15955
    7246,
15956
    /* S2_vsathub */
15957
    7248,
15958
    /* S2_vsathub_nopack */
15959
    7250,
15960
    /* S2_vsatwh */
15961
    7252,
15962
    /* S2_vsatwh_nopack */
15963
    7254,
15964
    /* S2_vsatwuh */
15965
    7256,
15966
    /* S2_vsatwuh_nopack */
15967
    7258,
15968
    /* S2_vsplatrb */
15969
    7260,
15970
    /* S2_vsplatrh */
15971
    7262,
15972
    /* S2_vspliceib */
15973
    7264,
15974
    /* S2_vsplicerb */
15975
    7268,
15976
    /* S2_vsxtbh */
15977
    7272,
15978
    /* S2_vsxthw */
15979
    7274,
15980
    /* S2_vtrunehb */
15981
    7276,
15982
    /* S2_vtrunewh */
15983
    7278,
15984
    /* S2_vtrunohb */
15985
    7281,
15986
    /* S2_vtrunowh */
15987
    7283,
15988
    /* S2_vzxtbh */
15989
    7286,
15990
    /* S2_vzxthw */
15991
    7288,
15992
    /* S4_addaddi */
15993
    7290,
15994
    /* S4_addi_asl_ri */
15995
    7294,
15996
    /* S4_addi_lsr_ri */
15997
    7298,
15998
    /* S4_andi_asl_ri */
15999
    7302,
16000
    /* S4_andi_lsr_ri */
16001
    7306,
16002
    /* S4_clbaddi */
16003
    7310,
16004
    /* S4_clbpaddi */
16005
    7313,
16006
    /* S4_clbpnorm */
16007
    7316,
16008
    /* S4_extract */
16009
    7318,
16010
    /* S4_extract_rp */
16011
    7322,
16012
    /* S4_extractp */
16013
    7325,
16014
    /* S4_extractp_rp */
16015
    7329,
16016
    /* S4_lsli */
16017
    7332,
16018
    /* S4_ntstbit_i */
16019
    7335,
16020
    /* S4_ntstbit_r */
16021
    7338,
16022
    /* S4_or_andi */
16023
    7341,
16024
    /* S4_or_andix */
16025
    7345,
16026
    /* S4_or_ori */
16027
    7349,
16028
    /* S4_ori_asl_ri */
16029
    7353,
16030
    /* S4_ori_lsr_ri */
16031
    7357,
16032
    /* S4_parity */
16033
    7361,
16034
    /* S4_pstorerbf_abs */
16035
    7364,
16036
    /* S4_pstorerbf_rr */
16037
    7367,
16038
    /* S4_pstorerbfnew_abs */
16039
    7372,
16040
    /* S4_pstorerbfnew_io */
16041
    7375,
16042
    /* S4_pstorerbfnew_rr */
16043
    7379,
16044
    /* S4_pstorerbnewf_abs */
16045
    7384,
16046
    /* S4_pstorerbnewf_rr */
16047
    7387,
16048
    /* S4_pstorerbnewfnew_abs */
16049
    7392,
16050
    /* S4_pstorerbnewfnew_io */
16051
    7395,
16052
    /* S4_pstorerbnewfnew_rr */
16053
    7399,
16054
    /* S4_pstorerbnewt_abs */
16055
    7404,
16056
    /* S4_pstorerbnewt_rr */
16057
    7407,
16058
    /* S4_pstorerbnewtnew_abs */
16059
    7412,
16060
    /* S4_pstorerbnewtnew_io */
16061
    7415,
16062
    /* S4_pstorerbnewtnew_rr */
16063
    7419,
16064
    /* S4_pstorerbt_abs */
16065
    7424,
16066
    /* S4_pstorerbt_rr */
16067
    7427,
16068
    /* S4_pstorerbtnew_abs */
16069
    7432,
16070
    /* S4_pstorerbtnew_io */
16071
    7435,
16072
    /* S4_pstorerbtnew_rr */
16073
    7439,
16074
    /* S4_pstorerdf_abs */
16075
    7444,
16076
    /* S4_pstorerdf_rr */
16077
    7447,
16078
    /* S4_pstorerdfnew_abs */
16079
    7452,
16080
    /* S4_pstorerdfnew_io */
16081
    7455,
16082
    /* S4_pstorerdfnew_rr */
16083
    7459,
16084
    /* S4_pstorerdt_abs */
16085
    7464,
16086
    /* S4_pstorerdt_rr */
16087
    7467,
16088
    /* S4_pstorerdtnew_abs */
16089
    7472,
16090
    /* S4_pstorerdtnew_io */
16091
    7475,
16092
    /* S4_pstorerdtnew_rr */
16093
    7479,
16094
    /* S4_pstorerff_abs */
16095
    7484,
16096
    /* S4_pstorerff_rr */
16097
    7487,
16098
    /* S4_pstorerffnew_abs */
16099
    7492,
16100
    /* S4_pstorerffnew_io */
16101
    7495,
16102
    /* S4_pstorerffnew_rr */
16103
    7499,
16104
    /* S4_pstorerft_abs */
16105
    7504,
16106
    /* S4_pstorerft_rr */
16107
    7507,
16108
    /* S4_pstorerftnew_abs */
16109
    7512,
16110
    /* S4_pstorerftnew_io */
16111
    7515,
16112
    /* S4_pstorerftnew_rr */
16113
    7519,
16114
    /* S4_pstorerhf_abs */
16115
    7524,
16116
    /* S4_pstorerhf_rr */
16117
    7527,
16118
    /* S4_pstorerhfnew_abs */
16119
    7532,
16120
    /* S4_pstorerhfnew_io */
16121
    7535,
16122
    /* S4_pstorerhfnew_rr */
16123
    7539,
16124
    /* S4_pstorerhnewf_abs */
16125
    7544,
16126
    /* S4_pstorerhnewf_rr */
16127
    7547,
16128
    /* S4_pstorerhnewfnew_abs */
16129
    7552,
16130
    /* S4_pstorerhnewfnew_io */
16131
    7555,
16132
    /* S4_pstorerhnewfnew_rr */
16133
    7559,
16134
    /* S4_pstorerhnewt_abs */
16135
    7564,
16136
    /* S4_pstorerhnewt_rr */
16137
    7567,
16138
    /* S4_pstorerhnewtnew_abs */
16139
    7572,
16140
    /* S4_pstorerhnewtnew_io */
16141
    7575,
16142
    /* S4_pstorerhnewtnew_rr */
16143
    7579,
16144
    /* S4_pstorerht_abs */
16145
    7584,
16146
    /* S4_pstorerht_rr */
16147
    7587,
16148
    /* S4_pstorerhtnew_abs */
16149
    7592,
16150
    /* S4_pstorerhtnew_io */
16151
    7595,
16152
    /* S4_pstorerhtnew_rr */
16153
    7599,
16154
    /* S4_pstorerif_abs */
16155
    7604,
16156
    /* S4_pstorerif_rr */
16157
    7607,
16158
    /* S4_pstorerifnew_abs */
16159
    7612,
16160
    /* S4_pstorerifnew_io */
16161
    7615,
16162
    /* S4_pstorerifnew_rr */
16163
    7619,
16164
    /* S4_pstorerinewf_abs */
16165
    7624,
16166
    /* S4_pstorerinewf_rr */
16167
    7627,
16168
    /* S4_pstorerinewfnew_abs */
16169
    7632,
16170
    /* S4_pstorerinewfnew_io */
16171
    7635,
16172
    /* S4_pstorerinewfnew_rr */
16173
    7639,
16174
    /* S4_pstorerinewt_abs */
16175
    7644,
16176
    /* S4_pstorerinewt_rr */
16177
    7647,
16178
    /* S4_pstorerinewtnew_abs */
16179
    7652,
16180
    /* S4_pstorerinewtnew_io */
16181
    7655,
16182
    /* S4_pstorerinewtnew_rr */
16183
    7659,
16184
    /* S4_pstorerit_abs */
16185
    7664,
16186
    /* S4_pstorerit_rr */
16187
    7667,
16188
    /* S4_pstoreritnew_abs */
16189
    7672,
16190
    /* S4_pstoreritnew_io */
16191
    7675,
16192
    /* S4_pstoreritnew_rr */
16193
    7679,
16194
    /* S4_stored_locked */
16195
    7684,
16196
    /* S4_stored_rl_at_vi */
16197
    7687,
16198
    /* S4_stored_rl_st_vi */
16199
    7689,
16200
    /* S4_storeirb_io */
16201
    7691,
16202
    /* S4_storeirbf_io */
16203
    7694,
16204
    /* S4_storeirbfnew_io */
16205
    7698,
16206
    /* S4_storeirbt_io */
16207
    7702,
16208
    /* S4_storeirbtnew_io */
16209
    7706,
16210
    /* S4_storeirh_io */
16211
    7710,
16212
    /* S4_storeirhf_io */
16213
    7713,
16214
    /* S4_storeirhfnew_io */
16215
    7717,
16216
    /* S4_storeirht_io */
16217
    7721,
16218
    /* S4_storeirhtnew_io */
16219
    7725,
16220
    /* S4_storeiri_io */
16221
    7729,
16222
    /* S4_storeirif_io */
16223
    7732,
16224
    /* S4_storeirifnew_io */
16225
    7736,
16226
    /* S4_storeirit_io */
16227
    7740,
16228
    /* S4_storeiritnew_io */
16229
    7744,
16230
    /* S4_storerb_ap */
16231
    7748,
16232
    /* S4_storerb_rr */
16233
    7751,
16234
    /* S4_storerb_ur */
16235
    7755,
16236
    /* S4_storerbnew_ap */
16237
    7759,
16238
    /* S4_storerbnew_rr */
16239
    7762,
16240
    /* S4_storerbnew_ur */
16241
    7766,
16242
    /* S4_storerd_ap */
16243
    7770,
16244
    /* S4_storerd_rr */
16245
    7773,
16246
    /* S4_storerd_ur */
16247
    7777,
16248
    /* S4_storerf_ap */
16249
    7781,
16250
    /* S4_storerf_rr */
16251
    7784,
16252
    /* S4_storerf_ur */
16253
    7788,
16254
    /* S4_storerh_ap */
16255
    7792,
16256
    /* S4_storerh_rr */
16257
    7795,
16258
    /* S4_storerh_ur */
16259
    7799,
16260
    /* S4_storerhnew_ap */
16261
    7803,
16262
    /* S4_storerhnew_rr */
16263
    7806,
16264
    /* S4_storerhnew_ur */
16265
    7810,
16266
    /* S4_storeri_ap */
16267
    7814,
16268
    /* S4_storeri_rr */
16269
    7817,
16270
    /* S4_storeri_ur */
16271
    7821,
16272
    /* S4_storerinew_ap */
16273
    7825,
16274
    /* S4_storerinew_rr */
16275
    7828,
16276
    /* S4_storerinew_ur */
16277
    7832,
16278
    /* S4_subaddi */
16279
    7836,
16280
    /* S4_subi_asl_ri */
16281
    7840,
16282
    /* S4_subi_lsr_ri */
16283
    7844,
16284
    /* S4_vrcrotate */
16285
    7848,
16286
    /* S4_vrcrotate_acc */
16287
    7852,
16288
    /* S4_vxaddsubh */
16289
    7857,
16290
    /* S4_vxaddsubhr */
16291
    7860,
16292
    /* S4_vxaddsubw */
16293
    7863,
16294
    /* S4_vxsubaddh */
16295
    7866,
16296
    /* S4_vxsubaddhr */
16297
    7869,
16298
    /* S4_vxsubaddw */
16299
    7872,
16300
    /* S5_asrhub_rnd_sat */
16301
    7875,
16302
    /* S5_asrhub_sat */
16303
    7878,
16304
    /* S5_popcountp */
16305
    7881,
16306
    /* S5_vasrhrnd */
16307
    7883,
16308
    /* S6_rol_i_p */
16309
    7886,
16310
    /* S6_rol_i_p_acc */
16311
    7889,
16312
    /* S6_rol_i_p_and */
16313
    7893,
16314
    /* S6_rol_i_p_nac */
16315
    7897,
16316
    /* S6_rol_i_p_or */
16317
    7901,
16318
    /* S6_rol_i_p_xacc */
16319
    7905,
16320
    /* S6_rol_i_r */
16321
    7909,
16322
    /* S6_rol_i_r_acc */
16323
    7912,
16324
    /* S6_rol_i_r_and */
16325
    7916,
16326
    /* S6_rol_i_r_nac */
16327
    7920,
16328
    /* S6_rol_i_r_or */
16329
    7924,
16330
    /* S6_rol_i_r_xacc */
16331
    7928,
16332
    /* S6_vsplatrbp */
16333
    7932,
16334
    /* S6_vtrunehb_ppp */
16335
    7934,
16336
    /* S6_vtrunohb_ppp */
16337
    7937,
16338
    /* SA1_addi */
16339
    7940,
16340
    /* SA1_addrx */
16341
    7943,
16342
    /* SA1_addsp */
16343
    7946,
16344
    /* SA1_and1 */
16345
    7948,
16346
    /* SA1_clrf */
16347
    7950,
16348
    /* SA1_clrfnew */
16349
    7951,
16350
    /* SA1_clrt */
16351
    7952,
16352
    /* SA1_clrtnew */
16353
    7953,
16354
    /* SA1_cmpeqi */
16355
    7954,
16356
    /* SA1_combine0i */
16357
    7956,
16358
    /* SA1_combine1i */
16359
    7958,
16360
    /* SA1_combine2i */
16361
    7960,
16362
    /* SA1_combine3i */
16363
    7962,
16364
    /* SA1_combinerz */
16365
    7964,
16366
    /* SA1_combinezr */
16367
    7966,
16368
    /* SA1_dec */
16369
    7968,
16370
    /* SA1_inc */
16371
    7971,
16372
    /* SA1_seti */
16373
    7973,
16374
    /* SA1_setin1 */
16375
    7975,
16376
    /* SA1_sxtb */
16377
    7977,
16378
    /* SA1_sxth */
16379
    7979,
16380
    /* SA1_tfr */
16381
    7981,
16382
    /* SA1_zxtb */
16383
    7983,
16384
    /* SA1_zxth */
16385
    7985,
16386
    /* SAVE_REGISTERS_CALL_V4 */
16387
    7987,
16388
    /* SAVE_REGISTERS_CALL_V4STK */
16389
    7988,
16390
    /* SAVE_REGISTERS_CALL_V4STK_EXT */
16391
    7989,
16392
    /* SAVE_REGISTERS_CALL_V4STK_EXT_PIC */
16393
    7990,
16394
    /* SAVE_REGISTERS_CALL_V4STK_PIC */
16395
    7991,
16396
    /* SAVE_REGISTERS_CALL_V4_EXT */
16397
    7992,
16398
    /* SAVE_REGISTERS_CALL_V4_EXT_PIC */
16399
    7993,
16400
    /* SAVE_REGISTERS_CALL_V4_PIC */
16401
    7994,
16402
    /* SL1_loadri_io */
16403
    7995,
16404
    /* SL1_loadrub_io */
16405
    7998,
16406
    /* SL2_deallocframe */
16407
    8001,
16408
    /* SL2_jumpr31 */
16409
    8001,
16410
    /* SL2_jumpr31_f */
16411
    8001,
16412
    /* SL2_jumpr31_fnew */
16413
    8001,
16414
    /* SL2_jumpr31_t */
16415
    8001,
16416
    /* SL2_jumpr31_tnew */
16417
    8001,
16418
    /* SL2_loadrb_io */
16419
    8001,
16420
    /* SL2_loadrd_sp */
16421
    8004,
16422
    /* SL2_loadrh_io */
16423
    8006,
16424
    /* SL2_loadri_sp */
16425
    8009,
16426
    /* SL2_loadruh_io */
16427
    8011,
16428
    /* SL2_return */
16429
    8014,
16430
    /* SL2_return_f */
16431
    8014,
16432
    /* SL2_return_fnew */
16433
    8014,
16434
    /* SL2_return_t */
16435
    8014,
16436
    /* SL2_return_tnew */
16437
    8014,
16438
    /* SS1_storeb_io */
16439
    8014,
16440
    /* SS1_storew_io */
16441
    8017,
16442
    /* SS2_allocframe */
16443
    8020,
16444
    /* SS2_storebi0 */
16445
    8021,
16446
    /* SS2_storebi1 */
16447
    8023,
16448
    /* SS2_stored_sp */
16449
    8025,
16450
    /* SS2_storeh_io */
16451
    8027,
16452
    /* SS2_storew_sp */
16453
    8030,
16454
    /* SS2_storewi0 */
16455
    8032,
16456
    /* SS2_storewi1 */
16457
    8034,
16458
    /* TFRI64_V2_ext */
16459
    8036,
16460
    /* TFRI64_V4 */
16461
    8039,
16462
    /* V6_extractw */
16463
    8041,
16464
    /* V6_lvsplatb */
16465
    8044,
16466
    /* V6_lvsplath */
16467
    8046,
16468
    /* V6_lvsplatw */
16469
    8048,
16470
    /* V6_pred_and */
16471
    8050,
16472
    /* V6_pred_and_n */
16473
    8053,
16474
    /* V6_pred_not */
16475
    8056,
16476
    /* V6_pred_or */
16477
    8058,
16478
    /* V6_pred_or_n */
16479
    8061,
16480
    /* V6_pred_scalar2 */
16481
    8064,
16482
    /* V6_pred_scalar2v2 */
16483
    8066,
16484
    /* V6_pred_xor */
16485
    8068,
16486
    /* V6_shuffeqh */
16487
    8071,
16488
    /* V6_shuffeqw */
16489
    8074,
16490
    /* V6_v6mpyhubs10 */
16491
    8077,
16492
    /* V6_v6mpyhubs10_vxx */
16493
    8081,
16494
    /* V6_v6mpyvubs10 */
16495
    8086,
16496
    /* V6_v6mpyvubs10_vxx */
16497
    8090,
16498
    /* V6_vL32Ub_ai */
16499
    8095,
16500
    /* V6_vL32Ub_pi */
16501
    8098,
16502
    /* V6_vL32Ub_ppu */
16503
    8102,
16504
    /* V6_vL32b_ai */
16505
    8106,
16506
    /* V6_vL32b_cur_ai */
16507
    8109,
16508
    /* V6_vL32b_cur_npred_ai */
16509
    8112,
16510
    /* V6_vL32b_cur_npred_pi */
16511
    8116,
16512
    /* V6_vL32b_cur_npred_ppu */
16513
    8121,
16514
    /* V6_vL32b_cur_pi */
16515
    8126,
16516
    /* V6_vL32b_cur_ppu */
16517
    8130,
16518
    /* V6_vL32b_cur_pred_ai */
16519
    8134,
16520
    /* V6_vL32b_cur_pred_pi */
16521
    8138,
16522
    /* V6_vL32b_cur_pred_ppu */
16523
    8143,
16524
    /* V6_vL32b_npred_ai */
16525
    8148,
16526
    /* V6_vL32b_npred_pi */
16527
    8152,
16528
    /* V6_vL32b_npred_ppu */
16529
    8157,
16530
    /* V6_vL32b_nt_ai */
16531
    8162,
16532
    /* V6_vL32b_nt_cur_ai */
16533
    8165,
16534
    /* V6_vL32b_nt_cur_npred_ai */
16535
    8168,
16536
    /* V6_vL32b_nt_cur_npred_pi */
16537
    8172,
16538
    /* V6_vL32b_nt_cur_npred_ppu */
16539
    8177,
16540
    /* V6_vL32b_nt_cur_pi */
16541
    8182,
16542
    /* V6_vL32b_nt_cur_ppu */
16543
    8186,
16544
    /* V6_vL32b_nt_cur_pred_ai */
16545
    8190,
16546
    /* V6_vL32b_nt_cur_pred_pi */
16547
    8194,
16548
    /* V6_vL32b_nt_cur_pred_ppu */
16549
    8199,
16550
    /* V6_vL32b_nt_npred_ai */
16551
    8204,
16552
    /* V6_vL32b_nt_npred_pi */
16553
    8208,
16554
    /* V6_vL32b_nt_npred_ppu */
16555
    8213,
16556
    /* V6_vL32b_nt_pi */
16557
    8218,
16558
    /* V6_vL32b_nt_ppu */
16559
    8222,
16560
    /* V6_vL32b_nt_pred_ai */
16561
    8226,
16562
    /* V6_vL32b_nt_pred_pi */
16563
    8230,
16564
    /* V6_vL32b_nt_pred_ppu */
16565
    8235,
16566
    /* V6_vL32b_nt_tmp_ai */
16567
    8240,
16568
    /* V6_vL32b_nt_tmp_npred_ai */
16569
    8243,
16570
    /* V6_vL32b_nt_tmp_npred_pi */
16571
    8247,
16572
    /* V6_vL32b_nt_tmp_npred_ppu */
16573
    8252,
16574
    /* V6_vL32b_nt_tmp_pi */
16575
    8257,
16576
    /* V6_vL32b_nt_tmp_ppu */
16577
    8261,
16578
    /* V6_vL32b_nt_tmp_pred_ai */
16579
    8265,
16580
    /* V6_vL32b_nt_tmp_pred_pi */
16581
    8269,
16582
    /* V6_vL32b_nt_tmp_pred_ppu */
16583
    8274,
16584
    /* V6_vL32b_pi */
16585
    8279,
16586
    /* V6_vL32b_ppu */
16587
    8283,
16588
    /* V6_vL32b_pred_ai */
16589
    8287,
16590
    /* V6_vL32b_pred_pi */
16591
    8291,
16592
    /* V6_vL32b_pred_ppu */
16593
    8296,
16594
    /* V6_vL32b_tmp_ai */
16595
    8301,
16596
    /* V6_vL32b_tmp_npred_ai */
16597
    8304,
16598
    /* V6_vL32b_tmp_npred_pi */
16599
    8308,
16600
    /* V6_vL32b_tmp_npred_ppu */
16601
    8313,
16602
    /* V6_vL32b_tmp_pi */
16603
    8318,
16604
    /* V6_vL32b_tmp_ppu */
16605
    8322,
16606
    /* V6_vL32b_tmp_pred_ai */
16607
    8326,
16608
    /* V6_vL32b_tmp_pred_pi */
16609
    8330,
16610
    /* V6_vL32b_tmp_pred_ppu */
16611
    8335,
16612
    /* V6_vS32Ub_ai */
16613
    8340,
16614
    /* V6_vS32Ub_npred_ai */
16615
    8343,
16616
    /* V6_vS32Ub_npred_pi */
16617
    8347,
16618
    /* V6_vS32Ub_npred_ppu */
16619
    8352,
16620
    /* V6_vS32Ub_pi */
16621
    8357,
16622
    /* V6_vS32Ub_ppu */
16623
    8361,
16624
    /* V6_vS32Ub_pred_ai */
16625
    8365,
16626
    /* V6_vS32Ub_pred_pi */
16627
    8369,
16628
    /* V6_vS32Ub_pred_ppu */
16629
    8374,
16630
    /* V6_vS32b_ai */
16631
    8379,
16632
    /* V6_vS32b_new_ai */
16633
    8382,
16634
    /* V6_vS32b_new_npred_ai */
16635
    8385,
16636
    /* V6_vS32b_new_npred_pi */
16637
    8389,
16638
    /* V6_vS32b_new_npred_ppu */
16639
    8394,
16640
    /* V6_vS32b_new_pi */
16641
    8399,
16642
    /* V6_vS32b_new_ppu */
16643
    8403,
16644
    /* V6_vS32b_new_pred_ai */
16645
    8407,
16646
    /* V6_vS32b_new_pred_pi */
16647
    8411,
16648
    /* V6_vS32b_new_pred_ppu */
16649
    8416,
16650
    /* V6_vS32b_npred_ai */
16651
    8421,
16652
    /* V6_vS32b_npred_pi */
16653
    8425,
16654
    /* V6_vS32b_npred_ppu */
16655
    8430,
16656
    /* V6_vS32b_nqpred_ai */
16657
    8435,
16658
    /* V6_vS32b_nqpred_pi */
16659
    8439,
16660
    /* V6_vS32b_nqpred_ppu */
16661
    8444,
16662
    /* V6_vS32b_nt_ai */
16663
    8449,
16664
    /* V6_vS32b_nt_new_ai */
16665
    8452,
16666
    /* V6_vS32b_nt_new_npred_ai */
16667
    8455,
16668
    /* V6_vS32b_nt_new_npred_pi */
16669
    8459,
16670
    /* V6_vS32b_nt_new_npred_ppu */
16671
    8464,
16672
    /* V6_vS32b_nt_new_pi */
16673
    8469,
16674
    /* V6_vS32b_nt_new_ppu */
16675
    8473,
16676
    /* V6_vS32b_nt_new_pred_ai */
16677
    8477,
16678
    /* V6_vS32b_nt_new_pred_pi */
16679
    8481,
16680
    /* V6_vS32b_nt_new_pred_ppu */
16681
    8486,
16682
    /* V6_vS32b_nt_npred_ai */
16683
    8491,
16684
    /* V6_vS32b_nt_npred_pi */
16685
    8495,
16686
    /* V6_vS32b_nt_npred_ppu */
16687
    8500,
16688
    /* V6_vS32b_nt_nqpred_ai */
16689
    8505,
16690
    /* V6_vS32b_nt_nqpred_pi */
16691
    8509,
16692
    /* V6_vS32b_nt_nqpred_ppu */
16693
    8514,
16694
    /* V6_vS32b_nt_pi */
16695
    8519,
16696
    /* V6_vS32b_nt_ppu */
16697
    8523,
16698
    /* V6_vS32b_nt_pred_ai */
16699
    8527,
16700
    /* V6_vS32b_nt_pred_pi */
16701
    8531,
16702
    /* V6_vS32b_nt_pred_ppu */
16703
    8536,
16704
    /* V6_vS32b_nt_qpred_ai */
16705
    8541,
16706
    /* V6_vS32b_nt_qpred_pi */
16707
    8545,
16708
    /* V6_vS32b_nt_qpred_ppu */
16709
    8550,
16710
    /* V6_vS32b_pi */
16711
    8555,
16712
    /* V6_vS32b_ppu */
16713
    8559,
16714
    /* V6_vS32b_pred_ai */
16715
    8563,
16716
    /* V6_vS32b_pred_pi */
16717
    8567,
16718
    /* V6_vS32b_pred_ppu */
16719
    8572,
16720
    /* V6_vS32b_qpred_ai */
16721
    8577,
16722
    /* V6_vS32b_qpred_pi */
16723
    8581,
16724
    /* V6_vS32b_qpred_ppu */
16725
    8586,
16726
    /* V6_vS32b_srls_ai */
16727
    8591,
16728
    /* V6_vS32b_srls_pi */
16729
    8593,
16730
    /* V6_vS32b_srls_ppu */
16731
    8596,
16732
    /* V6_vabs_hf */
16733
    8599,
16734
    /* V6_vabs_sf */
16735
    8601,
16736
    /* V6_vabsb */
16737
    8603,
16738
    /* V6_vabsb_sat */
16739
    8605,
16740
    /* V6_vabsdiffh */
16741
    8607,
16742
    /* V6_vabsdiffub */
16743
    8610,
16744
    /* V6_vabsdiffuh */
16745
    8613,
16746
    /* V6_vabsdiffw */
16747
    8616,
16748
    /* V6_vabsh */
16749
    8619,
16750
    /* V6_vabsh_sat */
16751
    8621,
16752
    /* V6_vabsw */
16753
    8623,
16754
    /* V6_vabsw_sat */
16755
    8625,
16756
    /* V6_vadd_hf */
16757
    8627,
16758
    /* V6_vadd_hf_hf */
16759
    8630,
16760
    /* V6_vadd_qf16 */
16761
    8633,
16762
    /* V6_vadd_qf16_mix */
16763
    8636,
16764
    /* V6_vadd_qf32 */
16765
    8639,
16766
    /* V6_vadd_qf32_mix */
16767
    8642,
16768
    /* V6_vadd_sf */
16769
    8645,
16770
    /* V6_vadd_sf_bf */
16771
    8648,
16772
    /* V6_vadd_sf_hf */
16773
    8651,
16774
    /* V6_vadd_sf_sf */
16775
    8654,
16776
    /* V6_vaddb */
16777
    8657,
16778
    /* V6_vaddb_dv */
16779
    8660,
16780
    /* V6_vaddbnq */
16781
    8663,
16782
    /* V6_vaddbq */
16783
    8667,
16784
    /* V6_vaddbsat */
16785
    8671,
16786
    /* V6_vaddbsat_dv */
16787
    8674,
16788
    /* V6_vaddcarry */
16789
    8677,
16790
    /* V6_vaddcarryo */
16791
    8682,
16792
    /* V6_vaddcarrysat */
16793
    8686,
16794
    /* V6_vaddclbh */
16795
    8690,
16796
    /* V6_vaddclbw */
16797
    8693,
16798
    /* V6_vaddh */
16799
    8696,
16800
    /* V6_vaddh_dv */
16801
    8699,
16802
    /* V6_vaddhnq */
16803
    8702,
16804
    /* V6_vaddhq */
16805
    8706,
16806
    /* V6_vaddhsat */
16807
    8710,
16808
    /* V6_vaddhsat_dv */
16809
    8713,
16810
    /* V6_vaddhw */
16811
    8716,
16812
    /* V6_vaddhw_acc */
16813
    8719,
16814
    /* V6_vaddubh */
16815
    8723,
16816
    /* V6_vaddubh_acc */
16817
    8726,
16818
    /* V6_vaddubsat */
16819
    8730,
16820
    /* V6_vaddubsat_dv */
16821
    8733,
16822
    /* V6_vaddububb_sat */
16823
    8736,
16824
    /* V6_vadduhsat */
16825
    8739,
16826
    /* V6_vadduhsat_dv */
16827
    8742,
16828
    /* V6_vadduhw */
16829
    8745,
16830
    /* V6_vadduhw_acc */
16831
    8748,
16832
    /* V6_vadduwsat */
16833
    8752,
16834
    /* V6_vadduwsat_dv */
16835
    8755,
16836
    /* V6_vaddw */
16837
    8758,
16838
    /* V6_vaddw_dv */
16839
    8761,
16840
    /* V6_vaddwnq */
16841
    8764,
16842
    /* V6_vaddwq */
16843
    8768,
16844
    /* V6_vaddwsat */
16845
    8772,
16846
    /* V6_vaddwsat_dv */
16847
    8775,
16848
    /* V6_valignb */
16849
    8778,
16850
    /* V6_valignbi */
16851
    8782,
16852
    /* V6_vand */
16853
    8786,
16854
    /* V6_vandnqrt */
16855
    8789,
16856
    /* V6_vandnqrt_acc */
16857
    8792,
16858
    /* V6_vandqrt */
16859
    8796,
16860
    /* V6_vandqrt_acc */
16861
    8799,
16862
    /* V6_vandvnqv */
16863
    8803,
16864
    /* V6_vandvqv */
16865
    8806,
16866
    /* V6_vandvrt */
16867
    8809,
16868
    /* V6_vandvrt_acc */
16869
    8812,
16870
    /* V6_vaslh */
16871
    8816,
16872
    /* V6_vaslh_acc */
16873
    8819,
16874
    /* V6_vaslhv */
16875
    8823,
16876
    /* V6_vaslw */
16877
    8826,
16878
    /* V6_vaslw_acc */
16879
    8829,
16880
    /* V6_vaslwv */
16881
    8833,
16882
    /* V6_vasr_into */
16883
    8836,
16884
    /* V6_vasrh */
16885
    8840,
16886
    /* V6_vasrh_acc */
16887
    8843,
16888
    /* V6_vasrhbrndsat */
16889
    8847,
16890
    /* V6_vasrhbsat */
16891
    8851,
16892
    /* V6_vasrhubrndsat */
16893
    8855,
16894
    /* V6_vasrhubsat */
16895
    8859,
16896
    /* V6_vasrhv */
16897
    8863,
16898
    /* V6_vasruhubrndsat */
16899
    8866,
16900
    /* V6_vasruhubsat */
16901
    8870,
16902
    /* V6_vasruwuhrndsat */
16903
    8874,
16904
    /* V6_vasruwuhsat */
16905
    8878,
16906
    /* V6_vasrvuhubrndsat */
16907
    8882,
16908
    /* V6_vasrvuhubsat */
16909
    8885,
16910
    /* V6_vasrvwuhrndsat */
16911
    8888,
16912
    /* V6_vasrvwuhsat */
16913
    8891,
16914
    /* V6_vasrw */
16915
    8894,
16916
    /* V6_vasrw_acc */
16917
    8897,
16918
    /* V6_vasrwh */
16919
    8901,
16920
    /* V6_vasrwhrndsat */
16921
    8905,
16922
    /* V6_vasrwhsat */
16923
    8909,
16924
    /* V6_vasrwuhrndsat */
16925
    8913,
16926
    /* V6_vasrwuhsat */
16927
    8917,
16928
    /* V6_vasrwv */
16929
    8921,
16930
    /* V6_vassign */
16931
    8924,
16932
    /* V6_vassign_fp */
16933
    8926,
16934
    /* V6_vassign_tmp */
16935
    8928,
16936
    /* V6_vavgb */
16937
    8930,
16938
    /* V6_vavgbrnd */
16939
    8933,
16940
    /* V6_vavgh */
16941
    8936,
16942
    /* V6_vavghrnd */
16943
    8939,
16944
    /* V6_vavgub */
16945
    8942,
16946
    /* V6_vavgubrnd */
16947
    8945,
16948
    /* V6_vavguh */
16949
    8948,
16950
    /* V6_vavguhrnd */
16951
    8951,
16952
    /* V6_vavguw */
16953
    8954,
16954
    /* V6_vavguwrnd */
16955
    8957,
16956
    /* V6_vavgw */
16957
    8960,
16958
    /* V6_vavgwrnd */
16959
    8963,
16960
    /* V6_vccombine */
16961
    8966,
16962
    /* V6_vcl0h */
16963
    8970,
16964
    /* V6_vcl0w */
16965
    8972,
16966
    /* V6_vcmov */
16967
    8974,
16968
    /* V6_vcombine */
16969
    8977,
16970
    /* V6_vcombine_tmp */
16971
    8980,
16972
    /* V6_vconv_h_hf */
16973
    8983,
16974
    /* V6_vconv_hf_h */
16975
    8985,
16976
    /* V6_vconv_hf_qf16 */
16977
    8987,
16978
    /* V6_vconv_hf_qf32 */
16979
    8989,
16980
    /* V6_vconv_sf_qf32 */
16981
    8991,
16982
    /* V6_vconv_sf_w */
16983
    8993,
16984
    /* V6_vconv_w_sf */
16985
    8995,
16986
    /* V6_vcvt_b_hf */
16987
    8997,
16988
    /* V6_vcvt_bf_sf */
16989
    9000,
16990
    /* V6_vcvt_h_hf */
16991
    9003,
16992
    /* V6_vcvt_hf_b */
16993
    9005,
16994
    /* V6_vcvt_hf_h */
16995
    9007,
16996
    /* V6_vcvt_hf_sf */
16997
    9009,
16998
    /* V6_vcvt_hf_ub */
16999
    9012,
17000
    /* V6_vcvt_hf_uh */
17001
    9014,
17002
    /* V6_vcvt_sf_hf */
17003
    9016,
17004
    /* V6_vcvt_ub_hf */
17005
    9018,
17006
    /* V6_vcvt_uh_hf */
17007
    9021,
17008
    /* V6_vdeal */
17009
    9023,
17010
    /* V6_vdealb */
17011
    9028,
17012
    /* V6_vdealb4w */
17013
    9030,
17014
    /* V6_vdealh */
17015
    9033,
17016
    /* V6_vdealvdd */
17017
    9035,
17018
    /* V6_vdelta */
17019
    9039,
17020
    /* V6_vdmpy_sf_hf */
17021
    9042,
17022
    /* V6_vdmpy_sf_hf_acc */
17023
    9045,
17024
    /* V6_vdmpybus */
17025
    9049,
17026
    /* V6_vdmpybus_acc */
17027
    9052,
17028
    /* V6_vdmpybus_dv */
17029
    9056,
17030
    /* V6_vdmpybus_dv_acc */
17031
    9059,
17032
    /* V6_vdmpyhb */
17033
    9063,
17034
    /* V6_vdmpyhb_acc */
17035
    9066,
17036
    /* V6_vdmpyhb_dv */
17037
    9070,
17038
    /* V6_vdmpyhb_dv_acc */
17039
    9073,
17040
    /* V6_vdmpyhisat */
17041
    9077,
17042
    /* V6_vdmpyhisat_acc */
17043
    9080,
17044
    /* V6_vdmpyhsat */
17045
    9084,
17046
    /* V6_vdmpyhsat_acc */
17047
    9087,
17048
    /* V6_vdmpyhsuisat */
17049
    9091,
17050
    /* V6_vdmpyhsuisat_acc */
17051
    9094,
17052
    /* V6_vdmpyhsusat */
17053
    9098,
17054
    /* V6_vdmpyhsusat_acc */
17055
    9101,
17056
    /* V6_vdmpyhvsat */
17057
    9105,
17058
    /* V6_vdmpyhvsat_acc */
17059
    9108,
17060
    /* V6_vdsaduh */
17061
    9112,
17062
    /* V6_vdsaduh_acc */
17063
    9115,
17064
    /* V6_veqb */
17065
    9119,
17066
    /* V6_veqb_and */
17067
    9122,
17068
    /* V6_veqb_or */
17069
    9126,
17070
    /* V6_veqb_xor */
17071
    9130,
17072
    /* V6_veqh */
17073
    9134,
17074
    /* V6_veqh_and */
17075
    9137,
17076
    /* V6_veqh_or */
17077
    9141,
17078
    /* V6_veqh_xor */
17079
    9145,
17080
    /* V6_veqw */
17081
    9149,
17082
    /* V6_veqw_and */
17083
    9152,
17084
    /* V6_veqw_or */
17085
    9156,
17086
    /* V6_veqw_xor */
17087
    9160,
17088
    /* V6_vfmax_hf */
17089
    9164,
17090
    /* V6_vfmax_sf */
17091
    9167,
17092
    /* V6_vfmin_hf */
17093
    9170,
17094
    /* V6_vfmin_sf */
17095
    9173,
17096
    /* V6_vfneg_hf */
17097
    9176,
17098
    /* V6_vfneg_sf */
17099
    9178,
17100
    /* V6_vgathermh */
17101
    9180,
17102
    /* V6_vgathermhq */
17103
    9183,
17104
    /* V6_vgathermhw */
17105
    9187,
17106
    /* V6_vgathermhwq */
17107
    9190,
17108
    /* V6_vgathermw */
17109
    9194,
17110
    /* V6_vgathermwq */
17111
    9197,
17112
    /* V6_vgtb */
17113
    9201,
17114
    /* V6_vgtb_and */
17115
    9204,
17116
    /* V6_vgtb_or */
17117
    9208,
17118
    /* V6_vgtb_xor */
17119
    9212,
17120
    /* V6_vgtbf */
17121
    9216,
17122
    /* V6_vgtbf_and */
17123
    9219,
17124
    /* V6_vgtbf_or */
17125
    9223,
17126
    /* V6_vgtbf_xor */
17127
    9227,
17128
    /* V6_vgth */
17129
    9231,
17130
    /* V6_vgth_and */
17131
    9234,
17132
    /* V6_vgth_or */
17133
    9238,
17134
    /* V6_vgth_xor */
17135
    9242,
17136
    /* V6_vgthf */
17137
    9246,
17138
    /* V6_vgthf_and */
17139
    9249,
17140
    /* V6_vgthf_or */
17141
    9253,
17142
    /* V6_vgthf_xor */
17143
    9257,
17144
    /* V6_vgtsf */
17145
    9261,
17146
    /* V6_vgtsf_and */
17147
    9264,
17148
    /* V6_vgtsf_or */
17149
    9268,
17150
    /* V6_vgtsf_xor */
17151
    9272,
17152
    /* V6_vgtub */
17153
    9276,
17154
    /* V6_vgtub_and */
17155
    9279,
17156
    /* V6_vgtub_or */
17157
    9283,
17158
    /* V6_vgtub_xor */
17159
    9287,
17160
    /* V6_vgtuh */
17161
    9291,
17162
    /* V6_vgtuh_and */
17163
    9294,
17164
    /* V6_vgtuh_or */
17165
    9298,
17166
    /* V6_vgtuh_xor */
17167
    9302,
17168
    /* V6_vgtuw */
17169
    9306,
17170
    /* V6_vgtuw_and */
17171
    9309,
17172
    /* V6_vgtuw_or */
17173
    9313,
17174
    /* V6_vgtuw_xor */
17175
    9317,
17176
    /* V6_vgtw */
17177
    9321,
17178
    /* V6_vgtw_and */
17179
    9324,
17180
    /* V6_vgtw_or */
17181
    9328,
17182
    /* V6_vgtw_xor */
17183
    9332,
17184
    /* V6_vhist */
17185
    9336,
17186
    /* V6_vhistq */
17187
    9336,
17188
    /* V6_vinsertwr */
17189
    9337,
17190
    /* V6_vlalignb */
17191
    9340,
17192
    /* V6_vlalignbi */
17193
    9344,
17194
    /* V6_vlsrb */
17195
    9348,
17196
    /* V6_vlsrh */
17197
    9351,
17198
    /* V6_vlsrhv */
17199
    9354,
17200
    /* V6_vlsrw */
17201
    9357,
17202
    /* V6_vlsrwv */
17203
    9360,
17204
    /* V6_vlut4 */
17205
    9363,
17206
    /* V6_vlutvvb */
17207
    9366,
17208
    /* V6_vlutvvb_nm */
17209
    9370,
17210
    /* V6_vlutvvb_oracc */
17211
    9374,
17212
    /* V6_vlutvvb_oracci */
17213
    9379,
17214
    /* V6_vlutvvbi */
17215
    9384,
17216
    /* V6_vlutvwh */
17217
    9388,
17218
    /* V6_vlutvwh_nm */
17219
    9392,
17220
    /* V6_vlutvwh_oracc */
17221
    9396,
17222
    /* V6_vlutvwh_oracci */
17223
    9401,
17224
    /* V6_vlutvwhi */
17225
    9406,
17226
    /* V6_vmax_bf */
17227
    9410,
17228
    /* V6_vmax_hf */
17229
    9413,
17230
    /* V6_vmax_sf */
17231
    9416,
17232
    /* V6_vmaxb */
17233
    9419,
17234
    /* V6_vmaxh */
17235
    9422,
17236
    /* V6_vmaxub */
17237
    9425,
17238
    /* V6_vmaxuh */
17239
    9428,
17240
    /* V6_vmaxw */
17241
    9431,
17242
    /* V6_vmin_bf */
17243
    9434,
17244
    /* V6_vmin_hf */
17245
    9437,
17246
    /* V6_vmin_sf */
17247
    9440,
17248
    /* V6_vminb */
17249
    9443,
17250
    /* V6_vminh */
17251
    9446,
17252
    /* V6_vminub */
17253
    9449,
17254
    /* V6_vminuh */
17255
    9452,
17256
    /* V6_vminw */
17257
    9455,
17258
    /* V6_vmpabus */
17259
    9458,
17260
    /* V6_vmpabus_acc */
17261
    9461,
17262
    /* V6_vmpabusv */
17263
    9465,
17264
    /* V6_vmpabuu */
17265
    9468,
17266
    /* V6_vmpabuu_acc */
17267
    9471,
17268
    /* V6_vmpabuuv */
17269
    9475,
17270
    /* V6_vmpahb */
17271
    9478,
17272
    /* V6_vmpahb_acc */
17273
    9481,
17274
    /* V6_vmpahhsat */
17275
    9485,
17276
    /* V6_vmpauhb */
17277
    9489,
17278
    /* V6_vmpauhb_acc */
17279
    9492,
17280
    /* V6_vmpauhuhsat */
17281
    9496,
17282
    /* V6_vmpsuhuhsat */
17283
    9500,
17284
    /* V6_vmpy_hf_hf */
17285
    9504,
17286
    /* V6_vmpy_hf_hf_acc */
17287
    9507,
17288
    /* V6_vmpy_qf16 */
17289
    9511,
17290
    /* V6_vmpy_qf16_hf */
17291
    9514,
17292
    /* V6_vmpy_qf16_mix_hf */
17293
    9517,
17294
    /* V6_vmpy_qf32 */
17295
    9520,
17296
    /* V6_vmpy_qf32_hf */
17297
    9523,
17298
    /* V6_vmpy_qf32_mix_hf */
17299
    9526,
17300
    /* V6_vmpy_qf32_qf16 */
17301
    9529,
17302
    /* V6_vmpy_qf32_sf */
17303
    9532,
17304
    /* V6_vmpy_sf_bf */
17305
    9535,
17306
    /* V6_vmpy_sf_bf_acc */
17307
    9538,
17308
    /* V6_vmpy_sf_hf */
17309
    9542,
17310
    /* V6_vmpy_sf_hf_acc */
17311
    9545,
17312
    /* V6_vmpy_sf_sf */
17313
    9549,
17314
    /* V6_vmpybus */
17315
    9552,
17316
    /* V6_vmpybus_acc */
17317
    9555,
17318
    /* V6_vmpybusv */
17319
    9559,
17320
    /* V6_vmpybusv_acc */
17321
    9562,
17322
    /* V6_vmpybv */
17323
    9566,
17324
    /* V6_vmpybv_acc */
17325
    9569,
17326
    /* V6_vmpyewuh */
17327
    9573,
17328
    /* V6_vmpyewuh_64 */
17329
    9576,
17330
    /* V6_vmpyh */
17331
    9579,
17332
    /* V6_vmpyh_acc */
17333
    9582,
17334
    /* V6_vmpyhsat_acc */
17335
    9586,
17336
    /* V6_vmpyhsrs */
17337
    9590,
17338
    /* V6_vmpyhss */
17339
    9593,
17340
    /* V6_vmpyhus */
17341
    9596,
17342
    /* V6_vmpyhus_acc */
17343
    9599,
17344
    /* V6_vmpyhv */
17345
    9603,
17346
    /* V6_vmpyhv_acc */
17347
    9606,
17348
    /* V6_vmpyhvsrs */
17349
    9610,
17350
    /* V6_vmpyieoh */
17351
    9613,
17352
    /* V6_vmpyiewh_acc */
17353
    9616,
17354
    /* V6_vmpyiewuh */
17355
    9620,
17356
    /* V6_vmpyiewuh_acc */
17357
    9623,
17358
    /* V6_vmpyih */
17359
    9627,
17360
    /* V6_vmpyih_acc */
17361
    9630,
17362
    /* V6_vmpyihb */
17363
    9634,
17364
    /* V6_vmpyihb_acc */
17365
    9637,
17366
    /* V6_vmpyiowh */
17367
    9641,
17368
    /* V6_vmpyiwb */
17369
    9644,
17370
    /* V6_vmpyiwb_acc */
17371
    9647,
17372
    /* V6_vmpyiwh */
17373
    9651,
17374
    /* V6_vmpyiwh_acc */
17375
    9654,
17376
    /* V6_vmpyiwub */
17377
    9658,
17378
    /* V6_vmpyiwub_acc */
17379
    9661,
17380
    /* V6_vmpyowh */
17381
    9665,
17382
    /* V6_vmpyowh_64_acc */
17383
    9668,
17384
    /* V6_vmpyowh_rnd */
17385
    9672,
17386
    /* V6_vmpyowh_rnd_sacc */
17387
    9675,
17388
    /* V6_vmpyowh_sacc */
17389
    9679,
17390
    /* V6_vmpyub */
17391
    9683,
17392
    /* V6_vmpyub_acc */
17393
    9686,
17394
    /* V6_vmpyubv */
17395
    9690,
17396
    /* V6_vmpyubv_acc */
17397
    9693,
17398
    /* V6_vmpyuh */
17399
    9697,
17400
    /* V6_vmpyuh_acc */
17401
    9700,
17402
    /* V6_vmpyuhe */
17403
    9704,
17404
    /* V6_vmpyuhe_acc */
17405
    9707,
17406
    /* V6_vmpyuhv */
17407
    9711,
17408
    /* V6_vmpyuhv_acc */
17409
    9714,
17410
    /* V6_vmpyuhvs */
17411
    9718,
17412
    /* V6_vmux */
17413
    9721,
17414
    /* V6_vnavgb */
17415
    9725,
17416
    /* V6_vnavgh */
17417
    9728,
17418
    /* V6_vnavgub */
17419
    9731,
17420
    /* V6_vnavgw */
17421
    9734,
17422
    /* V6_vnccombine */
17423
    9737,
17424
    /* V6_vncmov */
17425
    9741,
17426
    /* V6_vnormamth */
17427
    9744,
17428
    /* V6_vnormamtw */
17429
    9746,
17430
    /* V6_vnot */
17431
    9748,
17432
    /* V6_vor */
17433
    9750,
17434
    /* V6_vpackeb */
17435
    9753,
17436
    /* V6_vpackeh */
17437
    9756,
17438
    /* V6_vpackhb_sat */
17439
    9759,
17440
    /* V6_vpackhub_sat */
17441
    9762,
17442
    /* V6_vpackob */
17443
    9765,
17444
    /* V6_vpackoh */
17445
    9768,
17446
    /* V6_vpackwh_sat */
17447
    9771,
17448
    /* V6_vpackwuh_sat */
17449
    9774,
17450
    /* V6_vpopcounth */
17451
    9777,
17452
    /* V6_vprefixqb */
17453
    9779,
17454
    /* V6_vprefixqh */
17455
    9781,
17456
    /* V6_vprefixqw */
17457
    9783,
17458
    /* V6_vrdelta */
17459
    9785,
17460
    /* V6_vrmpybub_rtt */
17461
    9788,
17462
    /* V6_vrmpybub_rtt_acc */
17463
    9791,
17464
    /* V6_vrmpybus */
17465
    9795,
17466
    /* V6_vrmpybus_acc */
17467
    9798,
17468
    /* V6_vrmpybusi */
17469
    9802,
17470
    /* V6_vrmpybusi_acc */
17471
    9806,
17472
    /* V6_vrmpybusv */
17473
    9811,
17474
    /* V6_vrmpybusv_acc */
17475
    9814,
17476
    /* V6_vrmpybv */
17477
    9818,
17478
    /* V6_vrmpybv_acc */
17479
    9821,
17480
    /* V6_vrmpyub */
17481
    9825,
17482
    /* V6_vrmpyub_acc */
17483
    9828,
17484
    /* V6_vrmpyub_rtt */
17485
    9832,
17486
    /* V6_vrmpyub_rtt_acc */
17487
    9835,
17488
    /* V6_vrmpyubi */
17489
    9839,
17490
    /* V6_vrmpyubi_acc */
17491
    9843,
17492
    /* V6_vrmpyubv */
17493
    9848,
17494
    /* V6_vrmpyubv_acc */
17495
    9851,
17496
    /* V6_vrmpyzbb_rt */
17497
    9855,
17498
    /* V6_vrmpyzbb_rt_acc */
17499
    9858,
17500
    /* V6_vrmpyzbb_rx */
17501
    9862,
17502
    /* V6_vrmpyzbb_rx_acc */
17503
    9866,
17504
    /* V6_vrmpyzbub_rt */
17505
    9871,
17506
    /* V6_vrmpyzbub_rt_acc */
17507
    9874,
17508
    /* V6_vrmpyzbub_rx */
17509
    9878,
17510
    /* V6_vrmpyzbub_rx_acc */
17511
    9882,
17512
    /* V6_vrmpyzcb_rt */
17513
    9887,
17514
    /* V6_vrmpyzcb_rt_acc */
17515
    9890,
17516
    /* V6_vrmpyzcb_rx */
17517
    9894,
17518
    /* V6_vrmpyzcb_rx_acc */
17519
    9898,
17520
    /* V6_vrmpyzcbs_rt */
17521
    9903,
17522
    /* V6_vrmpyzcbs_rt_acc */
17523
    9906,
17524
    /* V6_vrmpyzcbs_rx */
17525
    9910,
17526
    /* V6_vrmpyzcbs_rx_acc */
17527
    9914,
17528
    /* V6_vrmpyznb_rt */
17529
    9919,
17530
    /* V6_vrmpyznb_rt_acc */
17531
    9922,
17532
    /* V6_vrmpyznb_rx */
17533
    9926,
17534
    /* V6_vrmpyznb_rx_acc */
17535
    9930,
17536
    /* V6_vror */
17537
    9935,
17538
    /* V6_vrotr */
17539
    9938,
17540
    /* V6_vroundhb */
17541
    9941,
17542
    /* V6_vroundhub */
17543
    9944,
17544
    /* V6_vrounduhub */
17545
    9947,
17546
    /* V6_vrounduwuh */
17547
    9950,
17548
    /* V6_vroundwh */
17549
    9953,
17550
    /* V6_vroundwuh */
17551
    9956,
17552
    /* V6_vrsadubi */
17553
    9959,
17554
    /* V6_vrsadubi_acc */
17555
    9963,
17556
    /* V6_vsatdw */
17557
    9968,
17558
    /* V6_vsathub */
17559
    9971,
17560
    /* V6_vsatuwuh */
17561
    9974,
17562
    /* V6_vsatwh */
17563
    9977,
17564
    /* V6_vsb */
17565
    9980,
17566
    /* V6_vscattermh */
17567
    9982,
17568
    /* V6_vscattermh_add */
17569
    9986,
17570
    /* V6_vscattermhq */
17571
    9990,
17572
    /* V6_vscattermhw */
17573
    9995,
17574
    /* V6_vscattermhw_add */
17575
    9999,
17576
    /* V6_vscattermhwq */
17577
    10003,
17578
    /* V6_vscattermw */
17579
    10008,
17580
    /* V6_vscattermw_add */
17581
    10012,
17582
    /* V6_vscattermwq */
17583
    10016,
17584
    /* V6_vsh */
17585
    10021,
17586
    /* V6_vshufeh */
17587
    10023,
17588
    /* V6_vshuff */
17589
    10026,
17590
    /* V6_vshuffb */
17591
    10031,
17592
    /* V6_vshuffeb */
17593
    10033,
17594
    /* V6_vshuffh */
17595
    10036,
17596
    /* V6_vshuffob */
17597
    10038,
17598
    /* V6_vshuffvdd */
17599
    10041,
17600
    /* V6_vshufoeb */
17601
    10045,
17602
    /* V6_vshufoeh */
17603
    10048,
17604
    /* V6_vshufoh */
17605
    10051,
17606
    /* V6_vsub_hf */
17607
    10054,
17608
    /* V6_vsub_hf_hf */
17609
    10057,
17610
    /* V6_vsub_qf16 */
17611
    10060,
17612
    /* V6_vsub_qf16_mix */
17613
    10063,
17614
    /* V6_vsub_qf32 */
17615
    10066,
17616
    /* V6_vsub_qf32_mix */
17617
    10069,
17618
    /* V6_vsub_sf */
17619
    10072,
17620
    /* V6_vsub_sf_bf */
17621
    10075,
17622
    /* V6_vsub_sf_hf */
17623
    10078,
17624
    /* V6_vsub_sf_sf */
17625
    10081,
17626
    /* V6_vsubb */
17627
    10084,
17628
    /* V6_vsubb_dv */
17629
    10087,
17630
    /* V6_vsubbnq */
17631
    10090,
17632
    /* V6_vsubbq */
17633
    10094,
17634
    /* V6_vsubbsat */
17635
    10098,
17636
    /* V6_vsubbsat_dv */
17637
    10101,
17638
    /* V6_vsubcarry */
17639
    10104,
17640
    /* V6_vsubcarryo */
17641
    10109,
17642
    /* V6_vsubh */
17643
    10113,
17644
    /* V6_vsubh_dv */
17645
    10116,
17646
    /* V6_vsubhnq */
17647
    10119,
17648
    /* V6_vsubhq */
17649
    10123,
17650
    /* V6_vsubhsat */
17651
    10127,
17652
    /* V6_vsubhsat_dv */
17653
    10130,
17654
    /* V6_vsubhw */
17655
    10133,
17656
    /* V6_vsububh */
17657
    10136,
17658
    /* V6_vsububsat */
17659
    10139,
17660
    /* V6_vsububsat_dv */
17661
    10142,
17662
    /* V6_vsubububb_sat */
17663
    10145,
17664
    /* V6_vsubuhsat */
17665
    10148,
17666
    /* V6_vsubuhsat_dv */
17667
    10151,
17668
    /* V6_vsubuhw */
17669
    10154,
17670
    /* V6_vsubuwsat */
17671
    10157,
17672
    /* V6_vsubuwsat_dv */
17673
    10160,
17674
    /* V6_vsubw */
17675
    10163,
17676
    /* V6_vsubw_dv */
17677
    10166,
17678
    /* V6_vsubwnq */
17679
    10169,
17680
    /* V6_vsubwq */
17681
    10173,
17682
    /* V6_vsubwsat */
17683
    10177,
17684
    /* V6_vsubwsat_dv */
17685
    10180,
17686
    /* V6_vswap */
17687
    10183,
17688
    /* V6_vtmpyb */
17689
    10187,
17690
    /* V6_vtmpyb_acc */
17691
    10190,
17692
    /* V6_vtmpybus */
17693
    10194,
17694
    /* V6_vtmpybus_acc */
17695
    10197,
17696
    /* V6_vtmpyhb */
17697
    10201,
17698
    /* V6_vtmpyhb_acc */
17699
    10204,
17700
    /* V6_vunpackb */
17701
    10208,
17702
    /* V6_vunpackh */
17703
    10210,
17704
    /* V6_vunpackob */
17705
    10212,
17706
    /* V6_vunpackoh */
17707
    10215,
17708
    /* V6_vunpackub */
17709
    10218,
17710
    /* V6_vunpackuh */
17711
    10220,
17712
    /* V6_vwhist128 */
17713
    10222,
17714
    /* V6_vwhist128m */
17715
    10222,
17716
    /* V6_vwhist128q */
17717
    10223,
17718
    /* V6_vwhist128qm */
17719
    10224,
17720
    /* V6_vwhist256 */
17721
    10226,
17722
    /* V6_vwhist256_sat */
17723
    10226,
17724
    /* V6_vwhist256q */
17725
    10226,
17726
    /* V6_vwhist256q_sat */
17727
    10227,
17728
    /* V6_vxor */
17729
    10228,
17730
    /* V6_vzb */
17731
    10231,
17732
    /* V6_vzh */
17733
    10233,
17734
    /* V6_zLd_ai */
17735
    10235,
17736
    /* V6_zLd_pi */
17737
    10237,
17738
    /* V6_zLd_ppu */
17739
    10240,
17740
    /* V6_zLd_pred_ai */
17741
    10243,
17742
    /* V6_zLd_pred_pi */
17743
    10246,
17744
    /* V6_zLd_pred_ppu */
17745
    10250,
17746
    /* V6_zextract */
17747
    10254,
17748
    /* Y2_barrier */
17749
    10256,
17750
    /* Y2_break */
17751
    10256,
17752
    /* Y2_ciad */
17753
    10256,
17754
    /* Y2_crswap0 */
17755
    10257,
17756
    /* Y2_cswi */
17757
    10259,
17758
    /* Y2_dccleana */
17759
    10260,
17760
    /* Y2_dccleanidx */
17761
    10261,
17762
    /* Y2_dccleaninva */
17763
    10262,
17764
    /* Y2_dccleaninvidx */
17765
    10263,
17766
    /* Y2_dcfetchbo */
17767
    10264,
17768
    /* Y2_dcinva */
17769
    10266,
17770
    /* Y2_dcinvidx */
17771
    10267,
17772
    /* Y2_dckill */
17773
    10268,
17774
    /* Y2_dctagr */
17775
    10268,
17776
    /* Y2_dctagw */
17777
    10270,
17778
    /* Y2_dczeroa */
17779
    10272,
17780
    /* Y2_getimask */
17781
    10273,
17782
    /* Y2_iassignr */
17783
    10275,
17784
    /* Y2_iassignw */
17785
    10277,
17786
    /* Y2_icdatar */
17787
    10278,
17788
    /* Y2_icdataw */
17789
    10280,
17790
    /* Y2_icinva */
17791
    10282,
17792
    /* Y2_icinvidx */
17793
    10283,
17794
    /* Y2_ickill */
17795
    10284,
17796
    /* Y2_ictagr */
17797
    10284,
17798
    /* Y2_ictagw */
17799
    10286,
17800
    /* Y2_isync */
17801
    10288,
17802
    /* Y2_k0lock */
17803
    10288,
17804
    /* Y2_k0unlock */
17805
    10288,
17806
    /* Y2_l2cleaninvidx */
17807
    10288,
17808
    /* Y2_l2kill */
17809
    10289,
17810
    /* Y2_resume */
17811
    10289,
17812
    /* Y2_setimask */
17813
    10290,
17814
    /* Y2_setprio */
17815
    10292,
17816
    /* Y2_start */
17817
    10294,
17818
    /* Y2_stop */
17819
    10295,
17820
    /* Y2_swi */
17821
    10296,
17822
    /* Y2_syncht */
17823
    10297,
17824
    /* Y2_tfrscrr */
17825
    10297,
17826
    /* Y2_tfrsrcr */
17827
    10299,
17828
    /* Y2_tlblock */
17829
    10301,
17830
    /* Y2_tlbp */
17831
    10301,
17832
    /* Y2_tlbr */
17833
    10303,
17834
    /* Y2_tlbunlock */
17835
    10305,
17836
    /* Y2_tlbw */
17837
    10305,
17838
    /* Y2_wait */
17839
    10307,
17840
    /* Y4_crswap1 */
17841
    10308,
17842
    /* Y4_crswap10 */
17843
    10310,
17844
    /* Y4_l2fetch */
17845
    10313,
17846
    /* Y4_l2tagr */
17847
    10315,
17848
    /* Y4_l2tagw */
17849
    10317,
17850
    /* Y4_nmi */
17851
    10319,
17852
    /* Y4_siad */
17853
    10320,
17854
    /* Y4_tfrscpp */
17855
    10321,
17856
    /* Y4_tfrspcp */
17857
    10323,
17858
    /* Y4_trace */
17859
    10325,
17860
    /* Y5_ctlbw */
17861
    10326,
17862
    /* Y5_l2cleanidx */
17863
    10329,
17864
    /* Y5_l2fetch */
17865
    10330,
17866
    /* Y5_l2gclean */
17867
    10332,
17868
    /* Y5_l2gcleaninv */
17869
    10332,
17870
    /* Y5_l2gunlock */
17871
    10332,
17872
    /* Y5_l2invidx */
17873
    10332,
17874
    /* Y5_l2locka */
17875
    10333,
17876
    /* Y5_l2unlocka */
17877
    10335,
17878
    /* Y5_tlbasidi */
17879
    10336,
17880
    /* Y5_tlboc */
17881
    10337,
17882
    /* Y6_diag */
17883
    10339,
17884
    /* Y6_diag0 */
17885
    10340,
17886
    /* Y6_diag1 */
17887
    10342,
17888
    /* Y6_dmlink */
17889
    10344,
17890
    /* Y6_dmpause */
17891
    10346,
17892
    /* Y6_dmpoll */
17893
    10347,
17894
    /* Y6_dmresume */
17895
    10348,
17896
    /* Y6_dmstart */
17897
    10349,
17898
    /* Y6_dmwait */
17899
    10350,
17900
    /* Y6_l2gcleaninvpa */
17901
    10351,
17902
    /* Y6_l2gcleanpa */
17903
    10352,
17904
    /* dep_A2_addsat */
17905
    10353,
17906
    /* dep_A2_subsat */
17907
    10356,
17908
    /* dep_S2_packhl */
17909
    10359,
17910
    /* invalid_decode */
17911
    10362,
17912
  };
17913
17914
  using namespace OpTypes;
17915
  static const int8_t OpcodeOperandTypes[] = {
17916
    
17917
    /* PHI */
17918
    -1, 
17919
    /* INLINEASM */
17920
    /* INLINEASM_BR */
17921
    /* CFI_INSTRUCTION */
17922
    i32imm, 
17923
    /* EH_LABEL */
17924
    i32imm, 
17925
    /* GC_LABEL */
17926
    i32imm, 
17927
    /* ANNOTATION_LABEL */
17928
    i32imm, 
17929
    /* KILL */
17930
    /* EXTRACT_SUBREG */
17931
    -1, -1, i32imm, 
17932
    /* INSERT_SUBREG */
17933
    -1, -1, -1, i32imm, 
17934
    /* IMPLICIT_DEF */
17935
    -1, 
17936
    /* SUBREG_TO_REG */
17937
    -1, -1, -1, i32imm, 
17938
    /* COPY_TO_REGCLASS */
17939
    -1, -1, i32imm, 
17940
    /* DBG_VALUE */
17941
    /* DBG_VALUE_LIST */
17942
    /* DBG_INSTR_REF */
17943
    /* DBG_PHI */
17944
    /* DBG_LABEL */
17945
    -1, 
17946
    /* REG_SEQUENCE */
17947
    -1, -1, 
17948
    /* COPY */
17949
    -1, -1, 
17950
    /* BUNDLE */
17951
    /* LIFETIME_START */
17952
    i32imm, 
17953
    /* LIFETIME_END */
17954
    i32imm, 
17955
    /* PSEUDO_PROBE */
17956
    i64imm, i64imm, i8imm, i32imm, 
17957
    /* ARITH_FENCE */
17958
    -1, -1, 
17959
    /* STACKMAP */
17960
    i64imm, i32imm, 
17961
    /* FENTRY_CALL */
17962
    /* PATCHPOINT */
17963
    -1, i64imm, i32imm, -1, i32imm, i32imm, 
17964
    /* LOAD_STACK_GUARD */
17965
    -1, 
17966
    /* PREALLOCATED_SETUP */
17967
    i32imm, 
17968
    /* PREALLOCATED_ARG */
17969
    -1, i32imm, i32imm, 
17970
    /* STATEPOINT */
17971
    /* LOCAL_ESCAPE */
17972
    -1, i32imm, 
17973
    /* FAULTING_OP */
17974
    -1, 
17975
    /* PATCHABLE_OP */
17976
    /* PATCHABLE_FUNCTION_ENTER */
17977
    /* PATCHABLE_RET */
17978
    /* PATCHABLE_FUNCTION_EXIT */
17979
    /* PATCHABLE_TAIL_CALL */
17980
    /* PATCHABLE_EVENT_CALL */
17981
    -1, -1, 
17982
    /* PATCHABLE_TYPED_EVENT_CALL */
17983
    -1, -1, -1, 
17984
    /* ICALL_BRANCH_FUNNEL */
17985
    /* MEMBARRIER */
17986
    /* JUMP_TABLE_DEBUG_INFO */
17987
    i64imm, 
17988
    /* G_ASSERT_SEXT */
17989
    type0, type0, untyped_imm_0, 
17990
    /* G_ASSERT_ZEXT */
17991
    type0, type0, untyped_imm_0, 
17992
    /* G_ASSERT_ALIGN */
17993
    type0, type0, untyped_imm_0, 
17994
    /* G_ADD */
17995
    type0, type0, type0, 
17996
    /* G_SUB */
17997
    type0, type0, type0, 
17998
    /* G_MUL */
17999
    type0, type0, type0, 
18000
    /* G_SDIV */
18001
    type0, type0, type0, 
18002
    /* G_UDIV */
18003
    type0, type0, type0, 
18004
    /* G_SREM */
18005
    type0, type0, type0, 
18006
    /* G_UREM */
18007
    type0, type0, type0, 
18008
    /* G_SDIVREM */
18009
    type0, type0, type0, type0, 
18010
    /* G_UDIVREM */
18011
    type0, type0, type0, type0, 
18012
    /* G_AND */
18013
    type0, type0, type0, 
18014
    /* G_OR */
18015
    type0, type0, type0, 
18016
    /* G_XOR */
18017
    type0, type0, type0, 
18018
    /* G_IMPLICIT_DEF */
18019
    type0, 
18020
    /* G_PHI */
18021
    type0, 
18022
    /* G_FRAME_INDEX */
18023
    type0, -1, 
18024
    /* G_GLOBAL_VALUE */
18025
    type0, -1, 
18026
    /* G_CONSTANT_POOL */
18027
    type0, -1, 
18028
    /* G_EXTRACT */
18029
    type0, type1, untyped_imm_0, 
18030
    /* G_UNMERGE_VALUES */
18031
    type0, type1, 
18032
    /* G_INSERT */
18033
    type0, type0, type1, untyped_imm_0, 
18034
    /* G_MERGE_VALUES */
18035
    type0, type1, 
18036
    /* G_BUILD_VECTOR */
18037
    type0, type1, 
18038
    /* G_BUILD_VECTOR_TRUNC */
18039
    type0, type1, 
18040
    /* G_CONCAT_VECTORS */
18041
    type0, type1, 
18042
    /* G_PTRTOINT */
18043
    type0, type1, 
18044
    /* G_INTTOPTR */
18045
    type0, type1, 
18046
    /* G_BITCAST */
18047
    type0, type1, 
18048
    /* G_FREEZE */
18049
    type0, type0, 
18050
    /* G_CONSTANT_FOLD_BARRIER */
18051
    type0, type0, 
18052
    /* G_INTRINSIC_FPTRUNC_ROUND */
18053
    type0, type1, i32imm, 
18054
    /* G_INTRINSIC_TRUNC */
18055
    type0, type0, 
18056
    /* G_INTRINSIC_ROUND */
18057
    type0, type0, 
18058
    /* G_INTRINSIC_LRINT */
18059
    type0, type1, 
18060
    /* G_INTRINSIC_ROUNDEVEN */
18061
    type0, type0, 
18062
    /* G_READCYCLECOUNTER */
18063
    type0, 
18064
    /* G_LOAD */
18065
    type0, ptype1, 
18066
    /* G_SEXTLOAD */
18067
    type0, ptype1, 
18068
    /* G_ZEXTLOAD */
18069
    type0, ptype1, 
18070
    /* G_INDEXED_LOAD */
18071
    type0, ptype1, ptype1, type2, -1, 
18072
    /* G_INDEXED_SEXTLOAD */
18073
    type0, ptype1, ptype1, type2, -1, 
18074
    /* G_INDEXED_ZEXTLOAD */
18075
    type0, ptype1, ptype1, type2, -1, 
18076
    /* G_STORE */
18077
    type0, ptype1, 
18078
    /* G_INDEXED_STORE */
18079
    ptype0, type1, ptype0, ptype2, -1, 
18080
    /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */
18081
    type0, type1, type2, type0, type0, 
18082
    /* G_ATOMIC_CMPXCHG */
18083
    type0, ptype1, type0, type0, 
18084
    /* G_ATOMICRMW_XCHG */
18085
    type0, ptype1, type0, 
18086
    /* G_ATOMICRMW_ADD */
18087
    type0, ptype1, type0, 
18088
    /* G_ATOMICRMW_SUB */
18089
    type0, ptype1, type0, 
18090
    /* G_ATOMICRMW_AND */
18091
    type0, ptype1, type0, 
18092
    /* G_ATOMICRMW_NAND */
18093
    type0, ptype1, type0, 
18094
    /* G_ATOMICRMW_OR */
18095
    type0, ptype1, type0, 
18096
    /* G_ATOMICRMW_XOR */
18097
    type0, ptype1, type0, 
18098
    /* G_ATOMICRMW_MAX */
18099
    type0, ptype1, type0, 
18100
    /* G_ATOMICRMW_MIN */
18101
    type0, ptype1, type0, 
18102
    /* G_ATOMICRMW_UMAX */
18103
    type0, ptype1, type0, 
18104
    /* G_ATOMICRMW_UMIN */
18105
    type0, ptype1, type0, 
18106
    /* G_ATOMICRMW_FADD */
18107
    type0, ptype1, type0, 
18108
    /* G_ATOMICRMW_FSUB */
18109
    type0, ptype1, type0, 
18110
    /* G_ATOMICRMW_FMAX */
18111
    type0, ptype1, type0, 
18112
    /* G_ATOMICRMW_FMIN */
18113
    type0, ptype1, type0, 
18114
    /* G_ATOMICRMW_UINC_WRAP */
18115
    type0, ptype1, type0, 
18116
    /* G_ATOMICRMW_UDEC_WRAP */
18117
    type0, ptype1, type0, 
18118
    /* G_FENCE */
18119
    i32imm, i32imm, 
18120
    /* G_PREFETCH */
18121
    ptype0, i32imm, i32imm, i32imm, 
18122
    /* G_BRCOND */
18123
    type0, -1, 
18124
    /* G_BRINDIRECT */
18125
    type0, 
18126
    /* G_INVOKE_REGION_START */
18127
    /* G_INTRINSIC */
18128
    -1, 
18129
    /* G_INTRINSIC_W_SIDE_EFFECTS */
18130
    -1, 
18131
    /* G_INTRINSIC_CONVERGENT */
18132
    -1, 
18133
    /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */
18134
    -1, 
18135
    /* G_ANYEXT */
18136
    type0, type1, 
18137
    /* G_TRUNC */
18138
    type0, type1, 
18139
    /* G_CONSTANT */
18140
    type0, -1, 
18141
    /* G_FCONSTANT */
18142
    type0, -1, 
18143
    /* G_VASTART */
18144
    type0, 
18145
    /* G_VAARG */
18146
    type0, type1, -1, 
18147
    /* G_SEXT */
18148
    type0, type1, 
18149
    /* G_SEXT_INREG */
18150
    type0, type0, untyped_imm_0, 
18151
    /* G_ZEXT */
18152
    type0, type1, 
18153
    /* G_SHL */
18154
    type0, type0, type1, 
18155
    /* G_LSHR */
18156
    type0, type0, type1, 
18157
    /* G_ASHR */
18158
    type0, type0, type1, 
18159
    /* G_FSHL */
18160
    type0, type0, type0, type1, 
18161
    /* G_FSHR */
18162
    type0, type0, type0, type1, 
18163
    /* G_ROTR */
18164
    type0, type0, type1, 
18165
    /* G_ROTL */
18166
    type0, type0, type1, 
18167
    /* G_ICMP */
18168
    type0, -1, type1, type1, 
18169
    /* G_FCMP */
18170
    type0, -1, type1, type1, 
18171
    /* G_SELECT */
18172
    type0, type1, type0, type0, 
18173
    /* G_UADDO */
18174
    type0, type1, type0, type0, 
18175
    /* G_UADDE */
18176
    type0, type1, type0, type0, type1, 
18177
    /* G_USUBO */
18178
    type0, type1, type0, type0, 
18179
    /* G_USUBE */
18180
    type0, type1, type0, type0, type1, 
18181
    /* G_SADDO */
18182
    type0, type1, type0, type0, 
18183
    /* G_SADDE */
18184
    type0, type1, type0, type0, type1, 
18185
    /* G_SSUBO */
18186
    type0, type1, type0, type0, 
18187
    /* G_SSUBE */
18188
    type0, type1, type0, type0, type1, 
18189
    /* G_UMULO */
18190
    type0, type1, type0, type0, 
18191
    /* G_SMULO */
18192
    type0, type1, type0, type0, 
18193
    /* G_UMULH */
18194
    type0, type0, type0, 
18195
    /* G_SMULH */
18196
    type0, type0, type0, 
18197
    /* G_UADDSAT */
18198
    type0, type0, type0, 
18199
    /* G_SADDSAT */
18200
    type0, type0, type0, 
18201
    /* G_USUBSAT */
18202
    type0, type0, type0, 
18203
    /* G_SSUBSAT */
18204
    type0, type0, type0, 
18205
    /* G_USHLSAT */
18206
    type0, type0, type1, 
18207
    /* G_SSHLSAT */
18208
    type0, type0, type1, 
18209
    /* G_SMULFIX */
18210
    type0, type0, type0, untyped_imm_0, 
18211
    /* G_UMULFIX */
18212
    type0, type0, type0, untyped_imm_0, 
18213
    /* G_SMULFIXSAT */
18214
    type0, type0, type0, untyped_imm_0, 
18215
    /* G_UMULFIXSAT */
18216
    type0, type0, type0, untyped_imm_0, 
18217
    /* G_SDIVFIX */
18218
    type0, type0, type0, untyped_imm_0, 
18219
    /* G_UDIVFIX */
18220
    type0, type0, type0, untyped_imm_0, 
18221
    /* G_SDIVFIXSAT */
18222
    type0, type0, type0, untyped_imm_0, 
18223
    /* G_UDIVFIXSAT */
18224
    type0, type0, type0, untyped_imm_0, 
18225
    /* G_FADD */
18226
    type0, type0, type0, 
18227
    /* G_FSUB */
18228
    type0, type0, type0, 
18229
    /* G_FMUL */
18230
    type0, type0, type0, 
18231
    /* G_FMA */
18232
    type0, type0, type0, type0, 
18233
    /* G_FMAD */
18234
    type0, type0, type0, type0, 
18235
    /* G_FDIV */
18236
    type0, type0, type0, 
18237
    /* G_FREM */
18238
    type0, type0, type0, 
18239
    /* G_FPOW */
18240
    type0, type0, type0, 
18241
    /* G_FPOWI */
18242
    type0, type0, type1, 
18243
    /* G_FEXP */
18244
    type0, type0, 
18245
    /* G_FEXP2 */
18246
    type0, type0, 
18247
    /* G_FEXP10 */
18248
    type0, type0, 
18249
    /* G_FLOG */
18250
    type0, type0, 
18251
    /* G_FLOG2 */
18252
    type0, type0, 
18253
    /* G_FLOG10 */
18254
    type0, type0, 
18255
    /* G_FLDEXP */
18256
    type0, type0, type1, 
18257
    /* G_FFREXP */
18258
    type0, type1, type0, 
18259
    /* G_FNEG */
18260
    type0, type0, 
18261
    /* G_FPEXT */
18262
    type0, type1, 
18263
    /* G_FPTRUNC */
18264
    type0, type1, 
18265
    /* G_FPTOSI */
18266
    type0, type1, 
18267
    /* G_FPTOUI */
18268
    type0, type1, 
18269
    /* G_SITOFP */
18270
    type0, type1, 
18271
    /* G_UITOFP */
18272
    type0, type1, 
18273
    /* G_FABS */
18274
    type0, type0, 
18275
    /* G_FCOPYSIGN */
18276
    type0, type0, type1, 
18277
    /* G_IS_FPCLASS */
18278
    type0, type1, -1, 
18279
    /* G_FCANONICALIZE */
18280
    type0, type0, 
18281
    /* G_FMINNUM */
18282
    type0, type0, type0, 
18283
    /* G_FMAXNUM */
18284
    type0, type0, type0, 
18285
    /* G_FMINNUM_IEEE */
18286
    type0, type0, type0, 
18287
    /* G_FMAXNUM_IEEE */
18288
    type0, type0, type0, 
18289
    /* G_FMINIMUM */
18290
    type0, type0, type0, 
18291
    /* G_FMAXIMUM */
18292
    type0, type0, type0, 
18293
    /* G_GET_FPENV */
18294
    type0, 
18295
    /* G_SET_FPENV */
18296
    type0, 
18297
    /* G_RESET_FPENV */
18298
    /* G_GET_FPMODE */
18299
    type0, 
18300
    /* G_SET_FPMODE */
18301
    type0, 
18302
    /* G_RESET_FPMODE */
18303
    /* G_PTR_ADD */
18304
    ptype0, ptype0, type1, 
18305
    /* G_PTRMASK */
18306
    ptype0, ptype0, type1, 
18307
    /* G_SMIN */
18308
    type0, type0, type0, 
18309
    /* G_SMAX */
18310
    type0, type0, type0, 
18311
    /* G_UMIN */
18312
    type0, type0, type0, 
18313
    /* G_UMAX */
18314
    type0, type0, type0, 
18315
    /* G_ABS */
18316
    type0, type0, 
18317
    /* G_LROUND */
18318
    type0, type1, 
18319
    /* G_LLROUND */
18320
    type0, type1, 
18321
    /* G_BR */
18322
    -1, 
18323
    /* G_BRJT */
18324
    ptype0, -1, type1, 
18325
    /* G_INSERT_VECTOR_ELT */
18326
    type0, type0, type1, type2, 
18327
    /* G_EXTRACT_VECTOR_ELT */
18328
    type0, type1, type2, 
18329
    /* G_SHUFFLE_VECTOR */
18330
    type0, type1, type1, -1, 
18331
    /* G_CTTZ */
18332
    type0, type1, 
18333
    /* G_CTTZ_ZERO_UNDEF */
18334
    type0, type1, 
18335
    /* G_CTLZ */
18336
    type0, type1, 
18337
    /* G_CTLZ_ZERO_UNDEF */
18338
    type0, type1, 
18339
    /* G_CTPOP */
18340
    type0, type1, 
18341
    /* G_BSWAP */
18342
    type0, type0, 
18343
    /* G_BITREVERSE */
18344
    type0, type0, 
18345
    /* G_FCEIL */
18346
    type0, type0, 
18347
    /* G_FCOS */
18348
    type0, type0, 
18349
    /* G_FSIN */
18350
    type0, type0, 
18351
    /* G_FSQRT */
18352
    type0, type0, 
18353
    /* G_FFLOOR */
18354
    type0, type0, 
18355
    /* G_FRINT */
18356
    type0, type0, 
18357
    /* G_FNEARBYINT */
18358
    type0, type0, 
18359
    /* G_ADDRSPACE_CAST */
18360
    type0, type1, 
18361
    /* G_BLOCK_ADDR */
18362
    type0, -1, 
18363
    /* G_JUMP_TABLE */
18364
    type0, -1, 
18365
    /* G_DYN_STACKALLOC */
18366
    ptype0, type1, i32imm, 
18367
    /* G_STACKSAVE */
18368
    ptype0, 
18369
    /* G_STACKRESTORE */
18370
    ptype0, 
18371
    /* G_STRICT_FADD */
18372
    type0, type0, type0, 
18373
    /* G_STRICT_FSUB */
18374
    type0, type0, type0, 
18375
    /* G_STRICT_FMUL */
18376
    type0, type0, type0, 
18377
    /* G_STRICT_FDIV */
18378
    type0, type0, type0, 
18379
    /* G_STRICT_FREM */
18380
    type0, type0, type0, 
18381
    /* G_STRICT_FMA */
18382
    type0, type0, type0, type0, 
18383
    /* G_STRICT_FSQRT */
18384
    type0, type0, 
18385
    /* G_STRICT_FLDEXP */
18386
    type0, type0, type1, 
18387
    /* G_READ_REGISTER */
18388
    type0, -1, 
18389
    /* G_WRITE_REGISTER */
18390
    -1, type0, 
18391
    /* G_MEMCPY */
18392
    ptype0, ptype1, type2, untyped_imm_0, 
18393
    /* G_MEMCPY_INLINE */
18394
    ptype0, ptype1, type2, 
18395
    /* G_MEMMOVE */
18396
    ptype0, ptype1, type2, untyped_imm_0, 
18397
    /* G_MEMSET */
18398
    ptype0, type1, type2, untyped_imm_0, 
18399
    /* G_BZERO */
18400
    ptype0, type1, untyped_imm_0, 
18401
    /* G_VECREDUCE_SEQ_FADD */
18402
    type0, type1, type2, 
18403
    /* G_VECREDUCE_SEQ_FMUL */
18404
    type0, type1, type2, 
18405
    /* G_VECREDUCE_FADD */
18406
    type0, type1, 
18407
    /* G_VECREDUCE_FMUL */
18408
    type0, type1, 
18409
    /* G_VECREDUCE_FMAX */
18410
    type0, type1, 
18411
    /* G_VECREDUCE_FMIN */
18412
    type0, type1, 
18413
    /* G_VECREDUCE_FMAXIMUM */
18414
    type0, type1, 
18415
    /* G_VECREDUCE_FMINIMUM */
18416
    type0, type1, 
18417
    /* G_VECREDUCE_ADD */
18418
    type0, type1, 
18419
    /* G_VECREDUCE_MUL */
18420
    type0, type1, 
18421
    /* G_VECREDUCE_AND */
18422
    type0, type1, 
18423
    /* G_VECREDUCE_OR */
18424
    type0, type1, 
18425
    /* G_VECREDUCE_XOR */
18426
    type0, type1, 
18427
    /* G_VECREDUCE_SMAX */
18428
    type0, type1, 
18429
    /* G_VECREDUCE_SMIN */
18430
    type0, type1, 
18431
    /* G_VECREDUCE_UMAX */
18432
    type0, type1, 
18433
    /* G_VECREDUCE_UMIN */
18434
    type0, type1, 
18435
    /* G_SBFX */
18436
    type0, type0, type1, type1, 
18437
    /* G_UBFX */
18438
    type0, type0, type1, type1, 
18439
    /* A2_addsp */
18440
    DoubleRegs, IntRegs, DoubleRegs, 
18441
    /* A2_iconst */
18442
    IntRegs, s27_2Imm, 
18443
    /* A2_neg */
18444
    IntRegs, IntRegs, 
18445
    /* A2_not */
18446
    IntRegs, IntRegs, 
18447
    /* A2_tfrf */
18448
    IntRegs, PredRegs, IntRegs, 
18449
    /* A2_tfrfnew */
18450
    IntRegs, PredRegs, IntRegs, 
18451
    /* A2_tfrp */
18452
    DoubleRegs, DoubleRegs, 
18453
    /* A2_tfrpf */
18454
    DoubleRegs, PredRegs, DoubleRegs, 
18455
    /* A2_tfrpfnew */
18456
    DoubleRegs, PredRegs, DoubleRegs, 
18457
    /* A2_tfrpi */
18458
    DoubleRegs, s8_0Imm, 
18459
    /* A2_tfrpt */
18460
    DoubleRegs, PredRegs, DoubleRegs, 
18461
    /* A2_tfrptnew */
18462
    DoubleRegs, PredRegs, DoubleRegs, 
18463
    /* A2_tfrt */
18464
    IntRegs, PredRegs, IntRegs, 
18465
    /* A2_tfrtnew */
18466
    IntRegs, PredRegs, IntRegs, 
18467
    /* A2_vaddb_map */
18468
    DoubleRegs, DoubleRegs, DoubleRegs, 
18469
    /* A2_vsubb_map */
18470
    DoubleRegs, DoubleRegs, DoubleRegs, 
18471
    /* A2_zxtb */
18472
    IntRegs, IntRegs, 
18473
    /* A4_boundscheck */
18474
    PredRegs, IntRegs, DoubleRegs, 
18475
    /* ADJCALLSTACKDOWN */
18476
    i32imm, i32imm, 
18477
    /* ADJCALLSTACKUP */
18478
    i32imm, i32imm, 
18479
    /* C2_cmpgei */
18480
    PredRegs, IntRegs, s8_0Imm, 
18481
    /* C2_cmpgeui */
18482
    PredRegs, IntRegs, u8_0Imm, 
18483
    /* C2_cmplt */
18484
    PredRegs, IntRegs, IntRegs, 
18485
    /* C2_cmpltu */
18486
    PredRegs, IntRegs, IntRegs, 
18487
    /* C2_pxfer_map */
18488
    PredRegs, PredRegs, 
18489
    /* DUPLEX_Pseudo */
18490
    s32_0Imm, 
18491
    /* ENDLOOP0 */
18492
    b30_2Imm, 
18493
    /* ENDLOOP01 */
18494
    b30_2Imm, 
18495
    /* ENDLOOP1 */
18496
    b30_2Imm, 
18497
    /* J2_endloop0 */
18498
    /* J2_endloop01 */
18499
    /* J2_endloop1 */
18500
    /* J2_jumpf_nopred_map */
18501
    PredRegs, b15_2Imm, 
18502
    /* J2_jumprf_nopred_map */
18503
    PredRegs, IntRegs, 
18504
    /* J2_jumprt_nopred_map */
18505
    PredRegs, IntRegs, 
18506
    /* J2_jumpt_nopred_map */
18507
    PredRegs, b15_2Imm, 
18508
    /* J2_trap1_noregmap */
18509
    u8_0Imm, 
18510
    /* L2_loadalignb_zomap */
18511
    DoubleRegs, DoubleRegs, IntRegs, 
18512
    /* L2_loadalignh_zomap */
18513
    DoubleRegs, DoubleRegs, IntRegs, 
18514
    /* L2_loadbsw2_zomap */
18515
    IntRegs, IntRegs, 
18516
    /* L2_loadbsw4_zomap */
18517
    DoubleRegs, IntRegs, 
18518
    /* L2_loadbzw2_zomap */
18519
    IntRegs, IntRegs, 
18520
    /* L2_loadbzw4_zomap */
18521
    DoubleRegs, IntRegs, 
18522
    /* L2_loadrb_zomap */
18523
    IntRegs, IntRegs, 
18524
    /* L2_loadrd_zomap */
18525
    DoubleRegs, IntRegs, 
18526
    /* L2_loadrh_zomap */
18527
    IntRegs, IntRegs, 
18528
    /* L2_loadri_zomap */
18529
    IntRegs, IntRegs, 
18530
    /* L2_loadrub_zomap */
18531
    IntRegs, IntRegs, 
18532
    /* L2_loadruh_zomap */
18533
    IntRegs, IntRegs, 
18534
    /* L2_ploadrbf_zomap */
18535
    IntRegs, PredRegs, IntRegs, 
18536
    /* L2_ploadrbfnew_zomap */
18537
    IntRegs, PredRegs, IntRegs, 
18538
    /* L2_ploadrbt_zomap */
18539
    IntRegs, PredRegs, IntRegs, 
18540
    /* L2_ploadrbtnew_zomap */
18541
    IntRegs, PredRegs, IntRegs, 
18542
    /* L2_ploadrdf_zomap */
18543
    DoubleRegs, PredRegs, IntRegs, 
18544
    /* L2_ploadrdfnew_zomap */
18545
    DoubleRegs, PredRegs, IntRegs, 
18546
    /* L2_ploadrdt_zomap */
18547
    DoubleRegs, PredRegs, IntRegs, 
18548
    /* L2_ploadrdtnew_zomap */
18549
    DoubleRegs, PredRegs, IntRegs, 
18550
    /* L2_ploadrhf_zomap */
18551
    IntRegs, PredRegs, IntRegs, 
18552
    /* L2_ploadrhfnew_zomap */
18553
    IntRegs, PredRegs, IntRegs, 
18554
    /* L2_ploadrht_zomap */
18555
    IntRegs, PredRegs, IntRegs, 
18556
    /* L2_ploadrhtnew_zomap */
18557
    IntRegs, PredRegs, IntRegs, 
18558
    /* L2_ploadrif_zomap */
18559
    IntRegs, PredRegs, IntRegs, 
18560
    /* L2_ploadrifnew_zomap */
18561
    IntRegs, PredRegs, IntRegs, 
18562
    /* L2_ploadrit_zomap */
18563
    IntRegs, PredRegs, IntRegs, 
18564
    /* L2_ploadritnew_zomap */
18565
    IntRegs, PredRegs, IntRegs, 
18566
    /* L2_ploadrubf_zomap */
18567
    IntRegs, PredRegs, IntRegs, 
18568
    /* L2_ploadrubfnew_zomap */
18569
    IntRegs, PredRegs, IntRegs, 
18570
    /* L2_ploadrubt_zomap */
18571
    IntRegs, PredRegs, IntRegs, 
18572
    /* L2_ploadrubtnew_zomap */
18573
    IntRegs, PredRegs, IntRegs, 
18574
    /* L2_ploadruhf_zomap */
18575
    IntRegs, PredRegs, IntRegs, 
18576
    /* L2_ploadruhfnew_zomap */
18577
    IntRegs, PredRegs, IntRegs, 
18578
    /* L2_ploadruht_zomap */
18579
    IntRegs, PredRegs, IntRegs, 
18580
    /* L2_ploadruhtnew_zomap */
18581
    IntRegs, PredRegs, IntRegs, 
18582
    /* L4_add_memopb_zomap */
18583
    IntRegs, IntRegs, 
18584
    /* L4_add_memoph_zomap */
18585
    IntRegs, IntRegs, 
18586
    /* L4_add_memopw_zomap */
18587
    IntRegs, IntRegs, 
18588
    /* L4_and_memopb_zomap */
18589
    IntRegs, IntRegs, 
18590
    /* L4_and_memoph_zomap */
18591
    IntRegs, IntRegs, 
18592
    /* L4_and_memopw_zomap */
18593
    IntRegs, IntRegs, 
18594
    /* L4_iadd_memopb_zomap */
18595
    IntRegs, u5_0Imm, 
18596
    /* L4_iadd_memoph_zomap */
18597
    IntRegs, u5_0Imm, 
18598
    /* L4_iadd_memopw_zomap */
18599
    IntRegs, u5_0Imm, 
18600
    /* L4_iand_memopb_zomap */
18601
    IntRegs, u5_0Imm, 
18602
    /* L4_iand_memoph_zomap */
18603
    IntRegs, u5_0Imm, 
18604
    /* L4_iand_memopw_zomap */
18605
    IntRegs, u5_0Imm, 
18606
    /* L4_ior_memopb_zomap */
18607
    IntRegs, u5_0Imm, 
18608
    /* L4_ior_memoph_zomap */
18609
    IntRegs, u5_0Imm, 
18610
    /* L4_ior_memopw_zomap */
18611
    IntRegs, u5_0Imm, 
18612
    /* L4_isub_memopb_zomap */
18613
    IntRegs, u5_0Imm, 
18614
    /* L4_isub_memoph_zomap */
18615
    IntRegs, u5_0Imm, 
18616
    /* L4_isub_memopw_zomap */
18617
    IntRegs, u5_0Imm, 
18618
    /* L4_or_memopb_zomap */
18619
    IntRegs, IntRegs, 
18620
    /* L4_or_memoph_zomap */
18621
    IntRegs, IntRegs, 
18622
    /* L4_or_memopw_zomap */
18623
    IntRegs, IntRegs, 
18624
    /* L4_return_map_to_raw_f */
18625
    PredRegs, 
18626
    /* L4_return_map_to_raw_fnew_pnt */
18627
    PredRegs, 
18628
    /* L4_return_map_to_raw_fnew_pt */
18629
    PredRegs, 
18630
    /* L4_return_map_to_raw_t */
18631
    PredRegs, 
18632
    /* L4_return_map_to_raw_tnew_pnt */
18633
    PredRegs, 
18634
    /* L4_return_map_to_raw_tnew_pt */
18635
    PredRegs, 
18636
    /* L4_sub_memopb_zomap */
18637
    IntRegs, IntRegs, 
18638
    /* L4_sub_memoph_zomap */
18639
    IntRegs, IntRegs, 
18640
    /* L4_sub_memopw_zomap */
18641
    IntRegs, IntRegs, 
18642
    /* L6_deallocframe_map_to_raw */
18643
    /* L6_return_map_to_raw */
18644
    /* LDriw_ctr */
18645
    CtrRegs, IntRegs, s32_0Imm, 
18646
    /* LDriw_pred */
18647
    PredRegs, IntRegs, s32_0Imm, 
18648
    /* M2_mpysmi */
18649
    IntRegs, IntRegs, m32_0Imm, 
18650
    /* M2_mpyui */
18651
    IntRegs, IntRegs, IntRegs, 
18652
    /* M2_vrcmpys_acc_s1 */
18653
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
18654
    /* M2_vrcmpys_s1 */
18655
    DoubleRegs, DoubleRegs, IntRegs, 
18656
    /* M2_vrcmpys_s1rp */
18657
    IntRegs, DoubleRegs, IntRegs, 
18658
    /* M7_vdmpy */
18659
    DoubleRegs, DoubleRegs, DoubleRegs, 
18660
    /* M7_vdmpy_acc */
18661
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
18662
    /* PS_aligna */
18663
    IntRegs, u32_0Imm, 
18664
    /* PS_alloca */
18665
    IntRegs, IntRegs, u32_0Imm, 
18666
    /* PS_call_instrprof_custom */
18667
    s32_0Imm, u32_0Imm, 
18668
    /* PS_call_nr */
18669
    s32_0Imm, 
18670
    /* PS_crash */
18671
    /* PS_false */
18672
    PredRegs, 
18673
    /* PS_fi */
18674
    IntRegs, IntRegs, s32_0Imm, 
18675
    /* PS_fia */
18676
    IntRegs, IntRegs, IntRegs, s32_0Imm, 
18677
    /* PS_loadrb_pci */
18678
    IntRegs, IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, 
18679
    /* PS_loadrb_pcr */
18680
    IntRegs, IntRegs, IntRegs, ModRegs, IntRegs, 
18681
    /* PS_loadrd_pci */
18682
    DoubleRegs, IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, 
18683
    /* PS_loadrd_pcr */
18684
    DoubleRegs, IntRegs, IntRegs, ModRegs, IntRegs, 
18685
    /* PS_loadrh_pci */
18686
    IntRegs, IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, 
18687
    /* PS_loadrh_pcr */
18688
    IntRegs, IntRegs, IntRegs, ModRegs, IntRegs, 
18689
    /* PS_loadri_pci */
18690
    IntRegs, IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, 
18691
    /* PS_loadri_pcr */
18692
    IntRegs, IntRegs, IntRegs, ModRegs, IntRegs, 
18693
    /* PS_loadrub_pci */
18694
    IntRegs, IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, 
18695
    /* PS_loadrub_pcr */
18696
    IntRegs, IntRegs, IntRegs, ModRegs, IntRegs, 
18697
    /* PS_loadruh_pci */
18698
    IntRegs, IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, 
18699
    /* PS_loadruh_pcr */
18700
    IntRegs, IntRegs, IntRegs, ModRegs, IntRegs, 
18701
    /* PS_pselect */
18702
    DoubleRegs, PredRegs, DoubleRegs, DoubleRegs, 
18703
    /* PS_qfalse */
18704
    HvxQR, 
18705
    /* PS_qtrue */
18706
    HvxQR, 
18707
    /* PS_storerb_pci */
18708
    IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, IntRegs, 
18709
    /* PS_storerb_pcr */
18710
    IntRegs, IntRegs, ModRegs, IntRegs, IntRegs, 
18711
    /* PS_storerd_pci */
18712
    IntRegs, IntRegs, s4_0Imm, ModRegs, DoubleRegs, IntRegs, 
18713
    /* PS_storerd_pcr */
18714
    IntRegs, IntRegs, ModRegs, DoubleRegs, IntRegs, 
18715
    /* PS_storerf_pci */
18716
    IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, IntRegs, 
18717
    /* PS_storerf_pcr */
18718
    IntRegs, IntRegs, ModRegs, IntRegs, IntRegs, 
18719
    /* PS_storerh_pci */
18720
    IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, IntRegs, 
18721
    /* PS_storerh_pcr */
18722
    IntRegs, IntRegs, ModRegs, IntRegs, IntRegs, 
18723
    /* PS_storeri_pci */
18724
    IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, IntRegs, 
18725
    /* PS_storeri_pcr */
18726
    IntRegs, IntRegs, ModRegs, IntRegs, IntRegs, 
18727
    /* PS_tailcall_i */
18728
    a30_2Imm, 
18729
    /* PS_tailcall_r */
18730
    IntRegs, 
18731
    /* PS_true */
18732
    PredRegs, 
18733
    /* PS_vdd0 */
18734
    HvxWR, 
18735
    /* PS_vloadrq_ai */
18736
    HvxQR, IntRegs, s32_0Imm, 
18737
    /* PS_vloadrv_ai */
18738
    HvxVR, IntRegs, s32_0Imm, 
18739
    /* PS_vloadrv_nt_ai */
18740
    HvxVR, IntRegs, s32_0Imm, 
18741
    /* PS_vloadrw_ai */
18742
    HvxWR, IntRegs, s32_0Imm, 
18743
    /* PS_vloadrw_nt_ai */
18744
    HvxWR, IntRegs, s32_0Imm, 
18745
    /* PS_vmulw */
18746
    DoubleRegs, DoubleRegs, DoubleRegs, 
18747
    /* PS_vmulw_acc */
18748
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
18749
    /* PS_vselect */
18750
    HvxVR, PredRegs, HvxVR, HvxVR, 
18751
    /* PS_vsplatib */
18752
    HvxVR, s32_0Imm, 
18753
    /* PS_vsplatih */
18754
    HvxVR, s32_0Imm, 
18755
    /* PS_vsplatiw */
18756
    HvxVR, s32_0Imm, 
18757
    /* PS_vsplatrb */
18758
    HvxVR, IntRegs, 
18759
    /* PS_vsplatrh */
18760
    HvxVR, IntRegs, 
18761
    /* PS_vsplatrw */
18762
    HvxVR, IntRegs, 
18763
    /* PS_vstorerq_ai */
18764
    IntRegs, s32_0Imm, HvxQR, 
18765
    /* PS_vstorerv_ai */
18766
    IntRegs, s32_0Imm, HvxVR, 
18767
    /* PS_vstorerv_nt_ai */
18768
    IntRegs, s32_0Imm, HvxVR, 
18769
    /* PS_vstorerw_ai */
18770
    IntRegs, s32_0Imm, HvxWR, 
18771
    /* PS_vstorerw_nt_ai */
18772
    IntRegs, s32_0Imm, HvxWR, 
18773
    /* PS_wselect */
18774
    HvxWR, PredRegs, HvxWR, HvxWR, 
18775
    /* S2_asr_i_p_rnd_goodsyntax */
18776
    DoubleRegs, DoubleRegs, u6_0Imm, 
18777
    /* S2_asr_i_r_rnd_goodsyntax */
18778
    IntRegs, IntRegs, u5_0Imm, 
18779
    /* S2_pstorerbf_zomap */
18780
    PredRegs, IntRegs, IntRegs, 
18781
    /* S2_pstorerbnewf_zomap */
18782
    PredRegs, IntRegs, IntRegs, 
18783
    /* S2_pstorerbnewt_zomap */
18784
    PredRegs, IntRegs, IntRegs, 
18785
    /* S2_pstorerbt_zomap */
18786
    PredRegs, IntRegs, IntRegs, 
18787
    /* S2_pstorerdf_zomap */
18788
    PredRegs, IntRegs, DoubleRegs, 
18789
    /* S2_pstorerdt_zomap */
18790
    PredRegs, IntRegs, DoubleRegs, 
18791
    /* S2_pstorerff_zomap */
18792
    PredRegs, IntRegs, IntRegs, 
18793
    /* S2_pstorerft_zomap */
18794
    PredRegs, IntRegs, IntRegs, 
18795
    /* S2_pstorerhf_zomap */
18796
    PredRegs, IntRegs, IntRegs, 
18797
    /* S2_pstorerhnewf_zomap */
18798
    PredRegs, IntRegs, IntRegs, 
18799
    /* S2_pstorerhnewt_zomap */
18800
    PredRegs, IntRegs, IntRegs, 
18801
    /* S2_pstorerht_zomap */
18802
    PredRegs, IntRegs, IntRegs, 
18803
    /* S2_pstorerif_zomap */
18804
    PredRegs, IntRegs, IntRegs, 
18805
    /* S2_pstorerinewf_zomap */
18806
    PredRegs, IntRegs, IntRegs, 
18807
    /* S2_pstorerinewt_zomap */
18808
    PredRegs, IntRegs, IntRegs, 
18809
    /* S2_pstorerit_zomap */
18810
    PredRegs, IntRegs, IntRegs, 
18811
    /* S2_storerb_zomap */
18812
    IntRegs, IntRegs, 
18813
    /* S2_storerbnew_zomap */
18814
    IntRegs, IntRegs, 
18815
    /* S2_storerd_zomap */
18816
    IntRegs, DoubleRegs, 
18817
    /* S2_storerf_zomap */
18818
    IntRegs, IntRegs, 
18819
    /* S2_storerh_zomap */
18820
    IntRegs, IntRegs, 
18821
    /* S2_storerhnew_zomap */
18822
    IntRegs, IntRegs, 
18823
    /* S2_storeri_zomap */
18824
    IntRegs, IntRegs, 
18825
    /* S2_storerinew_zomap */
18826
    IntRegs, IntRegs, 
18827
    /* S2_tableidxb_goodsyntax */
18828
    IntRegs, IntRegs, IntRegs, u4_0Imm, u5_0Imm, 
18829
    /* S2_tableidxd_goodsyntax */
18830
    IntRegs, IntRegs, IntRegs, u4_0Imm, u5_0Imm, 
18831
    /* S2_tableidxh_goodsyntax */
18832
    IntRegs, IntRegs, IntRegs, u4_0Imm, u5_0Imm, 
18833
    /* S2_tableidxw_goodsyntax */
18834
    IntRegs, IntRegs, IntRegs, u4_0Imm, u5_0Imm, 
18835
    /* S4_pstorerbfnew_zomap */
18836
    PredRegs, IntRegs, IntRegs, 
18837
    /* S4_pstorerbnewfnew_zomap */
18838
    PredRegs, IntRegs, IntRegs, 
18839
    /* S4_pstorerbnewtnew_zomap */
18840
    PredRegs, IntRegs, IntRegs, 
18841
    /* S4_pstorerbtnew_zomap */
18842
    PredRegs, IntRegs, IntRegs, 
18843
    /* S4_pstorerdfnew_zomap */
18844
    PredRegs, IntRegs, DoubleRegs, 
18845
    /* S4_pstorerdtnew_zomap */
18846
    PredRegs, IntRegs, DoubleRegs, 
18847
    /* S4_pstorerffnew_zomap */
18848
    PredRegs, IntRegs, IntRegs, 
18849
    /* S4_pstorerftnew_zomap */
18850
    PredRegs, IntRegs, IntRegs, 
18851
    /* S4_pstorerhfnew_zomap */
18852
    PredRegs, IntRegs, IntRegs, 
18853
    /* S4_pstorerhnewfnew_zomap */
18854
    PredRegs, IntRegs, IntRegs, 
18855
    /* S4_pstorerhnewtnew_zomap */
18856
    PredRegs, IntRegs, IntRegs, 
18857
    /* S4_pstorerhtnew_zomap */
18858
    PredRegs, IntRegs, IntRegs, 
18859
    /* S4_pstorerifnew_zomap */
18860
    PredRegs, IntRegs, IntRegs, 
18861
    /* S4_pstorerinewfnew_zomap */
18862
    PredRegs, IntRegs, IntRegs, 
18863
    /* S4_pstorerinewtnew_zomap */
18864
    PredRegs, IntRegs, IntRegs, 
18865
    /* S4_pstoreritnew_zomap */
18866
    PredRegs, IntRegs, IntRegs, 
18867
    /* S4_storeirb_zomap */
18868
    IntRegs, s8_0Imm, 
18869
    /* S4_storeirbf_zomap */
18870
    PredRegs, IntRegs, s6_0Imm, 
18871
    /* S4_storeirbfnew_zomap */
18872
    PredRegs, IntRegs, s6_0Imm, 
18873
    /* S4_storeirbt_zomap */
18874
    PredRegs, IntRegs, s6_0Imm, 
18875
    /* S4_storeirbtnew_zomap */
18876
    PredRegs, IntRegs, s6_0Imm, 
18877
    /* S4_storeirh_zomap */
18878
    IntRegs, s8_0Imm, 
18879
    /* S4_storeirhf_zomap */
18880
    PredRegs, IntRegs, s6_0Imm, 
18881
    /* S4_storeirhfnew_zomap */
18882
    PredRegs, IntRegs, s6_0Imm, 
18883
    /* S4_storeirht_zomap */
18884
    PredRegs, IntRegs, s6_0Imm, 
18885
    /* S4_storeirhtnew_zomap */
18886
    PredRegs, IntRegs, s6_0Imm, 
18887
    /* S4_storeiri_zomap */
18888
    IntRegs, s8_0Imm, 
18889
    /* S4_storeirif_zomap */
18890
    PredRegs, IntRegs, s6_0Imm, 
18891
    /* S4_storeirifnew_zomap */
18892
    PredRegs, IntRegs, s6_0Imm, 
18893
    /* S4_storeirit_zomap */
18894
    PredRegs, IntRegs, s6_0Imm, 
18895
    /* S4_storeiritnew_zomap */
18896
    PredRegs, IntRegs, s6_0Imm, 
18897
    /* S5_asrhub_rnd_sat_goodsyntax */
18898
    IntRegs, DoubleRegs, u4_0Imm, 
18899
    /* S5_vasrhrnd_goodsyntax */
18900
    DoubleRegs, DoubleRegs, u4_0Imm, 
18901
    /* S6_allocframe_to_raw */
18902
    u11_3Imm, 
18903
    /* STriw_ctr */
18904
    IntRegs, s32_0Imm, CtrRegs, 
18905
    /* STriw_pred */
18906
    IntRegs, s32_0Imm, PredRegs, 
18907
    /* V6_MAP_equb */
18908
    HvxQR, HvxVR, HvxVR, 
18909
    /* V6_MAP_equb_and */
18910
    HvxQR, HvxQR, HvxVR, HvxVR, 
18911
    /* V6_MAP_equb_ior */
18912
    HvxQR, HvxQR, HvxVR, HvxVR, 
18913
    /* V6_MAP_equb_xor */
18914
    HvxQR, HvxQR, HvxVR, HvxVR, 
18915
    /* V6_MAP_equh */
18916
    HvxQR, HvxVR, HvxVR, 
18917
    /* V6_MAP_equh_and */
18918
    HvxQR, HvxQR, HvxVR, HvxVR, 
18919
    /* V6_MAP_equh_ior */
18920
    HvxQR, HvxQR, HvxVR, HvxVR, 
18921
    /* V6_MAP_equh_xor */
18922
    HvxQR, HvxQR, HvxVR, HvxVR, 
18923
    /* V6_MAP_equw */
18924
    HvxQR, HvxVR, HvxVR, 
18925
    /* V6_MAP_equw_and */
18926
    HvxQR, HvxQR, HvxVR, HvxVR, 
18927
    /* V6_MAP_equw_ior */
18928
    HvxQR, HvxQR, HvxVR, HvxVR, 
18929
    /* V6_MAP_equw_xor */
18930
    HvxQR, HvxQR, HvxVR, HvxVR, 
18931
    /* V6_dbl_ld0 */
18932
    HvxWR, IntRegs, 
18933
    /* V6_dbl_st0 */
18934
    IntRegs, HvxWR, 
18935
    /* V6_extractw_alt */
18936
    IntRegs, HvxVR, IntRegs, 
18937
    /* V6_hi */
18938
    HvxVR, HvxWR, 
18939
    /* V6_ld0 */
18940
    HvxVR, IntRegs, 
18941
    /* V6_ldcnp0 */
18942
    HvxVR, PredRegs, IntRegs, 
18943
    /* V6_ldcnpnt0 */
18944
    HvxVR, PredRegs, IntRegs, 
18945
    /* V6_ldcp0 */
18946
    HvxVR, PredRegs, IntRegs, 
18947
    /* V6_ldcpnt0 */
18948
    HvxVR, PredRegs, IntRegs, 
18949
    /* V6_ldnp0 */
18950
    HvxVR, PredRegs, IntRegs, 
18951
    /* V6_ldnpnt0 */
18952
    HvxVR, PredRegs, IntRegs, 
18953
    /* V6_ldnt0 */
18954
    HvxVR, IntRegs, 
18955
    /* V6_ldp0 */
18956
    HvxVR, PredRegs, IntRegs, 
18957
    /* V6_ldpnt0 */
18958
    HvxVR, PredRegs, IntRegs, 
18959
    /* V6_ldtnp0 */
18960
    HvxVR, PredRegs, IntRegs, 
18961
    /* V6_ldtnpnt0 */
18962
    HvxVR, PredRegs, IntRegs, 
18963
    /* V6_ldtp0 */
18964
    HvxVR, PredRegs, IntRegs, 
18965
    /* V6_ldtpnt0 */
18966
    HvxVR, PredRegs, IntRegs, 
18967
    /* V6_ldu0 */
18968
    HvxVR, IntRegs, 
18969
    /* V6_lo */
18970
    HvxVR, HvxWR, 
18971
    /* V6_st0 */
18972
    IntRegs, HvxVR, 
18973
    /* V6_stn0 */
18974
    IntRegs, HvxVR, 
18975
    /* V6_stnnt0 */
18976
    IntRegs, HvxVR, 
18977
    /* V6_stnp0 */
18978
    PredRegs, IntRegs, HvxVR, 
18979
    /* V6_stnpnt0 */
18980
    PredRegs, IntRegs, HvxVR, 
18981
    /* V6_stnq0 */
18982
    HvxQR, IntRegs, HvxVR, 
18983
    /* V6_stnqnt0 */
18984
    HvxQR, IntRegs, HvxVR, 
18985
    /* V6_stnt0 */
18986
    IntRegs, HvxVR, 
18987
    /* V6_stp0 */
18988
    PredRegs, IntRegs, HvxVR, 
18989
    /* V6_stpnt0 */
18990
    PredRegs, IntRegs, HvxVR, 
18991
    /* V6_stq0 */
18992
    HvxQR, IntRegs, HvxVR, 
18993
    /* V6_stqnt0 */
18994
    HvxQR, IntRegs, HvxVR, 
18995
    /* V6_stu0 */
18996
    IntRegs, HvxVR, 
18997
    /* V6_stunp0 */
18998
    PredRegs, IntRegs, HvxVR, 
18999
    /* V6_stup0 */
19000
    PredRegs, IntRegs, HvxVR, 
19001
    /* V6_v10mpyubs10 */
19002
    HvxWR, HvxWR, HvxWR, u1_0Imm, 
19003
    /* V6_v10mpyubs10_vxx */
19004
    HvxWR, HvxWR, HvxWR, HvxWR, u1_0Imm, 
19005
    /* V6_v6mpyhubs10_alt */
19006
    HvxWR, HvxWR, HvxWR, u2_0Imm, 
19007
    /* V6_v6mpyvubs10_alt */
19008
    HvxWR, HvxWR, HvxWR, u2_0Imm, 
19009
    /* V6_vabsb_alt */
19010
    HvxVR, HvxVR, 
19011
    /* V6_vabsb_sat_alt */
19012
    HvxVR, HvxVR, 
19013
    /* V6_vabsdiffh_alt */
19014
    HvxVR, HvxVR, HvxVR, 
19015
    /* V6_vabsdiffub_alt */
19016
    HvxVR, HvxVR, HvxVR, 
19017
    /* V6_vabsdiffuh_alt */
19018
    HvxVR, HvxVR, HvxVR, 
19019
    /* V6_vabsdiffw_alt */
19020
    HvxVR, HvxVR, HvxVR, 
19021
    /* V6_vabsh_alt */
19022
    HvxVR, HvxVR, 
19023
    /* V6_vabsh_sat_alt */
19024
    HvxVR, HvxVR, 
19025
    /* V6_vabsub_alt */
19026
    HvxVR, HvxVR, 
19027
    /* V6_vabsuh_alt */
19028
    HvxVR, HvxVR, 
19029
    /* V6_vabsuw_alt */
19030
    HvxVR, HvxVR, 
19031
    /* V6_vabsw_alt */
19032
    HvxVR, HvxVR, 
19033
    /* V6_vabsw_sat_alt */
19034
    HvxVR, HvxVR, 
19035
    /* V6_vaddb_alt */
19036
    HvxVR, HvxVR, HvxVR, 
19037
    /* V6_vaddb_dv_alt */
19038
    HvxWR, HvxWR, HvxWR, 
19039
    /* V6_vaddbnq_alt */
19040
    HvxVR, HvxQR, HvxVR, HvxVR, 
19041
    /* V6_vaddbq_alt */
19042
    HvxVR, HvxQR, HvxVR, HvxVR, 
19043
    /* V6_vaddbsat_alt */
19044
    HvxVR, HvxVR, HvxVR, 
19045
    /* V6_vaddbsat_dv_alt */
19046
    HvxWR, HvxWR, HvxWR, 
19047
    /* V6_vaddh_alt */
19048
    HvxVR, HvxVR, HvxVR, 
19049
    /* V6_vaddh_dv_alt */
19050
    HvxWR, HvxWR, HvxWR, 
19051
    /* V6_vaddhnq_alt */
19052
    HvxVR, HvxQR, HvxVR, HvxVR, 
19053
    /* V6_vaddhq_alt */
19054
    HvxVR, HvxQR, HvxVR, HvxVR, 
19055
    /* V6_vaddhsat_alt */
19056
    HvxVR, HvxVR, HvxVR, 
19057
    /* V6_vaddhsat_dv_alt */
19058
    HvxWR, HvxWR, HvxWR, 
19059
    /* V6_vaddhw_acc_alt */
19060
    HvxWR, HvxWR, HvxVR, HvxVR, 
19061
    /* V6_vaddhw_alt */
19062
    HvxWR, HvxVR, HvxVR, 
19063
    /* V6_vaddubh_acc_alt */
19064
    HvxWR, HvxWR, HvxVR, HvxVR, 
19065
    /* V6_vaddubh_alt */
19066
    HvxWR, HvxVR, HvxVR, 
19067
    /* V6_vaddubsat_alt */
19068
    HvxVR, HvxVR, HvxVR, 
19069
    /* V6_vaddubsat_dv_alt */
19070
    HvxWR, HvxWR, HvxWR, 
19071
    /* V6_vadduhsat_alt */
19072
    HvxVR, HvxVR, HvxVR, 
19073
    /* V6_vadduhsat_dv_alt */
19074
    HvxWR, HvxWR, HvxWR, 
19075
    /* V6_vadduhw_acc_alt */
19076
    HvxWR, HvxWR, HvxVR, HvxVR, 
19077
    /* V6_vadduhw_alt */
19078
    HvxWR, HvxVR, HvxVR, 
19079
    /* V6_vadduwsat_alt */
19080
    HvxVR, HvxVR, HvxVR, 
19081
    /* V6_vadduwsat_dv_alt */
19082
    HvxWR, HvxWR, HvxWR, 
19083
    /* V6_vaddw_alt */
19084
    HvxVR, HvxVR, HvxVR, 
19085
    /* V6_vaddw_dv_alt */
19086
    HvxWR, HvxWR, HvxWR, 
19087
    /* V6_vaddwnq_alt */
19088
    HvxVR, HvxQR, HvxVR, HvxVR, 
19089
    /* V6_vaddwq_alt */
19090
    HvxVR, HvxQR, HvxVR, HvxVR, 
19091
    /* V6_vaddwsat_alt */
19092
    HvxVR, HvxVR, HvxVR, 
19093
    /* V6_vaddwsat_dv_alt */
19094
    HvxWR, HvxWR, HvxWR, 
19095
    /* V6_vandnqrt_acc_alt */
19096
    HvxVR, HvxVR, HvxQR, IntRegs, 
19097
    /* V6_vandnqrt_alt */
19098
    HvxVR, HvxQR, IntRegs, 
19099
    /* V6_vandqrt_acc_alt */
19100
    HvxVR, HvxVR, HvxQR, IntRegs, 
19101
    /* V6_vandqrt_alt */
19102
    HvxVR, HvxQR, IntRegs, 
19103
    /* V6_vandvrt_acc_alt */
19104
    HvxQR, HvxQR, HvxVR, IntRegs, 
19105
    /* V6_vandvrt_alt */
19106
    HvxQR, HvxVR, IntRegs, 
19107
    /* V6_vaslh_acc_alt */
19108
    HvxVR, HvxVR, HvxVR, IntRegs, 
19109
    /* V6_vaslh_alt */
19110
    HvxVR, HvxVR, IntRegs, 
19111
    /* V6_vaslhv_alt */
19112
    HvxVR, HvxVR, HvxVR, 
19113
    /* V6_vaslw_acc_alt */
19114
    HvxVR, HvxVR, HvxVR, IntRegs, 
19115
    /* V6_vaslw_alt */
19116
    HvxVR, HvxVR, IntRegs, 
19117
    /* V6_vaslwv_alt */
19118
    HvxVR, HvxVR, HvxVR, 
19119
    /* V6_vasr_into_alt */
19120
    HvxWR, HvxWR, HvxVR, HvxVR, 
19121
    /* V6_vasrh_acc_alt */
19122
    HvxVR, HvxVR, HvxVR, IntRegs, 
19123
    /* V6_vasrh_alt */
19124
    HvxVR, HvxVR, IntRegs, 
19125
    /* V6_vasrhv_alt */
19126
    HvxVR, HvxVR, HvxVR, 
19127
    /* V6_vasrw_acc_alt */
19128
    HvxVR, HvxVR, HvxVR, IntRegs, 
19129
    /* V6_vasrw_alt */
19130
    HvxVR, HvxVR, IntRegs, 
19131
    /* V6_vasrwv_alt */
19132
    HvxVR, HvxVR, HvxVR, 
19133
    /* V6_vassignp */
19134
    HvxWR, HvxWR, 
19135
    /* V6_vavgb_alt */
19136
    HvxVR, HvxVR, HvxVR, 
19137
    /* V6_vavgbrnd_alt */
19138
    HvxVR, HvxVR, HvxVR, 
19139
    /* V6_vavgh_alt */
19140
    HvxVR, HvxVR, HvxVR, 
19141
    /* V6_vavghrnd_alt */
19142
    HvxVR, HvxVR, HvxVR, 
19143
    /* V6_vavgub_alt */
19144
    HvxVR, HvxVR, HvxVR, 
19145
    /* V6_vavgubrnd_alt */
19146
    HvxVR, HvxVR, HvxVR, 
19147
    /* V6_vavguh_alt */
19148
    HvxVR, HvxVR, HvxVR, 
19149
    /* V6_vavguhrnd_alt */
19150
    HvxVR, HvxVR, HvxVR, 
19151
    /* V6_vavguw_alt */
19152
    HvxVR, HvxVR, HvxVR, 
19153
    /* V6_vavguwrnd_alt */
19154
    HvxVR, HvxVR, HvxVR, 
19155
    /* V6_vavgw_alt */
19156
    HvxVR, HvxVR, HvxVR, 
19157
    /* V6_vavgwrnd_alt */
19158
    HvxVR, HvxVR, HvxVR, 
19159
    /* V6_vcl0h_alt */
19160
    HvxVR, HvxVR, 
19161
    /* V6_vcl0w_alt */
19162
    HvxVR, HvxVR, 
19163
    /* V6_vd0 */
19164
    HvxVR, 
19165
    /* V6_vdd0 */
19166
    HvxWR, 
19167
    /* V6_vdealb4w_alt */
19168
    HvxVR, HvxVR, HvxVR, 
19169
    /* V6_vdealb_alt */
19170
    HvxVR, HvxVR, 
19171
    /* V6_vdealh_alt */
19172
    HvxVR, HvxVR, 
19173
    /* V6_vdmpybus_acc_alt */
19174
    HvxVR, HvxVR, HvxVR, IntRegs, 
19175
    /* V6_vdmpybus_alt */
19176
    HvxVR, HvxVR, IntRegs, 
19177
    /* V6_vdmpybus_dv_acc_alt */
19178
    HvxWR, HvxWR, HvxWR, IntRegs, 
19179
    /* V6_vdmpybus_dv_alt */
19180
    HvxWR, HvxWR, IntRegs, 
19181
    /* V6_vdmpyhb_acc_alt */
19182
    HvxVR, HvxVR, HvxVR, IntRegs, 
19183
    /* V6_vdmpyhb_alt */
19184
    HvxVR, HvxVR, IntRegs, 
19185
    /* V6_vdmpyhb_dv_acc_alt */
19186
    HvxWR, HvxWR, HvxWR, IntRegs, 
19187
    /* V6_vdmpyhb_dv_alt */
19188
    HvxWR, HvxWR, IntRegs, 
19189
    /* V6_vdmpyhisat_acc_alt */
19190
    HvxVR, HvxVR, HvxWR, IntRegs, 
19191
    /* V6_vdmpyhisat_alt */
19192
    HvxVR, HvxWR, IntRegs, 
19193
    /* V6_vdmpyhsat_acc_alt */
19194
    HvxVR, HvxVR, HvxVR, IntRegs, 
19195
    /* V6_vdmpyhsat_alt */
19196
    HvxVR, HvxVR, IntRegs, 
19197
    /* V6_vdmpyhsuisat_acc_alt */
19198
    HvxVR, HvxVR, HvxWR, IntRegs, 
19199
    /* V6_vdmpyhsuisat_alt */
19200
    HvxVR, HvxWR, IntRegs, 
19201
    /* V6_vdmpyhsusat_acc_alt */
19202
    HvxVR, HvxVR, HvxVR, IntRegs, 
19203
    /* V6_vdmpyhsusat_alt */
19204
    HvxVR, HvxVR, IntRegs, 
19205
    /* V6_vdmpyhvsat_acc_alt */
19206
    HvxVR, HvxVR, HvxVR, HvxVR, 
19207
    /* V6_vdmpyhvsat_alt */
19208
    HvxVR, HvxVR, HvxVR, 
19209
    /* V6_vdsaduh_acc_alt */
19210
    HvxWR, HvxWR, HvxWR, IntRegs, 
19211
    /* V6_vdsaduh_alt */
19212
    HvxWR, HvxWR, IntRegs, 
19213
    /* V6_vgathermh_pseudo */
19214
    IntRegs, s4_0Imm, IntRegs, ModRegs, HvxVR, 
19215
    /* V6_vgathermhq_pseudo */
19216
    IntRegs, s4_0Imm, HvxQR, IntRegs, ModRegs, HvxVR, 
19217
    /* V6_vgathermhw_pseudo */
19218
    IntRegs, s4_0Imm, IntRegs, ModRegs, HvxWR, 
19219
    /* V6_vgathermhwq_pseudo */
19220
    IntRegs, s4_0Imm, HvxQR, IntRegs, ModRegs, HvxWR, 
19221
    /* V6_vgathermw_pseudo */
19222
    IntRegs, s4_0Imm, IntRegs, ModRegs, HvxVR, 
19223
    /* V6_vgathermwq_pseudo */
19224
    IntRegs, s4_0Imm, HvxQR, IntRegs, ModRegs, HvxVR, 
19225
    /* V6_vlsrh_alt */
19226
    HvxVR, HvxVR, IntRegs, 
19227
    /* V6_vlsrhv_alt */
19228
    HvxVR, HvxVR, HvxVR, 
19229
    /* V6_vlsrw_alt */
19230
    HvxVR, HvxVR, IntRegs, 
19231
    /* V6_vlsrwv_alt */
19232
    HvxVR, HvxVR, HvxVR, 
19233
    /* V6_vmaxb_alt */
19234
    HvxVR, HvxVR, HvxVR, 
19235
    /* V6_vmaxh_alt */
19236
    HvxVR, HvxVR, HvxVR, 
19237
    /* V6_vmaxub_alt */
19238
    HvxVR, HvxVR, HvxVR, 
19239
    /* V6_vmaxuh_alt */
19240
    HvxVR, HvxVR, HvxVR, 
19241
    /* V6_vmaxw_alt */
19242
    HvxVR, HvxVR, HvxVR, 
19243
    /* V6_vminb_alt */
19244
    HvxVR, HvxVR, HvxVR, 
19245
    /* V6_vminh_alt */
19246
    HvxVR, HvxVR, HvxVR, 
19247
    /* V6_vminub_alt */
19248
    HvxVR, HvxVR, HvxVR, 
19249
    /* V6_vminuh_alt */
19250
    HvxVR, HvxVR, HvxVR, 
19251
    /* V6_vminw_alt */
19252
    HvxVR, HvxVR, HvxVR, 
19253
    /* V6_vmpabus_acc_alt */
19254
    HvxWR, HvxWR, HvxWR, IntRegs, 
19255
    /* V6_vmpabus_alt */
19256
    HvxWR, HvxWR, IntRegs, 
19257
    /* V6_vmpabusv_alt */
19258
    HvxWR, HvxWR, HvxWR, 
19259
    /* V6_vmpabuu_acc_alt */
19260
    HvxWR, HvxWR, HvxWR, IntRegs, 
19261
    /* V6_vmpabuu_alt */
19262
    HvxWR, HvxWR, IntRegs, 
19263
    /* V6_vmpabuuv_alt */
19264
    HvxWR, HvxWR, HvxWR, 
19265
    /* V6_vmpahb_acc_alt */
19266
    HvxWR, HvxWR, HvxWR, IntRegs, 
19267
    /* V6_vmpahb_alt */
19268
    HvxWR, HvxWR, IntRegs, 
19269
    /* V6_vmpauhb_acc_alt */
19270
    HvxWR, HvxWR, HvxWR, IntRegs, 
19271
    /* V6_vmpauhb_alt */
19272
    HvxWR, HvxWR, IntRegs, 
19273
    /* V6_vmpybus_acc_alt */
19274
    HvxWR, HvxWR, HvxVR, IntRegs, 
19275
    /* V6_vmpybus_alt */
19276
    HvxWR, HvxVR, IntRegs, 
19277
    /* V6_vmpybusv_acc_alt */
19278
    HvxWR, HvxWR, HvxVR, HvxVR, 
19279
    /* V6_vmpybusv_alt */
19280
    HvxWR, HvxVR, HvxVR, 
19281
    /* V6_vmpybv_acc_alt */
19282
    HvxWR, HvxWR, HvxVR, HvxVR, 
19283
    /* V6_vmpybv_alt */
19284
    HvxWR, HvxVR, HvxVR, 
19285
    /* V6_vmpyewuh_alt */
19286
    HvxVR, HvxVR, HvxVR, 
19287
    /* V6_vmpyh_acc_alt */
19288
    HvxWR, HvxWR, HvxVR, IntRegs, 
19289
    /* V6_vmpyh_alt */
19290
    HvxWR, HvxVR, IntRegs, 
19291
    /* V6_vmpyhsat_acc_alt */
19292
    HvxWR, HvxWR, HvxVR, IntRegs, 
19293
    /* V6_vmpyhsrs_alt */
19294
    HvxVR, HvxVR, IntRegs, 
19295
    /* V6_vmpyhss_alt */
19296
    HvxVR, HvxVR, IntRegs, 
19297
    /* V6_vmpyhus_acc_alt */
19298
    HvxWR, HvxWR, HvxVR, HvxVR, 
19299
    /* V6_vmpyhus_alt */
19300
    HvxWR, HvxVR, HvxVR, 
19301
    /* V6_vmpyhv_acc_alt */
19302
    HvxWR, HvxWR, HvxVR, HvxVR, 
19303
    /* V6_vmpyhv_alt */
19304
    HvxWR, HvxVR, HvxVR, 
19305
    /* V6_vmpyhvsrs_alt */
19306
    HvxVR, HvxVR, HvxVR, 
19307
    /* V6_vmpyiewh_acc_alt */
19308
    HvxVR, HvxVR, HvxVR, HvxVR, 
19309
    /* V6_vmpyiewuh_acc_alt */
19310
    HvxVR, HvxVR, HvxVR, HvxVR, 
19311
    /* V6_vmpyiewuh_alt */
19312
    HvxVR, HvxVR, HvxVR, 
19313
    /* V6_vmpyih_acc_alt */
19314
    HvxVR, HvxVR, HvxVR, HvxVR, 
19315
    /* V6_vmpyih_alt */
19316
    HvxVR, HvxVR, HvxVR, 
19317
    /* V6_vmpyihb_acc_alt */
19318
    HvxVR, HvxVR, HvxVR, IntRegs, 
19319
    /* V6_vmpyihb_alt */
19320
    HvxVR, HvxVR, IntRegs, 
19321
    /* V6_vmpyiowh_alt */
19322
    HvxVR, HvxVR, HvxVR, 
19323
    /* V6_vmpyiwb_acc_alt */
19324
    HvxVR, HvxVR, HvxVR, IntRegs, 
19325
    /* V6_vmpyiwb_alt */
19326
    HvxVR, HvxVR, IntRegs, 
19327
    /* V6_vmpyiwh_acc_alt */
19328
    HvxVR, HvxVR, HvxVR, IntRegs, 
19329
    /* V6_vmpyiwh_alt */
19330
    HvxVR, HvxVR, IntRegs, 
19331
    /* V6_vmpyiwub_acc_alt */
19332
    HvxVR, HvxVR, HvxVR, IntRegs, 
19333
    /* V6_vmpyiwub_alt */
19334
    HvxVR, HvxVR, IntRegs, 
19335
    /* V6_vmpyowh_alt */
19336
    HvxVR, HvxVR, HvxVR, 
19337
    /* V6_vmpyowh_rnd_alt */
19338
    HvxVR, HvxVR, HvxVR, 
19339
    /* V6_vmpyowh_rnd_sacc_alt */
19340
    HvxVR, HvxVR, HvxVR, HvxVR, 
19341
    /* V6_vmpyowh_sacc_alt */
19342
    HvxVR, HvxVR, HvxVR, HvxVR, 
19343
    /* V6_vmpyub_acc_alt */
19344
    HvxWR, HvxWR, HvxVR, IntRegs, 
19345
    /* V6_vmpyub_alt */
19346
    HvxWR, HvxVR, IntRegs, 
19347
    /* V6_vmpyubv_acc_alt */
19348
    HvxWR, HvxWR, HvxVR, HvxVR, 
19349
    /* V6_vmpyubv_alt */
19350
    HvxWR, HvxVR, HvxVR, 
19351
    /* V6_vmpyuh_acc_alt */
19352
    HvxWR, HvxWR, HvxVR, IntRegs, 
19353
    /* V6_vmpyuh_alt */
19354
    HvxWR, HvxVR, IntRegs, 
19355
    /* V6_vmpyuhv_acc_alt */
19356
    HvxWR, HvxWR, HvxVR, HvxVR, 
19357
    /* V6_vmpyuhv_alt */
19358
    HvxWR, HvxVR, HvxVR, 
19359
    /* V6_vnavgb_alt */
19360
    HvxVR, HvxVR, HvxVR, 
19361
    /* V6_vnavgh_alt */
19362
    HvxVR, HvxVR, HvxVR, 
19363
    /* V6_vnavgub_alt */
19364
    HvxVR, HvxVR, HvxVR, 
19365
    /* V6_vnavgw_alt */
19366
    HvxVR, HvxVR, HvxVR, 
19367
    /* V6_vnormamth_alt */
19368
    HvxVR, HvxVR, 
19369
    /* V6_vnormamtw_alt */
19370
    HvxVR, HvxVR, 
19371
    /* V6_vpackeb_alt */
19372
    HvxVR, HvxVR, HvxVR, 
19373
    /* V6_vpackeh_alt */
19374
    HvxVR, HvxVR, HvxVR, 
19375
    /* V6_vpackhb_sat_alt */
19376
    HvxVR, HvxVR, HvxVR, 
19377
    /* V6_vpackhub_sat_alt */
19378
    HvxVR, HvxVR, HvxVR, 
19379
    /* V6_vpackob_alt */
19380
    HvxVR, HvxVR, HvxVR, 
19381
    /* V6_vpackoh_alt */
19382
    HvxVR, HvxVR, HvxVR, 
19383
    /* V6_vpackwh_sat_alt */
19384
    HvxVR, HvxVR, HvxVR, 
19385
    /* V6_vpackwuh_sat_alt */
19386
    HvxVR, HvxVR, HvxVR, 
19387
    /* V6_vpopcounth_alt */
19388
    HvxVR, HvxVR, 
19389
    /* V6_vrmpybub_rtt_acc_alt */
19390
    HvxWR, HvxWR, HvxVR, DoubleRegs, 
19391
    /* V6_vrmpybub_rtt_alt */
19392
    HvxWR, HvxVR, DoubleRegs, 
19393
    /* V6_vrmpybus_acc_alt */
19394
    HvxVR, HvxVR, HvxVR, IntRegs, 
19395
    /* V6_vrmpybus_alt */
19396
    HvxVR, HvxVR, IntRegs, 
19397
    /* V6_vrmpybusi_acc_alt */
19398
    HvxWR, HvxWR, HvxWR, IntRegs, u1_0Imm, 
19399
    /* V6_vrmpybusi_alt */
19400
    HvxWR, HvxWR, IntRegs, u1_0Imm, 
19401
    /* V6_vrmpybusv_acc_alt */
19402
    HvxVR, HvxVR, HvxVR, HvxVR, 
19403
    /* V6_vrmpybusv_alt */
19404
    HvxVR, HvxVR, HvxVR, 
19405
    /* V6_vrmpybv_acc_alt */
19406
    HvxVR, HvxVR, HvxVR, HvxVR, 
19407
    /* V6_vrmpybv_alt */
19408
    HvxVR, HvxVR, HvxVR, 
19409
    /* V6_vrmpyub_acc_alt */
19410
    HvxVR, HvxVR, HvxVR, IntRegs, 
19411
    /* V6_vrmpyub_alt */
19412
    HvxVR, HvxVR, IntRegs, 
19413
    /* V6_vrmpyub_rtt_acc_alt */
19414
    HvxWR, HvxWR, HvxVR, DoubleRegs, 
19415
    /* V6_vrmpyub_rtt_alt */
19416
    HvxWR, HvxVR, DoubleRegs, 
19417
    /* V6_vrmpyubi_acc_alt */
19418
    HvxWR, HvxWR, HvxWR, IntRegs, u1_0Imm, 
19419
    /* V6_vrmpyubi_alt */
19420
    HvxWR, HvxWR, IntRegs, u1_0Imm, 
19421
    /* V6_vrmpyubv_acc_alt */
19422
    HvxVR, HvxVR, HvxVR, HvxVR, 
19423
    /* V6_vrmpyubv_alt */
19424
    HvxVR, HvxVR, HvxVR, 
19425
    /* V6_vrotr_alt */
19426
    HvxVR, HvxVR, HvxVR, 
19427
    /* V6_vroundhb_alt */
19428
    HvxVR, HvxVR, HvxVR, 
19429
    /* V6_vroundhub_alt */
19430
    HvxVR, HvxVR, HvxVR, 
19431
    /* V6_vrounduhub_alt */
19432
    HvxVR, HvxVR, HvxVR, 
19433
    /* V6_vrounduwuh_alt */
19434
    HvxVR, HvxVR, HvxVR, 
19435
    /* V6_vroundwh_alt */
19436
    HvxVR, HvxVR, HvxVR, 
19437
    /* V6_vroundwuh_alt */
19438
    HvxVR, HvxVR, HvxVR, 
19439
    /* V6_vrsadubi_acc_alt */
19440
    HvxWR, HvxWR, HvxWR, IntRegs, u1_0Imm, 
19441
    /* V6_vrsadubi_alt */
19442
    HvxWR, HvxWR, IntRegs, u1_0Imm, 
19443
    /* V6_vsathub_alt */
19444
    HvxVR, HvxVR, HvxVR, 
19445
    /* V6_vsatuwuh_alt */
19446
    HvxVR, HvxVR, HvxVR, 
19447
    /* V6_vsatwh_alt */
19448
    HvxVR, HvxVR, HvxVR, 
19449
    /* V6_vsb_alt */
19450
    HvxWR, HvxVR, 
19451
    /* V6_vscattermh_add_alt */
19452
    IntRegs, ModRegs, HvxVR, HvxVR, 
19453
    /* V6_vscattermh_alt */
19454
    IntRegs, ModRegs, HvxVR, HvxVR, 
19455
    /* V6_vscattermhq_alt */
19456
    HvxQR, IntRegs, ModRegs, HvxVR, HvxVR, 
19457
    /* V6_vscattermw_add_alt */
19458
    IntRegs, ModRegs, HvxVR, HvxVR, 
19459
    /* V6_vscattermw_alt */
19460
    IntRegs, ModRegs, HvxVR, HvxVR, 
19461
    /* V6_vscattermwh_add_alt */
19462
    IntRegs, ModRegs, HvxWR, HvxVR, 
19463
    /* V6_vscattermwh_alt */
19464
    IntRegs, ModRegs, HvxWR, HvxVR, 
19465
    /* V6_vscattermwhq_alt */
19466
    HvxQR, IntRegs, ModRegs, HvxWR, HvxVR, 
19467
    /* V6_vscattermwq_alt */
19468
    HvxQR, IntRegs, ModRegs, HvxVR, HvxVR, 
19469
    /* V6_vsh_alt */
19470
    HvxWR, HvxVR, 
19471
    /* V6_vshufeh_alt */
19472
    HvxVR, HvxVR, HvxVR, 
19473
    /* V6_vshuffb_alt */
19474
    HvxVR, HvxVR, 
19475
    /* V6_vshuffeb_alt */
19476
    HvxVR, HvxVR, HvxVR, 
19477
    /* V6_vshuffh_alt */
19478
    HvxVR, HvxVR, 
19479
    /* V6_vshuffob_alt */
19480
    HvxVR, HvxVR, HvxVR, 
19481
    /* V6_vshufoeb_alt */
19482
    HvxWR, HvxVR, HvxVR, 
19483
    /* V6_vshufoeh_alt */
19484
    HvxWR, HvxVR, HvxVR, 
19485
    /* V6_vshufoh_alt */
19486
    HvxVR, HvxVR, HvxVR, 
19487
    /* V6_vsubb_alt */
19488
    HvxVR, HvxVR, HvxVR, 
19489
    /* V6_vsubb_dv_alt */
19490
    HvxWR, HvxWR, HvxWR, 
19491
    /* V6_vsubbnq_alt */
19492
    HvxVR, HvxQR, HvxVR, HvxVR, 
19493
    /* V6_vsubbq_alt */
19494
    HvxVR, HvxQR, HvxVR, HvxVR, 
19495
    /* V6_vsubbsat_alt */
19496
    HvxVR, HvxVR, HvxVR, 
19497
    /* V6_vsubbsat_dv_alt */
19498
    HvxWR, HvxWR, HvxWR, 
19499
    /* V6_vsubh_alt */
19500
    HvxVR, HvxVR, HvxVR, 
19501
    /* V6_vsubh_dv_alt */
19502
    HvxWR, HvxWR, HvxWR, 
19503
    /* V6_vsubhnq_alt */
19504
    HvxVR, HvxQR, HvxVR, HvxVR, 
19505
    /* V6_vsubhq_alt */
19506
    HvxVR, HvxQR, HvxVR, HvxVR, 
19507
    /* V6_vsubhsat_alt */
19508
    HvxVR, HvxVR, HvxVR, 
19509
    /* V6_vsubhsat_dv_alt */
19510
    HvxWR, HvxWR, HvxWR, 
19511
    /* V6_vsubhw_alt */
19512
    HvxWR, HvxVR, HvxVR, 
19513
    /* V6_vsububh_alt */
19514
    HvxWR, HvxVR, HvxVR, 
19515
    /* V6_vsububsat_alt */
19516
    HvxVR, HvxVR, HvxVR, 
19517
    /* V6_vsububsat_dv_alt */
19518
    HvxWR, HvxWR, HvxWR, 
19519
    /* V6_vsubuhsat_alt */
19520
    HvxVR, HvxVR, HvxVR, 
19521
    /* V6_vsubuhsat_dv_alt */
19522
    HvxWR, HvxWR, HvxWR, 
19523
    /* V6_vsubuhw_alt */
19524
    HvxWR, HvxVR, HvxVR, 
19525
    /* V6_vsubuwsat_alt */
19526
    HvxVR, HvxVR, HvxVR, 
19527
    /* V6_vsubuwsat_dv_alt */
19528
    HvxWR, HvxWR, HvxWR, 
19529
    /* V6_vsubw_alt */
19530
    HvxVR, HvxVR, HvxVR, 
19531
    /* V6_vsubw_dv_alt */
19532
    HvxWR, HvxWR, HvxWR, 
19533
    /* V6_vsubwnq_alt */
19534
    HvxVR, HvxQR, HvxVR, HvxVR, 
19535
    /* V6_vsubwq_alt */
19536
    HvxVR, HvxQR, HvxVR, HvxVR, 
19537
    /* V6_vsubwsat_alt */
19538
    HvxVR, HvxVR, HvxVR, 
19539
    /* V6_vsubwsat_dv_alt */
19540
    HvxWR, HvxWR, HvxWR, 
19541
    /* V6_vtmpyb_acc_alt */
19542
    HvxWR, HvxWR, HvxWR, IntRegs, 
19543
    /* V6_vtmpyb_alt */
19544
    HvxWR, HvxWR, IntRegs, 
19545
    /* V6_vtmpybus_acc_alt */
19546
    HvxWR, HvxWR, HvxWR, IntRegs, 
19547
    /* V6_vtmpybus_alt */
19548
    HvxWR, HvxWR, IntRegs, 
19549
    /* V6_vtmpyhb_acc_alt */
19550
    HvxWR, HvxWR, HvxWR, IntRegs, 
19551
    /* V6_vtmpyhb_alt */
19552
    HvxWR, HvxWR, IntRegs, 
19553
    /* V6_vtran2x2_map */
19554
    HvxVR, HvxVR, HvxVR, HvxVR, IntRegs, 
19555
    /* V6_vunpackb_alt */
19556
    HvxWR, HvxVR, 
19557
    /* V6_vunpackh_alt */
19558
    HvxWR, HvxVR, 
19559
    /* V6_vunpackob_alt */
19560
    HvxWR, HvxWR, HvxVR, 
19561
    /* V6_vunpackoh_alt */
19562
    HvxWR, HvxWR, HvxVR, 
19563
    /* V6_vunpackub_alt */
19564
    HvxWR, HvxVR, 
19565
    /* V6_vunpackuh_alt */
19566
    HvxWR, HvxVR, 
19567
    /* V6_vzb_alt */
19568
    HvxWR, HvxVR, 
19569
    /* V6_vzh_alt */
19570
    HvxWR, HvxVR, 
19571
    /* V6_zld0 */
19572
    IntRegs, 
19573
    /* V6_zldp0 */
19574
    PredRegs, IntRegs, 
19575
    /* Y2_crswap_old */
19576
    IntRegs, IntRegs, 
19577
    /* Y2_dcfetch */
19578
    IntRegs, 
19579
    /* Y2_k1lock_map */
19580
    /* Y2_k1unlock_map */
19581
    /* dup_A2_add */
19582
    IntRegs, IntRegs, IntRegs, 
19583
    /* dup_A2_addi */
19584
    IntRegs, IntRegs, s32_0Imm, 
19585
    /* dup_A2_andir */
19586
    IntRegs, IntRegs, s32_0Imm, 
19587
    /* dup_A2_combineii */
19588
    DoubleRegs, s32_0Imm, s8_0Imm, 
19589
    /* dup_A2_sxtb */
19590
    IntRegs, IntRegs, 
19591
    /* dup_A2_sxth */
19592
    IntRegs, IntRegs, 
19593
    /* dup_A2_tfr */
19594
    IntRegs, IntRegs, 
19595
    /* dup_A2_tfrsi */
19596
    IntRegs, s32_0Imm, 
19597
    /* dup_A2_zxtb */
19598
    IntRegs, IntRegs, 
19599
    /* dup_A2_zxth */
19600
    IntRegs, IntRegs, 
19601
    /* dup_A4_combineii */
19602
    DoubleRegs, s8_0Imm, u32_0Imm, 
19603
    /* dup_A4_combineir */
19604
    DoubleRegs, s32_0Imm, IntRegs, 
19605
    /* dup_A4_combineri */
19606
    DoubleRegs, IntRegs, s32_0Imm, 
19607
    /* dup_C2_cmoveif */
19608
    IntRegs, PredRegs, s32_0Imm, 
19609
    /* dup_C2_cmoveit */
19610
    IntRegs, PredRegs, s32_0Imm, 
19611
    /* dup_C2_cmovenewif */
19612
    IntRegs, PredRegs, s32_0Imm, 
19613
    /* dup_C2_cmovenewit */
19614
    IntRegs, PredRegs, s32_0Imm, 
19615
    /* dup_C2_cmpeqi */
19616
    PredRegs, IntRegs, s32_0Imm, 
19617
    /* dup_L2_deallocframe */
19618
    DoubleRegs, IntRegs, 
19619
    /* dup_L2_loadrb_io */
19620
    IntRegs, IntRegs, s32_0Imm, 
19621
    /* dup_L2_loadrd_io */
19622
    DoubleRegs, IntRegs, s29_3Imm, 
19623
    /* dup_L2_loadrh_io */
19624
    IntRegs, IntRegs, s31_1Imm, 
19625
    /* dup_L2_loadri_io */
19626
    IntRegs, IntRegs, s30_2Imm, 
19627
    /* dup_L2_loadrub_io */
19628
    IntRegs, IntRegs, s32_0Imm, 
19629
    /* dup_L2_loadruh_io */
19630
    IntRegs, IntRegs, s31_1Imm, 
19631
    /* dup_S2_allocframe */
19632
    IntRegs, IntRegs, u11_3Imm, 
19633
    /* dup_S2_storerb_io */
19634
    IntRegs, s32_0Imm, IntRegs, 
19635
    /* dup_S2_storerd_io */
19636
    IntRegs, s29_3Imm, DoubleRegs, 
19637
    /* dup_S2_storerh_io */
19638
    IntRegs, s31_1Imm, IntRegs, 
19639
    /* dup_S2_storeri_io */
19640
    IntRegs, s30_2Imm, IntRegs, 
19641
    /* dup_S4_storeirb_io */
19642
    IntRegs, u6_0Imm, s32_0Imm, 
19643
    /* dup_S4_storeiri_io */
19644
    IntRegs, u6_2Imm, s32_0Imm, 
19645
    /* A2_abs */
19646
    IntRegs, IntRegs, 
19647
    /* A2_absp */
19648
    DoubleRegs, DoubleRegs, 
19649
    /* A2_abssat */
19650
    IntRegs, IntRegs, 
19651
    /* A2_add */
19652
    IntRegs, IntRegs, IntRegs, 
19653
    /* A2_addh_h16_hh */
19654
    IntRegs, IntRegs, IntRegs, 
19655
    /* A2_addh_h16_hl */
19656
    IntRegs, IntRegs, IntRegs, 
19657
    /* A2_addh_h16_lh */
19658
    IntRegs, IntRegs, IntRegs, 
19659
    /* A2_addh_h16_ll */
19660
    IntRegs, IntRegs, IntRegs, 
19661
    /* A2_addh_h16_sat_hh */
19662
    IntRegs, IntRegs, IntRegs, 
19663
    /* A2_addh_h16_sat_hl */
19664
    IntRegs, IntRegs, IntRegs, 
19665
    /* A2_addh_h16_sat_lh */
19666
    IntRegs, IntRegs, IntRegs, 
19667
    /* A2_addh_h16_sat_ll */
19668
    IntRegs, IntRegs, IntRegs, 
19669
    /* A2_addh_l16_hl */
19670
    IntRegs, IntRegs, IntRegs, 
19671
    /* A2_addh_l16_ll */
19672
    IntRegs, IntRegs, IntRegs, 
19673
    /* A2_addh_l16_sat_hl */
19674
    IntRegs, IntRegs, IntRegs, 
19675
    /* A2_addh_l16_sat_ll */
19676
    IntRegs, IntRegs, IntRegs, 
19677
    /* A2_addi */
19678
    IntRegs, IntRegs, s32_0Imm, 
19679
    /* A2_addp */
19680
    DoubleRegs, DoubleRegs, DoubleRegs, 
19681
    /* A2_addpsat */
19682
    DoubleRegs, DoubleRegs, DoubleRegs, 
19683
    /* A2_addsat */
19684
    IntRegs, IntRegs, IntRegs, 
19685
    /* A2_addsph */
19686
    DoubleRegs, DoubleRegs, DoubleRegs, 
19687
    /* A2_addspl */
19688
    DoubleRegs, DoubleRegs, DoubleRegs, 
19689
    /* A2_and */
19690
    IntRegs, IntRegs, IntRegs, 
19691
    /* A2_andir */
19692
    IntRegs, IntRegs, s32_0Imm, 
19693
    /* A2_andp */
19694
    DoubleRegs, DoubleRegs, DoubleRegs, 
19695
    /* A2_aslh */
19696
    IntRegs, IntRegs, 
19697
    /* A2_asrh */
19698
    IntRegs, IntRegs, 
19699
    /* A2_combine_hh */
19700
    IntRegs, IntRegs, IntRegs, 
19701
    /* A2_combine_hl */
19702
    IntRegs, IntRegs, IntRegs, 
19703
    /* A2_combine_lh */
19704
    IntRegs, IntRegs, IntRegs, 
19705
    /* A2_combine_ll */
19706
    IntRegs, IntRegs, IntRegs, 
19707
    /* A2_combineii */
19708
    DoubleRegs, s32_0Imm, s8_0Imm, 
19709
    /* A2_combinew */
19710
    DoubleRegs, IntRegs, IntRegs, 
19711
    /* A2_max */
19712
    IntRegs, IntRegs, IntRegs, 
19713
    /* A2_maxp */
19714
    DoubleRegs, DoubleRegs, DoubleRegs, 
19715
    /* A2_maxu */
19716
    IntRegs, IntRegs, IntRegs, 
19717
    /* A2_maxup */
19718
    DoubleRegs, DoubleRegs, DoubleRegs, 
19719
    /* A2_min */
19720
    IntRegs, IntRegs, IntRegs, 
19721
    /* A2_minp */
19722
    DoubleRegs, DoubleRegs, DoubleRegs, 
19723
    /* A2_minu */
19724
    IntRegs, IntRegs, IntRegs, 
19725
    /* A2_minup */
19726
    DoubleRegs, DoubleRegs, DoubleRegs, 
19727
    /* A2_negp */
19728
    DoubleRegs, DoubleRegs, 
19729
    /* A2_negsat */
19730
    IntRegs, IntRegs, 
19731
    /* A2_nop */
19732
    /* A2_notp */
19733
    DoubleRegs, DoubleRegs, 
19734
    /* A2_or */
19735
    IntRegs, IntRegs, IntRegs, 
19736
    /* A2_orir */
19737
    IntRegs, IntRegs, s32_0Imm, 
19738
    /* A2_orp */
19739
    DoubleRegs, DoubleRegs, DoubleRegs, 
19740
    /* A2_paddf */
19741
    IntRegs, PredRegs, IntRegs, IntRegs, 
19742
    /* A2_paddfnew */
19743
    IntRegs, PredRegs, IntRegs, IntRegs, 
19744
    /* A2_paddif */
19745
    IntRegs, PredRegs, IntRegs, s32_0Imm, 
19746
    /* A2_paddifnew */
19747
    IntRegs, PredRegs, IntRegs, s32_0Imm, 
19748
    /* A2_paddit */
19749
    IntRegs, PredRegs, IntRegs, s32_0Imm, 
19750
    /* A2_padditnew */
19751
    IntRegs, PredRegs, IntRegs, s32_0Imm, 
19752
    /* A2_paddt */
19753
    IntRegs, PredRegs, IntRegs, IntRegs, 
19754
    /* A2_paddtnew */
19755
    IntRegs, PredRegs, IntRegs, IntRegs, 
19756
    /* A2_pandf */
19757
    IntRegs, PredRegs, IntRegs, IntRegs, 
19758
    /* A2_pandfnew */
19759
    IntRegs, PredRegs, IntRegs, IntRegs, 
19760
    /* A2_pandt */
19761
    IntRegs, PredRegs, IntRegs, IntRegs, 
19762
    /* A2_pandtnew */
19763
    IntRegs, PredRegs, IntRegs, IntRegs, 
19764
    /* A2_porf */
19765
    IntRegs, PredRegs, IntRegs, IntRegs, 
19766
    /* A2_porfnew */
19767
    IntRegs, PredRegs, IntRegs, IntRegs, 
19768
    /* A2_port */
19769
    IntRegs, PredRegs, IntRegs, IntRegs, 
19770
    /* A2_portnew */
19771
    IntRegs, PredRegs, IntRegs, IntRegs, 
19772
    /* A2_psubf */
19773
    IntRegs, PredRegs, IntRegs, IntRegs, 
19774
    /* A2_psubfnew */
19775
    IntRegs, PredRegs, IntRegs, IntRegs, 
19776
    /* A2_psubt */
19777
    IntRegs, PredRegs, IntRegs, IntRegs, 
19778
    /* A2_psubtnew */
19779
    IntRegs, PredRegs, IntRegs, IntRegs, 
19780
    /* A2_pxorf */
19781
    IntRegs, PredRegs, IntRegs, IntRegs, 
19782
    /* A2_pxorfnew */
19783
    IntRegs, PredRegs, IntRegs, IntRegs, 
19784
    /* A2_pxort */
19785
    IntRegs, PredRegs, IntRegs, IntRegs, 
19786
    /* A2_pxortnew */
19787
    IntRegs, PredRegs, IntRegs, IntRegs, 
19788
    /* A2_roundsat */
19789
    IntRegs, DoubleRegs, 
19790
    /* A2_sat */
19791
    IntRegs, DoubleRegs, 
19792
    /* A2_satb */
19793
    IntRegs, IntRegs, 
19794
    /* A2_sath */
19795
    IntRegs, IntRegs, 
19796
    /* A2_satub */
19797
    IntRegs, IntRegs, 
19798
    /* A2_satuh */
19799
    IntRegs, IntRegs, 
19800
    /* A2_sub */
19801
    IntRegs, IntRegs, IntRegs, 
19802
    /* A2_subh_h16_hh */
19803
    IntRegs, IntRegs, IntRegs, 
19804
    /* A2_subh_h16_hl */
19805
    IntRegs, IntRegs, IntRegs, 
19806
    /* A2_subh_h16_lh */
19807
    IntRegs, IntRegs, IntRegs, 
19808
    /* A2_subh_h16_ll */
19809
    IntRegs, IntRegs, IntRegs, 
19810
    /* A2_subh_h16_sat_hh */
19811
    IntRegs, IntRegs, IntRegs, 
19812
    /* A2_subh_h16_sat_hl */
19813
    IntRegs, IntRegs, IntRegs, 
19814
    /* A2_subh_h16_sat_lh */
19815
    IntRegs, IntRegs, IntRegs, 
19816
    /* A2_subh_h16_sat_ll */
19817
    IntRegs, IntRegs, IntRegs, 
19818
    /* A2_subh_l16_hl */
19819
    IntRegs, IntRegs, IntRegs, 
19820
    /* A2_subh_l16_ll */
19821
    IntRegs, IntRegs, IntRegs, 
19822
    /* A2_subh_l16_sat_hl */
19823
    IntRegs, IntRegs, IntRegs, 
19824
    /* A2_subh_l16_sat_ll */
19825
    IntRegs, IntRegs, IntRegs, 
19826
    /* A2_subp */
19827
    DoubleRegs, DoubleRegs, DoubleRegs, 
19828
    /* A2_subri */
19829
    IntRegs, s32_0Imm, IntRegs, 
19830
    /* A2_subsat */
19831
    IntRegs, IntRegs, IntRegs, 
19832
    /* A2_svaddh */
19833
    IntRegs, IntRegs, IntRegs, 
19834
    /* A2_svaddhs */
19835
    IntRegs, IntRegs, IntRegs, 
19836
    /* A2_svadduhs */
19837
    IntRegs, IntRegs, IntRegs, 
19838
    /* A2_svavgh */
19839
    IntRegs, IntRegs, IntRegs, 
19840
    /* A2_svavghs */
19841
    IntRegs, IntRegs, IntRegs, 
19842
    /* A2_svnavgh */
19843
    IntRegs, IntRegs, IntRegs, 
19844
    /* A2_svsubh */
19845
    IntRegs, IntRegs, IntRegs, 
19846
    /* A2_svsubhs */
19847
    IntRegs, IntRegs, IntRegs, 
19848
    /* A2_svsubuhs */
19849
    IntRegs, IntRegs, IntRegs, 
19850
    /* A2_swiz */
19851
    IntRegs, IntRegs, 
19852
    /* A2_sxtb */
19853
    IntRegs, IntRegs, 
19854
    /* A2_sxth */
19855
    IntRegs, IntRegs, 
19856
    /* A2_sxtw */
19857
    DoubleRegs, IntRegs, 
19858
    /* A2_tfr */
19859
    IntRegs, IntRegs, 
19860
    /* A2_tfrcrr */
19861
    IntRegs, CtrRegs, 
19862
    /* A2_tfrih */
19863
    IntRegs, IntRegs, u16_0Imm, 
19864
    /* A2_tfril */
19865
    IntRegs, IntRegs, u16_0Imm, 
19866
    /* A2_tfrrcr */
19867
    CtrRegs, IntRegs, 
19868
    /* A2_tfrsi */
19869
    IntRegs, s32_0Imm, 
19870
    /* A2_vabsh */
19871
    DoubleRegs, DoubleRegs, 
19872
    /* A2_vabshsat */
19873
    DoubleRegs, DoubleRegs, 
19874
    /* A2_vabsw */
19875
    DoubleRegs, DoubleRegs, 
19876
    /* A2_vabswsat */
19877
    DoubleRegs, DoubleRegs, 
19878
    /* A2_vaddh */
19879
    DoubleRegs, DoubleRegs, DoubleRegs, 
19880
    /* A2_vaddhs */
19881
    DoubleRegs, DoubleRegs, DoubleRegs, 
19882
    /* A2_vaddub */
19883
    DoubleRegs, DoubleRegs, DoubleRegs, 
19884
    /* A2_vaddubs */
19885
    DoubleRegs, DoubleRegs, DoubleRegs, 
19886
    /* A2_vadduhs */
19887
    DoubleRegs, DoubleRegs, DoubleRegs, 
19888
    /* A2_vaddw */
19889
    DoubleRegs, DoubleRegs, DoubleRegs, 
19890
    /* A2_vaddws */
19891
    DoubleRegs, DoubleRegs, DoubleRegs, 
19892
    /* A2_vavgh */
19893
    DoubleRegs, DoubleRegs, DoubleRegs, 
19894
    /* A2_vavghcr */
19895
    DoubleRegs, DoubleRegs, DoubleRegs, 
19896
    /* A2_vavghr */
19897
    DoubleRegs, DoubleRegs, DoubleRegs, 
19898
    /* A2_vavgub */
19899
    DoubleRegs, DoubleRegs, DoubleRegs, 
19900
    /* A2_vavgubr */
19901
    DoubleRegs, DoubleRegs, DoubleRegs, 
19902
    /* A2_vavguh */
19903
    DoubleRegs, DoubleRegs, DoubleRegs, 
19904
    /* A2_vavguhr */
19905
    DoubleRegs, DoubleRegs, DoubleRegs, 
19906
    /* A2_vavguw */
19907
    DoubleRegs, DoubleRegs, DoubleRegs, 
19908
    /* A2_vavguwr */
19909
    DoubleRegs, DoubleRegs, DoubleRegs, 
19910
    /* A2_vavgw */
19911
    DoubleRegs, DoubleRegs, DoubleRegs, 
19912
    /* A2_vavgwcr */
19913
    DoubleRegs, DoubleRegs, DoubleRegs, 
19914
    /* A2_vavgwr */
19915
    DoubleRegs, DoubleRegs, DoubleRegs, 
19916
    /* A2_vcmpbeq */
19917
    PredRegs, DoubleRegs, DoubleRegs, 
19918
    /* A2_vcmpbgtu */
19919
    PredRegs, DoubleRegs, DoubleRegs, 
19920
    /* A2_vcmpheq */
19921
    PredRegs, DoubleRegs, DoubleRegs, 
19922
    /* A2_vcmphgt */
19923
    PredRegs, DoubleRegs, DoubleRegs, 
19924
    /* A2_vcmphgtu */
19925
    PredRegs, DoubleRegs, DoubleRegs, 
19926
    /* A2_vcmpweq */
19927
    PredRegs, DoubleRegs, DoubleRegs, 
19928
    /* A2_vcmpwgt */
19929
    PredRegs, DoubleRegs, DoubleRegs, 
19930
    /* A2_vcmpwgtu */
19931
    PredRegs, DoubleRegs, DoubleRegs, 
19932
    /* A2_vconj */
19933
    DoubleRegs, DoubleRegs, 
19934
    /* A2_vmaxb */
19935
    DoubleRegs, DoubleRegs, DoubleRegs, 
19936
    /* A2_vmaxh */
19937
    DoubleRegs, DoubleRegs, DoubleRegs, 
19938
    /* A2_vmaxub */
19939
    DoubleRegs, DoubleRegs, DoubleRegs, 
19940
    /* A2_vmaxuh */
19941
    DoubleRegs, DoubleRegs, DoubleRegs, 
19942
    /* A2_vmaxuw */
19943
    DoubleRegs, DoubleRegs, DoubleRegs, 
19944
    /* A2_vmaxw */
19945
    DoubleRegs, DoubleRegs, DoubleRegs, 
19946
    /* A2_vminb */
19947
    DoubleRegs, DoubleRegs, DoubleRegs, 
19948
    /* A2_vminh */
19949
    DoubleRegs, DoubleRegs, DoubleRegs, 
19950
    /* A2_vminub */
19951
    DoubleRegs, DoubleRegs, DoubleRegs, 
19952
    /* A2_vminuh */
19953
    DoubleRegs, DoubleRegs, DoubleRegs, 
19954
    /* A2_vminuw */
19955
    DoubleRegs, DoubleRegs, DoubleRegs, 
19956
    /* A2_vminw */
19957
    DoubleRegs, DoubleRegs, DoubleRegs, 
19958
    /* A2_vnavgh */
19959
    DoubleRegs, DoubleRegs, DoubleRegs, 
19960
    /* A2_vnavghcr */
19961
    DoubleRegs, DoubleRegs, DoubleRegs, 
19962
    /* A2_vnavghr */
19963
    DoubleRegs, DoubleRegs, DoubleRegs, 
19964
    /* A2_vnavgw */
19965
    DoubleRegs, DoubleRegs, DoubleRegs, 
19966
    /* A2_vnavgwcr */
19967
    DoubleRegs, DoubleRegs, DoubleRegs, 
19968
    /* A2_vnavgwr */
19969
    DoubleRegs, DoubleRegs, DoubleRegs, 
19970
    /* A2_vraddub */
19971
    DoubleRegs, DoubleRegs, DoubleRegs, 
19972
    /* A2_vraddub_acc */
19973
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
19974
    /* A2_vrsadub */
19975
    DoubleRegs, DoubleRegs, DoubleRegs, 
19976
    /* A2_vrsadub_acc */
19977
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
19978
    /* A2_vsubh */
19979
    DoubleRegs, DoubleRegs, DoubleRegs, 
19980
    /* A2_vsubhs */
19981
    DoubleRegs, DoubleRegs, DoubleRegs, 
19982
    /* A2_vsubub */
19983
    DoubleRegs, DoubleRegs, DoubleRegs, 
19984
    /* A2_vsububs */
19985
    DoubleRegs, DoubleRegs, DoubleRegs, 
19986
    /* A2_vsubuhs */
19987
    DoubleRegs, DoubleRegs, DoubleRegs, 
19988
    /* A2_vsubw */
19989
    DoubleRegs, DoubleRegs, DoubleRegs, 
19990
    /* A2_vsubws */
19991
    DoubleRegs, DoubleRegs, DoubleRegs, 
19992
    /* A2_xor */
19993
    IntRegs, IntRegs, IntRegs, 
19994
    /* A2_xorp */
19995
    DoubleRegs, DoubleRegs, DoubleRegs, 
19996
    /* A2_zxth */
19997
    IntRegs, IntRegs, 
19998
    /* A4_addp_c */
19999
    DoubleRegs, PredRegs, DoubleRegs, DoubleRegs, PredRegs, 
20000
    /* A4_andn */
20001
    IntRegs, IntRegs, IntRegs, 
20002
    /* A4_andnp */
20003
    DoubleRegs, DoubleRegs, DoubleRegs, 
20004
    /* A4_bitsplit */
20005
    DoubleRegs, IntRegs, IntRegs, 
20006
    /* A4_bitspliti */
20007
    DoubleRegs, IntRegs, u5_0Imm, 
20008
    /* A4_boundscheck_hi */
20009
    PredRegs, DoubleRegs, DoubleRegs, 
20010
    /* A4_boundscheck_lo */
20011
    PredRegs, DoubleRegs, DoubleRegs, 
20012
    /* A4_cmpbeq */
20013
    PredRegs, IntRegs, IntRegs, 
20014
    /* A4_cmpbeqi */
20015
    PredRegs, IntRegs, u8_0Imm, 
20016
    /* A4_cmpbgt */
20017
    PredRegs, IntRegs, IntRegs, 
20018
    /* A4_cmpbgti */
20019
    PredRegs, IntRegs, s8_0Imm, 
20020
    /* A4_cmpbgtu */
20021
    PredRegs, IntRegs, IntRegs, 
20022
    /* A4_cmpbgtui */
20023
    PredRegs, IntRegs, u32_0Imm, 
20024
    /* A4_cmpheq */
20025
    PredRegs, IntRegs, IntRegs, 
20026
    /* A4_cmpheqi */
20027
    PredRegs, IntRegs, s32_0Imm, 
20028
    /* A4_cmphgt */
20029
    PredRegs, IntRegs, IntRegs, 
20030
    /* A4_cmphgti */
20031
    PredRegs, IntRegs, s32_0Imm, 
20032
    /* A4_cmphgtu */
20033
    PredRegs, IntRegs, IntRegs, 
20034
    /* A4_cmphgtui */
20035
    PredRegs, IntRegs, u32_0Imm, 
20036
    /* A4_combineii */
20037
    DoubleRegs, s8_0Imm, u32_0Imm, 
20038
    /* A4_combineir */
20039
    DoubleRegs, s32_0Imm, IntRegs, 
20040
    /* A4_combineri */
20041
    DoubleRegs, IntRegs, s32_0Imm, 
20042
    /* A4_cround_ri */
20043
    IntRegs, IntRegs, u5_0Imm, 
20044
    /* A4_cround_rr */
20045
    IntRegs, IntRegs, IntRegs, 
20046
    /* A4_ext */
20047
    u26_6Imm, 
20048
    /* A4_modwrapu */
20049
    IntRegs, IntRegs, IntRegs, 
20050
    /* A4_orn */
20051
    IntRegs, IntRegs, IntRegs, 
20052
    /* A4_ornp */
20053
    DoubleRegs, DoubleRegs, DoubleRegs, 
20054
    /* A4_paslhf */
20055
    IntRegs, PredRegs, IntRegs, 
20056
    /* A4_paslhfnew */
20057
    IntRegs, PredRegs, IntRegs, 
20058
    /* A4_paslht */
20059
    IntRegs, PredRegs, IntRegs, 
20060
    /* A4_paslhtnew */
20061
    IntRegs, PredRegs, IntRegs, 
20062
    /* A4_pasrhf */
20063
    IntRegs, PredRegs, IntRegs, 
20064
    /* A4_pasrhfnew */
20065
    IntRegs, PredRegs, IntRegs, 
20066
    /* A4_pasrht */
20067
    IntRegs, PredRegs, IntRegs, 
20068
    /* A4_pasrhtnew */
20069
    IntRegs, PredRegs, IntRegs, 
20070
    /* A4_psxtbf */
20071
    IntRegs, PredRegs, IntRegs, 
20072
    /* A4_psxtbfnew */
20073
    IntRegs, PredRegs, IntRegs, 
20074
    /* A4_psxtbt */
20075
    IntRegs, PredRegs, IntRegs, 
20076
    /* A4_psxtbtnew */
20077
    IntRegs, PredRegs, IntRegs, 
20078
    /* A4_psxthf */
20079
    IntRegs, PredRegs, IntRegs, 
20080
    /* A4_psxthfnew */
20081
    IntRegs, PredRegs, IntRegs, 
20082
    /* A4_psxtht */
20083
    IntRegs, PredRegs, IntRegs, 
20084
    /* A4_psxthtnew */
20085
    IntRegs, PredRegs, IntRegs, 
20086
    /* A4_pzxtbf */
20087
    IntRegs, PredRegs, IntRegs, 
20088
    /* A4_pzxtbfnew */
20089
    IntRegs, PredRegs, IntRegs, 
20090
    /* A4_pzxtbt */
20091
    IntRegs, PredRegs, IntRegs, 
20092
    /* A4_pzxtbtnew */
20093
    IntRegs, PredRegs, IntRegs, 
20094
    /* A4_pzxthf */
20095
    IntRegs, PredRegs, IntRegs, 
20096
    /* A4_pzxthfnew */
20097
    IntRegs, PredRegs, IntRegs, 
20098
    /* A4_pzxtht */
20099
    IntRegs, PredRegs, IntRegs, 
20100
    /* A4_pzxthtnew */
20101
    IntRegs, PredRegs, IntRegs, 
20102
    /* A4_rcmpeq */
20103
    IntRegs, IntRegs, IntRegs, 
20104
    /* A4_rcmpeqi */
20105
    IntRegs, IntRegs, s32_0Imm, 
20106
    /* A4_rcmpneq */
20107
    IntRegs, IntRegs, IntRegs, 
20108
    /* A4_rcmpneqi */
20109
    IntRegs, IntRegs, s32_0Imm, 
20110
    /* A4_round_ri */
20111
    IntRegs, IntRegs, u5_0Imm, 
20112
    /* A4_round_ri_sat */
20113
    IntRegs, IntRegs, u5_0Imm, 
20114
    /* A4_round_rr */
20115
    IntRegs, IntRegs, IntRegs, 
20116
    /* A4_round_rr_sat */
20117
    IntRegs, IntRegs, IntRegs, 
20118
    /* A4_subp_c */
20119
    DoubleRegs, PredRegs, DoubleRegs, DoubleRegs, PredRegs, 
20120
    /* A4_tfrcpp */
20121
    DoubleRegs, CtrRegs64, 
20122
    /* A4_tfrpcp */
20123
    CtrRegs64, DoubleRegs, 
20124
    /* A4_tlbmatch */
20125
    PredRegs, DoubleRegs, IntRegs, 
20126
    /* A4_vcmpbeq_any */
20127
    PredRegs, DoubleRegs, DoubleRegs, 
20128
    /* A4_vcmpbeqi */
20129
    PredRegs, DoubleRegs, u8_0Imm, 
20130
    /* A4_vcmpbgt */
20131
    PredRegs, DoubleRegs, DoubleRegs, 
20132
    /* A4_vcmpbgti */
20133
    PredRegs, DoubleRegs, s8_0Imm, 
20134
    /* A4_vcmpbgtui */
20135
    PredRegs, DoubleRegs, u7_0Imm, 
20136
    /* A4_vcmpheqi */
20137
    PredRegs, DoubleRegs, s8_0Imm, 
20138
    /* A4_vcmphgti */
20139
    PredRegs, DoubleRegs, s8_0Imm, 
20140
    /* A4_vcmphgtui */
20141
    PredRegs, DoubleRegs, u7_0Imm, 
20142
    /* A4_vcmpweqi */
20143
    PredRegs, DoubleRegs, s8_0Imm, 
20144
    /* A4_vcmpwgti */
20145
    PredRegs, DoubleRegs, s8_0Imm, 
20146
    /* A4_vcmpwgtui */
20147
    PredRegs, DoubleRegs, u7_0Imm, 
20148
    /* A4_vrmaxh */
20149
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
20150
    /* A4_vrmaxuh */
20151
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
20152
    /* A4_vrmaxuw */
20153
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
20154
    /* A4_vrmaxw */
20155
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
20156
    /* A4_vrminh */
20157
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
20158
    /* A4_vrminuh */
20159
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
20160
    /* A4_vrminuw */
20161
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
20162
    /* A4_vrminw */
20163
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
20164
    /* A5_ACS */
20165
    DoubleRegs, PredRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
20166
    /* A5_vaddhubs */
20167
    IntRegs, DoubleRegs, DoubleRegs, 
20168
    /* A6_vcmpbeq_notany */
20169
    PredRegs, DoubleRegs, DoubleRegs, 
20170
    /* A6_vminub_RdP */
20171
    DoubleRegs, PredRegs, DoubleRegs, DoubleRegs, 
20172
    /* A7_clip */
20173
    IntRegs, IntRegs, u5_0Imm, 
20174
    /* A7_croundd_ri */
20175
    DoubleRegs, DoubleRegs, u6_0Imm, 
20176
    /* A7_croundd_rr */
20177
    DoubleRegs, DoubleRegs, IntRegs, 
20178
    /* A7_vclip */
20179
    DoubleRegs, DoubleRegs, u5_0Imm, 
20180
    /* C2_all8 */
20181
    PredRegs, PredRegs, 
20182
    /* C2_and */
20183
    PredRegs, PredRegs, PredRegs, 
20184
    /* C2_andn */
20185
    PredRegs, PredRegs, PredRegs, 
20186
    /* C2_any8 */
20187
    PredRegs, PredRegs, 
20188
    /* C2_bitsclr */
20189
    PredRegs, IntRegs, IntRegs, 
20190
    /* C2_bitsclri */
20191
    PredRegs, IntRegs, u6_0Imm, 
20192
    /* C2_bitsset */
20193
    PredRegs, IntRegs, IntRegs, 
20194
    /* C2_ccombinewf */
20195
    DoubleRegs, PredRegs, IntRegs, IntRegs, 
20196
    /* C2_ccombinewnewf */
20197
    DoubleRegs, PredRegs, IntRegs, IntRegs, 
20198
    /* C2_ccombinewnewt */
20199
    DoubleRegs, PredRegs, IntRegs, IntRegs, 
20200
    /* C2_ccombinewt */
20201
    DoubleRegs, PredRegs, IntRegs, IntRegs, 
20202
    /* C2_cmoveif */
20203
    IntRegs, PredRegs, s32_0Imm, 
20204
    /* C2_cmoveit */
20205
    IntRegs, PredRegs, s32_0Imm, 
20206
    /* C2_cmovenewif */
20207
    IntRegs, PredRegs, s32_0Imm, 
20208
    /* C2_cmovenewit */
20209
    IntRegs, PredRegs, s32_0Imm, 
20210
    /* C2_cmpeq */
20211
    PredRegs, IntRegs, IntRegs, 
20212
    /* C2_cmpeqi */
20213
    PredRegs, IntRegs, s32_0Imm, 
20214
    /* C2_cmpeqp */
20215
    PredRegs, DoubleRegs, DoubleRegs, 
20216
    /* C2_cmpgt */
20217
    PredRegs, IntRegs, IntRegs, 
20218
    /* C2_cmpgti */
20219
    PredRegs, IntRegs, s32_0Imm, 
20220
    /* C2_cmpgtp */
20221
    PredRegs, DoubleRegs, DoubleRegs, 
20222
    /* C2_cmpgtu */
20223
    PredRegs, IntRegs, IntRegs, 
20224
    /* C2_cmpgtui */
20225
    PredRegs, IntRegs, u32_0Imm, 
20226
    /* C2_cmpgtup */
20227
    PredRegs, DoubleRegs, DoubleRegs, 
20228
    /* C2_mask */
20229
    DoubleRegs, PredRegs, 
20230
    /* C2_mux */
20231
    IntRegs, PredRegs, IntRegs, IntRegs, 
20232
    /* C2_muxii */
20233
    IntRegs, PredRegs, s32_0Imm, s8_0Imm, 
20234
    /* C2_muxir */
20235
    IntRegs, PredRegs, IntRegs, s32_0Imm, 
20236
    /* C2_muxri */
20237
    IntRegs, PredRegs, s32_0Imm, IntRegs, 
20238
    /* C2_not */
20239
    PredRegs, PredRegs, 
20240
    /* C2_or */
20241
    PredRegs, PredRegs, PredRegs, 
20242
    /* C2_orn */
20243
    PredRegs, PredRegs, PredRegs, 
20244
    /* C2_tfrpr */
20245
    IntRegs, PredRegs, 
20246
    /* C2_tfrrp */
20247
    PredRegs, IntRegs, 
20248
    /* C2_vitpack */
20249
    IntRegs, PredRegs, PredRegs, 
20250
    /* C2_vmux */
20251
    DoubleRegs, PredRegs, DoubleRegs, DoubleRegs, 
20252
    /* C2_xor */
20253
    PredRegs, PredRegs, PredRegs, 
20254
    /* C4_addipc */
20255
    IntRegs, u32_0Imm, 
20256
    /* C4_and_and */
20257
    PredRegs, PredRegs, PredRegs, PredRegs, 
20258
    /* C4_and_andn */
20259
    PredRegs, PredRegs, PredRegs, PredRegs, 
20260
    /* C4_and_or */
20261
    PredRegs, PredRegs, PredRegs, PredRegs, 
20262
    /* C4_and_orn */
20263
    PredRegs, PredRegs, PredRegs, PredRegs, 
20264
    /* C4_cmplte */
20265
    PredRegs, IntRegs, IntRegs, 
20266
    /* C4_cmpltei */
20267
    PredRegs, IntRegs, s32_0Imm, 
20268
    /* C4_cmplteu */
20269
    PredRegs, IntRegs, IntRegs, 
20270
    /* C4_cmplteui */
20271
    PredRegs, IntRegs, u32_0Imm, 
20272
    /* C4_cmpneq */
20273
    PredRegs, IntRegs, IntRegs, 
20274
    /* C4_cmpneqi */
20275
    PredRegs, IntRegs, s32_0Imm, 
20276
    /* C4_fastcorner9 */
20277
    PredRegs, PredRegs, PredRegs, 
20278
    /* C4_fastcorner9_not */
20279
    PredRegs, PredRegs, PredRegs, 
20280
    /* C4_nbitsclr */
20281
    PredRegs, IntRegs, IntRegs, 
20282
    /* C4_nbitsclri */
20283
    PredRegs, IntRegs, u6_0Imm, 
20284
    /* C4_nbitsset */
20285
    PredRegs, IntRegs, IntRegs, 
20286
    /* C4_or_and */
20287
    PredRegs, PredRegs, PredRegs, PredRegs, 
20288
    /* C4_or_andn */
20289
    PredRegs, PredRegs, PredRegs, PredRegs, 
20290
    /* C4_or_or */
20291
    PredRegs, PredRegs, PredRegs, PredRegs, 
20292
    /* C4_or_orn */
20293
    PredRegs, PredRegs, PredRegs, PredRegs, 
20294
    /* CALLProfile */
20295
    a30_2Imm, 
20296
    /* CONST32 */
20297
    IntRegs, i32imm, 
20298
    /* CONST64 */
20299
    DoubleRegs, i64imm, 
20300
    /* DuplexIClass0 */
20301
    /* DuplexIClass1 */
20302
    /* DuplexIClass2 */
20303
    /* DuplexIClass3 */
20304
    /* DuplexIClass4 */
20305
    /* DuplexIClass5 */
20306
    /* DuplexIClass6 */
20307
    /* DuplexIClass7 */
20308
    /* DuplexIClass8 */
20309
    /* DuplexIClass9 */
20310
    /* DuplexIClassA */
20311
    /* DuplexIClassB */
20312
    /* DuplexIClassC */
20313
    /* DuplexIClassD */
20314
    /* DuplexIClassE */
20315
    /* DuplexIClassF */
20316
    /* EH_RETURN_JMPR */
20317
    IntRegs, 
20318
    /* F2_conv_d2df */
20319
    DoubleRegs, DoubleRegs, 
20320
    /* F2_conv_d2sf */
20321
    IntRegs, DoubleRegs, 
20322
    /* F2_conv_df2d */
20323
    DoubleRegs, DoubleRegs, 
20324
    /* F2_conv_df2d_chop */
20325
    DoubleRegs, DoubleRegs, 
20326
    /* F2_conv_df2sf */
20327
    IntRegs, DoubleRegs, 
20328
    /* F2_conv_df2ud */
20329
    DoubleRegs, DoubleRegs, 
20330
    /* F2_conv_df2ud_chop */
20331
    DoubleRegs, DoubleRegs, 
20332
    /* F2_conv_df2uw */
20333
    IntRegs, DoubleRegs, 
20334
    /* F2_conv_df2uw_chop */
20335
    IntRegs, DoubleRegs, 
20336
    /* F2_conv_df2w */
20337
    IntRegs, DoubleRegs, 
20338
    /* F2_conv_df2w_chop */
20339
    IntRegs, DoubleRegs, 
20340
    /* F2_conv_sf2d */
20341
    DoubleRegs, IntRegs, 
20342
    /* F2_conv_sf2d_chop */
20343
    DoubleRegs, IntRegs, 
20344
    /* F2_conv_sf2df */
20345
    DoubleRegs, IntRegs, 
20346
    /* F2_conv_sf2ud */
20347
    DoubleRegs, IntRegs, 
20348
    /* F2_conv_sf2ud_chop */
20349
    DoubleRegs, IntRegs, 
20350
    /* F2_conv_sf2uw */
20351
    IntRegs, IntRegs, 
20352
    /* F2_conv_sf2uw_chop */
20353
    IntRegs, IntRegs, 
20354
    /* F2_conv_sf2w */
20355
    IntRegs, IntRegs, 
20356
    /* F2_conv_sf2w_chop */
20357
    IntRegs, IntRegs, 
20358
    /* F2_conv_ud2df */
20359
    DoubleRegs, DoubleRegs, 
20360
    /* F2_conv_ud2sf */
20361
    IntRegs, DoubleRegs, 
20362
    /* F2_conv_uw2df */
20363
    DoubleRegs, IntRegs, 
20364
    /* F2_conv_uw2sf */
20365
    IntRegs, IntRegs, 
20366
    /* F2_conv_w2df */
20367
    DoubleRegs, IntRegs, 
20368
    /* F2_conv_w2sf */
20369
    IntRegs, IntRegs, 
20370
    /* F2_dfadd */
20371
    DoubleRegs, DoubleRegs, DoubleRegs, 
20372
    /* F2_dfclass */
20373
    PredRegs, DoubleRegs, u5_0Imm, 
20374
    /* F2_dfcmpeq */
20375
    PredRegs, DoubleRegs, DoubleRegs, 
20376
    /* F2_dfcmpge */
20377
    PredRegs, DoubleRegs, DoubleRegs, 
20378
    /* F2_dfcmpgt */
20379
    PredRegs, DoubleRegs, DoubleRegs, 
20380
    /* F2_dfcmpuo */
20381
    PredRegs, DoubleRegs, DoubleRegs, 
20382
    /* F2_dfimm_n */
20383
    DoubleRegs, u10_0Imm, 
20384
    /* F2_dfimm_p */
20385
    DoubleRegs, u10_0Imm, 
20386
    /* F2_dfmax */
20387
    DoubleRegs, DoubleRegs, DoubleRegs, 
20388
    /* F2_dfmin */
20389
    DoubleRegs, DoubleRegs, DoubleRegs, 
20390
    /* F2_dfmpyfix */
20391
    DoubleRegs, DoubleRegs, DoubleRegs, 
20392
    /* F2_dfmpyhh */
20393
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
20394
    /* F2_dfmpylh */
20395
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
20396
    /* F2_dfmpyll */
20397
    DoubleRegs, DoubleRegs, DoubleRegs, 
20398
    /* F2_dfsub */
20399
    DoubleRegs, DoubleRegs, DoubleRegs, 
20400
    /* F2_sfadd */
20401
    IntRegs, IntRegs, IntRegs, 
20402
    /* F2_sfclass */
20403
    PredRegs, IntRegs, u5_0Imm, 
20404
    /* F2_sfcmpeq */
20405
    PredRegs, IntRegs, IntRegs, 
20406
    /* F2_sfcmpge */
20407
    PredRegs, IntRegs, IntRegs, 
20408
    /* F2_sfcmpgt */
20409
    PredRegs, IntRegs, IntRegs, 
20410
    /* F2_sfcmpuo */
20411
    PredRegs, IntRegs, IntRegs, 
20412
    /* F2_sffixupd */
20413
    IntRegs, IntRegs, IntRegs, 
20414
    /* F2_sffixupn */
20415
    IntRegs, IntRegs, IntRegs, 
20416
    /* F2_sffixupr */
20417
    IntRegs, IntRegs, 
20418
    /* F2_sffma */
20419
    IntRegs, IntRegs, IntRegs, IntRegs, 
20420
    /* F2_sffma_lib */
20421
    IntRegs, IntRegs, IntRegs, IntRegs, 
20422
    /* F2_sffma_sc */
20423
    IntRegs, IntRegs, IntRegs, IntRegs, PredRegs, 
20424
    /* F2_sffms */
20425
    IntRegs, IntRegs, IntRegs, IntRegs, 
20426
    /* F2_sffms_lib */
20427
    IntRegs, IntRegs, IntRegs, IntRegs, 
20428
    /* F2_sfimm_n */
20429
    IntRegs, u10_0Imm, 
20430
    /* F2_sfimm_p */
20431
    IntRegs, u10_0Imm, 
20432
    /* F2_sfinvsqrta */
20433
    IntRegs, PredRegs, IntRegs, 
20434
    /* F2_sfmax */
20435
    IntRegs, IntRegs, IntRegs, 
20436
    /* F2_sfmin */
20437
    IntRegs, IntRegs, IntRegs, 
20438
    /* F2_sfmpy */
20439
    IntRegs, IntRegs, IntRegs, 
20440
    /* F2_sfrecipa */
20441
    IntRegs, PredRegs, IntRegs, IntRegs, 
20442
    /* F2_sfsub */
20443
    IntRegs, IntRegs, IntRegs, 
20444
    /* G4_tfrgcpp */
20445
    DoubleRegs, GuestRegs64, 
20446
    /* G4_tfrgcrr */
20447
    IntRegs, GuestRegs, 
20448
    /* G4_tfrgpcp */
20449
    GuestRegs64, DoubleRegs, 
20450
    /* G4_tfrgrcr */
20451
    GuestRegs, IntRegs, 
20452
    /* HI */
20453
    IntRegs, u16_0Imm, 
20454
    /* J2_call */
20455
    a30_2Imm, 
20456
    /* J2_callf */
20457
    PredRegs, a30_2Imm, 
20458
    /* J2_callr */
20459
    IntRegs, 
20460
    /* J2_callrf */
20461
    PredRegs, IntRegs, 
20462
    /* J2_callrh */
20463
    IntRegs, 
20464
    /* J2_callrt */
20465
    PredRegs, IntRegs, 
20466
    /* J2_callt */
20467
    PredRegs, a30_2Imm, 
20468
    /* J2_jump */
20469
    b30_2Imm, 
20470
    /* J2_jumpf */
20471
    PredRegs, b30_2Imm, 
20472
    /* J2_jumpfnew */
20473
    PredRegs, b30_2Imm, 
20474
    /* J2_jumpfnewpt */
20475
    PredRegs, b30_2Imm, 
20476
    /* J2_jumpfpt */
20477
    PredRegs, b30_2Imm, 
20478
    /* J2_jumpr */
20479
    IntRegs, 
20480
    /* J2_jumprf */
20481
    PredRegs, IntRegs, 
20482
    /* J2_jumprfnew */
20483
    PredRegs, IntRegs, 
20484
    /* J2_jumprfnewpt */
20485
    PredRegs, IntRegs, 
20486
    /* J2_jumprfpt */
20487
    PredRegs, IntRegs, 
20488
    /* J2_jumprgtez */
20489
    IntRegs, b13_2Imm, 
20490
    /* J2_jumprgtezpt */
20491
    IntRegs, b13_2Imm, 
20492
    /* J2_jumprh */
20493
    IntRegs, 
20494
    /* J2_jumprltez */
20495
    IntRegs, b13_2Imm, 
20496
    /* J2_jumprltezpt */
20497
    IntRegs, b13_2Imm, 
20498
    /* J2_jumprnz */
20499
    IntRegs, b13_2Imm, 
20500
    /* J2_jumprnzpt */
20501
    IntRegs, b13_2Imm, 
20502
    /* J2_jumprt */
20503
    PredRegs, IntRegs, 
20504
    /* J2_jumprtnew */
20505
    PredRegs, IntRegs, 
20506
    /* J2_jumprtnewpt */
20507
    PredRegs, IntRegs, 
20508
    /* J2_jumprtpt */
20509
    PredRegs, IntRegs, 
20510
    /* J2_jumprz */
20511
    IntRegs, b13_2Imm, 
20512
    /* J2_jumprzpt */
20513
    IntRegs, b13_2Imm, 
20514
    /* J2_jumpt */
20515
    PredRegs, b30_2Imm, 
20516
    /* J2_jumptnew */
20517
    PredRegs, b30_2Imm, 
20518
    /* J2_jumptnewpt */
20519
    PredRegs, b30_2Imm, 
20520
    /* J2_jumptpt */
20521
    PredRegs, b30_2Imm, 
20522
    /* J2_loop0i */
20523
    b30_2Imm, u10_0Imm, 
20524
    /* J2_loop0iext */
20525
    b30_2Imm, u10_0Imm, 
20526
    /* J2_loop0r */
20527
    b30_2Imm, IntRegs, 
20528
    /* J2_loop0rext */
20529
    b30_2Imm, IntRegs, 
20530
    /* J2_loop1i */
20531
    b30_2Imm, u10_0Imm, 
20532
    /* J2_loop1iext */
20533
    b30_2Imm, u10_0Imm, 
20534
    /* J2_loop1r */
20535
    b30_2Imm, IntRegs, 
20536
    /* J2_loop1rext */
20537
    b30_2Imm, IntRegs, 
20538
    /* J2_pause */
20539
    u10_0Imm, 
20540
    /* J2_ploop1si */
20541
    b30_2Imm, u10_0Imm, 
20542
    /* J2_ploop1sr */
20543
    b30_2Imm, IntRegs, 
20544
    /* J2_ploop2si */
20545
    b30_2Imm, u10_0Imm, 
20546
    /* J2_ploop2sr */
20547
    b30_2Imm, IntRegs, 
20548
    /* J2_ploop3si */
20549
    b30_2Imm, u10_0Imm, 
20550
    /* J2_ploop3sr */
20551
    b30_2Imm, IntRegs, 
20552
    /* J2_rte */
20553
    /* J2_trap0 */
20554
    u8_0Imm, 
20555
    /* J2_trap1 */
20556
    IntRegs, IntRegs, u8_0Imm, 
20557
    /* J2_unpause */
20558
    /* J4_cmpeq_f_jumpnv_nt */
20559
    IntRegs, IntRegs, b30_2Imm, 
20560
    /* J4_cmpeq_f_jumpnv_t */
20561
    IntRegs, IntRegs, b30_2Imm, 
20562
    /* J4_cmpeq_fp0_jump_nt */
20563
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20564
    /* J4_cmpeq_fp0_jump_t */
20565
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20566
    /* J4_cmpeq_fp1_jump_nt */
20567
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20568
    /* J4_cmpeq_fp1_jump_t */
20569
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20570
    /* J4_cmpeq_t_jumpnv_nt */
20571
    IntRegs, IntRegs, b30_2Imm, 
20572
    /* J4_cmpeq_t_jumpnv_t */
20573
    IntRegs, IntRegs, b30_2Imm, 
20574
    /* J4_cmpeq_tp0_jump_nt */
20575
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20576
    /* J4_cmpeq_tp0_jump_t */
20577
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20578
    /* J4_cmpeq_tp1_jump_nt */
20579
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20580
    /* J4_cmpeq_tp1_jump_t */
20581
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20582
    /* J4_cmpeqi_f_jumpnv_nt */
20583
    IntRegs, u5_0Imm, b30_2Imm, 
20584
    /* J4_cmpeqi_f_jumpnv_t */
20585
    IntRegs, u5_0Imm, b30_2Imm, 
20586
    /* J4_cmpeqi_fp0_jump_nt */
20587
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20588
    /* J4_cmpeqi_fp0_jump_t */
20589
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20590
    /* J4_cmpeqi_fp1_jump_nt */
20591
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20592
    /* J4_cmpeqi_fp1_jump_t */
20593
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20594
    /* J4_cmpeqi_t_jumpnv_nt */
20595
    IntRegs, u5_0Imm, b30_2Imm, 
20596
    /* J4_cmpeqi_t_jumpnv_t */
20597
    IntRegs, u5_0Imm, b30_2Imm, 
20598
    /* J4_cmpeqi_tp0_jump_nt */
20599
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20600
    /* J4_cmpeqi_tp0_jump_t */
20601
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20602
    /* J4_cmpeqi_tp1_jump_nt */
20603
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20604
    /* J4_cmpeqi_tp1_jump_t */
20605
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20606
    /* J4_cmpeqn1_f_jumpnv_nt */
20607
    IntRegs, n1Const, b30_2Imm, 
20608
    /* J4_cmpeqn1_f_jumpnv_t */
20609
    IntRegs, n1Const, b30_2Imm, 
20610
    /* J4_cmpeqn1_fp0_jump_nt */
20611
    GeneralSubRegs, n1Const, b30_2Imm, 
20612
    /* J4_cmpeqn1_fp0_jump_t */
20613
    GeneralSubRegs, n1Const, b30_2Imm, 
20614
    /* J4_cmpeqn1_fp1_jump_nt */
20615
    GeneralSubRegs, n1Const, b30_2Imm, 
20616
    /* J4_cmpeqn1_fp1_jump_t */
20617
    GeneralSubRegs, n1Const, b30_2Imm, 
20618
    /* J4_cmpeqn1_t_jumpnv_nt */
20619
    IntRegs, n1Const, b30_2Imm, 
20620
    /* J4_cmpeqn1_t_jumpnv_t */
20621
    IntRegs, n1Const, b30_2Imm, 
20622
    /* J4_cmpeqn1_tp0_jump_nt */
20623
    GeneralSubRegs, n1Const, b30_2Imm, 
20624
    /* J4_cmpeqn1_tp0_jump_t */
20625
    GeneralSubRegs, n1Const, b30_2Imm, 
20626
    /* J4_cmpeqn1_tp1_jump_nt */
20627
    GeneralSubRegs, n1Const, b30_2Imm, 
20628
    /* J4_cmpeqn1_tp1_jump_t */
20629
    GeneralSubRegs, n1Const, b30_2Imm, 
20630
    /* J4_cmpgt_f_jumpnv_nt */
20631
    IntRegs, IntRegs, b30_2Imm, 
20632
    /* J4_cmpgt_f_jumpnv_t */
20633
    IntRegs, IntRegs, b30_2Imm, 
20634
    /* J4_cmpgt_fp0_jump_nt */
20635
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20636
    /* J4_cmpgt_fp0_jump_t */
20637
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20638
    /* J4_cmpgt_fp1_jump_nt */
20639
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20640
    /* J4_cmpgt_fp1_jump_t */
20641
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20642
    /* J4_cmpgt_t_jumpnv_nt */
20643
    IntRegs, IntRegs, b30_2Imm, 
20644
    /* J4_cmpgt_t_jumpnv_t */
20645
    IntRegs, IntRegs, b30_2Imm, 
20646
    /* J4_cmpgt_tp0_jump_nt */
20647
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20648
    /* J4_cmpgt_tp0_jump_t */
20649
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20650
    /* J4_cmpgt_tp1_jump_nt */
20651
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20652
    /* J4_cmpgt_tp1_jump_t */
20653
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20654
    /* J4_cmpgti_f_jumpnv_nt */
20655
    IntRegs, u5_0Imm, b30_2Imm, 
20656
    /* J4_cmpgti_f_jumpnv_t */
20657
    IntRegs, u5_0Imm, b30_2Imm, 
20658
    /* J4_cmpgti_fp0_jump_nt */
20659
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20660
    /* J4_cmpgti_fp0_jump_t */
20661
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20662
    /* J4_cmpgti_fp1_jump_nt */
20663
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20664
    /* J4_cmpgti_fp1_jump_t */
20665
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20666
    /* J4_cmpgti_t_jumpnv_nt */
20667
    IntRegs, u5_0Imm, b30_2Imm, 
20668
    /* J4_cmpgti_t_jumpnv_t */
20669
    IntRegs, u5_0Imm, b30_2Imm, 
20670
    /* J4_cmpgti_tp0_jump_nt */
20671
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20672
    /* J4_cmpgti_tp0_jump_t */
20673
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20674
    /* J4_cmpgti_tp1_jump_nt */
20675
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20676
    /* J4_cmpgti_tp1_jump_t */
20677
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20678
    /* J4_cmpgtn1_f_jumpnv_nt */
20679
    IntRegs, n1Const, b30_2Imm, 
20680
    /* J4_cmpgtn1_f_jumpnv_t */
20681
    IntRegs, n1Const, b30_2Imm, 
20682
    /* J4_cmpgtn1_fp0_jump_nt */
20683
    GeneralSubRegs, n1Const, b30_2Imm, 
20684
    /* J4_cmpgtn1_fp0_jump_t */
20685
    GeneralSubRegs, n1Const, b30_2Imm, 
20686
    /* J4_cmpgtn1_fp1_jump_nt */
20687
    GeneralSubRegs, n1Const, b30_2Imm, 
20688
    /* J4_cmpgtn1_fp1_jump_t */
20689
    GeneralSubRegs, n1Const, b30_2Imm, 
20690
    /* J4_cmpgtn1_t_jumpnv_nt */
20691
    IntRegs, n1Const, b30_2Imm, 
20692
    /* J4_cmpgtn1_t_jumpnv_t */
20693
    IntRegs, n1Const, b30_2Imm, 
20694
    /* J4_cmpgtn1_tp0_jump_nt */
20695
    GeneralSubRegs, n1Const, b30_2Imm, 
20696
    /* J4_cmpgtn1_tp0_jump_t */
20697
    GeneralSubRegs, n1Const, b30_2Imm, 
20698
    /* J4_cmpgtn1_tp1_jump_nt */
20699
    GeneralSubRegs, n1Const, b30_2Imm, 
20700
    /* J4_cmpgtn1_tp1_jump_t */
20701
    GeneralSubRegs, n1Const, b30_2Imm, 
20702
    /* J4_cmpgtu_f_jumpnv_nt */
20703
    IntRegs, IntRegs, b30_2Imm, 
20704
    /* J4_cmpgtu_f_jumpnv_t */
20705
    IntRegs, IntRegs, b30_2Imm, 
20706
    /* J4_cmpgtu_fp0_jump_nt */
20707
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20708
    /* J4_cmpgtu_fp0_jump_t */
20709
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20710
    /* J4_cmpgtu_fp1_jump_nt */
20711
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20712
    /* J4_cmpgtu_fp1_jump_t */
20713
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20714
    /* J4_cmpgtu_t_jumpnv_nt */
20715
    IntRegs, IntRegs, b30_2Imm, 
20716
    /* J4_cmpgtu_t_jumpnv_t */
20717
    IntRegs, IntRegs, b30_2Imm, 
20718
    /* J4_cmpgtu_tp0_jump_nt */
20719
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20720
    /* J4_cmpgtu_tp0_jump_t */
20721
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20722
    /* J4_cmpgtu_tp1_jump_nt */
20723
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20724
    /* J4_cmpgtu_tp1_jump_t */
20725
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20726
    /* J4_cmpgtui_f_jumpnv_nt */
20727
    IntRegs, u5_0Imm, b30_2Imm, 
20728
    /* J4_cmpgtui_f_jumpnv_t */
20729
    IntRegs, u5_0Imm, b30_2Imm, 
20730
    /* J4_cmpgtui_fp0_jump_nt */
20731
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20732
    /* J4_cmpgtui_fp0_jump_t */
20733
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20734
    /* J4_cmpgtui_fp1_jump_nt */
20735
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20736
    /* J4_cmpgtui_fp1_jump_t */
20737
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20738
    /* J4_cmpgtui_t_jumpnv_nt */
20739
    IntRegs, u5_0Imm, b30_2Imm, 
20740
    /* J4_cmpgtui_t_jumpnv_t */
20741
    IntRegs, u5_0Imm, b30_2Imm, 
20742
    /* J4_cmpgtui_tp0_jump_nt */
20743
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20744
    /* J4_cmpgtui_tp0_jump_t */
20745
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20746
    /* J4_cmpgtui_tp1_jump_nt */
20747
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20748
    /* J4_cmpgtui_tp1_jump_t */
20749
    GeneralSubRegs, u5_0Imm, b30_2Imm, 
20750
    /* J4_cmplt_f_jumpnv_nt */
20751
    IntRegs, IntRegs, b30_2Imm, 
20752
    /* J4_cmplt_f_jumpnv_t */
20753
    IntRegs, IntRegs, b30_2Imm, 
20754
    /* J4_cmplt_t_jumpnv_nt */
20755
    IntRegs, IntRegs, b30_2Imm, 
20756
    /* J4_cmplt_t_jumpnv_t */
20757
    IntRegs, IntRegs, b30_2Imm, 
20758
    /* J4_cmpltu_f_jumpnv_nt */
20759
    IntRegs, IntRegs, b30_2Imm, 
20760
    /* J4_cmpltu_f_jumpnv_t */
20761
    IntRegs, IntRegs, b30_2Imm, 
20762
    /* J4_cmpltu_t_jumpnv_nt */
20763
    IntRegs, IntRegs, b30_2Imm, 
20764
    /* J4_cmpltu_t_jumpnv_t */
20765
    IntRegs, IntRegs, b30_2Imm, 
20766
    /* J4_hintjumpr */
20767
    IntRegs, 
20768
    /* J4_jumpseti */
20769
    GeneralSubRegs, u6_0Imm, b30_2Imm, 
20770
    /* J4_jumpsetr */
20771
    GeneralSubRegs, GeneralSubRegs, b30_2Imm, 
20772
    /* J4_tstbit0_f_jumpnv_nt */
20773
    IntRegs, b30_2Imm, 
20774
    /* J4_tstbit0_f_jumpnv_t */
20775
    IntRegs, b30_2Imm, 
20776
    /* J4_tstbit0_fp0_jump_nt */
20777
    GeneralSubRegs, b30_2Imm, 
20778
    /* J4_tstbit0_fp0_jump_t */
20779
    GeneralSubRegs, b30_2Imm, 
20780
    /* J4_tstbit0_fp1_jump_nt */
20781
    GeneralSubRegs, b30_2Imm, 
20782
    /* J4_tstbit0_fp1_jump_t */
20783
    GeneralSubRegs, b30_2Imm, 
20784
    /* J4_tstbit0_t_jumpnv_nt */
20785
    IntRegs, b30_2Imm, 
20786
    /* J4_tstbit0_t_jumpnv_t */
20787
    IntRegs, b30_2Imm, 
20788
    /* J4_tstbit0_tp0_jump_nt */
20789
    GeneralSubRegs, b30_2Imm, 
20790
    /* J4_tstbit0_tp0_jump_t */
20791
    GeneralSubRegs, b30_2Imm, 
20792
    /* J4_tstbit0_tp1_jump_nt */
20793
    GeneralSubRegs, b30_2Imm, 
20794
    /* J4_tstbit0_tp1_jump_t */
20795
    GeneralSubRegs, b30_2Imm, 
20796
    /* L2_deallocframe */
20797
    DoubleRegs, IntRegs, 
20798
    /* L2_loadalignb_io */
20799
    DoubleRegs, DoubleRegs, IntRegs, s32_0Imm, 
20800
    /* L2_loadalignb_pbr */
20801
    DoubleRegs, IntRegs, DoubleRegs, IntRegs, ModRegs, 
20802
    /* L2_loadalignb_pci */
20803
    DoubleRegs, IntRegs, DoubleRegs, IntRegs, s4_0Imm, ModRegs, 
20804
    /* L2_loadalignb_pcr */
20805
    DoubleRegs, IntRegs, DoubleRegs, IntRegs, ModRegs, 
20806
    /* L2_loadalignb_pi */
20807
    DoubleRegs, IntRegs, DoubleRegs, IntRegs, s4_0Imm, 
20808
    /* L2_loadalignb_pr */
20809
    DoubleRegs, IntRegs, DoubleRegs, IntRegs, ModRegs, 
20810
    /* L2_loadalignh_io */
20811
    DoubleRegs, DoubleRegs, IntRegs, s31_1Imm, 
20812
    /* L2_loadalignh_pbr */
20813
    DoubleRegs, IntRegs, DoubleRegs, IntRegs, ModRegs, 
20814
    /* L2_loadalignh_pci */
20815
    DoubleRegs, IntRegs, DoubleRegs, IntRegs, s4_1Imm, ModRegs, 
20816
    /* L2_loadalignh_pcr */
20817
    DoubleRegs, IntRegs, DoubleRegs, IntRegs, ModRegs, 
20818
    /* L2_loadalignh_pi */
20819
    DoubleRegs, IntRegs, DoubleRegs, IntRegs, s4_1Imm, 
20820
    /* L2_loadalignh_pr */
20821
    DoubleRegs, IntRegs, DoubleRegs, IntRegs, ModRegs, 
20822
    /* L2_loadbsw2_io */
20823
    IntRegs, IntRegs, s31_1Imm, 
20824
    /* L2_loadbsw2_pbr */
20825
    IntRegs, IntRegs, IntRegs, ModRegs, 
20826
    /* L2_loadbsw2_pci */
20827
    IntRegs, IntRegs, IntRegs, s4_1Imm, ModRegs, 
20828
    /* L2_loadbsw2_pcr */
20829
    IntRegs, IntRegs, IntRegs, ModRegs, 
20830
    /* L2_loadbsw2_pi */
20831
    IntRegs, IntRegs, IntRegs, s4_1Imm, 
20832
    /* L2_loadbsw2_pr */
20833
    IntRegs, IntRegs, IntRegs, ModRegs, 
20834
    /* L2_loadbsw4_io */
20835
    DoubleRegs, IntRegs, s30_2Imm, 
20836
    /* L2_loadbsw4_pbr */
20837
    DoubleRegs, IntRegs, IntRegs, ModRegs, 
20838
    /* L2_loadbsw4_pci */
20839
    DoubleRegs, IntRegs, IntRegs, s4_2Imm, ModRegs, 
20840
    /* L2_loadbsw4_pcr */
20841
    DoubleRegs, IntRegs, IntRegs, ModRegs, 
20842
    /* L2_loadbsw4_pi */
20843
    DoubleRegs, IntRegs, IntRegs, s4_2Imm, 
20844
    /* L2_loadbsw4_pr */
20845
    DoubleRegs, IntRegs, IntRegs, ModRegs, 
20846
    /* L2_loadbzw2_io */
20847
    IntRegs, IntRegs, s31_1Imm, 
20848
    /* L2_loadbzw2_pbr */
20849
    IntRegs, IntRegs, IntRegs, ModRegs, 
20850
    /* L2_loadbzw2_pci */
20851
    IntRegs, IntRegs, IntRegs, s4_1Imm, ModRegs, 
20852
    /* L2_loadbzw2_pcr */
20853
    IntRegs, IntRegs, IntRegs, ModRegs, 
20854
    /* L2_loadbzw2_pi */
20855
    IntRegs, IntRegs, IntRegs, s4_1Imm, 
20856
    /* L2_loadbzw2_pr */
20857
    IntRegs, IntRegs, IntRegs, ModRegs, 
20858
    /* L2_loadbzw4_io */
20859
    DoubleRegs, IntRegs, s30_2Imm, 
20860
    /* L2_loadbzw4_pbr */
20861
    DoubleRegs, IntRegs, IntRegs, ModRegs, 
20862
    /* L2_loadbzw4_pci */
20863
    DoubleRegs, IntRegs, IntRegs, s4_2Imm, ModRegs, 
20864
    /* L2_loadbzw4_pcr */
20865
    DoubleRegs, IntRegs, IntRegs, ModRegs, 
20866
    /* L2_loadbzw4_pi */
20867
    DoubleRegs, IntRegs, IntRegs, s4_2Imm, 
20868
    /* L2_loadbzw4_pr */
20869
    DoubleRegs, IntRegs, IntRegs, ModRegs, 
20870
    /* L2_loadrb_io */
20871
    IntRegs, IntRegs, s32_0Imm, 
20872
    /* L2_loadrb_pbr */
20873
    IntRegs, IntRegs, IntRegs, ModRegs, 
20874
    /* L2_loadrb_pci */
20875
    IntRegs, IntRegs, IntRegs, s4_0Imm, ModRegs, 
20876
    /* L2_loadrb_pcr */
20877
    IntRegs, IntRegs, IntRegs, ModRegs, 
20878
    /* L2_loadrb_pi */
20879
    IntRegs, IntRegs, IntRegs, s4_0Imm, 
20880
    /* L2_loadrb_pr */
20881
    IntRegs, IntRegs, IntRegs, ModRegs, 
20882
    /* L2_loadrbgp */
20883
    IntRegs, u32_0Imm, 
20884
    /* L2_loadrd_io */
20885
    DoubleRegs, IntRegs, s29_3Imm, 
20886
    /* L2_loadrd_pbr */
20887
    DoubleRegs, IntRegs, IntRegs, ModRegs, 
20888
    /* L2_loadrd_pci */
20889
    DoubleRegs, IntRegs, IntRegs, s4_3Imm, ModRegs, 
20890
    /* L2_loadrd_pcr */
20891
    DoubleRegs, IntRegs, IntRegs, ModRegs, 
20892
    /* L2_loadrd_pi */
20893
    DoubleRegs, IntRegs, IntRegs, s4_3Imm, 
20894
    /* L2_loadrd_pr */
20895
    DoubleRegs, IntRegs, IntRegs, ModRegs, 
20896
    /* L2_loadrdgp */
20897
    DoubleRegs, u29_3Imm, 
20898
    /* L2_loadrh_io */
20899
    IntRegs, IntRegs, s31_1Imm, 
20900
    /* L2_loadrh_pbr */
20901
    IntRegs, IntRegs, IntRegs, ModRegs, 
20902
    /* L2_loadrh_pci */
20903
    IntRegs, IntRegs, IntRegs, s4_1Imm, ModRegs, 
20904
    /* L2_loadrh_pcr */
20905
    IntRegs, IntRegs, IntRegs, ModRegs, 
20906
    /* L2_loadrh_pi */
20907
    IntRegs, IntRegs, IntRegs, s4_1Imm, 
20908
    /* L2_loadrh_pr */
20909
    IntRegs, IntRegs, IntRegs, ModRegs, 
20910
    /* L2_loadrhgp */
20911
    IntRegs, u31_1Imm, 
20912
    /* L2_loadri_io */
20913
    IntRegs, IntRegs, s30_2Imm, 
20914
    /* L2_loadri_pbr */
20915
    IntRegs, IntRegs, IntRegs, ModRegs, 
20916
    /* L2_loadri_pci */
20917
    IntRegs, IntRegs, IntRegs, s4_2Imm, ModRegs, 
20918
    /* L2_loadri_pcr */
20919
    IntRegs, IntRegs, IntRegs, ModRegs, 
20920
    /* L2_loadri_pi */
20921
    IntRegs, IntRegs, IntRegs, s4_2Imm, 
20922
    /* L2_loadri_pr */
20923
    IntRegs, IntRegs, IntRegs, ModRegs, 
20924
    /* L2_loadrigp */
20925
    IntRegs, u30_2Imm, 
20926
    /* L2_loadrub_io */
20927
    IntRegs, IntRegs, s32_0Imm, 
20928
    /* L2_loadrub_pbr */
20929
    IntRegs, IntRegs, IntRegs, ModRegs, 
20930
    /* L2_loadrub_pci */
20931
    IntRegs, IntRegs, IntRegs, s4_0Imm, ModRegs, 
20932
    /* L2_loadrub_pcr */
20933
    IntRegs, IntRegs, IntRegs, ModRegs, 
20934
    /* L2_loadrub_pi */
20935
    IntRegs, IntRegs, IntRegs, s4_0Imm, 
20936
    /* L2_loadrub_pr */
20937
    IntRegs, IntRegs, IntRegs, ModRegs, 
20938
    /* L2_loadrubgp */
20939
    IntRegs, u32_0Imm, 
20940
    /* L2_loadruh_io */
20941
    IntRegs, IntRegs, s31_1Imm, 
20942
    /* L2_loadruh_pbr */
20943
    IntRegs, IntRegs, IntRegs, ModRegs, 
20944
    /* L2_loadruh_pci */
20945
    IntRegs, IntRegs, IntRegs, s4_1Imm, ModRegs, 
20946
    /* L2_loadruh_pcr */
20947
    IntRegs, IntRegs, IntRegs, ModRegs, 
20948
    /* L2_loadruh_pi */
20949
    IntRegs, IntRegs, IntRegs, s4_1Imm, 
20950
    /* L2_loadruh_pr */
20951
    IntRegs, IntRegs, IntRegs, ModRegs, 
20952
    /* L2_loadruhgp */
20953
    IntRegs, u31_1Imm, 
20954
    /* L2_loadw_aq */
20955
    IntRegs, IntRegs, 
20956
    /* L2_loadw_locked */
20957
    IntRegs, IntRegs, 
20958
    /* L2_ploadrbf_io */
20959
    IntRegs, PredRegs, IntRegs, u32_0Imm, 
20960
    /* L2_ploadrbf_pi */
20961
    IntRegs, IntRegs, PredRegs, IntRegs, s4_0Imm, 
20962
    /* L2_ploadrbfnew_io */
20963
    IntRegs, PredRegs, IntRegs, u32_0Imm, 
20964
    /* L2_ploadrbfnew_pi */
20965
    IntRegs, IntRegs, PredRegs, IntRegs, s4_0Imm, 
20966
    /* L2_ploadrbt_io */
20967
    IntRegs, PredRegs, IntRegs, u32_0Imm, 
20968
    /* L2_ploadrbt_pi */
20969
    IntRegs, IntRegs, PredRegs, IntRegs, s4_0Imm, 
20970
    /* L2_ploadrbtnew_io */
20971
    IntRegs, PredRegs, IntRegs, u32_0Imm, 
20972
    /* L2_ploadrbtnew_pi */
20973
    IntRegs, IntRegs, PredRegs, IntRegs, s4_0Imm, 
20974
    /* L2_ploadrdf_io */
20975
    DoubleRegs, PredRegs, IntRegs, u29_3Imm, 
20976
    /* L2_ploadrdf_pi */
20977
    DoubleRegs, IntRegs, PredRegs, IntRegs, s4_3Imm, 
20978
    /* L2_ploadrdfnew_io */
20979
    DoubleRegs, PredRegs, IntRegs, u29_3Imm, 
20980
    /* L2_ploadrdfnew_pi */
20981
    DoubleRegs, IntRegs, PredRegs, IntRegs, s4_3Imm, 
20982
    /* L2_ploadrdt_io */
20983
    DoubleRegs, PredRegs, IntRegs, u29_3Imm, 
20984
    /* L2_ploadrdt_pi */
20985
    DoubleRegs, IntRegs, PredRegs, IntRegs, s4_3Imm, 
20986
    /* L2_ploadrdtnew_io */
20987
    DoubleRegs, PredRegs, IntRegs, u29_3Imm, 
20988
    /* L2_ploadrdtnew_pi */
20989
    DoubleRegs, IntRegs, PredRegs, IntRegs, s4_3Imm, 
20990
    /* L2_ploadrhf_io */
20991
    IntRegs, PredRegs, IntRegs, u31_1Imm, 
20992
    /* L2_ploadrhf_pi */
20993
    IntRegs, IntRegs, PredRegs, IntRegs, s4_1Imm, 
20994
    /* L2_ploadrhfnew_io */
20995
    IntRegs, PredRegs, IntRegs, u31_1Imm, 
20996
    /* L2_ploadrhfnew_pi */
20997
    IntRegs, IntRegs, PredRegs, IntRegs, s4_1Imm, 
20998
    /* L2_ploadrht_io */
20999
    IntRegs, PredRegs, IntRegs, u31_1Imm, 
21000
    /* L2_ploadrht_pi */
21001
    IntRegs, IntRegs, PredRegs, IntRegs, s4_1Imm, 
21002
    /* L2_ploadrhtnew_io */
21003
    IntRegs, PredRegs, IntRegs, u31_1Imm, 
21004
    /* L2_ploadrhtnew_pi */
21005
    IntRegs, IntRegs, PredRegs, IntRegs, s4_1Imm, 
21006
    /* L2_ploadrif_io */
21007
    IntRegs, PredRegs, IntRegs, u30_2Imm, 
21008
    /* L2_ploadrif_pi */
21009
    IntRegs, IntRegs, PredRegs, IntRegs, s4_2Imm, 
21010
    /* L2_ploadrifnew_io */
21011
    IntRegs, PredRegs, IntRegs, u30_2Imm, 
21012
    /* L2_ploadrifnew_pi */
21013
    IntRegs, IntRegs, PredRegs, IntRegs, s4_2Imm, 
21014
    /* L2_ploadrit_io */
21015
    IntRegs, PredRegs, IntRegs, u30_2Imm, 
21016
    /* L2_ploadrit_pi */
21017
    IntRegs, IntRegs, PredRegs, IntRegs, s4_2Imm, 
21018
    /* L2_ploadritnew_io */
21019
    IntRegs, PredRegs, IntRegs, u30_2Imm, 
21020
    /* L2_ploadritnew_pi */
21021
    IntRegs, IntRegs, PredRegs, IntRegs, s4_2Imm, 
21022
    /* L2_ploadrubf_io */
21023
    IntRegs, PredRegs, IntRegs, u32_0Imm, 
21024
    /* L2_ploadrubf_pi */
21025
    IntRegs, IntRegs, PredRegs, IntRegs, s4_0Imm, 
21026
    /* L2_ploadrubfnew_io */
21027
    IntRegs, PredRegs, IntRegs, u32_0Imm, 
21028
    /* L2_ploadrubfnew_pi */
21029
    IntRegs, IntRegs, PredRegs, IntRegs, s4_0Imm, 
21030
    /* L2_ploadrubt_io */
21031
    IntRegs, PredRegs, IntRegs, u32_0Imm, 
21032
    /* L2_ploadrubt_pi */
21033
    IntRegs, IntRegs, PredRegs, IntRegs, s4_0Imm, 
21034
    /* L2_ploadrubtnew_io */
21035
    IntRegs, PredRegs, IntRegs, u32_0Imm, 
21036
    /* L2_ploadrubtnew_pi */
21037
    IntRegs, IntRegs, PredRegs, IntRegs, s4_0Imm, 
21038
    /* L2_ploadruhf_io */
21039
    IntRegs, PredRegs, IntRegs, u31_1Imm, 
21040
    /* L2_ploadruhf_pi */
21041
    IntRegs, IntRegs, PredRegs, IntRegs, s4_1Imm, 
21042
    /* L2_ploadruhfnew_io */
21043
    IntRegs, PredRegs, IntRegs, u31_1Imm, 
21044
    /* L2_ploadruhfnew_pi */
21045
    IntRegs, IntRegs, PredRegs, IntRegs, s4_1Imm, 
21046
    /* L2_ploadruht_io */
21047
    IntRegs, PredRegs, IntRegs, u31_1Imm, 
21048
    /* L2_ploadruht_pi */
21049
    IntRegs, IntRegs, PredRegs, IntRegs, s4_1Imm, 
21050
    /* L2_ploadruhtnew_io */
21051
    IntRegs, PredRegs, IntRegs, u31_1Imm, 
21052
    /* L2_ploadruhtnew_pi */
21053
    IntRegs, IntRegs, PredRegs, IntRegs, s4_1Imm, 
21054
    /* L4_add_memopb_io */
21055
    IntRegs, u32_0Imm, IntRegs, 
21056
    /* L4_add_memoph_io */
21057
    IntRegs, u31_1Imm, IntRegs, 
21058
    /* L4_add_memopw_io */
21059
    IntRegs, u30_2Imm, IntRegs, 
21060
    /* L4_and_memopb_io */
21061
    IntRegs, u32_0Imm, IntRegs, 
21062
    /* L4_and_memoph_io */
21063
    IntRegs, u31_1Imm, IntRegs, 
21064
    /* L4_and_memopw_io */
21065
    IntRegs, u30_2Imm, IntRegs, 
21066
    /* L4_iadd_memopb_io */
21067
    IntRegs, u32_0Imm, u5_0Imm, 
21068
    /* L4_iadd_memoph_io */
21069
    IntRegs, u31_1Imm, u5_0Imm, 
21070
    /* L4_iadd_memopw_io */
21071
    IntRegs, u30_2Imm, u5_0Imm, 
21072
    /* L4_iand_memopb_io */
21073
    IntRegs, u32_0Imm, u5_0Imm, 
21074
    /* L4_iand_memoph_io */
21075
    IntRegs, u31_1Imm, u5_0Imm, 
21076
    /* L4_iand_memopw_io */
21077
    IntRegs, u30_2Imm, u5_0Imm, 
21078
    /* L4_ior_memopb_io */
21079
    IntRegs, u32_0Imm, u5_0Imm, 
21080
    /* L4_ior_memoph_io */
21081
    IntRegs, u31_1Imm, u5_0Imm, 
21082
    /* L4_ior_memopw_io */
21083
    IntRegs, u30_2Imm, u5_0Imm, 
21084
    /* L4_isub_memopb_io */
21085
    IntRegs, u32_0Imm, u5_0Imm, 
21086
    /* L4_isub_memoph_io */
21087
    IntRegs, u31_1Imm, u5_0Imm, 
21088
    /* L4_isub_memopw_io */
21089
    IntRegs, u30_2Imm, u5_0Imm, 
21090
    /* L4_loadalignb_ap */
21091
    DoubleRegs, IntRegs, DoubleRegs, u32_0Imm, 
21092
    /* L4_loadalignb_ur */
21093
    DoubleRegs, DoubleRegs, IntRegs, u2_0Imm, u32_0Imm, 
21094
    /* L4_loadalignh_ap */
21095
    DoubleRegs, IntRegs, DoubleRegs, u32_0Imm, 
21096
    /* L4_loadalignh_ur */
21097
    DoubleRegs, DoubleRegs, IntRegs, u2_0Imm, u32_0Imm, 
21098
    /* L4_loadbsw2_ap */
21099
    IntRegs, IntRegs, u32_0Imm, 
21100
    /* L4_loadbsw2_ur */
21101
    IntRegs, IntRegs, u2_0Imm, u32_0Imm, 
21102
    /* L4_loadbsw4_ap */
21103
    DoubleRegs, IntRegs, u32_0Imm, 
21104
    /* L4_loadbsw4_ur */
21105
    DoubleRegs, IntRegs, u2_0Imm, u32_0Imm, 
21106
    /* L4_loadbzw2_ap */
21107
    IntRegs, IntRegs, u32_0Imm, 
21108
    /* L4_loadbzw2_ur */
21109
    IntRegs, IntRegs, u2_0Imm, u32_0Imm, 
21110
    /* L4_loadbzw4_ap */
21111
    DoubleRegs, IntRegs, u32_0Imm, 
21112
    /* L4_loadbzw4_ur */
21113
    DoubleRegs, IntRegs, u2_0Imm, u32_0Imm, 
21114
    /* L4_loadd_aq */
21115
    DoubleRegs, IntRegs, 
21116
    /* L4_loadd_locked */
21117
    DoubleRegs, IntRegs, 
21118
    /* L4_loadrb_ap */
21119
    IntRegs, IntRegs, u32_0Imm, 
21120
    /* L4_loadrb_rr */
21121
    IntRegs, IntRegs, IntRegs, u2_0Imm, 
21122
    /* L4_loadrb_ur */
21123
    IntRegs, IntRegs, u2_0Imm, u32_0Imm, 
21124
    /* L4_loadrd_ap */
21125
    DoubleRegs, IntRegs, u32_0Imm, 
21126
    /* L4_loadrd_rr */
21127
    DoubleRegs, IntRegs, IntRegs, u2_0Imm, 
21128
    /* L4_loadrd_ur */
21129
    DoubleRegs, IntRegs, u2_0Imm, u32_0Imm, 
21130
    /* L4_loadrh_ap */
21131
    IntRegs, IntRegs, u32_0Imm, 
21132
    /* L4_loadrh_rr */
21133
    IntRegs, IntRegs, IntRegs, u2_0Imm, 
21134
    /* L4_loadrh_ur */
21135
    IntRegs, IntRegs, u2_0Imm, u32_0Imm, 
21136
    /* L4_loadri_ap */
21137
    IntRegs, IntRegs, u32_0Imm, 
21138
    /* L4_loadri_rr */
21139
    IntRegs, IntRegs, IntRegs, u2_0Imm, 
21140
    /* L4_loadri_ur */
21141
    IntRegs, IntRegs, u2_0Imm, u32_0Imm, 
21142
    /* L4_loadrub_ap */
21143
    IntRegs, IntRegs, u32_0Imm, 
21144
    /* L4_loadrub_rr */
21145
    IntRegs, IntRegs, IntRegs, u2_0Imm, 
21146
    /* L4_loadrub_ur */
21147
    IntRegs, IntRegs, u2_0Imm, u32_0Imm, 
21148
    /* L4_loadruh_ap */
21149
    IntRegs, IntRegs, u32_0Imm, 
21150
    /* L4_loadruh_rr */
21151
    IntRegs, IntRegs, IntRegs, u2_0Imm, 
21152
    /* L4_loadruh_ur */
21153
    IntRegs, IntRegs, u2_0Imm, u32_0Imm, 
21154
    /* L4_loadw_phys */
21155
    IntRegs, IntRegs, IntRegs, 
21156
    /* L4_or_memopb_io */
21157
    IntRegs, u32_0Imm, IntRegs, 
21158
    /* L4_or_memoph_io */
21159
    IntRegs, u31_1Imm, IntRegs, 
21160
    /* L4_or_memopw_io */
21161
    IntRegs, u30_2Imm, IntRegs, 
21162
    /* L4_ploadrbf_abs */
21163
    IntRegs, PredRegs, u32_0Imm, 
21164
    /* L4_ploadrbf_rr */
21165
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21166
    /* L4_ploadrbfnew_abs */
21167
    IntRegs, PredRegs, u32_0Imm, 
21168
    /* L4_ploadrbfnew_rr */
21169
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21170
    /* L4_ploadrbt_abs */
21171
    IntRegs, PredRegs, u32_0Imm, 
21172
    /* L4_ploadrbt_rr */
21173
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21174
    /* L4_ploadrbtnew_abs */
21175
    IntRegs, PredRegs, u32_0Imm, 
21176
    /* L4_ploadrbtnew_rr */
21177
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21178
    /* L4_ploadrdf_abs */
21179
    DoubleRegs, PredRegs, u32_0Imm, 
21180
    /* L4_ploadrdf_rr */
21181
    DoubleRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21182
    /* L4_ploadrdfnew_abs */
21183
    DoubleRegs, PredRegs, u32_0Imm, 
21184
    /* L4_ploadrdfnew_rr */
21185
    DoubleRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21186
    /* L4_ploadrdt_abs */
21187
    DoubleRegs, PredRegs, u32_0Imm, 
21188
    /* L4_ploadrdt_rr */
21189
    DoubleRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21190
    /* L4_ploadrdtnew_abs */
21191
    DoubleRegs, PredRegs, u32_0Imm, 
21192
    /* L4_ploadrdtnew_rr */
21193
    DoubleRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21194
    /* L4_ploadrhf_abs */
21195
    IntRegs, PredRegs, u32_0Imm, 
21196
    /* L4_ploadrhf_rr */
21197
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21198
    /* L4_ploadrhfnew_abs */
21199
    IntRegs, PredRegs, u32_0Imm, 
21200
    /* L4_ploadrhfnew_rr */
21201
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21202
    /* L4_ploadrht_abs */
21203
    IntRegs, PredRegs, u32_0Imm, 
21204
    /* L4_ploadrht_rr */
21205
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21206
    /* L4_ploadrhtnew_abs */
21207
    IntRegs, PredRegs, u32_0Imm, 
21208
    /* L4_ploadrhtnew_rr */
21209
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21210
    /* L4_ploadrif_abs */
21211
    IntRegs, PredRegs, u32_0Imm, 
21212
    /* L4_ploadrif_rr */
21213
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21214
    /* L4_ploadrifnew_abs */
21215
    IntRegs, PredRegs, u32_0Imm, 
21216
    /* L4_ploadrifnew_rr */
21217
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21218
    /* L4_ploadrit_abs */
21219
    IntRegs, PredRegs, u32_0Imm, 
21220
    /* L4_ploadrit_rr */
21221
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21222
    /* L4_ploadritnew_abs */
21223
    IntRegs, PredRegs, u32_0Imm, 
21224
    /* L4_ploadritnew_rr */
21225
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21226
    /* L4_ploadrubf_abs */
21227
    IntRegs, PredRegs, u32_0Imm, 
21228
    /* L4_ploadrubf_rr */
21229
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21230
    /* L4_ploadrubfnew_abs */
21231
    IntRegs, PredRegs, u32_0Imm, 
21232
    /* L4_ploadrubfnew_rr */
21233
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21234
    /* L4_ploadrubt_abs */
21235
    IntRegs, PredRegs, u32_0Imm, 
21236
    /* L4_ploadrubt_rr */
21237
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21238
    /* L4_ploadrubtnew_abs */
21239
    IntRegs, PredRegs, u32_0Imm, 
21240
    /* L4_ploadrubtnew_rr */
21241
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21242
    /* L4_ploadruhf_abs */
21243
    IntRegs, PredRegs, u32_0Imm, 
21244
    /* L4_ploadruhf_rr */
21245
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21246
    /* L4_ploadruhfnew_abs */
21247
    IntRegs, PredRegs, u32_0Imm, 
21248
    /* L4_ploadruhfnew_rr */
21249
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21250
    /* L4_ploadruht_abs */
21251
    IntRegs, PredRegs, u32_0Imm, 
21252
    /* L4_ploadruht_rr */
21253
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21254
    /* L4_ploadruhtnew_abs */
21255
    IntRegs, PredRegs, u32_0Imm, 
21256
    /* L4_ploadruhtnew_rr */
21257
    IntRegs, PredRegs, IntRegs, IntRegs, u2_0Imm, 
21258
    /* L4_return */
21259
    DoubleRegs, IntRegs, 
21260
    /* L4_return_f */
21261
    DoubleRegs, PredRegs, IntRegs, 
21262
    /* L4_return_fnew_pnt */
21263
    DoubleRegs, PredRegs, IntRegs, 
21264
    /* L4_return_fnew_pt */
21265
    DoubleRegs, PredRegs, IntRegs, 
21266
    /* L4_return_t */
21267
    DoubleRegs, PredRegs, IntRegs, 
21268
    /* L4_return_tnew_pnt */
21269
    DoubleRegs, PredRegs, IntRegs, 
21270
    /* L4_return_tnew_pt */
21271
    DoubleRegs, PredRegs, IntRegs, 
21272
    /* L4_sub_memopb_io */
21273
    IntRegs, u32_0Imm, IntRegs, 
21274
    /* L4_sub_memoph_io */
21275
    IntRegs, u31_1Imm, IntRegs, 
21276
    /* L4_sub_memopw_io */
21277
    IntRegs, u30_2Imm, IntRegs, 
21278
    /* L6_memcpy */
21279
    IntRegs, IntRegs, ModRegs, 
21280
    /* LO */
21281
    IntRegs, u16_0Imm, 
21282
    /* M2_acci */
21283
    IntRegs, IntRegs, IntRegs, IntRegs, 
21284
    /* M2_accii */
21285
    IntRegs, IntRegs, IntRegs, s32_0Imm, 
21286
    /* M2_cmaci_s0 */
21287
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21288
    /* M2_cmacr_s0 */
21289
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21290
    /* M2_cmacs_s0 */
21291
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21292
    /* M2_cmacs_s1 */
21293
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21294
    /* M2_cmacsc_s0 */
21295
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21296
    /* M2_cmacsc_s1 */
21297
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21298
    /* M2_cmpyi_s0 */
21299
    DoubleRegs, IntRegs, IntRegs, 
21300
    /* M2_cmpyr_s0 */
21301
    DoubleRegs, IntRegs, IntRegs, 
21302
    /* M2_cmpyrs_s0 */
21303
    IntRegs, IntRegs, IntRegs, 
21304
    /* M2_cmpyrs_s1 */
21305
    IntRegs, IntRegs, IntRegs, 
21306
    /* M2_cmpyrsc_s0 */
21307
    IntRegs, IntRegs, IntRegs, 
21308
    /* M2_cmpyrsc_s1 */
21309
    IntRegs, IntRegs, IntRegs, 
21310
    /* M2_cmpys_s0 */
21311
    DoubleRegs, IntRegs, IntRegs, 
21312
    /* M2_cmpys_s1 */
21313
    DoubleRegs, IntRegs, IntRegs, 
21314
    /* M2_cmpysc_s0 */
21315
    DoubleRegs, IntRegs, IntRegs, 
21316
    /* M2_cmpysc_s1 */
21317
    DoubleRegs, IntRegs, IntRegs, 
21318
    /* M2_cnacs_s0 */
21319
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21320
    /* M2_cnacs_s1 */
21321
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21322
    /* M2_cnacsc_s0 */
21323
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21324
    /* M2_cnacsc_s1 */
21325
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21326
    /* M2_dpmpyss_acc_s0 */
21327
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21328
    /* M2_dpmpyss_nac_s0 */
21329
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21330
    /* M2_dpmpyss_rnd_s0 */
21331
    IntRegs, IntRegs, IntRegs, 
21332
    /* M2_dpmpyss_s0 */
21333
    DoubleRegs, IntRegs, IntRegs, 
21334
    /* M2_dpmpyuu_acc_s0 */
21335
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21336
    /* M2_dpmpyuu_nac_s0 */
21337
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21338
    /* M2_dpmpyuu_s0 */
21339
    DoubleRegs, IntRegs, IntRegs, 
21340
    /* M2_hmmpyh_rs1 */
21341
    IntRegs, IntRegs, IntRegs, 
21342
    /* M2_hmmpyh_s1 */
21343
    IntRegs, IntRegs, IntRegs, 
21344
    /* M2_hmmpyl_rs1 */
21345
    IntRegs, IntRegs, IntRegs, 
21346
    /* M2_hmmpyl_s1 */
21347
    IntRegs, IntRegs, IntRegs, 
21348
    /* M2_maci */
21349
    IntRegs, IntRegs, IntRegs, IntRegs, 
21350
    /* M2_macsin */
21351
    IntRegs, IntRegs, IntRegs, u32_0Imm, 
21352
    /* M2_macsip */
21353
    IntRegs, IntRegs, IntRegs, u32_0Imm, 
21354
    /* M2_mmachs_rs0 */
21355
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21356
    /* M2_mmachs_rs1 */
21357
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21358
    /* M2_mmachs_s0 */
21359
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21360
    /* M2_mmachs_s1 */
21361
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21362
    /* M2_mmacls_rs0 */
21363
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21364
    /* M2_mmacls_rs1 */
21365
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21366
    /* M2_mmacls_s0 */
21367
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21368
    /* M2_mmacls_s1 */
21369
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21370
    /* M2_mmacuhs_rs0 */
21371
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21372
    /* M2_mmacuhs_rs1 */
21373
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21374
    /* M2_mmacuhs_s0 */
21375
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21376
    /* M2_mmacuhs_s1 */
21377
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21378
    /* M2_mmaculs_rs0 */
21379
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21380
    /* M2_mmaculs_rs1 */
21381
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21382
    /* M2_mmaculs_s0 */
21383
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21384
    /* M2_mmaculs_s1 */
21385
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21386
    /* M2_mmpyh_rs0 */
21387
    DoubleRegs, DoubleRegs, DoubleRegs, 
21388
    /* M2_mmpyh_rs1 */
21389
    DoubleRegs, DoubleRegs, DoubleRegs, 
21390
    /* M2_mmpyh_s0 */
21391
    DoubleRegs, DoubleRegs, DoubleRegs, 
21392
    /* M2_mmpyh_s1 */
21393
    DoubleRegs, DoubleRegs, DoubleRegs, 
21394
    /* M2_mmpyl_rs0 */
21395
    DoubleRegs, DoubleRegs, DoubleRegs, 
21396
    /* M2_mmpyl_rs1 */
21397
    DoubleRegs, DoubleRegs, DoubleRegs, 
21398
    /* M2_mmpyl_s0 */
21399
    DoubleRegs, DoubleRegs, DoubleRegs, 
21400
    /* M2_mmpyl_s1 */
21401
    DoubleRegs, DoubleRegs, DoubleRegs, 
21402
    /* M2_mmpyuh_rs0 */
21403
    DoubleRegs, DoubleRegs, DoubleRegs, 
21404
    /* M2_mmpyuh_rs1 */
21405
    DoubleRegs, DoubleRegs, DoubleRegs, 
21406
    /* M2_mmpyuh_s0 */
21407
    DoubleRegs, DoubleRegs, DoubleRegs, 
21408
    /* M2_mmpyuh_s1 */
21409
    DoubleRegs, DoubleRegs, DoubleRegs, 
21410
    /* M2_mmpyul_rs0 */
21411
    DoubleRegs, DoubleRegs, DoubleRegs, 
21412
    /* M2_mmpyul_rs1 */
21413
    DoubleRegs, DoubleRegs, DoubleRegs, 
21414
    /* M2_mmpyul_s0 */
21415
    DoubleRegs, DoubleRegs, DoubleRegs, 
21416
    /* M2_mmpyul_s1 */
21417
    DoubleRegs, DoubleRegs, DoubleRegs, 
21418
    /* M2_mnaci */
21419
    IntRegs, IntRegs, IntRegs, IntRegs, 
21420
    /* M2_mpy_acc_hh_s0 */
21421
    IntRegs, IntRegs, IntRegs, IntRegs, 
21422
    /* M2_mpy_acc_hh_s1 */
21423
    IntRegs, IntRegs, IntRegs, IntRegs, 
21424
    /* M2_mpy_acc_hl_s0 */
21425
    IntRegs, IntRegs, IntRegs, IntRegs, 
21426
    /* M2_mpy_acc_hl_s1 */
21427
    IntRegs, IntRegs, IntRegs, IntRegs, 
21428
    /* M2_mpy_acc_lh_s0 */
21429
    IntRegs, IntRegs, IntRegs, IntRegs, 
21430
    /* M2_mpy_acc_lh_s1 */
21431
    IntRegs, IntRegs, IntRegs, IntRegs, 
21432
    /* M2_mpy_acc_ll_s0 */
21433
    IntRegs, IntRegs, IntRegs, IntRegs, 
21434
    /* M2_mpy_acc_ll_s1 */
21435
    IntRegs, IntRegs, IntRegs, IntRegs, 
21436
    /* M2_mpy_acc_sat_hh_s0 */
21437
    IntRegs, IntRegs, IntRegs, IntRegs, 
21438
    /* M2_mpy_acc_sat_hh_s1 */
21439
    IntRegs, IntRegs, IntRegs, IntRegs, 
21440
    /* M2_mpy_acc_sat_hl_s0 */
21441
    IntRegs, IntRegs, IntRegs, IntRegs, 
21442
    /* M2_mpy_acc_sat_hl_s1 */
21443
    IntRegs, IntRegs, IntRegs, IntRegs, 
21444
    /* M2_mpy_acc_sat_lh_s0 */
21445
    IntRegs, IntRegs, IntRegs, IntRegs, 
21446
    /* M2_mpy_acc_sat_lh_s1 */
21447
    IntRegs, IntRegs, IntRegs, IntRegs, 
21448
    /* M2_mpy_acc_sat_ll_s0 */
21449
    IntRegs, IntRegs, IntRegs, IntRegs, 
21450
    /* M2_mpy_acc_sat_ll_s1 */
21451
    IntRegs, IntRegs, IntRegs, IntRegs, 
21452
    /* M2_mpy_hh_s0 */
21453
    IntRegs, IntRegs, IntRegs, 
21454
    /* M2_mpy_hh_s1 */
21455
    IntRegs, IntRegs, IntRegs, 
21456
    /* M2_mpy_hl_s0 */
21457
    IntRegs, IntRegs, IntRegs, 
21458
    /* M2_mpy_hl_s1 */
21459
    IntRegs, IntRegs, IntRegs, 
21460
    /* M2_mpy_lh_s0 */
21461
    IntRegs, IntRegs, IntRegs, 
21462
    /* M2_mpy_lh_s1 */
21463
    IntRegs, IntRegs, IntRegs, 
21464
    /* M2_mpy_ll_s0 */
21465
    IntRegs, IntRegs, IntRegs, 
21466
    /* M2_mpy_ll_s1 */
21467
    IntRegs, IntRegs, IntRegs, 
21468
    /* M2_mpy_nac_hh_s0 */
21469
    IntRegs, IntRegs, IntRegs, IntRegs, 
21470
    /* M2_mpy_nac_hh_s1 */
21471
    IntRegs, IntRegs, IntRegs, IntRegs, 
21472
    /* M2_mpy_nac_hl_s0 */
21473
    IntRegs, IntRegs, IntRegs, IntRegs, 
21474
    /* M2_mpy_nac_hl_s1 */
21475
    IntRegs, IntRegs, IntRegs, IntRegs, 
21476
    /* M2_mpy_nac_lh_s0 */
21477
    IntRegs, IntRegs, IntRegs, IntRegs, 
21478
    /* M2_mpy_nac_lh_s1 */
21479
    IntRegs, IntRegs, IntRegs, IntRegs, 
21480
    /* M2_mpy_nac_ll_s0 */
21481
    IntRegs, IntRegs, IntRegs, IntRegs, 
21482
    /* M2_mpy_nac_ll_s1 */
21483
    IntRegs, IntRegs, IntRegs, IntRegs, 
21484
    /* M2_mpy_nac_sat_hh_s0 */
21485
    IntRegs, IntRegs, IntRegs, IntRegs, 
21486
    /* M2_mpy_nac_sat_hh_s1 */
21487
    IntRegs, IntRegs, IntRegs, IntRegs, 
21488
    /* M2_mpy_nac_sat_hl_s0 */
21489
    IntRegs, IntRegs, IntRegs, IntRegs, 
21490
    /* M2_mpy_nac_sat_hl_s1 */
21491
    IntRegs, IntRegs, IntRegs, IntRegs, 
21492
    /* M2_mpy_nac_sat_lh_s0 */
21493
    IntRegs, IntRegs, IntRegs, IntRegs, 
21494
    /* M2_mpy_nac_sat_lh_s1 */
21495
    IntRegs, IntRegs, IntRegs, IntRegs, 
21496
    /* M2_mpy_nac_sat_ll_s0 */
21497
    IntRegs, IntRegs, IntRegs, IntRegs, 
21498
    /* M2_mpy_nac_sat_ll_s1 */
21499
    IntRegs, IntRegs, IntRegs, IntRegs, 
21500
    /* M2_mpy_rnd_hh_s0 */
21501
    IntRegs, IntRegs, IntRegs, 
21502
    /* M2_mpy_rnd_hh_s1 */
21503
    IntRegs, IntRegs, IntRegs, 
21504
    /* M2_mpy_rnd_hl_s0 */
21505
    IntRegs, IntRegs, IntRegs, 
21506
    /* M2_mpy_rnd_hl_s1 */
21507
    IntRegs, IntRegs, IntRegs, 
21508
    /* M2_mpy_rnd_lh_s0 */
21509
    IntRegs, IntRegs, IntRegs, 
21510
    /* M2_mpy_rnd_lh_s1 */
21511
    IntRegs, IntRegs, IntRegs, 
21512
    /* M2_mpy_rnd_ll_s0 */
21513
    IntRegs, IntRegs, IntRegs, 
21514
    /* M2_mpy_rnd_ll_s1 */
21515
    IntRegs, IntRegs, IntRegs, 
21516
    /* M2_mpy_sat_hh_s0 */
21517
    IntRegs, IntRegs, IntRegs, 
21518
    /* M2_mpy_sat_hh_s1 */
21519
    IntRegs, IntRegs, IntRegs, 
21520
    /* M2_mpy_sat_hl_s0 */
21521
    IntRegs, IntRegs, IntRegs, 
21522
    /* M2_mpy_sat_hl_s1 */
21523
    IntRegs, IntRegs, IntRegs, 
21524
    /* M2_mpy_sat_lh_s0 */
21525
    IntRegs, IntRegs, IntRegs, 
21526
    /* M2_mpy_sat_lh_s1 */
21527
    IntRegs, IntRegs, IntRegs, 
21528
    /* M2_mpy_sat_ll_s0 */
21529
    IntRegs, IntRegs, IntRegs, 
21530
    /* M2_mpy_sat_ll_s1 */
21531
    IntRegs, IntRegs, IntRegs, 
21532
    /* M2_mpy_sat_rnd_hh_s0 */
21533
    IntRegs, IntRegs, IntRegs, 
21534
    /* M2_mpy_sat_rnd_hh_s1 */
21535
    IntRegs, IntRegs, IntRegs, 
21536
    /* M2_mpy_sat_rnd_hl_s0 */
21537
    IntRegs, IntRegs, IntRegs, 
21538
    /* M2_mpy_sat_rnd_hl_s1 */
21539
    IntRegs, IntRegs, IntRegs, 
21540
    /* M2_mpy_sat_rnd_lh_s0 */
21541
    IntRegs, IntRegs, IntRegs, 
21542
    /* M2_mpy_sat_rnd_lh_s1 */
21543
    IntRegs, IntRegs, IntRegs, 
21544
    /* M2_mpy_sat_rnd_ll_s0 */
21545
    IntRegs, IntRegs, IntRegs, 
21546
    /* M2_mpy_sat_rnd_ll_s1 */
21547
    IntRegs, IntRegs, IntRegs, 
21548
    /* M2_mpy_up */
21549
    IntRegs, IntRegs, IntRegs, 
21550
    /* M2_mpy_up_s1 */
21551
    IntRegs, IntRegs, IntRegs, 
21552
    /* M2_mpy_up_s1_sat */
21553
    IntRegs, IntRegs, IntRegs, 
21554
    /* M2_mpyd_acc_hh_s0 */
21555
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21556
    /* M2_mpyd_acc_hh_s1 */
21557
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21558
    /* M2_mpyd_acc_hl_s0 */
21559
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21560
    /* M2_mpyd_acc_hl_s1 */
21561
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21562
    /* M2_mpyd_acc_lh_s0 */
21563
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21564
    /* M2_mpyd_acc_lh_s1 */
21565
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21566
    /* M2_mpyd_acc_ll_s0 */
21567
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21568
    /* M2_mpyd_acc_ll_s1 */
21569
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21570
    /* M2_mpyd_hh_s0 */
21571
    DoubleRegs, IntRegs, IntRegs, 
21572
    /* M2_mpyd_hh_s1 */
21573
    DoubleRegs, IntRegs, IntRegs, 
21574
    /* M2_mpyd_hl_s0 */
21575
    DoubleRegs, IntRegs, IntRegs, 
21576
    /* M2_mpyd_hl_s1 */
21577
    DoubleRegs, IntRegs, IntRegs, 
21578
    /* M2_mpyd_lh_s0 */
21579
    DoubleRegs, IntRegs, IntRegs, 
21580
    /* M2_mpyd_lh_s1 */
21581
    DoubleRegs, IntRegs, IntRegs, 
21582
    /* M2_mpyd_ll_s0 */
21583
    DoubleRegs, IntRegs, IntRegs, 
21584
    /* M2_mpyd_ll_s1 */
21585
    DoubleRegs, IntRegs, IntRegs, 
21586
    /* M2_mpyd_nac_hh_s0 */
21587
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21588
    /* M2_mpyd_nac_hh_s1 */
21589
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21590
    /* M2_mpyd_nac_hl_s0 */
21591
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21592
    /* M2_mpyd_nac_hl_s1 */
21593
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21594
    /* M2_mpyd_nac_lh_s0 */
21595
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21596
    /* M2_mpyd_nac_lh_s1 */
21597
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21598
    /* M2_mpyd_nac_ll_s0 */
21599
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21600
    /* M2_mpyd_nac_ll_s1 */
21601
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21602
    /* M2_mpyd_rnd_hh_s0 */
21603
    DoubleRegs, IntRegs, IntRegs, 
21604
    /* M2_mpyd_rnd_hh_s1 */
21605
    DoubleRegs, IntRegs, IntRegs, 
21606
    /* M2_mpyd_rnd_hl_s0 */
21607
    DoubleRegs, IntRegs, IntRegs, 
21608
    /* M2_mpyd_rnd_hl_s1 */
21609
    DoubleRegs, IntRegs, IntRegs, 
21610
    /* M2_mpyd_rnd_lh_s0 */
21611
    DoubleRegs, IntRegs, IntRegs, 
21612
    /* M2_mpyd_rnd_lh_s1 */
21613
    DoubleRegs, IntRegs, IntRegs, 
21614
    /* M2_mpyd_rnd_ll_s0 */
21615
    DoubleRegs, IntRegs, IntRegs, 
21616
    /* M2_mpyd_rnd_ll_s1 */
21617
    DoubleRegs, IntRegs, IntRegs, 
21618
    /* M2_mpyi */
21619
    IntRegs, IntRegs, IntRegs, 
21620
    /* M2_mpysin */
21621
    IntRegs, IntRegs, u8_0Imm, 
21622
    /* M2_mpysip */
21623
    IntRegs, IntRegs, u32_0Imm, 
21624
    /* M2_mpysu_up */
21625
    IntRegs, IntRegs, IntRegs, 
21626
    /* M2_mpyu_acc_hh_s0 */
21627
    IntRegs, IntRegs, IntRegs, IntRegs, 
21628
    /* M2_mpyu_acc_hh_s1 */
21629
    IntRegs, IntRegs, IntRegs, IntRegs, 
21630
    /* M2_mpyu_acc_hl_s0 */
21631
    IntRegs, IntRegs, IntRegs, IntRegs, 
21632
    /* M2_mpyu_acc_hl_s1 */
21633
    IntRegs, IntRegs, IntRegs, IntRegs, 
21634
    /* M2_mpyu_acc_lh_s0 */
21635
    IntRegs, IntRegs, IntRegs, IntRegs, 
21636
    /* M2_mpyu_acc_lh_s1 */
21637
    IntRegs, IntRegs, IntRegs, IntRegs, 
21638
    /* M2_mpyu_acc_ll_s0 */
21639
    IntRegs, IntRegs, IntRegs, IntRegs, 
21640
    /* M2_mpyu_acc_ll_s1 */
21641
    IntRegs, IntRegs, IntRegs, IntRegs, 
21642
    /* M2_mpyu_hh_s0 */
21643
    IntRegs, IntRegs, IntRegs, 
21644
    /* M2_mpyu_hh_s1 */
21645
    IntRegs, IntRegs, IntRegs, 
21646
    /* M2_mpyu_hl_s0 */
21647
    IntRegs, IntRegs, IntRegs, 
21648
    /* M2_mpyu_hl_s1 */
21649
    IntRegs, IntRegs, IntRegs, 
21650
    /* M2_mpyu_lh_s0 */
21651
    IntRegs, IntRegs, IntRegs, 
21652
    /* M2_mpyu_lh_s1 */
21653
    IntRegs, IntRegs, IntRegs, 
21654
    /* M2_mpyu_ll_s0 */
21655
    IntRegs, IntRegs, IntRegs, 
21656
    /* M2_mpyu_ll_s1 */
21657
    IntRegs, IntRegs, IntRegs, 
21658
    /* M2_mpyu_nac_hh_s0 */
21659
    IntRegs, IntRegs, IntRegs, IntRegs, 
21660
    /* M2_mpyu_nac_hh_s1 */
21661
    IntRegs, IntRegs, IntRegs, IntRegs, 
21662
    /* M2_mpyu_nac_hl_s0 */
21663
    IntRegs, IntRegs, IntRegs, IntRegs, 
21664
    /* M2_mpyu_nac_hl_s1 */
21665
    IntRegs, IntRegs, IntRegs, IntRegs, 
21666
    /* M2_mpyu_nac_lh_s0 */
21667
    IntRegs, IntRegs, IntRegs, IntRegs, 
21668
    /* M2_mpyu_nac_lh_s1 */
21669
    IntRegs, IntRegs, IntRegs, IntRegs, 
21670
    /* M2_mpyu_nac_ll_s0 */
21671
    IntRegs, IntRegs, IntRegs, IntRegs, 
21672
    /* M2_mpyu_nac_ll_s1 */
21673
    IntRegs, IntRegs, IntRegs, IntRegs, 
21674
    /* M2_mpyu_up */
21675
    IntRegs, IntRegs, IntRegs, 
21676
    /* M2_mpyud_acc_hh_s0 */
21677
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21678
    /* M2_mpyud_acc_hh_s1 */
21679
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21680
    /* M2_mpyud_acc_hl_s0 */
21681
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21682
    /* M2_mpyud_acc_hl_s1 */
21683
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21684
    /* M2_mpyud_acc_lh_s0 */
21685
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21686
    /* M2_mpyud_acc_lh_s1 */
21687
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21688
    /* M2_mpyud_acc_ll_s0 */
21689
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21690
    /* M2_mpyud_acc_ll_s1 */
21691
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21692
    /* M2_mpyud_hh_s0 */
21693
    DoubleRegs, IntRegs, IntRegs, 
21694
    /* M2_mpyud_hh_s1 */
21695
    DoubleRegs, IntRegs, IntRegs, 
21696
    /* M2_mpyud_hl_s0 */
21697
    DoubleRegs, IntRegs, IntRegs, 
21698
    /* M2_mpyud_hl_s1 */
21699
    DoubleRegs, IntRegs, IntRegs, 
21700
    /* M2_mpyud_lh_s0 */
21701
    DoubleRegs, IntRegs, IntRegs, 
21702
    /* M2_mpyud_lh_s1 */
21703
    DoubleRegs, IntRegs, IntRegs, 
21704
    /* M2_mpyud_ll_s0 */
21705
    DoubleRegs, IntRegs, IntRegs, 
21706
    /* M2_mpyud_ll_s1 */
21707
    DoubleRegs, IntRegs, IntRegs, 
21708
    /* M2_mpyud_nac_hh_s0 */
21709
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21710
    /* M2_mpyud_nac_hh_s1 */
21711
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21712
    /* M2_mpyud_nac_hl_s0 */
21713
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21714
    /* M2_mpyud_nac_hl_s1 */
21715
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21716
    /* M2_mpyud_nac_lh_s0 */
21717
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21718
    /* M2_mpyud_nac_lh_s1 */
21719
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21720
    /* M2_mpyud_nac_ll_s0 */
21721
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21722
    /* M2_mpyud_nac_ll_s1 */
21723
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21724
    /* M2_nacci */
21725
    IntRegs, IntRegs, IntRegs, IntRegs, 
21726
    /* M2_naccii */
21727
    IntRegs, IntRegs, IntRegs, s32_0Imm, 
21728
    /* M2_subacc */
21729
    IntRegs, IntRegs, IntRegs, IntRegs, 
21730
    /* M2_vabsdiffh */
21731
    DoubleRegs, DoubleRegs, DoubleRegs, 
21732
    /* M2_vabsdiffw */
21733
    DoubleRegs, DoubleRegs, DoubleRegs, 
21734
    /* M2_vcmac_s0_sat_i */
21735
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21736
    /* M2_vcmac_s0_sat_r */
21737
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21738
    /* M2_vcmpy_s0_sat_i */
21739
    DoubleRegs, DoubleRegs, DoubleRegs, 
21740
    /* M2_vcmpy_s0_sat_r */
21741
    DoubleRegs, DoubleRegs, DoubleRegs, 
21742
    /* M2_vcmpy_s1_sat_i */
21743
    DoubleRegs, DoubleRegs, DoubleRegs, 
21744
    /* M2_vcmpy_s1_sat_r */
21745
    DoubleRegs, DoubleRegs, DoubleRegs, 
21746
    /* M2_vdmacs_s0 */
21747
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21748
    /* M2_vdmacs_s1 */
21749
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21750
    /* M2_vdmpyrs_s0 */
21751
    IntRegs, DoubleRegs, DoubleRegs, 
21752
    /* M2_vdmpyrs_s1 */
21753
    IntRegs, DoubleRegs, DoubleRegs, 
21754
    /* M2_vdmpys_s0 */
21755
    DoubleRegs, DoubleRegs, DoubleRegs, 
21756
    /* M2_vdmpys_s1 */
21757
    DoubleRegs, DoubleRegs, DoubleRegs, 
21758
    /* M2_vmac2 */
21759
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21760
    /* M2_vmac2es */
21761
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21762
    /* M2_vmac2es_s0 */
21763
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21764
    /* M2_vmac2es_s1 */
21765
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21766
    /* M2_vmac2s_s0 */
21767
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21768
    /* M2_vmac2s_s1 */
21769
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21770
    /* M2_vmac2su_s0 */
21771
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21772
    /* M2_vmac2su_s1 */
21773
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21774
    /* M2_vmpy2es_s0 */
21775
    DoubleRegs, DoubleRegs, DoubleRegs, 
21776
    /* M2_vmpy2es_s1 */
21777
    DoubleRegs, DoubleRegs, DoubleRegs, 
21778
    /* M2_vmpy2s_s0 */
21779
    DoubleRegs, IntRegs, IntRegs, 
21780
    /* M2_vmpy2s_s0pack */
21781
    IntRegs, IntRegs, IntRegs, 
21782
    /* M2_vmpy2s_s1 */
21783
    DoubleRegs, IntRegs, IntRegs, 
21784
    /* M2_vmpy2s_s1pack */
21785
    IntRegs, IntRegs, IntRegs, 
21786
    /* M2_vmpy2su_s0 */
21787
    DoubleRegs, IntRegs, IntRegs, 
21788
    /* M2_vmpy2su_s1 */
21789
    DoubleRegs, IntRegs, IntRegs, 
21790
    /* M2_vraddh */
21791
    IntRegs, DoubleRegs, DoubleRegs, 
21792
    /* M2_vradduh */
21793
    IntRegs, DoubleRegs, DoubleRegs, 
21794
    /* M2_vrcmaci_s0 */
21795
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21796
    /* M2_vrcmaci_s0c */
21797
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21798
    /* M2_vrcmacr_s0 */
21799
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21800
    /* M2_vrcmacr_s0c */
21801
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21802
    /* M2_vrcmpyi_s0 */
21803
    DoubleRegs, DoubleRegs, DoubleRegs, 
21804
    /* M2_vrcmpyi_s0c */
21805
    DoubleRegs, DoubleRegs, DoubleRegs, 
21806
    /* M2_vrcmpyr_s0 */
21807
    DoubleRegs, DoubleRegs, DoubleRegs, 
21808
    /* M2_vrcmpyr_s0c */
21809
    DoubleRegs, DoubleRegs, DoubleRegs, 
21810
    /* M2_vrcmpys_acc_s1_h */
21811
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21812
    /* M2_vrcmpys_acc_s1_l */
21813
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21814
    /* M2_vrcmpys_s1_h */
21815
    DoubleRegs, DoubleRegs, DoubleRegs, 
21816
    /* M2_vrcmpys_s1_l */
21817
    DoubleRegs, DoubleRegs, DoubleRegs, 
21818
    /* M2_vrcmpys_s1rp_h */
21819
    IntRegs, DoubleRegs, DoubleRegs, 
21820
    /* M2_vrcmpys_s1rp_l */
21821
    IntRegs, DoubleRegs, DoubleRegs, 
21822
    /* M2_vrmac_s0 */
21823
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21824
    /* M2_vrmpy_s0 */
21825
    DoubleRegs, DoubleRegs, DoubleRegs, 
21826
    /* M2_xor_xacc */
21827
    IntRegs, IntRegs, IntRegs, IntRegs, 
21828
    /* M4_and_and */
21829
    IntRegs, IntRegs, IntRegs, IntRegs, 
21830
    /* M4_and_andn */
21831
    IntRegs, IntRegs, IntRegs, IntRegs, 
21832
    /* M4_and_or */
21833
    IntRegs, IntRegs, IntRegs, IntRegs, 
21834
    /* M4_and_xor */
21835
    IntRegs, IntRegs, IntRegs, IntRegs, 
21836
    /* M4_cmpyi_wh */
21837
    IntRegs, DoubleRegs, IntRegs, 
21838
    /* M4_cmpyi_whc */
21839
    IntRegs, DoubleRegs, IntRegs, 
21840
    /* M4_cmpyr_wh */
21841
    IntRegs, DoubleRegs, IntRegs, 
21842
    /* M4_cmpyr_whc */
21843
    IntRegs, DoubleRegs, IntRegs, 
21844
    /* M4_mac_up_s1_sat */
21845
    IntRegs, IntRegs, IntRegs, IntRegs, 
21846
    /* M4_mpyri_addi */
21847
    IntRegs, u32_0Imm, IntRegs, u6_0Imm, 
21848
    /* M4_mpyri_addr */
21849
    IntRegs, IntRegs, IntRegs, u32_0Imm, 
21850
    /* M4_mpyri_addr_u2 */
21851
    IntRegs, IntRegs, u6_2Imm, IntRegs, 
21852
    /* M4_mpyrr_addi */
21853
    IntRegs, u32_0Imm, IntRegs, IntRegs, 
21854
    /* M4_mpyrr_addr */
21855
    IntRegs, IntRegs, IntRegs, IntRegs, 
21856
    /* M4_nac_up_s1_sat */
21857
    IntRegs, IntRegs, IntRegs, IntRegs, 
21858
    /* M4_or_and */
21859
    IntRegs, IntRegs, IntRegs, IntRegs, 
21860
    /* M4_or_andn */
21861
    IntRegs, IntRegs, IntRegs, IntRegs, 
21862
    /* M4_or_or */
21863
    IntRegs, IntRegs, IntRegs, IntRegs, 
21864
    /* M4_or_xor */
21865
    IntRegs, IntRegs, IntRegs, IntRegs, 
21866
    /* M4_pmpyw */
21867
    DoubleRegs, IntRegs, IntRegs, 
21868
    /* M4_pmpyw_acc */
21869
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21870
    /* M4_vpmpyh */
21871
    DoubleRegs, IntRegs, IntRegs, 
21872
    /* M4_vpmpyh_acc */
21873
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21874
    /* M4_vrmpyeh_acc_s0 */
21875
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21876
    /* M4_vrmpyeh_acc_s1 */
21877
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21878
    /* M4_vrmpyeh_s0 */
21879
    DoubleRegs, DoubleRegs, DoubleRegs, 
21880
    /* M4_vrmpyeh_s1 */
21881
    DoubleRegs, DoubleRegs, DoubleRegs, 
21882
    /* M4_vrmpyoh_acc_s0 */
21883
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21884
    /* M4_vrmpyoh_acc_s1 */
21885
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21886
    /* M4_vrmpyoh_s0 */
21887
    DoubleRegs, DoubleRegs, DoubleRegs, 
21888
    /* M4_vrmpyoh_s1 */
21889
    DoubleRegs, DoubleRegs, DoubleRegs, 
21890
    /* M4_xor_and */
21891
    IntRegs, IntRegs, IntRegs, IntRegs, 
21892
    /* M4_xor_andn */
21893
    IntRegs, IntRegs, IntRegs, IntRegs, 
21894
    /* M4_xor_or */
21895
    IntRegs, IntRegs, IntRegs, IntRegs, 
21896
    /* M4_xor_xacc */
21897
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21898
    /* M5_vdmacbsu */
21899
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21900
    /* M5_vdmpybsu */
21901
    DoubleRegs, DoubleRegs, DoubleRegs, 
21902
    /* M5_vmacbsu */
21903
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21904
    /* M5_vmacbuu */
21905
    DoubleRegs, DoubleRegs, IntRegs, IntRegs, 
21906
    /* M5_vmpybsu */
21907
    DoubleRegs, IntRegs, IntRegs, 
21908
    /* M5_vmpybuu */
21909
    DoubleRegs, IntRegs, IntRegs, 
21910
    /* M5_vrmacbsu */
21911
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21912
    /* M5_vrmacbuu */
21913
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21914
    /* M5_vrmpybsu */
21915
    DoubleRegs, DoubleRegs, DoubleRegs, 
21916
    /* M5_vrmpybuu */
21917
    DoubleRegs, DoubleRegs, DoubleRegs, 
21918
    /* M6_vabsdiffb */
21919
    DoubleRegs, DoubleRegs, DoubleRegs, 
21920
    /* M6_vabsdiffub */
21921
    DoubleRegs, DoubleRegs, DoubleRegs, 
21922
    /* M7_dcmpyiw */
21923
    DoubleRegs, DoubleRegs, DoubleRegs, 
21924
    /* M7_dcmpyiw_acc */
21925
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21926
    /* M7_dcmpyiwc */
21927
    DoubleRegs, DoubleRegs, DoubleRegs, 
21928
    /* M7_dcmpyiwc_acc */
21929
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21930
    /* M7_dcmpyrw */
21931
    DoubleRegs, DoubleRegs, DoubleRegs, 
21932
    /* M7_dcmpyrw_acc */
21933
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21934
    /* M7_dcmpyrwc */
21935
    DoubleRegs, DoubleRegs, DoubleRegs, 
21936
    /* M7_dcmpyrwc_acc */
21937
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
21938
    /* M7_wcmpyiw */
21939
    IntRegs, DoubleRegs, DoubleRegs, 
21940
    /* M7_wcmpyiw_rnd */
21941
    IntRegs, DoubleRegs, DoubleRegs, 
21942
    /* M7_wcmpyiwc */
21943
    IntRegs, DoubleRegs, DoubleRegs, 
21944
    /* M7_wcmpyiwc_rnd */
21945
    IntRegs, DoubleRegs, DoubleRegs, 
21946
    /* M7_wcmpyrw */
21947
    IntRegs, DoubleRegs, DoubleRegs, 
21948
    /* M7_wcmpyrw_rnd */
21949
    IntRegs, DoubleRegs, DoubleRegs, 
21950
    /* M7_wcmpyrwc */
21951
    IntRegs, DoubleRegs, DoubleRegs, 
21952
    /* M7_wcmpyrwc_rnd */
21953
    IntRegs, DoubleRegs, DoubleRegs, 
21954
    /* PS_call_stk */
21955
    a30_2Imm, 
21956
    /* PS_callr_nr */
21957
    IntRegs, 
21958
    /* PS_jmpret */
21959
    IntRegs, 
21960
    /* PS_jmpretf */
21961
    PredRegs, IntRegs, 
21962
    /* PS_jmpretfnew */
21963
    PredRegs, IntRegs, 
21964
    /* PS_jmpretfnewpt */
21965
    PredRegs, IntRegs, 
21966
    /* PS_jmprett */
21967
    PredRegs, IntRegs, 
21968
    /* PS_jmprettnew */
21969
    PredRegs, IntRegs, 
21970
    /* PS_jmprettnewpt */
21971
    PredRegs, IntRegs, 
21972
    /* PS_loadrbabs */
21973
    IntRegs, u32_0Imm, 
21974
    /* PS_loadrdabs */
21975
    DoubleRegs, u29_3Imm, 
21976
    /* PS_loadrhabs */
21977
    IntRegs, u31_1Imm, 
21978
    /* PS_loadriabs */
21979
    IntRegs, u30_2Imm, 
21980
    /* PS_loadrubabs */
21981
    IntRegs, u32_0Imm, 
21982
    /* PS_loadruhabs */
21983
    IntRegs, u31_1Imm, 
21984
    /* PS_storerbabs */
21985
    u32_0Imm, IntRegs, 
21986
    /* PS_storerbnewabs */
21987
    u32_0Imm, IntRegs, 
21988
    /* PS_storerdabs */
21989
    u29_3Imm, DoubleRegs, 
21990
    /* PS_storerfabs */
21991
    u31_1Imm, IntRegs, 
21992
    /* PS_storerhabs */
21993
    u31_1Imm, IntRegs, 
21994
    /* PS_storerhnewabs */
21995
    u31_1Imm, IntRegs, 
21996
    /* PS_storeriabs */
21997
    u30_2Imm, IntRegs, 
21998
    /* PS_storerinewabs */
21999
    u30_2Imm, IntRegs, 
22000
    /* PS_trap1 */
22001
    u8_0Imm, 
22002
    /* R6_release_at_vi */
22003
    IntRegs, 
22004
    /* R6_release_st_vi */
22005
    IntRegs, 
22006
    /* RESTORE_DEALLOC_BEFORE_TAILCALL_V4 */
22007
    a30_2Imm, 
22008
    /* RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT */
22009
    a30_2Imm, 
22010
    /* RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC */
22011
    a30_2Imm, 
22012
    /* RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC */
22013
    a30_2Imm, 
22014
    /* RESTORE_DEALLOC_RET_JMP_V4 */
22015
    b30_2Imm, 
22016
    /* RESTORE_DEALLOC_RET_JMP_V4_EXT */
22017
    b30_2Imm, 
22018
    /* RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC */
22019
    b30_2Imm, 
22020
    /* RESTORE_DEALLOC_RET_JMP_V4_PIC */
22021
    b30_2Imm, 
22022
    /* S2_addasl_rrri */
22023
    IntRegs, IntRegs, IntRegs, u3_0Imm, 
22024
    /* S2_allocframe */
22025
    IntRegs, IntRegs, u11_3Imm, 
22026
    /* S2_asl_i_p */
22027
    DoubleRegs, DoubleRegs, u6_0Imm, 
22028
    /* S2_asl_i_p_acc */
22029
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22030
    /* S2_asl_i_p_and */
22031
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22032
    /* S2_asl_i_p_nac */
22033
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22034
    /* S2_asl_i_p_or */
22035
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22036
    /* S2_asl_i_p_xacc */
22037
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22038
    /* S2_asl_i_r */
22039
    IntRegs, IntRegs, u5_0Imm, 
22040
    /* S2_asl_i_r_acc */
22041
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22042
    /* S2_asl_i_r_and */
22043
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22044
    /* S2_asl_i_r_nac */
22045
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22046
    /* S2_asl_i_r_or */
22047
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22048
    /* S2_asl_i_r_sat */
22049
    IntRegs, IntRegs, u5_0Imm, 
22050
    /* S2_asl_i_r_xacc */
22051
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22052
    /* S2_asl_i_vh */
22053
    DoubleRegs, DoubleRegs, u4_0Imm, 
22054
    /* S2_asl_i_vw */
22055
    DoubleRegs, DoubleRegs, u5_0Imm, 
22056
    /* S2_asl_r_p */
22057
    DoubleRegs, DoubleRegs, IntRegs, 
22058
    /* S2_asl_r_p_acc */
22059
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22060
    /* S2_asl_r_p_and */
22061
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22062
    /* S2_asl_r_p_nac */
22063
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22064
    /* S2_asl_r_p_or */
22065
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22066
    /* S2_asl_r_p_xor */
22067
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22068
    /* S2_asl_r_r */
22069
    IntRegs, IntRegs, IntRegs, 
22070
    /* S2_asl_r_r_acc */
22071
    IntRegs, IntRegs, IntRegs, IntRegs, 
22072
    /* S2_asl_r_r_and */
22073
    IntRegs, IntRegs, IntRegs, IntRegs, 
22074
    /* S2_asl_r_r_nac */
22075
    IntRegs, IntRegs, IntRegs, IntRegs, 
22076
    /* S2_asl_r_r_or */
22077
    IntRegs, IntRegs, IntRegs, IntRegs, 
22078
    /* S2_asl_r_r_sat */
22079
    IntRegs, IntRegs, IntRegs, 
22080
    /* S2_asl_r_vh */
22081
    DoubleRegs, DoubleRegs, IntRegs, 
22082
    /* S2_asl_r_vw */
22083
    DoubleRegs, DoubleRegs, IntRegs, 
22084
    /* S2_asr_i_p */
22085
    DoubleRegs, DoubleRegs, u6_0Imm, 
22086
    /* S2_asr_i_p_acc */
22087
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22088
    /* S2_asr_i_p_and */
22089
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22090
    /* S2_asr_i_p_nac */
22091
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22092
    /* S2_asr_i_p_or */
22093
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22094
    /* S2_asr_i_p_rnd */
22095
    DoubleRegs, DoubleRegs, u6_0Imm, 
22096
    /* S2_asr_i_r */
22097
    IntRegs, IntRegs, u5_0Imm, 
22098
    /* S2_asr_i_r_acc */
22099
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22100
    /* S2_asr_i_r_and */
22101
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22102
    /* S2_asr_i_r_nac */
22103
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22104
    /* S2_asr_i_r_or */
22105
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22106
    /* S2_asr_i_r_rnd */
22107
    IntRegs, IntRegs, u5_0Imm, 
22108
    /* S2_asr_i_svw_trun */
22109
    IntRegs, DoubleRegs, u5_0Imm, 
22110
    /* S2_asr_i_vh */
22111
    DoubleRegs, DoubleRegs, u4_0Imm, 
22112
    /* S2_asr_i_vw */
22113
    DoubleRegs, DoubleRegs, u5_0Imm, 
22114
    /* S2_asr_r_p */
22115
    DoubleRegs, DoubleRegs, IntRegs, 
22116
    /* S2_asr_r_p_acc */
22117
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22118
    /* S2_asr_r_p_and */
22119
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22120
    /* S2_asr_r_p_nac */
22121
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22122
    /* S2_asr_r_p_or */
22123
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22124
    /* S2_asr_r_p_xor */
22125
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22126
    /* S2_asr_r_r */
22127
    IntRegs, IntRegs, IntRegs, 
22128
    /* S2_asr_r_r_acc */
22129
    IntRegs, IntRegs, IntRegs, IntRegs, 
22130
    /* S2_asr_r_r_and */
22131
    IntRegs, IntRegs, IntRegs, IntRegs, 
22132
    /* S2_asr_r_r_nac */
22133
    IntRegs, IntRegs, IntRegs, IntRegs, 
22134
    /* S2_asr_r_r_or */
22135
    IntRegs, IntRegs, IntRegs, IntRegs, 
22136
    /* S2_asr_r_r_sat */
22137
    IntRegs, IntRegs, IntRegs, 
22138
    /* S2_asr_r_svw_trun */
22139
    IntRegs, DoubleRegs, IntRegs, 
22140
    /* S2_asr_r_vh */
22141
    DoubleRegs, DoubleRegs, IntRegs, 
22142
    /* S2_asr_r_vw */
22143
    DoubleRegs, DoubleRegs, IntRegs, 
22144
    /* S2_brev */
22145
    IntRegs, IntRegs, 
22146
    /* S2_brevp */
22147
    DoubleRegs, DoubleRegs, 
22148
    /* S2_cabacdecbin */
22149
    DoubleRegs, DoubleRegs, DoubleRegs, 
22150
    /* S2_cl0 */
22151
    IntRegs, IntRegs, 
22152
    /* S2_cl0p */
22153
    IntRegs, DoubleRegs, 
22154
    /* S2_cl1 */
22155
    IntRegs, IntRegs, 
22156
    /* S2_cl1p */
22157
    IntRegs, DoubleRegs, 
22158
    /* S2_clb */
22159
    IntRegs, IntRegs, 
22160
    /* S2_clbnorm */
22161
    IntRegs, IntRegs, 
22162
    /* S2_clbp */
22163
    IntRegs, DoubleRegs, 
22164
    /* S2_clrbit_i */
22165
    IntRegs, IntRegs, u5_0Imm, 
22166
    /* S2_clrbit_r */
22167
    IntRegs, IntRegs, IntRegs, 
22168
    /* S2_ct0 */
22169
    IntRegs, IntRegs, 
22170
    /* S2_ct0p */
22171
    IntRegs, DoubleRegs, 
22172
    /* S2_ct1 */
22173
    IntRegs, IntRegs, 
22174
    /* S2_ct1p */
22175
    IntRegs, DoubleRegs, 
22176
    /* S2_deinterleave */
22177
    DoubleRegs, DoubleRegs, 
22178
    /* S2_extractu */
22179
    IntRegs, IntRegs, u5_0Imm, u5_0Imm, 
22180
    /* S2_extractu_rp */
22181
    IntRegs, IntRegs, DoubleRegs, 
22182
    /* S2_extractup */
22183
    DoubleRegs, DoubleRegs, u6_0Imm, u6_0Imm, 
22184
    /* S2_extractup_rp */
22185
    DoubleRegs, DoubleRegs, DoubleRegs, 
22186
    /* S2_insert */
22187
    IntRegs, IntRegs, IntRegs, u5_0Imm, u5_0Imm, 
22188
    /* S2_insert_rp */
22189
    IntRegs, IntRegs, IntRegs, DoubleRegs, 
22190
    /* S2_insertp */
22191
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, u6_0Imm, 
22192
    /* S2_insertp_rp */
22193
    DoubleRegs, DoubleRegs, DoubleRegs, DoubleRegs, 
22194
    /* S2_interleave */
22195
    DoubleRegs, DoubleRegs, 
22196
    /* S2_lfsp */
22197
    DoubleRegs, DoubleRegs, DoubleRegs, 
22198
    /* S2_lsl_r_p */
22199
    DoubleRegs, DoubleRegs, IntRegs, 
22200
    /* S2_lsl_r_p_acc */
22201
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22202
    /* S2_lsl_r_p_and */
22203
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22204
    /* S2_lsl_r_p_nac */
22205
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22206
    /* S2_lsl_r_p_or */
22207
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22208
    /* S2_lsl_r_p_xor */
22209
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22210
    /* S2_lsl_r_r */
22211
    IntRegs, IntRegs, IntRegs, 
22212
    /* S2_lsl_r_r_acc */
22213
    IntRegs, IntRegs, IntRegs, IntRegs, 
22214
    /* S2_lsl_r_r_and */
22215
    IntRegs, IntRegs, IntRegs, IntRegs, 
22216
    /* S2_lsl_r_r_nac */
22217
    IntRegs, IntRegs, IntRegs, IntRegs, 
22218
    /* S2_lsl_r_r_or */
22219
    IntRegs, IntRegs, IntRegs, IntRegs, 
22220
    /* S2_lsl_r_vh */
22221
    DoubleRegs, DoubleRegs, IntRegs, 
22222
    /* S2_lsl_r_vw */
22223
    DoubleRegs, DoubleRegs, IntRegs, 
22224
    /* S2_lsr_i_p */
22225
    DoubleRegs, DoubleRegs, u6_0Imm, 
22226
    /* S2_lsr_i_p_acc */
22227
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22228
    /* S2_lsr_i_p_and */
22229
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22230
    /* S2_lsr_i_p_nac */
22231
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22232
    /* S2_lsr_i_p_or */
22233
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22234
    /* S2_lsr_i_p_xacc */
22235
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22236
    /* S2_lsr_i_r */
22237
    IntRegs, IntRegs, u5_0Imm, 
22238
    /* S2_lsr_i_r_acc */
22239
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22240
    /* S2_lsr_i_r_and */
22241
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22242
    /* S2_lsr_i_r_nac */
22243
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22244
    /* S2_lsr_i_r_or */
22245
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22246
    /* S2_lsr_i_r_xacc */
22247
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22248
    /* S2_lsr_i_vh */
22249
    DoubleRegs, DoubleRegs, u4_0Imm, 
22250
    /* S2_lsr_i_vw */
22251
    DoubleRegs, DoubleRegs, u5_0Imm, 
22252
    /* S2_lsr_r_p */
22253
    DoubleRegs, DoubleRegs, IntRegs, 
22254
    /* S2_lsr_r_p_acc */
22255
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22256
    /* S2_lsr_r_p_and */
22257
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22258
    /* S2_lsr_r_p_nac */
22259
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22260
    /* S2_lsr_r_p_or */
22261
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22262
    /* S2_lsr_r_p_xor */
22263
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22264
    /* S2_lsr_r_r */
22265
    IntRegs, IntRegs, IntRegs, 
22266
    /* S2_lsr_r_r_acc */
22267
    IntRegs, IntRegs, IntRegs, IntRegs, 
22268
    /* S2_lsr_r_r_and */
22269
    IntRegs, IntRegs, IntRegs, IntRegs, 
22270
    /* S2_lsr_r_r_nac */
22271
    IntRegs, IntRegs, IntRegs, IntRegs, 
22272
    /* S2_lsr_r_r_or */
22273
    IntRegs, IntRegs, IntRegs, IntRegs, 
22274
    /* S2_lsr_r_vh */
22275
    DoubleRegs, DoubleRegs, IntRegs, 
22276
    /* S2_lsr_r_vw */
22277
    DoubleRegs, DoubleRegs, IntRegs, 
22278
    /* S2_mask */
22279
    IntRegs, u5_0Imm, u5_0Imm, 
22280
    /* S2_packhl */
22281
    DoubleRegs, IntRegs, IntRegs, 
22282
    /* S2_parityp */
22283
    IntRegs, DoubleRegs, DoubleRegs, 
22284
    /* S2_pstorerbf_io */
22285
    PredRegs, IntRegs, u32_0Imm, IntRegs, 
22286
    /* S2_pstorerbf_pi */
22287
    IntRegs, PredRegs, IntRegs, s4_0Imm, IntRegs, 
22288
    /* S2_pstorerbfnew_pi */
22289
    IntRegs, PredRegs, IntRegs, s4_0Imm, IntRegs, 
22290
    /* S2_pstorerbnewf_io */
22291
    PredRegs, IntRegs, u32_0Imm, IntRegs, 
22292
    /* S2_pstorerbnewf_pi */
22293
    IntRegs, PredRegs, IntRegs, s4_0Imm, IntRegs, 
22294
    /* S2_pstorerbnewfnew_pi */
22295
    IntRegs, PredRegs, IntRegs, s4_0Imm, IntRegs, 
22296
    /* S2_pstorerbnewt_io */
22297
    PredRegs, IntRegs, u32_0Imm, IntRegs, 
22298
    /* S2_pstorerbnewt_pi */
22299
    IntRegs, PredRegs, IntRegs, s4_0Imm, IntRegs, 
22300
    /* S2_pstorerbnewtnew_pi */
22301
    IntRegs, PredRegs, IntRegs, s4_0Imm, IntRegs, 
22302
    /* S2_pstorerbt_io */
22303
    PredRegs, IntRegs, u32_0Imm, IntRegs, 
22304
    /* S2_pstorerbt_pi */
22305
    IntRegs, PredRegs, IntRegs, s4_0Imm, IntRegs, 
22306
    /* S2_pstorerbtnew_pi */
22307
    IntRegs, PredRegs, IntRegs, s4_0Imm, IntRegs, 
22308
    /* S2_pstorerdf_io */
22309
    PredRegs, IntRegs, u29_3Imm, DoubleRegs, 
22310
    /* S2_pstorerdf_pi */
22311
    IntRegs, PredRegs, IntRegs, s4_3Imm, DoubleRegs, 
22312
    /* S2_pstorerdfnew_pi */
22313
    IntRegs, PredRegs, IntRegs, s4_3Imm, DoubleRegs, 
22314
    /* S2_pstorerdt_io */
22315
    PredRegs, IntRegs, u29_3Imm, DoubleRegs, 
22316
    /* S2_pstorerdt_pi */
22317
    IntRegs, PredRegs, IntRegs, s4_3Imm, DoubleRegs, 
22318
    /* S2_pstorerdtnew_pi */
22319
    IntRegs, PredRegs, IntRegs, s4_3Imm, DoubleRegs, 
22320
    /* S2_pstorerff_io */
22321
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22322
    /* S2_pstorerff_pi */
22323
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22324
    /* S2_pstorerffnew_pi */
22325
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22326
    /* S2_pstorerft_io */
22327
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22328
    /* S2_pstorerft_pi */
22329
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22330
    /* S2_pstorerftnew_pi */
22331
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22332
    /* S2_pstorerhf_io */
22333
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22334
    /* S2_pstorerhf_pi */
22335
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22336
    /* S2_pstorerhfnew_pi */
22337
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22338
    /* S2_pstorerhnewf_io */
22339
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22340
    /* S2_pstorerhnewf_pi */
22341
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22342
    /* S2_pstorerhnewfnew_pi */
22343
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22344
    /* S2_pstorerhnewt_io */
22345
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22346
    /* S2_pstorerhnewt_pi */
22347
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22348
    /* S2_pstorerhnewtnew_pi */
22349
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22350
    /* S2_pstorerht_io */
22351
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22352
    /* S2_pstorerht_pi */
22353
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22354
    /* S2_pstorerhtnew_pi */
22355
    IntRegs, PredRegs, IntRegs, s4_1Imm, IntRegs, 
22356
    /* S2_pstorerif_io */
22357
    PredRegs, IntRegs, u30_2Imm, IntRegs, 
22358
    /* S2_pstorerif_pi */
22359
    IntRegs, PredRegs, IntRegs, s4_2Imm, IntRegs, 
22360
    /* S2_pstorerifnew_pi */
22361
    IntRegs, PredRegs, IntRegs, s4_2Imm, IntRegs, 
22362
    /* S2_pstorerinewf_io */
22363
    PredRegs, IntRegs, u30_2Imm, IntRegs, 
22364
    /* S2_pstorerinewf_pi */
22365
    IntRegs, PredRegs, IntRegs, s4_2Imm, IntRegs, 
22366
    /* S2_pstorerinewfnew_pi */
22367
    IntRegs, PredRegs, IntRegs, s4_2Imm, IntRegs, 
22368
    /* S2_pstorerinewt_io */
22369
    PredRegs, IntRegs, u30_2Imm, IntRegs, 
22370
    /* S2_pstorerinewt_pi */
22371
    IntRegs, PredRegs, IntRegs, s4_2Imm, IntRegs, 
22372
    /* S2_pstorerinewtnew_pi */
22373
    IntRegs, PredRegs, IntRegs, s4_2Imm, IntRegs, 
22374
    /* S2_pstorerit_io */
22375
    PredRegs, IntRegs, u30_2Imm, IntRegs, 
22376
    /* S2_pstorerit_pi */
22377
    IntRegs, PredRegs, IntRegs, s4_2Imm, IntRegs, 
22378
    /* S2_pstoreritnew_pi */
22379
    IntRegs, PredRegs, IntRegs, s4_2Imm, IntRegs, 
22380
    /* S2_setbit_i */
22381
    IntRegs, IntRegs, u5_0Imm, 
22382
    /* S2_setbit_r */
22383
    IntRegs, IntRegs, IntRegs, 
22384
    /* S2_shuffeb */
22385
    DoubleRegs, DoubleRegs, DoubleRegs, 
22386
    /* S2_shuffeh */
22387
    DoubleRegs, DoubleRegs, DoubleRegs, 
22388
    /* S2_shuffob */
22389
    DoubleRegs, DoubleRegs, DoubleRegs, 
22390
    /* S2_shuffoh */
22391
    DoubleRegs, DoubleRegs, DoubleRegs, 
22392
    /* S2_storerb_io */
22393
    IntRegs, s32_0Imm, IntRegs, 
22394
    /* S2_storerb_pbr */
22395
    IntRegs, IntRegs, ModRegs, IntRegs, 
22396
    /* S2_storerb_pci */
22397
    IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, 
22398
    /* S2_storerb_pcr */
22399
    IntRegs, IntRegs, ModRegs, IntRegs, 
22400
    /* S2_storerb_pi */
22401
    IntRegs, IntRegs, s4_0Imm, IntRegs, 
22402
    /* S2_storerb_pr */
22403
    IntRegs, IntRegs, ModRegs, IntRegs, 
22404
    /* S2_storerbgp */
22405
    u32_0Imm, IntRegs, 
22406
    /* S2_storerbnew_io */
22407
    IntRegs, s32_0Imm, IntRegs, 
22408
    /* S2_storerbnew_pbr */
22409
    IntRegs, IntRegs, ModRegs, IntRegs, 
22410
    /* S2_storerbnew_pci */
22411
    IntRegs, IntRegs, s4_0Imm, ModRegs, IntRegs, 
22412
    /* S2_storerbnew_pcr */
22413
    IntRegs, IntRegs, ModRegs, IntRegs, 
22414
    /* S2_storerbnew_pi */
22415
    IntRegs, IntRegs, s4_0Imm, IntRegs, 
22416
    /* S2_storerbnew_pr */
22417
    IntRegs, IntRegs, ModRegs, IntRegs, 
22418
    /* S2_storerbnewgp */
22419
    u32_0Imm, IntRegs, 
22420
    /* S2_storerd_io */
22421
    IntRegs, s29_3Imm, DoubleRegs, 
22422
    /* S2_storerd_pbr */
22423
    IntRegs, IntRegs, ModRegs, DoubleRegs, 
22424
    /* S2_storerd_pci */
22425
    IntRegs, IntRegs, s4_3Imm, ModRegs, DoubleRegs, 
22426
    /* S2_storerd_pcr */
22427
    IntRegs, IntRegs, ModRegs, DoubleRegs, 
22428
    /* S2_storerd_pi */
22429
    IntRegs, IntRegs, s4_3Imm, DoubleRegs, 
22430
    /* S2_storerd_pr */
22431
    IntRegs, IntRegs, ModRegs, DoubleRegs, 
22432
    /* S2_storerdgp */
22433
    u29_3Imm, DoubleRegs, 
22434
    /* S2_storerf_io */
22435
    IntRegs, s31_1Imm, IntRegs, 
22436
    /* S2_storerf_pbr */
22437
    IntRegs, IntRegs, ModRegs, IntRegs, 
22438
    /* S2_storerf_pci */
22439
    IntRegs, IntRegs, s4_1Imm, ModRegs, IntRegs, 
22440
    /* S2_storerf_pcr */
22441
    IntRegs, IntRegs, ModRegs, IntRegs, 
22442
    /* S2_storerf_pi */
22443
    IntRegs, IntRegs, s4_1Imm, IntRegs, 
22444
    /* S2_storerf_pr */
22445
    IntRegs, IntRegs, ModRegs, IntRegs, 
22446
    /* S2_storerfgp */
22447
    u31_1Imm, IntRegs, 
22448
    /* S2_storerh_io */
22449
    IntRegs, s31_1Imm, IntRegs, 
22450
    /* S2_storerh_pbr */
22451
    IntRegs, IntRegs, ModRegs, IntRegs, 
22452
    /* S2_storerh_pci */
22453
    IntRegs, IntRegs, s4_1Imm, ModRegs, IntRegs, 
22454
    /* S2_storerh_pcr */
22455
    IntRegs, IntRegs, ModRegs, IntRegs, 
22456
    /* S2_storerh_pi */
22457
    IntRegs, IntRegs, s4_1Imm, IntRegs, 
22458
    /* S2_storerh_pr */
22459
    IntRegs, IntRegs, ModRegs, IntRegs, 
22460
    /* S2_storerhgp */
22461
    u31_1Imm, IntRegs, 
22462
    /* S2_storerhnew_io */
22463
    IntRegs, s31_1Imm, IntRegs, 
22464
    /* S2_storerhnew_pbr */
22465
    IntRegs, IntRegs, ModRegs, IntRegs, 
22466
    /* S2_storerhnew_pci */
22467
    IntRegs, IntRegs, s4_1Imm, ModRegs, IntRegs, 
22468
    /* S2_storerhnew_pcr */
22469
    IntRegs, IntRegs, ModRegs, IntRegs, 
22470
    /* S2_storerhnew_pi */
22471
    IntRegs, IntRegs, s4_1Imm, IntRegs, 
22472
    /* S2_storerhnew_pr */
22473
    IntRegs, IntRegs, ModRegs, IntRegs, 
22474
    /* S2_storerhnewgp */
22475
    u31_1Imm, IntRegs, 
22476
    /* S2_storeri_io */
22477
    IntRegs, s30_2Imm, IntRegs, 
22478
    /* S2_storeri_pbr */
22479
    IntRegs, IntRegs, ModRegs, IntRegs, 
22480
    /* S2_storeri_pci */
22481
    IntRegs, IntRegs, s4_2Imm, ModRegs, IntRegs, 
22482
    /* S2_storeri_pcr */
22483
    IntRegs, IntRegs, ModRegs, IntRegs, 
22484
    /* S2_storeri_pi */
22485
    IntRegs, IntRegs, s4_2Imm, IntRegs, 
22486
    /* S2_storeri_pr */
22487
    IntRegs, IntRegs, ModRegs, IntRegs, 
22488
    /* S2_storerigp */
22489
    u30_2Imm, IntRegs, 
22490
    /* S2_storerinew_io */
22491
    IntRegs, s30_2Imm, IntRegs, 
22492
    /* S2_storerinew_pbr */
22493
    IntRegs, IntRegs, ModRegs, IntRegs, 
22494
    /* S2_storerinew_pci */
22495
    IntRegs, IntRegs, s4_2Imm, ModRegs, IntRegs, 
22496
    /* S2_storerinew_pcr */
22497
    IntRegs, IntRegs, ModRegs, IntRegs, 
22498
    /* S2_storerinew_pi */
22499
    IntRegs, IntRegs, s4_2Imm, IntRegs, 
22500
    /* S2_storerinew_pr */
22501
    IntRegs, IntRegs, ModRegs, IntRegs, 
22502
    /* S2_storerinewgp */
22503
    u30_2Imm, IntRegs, 
22504
    /* S2_storew_locked */
22505
    PredRegs, IntRegs, IntRegs, 
22506
    /* S2_storew_rl_at_vi */
22507
    IntRegs, IntRegs, 
22508
    /* S2_storew_rl_st_vi */
22509
    IntRegs, IntRegs, 
22510
    /* S2_svsathb */
22511
    IntRegs, IntRegs, 
22512
    /* S2_svsathub */
22513
    IntRegs, IntRegs, 
22514
    /* S2_tableidxb */
22515
    IntRegs, IntRegs, IntRegs, u4_0Imm, s6_0Imm, 
22516
    /* S2_tableidxd */
22517
    IntRegs, IntRegs, IntRegs, u4_0Imm, s6_0Imm, 
22518
    /* S2_tableidxh */
22519
    IntRegs, IntRegs, IntRegs, u4_0Imm, s6_0Imm, 
22520
    /* S2_tableidxw */
22521
    IntRegs, IntRegs, IntRegs, u4_0Imm, s6_0Imm, 
22522
    /* S2_togglebit_i */
22523
    IntRegs, IntRegs, u5_0Imm, 
22524
    /* S2_togglebit_r */
22525
    IntRegs, IntRegs, IntRegs, 
22526
    /* S2_tstbit_i */
22527
    PredRegs, IntRegs, u5_0Imm, 
22528
    /* S2_tstbit_r */
22529
    PredRegs, IntRegs, IntRegs, 
22530
    /* S2_valignib */
22531
    DoubleRegs, DoubleRegs, DoubleRegs, u3_0Imm, 
22532
    /* S2_valignrb */
22533
    DoubleRegs, DoubleRegs, DoubleRegs, PredRegs, 
22534
    /* S2_vcnegh */
22535
    DoubleRegs, DoubleRegs, IntRegs, 
22536
    /* S2_vcrotate */
22537
    DoubleRegs, DoubleRegs, IntRegs, 
22538
    /* S2_vrcnegh */
22539
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, 
22540
    /* S2_vrndpackwh */
22541
    IntRegs, DoubleRegs, 
22542
    /* S2_vrndpackwhs */
22543
    IntRegs, DoubleRegs, 
22544
    /* S2_vsathb */
22545
    IntRegs, DoubleRegs, 
22546
    /* S2_vsathb_nopack */
22547
    DoubleRegs, DoubleRegs, 
22548
    /* S2_vsathub */
22549
    IntRegs, DoubleRegs, 
22550
    /* S2_vsathub_nopack */
22551
    DoubleRegs, DoubleRegs, 
22552
    /* S2_vsatwh */
22553
    IntRegs, DoubleRegs, 
22554
    /* S2_vsatwh_nopack */
22555
    DoubleRegs, DoubleRegs, 
22556
    /* S2_vsatwuh */
22557
    IntRegs, DoubleRegs, 
22558
    /* S2_vsatwuh_nopack */
22559
    DoubleRegs, DoubleRegs, 
22560
    /* S2_vsplatrb */
22561
    IntRegs, IntRegs, 
22562
    /* S2_vsplatrh */
22563
    DoubleRegs, IntRegs, 
22564
    /* S2_vspliceib */
22565
    DoubleRegs, DoubleRegs, DoubleRegs, u3_0Imm, 
22566
    /* S2_vsplicerb */
22567
    DoubleRegs, DoubleRegs, DoubleRegs, PredRegs, 
22568
    /* S2_vsxtbh */
22569
    DoubleRegs, IntRegs, 
22570
    /* S2_vsxthw */
22571
    DoubleRegs, IntRegs, 
22572
    /* S2_vtrunehb */
22573
    IntRegs, DoubleRegs, 
22574
    /* S2_vtrunewh */
22575
    DoubleRegs, DoubleRegs, DoubleRegs, 
22576
    /* S2_vtrunohb */
22577
    IntRegs, DoubleRegs, 
22578
    /* S2_vtrunowh */
22579
    DoubleRegs, DoubleRegs, DoubleRegs, 
22580
    /* S2_vzxtbh */
22581
    DoubleRegs, IntRegs, 
22582
    /* S2_vzxthw */
22583
    DoubleRegs, IntRegs, 
22584
    /* S4_addaddi */
22585
    IntRegs, IntRegs, IntRegs, s32_0Imm, 
22586
    /* S4_addi_asl_ri */
22587
    IntRegs, u32_0Imm, IntRegs, u5_0Imm, 
22588
    /* S4_addi_lsr_ri */
22589
    IntRegs, u32_0Imm, IntRegs, u5_0Imm, 
22590
    /* S4_andi_asl_ri */
22591
    IntRegs, u32_0Imm, IntRegs, u5_0Imm, 
22592
    /* S4_andi_lsr_ri */
22593
    IntRegs, u32_0Imm, IntRegs, u5_0Imm, 
22594
    /* S4_clbaddi */
22595
    IntRegs, IntRegs, s6_0Imm, 
22596
    /* S4_clbpaddi */
22597
    IntRegs, DoubleRegs, s6_0Imm, 
22598
    /* S4_clbpnorm */
22599
    IntRegs, DoubleRegs, 
22600
    /* S4_extract */
22601
    IntRegs, IntRegs, u5_0Imm, u5_0Imm, 
22602
    /* S4_extract_rp */
22603
    IntRegs, IntRegs, DoubleRegs, 
22604
    /* S4_extractp */
22605
    DoubleRegs, DoubleRegs, u6_0Imm, u6_0Imm, 
22606
    /* S4_extractp_rp */
22607
    DoubleRegs, DoubleRegs, DoubleRegs, 
22608
    /* S4_lsli */
22609
    IntRegs, s6_0Imm, IntRegs, 
22610
    /* S4_ntstbit_i */
22611
    PredRegs, IntRegs, u5_0Imm, 
22612
    /* S4_ntstbit_r */
22613
    PredRegs, IntRegs, IntRegs, 
22614
    /* S4_or_andi */
22615
    IntRegs, IntRegs, IntRegs, s32_0Imm, 
22616
    /* S4_or_andix */
22617
    IntRegs, IntRegs, IntRegs, s32_0Imm, 
22618
    /* S4_or_ori */
22619
    IntRegs, IntRegs, IntRegs, s32_0Imm, 
22620
    /* S4_ori_asl_ri */
22621
    IntRegs, u32_0Imm, IntRegs, u5_0Imm, 
22622
    /* S4_ori_lsr_ri */
22623
    IntRegs, u32_0Imm, IntRegs, u5_0Imm, 
22624
    /* S4_parity */
22625
    IntRegs, IntRegs, IntRegs, 
22626
    /* S4_pstorerbf_abs */
22627
    PredRegs, u32_0Imm, IntRegs, 
22628
    /* S4_pstorerbf_rr */
22629
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22630
    /* S4_pstorerbfnew_abs */
22631
    PredRegs, u32_0Imm, IntRegs, 
22632
    /* S4_pstorerbfnew_io */
22633
    PredRegs, IntRegs, u32_0Imm, IntRegs, 
22634
    /* S4_pstorerbfnew_rr */
22635
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22636
    /* S4_pstorerbnewf_abs */
22637
    PredRegs, u32_0Imm, IntRegs, 
22638
    /* S4_pstorerbnewf_rr */
22639
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22640
    /* S4_pstorerbnewfnew_abs */
22641
    PredRegs, u32_0Imm, IntRegs, 
22642
    /* S4_pstorerbnewfnew_io */
22643
    PredRegs, IntRegs, u32_0Imm, IntRegs, 
22644
    /* S4_pstorerbnewfnew_rr */
22645
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22646
    /* S4_pstorerbnewt_abs */
22647
    PredRegs, u32_0Imm, IntRegs, 
22648
    /* S4_pstorerbnewt_rr */
22649
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22650
    /* S4_pstorerbnewtnew_abs */
22651
    PredRegs, u32_0Imm, IntRegs, 
22652
    /* S4_pstorerbnewtnew_io */
22653
    PredRegs, IntRegs, u32_0Imm, IntRegs, 
22654
    /* S4_pstorerbnewtnew_rr */
22655
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22656
    /* S4_pstorerbt_abs */
22657
    PredRegs, u32_0Imm, IntRegs, 
22658
    /* S4_pstorerbt_rr */
22659
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22660
    /* S4_pstorerbtnew_abs */
22661
    PredRegs, u32_0Imm, IntRegs, 
22662
    /* S4_pstorerbtnew_io */
22663
    PredRegs, IntRegs, u32_0Imm, IntRegs, 
22664
    /* S4_pstorerbtnew_rr */
22665
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22666
    /* S4_pstorerdf_abs */
22667
    PredRegs, u32_0Imm, DoubleRegs, 
22668
    /* S4_pstorerdf_rr */
22669
    PredRegs, IntRegs, IntRegs, u2_0Imm, DoubleRegs, 
22670
    /* S4_pstorerdfnew_abs */
22671
    PredRegs, u32_0Imm, DoubleRegs, 
22672
    /* S4_pstorerdfnew_io */
22673
    PredRegs, IntRegs, u29_3Imm, DoubleRegs, 
22674
    /* S4_pstorerdfnew_rr */
22675
    PredRegs, IntRegs, IntRegs, u2_0Imm, DoubleRegs, 
22676
    /* S4_pstorerdt_abs */
22677
    PredRegs, u32_0Imm, DoubleRegs, 
22678
    /* S4_pstorerdt_rr */
22679
    PredRegs, IntRegs, IntRegs, u2_0Imm, DoubleRegs, 
22680
    /* S4_pstorerdtnew_abs */
22681
    PredRegs, u32_0Imm, DoubleRegs, 
22682
    /* S4_pstorerdtnew_io */
22683
    PredRegs, IntRegs, u29_3Imm, DoubleRegs, 
22684
    /* S4_pstorerdtnew_rr */
22685
    PredRegs, IntRegs, IntRegs, u2_0Imm, DoubleRegs, 
22686
    /* S4_pstorerff_abs */
22687
    PredRegs, u32_0Imm, IntRegs, 
22688
    /* S4_pstorerff_rr */
22689
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22690
    /* S4_pstorerffnew_abs */
22691
    PredRegs, u32_0Imm, IntRegs, 
22692
    /* S4_pstorerffnew_io */
22693
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22694
    /* S4_pstorerffnew_rr */
22695
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22696
    /* S4_pstorerft_abs */
22697
    PredRegs, u32_0Imm, IntRegs, 
22698
    /* S4_pstorerft_rr */
22699
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22700
    /* S4_pstorerftnew_abs */
22701
    PredRegs, u32_0Imm, IntRegs, 
22702
    /* S4_pstorerftnew_io */
22703
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22704
    /* S4_pstorerftnew_rr */
22705
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22706
    /* S4_pstorerhf_abs */
22707
    PredRegs, u32_0Imm, IntRegs, 
22708
    /* S4_pstorerhf_rr */
22709
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22710
    /* S4_pstorerhfnew_abs */
22711
    PredRegs, u32_0Imm, IntRegs, 
22712
    /* S4_pstorerhfnew_io */
22713
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22714
    /* S4_pstorerhfnew_rr */
22715
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22716
    /* S4_pstorerhnewf_abs */
22717
    PredRegs, u32_0Imm, IntRegs, 
22718
    /* S4_pstorerhnewf_rr */
22719
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22720
    /* S4_pstorerhnewfnew_abs */
22721
    PredRegs, u32_0Imm, IntRegs, 
22722
    /* S4_pstorerhnewfnew_io */
22723
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22724
    /* S4_pstorerhnewfnew_rr */
22725
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22726
    /* S4_pstorerhnewt_abs */
22727
    PredRegs, u32_0Imm, IntRegs, 
22728
    /* S4_pstorerhnewt_rr */
22729
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22730
    /* S4_pstorerhnewtnew_abs */
22731
    PredRegs, u32_0Imm, IntRegs, 
22732
    /* S4_pstorerhnewtnew_io */
22733
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22734
    /* S4_pstorerhnewtnew_rr */
22735
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22736
    /* S4_pstorerht_abs */
22737
    PredRegs, u32_0Imm, IntRegs, 
22738
    /* S4_pstorerht_rr */
22739
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22740
    /* S4_pstorerhtnew_abs */
22741
    PredRegs, u32_0Imm, IntRegs, 
22742
    /* S4_pstorerhtnew_io */
22743
    PredRegs, IntRegs, u31_1Imm, IntRegs, 
22744
    /* S4_pstorerhtnew_rr */
22745
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22746
    /* S4_pstorerif_abs */
22747
    PredRegs, u32_0Imm, IntRegs, 
22748
    /* S4_pstorerif_rr */
22749
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22750
    /* S4_pstorerifnew_abs */
22751
    PredRegs, u32_0Imm, IntRegs, 
22752
    /* S4_pstorerifnew_io */
22753
    PredRegs, IntRegs, u30_2Imm, IntRegs, 
22754
    /* S4_pstorerifnew_rr */
22755
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22756
    /* S4_pstorerinewf_abs */
22757
    PredRegs, u32_0Imm, IntRegs, 
22758
    /* S4_pstorerinewf_rr */
22759
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22760
    /* S4_pstorerinewfnew_abs */
22761
    PredRegs, u32_0Imm, IntRegs, 
22762
    /* S4_pstorerinewfnew_io */
22763
    PredRegs, IntRegs, u30_2Imm, IntRegs, 
22764
    /* S4_pstorerinewfnew_rr */
22765
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22766
    /* S4_pstorerinewt_abs */
22767
    PredRegs, u32_0Imm, IntRegs, 
22768
    /* S4_pstorerinewt_rr */
22769
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22770
    /* S4_pstorerinewtnew_abs */
22771
    PredRegs, u32_0Imm, IntRegs, 
22772
    /* S4_pstorerinewtnew_io */
22773
    PredRegs, IntRegs, u30_2Imm, IntRegs, 
22774
    /* S4_pstorerinewtnew_rr */
22775
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22776
    /* S4_pstorerit_abs */
22777
    PredRegs, u32_0Imm, IntRegs, 
22778
    /* S4_pstorerit_rr */
22779
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22780
    /* S4_pstoreritnew_abs */
22781
    PredRegs, u32_0Imm, IntRegs, 
22782
    /* S4_pstoreritnew_io */
22783
    PredRegs, IntRegs, u30_2Imm, IntRegs, 
22784
    /* S4_pstoreritnew_rr */
22785
    PredRegs, IntRegs, IntRegs, u2_0Imm, IntRegs, 
22786
    /* S4_stored_locked */
22787
    PredRegs, IntRegs, DoubleRegs, 
22788
    /* S4_stored_rl_at_vi */
22789
    IntRegs, DoubleRegs, 
22790
    /* S4_stored_rl_st_vi */
22791
    IntRegs, DoubleRegs, 
22792
    /* S4_storeirb_io */
22793
    IntRegs, u6_0Imm, s32_0Imm, 
22794
    /* S4_storeirbf_io */
22795
    PredRegs, IntRegs, u6_0Imm, s32_0Imm, 
22796
    /* S4_storeirbfnew_io */
22797
    PredRegs, IntRegs, u6_0Imm, s32_0Imm, 
22798
    /* S4_storeirbt_io */
22799
    PredRegs, IntRegs, u6_0Imm, s32_0Imm, 
22800
    /* S4_storeirbtnew_io */
22801
    PredRegs, IntRegs, u6_0Imm, s32_0Imm, 
22802
    /* S4_storeirh_io */
22803
    IntRegs, u6_1Imm, s32_0Imm, 
22804
    /* S4_storeirhf_io */
22805
    PredRegs, IntRegs, u6_1Imm, s32_0Imm, 
22806
    /* S4_storeirhfnew_io */
22807
    PredRegs, IntRegs, u6_1Imm, s32_0Imm, 
22808
    /* S4_storeirht_io */
22809
    PredRegs, IntRegs, u6_1Imm, s32_0Imm, 
22810
    /* S4_storeirhtnew_io */
22811
    PredRegs, IntRegs, u6_1Imm, s32_0Imm, 
22812
    /* S4_storeiri_io */
22813
    IntRegs, u6_2Imm, s32_0Imm, 
22814
    /* S4_storeirif_io */
22815
    PredRegs, IntRegs, u6_2Imm, s32_0Imm, 
22816
    /* S4_storeirifnew_io */
22817
    PredRegs, IntRegs, u6_2Imm, s32_0Imm, 
22818
    /* S4_storeirit_io */
22819
    PredRegs, IntRegs, u6_2Imm, s32_0Imm, 
22820
    /* S4_storeiritnew_io */
22821
    PredRegs, IntRegs, u6_2Imm, s32_0Imm, 
22822
    /* S4_storerb_ap */
22823
    IntRegs, u32_0Imm, IntRegs, 
22824
    /* S4_storerb_rr */
22825
    IntRegs, IntRegs, u2_0Imm, IntRegs, 
22826
    /* S4_storerb_ur */
22827
    IntRegs, u2_0Imm, u32_0Imm, IntRegs, 
22828
    /* S4_storerbnew_ap */
22829
    IntRegs, u32_0Imm, IntRegs, 
22830
    /* S4_storerbnew_rr */
22831
    IntRegs, IntRegs, u2_0Imm, IntRegs, 
22832
    /* S4_storerbnew_ur */
22833
    IntRegs, u2_0Imm, u32_0Imm, IntRegs, 
22834
    /* S4_storerd_ap */
22835
    IntRegs, u32_0Imm, DoubleRegs, 
22836
    /* S4_storerd_rr */
22837
    IntRegs, IntRegs, u2_0Imm, DoubleRegs, 
22838
    /* S4_storerd_ur */
22839
    IntRegs, u2_0Imm, u32_0Imm, DoubleRegs, 
22840
    /* S4_storerf_ap */
22841
    IntRegs, u32_0Imm, IntRegs, 
22842
    /* S4_storerf_rr */
22843
    IntRegs, IntRegs, u2_0Imm, IntRegs, 
22844
    /* S4_storerf_ur */
22845
    IntRegs, u2_0Imm, u32_0Imm, IntRegs, 
22846
    /* S4_storerh_ap */
22847
    IntRegs, u32_0Imm, IntRegs, 
22848
    /* S4_storerh_rr */
22849
    IntRegs, IntRegs, u2_0Imm, IntRegs, 
22850
    /* S4_storerh_ur */
22851
    IntRegs, u2_0Imm, u32_0Imm, IntRegs, 
22852
    /* S4_storerhnew_ap */
22853
    IntRegs, u32_0Imm, IntRegs, 
22854
    /* S4_storerhnew_rr */
22855
    IntRegs, IntRegs, u2_0Imm, IntRegs, 
22856
    /* S4_storerhnew_ur */
22857
    IntRegs, u2_0Imm, u32_0Imm, IntRegs, 
22858
    /* S4_storeri_ap */
22859
    IntRegs, u32_0Imm, IntRegs, 
22860
    /* S4_storeri_rr */
22861
    IntRegs, IntRegs, u2_0Imm, IntRegs, 
22862
    /* S4_storeri_ur */
22863
    IntRegs, u2_0Imm, u32_0Imm, IntRegs, 
22864
    /* S4_storerinew_ap */
22865
    IntRegs, u32_0Imm, IntRegs, 
22866
    /* S4_storerinew_rr */
22867
    IntRegs, IntRegs, u2_0Imm, IntRegs, 
22868
    /* S4_storerinew_ur */
22869
    IntRegs, u2_0Imm, u32_0Imm, IntRegs, 
22870
    /* S4_subaddi */
22871
    IntRegs, IntRegs, s32_0Imm, IntRegs, 
22872
    /* S4_subi_asl_ri */
22873
    IntRegs, u32_0Imm, IntRegs, u5_0Imm, 
22874
    /* S4_subi_lsr_ri */
22875
    IntRegs, u32_0Imm, IntRegs, u5_0Imm, 
22876
    /* S4_vrcrotate */
22877
    DoubleRegs, DoubleRegs, IntRegs, u2_0Imm, 
22878
    /* S4_vrcrotate_acc */
22879
    DoubleRegs, DoubleRegs, DoubleRegs, IntRegs, u2_0Imm, 
22880
    /* S4_vxaddsubh */
22881
    DoubleRegs, DoubleRegs, DoubleRegs, 
22882
    /* S4_vxaddsubhr */
22883
    DoubleRegs, DoubleRegs, DoubleRegs, 
22884
    /* S4_vxaddsubw */
22885
    DoubleRegs, DoubleRegs, DoubleRegs, 
22886
    /* S4_vxsubaddh */
22887
    DoubleRegs, DoubleRegs, DoubleRegs, 
22888
    /* S4_vxsubaddhr */
22889
    DoubleRegs, DoubleRegs, DoubleRegs, 
22890
    /* S4_vxsubaddw */
22891
    DoubleRegs, DoubleRegs, DoubleRegs, 
22892
    /* S5_asrhub_rnd_sat */
22893
    IntRegs, DoubleRegs, u4_0Imm, 
22894
    /* S5_asrhub_sat */
22895
    IntRegs, DoubleRegs, u4_0Imm, 
22896
    /* S5_popcountp */
22897
    IntRegs, DoubleRegs, 
22898
    /* S5_vasrhrnd */
22899
    DoubleRegs, DoubleRegs, u4_0Imm, 
22900
    /* S6_rol_i_p */
22901
    DoubleRegs, DoubleRegs, u6_0Imm, 
22902
    /* S6_rol_i_p_acc */
22903
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22904
    /* S6_rol_i_p_and */
22905
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22906
    /* S6_rol_i_p_nac */
22907
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22908
    /* S6_rol_i_p_or */
22909
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22910
    /* S6_rol_i_p_xacc */
22911
    DoubleRegs, DoubleRegs, DoubleRegs, u6_0Imm, 
22912
    /* S6_rol_i_r */
22913
    IntRegs, IntRegs, u5_0Imm, 
22914
    /* S6_rol_i_r_acc */
22915
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22916
    /* S6_rol_i_r_and */
22917
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22918
    /* S6_rol_i_r_nac */
22919
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22920
    /* S6_rol_i_r_or */
22921
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22922
    /* S6_rol_i_r_xacc */
22923
    IntRegs, IntRegs, IntRegs, u5_0Imm, 
22924
    /* S6_vsplatrbp */
22925
    DoubleRegs, IntRegs, 
22926
    /* S6_vtrunehb_ppp */
22927
    DoubleRegs, DoubleRegs, DoubleRegs, 
22928
    /* S6_vtrunohb_ppp */
22929
    DoubleRegs, DoubleRegs, DoubleRegs, 
22930
    /* SA1_addi */
22931
    GeneralSubRegs, GeneralSubRegs, s32_0Imm, 
22932
    /* SA1_addrx */
22933
    GeneralSubRegs, GeneralSubRegs, GeneralSubRegs, 
22934
    /* SA1_addsp */
22935
    GeneralSubRegs, u6_2Imm, 
22936
    /* SA1_and1 */
22937
    GeneralSubRegs, GeneralSubRegs, 
22938
    /* SA1_clrf */
22939
    GeneralSubRegs, 
22940
    /* SA1_clrfnew */
22941
    GeneralSubRegs, 
22942
    /* SA1_clrt */
22943
    GeneralSubRegs, 
22944
    /* SA1_clrtnew */
22945
    GeneralSubRegs, 
22946
    /* SA1_cmpeqi */
22947
    GeneralSubRegs, u2_0Imm, 
22948
    /* SA1_combine0i */
22949
    GeneralDoubleLow8Regs, u2_0Imm, 
22950
    /* SA1_combine1i */
22951
    GeneralDoubleLow8Regs, u2_0Imm, 
22952
    /* SA1_combine2i */
22953
    GeneralDoubleLow8Regs, u2_0Imm, 
22954
    /* SA1_combine3i */
22955
    GeneralDoubleLow8Regs, u2_0Imm, 
22956
    /* SA1_combinerz */
22957
    GeneralDoubleLow8Regs, GeneralSubRegs, 
22958
    /* SA1_combinezr */
22959
    GeneralDoubleLow8Regs, GeneralSubRegs, 
22960
    /* SA1_dec */
22961
    GeneralSubRegs, GeneralSubRegs, n1Const, 
22962
    /* SA1_inc */
22963
    GeneralSubRegs, GeneralSubRegs, 
22964
    /* SA1_seti */
22965
    GeneralSubRegs, u32_0Imm, 
22966
    /* SA1_setin1 */
22967
    GeneralSubRegs, n1Const, 
22968
    /* SA1_sxtb */
22969
    GeneralSubRegs, GeneralSubRegs, 
22970
    /* SA1_sxth */
22971
    GeneralSubRegs, GeneralSubRegs, 
22972
    /* SA1_tfr */
22973
    GeneralSubRegs, GeneralSubRegs, 
22974
    /* SA1_zxtb */
22975
    GeneralSubRegs, GeneralSubRegs, 
22976
    /* SA1_zxth */
22977
    GeneralSubRegs, GeneralSubRegs, 
22978
    /* SAVE_REGISTERS_CALL_V4 */
22979
    a30_2Imm, 
22980
    /* SAVE_REGISTERS_CALL_V4STK */
22981
    a30_2Imm, 
22982
    /* SAVE_REGISTERS_CALL_V4STK_EXT */
22983
    a30_2Imm, 
22984
    /* SAVE_REGISTERS_CALL_V4STK_EXT_PIC */
22985
    a30_2Imm, 
22986
    /* SAVE_REGISTERS_CALL_V4STK_PIC */
22987
    a30_2Imm, 
22988
    /* SAVE_REGISTERS_CALL_V4_EXT */
22989
    a30_2Imm, 
22990
    /* SAVE_REGISTERS_CALL_V4_EXT_PIC */
22991
    a30_2Imm, 
22992
    /* SAVE_REGISTERS_CALL_V4_PIC */
22993
    a30_2Imm, 
22994
    /* SL1_loadri_io */
22995
    GeneralSubRegs, GeneralSubRegs, u4_2Imm, 
22996
    /* SL1_loadrub_io */
22997
    GeneralSubRegs, GeneralSubRegs, u4_0Imm, 
22998
    /* SL2_deallocframe */
22999
    /* SL2_jumpr31 */
23000
    /* SL2_jumpr31_f */
23001
    /* SL2_jumpr31_fnew */
23002
    /* SL2_jumpr31_t */
23003
    /* SL2_jumpr31_tnew */
23004
    /* SL2_loadrb_io */
23005
    GeneralSubRegs, GeneralSubRegs, u3_0Imm, 
23006
    /* SL2_loadrd_sp */
23007
    GeneralDoubleLow8Regs, u5_3Imm, 
23008
    /* SL2_loadrh_io */
23009
    GeneralSubRegs, GeneralSubRegs, u3_1Imm, 
23010
    /* SL2_loadri_sp */
23011
    GeneralSubRegs, u5_2Imm, 
23012
    /* SL2_loadruh_io */
23013
    GeneralSubRegs, GeneralSubRegs, u3_1Imm, 
23014
    /* SL2_return */
23015
    /* SL2_return_f */
23016
    /* SL2_return_fnew */
23017
    /* SL2_return_t */
23018
    /* SL2_return_tnew */
23019
    /* SS1_storeb_io */
23020
    GeneralSubRegs, u4_0Imm, GeneralSubRegs, 
23021
    /* SS1_storew_io */
23022
    GeneralSubRegs, u4_2Imm, GeneralSubRegs, 
23023
    /* SS2_allocframe */
23024
    u5_3Imm, 
23025
    /* SS2_storebi0 */
23026
    GeneralSubRegs, u4_0Imm, 
23027
    /* SS2_storebi1 */
23028
    GeneralSubRegs, u4_0Imm, 
23029
    /* SS2_stored_sp */
23030
    s6_3Imm, GeneralDoubleLow8Regs, 
23031
    /* SS2_storeh_io */
23032
    GeneralSubRegs, u3_1Imm, GeneralSubRegs, 
23033
    /* SS2_storew_sp */
23034
    u5_2Imm, GeneralSubRegs, 
23035
    /* SS2_storewi0 */
23036
    GeneralSubRegs, u4_2Imm, 
23037
    /* SS2_storewi1 */
23038
    GeneralSubRegs, u4_2Imm, 
23039
    /* TFRI64_V2_ext */
23040
    DoubleRegs, s32_0Imm, s8_0Imm, 
23041
    /* TFRI64_V4 */
23042
    DoubleRegs, u64_0Imm, 
23043
    /* V6_extractw */
23044
    IntRegs, HvxVR, IntRegs, 
23045
    /* V6_lvsplatb */
23046
    HvxVR, IntRegs, 
23047
    /* V6_lvsplath */
23048
    HvxVR, IntRegs, 
23049
    /* V6_lvsplatw */
23050
    HvxVR, IntRegs, 
23051
    /* V6_pred_and */
23052
    HvxQR, HvxQR, HvxQR, 
23053
    /* V6_pred_and_n */
23054
    HvxQR, HvxQR, HvxQR, 
23055
    /* V6_pred_not */
23056
    HvxQR, HvxQR, 
23057
    /* V6_pred_or */
23058
    HvxQR, HvxQR, HvxQR, 
23059
    /* V6_pred_or_n */
23060
    HvxQR, HvxQR, HvxQR, 
23061
    /* V6_pred_scalar2 */
23062
    HvxQR, IntRegs, 
23063
    /* V6_pred_scalar2v2 */
23064
    HvxQR, IntRegs, 
23065
    /* V6_pred_xor */
23066
    HvxQR, HvxQR, HvxQR, 
23067
    /* V6_shuffeqh */
23068
    HvxQR, HvxQR, HvxQR, 
23069
    /* V6_shuffeqw */
23070
    HvxQR, HvxQR, HvxQR, 
23071
    /* V6_v6mpyhubs10 */
23072
    HvxWR, HvxWR, HvxWR, u2_0Imm, 
23073
    /* V6_v6mpyhubs10_vxx */
23074
    HvxWR, HvxWR, HvxWR, HvxWR, u2_0Imm, 
23075
    /* V6_v6mpyvubs10 */
23076
    HvxWR, HvxWR, HvxWR, u2_0Imm, 
23077
    /* V6_v6mpyvubs10_vxx */
23078
    HvxWR, HvxWR, HvxWR, HvxWR, u2_0Imm, 
23079
    /* V6_vL32Ub_ai */
23080
    HvxVR, IntRegs, s4_0Imm, 
23081
    /* V6_vL32Ub_pi */
23082
    HvxVR, IntRegs, IntRegs, s3_0Imm, 
23083
    /* V6_vL32Ub_ppu */
23084
    HvxVR, IntRegs, IntRegs, ModRegs, 
23085
    /* V6_vL32b_ai */
23086
    HvxVR, IntRegs, s4_0Imm, 
23087
    /* V6_vL32b_cur_ai */
23088
    HvxVR, IntRegs, s4_0Imm, 
23089
    /* V6_vL32b_cur_npred_ai */
23090
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23091
    /* V6_vL32b_cur_npred_pi */
23092
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23093
    /* V6_vL32b_cur_npred_ppu */
23094
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23095
    /* V6_vL32b_cur_pi */
23096
    HvxVR, IntRegs, IntRegs, s3_0Imm, 
23097
    /* V6_vL32b_cur_ppu */
23098
    HvxVR, IntRegs, IntRegs, ModRegs, 
23099
    /* V6_vL32b_cur_pred_ai */
23100
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23101
    /* V6_vL32b_cur_pred_pi */
23102
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23103
    /* V6_vL32b_cur_pred_ppu */
23104
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23105
    /* V6_vL32b_npred_ai */
23106
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23107
    /* V6_vL32b_npred_pi */
23108
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23109
    /* V6_vL32b_npred_ppu */
23110
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23111
    /* V6_vL32b_nt_ai */
23112
    HvxVR, IntRegs, s4_0Imm, 
23113
    /* V6_vL32b_nt_cur_ai */
23114
    HvxVR, IntRegs, s4_0Imm, 
23115
    /* V6_vL32b_nt_cur_npred_ai */
23116
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23117
    /* V6_vL32b_nt_cur_npred_pi */
23118
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23119
    /* V6_vL32b_nt_cur_npred_ppu */
23120
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23121
    /* V6_vL32b_nt_cur_pi */
23122
    HvxVR, IntRegs, IntRegs, s3_0Imm, 
23123
    /* V6_vL32b_nt_cur_ppu */
23124
    HvxVR, IntRegs, IntRegs, ModRegs, 
23125
    /* V6_vL32b_nt_cur_pred_ai */
23126
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23127
    /* V6_vL32b_nt_cur_pred_pi */
23128
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23129
    /* V6_vL32b_nt_cur_pred_ppu */
23130
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23131
    /* V6_vL32b_nt_npred_ai */
23132
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23133
    /* V6_vL32b_nt_npred_pi */
23134
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23135
    /* V6_vL32b_nt_npred_ppu */
23136
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23137
    /* V6_vL32b_nt_pi */
23138
    HvxVR, IntRegs, IntRegs, s3_0Imm, 
23139
    /* V6_vL32b_nt_ppu */
23140
    HvxVR, IntRegs, IntRegs, ModRegs, 
23141
    /* V6_vL32b_nt_pred_ai */
23142
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23143
    /* V6_vL32b_nt_pred_pi */
23144
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23145
    /* V6_vL32b_nt_pred_ppu */
23146
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23147
    /* V6_vL32b_nt_tmp_ai */
23148
    HvxVR, IntRegs, s4_0Imm, 
23149
    /* V6_vL32b_nt_tmp_npred_ai */
23150
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23151
    /* V6_vL32b_nt_tmp_npred_pi */
23152
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23153
    /* V6_vL32b_nt_tmp_npred_ppu */
23154
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23155
    /* V6_vL32b_nt_tmp_pi */
23156
    HvxVR, IntRegs, IntRegs, s3_0Imm, 
23157
    /* V6_vL32b_nt_tmp_ppu */
23158
    HvxVR, IntRegs, IntRegs, ModRegs, 
23159
    /* V6_vL32b_nt_tmp_pred_ai */
23160
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23161
    /* V6_vL32b_nt_tmp_pred_pi */
23162
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23163
    /* V6_vL32b_nt_tmp_pred_ppu */
23164
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23165
    /* V6_vL32b_pi */
23166
    HvxVR, IntRegs, IntRegs, s3_0Imm, 
23167
    /* V6_vL32b_ppu */
23168
    HvxVR, IntRegs, IntRegs, ModRegs, 
23169
    /* V6_vL32b_pred_ai */
23170
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23171
    /* V6_vL32b_pred_pi */
23172
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23173
    /* V6_vL32b_pred_ppu */
23174
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23175
    /* V6_vL32b_tmp_ai */
23176
    HvxVR, IntRegs, s4_0Imm, 
23177
    /* V6_vL32b_tmp_npred_ai */
23178
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23179
    /* V6_vL32b_tmp_npred_pi */
23180
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23181
    /* V6_vL32b_tmp_npred_ppu */
23182
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23183
    /* V6_vL32b_tmp_pi */
23184
    HvxVR, IntRegs, IntRegs, s3_0Imm, 
23185
    /* V6_vL32b_tmp_ppu */
23186
    HvxVR, IntRegs, IntRegs, ModRegs, 
23187
    /* V6_vL32b_tmp_pred_ai */
23188
    HvxVR, PredRegs, IntRegs, s4_0Imm, 
23189
    /* V6_vL32b_tmp_pred_pi */
23190
    HvxVR, IntRegs, PredRegs, IntRegs, s3_0Imm, 
23191
    /* V6_vL32b_tmp_pred_ppu */
23192
    HvxVR, IntRegs, PredRegs, IntRegs, ModRegs, 
23193
    /* V6_vS32Ub_ai */
23194
    IntRegs, s4_0Imm, HvxVR, 
23195
    /* V6_vS32Ub_npred_ai */
23196
    PredRegs, IntRegs, s4_0Imm, HvxVR, 
23197
    /* V6_vS32Ub_npred_pi */
23198
    IntRegs, PredRegs, IntRegs, s3_0Imm, HvxVR, 
23199
    /* V6_vS32Ub_npred_ppu */
23200
    IntRegs, PredRegs, IntRegs, ModRegs, HvxVR, 
23201
    /* V6_vS32Ub_pi */
23202
    IntRegs, IntRegs, s3_0Imm, HvxVR, 
23203
    /* V6_vS32Ub_ppu */
23204
    IntRegs, IntRegs, ModRegs, HvxVR, 
23205
    /* V6_vS32Ub_pred_ai */
23206
    PredRegs, IntRegs, s4_0Imm, HvxVR, 
23207
    /* V6_vS32Ub_pred_pi */
23208
    IntRegs, PredRegs, IntRegs, s3_0Imm, HvxVR, 
23209
    /* V6_vS32Ub_pred_ppu */
23210
    IntRegs, PredRegs, IntRegs, ModRegs, HvxVR, 
23211
    /* V6_vS32b_ai */
23212
    IntRegs, s4_0Imm, HvxVR, 
23213
    /* V6_vS32b_new_ai */
23214
    IntRegs, s4_0Imm, HvxVR, 
23215
    /* V6_vS32b_new_npred_ai */
23216
    PredRegs, IntRegs, s4_0Imm, HvxVR, 
23217
    /* V6_vS32b_new_npred_pi */
23218
    IntRegs, PredRegs, IntRegs, s3_0Imm, HvxVR, 
23219
    /* V6_vS32b_new_npred_ppu */
23220
    IntRegs, PredRegs, IntRegs, ModRegs, HvxVR, 
23221
    /* V6_vS32b_new_pi */
23222
    IntRegs, IntRegs, s3_0Imm, HvxVR, 
23223
    /* V6_vS32b_new_ppu */
23224
    IntRegs, IntRegs, ModRegs, HvxVR, 
23225
    /* V6_vS32b_new_pred_ai */
23226
    PredRegs, IntRegs, s4_0Imm, HvxVR, 
23227
    /* V6_vS32b_new_pred_pi */
23228
    IntRegs, PredRegs, IntRegs, s3_0Imm, HvxVR, 
23229
    /* V6_vS32b_new_pred_ppu */
23230
    IntRegs, PredRegs, IntRegs, ModRegs, HvxVR, 
23231
    /* V6_vS32b_npred_ai */
23232
    PredRegs, IntRegs, s4_0Imm, HvxVR, 
23233
    /* V6_vS32b_npred_pi */
23234
    IntRegs, PredRegs, IntRegs, s3_0Imm, HvxVR, 
23235
    /* V6_vS32b_npred_ppu */
23236
    IntRegs, PredRegs, IntRegs, ModRegs, HvxVR, 
23237
    /* V6_vS32b_nqpred_ai */
23238
    HvxQR, IntRegs, s4_0Imm, HvxVR, 
23239
    /* V6_vS32b_nqpred_pi */
23240
    IntRegs, HvxQR, IntRegs, s3_0Imm, HvxVR, 
23241
    /* V6_vS32b_nqpred_ppu */
23242
    IntRegs, HvxQR, IntRegs, ModRegs, HvxVR, 
23243
    /* V6_vS32b_nt_ai */
23244
    IntRegs, s4_0Imm, HvxVR, 
23245
    /* V6_vS32b_nt_new_ai */
23246
    IntRegs, s4_0Imm, HvxVR, 
23247
    /* V6_vS32b_nt_new_npred_ai */
23248
    PredRegs, IntRegs, s4_0Imm, HvxVR, 
23249
    /* V6_vS32b_nt_new_npred_pi */
23250
    IntRegs, PredRegs, IntRegs, s3_0Imm, HvxVR, 
23251
    /* V6_vS32b_nt_new_npred_ppu */
23252
    IntRegs, PredRegs, IntRegs, ModRegs, HvxVR, 
23253
    /* V6_vS32b_nt_new_pi */
23254
    IntRegs, IntRegs, s3_0Imm, HvxVR, 
23255
    /* V6_vS32b_nt_new_ppu */
23256
    IntRegs, IntRegs, ModRegs, HvxVR, 
23257
    /* V6_vS32b_nt_new_pred_ai */
23258
    PredRegs, IntRegs, s4_0Imm, HvxVR, 
23259
    /* V6_vS32b_nt_new_pred_pi */
23260
    IntRegs, PredRegs, IntRegs, s3_0Imm, HvxVR, 
23261
    /* V6_vS32b_nt_new_pred_ppu */
23262
    IntRegs, PredRegs, IntRegs, ModRegs, HvxVR, 
23263
    /* V6_vS32b_nt_npred_ai */
23264
    PredRegs, IntRegs, s4_0Imm, HvxVR, 
23265
    /* V6_vS32b_nt_npred_pi */
23266
    IntRegs, PredRegs, IntRegs, s3_0Imm, HvxVR, 
23267
    /* V6_vS32b_nt_npred_ppu */
23268
    IntRegs, PredRegs, IntRegs, ModRegs, HvxVR, 
23269
    /* V6_vS32b_nt_nqpred_ai */
23270
    HvxQR, IntRegs, s4_0Imm, HvxVR, 
23271
    /* V6_vS32b_nt_nqpred_pi */
23272
    IntRegs, HvxQR, IntRegs, s3_0Imm, HvxVR, 
23273
    /* V6_vS32b_nt_nqpred_ppu */
23274
    IntRegs, HvxQR, IntRegs, ModRegs, HvxVR, 
23275
    /* V6_vS32b_nt_pi */
23276
    IntRegs, IntRegs, s3_0Imm, HvxVR, 
23277
    /* V6_vS32b_nt_ppu */
23278
    IntRegs, IntRegs, ModRegs, HvxVR, 
23279
    /* V6_vS32b_nt_pred_ai */
23280
    PredRegs, IntRegs, s4_0Imm, HvxVR, 
23281
    /* V6_vS32b_nt_pred_pi */
23282
    IntRegs, PredRegs, IntRegs, s3_0Imm, HvxVR, 
23283
    /* V6_vS32b_nt_pred_ppu */
23284
    IntRegs, PredRegs, IntRegs, ModRegs, HvxVR, 
23285
    /* V6_vS32b_nt_qpred_ai */
23286
    HvxQR, IntRegs, s4_0Imm, HvxVR, 
23287
    /* V6_vS32b_nt_qpred_pi */
23288
    IntRegs, HvxQR, IntRegs, s3_0Imm, HvxVR, 
23289
    /* V6_vS32b_nt_qpred_ppu */
23290
    IntRegs, HvxQR, IntRegs, ModRegs, HvxVR, 
23291
    /* V6_vS32b_pi */
23292
    IntRegs, IntRegs, s3_0Imm, HvxVR, 
23293
    /* V6_vS32b_ppu */
23294
    IntRegs, IntRegs, ModRegs, HvxVR, 
23295
    /* V6_vS32b_pred_ai */
23296
    PredRegs, IntRegs, s4_0Imm, HvxVR, 
23297
    /* V6_vS32b_pred_pi */
23298
    IntRegs, PredRegs, IntRegs, s3_0Imm, HvxVR, 
23299
    /* V6_vS32b_pred_ppu */
23300
    IntRegs, PredRegs, IntRegs, ModRegs, HvxVR, 
23301
    /* V6_vS32b_qpred_ai */
23302
    HvxQR, IntRegs, s4_0Imm, HvxVR, 
23303
    /* V6_vS32b_qpred_pi */
23304
    IntRegs, HvxQR, IntRegs, s3_0Imm, HvxVR, 
23305
    /* V6_vS32b_qpred_ppu */
23306
    IntRegs, HvxQR, IntRegs, ModRegs, HvxVR, 
23307
    /* V6_vS32b_srls_ai */
23308
    IntRegs, s4_0Imm, 
23309
    /* V6_vS32b_srls_pi */
23310
    IntRegs, IntRegs, s3_0Imm, 
23311
    /* V6_vS32b_srls_ppu */
23312
    IntRegs, IntRegs, ModRegs, 
23313
    /* V6_vabs_hf */
23314
    HvxVR, HvxVR, 
23315
    /* V6_vabs_sf */
23316
    HvxVR, HvxVR, 
23317
    /* V6_vabsb */
23318
    HvxVR, HvxVR, 
23319
    /* V6_vabsb_sat */
23320
    HvxVR, HvxVR, 
23321
    /* V6_vabsdiffh */
23322
    HvxVR, HvxVR, HvxVR, 
23323
    /* V6_vabsdiffub */
23324
    HvxVR, HvxVR, HvxVR, 
23325
    /* V6_vabsdiffuh */
23326
    HvxVR, HvxVR, HvxVR, 
23327
    /* V6_vabsdiffw */
23328
    HvxVR, HvxVR, HvxVR, 
23329
    /* V6_vabsh */
23330
    HvxVR, HvxVR, 
23331
    /* V6_vabsh_sat */
23332
    HvxVR, HvxVR, 
23333
    /* V6_vabsw */
23334
    HvxVR, HvxVR, 
23335
    /* V6_vabsw_sat */
23336
    HvxVR, HvxVR, 
23337
    /* V6_vadd_hf */
23338
    HvxVR, HvxVR, HvxVR, 
23339
    /* V6_vadd_hf_hf */
23340
    HvxVR, HvxVR, HvxVR, 
23341
    /* V6_vadd_qf16 */
23342
    HvxVR, HvxVR, HvxVR, 
23343
    /* V6_vadd_qf16_mix */
23344
    HvxVR, HvxVR, HvxVR, 
23345
    /* V6_vadd_qf32 */
23346
    HvxVR, HvxVR, HvxVR, 
23347
    /* V6_vadd_qf32_mix */
23348
    HvxVR, HvxVR, HvxVR, 
23349
    /* V6_vadd_sf */
23350
    HvxVR, HvxVR, HvxVR, 
23351
    /* V6_vadd_sf_bf */
23352
    HvxWR, HvxVR, HvxVR, 
23353
    /* V6_vadd_sf_hf */
23354
    HvxWR, HvxVR, HvxVR, 
23355
    /* V6_vadd_sf_sf */
23356
    HvxVR, HvxVR, HvxVR, 
23357
    /* V6_vaddb */
23358
    HvxVR, HvxVR, HvxVR, 
23359
    /* V6_vaddb_dv */
23360
    HvxWR, HvxWR, HvxWR, 
23361
    /* V6_vaddbnq */
23362
    HvxVR, HvxQR, HvxVR, HvxVR, 
23363
    /* V6_vaddbq */
23364
    HvxVR, HvxQR, HvxVR, HvxVR, 
23365
    /* V6_vaddbsat */
23366
    HvxVR, HvxVR, HvxVR, 
23367
    /* V6_vaddbsat_dv */
23368
    HvxWR, HvxWR, HvxWR, 
23369
    /* V6_vaddcarry */
23370
    HvxVR, HvxQR, HvxVR, HvxVR, HvxQR, 
23371
    /* V6_vaddcarryo */
23372
    HvxVR, HvxQR, HvxVR, HvxVR, 
23373
    /* V6_vaddcarrysat */
23374
    HvxVR, HvxVR, HvxVR, HvxQR, 
23375
    /* V6_vaddclbh */
23376
    HvxVR, HvxVR, HvxVR, 
23377
    /* V6_vaddclbw */
23378
    HvxVR, HvxVR, HvxVR, 
23379
    /* V6_vaddh */
23380
    HvxVR, HvxVR, HvxVR, 
23381
    /* V6_vaddh_dv */
23382
    HvxWR, HvxWR, HvxWR, 
23383
    /* V6_vaddhnq */
23384
    HvxVR, HvxQR, HvxVR, HvxVR, 
23385
    /* V6_vaddhq */
23386
    HvxVR, HvxQR, HvxVR, HvxVR, 
23387
    /* V6_vaddhsat */
23388
    HvxVR, HvxVR, HvxVR, 
23389
    /* V6_vaddhsat_dv */
23390
    HvxWR, HvxWR, HvxWR, 
23391
    /* V6_vaddhw */
23392
    HvxWR, HvxVR, HvxVR, 
23393
    /* V6_vaddhw_acc */
23394
    HvxWR, HvxWR, HvxVR, HvxVR, 
23395
    /* V6_vaddubh */
23396
    HvxWR, HvxVR, HvxVR, 
23397
    /* V6_vaddubh_acc */
23398
    HvxWR, HvxWR, HvxVR, HvxVR, 
23399
    /* V6_vaddubsat */
23400
    HvxVR, HvxVR, HvxVR, 
23401
    /* V6_vaddubsat_dv */
23402
    HvxWR, HvxWR, HvxWR, 
23403
    /* V6_vaddububb_sat */
23404
    HvxVR, HvxVR, HvxVR, 
23405
    /* V6_vadduhsat */
23406
    HvxVR, HvxVR, HvxVR, 
23407
    /* V6_vadduhsat_dv */
23408
    HvxWR, HvxWR, HvxWR, 
23409
    /* V6_vadduhw */
23410
    HvxWR, HvxVR, HvxVR, 
23411
    /* V6_vadduhw_acc */
23412
    HvxWR, HvxWR, HvxVR, HvxVR, 
23413
    /* V6_vadduwsat */
23414
    HvxVR, HvxVR, HvxVR, 
23415
    /* V6_vadduwsat_dv */
23416
    HvxWR, HvxWR, HvxWR, 
23417
    /* V6_vaddw */
23418
    HvxVR, HvxVR, HvxVR, 
23419
    /* V6_vaddw_dv */
23420
    HvxWR, HvxWR, HvxWR, 
23421
    /* V6_vaddwnq */
23422
    HvxVR, HvxQR, HvxVR, HvxVR, 
23423
    /* V6_vaddwq */
23424
    HvxVR, HvxQR, HvxVR, HvxVR, 
23425
    /* V6_vaddwsat */
23426
    HvxVR, HvxVR, HvxVR, 
23427
    /* V6_vaddwsat_dv */
23428
    HvxWR, HvxWR, HvxWR, 
23429
    /* V6_valignb */
23430
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23431
    /* V6_valignbi */
23432
    HvxVR, HvxVR, HvxVR, u3_0Imm, 
23433
    /* V6_vand */
23434
    HvxVR, HvxVR, HvxVR, 
23435
    /* V6_vandnqrt */
23436
    HvxVR, HvxQR, IntRegs, 
23437
    /* V6_vandnqrt_acc */
23438
    HvxVR, HvxVR, HvxQR, IntRegs, 
23439
    /* V6_vandqrt */
23440
    HvxVR, HvxQR, IntRegs, 
23441
    /* V6_vandqrt_acc */
23442
    HvxVR, HvxVR, HvxQR, IntRegs, 
23443
    /* V6_vandvnqv */
23444
    HvxVR, HvxQR, HvxVR, 
23445
    /* V6_vandvqv */
23446
    HvxVR, HvxQR, HvxVR, 
23447
    /* V6_vandvrt */
23448
    HvxQR, HvxVR, IntRegs, 
23449
    /* V6_vandvrt_acc */
23450
    HvxQR, HvxQR, HvxVR, IntRegs, 
23451
    /* V6_vaslh */
23452
    HvxVR, HvxVR, IntRegs, 
23453
    /* V6_vaslh_acc */
23454
    HvxVR, HvxVR, HvxVR, IntRegs, 
23455
    /* V6_vaslhv */
23456
    HvxVR, HvxVR, HvxVR, 
23457
    /* V6_vaslw */
23458
    HvxVR, HvxVR, IntRegs, 
23459
    /* V6_vaslw_acc */
23460
    HvxVR, HvxVR, HvxVR, IntRegs, 
23461
    /* V6_vaslwv */
23462
    HvxVR, HvxVR, HvxVR, 
23463
    /* V6_vasr_into */
23464
    HvxWR, HvxWR, HvxVR, HvxVR, 
23465
    /* V6_vasrh */
23466
    HvxVR, HvxVR, IntRegs, 
23467
    /* V6_vasrh_acc */
23468
    HvxVR, HvxVR, HvxVR, IntRegs, 
23469
    /* V6_vasrhbrndsat */
23470
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23471
    /* V6_vasrhbsat */
23472
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23473
    /* V6_vasrhubrndsat */
23474
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23475
    /* V6_vasrhubsat */
23476
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23477
    /* V6_vasrhv */
23478
    HvxVR, HvxVR, HvxVR, 
23479
    /* V6_vasruhubrndsat */
23480
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23481
    /* V6_vasruhubsat */
23482
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23483
    /* V6_vasruwuhrndsat */
23484
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23485
    /* V6_vasruwuhsat */
23486
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23487
    /* V6_vasrvuhubrndsat */
23488
    HvxVR, HvxWR, HvxVR, 
23489
    /* V6_vasrvuhubsat */
23490
    HvxVR, HvxWR, HvxVR, 
23491
    /* V6_vasrvwuhrndsat */
23492
    HvxVR, HvxWR, HvxVR, 
23493
    /* V6_vasrvwuhsat */
23494
    HvxVR, HvxWR, HvxVR, 
23495
    /* V6_vasrw */
23496
    HvxVR, HvxVR, IntRegs, 
23497
    /* V6_vasrw_acc */
23498
    HvxVR, HvxVR, HvxVR, IntRegs, 
23499
    /* V6_vasrwh */
23500
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23501
    /* V6_vasrwhrndsat */
23502
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23503
    /* V6_vasrwhsat */
23504
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23505
    /* V6_vasrwuhrndsat */
23506
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23507
    /* V6_vasrwuhsat */
23508
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23509
    /* V6_vasrwv */
23510
    HvxVR, HvxVR, HvxVR, 
23511
    /* V6_vassign */
23512
    HvxVR, HvxVR, 
23513
    /* V6_vassign_fp */
23514
    HvxVR, HvxVR, 
23515
    /* V6_vassign_tmp */
23516
    HvxVR, HvxVR, 
23517
    /* V6_vavgb */
23518
    HvxVR, HvxVR, HvxVR, 
23519
    /* V6_vavgbrnd */
23520
    HvxVR, HvxVR, HvxVR, 
23521
    /* V6_vavgh */
23522
    HvxVR, HvxVR, HvxVR, 
23523
    /* V6_vavghrnd */
23524
    HvxVR, HvxVR, HvxVR, 
23525
    /* V6_vavgub */
23526
    HvxVR, HvxVR, HvxVR, 
23527
    /* V6_vavgubrnd */
23528
    HvxVR, HvxVR, HvxVR, 
23529
    /* V6_vavguh */
23530
    HvxVR, HvxVR, HvxVR, 
23531
    /* V6_vavguhrnd */
23532
    HvxVR, HvxVR, HvxVR, 
23533
    /* V6_vavguw */
23534
    HvxVR, HvxVR, HvxVR, 
23535
    /* V6_vavguwrnd */
23536
    HvxVR, HvxVR, HvxVR, 
23537
    /* V6_vavgw */
23538
    HvxVR, HvxVR, HvxVR, 
23539
    /* V6_vavgwrnd */
23540
    HvxVR, HvxVR, HvxVR, 
23541
    /* V6_vccombine */
23542
    HvxWR, PredRegs, HvxVR, HvxVR, 
23543
    /* V6_vcl0h */
23544
    HvxVR, HvxVR, 
23545
    /* V6_vcl0w */
23546
    HvxVR, HvxVR, 
23547
    /* V6_vcmov */
23548
    HvxVR, PredRegs, HvxVR, 
23549
    /* V6_vcombine */
23550
    HvxWR, HvxVR, HvxVR, 
23551
    /* V6_vcombine_tmp */
23552
    HvxWR, HvxVR, HvxVR, 
23553
    /* V6_vconv_h_hf */
23554
    HvxVR, HvxVR, 
23555
    /* V6_vconv_hf_h */
23556
    HvxVR, HvxVR, 
23557
    /* V6_vconv_hf_qf16 */
23558
    HvxVR, HvxVR, 
23559
    /* V6_vconv_hf_qf32 */
23560
    HvxVR, HvxWR, 
23561
    /* V6_vconv_sf_qf32 */
23562
    HvxVR, HvxVR, 
23563
    /* V6_vconv_sf_w */
23564
    HvxVR, HvxVR, 
23565
    /* V6_vconv_w_sf */
23566
    HvxVR, HvxVR, 
23567
    /* V6_vcvt_b_hf */
23568
    HvxVR, HvxVR, HvxVR, 
23569
    /* V6_vcvt_bf_sf */
23570
    HvxVR, HvxVR, HvxVR, 
23571
    /* V6_vcvt_h_hf */
23572
    HvxVR, HvxVR, 
23573
    /* V6_vcvt_hf_b */
23574
    HvxWR, HvxVR, 
23575
    /* V6_vcvt_hf_h */
23576
    HvxVR, HvxVR, 
23577
    /* V6_vcvt_hf_sf */
23578
    HvxVR, HvxVR, HvxVR, 
23579
    /* V6_vcvt_hf_ub */
23580
    HvxWR, HvxVR, 
23581
    /* V6_vcvt_hf_uh */
23582
    HvxVR, HvxVR, 
23583
    /* V6_vcvt_sf_hf */
23584
    HvxWR, HvxVR, 
23585
    /* V6_vcvt_ub_hf */
23586
    HvxVR, HvxVR, HvxVR, 
23587
    /* V6_vcvt_uh_hf */
23588
    HvxVR, HvxVR, 
23589
    /* V6_vdeal */
23590
    HvxVR, HvxVR, HvxVR, HvxVR, IntRegs, 
23591
    /* V6_vdealb */
23592
    HvxVR, HvxVR, 
23593
    /* V6_vdealb4w */
23594
    HvxVR, HvxVR, HvxVR, 
23595
    /* V6_vdealh */
23596
    HvxVR, HvxVR, 
23597
    /* V6_vdealvdd */
23598
    HvxWR, HvxVR, HvxVR, IntRegsLow8, 
23599
    /* V6_vdelta */
23600
    HvxVR, HvxVR, HvxVR, 
23601
    /* V6_vdmpy_sf_hf */
23602
    HvxVR, HvxVR, HvxVR, 
23603
    /* V6_vdmpy_sf_hf_acc */
23604
    HvxVR, HvxVR, HvxVR, HvxVR, 
23605
    /* V6_vdmpybus */
23606
    HvxVR, HvxVR, IntRegs, 
23607
    /* V6_vdmpybus_acc */
23608
    HvxVR, HvxVR, HvxVR, IntRegs, 
23609
    /* V6_vdmpybus_dv */
23610
    HvxWR, HvxWR, IntRegs, 
23611
    /* V6_vdmpybus_dv_acc */
23612
    HvxWR, HvxWR, HvxWR, IntRegs, 
23613
    /* V6_vdmpyhb */
23614
    HvxVR, HvxVR, IntRegs, 
23615
    /* V6_vdmpyhb_acc */
23616
    HvxVR, HvxVR, HvxVR, IntRegs, 
23617
    /* V6_vdmpyhb_dv */
23618
    HvxWR, HvxWR, IntRegs, 
23619
    /* V6_vdmpyhb_dv_acc */
23620
    HvxWR, HvxWR, HvxWR, IntRegs, 
23621
    /* V6_vdmpyhisat */
23622
    HvxVR, HvxWR, IntRegs, 
23623
    /* V6_vdmpyhisat_acc */
23624
    HvxVR, HvxVR, HvxWR, IntRegs, 
23625
    /* V6_vdmpyhsat */
23626
    HvxVR, HvxVR, IntRegs, 
23627
    /* V6_vdmpyhsat_acc */
23628
    HvxVR, HvxVR, HvxVR, IntRegs, 
23629
    /* V6_vdmpyhsuisat */
23630
    HvxVR, HvxWR, IntRegs, 
23631
    /* V6_vdmpyhsuisat_acc */
23632
    HvxVR, HvxVR, HvxWR, IntRegs, 
23633
    /* V6_vdmpyhsusat */
23634
    HvxVR, HvxVR, IntRegs, 
23635
    /* V6_vdmpyhsusat_acc */
23636
    HvxVR, HvxVR, HvxVR, IntRegs, 
23637
    /* V6_vdmpyhvsat */
23638
    HvxVR, HvxVR, HvxVR, 
23639
    /* V6_vdmpyhvsat_acc */
23640
    HvxVR, HvxVR, HvxVR, HvxVR, 
23641
    /* V6_vdsaduh */
23642
    HvxWR, HvxWR, IntRegs, 
23643
    /* V6_vdsaduh_acc */
23644
    HvxWR, HvxWR, HvxWR, IntRegs, 
23645
    /* V6_veqb */
23646
    HvxQR, HvxVR, HvxVR, 
23647
    /* V6_veqb_and */
23648
    HvxQR, HvxQR, HvxVR, HvxVR, 
23649
    /* V6_veqb_or */
23650
    HvxQR, HvxQR, HvxVR, HvxVR, 
23651
    /* V6_veqb_xor */
23652
    HvxQR, HvxQR, HvxVR, HvxVR, 
23653
    /* V6_veqh */
23654
    HvxQR, HvxVR, HvxVR, 
23655
    /* V6_veqh_and */
23656
    HvxQR, HvxQR, HvxVR, HvxVR, 
23657
    /* V6_veqh_or */
23658
    HvxQR, HvxQR, HvxVR, HvxVR, 
23659
    /* V6_veqh_xor */
23660
    HvxQR, HvxQR, HvxVR, HvxVR, 
23661
    /* V6_veqw */
23662
    HvxQR, HvxVR, HvxVR, 
23663
    /* V6_veqw_and */
23664
    HvxQR, HvxQR, HvxVR, HvxVR, 
23665
    /* V6_veqw_or */
23666
    HvxQR, HvxQR, HvxVR, HvxVR, 
23667
    /* V6_veqw_xor */
23668
    HvxQR, HvxQR, HvxVR, HvxVR, 
23669
    /* V6_vfmax_hf */
23670
    HvxVR, HvxVR, HvxVR, 
23671
    /* V6_vfmax_sf */
23672
    HvxVR, HvxVR, HvxVR, 
23673
    /* V6_vfmin_hf */
23674
    HvxVR, HvxVR, HvxVR, 
23675
    /* V6_vfmin_sf */
23676
    HvxVR, HvxVR, HvxVR, 
23677
    /* V6_vfneg_hf */
23678
    HvxVR, HvxVR, 
23679
    /* V6_vfneg_sf */
23680
    HvxVR, HvxVR, 
23681
    /* V6_vgathermh */
23682
    IntRegs, ModRegs, HvxVR, 
23683
    /* V6_vgathermhq */
23684
    HvxQR, IntRegs, ModRegs, HvxVR, 
23685
    /* V6_vgathermhw */
23686
    IntRegs, ModRegs, HvxWR, 
23687
    /* V6_vgathermhwq */
23688
    HvxQR, IntRegs, ModRegs, HvxWR, 
23689
    /* V6_vgathermw */
23690
    IntRegs, ModRegs, HvxVR, 
23691
    /* V6_vgathermwq */
23692
    HvxQR, IntRegs, ModRegs, HvxVR, 
23693
    /* V6_vgtb */
23694
    HvxQR, HvxVR, HvxVR, 
23695
    /* V6_vgtb_and */
23696
    HvxQR, HvxQR, HvxVR, HvxVR, 
23697
    /* V6_vgtb_or */
23698
    HvxQR, HvxQR, HvxVR, HvxVR, 
23699
    /* V6_vgtb_xor */
23700
    HvxQR, HvxQR, HvxVR, HvxVR, 
23701
    /* V6_vgtbf */
23702
    HvxQR, HvxVR, HvxVR, 
23703
    /* V6_vgtbf_and */
23704
    HvxQR, HvxQR, HvxVR, HvxVR, 
23705
    /* V6_vgtbf_or */
23706
    HvxQR, HvxQR, HvxVR, HvxVR, 
23707
    /* V6_vgtbf_xor */
23708
    HvxQR, HvxQR, HvxVR, HvxVR, 
23709
    /* V6_vgth */
23710
    HvxQR, HvxVR, HvxVR, 
23711
    /* V6_vgth_and */
23712
    HvxQR, HvxQR, HvxVR, HvxVR, 
23713
    /* V6_vgth_or */
23714
    HvxQR, HvxQR, HvxVR, HvxVR, 
23715
    /* V6_vgth_xor */
23716
    HvxQR, HvxQR, HvxVR, HvxVR, 
23717
    /* V6_vgthf */
23718
    HvxQR, HvxVR, HvxVR, 
23719
    /* V6_vgthf_and */
23720
    HvxQR, HvxQR, HvxVR, HvxVR, 
23721
    /* V6_vgthf_or */
23722
    HvxQR, HvxQR, HvxVR, HvxVR, 
23723
    /* V6_vgthf_xor */
23724
    HvxQR, HvxQR, HvxVR, HvxVR, 
23725
    /* V6_vgtsf */
23726
    HvxQR, HvxVR, HvxVR, 
23727
    /* V6_vgtsf_and */
23728
    HvxQR, HvxQR, HvxVR, HvxVR, 
23729
    /* V6_vgtsf_or */
23730
    HvxQR, HvxQR, HvxVR, HvxVR, 
23731
    /* V6_vgtsf_xor */
23732
    HvxQR, HvxQR, HvxVR, HvxVR, 
23733
    /* V6_vgtub */
23734
    HvxQR, HvxVR, HvxVR, 
23735
    /* V6_vgtub_and */
23736
    HvxQR, HvxQR, HvxVR, HvxVR, 
23737
    /* V6_vgtub_or */
23738
    HvxQR, HvxQR, HvxVR, HvxVR, 
23739
    /* V6_vgtub_xor */
23740
    HvxQR, HvxQR, HvxVR, HvxVR, 
23741
    /* V6_vgtuh */
23742
    HvxQR, HvxVR, HvxVR, 
23743
    /* V6_vgtuh_and */
23744
    HvxQR, HvxQR, HvxVR, HvxVR, 
23745
    /* V6_vgtuh_or */
23746
    HvxQR, HvxQR, HvxVR, HvxVR, 
23747
    /* V6_vgtuh_xor */
23748
    HvxQR, HvxQR, HvxVR, HvxVR, 
23749
    /* V6_vgtuw */
23750
    HvxQR, HvxVR, HvxVR, 
23751
    /* V6_vgtuw_and */
23752
    HvxQR, HvxQR, HvxVR, HvxVR, 
23753
    /* V6_vgtuw_or */
23754
    HvxQR, HvxQR, HvxVR, HvxVR, 
23755
    /* V6_vgtuw_xor */
23756
    HvxQR, HvxQR, HvxVR, HvxVR, 
23757
    /* V6_vgtw */
23758
    HvxQR, HvxVR, HvxVR, 
23759
    /* V6_vgtw_and */
23760
    HvxQR, HvxQR, HvxVR, HvxVR, 
23761
    /* V6_vgtw_or */
23762
    HvxQR, HvxQR, HvxVR, HvxVR, 
23763
    /* V6_vgtw_xor */
23764
    HvxQR, HvxQR, HvxVR, HvxVR, 
23765
    /* V6_vhist */
23766
    /* V6_vhistq */
23767
    HvxQR, 
23768
    /* V6_vinsertwr */
23769
    HvxVR, HvxVR, IntRegs, 
23770
    /* V6_vlalignb */
23771
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23772
    /* V6_vlalignbi */
23773
    HvxVR, HvxVR, HvxVR, u3_0Imm, 
23774
    /* V6_vlsrb */
23775
    HvxVR, HvxVR, IntRegs, 
23776
    /* V6_vlsrh */
23777
    HvxVR, HvxVR, IntRegs, 
23778
    /* V6_vlsrhv */
23779
    HvxVR, HvxVR, HvxVR, 
23780
    /* V6_vlsrw */
23781
    HvxVR, HvxVR, IntRegs, 
23782
    /* V6_vlsrwv */
23783
    HvxVR, HvxVR, HvxVR, 
23784
    /* V6_vlut4 */
23785
    HvxVR, HvxVR, DoubleRegs, 
23786
    /* V6_vlutvvb */
23787
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23788
    /* V6_vlutvvb_nm */
23789
    HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23790
    /* V6_vlutvvb_oracc */
23791
    HvxVR, HvxVR, HvxVR, HvxVR, IntRegsLow8, 
23792
    /* V6_vlutvvb_oracci */
23793
    HvxVR, HvxVR, HvxVR, HvxVR, u3_0Imm, 
23794
    /* V6_vlutvvbi */
23795
    HvxVR, HvxVR, HvxVR, u3_0Imm, 
23796
    /* V6_vlutvwh */
23797
    HvxWR, HvxVR, HvxVR, IntRegsLow8, 
23798
    /* V6_vlutvwh_nm */
23799
    HvxWR, HvxVR, HvxVR, IntRegsLow8, 
23800
    /* V6_vlutvwh_oracc */
23801
    HvxWR, HvxWR, HvxVR, HvxVR, IntRegsLow8, 
23802
    /* V6_vlutvwh_oracci */
23803
    HvxWR, HvxWR, HvxVR, HvxVR, u3_0Imm, 
23804
    /* V6_vlutvwhi */
23805
    HvxWR, HvxVR, HvxVR, u3_0Imm, 
23806
    /* V6_vmax_bf */
23807
    HvxVR, HvxVR, HvxVR, 
23808
    /* V6_vmax_hf */
23809
    HvxVR, HvxVR, HvxVR, 
23810
    /* V6_vmax_sf */
23811
    HvxVR, HvxVR, HvxVR, 
23812
    /* V6_vmaxb */
23813
    HvxVR, HvxVR, HvxVR, 
23814
    /* V6_vmaxh */
23815
    HvxVR, HvxVR, HvxVR, 
23816
    /* V6_vmaxub */
23817
    HvxVR, HvxVR, HvxVR, 
23818
    /* V6_vmaxuh */
23819
    HvxVR, HvxVR, HvxVR, 
23820
    /* V6_vmaxw */
23821
    HvxVR, HvxVR, HvxVR, 
23822
    /* V6_vmin_bf */
23823
    HvxVR, HvxVR, HvxVR, 
23824
    /* V6_vmin_hf */
23825
    HvxVR, HvxVR, HvxVR, 
23826
    /* V6_vmin_sf */
23827
    HvxVR, HvxVR, HvxVR, 
23828
    /* V6_vminb */
23829
    HvxVR, HvxVR, HvxVR, 
23830
    /* V6_vminh */
23831
    HvxVR, HvxVR, HvxVR, 
23832
    /* V6_vminub */
23833
    HvxVR, HvxVR, HvxVR, 
23834
    /* V6_vminuh */
23835
    HvxVR, HvxVR, HvxVR, 
23836
    /* V6_vminw */
23837
    HvxVR, HvxVR, HvxVR, 
23838
    /* V6_vmpabus */
23839
    HvxWR, HvxWR, IntRegs, 
23840
    /* V6_vmpabus_acc */
23841
    HvxWR, HvxWR, HvxWR, IntRegs, 
23842
    /* V6_vmpabusv */
23843
    HvxWR, HvxWR, HvxWR, 
23844
    /* V6_vmpabuu */
23845
    HvxWR, HvxWR, IntRegs, 
23846
    /* V6_vmpabuu_acc */
23847
    HvxWR, HvxWR, HvxWR, IntRegs, 
23848
    /* V6_vmpabuuv */
23849
    HvxWR, HvxWR, HvxWR, 
23850
    /* V6_vmpahb */
23851
    HvxWR, HvxWR, IntRegs, 
23852
    /* V6_vmpahb_acc */
23853
    HvxWR, HvxWR, HvxWR, IntRegs, 
23854
    /* V6_vmpahhsat */
23855
    HvxVR, HvxVR, HvxVR, DoubleRegs, 
23856
    /* V6_vmpauhb */
23857
    HvxWR, HvxWR, IntRegs, 
23858
    /* V6_vmpauhb_acc */
23859
    HvxWR, HvxWR, HvxWR, IntRegs, 
23860
    /* V6_vmpauhuhsat */
23861
    HvxVR, HvxVR, HvxVR, DoubleRegs, 
23862
    /* V6_vmpsuhuhsat */
23863
    HvxVR, HvxVR, HvxVR, DoubleRegs, 
23864
    /* V6_vmpy_hf_hf */
23865
    HvxVR, HvxVR, HvxVR, 
23866
    /* V6_vmpy_hf_hf_acc */
23867
    HvxVR, HvxVR, HvxVR, HvxVR, 
23868
    /* V6_vmpy_qf16 */
23869
    HvxVR, HvxVR, HvxVR, 
23870
    /* V6_vmpy_qf16_hf */
23871
    HvxVR, HvxVR, HvxVR, 
23872
    /* V6_vmpy_qf16_mix_hf */
23873
    HvxVR, HvxVR, HvxVR, 
23874
    /* V6_vmpy_qf32 */
23875
    HvxVR, HvxVR, HvxVR, 
23876
    /* V6_vmpy_qf32_hf */
23877
    HvxWR, HvxVR, HvxVR, 
23878
    /* V6_vmpy_qf32_mix_hf */
23879
    HvxWR, HvxVR, HvxVR, 
23880
    /* V6_vmpy_qf32_qf16 */
23881
    HvxWR, HvxVR, HvxVR, 
23882
    /* V6_vmpy_qf32_sf */
23883
    HvxVR, HvxVR, HvxVR, 
23884
    /* V6_vmpy_sf_bf */
23885
    HvxWR, HvxVR, HvxVR, 
23886
    /* V6_vmpy_sf_bf_acc */
23887
    HvxWR, HvxWR, HvxVR, HvxVR, 
23888
    /* V6_vmpy_sf_hf */
23889
    HvxWR, HvxVR, HvxVR, 
23890
    /* V6_vmpy_sf_hf_acc */
23891
    HvxWR, HvxWR, HvxVR, HvxVR, 
23892
    /* V6_vmpy_sf_sf */
23893
    HvxVR, HvxVR, HvxVR, 
23894
    /* V6_vmpybus */
23895
    HvxWR, HvxVR, IntRegs, 
23896
    /* V6_vmpybus_acc */
23897
    HvxWR, HvxWR, HvxVR, IntRegs, 
23898
    /* V6_vmpybusv */
23899
    HvxWR, HvxVR, HvxVR, 
23900
    /* V6_vmpybusv_acc */
23901
    HvxWR, HvxWR, HvxVR, HvxVR, 
23902
    /* V6_vmpybv */
23903
    HvxWR, HvxVR, HvxVR, 
23904
    /* V6_vmpybv_acc */
23905
    HvxWR, HvxWR, HvxVR, HvxVR, 
23906
    /* V6_vmpyewuh */
23907
    HvxVR, HvxVR, HvxVR, 
23908
    /* V6_vmpyewuh_64 */
23909
    HvxWR, HvxVR, HvxVR, 
23910
    /* V6_vmpyh */
23911
    HvxWR, HvxVR, IntRegs, 
23912
    /* V6_vmpyh_acc */
23913
    HvxWR, HvxWR, HvxVR, IntRegs, 
23914
    /* V6_vmpyhsat_acc */
23915
    HvxWR, HvxWR, HvxVR, IntRegs, 
23916
    /* V6_vmpyhsrs */
23917
    HvxVR, HvxVR, IntRegs, 
23918
    /* V6_vmpyhss */
23919
    HvxVR, HvxVR, IntRegs, 
23920
    /* V6_vmpyhus */
23921
    HvxWR, HvxVR, HvxVR, 
23922
    /* V6_vmpyhus_acc */
23923
    HvxWR, HvxWR, HvxVR, HvxVR, 
23924
    /* V6_vmpyhv */
23925
    HvxWR, HvxVR, HvxVR, 
23926
    /* V6_vmpyhv_acc */
23927
    HvxWR, HvxWR, HvxVR, HvxVR, 
23928
    /* V6_vmpyhvsrs */
23929
    HvxVR, HvxVR, HvxVR, 
23930
    /* V6_vmpyieoh */
23931
    HvxVR, HvxVR, HvxVR, 
23932
    /* V6_vmpyiewh_acc */
23933
    HvxVR, HvxVR, HvxVR, HvxVR, 
23934
    /* V6_vmpyiewuh */
23935
    HvxVR, HvxVR, HvxVR, 
23936
    /* V6_vmpyiewuh_acc */
23937
    HvxVR, HvxVR, HvxVR, HvxVR, 
23938
    /* V6_vmpyih */
23939
    HvxVR, HvxVR, HvxVR, 
23940
    /* V6_vmpyih_acc */
23941
    HvxVR, HvxVR, HvxVR, HvxVR, 
23942
    /* V6_vmpyihb */
23943
    HvxVR, HvxVR, IntRegs, 
23944
    /* V6_vmpyihb_acc */
23945
    HvxVR, HvxVR, HvxVR, IntRegs, 
23946
    /* V6_vmpyiowh */
23947
    HvxVR, HvxVR, HvxVR, 
23948
    /* V6_vmpyiwb */
23949
    HvxVR, HvxVR, IntRegs, 
23950
    /* V6_vmpyiwb_acc */
23951
    HvxVR, HvxVR, HvxVR, IntRegs, 
23952
    /* V6_vmpyiwh */
23953
    HvxVR, HvxVR, IntRegs, 
23954
    /* V6_vmpyiwh_acc */
23955
    HvxVR, HvxVR, HvxVR, IntRegs, 
23956
    /* V6_vmpyiwub */
23957
    HvxVR, HvxVR, IntRegs, 
23958
    /* V6_vmpyiwub_acc */
23959
    HvxVR, HvxVR, HvxVR, IntRegs, 
23960
    /* V6_vmpyowh */
23961
    HvxVR, HvxVR, HvxVR, 
23962
    /* V6_vmpyowh_64_acc */
23963
    HvxWR, HvxWR, HvxVR, HvxVR, 
23964
    /* V6_vmpyowh_rnd */
23965
    HvxVR, HvxVR, HvxVR, 
23966
    /* V6_vmpyowh_rnd_sacc */
23967
    HvxVR, HvxVR, HvxVR, HvxVR, 
23968
    /* V6_vmpyowh_sacc */
23969
    HvxVR, HvxVR, HvxVR, HvxVR, 
23970
    /* V6_vmpyub */
23971
    HvxWR, HvxVR, IntRegs, 
23972
    /* V6_vmpyub_acc */
23973
    HvxWR, HvxWR, HvxVR, IntRegs, 
23974
    /* V6_vmpyubv */
23975
    HvxWR, HvxVR, HvxVR, 
23976
    /* V6_vmpyubv_acc */
23977
    HvxWR, HvxWR, HvxVR, HvxVR, 
23978
    /* V6_vmpyuh */
23979
    HvxWR, HvxVR, IntRegs, 
23980
    /* V6_vmpyuh_acc */
23981
    HvxWR, HvxWR, HvxVR, IntRegs, 
23982
    /* V6_vmpyuhe */
23983
    HvxVR, HvxVR, IntRegs, 
23984
    /* V6_vmpyuhe_acc */
23985
    HvxVR, HvxVR, HvxVR, IntRegs, 
23986
    /* V6_vmpyuhv */
23987
    HvxWR, HvxVR, HvxVR, 
23988
    /* V6_vmpyuhv_acc */
23989
    HvxWR, HvxWR, HvxVR, HvxVR, 
23990
    /* V6_vmpyuhvs */
23991
    HvxVR, HvxVR, HvxVR, 
23992
    /* V6_vmux */
23993
    HvxVR, HvxQR, HvxVR, HvxVR, 
23994
    /* V6_vnavgb */
23995
    HvxVR, HvxVR, HvxVR, 
23996
    /* V6_vnavgh */
23997
    HvxVR, HvxVR, HvxVR, 
23998
    /* V6_vnavgub */
23999
    HvxVR, HvxVR, HvxVR, 
24000
    /* V6_vnavgw */
24001
    HvxVR, HvxVR, HvxVR, 
24002
    /* V6_vnccombine */
24003
    HvxWR, PredRegs, HvxVR, HvxVR, 
24004
    /* V6_vncmov */
24005
    HvxVR, PredRegs, HvxVR, 
24006
    /* V6_vnormamth */
24007
    HvxVR, HvxVR, 
24008
    /* V6_vnormamtw */
24009
    HvxVR, HvxVR, 
24010
    /* V6_vnot */
24011
    HvxVR, HvxVR, 
24012
    /* V6_vor */
24013
    HvxVR, HvxVR, HvxVR, 
24014
    /* V6_vpackeb */
24015
    HvxVR, HvxVR, HvxVR, 
24016
    /* V6_vpackeh */
24017
    HvxVR, HvxVR, HvxVR, 
24018
    /* V6_vpackhb_sat */
24019
    HvxVR, HvxVR, HvxVR, 
24020
    /* V6_vpackhub_sat */
24021
    HvxVR, HvxVR, HvxVR, 
24022
    /* V6_vpackob */
24023
    HvxVR, HvxVR, HvxVR, 
24024
    /* V6_vpackoh */
24025
    HvxVR, HvxVR, HvxVR, 
24026
    /* V6_vpackwh_sat */
24027
    HvxVR, HvxVR, HvxVR, 
24028
    /* V6_vpackwuh_sat */
24029
    HvxVR, HvxVR, HvxVR, 
24030
    /* V6_vpopcounth */
24031
    HvxVR, HvxVR, 
24032
    /* V6_vprefixqb */
24033
    HvxVR, HvxQR, 
24034
    /* V6_vprefixqh */
24035
    HvxVR, HvxQR, 
24036
    /* V6_vprefixqw */
24037
    HvxVR, HvxQR, 
24038
    /* V6_vrdelta */
24039
    HvxVR, HvxVR, HvxVR, 
24040
    /* V6_vrmpybub_rtt */
24041
    HvxWR, HvxVR, DoubleRegs, 
24042
    /* V6_vrmpybub_rtt_acc */
24043
    HvxWR, HvxWR, HvxVR, DoubleRegs, 
24044
    /* V6_vrmpybus */
24045
    HvxVR, HvxVR, IntRegs, 
24046
    /* V6_vrmpybus_acc */
24047
    HvxVR, HvxVR, HvxVR, IntRegs, 
24048
    /* V6_vrmpybusi */
24049
    HvxWR, HvxWR, IntRegs, u1_0Imm, 
24050
    /* V6_vrmpybusi_acc */
24051
    HvxWR, HvxWR, HvxWR, IntRegs, u1_0Imm, 
24052
    /* V6_vrmpybusv */
24053
    HvxVR, HvxVR, HvxVR, 
24054
    /* V6_vrmpybusv_acc */
24055
    HvxVR, HvxVR, HvxVR, HvxVR, 
24056
    /* V6_vrmpybv */
24057
    HvxVR, HvxVR, HvxVR, 
24058
    /* V6_vrmpybv_acc */
24059
    HvxVR, HvxVR, HvxVR, HvxVR, 
24060
    /* V6_vrmpyub */
24061
    HvxVR, HvxVR, IntRegs, 
24062
    /* V6_vrmpyub_acc */
24063
    HvxVR, HvxVR, HvxVR, IntRegs, 
24064
    /* V6_vrmpyub_rtt */
24065
    HvxWR, HvxVR, DoubleRegs, 
24066
    /* V6_vrmpyub_rtt_acc */
24067
    HvxWR, HvxWR, HvxVR, DoubleRegs, 
24068
    /* V6_vrmpyubi */
24069
    HvxWR, HvxWR, IntRegs, u1_0Imm, 
24070
    /* V6_vrmpyubi_acc */
24071
    HvxWR, HvxWR, HvxWR, IntRegs, u1_0Imm, 
24072
    /* V6_vrmpyubv */
24073
    HvxVR, HvxVR, HvxVR, 
24074
    /* V6_vrmpyubv_acc */
24075
    HvxVR, HvxVR, HvxVR, HvxVR, 
24076
    /* V6_vrmpyzbb_rt */
24077
    HvxVQR, HvxVR, IntRegsLow8, 
24078
    /* V6_vrmpyzbb_rt_acc */
24079
    HvxVQR, HvxVQR, HvxVR, IntRegsLow8, 
24080
    /* V6_vrmpyzbb_rx */
24081
    HvxVQR, IntRegsLow8, HvxVR, IntRegsLow8, 
24082
    /* V6_vrmpyzbb_rx_acc */
24083
    HvxVQR, IntRegsLow8, HvxVQR, HvxVR, IntRegsLow8, 
24084
    /* V6_vrmpyzbub_rt */
24085
    HvxVQR, HvxVR, IntRegsLow8, 
24086
    /* V6_vrmpyzbub_rt_acc */
24087
    HvxVQR, HvxVQR, HvxVR, IntRegsLow8, 
24088
    /* V6_vrmpyzbub_rx */
24089
    HvxVQR, IntRegsLow8, HvxVR, IntRegsLow8, 
24090
    /* V6_vrmpyzbub_rx_acc */
24091
    HvxVQR, IntRegsLow8, HvxVQR, HvxVR, IntRegsLow8, 
24092
    /* V6_vrmpyzcb_rt */
24093
    HvxVQR, HvxVR, IntRegsLow8, 
24094
    /* V6_vrmpyzcb_rt_acc */
24095
    HvxVQR, HvxVQR, HvxVR, IntRegsLow8, 
24096
    /* V6_vrmpyzcb_rx */
24097
    HvxVQR, IntRegsLow8, HvxVR, IntRegsLow8, 
24098
    /* V6_vrmpyzcb_rx_acc */
24099
    HvxVQR, IntRegsLow8, HvxVQR, HvxVR, IntRegsLow8, 
24100
    /* V6_vrmpyzcbs_rt */
24101
    HvxVQR, HvxVR, IntRegsLow8, 
24102
    /* V6_vrmpyzcbs_rt_acc */
24103
    HvxVQR, HvxVQR, HvxVR, IntRegsLow8, 
24104
    /* V6_vrmpyzcbs_rx */
24105
    HvxVQR, IntRegsLow8, HvxVR, IntRegsLow8, 
24106
    /* V6_vrmpyzcbs_rx_acc */
24107
    HvxVQR, IntRegsLow8, HvxVQR, HvxVR, IntRegsLow8, 
24108
    /* V6_vrmpyznb_rt */
24109
    HvxVQR, HvxVR, IntRegsLow8, 
24110
    /* V6_vrmpyznb_rt_acc */
24111
    HvxVQR, HvxVQR, HvxVR, IntRegsLow8, 
24112
    /* V6_vrmpyznb_rx */
24113
    HvxVQR, IntRegsLow8, HvxVR, IntRegsLow8, 
24114
    /* V6_vrmpyznb_rx_acc */
24115
    HvxVQR, IntRegsLow8, HvxVQR, HvxVR, IntRegsLow8, 
24116
    /* V6_vror */
24117
    HvxVR, HvxVR, IntRegs, 
24118
    /* V6_vrotr */
24119
    HvxVR, HvxVR, HvxVR, 
24120
    /* V6_vroundhb */
24121
    HvxVR, HvxVR, HvxVR, 
24122
    /* V6_vroundhub */
24123
    HvxVR, HvxVR, HvxVR, 
24124
    /* V6_vrounduhub */
24125
    HvxVR, HvxVR, HvxVR, 
24126
    /* V6_vrounduwuh */
24127
    HvxVR, HvxVR, HvxVR, 
24128
    /* V6_vroundwh */
24129
    HvxVR, HvxVR, HvxVR, 
24130
    /* V6_vroundwuh */
24131
    HvxVR, HvxVR, HvxVR, 
24132
    /* V6_vrsadubi */
24133
    HvxWR, HvxWR, IntRegs, u1_0Imm, 
24134
    /* V6_vrsadubi_acc */
24135
    HvxWR, HvxWR, HvxWR, IntRegs, u1_0Imm, 
24136
    /* V6_vsatdw */
24137
    HvxVR, HvxVR, HvxVR, 
24138
    /* V6_vsathub */
24139
    HvxVR, HvxVR, HvxVR, 
24140
    /* V6_vsatuwuh */
24141
    HvxVR, HvxVR, HvxVR, 
24142
    /* V6_vsatwh */
24143
    HvxVR, HvxVR, HvxVR, 
24144
    /* V6_vsb */
24145
    HvxWR, HvxVR, 
24146
    /* V6_vscattermh */
24147
    IntRegs, ModRegs, HvxVR, HvxVR, 
24148
    /* V6_vscattermh_add */
24149
    IntRegs, ModRegs, HvxVR, HvxVR, 
24150
    /* V6_vscattermhq */
24151
    HvxQR, IntRegs, ModRegs, HvxVR, HvxVR, 
24152
    /* V6_vscattermhw */
24153
    IntRegs, ModRegs, HvxWR, HvxVR, 
24154
    /* V6_vscattermhw_add */
24155
    IntRegs, ModRegs, HvxWR, HvxVR, 
24156
    /* V6_vscattermhwq */
24157
    HvxQR, IntRegs, ModRegs, HvxWR, HvxVR, 
24158
    /* V6_vscattermw */
24159
    IntRegs, ModRegs, HvxVR, HvxVR, 
24160
    /* V6_vscattermw_add */
24161
    IntRegs, ModRegs, HvxVR, HvxVR, 
24162
    /* V6_vscattermwq */
24163
    HvxQR, IntRegs, ModRegs, HvxVR, HvxVR, 
24164
    /* V6_vsh */
24165
    HvxWR, HvxVR, 
24166
    /* V6_vshufeh */
24167
    HvxVR, HvxVR, HvxVR, 
24168
    /* V6_vshuff */
24169
    HvxVR, HvxVR, HvxVR, HvxVR, IntRegs, 
24170
    /* V6_vshuffb */
24171
    HvxVR, HvxVR, 
24172
    /* V6_vshuffeb */
24173
    HvxVR, HvxVR, HvxVR, 
24174
    /* V6_vshuffh */
24175
    HvxVR, HvxVR, 
24176
    /* V6_vshuffob */
24177
    HvxVR, HvxVR, HvxVR, 
24178
    /* V6_vshuffvdd */
24179
    HvxWR, HvxVR, HvxVR, IntRegsLow8, 
24180
    /* V6_vshufoeb */
24181
    HvxWR, HvxVR, HvxVR, 
24182
    /* V6_vshufoeh */
24183
    HvxWR, HvxVR, HvxVR, 
24184
    /* V6_vshufoh */
24185
    HvxVR, HvxVR, HvxVR, 
24186
    /* V6_vsub_hf */
24187
    HvxVR, HvxVR, HvxVR, 
24188
    /* V6_vsub_hf_hf */
24189
    HvxVR, HvxVR, HvxVR, 
24190
    /* V6_vsub_qf16 */
24191
    HvxVR, HvxVR, HvxVR, 
24192
    /* V6_vsub_qf16_mix */
24193
    HvxVR, HvxVR, HvxVR, 
24194
    /* V6_vsub_qf32 */
24195
    HvxVR, HvxVR, HvxVR, 
24196
    /* V6_vsub_qf32_mix */
24197
    HvxVR, HvxVR, HvxVR, 
24198
    /* V6_vsub_sf */
24199
    HvxVR, HvxVR, HvxVR, 
24200
    /* V6_vsub_sf_bf */
24201
    HvxWR, HvxVR, HvxVR, 
24202
    /* V6_vsub_sf_hf */
24203
    HvxWR, HvxVR, HvxVR, 
24204
    /* V6_vsub_sf_sf */
24205
    HvxVR, HvxVR, HvxVR, 
24206
    /* V6_vsubb */
24207
    HvxVR, HvxVR, HvxVR, 
24208
    /* V6_vsubb_dv */
24209
    HvxWR, HvxWR, HvxWR, 
24210
    /* V6_vsubbnq */
24211
    HvxVR, HvxQR, HvxVR, HvxVR, 
24212
    /* V6_vsubbq */
24213
    HvxVR, HvxQR, HvxVR, HvxVR, 
24214
    /* V6_vsubbsat */
24215
    HvxVR, HvxVR, HvxVR, 
24216
    /* V6_vsubbsat_dv */
24217
    HvxWR, HvxWR, HvxWR, 
24218
    /* V6_vsubcarry */
24219
    HvxVR, HvxQR, HvxVR, HvxVR, HvxQR, 
24220
    /* V6_vsubcarryo */
24221
    HvxVR, HvxQR, HvxVR, HvxVR, 
24222
    /* V6_vsubh */
24223
    HvxVR, HvxVR, HvxVR, 
24224
    /* V6_vsubh_dv */
24225
    HvxWR, HvxWR, HvxWR, 
24226
    /* V6_vsubhnq */
24227
    HvxVR, HvxQR, HvxVR, HvxVR, 
24228
    /* V6_vsubhq */
24229
    HvxVR, HvxQR, HvxVR, HvxVR, 
24230
    /* V6_vsubhsat */
24231
    HvxVR, HvxVR, HvxVR, 
24232
    /* V6_vsubhsat_dv */
24233
    HvxWR, HvxWR, HvxWR, 
24234
    /* V6_vsubhw */
24235
    HvxWR, HvxVR, HvxVR, 
24236
    /* V6_vsububh */
24237
    HvxWR, HvxVR, HvxVR, 
24238
    /* V6_vsububsat */
24239
    HvxVR, HvxVR, HvxVR, 
24240
    /* V6_vsububsat_dv */
24241
    HvxWR, HvxWR, HvxWR, 
24242
    /* V6_vsubububb_sat */
24243
    HvxVR, HvxVR, HvxVR, 
24244
    /* V6_vsubuhsat */
24245
    HvxVR, HvxVR, HvxVR, 
24246
    /* V6_vsubuhsat_dv */
24247
    HvxWR, HvxWR, HvxWR, 
24248
    /* V6_vsubuhw */
24249
    HvxWR, HvxVR, HvxVR, 
24250
    /* V6_vsubuwsat */
24251
    HvxVR, HvxVR, HvxVR, 
24252
    /* V6_vsubuwsat_dv */
24253
    HvxWR, HvxWR, HvxWR, 
24254
    /* V6_vsubw */
24255
    HvxVR, HvxVR, HvxVR, 
24256
    /* V6_vsubw_dv */
24257
    HvxWR, HvxWR, HvxWR, 
24258
    /* V6_vsubwnq */
24259
    HvxVR, HvxQR, HvxVR, HvxVR, 
24260
    /* V6_vsubwq */
24261
    HvxVR, HvxQR, HvxVR, HvxVR, 
24262
    /* V6_vsubwsat */
24263
    HvxVR, HvxVR, HvxVR, 
24264
    /* V6_vsubwsat_dv */
24265
    HvxWR, HvxWR, HvxWR, 
24266
    /* V6_vswap */
24267
    HvxWR, HvxQR, HvxVR, HvxVR, 
24268
    /* V6_vtmpyb */
24269
    HvxWR, HvxWR, IntRegs, 
24270
    /* V6_vtmpyb_acc */
24271
    HvxWR, HvxWR, HvxWR, IntRegs, 
24272
    /* V6_vtmpybus */
24273
    HvxWR, HvxWR, IntRegs, 
24274
    /* V6_vtmpybus_acc */
24275
    HvxWR, HvxWR, HvxWR, IntRegs, 
24276
    /* V6_vtmpyhb */
24277
    HvxWR, HvxWR, IntRegs, 
24278
    /* V6_vtmpyhb_acc */
24279
    HvxWR, HvxWR, HvxWR, IntRegs, 
24280
    /* V6_vunpackb */
24281
    HvxWR, HvxVR, 
24282
    /* V6_vunpackh */
24283
    HvxWR, HvxVR, 
24284
    /* V6_vunpackob */
24285
    HvxWR, HvxWR, HvxVR, 
24286
    /* V6_vunpackoh */
24287
    HvxWR, HvxWR, HvxVR, 
24288
    /* V6_vunpackub */
24289
    HvxWR, HvxVR, 
24290
    /* V6_vunpackuh */
24291
    HvxWR, HvxVR, 
24292
    /* V6_vwhist128 */
24293
    /* V6_vwhist128m */
24294
    u1_0Imm, 
24295
    /* V6_vwhist128q */
24296
    HvxQR, 
24297
    /* V6_vwhist128qm */
24298
    HvxQR, u1_0Imm, 
24299
    /* V6_vwhist256 */
24300
    /* V6_vwhist256_sat */
24301
    /* V6_vwhist256q */
24302
    HvxQR, 
24303
    /* V6_vwhist256q_sat */
24304
    HvxQR, 
24305
    /* V6_vxor */
24306
    HvxVR, HvxVR, HvxVR, 
24307
    /* V6_vzb */
24308
    HvxWR, HvxVR, 
24309
    /* V6_vzh */
24310
    HvxWR, HvxVR, 
24311
    /* V6_zLd_ai */
24312
    IntRegs, s4_0Imm, 
24313
    /* V6_zLd_pi */
24314
    IntRegs, IntRegs, s3_0Imm, 
24315
    /* V6_zLd_ppu */
24316
    IntRegs, IntRegs, ModRegs, 
24317
    /* V6_zLd_pred_ai */
24318
    PredRegs, IntRegs, s4_0Imm, 
24319
    /* V6_zLd_pred_pi */
24320
    IntRegs, PredRegs, IntRegs, s3_0Imm, 
24321
    /* V6_zLd_pred_ppu */
24322
    IntRegs, PredRegs, IntRegs, ModRegs, 
24323
    /* V6_zextract */
24324
    HvxVR, IntRegs, 
24325
    /* Y2_barrier */
24326
    /* Y2_break */
24327
    /* Y2_ciad */
24328
    IntRegs, 
24329
    /* Y2_crswap0 */
24330
    IntRegs, IntRegs, 
24331
    /* Y2_cswi */
24332
    IntRegs, 
24333
    /* Y2_dccleana */
24334
    IntRegs, 
24335
    /* Y2_dccleanidx */
24336
    IntRegs, 
24337
    /* Y2_dccleaninva */
24338
    IntRegs, 
24339
    /* Y2_dccleaninvidx */
24340
    IntRegs, 
24341
    /* Y2_dcfetchbo */
24342
    IntRegs, u11_3Imm, 
24343
    /* Y2_dcinva */
24344
    IntRegs, 
24345
    /* Y2_dcinvidx */
24346
    IntRegs, 
24347
    /* Y2_dckill */
24348
    /* Y2_dctagr */
24349
    IntRegs, IntRegs, 
24350
    /* Y2_dctagw */
24351
    IntRegs, IntRegs, 
24352
    /* Y2_dczeroa */
24353
    IntRegs, 
24354
    /* Y2_getimask */
24355
    IntRegs, IntRegs, 
24356
    /* Y2_iassignr */
24357
    IntRegs, IntRegs, 
24358
    /* Y2_iassignw */
24359
    IntRegs, 
24360
    /* Y2_icdatar */
24361
    IntRegs, IntRegs, 
24362
    /* Y2_icdataw */
24363
    IntRegs, IntRegs, 
24364
    /* Y2_icinva */
24365
    IntRegs, 
24366
    /* Y2_icinvidx */
24367
    IntRegs, 
24368
    /* Y2_ickill */
24369
    /* Y2_ictagr */
24370
    IntRegs, IntRegs, 
24371
    /* Y2_ictagw */
24372
    IntRegs, IntRegs, 
24373
    /* Y2_isync */
24374
    /* Y2_k0lock */
24375
    /* Y2_k0unlock */
24376
    /* Y2_l2cleaninvidx */
24377
    IntRegs, 
24378
    /* Y2_l2kill */
24379
    /* Y2_resume */
24380
    IntRegs, 
24381
    /* Y2_setimask */
24382
    PredRegs, IntRegs, 
24383
    /* Y2_setprio */
24384
    PredRegs, IntRegs, 
24385
    /* Y2_start */
24386
    IntRegs, 
24387
    /* Y2_stop */
24388
    IntRegs, 
24389
    /* Y2_swi */
24390
    IntRegs, 
24391
    /* Y2_syncht */
24392
    /* Y2_tfrscrr */
24393
    IntRegs, SysRegs, 
24394
    /* Y2_tfrsrcr */
24395
    SysRegs, IntRegs, 
24396
    /* Y2_tlblock */
24397
    /* Y2_tlbp */
24398
    IntRegs, IntRegs, 
24399
    /* Y2_tlbr */
24400
    DoubleRegs, IntRegs, 
24401
    /* Y2_tlbunlock */
24402
    /* Y2_tlbw */
24403
    DoubleRegs, IntRegs, 
24404
    /* Y2_wait */
24405
    IntRegs, 
24406
    /* Y4_crswap1 */
24407
    IntRegs, IntRegs, 
24408
    /* Y4_crswap10 */
24409
    DoubleRegs, DoubleRegs, sgp10Const, 
24410
    /* Y4_l2fetch */
24411
    IntRegs, IntRegs, 
24412
    /* Y4_l2tagr */
24413
    IntRegs, IntRegs, 
24414
    /* Y4_l2tagw */
24415
    IntRegs, IntRegs, 
24416
    /* Y4_nmi */
24417
    IntRegs, 
24418
    /* Y4_siad */
24419
    IntRegs, 
24420
    /* Y4_tfrscpp */
24421
    DoubleRegs, SysRegs64, 
24422
    /* Y4_tfrspcp */
24423
    SysRegs64, DoubleRegs, 
24424
    /* Y4_trace */
24425
    IntRegs, 
24426
    /* Y5_ctlbw */
24427
    IntRegs, DoubleRegs, IntRegs, 
24428
    /* Y5_l2cleanidx */
24429
    IntRegs, 
24430
    /* Y5_l2fetch */
24431
    IntRegs, DoubleRegs, 
24432
    /* Y5_l2gclean */
24433
    /* Y5_l2gcleaninv */
24434
    /* Y5_l2gunlock */
24435
    /* Y5_l2invidx */
24436
    IntRegs, 
24437
    /* Y5_l2locka */
24438
    PredRegs, IntRegs, 
24439
    /* Y5_l2unlocka */
24440
    IntRegs, 
24441
    /* Y5_tlbasidi */
24442
    IntRegs, 
24443
    /* Y5_tlboc */
24444
    IntRegs, DoubleRegs, 
24445
    /* Y6_diag */
24446
    IntRegs, 
24447
    /* Y6_diag0 */
24448
    DoubleRegs, DoubleRegs, 
24449
    /* Y6_diag1 */
24450
    DoubleRegs, DoubleRegs, 
24451
    /* Y6_dmlink */
24452
    IntRegs, IntRegs, 
24453
    /* Y6_dmpause */
24454
    IntRegs, 
24455
    /* Y6_dmpoll */
24456
    IntRegs, 
24457
    /* Y6_dmresume */
24458
    IntRegs, 
24459
    /* Y6_dmstart */
24460
    IntRegs, 
24461
    /* Y6_dmwait */
24462
    IntRegs, 
24463
    /* Y6_l2gcleaninvpa */
24464
    DoubleRegs, 
24465
    /* Y6_l2gcleanpa */
24466
    DoubleRegs, 
24467
    /* dep_A2_addsat */
24468
    IntRegs, IntRegs, IntRegs, 
24469
    /* dep_A2_subsat */
24470
    IntRegs, IntRegs, IntRegs, 
24471
    /* dep_S2_packhl */
24472
    DoubleRegs, IntRegs, IntRegs, 
24473
  };
24474
  return OpcodeOperandTypes[Offsets[Opcode] + OpIdx];
24475
}
24476
} // end namespace Hexagon
24477
} // end namespace llvm
24478
#endif // GET_INSTRINFO_OPERAND_TYPE
24479
24480
#ifdef GET_INSTRINFO_MEM_OPERAND_SIZE
24481
#undef GET_INSTRINFO_MEM_OPERAND_SIZE
24482
namespace llvm {
24483
namespace Hexagon {
24484
LLVM_READONLY
24485
static int getMemOperandSize(int OpType) {
24486
  switch (OpType) {
24487
  default: return 0;
24488
  }
24489
}
24490
} // end namespace Hexagon
24491
} // end namespace llvm
24492
#endif // GET_INSTRINFO_MEM_OPERAND_SIZE
24493
24494
#ifdef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
24495
#undef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
24496
namespace llvm {
24497
namespace Hexagon {
24498
LLVM_READONLY static unsigned
24499
getLogicalOperandSize(uint16_t Opcode, uint16_t LogicalOpIdx) {
24500
  return LogicalOpIdx;
24501
}
24502
LLVM_READONLY static inline unsigned
24503
getLogicalOperandIdx(uint16_t Opcode, uint16_t LogicalOpIdx) {
24504
  auto S = 0U;
24505
  for (auto i = 0U; i < LogicalOpIdx; ++i)
24506
    S += getLogicalOperandSize(Opcode, i);
24507
  return S;
24508
}
24509
} // end namespace Hexagon
24510
} // end namespace llvm
24511
#endif // GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP
24512
24513
#ifdef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
24514
#undef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
24515
namespace llvm {
24516
namespace Hexagon {
24517
LLVM_READONLY static int
24518
getLogicalOperandType(uint16_t Opcode, uint16_t LogicalOpIdx) {
24519
  return -1;
24520
}
24521
} // end namespace Hexagon
24522
} // end namespace llvm
24523
#endif // GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP
24524
24525
#ifdef GET_INSTRINFO_MC_HELPER_DECLS
24526
#undef GET_INSTRINFO_MC_HELPER_DECLS
24527
24528
namespace llvm {
24529
class MCInst;
24530
class FeatureBitset;
24531
24532
namespace Hexagon_MC {
24533
24534
void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features);
24535
24536
} // end namespace Hexagon_MC
24537
} // end namespace llvm
24538
24539
#endif // GET_INSTRINFO_MC_HELPER_DECLS
24540
24541
#ifdef GET_INSTRINFO_MC_HELPERS
24542
#undef GET_INSTRINFO_MC_HELPERS
24543
24544
namespace llvm {
24545
namespace Hexagon_MC {
24546
24547
} // end namespace Hexagon_MC
24548
} // end namespace llvm
24549
24550
#endif // GET_GENISTRINFO_MC_HELPERS
24551
24552
#if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\
24553
    defined(GET_AVAILABLE_OPCODE_CHECKER)
24554
#define GET_COMPUTE_FEATURES
24555
#endif
24556
#ifdef GET_COMPUTE_FEATURES
24557
#undef GET_COMPUTE_FEATURES
24558
namespace llvm {
24559
namespace Hexagon_MC {
24560
24561
// Bits for subtarget features that participate in instruction matching.
24562
enum SubtargetFeatureBits : uint8_t {
24563
  Feature_HasV5Bit = 2,
24564
  Feature_HasV55Bit = 3,
24565
  Feature_HasV60Bit = 4,
24566
  Feature_HasV62Bit = 5,
24567
  Feature_HasV65Bit = 6,
24568
  Feature_HasV66Bit = 7,
24569
  Feature_HasV67Bit = 8,
24570
  Feature_HasV68Bit = 9,
24571
  Feature_HasV69Bit = 10,
24572
  Feature_HasV71Bit = 11,
24573
  Feature_HasV73Bit = 12,
24574
  Feature_UseHVX64BBit = 16,
24575
  Feature_UseHVX128BBit = 17,
24576
  Feature_UseHVXBit = 15,
24577
  Feature_UseHVXV60Bit = 20,
24578
  Feature_UseHVXV62Bit = 21,
24579
  Feature_UseHVXV65Bit = 22,
24580
  Feature_UseHVXV66Bit = 23,
24581
  Feature_UseHVXV67Bit = 24,
24582
  Feature_UseHVXV68Bit = 25,
24583
  Feature_UseHVXV69Bit = 26,
24584
  Feature_UseHVXV71Bit = 27,
24585
  Feature_UseHVXV73Bit = 28,
24586
  Feature_UseAudioBit = 13,
24587
  Feature_UseZRegBit = 29,
24588
  Feature_HasPreV65Bit = 1,
24589
  Feature_UseHVXIEEEFPBit = 18,
24590
  Feature_UseHVXQFloatBit = 19,
24591
  Feature_HasMemNoShufBit = 0,
24592
  Feature_UseCabacBit = 14,
24593
};
24594
24595
229k
inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) {
24596
229k
  FeatureBitset Features;
24597
229k
  if (FB[Hexagon::ArchV5])
24598
229k
    Features.set(Feature_HasV5Bit);
24599
229k
  if (FB[Hexagon::ArchV55])
24600
229k
    Features.set(Feature_HasV55Bit);
24601
229k
  if (FB[Hexagon::ArchV60])
24602
229k
    Features.set(Feature_HasV60Bit);
24603
229k
  if (FB[Hexagon::ArchV62])
24604
0
    Features.set(Feature_HasV62Bit);
24605
229k
  if (FB[Hexagon::ArchV65])
24606
0
    Features.set(Feature_HasV65Bit);
24607
229k
  if (FB[Hexagon::ArchV66])
24608
0
    Features.set(Feature_HasV66Bit);
24609
229k
  if (FB[Hexagon::ArchV67])
24610
0
    Features.set(Feature_HasV67Bit);
24611
229k
  if (FB[Hexagon::ArchV68])
24612
0
    Features.set(Feature_HasV68Bit);
24613
229k
  if (FB[Hexagon::ArchV69])
24614
0
    Features.set(Feature_HasV69Bit);
24615
229k
  if (FB[Hexagon::ArchV71])
24616
0
    Features.set(Feature_HasV71Bit);
24617
229k
  if (FB[Hexagon::ArchV73])
24618
0
    Features.set(Feature_HasV73Bit);
24619
229k
  if (FB[Hexagon::ExtensionHVX64B])
24620
0
    Features.set(Feature_UseHVX64BBit);
24621
229k
  if (FB[Hexagon::ExtensionHVX128B])
24622
0
    Features.set(Feature_UseHVX128BBit);
24623
229k
  if (FB[Hexagon::ExtensionHVXV60])
24624
0
    Features.set(Feature_UseHVXBit);
24625
229k
  if (FB[Hexagon::ExtensionHVXV60])
24626
0
    Features.set(Feature_UseHVXV60Bit);
24627
229k
  if (FB[Hexagon::ExtensionHVXV62])
24628
0
    Features.set(Feature_UseHVXV62Bit);
24629
229k
  if (FB[Hexagon::ExtensionHVXV65])
24630
0
    Features.set(Feature_UseHVXV65Bit);
24631
229k
  if (FB[Hexagon::ExtensionHVXV66])
24632
0
    Features.set(Feature_UseHVXV66Bit);
24633
229k
  if (FB[Hexagon::ExtensionHVXV67])
24634
0
    Features.set(Feature_UseHVXV67Bit);
24635
229k
  if (FB[Hexagon::ExtensionHVXV68])
24636
0
    Features.set(Feature_UseHVXV68Bit);
24637
229k
  if (FB[Hexagon::ExtensionHVXV69])
24638
0
    Features.set(Feature_UseHVXV69Bit);
24639
229k
  if (FB[Hexagon::ExtensionHVXV71])
24640
0
    Features.set(Feature_UseHVXV71Bit);
24641
229k
  if (FB[Hexagon::ExtensionHVXV73])
24642
0
    Features.set(Feature_UseHVXV73Bit);
24643
229k
  if (FB[Hexagon::ExtensionAudio])
24644
0
    Features.set(Feature_UseAudioBit);
24645
229k
  if (FB[Hexagon::ExtensionZReg])
24646
0
    Features.set(Feature_UseZRegBit);
24647
229k
  if (FB[Hexagon::FeaturePreV65])
24648
229k
    Features.set(Feature_HasPreV65Bit);
24649
229k
  if (FB[Hexagon::ExtensionHVXIEEEFP])
24650
0
    Features.set(Feature_UseHVXIEEEFPBit);
24651
229k
  if (FB[Hexagon::ExtensionHVXQFloat])
24652
0
    Features.set(Feature_UseHVXQFloatBit);
24653
229k
  if (FB[Hexagon::FeatureMemNoShuf])
24654
0
    Features.set(Feature_HasMemNoShufBit);
24655
229k
  if (FB[Hexagon::FeatureCabac])
24656
229k
    Features.set(Feature_UseCabacBit);
24657
229k
  return Features;
24658
229k
}
24659
24660
229k
inline FeatureBitset computeRequiredFeatures(unsigned Opcode) {
24661
229k
  enum : uint8_t {
24662
229k
    CEFBS_None,
24663
229k
    CEFBS_HasPreV65,
24664
229k
    CEFBS_HasV55,
24665
229k
    CEFBS_HasV60,
24666
229k
    CEFBS_HasV62,
24667
229k
    CEFBS_HasV65,
24668
229k
    CEFBS_HasV66,
24669
229k
    CEFBS_HasV67,
24670
229k
    CEFBS_HasV68,
24671
229k
    CEFBS_HasV73,
24672
229k
    CEFBS_UseCabac,
24673
229k
    CEFBS_UseHVX,
24674
229k
    CEFBS_UseHVXV60,
24675
229k
    CEFBS_UseHVXV62,
24676
229k
    CEFBS_UseHVXV65,
24677
229k
    CEFBS_UseHVXV66,
24678
229k
    CEFBS_UseHVXV68,
24679
229k
    CEFBS_UseHVXV69,
24680
229k
    CEFBS_UseHVXV73,
24681
229k
    CEFBS_HasV60_UseHVX,
24682
229k
    CEFBS_HasV67_UseAudio,
24683
229k
    CEFBS_UseHVXV66_UseZReg,
24684
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP,
24685
229k
    CEFBS_UseHVXV68_UseHVXQFloat,
24686
229k
    CEFBS_UseHVXV73_UseHVXIEEEFP,
24687
229k
    CEFBS_UseHVXV73_UseHVXQFloat,
24688
229k
  };
24689
24690
229k
  static constexpr FeatureBitset FeatureBitsets[] = {
24691
229k
    {}, // CEFBS_None
24692
229k
    {Feature_HasPreV65Bit, },
24693
229k
    {Feature_HasV55Bit, },
24694
229k
    {Feature_HasV60Bit, },
24695
229k
    {Feature_HasV62Bit, },
24696
229k
    {Feature_HasV65Bit, },
24697
229k
    {Feature_HasV66Bit, },
24698
229k
    {Feature_HasV67Bit, },
24699
229k
    {Feature_HasV68Bit, },
24700
229k
    {Feature_HasV73Bit, },
24701
229k
    {Feature_UseCabacBit, },
24702
229k
    {Feature_UseHVXBit, },
24703
229k
    {Feature_UseHVXV60Bit, },
24704
229k
    {Feature_UseHVXV62Bit, },
24705
229k
    {Feature_UseHVXV65Bit, },
24706
229k
    {Feature_UseHVXV66Bit, },
24707
229k
    {Feature_UseHVXV68Bit, },
24708
229k
    {Feature_UseHVXV69Bit, },
24709
229k
    {Feature_UseHVXV73Bit, },
24710
229k
    {Feature_HasV60Bit, Feature_UseHVXBit, },
24711
229k
    {Feature_HasV67Bit, Feature_UseAudioBit, },
24712
229k
    {Feature_UseHVXV66Bit, Feature_UseZRegBit, },
24713
229k
    {Feature_UseHVXV68Bit, Feature_UseHVXIEEEFPBit, },
24714
229k
    {Feature_UseHVXV68Bit, Feature_UseHVXQFloatBit, },
24715
229k
    {Feature_UseHVXV73Bit, Feature_UseHVXIEEEFPBit, },
24716
229k
    {Feature_UseHVXV73Bit, Feature_UseHVXQFloatBit, },
24717
229k
  };
24718
229k
  static constexpr uint8_t RequiredFeaturesRefs[] = {
24719
229k
    CEFBS_None, // PHI = 0
24720
229k
    CEFBS_None, // INLINEASM = 1
24721
229k
    CEFBS_None, // INLINEASM_BR = 2
24722
229k
    CEFBS_None, // CFI_INSTRUCTION = 3
24723
229k
    CEFBS_None, // EH_LABEL = 4
24724
229k
    CEFBS_None, // GC_LABEL = 5
24725
229k
    CEFBS_None, // ANNOTATION_LABEL = 6
24726
229k
    CEFBS_None, // KILL = 7
24727
229k
    CEFBS_None, // EXTRACT_SUBREG = 8
24728
229k
    CEFBS_None, // INSERT_SUBREG = 9
24729
229k
    CEFBS_None, // IMPLICIT_DEF = 10
24730
229k
    CEFBS_None, // SUBREG_TO_REG = 11
24731
229k
    CEFBS_None, // COPY_TO_REGCLASS = 12
24732
229k
    CEFBS_None, // DBG_VALUE = 13
24733
229k
    CEFBS_None, // DBG_VALUE_LIST = 14
24734
229k
    CEFBS_None, // DBG_INSTR_REF = 15
24735
229k
    CEFBS_None, // DBG_PHI = 16
24736
229k
    CEFBS_None, // DBG_LABEL = 17
24737
229k
    CEFBS_None, // REG_SEQUENCE = 18
24738
229k
    CEFBS_None, // COPY = 19
24739
229k
    CEFBS_None, // BUNDLE = 20
24740
229k
    CEFBS_None, // LIFETIME_START = 21
24741
229k
    CEFBS_None, // LIFETIME_END = 22
24742
229k
    CEFBS_None, // PSEUDO_PROBE = 23
24743
229k
    CEFBS_None, // ARITH_FENCE = 24
24744
229k
    CEFBS_None, // STACKMAP = 25
24745
229k
    CEFBS_None, // FENTRY_CALL = 26
24746
229k
    CEFBS_None, // PATCHPOINT = 27
24747
229k
    CEFBS_None, // LOAD_STACK_GUARD = 28
24748
229k
    CEFBS_None, // PREALLOCATED_SETUP = 29
24749
229k
    CEFBS_None, // PREALLOCATED_ARG = 30
24750
229k
    CEFBS_None, // STATEPOINT = 31
24751
229k
    CEFBS_None, // LOCAL_ESCAPE = 32
24752
229k
    CEFBS_None, // FAULTING_OP = 33
24753
229k
    CEFBS_None, // PATCHABLE_OP = 34
24754
229k
    CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 35
24755
229k
    CEFBS_None, // PATCHABLE_RET = 36
24756
229k
    CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 37
24757
229k
    CEFBS_None, // PATCHABLE_TAIL_CALL = 38
24758
229k
    CEFBS_None, // PATCHABLE_EVENT_CALL = 39
24759
229k
    CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 40
24760
229k
    CEFBS_None, // ICALL_BRANCH_FUNNEL = 41
24761
229k
    CEFBS_None, // MEMBARRIER = 42
24762
229k
    CEFBS_None, // JUMP_TABLE_DEBUG_INFO = 43
24763
229k
    CEFBS_None, // G_ASSERT_SEXT = 44
24764
229k
    CEFBS_None, // G_ASSERT_ZEXT = 45
24765
229k
    CEFBS_None, // G_ASSERT_ALIGN = 46
24766
229k
    CEFBS_None, // G_ADD = 47
24767
229k
    CEFBS_None, // G_SUB = 48
24768
229k
    CEFBS_None, // G_MUL = 49
24769
229k
    CEFBS_None, // G_SDIV = 50
24770
229k
    CEFBS_None, // G_UDIV = 51
24771
229k
    CEFBS_None, // G_SREM = 52
24772
229k
    CEFBS_None, // G_UREM = 53
24773
229k
    CEFBS_None, // G_SDIVREM = 54
24774
229k
    CEFBS_None, // G_UDIVREM = 55
24775
229k
    CEFBS_None, // G_AND = 56
24776
229k
    CEFBS_None, // G_OR = 57
24777
229k
    CEFBS_None, // G_XOR = 58
24778
229k
    CEFBS_None, // G_IMPLICIT_DEF = 59
24779
229k
    CEFBS_None, // G_PHI = 60
24780
229k
    CEFBS_None, // G_FRAME_INDEX = 61
24781
229k
    CEFBS_None, // G_GLOBAL_VALUE = 62
24782
229k
    CEFBS_None, // G_CONSTANT_POOL = 63
24783
229k
    CEFBS_None, // G_EXTRACT = 64
24784
229k
    CEFBS_None, // G_UNMERGE_VALUES = 65
24785
229k
    CEFBS_None, // G_INSERT = 66
24786
229k
    CEFBS_None, // G_MERGE_VALUES = 67
24787
229k
    CEFBS_None, // G_BUILD_VECTOR = 68
24788
229k
    CEFBS_None, // G_BUILD_VECTOR_TRUNC = 69
24789
229k
    CEFBS_None, // G_CONCAT_VECTORS = 70
24790
229k
    CEFBS_None, // G_PTRTOINT = 71
24791
229k
    CEFBS_None, // G_INTTOPTR = 72
24792
229k
    CEFBS_None, // G_BITCAST = 73
24793
229k
    CEFBS_None, // G_FREEZE = 74
24794
229k
    CEFBS_None, // G_CONSTANT_FOLD_BARRIER = 75
24795
229k
    CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND = 76
24796
229k
    CEFBS_None, // G_INTRINSIC_TRUNC = 77
24797
229k
    CEFBS_None, // G_INTRINSIC_ROUND = 78
24798
229k
    CEFBS_None, // G_INTRINSIC_LRINT = 79
24799
229k
    CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 80
24800
229k
    CEFBS_None, // G_READCYCLECOUNTER = 81
24801
229k
    CEFBS_None, // G_LOAD = 82
24802
229k
    CEFBS_None, // G_SEXTLOAD = 83
24803
229k
    CEFBS_None, // G_ZEXTLOAD = 84
24804
229k
    CEFBS_None, // G_INDEXED_LOAD = 85
24805
229k
    CEFBS_None, // G_INDEXED_SEXTLOAD = 86
24806
229k
    CEFBS_None, // G_INDEXED_ZEXTLOAD = 87
24807
229k
    CEFBS_None, // G_STORE = 88
24808
229k
    CEFBS_None, // G_INDEXED_STORE = 89
24809
229k
    CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 90
24810
229k
    CEFBS_None, // G_ATOMIC_CMPXCHG = 91
24811
229k
    CEFBS_None, // G_ATOMICRMW_XCHG = 92
24812
229k
    CEFBS_None, // G_ATOMICRMW_ADD = 93
24813
229k
    CEFBS_None, // G_ATOMICRMW_SUB = 94
24814
229k
    CEFBS_None, // G_ATOMICRMW_AND = 95
24815
229k
    CEFBS_None, // G_ATOMICRMW_NAND = 96
24816
229k
    CEFBS_None, // G_ATOMICRMW_OR = 97
24817
229k
    CEFBS_None, // G_ATOMICRMW_XOR = 98
24818
229k
    CEFBS_None, // G_ATOMICRMW_MAX = 99
24819
229k
    CEFBS_None, // G_ATOMICRMW_MIN = 100
24820
229k
    CEFBS_None, // G_ATOMICRMW_UMAX = 101
24821
229k
    CEFBS_None, // G_ATOMICRMW_UMIN = 102
24822
229k
    CEFBS_None, // G_ATOMICRMW_FADD = 103
24823
229k
    CEFBS_None, // G_ATOMICRMW_FSUB = 104
24824
229k
    CEFBS_None, // G_ATOMICRMW_FMAX = 105
24825
229k
    CEFBS_None, // G_ATOMICRMW_FMIN = 106
24826
229k
    CEFBS_None, // G_ATOMICRMW_UINC_WRAP = 107
24827
229k
    CEFBS_None, // G_ATOMICRMW_UDEC_WRAP = 108
24828
229k
    CEFBS_None, // G_FENCE = 109
24829
229k
    CEFBS_None, // G_PREFETCH = 110
24830
229k
    CEFBS_None, // G_BRCOND = 111
24831
229k
    CEFBS_None, // G_BRINDIRECT = 112
24832
229k
    CEFBS_None, // G_INVOKE_REGION_START = 113
24833
229k
    CEFBS_None, // G_INTRINSIC = 114
24834
229k
    CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 115
24835
229k
    CEFBS_None, // G_INTRINSIC_CONVERGENT = 116
24836
229k
    CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 117
24837
229k
    CEFBS_None, // G_ANYEXT = 118
24838
229k
    CEFBS_None, // G_TRUNC = 119
24839
229k
    CEFBS_None, // G_CONSTANT = 120
24840
229k
    CEFBS_None, // G_FCONSTANT = 121
24841
229k
    CEFBS_None, // G_VASTART = 122
24842
229k
    CEFBS_None, // G_VAARG = 123
24843
229k
    CEFBS_None, // G_SEXT = 124
24844
229k
    CEFBS_None, // G_SEXT_INREG = 125
24845
229k
    CEFBS_None, // G_ZEXT = 126
24846
229k
    CEFBS_None, // G_SHL = 127
24847
229k
    CEFBS_None, // G_LSHR = 128
24848
229k
    CEFBS_None, // G_ASHR = 129
24849
229k
    CEFBS_None, // G_FSHL = 130
24850
229k
    CEFBS_None, // G_FSHR = 131
24851
229k
    CEFBS_None, // G_ROTR = 132
24852
229k
    CEFBS_None, // G_ROTL = 133
24853
229k
    CEFBS_None, // G_ICMP = 134
24854
229k
    CEFBS_None, // G_FCMP = 135
24855
229k
    CEFBS_None, // G_SELECT = 136
24856
229k
    CEFBS_None, // G_UADDO = 137
24857
229k
    CEFBS_None, // G_UADDE = 138
24858
229k
    CEFBS_None, // G_USUBO = 139
24859
229k
    CEFBS_None, // G_USUBE = 140
24860
229k
    CEFBS_None, // G_SADDO = 141
24861
229k
    CEFBS_None, // G_SADDE = 142
24862
229k
    CEFBS_None, // G_SSUBO = 143
24863
229k
    CEFBS_None, // G_SSUBE = 144
24864
229k
    CEFBS_None, // G_UMULO = 145
24865
229k
    CEFBS_None, // G_SMULO = 146
24866
229k
    CEFBS_None, // G_UMULH = 147
24867
229k
    CEFBS_None, // G_SMULH = 148
24868
229k
    CEFBS_None, // G_UADDSAT = 149
24869
229k
    CEFBS_None, // G_SADDSAT = 150
24870
229k
    CEFBS_None, // G_USUBSAT = 151
24871
229k
    CEFBS_None, // G_SSUBSAT = 152
24872
229k
    CEFBS_None, // G_USHLSAT = 153
24873
229k
    CEFBS_None, // G_SSHLSAT = 154
24874
229k
    CEFBS_None, // G_SMULFIX = 155
24875
229k
    CEFBS_None, // G_UMULFIX = 156
24876
229k
    CEFBS_None, // G_SMULFIXSAT = 157
24877
229k
    CEFBS_None, // G_UMULFIXSAT = 158
24878
229k
    CEFBS_None, // G_SDIVFIX = 159
24879
229k
    CEFBS_None, // G_UDIVFIX = 160
24880
229k
    CEFBS_None, // G_SDIVFIXSAT = 161
24881
229k
    CEFBS_None, // G_UDIVFIXSAT = 162
24882
229k
    CEFBS_None, // G_FADD = 163
24883
229k
    CEFBS_None, // G_FSUB = 164
24884
229k
    CEFBS_None, // G_FMUL = 165
24885
229k
    CEFBS_None, // G_FMA = 166
24886
229k
    CEFBS_None, // G_FMAD = 167
24887
229k
    CEFBS_None, // G_FDIV = 168
24888
229k
    CEFBS_None, // G_FREM = 169
24889
229k
    CEFBS_None, // G_FPOW = 170
24890
229k
    CEFBS_None, // G_FPOWI = 171
24891
229k
    CEFBS_None, // G_FEXP = 172
24892
229k
    CEFBS_None, // G_FEXP2 = 173
24893
229k
    CEFBS_None, // G_FEXP10 = 174
24894
229k
    CEFBS_None, // G_FLOG = 175
24895
229k
    CEFBS_None, // G_FLOG2 = 176
24896
229k
    CEFBS_None, // G_FLOG10 = 177
24897
229k
    CEFBS_None, // G_FLDEXP = 178
24898
229k
    CEFBS_None, // G_FFREXP = 179
24899
229k
    CEFBS_None, // G_FNEG = 180
24900
229k
    CEFBS_None, // G_FPEXT = 181
24901
229k
    CEFBS_None, // G_FPTRUNC = 182
24902
229k
    CEFBS_None, // G_FPTOSI = 183
24903
229k
    CEFBS_None, // G_FPTOUI = 184
24904
229k
    CEFBS_None, // G_SITOFP = 185
24905
229k
    CEFBS_None, // G_UITOFP = 186
24906
229k
    CEFBS_None, // G_FABS = 187
24907
229k
    CEFBS_None, // G_FCOPYSIGN = 188
24908
229k
    CEFBS_None, // G_IS_FPCLASS = 189
24909
229k
    CEFBS_None, // G_FCANONICALIZE = 190
24910
229k
    CEFBS_None, // G_FMINNUM = 191
24911
229k
    CEFBS_None, // G_FMAXNUM = 192
24912
229k
    CEFBS_None, // G_FMINNUM_IEEE = 193
24913
229k
    CEFBS_None, // G_FMAXNUM_IEEE = 194
24914
229k
    CEFBS_None, // G_FMINIMUM = 195
24915
229k
    CEFBS_None, // G_FMAXIMUM = 196
24916
229k
    CEFBS_None, // G_GET_FPENV = 197
24917
229k
    CEFBS_None, // G_SET_FPENV = 198
24918
229k
    CEFBS_None, // G_RESET_FPENV = 199
24919
229k
    CEFBS_None, // G_GET_FPMODE = 200
24920
229k
    CEFBS_None, // G_SET_FPMODE = 201
24921
229k
    CEFBS_None, // G_RESET_FPMODE = 202
24922
229k
    CEFBS_None, // G_PTR_ADD = 203
24923
229k
    CEFBS_None, // G_PTRMASK = 204
24924
229k
    CEFBS_None, // G_SMIN = 205
24925
229k
    CEFBS_None, // G_SMAX = 206
24926
229k
    CEFBS_None, // G_UMIN = 207
24927
229k
    CEFBS_None, // G_UMAX = 208
24928
229k
    CEFBS_None, // G_ABS = 209
24929
229k
    CEFBS_None, // G_LROUND = 210
24930
229k
    CEFBS_None, // G_LLROUND = 211
24931
229k
    CEFBS_None, // G_BR = 212
24932
229k
    CEFBS_None, // G_BRJT = 213
24933
229k
    CEFBS_None, // G_INSERT_VECTOR_ELT = 214
24934
229k
    CEFBS_None, // G_EXTRACT_VECTOR_ELT = 215
24935
229k
    CEFBS_None, // G_SHUFFLE_VECTOR = 216
24936
229k
    CEFBS_None, // G_CTTZ = 217
24937
229k
    CEFBS_None, // G_CTTZ_ZERO_UNDEF = 218
24938
229k
    CEFBS_None, // G_CTLZ = 219
24939
229k
    CEFBS_None, // G_CTLZ_ZERO_UNDEF = 220
24940
229k
    CEFBS_None, // G_CTPOP = 221
24941
229k
    CEFBS_None, // G_BSWAP = 222
24942
229k
    CEFBS_None, // G_BITREVERSE = 223
24943
229k
    CEFBS_None, // G_FCEIL = 224
24944
229k
    CEFBS_None, // G_FCOS = 225
24945
229k
    CEFBS_None, // G_FSIN = 226
24946
229k
    CEFBS_None, // G_FSQRT = 227
24947
229k
    CEFBS_None, // G_FFLOOR = 228
24948
229k
    CEFBS_None, // G_FRINT = 229
24949
229k
    CEFBS_None, // G_FNEARBYINT = 230
24950
229k
    CEFBS_None, // G_ADDRSPACE_CAST = 231
24951
229k
    CEFBS_None, // G_BLOCK_ADDR = 232
24952
229k
    CEFBS_None, // G_JUMP_TABLE = 233
24953
229k
    CEFBS_None, // G_DYN_STACKALLOC = 234
24954
229k
    CEFBS_None, // G_STACKSAVE = 235
24955
229k
    CEFBS_None, // G_STACKRESTORE = 236
24956
229k
    CEFBS_None, // G_STRICT_FADD = 237
24957
229k
    CEFBS_None, // G_STRICT_FSUB = 238
24958
229k
    CEFBS_None, // G_STRICT_FMUL = 239
24959
229k
    CEFBS_None, // G_STRICT_FDIV = 240
24960
229k
    CEFBS_None, // G_STRICT_FREM = 241
24961
229k
    CEFBS_None, // G_STRICT_FMA = 242
24962
229k
    CEFBS_None, // G_STRICT_FSQRT = 243
24963
229k
    CEFBS_None, // G_STRICT_FLDEXP = 244
24964
229k
    CEFBS_None, // G_READ_REGISTER = 245
24965
229k
    CEFBS_None, // G_WRITE_REGISTER = 246
24966
229k
    CEFBS_None, // G_MEMCPY = 247
24967
229k
    CEFBS_None, // G_MEMCPY_INLINE = 248
24968
229k
    CEFBS_None, // G_MEMMOVE = 249
24969
229k
    CEFBS_None, // G_MEMSET = 250
24970
229k
    CEFBS_None, // G_BZERO = 251
24971
229k
    CEFBS_None, // G_VECREDUCE_SEQ_FADD = 252
24972
229k
    CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 253
24973
229k
    CEFBS_None, // G_VECREDUCE_FADD = 254
24974
229k
    CEFBS_None, // G_VECREDUCE_FMUL = 255
24975
229k
    CEFBS_None, // G_VECREDUCE_FMAX = 256
24976
229k
    CEFBS_None, // G_VECREDUCE_FMIN = 257
24977
229k
    CEFBS_None, // G_VECREDUCE_FMAXIMUM = 258
24978
229k
    CEFBS_None, // G_VECREDUCE_FMINIMUM = 259
24979
229k
    CEFBS_None, // G_VECREDUCE_ADD = 260
24980
229k
    CEFBS_None, // G_VECREDUCE_MUL = 261
24981
229k
    CEFBS_None, // G_VECREDUCE_AND = 262
24982
229k
    CEFBS_None, // G_VECREDUCE_OR = 263
24983
229k
    CEFBS_None, // G_VECREDUCE_XOR = 264
24984
229k
    CEFBS_None, // G_VECREDUCE_SMAX = 265
24985
229k
    CEFBS_None, // G_VECREDUCE_SMIN = 266
24986
229k
    CEFBS_None, // G_VECREDUCE_UMAX = 267
24987
229k
    CEFBS_None, // G_VECREDUCE_UMIN = 268
24988
229k
    CEFBS_None, // G_SBFX = 269
24989
229k
    CEFBS_None, // G_UBFX = 270
24990
229k
    CEFBS_None, // A2_addsp = 271
24991
229k
    CEFBS_None, // A2_iconst = 272
24992
229k
    CEFBS_None, // A2_neg = 273
24993
229k
    CEFBS_None, // A2_not = 274
24994
229k
    CEFBS_None, // A2_tfrf = 275
24995
229k
    CEFBS_None, // A2_tfrfnew = 276
24996
229k
    CEFBS_None, // A2_tfrp = 277
24997
229k
    CEFBS_None, // A2_tfrpf = 278
24998
229k
    CEFBS_None, // A2_tfrpfnew = 279
24999
229k
    CEFBS_None, // A2_tfrpi = 280
25000
229k
    CEFBS_None, // A2_tfrpt = 281
25001
229k
    CEFBS_None, // A2_tfrptnew = 282
25002
229k
    CEFBS_None, // A2_tfrt = 283
25003
229k
    CEFBS_None, // A2_tfrtnew = 284
25004
229k
    CEFBS_None, // A2_vaddb_map = 285
25005
229k
    CEFBS_None, // A2_vsubb_map = 286
25006
229k
    CEFBS_None, // A2_zxtb = 287
25007
229k
    CEFBS_None, // A4_boundscheck = 288
25008
229k
    CEFBS_None, // ADJCALLSTACKDOWN = 289
25009
229k
    CEFBS_None, // ADJCALLSTACKUP = 290
25010
229k
    CEFBS_None, // C2_cmpgei = 291
25011
229k
    CEFBS_None, // C2_cmpgeui = 292
25012
229k
    CEFBS_None, // C2_cmplt = 293
25013
229k
    CEFBS_None, // C2_cmpltu = 294
25014
229k
    CEFBS_None, // C2_pxfer_map = 295
25015
229k
    CEFBS_None, // DUPLEX_Pseudo = 296
25016
229k
    CEFBS_None, // ENDLOOP0 = 297
25017
229k
    CEFBS_None, // ENDLOOP01 = 298
25018
229k
    CEFBS_None, // ENDLOOP1 = 299
25019
229k
    CEFBS_None, // J2_endloop0 = 300
25020
229k
    CEFBS_None, // J2_endloop01 = 301
25021
229k
    CEFBS_None, // J2_endloop1 = 302
25022
229k
    CEFBS_HasV60, // J2_jumpf_nopred_map = 303
25023
229k
    CEFBS_HasV60, // J2_jumprf_nopred_map = 304
25024
229k
    CEFBS_HasV60, // J2_jumprt_nopred_map = 305
25025
229k
    CEFBS_HasV60, // J2_jumpt_nopred_map = 306
25026
229k
    CEFBS_HasV65, // J2_trap1_noregmap = 307
25027
229k
    CEFBS_None, // L2_loadalignb_zomap = 308
25028
229k
    CEFBS_None, // L2_loadalignh_zomap = 309
25029
229k
    CEFBS_None, // L2_loadbsw2_zomap = 310
25030
229k
    CEFBS_None, // L2_loadbsw4_zomap = 311
25031
229k
    CEFBS_None, // L2_loadbzw2_zomap = 312
25032
229k
    CEFBS_None, // L2_loadbzw4_zomap = 313
25033
229k
    CEFBS_None, // L2_loadrb_zomap = 314
25034
229k
    CEFBS_None, // L2_loadrd_zomap = 315
25035
229k
    CEFBS_None, // L2_loadrh_zomap = 316
25036
229k
    CEFBS_None, // L2_loadri_zomap = 317
25037
229k
    CEFBS_None, // L2_loadrub_zomap = 318
25038
229k
    CEFBS_None, // L2_loadruh_zomap = 319
25039
229k
    CEFBS_None, // L2_ploadrbf_zomap = 320
25040
229k
    CEFBS_None, // L2_ploadrbfnew_zomap = 321
25041
229k
    CEFBS_None, // L2_ploadrbt_zomap = 322
25042
229k
    CEFBS_None, // L2_ploadrbtnew_zomap = 323
25043
229k
    CEFBS_None, // L2_ploadrdf_zomap = 324
25044
229k
    CEFBS_None, // L2_ploadrdfnew_zomap = 325
25045
229k
    CEFBS_None, // L2_ploadrdt_zomap = 326
25046
229k
    CEFBS_None, // L2_ploadrdtnew_zomap = 327
25047
229k
    CEFBS_None, // L2_ploadrhf_zomap = 328
25048
229k
    CEFBS_None, // L2_ploadrhfnew_zomap = 329
25049
229k
    CEFBS_None, // L2_ploadrht_zomap = 330
25050
229k
    CEFBS_None, // L2_ploadrhtnew_zomap = 331
25051
229k
    CEFBS_None, // L2_ploadrif_zomap = 332
25052
229k
    CEFBS_None, // L2_ploadrifnew_zomap = 333
25053
229k
    CEFBS_None, // L2_ploadrit_zomap = 334
25054
229k
    CEFBS_None, // L2_ploadritnew_zomap = 335
25055
229k
    CEFBS_None, // L2_ploadrubf_zomap = 336
25056
229k
    CEFBS_None, // L2_ploadrubfnew_zomap = 337
25057
229k
    CEFBS_None, // L2_ploadrubt_zomap = 338
25058
229k
    CEFBS_None, // L2_ploadrubtnew_zomap = 339
25059
229k
    CEFBS_None, // L2_ploadruhf_zomap = 340
25060
229k
    CEFBS_None, // L2_ploadruhfnew_zomap = 341
25061
229k
    CEFBS_None, // L2_ploadruht_zomap = 342
25062
229k
    CEFBS_None, // L2_ploadruhtnew_zomap = 343
25063
229k
    CEFBS_None, // L4_add_memopb_zomap = 344
25064
229k
    CEFBS_None, // L4_add_memoph_zomap = 345
25065
229k
    CEFBS_None, // L4_add_memopw_zomap = 346
25066
229k
    CEFBS_None, // L4_and_memopb_zomap = 347
25067
229k
    CEFBS_None, // L4_and_memoph_zomap = 348
25068
229k
    CEFBS_None, // L4_and_memopw_zomap = 349
25069
229k
    CEFBS_None, // L4_iadd_memopb_zomap = 350
25070
229k
    CEFBS_None, // L4_iadd_memoph_zomap = 351
25071
229k
    CEFBS_None, // L4_iadd_memopw_zomap = 352
25072
229k
    CEFBS_None, // L4_iand_memopb_zomap = 353
25073
229k
    CEFBS_None, // L4_iand_memoph_zomap = 354
25074
229k
    CEFBS_None, // L4_iand_memopw_zomap = 355
25075
229k
    CEFBS_None, // L4_ior_memopb_zomap = 356
25076
229k
    CEFBS_None, // L4_ior_memoph_zomap = 357
25077
229k
    CEFBS_None, // L4_ior_memopw_zomap = 358
25078
229k
    CEFBS_None, // L4_isub_memopb_zomap = 359
25079
229k
    CEFBS_None, // L4_isub_memoph_zomap = 360
25080
229k
    CEFBS_None, // L4_isub_memopw_zomap = 361
25081
229k
    CEFBS_None, // L4_or_memopb_zomap = 362
25082
229k
    CEFBS_None, // L4_or_memoph_zomap = 363
25083
229k
    CEFBS_None, // L4_or_memopw_zomap = 364
25084
229k
    CEFBS_HasV65, // L4_return_map_to_raw_f = 365
25085
229k
    CEFBS_HasV65, // L4_return_map_to_raw_fnew_pnt = 366
25086
229k
    CEFBS_HasV65, // L4_return_map_to_raw_fnew_pt = 367
25087
229k
    CEFBS_HasV65, // L4_return_map_to_raw_t = 368
25088
229k
    CEFBS_HasV65, // L4_return_map_to_raw_tnew_pnt = 369
25089
229k
    CEFBS_HasV65, // L4_return_map_to_raw_tnew_pt = 370
25090
229k
    CEFBS_None, // L4_sub_memopb_zomap = 371
25091
229k
    CEFBS_None, // L4_sub_memoph_zomap = 372
25092
229k
    CEFBS_None, // L4_sub_memopw_zomap = 373
25093
229k
    CEFBS_HasV65, // L6_deallocframe_map_to_raw = 374
25094
229k
    CEFBS_HasV65, // L6_return_map_to_raw = 375
25095
229k
    CEFBS_None, // LDriw_ctr = 376
25096
229k
    CEFBS_None, // LDriw_pred = 377
25097
229k
    CEFBS_None, // M2_mpysmi = 378
25098
229k
    CEFBS_None, // M2_mpyui = 379
25099
229k
    CEFBS_None, // M2_vrcmpys_acc_s1 = 380
25100
229k
    CEFBS_None, // M2_vrcmpys_s1 = 381
25101
229k
    CEFBS_None, // M2_vrcmpys_s1rp = 382
25102
229k
    CEFBS_HasV67, // M7_vdmpy = 383
25103
229k
    CEFBS_HasV67, // M7_vdmpy_acc = 384
25104
229k
    CEFBS_None, // PS_aligna = 385
25105
229k
    CEFBS_None, // PS_alloca = 386
25106
229k
    CEFBS_None, // PS_call_instrprof_custom = 387
25107
229k
    CEFBS_None, // PS_call_nr = 388
25108
229k
    CEFBS_None, // PS_crash = 389
25109
229k
    CEFBS_None, // PS_false = 390
25110
229k
    CEFBS_None, // PS_fi = 391
25111
229k
    CEFBS_None, // PS_fia = 392
25112
229k
    CEFBS_None, // PS_loadrb_pci = 393
25113
229k
    CEFBS_None, // PS_loadrb_pcr = 394
25114
229k
    CEFBS_None, // PS_loadrd_pci = 395
25115
229k
    CEFBS_None, // PS_loadrd_pcr = 396
25116
229k
    CEFBS_None, // PS_loadrh_pci = 397
25117
229k
    CEFBS_None, // PS_loadrh_pcr = 398
25118
229k
    CEFBS_None, // PS_loadri_pci = 399
25119
229k
    CEFBS_None, // PS_loadri_pcr = 400
25120
229k
    CEFBS_None, // PS_loadrub_pci = 401
25121
229k
    CEFBS_None, // PS_loadrub_pcr = 402
25122
229k
    CEFBS_None, // PS_loadruh_pci = 403
25123
229k
    CEFBS_None, // PS_loadruh_pcr = 404
25124
229k
    CEFBS_None, // PS_pselect = 405
25125
229k
    CEFBS_None, // PS_qfalse = 406
25126
229k
    CEFBS_None, // PS_qtrue = 407
25127
229k
    CEFBS_None, // PS_storerb_pci = 408
25128
229k
    CEFBS_None, // PS_storerb_pcr = 409
25129
229k
    CEFBS_None, // PS_storerd_pci = 410
25130
229k
    CEFBS_None, // PS_storerd_pcr = 411
25131
229k
    CEFBS_None, // PS_storerf_pci = 412
25132
229k
    CEFBS_None, // PS_storerf_pcr = 413
25133
229k
    CEFBS_None, // PS_storerh_pci = 414
25134
229k
    CEFBS_None, // PS_storerh_pcr = 415
25135
229k
    CEFBS_None, // PS_storeri_pci = 416
25136
229k
    CEFBS_None, // PS_storeri_pcr = 417
25137
229k
    CEFBS_None, // PS_tailcall_i = 418
25138
229k
    CEFBS_None, // PS_tailcall_r = 419
25139
229k
    CEFBS_None, // PS_true = 420
25140
229k
    CEFBS_None, // PS_vdd0 = 421
25141
229k
    CEFBS_HasV60_UseHVX, // PS_vloadrq_ai = 422
25142
229k
    CEFBS_HasV60_UseHVX, // PS_vloadrv_ai = 423
25143
229k
    CEFBS_HasV60_UseHVX, // PS_vloadrv_nt_ai = 424
25144
229k
    CEFBS_HasV60_UseHVX, // PS_vloadrw_ai = 425
25145
229k
    CEFBS_HasV60_UseHVX, // PS_vloadrw_nt_ai = 426
25146
229k
    CEFBS_None, // PS_vmulw = 427
25147
229k
    CEFBS_None, // PS_vmulw_acc = 428
25148
229k
    CEFBS_HasV60_UseHVX, // PS_vselect = 429
25149
229k
    CEFBS_UseHVX, // PS_vsplatib = 430
25150
229k
    CEFBS_UseHVX, // PS_vsplatih = 431
25151
229k
    CEFBS_UseHVX, // PS_vsplatiw = 432
25152
229k
    CEFBS_UseHVX, // PS_vsplatrb = 433
25153
229k
    CEFBS_UseHVX, // PS_vsplatrh = 434
25154
229k
    CEFBS_UseHVX, // PS_vsplatrw = 435
25155
229k
    CEFBS_HasV60_UseHVX, // PS_vstorerq_ai = 436
25156
229k
    CEFBS_HasV60_UseHVX, // PS_vstorerv_ai = 437
25157
229k
    CEFBS_HasV60_UseHVX, // PS_vstorerv_nt_ai = 438
25158
229k
    CEFBS_HasV60_UseHVX, // PS_vstorerw_ai = 439
25159
229k
    CEFBS_HasV60_UseHVX, // PS_vstorerw_nt_ai = 440
25160
229k
    CEFBS_HasV60_UseHVX, // PS_wselect = 441
25161
229k
    CEFBS_None, // S2_asr_i_p_rnd_goodsyntax = 442
25162
229k
    CEFBS_None, // S2_asr_i_r_rnd_goodsyntax = 443
25163
229k
    CEFBS_None, // S2_pstorerbf_zomap = 444
25164
229k
    CEFBS_None, // S2_pstorerbnewf_zomap = 445
25165
229k
    CEFBS_None, // S2_pstorerbnewt_zomap = 446
25166
229k
    CEFBS_None, // S2_pstorerbt_zomap = 447
25167
229k
    CEFBS_None, // S2_pstorerdf_zomap = 448
25168
229k
    CEFBS_None, // S2_pstorerdt_zomap = 449
25169
229k
    CEFBS_None, // S2_pstorerff_zomap = 450
25170
229k
    CEFBS_None, // S2_pstorerft_zomap = 451
25171
229k
    CEFBS_None, // S2_pstorerhf_zomap = 452
25172
229k
    CEFBS_None, // S2_pstorerhnewf_zomap = 453
25173
229k
    CEFBS_None, // S2_pstorerhnewt_zomap = 454
25174
229k
    CEFBS_None, // S2_pstorerht_zomap = 455
25175
229k
    CEFBS_None, // S2_pstorerif_zomap = 456
25176
229k
    CEFBS_None, // S2_pstorerinewf_zomap = 457
25177
229k
    CEFBS_None, // S2_pstorerinewt_zomap = 458
25178
229k
    CEFBS_None, // S2_pstorerit_zomap = 459
25179
229k
    CEFBS_None, // S2_storerb_zomap = 460
25180
229k
    CEFBS_None, // S2_storerbnew_zomap = 461
25181
229k
    CEFBS_None, // S2_storerd_zomap = 462
25182
229k
    CEFBS_None, // S2_storerf_zomap = 463
25183
229k
    CEFBS_None, // S2_storerh_zomap = 464
25184
229k
    CEFBS_None, // S2_storerhnew_zomap = 465
25185
229k
    CEFBS_None, // S2_storeri_zomap = 466
25186
229k
    CEFBS_None, // S2_storerinew_zomap = 467
25187
229k
    CEFBS_None, // S2_tableidxb_goodsyntax = 468
25188
229k
    CEFBS_None, // S2_tableidxd_goodsyntax = 469
25189
229k
    CEFBS_None, // S2_tableidxh_goodsyntax = 470
25190
229k
    CEFBS_None, // S2_tableidxw_goodsyntax = 471
25191
229k
    CEFBS_None, // S4_pstorerbfnew_zomap = 472
25192
229k
    CEFBS_None, // S4_pstorerbnewfnew_zomap = 473
25193
229k
    CEFBS_None, // S4_pstorerbnewtnew_zomap = 474
25194
229k
    CEFBS_None, // S4_pstorerbtnew_zomap = 475
25195
229k
    CEFBS_None, // S4_pstorerdfnew_zomap = 476
25196
229k
    CEFBS_None, // S4_pstorerdtnew_zomap = 477
25197
229k
    CEFBS_None, // S4_pstorerffnew_zomap = 478
25198
229k
    CEFBS_None, // S4_pstorerftnew_zomap = 479
25199
229k
    CEFBS_None, // S4_pstorerhfnew_zomap = 480
25200
229k
    CEFBS_None, // S4_pstorerhnewfnew_zomap = 481
25201
229k
    CEFBS_None, // S4_pstorerhnewtnew_zomap = 482
25202
229k
    CEFBS_None, // S4_pstorerhtnew_zomap = 483
25203
229k
    CEFBS_None, // S4_pstorerifnew_zomap = 484
25204
229k
    CEFBS_None, // S4_pstorerinewfnew_zomap = 485
25205
229k
    CEFBS_None, // S4_pstorerinewtnew_zomap = 486
25206
229k
    CEFBS_None, // S4_pstoreritnew_zomap = 487
25207
229k
    CEFBS_None, // S4_storeirb_zomap = 488
25208
229k
    CEFBS_None, // S4_storeirbf_zomap = 489
25209
229k
    CEFBS_None, // S4_storeirbfnew_zomap = 490
25210
229k
    CEFBS_None, // S4_storeirbt_zomap = 491
25211
229k
    CEFBS_None, // S4_storeirbtnew_zomap = 492
25212
229k
    CEFBS_None, // S4_storeirh_zomap = 493
25213
229k
    CEFBS_None, // S4_storeirhf_zomap = 494
25214
229k
    CEFBS_None, // S4_storeirhfnew_zomap = 495
25215
229k
    CEFBS_None, // S4_storeirht_zomap = 496
25216
229k
    CEFBS_None, // S4_storeirhtnew_zomap = 497
25217
229k
    CEFBS_None, // S4_storeiri_zomap = 498
25218
229k
    CEFBS_None, // S4_storeirif_zomap = 499
25219
229k
    CEFBS_None, // S4_storeirifnew_zomap = 500
25220
229k
    CEFBS_None, // S4_storeirit_zomap = 501
25221
229k
    CEFBS_None, // S4_storeiritnew_zomap = 502
25222
229k
    CEFBS_None, // S5_asrhub_rnd_sat_goodsyntax = 503
25223
229k
    CEFBS_None, // S5_vasrhrnd_goodsyntax = 504
25224
229k
    CEFBS_HasV65, // S6_allocframe_to_raw = 505
25225
229k
    CEFBS_None, // STriw_ctr = 506
25226
229k
    CEFBS_None, // STriw_pred = 507
25227
229k
    CEFBS_UseHVXV60, // V6_MAP_equb = 508
25228
229k
    CEFBS_UseHVXV60, // V6_MAP_equb_and = 509
25229
229k
    CEFBS_UseHVXV60, // V6_MAP_equb_ior = 510
25230
229k
    CEFBS_UseHVXV60, // V6_MAP_equb_xor = 511
25231
229k
    CEFBS_UseHVXV60, // V6_MAP_equh = 512
25232
229k
    CEFBS_UseHVXV60, // V6_MAP_equh_and = 513
25233
229k
    CEFBS_UseHVXV60, // V6_MAP_equh_ior = 514
25234
229k
    CEFBS_UseHVXV60, // V6_MAP_equh_xor = 515
25235
229k
    CEFBS_UseHVXV60, // V6_MAP_equw = 516
25236
229k
    CEFBS_UseHVXV60, // V6_MAP_equw_and = 517
25237
229k
    CEFBS_UseHVXV60, // V6_MAP_equw_ior = 518
25238
229k
    CEFBS_UseHVXV60, // V6_MAP_equw_xor = 519
25239
229k
    CEFBS_UseHVXV73, // V6_dbl_ld0 = 520
25240
229k
    CEFBS_UseHVXV73, // V6_dbl_st0 = 521
25241
229k
    CEFBS_UseHVXV60, // V6_extractw_alt = 522
25242
229k
    CEFBS_UseHVXV60, // V6_hi = 523
25243
229k
    CEFBS_UseHVXV60, // V6_ld0 = 524
25244
229k
    CEFBS_UseHVXV62, // V6_ldcnp0 = 525
25245
229k
    CEFBS_UseHVXV62, // V6_ldcnpnt0 = 526
25246
229k
    CEFBS_UseHVXV62, // V6_ldcp0 = 527
25247
229k
    CEFBS_UseHVXV62, // V6_ldcpnt0 = 528
25248
229k
    CEFBS_UseHVXV62, // V6_ldnp0 = 529
25249
229k
    CEFBS_UseHVXV62, // V6_ldnpnt0 = 530
25250
229k
    CEFBS_UseHVXV60, // V6_ldnt0 = 531
25251
229k
    CEFBS_UseHVXV62, // V6_ldp0 = 532
25252
229k
    CEFBS_UseHVXV62, // V6_ldpnt0 = 533
25253
229k
    CEFBS_UseHVXV62, // V6_ldtnp0 = 534
25254
229k
    CEFBS_UseHVXV62, // V6_ldtnpnt0 = 535
25255
229k
    CEFBS_UseHVXV62, // V6_ldtp0 = 536
25256
229k
    CEFBS_UseHVXV62, // V6_ldtpnt0 = 537
25257
229k
    CEFBS_UseHVXV60, // V6_ldu0 = 538
25258
229k
    CEFBS_UseHVXV60, // V6_lo = 539
25259
229k
    CEFBS_UseHVXV60, // V6_st0 = 540
25260
229k
    CEFBS_UseHVXV60, // V6_stn0 = 541
25261
229k
    CEFBS_UseHVXV60, // V6_stnnt0 = 542
25262
229k
    CEFBS_UseHVXV60, // V6_stnp0 = 543
25263
229k
    CEFBS_UseHVXV60, // V6_stnpnt0 = 544
25264
229k
    CEFBS_UseHVXV60, // V6_stnq0 = 545
25265
229k
    CEFBS_UseHVXV60, // V6_stnqnt0 = 546
25266
229k
    CEFBS_UseHVXV60, // V6_stnt0 = 547
25267
229k
    CEFBS_UseHVXV60, // V6_stp0 = 548
25268
229k
    CEFBS_UseHVXV60, // V6_stpnt0 = 549
25269
229k
    CEFBS_UseHVXV60, // V6_stq0 = 550
25270
229k
    CEFBS_UseHVXV60, // V6_stqnt0 = 551
25271
229k
    CEFBS_UseHVXV60, // V6_stu0 = 552
25272
229k
    CEFBS_UseHVXV60, // V6_stunp0 = 553
25273
229k
    CEFBS_UseHVXV60, // V6_stup0 = 554
25274
229k
    CEFBS_UseHVXV69, // V6_v10mpyubs10 = 555
25275
229k
    CEFBS_UseHVXV69, // V6_v10mpyubs10_vxx = 556
25276
229k
    CEFBS_UseHVXV68, // V6_v6mpyhubs10_alt = 557
25277
229k
    CEFBS_UseHVXV68, // V6_v6mpyvubs10_alt = 558
25278
229k
    CEFBS_UseHVXV65, // V6_vabsb_alt = 559
25279
229k
    CEFBS_UseHVXV65, // V6_vabsb_sat_alt = 560
25280
229k
    CEFBS_UseHVXV60, // V6_vabsdiffh_alt = 561
25281
229k
    CEFBS_UseHVXV60, // V6_vabsdiffub_alt = 562
25282
229k
    CEFBS_UseHVXV60, // V6_vabsdiffuh_alt = 563
25283
229k
    CEFBS_UseHVXV60, // V6_vabsdiffw_alt = 564
25284
229k
    CEFBS_UseHVXV60, // V6_vabsh_alt = 565
25285
229k
    CEFBS_UseHVXV60, // V6_vabsh_sat_alt = 566
25286
229k
    CEFBS_UseHVXV65, // V6_vabsub_alt = 567
25287
229k
    CEFBS_UseHVXV65, // V6_vabsuh_alt = 568
25288
229k
    CEFBS_UseHVXV65, // V6_vabsuw_alt = 569
25289
229k
    CEFBS_UseHVXV60, // V6_vabsw_alt = 570
25290
229k
    CEFBS_UseHVXV60, // V6_vabsw_sat_alt = 571
25291
229k
    CEFBS_UseHVXV60, // V6_vaddb_alt = 572
25292
229k
    CEFBS_UseHVXV60, // V6_vaddb_dv_alt = 573
25293
229k
    CEFBS_UseHVXV60, // V6_vaddbnq_alt = 574
25294
229k
    CEFBS_UseHVXV60, // V6_vaddbq_alt = 575
25295
229k
    CEFBS_UseHVXV62, // V6_vaddbsat_alt = 576
25296
229k
    CEFBS_UseHVXV62, // V6_vaddbsat_dv_alt = 577
25297
229k
    CEFBS_UseHVXV60, // V6_vaddh_alt = 578
25298
229k
    CEFBS_UseHVXV60, // V6_vaddh_dv_alt = 579
25299
229k
    CEFBS_UseHVXV60, // V6_vaddhnq_alt = 580
25300
229k
    CEFBS_UseHVXV60, // V6_vaddhq_alt = 581
25301
229k
    CEFBS_UseHVXV60, // V6_vaddhsat_alt = 582
25302
229k
    CEFBS_UseHVXV60, // V6_vaddhsat_dv_alt = 583
25303
229k
    CEFBS_UseHVXV62, // V6_vaddhw_acc_alt = 584
25304
229k
    CEFBS_UseHVXV60, // V6_vaddhw_alt = 585
25305
229k
    CEFBS_UseHVXV62, // V6_vaddubh_acc_alt = 586
25306
229k
    CEFBS_UseHVXV60, // V6_vaddubh_alt = 587
25307
229k
    CEFBS_UseHVXV60, // V6_vaddubsat_alt = 588
25308
229k
    CEFBS_UseHVXV60, // V6_vaddubsat_dv_alt = 589
25309
229k
    CEFBS_UseHVXV60, // V6_vadduhsat_alt = 590
25310
229k
    CEFBS_UseHVXV60, // V6_vadduhsat_dv_alt = 591
25311
229k
    CEFBS_UseHVXV62, // V6_vadduhw_acc_alt = 592
25312
229k
    CEFBS_UseHVXV60, // V6_vadduhw_alt = 593
25313
229k
    CEFBS_UseHVXV62, // V6_vadduwsat_alt = 594
25314
229k
    CEFBS_UseHVXV62, // V6_vadduwsat_dv_alt = 595
25315
229k
    CEFBS_UseHVXV60, // V6_vaddw_alt = 596
25316
229k
    CEFBS_UseHVXV60, // V6_vaddw_dv_alt = 597
25317
229k
    CEFBS_UseHVXV60, // V6_vaddwnq_alt = 598
25318
229k
    CEFBS_UseHVXV60, // V6_vaddwq_alt = 599
25319
229k
    CEFBS_UseHVXV60, // V6_vaddwsat_alt = 600
25320
229k
    CEFBS_UseHVXV60, // V6_vaddwsat_dv_alt = 601
25321
229k
    CEFBS_UseHVXV62, // V6_vandnqrt_acc_alt = 602
25322
229k
    CEFBS_UseHVXV62, // V6_vandnqrt_alt = 603
25323
229k
    CEFBS_UseHVXV60, // V6_vandqrt_acc_alt = 604
25324
229k
    CEFBS_UseHVXV60, // V6_vandqrt_alt = 605
25325
229k
    CEFBS_UseHVXV60, // V6_vandvrt_acc_alt = 606
25326
229k
    CEFBS_UseHVXV60, // V6_vandvrt_alt = 607
25327
229k
    CEFBS_UseHVXV65, // V6_vaslh_acc_alt = 608
25328
229k
    CEFBS_UseHVXV60, // V6_vaslh_alt = 609
25329
229k
    CEFBS_UseHVXV60, // V6_vaslhv_alt = 610
25330
229k
    CEFBS_UseHVXV60, // V6_vaslw_acc_alt = 611
25331
229k
    CEFBS_UseHVXV60, // V6_vaslw_alt = 612
25332
229k
    CEFBS_UseHVXV60, // V6_vaslwv_alt = 613
25333
229k
    CEFBS_UseHVXV66, // V6_vasr_into_alt = 614
25334
229k
    CEFBS_UseHVXV65, // V6_vasrh_acc_alt = 615
25335
229k
    CEFBS_UseHVXV60, // V6_vasrh_alt = 616
25336
229k
    CEFBS_UseHVXV60, // V6_vasrhv_alt = 617
25337
229k
    CEFBS_UseHVXV60, // V6_vasrw_acc_alt = 618
25338
229k
    CEFBS_UseHVXV60, // V6_vasrw_alt = 619
25339
229k
    CEFBS_UseHVXV60, // V6_vasrwv_alt = 620
25340
229k
    CEFBS_UseHVXV60, // V6_vassignp = 621
25341
229k
    CEFBS_UseHVXV65, // V6_vavgb_alt = 622
25342
229k
    CEFBS_UseHVXV65, // V6_vavgbrnd_alt = 623
25343
229k
    CEFBS_UseHVXV60, // V6_vavgh_alt = 624
25344
229k
    CEFBS_UseHVXV60, // V6_vavghrnd_alt = 625
25345
229k
    CEFBS_UseHVXV60, // V6_vavgub_alt = 626
25346
229k
    CEFBS_UseHVXV60, // V6_vavgubrnd_alt = 627
25347
229k
    CEFBS_UseHVXV60, // V6_vavguh_alt = 628
25348
229k
    CEFBS_UseHVXV60, // V6_vavguhrnd_alt = 629
25349
229k
    CEFBS_UseHVXV65, // V6_vavguw_alt = 630
25350
229k
    CEFBS_UseHVXV65, // V6_vavguwrnd_alt = 631
25351
229k
    CEFBS_UseHVXV60, // V6_vavgw_alt = 632
25352
229k
    CEFBS_UseHVXV60, // V6_vavgwrnd_alt = 633
25353
229k
    CEFBS_UseHVXV60, // V6_vcl0h_alt = 634
25354
229k
    CEFBS_UseHVXV60, // V6_vcl0w_alt = 635
25355
229k
    CEFBS_UseHVXV60, // V6_vd0 = 636
25356
229k
    CEFBS_UseHVXV65, // V6_vdd0 = 637
25357
229k
    CEFBS_UseHVXV60, // V6_vdealb4w_alt = 638
25358
229k
    CEFBS_UseHVXV60, // V6_vdealb_alt = 639
25359
229k
    CEFBS_UseHVXV60, // V6_vdealh_alt = 640
25360
229k
    CEFBS_UseHVXV60, // V6_vdmpybus_acc_alt = 641
25361
229k
    CEFBS_UseHVXV60, // V6_vdmpybus_alt = 642
25362
229k
    CEFBS_UseHVXV60, // V6_vdmpybus_dv_acc_alt = 643
25363
229k
    CEFBS_UseHVXV60, // V6_vdmpybus_dv_alt = 644
25364
229k
    CEFBS_UseHVXV60, // V6_vdmpyhb_acc_alt = 645
25365
229k
    CEFBS_UseHVXV60, // V6_vdmpyhb_alt = 646
25366
229k
    CEFBS_UseHVXV60, // V6_vdmpyhb_dv_acc_alt = 647
25367
229k
    CEFBS_UseHVXV60, // V6_vdmpyhb_dv_alt = 648
25368
229k
    CEFBS_UseHVXV60, // V6_vdmpyhisat_acc_alt = 649
25369
229k
    CEFBS_UseHVXV60, // V6_vdmpyhisat_alt = 650
25370
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsat_acc_alt = 651
25371
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsat_alt = 652
25372
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsuisat_acc_alt = 653
25373
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsuisat_alt = 654
25374
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsusat_acc_alt = 655
25375
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsusat_alt = 656
25376
229k
    CEFBS_UseHVXV60, // V6_vdmpyhvsat_acc_alt = 657
25377
229k
    CEFBS_UseHVXV60, // V6_vdmpyhvsat_alt = 658
25378
229k
    CEFBS_UseHVXV60, // V6_vdsaduh_acc_alt = 659
25379
229k
    CEFBS_UseHVXV60, // V6_vdsaduh_alt = 660
25380
229k
    CEFBS_None, // V6_vgathermh_pseudo = 661
25381
229k
    CEFBS_None, // V6_vgathermhq_pseudo = 662
25382
229k
    CEFBS_None, // V6_vgathermhw_pseudo = 663
25383
229k
    CEFBS_None, // V6_vgathermhwq_pseudo = 664
25384
229k
    CEFBS_None, // V6_vgathermw_pseudo = 665
25385
229k
    CEFBS_None, // V6_vgathermwq_pseudo = 666
25386
229k
    CEFBS_UseHVXV60, // V6_vlsrh_alt = 667
25387
229k
    CEFBS_UseHVXV60, // V6_vlsrhv_alt = 668
25388
229k
    CEFBS_UseHVXV60, // V6_vlsrw_alt = 669
25389
229k
    CEFBS_UseHVXV60, // V6_vlsrwv_alt = 670
25390
229k
    CEFBS_UseHVXV62, // V6_vmaxb_alt = 671
25391
229k
    CEFBS_UseHVXV60, // V6_vmaxh_alt = 672
25392
229k
    CEFBS_UseHVXV60, // V6_vmaxub_alt = 673
25393
229k
    CEFBS_UseHVXV60, // V6_vmaxuh_alt = 674
25394
229k
    CEFBS_UseHVXV60, // V6_vmaxw_alt = 675
25395
229k
    CEFBS_UseHVXV62, // V6_vminb_alt = 676
25396
229k
    CEFBS_UseHVXV60, // V6_vminh_alt = 677
25397
229k
    CEFBS_UseHVXV60, // V6_vminub_alt = 678
25398
229k
    CEFBS_UseHVXV60, // V6_vminuh_alt = 679
25399
229k
    CEFBS_UseHVXV60, // V6_vminw_alt = 680
25400
229k
    CEFBS_UseHVXV60, // V6_vmpabus_acc_alt = 681
25401
229k
    CEFBS_UseHVXV60, // V6_vmpabus_alt = 682
25402
229k
    CEFBS_UseHVXV60, // V6_vmpabusv_alt = 683
25403
229k
    CEFBS_UseHVXV65, // V6_vmpabuu_acc_alt = 684
25404
229k
    CEFBS_UseHVXV65, // V6_vmpabuu_alt = 685
25405
229k
    CEFBS_UseHVXV60, // V6_vmpabuuv_alt = 686
25406
229k
    CEFBS_UseHVXV60, // V6_vmpahb_acc_alt = 687
25407
229k
    CEFBS_UseHVXV60, // V6_vmpahb_alt = 688
25408
229k
    CEFBS_UseHVXV62, // V6_vmpauhb_acc_alt = 689
25409
229k
    CEFBS_UseHVXV62, // V6_vmpauhb_alt = 690
25410
229k
    CEFBS_UseHVXV60, // V6_vmpybus_acc_alt = 691
25411
229k
    CEFBS_UseHVXV60, // V6_vmpybus_alt = 692
25412
229k
    CEFBS_UseHVXV60, // V6_vmpybusv_acc_alt = 693
25413
229k
    CEFBS_UseHVXV60, // V6_vmpybusv_alt = 694
25414
229k
    CEFBS_UseHVXV60, // V6_vmpybv_acc_alt = 695
25415
229k
    CEFBS_UseHVXV60, // V6_vmpybv_alt = 696
25416
229k
    CEFBS_UseHVXV60, // V6_vmpyewuh_alt = 697
25417
229k
    CEFBS_UseHVXV65, // V6_vmpyh_acc_alt = 698
25418
229k
    CEFBS_UseHVXV60, // V6_vmpyh_alt = 699
25419
229k
    CEFBS_UseHVXV60, // V6_vmpyhsat_acc_alt = 700
25420
229k
    CEFBS_UseHVXV60, // V6_vmpyhsrs_alt = 701
25421
229k
    CEFBS_UseHVXV60, // V6_vmpyhss_alt = 702
25422
229k
    CEFBS_UseHVXV60, // V6_vmpyhus_acc_alt = 703
25423
229k
    CEFBS_UseHVXV60, // V6_vmpyhus_alt = 704
25424
229k
    CEFBS_UseHVXV60, // V6_vmpyhv_acc_alt = 705
25425
229k
    CEFBS_UseHVXV60, // V6_vmpyhv_alt = 706
25426
229k
    CEFBS_UseHVXV60, // V6_vmpyhvsrs_alt = 707
25427
229k
    CEFBS_UseHVXV60, // V6_vmpyiewh_acc_alt = 708
25428
229k
    CEFBS_UseHVXV60, // V6_vmpyiewuh_acc_alt = 709
25429
229k
    CEFBS_UseHVXV60, // V6_vmpyiewuh_alt = 710
25430
229k
    CEFBS_UseHVXV60, // V6_vmpyih_acc_alt = 711
25431
229k
    CEFBS_UseHVXV60, // V6_vmpyih_alt = 712
25432
229k
    CEFBS_UseHVXV60, // V6_vmpyihb_acc_alt = 713
25433
229k
    CEFBS_UseHVXV60, // V6_vmpyihb_alt = 714
25434
229k
    CEFBS_UseHVXV60, // V6_vmpyiowh_alt = 715
25435
229k
    CEFBS_UseHVXV60, // V6_vmpyiwb_acc_alt = 716
25436
229k
    CEFBS_UseHVXV60, // V6_vmpyiwb_alt = 717
25437
229k
    CEFBS_UseHVXV60, // V6_vmpyiwh_acc_alt = 718
25438
229k
    CEFBS_UseHVXV60, // V6_vmpyiwh_alt = 719
25439
229k
    CEFBS_UseHVXV62, // V6_vmpyiwub_acc_alt = 720
25440
229k
    CEFBS_UseHVXV62, // V6_vmpyiwub_alt = 721
25441
229k
    CEFBS_UseHVXV60, // V6_vmpyowh_alt = 722
25442
229k
    CEFBS_UseHVXV60, // V6_vmpyowh_rnd_alt = 723
25443
229k
    CEFBS_UseHVXV60, // V6_vmpyowh_rnd_sacc_alt = 724
25444
229k
    CEFBS_UseHVXV60, // V6_vmpyowh_sacc_alt = 725
25445
229k
    CEFBS_UseHVXV60, // V6_vmpyub_acc_alt = 726
25446
229k
    CEFBS_UseHVXV60, // V6_vmpyub_alt = 727
25447
229k
    CEFBS_UseHVXV60, // V6_vmpyubv_acc_alt = 728
25448
229k
    CEFBS_UseHVXV60, // V6_vmpyubv_alt = 729
25449
229k
    CEFBS_UseHVXV60, // V6_vmpyuh_acc_alt = 730
25450
229k
    CEFBS_UseHVXV60, // V6_vmpyuh_alt = 731
25451
229k
    CEFBS_UseHVXV60, // V6_vmpyuhv_acc_alt = 732
25452
229k
    CEFBS_UseHVXV60, // V6_vmpyuhv_alt = 733
25453
229k
    CEFBS_UseHVXV65, // V6_vnavgb_alt = 734
25454
229k
    CEFBS_UseHVXV60, // V6_vnavgh_alt = 735
25455
229k
    CEFBS_UseHVXV60, // V6_vnavgub_alt = 736
25456
229k
    CEFBS_UseHVXV60, // V6_vnavgw_alt = 737
25457
229k
    CEFBS_UseHVXV60, // V6_vnormamth_alt = 738
25458
229k
    CEFBS_UseHVXV60, // V6_vnormamtw_alt = 739
25459
229k
    CEFBS_UseHVXV60, // V6_vpackeb_alt = 740
25460
229k
    CEFBS_UseHVXV60, // V6_vpackeh_alt = 741
25461
229k
    CEFBS_UseHVXV60, // V6_vpackhb_sat_alt = 742
25462
229k
    CEFBS_UseHVXV60, // V6_vpackhub_sat_alt = 743
25463
229k
    CEFBS_UseHVXV60, // V6_vpackob_alt = 744
25464
229k
    CEFBS_UseHVXV60, // V6_vpackoh_alt = 745
25465
229k
    CEFBS_UseHVXV60, // V6_vpackwh_sat_alt = 746
25466
229k
    CEFBS_UseHVXV60, // V6_vpackwuh_sat_alt = 747
25467
229k
    CEFBS_UseHVXV60, // V6_vpopcounth_alt = 748
25468
229k
    CEFBS_UseHVXV65, // V6_vrmpybub_rtt_acc_alt = 749
25469
229k
    CEFBS_UseHVXV65, // V6_vrmpybub_rtt_alt = 750
25470
229k
    CEFBS_UseHVXV60, // V6_vrmpybus_acc_alt = 751
25471
229k
    CEFBS_UseHVXV60, // V6_vrmpybus_alt = 752
25472
229k
    CEFBS_UseHVXV60, // V6_vrmpybusi_acc_alt = 753
25473
229k
    CEFBS_UseHVXV60, // V6_vrmpybusi_alt = 754
25474
229k
    CEFBS_UseHVXV60, // V6_vrmpybusv_acc_alt = 755
25475
229k
    CEFBS_UseHVXV60, // V6_vrmpybusv_alt = 756
25476
229k
    CEFBS_UseHVXV60, // V6_vrmpybv_acc_alt = 757
25477
229k
    CEFBS_UseHVXV60, // V6_vrmpybv_alt = 758
25478
229k
    CEFBS_UseHVXV60, // V6_vrmpyub_acc_alt = 759
25479
229k
    CEFBS_UseHVXV60, // V6_vrmpyub_alt = 760
25480
229k
    CEFBS_UseHVXV65, // V6_vrmpyub_rtt_acc_alt = 761
25481
229k
    CEFBS_UseHVXV65, // V6_vrmpyub_rtt_alt = 762
25482
229k
    CEFBS_UseHVXV60, // V6_vrmpyubi_acc_alt = 763
25483
229k
    CEFBS_UseHVXV60, // V6_vrmpyubi_alt = 764
25484
229k
    CEFBS_UseHVXV60, // V6_vrmpyubv_acc_alt = 765
25485
229k
    CEFBS_UseHVXV60, // V6_vrmpyubv_alt = 766
25486
229k
    CEFBS_UseHVXV66, // V6_vrotr_alt = 767
25487
229k
    CEFBS_UseHVXV60, // V6_vroundhb_alt = 768
25488
229k
    CEFBS_UseHVXV60, // V6_vroundhub_alt = 769
25489
229k
    CEFBS_UseHVXV62, // V6_vrounduhub_alt = 770
25490
229k
    CEFBS_UseHVXV62, // V6_vrounduwuh_alt = 771
25491
229k
    CEFBS_UseHVXV60, // V6_vroundwh_alt = 772
25492
229k
    CEFBS_UseHVXV60, // V6_vroundwuh_alt = 773
25493
229k
    CEFBS_UseHVXV60, // V6_vrsadubi_acc_alt = 774
25494
229k
    CEFBS_UseHVXV60, // V6_vrsadubi_alt = 775
25495
229k
    CEFBS_UseHVXV60, // V6_vsathub_alt = 776
25496
229k
    CEFBS_UseHVXV62, // V6_vsatuwuh_alt = 777
25497
229k
    CEFBS_UseHVXV60, // V6_vsatwh_alt = 778
25498
229k
    CEFBS_UseHVXV60, // V6_vsb_alt = 779
25499
229k
    CEFBS_UseHVXV65, // V6_vscattermh_add_alt = 780
25500
229k
    CEFBS_UseHVXV65, // V6_vscattermh_alt = 781
25501
229k
    CEFBS_UseHVXV65, // V6_vscattermhq_alt = 782
25502
229k
    CEFBS_UseHVXV65, // V6_vscattermw_add_alt = 783
25503
229k
    CEFBS_UseHVXV65, // V6_vscattermw_alt = 784
25504
229k
    CEFBS_UseHVXV65, // V6_vscattermwh_add_alt = 785
25505
229k
    CEFBS_UseHVXV65, // V6_vscattermwh_alt = 786
25506
229k
    CEFBS_UseHVXV65, // V6_vscattermwhq_alt = 787
25507
229k
    CEFBS_UseHVXV65, // V6_vscattermwq_alt = 788
25508
229k
    CEFBS_UseHVXV60, // V6_vsh_alt = 789
25509
229k
    CEFBS_UseHVXV60, // V6_vshufeh_alt = 790
25510
229k
    CEFBS_UseHVXV60, // V6_vshuffb_alt = 791
25511
229k
    CEFBS_UseHVXV60, // V6_vshuffeb_alt = 792
25512
229k
    CEFBS_UseHVXV60, // V6_vshuffh_alt = 793
25513
229k
    CEFBS_UseHVXV60, // V6_vshuffob_alt = 794
25514
229k
    CEFBS_UseHVXV60, // V6_vshufoeb_alt = 795
25515
229k
    CEFBS_UseHVXV60, // V6_vshufoeh_alt = 796
25516
229k
    CEFBS_UseHVXV60, // V6_vshufoh_alt = 797
25517
229k
    CEFBS_UseHVXV60, // V6_vsubb_alt = 798
25518
229k
    CEFBS_UseHVXV60, // V6_vsubb_dv_alt = 799
25519
229k
    CEFBS_UseHVXV60, // V6_vsubbnq_alt = 800
25520
229k
    CEFBS_UseHVXV60, // V6_vsubbq_alt = 801
25521
229k
    CEFBS_UseHVXV62, // V6_vsubbsat_alt = 802
25522
229k
    CEFBS_UseHVXV62, // V6_vsubbsat_dv_alt = 803
25523
229k
    CEFBS_UseHVXV60, // V6_vsubh_alt = 804
25524
229k
    CEFBS_UseHVXV60, // V6_vsubh_dv_alt = 805
25525
229k
    CEFBS_UseHVXV60, // V6_vsubhnq_alt = 806
25526
229k
    CEFBS_UseHVXV60, // V6_vsubhq_alt = 807
25527
229k
    CEFBS_UseHVXV60, // V6_vsubhsat_alt = 808
25528
229k
    CEFBS_UseHVXV60, // V6_vsubhsat_dv_alt = 809
25529
229k
    CEFBS_UseHVXV60, // V6_vsubhw_alt = 810
25530
229k
    CEFBS_UseHVXV60, // V6_vsububh_alt = 811
25531
229k
    CEFBS_UseHVXV60, // V6_vsububsat_alt = 812
25532
229k
    CEFBS_UseHVXV60, // V6_vsububsat_dv_alt = 813
25533
229k
    CEFBS_UseHVXV60, // V6_vsubuhsat_alt = 814
25534
229k
    CEFBS_UseHVXV60, // V6_vsubuhsat_dv_alt = 815
25535
229k
    CEFBS_UseHVXV60, // V6_vsubuhw_alt = 816
25536
229k
    CEFBS_UseHVXV62, // V6_vsubuwsat_alt = 817
25537
229k
    CEFBS_UseHVXV62, // V6_vsubuwsat_dv_alt = 818
25538
229k
    CEFBS_UseHVXV60, // V6_vsubw_alt = 819
25539
229k
    CEFBS_UseHVXV60, // V6_vsubw_dv_alt = 820
25540
229k
    CEFBS_UseHVXV60, // V6_vsubwnq_alt = 821
25541
229k
    CEFBS_UseHVXV60, // V6_vsubwq_alt = 822
25542
229k
    CEFBS_UseHVXV60, // V6_vsubwsat_alt = 823
25543
229k
    CEFBS_UseHVXV60, // V6_vsubwsat_dv_alt = 824
25544
229k
    CEFBS_UseHVXV60, // V6_vtmpyb_acc_alt = 825
25545
229k
    CEFBS_UseHVXV60, // V6_vtmpyb_alt = 826
25546
229k
    CEFBS_UseHVXV60, // V6_vtmpybus_acc_alt = 827
25547
229k
    CEFBS_UseHVXV60, // V6_vtmpybus_alt = 828
25548
229k
    CEFBS_UseHVXV60, // V6_vtmpyhb_acc_alt = 829
25549
229k
    CEFBS_UseHVXV60, // V6_vtmpyhb_alt = 830
25550
229k
    CEFBS_UseHVXV60, // V6_vtran2x2_map = 831
25551
229k
    CEFBS_UseHVXV60, // V6_vunpackb_alt = 832
25552
229k
    CEFBS_UseHVXV60, // V6_vunpackh_alt = 833
25553
229k
    CEFBS_UseHVXV60, // V6_vunpackob_alt = 834
25554
229k
    CEFBS_UseHVXV60, // V6_vunpackoh_alt = 835
25555
229k
    CEFBS_UseHVXV60, // V6_vunpackub_alt = 836
25556
229k
    CEFBS_UseHVXV60, // V6_vunpackuh_alt = 837
25557
229k
    CEFBS_UseHVXV60, // V6_vzb_alt = 838
25558
229k
    CEFBS_UseHVXV60, // V6_vzh_alt = 839
25559
229k
    CEFBS_UseHVXV66, // V6_zld0 = 840
25560
229k
    CEFBS_UseHVXV66, // V6_zldp0 = 841
25561
229k
    CEFBS_None, // Y2_crswap_old = 842
25562
229k
    CEFBS_None, // Y2_dcfetch = 843
25563
229k
    CEFBS_HasV65, // Y2_k1lock_map = 844
25564
229k
    CEFBS_HasV65, // Y2_k1unlock_map = 845
25565
229k
    CEFBS_HasV73, // dup_A2_add = 846
25566
229k
    CEFBS_HasV73, // dup_A2_addi = 847
25567
229k
    CEFBS_HasV73, // dup_A2_andir = 848
25568
229k
    CEFBS_HasV73, // dup_A2_combineii = 849
25569
229k
    CEFBS_HasV73, // dup_A2_sxtb = 850
25570
229k
    CEFBS_HasV73, // dup_A2_sxth = 851
25571
229k
    CEFBS_HasV73, // dup_A2_tfr = 852
25572
229k
    CEFBS_HasV73, // dup_A2_tfrsi = 853
25573
229k
    CEFBS_HasV73, // dup_A2_zxtb = 854
25574
229k
    CEFBS_HasV73, // dup_A2_zxth = 855
25575
229k
    CEFBS_HasV73, // dup_A4_combineii = 856
25576
229k
    CEFBS_HasV73, // dup_A4_combineir = 857
25577
229k
    CEFBS_HasV73, // dup_A4_combineri = 858
25578
229k
    CEFBS_HasV73, // dup_C2_cmoveif = 859
25579
229k
    CEFBS_HasV73, // dup_C2_cmoveit = 860
25580
229k
    CEFBS_HasV73, // dup_C2_cmovenewif = 861
25581
229k
    CEFBS_HasV73, // dup_C2_cmovenewit = 862
25582
229k
    CEFBS_HasV73, // dup_C2_cmpeqi = 863
25583
229k
    CEFBS_HasV73, // dup_L2_deallocframe = 864
25584
229k
    CEFBS_HasV73, // dup_L2_loadrb_io = 865
25585
229k
    CEFBS_HasV73, // dup_L2_loadrd_io = 866
25586
229k
    CEFBS_HasV73, // dup_L2_loadrh_io = 867
25587
229k
    CEFBS_HasV73, // dup_L2_loadri_io = 868
25588
229k
    CEFBS_HasV73, // dup_L2_loadrub_io = 869
25589
229k
    CEFBS_HasV73, // dup_L2_loadruh_io = 870
25590
229k
    CEFBS_HasV73, // dup_S2_allocframe = 871
25591
229k
    CEFBS_HasV73, // dup_S2_storerb_io = 872
25592
229k
    CEFBS_HasV73, // dup_S2_storerd_io = 873
25593
229k
    CEFBS_HasV73, // dup_S2_storerh_io = 874
25594
229k
    CEFBS_HasV73, // dup_S2_storeri_io = 875
25595
229k
    CEFBS_HasV73, // dup_S4_storeirb_io = 876
25596
229k
    CEFBS_HasV73, // dup_S4_storeiri_io = 877
25597
229k
    CEFBS_None, // A2_abs = 878
25598
229k
    CEFBS_None, // A2_absp = 879
25599
229k
    CEFBS_None, // A2_abssat = 880
25600
229k
    CEFBS_None, // A2_add = 881
25601
229k
    CEFBS_None, // A2_addh_h16_hh = 882
25602
229k
    CEFBS_None, // A2_addh_h16_hl = 883
25603
229k
    CEFBS_None, // A2_addh_h16_lh = 884
25604
229k
    CEFBS_None, // A2_addh_h16_ll = 885
25605
229k
    CEFBS_None, // A2_addh_h16_sat_hh = 886
25606
229k
    CEFBS_None, // A2_addh_h16_sat_hl = 887
25607
229k
    CEFBS_None, // A2_addh_h16_sat_lh = 888
25608
229k
    CEFBS_None, // A2_addh_h16_sat_ll = 889
25609
229k
    CEFBS_None, // A2_addh_l16_hl = 890
25610
229k
    CEFBS_None, // A2_addh_l16_ll = 891
25611
229k
    CEFBS_None, // A2_addh_l16_sat_hl = 892
25612
229k
    CEFBS_None, // A2_addh_l16_sat_ll = 893
25613
229k
    CEFBS_None, // A2_addi = 894
25614
229k
    CEFBS_None, // A2_addp = 895
25615
229k
    CEFBS_None, // A2_addpsat = 896
25616
229k
    CEFBS_None, // A2_addsat = 897
25617
229k
    CEFBS_None, // A2_addsph = 898
25618
229k
    CEFBS_None, // A2_addspl = 899
25619
229k
    CEFBS_None, // A2_and = 900
25620
229k
    CEFBS_None, // A2_andir = 901
25621
229k
    CEFBS_None, // A2_andp = 902
25622
229k
    CEFBS_None, // A2_aslh = 903
25623
229k
    CEFBS_None, // A2_asrh = 904
25624
229k
    CEFBS_None, // A2_combine_hh = 905
25625
229k
    CEFBS_None, // A2_combine_hl = 906
25626
229k
    CEFBS_None, // A2_combine_lh = 907
25627
229k
    CEFBS_None, // A2_combine_ll = 908
25628
229k
    CEFBS_None, // A2_combineii = 909
25629
229k
    CEFBS_None, // A2_combinew = 910
25630
229k
    CEFBS_None, // A2_max = 911
25631
229k
    CEFBS_None, // A2_maxp = 912
25632
229k
    CEFBS_None, // A2_maxu = 913
25633
229k
    CEFBS_None, // A2_maxup = 914
25634
229k
    CEFBS_None, // A2_min = 915
25635
229k
    CEFBS_None, // A2_minp = 916
25636
229k
    CEFBS_None, // A2_minu = 917
25637
229k
    CEFBS_None, // A2_minup = 918
25638
229k
    CEFBS_None, // A2_negp = 919
25639
229k
    CEFBS_None, // A2_negsat = 920
25640
229k
    CEFBS_None, // A2_nop = 921
25641
229k
    CEFBS_None, // A2_notp = 922
25642
229k
    CEFBS_None, // A2_or = 923
25643
229k
    CEFBS_None, // A2_orir = 924
25644
229k
    CEFBS_None, // A2_orp = 925
25645
229k
    CEFBS_None, // A2_paddf = 926
25646
229k
    CEFBS_None, // A2_paddfnew = 927
25647
229k
    CEFBS_None, // A2_paddif = 928
25648
229k
    CEFBS_None, // A2_paddifnew = 929
25649
229k
    CEFBS_None, // A2_paddit = 930
25650
229k
    CEFBS_None, // A2_padditnew = 931
25651
229k
    CEFBS_None, // A2_paddt = 932
25652
229k
    CEFBS_None, // A2_paddtnew = 933
25653
229k
    CEFBS_None, // A2_pandf = 934
25654
229k
    CEFBS_None, // A2_pandfnew = 935
25655
229k
    CEFBS_None, // A2_pandt = 936
25656
229k
    CEFBS_None, // A2_pandtnew = 937
25657
229k
    CEFBS_None, // A2_porf = 938
25658
229k
    CEFBS_None, // A2_porfnew = 939
25659
229k
    CEFBS_None, // A2_port = 940
25660
229k
    CEFBS_None, // A2_portnew = 941
25661
229k
    CEFBS_None, // A2_psubf = 942
25662
229k
    CEFBS_None, // A2_psubfnew = 943
25663
229k
    CEFBS_None, // A2_psubt = 944
25664
229k
    CEFBS_None, // A2_psubtnew = 945
25665
229k
    CEFBS_None, // A2_pxorf = 946
25666
229k
    CEFBS_None, // A2_pxorfnew = 947
25667
229k
    CEFBS_None, // A2_pxort = 948
25668
229k
    CEFBS_None, // A2_pxortnew = 949
25669
229k
    CEFBS_None, // A2_roundsat = 950
25670
229k
    CEFBS_None, // A2_sat = 951
25671
229k
    CEFBS_None, // A2_satb = 952
25672
229k
    CEFBS_None, // A2_sath = 953
25673
229k
    CEFBS_None, // A2_satub = 954
25674
229k
    CEFBS_None, // A2_satuh = 955
25675
229k
    CEFBS_None, // A2_sub = 956
25676
229k
    CEFBS_None, // A2_subh_h16_hh = 957
25677
229k
    CEFBS_None, // A2_subh_h16_hl = 958
25678
229k
    CEFBS_None, // A2_subh_h16_lh = 959
25679
229k
    CEFBS_None, // A2_subh_h16_ll = 960
25680
229k
    CEFBS_None, // A2_subh_h16_sat_hh = 961
25681
229k
    CEFBS_None, // A2_subh_h16_sat_hl = 962
25682
229k
    CEFBS_None, // A2_subh_h16_sat_lh = 963
25683
229k
    CEFBS_None, // A2_subh_h16_sat_ll = 964
25684
229k
    CEFBS_None, // A2_subh_l16_hl = 965
25685
229k
    CEFBS_None, // A2_subh_l16_ll = 966
25686
229k
    CEFBS_None, // A2_subh_l16_sat_hl = 967
25687
229k
    CEFBS_None, // A2_subh_l16_sat_ll = 968
25688
229k
    CEFBS_None, // A2_subp = 969
25689
229k
    CEFBS_None, // A2_subri = 970
25690
229k
    CEFBS_None, // A2_subsat = 971
25691
229k
    CEFBS_None, // A2_svaddh = 972
25692
229k
    CEFBS_None, // A2_svaddhs = 973
25693
229k
    CEFBS_None, // A2_svadduhs = 974
25694
229k
    CEFBS_None, // A2_svavgh = 975
25695
229k
    CEFBS_None, // A2_svavghs = 976
25696
229k
    CEFBS_None, // A2_svnavgh = 977
25697
229k
    CEFBS_None, // A2_svsubh = 978
25698
229k
    CEFBS_None, // A2_svsubhs = 979
25699
229k
    CEFBS_None, // A2_svsubuhs = 980
25700
229k
    CEFBS_None, // A2_swiz = 981
25701
229k
    CEFBS_None, // A2_sxtb = 982
25702
229k
    CEFBS_None, // A2_sxth = 983
25703
229k
    CEFBS_None, // A2_sxtw = 984
25704
229k
    CEFBS_None, // A2_tfr = 985
25705
229k
    CEFBS_None, // A2_tfrcrr = 986
25706
229k
    CEFBS_None, // A2_tfrih = 987
25707
229k
    CEFBS_None, // A2_tfril = 988
25708
229k
    CEFBS_None, // A2_tfrrcr = 989
25709
229k
    CEFBS_None, // A2_tfrsi = 990
25710
229k
    CEFBS_None, // A2_vabsh = 991
25711
229k
    CEFBS_None, // A2_vabshsat = 992
25712
229k
    CEFBS_None, // A2_vabsw = 993
25713
229k
    CEFBS_None, // A2_vabswsat = 994
25714
229k
    CEFBS_None, // A2_vaddh = 995
25715
229k
    CEFBS_None, // A2_vaddhs = 996
25716
229k
    CEFBS_None, // A2_vaddub = 997
25717
229k
    CEFBS_None, // A2_vaddubs = 998
25718
229k
    CEFBS_None, // A2_vadduhs = 999
25719
229k
    CEFBS_None, // A2_vaddw = 1000
25720
229k
    CEFBS_None, // A2_vaddws = 1001
25721
229k
    CEFBS_None, // A2_vavgh = 1002
25722
229k
    CEFBS_None, // A2_vavghcr = 1003
25723
229k
    CEFBS_None, // A2_vavghr = 1004
25724
229k
    CEFBS_None, // A2_vavgub = 1005
25725
229k
    CEFBS_None, // A2_vavgubr = 1006
25726
229k
    CEFBS_None, // A2_vavguh = 1007
25727
229k
    CEFBS_None, // A2_vavguhr = 1008
25728
229k
    CEFBS_None, // A2_vavguw = 1009
25729
229k
    CEFBS_None, // A2_vavguwr = 1010
25730
229k
    CEFBS_None, // A2_vavgw = 1011
25731
229k
    CEFBS_None, // A2_vavgwcr = 1012
25732
229k
    CEFBS_None, // A2_vavgwr = 1013
25733
229k
    CEFBS_None, // A2_vcmpbeq = 1014
25734
229k
    CEFBS_None, // A2_vcmpbgtu = 1015
25735
229k
    CEFBS_None, // A2_vcmpheq = 1016
25736
229k
    CEFBS_None, // A2_vcmphgt = 1017
25737
229k
    CEFBS_None, // A2_vcmphgtu = 1018
25738
229k
    CEFBS_None, // A2_vcmpweq = 1019
25739
229k
    CEFBS_None, // A2_vcmpwgt = 1020
25740
229k
    CEFBS_None, // A2_vcmpwgtu = 1021
25741
229k
    CEFBS_None, // A2_vconj = 1022
25742
229k
    CEFBS_None, // A2_vmaxb = 1023
25743
229k
    CEFBS_None, // A2_vmaxh = 1024
25744
229k
    CEFBS_None, // A2_vmaxub = 1025
25745
229k
    CEFBS_None, // A2_vmaxuh = 1026
25746
229k
    CEFBS_None, // A2_vmaxuw = 1027
25747
229k
    CEFBS_None, // A2_vmaxw = 1028
25748
229k
    CEFBS_None, // A2_vminb = 1029
25749
229k
    CEFBS_None, // A2_vminh = 1030
25750
229k
    CEFBS_None, // A2_vminub = 1031
25751
229k
    CEFBS_None, // A2_vminuh = 1032
25752
229k
    CEFBS_None, // A2_vminuw = 1033
25753
229k
    CEFBS_None, // A2_vminw = 1034
25754
229k
    CEFBS_None, // A2_vnavgh = 1035
25755
229k
    CEFBS_None, // A2_vnavghcr = 1036
25756
229k
    CEFBS_None, // A2_vnavghr = 1037
25757
229k
    CEFBS_None, // A2_vnavgw = 1038
25758
229k
    CEFBS_None, // A2_vnavgwcr = 1039
25759
229k
    CEFBS_None, // A2_vnavgwr = 1040
25760
229k
    CEFBS_None, // A2_vraddub = 1041
25761
229k
    CEFBS_None, // A2_vraddub_acc = 1042
25762
229k
    CEFBS_None, // A2_vrsadub = 1043
25763
229k
    CEFBS_None, // A2_vrsadub_acc = 1044
25764
229k
    CEFBS_None, // A2_vsubh = 1045
25765
229k
    CEFBS_None, // A2_vsubhs = 1046
25766
229k
    CEFBS_None, // A2_vsubub = 1047
25767
229k
    CEFBS_None, // A2_vsububs = 1048
25768
229k
    CEFBS_None, // A2_vsubuhs = 1049
25769
229k
    CEFBS_None, // A2_vsubw = 1050
25770
229k
    CEFBS_None, // A2_vsubws = 1051
25771
229k
    CEFBS_None, // A2_xor = 1052
25772
229k
    CEFBS_None, // A2_xorp = 1053
25773
229k
    CEFBS_None, // A2_zxth = 1054
25774
229k
    CEFBS_None, // A4_addp_c = 1055
25775
229k
    CEFBS_None, // A4_andn = 1056
25776
229k
    CEFBS_None, // A4_andnp = 1057
25777
229k
    CEFBS_None, // A4_bitsplit = 1058
25778
229k
    CEFBS_None, // A4_bitspliti = 1059
25779
229k
    CEFBS_None, // A4_boundscheck_hi = 1060
25780
229k
    CEFBS_None, // A4_boundscheck_lo = 1061
25781
229k
    CEFBS_None, // A4_cmpbeq = 1062
25782
229k
    CEFBS_None, // A4_cmpbeqi = 1063
25783
229k
    CEFBS_None, // A4_cmpbgt = 1064
25784
229k
    CEFBS_None, // A4_cmpbgti = 1065
25785
229k
    CEFBS_None, // A4_cmpbgtu = 1066
25786
229k
    CEFBS_None, // A4_cmpbgtui = 1067
25787
229k
    CEFBS_None, // A4_cmpheq = 1068
25788
229k
    CEFBS_None, // A4_cmpheqi = 1069
25789
229k
    CEFBS_None, // A4_cmphgt = 1070
25790
229k
    CEFBS_None, // A4_cmphgti = 1071
25791
229k
    CEFBS_None, // A4_cmphgtu = 1072
25792
229k
    CEFBS_None, // A4_cmphgtui = 1073
25793
229k
    CEFBS_None, // A4_combineii = 1074
25794
229k
    CEFBS_None, // A4_combineir = 1075
25795
229k
    CEFBS_None, // A4_combineri = 1076
25796
229k
    CEFBS_None, // A4_cround_ri = 1077
25797
229k
    CEFBS_None, // A4_cround_rr = 1078
25798
229k
    CEFBS_None, // A4_ext = 1079
25799
229k
    CEFBS_None, // A4_modwrapu = 1080
25800
229k
    CEFBS_None, // A4_orn = 1081
25801
229k
    CEFBS_None, // A4_ornp = 1082
25802
229k
    CEFBS_None, // A4_paslhf = 1083
25803
229k
    CEFBS_None, // A4_paslhfnew = 1084
25804
229k
    CEFBS_None, // A4_paslht = 1085
25805
229k
    CEFBS_None, // A4_paslhtnew = 1086
25806
229k
    CEFBS_None, // A4_pasrhf = 1087
25807
229k
    CEFBS_None, // A4_pasrhfnew = 1088
25808
229k
    CEFBS_None, // A4_pasrht = 1089
25809
229k
    CEFBS_None, // A4_pasrhtnew = 1090
25810
229k
    CEFBS_None, // A4_psxtbf = 1091
25811
229k
    CEFBS_None, // A4_psxtbfnew = 1092
25812
229k
    CEFBS_None, // A4_psxtbt = 1093
25813
229k
    CEFBS_None, // A4_psxtbtnew = 1094
25814
229k
    CEFBS_None, // A4_psxthf = 1095
25815
229k
    CEFBS_None, // A4_psxthfnew = 1096
25816
229k
    CEFBS_None, // A4_psxtht = 1097
25817
229k
    CEFBS_None, // A4_psxthtnew = 1098
25818
229k
    CEFBS_None, // A4_pzxtbf = 1099
25819
229k
    CEFBS_None, // A4_pzxtbfnew = 1100
25820
229k
    CEFBS_None, // A4_pzxtbt = 1101
25821
229k
    CEFBS_None, // A4_pzxtbtnew = 1102
25822
229k
    CEFBS_None, // A4_pzxthf = 1103
25823
229k
    CEFBS_None, // A4_pzxthfnew = 1104
25824
229k
    CEFBS_None, // A4_pzxtht = 1105
25825
229k
    CEFBS_None, // A4_pzxthtnew = 1106
25826
229k
    CEFBS_None, // A4_rcmpeq = 1107
25827
229k
    CEFBS_None, // A4_rcmpeqi = 1108
25828
229k
    CEFBS_None, // A4_rcmpneq = 1109
25829
229k
    CEFBS_None, // A4_rcmpneqi = 1110
25830
229k
    CEFBS_None, // A4_round_ri = 1111
25831
229k
    CEFBS_None, // A4_round_ri_sat = 1112
25832
229k
    CEFBS_None, // A4_round_rr = 1113
25833
229k
    CEFBS_None, // A4_round_rr_sat = 1114
25834
229k
    CEFBS_None, // A4_subp_c = 1115
25835
229k
    CEFBS_None, // A4_tfrcpp = 1116
25836
229k
    CEFBS_None, // A4_tfrpcp = 1117
25837
229k
    CEFBS_None, // A4_tlbmatch = 1118
25838
229k
    CEFBS_None, // A4_vcmpbeq_any = 1119
25839
229k
    CEFBS_None, // A4_vcmpbeqi = 1120
25840
229k
    CEFBS_None, // A4_vcmpbgt = 1121
25841
229k
    CEFBS_None, // A4_vcmpbgti = 1122
25842
229k
    CEFBS_None, // A4_vcmpbgtui = 1123
25843
229k
    CEFBS_None, // A4_vcmpheqi = 1124
25844
229k
    CEFBS_None, // A4_vcmphgti = 1125
25845
229k
    CEFBS_None, // A4_vcmphgtui = 1126
25846
229k
    CEFBS_None, // A4_vcmpweqi = 1127
25847
229k
    CEFBS_None, // A4_vcmpwgti = 1128
25848
229k
    CEFBS_None, // A4_vcmpwgtui = 1129
25849
229k
    CEFBS_None, // A4_vrmaxh = 1130
25850
229k
    CEFBS_None, // A4_vrmaxuh = 1131
25851
229k
    CEFBS_None, // A4_vrmaxuw = 1132
25852
229k
    CEFBS_None, // A4_vrmaxw = 1133
25853
229k
    CEFBS_None, // A4_vrminh = 1134
25854
229k
    CEFBS_None, // A4_vrminuh = 1135
25855
229k
    CEFBS_None, // A4_vrminuw = 1136
25856
229k
    CEFBS_None, // A4_vrminw = 1137
25857
229k
    CEFBS_HasV55, // A5_ACS = 1138
25858
229k
    CEFBS_None, // A5_vaddhubs = 1139
25859
229k
    CEFBS_HasV65, // A6_vcmpbeq_notany = 1140
25860
229k
    CEFBS_HasV62, // A6_vminub_RdP = 1141
25861
229k
    CEFBS_HasV67_UseAudio, // A7_clip = 1142
25862
229k
    CEFBS_HasV67_UseAudio, // A7_croundd_ri = 1143
25863
229k
    CEFBS_HasV67_UseAudio, // A7_croundd_rr = 1144
25864
229k
    CEFBS_HasV67_UseAudio, // A7_vclip = 1145
25865
229k
    CEFBS_None, // C2_all8 = 1146
25866
229k
    CEFBS_None, // C2_and = 1147
25867
229k
    CEFBS_None, // C2_andn = 1148
25868
229k
    CEFBS_None, // C2_any8 = 1149
25869
229k
    CEFBS_None, // C2_bitsclr = 1150
25870
229k
    CEFBS_None, // C2_bitsclri = 1151
25871
229k
    CEFBS_None, // C2_bitsset = 1152
25872
229k
    CEFBS_None, // C2_ccombinewf = 1153
25873
229k
    CEFBS_None, // C2_ccombinewnewf = 1154
25874
229k
    CEFBS_None, // C2_ccombinewnewt = 1155
25875
229k
    CEFBS_None, // C2_ccombinewt = 1156
25876
229k
    CEFBS_None, // C2_cmoveif = 1157
25877
229k
    CEFBS_None, // C2_cmoveit = 1158
25878
229k
    CEFBS_None, // C2_cmovenewif = 1159
25879
229k
    CEFBS_None, // C2_cmovenewit = 1160
25880
229k
    CEFBS_None, // C2_cmpeq = 1161
25881
229k
    CEFBS_None, // C2_cmpeqi = 1162
25882
229k
    CEFBS_None, // C2_cmpeqp = 1163
25883
229k
    CEFBS_None, // C2_cmpgt = 1164
25884
229k
    CEFBS_None, // C2_cmpgti = 1165
25885
229k
    CEFBS_None, // C2_cmpgtp = 1166
25886
229k
    CEFBS_None, // C2_cmpgtu = 1167
25887
229k
    CEFBS_None, // C2_cmpgtui = 1168
25888
229k
    CEFBS_None, // C2_cmpgtup = 1169
25889
229k
    CEFBS_None, // C2_mask = 1170
25890
229k
    CEFBS_None, // C2_mux = 1171
25891
229k
    CEFBS_None, // C2_muxii = 1172
25892
229k
    CEFBS_None, // C2_muxir = 1173
25893
229k
    CEFBS_None, // C2_muxri = 1174
25894
229k
    CEFBS_None, // C2_not = 1175
25895
229k
    CEFBS_None, // C2_or = 1176
25896
229k
    CEFBS_None, // C2_orn = 1177
25897
229k
    CEFBS_None, // C2_tfrpr = 1178
25898
229k
    CEFBS_None, // C2_tfrrp = 1179
25899
229k
    CEFBS_None, // C2_vitpack = 1180
25900
229k
    CEFBS_None, // C2_vmux = 1181
25901
229k
    CEFBS_None, // C2_xor = 1182
25902
229k
    CEFBS_None, // C4_addipc = 1183
25903
229k
    CEFBS_None, // C4_and_and = 1184
25904
229k
    CEFBS_None, // C4_and_andn = 1185
25905
229k
    CEFBS_None, // C4_and_or = 1186
25906
229k
    CEFBS_None, // C4_and_orn = 1187
25907
229k
    CEFBS_None, // C4_cmplte = 1188
25908
229k
    CEFBS_None, // C4_cmpltei = 1189
25909
229k
    CEFBS_None, // C4_cmplteu = 1190
25910
229k
    CEFBS_None, // C4_cmplteui = 1191
25911
229k
    CEFBS_None, // C4_cmpneq = 1192
25912
229k
    CEFBS_None, // C4_cmpneqi = 1193
25913
229k
    CEFBS_None, // C4_fastcorner9 = 1194
25914
229k
    CEFBS_None, // C4_fastcorner9_not = 1195
25915
229k
    CEFBS_None, // C4_nbitsclr = 1196
25916
229k
    CEFBS_None, // C4_nbitsclri = 1197
25917
229k
    CEFBS_None, // C4_nbitsset = 1198
25918
229k
    CEFBS_None, // C4_or_and = 1199
25919
229k
    CEFBS_None, // C4_or_andn = 1200
25920
229k
    CEFBS_None, // C4_or_or = 1201
25921
229k
    CEFBS_None, // C4_or_orn = 1202
25922
229k
    CEFBS_None, // CALLProfile = 1203
25923
229k
    CEFBS_None, // CONST32 = 1204
25924
229k
    CEFBS_None, // CONST64 = 1205
25925
229k
    CEFBS_None, // DuplexIClass0 = 1206
25926
229k
    CEFBS_None, // DuplexIClass1 = 1207
25927
229k
    CEFBS_None, // DuplexIClass2 = 1208
25928
229k
    CEFBS_None, // DuplexIClass3 = 1209
25929
229k
    CEFBS_None, // DuplexIClass4 = 1210
25930
229k
    CEFBS_None, // DuplexIClass5 = 1211
25931
229k
    CEFBS_None, // DuplexIClass6 = 1212
25932
229k
    CEFBS_None, // DuplexIClass7 = 1213
25933
229k
    CEFBS_None, // DuplexIClass8 = 1214
25934
229k
    CEFBS_None, // DuplexIClass9 = 1215
25935
229k
    CEFBS_None, // DuplexIClassA = 1216
25936
229k
    CEFBS_None, // DuplexIClassB = 1217
25937
229k
    CEFBS_None, // DuplexIClassC = 1218
25938
229k
    CEFBS_None, // DuplexIClassD = 1219
25939
229k
    CEFBS_None, // DuplexIClassE = 1220
25940
229k
    CEFBS_None, // DuplexIClassF = 1221
25941
229k
    CEFBS_None, // EH_RETURN_JMPR = 1222
25942
229k
    CEFBS_None, // F2_conv_d2df = 1223
25943
229k
    CEFBS_None, // F2_conv_d2sf = 1224
25944
229k
    CEFBS_None, // F2_conv_df2d = 1225
25945
229k
    CEFBS_None, // F2_conv_df2d_chop = 1226
25946
229k
    CEFBS_None, // F2_conv_df2sf = 1227
25947
229k
    CEFBS_None, // F2_conv_df2ud = 1228
25948
229k
    CEFBS_None, // F2_conv_df2ud_chop = 1229
25949
229k
    CEFBS_None, // F2_conv_df2uw = 1230
25950
229k
    CEFBS_None, // F2_conv_df2uw_chop = 1231
25951
229k
    CEFBS_None, // F2_conv_df2w = 1232
25952
229k
    CEFBS_None, // F2_conv_df2w_chop = 1233
25953
229k
    CEFBS_None, // F2_conv_sf2d = 1234
25954
229k
    CEFBS_None, // F2_conv_sf2d_chop = 1235
25955
229k
    CEFBS_None, // F2_conv_sf2df = 1236
25956
229k
    CEFBS_None, // F2_conv_sf2ud = 1237
25957
229k
    CEFBS_None, // F2_conv_sf2ud_chop = 1238
25958
229k
    CEFBS_None, // F2_conv_sf2uw = 1239
25959
229k
    CEFBS_None, // F2_conv_sf2uw_chop = 1240
25960
229k
    CEFBS_None, // F2_conv_sf2w = 1241
25961
229k
    CEFBS_None, // F2_conv_sf2w_chop = 1242
25962
229k
    CEFBS_None, // F2_conv_ud2df = 1243
25963
229k
    CEFBS_None, // F2_conv_ud2sf = 1244
25964
229k
    CEFBS_None, // F2_conv_uw2df = 1245
25965
229k
    CEFBS_None, // F2_conv_uw2sf = 1246
25966
229k
    CEFBS_None, // F2_conv_w2df = 1247
25967
229k
    CEFBS_None, // F2_conv_w2sf = 1248
25968
229k
    CEFBS_HasV66, // F2_dfadd = 1249
25969
229k
    CEFBS_None, // F2_dfclass = 1250
25970
229k
    CEFBS_None, // F2_dfcmpeq = 1251
25971
229k
    CEFBS_None, // F2_dfcmpge = 1252
25972
229k
    CEFBS_None, // F2_dfcmpgt = 1253
25973
229k
    CEFBS_None, // F2_dfcmpuo = 1254
25974
229k
    CEFBS_None, // F2_dfimm_n = 1255
25975
229k
    CEFBS_None, // F2_dfimm_p = 1256
25976
229k
    CEFBS_HasV67, // F2_dfmax = 1257
25977
229k
    CEFBS_HasV67, // F2_dfmin = 1258
25978
229k
    CEFBS_HasV67, // F2_dfmpyfix = 1259
25979
229k
    CEFBS_HasV67, // F2_dfmpyhh = 1260
25980
229k
    CEFBS_HasV67, // F2_dfmpylh = 1261
25981
229k
    CEFBS_HasV67, // F2_dfmpyll = 1262
25982
229k
    CEFBS_HasV66, // F2_dfsub = 1263
25983
229k
    CEFBS_None, // F2_sfadd = 1264
25984
229k
    CEFBS_None, // F2_sfclass = 1265
25985
229k
    CEFBS_None, // F2_sfcmpeq = 1266
25986
229k
    CEFBS_None, // F2_sfcmpge = 1267
25987
229k
    CEFBS_None, // F2_sfcmpgt = 1268
25988
229k
    CEFBS_None, // F2_sfcmpuo = 1269
25989
229k
    CEFBS_None, // F2_sffixupd = 1270
25990
229k
    CEFBS_None, // F2_sffixupn = 1271
25991
229k
    CEFBS_None, // F2_sffixupr = 1272
25992
229k
    CEFBS_None, // F2_sffma = 1273
25993
229k
    CEFBS_None, // F2_sffma_lib = 1274
25994
229k
    CEFBS_None, // F2_sffma_sc = 1275
25995
229k
    CEFBS_None, // F2_sffms = 1276
25996
229k
    CEFBS_None, // F2_sffms_lib = 1277
25997
229k
    CEFBS_None, // F2_sfimm_n = 1278
25998
229k
    CEFBS_None, // F2_sfimm_p = 1279
25999
229k
    CEFBS_None, // F2_sfinvsqrta = 1280
26000
229k
    CEFBS_None, // F2_sfmax = 1281
26001
229k
    CEFBS_None, // F2_sfmin = 1282
26002
229k
    CEFBS_None, // F2_sfmpy = 1283
26003
229k
    CEFBS_None, // F2_sfrecipa = 1284
26004
229k
    CEFBS_None, // F2_sfsub = 1285
26005
229k
    CEFBS_None, // G4_tfrgcpp = 1286
26006
229k
    CEFBS_None, // G4_tfrgcrr = 1287
26007
229k
    CEFBS_None, // G4_tfrgpcp = 1288
26008
229k
    CEFBS_None, // G4_tfrgrcr = 1289
26009
229k
    CEFBS_None, // HI = 1290
26010
229k
    CEFBS_None, // J2_call = 1291
26011
229k
    CEFBS_None, // J2_callf = 1292
26012
229k
    CEFBS_None, // J2_callr = 1293
26013
229k
    CEFBS_None, // J2_callrf = 1294
26014
229k
    CEFBS_HasV73, // J2_callrh = 1295
26015
229k
    CEFBS_None, // J2_callrt = 1296
26016
229k
    CEFBS_None, // J2_callt = 1297
26017
229k
    CEFBS_None, // J2_jump = 1298
26018
229k
    CEFBS_None, // J2_jumpf = 1299
26019
229k
    CEFBS_None, // J2_jumpfnew = 1300
26020
229k
    CEFBS_None, // J2_jumpfnewpt = 1301
26021
229k
    CEFBS_HasV60, // J2_jumpfpt = 1302
26022
229k
    CEFBS_None, // J2_jumpr = 1303
26023
229k
    CEFBS_None, // J2_jumprf = 1304
26024
229k
    CEFBS_None, // J2_jumprfnew = 1305
26025
229k
    CEFBS_None, // J2_jumprfnewpt = 1306
26026
229k
    CEFBS_HasV60, // J2_jumprfpt = 1307
26027
229k
    CEFBS_None, // J2_jumprgtez = 1308
26028
229k
    CEFBS_None, // J2_jumprgtezpt = 1309
26029
229k
    CEFBS_HasV73, // J2_jumprh = 1310
26030
229k
    CEFBS_None, // J2_jumprltez = 1311
26031
229k
    CEFBS_None, // J2_jumprltezpt = 1312
26032
229k
    CEFBS_None, // J2_jumprnz = 1313
26033
229k
    CEFBS_None, // J2_jumprnzpt = 1314
26034
229k
    CEFBS_None, // J2_jumprt = 1315
26035
229k
    CEFBS_None, // J2_jumprtnew = 1316
26036
229k
    CEFBS_None, // J2_jumprtnewpt = 1317
26037
229k
    CEFBS_HasV60, // J2_jumprtpt = 1318
26038
229k
    CEFBS_None, // J2_jumprz = 1319
26039
229k
    CEFBS_None, // J2_jumprzpt = 1320
26040
229k
    CEFBS_None, // J2_jumpt = 1321
26041
229k
    CEFBS_None, // J2_jumptnew = 1322
26042
229k
    CEFBS_None, // J2_jumptnewpt = 1323
26043
229k
    CEFBS_HasV60, // J2_jumptpt = 1324
26044
229k
    CEFBS_None, // J2_loop0i = 1325
26045
229k
    CEFBS_None, // J2_loop0iext = 1326
26046
229k
    CEFBS_None, // J2_loop0r = 1327
26047
229k
    CEFBS_None, // J2_loop0rext = 1328
26048
229k
    CEFBS_None, // J2_loop1i = 1329
26049
229k
    CEFBS_None, // J2_loop1iext = 1330
26050
229k
    CEFBS_None, // J2_loop1r = 1331
26051
229k
    CEFBS_None, // J2_loop1rext = 1332
26052
229k
    CEFBS_None, // J2_pause = 1333
26053
229k
    CEFBS_None, // J2_ploop1si = 1334
26054
229k
    CEFBS_None, // J2_ploop1sr = 1335
26055
229k
    CEFBS_None, // J2_ploop2si = 1336
26056
229k
    CEFBS_None, // J2_ploop2sr = 1337
26057
229k
    CEFBS_None, // J2_ploop3si = 1338
26058
229k
    CEFBS_None, // J2_ploop3sr = 1339
26059
229k
    CEFBS_None, // J2_rte = 1340
26060
229k
    CEFBS_None, // J2_trap0 = 1341
26061
229k
    CEFBS_HasV65, // J2_trap1 = 1342
26062
229k
    CEFBS_HasV73, // J2_unpause = 1343
26063
229k
    CEFBS_None, // J4_cmpeq_f_jumpnv_nt = 1344
26064
229k
    CEFBS_None, // J4_cmpeq_f_jumpnv_t = 1345
26065
229k
    CEFBS_None, // J4_cmpeq_fp0_jump_nt = 1346
26066
229k
    CEFBS_None, // J4_cmpeq_fp0_jump_t = 1347
26067
229k
    CEFBS_None, // J4_cmpeq_fp1_jump_nt = 1348
26068
229k
    CEFBS_None, // J4_cmpeq_fp1_jump_t = 1349
26069
229k
    CEFBS_None, // J4_cmpeq_t_jumpnv_nt = 1350
26070
229k
    CEFBS_None, // J4_cmpeq_t_jumpnv_t = 1351
26071
229k
    CEFBS_None, // J4_cmpeq_tp0_jump_nt = 1352
26072
229k
    CEFBS_None, // J4_cmpeq_tp0_jump_t = 1353
26073
229k
    CEFBS_None, // J4_cmpeq_tp1_jump_nt = 1354
26074
229k
    CEFBS_None, // J4_cmpeq_tp1_jump_t = 1355
26075
229k
    CEFBS_None, // J4_cmpeqi_f_jumpnv_nt = 1356
26076
229k
    CEFBS_None, // J4_cmpeqi_f_jumpnv_t = 1357
26077
229k
    CEFBS_None, // J4_cmpeqi_fp0_jump_nt = 1358
26078
229k
    CEFBS_None, // J4_cmpeqi_fp0_jump_t = 1359
26079
229k
    CEFBS_None, // J4_cmpeqi_fp1_jump_nt = 1360
26080
229k
    CEFBS_None, // J4_cmpeqi_fp1_jump_t = 1361
26081
229k
    CEFBS_None, // J4_cmpeqi_t_jumpnv_nt = 1362
26082
229k
    CEFBS_None, // J4_cmpeqi_t_jumpnv_t = 1363
26083
229k
    CEFBS_None, // J4_cmpeqi_tp0_jump_nt = 1364
26084
229k
    CEFBS_None, // J4_cmpeqi_tp0_jump_t = 1365
26085
229k
    CEFBS_None, // J4_cmpeqi_tp1_jump_nt = 1366
26086
229k
    CEFBS_None, // J4_cmpeqi_tp1_jump_t = 1367
26087
229k
    CEFBS_None, // J4_cmpeqn1_f_jumpnv_nt = 1368
26088
229k
    CEFBS_None, // J4_cmpeqn1_f_jumpnv_t = 1369
26089
229k
    CEFBS_None, // J4_cmpeqn1_fp0_jump_nt = 1370
26090
229k
    CEFBS_None, // J4_cmpeqn1_fp0_jump_t = 1371
26091
229k
    CEFBS_None, // J4_cmpeqn1_fp1_jump_nt = 1372
26092
229k
    CEFBS_None, // J4_cmpeqn1_fp1_jump_t = 1373
26093
229k
    CEFBS_None, // J4_cmpeqn1_t_jumpnv_nt = 1374
26094
229k
    CEFBS_None, // J4_cmpeqn1_t_jumpnv_t = 1375
26095
229k
    CEFBS_None, // J4_cmpeqn1_tp0_jump_nt = 1376
26096
229k
    CEFBS_None, // J4_cmpeqn1_tp0_jump_t = 1377
26097
229k
    CEFBS_None, // J4_cmpeqn1_tp1_jump_nt = 1378
26098
229k
    CEFBS_None, // J4_cmpeqn1_tp1_jump_t = 1379
26099
229k
    CEFBS_None, // J4_cmpgt_f_jumpnv_nt = 1380
26100
229k
    CEFBS_None, // J4_cmpgt_f_jumpnv_t = 1381
26101
229k
    CEFBS_None, // J4_cmpgt_fp0_jump_nt = 1382
26102
229k
    CEFBS_None, // J4_cmpgt_fp0_jump_t = 1383
26103
229k
    CEFBS_None, // J4_cmpgt_fp1_jump_nt = 1384
26104
229k
    CEFBS_None, // J4_cmpgt_fp1_jump_t = 1385
26105
229k
    CEFBS_None, // J4_cmpgt_t_jumpnv_nt = 1386
26106
229k
    CEFBS_None, // J4_cmpgt_t_jumpnv_t = 1387
26107
229k
    CEFBS_None, // J4_cmpgt_tp0_jump_nt = 1388
26108
229k
    CEFBS_None, // J4_cmpgt_tp0_jump_t = 1389
26109
229k
    CEFBS_None, // J4_cmpgt_tp1_jump_nt = 1390
26110
229k
    CEFBS_None, // J4_cmpgt_tp1_jump_t = 1391
26111
229k
    CEFBS_None, // J4_cmpgti_f_jumpnv_nt = 1392
26112
229k
    CEFBS_None, // J4_cmpgti_f_jumpnv_t = 1393
26113
229k
    CEFBS_None, // J4_cmpgti_fp0_jump_nt = 1394
26114
229k
    CEFBS_None, // J4_cmpgti_fp0_jump_t = 1395
26115
229k
    CEFBS_None, // J4_cmpgti_fp1_jump_nt = 1396
26116
229k
    CEFBS_None, // J4_cmpgti_fp1_jump_t = 1397
26117
229k
    CEFBS_None, // J4_cmpgti_t_jumpnv_nt = 1398
26118
229k
    CEFBS_None, // J4_cmpgti_t_jumpnv_t = 1399
26119
229k
    CEFBS_None, // J4_cmpgti_tp0_jump_nt = 1400
26120
229k
    CEFBS_None, // J4_cmpgti_tp0_jump_t = 1401
26121
229k
    CEFBS_None, // J4_cmpgti_tp1_jump_nt = 1402
26122
229k
    CEFBS_None, // J4_cmpgti_tp1_jump_t = 1403
26123
229k
    CEFBS_None, // J4_cmpgtn1_f_jumpnv_nt = 1404
26124
229k
    CEFBS_None, // J4_cmpgtn1_f_jumpnv_t = 1405
26125
229k
    CEFBS_None, // J4_cmpgtn1_fp0_jump_nt = 1406
26126
229k
    CEFBS_None, // J4_cmpgtn1_fp0_jump_t = 1407
26127
229k
    CEFBS_None, // J4_cmpgtn1_fp1_jump_nt = 1408
26128
229k
    CEFBS_None, // J4_cmpgtn1_fp1_jump_t = 1409
26129
229k
    CEFBS_None, // J4_cmpgtn1_t_jumpnv_nt = 1410
26130
229k
    CEFBS_None, // J4_cmpgtn1_t_jumpnv_t = 1411
26131
229k
    CEFBS_None, // J4_cmpgtn1_tp0_jump_nt = 1412
26132
229k
    CEFBS_None, // J4_cmpgtn1_tp0_jump_t = 1413
26133
229k
    CEFBS_None, // J4_cmpgtn1_tp1_jump_nt = 1414
26134
229k
    CEFBS_None, // J4_cmpgtn1_tp1_jump_t = 1415
26135
229k
    CEFBS_None, // J4_cmpgtu_f_jumpnv_nt = 1416
26136
229k
    CEFBS_None, // J4_cmpgtu_f_jumpnv_t = 1417
26137
229k
    CEFBS_None, // J4_cmpgtu_fp0_jump_nt = 1418
26138
229k
    CEFBS_None, // J4_cmpgtu_fp0_jump_t = 1419
26139
229k
    CEFBS_None, // J4_cmpgtu_fp1_jump_nt = 1420
26140
229k
    CEFBS_None, // J4_cmpgtu_fp1_jump_t = 1421
26141
229k
    CEFBS_None, // J4_cmpgtu_t_jumpnv_nt = 1422
26142
229k
    CEFBS_None, // J4_cmpgtu_t_jumpnv_t = 1423
26143
229k
    CEFBS_None, // J4_cmpgtu_tp0_jump_nt = 1424
26144
229k
    CEFBS_None, // J4_cmpgtu_tp0_jump_t = 1425
26145
229k
    CEFBS_None, // J4_cmpgtu_tp1_jump_nt = 1426
26146
229k
    CEFBS_None, // J4_cmpgtu_tp1_jump_t = 1427
26147
229k
    CEFBS_None, // J4_cmpgtui_f_jumpnv_nt = 1428
26148
229k
    CEFBS_None, // J4_cmpgtui_f_jumpnv_t = 1429
26149
229k
    CEFBS_None, // J4_cmpgtui_fp0_jump_nt = 1430
26150
229k
    CEFBS_None, // J4_cmpgtui_fp0_jump_t = 1431
26151
229k
    CEFBS_None, // J4_cmpgtui_fp1_jump_nt = 1432
26152
229k
    CEFBS_None, // J4_cmpgtui_fp1_jump_t = 1433
26153
229k
    CEFBS_None, // J4_cmpgtui_t_jumpnv_nt = 1434
26154
229k
    CEFBS_None, // J4_cmpgtui_t_jumpnv_t = 1435
26155
229k
    CEFBS_None, // J4_cmpgtui_tp0_jump_nt = 1436
26156
229k
    CEFBS_None, // J4_cmpgtui_tp0_jump_t = 1437
26157
229k
    CEFBS_None, // J4_cmpgtui_tp1_jump_nt = 1438
26158
229k
    CEFBS_None, // J4_cmpgtui_tp1_jump_t = 1439
26159
229k
    CEFBS_None, // J4_cmplt_f_jumpnv_nt = 1440
26160
229k
    CEFBS_None, // J4_cmplt_f_jumpnv_t = 1441
26161
229k
    CEFBS_None, // J4_cmplt_t_jumpnv_nt = 1442
26162
229k
    CEFBS_None, // J4_cmplt_t_jumpnv_t = 1443
26163
229k
    CEFBS_None, // J4_cmpltu_f_jumpnv_nt = 1444
26164
229k
    CEFBS_None, // J4_cmpltu_f_jumpnv_t = 1445
26165
229k
    CEFBS_None, // J4_cmpltu_t_jumpnv_nt = 1446
26166
229k
    CEFBS_None, // J4_cmpltu_t_jumpnv_t = 1447
26167
229k
    CEFBS_None, // J4_hintjumpr = 1448
26168
229k
    CEFBS_None, // J4_jumpseti = 1449
26169
229k
    CEFBS_None, // J4_jumpsetr = 1450
26170
229k
    CEFBS_None, // J4_tstbit0_f_jumpnv_nt = 1451
26171
229k
    CEFBS_None, // J4_tstbit0_f_jumpnv_t = 1452
26172
229k
    CEFBS_None, // J4_tstbit0_fp0_jump_nt = 1453
26173
229k
    CEFBS_None, // J4_tstbit0_fp0_jump_t = 1454
26174
229k
    CEFBS_None, // J4_tstbit0_fp1_jump_nt = 1455
26175
229k
    CEFBS_None, // J4_tstbit0_fp1_jump_t = 1456
26176
229k
    CEFBS_None, // J4_tstbit0_t_jumpnv_nt = 1457
26177
229k
    CEFBS_None, // J4_tstbit0_t_jumpnv_t = 1458
26178
229k
    CEFBS_None, // J4_tstbit0_tp0_jump_nt = 1459
26179
229k
    CEFBS_None, // J4_tstbit0_tp0_jump_t = 1460
26180
229k
    CEFBS_None, // J4_tstbit0_tp1_jump_nt = 1461
26181
229k
    CEFBS_None, // J4_tstbit0_tp1_jump_t = 1462
26182
229k
    CEFBS_None, // L2_deallocframe = 1463
26183
229k
    CEFBS_None, // L2_loadalignb_io = 1464
26184
229k
    CEFBS_None, // L2_loadalignb_pbr = 1465
26185
229k
    CEFBS_None, // L2_loadalignb_pci = 1466
26186
229k
    CEFBS_None, // L2_loadalignb_pcr = 1467
26187
229k
    CEFBS_None, // L2_loadalignb_pi = 1468
26188
229k
    CEFBS_None, // L2_loadalignb_pr = 1469
26189
229k
    CEFBS_None, // L2_loadalignh_io = 1470
26190
229k
    CEFBS_None, // L2_loadalignh_pbr = 1471
26191
229k
    CEFBS_None, // L2_loadalignh_pci = 1472
26192
229k
    CEFBS_None, // L2_loadalignh_pcr = 1473
26193
229k
    CEFBS_None, // L2_loadalignh_pi = 1474
26194
229k
    CEFBS_None, // L2_loadalignh_pr = 1475
26195
229k
    CEFBS_None, // L2_loadbsw2_io = 1476
26196
229k
    CEFBS_None, // L2_loadbsw2_pbr = 1477
26197
229k
    CEFBS_None, // L2_loadbsw2_pci = 1478
26198
229k
    CEFBS_None, // L2_loadbsw2_pcr = 1479
26199
229k
    CEFBS_None, // L2_loadbsw2_pi = 1480
26200
229k
    CEFBS_None, // L2_loadbsw2_pr = 1481
26201
229k
    CEFBS_None, // L2_loadbsw4_io = 1482
26202
229k
    CEFBS_None, // L2_loadbsw4_pbr = 1483
26203
229k
    CEFBS_None, // L2_loadbsw4_pci = 1484
26204
229k
    CEFBS_None, // L2_loadbsw4_pcr = 1485
26205
229k
    CEFBS_None, // L2_loadbsw4_pi = 1486
26206
229k
    CEFBS_None, // L2_loadbsw4_pr = 1487
26207
229k
    CEFBS_None, // L2_loadbzw2_io = 1488
26208
229k
    CEFBS_None, // L2_loadbzw2_pbr = 1489
26209
229k
    CEFBS_None, // L2_loadbzw2_pci = 1490
26210
229k
    CEFBS_None, // L2_loadbzw2_pcr = 1491
26211
229k
    CEFBS_None, // L2_loadbzw2_pi = 1492
26212
229k
    CEFBS_None, // L2_loadbzw2_pr = 1493
26213
229k
    CEFBS_None, // L2_loadbzw4_io = 1494
26214
229k
    CEFBS_None, // L2_loadbzw4_pbr = 1495
26215
229k
    CEFBS_None, // L2_loadbzw4_pci = 1496
26216
229k
    CEFBS_None, // L2_loadbzw4_pcr = 1497
26217
229k
    CEFBS_None, // L2_loadbzw4_pi = 1498
26218
229k
    CEFBS_None, // L2_loadbzw4_pr = 1499
26219
229k
    CEFBS_None, // L2_loadrb_io = 1500
26220
229k
    CEFBS_None, // L2_loadrb_pbr = 1501
26221
229k
    CEFBS_None, // L2_loadrb_pci = 1502
26222
229k
    CEFBS_None, // L2_loadrb_pcr = 1503
26223
229k
    CEFBS_None, // L2_loadrb_pi = 1504
26224
229k
    CEFBS_None, // L2_loadrb_pr = 1505
26225
229k
    CEFBS_None, // L2_loadrbgp = 1506
26226
229k
    CEFBS_None, // L2_loadrd_io = 1507
26227
229k
    CEFBS_None, // L2_loadrd_pbr = 1508
26228
229k
    CEFBS_None, // L2_loadrd_pci = 1509
26229
229k
    CEFBS_None, // L2_loadrd_pcr = 1510
26230
229k
    CEFBS_None, // L2_loadrd_pi = 1511
26231
229k
    CEFBS_None, // L2_loadrd_pr = 1512
26232
229k
    CEFBS_None, // L2_loadrdgp = 1513
26233
229k
    CEFBS_None, // L2_loadrh_io = 1514
26234
229k
    CEFBS_None, // L2_loadrh_pbr = 1515
26235
229k
    CEFBS_None, // L2_loadrh_pci = 1516
26236
229k
    CEFBS_None, // L2_loadrh_pcr = 1517
26237
229k
    CEFBS_None, // L2_loadrh_pi = 1518
26238
229k
    CEFBS_None, // L2_loadrh_pr = 1519
26239
229k
    CEFBS_None, // L2_loadrhgp = 1520
26240
229k
    CEFBS_None, // L2_loadri_io = 1521
26241
229k
    CEFBS_None, // L2_loadri_pbr = 1522
26242
229k
    CEFBS_None, // L2_loadri_pci = 1523
26243
229k
    CEFBS_None, // L2_loadri_pcr = 1524
26244
229k
    CEFBS_None, // L2_loadri_pi = 1525
26245
229k
    CEFBS_None, // L2_loadri_pr = 1526
26246
229k
    CEFBS_None, // L2_loadrigp = 1527
26247
229k
    CEFBS_None, // L2_loadrub_io = 1528
26248
229k
    CEFBS_None, // L2_loadrub_pbr = 1529
26249
229k
    CEFBS_None, // L2_loadrub_pci = 1530
26250
229k
    CEFBS_None, // L2_loadrub_pcr = 1531
26251
229k
    CEFBS_None, // L2_loadrub_pi = 1532
26252
229k
    CEFBS_None, // L2_loadrub_pr = 1533
26253
229k
    CEFBS_None, // L2_loadrubgp = 1534
26254
229k
    CEFBS_None, // L2_loadruh_io = 1535
26255
229k
    CEFBS_None, // L2_loadruh_pbr = 1536
26256
229k
    CEFBS_None, // L2_loadruh_pci = 1537
26257
229k
    CEFBS_None, // L2_loadruh_pcr = 1538
26258
229k
    CEFBS_None, // L2_loadruh_pi = 1539
26259
229k
    CEFBS_None, // L2_loadruh_pr = 1540
26260
229k
    CEFBS_None, // L2_loadruhgp = 1541
26261
229k
    CEFBS_HasV68, // L2_loadw_aq = 1542
26262
229k
    CEFBS_None, // L2_loadw_locked = 1543
26263
229k
    CEFBS_None, // L2_ploadrbf_io = 1544
26264
229k
    CEFBS_None, // L2_ploadrbf_pi = 1545
26265
229k
    CEFBS_None, // L2_ploadrbfnew_io = 1546
26266
229k
    CEFBS_None, // L2_ploadrbfnew_pi = 1547
26267
229k
    CEFBS_None, // L2_ploadrbt_io = 1548
26268
229k
    CEFBS_None, // L2_ploadrbt_pi = 1549
26269
229k
    CEFBS_None, // L2_ploadrbtnew_io = 1550
26270
229k
    CEFBS_None, // L2_ploadrbtnew_pi = 1551
26271
229k
    CEFBS_None, // L2_ploadrdf_io = 1552
26272
229k
    CEFBS_None, // L2_ploadrdf_pi = 1553
26273
229k
    CEFBS_None, // L2_ploadrdfnew_io = 1554
26274
229k
    CEFBS_None, // L2_ploadrdfnew_pi = 1555
26275
229k
    CEFBS_None, // L2_ploadrdt_io = 1556
26276
229k
    CEFBS_None, // L2_ploadrdt_pi = 1557
26277
229k
    CEFBS_None, // L2_ploadrdtnew_io = 1558
26278
229k
    CEFBS_None, // L2_ploadrdtnew_pi = 1559
26279
229k
    CEFBS_None, // L2_ploadrhf_io = 1560
26280
229k
    CEFBS_None, // L2_ploadrhf_pi = 1561
26281
229k
    CEFBS_None, // L2_ploadrhfnew_io = 1562
26282
229k
    CEFBS_None, // L2_ploadrhfnew_pi = 1563
26283
229k
    CEFBS_None, // L2_ploadrht_io = 1564
26284
229k
    CEFBS_None, // L2_ploadrht_pi = 1565
26285
229k
    CEFBS_None, // L2_ploadrhtnew_io = 1566
26286
229k
    CEFBS_None, // L2_ploadrhtnew_pi = 1567
26287
229k
    CEFBS_None, // L2_ploadrif_io = 1568
26288
229k
    CEFBS_None, // L2_ploadrif_pi = 1569
26289
229k
    CEFBS_None, // L2_ploadrifnew_io = 1570
26290
229k
    CEFBS_None, // L2_ploadrifnew_pi = 1571
26291
229k
    CEFBS_None, // L2_ploadrit_io = 1572
26292
229k
    CEFBS_None, // L2_ploadrit_pi = 1573
26293
229k
    CEFBS_None, // L2_ploadritnew_io = 1574
26294
229k
    CEFBS_None, // L2_ploadritnew_pi = 1575
26295
229k
    CEFBS_None, // L2_ploadrubf_io = 1576
26296
229k
    CEFBS_None, // L2_ploadrubf_pi = 1577
26297
229k
    CEFBS_None, // L2_ploadrubfnew_io = 1578
26298
229k
    CEFBS_None, // L2_ploadrubfnew_pi = 1579
26299
229k
    CEFBS_None, // L2_ploadrubt_io = 1580
26300
229k
    CEFBS_None, // L2_ploadrubt_pi = 1581
26301
229k
    CEFBS_None, // L2_ploadrubtnew_io = 1582
26302
229k
    CEFBS_None, // L2_ploadrubtnew_pi = 1583
26303
229k
    CEFBS_None, // L2_ploadruhf_io = 1584
26304
229k
    CEFBS_None, // L2_ploadruhf_pi = 1585
26305
229k
    CEFBS_None, // L2_ploadruhfnew_io = 1586
26306
229k
    CEFBS_None, // L2_ploadruhfnew_pi = 1587
26307
229k
    CEFBS_None, // L2_ploadruht_io = 1588
26308
229k
    CEFBS_None, // L2_ploadruht_pi = 1589
26309
229k
    CEFBS_None, // L2_ploadruhtnew_io = 1590
26310
229k
    CEFBS_None, // L2_ploadruhtnew_pi = 1591
26311
229k
    CEFBS_None, // L4_add_memopb_io = 1592
26312
229k
    CEFBS_None, // L4_add_memoph_io = 1593
26313
229k
    CEFBS_None, // L4_add_memopw_io = 1594
26314
229k
    CEFBS_None, // L4_and_memopb_io = 1595
26315
229k
    CEFBS_None, // L4_and_memoph_io = 1596
26316
229k
    CEFBS_None, // L4_and_memopw_io = 1597
26317
229k
    CEFBS_None, // L4_iadd_memopb_io = 1598
26318
229k
    CEFBS_None, // L4_iadd_memoph_io = 1599
26319
229k
    CEFBS_None, // L4_iadd_memopw_io = 1600
26320
229k
    CEFBS_None, // L4_iand_memopb_io = 1601
26321
229k
    CEFBS_None, // L4_iand_memoph_io = 1602
26322
229k
    CEFBS_None, // L4_iand_memopw_io = 1603
26323
229k
    CEFBS_None, // L4_ior_memopb_io = 1604
26324
229k
    CEFBS_None, // L4_ior_memoph_io = 1605
26325
229k
    CEFBS_None, // L4_ior_memopw_io = 1606
26326
229k
    CEFBS_None, // L4_isub_memopb_io = 1607
26327
229k
    CEFBS_None, // L4_isub_memoph_io = 1608
26328
229k
    CEFBS_None, // L4_isub_memopw_io = 1609
26329
229k
    CEFBS_None, // L4_loadalignb_ap = 1610
26330
229k
    CEFBS_None, // L4_loadalignb_ur = 1611
26331
229k
    CEFBS_None, // L4_loadalignh_ap = 1612
26332
229k
    CEFBS_None, // L4_loadalignh_ur = 1613
26333
229k
    CEFBS_None, // L4_loadbsw2_ap = 1614
26334
229k
    CEFBS_None, // L4_loadbsw2_ur = 1615
26335
229k
    CEFBS_None, // L4_loadbsw4_ap = 1616
26336
229k
    CEFBS_None, // L4_loadbsw4_ur = 1617
26337
229k
    CEFBS_None, // L4_loadbzw2_ap = 1618
26338
229k
    CEFBS_None, // L4_loadbzw2_ur = 1619
26339
229k
    CEFBS_None, // L4_loadbzw4_ap = 1620
26340
229k
    CEFBS_None, // L4_loadbzw4_ur = 1621
26341
229k
    CEFBS_HasV68, // L4_loadd_aq = 1622
26342
229k
    CEFBS_None, // L4_loadd_locked = 1623
26343
229k
    CEFBS_None, // L4_loadrb_ap = 1624
26344
229k
    CEFBS_None, // L4_loadrb_rr = 1625
26345
229k
    CEFBS_None, // L4_loadrb_ur = 1626
26346
229k
    CEFBS_None, // L4_loadrd_ap = 1627
26347
229k
    CEFBS_None, // L4_loadrd_rr = 1628
26348
229k
    CEFBS_None, // L4_loadrd_ur = 1629
26349
229k
    CEFBS_None, // L4_loadrh_ap = 1630
26350
229k
    CEFBS_None, // L4_loadrh_rr = 1631
26351
229k
    CEFBS_None, // L4_loadrh_ur = 1632
26352
229k
    CEFBS_None, // L4_loadri_ap = 1633
26353
229k
    CEFBS_None, // L4_loadri_rr = 1634
26354
229k
    CEFBS_None, // L4_loadri_ur = 1635
26355
229k
    CEFBS_None, // L4_loadrub_ap = 1636
26356
229k
    CEFBS_None, // L4_loadrub_rr = 1637
26357
229k
    CEFBS_None, // L4_loadrub_ur = 1638
26358
229k
    CEFBS_None, // L4_loadruh_ap = 1639
26359
229k
    CEFBS_None, // L4_loadruh_rr = 1640
26360
229k
    CEFBS_None, // L4_loadruh_ur = 1641
26361
229k
    CEFBS_None, // L4_loadw_phys = 1642
26362
229k
    CEFBS_None, // L4_or_memopb_io = 1643
26363
229k
    CEFBS_None, // L4_or_memoph_io = 1644
26364
229k
    CEFBS_None, // L4_or_memopw_io = 1645
26365
229k
    CEFBS_None, // L4_ploadrbf_abs = 1646
26366
229k
    CEFBS_None, // L4_ploadrbf_rr = 1647
26367
229k
    CEFBS_None, // L4_ploadrbfnew_abs = 1648
26368
229k
    CEFBS_None, // L4_ploadrbfnew_rr = 1649
26369
229k
    CEFBS_None, // L4_ploadrbt_abs = 1650
26370
229k
    CEFBS_None, // L4_ploadrbt_rr = 1651
26371
229k
    CEFBS_None, // L4_ploadrbtnew_abs = 1652
26372
229k
    CEFBS_None, // L4_ploadrbtnew_rr = 1653
26373
229k
    CEFBS_None, // L4_ploadrdf_abs = 1654
26374
229k
    CEFBS_None, // L4_ploadrdf_rr = 1655
26375
229k
    CEFBS_None, // L4_ploadrdfnew_abs = 1656
26376
229k
    CEFBS_None, // L4_ploadrdfnew_rr = 1657
26377
229k
    CEFBS_None, // L4_ploadrdt_abs = 1658
26378
229k
    CEFBS_None, // L4_ploadrdt_rr = 1659
26379
229k
    CEFBS_None, // L4_ploadrdtnew_abs = 1660
26380
229k
    CEFBS_None, // L4_ploadrdtnew_rr = 1661
26381
229k
    CEFBS_None, // L4_ploadrhf_abs = 1662
26382
229k
    CEFBS_None, // L4_ploadrhf_rr = 1663
26383
229k
    CEFBS_None, // L4_ploadrhfnew_abs = 1664
26384
229k
    CEFBS_None, // L4_ploadrhfnew_rr = 1665
26385
229k
    CEFBS_None, // L4_ploadrht_abs = 1666
26386
229k
    CEFBS_None, // L4_ploadrht_rr = 1667
26387
229k
    CEFBS_None, // L4_ploadrhtnew_abs = 1668
26388
229k
    CEFBS_None, // L4_ploadrhtnew_rr = 1669
26389
229k
    CEFBS_None, // L4_ploadrif_abs = 1670
26390
229k
    CEFBS_None, // L4_ploadrif_rr = 1671
26391
229k
    CEFBS_None, // L4_ploadrifnew_abs = 1672
26392
229k
    CEFBS_None, // L4_ploadrifnew_rr = 1673
26393
229k
    CEFBS_None, // L4_ploadrit_abs = 1674
26394
229k
    CEFBS_None, // L4_ploadrit_rr = 1675
26395
229k
    CEFBS_None, // L4_ploadritnew_abs = 1676
26396
229k
    CEFBS_None, // L4_ploadritnew_rr = 1677
26397
229k
    CEFBS_None, // L4_ploadrubf_abs = 1678
26398
229k
    CEFBS_None, // L4_ploadrubf_rr = 1679
26399
229k
    CEFBS_None, // L4_ploadrubfnew_abs = 1680
26400
229k
    CEFBS_None, // L4_ploadrubfnew_rr = 1681
26401
229k
    CEFBS_None, // L4_ploadrubt_abs = 1682
26402
229k
    CEFBS_None, // L4_ploadrubt_rr = 1683
26403
229k
    CEFBS_None, // L4_ploadrubtnew_abs = 1684
26404
229k
    CEFBS_None, // L4_ploadrubtnew_rr = 1685
26405
229k
    CEFBS_None, // L4_ploadruhf_abs = 1686
26406
229k
    CEFBS_None, // L4_ploadruhf_rr = 1687
26407
229k
    CEFBS_None, // L4_ploadruhfnew_abs = 1688
26408
229k
    CEFBS_None, // L4_ploadruhfnew_rr = 1689
26409
229k
    CEFBS_None, // L4_ploadruht_abs = 1690
26410
229k
    CEFBS_None, // L4_ploadruht_rr = 1691
26411
229k
    CEFBS_None, // L4_ploadruhtnew_abs = 1692
26412
229k
    CEFBS_None, // L4_ploadruhtnew_rr = 1693
26413
229k
    CEFBS_None, // L4_return = 1694
26414
229k
    CEFBS_None, // L4_return_f = 1695
26415
229k
    CEFBS_None, // L4_return_fnew_pnt = 1696
26416
229k
    CEFBS_None, // L4_return_fnew_pt = 1697
26417
229k
    CEFBS_None, // L4_return_t = 1698
26418
229k
    CEFBS_None, // L4_return_tnew_pnt = 1699
26419
229k
    CEFBS_None, // L4_return_tnew_pt = 1700
26420
229k
    CEFBS_None, // L4_sub_memopb_io = 1701
26421
229k
    CEFBS_None, // L4_sub_memoph_io = 1702
26422
229k
    CEFBS_None, // L4_sub_memopw_io = 1703
26423
229k
    CEFBS_HasV66, // L6_memcpy = 1704
26424
229k
    CEFBS_None, // LO = 1705
26425
229k
    CEFBS_None, // M2_acci = 1706
26426
229k
    CEFBS_None, // M2_accii = 1707
26427
229k
    CEFBS_None, // M2_cmaci_s0 = 1708
26428
229k
    CEFBS_None, // M2_cmacr_s0 = 1709
26429
229k
    CEFBS_None, // M2_cmacs_s0 = 1710
26430
229k
    CEFBS_None, // M2_cmacs_s1 = 1711
26431
229k
    CEFBS_None, // M2_cmacsc_s0 = 1712
26432
229k
    CEFBS_None, // M2_cmacsc_s1 = 1713
26433
229k
    CEFBS_None, // M2_cmpyi_s0 = 1714
26434
229k
    CEFBS_None, // M2_cmpyr_s0 = 1715
26435
229k
    CEFBS_None, // M2_cmpyrs_s0 = 1716
26436
229k
    CEFBS_None, // M2_cmpyrs_s1 = 1717
26437
229k
    CEFBS_None, // M2_cmpyrsc_s0 = 1718
26438
229k
    CEFBS_None, // M2_cmpyrsc_s1 = 1719
26439
229k
    CEFBS_None, // M2_cmpys_s0 = 1720
26440
229k
    CEFBS_None, // M2_cmpys_s1 = 1721
26441
229k
    CEFBS_None, // M2_cmpysc_s0 = 1722
26442
229k
    CEFBS_None, // M2_cmpysc_s1 = 1723
26443
229k
    CEFBS_None, // M2_cnacs_s0 = 1724
26444
229k
    CEFBS_None, // M2_cnacs_s1 = 1725
26445
229k
    CEFBS_None, // M2_cnacsc_s0 = 1726
26446
229k
    CEFBS_None, // M2_cnacsc_s1 = 1727
26447
229k
    CEFBS_None, // M2_dpmpyss_acc_s0 = 1728
26448
229k
    CEFBS_None, // M2_dpmpyss_nac_s0 = 1729
26449
229k
    CEFBS_None, // M2_dpmpyss_rnd_s0 = 1730
26450
229k
    CEFBS_None, // M2_dpmpyss_s0 = 1731
26451
229k
    CEFBS_None, // M2_dpmpyuu_acc_s0 = 1732
26452
229k
    CEFBS_None, // M2_dpmpyuu_nac_s0 = 1733
26453
229k
    CEFBS_None, // M2_dpmpyuu_s0 = 1734
26454
229k
    CEFBS_None, // M2_hmmpyh_rs1 = 1735
26455
229k
    CEFBS_None, // M2_hmmpyh_s1 = 1736
26456
229k
    CEFBS_None, // M2_hmmpyl_rs1 = 1737
26457
229k
    CEFBS_None, // M2_hmmpyl_s1 = 1738
26458
229k
    CEFBS_None, // M2_maci = 1739
26459
229k
    CEFBS_None, // M2_macsin = 1740
26460
229k
    CEFBS_None, // M2_macsip = 1741
26461
229k
    CEFBS_None, // M2_mmachs_rs0 = 1742
26462
229k
    CEFBS_None, // M2_mmachs_rs1 = 1743
26463
229k
    CEFBS_None, // M2_mmachs_s0 = 1744
26464
229k
    CEFBS_None, // M2_mmachs_s1 = 1745
26465
229k
    CEFBS_None, // M2_mmacls_rs0 = 1746
26466
229k
    CEFBS_None, // M2_mmacls_rs1 = 1747
26467
229k
    CEFBS_None, // M2_mmacls_s0 = 1748
26468
229k
    CEFBS_None, // M2_mmacls_s1 = 1749
26469
229k
    CEFBS_None, // M2_mmacuhs_rs0 = 1750
26470
229k
    CEFBS_None, // M2_mmacuhs_rs1 = 1751
26471
229k
    CEFBS_None, // M2_mmacuhs_s0 = 1752
26472
229k
    CEFBS_None, // M2_mmacuhs_s1 = 1753
26473
229k
    CEFBS_None, // M2_mmaculs_rs0 = 1754
26474
229k
    CEFBS_None, // M2_mmaculs_rs1 = 1755
26475
229k
    CEFBS_None, // M2_mmaculs_s0 = 1756
26476
229k
    CEFBS_None, // M2_mmaculs_s1 = 1757
26477
229k
    CEFBS_None, // M2_mmpyh_rs0 = 1758
26478
229k
    CEFBS_None, // M2_mmpyh_rs1 = 1759
26479
229k
    CEFBS_None, // M2_mmpyh_s0 = 1760
26480
229k
    CEFBS_None, // M2_mmpyh_s1 = 1761
26481
229k
    CEFBS_None, // M2_mmpyl_rs0 = 1762
26482
229k
    CEFBS_None, // M2_mmpyl_rs1 = 1763
26483
229k
    CEFBS_None, // M2_mmpyl_s0 = 1764
26484
229k
    CEFBS_None, // M2_mmpyl_s1 = 1765
26485
229k
    CEFBS_None, // M2_mmpyuh_rs0 = 1766
26486
229k
    CEFBS_None, // M2_mmpyuh_rs1 = 1767
26487
229k
    CEFBS_None, // M2_mmpyuh_s0 = 1768
26488
229k
    CEFBS_None, // M2_mmpyuh_s1 = 1769
26489
229k
    CEFBS_None, // M2_mmpyul_rs0 = 1770
26490
229k
    CEFBS_None, // M2_mmpyul_rs1 = 1771
26491
229k
    CEFBS_None, // M2_mmpyul_s0 = 1772
26492
229k
    CEFBS_None, // M2_mmpyul_s1 = 1773
26493
229k
    CEFBS_HasV66, // M2_mnaci = 1774
26494
229k
    CEFBS_None, // M2_mpy_acc_hh_s0 = 1775
26495
229k
    CEFBS_None, // M2_mpy_acc_hh_s1 = 1776
26496
229k
    CEFBS_None, // M2_mpy_acc_hl_s0 = 1777
26497
229k
    CEFBS_None, // M2_mpy_acc_hl_s1 = 1778
26498
229k
    CEFBS_None, // M2_mpy_acc_lh_s0 = 1779
26499
229k
    CEFBS_None, // M2_mpy_acc_lh_s1 = 1780
26500
229k
    CEFBS_None, // M2_mpy_acc_ll_s0 = 1781
26501
229k
    CEFBS_None, // M2_mpy_acc_ll_s1 = 1782
26502
229k
    CEFBS_None, // M2_mpy_acc_sat_hh_s0 = 1783
26503
229k
    CEFBS_None, // M2_mpy_acc_sat_hh_s1 = 1784
26504
229k
    CEFBS_None, // M2_mpy_acc_sat_hl_s0 = 1785
26505
229k
    CEFBS_None, // M2_mpy_acc_sat_hl_s1 = 1786
26506
229k
    CEFBS_None, // M2_mpy_acc_sat_lh_s0 = 1787
26507
229k
    CEFBS_None, // M2_mpy_acc_sat_lh_s1 = 1788
26508
229k
    CEFBS_None, // M2_mpy_acc_sat_ll_s0 = 1789
26509
229k
    CEFBS_None, // M2_mpy_acc_sat_ll_s1 = 1790
26510
229k
    CEFBS_None, // M2_mpy_hh_s0 = 1791
26511
229k
    CEFBS_None, // M2_mpy_hh_s1 = 1792
26512
229k
    CEFBS_None, // M2_mpy_hl_s0 = 1793
26513
229k
    CEFBS_None, // M2_mpy_hl_s1 = 1794
26514
229k
    CEFBS_None, // M2_mpy_lh_s0 = 1795
26515
229k
    CEFBS_None, // M2_mpy_lh_s1 = 1796
26516
229k
    CEFBS_None, // M2_mpy_ll_s0 = 1797
26517
229k
    CEFBS_None, // M2_mpy_ll_s1 = 1798
26518
229k
    CEFBS_None, // M2_mpy_nac_hh_s0 = 1799
26519
229k
    CEFBS_None, // M2_mpy_nac_hh_s1 = 1800
26520
229k
    CEFBS_None, // M2_mpy_nac_hl_s0 = 1801
26521
229k
    CEFBS_None, // M2_mpy_nac_hl_s1 = 1802
26522
229k
    CEFBS_None, // M2_mpy_nac_lh_s0 = 1803
26523
229k
    CEFBS_None, // M2_mpy_nac_lh_s1 = 1804
26524
229k
    CEFBS_None, // M2_mpy_nac_ll_s0 = 1805
26525
229k
    CEFBS_None, // M2_mpy_nac_ll_s1 = 1806
26526
229k
    CEFBS_None, // M2_mpy_nac_sat_hh_s0 = 1807
26527
229k
    CEFBS_None, // M2_mpy_nac_sat_hh_s1 = 1808
26528
229k
    CEFBS_None, // M2_mpy_nac_sat_hl_s0 = 1809
26529
229k
    CEFBS_None, // M2_mpy_nac_sat_hl_s1 = 1810
26530
229k
    CEFBS_None, // M2_mpy_nac_sat_lh_s0 = 1811
26531
229k
    CEFBS_None, // M2_mpy_nac_sat_lh_s1 = 1812
26532
229k
    CEFBS_None, // M2_mpy_nac_sat_ll_s0 = 1813
26533
229k
    CEFBS_None, // M2_mpy_nac_sat_ll_s1 = 1814
26534
229k
    CEFBS_None, // M2_mpy_rnd_hh_s0 = 1815
26535
229k
    CEFBS_None, // M2_mpy_rnd_hh_s1 = 1816
26536
229k
    CEFBS_None, // M2_mpy_rnd_hl_s0 = 1817
26537
229k
    CEFBS_None, // M2_mpy_rnd_hl_s1 = 1818
26538
229k
    CEFBS_None, // M2_mpy_rnd_lh_s0 = 1819
26539
229k
    CEFBS_None, // M2_mpy_rnd_lh_s1 = 1820
26540
229k
    CEFBS_None, // M2_mpy_rnd_ll_s0 = 1821
26541
229k
    CEFBS_None, // M2_mpy_rnd_ll_s1 = 1822
26542
229k
    CEFBS_None, // M2_mpy_sat_hh_s0 = 1823
26543
229k
    CEFBS_None, // M2_mpy_sat_hh_s1 = 1824
26544
229k
    CEFBS_None, // M2_mpy_sat_hl_s0 = 1825
26545
229k
    CEFBS_None, // M2_mpy_sat_hl_s1 = 1826
26546
229k
    CEFBS_None, // M2_mpy_sat_lh_s0 = 1827
26547
229k
    CEFBS_None, // M2_mpy_sat_lh_s1 = 1828
26548
229k
    CEFBS_None, // M2_mpy_sat_ll_s0 = 1829
26549
229k
    CEFBS_None, // M2_mpy_sat_ll_s1 = 1830
26550
229k
    CEFBS_None, // M2_mpy_sat_rnd_hh_s0 = 1831
26551
229k
    CEFBS_None, // M2_mpy_sat_rnd_hh_s1 = 1832
26552
229k
    CEFBS_None, // M2_mpy_sat_rnd_hl_s0 = 1833
26553
229k
    CEFBS_None, // M2_mpy_sat_rnd_hl_s1 = 1834
26554
229k
    CEFBS_None, // M2_mpy_sat_rnd_lh_s0 = 1835
26555
229k
    CEFBS_None, // M2_mpy_sat_rnd_lh_s1 = 1836
26556
229k
    CEFBS_None, // M2_mpy_sat_rnd_ll_s0 = 1837
26557
229k
    CEFBS_None, // M2_mpy_sat_rnd_ll_s1 = 1838
26558
229k
    CEFBS_None, // M2_mpy_up = 1839
26559
229k
    CEFBS_None, // M2_mpy_up_s1 = 1840
26560
229k
    CEFBS_None, // M2_mpy_up_s1_sat = 1841
26561
229k
    CEFBS_None, // M2_mpyd_acc_hh_s0 = 1842
26562
229k
    CEFBS_None, // M2_mpyd_acc_hh_s1 = 1843
26563
229k
    CEFBS_None, // M2_mpyd_acc_hl_s0 = 1844
26564
229k
    CEFBS_None, // M2_mpyd_acc_hl_s1 = 1845
26565
229k
    CEFBS_None, // M2_mpyd_acc_lh_s0 = 1846
26566
229k
    CEFBS_None, // M2_mpyd_acc_lh_s1 = 1847
26567
229k
    CEFBS_None, // M2_mpyd_acc_ll_s0 = 1848
26568
229k
    CEFBS_None, // M2_mpyd_acc_ll_s1 = 1849
26569
229k
    CEFBS_None, // M2_mpyd_hh_s0 = 1850
26570
229k
    CEFBS_None, // M2_mpyd_hh_s1 = 1851
26571
229k
    CEFBS_None, // M2_mpyd_hl_s0 = 1852
26572
229k
    CEFBS_None, // M2_mpyd_hl_s1 = 1853
26573
229k
    CEFBS_None, // M2_mpyd_lh_s0 = 1854
26574
229k
    CEFBS_None, // M2_mpyd_lh_s1 = 1855
26575
229k
    CEFBS_None, // M2_mpyd_ll_s0 = 1856
26576
229k
    CEFBS_None, // M2_mpyd_ll_s1 = 1857
26577
229k
    CEFBS_None, // M2_mpyd_nac_hh_s0 = 1858
26578
229k
    CEFBS_None, // M2_mpyd_nac_hh_s1 = 1859
26579
229k
    CEFBS_None, // M2_mpyd_nac_hl_s0 = 1860
26580
229k
    CEFBS_None, // M2_mpyd_nac_hl_s1 = 1861
26581
229k
    CEFBS_None, // M2_mpyd_nac_lh_s0 = 1862
26582
229k
    CEFBS_None, // M2_mpyd_nac_lh_s1 = 1863
26583
229k
    CEFBS_None, // M2_mpyd_nac_ll_s0 = 1864
26584
229k
    CEFBS_None, // M2_mpyd_nac_ll_s1 = 1865
26585
229k
    CEFBS_None, // M2_mpyd_rnd_hh_s0 = 1866
26586
229k
    CEFBS_None, // M2_mpyd_rnd_hh_s1 = 1867
26587
229k
    CEFBS_None, // M2_mpyd_rnd_hl_s0 = 1868
26588
229k
    CEFBS_None, // M2_mpyd_rnd_hl_s1 = 1869
26589
229k
    CEFBS_None, // M2_mpyd_rnd_lh_s0 = 1870
26590
229k
    CEFBS_None, // M2_mpyd_rnd_lh_s1 = 1871
26591
229k
    CEFBS_None, // M2_mpyd_rnd_ll_s0 = 1872
26592
229k
    CEFBS_None, // M2_mpyd_rnd_ll_s1 = 1873
26593
229k
    CEFBS_None, // M2_mpyi = 1874
26594
229k
    CEFBS_None, // M2_mpysin = 1875
26595
229k
    CEFBS_None, // M2_mpysip = 1876
26596
229k
    CEFBS_None, // M2_mpysu_up = 1877
26597
229k
    CEFBS_None, // M2_mpyu_acc_hh_s0 = 1878
26598
229k
    CEFBS_None, // M2_mpyu_acc_hh_s1 = 1879
26599
229k
    CEFBS_None, // M2_mpyu_acc_hl_s0 = 1880
26600
229k
    CEFBS_None, // M2_mpyu_acc_hl_s1 = 1881
26601
229k
    CEFBS_None, // M2_mpyu_acc_lh_s0 = 1882
26602
229k
    CEFBS_None, // M2_mpyu_acc_lh_s1 = 1883
26603
229k
    CEFBS_None, // M2_mpyu_acc_ll_s0 = 1884
26604
229k
    CEFBS_None, // M2_mpyu_acc_ll_s1 = 1885
26605
229k
    CEFBS_None, // M2_mpyu_hh_s0 = 1886
26606
229k
    CEFBS_None, // M2_mpyu_hh_s1 = 1887
26607
229k
    CEFBS_None, // M2_mpyu_hl_s0 = 1888
26608
229k
    CEFBS_None, // M2_mpyu_hl_s1 = 1889
26609
229k
    CEFBS_None, // M2_mpyu_lh_s0 = 1890
26610
229k
    CEFBS_None, // M2_mpyu_lh_s1 = 1891
26611
229k
    CEFBS_None, // M2_mpyu_ll_s0 = 1892
26612
229k
    CEFBS_None, // M2_mpyu_ll_s1 = 1893
26613
229k
    CEFBS_None, // M2_mpyu_nac_hh_s0 = 1894
26614
229k
    CEFBS_None, // M2_mpyu_nac_hh_s1 = 1895
26615
229k
    CEFBS_None, // M2_mpyu_nac_hl_s0 = 1896
26616
229k
    CEFBS_None, // M2_mpyu_nac_hl_s1 = 1897
26617
229k
    CEFBS_None, // M2_mpyu_nac_lh_s0 = 1898
26618
229k
    CEFBS_None, // M2_mpyu_nac_lh_s1 = 1899
26619
229k
    CEFBS_None, // M2_mpyu_nac_ll_s0 = 1900
26620
229k
    CEFBS_None, // M2_mpyu_nac_ll_s1 = 1901
26621
229k
    CEFBS_None, // M2_mpyu_up = 1902
26622
229k
    CEFBS_None, // M2_mpyud_acc_hh_s0 = 1903
26623
229k
    CEFBS_None, // M2_mpyud_acc_hh_s1 = 1904
26624
229k
    CEFBS_None, // M2_mpyud_acc_hl_s0 = 1905
26625
229k
    CEFBS_None, // M2_mpyud_acc_hl_s1 = 1906
26626
229k
    CEFBS_None, // M2_mpyud_acc_lh_s0 = 1907
26627
229k
    CEFBS_None, // M2_mpyud_acc_lh_s1 = 1908
26628
229k
    CEFBS_None, // M2_mpyud_acc_ll_s0 = 1909
26629
229k
    CEFBS_None, // M2_mpyud_acc_ll_s1 = 1910
26630
229k
    CEFBS_None, // M2_mpyud_hh_s0 = 1911
26631
229k
    CEFBS_None, // M2_mpyud_hh_s1 = 1912
26632
229k
    CEFBS_None, // M2_mpyud_hl_s0 = 1913
26633
229k
    CEFBS_None, // M2_mpyud_hl_s1 = 1914
26634
229k
    CEFBS_None, // M2_mpyud_lh_s0 = 1915
26635
229k
    CEFBS_None, // M2_mpyud_lh_s1 = 1916
26636
229k
    CEFBS_None, // M2_mpyud_ll_s0 = 1917
26637
229k
    CEFBS_None, // M2_mpyud_ll_s1 = 1918
26638
229k
    CEFBS_None, // M2_mpyud_nac_hh_s0 = 1919
26639
229k
    CEFBS_None, // M2_mpyud_nac_hh_s1 = 1920
26640
229k
    CEFBS_None, // M2_mpyud_nac_hl_s0 = 1921
26641
229k
    CEFBS_None, // M2_mpyud_nac_hl_s1 = 1922
26642
229k
    CEFBS_None, // M2_mpyud_nac_lh_s0 = 1923
26643
229k
    CEFBS_None, // M2_mpyud_nac_lh_s1 = 1924
26644
229k
    CEFBS_None, // M2_mpyud_nac_ll_s0 = 1925
26645
229k
    CEFBS_None, // M2_mpyud_nac_ll_s1 = 1926
26646
229k
    CEFBS_None, // M2_nacci = 1927
26647
229k
    CEFBS_None, // M2_naccii = 1928
26648
229k
    CEFBS_None, // M2_subacc = 1929
26649
229k
    CEFBS_None, // M2_vabsdiffh = 1930
26650
229k
    CEFBS_None, // M2_vabsdiffw = 1931
26651
229k
    CEFBS_None, // M2_vcmac_s0_sat_i = 1932
26652
229k
    CEFBS_None, // M2_vcmac_s0_sat_r = 1933
26653
229k
    CEFBS_None, // M2_vcmpy_s0_sat_i = 1934
26654
229k
    CEFBS_None, // M2_vcmpy_s0_sat_r = 1935
26655
229k
    CEFBS_None, // M2_vcmpy_s1_sat_i = 1936
26656
229k
    CEFBS_None, // M2_vcmpy_s1_sat_r = 1937
26657
229k
    CEFBS_None, // M2_vdmacs_s0 = 1938
26658
229k
    CEFBS_None, // M2_vdmacs_s1 = 1939
26659
229k
    CEFBS_None, // M2_vdmpyrs_s0 = 1940
26660
229k
    CEFBS_None, // M2_vdmpyrs_s1 = 1941
26661
229k
    CEFBS_None, // M2_vdmpys_s0 = 1942
26662
229k
    CEFBS_None, // M2_vdmpys_s1 = 1943
26663
229k
    CEFBS_None, // M2_vmac2 = 1944
26664
229k
    CEFBS_None, // M2_vmac2es = 1945
26665
229k
    CEFBS_None, // M2_vmac2es_s0 = 1946
26666
229k
    CEFBS_None, // M2_vmac2es_s1 = 1947
26667
229k
    CEFBS_None, // M2_vmac2s_s0 = 1948
26668
229k
    CEFBS_None, // M2_vmac2s_s1 = 1949
26669
229k
    CEFBS_None, // M2_vmac2su_s0 = 1950
26670
229k
    CEFBS_None, // M2_vmac2su_s1 = 1951
26671
229k
    CEFBS_None, // M2_vmpy2es_s0 = 1952
26672
229k
    CEFBS_None, // M2_vmpy2es_s1 = 1953
26673
229k
    CEFBS_None, // M2_vmpy2s_s0 = 1954
26674
229k
    CEFBS_None, // M2_vmpy2s_s0pack = 1955
26675
229k
    CEFBS_None, // M2_vmpy2s_s1 = 1956
26676
229k
    CEFBS_None, // M2_vmpy2s_s1pack = 1957
26677
229k
    CEFBS_None, // M2_vmpy2su_s0 = 1958
26678
229k
    CEFBS_None, // M2_vmpy2su_s1 = 1959
26679
229k
    CEFBS_None, // M2_vraddh = 1960
26680
229k
    CEFBS_None, // M2_vradduh = 1961
26681
229k
    CEFBS_None, // M2_vrcmaci_s0 = 1962
26682
229k
    CEFBS_None, // M2_vrcmaci_s0c = 1963
26683
229k
    CEFBS_None, // M2_vrcmacr_s0 = 1964
26684
229k
    CEFBS_None, // M2_vrcmacr_s0c = 1965
26685
229k
    CEFBS_None, // M2_vrcmpyi_s0 = 1966
26686
229k
    CEFBS_None, // M2_vrcmpyi_s0c = 1967
26687
229k
    CEFBS_None, // M2_vrcmpyr_s0 = 1968
26688
229k
    CEFBS_None, // M2_vrcmpyr_s0c = 1969
26689
229k
    CEFBS_None, // M2_vrcmpys_acc_s1_h = 1970
26690
229k
    CEFBS_None, // M2_vrcmpys_acc_s1_l = 1971
26691
229k
    CEFBS_None, // M2_vrcmpys_s1_h = 1972
26692
229k
    CEFBS_None, // M2_vrcmpys_s1_l = 1973
26693
229k
    CEFBS_None, // M2_vrcmpys_s1rp_h = 1974
26694
229k
    CEFBS_None, // M2_vrcmpys_s1rp_l = 1975
26695
229k
    CEFBS_None, // M2_vrmac_s0 = 1976
26696
229k
    CEFBS_None, // M2_vrmpy_s0 = 1977
26697
229k
    CEFBS_None, // M2_xor_xacc = 1978
26698
229k
    CEFBS_None, // M4_and_and = 1979
26699
229k
    CEFBS_None, // M4_and_andn = 1980
26700
229k
    CEFBS_None, // M4_and_or = 1981
26701
229k
    CEFBS_None, // M4_and_xor = 1982
26702
229k
    CEFBS_None, // M4_cmpyi_wh = 1983
26703
229k
    CEFBS_None, // M4_cmpyi_whc = 1984
26704
229k
    CEFBS_None, // M4_cmpyr_wh = 1985
26705
229k
    CEFBS_None, // M4_cmpyr_whc = 1986
26706
229k
    CEFBS_None, // M4_mac_up_s1_sat = 1987
26707
229k
    CEFBS_None, // M4_mpyri_addi = 1988
26708
229k
    CEFBS_None, // M4_mpyri_addr = 1989
26709
229k
    CEFBS_None, // M4_mpyri_addr_u2 = 1990
26710
229k
    CEFBS_None, // M4_mpyrr_addi = 1991
26711
229k
    CEFBS_None, // M4_mpyrr_addr = 1992
26712
229k
    CEFBS_None, // M4_nac_up_s1_sat = 1993
26713
229k
    CEFBS_None, // M4_or_and = 1994
26714
229k
    CEFBS_None, // M4_or_andn = 1995
26715
229k
    CEFBS_None, // M4_or_or = 1996
26716
229k
    CEFBS_None, // M4_or_xor = 1997
26717
229k
    CEFBS_None, // M4_pmpyw = 1998
26718
229k
    CEFBS_None, // M4_pmpyw_acc = 1999
26719
229k
    CEFBS_None, // M4_vpmpyh = 2000
26720
229k
    CEFBS_None, // M4_vpmpyh_acc = 2001
26721
229k
    CEFBS_None, // M4_vrmpyeh_acc_s0 = 2002
26722
229k
    CEFBS_None, // M4_vrmpyeh_acc_s1 = 2003
26723
229k
    CEFBS_None, // M4_vrmpyeh_s0 = 2004
26724
229k
    CEFBS_None, // M4_vrmpyeh_s1 = 2005
26725
229k
    CEFBS_None, // M4_vrmpyoh_acc_s0 = 2006
26726
229k
    CEFBS_None, // M4_vrmpyoh_acc_s1 = 2007
26727
229k
    CEFBS_None, // M4_vrmpyoh_s0 = 2008
26728
229k
    CEFBS_None, // M4_vrmpyoh_s1 = 2009
26729
229k
    CEFBS_None, // M4_xor_and = 2010
26730
229k
    CEFBS_None, // M4_xor_andn = 2011
26731
229k
    CEFBS_None, // M4_xor_or = 2012
26732
229k
    CEFBS_None, // M4_xor_xacc = 2013
26733
229k
    CEFBS_None, // M5_vdmacbsu = 2014
26734
229k
    CEFBS_None, // M5_vdmpybsu = 2015
26735
229k
    CEFBS_None, // M5_vmacbsu = 2016
26736
229k
    CEFBS_None, // M5_vmacbuu = 2017
26737
229k
    CEFBS_None, // M5_vmpybsu = 2018
26738
229k
    CEFBS_None, // M5_vmpybuu = 2019
26739
229k
    CEFBS_None, // M5_vrmacbsu = 2020
26740
229k
    CEFBS_None, // M5_vrmacbuu = 2021
26741
229k
    CEFBS_None, // M5_vrmpybsu = 2022
26742
229k
    CEFBS_None, // M5_vrmpybuu = 2023
26743
229k
    CEFBS_HasV62, // M6_vabsdiffb = 2024
26744
229k
    CEFBS_HasV62, // M6_vabsdiffub = 2025
26745
229k
    CEFBS_HasV67_UseAudio, // M7_dcmpyiw = 2026
26746
229k
    CEFBS_HasV67_UseAudio, // M7_dcmpyiw_acc = 2027
26747
229k
    CEFBS_HasV67_UseAudio, // M7_dcmpyiwc = 2028
26748
229k
    CEFBS_HasV67_UseAudio, // M7_dcmpyiwc_acc = 2029
26749
229k
    CEFBS_HasV67_UseAudio, // M7_dcmpyrw = 2030
26750
229k
    CEFBS_HasV67_UseAudio, // M7_dcmpyrw_acc = 2031
26751
229k
    CEFBS_HasV67_UseAudio, // M7_dcmpyrwc = 2032
26752
229k
    CEFBS_HasV67_UseAudio, // M7_dcmpyrwc_acc = 2033
26753
229k
    CEFBS_HasV67_UseAudio, // M7_wcmpyiw = 2034
26754
229k
    CEFBS_HasV67_UseAudio, // M7_wcmpyiw_rnd = 2035
26755
229k
    CEFBS_HasV67_UseAudio, // M7_wcmpyiwc = 2036
26756
229k
    CEFBS_HasV67_UseAudio, // M7_wcmpyiwc_rnd = 2037
26757
229k
    CEFBS_HasV67_UseAudio, // M7_wcmpyrw = 2038
26758
229k
    CEFBS_HasV67_UseAudio, // M7_wcmpyrw_rnd = 2039
26759
229k
    CEFBS_HasV67_UseAudio, // M7_wcmpyrwc = 2040
26760
229k
    CEFBS_HasV67_UseAudio, // M7_wcmpyrwc_rnd = 2041
26761
229k
    CEFBS_None, // PS_call_stk = 2042
26762
229k
    CEFBS_None, // PS_callr_nr = 2043
26763
229k
    CEFBS_None, // PS_jmpret = 2044
26764
229k
    CEFBS_None, // PS_jmpretf = 2045
26765
229k
    CEFBS_None, // PS_jmpretfnew = 2046
26766
229k
    CEFBS_None, // PS_jmpretfnewpt = 2047
26767
229k
    CEFBS_None, // PS_jmprett = 2048
26768
229k
    CEFBS_None, // PS_jmprettnew = 2049
26769
229k
    CEFBS_None, // PS_jmprettnewpt = 2050
26770
229k
    CEFBS_None, // PS_loadrbabs = 2051
26771
229k
    CEFBS_None, // PS_loadrdabs = 2052
26772
229k
    CEFBS_None, // PS_loadrhabs = 2053
26773
229k
    CEFBS_None, // PS_loadriabs = 2054
26774
229k
    CEFBS_None, // PS_loadrubabs = 2055
26775
229k
    CEFBS_None, // PS_loadruhabs = 2056
26776
229k
    CEFBS_None, // PS_storerbabs = 2057
26777
229k
    CEFBS_None, // PS_storerbnewabs = 2058
26778
229k
    CEFBS_None, // PS_storerdabs = 2059
26779
229k
    CEFBS_None, // PS_storerfabs = 2060
26780
229k
    CEFBS_None, // PS_storerhabs = 2061
26781
229k
    CEFBS_None, // PS_storerhnewabs = 2062
26782
229k
    CEFBS_None, // PS_storeriabs = 2063
26783
229k
    CEFBS_None, // PS_storerinewabs = 2064
26784
229k
    CEFBS_HasPreV65, // PS_trap1 = 2065
26785
229k
    CEFBS_HasV68, // R6_release_at_vi = 2066
26786
229k
    CEFBS_HasV68, // R6_release_st_vi = 2067
26787
229k
    CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4 = 2068
26788
229k
    CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT = 2069
26789
229k
    CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_EXT_PIC = 2070
26790
229k
    CEFBS_None, // RESTORE_DEALLOC_BEFORE_TAILCALL_V4_PIC = 2071
26791
229k
    CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4 = 2072
26792
229k
    CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4_EXT = 2073
26793
229k
    CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4_EXT_PIC = 2074
26794
229k
    CEFBS_None, // RESTORE_DEALLOC_RET_JMP_V4_PIC = 2075
26795
229k
    CEFBS_None, // S2_addasl_rrri = 2076
26796
229k
    CEFBS_None, // S2_allocframe = 2077
26797
229k
    CEFBS_None, // S2_asl_i_p = 2078
26798
229k
    CEFBS_None, // S2_asl_i_p_acc = 2079
26799
229k
    CEFBS_None, // S2_asl_i_p_and = 2080
26800
229k
    CEFBS_None, // S2_asl_i_p_nac = 2081
26801
229k
    CEFBS_None, // S2_asl_i_p_or = 2082
26802
229k
    CEFBS_None, // S2_asl_i_p_xacc = 2083
26803
229k
    CEFBS_None, // S2_asl_i_r = 2084
26804
229k
    CEFBS_None, // S2_asl_i_r_acc = 2085
26805
229k
    CEFBS_None, // S2_asl_i_r_and = 2086
26806
229k
    CEFBS_None, // S2_asl_i_r_nac = 2087
26807
229k
    CEFBS_None, // S2_asl_i_r_or = 2088
26808
229k
    CEFBS_None, // S2_asl_i_r_sat = 2089
26809
229k
    CEFBS_None, // S2_asl_i_r_xacc = 2090
26810
229k
    CEFBS_None, // S2_asl_i_vh = 2091
26811
229k
    CEFBS_None, // S2_asl_i_vw = 2092
26812
229k
    CEFBS_None, // S2_asl_r_p = 2093
26813
229k
    CEFBS_None, // S2_asl_r_p_acc = 2094
26814
229k
    CEFBS_None, // S2_asl_r_p_and = 2095
26815
229k
    CEFBS_None, // S2_asl_r_p_nac = 2096
26816
229k
    CEFBS_None, // S2_asl_r_p_or = 2097
26817
229k
    CEFBS_None, // S2_asl_r_p_xor = 2098
26818
229k
    CEFBS_None, // S2_asl_r_r = 2099
26819
229k
    CEFBS_None, // S2_asl_r_r_acc = 2100
26820
229k
    CEFBS_None, // S2_asl_r_r_and = 2101
26821
229k
    CEFBS_None, // S2_asl_r_r_nac = 2102
26822
229k
    CEFBS_None, // S2_asl_r_r_or = 2103
26823
229k
    CEFBS_None, // S2_asl_r_r_sat = 2104
26824
229k
    CEFBS_None, // S2_asl_r_vh = 2105
26825
229k
    CEFBS_None, // S2_asl_r_vw = 2106
26826
229k
    CEFBS_None, // S2_asr_i_p = 2107
26827
229k
    CEFBS_None, // S2_asr_i_p_acc = 2108
26828
229k
    CEFBS_None, // S2_asr_i_p_and = 2109
26829
229k
    CEFBS_None, // S2_asr_i_p_nac = 2110
26830
229k
    CEFBS_None, // S2_asr_i_p_or = 2111
26831
229k
    CEFBS_None, // S2_asr_i_p_rnd = 2112
26832
229k
    CEFBS_None, // S2_asr_i_r = 2113
26833
229k
    CEFBS_None, // S2_asr_i_r_acc = 2114
26834
229k
    CEFBS_None, // S2_asr_i_r_and = 2115
26835
229k
    CEFBS_None, // S2_asr_i_r_nac = 2116
26836
229k
    CEFBS_None, // S2_asr_i_r_or = 2117
26837
229k
    CEFBS_None, // S2_asr_i_r_rnd = 2118
26838
229k
    CEFBS_None, // S2_asr_i_svw_trun = 2119
26839
229k
    CEFBS_None, // S2_asr_i_vh = 2120
26840
229k
    CEFBS_None, // S2_asr_i_vw = 2121
26841
229k
    CEFBS_None, // S2_asr_r_p = 2122
26842
229k
    CEFBS_None, // S2_asr_r_p_acc = 2123
26843
229k
    CEFBS_None, // S2_asr_r_p_and = 2124
26844
229k
    CEFBS_None, // S2_asr_r_p_nac = 2125
26845
229k
    CEFBS_None, // S2_asr_r_p_or = 2126
26846
229k
    CEFBS_None, // S2_asr_r_p_xor = 2127
26847
229k
    CEFBS_None, // S2_asr_r_r = 2128
26848
229k
    CEFBS_None, // S2_asr_r_r_acc = 2129
26849
229k
    CEFBS_None, // S2_asr_r_r_and = 2130
26850
229k
    CEFBS_None, // S2_asr_r_r_nac = 2131
26851
229k
    CEFBS_None, // S2_asr_r_r_or = 2132
26852
229k
    CEFBS_None, // S2_asr_r_r_sat = 2133
26853
229k
    CEFBS_None, // S2_asr_r_svw_trun = 2134
26854
229k
    CEFBS_None, // S2_asr_r_vh = 2135
26855
229k
    CEFBS_None, // S2_asr_r_vw = 2136
26856
229k
    CEFBS_None, // S2_brev = 2137
26857
229k
    CEFBS_None, // S2_brevp = 2138
26858
229k
    CEFBS_UseCabac, // S2_cabacdecbin = 2139
26859
229k
    CEFBS_None, // S2_cl0 = 2140
26860
229k
    CEFBS_None, // S2_cl0p = 2141
26861
229k
    CEFBS_None, // S2_cl1 = 2142
26862
229k
    CEFBS_None, // S2_cl1p = 2143
26863
229k
    CEFBS_None, // S2_clb = 2144
26864
229k
    CEFBS_None, // S2_clbnorm = 2145
26865
229k
    CEFBS_None, // S2_clbp = 2146
26866
229k
    CEFBS_None, // S2_clrbit_i = 2147
26867
229k
    CEFBS_None, // S2_clrbit_r = 2148
26868
229k
    CEFBS_None, // S2_ct0 = 2149
26869
229k
    CEFBS_None, // S2_ct0p = 2150
26870
229k
    CEFBS_None, // S2_ct1 = 2151
26871
229k
    CEFBS_None, // S2_ct1p = 2152
26872
229k
    CEFBS_None, // S2_deinterleave = 2153
26873
229k
    CEFBS_None, // S2_extractu = 2154
26874
229k
    CEFBS_None, // S2_extractu_rp = 2155
26875
229k
    CEFBS_None, // S2_extractup = 2156
26876
229k
    CEFBS_None, // S2_extractup_rp = 2157
26877
229k
    CEFBS_None, // S2_insert = 2158
26878
229k
    CEFBS_None, // S2_insert_rp = 2159
26879
229k
    CEFBS_None, // S2_insertp = 2160
26880
229k
    CEFBS_None, // S2_insertp_rp = 2161
26881
229k
    CEFBS_None, // S2_interleave = 2162
26882
229k
    CEFBS_None, // S2_lfsp = 2163
26883
229k
    CEFBS_None, // S2_lsl_r_p = 2164
26884
229k
    CEFBS_None, // S2_lsl_r_p_acc = 2165
26885
229k
    CEFBS_None, // S2_lsl_r_p_and = 2166
26886
229k
    CEFBS_None, // S2_lsl_r_p_nac = 2167
26887
229k
    CEFBS_None, // S2_lsl_r_p_or = 2168
26888
229k
    CEFBS_None, // S2_lsl_r_p_xor = 2169
26889
229k
    CEFBS_None, // S2_lsl_r_r = 2170
26890
229k
    CEFBS_None, // S2_lsl_r_r_acc = 2171
26891
229k
    CEFBS_None, // S2_lsl_r_r_and = 2172
26892
229k
    CEFBS_None, // S2_lsl_r_r_nac = 2173
26893
229k
    CEFBS_None, // S2_lsl_r_r_or = 2174
26894
229k
    CEFBS_None, // S2_lsl_r_vh = 2175
26895
229k
    CEFBS_None, // S2_lsl_r_vw = 2176
26896
229k
    CEFBS_None, // S2_lsr_i_p = 2177
26897
229k
    CEFBS_None, // S2_lsr_i_p_acc = 2178
26898
229k
    CEFBS_None, // S2_lsr_i_p_and = 2179
26899
229k
    CEFBS_None, // S2_lsr_i_p_nac = 2180
26900
229k
    CEFBS_None, // S2_lsr_i_p_or = 2181
26901
229k
    CEFBS_None, // S2_lsr_i_p_xacc = 2182
26902
229k
    CEFBS_None, // S2_lsr_i_r = 2183
26903
229k
    CEFBS_None, // S2_lsr_i_r_acc = 2184
26904
229k
    CEFBS_None, // S2_lsr_i_r_and = 2185
26905
229k
    CEFBS_None, // S2_lsr_i_r_nac = 2186
26906
229k
    CEFBS_None, // S2_lsr_i_r_or = 2187
26907
229k
    CEFBS_None, // S2_lsr_i_r_xacc = 2188
26908
229k
    CEFBS_None, // S2_lsr_i_vh = 2189
26909
229k
    CEFBS_None, // S2_lsr_i_vw = 2190
26910
229k
    CEFBS_None, // S2_lsr_r_p = 2191
26911
229k
    CEFBS_None, // S2_lsr_r_p_acc = 2192
26912
229k
    CEFBS_None, // S2_lsr_r_p_and = 2193
26913
229k
    CEFBS_None, // S2_lsr_r_p_nac = 2194
26914
229k
    CEFBS_None, // S2_lsr_r_p_or = 2195
26915
229k
    CEFBS_None, // S2_lsr_r_p_xor = 2196
26916
229k
    CEFBS_None, // S2_lsr_r_r = 2197
26917
229k
    CEFBS_None, // S2_lsr_r_r_acc = 2198
26918
229k
    CEFBS_None, // S2_lsr_r_r_and = 2199
26919
229k
    CEFBS_None, // S2_lsr_r_r_nac = 2200
26920
229k
    CEFBS_None, // S2_lsr_r_r_or = 2201
26921
229k
    CEFBS_None, // S2_lsr_r_vh = 2202
26922
229k
    CEFBS_None, // S2_lsr_r_vw = 2203
26923
229k
    CEFBS_HasV66, // S2_mask = 2204
26924
229k
    CEFBS_None, // S2_packhl = 2205
26925
229k
    CEFBS_None, // S2_parityp = 2206
26926
229k
    CEFBS_None, // S2_pstorerbf_io = 2207
26927
229k
    CEFBS_None, // S2_pstorerbf_pi = 2208
26928
229k
    CEFBS_None, // S2_pstorerbfnew_pi = 2209
26929
229k
    CEFBS_None, // S2_pstorerbnewf_io = 2210
26930
229k
    CEFBS_None, // S2_pstorerbnewf_pi = 2211
26931
229k
    CEFBS_None, // S2_pstorerbnewfnew_pi = 2212
26932
229k
    CEFBS_None, // S2_pstorerbnewt_io = 2213
26933
229k
    CEFBS_None, // S2_pstorerbnewt_pi = 2214
26934
229k
    CEFBS_None, // S2_pstorerbnewtnew_pi = 2215
26935
229k
    CEFBS_None, // S2_pstorerbt_io = 2216
26936
229k
    CEFBS_None, // S2_pstorerbt_pi = 2217
26937
229k
    CEFBS_None, // S2_pstorerbtnew_pi = 2218
26938
229k
    CEFBS_None, // S2_pstorerdf_io = 2219
26939
229k
    CEFBS_None, // S2_pstorerdf_pi = 2220
26940
229k
    CEFBS_None, // S2_pstorerdfnew_pi = 2221
26941
229k
    CEFBS_None, // S2_pstorerdt_io = 2222
26942
229k
    CEFBS_None, // S2_pstorerdt_pi = 2223
26943
229k
    CEFBS_None, // S2_pstorerdtnew_pi = 2224
26944
229k
    CEFBS_None, // S2_pstorerff_io = 2225
26945
229k
    CEFBS_None, // S2_pstorerff_pi = 2226
26946
229k
    CEFBS_None, // S2_pstorerffnew_pi = 2227
26947
229k
    CEFBS_None, // S2_pstorerft_io = 2228
26948
229k
    CEFBS_None, // S2_pstorerft_pi = 2229
26949
229k
    CEFBS_None, // S2_pstorerftnew_pi = 2230
26950
229k
    CEFBS_None, // S2_pstorerhf_io = 2231
26951
229k
    CEFBS_None, // S2_pstorerhf_pi = 2232
26952
229k
    CEFBS_None, // S2_pstorerhfnew_pi = 2233
26953
229k
    CEFBS_None, // S2_pstorerhnewf_io = 2234
26954
229k
    CEFBS_None, // S2_pstorerhnewf_pi = 2235
26955
229k
    CEFBS_None, // S2_pstorerhnewfnew_pi = 2236
26956
229k
    CEFBS_None, // S2_pstorerhnewt_io = 2237
26957
229k
    CEFBS_None, // S2_pstorerhnewt_pi = 2238
26958
229k
    CEFBS_None, // S2_pstorerhnewtnew_pi = 2239
26959
229k
    CEFBS_None, // S2_pstorerht_io = 2240
26960
229k
    CEFBS_None, // S2_pstorerht_pi = 2241
26961
229k
    CEFBS_None, // S2_pstorerhtnew_pi = 2242
26962
229k
    CEFBS_None, // S2_pstorerif_io = 2243
26963
229k
    CEFBS_None, // S2_pstorerif_pi = 2244
26964
229k
    CEFBS_None, // S2_pstorerifnew_pi = 2245
26965
229k
    CEFBS_None, // S2_pstorerinewf_io = 2246
26966
229k
    CEFBS_None, // S2_pstorerinewf_pi = 2247
26967
229k
    CEFBS_None, // S2_pstorerinewfnew_pi = 2248
26968
229k
    CEFBS_None, // S2_pstorerinewt_io = 2249
26969
229k
    CEFBS_None, // S2_pstorerinewt_pi = 2250
26970
229k
    CEFBS_None, // S2_pstorerinewtnew_pi = 2251
26971
229k
    CEFBS_None, // S2_pstorerit_io = 2252
26972
229k
    CEFBS_None, // S2_pstorerit_pi = 2253
26973
229k
    CEFBS_None, // S2_pstoreritnew_pi = 2254
26974
229k
    CEFBS_None, // S2_setbit_i = 2255
26975
229k
    CEFBS_None, // S2_setbit_r = 2256
26976
229k
    CEFBS_None, // S2_shuffeb = 2257
26977
229k
    CEFBS_None, // S2_shuffeh = 2258
26978
229k
    CEFBS_None, // S2_shuffob = 2259
26979
229k
    CEFBS_None, // S2_shuffoh = 2260
26980
229k
    CEFBS_None, // S2_storerb_io = 2261
26981
229k
    CEFBS_None, // S2_storerb_pbr = 2262
26982
229k
    CEFBS_None, // S2_storerb_pci = 2263
26983
229k
    CEFBS_None, // S2_storerb_pcr = 2264
26984
229k
    CEFBS_None, // S2_storerb_pi = 2265
26985
229k
    CEFBS_None, // S2_storerb_pr = 2266
26986
229k
    CEFBS_None, // S2_storerbgp = 2267
26987
229k
    CEFBS_None, // S2_storerbnew_io = 2268
26988
229k
    CEFBS_None, // S2_storerbnew_pbr = 2269
26989
229k
    CEFBS_None, // S2_storerbnew_pci = 2270
26990
229k
    CEFBS_None, // S2_storerbnew_pcr = 2271
26991
229k
    CEFBS_None, // S2_storerbnew_pi = 2272
26992
229k
    CEFBS_None, // S2_storerbnew_pr = 2273
26993
229k
    CEFBS_None, // S2_storerbnewgp = 2274
26994
229k
    CEFBS_None, // S2_storerd_io = 2275
26995
229k
    CEFBS_None, // S2_storerd_pbr = 2276
26996
229k
    CEFBS_None, // S2_storerd_pci = 2277
26997
229k
    CEFBS_None, // S2_storerd_pcr = 2278
26998
229k
    CEFBS_None, // S2_storerd_pi = 2279
26999
229k
    CEFBS_None, // S2_storerd_pr = 2280
27000
229k
    CEFBS_None, // S2_storerdgp = 2281
27001
229k
    CEFBS_None, // S2_storerf_io = 2282
27002
229k
    CEFBS_None, // S2_storerf_pbr = 2283
27003
229k
    CEFBS_None, // S2_storerf_pci = 2284
27004
229k
    CEFBS_None, // S2_storerf_pcr = 2285
27005
229k
    CEFBS_None, // S2_storerf_pi = 2286
27006
229k
    CEFBS_None, // S2_storerf_pr = 2287
27007
229k
    CEFBS_None, // S2_storerfgp = 2288
27008
229k
    CEFBS_None, // S2_storerh_io = 2289
27009
229k
    CEFBS_None, // S2_storerh_pbr = 2290
27010
229k
    CEFBS_None, // S2_storerh_pci = 2291
27011
229k
    CEFBS_None, // S2_storerh_pcr = 2292
27012
229k
    CEFBS_None, // S2_storerh_pi = 2293
27013
229k
    CEFBS_None, // S2_storerh_pr = 2294
27014
229k
    CEFBS_None, // S2_storerhgp = 2295
27015
229k
    CEFBS_None, // S2_storerhnew_io = 2296
27016
229k
    CEFBS_None, // S2_storerhnew_pbr = 2297
27017
229k
    CEFBS_None, // S2_storerhnew_pci = 2298
27018
229k
    CEFBS_None, // S2_storerhnew_pcr = 2299
27019
229k
    CEFBS_None, // S2_storerhnew_pi = 2300
27020
229k
    CEFBS_None, // S2_storerhnew_pr = 2301
27021
229k
    CEFBS_None, // S2_storerhnewgp = 2302
27022
229k
    CEFBS_None, // S2_storeri_io = 2303
27023
229k
    CEFBS_None, // S2_storeri_pbr = 2304
27024
229k
    CEFBS_None, // S2_storeri_pci = 2305
27025
229k
    CEFBS_None, // S2_storeri_pcr = 2306
27026
229k
    CEFBS_None, // S2_storeri_pi = 2307
27027
229k
    CEFBS_None, // S2_storeri_pr = 2308
27028
229k
    CEFBS_None, // S2_storerigp = 2309
27029
229k
    CEFBS_None, // S2_storerinew_io = 2310
27030
229k
    CEFBS_None, // S2_storerinew_pbr = 2311
27031
229k
    CEFBS_None, // S2_storerinew_pci = 2312
27032
229k
    CEFBS_None, // S2_storerinew_pcr = 2313
27033
229k
    CEFBS_None, // S2_storerinew_pi = 2314
27034
229k
    CEFBS_None, // S2_storerinew_pr = 2315
27035
229k
    CEFBS_None, // S2_storerinewgp = 2316
27036
229k
    CEFBS_None, // S2_storew_locked = 2317
27037
229k
    CEFBS_HasV68, // S2_storew_rl_at_vi = 2318
27038
229k
    CEFBS_HasV68, // S2_storew_rl_st_vi = 2319
27039
229k
    CEFBS_None, // S2_svsathb = 2320
27040
229k
    CEFBS_None, // S2_svsathub = 2321
27041
229k
    CEFBS_None, // S2_tableidxb = 2322
27042
229k
    CEFBS_None, // S2_tableidxd = 2323
27043
229k
    CEFBS_None, // S2_tableidxh = 2324
27044
229k
    CEFBS_None, // S2_tableidxw = 2325
27045
229k
    CEFBS_None, // S2_togglebit_i = 2326
27046
229k
    CEFBS_None, // S2_togglebit_r = 2327
27047
229k
    CEFBS_None, // S2_tstbit_i = 2328
27048
229k
    CEFBS_None, // S2_tstbit_r = 2329
27049
229k
    CEFBS_None, // S2_valignib = 2330
27050
229k
    CEFBS_None, // S2_valignrb = 2331
27051
229k
    CEFBS_None, // S2_vcnegh = 2332
27052
229k
    CEFBS_None, // S2_vcrotate = 2333
27053
229k
    CEFBS_None, // S2_vrcnegh = 2334
27054
229k
    CEFBS_None, // S2_vrndpackwh = 2335
27055
229k
    CEFBS_None, // S2_vrndpackwhs = 2336
27056
229k
    CEFBS_None, // S2_vsathb = 2337
27057
229k
    CEFBS_None, // S2_vsathb_nopack = 2338
27058
229k
    CEFBS_None, // S2_vsathub = 2339
27059
229k
    CEFBS_None, // S2_vsathub_nopack = 2340
27060
229k
    CEFBS_None, // S2_vsatwh = 2341
27061
229k
    CEFBS_None, // S2_vsatwh_nopack = 2342
27062
229k
    CEFBS_None, // S2_vsatwuh = 2343
27063
229k
    CEFBS_None, // S2_vsatwuh_nopack = 2344
27064
229k
    CEFBS_None, // S2_vsplatrb = 2345
27065
229k
    CEFBS_None, // S2_vsplatrh = 2346
27066
229k
    CEFBS_None, // S2_vspliceib = 2347
27067
229k
    CEFBS_None, // S2_vsplicerb = 2348
27068
229k
    CEFBS_None, // S2_vsxtbh = 2349
27069
229k
    CEFBS_None, // S2_vsxthw = 2350
27070
229k
    CEFBS_None, // S2_vtrunehb = 2351
27071
229k
    CEFBS_None, // S2_vtrunewh = 2352
27072
229k
    CEFBS_None, // S2_vtrunohb = 2353
27073
229k
    CEFBS_None, // S2_vtrunowh = 2354
27074
229k
    CEFBS_None, // S2_vzxtbh = 2355
27075
229k
    CEFBS_None, // S2_vzxthw = 2356
27076
229k
    CEFBS_None, // S4_addaddi = 2357
27077
229k
    CEFBS_None, // S4_addi_asl_ri = 2358
27078
229k
    CEFBS_None, // S4_addi_lsr_ri = 2359
27079
229k
    CEFBS_None, // S4_andi_asl_ri = 2360
27080
229k
    CEFBS_None, // S4_andi_lsr_ri = 2361
27081
229k
    CEFBS_None, // S4_clbaddi = 2362
27082
229k
    CEFBS_None, // S4_clbpaddi = 2363
27083
229k
    CEFBS_None, // S4_clbpnorm = 2364
27084
229k
    CEFBS_None, // S4_extract = 2365
27085
229k
    CEFBS_None, // S4_extract_rp = 2366
27086
229k
    CEFBS_None, // S4_extractp = 2367
27087
229k
    CEFBS_None, // S4_extractp_rp = 2368
27088
229k
    CEFBS_None, // S4_lsli = 2369
27089
229k
    CEFBS_None, // S4_ntstbit_i = 2370
27090
229k
    CEFBS_None, // S4_ntstbit_r = 2371
27091
229k
    CEFBS_None, // S4_or_andi = 2372
27092
229k
    CEFBS_None, // S4_or_andix = 2373
27093
229k
    CEFBS_None, // S4_or_ori = 2374
27094
229k
    CEFBS_None, // S4_ori_asl_ri = 2375
27095
229k
    CEFBS_None, // S4_ori_lsr_ri = 2376
27096
229k
    CEFBS_None, // S4_parity = 2377
27097
229k
    CEFBS_None, // S4_pstorerbf_abs = 2378
27098
229k
    CEFBS_None, // S4_pstorerbf_rr = 2379
27099
229k
    CEFBS_None, // S4_pstorerbfnew_abs = 2380
27100
229k
    CEFBS_None, // S4_pstorerbfnew_io = 2381
27101
229k
    CEFBS_None, // S4_pstorerbfnew_rr = 2382
27102
229k
    CEFBS_None, // S4_pstorerbnewf_abs = 2383
27103
229k
    CEFBS_None, // S4_pstorerbnewf_rr = 2384
27104
229k
    CEFBS_None, // S4_pstorerbnewfnew_abs = 2385
27105
229k
    CEFBS_None, // S4_pstorerbnewfnew_io = 2386
27106
229k
    CEFBS_None, // S4_pstorerbnewfnew_rr = 2387
27107
229k
    CEFBS_None, // S4_pstorerbnewt_abs = 2388
27108
229k
    CEFBS_None, // S4_pstorerbnewt_rr = 2389
27109
229k
    CEFBS_None, // S4_pstorerbnewtnew_abs = 2390
27110
229k
    CEFBS_None, // S4_pstorerbnewtnew_io = 2391
27111
229k
    CEFBS_None, // S4_pstorerbnewtnew_rr = 2392
27112
229k
    CEFBS_None, // S4_pstorerbt_abs = 2393
27113
229k
    CEFBS_None, // S4_pstorerbt_rr = 2394
27114
229k
    CEFBS_None, // S4_pstorerbtnew_abs = 2395
27115
229k
    CEFBS_None, // S4_pstorerbtnew_io = 2396
27116
229k
    CEFBS_None, // S4_pstorerbtnew_rr = 2397
27117
229k
    CEFBS_None, // S4_pstorerdf_abs = 2398
27118
229k
    CEFBS_None, // S4_pstorerdf_rr = 2399
27119
229k
    CEFBS_None, // S4_pstorerdfnew_abs = 2400
27120
229k
    CEFBS_None, // S4_pstorerdfnew_io = 2401
27121
229k
    CEFBS_None, // S4_pstorerdfnew_rr = 2402
27122
229k
    CEFBS_None, // S4_pstorerdt_abs = 2403
27123
229k
    CEFBS_None, // S4_pstorerdt_rr = 2404
27124
229k
    CEFBS_None, // S4_pstorerdtnew_abs = 2405
27125
229k
    CEFBS_None, // S4_pstorerdtnew_io = 2406
27126
229k
    CEFBS_None, // S4_pstorerdtnew_rr = 2407
27127
229k
    CEFBS_None, // S4_pstorerff_abs = 2408
27128
229k
    CEFBS_None, // S4_pstorerff_rr = 2409
27129
229k
    CEFBS_None, // S4_pstorerffnew_abs = 2410
27130
229k
    CEFBS_None, // S4_pstorerffnew_io = 2411
27131
229k
    CEFBS_None, // S4_pstorerffnew_rr = 2412
27132
229k
    CEFBS_None, // S4_pstorerft_abs = 2413
27133
229k
    CEFBS_None, // S4_pstorerft_rr = 2414
27134
229k
    CEFBS_None, // S4_pstorerftnew_abs = 2415
27135
229k
    CEFBS_None, // S4_pstorerftnew_io = 2416
27136
229k
    CEFBS_None, // S4_pstorerftnew_rr = 2417
27137
229k
    CEFBS_None, // S4_pstorerhf_abs = 2418
27138
229k
    CEFBS_None, // S4_pstorerhf_rr = 2419
27139
229k
    CEFBS_None, // S4_pstorerhfnew_abs = 2420
27140
229k
    CEFBS_None, // S4_pstorerhfnew_io = 2421
27141
229k
    CEFBS_None, // S4_pstorerhfnew_rr = 2422
27142
229k
    CEFBS_None, // S4_pstorerhnewf_abs = 2423
27143
229k
    CEFBS_None, // S4_pstorerhnewf_rr = 2424
27144
229k
    CEFBS_None, // S4_pstorerhnewfnew_abs = 2425
27145
229k
    CEFBS_None, // S4_pstorerhnewfnew_io = 2426
27146
229k
    CEFBS_None, // S4_pstorerhnewfnew_rr = 2427
27147
229k
    CEFBS_None, // S4_pstorerhnewt_abs = 2428
27148
229k
    CEFBS_None, // S4_pstorerhnewt_rr = 2429
27149
229k
    CEFBS_None, // S4_pstorerhnewtnew_abs = 2430
27150
229k
    CEFBS_None, // S4_pstorerhnewtnew_io = 2431
27151
229k
    CEFBS_None, // S4_pstorerhnewtnew_rr = 2432
27152
229k
    CEFBS_None, // S4_pstorerht_abs = 2433
27153
229k
    CEFBS_None, // S4_pstorerht_rr = 2434
27154
229k
    CEFBS_None, // S4_pstorerhtnew_abs = 2435
27155
229k
    CEFBS_None, // S4_pstorerhtnew_io = 2436
27156
229k
    CEFBS_None, // S4_pstorerhtnew_rr = 2437
27157
229k
    CEFBS_None, // S4_pstorerif_abs = 2438
27158
229k
    CEFBS_None, // S4_pstorerif_rr = 2439
27159
229k
    CEFBS_None, // S4_pstorerifnew_abs = 2440
27160
229k
    CEFBS_None, // S4_pstorerifnew_io = 2441
27161
229k
    CEFBS_None, // S4_pstorerifnew_rr = 2442
27162
229k
    CEFBS_None, // S4_pstorerinewf_abs = 2443
27163
229k
    CEFBS_None, // S4_pstorerinewf_rr = 2444
27164
229k
    CEFBS_None, // S4_pstorerinewfnew_abs = 2445
27165
229k
    CEFBS_None, // S4_pstorerinewfnew_io = 2446
27166
229k
    CEFBS_None, // S4_pstorerinewfnew_rr = 2447
27167
229k
    CEFBS_None, // S4_pstorerinewt_abs = 2448
27168
229k
    CEFBS_None, // S4_pstorerinewt_rr = 2449
27169
229k
    CEFBS_None, // S4_pstorerinewtnew_abs = 2450
27170
229k
    CEFBS_None, // S4_pstorerinewtnew_io = 2451
27171
229k
    CEFBS_None, // S4_pstorerinewtnew_rr = 2452
27172
229k
    CEFBS_None, // S4_pstorerit_abs = 2453
27173
229k
    CEFBS_None, // S4_pstorerit_rr = 2454
27174
229k
    CEFBS_None, // S4_pstoreritnew_abs = 2455
27175
229k
    CEFBS_None, // S4_pstoreritnew_io = 2456
27176
229k
    CEFBS_None, // S4_pstoreritnew_rr = 2457
27177
229k
    CEFBS_None, // S4_stored_locked = 2458
27178
229k
    CEFBS_HasV68, // S4_stored_rl_at_vi = 2459
27179
229k
    CEFBS_HasV68, // S4_stored_rl_st_vi = 2460
27180
229k
    CEFBS_None, // S4_storeirb_io = 2461
27181
229k
    CEFBS_None, // S4_storeirbf_io = 2462
27182
229k
    CEFBS_None, // S4_storeirbfnew_io = 2463
27183
229k
    CEFBS_None, // S4_storeirbt_io = 2464
27184
229k
    CEFBS_None, // S4_storeirbtnew_io = 2465
27185
229k
    CEFBS_None, // S4_storeirh_io = 2466
27186
229k
    CEFBS_None, // S4_storeirhf_io = 2467
27187
229k
    CEFBS_None, // S4_storeirhfnew_io = 2468
27188
229k
    CEFBS_None, // S4_storeirht_io = 2469
27189
229k
    CEFBS_None, // S4_storeirhtnew_io = 2470
27190
229k
    CEFBS_None, // S4_storeiri_io = 2471
27191
229k
    CEFBS_None, // S4_storeirif_io = 2472
27192
229k
    CEFBS_None, // S4_storeirifnew_io = 2473
27193
229k
    CEFBS_None, // S4_storeirit_io = 2474
27194
229k
    CEFBS_None, // S4_storeiritnew_io = 2475
27195
229k
    CEFBS_None, // S4_storerb_ap = 2476
27196
229k
    CEFBS_None, // S4_storerb_rr = 2477
27197
229k
    CEFBS_None, // S4_storerb_ur = 2478
27198
229k
    CEFBS_None, // S4_storerbnew_ap = 2479
27199
229k
    CEFBS_None, // S4_storerbnew_rr = 2480
27200
229k
    CEFBS_None, // S4_storerbnew_ur = 2481
27201
229k
    CEFBS_None, // S4_storerd_ap = 2482
27202
229k
    CEFBS_None, // S4_storerd_rr = 2483
27203
229k
    CEFBS_None, // S4_storerd_ur = 2484
27204
229k
    CEFBS_None, // S4_storerf_ap = 2485
27205
229k
    CEFBS_None, // S4_storerf_rr = 2486
27206
229k
    CEFBS_None, // S4_storerf_ur = 2487
27207
229k
    CEFBS_None, // S4_storerh_ap = 2488
27208
229k
    CEFBS_None, // S4_storerh_rr = 2489
27209
229k
    CEFBS_None, // S4_storerh_ur = 2490
27210
229k
    CEFBS_None, // S4_storerhnew_ap = 2491
27211
229k
    CEFBS_None, // S4_storerhnew_rr = 2492
27212
229k
    CEFBS_None, // S4_storerhnew_ur = 2493
27213
229k
    CEFBS_None, // S4_storeri_ap = 2494
27214
229k
    CEFBS_None, // S4_storeri_rr = 2495
27215
229k
    CEFBS_None, // S4_storeri_ur = 2496
27216
229k
    CEFBS_None, // S4_storerinew_ap = 2497
27217
229k
    CEFBS_None, // S4_storerinew_rr = 2498
27218
229k
    CEFBS_None, // S4_storerinew_ur = 2499
27219
229k
    CEFBS_None, // S4_subaddi = 2500
27220
229k
    CEFBS_None, // S4_subi_asl_ri = 2501
27221
229k
    CEFBS_None, // S4_subi_lsr_ri = 2502
27222
229k
    CEFBS_None, // S4_vrcrotate = 2503
27223
229k
    CEFBS_None, // S4_vrcrotate_acc = 2504
27224
229k
    CEFBS_None, // S4_vxaddsubh = 2505
27225
229k
    CEFBS_None, // S4_vxaddsubhr = 2506
27226
229k
    CEFBS_None, // S4_vxaddsubw = 2507
27227
229k
    CEFBS_None, // S4_vxsubaddh = 2508
27228
229k
    CEFBS_None, // S4_vxsubaddhr = 2509
27229
229k
    CEFBS_None, // S4_vxsubaddw = 2510
27230
229k
    CEFBS_None, // S5_asrhub_rnd_sat = 2511
27231
229k
    CEFBS_None, // S5_asrhub_sat = 2512
27232
229k
    CEFBS_None, // S5_popcountp = 2513
27233
229k
    CEFBS_None, // S5_vasrhrnd = 2514
27234
229k
    CEFBS_HasV60, // S6_rol_i_p = 2515
27235
229k
    CEFBS_HasV60, // S6_rol_i_p_acc = 2516
27236
229k
    CEFBS_HasV60, // S6_rol_i_p_and = 2517
27237
229k
    CEFBS_HasV60, // S6_rol_i_p_nac = 2518
27238
229k
    CEFBS_HasV60, // S6_rol_i_p_or = 2519
27239
229k
    CEFBS_HasV60, // S6_rol_i_p_xacc = 2520
27240
229k
    CEFBS_HasV60, // S6_rol_i_r = 2521
27241
229k
    CEFBS_HasV60, // S6_rol_i_r_acc = 2522
27242
229k
    CEFBS_HasV60, // S6_rol_i_r_and = 2523
27243
229k
    CEFBS_HasV60, // S6_rol_i_r_nac = 2524
27244
229k
    CEFBS_HasV60, // S6_rol_i_r_or = 2525
27245
229k
    CEFBS_HasV60, // S6_rol_i_r_xacc = 2526
27246
229k
    CEFBS_HasV62, // S6_vsplatrbp = 2527
27247
229k
    CEFBS_HasV62, // S6_vtrunehb_ppp = 2528
27248
229k
    CEFBS_HasV62, // S6_vtrunohb_ppp = 2529
27249
229k
    CEFBS_None, // SA1_addi = 2530
27250
229k
    CEFBS_None, // SA1_addrx = 2531
27251
229k
    CEFBS_None, // SA1_addsp = 2532
27252
229k
    CEFBS_None, // SA1_and1 = 2533
27253
229k
    CEFBS_None, // SA1_clrf = 2534
27254
229k
    CEFBS_None, // SA1_clrfnew = 2535
27255
229k
    CEFBS_None, // SA1_clrt = 2536
27256
229k
    CEFBS_None, // SA1_clrtnew = 2537
27257
229k
    CEFBS_None, // SA1_cmpeqi = 2538
27258
229k
    CEFBS_None, // SA1_combine0i = 2539
27259
229k
    CEFBS_None, // SA1_combine1i = 2540
27260
229k
    CEFBS_None, // SA1_combine2i = 2541
27261
229k
    CEFBS_None, // SA1_combine3i = 2542
27262
229k
    CEFBS_None, // SA1_combinerz = 2543
27263
229k
    CEFBS_None, // SA1_combinezr = 2544
27264
229k
    CEFBS_None, // SA1_dec = 2545
27265
229k
    CEFBS_None, // SA1_inc = 2546
27266
229k
    CEFBS_None, // SA1_seti = 2547
27267
229k
    CEFBS_None, // SA1_setin1 = 2548
27268
229k
    CEFBS_None, // SA1_sxtb = 2549
27269
229k
    CEFBS_None, // SA1_sxth = 2550
27270
229k
    CEFBS_None, // SA1_tfr = 2551
27271
229k
    CEFBS_None, // SA1_zxtb = 2552
27272
229k
    CEFBS_None, // SA1_zxth = 2553
27273
229k
    CEFBS_None, // SAVE_REGISTERS_CALL_V4 = 2554
27274
229k
    CEFBS_None, // SAVE_REGISTERS_CALL_V4STK = 2555
27275
229k
    CEFBS_None, // SAVE_REGISTERS_CALL_V4STK_EXT = 2556
27276
229k
    CEFBS_None, // SAVE_REGISTERS_CALL_V4STK_EXT_PIC = 2557
27277
229k
    CEFBS_None, // SAVE_REGISTERS_CALL_V4STK_PIC = 2558
27278
229k
    CEFBS_None, // SAVE_REGISTERS_CALL_V4_EXT = 2559
27279
229k
    CEFBS_None, // SAVE_REGISTERS_CALL_V4_EXT_PIC = 2560
27280
229k
    CEFBS_None, // SAVE_REGISTERS_CALL_V4_PIC = 2561
27281
229k
    CEFBS_None, // SL1_loadri_io = 2562
27282
229k
    CEFBS_None, // SL1_loadrub_io = 2563
27283
229k
    CEFBS_None, // SL2_deallocframe = 2564
27284
229k
    CEFBS_None, // SL2_jumpr31 = 2565
27285
229k
    CEFBS_None, // SL2_jumpr31_f = 2566
27286
229k
    CEFBS_None, // SL2_jumpr31_fnew = 2567
27287
229k
    CEFBS_None, // SL2_jumpr31_t = 2568
27288
229k
    CEFBS_None, // SL2_jumpr31_tnew = 2569
27289
229k
    CEFBS_None, // SL2_loadrb_io = 2570
27290
229k
    CEFBS_None, // SL2_loadrd_sp = 2571
27291
229k
    CEFBS_None, // SL2_loadrh_io = 2572
27292
229k
    CEFBS_None, // SL2_loadri_sp = 2573
27293
229k
    CEFBS_None, // SL2_loadruh_io = 2574
27294
229k
    CEFBS_None, // SL2_return = 2575
27295
229k
    CEFBS_None, // SL2_return_f = 2576
27296
229k
    CEFBS_None, // SL2_return_fnew = 2577
27297
229k
    CEFBS_None, // SL2_return_t = 2578
27298
229k
    CEFBS_None, // SL2_return_tnew = 2579
27299
229k
    CEFBS_None, // SS1_storeb_io = 2580
27300
229k
    CEFBS_None, // SS1_storew_io = 2581
27301
229k
    CEFBS_None, // SS2_allocframe = 2582
27302
229k
    CEFBS_None, // SS2_storebi0 = 2583
27303
229k
    CEFBS_None, // SS2_storebi1 = 2584
27304
229k
    CEFBS_None, // SS2_stored_sp = 2585
27305
229k
    CEFBS_None, // SS2_storeh_io = 2586
27306
229k
    CEFBS_None, // SS2_storew_sp = 2587
27307
229k
    CEFBS_None, // SS2_storewi0 = 2588
27308
229k
    CEFBS_None, // SS2_storewi1 = 2589
27309
229k
    CEFBS_None, // TFRI64_V2_ext = 2590
27310
229k
    CEFBS_None, // TFRI64_V4 = 2591
27311
229k
    CEFBS_UseHVXV60, // V6_extractw = 2592
27312
229k
    CEFBS_UseHVXV62, // V6_lvsplatb = 2593
27313
229k
    CEFBS_UseHVXV62, // V6_lvsplath = 2594
27314
229k
    CEFBS_UseHVXV60, // V6_lvsplatw = 2595
27315
229k
    CEFBS_UseHVXV60, // V6_pred_and = 2596
27316
229k
    CEFBS_UseHVXV60, // V6_pred_and_n = 2597
27317
229k
    CEFBS_UseHVXV60, // V6_pred_not = 2598
27318
229k
    CEFBS_UseHVXV60, // V6_pred_or = 2599
27319
229k
    CEFBS_UseHVXV60, // V6_pred_or_n = 2600
27320
229k
    CEFBS_UseHVXV60, // V6_pred_scalar2 = 2601
27321
229k
    CEFBS_UseHVXV62, // V6_pred_scalar2v2 = 2602
27322
229k
    CEFBS_UseHVXV60, // V6_pred_xor = 2603
27323
229k
    CEFBS_UseHVXV62, // V6_shuffeqh = 2604
27324
229k
    CEFBS_UseHVXV62, // V6_shuffeqw = 2605
27325
229k
    CEFBS_UseHVXV68, // V6_v6mpyhubs10 = 2606
27326
229k
    CEFBS_UseHVXV68, // V6_v6mpyhubs10_vxx = 2607
27327
229k
    CEFBS_UseHVXV68, // V6_v6mpyvubs10 = 2608
27328
229k
    CEFBS_UseHVXV68, // V6_v6mpyvubs10_vxx = 2609
27329
229k
    CEFBS_UseHVXV60, // V6_vL32Ub_ai = 2610
27330
229k
    CEFBS_UseHVXV60, // V6_vL32Ub_pi = 2611
27331
229k
    CEFBS_UseHVXV60, // V6_vL32Ub_ppu = 2612
27332
229k
    CEFBS_UseHVXV60, // V6_vL32b_ai = 2613
27333
229k
    CEFBS_UseHVXV60, // V6_vL32b_cur_ai = 2614
27334
229k
    CEFBS_UseHVXV62, // V6_vL32b_cur_npred_ai = 2615
27335
229k
    CEFBS_UseHVXV62, // V6_vL32b_cur_npred_pi = 2616
27336
229k
    CEFBS_UseHVXV62, // V6_vL32b_cur_npred_ppu = 2617
27337
229k
    CEFBS_UseHVXV60, // V6_vL32b_cur_pi = 2618
27338
229k
    CEFBS_UseHVXV60, // V6_vL32b_cur_ppu = 2619
27339
229k
    CEFBS_UseHVXV62, // V6_vL32b_cur_pred_ai = 2620
27340
229k
    CEFBS_UseHVXV62, // V6_vL32b_cur_pred_pi = 2621
27341
229k
    CEFBS_UseHVXV62, // V6_vL32b_cur_pred_ppu = 2622
27342
229k
    CEFBS_UseHVXV62, // V6_vL32b_npred_ai = 2623
27343
229k
    CEFBS_UseHVXV62, // V6_vL32b_npred_pi = 2624
27344
229k
    CEFBS_UseHVXV62, // V6_vL32b_npred_ppu = 2625
27345
229k
    CEFBS_UseHVXV60, // V6_vL32b_nt_ai = 2626
27346
229k
    CEFBS_UseHVXV60, // V6_vL32b_nt_cur_ai = 2627
27347
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_npred_ai = 2628
27348
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_npred_pi = 2629
27349
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_npred_ppu = 2630
27350
229k
    CEFBS_UseHVXV60, // V6_vL32b_nt_cur_pi = 2631
27351
229k
    CEFBS_UseHVXV60, // V6_vL32b_nt_cur_ppu = 2632
27352
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_pred_ai = 2633
27353
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_pred_pi = 2634
27354
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_cur_pred_ppu = 2635
27355
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_npred_ai = 2636
27356
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_npred_pi = 2637
27357
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_npred_ppu = 2638
27358
229k
    CEFBS_UseHVXV60, // V6_vL32b_nt_pi = 2639
27359
229k
    CEFBS_UseHVXV60, // V6_vL32b_nt_ppu = 2640
27360
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_pred_ai = 2641
27361
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_pred_pi = 2642
27362
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_pred_ppu = 2643
27363
229k
    CEFBS_UseHVXV60, // V6_vL32b_nt_tmp_ai = 2644
27364
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_npred_ai = 2645
27365
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_npred_pi = 2646
27366
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_npred_ppu = 2647
27367
229k
    CEFBS_UseHVXV60, // V6_vL32b_nt_tmp_pi = 2648
27368
229k
    CEFBS_UseHVXV60, // V6_vL32b_nt_tmp_ppu = 2649
27369
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_pred_ai = 2650
27370
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_pred_pi = 2651
27371
229k
    CEFBS_UseHVXV62, // V6_vL32b_nt_tmp_pred_ppu = 2652
27372
229k
    CEFBS_UseHVXV60, // V6_vL32b_pi = 2653
27373
229k
    CEFBS_UseHVXV60, // V6_vL32b_ppu = 2654
27374
229k
    CEFBS_UseHVXV62, // V6_vL32b_pred_ai = 2655
27375
229k
    CEFBS_UseHVXV62, // V6_vL32b_pred_pi = 2656
27376
229k
    CEFBS_UseHVXV62, // V6_vL32b_pred_ppu = 2657
27377
229k
    CEFBS_UseHVXV60, // V6_vL32b_tmp_ai = 2658
27378
229k
    CEFBS_UseHVXV62, // V6_vL32b_tmp_npred_ai = 2659
27379
229k
    CEFBS_UseHVXV62, // V6_vL32b_tmp_npred_pi = 2660
27380
229k
    CEFBS_UseHVXV62, // V6_vL32b_tmp_npred_ppu = 2661
27381
229k
    CEFBS_UseHVXV60, // V6_vL32b_tmp_pi = 2662
27382
229k
    CEFBS_UseHVXV60, // V6_vL32b_tmp_ppu = 2663
27383
229k
    CEFBS_UseHVXV62, // V6_vL32b_tmp_pred_ai = 2664
27384
229k
    CEFBS_UseHVXV62, // V6_vL32b_tmp_pred_pi = 2665
27385
229k
    CEFBS_UseHVXV62, // V6_vL32b_tmp_pred_ppu = 2666
27386
229k
    CEFBS_UseHVXV60, // V6_vS32Ub_ai = 2667
27387
229k
    CEFBS_UseHVXV60, // V6_vS32Ub_npred_ai = 2668
27388
229k
    CEFBS_UseHVXV60, // V6_vS32Ub_npred_pi = 2669
27389
229k
    CEFBS_UseHVXV60, // V6_vS32Ub_npred_ppu = 2670
27390
229k
    CEFBS_UseHVXV60, // V6_vS32Ub_pi = 2671
27391
229k
    CEFBS_UseHVXV60, // V6_vS32Ub_ppu = 2672
27392
229k
    CEFBS_UseHVXV60, // V6_vS32Ub_pred_ai = 2673
27393
229k
    CEFBS_UseHVXV60, // V6_vS32Ub_pred_pi = 2674
27394
229k
    CEFBS_UseHVXV60, // V6_vS32Ub_pred_ppu = 2675
27395
229k
    CEFBS_UseHVXV60, // V6_vS32b_ai = 2676
27396
229k
    CEFBS_UseHVXV60, // V6_vS32b_new_ai = 2677
27397
229k
    CEFBS_UseHVXV60, // V6_vS32b_new_npred_ai = 2678
27398
229k
    CEFBS_UseHVXV60, // V6_vS32b_new_npred_pi = 2679
27399
229k
    CEFBS_UseHVXV60, // V6_vS32b_new_npred_ppu = 2680
27400
229k
    CEFBS_UseHVXV60, // V6_vS32b_new_pi = 2681
27401
229k
    CEFBS_UseHVXV60, // V6_vS32b_new_ppu = 2682
27402
229k
    CEFBS_UseHVXV60, // V6_vS32b_new_pred_ai = 2683
27403
229k
    CEFBS_UseHVXV60, // V6_vS32b_new_pred_pi = 2684
27404
229k
    CEFBS_UseHVXV60, // V6_vS32b_new_pred_ppu = 2685
27405
229k
    CEFBS_UseHVXV60, // V6_vS32b_npred_ai = 2686
27406
229k
    CEFBS_UseHVXV60, // V6_vS32b_npred_pi = 2687
27407
229k
    CEFBS_UseHVXV60, // V6_vS32b_npred_ppu = 2688
27408
229k
    CEFBS_UseHVXV60, // V6_vS32b_nqpred_ai = 2689
27409
229k
    CEFBS_UseHVXV60, // V6_vS32b_nqpred_pi = 2690
27410
229k
    CEFBS_UseHVXV60, // V6_vS32b_nqpred_ppu = 2691
27411
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_ai = 2692
27412
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_ai = 2693
27413
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_npred_ai = 2694
27414
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_npred_pi = 2695
27415
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_npred_ppu = 2696
27416
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_pi = 2697
27417
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_ppu = 2698
27418
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_pred_ai = 2699
27419
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_pred_pi = 2700
27420
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_new_pred_ppu = 2701
27421
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_npred_ai = 2702
27422
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_npred_pi = 2703
27423
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_npred_ppu = 2704
27424
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_nqpred_ai = 2705
27425
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_nqpred_pi = 2706
27426
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_nqpred_ppu = 2707
27427
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_pi = 2708
27428
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_ppu = 2709
27429
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_pred_ai = 2710
27430
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_pred_pi = 2711
27431
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_pred_ppu = 2712
27432
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_qpred_ai = 2713
27433
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_qpred_pi = 2714
27434
229k
    CEFBS_UseHVXV60, // V6_vS32b_nt_qpred_ppu = 2715
27435
229k
    CEFBS_UseHVXV60, // V6_vS32b_pi = 2716
27436
229k
    CEFBS_UseHVXV60, // V6_vS32b_ppu = 2717
27437
229k
    CEFBS_UseHVXV60, // V6_vS32b_pred_ai = 2718
27438
229k
    CEFBS_UseHVXV60, // V6_vS32b_pred_pi = 2719
27439
229k
    CEFBS_UseHVXV60, // V6_vS32b_pred_ppu = 2720
27440
229k
    CEFBS_UseHVXV60, // V6_vS32b_qpred_ai = 2721
27441
229k
    CEFBS_UseHVXV60, // V6_vS32b_qpred_pi = 2722
27442
229k
    CEFBS_UseHVXV60, // V6_vS32b_qpred_ppu = 2723
27443
229k
    CEFBS_UseHVXV65, // V6_vS32b_srls_ai = 2724
27444
229k
    CEFBS_UseHVXV65, // V6_vS32b_srls_pi = 2725
27445
229k
    CEFBS_UseHVXV65, // V6_vS32b_srls_ppu = 2726
27446
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vabs_hf = 2727
27447
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vabs_sf = 2728
27448
229k
    CEFBS_UseHVXV65, // V6_vabsb = 2729
27449
229k
    CEFBS_UseHVXV65, // V6_vabsb_sat = 2730
27450
229k
    CEFBS_UseHVXV60, // V6_vabsdiffh = 2731
27451
229k
    CEFBS_UseHVXV60, // V6_vabsdiffub = 2732
27452
229k
    CEFBS_UseHVXV60, // V6_vabsdiffuh = 2733
27453
229k
    CEFBS_UseHVXV60, // V6_vabsdiffw = 2734
27454
229k
    CEFBS_UseHVXV60, // V6_vabsh = 2735
27455
229k
    CEFBS_UseHVXV60, // V6_vabsh_sat = 2736
27456
229k
    CEFBS_UseHVXV60, // V6_vabsw = 2737
27457
229k
    CEFBS_UseHVXV60, // V6_vabsw_sat = 2738
27458
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vadd_hf = 2739
27459
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vadd_hf_hf = 2740
27460
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vadd_qf16 = 2741
27461
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vadd_qf16_mix = 2742
27462
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vadd_qf32 = 2743
27463
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vadd_qf32_mix = 2744
27464
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vadd_sf = 2745
27465
229k
    CEFBS_UseHVXV73_UseHVXIEEEFP, // V6_vadd_sf_bf = 2746
27466
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vadd_sf_hf = 2747
27467
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vadd_sf_sf = 2748
27468
229k
    CEFBS_UseHVXV60, // V6_vaddb = 2749
27469
229k
    CEFBS_UseHVXV60, // V6_vaddb_dv = 2750
27470
229k
    CEFBS_UseHVXV60, // V6_vaddbnq = 2751
27471
229k
    CEFBS_UseHVXV60, // V6_vaddbq = 2752
27472
229k
    CEFBS_UseHVXV62, // V6_vaddbsat = 2753
27473
229k
    CEFBS_UseHVXV62, // V6_vaddbsat_dv = 2754
27474
229k
    CEFBS_UseHVXV62, // V6_vaddcarry = 2755
27475
229k
    CEFBS_UseHVXV66, // V6_vaddcarryo = 2756
27476
229k
    CEFBS_UseHVXV66, // V6_vaddcarrysat = 2757
27477
229k
    CEFBS_UseHVXV62, // V6_vaddclbh = 2758
27478
229k
    CEFBS_UseHVXV62, // V6_vaddclbw = 2759
27479
229k
    CEFBS_UseHVXV60, // V6_vaddh = 2760
27480
229k
    CEFBS_UseHVXV60, // V6_vaddh_dv = 2761
27481
229k
    CEFBS_UseHVXV60, // V6_vaddhnq = 2762
27482
229k
    CEFBS_UseHVXV60, // V6_vaddhq = 2763
27483
229k
    CEFBS_UseHVXV60, // V6_vaddhsat = 2764
27484
229k
    CEFBS_UseHVXV60, // V6_vaddhsat_dv = 2765
27485
229k
    CEFBS_UseHVXV60, // V6_vaddhw = 2766
27486
229k
    CEFBS_UseHVXV62, // V6_vaddhw_acc = 2767
27487
229k
    CEFBS_UseHVXV60, // V6_vaddubh = 2768
27488
229k
    CEFBS_UseHVXV62, // V6_vaddubh_acc = 2769
27489
229k
    CEFBS_UseHVXV60, // V6_vaddubsat = 2770
27490
229k
    CEFBS_UseHVXV60, // V6_vaddubsat_dv = 2771
27491
229k
    CEFBS_UseHVXV62, // V6_vaddububb_sat = 2772
27492
229k
    CEFBS_UseHVXV60, // V6_vadduhsat = 2773
27493
229k
    CEFBS_UseHVXV60, // V6_vadduhsat_dv = 2774
27494
229k
    CEFBS_UseHVXV60, // V6_vadduhw = 2775
27495
229k
    CEFBS_UseHVXV62, // V6_vadduhw_acc = 2776
27496
229k
    CEFBS_UseHVXV62, // V6_vadduwsat = 2777
27497
229k
    CEFBS_UseHVXV62, // V6_vadduwsat_dv = 2778
27498
229k
    CEFBS_UseHVXV60, // V6_vaddw = 2779
27499
229k
    CEFBS_UseHVXV60, // V6_vaddw_dv = 2780
27500
229k
    CEFBS_UseHVXV60, // V6_vaddwnq = 2781
27501
229k
    CEFBS_UseHVXV60, // V6_vaddwq = 2782
27502
229k
    CEFBS_UseHVXV60, // V6_vaddwsat = 2783
27503
229k
    CEFBS_UseHVXV60, // V6_vaddwsat_dv = 2784
27504
229k
    CEFBS_UseHVXV60, // V6_valignb = 2785
27505
229k
    CEFBS_UseHVXV60, // V6_valignbi = 2786
27506
229k
    CEFBS_UseHVXV60, // V6_vand = 2787
27507
229k
    CEFBS_UseHVXV62, // V6_vandnqrt = 2788
27508
229k
    CEFBS_UseHVXV62, // V6_vandnqrt_acc = 2789
27509
229k
    CEFBS_UseHVXV60, // V6_vandqrt = 2790
27510
229k
    CEFBS_UseHVXV60, // V6_vandqrt_acc = 2791
27511
229k
    CEFBS_UseHVXV62, // V6_vandvnqv = 2792
27512
229k
    CEFBS_UseHVXV62, // V6_vandvqv = 2793
27513
229k
    CEFBS_UseHVXV60, // V6_vandvrt = 2794
27514
229k
    CEFBS_UseHVXV60, // V6_vandvrt_acc = 2795
27515
229k
    CEFBS_UseHVXV60, // V6_vaslh = 2796
27516
229k
    CEFBS_UseHVXV65, // V6_vaslh_acc = 2797
27517
229k
    CEFBS_UseHVXV60, // V6_vaslhv = 2798
27518
229k
    CEFBS_UseHVXV60, // V6_vaslw = 2799
27519
229k
    CEFBS_UseHVXV60, // V6_vaslw_acc = 2800
27520
229k
    CEFBS_UseHVXV60, // V6_vaslwv = 2801
27521
229k
    CEFBS_UseHVXV66, // V6_vasr_into = 2802
27522
229k
    CEFBS_UseHVXV60, // V6_vasrh = 2803
27523
229k
    CEFBS_UseHVXV65, // V6_vasrh_acc = 2804
27524
229k
    CEFBS_UseHVXV60, // V6_vasrhbrndsat = 2805
27525
229k
    CEFBS_UseHVXV62, // V6_vasrhbsat = 2806
27526
229k
    CEFBS_UseHVXV60, // V6_vasrhubrndsat = 2807
27527
229k
    CEFBS_UseHVXV60, // V6_vasrhubsat = 2808
27528
229k
    CEFBS_UseHVXV60, // V6_vasrhv = 2809
27529
229k
    CEFBS_UseHVXV65, // V6_vasruhubrndsat = 2810
27530
229k
    CEFBS_UseHVXV65, // V6_vasruhubsat = 2811
27531
229k
    CEFBS_UseHVXV62, // V6_vasruwuhrndsat = 2812
27532
229k
    CEFBS_UseHVXV65, // V6_vasruwuhsat = 2813
27533
229k
    CEFBS_UseHVXV69, // V6_vasrvuhubrndsat = 2814
27534
229k
    CEFBS_UseHVXV69, // V6_vasrvuhubsat = 2815
27535
229k
    CEFBS_UseHVXV69, // V6_vasrvwuhrndsat = 2816
27536
229k
    CEFBS_UseHVXV69, // V6_vasrvwuhsat = 2817
27537
229k
    CEFBS_UseHVXV60, // V6_vasrw = 2818
27538
229k
    CEFBS_UseHVXV60, // V6_vasrw_acc = 2819
27539
229k
    CEFBS_UseHVXV60, // V6_vasrwh = 2820
27540
229k
    CEFBS_UseHVXV60, // V6_vasrwhrndsat = 2821
27541
229k
    CEFBS_UseHVXV60, // V6_vasrwhsat = 2822
27542
229k
    CEFBS_UseHVXV62, // V6_vasrwuhrndsat = 2823
27543
229k
    CEFBS_UseHVXV60, // V6_vasrwuhsat = 2824
27544
229k
    CEFBS_UseHVXV60, // V6_vasrwv = 2825
27545
229k
    CEFBS_UseHVXV60, // V6_vassign = 2826
27546
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vassign_fp = 2827
27547
229k
    CEFBS_UseHVXV69, // V6_vassign_tmp = 2828
27548
229k
    CEFBS_UseHVXV65, // V6_vavgb = 2829
27549
229k
    CEFBS_UseHVXV65, // V6_vavgbrnd = 2830
27550
229k
    CEFBS_UseHVXV60, // V6_vavgh = 2831
27551
229k
    CEFBS_UseHVXV60, // V6_vavghrnd = 2832
27552
229k
    CEFBS_UseHVXV60, // V6_vavgub = 2833
27553
229k
    CEFBS_UseHVXV60, // V6_vavgubrnd = 2834
27554
229k
    CEFBS_UseHVXV60, // V6_vavguh = 2835
27555
229k
    CEFBS_UseHVXV60, // V6_vavguhrnd = 2836
27556
229k
    CEFBS_UseHVXV65, // V6_vavguw = 2837
27557
229k
    CEFBS_UseHVXV65, // V6_vavguwrnd = 2838
27558
229k
    CEFBS_UseHVXV60, // V6_vavgw = 2839
27559
229k
    CEFBS_UseHVXV60, // V6_vavgwrnd = 2840
27560
229k
    CEFBS_UseHVXV60, // V6_vccombine = 2841
27561
229k
    CEFBS_UseHVXV60, // V6_vcl0h = 2842
27562
229k
    CEFBS_UseHVXV60, // V6_vcl0w = 2843
27563
229k
    CEFBS_UseHVXV60, // V6_vcmov = 2844
27564
229k
    CEFBS_UseHVXV60, // V6_vcombine = 2845
27565
229k
    CEFBS_UseHVXV69, // V6_vcombine_tmp = 2846
27566
229k
    CEFBS_UseHVXV73, // V6_vconv_h_hf = 2847
27567
229k
    CEFBS_UseHVXV73, // V6_vconv_hf_h = 2848
27568
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vconv_hf_qf16 = 2849
27569
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vconv_hf_qf32 = 2850
27570
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vconv_sf_qf32 = 2851
27571
229k
    CEFBS_UseHVXV73, // V6_vconv_sf_w = 2852
27572
229k
    CEFBS_UseHVXV73, // V6_vconv_w_sf = 2853
27573
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vcvt_b_hf = 2854
27574
229k
    CEFBS_UseHVXV73_UseHVXIEEEFP, // V6_vcvt_bf_sf = 2855
27575
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vcvt_h_hf = 2856
27576
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vcvt_hf_b = 2857
27577
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vcvt_hf_h = 2858
27578
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vcvt_hf_sf = 2859
27579
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vcvt_hf_ub = 2860
27580
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vcvt_hf_uh = 2861
27581
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vcvt_sf_hf = 2862
27582
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vcvt_ub_hf = 2863
27583
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vcvt_uh_hf = 2864
27584
229k
    CEFBS_UseHVXV60, // V6_vdeal = 2865
27585
229k
    CEFBS_UseHVXV60, // V6_vdealb = 2866
27586
229k
    CEFBS_UseHVXV60, // V6_vdealb4w = 2867
27587
229k
    CEFBS_UseHVXV60, // V6_vdealh = 2868
27588
229k
    CEFBS_UseHVXV60, // V6_vdealvdd = 2869
27589
229k
    CEFBS_UseHVXV60, // V6_vdelta = 2870
27590
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vdmpy_sf_hf = 2871
27591
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vdmpy_sf_hf_acc = 2872
27592
229k
    CEFBS_UseHVXV60, // V6_vdmpybus = 2873
27593
229k
    CEFBS_UseHVXV60, // V6_vdmpybus_acc = 2874
27594
229k
    CEFBS_UseHVXV60, // V6_vdmpybus_dv = 2875
27595
229k
    CEFBS_UseHVXV60, // V6_vdmpybus_dv_acc = 2876
27596
229k
    CEFBS_UseHVXV60, // V6_vdmpyhb = 2877
27597
229k
    CEFBS_UseHVXV60, // V6_vdmpyhb_acc = 2878
27598
229k
    CEFBS_UseHVXV60, // V6_vdmpyhb_dv = 2879
27599
229k
    CEFBS_UseHVXV60, // V6_vdmpyhb_dv_acc = 2880
27600
229k
    CEFBS_UseHVXV60, // V6_vdmpyhisat = 2881
27601
229k
    CEFBS_UseHVXV60, // V6_vdmpyhisat_acc = 2882
27602
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsat = 2883
27603
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsat_acc = 2884
27604
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsuisat = 2885
27605
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsuisat_acc = 2886
27606
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsusat = 2887
27607
229k
    CEFBS_UseHVXV60, // V6_vdmpyhsusat_acc = 2888
27608
229k
    CEFBS_UseHVXV60, // V6_vdmpyhvsat = 2889
27609
229k
    CEFBS_UseHVXV60, // V6_vdmpyhvsat_acc = 2890
27610
229k
    CEFBS_UseHVXV60, // V6_vdsaduh = 2891
27611
229k
    CEFBS_UseHVXV60, // V6_vdsaduh_acc = 2892
27612
229k
    CEFBS_UseHVXV60, // V6_veqb = 2893
27613
229k
    CEFBS_UseHVXV60, // V6_veqb_and = 2894
27614
229k
    CEFBS_UseHVXV60, // V6_veqb_or = 2895
27615
229k
    CEFBS_UseHVXV60, // V6_veqb_xor = 2896
27616
229k
    CEFBS_UseHVXV60, // V6_veqh = 2897
27617
229k
    CEFBS_UseHVXV60, // V6_veqh_and = 2898
27618
229k
    CEFBS_UseHVXV60, // V6_veqh_or = 2899
27619
229k
    CEFBS_UseHVXV60, // V6_veqh_xor = 2900
27620
229k
    CEFBS_UseHVXV60, // V6_veqw = 2901
27621
229k
    CEFBS_UseHVXV60, // V6_veqw_and = 2902
27622
229k
    CEFBS_UseHVXV60, // V6_veqw_or = 2903
27623
229k
    CEFBS_UseHVXV60, // V6_veqw_xor = 2904
27624
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vfmax_hf = 2905
27625
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vfmax_sf = 2906
27626
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vfmin_hf = 2907
27627
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vfmin_sf = 2908
27628
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vfneg_hf = 2909
27629
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vfneg_sf = 2910
27630
229k
    CEFBS_UseHVXV65, // V6_vgathermh = 2911
27631
229k
    CEFBS_UseHVXV65, // V6_vgathermhq = 2912
27632
229k
    CEFBS_UseHVXV65, // V6_vgathermhw = 2913
27633
229k
    CEFBS_UseHVXV65, // V6_vgathermhwq = 2914
27634
229k
    CEFBS_UseHVXV65, // V6_vgathermw = 2915
27635
229k
    CEFBS_UseHVXV65, // V6_vgathermwq = 2916
27636
229k
    CEFBS_UseHVXV60, // V6_vgtb = 2917
27637
229k
    CEFBS_UseHVXV60, // V6_vgtb_and = 2918
27638
229k
    CEFBS_UseHVXV60, // V6_vgtb_or = 2919
27639
229k
    CEFBS_UseHVXV60, // V6_vgtb_xor = 2920
27640
229k
    CEFBS_UseHVXV73_UseHVXQFloat, // V6_vgtbf = 2921
27641
229k
    CEFBS_UseHVXV73_UseHVXQFloat, // V6_vgtbf_and = 2922
27642
229k
    CEFBS_UseHVXV73_UseHVXQFloat, // V6_vgtbf_or = 2923
27643
229k
    CEFBS_UseHVXV73_UseHVXQFloat, // V6_vgtbf_xor = 2924
27644
229k
    CEFBS_UseHVXV60, // V6_vgth = 2925
27645
229k
    CEFBS_UseHVXV60, // V6_vgth_and = 2926
27646
229k
    CEFBS_UseHVXV60, // V6_vgth_or = 2927
27647
229k
    CEFBS_UseHVXV60, // V6_vgth_xor = 2928
27648
229k
    CEFBS_UseHVXV68, // V6_vgthf = 2929
27649
229k
    CEFBS_UseHVXV68, // V6_vgthf_and = 2930
27650
229k
    CEFBS_UseHVXV68, // V6_vgthf_or = 2931
27651
229k
    CEFBS_UseHVXV68, // V6_vgthf_xor = 2932
27652
229k
    CEFBS_UseHVXV68, // V6_vgtsf = 2933
27653
229k
    CEFBS_UseHVXV68, // V6_vgtsf_and = 2934
27654
229k
    CEFBS_UseHVXV68, // V6_vgtsf_or = 2935
27655
229k
    CEFBS_UseHVXV68, // V6_vgtsf_xor = 2936
27656
229k
    CEFBS_UseHVXV60, // V6_vgtub = 2937
27657
229k
    CEFBS_UseHVXV60, // V6_vgtub_and = 2938
27658
229k
    CEFBS_UseHVXV60, // V6_vgtub_or = 2939
27659
229k
    CEFBS_UseHVXV60, // V6_vgtub_xor = 2940
27660
229k
    CEFBS_UseHVXV60, // V6_vgtuh = 2941
27661
229k
    CEFBS_UseHVXV60, // V6_vgtuh_and = 2942
27662
229k
    CEFBS_UseHVXV60, // V6_vgtuh_or = 2943
27663
229k
    CEFBS_UseHVXV60, // V6_vgtuh_xor = 2944
27664
229k
    CEFBS_UseHVXV60, // V6_vgtuw = 2945
27665
229k
    CEFBS_UseHVXV60, // V6_vgtuw_and = 2946
27666
229k
    CEFBS_UseHVXV60, // V6_vgtuw_or = 2947
27667
229k
    CEFBS_UseHVXV60, // V6_vgtuw_xor = 2948
27668
229k
    CEFBS_UseHVXV60, // V6_vgtw = 2949
27669
229k
    CEFBS_UseHVXV60, // V6_vgtw_and = 2950
27670
229k
    CEFBS_UseHVXV60, // V6_vgtw_or = 2951
27671
229k
    CEFBS_UseHVXV60, // V6_vgtw_xor = 2952
27672
229k
    CEFBS_UseHVXV60, // V6_vhist = 2953
27673
229k
    CEFBS_UseHVXV60, // V6_vhistq = 2954
27674
229k
    CEFBS_UseHVXV60, // V6_vinsertwr = 2955
27675
229k
    CEFBS_UseHVXV60, // V6_vlalignb = 2956
27676
229k
    CEFBS_UseHVXV60, // V6_vlalignbi = 2957
27677
229k
    CEFBS_UseHVXV62, // V6_vlsrb = 2958
27678
229k
    CEFBS_UseHVXV60, // V6_vlsrh = 2959
27679
229k
    CEFBS_UseHVXV60, // V6_vlsrhv = 2960
27680
229k
    CEFBS_UseHVXV60, // V6_vlsrw = 2961
27681
229k
    CEFBS_UseHVXV60, // V6_vlsrwv = 2962
27682
229k
    CEFBS_UseHVXV65, // V6_vlut4 = 2963
27683
229k
    CEFBS_UseHVXV60, // V6_vlutvvb = 2964
27684
229k
    CEFBS_UseHVXV62, // V6_vlutvvb_nm = 2965
27685
229k
    CEFBS_UseHVXV60, // V6_vlutvvb_oracc = 2966
27686
229k
    CEFBS_UseHVXV62, // V6_vlutvvb_oracci = 2967
27687
229k
    CEFBS_UseHVXV62, // V6_vlutvvbi = 2968
27688
229k
    CEFBS_UseHVXV60, // V6_vlutvwh = 2969
27689
229k
    CEFBS_UseHVXV62, // V6_vlutvwh_nm = 2970
27690
229k
    CEFBS_UseHVXV60, // V6_vlutvwh_oracc = 2971
27691
229k
    CEFBS_UseHVXV62, // V6_vlutvwh_oracci = 2972
27692
229k
    CEFBS_UseHVXV62, // V6_vlutvwhi = 2973
27693
229k
    CEFBS_UseHVXV73_UseHVXIEEEFP, // V6_vmax_bf = 2974
27694
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmax_hf = 2975
27695
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmax_sf = 2976
27696
229k
    CEFBS_UseHVXV62, // V6_vmaxb = 2977
27697
229k
    CEFBS_UseHVXV60, // V6_vmaxh = 2978
27698
229k
    CEFBS_UseHVXV60, // V6_vmaxub = 2979
27699
229k
    CEFBS_UseHVXV60, // V6_vmaxuh = 2980
27700
229k
    CEFBS_UseHVXV60, // V6_vmaxw = 2981
27701
229k
    CEFBS_UseHVXV73_UseHVXIEEEFP, // V6_vmin_bf = 2982
27702
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmin_hf = 2983
27703
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmin_sf = 2984
27704
229k
    CEFBS_UseHVXV62, // V6_vminb = 2985
27705
229k
    CEFBS_UseHVXV60, // V6_vminh = 2986
27706
229k
    CEFBS_UseHVXV60, // V6_vminub = 2987
27707
229k
    CEFBS_UseHVXV60, // V6_vminuh = 2988
27708
229k
    CEFBS_UseHVXV60, // V6_vminw = 2989
27709
229k
    CEFBS_UseHVXV60, // V6_vmpabus = 2990
27710
229k
    CEFBS_UseHVXV60, // V6_vmpabus_acc = 2991
27711
229k
    CEFBS_UseHVXV60, // V6_vmpabusv = 2992
27712
229k
    CEFBS_UseHVXV65, // V6_vmpabuu = 2993
27713
229k
    CEFBS_UseHVXV65, // V6_vmpabuu_acc = 2994
27714
229k
    CEFBS_UseHVXV60, // V6_vmpabuuv = 2995
27715
229k
    CEFBS_UseHVXV60, // V6_vmpahb = 2996
27716
229k
    CEFBS_UseHVXV60, // V6_vmpahb_acc = 2997
27717
229k
    CEFBS_UseHVXV65, // V6_vmpahhsat = 2998
27718
229k
    CEFBS_UseHVXV62, // V6_vmpauhb = 2999
27719
229k
    CEFBS_UseHVXV62, // V6_vmpauhb_acc = 3000
27720
229k
    CEFBS_UseHVXV65, // V6_vmpauhuhsat = 3001
27721
229k
    CEFBS_UseHVXV65, // V6_vmpsuhuhsat = 3002
27722
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vmpy_hf_hf = 3003
27723
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vmpy_hf_hf_acc = 3004
27724
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmpy_qf16 = 3005
27725
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmpy_qf16_hf = 3006
27726
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmpy_qf16_mix_hf = 3007
27727
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmpy_qf32 = 3008
27728
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmpy_qf32_hf = 3009
27729
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmpy_qf32_mix_hf = 3010
27730
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmpy_qf32_qf16 = 3011
27731
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vmpy_qf32_sf = 3012
27732
229k
    CEFBS_UseHVXV73_UseHVXIEEEFP, // V6_vmpy_sf_bf = 3013
27733
229k
    CEFBS_UseHVXV73_UseHVXIEEEFP, // V6_vmpy_sf_bf_acc = 3014
27734
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vmpy_sf_hf = 3015
27735
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vmpy_sf_hf_acc = 3016
27736
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vmpy_sf_sf = 3017
27737
229k
    CEFBS_UseHVXV60, // V6_vmpybus = 3018
27738
229k
    CEFBS_UseHVXV60, // V6_vmpybus_acc = 3019
27739
229k
    CEFBS_UseHVXV60, // V6_vmpybusv = 3020
27740
229k
    CEFBS_UseHVXV60, // V6_vmpybusv_acc = 3021
27741
229k
    CEFBS_UseHVXV60, // V6_vmpybv = 3022
27742
229k
    CEFBS_UseHVXV60, // V6_vmpybv_acc = 3023
27743
229k
    CEFBS_UseHVXV60, // V6_vmpyewuh = 3024
27744
229k
    CEFBS_UseHVXV62, // V6_vmpyewuh_64 = 3025
27745
229k
    CEFBS_UseHVXV60, // V6_vmpyh = 3026
27746
229k
    CEFBS_UseHVXV65, // V6_vmpyh_acc = 3027
27747
229k
    CEFBS_UseHVXV60, // V6_vmpyhsat_acc = 3028
27748
229k
    CEFBS_UseHVXV60, // V6_vmpyhsrs = 3029
27749
229k
    CEFBS_UseHVXV60, // V6_vmpyhss = 3030
27750
229k
    CEFBS_UseHVXV60, // V6_vmpyhus = 3031
27751
229k
    CEFBS_UseHVXV60, // V6_vmpyhus_acc = 3032
27752
229k
    CEFBS_UseHVXV60, // V6_vmpyhv = 3033
27753
229k
    CEFBS_UseHVXV60, // V6_vmpyhv_acc = 3034
27754
229k
    CEFBS_UseHVXV60, // V6_vmpyhvsrs = 3035
27755
229k
    CEFBS_UseHVXV60, // V6_vmpyieoh = 3036
27756
229k
    CEFBS_UseHVXV60, // V6_vmpyiewh_acc = 3037
27757
229k
    CEFBS_UseHVXV60, // V6_vmpyiewuh = 3038
27758
229k
    CEFBS_UseHVXV60, // V6_vmpyiewuh_acc = 3039
27759
229k
    CEFBS_UseHVXV60, // V6_vmpyih = 3040
27760
229k
    CEFBS_UseHVXV60, // V6_vmpyih_acc = 3041
27761
229k
    CEFBS_UseHVXV60, // V6_vmpyihb = 3042
27762
229k
    CEFBS_UseHVXV60, // V6_vmpyihb_acc = 3043
27763
229k
    CEFBS_UseHVXV60, // V6_vmpyiowh = 3044
27764
229k
    CEFBS_UseHVXV60, // V6_vmpyiwb = 3045
27765
229k
    CEFBS_UseHVXV60, // V6_vmpyiwb_acc = 3046
27766
229k
    CEFBS_UseHVXV60, // V6_vmpyiwh = 3047
27767
229k
    CEFBS_UseHVXV60, // V6_vmpyiwh_acc = 3048
27768
229k
    CEFBS_UseHVXV62, // V6_vmpyiwub = 3049
27769
229k
    CEFBS_UseHVXV62, // V6_vmpyiwub_acc = 3050
27770
229k
    CEFBS_UseHVXV60, // V6_vmpyowh = 3051
27771
229k
    CEFBS_UseHVXV62, // V6_vmpyowh_64_acc = 3052
27772
229k
    CEFBS_UseHVXV60, // V6_vmpyowh_rnd = 3053
27773
229k
    CEFBS_UseHVXV60, // V6_vmpyowh_rnd_sacc = 3054
27774
229k
    CEFBS_UseHVXV60, // V6_vmpyowh_sacc = 3055
27775
229k
    CEFBS_UseHVXV60, // V6_vmpyub = 3056
27776
229k
    CEFBS_UseHVXV60, // V6_vmpyub_acc = 3057
27777
229k
    CEFBS_UseHVXV60, // V6_vmpyubv = 3058
27778
229k
    CEFBS_UseHVXV60, // V6_vmpyubv_acc = 3059
27779
229k
    CEFBS_UseHVXV60, // V6_vmpyuh = 3060
27780
229k
    CEFBS_UseHVXV60, // V6_vmpyuh_acc = 3061
27781
229k
    CEFBS_UseHVXV65, // V6_vmpyuhe = 3062
27782
229k
    CEFBS_UseHVXV65, // V6_vmpyuhe_acc = 3063
27783
229k
    CEFBS_UseHVXV60, // V6_vmpyuhv = 3064
27784
229k
    CEFBS_UseHVXV60, // V6_vmpyuhv_acc = 3065
27785
229k
    CEFBS_UseHVXV69, // V6_vmpyuhvs = 3066
27786
229k
    CEFBS_UseHVXV60, // V6_vmux = 3067
27787
229k
    CEFBS_UseHVXV65, // V6_vnavgb = 3068
27788
229k
    CEFBS_UseHVXV60, // V6_vnavgh = 3069
27789
229k
    CEFBS_UseHVXV60, // V6_vnavgub = 3070
27790
229k
    CEFBS_UseHVXV60, // V6_vnavgw = 3071
27791
229k
    CEFBS_UseHVXV60, // V6_vnccombine = 3072
27792
229k
    CEFBS_UseHVXV60, // V6_vncmov = 3073
27793
229k
    CEFBS_UseHVXV60, // V6_vnormamth = 3074
27794
229k
    CEFBS_UseHVXV60, // V6_vnormamtw = 3075
27795
229k
    CEFBS_UseHVXV60, // V6_vnot = 3076
27796
229k
    CEFBS_UseHVXV60, // V6_vor = 3077
27797
229k
    CEFBS_UseHVXV60, // V6_vpackeb = 3078
27798
229k
    CEFBS_UseHVXV60, // V6_vpackeh = 3079
27799
229k
    CEFBS_UseHVXV60, // V6_vpackhb_sat = 3080
27800
229k
    CEFBS_UseHVXV60, // V6_vpackhub_sat = 3081
27801
229k
    CEFBS_UseHVXV60, // V6_vpackob = 3082
27802
229k
    CEFBS_UseHVXV60, // V6_vpackoh = 3083
27803
229k
    CEFBS_UseHVXV60, // V6_vpackwh_sat = 3084
27804
229k
    CEFBS_UseHVXV60, // V6_vpackwuh_sat = 3085
27805
229k
    CEFBS_UseHVXV60, // V6_vpopcounth = 3086
27806
229k
    CEFBS_UseHVXV65, // V6_vprefixqb = 3087
27807
229k
    CEFBS_UseHVXV65, // V6_vprefixqh = 3088
27808
229k
    CEFBS_UseHVXV65, // V6_vprefixqw = 3089
27809
229k
    CEFBS_UseHVXV60, // V6_vrdelta = 3090
27810
229k
    CEFBS_UseHVXV65, // V6_vrmpybub_rtt = 3091
27811
229k
    CEFBS_UseHVXV65, // V6_vrmpybub_rtt_acc = 3092
27812
229k
    CEFBS_UseHVXV60, // V6_vrmpybus = 3093
27813
229k
    CEFBS_UseHVXV60, // V6_vrmpybus_acc = 3094
27814
229k
    CEFBS_UseHVXV60, // V6_vrmpybusi = 3095
27815
229k
    CEFBS_UseHVXV60, // V6_vrmpybusi_acc = 3096
27816
229k
    CEFBS_UseHVXV60, // V6_vrmpybusv = 3097
27817
229k
    CEFBS_UseHVXV60, // V6_vrmpybusv_acc = 3098
27818
229k
    CEFBS_UseHVXV60, // V6_vrmpybv = 3099
27819
229k
    CEFBS_UseHVXV60, // V6_vrmpybv_acc = 3100
27820
229k
    CEFBS_UseHVXV60, // V6_vrmpyub = 3101
27821
229k
    CEFBS_UseHVXV60, // V6_vrmpyub_acc = 3102
27822
229k
    CEFBS_UseHVXV65, // V6_vrmpyub_rtt = 3103
27823
229k
    CEFBS_UseHVXV65, // V6_vrmpyub_rtt_acc = 3104
27824
229k
    CEFBS_UseHVXV60, // V6_vrmpyubi = 3105
27825
229k
    CEFBS_UseHVXV60, // V6_vrmpyubi_acc = 3106
27826
229k
    CEFBS_UseHVXV60, // V6_vrmpyubv = 3107
27827
229k
    CEFBS_UseHVXV60, // V6_vrmpyubv_acc = 3108
27828
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rt = 3109
27829
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rt_acc = 3110
27830
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rx = 3111
27831
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbb_rx_acc = 3112
27832
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rt = 3113
27833
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rt_acc = 3114
27834
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rx = 3115
27835
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzbub_rx_acc = 3116
27836
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rt = 3117
27837
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rt_acc = 3118
27838
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rx = 3119
27839
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcb_rx_acc = 3120
27840
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rt = 3121
27841
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rt_acc = 3122
27842
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rx = 3123
27843
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyzcbs_rx_acc = 3124
27844
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rt = 3125
27845
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rt_acc = 3126
27846
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rx = 3127
27847
229k
    CEFBS_UseHVXV66_UseZReg, // V6_vrmpyznb_rx_acc = 3128
27848
229k
    CEFBS_UseHVXV60, // V6_vror = 3129
27849
229k
    CEFBS_UseHVXV66, // V6_vrotr = 3130
27850
229k
    CEFBS_UseHVXV60, // V6_vroundhb = 3131
27851
229k
    CEFBS_UseHVXV60, // V6_vroundhub = 3132
27852
229k
    CEFBS_UseHVXV62, // V6_vrounduhub = 3133
27853
229k
    CEFBS_UseHVXV62, // V6_vrounduwuh = 3134
27854
229k
    CEFBS_UseHVXV60, // V6_vroundwh = 3135
27855
229k
    CEFBS_UseHVXV60, // V6_vroundwuh = 3136
27856
229k
    CEFBS_UseHVXV60, // V6_vrsadubi = 3137
27857
229k
    CEFBS_UseHVXV60, // V6_vrsadubi_acc = 3138
27858
229k
    CEFBS_UseHVXV66, // V6_vsatdw = 3139
27859
229k
    CEFBS_UseHVXV60, // V6_vsathub = 3140
27860
229k
    CEFBS_UseHVXV62, // V6_vsatuwuh = 3141
27861
229k
    CEFBS_UseHVXV60, // V6_vsatwh = 3142
27862
229k
    CEFBS_UseHVXV60, // V6_vsb = 3143
27863
229k
    CEFBS_UseHVXV65, // V6_vscattermh = 3144
27864
229k
    CEFBS_UseHVXV65, // V6_vscattermh_add = 3145
27865
229k
    CEFBS_UseHVXV65, // V6_vscattermhq = 3146
27866
229k
    CEFBS_UseHVXV65, // V6_vscattermhw = 3147
27867
229k
    CEFBS_UseHVXV65, // V6_vscattermhw_add = 3148
27868
229k
    CEFBS_UseHVXV65, // V6_vscattermhwq = 3149
27869
229k
    CEFBS_UseHVXV65, // V6_vscattermw = 3150
27870
229k
    CEFBS_UseHVXV65, // V6_vscattermw_add = 3151
27871
229k
    CEFBS_UseHVXV65, // V6_vscattermwq = 3152
27872
229k
    CEFBS_UseHVXV60, // V6_vsh = 3153
27873
229k
    CEFBS_UseHVXV60, // V6_vshufeh = 3154
27874
229k
    CEFBS_UseHVXV60, // V6_vshuff = 3155
27875
229k
    CEFBS_UseHVXV60, // V6_vshuffb = 3156
27876
229k
    CEFBS_UseHVXV60, // V6_vshuffeb = 3157
27877
229k
    CEFBS_UseHVXV60, // V6_vshuffh = 3158
27878
229k
    CEFBS_UseHVXV60, // V6_vshuffob = 3159
27879
229k
    CEFBS_UseHVXV60, // V6_vshuffvdd = 3160
27880
229k
    CEFBS_UseHVXV60, // V6_vshufoeb = 3161
27881
229k
    CEFBS_UseHVXV60, // V6_vshufoeh = 3162
27882
229k
    CEFBS_UseHVXV60, // V6_vshufoh = 3163
27883
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vsub_hf = 3164
27884
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vsub_hf_hf = 3165
27885
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vsub_qf16 = 3166
27886
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vsub_qf16_mix = 3167
27887
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vsub_qf32 = 3168
27888
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vsub_qf32_mix = 3169
27889
229k
    CEFBS_UseHVXV68_UseHVXQFloat, // V6_vsub_sf = 3170
27890
229k
    CEFBS_UseHVXV73_UseHVXIEEEFP, // V6_vsub_sf_bf = 3171
27891
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vsub_sf_hf = 3172
27892
229k
    CEFBS_UseHVXV68_UseHVXIEEEFP, // V6_vsub_sf_sf = 3173
27893
229k
    CEFBS_UseHVXV60, // V6_vsubb = 3174
27894
229k
    CEFBS_UseHVXV60, // V6_vsubb_dv = 3175
27895
229k
    CEFBS_UseHVXV60, // V6_vsubbnq = 3176
27896
229k
    CEFBS_UseHVXV60, // V6_vsubbq = 3177
27897
229k
    CEFBS_UseHVXV62, // V6_vsubbsat = 3178
27898
229k
    CEFBS_UseHVXV62, // V6_vsubbsat_dv = 3179
27899
229k
    CEFBS_UseHVXV62, // V6_vsubcarry = 3180
27900
229k
    CEFBS_UseHVXV66, // V6_vsubcarryo = 3181
27901
229k
    CEFBS_UseHVXV60, // V6_vsubh = 3182
27902
229k
    CEFBS_UseHVXV60, // V6_vsubh_dv = 3183
27903
229k
    CEFBS_UseHVXV60, // V6_vsubhnq = 3184
27904
229k
    CEFBS_UseHVXV60, // V6_vsubhq = 3185
27905
229k
    CEFBS_UseHVXV60, // V6_vsubhsat = 3186
27906
229k
    CEFBS_UseHVXV60, // V6_vsubhsat_dv = 3187
27907
229k
    CEFBS_UseHVXV60, // V6_vsubhw = 3188
27908
229k
    CEFBS_UseHVXV60, // V6_vsububh = 3189
27909
229k
    CEFBS_UseHVXV60, // V6_vsububsat = 3190
27910
229k
    CEFBS_UseHVXV60, // V6_vsububsat_dv = 3191
27911
229k
    CEFBS_UseHVXV62, // V6_vsubububb_sat = 3192
27912
229k
    CEFBS_UseHVXV60, // V6_vsubuhsat = 3193
27913
229k
    CEFBS_UseHVXV60, // V6_vsubuhsat_dv = 3194
27914
229k
    CEFBS_UseHVXV60, // V6_vsubuhw = 3195
27915
229k
    CEFBS_UseHVXV62, // V6_vsubuwsat = 3196
27916
229k
    CEFBS_UseHVXV62, // V6_vsubuwsat_dv = 3197
27917
229k
    CEFBS_UseHVXV60, // V6_vsubw = 3198
27918
229k
    CEFBS_UseHVXV60, // V6_vsubw_dv = 3199
27919
229k
    CEFBS_UseHVXV60, // V6_vsubwnq = 3200
27920
229k
    CEFBS_UseHVXV60, // V6_vsubwq = 3201
27921
229k
    CEFBS_UseHVXV60, // V6_vsubwsat = 3202
27922
229k
    CEFBS_UseHVXV60, // V6_vsubwsat_dv = 3203
27923
229k
    CEFBS_UseHVXV60, // V6_vswap = 3204
27924
229k
    CEFBS_UseHVXV60, // V6_vtmpyb = 3205
27925
229k
    CEFBS_UseHVXV60, // V6_vtmpyb_acc = 3206
27926
229k
    CEFBS_UseHVXV60, // V6_vtmpybus = 3207
27927
229k
    CEFBS_UseHVXV60, // V6_vtmpybus_acc = 3208
27928
229k
    CEFBS_UseHVXV60, // V6_vtmpyhb = 3209
27929
229k
    CEFBS_UseHVXV60, // V6_vtmpyhb_acc = 3210
27930
229k
    CEFBS_UseHVXV60, // V6_vunpackb = 3211
27931
229k
    CEFBS_UseHVXV60, // V6_vunpackh = 3212
27932
229k
    CEFBS_UseHVXV60, // V6_vunpackob = 3213
27933
229k
    CEFBS_UseHVXV60, // V6_vunpackoh = 3214
27934
229k
    CEFBS_UseHVXV60, // V6_vunpackub = 3215
27935
229k
    CEFBS_UseHVXV60, // V6_vunpackuh = 3216
27936
229k
    CEFBS_UseHVXV62, // V6_vwhist128 = 3217
27937
229k
    CEFBS_UseHVXV62, // V6_vwhist128m = 3218
27938
229k
    CEFBS_UseHVXV62, // V6_vwhist128q = 3219
27939
229k
    CEFBS_UseHVXV62, // V6_vwhist128qm = 3220
27940
229k
    CEFBS_UseHVXV62, // V6_vwhist256 = 3221
27941
229k
    CEFBS_UseHVXV62, // V6_vwhist256_sat = 3222
27942
229k
    CEFBS_UseHVXV62, // V6_vwhist256q = 3223
27943
229k
    CEFBS_UseHVXV62, // V6_vwhist256q_sat = 3224
27944
229k
    CEFBS_UseHVXV60, // V6_vxor = 3225
27945
229k
    CEFBS_UseHVXV60, // V6_vzb = 3226
27946
229k
    CEFBS_UseHVXV60, // V6_vzh = 3227
27947
229k
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_ai = 3228
27948
229k
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_pi = 3229
27949
229k
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_ppu = 3230
27950
229k
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_pred_ai = 3231
27951
229k
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_pred_pi = 3232
27952
229k
    CEFBS_UseHVXV66_UseZReg, // V6_zLd_pred_ppu = 3233
27953
229k
    CEFBS_UseHVXV66_UseZReg, // V6_zextract = 3234
27954
229k
    CEFBS_None, // Y2_barrier = 3235
27955
229k
    CEFBS_None, // Y2_break = 3236
27956
229k
    CEFBS_None, // Y2_ciad = 3237
27957
229k
    CEFBS_None, // Y2_crswap0 = 3238
27958
229k
    CEFBS_None, // Y2_cswi = 3239
27959
229k
    CEFBS_None, // Y2_dccleana = 3240
27960
229k
    CEFBS_None, // Y2_dccleanidx = 3241
27961
229k
    CEFBS_None, // Y2_dccleaninva = 3242
27962
229k
    CEFBS_None, // Y2_dccleaninvidx = 3243
27963
229k
    CEFBS_None, // Y2_dcfetchbo = 3244
27964
229k
    CEFBS_None, // Y2_dcinva = 3245
27965
229k
    CEFBS_None, // Y2_dcinvidx = 3246
27966
229k
    CEFBS_None, // Y2_dckill = 3247
27967
229k
    CEFBS_None, // Y2_dctagr = 3248
27968
229k
    CEFBS_None, // Y2_dctagw = 3249
27969
229k
    CEFBS_None, // Y2_dczeroa = 3250
27970
229k
    CEFBS_None, // Y2_getimask = 3251
27971
229k
    CEFBS_None, // Y2_iassignr = 3252
27972
229k
    CEFBS_None, // Y2_iassignw = 3253
27973
229k
    CEFBS_None, // Y2_icdatar = 3254
27974
229k
    CEFBS_HasV66, // Y2_icdataw = 3255
27975
229k
    CEFBS_None, // Y2_icinva = 3256
27976
229k
    CEFBS_None, // Y2_icinvidx = 3257
27977
229k
    CEFBS_None, // Y2_ickill = 3258
27978
229k
    CEFBS_None, // Y2_ictagr = 3259
27979
229k
    CEFBS_None, // Y2_ictagw = 3260
27980
229k
    CEFBS_None, // Y2_isync = 3261
27981
229k
    CEFBS_None, // Y2_k0lock = 3262
27982
229k
    CEFBS_None, // Y2_k0unlock = 3263
27983
229k
    CEFBS_None, // Y2_l2cleaninvidx = 3264
27984
229k
    CEFBS_None, // Y2_l2kill = 3265
27985
229k
    CEFBS_None, // Y2_resume = 3266
27986
229k
    CEFBS_None, // Y2_setimask = 3267
27987
229k
    CEFBS_HasV66, // Y2_setprio = 3268
27988
229k
    CEFBS_None, // Y2_start = 3269
27989
229k
    CEFBS_None, // Y2_stop = 3270
27990
229k
    CEFBS_None, // Y2_swi = 3271
27991
229k
    CEFBS_None, // Y2_syncht = 3272
27992
229k
    CEFBS_None, // Y2_tfrscrr = 3273
27993
229k
    CEFBS_None, // Y2_tfrsrcr = 3274
27994
229k
    CEFBS_None, // Y2_tlblock = 3275
27995
229k
    CEFBS_None, // Y2_tlbp = 3276
27996
229k
    CEFBS_None, // Y2_tlbr = 3277
27997
229k
    CEFBS_None, // Y2_tlbunlock = 3278
27998
229k
    CEFBS_None, // Y2_tlbw = 3279
27999
229k
    CEFBS_HasV65, // Y2_wait = 3280
28000
229k
    CEFBS_None, // Y4_crswap1 = 3281
28001
229k
    CEFBS_None, // Y4_crswap10 = 3282
28002
229k
    CEFBS_None, // Y4_l2fetch = 3283
28003
229k
    CEFBS_None, // Y4_l2tagr = 3284
28004
229k
    CEFBS_None, // Y4_l2tagw = 3285
28005
229k
    CEFBS_None, // Y4_nmi = 3286
28006
229k
    CEFBS_None, // Y4_siad = 3287
28007
229k
    CEFBS_None, // Y4_tfrscpp = 3288
28008
229k
    CEFBS_None, // Y4_tfrspcp = 3289
28009
229k
    CEFBS_None, // Y4_trace = 3290
28010
229k
    CEFBS_None, // Y5_ctlbw = 3291
28011
229k
    CEFBS_None, // Y5_l2cleanidx = 3292
28012
229k
    CEFBS_None, // Y5_l2fetch = 3293
28013
229k
    CEFBS_None, // Y5_l2gclean = 3294
28014
229k
    CEFBS_None, // Y5_l2gcleaninv = 3295
28015
229k
    CEFBS_None, // Y5_l2gunlock = 3296
28016
229k
    CEFBS_None, // Y5_l2invidx = 3297
28017
229k
    CEFBS_None, // Y5_l2locka = 3298
28018
229k
    CEFBS_None, // Y5_l2unlocka = 3299
28019
229k
    CEFBS_None, // Y5_tlbasidi = 3300
28020
229k
    CEFBS_None, // Y5_tlboc = 3301
28021
229k
    CEFBS_HasV67, // Y6_diag = 3302
28022
229k
    CEFBS_HasV67, // Y6_diag0 = 3303
28023
229k
    CEFBS_HasV67, // Y6_diag1 = 3304
28024
229k
    CEFBS_HasV68, // Y6_dmlink = 3305
28025
229k
    CEFBS_HasV68, // Y6_dmpause = 3306
28026
229k
    CEFBS_HasV68, // Y6_dmpoll = 3307
28027
229k
    CEFBS_HasV68, // Y6_dmresume = 3308
28028
229k
    CEFBS_HasV68, // Y6_dmstart = 3309
28029
229k
    CEFBS_HasV68, // Y6_dmwait = 3310
28030
229k
    CEFBS_None, // Y6_l2gcleaninvpa = 3311
28031
229k
    CEFBS_None, // Y6_l2gcleanpa = 3312
28032
229k
    CEFBS_None, // dep_A2_addsat = 3313
28033
229k
    CEFBS_None, // dep_A2_subsat = 3314
28034
229k
    CEFBS_None, // dep_S2_packhl = 3315
28035
229k
    CEFBS_None, // invalid_decode = 3316
28036
229k
  };
28037
28038
229k
  assert(Opcode < 3317);
28039
0
  return FeatureBitsets[RequiredFeaturesRefs[Opcode]];
28040
229k
}
28041
28042
} // end namespace Hexagon_MC
28043
} // end namespace llvm
28044
#endif // GET_COMPUTE_FEATURES
28045
28046
#ifdef GET_AVAILABLE_OPCODE_CHECKER
28047
#undef GET_AVAILABLE_OPCODE_CHECKER
28048
namespace llvm {
28049
namespace Hexagon_MC {
28050
bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) {
28051
  FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
28052
  FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
28053
  FeatureBitset MissingFeatures =
28054
      (AvailableFeatures & RequiredFeatures) ^
28055
      RequiredFeatures;
28056
  return !MissingFeatures.any();
28057
}
28058
} // end namespace Hexagon_MC
28059
} // end namespace llvm
28060
#endif // GET_AVAILABLE_OPCODE_CHECKER
28061
28062
#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
28063
#undef ENABLE_INSTR_PREDICATE_VERIFIER
28064
#include <sstream>
28065
28066
namespace llvm {
28067
namespace Hexagon_MC {
28068
28069
#ifndef NDEBUG
28070
static const char *SubtargetFeatureNames[] = {
28071
  "Feature_HasMemNoShuf",
28072
  "Feature_HasPreV65",
28073
  "Feature_HasV5",
28074
  "Feature_HasV55",
28075
  "Feature_HasV60",
28076
  "Feature_HasV62",
28077
  "Feature_HasV65",
28078
  "Feature_HasV66",
28079
  "Feature_HasV67",
28080
  "Feature_HasV68",
28081
  "Feature_HasV69",
28082
  "Feature_HasV71",
28083
  "Feature_HasV73",
28084
  "Feature_UseAudio",
28085
  "Feature_UseCabac",
28086
  "Feature_UseHVX",
28087
  "Feature_UseHVX64B",
28088
  "Feature_UseHVX128B",
28089
  "Feature_UseHVXIEEEFP",
28090
  "Feature_UseHVXQFloat",
28091
  "Feature_UseHVXV60",
28092
  "Feature_UseHVXV62",
28093
  "Feature_UseHVXV65",
28094
  "Feature_UseHVXV66",
28095
  "Feature_UseHVXV67",
28096
  "Feature_UseHVXV68",
28097
  "Feature_UseHVXV69",
28098
  "Feature_UseHVXV71",
28099
  "Feature_UseHVXV73",
28100
  "Feature_UseZReg",
28101
  nullptr
28102
};
28103
28104
#endif // NDEBUG
28105
28106
void verifyInstructionPredicates(
28107
229k
    unsigned Opcode, const FeatureBitset &Features) {
28108
229k
#ifndef NDEBUG
28109
229k
  FeatureBitset AvailableFeatures = computeAvailableFeatures(Features);
28110
229k
  FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode);
28111
229k
  FeatureBitset MissingFeatures =
28112
229k
      (AvailableFeatures & RequiredFeatures) ^
28113
229k
      RequiredFeatures;
28114
229k
  if (MissingFeatures.any()) {
28115
0
    std::ostringstream Msg;
28116
0
    Msg << "Attempting to emit " << &HexagonInstrNameData[HexagonInstrNameIndices[Opcode]]
28117
0
        << " instruction but the ";
28118
0
    for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i)
28119
0
      if (MissingFeatures.test(i))
28120
0
        Msg << SubtargetFeatureNames[i] << " ";
28121
0
    Msg << "predicate(s) are not met";
28122
0
    report_fatal_error(Msg.str().c_str());
28123
0
  }
28124
229k
#endif // NDEBUG
28125
229k
}
28126
} // end namespace Hexagon_MC
28127
} // end namespace llvm
28128
#endif // ENABLE_INSTR_PREDICATE_VERIFIER
28129
28130
#ifdef GET_INSTRMAP_INFO
28131
#undef GET_INSTRMAP_INFO
28132
namespace llvm {
28133
28134
namespace Hexagon {
28135
28136
enum InputType {
28137
  InputType_reg
28138
};
28139
28140
enum InstrType {
28141
  InstrType_Pseudo,
28142
  InstrType_Real
28143
};
28144
28145
enum NValueST {
28146
  NValueST_true,
28147
  NValueST_false
28148
};
28149
28150
enum PNewValue {
28151
  PNewValue_new,
28152
  PNewValue_
28153
};
28154
28155
enum PredSense {
28156
  PredSense_false,
28157
  PredSense_true
28158
};
28159
28160
enum addrMode {
28161
  addrMode_BaseImmOffset,
28162
  addrMode_Absolute,
28163
  addrMode_PostInc,
28164
  addrMode_BaseRegOffset,
28165
  addrMode_BaseLongOffset
28166
};
28167
28168
enum isBrTaken {
28169
  isBrTaken_false,
28170
  isBrTaken_true
28171
};
28172
28173
// changeAddrMode_abs_io
28174
LLVM_READONLY
28175
0
int changeAddrMode_abs_io(uint16_t Opcode) {
28176
0
static const uint16_t changeAddrMode_abs_ioTable[][2] = {
28177
0
  { Hexagon::L4_ploadrbf_abs, Hexagon::L2_ploadrbf_io },
28178
0
  { Hexagon::L4_ploadrbfnew_abs, Hexagon::L2_ploadrbfnew_io },
28179
0
  { Hexagon::L4_ploadrbt_abs, Hexagon::L2_ploadrbt_io },
28180
0
  { Hexagon::L4_ploadrbtnew_abs, Hexagon::L2_ploadrbtnew_io },
28181
0
  { Hexagon::L4_ploadrdf_abs, Hexagon::L2_ploadrdf_io },
28182
0
  { Hexagon::L4_ploadrdfnew_abs, Hexagon::L2_ploadrdfnew_io },
28183
0
  { Hexagon::L4_ploadrdt_abs, Hexagon::L2_ploadrdt_io },
28184
0
  { Hexagon::L4_ploadrdtnew_abs, Hexagon::L2_ploadrdtnew_io },
28185
0
  { Hexagon::L4_ploadrhf_abs, Hexagon::L2_ploadrhf_io },
28186
0
  { Hexagon::L4_ploadrhfnew_abs, Hexagon::L2_ploadrhfnew_io },
28187
0
  { Hexagon::L4_ploadrht_abs, Hexagon::L2_ploadrht_io },
28188
0
  { Hexagon::L4_ploadrhtnew_abs, Hexagon::L2_ploadrhtnew_io },
28189
0
  { Hexagon::L4_ploadrif_abs, Hexagon::L2_ploadrif_io },
28190
0
  { Hexagon::L4_ploadrifnew_abs, Hexagon::L2_ploadrifnew_io },
28191
0
  { Hexagon::L4_ploadrit_abs, Hexagon::L2_ploadrit_io },
28192
0
  { Hexagon::L4_ploadritnew_abs, Hexagon::L2_ploadritnew_io },
28193
0
  { Hexagon::L4_ploadrubf_abs, Hexagon::L2_ploadrubf_io },
28194
0
  { Hexagon::L4_ploadrubfnew_abs, Hexagon::L2_ploadrubfnew_io },
28195
0
  { Hexagon::L4_ploadrubt_abs, Hexagon::L2_ploadrubt_io },
28196
0
  { Hexagon::L4_ploadrubtnew_abs, Hexagon::L2_ploadrubtnew_io },
28197
0
  { Hexagon::L4_ploadruhf_abs, Hexagon::L2_ploadruhf_io },
28198
0
  { Hexagon::L4_ploadruhfnew_abs, Hexagon::L2_ploadruhfnew_io },
28199
0
  { Hexagon::L4_ploadruht_abs, Hexagon::L2_ploadruht_io },
28200
0
  { Hexagon::L4_ploadruhtnew_abs, Hexagon::L2_ploadruhtnew_io },
28201
0
  { Hexagon::PS_loadrbabs, Hexagon::L2_loadrb_io },
28202
0
  { Hexagon::PS_loadrdabs, Hexagon::L2_loadrd_io },
28203
0
  { Hexagon::PS_loadrhabs, Hexagon::L2_loadrh_io },
28204
0
  { Hexagon::PS_loadriabs, Hexagon::L2_loadri_io },
28205
0
  { Hexagon::PS_loadrubabs, Hexagon::L2_loadrub_io },
28206
0
  { Hexagon::PS_loadruhabs, Hexagon::L2_loadruh_io },
28207
0
  { Hexagon::PS_storerbabs, Hexagon::S2_storerb_io },
28208
0
  { Hexagon::PS_storerbnewabs, Hexagon::S2_storerbnew_io },
28209
0
  { Hexagon::PS_storerdabs, Hexagon::S2_storerd_io },
28210
0
  { Hexagon::PS_storerfabs, Hexagon::S2_storerf_io },
28211
0
  { Hexagon::PS_storerhabs, Hexagon::S2_storerh_io },
28212
0
  { Hexagon::PS_storerhnewabs, Hexagon::S2_storerhnew_io },
28213
0
  { Hexagon::PS_storeriabs, Hexagon::S2_storeri_io },
28214
0
  { Hexagon::PS_storerinewabs, Hexagon::S2_storerinew_io },
28215
0
  { Hexagon::S4_pstorerbf_abs, Hexagon::S2_pstorerbf_io },
28216
0
  { Hexagon::S4_pstorerbfnew_abs, Hexagon::S4_pstorerbfnew_io },
28217
0
  { Hexagon::S4_pstorerbnewf_abs, Hexagon::S2_pstorerbnewf_io },
28218
0
  { Hexagon::S4_pstorerbnewfnew_abs, Hexagon::S4_pstorerbnewfnew_io },
28219
0
  { Hexagon::S4_pstorerbnewt_abs, Hexagon::S2_pstorerbnewt_io },
28220
0
  { Hexagon::S4_pstorerbnewtnew_abs, Hexagon::S4_pstorerbnewtnew_io },
28221
0
  { Hexagon::S4_pstorerbt_abs, Hexagon::S2_pstorerbt_io },
28222
0
  { Hexagon::S4_pstorerbtnew_abs, Hexagon::S4_pstorerbtnew_io },
28223
0
  { Hexagon::S4_pstorerdf_abs, Hexagon::S2_pstorerdf_io },
28224
0
  { Hexagon::S4_pstorerdfnew_abs, Hexagon::S4_pstorerdfnew_io },
28225
0
  { Hexagon::S4_pstorerdt_abs, Hexagon::S2_pstorerdt_io },
28226
0
  { Hexagon::S4_pstorerdtnew_abs, Hexagon::S4_pstorerdtnew_io },
28227
0
  { Hexagon::S4_pstorerff_abs, Hexagon::S2_pstorerff_io },
28228
0
  { Hexagon::S4_pstorerffnew_abs, Hexagon::S4_pstorerffnew_io },
28229
0
  { Hexagon::S4_pstorerft_abs, Hexagon::S2_pstorerft_io },
28230
0
  { Hexagon::S4_pstorerftnew_abs, Hexagon::S4_pstorerftnew_io },
28231
0
  { Hexagon::S4_pstorerhf_abs, Hexagon::S2_pstorerhf_io },
28232
0
  { Hexagon::S4_pstorerhfnew_abs, Hexagon::S4_pstorerhfnew_io },
28233
0
  { Hexagon::S4_pstorerhnewf_abs, Hexagon::S2_pstorerhnewf_io },
28234
0
  { Hexagon::S4_pstorerhnewfnew_abs, Hexagon::S4_pstorerhnewfnew_io },
28235
0
  { Hexagon::S4_pstorerhnewt_abs, Hexagon::S2_pstorerhnewt_io },
28236
0
  { Hexagon::S4_pstorerhnewtnew_abs, Hexagon::S4_pstorerhnewtnew_io },
28237
0
  { Hexagon::S4_pstorerht_abs, Hexagon::S2_pstorerht_io },
28238
0
  { Hexagon::S4_pstorerhtnew_abs, Hexagon::S4_pstorerhtnew_io },
28239
0
  { Hexagon::S4_pstorerif_abs, Hexagon::S2_pstorerif_io },
28240
0
  { Hexagon::S4_pstorerifnew_abs, Hexagon::S4_pstorerifnew_io },
28241
0
  { Hexagon::S4_pstorerinewf_abs, Hexagon::S2_pstorerinewf_io },
28242
0
  { Hexagon::S4_pstorerinewfnew_abs, Hexagon::S4_pstorerinewfnew_io },
28243
0
  { Hexagon::S4_pstorerinewt_abs, Hexagon::S2_pstorerinewt_io },
28244
0
  { Hexagon::S4_pstorerinewtnew_abs, Hexagon::S4_pstorerinewtnew_io },
28245
0
  { Hexagon::S4_pstorerit_abs, Hexagon::S2_pstorerit_io },
28246
0
  { Hexagon::S4_pstoreritnew_abs, Hexagon::S4_pstoreritnew_io },
28247
0
}; // End of changeAddrMode_abs_ioTable
28248
28249
0
  unsigned mid;
28250
0
  unsigned start = 0;
28251
0
  unsigned end = 70;
28252
0
  while (start < end) {
28253
0
    mid = start + (end - start) / 2;
28254
0
    if (Opcode == changeAddrMode_abs_ioTable[mid][0]) {
28255
0
      break;
28256
0
    }
28257
0
    if (Opcode < changeAddrMode_abs_ioTable[mid][0])
28258
0
      end = mid;
28259
0
    else
28260
0
      start = mid + 1;
28261
0
  }
28262
0
  if (start == end)
28263
0
    return -1; // Instruction doesn't exist in this table.
28264
28265
0
  return changeAddrMode_abs_ioTable[mid][1];
28266
0
}
28267
28268
// changeAddrMode_io_abs
28269
LLVM_READONLY
28270
3.10k
int changeAddrMode_io_abs(uint16_t Opcode) {
28271
3.10k
static const uint16_t changeAddrMode_io_absTable[][2] = {
28272
3.10k
  { Hexagon::L2_loadrb_io, Hexagon::PS_loadrbabs },
28273
3.10k
  { Hexagon::L2_loadrd_io, Hexagon::PS_loadrdabs },
28274
3.10k
  { Hexagon::L2_loadrh_io, Hexagon::PS_loadrhabs },
28275
3.10k
  { Hexagon::L2_loadri_io, Hexagon::PS_loadriabs },
28276
3.10k
  { Hexagon::L2_loadrub_io, Hexagon::PS_loadrubabs },
28277
3.10k
  { Hexagon::L2_loadruh_io, Hexagon::PS_loadruhabs },
28278
3.10k
  { Hexagon::L2_ploadrbf_io, Hexagon::L4_ploadrbf_abs },
28279
3.10k
  { Hexagon::L2_ploadrbfnew_io, Hexagon::L4_ploadrbfnew_abs },
28280
3.10k
  { Hexagon::L2_ploadrbt_io, Hexagon::L4_ploadrbt_abs },
28281
3.10k
  { Hexagon::L2_ploadrbtnew_io, Hexagon::L4_ploadrbtnew_abs },
28282
3.10k
  { Hexagon::L2_ploadrdf_io, Hexagon::L4_ploadrdf_abs },
28283
3.10k
  { Hexagon::L2_ploadrdfnew_io, Hexagon::L4_ploadrdfnew_abs },
28284
3.10k
  { Hexagon::L2_ploadrdt_io, Hexagon::L4_ploadrdt_abs },
28285
3.10k
  { Hexagon::L2_ploadrdtnew_io, Hexagon::L4_ploadrdtnew_abs },
28286
3.10k
  { Hexagon::L2_ploadrhf_io, Hexagon::L4_ploadrhf_abs },
28287
3.10k
  { Hexagon::L2_ploadrhfnew_io, Hexagon::L4_ploadrhfnew_abs },
28288
3.10k
  { Hexagon::L2_ploadrht_io, Hexagon::L4_ploadrht_abs },
28289
3.10k
  { Hexagon::L2_ploadrhtnew_io, Hexagon::L4_ploadrhtnew_abs },
28290
3.10k
  { Hexagon::L2_ploadrif_io, Hexagon::L4_ploadrif_abs },
28291
3.10k
  { Hexagon::L2_ploadrifnew_io, Hexagon::L4_ploadrifnew_abs },
28292
3.10k
  { Hexagon::L2_ploadrit_io, Hexagon::L4_ploadrit_abs },
28293
3.10k
  { Hexagon::L2_ploadritnew_io, Hexagon::L4_ploadritnew_abs },
28294
3.10k
  { Hexagon::L2_ploadrubf_io, Hexagon::L4_ploadrubf_abs },
28295
3.10k
  { Hexagon::L2_ploadrubfnew_io, Hexagon::L4_ploadrubfnew_abs },
28296
3.10k
  { Hexagon::L2_ploadrubt_io, Hexagon::L4_ploadrubt_abs },
28297
3.10k
  { Hexagon::L2_ploadrubtnew_io, Hexagon::L4_ploadrubtnew_abs },
28298
3.10k
  { Hexagon::L2_ploadruhf_io, Hexagon::L4_ploadruhf_abs },
28299
3.10k
  { Hexagon::L2_ploadruhfnew_io, Hexagon::L4_ploadruhfnew_abs },
28300
3.10k
  { Hexagon::L2_ploadruht_io, Hexagon::L4_ploadruht_abs },
28301
3.10k
  { Hexagon::L2_ploadruhtnew_io, Hexagon::L4_ploadruhtnew_abs },
28302
3.10k
  { Hexagon::S2_pstorerbf_io, Hexagon::S4_pstorerbf_abs },
28303
3.10k
  { Hexagon::S2_pstorerbnewf_io, Hexagon::S4_pstorerbnewf_abs },
28304
3.10k
  { Hexagon::S2_pstorerbnewt_io, Hexagon::S4_pstorerbnewt_abs },
28305
3.10k
  { Hexagon::S2_pstorerbt_io, Hexagon::S4_pstorerbt_abs },
28306
3.10k
  { Hexagon::S2_pstorerdf_io, Hexagon::S4_pstorerdf_abs },
28307
3.10k
  { Hexagon::S2_pstorerdt_io, Hexagon::S4_pstorerdt_abs },
28308
3.10k
  { Hexagon::S2_pstorerff_io, Hexagon::S4_pstorerff_abs },
28309
3.10k
  { Hexagon::S2_pstorerft_io, Hexagon::S4_pstorerft_abs },
28310
3.10k
  { Hexagon::S2_pstorerhf_io, Hexagon::S4_pstorerhf_abs },
28311
3.10k
  { Hexagon::S2_pstorerhnewf_io, Hexagon::S4_pstorerhnewf_abs },
28312
3.10k
  { Hexagon::S2_pstorerhnewt_io, Hexagon::S4_pstorerhnewt_abs },
28313
3.10k
  { Hexagon::S2_pstorerht_io, Hexagon::S4_pstorerht_abs },
28314
3.10k
  { Hexagon::S2_pstorerif_io, Hexagon::S4_pstorerif_abs },
28315
3.10k
  { Hexagon::S2_pstorerinewf_io, Hexagon::S4_pstorerinewf_abs },
28316
3.10k
  { Hexagon::S2_pstorerinewt_io, Hexagon::S4_pstorerinewt_abs },
28317
3.10k
  { Hexagon::S2_pstorerit_io, Hexagon::S4_pstorerit_abs },
28318
3.10k
  { Hexagon::S2_storerb_io, Hexagon::PS_storerbabs },
28319
3.10k
  { Hexagon::S2_storerbnew_io, Hexagon::PS_storerbnewabs },
28320
3.10k
  { Hexagon::S2_storerd_io, Hexagon::PS_storerdabs },
28321
3.10k
  { Hexagon::S2_storerf_io, Hexagon::PS_storerfabs },
28322
3.10k
  { Hexagon::S2_storerh_io, Hexagon::PS_storerhabs },
28323
3.10k
  { Hexagon::S2_storerhnew_io, Hexagon::PS_storerhnewabs },
28324
3.10k
  { Hexagon::S2_storeri_io, Hexagon::PS_storeriabs },
28325
3.10k
  { Hexagon::S2_storerinew_io, Hexagon::PS_storerinewabs },
28326
3.10k
  { Hexagon::S4_pstorerbfnew_io, Hexagon::S4_pstorerbfnew_abs },
28327
3.10k
  { Hexagon::S4_pstorerbnewfnew_io, Hexagon::S4_pstorerbnewfnew_abs },
28328
3.10k
  { Hexagon::S4_pstorerbnewtnew_io, Hexagon::S4_pstorerbnewtnew_abs },
28329
3.10k
  { Hexagon::S4_pstorerbtnew_io, Hexagon::S4_pstorerbtnew_abs },
28330
3.10k
  { Hexagon::S4_pstorerdfnew_io, Hexagon::S4_pstorerdfnew_abs },
28331
3.10k
  { Hexagon::S4_pstorerdtnew_io, Hexagon::S4_pstorerdtnew_abs },
28332
3.10k
  { Hexagon::S4_pstorerffnew_io, Hexagon::S4_pstorerffnew_abs },
28333
3.10k
  { Hexagon::S4_pstorerftnew_io, Hexagon::S4_pstorerftnew_abs },
28334
3.10k
  { Hexagon::S4_pstorerhfnew_io, Hexagon::S4_pstorerhfnew_abs },
28335
3.10k
  { Hexagon::S4_pstorerhnewfnew_io, Hexagon::S4_pstorerhnewfnew_abs },
28336
3.10k
  { Hexagon::S4_pstorerhnewtnew_io, Hexagon::S4_pstorerhnewtnew_abs },
28337
3.10k
  { Hexagon::S4_pstorerhtnew_io, Hexagon::S4_pstorerhtnew_abs },
28338
3.10k
  { Hexagon::S4_pstorerifnew_io, Hexagon::S4_pstorerifnew_abs },
28339
3.10k
  { Hexagon::S4_pstorerinewfnew_io, Hexagon::S4_pstorerinewfnew_abs },
28340
3.10k
  { Hexagon::S4_pstorerinewtnew_io, Hexagon::S4_pstorerinewtnew_abs },
28341
3.10k
  { Hexagon::S4_pstoreritnew_io, Hexagon::S4_pstoreritnew_abs },
28342
3.10k
}; // End of changeAddrMode_io_absTable
28343
28344
3.10k
  unsigned mid;
28345
3.10k
  unsigned start = 0;
28346
3.10k
  unsigned end = 70;
28347
21.7k
  while (start < end) {
28348
18.6k
    mid = start + (end - start) / 2;
28349
18.6k
    if (Opcode == changeAddrMode_io_absTable[mid][0]) {
28350
40
      break;
28351
40
    }
28352
18.6k
    if (Opcode < changeAddrMode_io_absTable[mid][0])
28353
853
      end = mid;
28354
17.7k
    else
28355
17.7k
      start = mid + 1;
28356
18.6k
  }
28357
3.10k
  if (start == end)
28358
3.06k
    return -1; // Instruction doesn't exist in this table.
28359
28360
40
  return changeAddrMode_io_absTable[mid][1];
28361
3.10k
}
28362
28363
// changeAddrMode_io_pi
28364
LLVM_READONLY
28365
0
int changeAddrMode_io_pi(uint16_t Opcode) {
28366
0
static const uint16_t changeAddrMode_io_piTable[][2] = {
28367
0
  { Hexagon::L2_loadrb_io, Hexagon::L2_loadrb_pi },
28368
0
  { Hexagon::L2_loadrd_io, Hexagon::L2_loadrd_pi },
28369
0
  { Hexagon::L2_loadrh_io, Hexagon::L2_loadrh_pi },
28370
0
  { Hexagon::L2_loadri_io, Hexagon::L2_loadri_pi },
28371
0
  { Hexagon::L2_loadrub_io, Hexagon::L2_loadrub_pi },
28372
0
  { Hexagon::L2_loadruh_io, Hexagon::L2_loadruh_pi },
28373
0
  { Hexagon::S2_storerb_io, Hexagon::S2_storerb_pi },
28374
0
  { Hexagon::S2_storerd_io, Hexagon::S2_storerd_pi },
28375
0
  { Hexagon::S2_storerf_io, Hexagon::S2_storerf_pi },
28376
0
  { Hexagon::S2_storerh_io, Hexagon::S2_storerh_pi },
28377
0
  { Hexagon::S2_storeri_io, Hexagon::S2_storeri_pi },
28378
0
  { Hexagon::V6_vL32Ub_ai, Hexagon::V6_vL32Ub_pi },
28379
0
  { Hexagon::V6_vL32b_ai, Hexagon::V6_vL32b_pi },
28380
0
  { Hexagon::V6_vL32b_cur_ai, Hexagon::V6_vL32b_cur_pi },
28381
0
  { Hexagon::V6_vL32b_nt_ai, Hexagon::V6_vL32b_nt_pi },
28382
0
  { Hexagon::V6_vL32b_nt_cur_ai, Hexagon::V6_vL32b_nt_cur_pi },
28383
0
  { Hexagon::V6_vL32b_nt_tmp_ai, Hexagon::V6_vL32b_nt_tmp_pi },
28384
0
  { Hexagon::V6_vL32b_tmp_ai, Hexagon::V6_vL32b_tmp_pi },
28385
0
  { Hexagon::V6_vS32Ub_ai, Hexagon::V6_vS32Ub_pi },
28386
0
  { Hexagon::V6_vS32b_ai, Hexagon::V6_vS32b_pi },
28387
0
  { Hexagon::V6_vS32b_new_ai, Hexagon::V6_vS32b_new_pi },
28388
0
  { Hexagon::V6_vS32b_nt_ai, Hexagon::V6_vS32b_nt_pi },
28389
0
  { Hexagon::V6_vS32b_nt_new_ai, Hexagon::V6_vS32b_nt_new_pi },
28390
0
  { Hexagon::V6_zLd_ai, Hexagon::V6_zLd_pi },
28391
0
}; // End of changeAddrMode_io_piTable
28392
28393
0
  unsigned mid;
28394
0
  unsigned start = 0;
28395
0
  unsigned end = 24;
28396
0
  while (start < end) {
28397
0
    mid = start + (end - start) / 2;
28398
0
    if (Opcode == changeAddrMode_io_piTable[mid][0]) {
28399
0
      break;
28400
0
    }
28401
0
    if (Opcode < changeAddrMode_io_piTable[mid][0])
28402
0
      end = mid;
28403
0
    else
28404
0
      start = mid + 1;
28405
0
  }
28406
0
  if (start == end)
28407
0
    return -1; // Instruction doesn't exist in this table.
28408
28409
0
  return changeAddrMode_io_piTable[mid][1];
28410
0
}
28411
28412
// changeAddrMode_io_rr
28413
LLVM_READONLY
28414
2
int changeAddrMode_io_rr(uint16_t Opcode) {
28415
2
static const uint16_t changeAddrMode_io_rrTable[][2] = {
28416
2
  { Hexagon::L2_loadrb_io, Hexagon::L4_loadrb_rr },
28417
2
  { Hexagon::L2_loadrd_io, Hexagon::L4_loadrd_rr },
28418
2
  { Hexagon::L2_loadrh_io, Hexagon::L4_loadrh_rr },
28419
2
  { Hexagon::L2_loadri_io, Hexagon::L4_loadri_rr },
28420
2
  { Hexagon::L2_loadrub_io, Hexagon::L4_loadrub_rr },
28421
2
  { Hexagon::L2_loadruh_io, Hexagon::L4_loadruh_rr },
28422
2
  { Hexagon::L2_ploadrbf_io, Hexagon::L4_ploadrbf_rr },
28423
2
  { Hexagon::L2_ploadrbfnew_io, Hexagon::L4_ploadrbfnew_rr },
28424
2
  { Hexagon::L2_ploadrbt_io, Hexagon::L4_ploadrbt_rr },
28425
2
  { Hexagon::L2_ploadrbtnew_io, Hexagon::L4_ploadrbtnew_rr },
28426
2
  { Hexagon::L2_ploadrdf_io, Hexagon::L4_ploadrdf_rr },
28427
2
  { Hexagon::L2_ploadrdfnew_io, Hexagon::L4_ploadrdfnew_rr },
28428
2
  { Hexagon::L2_ploadrdt_io, Hexagon::L4_ploadrdt_rr },
28429
2
  { Hexagon::L2_ploadrdtnew_io, Hexagon::L4_ploadrdtnew_rr },
28430
2
  { Hexagon::L2_ploadrhf_io, Hexagon::L4_ploadrhf_rr },
28431
2
  { Hexagon::L2_ploadrhfnew_io, Hexagon::L4_ploadrhfnew_rr },
28432
2
  { Hexagon::L2_ploadrht_io, Hexagon::L4_ploadrht_rr },
28433
2
  { Hexagon::L2_ploadrhtnew_io, Hexagon::L4_ploadrhtnew_rr },
28434
2
  { Hexagon::L2_ploadrif_io, Hexagon::L4_ploadrif_rr },
28435
2
  { Hexagon::L2_ploadrifnew_io, Hexagon::L4_ploadrifnew_rr },
28436
2
  { Hexagon::L2_ploadrit_io, Hexagon::L4_ploadrit_rr },
28437
2
  { Hexagon::L2_ploadritnew_io, Hexagon::L4_ploadritnew_rr },
28438
2
  { Hexagon::L2_ploadrubf_io, Hexagon::L4_ploadrubf_rr },
28439
2
  { Hexagon::L2_ploadrubfnew_io, Hexagon::L4_ploadrubfnew_rr },
28440
2
  { Hexagon::L2_ploadrubt_io, Hexagon::L4_ploadrubt_rr },
28441
2
  { Hexagon::L2_ploadrubtnew_io, Hexagon::L4_ploadrubtnew_rr },
28442
2
  { Hexagon::L2_ploadruhf_io, Hexagon::L4_ploadruhf_rr },
28443
2
  { Hexagon::L2_ploadruhfnew_io, Hexagon::L4_ploadruhfnew_rr },
28444
2
  { Hexagon::L2_ploadruht_io, Hexagon::L4_ploadruht_rr },
28445
2
  { Hexagon::L2_ploadruhtnew_io, Hexagon::L4_ploadruhtnew_rr },
28446
2
  { Hexagon::S2_pstorerbf_io, Hexagon::S4_pstorerbf_rr },
28447
2
  { Hexagon::S2_pstorerbnewf_io, Hexagon::S4_pstorerbnewf_rr },
28448
2
  { Hexagon::S2_pstorerbnewt_io, Hexagon::S4_pstorerbnewt_rr },
28449
2
  { Hexagon::S2_pstorerbt_io, Hexagon::S4_pstorerbt_rr },
28450
2
  { Hexagon::S2_pstorerdf_io, Hexagon::S4_pstorerdf_rr },
28451
2
  { Hexagon::S2_pstorerdt_io, Hexagon::S4_pstorerdt_rr },
28452
2
  { Hexagon::S2_pstorerff_io, Hexagon::S4_pstorerff_rr },
28453
2
  { Hexagon::S2_pstorerft_io, Hexagon::S4_pstorerft_rr },
28454
2
  { Hexagon::S2_pstorerhf_io, Hexagon::S4_pstorerhf_rr },
28455
2
  { Hexagon::S2_pstorerhnewf_io, Hexagon::S4_pstorerhnewf_rr },
28456
2
  { Hexagon::S2_pstorerhnewt_io, Hexagon::S4_pstorerhnewt_rr },
28457
2
  { Hexagon::S2_pstorerht_io, Hexagon::S4_pstorerht_rr },
28458
2
  { Hexagon::S2_pstorerif_io, Hexagon::S4_pstorerif_rr },
28459
2
  { Hexagon::S2_pstorerinewf_io, Hexagon::S4_pstorerinewf_rr },
28460
2
  { Hexagon::S2_pstorerinewt_io, Hexagon::S4_pstorerinewt_rr },
28461
2
  { Hexagon::S2_pstorerit_io, Hexagon::S4_pstorerit_rr },
28462
2
  { Hexagon::S2_storerb_io, Hexagon::S4_storerb_rr },
28463
2
  { Hexagon::S2_storerbnew_io, Hexagon::S4_storerbnew_rr },
28464
2
  { Hexagon::S2_storerd_io, Hexagon::S4_storerd_rr },
28465
2
  { Hexagon::S2_storerf_io, Hexagon::S4_storerf_rr },
28466
2
  { Hexagon::S2_storerh_io, Hexagon::S4_storerh_rr },
28467
2
  { Hexagon::S2_storerhnew_io, Hexagon::S4_storerhnew_rr },
28468
2
  { Hexagon::S2_storeri_io, Hexagon::S4_storeri_rr },
28469
2
  { Hexagon::S2_storerinew_io, Hexagon::S4_storerinew_rr },
28470
2
  { Hexagon::S4_pstorerbfnew_io, Hexagon::S4_pstorerbfnew_rr },
28471
2
  { Hexagon::S4_pstorerbnewfnew_io, Hexagon::S4_pstorerbnewfnew_rr },
28472
2
  { Hexagon::S4_pstorerbnewtnew_io, Hexagon::S4_pstorerbnewtnew_rr },
28473
2
  { Hexagon::S4_pstorerbtnew_io, Hexagon::S4_pstorerbtnew_rr },
28474
2
  { Hexagon::S4_pstorerdfnew_io, Hexagon::S4_pstorerdfnew_rr },
28475
2
  { Hexagon::S4_pstorerdtnew_io, Hexagon::S4_pstorerdtnew_rr },
28476
2
  { Hexagon::S4_pstorerffnew_io, Hexagon::S4_pstorerffnew_rr },
28477
2
  { Hexagon::S4_pstorerftnew_io, Hexagon::S4_pstorerftnew_rr },
28478
2
  { Hexagon::S4_pstorerhfnew_io, Hexagon::S4_pstorerhfnew_rr },
28479
2
  { Hexagon::S4_pstorerhnewfnew_io, Hexagon::S4_pstorerhnewfnew_rr },
28480
2
  { Hexagon::S4_pstorerhnewtnew_io, Hexagon::S4_pstorerhnewtnew_rr },
28481
2
  { Hexagon::S4_pstorerhtnew_io, Hexagon::S4_pstorerhtnew_rr },
28482
2
  { Hexagon::S4_pstorerifnew_io, Hexagon::S4_pstorerifnew_rr },
28483
2
  { Hexagon::S4_pstorerinewfnew_io, Hexagon::S4_pstorerinewfnew_rr },
28484
2
  { Hexagon::S4_pstorerinewtnew_io, Hexagon::S4_pstorerinewtnew_rr },
28485
2
  { Hexagon::S4_pstoreritnew_io, Hexagon::S4_pstoreritnew_rr },
28486
2
}; // End of changeAddrMode_io_rrTable
28487
28488
2
  unsigned mid;
28489
2
  unsigned start = 0;
28490
2
  unsigned end = 70;
28491
8
  while (start < end) {
28492
8
    mid = start + (end - start) / 2;
28493
8
    if (Opcode == changeAddrMode_io_rrTable[mid][0]) {
28494
2
      break;
28495
2
    }
28496
6
    if (Opcode < changeAddrMode_io_rrTable[mid][0])
28497
6
      end = mid;
28498
0
    else
28499
0
      start = mid + 1;
28500
6
  }
28501
2
  if (start == end)
28502
0
    return -1; // Instruction doesn't exist in this table.
28503
28504
2
  return changeAddrMode_io_rrTable[mid][1];
28505
2
}
28506
28507
// changeAddrMode_pi_io
28508
LLVM_READONLY
28509
0
int changeAddrMode_pi_io(uint16_t Opcode) {
28510
0
static const uint16_t changeAddrMode_pi_ioTable[][2] = {
28511
0
  { Hexagon::L2_loadrb_pi, Hexagon::L2_loadrb_io },
28512
0
  { Hexagon::L2_loadrd_pi, Hexagon::L2_loadrd_io },
28513
0
  { Hexagon::L2_loadrh_pi, Hexagon::L2_loadrh_io },
28514
0
  { Hexagon::L2_loadri_pi, Hexagon::L2_loadri_io },
28515
0
  { Hexagon::L2_loadrub_pi, Hexagon::L2_loadrub_io },
28516
0
  { Hexagon::L2_loadruh_pi, Hexagon::L2_loadruh_io },
28517
0
  { Hexagon::S2_storerb_pi, Hexagon::S2_storerb_io },
28518
0
  { Hexagon::S2_storerd_pi, Hexagon::S2_storerd_io },
28519
0
  { Hexagon::S2_storerf_pi, Hexagon::S2_storerf_io },
28520
0
  { Hexagon::S2_storerh_pi, Hexagon::S2_storerh_io },
28521
0
  { Hexagon::S2_storeri_pi, Hexagon::S2_storeri_io },
28522
0
  { Hexagon::V6_vL32Ub_pi, Hexagon::V6_vL32Ub_ai },
28523
0
  { Hexagon::V6_vL32b_cur_pi, Hexagon::V6_vL32b_cur_ai },
28524
0
  { Hexagon::V6_vL32b_nt_cur_pi, Hexagon::V6_vL32b_nt_cur_ai },
28525
0
  { Hexagon::V6_vL32b_nt_pi, Hexagon::V6_vL32b_nt_ai },
28526
0
  { Hexagon::V6_vL32b_nt_tmp_pi, Hexagon::V6_vL32b_nt_tmp_ai },
28527
0
  { Hexagon::V6_vL32b_pi, Hexagon::V6_vL32b_ai },
28528
0
  { Hexagon::V6_vL32b_tmp_pi, Hexagon::V6_vL32b_tmp_ai },
28529
0
  { Hexagon::V6_vS32Ub_pi, Hexagon::V6_vS32Ub_ai },
28530
0
  { Hexagon::V6_vS32b_new_pi, Hexagon::V6_vS32b_new_ai },
28531
0
  { Hexagon::V6_vS32b_nt_new_pi, Hexagon::V6_vS32b_nt_new_ai },
28532
0
  { Hexagon::V6_vS32b_nt_pi, Hexagon::V6_vS32b_nt_ai },
28533
0
  { Hexagon::V6_vS32b_pi, Hexagon::V6_vS32b_ai },
28534
0
  { Hexagon::V6_zLd_pi, Hexagon::V6_zLd_ai },
28535
0
}; // End of changeAddrMode_pi_ioTable
28536
28537
0
  unsigned mid;
28538
0
  unsigned start = 0;
28539
0
  unsigned end = 24;
28540
0
  while (start < end) {
28541
0
    mid = start + (end - start) / 2;
28542
0
    if (Opcode == changeAddrMode_pi_ioTable[mid][0]) {
28543
0
      break;
28544
0
    }
28545
0
    if (Opcode < changeAddrMode_pi_ioTable[mid][0])
28546
0
      end = mid;
28547
0
    else
28548
0
      start = mid + 1;
28549
0
  }
28550
0
  if (start == end)
28551
0
    return -1; // Instruction doesn't exist in this table.
28552
28553
0
  return changeAddrMode_pi_ioTable[mid][1];
28554
0
}
28555
28556
// changeAddrMode_rr_io
28557
LLVM_READONLY
28558
0
int changeAddrMode_rr_io(uint16_t Opcode) {
28559
0
static const uint16_t changeAddrMode_rr_ioTable[][2] = {
28560
0
  { Hexagon::L4_loadrb_rr, Hexagon::L2_loadrb_io },
28561
0
  { Hexagon::L4_loadrd_rr, Hexagon::L2_loadrd_io },
28562
0
  { Hexagon::L4_loadrh_rr, Hexagon::L2_loadrh_io },
28563
0
  { Hexagon::L4_loadri_rr, Hexagon::L2_loadri_io },
28564
0
  { Hexagon::L4_loadrub_rr, Hexagon::L2_loadrub_io },
28565
0
  { Hexagon::L4_loadruh_rr, Hexagon::L2_loadruh_io },
28566
0
  { Hexagon::L4_ploadrbf_rr, Hexagon::L2_ploadrbf_io },
28567
0
  { Hexagon::L4_ploadrbfnew_rr, Hexagon::L2_ploadrbfnew_io },
28568
0
  { Hexagon::L4_ploadrbt_rr, Hexagon::L2_ploadrbt_io },
28569
0
  { Hexagon::L4_ploadrbtnew_rr, Hexagon::L2_ploadrbtnew_io },
28570
0
  { Hexagon::L4_ploadrdf_rr, Hexagon::L2_ploadrdf_io },
28571
0
  { Hexagon::L4_ploadrdfnew_rr, Hexagon::L2_ploadrdfnew_io },
28572
0
  { Hexagon::L4_ploadrdt_rr, Hexagon::L2_ploadrdt_io },
28573
0
  { Hexagon::L4_ploadrdtnew_rr, Hexagon::L2_ploadrdtnew_io },
28574
0
  { Hexagon::L4_ploadrhf_rr, Hexagon::L2_ploadrhf_io },
28575
0
  { Hexagon::L4_ploadrhfnew_rr, Hexagon::L2_ploadrhfnew_io },
28576
0
  { Hexagon::L4_ploadrht_rr, Hexagon::L2_ploadrht_io },
28577
0
  { Hexagon::L4_ploadrhtnew_rr, Hexagon::L2_ploadrhtnew_io },
28578
0
  { Hexagon::L4_ploadrif_rr, Hexagon::L2_ploadrif_io },
28579
0
  { Hexagon::L4_ploadrifnew_rr, Hexagon::L2_ploadrifnew_io },
28580
0
  { Hexagon::L4_ploadrit_rr, Hexagon::L2_ploadrit_io },
28581
0
  { Hexagon::L4_ploadritnew_rr, Hexagon::L2_ploadritnew_io },
28582
0
  { Hexagon::L4_ploadrubf_rr, Hexagon::L2_ploadrubf_io },
28583
0
  { Hexagon::L4_ploadrubfnew_rr, Hexagon::L2_ploadrubfnew_io },
28584
0
  { Hexagon::L4_ploadrubt_rr, Hexagon::L2_ploadrubt_io },
28585
0
  { Hexagon::L4_ploadrubtnew_rr, Hexagon::L2_ploadrubtnew_io },
28586
0
  { Hexagon::L4_ploadruhf_rr, Hexagon::L2_ploadruhf_io },
28587
0
  { Hexagon::L4_ploadruhfnew_rr, Hexagon::L2_ploadruhfnew_io },
28588
0
  { Hexagon::L4_ploadruht_rr, Hexagon::L2_ploadruht_io },
28589
0
  { Hexagon::L4_ploadruhtnew_rr, Hexagon::L2_ploadruhtnew_io },
28590
0
  { Hexagon::S4_pstorerbf_rr, Hexagon::S2_pstorerbf_io },
28591
0
  { Hexagon::S4_pstorerbfnew_rr, Hexagon::S4_pstorerbfnew_io },
28592
0
  { Hexagon::S4_pstorerbnewf_rr, Hexagon::S2_pstorerbnewf_io },
28593
0
  { Hexagon::S4_pstorerbnewfnew_rr, Hexagon::S4_pstorerbnewfnew_io },
28594
0
  { Hexagon::S4_pstorerbnewt_rr, Hexagon::S2_pstorerbnewt_io },
28595
0
  { Hexagon::S4_pstorerbnewtnew_rr, Hexagon::S4_pstorerbnewtnew_io },
28596
0
  { Hexagon::S4_pstorerbt_rr, Hexagon::S2_pstorerbt_io },
28597
0
  { Hexagon::S4_pstorerbtnew_rr, Hexagon::S4_pstorerbtnew_io },
28598
0
  { Hexagon::S4_pstorerdf_rr, Hexagon::S2_pstorerdf_io },
28599
0
  { Hexagon::S4_pstorerdfnew_rr, Hexagon::S4_pstorerdfnew_io },
28600
0
  { Hexagon::S4_pstorerdt_rr, Hexagon::S2_pstorerdt_io },
28601
0
  { Hexagon::S4_pstorerdtnew_rr, Hexagon::S4_pstorerdtnew_io },
28602
0
  { Hexagon::S4_pstorerff_rr, Hexagon::S2_pstorerff_io },
28603
0
  { Hexagon::S4_pstorerffnew_rr, Hexagon::S4_pstorerffnew_io },
28604
0
  { Hexagon::S4_pstorerft_rr, Hexagon::S2_pstorerft_io },
28605
0
  { Hexagon::S4_pstorerftnew_rr, Hexagon::S4_pstorerftnew_io },
28606
0
  { Hexagon::S4_pstorerhf_rr, Hexagon::S2_pstorerhf_io },
28607
0
  { Hexagon::S4_pstorerhfnew_rr, Hexagon::S4_pstorerhfnew_io },
28608
0
  { Hexagon::S4_pstorerhnewf_rr, Hexagon::S2_pstorerhnewf_io },
28609
0
  { Hexagon::S4_pstorerhnewfnew_rr, Hexagon::S4_pstorerhnewfnew_io },
28610
0
  { Hexagon::S4_pstorerhnewt_rr, Hexagon::S2_pstorerhnewt_io },
28611
0
  { Hexagon::S4_pstorerhnewtnew_rr, Hexagon::S4_pstorerhnewtnew_io },
28612
0
  { Hexagon::S4_pstorerht_rr, Hexagon::S2_pstorerht_io },
28613
0
  { Hexagon::S4_pstorerhtnew_rr, Hexagon::S4_pstorerhtnew_io },
28614
0
  { Hexagon::S4_pstorerif_rr, Hexagon::S2_pstorerif_io },
28615
0
  { Hexagon::S4_pstorerifnew_rr, Hexagon::S4_pstorerifnew_io },
28616
0
  { Hexagon::S4_pstorerinewf_rr, Hexagon::S2_pstorerinewf_io },
28617
0
  { Hexagon::S4_pstorerinewfnew_rr, Hexagon::S4_pstorerinewfnew_io },
28618
0
  { Hexagon::S4_pstorerinewt_rr, Hexagon::S2_pstorerinewt_io },
28619
0
  { Hexagon::S4_pstorerinewtnew_rr, Hexagon::S4_pstorerinewtnew_io },
28620
0
  { Hexagon::S4_pstorerit_rr, Hexagon::S2_pstorerit_io },
28621
0
  { Hexagon::S4_pstoreritnew_rr, Hexagon::S4_pstoreritnew_io },
28622
0
  { Hexagon::S4_storerb_rr, Hexagon::S2_storerb_io },
28623
0
  { Hexagon::S4_storerbnew_rr, Hexagon::S2_storerbnew_io },
28624
0
  { Hexagon::S4_storerd_rr, Hexagon::S2_storerd_io },
28625
0
  { Hexagon::S4_storerf_rr, Hexagon::S2_storerf_io },
28626
0
  { Hexagon::S4_storerh_rr, Hexagon::S2_storerh_io },
28627
0
  { Hexagon::S4_storerhnew_rr, Hexagon::S2_storerhnew_io },
28628
0
  { Hexagon::S4_storeri_rr, Hexagon::S2_storeri_io },
28629
0
  { Hexagon::S4_storerinew_rr, Hexagon::S2_storerinew_io },
28630
0
}; // End of changeAddrMode_rr_ioTable
28631
28632
0
  unsigned mid;
28633
0
  unsigned start = 0;
28634
0
  unsigned end = 70;
28635
0
  while (start < end) {
28636
0
    mid = start + (end - start) / 2;
28637
0
    if (Opcode == changeAddrMode_rr_ioTable[mid][0]) {
28638
0
      break;
28639
0
    }
28640
0
    if (Opcode < changeAddrMode_rr_ioTable[mid][0])
28641
0
      end = mid;
28642
0
    else
28643
0
      start = mid + 1;
28644
0
  }
28645
0
  if (start == end)
28646
0
    return -1; // Instruction doesn't exist in this table.
28647
28648
0
  return changeAddrMode_rr_ioTable[mid][1];
28649
0
}
28650
28651
// changeAddrMode_rr_ur
28652
LLVM_READONLY
28653
0
int changeAddrMode_rr_ur(uint16_t Opcode) {
28654
0
static const uint16_t changeAddrMode_rr_urTable[][2] = {
28655
0
  { Hexagon::L4_loadrb_rr, Hexagon::L4_loadrb_ur },
28656
0
  { Hexagon::L4_loadrd_rr, Hexagon::L4_loadrd_ur },
28657
0
  { Hexagon::L4_loadrh_rr, Hexagon::L4_loadrh_ur },
28658
0
  { Hexagon::L4_loadri_rr, Hexagon::L4_loadri_ur },
28659
0
  { Hexagon::L4_loadrub_rr, Hexagon::L4_loadrub_ur },
28660
0
  { Hexagon::L4_loadruh_rr, Hexagon::L4_loadruh_ur },
28661
0
  { Hexagon::S4_storerb_rr, Hexagon::S4_storerb_ur },
28662
0
  { Hexagon::S4_storerd_rr, Hexagon::S4_storerd_ur },
28663
0
  { Hexagon::S4_storerf_rr, Hexagon::S4_storerf_ur },
28664
0
  { Hexagon::S4_storerh_rr, Hexagon::S4_storerh_ur },
28665
0
  { Hexagon::S4_storeri_rr, Hexagon::S4_storeri_ur },
28666
0
}; // End of changeAddrMode_rr_urTable
28667
28668
0
  unsigned mid;
28669
0
  unsigned start = 0;
28670
0
  unsigned end = 11;
28671
0
  while (start < end) {
28672
0
    mid = start + (end - start) / 2;
28673
0
    if (Opcode == changeAddrMode_rr_urTable[mid][0]) {
28674
0
      break;
28675
0
    }
28676
0
    if (Opcode < changeAddrMode_rr_urTable[mid][0])
28677
0
      end = mid;
28678
0
    else
28679
0
      start = mid + 1;
28680
0
  }
28681
0
  if (start == end)
28682
0
    return -1; // Instruction doesn't exist in this table.
28683
28684
0
  return changeAddrMode_rr_urTable[mid][1];
28685
0
}
28686
28687
// changeAddrMode_ur_rr
28688
LLVM_READONLY
28689
0
int changeAddrMode_ur_rr(uint16_t Opcode) {
28690
0
static const uint16_t changeAddrMode_ur_rrTable[][2] = {
28691
0
  { Hexagon::L4_loadrb_ur, Hexagon::L4_loadrb_rr },
28692
0
  { Hexagon::L4_loadrd_ur, Hexagon::L4_loadrd_rr },
28693
0
  { Hexagon::L4_loadrh_ur, Hexagon::L4_loadrh_rr },
28694
0
  { Hexagon::L4_loadri_ur, Hexagon::L4_loadri_rr },
28695
0
  { Hexagon::L4_loadrub_ur, Hexagon::L4_loadrub_rr },
28696
0
  { Hexagon::L4_loadruh_ur, Hexagon::L4_loadruh_rr },
28697
0
  { Hexagon::S4_storerb_ur, Hexagon::S4_storerb_rr },
28698
0
  { Hexagon::S4_storerd_ur, Hexagon::S4_storerd_rr },
28699
0
  { Hexagon::S4_storerf_ur, Hexagon::S4_storerf_rr },
28700
0
  { Hexagon::S4_storerh_ur, Hexagon::S4_storerh_rr },
28701
0
  { Hexagon::S4_storeri_ur, Hexagon::S4_storeri_rr },
28702
0
}; // End of changeAddrMode_ur_rrTable
28703
28704
0
  unsigned mid;
28705
0
  unsigned start = 0;
28706
0
  unsigned end = 11;
28707
0
  while (start < end) {
28708
0
    mid = start + (end - start) / 2;
28709
0
    if (Opcode == changeAddrMode_ur_rrTable[mid][0]) {
28710
0
      break;
28711
0
    }
28712
0
    if (Opcode < changeAddrMode_ur_rrTable[mid][0])
28713
0
      end = mid;
28714
0
    else
28715
0
      start = mid + 1;
28716
0
  }
28717
0
  if (start == end)
28718
0
    return -1; // Instruction doesn't exist in this table.
28719
28720
0
  return changeAddrMode_ur_rrTable[mid][1];
28721
0
}
28722
28723
// getFalsePredOpcode
28724
LLVM_READONLY
28725
1.41k
int getFalsePredOpcode(uint16_t Opcode) {
28726
1.41k
static const uint16_t getFalsePredOpcodeTable[][2] = {
28727
1.41k
  { Hexagon::A2_tfrpt, Hexagon::A2_tfrpf },
28728
1.41k
  { Hexagon::A2_tfrptnew, Hexagon::A2_tfrpfnew },
28729
1.41k
  { Hexagon::A2_tfrt, Hexagon::A2_tfrf },
28730
1.41k
  { Hexagon::A2_tfrtnew, Hexagon::A2_tfrfnew },
28731
1.41k
  { Hexagon::A2_paddit, Hexagon::A2_paddif },
28732
1.41k
  { Hexagon::A2_padditnew, Hexagon::A2_paddifnew },
28733
1.41k
  { Hexagon::A2_paddt, Hexagon::A2_paddf },
28734
1.41k
  { Hexagon::A2_paddtnew, Hexagon::A2_paddfnew },
28735
1.41k
  { Hexagon::A2_pandt, Hexagon::A2_pandf },
28736
1.41k
  { Hexagon::A2_pandtnew, Hexagon::A2_pandfnew },
28737
1.41k
  { Hexagon::A2_port, Hexagon::A2_porf },
28738
1.41k
  { Hexagon::A2_portnew, Hexagon::A2_porfnew },
28739
1.41k
  { Hexagon::A2_psubt, Hexagon::A2_psubf },
28740
1.41k
  { Hexagon::A2_psubtnew, Hexagon::A2_psubfnew },
28741
1.41k
  { Hexagon::A2_pxort, Hexagon::A2_pxorf },
28742
1.41k
  { Hexagon::A2_pxortnew, Hexagon::A2_pxorfnew },
28743
1.41k
  { Hexagon::A4_paslht, Hexagon::A4_paslhf },
28744
1.41k
  { Hexagon::A4_paslhtnew, Hexagon::A4_paslhfnew },
28745
1.41k
  { Hexagon::A4_pasrht, Hexagon::A4_pasrhf },
28746
1.41k
  { Hexagon::A4_pasrhtnew, Hexagon::A4_pasrhfnew },
28747
1.41k
  { Hexagon::A4_psxtbt, Hexagon::A4_psxtbf },
28748
1.41k
  { Hexagon::A4_psxtbtnew, Hexagon::A4_psxtbfnew },
28749
1.41k
  { Hexagon::A4_psxtht, Hexagon::A4_psxthf },
28750
1.41k
  { Hexagon::A4_psxthtnew, Hexagon::A4_psxthfnew },
28751
1.41k
  { Hexagon::A4_pzxtbt, Hexagon::A4_pzxtbf },
28752
1.41k
  { Hexagon::A4_pzxtbtnew, Hexagon::A4_pzxtbfnew },
28753
1.41k
  { Hexagon::A4_pzxtht, Hexagon::A4_pzxthf },
28754
1.41k
  { Hexagon::A4_pzxthtnew, Hexagon::A4_pzxthfnew },
28755
1.41k
  { Hexagon::C2_ccombinewnewt, Hexagon::C2_ccombinewnewf },
28756
1.41k
  { Hexagon::C2_ccombinewt, Hexagon::C2_ccombinewf },
28757
1.41k
  { Hexagon::C2_cmoveit, Hexagon::C2_cmoveif },
28758
1.41k
  { Hexagon::C2_cmovenewit, Hexagon::C2_cmovenewif },
28759
1.41k
  { Hexagon::J2_callt, Hexagon::J2_callf },
28760
1.41k
  { Hexagon::J2_jumprt, Hexagon::J2_jumprf },
28761
1.41k
  { Hexagon::J2_jumprtnew, Hexagon::J2_jumprfnew },
28762
1.41k
  { Hexagon::J2_jumprtnewpt, Hexagon::J2_jumprfnewpt },
28763
1.41k
  { Hexagon::J2_jumprtpt, Hexagon::J2_jumprfpt },
28764
1.41k
  { Hexagon::J2_jumpt, Hexagon::J2_jumpf },
28765
1.41k
  { Hexagon::J2_jumptnew, Hexagon::J2_jumpfnew },
28766
1.41k
  { Hexagon::J2_jumptnewpt, Hexagon::J2_jumpfnewpt },
28767
1.41k
  { Hexagon::J2_jumptpt, Hexagon::J2_jumpfpt },
28768
1.41k
  { Hexagon::J4_cmpeq_t_jumpnv_nt, Hexagon::J4_cmpeq_f_jumpnv_nt },
28769
1.41k
  { Hexagon::J4_cmpeq_t_jumpnv_t, Hexagon::J4_cmpeq_f_jumpnv_t },
28770
1.41k
  { Hexagon::J4_cmpeq_tp0_jump_nt, Hexagon::J4_cmpeq_fp0_jump_nt },
28771
1.41k
  { Hexagon::J4_cmpeq_tp0_jump_t, Hexagon::J4_cmpeq_fp0_jump_t },
28772
1.41k
  { Hexagon::J4_cmpeq_tp1_jump_nt, Hexagon::J4_cmpeq_fp1_jump_nt },
28773
1.41k
  { Hexagon::J4_cmpeq_tp1_jump_t, Hexagon::J4_cmpeq_fp1_jump_t },
28774
1.41k
  { Hexagon::J4_cmpeqi_t_jumpnv_nt, Hexagon::J4_cmpeqi_f_jumpnv_nt },
28775
1.41k
  { Hexagon::J4_cmpeqi_t_jumpnv_t, Hexagon::J4_cmpeqi_f_jumpnv_t },
28776
1.41k
  { Hexagon::J4_cmpeqi_tp0_jump_nt, Hexagon::J4_cmpeqi_fp0_jump_nt },
28777
1.41k
  { Hexagon::J4_cmpeqi_tp0_jump_t, Hexagon::J4_cmpeqi_fp0_jump_t },
28778
1.41k
  { Hexagon::J4_cmpeqi_tp1_jump_nt, Hexagon::J4_cmpeqi_fp1_jump_nt },
28779
1.41k
  { Hexagon::J4_cmpeqi_tp1_jump_t, Hexagon::J4_cmpeqi_fp1_jump_t },
28780
1.41k
  { Hexagon::J4_cmpeqn1_t_jumpnv_nt, Hexagon::J4_cmpeqn1_f_jumpnv_nt },
28781
1.41k
  { Hexagon::J4_cmpeqn1_t_jumpnv_t, Hexagon::J4_cmpeqn1_f_jumpnv_t },
28782
1.41k
  { Hexagon::J4_cmpeqn1_tp0_jump_nt, Hexagon::J4_cmpeqn1_fp0_jump_nt },
28783
1.41k
  { Hexagon::J4_cmpeqn1_tp0_jump_t, Hexagon::J4_cmpeqn1_fp0_jump_t },
28784
1.41k
  { Hexagon::J4_cmpeqn1_tp1_jump_nt, Hexagon::J4_cmpeqn1_fp1_jump_nt },
28785
1.41k
  { Hexagon::J4_cmpeqn1_tp1_jump_t, Hexagon::J4_cmpeqn1_fp1_jump_t },
28786
1.41k
  { Hexagon::J4_cmpgt_t_jumpnv_nt, Hexagon::J4_cmpgt_f_jumpnv_nt },
28787
1.41k
  { Hexagon::J4_cmpgt_t_jumpnv_t, Hexagon::J4_cmpgt_f_jumpnv_t },
28788
1.41k
  { Hexagon::J4_cmpgt_tp0_jump_nt, Hexagon::J4_cmpgt_fp0_jump_nt },
28789
1.41k
  { Hexagon::J4_cmpgt_tp0_jump_t, Hexagon::J4_cmpgt_fp0_jump_t },
28790
1.41k
  { Hexagon::J4_cmpgt_tp1_jump_nt, Hexagon::J4_cmpgt_fp1_jump_nt },
28791
1.41k
  { Hexagon::J4_cmpgt_tp1_jump_t, Hexagon::J4_cmpgt_fp1_jump_t },
28792
1.41k
  { Hexagon::J4_cmpgti_t_jumpnv_nt, Hexagon::J4_cmpgti_f_jumpnv_nt },
28793
1.41k
  { Hexagon::J4_cmpgti_t_jumpnv_t, Hexagon::J4_cmpgti_f_jumpnv_t },
28794
1.41k
  { Hexagon::J4_cmpgti_tp0_jump_nt, Hexagon::J4_cmpgti_fp0_jump_nt },
28795
1.41k
  { Hexagon::J4_cmpgti_tp0_jump_t, Hexagon::J4_cmpgti_fp0_jump_t },
28796
1.41k
  { Hexagon::J4_cmpgti_tp1_jump_nt, Hexagon::J4_cmpgti_fp1_jump_nt },
28797
1.41k
  { Hexagon::J4_cmpgti_tp1_jump_t, Hexagon::J4_cmpgti_fp1_jump_t },
28798
1.41k
  { Hexagon::J4_cmpgtn1_t_jumpnv_nt, Hexagon::J4_cmpgtn1_f_jumpnv_nt },
28799
1.41k
  { Hexagon::J4_cmpgtn1_t_jumpnv_t, Hexagon::J4_cmpgtn1_f_jumpnv_t },
28800
1.41k
  { Hexagon::J4_cmpgtn1_tp0_jump_nt, Hexagon::J4_cmpgtn1_fp0_jump_nt },
28801
1.41k
  { Hexagon::J4_cmpgtn1_tp0_jump_t, Hexagon::J4_cmpgtn1_fp0_jump_t },
28802
1.41k
  { Hexagon::J4_cmpgtn1_tp1_jump_nt, Hexagon::J4_cmpgtn1_fp1_jump_nt },
28803
1.41k
  { Hexagon::J4_cmpgtn1_tp1_jump_t, Hexagon::J4_cmpgtn1_fp1_jump_t },
28804
1.41k
  { Hexagon::J4_cmpgtu_t_jumpnv_nt, Hexagon::J4_cmpgtu_f_jumpnv_nt },
28805
1.41k
  { Hexagon::J4_cmpgtu_t_jumpnv_t, Hexagon::J4_cmpgtu_f_jumpnv_t },
28806
1.41k
  { Hexagon::J4_cmpgtu_tp0_jump_nt, Hexagon::J4_cmpgtu_fp0_jump_nt },
28807
1.41k
  { Hexagon::J4_cmpgtu_tp0_jump_t, Hexagon::J4_cmpgtu_fp0_jump_t },
28808
1.41k
  { Hexagon::J4_cmpgtu_tp1_jump_nt, Hexagon::J4_cmpgtu_fp1_jump_nt },
28809
1.41k
  { Hexagon::J4_cmpgtu_tp1_jump_t, Hexagon::J4_cmpgtu_fp1_jump_t },
28810
1.41k
  { Hexagon::J4_cmpgtui_t_jumpnv_nt, Hexagon::J4_cmpgtui_f_jumpnv_nt },
28811
1.41k
  { Hexagon::J4_cmpgtui_t_jumpnv_t, Hexagon::J4_cmpgtui_f_jumpnv_t },
28812
1.41k
  { Hexagon::J4_cmpgtui_tp0_jump_nt, Hexagon::J4_cmpgtui_fp0_jump_nt },
28813
1.41k
  { Hexagon::J4_cmpgtui_tp0_jump_t, Hexagon::J4_cmpgtui_fp0_jump_t },
28814
1.41k
  { Hexagon::J4_cmpgtui_tp1_jump_nt, Hexagon::J4_cmpgtui_fp1_jump_nt },
28815
1.41k
  { Hexagon::J4_cmpgtui_tp1_jump_t, Hexagon::J4_cmpgtui_fp1_jump_t },
28816
1.41k
  { Hexagon::J4_cmplt_t_jumpnv_nt, Hexagon::J4_cmplt_f_jumpnv_nt },
28817
1.41k
  { Hexagon::J4_cmplt_t_jumpnv_t, Hexagon::J4_cmplt_f_jumpnv_t },
28818
1.41k
  { Hexagon::J4_cmpltu_t_jumpnv_nt, Hexagon::J4_cmpltu_f_jumpnv_nt },
28819
1.41k
  { Hexagon::J4_cmpltu_t_jumpnv_t, Hexagon::J4_cmpltu_f_jumpnv_t },
28820
1.41k
  { Hexagon::L2_ploadrbt_io, Hexagon::L2_ploadrbf_io },
28821
1.41k
  { Hexagon::L2_ploadrbt_pi, Hexagon::L2_ploadrbf_pi },
28822
1.41k
  { Hexagon::L2_ploadrbtnew_io, Hexagon::L2_ploadrbfnew_io },
28823
1.41k
  { Hexagon::L2_ploadrbtnew_pi, Hexagon::L2_ploadrbfnew_pi },
28824
1.41k
  { Hexagon::L2_ploadrdt_io, Hexagon::L2_ploadrdf_io },
28825
1.41k
  { Hexagon::L2_ploadrdt_pi, Hexagon::L2_ploadrdf_pi },
28826
1.41k
  { Hexagon::L2_ploadrdtnew_io, Hexagon::L2_ploadrdfnew_io },
28827
1.41k
  { Hexagon::L2_ploadrdtnew_pi, Hexagon::L2_ploadrdfnew_pi },
28828
1.41k
  { Hexagon::L2_ploadrht_io, Hexagon::L2_ploadrhf_io },
28829
1.41k
  { Hexagon::L2_ploadrht_pi, Hexagon::L2_ploadrhf_pi },
28830
1.41k
  { Hexagon::L2_ploadrhtnew_io, Hexagon::L2_ploadrhfnew_io },
28831
1.41k
  { Hexagon::L2_ploadrhtnew_pi, Hexagon::L2_ploadrhfnew_pi },
28832
1.41k
  { Hexagon::L2_ploadrit_io, Hexagon::L2_ploadrif_io },
28833
1.41k
  { Hexagon::L2_ploadrit_pi, Hexagon::L2_ploadrif_pi },
28834
1.41k
  { Hexagon::L2_ploadritnew_io, Hexagon::L2_ploadrifnew_io },
28835
1.41k
  { Hexagon::L2_ploadritnew_pi, Hexagon::L2_ploadrifnew_pi },
28836
1.41k
  { Hexagon::L2_ploadrubt_io, Hexagon::L2_ploadrubf_io },
28837
1.41k
  { Hexagon::L2_ploadrubt_pi, Hexagon::L2_ploadrubf_pi },
28838
1.41k
  { Hexagon::L2_ploadrubtnew_io, Hexagon::L2_ploadrubfnew_io },
28839
1.41k
  { Hexagon::L2_ploadrubtnew_pi, Hexagon::L2_ploadrubfnew_pi },
28840
1.41k
  { Hexagon::L2_ploadruht_io, Hexagon::L2_ploadruhf_io },
28841
1.41k
  { Hexagon::L2_ploadruht_pi, Hexagon::L2_ploadruhf_pi },
28842
1.41k
  { Hexagon::L2_ploadruhtnew_io, Hexagon::L2_ploadruhfnew_io },
28843
1.41k
  { Hexagon::L2_ploadruhtnew_pi, Hexagon::L2_ploadruhfnew_pi },
28844
1.41k
  { Hexagon::L4_ploadrbt_abs, Hexagon::L4_ploadrbf_abs },
28845
1.41k
  { Hexagon::L4_ploadrbt_rr, Hexagon::L4_ploadrbf_rr },
28846
1.41k
  { Hexagon::L4_ploadrbtnew_abs, Hexagon::L4_ploadrbfnew_abs },
28847
1.41k
  { Hexagon::L4_ploadrbtnew_rr, Hexagon::L4_ploadrbfnew_rr },
28848
1.41k
  { Hexagon::L4_ploadrdt_abs, Hexagon::L4_ploadrdf_abs },
28849
1.41k
  { Hexagon::L4_ploadrdt_rr, Hexagon::L4_ploadrdf_rr },
28850
1.41k
  { Hexagon::L4_ploadrdtnew_abs, Hexagon::L4_ploadrdfnew_abs },
28851
1.41k
  { Hexagon::L4_ploadrdtnew_rr, Hexagon::L4_ploadrdfnew_rr },
28852
1.41k
  { Hexagon::L4_ploadrht_abs, Hexagon::L4_ploadrhf_abs },
28853
1.41k
  { Hexagon::L4_ploadrht_rr, Hexagon::L4_ploadrhf_rr },
28854
1.41k
  { Hexagon::L4_ploadrhtnew_abs, Hexagon::L4_ploadrhfnew_abs },
28855
1.41k
  { Hexagon::L4_ploadrhtnew_rr, Hexagon::L4_ploadrhfnew_rr },
28856
1.41k
  { Hexagon::L4_ploadrit_abs, Hexagon::L4_ploadrif_abs },
28857
1.41k
  { Hexagon::L4_ploadrit_rr, Hexagon::L4_ploadrif_rr },
28858
1.41k
  { Hexagon::L4_ploadritnew_abs, Hexagon::L4_ploadrifnew_abs },
28859
1.41k
  { Hexagon::L4_ploadritnew_rr, Hexagon::L4_ploadrifnew_rr },
28860
1.41k
  { Hexagon::L4_ploadrubt_abs, Hexagon::L4_ploadrubf_abs },
28861
1.41k
  { Hexagon::L4_ploadrubt_rr, Hexagon::L4_ploadrubf_rr },
28862
1.41k
  { Hexagon::L4_ploadrubtnew_abs, Hexagon::L4_ploadrubfnew_abs },
28863
1.41k
  { Hexagon::L4_ploadrubtnew_rr, Hexagon::L4_ploadrubfnew_rr },
28864
1.41k
  { Hexagon::L4_ploadruht_abs, Hexagon::L4_ploadruhf_abs },
28865
1.41k
  { Hexagon::L4_ploadruht_rr, Hexagon::L4_ploadruhf_rr },
28866
1.41k
  { Hexagon::L4_ploadruhtnew_abs, Hexagon::L4_ploadruhfnew_abs },
28867
1.41k
  { Hexagon::L4_ploadruhtnew_rr, Hexagon::L4_ploadruhfnew_rr },
28868
1.41k
  { Hexagon::L4_return_t, Hexagon::L4_return_f },
28869
1.41k
  { Hexagon::L4_return_tnew_pnt, Hexagon::L4_return_fnew_pnt },
28870
1.41k
  { Hexagon::L4_return_tnew_pt, Hexagon::L4_return_fnew_pt },
28871
1.41k
  { Hexagon::PS_jmprett, Hexagon::PS_jmpretf },
28872
1.41k
  { Hexagon::PS_jmprettnew, Hexagon::PS_jmpretfnew },
28873
1.41k
  { Hexagon::PS_jmprettnewpt, Hexagon::PS_jmpretfnewpt },
28874
1.41k
  { Hexagon::S2_pstorerbnewt_io, Hexagon::S2_pstorerbnewf_io },
28875
1.41k
  { Hexagon::S2_pstorerbnewt_pi, Hexagon::S2_pstorerbnewf_pi },
28876
1.41k
  { Hexagon::S2_pstorerbnewtnew_pi, Hexagon::S2_pstorerbnewfnew_pi },
28877
1.41k
  { Hexagon::S2_pstorerbt_io, Hexagon::S2_pstorerbf_io },
28878
1.41k
  { Hexagon::S2_pstorerbt_pi, Hexagon::S2_pstorerbf_pi },
28879
1.41k
  { Hexagon::S2_pstorerbtnew_pi, Hexagon::S2_pstorerbfnew_pi },
28880
1.41k
  { Hexagon::S2_pstorerdt_io, Hexagon::S2_pstorerdf_io },
28881
1.41k
  { Hexagon::S2_pstorerdt_pi, Hexagon::S2_pstorerdf_pi },
28882
1.41k
  { Hexagon::S2_pstorerdtnew_pi, Hexagon::S2_pstorerdfnew_pi },
28883
1.41k
  { Hexagon::S2_pstorerft_io, Hexagon::S2_pstorerff_io },
28884
1.41k
  { Hexagon::S2_pstorerft_pi, Hexagon::S2_pstorerff_pi },
28885
1.41k
  { Hexagon::S2_pstorerftnew_pi, Hexagon::S2_pstorerffnew_pi },
28886
1.41k
  { Hexagon::S2_pstorerhnewt_io, Hexagon::S2_pstorerhnewf_io },
28887
1.41k
  { Hexagon::S2_pstorerhnewt_pi, Hexagon::S2_pstorerhnewf_pi },
28888
1.41k
  { Hexagon::S2_pstorerhnewtnew_pi, Hexagon::S2_pstorerhnewfnew_pi },
28889
1.41k
  { Hexagon::S2_pstorerht_io, Hexagon::S2_pstorerhf_io },
28890
1.41k
  { Hexagon::S2_pstorerht_pi, Hexagon::S2_pstorerhf_pi },
28891
1.41k
  { Hexagon::S2_pstorerhtnew_pi, Hexagon::S2_pstorerhfnew_pi },
28892
1.41k
  { Hexagon::S2_pstorerinewt_io, Hexagon::S2_pstorerinewf_io },
28893
1.41k
  { Hexagon::S2_pstorerinewt_pi, Hexagon::S2_pstorerinewf_pi },
28894
1.41k
  { Hexagon::S2_pstorerinewtnew_pi, Hexagon::S2_pstorerinewfnew_pi },
28895
1.41k
  { Hexagon::S2_pstorerit_io, Hexagon::S2_pstorerif_io },
28896
1.41k
  { Hexagon::S2_pstorerit_pi, Hexagon::S2_pstorerif_pi },
28897
1.41k
  { Hexagon::S2_pstoreritnew_pi, Hexagon::S2_pstorerifnew_pi },
28898
1.41k
  { Hexagon::S4_pstorerbnewt_abs, Hexagon::S4_pstorerbnewf_abs },
28899
1.41k
  { Hexagon::S4_pstorerbnewt_rr, Hexagon::S4_pstorerbnewf_rr },
28900
1.41k
  { Hexagon::S4_pstorerbnewtnew_abs, Hexagon::S4_pstorerbnewfnew_abs },
28901
1.41k
  { Hexagon::S4_pstorerbnewtnew_io, Hexagon::S4_pstorerbnewfnew_io },
28902
1.41k
  { Hexagon::S4_pstorerbnewtnew_rr, Hexagon::S4_pstorerbnewfnew_rr },
28903
1.41k
  { Hexagon::S4_pstorerbt_abs, Hexagon::S4_pstorerbf_abs },
28904
1.41k
  { Hexagon::S4_pstorerbt_rr, Hexagon::S4_pstorerbf_rr },
28905
1.41k
  { Hexagon::S4_pstorerbtnew_abs, Hexagon::S4_pstorerbfnew_abs },
28906
1.41k
  { Hexagon::S4_pstorerbtnew_io, Hexagon::S4_pstorerbfnew_io },
28907
1.41k
  { Hexagon::S4_pstorerbtnew_rr, Hexagon::S4_pstorerbfnew_rr },
28908
1.41k
  { Hexagon::S4_pstorerdt_abs, Hexagon::S4_pstorerdf_abs },
28909
1.41k
  { Hexagon::S4_pstorerdt_rr, Hexagon::S4_pstorerdf_rr },
28910
1.41k
  { Hexagon::S4_pstorerdtnew_abs, Hexagon::S4_pstorerdfnew_abs },
28911
1.41k
  { Hexagon::S4_pstorerdtnew_io, Hexagon::S4_pstorerdfnew_io },
28912
1.41k
  { Hexagon::S4_pstorerdtnew_rr, Hexagon::S4_pstorerdfnew_rr },
28913
1.41k
  { Hexagon::S4_pstorerft_abs, Hexagon::S4_pstorerff_abs },
28914
1.41k
  { Hexagon::S4_pstorerft_rr, Hexagon::S4_pstorerff_rr },
28915
1.41k
  { Hexagon::S4_pstorerftnew_abs, Hexagon::S4_pstorerffnew_abs },
28916
1.41k
  { Hexagon::S4_pstorerftnew_io, Hexagon::S4_pstorerffnew_io },
28917
1.41k
  { Hexagon::S4_pstorerftnew_rr, Hexagon::S4_pstorerffnew_rr },
28918
1.41k
  { Hexagon::S4_pstorerhnewt_abs, Hexagon::S4_pstorerhnewf_abs },
28919
1.41k
  { Hexagon::S4_pstorerhnewt_rr, Hexagon::S4_pstorerhnewf_rr },
28920
1.41k
  { Hexagon::S4_pstorerhnewtnew_abs, Hexagon::S4_pstorerhnewfnew_abs },
28921
1.41k
  { Hexagon::S4_pstorerhnewtnew_io, Hexagon::S4_pstorerhnewfnew_io },
28922
1.41k
  { Hexagon::S4_pstorerhnewtnew_rr, Hexagon::S4_pstorerhnewfnew_rr },
28923
1.41k
  { Hexagon::S4_pstorerht_abs, Hexagon::S4_pstorerhf_abs },
28924
1.41k
  { Hexagon::S4_pstorerht_rr, Hexagon::S4_pstorerhf_rr },
28925
1.41k
  { Hexagon::S4_pstorerhtnew_abs, Hexagon::S4_pstorerhfnew_abs },
28926
1.41k
  { Hexagon::S4_pstorerhtnew_io, Hexagon::S4_pstorerhfnew_io },
28927
1.41k
  { Hexagon::S4_pstorerhtnew_rr, Hexagon::S4_pstorerhfnew_rr },
28928
1.41k
  { Hexagon::S4_pstorerinewt_abs, Hexagon::S4_pstorerinewf_abs },
28929
1.41k
  { Hexagon::S4_pstorerinewt_rr, Hexagon::S4_pstorerinewf_rr },
28930
1.41k
  { Hexagon::S4_pstorerinewtnew_abs, Hexagon::S4_pstorerinewfnew_abs },
28931
1.41k
  { Hexagon::S4_pstorerinewtnew_io, Hexagon::S4_pstorerinewfnew_io },
28932
1.41k
  { Hexagon::S4_pstorerinewtnew_rr, Hexagon::S4_pstorerinewfnew_rr },
28933
1.41k
  { Hexagon::S4_pstorerit_abs, Hexagon::S4_pstorerif_abs },
28934
1.41k
  { Hexagon::S4_pstorerit_rr, Hexagon::S4_pstorerif_rr },
28935
1.41k
  { Hexagon::S4_pstoreritnew_abs, Hexagon::S4_pstorerifnew_abs },
28936
1.41k
  { Hexagon::S4_pstoreritnew_io, Hexagon::S4_pstorerifnew_io },
28937
1.41k
  { Hexagon::S4_pstoreritnew_rr, Hexagon::S4_pstorerifnew_rr },
28938
1.41k
  { Hexagon::S4_storeirbt_io, Hexagon::S4_storeirbf_io },
28939
1.41k
  { Hexagon::S4_storeirbtnew_io, Hexagon::S4_storeirbfnew_io },
28940
1.41k
  { Hexagon::S4_storeirht_io, Hexagon::S4_storeirhf_io },
28941
1.41k
  { Hexagon::S4_storeirhtnew_io, Hexagon::S4_storeirhfnew_io },
28942
1.41k
  { Hexagon::S4_storeirit_io, Hexagon::S4_storeirif_io },
28943
1.41k
  { Hexagon::S4_storeiritnew_io, Hexagon::S4_storeirifnew_io },
28944
1.41k
  { Hexagon::V6_vL32b_cur_pred_ai, Hexagon::V6_vL32b_cur_npred_ai },
28945
1.41k
  { Hexagon::V6_vL32b_cur_pred_pi, Hexagon::V6_vL32b_cur_npred_pi },
28946
1.41k
  { Hexagon::V6_vL32b_cur_pred_ppu, Hexagon::V6_vL32b_cur_npred_ppu },
28947
1.41k
  { Hexagon::V6_vL32b_nt_cur_pred_ai, Hexagon::V6_vL32b_nt_cur_npred_ai },
28948
1.41k
  { Hexagon::V6_vL32b_nt_cur_pred_pi, Hexagon::V6_vL32b_nt_cur_npred_pi },
28949
1.41k
  { Hexagon::V6_vL32b_nt_cur_pred_ppu, Hexagon::V6_vL32b_nt_cur_npred_ppu },
28950
1.41k
  { Hexagon::V6_vL32b_nt_pred_ai, Hexagon::V6_vL32b_nt_npred_ai },
28951
1.41k
  { Hexagon::V6_vL32b_nt_pred_pi, Hexagon::V6_vL32b_nt_npred_pi },
28952
1.41k
  { Hexagon::V6_vL32b_nt_pred_ppu, Hexagon::V6_vL32b_nt_npred_ppu },
28953
1.41k
  { Hexagon::V6_vL32b_nt_tmp_pred_ai, Hexagon::V6_vL32b_nt_tmp_npred_ai },
28954
1.41k
  { Hexagon::V6_vL32b_nt_tmp_pred_pi, Hexagon::V6_vL32b_nt_tmp_npred_pi },
28955
1.41k
  { Hexagon::V6_vL32b_nt_tmp_pred_ppu, Hexagon::V6_vL32b_nt_tmp_npred_ppu },
28956
1.41k
  { Hexagon::V6_vL32b_pred_ai, Hexagon::V6_vL32b_npred_ai },
28957
1.41k
  { Hexagon::V6_vL32b_pred_pi, Hexagon::V6_vL32b_npred_pi },
28958
1.41k
  { Hexagon::V6_vL32b_pred_ppu, Hexagon::V6_vL32b_npred_ppu },
28959
1.41k
  { Hexagon::V6_vL32b_tmp_pred_ai, Hexagon::V6_vL32b_tmp_npred_ai },
28960
1.41k
  { Hexagon::V6_vL32b_tmp_pred_pi, Hexagon::V6_vL32b_tmp_npred_pi },
28961
1.41k
  { Hexagon::V6_vL32b_tmp_pred_ppu, Hexagon::V6_vL32b_tmp_npred_ppu },
28962
1.41k
  { Hexagon::V6_vS32Ub_pred_ai, Hexagon::V6_vS32Ub_npred_ai },
28963
1.41k
  { Hexagon::V6_vS32Ub_pred_pi, Hexagon::V6_vS32Ub_npred_pi },
28964
1.41k
  { Hexagon::V6_vS32Ub_pred_ppu, Hexagon::V6_vS32Ub_npred_ppu },
28965
1.41k
  { Hexagon::V6_vS32b_new_pred_ai, Hexagon::V6_vS32b_new_npred_ai },
28966
1.41k
  { Hexagon::V6_vS32b_new_pred_pi, Hexagon::V6_vS32b_new_npred_pi },
28967
1.41k
  { Hexagon::V6_vS32b_new_pred_ppu, Hexagon::V6_vS32b_new_npred_ppu },
28968
1.41k
  { Hexagon::V6_vS32b_nt_new_pred_ai, Hexagon::V6_vS32b_nt_new_npred_ai },
28969
1.41k
  { Hexagon::V6_vS32b_nt_new_pred_pi, Hexagon::V6_vS32b_nt_new_npred_pi },
28970
1.41k
  { Hexagon::V6_vS32b_nt_new_pred_ppu, Hexagon::V6_vS32b_nt_new_npred_ppu },
28971
1.41k
  { Hexagon::V6_vS32b_nt_pred_ai, Hexagon::V6_vS32b_nt_npred_ai },
28972
1.41k
  { Hexagon::V6_vS32b_nt_pred_pi, Hexagon::V6_vS32b_nt_npred_pi },
28973
1.41k
  { Hexagon::V6_vS32b_nt_pred_ppu, Hexagon::V6_vS32b_nt_npred_ppu },
28974
1.41k
  { Hexagon::V6_vS32b_pred_ai, Hexagon::V6_vS32b_npred_ai },
28975
1.41k
  { Hexagon::V6_vS32b_pred_pi, Hexagon::V6_vS32b_npred_pi },
28976
1.41k
  { Hexagon::V6_vS32b_pred_ppu, Hexagon::V6_vS32b_npred_ppu },
28977
1.41k
}; // End of getFalsePredOpcodeTable
28978
28979
1.41k
  unsigned mid;
28980
1.41k
  unsigned start = 0;
28981
1.41k
  unsigned end = 250;
28982
9.89k
  while (start < end) {
28983
9.89k
    mid = start + (end - start) / 2;
28984
9.89k
    if (Opcode == getFalsePredOpcodeTable[mid][0]) {
28985
1.41k
      break;
28986
1.41k
    }
28987
8.47k
    if (Opcode < getFalsePredOpcodeTable[mid][0])
28988
5.65k
      end = mid;
28989
2.82k
    else
28990
2.82k
      start = mid + 1;
28991
8.47k
  }
28992
1.41k
  if (start == end)
28993
0
    return -1; // Instruction doesn't exist in this table.
28994
28995
1.41k
  return getFalsePredOpcodeTable[mid][1];
28996
1.41k
}
28997
28998
// getNewValueOpcode
28999
LLVM_READONLY
29000
83.0k
int getNewValueOpcode(uint16_t Opcode) {
29001
83.0k
static const uint16_t getNewValueOpcodeTable[][2] = {
29002
83.0k
  { Hexagon::PS_storerbabs, Hexagon::PS_storerbnewabs },
29003
83.0k
  { Hexagon::PS_storerhabs, Hexagon::PS_storerhnewabs },
29004
83.0k
  { Hexagon::PS_storeriabs, Hexagon::PS_storerinewabs },
29005
83.0k
  { Hexagon::S2_pstorerbf_io, Hexagon::S2_pstorerbnewf_io },
29006
83.0k
  { Hexagon::S2_pstorerbf_pi, Hexagon::S2_pstorerbnewf_pi },
29007
83.0k
  { Hexagon::S2_pstorerbfnew_pi, Hexagon::S2_pstorerbnewfnew_pi },
29008
83.0k
  { Hexagon::S2_pstorerbt_io, Hexagon::S2_pstorerbnewt_io },
29009
83.0k
  { Hexagon::S2_pstorerbt_pi, Hexagon::S2_pstorerbnewt_pi },
29010
83.0k
  { Hexagon::S2_pstorerbtnew_pi, Hexagon::S2_pstorerbnewtnew_pi },
29011
83.0k
  { Hexagon::S2_pstorerhf_io, Hexagon::S2_pstorerhnewf_io },
29012
83.0k
  { Hexagon::S2_pstorerhf_pi, Hexagon::S2_pstorerhnewf_pi },
29013
83.0k
  { Hexagon::S2_pstorerhfnew_pi, Hexagon::S2_pstorerhnewfnew_pi },
29014
83.0k
  { Hexagon::S2_pstorerht_io, Hexagon::S2_pstorerhnewt_io },
29015
83.0k
  { Hexagon::S2_pstorerht_pi, Hexagon::S2_pstorerhnewt_pi },
29016
83.0k
  { Hexagon::S2_pstorerhtnew_pi, Hexagon::S2_pstorerhnewtnew_pi },
29017
83.0k
  { Hexagon::S2_pstorerif_io, Hexagon::S2_pstorerinewf_io },
29018
83.0k
  { Hexagon::S2_pstorerif_pi, Hexagon::S2_pstorerinewf_pi },
29019
83.0k
  { Hexagon::S2_pstorerifnew_pi, Hexagon::S2_pstorerinewfnew_pi },
29020
83.0k
  { Hexagon::S2_pstorerit_io, Hexagon::S2_pstorerinewt_io },
29021
83.0k
  { Hexagon::S2_pstorerit_pi, Hexagon::S2_pstorerinewt_pi },
29022
83.0k
  { Hexagon::S2_pstoreritnew_pi, Hexagon::S2_pstorerinewtnew_pi },
29023
83.0k
  { Hexagon::S2_storerb_io, Hexagon::S2_storerbnew_io },
29024
83.0k
  { Hexagon::S2_storerb_pbr, Hexagon::S2_storerbnew_pbr },
29025
83.0k
  { Hexagon::S2_storerb_pci, Hexagon::S2_storerbnew_pci },
29026
83.0k
  { Hexagon::S2_storerb_pcr, Hexagon::S2_storerbnew_pcr },
29027
83.0k
  { Hexagon::S2_storerb_pi, Hexagon::S2_storerbnew_pi },
29028
83.0k
  { Hexagon::S2_storerb_pr, Hexagon::S2_storerbnew_pr },
29029
83.0k
  { Hexagon::S2_storerbgp, Hexagon::S2_storerbnewgp },
29030
83.0k
  { Hexagon::S2_storerh_io, Hexagon::S2_storerhnew_io },
29031
83.0k
  { Hexagon::S2_storerh_pbr, Hexagon::S2_storerhnew_pbr },
29032
83.0k
  { Hexagon::S2_storerh_pci, Hexagon::S2_storerhnew_pci },
29033
83.0k
  { Hexagon::S2_storerh_pcr, Hexagon::S2_storerhnew_pcr },
29034
83.0k
  { Hexagon::S2_storerh_pi, Hexagon::S2_storerhnew_pi },
29035
83.0k
  { Hexagon::S2_storerh_pr, Hexagon::S2_storerhnew_pr },
29036
83.0k
  { Hexagon::S2_storerhgp, Hexagon::S2_storerhnewgp },
29037
83.0k
  { Hexagon::S2_storeri_io, Hexagon::S2_storerinew_io },
29038
83.0k
  { Hexagon::S2_storeri_pbr, Hexagon::S2_storerinew_pbr },
29039
83.0k
  { Hexagon::S2_storeri_pci, Hexagon::S2_storerinew_pci },
29040
83.0k
  { Hexagon::S2_storeri_pcr, Hexagon::S2_storerinew_pcr },
29041
83.0k
  { Hexagon::S2_storeri_pi, Hexagon::S2_storerinew_pi },
29042
83.0k
  { Hexagon::S2_storeri_pr, Hexagon::S2_storerinew_pr },
29043
83.0k
  { Hexagon::S2_storerigp, Hexagon::S2_storerinewgp },
29044
83.0k
  { Hexagon::S4_pstorerbf_abs, Hexagon::S4_pstorerbnewf_abs },
29045
83.0k
  { Hexagon::S4_pstorerbf_rr, Hexagon::S4_pstorerbnewf_rr },
29046
83.0k
  { Hexagon::S4_pstorerbfnew_abs, Hexagon::S4_pstorerbnewfnew_abs },
29047
83.0k
  { Hexagon::S4_pstorerbfnew_io, Hexagon::S4_pstorerbnewfnew_io },
29048
83.0k
  { Hexagon::S4_pstorerbfnew_rr, Hexagon::S4_pstorerbnewfnew_rr },
29049
83.0k
  { Hexagon::S4_pstorerbt_abs, Hexagon::S4_pstorerbnewt_abs },
29050
83.0k
  { Hexagon::S4_pstorerbt_rr, Hexagon::S4_pstorerbnewt_rr },
29051
83.0k
  { Hexagon::S4_pstorerbtnew_abs, Hexagon::S4_pstorerbnewtnew_abs },
29052
83.0k
  { Hexagon::S4_pstorerbtnew_io, Hexagon::S4_pstorerbnewtnew_io },
29053
83.0k
  { Hexagon::S4_pstorerbtnew_rr, Hexagon::S4_pstorerbnewtnew_rr },
29054
83.0k
  { Hexagon::S4_pstorerhf_abs, Hexagon::S4_pstorerhnewf_abs },
29055
83.0k
  { Hexagon::S4_pstorerhf_rr, Hexagon::S4_pstorerhnewf_rr },
29056
83.0k
  { Hexagon::S4_pstorerhfnew_abs, Hexagon::S4_pstorerhnewfnew_abs },
29057
83.0k
  { Hexagon::S4_pstorerhfnew_io, Hexagon::S4_pstorerhnewfnew_io },
29058
83.0k
  { Hexagon::S4_pstorerhfnew_rr, Hexagon::S4_pstorerhnewfnew_rr },
29059
83.0k
  { Hexagon::S4_pstorerht_abs, Hexagon::S4_pstorerhnewt_abs },
29060
83.0k
  { Hexagon::S4_pstorerht_rr, Hexagon::S4_pstorerhnewt_rr },
29061
83.0k
  { Hexagon::S4_pstorerhtnew_abs, Hexagon::S4_pstorerhnewtnew_abs },
29062
83.0k
  { Hexagon::S4_pstorerhtnew_io, Hexagon::S4_pstorerhnewtnew_io },
29063
83.0k
  { Hexagon::S4_pstorerhtnew_rr, Hexagon::S4_pstorerhnewtnew_rr },
29064
83.0k
  { Hexagon::S4_pstorerif_abs, Hexagon::S4_pstorerinewf_abs },
29065
83.0k
  { Hexagon::S4_pstorerif_rr, Hexagon::S4_pstorerinewf_rr },
29066
83.0k
  { Hexagon::S4_pstorerifnew_abs, Hexagon::S4_pstorerinewfnew_abs },
29067
83.0k
  { Hexagon::S4_pstorerifnew_io, Hexagon::S4_pstorerinewfnew_io },
29068
83.0k
  { Hexagon::S4_pstorerifnew_rr, Hexagon::S4_pstorerinewfnew_rr },
29069
83.0k
  { Hexagon::S4_pstorerit_abs, Hexagon::S4_pstorerinewt_abs },
29070
83.0k
  { Hexagon::S4_pstorerit_rr, Hexagon::S4_pstorerinewt_rr },
29071
83.0k
  { Hexagon::S4_pstoreritnew_abs, Hexagon::S4_pstorerinewtnew_abs },
29072
83.0k
  { Hexagon::S4_pstoreritnew_io, Hexagon::S4_pstorerinewtnew_io },
29073
83.0k
  { Hexagon::S4_pstoreritnew_rr, Hexagon::S4_pstorerinewtnew_rr },
29074
83.0k
  { Hexagon::S4_storerb_ap, Hexagon::S4_storerbnew_ap },
29075
83.0k
  { Hexagon::S4_storerb_rr, Hexagon::S4_storerbnew_rr },
29076
83.0k
  { Hexagon::S4_storerb_ur, Hexagon::S4_storerbnew_ur },
29077
83.0k
  { Hexagon::S4_storerh_ap, Hexagon::S4_storerhnew_ap },
29078
83.0k
  { Hexagon::S4_storerh_rr, Hexagon::S4_storerhnew_rr },
29079
83.0k
  { Hexagon::S4_storerh_ur, Hexagon::S4_storerhnew_ur },
29080
83.0k
  { Hexagon::S4_storeri_ap, Hexagon::S4_storerinew_ap },
29081
83.0k
  { Hexagon::S4_storeri_rr, Hexagon::S4_storerinew_rr },
29082
83.0k
  { Hexagon::S4_storeri_ur, Hexagon::S4_storerinew_ur },
29083
83.0k
  { Hexagon::V6_vS32b_ai, Hexagon::V6_vS32b_new_ai },
29084
83.0k
  { Hexagon::V6_vS32b_npred_ai, Hexagon::V6_vS32b_new_npred_ai },
29085
83.0k
  { Hexagon::V6_vS32b_npred_pi, Hexagon::V6_vS32b_new_npred_pi },
29086
83.0k
  { Hexagon::V6_vS32b_npred_ppu, Hexagon::V6_vS32b_new_npred_ppu },
29087
83.0k
  { Hexagon::V6_vS32b_nt_ai, Hexagon::V6_vS32b_nt_new_ai },
29088
83.0k
  { Hexagon::V6_vS32b_nt_npred_ai, Hexagon::V6_vS32b_nt_new_npred_ai },
29089
83.0k
  { Hexagon::V6_vS32b_nt_npred_pi, Hexagon::V6_vS32b_nt_new_npred_pi },
29090
83.0k
  { Hexagon::V6_vS32b_nt_npred_ppu, Hexagon::V6_vS32b_nt_new_npred_ppu },
29091
83.0k
  { Hexagon::V6_vS32b_nt_pi, Hexagon::V6_vS32b_nt_new_pi },
29092
83.0k
  { Hexagon::V6_vS32b_nt_ppu, Hexagon::V6_vS32b_nt_new_ppu },
29093
83.0k
  { Hexagon::V6_vS32b_nt_pred_ai, Hexagon::V6_vS32b_nt_new_pred_ai },
29094
83.0k
  { Hexagon::V6_vS32b_nt_pred_pi, Hexagon::V6_vS32b_nt_new_pred_pi },
29095
83.0k
  { Hexagon::V6_vS32b_nt_pred_ppu, Hexagon::V6_vS32b_nt_new_pred_ppu },
29096
83.0k
  { Hexagon::V6_vS32b_pi, Hexagon::V6_vS32b_new_pi },
29097
83.0k
  { Hexagon::V6_vS32b_ppu, Hexagon::V6_vS32b_new_ppu },
29098
83.0k
  { Hexagon::V6_vS32b_pred_ai, Hexagon::V6_vS32b_new_pred_ai },
29099
83.0k
  { Hexagon::V6_vS32b_pred_pi, Hexagon::V6_vS32b_new_pred_pi },
29100
83.0k
  { Hexagon::V6_vS32b_pred_ppu, Hexagon::V6_vS32b_new_pred_ppu },
29101
83.0k
}; // End of getNewValueOpcodeTable
29102
29103
83.0k
  unsigned mid;
29104
83.0k
  unsigned start = 0;
29105
83.0k
  unsigned end = 99;
29106
523k
  while (start < end) {
29107
523k
    mid = start + (end - start) / 2;
29108
523k
    if (Opcode == getNewValueOpcodeTable[mid][0]) {
29109
83.0k
      break;
29110
83.0k
    }
29111
440k
    if (Opcode < getNewValueOpcodeTable[mid][0])
29112
211k
      end = mid;
29113
228k
    else
29114
228k
      start = mid + 1;
29115
440k
  }
29116
83.0k
  if (start == end)
29117
0
    return -1; // Instruction doesn't exist in this table.
29118
29119
83.0k
  return getNewValueOpcodeTable[mid][1];
29120
83.0k
}
29121
29122
// getNonNVStore
29123
LLVM_READONLY
29124
5
int getNonNVStore(uint16_t Opcode) {
29125
5
static const uint16_t getNonNVStoreTable[][2] = {
29126
5
  { Hexagon::PS_storerbnewabs, Hexagon::PS_storerbabs },
29127
5
  { Hexagon::PS_storerhnewabs, Hexagon::PS_storerhabs },
29128
5
  { Hexagon::PS_storerinewabs, Hexagon::PS_storeriabs },
29129
5
  { Hexagon::S2_pstorerbnewf_io, Hexagon::S2_pstorerbf_io },
29130
5
  { Hexagon::S2_pstorerbnewf_pi, Hexagon::S2_pstorerbf_pi },
29131
5
  { Hexagon::S2_pstorerbnewfnew_pi, Hexagon::S2_pstorerbfnew_pi },
29132
5
  { Hexagon::S2_pstorerbnewt_io, Hexagon::S2_pstorerbt_io },
29133
5
  { Hexagon::S2_pstorerbnewt_pi, Hexagon::S2_pstorerbt_pi },
29134
5
  { Hexagon::S2_pstorerbnewtnew_pi, Hexagon::S2_pstorerbtnew_pi },
29135
5
  { Hexagon::S2_pstorerhnewf_io, Hexagon::S2_pstorerhf_io },
29136
5
  { Hexagon::S2_pstorerhnewf_pi, Hexagon::S2_pstorerhf_pi },
29137
5
  { Hexagon::S2_pstorerhnewfnew_pi, Hexagon::S2_pstorerhfnew_pi },
29138
5
  { Hexagon::S2_pstorerhnewt_io, Hexagon::S2_pstorerht_io },
29139
5
  { Hexagon::S2_pstorerhnewt_pi, Hexagon::S2_pstorerht_pi },
29140
5
  { Hexagon::S2_pstorerhnewtnew_pi, Hexagon::S2_pstorerhtnew_pi },
29141
5
  { Hexagon::S2_pstorerinewf_io, Hexagon::S2_pstorerif_io },
29142
5
  { Hexagon::S2_pstorerinewf_pi, Hexagon::S2_pstorerif_pi },
29143
5
  { Hexagon::S2_pstorerinewfnew_pi, Hexagon::S2_pstorerifnew_pi },
29144
5
  { Hexagon::S2_pstorerinewt_io, Hexagon::S2_pstorerit_io },
29145
5
  { Hexagon::S2_pstorerinewt_pi, Hexagon::S2_pstorerit_pi },
29146
5
  { Hexagon::S2_pstorerinewtnew_pi, Hexagon::S2_pstoreritnew_pi },
29147
5
  { Hexagon::S2_storerbnew_io, Hexagon::S2_storerb_io },
29148
5
  { Hexagon::S2_storerbnew_pbr, Hexagon::S2_storerb_pbr },
29149
5
  { Hexagon::S2_storerbnew_pci, Hexagon::S2_storerb_pci },
29150
5
  { Hexagon::S2_storerbnew_pcr, Hexagon::S2_storerb_pcr },
29151
5
  { Hexagon::S2_storerbnew_pi, Hexagon::S2_storerb_pi },
29152
5
  { Hexagon::S2_storerbnew_pr, Hexagon::S2_storerb_pr },
29153
5
  { Hexagon::S2_storerbnewgp, Hexagon::S2_storerbgp },
29154
5
  { Hexagon::S2_storerhnew_io, Hexagon::S2_storerh_io },
29155
5
  { Hexagon::S2_storerhnew_pbr, Hexagon::S2_storerh_pbr },
29156
5
  { Hexagon::S2_storerhnew_pci, Hexagon::S2_storerh_pci },
29157
5
  { Hexagon::S2_storerhnew_pcr, Hexagon::S2_storerh_pcr },
29158
5
  { Hexagon::S2_storerhnew_pi, Hexagon::S2_storerh_pi },
29159
5
  { Hexagon::S2_storerhnew_pr, Hexagon::S2_storerh_pr },
29160
5
  { Hexagon::S2_storerhnewgp, Hexagon::S2_storerhgp },
29161
5
  { Hexagon::S2_storerinew_io, Hexagon::S2_storeri_io },
29162
5
  { Hexagon::S2_storerinew_pbr, Hexagon::S2_storeri_pbr },
29163
5
  { Hexagon::S2_storerinew_pci, Hexagon::S2_storeri_pci },
29164
5
  { Hexagon::S2_storerinew_pcr, Hexagon::S2_storeri_pcr },
29165
5
  { Hexagon::S2_storerinew_pi, Hexagon::S2_storeri_pi },
29166
5
  { Hexagon::S2_storerinew_pr, Hexagon::S2_storeri_pr },
29167
5
  { Hexagon::S2_storerinewgp, Hexagon::S2_storerigp },
29168
5
  { Hexagon::S4_pstorerbnewf_abs, Hexagon::S4_pstorerbf_abs },
29169
5
  { Hexagon::S4_pstorerbnewf_rr, Hexagon::S4_pstorerbf_rr },
29170
5
  { Hexagon::S4_pstorerbnewfnew_abs, Hexagon::S4_pstorerbfnew_abs },
29171
5
  { Hexagon::S4_pstorerbnewfnew_io, Hexagon::S4_pstorerbfnew_io },
29172
5
  { Hexagon::S4_pstorerbnewfnew_rr, Hexagon::S4_pstorerbfnew_rr },
29173
5
  { Hexagon::S4_pstorerbnewt_abs, Hexagon::S4_pstorerbt_abs },
29174
5
  { Hexagon::S4_pstorerbnewt_rr, Hexagon::S4_pstorerbt_rr },
29175
5
  { Hexagon::S4_pstorerbnewtnew_abs, Hexagon::S4_pstorerbtnew_abs },
29176
5
  { Hexagon::S4_pstorerbnewtnew_io, Hexagon::S4_pstorerbtnew_io },
29177
5
  { Hexagon::S4_pstorerbnewtnew_rr, Hexagon::S4_pstorerbtnew_rr },
29178
5
  { Hexagon::S4_pstorerhnewf_abs, Hexagon::S4_pstorerhf_abs },
29179
5
  { Hexagon::S4_pstorerhnewf_rr, Hexagon::S4_pstorerhf_rr },
29180
5
  { Hexagon::S4_pstorerhnewfnew_abs, Hexagon::S4_pstorerhfnew_abs },
29181
5
  { Hexagon::S4_pstorerhnewfnew_io, Hexagon::S4_pstorerhfnew_io },
29182
5
  { Hexagon::S4_pstorerhnewfnew_rr, Hexagon::S4_pstorerhfnew_rr },
29183
5
  { Hexagon::S4_pstorerhnewt_abs, Hexagon::S4_pstorerht_abs },
29184
5
  { Hexagon::S4_pstorerhnewt_rr, Hexagon::S4_pstorerht_rr },
29185
5
  { Hexagon::S4_pstorerhnewtnew_abs, Hexagon::S4_pstorerhtnew_abs },
29186
5
  { Hexagon::S4_pstorerhnewtnew_io, Hexagon::S4_pstorerhtnew_io },
29187
5
  { Hexagon::S4_pstorerhnewtnew_rr, Hexagon::S4_pstorerhtnew_rr },
29188
5
  { Hexagon::S4_pstorerinewf_abs, Hexagon::S4_pstorerif_abs },
29189
5
  { Hexagon::S4_pstorerinewf_rr, Hexagon::S4_pstorerif_rr },
29190
5
  { Hexagon::S4_pstorerinewfnew_abs, Hexagon::S4_pstorerifnew_abs },
29191
5
  { Hexagon::S4_pstorerinewfnew_io, Hexagon::S4_pstorerifnew_io },
29192
5
  { Hexagon::S4_pstorerinewfnew_rr, Hexagon::S4_pstorerifnew_rr },
29193
5
  { Hexagon::S4_pstorerinewt_abs, Hexagon::S4_pstorerit_abs },
29194
5
  { Hexagon::S4_pstorerinewt_rr, Hexagon::S4_pstorerit_rr },
29195
5
  { Hexagon::S4_pstorerinewtnew_abs, Hexagon::S4_pstoreritnew_abs },
29196
5
  { Hexagon::S4_pstorerinewtnew_io, Hexagon::S4_pstoreritnew_io },
29197
5
  { Hexagon::S4_pstorerinewtnew_rr, Hexagon::S4_pstoreritnew_rr },
29198
5
  { Hexagon::S4_storerbnew_ap, Hexagon::S4_storerb_ap },
29199
5
  { Hexagon::S4_storerbnew_rr, Hexagon::S4_storerb_rr },
29200
5
  { Hexagon::S4_storerbnew_ur, Hexagon::S4_storerb_ur },
29201
5
  { Hexagon::S4_storerhnew_ap, Hexagon::S4_storerh_ap },
29202
5
  { Hexagon::S4_storerhnew_rr, Hexagon::S4_storerh_rr },
29203
5
  { Hexagon::S4_storerhnew_ur, Hexagon::S4_storerh_ur },
29204
5
  { Hexagon::S4_storerinew_ap, Hexagon::S4_storeri_ap },
29205
5
  { Hexagon::S4_storerinew_rr, Hexagon::S4_storeri_rr },
29206
5
  { Hexagon::S4_storerinew_ur, Hexagon::S4_storeri_ur },
29207
5
  { Hexagon::V6_vS32b_new_ai, Hexagon::V6_vS32b_ai },
29208
5
  { Hexagon::V6_vS32b_new_npred_ai, Hexagon::V6_vS32b_npred_ai },
29209
5
  { Hexagon::V6_vS32b_new_npred_pi, Hexagon::V6_vS32b_npred_pi },
29210
5
  { Hexagon::V6_vS32b_new_npred_ppu, Hexagon::V6_vS32b_npred_ppu },
29211
5
  { Hexagon::V6_vS32b_new_pi, Hexagon::V6_vS32b_pi },
29212
5
  { Hexagon::V6_vS32b_new_ppu, Hexagon::V6_vS32b_ppu },
29213
5
  { Hexagon::V6_vS32b_new_pred_ai, Hexagon::V6_vS32b_pred_ai },
29214
5
  { Hexagon::V6_vS32b_new_pred_pi, Hexagon::V6_vS32b_pred_pi },
29215
5
  { Hexagon::V6_vS32b_new_pred_ppu, Hexagon::V6_vS32b_pred_ppu },
29216
5
  { Hexagon::V6_vS32b_nt_new_ai, Hexagon::V6_vS32b_nt_ai },
29217
5
  { Hexagon::V6_vS32b_nt_new_npred_ai, Hexagon::V6_vS32b_nt_npred_ai },
29218
5
  { Hexagon::V6_vS32b_nt_new_npred_pi, Hexagon::V6_vS32b_nt_npred_pi },
29219
5
  { Hexagon::V6_vS32b_nt_new_npred_ppu, Hexagon::V6_vS32b_nt_npred_ppu },
29220
5
  { Hexagon::V6_vS32b_nt_new_pi, Hexagon::V6_vS32b_nt_pi },
29221
5
  { Hexagon::V6_vS32b_nt_new_ppu, Hexagon::V6_vS32b_nt_ppu },
29222
5
  { Hexagon::V6_vS32b_nt_new_pred_ai, Hexagon::V6_vS32b_nt_pred_ai },
29223
5
  { Hexagon::V6_vS32b_nt_new_pred_pi, Hexagon::V6_vS32b_nt_pred_pi },
29224
5
  { Hexagon::V6_vS32b_nt_new_pred_ppu, Hexagon::V6_vS32b_nt_pred_ppu },
29225
5
}; // End of getNonNVStoreTable
29226
29227
5
  unsigned mid;
29228
5
  unsigned start = 0;
29229
5
  unsigned end = 99;
29230
27
  while (start < end) {
29231
27
    mid = start + (end - start) / 2;
29232
27
    if (Opcode == getNonNVStoreTable[mid][0]) {
29233
5
      break;
29234
5
    }
29235
22
    if (Opcode < getNonNVStoreTable[mid][0])
29236
12
      end = mid;
29237
10
    else
29238
10
      start = mid + 1;
29239
22
  }
29240
5
  if (start == end)
29241
0
    return -1; // Instruction doesn't exist in this table.
29242
29243
5
  return getNonNVStoreTable[mid][1];
29244
5
}
29245
29246
// getPredNewOpcode
29247
LLVM_READONLY
29248
880
int getPredNewOpcode(uint16_t Opcode) {
29249
880
static const uint16_t getPredNewOpcodeTable[][2] = {
29250
880
  { Hexagon::A2_tfrf, Hexagon::A2_tfrfnew },
29251
880
  { Hexagon::A2_tfrpf, Hexagon::A2_tfrpfnew },
29252
880
  { Hexagon::A2_tfrpt, Hexagon::A2_tfrptnew },
29253
880
  { Hexagon::A2_tfrt, Hexagon::A2_tfrtnew },
29254
880
  { Hexagon::A2_paddf, Hexagon::A2_paddfnew },
29255
880
  { Hexagon::A2_paddif, Hexagon::A2_paddifnew },
29256
880
  { Hexagon::A2_paddit, Hexagon::A2_padditnew },
29257
880
  { Hexagon::A2_paddt, Hexagon::A2_paddtnew },
29258
880
  { Hexagon::A2_pandf, Hexagon::A2_pandfnew },
29259
880
  { Hexagon::A2_pandt, Hexagon::A2_pandtnew },
29260
880
  { Hexagon::A2_porf, Hexagon::A2_porfnew },
29261
880
  { Hexagon::A2_port, Hexagon::A2_portnew },
29262
880
  { Hexagon::A2_psubf, Hexagon::A2_psubfnew },
29263
880
  { Hexagon::A2_psubt, Hexagon::A2_psubtnew },
29264
880
  { Hexagon::A2_pxorf, Hexagon::A2_pxorfnew },
29265
880
  { Hexagon::A2_pxort, Hexagon::A2_pxortnew },
29266
880
  { Hexagon::A4_paslhf, Hexagon::A4_paslhfnew },
29267
880
  { Hexagon::A4_paslht, Hexagon::A4_paslhtnew },
29268
880
  { Hexagon::A4_pasrhf, Hexagon::A4_pasrhfnew },
29269
880
  { Hexagon::A4_pasrht, Hexagon::A4_pasrhtnew },
29270
880
  { Hexagon::A4_psxtbf, Hexagon::A4_psxtbfnew },
29271
880
  { Hexagon::A4_psxtbt, Hexagon::A4_psxtbtnew },
29272
880
  { Hexagon::A4_psxthf, Hexagon::A4_psxthfnew },
29273
880
  { Hexagon::A4_psxtht, Hexagon::A4_psxthtnew },
29274
880
  { Hexagon::A4_pzxtbf, Hexagon::A4_pzxtbfnew },
29275
880
  { Hexagon::A4_pzxtbt, Hexagon::A4_pzxtbtnew },
29276
880
  { Hexagon::A4_pzxthf, Hexagon::A4_pzxthfnew },
29277
880
  { Hexagon::A4_pzxtht, Hexagon::A4_pzxthtnew },
29278
880
  { Hexagon::C2_ccombinewf, Hexagon::C2_ccombinewnewf },
29279
880
  { Hexagon::C2_ccombinewt, Hexagon::C2_ccombinewnewt },
29280
880
  { Hexagon::C2_cmoveif, Hexagon::C2_cmovenewif },
29281
880
  { Hexagon::C2_cmoveit, Hexagon::C2_cmovenewit },
29282
880
  { Hexagon::J2_jumpf, Hexagon::J2_jumpfnew },
29283
880
  { Hexagon::J2_jumpfpt, Hexagon::J2_jumpfnewpt },
29284
880
  { Hexagon::J2_jumprf, Hexagon::J2_jumprfnew },
29285
880
  { Hexagon::J2_jumprfpt, Hexagon::J2_jumprfnewpt },
29286
880
  { Hexagon::J2_jumprt, Hexagon::J2_jumprtnew },
29287
880
  { Hexagon::J2_jumprtpt, Hexagon::J2_jumprtnewpt },
29288
880
  { Hexagon::J2_jumpt, Hexagon::J2_jumptnew },
29289
880
  { Hexagon::J2_jumptpt, Hexagon::J2_jumptnewpt },
29290
880
  { Hexagon::L2_ploadrbf_io, Hexagon::L2_ploadrbfnew_io },
29291
880
  { Hexagon::L2_ploadrbf_pi, Hexagon::L2_ploadrbfnew_pi },
29292
880
  { Hexagon::L2_ploadrbt_io, Hexagon::L2_ploadrbtnew_io },
29293
880
  { Hexagon::L2_ploadrbt_pi, Hexagon::L2_ploadrbtnew_pi },
29294
880
  { Hexagon::L2_ploadrdf_io, Hexagon::L2_ploadrdfnew_io },
29295
880
  { Hexagon::L2_ploadrdf_pi, Hexagon::L2_ploadrdfnew_pi },
29296
880
  { Hexagon::L2_ploadrdt_io, Hexagon::L2_ploadrdtnew_io },
29297
880
  { Hexagon::L2_ploadrdt_pi, Hexagon::L2_ploadrdtnew_pi },
29298
880
  { Hexagon::L2_ploadrhf_io, Hexagon::L2_ploadrhfnew_io },
29299
880
  { Hexagon::L2_ploadrhf_pi, Hexagon::L2_ploadrhfnew_pi },
29300
880
  { Hexagon::L2_ploadrht_io, Hexagon::L2_ploadrhtnew_io },
29301
880
  { Hexagon::L2_ploadrht_pi, Hexagon::L2_ploadrhtnew_pi },
29302
880
  { Hexagon::L2_ploadrif_io, Hexagon::L2_ploadrifnew_io },
29303
880
  { Hexagon::L2_ploadrif_pi, Hexagon::L2_ploadrifnew_pi },
29304
880
  { Hexagon::L2_ploadrit_io, Hexagon::L2_ploadritnew_io },
29305
880
  { Hexagon::L2_ploadrit_pi, Hexagon::L2_ploadritnew_pi },
29306
880
  { Hexagon::L2_ploadrubf_io, Hexagon::L2_ploadrubfnew_io },
29307
880
  { Hexagon::L2_ploadrubf_pi, Hexagon::L2_ploadrubfnew_pi },
29308
880
  { Hexagon::L2_ploadrubt_io, Hexagon::L2_ploadrubtnew_io },
29309
880
  { Hexagon::L2_ploadrubt_pi, Hexagon::L2_ploadrubtnew_pi },
29310
880
  { Hexagon::L2_ploadruhf_io, Hexagon::L2_ploadruhfnew_io },
29311
880
  { Hexagon::L2_ploadruhf_pi, Hexagon::L2_ploadruhfnew_pi },
29312
880
  { Hexagon::L2_ploadruht_io, Hexagon::L2_ploadruhtnew_io },
29313
880
  { Hexagon::L2_ploadruht_pi, Hexagon::L2_ploadruhtnew_pi },
29314
880
  { Hexagon::L4_ploadrbf_abs, Hexagon::L4_ploadrbfnew_abs },
29315
880
  { Hexagon::L4_ploadrbf_rr, Hexagon::L4_ploadrbfnew_rr },
29316
880
  { Hexagon::L4_ploadrbt_abs, Hexagon::L4_ploadrbtnew_abs },
29317
880
  { Hexagon::L4_ploadrbt_rr, Hexagon::L4_ploadrbtnew_rr },
29318
880
  { Hexagon::L4_ploadrdf_abs, Hexagon::L4_ploadrdfnew_abs },
29319
880
  { Hexagon::L4_ploadrdf_rr, Hexagon::L4_ploadrdfnew_rr },
29320
880
  { Hexagon::L4_ploadrdt_abs, Hexagon::L4_ploadrdtnew_abs },
29321
880
  { Hexagon::L4_ploadrdt_rr, Hexagon::L4_ploadrdtnew_rr },
29322
880
  { Hexagon::L4_ploadrhf_abs, Hexagon::L4_ploadrhfnew_abs },
29323
880
  { Hexagon::L4_ploadrhf_rr, Hexagon::L4_ploadrhfnew_rr },
29324
880
  { Hexagon::L4_ploadrht_abs, Hexagon::L4_ploadrhtnew_abs },
29325
880
  { Hexagon::L4_ploadrht_rr, Hexagon::L4_ploadrhtnew_rr },
29326
880
  { Hexagon::L4_ploadrif_abs, Hexagon::L4_ploadrifnew_abs },
29327
880
  { Hexagon::L4_ploadrif_rr, Hexagon::L4_ploadrifnew_rr },
29328
880
  { Hexagon::L4_ploadrit_abs, Hexagon::L4_ploadritnew_abs },
29329
880
  { Hexagon::L4_ploadrit_rr, Hexagon::L4_ploadritnew_rr },
29330
880
  { Hexagon::L4_ploadrubf_abs, Hexagon::L4_ploadrubfnew_abs },
29331
880
  { Hexagon::L4_ploadrubf_rr, Hexagon::L4_ploadrubfnew_rr },
29332
880
  { Hexagon::L4_ploadrubt_abs, Hexagon::L4_ploadrubtnew_abs },
29333
880
  { Hexagon::L4_ploadrubt_rr, Hexagon::L4_ploadrubtnew_rr },
29334
880
  { Hexagon::L4_ploadruhf_abs, Hexagon::L4_ploadruhfnew_abs },
29335
880
  { Hexagon::L4_ploadruhf_rr, Hexagon::L4_ploadruhfnew_rr },
29336
880
  { Hexagon::L4_ploadruht_abs, Hexagon::L4_ploadruhtnew_abs },
29337
880
  { Hexagon::L4_ploadruht_rr, Hexagon::L4_ploadruhtnew_rr },
29338
880
  { Hexagon::L4_return_f, Hexagon::L4_return_fnew_pt },
29339
880
  { Hexagon::L4_return_t, Hexagon::L4_return_tnew_pt },
29340
880
  { Hexagon::PS_jmpretf, Hexagon::PS_jmpretfnew },
29341
880
  { Hexagon::PS_jmprett, Hexagon::PS_jmprettnew },
29342
880
  { Hexagon::S2_pstorerbf_io, Hexagon::S4_pstorerbfnew_io },
29343
880
  { Hexagon::S2_pstorerbf_pi, Hexagon::S2_pstorerbfnew_pi },
29344
880
  { Hexagon::S2_pstorerbnewf_io, Hexagon::S4_pstorerbnewfnew_io },
29345
880
  { Hexagon::S2_pstorerbnewf_pi, Hexagon::S2_pstorerbnewfnew_pi },
29346
880
  { Hexagon::S2_pstorerbnewt_io, Hexagon::S4_pstorerbnewtnew_io },
29347
880
  { Hexagon::S2_pstorerbnewt_pi, Hexagon::S2_pstorerbnewtnew_pi },
29348
880
  { Hexagon::S2_pstorerbt_io, Hexagon::S4_pstorerbtnew_io },
29349
880
  { Hexagon::S2_pstorerbt_pi, Hexagon::S2_pstorerbtnew_pi },
29350
880
  { Hexagon::S2_pstorerdf_io, Hexagon::S4_pstorerdfnew_io },
29351
880
  { Hexagon::S2_pstorerdf_pi, Hexagon::S2_pstorerdfnew_pi },
29352
880
  { Hexagon::S2_pstorerdt_io, Hexagon::S4_pstorerdtnew_io },
29353
880
  { Hexagon::S2_pstorerdt_pi, Hexagon::S2_pstorerdtnew_pi },
29354
880
  { Hexagon::S2_pstorerff_io, Hexagon::S4_pstorerffnew_io },
29355
880
  { Hexagon::S2_pstorerff_pi, Hexagon::S2_pstorerffnew_pi },
29356
880
  { Hexagon::S2_pstorerft_io, Hexagon::S4_pstorerftnew_io },
29357
880
  { Hexagon::S2_pstorerft_pi, Hexagon::S2_pstorerftnew_pi },
29358
880
  { Hexagon::S2_pstorerhf_io, Hexagon::S4_pstorerhfnew_io },
29359
880
  { Hexagon::S2_pstorerhf_pi, Hexagon::S2_pstorerhfnew_pi },
29360
880
  { Hexagon::S2_pstorerhnewf_io, Hexagon::S4_pstorerhnewfnew_io },
29361
880
  { Hexagon::S2_pstorerhnewf_pi, Hexagon::S2_pstorerhnewfnew_pi },
29362
880
  { Hexagon::S2_pstorerhnewt_io, Hexagon::S4_pstorerhnewtnew_io },
29363
880
  { Hexagon::S2_pstorerhnewt_pi, Hexagon::S2_pstorerhnewtnew_pi },
29364
880
  { Hexagon::S2_pstorerht_io, Hexagon::S4_pstorerhtnew_io },
29365
880
  { Hexagon::S2_pstorerht_pi, Hexagon::S2_pstorerhtnew_pi },
29366
880
  { Hexagon::S2_pstorerif_io, Hexagon::S4_pstorerifnew_io },
29367
880
  { Hexagon::S2_pstorerif_pi, Hexagon::S2_pstorerifnew_pi },
29368
880
  { Hexagon::S2_pstorerinewf_io, Hexagon::S4_pstorerinewfnew_io },
29369
880
  { Hexagon::S2_pstorerinewf_pi, Hexagon::S2_pstorerinewfnew_pi },
29370
880
  { Hexagon::S2_pstorerinewt_io, Hexagon::S4_pstorerinewtnew_io },
29371
880
  { Hexagon::S2_pstorerinewt_pi, Hexagon::S2_pstorerinewtnew_pi },
29372
880
  { Hexagon::S2_pstorerit_io, Hexagon::S4_pstoreritnew_io },
29373
880
  { Hexagon::S2_pstorerit_pi, Hexagon::S2_pstoreritnew_pi },
29374
880
  { Hexagon::S4_pstorerbf_abs, Hexagon::S4_pstorerbfnew_abs },
29375
880
  { Hexagon::S4_pstorerbf_rr, Hexagon::S4_pstorerbfnew_rr },
29376
880
  { Hexagon::S4_pstorerbnewf_abs, Hexagon::S4_pstorerbnewfnew_abs },
29377
880
  { Hexagon::S4_pstorerbnewf_rr, Hexagon::S4_pstorerbnewfnew_rr },
29378
880
  { Hexagon::S4_pstorerbnewt_abs, Hexagon::S4_pstorerbnewtnew_abs },
29379
880
  { Hexagon::S4_pstorerbnewt_rr, Hexagon::S4_pstorerbnewtnew_rr },
29380
880
  { Hexagon::S4_pstorerbt_abs, Hexagon::S4_pstorerbtnew_abs },
29381
880
  { Hexagon::S4_pstorerbt_rr, Hexagon::S4_pstorerbtnew_rr },
29382
880
  { Hexagon::S4_pstorerdf_abs, Hexagon::S4_pstorerdfnew_abs },
29383
880
  { Hexagon::S4_pstorerdf_rr, Hexagon::S4_pstorerdfnew_rr },
29384
880
  { Hexagon::S4_pstorerdt_abs, Hexagon::S4_pstorerdtnew_abs },
29385
880
  { Hexagon::S4_pstorerdt_rr, Hexagon::S4_pstorerdtnew_rr },
29386
880
  { Hexagon::S4_pstorerff_abs, Hexagon::S4_pstorerffnew_abs },
29387
880
  { Hexagon::S4_pstorerff_rr, Hexagon::S4_pstorerffnew_rr },
29388
880
  { Hexagon::S4_pstorerft_abs, Hexagon::S4_pstorerftnew_abs },
29389
880
  { Hexagon::S4_pstorerft_rr, Hexagon::S4_pstorerftnew_rr },
29390
880
  { Hexagon::S4_pstorerhf_abs, Hexagon::S4_pstorerhfnew_abs },
29391
880
  { Hexagon::S4_pstorerhf_rr, Hexagon::S4_pstorerhfnew_rr },
29392
880
  { Hexagon::S4_pstorerhnewf_abs, Hexagon::S4_pstorerhnewfnew_abs },
29393
880
  { Hexagon::S4_pstorerhnewf_rr, Hexagon::S4_pstorerhnewfnew_rr },
29394
880
  { Hexagon::S4_pstorerhnewt_abs, Hexagon::S4_pstorerhnewtnew_abs },
29395
880
  { Hexagon::S4_pstorerhnewt_rr, Hexagon::S4_pstorerhnewtnew_rr },
29396
880
  { Hexagon::S4_pstorerht_abs, Hexagon::S4_pstorerhtnew_abs },
29397
880
  { Hexagon::S4_pstorerht_rr, Hexagon::S4_pstorerhtnew_rr },
29398
880
  { Hexagon::S4_pstorerif_abs, Hexagon::S4_pstorerifnew_abs },
29399
880
  { Hexagon::S4_pstorerif_rr, Hexagon::S4_pstorerifnew_rr },
29400
880
  { Hexagon::S4_pstorerinewf_abs, Hexagon::S4_pstorerinewfnew_abs },
29401
880
  { Hexagon::S4_pstorerinewf_rr, Hexagon::S4_pstorerinewfnew_rr },
29402
880
  { Hexagon::S4_pstorerinewt_abs, Hexagon::S4_pstorerinewtnew_abs },
29403
880
  { Hexagon::S4_pstorerinewt_rr, Hexagon::S4_pstorerinewtnew_rr },
29404
880
  { Hexagon::S4_pstorerit_abs, Hexagon::S4_pstoreritnew_abs },
29405
880
  { Hexagon::S4_pstorerit_rr, Hexagon::S4_pstoreritnew_rr },
29406
880
  { Hexagon::S4_storeirbf_io, Hexagon::S4_storeirbfnew_io },
29407
880
  { Hexagon::S4_storeirbt_io, Hexagon::S4_storeirbtnew_io },
29408
880
  { Hexagon::S4_storeirhf_io, Hexagon::S4_storeirhfnew_io },
29409
880
  { Hexagon::S4_storeirht_io, Hexagon::S4_storeirhtnew_io },
29410
880
  { Hexagon::S4_storeirif_io, Hexagon::S4_storeirifnew_io },
29411
880
  { Hexagon::S4_storeirit_io, Hexagon::S4_storeiritnew_io },
29412
880
}; // End of getPredNewOpcodeTable
29413
29414
880
  unsigned mid;
29415
880
  unsigned start = 0;
29416
880
  unsigned end = 162;
29417
4.48k
  while (start < end) {
29418
4.48k
    mid = start + (end - start) / 2;
29419
4.48k
    if (Opcode == getPredNewOpcodeTable[mid][0]) {
29420
880
      break;
29421
880
    }
29422
3.60k
    if (Opcode < getPredNewOpcodeTable[mid][0])
29423
2.54k
      end = mid;
29424
1.06k
    else
29425
1.06k
      start = mid + 1;
29426
3.60k
  }
29427
880
  if (start == end)
29428
0
    return -1; // Instruction doesn't exist in this table.
29429
29430
880
  return getPredNewOpcodeTable[mid][1];
29431
880
}
29432
29433
// getPredOldOpcode
29434
LLVM_READONLY
29435
2
int getPredOldOpcode(uint16_t Opcode) {
29436
2
static const uint16_t getPredOldOpcodeTable[][2] = {
29437
2
  { Hexagon::A2_tfrfnew, Hexagon::A2_tfrf },
29438
2
  { Hexagon::A2_tfrpfnew, Hexagon::A2_tfrpf },
29439
2
  { Hexagon::A2_tfrptnew, Hexagon::A2_tfrpt },
29440
2
  { Hexagon::A2_tfrtnew, Hexagon::A2_tfrt },
29441
2
  { Hexagon::A2_paddfnew, Hexagon::A2_paddf },
29442
2
  { Hexagon::A2_paddifnew, Hexagon::A2_paddif },
29443
2
  { Hexagon::A2_padditnew, Hexagon::A2_paddit },
29444
2
  { Hexagon::A2_paddtnew, Hexagon::A2_paddt },
29445
2
  { Hexagon::A2_pandfnew, Hexagon::A2_pandf },
29446
2
  { Hexagon::A2_pandtnew, Hexagon::A2_pandt },
29447
2
  { Hexagon::A2_porfnew, Hexagon::A2_porf },
29448
2
  { Hexagon::A2_portnew, Hexagon::A2_port },
29449
2
  { Hexagon::A2_psubfnew, Hexagon::A2_psubf },
29450
2
  { Hexagon::A2_psubtnew, Hexagon::A2_psubt },
29451
2
  { Hexagon::A2_pxorfnew, Hexagon::A2_pxorf },
29452
2
  { Hexagon::A2_pxortnew, Hexagon::A2_pxort },
29453
2
  { Hexagon::A4_paslhfnew, Hexagon::A4_paslhf },
29454
2
  { Hexagon::A4_paslhtnew, Hexagon::A4_paslht },
29455
2
  { Hexagon::A4_pasrhfnew, Hexagon::A4_pasrhf },
29456
2
  { Hexagon::A4_pasrhtnew, Hexagon::A4_pasrht },
29457
2
  { Hexagon::A4_psxtbfnew, Hexagon::A4_psxtbf },
29458
2
  { Hexagon::A4_psxtbtnew, Hexagon::A4_psxtbt },
29459
2
  { Hexagon::A4_psxthfnew, Hexagon::A4_psxthf },
29460
2
  { Hexagon::A4_psxthtnew, Hexagon::A4_psxtht },
29461
2
  { Hexagon::A4_pzxtbfnew, Hexagon::A4_pzxtbf },
29462
2
  { Hexagon::A4_pzxtbtnew, Hexagon::A4_pzxtbt },
29463
2
  { Hexagon::A4_pzxthfnew, Hexagon::A4_pzxthf },
29464
2
  { Hexagon::A4_pzxthtnew, Hexagon::A4_pzxtht },
29465
2
  { Hexagon::C2_ccombinewnewf, Hexagon::C2_ccombinewf },
29466
2
  { Hexagon::C2_ccombinewnewt, Hexagon::C2_ccombinewt },
29467
2
  { Hexagon::C2_cmovenewif, Hexagon::C2_cmoveif },
29468
2
  { Hexagon::C2_cmovenewit, Hexagon::C2_cmoveit },
29469
2
  { Hexagon::J2_jumpfnew, Hexagon::J2_jumpf },
29470
2
  { Hexagon::J2_jumpfnewpt, Hexagon::J2_jumpfpt },
29471
2
  { Hexagon::J2_jumprfnew, Hexagon::J2_jumprf },
29472
2
  { Hexagon::J2_jumprfnewpt, Hexagon::J2_jumprfpt },
29473
2
  { Hexagon::J2_jumprtnew, Hexagon::J2_jumprt },
29474
2
  { Hexagon::J2_jumprtnewpt, Hexagon::J2_jumprtpt },
29475
2
  { Hexagon::J2_jumptnew, Hexagon::J2_jumpt },
29476
2
  { Hexagon::J2_jumptnewpt, Hexagon::J2_jumptpt },
29477
2
  { Hexagon::L2_ploadrbfnew_io, Hexagon::L2_ploadrbf_io },
29478
2
  { Hexagon::L2_ploadrbfnew_pi, Hexagon::L2_ploadrbf_pi },
29479
2
  { Hexagon::L2_ploadrbtnew_io, Hexagon::L2_ploadrbt_io },
29480
2
  { Hexagon::L2_ploadrbtnew_pi, Hexagon::L2_ploadrbt_pi },
29481
2
  { Hexagon::L2_ploadrdfnew_io, Hexagon::L2_ploadrdf_io },
29482
2
  { Hexagon::L2_ploadrdfnew_pi, Hexagon::L2_ploadrdf_pi },
29483
2
  { Hexagon::L2_ploadrdtnew_io, Hexagon::L2_ploadrdt_io },
29484
2
  { Hexagon::L2_ploadrdtnew_pi, Hexagon::L2_ploadrdt_pi },
29485
2
  { Hexagon::L2_ploadrhfnew_io, Hexagon::L2_ploadrhf_io },
29486
2
  { Hexagon::L2_ploadrhfnew_pi, Hexagon::L2_ploadrhf_pi },
29487
2
  { Hexagon::L2_ploadrhtnew_io, Hexagon::L2_ploadrht_io },
29488
2
  { Hexagon::L2_ploadrhtnew_pi, Hexagon::L2_ploadrht_pi },
29489
2
  { Hexagon::L2_ploadrifnew_io, Hexagon::L2_ploadrif_io },
29490
2
  { Hexagon::L2_ploadrifnew_pi, Hexagon::L2_ploadrif_pi },
29491
2
  { Hexagon::L2_ploadritnew_io, Hexagon::L2_ploadrit_io },
29492
2
  { Hexagon::L2_ploadritnew_pi, Hexagon::L2_ploadrit_pi },
29493
2
  { Hexagon::L2_ploadrubfnew_io, Hexagon::L2_ploadrubf_io },
29494
2
  { Hexagon::L2_ploadrubfnew_pi, Hexagon::L2_ploadrubf_pi },
29495
2
  { Hexagon::L2_ploadrubtnew_io, Hexagon::L2_ploadrubt_io },
29496
2
  { Hexagon::L2_ploadrubtnew_pi, Hexagon::L2_ploadrubt_pi },
29497
2
  { Hexagon::L2_ploadruhfnew_io, Hexagon::L2_ploadruhf_io },
29498
2
  { Hexagon::L2_ploadruhfnew_pi, Hexagon::L2_ploadruhf_pi },
29499
2
  { Hexagon::L2_ploadruhtnew_io, Hexagon::L2_ploadruht_io },
29500
2
  { Hexagon::L2_ploadruhtnew_pi, Hexagon::L2_ploadruht_pi },
29501
2
  { Hexagon::L4_ploadrbfnew_abs, Hexagon::L4_ploadrbf_abs },
29502
2
  { Hexagon::L4_ploadrbfnew_rr, Hexagon::L4_ploadrbf_rr },
29503
2
  { Hexagon::L4_ploadrbtnew_abs, Hexagon::L4_ploadrbt_abs },
29504
2
  { Hexagon::L4_ploadrbtnew_rr, Hexagon::L4_ploadrbt_rr },
29505
2
  { Hexagon::L4_ploadrdfnew_abs, Hexagon::L4_ploadrdf_abs },
29506
2
  { Hexagon::L4_ploadrdfnew_rr, Hexagon::L4_ploadrdf_rr },
29507
2
  { Hexagon::L4_ploadrdtnew_abs, Hexagon::L4_ploadrdt_abs },
29508
2
  { Hexagon::L4_ploadrdtnew_rr, Hexagon::L4_ploadrdt_rr },
29509
2
  { Hexagon::L4_ploadrhfnew_abs, Hexagon::L4_ploadrhf_abs },
29510
2
  { Hexagon::L4_ploadrhfnew_rr, Hexagon::L4_ploadrhf_rr },
29511
2
  { Hexagon::L4_ploadrhtnew_abs, Hexagon::L4_ploadrht_abs },
29512
2
  { Hexagon::L4_ploadrhtnew_rr, Hexagon::L4_ploadrht_rr },
29513
2
  { Hexagon::L4_ploadrifnew_abs, Hexagon::L4_ploadrif_abs },
29514
2
  { Hexagon::L4_ploadrifnew_rr, Hexagon::L4_ploadrif_rr },
29515
2
  { Hexagon::L4_ploadritnew_abs, Hexagon::L4_ploadrit_abs },
29516
2
  { Hexagon::L4_ploadritnew_rr, Hexagon::L4_ploadrit_rr },
29517
2
  { Hexagon::L4_ploadrubfnew_abs, Hexagon::L4_ploadrubf_abs },
29518
2
  { Hexagon::L4_ploadrubfnew_rr, Hexagon::L4_ploadrubf_rr },
29519
2
  { Hexagon::L4_ploadrubtnew_abs, Hexagon::L4_ploadrubt_abs },
29520
2
  { Hexagon::L4_ploadrubtnew_rr, Hexagon::L4_ploadrubt_rr },
29521
2
  { Hexagon::L4_ploadruhfnew_abs, Hexagon::L4_ploadruhf_abs },
29522
2
  { Hexagon::L4_ploadruhfnew_rr, Hexagon::L4_ploadruhf_rr },
29523
2
  { Hexagon::L4_ploadruhtnew_abs, Hexagon::L4_ploadruht_abs },
29524
2
  { Hexagon::L4_ploadruhtnew_rr, Hexagon::L4_ploadruht_rr },
29525
2
  { Hexagon::L4_return_fnew_pt, Hexagon::L4_return_f },
29526
2
  { Hexagon::L4_return_tnew_pt, Hexagon::L4_return_t },
29527
2
  { Hexagon::PS_jmpretfnew, Hexagon::PS_jmpretf },
29528
2
  { Hexagon::PS_jmprettnew, Hexagon::PS_jmprett },
29529
2
  { Hexagon::S2_pstorerbfnew_pi, Hexagon::S2_pstorerbf_pi },
29530
2
  { Hexagon::S2_pstorerbnewfnew_pi, Hexagon::S2_pstorerbnewf_pi },
29531
2
  { Hexagon::S2_pstorerbnewtnew_pi, Hexagon::S2_pstorerbnewt_pi },
29532
2
  { Hexagon::S2_pstorerbtnew_pi, Hexagon::S2_pstorerbt_pi },
29533
2
  { Hexagon::S2_pstorerdfnew_pi, Hexagon::S2_pstorerdf_pi },
29534
2
  { Hexagon::S2_pstorerdtnew_pi, Hexagon::S2_pstorerdt_pi },
29535
2
  { Hexagon::S2_pstorerffnew_pi, Hexagon::S2_pstorerff_pi },
29536
2
  { Hexagon::S2_pstorerftnew_pi, Hexagon::S2_pstorerft_pi },
29537
2
  { Hexagon::S2_pstorerhfnew_pi, Hexagon::S2_pstorerhf_pi },
29538
2
  { Hexagon::S2_pstorerhnewfnew_pi, Hexagon::S2_pstorerhnewf_pi },
29539
2
  { Hexagon::S2_pstorerhnewtnew_pi, Hexagon::S2_pstorerhnewt_pi },
29540
2
  { Hexagon::S2_pstorerhtnew_pi, Hexagon::S2_pstorerht_pi },
29541
2
  { Hexagon::S2_pstorerifnew_pi, Hexagon::S2_pstorerif_pi },
29542
2
  { Hexagon::S2_pstorerinewfnew_pi, Hexagon::S2_pstorerinewf_pi },
29543
2
  { Hexagon::S2_pstorerinewtnew_pi, Hexagon::S2_pstorerinewt_pi },
29544
2
  { Hexagon::S2_pstoreritnew_pi, Hexagon::S2_pstorerit_pi },
29545
2
  { Hexagon::S4_pstorerbfnew_abs, Hexagon::S4_pstorerbf_abs },
29546
2
  { Hexagon::S4_pstorerbfnew_io, Hexagon::S2_pstorerbf_io },
29547
2
  { Hexagon::S4_pstorerbfnew_rr, Hexagon::S4_pstorerbf_rr },
29548
2
  { Hexagon::S4_pstorerbnewfnew_abs, Hexagon::S4_pstorerbnewf_abs },
29549
2
  { Hexagon::S4_pstorerbnewfnew_io, Hexagon::S2_pstorerbnewf_io },
29550
2
  { Hexagon::S4_pstorerbnewfnew_rr, Hexagon::S4_pstorerbnewf_rr },
29551
2
  { Hexagon::S4_pstorerbnewtnew_abs, Hexagon::S4_pstorerbnewt_abs },
29552
2
  { Hexagon::S4_pstorerbnewtnew_io, Hexagon::S2_pstorerbnewt_io },
29553
2
  { Hexagon::S4_pstorerbnewtnew_rr, Hexagon::S4_pstorerbnewt_rr },
29554
2
  { Hexagon::S4_pstorerbtnew_abs, Hexagon::S4_pstorerbt_abs },
29555
2
  { Hexagon::S4_pstorerbtnew_io, Hexagon::S2_pstorerbt_io },
29556
2
  { Hexagon::S4_pstorerbtnew_rr, Hexagon::S4_pstorerbt_rr },
29557
2
  { Hexagon::S4_pstorerdfnew_abs, Hexagon::S4_pstorerdf_abs },
29558
2
  { Hexagon::S4_pstorerdfnew_io, Hexagon::S2_pstorerdf_io },
29559
2
  { Hexagon::S4_pstorerdfnew_rr, Hexagon::S4_pstorerdf_rr },
29560
2
  { Hexagon::S4_pstorerdtnew_abs, Hexagon::S4_pstorerdt_abs },
29561
2
  { Hexagon::S4_pstorerdtnew_io, Hexagon::S2_pstorerdt_io },
29562
2
  { Hexagon::S4_pstorerdtnew_rr, Hexagon::S4_pstorerdt_rr },
29563
2
  { Hexagon::S4_pstorerffnew_abs, Hexagon::S4_pstorerff_abs },
29564
2
  { Hexagon::S4_pstorerffnew_io, Hexagon::S2_pstorerff_io },
29565
2
  { Hexagon::S4_pstorerffnew_rr, Hexagon::S4_pstorerff_rr },
29566
2
  { Hexagon::S4_pstorerftnew_abs, Hexagon::S4_pstorerft_abs },
29567
2
  { Hexagon::S4_pstorerftnew_io, Hexagon::S2_pstorerft_io },
29568
2
  { Hexagon::S4_pstorerftnew_rr, Hexagon::S4_pstorerft_rr },
29569
2
  { Hexagon::S4_pstorerhfnew_abs, Hexagon::S4_pstorerhf_abs },
29570
2
  { Hexagon::S4_pstorerhfnew_io, Hexagon::S2_pstorerhf_io },
29571
2
  { Hexagon::S4_pstorerhfnew_rr, Hexagon::S4_pstorerhf_rr },
29572
2
  { Hexagon::S4_pstorerhnewfnew_abs, Hexagon::S4_pstorerhnewf_abs },
29573
2
  { Hexagon::S4_pstorerhnewfnew_io, Hexagon::S2_pstorerhnewf_io },
29574
2
  { Hexagon::S4_pstorerhnewfnew_rr, Hexagon::S4_pstorerhnewf_rr },
29575
2
  { Hexagon::S4_pstorerhnewtnew_abs, Hexagon::S4_pstorerhnewt_abs },
29576
2
  { Hexagon::S4_pstorerhnewtnew_io, Hexagon::S2_pstorerhnewt_io },
29577
2
  { Hexagon::S4_pstorerhnewtnew_rr, Hexagon::S4_pstorerhnewt_rr },
29578
2
  { Hexagon::S4_pstorerhtnew_abs, Hexagon::S4_pstorerht_abs },
29579
2
  { Hexagon::S4_pstorerhtnew_io, Hexagon::S2_pstorerht_io },
29580
2
  { Hexagon::S4_pstorerhtnew_rr, Hexagon::S4_pstorerht_rr },
29581
2
  { Hexagon::S4_pstorerifnew_abs, Hexagon::S4_pstorerif_abs },
29582
2
  { Hexagon::S4_pstorerifnew_io, Hexagon::S2_pstorerif_io },
29583
2
  { Hexagon::S4_pstorerifnew_rr, Hexagon::S4_pstorerif_rr },
29584
2
  { Hexagon::S4_pstorerinewfnew_abs, Hexagon::S4_pstorerinewf_abs },
29585
2
  { Hexagon::S4_pstorerinewfnew_io, Hexagon::S2_pstorerinewf_io },
29586
2
  { Hexagon::S4_pstorerinewfnew_rr, Hexagon::S4_pstorerinewf_rr },
29587
2
  { Hexagon::S4_pstorerinewtnew_abs, Hexagon::S4_pstorerinewt_abs },
29588
2
  { Hexagon::S4_pstorerinewtnew_io, Hexagon::S2_pstorerinewt_io },
29589
2
  { Hexagon::S4_pstorerinewtnew_rr, Hexagon::S4_pstorerinewt_rr },
29590
2
  { Hexagon::S4_pstoreritnew_abs, Hexagon::S4_pstorerit_abs },
29591
2
  { Hexagon::S4_pstoreritnew_io, Hexagon::S2_pstorerit_io },
29592
2
  { Hexagon::S4_pstoreritnew_rr, Hexagon::S4_pstorerit_rr },
29593
2
  { Hexagon::S4_storeirbfnew_io, Hexagon::S4_storeirbf_io },
29594
2
  { Hexagon::S4_storeirbtnew_io, Hexagon::S4_storeirbt_io },
29595
2
  { Hexagon::S4_storeirhfnew_io, Hexagon::S4_storeirhf_io },
29596
2
  { Hexagon::S4_storeirhtnew_io, Hexagon::S4_storeirht_io },
29597
2
  { Hexagon::S4_storeirifnew_io, Hexagon::S4_storeirif_io },
29598
2
  { Hexagon::S4_storeiritnew_io, Hexagon::S4_storeirit_io },
29599
2
}; // End of getPredOldOpcodeTable
29600
29601
2
  unsigned mid;
29602
2
  unsigned start = 0;
29603
2
  unsigned end = 162;
29604
16
  while (start < end) {
29605
16
    mid = start + (end - start) / 2;
29606
16
    if (Opcode == getPredOldOpcodeTable[mid][0]) {
29607
2
      break;
29608
2
    }
29609
14
    if (Opcode < getPredOldOpcodeTable[mid][0])
29610
12
      end = mid;
29611
2
    else
29612
2
      start = mid + 1;
29613
14
  }
29614
2
  if (start == end)
29615
0
    return -1; // Instruction doesn't exist in this table.
29616
29617
2
  return getPredOldOpcodeTable[mid][1];
29618
2
}
29619
29620
// getPredOpcode
29621
LLVM_READONLY
29622
153
int getPredOpcode(uint16_t Opcode, enum PredSense inPredSense) {
29623
153
static const uint16_t getPredOpcodeTable[][3] = {
29624
153
  { Hexagon::A2_tfrp, Hexagon::A2_tfrpt, Hexagon::A2_tfrpf },
29625
153
  { Hexagon::A2_zxtb, Hexagon::A4_pzxtbt, Hexagon::A4_pzxtbf },
29626
153
  { Hexagon::A2_add, Hexagon::A2_paddt, Hexagon::A2_paddf },
29627
153
  { Hexagon::A2_addi, Hexagon::A2_paddit, Hexagon::A2_paddif },
29628
153
  { Hexagon::A2_and, Hexagon::A2_pandt, Hexagon::A2_pandf },
29629
153
  { Hexagon::A2_aslh, Hexagon::A4_paslht, Hexagon::A4_paslhf },
29630
153
  { Hexagon::A2_asrh, Hexagon::A4_pasrht, Hexagon::A4_pasrhf },
29631
153
  { Hexagon::A2_combinew, Hexagon::C2_ccombinewt, Hexagon::C2_ccombinewf },
29632
153
  { Hexagon::A2_or, Hexagon::A2_port, Hexagon::A2_porf },
29633
153
  { Hexagon::A2_sub, Hexagon::A2_psubt, Hexagon::A2_psubf },
29634
153
  { Hexagon::A2_sxtb, Hexagon::A4_psxtbt, Hexagon::A4_psxtbf },
29635
153
  { Hexagon::A2_sxth, Hexagon::A4_psxtht, Hexagon::A4_psxthf },
29636
153
  { Hexagon::A2_tfr, Hexagon::A2_tfrt, Hexagon::A2_tfrf },
29637
153
  { Hexagon::A2_tfrsi, Hexagon::C2_cmoveit, Hexagon::C2_cmoveif },
29638
153
  { Hexagon::A2_xor, Hexagon::A2_pxort, Hexagon::A2_pxorf },
29639
153
  { Hexagon::A2_zxth, Hexagon::A4_pzxtht, Hexagon::A4_pzxthf },
29640
153
  { Hexagon::J2_call, Hexagon::J2_callt, Hexagon::J2_callf },
29641
153
  { Hexagon::J2_jump, Hexagon::J2_jumpt, Hexagon::J2_jumpf },
29642
153
  { Hexagon::J2_jumpr, Hexagon::J2_jumprt, Hexagon::J2_jumprf },
29643
153
  { Hexagon::L2_loadrb_io, Hexagon::L2_ploadrbt_io, Hexagon::L2_ploadrbf_io },
29644
153
  { Hexagon::L2_loadrb_pi, Hexagon::L2_ploadrbt_pi, Hexagon::L2_ploadrbf_pi },
29645
153
  { Hexagon::L2_loadrbgp, Hexagon::L4_ploadrbt_abs, Hexagon::L4_ploadrbf_abs },
29646
153
  { Hexagon::L2_loadrd_io, Hexagon::L2_ploadrdt_io, Hexagon::L2_ploadrdf_io },
29647
153
  { Hexagon::L2_loadrd_pi, Hexagon::L2_ploadrdt_pi, Hexagon::L2_ploadrdf_pi },
29648
153
  { Hexagon::L2_loadrdgp, Hexagon::L4_ploadrdt_abs, Hexagon::L4_ploadrdf_abs },
29649
153
  { Hexagon::L2_loadrh_io, Hexagon::L2_ploadrht_io, Hexagon::L2_ploadrhf_io },
29650
153
  { Hexagon::L2_loadrh_pi, Hexagon::L2_ploadrht_pi, Hexagon::L2_ploadrhf_pi },
29651
153
  { Hexagon::L2_loadrhgp, Hexagon::L4_ploadrht_abs, Hexagon::L4_ploadrhf_abs },
29652
153
  { Hexagon::L2_loadri_io, Hexagon::L2_ploadrit_io, Hexagon::L2_ploadrif_io },
29653
153
  { Hexagon::L2_loadri_pi, Hexagon::L2_ploadrit_pi, Hexagon::L2_ploadrif_pi },
29654
153
  { Hexagon::L2_loadrigp, Hexagon::L4_ploadrit_abs, Hexagon::L4_ploadrif_abs },
29655
153
  { Hexagon::L2_loadrub_io, Hexagon::L2_ploadrubt_io, Hexagon::L2_ploadrubf_io },
29656
153
  { Hexagon::L2_loadrub_pi, Hexagon::L2_ploadrubt_pi, Hexagon::L2_ploadrubf_pi },
29657
153
  { Hexagon::L2_loadrubgp, Hexagon::L4_ploadrubt_abs, Hexagon::L4_ploadrubf_abs },
29658
153
  { Hexagon::L2_loadruh_io, Hexagon::L2_ploadruht_io, Hexagon::L2_ploadruhf_io },
29659
153
  { Hexagon::L2_loadruh_pi, Hexagon::L2_ploadruht_pi, Hexagon::L2_ploadruhf_pi },
29660
153
  { Hexagon::L2_loadruhgp, Hexagon::L4_ploadruht_abs, Hexagon::L4_ploadruhf_abs },
29661
153
  { Hexagon::L4_loadrb_rr, Hexagon::L4_ploadrbt_rr, Hexagon::L4_ploadrbf_rr },
29662
153
  { Hexagon::L4_loadrd_rr, Hexagon::L4_ploadrdt_rr, Hexagon::L4_ploadrdf_rr },
29663
153
  { Hexagon::L4_loadrh_rr, Hexagon::L4_ploadrht_rr, Hexagon::L4_ploadrhf_rr },
29664
153
  { Hexagon::L4_loadri_rr, Hexagon::L4_ploadrit_rr, Hexagon::L4_ploadrif_rr },
29665
153
  { Hexagon::L4_loadrub_rr, Hexagon::L4_ploadrubt_rr, Hexagon::L4_ploadrubf_rr },
29666
153
  { Hexagon::L4_loadruh_rr, Hexagon::L4_ploadruht_rr, Hexagon::L4_ploadruhf_rr },
29667
153
  { Hexagon::L4_return, Hexagon::L4_return_t, Hexagon::L4_return_f },
29668
153
  { Hexagon::PS_jmpret, Hexagon::PS_jmprett, Hexagon::PS_jmpretf },
29669
153
  { Hexagon::PS_loadrbabs, Hexagon::L4_ploadrbt_abs, Hexagon::L4_ploadrbf_abs },
29670
153
  { Hexagon::PS_loadrdabs, Hexagon::L4_ploadrdt_abs, Hexagon::L4_ploadrdf_abs },
29671
153
  { Hexagon::PS_loadrhabs, Hexagon::L4_ploadrht_abs, Hexagon::L4_ploadrhf_abs },
29672
153
  { Hexagon::PS_loadriabs, Hexagon::L4_ploadrit_abs, Hexagon::L4_ploadrif_abs },
29673
153
  { Hexagon::PS_loadrubabs, Hexagon::L4_ploadrubt_abs, Hexagon::L4_ploadrubf_abs },
29674
153
  { Hexagon::PS_loadruhabs, Hexagon::L4_ploadruht_abs, Hexagon::L4_ploadruhf_abs },
29675
153
  { Hexagon::PS_storerbabs, Hexagon::S4_pstorerbt_abs, Hexagon::S4_pstorerbf_abs },
29676
153
  { Hexagon::PS_storerbnewabs, Hexagon::S4_pstorerbnewt_abs, Hexagon::S4_pstorerbnewf_abs },
29677
153
  { Hexagon::PS_storerdabs, Hexagon::S4_pstorerdt_abs, Hexagon::S4_pstorerdf_abs },
29678
153
  { Hexagon::PS_storerfabs, Hexagon::S4_pstorerft_abs, Hexagon::S4_pstorerff_abs },
29679
153
  { Hexagon::PS_storerhabs, Hexagon::S4_pstorerht_abs, Hexagon::S4_pstorerhf_abs },
29680
153
  { Hexagon::PS_storerhnewabs, Hexagon::S4_pstorerhnewt_abs, Hexagon::S4_pstorerhnewf_abs },
29681
153
  { Hexagon::PS_storeriabs, Hexagon::S4_pstorerit_abs, Hexagon::S4_pstorerif_abs },
29682
153
  { Hexagon::PS_storerinewabs, Hexagon::S4_pstorerinewt_abs, Hexagon::S4_pstorerinewf_abs },
29683
153
  { Hexagon::S2_storerb_io, Hexagon::S2_pstorerbt_io, Hexagon::S2_pstorerbf_io },
29684
153
  { Hexagon::S2_storerb_pi, Hexagon::S2_pstorerbt_pi, Hexagon::S2_pstorerbf_pi },
29685
153
  { Hexagon::S2_storerbgp, Hexagon::S4_pstorerbt_abs, Hexagon::S4_pstorerbf_abs },
29686
153
  { Hexagon::S2_storerbnew_io, Hexagon::S2_pstorerbnewt_io, Hexagon::S2_pstorerbnewf_io },
29687
153
  { Hexagon::S2_storerbnew_pi, Hexagon::S2_pstorerbnewt_pi, Hexagon::S2_pstorerbnewf_pi },
29688
153
  { Hexagon::S2_storerbnewgp, Hexagon::S4_pstorerbnewt_abs, Hexagon::S4_pstorerbnewf_abs },
29689
153
  { Hexagon::S2_storerd_io, Hexagon::S2_pstorerdt_io, Hexagon::S2_pstorerdf_io },
29690
153
  { Hexagon::S2_storerd_pi, Hexagon::S2_pstorerdt_pi, Hexagon::S2_pstorerdf_pi },
29691
153
  { Hexagon::S2_storerdgp, Hexagon::S4_pstorerdt_abs, Hexagon::S4_pstorerdf_abs },
29692
153
  { Hexagon::S2_storerf_io, Hexagon::S2_pstorerft_io, Hexagon::S2_pstorerff_io },
29693
153
  { Hexagon::S2_storerf_pi, Hexagon::S2_pstorerft_pi, Hexagon::S2_pstorerff_pi },
29694
153
  { Hexagon::S2_storerfgp, Hexagon::S4_pstorerft_abs, Hexagon::S4_pstorerff_abs },
29695
153
  { Hexagon::S2_storerh_io, Hexagon::S2_pstorerht_io, Hexagon::S2_pstorerhf_io },
29696
153
  { Hexagon::S2_storerh_pi, Hexagon::S2_pstorerht_pi, Hexagon::S2_pstorerhf_pi },
29697
153
  { Hexagon::S2_storerhgp, Hexagon::S4_pstorerht_abs, Hexagon::S4_pstorerhf_abs },
29698
153
  { Hexagon::S2_storerhnew_io, Hexagon::S2_pstorerhnewt_io, Hexagon::S2_pstorerhnewf_io },
29699
153
  { Hexagon::S2_storerhnew_pi, Hexagon::S2_pstorerhnewt_pi, Hexagon::S2_pstorerhnewf_pi },
29700
153
  { Hexagon::S2_storerhnewgp, Hexagon::S4_pstorerhnewt_abs, Hexagon::S4_pstorerhnewf_abs },
29701
153
  { Hexagon::S2_storeri_io, Hexagon::S2_pstorerit_io, Hexagon::S2_pstorerif_io },
29702
153
  { Hexagon::S2_storeri_pi, Hexagon::S2_pstorerit_pi, Hexagon::S2_pstorerif_pi },
29703
153
  { Hexagon::S2_storerigp, Hexagon::S4_pstorerit_abs, Hexagon::S4_pstorerif_abs },
29704
153
  { Hexagon::S2_storerinew_io, Hexagon::S2_pstorerinewt_io, Hexagon::S2_pstorerinewf_io },
29705
153
  { Hexagon::S2_storerinew_pi, Hexagon::S2_pstorerinewt_pi, Hexagon::S2_pstorerinewf_pi },
29706
153
  { Hexagon::S2_storerinewgp, Hexagon::S4_pstorerinewt_abs, Hexagon::S4_pstorerinewf_abs },
29707
153
  { Hexagon::S4_storeirb_io, Hexagon::S4_storeirbt_io, Hexagon::S4_storeirbf_io },
29708
153
  { Hexagon::S4_storeirh_io, Hexagon::S4_storeirht_io, Hexagon::S4_storeirhf_io },
29709
153
  { Hexagon::S4_storeiri_io, Hexagon::S4_storeirit_io, Hexagon::S4_storeirif_io },
29710
153
  { Hexagon::S4_storerb_rr, Hexagon::S4_pstorerbt_rr, Hexagon::S4_pstorerbf_rr },
29711
153
  { Hexagon::S4_storerbnew_rr, Hexagon::S4_pstorerbnewt_rr, Hexagon::S4_pstorerbnewf_rr },
29712
153
  { Hexagon::S4_storerd_rr, Hexagon::S4_pstorerdt_rr, Hexagon::S4_pstorerdf_rr },
29713
153
  { Hexagon::S4_storerf_rr, Hexagon::S4_pstorerft_rr, Hexagon::S4_pstorerff_rr },
29714
153
  { Hexagon::S4_storerf_ur, Hexagon::S4_pstorerft_rr, Hexagon::S4_pstorerff_rr },
29715
153
  { Hexagon::S4_storerh_rr, Hexagon::S4_pstorerht_rr, Hexagon::S4_pstorerhf_rr },
29716
153
  { Hexagon::S4_storerhnew_rr, Hexagon::S4_pstorerhnewt_rr, Hexagon::S4_pstorerhnewf_rr },
29717
153
  { Hexagon::S4_storeri_rr, Hexagon::S4_pstorerit_rr, Hexagon::S4_pstorerif_rr },
29718
153
  { Hexagon::S4_storerinew_rr, Hexagon::S4_pstorerinewt_rr, Hexagon::S4_pstorerinewf_rr },
29719
153
  { Hexagon::V6_vL32b_ai, Hexagon::V6_vL32b_pred_ai, Hexagon::V6_vL32b_npred_ai },
29720
153
  { Hexagon::V6_vL32b_cur_ai, Hexagon::V6_vL32b_cur_pred_ai, Hexagon::V6_vL32b_cur_npred_ai },
29721
153
  { Hexagon::V6_vL32b_cur_pi, Hexagon::V6_vL32b_cur_pred_pi, Hexagon::V6_vL32b_cur_npred_pi },
29722
153
  { Hexagon::V6_vL32b_cur_ppu, Hexagon::V6_vL32b_cur_pred_ppu, Hexagon::V6_vL32b_cur_npred_ppu },
29723
153
  { Hexagon::V6_vL32b_nt_ai, Hexagon::V6_vL32b_nt_pred_ai, Hexagon::V6_vL32b_nt_npred_ai },
29724
153
  { Hexagon::V6_vL32b_nt_cur_ai, Hexagon::V6_vL32b_nt_cur_pred_ai, Hexagon::V6_vL32b_nt_cur_npred_ai },
29725
153
  { Hexagon::V6_vL32b_nt_cur_pi, Hexagon::V6_vL32b_nt_cur_pred_pi, Hexagon::V6_vL32b_nt_cur_npred_pi },
29726
153
  { Hexagon::V6_vL32b_nt_cur_ppu, Hexagon::V6_vL32b_nt_cur_pred_ppu, Hexagon::V6_vL32b_nt_cur_npred_ppu },
29727
153
  { Hexagon::V6_vL32b_nt_pi, Hexagon::V6_vL32b_nt_pred_pi, Hexagon::V6_vL32b_nt_npred_pi },
29728
153
  { Hexagon::V6_vL32b_nt_ppu, Hexagon::V6_vL32b_nt_pred_ppu, Hexagon::V6_vL32b_nt_npred_ppu },
29729
153
  { Hexagon::V6_vL32b_nt_tmp_ai, Hexagon::V6_vL32b_nt_tmp_pred_ai, Hexagon::V6_vL32b_nt_tmp_npred_ai },
29730
153
  { Hexagon::V6_vL32b_nt_tmp_pi, Hexagon::V6_vL32b_nt_tmp_pred_pi, Hexagon::V6_vL32b_nt_tmp_npred_pi },
29731
153
  { Hexagon::V6_vL32b_nt_tmp_ppu, Hexagon::V6_vL32b_nt_tmp_pred_ppu, Hexagon::V6_vL32b_nt_tmp_npred_ppu },
29732
153
  { Hexagon::V6_vL32b_pi, Hexagon::V6_vL32b_pred_pi, Hexagon::V6_vL32b_npred_pi },
29733
153
  { Hexagon::V6_vL32b_ppu, Hexagon::V6_vL32b_pred_ppu, Hexagon::V6_vL32b_npred_ppu },
29734
153
  { Hexagon::V6_vL32b_tmp_ai, Hexagon::V6_vL32b_tmp_pred_ai, Hexagon::V6_vL32b_tmp_npred_ai },
29735
153
  { Hexagon::V6_vL32b_tmp_pi, Hexagon::V6_vL32b_tmp_pred_pi, Hexagon::V6_vL32b_tmp_npred_pi },
29736
153
  { Hexagon::V6_vL32b_tmp_ppu, Hexagon::V6_vL32b_tmp_pred_ppu, Hexagon::V6_vL32b_tmp_npred_ppu },
29737
153
  { Hexagon::V6_vS32Ub_ai, Hexagon::V6_vS32Ub_pred_ai, Hexagon::V6_vS32Ub_npred_ai },
29738
153
  { Hexagon::V6_vS32Ub_pi, Hexagon::V6_vS32Ub_pred_pi, Hexagon::V6_vS32Ub_npred_pi },
29739
153
  { Hexagon::V6_vS32Ub_ppu, Hexagon::V6_vS32Ub_pred_ppu, Hexagon::V6_vS32Ub_npred_ppu },
29740
153
  { Hexagon::V6_vS32b_ai, Hexagon::V6_vS32b_pred_ai, Hexagon::V6_vS32b_npred_ai },
29741
153
  { Hexagon::V6_vS32b_new_ai, Hexagon::V6_vS32b_new_pred_ai, Hexagon::V6_vS32b_new_npred_ai },
29742
153
  { Hexagon::V6_vS32b_new_pi, Hexagon::V6_vS32b_new_pred_pi, Hexagon::V6_vS32b_new_npred_pi },
29743
153
  { Hexagon::V6_vS32b_new_ppu, Hexagon::V6_vS32b_new_pred_ppu, Hexagon::V6_vS32b_new_npred_ppu },
29744
153
  { Hexagon::V6_vS32b_nt_ai, Hexagon::V6_vS32b_nt_pred_ai, Hexagon::V6_vS32b_nt_npred_ai },
29745
153
  { Hexagon::V6_vS32b_nt_new_ai, Hexagon::V6_vS32b_nt_new_pred_ai, Hexagon::V6_vS32b_nt_new_npred_ai },
29746
153
  { Hexagon::V6_vS32b_nt_new_pi, Hexagon::V6_vS32b_nt_new_pred_pi, Hexagon::V6_vS32b_nt_new_npred_pi },
29747
153
  { Hexagon::V6_vS32b_nt_new_ppu, Hexagon::V6_vS32b_nt_new_pred_ppu, Hexagon::V6_vS32b_nt_new_npred_ppu },
29748
153
  { Hexagon::V6_vS32b_nt_pi, Hexagon::V6_vS32b_nt_pred_pi, Hexagon::V6_vS32b_nt_npred_pi },
29749
153
  { Hexagon::V6_vS32b_nt_ppu, Hexagon::V6_vS32b_nt_pred_ppu, Hexagon::V6_vS32b_nt_npred_ppu },
29750
153
  { Hexagon::V6_vS32b_pi, Hexagon::V6_vS32b_pred_pi, Hexagon::V6_vS32b_npred_pi },
29751
153
  { Hexagon::V6_vS32b_ppu, Hexagon::V6_vS32b_pred_ppu, Hexagon::V6_vS32b_npred_ppu },
29752
153
}; // End of getPredOpcodeTable
29753
29754
153
  unsigned mid;
29755
153
  unsigned start = 0;
29756
153
  unsigned end = 128;
29757
1.06k
  while (start < end) {
29758
1.06k
    mid = start + (end - start) / 2;
29759
1.06k
    if (Opcode == getPredOpcodeTable[mid][0]) {
29760
153
      break;
29761
153
    }
29762
915
    if (Opcode < getPredOpcodeTable[mid][0])
29763
703
      end = mid;
29764
212
    else
29765
212
      start = mid + 1;
29766
915
  }
29767
153
  if (start == end)
29768
0
    return -1; // Instruction doesn't exist in this table.
29769
29770
153
  if (inPredSense == PredSense_true)
29771
92
    return getPredOpcodeTable[mid][1];
29772
61
  if (inPredSense == PredSense_false)
29773
61
    return getPredOpcodeTable[mid][2];
29774
0
  return -1;}
29775
29776
// getRealHWInstr
29777
LLVM_READONLY
29778
0
int getRealHWInstr(uint16_t Opcode, enum InstrType inInstrType) {
29779
0
static const uint16_t getRealHWInstrTable[][3] = {
29780
0
  { Hexagon::INSTRUCTION_LIST_END, Hexagon::INSTRUCTION_LIST_END }}; // End of getRealHWInstrTable
29781
29782
0
  unsigned mid;
29783
0
  unsigned start = 0;
29784
0
  unsigned end = 0;
29785
0
  while (start < end) {
29786
0
    mid = start + (end - start) / 2;
29787
0
    if (Opcode == getRealHWInstrTable[mid][0]) {
29788
0
      break;
29789
0
    }
29790
0
    if (Opcode < getRealHWInstrTable[mid][0])
29791
0
      end = mid;
29792
0
    else
29793
0
      start = mid + 1;
29794
0
  }
29795
0
  if (start == end)
29796
0
    return -1; // Instruction doesn't exist in this table.
29797
29798
0
  if (inInstrType == InstrType_Pseudo)
29799
0
    return getRealHWInstrTable[mid][1];
29800
0
  if (inInstrType == InstrType_Real)
29801
0
    return getRealHWInstrTable[mid][2];
29802
0
  return -1;}
29803
29804
// getRegForm
29805
LLVM_READONLY
29806
0
int getRegForm(uint16_t Opcode) {
29807
0
static const uint16_t getRegFormTable[][2] = {
29808
0
  { Hexagon::M2_mpysmi, Hexagon::M2_mpyi },
29809
0
  { Hexagon::A2_addi, Hexagon::A2_add },
29810
0
  { Hexagon::A2_andir, Hexagon::A2_and },
29811
0
  { Hexagon::A2_orir, Hexagon::A2_or },
29812
0
  { Hexagon::A2_paddif, Hexagon::A2_paddf },
29813
0
  { Hexagon::A2_paddifnew, Hexagon::A2_paddfnew },
29814
0
  { Hexagon::A2_paddit, Hexagon::A2_paddt },
29815
0
  { Hexagon::A2_padditnew, Hexagon::A2_paddtnew },
29816
0
  { Hexagon::A2_subri, Hexagon::A2_sub },
29817
0
  { Hexagon::A4_cmpbeqi, Hexagon::A4_cmpbeq },
29818
0
  { Hexagon::A4_cmpbgti, Hexagon::A4_cmpbgt },
29819
0
  { Hexagon::A4_cmpbgtui, Hexagon::A4_cmpbgtu },
29820
0
  { Hexagon::A4_cmpheqi, Hexagon::A4_cmpheq },
29821
0
  { Hexagon::A4_cmphgti, Hexagon::A4_cmphgt },
29822
0
  { Hexagon::A4_cmphgtui, Hexagon::A4_cmphgtu },
29823
0
  { Hexagon::C2_cmoveif, Hexagon::A2_tfrf },
29824
0
  { Hexagon::C2_cmoveit, Hexagon::A2_tfrt },
29825
0
  { Hexagon::C2_cmovenewif, Hexagon::A2_tfrfnew },
29826
0
  { Hexagon::C2_cmovenewit, Hexagon::A2_tfrtnew },
29827
0
  { Hexagon::C2_cmpeqi, Hexagon::C2_cmpeq },
29828
0
  { Hexagon::C2_cmpgti, Hexagon::C2_cmpgt },
29829
0
  { Hexagon::C2_cmpgtui, Hexagon::C2_cmpgtu },
29830
0
  { Hexagon::C4_cmpltei, Hexagon::C4_cmplte },
29831
0
  { Hexagon::C4_cmplteui, Hexagon::C4_cmplteu },
29832
0
  { Hexagon::C4_cmpneqi, Hexagon::C4_cmpneq },
29833
0
  { Hexagon::M2_accii, Hexagon::M2_acci },
29834
0
  { Hexagon::M2_macsip, Hexagon::M2_maci },
29835
0
  { Hexagon::M4_mpyrr_addi, Hexagon::M4_mpyrr_addr },
29836
0
}; // End of getRegFormTable
29837
29838
0
  unsigned mid;
29839
0
  unsigned start = 0;
29840
0
  unsigned end = 28;
29841
0
  while (start < end) {
29842
0
    mid = start + (end - start) / 2;
29843
0
    if (Opcode == getRegFormTable[mid][0]) {
29844
0
      break;
29845
0
    }
29846
0
    if (Opcode < getRegFormTable[mid][0])
29847
0
      end = mid;
29848
0
    else
29849
0
      start = mid + 1;
29850
0
  }
29851
0
  if (start == end)
29852
0
    return -1; // Instruction doesn't exist in this table.
29853
29854
0
  return getRegFormTable[mid][1];
29855
0
}
29856
29857
// getTruePredOpcode
29858
LLVM_READONLY
29859
190
int getTruePredOpcode(uint16_t Opcode) {
29860
190
static const uint16_t getTruePredOpcodeTable[][2] = {
29861
190
  { Hexagon::A2_tfrf, Hexagon::A2_tfrt },
29862
190
  { Hexagon::A2_tfrfnew, Hexagon::A2_tfrtnew },
29863
190
  { Hexagon::A2_tfrpf, Hexagon::A2_tfrpt },
29864
190
  { Hexagon::A2_tfrpfnew, Hexagon::A2_tfrptnew },
29865
190
  { Hexagon::A2_paddf, Hexagon::A2_paddt },
29866
190
  { Hexagon::A2_paddfnew, Hexagon::A2_paddtnew },
29867
190
  { Hexagon::A2_paddif, Hexagon::A2_paddit },
29868
190
  { Hexagon::A2_paddifnew, Hexagon::A2_padditnew },
29869
190
  { Hexagon::A2_pandf, Hexagon::A2_pandt },
29870
190
  { Hexagon::A2_pandfnew, Hexagon::A2_pandtnew },
29871
190
  { Hexagon::A2_porf, Hexagon::A2_port },
29872
190
  { Hexagon::A2_porfnew, Hexagon::A2_portnew },
29873
190
  { Hexagon::A2_psubf, Hexagon::A2_psubt },
29874
190
  { Hexagon::A2_psubfnew, Hexagon::A2_psubtnew },
29875
190
  { Hexagon::A2_pxorf, Hexagon::A2_pxort },
29876
190
  { Hexagon::A2_pxorfnew, Hexagon::A2_pxortnew },
29877
190
  { Hexagon::A4_paslhf, Hexagon::A4_paslht },
29878
190
  { Hexagon::A4_paslhfnew, Hexagon::A4_paslhtnew },
29879
190
  { Hexagon::A4_pasrhf, Hexagon::A4_pasrht },
29880
190
  { Hexagon::A4_pasrhfnew, Hexagon::A4_pasrhtnew },
29881
190
  { Hexagon::A4_psxtbf, Hexagon::A4_psxtbt },
29882
190
  { Hexagon::A4_psxtbfnew, Hexagon::A4_psxtbtnew },
29883
190
  { Hexagon::A4_psxthf, Hexagon::A4_psxtht },
29884
190
  { Hexagon::A4_psxthfnew, Hexagon::A4_psxthtnew },
29885
190
  { Hexagon::A4_pzxtbf, Hexagon::A4_pzxtbt },
29886
190
  { Hexagon::A4_pzxtbfnew, Hexagon::A4_pzxtbtnew },
29887
190
  { Hexagon::A4_pzxthf, Hexagon::A4_pzxtht },
29888
190
  { Hexagon::A4_pzxthfnew, Hexagon::A4_pzxthtnew },
29889
190
  { Hexagon::C2_ccombinewf, Hexagon::C2_ccombinewt },
29890
190
  { Hexagon::C2_ccombinewnewf, Hexagon::C2_ccombinewnewt },
29891
190
  { Hexagon::C2_cmoveif, Hexagon::C2_cmoveit },
29892
190
  { Hexagon::C2_cmovenewif, Hexagon::C2_cmovenewit },
29893
190
  { Hexagon::J2_callf, Hexagon::J2_callt },
29894
190
  { Hexagon::J2_jumpf, Hexagon::J2_jumpt },
29895
190
  { Hexagon::J2_jumpfnew, Hexagon::J2_jumptnew },
29896
190
  { Hexagon::J2_jumpfnewpt, Hexagon::J2_jumptnewpt },
29897
190
  { Hexagon::J2_jumpfpt, Hexagon::J2_jumptpt },
29898
190
  { Hexagon::J2_jumprf, Hexagon::J2_jumprt },
29899
190
  { Hexagon::J2_jumprfnew, Hexagon::J2_jumprtnew },
29900
190
  { Hexagon::J2_jumprfnewpt, Hexagon::J2_jumprtnewpt },
29901
190
  { Hexagon::J2_jumprfpt, Hexagon::J2_jumprtpt },
29902
190
  { Hexagon::J4_cmpeq_f_jumpnv_nt, Hexagon::J4_cmpeq_t_jumpnv_nt },
29903
190
  { Hexagon::J4_cmpeq_f_jumpnv_t, Hexagon::J4_cmpeq_t_jumpnv_t },
29904
190
  { Hexagon::J4_cmpeq_fp0_jump_nt, Hexagon::J4_cmpeq_tp0_jump_nt },
29905
190
  { Hexagon::J4_cmpeq_fp0_jump_t, Hexagon::J4_cmpeq_tp0_jump_t },
29906
190
  { Hexagon::J4_cmpeq_fp1_jump_nt, Hexagon::J4_cmpeq_tp1_jump_nt },
29907
190
  { Hexagon::J4_cmpeq_fp1_jump_t, Hexagon::J4_cmpeq_tp1_jump_t },
29908
190
  { Hexagon::J4_cmpeqi_f_jumpnv_nt, Hexagon::J4_cmpeqi_t_jumpnv_nt },
29909
190
  { Hexagon::J4_cmpeqi_f_jumpnv_t, Hexagon::J4_cmpeqi_t_jumpnv_t },
29910
190
  { Hexagon::J4_cmpeqi_fp0_jump_nt, Hexagon::J4_cmpeqi_tp0_jump_nt },
29911
190
  { Hexagon::J4_cmpeqi_fp0_jump_t, Hexagon::J4_cmpeqi_tp0_jump_t },
29912
190
  { Hexagon::J4_cmpeqi_fp1_jump_nt, Hexagon::J4_cmpeqi_tp1_jump_nt },
29913
190
  { Hexagon::J4_cmpeqi_fp1_jump_t, Hexagon::J4_cmpeqi_tp1_jump_t },
29914
190
  { Hexagon::J4_cmpeqn1_f_jumpnv_nt, Hexagon::J4_cmpeqn1_t_jumpnv_nt },
29915
190
  { Hexagon::J4_cmpeqn1_f_jumpnv_t, Hexagon::J4_cmpeqn1_t_jumpnv_t },
29916
190
  { Hexagon::J4_cmpeqn1_fp0_jump_nt, Hexagon::J4_cmpeqn1_tp0_jump_nt },
29917
190
  { Hexagon::J4_cmpeqn1_fp0_jump_t, Hexagon::J4_cmpeqn1_tp0_jump_t },
29918
190
  { Hexagon::J4_cmpeqn1_fp1_jump_nt, Hexagon::J4_cmpeqn1_tp1_jump_nt },
29919
190
  { Hexagon::J4_cmpeqn1_fp1_jump_t, Hexagon::J4_cmpeqn1_tp1_jump_t },
29920
190
  { Hexagon::J4_cmpgt_f_jumpnv_nt, Hexagon::J4_cmpgt_t_jumpnv_nt },
29921
190
  { Hexagon::J4_cmpgt_f_jumpnv_t, Hexagon::J4_cmpgt_t_jumpnv_t },
29922
190
  { Hexagon::J4_cmpgt_fp0_jump_nt, Hexagon::J4_cmpgt_tp0_jump_nt },
29923
190
  { Hexagon::J4_cmpgt_fp0_jump_t, Hexagon::J4_cmpgt_tp0_jump_t },
29924
190
  { Hexagon::J4_cmpgt_fp1_jump_nt, Hexagon::J4_cmpgt_tp1_jump_nt },
29925
190
  { Hexagon::J4_cmpgt_fp1_jump_t, Hexagon::J4_cmpgt_tp1_jump_t },
29926
190
  { Hexagon::J4_cmpgti_f_jumpnv_nt, Hexagon::J4_cmpgti_t_jumpnv_nt },
29927
190
  { Hexagon::J4_cmpgti_f_jumpnv_t, Hexagon::J4_cmpgti_t_jumpnv_t },
29928
190
  { Hexagon::J4_cmpgti_fp0_jump_nt, Hexagon::J4_cmpgti_tp0_jump_nt },
29929
190
  { Hexagon::J4_cmpgti_fp0_jump_t, Hexagon::J4_cmpgti_tp0_jump_t },
29930
190
  { Hexagon::J4_cmpgti_fp1_jump_nt, Hexagon::J4_cmpgti_tp1_jump_nt },
29931
190
  { Hexagon::J4_cmpgti_fp1_jump_t, Hexagon::J4_cmpgti_tp1_jump_t },
29932
190
  { Hexagon::J4_cmpgtn1_f_jumpnv_nt, Hexagon::J4_cmpgtn1_t_jumpnv_nt },
29933
190
  { Hexagon::J4_cmpgtn1_f_jumpnv_t, Hexagon::J4_cmpgtn1_t_jumpnv_t },
29934
190
  { Hexagon::J4_cmpgtn1_fp0_jump_nt, Hexagon::J4_cmpgtn1_tp0_jump_nt },
29935
190
  { Hexagon::J4_cmpgtn1_fp0_jump_t, Hexagon::J4_cmpgtn1_tp0_jump_t },
29936
190
  { Hexagon::J4_cmpgtn1_fp1_jump_nt, Hexagon::J4_cmpgtn1_tp1_jump_nt },
29937
190
  { Hexagon::J4_cmpgtn1_fp1_jump_t, Hexagon::J4_cmpgtn1_tp1_jump_t },
29938
190
  { Hexagon::J4_cmpgtu_f_jumpnv_nt, Hexagon::J4_cmpgtu_t_jumpnv_nt },
29939
190
  { Hexagon::J4_cmpgtu_f_jumpnv_t, Hexagon::J4_cmpgtu_t_jumpnv_t },
29940
190
  { Hexagon::J4_cmpgtu_fp0_jump_nt, Hexagon::J4_cmpgtu_tp0_jump_nt },
29941
190
  { Hexagon::J4_cmpgtu_fp0_jump_t, Hexagon::J4_cmpgtu_tp0_jump_t },
29942
190
  { Hexagon::J4_cmpgtu_fp1_jump_nt, Hexagon::J4_cmpgtu_tp1_jump_nt },
29943
190
  { Hexagon::J4_cmpgtu_fp1_jump_t, Hexagon::J4_cmpgtu_tp1_jump_t },
29944
190
  { Hexagon::J4_cmpgtui_f_jumpnv_nt, Hexagon::J4_cmpgtui_t_jumpnv_nt },
29945
190
  { Hexagon::J4_cmpgtui_f_jumpnv_t, Hexagon::J4_cmpgtui_t_jumpnv_t },
29946
190
  { Hexagon::J4_cmpgtui_fp0_jump_nt, Hexagon::J4_cmpgtui_tp0_jump_nt },
29947
190
  { Hexagon::J4_cmpgtui_fp0_jump_t, Hexagon::J4_cmpgtui_tp0_jump_t },
29948
190
  { Hexagon::J4_cmpgtui_fp1_jump_nt, Hexagon::J4_cmpgtui_tp1_jump_nt },
29949
190
  { Hexagon::J4_cmpgtui_fp1_jump_t, Hexagon::J4_cmpgtui_tp1_jump_t },
29950
190
  { Hexagon::J4_cmplt_f_jumpnv_nt, Hexagon::J4_cmplt_t_jumpnv_nt },
29951
190
  { Hexagon::J4_cmplt_f_jumpnv_t, Hexagon::J4_cmplt_t_jumpnv_t },
29952
190
  { Hexagon::J4_cmpltu_f_jumpnv_nt, Hexagon::J4_cmpltu_t_jumpnv_nt },
29953
190
  { Hexagon::J4_cmpltu_f_jumpnv_t, Hexagon::J4_cmpltu_t_jumpnv_t },
29954
190
  { Hexagon::L2_ploadrbf_io, Hexagon::L2_ploadrbt_io },
29955
190
  { Hexagon::L2_ploadrbf_pi, Hexagon::L2_ploadrbt_pi },
29956
190
  { Hexagon::L2_ploadrbfnew_io, Hexagon::L2_ploadrbtnew_io },
29957
190
  { Hexagon::L2_ploadrbfnew_pi, Hexagon::L2_ploadrbtnew_pi },
29958
190
  { Hexagon::L2_ploadrdf_io, Hexagon::L2_ploadrdt_io },
29959
190
  { Hexagon::L2_ploadrdf_pi, Hexagon::L2_ploadrdt_pi },
29960
190
  { Hexagon::L2_ploadrdfnew_io, Hexagon::L2_ploadrdtnew_io },
29961
190
  { Hexagon::L2_ploadrdfnew_pi, Hexagon::L2_ploadrdtnew_pi },
29962
190
  { Hexagon::L2_ploadrhf_io, Hexagon::L2_ploadrht_io },
29963
190
  { Hexagon::L2_ploadrhf_pi, Hexagon::L2_ploadrht_pi },
29964
190
  { Hexagon::L2_ploadrhfnew_io, Hexagon::L2_ploadrhtnew_io },
29965
190
  { Hexagon::L2_ploadrhfnew_pi, Hexagon::L2_ploadrhtnew_pi },
29966
190
  { Hexagon::L2_ploadrif_io, Hexagon::L2_ploadrit_io },
29967
190
  { Hexagon::L2_ploadrif_pi, Hexagon::L2_ploadrit_pi },
29968
190
  { Hexagon::L2_ploadrifnew_io, Hexagon::L2_ploadritnew_io },
29969
190
  { Hexagon::L2_ploadrifnew_pi, Hexagon::L2_ploadritnew_pi },
29970
190
  { Hexagon::L2_ploadrubf_io, Hexagon::L2_ploadrubt_io },
29971
190
  { Hexagon::L2_ploadrubf_pi, Hexagon::L2_ploadrubt_pi },
29972
190
  { Hexagon::L2_ploadrubfnew_io, Hexagon::L2_ploadrubtnew_io },
29973
190
  { Hexagon::L2_ploadrubfnew_pi, Hexagon::L2_ploadrubtnew_pi },
29974
190
  { Hexagon::L2_ploadruhf_io, Hexagon::L2_ploadruht_io },
29975
190
  { Hexagon::L2_ploadruhf_pi, Hexagon::L2_ploadruht_pi },
29976
190
  { Hexagon::L2_ploadruhfnew_io, Hexagon::L2_ploadruhtnew_io },
29977
190
  { Hexagon::L2_ploadruhfnew_pi, Hexagon::L2_ploadruhtnew_pi },
29978
190
  { Hexagon::L4_ploadrbf_abs, Hexagon::L4_ploadrbt_abs },
29979
190
  { Hexagon::L4_ploadrbf_rr, Hexagon::L4_ploadrbt_rr },
29980
190
  { Hexagon::L4_ploadrbfnew_abs, Hexagon::L4_ploadrbtnew_abs },
29981
190
  { Hexagon::L4_ploadrbfnew_rr, Hexagon::L4_ploadrbtnew_rr },
29982
190
  { Hexagon::L4_ploadrdf_abs, Hexagon::L4_ploadrdt_abs },
29983
190
  { Hexagon::L4_ploadrdf_rr, Hexagon::L4_ploadrdt_rr },
29984
190
  { Hexagon::L4_ploadrdfnew_abs, Hexagon::L4_ploadrdtnew_abs },
29985
190
  { Hexagon::L4_ploadrdfnew_rr, Hexagon::L4_ploadrdtnew_rr },
29986
190
  { Hexagon::L4_ploadrhf_abs, Hexagon::L4_ploadrht_abs },
29987
190
  { Hexagon::L4_ploadrhf_rr, Hexagon::L4_ploadrht_rr },
29988
190
  { Hexagon::L4_ploadrhfnew_abs, Hexagon::L4_ploadrhtnew_abs },
29989
190
  { Hexagon::L4_ploadrhfnew_rr, Hexagon::L4_ploadrhtnew_rr },
29990
190
  { Hexagon::L4_ploadrif_abs, Hexagon::L4_ploadrit_abs },
29991
190
  { Hexagon::L4_ploadrif_rr, Hexagon::L4_ploadrit_rr },
29992
190
  { Hexagon::L4_ploadrifnew_abs, Hexagon::L4_ploadritnew_abs },
29993
190
  { Hexagon::L4_ploadrifnew_rr, Hexagon::L4_ploadritnew_rr },
29994
190
  { Hexagon::L4_ploadrubf_abs, Hexagon::L4_ploadrubt_abs },
29995
190
  { Hexagon::L4_ploadrubf_rr, Hexagon::L4_ploadrubt_rr },
29996
190
  { Hexagon::L4_ploadrubfnew_abs, Hexagon::L4_ploadrubtnew_abs },
29997
190
  { Hexagon::L4_ploadrubfnew_rr, Hexagon::L4_ploadrubtnew_rr },
29998
190
  { Hexagon::L4_ploadruhf_abs, Hexagon::L4_ploadruht_abs },
29999
190
  { Hexagon::L4_ploadruhf_rr, Hexagon::L4_ploadruht_rr },
30000
190
  { Hexagon::L4_ploadruhfnew_abs, Hexagon::L4_ploadruhtnew_abs },
30001
190
  { Hexagon::L4_ploadruhfnew_rr, Hexagon::L4_ploadruhtnew_rr },
30002
190
  { Hexagon::L4_return_f, Hexagon::L4_return_t },
30003
190
  { Hexagon::L4_return_fnew_pnt, Hexagon::L4_return_tnew_pnt },
30004
190
  { Hexagon::L4_return_fnew_pt, Hexagon::L4_return_tnew_pt },
30005
190
  { Hexagon::PS_jmpretf, Hexagon::PS_jmprett },
30006
190
  { Hexagon::PS_jmpretfnew, Hexagon::PS_jmprettnew },
30007
190
  { Hexagon::PS_jmpretfnewpt, Hexagon::PS_jmprettnewpt },
30008
190
  { Hexagon::S2_pstorerbf_io, Hexagon::S2_pstorerbt_io },
30009
190
  { Hexagon::S2_pstorerbf_pi, Hexagon::S2_pstorerbt_pi },
30010
190
  { Hexagon::S2_pstorerbfnew_pi, Hexagon::S2_pstorerbtnew_pi },
30011
190
  { Hexagon::S2_pstorerbnewf_io, Hexagon::S2_pstorerbnewt_io },
30012
190
  { Hexagon::S2_pstorerbnewf_pi, Hexagon::S2_pstorerbnewt_pi },
30013
190
  { Hexagon::S2_pstorerbnewfnew_pi, Hexagon::S2_pstorerbnewtnew_pi },
30014
190
  { Hexagon::S2_pstorerdf_io, Hexagon::S2_pstorerdt_io },
30015
190
  { Hexagon::S2_pstorerdf_pi, Hexagon::S2_pstorerdt_pi },
30016
190
  { Hexagon::S2_pstorerdfnew_pi, Hexagon::S2_pstorerdtnew_pi },
30017
190
  { Hexagon::S2_pstorerff_io, Hexagon::S2_pstorerft_io },
30018
190
  { Hexagon::S2_pstorerff_pi, Hexagon::S2_pstorerft_pi },
30019
190
  { Hexagon::S2_pstorerffnew_pi, Hexagon::S2_pstorerftnew_pi },
30020
190
  { Hexagon::S2_pstorerhf_io, Hexagon::S2_pstorerht_io },
30021
190
  { Hexagon::S2_pstorerhf_pi, Hexagon::S2_pstorerht_pi },
30022
190
  { Hexagon::S2_pstorerhfnew_pi, Hexagon::S2_pstorerhtnew_pi },
30023
190
  { Hexagon::S2_pstorerhnewf_io, Hexagon::S2_pstorerhnewt_io },
30024
190
  { Hexagon::S2_pstorerhnewf_pi, Hexagon::S2_pstorerhnewt_pi },
30025
190
  { Hexagon::S2_pstorerhnewfnew_pi, Hexagon::S2_pstorerhnewtnew_pi },
30026
190
  { Hexagon::S2_pstorerif_io, Hexagon::S2_pstorerit_io },
30027
190
  { Hexagon::S2_pstorerif_pi, Hexagon::S2_pstorerit_pi },
30028
190
  { Hexagon::S2_pstorerifnew_pi, Hexagon::S2_pstoreritnew_pi },
30029
190
  { Hexagon::S2_pstorerinewf_io, Hexagon::S2_pstorerinewt_io },
30030
190
  { Hexagon::S2_pstorerinewf_pi, Hexagon::S2_pstorerinewt_pi },
30031
190
  { Hexagon::S2_pstorerinewfnew_pi, Hexagon::S2_pstorerinewtnew_pi },
30032
190
  { Hexagon::S4_pstorerbf_abs, Hexagon::S4_pstorerbt_abs },
30033
190
  { Hexagon::S4_pstorerbf_rr, Hexagon::S4_pstorerbt_rr },
30034
190
  { Hexagon::S4_pstorerbfnew_abs, Hexagon::S4_pstorerbtnew_abs },
30035
190
  { Hexagon::S4_pstorerbfnew_io, Hexagon::S4_pstorerbtnew_io },
30036
190
  { Hexagon::S4_pstorerbfnew_rr, Hexagon::S4_pstorerbtnew_rr },
30037
190
  { Hexagon::S4_pstorerbnewf_abs, Hexagon::S4_pstorerbnewt_abs },
30038
190
  { Hexagon::S4_pstorerbnewf_rr, Hexagon::S4_pstorerbnewt_rr },
30039
190
  { Hexagon::S4_pstorerbnewfnew_abs, Hexagon::S4_pstorerbnewtnew_abs },
30040
190
  { Hexagon::S4_pstorerbnewfnew_io, Hexagon::S4_pstorerbnewtnew_io },
30041
190
  { Hexagon::S4_pstorerbnewfnew_rr, Hexagon::S4_pstorerbnewtnew_rr },
30042
190
  { Hexagon::S4_pstorerdf_abs, Hexagon::S4_pstorerdt_abs },
30043
190
  { Hexagon::S4_pstorerdf_rr, Hexagon::S4_pstorerdt_rr },
30044
190
  { Hexagon::S4_pstorerdfnew_abs, Hexagon::S4_pstorerdtnew_abs },
30045
190
  { Hexagon::S4_pstorerdfnew_io, Hexagon::S4_pstorerdtnew_io },
30046
190
  { Hexagon::S4_pstorerdfnew_rr, Hexagon::S4_pstorerdtnew_rr },
30047
190
  { Hexagon::S4_pstorerff_abs, Hexagon::S4_pstorerft_abs },
30048
190
  { Hexagon::S4_pstorerff_rr, Hexagon::S4_pstorerft_rr },
30049
190
  { Hexagon::S4_pstorerffnew_abs, Hexagon::S4_pstorerftnew_abs },
30050
190
  { Hexagon::S4_pstorerffnew_io, Hexagon::S4_pstorerftnew_io },
30051
190
  { Hexagon::S4_pstorerffnew_rr, Hexagon::S4_pstorerftnew_rr },
30052
190
  { Hexagon::S4_pstorerhf_abs, Hexagon::S4_pstorerht_abs },
30053
190
  { Hexagon::S4_pstorerhf_rr, Hexagon::S4_pstorerht_rr },
30054
190
  { Hexagon::S4_pstorerhfnew_abs, Hexagon::S4_pstorerhtnew_abs },
30055
190
  { Hexagon::S4_pstorerhfnew_io, Hexagon::S4_pstorerhtnew_io },
30056
190
  { Hexagon::S4_pstorerhfnew_rr, Hexagon::S4_pstorerhtnew_rr },
30057
190
  { Hexagon::S4_pstorerhnewf_abs, Hexagon::S4_pstorerhnewt_abs },
30058
190
  { Hexagon::S4_pstorerhnewf_rr, Hexagon::S4_pstorerhnewt_rr },
30059
190
  { Hexagon::S4_pstorerhnewfnew_abs, Hexagon::S4_pstorerhnewtnew_abs },
30060
190
  { Hexagon::S4_pstorerhnewfnew_io, Hexagon::S4_pstorerhnewtnew_io },
30061
190
  { Hexagon::S4_pstorerhnewfnew_rr, Hexagon::S4_pstorerhnewtnew_rr },
30062
190
  { Hexagon::S4_pstorerif_abs, Hexagon::S4_pstorerit_abs },
30063
190
  { Hexagon::S4_pstorerif_rr, Hexagon::S4_pstorerit_rr },
30064
190
  { Hexagon::S4_pstorerifnew_abs, Hexagon::S4_pstoreritnew_abs },
30065
190
  { Hexagon::S4_pstorerifnew_io, Hexagon::S4_pstoreritnew_io },
30066
190
  { Hexagon::S4_pstorerifnew_rr, Hexagon::S4_pstoreritnew_rr },
30067
190
  { Hexagon::S4_pstorerinewf_abs, Hexagon::S4_pstorerinewt_abs },
30068
190
  { Hexagon::S4_pstorerinewf_rr, Hexagon::S4_pstorerinewt_rr },
30069
190
  { Hexagon::S4_pstorerinewfnew_abs, Hexagon::S4_pstorerinewtnew_abs },
30070
190
  { Hexagon::S4_pstorerinewfnew_io, Hexagon::S4_pstorerinewtnew_io },
30071
190
  { Hexagon::S4_pstorerinewfnew_rr, Hexagon::S4_pstorerinewtnew_rr },
30072
190
  { Hexagon::S4_storeirbf_io, Hexagon::S4_storeirbt_io },
30073
190
  { Hexagon::S4_storeirbfnew_io, Hexagon::S4_storeirbtnew_io },
30074
190
  { Hexagon::S4_storeirhf_io, Hexagon::S4_storeirht_io },
30075
190
  { Hexagon::S4_storeirhfnew_io, Hexagon::S4_storeirhtnew_io },
30076
190
  { Hexagon::S4_storeirif_io, Hexagon::S4_storeirit_io },
30077
190
  { Hexagon::S4_storeirifnew_io, Hexagon::S4_storeiritnew_io },
30078
190
  { Hexagon::V6_vL32b_cur_npred_ai, Hexagon::V6_vL32b_cur_pred_ai },
30079
190
  { Hexagon::V6_vL32b_cur_npred_pi, Hexagon::V6_vL32b_cur_pred_pi },
30080
190
  { Hexagon::V6_vL32b_cur_npred_ppu, Hexagon::V6_vL32b_cur_pred_ppu },
30081
190
  { Hexagon::V6_vL32b_npred_ai, Hexagon::V6_vL32b_pred_ai },
30082
190
  { Hexagon::V6_vL32b_npred_pi, Hexagon::V6_vL32b_pred_pi },
30083
190
  { Hexagon::V6_vL32b_npred_ppu, Hexagon::V6_vL32b_pred_ppu },
30084
190
  { Hexagon::V6_vL32b_nt_cur_npred_ai, Hexagon::V6_vL32b_nt_cur_pred_ai },
30085
190
  { Hexagon::V6_vL32b_nt_cur_npred_pi, Hexagon::V6_vL32b_nt_cur_pred_pi },
30086
190
  { Hexagon::V6_vL32b_nt_cur_npred_ppu, Hexagon::V6_vL32b_nt_cur_pred_ppu },
30087
190
  { Hexagon::V6_vL32b_nt_npred_ai, Hexagon::V6_vL32b_nt_pred_ai },
30088
190
  { Hexagon::V6_vL32b_nt_npred_pi, Hexagon::V6_vL32b_nt_pred_pi },
30089
190
  { Hexagon::V6_vL32b_nt_npred_ppu, Hexagon::V6_vL32b_nt_pred_ppu },
30090
190
  { Hexagon::V6_vL32b_nt_tmp_npred_ai, Hexagon::V6_vL32b_nt_tmp_pred_ai },
30091
190
  { Hexagon::V6_vL32b_nt_tmp_npred_pi, Hexagon::V6_vL32b_nt_tmp_pred_pi },
30092
190
  { Hexagon::V6_vL32b_nt_tmp_npred_ppu, Hexagon::V6_vL32b_nt_tmp_pred_ppu },
30093
190
  { Hexagon::V6_vL32b_tmp_npred_ai, Hexagon::V6_vL32b_tmp_pred_ai },
30094
190
  { Hexagon::V6_vL32b_tmp_npred_pi, Hexagon::V6_vL32b_tmp_pred_pi },
30095
190
  { Hexagon::V6_vL32b_tmp_npred_ppu, Hexagon::V6_vL32b_tmp_pred_ppu },
30096
190
  { Hexagon::V6_vS32Ub_npred_ai, Hexagon::V6_vS32Ub_pred_ai },
30097
190
  { Hexagon::V6_vS32Ub_npred_pi, Hexagon::V6_vS32Ub_pred_pi },
30098
190
  { Hexagon::V6_vS32Ub_npred_ppu, Hexagon::V6_vS32Ub_pred_ppu },
30099
190
  { Hexagon::V6_vS32b_new_npred_ai, Hexagon::V6_vS32b_new_pred_ai },
30100
190
  { Hexagon::V6_vS32b_new_npred_pi, Hexagon::V6_vS32b_new_pred_pi },
30101
190
  { Hexagon::V6_vS32b_new_npred_ppu, Hexagon::V6_vS32b_new_pred_ppu },
30102
190
  { Hexagon::V6_vS32b_npred_ai, Hexagon::V6_vS32b_pred_ai },
30103
190
  { Hexagon::V6_vS32b_npred_pi, Hexagon::V6_vS32b_pred_pi },
30104
190
  { Hexagon::V6_vS32b_npred_ppu, Hexagon::V6_vS32b_pred_ppu },
30105
190
  { Hexagon::V6_vS32b_nt_new_npred_ai, Hexagon::V6_vS32b_nt_new_pred_ai },
30106
190
  { Hexagon::V6_vS32b_nt_new_npred_pi, Hexagon::V6_vS32b_nt_new_pred_pi },
30107
190
  { Hexagon::V6_vS32b_nt_new_npred_ppu, Hexagon::V6_vS32b_nt_new_pred_ppu },
30108
190
  { Hexagon::V6_vS32b_nt_npred_ai, Hexagon::V6_vS32b_nt_pred_ai },
30109
190
  { Hexagon::V6_vS32b_nt_npred_pi, Hexagon::V6_vS32b_nt_pred_pi },
30110
190
  { Hexagon::V6_vS32b_nt_npred_ppu, Hexagon::V6_vS32b_nt_pred_ppu },
30111
190
}; // End of getTruePredOpcodeTable
30112
30113
190
  unsigned mid;
30114
190
  unsigned start = 0;
30115
190
  unsigned end = 250;
30116
1.33k
  while (start < end) {
30117
1.33k
    mid = start + (end - start) / 2;
30118
1.33k
    if (Opcode == getTruePredOpcodeTable[mid][0]) {
30119
190
      break;
30120
190
    }
30121
1.14k
    if (Opcode < getTruePredOpcodeTable[mid][0])
30122
950
      end = mid;
30123
190
    else
30124
190
      start = mid + 1;
30125
1.14k
  }
30126
190
  if (start == end)
30127
0
    return -1; // Instruction doesn't exist in this table.
30128
30129
190
  return getTruePredOpcodeTable[mid][1];
30130
190
}
30131
30132
// notTakenBranchPrediction
30133
LLVM_READONLY
30134
0
int notTakenBranchPrediction(uint16_t Opcode) {
30135
0
static const uint16_t notTakenBranchPredictionTable[][2] = {
30136
0
  { Hexagon::J2_jumpfnewpt, Hexagon::J2_jumpfnew },
30137
0
  { Hexagon::J2_jumpfpt, Hexagon::J2_jumpf },
30138
0
  { Hexagon::J2_jumprfnewpt, Hexagon::J2_jumprfnew },
30139
0
  { Hexagon::J2_jumprfpt, Hexagon::J2_jumprf },
30140
0
  { Hexagon::J2_jumprtnewpt, Hexagon::J2_jumprtnew },
30141
0
  { Hexagon::J2_jumprtpt, Hexagon::J2_jumprt },
30142
0
  { Hexagon::J2_jumptnewpt, Hexagon::J2_jumptnew },
30143
0
  { Hexagon::J2_jumptpt, Hexagon::J2_jumpt },
30144
0
  { Hexagon::J4_cmpeq_f_jumpnv_t, Hexagon::J4_cmpeq_f_jumpnv_nt },
30145
0
  { Hexagon::J4_cmpeq_fp0_jump_t, Hexagon::J4_cmpeq_fp0_jump_nt },
30146
0
  { Hexagon::J4_cmpeq_fp1_jump_t, Hexagon::J4_cmpeq_fp1_jump_nt },
30147
0
  { Hexagon::J4_cmpeq_t_jumpnv_t, Hexagon::J4_cmpeq_t_jumpnv_nt },
30148
0
  { Hexagon::J4_cmpeq_tp0_jump_t, Hexagon::J4_cmpeq_tp0_jump_nt },
30149
0
  { Hexagon::J4_cmpeq_tp1_jump_t, Hexagon::J4_cmpeq_tp1_jump_nt },
30150
0
  { Hexagon::J4_cmpeqi_f_jumpnv_t, Hexagon::J4_cmpeqi_f_jumpnv_nt },
30151
0
  { Hexagon::J4_cmpeqi_fp0_jump_t, Hexagon::J4_cmpeqi_fp0_jump_nt },
30152
0
  { Hexagon::J4_cmpeqi_fp1_jump_t, Hexagon::J4_cmpeqi_fp1_jump_nt },
30153
0
  { Hexagon::J4_cmpeqi_t_jumpnv_t, Hexagon::J4_cmpeqi_t_jumpnv_nt },
30154
0
  { Hexagon::J4_cmpeqi_tp0_jump_t, Hexagon::J4_cmpeqi_tp0_jump_nt },
30155
0
  { Hexagon::J4_cmpeqi_tp1_jump_t, Hexagon::J4_cmpeqi_tp1_jump_nt },
30156
0
  { Hexagon::J4_cmpeqn1_f_jumpnv_t, Hexagon::J4_cmpeqn1_f_jumpnv_nt },
30157
0
  { Hexagon::J4_cmpeqn1_fp0_jump_t, Hexagon::J4_cmpeqn1_fp0_jump_nt },
30158
0
  { Hexagon::J4_cmpeqn1_fp1_jump_t, Hexagon::J4_cmpeqn1_fp1_jump_nt },
30159
0
  { Hexagon::J4_cmpeqn1_t_jumpnv_t, Hexagon::J4_cmpeqn1_t_jumpnv_nt },
30160
0
  { Hexagon::J4_cmpeqn1_tp0_jump_t, Hexagon::J4_cmpeqn1_tp0_jump_nt },
30161
0
  { Hexagon::J4_cmpeqn1_tp1_jump_t, Hexagon::J4_cmpeqn1_tp1_jump_nt },
30162
0
  { Hexagon::J4_cmpgt_f_jumpnv_t, Hexagon::J4_cmpgt_f_jumpnv_nt },
30163
0
  { Hexagon::J4_cmpgt_fp0_jump_t, Hexagon::J4_cmpgt_fp0_jump_nt },
30164
0
  { Hexagon::J4_cmpgt_fp1_jump_t, Hexagon::J4_cmpgt_fp1_jump_nt },
30165
0
  { Hexagon::J4_cmpgt_t_jumpnv_t, Hexagon::J4_cmpgt_t_jumpnv_nt },
30166
0
  { Hexagon::J4_cmpgt_tp0_jump_t, Hexagon::J4_cmpgt_tp0_jump_nt },
30167
0
  { Hexagon::J4_cmpgt_tp1_jump_t, Hexagon::J4_cmpgt_tp1_jump_nt },
30168
0
  { Hexagon::J4_cmpgti_f_jumpnv_t, Hexagon::J4_cmpgti_f_jumpnv_nt },
30169
0
  { Hexagon::J4_cmpgti_fp0_jump_t, Hexagon::J4_cmpgti_fp0_jump_nt },
30170
0
  { Hexagon::J4_cmpgti_fp1_jump_t, Hexagon::J4_cmpgti_fp1_jump_nt },
30171
0
  { Hexagon::J4_cmpgti_t_jumpnv_t, Hexagon::J4_cmpgti_t_jumpnv_nt },
30172
0
  { Hexagon::J4_cmpgti_tp0_jump_t, Hexagon::J4_cmpgti_tp0_jump_nt },
30173
0
  { Hexagon::J4_cmpgti_tp1_jump_t, Hexagon::J4_cmpgti_tp1_jump_nt },
30174
0
  { Hexagon::J4_cmpgtn1_f_jumpnv_t, Hexagon::J4_cmpgtn1_f_jumpnv_nt },
30175
0
  { Hexagon::J4_cmpgtn1_fp0_jump_t, Hexagon::J4_cmpgtn1_fp0_jump_nt },
30176
0
  { Hexagon::J4_cmpgtn1_fp1_jump_t, Hexagon::J4_cmpgtn1_fp1_jump_nt },
30177
0
  { Hexagon::J4_cmpgtn1_t_jumpnv_t, Hexagon::J4_cmpgtn1_t_jumpnv_nt },
30178
0
  { Hexagon::J4_cmpgtn1_tp0_jump_t, Hexagon::J4_cmpgtn1_tp0_jump_nt },
30179
0
  { Hexagon::J4_cmpgtn1_tp1_jump_t, Hexagon::J4_cmpgtn1_tp1_jump_nt },
30180
0
  { Hexagon::J4_cmpgtu_f_jumpnv_t, Hexagon::J4_cmpgtu_f_jumpnv_nt },
30181
0
  { Hexagon::J4_cmpgtu_fp0_jump_t, Hexagon::J4_cmpgtu_fp0_jump_nt },
30182
0
  { Hexagon::J4_cmpgtu_fp1_jump_t, Hexagon::J4_cmpgtu_fp1_jump_nt },
30183
0
  { Hexagon::J4_cmpgtu_t_jumpnv_t, Hexagon::J4_cmpgtu_t_jumpnv_nt },
30184
0
  { Hexagon::J4_cmpgtu_tp0_jump_t, Hexagon::J4_cmpgtu_tp0_jump_nt },
30185
0
  { Hexagon::J4_cmpgtu_tp1_jump_t, Hexagon::J4_cmpgtu_tp1_jump_nt },
30186
0
  { Hexagon::J4_cmpgtui_f_jumpnv_t, Hexagon::J4_cmpgtui_f_jumpnv_nt },
30187
0
  { Hexagon::J4_cmpgtui_fp0_jump_t, Hexagon::J4_cmpgtui_fp0_jump_nt },
30188
0
  { Hexagon::J4_cmpgtui_fp1_jump_t, Hexagon::J4_cmpgtui_fp1_jump_nt },
30189
0
  { Hexagon::J4_cmpgtui_t_jumpnv_t, Hexagon::J4_cmpgtui_t_jumpnv_nt },
30190
0
  { Hexagon::J4_cmpgtui_tp0_jump_t, Hexagon::J4_cmpgtui_tp0_jump_nt },
30191
0
  { Hexagon::J4_cmpgtui_tp1_jump_t, Hexagon::J4_cmpgtui_tp1_jump_nt },
30192
0
  { Hexagon::J4_cmplt_f_jumpnv_t, Hexagon::J4_cmplt_f_jumpnv_nt },
30193
0
  { Hexagon::J4_cmplt_t_jumpnv_t, Hexagon::J4_cmplt_t_jumpnv_nt },
30194
0
  { Hexagon::J4_cmpltu_f_jumpnv_t, Hexagon::J4_cmpltu_f_jumpnv_nt },
30195
0
  { Hexagon::J4_cmpltu_t_jumpnv_t, Hexagon::J4_cmpltu_t_jumpnv_nt },
30196
0
  { Hexagon::L4_return_fnew_pt, Hexagon::L4_return_fnew_pnt },
30197
0
  { Hexagon::L4_return_tnew_pt, Hexagon::L4_return_tnew_pnt },
30198
0
  { Hexagon::PS_jmpretfnewpt, Hexagon::PS_jmpretfnew },
30199
0
  { Hexagon::PS_jmprettnewpt, Hexagon::PS_jmprettnew },
30200
0
}; // End of notTakenBranchPredictionTable
30201
30202
0
  unsigned mid;
30203
0
  unsigned start = 0;
30204
0
  unsigned end = 64;
30205
0
  while (start < end) {
30206
0
    mid = start + (end - start) / 2;
30207
0
    if (Opcode == notTakenBranchPredictionTable[mid][0]) {
30208
0
      break;
30209
0
    }
30210
0
    if (Opcode < notTakenBranchPredictionTable[mid][0])
30211
0
      end = mid;
30212
0
    else
30213
0
      start = mid + 1;
30214
0
  }
30215
0
  if (start == end)
30216
0
    return -1; // Instruction doesn't exist in this table.
30217
30218
0
  return notTakenBranchPredictionTable[mid][1];
30219
0
}
30220
30221
// takenBranchPrediction
30222
LLVM_READONLY
30223
0
int takenBranchPrediction(uint16_t Opcode) {
30224
0
static const uint16_t takenBranchPredictionTable[][2] = {
30225
0
  { Hexagon::J2_jumpf, Hexagon::J2_jumpfpt },
30226
0
  { Hexagon::J2_jumpfnew, Hexagon::J2_jumpfnewpt },
30227
0
  { Hexagon::J2_jumprf, Hexagon::J2_jumprfpt },
30228
0
  { Hexagon::J2_jumprfnew, Hexagon::J2_jumprfnewpt },
30229
0
  { Hexagon::J2_jumprt, Hexagon::J2_jumprtpt },
30230
0
  { Hexagon::J2_jumprtnew, Hexagon::J2_jumprtnewpt },
30231
0
  { Hexagon::J2_jumpt, Hexagon::J2_jumptpt },
30232
0
  { Hexagon::J2_jumptnew, Hexagon::J2_jumptnewpt },
30233
0
  { Hexagon::J4_cmpeq_f_jumpnv_nt, Hexagon::J4_cmpeq_f_jumpnv_t },
30234
0
  { Hexagon::J4_cmpeq_fp0_jump_nt, Hexagon::J4_cmpeq_fp0_jump_t },
30235
0
  { Hexagon::J4_cmpeq_fp1_jump_nt, Hexagon::J4_cmpeq_fp1_jump_t },
30236
0
  { Hexagon::J4_cmpeq_t_jumpnv_nt, Hexagon::J4_cmpeq_t_jumpnv_t },
30237
0
  { Hexagon::J4_cmpeq_tp0_jump_nt, Hexagon::J4_cmpeq_tp0_jump_t },
30238
0
  { Hexagon::J4_cmpeq_tp1_jump_nt, Hexagon::J4_cmpeq_tp1_jump_t },
30239
0
  { Hexagon::J4_cmpeqi_f_jumpnv_nt, Hexagon::J4_cmpeqi_f_jumpnv_t },
30240
0
  { Hexagon::J4_cmpeqi_fp0_jump_nt, Hexagon::J4_cmpeqi_fp0_jump_t },
30241
0
  { Hexagon::J4_cmpeqi_fp1_jump_nt, Hexagon::J4_cmpeqi_fp1_jump_t },
30242
0
  { Hexagon::J4_cmpeqi_t_jumpnv_nt, Hexagon::J4_cmpeqi_t_jumpnv_t },
30243
0
  { Hexagon::J4_cmpeqi_tp0_jump_nt, Hexagon::J4_cmpeqi_tp0_jump_t },
30244
0
  { Hexagon::J4_cmpeqi_tp1_jump_nt, Hexagon::J4_cmpeqi_tp1_jump_t },
30245
0
  { Hexagon::J4_cmpeqn1_f_jumpnv_nt, Hexagon::J4_cmpeqn1_f_jumpnv_t },
30246
0
  { Hexagon::J4_cmpeqn1_fp0_jump_nt, Hexagon::J4_cmpeqn1_fp0_jump_t },
30247
0
  { Hexagon::J4_cmpeqn1_fp1_jump_nt, Hexagon::J4_cmpeqn1_fp1_jump_t },
30248
0
  { Hexagon::J4_cmpeqn1_t_jumpnv_nt, Hexagon::J4_cmpeqn1_t_jumpnv_t },
30249
0
  { Hexagon::J4_cmpeqn1_tp0_jump_nt, Hexagon::J4_cmpeqn1_tp0_jump_t },
30250
0
  { Hexagon::J4_cmpeqn1_tp1_jump_nt, Hexagon::J4_cmpeqn1_tp1_jump_t },
30251
0
  { Hexagon::J4_cmpgt_f_jumpnv_nt, Hexagon::J4_cmpgt_f_jumpnv_t },
30252
0
  { Hexagon::J4_cmpgt_fp0_jump_nt, Hexagon::J4_cmpgt_fp0_jump_t },
30253
0
  { Hexagon::J4_cmpgt_fp1_jump_nt, Hexagon::J4_cmpgt_fp1_jump_t },
30254
0
  { Hexagon::J4_cmpgt_t_jumpnv_nt, Hexagon::J4_cmpgt_t_jumpnv_t },
30255
0
  { Hexagon::J4_cmpgt_tp0_jump_nt, Hexagon::J4_cmpgt_tp0_jump_t },
30256
0
  { Hexagon::J4_cmpgt_tp1_jump_nt, Hexagon::J4_cmpgt_tp1_jump_t },
30257
0
  { Hexagon::J4_cmpgti_f_jumpnv_nt, Hexagon::J4_cmpgti_f_jumpnv_t },
30258
0
  { Hexagon::J4_cmpgti_fp0_jump_nt, Hexagon::J4_cmpgti_fp0_jump_t },
30259
0
  { Hexagon::J4_cmpgti_fp1_jump_nt, Hexagon::J4_cmpgti_fp1_jump_t },
30260
0
  { Hexagon::J4_cmpgti_t_jumpnv_nt, Hexagon::J4_cmpgti_t_jumpnv_t },
30261
0
  { Hexagon::J4_cmpgti_tp0_jump_nt, Hexagon::J4_cmpgti_tp0_jump_t },
30262
0
  { Hexagon::J4_cmpgti_tp1_jump_nt, Hexagon::J4_cmpgti_tp1_jump_t },
30263
0
  { Hexagon::J4_cmpgtn1_f_jumpnv_nt, Hexagon::J4_cmpgtn1_f_jumpnv_t },
30264
0
  { Hexagon::J4_cmpgtn1_fp0_jump_nt, Hexagon::J4_cmpgtn1_fp0_jump_t },
30265
0
  { Hexagon::J4_cmpgtn1_fp1_jump_nt, Hexagon::J4_cmpgtn1_fp1_jump_t },
30266
0
  { Hexagon::J4_cmpgtn1_t_jumpnv_nt, Hexagon::J4_cmpgtn1_t_jumpnv_t },
30267
0
  { Hexagon::J4_cmpgtn1_tp0_jump_nt, Hexagon::J4_cmpgtn1_tp0_jump_t },
30268
0
  { Hexagon::J4_cmpgtn1_tp1_jump_nt, Hexagon::J4_cmpgtn1_tp1_jump_t },
30269
0
  { Hexagon::J4_cmpgtu_f_jumpnv_nt, Hexagon::J4_cmpgtu_f_jumpnv_t },
30270
0
  { Hexagon::J4_cmpgtu_fp0_jump_nt, Hexagon::J4_cmpgtu_fp0_jump_t },
30271
0
  { Hexagon::J4_cmpgtu_fp1_jump_nt, Hexagon::J4_cmpgtu_fp1_jump_t },
30272
0
  { Hexagon::J4_cmpgtu_t_jumpnv_nt, Hexagon::J4_cmpgtu_t_jumpnv_t },
30273
0
  { Hexagon::J4_cmpgtu_tp0_jump_nt, Hexagon::J4_cmpgtu_tp0_jump_t },
30274
0
  { Hexagon::J4_cmpgtu_tp1_jump_nt, Hexagon::J4_cmpgtu_tp1_jump_t },
30275
0
  { Hexagon::J4_cmpgtui_f_jumpnv_nt, Hexagon::J4_cmpgtui_f_jumpnv_t },
30276
0
  { Hexagon::J4_cmpgtui_fp0_jump_nt, Hexagon::J4_cmpgtui_fp0_jump_t },
30277
0
  { Hexagon::J4_cmpgtui_fp1_jump_nt, Hexagon::J4_cmpgtui_fp1_jump_t },
30278
0
  { Hexagon::J4_cmpgtui_t_jumpnv_nt, Hexagon::J4_cmpgtui_t_jumpnv_t },
30279
0
  { Hexagon::J4_cmpgtui_tp0_jump_nt, Hexagon::J4_cmpgtui_tp0_jump_t },
30280
0
  { Hexagon::J4_cmpgtui_tp1_jump_nt, Hexagon::J4_cmpgtui_tp1_jump_t },
30281
0
  { Hexagon::J4_cmplt_f_jumpnv_nt, Hexagon::J4_cmplt_f_jumpnv_t },
30282
0
  { Hexagon::J4_cmplt_t_jumpnv_nt, Hexagon::J4_cmplt_t_jumpnv_t },
30283
0
  { Hexagon::J4_cmpltu_f_jumpnv_nt, Hexagon::J4_cmpltu_f_jumpnv_t },
30284
0
  { Hexagon::J4_cmpltu_t_jumpnv_nt, Hexagon::J4_cmpltu_t_jumpnv_t },
30285
0
  { Hexagon::L4_return_fnew_pnt, Hexagon::L4_return_fnew_pt },
30286
0
  { Hexagon::L4_return_tnew_pnt, Hexagon::L4_return_tnew_pt },
30287
0
  { Hexagon::PS_jmpretfnew, Hexagon::PS_jmpretfnewpt },
30288
0
  { Hexagon::PS_jmprettnew, Hexagon::PS_jmprettnewpt },
30289
0
}; // End of takenBranchPredictionTable
30290
30291
0
  unsigned mid;
30292
0
  unsigned start = 0;
30293
0
  unsigned end = 64;
30294
0
  while (start < end) {
30295
0
    mid = start + (end - start) / 2;
30296
0
    if (Opcode == takenBranchPredictionTable[mid][0]) {
30297
0
      break;
30298
0
    }
30299
0
    if (Opcode < takenBranchPredictionTable[mid][0])
30300
0
      end = mid;
30301
0
    else
30302
0
      start = mid + 1;
30303
0
  }
30304
0
  if (start == end)
30305
0
    return -1; // Instruction doesn't exist in this table.
30306
30307
0
  return takenBranchPredictionTable[mid][1];
30308
0
}
30309
30310
} // end namespace Hexagon
30311
} // end namespace llvm
30312
#endif // GET_INSTRMAP_INFO
30313