/src/build/lib/Target/Lanai/LanaiGenDAGISel.inc
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1 | | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | | |* *| |
3 | | |* DAG Instruction Selector for the Lanai target *| |
4 | | |* *| |
5 | | |* Automatically generated file, do not edit! *| |
6 | | |* *| |
7 | | \*===----------------------------------------------------------------------===*/ |
8 | | |
9 | | // *** NOTE: This file is #included into the middle of the target |
10 | | // *** instruction selector class. These functions are really methods. |
11 | | |
12 | | // If GET_DAGISEL_DECL is #defined with any value, only function |
13 | | // declarations will be included when this file is included. |
14 | | // If GET_DAGISEL_BODY is #defined, its value should be the name of |
15 | | // the instruction selector class. Function bodies will be emitted |
16 | | // and each function's name will be qualified with the name of the |
17 | | // class. |
18 | | // |
19 | | // When neither of the GET_DAGISEL* macros is defined, the functions |
20 | | // are emitted inline. |
21 | | |
22 | | #if defined(GET_DAGISEL_DECL) && defined(GET_DAGISEL_BODY) |
23 | | #error GET_DAGISEL_DECL and GET_DAGISEL_BODY cannot be both defined, undef both for inline definitions |
24 | | #endif |
25 | | |
26 | | #ifdef GET_DAGISEL_BODY |
27 | | #define LOCAL_DAGISEL_STRINGIZE(X) LOCAL_DAGISEL_STRINGIZE_(X) |
28 | | #define LOCAL_DAGISEL_STRINGIZE_(X) #X |
29 | | static_assert(sizeof(LOCAL_DAGISEL_STRINGIZE(GET_DAGISEL_BODY)) > 1, |
30 | | "GET_DAGISEL_BODY is empty: it should be defined with the class name"); |
31 | | #undef LOCAL_DAGISEL_STRINGIZE_ |
32 | | #undef LOCAL_DAGISEL_STRINGIZE |
33 | | #endif |
34 | | |
35 | | #if !defined(GET_DAGISEL_DECL) && !defined(GET_DAGISEL_BODY) |
36 | | #define DAGISEL_INLINE 1 |
37 | | #else |
38 | | #define DAGISEL_INLINE 0 |
39 | | #endif |
40 | | |
41 | | #if !DAGISEL_INLINE |
42 | | #define DAGISEL_CLASS_COLONCOLON GET_DAGISEL_BODY :: |
43 | | #else |
44 | | #define DAGISEL_CLASS_COLONCOLON |
45 | | #endif |
46 | | |
47 | | #ifdef GET_DAGISEL_DECL |
48 | | void SelectCode(SDNode *N); |
49 | | #endif |
50 | | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
51 | | void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N) |
52 | 0 | { |
53 | | // Some target values are emitted as 2 bytes, TARGET_VAL handles |
54 | | // this. |
55 | 0 | #define TARGET_VAL(X) X & 255, unsigned(X) >> 8 |
56 | 0 | static const unsigned char MatcherTable[] = { |
57 | 0 | OPC_SwitchOpcode , 100|128,1, TARGET_VAL(ISD::LOAD), |
58 | 0 | OPC_RecordMemRef, |
59 | 0 | OPC_RecordNode, |
60 | 0 | OPC_RecordChild1, |
61 | 0 | OPC_CheckChild1TypeI32, |
62 | 0 | OPC_CheckPredicate, 17, |
63 | 0 | OPC_CheckTypeI32, |
64 | 0 | OPC_Scope, 30, |
65 | 0 | OPC_CheckPredicate, 12, |
66 | 0 | OPC_Scope, 12, |
67 | 0 | OPC_CheckComplexPat2, /*#*/1, |
68 | 0 | OPC_EmitMergeInputChains1_0, |
69 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDW_RI), 0|OPFL_Chain|OPFL_MemRefs, |
70 | 0 | MVT::i32, 3, 2, 3, 4, |
71 | 0 | 12, |
72 | 0 | OPC_CheckComplexPat0, /*#*/1, |
73 | 0 | OPC_EmitMergeInputChains1_0, |
74 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDW_RR), 0|OPFL_Chain|OPFL_MemRefs, |
75 | 0 | MVT::i32, 3, 2, 3, 4, |
76 | 0 | 0, |
77 | 0 | 47, |
78 | 0 | OPC_CheckPredicate, 8, |
79 | 0 | OPC_Scope, 14, |
80 | 0 | OPC_CheckPredicate, 14, |
81 | 0 | OPC_CheckComplexPat0, /*#*/1, |
82 | 0 | OPC_EmitMergeInputChains1_0, |
83 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDWz_RR), 0|OPFL_Chain|OPFL_MemRefs, |
84 | 0 | MVT::i32, 3, 2, 3, 4, |
85 | 0 | 13, |
86 | 0 | OPC_CheckPredicate3, |
87 | 0 | OPC_CheckComplexPat0, /*#*/1, |
88 | 0 | OPC_EmitMergeInputChains1_0, |
89 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHz_RR), 0|OPFL_Chain|OPFL_MemRefs, |
90 | 0 | MVT::i32, 3, 2, 3, 4, |
91 | 0 | 13, |
92 | 0 | OPC_CheckPredicate2, |
93 | 0 | OPC_CheckComplexPat0, /*#*/1, |
94 | 0 | OPC_EmitMergeInputChains1_0, |
95 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RR), 0|OPFL_Chain|OPFL_MemRefs, |
96 | 0 | MVT::i32, 3, 2, 3, 4, |
97 | 0 | 0, |
98 | 0 | 31, |
99 | 0 | OPC_CheckPredicate5, |
100 | 0 | OPC_Scope, 13, |
101 | 0 | OPC_CheckPredicate3, |
102 | 0 | OPC_CheckComplexPat0, /*#*/1, |
103 | 0 | OPC_EmitMergeInputChains1_0, |
104 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHs_RR), 0|OPFL_Chain|OPFL_MemRefs, |
105 | 0 | MVT::i32, 3, 2, 3, 4, |
106 | 0 | 13, |
107 | 0 | OPC_CheckPredicate2, |
108 | 0 | OPC_CheckComplexPat0, /*#*/1, |
109 | 0 | OPC_EmitMergeInputChains1_0, |
110 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBs_RR), 0|OPFL_Chain|OPFL_MemRefs, |
111 | 0 | MVT::i32, 3, 2, 3, 4, |
112 | 0 | 0, |
113 | 0 | 15, |
114 | 0 | OPC_CheckPredicate, 8, |
115 | 0 | OPC_CheckPredicate3, |
116 | 0 | OPC_CheckComplexPat1, /*#*/1, |
117 | 0 | OPC_EmitMergeInputChains1_0, |
118 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHz_RI), 0|OPFL_Chain|OPFL_MemRefs, |
119 | 0 | MVT::i32, 3, 2, 3, 4, |
120 | 0 | 14, |
121 | 0 | OPC_CheckPredicate5, |
122 | 0 | OPC_CheckPredicate3, |
123 | 0 | OPC_CheckComplexPat1, /*#*/1, |
124 | 0 | OPC_EmitMergeInputChains1_0, |
125 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHs_RI), 0|OPFL_Chain|OPFL_MemRefs, |
126 | 0 | MVT::i32, 3, 2, 3, 4, |
127 | 0 | 15, |
128 | 0 | OPC_CheckPredicate, 8, |
129 | 0 | OPC_CheckPredicate2, |
130 | 0 | OPC_CheckComplexPat1, /*#*/1, |
131 | 0 | OPC_EmitMergeInputChains1_0, |
132 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RI), 0|OPFL_Chain|OPFL_MemRefs, |
133 | 0 | MVT::i32, 3, 2, 3, 4, |
134 | 0 | 14, |
135 | 0 | OPC_CheckPredicate5, |
136 | 0 | OPC_CheckPredicate2, |
137 | 0 | OPC_CheckComplexPat1, /*#*/1, |
138 | 0 | OPC_EmitMergeInputChains1_0, |
139 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBs_RI), 0|OPFL_Chain|OPFL_MemRefs, |
140 | 0 | MVT::i32, 3, 2, 3, 4, |
141 | 0 | 32, |
142 | 0 | OPC_CheckPredicate, 15, |
143 | 0 | OPC_Scope, 13, |
144 | 0 | OPC_CheckPredicate2, |
145 | 0 | OPC_CheckComplexPat1, /*#*/1, |
146 | 0 | OPC_EmitMergeInputChains1_0, |
147 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RI), 0|OPFL_Chain|OPFL_MemRefs, |
148 | 0 | MVT::i32, 3, 2, 3, 4, |
149 | 0 | 13, |
150 | 0 | OPC_CheckPredicate3, |
151 | 0 | OPC_CheckComplexPat1, /*#*/1, |
152 | 0 | OPC_EmitMergeInputChains1_0, |
153 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHz_RI), 0|OPFL_Chain|OPFL_MemRefs, |
154 | 0 | MVT::i32, 3, 2, 3, 4, |
155 | 0 | 0, |
156 | 0 | 12, |
157 | 0 | OPC_CheckPredicate, 12, |
158 | 0 | OPC_CheckComplexPat3, /*#*/1, |
159 | 0 | OPC_EmitMergeInputChains1_0, |
160 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDADDR), 0|OPFL_Chain|OPFL_MemRefs, |
161 | 0 | MVT::i32, 1, 2, |
162 | 0 | 0, |
163 | 0 | 119, TARGET_VAL(ISD::STORE), |
164 | 0 | OPC_RecordMemRef, |
165 | 0 | OPC_RecordNode, |
166 | 0 | OPC_RecordChild1, |
167 | 0 | OPC_CheckChild1TypeI32, |
168 | 0 | OPC_RecordChild2, |
169 | 0 | OPC_CheckChild2TypeI32, |
170 | 0 | OPC_CheckPredicate, 19, |
171 | 0 | OPC_Scope, 30, |
172 | 0 | OPC_CheckPredicate, 13, |
173 | 0 | OPC_Scope, 12, |
174 | 0 | OPC_CheckComplexPat0, /*#*/2, |
175 | 0 | OPC_EmitMergeInputChains1_0, |
176 | 0 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::SW_RR), 0|OPFL_Chain|OPFL_MemRefs, |
177 | 0 | 4, 1, 3, 4, 5, |
178 | 0 | 12, |
179 | 0 | OPC_CheckComplexPat2, /*#*/2, |
180 | 0 | OPC_EmitMergeInputChains1_0, |
181 | 0 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::SW_RI), 0|OPFL_Chain|OPFL_MemRefs, |
182 | 0 | 4, 1, 3, 4, 5, |
183 | 0 | 0, |
184 | 0 | 64, |
185 | 0 | OPC_CheckPredicate, 18, |
186 | 0 | OPC_Scope, 14, |
187 | 0 | OPC_CheckPredicate, 10, |
188 | 0 | OPC_CheckComplexPat0, /*#*/2, |
189 | 0 | OPC_EmitMergeInputChains1_0, |
190 | 0 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::STH_RR), 0|OPFL_Chain|OPFL_MemRefs, |
191 | 0 | 4, 1, 3, 4, 5, |
192 | 0 | 14, |
193 | 0 | OPC_CheckPredicate, 9, |
194 | 0 | OPC_CheckComplexPat0, /*#*/2, |
195 | 0 | OPC_EmitMergeInputChains1_0, |
196 | 0 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::STB_RR), 0|OPFL_Chain|OPFL_MemRefs, |
197 | 0 | 4, 1, 3, 4, 5, |
198 | 0 | 14, |
199 | 0 | OPC_CheckPredicate, 10, |
200 | 0 | OPC_CheckComplexPat1, /*#*/2, |
201 | 0 | OPC_EmitMergeInputChains1_0, |
202 | 0 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::STH_RI), 0|OPFL_Chain|OPFL_MemRefs, |
203 | 0 | 4, 1, 3, 4, 5, |
204 | 0 | 14, |
205 | 0 | OPC_CheckPredicate, 9, |
206 | 0 | OPC_CheckComplexPat1, /*#*/2, |
207 | 0 | OPC_EmitMergeInputChains1_0, |
208 | 0 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::STB_RI), 0|OPFL_Chain|OPFL_MemRefs, |
209 | 0 | 4, 1, 3, 4, 5, |
210 | 0 | 0, |
211 | 0 | 12, |
212 | 0 | OPC_CheckPredicate, 13, |
213 | 0 | OPC_CheckComplexPat3, /*#*/2, |
214 | 0 | OPC_EmitMergeInputChains1_0, |
215 | 0 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::STADDR), 0|OPFL_Chain|OPFL_MemRefs, |
216 | 0 | 2, 1, 3, |
217 | 0 | 0, |
218 | 0 | 17, TARGET_VAL(ISD::ATOMIC_LOAD), |
219 | 0 | OPC_RecordMemRef, |
220 | 0 | OPC_RecordNode, |
221 | 0 | OPC_RecordChild1, |
222 | 0 | OPC_CheckChild1TypeI32, |
223 | 0 | OPC_CheckPredicate2, |
224 | 0 | OPC_CheckComplexPat1, /*#*/1, |
225 | 0 | OPC_EmitMergeInputChains1_0, |
226 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RI), 0|OPFL_Chain|OPFL_MemRefs, |
227 | 0 | MVT::i32, 3, 2, 3, 4, |
228 | 0 | 21, TARGET_VAL(ISD::CALLSEQ_START), |
229 | 0 | OPC_RecordNode, |
230 | 0 | OPC_RecordChild1, |
231 | 0 | OPC_MoveChild1, |
232 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant), |
233 | 0 | OPC_MoveSibling2, |
234 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant), |
235 | 0 | OPC_RecordNode, |
236 | 0 | OPC_MoveParent, |
237 | 0 | OPC_EmitMergeInputChains1_0, |
238 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADJCALLSTACKDOWN), 0|OPFL_Chain|OPFL_GlueOutput, |
239 | 0 | MVT::i32, 2, 1, 2, |
240 | 0 | 22, TARGET_VAL(ISD::CALLSEQ_END), |
241 | 0 | OPC_RecordNode, |
242 | 0 | OPC_CaptureGlueInput, |
243 | 0 | OPC_RecordChild1, |
244 | 0 | OPC_MoveChild1, |
245 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant), |
246 | 0 | OPC_MoveSibling2, |
247 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant), |
248 | 0 | OPC_RecordNode, |
249 | 0 | OPC_MoveParent, |
250 | 0 | OPC_EmitMergeInputChains1_0, |
251 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADJCALLSTACKUP), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput, |
252 | 0 | MVT::i32, 2, 1, 2, |
253 | 0 | 74|128,2, TARGET_VAL(ISD::OR), |
254 | 0 | OPC_Scope, 25|128,1, |
255 | 0 | OPC_RecordChild0, |
256 | 0 | OPC_MoveChild1, |
257 | 0 | OPC_SwitchOpcode , 69, TARGET_VAL(LanaiISD::LO), |
258 | 0 | OPC_RecordChild0, |
259 | 0 | OPC_MoveChild0, |
260 | 0 | OPC_SwitchOpcode , 10, TARGET_VAL(ISD::TargetGlobalAddress), |
261 | 0 | OPC_MoveParent, |
262 | 0 | OPC_MoveParent, |
263 | 0 | OPC_CheckTypeI32, |
264 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
265 | 0 | MVT::i32, 2, 0, 1, |
266 | 0 | 10, TARGET_VAL(ISD::TargetExternalSymbol), |
267 | 0 | OPC_MoveParent, |
268 | 0 | OPC_MoveParent, |
269 | 0 | OPC_CheckTypeI32, |
270 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
271 | 0 | MVT::i32, 2, 0, 1, |
272 | 0 | 10, TARGET_VAL(ISD::TargetBlockAddress), |
273 | 0 | OPC_MoveParent, |
274 | 0 | OPC_MoveParent, |
275 | 0 | OPC_CheckTypeI32, |
276 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
277 | 0 | MVT::i32, 2, 0, 1, |
278 | 0 | 10, TARGET_VAL(ISD::TargetJumpTable), |
279 | 0 | OPC_MoveParent, |
280 | 0 | OPC_MoveParent, |
281 | 0 | OPC_CheckTypeI32, |
282 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
283 | 0 | MVT::i32, 2, 0, 1, |
284 | 0 | 10, TARGET_VAL(ISD::TargetConstantPool), |
285 | 0 | OPC_MoveParent, |
286 | 0 | OPC_MoveParent, |
287 | 0 | OPC_CheckTypeI32, |
288 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
289 | 0 | MVT::i32, 2, 0, 1, |
290 | 0 | 0, |
291 | 0 | 74, TARGET_VAL(LanaiISD::SMALL), |
292 | 0 | OPC_RecordChild0, |
293 | 0 | OPC_MoveChild0, |
294 | 0 | OPC_SwitchOpcode , 11, TARGET_VAL(ISD::TargetGlobalAddress), |
295 | 0 | OPC_MoveParent, |
296 | 0 | OPC_MoveParent, |
297 | 0 | OPC_CheckTypeI32, |
298 | 0 | OPC_EmitCopyToReg0, Lanai::R0, |
299 | 0 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI), |
300 | 0 | MVT::i32, 1, 1, |
301 | 0 | 11, TARGET_VAL(ISD::TargetExternalSymbol), |
302 | 0 | OPC_MoveParent, |
303 | 0 | OPC_MoveParent, |
304 | 0 | OPC_CheckTypeI32, |
305 | 0 | OPC_EmitCopyToReg0, Lanai::R0, |
306 | 0 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI), |
307 | 0 | MVT::i32, 1, 1, |
308 | 0 | 11, TARGET_VAL(ISD::TargetBlockAddress), |
309 | 0 | OPC_MoveParent, |
310 | 0 | OPC_MoveParent, |
311 | 0 | OPC_CheckTypeI32, |
312 | 0 | OPC_EmitCopyToReg0, Lanai::R0, |
313 | 0 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI), |
314 | 0 | MVT::i32, 1, 1, |
315 | 0 | 11, TARGET_VAL(ISD::TargetJumpTable), |
316 | 0 | OPC_MoveParent, |
317 | 0 | OPC_MoveParent, |
318 | 0 | OPC_CheckTypeI32, |
319 | 0 | OPC_EmitCopyToReg0, Lanai::R0, |
320 | 0 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI), |
321 | 0 | MVT::i32, 1, 1, |
322 | 0 | 11, TARGET_VAL(ISD::TargetConstantPool), |
323 | 0 | OPC_MoveParent, |
324 | 0 | OPC_MoveParent, |
325 | 0 | OPC_CheckTypeI32, |
326 | 0 | OPC_EmitCopyToReg0, Lanai::R0, |
327 | 0 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI), |
328 | 0 | MVT::i32, 1, 1, |
329 | 0 | 0, |
330 | 0 | 0, |
331 | 0 | 78, |
332 | 0 | OPC_MoveChild0, |
333 | 0 | OPC_CheckOpcode, TARGET_VAL(LanaiISD::LO), |
334 | 0 | OPC_RecordChild0, |
335 | 0 | OPC_MoveChild0, |
336 | 0 | OPC_SwitchOpcode , 11, TARGET_VAL(ISD::TargetGlobalAddress), |
337 | 0 | OPC_MoveParent, |
338 | 0 | OPC_MoveParent, |
339 | 0 | OPC_RecordChild1, |
340 | 0 | OPC_CheckTypeI32, |
341 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
342 | 0 | MVT::i32, 2, 1, 0, |
343 | 0 | 11, TARGET_VAL(ISD::TargetExternalSymbol), |
344 | 0 | OPC_MoveParent, |
345 | 0 | OPC_MoveParent, |
346 | 0 | OPC_RecordChild1, |
347 | 0 | OPC_CheckTypeI32, |
348 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
349 | 0 | MVT::i32, 2, 1, 0, |
350 | 0 | 11, TARGET_VAL(ISD::TargetBlockAddress), |
351 | 0 | OPC_MoveParent, |
352 | 0 | OPC_MoveParent, |
353 | 0 | OPC_RecordChild1, |
354 | 0 | OPC_CheckTypeI32, |
355 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
356 | 0 | MVT::i32, 2, 1, 0, |
357 | 0 | 11, TARGET_VAL(ISD::TargetJumpTable), |
358 | 0 | OPC_MoveParent, |
359 | 0 | OPC_MoveParent, |
360 | 0 | OPC_RecordChild1, |
361 | 0 | OPC_CheckTypeI32, |
362 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
363 | 0 | MVT::i32, 2, 1, 0, |
364 | 0 | 11, TARGET_VAL(ISD::TargetConstantPool), |
365 | 0 | OPC_MoveParent, |
366 | 0 | OPC_MoveParent, |
367 | 0 | OPC_RecordChild1, |
368 | 0 | OPC_CheckTypeI32, |
369 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
370 | 0 | MVT::i32, 2, 1, 0, |
371 | 0 | 0, |
372 | 0 | 93, |
373 | 0 | OPC_RecordChild0, |
374 | 0 | OPC_RecordChild1, |
375 | 0 | OPC_Scope, 64, |
376 | 0 | OPC_MoveChild1, |
377 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
378 | 0 | OPC_Scope, 13, |
379 | 0 | OPC_CheckPredicate1, |
380 | 0 | OPC_MoveParent, |
381 | 0 | OPC_EmitConvertToTarget1, |
382 | 0 | OPC_EmitNodeXForm, 0, 2, |
383 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
384 | 0 | MVT::i32, 2, 0, 3, |
385 | 0 | 13, |
386 | 0 | OPC_CheckPredicate0, |
387 | 0 | OPC_MoveParent, |
388 | 0 | OPC_EmitConvertToTarget1, |
389 | 0 | OPC_EmitNodeXForm, 1, 2, |
390 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_HI), |
391 | 0 | MVT::i32, 2, 0, 3, |
392 | 0 | 14, |
393 | 0 | OPC_CheckPredicate1, |
394 | 0 | OPC_MoveParent, |
395 | 0 | OPC_EmitConvertToTarget1, |
396 | 0 | OPC_EmitNodeXForm, 0, 2, |
397 | 0 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::OR_F_I_LO), |
398 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
399 | 0 | 14, |
400 | 0 | OPC_CheckPredicate0, |
401 | 0 | OPC_MoveParent, |
402 | 0 | OPC_EmitConvertToTarget1, |
403 | 0 | OPC_EmitNodeXForm, 1, 2, |
404 | 0 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::OR_F_I_HI), |
405 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
406 | 0 | 0, |
407 | 0 | 23, |
408 | 0 | OPC_EmitInteger32, 0, |
409 | 0 | OPC_Scope, 8, |
410 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_R), |
411 | 0 | MVT::i32, 3, 0, 1, 2, |
412 | 0 | 9, |
413 | 0 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::OR_F_R), |
414 | 0 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
415 | 0 | 0, |
416 | 0 | 0, |
417 | 0 | 0, |
418 | 0 | 93, TARGET_VAL(ISD::AND), |
419 | 0 | OPC_RecordChild0, |
420 | 0 | OPC_RecordChild1, |
421 | 0 | OPC_Scope, 64, |
422 | 0 | OPC_MoveChild1, |
423 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
424 | 0 | OPC_Scope, 13, |
425 | 0 | OPC_CheckPredicate7, |
426 | 0 | OPC_MoveParent, |
427 | 0 | OPC_EmitConvertToTarget1, |
428 | 0 | OPC_EmitNodeXForm, 0, 2, |
429 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_LO), |
430 | 0 | MVT::i32, 2, 0, 3, |
431 | 0 | 13, |
432 | 0 | OPC_CheckPredicate4, |
433 | 0 | OPC_MoveParent, |
434 | 0 | OPC_EmitConvertToTarget1, |
435 | 0 | OPC_EmitNodeXForm, 1, 2, |
436 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_HI), |
437 | 0 | MVT::i32, 2, 0, 3, |
438 | 0 | 14, |
439 | 0 | OPC_CheckPredicate7, |
440 | 0 | OPC_MoveParent, |
441 | 0 | OPC_EmitConvertToTarget1, |
442 | 0 | OPC_EmitNodeXForm, 0, 2, |
443 | 0 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::AND_F_I_LO), |
444 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
445 | 0 | 14, |
446 | 0 | OPC_CheckPredicate4, |
447 | 0 | OPC_MoveParent, |
448 | 0 | OPC_EmitConvertToTarget1, |
449 | 0 | OPC_EmitNodeXForm, 1, 2, |
450 | 0 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::AND_F_I_HI), |
451 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
452 | 0 | 0, |
453 | 0 | 23, |
454 | 0 | OPC_EmitInteger32, 0, |
455 | 0 | OPC_Scope, 8, |
456 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_R), |
457 | 0 | MVT::i32, 3, 0, 1, 2, |
458 | 0 | 9, |
459 | 0 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::AND_F_R), |
460 | 0 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
461 | 0 | 0, |
462 | 0 | 0, |
463 | 0 | 93, TARGET_VAL(ISD::XOR), |
464 | 0 | OPC_RecordChild0, |
465 | 0 | OPC_RecordChild1, |
466 | 0 | OPC_Scope, 64, |
467 | 0 | OPC_MoveChild1, |
468 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
469 | 0 | OPC_Scope, 13, |
470 | 0 | OPC_CheckPredicate1, |
471 | 0 | OPC_MoveParent, |
472 | 0 | OPC_EmitConvertToTarget1, |
473 | 0 | OPC_EmitNodeXForm, 0, 2, |
474 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::XOR_I_LO), |
475 | 0 | MVT::i32, 2, 0, 3, |
476 | 0 | 13, |
477 | 0 | OPC_CheckPredicate0, |
478 | 0 | OPC_MoveParent, |
479 | 0 | OPC_EmitConvertToTarget1, |
480 | 0 | OPC_EmitNodeXForm, 1, 2, |
481 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::XOR_I_HI), |
482 | 0 | MVT::i32, 2, 0, 3, |
483 | 0 | 14, |
484 | 0 | OPC_CheckPredicate1, |
485 | 0 | OPC_MoveParent, |
486 | 0 | OPC_EmitConvertToTarget1, |
487 | 0 | OPC_EmitNodeXForm, 0, 2, |
488 | 0 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::XOR_F_I_LO), |
489 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
490 | 0 | 14, |
491 | 0 | OPC_CheckPredicate0, |
492 | 0 | OPC_MoveParent, |
493 | 0 | OPC_EmitConvertToTarget1, |
494 | 0 | OPC_EmitNodeXForm, 1, 2, |
495 | 0 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::XOR_F_I_HI), |
496 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
497 | 0 | 0, |
498 | 0 | 23, |
499 | 0 | OPC_EmitInteger32, 0, |
500 | 0 | OPC_Scope, 8, |
501 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::XOR_R), |
502 | 0 | MVT::i32, 3, 0, 1, 2, |
503 | 0 | 9, |
504 | 0 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::XOR_F_R), |
505 | 0 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
506 | 0 | 0, |
507 | 0 | 0, |
508 | 0 | 64, TARGET_VAL(ISD::ADD), |
509 | 0 | OPC_RecordChild0, |
510 | 0 | OPC_RecordChild1, |
511 | 0 | OPC_Scope, 48, |
512 | 0 | OPC_MoveChild1, |
513 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
514 | 0 | OPC_Scope, 13, |
515 | 0 | OPC_CheckPredicate1, |
516 | 0 | OPC_MoveParent, |
517 | 0 | OPC_EmitConvertToTarget1, |
518 | 0 | OPC_EmitNodeXForm, 0, 2, |
519 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_I_LO), |
520 | 0 | MVT::i32, 2, 0, 3, |
521 | 0 | 13, |
522 | 0 | OPC_CheckPredicate0, |
523 | 0 | OPC_MoveParent, |
524 | 0 | OPC_EmitConvertToTarget1, |
525 | 0 | OPC_EmitNodeXForm, 1, 2, |
526 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_I_HI), |
527 | 0 | MVT::i32, 2, 0, 3, |
528 | 0 | 13, |
529 | 0 | OPC_CheckPredicate, 11, |
530 | 0 | OPC_MoveParent, |
531 | 0 | OPC_EmitNodeXForm, 2, 1, |
532 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_I_LO), |
533 | 0 | MVT::i32, 2, 0, 2, |
534 | 0 | 0, |
535 | 0 | 10, |
536 | 0 | OPC_EmitInteger32, 0, |
537 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_R), |
538 | 0 | MVT::i32, 3, 0, 1, 2, |
539 | 0 | 0, |
540 | 0 | 64, TARGET_VAL(ISD::SUB), |
541 | 0 | OPC_RecordChild0, |
542 | 0 | OPC_RecordChild1, |
543 | 0 | OPC_Scope, 48, |
544 | 0 | OPC_MoveChild1, |
545 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
546 | 0 | OPC_Scope, 13, |
547 | 0 | OPC_CheckPredicate1, |
548 | 0 | OPC_MoveParent, |
549 | 0 | OPC_EmitConvertToTarget1, |
550 | 0 | OPC_EmitNodeXForm, 0, 2, |
551 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_I_LO), |
552 | 0 | MVT::i32, 2, 0, 3, |
553 | 0 | 13, |
554 | 0 | OPC_CheckPredicate0, |
555 | 0 | OPC_MoveParent, |
556 | 0 | OPC_EmitConvertToTarget1, |
557 | 0 | OPC_EmitNodeXForm, 1, 2, |
558 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_I_HI), |
559 | 0 | MVT::i32, 2, 0, 3, |
560 | 0 | 13, |
561 | 0 | OPC_CheckPredicate, 11, |
562 | 0 | OPC_MoveParent, |
563 | 0 | OPC_EmitNodeXForm, 2, 1, |
564 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_I_LO), |
565 | 0 | MVT::i32, 2, 0, 2, |
566 | 0 | 0, |
567 | 0 | 10, |
568 | 0 | OPC_EmitInteger32, 0, |
569 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_R), |
570 | 0 | MVT::i32, 3, 0, 1, 2, |
571 | 0 | 0, |
572 | 0 | 53, TARGET_VAL(ISD::ADDC), |
573 | 0 | OPC_RecordChild0, |
574 | 0 | OPC_RecordChild1, |
575 | 0 | OPC_Scope, 36, |
576 | 0 | OPC_MoveChild1, |
577 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
578 | 0 | OPC_Scope, 14, |
579 | 0 | OPC_CheckPredicate1, |
580 | 0 | OPC_MoveParent, |
581 | 0 | OPC_EmitConvertToTarget1, |
582 | 0 | OPC_EmitNodeXForm, 0, 2, |
583 | 0 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::ADD_F_I_LO), |
584 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
585 | 0 | 14, |
586 | 0 | OPC_CheckPredicate0, |
587 | 0 | OPC_MoveParent, |
588 | 0 | OPC_EmitConvertToTarget1, |
589 | 0 | OPC_EmitNodeXForm, 1, 2, |
590 | 0 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::ADD_F_I_HI), |
591 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
592 | 0 | 0, |
593 | 0 | 11, |
594 | 0 | OPC_EmitInteger32, 0, |
595 | 0 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::ADD_F_R), |
596 | 0 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
597 | 0 | 0, |
598 | 0 | 53, TARGET_VAL(ISD::SUBC), |
599 | 0 | OPC_RecordChild0, |
600 | 0 | OPC_RecordChild1, |
601 | 0 | OPC_Scope, 36, |
602 | 0 | OPC_MoveChild1, |
603 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
604 | 0 | OPC_Scope, 14, |
605 | 0 | OPC_CheckPredicate1, |
606 | 0 | OPC_MoveParent, |
607 | 0 | OPC_EmitConvertToTarget1, |
608 | 0 | OPC_EmitNodeXForm, 0, 2, |
609 | 0 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::SUB_F_I_LO), |
610 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
611 | 0 | 14, |
612 | 0 | OPC_CheckPredicate0, |
613 | 0 | OPC_MoveParent, |
614 | 0 | OPC_EmitConvertToTarget1, |
615 | 0 | OPC_EmitNodeXForm, 1, 2, |
616 | 0 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::SUB_F_I_HI), |
617 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
618 | 0 | 0, |
619 | 0 | 11, |
620 | 0 | OPC_EmitInteger32, 0, |
621 | 0 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::SUB_F_R), |
622 | 0 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
623 | 0 | 0, |
624 | 0 | 68, TARGET_VAL(ISD::ADDE), |
625 | 0 | OPC_CaptureGlueInput, |
626 | 0 | OPC_RecordChild0, |
627 | 0 | OPC_RecordChild1, |
628 | 0 | OPC_Scope, 36, |
629 | 0 | OPC_MoveChild1, |
630 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
631 | 0 | OPC_Scope, 14, |
632 | 0 | OPC_CheckPredicate1, |
633 | 0 | OPC_MoveParent, |
634 | 0 | OPC_EmitConvertToTarget1, |
635 | 0 | OPC_EmitNodeXForm, 0, 2, |
636 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADDC_I_LO), 0|OPFL_GlueInput|OPFL_GlueOutput, |
637 | 0 | MVT::i32, 2, 0, 3, |
638 | 0 | 14, |
639 | 0 | OPC_CheckPredicate0, |
640 | 0 | OPC_MoveParent, |
641 | 0 | OPC_EmitConvertToTarget1, |
642 | 0 | OPC_EmitNodeXForm, 1, 2, |
643 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADDC_I_HI), 0|OPFL_GlueInput|OPFL_GlueOutput, |
644 | 0 | MVT::i32, 2, 0, 3, |
645 | 0 | 0, |
646 | 0 | 25, |
647 | 0 | OPC_EmitInteger32, 0, |
648 | 0 | OPC_Scope, 9, |
649 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADDC_R), 0|OPFL_GlueInput|OPFL_GlueOutput, |
650 | 0 | MVT::i32, 3, 0, 1, 2, |
651 | 0 | 10, |
652 | 0 | OPC_MorphNodeTo2, TARGET_VAL(Lanai::ADDC_F_R), 0|OPFL_GlueInput|OPFL_GlueOutput, |
653 | 0 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
654 | 0 | 0, |
655 | 0 | 0, |
656 | 0 | 68, TARGET_VAL(ISD::SUBE), |
657 | 0 | OPC_CaptureGlueInput, |
658 | 0 | OPC_RecordChild0, |
659 | 0 | OPC_RecordChild1, |
660 | 0 | OPC_Scope, 36, |
661 | 0 | OPC_MoveChild1, |
662 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
663 | 0 | OPC_Scope, 14, |
664 | 0 | OPC_CheckPredicate1, |
665 | 0 | OPC_MoveParent, |
666 | 0 | OPC_EmitConvertToTarget1, |
667 | 0 | OPC_EmitNodeXForm, 0, 2, |
668 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::SUBB_I_LO), 0|OPFL_GlueInput|OPFL_GlueOutput, |
669 | 0 | MVT::i32, 2, 0, 3, |
670 | 0 | 14, |
671 | 0 | OPC_CheckPredicate0, |
672 | 0 | OPC_MoveParent, |
673 | 0 | OPC_EmitConvertToTarget1, |
674 | 0 | OPC_EmitNodeXForm, 1, 2, |
675 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::SUBB_I_HI), 0|OPFL_GlueInput|OPFL_GlueOutput, |
676 | 0 | MVT::i32, 2, 0, 3, |
677 | 0 | 0, |
678 | 0 | 25, |
679 | 0 | OPC_EmitInteger32, 0, |
680 | 0 | OPC_Scope, 9, |
681 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::SUBB_R), 0|OPFL_GlueInput|OPFL_GlueOutput, |
682 | 0 | MVT::i32, 3, 0, 1, 2, |
683 | 0 | 10, |
684 | 0 | OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_R), 0|OPFL_GlueInput|OPFL_GlueOutput, |
685 | 0 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
686 | 0 | 0, |
687 | 0 | 0, |
688 | 0 | 59, TARGET_VAL(LanaiISD::SUBBF), |
689 | 0 | OPC_CaptureGlueInput, |
690 | 0 | OPC_RecordChild0, |
691 | 0 | OPC_Scope, 39, |
692 | 0 | OPC_RecordChild1, |
693 | 0 | OPC_MoveChild1, |
694 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
695 | 0 | OPC_Scope, 15, |
696 | 0 | OPC_CheckPredicate1, |
697 | 0 | OPC_MoveParent, |
698 | 0 | OPC_EmitConvertToTarget1, |
699 | 0 | OPC_EmitNodeXForm, 0, 2, |
700 | 0 | OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_I_LO), 0|OPFL_GlueInput|OPFL_GlueOutput, |
701 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
702 | 0 | 15, |
703 | 0 | OPC_CheckPredicate0, |
704 | 0 | OPC_MoveParent, |
705 | 0 | OPC_EmitConvertToTarget1, |
706 | 0 | OPC_EmitNodeXForm, 1, 2, |
707 | 0 | OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_I_HI), 0|OPFL_GlueInput|OPFL_GlueOutput, |
708 | 0 | MVT::i32, MVT::i32, 2, 0, 3, |
709 | 0 | 0, |
710 | 0 | 14, |
711 | 0 | OPC_CheckChild0TypeI32, |
712 | 0 | OPC_RecordChild1, |
713 | 0 | OPC_EmitInteger32, 0, |
714 | 0 | OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_R), 0|OPFL_GlueInput|OPFL_GlueOutput, |
715 | 0 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
716 | 0 | 0, |
717 | 0 | 30, TARGET_VAL(ISD::SHL), |
718 | 0 | OPC_RecordChild0, |
719 | 0 | OPC_RecordChild1, |
720 | 0 | OPC_Scope, 14, |
721 | 0 | OPC_MoveChild1, |
722 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
723 | 0 | OPC_CheckPredicate6, |
724 | 0 | OPC_MoveParent, |
725 | 0 | OPC_EmitConvertToTarget1, |
726 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SL_I), |
727 | 0 | MVT::i32, 2, 0, 2, |
728 | 0 | 10, |
729 | 0 | OPC_EmitInteger32, 0, |
730 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SHL_R), |
731 | 0 | MVT::i32, 3, 0, 1, 2, |
732 | 0 | 0, |
733 | 0 | 44, TARGET_VAL(ISD::SRL), |
734 | 0 | OPC_RecordChild0, |
735 | 0 | OPC_RecordChild1, |
736 | 0 | OPC_Scope, 16, |
737 | 0 | OPC_MoveChild1, |
738 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
739 | 0 | OPC_CheckPredicate6, |
740 | 0 | OPC_MoveParent, |
741 | 0 | OPC_EmitNodeXForm, 2, 1, |
742 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SL_I), |
743 | 0 | MVT::i32, 2, 0, 2, |
744 | 0 | 22, |
745 | 0 | OPC_EmitRegisterI32, Lanai::R0, |
746 | 0 | OPC_EmitInteger32, 0, |
747 | 0 | OPC_EmitNode1None, TARGET_VAL(Lanai::SUB_R), |
748 | 0 | MVT::i32, 3, 2, 1, 3, |
749 | 0 | OPC_EmitInteger32, 0, |
750 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SRL_R), |
751 | 0 | MVT::i32, 3, 0, 4, 5, |
752 | 0 | 0, |
753 | 0 | 44, TARGET_VAL(ISD::SRA), |
754 | 0 | OPC_RecordChild0, |
755 | 0 | OPC_RecordChild1, |
756 | 0 | OPC_Scope, 16, |
757 | 0 | OPC_MoveChild1, |
758 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
759 | 0 | OPC_CheckPredicate6, |
760 | 0 | OPC_MoveParent, |
761 | 0 | OPC_EmitNodeXForm, 2, 1, |
762 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SA_I), |
763 | 0 | MVT::i32, 2, 0, 2, |
764 | 0 | 22, |
765 | 0 | OPC_EmitRegisterI32, Lanai::R0, |
766 | 0 | OPC_EmitInteger32, 0, |
767 | 0 | OPC_EmitNode1None, TARGET_VAL(Lanai::SUB_R), |
768 | 0 | MVT::i32, 3, 2, 1, 3, |
769 | 0 | OPC_EmitInteger32, 0, |
770 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SRA_R), |
771 | 0 | MVT::i32, 3, 0, 4, 5, |
772 | 0 | 0, |
773 | 0 | 49, TARGET_VAL(LanaiISD::SET_FLAG), |
774 | 0 | OPC_RecordChild0, |
775 | 0 | OPC_Scope, 35, |
776 | 0 | OPC_RecordChild1, |
777 | 0 | OPC_MoveChild1, |
778 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
779 | 0 | OPC_Scope, 13, |
780 | 0 | OPC_CheckPredicate1, |
781 | 0 | OPC_MoveParent, |
782 | 0 | OPC_EmitConvertToTarget1, |
783 | 0 | OPC_EmitNodeXForm, 0, 2, |
784 | 0 | OPC_MorphNodeTo1GlueOutput, TARGET_VAL(Lanai::SFSUB_F_RI_LO), |
785 | 0 | MVT::i32, 2, 0, 3, |
786 | 0 | 13, |
787 | 0 | OPC_CheckPredicate0, |
788 | 0 | OPC_MoveParent, |
789 | 0 | OPC_EmitConvertToTarget1, |
790 | 0 | OPC_EmitNodeXForm, 1, 2, |
791 | 0 | OPC_MorphNodeTo1GlueOutput, TARGET_VAL(Lanai::SFSUB_F_RI_HI), |
792 | 0 | MVT::i32, 2, 0, 3, |
793 | 0 | 0, |
794 | 0 | 9, |
795 | 0 | OPC_CheckChild0TypeI32, |
796 | 0 | OPC_RecordChild1, |
797 | 0 | OPC_MorphNodeTo1GlueOutput, TARGET_VAL(Lanai::SFSUB_F_RR), |
798 | 0 | MVT::i32, 2, 0, 1, |
799 | 0 | 0, |
800 | 0 | 22, TARGET_VAL(LanaiISD::BR_CC), |
801 | 0 | OPC_RecordNode, |
802 | 0 | OPC_CaptureGlueInput, |
803 | 0 | OPC_RecordChild1, |
804 | 0 | OPC_MoveChild1, |
805 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock), |
806 | 0 | OPC_MoveSibling2, |
807 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
808 | 0 | OPC_RecordNode, |
809 | 0 | OPC_MoveParent, |
810 | 0 | OPC_EmitMergeInputChains1_0, |
811 | 0 | OPC_EmitConvertToTarget2, |
812 | 0 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::BRCC), 0|OPFL_Chain|OPFL_GlueInput, |
813 | 0 | 2, 1, 3, |
814 | 0 | 14, TARGET_VAL(LanaiISD::SETCC), |
815 | 0 | OPC_CaptureGlueInput, |
816 | 0 | OPC_RecordChild0, |
817 | 0 | OPC_MoveChild0, |
818 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
819 | 0 | OPC_MoveParent, |
820 | 0 | OPC_EmitConvertToTarget0, |
821 | 0 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SCC), |
822 | 0 | MVT::i32, 1, 1, |
823 | 0 | 19, TARGET_VAL(LanaiISD::SELECT_CC), |
824 | 0 | OPC_CaptureGlueInput, |
825 | 0 | OPC_RecordChild0, |
826 | 0 | OPC_RecordChild1, |
827 | 0 | OPC_RecordChild2, |
828 | 0 | OPC_MoveChild2, |
829 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
830 | 0 | OPC_MoveParent, |
831 | 0 | OPC_CheckTypeI32, |
832 | 0 | OPC_EmitConvertToTarget2, |
833 | 0 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SELECT), |
834 | 0 | MVT::i32, 3, 0, 1, 3, |
835 | 0 | 42, TARGET_VAL(LanaiISD::CALL), |
836 | 0 | OPC_RecordNode, |
837 | 0 | OPC_CaptureGlueInput, |
838 | 0 | OPC_RecordChild1, |
839 | 0 | OPC_Scope, 27, |
840 | 0 | OPC_MoveChild1, |
841 | 0 | OPC_SwitchOpcode , 9, TARGET_VAL(ISD::TargetGlobalAddress), |
842 | 0 | OPC_MoveParent, |
843 | 0 | OPC_EmitMergeInputChains1_0, |
844 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::CALL), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput|OPFL_Variadic1, |
845 | 0 | MVT::i32, 1, 1, |
846 | 0 | 9, TARGET_VAL(ISD::TargetExternalSymbol), |
847 | 0 | OPC_MoveParent, |
848 | 0 | OPC_EmitMergeInputChains1_0, |
849 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::CALL), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput|OPFL_Variadic1, |
850 | 0 | MVT::i32, 1, 1, |
851 | 0 | 0, |
852 | 0 | 8, |
853 | 0 | OPC_EmitMergeInputChains1_0, |
854 | 0 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::CALLR), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput|OPFL_Variadic1, |
855 | 0 | MVT::i32, 1, 1, |
856 | 0 | 0, |
857 | 0 | 59, TARGET_VAL(LanaiISD::HI), |
858 | 0 | OPC_RecordChild0, |
859 | 0 | OPC_MoveChild0, |
860 | 0 | OPC_SwitchOpcode , 8, TARGET_VAL(ISD::TargetGlobalAddress), |
861 | 0 | OPC_MoveParent, |
862 | 0 | OPC_CheckTypeI32, |
863 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
864 | 0 | MVT::i32, 1, 0, |
865 | 0 | 8, TARGET_VAL(ISD::TargetExternalSymbol), |
866 | 0 | OPC_MoveParent, |
867 | 0 | OPC_CheckTypeI32, |
868 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
869 | 0 | MVT::i32, 1, 0, |
870 | 0 | 8, TARGET_VAL(ISD::TargetBlockAddress), |
871 | 0 | OPC_MoveParent, |
872 | 0 | OPC_CheckTypeI32, |
873 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
874 | 0 | MVT::i32, 1, 0, |
875 | 0 | 8, TARGET_VAL(ISD::TargetJumpTable), |
876 | 0 | OPC_MoveParent, |
877 | 0 | OPC_CheckTypeI32, |
878 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
879 | 0 | MVT::i32, 1, 0, |
880 | 0 | 8, TARGET_VAL(ISD::TargetConstantPool), |
881 | 0 | OPC_MoveParent, |
882 | 0 | OPC_CheckTypeI32, |
883 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
884 | 0 | MVT::i32, 1, 0, |
885 | 0 | 0, |
886 | 0 | 74, TARGET_VAL(LanaiISD::LO), |
887 | 0 | OPC_RecordChild0, |
888 | 0 | OPC_MoveChild0, |
889 | 0 | OPC_SwitchOpcode , 11, TARGET_VAL(ISD::TargetGlobalAddress), |
890 | 0 | OPC_MoveParent, |
891 | 0 | OPC_CheckTypeI32, |
892 | 0 | OPC_EmitRegisterI32, Lanai::R0, |
893 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
894 | 0 | MVT::i32, 2, 1, 0, |
895 | 0 | 11, TARGET_VAL(ISD::TargetExternalSymbol), |
896 | 0 | OPC_MoveParent, |
897 | 0 | OPC_CheckTypeI32, |
898 | 0 | OPC_EmitRegisterI32, Lanai::R0, |
899 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
900 | 0 | MVT::i32, 2, 1, 0, |
901 | 0 | 11, TARGET_VAL(ISD::TargetBlockAddress), |
902 | 0 | OPC_MoveParent, |
903 | 0 | OPC_CheckTypeI32, |
904 | 0 | OPC_EmitRegisterI32, Lanai::R0, |
905 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
906 | 0 | MVT::i32, 2, 1, 0, |
907 | 0 | 11, TARGET_VAL(ISD::TargetJumpTable), |
908 | 0 | OPC_MoveParent, |
909 | 0 | OPC_CheckTypeI32, |
910 | 0 | OPC_EmitRegisterI32, Lanai::R0, |
911 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
912 | 0 | MVT::i32, 2, 1, 0, |
913 | 0 | 11, TARGET_VAL(ISD::TargetConstantPool), |
914 | 0 | OPC_MoveParent, |
915 | 0 | OPC_CheckTypeI32, |
916 | 0 | OPC_EmitRegisterI32, Lanai::R0, |
917 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
918 | 0 | MVT::i32, 2, 1, 0, |
919 | 0 | 0, |
920 | 0 | 59, TARGET_VAL(LanaiISD::SMALL), |
921 | 0 | OPC_RecordChild0, |
922 | 0 | OPC_MoveChild0, |
923 | 0 | OPC_SwitchOpcode , 8, TARGET_VAL(ISD::TargetGlobalAddress), |
924 | 0 | OPC_MoveParent, |
925 | 0 | OPC_CheckTypeI32, |
926 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
927 | 0 | MVT::i32, 1, 0, |
928 | 0 | 8, TARGET_VAL(ISD::TargetExternalSymbol), |
929 | 0 | OPC_MoveParent, |
930 | 0 | OPC_CheckTypeI32, |
931 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
932 | 0 | MVT::i32, 1, 0, |
933 | 0 | 8, TARGET_VAL(ISD::TargetBlockAddress), |
934 | 0 | OPC_MoveParent, |
935 | 0 | OPC_CheckTypeI32, |
936 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
937 | 0 | MVT::i32, 1, 0, |
938 | 0 | 8, TARGET_VAL(ISD::TargetJumpTable), |
939 | 0 | OPC_MoveParent, |
940 | 0 | OPC_CheckTypeI32, |
941 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
942 | 0 | MVT::i32, 1, 0, |
943 | 0 | 8, TARGET_VAL(ISD::TargetConstantPool), |
944 | 0 | OPC_MoveParent, |
945 | 0 | OPC_CheckTypeI32, |
946 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
947 | 0 | MVT::i32, 1, 0, |
948 | 0 | 0, |
949 | 0 | 92, TARGET_VAL(ISD::Constant), |
950 | 0 | OPC_RecordNode, |
951 | 0 | OPC_Scope, 14, |
952 | 0 | OPC_CheckPredicate7, |
953 | 0 | OPC_EmitRegisterI32, Lanai::R1, |
954 | 0 | OPC_EmitConvertToTarget0, |
955 | 0 | OPC_EmitNodeXForm, 0, 2, |
956 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_LO), |
957 | 0 | MVT::i32, 2, 1, 3, |
958 | 0 | 14, |
959 | 0 | OPC_CheckPredicate4, |
960 | 0 | OPC_EmitRegisterI32, Lanai::R1, |
961 | 0 | OPC_EmitConvertToTarget0, |
962 | 0 | OPC_EmitNodeXForm, 1, 2, |
963 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_HI), |
964 | 0 | MVT::i32, 2, 1, 3, |
965 | 0 | 11, |
966 | 0 | OPC_CheckPredicate0, |
967 | 0 | OPC_EmitConvertToTarget0, |
968 | 0 | OPC_EmitNodeXForm, 1, 1, |
969 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
970 | 0 | MVT::i32, 1, 2, |
971 | 0 | 12, |
972 | 0 | OPC_CheckPredicate, 16, |
973 | 0 | OPC_EmitConvertToTarget0, |
974 | 0 | OPC_EmitNodeXForm, 3, 1, |
975 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
976 | 0 | MVT::i32, 1, 2, |
977 | 0 | 11, |
978 | 0 | OPC_CheckPredicate1, |
979 | 0 | OPC_EmitRegisterI32, Lanai::R0, |
980 | 0 | OPC_EmitConvertToTarget0, |
981 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
982 | 0 | MVT::i32, 2, 1, 2, |
983 | 0 | 21, |
984 | 0 | OPC_EmitConvertToTarget0, |
985 | 0 | OPC_EmitNodeXForm, 1, 1, |
986 | 0 | OPC_EmitNode1None, TARGET_VAL(Lanai::MOVHI), |
987 | 0 | MVT::i32, 1, 2, |
988 | 0 | OPC_EmitConvertToTarget0, |
989 | 0 | OPC_EmitNodeXForm, 0, 4, |
990 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
991 | 0 | MVT::i32, 2, 3, 5, |
992 | 0 | 0, |
993 | 0 | 13, TARGET_VAL(ISD::BR), |
994 | 0 | OPC_RecordNode, |
995 | 0 | OPC_RecordChild1, |
996 | 0 | OPC_MoveChild1, |
997 | 0 | OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock), |
998 | 0 | OPC_MoveParent, |
999 | 0 | OPC_EmitMergeInputChains1_0, |
1000 | 0 | OPC_MorphNodeTo0Chain, TARGET_VAL(Lanai::BT), |
1001 | 0 | 1, 1, |
1002 | 0 | 9, TARGET_VAL(ISD::BRIND), |
1003 | 0 | OPC_RecordNode, |
1004 | 0 | OPC_RecordChild1, |
1005 | 0 | OPC_CheckChild1TypeI32, |
1006 | 0 | OPC_EmitMergeInputChains1_0, |
1007 | 0 | OPC_MorphNodeTo0Chain, TARGET_VAL(Lanai::JR), |
1008 | 0 | 1, 1, |
1009 | 0 | 8, TARGET_VAL(LanaiISD::RET_GLUE), |
1010 | 0 | OPC_RecordNode, |
1011 | 0 | OPC_CaptureGlueInput, |
1012 | 0 | OPC_EmitMergeInputChains1_0, |
1013 | 0 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::RET), 0|OPFL_Chain|OPFL_GlueInput|OPFL_Variadic0, |
1014 | 0 | 0, |
1015 | 0 | 8, TARGET_VAL(LanaiISD::ADJDYNALLOC), |
1016 | 0 | OPC_RecordChild0, |
1017 | 0 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::ADJDYNALLOC), |
1018 | 0 | MVT::i32, MVT::i32, 1, 0, |
1019 | 0 | 7, TARGET_VAL(ISD::CTPOP), |
1020 | 0 | OPC_RecordChild0, |
1021 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::POPC), |
1022 | 0 | MVT::i32, 1, 0, |
1023 | 0 | 7, TARGET_VAL(ISD::CTLZ), |
1024 | 0 | OPC_RecordChild0, |
1025 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::LEADZ), |
1026 | 0 | MVT::i32, 1, 0, |
1027 | 0 | 7, TARGET_VAL(ISD::CTTZ), |
1028 | 0 | OPC_RecordChild0, |
1029 | 0 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::TRAILZ), |
1030 | 0 | MVT::i32, 1, 0, |
1031 | 0 | 0, |
1032 | 0 | 0 |
1033 | 0 | }; // Total Array size is 2066 bytes |
1034 | |
|
1035 | 0 | #undef TARGET_VAL |
1036 | 0 | SelectCodeCommon(N, MatcherTable,sizeof(MatcherTable)); |
1037 | 0 | } |
1038 | | #endif // GET_DAGISEL_BODY |
1039 | | |
1040 | | #ifdef GET_DAGISEL_DECL |
1041 | | bool CheckNodePredicate(SDNode *Node, unsigned PredNo) const override; |
1042 | | #endif |
1043 | | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
1044 | | bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const |
1045 | | #if DAGISEL_INLINE |
1046 | | override |
1047 | | #endif |
1048 | 0 | { |
1049 | 0 | switch (PredNo) { |
1050 | 0 | default: llvm_unreachable("Invalid predicate in table?"); |
1051 | 0 | case 0: { |
1052 | | // Predicate_i32hi16 |
1053 | 0 | auto *N = cast<ConstantSDNode>(Node); |
1054 | 0 | (void)N; |
1055 | | |
1056 | | // i32hi16 predicate - true if the 32-bit immediate has only leftmost 16 |
1057 | | // bits set. |
1058 | 0 | return ((N->getZExtValue() & 0xFFFF0000UL) == N->getZExtValue()); |
1059 | 0 | } |
1060 | 0 | case 1: { |
1061 | | // Predicate_i32lo16z |
1062 | 0 | auto *N = cast<ConstantSDNode>(Node); |
1063 | 0 | (void)N; |
1064 | | |
1065 | | // i32lo16 predicate - true if the 32-bit immediate has only rightmost 16 |
1066 | | // bits set. |
1067 | 0 | return ((N->getZExtValue() & 0xFFFFUL) == N->getZExtValue()); |
1068 | 0 | } |
1069 | 0 | case 2: { |
1070 | | // Predicate_atomic_load_8 |
1071 | | // Predicate_extloadi8 |
1072 | | // Predicate_sextloadi8 |
1073 | | // Predicate_zextloadi8 |
1074 | 0 | SDNode *N = Node; |
1075 | 0 | (void)N; |
1076 | 0 | if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i8) return false; |
1077 | 0 | return true; |
1078 | |
|
1079 | 0 | } |
1080 | 0 | case 3: { |
1081 | | // Predicate_extloadi16 |
1082 | | // Predicate_sextloadi16 |
1083 | | // Predicate_zextloadi16 |
1084 | 0 | SDNode *N = Node; |
1085 | 0 | (void)N; |
1086 | 0 | if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i16) return false; |
1087 | 0 | return true; |
1088 | |
|
1089 | 0 | } |
1090 | 0 | case 4: { |
1091 | | // Predicate_i32hi16and |
1092 | 0 | auto *N = cast<ConstantSDNode>(Node); |
1093 | 0 | (void)N; |
1094 | | |
1095 | | // i32lo16 predicate - true if the 32-bit immediate has the leftmost 16 |
1096 | | // bits set and the rightmost 16 bits 1's. |
1097 | 0 | return ((N->getZExtValue() & 0xFFFFUL) == 0xFFFFUL); |
1098 | 0 | } |
1099 | 0 | case 5: { |
1100 | | // Predicate_sextload |
1101 | 0 | SDNode *N = Node; |
1102 | 0 | (void)N; |
1103 | 0 | if (cast<LoadSDNode>(N)->getExtensionType() != ISD::SEXTLOAD) return false; |
1104 | 0 | return true; |
1105 | |
|
1106 | 0 | } |
1107 | 0 | case 6: { |
1108 | | // Predicate_immShift |
1109 | 0 | auto *N = cast<ConstantSDNode>(Node); |
1110 | 0 | (void)N; |
1111 | |
|
1112 | 0 | int Imm = N->getSExtValue(); |
1113 | 0 | return Imm >= -31 && Imm <= 31; |
1114 | 0 | } |
1115 | 0 | case 7: { |
1116 | | // Predicate_i32lo16and |
1117 | 0 | auto *N = cast<ConstantSDNode>(Node); |
1118 | 0 | (void)N; |
1119 | | |
1120 | | // i32lo16 predicate - true if the 32-bit immediate has the rightmost 16 |
1121 | | // bits set and the leftmost 16 bits 1's. |
1122 | 0 | return (N->getZExtValue() >= 0xFFFF0000UL); |
1123 | 0 | } |
1124 | 0 | case 8: { |
1125 | | // Predicate_zextload |
1126 | 0 | SDNode *N = Node; |
1127 | 0 | (void)N; |
1128 | 0 | if (cast<LoadSDNode>(N)->getExtensionType() != ISD::ZEXTLOAD) return false; |
1129 | 0 | return true; |
1130 | |
|
1131 | 0 | } |
1132 | 0 | case 9: { |
1133 | | // Predicate_truncstorei8 |
1134 | 0 | SDNode *N = Node; |
1135 | 0 | (void)N; |
1136 | 0 | if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i8) return false; |
1137 | 0 | if (!cast<StoreSDNode>(N)->isTruncatingStore()) return false; |
1138 | 0 | return true; |
1139 | |
|
1140 | 0 | } |
1141 | 0 | case 10: { |
1142 | | // Predicate_truncstorei16 |
1143 | 0 | SDNode *N = Node; |
1144 | 0 | (void)N; |
1145 | 0 | if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i16) return false; |
1146 | 0 | if (!cast<StoreSDNode>(N)->isTruncatingStore()) return false; |
1147 | 0 | return true; |
1148 | |
|
1149 | 0 | } |
1150 | 0 | case 11: { |
1151 | | // Predicate_i32neg16 |
1152 | 0 | auto *N = cast<ConstantSDNode>(Node); |
1153 | 0 | (void)N; |
1154 | | |
1155 | | // i32neg16 predicate - true if the 32-bit immediate is negative and can |
1156 | | // be represented by a 16 bit integer. |
1157 | 0 | int Imm = N->getSExtValue(); |
1158 | 0 | return (Imm < 0) && (isInt<16>(Imm)); |
1159 | 0 | } |
1160 | 0 | case 12: { |
1161 | | // Predicate_load |
1162 | 0 | SDNode *N = Node; |
1163 | 0 | (void)N; |
1164 | 0 | if (cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD) return false; |
1165 | 0 | return true; |
1166 | |
|
1167 | 0 | } |
1168 | 0 | case 13: { |
1169 | | // Predicate_store |
1170 | 0 | SDNode *N = Node; |
1171 | 0 | (void)N; |
1172 | 0 | if (cast<StoreSDNode>(N)->isTruncatingStore()) return false; |
1173 | 0 | return true; |
1174 | |
|
1175 | 0 | } |
1176 | 0 | case 14: { |
1177 | | // Predicate_zextloadi32 |
1178 | 0 | SDNode *N = Node; |
1179 | 0 | (void)N; |
1180 | 0 | if (cast<MemSDNode>(N)->getMemoryVT() != MVT::i32) return false; |
1181 | 0 | return true; |
1182 | |
|
1183 | 0 | } |
1184 | 0 | case 15: { |
1185 | | // Predicate_extload |
1186 | 0 | SDNode *N = Node; |
1187 | 0 | (void)N; |
1188 | 0 | if (cast<LoadSDNode>(N)->getExtensionType() != ISD::EXTLOAD) return false; |
1189 | 0 | return true; |
1190 | |
|
1191 | 0 | } |
1192 | 0 | case 16: { |
1193 | | // Predicate_i32lo21 |
1194 | 0 | auto *N = cast<ConstantSDNode>(Node); |
1195 | 0 | (void)N; |
1196 | | |
1197 | | // i32lo21 predicate - true if the 32-bit immediate has only rightmost 21 |
1198 | | // bits set. |
1199 | 0 | return ((N->getZExtValue() & 0x1FFFFFUL) == N->getZExtValue()); |
1200 | 0 | } |
1201 | 0 | case 17: { |
1202 | | // Predicate_unindexedload |
1203 | 0 | SDNode *N = Node; |
1204 | 0 | (void)N; |
1205 | 0 | if (cast<LoadSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false; |
1206 | 0 | return true; |
1207 | |
|
1208 | 0 | } |
1209 | 0 | case 18: { |
1210 | | // Predicate_truncstore |
1211 | 0 | SDNode *N = Node; |
1212 | 0 | (void)N; |
1213 | 0 | if (!cast<StoreSDNode>(N)->isTruncatingStore()) return false; |
1214 | 0 | return true; |
1215 | |
|
1216 | 0 | } |
1217 | 0 | case 19: { |
1218 | | // Predicate_unindexedstore |
1219 | 0 | SDNode *N = Node; |
1220 | 0 | (void)N; |
1221 | 0 | if (cast<StoreSDNode>(N)->getAddressingMode() != ISD::UNINDEXED) return false; |
1222 | 0 | return true; |
1223 | |
|
1224 | 0 | } |
1225 | 0 | } |
1226 | 0 | } |
1227 | | #endif // GET_DAGISEL_BODY |
1228 | | |
1229 | | #ifdef GET_DAGISEL_DECL |
1230 | | bool CheckComplexPattern(SDNode *Root, SDNode *Parent, |
1231 | | SDValue N, unsigned PatternNo, |
1232 | | SmallVectorImpl<std::pair<SDValue, SDNode *>> &Result) override; |
1233 | | #endif |
1234 | | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
1235 | | bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent, |
1236 | | SDValue N, unsigned PatternNo, |
1237 | | SmallVectorImpl<std::pair<SDValue, SDNode *>> &Result) |
1238 | | #if DAGISEL_INLINE |
1239 | | override |
1240 | | #endif |
1241 | 0 | { |
1242 | 0 | unsigned NextRes = Result.size(); |
1243 | 0 | switch (PatternNo) { |
1244 | 0 | default: llvm_unreachable("Invalid pattern # in table?"); |
1245 | 0 | case 0: |
1246 | 0 | Result.resize(NextRes+3); |
1247 | 0 | return selectAddrRr(N, Result[NextRes+0].first, Result[NextRes+1].first, Result[NextRes+2].first); |
1248 | 0 | case 1: |
1249 | 0 | Result.resize(NextRes+3); |
1250 | 0 | return selectAddrSpls(N, Result[NextRes+0].first, Result[NextRes+1].first, Result[NextRes+2].first); |
1251 | 0 | case 2: |
1252 | 0 | Result.resize(NextRes+3); |
1253 | 0 | return selectAddrRi(N, Result[NextRes+0].first, Result[NextRes+1].first, Result[NextRes+2].first); |
1254 | 0 | case 3: |
1255 | 0 | Result.resize(NextRes+1); |
1256 | 0 | return selectAddrSls(N, Result[NextRes+0].first); |
1257 | 0 | } |
1258 | 0 | } |
1259 | | #endif // GET_DAGISEL_BODY |
1260 | | |
1261 | | #ifdef GET_DAGISEL_DECL |
1262 | | SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo) override; |
1263 | | #endif |
1264 | | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
1265 | | SDValue DAGISEL_CLASS_COLONCOLON RunSDNodeXForm(SDValue V, unsigned XFormNo) |
1266 | | #if DAGISEL_INLINE |
1267 | | override |
1268 | | #endif |
1269 | 0 | { |
1270 | 0 | switch (XFormNo) { |
1271 | 0 | default: llvm_unreachable("Invalid xform # in table?"); |
1272 | 0 | case 0: { |
1273 | 0 | ConstantSDNode *N = cast<ConstantSDNode>(V.getNode()); |
1274 | |
|
1275 | 0 | return CurDAG->getTargetConstant((uint64_t)N->getZExtValue() & 0xffff, |
1276 | 0 | SDLoc(N), MVT::i32); |
1277 | |
|
1278 | 0 | } |
1279 | 0 | case 1: { |
1280 | 0 | ConstantSDNode *N = cast<ConstantSDNode>(V.getNode()); |
1281 | |
|
1282 | 0 | return CurDAG->getTargetConstant((uint64_t)N->getZExtValue() >> 16, SDLoc(N), |
1283 | 0 | MVT::i32); |
1284 | |
|
1285 | 0 | } |
1286 | 0 | case 2: { |
1287 | 0 | ConstantSDNode *N = cast<ConstantSDNode>(V.getNode()); |
1288 | |
|
1289 | 0 | return CurDAG->getTargetConstant(-N->getSExtValue(), SDLoc(N), MVT::i32); |
1290 | |
|
1291 | 0 | } |
1292 | 0 | case 3: { |
1293 | 0 | ConstantSDNode *N = cast<ConstantSDNode>(V.getNode()); |
1294 | |
|
1295 | 0 | return CurDAG->getTargetConstant((uint64_t)N->getZExtValue() & 0x1fffff, |
1296 | 0 | SDLoc(N), MVT::i32); |
1297 | |
|
1298 | 0 | } |
1299 | 0 | } |
1300 | 0 | } |
1301 | | #endif // GET_DAGISEL_BODY |
1302 | | |
1303 | | |
1304 | | #ifdef DAGISEL_INLINE |
1305 | | #undef DAGISEL_INLINE |
1306 | | #endif |
1307 | | #ifdef DAGISEL_CLASS_COLONCOLON |
1308 | | #undef DAGISEL_CLASS_COLONCOLON |
1309 | | #endif |
1310 | | #ifdef GET_DAGISEL_DECL |
1311 | | #undef GET_DAGISEL_DECL |
1312 | | #endif |
1313 | | #ifdef GET_DAGISEL_BODY |
1314 | | #undef GET_DAGISEL_BODY |
1315 | | #endif |